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-rw-r--r--.mailmap1
-rw-r--r--Documentation/DocBook/device-drivers.tmpl10
-rw-r--r--Documentation/DocBook/drm.tmpl5
-rw-r--r--Documentation/devicetree/bindings/arm/arch_timer.txt3
-rw-r--r--Documentation/devicetree/bindings/arm/marvell,kirkwood.txt97
-rw-r--r--Documentation/devicetree/bindings/ata/apm-xgene.txt3
-rw-r--r--Documentation/devicetree/bindings/i2c/trivial-devices.txt16
-rw-r--r--Documentation/devicetree/bindings/mfd/mc13xxx.txt3
-rw-r--r--Documentation/devicetree/bindings/net/arc_emac.txt12
-rw-r--r--Documentation/devicetree/bindings/net/ethernet.txt2
-rw-r--r--Documentation/devicetree/bindings/net/socfpga-dwmac.txt2
-rw-r--r--Documentation/devicetree/bindings/net/stmmac.txt2
-rw-r--r--Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt2
-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt4
-rw-r--r--Documentation/devicetree/bindings/serial/efm32-uart.txt4
-rw-r--r--Documentation/devicetree/bindings/sound/ak4104.txt3
-rw-r--r--Documentation/devicetree/bindings/sound/alc5623.txt25
-rw-r--r--Documentation/devicetree/bindings/sound/cs42l56.txt63
-rw-r--r--Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt2
-rw-r--r--Documentation/devicetree/bindings/sound/fsl-sai.txt11
-rw-r--r--Documentation/devicetree/bindings/sound/max98090.txt6
-rw-r--r--Documentation/devicetree/bindings/sound/max98095.txt22
-rw-r--r--Documentation/devicetree/bindings/sound/nokia,rx51.txt27
-rw-r--r--Documentation/devicetree/bindings/sound/renesas,rsnd.txt1
-rw-r--r--Documentation/devicetree/bindings/sound/rt5640.txt13
-rw-r--r--Documentation/devicetree/bindings/sound/simple-card.txt91
-rw-r--r--Documentation/devicetree/bindings/sound/st,sta350.txt131
-rw-r--r--Documentation/devicetree/bindings/sound/tlv320aic31xx.txt6
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt18
-rw-r--r--Documentation/input/elantech.txt5
-rw-r--r--Documentation/ja_JP/HOWTO2
-rw-r--r--Documentation/ja_JP/stable_kernel_rules.txt6
-rw-r--r--Documentation/kernel-parameters.txt13
-rw-r--r--Documentation/magic-number.txt12
-rw-r--r--Documentation/networking/scaling.txt2
-rw-r--r--Documentation/serial/00-INDEX8
-rw-r--r--Documentation/serial/digiepca.txt98
-rw-r--r--Documentation/serial/riscom8.txt36
-rw-r--r--Documentation/serial/specialix.txt383
-rw-r--r--Documentation/serial/sx.txt294
-rw-r--r--Documentation/stable_kernel_rules.txt2
-rw-r--r--Documentation/vm/numa_memory_policy.txt5
-rw-r--r--Documentation/zh_CN/HOWTO2
-rw-r--r--Documentation/zh_CN/io_ordering.txt67
-rw-r--r--Documentation/zh_CN/magic-number.txt12
-rw-r--r--Documentation/zh_CN/stable_kernel_rules.txt2
-rw-r--r--MAINTAINERS31
-rw-r--r--Makefile2
-rw-r--r--arch/arc/include/asm/barrier.h37
-rw-r--r--arch/arc/kernel/entry.S8
-rw-r--r--arch/arm/Kconfig17
-rw-r--r--arch/arm/Kconfig.debug12
-rw-r--r--arch/arm/boot/dts/Makefile20
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi4
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts8
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts4
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi5
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi10
-rw-r--r--arch/arm/boot/dts/am4372.dtsi4
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi1
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi1
-rw-r--r--arch/arm/boot/dts/dra7.dtsi4
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi2
-rw-r--r--arch/arm/boot/dts/imx25.dtsi1
-rw-r--r--arch/arm/boot/dts/imx27-apf27.dts1
-rw-r--r--arch/arm/boot/dts/imx27.dtsi1
-rw-r--r--arch/arm/boot/dts/imx50.dtsi4
-rw-r--r--arch/arm/boot/dts/imx51.dtsi4
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts23
-rw-r--r--arch/arm/boot/dts/imx53-qsb-common.dtsi3
-rw-r--r--arch/arm/boot/dts/imx53-tx53-x03x.dts11
-rw-r--r--arch/arm/boot/dts/imx53.dtsi6
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts48
-rw-r--r--arch/arm/boot/dts/imx6q-gw5400-a.dts3
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi3
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi22
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi13
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts1
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi4
-rw-r--r--arch/arm/boot/dts/kirkwood-b3.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-cloudbox.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-dreamplug.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-laplug.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-ns2-common.dtsi4
-rw-r--r--arch/arm/boot/dts/kirkwood-nsa310.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-nsa310a.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a6.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a7.dts2
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm-ab.dts16
-rw-r--r--arch/arm/boot/dts/omap3-devkit8000.dts1
-rw-r--r--arch/arm/boot/dts/omap3-lilly-a83x.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4.dtsi4
-rw-r--r--arch/arm/boot/dts/omap5.dtsi10
-rw-r--r--arch/arm/boot/dts/r8a7740.dtsi1
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts4
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi2
-rw-r--r--arch/arm/boot/dts/r8a7791-koelsch.dts6
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi2
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi8
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi1
-rw-r--r--arch/arm/boot/dts/spear320-hmi.dts2
-rw-r--r--arch/arm/boot/dts/stih415-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi13
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts2
-rw-r--r--arch/arm/boot/dts/vf610.dtsi4
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi23
-rw-r--r--arch/arm/boot/dts/zynq-zc702.dts76
-rw-r--r--arch/arm/boot/dts/zynq-zc706.dts68
-rw-r--r--arch/arm/common/bL_switcher.c6
-rw-r--r--arch/arm/common/mcpm_entry.c5
-rw-r--r--arch/arm/configs/bcm_defconfig2
-rw-r--r--arch/arm/configs/omap2plus_defconfig2
-rw-r--r--arch/arm/configs/u300_defconfig4
-rw-r--r--arch/arm/configs/u8500_defconfig24
-rw-r--r--arch/arm/include/asm/cputype.h14
-rw-r--r--arch/arm/include/asm/div64.h2
-rw-r--r--arch/arm/include/asm/mcpm.h7
-rw-r--r--arch/arm/include/asm/tlb.h12
-rw-r--r--arch/arm/include/uapi/asm/unistd.h1
-rw-r--r--arch/arm/kernel/Makefile1
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/kernel/head.S2
-rw-r--r--arch/arm/kernel/iwmmxt.S8
-rw-r--r--arch/arm/kernel/machine_kexec.c7
-rw-r--r--arch/arm/kernel/pj4-cp0.c42
-rw-r--r--arch/arm/kernel/sys_oabi-compat.c6
-rw-r--r--arch/arm/kvm/Kconfig2
-rw-r--r--arch/arm/kvm/mmu.c15
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c29
-rw-r--r--arch/arm/mach-omap2/board-rx51-video.c2
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c4
-rw-r--r--arch/arm/mach-omap2/gpmc.c15
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h1
-rw-r--r--arch/arm/mach-rockchip/platsmp.c2
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c1
-rw-r--r--arch/arm/mach-shmobile/board-bockw.c63
-rw-r--r--arch/arm/mach-shmobile/board-koelsch-reference.c86
-rw-r--r--arch/arm/mach-shmobile/board-koelsch.c2
-rw-r--r--arch/arm/mach-shmobile/board-lager-reference.c79
-rw-r--r--arch/arm/mach-shmobile/board-lager.c33
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7778.c24
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c32
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c23
-rw-r--r--arch/arm/mach-shmobile/clock.c28
-rw-r--r--arch/arm/mach-shmobile/include/mach/clock.h16
-rw-r--r--arch/arm/mach-spear/headsmp.S2
-rw-r--r--arch/arm/mach-spear/platsmp.c2
-rw-r--r--arch/arm/mach-spear/time.c4
-rw-r--r--arch/arm/mach-tegra/Kconfig3
-rw-r--r--arch/arm/mach-vexpress/dcscb.c7
-rw-r--r--arch/arm/mach-vexpress/spc.c4
-rw-r--r--arch/arm/mm/Kconfig8
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/vfp/vfpdouble.c2
-rw-r--r--arch/arm/vfp/vfpsingle.c2
-rw-r--r--arch/arm64/Kconfig2
-rw-r--r--arch/arm64/boot/dts/apm-storm.dtsi3
-rw-r--r--arch/arm64/include/asm/mmu.h3
-rw-r--r--arch/arm64/include/asm/tlb.h6
-rw-r--r--arch/arm64/include/asm/unistd32.h3
-rw-r--r--arch/arm64/kernel/debug-monitors.c3
-rw-r--r--arch/arm64/kernel/early_printk.c6
-rw-r--r--arch/arm64/kernel/setup.c3
-rw-r--r--arch/arm64/kernel/time.c2
-rw-r--r--arch/arm64/mm/dma-mapping.c35
-rw-r--r--arch/arm64/mm/mmu.c3
-rw-r--r--arch/hexagon/include/asm/barrier.h37
-rw-r--r--arch/ia64/include/asm/tlb.h42
-rw-r--r--arch/ia64/kernel/head.S2
-rw-r--r--arch/ia64/kernel/ivt.S2
-rw-r--r--arch/ia64/kvm/vmm_ivt.S2
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c2
-rw-r--r--arch/mips/include/asm/mach-jz4740/dma.h2
-rw-r--r--arch/mips/jz4740/board-qi_lb60.c11
-rw-r--r--arch/mips/mm/cache.c4
-rw-r--r--arch/parisc/include/asm/shmparam.h5
-rw-r--r--arch/parisc/include/uapi/asm/Kbuild3
-rw-r--r--arch/parisc/include/uapi/asm/resource.h7
-rw-r--r--arch/parisc/kernel/cache.c3
-rw-r--r--arch/parisc/kernel/sys_parisc.c14
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/parisc/lib/memcpy.c2
-rw-r--r--arch/parisc/mm/fault.c2
-rw-r--r--arch/powerpc/boot/main.c8
-rw-r--r--arch/powerpc/boot/ops.h2
-rw-r--r--arch/powerpc/boot/ps3.c4
-rw-r--r--arch/powerpc/include/asm/opal.h42
-rw-r--r--arch/powerpc/include/uapi/asm/setup.h7
-rw-r--r--arch/powerpc/kernel/pci_64.c10
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c1
-rw-r--r--arch/powerpc/kernel/rtas_flash.c2
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S18
-rw-r--r--arch/powerpc/mm/hash_native_64.c38
-rw-r--r--arch/powerpc/mm/numa.c1
-rw-r--r--arch/powerpc/perf/hv-24x7.c35
-rw-r--r--arch/powerpc/perf/hv-gpci.c6
-rw-r--r--arch/powerpc/platforms/powernv/opal-dump.c94
-rw-r--r--arch/powerpc/platforms/powernv/opal-elog.c11
-rw-r--r--arch/powerpc/platforms/powernv/opal-flash.c118
-rw-r--r--arch/powerpc/platforms/powernv/opal-sysparam.c32
-rw-r--r--arch/powerpc/platforms/powernv/opal.c69
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c3
-rw-r--r--arch/powerpc/platforms/powernv/setup.c48
-rw-r--r--arch/powerpc/platforms/powernv/smp.c3
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c5
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c10
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c2
-rw-r--r--arch/s390/include/asm/ccwgroup.h2
-rw-r--r--arch/s390/include/asm/sigp.h19
-rw-r--r--arch/s390/include/asm/smp.h13
-rw-r--r--arch/s390/include/asm/tlb.h13
-rw-r--r--arch/s390/include/uapi/asm/unistd.h3
-rw-r--r--arch/s390/kernel/compat_wrapper.c3
-rw-r--r--arch/s390/kernel/dumpstack.c8
-rw-r--r--arch/s390/kernel/ptrace.c2
-rw-r--r--arch/s390/kernel/setup.c32
-rw-r--r--arch/s390/kernel/smp.c15
-rw-r--r--arch/s390/kernel/syscalls.S1
-rw-r--r--arch/s390/lib/uaccess.c5
-rw-r--r--arch/s390/mm/fault.c140
-rw-r--r--arch/s390/net/bpf_jit_comp.c1
-rw-r--r--arch/sh/include/asm/tlb.h8
-rw-r--r--arch/sparc/include/asm/pgtable_64.h83
-rw-r--r--arch/sparc/include/asm/tsb.h3
-rw-r--r--arch/sparc/kernel/head_64.S4
-rw-r--r--arch/sparc/kernel/ktlb.S2
-rw-r--r--arch/sparc/kernel/nmi.c21
-rw-r--r--arch/sparc/kernel/smp_64.c6
-rw-r--r--arch/sparc/kernel/sys32.S2
-rw-r--r--arch/sparc/kernel/unaligned_64.c12
-rw-r--r--arch/sparc/mm/fault_64.c82
-rw-r--r--arch/sparc/mm/gup.c2
-rw-r--r--arch/sparc/mm/init_64.c12
-rw-r--r--arch/sparc/mm/tlb.c26
-rw-r--r--arch/um/include/asm/tlb.h16
-rw-r--r--arch/um/include/shared/os.h1
-rw-r--r--arch/um/kernel/physmem.c1
-rw-r--r--arch/um/os-Linux/file.c6
-rw-r--r--arch/um/os-Linux/main.c1
-rw-r--r--arch/um/os-Linux/mem.c372
-rw-r--r--arch/x86/Makefile9
-rw-r--r--arch/x86/boot/Makefile4
-rw-r--r--arch/x86/boot/compressed/misc.c2
-rw-r--r--arch/x86/include/asm/hpet.h1
-rw-r--r--arch/x86/include/asm/kvm_host.h2
-rw-r--r--arch/x86/include/uapi/asm/msr-index.h2
-rw-r--r--arch/x86/kernel/acpi/sleep.c2
-rw-r--r--arch/x86/kernel/apic/io_apic.c7
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c18
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/threshold.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_rapl.c46
-rw-r--r--arch/x86/kernel/early-quirks.c18
-rw-r--r--arch/x86/kernel/head32.c2
-rw-r--r--arch/x86/kernel/head64.c2
-rw-r--r--arch/x86/kernel/hpet.c2
-rw-r--r--arch/x86/kernel/kprobes/core.c16
-rw-r--r--arch/x86/kernel/process_64.c2
-rw-r--r--arch/x86/kernel/reboot.c82
-rw-r--r--arch/x86/kernel/smp.c2
-rw-r--r--arch/x86/kernel/traps.c6
-rw-r--r--arch/x86/kernel/vsmp_64.c17
-rw-r--r--arch/x86/kernel/vsyscall_gtod.c2
-rw-r--r--arch/x86/kvm/cpuid.c2
-rw-r--r--arch/x86/kvm/cpuid.h8
-rw-r--r--arch/x86/kvm/mmu.c38
-rw-r--r--arch/x86/kvm/mmu.h44
-rw-r--r--arch/x86/kvm/paging_tmpl.h2
-rw-r--r--arch/x86/kvm/vmx.c64
-rw-r--r--arch/x86/kvm/x86.c12
-rw-r--r--arch/x86/lguest/boot.c4
-rw-r--r--arch/x86/lib/msr.c2
-rw-r--r--arch/x86/math-emu/errors.c16
-rw-r--r--arch/x86/platform/efi/early_printk.c83
-rw-r--r--arch/x86/platform/olpc/olpc-xo1-pm.c2
-rw-r--r--arch/x86/power/hibernate_64.c2
-rw-r--r--arch/x86/syscalls/Makefile2
-rw-r--r--arch/x86/syscalls/syscall_32.tbl1
-rw-r--r--arch/x86/tools/Makefile2
-rw-r--r--arch/x86/vdso/vdso-layout.lds.S19
-rw-r--r--arch/x86/xen/enlighten.c2
-rw-r--r--arch/x86/xen/irq.c6
-rw-r--r--arch/x86/xen/smp.c3
-rw-r--r--arch/x86/xen/spinlock.c5
-rw-r--r--arch/x86/xen/xen-asm_32.S25
-rw-r--r--arch/xtensa/Kconfig20
-rw-r--r--arch/xtensa/boot/dts/kc705.dts11
-rw-r--r--arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi28
-rw-r--r--arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi48
-rw-r--r--arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi32
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi37
-rw-r--r--arch/xtensa/include/asm/bootparam.h13
-rw-r--r--arch/xtensa/include/asm/fixmap.h58
-rw-r--r--arch/xtensa/include/asm/highmem.h45
-rw-r--r--arch/xtensa/include/asm/pgtable.h4
-rw-r--r--arch/xtensa/include/asm/sysmem.h38
-rw-r--r--arch/xtensa/include/asm/tlbflush.h11
-rw-r--r--arch/xtensa/kernel/setup.c46
-rw-r--r--arch/xtensa/kernel/smp.c15
-rw-r--r--arch/xtensa/kernel/xtensa_ksyms.c7
-rw-r--r--arch/xtensa/mm/Makefile1
-rw-r--r--arch/xtensa/mm/cache.c7
-rw-r--r--arch/xtensa/mm/highmem.c72
-rw-r--r--arch/xtensa/mm/init.c299
-rw-r--r--arch/xtensa/mm/mmu.c36
-rw-r--r--arch/xtensa/mm/tlb.c15
-rw-r--r--arch/xtensa/platforms/iss/Makefile3
-rw-r--r--arch/xtensa/platforms/xt2000/setup.c12
-rw-r--r--crypto/crypto_user.c2
-rw-r--r--drivers/Makefile4
-rw-r--r--drivers/acpi/acpi_processor.c7
-rw-r--r--drivers/acpi/acpica/exfield.c104
-rw-r--r--drivers/acpi/bus.c5
-rw-r--r--drivers/acpi/ec.c21
-rw-r--r--drivers/ata/Kconfig5
-rw-r--r--drivers/ata/ahci.c35
-rw-r--r--drivers/ata/ahci.h1
-rw-r--r--drivers/ata/libata-core.c27
-rw-r--r--drivers/ata/pata_arasan_cf.c7
-rw-r--r--drivers/ata/pata_at91.c11
-rw-r--r--drivers/ata/pata_samsung_cf.c10
-rw-r--r--drivers/base/core.c33
-rw-r--r--drivers/base/dd.c21
-rw-r--r--drivers/base/platform.c7
-rw-r--r--drivers/base/topology.c3
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-rw-r--r--sound/soc/codecs/lm4857.c4
-rw-r--r--sound/soc/codecs/max9768.c4
-rw-r--r--sound/soc/codecs/max98088.c12
-rw-r--r--sound/soc/codecs/max98090.c118
-rw-r--r--sound/soc/codecs/max98090.h2
-rw-r--r--sound/soc/codecs/max98095.c47
-rw-r--r--sound/soc/codecs/mc13783.c36
-rw-r--r--sound/soc/codecs/pcm1681.c4
-rw-r--r--sound/soc/codecs/pcm512x.c4
-rw-r--r--sound/soc/codecs/rl6231.c152
-rw-r--r--sound/soc/codecs/rl6231.h34
-rw-r--r--sound/soc/codecs/rt5631.c4
-rw-r--r--sound/soc/codecs/rt5640.c532
-rw-r--r--sound/soc/codecs/rt5640.h18
-rw-r--r--sound/soc/codecs/rt5645.c2378
-rw-r--r--sound/soc/codecs/rt5645.h2181
-rw-r--r--sound/soc/codecs/rt5651.c1818
-rw-r--r--sound/soc/codecs/rt5651.h2080
-rw-r--r--sound/soc/codecs/rt5677.c3498
-rw-r--r--sound/soc/codecs/rt5677.h1451
-rw-r--r--sound/soc/codecs/sgtl5000.c90
-rw-r--r--sound/soc/codecs/si476x.c14
-rw-r--r--sound/soc/codecs/sirf-audio-codec.c82
-rw-r--r--sound/soc/codecs/sirf-audio-codec.h50
-rw-r--r--sound/soc/codecs/sta32x.c4
-rw-r--r--sound/soc/codecs/sta350.c1311
-rw-r--r--sound/soc/codecs/sta350.h238
-rw-r--r--sound/soc/codecs/tas5086.c4
-rw-r--r--sound/soc/codecs/tlv320aic23-i2c.c1
-rw-r--r--sound/soc/codecs/tlv320aic23.c4
-rw-r--r--sound/soc/codecs/tlv320aic31xx.c3
-rw-r--r--sound/soc/codecs/tlv320aic3x.c11
-rw-r--r--sound/soc/codecs/tlv320dac33.c12
-rw-r--r--sound/soc/codecs/tpa6130a2.c1
-rw-r--r--sound/soc/codecs/twl4030.c10
-rw-r--r--sound/soc/codecs/twl6040.c8
-rw-r--r--sound/soc/codecs/wl1273.c12
-rw-r--r--sound/soc/codecs/wm2000.c8
-rw-r--r--sound/soc/codecs/wm2200.c4
-rw-r--r--sound/soc/codecs/wm5100.c4
-rw-r--r--sound/soc/codecs/wm5102.c26
-rw-r--r--sound/soc/codecs/wm5110.c35
-rw-r--r--sound/soc/codecs/wm8350.c14
-rw-r--r--sound/soc/codecs/wm8400.c12
-rw-r--r--sound/soc/codecs/wm8580.c2
-rw-r--r--sound/soc/codecs/wm8731.c11
-rw-r--r--sound/soc/codecs/wm8753.c4
-rw-r--r--sound/soc/codecs/wm8804.c11
-rw-r--r--sound/soc/codecs/wm8903.c4
-rw-r--r--sound/soc/codecs/wm8904.c14
-rw-r--r--sound/soc/codecs/wm8955.c13
-rw-r--r--sound/soc/codecs/wm8958-dsp2.c32
-rw-r--r--sound/soc/codecs/wm8960.c4
-rw-r--r--sound/soc/codecs/wm8962.c35
-rw-r--r--sound/soc/codecs/wm8962.h4
-rw-r--r--sound/soc/codecs/wm8983.c4
-rw-r--r--sound/soc/codecs/wm8985.c11
-rw-r--r--sound/soc/codecs/wm8988.c8
-rw-r--r--sound/soc/codecs/wm8990.c2
-rw-r--r--sound/soc/codecs/wm8991.c2
-rw-r--r--sound/soc/codecs/wm8994.c32
-rw-r--r--sound/soc/codecs/wm8995.c10
-rw-r--r--sound/soc/codecs/wm8996.c4
-rw-r--r--sound/soc/codecs/wm8997.c25
-rw-r--r--sound/soc/codecs/wm9081.c4
-rw-r--r--sound/soc/codecs/wm_adsp.c43
-rw-r--r--sound/soc/codecs/wm_hubs.c2
-rw-r--r--sound/soc/davinci/Kconfig10
-rw-r--r--sound/soc/davinci/davinci-evm.c9
-rw-r--r--sound/soc/davinci/davinci-i2s.c1
-rw-r--r--sound/soc/davinci/davinci-mcasp.c260
-rw-r--r--sound/soc/davinci/davinci-mcasp.h1
-rw-r--r--sound/soc/davinci/davinci-pcm.c8
-rw-r--r--sound/soc/davinci/davinci-pcm.h8
-rw-r--r--sound/soc/davinci/davinci-vcif.c1
-rw-r--r--sound/soc/fsl/Kconfig85
-rw-r--r--sound/soc/fsl/Makefile3
-rw-r--r--sound/soc/fsl/fsl_esai.c54
-rw-r--r--sound/soc/fsl/fsl_sai.c255
-rw-r--r--sound/soc/fsl/fsl_sai.h16
-rw-r--r--sound/soc/fsl/fsl_spdif.c186
-rw-r--r--sound/soc/fsl/fsl_spdif.h14
-rw-r--r--sound/soc/fsl/fsl_ssi.c1414
-rw-r--r--sound/soc/fsl/fsl_ssi.h112
-rw-r--r--sound/soc/fsl/fsl_ssi_dbg.c163
-rw-r--r--sound/soc/fsl/imx-audmux.c2
-rw-r--r--sound/soc/fsl/imx-pcm-dma.c1
-rw-r--r--sound/soc/generic/simple-card.c281
-rw-r--r--sound/soc/intel/Kconfig9
-rw-r--r--sound/soc/intel/Makefile4
-rw-r--r--sound/soc/intel/byt-max98090.c203
-rw-r--r--sound/soc/intel/byt-rt5640.c37
-rw-r--r--sound/soc/intel/haswell.c15
-rw-r--r--sound/soc/intel/sst-acpi.c2
-rw-r--r--sound/soc/intel/sst-baytrail-dsp.c16
-rw-r--r--sound/soc/intel/sst-baytrail-ipc.c140
-rw-r--r--sound/soc/intel/sst-baytrail-ipc.h7
-rw-r--r--sound/soc/intel/sst-baytrail-pcm.c163
-rw-r--r--sound/soc/intel/sst-dsp-priv.h5
-rw-r--r--sound/soc/intel/sst-dsp.c1
-rw-r--r--sound/soc/intel/sst-dsp.h1
-rw-r--r--sound/soc/intel/sst-firmware.c67
-rw-r--r--sound/soc/intel/sst-haswell-dsp.c4
-rw-r--r--sound/soc/intel/sst-haswell-ipc.c53
-rw-r--r--sound/soc/intel/sst-haswell-ipc.h4
-rw-r--r--sound/soc/intel/sst-haswell-pcm.c116
-rw-r--r--sound/soc/intel/sst-mfld-dsp.h8
-rw-r--r--sound/soc/intel/sst-mfld-platform-compress.c237
-rw-r--r--sound/soc/intel/sst-mfld-platform-pcm.c (renamed from sound/soc/intel/sst-mfld-platform.c)250
-rw-r--r--sound/soc/intel/sst-mfld-platform.h11
-rw-r--r--sound/soc/jz4740/Kconfig11
-rw-r--r--sound/soc/jz4740/Makefile2
-rw-r--r--sound/soc/jz4740/jz4740-i2s.c5
-rw-r--r--sound/soc/jz4740/qi_lb60.c84
-rw-r--r--sound/soc/kirkwood/kirkwood-t5325.c13
-rw-r--r--sound/soc/nuc900/Kconfig1
-rw-r--r--sound/soc/nuc900/nuc900-ac97.c1
-rw-r--r--sound/soc/omap/Kconfig4
-rw-r--r--sound/soc/omap/am3517evm.c2
-rw-r--r--sound/soc/omap/ams-delta.c68
-rw-r--r--sound/soc/omap/n810.c2
-rw-r--r--sound/soc/omap/omap-abe-twl6040.c13
-rw-r--r--sound/soc/omap/omap-dmic.c9
-rw-r--r--sound/soc/omap/omap-hdmi-card.c2
-rw-r--r--sound/soc/omap/omap-hdmi.c6
-rw-r--r--sound/soc/omap/omap-mcbsp.c25
-rw-r--r--sound/soc/omap/omap-mcbsp.h2
-rw-r--r--sound/soc/omap/omap-mcpdm.c16
-rw-r--r--sound/soc/omap/omap-pcm.c25
-rw-r--r--sound/soc/omap/omap-twl4030.c15
-rw-r--r--sound/soc/omap/omap3pandora.c35
-rw-r--r--sound/soc/omap/osk5912.c2
-rw-r--r--sound/soc/omap/rx51.c275
-rw-r--r--sound/soc/pxa/Kconfig2
-rw-r--r--sound/soc/pxa/brownstone.c7
-rw-r--r--sound/soc/pxa/palm27x.c8
-rw-r--r--sound/soc/pxa/poodle.c1
-rw-r--r--sound/soc/pxa/pxa-ssp.c3
-rw-r--r--sound/soc/pxa/pxa2xx-pcm.c2
-rw-r--r--sound/soc/pxa/ttc-dkb.c4
-rw-r--r--sound/soc/samsung/Kconfig2
-rw-r--r--sound/soc/samsung/h1940_uda1380.c5
-rw-r--r--sound/soc/samsung/rx1950_uda1380.c5
-rw-r--r--sound/soc/samsung/s3c24xx_simtec_hermes.c8
-rw-r--r--sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c8
-rw-r--r--sound/soc/samsung/smartq_wm8987.c2
-rw-r--r--sound/soc/samsung/smdk_wm8994.c12
-rw-r--r--sound/soc/sh/Kconfig2
-rw-r--r--sound/soc/sh/rcar/Makefile2
-rw-r--r--sound/soc/sh/rcar/adg.c57
-rw-r--r--sound/soc/sh/rcar/core.c255
-rw-r--r--sound/soc/sh/rcar/dvc.c289
-rw-r--r--sound/soc/sh/rcar/gen.c120
-rw-r--r--sound/soc/sh/rcar/rsnd.h78
-rw-r--r--sound/soc/sh/rcar/src.c236
-rw-r--r--sound/soc/sh/rcar/ssi.c117
-rw-r--r--sound/soc/sirf/sirf-audio-port.c107
-rw-r--r--sound/soc/sirf/sirf-audio-port.h62
-rw-r--r--sound/soc/soc-cache.c5
-rw-r--r--sound/soc/soc-compress.c6
-rw-r--r--sound/soc/soc-core.c991
-rw-r--r--sound/soc/soc-dapm.c274
-rw-r--r--sound/soc/soc-devres.c35
-rw-r--r--sound/soc/soc-io.c296
-rw-r--r--sound/soc/soc-jack.c88
-rw-r--r--sound/soc/soc-pcm.c29
-rw-r--r--sound/soc/tegra/tegra_wm9712.c4
-rw-r--r--sound/soc/ux500/mop500_ab8500.c2
-rw-r--r--sound/usb/card.c12
-rw-r--r--sound/usb/card.h1
-rw-r--r--sound/usb/endpoint.c15
-rw-r--r--sound/usb/pcm.c5
-rw-r--r--sound/usb/usbaudio.h1
-rw-r--r--tools/hv/hv_fcopy_daemon.c4
-rw-r--r--tools/lib/api/fs/debugfs.c4
-rw-r--r--tools/lib/lockdep/Makefile15
-rw-r--r--tools/lib/lockdep/uinclude/linux/lockdep.h3
-rw-r--r--tools/lib/traceevent/event-parse.c110
-rw-r--r--tools/lib/traceevent/event-parse.h4
-rw-r--r--tools/net/bpf_dbg.c2
-rw-r--r--tools/perf/Documentation/perf-bench.txt22
-rw-r--r--tools/perf/Documentation/perf-top.txt1
-rw-r--r--tools/perf/Makefile.perf6
-rw-r--r--tools/perf/arch/x86/tests/dwarf-unwind.c3
-rw-r--r--tools/perf/arch/x86/tests/regs_load.S8
-rw-r--r--tools/perf/bench/numa.c4
-rw-r--r--tools/perf/builtin-kvm.c1
-rw-r--r--tools/perf/builtin-record.c2
-rw-r--r--tools/perf/builtin-stat.c11
-rw-r--r--tools/perf/config/Makefile53
-rw-r--r--tools/perf/tests/code-reading.c1
-rw-r--r--tools/perf/tests/make2
-rw-r--r--tools/perf/util/data.c9
-rw-r--r--tools/perf/util/machine.c16
-rw-r--r--tools/perf/util/probe-finder.c15
-rw-r--r--tools/perf/util/symbol-elf.c2
-rw-r--r--tools/power/acpi/Makefile11
-rw-r--r--virt/kvm/arm/vgic.c15
-rw-r--r--virt/kvm/assigned-dev.c3
-rw-r--r--virt/kvm/async_pf.c8
-rw-r--r--virt/kvm/ioapic.c25
1853 files changed, 43091 insertions, 36892 deletions
diff --git a/.mailmap b/.mailmap
index 658003aa9446..df1baba43a64 100644
--- a/.mailmap
+++ b/.mailmap
@@ -99,6 +99,7 @@ Sachin P Sant <ssant@in.ibm.com>
99Sam Ravnborg <sam@mars.ravnborg.org> 99Sam Ravnborg <sam@mars.ravnborg.org>
100Sascha Hauer <s.hauer@pengutronix.de> 100Sascha Hauer <s.hauer@pengutronix.de>
101S.Çağlar Onur <caglar@pardus.org.tr> 101S.Çağlar Onur <caglar@pardus.org.tr>
102Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
102Simon Kelley <simon@thekelleys.org.uk> 103Simon Kelley <simon@thekelleys.org.uk>
103Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr> 104Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
104Stephen Hemminger <shemminger@osdl.org> 105Stephen Hemminger <shemminger@osdl.org>
diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl
index f5170082bdb3..cc63f30de166 100644
--- a/Documentation/DocBook/device-drivers.tmpl
+++ b/Documentation/DocBook/device-drivers.tmpl
@@ -276,7 +276,7 @@ X!Isound/sound_firmware.c
276 </para> 276 </para>
277 277
278 <sect1><title>Frame Buffer Memory</title> 278 <sect1><title>Frame Buffer Memory</title>
279!Edrivers/video/fbmem.c 279!Edrivers/video/fbdev/core/fbmem.c
280 </sect1> 280 </sect1>
281<!-- 281<!--
282 <sect1><title>Frame Buffer Console</title> 282 <sect1><title>Frame Buffer Console</title>
@@ -284,7 +284,7 @@ X!Edrivers/video/console/fbcon.c
284 </sect1> 284 </sect1>
285--> 285-->
286 <sect1><title>Frame Buffer Colormap</title> 286 <sect1><title>Frame Buffer Colormap</title>
287!Edrivers/video/fbcmap.c 287!Edrivers/video/fbdev/core/fbcmap.c
288 </sect1> 288 </sect1>
289<!-- FIXME: 289<!-- FIXME:
290 drivers/video/fbgen.c has no docs, which stuffs up the sgml. Comment 290 drivers/video/fbgen.c has no docs, which stuffs up the sgml. Comment
@@ -294,11 +294,11 @@ X!Idrivers/video/fbgen.c
294 </sect1> 294 </sect1>
295KAO --> 295KAO -->
296 <sect1><title>Frame Buffer Video Mode Database</title> 296 <sect1><title>Frame Buffer Video Mode Database</title>
297!Idrivers/video/modedb.c 297!Idrivers/video/fbdev/core/modedb.c
298!Edrivers/video/modedb.c 298!Edrivers/video/fbdev/core/modedb.c
299 </sect1> 299 </sect1>
300 <sect1><title>Frame Buffer Macintosh Video Mode Database</title> 300 <sect1><title>Frame Buffer Macintosh Video Mode Database</title>
301!Edrivers/video/macmodes.c 301!Edrivers/video/fbdev/macmodes.c
302 </sect1> 302 </sect1>
303 <sect1><title>Frame Buffer Fonts</title> 303 <sect1><title>Frame Buffer Fonts</title>
304 <para> 304 <para>
diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index 702c4474919c..677a02553ec0 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -2287,6 +2287,11 @@ void intel_crt_init(struct drm_device *dev)
2287!Edrivers/gpu/drm/drm_crtc_helper.c 2287!Edrivers/gpu/drm/drm_crtc_helper.c
2288 </sect2> 2288 </sect2>
2289 <sect2> 2289 <sect2>
2290 <title>Output Probing Helper Functions Reference</title>
2291!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
2292!Edrivers/gpu/drm/drm_probe_helper.c
2293 </sect2>
2294 <sect2>
2290 <title>fbdev Helper Functions Reference</title> 2295 <title>fbdev Helper Functions Reference</title>
2291!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers 2296!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
2292!Edrivers/gpu/drm/drm_fb_helper.c 2297!Edrivers/gpu/drm/drm_fb_helper.c
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index 06fc7602593a..37b2cafa4e52 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -19,6 +19,9 @@ to deliver its interrupts via SPIs.
19 19
20- clock-frequency : The frequency of the main counter, in Hz. Optional. 20- clock-frequency : The frequency of the main counter, in Hz. Optional.
21 21
22- always-on : a boolean property. If present, the timer is powered through an
23 always-on power domain, therefore it never loses context.
24
22Example: 25Example:
23 26
24 timer { 27 timer {
diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
new file mode 100644
index 000000000000..925ecbf6e7b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
@@ -0,0 +1,97 @@
1Marvell Kirkwood SoC Family Device Tree Bindings
2------------------------------------------------
3
4Boards with a SoC of the Marvell Kirkwook family, eg 88f6281
5
6* Required root node properties:
7compatible: must contain "marvell,kirkwood"
8
9In addition, the above compatible shall be extended with the specific
10SoC. Currently known SoC compatibles are:
11
12"marvell,kirkwood-88f6192"
13"marvell,kirkwood-88f6281"
14"marvell,kirkwood-88f6282"
15"marvell,kirkwood-88f6283"
16"marvell,kirkwood-88f6702"
17"marvell,kirkwood-98DX4122"
18
19And in addition, the compatible shall be extended with the specific
20board. Currently known boards are:
21
22"buffalo,lschlv2"
23"buffalo,lsxhl"
24"buffalo,lsxl"
25"dlink,dns-320"
26"dlink,dns-320-a1"
27"dlink,dns-325"
28"dlink,dns-325-a1"
29"dlink,dns-kirkwood"
30"excito,b3"
31"globalscale,dreamplug-003-ds2001"
32"globalscale,guruplug"
33"globalscale,guruplug-server-plus"
34"globalscale,sheevaplug"
35"globalscale,sheevaplug"
36"globalscale,sheevaplug-esata"
37"globalscale,sheevaplug-esata-rev13"
38"iom,iconnect"
39"iom,iconnect-1.1"
40"iom,ix2-200"
41"keymile,km_kirkwood"
42"lacie,cloudbox"
43"lacie,inetspace_v2"
44"lacie,laplug"
45"lacie,netspace_lite_v2"
46"lacie,netspace_max_v2"
47"lacie,netspace_mini_v2"
48"lacie,netspace_v2"
49"marvell,db-88f6281-bp"
50"marvell,db-88f6282-bp"
51"marvell,mv88f6281gtw-ge"
52"marvell,rd88f6281"
53"marvell,rd88f6281"
54"marvell,rd88f6281-a0"
55"marvell,rd88f6281-a1"
56"mpl,cec4"
57"mpl,cec4-10"
58"netgear,readynas"
59"netgear,readynas"
60"netgear,readynas-duo-v2"
61"netgear,readynas-nv+-v2"
62"plathome,openblocks-a6"
63"plathome,openblocks-a7"
64"raidsonic,ib-nas6210"
65"raidsonic,ib-nas6210-b"
66"raidsonic,ib-nas6220"
67"raidsonic,ib-nas6220-b"
68"raidsonic,ib-nas62x0"
69"seagate,dockstar"
70"seagate,goflexnet"
71"synology,ds109"
72"synology,ds110jv10"
73"synology,ds110jv20"
74"synology,ds110jv30"
75"synology,ds111"
76"synology,ds209"
77"synology,ds210jv10"
78"synology,ds210jv20"
79"synology,ds212"
80"synology,ds212jv10"
81"synology,ds212jv20"
82"synology,ds212pv10"
83"synology,ds409"
84"synology,ds409slim"
85"synology,ds410j"
86"synology,ds411"
87"synology,ds411j"
88"synology,ds411slim"
89"synology,ds413jv10"
90"synology,rs212"
91"synology,rs409"
92"synology,rs411"
93"synology,rs812"
94"usi,topkick"
95"usi,topkick-1281P2"
96"zyxel,nsa310"
97"zyxel,nsa310a"
diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt
index 7bcfbf59810e..a668f0e7d001 100644
--- a/Documentation/devicetree/bindings/ata/apm-xgene.txt
+++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt
@@ -24,6 +24,7 @@ Required properties:
24 * "sata-phy" for the SATA 6.0Gbps PHY 24 * "sata-phy" for the SATA 6.0Gbps PHY
25 25
26Optional properties: 26Optional properties:
27- dma-coherent : Present if dma operations are coherent
27- status : Shall be "ok" if enabled or "disabled" if disabled. 28- status : Shall be "ok" if enabled or "disabled" if disabled.
28 Default is "ok". 29 Default is "ok".
29 30
@@ -55,6 +56,7 @@ Example:
55 <0x0 0x1f22e000 0x0 0x1000>, 56 <0x0 0x1f22e000 0x0 0x1000>,
56 <0x0 0x1f227000 0x0 0x1000>; 57 <0x0 0x1f227000 0x0 0x1000>;
57 interrupts = <0x0 0x87 0x4>; 58 interrupts = <0x0 0x87 0x4>;
59 dma-coherent;
58 status = "ok"; 60 status = "ok";
59 clocks = <&sataclk 0>; 61 clocks = <&sataclk 0>;
60 phys = <&phy2 0>; 62 phys = <&phy2 0>;
@@ -69,6 +71,7 @@ Example:
69 <0x0 0x1f23e000 0x0 0x1000>, 71 <0x0 0x1f23e000 0x0 0x1000>,
70 <0x0 0x1f237000 0x0 0x1000>; 72 <0x0 0x1f237000 0x0 0x1000>;
71 interrupts = <0x0 0x88 0x4>; 73 interrupts = <0x0 0x88 0x4>;
74 dma-coherent;
72 status = "ok"; 75 status = "ok";
73 clocks = <&sataclk 0>; 76 clocks = <&sataclk 0>;
74 phys = <&phy3 0>; 77 phys = <&phy3 0>;
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index 71724d026ffa..bef86e57c388 100644
--- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
+++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
@@ -13,8 +13,22 @@ ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert an
13ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems 13ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
14adi,adt7461 +/-1C TDM Extended Temp Range I.C 14adi,adt7461 +/-1C TDM Extended Temp Range I.C
15adt7461 +/-1C TDM Extended Temp Range I.C 15adt7461 +/-1C TDM Extended Temp Range I.C
16adi,adt7473 +/-1C TDM Extended Temp Range I.C
17adi,adt7475 +/-1C TDM Extended Temp Range I.C
18adi,adt7476 +/-1C TDM Extended Temp Range I.C
19adi,adt7490 +/-1C TDM Extended Temp Range I.C
16at,24c08 i2c serial eeprom (24cxx) 20at,24c08 i2c serial eeprom (24cxx)
21atmel,24c00 i2c serial eeprom (24cxx)
22atmel,24c01 i2c serial eeprom (24cxx)
17atmel,24c02 i2c serial eeprom (24cxx) 23atmel,24c02 i2c serial eeprom (24cxx)
24atmel,24c04 i2c serial eeprom (24cxx)
25atmel,24c16 i2c serial eeprom (24cxx)
26atmel,24c32 i2c serial eeprom (24cxx)
27atmel,24c64 i2c serial eeprom (24cxx)
28atmel,24c128 i2c serial eeprom (24cxx)
29atmel,24c256 i2c serial eeprom (24cxx)
30atmel,24c512 i2c serial eeprom (24cxx)
31atmel,24c1024 i2c serial eeprom (24cxx)
18atmel,at97sc3204t i2c trusted platform module (TPM) 32atmel,at97sc3204t i2c trusted platform module (TPM)
19capella,cm32181 CM32181: Ambient Light Sensor 33capella,cm32181 CM32181: Ambient Light Sensor
20catalyst,24c32 i2c serial eeprom 34catalyst,24c32 i2c serial eeprom
@@ -46,8 +60,10 @@ maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
46maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs 60maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
47maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface 61maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
48mc,rv3029c2 Real Time Clock Module with I2C-Bus 62mc,rv3029c2 Real Time Clock Module with I2C-Bus
63national,lm63 Temperature sensor with integrated fan control
49national,lm75 I2C TEMP SENSOR 64national,lm75 I2C TEMP SENSOR
50national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor 65national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
66national,lm85 Temperature sensor with integrated fan control
51national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface 67national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
52nuvoton,npct501 i2c trusted platform module (TPM) 68nuvoton,npct501 i2c trusted platform module (TPM)
53nxp,pca9556 Octal SMBus and I2C registered interface 69nxp,pca9556 Octal SMBus and I2C registered interface
diff --git a/Documentation/devicetree/bindings/mfd/mc13xxx.txt b/Documentation/devicetree/bindings/mfd/mc13xxx.txt
index 1413f39912d3..8aba48821a85 100644
--- a/Documentation/devicetree/bindings/mfd/mc13xxx.txt
+++ b/Documentation/devicetree/bindings/mfd/mc13xxx.txt
@@ -10,6 +10,9 @@ Optional properties:
10- fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used 10- fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
11 11
12Sub-nodes: 12Sub-nodes:
13- codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
13- leds : Contain the led nodes and initial register values in property 16- leds : Contain the led nodes and initial register values in property
14 "led-control". Number of register depends of used IC, for MC13783 is 6, 17 "led-control". Number of register depends of used IC, for MC13783 is 6,
15 for MC13892 is 4, for MC34708 is 1. See datasheet for bits definitions of 18 for MC13892 is 4, for MC34708 is 1. See datasheet for bits definitions of
diff --git a/Documentation/devicetree/bindings/net/arc_emac.txt b/Documentation/devicetree/bindings/net/arc_emac.txt
index 7fbb027218a1..a1d71eb43b20 100644
--- a/Documentation/devicetree/bindings/net/arc_emac.txt
+++ b/Documentation/devicetree/bindings/net/arc_emac.txt
@@ -4,11 +4,15 @@ Required properties:
4- compatible: Should be "snps,arc-emac" 4- compatible: Should be "snps,arc-emac"
5- reg: Address and length of the register set for the device 5- reg: Address and length of the register set for the device
6- interrupts: Should contain the EMAC interrupts 6- interrupts: Should contain the EMAC interrupts
7- clock-frequency: CPU frequency. It is needed to calculate and set polling
8period of EMAC.
9- max-speed: see ethernet.txt file in the same directory. 7- max-speed: see ethernet.txt file in the same directory.
10- phy: see ethernet.txt file in the same directory. 8- phy: see ethernet.txt file in the same directory.
11 9
10Clock handling:
11The clock frequency is needed to calculate and set polling period of EMAC.
12It must be provided by one of:
13- clock-frequency: CPU frequency.
14- clocks: reference to the clock supplying the EMAC.
15
12Child nodes of the driver are the individual PHY devices connected to the 16Child nodes of the driver are the individual PHY devices connected to the
13MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus. 17MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
14 18
@@ -19,7 +23,11 @@ Examples:
19 reg = <0xc0fc2000 0x3c>; 23 reg = <0xc0fc2000 0x3c>;
20 interrupts = <6>; 24 interrupts = <6>;
21 mac-address = [ 00 11 22 33 44 55 ]; 25 mac-address = [ 00 11 22 33 44 55 ];
26
22 clock-frequency = <80000000>; 27 clock-frequency = <80000000>;
28 /* or */
29 clocks = <&emac_clock>;
30
23 max-speed = <100>; 31 max-speed = <100>;
24 phy = <&phy0>; 32 phy = <&phy0>;
25 33
diff --git a/Documentation/devicetree/bindings/net/ethernet.txt b/Documentation/devicetree/bindings/net/ethernet.txt
index 9ecd43d8792c..3fc360523bc9 100644
--- a/Documentation/devicetree/bindings/net/ethernet.txt
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -10,7 +10,7 @@ The following properties are common to the Ethernet controllers:
10- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than 10- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
11 the maximum frame size (there's contradiction in ePAPR). 11 the maximum frame size (there's contradiction in ePAPR).
12- phy-mode: string, operation mode of the PHY interface; supported values are 12- phy-mode: string, operation mode of the PHY interface; supported values are
13 "mii", "gmii", "sgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id", 13 "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
14 "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto 14 "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
15 standard property; 15 standard property;
16- phy-connection-type: the same as "phy-mode" property but described in ePAPR; 16- phy-connection-type: the same as "phy-mode" property but described in ePAPR;
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
index 636f0ac4e223..2a60cd3e8d5d 100644
--- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
@@ -23,5 +23,5 @@ gmac0: ethernet@ff700000 {
23 interrupt-names = "macirq"; 23 interrupt-names = "macirq";
24 mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ 24 mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
25 clocks = <&emac_0_clk>; 25 clocks = <&emac_0_clk>;
26 clocks-names = "stmmaceth"; 26 clock-names = "stmmaceth";
27}; 27};
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index 80c1fb8bfbb8..a2acd2b26baf 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -33,7 +33,7 @@ Optional properties:
33- max-frame-size: See ethernet.txt file in the same directory 33- max-frame-size: See ethernet.txt file in the same directory
34- clocks: If present, the first clock should be the GMAC main clock, 34- clocks: If present, the first clock should be the GMAC main clock,
35 further clocks may be specified in derived bindings. 35 further clocks may be specified in derived bindings.
36- clocks-names: One name for each entry in the clocks property, the 36- clock-names: One name for each entry in the clocks property, the
37 first one should be "stmmaceth". 37 first one should be "stmmaceth".
38 38
39Examples: 39Examples:
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
index c119debe6bab..67a5db95f189 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
@@ -119,7 +119,7 @@ Optional Properties (for HDMI pins):
119Example: 119Example:
120// pin controller node 120// pin controller node
121pinctrl@35004800 { 121pinctrl@35004800 {
122 compatible = "brcmbcm11351-pinctrl"; 122 compatible = "brcm,bcm11351-pinctrl";
123 reg = <0x35004800 0x430>; 123 reg = <0x35004800 0x430>;
124 124
125 // pin configuration node 125 // pin configuration node
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
index 4bd5be0e5e7d..26bcb18f4e60 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
@@ -83,7 +83,7 @@ Example:
83 reg = <0xfe61f080 0x4>; 83 reg = <0xfe61f080 0x4>;
84 reg-names = "irqmux"; 84 reg-names = "irqmux";
85 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 85 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
86 interrupts-names = "irqmux"; 86 interrupt-names = "irqmux";
87 ranges = <0 0xfe610000 0x5000>; 87 ranges = <0 0xfe610000 0x5000>;
88 88
89 PIO0: gpio@fe610000 { 89 PIO0: gpio@fe610000 {
@@ -165,7 +165,7 @@ sdhci0:sdhci@fe810000{
165 interrupt-parent = <&PIO3>; 165 interrupt-parent = <&PIO3>;
166 #interrupt-cells = <2>; 166 #interrupt-cells = <2>;
167 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */ 167 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
168 interrupts-names = "card-detect"; 168 interrupt-names = "card-detect";
169 pinctrl-names = "default"; 169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_mmc>; 170 pinctrl-0 = <&pinctrl_mmc>;
171}; 171};
diff --git a/Documentation/devicetree/bindings/serial/efm32-uart.txt b/Documentation/devicetree/bindings/serial/efm32-uart.txt
index 1984bdfbd545..3ca01336b837 100644
--- a/Documentation/devicetree/bindings/serial/efm32-uart.txt
+++ b/Documentation/devicetree/bindings/serial/efm32-uart.txt
@@ -1,7 +1,7 @@
1* Energymicro efm32 UART 1* Energymicro efm32 UART
2 2
3Required properties: 3Required properties:
4- compatible : Should be "efm32,uart" 4- compatible : Should be "energymicro,efm32-uart"
5- reg : Address and length of the register set 5- reg : Address and length of the register set
6- interrupts : Should contain uart interrupt 6- interrupts : Should contain uart interrupt
7 7
@@ -13,7 +13,7 @@ Optional properties:
13Example: 13Example:
14 14
15uart@0x4000c400 { 15uart@0x4000c400 {
16 compatible = "efm32,uart"; 16 compatible = "energymicro,efm32-uart";
17 reg = <0x4000c400 0x400>; 17 reg = <0x4000c400 0x400>;
18 interrupts = <15>; 18 interrupts = <15>;
19 efm32,location = <0>; 19 efm32,location = <0>;
diff --git a/Documentation/devicetree/bindings/sound/ak4104.txt b/Documentation/devicetree/bindings/sound/ak4104.txt
index b902ee39cf89..deca5e18f304 100644
--- a/Documentation/devicetree/bindings/sound/ak4104.txt
+++ b/Documentation/devicetree/bindings/sound/ak4104.txt
@@ -8,6 +8,8 @@ Required properties:
8 8
9 - reg : The chip select number on the SPI bus 9 - reg : The chip select number on the SPI bus
10 10
11 - vdd-supply : A regulator node, providing 2.7V - 3.6V
12
11Optional properties: 13Optional properties:
12 14
13 - reset-gpio : a GPIO spec for the reset pin. If specified, it will be 15 - reset-gpio : a GPIO spec for the reset pin. If specified, it will be
@@ -19,4 +21,5 @@ spdif: ak4104@0 {
19 compatible = "asahi-kasei,ak4104"; 21 compatible = "asahi-kasei,ak4104";
20 reg = <0>; 22 reg = <0>;
21 spi-max-frequency = <5000000>; 23 spi-max-frequency = <5000000>;
24 vdd-supply = <&vdd_3v3_reg>;
22}; 25};
diff --git a/Documentation/devicetree/bindings/sound/alc5623.txt b/Documentation/devicetree/bindings/sound/alc5623.txt
new file mode 100644
index 000000000000..26c86c98d671
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/alc5623.txt
@@ -0,0 +1,25 @@
1ALC5621/ALC5622/ALC5623 audio Codec
2
3Required properties:
4
5 - compatible: "realtek,alc5623"
6 - reg: the I2C address of the device.
7
8Optional properties:
9
10 - add-ctrl: Default register value for Reg-40h, Additional Control
11 Register. If absent or has the value of 0, the
12 register is untouched.
13
14 - jack-det-ctrl: Default register value for Reg-5Ah, Jack Detect
15 Control Register. If absent or has value 0, the
16 register is untouched.
17
18Example:
19
20 alc5621: alc5621@1a {
21 compatible = "alc5621";
22 reg = <0x1a>;
23 add-ctrl = <0x3700>;
24 jack-det-ctrl = <0x4810>;
25 };
diff --git a/Documentation/devicetree/bindings/sound/cs42l56.txt b/Documentation/devicetree/bindings/sound/cs42l56.txt
new file mode 100644
index 000000000000..4feb0eb27ea4
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/cs42l56.txt
@@ -0,0 +1,63 @@
1CS42L52 audio CODEC
2
3Required properties:
4
5 - compatible : "cirrus,cs42l56"
6
7 - reg : the I2C address of the device for I2C
8
9 - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
10 as covered in Documentation/devicetree/bindings/regulator/regulator.txt.
11
12Optional properties:
13
14 - cirrus,gpio-nreset : GPIO controller's phandle and the number
15 of the GPIO used to reset the codec.
16
17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
18 Allowable values of 0x00 through 0x0F. These are raw values written to the
19 register, not the actual frequency. The frequency is determined by the following.
20 Frequency = MCLK / 4 * (N+2)
21 N = chgfreq_val
22 MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
23
24 - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25 as a pseudo-differential input referenced to AIN1REF/AIN3A.
26
27 - cirrus,ain2a-ref-cfg, ain2b-ref-cfg : boolean, If present, AIN2A or AIN2B are configured
28 as a pseudo-differential input referenced to AIN2REF/AIN3B.
29
30 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin.
31 0 = 0.5 x VA
32 1 = 0.6 x VA
33 2 = 0.7 x VA
34 3 = 0.8 x VA
35 4 = 0.83 x VA
36 5 = 0.91 x VA
37
38 - cirrus,adaptive-pwr-cfg : Configures how the power to the Headphone and Lineout
39 Amplifiers adapt to the output signal levels.
40 0 = Adapt to Volume Mode. Voltage level determined by the sum of the relevant volume settings.
41 1 = Fixed - Headphone and Line Amp supply = + or - VCP/2.
42 2 = Fixed - Headphone and Line Amp supply = + or - VCP.
43 3 = Adapted to Signal; Voltage level is dynamically determined by the output signal.
44
45 - cirrus,hpf-left-freq, hpf-right-freq : Sets the corner frequency (-3dB point) for the internal High-Pass
46 Filter.
47 0 = 1.8Hz
48 1 = 119Hz
49 2 = 236Hz
50 3 = 464Hz
51
52
53Example:
54
55codec: codec@4b {
56 compatible = "cirrus,cs42l56";
57 reg = <0x4b>;
58 gpio-reset = <&gpio 10 0>;
59 cirrus,chgfreq-divisor = <0x05>;
60 cirrus.ain1_ref_cfg;
61 cirrus,micbias-lvl = <5>;
62 VA-supply = <&reg_audio>;
63};
diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
index 569b26c4a81e..60ca07996458 100644
--- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
+++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
@@ -47,7 +47,7 @@ mcasp0: mcasp0@1d00000 {
47 reg = <0x100000 0x3000>; 47 reg = <0x100000 0x3000>;
48 reg-names "mpu"; 48 reg-names "mpu";
49 interrupts = <82>, <83>; 49 interrupts = <82>, <83>;
50 interrupts-names = "tx", "rx"; 50 interrupt-names = "tx", "rx";
51 op-mode = <0>; /* MCASP_IIS_MODE */ 51 op-mode = <0>; /* MCASP_IIS_MODE */
52 tdm-slots = <2>; 52 tdm-slots = <2>;
53 serial-dir = < 53 serial-dir = <
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
index 98611a6761c0..0f4e23828190 100644
--- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
@@ -7,10 +7,11 @@ codec/DSP interfaces.
7 7
8 8
9Required properties: 9Required properties:
10- compatible: Compatible list, contains "fsl,vf610-sai". 10- compatible: Compatible list, contains "fsl,vf610-sai" or "fsl,imx6sx-sai".
11- reg: Offset and length of the register set for the device. 11- reg: Offset and length of the register set for the device.
12- clocks: Must contain an entry for each entry in clock-names. 12- clocks: Must contain an entry for each entry in clock-names.
13- clock-names : Must include the "sai" entry. 13- clock-names : Must include the "bus" for register access and "mclk1" "mclk2"
14 "mclk3" for bit clock and frame clock providing.
14- dmas : Generic dma devicetree binding as described in 15- dmas : Generic dma devicetree binding as described in
15 Documentation/devicetree/bindings/dma/dma.txt. 16 Documentation/devicetree/bindings/dma/dma.txt.
16- dma-names : Two dmas have to be defined, "tx" and "rx". 17- dma-names : Two dmas have to be defined, "tx" and "rx".
@@ -30,8 +31,10 @@ sai2: sai@40031000 {
30 reg = <0x40031000 0x1000>; 31 reg = <0x40031000 0x1000>;
31 pinctrl-names = "default"; 32 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_sai2_1>; 33 pinctrl-0 = <&pinctrl_sai2_1>;
33 clocks = <&clks VF610_CLK_SAI2>; 34 clocks = <&clks VF610_CLK_PLATFORM_BUS>,
34 clock-names = "sai"; 35 <&clks VF610_CLK_SAI2>,
36 <&clks 0>, <&clks 0>;
37 clock-names = "bus", "mclk1", "mclk2", "mclk3";
35 dma-names = "tx", "rx"; 38 dma-names = "tx", "rx";
36 dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, 39 dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>,
37 <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; 40 <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>;
diff --git a/Documentation/devicetree/bindings/sound/max98090.txt b/Documentation/devicetree/bindings/sound/max98090.txt
index e4c8b36dcf89..a5e63fa47dc5 100644
--- a/Documentation/devicetree/bindings/sound/max98090.txt
+++ b/Documentation/devicetree/bindings/sound/max98090.txt
@@ -10,6 +10,12 @@ Required properties:
10 10
11- interrupts : The CODEC's interrupt output. 11- interrupts : The CODEC's interrupt output.
12 12
13Optional properties:
14
15- clocks: The phandle of the master clock to the CODEC
16
17- clock-names: Should be "mclk"
18
13Pins on the device (for linking into audio routes): 19Pins on the device (for linking into audio routes):
14 20
15 * MIC1 21 * MIC1
diff --git a/Documentation/devicetree/bindings/sound/max98095.txt b/Documentation/devicetree/bindings/sound/max98095.txt
new file mode 100644
index 000000000000..318a4c82f17f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/max98095.txt
@@ -0,0 +1,22 @@
1MAX98095 audio CODEC
2
3This device supports I2C only.
4
5Required properties:
6
7- compatible : "maxim,max98095".
8
9- reg : The I2C address of the device.
10
11Optional properties:
12
13- clocks: The phandle of the master clock to the CODEC
14
15- clock-names: Should be "mclk"
16
17Example:
18
19max98095: codec@11 {
20 compatible = "maxim,max98095";
21 reg = <0x11>;
22};
diff --git a/Documentation/devicetree/bindings/sound/nokia,rx51.txt b/Documentation/devicetree/bindings/sound/nokia,rx51.txt
new file mode 100644
index 000000000000..72f93d996273
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nokia,rx51.txt
@@ -0,0 +1,27 @@
1* Nokia N900 audio setup
2
3Required properties:
4- compatible: Should contain "nokia,n900-audio"
5- nokia,cpu-dai: phandle for the McBSP node
6- nokia,audio-codec: phandles for the main TLV320AIC3X node and the
7 auxiliary TLV320AIC3X node (in this order)
8- nokia,headphone-amplifier: phandle for the TPA6130A2 node
9- tvout-selection-gpios: GPIO for tvout selection
10- jack-detection-gpios: GPIO for jack detection
11- eci-switch-gpios: GPIO for ECI (Enhancement Control Interface) switch
12- speaker-amplifier-gpios: GPIO for speaker amplifier
13
14Example:
15
16sound {
17 compatible = "nokia,n900-audio";
18
19 nokia,cpu-dai = <&mcbsp2>;
20 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
21 nokia,headphone-amplifier = <&tpa6130a2>;
22
23 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
24 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
25 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
26 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
27};
diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
index a44e9179faf5..8346cab046cd 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
@@ -20,6 +20,7 @@ Required properties:
20SSI subnode properties: 20SSI subnode properties:
21- interrupts : Should contain SSI interrupt for PIO transfer 21- interrupts : Should contain SSI interrupt for PIO transfer
22- shared-pin : if shared clock pin 22- shared-pin : if shared clock pin
23- pio-transfer : use PIO transfer mode
23 24
24SRC subnode properties: 25SRC subnode properties:
25no properties at this point 26no properties at this point
diff --git a/Documentation/devicetree/bindings/sound/rt5640.txt b/Documentation/devicetree/bindings/sound/rt5640.txt
index 068a1141b06f..bac4d9ac1edc 100644
--- a/Documentation/devicetree/bindings/sound/rt5640.txt
+++ b/Documentation/devicetree/bindings/sound/rt5640.txt
@@ -1,10 +1,10 @@
1RT5640 audio CODEC 1RT5640/RT5639 audio CODEC
2 2
3This device supports I2C only. 3This device supports I2C only.
4 4
5Required properties: 5Required properties:
6 6
7- compatible : "realtek,rt5640". 7- compatible : One of "realtek,rt5640" or "realtek,rt5639".
8 8
9- reg : The I2C address of the device. 9- reg : The I2C address of the device.
10 10
@@ -18,7 +18,7 @@ Optional properties:
18 18
19- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. 19- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
20 20
21Pins on the device (for linking into audio routes): 21Pins on the device (for linking into audio routes) for RT5639/RT5640:
22 22
23 * DMIC1 23 * DMIC1
24 * DMIC2 24 * DMIC2
@@ -31,13 +31,16 @@ Pins on the device (for linking into audio routes):
31 * HPOR 31 * HPOR
32 * LOUTL 32 * LOUTL
33 * LOUTR 33 * LOUTR
34 * MONOP
35 * MONON
36 * SPOLP 34 * SPOLP
37 * SPOLN 35 * SPOLN
38 * SPORP 36 * SPORP
39 * SPORN 37 * SPORN
40 38
39Additional pins on the device for RT5640:
40
41 * MONOP
42 * MONON
43
41Example: 44Example:
42 45
43rt5640 { 46rt5640 {
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
index 131aa2ad7f1a..c2e9841dfce4 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -1,6 +1,6 @@
1Simple-Card: 1Simple-Card:
2 2
3Simple-Card specifies audio DAI connection of SoC <-> codec. 3Simple-Card specifies audio DAI connections of SoC <-> codec.
4 4
5Required properties: 5Required properties:
6 6
@@ -10,26 +10,54 @@ Optional properties:
10 10
11- simple-audio-card,name : User specified audio sound card name, one string 11- simple-audio-card,name : User specified audio sound card name, one string
12 property. 12 property.
13- simple-audio-card,format : CPU/CODEC common audio format.
14 "i2s", "right_j", "left_j" , "dsp_a"
15 "dsp_b", "ac97", "pdm", "msb", "lsb"
16- simple-audio-card,widgets : Please refer to widgets.txt. 13- simple-audio-card,widgets : Please refer to widgets.txt.
17- simple-audio-card,routing : A list of the connections between audio components. 14- simple-audio-card,routing : A list of the connections between audio components.
18 Each entry is a pair of strings, the first being the 15 Each entry is a pair of strings, the first being the
19 connection's sink, the second being the connection's 16 connection's sink, the second being the connection's
20 source. 17 source.
21- dai-tdm-slot-num : Please refer to tdm-slot.txt. 18- simple-audio-card,mclk-fs : Multiplication factor between stream rate and codec
22- dai-tdm-slot-width : Please refer to tdm-slot.txt. 19 mclk.
20
21Optional subnodes:
22
23- simple-audio-card,dai-link : Container for dai-link level
24 properties and the CPU and CODEC
25 sub-nodes. This container may be
26 omitted when the card has only one
27 DAI link. See the examples and the
28 section bellow.
29
30Dai-link subnode properties and subnodes:
31
32If dai-link subnode is omitted and the subnode properties are directly
33under "sound"-node the subnode property and subnode names have to be
34prefixed with "simple-audio-card,"-prefix.
23 35
24Required subnodes: 36Required dai-link subnodes:
25 37
26- simple-audio-card,dai-link : container for the CPU and CODEC sub-nodes 38- cpu : CPU sub-node
27 This container may be omitted when the 39- codec : CODEC sub-node
28 card has only one DAI link.
29 See the examples.
30 40
31- simple-audio-card,cpu : CPU sub-node 41Optional dai-link subnode properties:
32- simple-audio-card,codec : CODEC sub-node 42
43- format : CPU/CODEC common audio format.
44 "i2s", "right_j", "left_j" , "dsp_a"
45 "dsp_b", "ac97", "pdm", "msb", "lsb"
46- frame-master : Indicates dai-link frame master.
47 phandle to a cpu or codec subnode.
48- bitclock-master : Indicates dai-link bit clock master.
49 phandle to a cpu or codec subnode.
50- bitclock-inversion : bool property. Add this if the
51 dai-link uses bit clock inversion.
52- frame-inversion : bool property. Add this if the
53 dai-link uses frame clock inversion.
54
55For backward compatibility the frame-master and bitclock-master
56properties can be used as booleans in codec subnode to indicate if the
57codec is the dai-link frame or bit clock master. In this case there
58should be no dai-link node, the same properties should not be present
59at sound-node level, and the bitclock-inversion and frame-inversion
60properties should also be placed in the codec node if needed.
33 61
34Required CPU/CODEC subnodes properties: 62Required CPU/CODEC subnodes properties:
35 63
@@ -37,29 +65,21 @@ Required CPU/CODEC subnodes properties:
37 65
38Optional CPU/CODEC subnodes properties: 66Optional CPU/CODEC subnodes properties:
39 67
40- format : CPU/CODEC specific audio format if needed. 68- dai-tdm-slot-num : Please refer to tdm-slot.txt.
41 see simple-audio-card,format 69- dai-tdm-slot-width : Please refer to tdm-slot.txt.
42- frame-master : bool property. add this if subnode is frame master
43- bitclock-master : bool property. add this if subnode is bitclock master
44- bitclock-inversion : bool property. add this if subnode has clock inversion
45- frame-inversion : bool property. add this if subnode has frame inversion
46- clocks / system-clock-frequency : specify subnode's clock if needed. 70- clocks / system-clock-frequency : specify subnode's clock if needed.
47 it can be specified via "clocks" if system has 71 it can be specified via "clocks" if system has
48 clock node (= common clock), or "system-clock-frequency" 72 clock node (= common clock), or "system-clock-frequency"
49 (if system doens't support common clock) 73 (if system doens't support common clock)
50 74
51Note:
52 * For 'format', 'frame-master', 'bitclock-master', 'bitclock-inversion' and
53 'frame-inversion', the simple card will use the settings of CODEC for both
54 CPU and CODEC sides as we need to keep the settings identical for both ends
55 of the link.
56
57Example 1 - single DAI link: 75Example 1 - single DAI link:
58 76
59sound { 77sound {
60 compatible = "simple-audio-card"; 78 compatible = "simple-audio-card";
61 simple-audio-card,name = "VF610-Tower-Sound-Card"; 79 simple-audio-card,name = "VF610-Tower-Sound-Card";
62 simple-audio-card,format = "left_j"; 80 simple-audio-card,format = "left_j";
81 simple-audio-card,bitclock-master = <&dailink0_master>;
82 simple-audio-card,frame-master = <&dailink0_master>;
63 simple-audio-card,widgets = 83 simple-audio-card,widgets =
64 "Microphone", "Microphone Jack", 84 "Microphone", "Microphone Jack",
65 "Headphone", "Headphone Jack", 85 "Headphone", "Headphone Jack",
@@ -69,17 +89,12 @@ sound {
69 "Headphone Jack", "HP_OUT", 89 "Headphone Jack", "HP_OUT",
70 "External Speaker", "LINE_OUT"; 90 "External Speaker", "LINE_OUT";
71 91
72 dai-tdm-slot-num = <2>;
73 dai-tdm-slot-width = <8>;
74
75 simple-audio-card,cpu { 92 simple-audio-card,cpu {
76 sound-dai = <&sh_fsi2 0>; 93 sound-dai = <&sh_fsi2 0>;
77 }; 94 };
78 95
79 simple-audio-card,codec { 96 dailink0_master: simple-audio-card,codec {
80 sound-dai = <&ak4648>; 97 sound-dai = <&ak4648>;
81 bitclock-master;
82 frame-master;
83 clocks = <&osc>; 98 clocks = <&osc>;
84 }; 99 };
85}; 100};
@@ -105,31 +120,31 @@ Example 2 - many DAI links:
105sound { 120sound {
106 compatible = "simple-audio-card"; 121 compatible = "simple-audio-card";
107 simple-audio-card,name = "Cubox Audio"; 122 simple-audio-card,name = "Cubox Audio";
108 simple-audio-card,format = "i2s";
109 123
110 simple-audio-card,dai-link@0 { /* I2S - HDMI */ 124 simple-audio-card,dai-link@0 { /* I2S - HDMI */
111 simple-audio-card,cpu { 125 format = "i2s";
126 cpu {
112 sound-dai = <&audio1 0>; 127 sound-dai = <&audio1 0>;
113 }; 128 };
114 simple-audio-card,codec { 129 codec {
115 sound-dai = <&tda998x 0>; 130 sound-dai = <&tda998x 0>;
116 }; 131 };
117 }; 132 };
118 133
119 simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */ 134 simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */
120 simple-audio-card,cpu { 135 cpu {
121 sound-dai = <&audio1 1>; 136 sound-dai = <&audio1 1>;
122 }; 137 };
123 simple-audio-card,codec { 138 codec {
124 sound-dai = <&tda998x 1>; 139 sound-dai = <&tda998x 1>;
125 }; 140 };
126 }; 141 };
127 142
128 simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */ 143 simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */
129 simple-audio-card,cpu { 144 cpu {
130 sound-dai = <&audio1 1>; 145 sound-dai = <&audio1 1>;
131 }; 146 };
132 simple-audio-card,codec { 147 codec {
133 sound-dai = <&spdif_codec>; 148 sound-dai = <&spdif_codec>;
134 }; 149 };
135 }; 150 };
diff --git a/Documentation/devicetree/bindings/sound/st,sta350.txt b/Documentation/devicetree/bindings/sound/st,sta350.txt
new file mode 100644
index 000000000000..b7e71bf5caf4
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/st,sta350.txt
@@ -0,0 +1,131 @@
1STA350 audio CODEC
2
3The driver for this device only supports I2C.
4
5Required properties:
6
7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
10 deasserted before communication to the codec starts.
11
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
13 it will be deasserted before communication to the codec
14 starts.
15
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
19
20Optional properties:
21
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
25 2: 2 Channel (Full-Bridge) Power, 1 Channel FFX
26 3: 1 Channel Mono-Parallel
27 If parameter is missing, mode 0 will be enabled.
28 This property has to be specified as '/bits/ 8' value.
29
30 - st,ch1-output-mapping: Channel 1 output mapping
31 - st,ch2-output-mapping: Channel 2 output mapping
32 - st,ch3-output-mapping: Channel 3 output mapping
33 0: Channel 1
34 1: Channel 2
35 2: Channel 3
36 If parameter is missing, channel 1 is choosen.
37 This properties have to be specified as '/bits/ 8' values.
38
39 - st,thermal-warning-recover:
40 If present, thermal warning recovery is enabled.
41
42 - st,thermal-warning-adjustment:
43 If present, thermal warning adjustment is enabled.
44
45 - st,fault-detect-recovery:
46 If present, then fault recovery will be enabled.
47
48 - st,ffx-power-output-mode: string
49 The FFX power output mode selects how the FFX output timing is
50 configured. Must be one of these values:
51 - "drop-compensation"
52 - "tapered-compensation"
53 - "full-power-mode"
54 - "variable-drop-compensation" (default)
55
56 - st,drop-compensation-ns: number
57 Only required for "st,ffx-power-output-mode" ==
58 "variable-drop-compensation".
59 Specifies the drop compensation in nanoseconds.
60 The value must be in the range of 0..300, and only
61 multiples of 20 are allowed. Default is 140ns.
62
63 - st,overcurrent-warning-adjustment:
64 If present, overcurrent warning adjustment is enabled.
65
66 - st,max-power-use-mpcc:
67 If present, then MPCC bits are used for MPC coefficients,
68 otherwise standard MPC coefficients are used.
69
70 - st,max-power-corr:
71 If present, power bridge correction for THD reduction near maximum
72 power output is enabled.
73
74 - st,am-reduction-mode:
75 If present, FFX mode runs in AM reduction mode, otherwise normal
76 FFX mode is used.
77
78 - st,odd-pwm-speed-mode:
79 If present, PWM speed mode run on odd speed mode (341.3 kHz) on all
80 channels. If not present, normal PWM spped mode (384 kHz) will be used.
81
82 - st,distortion-compensation:
83 If present, distortion compensation variable uses DCC coefficient.
84 If not present, preset DC coefficient is used.
85
86 - st,invalid-input-detect-mute:
87 If present, automatic invalid input detect mute is enabled.
88
89 - st,activate-mute-output:
90 If present, a mute output will be activated in ase the volume will
91 reach a value lower than -76 dBFS.
92
93 - st,bridge-immediate-off:
94 If present, the bridge will be switched off immediately after the
95 power-down-gpio goes low. Otherwise, the bridge will wait for 13
96 million clock cycles to pass before shutting down.
97
98 - st,noise-shape-dc-cut:
99 If present, the noise-shaping technique on the DC cutoff filter are
100 enabled.
101
102 - st,powerdown-master-volume:
103 If present, the power-down pin and I2C power-down functions will
104 act on the master volume. Otherwise, the functions will act on the
105 mute commands.
106
107 - st,powerdown-delay-divider:
108 If present, the bridge power-down time will be divided by the provided
109 value. If not specified, a divider of 1 will be used. Allowed values
110 are 1, 2, 4, 8, 16, 32, 64 and 128.
111 This property has to be specified as '/bits/ 8' value.
112
113Example:
114
115codec: sta350@38 {
116 compatible = "st,sta350";
117 reg = <0x1c>;
118 reset-gpios = <&gpio1 19 0>;
119 power-down-gpios = <&gpio1 16 0>;
120 st,output-conf = /bits/ 8 <0x3>; // set output to 2-channel
121 // (full-bridge) power,
122 // 2-channel data-out
123 st,ch1-output-mapping = /bits/ 8 <0>; // set channel 1 output ch 1
124 st,ch2-output-mapping = /bits/ 8 <0>; // set channel 2 output ch 1
125 st,ch3-output-mapping = /bits/ 8 <0>; // set channel 3 output ch 1
126 st,max-power-correction; // enables power bridge
127 // correction for THD reduction
128 // near maximum power output
129 st,invalid-input-detect-mute; // mute if no valid digital
130 // audio signal is provided.
131};
diff --git a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
index 74c66dee3e14..eff12be5e789 100644
--- a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
+++ b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
@@ -13,6 +13,9 @@ Required properties:
13 "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP) 13 "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
14 14
15- reg - <int> - I2C slave address 15- reg - <int> - I2C slave address
16- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
17 DVDD-supply : power supplies for the device as covered in
18 Documentation/devicetree/bindings/regulator/regulator.txt
16 19
17 20
18Optional properties: 21Optional properties:
@@ -24,9 +27,6 @@ Optional properties:
24 3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD 27 3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
25 If this node is not mentioned or if the value is unknown, then 28 If this node is not mentioned or if the value is unknown, then
26 micbias is set to 2.0V. 29 micbias is set to 2.0V.
27- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
28 DVDD-supply : power supplies for the device as covered in
29 Documentation/devicetree/bindings/regulator/regulator.txt
30 30
31CODEC output pins: 31CODEC output pins:
32 * HPL 32 * HPL
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 0f01c9bf19c8..abc308083acb 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -22,6 +22,7 @@ auo AU Optronics Corporation
22avago Avago Technologies 22avago Avago Technologies
23bosch Bosch Sensortec GmbH 23bosch Bosch Sensortec GmbH
24brcm Broadcom Corporation 24brcm Broadcom Corporation
25buffalo Buffalo, Inc.
25calxeda Calxeda 26calxeda Calxeda
26capella Capella Microsystems, Inc 27capella Capella Microsystems, Inc
27cavium Cavium, Inc. 28cavium Cavium, Inc.
@@ -33,15 +34,18 @@ cortina Cortina Systems, Inc.
33crystalfontz Crystalfontz America, Inc. 34crystalfontz Crystalfontz America, Inc.
34dallas Maxim Integrated Products (formerly Dallas Semiconductor) 35dallas Maxim Integrated Products (formerly Dallas Semiconductor)
35davicom DAVICOM Semiconductor, Inc. 36davicom DAVICOM Semiconductor, Inc.
36dlink D-Link Systems, Inc.
37denx Denx Software Engineering 37denx Denx Software Engineering
38digi Digi International Inc.
39dlink D-Link Corporation
38dmo Data Modul AG 40dmo Data Modul AG
41ebv EBV Elektronik
39edt Emerging Display Technologies 42edt Emerging Display Technologies
40emmicro EM Microelectronic 43emmicro EM Microelectronic
41epfl Ecole Polytechnique Fédérale de Lausanne 44epfl Ecole Polytechnique Fédérale de Lausanne
42epson Seiko Epson Corp. 45epson Seiko Epson Corp.
43est ESTeem Wireless Modems 46est ESTeem Wireless Modems
44eukrea Eukréa Electromatique 47eukrea Eukréa Electromatique
48excito Excito
45fsl Freescale Semiconductor 49fsl Freescale Semiconductor
46GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. 50GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
47gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. 51gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
@@ -53,13 +57,17 @@ haoyu Haoyu Microelectronic Co. Ltd.
53hisilicon Hisilicon Limited. 57hisilicon Hisilicon Limited.
54honeywell Honeywell 58honeywell Honeywell
55hp Hewlett Packard 59hp Hewlett Packard
60i2se I2SE GmbH
56ibm International Business Machines (IBM) 61ibm International Business Machines (IBM)
57idt Integrated Device Technologies, Inc. 62idt Integrated Device Technologies, Inc.
63iom Iomega Corporation
58img Imagination Technologies Ltd. 64img Imagination Technologies Ltd.
59intel Intel Corporation 65intel Intel Corporation
60intercontrol Inter Control Group 66intercontrol Inter Control Group
67isee ISEE 2007 S.L.
61isl Intersil 68isl Intersil
62karo Ka-Ro electronics GmbH 69karo Ka-Ro electronics GmbH
70keymile Keymile GmbH
63lacie LaCie 71lacie LaCie
64lantiq Lantiq Semiconductor 72lantiq Lantiq Semiconductor
65lg LG Corporation 73lg LG Corporation
@@ -70,9 +78,12 @@ maxim Maxim Integrated Products
70microchip Microchip Technology Inc. 78microchip Microchip Technology Inc.
71mosaixtech Mosaix Technologies, Inc. 79mosaixtech Mosaix Technologies, Inc.
72moxa Moxa 80moxa Moxa
81mpl MPL AG
82mxicy Macronix International Co., Ltd.
73national National Semiconductor 83national National Semiconductor
74neonode Neonode Inc. 84neonode Neonode Inc.
75netgear NETGEAR 85netgear NETGEAR
86newhaven Newhaven Display International
76nintendo Nintendo 87nintendo Nintendo
77nokia Nokia 88nokia Nokia
78nvidia NVIDIA 89nvidia NVIDIA
@@ -82,10 +93,12 @@ opencores OpenCores.org
82panasonic Panasonic Corporation 93panasonic Panasonic Corporation
83phytec PHYTEC Messtechnik GmbH 94phytec PHYTEC Messtechnik GmbH
84picochip Picochip Ltd 95picochip Picochip Ltd
96plathome Plat'Home Co., Ltd.
85powervr PowerVR (deprecated, use img) 97powervr PowerVR (deprecated, use img)
86qca Qualcomm Atheros, Inc. 98qca Qualcomm Atheros, Inc.
87qcom Qualcomm Technologies, Inc 99qcom Qualcomm Technologies, Inc
88qnap QNAP Systems, Inc. 100qnap QNAP Systems, Inc.
101raidsonic RaidSonic Technology GmbH
89ralink Mediatek/Ralink Technology Corp. 102ralink Mediatek/Ralink Technology Corp.
90ramtron Ramtron International 103ramtron Ramtron International
91realtek Realtek Semiconductor Corp. 104realtek Realtek Semiconductor Corp.
@@ -95,6 +108,7 @@ rockchip Fuzhou Rockchip Electronics Co., Ltd
95samsung Samsung Semiconductor 108samsung Samsung Semiconductor
96sbs Smart Battery System 109sbs Smart Battery System
97schindler Schindler 110schindler Schindler
111seagate Seagate Technology PLC
98sil Silicon Image 112sil Silicon Image
99silabs Silicon Laboratories 113silabs Silicon Laboratories
100simtek 114simtek
@@ -111,6 +125,7 @@ ti Texas Instruments
111tlm Trusted Logic Mobility 125tlm Trusted Logic Mobility
112toshiba Toshiba Corporation 126toshiba Toshiba Corporation
113toumaz Toumaz 127toumaz Toumaz
128usi Universal Scientifc Industrial Co., Ltd.
114v3 V3 Semiconductor 129v3 V3 Semiconductor
115via VIA Technologies, Inc. 130via VIA Technologies, Inc.
116voipac Voipac Technologies s.r.o. 131voipac Voipac Technologies s.r.o.
@@ -119,3 +134,4 @@ wlf Wolfson Microelectronics
119wm Wondermedia Technologies, Inc. 134wm Wondermedia Technologies, Inc.
120xes Extreme Engineering Solutions (X-ES) 135xes Extreme Engineering Solutions (X-ES)
121xlnx Xilinx 136xlnx Xilinx
137zyxel ZyXEL Communications Corp.
diff --git a/Documentation/input/elantech.txt b/Documentation/input/elantech.txt
index 5602eb71ad5d..e1ae127ed099 100644
--- a/Documentation/input/elantech.txt
+++ b/Documentation/input/elantech.txt
@@ -504,9 +504,12 @@ byte 5:
504* reg_10 504* reg_10
505 505
506 bit 7 6 5 4 3 2 1 0 506 bit 7 6 5 4 3 2 1 0
507 0 0 0 0 0 0 0 A 507 0 0 0 0 R F T A
508 508
509 A: 1 = enable absolute tracking 509 A: 1 = enable absolute tracking
510 T: 1 = enable two finger mode auto correct
511 F: 1 = disable ABS Position Filter
512 R: 1 = enable real hardware resolution
510 513
5116.2 Native absolute mode 6 byte packet format 5146.2 Native absolute mode 6 byte packet format
512 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 515 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/Documentation/ja_JP/HOWTO b/Documentation/ja_JP/HOWTO
index 0091a8215ac1..b61885c35ce1 100644
--- a/Documentation/ja_JP/HOWTO
+++ b/Documentation/ja_JP/HOWTO
@@ -315,7 +315,7 @@ Andrew Morton ㌠Linux-kernel メーリングリストã«ã‚«ãƒ¼ãƒãƒ«ãƒªãƒªãƒ¼ã
315ã‚‚ã—ã€3.x.y カーãƒãƒ«ãŒå­˜åœ¨ã—ãªã„å ´åˆã«ã¯ã€ç•ªå·ãŒä¸€ç•ªå¤§ãã„ 3.x ㌠315ã‚‚ã—ã€3.x.y カーãƒãƒ«ãŒå­˜åœ¨ã—ãªã„å ´åˆã«ã¯ã€ç•ªå·ãŒä¸€ç•ªå¤§ãã„ 3.x ãŒ
316最新ã®å®‰å®šç‰ˆã‚«ãƒ¼ãƒãƒ«ã§ã™ã€‚ 316最新ã®å®‰å®šç‰ˆã‚«ãƒ¼ãƒãƒ«ã§ã™ã€‚
317 317
3183.x.y 㯠"stable" ãƒãƒ¼ãƒ  <stable@kernel.org> ã§ãƒ¡ãƒ³ãƒ†ã•れã¦ãŠã‚Šã€å¿… 3183.x.y 㯠"stable" ãƒãƒ¼ãƒ  <stable@vger.kernel.org> ã§ãƒ¡ãƒ³ãƒ†ã•れã¦ãŠã‚Šã€å¿…
319è¦ã«å¿œã˜ã¦ãƒªãƒªãƒ¼ã‚¹ã•れã¾ã™ã€‚通常ã®ãƒªãƒªãƒ¼ã‚¹æœŸé–“㯠2週間毎ã§ã™ãŒã€å·®ã—迫㣠319è¦ã«å¿œã˜ã¦ãƒªãƒªãƒ¼ã‚¹ã•れã¾ã™ã€‚通常ã®ãƒªãƒªãƒ¼ã‚¹æœŸé–“㯠2週間毎ã§ã™ãŒã€å·®ã—è¿«ã£
320ãŸå•題ãŒãªã‘れã°ã‚‚ã†å°‘ã—é•·ããªã‚‹ã“ã¨ã‚‚ã‚りã¾ã™ã€‚セキュリティ関連ã®å•題 320ãŸå•題ãŒãªã‘れã°ã‚‚ã†å°‘ã—é•·ããªã‚‹ã“ã¨ã‚‚ã‚りã¾ã™ã€‚セキュリティ関連ã®å•題
321ã®å ´åˆã¯ã“れã«å¯¾ã—ã¦ã ã„ãŸã„ã®å ´åˆã€ã™ãã«ãƒªãƒªãƒ¼ã‚¹ãŒã•れã¾ã™ã€‚ 321ã®å ´åˆã¯ã“れã«å¯¾ã—ã¦ã ã„ãŸã„ã®å ´åˆã€ã™ãã«ãƒªãƒªãƒ¼ã‚¹ãŒã•れã¾ã™ã€‚
diff --git a/Documentation/ja_JP/stable_kernel_rules.txt b/Documentation/ja_JP/stable_kernel_rules.txt
index 14265837c4ce..9dbda9b5d21e 100644
--- a/Documentation/ja_JP/stable_kernel_rules.txt
+++ b/Documentation/ja_JP/stable_kernel_rules.txt
@@ -50,16 +50,16 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt
50 50
51-stable ツリーã«ãƒ‘ッãƒã‚’é€ä»˜ã™ã‚‹æ‰‹ç¶šã- 51-stable ツリーã«ãƒ‘ッãƒã‚’é€ä»˜ã™ã‚‹æ‰‹ç¶šã-
52 52
53 - 上記ã®è¦å‰‡ã«å¾“ã£ã¦ã„ã‚‹ã‹ã‚’確èªã—ãŸå¾Œã«ã€stable@kernel.org ã«ãƒ‘ッム53 - 上記ã®è¦å‰‡ã«å¾“ã£ã¦ã„ã‚‹ã‹ã‚’確èªã—ãŸå¾Œã«ã€stable@vger.kernel.org ã«ãƒ‘ッãƒ
54 ã‚’é€ã‚‹ã€‚ 54 ã‚’é€ã‚‹ã€‚
55 - é€ä¿¡è€…ã¯ãƒ‘ッãƒãŒã‚­ãƒ¥ãƒ¼ã«å—ã‘付ã‘られãŸéš›ã«ã¯ ACK ã‚’ã€å´ä¸‹ã•れãŸå ´åˆ 55 - é€ä¿¡è€…ã¯ãƒ‘ッãƒãŒã‚­ãƒ¥ãƒ¼ã«å—ã‘付ã‘られãŸéš›ã«ã¯ ACK ã‚’ã€å´ä¸‹ã•れãŸå ´åˆ
56 ã«ã¯ NAK ã‚’å—ã‘å–る。ã“ã®å応ã¯é–‹ç™ºè€…ãŸã¡ã®ã‚¹ã‚±ã‚¸ãƒ¥ãƒ¼ãƒ«ã«ã‚ˆã£ã¦ã€æ•° 56 ã«ã¯ NAK ã‚’å—ã‘å–る。ã“ã®å応ã¯é–‹ç™ºè€…ãŸã¡ã®ã‚¹ã‚±ã‚¸ãƒ¥ãƒ¼ãƒ«ã«ã‚ˆã£ã¦ã€æ•°
57 æ—¥ã‹ã‹ã‚‹å ´åˆãŒã‚る。 57 æ—¥ã‹ã‹ã‚‹å ´åˆãŒã‚る。
58 - ã‚‚ã—å—ã‘å–られãŸã‚‰ã€ãƒ‘ッãƒã¯ä»–ã®é–‹ç™ºè€…ãŸã¡ã¨é–¢é€£ã™ã‚‹ã‚µãƒ–システム㮠58 - ã‚‚ã—å—ã‘å–られãŸã‚‰ã€ãƒ‘ッãƒã¯ä»–ã®é–‹ç™ºè€…ãŸã¡ã¨é–¢é€£ã™ã‚‹ã‚µãƒ–システムã®
59 メンテナーã«ã‚ˆã‚‹ãƒ¬ãƒ“ューã®ãŸã‚ã« -stable キューã«è¿½åŠ ã•れる。 59 メンテナーã«ã‚ˆã‚‹ãƒ¬ãƒ“ューã®ãŸã‚ã« -stable キューã«è¿½åŠ ã•れる。
60 - パッãƒã« stable@kernel.org ã®ã‚¢ãƒ‰ãƒ¬ã‚¹ãŒä»˜åŠ ã•れã¦ã„ã‚‹ã¨ãã«ã¯ã€ãれ 60 - パッãƒã« stable@vger.kernel.org ã®ã‚¢ãƒ‰ãƒ¬ã‚¹ãŒä»˜åŠ ã•れã¦ã„ã‚‹ã¨ãã«ã¯ã€ãれ
61 ㌠Linus ã®ãƒ„リーã«å…¥ã‚‹æ™‚ã«è‡ªå‹•的㫠stable ãƒãƒ¼ãƒ ã« email ã•れる。 61 ㌠Linus ã®ãƒ„リーã«å…¥ã‚‹æ™‚ã«è‡ªå‹•的㫠stable ãƒãƒ¼ãƒ ã« email ã•れる。
62 - セキュリティパッãƒã¯ã“ã®ã‚¨ã‚¤ãƒªã‚¢ã‚¹ (stable@kernel.org) ã«é€ã‚‰ã‚Œã‚‹ã¹ 62 - セキュリティパッãƒã¯ã“ã®ã‚¨ã‚¤ãƒªã‚¢ã‚¹ (stable@vger.kernel.org) ã«é€ã‚‰ã‚Œã‚‹ã¹
63 ãã§ã¯ãªãã€ä»£ã‚り㫠security@kernel.org ã®ã‚¢ãƒ‰ãƒ¬ã‚¹ã«é€ã‚‰ã‚Œã‚‹ã€‚ 63 ãã§ã¯ãªãã€ä»£ã‚り㫠security@kernel.org ã®ã‚¢ãƒ‰ãƒ¬ã‚¹ã«é€ã‚‰ã‚Œã‚‹ã€‚
64 64
65レビューサイクル- 65レビューサイクル-
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 03e50b4883a8..43842177b771 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -804,13 +804,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
804 dhash_entries= [KNL] 804 dhash_entries= [KNL]
805 Set number of hash buckets for dentry cache. 805 Set number of hash buckets for dentry cache.
806 806
807 digi= [HW,SERIAL]
808 IO parameters + enable/disable command.
809
810 digiepca= [HW,SERIAL]
811 See drivers/char/README.epca and
812 Documentation/serial/digiepca.txt.
813
814 disable= [IPV6] 807 disable= [IPV6]
815 See Documentation/networking/ipv6.txt. 808 See Documentation/networking/ipv6.txt.
816 809
@@ -2939,9 +2932,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
2939 rhash_entries= [KNL,NET] 2932 rhash_entries= [KNL,NET]
2940 Set number of hash buckets for route cache 2933 Set number of hash buckets for route cache
2941 2934
2942 riscom8= [HW,SERIAL]
2943 Format: <io_board1>[,<io_board2>[,...<io_boardN>]]
2944
2945 ro [KNL] Mount root device read-only on boot 2935 ro [KNL] Mount root device read-only on boot
2946 2936
2947 root= [KNL] Root filesystem 2937 root= [KNL] Root filesystem
@@ -3083,9 +3073,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
3083 sonypi.*= [HW] Sony Programmable I/O Control Device driver 3073 sonypi.*= [HW] Sony Programmable I/O Control Device driver
3084 See Documentation/laptops/sonypi.txt 3074 See Documentation/laptops/sonypi.txt
3085 3075
3086 specialix= [HW,SERIAL] Specialix multi-serial port adapter
3087 See Documentation/serial/specialix.txt.
3088
3089 spia_io_base= [HW,MTD] 3076 spia_io_base= [HW,MTD]
3090 spia_fio_base= 3077 spia_fio_base=
3091 spia_pedr= 3078 spia_pedr=
diff --git a/Documentation/magic-number.txt b/Documentation/magic-number.txt
index 76d80a64bbe1..4c8e142db2ef 100644
--- a/Documentation/magic-number.txt
+++ b/Documentation/magic-number.txt
@@ -63,8 +63,6 @@ Magic Name Number Structure File
63PG_MAGIC 'P' pg_{read,write}_hdr include/linux/pg.h 63PG_MAGIC 'P' pg_{read,write}_hdr include/linux/pg.h
64CMAGIC 0x0111 user include/linux/a.out.h 64CMAGIC 0x0111 user include/linux/a.out.h
65MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h 65MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h
66RISCOM8_MAGIC 0x0907 riscom_port drivers/char/riscom8.h
67SPECIALIX_MAGIC 0x0907 specialix_port drivers/char/specialix_io8.h
68HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c 66HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c
69APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c 67APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c
70CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h 68CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h
@@ -82,7 +80,6 @@ STRIP_MAGIC 0x5303 strip drivers/net/strip.c
82X25_ASY_MAGIC 0x5303 x25_asy drivers/net/x25_asy.h 80X25_ASY_MAGIC 0x5303 x25_asy drivers/net/x25_asy.h
83SIXPACK_MAGIC 0x5304 sixpack drivers/net/hamradio/6pack.h 81SIXPACK_MAGIC 0x5304 sixpack drivers/net/hamradio/6pack.h
84AX25_MAGIC 0x5316 ax_disp drivers/net/mkiss.h 82AX25_MAGIC 0x5316 ax_disp drivers/net/mkiss.h
85ESP_MAGIC 0x53ee esp_struct drivers/char/esp.h
86TTY_MAGIC 0x5401 tty_struct include/linux/tty.h 83TTY_MAGIC 0x5401 tty_struct include/linux/tty.h
87MGSL_MAGIC 0x5401 mgsl_info drivers/char/synclink.c 84MGSL_MAGIC 0x5401 mgsl_info drivers/char/synclink.c
88TTY_DRIVER_MAGIC 0x5402 tty_driver include/linux/tty_driver.h 85TTY_DRIVER_MAGIC 0x5402 tty_driver include/linux/tty_driver.h
@@ -94,13 +91,10 @@ USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth drivers/usb/class/bluetty.c
94RFCOMM_TTY_MAGIC 0x6d02 net/bluetooth/rfcomm/tty.c 91RFCOMM_TTY_MAGIC 0x6d02 net/bluetooth/rfcomm/tty.c
95USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port drivers/usb/serial/usb-serial.h 92USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port drivers/usb/serial/usb-serial.h
96CG_MAGIC 0x00090255 ufs_cylinder_group include/linux/ufs_fs.h 93CG_MAGIC 0x00090255 ufs_cylinder_group include/linux/ufs_fs.h
97A2232_MAGIC 0x000a2232 gs_port drivers/char/ser_a2232.h
98RPORT_MAGIC 0x00525001 r_port drivers/char/rocket_int.h 94RPORT_MAGIC 0x00525001 r_port drivers/char/rocket_int.h
99LSEMAGIC 0x05091998 lse drivers/fc4/fc.c 95LSEMAGIC 0x05091998 lse drivers/fc4/fc.c
100GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str drivers/scsi/gdth_ioctl.h 96GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str drivers/scsi/gdth_ioctl.h
101RIEBL_MAGIC 0x09051990 drivers/net/atarilance.c 97RIEBL_MAGIC 0x09051990 drivers/net/atarilance.c
102RIO_MAGIC 0x12345678 gs_port drivers/char/rio/rio_linux.c
103SX_MAGIC 0x12345678 gs_port drivers/char/sx.h
104NBD_REQUEST_MAGIC 0x12560953 nbd_request include/linux/nbd.h 98NBD_REQUEST_MAGIC 0x12560953 nbd_request include/linux/nbd.h
105RED_MAGIC2 0x170fc2a5 (any) mm/slab.c 99RED_MAGIC2 0x170fc2a5 (any) mm/slab.c
106BAYCOM_MAGIC 0x19730510 baycom_state drivers/net/baycom_epp.c 100BAYCOM_MAGIC 0x19730510 baycom_state drivers/net/baycom_epp.c
@@ -116,7 +110,6 @@ ISDN_ASYNC_MAGIC 0x49344C01 modem_info include/linux/isdn.h
116CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info drivers/s390/net/ctctty.c 110CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info drivers/s390/net/ctctty.c
117ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s drivers/isdn/i4l/isdn_net_lib.h 111ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s drivers/isdn/i4l/isdn_net_lib.h
118SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg arch/*/amiga/config.c 112SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg arch/*/amiga/config.c
119STLI_BOARDMAGIC 0x4bc6c825 stlibrd include/linux/istallion.h
120CS_STATE_MAGIC 0x4c4f4749 cs_state sound/oss/cs46xx.c 113CS_STATE_MAGIC 0x4c4f4749 cs_state sound/oss/cs46xx.c
121SLAB_C_MAGIC 0x4f17a36d kmem_cache mm/slab.c 114SLAB_C_MAGIC 0x4f17a36d kmem_cache mm/slab.c
122COW_MAGIC 0x4f4f4f4d cow_header_v1 arch/um/drivers/ubd_user.c 115COW_MAGIC 0x4f4f4f4d cow_header_v1 arch/um/drivers/ubd_user.c
@@ -127,10 +120,8 @@ SCC_MAGIC 0x52696368 gs_port drivers/char/scc.h
127SAVEKMSG_MAGIC1 0x53415645 savekmsg arch/*/amiga/config.c 120SAVEKMSG_MAGIC1 0x53415645 savekmsg arch/*/amiga/config.c
128GDA_MAGIC 0x58464552 gda arch/mips/include/asm/sn/gda.h 121GDA_MAGIC 0x58464552 gda arch/mips/include/asm/sn/gda.h
129RED_MAGIC1 0x5a2cf071 (any) mm/slab.c 122RED_MAGIC1 0x5a2cf071 (any) mm/slab.c
130STL_PORTMAGIC 0x5a7182c9 stlport include/linux/stallion.h
131EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev drivers/atm/lanai.c 123EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev drivers/atm/lanai.c
132HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state include/linux/hdlcdrv.h 124HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state include/linux/hdlcdrv.h
133EPCA_MAGIC 0x5c6df104 channel include/linux/epca.h
134PCXX_MAGIC 0x5c6df104 channel drivers/char/pcxx.h 125PCXX_MAGIC 0x5c6df104 channel drivers/char/pcxx.h
135KV_MAGIC 0x5f4b565f kernel_vars_s arch/mips/include/asm/sn/klkernvars.h 126KV_MAGIC 0x5f4b565f kernel_vars_s arch/mips/include/asm/sn/klkernvars.h
136I810_STATE_MAGIC 0x63657373 i810_state sound/oss/i810_audio.c 127I810_STATE_MAGIC 0x63657373 i810_state sound/oss/i810_audio.c
@@ -142,17 +133,14 @@ SLOT_MAGIC 0x67267322 slot drivers/hotplug/acpiphp.h
142LO_MAGIC 0x68797548 nbd_device include/linux/nbd.h 133LO_MAGIC 0x68797548 nbd_device include/linux/nbd.h
143OPROFILE_MAGIC 0x6f70726f super_block drivers/oprofile/oprofilefs.h 134OPROFILE_MAGIC 0x6f70726f super_block drivers/oprofile/oprofilefs.h
144M3_STATE_MAGIC 0x734d724d m3_state sound/oss/maestro3.c 135M3_STATE_MAGIC 0x734d724d m3_state sound/oss/maestro3.c
145STL_PANELMAGIC 0x7ef621a1 stlpanel include/linux/stallion.h
146VMALLOC_MAGIC 0x87654320 snd_alloc_track sound/core/memory.c 136VMALLOC_MAGIC 0x87654320 snd_alloc_track sound/core/memory.c
147KMALLOC_MAGIC 0x87654321 snd_alloc_track sound/core/memory.c 137KMALLOC_MAGIC 0x87654321 snd_alloc_track sound/core/memory.c
148PWC_MAGIC 0x89DC10AB pwc_device drivers/usb/media/pwc.h 138PWC_MAGIC 0x89DC10AB pwc_device drivers/usb/media/pwc.h
149NBD_REPLY_MAGIC 0x96744668 nbd_reply include/linux/nbd.h 139NBD_REPLY_MAGIC 0x96744668 nbd_reply include/linux/nbd.h
150STL_BOARDMAGIC 0xa2267f52 stlbrd include/linux/stallion.h
151ENI155_MAGIC 0xa54b872d midway_eprom drivers/atm/eni.h 140ENI155_MAGIC 0xa54b872d midway_eprom drivers/atm/eni.h
152SCI_MAGIC 0xbabeface gs_port drivers/char/sh-sci.h 141SCI_MAGIC 0xbabeface gs_port drivers/char/sh-sci.h
153CODA_MAGIC 0xC0DAC0DA coda_file_info fs/coda/coda_fs_i.h 142CODA_MAGIC 0xC0DAC0DA coda_file_info fs/coda/coda_fs_i.h
154DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram drivers/scsi/gdth.h 143DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram drivers/scsi/gdth.h
155STLI_PORTMAGIC 0xe671c7a1 stliport include/linux/istallion.h
156YAM_MAGIC 0xF10A7654 yam_port drivers/net/hamradio/yam.c 144YAM_MAGIC 0xF10A7654 yam_port drivers/net/hamradio/yam.c
157CCB_MAGIC 0xf2691ad2 ccb drivers/scsi/ncr53c8xx.c 145CCB_MAGIC 0xf2691ad2 ccb drivers/scsi/ncr53c8xx.c
158QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry drivers/scsi/arm/queue.c 146QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry drivers/scsi/arm/queue.c
diff --git a/Documentation/networking/scaling.txt b/Documentation/networking/scaling.txt
index ca6977f5b2ed..99ca40e8e810 100644
--- a/Documentation/networking/scaling.txt
+++ b/Documentation/networking/scaling.txt
@@ -429,7 +429,7 @@ RPS and RFS were introduced in kernel 2.6.35. XPS was incorporated into
429(therbert@google.com) 429(therbert@google.com)
430 430
431Accelerated RFS was introduced in 2.6.35. Original patches were 431Accelerated RFS was introduced in 2.6.35. Original patches were
432submitted by Ben Hutchings (bhutchings@solarflare.com) 432submitted by Ben Hutchings (bwh@kernel.org)
433 433
434Authors: 434Authors:
435Tom Herbert (therbert@google.com) 435Tom Herbert (therbert@google.com)
diff --git a/Documentation/serial/00-INDEX b/Documentation/serial/00-INDEX
index f9c6b5ed03e7..8021a9f29fc5 100644
--- a/Documentation/serial/00-INDEX
+++ b/Documentation/serial/00-INDEX
@@ -2,23 +2,15 @@
2 - this file. 2 - this file.
3README.cycladesZ 3README.cycladesZ
4 - info on Cyclades-Z firmware loading. 4 - info on Cyclades-Z firmware loading.
5digiepca.txt
6 - info on Digi Intl. {PC,PCI,EISA}Xx and Xem series cards.
7driver 5driver
8 - intro to the low level serial driver. 6 - intro to the low level serial driver.
9moxa-smartio 7moxa-smartio
10 - file with info on installing/using Moxa multiport serial driver. 8 - file with info on installing/using Moxa multiport serial driver.
11n_gsm.txt 9n_gsm.txt
12 - GSM 0710 tty multiplexer howto. 10 - GSM 0710 tty multiplexer howto.
13riscom8.txt
14 - notes on using the RISCom/8 multi-port serial driver.
15rocket.txt 11rocket.txt
16 - info on the Comtrol RocketPort multiport serial driver. 12 - info on the Comtrol RocketPort multiport serial driver.
17serial-rs485.txt 13serial-rs485.txt
18 - info about RS485 structures and support in the kernel. 14 - info about RS485 structures and support in the kernel.
19specialix.txt
20 - info on hardware/driver for specialix IO8+ multiport serial card.
21sx.txt
22 - info on the Specialix SX/SI multiport serial driver.
23tty.txt 15tty.txt
24 - guide to the locking policies of the tty layer. 16 - guide to the locking policies of the tty layer.
diff --git a/Documentation/serial/digiepca.txt b/Documentation/serial/digiepca.txt
deleted file mode 100644
index f2560e22f2c9..000000000000
--- a/Documentation/serial/digiepca.txt
+++ /dev/null
@@ -1,98 +0,0 @@
1NOTE: This driver is obsolete. Digi provides a 2.6 driver (dgdm) at
2http://www.digi.com for PCI cards. They no longer maintain this driver,
3and have no 2.6 driver for ISA cards.
4
5This driver requires a number of user-space tools. They can be acquired from
6http://www.digi.com, but only works with 2.4 kernels.
7
8
9The Digi Intl. epca driver.
10----------------------------
11The Digi Intl. epca driver for Linux supports the following boards:
12
13Digi PC/Xem, PC/Xr, PC/Xe, PC/Xi, PC/Xeve
14Digi EISA/Xem, PCI/Xem, PCI/Xr
15
16Limitations:
17------------
18Currently the driver only autoprobes for supported PCI boards.
19
20The Linux MAKEDEV command does not support generating the Digiboard
21Devices. Users executing digiConfig to setup EISA and PC series cards
22will have their device nodes automatically constructed (cud?? for ~CLOCAL,
23and ttyD?? for CLOCAL). Users wishing to boot their board from the LILO
24prompt, or those users booting PCI cards may use buildDIGI to construct
25the necessary nodes.
26
27Notes:
28------
29This driver may be configured via LILO. For users who have already configured
30their driver using digiConfig, configuring from LILO will override previous
31settings. Multiple boards may be configured by issuing multiple LILO command
32lines. For examples see the bottom of this document.
33
34Device names start at 0 and continue up. Beware of this as previous Digi
35drivers started device names with 1.
36
37PCI boards are auto-detected and configured by the driver. PCI boards will
38be allocated device numbers (internally) beginning with the lowest PCI slot
39first. In other words a PCI card in slot 3 will always have higher device
40nodes than a PCI card in slot 1.
41
42LILO config examples:
43---------------------
44Using LILO's APPEND command, a string of comma separated identifiers or
45integers can be used to configure supported boards. The six values in order
46are:
47
48 Enable/Disable this card or Override,
49 Type of card: PC/Xe (AccelePort) (0), PC/Xeve (1), PC/Xem or PC/Xr (2),
50 EISA/Xem (3), PC/64Xe (4), PC/Xi (5),
51 Enable/Disable alternate pin arrangement,
52 Number of ports on this card,
53 I/O Port where card is configured (in HEX if using string identifiers),
54 Base of memory window (in HEX if using string identifiers),
55
56NOTE : PCI boards are auto-detected and configured. Do not attempt to
57configure PCI boards with the LILO append command. If you wish to override
58previous configuration data (As set by digiConfig), but you do not wish to
59configure any specific card (Example if there are PCI cards in the system)
60the following override command will accomplish this:
61-> append="digi=2"
62
63Samples:
64 append="digiepca=E,PC/Xe,D,16,200,D0000"
65 or
66 append="digi=1,0,0,16,512,851968"
67
68Supporting Tools:
69-----------------
70Supporting tools include digiDload, digiConfig, buildPCI, and ditty. See
71drivers/char/README.epca for more details. Note,
72this driver REQUIRES that digiDload be executed prior to it being used.
73Failure to do this will result in an ENODEV error.
74
75Documentation:
76--------------
77Complete documentation for this product may be found in the tool package.
78
79Sources of information and support:
80-----------------------------------
81Digi Intl. support site for this product:
82
83-> http://www.digi.com
84
85Acknowledgments:
86----------------
87Much of this work (And even text) was derived from a similar document
88supporting the original public domain DigiBoard driver Copyright (C)
891994,1995 Troy De Jongh. Many thanks to Christoph Lameter
90(christoph@lameter.com) and Mike McLagan (mike.mclagan@linux.org) who authored
91and contributed to the original document.
92
93Changelog:
94----------
9510-29-04: Update status of driver, remove dead links in document
96 James Nelson <james4765@gmail.com>
97
982000 (?) Original Document
diff --git a/Documentation/serial/riscom8.txt b/Documentation/serial/riscom8.txt
deleted file mode 100644
index 14f61fdad7ca..000000000000
--- a/Documentation/serial/riscom8.txt
+++ /dev/null
@@ -1,36 +0,0 @@
1* NOTE - this is an unmaintained driver. The original author cannot be located.
2
3SDL Communications is now SBS Technologies, and does not have any
4information on these ancient ISA cards on their website.
5
6James Nelson <james4765@gmail.com> - 12-12-2004
7
8 This is the README for RISCom/8 multi-port serial driver
9 (C) 1994-1996 D.Gorodchanin
10 See file LICENSE for terms and conditions.
11
12NOTE: English is not my native language.
13 I'm sorry for any mistakes in this text.
14
15Misc. notes for RISCom/8 serial driver, in no particular order :)
16
171) This driver can support up to 4 boards at time.
18 Use string "riscom8=0xXXX,0xXXX,0xXXX,0xXXX" at LILO prompt, for
19 setting I/O base addresses for boards. If you compile driver
20 as module use modprobe options "iobase=0xXXX iobase1=0xXXX iobase2=..."
21
222) The driver partially supports famous 'setserial' program, you can use almost
23 any of its options, excluding port & irq settings.
24
253) There are some misc. defines at the beginning of riscom8.c, please read the
26 comments and try to change some of them in case of problems.
27
284) I consider the current state of the driver as BETA.
29
305) SDL Communications WWW page is http://www.sdlcomm.com.
31
326) You can use the MAKEDEV program to create RISCom/8 /dev/ttyL* entries.
33
347) Minor numbers for first board are 0-7, for second 8-15, etc.
35
3622 Apr 1996.
diff --git a/Documentation/serial/specialix.txt b/Documentation/serial/specialix.txt
deleted file mode 100644
index 6eb6f3a3331c..000000000000
--- a/Documentation/serial/specialix.txt
+++ /dev/null
@@ -1,383 +0,0 @@
1
2 specialix.txt -- specialix IO8+ multiport serial driver readme.
3
4
5
6 Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl)
7
8 Specialix pays for the development and support of this driver.
9 Please DO contact io8-linux@specialix.co.uk if you require
10 support.
11
12 This driver was developed in the BitWizard linux device
13 driver service. If you require a linux device driver for your
14 product, please contact devices@BitWizard.nl for a quote.
15
16 This code is firmly based on the riscom/8 serial driver,
17 written by Dmitry Gorodchanin. The specialix IO8+ card
18 programming information was obtained from the CL-CD1865 Data
19 Book, and Specialix document number 6200059: IO8+ Hardware
20 Functional Specification, augmented by document number 6200088:
21 Merak Hardware Functional Specification. (IO8+/PCI is also
22 called Merak)
23
24
25 This program is free software; you can redistribute it and/or
26 modify it under the terms of the GNU General Public License as
27 published by the Free Software Foundation; either version 2 of
28 the License, or (at your option) any later version.
29
30 This program is distributed in the hope that it will be
31 useful, but WITHOUT ANY WARRANTY; without even the implied
32 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
33 PURPOSE. See the GNU General Public License for more details.
34
35 You should have received a copy of the GNU General Public
36 License along with this program; if not, write to the Free
37 Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
38 USA.
39
40
41Intro
42=====
43
44
45This file contains some random information, that I like to have online
46instead of in a manual that can get lost. Ever misplace your Linux
47kernel sources? And the manual of one of the boards in your computer?
48
49
50Addresses and interrupts
51========================
52
53Address dip switch settings:
54The dip switch sets bits 2-9 of the IO address.
55
56 9 8 7 6 5 4 3 2
57 +-----------------+
58 0 | X X X X X X X |
59 | | = IoBase = 0x100
60 1 | X |
61 +-----------------+ ------ RS232 connectors ---->
62
63 | | |
64 edge connector
65 | | |
66 V V V
67
68Base address 0x100 caused a conflict in one of my computers once. I
69haven't the foggiest why. My Specialix card is now at 0x180. My
70other computer runs just fine with the Specialix card at 0x100....
71The card occupies 4 addresses, but actually only two are really used.
72
73The PCI version doesn't have any dip switches. The BIOS assigns
74an IO address.
75
76The driver now still autoprobes at 0x100, 0x180, 0x250 and 0x260. If
77that causes trouble for you, please report that. I'll remove
78autoprobing then.
79
80The driver will tell the card what IRQ to use, so you don't have to
81change any jumpers to change the IRQ. Just use a command line
82argument (irq=xx) to the insmod program to set the interrupt.
83
84The BIOS assigns the IRQ on the PCI version. You have no say in what
85IRQ to use in that case.
86
87If your specialix cards are not at the default locations, you can use
88the kernel command line argument "specialix=io0,irq0,io1,irq1...".
89Here "io0" is the io address for the first card, and "irq0" is the
90irq line that the first card should use. And so on.
91
92Examples.
93
94You use the driver as a module and have three cards at 0x100, 0x250
95and 0x180. And some way or another you want them detected in that
96order. Moreover irq 12 is taken (e.g. by your PS/2 mouse).
97
98 insmod specialix.o iobase=0x100,0x250,0x180 irq=9,11,15
99
100The same three cards, but now in the kernel would require you to
101add
102
103 specialix=0x100,9,0x250,11,0x180,15
104
105to the command line. This would become
106
107 append="specialix=0x100,9,0x250,11,0x180,15"
108
109in your /etc/lilo.conf file if you use lilo.
110
111The Specialix driver is slightly odd: It allows you to have the second
112or third card detected without having a first card. This has
113advantages and disadvantages. A slot that isn't filled by an ISA card,
114might be filled if a PCI card is detected. Thus if you have an ISA
115card at 0x250 and a PCI card, you would get:
116
117sx0: specialix IO8+ Board at 0x100 not found.
118sx1: specialix IO8+ Board at 0x180 not found.
119sx2: specialix IO8+ board detected at 0x250, IRQ 12, CD1865 Rev. B.
120sx3: specialix IO8+ Board at 0x260 not found.
121sx0: specialix IO8+ board detected at 0xd800, IRQ 9, CD1865 Rev. B.
122
123This would happen if you don't give any probe hints to the driver.
124If you would specify:
125
126 specialix=0x250,11
127
128you'd get the following messages:
129
130sx0: specialix IO8+ board detected at 0x250, IRQ 11, CD1865 Rev. B.
131sx1: specialix IO8+ board detected at 0xd800, IRQ 9, CD1865 Rev. B.
132
133ISA probing is aborted after the IO address you gave is exhausted, and
134the PCI card is now detected as the second card. The ISA card is now
135also forced to IRQ11....
136
137
138Baud rates
139==========
140
141The rev 1.2 and below boards use a CL-CD1864. These chips can only
142do 64kbit. The rev 1.3 and newer boards use a CL-CD1865. These chips
143are officially capable of 115k2.
144
145The Specialix card uses a 25MHz crystal (in times two mode, which in
146fact is a divided by two mode). This is not enough to reach the rated
147115k2 on all ports at the same time. With this clock rate you can only
148do 37% of this rate. This means that at 115k2 on all ports you are
149going to lose characters (The chip cannot handle that many incoming
150bits at this clock rate.) (Yes, you read that correctly: there is a
151limit to the number of -=bits=- per second that the chip can handle.)
152
153If you near the "limit" you will first start to see a graceful
154degradation in that the chip cannot keep the transmitter busy at all
155times. However with a central clock this slow, you can also get it to
156miss incoming characters. The driver will print a warning message when
157you are outside the official specs. The messages usually show up in
158the file /var/log/messages .
159
160The specialix card cannot reliably do 115k2. If you use it, you have
161to do "extensive testing" (*) to verify if it actually works.
162
163When "mgetty" communicates with my modem at 115k2 it reports:
164got: +++[0d]ATQ0V1H0[0d][0d][8a]O[cb][0d][8a]
165 ^^^^ ^^^^ ^^^^
166
167The three characters that have the "^^^" under them have suffered a
168bit error in the highest bit. In conclusion: I've tested it, and found
169that it simply DOESN'T work for me. I also suspect that this is also
170caused by the baud rate being just a little bit out of tune.
171
172I upgraded the crystal to 66Mhz on one of my Specialix cards. Works
173great! Contact me for details. (Voids warranty, requires a steady hand
174and more such restrictions....)
175
176
177(*) Cirrus logic CD1864 databook, page 40.
178
179
180Cables for the Specialix IO8+
181=============================
182
183The pinout of the connectors on the IO8+ is:
184
185 pin short direction long name
186 name
187 Pin 1 DCD input Data Carrier Detect
188 Pin 2 RXD input Receive
189 Pin 3 DTR/RTS output Data Terminal Ready/Ready To Send
190 Pin 4 GND - Ground
191 Pin 5 TXD output Transmit
192 Pin 6 CTS input Clear To Send
193
194
195 -- 6 5 4 3 2 1 --
196 | |
197 | |
198 | |
199 | |
200 +----- -----+
201 |__________|
202 clip
203
204 Front view of an RJ12 connector. Cable moves "into" the paper.
205 (the plug is ready to plug into your mouth this way...)
206
207
208 NULL cable. I don't know who is going to use these except for
209 testing purposes, but I tested the cards with this cable. (It
210 took quite a while to figure out, so I'm not going to delete
211 it. So there! :-)
212
213
214 This end goes This end needs
215 straight into the some twists in
216 RJ12 plug. the wiring.
217 IO8+ RJ12 IO8+ RJ12
218 1 DCD white -
219 - - 1 DCD
220 2 RXD black 5 TXD
221 3 DTR/RTS red 6 CTS
222 4 GND green 4 GND
223 5 TXD yellow 2 RXD
224 6 CTS blue 3 DTR/RTS
225
226
227 Same NULL cable, but now sorted on the second column.
228
229 1 DCD white -
230 - - 1 DCD
231 5 TXD yellow 2 RXD
232 6 CTS blue 3 DTR/RTS
233 4 GND green 4 GND
234 2 RXD black 5 TXD
235 3 DTR/RTS red 6 CTS
236
237
238
239 This is a modem cable usable for hardware handshaking:
240 RJ12 DB25 DB9
241 1 DCD white 8 DCD 1 DCD
242 2 RXD black 3 RXD 2 RXD
243 3 DTR/RTS red 4 RTS 7 RTS
244 4 GND green 7 GND 5 GND
245 5 TXD yellow 2 TXD 3 TXD
246 6 CTS blue 5 CTS 8 CTS
247 +---- 6 DSR 6 DSR
248 +---- 20 DTR 4 DTR
249
250 This is a modem cable usable for software handshaking:
251 It allows you to reset the modem using the DTR ioctls.
252 I (REW) have never tested this, "but xxxxxxxxxxxxx
253 says that it works." If you test this, please
254 tell me and I'll fill in your name on the xxx's.
255
256 RJ12 DB25 DB9
257 1 DCD white 8 DCD 1 DCD
258 2 RXD black 3 RXD 2 RXD
259 3 DTR/RTS red 20 DTR 4 DTR
260 4 GND green 7 GND 5 GND
261 5 TXD yellow 2 TXD 3 TXD
262 6 CTS blue 5 CTS 8 CTS
263 +---- 6 DSR 6 DSR
264 +---- 4 RTS 7 RTS
265
266 I bought a 6 wire flat cable. It was colored as indicated.
267 Check that yours is the same before you trust me on this.
268
269
270Hardware handshaking issues.
271============================
272
273The driver can be told to operate in two different ways. The default
274behaviour is specialix.sx_rtscts = 0 where the pin behaves as DTR when
275hardware handshaking is off. It behaves as the RTS hardware
276handshaking signal when hardware handshaking is selected.
277
278When you use this, you have to use the appropriate cable. The
279cable will either be compatible with hardware handshaking or with
280software handshaking. So switching on the fly is not really an
281option.
282
283I actually prefer to use the "specialix.sx_rtscts=1" option.
284This makes the DTR/RTS pin always an RTS pin, and ioctls to
285change DTR are always ignored. I have a cable that is configured
286for this.
287
288
289Ports and devices
290=================
291
292Port 0 is the one furthest from the card-edge connector.
293
294Devices:
295
296You should make the devices as follows:
297
298bash
299cd /dev
300for i in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 \
301 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
302do
303 echo -n "$i "
304 mknod /dev/ttyW$i c 75 $i
305 mknod /dev/cuw$i c 76 $i
306done
307echo ""
308
309If your system doesn't come with these devices preinstalled, bug your
310linux-vendor about this. They have had ample time to get this
311implemented by now.
312
313You cannot have more than 4 boards in one computer. The card only
314supports 4 different interrupts. If you really want this, contact me
315about this and I'll give you a few tips (requires soldering iron)....
316
317If you have enough PCI slots, you can probably use more than 4 PCI
318versions of the card though....
319
320The PCI version of the card cannot adhere to the mechanical part of
321the PCI spec because the 8 serial connectors are simply too large. If
322it doesn't fit in your computer, bring back the card.
323
324
325------------------------------------------------------------------------
326
327
328 Fixed bugs and restrictions:
329 - During initialization, interrupts are blindly turned on.
330 Having a shadow variable would cause an extra memory
331 access on every IO instruction.
332 - The interrupt (on the card) should be disabled when we
333 don't allocate the Linux end of the interrupt. This allows
334 a different driver/card to use it while all ports are not in
335 use..... (a la standard serial port)
336 == An extra _off variant of the sx_in and sx_out macros are
337 now available. They don't set the interrupt enable bit.
338 These are used during initialization. Normal operation uses
339 the old variant which enables the interrupt line.
340 - RTS/DTR issue needs to be implemented according to
341 specialix' spec.
342 I kind of like the "determinism" of the current
343 implementation. Compile time flag?
344 == Ok. Compile time flag! Default is how Specialix likes it.
345 == Now a config time flag! Gets saved in your config file. Neat!
346 - Can you set the IO address from the lilo command line?
347 If you need this, bug me about it, I'll make it.
348 == Hah! No bugging needed. Fixed! :-)
349 - Cirrus logic hasn't gotten back to me yet why the CD1865 can
350 and the CD1864 can't do 115k2. I suspect that this is
351 because the CD1864 is not rated for 33MHz operation.
352 Therefore the CD1864 versions of the card can't do 115k2 on
353 all ports just like the CD1865 versions. The driver does
354 not block 115k2 on CD1864 cards.
355 == I called the Cirrus Logic representative here in Holland.
356 The CD1864 databook is identical to the CD1865 databook,
357 except for an extra warning at the end. Similar Bit errors
358 have been observed in testing at 115k2 on both an 1865 and
359 a 1864 chip. I see no reason why I would prohibit 115k2 on
360 1864 chips and not do it on 1865 chips. Actually there is
361 reason to prohibit it on BOTH chips. I print a warning.
362 If you use 115k2, you're on your own.
363 - A spiky CD may send spurious HUPs. Also in CLOCAL???
364 -- A fix for this turned out to be counter productive.
365 Different fix? Current behaviour is acceptable?
366 -- Maybe the current implementation is correct. If anybody
367 gets bitten by this, please report, and it will get fixed.
368
369 -- Testing revealed that when in CLOCAL, the problem doesn't
370 occur. As warned for in the CD1865 manual, the chip may
371 send modem intr's on a spike. We could filter those out,
372 but that would be a cludge anyway (You'd still risk getting
373 a spurious HUP when two spikes occur.).....
374
375
376
377 Bugs & restrictions:
378 - This is a difficult card to autoprobe.
379 You have to WRITE to the address register to even
380 read-probe a CD186x register. Disable autodetection?
381 -- Specialix: any suggestions?
382
383
diff --git a/Documentation/serial/sx.txt b/Documentation/serial/sx.txt
deleted file mode 100644
index cb4efa0fb5cc..000000000000
--- a/Documentation/serial/sx.txt
+++ /dev/null
@@ -1,294 +0,0 @@
1
2 sx.txt -- specialix SX/SI multiport serial driver readme.
3
4
5
6 Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl)
7
8 Specialix pays for the development and support of this driver.
9 Please DO contact support@specialix.co.uk if you require
10 support.
11
12 This driver was developed in the BitWizard linux device
13 driver service. If you require a linux device driver for your
14 product, please contact devices@BitWizard.nl for a quote.
15
16 (History)
17 There used to be an SI driver by Simon Allan. This is a complete
18 rewrite from scratch. Just a few lines-of-code have been snatched.
19
20 (Sources)
21 Specialix document number 6210028: SX Host Card and Download Code
22 Software Functional Specification.
23
24 (Copying)
25 This program is free software; you can redistribute it and/or
26 modify it under the terms of the GNU General Public License as
27 published by the Free Software Foundation; either version 2 of
28 the License, or (at your option) any later version.
29
30 This program is distributed in the hope that it will be
31 useful, but WITHOUT ANY WARRANTY; without even the implied
32 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
33 PURPOSE. See the GNU General Public License for more details.
34
35 You should have received a copy of the GNU General Public
36 License along with this program; if not, write to the Free
37 Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
38 USA.
39
40 (Addendum)
41 I'd appreciate it that if you have fixes, that you send them
42 to me first.
43
44
45Introduction
46============
47
48This file contains some random information, that I like to have online
49instead of in a manual that can get lost. Ever misplace your Linux
50kernel sources? And the manual of one of the boards in your computer?
51
52
53Theory of operation
54===================
55
56An important thing to know is that the driver itself doesn't have the
57firmware for the card. This means that you need the separate package
58"sx_firmware". For now you can get the source at
59
60 ftp://ftp.bitwizard.nl/specialix/sx_firmware_<version>.tgz
61
62The firmware load needs a "misc" device, so you'll need to enable the
63"Support for user misc device modules" in your kernel configuration.
64The misc device needs to be called "/dev/specialix_sxctl". It needs
65misc major 10, and minor number 167 (assigned by HPA). The section
66on creating device files below also creates this device.
67
68After loading the sx.o module into your kernel, the driver will report
69the number of cards detected, but because it doesn't have any
70firmware, it will not be able to determine the number of ports. Only
71when you then run "sx_firmware" will the firmware be downloaded and
72the rest of the driver initialized. At that time the sx_firmware
73program will report the number of ports installed.
74
75In contrast with many other multi port serial cards, some of the data
76structures are only allocated when the card knows the number of ports
77that are connected. This means we won't waste memory for 120 port
78descriptor structures when you only have 8 ports. If you experience
79problems due to this, please report them: I haven't seen any.
80
81
82Interrupts
83==========
84
85A multi port serial card, would generate a horrendous amount of
86interrupts if it would interrupt the CPU for every received
87character. Even more than 10 years ago, the trick not to use
88interrupts but to poll the serial cards was invented.
89
90The SX card allow us to do this two ways. First the card limits its
91own interrupt rate to a rate that won't overwhelm the CPU. Secondly,
92we could forget about the cards interrupt completely and use the
93internal timer for this purpose.
94
95Polling the card can take up to a few percent of your CPU. Using the
96interrupts would be better if you have most of the ports idle. Using
97timer-based polling is better if your card almost always has work to
98do. You save the separate interrupt in that case.
99
100In any case, it doesn't really matter all that much.
101
102The most common problem with interrupts is that for ISA cards in a PCI
103system the BIOS has to be told to configure that interrupt as "legacy
104ISA". Otherwise the card can pull on the interrupt line all it wants
105but the CPU won't see this.
106
107If you can't get the interrupt to work, remember that polling mode is
108more efficient (provided you actually use the card intensively).
109
110
111Allowed Configurations
112======================
113
114Some configurations are disallowed. Even though at a glance they might
115seem to work, they are known to lockup the bus between the host card
116and the device concentrators. You should respect the drivers decision
117not to support certain configurations. It's there for a reason.
118
119Warning: Seriously technical stuff ahead. Executive summary: Don't use
120SX cards except configured at a 64k boundary. Skip the next paragraph.
121
122The SX cards can theoretically be placed at a 32k boundary. So for
123instance you can put an SX card at 0xc8000-0xd7fff. This is not a
124"recommended configuration". ISA cards have to tell the bus controller
125how they like their timing. Due to timing issues they have to do this
126based on which 64k window the address falls into. This means that the
12732k window below and above the SX card have to use exactly the same
128timing as the SX card. That reportedly works for other SX cards. But
129you're still left with two useless 32k windows that should not be used
130by anybody else.
131
132
133Configuring the driver
134======================
135
136PCI cards are always detected. The driver auto-probes for ISA cards at
137some sensible addresses. Please report if the auto-probe causes trouble
138in your system, or when a card isn't detected.
139
140I'm afraid I haven't implemented "kernel command line parameters" yet.
141This means that if the default doesn't work for you, you shouldn't use
142the compiled-into-the-kernel version of the driver. Use a module
143instead. If you convince me that you need this, I'll make it for
144you. Deal?
145
146I'm afraid that the module parameters are a bit clumsy. If you have a
147better idea, please tell me.
148
149You can specify several parameters:
150
151 sx_poll: number of jiffies between timer-based polls.
152
153 Set this to "0" to disable timer based polls.
154 Initialization of cards without a working interrupt
155 will fail.
156
157 Set this to "1" if you want a polling driver.
158 (on Intel: 100 polls per second). If you don't use
159 fast baud rates, you might consider a value like "5".
160 (If you don't know how to do the math, use 1).
161
162 sx_slowpoll: Number of jiffies between timer-based polls.
163 Set this to "100" to poll once a second.
164 This should get the card out of a stall if the driver
165 ever misses an interrupt. I've never seen this happen,
166 and if it does, that's a bug. Tell me.
167
168 sx_maxints: Number of interrupts to request from the card.
169 The card normally limits interrupts to about 100 per
170 second to offload the host CPU. You can increase this
171 number to reduce latency on the card a little.
172 Note that if you give a very high number you can overload
173 your CPU as well as the CPU on the host card. This setting
174 is inaccurate and not recommended for SI cards (But it
175 works).
176
177 sx_irqmask: The mask of allowable IRQs to use. I suggest you set
178 this to 0 (disable IRQs all together) and use polling if
179 the assignment of IRQs becomes problematic. This is defined
180 as the sum of (1 << irq) 's that you want to allow. So
181 sx_irqmask of 8 (1 << 3) specifies that only irq 3 may
182 be used by the SX driver. If you want to specify to the
183 driver: "Either irq 11 or 12 is ok for you to use", then
184 specify (1 << 11) | (1 << 12) = 0x1800 .
185
186 sx_debug: You can enable different sorts of debug traces with this.
187 At "-1" all debugging traces are active. You'll get several
188 times more debugging output than you'll get characters
189 transmitted.
190
191
192Baud rates
193==========
194
195Theoretically new SXDCs should be capable of more than 460k
196baud. However the line drivers usually give up before that. Also the
197CPU on the card may not be able to handle 8 channels going at full
198blast at that speed. Moreover, the buffers are not large enough to
199allow operation with 100 interrupts per second. You'll have to realize
200that the card has a 256 byte buffer, so you'll have to increase the
201number of interrupts per second if you have more than 256*100 bytes
202per second to transmit. If you do any performance testing in this
203area, I'd be glad to hear from you...
204
205(Psst Linux users..... I think the Linux driver is more efficient than
206the driver for other OSes. If you can and want to benchmark them
207against each other, be my guest, and report your findings...... :-)
208
209
210Ports and devices
211=================
212
213Port 0 is the top connector on the module closest to the host
214card. Oh, the ports on the SXDCs and TAs are labelled from 1 to 8
215instead of from 0 to 7, as they are numbered by linux. I'm stubborn in
216this: I know for sure that I wouldn't be able to calculate which port
217is which anymore if I would change that....
218
219
220Devices:
221
222You should make the device files as follows:
223
224#!/bin/sh
225# (I recommend that you cut-and-paste this into a file and run that)
226cd /dev
227t=0
228mknod specialix_sxctl c 10 167
229while [ $t -lt 64 ]
230 do
231 echo -n "$t "
232 mknod ttyX$t c 32 $t
233 mknod cux$t c 33 $t
234 t=`expr $t + 1`
235done
236echo ""
237rm /etc/psdevtab
238ps > /dev/null
239
240
241This creates 64 devices. If you have more, increase the constant on
242the line with "while". The devices start at 0, as is customary on
243Linux. Specialix seems to like starting the numbering at 1.
244
245If your system doesn't come with these devices pre-installed, bug your
246linux-vendor about this. They should have these devices
247"pre-installed" before the new millennium. The "ps" stuff at the end
248is to "tell" ps that the new devices exist.
249
250Officially the maximum number of cards per computer is 4. This driver
251however supports as many cards in one machine as you want. You'll run
252out of interrupts after a few, but you can switch to polled operation
253then. At about 256 ports (More than 8 cards), we run out of minor
254device numbers. Sorry. I suggest you buy a second computer.... (Or
255switch to RIO).
256
257------------------------------------------------------------------------
258
259
260 Fixed bugs and restrictions:
261 - Hangup processing.
262 -- Done.
263
264 - the write path in generic_serial (lockup / oops).
265 -- Done (Ugly: not the way I want it. Copied from serial.c).
266
267 - write buffer isn't flushed at close.
268 -- Done. I still seem to lose a few chars at close.
269 Sorry. I think that this is a firmware issue. (-> Specialix)
270
271 - drain hardware before changing termios
272 - Change debug on the fly.
273 - ISA free irq -1. (no firmware loaded).
274 - adding c8000 as a probe address. Added warning.
275 - Add a RAMtest for the RAM on the card.c
276 - Crash when opening a port "way" of the number of allowed ports.
277 (for example opening port 60 when there are only 24 ports attached)
278 - Sometimes the use-count strays a bit. After a few hours of
279 testing the use count is sometimes "3". If you are not like
280 me and can remember what you did to get it that way, I'd
281 appreciate an Email. Possibly fixed. Tell me if anyone still
282 sees this.
283 - TAs don't work right if you don't connect all the modem control
284 signals. SXDCs do. T225 firmware problem -> Specialix.
285 (Mostly fixed now, I think. Tell me if you encounter this!)
286
287 Bugs & restrictions:
288
289 - Arbitrary baud rates. Requires firmware update. (-> Specialix)
290
291 - Low latency (mostly firmware, -> Specialix)
292
293
294
diff --git a/Documentation/stable_kernel_rules.txt b/Documentation/stable_kernel_rules.txt
index b0714d8f678a..cbc2f03056bd 100644
--- a/Documentation/stable_kernel_rules.txt
+++ b/Documentation/stable_kernel_rules.txt
@@ -39,7 +39,7 @@ Procedure for submitting patches to the -stable tree:
39 the stable tree without anything else needing to be done by the author 39 the stable tree without anything else needing to be done by the author
40 or subsystem maintainer. 40 or subsystem maintainer.
41 - If the patch requires other patches as prerequisites which can be 41 - If the patch requires other patches as prerequisites which can be
42 cherry-picked than this can be specified in the following format in 42 cherry-picked, then this can be specified in the following format in
43 the sign-off area: 43 the sign-off area:
44 44
45 Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle 45 Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle
diff --git a/Documentation/vm/numa_memory_policy.txt b/Documentation/vm/numa_memory_policy.txt
index 4e7da6543424..badb0507608f 100644
--- a/Documentation/vm/numa_memory_policy.txt
+++ b/Documentation/vm/numa_memory_policy.txt
@@ -174,7 +174,6 @@ Components of Memory Policies
174 allocation fails, the kernel will search other nodes, in order of 174 allocation fails, the kernel will search other nodes, in order of
175 increasing distance from the preferred node based on information 175 increasing distance from the preferred node based on information
176 provided by the platform firmware. 176 provided by the platform firmware.
177 containing the cpu where the allocation takes place.
178 177
179 Internally, the Preferred policy uses a single node--the 178 Internally, the Preferred policy uses a single node--the
180 preferred_node member of struct mempolicy. When the internal 179 preferred_node member of struct mempolicy. When the internal
@@ -275,9 +274,9 @@ Components of Memory Policies
275 For example, consider a task that is attached to a cpuset with 274 For example, consider a task that is attached to a cpuset with
276 mems 2-5 that sets an Interleave policy over the same set with 275 mems 2-5 that sets an Interleave policy over the same set with
277 MPOL_F_RELATIVE_NODES. If the cpuset's mems change to 3-7, the 276 MPOL_F_RELATIVE_NODES. If the cpuset's mems change to 3-7, the
278 interleave now occurs over nodes 3,5-6. If the cpuset's mems 277 interleave now occurs over nodes 3,5-7. If the cpuset's mems
279 then change to 0,2-3,5, then the interleave occurs over nodes 278 then change to 0,2-3,5, then the interleave occurs over nodes
280 0,3,5. 279 0,2-3,5.
281 280
282 Thanks to the consistent remapping, applications preparing 281 Thanks to the consistent remapping, applications preparing
283 nodemasks to specify memory policies using this flag should 282 nodemasks to specify memory policies using this flag should
diff --git a/Documentation/zh_CN/HOWTO b/Documentation/zh_CN/HOWTO
index 6c914aa87e71..54ea24ff63c7 100644
--- a/Documentation/zh_CN/HOWTO
+++ b/Documentation/zh_CN/HOWTO
@@ -237,7 +237,7 @@ kernel.org网站的pub/linux/kernel/v2.6/目录下找到它。它的开å‘éµå¾ª
237如果没有2.6.x.y版本内核存在,那么最新的2.6.x版本内核就相当于是当å‰çš„稳定 237如果没有2.6.x.y版本内核存在,那么最新的2.6.x版本内核就相当于是当å‰çš„稳定
238版内核。 238版内核。
239 239
2402.6.x.y版本由“稳定版â€å°ç»„(邮件地å€<stable@kernel.org>ï¼‰ç»´æŠ¤ï¼Œä¸€èˆ¬éš”å‘¨å‘ 2402.6.x.y版本由“稳定版â€å°ç»„(邮件地å€<stable@vger.kernel.org>)维护,一般隔周å‘
241布新版本。 241布新版本。
242 242
243内核æºç ä¸­çš„Documentation/stable_kernel_rules.txt文件具体æè¿°äº†å¯è¢«ç¨³å®š 243内核æºç ä¸­çš„Documentation/stable_kernel_rules.txt文件具体æè¿°äº†å¯è¢«ç¨³å®š
diff --git a/Documentation/zh_CN/io_ordering.txt b/Documentation/zh_CN/io_ordering.txt
new file mode 100644
index 000000000000..e592daf4e014
--- /dev/null
+++ b/Documentation/zh_CN/io_ordering.txt
@@ -0,0 +1,67 @@
1Chinese translated version of Documentation/io_orderings.txt
2
3If you have any comment or update to the content, please contact the
4original document maintainer directly. However, if you have a problem
5communicating in English you can also ask the Chinese maintainer for
6help. Contact the Chinese maintainer if this translation is outdated
7or if there is a problem with the translation.
8
9Chinese maintainer: Lin Yongting <linyongting@gmail.com>
10---------------------------------------------------------------------
11Documentation/io_ordering.txt 的中文翻译
12
13如果想评论或更新本文的内容,请直接è”系原文档的维护者。如果你使用英文
14äº¤æµæœ‰å›°éš¾çš„è¯ï¼Œä¹Ÿå¯ä»¥å‘中文版维护者求助。如果本翻译更新ä¸åŠæ—¶æˆ–者翻
15译存在问题,请è”系中文版维护者。
16
17中文版维护者: æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com>
18中文版翻译者: æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com>
19中文版校译者: æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com>
20
21
22以下为正文
23---------------------------------------------------------------------
24
25在æŸäº›å¹³å°ä¸Šï¼Œæ‰€è°“的内存映射I/O是弱顺åºã€‚在这些平å°ä¸Šï¼Œé©±åЍ开å‘者有责任
26ä¿è¯I/O内存映射地å€çš„写æ“作按程åºå›¾æ„的顺åºè¾¾åˆ°è®¾å¤‡ã€‚通常读å–一个“安全â€
27设备寄存器或桥寄存器,触å‘IO芯片清刷未处ç†çš„写æ“ä½œåˆ°è¾¾è®¾å¤‡åŽæ‰å¤„ç†è¯»æ“作,
28而达到ä¿è¯ç›®çš„。驱动程åºé€šå¸¸åœ¨spinlockä¿æŠ¤çš„ä¸´ç•ŒåŒºé€€å‡ºä¹‹å‰ä½¿ç”¨è¿™ç§æŠ€æœ¯ã€‚
29这也å¯ä»¥ä¿è¯åŽé¢çš„写æ“作åªåœ¨å‰é¢çš„写æ“作之åŽåˆ°è¾¾è®¾å¤‡ï¼ˆè¿™éžå¸¸ç±»ä¼¼äºŽå†…å­˜
30å±éšœæ“ä½œï¼Œmb(),ä¸è¿‡ä»…适用于I/O)。
31
32å‡è®¾ä¸€ä¸ªè®¾å¤‡é©±åŠ¨ç¨‹çš„å…·ä½“ä¾‹å­ï¼š
33
34 ...
35CPU A: spin_lock_irqsave(&dev_lock, flags)
36CPU A: val = readl(my_status);
37CPU A: ...
38CPU A: writel(newval, ring_ptr);
39CPU A: spin_unlock_irqrestore(&dev_lock, flags)
40 ...
41CPU B: spin_lock_irqsave(&dev_lock, flags)
42CPU B: val = readl(my_status);
43CPU B: ...
44CPU B: writel(newval2, ring_ptr);
45CPU B: spin_unlock_irqrestore(&dev_lock, flags)
46 ...
47
48上述例å­ä¸­ï¼Œè®¾å¤‡å¯èƒ½ä¼šå…ˆæŽ¥æ”¶åˆ°newval2çš„å€¼ï¼Œç„¶åŽæŽ¥æ”¶åˆ°newval的值,问题就
49å‘生了。ä¸è¿‡å¾ˆå®¹æ˜“é€šè¿‡ä¸‹é¢æ–¹æ³•æ¥ä¿®å¤ï¼š
50
51 ...
52CPU A: spin_lock_irqsave(&dev_lock, flags)
53CPU A: val = readl(my_status);
54CPU A: ...
55CPU A: writel(newval, ring_ptr);
56CPU A: (void)readl(safe_register); /* é…置寄存器?*/
57CPU A: spin_unlock_irqrestore(&dev_lock, flags)
58 ...
59CPU B: spin_lock_irqsave(&dev_lock, flags)
60CPU B: val = readl(my_status);
61CPU B: ...
62CPU B: writel(newval2, ring_ptr);
63CPU B: (void)readl(safe_register); /* é…置寄存器?*/
64CPU B: spin_unlock_irqrestore(&dev_lock, flags)
65
66在解决方案中,读å–safe_register寄存器,触å‘IO芯片清刷未处ç†çš„写æ“作,
67å†å¤„ç†åŽé¢çš„读æ“ä½œï¼Œé˜²æ­¢å¼•å‘æ•°æ®ä¸ä¸€è‡´é—®é¢˜ã€‚
diff --git a/Documentation/zh_CN/magic-number.txt b/Documentation/zh_CN/magic-number.txt
index 2ebe539f5450..dfb72a5c63e9 100644
--- a/Documentation/zh_CN/magic-number.txt
+++ b/Documentation/zh_CN/magic-number.txt
@@ -63,8 +63,6 @@ struct tty_ldisc {
63PG_MAGIC 'P' pg_{read,write}_hdr include/linux/pg.h 63PG_MAGIC 'P' pg_{read,write}_hdr include/linux/pg.h
64CMAGIC 0x0111 user include/linux/a.out.h 64CMAGIC 0x0111 user include/linux/a.out.h
65MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h 65MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h
66RISCOM8_MAGIC 0x0907 riscom_port drivers/char/riscom8.h
67SPECIALIX_MAGIC 0x0907 specialix_port drivers/char/specialix_io8.h
68HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c 66HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c
69APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c 67APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c
70CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h 68CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h
@@ -82,7 +80,6 @@ STRIP_MAGIC 0x5303 strip drivers/net/strip.c
82X25_ASY_MAGIC 0x5303 x25_asy drivers/net/x25_asy.h 80X25_ASY_MAGIC 0x5303 x25_asy drivers/net/x25_asy.h
83SIXPACK_MAGIC 0x5304 sixpack drivers/net/hamradio/6pack.h 81SIXPACK_MAGIC 0x5304 sixpack drivers/net/hamradio/6pack.h
84AX25_MAGIC 0x5316 ax_disp drivers/net/mkiss.h 82AX25_MAGIC 0x5316 ax_disp drivers/net/mkiss.h
85ESP_MAGIC 0x53ee esp_struct drivers/char/esp.h
86TTY_MAGIC 0x5401 tty_struct include/linux/tty.h 83TTY_MAGIC 0x5401 tty_struct include/linux/tty.h
87MGSL_MAGIC 0x5401 mgsl_info drivers/char/synclink.c 84MGSL_MAGIC 0x5401 mgsl_info drivers/char/synclink.c
88TTY_DRIVER_MAGIC 0x5402 tty_driver include/linux/tty_driver.h 85TTY_DRIVER_MAGIC 0x5402 tty_driver include/linux/tty_driver.h
@@ -94,13 +91,10 @@ USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth drivers/usb/class/bluetty.c
94RFCOMM_TTY_MAGIC 0x6d02 net/bluetooth/rfcomm/tty.c 91RFCOMM_TTY_MAGIC 0x6d02 net/bluetooth/rfcomm/tty.c
95USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port drivers/usb/serial/usb-serial.h 92USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port drivers/usb/serial/usb-serial.h
96CG_MAGIC 0x00090255 ufs_cylinder_group include/linux/ufs_fs.h 93CG_MAGIC 0x00090255 ufs_cylinder_group include/linux/ufs_fs.h
97A2232_MAGIC 0x000a2232 gs_port drivers/char/ser_a2232.h
98RPORT_MAGIC 0x00525001 r_port drivers/char/rocket_int.h 94RPORT_MAGIC 0x00525001 r_port drivers/char/rocket_int.h
99LSEMAGIC 0x05091998 lse drivers/fc4/fc.c 95LSEMAGIC 0x05091998 lse drivers/fc4/fc.c
100GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str drivers/scsi/gdth_ioctl.h 96GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str drivers/scsi/gdth_ioctl.h
101RIEBL_MAGIC 0x09051990 drivers/net/atarilance.c 97RIEBL_MAGIC 0x09051990 drivers/net/atarilance.c
102RIO_MAGIC 0x12345678 gs_port drivers/char/rio/rio_linux.c
103SX_MAGIC 0x12345678 gs_port drivers/char/sx.h
104NBD_REQUEST_MAGIC 0x12560953 nbd_request include/linux/nbd.h 98NBD_REQUEST_MAGIC 0x12560953 nbd_request include/linux/nbd.h
105RED_MAGIC2 0x170fc2a5 (any) mm/slab.c 99RED_MAGIC2 0x170fc2a5 (any) mm/slab.c
106BAYCOM_MAGIC 0x19730510 baycom_state drivers/net/baycom_epp.c 100BAYCOM_MAGIC 0x19730510 baycom_state drivers/net/baycom_epp.c
@@ -116,7 +110,6 @@ ISDN_ASYNC_MAGIC 0x49344C01 modem_info include/linux/isdn.h
116CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info drivers/s390/net/ctctty.c 110CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info drivers/s390/net/ctctty.c
117ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s drivers/isdn/i4l/isdn_net_lib.h 111ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s drivers/isdn/i4l/isdn_net_lib.h
118SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg arch/*/amiga/config.c 112SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg arch/*/amiga/config.c
119STLI_BOARDMAGIC 0x4bc6c825 stlibrd include/linux/istallion.h
120CS_STATE_MAGIC 0x4c4f4749 cs_state sound/oss/cs46xx.c 113CS_STATE_MAGIC 0x4c4f4749 cs_state sound/oss/cs46xx.c
121SLAB_C_MAGIC 0x4f17a36d kmem_cache mm/slab.c 114SLAB_C_MAGIC 0x4f17a36d kmem_cache mm/slab.c
122COW_MAGIC 0x4f4f4f4d cow_header_v1 arch/um/drivers/ubd_user.c 115COW_MAGIC 0x4f4f4f4d cow_header_v1 arch/um/drivers/ubd_user.c
@@ -127,10 +120,8 @@ SCC_MAGIC 0x52696368 gs_port drivers/char/scc.h
127SAVEKMSG_MAGIC1 0x53415645 savekmsg arch/*/amiga/config.c 120SAVEKMSG_MAGIC1 0x53415645 savekmsg arch/*/amiga/config.c
128GDA_MAGIC 0x58464552 gda arch/mips/include/asm/sn/gda.h 121GDA_MAGIC 0x58464552 gda arch/mips/include/asm/sn/gda.h
129RED_MAGIC1 0x5a2cf071 (any) mm/slab.c 122RED_MAGIC1 0x5a2cf071 (any) mm/slab.c
130STL_PORTMAGIC 0x5a7182c9 stlport include/linux/stallion.h
131EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev drivers/atm/lanai.c 123EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev drivers/atm/lanai.c
132HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state include/linux/hdlcdrv.h 124HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state include/linux/hdlcdrv.h
133EPCA_MAGIC 0x5c6df104 channel include/linux/epca.h
134PCXX_MAGIC 0x5c6df104 channel drivers/char/pcxx.h 125PCXX_MAGIC 0x5c6df104 channel drivers/char/pcxx.h
135KV_MAGIC 0x5f4b565f kernel_vars_s arch/mips/include/asm/sn/klkernvars.h 126KV_MAGIC 0x5f4b565f kernel_vars_s arch/mips/include/asm/sn/klkernvars.h
136I810_STATE_MAGIC 0x63657373 i810_state sound/oss/i810_audio.c 127I810_STATE_MAGIC 0x63657373 i810_state sound/oss/i810_audio.c
@@ -142,17 +133,14 @@ SLOT_MAGIC 0x67267322 slot drivers/hotplug/acpiphp.h
142LO_MAGIC 0x68797548 nbd_device include/linux/nbd.h 133LO_MAGIC 0x68797548 nbd_device include/linux/nbd.h
143OPROFILE_MAGIC 0x6f70726f super_block drivers/oprofile/oprofilefs.h 134OPROFILE_MAGIC 0x6f70726f super_block drivers/oprofile/oprofilefs.h
144M3_STATE_MAGIC 0x734d724d m3_state sound/oss/maestro3.c 135M3_STATE_MAGIC 0x734d724d m3_state sound/oss/maestro3.c
145STL_PANELMAGIC 0x7ef621a1 stlpanel include/linux/stallion.h
146VMALLOC_MAGIC 0x87654320 snd_alloc_track sound/core/memory.c 136VMALLOC_MAGIC 0x87654320 snd_alloc_track sound/core/memory.c
147KMALLOC_MAGIC 0x87654321 snd_alloc_track sound/core/memory.c 137KMALLOC_MAGIC 0x87654321 snd_alloc_track sound/core/memory.c
148PWC_MAGIC 0x89DC10AB pwc_device drivers/usb/media/pwc.h 138PWC_MAGIC 0x89DC10AB pwc_device drivers/usb/media/pwc.h
149NBD_REPLY_MAGIC 0x96744668 nbd_reply include/linux/nbd.h 139NBD_REPLY_MAGIC 0x96744668 nbd_reply include/linux/nbd.h
150STL_BOARDMAGIC 0xa2267f52 stlbrd include/linux/stallion.h
151ENI155_MAGIC 0xa54b872d midway_eprom drivers/atm/eni.h 140ENI155_MAGIC 0xa54b872d midway_eprom drivers/atm/eni.h
152SCI_MAGIC 0xbabeface gs_port drivers/char/sh-sci.h 141SCI_MAGIC 0xbabeface gs_port drivers/char/sh-sci.h
153CODA_MAGIC 0xC0DAC0DA coda_file_info include/linux/coda_fs_i.h 142CODA_MAGIC 0xC0DAC0DA coda_file_info include/linux/coda_fs_i.h
154DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram drivers/scsi/gdth.h 143DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram drivers/scsi/gdth.h
155STLI_PORTMAGIC 0xe671c7a1 stliport include/linux/istallion.h
156YAM_MAGIC 0xF10A7654 yam_port drivers/net/hamradio/yam.c 144YAM_MAGIC 0xF10A7654 yam_port drivers/net/hamradio/yam.c
157CCB_MAGIC 0xf2691ad2 ccb drivers/scsi/ncr53c8xx.c 145CCB_MAGIC 0xf2691ad2 ccb drivers/scsi/ncr53c8xx.c
158QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry drivers/scsi/arm/queue.c 146QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry drivers/scsi/arm/queue.c
diff --git a/Documentation/zh_CN/stable_kernel_rules.txt b/Documentation/zh_CN/stable_kernel_rules.txt
index b5b9b0ab02fd..26ea5ed7cd9c 100644
--- a/Documentation/zh_CN/stable_kernel_rules.txt
+++ b/Documentation/zh_CN/stable_kernel_rules.txt
@@ -42,7 +42,7 @@ Documentation/stable_kernel_rules.txt 的中文翻译
42 42
43å‘ç¨³å®šç‰ˆä»£ç æ ‘æäº¤è¡¥ä¸çš„过程: 43å‘ç¨³å®šç‰ˆä»£ç æ ‘æäº¤è¡¥ä¸çš„过程:
44 44
45 - 在确认了补ä¸ç¬¦åˆä»¥ä¸Šçš„规则åŽï¼Œå°†è¡¥ä¸å‘é€åˆ°stable@kernel.org。 45 - 在确认了补ä¸ç¬¦åˆä»¥ä¸Šçš„规则åŽï¼Œå°†è¡¥ä¸å‘é€åˆ°stable@vger.kernel.org。
46 - 如果补ä¸è¢«æŽ¥å—到队列里,å‘é€è€…会收到一个ACK回å¤ï¼Œå¦‚果没有被接å—,收 46 - 如果补ä¸è¢«æŽ¥å—到队列里,å‘é€è€…会收到一个ACK回å¤ï¼Œå¦‚果没有被接å—,收
47 到的是NAK回å¤ã€‚回å¤éœ€è¦å‡ å¤©çš„æ—¶é—´ï¼Œè¿™å–决于开å‘者的时间安排。 47 到的是NAK回å¤ã€‚回å¤éœ€è¦å‡ å¤©çš„æ—¶é—´ï¼Œè¿™å–决于开å‘者的时间安排。
48 - 被接å—的补ä¸ä¼šè¢«åŠ åˆ°ç¨³å®šç‰ˆæœ¬é˜Ÿåˆ—é‡Œï¼Œç­‰å¾…å…¶ä»–å¼€å‘者的审查。 48 - 被接å—的补ä¸ä¼šè¢«åŠ åˆ°ç¨³å®šç‰ˆæœ¬é˜Ÿåˆ—é‡Œï¼Œç­‰å¾…å…¶ä»–å¼€å‘者的审查。
diff --git a/MAINTAINERS b/MAINTAINERS
index 6dc67b1fdb50..3be14ee584f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2245,12 +2245,6 @@ L: linux-usb@vger.kernel.org
2245S: Maintained 2245S: Maintained
2246F: drivers/usb/host/ohci-ep93xx.c 2246F: drivers/usb/host/ohci-ep93xx.c
2247 2247
2248CIRRUS LOGIC CS4270 SOUND DRIVER
2249M: Timur Tabi <timur@tabi.org>
2250L: alsa-devel@alsa-project.org (moderated for non-subscribers)
2251S: Odd Fixes
2252F: sound/soc/codecs/cs4270*
2253
2254CIRRUS LOGIC AUDIO CODEC DRIVERS 2248CIRRUS LOGIC AUDIO CODEC DRIVERS
2255M: Brian Austin <brian.austin@cirrus.com> 2249M: Brian Austin <brian.austin@cirrus.com>
2256M: Paul Handrigan <Paul.Handrigan@cirrus.com> 2250M: Paul Handrigan <Paul.Handrigan@cirrus.com>
@@ -3485,6 +3479,12 @@ S: Maintained
3485F: drivers/extcon/ 3479F: drivers/extcon/
3486F: Documentation/extcon/ 3480F: Documentation/extcon/
3487 3481
3482EXYNOS DP DRIVER
3483M: Jingoo Han <jg1.han@samsung.com>
3484L: dri-devel@lists.freedesktop.org
3485S: Maintained
3486F: drivers/gpu/drm/exynos/exynos_dp*
3487
3488EXYNOS MIPI DISPLAY DRIVERS 3488EXYNOS MIPI DISPLAY DRIVERS
3489M: Inki Dae <inki.dae@samsung.com> 3489M: Inki Dae <inki.dae@samsung.com>
3490M: Donghwa Lee <dh09.lee@samsung.com> 3490M: Donghwa Lee <dh09.lee@samsung.com>
@@ -3550,7 +3550,7 @@ F: include/scsi/libfcoe.h
3550F: include/uapi/scsi/fc/ 3550F: include/uapi/scsi/fc/
3551 3551
3552FILE LOCKING (flock() and fcntl()/lockf()) 3552FILE LOCKING (flock() and fcntl()/lockf())
3553M: Jeff Layton <jlayton@redhat.com> 3553M: Jeff Layton <jlayton@poochiereds.net>
3554M: J. Bruce Fields <bfields@fieldses.org> 3554M: J. Bruce Fields <bfields@fieldses.org>
3555L: linux-fsdevel@vger.kernel.org 3555L: linux-fsdevel@vger.kernel.org
3556S: Maintained 3556S: Maintained
@@ -5108,14 +5108,19 @@ F: drivers/s390/kvm/
5108 5108
5109KERNEL VIRTUAL MACHINE (KVM) FOR ARM 5109KERNEL VIRTUAL MACHINE (KVM) FOR ARM
5110M: Christoffer Dall <christoffer.dall@linaro.org> 5110M: Christoffer Dall <christoffer.dall@linaro.org>
5111M: Marc Zyngier <marc.zyngier@arm.com>
5112L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5111L: kvmarm@lists.cs.columbia.edu 5113L: kvmarm@lists.cs.columbia.edu
5112W: http://systems.cs.columbia.edu/projects/kvm-arm 5114W: http://systems.cs.columbia.edu/projects/kvm-arm
5113S: Supported 5115S: Supported
5114F: arch/arm/include/uapi/asm/kvm* 5116F: arch/arm/include/uapi/asm/kvm*
5115F: arch/arm/include/asm/kvm* 5117F: arch/arm/include/asm/kvm*
5116F: arch/arm/kvm/ 5118F: arch/arm/kvm/
5119F: virt/kvm/arm/
5120F: include/kvm/arm_*
5117 5121
5118KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) 5122KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)
5123M: Christoffer Dall <christoffer.dall@linaro.org>
5119M: Marc Zyngier <marc.zyngier@arm.com> 5124M: Marc Zyngier <marc.zyngier@arm.com>
5120L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 5125L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5121L: kvmarm@lists.cs.columbia.edu 5126L: kvmarm@lists.cs.columbia.edu
@@ -6782,7 +6787,7 @@ PERFORMANCE EVENTS SUBSYSTEM
6782M: Peter Zijlstra <a.p.zijlstra@chello.nl> 6787M: Peter Zijlstra <a.p.zijlstra@chello.nl>
6783M: Paul Mackerras <paulus@samba.org> 6788M: Paul Mackerras <paulus@samba.org>
6784M: Ingo Molnar <mingo@redhat.com> 6789M: Ingo Molnar <mingo@redhat.com>
6785M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> 6790M: Arnaldo Carvalho de Melo <acme@kernel.org>
6786L: linux-kernel@vger.kernel.org 6791L: linux-kernel@vger.kernel.org
6787T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core 6792T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core
6788S: Supported 6793S: Supported
@@ -7277,7 +7282,6 @@ F: drivers/video/aty/aty128fb.c
7277RALINK RT2X00 WIRELESS LAN DRIVER 7282RALINK RT2X00 WIRELESS LAN DRIVER
7278P: rt2x00 project 7283P: rt2x00 project
7279M: Ivo van Doorn <IvDoorn@gmail.com> 7284M: Ivo van Doorn <IvDoorn@gmail.com>
7280M: Gertjan van Wingerde <gwingerde@gmail.com>
7281M: Helmut Schaa <helmut.schaa@googlemail.com> 7285M: Helmut Schaa <helmut.schaa@googlemail.com>
7282L: linux-wireless@vger.kernel.org 7286L: linux-wireless@vger.kernel.org
7283L: users@rt2x00.serialmonkey.com (moderated for non-subscribers) 7287L: users@rt2x00.serialmonkey.com (moderated for non-subscribers)
@@ -7293,7 +7297,7 @@ F: Documentation/blockdev/ramdisk.txt
7293F: drivers/block/brd.c 7297F: drivers/block/brd.c
7294 7298
7295RANDOM NUMBER DRIVER 7299RANDOM NUMBER DRIVER
7296M: Theodore Ts'o" <tytso@mit.edu> 7300M: "Theodore Ts'o" <tytso@mit.edu>
7297S: Maintained 7301S: Maintained
7298F: drivers/char/random.c 7302F: drivers/char/random.c
7299 7303
@@ -7674,7 +7678,6 @@ F: drivers/clk/samsung/
7674SAMSUNG SXGBE DRIVERS 7678SAMSUNG SXGBE DRIVERS
7675M: Byungho An <bh74.an@samsung.com> 7679M: Byungho An <bh74.an@samsung.com>
7676M: Girish K S <ks.giri@samsung.com> 7680M: Girish K S <ks.giri@samsung.com>
7677M: Siva Reddy Kallam <siva.kallam@samsung.com>
7678M: Vipul Pandya <vipul.pandya@samsung.com> 7681M: Vipul Pandya <vipul.pandya@samsung.com>
7679S: Supported 7682S: Supported
7680L: netdev@vger.kernel.org 7683L: netdev@vger.kernel.org
@@ -8315,7 +8318,7 @@ F: include/linux/compiler.h
8315 8318
8316SPEAR PLATFORM SUPPORT 8319SPEAR PLATFORM SUPPORT
8317M: Viresh Kumar <viresh.linux@gmail.com> 8320M: Viresh Kumar <viresh.linux@gmail.com>
8318M: Shiraz Hashim <shiraz.hashim@st.com> 8321M: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
8319L: spear-devel@list.st.com 8322L: spear-devel@list.st.com
8320L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 8323L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
8321W: http://www.st.com/spear 8324W: http://www.st.com/spear
@@ -9951,7 +9954,7 @@ F: drivers/net/hamradio/*scc.c
9951F: drivers/net/hamradio/z8530.h 9954F: drivers/net/hamradio/z8530.h
9952 9955
9953ZBUD COMPRESSED PAGE ALLOCATOR 9956ZBUD COMPRESSED PAGE ALLOCATOR
9954M: Seth Jennings <sjenning@linux.vnet.ibm.com> 9957M: Seth Jennings <sjennings@variantweb.net>
9955L: linux-mm@kvack.org 9958L: linux-mm@kvack.org
9956S: Maintained 9959S: Maintained
9957F: mm/zbud.c 9960F: mm/zbud.c
@@ -9996,7 +9999,7 @@ F: mm/zsmalloc.c
9996F: include/linux/zsmalloc.h 9999F: include/linux/zsmalloc.h
9997 10000
9998ZSWAP COMPRESSED SWAP CACHING 10001ZSWAP COMPRESSED SWAP CACHING
9999M: Seth Jennings <sjenning@linux.vnet.ibm.com> 10002M: Seth Jennings <sjennings@variantweb.net>
10000L: linux-mm@kvack.org 10003L: linux-mm@kvack.org
10001S: Maintained 10004S: Maintained
10002F: mm/zswap.c 10005F: mm/zswap.c
diff --git a/Makefile b/Makefile
index 60ccbfe750a2..8a8440a3578e 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 3 1VERSION = 3
2PATCHLEVEL = 15 2PATCHLEVEL = 15
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = -rc1 4EXTRAVERSION = -rc5
5NAME = Shuffling Zombie Juror 5NAME = Shuffling Zombie Juror
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/arc/include/asm/barrier.h b/arch/arc/include/asm/barrier.h
deleted file mode 100644
index c32245c3d1e9..000000000000
--- a/arch/arc/include/asm/barrier.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_BARRIER_H
10#define __ASM_BARRIER_H
11
12#ifndef __ASSEMBLY__
13
14/* TODO-vineetg: Need to see what this does, don't we need sync anywhere */
15#define mb() __asm__ __volatile__ ("" : : : "memory")
16#define rmb() mb()
17#define wmb() mb()
18#define set_mb(var, value) do { var = value; mb(); } while (0)
19#define set_wmb(var, value) do { var = value; wmb(); } while (0)
20#define read_barrier_depends() mb()
21
22/* TODO-vineetg verify the correctness of macros here */
23#ifdef CONFIG_SMP
24#define smp_mb() mb()
25#define smp_rmb() rmb()
26#define smp_wmb() wmb()
27#else
28#define smp_mb() barrier()
29#define smp_rmb() barrier()
30#define smp_wmb() barrier()
31#endif
32
33#define smp_read_barrier_depends() do { } while (0)
34
35#endif
36
37#endif
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 819dd5f7eb05..29b82adbf0b4 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -614,11 +614,13 @@ resume_user_mode_begin:
614 614
615resume_kernel_mode: 615resume_kernel_mode:
616 616
617#ifdef CONFIG_PREEMPT 617 ; Disable Interrupts from this point on
618 618 ; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()
619 ; This is a must for preempt_schedule_irq() 619 ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe
620 IRQ_DISABLE r9 620 IRQ_DISABLE r9
621 621
622#ifdef CONFIG_PREEMPT
623
622 ; Can't preempt if preemption disabled 624 ; Can't preempt if preemption disabled
623 GET_CURR_THR_INFO_FROM_SP r10 625 GET_CURR_THR_INFO_FROM_SP r10
624 ld r8, [r10, THREAD_INFO_PREEMPT_COUNT] 626 ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ab438cb5af55..db3c5414223e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -30,9 +30,9 @@ config ARM
30 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) 30 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
31 select HAVE_ARCH_TRACEHOOK 31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_BPF_JIT 32 select HAVE_BPF_JIT
33 select HAVE_CC_STACKPROTECTOR
33 select HAVE_CONTEXT_TRACKING 34 select HAVE_CONTEXT_TRACKING
34 select HAVE_C_RECORDMCOUNT 35 select HAVE_C_RECORDMCOUNT
35 select HAVE_CC_STACKPROTECTOR
36 select HAVE_DEBUG_KMEMLEAK 36 select HAVE_DEBUG_KMEMLEAK
37 select HAVE_DMA_API_DEBUG 37 select HAVE_DMA_API_DEBUG
38 select HAVE_DMA_ATTRS 38 select HAVE_DMA_ATTRS
@@ -311,6 +311,7 @@ config ARCH_MULTIPLATFORM
311 select ARM_HAS_SG_CHAIN 311 select ARM_HAS_SG_CHAIN
312 select ARM_PATCH_PHYS_VIRT 312 select ARM_PATCH_PHYS_VIRT
313 select AUTO_ZRELADDR 313 select AUTO_ZRELADDR
314 select CLKSRC_OF
314 select COMMON_CLK 315 select COMMON_CLK
315 select GENERIC_CLOCKEVENTS 316 select GENERIC_CLOCKEVENTS
316 select MULTI_IRQ_HANDLER 317 select MULTI_IRQ_HANDLER
@@ -422,8 +423,8 @@ config ARCH_EFM32
422 bool "Energy Micro efm32" 423 bool "Energy Micro efm32"
423 depends on !MMU 424 depends on !MMU
424 select ARCH_REQUIRE_GPIOLIB 425 select ARCH_REQUIRE_GPIOLIB
425 select AUTO_ZRELADDR
426 select ARM_NVIC 426 select ARM_NVIC
427 select AUTO_ZRELADDR
427 select CLKSRC_OF 428 select CLKSRC_OF
428 select COMMON_CLK 429 select COMMON_CLK
429 select CPU_V7M 430 select CPU_V7M
@@ -511,8 +512,8 @@ config ARCH_IXP4XX
511 bool "IXP4xx-based" 512 bool "IXP4xx-based"
512 depends on MMU 513 depends on MMU
513 select ARCH_HAS_DMA_SET_COHERENT_MASK 514 select ARCH_HAS_DMA_SET_COHERENT_MASK
514 select ARCH_SUPPORTS_BIG_ENDIAN
515 select ARCH_REQUIRE_GPIOLIB 515 select ARCH_REQUIRE_GPIOLIB
516 select ARCH_SUPPORTS_BIG_ENDIAN
516 select CLKSRC_MMIO 517 select CLKSRC_MMIO
517 select CPU_XSCALE 518 select CPU_XSCALE
518 select DMABOUNCE if PCI 519 select DMABOUNCE if PCI
@@ -1110,9 +1111,9 @@ config ARM_NR_BANKS
1110 default 8 1111 default 8
1111 1112
1112config IWMMXT 1113config IWMMXT
1113 bool "Enable iWMMXt support" if !CPU_PJ4 1114 bool "Enable iWMMXt support"
1114 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1115 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1115 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 1116 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1116 help 1117 help
1117 Enable support for iWMMXt context switching at run time if 1118 Enable support for iWMMXt context switching at run time if
1118 running on a CPU that supports it. 1119 running on a CPU that supports it.
@@ -1575,8 +1576,8 @@ config BIG_LITTLE
1575config BL_SWITCHER 1576config BL_SWITCHER
1576 bool "big.LITTLE switcher support" 1577 bool "big.LITTLE switcher support"
1577 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU 1578 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1578 select CPU_PM
1579 select ARM_CPU_SUSPEND 1579 select ARM_CPU_SUSPEND
1580 select CPU_PM
1580 help 1581 help
1581 The big.LITTLE "switcher" provides the core functionality to 1582 The big.LITTLE "switcher" provides the core functionality to
1582 transparently handle transition between a cluster of A15's 1583 transparently handle transition between a cluster of A15's
@@ -1920,9 +1921,9 @@ config XEN
1920 depends on CPU_V7 && !CPU_V6 1921 depends on CPU_V7 && !CPU_V6
1921 depends on !GENERIC_ATOMIC64 1922 depends on !GENERIC_ATOMIC64
1922 depends on MMU 1923 depends on MMU
1924 select ARCH_DMA_ADDR_T_64BIT
1923 select ARM_PSCI 1925 select ARM_PSCI
1924 select SWIOTLB_XEN 1926 select SWIOTLB_XEN
1925 select ARCH_DMA_ADDR_T_64BIT
1926 help 1927 help
1927 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. 1928 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1928 1929
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 4a2fc0bf6fc9..eab8ecbe69c1 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1030,9 +1030,9 @@ config DEBUG_UART_PHYS
1030 default 0x40100000 if DEBUG_PXA_UART1 1030 default 0x40100000 if DEBUG_PXA_UART1
1031 default 0x42000000 if ARCH_GEMINI 1031 default 0x42000000 if ARCH_GEMINI
1032 default 0x7c0003f8 if FOOTBRIDGE 1032 default 0x7c0003f8 if FOOTBRIDGE
1033 default 0x80230000 if DEBUG_PICOXCELL_UART
1034 default 0x80070000 if DEBUG_IMX23_UART 1033 default 0x80070000 if DEBUG_IMX23_UART
1035 default 0x80074000 if DEBUG_IMX28_UART 1034 default 0x80074000 if DEBUG_IMX28_UART
1035 default 0x80230000 if DEBUG_PICOXCELL_UART
1036 default 0x808c0000 if ARCH_EP93XX 1036 default 0x808c0000 if ARCH_EP93XX
1037 default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART 1037 default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
1038 default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX 1038 default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
@@ -1096,22 +1096,22 @@ config DEBUG_UART_VIRT
1096 default 0xfeb26000 if DEBUG_RK3X_UART1 1096 default 0xfeb26000 if DEBUG_RK3X_UART1
1097 default 0xfeb30c00 if DEBUG_KEYSTONE_UART0 1097 default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
1098 default 0xfeb31000 if DEBUG_KEYSTONE_UART1 1098 default 0xfeb31000 if DEBUG_KEYSTONE_UART1
1099 default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
1100 default 0xfed60000 if DEBUG_RK29_UART0
1101 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
1102 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
1103 default 0xfec02000 if DEBUG_SOCFPGA_UART 1099 default 0xfec02000 if DEBUG_SOCFPGA_UART
1100 default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
1104 default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 1101 default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
1105 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 1102 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
1106 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 1103 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
1107 default 0xfed12000 if ARCH_KIRKWOOD 1104 default 0xfed12000 if ARCH_KIRKWOOD
1105 default 0xfed60000 if DEBUG_RK29_UART0
1106 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
1107 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
1108 default 0xfedc0000 if ARCH_EP93XX 1108 default 0xfedc0000 if ARCH_EP93XX
1109 default 0xfee003f8 if FOOTBRIDGE 1109 default 0xfee003f8 if FOOTBRIDGE
1110 default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART 1110 default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
1111 default 0xfef36000 if DEBUG_HIGHBANK_UART
1112 default 0xfee82340 if ARCH_IOP13XX 1111 default 0xfee82340 if ARCH_IOP13XX
1113 default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN 1112 default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
1114 default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN 1113 default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
1114 default 0xfef36000 if DEBUG_HIGHBANK_UART
1115 default 0xfefff700 if ARCH_IOP33X 1115 default 0xfefff700 if ARCH_IOP33X
1116 default 0xff003000 if DEBUG_U300_UART 1116 default 0xff003000 if DEBUG_U300_UART
1117 default DEBUG_UART_PHYS if !MMU 1117 default DEBUG_UART_PHYS if !MMU
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f31e46..377b7c364033 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -51,10 +51,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
51 51
52dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb 52dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
53dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb 53dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
54dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
54dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \ 55dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
55 bcm21664-garnet.dtb 56 bcm21664-garnet.dtb
56dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
57dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
58dtb-$(CONFIG_ARCH_BERLIN) += \ 57dtb-$(CONFIG_ARCH_BERLIN) += \
59 berlin2-sony-nsz-gs7.dtb \ 58 berlin2-sony-nsz-gs7.dtb \
60 berlin2cd-google-chromecast.dtb 59 berlin2cd-google-chromecast.dtb
@@ -246,6 +245,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
246 omap3-sbc-t3730.dtb \ 245 omap3-sbc-t3730.dtb \
247 omap3-devkit8000.dtb \ 246 omap3-devkit8000.dtb \
248 omap3-beagle-xm.dtb \ 247 omap3-beagle-xm.dtb \
248 omap3-beagle-xm-ab.dtb \
249 omap3-evm.dtb \ 249 omap3-evm.dtb \
250 omap3-evm-37xx.dtb \ 250 omap3-evm-37xx.dtb \
251 omap3-ldp.dtb \ 251 omap3-ldp.dtb \
@@ -294,13 +294,6 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
294dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \ 294dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
295 qcom-msm8960-cdp.dtb \ 295 qcom-msm8960-cdp.dtb \
296 qcom-apq8074-dragonboard.dtb 296 qcom-apq8074-dragonboard.dtb
297dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
298 ste-hrefprev60-stuib.dtb \
299 ste-hrefprev60-tvk.dtb \
300 ste-hrefv60plus-stuib.dtb \
301 ste-hrefv60plus-tvk.dtb \
302 ste-ccu8540.dtb \
303 ste-ccu9540.dtb
304dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb 297dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
305dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ 298dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
306 s3c6410-smdk6410.dtb 299 s3c6410-smdk6410.dtb
@@ -369,9 +362,16 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
369 tegra30-cardhu-a04.dtb \ 362 tegra30-cardhu-a04.dtb \
370 tegra114-dalmore.dtb \ 363 tegra114-dalmore.dtb \
371 tegra124-venice2.dtb 364 tegra124-venice2.dtb
365dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
366dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
367 ste-hrefprev60-stuib.dtb \
368 ste-hrefprev60-tvk.dtb \
369 ste-hrefv60plus-stuib.dtb \
370 ste-hrefv60plus-tvk.dtb \
371 ste-ccu8540.dtb \
372 ste-ccu9540.dtb
372dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ 373dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
373 versatile-pb.dtb 374 versatile-pb.dtb
374dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
375dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ 375dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
376 vexpress-v2p-ca9.dtb \ 376 vexpress-v2p-ca9.dtb \
377 vexpress-v2p-ca15-tc1.dtb \ 377 vexpress-v2p-ca15-tc1.dtb \
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index e3f27ec31718..2e7d932887b5 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -183,7 +183,7 @@
183&usb { 183&usb {
184 status = "okay"; 184 status = "okay";
185 185
186 control@44e10000 { 186 control@44e10620 {
187 status = "okay"; 187 status = "okay";
188 }; 188 };
189 189
@@ -204,7 +204,7 @@
204 dr_mode = "host"; 204 dr_mode = "host";
205 }; 205 };
206 206
207 dma-controller@07402000 { 207 dma-controller@47402000 {
208 status = "okay"; 208 status = "okay";
209 }; 209 };
210}; 210};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 28ae040e7c3d..6028217ace0f 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -301,8 +301,8 @@
301 301
302 am335x_evm_audio_pins: am335x_evm_audio_pins { 302 am335x_evm_audio_pins: am335x_evm_audio_pins {
303 pinctrl-single,pins = < 303 pinctrl-single,pins = <
304 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */ 304 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
305 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */ 305 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
306 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 306 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
307 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 307 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
308 >; 308 >;
@@ -331,7 +331,7 @@
331&usb { 331&usb {
332 status = "okay"; 332 status = "okay";
333 333
334 control@44e10000 { 334 control@44e10620 {
335 status = "okay"; 335 status = "okay";
336 }; 336 };
337 337
@@ -352,7 +352,7 @@
352 dr_mode = "host"; 352 dr_mode = "host";
353 }; 353 };
354 354
355 dma-controller@07402000 { 355 dma-controller@47402000 {
356 status = "okay"; 356 status = "okay";
357 }; 357 };
358}; 358};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index ec08f6f677c3..ab238850a7b2 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -364,7 +364,7 @@
364&usb { 364&usb {
365 status = "okay"; 365 status = "okay";
366 366
367 control@44e10000 { 367 control@44e10620 {
368 status = "okay"; 368 status = "okay";
369 }; 369 };
370 370
@@ -385,7 +385,7 @@
385 dr_mode = "host"; 385 dr_mode = "host";
386 }; 386 };
387 387
388 dma-controller@07402000 { 388 dma-controller@47402000 {
389 status = "okay"; 389 status = "okay";
390 }; 390 };
391}; 391};
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 7063311a58d9..9f22c189f636 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -118,7 +118,6 @@
118 reg = <0 0 0>; /* CS0, offset 0 */ 118 reg = <0 0 0>; /* CS0, offset 0 */
119 nand-bus-width = <8>; 119 nand-bus-width = <8>;
120 ti,nand-ecc-opt = "bch8"; 120 ti,nand-ecc-opt = "bch8";
121 gpmc,device-nand = "true";
122 gpmc,device-width = <1>; 121 gpmc,device-width = <1>;
123 gpmc,sync-clk-ps = <0>; 122 gpmc,sync-clk-ps = <0>;
124 gpmc,cs-on-ns = <0>; 123 gpmc,cs-on-ns = <0>;
@@ -202,7 +201,7 @@
202&usb { 201&usb {
203 status = "okay"; 202 status = "okay";
204 203
205 control@44e10000 { 204 control@44e10620 {
206 status = "okay"; 205 status = "okay";
207 }; 206 };
208 207
@@ -223,7 +222,7 @@
223 dr_mode = "host"; 222 dr_mode = "host";
224 }; 223 };
225 224
226 dma-controller@07402000 { 225 dma-controller@47402000 {
227 status = "okay"; 226 status = "okay";
228 }; 227 };
229}; 228};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9770e35f2536..cb6811e5ae5a 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -72,7 +72,7 @@
72 }; 72 };
73 73
74 /* 74 /*
75 * The soc node represents the soc top level view. It is uses for IPs 75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself. 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */ 77 */
78 soc { 78 soc {
@@ -94,8 +94,8 @@
94 94
95 /* 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect. 96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex.Since 97 * The real AM33XX interconnect network is quite complex. Since
98 * that will not bring real advantage to represent that in DT 98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent 99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy. 100 * the whole bus hierarchy.
101 */ 101 */
@@ -802,7 +802,7 @@
802 <0x46000000 0x400000>; 802 <0x46000000 0x400000>;
803 reg-names = "mpu", "dat"; 803 reg-names = "mpu", "dat";
804 interrupts = <80>, <81>; 804 interrupts = <80>, <81>;
805 interrupts-names = "tx", "rx"; 805 interrupt-names = "tx", "rx";
806 status = "disabled"; 806 status = "disabled";
807 dmas = <&edma 8>, 807 dmas = <&edma 8>,
808 <&edma 9>; 808 <&edma 9>;
@@ -816,7 +816,7 @@
816 <0x46400000 0x400000>; 816 <0x46400000 0x400000>;
817 reg-names = "mpu", "dat"; 817 reg-names = "mpu", "dat";
818 interrupts = <82>, <83>; 818 interrupts = <82>, <83>;
819 interrupts-names = "tx", "rx"; 819 interrupt-names = "tx", "rx";
820 status = "disabled"; 820 status = "disabled";
821 dmas = <&edma 10>, 821 dmas = <&edma 10>,
822 <&edma 11>; 822 <&edma 11>;
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 36d523a26831..d1f8707ff1df 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -691,7 +691,7 @@
691 <0x46000000 0x400000>; 691 <0x46000000 0x400000>;
692 reg-names = "mpu", "dat"; 692 reg-names = "mpu", "dat";
693 interrupts = <80>, <81>; 693 interrupts = <80>, <81>;
694 interrupts-names = "tx", "rx"; 694 interrupt-names = "tx", "rx";
695 status = "disabled"; 695 status = "disabled";
696 dmas = <&edma 8>, 696 dmas = <&edma 8>,
697 <&edma 9>; 697 <&edma 9>;
@@ -705,7 +705,7 @@
705 <0x46400000 0x400000>; 705 <0x46400000 0x400000>;
706 reg-names = "mpu", "dat"; 706 reg-names = "mpu", "dat";
707 interrupts = <82>, <83>; 707 interrupts = <82>, <83>;
708 interrupts-names = "tx", "rx"; 708 interrupt-names = "tx", "rx";
709 status = "disabled"; 709 status = "disabled";
710 dmas = <&edma 10>, 710 dmas = <&edma 10>,
711 <&edma 11>; 711 <&edma 11>;
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index bbb40f62037d..bb77970c0b12 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -230,6 +230,7 @@
230 #size-cells = <0>; 230 #size-cells = <0>;
231 compatible = "marvell,orion-mdio"; 231 compatible = "marvell,orion-mdio";
232 reg = <0x72004 0x4>; 232 reg = <0x72004 0x4>;
233 clocks = <&gateclk 4>;
233 }; 234 };
234 235
235 eth1: ethernet@74000 { 236 eth1: ethernet@74000 {
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index a064f59da02d..ca8813bb99ba 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -336,6 +336,7 @@
336 #size-cells = <0>; 336 #size-cells = <0>;
337 compatible = "marvell,orion-mdio"; 337 compatible = "marvell,orion-mdio";
338 reg = <0x72004 0x4>; 338 reg = <0x72004 0x4>;
339 clocks = <&gateclk 4>;
339 }; 340 };
340 341
341 coredivclk: clock@e4250 { 342 coredivclk: clock@e4250 {
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1c0f8e1893ae..149b55099935 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -80,7 +80,7 @@
80 }; 80 };
81 81
82 /* 82 /*
83 * The soc node represents the soc top level view. It is uses for IPs 83 * The soc node represents the soc top level view. It is used for IPs
84 * that are not memory mapped in the MPU view or for the MPU itself. 84 * that are not memory mapped in the MPU view or for the MPU itself.
85 */ 85 */
86 soc { 86 soc {
@@ -94,7 +94,7 @@
94 /* 94 /*
95 * XXX: Use a flat representation of the SOC interconnect. 95 * XXX: Use a flat representation of the SOC interconnect.
96 * The real OMAP interconnect network is quite complex. 96 * The real OMAP interconnect network is quite complex.
97 * Since that will not bring real advantage to represent that in DT for 97 * Since it will not bring real advantage to represent that in DT for
98 * the moment, just use a fake OCP bus entry to represent the whole bus 98 * the moment, just use a fake OCP bus entry to represent the whole bus
99 * hierarchy. 99 * hierarchy.
100 */ 100 */
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index e96da9a898ad..cfb8fc753f50 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1640,7 +1640,7 @@
1640 #clock-cells = <0>; 1640 #clock-cells = <0>;
1641 compatible = "ti,mux-clock"; 1641 compatible = "ti,mux-clock";
1642 clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; 1642 clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
1643 ti,bit-shift = <28>; 1643 ti,bit-shift = <24>;
1644 reg = <0x1860>; 1644 reg = <0x1860>;
1645 }; 1645 };
1646 1646
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 32f760e24898..ea323f09dc78 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -56,6 +56,7 @@
56 56
57 osc { 57 osc {
58 compatible = "fsl,imx-osc", "fixed-clock"; 58 compatible = "fsl,imx-osc", "fixed-clock";
59 #clock-cells = <0>;
59 clock-frequency = <24000000>; 60 clock-frequency = <24000000>;
60 }; 61 };
61 }; 62 };
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
index 09f57b39e3ef..73aae4f5e539 100644
--- a/arch/arm/boot/dts/imx27-apf27.dts
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -29,6 +29,7 @@
29 29
30 osc26m { 30 osc26m {
31 compatible = "fsl,imx-osc26m", "fixed-clock"; 31 compatible = "fsl,imx-osc26m", "fixed-clock";
32 #clock-cells = <0>;
32 clock-frequency = <0>; 33 clock-frequency = <0>;
33 }; 34 };
34 }; 35 };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 6279e0b4f768..137e010eab35 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -48,6 +48,7 @@
48 48
49 osc26m { 49 osc26m {
50 compatible = "fsl,imx-osc26m", "fixed-clock"; 50 compatible = "fsl,imx-osc26m", "fixed-clock";
51 #clock-cells = <0>;
51 clock-frequency = <26000000>; 52 clock-frequency = <26000000>;
52 }; 53 };
53 }; 54 };
diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi
index 0c75fe3deb35..9c89d1ca97c2 100644
--- a/arch/arm/boot/dts/imx50.dtsi
+++ b/arch/arm/boot/dts/imx50.dtsi
@@ -53,21 +53,25 @@
53 53
54 ckil { 54 ckil {
55 compatible = "fsl,imx-ckil", "fixed-clock"; 55 compatible = "fsl,imx-ckil", "fixed-clock";
56 #clock-cells = <0>;
56 clock-frequency = <32768>; 57 clock-frequency = <32768>;
57 }; 58 };
58 59
59 ckih1 { 60 ckih1 {
60 compatible = "fsl,imx-ckih1", "fixed-clock"; 61 compatible = "fsl,imx-ckih1", "fixed-clock";
62 #clock-cells = <0>;
61 clock-frequency = <22579200>; 63 clock-frequency = <22579200>;
62 }; 64 };
63 65
64 ckih2 { 66 ckih2 {
65 compatible = "fsl,imx-ckih2", "fixed-clock"; 67 compatible = "fsl,imx-ckih2", "fixed-clock";
68 #clock-cells = <0>;
66 clock-frequency = <0>; 69 clock-frequency = <0>;
67 }; 70 };
68 71
69 osc { 72 osc {
70 compatible = "fsl,imx-osc", "fixed-clock"; 73 compatible = "fsl,imx-osc", "fixed-clock";
74 #clock-cells = <0>;
71 clock-frequency = <24000000>; 75 clock-frequency = <24000000>;
72 }; 76 };
73 }; 77 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 5f8216d08f6b..150bb4e2f744 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -50,21 +50,25 @@
50 50
51 ckil { 51 ckil {
52 compatible = "fsl,imx-ckil", "fixed-clock"; 52 compatible = "fsl,imx-ckil", "fixed-clock";
53 #clock-cells = <0>;
53 clock-frequency = <32768>; 54 clock-frequency = <32768>;
54 }; 55 };
55 56
56 ckih1 { 57 ckih1 {
57 compatible = "fsl,imx-ckih1", "fixed-clock"; 58 compatible = "fsl,imx-ckih1", "fixed-clock";
59 #clock-cells = <0>;
58 clock-frequency = <0>; 60 clock-frequency = <0>;
59 }; 61 };
60 62
61 ckih2 { 63 ckih2 {
62 compatible = "fsl,imx-ckih2", "fixed-clock"; 64 compatible = "fsl,imx-ckih2", "fixed-clock";
65 #clock-cells = <0>;
63 clock-frequency = <0>; 66 clock-frequency = <0>;
64 }; 67 };
65 68
66 osc { 69 osc {
67 compatible = "fsl,imx-osc", "fixed-clock"; 70 compatible = "fsl,imx-osc", "fixed-clock";
71 #clock-cells = <0>;
68 clock-frequency = <24000000>; 72 clock-frequency = <24000000>;
69 }; 73 };
70 }; 74 };
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index f6d3ac3e5587..d5d146a8b149 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -17,7 +17,8 @@
17 compatible = "denx,imx53-m53evk", "fsl,imx53"; 17 compatible = "denx,imx53-m53evk", "fsl,imx53";
18 18
19 memory { 19 memory {
20 reg = <0x70000000 0x20000000>; 20 reg = <0x70000000 0x20000000>,
21 <0xb0000000 0x20000000>;
21 }; 22 };
22 23
23 soc { 24 soc {
@@ -193,17 +194,17 @@
193 irq-trigger = <0x1>; 194 irq-trigger = <0x1>;
194 195
195 stmpe_touchscreen { 196 stmpe_touchscreen {
196 compatible = "stmpe,ts"; 197 compatible = "st,stmpe-ts";
197 reg = <0>; 198 reg = <0>;
198 ts,sample-time = <4>; 199 st,sample-time = <4>;
199 ts,mod-12b = <1>; 200 st,mod-12b = <1>;
200 ts,ref-sel = <0>; 201 st,ref-sel = <0>;
201 ts,adc-freq = <1>; 202 st,adc-freq = <1>;
202 ts,ave-ctrl = <3>; 203 st,ave-ctrl = <3>;
203 ts,touch-det-delay = <3>; 204 st,touch-det-delay = <3>;
204 ts,settling = <4>; 205 st,settling = <4>;
205 ts,fraction-z = <7>; 206 st,fraction-z = <7>;
206 ts,i-drive = <1>; 207 st,i-drive = <1>;
207 }; 208 };
208 }; 209 };
209 210
diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi
index 3f825a6813da..ede04fa4161f 100644
--- a/arch/arm/boot/dts/imx53-qsb-common.dtsi
+++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi
@@ -14,7 +14,8 @@
14 14
15/ { 15/ {
16 memory { 16 memory {
17 reg = <0x70000000 0x40000000>; 17 reg = <0x70000000 0x20000000>,
18 <0xb0000000 0x20000000>;
18 }; 19 };
19 20
20 display0: display@di0 { 21 display0: display@di0 {
diff --git a/arch/arm/boot/dts/imx53-tx53-x03x.dts b/arch/arm/boot/dts/imx53-tx53-x03x.dts
index 0217dde3b36b..3b73e81dc3f0 100644
--- a/arch/arm/boot/dts/imx53-tx53-x03x.dts
+++ b/arch/arm/boot/dts/imx53-tx53-x03x.dts
@@ -25,12 +25,17 @@
25 soc { 25 soc {
26 display: display@di0 { 26 display: display@di0 {
27 compatible = "fsl,imx-parallel-display"; 27 compatible = "fsl,imx-parallel-display";
28 crtcs = <&ipu 0>;
29 interface-pix-fmt = "rgb24"; 28 interface-pix-fmt = "rgb24";
30 pinctrl-names = "default"; 29 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_rgb24_vga1>; 30 pinctrl-0 = <&pinctrl_rgb24_vga1>;
32 status = "okay"; 31 status = "okay";
33 32
33 port {
34 display0_in: endpoint {
35 remote-endpoint = <&ipu_di0_disp0>;
36 };
37 };
38
34 display-timings { 39 display-timings {
35 VGA { 40 VGA {
36 clock-frequency = <25200000>; 41 clock-frequency = <25200000>;
@@ -293,6 +298,10 @@
293 }; 298 };
294}; 299};
295 300
301&ipu_di0_disp0 {
302 remote-endpoint = <&display0_in>;
303};
304
296&kpp { 305&kpp {
297 pinctrl-names = "default"; 306 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_kpp>; 307 pinctrl-0 = <&pinctrl_kpp>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index b57ab57740f6..9c2bff2252d0 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -70,21 +70,25 @@
70 70
71 ckil { 71 ckil {
72 compatible = "fsl,imx-ckil", "fixed-clock"; 72 compatible = "fsl,imx-ckil", "fixed-clock";
73 #clock-cells = <0>;
73 clock-frequency = <32768>; 74 clock-frequency = <32768>;
74 }; 75 };
75 76
76 ckih1 { 77 ckih1 {
77 compatible = "fsl,imx-ckih1", "fixed-clock"; 78 compatible = "fsl,imx-ckih1", "fixed-clock";
79 #clock-cells = <0>;
78 clock-frequency = <22579200>; 80 clock-frequency = <22579200>;
79 }; 81 };
80 82
81 ckih2 { 83 ckih2 {
82 compatible = "fsl,imx-ckih2", "fixed-clock"; 84 compatible = "fsl,imx-ckih2", "fixed-clock";
85 #clock-cells = <0>;
83 clock-frequency = <0>; 86 clock-frequency = <0>;
84 }; 87 };
85 88
86 osc { 89 osc {
87 compatible = "fsl,imx-osc", "fixed-clock"; 90 compatible = "fsl,imx-osc", "fixed-clock";
91 #clock-cells = <0>;
88 clock-frequency = <24000000>; 92 clock-frequency = <24000000>;
89 }; 93 };
90 }; 94 };
@@ -430,7 +434,7 @@
430 434
431 port { 435 port {
432 lvds1_in: endpoint { 436 lvds1_in: endpoint {
433 remote-endpoint = <&ipu_di0_lvds0>; 437 remote-endpoint = <&ipu_di1_lvds1>;
434 }; 438 };
435 }; 439 };
436 }; 440 };
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index a63bbb3d46bb..e4ae38fd0269 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -19,7 +19,10 @@
19 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 19 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
20 20
21 aliases { 21 aliases {
22 gpio7 = &stmpe_gpio; 22 gpio7 = &stmpe_gpio1;
23 gpio8 = &stmpe_gpio2;
24 stmpe-i2c0 = &stmpe1;
25 stmpe-i2c1 = &stmpe2;
23 }; 26 };
24 27
25 memory { 28 memory {
@@ -40,13 +43,15 @@
40 regulator-always-on; 43 regulator-always-on;
41 }; 44 };
42 45
43 reg_usb_otg_vbus: regulator@1 { 46 reg_usb_otg_switch: regulator@1 {
44 compatible = "regulator-fixed"; 47 compatible = "regulator-fixed";
45 reg = <1>; 48 reg = <1>;
46 regulator-name = "usb_otg_vbus"; 49 regulator-name = "usb_otg_switch";
47 regulator-min-microvolt = <5000000>; 50 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>; 51 regulator-max-microvolt = <5000000>;
49 gpio = <&gpio7 12 0>; 52 gpio = <&gpio7 12 0>;
53 regulator-boot-on;
54 regulator-always-on;
50 }; 55 };
51 56
52 reg_usb_host1: regulator@2 { 57 reg_usb_host1: regulator@2 {
@@ -65,23 +70,23 @@
65 70
66 led-blue { 71 led-blue {
67 label = "blue"; 72 label = "blue";
68 gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>; 73 gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "heartbeat"; 74 linux,default-trigger = "heartbeat";
70 }; 75 };
71 76
72 led-green { 77 led-green {
73 label = "green"; 78 label = "green";
74 gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>; 79 gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
75 }; 80 };
76 81
77 led-pink { 82 led-pink {
78 label = "pink"; 83 label = "pink";
79 gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>; 84 gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
80 }; 85 };
81 86
82 led-red { 87 led-red {
83 label = "red"; 88 label = "red";
84 gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>; 89 gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
85 }; 90 };
86 }; 91 };
87}; 92};
@@ -99,7 +104,8 @@
99 clock-frequency = <100000>; 104 clock-frequency = <100000>;
100 pinctrl-names = "default"; 105 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_i2c2 106 pinctrl-0 = <&pinctrl_i2c2
102 &pinctrl_stmpe>; 107 &pinctrl_stmpe1
108 &pinctrl_stmpe2>;
103 status = "okay"; 109 status = "okay";
104 110
105 pmic: pfuze100@08 { 111 pmic: pfuze100@08 {
@@ -205,13 +211,25 @@
205 }; 211 };
206 }; 212 };
207 213
208 stmpe: stmpe1601@40 { 214 stmpe1: stmpe1601@40 {
209 compatible = "st,stmpe1601"; 215 compatible = "st,stmpe1601";
210 reg = <0x40>; 216 reg = <0x40>;
211 interrupts = <30 0>; 217 interrupts = <30 0>;
212 interrupt-parent = <&gpio3>; 218 interrupt-parent = <&gpio3>;
213 219
214 stmpe_gpio: stmpe_gpio { 220 stmpe_gpio1: stmpe_gpio {
221 #gpio-cells = <2>;
222 compatible = "st,stmpe-gpio";
223 };
224 };
225
226 stmpe2: stmpe1601@44 {
227 compatible = "st,stmpe1601";
228 reg = <0x44>;
229 interrupts = <2 0>;
230 interrupt-parent = <&gpio5>;
231
232 stmpe_gpio2: stmpe_gpio {
215 #gpio-cells = <2>; 233 #gpio-cells = <2>;
216 compatible = "st,stmpe-gpio"; 234 compatible = "st,stmpe-gpio";
217 }; 235 };
@@ -273,10 +291,14 @@
273 >; 291 >;
274 }; 292 };
275 293
276 pinctrl_stmpe: stmpegrp { 294 pinctrl_stmpe1: stmpe1grp {
277 fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; 295 fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
278 }; 296 };
279 297
298 pinctrl_stmpe2: stmpe2grp {
299 fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
300 };
301
280 pinctrl_uart1: uart1grp { 302 pinctrl_uart1: uart1grp {
281 fsl,pins = < 303 fsl,pins = <
282 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 304 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
@@ -293,7 +315,7 @@
293 315
294 pinctrl_usbotg: usbotggrp { 316 pinctrl_usbotg: usbotggrp {
295 fsl,pins = < 317 fsl,pins = <
296 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 318 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
297 >; 319 >;
298 }; 320 };
299 321
@@ -344,11 +366,11 @@
344&usbh1 { 366&usbh1 {
345 vbus-supply = <&reg_usb_host1>; 367 vbus-supply = <&reg_usb_host1>;
346 disable-over-current; 368 disable-over-current;
369 dr_mode = "host";
347 status = "okay"; 370 status = "okay";
348}; 371};
349 372
350&usbotg { 373&usbotg {
351 vbus-supply = <&reg_usb_otg_vbus>;
352 pinctrl-names = "default"; 374 pinctrl-names = "default";
353 pinctrl-0 = <&pinctrl_usbotg>; 375 pinctrl-0 = <&pinctrl_usbotg>;
354 disable-over-current; 376 disable-over-current;
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 902f98310481..e51bb3f0fd56 100644
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -487,9 +487,6 @@
487 487
488&ldb { 488&ldb {
489 status = "okay"; 489 status = "okay";
490 lvds-channel@0 {
491 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
492 };
493}; 490};
494 491
495&pcie { 492&pcie {
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 8e99c9a9bc76..035d3a85c318 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -436,9 +436,6 @@
436 436
437&ldb { 437&ldb {
438 status = "okay"; 438 status = "okay";
439 lvds-channel@0 {
440 crtcs = <&ipu1 0>, <&ipu1 1>;
441 };
442}; 439};
443 440
444&pcie { 441&pcie {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index a3cb2fff8f61..d16066608e21 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -26,25 +26,25 @@
26 /* GPIO16 -> AR8035 25MHz */ 26 /* GPIO16 -> AR8035 25MHz */
27 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 27 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
28 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 28 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
29 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 29 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
30 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 30 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
31 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 31 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
32 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 32 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
33 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 33 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
34 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ 34 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
35 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 35 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
36 /* AR8035 pin strapping: IO voltage: pull up */ 36 /* AR8035 pin strapping: IO voltage: pull up */
37 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 37 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
38 /* AR8035 pin strapping: PHYADDR#0: pull down */ 38 /* AR8035 pin strapping: PHYADDR#0: pull down */
39 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 39 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
40 /* AR8035 pin strapping: PHYADDR#1: pull down */ 40 /* AR8035 pin strapping: PHYADDR#1: pull down */
41 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 41 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
42 /* AR8035 pin strapping: MODE#1: pull up */ 42 /* AR8035 pin strapping: MODE#1: pull up */
43 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 43 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
44 /* AR8035 pin strapping: MODE#3: pull up */ 44 /* AR8035 pin strapping: MODE#3: pull up */
45 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 45 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
46 /* AR8035 pin strapping: MODE#0: pull down */ 46 /* AR8035 pin strapping: MODE#0: pull down */
47 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 47 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
48 48
49 /* 49 /*
50 * As the RMII pins are also connected to RGMII 50 * As the RMII pins are also connected to RGMII
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 55cb926fa3f7..eca0971d4db1 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -10,6 +10,8 @@
10 * http://www.gnu.org/copyleft/gpl.html 10 * http://www.gnu.org/copyleft/gpl.html
11 */ 11 */
12 12
13#include <dt-bindings/interrupt-controller/arm-gic.h>
14
13#include "skeleton.dtsi" 15#include "skeleton.dtsi"
14 16
15/ { 17/ {
@@ -46,8 +48,6 @@
46 intc: interrupt-controller@00a01000 { 48 intc: interrupt-controller@00a01000 {
47 compatible = "arm,cortex-a9-gic"; 49 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>; 50 #interrupt-cells = <3>;
49 #address-cells = <1>;
50 #size-cells = <1>;
51 interrupt-controller; 51 interrupt-controller;
52 reg = <0x00a01000 0x1000>, 52 reg = <0x00a01000 0x1000>,
53 <0x00a00100 0x100>; 53 <0x00a00100 0x100>;
@@ -59,16 +59,19 @@
59 59
60 ckil { 60 ckil {
61 compatible = "fsl,imx-ckil", "fixed-clock"; 61 compatible = "fsl,imx-ckil", "fixed-clock";
62 #clock-cells = <0>;
62 clock-frequency = <32768>; 63 clock-frequency = <32768>;
63 }; 64 };
64 65
65 ckih1 { 66 ckih1 {
66 compatible = "fsl,imx-ckih1", "fixed-clock"; 67 compatible = "fsl,imx-ckih1", "fixed-clock";
68 #clock-cells = <0>;
67 clock-frequency = <0>; 69 clock-frequency = <0>;
68 }; 70 };
69 71
70 osc { 72 osc {
71 compatible = "fsl,imx-osc", "fixed-clock"; 73 compatible = "fsl,imx-osc", "fixed-clock";
74 #clock-cells = <0>;
72 clock-frequency = <24000000>; 75 clock-frequency = <24000000>;
73 }; 76 };
74 }; 77 };
@@ -138,6 +141,12 @@
138 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 141 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
139 num-lanes = <1>; 142 num-lanes = <1>;
140 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; 143 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
144 #interrupt-cells = <1>;
145 interrupt-map-mask = <0 0 0 0x7>;
146 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
147 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
148 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
141 clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; 150 clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
142 clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; 151 clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
143 status = "disabled"; 152 status = "disabled";
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index 864d8dfb51ca..a8d9a93fab85 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -282,6 +282,7 @@
282 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 282 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
283 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 283 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
284 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 284 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
285 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
285 >; 286 >;
286 }; 287 };
287 288
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 3cb4941afeef..d26b099260a3 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -68,8 +68,6 @@
68 intc: interrupt-controller@00a01000 { 68 intc: interrupt-controller@00a01000 {
69 compatible = "arm,cortex-a9-gic"; 69 compatible = "arm,cortex-a9-gic";
70 #interrupt-cells = <3>; 70 #interrupt-cells = <3>;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 interrupt-controller; 71 interrupt-controller;
74 reg = <0x00a01000 0x1000>, 72 reg = <0x00a01000 0x1000>,
75 <0x00a00100 0x100>; 73 <0x00a00100 0x100>;
@@ -81,11 +79,13 @@
81 79
82 ckil { 80 ckil {
83 compatible = "fixed-clock"; 81 compatible = "fixed-clock";
82 #clock-cells = <0>;
84 clock-frequency = <32768>; 83 clock-frequency = <32768>;
85 }; 84 };
86 85
87 osc { 86 osc {
88 compatible = "fixed-clock"; 87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 clock-frequency = <24000000>; 89 clock-frequency = <24000000>;
90 }; 90 };
91 }; 91 };
diff --git a/arch/arm/boot/dts/kirkwood-b3.dts b/arch/arm/boot/dts/kirkwood-b3.dts
index 40791053106b..6becedebaa4e 100644
--- a/arch/arm/boot/dts/kirkwood-b3.dts
+++ b/arch/arm/boot/dts/kirkwood-b3.dts
@@ -75,7 +75,7 @@
75 m25p16@0 { 75 m25p16@0 {
76 #address-cells = <1>; 76 #address-cells = <1>;
77 #size-cells = <1>; 77 #size-cells = <1>;
78 compatible = "m25p16"; 78 compatible = "st,m25p16";
79 reg = <0>; 79 reg = <0>;
80 spi-max-frequency = <40000000>; 80 spi-max-frequency = <40000000>;
81 mode = <0>; 81 mode = <0>;
diff --git a/arch/arm/boot/dts/kirkwood-cloudbox.dts b/arch/arm/boot/dts/kirkwood-cloudbox.dts
index 0e06fd3cee4d..3b62aeeaa3a2 100644
--- a/arch/arm/boot/dts/kirkwood-cloudbox.dts
+++ b/arch/arm/boot/dts/kirkwood-cloudbox.dts
@@ -46,7 +46,7 @@
46 flash@0 { 46 flash@0 {
47 #address-cells = <1>; 47 #address-cells = <1>;
48 #size-cells = <1>; 48 #size-cells = <1>;
49 compatible = "mx25l4005a"; 49 compatible = "mxicy,mx25l4005a";
50 reg = <0>; 50 reg = <0>;
51 spi-max-frequency = <20000000>; 51 spi-max-frequency = <20000000>;
52 mode = <0>; 52 mode = <0>;
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index ef3463e0ae19..28b3ee369778 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -43,7 +43,7 @@
43 m25p40@0 { 43 m25p40@0 {
44 #address-cells = <1>; 44 #address-cells = <1>;
45 #size-cells = <1>; 45 #size-cells = <1>;
46 compatible = "mx25l1606e"; 46 compatible = "mxicy,mx25l1606e";
47 reg = <0>; 47 reg = <0>;
48 spi-max-frequency = <50000000>; 48 spi-max-frequency = <50000000>;
49 mode = <0>; 49 mode = <0>;
diff --git a/arch/arm/boot/dts/kirkwood-laplug.dts b/arch/arm/boot/dts/kirkwood-laplug.dts
index c9e82eff9bf2..6761ffa2c4ab 100644
--- a/arch/arm/boot/dts/kirkwood-laplug.dts
+++ b/arch/arm/boot/dts/kirkwood-laplug.dts
@@ -48,7 +48,7 @@
48 status = "okay"; 48 status = "okay";
49 49
50 eeprom@50 { 50 eeprom@50 {
51 compatible = "at,24c04"; 51 compatible = "atmel,24c04";
52 pagesize = <16>; 52 pagesize = <16>;
53 reg = <0x50>; 53 reg = <0x50>;
54 }; 54 };
diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index 2cb0dc529165..32c6fb4a1162 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -56,7 +56,7 @@
56 flash@0 { 56 flash@0 {
57 #address-cells = <1>; 57 #address-cells = <1>;
58 #size-cells = <1>; 58 #size-cells = <1>;
59 compatible = "mx25l12805d"; 59 compatible = "mxicy,mx25l12805d";
60 reg = <0>; 60 reg = <0>;
61 spi-max-frequency = <50000000>; 61 spi-max-frequency = <50000000>;
62 mode = <0>; 62 mode = <0>;
diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
index 743152f31a81..e6e5ec4fe6b9 100644
--- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
@@ -32,7 +32,7 @@
32 flash@0 { 32 flash@0 {
33 #address-cells = <1>; 33 #address-cells = <1>;
34 #size-cells = <1>; 34 #size-cells = <1>;
35 compatible = "mx25l4005a"; 35 compatible = "mxicy,mx25l4005a";
36 reg = <0>; 36 reg = <0>;
37 spi-max-frequency = <20000000>; 37 spi-max-frequency = <20000000>;
38 mode = <0>; 38 mode = <0>;
@@ -50,7 +50,7 @@
50 status = "okay"; 50 status = "okay";
51 51
52 eeprom@50 { 52 eeprom@50 {
53 compatible = "at,24c04"; 53 compatible = "atmel,24c04";
54 pagesize = <16>; 54 pagesize = <16>;
55 reg = <0x50>; 55 reg = <0x50>;
56 }; 56 };
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts
index 03fa24cf3344..0a07af9d8e58 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -104,7 +104,7 @@
104 status = "okay"; 104 status = "okay";
105 105
106 adt7476: adt7476a@2e { 106 adt7476: adt7476a@2e {
107 compatible = "adt7476"; 107 compatible = "adi,adt7476";
108 reg = <0x2e>; 108 reg = <0x2e>;
109 }; 109 };
110 }; 110 };
diff --git a/arch/arm/boot/dts/kirkwood-nsa310a.dts b/arch/arm/boot/dts/kirkwood-nsa310a.dts
index a5e779452867..27ca6a79c48a 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310a.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310a.dts
@@ -94,7 +94,7 @@
94 status = "okay"; 94 status = "okay";
95 95
96 lm85: lm85@2e { 96 lm85: lm85@2e {
97 compatible = "lm85"; 97 compatible = "national,lm85";
98 reg = <0x2e>; 98 reg = <0x2e>;
99 }; 99 };
100 }; 100 };
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index b88da9392c32..0650beafc1de 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -40,7 +40,7 @@
40 pinctrl-names = "default"; 40 pinctrl-names = "default";
41 41
42 s35390a: s35390a@30 { 42 s35390a: s35390a@30 {
43 compatible = "s35390a"; 43 compatible = "sii,s35390a";
44 reg = <0x30>; 44 reg = <0x30>;
45 }; 45 };
46 }; 46 };
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
index b2f7cae06839..38520a287514 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
@@ -52,7 +52,7 @@
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 53
54 s24c02: s24c02@50 { 54 s24c02: s24c02@50 {
55 compatible = "24c02"; 55 compatible = "atmel,24c02";
56 reg = <0x50>; 56 reg = <0x50>;
57 }; 57 };
58 }; 58 };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm-ab.dts b/arch/arm/boot/dts/omap3-beagle-xm-ab.dts
new file mode 100644
index 000000000000..7ac3bcf59d59
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-beagle-xm-ab.dts
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "omap3-beagle-xm.dts"
10
11/ {
12 /* HS USB Port 2 Power enable was inverted with the xM C */
13 hsusb2_power: hsusb2_power_reg {
14 enable-active-high;
15 };
16};
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts
index bf5a515a3247..da402f0fdab4 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -112,7 +112,6 @@
112 reg = <0 0 0>; /* CS0, offset 0 */ 112 reg = <0 0 0>; /* CS0, offset 0 */
113 nand-bus-width = <16>; 113 nand-bus-width = <16>;
114 114
115 gpmc,device-nand;
116 gpmc,sync-clk-ps = <0>; 115 gpmc,sync-clk-ps = <0>;
117 gpmc,cs-on-ns = <0>; 116 gpmc,cs-on-ns = <0>;
118 gpmc,cs-rd-off-ns = <44>; 117 gpmc,cs-rd-off-ns = <44>;
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index 6369d9f43ca2..cc1dce6978f5 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -368,7 +368,6 @@
368 /* no elm on omap3 */ 368 /* no elm on omap3 */
369 369
370 gpmc,mux-add-data = <0>; 370 gpmc,mux-add-data = <0>;
371 gpmc,device-nand;
372 gpmc,device-width = <2>; 371 gpmc,device-width = <2>;
373 gpmc,wait-pin = <0>; 372 gpmc,wait-pin = <0>;
374 gpmc,wait-monitoring-ns = <0>; 373 gpmc,wait-monitoring-ns = <0>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 5e5790f631eb..acb9019dc437 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -74,7 +74,7 @@
74 /* 74 /*
75 * XXX: Use a flat representation of the OMAP3 interconnect. 75 * XXX: Use a flat representation of the OMAP3 interconnect.
76 * The real OMAP interconnect network is quite complex. 76 * The real OMAP interconnect network is quite complex.
77 * Since that will not bring real advantage to represent that in DT for 77 * Since it will not bring real advantage to represent that in DT for
78 * the moment, just use a fake OCP bus entry to represent the whole bus 78 * the moment, just use a fake OCP bus entry to represent the whole bus
79 * hierarchy. 79 * hierarchy.
80 */ 80 */
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 27fcac874742..649b5cd38b40 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -72,7 +72,7 @@
72 }; 72 };
73 73
74 /* 74 /*
75 * The soc node represents the soc top level view. It is uses for IPs 75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself. 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */ 77 */
78 soc { 78 soc {
@@ -96,7 +96,7 @@
96 /* 96 /*
97 * XXX: Use a flat representation of the OMAP4 interconnect. 97 * XXX: Use a flat representation of the OMAP4 interconnect.
98 * The real OMAP interconnect network is quite complex. 98 * The real OMAP interconnect network is quite complex.
99 * Since that will not bring real advantage to represent that in DT for 99 * Since it will not bring real advantage to represent that in DT for
100 * the moment, just use a fake OCP bus entry to represent the whole bus 100 * the moment, just use a fake OCP bus entry to represent the whole bus
101 * hierarchy. 101 * hierarchy.
102 */ 102 */
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 6f3de22fb266..f8c9855ce587 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -93,7 +93,7 @@
93 }; 93 };
94 94
95 /* 95 /*
96 * The soc node represents the soc top level view. It is uses for IPs 96 * The soc node represents the soc top level view. It is used for IPs
97 * that are not memory mapped in the MPU view or for the MPU itself. 97 * that are not memory mapped in the MPU view or for the MPU itself.
98 */ 98 */
99 soc { 99 soc {
@@ -107,7 +107,7 @@
107 /* 107 /*
108 * XXX: Use a flat representation of the OMAP3 interconnect. 108 * XXX: Use a flat representation of the OMAP3 interconnect.
109 * The real OMAP interconnect network is quite complex. 109 * The real OMAP interconnect network is quite complex.
110 * Since that will not bring real advantage to represent that in DT for 110 * Since it will not bring real advantage to represent that in DT for
111 * the moment, just use a fake OCP bus entry to represent the whole bus 111 * the moment, just use a fake OCP bus entry to represent the whole bus
112 * hierarchy. 112 * hierarchy.
113 */ 113 */
@@ -813,6 +813,12 @@
813 <0x4a084c00 0x40>; 813 <0x4a084c00 0x40>;
814 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 814 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
815 ctrl-module = <&omap_control_usb3phy>; 815 ctrl-module = <&omap_control_usb3phy>;
816 clocks = <&usb_phy_cm_clk32k>,
817 <&sys_clkin>,
818 <&usb_otg_ss_refclk960m>;
819 clock-names = "wkupclk",
820 "sysclk",
821 "refclk";
816 #phy-cells = <0>; 822 #phy-cells = <0>;
817 }; 823 };
818 }; 824 };
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 8280884bfa59..2551e9438d35 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -28,7 +28,6 @@
28 gic: interrupt-controller@c2800000 { 28 gic: interrupt-controller@c2800000 {
29 compatible = "arm,cortex-a9-gic"; 29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>; 30 #interrupt-cells = <3>;
31 #address-cells = <1>;
32 interrupt-controller; 31 interrupt-controller;
33 reg = <0xc2800000 0x1000>, 32 reg = <0xc2800000 0x1000>,
34 <0xc2000000 0x1000>; 33 <0xc2000000 0x1000>;
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 6e99eb2df076..d01048ab3e77 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -141,12 +141,12 @@
141 }; 141 };
142 142
143 sdhi0_pins: sd0 { 143 sdhi0_pins: sd0 {
144 renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; 144 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
145 renesas,function = "sdhi0"; 145 renesas,function = "sdhi0";
146 }; 146 };
147 147
148 sdhi2_pins: sd2 { 148 sdhi2_pins: sd2 {
149 renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; 149 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
150 renesas,function = "sdhi2"; 150 renesas,function = "sdhi2";
151 }; 151 };
152 152
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 618e5b537eaf..10b326bdf831 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -673,7 +673,7 @@
673 renesas,clock-indices = < 673 renesas,clock-indices = <
674 R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 674 R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
675 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 675 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
676 R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY 676 R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
677 >; 677 >;
678 clock-output-names = 678 clock-output-names =
679 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 679 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bdd73e6657b2..de1b6977c69a 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -230,17 +230,17 @@
230 }; 230 };
231 231
232 sdhi0_pins: sd0 { 232 sdhi0_pins: sd0 {
233 renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; 233 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
234 renesas,function = "sdhi0"; 234 renesas,function = "sdhi0";
235 }; 235 };
236 236
237 sdhi1_pins: sd1 { 237 sdhi1_pins: sd1 {
238 renesas,gpios = "sdhi1_data4", "sdhi1_ctrl"; 238 renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
239 renesas,function = "sdhi1"; 239 renesas,function = "sdhi1";
240 }; 240 };
241 241
242 sdhi2_pins: sd2 { 242 sdhi2_pins: sd2 {
243 renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; 243 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
244 renesas,function = "sdhi2"; 244 renesas,function = "sdhi2";
245 }; 245 };
246 246
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 46181708e59c..aa1cba94196c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -688,7 +688,7 @@
688 renesas,clock-indices = < 688 renesas,clock-indices = <
689 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 689 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
690 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 690 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
691 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY 691 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
692 >; 692 >;
693 clock-output-names = 693 clock-output-names =
694 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 694 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index bb36596ea205..ed9a70af3e3f 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -149,7 +149,7 @@
149 149
150 uart0 { 150 uart0 {
151 uart0_xfer: uart0-xfer { 151 uart0_xfer: uart0-xfer {
152 rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>, 152 rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
153 <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; 153 <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
154 }; 154 };
155 155
@@ -164,7 +164,7 @@
164 164
165 uart1 { 165 uart1 {
166 uart1_xfer: uart1-xfer { 166 uart1_xfer: uart1-xfer {
167 rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>, 167 rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
168 <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; 168 <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
169 }; 169 };
170 170
@@ -179,7 +179,7 @@
179 179
180 uart2 { 180 uart2 {
181 uart2_xfer: uart2-xfer { 181 uart2_xfer: uart2-xfer {
182 rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>, 182 rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
183 <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; 183 <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
184 }; 184 };
185 /* no rts / cts for uart2 */ 185 /* no rts / cts for uart2 */
@@ -187,7 +187,7 @@
187 187
188 uart3 { 188 uart3 {
189 uart3_xfer: uart3-xfer { 189 uart3_xfer: uart3-xfer {
190 rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>, 190 rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
191 <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; 191 <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
192 }; 192 };
193 193
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b7bd3b9a6753..5ecf552e1c00 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -34,7 +34,6 @@
34 gic: interrupt-controller@f0001000 { 34 gic: interrupt-controller@f0001000 {
35 compatible = "arm,cortex-a9-gic"; 35 compatible = "arm,cortex-a9-gic";
36 #interrupt-cells = <3>; 36 #interrupt-cells = <3>;
37 #address-cells = <1>;
38 interrupt-controller; 37 interrupt-controller;
39 reg = <0xf0001000 0x1000>, 38 reg = <0xf0001000 0x1000>,
40 <0xf0000100 0x100>; 39 <0xf0000100 0x100>;
diff --git a/arch/arm/boot/dts/spear320-hmi.dts b/arch/arm/boot/dts/spear320-hmi.dts
index 3075d2d3a8be..0aa6fef5ce22 100644
--- a/arch/arm/boot/dts/spear320-hmi.dts
+++ b/arch/arm/boot/dts/spear320-hmi.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 Evaluation Baord 2 * DTS file for SPEAr320 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Shiraz Hashim <shiraz.hashim@st.com> 4 * Copyright 2012 Shiraz Hashim <shiraz.linux.kernel@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index f09fb10a3791..81df870e5ee6 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -49,7 +49,7 @@
49 reg = <0xfe61f080 0x4>; 49 reg = <0xfe61f080 0x4>;
50 reg-names = "irqmux"; 50 reg-names = "irqmux";
51 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 51 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
52 interrupts-names = "irqmux"; 52 interrupt-names = "irqmux";
53 ranges = <0 0xfe610000 0x5000>; 53 ranges = <0 0xfe610000 0x5000>;
54 54
55 PIO0: gpio@fe610000 { 55 PIO0: gpio@fe610000 {
@@ -187,7 +187,7 @@
187 reg = <0xfee0f080 0x4>; 187 reg = <0xfee0f080 0x4>;
188 reg-names = "irqmux"; 188 reg-names = "irqmux";
189 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 189 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
190 interrupts-names = "irqmux"; 190 interrupt-names = "irqmux";
191 ranges = <0 0xfee00000 0x8000>; 191 ranges = <0 0xfee00000 0x8000>;
192 192
193 PIO5: gpio@fee00000 { 193 PIO5: gpio@fee00000 {
@@ -282,7 +282,7 @@
282 reg = <0xfe82f080 0x4>; 282 reg = <0xfe82f080 0x4>;
283 reg-names = "irqmux"; 283 reg-names = "irqmux";
284 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 284 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
285 interrupts-names = "irqmux"; 285 interrupt-names = "irqmux";
286 ranges = <0 0xfe820000 0x8000>; 286 ranges = <0 0xfe820000 0x8000>;
287 287
288 PIO13: gpio@fe820000 { 288 PIO13: gpio@fe820000 {
@@ -423,7 +423,7 @@
423 reg = <0xfd6bf080 0x4>; 423 reg = <0xfd6bf080 0x4>;
424 reg-names = "irqmux"; 424 reg-names = "irqmux";
425 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 425 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
426 interrupts-names = "irqmux"; 426 interrupt-names = "irqmux";
427 ranges = <0 0xfd6b0000 0x3000>; 427 ranges = <0 0xfd6b0000 0x3000>;
428 428
429 PIO100: gpio@fd6b0000 { 429 PIO100: gpio@fd6b0000 {
@@ -460,7 +460,7 @@
460 reg = <0xfd33f080 0x4>; 460 reg = <0xfd33f080 0x4>;
461 reg-names = "irqmux"; 461 reg-names = "irqmux";
462 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 462 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
463 interrupts-names = "irqmux"; 463 interrupt-names = "irqmux";
464 ranges = <0 0xfd330000 0x5000>; 464 ranges = <0 0xfd330000 0x5000>;
465 465
466 PIO103: gpio@fd330000 { 466 PIO103: gpio@fd330000 {
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index aeea304086eb..250d5ecc951e 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -53,7 +53,7 @@
53 reg = <0xfe61f080 0x4>; 53 reg = <0xfe61f080 0x4>;
54 reg-names = "irqmux"; 54 reg-names = "irqmux";
55 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 55 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
56 interrupts-names = "irqmux"; 56 interrupt-names = "irqmux";
57 ranges = <0 0xfe610000 0x6000>; 57 ranges = <0 0xfe610000 0x6000>;
58 58
59 PIO0: gpio@fe610000 { 59 PIO0: gpio@fe610000 {
@@ -201,7 +201,7 @@
201 reg = <0xfee0f080 0x4>; 201 reg = <0xfee0f080 0x4>;
202 reg-names = "irqmux"; 202 reg-names = "irqmux";
203 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; 203 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
204 interrupts-names = "irqmux"; 204 interrupt-names = "irqmux";
205 ranges = <0 0xfee00000 0x10000>; 205 ranges = <0 0xfee00000 0x10000>;
206 206
207 PIO5: gpio@fee00000 { 207 PIO5: gpio@fee00000 {
@@ -333,7 +333,7 @@
333 reg = <0xfe82f080 0x4>; 333 reg = <0xfe82f080 0x4>;
334 reg-names = "irqmux"; 334 reg-names = "irqmux";
335 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 335 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
336 interrupts-names = "irqmux"; 336 interrupt-names = "irqmux";
337 ranges = <0 0xfe820000 0x6000>; 337 ranges = <0 0xfe820000 0x6000>;
338 338
339 PIO13: gpio@fe820000 { 339 PIO13: gpio@fe820000 {
@@ -461,7 +461,7 @@
461 reg = <0xfd6bf080 0x4>; 461 reg = <0xfd6bf080 0x4>;
462 reg-names = "irqmux"; 462 reg-names = "irqmux";
463 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 463 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
464 interrupts-names = "irqmux"; 464 interrupt-names = "irqmux";
465 ranges = <0 0xfd6b0000 0x3000>; 465 ranges = <0 0xfd6b0000 0x3000>;
466 466
467 PIO100: gpio@fd6b0000 { 467 PIO100: gpio@fd6b0000 {
@@ -498,7 +498,7 @@
498 reg = <0xfd33f080 0x4>; 498 reg = <0xfd33f080 0x4>;
499 reg-names = "irqmux"; 499 reg-names = "irqmux";
500 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 500 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
501 interrupts-names = "irqmux"; 501 interrupt-names = "irqmux";
502 ranges = <0 0xfd330000 0x5000>; 502 ranges = <0 0xfd330000 0x5000>;
503 503
504 PIO103: gpio@fd330000 { 504 PIO103: gpio@fd330000 {
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index cf45a1a39483..6d540a025148 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -233,19 +233,6 @@
233 status = "disabled"; 233 status = "disabled";
234 }; 234 };
235 235
236 serial@0,70006400 {
237 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
238 reg = <0x0 0x70006400 0x0 0x40>;
239 reg-shift = <2>;
240 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&tegra_car TEGRA124_CLK_UARTE>;
242 resets = <&tegra_car 66>;
243 reset-names = "serial";
244 dmas = <&apbdma 20>, <&apbdma 20>;
245 dma-names = "rx", "tx";
246 status = "disabled";
247 };
248
249 pwm@0,7000a000 { 236 pwm@0,7000a000 {
250 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; 237 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
251 reg = <0x0 0x7000a000 0x0 0x100>; 238 reg = <0x0 0x7000a000 0x0 0x100>;
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 7dd1d6ede525..ded361075aab 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -25,11 +25,13 @@
25 clocks { 25 clocks {
26 audio_ext { 26 audio_ext {
27 compatible = "fixed-clock"; 27 compatible = "fixed-clock";
28 #clock-cells = <0>;
28 clock-frequency = <24576000>; 29 clock-frequency = <24576000>;
29 }; 30 };
30 31
31 enet_ext { 32 enet_ext {
32 compatible = "fixed-clock"; 33 compatible = "fixed-clock";
34 #clock-cells = <0>;
33 clock-frequency = <50000000>; 35 clock-frequency = <50000000>;
34 }; 36 };
35 }; 37 };
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 804873367669..b8ce0aa7b157 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -45,11 +45,13 @@
45 45
46 sxosc { 46 sxosc {
47 compatible = "fixed-clock"; 47 compatible = "fixed-clock";
48 #clock-cells = <0>;
48 clock-frequency = <32768>; 49 clock-frequency = <32768>;
49 }; 50 };
50 51
51 fxosc { 52 fxosc {
52 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
54 #clock-cells = <0>;
53 clock-frequency = <24000000>; 55 clock-frequency = <24000000>;
54 }; 56 };
55 }; 57 };
@@ -72,8 +74,6 @@
72 intc: interrupt-controller@40002000 { 74 intc: interrupt-controller@40002000 {
73 compatible = "arm,cortex-a9-gic"; 75 compatible = "arm,cortex-a9-gic";
74 #interrupt-cells = <3>; 76 #interrupt-cells = <3>;
75 #address-cells = <1>;
76 #size-cells = <1>;
77 interrupt-controller; 77 interrupt-controller;
78 reg = <0x40003000 0x1000>, 78 reg = <0x40003000 0x1000>,
79 <0x40002100 0x100>; 79 <0x40002100 0x100>;
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 511180769af5..c1176abc34d9 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -24,6 +24,7 @@
24 device_type = "cpu"; 24 device_type = "cpu";
25 reg = <0>; 25 reg = <0>;
26 clocks = <&clkc 3>; 26 clocks = <&clkc 3>;
27 clock-latency = <1000>;
27 operating-points = < 28 operating-points = <
28 /* kHz uV */ 29 /* kHz uV */
29 666667 1000000 30 666667 1000000
@@ -54,6 +55,28 @@
54 interrupt-parent = <&intc>; 55 interrupt-parent = <&intc>;
55 ranges; 56 ranges;
56 57
58 i2c0: zynq-i2c@e0004000 {
59 compatible = "cdns,i2c-r1p10";
60 status = "disabled";
61 clocks = <&clkc 38>;
62 interrupt-parent = <&intc>;
63 interrupts = <0 25 4>;
64 reg = <0xe0004000 0x1000>;
65 #address-cells = <1>;
66 #size-cells = <0>;
67 };
68
69 i2c1: zynq-i2c@e0005000 {
70 compatible = "cdns,i2c-r1p10";
71 status = "disabled";
72 clocks = <&clkc 39>;
73 interrupt-parent = <&intc>;
74 interrupts = <0 48 4>;
75 reg = <0xe0005000 0x1000>;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 };
79
57 intc: interrupt-controller@f8f01000 { 80 intc: interrupt-controller@f8f01000 {
58 compatible = "arm,cortex-a9-gic"; 81 compatible = "arm,cortex-a9-gic";
59 #interrupt-cells = <3>; 82 #interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index c913f77a21eb..5e09cee33d42 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -34,6 +34,82 @@
34 phy-mode = "rgmii"; 34 phy-mode = "rgmii";
35}; 35};
36 36
37&i2c0 {
38 status = "okay";
39 clock-frequency = <400000>;
40
41 i2cswitch@74 {
42 compatible = "nxp,pca9548";
43 #address-cells = <1>;
44 #size-cells = <0>;
45 reg = <0x74>;
46
47 i2c@0 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 reg = <0>;
51 si570: clock-generator@5d {
52 #clock-cells = <0>;
53 compatible = "silabs,si570";
54 temperature-stability = <50>;
55 reg = <0x5d>;
56 factory-fout = <156250000>;
57 clock-frequency = <148500000>;
58 };
59 };
60
61 i2c@2 {
62 #address-cells = <1>;
63 #size-cells = <0>;
64 reg = <2>;
65 eeprom@54 {
66 compatible = "at,24c08";
67 reg = <0x54>;
68 };
69 };
70
71 i2c@3 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 reg = <3>;
75 gpio@21 {
76 compatible = "ti,tca6416";
77 reg = <0x21>;
78 gpio-controller;
79 #gpio-cells = <2>;
80 };
81 };
82
83 i2c@4 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 reg = <4>;
87 rtc@51 {
88 compatible = "nxp,pcf8563";
89 reg = <0x51>;
90 };
91 };
92
93 i2c@7 {
94 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <7>;
97 hwmon@52 {
98 compatible = "ti,ucd9248";
99 reg = <52>;
100 };
101 hwmon@53 {
102 compatible = "ti,ucd9248";
103 reg = <53>;
104 };
105 hwmon@54 {
106 compatible = "ti,ucd9248";
107 reg = <54>;
108 };
109 };
110 };
111};
112
37&sdhci0 { 113&sdhci0 {
38 status = "okay"; 114 status = "okay";
39}; 115};
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 88f62c50382e..4cc9913078cd 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,74 @@
35 phy-mode = "rgmii"; 35 phy-mode = "rgmii";
36}; 36};
37 37
38&i2c0 {
39 status = "okay";
40 clock-frequency = <400000>;
41
42 i2cswitch@74 {
43 compatible = "nxp,pca9548";
44 #address-cells = <1>;
45 #size-cells = <0>;
46 reg = <0x74>;
47
48 i2c@0 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 reg = <0>;
52 si570: clock-generator@5d {
53 #clock-cells = <0>;
54 compatible = "silabs,si570";
55 temperature-stability = <50>;
56 reg = <0x5d>;
57 factory-fout = <156250000>;
58 clock-frequency = <148500000>;
59 };
60 };
61
62 i2c@2 {
63 #address-cells = <1>;
64 #size-cells = <0>;
65 reg = <2>;
66 eeprom@54 {
67 compatible = "at,24c08";
68 reg = <0x54>;
69 };
70 };
71
72 i2c@3 {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 reg = <3>;
76 gpio@21 {
77 compatible = "ti,tca6416";
78 reg = <0x21>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 };
82 };
83
84 i2c@4 {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 reg = <4>;
88 rtc@51 {
89 compatible = "nxp,pcf8563";
90 reg = <0x51>;
91 };
92 };
93
94 i2c@7 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 reg = <7>;
98 ucd90120@65 {
99 compatible = "ti,ucd90120";
100 reg = <0x65>;
101 };
102 };
103 };
104};
105
38&sdhci0 { 106&sdhci0 {
39 status = "okay"; 107 status = "okay";
40}; 108};
diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c
index 5774b6ea7ad5..f01c0ee0c87e 100644
--- a/arch/arm/common/bL_switcher.c
+++ b/arch/arm/common/bL_switcher.c
@@ -797,10 +797,8 @@ static int __init bL_switcher_init(void)
797{ 797{
798 int ret; 798 int ret;
799 799
800 if (MAX_NR_CLUSTERS != 2) { 800 if (!mcpm_is_available())
801 pr_err("%s: only dual cluster systems are supported\n", __func__); 801 return -ENODEV;
802 return -EINVAL;
803 }
804 802
805 cpu_notifier(bL_switcher_hotplug_callback, 0); 803 cpu_notifier(bL_switcher_hotplug_callback, 0);
806 804
diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
index 1e361abc29eb..86fd60fefbc9 100644
--- a/arch/arm/common/mcpm_entry.c
+++ b/arch/arm/common/mcpm_entry.c
@@ -48,6 +48,11 @@ int __init mcpm_platform_register(const struct mcpm_platform_ops *ops)
48 return 0; 48 return 0;
49} 49}
50 50
51bool mcpm_is_available(void)
52{
53 return (platform_ops) ? true : false;
54}
55
51int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster) 56int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster)
52{ 57{
53 if (!platform_ops) 58 if (!platform_ops)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 01004640ee4d..3df3f3a79ef4 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -132,7 +132,7 @@ CONFIG_CRC_ITU_T=y
132CONFIG_CRC7=y 132CONFIG_CRC7=y
133CONFIG_XZ_DEC=y 133CONFIG_XZ_DEC=y
134CONFIG_AVERAGE=y 134CONFIG_AVERAGE=y
135CONFIG_PINCTRL_CAPRI=y 135CONFIG_PINCTRL_BCM281XX=y
136CONFIG_WATCHDOG=y 136CONFIG_WATCHDOG=y
137CONFIG_BCM_KONA_WDT=y 137CONFIG_BCM_KONA_WDT=y
138CONFIG_BCM_KONA_WDT_DEBUG=y 138CONFIG_BCM_KONA_WDT_DEBUG=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index a9667957b757..a4e8d017f25b 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -226,7 +226,7 @@ CONFIG_USB_DWC3=m
226CONFIG_USB_TEST=y 226CONFIG_USB_TEST=y
227CONFIG_NOP_USB_XCEIV=y 227CONFIG_NOP_USB_XCEIV=y
228CONFIG_OMAP_USB2=y 228CONFIG_OMAP_USB2=y
229CONFIG_OMAP_USB3=y 229CONFIG_TI_PIPE3=y
230CONFIG_AM335X_PHY_USB=y 230CONFIG_AM335X_PHY_USB=y
231CONFIG_USB_GADGET=y 231CONFIG_USB_GADGET=y
232CONFIG_USB_GADGET_DEBUG=y 232CONFIG_USB_GADGET_DEBUG=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index fd81a1b99cce..aaa95ab606a8 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -11,6 +11,7 @@ CONFIG_MODULES=y
11CONFIG_MODULE_UNLOAD=y 11CONFIG_MODULE_UNLOAD=y
12# CONFIG_LBDAF is not set 12# CONFIG_LBDAF is not set
13# CONFIG_BLK_DEV_BSG is not set 13# CONFIG_BLK_DEV_BSG is not set
14CONFIG_PARTITION_ADVANCED=y
14# CONFIG_IOSCHED_CFQ is not set 15# CONFIG_IOSCHED_CFQ is not set
15# CONFIG_ARCH_MULTI_V7 is not set 16# CONFIG_ARCH_MULTI_V7 is not set
16CONFIG_ARCH_U300=y 17CONFIG_ARCH_U300=y
@@ -21,7 +22,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
21CONFIG_ZBOOT_ROM_BSS=0x0 22CONFIG_ZBOOT_ROM_BSS=0x0
22CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072" 23CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
23CONFIG_CPU_IDLE=y 24CONFIG_CPU_IDLE=y
24CONFIG_FPE_NWFPE=y
25# CONFIG_SUSPEND is not set 25# CONFIG_SUSPEND is not set
26CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 26CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
27# CONFIG_PREVENT_FIRMWARE_BUILD is not set 27# CONFIG_PREVENT_FIRMWARE_BUILD is not set
@@ -64,8 +64,8 @@ CONFIG_TMPFS=y
64CONFIG_NLS_CODEPAGE_437=y 64CONFIG_NLS_CODEPAGE_437=y
65CONFIG_NLS_ISO8859_1=y 65CONFIG_NLS_ISO8859_1=y
66CONFIG_PRINTK_TIME=y 66CONFIG_PRINTK_TIME=y
67CONFIG_DEBUG_INFO=y
67CONFIG_DEBUG_FS=y 68CONFIG_DEBUG_FS=y
68# CONFIG_SCHED_DEBUG is not set 69# CONFIG_SCHED_DEBUG is not set
69CONFIG_TIMER_STATS=y 70CONFIG_TIMER_STATS=y
70# CONFIG_DEBUG_PREEMPT is not set 71# CONFIG_DEBUG_PREEMPT is not set
71CONFIG_DEBUG_INFO=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 65f77885c167..d219d6a43238 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -1,16 +1,16 @@
1# CONFIG_SWAP is not set 1# CONFIG_SWAP is not set
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_NO_HZ=y 3CONFIG_NO_HZ_IDLE=y
4CONFIG_HIGH_RES_TIMERS=y 4CONFIG_HIGH_RES_TIMERS=y
5CONFIG_BLK_DEV_INITRD=y 5CONFIG_BLK_DEV_INITRD=y
6CONFIG_KALLSYMS_ALL=y 6CONFIG_KALLSYMS_ALL=y
7CONFIG_MODULES=y 7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y 8CONFIG_MODULE_UNLOAD=y
9# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_PARTITION_ADVANCED=y
10CONFIG_ARCH_U8500=y 11CONFIG_ARCH_U8500=y
11CONFIG_MACH_HREFV60=y 12CONFIG_MACH_HREFV60=y
12CONFIG_MACH_SNOWBALL=y 13CONFIG_MACH_SNOWBALL=y
13CONFIG_MACH_UX500_DT=y
14CONFIG_SMP=y 14CONFIG_SMP=y
15CONFIG_NR_CPUS=2 15CONFIG_NR_CPUS=2
16CONFIG_PREEMPT=y 16CONFIG_PREEMPT=y
@@ -34,16 +34,22 @@ CONFIG_IP_PNP=y
34CONFIG_IP_PNP_DHCP=y 34CONFIG_IP_PNP_DHCP=y
35CONFIG_NETFILTER=y 35CONFIG_NETFILTER=y
36CONFIG_PHONET=y 36CONFIG_PHONET=y
37# CONFIG_WIRELESS is not set 37CONFIG_CFG80211=y
38CONFIG_CFG80211_DEBUGFS=y
39CONFIG_MAC80211=y
40CONFIG_MAC80211_LEDS=y
38CONFIG_CAIF=y 41CONFIG_CAIF=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 42CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
43CONFIG_DEVTMPFS=y
44CONFIG_DEVTMPFS_MOUNT=y
40CONFIG_BLK_DEV_RAM=y 45CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=65536 46CONFIG_BLK_DEV_RAM_SIZE=65536
42CONFIG_SENSORS_BH1780=y 47CONFIG_SENSORS_BH1780=y
43CONFIG_NETDEVICES=y 48CONFIG_NETDEVICES=y
44CONFIG_SMSC911X=y 49CONFIG_SMSC911X=y
45CONFIG_SMSC_PHY=y 50CONFIG_SMSC_PHY=y
46# CONFIG_WLAN is not set 51CONFIG_CW1200=y
52CONFIG_CW1200_WLAN_SDIO=y
47# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 53# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
48CONFIG_INPUT_EVDEV=y 54CONFIG_INPUT_EVDEV=y
49# CONFIG_KEYBOARD_ATKBD is not set 55# CONFIG_KEYBOARD_ATKBD is not set
@@ -85,15 +91,12 @@ CONFIG_AB8500_USB=y
85CONFIG_USB_GADGET=y 91CONFIG_USB_GADGET=y
86CONFIG_USB_ETH=m 92CONFIG_USB_ETH=m
87CONFIG_MMC=y 93CONFIG_MMC=y
88CONFIG_MMC_UNSAFE_RESUME=y
89# CONFIG_MMC_BLOCK_BOUNCE is not set
90CONFIG_MMC_ARMMMCI=y 94CONFIG_MMC_ARMMMCI=y
91CONFIG_NEW_LEDS=y 95CONFIG_NEW_LEDS=y
92CONFIG_LEDS_CLASS=y 96CONFIG_LEDS_CLASS=y
93CONFIG_LEDS_LM3530=y 97CONFIG_LEDS_LM3530=y
94CONFIG_LEDS_GPIO=y 98CONFIG_LEDS_GPIO=y
95CONFIG_LEDS_LP5521=y 99CONFIG_LEDS_LP5521=y
96CONFIG_LEDS_TRIGGERS=y
97CONFIG_LEDS_TRIGGER_HEARTBEAT=y 100CONFIG_LEDS_TRIGGER_HEARTBEAT=y
98CONFIG_RTC_CLASS=y 101CONFIG_RTC_CLASS=y
99CONFIG_RTC_DRV_AB8500=y 102CONFIG_RTC_DRV_AB8500=y
@@ -103,6 +106,11 @@ CONFIG_STE_DMA40=y
103CONFIG_STAGING=y 106CONFIG_STAGING=y
104CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y 107CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
105CONFIG_HSEM_U8500=y 108CONFIG_HSEM_U8500=y
109CONFIG_IIO=y
110CONFIG_IIO_ST_ACCEL_3AXIS=y
111CONFIG_IIO_ST_GYRO_3AXIS=y
112CONFIG_IIO_ST_MAGN_3AXIS=y
113CONFIG_IIO_ST_PRESS=y
106CONFIG_EXT2_FS=y 114CONFIG_EXT2_FS=y
107CONFIG_EXT2_FS_XATTR=y 115CONFIG_EXT2_FS_XATTR=y
108CONFIG_EXT2_FS_POSIX_ACL=y 116CONFIG_EXT2_FS_POSIX_ACL=y
@@ -110,8 +118,6 @@ CONFIG_EXT2_FS_SECURITY=y
110CONFIG_EXT3_FS=y 118CONFIG_EXT3_FS=y
111CONFIG_EXT4_FS=y 119CONFIG_EXT4_FS=y
112CONFIG_VFAT_FS=y 120CONFIG_VFAT_FS=y
113CONFIG_DEVTMPFS=y
114CONFIG_DEVTMPFS_MOUNT=y
115CONFIG_TMPFS=y 121CONFIG_TMPFS=y
116CONFIG_TMPFS_POSIX_ACL=y 122CONFIG_TMPFS_POSIX_ACL=y
117# CONFIG_MISC_FILESYSTEMS is not set 123# CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index c651e3b26ec7..4764344367d4 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -222,22 +222,22 @@ static inline int cpu_is_xsc3(void)
222#endif 222#endif
223 223
224/* 224/*
225 * Marvell's PJ4 core is based on V7 version. It has some modification 225 * Marvell's PJ4 and PJ4B cores are based on V7 version,
226 * for coprocessor setting. For this reason, we need a way to distinguish 226 * but require a specical sequence for enabling coprocessors.
227 * it. 227 * For this reason, we need a way to distinguish them.
228 */ 228 */
229#ifndef CONFIG_CPU_PJ4 229#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
230#define cpu_is_pj4() 0
231#else
232static inline int cpu_is_pj4(void) 230static inline int cpu_is_pj4(void)
233{ 231{
234 unsigned int id; 232 unsigned int id;
235 233
236 id = read_cpuid_id(); 234 id = read_cpuid_id();
237 if ((id & 0xfffffff0) == 0x562f5840) 235 if ((id & 0xff0fff00) == 0x560f5800)
238 return 1; 236 return 1;
239 237
240 return 0; 238 return 0;
241} 239}
240#else
241#define cpu_is_pj4() 0
242#endif 242#endif
243#endif 243#endif
diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h
index 191ada6e4d2d..662c7bd06108 100644
--- a/arch/arm/include/asm/div64.h
+++ b/arch/arm/include/asm/div64.h
@@ -156,7 +156,7 @@
156 /* Select the best insn combination to perform the */ \ 156 /* Select the best insn combination to perform the */ \
157 /* actual __m * __n / (__p << 64) operation. */ \ 157 /* actual __m * __n / (__p << 64) operation. */ \
158 if (!__c) { \ 158 if (!__c) { \
159 asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ 159 asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
160 "mov %Q0, #0" \ 160 "mov %Q0, #0" \
161 : "=&r" (__res) \ 161 : "=&r" (__res) \
162 : "r" (__m), "r" (__n) \ 162 : "r" (__m), "r" (__n) \
diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h
index 608516ebabfe..a5ff410dcdb6 100644
--- a/arch/arm/include/asm/mcpm.h
+++ b/arch/arm/include/asm/mcpm.h
@@ -54,6 +54,13 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
54 */ 54 */
55 55
56/** 56/**
57 * mcpm_is_available - returns whether MCPM is initialized and available
58 *
59 * This returns true or false accordingly.
60 */
61bool mcpm_is_available(void);
62
63/**
57 * mcpm_cpu_power_up - make given CPU in given cluster runable 64 * mcpm_cpu_power_up - make given CPU in given cluster runable
58 * 65 *
59 * @cpu: CPU number within given cluster 66 * @cpu: CPU number within given cluster
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 0baf7f0d9394..f1a0dace3efe 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -98,15 +98,25 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb)
98 } 98 }
99} 99}
100 100
101static inline void tlb_flush_mmu(struct mmu_gather *tlb) 101static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
102{ 102{
103 tlb_flush(tlb); 103 tlb_flush(tlb);
104}
105
106static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
107{
104 free_pages_and_swap_cache(tlb->pages, tlb->nr); 108 free_pages_and_swap_cache(tlb->pages, tlb->nr);
105 tlb->nr = 0; 109 tlb->nr = 0;
106 if (tlb->pages == tlb->local) 110 if (tlb->pages == tlb->local)
107 __tlb_alloc_page(tlb); 111 __tlb_alloc_page(tlb);
108} 112}
109 113
114static inline void tlb_flush_mmu(struct mmu_gather *tlb)
115{
116 tlb_flush_mmu_tlbonly(tlb);
117 tlb_flush_mmu_free(tlb);
118}
119
110static inline void 120static inline void
111tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end) 121tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
112{ 122{
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index fb5584d0cc05..ba94446c72d9 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -408,6 +408,7 @@
408#define __NR_finit_module (__NR_SYSCALL_BASE+379) 408#define __NR_finit_module (__NR_SYSCALL_BASE+379)
409#define __NR_sched_setattr (__NR_SYSCALL_BASE+380) 409#define __NR_sched_setattr (__NR_SYSCALL_BASE+380)
410#define __NR_sched_getattr (__NR_SYSCALL_BASE+381) 410#define __NR_sched_getattr (__NR_SYSCALL_BASE+381)
411#define __NR_renameat2 (__NR_SYSCALL_BASE+382)
411 412
412/* 413/*
413 * This may need to be greater than __NR_last_syscall+1 in order to 414 * This may need to be greater than __NR_last_syscall+1 in order to
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index a766bcbaf8ad..040619c32d68 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
79obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o 79obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
80obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o 80obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
81obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o 81obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o
82obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o
82obj-$(CONFIG_IWMMXT) += iwmmxt.o 83obj-$(CONFIG_IWMMXT) += iwmmxt.o
83obj-$(CONFIG_PERF_EVENTS) += perf_regs.o 84obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
84obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o 85obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 166e945de832..8f51bdcdacbb 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -391,6 +391,7 @@
391 CALL(sys_finit_module) 391 CALL(sys_finit_module)
392/* 380 */ CALL(sys_sched_setattr) 392/* 380 */ CALL(sys_sched_setattr)
393 CALL(sys_sched_getattr) 393 CALL(sys_sched_getattr)
394 CALL(sys_renameat2)
394#ifndef syscalls_counted 395#ifndef syscalls_counted
395.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 396.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
396#define syscalls_counted 397#define syscalls_counted
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f8c08839edf3..591d6e4a6492 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -587,7 +587,7 @@ __fixup_pv_table:
587 add r6, r6, r3 @ adjust __pv_phys_pfn_offset address 587 add r6, r6, r3 @ adjust __pv_phys_pfn_offset address
588 add r7, r7, r3 @ adjust __pv_offset address 588 add r7, r7, r3 @ adjust __pv_offset address
589 mov r0, r8, lsr #12 @ convert to PFN 589 mov r0, r8, lsr #12 @ convert to PFN
590 str r0, [r6, #LOW_OFFSET] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset 590 str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
591 strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits 591 strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits
592 mov r6, r3, lsr #24 @ constant for add/sub instructions 592 mov r6, r3, lsr #24 @ constant for add/sub instructions
593 teq r3, r6, lsl #24 @ must be 16MiB aligned 593 teq r3, r6, lsl #24 @ must be 16MiB aligned
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index a08783823b32..2452dd1bef53 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -19,12 +19,16 @@
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21 21
22#if defined(CONFIG_CPU_PJ4) 22#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
23#define PJ4(code...) code 23#define PJ4(code...) code
24#define XSC(code...) 24#define XSC(code...)
25#else 25#elif defined(CONFIG_CPU_MOHAWK) || \
26 defined(CONFIG_CPU_XSC3) || \
27 defined(CONFIG_CPU_XSCALE)
26#define PJ4(code...) 28#define PJ4(code...)
27#define XSC(code...) code 29#define XSC(code...) code
30#else
31#error "Unsupported iWMMXt architecture"
28#endif 32#endif
29 33
30#define MMX_WR0 (0x00) 34#define MMX_WR0 (0x00)
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index f0d180d8b29f..8cf0996aa1a8 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -184,3 +184,10 @@ void machine_kexec(struct kimage *image)
184 184
185 soft_restart(reboot_entry_phys); 185 soft_restart(reboot_entry_phys);
186} 186}
187
188void arch_crash_save_vmcoreinfo(void)
189{
190#ifdef CONFIG_ARM_LPAE
191 VMCOREINFO_CONFIG(ARM_LPAE);
192#endif
193}
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c
index fc7208636284..8153e36b2491 100644
--- a/arch/arm/kernel/pj4-cp0.c
+++ b/arch/arm/kernel/pj4-cp0.c
@@ -45,7 +45,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
45 return NOTIFY_DONE; 45 return NOTIFY_DONE;
46} 46}
47 47
48static struct notifier_block iwmmxt_notifier_block = { 48static struct notifier_block __maybe_unused iwmmxt_notifier_block = {
49 .notifier_call = iwmmxt_do, 49 .notifier_call = iwmmxt_do,
50}; 50};
51 51
@@ -72,6 +72,33 @@ static void __init pj4_cp_access_write(u32 value)
72 : "=r" (temp) : "r" (value)); 72 : "=r" (temp) : "r" (value));
73} 73}
74 74
75static int __init pj4_get_iwmmxt_version(void)
76{
77 u32 cp_access, wcid;
78
79 cp_access = pj4_cp_access_read();
80 pj4_cp_access_write(cp_access | 0xf);
81
82 /* check if coprocessor 0 and 1 are available */
83 if ((pj4_cp_access_read() & 0xf) != 0xf) {
84 pj4_cp_access_write(cp_access);
85 return -ENODEV;
86 }
87
88 /* read iWMMXt coprocessor id register p1, c0 */
89 __asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid));
90
91 pj4_cp_access_write(cp_access);
92
93 /* iWMMXt v1 */
94 if ((wcid & 0xffffff00) == 0x56051000)
95 return 1;
96 /* iWMMXt v2 */
97 if ((wcid & 0xffffff00) == 0x56052000)
98 return 2;
99
100 return -EINVAL;
101}
75 102
76/* 103/*
77 * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy 104 * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
@@ -79,17 +106,26 @@ static void __init pj4_cp_access_write(u32 value)
79 */ 106 */
80static int __init pj4_cp0_init(void) 107static int __init pj4_cp0_init(void)
81{ 108{
82 u32 cp_access; 109 u32 __maybe_unused cp_access;
110 int vers;
83 111
84 if (!cpu_is_pj4()) 112 if (!cpu_is_pj4())
85 return 0; 113 return 0;
86 114
115 vers = pj4_get_iwmmxt_version();
116 if (vers < 0)
117 return 0;
118
119#ifndef CONFIG_IWMMXT
120 pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n");
121#else
87 cp_access = pj4_cp_access_read() & ~0xf; 122 cp_access = pj4_cp_access_read() & ~0xf;
88 pj4_cp_access_write(cp_access); 123 pj4_cp_access_write(cp_access);
89 124
90 printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n"); 125 pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers);
91 elf_hwcap |= HWCAP_IWMMXT; 126 elf_hwcap |= HWCAP_IWMMXT;
92 thread_register_notifier(&iwmmxt_notifier_block); 127 thread_register_notifier(&iwmmxt_notifier_block);
128#endif
93 129
94 return 0; 130 return 0;
95} 131}
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index 702bd329d9d0..e90a3148f385 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -203,9 +203,9 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,
203 int ret; 203 int ret;
204 204
205 switch (cmd) { 205 switch (cmd) {
206 case F_GETLKP: 206 case F_OFD_GETLK:
207 case F_SETLKP: 207 case F_OFD_SETLK:
208 case F_SETLKPW: 208 case F_OFD_SETLKW:
209 case F_GETLK64: 209 case F_GETLK64:
210 case F_SETLK64: 210 case F_SETLK64:
211 case F_SETLKW64: 211 case F_SETLKW64:
diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig
index 466bd299b1a8..4be5bb150bdd 100644
--- a/arch/arm/kvm/Kconfig
+++ b/arch/arm/kvm/Kconfig
@@ -23,7 +23,7 @@ config KVM
23 select HAVE_KVM_CPU_RELAX_INTERCEPT 23 select HAVE_KVM_CPU_RELAX_INTERCEPT
24 select KVM_MMIO 24 select KVM_MMIO
25 select KVM_ARM_HOST 25 select KVM_ARM_HOST
26 depends on ARM_VIRT_EXT && ARM_LPAE 26 depends on ARM_VIRT_EXT && ARM_LPAE && !CPU_BIG_ENDIAN
27 ---help--- 27 ---help---
28 Support hosting virtualized guest machines. You will also 28 Support hosting virtualized guest machines. You will also
29 need to select one or more of the processor modules below. 29 need to select one or more of the processor modules below.
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 80bb1e6c2c29..16f804938b8f 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -42,6 +42,8 @@ static unsigned long hyp_idmap_start;
42static unsigned long hyp_idmap_end; 42static unsigned long hyp_idmap_end;
43static phys_addr_t hyp_idmap_vector; 43static phys_addr_t hyp_idmap_vector;
44 44
45#define pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
46
45#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x)) 47#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
46 48
47static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) 49static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
@@ -293,14 +295,14 @@ void free_boot_hyp_pgd(void)
293 if (boot_hyp_pgd) { 295 if (boot_hyp_pgd) {
294 unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); 296 unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
295 unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); 297 unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
296 kfree(boot_hyp_pgd); 298 free_pages((unsigned long)boot_hyp_pgd, pgd_order);
297 boot_hyp_pgd = NULL; 299 boot_hyp_pgd = NULL;
298 } 300 }
299 301
300 if (hyp_pgd) 302 if (hyp_pgd)
301 unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); 303 unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
302 304
303 kfree(init_bounce_page); 305 free_page((unsigned long)init_bounce_page);
304 init_bounce_page = NULL; 306 init_bounce_page = NULL;
305 307
306 mutex_unlock(&kvm_hyp_pgd_mutex); 308 mutex_unlock(&kvm_hyp_pgd_mutex);
@@ -330,7 +332,7 @@ void free_hyp_pgds(void)
330 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) 332 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
331 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); 333 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
332 334
333 kfree(hyp_pgd); 335 free_pages((unsigned long)hyp_pgd, pgd_order);
334 hyp_pgd = NULL; 336 hyp_pgd = NULL;
335 } 337 }
336 338
@@ -1024,7 +1026,7 @@ int kvm_mmu_init(void)
1024 size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start; 1026 size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start;
1025 phys_addr_t phys_base; 1027 phys_addr_t phys_base;
1026 1028
1027 init_bounce_page = kmalloc(PAGE_SIZE, GFP_KERNEL); 1029 init_bounce_page = (void *)__get_free_page(GFP_KERNEL);
1028 if (!init_bounce_page) { 1030 if (!init_bounce_page) {
1029 kvm_err("Couldn't allocate HYP init bounce page\n"); 1031 kvm_err("Couldn't allocate HYP init bounce page\n");
1030 err = -ENOMEM; 1032 err = -ENOMEM;
@@ -1050,8 +1052,9 @@ int kvm_mmu_init(void)
1050 (unsigned long)phys_base); 1052 (unsigned long)phys_base);
1051 } 1053 }
1052 1054
1053 hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); 1055 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
1054 boot_hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); 1056 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
1057
1055 if (!hyp_pgd || !boot_hyp_pgd) { 1058 if (!hyp_pgd || !boot_hyp_pgd) {
1056 kvm_err("Hyp mode PGD not allocated\n"); 1059 kvm_err("Hyp mode PGD not allocated\n");
1057 err = -ENOMEM; 1060 err = -ENOMEM;
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 8b1b0a870025..a0282928e9c1 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1296,7 +1296,7 @@ static struct resource adc_resources[] = {
1296}; 1296};
1297 1297
1298static struct platform_device at91_adc_device = { 1298static struct platform_device at91_adc_device = {
1299 .name = "at91_adc", 1299 .name = "at91sam9260-adc",
1300 .id = -1, 1300 .id = -1,
1301 .dev = { 1301 .dev = {
1302 .platform_data = &adc_data, 1302 .platform_data = &adc_data,
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 77b04c2edd78..dab362c06487 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1204,7 +1204,7 @@ static struct resource adc_resources[] = {
1204}; 1204};
1205 1205
1206static struct platform_device at91_adc_device = { 1206static struct platform_device at91_adc_device = {
1207 .name = "at91_adc", 1207 .name = "at91sam9g45-adc",
1208 .id = -1, 1208 .id = -1,
1209 .dev = { 1209 .dev = {
1210 .platform_data = &adc_data, 1210 .platform_data = &adc_data,
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index b0e7f9d2c245..2b4d6acfa34a 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -208,8 +208,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
208 * the "output_enable" bit as a gate, even though it's really just 208 * the "output_enable" bit as a gate, even though it's really just
209 * enabling clock output. 209 * enabling clock output.
210 */ 210 */
211 clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10); 211 clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "lvds1_sel", base + 0x160, 10);
212 clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11); 212 clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "lvds2_sel", base + 0x160, 11);
213 213
214 /* name parent_name reg idx */ 214 /* name parent_name reg idx */
215 clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); 215 clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0);
@@ -258,14 +258,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
258 clk[ipu2_sel] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels)); 258 clk[ipu2_sel] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
259 clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); 259 clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
260 clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); 260 clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
261 clk[ipu1_di0_pre_sel] = imx_clk_mux("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); 261 clk[ipu1_di0_pre_sel] = imx_clk_mux_flags("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
262 clk[ipu1_di1_pre_sel] = imx_clk_mux("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); 262 clk[ipu1_di1_pre_sel] = imx_clk_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
263 clk[ipu2_di0_pre_sel] = imx_clk_mux("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); 263 clk[ipu2_di0_pre_sel] = imx_clk_mux_flags("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
264 clk[ipu2_di1_pre_sel] = imx_clk_mux("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); 264 clk[ipu2_di1_pre_sel] = imx_clk_mux_flags("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
265 clk[ipu1_di0_sel] = imx_clk_mux("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels)); 265 clk[ipu1_di0_sel] = imx_clk_mux_flags("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels), CLK_SET_RATE_PARENT);
266 clk[ipu1_di1_sel] = imx_clk_mux("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels)); 266 clk[ipu1_di1_sel] = imx_clk_mux_flags("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels), CLK_SET_RATE_PARENT);
267 clk[ipu2_di0_sel] = imx_clk_mux("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels)); 267 clk[ipu2_di0_sel] = imx_clk_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels), CLK_SET_RATE_PARENT);
268 clk[ipu2_di1_sel] = imx_clk_mux("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels)); 268 clk[ipu2_di1_sel] = imx_clk_mux_flags("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels), CLK_SET_RATE_PARENT);
269 clk[hsi_tx_sel] = imx_clk_mux("hsi_tx_sel", base + 0x30, 28, 1, hsi_tx_sels, ARRAY_SIZE(hsi_tx_sels)); 269 clk[hsi_tx_sel] = imx_clk_mux("hsi_tx_sel", base + 0x30, 28, 1, hsi_tx_sels, ARRAY_SIZE(hsi_tx_sels));
270 clk[pcie_axi_sel] = imx_clk_mux("pcie_axi_sel", base + 0x18, 10, 1, pcie_axi_sels, ARRAY_SIZE(pcie_axi_sels)); 270 clk[pcie_axi_sel] = imx_clk_mux("pcie_axi_sel", base + 0x18, 10, 1, pcie_axi_sels, ARRAY_SIZE(pcie_axi_sels));
271 clk[ssi1_sel] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, ARRAY_SIZE(ssi_sels), imx_cscmr1_fixup); 271 clk[ssi1_sel] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, ARRAY_SIZE(ssi_sels), imx_cscmr1_fixup);
@@ -445,6 +445,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
445 clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); 445 clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
446 } 446 }
447 447
448 clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
449 clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
450 clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
451 clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]);
452 clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]);
453 clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]);
454 clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]);
455 clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]);
456
448 /* 457 /*
449 * The gpmi needs 100MHz frequency in the EDO/Sync mode, 458 * The gpmi needs 100MHz frequency in the EDO/Sync mode,
450 * We can not get the 100MHz from the pll2_pfd0_352m. 459 * We can not get the 100MHz from the pll2_pfd0_352m.
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index 43a90c8d6837..9cfebc5c7455 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -48,7 +48,7 @@ static struct omap_dss_board_info rx51_dss_board_info = {
48 48
49static int __init rx51_video_init(void) 49static int __init rx51_video_init(void)
50{ 50{
51 if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900")) 51 if (!machine_is_nokia_rx51())
52 return 0; 52 return 0;
53 53
54 if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) { 54 if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) {
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 2649ce445845..332af927f4d3 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
209 if (v == OMAP3XXX_EN_DPLL_LPBYPASS || 209 if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
210 v == OMAP3XXX_EN_DPLL_FRBYPASS) 210 v == OMAP3XXX_EN_DPLL_FRBYPASS)
211 return 1; 211 return 1;
212 } else if (soc_is_am33xx() || cpu_is_omap44xx()) { 212 } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
213 if (v == OMAP4XXX_EN_DPLL_LPBYPASS || 213 if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
214 v == OMAP4XXX_EN_DPLL_FRBYPASS || 214 v == OMAP4XXX_EN_DPLL_FRBYPASS ||
215 v == OMAP4XXX_EN_DPLL_MNBYPASS) 215 v == OMAP4XXX_EN_DPLL_MNBYPASS)
@@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
255 if (v == OMAP3XXX_EN_DPLL_LPBYPASS || 255 if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
256 v == OMAP3XXX_EN_DPLL_FRBYPASS) 256 v == OMAP3XXX_EN_DPLL_FRBYPASS)
257 return __clk_get_rate(dd->clk_bypass); 257 return __clk_get_rate(dd->clk_bypass);
258 } else if (soc_is_am33xx() || cpu_is_omap44xx()) { 258 } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
259 if (v == OMAP4XXX_EN_DPLL_LPBYPASS || 259 if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
260 v == OMAP4XXX_EN_DPLL_FRBYPASS || 260 v == OMAP4XXX_EN_DPLL_FRBYPASS ||
261 v == OMAP4XXX_EN_DPLL_MNBYPASS) 261 v == OMAP4XXX_EN_DPLL_MNBYPASS)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index ab43755364f5..9fe8c949305c 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -501,7 +501,7 @@ static int gpmc_cs_delete_mem(int cs)
501 int r; 501 int r;
502 502
503 spin_lock(&gpmc_mem_lock); 503 spin_lock(&gpmc_mem_lock);
504 r = release_resource(&gpmc_cs_mem[cs]); 504 r = release_resource(res);
505 res->start = 0; 505 res->start = 0;
506 res->end = 0; 506 res->end = 0;
507 spin_unlock(&gpmc_mem_lock); 507 spin_unlock(&gpmc_mem_lock);
@@ -527,6 +527,14 @@ static int gpmc_cs_remap(int cs, u32 base)
527 pr_err("%s: requested chip-select is disabled\n", __func__); 527 pr_err("%s: requested chip-select is disabled\n", __func__);
528 return -ENODEV; 528 return -ENODEV;
529 } 529 }
530
531 /*
532 * Make sure we ignore any device offsets from the GPMC partition
533 * allocated for the chip select and that the new base confirms
534 * to the GPMC 16MB minimum granularity.
535 */
536 base &= ~(SZ_16M - 1);
537
530 gpmc_cs_get_memconf(cs, &old_base, &size); 538 gpmc_cs_get_memconf(cs, &old_base, &size);
531 if (base == old_base) 539 if (base == old_base)
532 return 0; 540 return 0;
@@ -586,6 +594,8 @@ EXPORT_SYMBOL(gpmc_cs_request);
586 594
587void gpmc_cs_free(int cs) 595void gpmc_cs_free(int cs)
588{ 596{
597 struct resource *res = &gpmc_cs_mem[cs];
598
589 spin_lock(&gpmc_mem_lock); 599 spin_lock(&gpmc_mem_lock);
590 if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { 600 if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) {
591 printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); 601 printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
@@ -594,7 +604,8 @@ void gpmc_cs_free(int cs)
594 return; 604 return;
595 } 605 }
596 gpmc_cs_disable_mem(cs); 606 gpmc_cs_disable_mem(cs);
597 release_resource(&gpmc_cs_mem[cs]); 607 if (res->flags)
608 release_resource(res);
598 gpmc_cs_set_reserved(cs, 0); 609 gpmc_cs_set_reserved(cs, 0);
599 spin_unlock(&gpmc_mem_lock); 610 spin_unlock(&gpmc_mem_lock);
600} 611}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1f33f5db10d5..66c60fe1104c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
2546 return -EINVAL; 2546 return -EINVAL;
2547 } 2547 }
2548 2548
2549 if (np) 2549 if (np) {
2550 if (of_find_property(np, "ti,no-reset-on-init", NULL)) 2550 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2551 oh->flags |= HWMOD_INIT_NO_RESET; 2551 oh->flags |= HWMOD_INIT_NO_RESET;
2552 if (of_find_property(np, "ti,no-idle-on-init", NULL)) 2552 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2553 oh->flags |= HWMOD_INIT_NO_IDLE; 2553 oh->flags |= HWMOD_INIT_NO_IDLE;
2554 }
2554 2555
2555 oh->_state = _HWMOD_STATE_INITIALIZED; 2556 oh->_state = _HWMOD_STATE_INITIALIZED;
2556 2557
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index a123ff0070bd..71ac7d5f3385 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
1964static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { 1964static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
1965 .name = "usb_host_hs", 1965 .name = "usb_host_hs",
1966 .class = &omap3xxx_usb_host_hs_hwmod_class, 1966 .class = &omap3xxx_usb_host_hs_hwmod_class,
1967 .clkdm_name = "l3_init_clkdm", 1967 .clkdm_name = "usbhost_clkdm",
1968 .mpu_irqs = omap3xxx_usb_host_hs_irqs, 1968 .mpu_irqs = omap3xxx_usb_host_hs_irqs,
1969 .main_clk = "usbhost_48m_fck", 1969 .main_clk = "usbhost_48m_fck",
1970 .prcm = { 1970 .prcm = {
@@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
2047static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { 2047static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
2048 .name = "usb_tll_hs", 2048 .name = "usb_tll_hs",
2049 .class = &omap3xxx_usb_tll_hs_hwmod_class, 2049 .class = &omap3xxx_usb_tll_hs_hwmod_class,
2050 .clkdm_name = "l3_init_clkdm", 2050 .clkdm_name = "core_l4_clkdm",
2051 .mpu_irqs = omap3xxx_usb_tll_hs_irqs, 2051 .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
2052 .main_clk = "usbtll_fck", 2052 .main_clk = "usbtll_fck",
2053 .prcm = { 2053 .prcm = {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 1f3770a8a728..87099bb6de69 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -330,10 +330,6 @@ void omap_sram_idle(void)
330 omap3_sram_restore_context(); 330 omap3_sram_restore_context();
331 omap2_sms_restore_context(); 331 omap2_sms_restore_context();
332 } 332 }
333 if (core_next_state == PWRDM_POWER_OFF)
334 omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
335 OMAP3430_GR_MOD,
336 OMAP3_PRM_VOLTCTRL_OFFSET);
337 } 333 }
338 omap3_intc_resume_idle(); 334 omap3_intc_resume_idle();
339 335
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 8bc02913517c..0e1bb46264f9 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -14,6 +14,7 @@
14 14
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h> 16#include <linux/mfd/asic3.h>
17#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
17 18
18#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO 19#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 20#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index dbfa5a26cfff..072842f6491b 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -152,7 +152,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
152 152
153 node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu"); 153 node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu");
154 if (!node) { 154 if (!node) {
155 pr_err("%s: could not find sram dt node\n", __func__); 155 pr_err("%s: could not find pmu dt node\n", __func__);
156 return; 156 return;
157 } 157 }
158 158
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 4caffc912a81..c12a1c50e9d2 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
21obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o 21obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
22 22
23# Clock objects 23# Clock objects
24ifndef CONFIG_COMMON_CLK
25obj-y += clock.o 24obj-y += clock.o
25ifndef CONFIG_COMMON_CLK
26obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o 26obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
27obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o 27obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
28obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o 28obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 2858f380beae..486063db2a2f 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -992,6 +992,7 @@ static struct asoc_simple_card_info fsi_wm8978_info = {
992 .platform = "sh_fsi2", 992 .platform = "sh_fsi2",
993 .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, 993 .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
994 .cpu_dai = { 994 .cpu_dai = {
995 .fmt = SND_SOC_DAIFMT_IB_NF,
995 .name = "fsia-dai", 996 .name = "fsia-dai",
996 }, 997 },
997 .codec_dai = { 998 .codec_dai = {
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index b4122f8cb8d9..f444be2f241e 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
345 RSND_SSI_UNUSED, /* SSI 0 */ 345 RSND_SSI_UNUSED, /* SSI 0 */
346 RSND_SSI_UNUSED, /* SSI 1 */ 346 RSND_SSI_UNUSED, /* SSI 1 */
347 RSND_SSI_UNUSED, /* SSI 2 */ 347 RSND_SSI_UNUSED, /* SSI 2 */
348 RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY), 348 RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
349 RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE), 349 RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
350 RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY), 350 RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
351 RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0), 351 RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
352 RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY), 352 RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
353 RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE), 353 RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
354}; 354};
355 355
356static struct rsnd_scu_platform_info rsnd_scu[9] = { 356static struct rsnd_src_platform_info rsnd_src[9] = {
357 { .flags = 0, }, /* SRU 0 */ 357 RSND_SRC_UNUSED, /* SRU 0 */
358 { .flags = 0, }, /* SRU 1 */ 358 RSND_SRC_UNUSED, /* SRU 1 */
359 { .flags = 0, }, /* SRU 2 */ 359 RSND_SRC_UNUSED, /* SRU 2 */
360 { .flags = RSND_SCU_USE_HPBIF, }, 360 RSND_SRC(0, 0),
361 { .flags = RSND_SCU_USE_HPBIF, }, 361 RSND_SRC(0, 0),
362 { .flags = RSND_SCU_USE_HPBIF, }, 362 RSND_SRC(0, 0),
363 { .flags = RSND_SCU_USE_HPBIF, }, 363 RSND_SRC(0, 0),
364 { .flags = RSND_SCU_USE_HPBIF, }, 364 RSND_SRC(0, 0),
365 { .flags = RSND_SCU_USE_HPBIF, }, 365 RSND_SRC(0, 0),
366};
367
368static struct rsnd_dai_platform_info rsnd_dai[] = {
369 {
370 .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
371 .capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
372 }, {
373 .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
374 }, {
375 .capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
376 }, {
377 .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
378 }, {
379 .capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
380 },
366}; 381};
367 382
368enum { 383enum {
@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = {
437 .flags = RSND_GEN1, 452 .flags = RSND_GEN1,
438 .ssi_info = rsnd_ssi, 453 .ssi_info = rsnd_ssi,
439 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi), 454 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
440 .scu_info = rsnd_scu, 455 .src_info = rsnd_src,
441 .scu_info_nr = ARRAY_SIZE(rsnd_scu), 456 .src_info_nr = ARRAY_SIZE(rsnd_src),
457 .dai_info = rsnd_dai,
458 .dai_info_nr = ARRAY_SIZE(rsnd_dai),
442 .start = rsnd_start, 459 .start = rsnd_start,
443 .stop = rsnd_stop, 460 .stop = rsnd_stop,
444}; 461};
@@ -591,6 +608,7 @@ static void __init bockw_init(void)
591{ 608{
592 void __iomem *base; 609 void __iomem *base;
593 struct clk *clk; 610 struct clk *clk;
611 struct platform_device *pdev;
594 int i; 612 int i;
595 613
596 r8a7778_clock_init(); 614 r8a7778_clock_init();
@@ -673,9 +691,6 @@ static void __init bockw_init(void)
673 } 691 }
674 692
675 /* for Audio */ 693 /* for Audio */
676 clk = clk_get(NULL, "audio_clk_b");
677 clk_set_rate(clk, 24576000);
678 clk_put(clk);
679 rsnd_codec_power(5, 1); /* enable ak4642 */ 694 rsnd_codec_power(5, 1); /* enable ak4642 */
680 695
681 platform_device_register_simple( 696 platform_device_register_simple(
@@ -684,11 +699,15 @@ static void __init bockw_init(void)
684 platform_device_register_simple( 699 platform_device_register_simple(
685 "ak4554-adc-dac", 1, NULL, 0); 700 "ak4554-adc-dac", 1, NULL, 0);
686 701
687 platform_device_register_resndata( 702 pdev = platform_device_register_resndata(
688 &platform_bus, "rcar_sound", -1, 703 &platform_bus, "rcar_sound", -1,
689 rsnd_resources, ARRAY_SIZE(rsnd_resources), 704 rsnd_resources, ARRAY_SIZE(rsnd_resources),
690 &rsnd_info, sizeof(rsnd_info)); 705 &rsnd_info, sizeof(rsnd_info));
691 706
707 clk = clk_get(&pdev->dev, "clk_b");
708 clk_set_rate(clk, 24576000);
709 clk_put(clk);
710
692 for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) { 711 for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
693 struct platform_device_info cardinfo = { 712 struct platform_device_info cardinfo = {
694 .parent = &platform_bus, 713 .parent = &platform_bus,
diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
index a3fd30242bd8..941f8b394e84 100644
--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
@@ -19,12 +19,11 @@
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */ 20 */
21 21
22#include <linux/clk.h>
23#include <linux/clkdev.h>
24#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
25#include <linux/kernel.h> 23#include <linux/kernel.h>
26#include <linux/of_platform.h> 24#include <linux/of_platform.h>
27#include <linux/platform_data/rcar-du.h> 25#include <linux/platform_data/rcar-du.h>
26#include <mach/clock.h>
28#include <mach/common.h> 27#include <mach/common.h>
29#include <mach/irqs.h> 28#include <mach/irqs.h>
30#include <mach/rcar-gen2.h> 29#include <mach/rcar-gen2.h>
@@ -82,49 +81,50 @@ static void __init koelsch_add_du_device(void)
82 platform_device_register_full(&info); 81 platform_device_register_full(&info);
83} 82}
84 83
85static void __init koelsch_add_standard_devices(void) 84/*
86{ 85 * This is a really crude hack to provide clkdev support to platform
87 /* 86 * devices until they get moved to DT.
88 * This is a really crude hack to provide clkdev support to the CMT and 87 */
89 * DU devices until they get moved to DT. 88static const struct clk_name clk_names[] __initconst = {
90 */ 89 { "cmt0", NULL, "sh_cmt.0" },
91 static const struct clk_name { 90 { "scifa0", NULL, "sh-sci.0" },
92 const char *clk; 91 { "scifa1", NULL, "sh-sci.1" },
93 const char *con_id; 92 { "scifb0", NULL, "sh-sci.2" },
94 const char *dev_id; 93 { "scifb1", NULL, "sh-sci.3" },
95 } clk_names[] = { 94 { "scifb2", NULL, "sh-sci.4" },
96 { "cmt0", NULL, "sh_cmt.0" }, 95 { "scifa2", NULL, "sh-sci.5" },
97 { "scifa0", NULL, "sh-sci.0" }, 96 { "scif0", NULL, "sh-sci.6" },
98 { "scifa1", NULL, "sh-sci.1" }, 97 { "scif1", NULL, "sh-sci.7" },
99 { "scifb0", NULL, "sh-sci.2" }, 98 { "scif2", NULL, "sh-sci.8" },
100 { "scifb1", NULL, "sh-sci.3" }, 99 { "scif3", NULL, "sh-sci.9" },
101 { "scifb2", NULL, "sh-sci.4" }, 100 { "scif4", NULL, "sh-sci.10" },
102 { "scifa2", NULL, "sh-sci.5" }, 101 { "scif5", NULL, "sh-sci.11" },
103 { "scif0", NULL, "sh-sci.6" }, 102 { "scifa3", NULL, "sh-sci.12" },
104 { "scif1", NULL, "sh-sci.7" }, 103 { "scifa4", NULL, "sh-sci.13" },
105 { "scif2", NULL, "sh-sci.8" }, 104 { "scifa5", NULL, "sh-sci.14" },
106 { "scif3", NULL, "sh-sci.9" }, 105 { "du0", "du.0", "rcar-du-r8a7791" },
107 { "scif4", NULL, "sh-sci.10" }, 106 { "du1", "du.1", "rcar-du-r8a7791" },
108 { "scif5", NULL, "sh-sci.11" }, 107 { "lvds0", "lvds.0", "rcar-du-r8a7791" },
109 { "scifa3", NULL, "sh-sci.12" }, 108};
110 { "scifa4", NULL, "sh-sci.13" },
111 { "scifa5", NULL, "sh-sci.14" },
112 { "du0", "du.0", "rcar-du-r8a7791" },
113 { "du1", "du.1", "rcar-du-r8a7791" },
114 { "lvds0", "lvds.0", "rcar-du-r8a7791" },
115 };
116 struct clk *clk;
117 unsigned int i;
118 109
119 for (i = 0; i < ARRAY_SIZE(clk_names); ++i) { 110/*
120 clk = clk_get(NULL, clk_names[i].clk); 111 * This is a really crude hack to work around core platform clock issues
121 if (!IS_ERR(clk)) { 112 */
122 clk_register_clkdev(clk, clk_names[i].con_id, 113static const struct clk_name clk_enables[] __initconst = {
123 clk_names[i].dev_id); 114 { "ether", NULL, "ee700000.ethernet" },
124 clk_put(clk); 115 { "i2c2", NULL, "e6530000.i2c" },
125 } 116 { "msiof0", NULL, "e6e20000.spi" },
126 } 117 { "qspi_mod", NULL, "e6b10000.spi" },
118 { "sdhi0", NULL, "ee100000.sd" },
119 { "sdhi1", NULL, "ee140000.sd" },
120 { "sdhi2", NULL, "ee160000.sd" },
121 { "thermal", NULL, "e61f0000.thermal" },
122};
127 123
124static void __init koelsch_add_standard_devices(void)
125{
126 shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
127 shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
128 r8a7791_add_dt_devices(); 128 r8a7791_add_dt_devices();
129 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 129 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
130 130
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..a12a9d3b4b6e 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = {
216 { 216 {
217 .modalias = "m25p80", 217 .modalias = "m25p80",
218 .platform_data = &spi_flash_data, 218 .platform_data = &spi_flash_data,
219 .mode = SPI_MODE_0, 219 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
220 .max_speed_hz = 30000000, 220 .max_speed_hz = 30000000,
221 .bus_num = 0, 221 .bus_num = 0,
222 .chip_select = 0, 222 .chip_select = 0,
diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
index 440aac36d693..1eb48cffb4c5 100644
--- a/arch/arm/mach-shmobile/board-lager-reference.c
+++ b/arch/arm/mach-shmobile/board-lager-reference.c
@@ -18,12 +18,11 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20 20
21#include <linux/clk.h>
22#include <linux/clkdev.h>
23#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
24#include <linux/init.h> 22#include <linux/init.h>
25#include <linux/of_platform.h> 23#include <linux/of_platform.h>
26#include <linux/platform_data/rcar-du.h> 24#include <linux/platform_data/rcar-du.h>
25#include <mach/clock.h>
27#include <mach/common.h> 26#include <mach/common.h>
28#include <mach/irqs.h> 27#include <mach/irqs.h>
29#include <mach/rcar-gen2.h> 28#include <mach/rcar-gen2.h>
@@ -86,46 +85,46 @@ static void __init lager_add_du_device(void)
86 platform_device_register_full(&info); 85 platform_device_register_full(&info);
87} 86}
88 87
89static void __init lager_add_standard_devices(void) 88/*
90{ 89 * This is a really crude hack to provide clkdev support to platform
91 /* 90 * devices until they get moved to DT.
92 * This is a really crude hack to provide clkdev support to platform 91 */
93 * devices until they get moved to DT. 92static const struct clk_name clk_names[] __initconst = {
94 */ 93 { "cmt0", NULL, "sh_cmt.0" },
95 static const struct clk_name { 94 { "scifa0", NULL, "sh-sci.0" },
96 const char *clk; 95 { "scifa1", NULL, "sh-sci.1" },
97 const char *con_id; 96 { "scifb0", NULL, "sh-sci.2" },
98 const char *dev_id; 97 { "scifb1", NULL, "sh-sci.3" },
99 } clk_names[] = { 98 { "scifb2", NULL, "sh-sci.4" },
100 { "cmt0", NULL, "sh_cmt.0" }, 99 { "scifa2", NULL, "sh-sci.5" },
101 { "scifa0", NULL, "sh-sci.0" }, 100 { "scif0", NULL, "sh-sci.6" },
102 { "scifa1", NULL, "sh-sci.1" }, 101 { "scif1", NULL, "sh-sci.7" },
103 { "scifb0", NULL, "sh-sci.2" }, 102 { "hscif0", NULL, "sh-sci.8" },
104 { "scifb1", NULL, "sh-sci.3" }, 103 { "hscif1", NULL, "sh-sci.9" },
105 { "scifb2", NULL, "sh-sci.4" }, 104 { "du0", "du.0", "rcar-du-r8a7790" },
106 { "scifa2", NULL, "sh-sci.5" }, 105 { "du1", "du.1", "rcar-du-r8a7790" },
107 { "scif0", NULL, "sh-sci.6" }, 106 { "du2", "du.2", "rcar-du-r8a7790" },
108 { "scif1", NULL, "sh-sci.7" }, 107 { "lvds0", "lvds.0", "rcar-du-r8a7790" },
109 { "hscif0", NULL, "sh-sci.8" }, 108 { "lvds1", "lvds.1", "rcar-du-r8a7790" },
110 { "hscif1", NULL, "sh-sci.9" }, 109};
111 { "du0", "du.0", "rcar-du-r8a7790" },
112 { "du1", "du.1", "rcar-du-r8a7790" },
113 { "du2", "du.2", "rcar-du-r8a7790" },
114 { "lvds0", "lvds.0", "rcar-du-r8a7790" },
115 { "lvds1", "lvds.1", "rcar-du-r8a7790" },
116 };
117 struct clk *clk;
118 unsigned int i;
119 110
120 for (i = 0; i < ARRAY_SIZE(clk_names); ++i) { 111/*
121 clk = clk_get(NULL, clk_names[i].clk); 112 * This is a really crude hack to work around core platform clock issues
122 if (!IS_ERR(clk)) { 113 */
123 clk_register_clkdev(clk, clk_names[i].con_id, 114static const struct clk_name clk_enables[] __initconst = {
124 clk_names[i].dev_id); 115 { "ether", NULL, "ee700000.ethernet" },
125 clk_put(clk); 116 { "msiof1", NULL, "e6e10000.spi" },
126 } 117 { "mmcif1", NULL, "ee220000.mmc" },
127 } 118 { "qspi_mod", NULL, "e6b10000.spi" },
119 { "sdhi0", NULL, "ee100000.sd" },
120 { "sdhi2", NULL, "ee140000.sd" },
121 { "thermal", NULL, "e61f0000.thermal" },
122};
128 123
124static void __init lager_add_standard_devices(void)
125{
126 shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
127 shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
129 r8a7790_add_dt_devices(); 128 r8a7790_add_dt_devices();
130 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 129 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
131 130
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index f0104bfe544e..f8b1e05463cc 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
325 325
326static const struct spi_board_info spi_info[] __initconst = { 326static const struct spi_board_info spi_info[] __initconst = {
327 { 327 {
328 .modalias = "m25p80", 328 .modalias = "m25p80",
329 .platform_data = &spi_flash_data, 329 .platform_data = &spi_flash_data,
330 .mode = SPI_MODE_0, 330 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
331 .max_speed_hz = 30000000, 331 .max_speed_hz = 30000000,
332 .bus_num = 0, 332 .bus_num = 0,
333 .chip_select = 0, 333 .chip_select = 0,
334 }, 334 },
335}; 335};
336 336
@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = {
567}; 567};
568 568
569static struct rsnd_ssi_platform_info rsnd_ssi[] = { 569static struct rsnd_ssi_platform_info rsnd_ssi[] = {
570 RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY), 570 RSND_SSI(0, gic_spi(370), 0),
571 RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE), 571 RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
572}; 572};
573 573
574static struct rsnd_scu_platform_info rsnd_scu[2] = { 574static struct rsnd_src_platform_info rsnd_src[2] = {
575 /* no member at this point */ 575 /* no member at this point */
576}; 576};
577 577
578static struct rsnd_dai_platform_info rsnd_dai = {
579 .playback = { .ssi = &rsnd_ssi[0], },
580 .capture = { .ssi = &rsnd_ssi[1], },
581};
582
578static struct rcar_snd_info rsnd_info = { 583static struct rcar_snd_info rsnd_info = {
579 .flags = RSND_GEN2, 584 .flags = RSND_GEN2,
580 .ssi_info = rsnd_ssi, 585 .ssi_info = rsnd_ssi,
581 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi), 586 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
582 .scu_info = rsnd_scu, 587 .src_info = rsnd_src,
583 .scu_info_nr = ARRAY_SIZE(rsnd_scu), 588 .src_info_nr = ARRAY_SIZE(rsnd_src),
589 .dai_info = &rsnd_dai,
590 .dai_info_nr = 1,
584}; 591};
585 592
586static struct asoc_simple_card_info rsnd_card_info = { 593static struct asoc_simple_card_info rsnd_card_info = {
@@ -588,14 +595,12 @@ static struct asoc_simple_card_info rsnd_card_info = {
588 .card = "SSI01-AK4643", 595 .card = "SSI01-AK4643",
589 .codec = "ak4642-codec.2-0012", 596 .codec = "ak4642-codec.2-0012",
590 .platform = "rcar_sound", 597 .platform = "rcar_sound",
591 .daifmt = SND_SOC_DAIFMT_LEFT_J, 598 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
592 .cpu_dai = { 599 .cpu_dai = {
593 .name = "rcar_sound", 600 .name = "rcar_sound",
594 .fmt = SND_SOC_DAIFMT_CBS_CFS,
595 }, 601 },
596 .codec_dai = { 602 .codec_dai = {
597 .name = "ak4642-hifi", 603 .name = "ak4642-hifi",
598 .fmt = SND_SOC_DAIFMT_CBM_CFM,
599 .sysclk = 11289600, 604 .sysclk = 11289600,
600 }, 605 },
601}; 606};
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 2009a9bc6356..6609beb9b9b4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -170,15 +170,11 @@ static struct clk mstp_clks[MSTP_NR] = {
170 [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */ 170 [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
171 [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */ 171 [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
172 [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */ 172 [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
173 [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ 173 [MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0, 7, 0), /* HSPI */
174}; 174};
175 175
176static struct clk_lookup lookups[] = { 176static struct clk_lookup lookups[] = {
177 /* main */ 177 /* main */
178 CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
179 CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
180 CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
181 CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
182 CLKDEV_CON_ID("shyway_clk", &s_clk), 178 CLKDEV_CON_ID("shyway_clk", &s_clk),
183 CLKDEV_CON_ID("peripheral_clk", &p_clk), 179 CLKDEV_CON_ID("peripheral_clk", &p_clk),
184 180
@@ -234,15 +230,15 @@ static struct clk_lookup lookups[] = {
234 CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]), 230 CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
235 CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]), 231 CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
236 CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]), 232 CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
237 CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]), 233 CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
238 CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]), 234 CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
239 CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]), 235 CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
240 CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]), 236 CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
241 CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]), 237 CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
242 CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]), 238 CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
243 CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]), 239 CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
244 CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]), 240 CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
245 CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]), 241 CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
246}; 242};
247 243
248void __init r8a7778_clock_init(void) 244void __init r8a7778_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 3f93503f5b96..a936ae7de083 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = {
249 [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */ 249 [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */
250 [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */ 250 [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */
251 [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */ 251 [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */
252 [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ 252 [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
253 [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ 253 [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
254 [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ 254 [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
255 [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ 255 [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
256 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ 256 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
257 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ 257 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
258 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ 258 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = {
294static struct clk_lookup lookups[] = { 294static struct clk_lookup lookups[] = {
295 295
296 /* main clocks */ 296 /* main clocks */
297 CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
298 CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
299 CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
300 CLKDEV_CON_ID("audio_clk_internal", &m2_clk),
301 CLKDEV_CON_ID("extal", &extal_clk), 297 CLKDEV_CON_ID("extal", &extal_clk),
302 CLKDEV_CON_ID("extal_div2", &extal_div2_clk), 298 CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
303 CLKDEV_CON_ID("main", &main_clk), 299 CLKDEV_CON_ID("main", &main_clk),
@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = {
381 CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b), 377 CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
382 CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c), 378 CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
383 CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk), 379 CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
384 CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP1031]), 380 CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]),
385 CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP1030]), 381 CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]),
386 CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP1029]), 382 CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]),
387 CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP1028]), 383 CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]),
388 CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP1027]), 384 CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]),
389 CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP1026]), 385 CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]),
390 CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP1025]), 386 CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]),
391 CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP1024]), 387 CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]),
392 CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP1023]), 388 CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]),
393 CLKDEV_ICK_ID("scu.9", "rcar_sound", &mstp_clks[MSTP1022]), 389 CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]),
394 CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), 390 CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
395 CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), 391 CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
396 CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), 392 CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 701383fe3267..3b26c7eee873 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -25,6 +25,7 @@
25#include <linux/clkdev.h> 25#include <linux/clkdev.h>
26#include <mach/clock.h> 26#include <mach/clock.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/rcar-gen2.h>
28 29
29/* 30/*
30 * MD EXTAL PLL0 PLL1 PLL3 31 * MD EXTAL PLL0 PLL1 PLL3
@@ -43,8 +44,6 @@
43 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below 44 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below
44 */ 45 */
45 46
46#define MD(nr) (1 << nr)
47
48#define CPG_BASE 0xe6150000 47#define CPG_BASE 0xe6150000
49#define CPG_LEN 0x1000 48#define CPG_LEN 0x1000
50 49
@@ -68,7 +67,6 @@
68#define MSTPSR9 IOMEM(0xe61509a4) 67#define MSTPSR9 IOMEM(0xe61509a4)
69#define MSTPSR11 IOMEM(0xe61509ac) 68#define MSTPSR11 IOMEM(0xe61509ac)
70 69
71#define MODEMR 0xE6160060
72#define SDCKCR 0xE6150074 70#define SDCKCR 0xE6150074
73#define SD1CKCR 0xE6150078 71#define SD1CKCR 0xE6150078
74#define SD2CKCR 0xE615026c 72#define SD2CKCR 0xE615026c
@@ -190,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = {
190 [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */ 188 [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */
191 [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */ 189 [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */
192 [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */ 190 [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */
193 [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ 191 [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
194 [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ 192 [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
195 [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ 193 [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
196 [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ 194 [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
197 [MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */ 195 [MSTP927] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
198 [MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */ 196 [MSTP925] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
199 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ 197 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
200 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ 198 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
201 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ 199 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
295 293
296void __init r8a7791_clock_init(void) 294void __init r8a7791_clock_init(void)
297{ 295{
298 void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); 296 u32 mode = rcar_gen2_read_mode_pins();
299 u32 mode;
300 int k, ret = 0; 297 int k, ret = 0;
301 298
302 BUG_ON(!modemr);
303 mode = ioread32(modemr);
304 iounmap(modemr);
305
306 switch (mode & (MD(14) | MD(13))) { 299 switch (mode & (MD(14) | MD(13))) {
307 case 0: 300 case 0:
308 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); 301 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ad7df629d995..e7232a0373b9 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -21,6 +21,32 @@
21 */ 21 */
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h> 23#include <linux/init.h>
24
25#ifdef CONFIG_COMMON_CLK
26#include <linux/clk.h>
27#include <linux/clkdev.h>
28#include <mach/clock.h>
29
30void __init shmobile_clk_workaround(const struct clk_name *clks,
31 int nr_clks, bool enable)
32{
33 const struct clk_name *clkn;
34 struct clk *clk;
35 unsigned int i;
36
37 for (i = 0; i < nr_clks; ++i) {
38 clkn = clks + i;
39 clk = clk_get(NULL, clkn->clk);
40 if (!IS_ERR(clk)) {
41 clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
42 if (enable)
43 clk_prepare_enable(clk);
44 clk_put(clk);
45 }
46 }
47}
48
49#else /* CONFIG_COMMON_CLK */
24#include <linux/sh_clk.h> 50#include <linux/sh_clk.h>
25#include <linux/export.h> 51#include <linux/export.h>
26#include <mach/clock.h> 52#include <mach/clock.h>
@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk)
58{ 84{
59} 85}
60EXPORT_SYMBOL(__clk_put); 86EXPORT_SYMBOL(__clk_put);
87
88#endif /* CONFIG_COMMON_CLK */
diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
index 03e56074928c..9a93cf924b9c 100644
--- a/arch/arm/mach-shmobile/include/mach/clock.h
+++ b/arch/arm/mach-shmobile/include/mach/clock.h
@@ -1,6 +1,21 @@
1#ifndef CLOCK_H 1#ifndef CLOCK_H
2#define CLOCK_H 2#define CLOCK_H
3 3
4#ifdef CONFIG_COMMON_CLK
5/* temporary clock configuration helper for platform devices */
6
7struct clk_name {
8 const char *clk;
9 const char *con_id;
10 const char *dev_id;
11};
12
13void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
14 bool enable);
15
16#else /* CONFIG_COMMON_CLK */
17/* legacy clock implementation */
18
4unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk); 19unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
5extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops; 20extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
6 21
@@ -36,4 +51,5 @@ do { \
36 (p)->div = d; \ 51 (p)->div = d; \
37} while (0) 52} while (0)
38 53
54#endif /* CONFIG_COMMON_CLK */
39#endif 55#endif
diff --git a/arch/arm/mach-spear/headsmp.S b/arch/arm/mach-spear/headsmp.S
index ed85473a047f..c52192dc3d9f 100644
--- a/arch/arm/mach-spear/headsmp.S
+++ b/arch/arm/mach-spear/headsmp.S
@@ -3,7 +3,7 @@
3 * 3 *
4 * Picked from realview 4 * Picked from realview
5 * Copyright (c) 2012 ST Microelectronics Limited 5 * Copyright (c) 2012 ST Microelectronics Limited
6 * Shiraz Hashim <shiraz.hashim@st.com> 6 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 5c4a19887b2b..c19751fff2c6 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -4,7 +4,7 @@
4 * based upon linux/arch/arm/mach-realview/platsmp.c 4 * based upon linux/arch/arm/mach-realview/platsmp.c
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics Ltd. 6 * Copyright (C) 2012 ST Microelectronics Ltd.
7 * Shiraz Hashim <shiraz.hashim@st.com> 7 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c
index 218ba5b67d92..26fda4ed4d51 100644
--- a/arch/arm/mach-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -2,7 +2,7 @@
2 * arch/arm/plat-spear/time.c 2 * arch/arm/plat-spear/time.c
3 * 3 *
4 * Copyright (C) 2010 ST Microelectronics 4 * Copyright (C) 2010 ST Microelectronics
5 * Shiraz Hashim<shiraz.hashim@st.com> 5 * Shiraz Hashim<shiraz.linux.kernel@gmail.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any 8 * License version 2. This program is licensed "as is" without any
@@ -71,7 +71,7 @@ static void clockevent_set_mode(enum clock_event_mode mode,
71static int clockevent_next_event(unsigned long evt, 71static int clockevent_next_event(unsigned long evt,
72 struct clock_event_device *clk_event_dev); 72 struct clock_event_device *clk_event_dev);
73 73
74static void spear_clocksource_init(void) 74static void __init spear_clocksource_init(void)
75{ 75{
76 u32 tick_rate; 76 u32 tick_rate;
77 u16 val; 77 u16 val;
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 92d660f9610f..55b305d51669 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -70,7 +70,4 @@ config TEGRA_AHB
70 which controls AHB bus master arbitration and some 70 which controls AHB bus master arbitration and some
71 performance parameters(priority, prefech size). 71 performance parameters(priority, prefech size).
72 72
73config TEGRA_EMC_SCALING_ENABLE
74 bool "Enable scaling the memory frequency"
75
76endmenu 73endmenu
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
index 788495d35cf9..30b993399ed7 100644
--- a/arch/arm/mach-vexpress/dcscb.c
+++ b/arch/arm/mach-vexpress/dcscb.c
@@ -51,12 +51,14 @@ static int dcscb_allcpus_mask[2];
51static int dcscb_power_up(unsigned int cpu, unsigned int cluster) 51static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
52{ 52{
53 unsigned int rst_hold, cpumask = (1 << cpu); 53 unsigned int rst_hold, cpumask = (1 << cpu);
54 unsigned int all_mask = dcscb_allcpus_mask[cluster]; 54 unsigned int all_mask;
55 55
56 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); 56 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
57 if (cpu >= 4 || cluster >= 2) 57 if (cpu >= 4 || cluster >= 2)
58 return -EINVAL; 58 return -EINVAL;
59 59
60 all_mask = dcscb_allcpus_mask[cluster];
61
60 /* 62 /*
61 * Since this is called with IRQs enabled, and no arch_spin_lock_irq 63 * Since this is called with IRQs enabled, and no arch_spin_lock_irq
62 * variant exists, we need to disable IRQs manually here. 64 * variant exists, we need to disable IRQs manually here.
@@ -101,11 +103,12 @@ static void dcscb_power_down(void)
101 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); 103 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
102 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 104 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
103 cpumask = (1 << cpu); 105 cpumask = (1 << cpu);
104 all_mask = dcscb_allcpus_mask[cluster];
105 106
106 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); 107 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
107 BUG_ON(cpu >= 4 || cluster >= 2); 108 BUG_ON(cpu >= 4 || cluster >= 2);
108 109
110 all_mask = dcscb_allcpus_mask[cluster];
111
109 __mcpm_cpu_going_down(cpu, cluster); 112 __mcpm_cpu_going_down(cpu, cluster);
110 113
111 arch_spin_lock(&dcscb_lock); 114 arch_spin_lock(&dcscb_lock);
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index c26ef5b92ca7..2c2754e79cb3 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -392,7 +392,7 @@ static irqreturn_t ve_spc_irq_handler(int irq, void *data)
392 * +--------------------------+ 392 * +--------------------------+
393 * | 31 20 | 19 0 | 393 * | 31 20 | 19 0 |
394 * +--------------------------+ 394 * +--------------------------+
395 * | u_volt | freq(kHz) | 395 * | m_volt | freq(kHz) |
396 * +--------------------------+ 396 * +--------------------------+
397 */ 397 */
398#define MULT_FACTOR 20 398#define MULT_FACTOR 20
@@ -414,7 +414,7 @@ static int ve_spc_populate_opps(uint32_t cluster)
414 ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data); 414 ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data);
415 if (!ret) { 415 if (!ret) {
416 opps->freq = (data & FREQ_MASK) * MULT_FACTOR; 416 opps->freq = (data & FREQ_MASK) * MULT_FACTOR;
417 opps->u_volt = data >> VOLT_SHIFT; 417 opps->u_volt = (data >> VOLT_SHIFT) * 1000;
418 } else { 418 } else {
419 break; 419 break;
420 } 420 }
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index f5ad9ee70426..5bf7c3c3b301 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -420,29 +420,29 @@ config CPU_32v3
420 bool 420 bool
421 select CPU_USE_DOMAINS if MMU 421 select CPU_USE_DOMAINS if MMU
422 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 422 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
423 select TLS_REG_EMUL if SMP || !MMU
424 select NEED_KUSER_HELPERS 423 select NEED_KUSER_HELPERS
424 select TLS_REG_EMUL if SMP || !MMU
425 425
426config CPU_32v4 426config CPU_32v4
427 bool 427 bool
428 select CPU_USE_DOMAINS if MMU 428 select CPU_USE_DOMAINS if MMU
429 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 429 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
430 select TLS_REG_EMUL if SMP || !MMU
431 select NEED_KUSER_HELPERS 430 select NEED_KUSER_HELPERS
431 select TLS_REG_EMUL if SMP || !MMU
432 432
433config CPU_32v4T 433config CPU_32v4T
434 bool 434 bool
435 select CPU_USE_DOMAINS if MMU 435 select CPU_USE_DOMAINS if MMU
436 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 436 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
437 select TLS_REG_EMUL if SMP || !MMU
438 select NEED_KUSER_HELPERS 437 select NEED_KUSER_HELPERS
438 select TLS_REG_EMUL if SMP || !MMU
439 439
440config CPU_32v5 440config CPU_32v5
441 bool 441 bool
442 select CPU_USE_DOMAINS if MMU 442 select CPU_USE_DOMAINS if MMU
443 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 443 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
444 select TLS_REG_EMUL if SMP || !MMU
445 select NEED_KUSER_HELPERS 444 select NEED_KUSER_HELPERS
445 select TLS_REG_EMUL if SMP || !MMU
446 446
447config CPU_32v6 447config CPU_32v6
448 bool 448 bool
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index f62aa0677e5c..6b00be1f971e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1963,8 +1963,8 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size)
1963 mapping->nr_bitmaps = 1; 1963 mapping->nr_bitmaps = 1;
1964 mapping->extensions = extensions; 1964 mapping->extensions = extensions;
1965 mapping->base = base; 1965 mapping->base = base;
1966 mapping->size = bitmap_size << PAGE_SHIFT;
1967 mapping->bits = BITS_PER_BYTE * bitmap_size; 1966 mapping->bits = BITS_PER_BYTE * bitmap_size;
1967 mapping->size = mapping->bits << PAGE_SHIFT;
1968 1968
1969 spin_lock_init(&mapping->lock); 1969 spin_lock_init(&mapping->lock);
1970 1970
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c
index 6cac43bd1d86..423f56dd4028 100644
--- a/arch/arm/vfp/vfpdouble.c
+++ b/arch/arm/vfp/vfpdouble.c
@@ -866,6 +866,8 @@ vfp_double_multiply_accumulate(int dd, int dn, int dm, u32 fpscr, u32 negate, ch
866 vdp.sign = vfp_sign_negate(vdp.sign); 866 vdp.sign = vfp_sign_negate(vdp.sign);
867 867
868 vfp_double_unpack(&vdn, vfp_get_double(dd)); 868 vfp_double_unpack(&vdn, vfp_get_double(dd));
869 if (vdn.exponent == 0 && vdn.significand)
870 vfp_double_normalise_denormal(&vdn);
869 if (negate & NEG_SUBTRACT) 871 if (negate & NEG_SUBTRACT)
870 vdn.sign = vfp_sign_negate(vdn.sign); 872 vdn.sign = vfp_sign_negate(vdn.sign);
871 873
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c
index b252631b406b..4f96c1617aae 100644
--- a/arch/arm/vfp/vfpsingle.c
+++ b/arch/arm/vfp/vfpsingle.c
@@ -915,6 +915,8 @@ vfp_single_multiply_accumulate(int sd, int sn, s32 m, u32 fpscr, u32 negate, cha
915 v = vfp_get_float(sd); 915 v = vfp_get_float(sd);
916 pr_debug("VFP: s%u = %08x\n", sd, v); 916 pr_debug("VFP: s%u = %08x\n", sd, v);
917 vfp_single_unpack(&vsn, v); 917 vfp_single_unpack(&vsn, v);
918 if (vsn.exponent == 0 && vsn.significand)
919 vfp_single_normalise_denormal(&vsn);
918 if (negate & NEG_SUBTRACT) 920 if (negate & NEG_SUBTRACT)
919 vsn.sign = vfp_sign_negate(vsn.sign); 921 vsn.sign = vfp_sign_negate(vsn.sign);
920 922
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index e6e4d3749a6e..e759af5d7098 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -323,8 +323,6 @@ menu "CPU Power Management"
323 323
324source "drivers/cpuidle/Kconfig" 324source "drivers/cpuidle/Kconfig"
325 325
326source "kernel/power/Kconfig"
327
328source "drivers/cpufreq/Kconfig" 326source "drivers/cpufreq/Kconfig"
329 327
330endmenu 328endmenu
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index 93f4b2dd9248..f8c40a66e65d 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -307,6 +307,7 @@
307 <0x0 0x1f21e000 0x0 0x1000>, 307 <0x0 0x1f21e000 0x0 0x1000>,
308 <0x0 0x1f217000 0x0 0x1000>; 308 <0x0 0x1f217000 0x0 0x1000>;
309 interrupts = <0x0 0x86 0x4>; 309 interrupts = <0x0 0x86 0x4>;
310 dma-coherent;
310 status = "disabled"; 311 status = "disabled";
311 clocks = <&sata01clk 0>; 312 clocks = <&sata01clk 0>;
312 phys = <&phy1 0>; 313 phys = <&phy1 0>;
@@ -321,6 +322,7 @@
321 <0x0 0x1f22e000 0x0 0x1000>, 322 <0x0 0x1f22e000 0x0 0x1000>,
322 <0x0 0x1f227000 0x0 0x1000>; 323 <0x0 0x1f227000 0x0 0x1000>;
323 interrupts = <0x0 0x87 0x4>; 324 interrupts = <0x0 0x87 0x4>;
325 dma-coherent;
324 status = "ok"; 326 status = "ok";
325 clocks = <&sata23clk 0>; 327 clocks = <&sata23clk 0>;
326 phys = <&phy2 0>; 328 phys = <&phy2 0>;
@@ -334,6 +336,7 @@
334 <0x0 0x1f23d000 0x0 0x1000>, 336 <0x0 0x1f23d000 0x0 0x1000>,
335 <0x0 0x1f23e000 0x0 0x1000>; 337 <0x0 0x1f23e000 0x0 0x1000>;
336 interrupts = <0x0 0x88 0x4>; 338 interrupts = <0x0 0x88 0x4>;
339 dma-coherent;
337 status = "ok"; 340 status = "ok";
338 clocks = <&sata45clk 0>; 341 clocks = <&sata45clk 0>;
339 phys = <&phy3 0>; 342 phys = <&phy3 0>;
diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
index f600d400c07d..aff0292c8f4d 100644
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -22,6 +22,9 @@ typedef struct {
22 void *vdso; 22 void *vdso;
23} mm_context_t; 23} mm_context_t;
24 24
25#define INIT_MM_CONTEXT(name) \
26 .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
27
25#define ASID(mm) ((mm)->context.id & 0xffff) 28#define ASID(mm) ((mm)->context.id & 0xffff)
26 29
27extern void paging_init(void); 30extern void paging_init(void);
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index 72cadf52ca80..80e2c08900d6 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -19,6 +19,7 @@
19#ifndef __ASM_TLB_H 19#ifndef __ASM_TLB_H
20#define __ASM_TLB_H 20#define __ASM_TLB_H
21 21
22#define __tlb_remove_pmd_tlb_entry __tlb_remove_pmd_tlb_entry
22 23
23#include <asm-generic/tlb.h> 24#include <asm-generic/tlb.h>
24 25
@@ -99,5 +100,10 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
99} 100}
100#endif 101#endif
101 102
103static inline void __tlb_remove_pmd_tlb_entry(struct mmu_gather *tlb, pmd_t *pmdp,
104 unsigned long address)
105{
106 tlb_add_flush(tlb, address);
107}
102 108
103#endif 109#endif
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index bb8eb8a78e67..c8d8fc17bd5a 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -403,8 +403,9 @@ __SYSCALL(378, sys_kcmp)
403__SYSCALL(379, sys_finit_module) 403__SYSCALL(379, sys_finit_module)
404__SYSCALL(380, sys_sched_setattr) 404__SYSCALL(380, sys_sched_setattr)
405__SYSCALL(381, sys_sched_getattr) 405__SYSCALL(381, sys_sched_getattr)
406__SYSCALL(382, sys_renameat2)
406 407
407#define __NR_compat_syscalls 379 408#define __NR_compat_syscalls 383
408 409
409/* 410/*
410 * Compat syscall numbers used by the AArch64 kernel. 411 * Compat syscall numbers used by the AArch64 kernel.
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index ed3955a95747..a7fb874b595e 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -318,9 +318,6 @@ static int brk_handler(unsigned long addr, unsigned int esr,
318 if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED) 318 if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
319 return 0; 319 return 0;
320 320
321 pr_warn("unexpected brk exception at %lx, esr=0x%x\n",
322 (long)instruction_pointer(regs), esr);
323
324 if (!user_mode(regs)) 321 if (!user_mode(regs))
325 return -EFAULT; 322 return -EFAULT;
326 323
diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c
index ffbbdde7aba1..2dc36d00addf 100644
--- a/arch/arm64/kernel/early_printk.c
+++ b/arch/arm64/kernel/early_printk.c
@@ -143,10 +143,8 @@ static int __init setup_early_printk(char *buf)
143 } 143 }
144 /* no options parsing yet */ 144 /* no options parsing yet */
145 145
146 if (paddr) { 146 if (paddr)
147 set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr); 147 early_base = (void __iomem *)set_fixmap_offset_io(FIX_EARLYCON_MEM_BASE, paddr);
148 early_base = (void __iomem *)fix_to_virt(FIX_EARLYCON_MEM_BASE);
149 }
150 148
151 printch = match->printch; 149 printch = match->printch;
152 early_console = &early_console_dev; 150 early_console = &early_console_dev;
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 720853f70b6b..7ec784653b29 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -393,11 +393,10 @@ void __init setup_arch(char **cmdline_p)
393 393
394static int __init arm64_device_init(void) 394static int __init arm64_device_init(void)
395{ 395{
396 of_clk_init(NULL);
397 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 396 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
398 return 0; 397 return 0;
399} 398}
400arch_initcall(arm64_device_init); 399arch_initcall_sync(arm64_device_init);
401 400
402static DEFINE_PER_CPU(struct cpu, cpu_data); 401static DEFINE_PER_CPU(struct cpu, cpu_data);
403 402
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c
index 29c39d5d77e3..6815987b50f8 100644
--- a/arch/arm64/kernel/time.c
+++ b/arch/arm64/kernel/time.c
@@ -33,6 +33,7 @@
33#include <linux/irq.h> 33#include <linux/irq.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/clocksource.h> 35#include <linux/clocksource.h>
36#include <linux/clk-provider.h>
36 37
37#include <clocksource/arm_arch_timer.h> 38#include <clocksource/arm_arch_timer.h>
38 39
@@ -65,6 +66,7 @@ void __init time_init(void)
65{ 66{
66 u32 arch_timer_rate; 67 u32 arch_timer_rate;
67 68
69 of_clk_init(NULL);
68 clocksource_of_init(); 70 clocksource_of_init();
69 71
70 arch_timer_rate = arch_timer_get_rate(); 72 arch_timer_rate = arch_timer_get_rate();
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 0ba347e59f06..c851eb44dc50 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -22,8 +22,11 @@
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
24#include <linux/dma-contiguous.h> 24#include <linux/dma-contiguous.h>
25#include <linux/of.h>
26#include <linux/platform_device.h>
25#include <linux/vmalloc.h> 27#include <linux/vmalloc.h>
26#include <linux/swiotlb.h> 28#include <linux/swiotlb.h>
29#include <linux/amba/bus.h>
27 30
28#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
29 32
@@ -305,17 +308,45 @@ struct dma_map_ops coherent_swiotlb_dma_ops = {
305}; 308};
306EXPORT_SYMBOL(coherent_swiotlb_dma_ops); 309EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
307 310
311static int dma_bus_notifier(struct notifier_block *nb,
312 unsigned long event, void *_dev)
313{
314 struct device *dev = _dev;
315
316 if (event != BUS_NOTIFY_ADD_DEVICE)
317 return NOTIFY_DONE;
318
319 if (of_property_read_bool(dev->of_node, "dma-coherent"))
320 set_dma_ops(dev, &coherent_swiotlb_dma_ops);
321
322 return NOTIFY_OK;
323}
324
325static struct notifier_block platform_bus_nb = {
326 .notifier_call = dma_bus_notifier,
327};
328
329static struct notifier_block amba_bus_nb = {
330 .notifier_call = dma_bus_notifier,
331};
332
308extern int swiotlb_late_init_with_default_size(size_t default_size); 333extern int swiotlb_late_init_with_default_size(size_t default_size);
309 334
310static int __init swiotlb_late_init(void) 335static int __init swiotlb_late_init(void)
311{ 336{
312 size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); 337 size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
313 338
314 dma_ops = &coherent_swiotlb_dma_ops; 339 /*
340 * These must be registered before of_platform_populate().
341 */
342 bus_register_notifier(&platform_bus_type, &platform_bus_nb);
343 bus_register_notifier(&amba_bustype, &amba_bus_nb);
344
345 dma_ops = &noncoherent_swiotlb_dma_ops;
315 346
316 return swiotlb_late_init_with_default_size(swiotlb_size); 347 return swiotlb_late_init_with_default_size(swiotlb_size);
317} 348}
318subsys_initcall(swiotlb_late_init); 349arch_initcall(swiotlb_late_init);
319 350
320#define PREALLOC_DMA_DEBUG_ENTRIES 4096 351#define PREALLOC_DMA_DEBUG_ENTRIES 4096
321 352
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 6b7e89569a3a..0a472c41a67f 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -374,6 +374,9 @@ int kern_addr_valid(unsigned long addr)
374 if (pmd_none(*pmd)) 374 if (pmd_none(*pmd))
375 return 0; 375 return 0;
376 376
377 if (pmd_sect(*pmd))
378 return pfn_valid(pmd_pfn(*pmd));
379
377 pte = pte_offset_kernel(pmd, addr); 380 pte = pte_offset_kernel(pmd, addr);
378 if (pte_none(*pte)) 381 if (pte_none(*pte))
379 return 0; 382 return 0;
diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h
deleted file mode 100644
index 4e863daea25b..000000000000
--- a/arch/hexagon/include/asm/barrier.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Memory barrier definitions for the Hexagon architecture
3 *
4 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
19 */
20
21#ifndef _ASM_BARRIER_H
22#define _ASM_BARRIER_H
23
24#define rmb() barrier()
25#define read_barrier_depends() barrier()
26#define wmb() barrier()
27#define mb() barrier()
28#define smp_rmb() barrier()
29#define smp_read_barrier_depends() barrier()
30#define smp_wmb() barrier()
31#define smp_mb() barrier()
32
33/* Set a value and use a memory barrier. Used by the scheduler somewhere. */
34#define set_mb(var, value) \
35 do { var = value; mb(); } while (0)
36
37#endif /* _ASM_BARRIER_H */
diff --git a/arch/ia64/include/asm/tlb.h b/arch/ia64/include/asm/tlb.h
index bc5efc7c3f3f..39d64e0df1de 100644
--- a/arch/ia64/include/asm/tlb.h
+++ b/arch/ia64/include/asm/tlb.h
@@ -91,18 +91,9 @@ extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
91#define RR_RID_MASK 0x00000000ffffff00L 91#define RR_RID_MASK 0x00000000ffffff00L
92#define RR_TO_RID(val) ((val >> 8) & 0xffffff) 92#define RR_TO_RID(val) ((val >> 8) & 0xffffff)
93 93
94/*
95 * Flush the TLB for address range START to END and, if not in fast mode, release the
96 * freed pages that where gathered up to this point.
97 */
98static inline void 94static inline void
99ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) 95ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned long end)
100{ 96{
101 unsigned long i;
102 unsigned int nr;
103
104 if (!tlb->need_flush)
105 return;
106 tlb->need_flush = 0; 97 tlb->need_flush = 0;
107 98
108 if (tlb->fullmm) { 99 if (tlb->fullmm) {
@@ -135,6 +126,14 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e
135 flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end)); 126 flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
136 } 127 }
137 128
129}
130
131static inline void
132ia64_tlb_flush_mmu_free(struct mmu_gather *tlb)
133{
134 unsigned long i;
135 unsigned int nr;
136
138 /* lastly, release the freed pages */ 137 /* lastly, release the freed pages */
139 nr = tlb->nr; 138 nr = tlb->nr;
140 139
@@ -144,6 +143,19 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e
144 free_page_and_swap_cache(tlb->pages[i]); 143 free_page_and_swap_cache(tlb->pages[i]);
145} 144}
146 145
146/*
147 * Flush the TLB for address range START to END and, if not in fast mode, release the
148 * freed pages that where gathered up to this point.
149 */
150static inline void
151ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
152{
153 if (!tlb->need_flush)
154 return;
155 ia64_tlb_flush_mmu_tlbonly(tlb, start, end);
156 ia64_tlb_flush_mmu_free(tlb);
157}
158
147static inline void __tlb_alloc_page(struct mmu_gather *tlb) 159static inline void __tlb_alloc_page(struct mmu_gather *tlb)
148{ 160{
149 unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0); 161 unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0);
@@ -206,6 +218,16 @@ static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
206 return tlb->max - tlb->nr; 218 return tlb->max - tlb->nr;
207} 219}
208 220
221static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
222{
223 ia64_tlb_flush_mmu_tlbonly(tlb, tlb->start_addr, tlb->end_addr);
224}
225
226static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
227{
228 ia64_tlb_flush_mmu_free(tlb);
229}
230
209static inline void tlb_flush_mmu(struct mmu_gather *tlb) 231static inline void tlb_flush_mmu(struct mmu_gather *tlb)
210{ 232{
211 ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr); 233 ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S
index e6f80fcf013b..a4acddad0c78 100644
--- a/arch/ia64/kernel/head.S
+++ b/arch/ia64/kernel/head.S
@@ -259,7 +259,7 @@ start_ap:
259 * Switch into virtual mode: 259 * Switch into virtual mode:
260 */ 260 */
261 movl r16=(IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN \ 261 movl r16=(IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN \
262 |IA64_PSR_DI|IA64_PSR_AC) 262 |IA64_PSR_DI)
263 ;; 263 ;;
264 mov cr.ipsr=r16 264 mov cr.ipsr=r16
265 movl r17=1f 265 movl r17=1f
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
index 689ffcaa284e..18e794a57248 100644
--- a/arch/ia64/kernel/ivt.S
+++ b/arch/ia64/kernel/ivt.S
@@ -58,7 +58,7 @@
58#include <asm/unistd.h> 58#include <asm/unistd.h>
59#include <asm/errno.h> 59#include <asm/errno.h>
60 60
61#if 1 61#if 0
62# define PSR_DEFAULT_BITS psr.ac 62# define PSR_DEFAULT_BITS psr.ac
63#else 63#else
64# define PSR_DEFAULT_BITS 0 64# define PSR_DEFAULT_BITS 0
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S
index 24018484c6e9..397e34a63e18 100644
--- a/arch/ia64/kvm/vmm_ivt.S
+++ b/arch/ia64/kvm/vmm_ivt.S
@@ -64,7 +64,7 @@
64#include "kvm_minstate.h" 64#include "kvm_minstate.h"
65#include "vti.h" 65#include "vti.h"
66 66
67#if 1 67#if 0
68# define PSR_DEFAULT_BITS psr.ac 68# define PSR_DEFAULT_BITS psr.ac
69#else 69#else
70# define PSR_DEFAULT_BITS 0 70# define PSR_DEFAULT_BITS 0
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index c2bb4f896ce7..3aa5b46b2d40 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -635,7 +635,7 @@ static void octeon_irq_cpu_offline_ciu(struct irq_data *data)
635 cpumask_clear(&new_affinity); 635 cpumask_clear(&new_affinity);
636 cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); 636 cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity);
637 } 637 }
638 __irq_set_affinity_locked(data, &new_affinity); 638 irq_set_affinity_locked(data, &new_affinity, false);
639} 639}
640 640
641static int octeon_irq_ciu_set_affinity(struct irq_data *data, 641static int octeon_irq_ciu_set_affinity(struct irq_data *data,
diff --git a/arch/mips/include/asm/mach-jz4740/dma.h b/arch/mips/include/asm/mach-jz4740/dma.h
index 509cd5828044..14ecc5313d2d 100644
--- a/arch/mips/include/asm/mach-jz4740/dma.h
+++ b/arch/mips/include/asm/mach-jz4740/dma.h
@@ -22,8 +22,6 @@ enum jz4740_dma_request_type {
22 JZ4740_DMA_TYPE_UART_RECEIVE = 21, 22 JZ4740_DMA_TYPE_UART_RECEIVE = 21,
23 JZ4740_DMA_TYPE_SPI_TRANSMIT = 22, 23 JZ4740_DMA_TYPE_SPI_TRANSMIT = 22,
24 JZ4740_DMA_TYPE_SPI_RECEIVE = 23, 24 JZ4740_DMA_TYPE_SPI_RECEIVE = 23,
25 JZ4740_DMA_TYPE_AIC_TRANSMIT = 24,
26 JZ4740_DMA_TYPE_AIC_RECEIVE = 25,
27 JZ4740_DMA_TYPE_MMC_TRANSMIT = 26, 25 JZ4740_DMA_TYPE_MMC_TRANSMIT = 26,
28 JZ4740_DMA_TYPE_MMC_RECEIVE = 27, 26 JZ4740_DMA_TYPE_MMC_RECEIVE = 27,
29 JZ4740_DMA_TYPE_TCU = 28, 27 JZ4740_DMA_TYPE_TCU = 28,
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index c01900e5d078..088e92a79ae6 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -425,6 +425,15 @@ static struct platform_device qi_lb60_audio_device = {
425 .id = -1, 425 .id = -1,
426}; 426};
427 427
428static struct gpiod_lookup_table qi_lb60_audio_gpio_table = {
429 .dev_id = "qi-lb60-audio",
430 .table = {
431 GPIO_LOOKUP("Bank B", 29, "snd", 0),
432 GPIO_LOOKUP("Bank D", 4, "amp", 0),
433 { },
434 },
435};
436
428static struct platform_device *jz_platform_devices[] __initdata = { 437static struct platform_device *jz_platform_devices[] __initdata = {
429 &jz4740_udc_device, 438 &jz4740_udc_device,
430 &jz4740_udc_xceiv_device, 439 &jz4740_udc_xceiv_device,
@@ -461,6 +470,8 @@ static int __init qi_lb60_init_platform_devices(void)
461 jz4740_adc_device.dev.platform_data = &qi_lb60_battery_pdata; 470 jz4740_adc_device.dev.platform_data = &qi_lb60_battery_pdata;
462 jz4740_mmc_device.dev.platform_data = &qi_lb60_mmc_pdata; 471 jz4740_mmc_device.dev.platform_data = &qi_lb60_mmc_pdata;
463 472
473 gpiod_add_lookup_table(&qi_lb60_audio_gpio_table);
474
464 jz4740_serial_device_register(); 475 jz4740_serial_device_register();
465 476
466 spi_register_board_info(qi_lb60_spi_board_info, 477 spi_register_board_info(qi_lb60_spi_board_info,
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index e422b38d3113..9e67cdea3c74 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -29,15 +29,15 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, 29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
30 unsigned long pfn); 30 unsigned long pfn);
31void (*flush_icache_range)(unsigned long start, unsigned long end); 31void (*flush_icache_range)(unsigned long start, unsigned long end);
32EXPORT_SYMBOL_GPL(flush_icache_range);
32void (*local_flush_icache_range)(unsigned long start, unsigned long end); 33void (*local_flush_icache_range)(unsigned long start, unsigned long end);
33 34
34void (*__flush_cache_vmap)(void); 35void (*__flush_cache_vmap)(void);
35void (*__flush_cache_vunmap)(void); 36void (*__flush_cache_vunmap)(void);
36 37
37void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size); 38void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
38void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
39
40EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range); 39EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
40void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
41 41
42/* MIPS specific cache operations */ 42/* MIPS specific cache operations */
43void (*flush_cache_sigtramp)(unsigned long addr); 43void (*flush_cache_sigtramp)(unsigned long addr);
diff --git a/arch/parisc/include/asm/shmparam.h b/arch/parisc/include/asm/shmparam.h
index 628ddc22faa8..afe1300ab667 100644
--- a/arch/parisc/include/asm/shmparam.h
+++ b/arch/parisc/include/asm/shmparam.h
@@ -1,8 +1,7 @@
1#ifndef _ASMPARISC_SHMPARAM_H 1#ifndef _ASMPARISC_SHMPARAM_H
2#define _ASMPARISC_SHMPARAM_H 2#define _ASMPARISC_SHMPARAM_H
3 3
4#define __ARCH_FORCE_SHMLBA 1 4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5 5#define SHM_COLOUR 0x00400000 /* shared mappings colouring */
6#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
7 6
8#endif /* _ASMPARISC_SHMPARAM_H */ 7#endif /* _ASMPARISC_SHMPARAM_H */
diff --git a/arch/parisc/include/uapi/asm/Kbuild b/arch/parisc/include/uapi/asm/Kbuild
index a580642555b6..348356c99514 100644
--- a/arch/parisc/include/uapi/asm/Kbuild
+++ b/arch/parisc/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4generic-y += resource.h
5
4header-y += bitsperlong.h 6header-y += bitsperlong.h
5header-y += byteorder.h 7header-y += byteorder.h
6header-y += errno.h 8header-y += errno.h
@@ -13,7 +15,6 @@ header-y += msgbuf.h
13header-y += pdc.h 15header-y += pdc.h
14header-y += posix_types.h 16header-y += posix_types.h
15header-y += ptrace.h 17header-y += ptrace.h
16header-y += resource.h
17header-y += sembuf.h 18header-y += sembuf.h
18header-y += setup.h 19header-y += setup.h
19header-y += shmbuf.h 20header-y += shmbuf.h
diff --git a/arch/parisc/include/uapi/asm/resource.h b/arch/parisc/include/uapi/asm/resource.h
deleted file mode 100644
index 8b06343b62ed..000000000000
--- a/arch/parisc/include/uapi/asm/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_PARISC_RESOURCE_H
2#define _ASM_PARISC_RESOURCE_H
3
4#define _STK_LIM_MAX 10 * _STK_LIM
5#include <asm-generic/resource.h>
6
7#endif
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index a6ffc775a9f8..f6448c7c62b5 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -323,7 +323,8 @@ void flush_dcache_page(struct page *page)
323 * specifically accesses it, of course) */ 323 * specifically accesses it, of course) */
324 324
325 flush_tlb_page(mpnt, addr); 325 flush_tlb_page(mpnt, addr);
326 if (old_addr == 0 || (old_addr & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) { 326 if (old_addr == 0 || (old_addr & (SHM_COLOUR - 1))
327 != (addr & (SHM_COLOUR - 1))) {
327 __flush_cache_page(mpnt, addr, page_to_phys(page)); 328 __flush_cache_page(mpnt, addr, page_to_phys(page));
328 if (old_addr) 329 if (old_addr)
329 printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %s\n", old_addr, addr, mpnt->vm_file ? (char *)mpnt->vm_file->f_path.dentry->d_name.name : "(null)"); 330 printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %s\n", old_addr, addr, mpnt->vm_file ? (char *)mpnt->vm_file->f_path.dentry->d_name.name : "(null)");
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index b7cadc4a06cd..31ffa9b55322 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -45,7 +45,7 @@
45 45
46static int get_offset(unsigned int last_mmap) 46static int get_offset(unsigned int last_mmap)
47{ 47{
48 return (last_mmap & (SHMLBA-1)) >> PAGE_SHIFT; 48 return (last_mmap & (SHM_COLOUR-1)) >> PAGE_SHIFT;
49} 49}
50 50
51static unsigned long shared_align_offset(unsigned int last_mmap, 51static unsigned long shared_align_offset(unsigned int last_mmap,
@@ -57,8 +57,8 @@ static unsigned long shared_align_offset(unsigned int last_mmap,
57static inline unsigned long COLOR_ALIGN(unsigned long addr, 57static inline unsigned long COLOR_ALIGN(unsigned long addr,
58 unsigned int last_mmap, unsigned long pgoff) 58 unsigned int last_mmap, unsigned long pgoff)
59{ 59{
60 unsigned long base = (addr+SHMLBA-1) & ~(SHMLBA-1); 60 unsigned long base = (addr+SHM_COLOUR-1) & ~(SHM_COLOUR-1);
61 unsigned long off = (SHMLBA-1) & 61 unsigned long off = (SHM_COLOUR-1) &
62 (shared_align_offset(last_mmap, pgoff) << PAGE_SHIFT); 62 (shared_align_offset(last_mmap, pgoff) << PAGE_SHIFT);
63 63
64 return base + off; 64 return base + off;
@@ -101,7 +101,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
101 if (flags & MAP_FIXED) { 101 if (flags & MAP_FIXED) {
102 if ((flags & MAP_SHARED) && last_mmap && 102 if ((flags & MAP_SHARED) && last_mmap &&
103 (addr - shared_align_offset(last_mmap, pgoff)) 103 (addr - shared_align_offset(last_mmap, pgoff))
104 & (SHMLBA - 1)) 104 & (SHM_COLOUR - 1))
105 return -EINVAL; 105 return -EINVAL;
106 goto found_addr; 106 goto found_addr;
107 } 107 }
@@ -122,7 +122,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
122 info.length = len; 122 info.length = len;
123 info.low_limit = mm->mmap_legacy_base; 123 info.low_limit = mm->mmap_legacy_base;
124 info.high_limit = mmap_upper_limit(); 124 info.high_limit = mmap_upper_limit();
125 info.align_mask = last_mmap ? (PAGE_MASK & (SHMLBA - 1)) : 0; 125 info.align_mask = last_mmap ? (PAGE_MASK & (SHM_COLOUR - 1)) : 0;
126 info.align_offset = shared_align_offset(last_mmap, pgoff); 126 info.align_offset = shared_align_offset(last_mmap, pgoff);
127 addr = vm_unmapped_area(&info); 127 addr = vm_unmapped_area(&info);
128 128
@@ -161,7 +161,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
161 if (flags & MAP_FIXED) { 161 if (flags & MAP_FIXED) {
162 if ((flags & MAP_SHARED) && last_mmap && 162 if ((flags & MAP_SHARED) && last_mmap &&
163 (addr - shared_align_offset(last_mmap, pgoff)) 163 (addr - shared_align_offset(last_mmap, pgoff))
164 & (SHMLBA - 1)) 164 & (SHM_COLOUR - 1))
165 return -EINVAL; 165 return -EINVAL;
166 goto found_addr; 166 goto found_addr;
167 } 167 }
@@ -182,7 +182,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
182 info.length = len; 182 info.length = len;
183 info.low_limit = PAGE_SIZE; 183 info.low_limit = PAGE_SIZE;
184 info.high_limit = mm->mmap_base; 184 info.high_limit = mm->mmap_base;
185 info.align_mask = last_mmap ? (PAGE_MASK & (SHMLBA - 1)) : 0; 185 info.align_mask = last_mmap ? (PAGE_MASK & (SHM_COLOUR - 1)) : 0;
186 info.align_offset = shared_align_offset(last_mmap, pgoff); 186 info.align_offset = shared_align_offset(last_mmap, pgoff);
187 addr = vm_unmapped_area(&info); 187 addr = vm_unmapped_area(&info);
188 if (!(addr & ~PAGE_MASK)) 188 if (!(addr & ~PAGE_MASK))
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 80e5dd248934..83ead0ea127d 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -392,7 +392,7 @@
392 ENTRY_COMP(vmsplice) 392 ENTRY_COMP(vmsplice)
393 ENTRY_COMP(move_pages) /* 295 */ 393 ENTRY_COMP(move_pages) /* 295 */
394 ENTRY_SAME(getcpu) 394 ENTRY_SAME(getcpu)
395 ENTRY_SAME(epoll_pwait) 395 ENTRY_COMP(epoll_pwait)
396 ENTRY_COMP(statfs64) 396 ENTRY_COMP(statfs64)
397 ENTRY_COMP(fstatfs64) 397 ENTRY_COMP(fstatfs64)
398 ENTRY_COMP(kexec_load) /* 300 */ 398 ENTRY_COMP(kexec_load) /* 300 */
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index 413dc1769299..b2b441b32341 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -470,7 +470,7 @@ static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
470 return 0; 470 return 0;
471 471
472 /* if a load or store fault occured we can get the faulty addr */ 472 /* if a load or store fault occured we can get the faulty addr */
473 d = &__get_cpu_var(exception_data); 473 d = this_cpu_ptr(&exception_data);
474 fault_addr = d->fault_addr; 474 fault_addr = d->fault_addr;
475 475
476 /* error in load or store? */ 476 /* error in load or store? */
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index 9d08c71a967e..747550762f3c 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -151,7 +151,7 @@ int fixup_exception(struct pt_regs *regs)
151 fix = search_exception_tables(regs->iaoq[0]); 151 fix = search_exception_tables(regs->iaoq[0]);
152 if (fix) { 152 if (fix) {
153 struct exception_data *d; 153 struct exception_data *d;
154 d = &__get_cpu_var(exception_data); 154 d = this_cpu_ptr(&exception_data);
155 d->fault_ip = regs->iaoq[0]; 155 d->fault_ip = regs->iaoq[0];
156 d->fault_space = regs->isr; 156 d->fault_space = regs->isr;
157 d->fault_addr = regs->ior; 157 d->fault_addr = regs->ior;
diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c
index a28f02165e97..d367a0aece2a 100644
--- a/arch/powerpc/boot/main.c
+++ b/arch/powerpc/boot/main.c
@@ -139,18 +139,18 @@ static struct addr_range prep_initrd(struct addr_range vmlinux, void *chosen,
139 * edit the command line passed to vmlinux (by setting /chosen/bootargs). 139 * edit the command line passed to vmlinux (by setting /chosen/bootargs).
140 * The buffer is put in it's own section so that tools may locate it easier. 140 * The buffer is put in it's own section so that tools may locate it easier.
141 */ 141 */
142static char cmdline[COMMAND_LINE_SIZE] 142static char cmdline[BOOT_COMMAND_LINE_SIZE]
143 __attribute__((__section__("__builtin_cmdline"))); 143 __attribute__((__section__("__builtin_cmdline")));
144 144
145static void prep_cmdline(void *chosen) 145static void prep_cmdline(void *chosen)
146{ 146{
147 if (cmdline[0] == '\0') 147 if (cmdline[0] == '\0')
148 getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); 148 getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1);
149 149
150 printf("\n\rLinux/PowerPC load: %s", cmdline); 150 printf("\n\rLinux/PowerPC load: %s", cmdline);
151 /* If possible, edit the command line */ 151 /* If possible, edit the command line */
152 if (console_ops.edit_cmdline) 152 if (console_ops.edit_cmdline)
153 console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE); 153 console_ops.edit_cmdline(cmdline, BOOT_COMMAND_LINE_SIZE);
154 printf("\n\r"); 154 printf("\n\r");
155 155
156 /* Put the command line back into the devtree for the kernel */ 156 /* Put the command line back into the devtree for the kernel */
@@ -174,7 +174,7 @@ void start(void)
174 * built-in command line wasn't set by an external tool */ 174 * built-in command line wasn't set by an external tool */
175 if ((loader_info.cmdline_len > 0) && (cmdline[0] == '\0')) 175 if ((loader_info.cmdline_len > 0) && (cmdline[0] == '\0'))
176 memmove(cmdline, loader_info.cmdline, 176 memmove(cmdline, loader_info.cmdline,
177 min(loader_info.cmdline_len, COMMAND_LINE_SIZE-1)); 177 min(loader_info.cmdline_len, BOOT_COMMAND_LINE_SIZE-1));
178 178
179 if (console_ops.open && (console_ops.open() < 0)) 179 if (console_ops.open && (console_ops.open() < 0))
180 exit(); 180 exit();
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index b3218ce451bb..8aad3c55aeda 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -15,7 +15,7 @@
15#include "types.h" 15#include "types.h"
16#include "string.h" 16#include "string.h"
17 17
18#define COMMAND_LINE_SIZE 512 18#define BOOT_COMMAND_LINE_SIZE 2048
19#define MAX_PATH_LEN 256 19#define MAX_PATH_LEN 256
20#define MAX_PROP_LEN 256 /* What should this be? */ 20#define MAX_PROP_LEN 256 /* What should this be? */
21 21
diff --git a/arch/powerpc/boot/ps3.c b/arch/powerpc/boot/ps3.c
index 9954d98871d0..4ec2d86d3c50 100644
--- a/arch/powerpc/boot/ps3.c
+++ b/arch/powerpc/boot/ps3.c
@@ -47,13 +47,13 @@ BSS_STACK(4096);
47 * The buffer is put in it's own section so that tools may locate it easier. 47 * The buffer is put in it's own section so that tools may locate it easier.
48 */ 48 */
49 49
50static char cmdline[COMMAND_LINE_SIZE] 50static char cmdline[BOOT_COMMAND_LINE_SIZE]
51 __attribute__((__section__("__builtin_cmdline"))); 51 __attribute__((__section__("__builtin_cmdline")));
52 52
53static void prep_cmdline(void *chosen) 53static void prep_cmdline(void *chosen)
54{ 54{
55 if (cmdline[0] == '\0') 55 if (cmdline[0] == '\0')
56 getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); 56 getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1);
57 else 57 else
58 setprop_str(chosen, "bootargs", cmdline); 58 setprop_str(chosen, "bootargs", cmdline);
59 59
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index a2efdaa020b0..66ad7a74116f 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -41,14 +41,14 @@ struct opal_takeover_args {
41 * size except the last one in the list to be as well. 41 * size except the last one in the list to be as well.
42 */ 42 */
43struct opal_sg_entry { 43struct opal_sg_entry {
44 void *data; 44 __be64 data;
45 long length; 45 __be64 length;
46}; 46};
47 47
48/* sg list */ 48/* SG list */
49struct opal_sg_list { 49struct opal_sg_list {
50 unsigned long num_entries; 50 __be64 length;
51 struct opal_sg_list *next; 51 __be64 next;
52 struct opal_sg_entry entry[]; 52 struct opal_sg_entry entry[];
53}; 53};
54 54
@@ -858,8 +858,8 @@ int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
858int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type, 858int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
859 uint32_t addr, __be32 *data, uint32_t sz); 859 uint32_t addr, __be32 *data, uint32_t sz);
860 860
861int64_t opal_read_elog(uint64_t buffer, size_t size, uint64_t log_id); 861int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
862int64_t opal_get_elog_size(uint64_t *log_id, size_t *size, uint64_t *elog_type); 862int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
863int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset); 863int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
864int64_t opal_send_ack_elog(uint64_t log_id); 864int64_t opal_send_ack_elog(uint64_t log_id);
865void opal_resend_pending_logs(void); 865void opal_resend_pending_logs(void);
@@ -868,23 +868,24 @@ int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
868int64_t opal_manage_flash(uint8_t op); 868int64_t opal_manage_flash(uint8_t op);
869int64_t opal_update_flash(uint64_t blk_list); 869int64_t opal_update_flash(uint64_t blk_list);
870int64_t opal_dump_init(uint8_t dump_type); 870int64_t opal_dump_init(uint8_t dump_type);
871int64_t opal_dump_info(uint32_t *dump_id, uint32_t *dump_size); 871int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
872int64_t opal_dump_info2(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type); 872int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
873int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer); 873int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
874int64_t opal_dump_ack(uint32_t dump_id); 874int64_t opal_dump_ack(uint32_t dump_id);
875int64_t opal_dump_resend_notification(void); 875int64_t opal_dump_resend_notification(void);
876 876
877int64_t opal_get_msg(uint64_t buffer, size_t size); 877int64_t opal_get_msg(uint64_t buffer, uint64_t size);
878int64_t opal_check_completion(uint64_t buffer, size_t size, uint64_t token); 878int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
879int64_t opal_sync_host_reboot(void); 879int64_t opal_sync_host_reboot(void);
880int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer, 880int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
881 size_t length); 881 uint64_t length);
882int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer, 882int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
883 size_t length); 883 uint64_t length);
884int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data); 884int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
885 885
886/* Internal functions */ 886/* Internal functions */
887extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data); 887extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
888 int depth, void *data);
888extern int early_init_dt_scan_recoverable_ranges(unsigned long node, 889extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
889 const char *uname, int depth, void *data); 890 const char *uname, int depth, void *data);
890 891
@@ -893,10 +894,6 @@ extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
893 894
894extern void hvc_opal_init_early(void); 895extern void hvc_opal_init_early(void);
895 896
896/* Internal functions */
897extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
898 int depth, void *data);
899
900extern int opal_notifier_register(struct notifier_block *nb); 897extern int opal_notifier_register(struct notifier_block *nb);
901extern int opal_notifier_unregister(struct notifier_block *nb); 898extern int opal_notifier_unregister(struct notifier_block *nb);
902 899
@@ -906,9 +903,6 @@ extern void opal_notifier_enable(void);
906extern void opal_notifier_disable(void); 903extern void opal_notifier_disable(void);
907extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val); 904extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
908 905
909extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
910extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
911
912extern int __opal_async_get_token(void); 906extern int __opal_async_get_token(void);
913extern int opal_async_get_token_interruptible(void); 907extern int opal_async_get_token_interruptible(void);
914extern int __opal_async_release_token(int token); 908extern int __opal_async_release_token(int token);
@@ -916,8 +910,6 @@ extern int opal_async_release_token(int token);
916extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg); 910extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
917extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data); 911extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
918 912
919extern void hvc_opal_init_early(void);
920
921struct rtc_time; 913struct rtc_time;
922extern int opal_set_rtc_time(struct rtc_time *tm); 914extern int opal_set_rtc_time(struct rtc_time *tm);
923extern void opal_get_rtc_time(struct rtc_time *tm); 915extern void opal_get_rtc_time(struct rtc_time *tm);
@@ -937,6 +929,10 @@ extern int opal_resync_timebase(void);
937 929
938extern void opal_lpc_init(void); 930extern void opal_lpc_init(void);
939 931
932struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
933 unsigned long vmalloc_size);
934void opal_free_sg_list(struct opal_sg_list *sg);
935
940#endif /* __ASSEMBLY__ */ 936#endif /* __ASSEMBLY__ */
941 937
942#endif /* __OPAL_H */ 938#endif /* __OPAL_H */
diff --git a/arch/powerpc/include/uapi/asm/setup.h b/arch/powerpc/include/uapi/asm/setup.h
index 552df83f1a49..ae3fb68cb28e 100644
--- a/arch/powerpc/include/uapi/asm/setup.h
+++ b/arch/powerpc/include/uapi/asm/setup.h
@@ -1 +1,6 @@
1#include <asm-generic/setup.h> 1#ifndef _UAPI_ASM_POWERPC_SETUP_H
2#define _UAPI_ASM_POWERPC_SETUP_H
3
4#define COMMAND_LINE_SIZE 2048
5
6#endif /* _UAPI_ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 2a4779091a58..155013da27e0 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -208,7 +208,7 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
208 unsigned long in_devfn) 208 unsigned long in_devfn)
209{ 209{
210 struct pci_controller* hose; 210 struct pci_controller* hose;
211 struct pci_bus *bus = NULL; 211 struct pci_bus *tmp_bus, *bus = NULL;
212 struct device_node *hose_node; 212 struct device_node *hose_node;
213 213
214 /* Argh ! Please forgive me for that hack, but that's the 214 /* Argh ! Please forgive me for that hack, but that's the
@@ -229,10 +229,12 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
229 * used on pre-domains setup. We return the first match 229 * used on pre-domains setup. We return the first match
230 */ 230 */
231 231
232 list_for_each_entry(bus, &pci_root_buses, node) { 232 list_for_each_entry(tmp_bus, &pci_root_buses, node) {
233 if (in_bus >= bus->number && in_bus <= bus->busn_res.end) 233 if (in_bus >= tmp_bus->number &&
234 in_bus <= tmp_bus->busn_res.end) {
235 bus = tmp_bus;
234 break; 236 break;
235 bus = NULL; 237 }
236 } 238 }
237 if (bus == NULL || bus->dev.of_node == NULL) 239 if (bus == NULL || bus->dev.of_node == NULL)
238 return -ENODEV; 240 return -ENODEV;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 3bd77edd7610..450850a49dce 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -120,6 +120,7 @@ EXPORT_SYMBOL(giveup_spe);
120EXPORT_SYMBOL(flush_instruction_cache); 120EXPORT_SYMBOL(flush_instruction_cache);
121#endif 121#endif
122EXPORT_SYMBOL(flush_dcache_range); 122EXPORT_SYMBOL(flush_dcache_range);
123EXPORT_SYMBOL(flush_icache_range);
123 124
124#ifdef CONFIG_SMP 125#ifdef CONFIG_SMP
125#ifdef CONFIG_PPC32 126#ifdef CONFIG_PPC32
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 2f3cdb01506d..658e89d2025b 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -705,7 +705,7 @@ static int __init rtas_flash_init(void)
705 if (rtas_token("ibm,update-flash-64-and-reboot") == 705 if (rtas_token("ibm,update-flash-64-and-reboot") ==
706 RTAS_UNKNOWN_SERVICE) { 706 RTAS_UNKNOWN_SERVICE) {
707 pr_info("rtas_flash: no firmware flash support\n"); 707 pr_info("rtas_flash: no firmware flash support\n");
708 return 1; 708 return -EINVAL;
709 } 709 }
710 710
711 rtas_validate_flash_data.buf = kzalloc(VALIDATE_BUF_SIZE, GFP_KERNEL); 711 rtas_validate_flash_data.buf = kzalloc(VALIDATE_BUF_SIZE, GFP_KERNEL);
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index ffbb871c2bd8..b031f932c0cc 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -242,6 +242,12 @@ kvm_novcpu_exit:
242 */ 242 */
243 .globl kvm_start_guest 243 .globl kvm_start_guest
244kvm_start_guest: 244kvm_start_guest:
245
246 /* Set runlatch bit the minute you wake up from nap */
247 mfspr r1, SPRN_CTRLF
248 ori r1, r1, 1
249 mtspr SPRN_CTRLT, r1
250
245 ld r2,PACATOC(r13) 251 ld r2,PACATOC(r13)
246 252
247 li r0,KVM_HWTHREAD_IN_KVM 253 li r0,KVM_HWTHREAD_IN_KVM
@@ -309,6 +315,11 @@ kvm_no_guest:
309 li r0, KVM_HWTHREAD_IN_NAP 315 li r0, KVM_HWTHREAD_IN_NAP
310 stb r0, HSTATE_HWTHREAD_STATE(r13) 316 stb r0, HSTATE_HWTHREAD_STATE(r13)
311kvm_do_nap: 317kvm_do_nap:
318 /* Clear the runlatch bit before napping */
319 mfspr r2, SPRN_CTRLF
320 clrrdi r2, r2, 1
321 mtspr SPRN_CTRLT, r2
322
312 li r3, LPCR_PECE0 323 li r3, LPCR_PECE0
313 mfspr r4, SPRN_LPCR 324 mfspr r4, SPRN_LPCR
314 rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1 325 rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
@@ -1999,8 +2010,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
1999 2010
2000 /* 2011 /*
2001 * Take a nap until a decrementer or external or doobell interrupt 2012 * Take a nap until a decrementer or external or doobell interrupt
2002 * occurs, with PECE1, PECE0 and PECEDP set in LPCR 2013 * occurs, with PECE1, PECE0 and PECEDP set in LPCR. Also clear the
2014 * runlatch bit before napping.
2003 */ 2015 */
2016 mfspr r2, SPRN_CTRLF
2017 clrrdi r2, r2, 1
2018 mtspr SPRN_CTRLT, r2
2019
2004 li r0,1 2020 li r0,1
2005 stb r0,HSTATE_HWTHREAD_REQ(r13) 2021 stb r0,HSTATE_HWTHREAD_REQ(r13)
2006 mfspr r5,SPRN_LPCR 2022 mfspr r5,SPRN_LPCR
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 3ea26c25590b..cf1d325eae8b 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
82 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); 82 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
83 va |= penc << 12; 83 va |= penc << 12;
84 va |= ssize << 8; 84 va |= ssize << 8;
85 /* Add AVAL part */ 85 /*
86 if (psize != apsize) { 86 * AVAL bits:
87 /* 87 * We don't need all the bits, but rest of the bits
88 * MPSS, 64K base page size and 16MB parge page size 88 * must be ignored by the processor.
89 * We don't need all the bits, but rest of the bits 89 * vpn cover upto 65 bits of va. (0...65) and we need
90 * must be ignored by the processor. 90 * 58..64 bits of va.
91 * vpn cover upto 65 bits of va. (0...65) and we need 91 */
92 * 58..64 bits of va. 92 va |= (vpn & 0xfe); /* AVAL */
93 */
94 va |= (vpn & 0xfe);
95 }
96 va |= 1; /* L */ 93 va |= 1; /* L */
97 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) 94 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
98 : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) 95 : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
133 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); 130 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
134 va |= penc << 12; 131 va |= penc << 12;
135 va |= ssize << 8; 132 va |= ssize << 8;
136 /* Add AVAL part */ 133 /*
137 if (psize != apsize) { 134 * AVAL bits:
138 /* 135 * We don't need all the bits, but rest of the bits
139 * MPSS, 64K base page size and 16MB parge page size 136 * must be ignored by the processor.
140 * We don't need all the bits, but rest of the bits 137 * vpn cover upto 65 bits of va. (0...65) and we need
141 * must be ignored by the processor. 138 * 58..64 bits of va.
142 * vpn cover upto 65 bits of va. (0...65) and we need 139 */
143 * 58..64 bits of va. 140 va |= (vpn & 0xfe);
144 */
145 va |= (vpn & 0xfe);
146 }
147 va |= 1; /* L */ 141 va |= 1; /* L */
148 asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" 142 asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
149 : : "r"(va) : "memory"); 143 : : "r"(va) : "memory");
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 4ebbb9e99286..3b181b22cd46 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -232,6 +232,7 @@ int __node_distance(int a, int b)
232 232
233 return distance; 233 return distance;
234} 234}
235EXPORT_SYMBOL(__node_distance);
235 236
236static void initialize_distance_lookup_table(int nid, 237static void initialize_distance_lookup_table(int nid,
237 const __be32 *associativity) 238 const __be32 *associativity)
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index 297c91051413..e0766b82e165 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -155,16 +155,28 @@ static ssize_t read_offset_data(void *dest, size_t dest_len,
155 return copy_len; 155 return copy_len;
156} 156}
157 157
158static unsigned long h_get_24x7_catalog_page(char page[static 4096], 158static unsigned long h_get_24x7_catalog_page_(unsigned long phys_4096,
159 u32 version, u32 index) 159 unsigned long version,
160 unsigned long index)
160{ 161{
161 WARN_ON(!IS_ALIGNED((unsigned long)page, 4096)); 162 pr_devel("h_get_24x7_catalog_page(0x%lx, %lu, %lu)",
163 phys_4096,
164 version,
165 index);
166 WARN_ON(!IS_ALIGNED(phys_4096, 4096));
162 return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE, 167 return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE,
163 virt_to_phys(page), 168 phys_4096,
164 version, 169 version,
165 index); 170 index);
166} 171}
167 172
173static unsigned long h_get_24x7_catalog_page(char page[],
174 u64 version, u32 index)
175{
176 return h_get_24x7_catalog_page_(virt_to_phys(page),
177 version, index);
178}
179
168static ssize_t catalog_read(struct file *filp, struct kobject *kobj, 180static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
169 struct bin_attribute *bin_attr, char *buf, 181 struct bin_attribute *bin_attr, char *buf,
170 loff_t offset, size_t count) 182 loff_t offset, size_t count)
@@ -173,7 +185,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
173 ssize_t ret = 0; 185 ssize_t ret = 0;
174 size_t catalog_len = 0, catalog_page_len = 0, page_count = 0; 186 size_t catalog_len = 0, catalog_page_len = 0, page_count = 0;
175 loff_t page_offset = 0; 187 loff_t page_offset = 0;
176 uint32_t catalog_version_num = 0; 188 uint64_t catalog_version_num = 0;
177 void *page = kmem_cache_alloc(hv_page_cache, GFP_USER); 189 void *page = kmem_cache_alloc(hv_page_cache, GFP_USER);
178 struct hv_24x7_catalog_page_0 *page_0 = page; 190 struct hv_24x7_catalog_page_0 *page_0 = page;
179 if (!page) 191 if (!page)
@@ -185,7 +197,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
185 goto e_free; 197 goto e_free;
186 } 198 }
187 199
188 catalog_version_num = be32_to_cpu(page_0->version); 200 catalog_version_num = be64_to_cpu(page_0->version);
189 catalog_page_len = be32_to_cpu(page_0->length); 201 catalog_page_len = be32_to_cpu(page_0->length);
190 catalog_len = catalog_page_len * 4096; 202 catalog_len = catalog_page_len * 4096;
191 203
@@ -208,8 +220,9 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
208 page, 4096, page_offset * 4096); 220 page, 4096, page_offset * 4096);
209e_free: 221e_free:
210 if (hret) 222 if (hret)
211 pr_err("h_get_24x7_catalog_page(ver=%d, page=%lld) failed: rc=%ld\n", 223 pr_err("h_get_24x7_catalog_page(ver=%lld, page=%lld) failed:"
212 catalog_version_num, page_offset, hret); 224 " rc=%ld\n",
225 catalog_version_num, page_offset, hret);
213 kfree(page); 226 kfree(page);
214 227
215 pr_devel("catalog_read: offset=%lld(%lld) count=%zu(%zu) catalog_len=%zu(%zu) => %zd\n", 228 pr_devel("catalog_read: offset=%lld(%lld) count=%zu(%zu) catalog_len=%zu(%zu) => %zd\n",
@@ -243,7 +256,7 @@ e_free: \
243static DEVICE_ATTR_RO(_name) 256static DEVICE_ATTR_RO(_name)
244 257
245PAGE_0_ATTR(catalog_version, "%lld\n", 258PAGE_0_ATTR(catalog_version, "%lld\n",
246 (unsigned long long)be32_to_cpu(page_0->version)); 259 (unsigned long long)be64_to_cpu(page_0->version));
247PAGE_0_ATTR(catalog_len, "%lld\n", 260PAGE_0_ATTR(catalog_len, "%lld\n",
248 (unsigned long long)be32_to_cpu(page_0->length) * 4096); 261 (unsigned long long)be32_to_cpu(page_0->length) * 4096);
249static BIN_ATTR_RO(catalog, 0/* real length varies */); 262static BIN_ATTR_RO(catalog, 0/* real length varies */);
@@ -485,13 +498,13 @@ static int hv_24x7_init(void)
485 struct hv_perf_caps caps; 498 struct hv_perf_caps caps;
486 499
487 if (!firmware_has_feature(FW_FEATURE_LPAR)) { 500 if (!firmware_has_feature(FW_FEATURE_LPAR)) {
488 pr_info("not a virtualized system, not enabling\n"); 501 pr_debug("not a virtualized system, not enabling\n");
489 return -ENODEV; 502 return -ENODEV;
490 } 503 }
491 504
492 hret = hv_perf_caps_get(&caps); 505 hret = hv_perf_caps_get(&caps);
493 if (hret) { 506 if (hret) {
494 pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n", 507 pr_debug("could not obtain capabilities, not enabling, rc=%ld\n",
495 hret); 508 hret);
496 return -ENODEV; 509 return -ENODEV;
497 } 510 }
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 278ba7b9c2b5..c9d399a2df82 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -78,7 +78,7 @@ static ssize_t kernel_version_show(struct device *dev,
78 return sprintf(page, "0x%x\n", COUNTER_INFO_VERSION_CURRENT); 78 return sprintf(page, "0x%x\n", COUNTER_INFO_VERSION_CURRENT);
79} 79}
80 80
81DEVICE_ATTR_RO(kernel_version); 81static DEVICE_ATTR_RO(kernel_version);
82HV_CAPS_ATTR(version, "0x%x\n"); 82HV_CAPS_ATTR(version, "0x%x\n");
83HV_CAPS_ATTR(ga, "%d\n"); 83HV_CAPS_ATTR(ga, "%d\n");
84HV_CAPS_ATTR(expanded, "%d\n"); 84HV_CAPS_ATTR(expanded, "%d\n");
@@ -273,13 +273,13 @@ static int hv_gpci_init(void)
273 struct hv_perf_caps caps; 273 struct hv_perf_caps caps;
274 274
275 if (!firmware_has_feature(FW_FEATURE_LPAR)) { 275 if (!firmware_has_feature(FW_FEATURE_LPAR)) {
276 pr_info("not a virtualized system, not enabling\n"); 276 pr_debug("not a virtualized system, not enabling\n");
277 return -ENODEV; 277 return -ENODEV;
278 } 278 }
279 279
280 hret = hv_perf_caps_get(&caps); 280 hret = hv_perf_caps_get(&caps);
281 if (hret) { 281 if (hret) {
282 pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n", 282 pr_debug("could not obtain capabilities, not enabling, rc=%ld\n",
283 hret); 283 hret);
284 return -ENODEV; 284 return -ENODEV;
285 } 285 }
diff --git a/arch/powerpc/platforms/powernv/opal-dump.c b/arch/powerpc/platforms/powernv/opal-dump.c
index b9827b0d87e4..788a1977b9a5 100644
--- a/arch/powerpc/platforms/powernv/opal-dump.c
+++ b/arch/powerpc/platforms/powernv/opal-dump.c
@@ -209,89 +209,20 @@ static struct kobj_type dump_ktype = {
209 .default_attrs = dump_default_attrs, 209 .default_attrs = dump_default_attrs,
210}; 210};
211 211
212static void free_dump_sg_list(struct opal_sg_list *list) 212static int64_t dump_read_info(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type)
213{
214 struct opal_sg_list *sg1;
215 while (list) {
216 sg1 = list->next;
217 kfree(list);
218 list = sg1;
219 }
220 list = NULL;
221}
222
223static struct opal_sg_list *dump_data_to_sglist(struct dump_obj *dump)
224{
225 struct opal_sg_list *sg1, *list = NULL;
226 void *addr;
227 int64_t size;
228
229 addr = dump->buffer;
230 size = dump->size;
231
232 sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL);
233 if (!sg1)
234 goto nomem;
235
236 list = sg1;
237 sg1->num_entries = 0;
238 while (size > 0) {
239 /* Translate virtual address to physical address */
240 sg1->entry[sg1->num_entries].data =
241 (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT);
242
243 if (size > PAGE_SIZE)
244 sg1->entry[sg1->num_entries].length = PAGE_SIZE;
245 else
246 sg1->entry[sg1->num_entries].length = size;
247
248 sg1->num_entries++;
249 if (sg1->num_entries >= SG_ENTRIES_PER_NODE) {
250 sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL);
251 if (!sg1->next)
252 goto nomem;
253
254 sg1 = sg1->next;
255 sg1->num_entries = 0;
256 }
257 addr += PAGE_SIZE;
258 size -= PAGE_SIZE;
259 }
260 return list;
261
262nomem:
263 pr_err("%s : Failed to allocate memory\n", __func__);
264 free_dump_sg_list(list);
265 return NULL;
266}
267
268static void sglist_to_phy_addr(struct opal_sg_list *list)
269{
270 struct opal_sg_list *sg, *next;
271
272 for (sg = list; sg; sg = next) {
273 next = sg->next;
274 /* Don't translate NULL pointer for last entry */
275 if (sg->next)
276 sg->next = (struct opal_sg_list *)__pa(sg->next);
277 else
278 sg->next = NULL;
279
280 /* Convert num_entries to length */
281 sg->num_entries =
282 sg->num_entries * sizeof(struct opal_sg_entry) + 16;
283 }
284}
285
286static int64_t dump_read_info(uint32_t *id, uint32_t *size, uint32_t *type)
287{ 213{
214 __be32 id, size, type;
288 int rc; 215 int rc;
289 *type = 0xffffffff;
290 216
291 rc = opal_dump_info2(id, size, type); 217 type = cpu_to_be32(0xffffffff);
292 218
219 rc = opal_dump_info2(&id, &size, &type);
293 if (rc == OPAL_PARAMETER) 220 if (rc == OPAL_PARAMETER)
294 rc = opal_dump_info(id, size); 221 rc = opal_dump_info(&id, &size);
222
223 *dump_id = be32_to_cpu(id);
224 *dump_size = be32_to_cpu(size);
225 *dump_type = be32_to_cpu(type);
295 226
296 if (rc) 227 if (rc)
297 pr_warn("%s: Failed to get dump info (%d)\n", 228 pr_warn("%s: Failed to get dump info (%d)\n",
@@ -314,15 +245,12 @@ static int64_t dump_read_data(struct dump_obj *dump)
314 } 245 }
315 246
316 /* Generate SG list */ 247 /* Generate SG list */
317 list = dump_data_to_sglist(dump); 248 list = opal_vmalloc_to_sg_list(dump->buffer, dump->size);
318 if (!list) { 249 if (!list) {
319 rc = -ENOMEM; 250 rc = -ENOMEM;
320 goto out; 251 goto out;
321 } 252 }
322 253
323 /* Translate sg list addr to real address */
324 sglist_to_phy_addr(list);
325
326 /* First entry address */ 254 /* First entry address */
327 addr = __pa(list); 255 addr = __pa(list);
328 256
@@ -341,7 +269,7 @@ static int64_t dump_read_data(struct dump_obj *dump)
341 __func__, dump->id); 269 __func__, dump->id);
342 270
343 /* Free SG list */ 271 /* Free SG list */
344 free_dump_sg_list(list); 272 opal_free_sg_list(list);
345 273
346out: 274out:
347 return rc; 275 return rc;
diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c
index ef7bc2a97862..10268c41d830 100644
--- a/arch/powerpc/platforms/powernv/opal-elog.c
+++ b/arch/powerpc/platforms/powernv/opal-elog.c
@@ -238,18 +238,25 @@ static struct elog_obj *create_elog_obj(uint64_t id, size_t size, uint64_t type)
238 238
239static void elog_work_fn(struct work_struct *work) 239static void elog_work_fn(struct work_struct *work)
240{ 240{
241 size_t elog_size; 241 __be64 size;
242 __be64 id;
243 __be64 type;
244 uint64_t elog_size;
242 uint64_t log_id; 245 uint64_t log_id;
243 uint64_t elog_type; 246 uint64_t elog_type;
244 int rc; 247 int rc;
245 char name[2+16+1]; 248 char name[2+16+1];
246 249
247 rc = opal_get_elog_size(&log_id, &elog_size, &elog_type); 250 rc = opal_get_elog_size(&id, &size, &type);
248 if (rc != OPAL_SUCCESS) { 251 if (rc != OPAL_SUCCESS) {
249 pr_err("ELOG: Opal log read failed\n"); 252 pr_err("ELOG: Opal log read failed\n");
250 return; 253 return;
251 } 254 }
252 255
256 elog_size = be64_to_cpu(size);
257 log_id = be64_to_cpu(id);
258 elog_type = be64_to_cpu(type);
259
253 BUG_ON(elog_size > OPAL_MAX_ERRLOG_SIZE); 260 BUG_ON(elog_size > OPAL_MAX_ERRLOG_SIZE);
254 261
255 if (elog_size >= OPAL_MAX_ERRLOG_SIZE) 262 if (elog_size >= OPAL_MAX_ERRLOG_SIZE)
diff --git a/arch/powerpc/platforms/powernv/opal-flash.c b/arch/powerpc/platforms/powernv/opal-flash.c
index 714ef972406b..dc487ff04704 100644
--- a/arch/powerpc/platforms/powernv/opal-flash.c
+++ b/arch/powerpc/platforms/powernv/opal-flash.c
@@ -79,9 +79,6 @@
79/* XXX: Assume candidate image size is <= 1GB */ 79/* XXX: Assume candidate image size is <= 1GB */
80#define MAX_IMAGE_SIZE 0x40000000 80#define MAX_IMAGE_SIZE 0x40000000
81 81
82/* Flash sg list version */
83#define SG_LIST_VERSION (1UL)
84
85/* Image status */ 82/* Image status */
86enum { 83enum {
87 IMAGE_INVALID, 84 IMAGE_INVALID,
@@ -131,11 +128,15 @@ static DEFINE_MUTEX(image_data_mutex);
131 */ 128 */
132static inline void opal_flash_validate(void) 129static inline void opal_flash_validate(void)
133{ 130{
134 struct validate_flash_t *args_buf = &validate_flash_data; 131 long ret;
132 void *buf = validate_flash_data.buf;
133 __be32 size, result;
135 134
136 args_buf->status = opal_validate_flash(__pa(args_buf->buf), 135 ret = opal_validate_flash(__pa(buf), &size, &result);
137 &(args_buf->buf_size), 136
138 &(args_buf->result)); 137 validate_flash_data.status = ret;
138 validate_flash_data.buf_size = be32_to_cpu(size);
139 validate_flash_data.result = be32_to_cpu(result);
139} 140}
140 141
141/* 142/*
@@ -268,93 +269,11 @@ static ssize_t manage_store(struct kobject *kobj,
268} 269}
269 270
270/* 271/*
271 * Free sg list
272 */
273static void free_sg_list(struct opal_sg_list *list)
274{
275 struct opal_sg_list *sg1;
276 while (list) {
277 sg1 = list->next;
278 kfree(list);
279 list = sg1;
280 }
281 list = NULL;
282}
283
284/*
285 * Build candidate image scatter gather list
286 *
287 * list format:
288 * -----------------------------------
289 * | VER (8) | Entry length in bytes |
290 * -----------------------------------
291 * | Pointer to next entry |
292 * -----------------------------------
293 * | Address of memory area 1 |
294 * -----------------------------------
295 * | Length of memory area 1 |
296 * -----------------------------------
297 * | ......... |
298 * -----------------------------------
299 * | ......... |
300 * -----------------------------------
301 * | Address of memory area N |
302 * -----------------------------------
303 * | Length of memory area N |
304 * -----------------------------------
305 */
306static struct opal_sg_list *image_data_to_sglist(void)
307{
308 struct opal_sg_list *sg1, *list = NULL;
309 void *addr;
310 int size;
311
312 addr = image_data.data;
313 size = image_data.size;
314
315 sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL);
316 if (!sg1)
317 return NULL;
318
319 list = sg1;
320 sg1->num_entries = 0;
321 while (size > 0) {
322 /* Translate virtual address to physical address */
323 sg1->entry[sg1->num_entries].data =
324 (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT);
325
326 if (size > PAGE_SIZE)
327 sg1->entry[sg1->num_entries].length = PAGE_SIZE;
328 else
329 sg1->entry[sg1->num_entries].length = size;
330
331 sg1->num_entries++;
332 if (sg1->num_entries >= SG_ENTRIES_PER_NODE) {
333 sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL);
334 if (!sg1->next) {
335 pr_err("%s : Failed to allocate memory\n",
336 __func__);
337 goto nomem;
338 }
339
340 sg1 = sg1->next;
341 sg1->num_entries = 0;
342 }
343 addr += PAGE_SIZE;
344 size -= PAGE_SIZE;
345 }
346 return list;
347nomem:
348 free_sg_list(list);
349 return NULL;
350}
351
352/*
353 * OPAL update flash 272 * OPAL update flash
354 */ 273 */
355static int opal_flash_update(int op) 274static int opal_flash_update(int op)
356{ 275{
357 struct opal_sg_list *sg, *list, *next; 276 struct opal_sg_list *list;
358 unsigned long addr; 277 unsigned long addr;
359 int64_t rc = OPAL_PARAMETER; 278 int64_t rc = OPAL_PARAMETER;
360 279
@@ -364,30 +283,13 @@ static int opal_flash_update(int op)
364 goto flash; 283 goto flash;
365 } 284 }
366 285
367 list = image_data_to_sglist(); 286 list = opal_vmalloc_to_sg_list(image_data.data, image_data.size);
368 if (!list) 287 if (!list)
369 goto invalid_img; 288 goto invalid_img;
370 289
371 /* First entry address */ 290 /* First entry address */
372 addr = __pa(list); 291 addr = __pa(list);
373 292
374 /* Translate sg list address to absolute */
375 for (sg = list; sg; sg = next) {
376 next = sg->next;
377 /* Don't translate NULL pointer for last entry */
378 if (sg->next)
379 sg->next = (struct opal_sg_list *)__pa(sg->next);
380 else
381 sg->next = NULL;
382
383 /*
384 * Convert num_entries to version/length format
385 * to satisfy OPAL.
386 */
387 sg->num_entries = (SG_LIST_VERSION << 56) |
388 (sg->num_entries * sizeof(struct opal_sg_entry) + 16);
389 }
390
391 pr_alert("FLASH: Image is %u bytes\n", image_data.size); 293 pr_alert("FLASH: Image is %u bytes\n", image_data.size);
392 pr_alert("FLASH: Image update requested\n"); 294 pr_alert("FLASH: Image update requested\n");
393 pr_alert("FLASH: Image will be updated during system reboot\n"); 295 pr_alert("FLASH: Image will be updated during system reboot\n");
diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c b/arch/powerpc/platforms/powernv/opal-sysparam.c
index 6b614726baf2..d202f9bc3683 100644
--- a/arch/powerpc/platforms/powernv/opal-sysparam.c
+++ b/arch/powerpc/platforms/powernv/opal-sysparam.c
@@ -39,10 +39,11 @@ struct param_attr {
39 struct kobj_attribute kobj_attr; 39 struct kobj_attribute kobj_attr;
40}; 40};
41 41
42static int opal_get_sys_param(u32 param_id, u32 length, void *buffer) 42static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer)
43{ 43{
44 struct opal_msg msg; 44 struct opal_msg msg;
45 int ret, token; 45 ssize_t ret;
46 int token;
46 47
47 token = opal_async_get_token_interruptible(); 48 token = opal_async_get_token_interruptible();
48 if (token < 0) { 49 if (token < 0) {
@@ -59,7 +60,7 @@ static int opal_get_sys_param(u32 param_id, u32 length, void *buffer)
59 60
60 ret = opal_async_wait_response(token, &msg); 61 ret = opal_async_wait_response(token, &msg);
61 if (ret) { 62 if (ret) {
62 pr_err("%s: Failed to wait for the async response, %d\n", 63 pr_err("%s: Failed to wait for the async response, %zd\n",
63 __func__, ret); 64 __func__, ret);
64 goto out_token; 65 goto out_token;
65 } 66 }
@@ -111,7 +112,7 @@ static ssize_t sys_param_show(struct kobject *kobj,
111{ 112{
112 struct param_attr *attr = container_of(kobj_attr, struct param_attr, 113 struct param_attr *attr = container_of(kobj_attr, struct param_attr,
113 kobj_attr); 114 kobj_attr);
114 int ret; 115 ssize_t ret;
115 116
116 mutex_lock(&opal_sysparam_mutex); 117 mutex_lock(&opal_sysparam_mutex);
117 ret = opal_get_sys_param(attr->param_id, attr->param_size, 118 ret = opal_get_sys_param(attr->param_id, attr->param_size,
@@ -121,9 +122,10 @@ static ssize_t sys_param_show(struct kobject *kobj,
121 122
122 memcpy(buf, param_data_buf, attr->param_size); 123 memcpy(buf, param_data_buf, attr->param_size);
123 124
125 ret = attr->param_size;
124out: 126out:
125 mutex_unlock(&opal_sysparam_mutex); 127 mutex_unlock(&opal_sysparam_mutex);
126 return ret ? ret : attr->param_size; 128 return ret;
127} 129}
128 130
129static ssize_t sys_param_store(struct kobject *kobj, 131static ssize_t sys_param_store(struct kobject *kobj,
@@ -131,14 +133,20 @@ static ssize_t sys_param_store(struct kobject *kobj,
131{ 133{
132 struct param_attr *attr = container_of(kobj_attr, struct param_attr, 134 struct param_attr *attr = container_of(kobj_attr, struct param_attr,
133 kobj_attr); 135 kobj_attr);
134 int ret; 136 ssize_t ret;
137
138 /* MAX_PARAM_DATA_LEN is sizeof(param_data_buf) */
139 if (count > MAX_PARAM_DATA_LEN)
140 count = MAX_PARAM_DATA_LEN;
135 141
136 mutex_lock(&opal_sysparam_mutex); 142 mutex_lock(&opal_sysparam_mutex);
137 memcpy(param_data_buf, buf, count); 143 memcpy(param_data_buf, buf, count);
138 ret = opal_set_sys_param(attr->param_id, attr->param_size, 144 ret = opal_set_sys_param(attr->param_id, attr->param_size,
139 param_data_buf); 145 param_data_buf);
140 mutex_unlock(&opal_sysparam_mutex); 146 mutex_unlock(&opal_sysparam_mutex);
141 return ret ? ret : count; 147 if (!ret)
148 ret = count;
149 return ret;
142} 150}
143 151
144void __init opal_sys_param_init(void) 152void __init opal_sys_param_init(void)
@@ -214,13 +222,13 @@ void __init opal_sys_param_init(void)
214 } 222 }
215 223
216 if (of_property_read_u32_array(sysparam, "param-len", size, count)) { 224 if (of_property_read_u32_array(sysparam, "param-len", size, count)) {
217 pr_err("SYSPARAM: Missing propery param-len in the DT\n"); 225 pr_err("SYSPARAM: Missing property param-len in the DT\n");
218 goto out_free_perm; 226 goto out_free_perm;
219 } 227 }
220 228
221 229
222 if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) { 230 if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) {
223 pr_err("SYSPARAM: Missing propery param-perm in the DT\n"); 231 pr_err("SYSPARAM: Missing property param-perm in the DT\n");
224 goto out_free_perm; 232 goto out_free_perm;
225 } 233 }
226 234
@@ -233,6 +241,12 @@ void __init opal_sys_param_init(void)
233 241
234 /* For each of the parameters, populate the parameter attributes */ 242 /* For each of the parameters, populate the parameter attributes */
235 for (i = 0; i < count; i++) { 243 for (i = 0; i < count; i++) {
244 if (size[i] > MAX_PARAM_DATA_LEN) {
245 pr_warn("SYSPARAM: Not creating parameter %d as size "
246 "exceeds buffer length\n", i);
247 continue;
248 }
249
236 sysfs_attr_init(&attr[i].kobj_attr.attr); 250 sysfs_attr_init(&attr[i].kobj_attr.attr);
237 attr[i].param_id = id[i]; 251 attr[i].param_id = id[i];
238 attr[i].param_size = size[i]; 252 attr[i].param_size = size[i];
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 49d2f00019e5..360ad80c754c 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -242,14 +242,14 @@ void opal_notifier_update_evt(uint64_t evt_mask,
242void opal_notifier_enable(void) 242void opal_notifier_enable(void)
243{ 243{
244 int64_t rc; 244 int64_t rc;
245 uint64_t evt = 0; 245 __be64 evt = 0;
246 246
247 atomic_set(&opal_notifier_hold, 0); 247 atomic_set(&opal_notifier_hold, 0);
248 248
249 /* Process pending events */ 249 /* Process pending events */
250 rc = opal_poll_events(&evt); 250 rc = opal_poll_events(&evt);
251 if (rc == OPAL_SUCCESS && evt) 251 if (rc == OPAL_SUCCESS && evt)
252 opal_do_notifier(evt); 252 opal_do_notifier(be64_to_cpu(evt));
253} 253}
254 254
255void opal_notifier_disable(void) 255void opal_notifier_disable(void)
@@ -529,7 +529,7 @@ static irqreturn_t opal_interrupt(int irq, void *data)
529 529
530 opal_handle_interrupt(virq_to_hw(irq), &events); 530 opal_handle_interrupt(virq_to_hw(irq), &events);
531 531
532 opal_do_notifier(events); 532 opal_do_notifier(be64_to_cpu(events));
533 533
534 return IRQ_HANDLED; 534 return IRQ_HANDLED;
535} 535}
@@ -638,3 +638,66 @@ void opal_shutdown(void)
638 638
639/* Export this so that test modules can use it */ 639/* Export this so that test modules can use it */
640EXPORT_SYMBOL_GPL(opal_invalid_call); 640EXPORT_SYMBOL_GPL(opal_invalid_call);
641
642/* Convert a region of vmalloc memory to an opal sg list */
643struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
644 unsigned long vmalloc_size)
645{
646 struct opal_sg_list *sg, *first = NULL;
647 unsigned long i = 0;
648
649 sg = kzalloc(PAGE_SIZE, GFP_KERNEL);
650 if (!sg)
651 goto nomem;
652
653 first = sg;
654
655 while (vmalloc_size > 0) {
656 uint64_t data = vmalloc_to_pfn(vmalloc_addr) << PAGE_SHIFT;
657 uint64_t length = min(vmalloc_size, PAGE_SIZE);
658
659 sg->entry[i].data = cpu_to_be64(data);
660 sg->entry[i].length = cpu_to_be64(length);
661 i++;
662
663 if (i >= SG_ENTRIES_PER_NODE) {
664 struct opal_sg_list *next;
665
666 next = kzalloc(PAGE_SIZE, GFP_KERNEL);
667 if (!next)
668 goto nomem;
669
670 sg->length = cpu_to_be64(
671 i * sizeof(struct opal_sg_entry) + 16);
672 i = 0;
673 sg->next = cpu_to_be64(__pa(next));
674 sg = next;
675 }
676
677 vmalloc_addr += length;
678 vmalloc_size -= length;
679 }
680
681 sg->length = cpu_to_be64(i * sizeof(struct opal_sg_entry) + 16);
682
683 return first;
684
685nomem:
686 pr_err("%s : Failed to allocate memory\n", __func__);
687 opal_free_sg_list(first);
688 return NULL;
689}
690
691void opal_free_sg_list(struct opal_sg_list *sg)
692{
693 while (sg) {
694 uint64_t next = be64_to_cpu(sg->next);
695
696 kfree(sg);
697
698 if (next)
699 sg = __va(next);
700 else
701 sg = NULL;
702 }
703}
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3b2b4fb3585b..98824aa99173 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -343,7 +343,6 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe)
343 pci_name(dev)); 343 pci_name(dev));
344 continue; 344 continue;
345 } 345 }
346 pci_dev_get(dev);
347 pdn->pcidev = dev; 346 pdn->pcidev = dev;
348 pdn->pe_number = pe->pe_number; 347 pdn->pe_number = pe->pe_number;
349 pe->dma_weight += pnv_ioda_dma_weight(dev); 348 pe->dma_weight += pnv_ioda_dma_weight(dev);
@@ -462,7 +461,7 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev
462 461
463 pe = &phb->ioda.pe_array[pdn->pe_number]; 462 pe = &phb->ioda.pe_array[pdn->pe_number];
464 WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops); 463 WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops);
465 set_iommu_table_base_and_group(&pdev->dev, &pe->tce32_table); 464 set_iommu_table_base(&pdev->dev, &pe->tce32_table);
466} 465}
467 466
468static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb, 467static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 61cf8fa9c61b..8723d32632f5 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -162,18 +162,62 @@ static void pnv_shutdown(void)
162} 162}
163 163
164#ifdef CONFIG_KEXEC 164#ifdef CONFIG_KEXEC
165static void pnv_kexec_wait_secondaries_down(void)
166{
167 int my_cpu, i, notified = -1;
168
169 my_cpu = get_cpu();
170
171 for_each_online_cpu(i) {
172 uint8_t status;
173 int64_t rc;
174
175 if (i == my_cpu)
176 continue;
177
178 for (;;) {
179 rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
180 &status);
181 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
182 break;
183 barrier();
184 if (i != notified) {
185 printk(KERN_INFO "kexec: waiting for cpu %d "
186 "(physical %d) to enter OPAL\n",
187 i, paca[i].hw_cpu_id);
188 notified = i;
189 }
190 }
191 }
192}
193
165static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 194static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
166{ 195{
167 xics_kexec_teardown_cpu(secondary); 196 xics_kexec_teardown_cpu(secondary);
168 197
169 /* Return secondary CPUs to firmware on OPAL v3 */ 198 /* On OPAL v3, we return all CPUs to firmware */
170 if (firmware_has_feature(FW_FEATURE_OPALv3) && secondary) { 199
200 if (!firmware_has_feature(FW_FEATURE_OPALv3))
201 return;
202
203 if (secondary) {
204 /* Return secondary CPUs to firmware on OPAL v3 */
171 mb(); 205 mb();
172 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 206 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
173 mb(); 207 mb();
174 208
175 /* Return the CPU to OPAL */ 209 /* Return the CPU to OPAL */
176 opal_return_cpu(); 210 opal_return_cpu();
211 } else if (crash_shutdown) {
212 /*
213 * On crash, we don't wait for secondaries to go
214 * down as they might be unreachable or hung, so
215 * instead we just wait a bit and move on.
216 */
217 mdelay(1);
218 } else {
219 /* Primary waits for the secondaries to have reached OPAL */
220 pnv_kexec_wait_secondaries_down();
177 } 221 }
178} 222}
179#endif /* CONFIG_KEXEC */ 223#endif /* CONFIG_KEXEC */
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 908672bdcea6..bf5fcd452168 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -30,6 +30,7 @@
30#include <asm/cputhreads.h> 30#include <asm/cputhreads.h>
31#include <asm/xics.h> 31#include <asm/xics.h>
32#include <asm/opal.h> 32#include <asm/opal.h>
33#include <asm/runlatch.h>
33 34
34#include "powernv.h" 35#include "powernv.h"
35 36
@@ -156,7 +157,9 @@ static void pnv_smp_cpu_kill_self(void)
156 */ 157 */
157 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); 158 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
158 while (!generic_check_cpu_restart(cpu)) { 159 while (!generic_check_cpu_restart(cpu)) {
160 ppc64_runlatch_off();
159 power7_nap(); 161 power7_nap();
162 ppc64_runlatch_on();
160 if (!generic_check_cpu_restart(cpu)) { 163 if (!generic_check_cpu_restart(cpu)) {
161 DBG("CPU%d Unexpected exit while offline !\n", cpu); 164 DBG("CPU%d Unexpected exit while offline !\n", cpu);
162 /* We may be getting an IPI, so we re-enable 165 /* We may be getting an IPI, so we re-enable
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 9b8e05078a63..20d62975856f 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -88,13 +88,14 @@ void set_default_offline_state(int cpu)
88 88
89static void rtas_stop_self(void) 89static void rtas_stop_self(void)
90{ 90{
91 struct rtas_args args = { 91 static struct rtas_args args = {
92 .token = cpu_to_be32(rtas_stop_self_token),
93 .nargs = 0, 92 .nargs = 0,
94 .nret = 1, 93 .nret = 1,
95 .rets = &args.args[0], 94 .rets = &args.args[0],
96 }; 95 };
97 96
97 args.token = cpu_to_be32(rtas_stop_self_token);
98
98 local_irq_disable(); 99 local_irq_disable();
99 100
100 BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE); 101 BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 573b488fc48b..7f75c94af822 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -100,10 +100,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
100 100
101 start_pfn = base >> PAGE_SHIFT; 101 start_pfn = base >> PAGE_SHIFT;
102 102
103 if (!pfn_valid(start_pfn)) { 103 lock_device_hotplug();
104 memblock_remove(base, memblock_size); 104
105 return 0; 105 if (!pfn_valid(start_pfn))
106 } 106 goto out;
107 107
108 block_sz = memory_block_size_bytes(); 108 block_sz = memory_block_size_bytes();
109 sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE; 109 sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE;
@@ -114,8 +114,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
114 base += MIN_MEMORY_BLOCK_SIZE; 114 base += MIN_MEMORY_BLOCK_SIZE;
115 } 115 }
116 116
117out:
117 /* Update memory regions for memory remove */ 118 /* Update memory regions for memory remove */
118 memblock_remove(base, memblock_size); 119 memblock_remove(base, memblock_size);
120 unlock_device_hotplug();
119 return 0; 121 return 0;
120} 122}
121 123
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 64603a10b863..4914fd3f41ec 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1058,7 +1058,7 @@ static int __init apm821xx_pciex_core_init(struct device_node *np)
1058 return 1; 1058 return 1;
1059} 1059}
1060 1060
1061static int apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port) 1061static int __init apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
1062{ 1062{
1063 u32 val; 1063 u32 val;
1064 1064
diff --git a/arch/s390/include/asm/ccwgroup.h b/arch/s390/include/asm/ccwgroup.h
index 6e670f88d125..ebc2913f9ee0 100644
--- a/arch/s390/include/asm/ccwgroup.h
+++ b/arch/s390/include/asm/ccwgroup.h
@@ -22,8 +22,8 @@ struct ccwgroup_device {
22/* public: */ 22/* public: */
23 unsigned int count; 23 unsigned int count;
24 struct device dev; 24 struct device dev;
25 struct ccw_device *cdev[0];
26 struct work_struct ungroup_work; 25 struct work_struct ungroup_work;
26 struct ccw_device *cdev[0];
27}; 27};
28 28
29/** 29/**
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index d091aa1aaf11..bf9c823d4020 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -31,4 +31,23 @@
31#define SIGP_STATUS_INCORRECT_STATE 0x00000200UL 31#define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
32#define SIGP_STATUS_NOT_RUNNING 0x00000400UL 32#define SIGP_STATUS_NOT_RUNNING 0x00000400UL
33 33
34#ifndef __ASSEMBLY__
35
36static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
37{
38 register unsigned int reg1 asm ("1") = parm;
39 int cc;
40
41 asm volatile(
42 " sigp %1,%2,0(%3)\n"
43 " ipm %0\n"
44 " srl %0,28\n"
45 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
46 if (status && cc == 1)
47 *status = reg1;
48 return cc;
49}
50
51#endif /* __ASSEMBLY__ */
52
34#endif /* __S390_ASM_SIGP_H */ 53#endif /* __S390_ASM_SIGP_H */
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index 160779394096..21703f85b48d 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -7,6 +7,8 @@
7#ifndef __ASM_SMP_H 7#ifndef __ASM_SMP_H
8#define __ASM_SMP_H 8#define __ASM_SMP_H
9 9
10#include <asm/sigp.h>
11
10#ifdef CONFIG_SMP 12#ifdef CONFIG_SMP
11 13
12#include <asm/lowcore.h> 14#include <asm/lowcore.h>
@@ -50,9 +52,18 @@ static inline int smp_store_status(int cpu) { return 0; }
50static inline int smp_vcpu_scheduled(int cpu) { return 1; } 52static inline int smp_vcpu_scheduled(int cpu) { return 1; }
51static inline void smp_yield_cpu(int cpu) { } 53static inline void smp_yield_cpu(int cpu) { }
52static inline void smp_yield(void) { } 54static inline void smp_yield(void) { }
53static inline void smp_stop_cpu(void) { }
54static inline void smp_fill_possible_mask(void) { } 55static inline void smp_fill_possible_mask(void) { }
55 56
57static inline void smp_stop_cpu(void)
58{
59 u16 pcpu = stap();
60
61 for (;;) {
62 __pcpu_sigp(pcpu, SIGP_STOP, 0, NULL);
63 cpu_relax();
64 }
65}
66
56#endif /* CONFIG_SMP */ 67#endif /* CONFIG_SMP */
57 68
58#ifdef CONFIG_HOTPLUG_CPU 69#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index c544b6f05d95..a25f09fbaf36 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -59,12 +59,23 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb,
59 tlb->batch = NULL; 59 tlb->batch = NULL;
60} 60}
61 61
62static inline void tlb_flush_mmu(struct mmu_gather *tlb) 62static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
63{ 63{
64 __tlb_flush_mm_lazy(tlb->mm); 64 __tlb_flush_mm_lazy(tlb->mm);
65}
66
67static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
68{
65 tlb_table_flush(tlb); 69 tlb_table_flush(tlb);
66} 70}
67 71
72
73static inline void tlb_flush_mmu(struct mmu_gather *tlb)
74{
75 tlb_flush_mmu_tlbonly(tlb);
76 tlb_flush_mmu_free(tlb);
77}
78
68static inline void tlb_finish_mmu(struct mmu_gather *tlb, 79static inline void tlb_finish_mmu(struct mmu_gather *tlb,
69 unsigned long start, unsigned long end) 80 unsigned long start, unsigned long end)
70{ 81{
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
index 5eb5c9ddb120..3802d2d3a18d 100644
--- a/arch/s390/include/uapi/asm/unistd.h
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -282,7 +282,8 @@
282#define __NR_finit_module 344 282#define __NR_finit_module 344
283#define __NR_sched_setattr 345 283#define __NR_sched_setattr 345
284#define __NR_sched_getattr 346 284#define __NR_sched_getattr 346
285#define NR_syscalls 345 285#define __NR_renameat2 347
286#define NR_syscalls 348
286 287
287/* 288/*
288 * There are some system calls that are not present on 64 bit, some 289 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c
index 824c39dfddfc..45cdb37aa6f8 100644
--- a/arch/s390/kernel/compat_wrapper.c
+++ b/arch/s390/kernel/compat_wrapper.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Compat sytem call wrappers. 2 * Compat system call wrappers.
3 * 3 *
4 * Copyright IBM Corp. 2014 4 * Copyright IBM Corp. 2014
5 */ 5 */
@@ -213,3 +213,4 @@ COMPAT_SYSCALL_WRAP5(kcmp, pid_t, pid1, pid_t, pid2, int, type, unsigned long, i
213COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, flags); 213COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, flags);
214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags); 214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags);
215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags); 215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags);
216COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags);
diff --git a/arch/s390/kernel/dumpstack.c b/arch/s390/kernel/dumpstack.c
index e6af9406987c..acb412442e5e 100644
--- a/arch/s390/kernel/dumpstack.c
+++ b/arch/s390/kernel/dumpstack.c
@@ -144,10 +144,10 @@ void show_registers(struct pt_regs *regs)
144 char *mode; 144 char *mode;
145 145
146 mode = user_mode(regs) ? "User" : "Krnl"; 146 mode = user_mode(regs) ? "User" : "Krnl";
147 printk("%s PSW : %p %p (%pSR)\n", 147 printk("%s PSW : %p %p", mode, (void *)regs->psw.mask, (void *)regs->psw.addr);
148 mode, (void *) regs->psw.mask, 148 if (!user_mode(regs))
149 (void *) regs->psw.addr, 149 printk(" (%pSR)", (void *)regs->psw.addr);
150 (void *) regs->psw.addr); 150 printk("\n");
151 printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x " 151 printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
152 "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER), 152 "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
153 mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO), 153 mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 4ac8fafec95f..1c82619eb4f7 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -64,7 +64,7 @@ void update_cr_regs(struct task_struct *task)
64 if (task->thread.per_flags & PER_FLAG_NO_TE) 64 if (task->thread.per_flags & PER_FLAG_NO_TE)
65 cr_new &= ~(1UL << 55); 65 cr_new &= ~(1UL << 55);
66 if (cr_new != cr) 66 if (cr_new != cr)
67 __ctl_load(cr, 0, 0); 67 __ctl_load(cr_new, 0, 0);
68 /* Set or clear transaction execution TDC bits 62 and 63. */ 68 /* Set or clear transaction execution TDC bits 62 and 63. */
69 __ctl_store(cr, 2, 2); 69 __ctl_store(cr, 2, 2);
70 cr_new = cr & ~3UL; 70 cr_new = cr & ~3UL;
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index f70f2489fa5f..88d1ca81e2dd 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -1027,3 +1027,35 @@ void __init setup_arch(char **cmdline_p)
1027 /* Setup zfcpdump support */ 1027 /* Setup zfcpdump support */
1028 setup_zfcpdump(); 1028 setup_zfcpdump();
1029} 1029}
1030
1031#ifdef CONFIG_32BIT
1032static int no_removal_warning __initdata;
1033
1034static int __init parse_no_removal_warning(char *str)
1035{
1036 no_removal_warning = 1;
1037 return 0;
1038}
1039__setup("no_removal_warning", parse_no_removal_warning);
1040
1041static int __init removal_warning(void)
1042{
1043 if (no_removal_warning)
1044 return 0;
1045 printk(KERN_ALERT "\n\n");
1046 printk(KERN_CONT "Warning - you are using a 31 bit kernel!\n\n");
1047 printk(KERN_CONT "We plan to remove 31 bit kernel support from the kernel sources in March 2015.\n");
1048 printk(KERN_CONT "Currently we assume that nobody is using the 31 bit kernel on old 31 bit\n");
1049 printk(KERN_CONT "hardware anymore. If you think that the code should not be removed and also\n");
1050 printk(KERN_CONT "future versions of the Linux kernel should be able to run in 31 bit mode\n");
1051 printk(KERN_CONT "please let us know. Please write to:\n");
1052 printk(KERN_CONT "linux390@de.ibm.com (mail address) and/or\n");
1053 printk(KERN_CONT "linux-s390@vger.kernel.org (mailing list).\n\n");
1054 printk(KERN_CONT "Thank you!\n\n");
1055 printk(KERN_CONT "If this kernel runs on a 64 bit machine you may consider using a 64 bit kernel.\n");
1056 printk(KERN_CONT "This message can be disabled with the \"no_removal_warning\" kernel parameter.\n");
1057 schedule_timeout_uninterruptible(300 * HZ);
1058 return 0;
1059}
1060early_initcall(removal_warning);
1061#endif
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 512ce1cde2a4..86e65ec3422b 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -82,21 +82,6 @@ DEFINE_MUTEX(smp_cpu_state_mutex);
82/* 82/*
83 * Signal processor helper functions. 83 * Signal processor helper functions.
84 */ 84 */
85static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
86{
87 register unsigned int reg1 asm ("1") = parm;
88 int cc;
89
90 asm volatile(
91 " sigp %1,%2,0(%3)\n"
92 " ipm %0\n"
93 " srl %0,28\n"
94 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
95 if (status && cc == 1)
96 *status = reg1;
97 return cc;
98}
99
100static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status) 85static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status)
101{ 86{
102 int cc; 87 int cc;
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 542ef488bac1..fe5cdf29a001 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -355,3 +355,4 @@ SYSCALL(sys_kcmp,sys_kcmp,compat_sys_kcmp)
355SYSCALL(sys_finit_module,sys_finit_module,compat_sys_finit_module) 355SYSCALL(sys_finit_module,sys_finit_module,compat_sys_finit_module)
356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */ 356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */
357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr) 357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr)
358SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2)
diff --git a/arch/s390/lib/uaccess.c b/arch/s390/lib/uaccess.c
index 23f866b4c7f1..7416efe8eae4 100644
--- a/arch/s390/lib/uaccess.c
+++ b/arch/s390/lib/uaccess.c
@@ -338,9 +338,6 @@ static inline unsigned long strnlen_user_srst(const char __user *src,
338 register unsigned long reg0 asm("0") = 0; 338 register unsigned long reg0 asm("0") = 0;
339 unsigned long tmp1, tmp2; 339 unsigned long tmp1, tmp2;
340 340
341 if (unlikely(!size))
342 return 0;
343 update_primary_asce(current);
344 asm volatile( 341 asm volatile(
345 " la %2,0(%1)\n" 342 " la %2,0(%1)\n"
346 " la %3,0(%0,%1)\n" 343 " la %3,0(%0,%1)\n"
@@ -359,6 +356,8 @@ static inline unsigned long strnlen_user_srst(const char __user *src,
359 356
360unsigned long __strnlen_user(const char __user *src, unsigned long size) 357unsigned long __strnlen_user(const char __user *src, unsigned long size)
361{ 358{
359 if (unlikely(!size))
360 return 0;
362 update_primary_asce(current); 361 update_primary_asce(current);
363 return strnlen_user_srst(src, size); 362 return strnlen_user_srst(src, size);
364} 363}
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 19f623f1f21c..2f51a998a67e 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -126,6 +126,133 @@ static inline int user_space_fault(struct pt_regs *regs)
126 return 0; 126 return 0;
127} 127}
128 128
129static int bad_address(void *p)
130{
131 unsigned long dummy;
132
133 return probe_kernel_address((unsigned long *)p, dummy);
134}
135
136#ifdef CONFIG_64BIT
137static void dump_pagetable(unsigned long asce, unsigned long address)
138{
139 unsigned long *table = __va(asce & PAGE_MASK);
140
141 pr_alert("AS:%016lx ", asce);
142 switch (asce & _ASCE_TYPE_MASK) {
143 case _ASCE_TYPE_REGION1:
144 table = table + ((address >> 53) & 0x7ff);
145 if (bad_address(table))
146 goto bad;
147 pr_cont("R1:%016lx ", *table);
148 if (*table & _REGION_ENTRY_INVALID)
149 goto out;
150 table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
151 /* fallthrough */
152 case _ASCE_TYPE_REGION2:
153 table = table + ((address >> 42) & 0x7ff);
154 if (bad_address(table))
155 goto bad;
156 pr_cont("R2:%016lx ", *table);
157 if (*table & _REGION_ENTRY_INVALID)
158 goto out;
159 table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
160 /* fallthrough */
161 case _ASCE_TYPE_REGION3:
162 table = table + ((address >> 31) & 0x7ff);
163 if (bad_address(table))
164 goto bad;
165 pr_cont("R3:%016lx ", *table);
166 if (*table & (_REGION_ENTRY_INVALID | _REGION3_ENTRY_LARGE))
167 goto out;
168 table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
169 /* fallthrough */
170 case _ASCE_TYPE_SEGMENT:
171 table = table + ((address >> 20) & 0x7ff);
172 if (bad_address(table))
173 goto bad;
174 pr_cont(KERN_CONT "S:%016lx ", *table);
175 if (*table & (_SEGMENT_ENTRY_INVALID | _SEGMENT_ENTRY_LARGE))
176 goto out;
177 table = (unsigned long *)(*table & _SEGMENT_ENTRY_ORIGIN);
178 }
179 table = table + ((address >> 12) & 0xff);
180 if (bad_address(table))
181 goto bad;
182 pr_cont("P:%016lx ", *table);
183out:
184 pr_cont("\n");
185 return;
186bad:
187 pr_cont("BAD\n");
188}
189
190#else /* CONFIG_64BIT */
191
192static void dump_pagetable(unsigned long asce, unsigned long address)
193{
194 unsigned long *table = __va(asce & PAGE_MASK);
195
196 pr_alert("AS:%08lx ", asce);
197 table = table + ((address >> 20) & 0x7ff);
198 if (bad_address(table))
199 goto bad;
200 pr_cont("S:%08lx ", *table);
201 if (*table & _SEGMENT_ENTRY_INVALID)
202 goto out;
203 table = (unsigned long *)(*table & _SEGMENT_ENTRY_ORIGIN);
204 table = table + ((address >> 12) & 0xff);
205 if (bad_address(table))
206 goto bad;
207 pr_cont("P:%08lx ", *table);
208out:
209 pr_cont("\n");
210 return;
211bad:
212 pr_cont("BAD\n");
213}
214
215#endif /* CONFIG_64BIT */
216
217static void dump_fault_info(struct pt_regs *regs)
218{
219 unsigned long asce;
220
221 pr_alert("Fault in ");
222 switch (regs->int_parm_long & 3) {
223 case 3:
224 pr_cont("home space ");
225 break;
226 case 2:
227 pr_cont("secondary space ");
228 break;
229 case 1:
230 pr_cont("access register ");
231 break;
232 case 0:
233 pr_cont("primary space ");
234 break;
235 }
236 pr_cont("mode while using ");
237 if (!user_space_fault(regs)) {
238 asce = S390_lowcore.kernel_asce;
239 pr_cont("kernel ");
240 }
241#ifdef CONFIG_PGSTE
242 else if ((current->flags & PF_VCPU) && S390_lowcore.gmap) {
243 struct gmap *gmap = (struct gmap *)S390_lowcore.gmap;
244 asce = gmap->asce;
245 pr_cont("gmap ");
246 }
247#endif
248 else {
249 asce = S390_lowcore.user_asce;
250 pr_cont("user ");
251 }
252 pr_cont("ASCE.\n");
253 dump_pagetable(asce, regs->int_parm_long & __FAIL_ADDR_MASK);
254}
255
129static inline void report_user_fault(struct pt_regs *regs, long signr) 256static inline void report_user_fault(struct pt_regs *regs, long signr)
130{ 257{
131 if ((task_pid_nr(current) > 1) && !show_unhandled_signals) 258 if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
@@ -138,8 +265,9 @@ static inline void report_user_fault(struct pt_regs *regs, long signr)
138 regs->int_code); 265 regs->int_code);
139 print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN); 266 print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN);
140 printk(KERN_CONT "\n"); 267 printk(KERN_CONT "\n");
141 printk(KERN_ALERT "failing address: %lX\n", 268 printk(KERN_ALERT "failing address: %016lx TEID: %016lx\n",
142 regs->int_parm_long & __FAIL_ADDR_MASK); 269 regs->int_parm_long & __FAIL_ADDR_MASK, regs->int_parm_long);
270 dump_fault_info(regs);
143 show_regs(regs); 271 show_regs(regs);
144} 272}
145 273
@@ -177,11 +305,13 @@ static noinline void do_no_context(struct pt_regs *regs)
177 address = regs->int_parm_long & __FAIL_ADDR_MASK; 305 address = regs->int_parm_long & __FAIL_ADDR_MASK;
178 if (!user_space_fault(regs)) 306 if (!user_space_fault(regs))
179 printk(KERN_ALERT "Unable to handle kernel pointer dereference" 307 printk(KERN_ALERT "Unable to handle kernel pointer dereference"
180 " at virtual kernel address %p\n", (void *)address); 308 " in virtual kernel address space\n");
181 else 309 else
182 printk(KERN_ALERT "Unable to handle kernel paging request" 310 printk(KERN_ALERT "Unable to handle kernel paging request"
183 " at virtual user address %p\n", (void *)address); 311 " in virtual user address space\n");
184 312 printk(KERN_ALERT "failing address: %016lx TEID: %016lx\n",
313 regs->int_parm_long & __FAIL_ADDR_MASK, regs->int_parm_long);
314 dump_fault_info(regs);
185 die(regs, "Oops"); 315 die(regs, "Oops");
186 do_exit(SIGKILL); 316 do_exit(SIGKILL);
187} 317}
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index 9c36dc398f90..452d3ebd9d0f 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -276,7 +276,6 @@ static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter)
276 case BPF_S_LD_W_IND: 276 case BPF_S_LD_W_IND:
277 case BPF_S_LD_H_IND: 277 case BPF_S_LD_H_IND:
278 case BPF_S_LD_B_IND: 278 case BPF_S_LD_B_IND:
279 case BPF_S_LDX_B_MSH:
280 case BPF_S_LD_IMM: 279 case BPF_S_LD_IMM:
281 case BPF_S_LD_MEM: 280 case BPF_S_LD_MEM:
282 case BPF_S_MISC_TXA: 281 case BPF_S_MISC_TXA:
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index 362192ed12fe..62f80d2a9df9 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -86,6 +86,14 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
86 } 86 }
87} 87}
88 88
89static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
90{
91}
92
93static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
94{
95}
96
89static inline void tlb_flush_mmu(struct mmu_gather *tlb) 97static inline void tlb_flush_mmu(struct mmu_gather *tlb)
90{ 98{
91} 99}
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 0f9e94537eee..fde5abaac0cc 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -71,6 +71,23 @@
71 71
72#include <linux/sched.h> 72#include <linux/sched.h>
73 73
74extern unsigned long sparc64_valid_addr_bitmap[];
75
76/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
77static inline bool __kern_addr_valid(unsigned long paddr)
78{
79 if ((paddr >> MAX_PHYS_ADDRESS_BITS) != 0UL)
80 return false;
81 return test_bit(paddr >> ILOG2_4MB, sparc64_valid_addr_bitmap);
82}
83
84static inline bool kern_addr_valid(unsigned long addr)
85{
86 unsigned long paddr = __pa(addr);
87
88 return __kern_addr_valid(paddr);
89}
90
74/* Entries per page directory level. */ 91/* Entries per page directory level. */
75#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) 92#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
76#define PTRS_PER_PMD (1UL << PMD_BITS) 93#define PTRS_PER_PMD (1UL << PMD_BITS)
@@ -79,9 +96,12 @@
79/* Kernel has a separate 44bit address space. */ 96/* Kernel has a separate 44bit address space. */
80#define FIRST_USER_ADDRESS 0 97#define FIRST_USER_ADDRESS 0
81 98
82#define pte_ERROR(e) __builtin_trap() 99#define pmd_ERROR(e) \
83#define pmd_ERROR(e) __builtin_trap() 100 pr_err("%s:%d: bad pmd %p(%016lx) seen at (%pS)\n", \
84#define pgd_ERROR(e) __builtin_trap() 101 __FILE__, __LINE__, &(e), pmd_val(e), __builtin_return_address(0))
102#define pgd_ERROR(e) \
103 pr_err("%s:%d: bad pgd %p(%016lx) seen at (%pS)\n", \
104 __FILE__, __LINE__, &(e), pgd_val(e), __builtin_return_address(0))
85 105
86#endif /* !(__ASSEMBLY__) */ 106#endif /* !(__ASSEMBLY__) */
87 107
@@ -258,8 +278,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
258{ 278{
259 unsigned long mask, tmp; 279 unsigned long mask, tmp;
260 280
261 /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347) 281 /* SUN4U: 0x630107ffffffec38 (negated == 0x9cfef800000013c7)
262 * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8) 282 * SUN4V: 0x33ffffffffffee07 (negated == 0xcc000000000011f8)
263 * 283 *
264 * Even if we use negation tricks the result is still a 6 284 * Even if we use negation tricks the result is still a 6
265 * instruction sequence, so don't try to play fancy and just 285 * instruction sequence, so don't try to play fancy and just
@@ -289,10 +309,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
289 " .previous\n" 309 " .previous\n"
290 : "=r" (mask), "=r" (tmp) 310 : "=r" (mask), "=r" (tmp)
291 : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | 311 : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
292 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | 312 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U |
293 _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4U), 313 _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4U),
294 "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | 314 "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
295 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | 315 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V |
296 _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V)); 316 _PAGE_SPECIAL | _PAGE_PMD_HUGE | _PAGE_SZALL_4V));
297 317
298 return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); 318 return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
@@ -633,7 +653,7 @@ static inline unsigned long pmd_large(pmd_t pmd)
633{ 653{
634 pte_t pte = __pte(pmd_val(pmd)); 654 pte_t pte = __pte(pmd_val(pmd));
635 655
636 return (pte_val(pte) & _PAGE_PMD_HUGE) && pte_present(pte); 656 return pte_val(pte) & _PAGE_PMD_HUGE;
637} 657}
638 658
639#ifdef CONFIG_TRANSPARENT_HUGEPAGE 659#ifdef CONFIG_TRANSPARENT_HUGEPAGE
@@ -719,20 +739,6 @@ static inline pmd_t pmd_mkwrite(pmd_t pmd)
719 return __pmd(pte_val(pte)); 739 return __pmd(pte_val(pte));
720} 740}
721 741
722static inline pmd_t pmd_mknotpresent(pmd_t pmd)
723{
724 unsigned long mask;
725
726 if (tlb_type == hypervisor)
727 mask = _PAGE_PRESENT_4V;
728 else
729 mask = _PAGE_PRESENT_4U;
730
731 pmd_val(pmd) &= ~mask;
732
733 return pmd;
734}
735
736static inline pmd_t pmd_mksplitting(pmd_t pmd) 742static inline pmd_t pmd_mksplitting(pmd_t pmd)
737{ 743{
738 pte_t pte = __pte(pmd_val(pmd)); 744 pte_t pte = __pte(pmd_val(pmd));
@@ -757,6 +763,20 @@ static inline int pmd_present(pmd_t pmd)
757 763
758#define pmd_none(pmd) (!pmd_val(pmd)) 764#define pmd_none(pmd) (!pmd_val(pmd))
759 765
766/* pmd_bad() is only called on non-trans-huge PMDs. Our encoding is
767 * very simple, it's just the physical address. PTE tables are of
768 * size PAGE_SIZE so make sure the sub-PAGE_SIZE bits are clear and
769 * the top bits outside of the range of any physical address size we
770 * support are clear as well. We also validate the physical itself.
771 */
772#define pmd_bad(pmd) ((pmd_val(pmd) & ~PAGE_MASK) || \
773 !__kern_addr_valid(pmd_val(pmd)))
774
775#define pud_none(pud) (!pud_val(pud))
776
777#define pud_bad(pud) ((pud_val(pud) & ~PAGE_MASK) || \
778 !__kern_addr_valid(pud_val(pud)))
779
760#ifdef CONFIG_TRANSPARENT_HUGEPAGE 780#ifdef CONFIG_TRANSPARENT_HUGEPAGE
761extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, 781extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
762 pmd_t *pmdp, pmd_t pmd); 782 pmd_t *pmdp, pmd_t pmd);
@@ -790,10 +810,7 @@ static inline unsigned long __pmd_page(pmd_t pmd)
790#define pud_page_vaddr(pud) \ 810#define pud_page_vaddr(pud) \
791 ((unsigned long) __va(pud_val(pud))) 811 ((unsigned long) __va(pud_val(pud)))
792#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) 812#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud))
793#define pmd_bad(pmd) (0)
794#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL) 813#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL)
795#define pud_none(pud) (!pud_val(pud))
796#define pud_bad(pud) (0)
797#define pud_present(pud) (pud_val(pud) != 0U) 814#define pud_present(pud) (pud_val(pud) != 0U)
798#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL) 815#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
799 816
@@ -893,6 +910,10 @@ extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
893extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr, 910extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
894 pmd_t *pmd); 911 pmd_t *pmd);
895 912
913#define __HAVE_ARCH_PMDP_INVALIDATE
914extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
915 pmd_t *pmdp);
916
896#define __HAVE_ARCH_PGTABLE_DEPOSIT 917#define __HAVE_ARCH_PGTABLE_DEPOSIT
897extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 918extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
898 pgtable_t pgtable); 919 pgtable_t pgtable);
@@ -919,18 +940,6 @@ extern unsigned long pte_file(pte_t);
919extern pte_t pgoff_to_pte(unsigned long); 940extern pte_t pgoff_to_pte(unsigned long);
920#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) 941#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
921 942
922extern unsigned long sparc64_valid_addr_bitmap[];
923
924/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
925static inline bool kern_addr_valid(unsigned long addr)
926{
927 unsigned long paddr = __pa(addr);
928
929 if ((paddr >> 41UL) != 0UL)
930 return false;
931 return test_bit(paddr >> 22, sparc64_valid_addr_bitmap);
932}
933
934extern int page_in_phys_avail(unsigned long paddr); 943extern int page_in_phys_avail(unsigned long paddr);
935 944
936/* 945/*
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index 2230f80d9fe3..90916f955cac 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -171,7 +171,8 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
171 andcc REG1, REG2, %g0; \ 171 andcc REG1, REG2, %g0; \
172 be,pt %xcc, 700f; \ 172 be,pt %xcc, 700f; \
173 sethi %hi(4 * 1024 * 1024), REG2; \ 173 sethi %hi(4 * 1024 * 1024), REG2; \
174 andn REG1, REG2, REG1; \ 174 brgez,pn REG1, FAIL_LABEL; \
175 andn REG1, REG2, REG1; \
175 and VADDR, REG2, REG2; \ 176 and VADDR, REG2, REG2; \
176 brlz,pt REG1, PTE_LABEL; \ 177 brlz,pt REG1, PTE_LABEL; \
177 or REG1, REG2, REG1; \ 178 or REG1, REG2, REG1; \
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index 26b706a1867d..452f04fe8da6 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -282,8 +282,8 @@ sun4v_chip_type:
282 stx %l2, [%l4 + 0x0] 282 stx %l2, [%l4 + 0x0]
283 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low 283 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low
284 /* 4MB align */ 284 /* 4MB align */
285 srlx %l3, 22, %l3 285 srlx %l3, ILOG2_4MB, %l3
286 sllx %l3, 22, %l3 286 sllx %l3, ILOG2_4MB, %l3
287 stx %l3, [%l4 + 0x8] 287 stx %l3, [%l4 + 0x8]
288 288
289 /* Leave service as-is, "call-method" */ 289 /* Leave service as-is, "call-method" */
diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index 542e96ac4d39..605d49204580 100644
--- a/arch/sparc/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
@@ -277,7 +277,7 @@ kvmap_dtlb_load:
277#ifdef CONFIG_SPARSEMEM_VMEMMAP 277#ifdef CONFIG_SPARSEMEM_VMEMMAP
278kvmap_vmemmap: 278kvmap_vmemmap:
279 sub %g4, %g5, %g5 279 sub %g4, %g5, %g5
280 srlx %g5, 22, %g5 280 srlx %g5, ILOG2_4MB, %g5
281 sethi %hi(vmemmap_table), %g1 281 sethi %hi(vmemmap_table), %g1
282 sllx %g5, 3, %g5 282 sllx %g5, 3, %g5
283 or %g1, %lo(vmemmap_table), %g1 283 or %g1, %lo(vmemmap_table), %g1
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 6479256fd5a4..337094556916 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -68,27 +68,16 @@ EXPORT_SYMBOL(touch_nmi_watchdog);
68 68
69static void die_nmi(const char *str, struct pt_regs *regs, int do_panic) 69static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
70{ 70{
71 int this_cpu = smp_processor_id();
72
71 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 73 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0,
72 pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) 74 pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
73 return; 75 return;
74 76
75 console_verbose();
76 bust_spinlocks(1);
77
78 printk(KERN_EMERG "%s", str);
79 printk(" on CPU%d, ip %08lx, registers:\n",
80 smp_processor_id(), regs->tpc);
81 show_regs(regs);
82 dump_stack();
83
84 bust_spinlocks(0);
85
86 if (do_panic || panic_on_oops) 77 if (do_panic || panic_on_oops)
87 panic("Non maskable interrupt"); 78 panic("Watchdog detected hard LOCKUP on cpu %d", this_cpu);
88 79 else
89 nmi_exit(); 80 WARN(1, "Watchdog detected hard LOCKUP on cpu %d", this_cpu);
90 local_irq_enable();
91 do_exit(SIGBUS);
92} 81}
93 82
94notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) 83notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 9781048161ab..745a3633ce14 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -149,7 +149,7 @@ void cpu_panic(void)
149#define NUM_ROUNDS 64 /* magic value */ 149#define NUM_ROUNDS 64 /* magic value */
150#define NUM_ITERS 5 /* likewise */ 150#define NUM_ITERS 5 /* likewise */
151 151
152static DEFINE_SPINLOCK(itc_sync_lock); 152static DEFINE_RAW_SPINLOCK(itc_sync_lock);
153static unsigned long go[SLAVE + 1]; 153static unsigned long go[SLAVE + 1];
154 154
155#define DEBUG_TICK_SYNC 0 155#define DEBUG_TICK_SYNC 0
@@ -257,7 +257,7 @@ static void smp_synchronize_one_tick(int cpu)
257 go[MASTER] = 0; 257 go[MASTER] = 0;
258 membar_safe("#StoreLoad"); 258 membar_safe("#StoreLoad");
259 259
260 spin_lock_irqsave(&itc_sync_lock, flags); 260 raw_spin_lock_irqsave(&itc_sync_lock, flags);
261 { 261 {
262 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; i++) { 262 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; i++) {
263 while (!go[MASTER]) 263 while (!go[MASTER])
@@ -268,7 +268,7 @@ static void smp_synchronize_one_tick(int cpu)
268 membar_safe("#StoreLoad"); 268 membar_safe("#StoreLoad");
269 } 269 }
270 } 270 }
271 spin_unlock_irqrestore(&itc_sync_lock, flags); 271 raw_spin_unlock_irqrestore(&itc_sync_lock, flags);
272} 272}
273 273
274#if defined(CONFIG_SUN_LDOMS) && defined(CONFIG_HOTPLUG_CPU) 274#if defined(CONFIG_SUN_LDOMS) && defined(CONFIG_HOTPLUG_CPU)
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index f7c72b6efc27..d066eb18650c 100644
--- a/arch/sparc/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
@@ -44,7 +44,7 @@ SIGN1(sys32_timer_settime, compat_sys_timer_settime, %o1)
44SIGN1(sys32_io_submit, compat_sys_io_submit, %o1) 44SIGN1(sys32_io_submit, compat_sys_io_submit, %o1)
45SIGN1(sys32_mq_open, compat_sys_mq_open, %o1) 45SIGN1(sys32_mq_open, compat_sys_mq_open, %o1)
46SIGN1(sys32_select, compat_sys_select, %o0) 46SIGN1(sys32_select, compat_sys_select, %o0)
47SIGN3(sys32_futex, compat_sys_futex, %o1, %o2, %o5) 47SIGN1(sys32_futex, compat_sys_futex, %o1)
48SIGN1(sys32_recvfrom, compat_sys_recvfrom, %o0) 48SIGN1(sys32_recvfrom, compat_sys_recvfrom, %o0)
49SIGN1(sys32_recvmsg, compat_sys_recvmsg, %o0) 49SIGN1(sys32_recvmsg, compat_sys_recvmsg, %o0)
50SIGN1(sys32_sendmsg, compat_sys_sendmsg, %o0) 50SIGN1(sys32_sendmsg, compat_sys_sendmsg, %o0)
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index 3c1a7cb31579..35ab8b60d256 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -166,17 +166,23 @@ static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
166unsigned long compute_effective_address(struct pt_regs *regs, 166unsigned long compute_effective_address(struct pt_regs *regs,
167 unsigned int insn, unsigned int rd) 167 unsigned int insn, unsigned int rd)
168{ 168{
169 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
169 unsigned int rs1 = (insn >> 14) & 0x1f; 170 unsigned int rs1 = (insn >> 14) & 0x1f;
170 unsigned int rs2 = insn & 0x1f; 171 unsigned int rs2 = insn & 0x1f;
171 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0; 172 unsigned long addr;
172 173
173 if (insn & 0x2000) { 174 if (insn & 0x2000) {
174 maybe_flush_windows(rs1, 0, rd, from_kernel); 175 maybe_flush_windows(rs1, 0, rd, from_kernel);
175 return (fetch_reg(rs1, regs) + sign_extend_imm13(insn)); 176 addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
176 } else { 177 } else {
177 maybe_flush_windows(rs1, rs2, rd, from_kernel); 178 maybe_flush_windows(rs1, rs2, rd, from_kernel);
178 return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs)); 179 addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
179 } 180 }
181
182 if (!from_kernel && test_thread_flag(TIF_32BIT))
183 addr &= 0xffffffff;
184
185 return addr;
180} 186}
181 187
182/* This is just to make gcc think die_if_kernel does return... */ 188/* This is just to make gcc think die_if_kernel does return... */
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index 69bb818fdd79..a8ff0d1a3b69 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -96,38 +96,51 @@ static unsigned int get_user_insn(unsigned long tpc)
96 pte_t *ptep, pte; 96 pte_t *ptep, pte;
97 unsigned long pa; 97 unsigned long pa;
98 u32 insn = 0; 98 u32 insn = 0;
99 unsigned long pstate;
100 99
101 if (pgd_none(*pgdp)) 100 if (pgd_none(*pgdp) || unlikely(pgd_bad(*pgdp)))
102 goto outret; 101 goto out;
103 pudp = pud_offset(pgdp, tpc); 102 pudp = pud_offset(pgdp, tpc);
104 if (pud_none(*pudp)) 103 if (pud_none(*pudp) || unlikely(pud_bad(*pudp)))
105 goto outret; 104 goto out;
106 pmdp = pmd_offset(pudp, tpc);
107 if (pmd_none(*pmdp))
108 goto outret;
109 105
110 /* This disables preemption for us as well. */ 106 /* This disables preemption for us as well. */
111 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); 107 local_irq_disable();
112 __asm__ __volatile__("wrpr %0, %1, %%pstate"
113 : : "r" (pstate), "i" (PSTATE_IE));
114 ptep = pte_offset_map(pmdp, tpc);
115 pte = *ptep;
116 if (!pte_present(pte))
117 goto out;
118 108
119 pa = (pte_pfn(pte) << PAGE_SHIFT); 109 pmdp = pmd_offset(pudp, tpc);
120 pa += (tpc & ~PAGE_MASK); 110 if (pmd_none(*pmdp) || unlikely(pmd_bad(*pmdp)))
111 goto out_irq_enable;
112
113#ifdef CONFIG_TRANSPARENT_HUGEPAGE
114 if (pmd_trans_huge(*pmdp)) {
115 if (pmd_trans_splitting(*pmdp))
116 goto out_irq_enable;
121 117
122 /* Use phys bypass so we don't pollute dtlb/dcache. */ 118 pa = pmd_pfn(*pmdp) << PAGE_SHIFT;
123 __asm__ __volatile__("lduwa [%1] %2, %0" 119 pa += tpc & ~HPAGE_MASK;
124 : "=r" (insn)
125 : "r" (pa), "i" (ASI_PHYS_USE_EC));
126 120
121 /* Use phys bypass so we don't pollute dtlb/dcache. */
122 __asm__ __volatile__("lduwa [%1] %2, %0"
123 : "=r" (insn)
124 : "r" (pa), "i" (ASI_PHYS_USE_EC));
125 } else
126#endif
127 {
128 ptep = pte_offset_map(pmdp, tpc);
129 pte = *ptep;
130 if (pte_present(pte)) {
131 pa = (pte_pfn(pte) << PAGE_SHIFT);
132 pa += (tpc & ~PAGE_MASK);
133
134 /* Use phys bypass so we don't pollute dtlb/dcache. */
135 __asm__ __volatile__("lduwa [%1] %2, %0"
136 : "=r" (insn)
137 : "r" (pa), "i" (ASI_PHYS_USE_EC));
138 }
139 pte_unmap(ptep);
140 }
141out_irq_enable:
142 local_irq_enable();
127out: 143out:
128 pte_unmap(ptep);
129 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
130outret:
131 return insn; 144 return insn;
132} 145}
133 146
@@ -153,7 +166,8 @@ show_signal_msg(struct pt_regs *regs, int sig, int code,
153} 166}
154 167
155static void do_fault_siginfo(int code, int sig, struct pt_regs *regs, 168static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
156 unsigned int insn, int fault_code) 169 unsigned long fault_addr, unsigned int insn,
170 int fault_code)
157{ 171{
158 unsigned long addr; 172 unsigned long addr;
159 siginfo_t info; 173 siginfo_t info;
@@ -161,10 +175,18 @@ static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
161 info.si_code = code; 175 info.si_code = code;
162 info.si_signo = sig; 176 info.si_signo = sig;
163 info.si_errno = 0; 177 info.si_errno = 0;
164 if (fault_code & FAULT_CODE_ITLB) 178 if (fault_code & FAULT_CODE_ITLB) {
165 addr = regs->tpc; 179 addr = regs->tpc;
166 else 180 } else {
167 addr = compute_effective_address(regs, insn, 0); 181 /* If we were able to probe the faulting instruction, use it
182 * to compute a precise fault address. Otherwise use the fault
183 * time provided address which may only have page granularity.
184 */
185 if (insn)
186 addr = compute_effective_address(regs, insn, 0);
187 else
188 addr = fault_addr;
189 }
168 info.si_addr = (void __user *) addr; 190 info.si_addr = (void __user *) addr;
169 info.si_trapno = 0; 191 info.si_trapno = 0;
170 192
@@ -239,7 +261,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *regs, int si_code,
239 /* The si_code was set to make clear whether 261 /* The si_code was set to make clear whether
240 * this was a SEGV_MAPERR or SEGV_ACCERR fault. 262 * this was a SEGV_MAPERR or SEGV_ACCERR fault.
241 */ 263 */
242 do_fault_siginfo(si_code, SIGSEGV, regs, insn, fault_code); 264 do_fault_siginfo(si_code, SIGSEGV, regs, address, insn, fault_code);
243 return; 265 return;
244 } 266 }
245 267
@@ -525,7 +547,7 @@ do_sigbus:
525 * Send a sigbus, regardless of whether we were in kernel 547 * Send a sigbus, regardless of whether we were in kernel
526 * or user mode. 548 * or user mode.
527 */ 549 */
528 do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, insn, fault_code); 550 do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, address, insn, fault_code);
529 551
530 /* Kernel mode? Handle exceptions or die */ 552 /* Kernel mode? Handle exceptions or die */
531 if (regs->tstate & TSTATE_PRIV) 553 if (regs->tstate & TSTATE_PRIV)
diff --git a/arch/sparc/mm/gup.c b/arch/sparc/mm/gup.c
index c4d3da68b800..1aed0432c64b 100644
--- a/arch/sparc/mm/gup.c
+++ b/arch/sparc/mm/gup.c
@@ -73,7 +73,7 @@ static int gup_huge_pmd(pmd_t *pmdp, pmd_t pmd, unsigned long addr,
73 struct page *head, *page, *tail; 73 struct page *head, *page, *tail;
74 int refs; 74 int refs;
75 75
76 if (!pmd_large(pmd)) 76 if (!(pmd_val(pmd) & _PAGE_VALID))
77 return 0; 77 return 0;
78 78
79 if (write && !pmd_write(pmd)) 79 if (write && !pmd_write(pmd))
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index eafbc65c9c47..ed3c969a5f4c 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -588,7 +588,7 @@ static void __init remap_kernel(void)
588 int i, tlb_ent = sparc64_highest_locked_tlbent(); 588 int i, tlb_ent = sparc64_highest_locked_tlbent();
589 589
590 tte_vaddr = (unsigned long) KERNBASE; 590 tte_vaddr = (unsigned long) KERNBASE;
591 phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL; 591 phys_page = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
592 tte_data = kern_large_tte(phys_page); 592 tte_data = kern_large_tte(phys_page);
593 593
594 kern_locked_tte_data = tte_data; 594 kern_locked_tte_data = tte_data;
@@ -1881,7 +1881,7 @@ void __init paging_init(void)
1881 1881
1882 BUILD_BUG_ON(NR_CPUS > 4096); 1882 BUILD_BUG_ON(NR_CPUS > 4096);
1883 1883
1884 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL; 1884 kern_base = (prom_boot_mapping_phys_low >> ILOG2_4MB) << ILOG2_4MB;
1885 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE; 1885 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
1886 1886
1887 /* Invalidate both kernel TSBs. */ 1887 /* Invalidate both kernel TSBs. */
@@ -1937,7 +1937,7 @@ void __init paging_init(void)
1937 shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE); 1937 shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
1938 1938
1939 real_end = (unsigned long)_end; 1939 real_end = (unsigned long)_end;
1940 num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << 22); 1940 num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << ILOG2_4MB);
1941 printk("Kernel: Using %d locked TLB entries for main kernel image.\n", 1941 printk("Kernel: Using %d locked TLB entries for main kernel image.\n",
1942 num_kernel_image_mappings); 1942 num_kernel_image_mappings);
1943 1943
@@ -2094,7 +2094,7 @@ static void __init setup_valid_addr_bitmap_from_pavail(unsigned long *bitmap)
2094 2094
2095 if (new_start <= old_start && 2095 if (new_start <= old_start &&
2096 new_end >= (old_start + PAGE_SIZE)) { 2096 new_end >= (old_start + PAGE_SIZE)) {
2097 set_bit(old_start >> 22, bitmap); 2097 set_bit(old_start >> ILOG2_4MB, bitmap);
2098 goto do_next_page; 2098 goto do_next_page;
2099 } 2099 }
2100 } 2100 }
@@ -2143,7 +2143,7 @@ void __init mem_init(void)
2143 addr = PAGE_OFFSET + kern_base; 2143 addr = PAGE_OFFSET + kern_base;
2144 last = PAGE_ALIGN(kern_size) + addr; 2144 last = PAGE_ALIGN(kern_size) + addr;
2145 while (addr < last) { 2145 while (addr < last) {
2146 set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap); 2146 set_bit(__pa(addr) >> ILOG2_4MB, sparc64_valid_addr_bitmap);
2147 addr += PAGE_SIZE; 2147 addr += PAGE_SIZE;
2148 } 2148 }
2149 2149
@@ -2267,7 +2267,7 @@ int __meminit vmemmap_populate(unsigned long vstart, unsigned long vend,
2267 void *block; 2267 void *block;
2268 2268
2269 if (!(*vmem_pp & _PAGE_VALID)) { 2269 if (!(*vmem_pp & _PAGE_VALID)) {
2270 block = vmemmap_alloc_block(1UL << 22, node); 2270 block = vmemmap_alloc_block(1UL << ILOG2_4MB, node);
2271 if (!block) 2271 if (!block)
2272 return -ENOMEM; 2272 return -ENOMEM;
2273 2273
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index b12cb5e72812..b89aba217e3b 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -134,7 +134,7 @@ no_cache_flush:
134 134
135#ifdef CONFIG_TRANSPARENT_HUGEPAGE 135#ifdef CONFIG_TRANSPARENT_HUGEPAGE
136static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr, 136static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
137 pmd_t pmd, bool exec) 137 pmd_t pmd)
138{ 138{
139 unsigned long end; 139 unsigned long end;
140 pte_t *pte; 140 pte_t *pte;
@@ -142,8 +142,11 @@ static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
142 pte = pte_offset_map(&pmd, vaddr); 142 pte = pte_offset_map(&pmd, vaddr);
143 end = vaddr + HPAGE_SIZE; 143 end = vaddr + HPAGE_SIZE;
144 while (vaddr < end) { 144 while (vaddr < end) {
145 if (pte_val(*pte) & _PAGE_VALID) 145 if (pte_val(*pte) & _PAGE_VALID) {
146 bool exec = pte_exec(*pte);
147
146 tlb_batch_add_one(mm, vaddr, exec); 148 tlb_batch_add_one(mm, vaddr, exec);
149 }
147 pte++; 150 pte++;
148 vaddr += PAGE_SIZE; 151 vaddr += PAGE_SIZE;
149 } 152 }
@@ -177,19 +180,30 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
177 } 180 }
178 181
179 if (!pmd_none(orig)) { 182 if (!pmd_none(orig)) {
180 pte_t orig_pte = __pte(pmd_val(orig));
181 bool exec = pte_exec(orig_pte);
182
183 addr &= HPAGE_MASK; 183 addr &= HPAGE_MASK;
184 if (pmd_trans_huge(orig)) { 184 if (pmd_trans_huge(orig)) {
185 pte_t orig_pte = __pte(pmd_val(orig));
186 bool exec = pte_exec(orig_pte);
187
185 tlb_batch_add_one(mm, addr, exec); 188 tlb_batch_add_one(mm, addr, exec);
186 tlb_batch_add_one(mm, addr + REAL_HPAGE_SIZE, exec); 189 tlb_batch_add_one(mm, addr + REAL_HPAGE_SIZE, exec);
187 } else { 190 } else {
188 tlb_batch_pmd_scan(mm, addr, orig, exec); 191 tlb_batch_pmd_scan(mm, addr, orig);
189 } 192 }
190 } 193 }
191} 194}
192 195
196void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
197 pmd_t *pmdp)
198{
199 pmd_t entry = *pmdp;
200
201 pmd_val(entry) &= ~_PAGE_VALID;
202
203 set_pmd_at(vma->vm_mm, address, pmdp, entry);
204 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
205}
206
193void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 207void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
194 pgtable_t pgtable) 208 pgtable_t pgtable)
195{ 209{
diff --git a/arch/um/include/asm/tlb.h b/arch/um/include/asm/tlb.h
index 29b0301c18aa..16eb63fac57d 100644
--- a/arch/um/include/asm/tlb.h
+++ b/arch/um/include/asm/tlb.h
@@ -59,13 +59,25 @@ extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
59 unsigned long end); 59 unsigned long end);
60 60
61static inline void 61static inline void
62tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
63{
64 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
65}
66
67static inline void
68tlb_flush_mmu_free(struct mmu_gather *tlb)
69{
70 init_tlb_gather(tlb);
71}
72
73static inline void
62tlb_flush_mmu(struct mmu_gather *tlb) 74tlb_flush_mmu(struct mmu_gather *tlb)
63{ 75{
64 if (!tlb->need_flush) 76 if (!tlb->need_flush)
65 return; 77 return;
66 78
67 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end); 79 tlb_flush_mmu_tlbonly(tlb);
68 init_tlb_gather(tlb); 80 tlb_flush_mmu_free(tlb);
69} 81}
70 82
71/* tlb_finish_mmu 83/* tlb_finish_mmu
diff --git a/arch/um/include/shared/os.h b/arch/um/include/shared/os.h
index 75298d3358e7..08eec0b691b0 100644
--- a/arch/um/include/shared/os.h
+++ b/arch/um/include/shared/os.h
@@ -136,6 +136,7 @@ extern int os_ioctl_generic(int fd, unsigned int cmd, unsigned long arg);
136extern int os_get_ifname(int fd, char *namebuf); 136extern int os_get_ifname(int fd, char *namebuf);
137extern int os_set_slip(int fd); 137extern int os_set_slip(int fd);
138extern int os_mode_fd(int fd, int mode); 138extern int os_mode_fd(int fd, int mode);
139extern int os_fsync_file(int fd);
139 140
140extern int os_seek_file(int fd, unsigned long long offset); 141extern int os_seek_file(int fd, unsigned long long offset);
141extern int os_open_file(const char *file, struct openflags flags, int mode); 142extern int os_open_file(const char *file, struct openflags flags, int mode);
diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c
index f116db15d402..30fdd5d0067b 100644
--- a/arch/um/kernel/physmem.c
+++ b/arch/um/kernel/physmem.c
@@ -103,6 +103,7 @@ void __init setup_physmem(unsigned long start, unsigned long reserve_end,
103 */ 103 */
104 os_seek_file(physmem_fd, __pa(&__syscall_stub_start)); 104 os_seek_file(physmem_fd, __pa(&__syscall_stub_start));
105 os_write_file(physmem_fd, &__syscall_stub_start, PAGE_SIZE); 105 os_write_file(physmem_fd, &__syscall_stub_start, PAGE_SIZE);
106 os_fsync_file(physmem_fd);
106 107
107 bootmap_size = init_bootmem(pfn, pfn + delta); 108 bootmap_size = init_bootmem(pfn, pfn + delta);
108 free_bootmem(__pa(reserve_end) + bootmap_size, 109 free_bootmem(__pa(reserve_end) + bootmap_size,
diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c
index 07a750197bb0..08d90fba952c 100644
--- a/arch/um/os-Linux/file.c
+++ b/arch/um/os-Linux/file.c
@@ -237,6 +237,12 @@ void os_close_file(int fd)
237{ 237{
238 close(fd); 238 close(fd);
239} 239}
240int os_fsync_file(int fd)
241{
242 if (fsync(fd) < 0)
243 return -errno;
244 return 0;
245}
240 246
241int os_seek_file(int fd, unsigned long long offset) 247int os_seek_file(int fd, unsigned long long offset)
242{ 248{
diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c
index e1704ff600ff..df9191acd926 100644
--- a/arch/um/os-Linux/main.c
+++ b/arch/um/os-Linux/main.c
@@ -151,6 +151,7 @@ int __init main(int argc, char **argv, char **envp)
151#endif 151#endif
152 152
153 do_uml_initcalls(); 153 do_uml_initcalls();
154 change_sig(SIGPIPE, 0);
154 ret = linux_main(argc, argv); 155 ret = linux_main(argc, argv);
155 156
156 /* 157 /*
diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c
index 3c4af77e51a2..897e9ad0c108 100644
--- a/arch/um/os-Linux/mem.c
+++ b/arch/um/os-Linux/mem.c
@@ -12,337 +12,117 @@
12#include <string.h> 12#include <string.h>
13#include <sys/stat.h> 13#include <sys/stat.h>
14#include <sys/mman.h> 14#include <sys/mman.h>
15#include <sys/param.h> 15#include <sys/vfs.h>
16#include <linux/magic.h>
16#include <init.h> 17#include <init.h>
17#include <os.h> 18#include <os.h>
18 19
19/* Modified by which_tmpdir, which is called during early boot */ 20/* Set by make_tempfile() during early boot. */
20static char *default_tmpdir = "/tmp";
21
22/*
23 * Modified when creating the physical memory file and when checking
24 * the tmp filesystem for usability, both happening during early boot.
25 */
26static char *tempdir = NULL; 21static char *tempdir = NULL;
27 22
28static void __init find_tempdir(void) 23/* Check if dir is on tmpfs. Return 0 if yes, -1 if no or error. */
24static int __init check_tmpfs(const char *dir)
29{ 25{
30 const char *dirs[] = { "TMP", "TEMP", "TMPDIR", NULL }; 26 struct statfs st;
31 int i;
32 char *dir = NULL;
33
34 if (tempdir != NULL)
35 /* We've already been called */
36 return;
37 for (i = 0; dirs[i]; i++) {
38 dir = getenv(dirs[i]);
39 if ((dir != NULL) && (*dir != '\0'))
40 break;
41 }
42 if ((dir == NULL) || (*dir == '\0'))
43 dir = default_tmpdir;
44 27
45 tempdir = malloc(strlen(dir) + 2); 28 printf("Checking if %s is on tmpfs...", dir);
46 if (tempdir == NULL) { 29 if (statfs(dir, &st) < 0) {
47 fprintf(stderr, "Failed to malloc tempdir, " 30 printf("%s\n", strerror(errno));
48 "errno = %d\n", errno); 31 } else if (st.f_type != TMPFS_MAGIC) {
49 return; 32 printf("no\n");
50 } 33 } else {
51 strcpy(tempdir, dir); 34 printf("OK\n");
52 strcat(tempdir, "/"); 35 return 0;
53}
54
55/*
56 * Remove bytes from the front of the buffer and refill it so that if there's a
57 * partial string that we care about, it will be completed, and we can recognize
58 * it.
59 */
60static int pop(int fd, char *buf, size_t size, size_t npop)
61{
62 ssize_t n;
63 size_t len = strlen(&buf[npop]);
64
65 memmove(buf, &buf[npop], len + 1);
66 n = read(fd, &buf[len], size - len - 1);
67 if (n < 0)
68 return -errno;
69
70 buf[len + n] = '\0';
71 return 1;
72}
73
74/*
75 * This will return 1, with the first character in buf being the
76 * character following the next instance of c in the file. This will
77 * read the file as needed. If there's an error, -errno is returned;
78 * if the end of the file is reached, 0 is returned.
79 */
80static int next(int fd, char *buf, size_t size, char c)
81{
82 ssize_t n;
83 char *ptr;
84
85 while ((ptr = strchr(buf, c)) == NULL) {
86 n = read(fd, buf, size - 1);
87 if (n == 0)
88 return 0;
89 else if (n < 0)
90 return -errno;
91
92 buf[n] = '\0';
93 } 36 }
94 37 return -1;
95 return pop(fd, buf, size, ptr - buf + 1);
96} 38}
97 39
98/* 40/*
99 * Decode an octal-escaped and space-terminated path of the form used by 41 * Choose the tempdir to use. We want something on tmpfs so that our memory is
100 * /proc/mounts. May be used to decode a path in-place. "out" must be at least 42 * not subject to the host's vm.dirty_ratio. If a tempdir is specified in the
101 * as large as the input. The output is always null-terminated. "len" gets the 43 * environment, we use that even if it's not on tmpfs, but we warn the user.
102 * length of the output, excluding the trailing null. Returns 0 if a full path 44 * Otherwise, we try common tmpfs locations, and if no tmpfs directory is found
103 * was successfully decoded, otherwise an error. 45 * then we fall back to /tmp.
104 */ 46 */
105static int decode_path(const char *in, char *out, size_t *len) 47static char * __init choose_tempdir(void)
106{ 48{
107 char *first = out; 49 static const char * const vars[] = {
108 int c; 50 "TMPDIR",
51 "TMP",
52 "TEMP",
53 NULL
54 };
55 static const char fallback_dir[] = "/tmp";
56 static const char * const tmpfs_dirs[] = {
57 "/dev/shm",
58 fallback_dir,
59 NULL
60 };
109 int i; 61 int i;
110 int ret = -EINVAL; 62 const char *dir;
111 while (1) { 63
112 switch (*in) { 64 printf("Checking environment variables for a tempdir...");
113 case '\0': 65 for (i = 0; vars[i]; i++) {
114 goto out; 66 dir = getenv(vars[i]);
115 67 if ((dir != NULL) && (*dir != '\0')) {
116 case ' ': 68 printf("%s\n", dir);
117 ret = 0; 69 if (check_tmpfs(dir) >= 0)
118 goto out; 70 goto done;
119 71 else
120 case '\\': 72 goto warn;
121 in++;
122 c = 0;
123 for (i = 0; i < 3; i++) {
124 if (*in < '0' || *in > '7')
125 goto out;
126 c = (c << 3) | (*in++ - '0');
127 }
128 *(unsigned char *)out++ = (unsigned char) c;
129 break;
130
131 default:
132 *out++ = *in++;
133 break;
134 } 73 }
135 } 74 }
75 printf("none found\n");
136 76
137out: 77 for (i = 0; tmpfs_dirs[i]; i++) {
138 *out = '\0'; 78 dir = tmpfs_dirs[i];
139 *len = out - first; 79 if (check_tmpfs(dir) >= 0)
140 return ret; 80 goto done;
141}
142
143/*
144 * Computes the length of s when encoded with three-digit octal escape sequences
145 * for the characters in chars.
146 */
147static size_t octal_encoded_length(const char *s, const char *chars)
148{
149 size_t len = strlen(s);
150 while ((s = strpbrk(s, chars)) != NULL) {
151 len += 3;
152 s++;
153 }
154
155 return len;
156}
157
158enum {
159 OUTCOME_NOTHING_MOUNTED,
160 OUTCOME_TMPFS_MOUNT,
161 OUTCOME_NON_TMPFS_MOUNT,
162};
163
164/* Read a line of /proc/mounts data looking for a tmpfs mount at "path". */
165static int read_mount(int fd, char *buf, size_t bufsize, const char *path,
166 int *outcome)
167{
168 int found;
169 int match;
170 char *space;
171 size_t len;
172
173 enum {
174 MATCH_NONE,
175 MATCH_EXACT,
176 MATCH_PARENT,
177 };
178
179 found = next(fd, buf, bufsize, ' ');
180 if (found != 1)
181 return found;
182
183 /*
184 * If there's no following space in the buffer, then this path is
185 * truncated, so it can't be the one we're looking for.
186 */
187 space = strchr(buf, ' ');
188 if (space) {
189 match = MATCH_NONE;
190 if (!decode_path(buf, buf, &len)) {
191 if (!strcmp(buf, path))
192 match = MATCH_EXACT;
193 else if (!strncmp(buf, path, len)
194 && (path[len] == '/' || !strcmp(buf, "/")))
195 match = MATCH_PARENT;
196 }
197
198 found = pop(fd, buf, bufsize, space - buf + 1);
199 if (found != 1)
200 return found;
201
202 switch (match) {
203 case MATCH_EXACT:
204 if (!strncmp(buf, "tmpfs", strlen("tmpfs")))
205 *outcome = OUTCOME_TMPFS_MOUNT;
206 else
207 *outcome = OUTCOME_NON_TMPFS_MOUNT;
208 break;
209
210 case MATCH_PARENT:
211 /* This mount obscures any previous ones. */
212 *outcome = OUTCOME_NOTHING_MOUNTED;
213 break;
214 }
215 } 81 }
216 82
217 return next(fd, buf, bufsize, '\n'); 83 dir = fallback_dir;
84warn:
85 printf("Warning: tempdir %s is not on tmpfs\n", dir);
86done:
87 /* Make a copy since getenv results may not remain valid forever. */
88 return strdup(dir);
218} 89}
219 90
220/* which_tmpdir is called only during early boot */
221static int checked_tmpdir = 0;
222
223/* 91/*
224 * Look for a tmpfs mounted at /dev/shm. I couldn't find a cleaner 92 * Create an unlinked tempfile in a suitable tempdir. template must be the
225 * way to do this than to parse /proc/mounts. statfs will return the 93 * basename part of the template with a leading '/'.
226 * same filesystem magic number and fs id for both /dev and /dev/shm
227 * when they are both tmpfs, so you can't tell if they are different
228 * filesystems. Also, there seems to be no other way of finding the
229 * mount point of a filesystem from within it.
230 *
231 * If a /dev/shm tmpfs entry is found, then we switch to using it.
232 * Otherwise, we stay with the default /tmp.
233 */ 94 */
234static void which_tmpdir(void) 95static int __init make_tempfile(const char *template)
235{ 96{
97 char *tempname;
236 int fd; 98 int fd;
237 int found;
238 int outcome;
239 char *path;
240 char *buf;
241 size_t bufsize;
242 99
243 if (checked_tmpdir) 100 if (tempdir == NULL) {
244 return; 101 tempdir = choose_tempdir();
245 102 if (tempdir == NULL) {
246 checked_tmpdir = 1; 103 fprintf(stderr, "Failed to choose tempdir: %s\n",
247 104 strerror(errno));
248 printf("Checking for tmpfs mount on /dev/shm..."); 105 return -1;
249
250 path = realpath("/dev/shm", NULL);
251 if (!path) {
252 printf("failed to check real path, errno = %d\n", errno);
253 return;
254 }
255 printf("%s...", path);
256
257 /*
258 * The buffer needs to be able to fit the full octal-escaped path, a
259 * space, and a trailing null in order to successfully decode it.
260 */
261 bufsize = octal_encoded_length(path, " \t\n\\") + 2;
262
263 if (bufsize < 128)
264 bufsize = 128;
265
266 buf = malloc(bufsize);
267 if (!buf) {
268 printf("malloc failed, errno = %d\n", errno);
269 goto out;
270 }
271 buf[0] = '\0';
272
273 fd = open("/proc/mounts", O_RDONLY);
274 if (fd < 0) {
275 printf("failed to open /proc/mounts, errno = %d\n", errno);
276 goto out1;
277 }
278
279 outcome = OUTCOME_NOTHING_MOUNTED;
280 while (1) {
281 found = read_mount(fd, buf, bufsize, path, &outcome);
282 if (found != 1)
283 break;
284 }
285
286 if (found < 0) {
287 printf("read returned errno %d\n", -found);
288 } else {
289 switch (outcome) {
290 case OUTCOME_TMPFS_MOUNT:
291 printf("OK\n");
292 default_tmpdir = "/dev/shm";
293 break;
294
295 case OUTCOME_NON_TMPFS_MOUNT:
296 printf("not tmpfs\n");
297 break;
298
299 default:
300 printf("nothing mounted on /dev/shm\n");
301 break;
302 } 106 }
303 } 107 }
304 108
305 close(fd); 109 tempname = malloc(strlen(tempdir) + strlen(template) + 1);
306out1:
307 free(buf);
308out:
309 free(path);
310}
311
312static int __init make_tempfile(const char *template, char **out_tempname,
313 int do_unlink)
314{
315 char *tempname;
316 int fd;
317
318 which_tmpdir();
319 tempname = malloc(MAXPATHLEN);
320 if (tempname == NULL) 110 if (tempname == NULL)
321 return -1; 111 return -1;
322 112
323 find_tempdir(); 113 strcpy(tempname, tempdir);
324 if ((tempdir == NULL) || (strlen(tempdir) >= MAXPATHLEN)) 114 strcat(tempname, template);
325 goto out;
326
327 if (template[0] != '/')
328 strcpy(tempname, tempdir);
329 else
330 tempname[0] = '\0';
331 strncat(tempname, template, MAXPATHLEN-1-strlen(tempname));
332 fd = mkstemp(tempname); 115 fd = mkstemp(tempname);
333 if (fd < 0) { 116 if (fd < 0) {
334 fprintf(stderr, "open - cannot create %s: %s\n", tempname, 117 fprintf(stderr, "open - cannot create %s: %s\n", tempname,
335 strerror(errno)); 118 strerror(errno));
336 goto out; 119 goto out;
337 } 120 }
338 if (do_unlink && (unlink(tempname) < 0)) { 121 if (unlink(tempname) < 0) {
339 perror("unlink"); 122 perror("unlink");
340 goto close; 123 goto close;
341 } 124 }
342 if (out_tempname) { 125 free(tempname);
343 *out_tempname = tempname;
344 } else
345 free(tempname);
346 return fd; 126 return fd;
347close: 127close:
348 close(fd); 128 close(fd);
@@ -351,14 +131,14 @@ out:
351 return -1; 131 return -1;
352} 132}
353 133
354#define TEMPNAME_TEMPLATE "vm_file-XXXXXX" 134#define TEMPNAME_TEMPLATE "/vm_file-XXXXXX"
355 135
356static int __init create_tmp_file(unsigned long long len) 136static int __init create_tmp_file(unsigned long long len)
357{ 137{
358 int fd, err; 138 int fd, err;
359 char zero; 139 char zero;
360 140
361 fd = make_tempfile(TEMPNAME_TEMPLATE, NULL, 1); 141 fd = make_tempfile(TEMPNAME_TEMPLATE);
362 if (fd < 0) 142 if (fd < 0)
363 exit(1); 143 exit(1);
364 144
@@ -402,7 +182,6 @@ int __init create_mem_file(unsigned long long len)
402 return fd; 182 return fd;
403} 183}
404 184
405
406void __init check_tmpexec(void) 185void __init check_tmpexec(void)
407{ 186{
408 void *addr; 187 void *addr;
@@ -410,14 +189,13 @@ void __init check_tmpexec(void)
410 189
411 addr = mmap(NULL, UM_KERN_PAGE_SIZE, 190 addr = mmap(NULL, UM_KERN_PAGE_SIZE,
412 PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0); 191 PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0);
413 printf("Checking PROT_EXEC mmap in %s...",tempdir); 192 printf("Checking PROT_EXEC mmap in %s...", tempdir);
414 fflush(stdout);
415 if (addr == MAP_FAILED) { 193 if (addr == MAP_FAILED) {
416 err = errno; 194 err = errno;
417 perror("failed"); 195 printf("%s\n", strerror(err));
418 close(fd); 196 close(fd);
419 if (err == EPERM) 197 if (err == EPERM)
420 printf("%s must be not mounted noexec\n",tempdir); 198 printf("%s must be not mounted noexec\n", tempdir);
421 exit(1); 199 exit(1);
422 } 200 }
423 printf("OK\n"); 201 printf("OK\n");
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 602f57e590b5..33f71b01fd22 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -79,11 +79,14 @@ else
79 UTS_MACHINE := x86_64 79 UTS_MACHINE := x86_64
80 CHECKFLAGS += -D__x86_64__ -m64 80 CHECKFLAGS += -D__x86_64__ -m64
81 81
82 biarch := -m64
82 KBUILD_AFLAGS += -m64 83 KBUILD_AFLAGS += -m64
83 KBUILD_CFLAGS += -m64 84 KBUILD_CFLAGS += -m64
84 85
85 # Don't autogenerate traditional x87, MMX or SSE instructions 86 # Don't autogenerate traditional x87, MMX or SSE instructions
86 KBUILD_CFLAGS += -mno-mmx -mno-sse -mno-80387 -mno-fp-ret-in-387 87 KBUILD_CFLAGS += -mno-mmx -mno-sse
88 KBUILD_CFLAGS += $(call cc-option,-mno-80387)
89 KBUILD_CFLAGS += $(call cc-option,-mno-fp-ret-in-387)
87 90
88 # Use -mpreferred-stack-boundary=3 if supported. 91 # Use -mpreferred-stack-boundary=3 if supported.
89 KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3) 92 KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
@@ -250,8 +253,8 @@ archclean:
250PHONY += kvmconfig 253PHONY += kvmconfig
251kvmconfig: 254kvmconfig:
252 $(if $(wildcard $(objtree)/.config),, $(error You need an existing .config for this target)) 255 $(if $(wildcard $(objtree)/.config),, $(error You need an existing .config for this target))
253 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh -m -O $(objtree) $(objtree)/.config arch/x86/configs/kvm_guest.config 256 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh -m -O $(objtree) $(objtree)/.config $(srctree)/arch/x86/configs/kvm_guest.config
254 $(Q)yes "" | $(MAKE) oldconfig 257 $(Q)yes "" | $(MAKE) -f $(srctree)/Makefile oldconfig
255 258
256define archhelp 259define archhelp
257 echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)' 260 echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index abb9eba61b50..dbe8dd2fe247 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -71,7 +71,7 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
71 71
72SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) 72SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
73 73
74sed-voffset := -e 's/^\([0-9a-fA-F]*\) . \(_text\|_end\)$$/\#define VO_\2 0x\1/p' 74sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|_end\)$$/\#define VO_\2 0x\1/p'
75 75
76quiet_cmd_voffset = VOFFSET $@ 76quiet_cmd_voffset = VOFFSET $@
77 cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@ 77 cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@
@@ -80,7 +80,7 @@ targets += voffset.h
80$(obj)/voffset.h: vmlinux FORCE 80$(obj)/voffset.h: vmlinux FORCE
81 $(call if_changed,voffset) 81 $(call if_changed,voffset)
82 82
83sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p' 83sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
84 84
85quiet_cmd_zoffset = ZOFFSET $@ 85quiet_cmd_zoffset = ZOFFSET $@
86 cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@ 86 cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 17684615374b..57ab74df7eea 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -354,7 +354,7 @@ static void parse_elf(void *output)
354 free(phdrs); 354 free(phdrs);
355} 355}
356 356
357asmlinkage void *decompress_kernel(void *rmode, memptr heap, 357asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap,
358 unsigned char *input_data, 358 unsigned char *input_data,
359 unsigned long input_len, 359 unsigned long input_len,
360 unsigned char *output, 360 unsigned char *output,
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index b18df579c0e9..36f7125945e3 100644
--- a/arch/x86/include/asm/hpet.h
+++ b/arch/x86/include/asm/hpet.h
@@ -63,6 +63,7 @@
63/* hpet memory map physical address */ 63/* hpet memory map physical address */
64extern unsigned long hpet_address; 64extern unsigned long hpet_address;
65extern unsigned long force_hpet_address; 65extern unsigned long force_hpet_address;
66extern int boot_hpet_disable;
66extern u8 hpet_blockid; 67extern u8 hpet_blockid;
67extern int hpet_force_user; 68extern int hpet_force_user;
68extern u8 hpet_msi_disable; 69extern u8 hpet_msi_disable;
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index fcaf9c961265..7de069afb382 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -60,7 +60,7 @@
60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
62 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 62 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) 63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
64 64
65#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 65#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66 66
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index c827ace3121b..fcf2b3ae1bf0 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -384,7 +384,7 @@
384#define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18 384#define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18
385#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT) 385#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT)
386#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22 386#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22
387#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT); 387#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT)
388#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23 388#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23
389#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT) 389#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT)
390#define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34 390#define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 3a2ae4c88948..31368207837c 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -31,7 +31,7 @@ static char temp_stack[4096];
31 * 31 *
32 * Wrapper around acpi_enter_sleep_state() to be called by assmebly. 32 * Wrapper around acpi_enter_sleep_state() to be called by assmebly.
33 */ 33 */
34acpi_status asmlinkage x86_acpi_enter_sleep_state(u8 state) 34acpi_status asmlinkage __visible x86_acpi_enter_sleep_state(u8 state)
35{ 35{
36 return acpi_enter_sleep_state(state); 36 return acpi_enter_sleep_state(state);
37} 37}
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 6ad4658de705..992060e09897 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2189,7 +2189,7 @@ void send_cleanup_vector(struct irq_cfg *cfg)
2189 cfg->move_in_progress = 0; 2189 cfg->move_in_progress = 0;
2190} 2190}
2191 2191
2192asmlinkage void smp_irq_move_cleanup_interrupt(void) 2192asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
2193{ 2193{
2194 unsigned vector, me; 2194 unsigned vector, me;
2195 2195
@@ -3425,6 +3425,11 @@ int get_nr_irqs_gsi(void)
3425 return nr_irqs_gsi; 3425 return nr_irqs_gsi;
3426} 3426}
3427 3427
3428unsigned int arch_dynirq_lower_bound(unsigned int from)
3429{
3430 return from < nr_irqs_gsi ? nr_irqs_gsi : from;
3431}
3432
3428int __init arch_probe_nr_irqs(void) 3433int __init arch_probe_nr_irqs(void)
3429{ 3434{
3430 int nr; 3435 int nr;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index eeee23ff75ef..68317c80de7f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -598,7 +598,6 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
598{ 598{
599 struct mce m; 599 struct mce m;
600 int i; 600 int i;
601 unsigned long *v;
602 601
603 this_cpu_inc(mce_poll_count); 602 this_cpu_inc(mce_poll_count);
604 603
@@ -618,8 +617,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
618 if (!(m.status & MCI_STATUS_VAL)) 617 if (!(m.status & MCI_STATUS_VAL))
619 continue; 618 continue;
620 619
621 v = &get_cpu_var(mce_polled_error); 620 this_cpu_write(mce_polled_error, 1);
622 set_bit(0, v);
623 /* 621 /*
624 * Uncorrected or signalled events are handled by the exception 622 * Uncorrected or signalled events are handled by the exception
625 * handler when it is enabled, so don't process those here. 623 * handler when it is enabled, so don't process those here.
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 3bdb95ae8c43..9a316b21df8b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -42,7 +42,7 @@ static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
42 * cmci_discover_lock protects against parallel discovery attempts 42 * cmci_discover_lock protects against parallel discovery attempts
43 * which could race against each other. 43 * which could race against each other.
44 */ 44 */
45static DEFINE_RAW_SPINLOCK(cmci_discover_lock); 45static DEFINE_SPINLOCK(cmci_discover_lock);
46 46
47#define CMCI_THRESHOLD 1 47#define CMCI_THRESHOLD 1
48#define CMCI_POLL_INTERVAL (30 * HZ) 48#define CMCI_POLL_INTERVAL (30 * HZ)
@@ -144,14 +144,14 @@ static void cmci_storm_disable_banks(void)
144 int bank; 144 int bank;
145 u64 val; 145 u64 val;
146 146
147 raw_spin_lock_irqsave(&cmci_discover_lock, flags); 147 spin_lock_irqsave(&cmci_discover_lock, flags);
148 owned = __get_cpu_var(mce_banks_owned); 148 owned = __get_cpu_var(mce_banks_owned);
149 for_each_set_bit(bank, owned, MAX_NR_BANKS) { 149 for_each_set_bit(bank, owned, MAX_NR_BANKS) {
150 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); 150 rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
151 val &= ~MCI_CTL2_CMCI_EN; 151 val &= ~MCI_CTL2_CMCI_EN;
152 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); 152 wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
153 } 153 }
154 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 154 spin_unlock_irqrestore(&cmci_discover_lock, flags);
155} 155}
156 156
157static bool cmci_storm_detect(void) 157static bool cmci_storm_detect(void)
@@ -211,7 +211,7 @@ static void cmci_discover(int banks)
211 int i; 211 int i;
212 int bios_wrong_thresh = 0; 212 int bios_wrong_thresh = 0;
213 213
214 raw_spin_lock_irqsave(&cmci_discover_lock, flags); 214 spin_lock_irqsave(&cmci_discover_lock, flags);
215 for (i = 0; i < banks; i++) { 215 for (i = 0; i < banks; i++) {
216 u64 val; 216 u64 val;
217 int bios_zero_thresh = 0; 217 int bios_zero_thresh = 0;
@@ -266,7 +266,7 @@ static void cmci_discover(int banks)
266 WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks))); 266 WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
267 } 267 }
268 } 268 }
269 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 269 spin_unlock_irqrestore(&cmci_discover_lock, flags);
270 if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) { 270 if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) {
271 pr_info_once( 271 pr_info_once(
272 "bios_cmci_threshold: Some banks do not have valid thresholds set\n"); 272 "bios_cmci_threshold: Some banks do not have valid thresholds set\n");
@@ -316,10 +316,10 @@ void cmci_clear(void)
316 316
317 if (!cmci_supported(&banks)) 317 if (!cmci_supported(&banks))
318 return; 318 return;
319 raw_spin_lock_irqsave(&cmci_discover_lock, flags); 319 spin_lock_irqsave(&cmci_discover_lock, flags);
320 for (i = 0; i < banks; i++) 320 for (i = 0; i < banks; i++)
321 __cmci_disable_bank(i); 321 __cmci_disable_bank(i);
322 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 322 spin_unlock_irqrestore(&cmci_discover_lock, flags);
323} 323}
324 324
325static void cmci_rediscover_work_func(void *arg) 325static void cmci_rediscover_work_func(void *arg)
@@ -360,9 +360,9 @@ void cmci_disable_bank(int bank)
360 if (!cmci_supported(&banks)) 360 if (!cmci_supported(&banks))
361 return; 361 return;
362 362
363 raw_spin_lock_irqsave(&cmci_discover_lock, flags); 363 spin_lock_irqsave(&cmci_discover_lock, flags);
364 __cmci_disable_bank(bank); 364 __cmci_disable_bank(bank);
365 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 365 spin_unlock_irqrestore(&cmci_discover_lock, flags);
366} 366}
367 367
368static void intel_init_cmci(void) 368static void intel_init_cmci(void)
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index d921b7ee6595..36a1bb6d1ee0 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -429,14 +429,14 @@ static inline void __smp_thermal_interrupt(void)
429 smp_thermal_vector(); 429 smp_thermal_vector();
430} 430}
431 431
432asmlinkage void smp_thermal_interrupt(struct pt_regs *regs) 432asmlinkage __visible void smp_thermal_interrupt(struct pt_regs *regs)
433{ 433{
434 entering_irq(); 434 entering_irq();
435 __smp_thermal_interrupt(); 435 __smp_thermal_interrupt();
436 exiting_ack_irq(); 436 exiting_ack_irq();
437} 437}
438 438
439asmlinkage void smp_trace_thermal_interrupt(struct pt_regs *regs) 439asmlinkage __visible void smp_trace_thermal_interrupt(struct pt_regs *regs)
440{ 440{
441 entering_irq(); 441 entering_irq();
442 trace_thermal_apic_entry(THERMAL_APIC_VECTOR); 442 trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c b/arch/x86/kernel/cpu/mcheck/threshold.c
index fe6b1c86645b..7245980186ee 100644
--- a/arch/x86/kernel/cpu/mcheck/threshold.c
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -24,14 +24,14 @@ static inline void __smp_threshold_interrupt(void)
24 mce_threshold_vector(); 24 mce_threshold_vector();
25} 25}
26 26
27asmlinkage void smp_threshold_interrupt(void) 27asmlinkage __visible void smp_threshold_interrupt(void)
28{ 28{
29 entering_irq(); 29 entering_irq();
30 __smp_threshold_interrupt(); 30 __smp_threshold_interrupt();
31 exiting_ack_irq(); 31 exiting_ack_irq();
32} 32}
33 33
34asmlinkage void smp_trace_threshold_interrupt(void) 34asmlinkage __visible void smp_trace_threshold_interrupt(void)
35{ 35{
36 entering_irq(); 36 entering_irq();
37 trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR); 37 trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);
diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
index 059218ed5208..619f7699487a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
@@ -59,7 +59,7 @@
59#define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ 59#define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */
60#define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ 60#define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */
61#define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ 61#define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */
62#define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */ 62#define RAPL_IDX_PP1_NRG_STAT 3 /* gpu */
63#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ 63#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */
64 64
65/* Clients have PP0, PKG */ 65/* Clients have PP0, PKG */
@@ -72,6 +72,12 @@
72 1<<RAPL_IDX_PKG_NRG_STAT|\ 72 1<<RAPL_IDX_PKG_NRG_STAT|\
73 1<<RAPL_IDX_RAM_NRG_STAT) 73 1<<RAPL_IDX_RAM_NRG_STAT)
74 74
75/* Servers have PP0, PKG, RAM, PP1 */
76#define RAPL_IDX_HSW (1<<RAPL_IDX_PP0_NRG_STAT|\
77 1<<RAPL_IDX_PKG_NRG_STAT|\
78 1<<RAPL_IDX_RAM_NRG_STAT|\
79 1<<RAPL_IDX_PP1_NRG_STAT)
80
75/* 81/*
76 * event code: LSB 8 bits, passed in attr->config 82 * event code: LSB 8 bits, passed in attr->config
77 * any other bit is reserved 83 * any other bit is reserved
@@ -425,6 +431,24 @@ static struct attribute *rapl_events_cln_attr[] = {
425 NULL, 431 NULL,
426}; 432};
427 433
434static struct attribute *rapl_events_hsw_attr[] = {
435 EVENT_PTR(rapl_cores),
436 EVENT_PTR(rapl_pkg),
437 EVENT_PTR(rapl_gpu),
438 EVENT_PTR(rapl_ram),
439
440 EVENT_PTR(rapl_cores_unit),
441 EVENT_PTR(rapl_pkg_unit),
442 EVENT_PTR(rapl_gpu_unit),
443 EVENT_PTR(rapl_ram_unit),
444
445 EVENT_PTR(rapl_cores_scale),
446 EVENT_PTR(rapl_pkg_scale),
447 EVENT_PTR(rapl_gpu_scale),
448 EVENT_PTR(rapl_ram_scale),
449 NULL,
450};
451
428static struct attribute_group rapl_pmu_events_group = { 452static struct attribute_group rapl_pmu_events_group = {
429 .name = "events", 453 .name = "events",
430 .attrs = NULL, /* patched at runtime */ 454 .attrs = NULL, /* patched at runtime */
@@ -511,6 +535,7 @@ static int rapl_cpu_prepare(int cpu)
511 struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu); 535 struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
512 int phys_id = topology_physical_package_id(cpu); 536 int phys_id = topology_physical_package_id(cpu);
513 u64 ms; 537 u64 ms;
538 u64 msr_rapl_power_unit_bits;
514 539
515 if (pmu) 540 if (pmu)
516 return 0; 541 return 0;
@@ -518,6 +543,10 @@ static int rapl_cpu_prepare(int cpu)
518 if (phys_id < 0) 543 if (phys_id < 0)
519 return -1; 544 return -1;
520 545
546 /* protect rdmsrl() to handle virtualization */
547 if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits))
548 return -1;
549
521 pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu)); 550 pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu));
522 if (!pmu) 551 if (!pmu)
523 return -1; 552 return -1;
@@ -531,8 +560,7 @@ static int rapl_cpu_prepare(int cpu)
531 * 560 *
532 * we cache in local PMU instance 561 * we cache in local PMU instance
533 */ 562 */
534 rdmsrl(MSR_RAPL_POWER_UNIT, pmu->hw_unit); 563 pmu->hw_unit = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
535 pmu->hw_unit = (pmu->hw_unit >> 8) & 0x1FULL;
536 pmu->pmu = &rapl_pmu_class; 564 pmu->pmu = &rapl_pmu_class;
537 565
538 /* 566 /*
@@ -631,11 +659,14 @@ static int __init rapl_pmu_init(void)
631 switch (boot_cpu_data.x86_model) { 659 switch (boot_cpu_data.x86_model) {
632 case 42: /* Sandy Bridge */ 660 case 42: /* Sandy Bridge */
633 case 58: /* Ivy Bridge */ 661 case 58: /* Ivy Bridge */
634 case 60: /* Haswell */
635 case 69: /* Haswell-Celeron */
636 rapl_cntr_mask = RAPL_IDX_CLN; 662 rapl_cntr_mask = RAPL_IDX_CLN;
637 rapl_pmu_events_group.attrs = rapl_events_cln_attr; 663 rapl_pmu_events_group.attrs = rapl_events_cln_attr;
638 break; 664 break;
665 case 60: /* Haswell */
666 case 69: /* Haswell-Celeron */
667 rapl_cntr_mask = RAPL_IDX_HSW;
668 rapl_pmu_events_group.attrs = rapl_events_hsw_attr;
669 break;
639 case 45: /* Sandy Bridge-EP */ 670 case 45: /* Sandy Bridge-EP */
640 case 62: /* IvyTown */ 671 case 62: /* IvyTown */
641 rapl_cntr_mask = RAPL_IDX_SRV; 672 rapl_cntr_mask = RAPL_IDX_SRV;
@@ -650,7 +681,9 @@ static int __init rapl_pmu_init(void)
650 cpu_notifier_register_begin(); 681 cpu_notifier_register_begin();
651 682
652 for_each_online_cpu(cpu) { 683 for_each_online_cpu(cpu) {
653 rapl_cpu_prepare(cpu); 684 ret = rapl_cpu_prepare(cpu);
685 if (ret)
686 goto out;
654 rapl_cpu_init(cpu); 687 rapl_cpu_init(cpu);
655 } 688 }
656 689
@@ -673,6 +706,7 @@ static int __init rapl_pmu_init(void)
673 hweight32(rapl_cntr_mask), 706 hweight32(rapl_cntr_mask),
674 ktime_to_ms(pmu->timer_interval)); 707 ktime_to_ms(pmu->timer_interval));
675 708
709out:
676 cpu_notifier_register_done(); 710 cpu_notifier_register_done();
677 711
678 return 0; 712 return 0;
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index b0cc3809723d..6cda0baeac9d 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -17,6 +17,7 @@
17#include <asm/dma.h> 17#include <asm/dma.h>
18#include <asm/io_apic.h> 18#include <asm/io_apic.h>
19#include <asm/apic.h> 19#include <asm/apic.h>
20#include <asm/hpet.h>
20#include <asm/iommu.h> 21#include <asm/iommu.h>
21#include <asm/gart.h> 22#include <asm/gart.h>
22#include <asm/irq_remapping.h> 23#include <asm/irq_remapping.h>
@@ -240,7 +241,7 @@ static u32 __init intel_stolen_base(int num, int slot, int func, size_t stolen_s
240 return base; 241 return base;
241} 242}
242 243
243#define KB(x) ((x) * 1024) 244#define KB(x) ((x) * 1024UL)
244#define MB(x) (KB (KB (x))) 245#define MB(x) (KB (KB (x)))
245#define GB(x) (MB (KB (x))) 246#define GB(x) (MB (KB (x)))
246 247
@@ -530,6 +531,15 @@ static void __init intel_graphics_stolen(int num, int slot, int func)
530 } 531 }
531} 532}
532 533
534static void __init force_disable_hpet(int num, int slot, int func)
535{
536#ifdef CONFIG_HPET_TIMER
537 boot_hpet_disable = 1;
538 pr_info("x86/hpet: Will disable the HPET for this platform because it's not reliable\n");
539#endif
540}
541
542
533#define QFLAG_APPLY_ONCE 0x1 543#define QFLAG_APPLY_ONCE 0x1
534#define QFLAG_APPLIED 0x2 544#define QFLAG_APPLIED 0x2
535#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) 545#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -567,6 +577,12 @@ static struct chipset early_qrk[] __initdata = {
567 PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, 577 PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
568 { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID, 578 { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID,
569 QFLAG_APPLY_ONCE, intel_graphics_stolen }, 579 QFLAG_APPLY_ONCE, intel_graphics_stolen },
580 /*
581 * HPET on current version of Baytrail platform has accuracy
582 * problems, disable it for now:
583 */
584 { PCI_VENDOR_ID_INTEL, 0x0f00,
585 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
570 {} 586 {}
571}; 587};
572 588
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index c61a14a4a310..d6c1b9836995 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -29,7 +29,7 @@ static void __init i386_default_early_setup(void)
29 reserve_ebda_region(); 29 reserve_ebda_region();
30} 30}
31 31
32asmlinkage void __init i386_start_kernel(void) 32asmlinkage __visible void __init i386_start_kernel(void)
33{ 33{
34 sanitize_boot_params(&boot_params); 34 sanitize_boot_params(&boot_params);
35 35
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 85126ccbdf6b..068054f4bf20 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -137,7 +137,7 @@ static void __init copy_bootdata(char *real_mode_data)
137 } 137 }
138} 138}
139 139
140asmlinkage void __init x86_64_start_kernel(char * real_mode_data) 140asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
141{ 141{
142 int i; 142 int i;
143 143
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 8d80ae011603..4177bfbc80b0 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -88,7 +88,7 @@ static inline void hpet_clear_mapping(void)
88/* 88/*
89 * HPET command line enable / disable 89 * HPET command line enable / disable
90 */ 90 */
91static int boot_hpet_disable; 91int boot_hpet_disable;
92int hpet_force_user; 92int hpet_force_user;
93static int hpet_verbose; 93static int hpet_verbose;
94 94
diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c
index 79a3f9682871..61b17dc2c277 100644
--- a/arch/x86/kernel/kprobes/core.c
+++ b/arch/x86/kernel/kprobes/core.c
@@ -897,9 +897,10 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
897 struct kprobe *cur = kprobe_running(); 897 struct kprobe *cur = kprobe_running();
898 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); 898 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
899 899
900 switch (kcb->kprobe_status) { 900 if (unlikely(regs->ip == (unsigned long)cur->ainsn.insn)) {
901 case KPROBE_HIT_SS: 901 /* This must happen on single-stepping */
902 case KPROBE_REENTER: 902 WARN_ON(kcb->kprobe_status != KPROBE_HIT_SS &&
903 kcb->kprobe_status != KPROBE_REENTER);
903 /* 904 /*
904 * We are here because the instruction being single 905 * We are here because the instruction being single
905 * stepped caused a page fault. We reset the current 906 * stepped caused a page fault. We reset the current
@@ -914,9 +915,8 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
914 else 915 else
915 reset_current_kprobe(); 916 reset_current_kprobe();
916 preempt_enable_no_resched(); 917 preempt_enable_no_resched();
917 break; 918 } else if (kcb->kprobe_status == KPROBE_HIT_ACTIVE ||
918 case KPROBE_HIT_ACTIVE: 919 kcb->kprobe_status == KPROBE_HIT_SSDONE) {
919 case KPROBE_HIT_SSDONE:
920 /* 920 /*
921 * We increment the nmissed count for accounting, 921 * We increment the nmissed count for accounting,
922 * we can also use npre/npostfault count for accounting 922 * we can also use npre/npostfault count for accounting
@@ -945,10 +945,8 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
945 * fixup routine could not handle it, 945 * fixup routine could not handle it,
946 * Let do_page_fault() fix it. 946 * Let do_page_fault() fix it.
947 */ 947 */
948 break;
949 default:
950 break;
951 } 948 }
949
952 return 0; 950 return 0;
953} 951}
954 952
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 9c0280f93d05..898d077617a9 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -52,7 +52,7 @@
52 52
53asmlinkage extern void ret_from_fork(void); 53asmlinkage extern void ret_from_fork(void);
54 54
55asmlinkage DEFINE_PER_CPU(unsigned long, old_rsp); 55__visible DEFINE_PER_CPU(unsigned long, old_rsp);
56 56
57/* Prints also some state that isn't saved in the pt_regs */ 57/* Prints also some state that isn't saved in the pt_regs */
58void __show_regs(struct pt_regs *regs, int all) 58void __show_regs(struct pt_regs *regs, int all)
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 654b46574b91..52b1157c53eb 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -114,8 +114,8 @@ EXPORT_SYMBOL(machine_real_restart);
114 */ 114 */
115static int __init set_pci_reboot(const struct dmi_system_id *d) 115static int __init set_pci_reboot(const struct dmi_system_id *d)
116{ 116{
117 if (reboot_type != BOOT_CF9) { 117 if (reboot_type != BOOT_CF9_FORCE) {
118 reboot_type = BOOT_CF9; 118 reboot_type = BOOT_CF9_FORCE;
119 pr_info("%s series board detected. Selecting %s-method for reboots.\n", 119 pr_info("%s series board detected. Selecting %s-method for reboots.\n",
120 d->ident, "PCI"); 120 d->ident, "PCI");
121 } 121 }
@@ -191,6 +191,16 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
191 }, 191 },
192 }, 192 },
193 193
194 /* Certec */
195 { /* Handle problems with rebooting on Certec BPC600 */
196 .callback = set_pci_reboot,
197 .ident = "Certec BPC600",
198 .matches = {
199 DMI_MATCH(DMI_SYS_VENDOR, "Certec"),
200 DMI_MATCH(DMI_PRODUCT_NAME, "BPC600"),
201 },
202 },
203
194 /* Dell */ 204 /* Dell */
195 { /* Handle problems with rebooting on Dell DXP061 */ 205 { /* Handle problems with rebooting on Dell DXP061 */
196 .callback = set_bios_reboot, 206 .callback = set_bios_reboot,
@@ -458,20 +468,23 @@ void __attribute__((weak)) mach_reboot_fixups(void)
458} 468}
459 469
460/* 470/*
461 * Windows compatible x86 hardware expects the following on reboot: 471 * To the best of our knowledge Windows compatible x86 hardware expects
472 * the following on reboot:
462 * 473 *
463 * 1) If the FADT has the ACPI reboot register flag set, try it 474 * 1) If the FADT has the ACPI reboot register flag set, try it
464 * 2) If still alive, write to the keyboard controller 475 * 2) If still alive, write to the keyboard controller
465 * 3) If still alive, write to the ACPI reboot register again 476 * 3) If still alive, write to the ACPI reboot register again
466 * 4) If still alive, write to the keyboard controller again 477 * 4) If still alive, write to the keyboard controller again
467 * 5) If still alive, call the EFI runtime service to reboot 478 * 5) If still alive, call the EFI runtime service to reboot
468 * 6) If still alive, write to the PCI IO port 0xCF9 to reboot 479 * 6) If no EFI runtime service, call the BIOS to do a reboot
469 * 7) If still alive, inform BIOS to do a proper reboot 480 *
481 * We default to following the same pattern. We also have
482 * two other reboot methods: 'triple fault' and 'PCI', which
483 * can be triggered via the reboot= kernel boot option or
484 * via quirks.
470 * 485 *
471 * If the machine is still alive at this stage, it gives up. We default to 486 * This means that this function can never return, it can misbehave
472 * following the same pattern, except that if we're still alive after (7) we'll 487 * by not rebooting properly and hanging.
473 * try to force a triple fault and then cycle between hitting the keyboard
474 * controller and doing that
475 */ 488 */
476static void native_machine_emergency_restart(void) 489static void native_machine_emergency_restart(void)
477{ 490{
@@ -492,6 +505,11 @@ static void native_machine_emergency_restart(void)
492 for (;;) { 505 for (;;) {
493 /* Could also try the reset bit in the Hammer NB */ 506 /* Could also try the reset bit in the Hammer NB */
494 switch (reboot_type) { 507 switch (reboot_type) {
508 case BOOT_ACPI:
509 acpi_reboot();
510 reboot_type = BOOT_KBD;
511 break;
512
495 case BOOT_KBD: 513 case BOOT_KBD:
496 mach_reboot_fixups(); /* For board specific fixups */ 514 mach_reboot_fixups(); /* For board specific fixups */
497 515
@@ -509,43 +527,29 @@ static void native_machine_emergency_restart(void)
509 } 527 }
510 break; 528 break;
511 529
512 case BOOT_TRIPLE:
513 load_idt(&no_idt);
514 __asm__ __volatile__("int3");
515
516 /* We're probably dead after this, but... */
517 reboot_type = BOOT_KBD;
518 break;
519
520 case BOOT_BIOS:
521 machine_real_restart(MRR_BIOS);
522
523 /* We're probably dead after this, but... */
524 reboot_type = BOOT_TRIPLE;
525 break;
526
527 case BOOT_ACPI:
528 acpi_reboot();
529 reboot_type = BOOT_KBD;
530 break;
531
532 case BOOT_EFI: 530 case BOOT_EFI:
533 if (efi_enabled(EFI_RUNTIME_SERVICES)) 531 if (efi_enabled(EFI_RUNTIME_SERVICES))
534 efi.reset_system(reboot_mode == REBOOT_WARM ? 532 efi.reset_system(reboot_mode == REBOOT_WARM ?
535 EFI_RESET_WARM : 533 EFI_RESET_WARM :
536 EFI_RESET_COLD, 534 EFI_RESET_COLD,
537 EFI_SUCCESS, 0, NULL); 535 EFI_SUCCESS, 0, NULL);
538 reboot_type = BOOT_CF9_COND; 536 reboot_type = BOOT_BIOS;
537 break;
538
539 case BOOT_BIOS:
540 machine_real_restart(MRR_BIOS);
541
542 /* We're probably dead after this, but... */
543 reboot_type = BOOT_CF9_SAFE;
539 break; 544 break;
540 545
541 case BOOT_CF9: 546 case BOOT_CF9_FORCE:
542 port_cf9_safe = true; 547 port_cf9_safe = true;
543 /* Fall through */ 548 /* Fall through */
544 549
545 case BOOT_CF9_COND: 550 case BOOT_CF9_SAFE:
546 if (port_cf9_safe) { 551 if (port_cf9_safe) {
547 u8 reboot_code = reboot_mode == REBOOT_WARM ? 552 u8 reboot_code = reboot_mode == REBOOT_WARM ? 0x06 : 0x0E;
548 0x06 : 0x0E;
549 u8 cf9 = inb(0xcf9) & ~reboot_code; 553 u8 cf9 = inb(0xcf9) & ~reboot_code;
550 outb(cf9|2, 0xcf9); /* Request hard reset */ 554 outb(cf9|2, 0xcf9); /* Request hard reset */
551 udelay(50); 555 udelay(50);
@@ -553,7 +557,15 @@ static void native_machine_emergency_restart(void)
553 outb(cf9|reboot_code, 0xcf9); 557 outb(cf9|reboot_code, 0xcf9);
554 udelay(50); 558 udelay(50);
555 } 559 }
556 reboot_type = BOOT_BIOS; 560 reboot_type = BOOT_TRIPLE;
561 break;
562
563 case BOOT_TRIPLE:
564 load_idt(&no_idt);
565 __asm__ __volatile__("int3");
566
567 /* We're probably dead after this, but... */
568 reboot_type = BOOT_KBD;
557 break; 569 break;
558 } 570 }
559 } 571 }
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 7c3a5a61f2e4..be8e1bde07aa 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -168,7 +168,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
168 * this function calls the 'stop' function on all other CPUs in the system. 168 * this function calls the 'stop' function on all other CPUs in the system.
169 */ 169 */
170 170
171asmlinkage void smp_reboot_interrupt(void) 171asmlinkage __visible void smp_reboot_interrupt(void)
172{ 172{
173 ack_APIC_irq(); 173 ack_APIC_irq();
174 irq_enter(); 174 irq_enter();
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 57409f6b8c62..f73b5d435bdc 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -357,7 +357,7 @@ exit:
357 * for scheduling or signal handling. The actual stack switch is done in 357 * for scheduling or signal handling. The actual stack switch is done in
358 * entry.S 358 * entry.S
359 */ 359 */
360asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) 360asmlinkage __visible __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
361{ 361{
362 struct pt_regs *regs = eregs; 362 struct pt_regs *regs = eregs;
363 /* Did already sync */ 363 /* Did already sync */
@@ -601,11 +601,11 @@ do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
601#endif 601#endif
602} 602}
603 603
604asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) 604asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
605{ 605{
606} 606}
607 607
608asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) 608asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
609{ 609{
610} 610}
611 611
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index f6584a90aba3..b99b9ad8540c 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -26,6 +26,9 @@
26 26
27#define TOPOLOGY_REGISTER_OFFSET 0x10 27#define TOPOLOGY_REGISTER_OFFSET 0x10
28 28
29/* Flag below is initialized once during vSMP PCI initialization. */
30static int irq_routing_comply = 1;
31
29#if defined CONFIG_PCI && defined CONFIG_PARAVIRT 32#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
30/* 33/*
31 * Interrupt control on vSMPowered systems: 34 * Interrupt control on vSMPowered systems:
@@ -33,7 +36,7 @@
33 * and vice versa. 36 * and vice versa.
34 */ 37 */
35 38
36asmlinkage unsigned long vsmp_save_fl(void) 39asmlinkage __visible unsigned long vsmp_save_fl(void)
37{ 40{
38 unsigned long flags = native_save_fl(); 41 unsigned long flags = native_save_fl();
39 42
@@ -53,7 +56,7 @@ __visible void vsmp_restore_fl(unsigned long flags)
53} 56}
54PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl); 57PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
55 58
56asmlinkage void vsmp_irq_disable(void) 59asmlinkage __visible void vsmp_irq_disable(void)
57{ 60{
58 unsigned long flags = native_save_fl(); 61 unsigned long flags = native_save_fl();
59 62
@@ -61,7 +64,7 @@ asmlinkage void vsmp_irq_disable(void)
61} 64}
62PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable); 65PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
63 66
64asmlinkage void vsmp_irq_enable(void) 67asmlinkage __visible void vsmp_irq_enable(void)
65{ 68{
66 unsigned long flags = native_save_fl(); 69 unsigned long flags = native_save_fl();
67 70
@@ -101,6 +104,10 @@ static void __init set_vsmp_pv_ops(void)
101#ifdef CONFIG_SMP 104#ifdef CONFIG_SMP
102 if (cap & ctl & BIT(8)) { 105 if (cap & ctl & BIT(8)) {
103 ctl &= ~BIT(8); 106 ctl &= ~BIT(8);
107
108 /* Interrupt routing set to ignore */
109 irq_routing_comply = 0;
110
104#ifdef CONFIG_PROC_FS 111#ifdef CONFIG_PROC_FS
105 /* Don't let users change irq affinity via procfs */ 112 /* Don't let users change irq affinity via procfs */
106 no_irq_affinity = 1; 113 no_irq_affinity = 1;
@@ -218,7 +225,9 @@ static void vsmp_apic_post_init(void)
218{ 225{
219 /* need to update phys_pkg_id */ 226 /* need to update phys_pkg_id */
220 apic->phys_pkg_id = apicid_phys_pkg_id; 227 apic->phys_pkg_id = apicid_phys_pkg_id;
221 apic->vector_allocation_domain = fill_vector_allocation_domain; 228
229 if (!irq_routing_comply)
230 apic->vector_allocation_domain = fill_vector_allocation_domain;
222} 231}
223 232
224void __init vsmp_init(void) 233void __init vsmp_init(void)
diff --git a/arch/x86/kernel/vsyscall_gtod.c b/arch/x86/kernel/vsyscall_gtod.c
index f9c6e56e14b5..9531fbb123ba 100644
--- a/arch/x86/kernel/vsyscall_gtod.c
+++ b/arch/x86/kernel/vsyscall_gtod.c
@@ -43,7 +43,7 @@ void update_vsyscall(struct timekeeper *tk)
43 vdata->monotonic_time_sec = tk->xtime_sec 43 vdata->monotonic_time_sec = tk->xtime_sec
44 + tk->wall_to_monotonic.tv_sec; 44 + tk->wall_to_monotonic.tv_sec;
45 vdata->monotonic_time_snsec = tk->xtime_nsec 45 vdata->monotonic_time_snsec = tk->xtime_nsec
46 + (tk->wall_to_monotonic.tv_nsec 46 + ((u64)tk->wall_to_monotonic.tv_nsec
47 << tk->shift); 47 << tk->shift);
48 while (vdata->monotonic_time_snsec >= 48 while (vdata->monotonic_time_snsec >=
49 (((u64)NSEC_PER_SEC) << tk->shift)) { 49 (((u64)NSEC_PER_SEC) << tk->shift)) {
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index bea60671ef8a..f47a104a749c 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -308,7 +308,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
308 const u32 kvm_supported_word9_x86_features = 308 const u32 kvm_supported_word9_x86_features =
309 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | 309 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
310 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) | 310 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
311 F(ADX); 311 F(ADX) | F(SMAP);
312 312
313 /* all calls to cpuid_count() should be made on the same cpu */ 313 /* all calls to cpuid_count() should be made on the same cpu */
314 get_cpu(); 314 get_cpu();
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index a2a1bb7ed8c1..eeecbed26ac7 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -48,6 +48,14 @@ static inline bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
48 return best && (best->ebx & bit(X86_FEATURE_SMEP)); 48 return best && (best->ebx & bit(X86_FEATURE_SMEP));
49} 49}
50 50
51static inline bool guest_cpuid_has_smap(struct kvm_vcpu *vcpu)
52{
53 struct kvm_cpuid_entry2 *best;
54
55 best = kvm_find_cpuid_entry(vcpu, 7, 0);
56 return best && (best->ebx & bit(X86_FEATURE_SMAP));
57}
58
51static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu) 59static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
52{ 60{
53 struct kvm_cpuid_entry2 *best; 61 struct kvm_cpuid_entry2 *best;
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index f5704d9e5ddc..813d31038b93 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3601,20 +3601,27 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3601 } 3601 }
3602} 3602}
3603 3603
3604static void update_permission_bitmask(struct kvm_vcpu *vcpu, 3604void update_permission_bitmask(struct kvm_vcpu *vcpu,
3605 struct kvm_mmu *mmu, bool ept) 3605 struct kvm_mmu *mmu, bool ept)
3606{ 3606{
3607 unsigned bit, byte, pfec; 3607 unsigned bit, byte, pfec;
3608 u8 map; 3608 u8 map;
3609 bool fault, x, w, u, wf, uf, ff, smep; 3609 bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
3610 3610
3611 smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); 3611 cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3612 cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3612 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { 3613 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3613 pfec = byte << 1; 3614 pfec = byte << 1;
3614 map = 0; 3615 map = 0;
3615 wf = pfec & PFERR_WRITE_MASK; 3616 wf = pfec & PFERR_WRITE_MASK;
3616 uf = pfec & PFERR_USER_MASK; 3617 uf = pfec & PFERR_USER_MASK;
3617 ff = pfec & PFERR_FETCH_MASK; 3618 ff = pfec & PFERR_FETCH_MASK;
3619 /*
3620 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3621 * subject to SMAP restrictions, and cleared otherwise. The
3622 * bit is only meaningful if the SMAP bit is set in CR4.
3623 */
3624 smapf = !(pfec & PFERR_RSVD_MASK);
3618 for (bit = 0; bit < 8; ++bit) { 3625 for (bit = 0; bit < 8; ++bit) {
3619 x = bit & ACC_EXEC_MASK; 3626 x = bit & ACC_EXEC_MASK;
3620 w = bit & ACC_WRITE_MASK; 3627 w = bit & ACC_WRITE_MASK;
@@ -3626,12 +3633,33 @@ static void update_permission_bitmask(struct kvm_vcpu *vcpu,
3626 /* Allow supervisor writes if !cr0.wp */ 3633 /* Allow supervisor writes if !cr0.wp */
3627 w |= !is_write_protection(vcpu) && !uf; 3634 w |= !is_write_protection(vcpu) && !uf;
3628 /* Disallow supervisor fetches of user code if cr4.smep */ 3635 /* Disallow supervisor fetches of user code if cr4.smep */
3629 x &= !(smep && u && !uf); 3636 x &= !(cr4_smep && u && !uf);
3637
3638 /*
3639 * SMAP:kernel-mode data accesses from user-mode
3640 * mappings should fault. A fault is considered
3641 * as a SMAP violation if all of the following
3642 * conditions are ture:
3643 * - X86_CR4_SMAP is set in CR4
3644 * - An user page is accessed
3645 * - Page fault in kernel mode
3646 * - if CPL = 3 or X86_EFLAGS_AC is clear
3647 *
3648 * Here, we cover the first three conditions.
3649 * The fourth is computed dynamically in
3650 * permission_fault() and is in smapf.
3651 *
3652 * Also, SMAP does not affect instruction
3653 * fetches, add the !ff check here to make it
3654 * clearer.
3655 */
3656 smap = cr4_smap && u && !uf && !ff;
3630 } else 3657 } else
3631 /* Not really needed: no U/S accesses on ept */ 3658 /* Not really needed: no U/S accesses on ept */
3632 u = 1; 3659 u = 1;
3633 3660
3634 fault = (ff && !x) || (uf && !u) || (wf && !w); 3661 fault = (ff && !x) || (uf && !u) || (wf && !w) ||
3662 (smapf && smap);
3635 map |= fault << bit; 3663 map |= fault << bit;
3636 } 3664 }
3637 mmu->permissions[byte] = map; 3665 mmu->permissions[byte] = map;
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 292615274358..3842e70bdb7c 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -44,11 +44,17 @@
44#define PT_DIRECTORY_LEVEL 2 44#define PT_DIRECTORY_LEVEL 2
45#define PT_PAGE_TABLE_LEVEL 1 45#define PT_PAGE_TABLE_LEVEL 1
46 46
47#define PFERR_PRESENT_MASK (1U << 0) 47#define PFERR_PRESENT_BIT 0
48#define PFERR_WRITE_MASK (1U << 1) 48#define PFERR_WRITE_BIT 1
49#define PFERR_USER_MASK (1U << 2) 49#define PFERR_USER_BIT 2
50#define PFERR_RSVD_MASK (1U << 3) 50#define PFERR_RSVD_BIT 3
51#define PFERR_FETCH_MASK (1U << 4) 51#define PFERR_FETCH_BIT 4
52
53#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
54#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
55#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
56#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
57#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
52 58
53int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]); 59int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
54void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask); 60void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
@@ -73,6 +79,8 @@ int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct);
73void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context); 79void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);
74void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context, 80void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
75 bool execonly); 81 bool execonly);
82void update_permission_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
83 bool ept);
76 84
77static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm) 85static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm)
78{ 86{
@@ -110,10 +118,30 @@ static inline bool is_write_protection(struct kvm_vcpu *vcpu)
110 * Will a fault with a given page-fault error code (pfec) cause a permission 118 * Will a fault with a given page-fault error code (pfec) cause a permission
111 * fault with the given access (in ACC_* format)? 119 * fault with the given access (in ACC_* format)?
112 */ 120 */
113static inline bool permission_fault(struct kvm_mmu *mmu, unsigned pte_access, 121static inline bool permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
114 unsigned pfec) 122 unsigned pte_access, unsigned pfec)
115{ 123{
116 return (mmu->permissions[pfec >> 1] >> pte_access) & 1; 124 int cpl = kvm_x86_ops->get_cpl(vcpu);
125 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
126
127 /*
128 * If CPL < 3, SMAP prevention are disabled if EFLAGS.AC = 1.
129 *
130 * If CPL = 3, SMAP applies to all supervisor-mode data accesses
131 * (these are implicit supervisor accesses) regardless of the value
132 * of EFLAGS.AC.
133 *
134 * This computes (cpl < 3) && (rflags & X86_EFLAGS_AC), leaving
135 * the result in X86_EFLAGS_AC. We then insert it in place of
136 * the PFERR_RSVD_MASK bit; this bit will always be zero in pfec,
137 * but it will be one in index if SMAP checks are being overridden.
138 * It is important to keep this branchless.
139 */
140 unsigned long smap = (cpl - 3) & (rflags & X86_EFLAGS_AC);
141 int index = (pfec >> 1) +
142 (smap >> (X86_EFLAGS_AC_BIT - PFERR_RSVD_BIT + 1));
143
144 return (mmu->permissions[index] >> pte_access) & 1;
117} 145}
118 146
119void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm); 147void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm);
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index b1e6c1bf68d3..123efd3ec29f 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -353,7 +353,7 @@ retry_walk:
353 walker->ptes[walker->level - 1] = pte; 353 walker->ptes[walker->level - 1] = pte;
354 } while (!is_last_gpte(mmu, walker->level, pte)); 354 } while (!is_last_gpte(mmu, walker->level, pte));
355 355
356 if (unlikely(permission_fault(mmu, pte_access, access))) { 356 if (unlikely(permission_fault(vcpu, mmu, pte_access, access))) {
357 errcode |= PFERR_PRESENT_MASK; 357 errcode |= PFERR_PRESENT_MASK;
358 goto error; 358 goto error;
359 } 359 }
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 1320e0f8e611..33e8c028842f 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -503,7 +503,7 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
503 [number##_HIGH] = VMCS12_OFFSET(name)+4 503 [number##_HIGH] = VMCS12_OFFSET(name)+4
504 504
505 505
506static const unsigned long shadow_read_only_fields[] = { 506static unsigned long shadow_read_only_fields[] = {
507 /* 507 /*
508 * We do NOT shadow fields that are modified when L0 508 * We do NOT shadow fields that are modified when L0
509 * traps and emulates any vmx instruction (e.g. VMPTRLD, 509 * traps and emulates any vmx instruction (e.g. VMPTRLD,
@@ -526,10 +526,10 @@ static const unsigned long shadow_read_only_fields[] = {
526 GUEST_LINEAR_ADDRESS, 526 GUEST_LINEAR_ADDRESS,
527 GUEST_PHYSICAL_ADDRESS 527 GUEST_PHYSICAL_ADDRESS
528}; 528};
529static const int max_shadow_read_only_fields = 529static int max_shadow_read_only_fields =
530 ARRAY_SIZE(shadow_read_only_fields); 530 ARRAY_SIZE(shadow_read_only_fields);
531 531
532static const unsigned long shadow_read_write_fields[] = { 532static unsigned long shadow_read_write_fields[] = {
533 GUEST_RIP, 533 GUEST_RIP,
534 GUEST_RSP, 534 GUEST_RSP,
535 GUEST_CR0, 535 GUEST_CR0,
@@ -558,7 +558,7 @@ static const unsigned long shadow_read_write_fields[] = {
558 HOST_FS_SELECTOR, 558 HOST_FS_SELECTOR,
559 HOST_GS_SELECTOR 559 HOST_GS_SELECTOR
560}; 560};
561static const int max_shadow_read_write_fields = 561static int max_shadow_read_write_fields =
562 ARRAY_SIZE(shadow_read_write_fields); 562 ARRAY_SIZE(shadow_read_write_fields);
563 563
564static const unsigned short vmcs_field_to_offset_table[] = { 564static const unsigned short vmcs_field_to_offset_table[] = {
@@ -3009,6 +3009,41 @@ static void free_kvm_area(void)
3009 } 3009 }
3010} 3010}
3011 3011
3012static void init_vmcs_shadow_fields(void)
3013{
3014 int i, j;
3015
3016 /* No checks for read only fields yet */
3017
3018 for (i = j = 0; i < max_shadow_read_write_fields; i++) {
3019 switch (shadow_read_write_fields[i]) {
3020 case GUEST_BNDCFGS:
3021 if (!vmx_mpx_supported())
3022 continue;
3023 break;
3024 default:
3025 break;
3026 }
3027
3028 if (j < i)
3029 shadow_read_write_fields[j] =
3030 shadow_read_write_fields[i];
3031 j++;
3032 }
3033 max_shadow_read_write_fields = j;
3034
3035 /* shadowed fields guest access without vmexit */
3036 for (i = 0; i < max_shadow_read_write_fields; i++) {
3037 clear_bit(shadow_read_write_fields[i],
3038 vmx_vmwrite_bitmap);
3039 clear_bit(shadow_read_write_fields[i],
3040 vmx_vmread_bitmap);
3041 }
3042 for (i = 0; i < max_shadow_read_only_fields; i++)
3043 clear_bit(shadow_read_only_fields[i],
3044 vmx_vmread_bitmap);
3045}
3046
3012static __init int alloc_kvm_area(void) 3047static __init int alloc_kvm_area(void)
3013{ 3048{
3014 int cpu; 3049 int cpu;
@@ -3039,6 +3074,8 @@ static __init int hardware_setup(void)
3039 enable_vpid = 0; 3074 enable_vpid = 0;
3040 if (!cpu_has_vmx_shadow_vmcs()) 3075 if (!cpu_has_vmx_shadow_vmcs())
3041 enable_shadow_vmcs = 0; 3076 enable_shadow_vmcs = 0;
3077 if (enable_shadow_vmcs)
3078 init_vmcs_shadow_fields();
3042 3079
3043 if (!cpu_has_vmx_ept() || 3080 if (!cpu_has_vmx_ept() ||
3044 !cpu_has_vmx_ept_4levels()) { 3081 !cpu_has_vmx_ept_4levels()) {
@@ -3484,13 +3521,14 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
3484 hw_cr4 &= ~X86_CR4_PAE; 3521 hw_cr4 &= ~X86_CR4_PAE;
3485 hw_cr4 |= X86_CR4_PSE; 3522 hw_cr4 |= X86_CR4_PSE;
3486 /* 3523 /*
3487 * SMEP is disabled if CPU is in non-paging mode in 3524 * SMEP/SMAP is disabled if CPU is in non-paging mode
3488 * hardware. However KVM always uses paging mode to 3525 * in hardware. However KVM always uses paging mode to
3489 * emulate guest non-paging mode with TDP. 3526 * emulate guest non-paging mode with TDP.
3490 * To emulate this behavior, SMEP needs to be manually 3527 * To emulate this behavior, SMEP/SMAP needs to be
3491 * disabled when guest switches to non-paging mode. 3528 * manually disabled when guest switches to non-paging
3529 * mode.
3492 */ 3530 */
3493 hw_cr4 &= ~X86_CR4_SMEP; 3531 hw_cr4 &= ~(X86_CR4_SMEP | X86_CR4_SMAP);
3494 } else if (!(cr4 & X86_CR4_PAE)) { 3532 } else if (!(cr4 & X86_CR4_PAE)) {
3495 hw_cr4 &= ~X86_CR4_PAE; 3533 hw_cr4 &= ~X86_CR4_PAE;
3496 } 3534 }
@@ -8802,14 +8840,6 @@ static int __init vmx_init(void)
8802 8840
8803 memset(vmx_vmread_bitmap, 0xff, PAGE_SIZE); 8841 memset(vmx_vmread_bitmap, 0xff, PAGE_SIZE);
8804 memset(vmx_vmwrite_bitmap, 0xff, PAGE_SIZE); 8842 memset(vmx_vmwrite_bitmap, 0xff, PAGE_SIZE);
8805 /* shadowed read/write fields */
8806 for (i = 0; i < max_shadow_read_write_fields; i++) {
8807 clear_bit(shadow_read_write_fields[i], vmx_vmwrite_bitmap);
8808 clear_bit(shadow_read_write_fields[i], vmx_vmread_bitmap);
8809 }
8810 /* shadowed read only fields */
8811 for (i = 0; i < max_shadow_read_only_fields; i++)
8812 clear_bit(shadow_read_only_fields[i], vmx_vmread_bitmap);
8813 8843
8814 /* 8844 /*
8815 * Allow direct access to the PC debug port (it is often used for I/O 8845 * Allow direct access to the PC debug port (it is often used for I/O
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 9d1b5cd4d34c..b6c0bacca9bd 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -280,7 +280,7 @@ int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
280} 280}
281EXPORT_SYMBOL_GPL(kvm_set_apic_base); 281EXPORT_SYMBOL_GPL(kvm_set_apic_base);
282 282
283asmlinkage void kvm_spurious_fault(void) 283asmlinkage __visible void kvm_spurious_fault(void)
284{ 284{
285 /* Fault while not rebooting. We want the trace. */ 285 /* Fault while not rebooting. We want the trace. */
286 BUG(); 286 BUG();
@@ -652,6 +652,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
652 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP)) 652 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
653 return 1; 653 return 1;
654 654
655 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
656 return 1;
657
655 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE)) 658 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
656 return 1; 659 return 1;
657 660
@@ -680,6 +683,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
680 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE))) 683 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
681 kvm_mmu_reset_context(vcpu); 684 kvm_mmu_reset_context(vcpu);
682 685
686 if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
687 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
688
683 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE) 689 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
684 kvm_update_cpuid(vcpu); 690 kvm_update_cpuid(vcpu);
685 691
@@ -1117,7 +1123,6 @@ static inline u64 get_kernel_ns(void)
1117{ 1123{
1118 struct timespec ts; 1124 struct timespec ts;
1119 1125
1120 WARN_ON(preemptible());
1121 ktime_get_ts(&ts); 1126 ktime_get_ts(&ts);
1122 monotonic_to_bootbased(&ts); 1127 monotonic_to_bootbased(&ts);
1123 return timespec_to_ns(&ts); 1128 return timespec_to_ns(&ts);
@@ -4164,7 +4169,8 @@ static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4164 | (write ? PFERR_WRITE_MASK : 0); 4169 | (write ? PFERR_WRITE_MASK : 0);
4165 4170
4166 if (vcpu_match_mmio_gva(vcpu, gva) 4171 if (vcpu_match_mmio_gva(vcpu, gva)
4167 && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) { 4172 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4173 vcpu->arch.access, access)) {
4168 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT | 4174 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4169 (gva & (PAGE_SIZE - 1)); 4175 (gva & (PAGE_SIZE - 1));
4170 trace_vcpu_match_mmio(gva, *gpa, write, false); 4176 trace_vcpu_match_mmio(gva, *gpa, write, false);
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index ad1fb5f53925..aae94132bc24 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -233,13 +233,13 @@ static void lguest_end_context_switch(struct task_struct *next)
233 * flags word contains all kind of stuff, but in practice Linux only cares 233 * flags word contains all kind of stuff, but in practice Linux only cares
234 * about the interrupt flag. Our "save_flags()" just returns that. 234 * about the interrupt flag. Our "save_flags()" just returns that.
235 */ 235 */
236asmlinkage unsigned long lguest_save_fl(void) 236asmlinkage __visible unsigned long lguest_save_fl(void)
237{ 237{
238 return lguest_data.irq_enabled; 238 return lguest_data.irq_enabled;
239} 239}
240 240
241/* Interrupts go off... */ 241/* Interrupts go off... */
242asmlinkage void lguest_irq_disable(void) 242asmlinkage __visible void lguest_irq_disable(void)
243{ 243{
244 lguest_data.irq_enabled = 0; 244 lguest_data.irq_enabled = 0;
245} 245}
diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c
index db9db446b71a..43623739c7cf 100644
--- a/arch/x86/lib/msr.c
+++ b/arch/x86/lib/msr.c
@@ -76,7 +76,7 @@ static inline int __flip_bit(u32 msr, u8 bit, bool set)
76 if (m1.q == m.q) 76 if (m1.q == m.q)
77 return 0; 77 return 0;
78 78
79 err = msr_write(msr, &m); 79 err = msr_write(msr, &m1);
80 if (err) 80 if (err)
81 return err; 81 return err;
82 82
diff --git a/arch/x86/math-emu/errors.c b/arch/x86/math-emu/errors.c
index a5449089cd9f..9e6545f269e5 100644
--- a/arch/x86/math-emu/errors.c
+++ b/arch/x86/math-emu/errors.c
@@ -302,7 +302,7 @@ static struct {
302 0x242 in div_Xsig.S 302 0x242 in div_Xsig.S
303 */ 303 */
304 304
305asmlinkage void FPU_exception(int n) 305asmlinkage __visible void FPU_exception(int n)
306{ 306{
307 int i, int_type; 307 int i, int_type;
308 308
@@ -492,7 +492,7 @@ int real_2op_NaN(FPU_REG const *b, u_char tagb,
492 492
493/* Invalid arith operation on Valid registers */ 493/* Invalid arith operation on Valid registers */
494/* Returns < 0 if the exception is unmasked */ 494/* Returns < 0 if the exception is unmasked */
495asmlinkage int arith_invalid(int deststnr) 495asmlinkage __visible int arith_invalid(int deststnr)
496{ 496{
497 497
498 EXCEPTION(EX_Invalid); 498 EXCEPTION(EX_Invalid);
@@ -507,7 +507,7 @@ asmlinkage int arith_invalid(int deststnr)
507} 507}
508 508
509/* Divide a finite number by zero */ 509/* Divide a finite number by zero */
510asmlinkage int FPU_divide_by_zero(int deststnr, u_char sign) 510asmlinkage __visible int FPU_divide_by_zero(int deststnr, u_char sign)
511{ 511{
512 FPU_REG *dest = &st(deststnr); 512 FPU_REG *dest = &st(deststnr);
513 int tag = TAG_Valid; 513 int tag = TAG_Valid;
@@ -539,7 +539,7 @@ int set_precision_flag(int flags)
539} 539}
540 540
541/* This may be called often, so keep it lean */ 541/* This may be called often, so keep it lean */
542asmlinkage void set_precision_flag_up(void) 542asmlinkage __visible void set_precision_flag_up(void)
543{ 543{
544 if (control_word & CW_Precision) 544 if (control_word & CW_Precision)
545 partial_status |= (SW_Precision | SW_C1); /* The masked response */ 545 partial_status |= (SW_Precision | SW_C1); /* The masked response */
@@ -548,7 +548,7 @@ asmlinkage void set_precision_flag_up(void)
548} 548}
549 549
550/* This may be called often, so keep it lean */ 550/* This may be called often, so keep it lean */
551asmlinkage void set_precision_flag_down(void) 551asmlinkage __visible void set_precision_flag_down(void)
552{ 552{
553 if (control_word & CW_Precision) { /* The masked response */ 553 if (control_word & CW_Precision) { /* The masked response */
554 partial_status &= ~SW_C1; 554 partial_status &= ~SW_C1;
@@ -557,7 +557,7 @@ asmlinkage void set_precision_flag_down(void)
557 EXCEPTION(EX_Precision); 557 EXCEPTION(EX_Precision);
558} 558}
559 559
560asmlinkage int denormal_operand(void) 560asmlinkage __visible int denormal_operand(void)
561{ 561{
562 if (control_word & CW_Denormal) { /* The masked response */ 562 if (control_word & CW_Denormal) { /* The masked response */
563 partial_status |= SW_Denorm_Op; 563 partial_status |= SW_Denorm_Op;
@@ -568,7 +568,7 @@ asmlinkage int denormal_operand(void)
568 } 568 }
569} 569}
570 570
571asmlinkage int arith_overflow(FPU_REG *dest) 571asmlinkage __visible int arith_overflow(FPU_REG *dest)
572{ 572{
573 int tag = TAG_Valid; 573 int tag = TAG_Valid;
574 574
@@ -596,7 +596,7 @@ asmlinkage int arith_overflow(FPU_REG *dest)
596 596
597} 597}
598 598
599asmlinkage int arith_underflow(FPU_REG *dest) 599asmlinkage __visible int arith_underflow(FPU_REG *dest)
600{ 600{
601 int tag = TAG_Valid; 601 int tag = TAG_Valid;
602 602
diff --git a/arch/x86/platform/efi/early_printk.c b/arch/x86/platform/efi/early_printk.c
index 81b506d5befd..524142117296 100644
--- a/arch/x86/platform/efi/early_printk.c
+++ b/arch/x86/platform/efi/early_printk.c
@@ -14,48 +14,92 @@
14 14
15static const struct font_desc *font; 15static const struct font_desc *font;
16static u32 efi_x, efi_y; 16static u32 efi_x, efi_y;
17static void *efi_fb;
18static bool early_efi_keep;
17 19
18static __init void early_efi_clear_scanline(unsigned int y) 20/*
21 * efi earlyprintk need use early_ioremap to map the framebuffer.
22 * But early_ioremap is not usable for earlyprintk=efi,keep, ioremap should
23 * be used instead. ioremap will be available after paging_init() which is
24 * earlier than initcall callbacks. Thus adding this early initcall function
25 * early_efi_map_fb to map the whole efi framebuffer.
26 */
27static __init int early_efi_map_fb(void)
19{ 28{
20 unsigned long base, *dst; 29 unsigned long base, size;
21 u16 len; 30
31 if (!early_efi_keep)
32 return 0;
22 33
23 base = boot_params.screen_info.lfb_base; 34 base = boot_params.screen_info.lfb_base;
24 len = boot_params.screen_info.lfb_linelength; 35 size = boot_params.screen_info.lfb_size;
36 efi_fb = ioremap(base, size);
37
38 return efi_fb ? 0 : -ENOMEM;
39}
40early_initcall(early_efi_map_fb);
41
42/*
43 * early_efi_map maps efi framebuffer region [start, start + len -1]
44 * In case earlyprintk=efi,keep we have the whole framebuffer mapped already
45 * so just return the offset efi_fb + start.
46 */
47static __init_refok void *early_efi_map(unsigned long start, unsigned long len)
48{
49 unsigned long base;
50
51 base = boot_params.screen_info.lfb_base;
52
53 if (efi_fb)
54 return (efi_fb + start);
55 else
56 return early_ioremap(base + start, len);
57}
25 58
26 dst = early_ioremap(base + y*len, len); 59static __init_refok void early_efi_unmap(void *addr, unsigned long len)
60{
61 if (!efi_fb)
62 early_iounmap(addr, len);
63}
64
65static void early_efi_clear_scanline(unsigned int y)
66{
67 unsigned long *dst;
68 u16 len;
69
70 len = boot_params.screen_info.lfb_linelength;
71 dst = early_efi_map(y*len, len);
27 if (!dst) 72 if (!dst)
28 return; 73 return;
29 74
30 memset(dst, 0, len); 75 memset(dst, 0, len);
31 early_iounmap(dst, len); 76 early_efi_unmap(dst, len);
32} 77}
33 78
34static __init void early_efi_scroll_up(void) 79static void early_efi_scroll_up(void)
35{ 80{
36 unsigned long base, *dst, *src; 81 unsigned long *dst, *src;
37 u16 len; 82 u16 len;
38 u32 i, height; 83 u32 i, height;
39 84
40 base = boot_params.screen_info.lfb_base;
41 len = boot_params.screen_info.lfb_linelength; 85 len = boot_params.screen_info.lfb_linelength;
42 height = boot_params.screen_info.lfb_height; 86 height = boot_params.screen_info.lfb_height;
43 87
44 for (i = 0; i < height - font->height; i++) { 88 for (i = 0; i < height - font->height; i++) {
45 dst = early_ioremap(base + i*len, len); 89 dst = early_efi_map(i*len, len);
46 if (!dst) 90 if (!dst)
47 return; 91 return;
48 92
49 src = early_ioremap(base + (i + font->height) * len, len); 93 src = early_efi_map((i + font->height) * len, len);
50 if (!src) { 94 if (!src) {
51 early_iounmap(dst, len); 95 early_efi_unmap(dst, len);
52 return; 96 return;
53 } 97 }
54 98
55 memmove(dst, src, len); 99 memmove(dst, src, len);
56 100
57 early_iounmap(src, len); 101 early_efi_unmap(src, len);
58 early_iounmap(dst, len); 102 early_efi_unmap(dst, len);
59 } 103 }
60} 104}
61 105
@@ -79,16 +123,14 @@ static void early_efi_write_char(u32 *dst, unsigned char c, unsigned int h)
79 } 123 }
80} 124}
81 125
82static __init void 126static void
83early_efi_write(struct console *con, const char *str, unsigned int num) 127early_efi_write(struct console *con, const char *str, unsigned int num)
84{ 128{
85 struct screen_info *si; 129 struct screen_info *si;
86 unsigned long base;
87 unsigned int len; 130 unsigned int len;
88 const char *s; 131 const char *s;
89 void *dst; 132 void *dst;
90 133
91 base = boot_params.screen_info.lfb_base;
92 si = &boot_params.screen_info; 134 si = &boot_params.screen_info;
93 len = si->lfb_linelength; 135 len = si->lfb_linelength;
94 136
@@ -109,7 +151,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
109 for (h = 0; h < font->height; h++) { 151 for (h = 0; h < font->height; h++) {
110 unsigned int n, x; 152 unsigned int n, x;
111 153
112 dst = early_ioremap(base + (efi_y + h) * len, len); 154 dst = early_efi_map((efi_y + h) * len, len);
113 if (!dst) 155 if (!dst)
114 return; 156 return;
115 157
@@ -123,7 +165,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
123 s++; 165 s++;
124 } 166 }
125 167
126 early_iounmap(dst, len); 168 early_efi_unmap(dst, len);
127 } 169 }
128 170
129 num -= count; 171 num -= count;
@@ -179,6 +221,9 @@ static __init int early_efi_setup(struct console *con, char *options)
179 for (i = 0; i < (yres - efi_y) / font->height; i++) 221 for (i = 0; i < (yres - efi_y) / font->height; i++)
180 early_efi_scroll_up(); 222 early_efi_scroll_up();
181 223
224 /* early_console_register will unset CON_BOOT in case ,keep */
225 if (!(con->flags & CON_BOOT))
226 early_efi_keep = true;
182 return 0; 227 return 0;
183} 228}
184 229
diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c
index ff0174dda810..a9acde72d4ed 100644
--- a/arch/x86/platform/olpc/olpc-xo1-pm.c
+++ b/arch/x86/platform/olpc/olpc-xo1-pm.c
@@ -75,7 +75,7 @@ static int xo1_power_state_enter(suspend_state_t pm_state)
75 return 0; 75 return 0;
76} 76}
77 77
78asmlinkage int xo1_do_sleep(u8 sleep_state) 78asmlinkage __visible int xo1_do_sleep(u8 sleep_state)
79{ 79{
80 void *pgd_addr = __va(read_cr3()); 80 void *pgd_addr = __va(read_cr3());
81 81
diff --git a/arch/x86/power/hibernate_64.c b/arch/x86/power/hibernate_64.c
index 304fca20d96e..35e2bb6c0f37 100644
--- a/arch/x86/power/hibernate_64.c
+++ b/arch/x86/power/hibernate_64.c
@@ -23,7 +23,7 @@
23extern __visible const void __nosave_begin, __nosave_end; 23extern __visible const void __nosave_begin, __nosave_end;
24 24
25/* Defined in hibernate_asm_64.S */ 25/* Defined in hibernate_asm_64.S */
26extern asmlinkage int restore_image(void); 26extern asmlinkage __visible int restore_image(void);
27 27
28/* 28/*
29 * Address to jump to in the last phase of restore in order to get to the image 29 * Address to jump to in the last phase of restore in order to get to the image
diff --git a/arch/x86/syscalls/Makefile b/arch/x86/syscalls/Makefile
index f325af26107c..3323c2745248 100644
--- a/arch/x86/syscalls/Makefile
+++ b/arch/x86/syscalls/Makefile
@@ -54,5 +54,7 @@ syshdr-$(CONFIG_X86_64) += syscalls_64.h
54 54
55targets += $(uapisyshdr-y) $(syshdr-y) 55targets += $(uapisyshdr-y) $(syshdr-y)
56 56
57PHONY += all
57all: $(addprefix $(uapi)/,$(uapisyshdr-y)) 58all: $(addprefix $(uapi)/,$(uapisyshdr-y))
58all: $(addprefix $(out)/,$(syshdr-y)) 59all: $(addprefix $(out)/,$(syshdr-y))
60 @:
diff --git a/arch/x86/syscalls/syscall_32.tbl b/arch/x86/syscalls/syscall_32.tbl
index 96bc506ac6de..d6b867921612 100644
--- a/arch/x86/syscalls/syscall_32.tbl
+++ b/arch/x86/syscalls/syscall_32.tbl
@@ -359,3 +359,4 @@
359350 i386 finit_module sys_finit_module 359350 i386 finit_module sys_finit_module
360351 i386 sched_setattr sys_sched_setattr 360351 i386 sched_setattr sys_sched_setattr
361352 i386 sched_getattr sys_sched_getattr 361352 i386 sched_getattr sys_sched_getattr
362353 i386 renameat2 sys_renameat2
diff --git a/arch/x86/tools/Makefile b/arch/x86/tools/Makefile
index e8120346903b..604a37efd4d5 100644
--- a/arch/x86/tools/Makefile
+++ b/arch/x86/tools/Makefile
@@ -40,4 +40,6 @@ $(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/ina
40HOST_EXTRACFLAGS += -I$(srctree)/tools/include 40HOST_EXTRACFLAGS += -I$(srctree)/tools/include
41hostprogs-y += relocs 41hostprogs-y += relocs
42relocs-objs := relocs_32.o relocs_64.o relocs_common.o 42relocs-objs := relocs_32.o relocs_64.o relocs_common.o
43PHONY += relocs
43relocs: $(obj)/relocs 44relocs: $(obj)/relocs
45 @:
diff --git a/arch/x86/vdso/vdso-layout.lds.S b/arch/x86/vdso/vdso-layout.lds.S
index 2e263f367b13..9df017ab2285 100644
--- a/arch/x86/vdso/vdso-layout.lds.S
+++ b/arch/x86/vdso/vdso-layout.lds.S
@@ -9,12 +9,9 @@ SECTIONS
9#ifdef BUILD_VDSO32 9#ifdef BUILD_VDSO32
10#include <asm/vdso32.h> 10#include <asm/vdso32.h>
11 11
12 .hpet_sect : { 12 hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE);
13 hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE);
14 } :text :hpet_sect
15 13
16 .vvar_sect : { 14 vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE);
17 vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE);
18 15
19 /* Place all vvars at the offsets in asm/vvar.h. */ 16 /* Place all vvars at the offsets in asm/vvar.h. */
20#define EMIT_VVAR(name, offset) vvar_ ## name = vvar + offset; 17#define EMIT_VVAR(name, offset) vvar_ ## name = vvar + offset;
@@ -22,7 +19,6 @@ SECTIONS
22#include <asm/vvar.h> 19#include <asm/vvar.h>
23#undef __VVAR_KERNEL_LDS 20#undef __VVAR_KERNEL_LDS
24#undef EMIT_VVAR 21#undef EMIT_VVAR
25 } :text :vvar_sect
26#endif 22#endif
27 . = SIZEOF_HEADERS; 23 . = SIZEOF_HEADERS;
28 24
@@ -61,7 +57,12 @@ SECTIONS
61 */ 57 */
62 . = ALIGN(0x100); 58 . = ALIGN(0x100);
63 59
64 .text : { *(.text*) } :text =0x90909090 60 .text : { *(.text*) } :text =0x90909090,
61
62 /*
63 * The comma above works around a bug in gold:
64 * https://sourceware.org/bugzilla/show_bug.cgi?id=16804
65 */
65 66
66 /DISCARD/ : { 67 /DISCARD/ : {
67 *(.discard) 68 *(.discard)
@@ -84,8 +85,4 @@ PHDRS
84 dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ 85 dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
85 note PT_NOTE FLAGS(4); /* PF_R */ 86 note PT_NOTE FLAGS(4); /* PF_R */
86 eh_frame_hdr PT_GNU_EH_FRAME; 87 eh_frame_hdr PT_GNU_EH_FRAME;
87#ifdef BUILD_VDSO32
88 vvar_sect PT_NULL FLAGS(4); /* PF_R */
89 hpet_sect PT_NULL FLAGS(4); /* PF_R */
90#endif
91} 88}
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 201d09a7c46b..c34bfc4bbe7f 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1515,7 +1515,7 @@ static void __init xen_pvh_early_guest_init(void)
1515} 1515}
1516 1516
1517/* First C function to be called on Xen boot */ 1517/* First C function to be called on Xen boot */
1518asmlinkage void __init xen_start_kernel(void) 1518asmlinkage __visible void __init xen_start_kernel(void)
1519{ 1519{
1520 struct physdev_set_iopl set_iopl; 1520 struct physdev_set_iopl set_iopl;
1521 int rc; 1521 int rc;
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 08f763de26fe..a1207cb6472a 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -23,7 +23,7 @@ void xen_force_evtchn_callback(void)
23 (void)HYPERVISOR_xen_version(0, NULL); 23 (void)HYPERVISOR_xen_version(0, NULL);
24} 24}
25 25
26asmlinkage unsigned long xen_save_fl(void) 26asmlinkage __visible unsigned long xen_save_fl(void)
27{ 27{
28 struct vcpu_info *vcpu; 28 struct vcpu_info *vcpu;
29 unsigned long flags; 29 unsigned long flags;
@@ -63,7 +63,7 @@ __visible void xen_restore_fl(unsigned long flags)
63} 63}
64PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl); 64PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl);
65 65
66asmlinkage void xen_irq_disable(void) 66asmlinkage __visible void xen_irq_disable(void)
67{ 67{
68 /* There's a one instruction preempt window here. We need to 68 /* There's a one instruction preempt window here. We need to
69 make sure we're don't switch CPUs between getting the vcpu 69 make sure we're don't switch CPUs between getting the vcpu
@@ -74,7 +74,7 @@ asmlinkage void xen_irq_disable(void)
74} 74}
75PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable); 75PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
76 76
77asmlinkage void xen_irq_enable(void) 77asmlinkage __visible void xen_irq_enable(void)
78{ 78{
79 struct vcpu_info *vcpu; 79 struct vcpu_info *vcpu;
80 80
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index a18eadd8bb40..7005974c3ff3 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -441,10 +441,11 @@ static int xen_cpu_up(unsigned int cpu, struct task_struct *idle)
441 irq_ctx_init(cpu); 441 irq_ctx_init(cpu);
442#else 442#else
443 clear_tsk_thread_flag(idle, TIF_FORK); 443 clear_tsk_thread_flag(idle, TIF_FORK);
444#endif
444 per_cpu(kernel_stack, cpu) = 445 per_cpu(kernel_stack, cpu) =
445 (unsigned long)task_stack_page(idle) - 446 (unsigned long)task_stack_page(idle) -
446 KERNEL_STACK_OFFSET + THREAD_SIZE; 447 KERNEL_STACK_OFFSET + THREAD_SIZE;
447#endif 448
448 xen_setup_runstate_info(cpu); 449 xen_setup_runstate_info(cpu);
449 xen_setup_timer(cpu); 450 xen_setup_timer(cpu);
450 xen_init_lock_cpu(cpu); 451 xen_init_lock_cpu(cpu);
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index 4d3acc34a998..0ba5f3b967f0 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -274,7 +274,7 @@ void __init xen_init_spinlocks(void)
274 printk(KERN_DEBUG "xen: PV spinlocks disabled\n"); 274 printk(KERN_DEBUG "xen: PV spinlocks disabled\n");
275 return; 275 return;
276 } 276 }
277 277 printk(KERN_DEBUG "xen: PV spinlocks enabled\n");
278 pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(xen_lock_spinning); 278 pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(xen_lock_spinning);
279 pv_lock_ops.unlock_kick = xen_unlock_kick; 279 pv_lock_ops.unlock_kick = xen_unlock_kick;
280} 280}
@@ -290,6 +290,9 @@ static __init int xen_init_spinlocks_jump(void)
290 if (!xen_pvspin) 290 if (!xen_pvspin)
291 return 0; 291 return 0;
292 292
293 if (!xen_domain())
294 return 0;
295
293 static_key_slow_inc(&paravirt_ticketlocks_enabled); 296 static_key_slow_inc(&paravirt_ticketlocks_enabled);
294 return 0; 297 return 0;
295} 298}
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S
index 33ca6e42a4ca..fd92a64d748e 100644
--- a/arch/x86/xen/xen-asm_32.S
+++ b/arch/x86/xen/xen-asm_32.S
@@ -75,6 +75,17 @@ ENDPROC(xen_sysexit)
75 * stack state in whatever form its in, we keep things simple by only 75 * stack state in whatever form its in, we keep things simple by only
76 * using a single register which is pushed/popped on the stack. 76 * using a single register which is pushed/popped on the stack.
77 */ 77 */
78
79.macro POP_FS
801:
81 popw %fs
82.pushsection .fixup, "ax"
832: movw $0, (%esp)
84 jmp 1b
85.popsection
86 _ASM_EXTABLE(1b,2b)
87.endm
88
78ENTRY(xen_iret) 89ENTRY(xen_iret)
79 /* test eflags for special cases */ 90 /* test eflags for special cases */
80 testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp) 91 testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
@@ -83,15 +94,13 @@ ENTRY(xen_iret)
83 push %eax 94 push %eax
84 ESP_OFFSET=4 # bytes pushed onto stack 95 ESP_OFFSET=4 # bytes pushed onto stack
85 96
86 /* 97 /* Store vcpu_info pointer for easy access */
87 * Store vcpu_info pointer for easy access. Do it this way to
88 * avoid having to reload %fs
89 */
90#ifdef CONFIG_SMP 98#ifdef CONFIG_SMP
91 GET_THREAD_INFO(%eax) 99 pushw %fs
92 movl %ss:TI_cpu(%eax), %eax 100 movl $(__KERNEL_PERCPU), %eax
93 movl %ss:__per_cpu_offset(,%eax,4), %eax 101 movl %eax, %fs
94 mov %ss:xen_vcpu(%eax), %eax 102 movl %fs:xen_vcpu, %eax
103 POP_FS
95#else 104#else
96 movl %ss:xen_vcpu, %eax 105 movl %ss:xen_vcpu, %eax
97#endif 106#endif
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 02d6d29a63c1..3a617af60d46 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -14,6 +14,7 @@ config XTENSA
14 select GENERIC_PCI_IOMAP 14 select GENERIC_PCI_IOMAP
15 select ARCH_WANT_IPC_PARSE_VERSION 15 select ARCH_WANT_IPC_PARSE_VERSION
16 select ARCH_WANT_OPTIONAL_GPIOLIB 16 select ARCH_WANT_OPTIONAL_GPIOLIB
17 select BUILDTIME_EXTABLE_SORT
17 select CLONE_BACKWARDS 18 select CLONE_BACKWARDS
18 select IRQ_DOMAIN 19 select IRQ_DOMAIN
19 select HAVE_OPROFILE 20 select HAVE_OPROFILE
@@ -189,6 +190,24 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
189 190
190 If in doubt, say Y. 191 If in doubt, say Y.
191 192
193config HIGHMEM
194 bool "High Memory Support"
195 help
196 Linux can use the full amount of RAM in the system by
197 default. However, the default MMUv2 setup only maps the
198 lowermost 128 MB of memory linearly to the areas starting
199 at 0xd0000000 (cached) and 0xd8000000 (uncached).
200 When there are more than 128 MB memory in the system not
201 all of it can be "permanently mapped" by the kernel.
202 The physical memory that's not permanently mapped is called
203 "high memory".
204
205 If you are compiling a kernel which will never run on a
206 machine with more than 128 MB total physical RAM, answer
207 N here.
208
209 If unsure, say Y.
210
192endmenu 211endmenu
193 212
194config XTENSA_CALIBRATE_CCOUNT 213config XTENSA_CALIBRATE_CCOUNT
@@ -224,7 +243,6 @@ choice
224 243
225config XTENSA_PLATFORM_ISS 244config XTENSA_PLATFORM_ISS
226 bool "ISS" 245 bool "ISS"
227 depends on TTY
228 select XTENSA_CALIBRATE_CCOUNT 246 select XTENSA_CALIBRATE_CCOUNT
229 select SERIAL_CONSOLE 247 select SERIAL_CONSOLE
230 help 248 help
diff --git a/arch/xtensa/boot/dts/kc705.dts b/arch/xtensa/boot/dts/kc705.dts
new file mode 100644
index 000000000000..742a347be67a
--- /dev/null
+++ b/arch/xtensa/boot/dts/kc705.dts
@@ -0,0 +1,11 @@
1/dts-v1/;
2/include/ "xtfpga.dtsi"
3/include/ "xtfpga-flash-128m.dtsi"
4
5/ {
6 compatible = "cdns,xtensa-kc705";
7 memory@0 {
8 device_type = "memory";
9 reg = <0x00000000 0x08000000>;
10 };
11};
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi
new file mode 100644
index 000000000000..d3a88e029873
--- /dev/null
+++ b/arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi
@@ -0,0 +1,28 @@
1/ {
2 soc {
3 flash: flash@00000000 {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "cfi-flash";
7 reg = <0x00000000 0x08000000>;
8 bank-width = <2>;
9 device-width = <2>;
10 partition@0x0 {
11 label = "data";
12 reg = <0x00000000 0x06000000>;
13 };
14 partition@0x6000000 {
15 label = "boot loader area";
16 reg = <0x06000000 0x00800000>;
17 };
18 partition@0x6800000 {
19 label = "kernel image";
20 reg = <0x06800000 0x017e0000>;
21 };
22 partition@0x7fe0000 {
23 label = "boot environment";
24 reg = <0x07fe0000 0x00020000>;
25 };
26 };
27 };
28};
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
index e5703c7beeb6..1d97203c18e7 100644
--- a/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga-flash-16m.dtsi
@@ -1,26 +1,28 @@
1/ { 1/ {
2 flash: flash@f8000000 { 2 soc {
3 #address-cells = <1>; 3 flash: flash@08000000 {
4 #size-cells = <1>; 4 #address-cells = <1>;
5 compatible = "cfi-flash"; 5 #size-cells = <1>;
6 reg = <0xf8000000 0x01000000>; 6 compatible = "cfi-flash";
7 bank-width = <2>; 7 reg = <0x08000000 0x01000000>;
8 device-width = <2>; 8 bank-width = <2>;
9 partition@0x0 { 9 device-width = <2>;
10 label = "boot loader area"; 10 partition@0x0 {
11 reg = <0x00000000 0x00400000>; 11 label = "boot loader area";
12 reg = <0x00000000 0x00400000>;
13 };
14 partition@0x400000 {
15 label = "kernel image";
16 reg = <0x00400000 0x00600000>;
17 };
18 partition@0xa00000 {
19 label = "data";
20 reg = <0x00a00000 0x005e0000>;
21 };
22 partition@0xfe0000 {
23 label = "boot environment";
24 reg = <0x00fe0000 0x00020000>;
25 };
12 }; 26 };
13 partition@0x400000 { 27 };
14 label = "kernel image";
15 reg = <0x00400000 0x00600000>;
16 };
17 partition@0xa00000 {
18 label = "data";
19 reg = <0x00a00000 0x005e0000>;
20 };
21 partition@0xfe0000 {
22 label = "boot environment";
23 reg = <0x00fe0000 0x00020000>;
24 };
25 };
26}; 28};
diff --git a/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi b/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
index 6f9c10d6b689..d1c621ca8be1 100644
--- a/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga-flash-4m.dtsi
@@ -1,18 +1,20 @@
1/ { 1/ {
2 flash: flash@f8000000 { 2 soc {
3 #address-cells = <1>; 3 flash: flash@08000000 {
4 #size-cells = <1>; 4 #address-cells = <1>;
5 compatible = "cfi-flash"; 5 #size-cells = <1>;
6 reg = <0xf8000000 0x00400000>; 6 compatible = "cfi-flash";
7 bank-width = <2>; 7 reg = <0x08000000 0x00400000>;
8 device-width = <2>; 8 bank-width = <2>;
9 partition@0x0 { 9 device-width = <2>;
10 label = "boot loader area"; 10 partition@0x0 {
11 reg = <0x00000000 0x003f0000>; 11 label = "boot loader area";
12 reg = <0x00000000 0x003f0000>;
13 };
14 partition@0x3f0000 {
15 label = "boot environment";
16 reg = <0x003f0000 0x00010000>;
17 };
12 }; 18 };
13 partition@0x3f0000 { 19 };
14 label = "boot environment";
15 reg = <0x003f0000 0x00010000>;
16 };
17 };
18}; 20};
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index e7370b11348e..dec9178840f6 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -42,21 +42,28 @@
42 }; 42 };
43 }; 43 };
44 44
45 serial0: serial@fd050020 { 45 soc {
46 device_type = "serial"; 46 #address-cells = <1>;
47 compatible = "ns16550a"; 47 #size-cells = <1>;
48 no-loopback-test; 48 compatible = "simple-bus";
49 reg = <0xfd050020 0x20>; 49 ranges = <0x00000000 0xf0000000 0x10000000>;
50 reg-shift = <2>;
51 interrupts = <0 1>; /* external irq 0 */
52 clocks = <&osc>;
53 };
54 50
55 enet0: ethoc@fd030000 { 51 serial0: serial@0d050020 {
56 compatible = "opencores,ethoc"; 52 device_type = "serial";
57 reg = <0xfd030000 0x4000 0xfd800000 0x4000>; 53 compatible = "ns16550a";
58 interrupts = <1 1>; /* external irq 1 */ 54 no-loopback-test;
59 local-mac-address = [00 50 c2 13 6f 00]; 55 reg = <0x0d050020 0x20>;
60 clocks = <&osc>; 56 reg-shift = <2>;
57 interrupts = <0 1>; /* external irq 0 */
58 clocks = <&osc>;
59 };
60
61 enet0: ethoc@0d030000 {
62 compatible = "opencores,ethoc";
63 reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
64 interrupts = <1 1>; /* external irq 1 */
65 local-mac-address = [00 50 c2 13 6f 00];
66 clocks = <&osc>;
67 };
61 }; 68 };
62}; 69};
diff --git a/arch/xtensa/include/asm/bootparam.h b/arch/xtensa/include/asm/bootparam.h
index 23392c5630ce..892aab399ac8 100644
--- a/arch/xtensa/include/asm/bootparam.h
+++ b/arch/xtensa/include/asm/bootparam.h
@@ -37,23 +37,14 @@ typedef struct bp_tag {
37 unsigned long data[0]; /* data */ 37 unsigned long data[0]; /* data */
38} bp_tag_t; 38} bp_tag_t;
39 39
40typedef struct meminfo { 40struct bp_meminfo {
41 unsigned long type; 41 unsigned long type;
42 unsigned long start; 42 unsigned long start;
43 unsigned long end; 43 unsigned long end;
44} meminfo_t; 44};
45
46#define SYSMEM_BANKS_MAX 5
47 45
48#define MEMORY_TYPE_CONVENTIONAL 0x1000 46#define MEMORY_TYPE_CONVENTIONAL 0x1000
49#define MEMORY_TYPE_NONE 0x2000 47#define MEMORY_TYPE_NONE 0x2000
50 48
51typedef struct sysmem_info {
52 int nr_banks;
53 meminfo_t bank[SYSMEM_BANKS_MAX];
54} sysmem_info_t;
55
56extern sysmem_info_t sysmem;
57
58#endif 49#endif
59#endif 50#endif
diff --git a/arch/xtensa/include/asm/fixmap.h b/arch/xtensa/include/asm/fixmap.h
new file mode 100644
index 000000000000..9f6c33d0428a
--- /dev/null
+++ b/arch/xtensa/include/asm/fixmap.h
@@ -0,0 +1,58 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 */
12
13#ifndef _ASM_FIXMAP_H
14#define _ASM_FIXMAP_H
15
16#include <asm/pgtable.h>
17#ifdef CONFIG_HIGHMEM
18#include <linux/threads.h>
19#include <asm/kmap_types.h>
20#endif
21
22/*
23 * Here we define all the compile-time 'special' virtual
24 * addresses. The point is to have a constant address at
25 * compile time, but to set the physical address only
26 * in the boot process. We allocate these special addresses
27 * from the end of the consistent memory region backwards.
28 * Also this lets us do fail-safe vmalloc(), we
29 * can guarantee that these special addresses and
30 * vmalloc()-ed addresses never overlap.
31 *
32 * these 'compile-time allocated' memory buffers are
33 * fixed-size 4k pages. (or larger if used with an increment
34 * higher than 1) use fixmap_set(idx,phys) to associate
35 * physical memory with fixmap indices.
36 */
37enum fixed_addresses {
38#ifdef CONFIG_HIGHMEM
39 /* reserved pte's for temporary kernel mappings */
40 FIX_KMAP_BEGIN,
41 FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1,
42#endif
43 __end_of_fixed_addresses
44};
45
46#define FIXADDR_TOP (VMALLOC_START - PAGE_SIZE)
47#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
48#define FIXADDR_START ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK)
49
50#include <asm-generic/fixmap.h>
51
52#define kmap_get_fixmap_pte(vaddr) \
53 pte_offset_kernel( \
54 pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), \
55 (vaddr) \
56 )
57
58#endif
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 80be15124697..2653ef5d55f1 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -6,11 +6,54 @@
6 * this archive for more details. 6 * this archive for more details.
7 * 7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc. 8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 * Copyright (C) 2014 Cadence Design Systems Inc.
9 */ 10 */
10 11
11#ifndef _XTENSA_HIGHMEM_H 12#ifndef _XTENSA_HIGHMEM_H
12#define _XTENSA_HIGHMEM_H 13#define _XTENSA_HIGHMEM_H
13 14
14extern void flush_cache_kmaps(void); 15#include <asm/cacheflush.h>
16#include <asm/fixmap.h>
17#include <asm/kmap_types.h>
18#include <asm/pgtable.h>
19
20#define PKMAP_BASE (FIXADDR_START - PMD_SIZE)
21#define LAST_PKMAP PTRS_PER_PTE
22#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
23#define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT)
24#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
25
26#define kmap_prot PAGE_KERNEL
27
28extern pte_t *pkmap_page_table;
29
30void *kmap_high(struct page *page);
31void kunmap_high(struct page *page);
32
33static inline void *kmap(struct page *page)
34{
35 BUG_ON(in_interrupt());
36 if (!PageHighMem(page))
37 return page_address(page);
38 return kmap_high(page);
39}
40
41static inline void kunmap(struct page *page)
42{
43 BUG_ON(in_interrupt());
44 if (!PageHighMem(page))
45 return;
46 kunmap_high(page);
47}
48
49static inline void flush_cache_kmaps(void)
50{
51 flush_cache_all();
52}
53
54void *kmap_atomic(struct page *page);
55void __kunmap_atomic(void *kvaddr);
56
57void kmap_init(void);
15 58
16#endif 59#endif
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index 216446295ada..4b0ca35a93b1 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -310,6 +310,10 @@ set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
310 update_pte(ptep, pteval); 310 update_pte(ptep, pteval);
311} 311}
312 312
313static inline void set_pte(pte_t *ptep, pte_t pteval)
314{
315 update_pte(ptep, pteval);
316}
313 317
314static inline void 318static inline void
315set_pmd(pmd_t *pmdp, pmd_t pmdval) 319set_pmd(pmd_t *pmdp, pmd_t pmdval)
diff --git a/arch/xtensa/include/asm/sysmem.h b/arch/xtensa/include/asm/sysmem.h
new file mode 100644
index 000000000000..c015c5c8e3f7
--- /dev/null
+++ b/arch/xtensa/include/asm/sysmem.h
@@ -0,0 +1,38 @@
1/*
2 * sysmem-related prototypes.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2014 Cadence Design Systems Inc.
9 */
10
11#ifndef _XTENSA_SYSMEM_H
12#define _XTENSA_SYSMEM_H
13
14#define SYSMEM_BANKS_MAX 31
15
16struct meminfo {
17 unsigned long start;
18 unsigned long end;
19};
20
21/*
22 * Bank array is sorted by .start.
23 * Banks don't overlap and there's at least one page gap
24 * between adjacent bank entries.
25 */
26struct sysmem_info {
27 int nr_banks;
28 struct meminfo bank[SYSMEM_BANKS_MAX];
29};
30
31extern struct sysmem_info sysmem;
32
33int add_sysmem_bank(unsigned long start, unsigned long end);
34int mem_reserve(unsigned long, unsigned long, int);
35void bootmem_init(void);
36void zones_init(void);
37
38#endif /* _XTENSA_SYSMEM_H */
diff --git a/arch/xtensa/include/asm/tlbflush.h b/arch/xtensa/include/asm/tlbflush.h
index fc34274ce41b..06875feb27c2 100644
--- a/arch/xtensa/include/asm/tlbflush.h
+++ b/arch/xtensa/include/asm/tlbflush.h
@@ -36,6 +36,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma,
36 unsigned long page); 36 unsigned long page);
37void local_flush_tlb_range(struct vm_area_struct *vma, 37void local_flush_tlb_range(struct vm_area_struct *vma,
38 unsigned long start, unsigned long end); 38 unsigned long start, unsigned long end);
39void local_flush_tlb_kernel_range(unsigned long start, unsigned long end);
39 40
40#ifdef CONFIG_SMP 41#ifdef CONFIG_SMP
41 42
@@ -44,12 +45,7 @@ void flush_tlb_mm(struct mm_struct *);
44void flush_tlb_page(struct vm_area_struct *, unsigned long); 45void flush_tlb_page(struct vm_area_struct *, unsigned long);
45void flush_tlb_range(struct vm_area_struct *, unsigned long, 46void flush_tlb_range(struct vm_area_struct *, unsigned long,
46 unsigned long); 47 unsigned long);
47 48void flush_tlb_kernel_range(unsigned long start, unsigned long end);
48static inline void flush_tlb_kernel_range(unsigned long start,
49 unsigned long end)
50{
51 flush_tlb_all();
52}
53 49
54#else /* !CONFIG_SMP */ 50#else /* !CONFIG_SMP */
55 51
@@ -58,7 +54,8 @@ static inline void flush_tlb_kernel_range(unsigned long start,
58#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) 54#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
59#define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, \ 55#define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, \
60 end) 56 end)
61#define flush_tlb_kernel_range(start, end) local_flush_tlb_all() 57#define flush_tlb_kernel_range(start, end) local_flush_tlb_kernel_range(start, \
58 end)
62 59
63#endif /* CONFIG_SMP */ 60#endif /* CONFIG_SMP */
64 61
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 84fe931bb60e..9757bb74e532 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -50,6 +50,7 @@
50#include <asm/param.h> 50#include <asm/param.h>
51#include <asm/traps.h> 51#include <asm/traps.h>
52#include <asm/smp.h> 52#include <asm/smp.h>
53#include <asm/sysmem.h>
53 54
54#include <platform/hardware.h> 55#include <platform/hardware.h>
55 56
@@ -88,12 +89,6 @@ static char __initdata command_line[COMMAND_LINE_SIZE];
88static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; 89static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
89#endif 90#endif
90 91
91sysmem_info_t __initdata sysmem;
92
93extern int mem_reserve(unsigned long, unsigned long, int);
94extern void bootmem_init(void);
95extern void zones_init(void);
96
97/* 92/*
98 * Boot parameter parsing. 93 * Boot parameter parsing.
99 * 94 *
@@ -113,31 +108,14 @@ typedef struct tagtable {
113 108
114/* parse current tag */ 109/* parse current tag */
115 110
116static int __init add_sysmem_bank(unsigned long type, unsigned long start,
117 unsigned long end)
118{
119 if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
120 printk(KERN_WARNING
121 "Ignoring memory bank 0x%08lx size %ldKB\n",
122 start, end - start);
123 return -EINVAL;
124 }
125 sysmem.bank[sysmem.nr_banks].type = type;
126 sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(start);
127 sysmem.bank[sysmem.nr_banks].end = end & PAGE_MASK;
128 sysmem.nr_banks++;
129
130 return 0;
131}
132
133static int __init parse_tag_mem(const bp_tag_t *tag) 111static int __init parse_tag_mem(const bp_tag_t *tag)
134{ 112{
135 meminfo_t *mi = (meminfo_t *)(tag->data); 113 struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
136 114
137 if (mi->type != MEMORY_TYPE_CONVENTIONAL) 115 if (mi->type != MEMORY_TYPE_CONVENTIONAL)
138 return -1; 116 return -1;
139 117
140 return add_sysmem_bank(mi->type, mi->start, mi->end); 118 return add_sysmem_bank(mi->start, mi->end);
141} 119}
142 120
143__tagtable(BP_TAG_MEMORY, parse_tag_mem); 121__tagtable(BP_TAG_MEMORY, parse_tag_mem);
@@ -146,8 +124,8 @@ __tagtable(BP_TAG_MEMORY, parse_tag_mem);
146 124
147static int __init parse_tag_initrd(const bp_tag_t* tag) 125static int __init parse_tag_initrd(const bp_tag_t* tag)
148{ 126{
149 meminfo_t* mi; 127 struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
150 mi = (meminfo_t*)(tag->data); 128
151 initrd_start = (unsigned long)__va(mi->start); 129 initrd_start = (unsigned long)__va(mi->start);
152 initrd_end = (unsigned long)__va(mi->end); 130 initrd_end = (unsigned long)__va(mi->end);
153 131
@@ -255,7 +233,7 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
255 return; 233 return;
256 234
257 size &= PAGE_MASK; 235 size &= PAGE_MASK;
258 add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size); 236 add_sysmem_bank(base, base + size);
259} 237}
260 238
261void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) 239void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
@@ -292,8 +270,6 @@ device_initcall(xtensa_device_probe);
292 270
293void __init init_arch(bp_tag_t *bp_start) 271void __init init_arch(bp_tag_t *bp_start)
294{ 272{
295 sysmem.nr_banks = 0;
296
297 /* Parse boot parameters */ 273 /* Parse boot parameters */
298 274
299 if (bp_start) 275 if (bp_start)
@@ -304,10 +280,9 @@ void __init init_arch(bp_tag_t *bp_start)
304#endif 280#endif
305 281
306 if (sysmem.nr_banks == 0) { 282 if (sysmem.nr_banks == 0) {
307 sysmem.nr_banks = 1; 283 add_sysmem_bank(PLATFORM_DEFAULT_MEM_START,
308 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START; 284 PLATFORM_DEFAULT_MEM_START +
309 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START 285 PLATFORM_DEFAULT_MEM_SIZE);
310 + PLATFORM_DEFAULT_MEM_SIZE;
311 } 286 }
312 287
313#ifdef CONFIG_CMDLINE_BOOL 288#ifdef CONFIG_CMDLINE_BOOL
@@ -487,7 +462,7 @@ void __init setup_arch(char **cmdline_p)
487#ifdef CONFIG_BLK_DEV_INITRD 462#ifdef CONFIG_BLK_DEV_INITRD
488 if (initrd_start < initrd_end) { 463 if (initrd_start < initrd_end) {
489 initrd_is_mapped = mem_reserve(__pa(initrd_start), 464 initrd_is_mapped = mem_reserve(__pa(initrd_start),
490 __pa(initrd_end), 0); 465 __pa(initrd_end), 0) == 0;
491 initrd_below_start_ok = 1; 466 initrd_below_start_ok = 1;
492 } else { 467 } else {
493 initrd_start = 0; 468 initrd_start = 0;
@@ -532,6 +507,7 @@ void __init setup_arch(char **cmdline_p)
532 __pa(&_Level6InterruptVector_text_end), 0); 507 __pa(&_Level6InterruptVector_text_end), 0);
533#endif 508#endif
534 509
510 parse_early_param();
535 bootmem_init(); 511 bootmem_init();
536 512
537 unflatten_and_copy_device_tree(); 513 unflatten_and_copy_device_tree();
diff --git a/arch/xtensa/kernel/smp.c b/arch/xtensa/kernel/smp.c
index aa8bd8717927..40b5a3771fb0 100644
--- a/arch/xtensa/kernel/smp.c
+++ b/arch/xtensa/kernel/smp.c
@@ -496,6 +496,21 @@ void flush_tlb_range(struct vm_area_struct *vma,
496 on_each_cpu(ipi_flush_tlb_range, &fd, 1); 496 on_each_cpu(ipi_flush_tlb_range, &fd, 1);
497} 497}
498 498
499static void ipi_flush_tlb_kernel_range(void *arg)
500{
501 struct flush_data *fd = arg;
502 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
503}
504
505void flush_tlb_kernel_range(unsigned long start, unsigned long end)
506{
507 struct flush_data fd = {
508 .addr1 = start,
509 .addr2 = end,
510 };
511 on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
512}
513
499/* Cache flush functions */ 514/* Cache flush functions */
500 515
501static void ipi_flush_cache_all(void *arg) 516static void ipi_flush_cache_all(void *arg)
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 80b33ed51f31..4d2872fd9bb5 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -20,6 +20,7 @@
20#include <linux/in6.h> 20#include <linux/in6.h>
21 21
22#include <asm/uaccess.h> 22#include <asm/uaccess.h>
23#include <asm/cacheflush.h>
23#include <asm/checksum.h> 24#include <asm/checksum.h>
24#include <asm/dma.h> 25#include <asm/dma.h>
25#include <asm/io.h> 26#include <asm/io.h>
@@ -105,6 +106,7 @@ EXPORT_SYMBOL(csum_partial_copy_generic);
105 * Architecture-specific symbols 106 * Architecture-specific symbols
106 */ 107 */
107EXPORT_SYMBOL(__xtensa_copy_user); 108EXPORT_SYMBOL(__xtensa_copy_user);
109EXPORT_SYMBOL(__invalidate_icache_range);
108 110
109/* 111/*
110 * Kernel hacking ... 112 * Kernel hacking ...
@@ -127,3 +129,8 @@ EXPORT_SYMBOL(common_exception_return);
127#ifdef CONFIG_FUNCTION_TRACER 129#ifdef CONFIG_FUNCTION_TRACER
128EXPORT_SYMBOL(_mcount); 130EXPORT_SYMBOL(_mcount);
129#endif 131#endif
132
133EXPORT_SYMBOL(__invalidate_dcache_range);
134#if XCHAL_DCACHE_IS_WRITEBACK
135EXPORT_SYMBOL(__flush_dcache_range);
136#endif
diff --git a/arch/xtensa/mm/Makefile b/arch/xtensa/mm/Makefile
index f0b646d2f843..f54f78e24d7b 100644
--- a/arch/xtensa/mm/Makefile
+++ b/arch/xtensa/mm/Makefile
@@ -4,3 +4,4 @@
4 4
5obj-y := init.o cache.o misc.o 5obj-y := init.o cache.o misc.o
6obj-$(CONFIG_MMU) += fault.o mmu.o tlb.o 6obj-$(CONFIG_MMU) += fault.o mmu.o tlb.o
7obj-$(CONFIG_HIGHMEM) += highmem.o
diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c
index ba4c47f291b1..63cbb867dadd 100644
--- a/arch/xtensa/mm/cache.c
+++ b/arch/xtensa/mm/cache.c
@@ -59,6 +59,10 @@
59 * 59 *
60 */ 60 */
61 61
62#if (DCACHE_WAY_SIZE > PAGE_SIZE) && defined(CONFIG_HIGHMEM)
63#error "HIGHMEM is not supported on cores with aliasing cache."
64#endif
65
62#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK 66#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
63 67
64/* 68/*
@@ -179,10 +183,11 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
179#else 183#else
180 if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags) 184 if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)
181 && (vma->vm_flags & VM_EXEC) != 0) { 185 && (vma->vm_flags & VM_EXEC) != 0) {
182 unsigned long paddr = (unsigned long) page_address(page); 186 unsigned long paddr = (unsigned long)kmap_atomic(page);
183 __flush_dcache_page(paddr); 187 __flush_dcache_page(paddr);
184 __invalidate_icache_page(paddr); 188 __invalidate_icache_page(paddr);
185 set_bit(PG_arch_1, &page->flags); 189 set_bit(PG_arch_1, &page->flags);
190 kunmap_atomic((void *)paddr);
186 } 191 }
187#endif 192#endif
188} 193}
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
new file mode 100644
index 000000000000..17a8c0d6fd17
--- /dev/null
+++ b/arch/xtensa/mm/highmem.c
@@ -0,0 +1,72 @@
1/*
2 * High memory support for Xtensa architecture
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2014 Cadence Design Systems Inc.
9 */
10
11#include <linux/export.h>
12#include <linux/highmem.h>
13#include <asm/tlbflush.h>
14
15static pte_t *kmap_pte;
16
17void *kmap_atomic(struct page *page)
18{
19 enum fixed_addresses idx;
20 unsigned long vaddr;
21 int type;
22
23 pagefault_disable();
24 if (!PageHighMem(page))
25 return page_address(page);
26
27 type = kmap_atomic_idx_push();
28 idx = type + KM_TYPE_NR * smp_processor_id();
29 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
30#ifdef CONFIG_DEBUG_HIGHMEM
31 BUG_ON(!pte_none(*(kmap_pte - idx)));
32#endif
33 set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL_EXEC));
34
35 return (void *)vaddr;
36}
37EXPORT_SYMBOL(kmap_atomic);
38
39void __kunmap_atomic(void *kvaddr)
40{
41 int idx, type;
42
43 if (kvaddr >= (void *)FIXADDR_START &&
44 kvaddr < (void *)FIXADDR_TOP) {
45 type = kmap_atomic_idx();
46 idx = type + KM_TYPE_NR * smp_processor_id();
47
48 /*
49 * Force other mappings to Oops if they'll try to access this
50 * pte without first remap it. Keeping stale mappings around
51 * is a bad idea also, in case the page changes cacheability
52 * attributes or becomes a protected page in a hypervisor.
53 */
54 pte_clear(&init_mm, kvaddr, kmap_pte - idx);
55 local_flush_tlb_kernel_range((unsigned long)kvaddr,
56 (unsigned long)kvaddr + PAGE_SIZE);
57
58 kmap_atomic_idx_pop();
59 }
60
61 pagefault_enable();
62}
63EXPORT_SYMBOL(__kunmap_atomic);
64
65void __init kmap_init(void)
66{
67 unsigned long kmap_vstart;
68
69 /* cache the first kmap pte */
70 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
71 kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
72}
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index aff108df92d3..4224256bb215 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -8,6 +8,7 @@
8 * for more details. 8 * for more details.
9 * 9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc. 10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 * Copyright (C) 2014 Cadence Design Systems Inc.
11 * 12 *
12 * Chris Zankel <chris@zankel.net> 13 * Chris Zankel <chris@zankel.net>
13 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 14 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
@@ -19,6 +20,7 @@
19#include <linux/errno.h> 20#include <linux/errno.h>
20#include <linux/bootmem.h> 21#include <linux/bootmem.h>
21#include <linux/gfp.h> 22#include <linux/gfp.h>
23#include <linux/highmem.h>
22#include <linux/swap.h> 24#include <linux/swap.h>
23#include <linux/mman.h> 25#include <linux/mman.h>
24#include <linux/nodemask.h> 26#include <linux/nodemask.h>
@@ -27,11 +29,133 @@
27#include <asm/bootparam.h> 29#include <asm/bootparam.h>
28#include <asm/page.h> 30#include <asm/page.h>
29#include <asm/sections.h> 31#include <asm/sections.h>
32#include <asm/sysmem.h>
33
34struct sysmem_info sysmem __initdata;
35
36static void __init sysmem_dump(void)
37{
38 unsigned i;
39
40 pr_debug("Sysmem:\n");
41 for (i = 0; i < sysmem.nr_banks; ++i)
42 pr_debug(" 0x%08lx - 0x%08lx (%ldK)\n",
43 sysmem.bank[i].start, sysmem.bank[i].end,
44 (sysmem.bank[i].end - sysmem.bank[i].start) >> 10);
45}
46
47/*
48 * Find bank with maximal .start such that bank.start <= start
49 */
50static inline struct meminfo * __init find_bank(unsigned long start)
51{
52 unsigned i;
53 struct meminfo *it = NULL;
54
55 for (i = 0; i < sysmem.nr_banks; ++i)
56 if (sysmem.bank[i].start <= start)
57 it = sysmem.bank + i;
58 else
59 break;
60 return it;
61}
62
63/*
64 * Move all memory banks starting at 'from' to a new place at 'to',
65 * adjust nr_banks accordingly.
66 * Both 'from' and 'to' must be inside the sysmem.bank.
67 *
68 * Returns: 0 (success), -ENOMEM (not enough space in the sysmem.bank).
69 */
70static int __init move_banks(struct meminfo *to, struct meminfo *from)
71{
72 unsigned n = sysmem.nr_banks - (from - sysmem.bank);
73
74 if (to > from && to - from + sysmem.nr_banks > SYSMEM_BANKS_MAX)
75 return -ENOMEM;
76 if (to != from)
77 memmove(to, from, n * sizeof(struct meminfo));
78 sysmem.nr_banks += to - from;
79 return 0;
80}
81
82/*
83 * Add new bank to sysmem. Resulting sysmem is the union of bytes of the
84 * original sysmem and the new bank.
85 *
86 * Returns: 0 (success), < 0 (error)
87 */
88int __init add_sysmem_bank(unsigned long start, unsigned long end)
89{
90 unsigned i;
91 struct meminfo *it = NULL;
92 unsigned long sz;
93 unsigned long bank_sz = 0;
94
95 if (start == end ||
96 (start < end) != (PAGE_ALIGN(start) < (end & PAGE_MASK))) {
97 pr_warn("Ignoring small memory bank 0x%08lx size: %ld bytes\n",
98 start, end - start);
99 return -EINVAL;
100 }
101
102 start = PAGE_ALIGN(start);
103 end &= PAGE_MASK;
104 sz = end - start;
105
106 it = find_bank(start);
107
108 if (it)
109 bank_sz = it->end - it->start;
110
111 if (it && bank_sz >= start - it->start) {
112 if (end - it->start > bank_sz)
113 it->end = end;
114 else
115 return 0;
116 } else {
117 if (!it)
118 it = sysmem.bank;
119 else
120 ++it;
121
122 if (it - sysmem.bank < sysmem.nr_banks &&
123 it->start - start <= sz) {
124 it->start = start;
125 if (it->end - it->start < sz)
126 it->end = end;
127 else
128 return 0;
129 } else {
130 if (move_banks(it + 1, it) < 0) {
131 pr_warn("Ignoring memory bank 0x%08lx size %ld bytes\n",
132 start, end - start);
133 return -EINVAL;
134 }
135 it->start = start;
136 it->end = end;
137 return 0;
138 }
139 }
140 sz = it->end - it->start;
141 for (i = it + 1 - sysmem.bank; i < sysmem.nr_banks; ++i)
142 if (sysmem.bank[i].start - it->start <= sz) {
143 if (sz < sysmem.bank[i].end - it->start)
144 it->end = sysmem.bank[i].end;
145 } else {
146 break;
147 }
148
149 move_banks(it + 1, sysmem.bank + i);
150 return 0;
151}
30 152
31/* 153/*
32 * mem_reserve(start, end, must_exist) 154 * mem_reserve(start, end, must_exist)
33 * 155 *
34 * Reserve some memory from the memory pool. 156 * Reserve some memory from the memory pool.
157 * If must_exist is set and a part of the region being reserved does not exist
158 * memory map is not altered.
35 * 159 *
36 * Parameters: 160 * Parameters:
37 * start Start of region, 161 * start Start of region,
@@ -39,53 +163,69 @@
39 * must_exist Must exist in memory pool. 163 * must_exist Must exist in memory pool.
40 * 164 *
41 * Returns: 165 * Returns:
42 * 0 (memory area couldn't be mapped) 166 * 0 (success)
43 * -1 (success) 167 * < 0 (error)
44 */ 168 */
45 169
46int __init mem_reserve(unsigned long start, unsigned long end, int must_exist) 170int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
47{ 171{
48 int i; 172 struct meminfo *it;
49 173 struct meminfo *rm = NULL;
50 if (start == end) 174 unsigned long sz;
51 return 0; 175 unsigned long bank_sz = 0;
52 176
53 start = start & PAGE_MASK; 177 start = start & PAGE_MASK;
54 end = PAGE_ALIGN(end); 178 end = PAGE_ALIGN(end);
179 sz = end - start;
180 if (!sz)
181 return -EINVAL;
55 182
56 for (i = 0; i < sysmem.nr_banks; i++) 183 it = find_bank(start);
57 if (start < sysmem.bank[i].end 184
58 && end >= sysmem.bank[i].start) 185 if (it)
59 break; 186 bank_sz = it->end - it->start;
60 187
61 if (i == sysmem.nr_banks) { 188 if ((!it || end - it->start > bank_sz) && must_exist) {
62 if (must_exist) 189 pr_warn("mem_reserve: [0x%0lx, 0x%0lx) not in any region!\n",
63 printk (KERN_WARNING "mem_reserve: [0x%0lx, 0x%0lx) " 190 start, end);
64 "not in any region!\n", start, end); 191 return -EINVAL;
65 return 0;
66 } 192 }
67 193
68 if (start > sysmem.bank[i].start) { 194 if (it && start - it->start < bank_sz) {
69 if (end < sysmem.bank[i].end) { 195 if (start == it->start) {
70 /* split entry */ 196 if (end - it->start < bank_sz) {
71 if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) 197 it->start = end;
72 panic("meminfo overflow\n"); 198 return 0;
73 sysmem.bank[sysmem.nr_banks].start = end; 199 } else {
74 sysmem.bank[sysmem.nr_banks].end = sysmem.bank[i].end; 200 rm = it;
75 sysmem.nr_banks++; 201 }
202 } else {
203 it->end = start;
204 if (end - it->start < bank_sz)
205 return add_sysmem_bank(end,
206 it->start + bank_sz);
207 ++it;
76 } 208 }
77 sysmem.bank[i].end = start; 209 }
78 210
79 } else if (end < sysmem.bank[i].end) { 211 if (!it)
80 sysmem.bank[i].start = end; 212 it = sysmem.bank;
81 213
82 } else { 214 for (; it < sysmem.bank + sysmem.nr_banks; ++it) {
83 /* remove entry */ 215 if (it->end - start <= sz) {
84 sysmem.nr_banks--; 216 if (!rm)
85 sysmem.bank[i].start = sysmem.bank[sysmem.nr_banks].start; 217 rm = it;
86 sysmem.bank[i].end = sysmem.bank[sysmem.nr_banks].end; 218 } else {
219 if (it->start - start < sz)
220 it->start = end;
221 break;
222 }
87 } 223 }
88 return -1; 224
225 if (rm)
226 move_banks(rm, it);
227
228 return 0;
89} 229}
90 230
91 231
@@ -99,6 +239,7 @@ void __init bootmem_init(void)
99 unsigned long bootmap_start, bootmap_size; 239 unsigned long bootmap_start, bootmap_size;
100 int i; 240 int i;
101 241
242 sysmem_dump();
102 max_low_pfn = max_pfn = 0; 243 max_low_pfn = max_pfn = 0;
103 min_low_pfn = ~0; 244 min_low_pfn = ~0;
104 245
@@ -156,19 +297,13 @@ void __init bootmem_init(void)
156 297
157void __init zones_init(void) 298void __init zones_init(void)
158{ 299{
159 unsigned long zones_size[MAX_NR_ZONES];
160 int i;
161
162 /* All pages are DMA-able, so we put them all in the DMA zone. */ 300 /* All pages are DMA-able, so we put them all in the DMA zone. */
163 301 unsigned long zones_size[MAX_NR_ZONES] = {
164 zones_size[ZONE_DMA] = max_low_pfn - ARCH_PFN_OFFSET; 302 [ZONE_DMA] = max_low_pfn - ARCH_PFN_OFFSET,
165 for (i = 1; i < MAX_NR_ZONES; i++)
166 zones_size[i] = 0;
167
168#ifdef CONFIG_HIGHMEM 303#ifdef CONFIG_HIGHMEM
169 zones_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn; 304 [ZONE_HIGHMEM] = max_pfn - max_low_pfn,
170#endif 305#endif
171 306 };
172 free_area_init_node(0, zones_size, ARCH_PFN_OFFSET, NULL); 307 free_area_init_node(0, zones_size, ARCH_PFN_OFFSET, NULL);
173} 308}
174 309
@@ -178,16 +313,38 @@ void __init zones_init(void)
178 313
179void __init mem_init(void) 314void __init mem_init(void)
180{ 315{
181 max_mapnr = max_low_pfn - ARCH_PFN_OFFSET;
182 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
183
184#ifdef CONFIG_HIGHMEM 316#ifdef CONFIG_HIGHMEM
185#error HIGHGMEM not implemented in init.c 317 unsigned long tmp;
318
319 reset_all_zones_managed_pages();
320 for (tmp = max_low_pfn; tmp < max_pfn; tmp++)
321 free_highmem_page(pfn_to_page(tmp));
186#endif 322#endif
187 323
324 max_mapnr = max_pfn - ARCH_PFN_OFFSET;
325 high_memory = (void *)__va(max_low_pfn << PAGE_SHIFT);
326
188 free_all_bootmem(); 327 free_all_bootmem();
189 328
190 mem_init_print_info(NULL); 329 mem_init_print_info(NULL);
330 pr_info("virtual kernel memory layout:\n"
331#ifdef CONFIG_HIGHMEM
332 " pkmap : 0x%08lx - 0x%08lx (%5lu kB)\n"
333 " fixmap : 0x%08lx - 0x%08lx (%5lu kB)\n"
334#endif
335 " vmalloc : 0x%08x - 0x%08x (%5u MB)\n"
336 " lowmem : 0x%08x - 0x%08lx (%5lu MB)\n",
337#ifdef CONFIG_HIGHMEM
338 PKMAP_BASE, PKMAP_BASE + LAST_PKMAP * PAGE_SIZE,
339 (LAST_PKMAP*PAGE_SIZE) >> 10,
340 FIXADDR_START, FIXADDR_TOP,
341 (FIXADDR_TOP - FIXADDR_START) >> 10,
342#endif
343 VMALLOC_START, VMALLOC_END,
344 (VMALLOC_END - VMALLOC_START) >> 20,
345 PAGE_OFFSET, PAGE_OFFSET +
346 (max_low_pfn - min_low_pfn) * PAGE_SIZE,
347 ((max_low_pfn - min_low_pfn) * PAGE_SIZE) >> 20);
191} 348}
192 349
193#ifdef CONFIG_BLK_DEV_INITRD 350#ifdef CONFIG_BLK_DEV_INITRD
@@ -204,3 +361,53 @@ void free_initmem(void)
204{ 361{
205 free_initmem_default(-1); 362 free_initmem_default(-1);
206} 363}
364
365static void __init parse_memmap_one(char *p)
366{
367 char *oldp;
368 unsigned long start_at, mem_size;
369
370 if (!p)
371 return;
372
373 oldp = p;
374 mem_size = memparse(p, &p);
375 if (p == oldp)
376 return;
377
378 switch (*p) {
379 case '@':
380 start_at = memparse(p + 1, &p);
381 add_sysmem_bank(start_at, start_at + mem_size);
382 break;
383
384 case '$':
385 start_at = memparse(p + 1, &p);
386 mem_reserve(start_at, start_at + mem_size, 0);
387 break;
388
389 case 0:
390 mem_reserve(mem_size, 0, 0);
391 break;
392
393 default:
394 pr_warn("Unrecognized memmap syntax: %s\n", p);
395 break;
396 }
397}
398
399static int __init parse_memmap_opt(char *str)
400{
401 while (str) {
402 char *k = strchr(str, ',');
403
404 if (k)
405 *k++ = 0;
406
407 parse_memmap_one(str);
408 str = k;
409 }
410
411 return 0;
412}
413early_param("memmap", parse_memmap_opt);
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 861203e958da..3429b483d9f8 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -3,6 +3,7 @@
3 * 3 *
4 * Extracted from init.c 4 * Extracted from init.c
5 */ 5 */
6#include <linux/bootmem.h>
6#include <linux/percpu.h> 7#include <linux/percpu.h>
7#include <linux/init.h> 8#include <linux/init.h>
8#include <linux/string.h> 9#include <linux/string.h>
@@ -16,9 +17,44 @@
16#include <asm/initialize_mmu.h> 17#include <asm/initialize_mmu.h>
17#include <asm/io.h> 18#include <asm/io.h>
18 19
20#if defined(CONFIG_HIGHMEM)
21static void * __init init_pmd(unsigned long vaddr)
22{
23 pgd_t *pgd = pgd_offset_k(vaddr);
24 pmd_t *pmd = pmd_offset(pgd, vaddr);
25
26 if (pmd_none(*pmd)) {
27 unsigned i;
28 pte_t *pte = alloc_bootmem_low_pages(PAGE_SIZE);
29
30 for (i = 0; i < 1024; i++)
31 pte_clear(NULL, 0, pte + i);
32
33 set_pmd(pmd, __pmd(((unsigned long)pte) & PAGE_MASK));
34 BUG_ON(pte != pte_offset_kernel(pmd, 0));
35 pr_debug("%s: vaddr: 0x%08lx, pmd: 0x%p, pte: 0x%p\n",
36 __func__, vaddr, pmd, pte);
37 return pte;
38 } else {
39 return pte_offset_kernel(pmd, 0);
40 }
41}
42
43static void __init fixedrange_init(void)
44{
45 BUILD_BUG_ON(FIXADDR_SIZE > PMD_SIZE);
46 init_pmd(__fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK);
47}
48#endif
49
19void __init paging_init(void) 50void __init paging_init(void)
20{ 51{
21 memset(swapper_pg_dir, 0, PAGE_SIZE); 52 memset(swapper_pg_dir, 0, PAGE_SIZE);
53#ifdef CONFIG_HIGHMEM
54 fixedrange_init();
55 pkmap_page_table = init_pmd(PKMAP_BASE);
56 kmap_init();
57#endif
22} 58}
23 59
24/* 60/*
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c
index ade623826788..5ece856c5725 100644
--- a/arch/xtensa/mm/tlb.c
+++ b/arch/xtensa/mm/tlb.c
@@ -149,6 +149,21 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
149 local_irq_restore(flags); 149 local_irq_restore(flags);
150} 150}
151 151
152void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
153{
154 if (end > start && start >= TASK_SIZE && end <= PAGE_OFFSET &&
155 end - start < _TLB_ENTRIES << PAGE_SHIFT) {
156 start &= PAGE_MASK;
157 while (start < end) {
158 invalidate_itlb_mapping(start);
159 invalidate_dtlb_mapping(start);
160 start += PAGE_SIZE;
161 }
162 } else {
163 local_flush_tlb_all();
164 }
165}
166
152#ifdef CONFIG_DEBUG_TLB_SANITY 167#ifdef CONFIG_DEBUG_TLB_SANITY
153 168
154static unsigned get_pte_for_vaddr(unsigned vaddr) 169static unsigned get_pte_for_vaddr(unsigned vaddr)
diff --git a/arch/xtensa/platforms/iss/Makefile b/arch/xtensa/platforms/iss/Makefile
index d2369b799c50..b3e89291cfba 100644
--- a/arch/xtensa/platforms/iss/Makefile
+++ b/arch/xtensa/platforms/iss/Makefile
@@ -4,6 +4,7 @@
4# "prom monitor" library routines under Linux. 4# "prom monitor" library routines under Linux.
5# 5#
6 6
7obj-y = console.o setup.o 7obj-y = setup.o
8obj-$(CONFIG_TTY) += console.o
8obj-$(CONFIG_NET) += network.o 9obj-$(CONFIG_NET) += network.o
9obj-$(CONFIG_BLK_DEV_SIMDISK) += simdisk.o 10obj-$(CONFIG_BLK_DEV_SIMDISK) += simdisk.o
diff --git a/arch/xtensa/platforms/xt2000/setup.c b/arch/xtensa/platforms/xt2000/setup.c
index f9bc87966290..b90555cb8089 100644
--- a/arch/xtensa/platforms/xt2000/setup.c
+++ b/arch/xtensa/platforms/xt2000/setup.c
@@ -92,18 +92,8 @@ void __init platform_setup(char** cmdline)
92 92
93/* early initialization */ 93/* early initialization */
94 94
95extern sysmem_info_t __initdata sysmem; 95void __init platform_init(bp_tag_t *first)
96
97void platform_init(bp_tag_t* first)
98{ 96{
99 /* Set default memory block if not provided by the bootloader. */
100
101 if (sysmem.nr_banks == 0) {
102 sysmem.nr_banks = 1;
103 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
104 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
105 + PLATFORM_DEFAULT_MEM_SIZE;
106 }
107} 97}
108 98
109/* Heartbeat. Let the LED blink. */ 99/* Heartbeat. Let the LED blink. */
diff --git a/crypto/crypto_user.c b/crypto/crypto_user.c
index 1512e41cd93d..43665d0d0905 100644
--- a/crypto/crypto_user.c
+++ b/crypto/crypto_user.c
@@ -466,7 +466,7 @@ static int crypto_user_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
466 type -= CRYPTO_MSG_BASE; 466 type -= CRYPTO_MSG_BASE;
467 link = &crypto_dispatch[type]; 467 link = &crypto_dispatch[type];
468 468
469 if (!capable(CAP_NET_ADMIN)) 469 if (!netlink_capable(skb, CAP_NET_ADMIN))
470 return -EPERM; 470 return -EPERM;
471 471
472 if ((type == (CRYPTO_MSG_GETALG - CRYPTO_MSG_BASE) && 472 if ((type == (CRYPTO_MSG_GETALG - CRYPTO_MSG_BASE) &&
diff --git a/drivers/Makefile b/drivers/Makefile
index e3ced91b1784..d05d81b19b50 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -53,8 +53,8 @@ obj-y += gpu/
53obj-$(CONFIG_CONNECTOR) += connector/ 53obj-$(CONFIG_CONNECTOR) += connector/
54 54
55# i810fb and intelfb depend on char/agp/ 55# i810fb and intelfb depend on char/agp/
56obj-$(CONFIG_FB_I810) += video/i810/ 56obj-$(CONFIG_FB_I810) += video/fbdev/i810/
57obj-$(CONFIG_FB_INTEL) += video/intelfb/ 57obj-$(CONFIG_FB_INTEL) += video/fbdev/intelfb/
58 58
59obj-$(CONFIG_PARPORT) += parport/ 59obj-$(CONFIG_PARPORT) += parport/
60obj-y += base/ block/ misc/ mfd/ nfc/ 60obj-y += base/ block/ misc/ mfd/ nfc/
diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c
index c29c2c3ec0ad..b06f5f55ada9 100644
--- a/drivers/acpi/acpi_processor.c
+++ b/drivers/acpi/acpi_processor.c
@@ -170,6 +170,9 @@ static int acpi_processor_hotadd_init(struct acpi_processor *pr)
170 acpi_status status; 170 acpi_status status;
171 int ret; 171 int ret;
172 172
173 if (pr->apic_id == -1)
174 return -ENODEV;
175
173 status = acpi_evaluate_integer(pr->handle, "_STA", NULL, &sta); 176 status = acpi_evaluate_integer(pr->handle, "_STA", NULL, &sta);
174 if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT)) 177 if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT))
175 return -ENODEV; 178 return -ENODEV;
@@ -260,10 +263,8 @@ static int acpi_processor_get_info(struct acpi_device *device)
260 } 263 }
261 264
262 apic_id = acpi_get_apicid(pr->handle, device_declaration, pr->acpi_id); 265 apic_id = acpi_get_apicid(pr->handle, device_declaration, pr->acpi_id);
263 if (apic_id < 0) { 266 if (apic_id < 0)
264 acpi_handle_debug(pr->handle, "failed to get CPU APIC ID.\n"); 267 acpi_handle_debug(pr->handle, "failed to get CPU APIC ID.\n");
265 return -ENODEV;
266 }
267 pr->apic_id = apic_id; 268 pr->apic_id = apic_id;
268 269
269 cpu_index = acpi_map_cpuid(pr->apic_id, pr->acpi_id); 270 cpu_index = acpi_map_cpuid(pr->apic_id, pr->acpi_id);
diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
index 68d97441432c..12878e1982f7 100644
--- a/drivers/acpi/acpica/exfield.c
+++ b/drivers/acpi/acpica/exfield.c
@@ -45,10 +45,71 @@
45#include "accommon.h" 45#include "accommon.h"
46#include "acdispat.h" 46#include "acdispat.h"
47#include "acinterp.h" 47#include "acinterp.h"
48#include "amlcode.h"
48 49
49#define _COMPONENT ACPI_EXECUTER 50#define _COMPONENT ACPI_EXECUTER
50ACPI_MODULE_NAME("exfield") 51ACPI_MODULE_NAME("exfield")
51 52
53/* Local prototypes */
54static u32
55acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length);
56
57/*******************************************************************************
58 *
59 * FUNCTION: acpi_get_serial_access_bytes
60 *
61 * PARAMETERS: accessor_type - The type of the protocol indicated by region
62 * field access attributes
63 * access_length - The access length of the region field
64 *
65 * RETURN: Decoded access length
66 *
67 * DESCRIPTION: This routine returns the length of the generic_serial_bus
68 * protocol bytes
69 *
70 ******************************************************************************/
71
72static u32
73acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length)
74{
75 u32 length;
76
77 switch (accessor_type) {
78 case AML_FIELD_ATTRIB_QUICK:
79
80 length = 0;
81 break;
82
83 case AML_FIELD_ATTRIB_SEND_RCV:
84 case AML_FIELD_ATTRIB_BYTE:
85
86 length = 1;
87 break;
88
89 case AML_FIELD_ATTRIB_WORD:
90 case AML_FIELD_ATTRIB_WORD_CALL:
91
92 length = 2;
93 break;
94
95 case AML_FIELD_ATTRIB_MULTIBYTE:
96 case AML_FIELD_ATTRIB_RAW_BYTES:
97 case AML_FIELD_ATTRIB_RAW_PROCESS:
98
99 length = access_length;
100 break;
101
102 case AML_FIELD_ATTRIB_BLOCK:
103 case AML_FIELD_ATTRIB_BLOCK_CALL:
104 default:
105
106 length = ACPI_GSBUS_BUFFER_SIZE;
107 break;
108 }
109
110 return (length);
111}
112
52/******************************************************************************* 113/*******************************************************************************
53 * 114 *
54 * FUNCTION: acpi_ex_read_data_from_field 115 * FUNCTION: acpi_ex_read_data_from_field
@@ -63,8 +124,9 @@ ACPI_MODULE_NAME("exfield")
63 * Buffer, depending on the size of the field. 124 * Buffer, depending on the size of the field.
64 * 125 *
65 ******************************************************************************/ 126 ******************************************************************************/
127
66acpi_status 128acpi_status
67acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state, 129acpi_ex_read_data_from_field(struct acpi_walk_state * walk_state,
68 union acpi_operand_object *obj_desc, 130 union acpi_operand_object *obj_desc,
69 union acpi_operand_object **ret_buffer_desc) 131 union acpi_operand_object **ret_buffer_desc)
70{ 132{
@@ -73,6 +135,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
73 acpi_size length; 135 acpi_size length;
74 void *buffer; 136 void *buffer;
75 u32 function; 137 u32 function;
138 u16 accessor_type;
76 139
77 ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc); 140 ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
78 141
@@ -116,9 +179,22 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
116 ACPI_READ | (obj_desc->field.attribute << 16); 179 ACPI_READ | (obj_desc->field.attribute << 16);
117 } else if (obj_desc->field.region_obj->region.space_id == 180 } else if (obj_desc->field.region_obj->region.space_id ==
118 ACPI_ADR_SPACE_GSBUS) { 181 ACPI_ADR_SPACE_GSBUS) {
119 length = ACPI_GSBUS_BUFFER_SIZE; 182 accessor_type = obj_desc->field.attribute;
120 function = 183 length = acpi_ex_get_serial_access_length(accessor_type,
121 ACPI_READ | (obj_desc->field.attribute << 16); 184 obj_desc->
185 field.
186 access_length);
187
188 /*
189 * Add additional 2 bytes for modeled generic_serial_bus data buffer:
190 * typedef struct {
191 * BYTEStatus; // Byte 0 of the data buffer
192 * BYTELength; // Byte 1 of the data buffer
193 * BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer,
194 * }
195 */
196 length += 2;
197 function = ACPI_READ | (accessor_type << 16);
122 } else { /* IPMI */ 198 } else { /* IPMI */
123 199
124 length = ACPI_IPMI_BUFFER_SIZE; 200 length = ACPI_IPMI_BUFFER_SIZE;
@@ -231,6 +307,7 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
231 void *buffer; 307 void *buffer;
232 union acpi_operand_object *buffer_desc; 308 union acpi_operand_object *buffer_desc;
233 u32 function; 309 u32 function;
310 u16 accessor_type;
234 311
235 ACPI_FUNCTION_TRACE_PTR(ex_write_data_to_field, obj_desc); 312 ACPI_FUNCTION_TRACE_PTR(ex_write_data_to_field, obj_desc);
236 313
@@ -284,9 +361,22 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
284 ACPI_WRITE | (obj_desc->field.attribute << 16); 361 ACPI_WRITE | (obj_desc->field.attribute << 16);
285 } else if (obj_desc->field.region_obj->region.space_id == 362 } else if (obj_desc->field.region_obj->region.space_id ==
286 ACPI_ADR_SPACE_GSBUS) { 363 ACPI_ADR_SPACE_GSBUS) {
287 length = ACPI_GSBUS_BUFFER_SIZE; 364 accessor_type = obj_desc->field.attribute;
288 function = 365 length = acpi_ex_get_serial_access_length(accessor_type,
289 ACPI_WRITE | (obj_desc->field.attribute << 16); 366 obj_desc->
367 field.
368 access_length);
369
370 /*
371 * Add additional 2 bytes for modeled generic_serial_bus data buffer:
372 * typedef struct {
373 * BYTEStatus; // Byte 0 of the data buffer
374 * BYTELength; // Byte 1 of the data buffer
375 * BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer,
376 * }
377 */
378 length += 2;
379 function = ACPI_WRITE | (accessor_type << 16);
290 } else { /* IPMI */ 380 } else { /* IPMI */
291 381
292 length = ACPI_IPMI_BUFFER_SIZE; 382 length = ACPI_IPMI_BUFFER_SIZE;
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index e7e5844c87d0..cf925c4f36b7 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -380,9 +380,8 @@ static void acpi_bus_notify(acpi_handle handle, u32 type, void *data)
380 break; 380 break;
381 381
382 default: 382 default:
383 acpi_handle_warn(handle, "Unsupported event type 0x%x\n", type); 383 acpi_handle_debug(handle, "Unknown event type 0x%x\n", type);
384 ost_code = ACPI_OST_SC_UNRECOGNIZED_NOTIFY; 384 break;
385 goto err;
386 } 385 }
387 386
388 adev = acpi_bus_get_acpi_device(handle); 387 adev = acpi_bus_get_acpi_device(handle);
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index d7d32c28829b..ad11ba4a412d 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -206,13 +206,13 @@ unlock:
206 spin_unlock_irqrestore(&ec->lock, flags); 206 spin_unlock_irqrestore(&ec->lock, flags);
207} 207}
208 208
209static int acpi_ec_sync_query(struct acpi_ec *ec); 209static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data);
210 210
211static int ec_check_sci_sync(struct acpi_ec *ec, u8 state) 211static int ec_check_sci_sync(struct acpi_ec *ec, u8 state)
212{ 212{
213 if (state & ACPI_EC_FLAG_SCI) { 213 if (state & ACPI_EC_FLAG_SCI) {
214 if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags)) 214 if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags))
215 return acpi_ec_sync_query(ec); 215 return acpi_ec_sync_query(ec, NULL);
216 } 216 }
217 return 0; 217 return 0;
218} 218}
@@ -443,10 +443,8 @@ acpi_handle ec_get_handle(void)
443 443
444EXPORT_SYMBOL(ec_get_handle); 444EXPORT_SYMBOL(ec_get_handle);
445 445
446static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 *data);
447
448/* 446/*
449 * Clears stale _Q events that might have accumulated in the EC. 447 * Process _Q events that might have accumulated in the EC.
450 * Run with locked ec mutex. 448 * Run with locked ec mutex.
451 */ 449 */
452static void acpi_ec_clear(struct acpi_ec *ec) 450static void acpi_ec_clear(struct acpi_ec *ec)
@@ -455,7 +453,7 @@ static void acpi_ec_clear(struct acpi_ec *ec)
455 u8 value = 0; 453 u8 value = 0;
456 454
457 for (i = 0; i < ACPI_EC_CLEAR_MAX; i++) { 455 for (i = 0; i < ACPI_EC_CLEAR_MAX; i++) {
458 status = acpi_ec_query_unlocked(ec, &value); 456 status = acpi_ec_sync_query(ec, &value);
459 if (status || !value) 457 if (status || !value)
460 break; 458 break;
461 } 459 }
@@ -582,13 +580,18 @@ static void acpi_ec_run(void *cxt)
582 kfree(handler); 580 kfree(handler);
583} 581}
584 582
585static int acpi_ec_sync_query(struct acpi_ec *ec) 583static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data)
586{ 584{
587 u8 value = 0; 585 u8 value = 0;
588 int status; 586 int status;
589 struct acpi_ec_query_handler *handler, *copy; 587 struct acpi_ec_query_handler *handler, *copy;
590 if ((status = acpi_ec_query_unlocked(ec, &value))) 588
589 status = acpi_ec_query_unlocked(ec, &value);
590 if (data)
591 *data = value;
592 if (status)
591 return status; 593 return status;
594
592 list_for_each_entry(handler, &ec->list, node) { 595 list_for_each_entry(handler, &ec->list, node) {
593 if (value == handler->query_bit) { 596 if (value == handler->query_bit) {
594 /* have custom handler for this bit */ 597 /* have custom handler for this bit */
@@ -612,7 +615,7 @@ static void acpi_ec_gpe_query(void *ec_cxt)
612 if (!ec) 615 if (!ec)
613 return; 616 return;
614 mutex_lock(&ec->mutex); 617 mutex_lock(&ec->mutex);
615 acpi_ec_sync_query(ec); 618 acpi_ec_sync_query(ec, NULL);
616 mutex_unlock(&ec->mutex); 619 mutex_unlock(&ec->mutex);
617} 620}
618 621
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 20e03a7eb8b4..c2706047337f 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -116,7 +116,7 @@ config AHCI_ST
116 116
117config AHCI_IMX 117config AHCI_IMX
118 tristate "Freescale i.MX AHCI SATA support" 118 tristate "Freescale i.MX AHCI SATA support"
119 depends on MFD_SYSCON 119 depends on MFD_SYSCON && (ARCH_MXC || COMPILE_TEST)
120 help 120 help
121 This option enables support for the Freescale i.MX SoC's 121 This option enables support for the Freescale i.MX SoC's
122 onboard AHCI SATA. 122 onboard AHCI SATA.
@@ -134,8 +134,7 @@ config AHCI_SUNXI
134 134
135config AHCI_XGENE 135config AHCI_XGENE
136 tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support" 136 tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support"
137 depends on ARM64 || COMPILE_TEST 137 depends on PHY_XGENE
138 select PHY_XGENE
139 help 138 help
140 This option enables support for APM X-Gene SoC SATA host controller. 139 This option enables support for APM X-Gene SoC SATA host controller.
141 140
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 5a0bf8ed649b..71e15b73513d 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1164,9 +1164,9 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host)
1164#endif 1164#endif
1165 1165
1166static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports, 1166static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports,
1167 struct ahci_host_priv *hpriv) 1167 struct ahci_host_priv *hpriv)
1168{ 1168{
1169 int nvec; 1169 int rc, nvec;
1170 1170
1171 if (hpriv->flags & AHCI_HFLAG_NO_MSI) 1171 if (hpriv->flags & AHCI_HFLAG_NO_MSI)
1172 goto intx; 1172 goto intx;
@@ -1183,12 +1183,19 @@ static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports,
1183 if (nvec < n_ports) 1183 if (nvec < n_ports)
1184 goto single_msi; 1184 goto single_msi;
1185 1185
1186 nvec = pci_enable_msi_range(pdev, nvec, nvec); 1186 rc = pci_enable_msi_exact(pdev, nvec);
1187 if (nvec == -ENOSPC) 1187 if (rc == -ENOSPC)
1188 goto single_msi; 1188 goto single_msi;
1189 else if (nvec < 0) 1189 else if (rc < 0)
1190 goto intx; 1190 goto intx;
1191 1191
1192 /* fallback to single MSI mode if the controller enforced MRSM mode */
1193 if (readl(hpriv->mmio + HOST_CTL) & HOST_MRSM) {
1194 pci_disable_msi(pdev);
1195 printk(KERN_INFO "ahci: MRSM is on, fallback to single MSI\n");
1196 goto single_msi;
1197 }
1198
1192 return nvec; 1199 return nvec;
1193 1200
1194single_msi: 1201single_msi:
@@ -1232,18 +1239,18 @@ int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis)
1232 return rc; 1239 return rc;
1233 1240
1234 for (i = 0; i < host->n_ports; i++) { 1241 for (i = 0; i < host->n_ports; i++) {
1235 const char* desc;
1236 struct ahci_port_priv *pp = host->ports[i]->private_data; 1242 struct ahci_port_priv *pp = host->ports[i]->private_data;
1237 1243
1238 /* pp is NULL for dummy ports */ 1244 /* Do not receive interrupts sent by dummy ports */
1239 if (pp) 1245 if (!pp) {
1240 desc = pp->irq_desc; 1246 disable_irq(irq + i);
1241 else 1247 continue;
1242 desc = dev_driver_string(host->dev); 1248 }
1243 1249
1244 rc = devm_request_threaded_irq(host->dev, 1250 rc = devm_request_threaded_irq(host->dev, irq + i,
1245 irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED, 1251 ahci_hw_interrupt,
1246 desc, host->ports[i]); 1252 ahci_thread_fn, IRQF_SHARED,
1253 pp->irq_desc, host->ports[i]);
1247 if (rc) 1254 if (rc)
1248 goto out_free_irqs; 1255 goto out_free_irqs;
1249 } 1256 }
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 51af275b3388..b5eb886da226 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -94,6 +94,7 @@ enum {
94 /* HOST_CTL bits */ 94 /* HOST_CTL bits */
95 HOST_RESET = (1 << 0), /* reset controller; self-clear */ 95 HOST_RESET = (1 << 0), /* reset controller; self-clear */
96 HOST_IRQ_EN = (1 << 1), /* global IRQ enable */ 96 HOST_IRQ_EN = (1 << 1), /* global IRQ enable */
97 HOST_MRSM = (1 << 2), /* MSI Revert to Single Message */
97 HOST_AHCI_EN = (1 << 31), /* AHCI enabled */ 98 HOST_AHCI_EN = (1 << 31), /* AHCI enabled */
98 99
99 /* HOST_CAP bits */ 100 /* HOST_CAP bits */
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index c19734d96d7e..943cc8b83e59 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4224,8 +4224,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
4224 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER }, 4224 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
4225 4225
4226 /* devices that don't properly handle queued TRIM commands */ 4226 /* devices that don't properly handle queued TRIM commands */
4227 { "Micron_M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, 4227 { "Micron_M500*", "MU0[1-4]*", ATA_HORKAGE_NO_NCQ_TRIM, },
4228 { "Crucial_CT???M500SSD*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, 4228 { "Crucial_CT???M500SSD*", "MU0[1-4]*", ATA_HORKAGE_NO_NCQ_TRIM, },
4229 { "Micron_M550*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, },
4230 { "Crucial_CT???M550SSD*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, },
4229 4231
4230 /* 4232 /*
4231 * Some WD SATA-I drives spin up and down erratically when the link 4233 * Some WD SATA-I drives spin up and down erratically when the link
@@ -4792,21 +4794,26 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
4792static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 4794static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4793{ 4795{
4794 struct ata_queued_cmd *qc = NULL; 4796 struct ata_queued_cmd *qc = NULL;
4795 unsigned int i; 4797 unsigned int i, tag;
4796 4798
4797 /* no command while frozen */ 4799 /* no command while frozen */
4798 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 4800 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4799 return NULL; 4801 return NULL;
4800 4802
4801 /* the last tag is reserved for internal command. */ 4803 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4802 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 4804 tag = (i + ap->last_tag + 1) % ATA_MAX_QUEUE;
4803 if (!test_and_set_bit(i, &ap->qc_allocated)) { 4805
4804 qc = __ata_qc_from_tag(ap, i); 4806 /* the last tag is reserved for internal command. */
4807 if (tag == ATA_TAG_INTERNAL)
4808 continue;
4809
4810 if (!test_and_set_bit(tag, &ap->qc_allocated)) {
4811 qc = __ata_qc_from_tag(ap, tag);
4812 qc->tag = tag;
4813 ap->last_tag = tag;
4805 break; 4814 break;
4806 } 4815 }
4807 4816 }
4808 if (qc)
4809 qc->tag = i;
4810 4817
4811 return qc; 4818 return qc;
4812} 4819}
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index 6fac524c2f50..4edb1a81f63f 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c
@@ -898,9 +898,12 @@ static int arasan_cf_probe(struct platform_device *pdev)
898 898
899 cf_card_detect(acdev, 0); 899 cf_card_detect(acdev, 0);
900 900
901 return ata_host_activate(host, acdev->irq, irq_handler, 0, 901 ret = ata_host_activate(host, acdev->irq, irq_handler, 0,
902 &arasan_cf_sht); 902 &arasan_cf_sht);
903 if (!ret)
904 return 0;
903 905
906 cf_exit(acdev);
904free_clk: 907free_clk:
905 clk_put(acdev->clk); 908 clk_put(acdev->clk);
906 return ret; 909 return ret;
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index e9c87274a781..8a66f23af4c4 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -407,12 +407,13 @@ static int pata_at91_probe(struct platform_device *pdev)
407 407
408 host->private_data = info; 408 host->private_data = info;
409 409
410 return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0, 410 ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
411 gpio_is_valid(irq) ? ata_sff_interrupt : NULL, 411 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
412 irq_flags, &pata_at91_sht); 412 irq_flags, &pata_at91_sht);
413 if (ret)
414 goto err_put;
413 415
414 if (!ret) 416 return 0;
415 return 0;
416 417
417err_put: 418err_put:
418 clk_put(info->mck); 419 clk_put(info->mck);
diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c
index a79566d05666..0610e78c8a2a 100644
--- a/drivers/ata/pata_samsung_cf.c
+++ b/drivers/ata/pata_samsung_cf.c
@@ -594,9 +594,13 @@ static int __init pata_s3c_probe(struct platform_device *pdev)
594 594
595 platform_set_drvdata(pdev, host); 595 platform_set_drvdata(pdev, host);
596 596
597 return ata_host_activate(host, info->irq, 597 ret = ata_host_activate(host, info->irq,
598 info->irq ? pata_s3c_irq : NULL, 598 info->irq ? pata_s3c_irq : NULL,
599 0, &pata_s3c_sht); 599 0, &pata_s3c_sht);
600 if (ret)
601 goto stop_clk;
602
603 return 0;
600 604
601stop_clk: 605stop_clk:
602 clk_disable(info->clk); 606 clk_disable(info->clk);
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 0dd65281cc65..20da3ad1696b 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -614,39 +614,6 @@ void device_remove_bin_file(struct device *dev,
614} 614}
615EXPORT_SYMBOL_GPL(device_remove_bin_file); 615EXPORT_SYMBOL_GPL(device_remove_bin_file);
616 616
617/**
618 * device_schedule_callback_owner - helper to schedule a callback for a device
619 * @dev: device.
620 * @func: callback function to invoke later.
621 * @owner: module owning the callback routine
622 *
623 * Attribute methods must not unregister themselves or their parent device
624 * (which would amount to the same thing). Attempts to do so will deadlock,
625 * since unregistration is mutually exclusive with driver callbacks.
626 *
627 * Instead methods can call this routine, which will attempt to allocate
628 * and schedule a workqueue request to call back @func with @dev as its
629 * argument in the workqueue's process context. @dev will be pinned until
630 * @func returns.
631 *
632 * This routine is usually called via the inline device_schedule_callback(),
633 * which automatically sets @owner to THIS_MODULE.
634 *
635 * Returns 0 if the request was submitted, -ENOMEM if storage could not
636 * be allocated, -ENODEV if a reference to @owner isn't available.
637 *
638 * NOTE: This routine won't work if CONFIG_SYSFS isn't set! It uses an
639 * underlying sysfs routine (since it is intended for use by attribute
640 * methods), and if sysfs isn't available you'll get nothing but -ENOSYS.
641 */
642int device_schedule_callback_owner(struct device *dev,
643 void (*func)(struct device *), struct module *owner)
644{
645 return sysfs_schedule_callback(&dev->kobj,
646 (void (*)(void *)) func, dev, owner);
647}
648EXPORT_SYMBOL_GPL(device_schedule_callback_owner);
649
650static void klist_children_get(struct klist_node *n) 617static void klist_children_get(struct klist_node *n)
651{ 618{
652 struct device_private *p = to_device_private_parent(n); 619 struct device_private *p = to_device_private_parent(n);
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 06051767393f..62ec61e8f84a 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -52,6 +52,7 @@ static DEFINE_MUTEX(deferred_probe_mutex);
52static LIST_HEAD(deferred_probe_pending_list); 52static LIST_HEAD(deferred_probe_pending_list);
53static LIST_HEAD(deferred_probe_active_list); 53static LIST_HEAD(deferred_probe_active_list);
54static struct workqueue_struct *deferred_wq; 54static struct workqueue_struct *deferred_wq;
55static atomic_t deferred_trigger_count = ATOMIC_INIT(0);
55 56
56/** 57/**
57 * deferred_probe_work_func() - Retry probing devices in the active list. 58 * deferred_probe_work_func() - Retry probing devices in the active list.
@@ -135,6 +136,17 @@ static bool driver_deferred_probe_enable = false;
135 * This functions moves all devices from the pending list to the active 136 * This functions moves all devices from the pending list to the active
136 * list and schedules the deferred probe workqueue to process them. It 137 * list and schedules the deferred probe workqueue to process them. It
137 * should be called anytime a driver is successfully bound to a device. 138 * should be called anytime a driver is successfully bound to a device.
139 *
140 * Note, there is a race condition in multi-threaded probe. In the case where
141 * more than one device is probing at the same time, it is possible for one
142 * probe to complete successfully while another is about to defer. If the second
143 * depends on the first, then it will get put on the pending list after the
144 * trigger event has already occured and will be stuck there.
145 *
146 * The atomic 'deferred_trigger_count' is used to determine if a successful
147 * trigger has occurred in the midst of probing a driver. If the trigger count
148 * changes in the midst of a probe, then deferred processing should be triggered
149 * again.
138 */ 150 */
139static void driver_deferred_probe_trigger(void) 151static void driver_deferred_probe_trigger(void)
140{ 152{
@@ -147,6 +159,7 @@ static void driver_deferred_probe_trigger(void)
147 * into the active list so they can be retried by the workqueue 159 * into the active list so they can be retried by the workqueue
148 */ 160 */
149 mutex_lock(&deferred_probe_mutex); 161 mutex_lock(&deferred_probe_mutex);
162 atomic_inc(&deferred_trigger_count);
150 list_splice_tail_init(&deferred_probe_pending_list, 163 list_splice_tail_init(&deferred_probe_pending_list,
151 &deferred_probe_active_list); 164 &deferred_probe_active_list);
152 mutex_unlock(&deferred_probe_mutex); 165 mutex_unlock(&deferred_probe_mutex);
@@ -187,8 +200,8 @@ static void driver_bound(struct device *dev)
187 return; 200 return;
188 } 201 }
189 202
190 pr_debug("driver: '%s': %s: bound to device '%s'\n", dev_name(dev), 203 pr_debug("driver: '%s': %s: bound to device '%s'\n", dev->driver->name,
191 __func__, dev->driver->name); 204 __func__, dev_name(dev));
192 205
193 klist_add_tail(&dev->p->knode_driver, &dev->driver->p->klist_devices); 206 klist_add_tail(&dev->p->knode_driver, &dev->driver->p->klist_devices);
194 207
@@ -265,6 +278,7 @@ static DECLARE_WAIT_QUEUE_HEAD(probe_waitqueue);
265static int really_probe(struct device *dev, struct device_driver *drv) 278static int really_probe(struct device *dev, struct device_driver *drv)
266{ 279{
267 int ret = 0; 280 int ret = 0;
281 int local_trigger_count = atomic_read(&deferred_trigger_count);
268 282
269 atomic_inc(&probe_count); 283 atomic_inc(&probe_count);
270 pr_debug("bus: '%s': %s: probing driver %s with device %s\n", 284 pr_debug("bus: '%s': %s: probing driver %s with device %s\n",
@@ -310,6 +324,9 @@ probe_failed:
310 /* Driver requested deferred probing */ 324 /* Driver requested deferred probing */
311 dev_info(dev, "Driver %s requests probe deferral\n", drv->name); 325 dev_info(dev, "Driver %s requests probe deferral\n", drv->name);
312 driver_deferred_probe_add(dev); 326 driver_deferred_probe_add(dev);
327 /* Did a trigger occur while probing? Need to re-trigger if yes */
328 if (local_trigger_count != atomic_read(&deferred_trigger_count))
329 driver_deferred_probe_trigger();
313 } else if (ret != -ENODEV && ret != -ENXIO) { 330 } else if (ret != -ENODEV && ret != -ENXIO) {
314 /* driver matched but the probe failed */ 331 /* driver matched but the probe failed */
315 printk(KERN_WARNING 332 printk(KERN_WARNING
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index e714709704e4..5b47210889e0 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -13,6 +13,7 @@
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/of_device.h> 15#include <linux/of_device.h>
16#include <linux/of_irq.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
@@ -87,7 +88,11 @@ int platform_get_irq(struct platform_device *dev, unsigned int num)
87 return -ENXIO; 88 return -ENXIO;
88 return dev->archdata.irqs[num]; 89 return dev->archdata.irqs[num];
89#else 90#else
90 struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); 91 struct resource *r;
92 if (IS_ENABLED(CONFIG_OF_IRQ) && dev->dev.of_node)
93 return of_irq_get(dev->dev.of_node, num);
94
95 r = platform_get_resource(dev, IORESOURCE_IRQ, num);
91 96
92 return r ? r->start : -ENXIO; 97 return r ? r->start : -ENXIO;
93#endif 98#endif
diff --git a/drivers/base/topology.c b/drivers/base/topology.c
index bbcbd3c43926..be7c1fb7c0c9 100644
--- a/drivers/base/topology.c
+++ b/drivers/base/topology.c
@@ -39,8 +39,7 @@
39static ssize_t show_##name(struct device *dev, \ 39static ssize_t show_##name(struct device *dev, \
40 struct device_attribute *attr, char *buf) \ 40 struct device_attribute *attr, char *buf) \
41{ \ 41{ \
42 unsigned int cpu = dev->id; \ 42 return sprintf(buf, "%d\n", topology_##name(dev->id)); \
43 return sprintf(buf, "%d\n", topology_##name(cpu)); \
44} 43}
45 44
46#if defined(topology_thread_cpumask) || defined(topology_core_cpumask) || \ 45#if defined(topology_thread_cpumask) || defined(topology_core_cpumask) || \
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index 8f5565bf34cd..fa9bb742df6e 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -3067,7 +3067,10 @@ static int raw_cmd_copyout(int cmd, void __user *param,
3067 int ret; 3067 int ret;
3068 3068
3069 while (ptr) { 3069 while (ptr) {
3070 ret = copy_to_user(param, ptr, sizeof(*ptr)); 3070 struct floppy_raw_cmd cmd = *ptr;
3071 cmd.next = NULL;
3072 cmd.kernel_data = NULL;
3073 ret = copy_to_user(param, &cmd, sizeof(cmd));
3071 if (ret) 3074 if (ret)
3072 return -EFAULT; 3075 return -EFAULT;
3073 param += sizeof(struct floppy_raw_cmd); 3076 param += sizeof(struct floppy_raw_cmd);
@@ -3121,10 +3124,11 @@ loop:
3121 return -ENOMEM; 3124 return -ENOMEM;
3122 *rcmd = ptr; 3125 *rcmd = ptr;
3123 ret = copy_from_user(ptr, param, sizeof(*ptr)); 3126 ret = copy_from_user(ptr, param, sizeof(*ptr));
3124 if (ret)
3125 return -EFAULT;
3126 ptr->next = NULL; 3127 ptr->next = NULL;
3127 ptr->buffer_length = 0; 3128 ptr->buffer_length = 0;
3129 ptr->kernel_data = NULL;
3130 if (ret)
3131 return -EFAULT;
3128 param += sizeof(struct floppy_raw_cmd); 3132 param += sizeof(struct floppy_raw_cmd);
3129 if (ptr->cmd_count > 33) 3133 if (ptr->cmd_count > 33)
3130 /* the command may now also take up the space 3134 /* the command may now also take up the space
@@ -3140,7 +3144,6 @@ loop:
3140 for (i = 0; i < 16; i++) 3144 for (i = 0; i < 16; i++)
3141 ptr->reply[i] = 0; 3145 ptr->reply[i] = 0;
3142 ptr->resultcode = 0; 3146 ptr->resultcode = 0;
3143 ptr->kernel_data = NULL;
3144 3147
3145 if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) { 3148 if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
3146 if (ptr->length <= 0) 3149 if (ptr->length <= 0)
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c
index be571fef185d..a83b57e57b63 100644
--- a/drivers/bluetooth/ath3k.c
+++ b/drivers/bluetooth/ath3k.c
@@ -82,6 +82,7 @@ static const struct usb_device_id ath3k_table[] = {
82 { USB_DEVICE(0x04CA, 0x3004) }, 82 { USB_DEVICE(0x04CA, 0x3004) },
83 { USB_DEVICE(0x04CA, 0x3005) }, 83 { USB_DEVICE(0x04CA, 0x3005) },
84 { USB_DEVICE(0x04CA, 0x3006) }, 84 { USB_DEVICE(0x04CA, 0x3006) },
85 { USB_DEVICE(0x04CA, 0x3007) },
85 { USB_DEVICE(0x04CA, 0x3008) }, 86 { USB_DEVICE(0x04CA, 0x3008) },
86 { USB_DEVICE(0x04CA, 0x300b) }, 87 { USB_DEVICE(0x04CA, 0x300b) },
87 { USB_DEVICE(0x0930, 0x0219) }, 88 { USB_DEVICE(0x0930, 0x0219) },
@@ -131,6 +132,7 @@ static const struct usb_device_id ath3k_blist_tbl[] = {
131 { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 }, 132 { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 },
132 { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 }, 133 { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
133 { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 }, 134 { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 },
135 { USB_DEVICE(0x04ca, 0x3007), .driver_info = BTUSB_ATH3012 },
134 { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, 136 { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 },
135 { USB_DEVICE(0x04ca, 0x300b), .driver_info = BTUSB_ATH3012 }, 137 { USB_DEVICE(0x04ca, 0x300b), .driver_info = BTUSB_ATH3012 },
136 { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, 138 { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 },
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index f338b0c5a8de..a7dfbf9a3afb 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -152,6 +152,7 @@ static const struct usb_device_id blacklist_table[] = {
152 { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 }, 152 { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 },
153 { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 }, 153 { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
154 { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 }, 154 { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 },
155 { USB_DEVICE(0x04ca, 0x3007), .driver_info = BTUSB_ATH3012 },
155 { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, 156 { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 },
156 { USB_DEVICE(0x04ca, 0x300b), .driver_info = BTUSB_ATH3012 }, 157 { USB_DEVICE(0x04ca, 0x300b), .driver_info = BTUSB_ATH3012 },
157 { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, 158 { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 },
@@ -1485,10 +1486,8 @@ static int btusb_probe(struct usb_interface *intf,
1485 if (id->driver_info & BTUSB_BCM92035) 1486 if (id->driver_info & BTUSB_BCM92035)
1486 hdev->setup = btusb_setup_bcm92035; 1487 hdev->setup = btusb_setup_bcm92035;
1487 1488
1488 if (id->driver_info & BTUSB_INTEL) { 1489 if (id->driver_info & BTUSB_INTEL)
1489 usb_enable_autosuspend(data->udev);
1490 hdev->setup = btusb_setup_intel; 1490 hdev->setup = btusb_setup_intel;
1491 }
1492 1491
1493 /* Interface numbers are hardcoded in the specification */ 1492 /* Interface numbers are hardcoded in the specification */
1494 data->isoc = usb_ifnum_to_if(data->udev, 1); 1493 data->isoc = usb_ifnum_to_if(data->udev, 1);
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index fbae63e3d304..6e9f74a5c095 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -40,7 +40,7 @@ config SGI_MBCS
40source "drivers/tty/serial/Kconfig" 40source "drivers/tty/serial/Kconfig"
41 41
42config TTY_PRINTK 42config TTY_PRINTK
43 bool "TTY driver to output user messages via printk" 43 tristate "TTY driver to output user messages via printk"
44 depends on EXPERT && TTY 44 depends on EXPERT && TTY
45 default n 45 default n
46 ---help--- 46 ---help---
diff --git a/drivers/char/agp/frontend.c b/drivers/char/agp/frontend.c
index 8121b4c70ede..b29703324e94 100644
--- a/drivers/char/agp/frontend.c
+++ b/drivers/char/agp/frontend.c
@@ -730,6 +730,7 @@ static int agpioc_info_wrap(struct agp_file_private *priv, void __user *arg)
730 730
731 agp_copy_info(agp_bridge, &kerninfo); 731 agp_copy_info(agp_bridge, &kerninfo);
732 732
733 memset(&userinfo, 0, sizeof(userinfo));
733 userinfo.version.major = kerninfo.version.major; 734 userinfo.version.major = kerninfo.version.major;
734 userinfo.version.minor = kerninfo.version.minor; 735 userinfo.version.minor = kerninfo.version.minor;
735 userinfo.bridge_id = kerninfo.device->vendor | 736 userinfo.bridge_id = kerninfo.device->vendor |
diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c
index 8c3b255e629a..e900961cdd2e 100644
--- a/drivers/char/hw_random/bcm2835-rng.c
+++ b/drivers/char/hw_random/bcm2835-rng.c
@@ -61,18 +61,18 @@ static int bcm2835_rng_probe(struct platform_device *pdev)
61 } 61 }
62 bcm2835_rng_ops.priv = (unsigned long)rng_base; 62 bcm2835_rng_ops.priv = (unsigned long)rng_base;
63 63
64 /* set warm-up count & enable */
65 __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS);
66 __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL);
67
64 /* register driver */ 68 /* register driver */
65 err = hwrng_register(&bcm2835_rng_ops); 69 err = hwrng_register(&bcm2835_rng_ops);
66 if (err) { 70 if (err) {
67 dev_err(dev, "hwrng registration failed\n"); 71 dev_err(dev, "hwrng registration failed\n");
68 iounmap(rng_base); 72 iounmap(rng_base);
69 } else { 73 } else
70 dev_info(dev, "hwrng registered\n"); 74 dev_info(dev, "hwrng registered\n");
71 75
72 /* set warm-up count & enable */
73 __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS);
74 __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL);
75 }
76 return err; 76 return err;
77} 77}
78 78
diff --git a/drivers/char/ipmi/Kconfig b/drivers/char/ipmi/Kconfig
index 0baa8fab4ea7..db1c9b7adaa6 100644
--- a/drivers/char/ipmi/Kconfig
+++ b/drivers/char/ipmi/Kconfig
@@ -50,6 +50,18 @@ config IPMI_SI
50 Currently, only KCS and SMIC are supported. If 50 Currently, only KCS and SMIC are supported. If
51 you are using IPMI, you should probably say "y" here. 51 you are using IPMI, you should probably say "y" here.
52 52
53config IPMI_SI_PROBE_DEFAULTS
54 bool 'Probe for all possible IPMI system interfaces by default'
55 default n
56 depends on IPMI_SI
57 help
58 Modern systems will usually expose IPMI interfaces via a discoverable
59 firmware mechanism such as ACPI or DMI. Older systems do not, and so
60 the driver is forced to probe hardware manually. This may cause boot
61 delays. Say "n" here to disable this manual probing. IPMI will then
62 only be available on older systems if the "ipmi_si_intf.trydefaults=1"
63 boot argument is passed.
64
53config IPMI_WATCHDOG 65config IPMI_WATCHDOG
54 tristate 'IPMI Watchdog Timer' 66 tristate 'IPMI Watchdog Timer'
55 help 67 help
diff --git a/drivers/char/ipmi/ipmi_bt_sm.c b/drivers/char/ipmi/ipmi_bt_sm.c
index f5e4cd7617f6..61e71616689b 100644
--- a/drivers/char/ipmi/ipmi_bt_sm.c
+++ b/drivers/char/ipmi/ipmi_bt_sm.c
@@ -352,7 +352,7 @@ static inline void write_all_bytes(struct si_sm_data *bt)
352 352
353static inline int read_all_bytes(struct si_sm_data *bt) 353static inline int read_all_bytes(struct si_sm_data *bt)
354{ 354{
355 unsigned char i; 355 unsigned int i;
356 356
357 /* 357 /*
358 * length is "framing info", minimum = 4: NetFn, Seq, Cmd, cCode. 358 * length is "framing info", minimum = 4: NetFn, Seq, Cmd, cCode.
diff --git a/drivers/char/ipmi/ipmi_kcs_sm.c b/drivers/char/ipmi/ipmi_kcs_sm.c
index 6a4bdc18955a..8c25f596808a 100644
--- a/drivers/char/ipmi/ipmi_kcs_sm.c
+++ b/drivers/char/ipmi/ipmi_kcs_sm.c
@@ -251,8 +251,9 @@ static inline int check_obf(struct si_sm_data *kcs, unsigned char status,
251 if (!GET_STATUS_OBF(status)) { 251 if (!GET_STATUS_OBF(status)) {
252 kcs->obf_timeout -= time; 252 kcs->obf_timeout -= time;
253 if (kcs->obf_timeout < 0) { 253 if (kcs->obf_timeout < 0) {
254 start_error_recovery(kcs, "OBF not ready in time"); 254 kcs->obf_timeout = OBF_RETRY_TIMEOUT;
255 return 1; 255 start_error_recovery(kcs, "OBF not ready in time");
256 return 1;
256 } 257 }
257 return 0; 258 return 0;
258 } 259 }
diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c
index ec4e10fcf1a5..e6db9381b2c7 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -55,6 +55,7 @@ static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void);
55static int ipmi_init_msghandler(void); 55static int ipmi_init_msghandler(void);
56static void smi_recv_tasklet(unsigned long); 56static void smi_recv_tasklet(unsigned long);
57static void handle_new_recv_msgs(ipmi_smi_t intf); 57static void handle_new_recv_msgs(ipmi_smi_t intf);
58static void need_waiter(ipmi_smi_t intf);
58 59
59static int initialized; 60static int initialized;
60 61
@@ -73,14 +74,28 @@ static struct proc_dir_entry *proc_ipmi_root;
73 */ 74 */
74#define MAX_MSG_TIMEOUT 60000 75#define MAX_MSG_TIMEOUT 60000
75 76
77/* Call every ~1000 ms. */
78#define IPMI_TIMEOUT_TIME 1000
79
80/* How many jiffies does it take to get to the timeout time. */
81#define IPMI_TIMEOUT_JIFFIES ((IPMI_TIMEOUT_TIME * HZ) / 1000)
82
83/*
84 * Request events from the queue every second (this is the number of
85 * IPMI_TIMEOUT_TIMES between event requests). Hopefully, in the
86 * future, IPMI will add a way to know immediately if an event is in
87 * the queue and this silliness can go away.
88 */
89#define IPMI_REQUEST_EV_TIME (1000 / (IPMI_TIMEOUT_TIME))
90
76/* 91/*
77 * The main "user" data structure. 92 * The main "user" data structure.
78 */ 93 */
79struct ipmi_user { 94struct ipmi_user {
80 struct list_head link; 95 struct list_head link;
81 96
82 /* Set to "0" when the user is destroyed. */ 97 /* Set to false when the user is destroyed. */
83 int valid; 98 bool valid;
84 99
85 struct kref refcount; 100 struct kref refcount;
86 101
@@ -92,7 +107,7 @@ struct ipmi_user {
92 ipmi_smi_t intf; 107 ipmi_smi_t intf;
93 108
94 /* Does this interface receive IPMI events? */ 109 /* Does this interface receive IPMI events? */
95 int gets_events; 110 bool gets_events;
96}; 111};
97 112
98struct cmd_rcvr { 113struct cmd_rcvr {
@@ -383,6 +398,9 @@ struct ipmi_smi {
383 unsigned int waiting_events_count; /* How many events in queue? */ 398 unsigned int waiting_events_count; /* How many events in queue? */
384 char delivering_events; 399 char delivering_events;
385 char event_msg_printed; 400 char event_msg_printed;
401 atomic_t event_waiters;
402 unsigned int ticks_to_req_ev;
403 int last_needs_timer;
386 404
387 /* 405 /*
388 * The event receiver for my BMC, only really used at panic 406 * The event receiver for my BMC, only really used at panic
@@ -395,7 +413,7 @@ struct ipmi_smi {
395 413
396 /* For handling of maintenance mode. */ 414 /* For handling of maintenance mode. */
397 int maintenance_mode; 415 int maintenance_mode;
398 int maintenance_mode_enable; 416 bool maintenance_mode_enable;
399 int auto_maintenance_timeout; 417 int auto_maintenance_timeout;
400 spinlock_t maintenance_mode_lock; /* Used in a timer... */ 418 spinlock_t maintenance_mode_lock; /* Used in a timer... */
401 419
@@ -451,7 +469,6 @@ static DEFINE_MUTEX(ipmi_interfaces_mutex);
451static LIST_HEAD(smi_watchers); 469static LIST_HEAD(smi_watchers);
452static DEFINE_MUTEX(smi_watchers_mutex); 470static DEFINE_MUTEX(smi_watchers_mutex);
453 471
454
455#define ipmi_inc_stat(intf, stat) \ 472#define ipmi_inc_stat(intf, stat) \
456 atomic_inc(&(intf)->stats[IPMI_STAT_ ## stat]) 473 atomic_inc(&(intf)->stats[IPMI_STAT_ ## stat])
457#define ipmi_get_stat(intf, stat) \ 474#define ipmi_get_stat(intf, stat) \
@@ -772,6 +789,7 @@ static int intf_next_seq(ipmi_smi_t intf,
772 *seq = i; 789 *seq = i;
773 *seqid = intf->seq_table[i].seqid; 790 *seqid = intf->seq_table[i].seqid;
774 intf->curr_seq = (i+1)%IPMI_IPMB_NUM_SEQ; 791 intf->curr_seq = (i+1)%IPMI_IPMB_NUM_SEQ;
792 need_waiter(intf);
775 } else { 793 } else {
776 rv = -EAGAIN; 794 rv = -EAGAIN;
777 } 795 }
@@ -941,7 +959,7 @@ int ipmi_create_user(unsigned int if_num,
941 new_user->handler = handler; 959 new_user->handler = handler;
942 new_user->handler_data = handler_data; 960 new_user->handler_data = handler_data;
943 new_user->intf = intf; 961 new_user->intf = intf;
944 new_user->gets_events = 0; 962 new_user->gets_events = false;
945 963
946 if (!try_module_get(intf->handlers->owner)) { 964 if (!try_module_get(intf->handlers->owner)) {
947 rv = -ENODEV; 965 rv = -ENODEV;
@@ -962,10 +980,15 @@ int ipmi_create_user(unsigned int if_num,
962 */ 980 */
963 mutex_unlock(&ipmi_interfaces_mutex); 981 mutex_unlock(&ipmi_interfaces_mutex);
964 982
965 new_user->valid = 1; 983 new_user->valid = true;
966 spin_lock_irqsave(&intf->seq_lock, flags); 984 spin_lock_irqsave(&intf->seq_lock, flags);
967 list_add_rcu(&new_user->link, &intf->users); 985 list_add_rcu(&new_user->link, &intf->users);
968 spin_unlock_irqrestore(&intf->seq_lock, flags); 986 spin_unlock_irqrestore(&intf->seq_lock, flags);
987 if (handler->ipmi_watchdog_pretimeout) {
988 /* User wants pretimeouts, so make sure to watch for them. */
989 if (atomic_inc_return(&intf->event_waiters) == 1)
990 need_waiter(intf);
991 }
969 *user = new_user; 992 *user = new_user;
970 return 0; 993 return 0;
971 994
@@ -1019,7 +1042,13 @@ int ipmi_destroy_user(ipmi_user_t user)
1019 struct cmd_rcvr *rcvr; 1042 struct cmd_rcvr *rcvr;
1020 struct cmd_rcvr *rcvrs = NULL; 1043 struct cmd_rcvr *rcvrs = NULL;
1021 1044
1022 user->valid = 0; 1045 user->valid = false;
1046
1047 if (user->handler->ipmi_watchdog_pretimeout)
1048 atomic_dec(&intf->event_waiters);
1049
1050 if (user->gets_events)
1051 atomic_dec(&intf->event_waiters);
1023 1052
1024 /* Remove the user from the interface's sequence table. */ 1053 /* Remove the user from the interface's sequence table. */
1025 spin_lock_irqsave(&intf->seq_lock, flags); 1054 spin_lock_irqsave(&intf->seq_lock, flags);
@@ -1155,25 +1184,23 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode)
1155 if (intf->maintenance_mode != mode) { 1184 if (intf->maintenance_mode != mode) {
1156 switch (mode) { 1185 switch (mode) {
1157 case IPMI_MAINTENANCE_MODE_AUTO: 1186 case IPMI_MAINTENANCE_MODE_AUTO:
1158 intf->maintenance_mode = mode;
1159 intf->maintenance_mode_enable 1187 intf->maintenance_mode_enable
1160 = (intf->auto_maintenance_timeout > 0); 1188 = (intf->auto_maintenance_timeout > 0);
1161 break; 1189 break;
1162 1190
1163 case IPMI_MAINTENANCE_MODE_OFF: 1191 case IPMI_MAINTENANCE_MODE_OFF:
1164 intf->maintenance_mode = mode; 1192 intf->maintenance_mode_enable = false;
1165 intf->maintenance_mode_enable = 0;
1166 break; 1193 break;
1167 1194
1168 case IPMI_MAINTENANCE_MODE_ON: 1195 case IPMI_MAINTENANCE_MODE_ON:
1169 intf->maintenance_mode = mode; 1196 intf->maintenance_mode_enable = true;
1170 intf->maintenance_mode_enable = 1;
1171 break; 1197 break;
1172 1198
1173 default: 1199 default:
1174 rv = -EINVAL; 1200 rv = -EINVAL;
1175 goto out_unlock; 1201 goto out_unlock;
1176 } 1202 }
1203 intf->maintenance_mode = mode;
1177 1204
1178 maintenance_mode_update(intf); 1205 maintenance_mode_update(intf);
1179 } 1206 }
@@ -1184,7 +1211,7 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode)
1184} 1211}
1185EXPORT_SYMBOL(ipmi_set_maintenance_mode); 1212EXPORT_SYMBOL(ipmi_set_maintenance_mode);
1186 1213
1187int ipmi_set_gets_events(ipmi_user_t user, int val) 1214int ipmi_set_gets_events(ipmi_user_t user, bool val)
1188{ 1215{
1189 unsigned long flags; 1216 unsigned long flags;
1190 ipmi_smi_t intf = user->intf; 1217 ipmi_smi_t intf = user->intf;
@@ -1194,8 +1221,18 @@ int ipmi_set_gets_events(ipmi_user_t user, int val)
1194 INIT_LIST_HEAD(&msgs); 1221 INIT_LIST_HEAD(&msgs);
1195 1222
1196 spin_lock_irqsave(&intf->events_lock, flags); 1223 spin_lock_irqsave(&intf->events_lock, flags);
1224 if (user->gets_events == val)
1225 goto out;
1226
1197 user->gets_events = val; 1227 user->gets_events = val;
1198 1228
1229 if (val) {
1230 if (atomic_inc_return(&intf->event_waiters) == 1)
1231 need_waiter(intf);
1232 } else {
1233 atomic_dec(&intf->event_waiters);
1234 }
1235
1199 if (intf->delivering_events) 1236 if (intf->delivering_events)
1200 /* 1237 /*
1201 * Another thread is delivering events for this, so 1238 * Another thread is delivering events for this, so
@@ -1289,6 +1326,9 @@ int ipmi_register_for_cmd(ipmi_user_t user,
1289 goto out_unlock; 1326 goto out_unlock;
1290 } 1327 }
1291 1328
1329 if (atomic_inc_return(&intf->event_waiters) == 1)
1330 need_waiter(intf);
1331
1292 list_add_rcu(&rcvr->link, &intf->cmd_rcvrs); 1332 list_add_rcu(&rcvr->link, &intf->cmd_rcvrs);
1293 1333
1294 out_unlock: 1334 out_unlock:
@@ -1330,6 +1370,7 @@ int ipmi_unregister_for_cmd(ipmi_user_t user,
1330 mutex_unlock(&intf->cmd_rcvrs_mutex); 1370 mutex_unlock(&intf->cmd_rcvrs_mutex);
1331 synchronize_rcu(); 1371 synchronize_rcu();
1332 while (rcvrs) { 1372 while (rcvrs) {
1373 atomic_dec(&intf->event_waiters);
1333 rcvr = rcvrs; 1374 rcvr = rcvrs;
1334 rcvrs = rcvr->next; 1375 rcvrs = rcvr->next;
1335 kfree(rcvr); 1376 kfree(rcvr);
@@ -1535,7 +1576,7 @@ static int i_ipmi_request(ipmi_user_t user,
1535 = IPMI_MAINTENANCE_MODE_TIMEOUT; 1576 = IPMI_MAINTENANCE_MODE_TIMEOUT;
1536 if (!intf->maintenance_mode 1577 if (!intf->maintenance_mode
1537 && !intf->maintenance_mode_enable) { 1578 && !intf->maintenance_mode_enable) {
1538 intf->maintenance_mode_enable = 1; 1579 intf->maintenance_mode_enable = true;
1539 maintenance_mode_update(intf); 1580 maintenance_mode_update(intf);
1540 } 1581 }
1541 spin_unlock_irqrestore(&intf->maintenance_mode_lock, 1582 spin_unlock_irqrestore(&intf->maintenance_mode_lock,
@@ -2876,6 +2917,8 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
2876 (unsigned long) intf); 2917 (unsigned long) intf);
2877 atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0); 2918 atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0);
2878 spin_lock_init(&intf->events_lock); 2919 spin_lock_init(&intf->events_lock);
2920 atomic_set(&intf->event_waiters, 0);
2921 intf->ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
2879 INIT_LIST_HEAD(&intf->waiting_events); 2922 INIT_LIST_HEAD(&intf->waiting_events);
2880 intf->waiting_events_count = 0; 2923 intf->waiting_events_count = 0;
2881 mutex_init(&intf->cmd_rcvrs_mutex); 2924 mutex_init(&intf->cmd_rcvrs_mutex);
@@ -3965,7 +4008,8 @@ smi_from_recv_msg(ipmi_smi_t intf, struct ipmi_recv_msg *recv_msg,
3965 4008
3966static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent, 4009static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
3967 struct list_head *timeouts, long timeout_period, 4010 struct list_head *timeouts, long timeout_period,
3968 int slot, unsigned long *flags) 4011 int slot, unsigned long *flags,
4012 unsigned int *waiting_msgs)
3969{ 4013{
3970 struct ipmi_recv_msg *msg; 4014 struct ipmi_recv_msg *msg;
3971 struct ipmi_smi_handlers *handlers; 4015 struct ipmi_smi_handlers *handlers;
@@ -3977,8 +4021,10 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
3977 return; 4021 return;
3978 4022
3979 ent->timeout -= timeout_period; 4023 ent->timeout -= timeout_period;
3980 if (ent->timeout > 0) 4024 if (ent->timeout > 0) {
4025 (*waiting_msgs)++;
3981 return; 4026 return;
4027 }
3982 4028
3983 if (ent->retries_left == 0) { 4029 if (ent->retries_left == 0) {
3984 /* The message has used all its retries. */ 4030 /* The message has used all its retries. */
@@ -3995,6 +4041,8 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
3995 struct ipmi_smi_msg *smi_msg; 4041 struct ipmi_smi_msg *smi_msg;
3996 /* More retries, send again. */ 4042 /* More retries, send again. */
3997 4043
4044 (*waiting_msgs)++;
4045
3998 /* 4046 /*
3999 * Start with the max timer, set to normal timer after 4047 * Start with the max timer, set to normal timer after
4000 * the message is sent. 4048 * the message is sent.
@@ -4040,117 +4088,118 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
4040 } 4088 }
4041} 4089}
4042 4090
4043static void ipmi_timeout_handler(long timeout_period) 4091static unsigned int ipmi_timeout_handler(ipmi_smi_t intf, long timeout_period)
4044{ 4092{
4045 ipmi_smi_t intf;
4046 struct list_head timeouts; 4093 struct list_head timeouts;
4047 struct ipmi_recv_msg *msg, *msg2; 4094 struct ipmi_recv_msg *msg, *msg2;
4048 unsigned long flags; 4095 unsigned long flags;
4049 int i; 4096 int i;
4097 unsigned int waiting_msgs = 0;
4050 4098
4051 rcu_read_lock(); 4099 /*
4052 list_for_each_entry_rcu(intf, &ipmi_interfaces, link) { 4100 * Go through the seq table and find any messages that
4053 tasklet_schedule(&intf->recv_tasklet); 4101 * have timed out, putting them in the timeouts
4054 4102 * list.
4055 /* 4103 */
4056 * Go through the seq table and find any messages that 4104 INIT_LIST_HEAD(&timeouts);
4057 * have timed out, putting them in the timeouts 4105 spin_lock_irqsave(&intf->seq_lock, flags);
4058 * list. 4106 for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++)
4059 */ 4107 check_msg_timeout(intf, &(intf->seq_table[i]),
4060 INIT_LIST_HEAD(&timeouts); 4108 &timeouts, timeout_period, i,
4061 spin_lock_irqsave(&intf->seq_lock, flags); 4109 &flags, &waiting_msgs);
4062 for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++) 4110 spin_unlock_irqrestore(&intf->seq_lock, flags);
4063 check_msg_timeout(intf, &(intf->seq_table[i]),
4064 &timeouts, timeout_period, i,
4065 &flags);
4066 spin_unlock_irqrestore(&intf->seq_lock, flags);
4067 4111
4068 list_for_each_entry_safe(msg, msg2, &timeouts, link) 4112 list_for_each_entry_safe(msg, msg2, &timeouts, link)
4069 deliver_err_response(msg, IPMI_TIMEOUT_COMPLETION_CODE); 4113 deliver_err_response(msg, IPMI_TIMEOUT_COMPLETION_CODE);
4070 4114
4071 /* 4115 /*
4072 * Maintenance mode handling. Check the timeout 4116 * Maintenance mode handling. Check the timeout
4073 * optimistically before we claim the lock. It may 4117 * optimistically before we claim the lock. It may
4074 * mean a timeout gets missed occasionally, but that 4118 * mean a timeout gets missed occasionally, but that
4075 * only means the timeout gets extended by one period 4119 * only means the timeout gets extended by one period
4076 * in that case. No big deal, and it avoids the lock 4120 * in that case. No big deal, and it avoids the lock
4077 * most of the time. 4121 * most of the time.
4078 */ 4122 */
4123 if (intf->auto_maintenance_timeout > 0) {
4124 spin_lock_irqsave(&intf->maintenance_mode_lock, flags);
4079 if (intf->auto_maintenance_timeout > 0) { 4125 if (intf->auto_maintenance_timeout > 0) {
4080 spin_lock_irqsave(&intf->maintenance_mode_lock, flags); 4126 intf->auto_maintenance_timeout
4081 if (intf->auto_maintenance_timeout > 0) { 4127 -= timeout_period;
4082 intf->auto_maintenance_timeout 4128 if (!intf->maintenance_mode
4083 -= timeout_period; 4129 && (intf->auto_maintenance_timeout <= 0)) {
4084 if (!intf->maintenance_mode 4130 intf->maintenance_mode_enable = false;
4085 && (intf->auto_maintenance_timeout <= 0)) { 4131 maintenance_mode_update(intf);
4086 intf->maintenance_mode_enable = 0;
4087 maintenance_mode_update(intf);
4088 }
4089 } 4132 }
4090 spin_unlock_irqrestore(&intf->maintenance_mode_lock,
4091 flags);
4092 } 4133 }
4134 spin_unlock_irqrestore(&intf->maintenance_mode_lock,
4135 flags);
4093 } 4136 }
4094 rcu_read_unlock(); 4137
4138 tasklet_schedule(&intf->recv_tasklet);
4139
4140 return waiting_msgs;
4095} 4141}
4096 4142
4097static void ipmi_request_event(void) 4143static void ipmi_request_event(ipmi_smi_t intf)
4098{ 4144{
4099 ipmi_smi_t intf;
4100 struct ipmi_smi_handlers *handlers; 4145 struct ipmi_smi_handlers *handlers;
4101 4146
4102 rcu_read_lock(); 4147 /* No event requests when in maintenance mode. */
4103 /* 4148 if (intf->maintenance_mode_enable)
4104 * Called from the timer, no need to check if handlers is 4149 return;
4105 * valid.
4106 */
4107 list_for_each_entry_rcu(intf, &ipmi_interfaces, link) {
4108 /* No event requests when in maintenance mode. */
4109 if (intf->maintenance_mode_enable)
4110 continue;
4111 4150
4112 handlers = intf->handlers; 4151 handlers = intf->handlers;
4113 if (handlers) 4152 if (handlers)
4114 handlers->request_events(intf->send_info); 4153 handlers->request_events(intf->send_info);
4115 }
4116 rcu_read_unlock();
4117} 4154}
4118 4155
4119static struct timer_list ipmi_timer; 4156static struct timer_list ipmi_timer;
4120 4157
4121/* Call every ~1000 ms. */
4122#define IPMI_TIMEOUT_TIME 1000
4123
4124/* How many jiffies does it take to get to the timeout time. */
4125#define IPMI_TIMEOUT_JIFFIES ((IPMI_TIMEOUT_TIME * HZ) / 1000)
4126
4127/*
4128 * Request events from the queue every second (this is the number of
4129 * IPMI_TIMEOUT_TIMES between event requests). Hopefully, in the
4130 * future, IPMI will add a way to know immediately if an event is in
4131 * the queue and this silliness can go away.
4132 */
4133#define IPMI_REQUEST_EV_TIME (1000 / (IPMI_TIMEOUT_TIME))
4134
4135static atomic_t stop_operation; 4158static atomic_t stop_operation;
4136static unsigned int ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
4137 4159
4138static void ipmi_timeout(unsigned long data) 4160static void ipmi_timeout(unsigned long data)
4139{ 4161{
4162 ipmi_smi_t intf;
4163 int nt = 0;
4164
4140 if (atomic_read(&stop_operation)) 4165 if (atomic_read(&stop_operation))
4141 return; 4166 return;
4142 4167
4143 ticks_to_req_ev--; 4168 rcu_read_lock();
4144 if (ticks_to_req_ev == 0) { 4169 list_for_each_entry_rcu(intf, &ipmi_interfaces, link) {
4145 ipmi_request_event(); 4170 int lnt = 0;
4146 ticks_to_req_ev = IPMI_REQUEST_EV_TIME; 4171
4147 } 4172 if (atomic_read(&intf->event_waiters)) {
4173 intf->ticks_to_req_ev--;
4174 if (intf->ticks_to_req_ev == 0) {
4175 ipmi_request_event(intf);
4176 intf->ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
4177 }
4178 lnt++;
4179 }
4148 4180
4149 ipmi_timeout_handler(IPMI_TIMEOUT_TIME); 4181 lnt += ipmi_timeout_handler(intf, IPMI_TIMEOUT_TIME);
4150 4182
4151 mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES); 4183 lnt = !!lnt;
4184 if (lnt != intf->last_needs_timer &&
4185 intf->handlers->set_need_watch)
4186 intf->handlers->set_need_watch(intf->send_info, lnt);
4187 intf->last_needs_timer = lnt;
4188
4189 nt += lnt;
4190 }
4191 rcu_read_unlock();
4192
4193 if (nt)
4194 mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);
4152} 4195}
4153 4196
4197static void need_waiter(ipmi_smi_t intf)
4198{
4199 /* Racy, but worst case we start the timer twice. */
4200 if (!timer_pending(&ipmi_timer))
4201 mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);
4202}
4154 4203
4155static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0); 4204static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0);
4156static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0); 4205static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0);
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index b7efd3c1a882..1c4bb4f6ce93 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -217,7 +217,7 @@ struct smi_info {
217 unsigned char msg_flags; 217 unsigned char msg_flags;
218 218
219 /* Does the BMC have an event buffer? */ 219 /* Does the BMC have an event buffer? */
220 char has_event_buffer; 220 bool has_event_buffer;
221 221
222 /* 222 /*
223 * If set to true, this will request events the next time the 223 * If set to true, this will request events the next time the
@@ -230,7 +230,7 @@ struct smi_info {
230 * call. Generally used after a panic to make sure stuff goes 230 * call. Generally used after a panic to make sure stuff goes
231 * out. 231 * out.
232 */ 232 */
233 int run_to_completion; 233 bool run_to_completion;
234 234
235 /* The I/O port of an SI interface. */ 235 /* The I/O port of an SI interface. */
236 int port; 236 int port;
@@ -248,19 +248,25 @@ struct smi_info {
248 /* The timer for this si. */ 248 /* The timer for this si. */
249 struct timer_list si_timer; 249 struct timer_list si_timer;
250 250
251 /* This flag is set, if the timer is running (timer_pending() isn't enough) */
252 bool timer_running;
253
251 /* The time (in jiffies) the last timeout occurred at. */ 254 /* The time (in jiffies) the last timeout occurred at. */
252 unsigned long last_timeout_jiffies; 255 unsigned long last_timeout_jiffies;
253 256
254 /* Used to gracefully stop the timer without race conditions. */ 257 /* Used to gracefully stop the timer without race conditions. */
255 atomic_t stop_operation; 258 atomic_t stop_operation;
256 259
260 /* Are we waiting for the events, pretimeouts, received msgs? */
261 atomic_t need_watch;
262
257 /* 263 /*
258 * The driver will disable interrupts when it gets into a 264 * The driver will disable interrupts when it gets into a
259 * situation where it cannot handle messages due to lack of 265 * situation where it cannot handle messages due to lack of
260 * memory. Once that situation clears up, it will re-enable 266 * memory. Once that situation clears up, it will re-enable
261 * interrupts. 267 * interrupts.
262 */ 268 */
263 int interrupt_disabled; 269 bool interrupt_disabled;
264 270
265 /* From the get device id response... */ 271 /* From the get device id response... */
266 struct ipmi_device_id device_id; 272 struct ipmi_device_id device_id;
@@ -273,7 +279,7 @@ struct smi_info {
273 * True if we allocated the device, false if it came from 279 * True if we allocated the device, false if it came from
274 * someplace else (like PCI). 280 * someplace else (like PCI).
275 */ 281 */
276 int dev_registered; 282 bool dev_registered;
277 283
278 /* Slave address, could be reported from DMI. */ 284 /* Slave address, could be reported from DMI. */
279 unsigned char slave_addr; 285 unsigned char slave_addr;
@@ -297,19 +303,19 @@ struct smi_info {
297static int force_kipmid[SI_MAX_PARMS]; 303static int force_kipmid[SI_MAX_PARMS];
298static int num_force_kipmid; 304static int num_force_kipmid;
299#ifdef CONFIG_PCI 305#ifdef CONFIG_PCI
300static int pci_registered; 306static bool pci_registered;
301#endif 307#endif
302#ifdef CONFIG_ACPI 308#ifdef CONFIG_ACPI
303static int pnp_registered; 309static bool pnp_registered;
304#endif 310#endif
305#ifdef CONFIG_PARISC 311#ifdef CONFIG_PARISC
306static int parisc_registered; 312static bool parisc_registered;
307#endif 313#endif
308 314
309static unsigned int kipmid_max_busy_us[SI_MAX_PARMS]; 315static unsigned int kipmid_max_busy_us[SI_MAX_PARMS];
310static int num_max_busy_us; 316static int num_max_busy_us;
311 317
312static int unload_when_empty = 1; 318static bool unload_when_empty = true;
313 319
314static int add_smi(struct smi_info *smi); 320static int add_smi(struct smi_info *smi);
315static int try_smi_init(struct smi_info *smi); 321static int try_smi_init(struct smi_info *smi);
@@ -434,6 +440,13 @@ static void start_clear_flags(struct smi_info *smi_info)
434 smi_info->si_state = SI_CLEARING_FLAGS; 440 smi_info->si_state = SI_CLEARING_FLAGS;
435} 441}
436 442
443static void smi_mod_timer(struct smi_info *smi_info, unsigned long new_val)
444{
445 smi_info->last_timeout_jiffies = jiffies;
446 mod_timer(&smi_info->si_timer, new_val);
447 smi_info->timer_running = true;
448}
449
437/* 450/*
438 * When we have a situtaion where we run out of memory and cannot 451 * When we have a situtaion where we run out of memory and cannot
439 * allocate messages, we just leave them in the BMC and run the system 452 * allocate messages, we just leave them in the BMC and run the system
@@ -444,10 +457,9 @@ static inline void disable_si_irq(struct smi_info *smi_info)
444{ 457{
445 if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { 458 if ((smi_info->irq) && (!smi_info->interrupt_disabled)) {
446 start_disable_irq(smi_info); 459 start_disable_irq(smi_info);
447 smi_info->interrupt_disabled = 1; 460 smi_info->interrupt_disabled = true;
448 if (!atomic_read(&smi_info->stop_operation)) 461 if (!atomic_read(&smi_info->stop_operation))
449 mod_timer(&smi_info->si_timer, 462 smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
450 jiffies + SI_TIMEOUT_JIFFIES);
451 } 463 }
452} 464}
453 465
@@ -455,7 +467,7 @@ static inline void enable_si_irq(struct smi_info *smi_info)
455{ 467{
456 if ((smi_info->irq) && (smi_info->interrupt_disabled)) { 468 if ((smi_info->irq) && (smi_info->interrupt_disabled)) {
457 start_enable_irq(smi_info); 469 start_enable_irq(smi_info);
458 smi_info->interrupt_disabled = 0; 470 smi_info->interrupt_disabled = false;
459 } 471 }
460} 472}
461 473
@@ -700,7 +712,7 @@ static void handle_transaction_done(struct smi_info *smi_info)
700 dev_warn(smi_info->dev, 712 dev_warn(smi_info->dev,
701 "Maybe ok, but ipmi might run very slowly.\n"); 713 "Maybe ok, but ipmi might run very slowly.\n");
702 } else 714 } else
703 smi_info->interrupt_disabled = 0; 715 smi_info->interrupt_disabled = false;
704 smi_info->si_state = SI_NORMAL; 716 smi_info->si_state = SI_NORMAL;
705 break; 717 break;
706 } 718 }
@@ -853,6 +865,19 @@ static enum si_sm_result smi_event_handler(struct smi_info *smi_info,
853 return si_sm_result; 865 return si_sm_result;
854} 866}
855 867
868static void check_start_timer_thread(struct smi_info *smi_info)
869{
870 if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) {
871 smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
872
873 if (smi_info->thread)
874 wake_up_process(smi_info->thread);
875
876 start_next_msg(smi_info);
877 smi_event_handler(smi_info, 0);
878 }
879}
880
856static void sender(void *send_info, 881static void sender(void *send_info,
857 struct ipmi_smi_msg *msg, 882 struct ipmi_smi_msg *msg,
858 int priority) 883 int priority)
@@ -906,27 +931,11 @@ static void sender(void *send_info,
906 else 931 else
907 list_add_tail(&msg->link, &smi_info->xmit_msgs); 932 list_add_tail(&msg->link, &smi_info->xmit_msgs);
908 933
909 if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) { 934 check_start_timer_thread(smi_info);
910 /*
911 * last_timeout_jiffies is updated here to avoid
912 * smi_timeout() handler passing very large time_diff
913 * value to smi_event_handler() that causes
914 * the send command to abort.
915 */
916 smi_info->last_timeout_jiffies = jiffies;
917
918 mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
919
920 if (smi_info->thread)
921 wake_up_process(smi_info->thread);
922
923 start_next_msg(smi_info);
924 smi_event_handler(smi_info, 0);
925 }
926 spin_unlock_irqrestore(&smi_info->si_lock, flags); 935 spin_unlock_irqrestore(&smi_info->si_lock, flags);
927} 936}
928 937
929static void set_run_to_completion(void *send_info, int i_run_to_completion) 938static void set_run_to_completion(void *send_info, bool i_run_to_completion)
930{ 939{
931 struct smi_info *smi_info = send_info; 940 struct smi_info *smi_info = send_info;
932 enum si_sm_result result; 941 enum si_sm_result result;
@@ -1004,6 +1013,17 @@ static int ipmi_thread(void *data)
1004 1013
1005 spin_lock_irqsave(&(smi_info->si_lock), flags); 1014 spin_lock_irqsave(&(smi_info->si_lock), flags);
1006 smi_result = smi_event_handler(smi_info, 0); 1015 smi_result = smi_event_handler(smi_info, 0);
1016
1017 /*
1018 * If the driver is doing something, there is a possible
1019 * race with the timer. If the timer handler see idle,
1020 * and the thread here sees something else, the timer
1021 * handler won't restart the timer even though it is
1022 * required. So start it here if necessary.
1023 */
1024 if (smi_result != SI_SM_IDLE && !smi_info->timer_running)
1025 smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
1026
1007 spin_unlock_irqrestore(&(smi_info->si_lock), flags); 1027 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
1008 busy_wait = ipmi_thread_busy_wait(smi_result, smi_info, 1028 busy_wait = ipmi_thread_busy_wait(smi_result, smi_info,
1009 &busy_until); 1029 &busy_until);
@@ -1011,9 +1031,15 @@ static int ipmi_thread(void *data)
1011 ; /* do nothing */ 1031 ; /* do nothing */
1012 else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait) 1032 else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait)
1013 schedule(); 1033 schedule();
1014 else if (smi_result == SI_SM_IDLE) 1034 else if (smi_result == SI_SM_IDLE) {
1015 schedule_timeout_interruptible(100); 1035 if (atomic_read(&smi_info->need_watch)) {
1016 else 1036 schedule_timeout_interruptible(100);
1037 } else {
1038 /* Wait to be woken up when we are needed. */
1039 __set_current_state(TASK_INTERRUPTIBLE);
1040 schedule();
1041 }
1042 } else
1017 schedule_timeout_interruptible(1); 1043 schedule_timeout_interruptible(1);
1018 } 1044 }
1019 return 0; 1045 return 0;
@@ -1024,7 +1050,7 @@ static void poll(void *send_info)
1024{ 1050{
1025 struct smi_info *smi_info = send_info; 1051 struct smi_info *smi_info = send_info;
1026 unsigned long flags = 0; 1052 unsigned long flags = 0;
1027 int run_to_completion = smi_info->run_to_completion; 1053 bool run_to_completion = smi_info->run_to_completion;
1028 1054
1029 /* 1055 /*
1030 * Make sure there is some delay in the poll loop so we can 1056 * Make sure there is some delay in the poll loop so we can
@@ -1049,6 +1075,17 @@ static void request_events(void *send_info)
1049 atomic_set(&smi_info->req_events, 1); 1075 atomic_set(&smi_info->req_events, 1);
1050} 1076}
1051 1077
1078static void set_need_watch(void *send_info, bool enable)
1079{
1080 struct smi_info *smi_info = send_info;
1081 unsigned long flags;
1082
1083 atomic_set(&smi_info->need_watch, enable);
1084 spin_lock_irqsave(&smi_info->si_lock, flags);
1085 check_start_timer_thread(smi_info);
1086 spin_unlock_irqrestore(&smi_info->si_lock, flags);
1087}
1088
1052static int initialized; 1089static int initialized;
1053 1090
1054static void smi_timeout(unsigned long data) 1091static void smi_timeout(unsigned long data)
@@ -1073,10 +1110,6 @@ static void smi_timeout(unsigned long data)
1073 * SI_USEC_PER_JIFFY); 1110 * SI_USEC_PER_JIFFY);
1074 smi_result = smi_event_handler(smi_info, time_diff); 1111 smi_result = smi_event_handler(smi_info, time_diff);
1075 1112
1076 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
1077
1078 smi_info->last_timeout_jiffies = jiffies_now;
1079
1080 if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { 1113 if ((smi_info->irq) && (!smi_info->interrupt_disabled)) {
1081 /* Running with interrupts, only do long timeouts. */ 1114 /* Running with interrupts, only do long timeouts. */
1082 timeout = jiffies + SI_TIMEOUT_JIFFIES; 1115 timeout = jiffies + SI_TIMEOUT_JIFFIES;
@@ -1098,7 +1131,10 @@ static void smi_timeout(unsigned long data)
1098 1131
1099 do_mod_timer: 1132 do_mod_timer:
1100 if (smi_result != SI_SM_IDLE) 1133 if (smi_result != SI_SM_IDLE)
1101 mod_timer(&(smi_info->si_timer), timeout); 1134 smi_mod_timer(smi_info, timeout);
1135 else
1136 smi_info->timer_running = false;
1137 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
1102} 1138}
1103 1139
1104static irqreturn_t si_irq_handler(int irq, void *data) 1140static irqreturn_t si_irq_handler(int irq, void *data)
@@ -1146,8 +1182,7 @@ static int smi_start_processing(void *send_info,
1146 1182
1147 /* Set up the timer that drives the interface. */ 1183 /* Set up the timer that drives the interface. */
1148 setup_timer(&new_smi->si_timer, smi_timeout, (long)new_smi); 1184 setup_timer(&new_smi->si_timer, smi_timeout, (long)new_smi);
1149 new_smi->last_timeout_jiffies = jiffies; 1185 smi_mod_timer(new_smi, jiffies + SI_TIMEOUT_JIFFIES);
1150 mod_timer(&new_smi->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
1151 1186
1152 /* 1187 /*
1153 * Check if the user forcefully enabled the daemon. 1188 * Check if the user forcefully enabled the daemon.
@@ -1188,7 +1223,7 @@ static int get_smi_info(void *send_info, struct ipmi_smi_info *data)
1188 return 0; 1223 return 0;
1189} 1224}
1190 1225
1191static void set_maintenance_mode(void *send_info, int enable) 1226static void set_maintenance_mode(void *send_info, bool enable)
1192{ 1227{
1193 struct smi_info *smi_info = send_info; 1228 struct smi_info *smi_info = send_info;
1194 1229
@@ -1202,6 +1237,7 @@ static struct ipmi_smi_handlers handlers = {
1202 .get_smi_info = get_smi_info, 1237 .get_smi_info = get_smi_info,
1203 .sender = sender, 1238 .sender = sender,
1204 .request_events = request_events, 1239 .request_events = request_events,
1240 .set_need_watch = set_need_watch,
1205 .set_maintenance_mode = set_maintenance_mode, 1241 .set_maintenance_mode = set_maintenance_mode,
1206 .set_run_to_completion = set_run_to_completion, 1242 .set_run_to_completion = set_run_to_completion,
1207 .poll = poll, 1243 .poll = poll,
@@ -1229,7 +1265,7 @@ static bool si_tryplatform = 1;
1229#ifdef CONFIG_PCI 1265#ifdef CONFIG_PCI
1230static bool si_trypci = 1; 1266static bool si_trypci = 1;
1231#endif 1267#endif
1232static bool si_trydefaults = 1; 1268static bool si_trydefaults = IS_ENABLED(CONFIG_IPMI_SI_PROBE_DEFAULTS);
1233static char *si_type[SI_MAX_PARMS]; 1269static char *si_type[SI_MAX_PARMS];
1234#define MAX_SI_TYPE_STR 30 1270#define MAX_SI_TYPE_STR 30
1235static char si_type_str[MAX_SI_TYPE_STR]; 1271static char si_type_str[MAX_SI_TYPE_STR];
@@ -1328,7 +1364,7 @@ module_param_array(force_kipmid, int, &num_force_kipmid, 0);
1328MODULE_PARM_DESC(force_kipmid, "Force the kipmi daemon to be enabled (1) or" 1364MODULE_PARM_DESC(force_kipmid, "Force the kipmi daemon to be enabled (1) or"
1329 " disabled(0). Normally the IPMI driver auto-detects" 1365 " disabled(0). Normally the IPMI driver auto-detects"
1330 " this, but the value may be overridden by this parm."); 1366 " this, but the value may be overridden by this parm.");
1331module_param(unload_when_empty, int, 0); 1367module_param(unload_when_empty, bool, 0);
1332MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are" 1368MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are"
1333 " specified or found, default is 1. Setting to 0" 1369 " specified or found, default is 1. Setting to 0"
1334 " is useful for hot add of devices using hotmod."); 1370 " is useful for hot add of devices using hotmod.");
@@ -3336,18 +3372,19 @@ static int try_smi_init(struct smi_info *new_smi)
3336 INIT_LIST_HEAD(&(new_smi->hp_xmit_msgs)); 3372 INIT_LIST_HEAD(&(new_smi->hp_xmit_msgs));
3337 new_smi->curr_msg = NULL; 3373 new_smi->curr_msg = NULL;
3338 atomic_set(&new_smi->req_events, 0); 3374 atomic_set(&new_smi->req_events, 0);
3339 new_smi->run_to_completion = 0; 3375 new_smi->run_to_completion = false;
3340 for (i = 0; i < SI_NUM_STATS; i++) 3376 for (i = 0; i < SI_NUM_STATS; i++)
3341 atomic_set(&new_smi->stats[i], 0); 3377 atomic_set(&new_smi->stats[i], 0);
3342 3378
3343 new_smi->interrupt_disabled = 1; 3379 new_smi->interrupt_disabled = true;
3344 atomic_set(&new_smi->stop_operation, 0); 3380 atomic_set(&new_smi->stop_operation, 0);
3381 atomic_set(&new_smi->need_watch, 0);
3345 new_smi->intf_num = smi_num; 3382 new_smi->intf_num = smi_num;
3346 smi_num++; 3383 smi_num++;
3347 3384
3348 rv = try_enable_event_buffer(new_smi); 3385 rv = try_enable_event_buffer(new_smi);
3349 if (rv == 0) 3386 if (rv == 0)
3350 new_smi->has_event_buffer = 1; 3387 new_smi->has_event_buffer = true;
3351 3388
3352 /* 3389 /*
3353 * Start clearing the flags before we enable interrupts or the 3390 * Start clearing the flags before we enable interrupts or the
@@ -3381,7 +3418,7 @@ static int try_smi_init(struct smi_info *new_smi)
3381 rv); 3418 rv);
3382 goto out_err; 3419 goto out_err;
3383 } 3420 }
3384 new_smi->dev_registered = 1; 3421 new_smi->dev_registered = true;
3385 } 3422 }
3386 3423
3387 rv = ipmi_register_smi(&handlers, 3424 rv = ipmi_register_smi(&handlers,
@@ -3430,7 +3467,7 @@ static int try_smi_init(struct smi_info *new_smi)
3430 wait_for_timer_and_thread(new_smi); 3467 wait_for_timer_and_thread(new_smi);
3431 3468
3432 out_err: 3469 out_err:
3433 new_smi->interrupt_disabled = 1; 3470 new_smi->interrupt_disabled = true;
3434 3471
3435 if (new_smi->intf) { 3472 if (new_smi->intf) {
3436 ipmi_unregister_smi(new_smi->intf); 3473 ipmi_unregister_smi(new_smi->intf);
@@ -3466,7 +3503,7 @@ static int try_smi_init(struct smi_info *new_smi)
3466 3503
3467 if (new_smi->dev_registered) { 3504 if (new_smi->dev_registered) {
3468 platform_device_unregister(new_smi->pdev); 3505 platform_device_unregister(new_smi->pdev);
3469 new_smi->dev_registered = 0; 3506 new_smi->dev_registered = false;
3470 } 3507 }
3471 3508
3472 return rv; 3509 return rv;
@@ -3521,14 +3558,14 @@ static int init_ipmi_si(void)
3521 printk(KERN_ERR PFX "Unable to register " 3558 printk(KERN_ERR PFX "Unable to register "
3522 "PCI driver: %d\n", rv); 3559 "PCI driver: %d\n", rv);
3523 else 3560 else
3524 pci_registered = 1; 3561 pci_registered = true;
3525 } 3562 }
3526#endif 3563#endif
3527 3564
3528#ifdef CONFIG_ACPI 3565#ifdef CONFIG_ACPI
3529 if (si_tryacpi) { 3566 if (si_tryacpi) {
3530 pnp_register_driver(&ipmi_pnp_driver); 3567 pnp_register_driver(&ipmi_pnp_driver);
3531 pnp_registered = 1; 3568 pnp_registered = true;
3532 } 3569 }
3533#endif 3570#endif
3534 3571
@@ -3544,7 +3581,7 @@ static int init_ipmi_si(void)
3544 3581
3545#ifdef CONFIG_PARISC 3582#ifdef CONFIG_PARISC
3546 register_parisc_driver(&ipmi_parisc_driver); 3583 register_parisc_driver(&ipmi_parisc_driver);
3547 parisc_registered = 1; 3584 parisc_registered = true;
3548 /* poking PC IO addresses will crash machine, don't do it */ 3585 /* poking PC IO addresses will crash machine, don't do it */
3549 si_trydefaults = 0; 3586 si_trydefaults = 0;
3550#endif 3587#endif
diff --git a/drivers/char/pcmcia/Kconfig b/drivers/char/pcmcia/Kconfig
index b27f5342fe76..8d3dfb0c8a26 100644
--- a/drivers/char/pcmcia/Kconfig
+++ b/drivers/char/pcmcia/Kconfig
@@ -15,7 +15,7 @@ config SYNCLINK_CS
15 15
16 This driver may be built as a module ( = code which can be 16 This driver may be built as a module ( = code which can be
17 inserted in and removed from the running kernel whenever you want). 17 inserted in and removed from the running kernel whenever you want).
18 The module will be called synclinkmp. If you want to do that, say M 18 The module will be called synclink_cs. If you want to do that, say M
19 here. 19 here.
20 20
21config CARDMAN_4000 21config CARDMAN_4000
diff --git a/drivers/char/ttyprintk.c b/drivers/char/ttyprintk.c
index daea84c41743..a15ce4ef39cd 100644
--- a/drivers/char/ttyprintk.c
+++ b/drivers/char/ttyprintk.c
@@ -17,7 +17,7 @@
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/serial.h> 18#include <linux/serial.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/export.h> 20#include <linux/module.h>
21 21
22struct ttyprintk_port { 22struct ttyprintk_port {
23 struct tty_port port; 23 struct tty_port port;
@@ -210,10 +210,19 @@ static int __init ttyprintk_init(void)
210 return 0; 210 return 0;
211 211
212error: 212error:
213 tty_unregister_driver(ttyprintk_driver);
214 put_tty_driver(ttyprintk_driver); 213 put_tty_driver(ttyprintk_driver);
215 tty_port_destroy(&tpk_port.port); 214 tty_port_destroy(&tpk_port.port);
216 ttyprintk_driver = NULL;
217 return ret; 215 return ret;
218} 216}
217
218static void __exit ttyprintk_exit(void)
219{
220 tty_unregister_driver(ttyprintk_driver);
221 put_tty_driver(ttyprintk_driver);
222 tty_port_destroy(&tpk_port.port);
223}
224
219device_initcall(ttyprintk_init); 225device_initcall(ttyprintk_init);
226module_exit(ttyprintk_exit);
227
228MODULE_LICENSE("GPL");
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 166e02f16c8a..cc37c342c4cb 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -764,7 +764,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
764 [tegra_clk_sdmmc2_8] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true }, 764 [tegra_clk_sdmmc2_8] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true },
765 [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true }, 765 [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true },
766 [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true }, 766 [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true },
767 [tegra_clk_ndflash] = { .dt_id = TEGRA124_CLK_NDFLASH, .present = true },
768 [tegra_clk_sdmmc1_8] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true }, 767 [tegra_clk_sdmmc1_8] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true },
769 [tegra_clk_sdmmc4_8] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true }, 768 [tegra_clk_sdmmc4_8] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true },
770 [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true }, 769 [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true },
@@ -809,7 +808,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
809 [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true }, 808 [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true },
810 [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true }, 809 [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true },
811 [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true }, 810 [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true },
812 [tegra_clk_ndspeed] = { .dt_id = TEGRA124_CLK_NDSPEED, .present = true },
813 [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true }, 811 [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true },
814 [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true }, 812 [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true },
815 [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true }, 813 [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true },
@@ -952,7 +950,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
952 [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true }, 950 [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true },
953 [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true }, 951 [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true },
954 [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true }, 952 [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true },
955 [tegra_clk_uarte] = { .dt_id = TEGRA124_CLK_UARTE, .present = true },
956}; 953};
957 954
958static struct tegra_devclk devclks[] __initdata = { 955static struct tegra_devclk devclks[] __initdata = {
diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c
index 2dc8b41a339d..422391242b39 100644
--- a/drivers/clk/versatile/clk-vexpress-osc.c
+++ b/drivers/clk/versatile/clk-vexpress-osc.c
@@ -100,9 +100,11 @@ void __init vexpress_osc_of_setup(struct device_node *node)
100 struct clk *clk; 100 struct clk *clk;
101 u32 range[2]; 101 u32 range[2];
102 102
103 vexpress_sysreg_of_early_init();
104
103 osc = kzalloc(sizeof(*osc), GFP_KERNEL); 105 osc = kzalloc(sizeof(*osc), GFP_KERNEL);
104 if (!osc) 106 if (!osc)
105 goto error; 107 return;
106 108
107 osc->func = vexpress_config_func_get_by_node(node); 109 osc->func = vexpress_config_func_get_by_node(node);
108 if (!osc->func) { 110 if (!osc->func) {
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 57e823c44d2a..5163ec13429d 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -66,6 +66,7 @@ static int arch_timer_ppi[MAX_TIMER_PPI];
66static struct clock_event_device __percpu *arch_timer_evt; 66static struct clock_event_device __percpu *arch_timer_evt;
67 67
68static bool arch_timer_use_virtual = true; 68static bool arch_timer_use_virtual = true;
69static bool arch_timer_c3stop;
69static bool arch_timer_mem_use_virtual; 70static bool arch_timer_mem_use_virtual;
70 71
71/* 72/*
@@ -263,7 +264,8 @@ static void __arch_timer_setup(unsigned type,
263 clk->features = CLOCK_EVT_FEAT_ONESHOT; 264 clk->features = CLOCK_EVT_FEAT_ONESHOT;
264 265
265 if (type == ARCH_CP15_TIMER) { 266 if (type == ARCH_CP15_TIMER) {
266 clk->features |= CLOCK_EVT_FEAT_C3STOP; 267 if (arch_timer_c3stop)
268 clk->features |= CLOCK_EVT_FEAT_C3STOP;
267 clk->name = "arch_sys_timer"; 269 clk->name = "arch_sys_timer";
268 clk->rating = 450; 270 clk->rating = 450;
269 clk->cpumask = cpumask_of(smp_processor_id()); 271 clk->cpumask = cpumask_of(smp_processor_id());
@@ -665,6 +667,8 @@ static void __init arch_timer_init(struct device_node *np)
665 } 667 }
666 } 668 }
667 669
670 arch_timer_c3stop = !of_property_read_bool(np, "always-on");
671
668 arch_timer_register(); 672 arch_timer_register();
669 arch_timer_common_init(); 673 arch_timer_common_init();
670} 674}
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index a6ee6d7cd63f..acf5a329d538 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -416,8 +416,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
416 evt->set_mode = exynos4_tick_set_mode; 416 evt->set_mode = exynos4_tick_set_mode;
417 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 417 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
418 evt->rating = 450; 418 evt->rating = 450;
419 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
420 0xf, 0x7fffffff);
421 419
422 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); 420 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
423 421
@@ -430,9 +428,12 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
430 evt->irq); 428 evt->irq);
431 return -EIO; 429 return -EIO;
432 } 430 }
431 irq_force_affinity(mct_irqs[MCT_L0_IRQ + cpu], cpumask_of(cpu));
433 } else { 432 } else {
434 enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); 433 enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
435 } 434 }
435 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
436 0xf, 0x7fffffff);
436 437
437 return 0; 438 return 0;
438} 439}
@@ -450,7 +451,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self,
450 unsigned long action, void *hcpu) 451 unsigned long action, void *hcpu)
451{ 452{
452 struct mct_clock_event_device *mevt; 453 struct mct_clock_event_device *mevt;
453 unsigned int cpu;
454 454
455 /* 455 /*
456 * Grab cpu pointer in each case to avoid spurious 456 * Grab cpu pointer in each case to avoid spurious
@@ -461,12 +461,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self,
461 mevt = this_cpu_ptr(&percpu_mct_tick); 461 mevt = this_cpu_ptr(&percpu_mct_tick);
462 exynos4_local_timer_setup(&mevt->evt); 462 exynos4_local_timer_setup(&mevt->evt);
463 break; 463 break;
464 case CPU_ONLINE:
465 cpu = (unsigned long)hcpu;
466 if (mct_int_type == MCT_INT_SPI)
467 irq_set_affinity(mct_irqs[MCT_L0_IRQ + cpu],
468 cpumask_of(cpu));
469 break;
470 case CPU_DYING: 464 case CPU_DYING:
471 mevt = this_cpu_ptr(&percpu_mct_tick); 465 mevt = this_cpu_ptr(&percpu_mct_tick);
472 exynos4_local_timer_stop(&mevt->evt); 466 exynos4_local_timer_stop(&mevt->evt);
diff --git a/drivers/clocksource/zevio-timer.c b/drivers/clocksource/zevio-timer.c
index ca81809d159d..7ce442148c3f 100644
--- a/drivers/clocksource/zevio-timer.c
+++ b/drivers/clocksource/zevio-timer.c
@@ -212,4 +212,9 @@ error_free:
212 return ret; 212 return ret;
213} 213}
214 214
215CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_add); 215static void __init zevio_timer_init(struct device_node *node)
216{
217 BUG_ON(zevio_timer_add(node));
218}
219
220CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
diff --git a/drivers/connector/cn_proc.c b/drivers/connector/cn_proc.c
index 148d707a1d43..ccdd4c7e748b 100644
--- a/drivers/connector/cn_proc.c
+++ b/drivers/connector/cn_proc.c
@@ -369,7 +369,7 @@ static void cn_proc_mcast_ctl(struct cn_msg *msg,
369 return; 369 return;
370 370
371 /* Can only change if privileged. */ 371 /* Can only change if privileged. */
372 if (!capable(CAP_NET_ADMIN)) { 372 if (!__netlink_ns_capable(nsp, &init_user_ns, CAP_NET_ADMIN)) {
373 err = EPERM; 373 err = EPERM;
374 goto out; 374 goto out;
375 } 375 }
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 0e9cce82844b..580503513f0f 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -92,11 +92,7 @@ config ARM_EXYNOS_CPU_FREQ_BOOST_SW
92 92
93config ARM_HIGHBANK_CPUFREQ 93config ARM_HIGHBANK_CPUFREQ
94 tristate "Calxeda Highbank-based" 94 tristate "Calxeda Highbank-based"
95 depends on ARCH_HIGHBANK 95 depends on ARCH_HIGHBANK && GENERIC_CPUFREQ_CPU0 && REGULATOR
96 select GENERIC_CPUFREQ_CPU0
97 select PM_OPP
98 select REGULATOR
99
100 default m 96 default m
101 help 97 help
102 This adds the CPUFreq driver for Calxeda Highbank SoC 98 This adds the CPUFreq driver for Calxeda Highbank SoC
diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c
index d00e5d1abd25..5c4369b5d834 100644
--- a/drivers/cpufreq/longhaul.c
+++ b/drivers/cpufreq/longhaul.c
@@ -242,7 +242,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index,
242 * Sets a new clock ratio. 242 * Sets a new clock ratio.
243 */ 243 */
244 244
245static void longhaul_setstate(struct cpufreq_policy *policy, 245static int longhaul_setstate(struct cpufreq_policy *policy,
246 unsigned int table_index) 246 unsigned int table_index)
247{ 247{
248 unsigned int mults_index; 248 unsigned int mults_index;
@@ -258,10 +258,12 @@ static void longhaul_setstate(struct cpufreq_policy *policy,
258 /* Safety precautions */ 258 /* Safety precautions */
259 mult = mults[mults_index & 0x1f]; 259 mult = mults[mults_index & 0x1f];
260 if (mult == -1) 260 if (mult == -1)
261 return; 261 return -EINVAL;
262
262 speed = calc_speed(mult); 263 speed = calc_speed(mult);
263 if ((speed > highest_speed) || (speed < lowest_speed)) 264 if ((speed > highest_speed) || (speed < lowest_speed))
264 return; 265 return -EINVAL;
266
265 /* Voltage transition before frequency transition? */ 267 /* Voltage transition before frequency transition? */
266 if (can_scale_voltage && longhaul_index < table_index) 268 if (can_scale_voltage && longhaul_index < table_index)
267 dir = 1; 269 dir = 1;
@@ -269,8 +271,6 @@ static void longhaul_setstate(struct cpufreq_policy *policy,
269 freqs.old = calc_speed(longhaul_get_cpu_mult()); 271 freqs.old = calc_speed(longhaul_get_cpu_mult());
270 freqs.new = speed; 272 freqs.new = speed;
271 273
272 cpufreq_freq_transition_begin(policy, &freqs);
273
274 pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n", 274 pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
275 fsb, mult/10, mult%10, print_speed(speed/1000)); 275 fsb, mult/10, mult%10, print_speed(speed/1000));
276retry_loop: 276retry_loop:
@@ -385,12 +385,14 @@ retry_loop:
385 goto retry_loop; 385 goto retry_loop;
386 } 386 }
387 } 387 }
388 /* Report true CPU frequency */
389 cpufreq_freq_transition_end(policy, &freqs, 0);
390 388
391 if (!bm_timeout) 389 if (!bm_timeout) {
392 printk(KERN_INFO PFX "Warning: Timeout while waiting for " 390 printk(KERN_INFO PFX "Warning: Timeout while waiting for "
393 "idle PCI bus.\n"); 391 "idle PCI bus.\n");
392 return -EBUSY;
393 }
394
395 return 0;
394} 396}
395 397
396/* 398/*
@@ -631,9 +633,10 @@ static int longhaul_target(struct cpufreq_policy *policy,
631 unsigned int i; 633 unsigned int i;
632 unsigned int dir = 0; 634 unsigned int dir = 0;
633 u8 vid, current_vid; 635 u8 vid, current_vid;
636 int retval = 0;
634 637
635 if (!can_scale_voltage) 638 if (!can_scale_voltage)
636 longhaul_setstate(policy, table_index); 639 retval = longhaul_setstate(policy, table_index);
637 else { 640 else {
638 /* On test system voltage transitions exceeding single 641 /* On test system voltage transitions exceeding single
639 * step up or down were turning motherboard off. Both 642 * step up or down were turning motherboard off. Both
@@ -648,7 +651,7 @@ static int longhaul_target(struct cpufreq_policy *policy,
648 while (i != table_index) { 651 while (i != table_index) {
649 vid = (longhaul_table[i].driver_data >> 8) & 0x1f; 652 vid = (longhaul_table[i].driver_data >> 8) & 0x1f;
650 if (vid != current_vid) { 653 if (vid != current_vid) {
651 longhaul_setstate(policy, i); 654 retval = longhaul_setstate(policy, i);
652 current_vid = vid; 655 current_vid = vid;
653 msleep(200); 656 msleep(200);
654 } 657 }
@@ -657,10 +660,11 @@ static int longhaul_target(struct cpufreq_policy *policy,
657 else 660 else
658 i--; 661 i--;
659 } 662 }
660 longhaul_setstate(policy, table_index); 663 retval = longhaul_setstate(policy, table_index);
661 } 664 }
665
662 longhaul_index = table_index; 666 longhaul_index = table_index;
663 return 0; 667 return retval;
664} 668}
665 669
666 670
@@ -968,7 +972,15 @@ static void __exit longhaul_exit(void)
968 972
969 for (i = 0; i < numscales; i++) { 973 for (i = 0; i < numscales; i++) {
970 if (mults[i] == maxmult) { 974 if (mults[i] == maxmult) {
975 struct cpufreq_freqs freqs;
976
977 freqs.old = policy->cur;
978 freqs.new = longhaul_table[i].frequency;
979 freqs.flags = 0;
980
981 cpufreq_freq_transition_begin(policy, &freqs);
971 longhaul_setstate(policy, i); 982 longhaul_setstate(policy, i);
983 cpufreq_freq_transition_end(policy, &freqs, 0);
972 break; 984 break;
973 } 985 }
974 } 986 }
diff --git a/drivers/cpufreq/powernow-k6.c b/drivers/cpufreq/powernow-k6.c
index 49f120e1bc7b..78904e6ca4a0 100644
--- a/drivers/cpufreq/powernow-k6.c
+++ b/drivers/cpufreq/powernow-k6.c
@@ -138,22 +138,14 @@ static void powernow_k6_set_cpu_multiplier(unsigned int best_i)
138static int powernow_k6_target(struct cpufreq_policy *policy, 138static int powernow_k6_target(struct cpufreq_policy *policy,
139 unsigned int best_i) 139 unsigned int best_i)
140{ 140{
141 struct cpufreq_freqs freqs;
142 141
143 if (clock_ratio[best_i].driver_data > max_multiplier) { 142 if (clock_ratio[best_i].driver_data > max_multiplier) {
144 printk(KERN_ERR PFX "invalid target frequency\n"); 143 printk(KERN_ERR PFX "invalid target frequency\n");
145 return -EINVAL; 144 return -EINVAL;
146 } 145 }
147 146
148 freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
149 freqs.new = busfreq * clock_ratio[best_i].driver_data;
150
151 cpufreq_freq_transition_begin(policy, &freqs);
152
153 powernow_k6_set_cpu_multiplier(best_i); 147 powernow_k6_set_cpu_multiplier(best_i);
154 148
155 cpufreq_freq_transition_end(policy, &freqs, 0);
156
157 return 0; 149 return 0;
158} 150}
159 151
@@ -227,9 +219,20 @@ have_busfreq:
227static int powernow_k6_cpu_exit(struct cpufreq_policy *policy) 219static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
228{ 220{
229 unsigned int i; 221 unsigned int i;
230 for (i = 0; i < 8; i++) { 222
231 if (i == max_multiplier) 223 for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
224 if (clock_ratio[i].driver_data == max_multiplier) {
225 struct cpufreq_freqs freqs;
226
227 freqs.old = policy->cur;
228 freqs.new = clock_ratio[i].frequency;
229 freqs.flags = 0;
230
231 cpufreq_freq_transition_begin(policy, &freqs);
232 powernow_k6_target(policy, i); 232 powernow_k6_target(policy, i);
233 cpufreq_freq_transition_end(policy, &freqs, 0);
234 break;
235 }
233 } 236 }
234 return 0; 237 return 0;
235} 238}
diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c
index f911645c3f6d..e61e224475ad 100644
--- a/drivers/cpufreq/powernow-k7.c
+++ b/drivers/cpufreq/powernow-k7.c
@@ -269,8 +269,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index)
269 269
270 freqs.new = powernow_table[index].frequency; 270 freqs.new = powernow_table[index].frequency;
271 271
272 cpufreq_freq_transition_begin(policy, &freqs);
273
274 /* Now do the magic poking into the MSRs. */ 272 /* Now do the magic poking into the MSRs. */
275 273
276 if (have_a0 == 1) /* A0 errata 5 */ 274 if (have_a0 == 1) /* A0 errata 5 */
@@ -290,8 +288,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index)
290 if (have_a0 == 1) 288 if (have_a0 == 1)
291 local_irq_enable(); 289 local_irq_enable();
292 290
293 cpufreq_freq_transition_end(policy, &freqs, 0);
294
295 return 0; 291 return 0;
296} 292}
297 293
diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
index 9edccc63245d..af4968813e76 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -29,6 +29,7 @@
29 29
30#include <asm/cputhreads.h> 30#include <asm/cputhreads.h>
31#include <asm/reg.h> 31#include <asm/reg.h>
32#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
32 33
33#define POWERNV_MAX_PSTATES 256 34#define POWERNV_MAX_PSTATES 256
34 35
diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c b/drivers/cpufreq/ppc-corenet-cpufreq.c
index b7e677be1df0..0af618abebaf 100644
--- a/drivers/cpufreq/ppc-corenet-cpufreq.c
+++ b/drivers/cpufreq/ppc-corenet-cpufreq.c
@@ -138,6 +138,7 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
138 struct cpufreq_frequency_table *table; 138 struct cpufreq_frequency_table *table;
139 struct cpu_data *data; 139 struct cpu_data *data;
140 unsigned int cpu = policy->cpu; 140 unsigned int cpu = policy->cpu;
141 u64 transition_latency_hz;
141 142
142 np = of_get_cpu_node(cpu, NULL); 143 np = of_get_cpu_node(cpu, NULL);
143 if (!np) 144 if (!np)
@@ -205,8 +206,10 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
205 for_each_cpu(i, per_cpu(cpu_mask, cpu)) 206 for_each_cpu(i, per_cpu(cpu_mask, cpu))
206 per_cpu(cpu_data, i) = data; 207 per_cpu(cpu_data, i) = data;
207 208
209 transition_latency_hz = 12ULL * NSEC_PER_SEC;
208 policy->cpuinfo.transition_latency = 210 policy->cpuinfo.transition_latency =
209 (12 * NSEC_PER_SEC) / fsl_get_sys_freq(); 211 do_div(transition_latency_hz, fsl_get_sys_freq());
212
210 of_node_put(np); 213 of_node_put(np);
211 214
212 return 0; 215 return 0;
diff --git a/drivers/cpufreq/unicore2-cpufreq.c b/drivers/cpufreq/unicore2-cpufreq.c
index 8d045afa7fb4..6f9dfa80563a 100644
--- a/drivers/cpufreq/unicore2-cpufreq.c
+++ b/drivers/cpufreq/unicore2-cpufreq.c
@@ -60,9 +60,7 @@ static int __init ucv2_cpu_init(struct cpufreq_policy *policy)
60 policy->max = policy->cpuinfo.max_freq = 1000000; 60 policy->max = policy->cpuinfo.max_freq = 1000000;
61 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 61 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
62 policy->clk = clk_get(NULL, "MAIN_CLK"); 62 policy->clk = clk_get(NULL, "MAIN_CLK");
63 if (IS_ERR(policy->clk)) 63 return PTR_ERR_OR_ZERO(policy->clk);
64 return PTR_ERR(policy->clk);
65 return 0;
66} 64}
67 65
68static struct cpufreq_driver ucv2_driver = { 66static struct cpufreq_driver ucv2_driver = {
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ba06d1d2f99e..5c5863842de9 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -197,7 +197,7 @@ config AMCC_PPC440SPE_ADMA
197 197
198config TIMB_DMA 198config TIMB_DMA
199 tristate "Timberdale FPGA DMA support" 199 tristate "Timberdale FPGA DMA support"
200 depends on MFD_TIMBERDALE || HAS_IOMEM 200 depends on MFD_TIMBERDALE
201 select DMA_ENGINE 201 select DMA_ENGINE
202 help 202 help
203 Enable support for the Timberdale FPGA DMA engine. 203 Enable support for the Timberdale FPGA DMA engine.
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index cd04eb7b182e..926360c2db6a 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -182,11 +182,13 @@ static void edma_execute(struct edma_chan *echan)
182 echan->ecc->dummy_slot); 182 echan->ecc->dummy_slot);
183 } 183 }
184 184
185 edma_resume(echan->ch_num);
186
187 if (edesc->processed <= MAX_NR_SG) { 185 if (edesc->processed <= MAX_NR_SG) {
188 dev_dbg(dev, "first transfer starting %d\n", echan->ch_num); 186 dev_dbg(dev, "first transfer starting %d\n", echan->ch_num);
189 edma_start(echan->ch_num); 187 edma_start(echan->ch_num);
188 } else {
189 dev_dbg(dev, "chan: %d: completed %d elements, resuming\n",
190 echan->ch_num, edesc->processed);
191 edma_resume(echan->ch_num);
190 } 192 }
191 193
192 /* 194 /*
diff --git a/drivers/dma/fsl-edma.c b/drivers/dma/fsl-edma.c
index 381e793184ba..b396a7fb53ab 100644
--- a/drivers/dma/fsl-edma.c
+++ b/drivers/dma/fsl-edma.c
@@ -968,7 +968,17 @@ static struct platform_driver fsl_edma_driver = {
968 .remove = fsl_edma_remove, 968 .remove = fsl_edma_remove,
969}; 969};
970 970
971module_platform_driver(fsl_edma_driver); 971static int __init fsl_edma_init(void)
972{
973 return platform_driver_register(&fsl_edma_driver);
974}
975subsys_initcall(fsl_edma_init);
976
977static void __exit fsl_edma_exit(void)
978{
979 platform_driver_unregister(&fsl_edma_driver);
980}
981module_exit(fsl_edma_exit);
972 982
973MODULE_ALIAS("platform:fsl-edma"); 983MODULE_ALIAS("platform:fsl-edma");
974MODULE_DESCRIPTION("Freescale eDMA engine driver"); 984MODULE_DESCRIPTION("Freescale eDMA engine driver");
diff --git a/drivers/dma/sirf-dma.c b/drivers/dma/sirf-dma.c
index a1bd8298d55f..03f7820fa333 100644
--- a/drivers/dma/sirf-dma.c
+++ b/drivers/dma/sirf-dma.c
@@ -666,7 +666,7 @@ static struct dma_chan *of_dma_sirfsoc_xlate(struct of_phandle_args *dma_spec,
666 struct sirfsoc_dma *sdma = ofdma->of_dma_data; 666 struct sirfsoc_dma *sdma = ofdma->of_dma_data;
667 unsigned int request = dma_spec->args[0]; 667 unsigned int request = dma_spec->args[0];
668 668
669 if (request > SIRFSOC_DMA_CHANNELS) 669 if (request >= SIRFSOC_DMA_CHANNELS)
670 return NULL; 670 return NULL;
671 671
672 return dma_get_slave_channel(&sdma->channels[request].chan); 672 return dma_get_slave_channel(&sdma->channels[request].chan);
diff --git a/drivers/gpio/gpio-spear-spics.c b/drivers/gpio/gpio-spear-spics.c
index e9a0415834ea..30bcc539425d 100644
--- a/drivers/gpio/gpio-spear-spics.c
+++ b/drivers/gpio/gpio-spear-spics.c
@@ -2,7 +2,7 @@
2 * SPEAr platform SPI chipselect abstraction over gpiolib 2 * SPEAr platform SPI chipselect abstraction over gpiolib
3 * 3 *
4 * Copyright (C) 2012 ST Microelectronics 4 * Copyright (C) 2012 ST Microelectronics
5 * Shiraz Hashim <shiraz.hashim@st.com> 5 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any 8 * License version 2. This program is licensed "as is" without any
@@ -205,6 +205,6 @@ static int __init spics_gpio_init(void)
205} 205}
206subsys_initcall(spics_gpio_init); 206subsys_initcall(spics_gpio_init);
207 207
208MODULE_AUTHOR("Shiraz Hashim <shiraz.hashim@st.com>"); 208MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
209MODULE_DESCRIPTION("ST Microlectronics SPEAr SPI Chip Select Abstraction"); 209MODULE_DESCRIPTION("ST Microlectronics SPEAr SPI Chip Select Abstraction");
210MODULE_LICENSE("GPL"); 210MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index bf0f8b476696..401add28933f 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -233,7 +233,7 @@ static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio)
233{ 233{
234 struct gpio_chip *chip = acpi_gpio->chip; 234 struct gpio_chip *chip = acpi_gpio->chip;
235 235
236 if (!chip->dev || !chip->to_irq) 236 if (!chip->to_irq)
237 return; 237 return;
238 238
239 INIT_LIST_HEAD(&acpi_gpio->events); 239 INIT_LIST_HEAD(&acpi_gpio->events);
@@ -253,7 +253,7 @@ static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio)
253 struct acpi_gpio_event *event, *ep; 253 struct acpi_gpio_event *event, *ep;
254 struct gpio_chip *chip = acpi_gpio->chip; 254 struct gpio_chip *chip = acpi_gpio->chip;
255 255
256 if (!chip->dev || !chip->to_irq) 256 if (!chip->to_irq)
257 return; 257 return;
258 258
259 list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) { 259 list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) {
@@ -451,7 +451,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
451 if (function == ACPI_WRITE) 451 if (function == ACPI_WRITE)
452 gpiod_set_raw_value(desc, !!((1 << i) & *value)); 452 gpiod_set_raw_value(desc, !!((1 << i) & *value));
453 else 453 else
454 *value |= gpiod_get_raw_value(desc) << i; 454 *value |= (u64)gpiod_get_raw_value(desc) << i;
455 } 455 }
456 456
457out: 457out:
@@ -501,6 +501,9 @@ void acpi_gpiochip_add(struct gpio_chip *chip)
501 acpi_handle handle; 501 acpi_handle handle;
502 acpi_status status; 502 acpi_status status;
503 503
504 if (!chip || !chip->dev)
505 return;
506
504 handle = ACPI_HANDLE(chip->dev); 507 handle = ACPI_HANDLE(chip->dev);
505 if (!handle) 508 if (!handle)
506 return; 509 return;
@@ -531,6 +534,9 @@ void acpi_gpiochip_remove(struct gpio_chip *chip)
531 acpi_handle handle; 534 acpi_handle handle;
532 acpi_status status; 535 acpi_status status;
533 536
537 if (!chip || !chip->dev)
538 return;
539
534 handle = ACPI_HANDLE(chip->dev); 540 handle = ACPI_HANDLE(chip->dev);
535 if (!handle) 541 if (!handle)
536 return; 542 return;
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 761013f8b82f..f48817d97480 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1387,8 +1387,8 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1387{ 1387{
1388 struct gpio_chip *chip = d->host_data; 1388 struct gpio_chip *chip = d->host_data;
1389 1389
1390 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
1391 irq_set_chip_data(irq, chip); 1390 irq_set_chip_data(irq, chip);
1391 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
1392#ifdef CONFIG_ARM 1392#ifdef CONFIG_ARM
1393 set_irq_flags(irq, IRQF_VALID); 1393 set_irq_flags(irq, IRQF_VALID);
1394#else 1394#else
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 9d25dbbe6771..48e38ba22783 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -23,7 +23,7 @@ drm-$(CONFIG_DRM_PANEL) += drm_panel.o
23 23
24drm-usb-y := drm_usb.o 24drm-usb-y := drm_usb.o
25 25
26drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o 26drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o drm_probe_helper.o
27drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o 27drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
28drm_kms_helper-$(CONFIG_DRM_KMS_FB_HELPER) += drm_fb_helper.o 28drm_kms_helper-$(CONFIG_DRM_KMS_FB_HELPER) += drm_fb_helper.o
29drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o 29drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o
diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index 977cfb35837a..635f6ffc27c2 100644
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -572,7 +572,7 @@ static u32 cbr_scan2(struct ast_private *ast)
572 for (loop = 0; loop < CBR_PASSNUM2; loop++) { 572 for (loop = 0; loop < CBR_PASSNUM2; loop++) {
573 if ((data = cbr_test2(ast)) != 0) { 573 if ((data = cbr_test2(ast)) != 0) {
574 data2 &= data; 574 data2 &= data;
575 if (!data) 575 if (!data2)
576 return 0; 576 return 0;
577 break; 577 break;
578 } 578 }
diff --git a/drivers/gpu/drm/bochs/bochs.h b/drivers/gpu/drm/bochs/bochs.h
index 741965c001a6..7eb52dd44b01 100644
--- a/drivers/gpu/drm/bochs/bochs.h
+++ b/drivers/gpu/drm/bochs/bochs.h
@@ -1,5 +1,6 @@
1#include <linux/io.h> 1#include <linux/io.h>
2#include <linux/fb.h> 2#include <linux/fb.h>
3#include <linux/console.h>
3 4
4#include <drm/drmP.h> 5#include <drm/drmP.h>
5#include <drm/drm_crtc.h> 6#include <drm/drm_crtc.h>
@@ -87,8 +88,6 @@ struct bochs_device {
87 struct bochs_framebuffer gfb; 88 struct bochs_framebuffer gfb;
88 struct drm_fb_helper helper; 89 struct drm_fb_helper helper;
89 int size; 90 int size;
90 int x1, y1, x2, y2; /* dirty rect */
91 spinlock_t dirty_lock;
92 bool initialized; 91 bool initialized;
93 } fb; 92 } fb;
94}; 93};
diff --git a/drivers/gpu/drm/bochs/bochs_drv.c b/drivers/gpu/drm/bochs/bochs_drv.c
index 395bba261c9a..9c13df29fd20 100644
--- a/drivers/gpu/drm/bochs/bochs_drv.c
+++ b/drivers/gpu/drm/bochs/bochs_drv.c
@@ -95,6 +95,49 @@ static struct drm_driver bochs_driver = {
95}; 95};
96 96
97/* ---------------------------------------------------------------------- */ 97/* ---------------------------------------------------------------------- */
98/* pm interface */
99
100static int bochs_pm_suspend(struct device *dev)
101{
102 struct pci_dev *pdev = to_pci_dev(dev);
103 struct drm_device *drm_dev = pci_get_drvdata(pdev);
104 struct bochs_device *bochs = drm_dev->dev_private;
105
106 drm_kms_helper_poll_disable(drm_dev);
107
108 if (bochs->fb.initialized) {
109 console_lock();
110 fb_set_suspend(bochs->fb.helper.fbdev, 1);
111 console_unlock();
112 }
113
114 return 0;
115}
116
117static int bochs_pm_resume(struct device *dev)
118{
119 struct pci_dev *pdev = to_pci_dev(dev);
120 struct drm_device *drm_dev = pci_get_drvdata(pdev);
121 struct bochs_device *bochs = drm_dev->dev_private;
122
123 drm_helper_resume_force_mode(drm_dev);
124
125 if (bochs->fb.initialized) {
126 console_lock();
127 fb_set_suspend(bochs->fb.helper.fbdev, 0);
128 console_unlock();
129 }
130
131 drm_kms_helper_poll_enable(drm_dev);
132 return 0;
133}
134
135static const struct dev_pm_ops bochs_pm_ops = {
136 SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
137 bochs_pm_resume)
138};
139
140/* ---------------------------------------------------------------------- */
98/* pci interface */ 141/* pci interface */
99 142
100static int bochs_kick_out_firmware_fb(struct pci_dev *pdev) 143static int bochs_kick_out_firmware_fb(struct pci_dev *pdev)
@@ -155,6 +198,7 @@ static struct pci_driver bochs_pci_driver = {
155 .id_table = bochs_pci_tbl, 198 .id_table = bochs_pci_tbl,
156 .probe = bochs_pci_probe, 199 .probe = bochs_pci_probe,
157 .remove = bochs_pci_remove, 200 .remove = bochs_pci_remove,
201 .driver.pm = &bochs_pm_ops,
158}; 202};
159 203
160/* ---------------------------------------------------------------------- */ 204/* ---------------------------------------------------------------------- */
diff --git a/drivers/gpu/drm/bochs/bochs_fbdev.c b/drivers/gpu/drm/bochs/bochs_fbdev.c
index 4da5206b7cc9..561b84474122 100644
--- a/drivers/gpu/drm/bochs/bochs_fbdev.c
+++ b/drivers/gpu/drm/bochs/bochs_fbdev.c
@@ -190,7 +190,6 @@ int bochs_fbdev_init(struct bochs_device *bochs)
190 int ret; 190 int ret;
191 191
192 bochs->fb.helper.funcs = &bochs_fb_helper_funcs; 192 bochs->fb.helper.funcs = &bochs_fb_helper_funcs;
193 spin_lock_init(&bochs->fb.dirty_lock);
194 193
195 ret = drm_fb_helper_init(bochs->dev, &bochs->fb.helper, 194 ret = drm_fb_helper_init(bochs->dev, &bochs->fb.helper,
196 1, 1); 195 1, 1);
diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c
index 953fc8aea69c..08ce520f61a5 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.c
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/console.h> 12#include <linux/console.h>
13#include <drm/drmP.h> 13#include <drm/drmP.h>
14#include <drm/drm_crtc_helper.h>
14 15
15#include "cirrus_drv.h" 16#include "cirrus_drv.h"
16 17
@@ -75,6 +76,41 @@ static void cirrus_pci_remove(struct pci_dev *pdev)
75 drm_put_dev(dev); 76 drm_put_dev(dev);
76} 77}
77 78
79static int cirrus_pm_suspend(struct device *dev)
80{
81 struct pci_dev *pdev = to_pci_dev(dev);
82 struct drm_device *drm_dev = pci_get_drvdata(pdev);
83 struct cirrus_device *cdev = drm_dev->dev_private;
84
85 drm_kms_helper_poll_disable(drm_dev);
86
87 if (cdev->mode_info.gfbdev) {
88 console_lock();
89 fb_set_suspend(cdev->mode_info.gfbdev->helper.fbdev, 1);
90 console_unlock();
91 }
92
93 return 0;
94}
95
96static int cirrus_pm_resume(struct device *dev)
97{
98 struct pci_dev *pdev = to_pci_dev(dev);
99 struct drm_device *drm_dev = pci_get_drvdata(pdev);
100 struct cirrus_device *cdev = drm_dev->dev_private;
101
102 drm_helper_resume_force_mode(drm_dev);
103
104 if (cdev->mode_info.gfbdev) {
105 console_lock();
106 fb_set_suspend(cdev->mode_info.gfbdev->helper.fbdev, 0);
107 console_unlock();
108 }
109
110 drm_kms_helper_poll_enable(drm_dev);
111 return 0;
112}
113
78static const struct file_operations cirrus_driver_fops = { 114static const struct file_operations cirrus_driver_fops = {
79 .owner = THIS_MODULE, 115 .owner = THIS_MODULE,
80 .open = drm_open, 116 .open = drm_open,
@@ -103,11 +139,17 @@ static struct drm_driver driver = {
103 .dumb_destroy = drm_gem_dumb_destroy, 139 .dumb_destroy = drm_gem_dumb_destroy,
104}; 140};
105 141
142static const struct dev_pm_ops cirrus_pm_ops = {
143 SET_SYSTEM_SLEEP_PM_OPS(cirrus_pm_suspend,
144 cirrus_pm_resume)
145};
146
106static struct pci_driver cirrus_pci_driver = { 147static struct pci_driver cirrus_pci_driver = {
107 .name = DRIVER_NAME, 148 .name = DRIVER_NAME,
108 .id_table = pciidlist, 149 .id_table = pciidlist,
109 .probe = cirrus_pci_probe, 150 .probe = cirrus_pci_probe,
110 .remove = cirrus_pci_remove, 151 .remove = cirrus_pci_remove,
152 .driver.pm = &cirrus_pm_ops,
111}; 153};
112 154
113static int __init cirrus_init(void) 155static int __init cirrus_init(void)
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 2d64aea83df2..f59433b7610c 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -308,6 +308,9 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
308 308
309 WREG_HDR(hdr); 309 WREG_HDR(hdr);
310 cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0); 310 cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
311
312 /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
313 outb(0x20, 0x3c0);
311 return 0; 314 return 0;
312} 315}
313 316
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index c43825e8f5c1..df281b54db01 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -72,147 +72,6 @@ void drm_helper_move_panel_connectors_to_head(struct drm_device *dev)
72} 72}
73EXPORT_SYMBOL(drm_helper_move_panel_connectors_to_head); 73EXPORT_SYMBOL(drm_helper_move_panel_connectors_to_head);
74 74
75static bool drm_kms_helper_poll = true;
76module_param_named(poll, drm_kms_helper_poll, bool, 0600);
77
78static void drm_mode_validate_flag(struct drm_connector *connector,
79 int flags)
80{
81 struct drm_display_mode *mode;
82
83 if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE |
84 DRM_MODE_FLAG_3D_MASK))
85 return;
86
87 list_for_each_entry(mode, &connector->modes, head) {
88 if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
89 !(flags & DRM_MODE_FLAG_INTERLACE))
90 mode->status = MODE_NO_INTERLACE;
91 if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
92 !(flags & DRM_MODE_FLAG_DBLSCAN))
93 mode->status = MODE_NO_DBLESCAN;
94 if ((mode->flags & DRM_MODE_FLAG_3D_MASK) &&
95 !(flags & DRM_MODE_FLAG_3D_MASK))
96 mode->status = MODE_NO_STEREO;
97 }
98
99 return;
100}
101
102/**
103 * drm_helper_probe_single_connector_modes - get complete set of display modes
104 * @connector: connector to probe
105 * @maxX: max width for modes
106 * @maxY: max height for modes
107 *
108 * Based on the helper callbacks implemented by @connector try to detect all
109 * valid modes. Modes will first be added to the connector's probed_modes list,
110 * then culled (based on validity and the @maxX, @maxY parameters) and put into
111 * the normal modes list.
112 *
113 * Intended to be use as a generic implementation of the ->fill_modes()
114 * @connector vfunc for drivers that use the crtc helpers for output mode
115 * filtering and detection.
116 *
117 * Returns:
118 * The number of modes found on @connector.
119 */
120int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
121 uint32_t maxX, uint32_t maxY)
122{
123 struct drm_device *dev = connector->dev;
124 struct drm_display_mode *mode;
125 struct drm_connector_helper_funcs *connector_funcs =
126 connector->helper_private;
127 int count = 0;
128 int mode_flags = 0;
129 bool verbose_prune = true;
130
131 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
132
133 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
134 drm_get_connector_name(connector));
135 /* set all modes to the unverified state */
136 list_for_each_entry(mode, &connector->modes, head)
137 mode->status = MODE_UNVERIFIED;
138
139 if (connector->force) {
140 if (connector->force == DRM_FORCE_ON)
141 connector->status = connector_status_connected;
142 else
143 connector->status = connector_status_disconnected;
144 if (connector->funcs->force)
145 connector->funcs->force(connector);
146 } else {
147 connector->status = connector->funcs->detect(connector, true);
148 }
149
150 /* Re-enable polling in case the global poll config changed. */
151 if (drm_kms_helper_poll != dev->mode_config.poll_running)
152 drm_kms_helper_poll_enable(dev);
153
154 dev->mode_config.poll_running = drm_kms_helper_poll;
155
156 if (connector->status == connector_status_disconnected) {
157 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
158 connector->base.id, drm_get_connector_name(connector));
159 drm_mode_connector_update_edid_property(connector, NULL);
160 verbose_prune = false;
161 goto prune;
162 }
163
164#ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
165 count = drm_load_edid_firmware(connector);
166 if (count == 0)
167#endif
168 count = (*connector_funcs->get_modes)(connector);
169
170 if (count == 0 && connector->status == connector_status_connected)
171 count = drm_add_modes_noedid(connector, 1024, 768);
172 if (count == 0)
173 goto prune;
174
175 drm_mode_connector_list_update(connector);
176
177 if (maxX && maxY)
178 drm_mode_validate_size(dev, &connector->modes, maxX, maxY);
179
180 if (connector->interlace_allowed)
181 mode_flags |= DRM_MODE_FLAG_INTERLACE;
182 if (connector->doublescan_allowed)
183 mode_flags |= DRM_MODE_FLAG_DBLSCAN;
184 if (connector->stereo_allowed)
185 mode_flags |= DRM_MODE_FLAG_3D_MASK;
186 drm_mode_validate_flag(connector, mode_flags);
187
188 list_for_each_entry(mode, &connector->modes, head) {
189 if (mode->status == MODE_OK)
190 mode->status = connector_funcs->mode_valid(connector,
191 mode);
192 }
193
194prune:
195 drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
196
197 if (list_empty(&connector->modes))
198 return 0;
199
200 list_for_each_entry(mode, &connector->modes, head)
201 mode->vrefresh = drm_mode_vrefresh(mode);
202
203 drm_mode_sort(&connector->modes);
204
205 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
206 drm_get_connector_name(connector));
207 list_for_each_entry(mode, &connector->modes, head) {
208 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
209 drm_mode_debug_printmodeline(mode);
210 }
211
212 return count;
213}
214EXPORT_SYMBOL(drm_helper_probe_single_connector_modes);
215
216/** 75/**
217 * drm_helper_encoder_in_use - check if a given encoder is in use 76 * drm_helper_encoder_in_use - check if a given encoder is in use
218 * @encoder: encoder to check 77 * @encoder: encoder to check
@@ -1020,232 +879,3 @@ void drm_helper_resume_force_mode(struct drm_device *dev)
1020 drm_modeset_unlock_all(dev); 879 drm_modeset_unlock_all(dev);
1021} 880}
1022EXPORT_SYMBOL(drm_helper_resume_force_mode); 881EXPORT_SYMBOL(drm_helper_resume_force_mode);
1023
1024/**
1025 * drm_kms_helper_hotplug_event - fire off KMS hotplug events
1026 * @dev: drm_device whose connector state changed
1027 *
1028 * This function fires off the uevent for userspace and also calls the
1029 * output_poll_changed function, which is most commonly used to inform the fbdev
1030 * emulation code and allow it to update the fbcon output configuration.
1031 *
1032 * Drivers should call this from their hotplug handling code when a change is
1033 * detected. Note that this function does not do any output detection of its
1034 * own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the
1035 * driver already.
1036 *
1037 * This function must be called from process context with no mode
1038 * setting locks held.
1039 */
1040void drm_kms_helper_hotplug_event(struct drm_device *dev)
1041{
1042 /* send a uevent + call fbdev */
1043 drm_sysfs_hotplug_event(dev);
1044 if (dev->mode_config.funcs->output_poll_changed)
1045 dev->mode_config.funcs->output_poll_changed(dev);
1046}
1047EXPORT_SYMBOL(drm_kms_helper_hotplug_event);
1048
1049#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
1050static void output_poll_execute(struct work_struct *work)
1051{
1052 struct delayed_work *delayed_work = to_delayed_work(work);
1053 struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
1054 struct drm_connector *connector;
1055 enum drm_connector_status old_status;
1056 bool repoll = false, changed = false;
1057
1058 if (!drm_kms_helper_poll)
1059 return;
1060
1061 mutex_lock(&dev->mode_config.mutex);
1062 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1063
1064 /* Ignore forced connectors. */
1065 if (connector->force)
1066 continue;
1067
1068 /* Ignore HPD capable connectors and connectors where we don't
1069 * want any hotplug detection at all for polling. */
1070 if (!connector->polled || connector->polled == DRM_CONNECTOR_POLL_HPD)
1071 continue;
1072
1073 repoll = true;
1074
1075 old_status = connector->status;
1076 /* if we are connected and don't want to poll for disconnect
1077 skip it */
1078 if (old_status == connector_status_connected &&
1079 !(connector->polled & DRM_CONNECTOR_POLL_DISCONNECT))
1080 continue;
1081
1082 connector->status = connector->funcs->detect(connector, false);
1083 if (old_status != connector->status) {
1084 const char *old, *new;
1085
1086 old = drm_get_connector_status_name(old_status);
1087 new = drm_get_connector_status_name(connector->status);
1088
1089 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] "
1090 "status updated from %s to %s\n",
1091 connector->base.id,
1092 drm_get_connector_name(connector),
1093 old, new);
1094
1095 changed = true;
1096 }
1097 }
1098
1099 mutex_unlock(&dev->mode_config.mutex);
1100
1101 if (changed)
1102 drm_kms_helper_hotplug_event(dev);
1103
1104 if (repoll)
1105 schedule_delayed_work(delayed_work, DRM_OUTPUT_POLL_PERIOD);
1106}
1107
1108/**
1109 * drm_kms_helper_poll_disable - disable output polling
1110 * @dev: drm_device
1111 *
1112 * This function disables the output polling work.
1113 *
1114 * Drivers can call this helper from their device suspend implementation. It is
1115 * not an error to call this even when output polling isn't enabled or arlready
1116 * disabled.
1117 */
1118void drm_kms_helper_poll_disable(struct drm_device *dev)
1119{
1120 if (!dev->mode_config.poll_enabled)
1121 return;
1122 cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
1123}
1124EXPORT_SYMBOL(drm_kms_helper_poll_disable);
1125
1126/**
1127 * drm_kms_helper_poll_enable - re-enable output polling.
1128 * @dev: drm_device
1129 *
1130 * This function re-enables the output polling work.
1131 *
1132 * Drivers can call this helper from their device resume implementation. It is
1133 * an error to call this when the output polling support has not yet been set
1134 * up.
1135 */
1136void drm_kms_helper_poll_enable(struct drm_device *dev)
1137{
1138 bool poll = false;
1139 struct drm_connector *connector;
1140
1141 if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)
1142 return;
1143
1144 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1145 if (connector->polled & (DRM_CONNECTOR_POLL_CONNECT |
1146 DRM_CONNECTOR_POLL_DISCONNECT))
1147 poll = true;
1148 }
1149
1150 if (poll)
1151 schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
1152}
1153EXPORT_SYMBOL(drm_kms_helper_poll_enable);
1154
1155/**
1156 * drm_kms_helper_poll_init - initialize and enable output polling
1157 * @dev: drm_device
1158 *
1159 * This function intializes and then also enables output polling support for
1160 * @dev. Drivers which do not have reliable hotplug support in hardware can use
1161 * this helper infrastructure to regularly poll such connectors for changes in
1162 * their connection state.
1163 *
1164 * Drivers can control which connectors are polled by setting the
1165 * DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On
1166 * connectors where probing live outputs can result in visual distortion drivers
1167 * should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this.
1168 * Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are
1169 * completely ignored by the polling logic.
1170 *
1171 * Note that a connector can be both polled and probed from the hotplug handler,
1172 * in case the hotplug interrupt is known to be unreliable.
1173 */
1174void drm_kms_helper_poll_init(struct drm_device *dev)
1175{
1176 INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
1177 dev->mode_config.poll_enabled = true;
1178
1179 drm_kms_helper_poll_enable(dev);
1180}
1181EXPORT_SYMBOL(drm_kms_helper_poll_init);
1182
1183/**
1184 * drm_kms_helper_poll_fini - disable output polling and clean it up
1185 * @dev: drm_device
1186 */
1187void drm_kms_helper_poll_fini(struct drm_device *dev)
1188{
1189 drm_kms_helper_poll_disable(dev);
1190}
1191EXPORT_SYMBOL(drm_kms_helper_poll_fini);
1192
1193/**
1194 * drm_helper_hpd_irq_event - hotplug processing
1195 * @dev: drm_device
1196 *
1197 * Drivers can use this helper function to run a detect cycle on all connectors
1198 * which have the DRM_CONNECTOR_POLL_HPD flag set in their &polled member. All
1199 * other connectors are ignored, which is useful to avoid reprobing fixed
1200 * panels.
1201 *
1202 * This helper function is useful for drivers which can't or don't track hotplug
1203 * interrupts for each connector.
1204 *
1205 * Drivers which support hotplug interrupts for each connector individually and
1206 * which have a more fine-grained detect logic should bypass this code and
1207 * directly call drm_kms_helper_hotplug_event() in case the connector state
1208 * changed.
1209 *
1210 * This function must be called from process context with no mode
1211 * setting locks held.
1212 *
1213 * Note that a connector can be both polled and probed from the hotplug handler,
1214 * in case the hotplug interrupt is known to be unreliable.
1215 */
1216bool drm_helper_hpd_irq_event(struct drm_device *dev)
1217{
1218 struct drm_connector *connector;
1219 enum drm_connector_status old_status;
1220 bool changed = false;
1221
1222 if (!dev->mode_config.poll_enabled)
1223 return false;
1224
1225 mutex_lock(&dev->mode_config.mutex);
1226 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1227
1228 /* Only handle HPD capable connectors. */
1229 if (!(connector->polled & DRM_CONNECTOR_POLL_HPD))
1230 continue;
1231
1232 old_status = connector->status;
1233
1234 connector->status = connector->funcs->detect(connector, false);
1235 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
1236 connector->base.id,
1237 drm_get_connector_name(connector),
1238 drm_get_connector_status_name(old_status),
1239 drm_get_connector_status_name(connector->status));
1240 if (old_status != connector->status)
1241 changed = true;
1242 }
1243
1244 mutex_unlock(&dev->mode_config.mutex);
1245
1246 if (changed)
1247 drm_kms_helper_hotplug_event(dev);
1248
1249 return changed;
1250}
1251EXPORT_SYMBOL(drm_helper_hpd_irq_event);
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 27671489477d..4b6e6f3ba0a1 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -577,7 +577,9 @@ static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
577 577
578/* 578/*
579 * Transfer a single I2C-over-AUX message and handle various error conditions, 579 * Transfer a single I2C-over-AUX message and handle various error conditions,
580 * retrying the transaction as appropriate. 580 * retrying the transaction as appropriate. It is assumed that the
581 * aux->transfer function does not modify anything in the msg other than the
582 * reply field.
581 */ 583 */
582static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) 584static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
583{ 585{
@@ -665,11 +667,26 @@ static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
665{ 667{
666 struct drm_dp_aux *aux = adapter->algo_data; 668 struct drm_dp_aux *aux = adapter->algo_data;
667 unsigned int i, j; 669 unsigned int i, j;
670 struct drm_dp_aux_msg msg;
671 int err = 0;
668 672
669 for (i = 0; i < num; i++) { 673 memset(&msg, 0, sizeof(msg));
670 struct drm_dp_aux_msg msg;
671 int err;
672 674
675 for (i = 0; i < num; i++) {
676 msg.address = msgs[i].addr;
677 msg.request = (msgs[i].flags & I2C_M_RD) ?
678 DP_AUX_I2C_READ :
679 DP_AUX_I2C_WRITE;
680 msg.request |= DP_AUX_I2C_MOT;
681 /* Send a bare address packet to start the transaction.
682 * Zero sized messages specify an address only (bare
683 * address) transaction.
684 */
685 msg.buffer = NULL;
686 msg.size = 0;
687 err = drm_dp_i2c_do_msg(aux, &msg);
688 if (err < 0)
689 break;
673 /* 690 /*
674 * Many hardware implementations support FIFOs larger than a 691 * Many hardware implementations support FIFOs larger than a
675 * single byte, but it has been empirically determined that 692 * single byte, but it has been empirically determined that
@@ -678,30 +695,28 @@ static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
678 * transferred byte-by-byte. 695 * transferred byte-by-byte.
679 */ 696 */
680 for (j = 0; j < msgs[i].len; j++) { 697 for (j = 0; j < msgs[i].len; j++) {
681 memset(&msg, 0, sizeof(msg));
682 msg.address = msgs[i].addr;
683
684 msg.request = (msgs[i].flags & I2C_M_RD) ?
685 DP_AUX_I2C_READ :
686 DP_AUX_I2C_WRITE;
687
688 /*
689 * All messages except the last one are middle-of-
690 * transfer messages.
691 */
692 if ((i < num - 1) || (j < msgs[i].len - 1))
693 msg.request |= DP_AUX_I2C_MOT;
694
695 msg.buffer = msgs[i].buf + j; 698 msg.buffer = msgs[i].buf + j;
696 msg.size = 1; 699 msg.size = 1;
697 700
698 err = drm_dp_i2c_do_msg(aux, &msg); 701 err = drm_dp_i2c_do_msg(aux, &msg);
699 if (err < 0) 702 if (err < 0)
700 return err; 703 break;
701 } 704 }
705 if (err < 0)
706 break;
702 } 707 }
708 if (err >= 0)
709 err = num;
710 /* Send a bare address packet to close out the transaction.
711 * Zero sized messages specify an address only (bare
712 * address) transaction.
713 */
714 msg.request &= ~DP_AUX_I2C_MOT;
715 msg.buffer = NULL;
716 msg.size = 0;
717 (void)drm_dp_i2c_do_msg(aux, &msg);
703 718
704 return num; 719 return err;
705} 720}
706 721
707static const struct i2c_algorithm drm_dp_i2c_algo = { 722static const struct i2c_algorithm drm_dp_i2c_algo = {
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 71e2d3fcd6ee..04a209e2b66d 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -207,8 +207,6 @@ int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node)
207 return 0; 207 return 0;
208 } 208 }
209 209
210 WARN(1, "no hole found for node 0x%lx + 0x%lx\n",
211 node->start, node->size);
212 return -ENOSPC; 210 return -ENOSPC;
213} 211}
214EXPORT_SYMBOL(drm_mm_reserve_node); 212EXPORT_SYMBOL(drm_mm_reserve_node);
diff --git a/drivers/gpu/drm/drm_plane_helper.c b/drivers/gpu/drm/drm_plane_helper.c
index e768d35ff22e..d2b1c03b3d71 100644
--- a/drivers/gpu/drm/drm_plane_helper.c
+++ b/drivers/gpu/drm/drm_plane_helper.c
@@ -203,9 +203,9 @@ EXPORT_SYMBOL(drm_primary_helper_update);
203 * 203 *
204 * Provides a default plane disable handler for primary planes. This is handler 204 * Provides a default plane disable handler for primary planes. This is handler
205 * is called in response to a userspace SetPlane operation on the plane with a 205 * is called in response to a userspace SetPlane operation on the plane with a
206 * NULL framebuffer parameter. We call the driver's modeset handler with a NULL 206 * NULL framebuffer parameter. It unconditionally fails the disable call with
207 * framebuffer to disable the CRTC if no other planes are currently enabled. 207 * -EINVAL the only way to disable the primary plane without driver support is
208 * If other planes are still enabled on the same CRTC, we return -EBUSY. 208 * to disable the entier CRTC. Which does not match the plane ->disable hook.
209 * 209 *
210 * Note that some hardware may be able to disable the primary plane without 210 * Note that some hardware may be able to disable the primary plane without
211 * disabling the whole CRTC. Drivers for such hardware should provide their 211 * disabling the whole CRTC. Drivers for such hardware should provide their
@@ -214,34 +214,11 @@ EXPORT_SYMBOL(drm_primary_helper_update);
214 * disabled primary plane). 214 * disabled primary plane).
215 * 215 *
216 * RETURNS: 216 * RETURNS:
217 * Zero on success, error code on failure 217 * Unconditionally returns -EINVAL.
218 */ 218 */
219int drm_primary_helper_disable(struct drm_plane *plane) 219int drm_primary_helper_disable(struct drm_plane *plane)
220{ 220{
221 struct drm_plane *p; 221 return -EINVAL;
222 struct drm_mode_set set = {
223 .crtc = plane->crtc,
224 .fb = NULL,
225 };
226
227 if (plane->crtc == NULL || plane->fb == NULL)
228 /* Already disabled */
229 return 0;
230
231 list_for_each_entry(p, &plane->dev->mode_config.plane_list, head)
232 if (p != plane && p->fb) {
233 DRM_DEBUG_KMS("Cannot disable primary plane while other planes are still active on CRTC.\n");
234 return -EBUSY;
235 }
236
237 /*
238 * N.B. We call set_config() directly here rather than
239 * drm_mode_set_config_internal() since drm_mode_setplane() already
240 * handles the basic refcounting and we don't need the special
241 * cross-CRTC refcounting (no chance of stealing connectors from
242 * other CRTC's with this update).
243 */
244 return plane->crtc->funcs->set_config(&set);
245} 222}
246EXPORT_SYMBOL(drm_primary_helper_disable); 223EXPORT_SYMBOL(drm_primary_helper_disable);
247 224
diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c
new file mode 100644
index 000000000000..e70f54d4a581
--- /dev/null
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -0,0 +1,426 @@
1/*
2 * Copyright (c) 2006-2008 Intel Corporation
3 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
4 *
5 * DRM core CRTC related functions
6 *
7 * Permission to use, copy, modify, distribute, and sell this software and its
8 * documentation for any purpose is hereby granted without fee, provided that
9 * the above copyright notice appear in all copies and that both that copyright
10 * notice and this permission notice appear in supporting documentation, and
11 * that the name of the copyright holders not be used in advertising or
12 * publicity pertaining to distribution of the software without specific,
13 * written prior permission. The copyright holders make no representations
14 * about the suitability of this software for any purpose. It is provided "as
15 * is" without express or implied warranty.
16 *
17 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
19 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
20 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
21 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
22 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
23 * OF THIS SOFTWARE.
24 *
25 * Authors:
26 * Keith Packard
27 * Eric Anholt <eric@anholt.net>
28 * Dave Airlie <airlied@linux.ie>
29 * Jesse Barnes <jesse.barnes@intel.com>
30 */
31
32#include <linux/export.h>
33#include <linux/moduleparam.h>
34
35#include <drm/drmP.h>
36#include <drm/drm_crtc.h>
37#include <drm/drm_fourcc.h>
38#include <drm/drm_crtc_helper.h>
39#include <drm/drm_fb_helper.h>
40#include <drm/drm_edid.h>
41
42/**
43 * DOC: output probing helper overview
44 *
45 * This library provides some helper code for output probing. It provides an
46 * implementation of the core connector->fill_modes interface with
47 * drm_helper_probe_single_connector_modes.
48 *
49 * It also provides support for polling connectors with a work item and for
50 * generic hotplug interrupt handling where the driver doesn't or cannot keep
51 * track of a per-connector hpd interrupt.
52 *
53 * This helper library can be used independently of the modeset helper library.
54 * Drivers can also overwrite different parts e.g. use their own hotplug
55 * handling code to avoid probing unrelated outputs.
56 */
57
58static bool drm_kms_helper_poll = true;
59module_param_named(poll, drm_kms_helper_poll, bool, 0600);
60
61static void drm_mode_validate_flag(struct drm_connector *connector,
62 int flags)
63{
64 struct drm_display_mode *mode;
65
66 if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE |
67 DRM_MODE_FLAG_3D_MASK))
68 return;
69
70 list_for_each_entry(mode, &connector->modes, head) {
71 if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
72 !(flags & DRM_MODE_FLAG_INTERLACE))
73 mode->status = MODE_NO_INTERLACE;
74 if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
75 !(flags & DRM_MODE_FLAG_DBLSCAN))
76 mode->status = MODE_NO_DBLESCAN;
77 if ((mode->flags & DRM_MODE_FLAG_3D_MASK) &&
78 !(flags & DRM_MODE_FLAG_3D_MASK))
79 mode->status = MODE_NO_STEREO;
80 }
81
82 return;
83}
84
85/**
86 * drm_helper_probe_single_connector_modes - get complete set of display modes
87 * @connector: connector to probe
88 * @maxX: max width for modes
89 * @maxY: max height for modes
90 *
91 * Based on the helper callbacks implemented by @connector try to detect all
92 * valid modes. Modes will first be added to the connector's probed_modes list,
93 * then culled (based on validity and the @maxX, @maxY parameters) and put into
94 * the normal modes list.
95 *
96 * Intended to be use as a generic implementation of the ->fill_modes()
97 * @connector vfunc for drivers that use the crtc helpers for output mode
98 * filtering and detection.
99 *
100 * Returns:
101 * The number of modes found on @connector.
102 */
103int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
104 uint32_t maxX, uint32_t maxY)
105{
106 struct drm_device *dev = connector->dev;
107 struct drm_display_mode *mode;
108 struct drm_connector_helper_funcs *connector_funcs =
109 connector->helper_private;
110 int count = 0;
111 int mode_flags = 0;
112 bool verbose_prune = true;
113
114 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
115
116 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
117 drm_get_connector_name(connector));
118 /* set all modes to the unverified state */
119 list_for_each_entry(mode, &connector->modes, head)
120 mode->status = MODE_UNVERIFIED;
121
122 if (connector->force) {
123 if (connector->force == DRM_FORCE_ON)
124 connector->status = connector_status_connected;
125 else
126 connector->status = connector_status_disconnected;
127 if (connector->funcs->force)
128 connector->funcs->force(connector);
129 } else {
130 connector->status = connector->funcs->detect(connector, true);
131 }
132
133 /* Re-enable polling in case the global poll config changed. */
134 if (drm_kms_helper_poll != dev->mode_config.poll_running)
135 drm_kms_helper_poll_enable(dev);
136
137 dev->mode_config.poll_running = drm_kms_helper_poll;
138
139 if (connector->status == connector_status_disconnected) {
140 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
141 connector->base.id, drm_get_connector_name(connector));
142 drm_mode_connector_update_edid_property(connector, NULL);
143 verbose_prune = false;
144 goto prune;
145 }
146
147#ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
148 count = drm_load_edid_firmware(connector);
149 if (count == 0)
150#endif
151 count = (*connector_funcs->get_modes)(connector);
152
153 if (count == 0 && connector->status == connector_status_connected)
154 count = drm_add_modes_noedid(connector, 1024, 768);
155 if (count == 0)
156 goto prune;
157
158 drm_mode_connector_list_update(connector);
159
160 if (maxX && maxY)
161 drm_mode_validate_size(dev, &connector->modes, maxX, maxY);
162
163 if (connector->interlace_allowed)
164 mode_flags |= DRM_MODE_FLAG_INTERLACE;
165 if (connector->doublescan_allowed)
166 mode_flags |= DRM_MODE_FLAG_DBLSCAN;
167 if (connector->stereo_allowed)
168 mode_flags |= DRM_MODE_FLAG_3D_MASK;
169 drm_mode_validate_flag(connector, mode_flags);
170
171 list_for_each_entry(mode, &connector->modes, head) {
172 if (mode->status == MODE_OK)
173 mode->status = connector_funcs->mode_valid(connector,
174 mode);
175 }
176
177prune:
178 drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
179
180 if (list_empty(&connector->modes))
181 return 0;
182
183 list_for_each_entry(mode, &connector->modes, head)
184 mode->vrefresh = drm_mode_vrefresh(mode);
185
186 drm_mode_sort(&connector->modes);
187
188 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
189 drm_get_connector_name(connector));
190 list_for_each_entry(mode, &connector->modes, head) {
191 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
192 drm_mode_debug_printmodeline(mode);
193 }
194
195 return count;
196}
197EXPORT_SYMBOL(drm_helper_probe_single_connector_modes);
198
199/**
200 * drm_kms_helper_hotplug_event - fire off KMS hotplug events
201 * @dev: drm_device whose connector state changed
202 *
203 * This function fires off the uevent for userspace and also calls the
204 * output_poll_changed function, which is most commonly used to inform the fbdev
205 * emulation code and allow it to update the fbcon output configuration.
206 *
207 * Drivers should call this from their hotplug handling code when a change is
208 * detected. Note that this function does not do any output detection of its
209 * own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the
210 * driver already.
211 *
212 * This function must be called from process context with no mode
213 * setting locks held.
214 */
215void drm_kms_helper_hotplug_event(struct drm_device *dev)
216{
217 /* send a uevent + call fbdev */
218 drm_sysfs_hotplug_event(dev);
219 if (dev->mode_config.funcs->output_poll_changed)
220 dev->mode_config.funcs->output_poll_changed(dev);
221}
222EXPORT_SYMBOL(drm_kms_helper_hotplug_event);
223
224#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
225static void output_poll_execute(struct work_struct *work)
226{
227 struct delayed_work *delayed_work = to_delayed_work(work);
228 struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
229 struct drm_connector *connector;
230 enum drm_connector_status old_status;
231 bool repoll = false, changed = false;
232
233 if (!drm_kms_helper_poll)
234 return;
235
236 mutex_lock(&dev->mode_config.mutex);
237 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
238
239 /* Ignore forced connectors. */
240 if (connector->force)
241 continue;
242
243 /* Ignore HPD capable connectors and connectors where we don't
244 * want any hotplug detection at all for polling. */
245 if (!connector->polled || connector->polled == DRM_CONNECTOR_POLL_HPD)
246 continue;
247
248 repoll = true;
249
250 old_status = connector->status;
251 /* if we are connected and don't want to poll for disconnect
252 skip it */
253 if (old_status == connector_status_connected &&
254 !(connector->polled & DRM_CONNECTOR_POLL_DISCONNECT))
255 continue;
256
257 connector->status = connector->funcs->detect(connector, false);
258 if (old_status != connector->status) {
259 const char *old, *new;
260
261 old = drm_get_connector_status_name(old_status);
262 new = drm_get_connector_status_name(connector->status);
263
264 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] "
265 "status updated from %s to %s\n",
266 connector->base.id,
267 drm_get_connector_name(connector),
268 old, new);
269
270 changed = true;
271 }
272 }
273
274 mutex_unlock(&dev->mode_config.mutex);
275
276 if (changed)
277 drm_kms_helper_hotplug_event(dev);
278
279 if (repoll)
280 schedule_delayed_work(delayed_work, DRM_OUTPUT_POLL_PERIOD);
281}
282
283/**
284 * drm_kms_helper_poll_disable - disable output polling
285 * @dev: drm_device
286 *
287 * This function disables the output polling work.
288 *
289 * Drivers can call this helper from their device suspend implementation. It is
290 * not an error to call this even when output polling isn't enabled or arlready
291 * disabled.
292 */
293void drm_kms_helper_poll_disable(struct drm_device *dev)
294{
295 if (!dev->mode_config.poll_enabled)
296 return;
297 cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
298}
299EXPORT_SYMBOL(drm_kms_helper_poll_disable);
300
301/**
302 * drm_kms_helper_poll_enable - re-enable output polling.
303 * @dev: drm_device
304 *
305 * This function re-enables the output polling work.
306 *
307 * Drivers can call this helper from their device resume implementation. It is
308 * an error to call this when the output polling support has not yet been set
309 * up.
310 */
311void drm_kms_helper_poll_enable(struct drm_device *dev)
312{
313 bool poll = false;
314 struct drm_connector *connector;
315
316 if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)
317 return;
318
319 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
320 if (connector->polled & (DRM_CONNECTOR_POLL_CONNECT |
321 DRM_CONNECTOR_POLL_DISCONNECT))
322 poll = true;
323 }
324
325 if (poll)
326 schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
327}
328EXPORT_SYMBOL(drm_kms_helper_poll_enable);
329
330/**
331 * drm_kms_helper_poll_init - initialize and enable output polling
332 * @dev: drm_device
333 *
334 * This function intializes and then also enables output polling support for
335 * @dev. Drivers which do not have reliable hotplug support in hardware can use
336 * this helper infrastructure to regularly poll such connectors for changes in
337 * their connection state.
338 *
339 * Drivers can control which connectors are polled by setting the
340 * DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On
341 * connectors where probing live outputs can result in visual distortion drivers
342 * should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this.
343 * Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are
344 * completely ignored by the polling logic.
345 *
346 * Note that a connector can be both polled and probed from the hotplug handler,
347 * in case the hotplug interrupt is known to be unreliable.
348 */
349void drm_kms_helper_poll_init(struct drm_device *dev)
350{
351 INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
352 dev->mode_config.poll_enabled = true;
353
354 drm_kms_helper_poll_enable(dev);
355}
356EXPORT_SYMBOL(drm_kms_helper_poll_init);
357
358/**
359 * drm_kms_helper_poll_fini - disable output polling and clean it up
360 * @dev: drm_device
361 */
362void drm_kms_helper_poll_fini(struct drm_device *dev)
363{
364 drm_kms_helper_poll_disable(dev);
365}
366EXPORT_SYMBOL(drm_kms_helper_poll_fini);
367
368/**
369 * drm_helper_hpd_irq_event - hotplug processing
370 * @dev: drm_device
371 *
372 * Drivers can use this helper function to run a detect cycle on all connectors
373 * which have the DRM_CONNECTOR_POLL_HPD flag set in their &polled member. All
374 * other connectors are ignored, which is useful to avoid reprobing fixed
375 * panels.
376 *
377 * This helper function is useful for drivers which can't or don't track hotplug
378 * interrupts for each connector.
379 *
380 * Drivers which support hotplug interrupts for each connector individually and
381 * which have a more fine-grained detect logic should bypass this code and
382 * directly call drm_kms_helper_hotplug_event() in case the connector state
383 * changed.
384 *
385 * This function must be called from process context with no mode
386 * setting locks held.
387 *
388 * Note that a connector can be both polled and probed from the hotplug handler,
389 * in case the hotplug interrupt is known to be unreliable.
390 */
391bool drm_helper_hpd_irq_event(struct drm_device *dev)
392{
393 struct drm_connector *connector;
394 enum drm_connector_status old_status;
395 bool changed = false;
396
397 if (!dev->mode_config.poll_enabled)
398 return false;
399
400 mutex_lock(&dev->mode_config.mutex);
401 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
402
403 /* Only handle HPD capable connectors. */
404 if (!(connector->polled & DRM_CONNECTOR_POLL_HPD))
405 continue;
406
407 old_status = connector->status;
408
409 connector->status = connector->funcs->detect(connector, false);
410 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
411 connector->base.id,
412 drm_get_connector_name(connector),
413 drm_get_connector_status_name(old_status),
414 drm_get_connector_status_name(connector->status));
415 if (old_status != connector->status)
416 changed = true;
417 }
418
419 mutex_unlock(&dev->mode_config.mutex);
420
421 if (changed)
422 drm_kms_helper_hotplug_event(dev);
423
424 return changed;
425}
426EXPORT_SYMBOL(drm_helper_hpd_irq_event);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index e930d4fe29c7..1ef5ab9c9d51 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -145,6 +145,7 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
145 145
146 plane->crtc = crtc; 146 plane->crtc = crtc;
147 plane->fb = crtc->primary->fb; 147 plane->fb = crtc->primary->fb;
148 drm_framebuffer_reference(plane->fb);
148 149
149 return 0; 150 return 0;
150} 151}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
index c786cd4f457b..2a3ad24276f8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
@@ -263,7 +263,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
263 buffer->sgt = sgt; 263 buffer->sgt = sgt;
264 exynos_gem_obj->base.import_attach = attach; 264 exynos_gem_obj->base.import_attach = attach;
265 265
266 DRM_DEBUG_PRIME("dma_addr = 0x%x, size = 0x%lx\n", buffer->dma_addr, 266 DRM_DEBUG_PRIME("dma_addr = %pad, size = 0x%lx\n", &buffer->dma_addr,
267 buffer->size); 267 buffer->size);
268 268
269 return &exynos_gem_obj->base; 269 return &exynos_gem_obj->base;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index eb73e3bf2a0c..4ac438187568 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -1426,9 +1426,9 @@ static int exynos_dsi_probe(struct platform_device *pdev)
1426 1426
1427 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1427 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1428 dsi->reg_base = devm_ioremap_resource(&pdev->dev, res); 1428 dsi->reg_base = devm_ioremap_resource(&pdev->dev, res);
1429 if (!dsi->reg_base) { 1429 if (IS_ERR(dsi->reg_base)) {
1430 dev_err(&pdev->dev, "failed to remap io region\n"); 1430 dev_err(&pdev->dev, "failed to remap io region\n");
1431 return -EADDRNOTAVAIL; 1431 return PTR_ERR(dsi->reg_base);
1432 } 1432 }
1433 1433
1434 dsi->phy = devm_phy_get(&pdev->dev, "dsim"); 1434 dsi->phy = devm_phy_get(&pdev->dev, "dsim");
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 7afead9c3f30..852f2dadaebd 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -220,7 +220,7 @@ static void vidi_win_commit(struct exynos_drm_manager *mgr, int zpos)
220 220
221 win_data->enabled = true; 221 win_data->enabled = true;
222 222
223 DRM_DEBUG_KMS("dma_addr = 0x%x\n", win_data->dma_addr); 223 DRM_DEBUG_KMS("dma_addr = %pad\n", &win_data->dma_addr);
224 224
225 if (ctx->vblank_on) 225 if (ctx->vblank_on)
226 schedule_work(&ctx->work); 226 schedule_work(&ctx->work);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0905cd915589..108e1ec2fa4b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1308,6 +1308,7 @@ struct intel_vbt_data {
1308 1308
1309 struct { 1309 struct {
1310 u16 pwm_freq_hz; 1310 u16 pwm_freq_hz;
1311 bool present;
1311 bool active_low_pwm; 1312 bool active_low_pwm;
1312 } backlight; 1313 } backlight;
1313 1314
@@ -1953,6 +1954,9 @@ struct drm_i915_cmd_table {
1953#define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev)) 1954#define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev))
1954#define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ 1955#define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \
1955 ((dev)->pdev->device & 0x00F0) == 0x0020) 1956 ((dev)->pdev->device & 0x00F0) == 0x0020)
1957/* ULX machines are also considered ULT. */
1958#define IS_HSW_ULX(dev) ((dev)->pdev->device == 0x0A0E || \
1959 (dev)->pdev->device == 0x0A1E)
1956#define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) 1960#define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary)
1957 1961
1958/* 1962/*
@@ -2431,20 +2435,18 @@ int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
2431int i915_gem_context_enable(struct drm_i915_private *dev_priv); 2435int i915_gem_context_enable(struct drm_i915_private *dev_priv);
2432void i915_gem_context_close(struct drm_device *dev, struct drm_file *file); 2436void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
2433int i915_switch_context(struct intel_ring_buffer *ring, 2437int i915_switch_context(struct intel_ring_buffer *ring,
2434 struct drm_file *file, struct i915_hw_context *to); 2438 struct i915_hw_context *to);
2435struct i915_hw_context * 2439struct i915_hw_context *
2436i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id); 2440i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
2437void i915_gem_context_free(struct kref *ctx_ref); 2441void i915_gem_context_free(struct kref *ctx_ref);
2438static inline void i915_gem_context_reference(struct i915_hw_context *ctx) 2442static inline void i915_gem_context_reference(struct i915_hw_context *ctx)
2439{ 2443{
2440 if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev)) 2444 kref_get(&ctx->ref);
2441 kref_get(&ctx->ref);
2442} 2445}
2443 2446
2444static inline void i915_gem_context_unreference(struct i915_hw_context *ctx) 2447static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
2445{ 2448{
2446 if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev)) 2449 kref_put(&ctx->ref, i915_gem_context_free);
2447 kref_put(&ctx->ref, i915_gem_context_free);
2448} 2450}
2449 2451
2450static inline bool i915_gem_context_is_default(const struct i915_hw_context *c) 2452static inline bool i915_gem_context_is_default(const struct i915_hw_context *c)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6370a761d137..2871ce75f438 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2790,7 +2790,7 @@ int i915_gpu_idle(struct drm_device *dev)
2790 2790
2791 /* Flush everything onto the inactive list. */ 2791 /* Flush everything onto the inactive list. */
2792 for_each_ring(ring, dev_priv, i) { 2792 for_each_ring(ring, dev_priv, i) {
2793 ret = i915_switch_context(ring, NULL, ring->default_context); 2793 ret = i915_switch_context(ring, ring->default_context);
2794 if (ret) 2794 if (ret)
2795 return ret; 2795 return ret;
2796 2796
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 6043062ffce7..d72db15afa02 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -96,9 +96,6 @@
96#define GEN6_CONTEXT_ALIGN (64<<10) 96#define GEN6_CONTEXT_ALIGN (64<<10)
97#define GEN7_CONTEXT_ALIGN 4096 97#define GEN7_CONTEXT_ALIGN 4096
98 98
99static int do_switch(struct intel_ring_buffer *ring,
100 struct i915_hw_context *to);
101
102static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt) 99static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
103{ 100{
104 struct drm_device *dev = ppgtt->base.dev; 101 struct drm_device *dev = ppgtt->base.dev;
@@ -185,13 +182,15 @@ void i915_gem_context_free(struct kref *ctx_ref)
185 typeof(*ctx), ref); 182 typeof(*ctx), ref);
186 struct i915_hw_ppgtt *ppgtt = NULL; 183 struct i915_hw_ppgtt *ppgtt = NULL;
187 184
188 /* We refcount even the aliasing PPGTT to keep the code symmetric */ 185 if (ctx->obj) {
189 if (USES_PPGTT(ctx->obj->base.dev)) 186 /* We refcount even the aliasing PPGTT to keep the code symmetric */
190 ppgtt = ctx_to_ppgtt(ctx); 187 if (USES_PPGTT(ctx->obj->base.dev))
188 ppgtt = ctx_to_ppgtt(ctx);
191 189
192 /* XXX: Free up the object before tearing down the address space, in 190 /* XXX: Free up the object before tearing down the address space, in
193 * case we're bound in the PPGTT */ 191 * case we're bound in the PPGTT */
194 drm_gem_object_unreference(&ctx->obj->base); 192 drm_gem_object_unreference(&ctx->obj->base);
193 }
195 194
196 if (ppgtt) 195 if (ppgtt)
197 kref_put(&ppgtt->ref, ppgtt_release); 196 kref_put(&ppgtt->ref, ppgtt_release);
@@ -232,32 +231,32 @@ __create_hw_context(struct drm_device *dev,
232 return ERR_PTR(-ENOMEM); 231 return ERR_PTR(-ENOMEM);
233 232
234 kref_init(&ctx->ref); 233 kref_init(&ctx->ref);
235 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size); 234 list_add_tail(&ctx->link, &dev_priv->context_list);
236 INIT_LIST_HEAD(&ctx->link);
237 if (ctx->obj == NULL) {
238 kfree(ctx);
239 DRM_DEBUG_DRIVER("Context object allocated failed\n");
240 return ERR_PTR(-ENOMEM);
241 }
242 235
243 if (INTEL_INFO(dev)->gen >= 7) { 236 if (dev_priv->hw_context_size) {
244 ret = i915_gem_object_set_cache_level(ctx->obj, 237 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
245 I915_CACHE_L3_LLC); 238 if (ctx->obj == NULL) {
246 /* Failure shouldn't ever happen this early */ 239 ret = -ENOMEM;
247 if (WARN_ON(ret))
248 goto err_out; 240 goto err_out;
249 } 241 }
250 242
251 list_add_tail(&ctx->link, &dev_priv->context_list); 243 if (INTEL_INFO(dev)->gen >= 7) {
244 ret = i915_gem_object_set_cache_level(ctx->obj,
245 I915_CACHE_L3_LLC);
246 /* Failure shouldn't ever happen this early */
247 if (WARN_ON(ret))
248 goto err_out;
249 }
250 }
252 251
253 /* Default context will never have a file_priv */ 252 /* Default context will never have a file_priv */
254 if (file_priv == NULL) 253 if (file_priv != NULL) {
255 return ctx; 254 ret = idr_alloc(&file_priv->context_idr, ctx,
256 255 DEFAULT_CONTEXT_ID, 0, GFP_KERNEL);
257 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID, 0, 256 if (ret < 0)
258 GFP_KERNEL); 257 goto err_out;
259 if (ret < 0) 258 } else
260 goto err_out; 259 ret = DEFAULT_CONTEXT_ID;
261 260
262 ctx->file_priv = file_priv; 261 ctx->file_priv = file_priv;
263 ctx->id = ret; 262 ctx->id = ret;
@@ -294,7 +293,7 @@ i915_gem_create_context(struct drm_device *dev,
294 if (IS_ERR(ctx)) 293 if (IS_ERR(ctx))
295 return ctx; 294 return ctx;
296 295
297 if (is_global_default_ctx) { 296 if (is_global_default_ctx && ctx->obj) {
298 /* We may need to do things with the shrinker which 297 /* We may need to do things with the shrinker which
299 * require us to immediately switch back to the default 298 * require us to immediately switch back to the default
300 * context. This can cause a problem as pinning the 299 * context. This can cause a problem as pinning the
@@ -342,7 +341,7 @@ i915_gem_create_context(struct drm_device *dev,
342 return ctx; 341 return ctx;
343 342
344err_unpin: 343err_unpin:
345 if (is_global_default_ctx) 344 if (is_global_default_ctx && ctx->obj)
346 i915_gem_object_ggtt_unpin(ctx->obj); 345 i915_gem_object_ggtt_unpin(ctx->obj);
347err_destroy: 346err_destroy:
348 i915_gem_context_unreference(ctx); 347 i915_gem_context_unreference(ctx);
@@ -352,32 +351,22 @@ err_destroy:
352void i915_gem_context_reset(struct drm_device *dev) 351void i915_gem_context_reset(struct drm_device *dev)
353{ 352{
354 struct drm_i915_private *dev_priv = dev->dev_private; 353 struct drm_i915_private *dev_priv = dev->dev_private;
355 struct intel_ring_buffer *ring;
356 int i; 354 int i;
357 355
358 if (!HAS_HW_CONTEXTS(dev))
359 return;
360
361 /* Prevent the hardware from restoring the last context (which hung) on 356 /* Prevent the hardware from restoring the last context (which hung) on
362 * the next switch */ 357 * the next switch */
363 for (i = 0; i < I915_NUM_RINGS; i++) { 358 for (i = 0; i < I915_NUM_RINGS; i++) {
364 struct i915_hw_context *dctx; 359 struct intel_ring_buffer *ring = &dev_priv->ring[i];
365 if (!(INTEL_INFO(dev)->ring_mask & (1<<i))) 360 struct i915_hw_context *dctx = ring->default_context;
366 continue;
367 361
368 /* Do a fake switch to the default context */ 362 /* Do a fake switch to the default context */
369 ring = &dev_priv->ring[i]; 363 if (ring->last_context == dctx)
370 dctx = ring->default_context;
371 if (WARN_ON(!dctx))
372 continue; 364 continue;
373 365
374 if (!ring->last_context) 366 if (!ring->last_context)
375 continue; 367 continue;
376 368
377 if (ring->last_context == dctx) 369 if (dctx->obj && i == RCS) {
378 continue;
379
380 if (i == RCS) {
381 WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj, 370 WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj,
382 get_context_alignment(dev), 0)); 371 get_context_alignment(dev), 0));
383 /* Fake a finish/inactive */ 372 /* Fake a finish/inactive */
@@ -394,44 +383,35 @@ void i915_gem_context_reset(struct drm_device *dev)
394int i915_gem_context_init(struct drm_device *dev) 383int i915_gem_context_init(struct drm_device *dev)
395{ 384{
396 struct drm_i915_private *dev_priv = dev->dev_private; 385 struct drm_i915_private *dev_priv = dev->dev_private;
397 struct intel_ring_buffer *ring; 386 struct i915_hw_context *ctx;
398 int i; 387 int i;
399 388
400 if (!HAS_HW_CONTEXTS(dev))
401 return 0;
402
403 /* Init should only be called once per module load. Eventually the 389 /* Init should only be called once per module load. Eventually the
404 * restriction on the context_disabled check can be loosened. */ 390 * restriction on the context_disabled check can be loosened. */
405 if (WARN_ON(dev_priv->ring[RCS].default_context)) 391 if (WARN_ON(dev_priv->ring[RCS].default_context))
406 return 0; 392 return 0;
407 393
408 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096); 394 if (HAS_HW_CONTEXTS(dev)) {
409 395 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
410 if (dev_priv->hw_context_size > (1<<20)) { 396 if (dev_priv->hw_context_size > (1<<20)) {
411 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n"); 397 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size %d\n",
412 return -E2BIG; 398 dev_priv->hw_context_size);
399 dev_priv->hw_context_size = 0;
400 }
413 } 401 }
414 402
415 dev_priv->ring[RCS].default_context = 403 ctx = i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
416 i915_gem_create_context(dev, NULL, USES_PPGTT(dev)); 404 if (IS_ERR(ctx)) {
417 405 DRM_ERROR("Failed to create default global context (error %ld)\n",
418 if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) { 406 PTR_ERR(ctx));
419 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n", 407 return PTR_ERR(ctx);
420 PTR_ERR(dev_priv->ring[RCS].default_context));
421 return PTR_ERR(dev_priv->ring[RCS].default_context);
422 } 408 }
423 409
424 for (i = RCS + 1; i < I915_NUM_RINGS; i++) { 410 /* NB: RCS will hold a ref for all rings */
425 if (!(INTEL_INFO(dev)->ring_mask & (1<<i))) 411 for (i = 0; i < I915_NUM_RINGS; i++)
426 continue; 412 dev_priv->ring[i].default_context = ctx;
427
428 ring = &dev_priv->ring[i];
429 413
430 /* NB: RCS will hold a ref for all rings */ 414 DRM_DEBUG_DRIVER("%s context support initialized\n", dev_priv->hw_context_size ? "HW" : "fake");
431 ring->default_context = dev_priv->ring[RCS].default_context;
432 }
433
434 DRM_DEBUG_DRIVER("HW context support initialized\n");
435 return 0; 415 return 0;
436} 416}
437 417
@@ -441,33 +421,30 @@ void i915_gem_context_fini(struct drm_device *dev)
441 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context; 421 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
442 int i; 422 int i;
443 423
444 if (!HAS_HW_CONTEXTS(dev)) 424 if (dctx->obj) {
445 return; 425 /* The only known way to stop the gpu from accessing the hw context is
446 426 * to reset it. Do this as the very last operation to avoid confusing
447 /* The only known way to stop the gpu from accessing the hw context is 427 * other code, leading to spurious errors. */
448 * to reset it. Do this as the very last operation to avoid confusing 428 intel_gpu_reset(dev);
449 * other code, leading to spurious errors. */ 429
450 intel_gpu_reset(dev); 430 /* When default context is created and switched to, base object refcount
451 431 * will be 2 (+1 from object creation and +1 from do_switch()).
452 /* When default context is created and switched to, base object refcount 432 * i915_gem_context_fini() will be called after gpu_idle() has switched
453 * will be 2 (+1 from object creation and +1 from do_switch()). 433 * to default context. So we need to unreference the base object once
454 * i915_gem_context_fini() will be called after gpu_idle() has switched 434 * to offset the do_switch part, so that i915_gem_context_unreference()
455 * to default context. So we need to unreference the base object once 435 * can then free the base object correctly. */
456 * to offset the do_switch part, so that i915_gem_context_unreference() 436 WARN_ON(!dev_priv->ring[RCS].last_context);
457 * can then free the base object correctly. */ 437 if (dev_priv->ring[RCS].last_context == dctx) {
458 WARN_ON(!dev_priv->ring[RCS].last_context); 438 /* Fake switch to NULL context */
459 if (dev_priv->ring[RCS].last_context == dctx) { 439 WARN_ON(dctx->obj->active);
460 /* Fake switch to NULL context */ 440 i915_gem_object_ggtt_unpin(dctx->obj);
461 WARN_ON(dctx->obj->active); 441 i915_gem_context_unreference(dctx);
462 i915_gem_object_ggtt_unpin(dctx->obj); 442 dev_priv->ring[RCS].last_context = NULL;
463 i915_gem_context_unreference(dctx); 443 }
464 dev_priv->ring[RCS].last_context = NULL;
465 } 444 }
466 445
467 for (i = 0; i < I915_NUM_RINGS; i++) { 446 for (i = 0; i < I915_NUM_RINGS; i++) {
468 struct intel_ring_buffer *ring = &dev_priv->ring[i]; 447 struct intel_ring_buffer *ring = &dev_priv->ring[i];
469 if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
470 continue;
471 448
472 if (ring->last_context) 449 if (ring->last_context)
473 i915_gem_context_unreference(ring->last_context); 450 i915_gem_context_unreference(ring->last_context);
@@ -478,7 +455,6 @@ void i915_gem_context_fini(struct drm_device *dev)
478 455
479 i915_gem_object_ggtt_unpin(dctx->obj); 456 i915_gem_object_ggtt_unpin(dctx->obj);
480 i915_gem_context_unreference(dctx); 457 i915_gem_context_unreference(dctx);
481 dev_priv->mm.aliasing_ppgtt = NULL;
482} 458}
483 459
484int i915_gem_context_enable(struct drm_i915_private *dev_priv) 460int i915_gem_context_enable(struct drm_i915_private *dev_priv)
@@ -486,9 +462,6 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
486 struct intel_ring_buffer *ring; 462 struct intel_ring_buffer *ring;
487 int ret, i; 463 int ret, i;
488 464
489 if (!HAS_HW_CONTEXTS(dev_priv->dev))
490 return 0;
491
492 /* This is the only place the aliasing PPGTT gets enabled, which means 465 /* This is the only place the aliasing PPGTT gets enabled, which means
493 * it has to happen before we bail on reset */ 466 * it has to happen before we bail on reset */
494 if (dev_priv->mm.aliasing_ppgtt) { 467 if (dev_priv->mm.aliasing_ppgtt) {
@@ -503,7 +476,7 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
503 BUG_ON(!dev_priv->ring[RCS].default_context); 476 BUG_ON(!dev_priv->ring[RCS].default_context);
504 477
505 for_each_ring(ring, dev_priv, i) { 478 for_each_ring(ring, dev_priv, i) {
506 ret = do_switch(ring, ring->default_context); 479 ret = i915_switch_context(ring, ring->default_context);
507 if (ret) 480 if (ret)
508 return ret; 481 return ret;
509 } 482 }
@@ -526,19 +499,6 @@ static int context_idr_cleanup(int id, void *p, void *data)
526int i915_gem_context_open(struct drm_device *dev, struct drm_file *file) 499int i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
527{ 500{
528 struct drm_i915_file_private *file_priv = file->driver_priv; 501 struct drm_i915_file_private *file_priv = file->driver_priv;
529 struct drm_i915_private *dev_priv = dev->dev_private;
530
531 if (!HAS_HW_CONTEXTS(dev)) {
532 /* Cheat for hang stats */
533 file_priv->private_default_ctx =
534 kzalloc(sizeof(struct i915_hw_context), GFP_KERNEL);
535
536 if (file_priv->private_default_ctx == NULL)
537 return -ENOMEM;
538
539 file_priv->private_default_ctx->vm = &dev_priv->gtt.base;
540 return 0;
541 }
542 502
543 idr_init(&file_priv->context_idr); 503 idr_init(&file_priv->context_idr);
544 504
@@ -559,14 +519,10 @@ void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
559{ 519{
560 struct drm_i915_file_private *file_priv = file->driver_priv; 520 struct drm_i915_file_private *file_priv = file->driver_priv;
561 521
562 if (!HAS_HW_CONTEXTS(dev)) {
563 kfree(file_priv->private_default_ctx);
564 return;
565 }
566
567 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL); 522 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
568 i915_gem_context_unreference(file_priv->private_default_ctx);
569 idr_destroy(&file_priv->context_idr); 523 idr_destroy(&file_priv->context_idr);
524
525 i915_gem_context_unreference(file_priv->private_default_ctx);
570} 526}
571 527
572struct i915_hw_context * 528struct i915_hw_context *
@@ -574,9 +530,6 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
574{ 530{
575 struct i915_hw_context *ctx; 531 struct i915_hw_context *ctx;
576 532
577 if (!HAS_HW_CONTEXTS(file_priv->dev_priv->dev))
578 return file_priv->private_default_ctx;
579
580 ctx = (struct i915_hw_context *)idr_find(&file_priv->context_idr, id); 533 ctx = (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
581 if (!ctx) 534 if (!ctx)
582 return ERR_PTR(-ENOENT); 535 return ERR_PTR(-ENOENT);
@@ -758,7 +711,6 @@ unpin_out:
758/** 711/**
759 * i915_switch_context() - perform a GPU context switch. 712 * i915_switch_context() - perform a GPU context switch.
760 * @ring: ring for which we'll execute the context switch 713 * @ring: ring for which we'll execute the context switch
761 * @file_priv: file_priv associated with the context, may be NULL
762 * @to: the context to switch to 714 * @to: the context to switch to
763 * 715 *
764 * The context life cycle is simple. The context refcount is incremented and 716 * The context life cycle is simple. The context refcount is incremented and
@@ -767,24 +719,30 @@ unpin_out:
767 * object while letting the normal object tracking destroy the backing BO. 719 * object while letting the normal object tracking destroy the backing BO.
768 */ 720 */
769int i915_switch_context(struct intel_ring_buffer *ring, 721int i915_switch_context(struct intel_ring_buffer *ring,
770 struct drm_file *file,
771 struct i915_hw_context *to) 722 struct i915_hw_context *to)
772{ 723{
773 struct drm_i915_private *dev_priv = ring->dev->dev_private; 724 struct drm_i915_private *dev_priv = ring->dev->dev_private;
774 725
775 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); 726 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
776 727
777 BUG_ON(file && to == NULL); 728 if (to->obj == NULL) { /* We have the fake context */
778 729 if (to != ring->last_context) {
779 /* We have the fake context */ 730 i915_gem_context_reference(to);
780 if (!HAS_HW_CONTEXTS(ring->dev)) { 731 if (ring->last_context)
781 ring->last_context = to; 732 i915_gem_context_unreference(ring->last_context);
733 ring->last_context = to;
734 }
782 return 0; 735 return 0;
783 } 736 }
784 737
785 return do_switch(ring, to); 738 return do_switch(ring, to);
786} 739}
787 740
741static bool hw_context_enabled(struct drm_device *dev)
742{
743 return to_i915(dev)->hw_context_size;
744}
745
788int i915_gem_context_create_ioctl(struct drm_device *dev, void *data, 746int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
789 struct drm_file *file) 747 struct drm_file *file)
790{ 748{
@@ -793,7 +751,7 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
793 struct i915_hw_context *ctx; 751 struct i915_hw_context *ctx;
794 int ret; 752 int ret;
795 753
796 if (!HAS_HW_CONTEXTS(dev)) 754 if (!hw_context_enabled(dev))
797 return -ENODEV; 755 return -ENODEV;
798 756
799 ret = i915_mutex_lock_interruptible(dev); 757 ret = i915_mutex_lock_interruptible(dev);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 7447160155a3..2c9d9cbaf653 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1221,7 +1221,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
1221 if (ret) 1221 if (ret)
1222 goto err; 1222 goto err;
1223 1223
1224 ret = i915_switch_context(ring, file, ctx); 1224 ret = i915_switch_context(ring, ctx);
1225 if (ret) 1225 if (ret)
1226 goto err; 1226 goto err;
1227 1227
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ab5e93c30aa2..154b0f8bb88d 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -34,25 +34,35 @@ static void gen8_setup_private_ppat(struct drm_i915_private *dev_priv);
34 34
35bool intel_enable_ppgtt(struct drm_device *dev, bool full) 35bool intel_enable_ppgtt(struct drm_device *dev, bool full)
36{ 36{
37 if (i915.enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev)) 37 if (i915.enable_ppgtt == 0)
38 return false; 38 return false;
39 39
40 if (i915.enable_ppgtt == 1 && full) 40 if (i915.enable_ppgtt == 1 && full)
41 return false; 41 return false;
42 42
43 return true;
44}
45
46static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
47{
48 if (enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
49 return 0;
50
51 if (enable_ppgtt == 1)
52 return 1;
53
54 if (enable_ppgtt == 2 && HAS_PPGTT(dev))
55 return 2;
56
43#ifdef CONFIG_INTEL_IOMMU 57#ifdef CONFIG_INTEL_IOMMU
44 /* Disable ppgtt on SNB if VT-d is on. */ 58 /* Disable ppgtt on SNB if VT-d is on. */
45 if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) { 59 if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) {
46 DRM_INFO("Disabling PPGTT because VT-d is on\n"); 60 DRM_INFO("Disabling PPGTT because VT-d is on\n");
47 return false; 61 return 0;
48 } 62 }
49#endif 63#endif
50 64
51 /* Full ppgtt disabled by default for now due to issues. */ 65 return HAS_ALIASING_PPGTT(dev) ? 1 : 0;
52 if (full)
53 return false; /* HAS_PPGTT(dev) */
54 else
55 return HAS_ALIASING_PPGTT(dev);
56} 66}
57 67
58#define GEN6_PPGTT_PD_ENTRIES 512 68#define GEN6_PPGTT_PD_ENTRIES 512
@@ -2031,6 +2041,14 @@ int i915_gem_gtt_init(struct drm_device *dev)
2031 gtt->base.total >> 20); 2041 gtt->base.total >> 20);
2032 DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20); 2042 DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20);
2033 DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20); 2043 DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20);
2044 /*
2045 * i915.enable_ppgtt is read-only, so do an early pass to validate the
2046 * user's requested state against the hardware/driver capabilities. We
2047 * do this now so that we can print out any log messages once rather
2048 * than every time we check intel_enable_ppgtt().
2049 */
2050 i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt);
2051 DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);
2034 2052
2035 return 0; 2053 return 0;
2036} 2054}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7753249b3a95..f98ba4e6e70b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1362,10 +1362,20 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
1362 spin_lock(&dev_priv->irq_lock); 1362 spin_lock(&dev_priv->irq_lock);
1363 for (i = 1; i < HPD_NUM_PINS; i++) { 1363 for (i = 1; i < HPD_NUM_PINS; i++) {
1364 1364
1365 WARN_ONCE(hpd[i] & hotplug_trigger && 1365 if (hpd[i] & hotplug_trigger &&
1366 dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED, 1366 dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) {
1367 "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", 1367 /*
1368 hotplug_trigger, i, hpd[i]); 1368 * On GMCH platforms the interrupt mask bits only
1369 * prevent irq generation, not the setting of the
1370 * hotplug bits itself. So only WARN about unexpected
1371 * interrupts on saner platforms.
1372 */
1373 WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev),
1374 "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n",
1375 hotplug_trigger, i, hpd[i]);
1376
1377 continue;
1378 }
1369 1379
1370 if (!(hpd[i] & hotplug_trigger) || 1380 if (!(hpd[i] & hotplug_trigger) ||
1371 dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED) 1381 dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9f5b18d9d885..c77af69c2d8f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -827,6 +827,7 @@ enum punit_power_well {
827# define MI_FLUSH_ENABLE (1 << 12) 827# define MI_FLUSH_ENABLE (1 << 12)
828# define ASYNC_FLIP_PERF_DISABLE (1 << 14) 828# define ASYNC_FLIP_PERF_DISABLE (1 << 14)
829# define MODE_IDLE (1 << 9) 829# define MODE_IDLE (1 << 9)
830# define STOP_RING (1 << 8)
830 831
831#define GEN6_GT_MODE 0x20d0 832#define GEN6_GT_MODE 0x20d0
832#define GEN7_GT_MODE 0x7008 833#define GEN7_GT_MODE 0x7008
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4867f4cc0938..fa486c5fbb02 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -287,6 +287,9 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
287 const struct bdb_lfp_backlight_data *backlight_data; 287 const struct bdb_lfp_backlight_data *backlight_data;
288 const struct bdb_lfp_backlight_data_entry *entry; 288 const struct bdb_lfp_backlight_data_entry *entry;
289 289
290 /* Err to enabling backlight if no backlight block. */
291 dev_priv->vbt.backlight.present = true;
292
290 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 293 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
291 if (!backlight_data) 294 if (!backlight_data)
292 return; 295 return;
@@ -299,6 +302,13 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
299 302
300 entry = &backlight_data->data[panel_type]; 303 entry = &backlight_data->data[panel_type];
301 304
305 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
306 if (!dev_priv->vbt.backlight.present) {
307 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
308 entry->type);
309 return;
310 }
311
302 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 312 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
303 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 313 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
304 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 314 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 83b7629e4367..f27f7b282465 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -374,6 +374,9 @@ struct bdb_lvds_lfp_data {
374 struct bdb_lvds_lfp_data_entry data[16]; 374 struct bdb_lvds_lfp_data_entry data[16];
375} __packed; 375} __packed;
376 376
377#define BDB_BACKLIGHT_TYPE_NONE 0
378#define BDB_BACKLIGHT_TYPE_PWM 2
379
377struct bdb_lfp_backlight_data_entry { 380struct bdb_lfp_backlight_data_entry {
378 u8 type:2; 381 u8 type:2;
379 u8 active_low_pwm:1; 382 u8 active_low_pwm:1;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index dae976f51d83..48aa516a1ac0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9654,11 +9654,22 @@ intel_pipe_config_compare(struct drm_device *dev,
9654 PIPE_CONF_CHECK_I(pipe_src_w); 9654 PIPE_CONF_CHECK_I(pipe_src_w);
9655 PIPE_CONF_CHECK_I(pipe_src_h); 9655 PIPE_CONF_CHECK_I(pipe_src_h);
9656 9656
9657 PIPE_CONF_CHECK_I(gmch_pfit.control); 9657 /*
9658 /* pfit ratios are autocomputed by the hw on gen4+ */ 9658 * FIXME: BIOS likes to set up a cloned config with lvds+external
9659 if (INTEL_INFO(dev)->gen < 4) 9659 * screen. Since we don't yet re-compute the pipe config when moving
9660 PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); 9660 * just the lvds port away to another pipe the sw tracking won't match.
9661 PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); 9661 *
9662 * Proper atomic modesets with recomputed global state will fix this.
9663 * Until then just don't check gmch state for inherited modes.
9664 */
9665 if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) {
9666 PIPE_CONF_CHECK_I(gmch_pfit.control);
9667 /* pfit ratios are autocomputed by the hw on gen4+ */
9668 if (INTEL_INFO(dev)->gen < 4)
9669 PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
9670 PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
9671 }
9672
9662 PIPE_CONF_CHECK_I(pch_pfit.enabled); 9673 PIPE_CONF_CHECK_I(pch_pfit.enabled);
9663 if (current_config->pch_pfit.enabled) { 9674 if (current_config->pch_pfit.enabled) {
9664 PIPE_CONF_CHECK_I(pch_pfit.pos); 9675 PIPE_CONF_CHECK_I(pch_pfit.pos);
@@ -11384,15 +11395,6 @@ void intel_modeset_init(struct drm_device *dev)
11384 } 11395 }
11385} 11396}
11386 11397
11387static void
11388intel_connector_break_all_links(struct intel_connector *connector)
11389{
11390 connector->base.dpms = DRM_MODE_DPMS_OFF;
11391 connector->base.encoder = NULL;
11392 connector->encoder->connectors_active = false;
11393 connector->encoder->base.crtc = NULL;
11394}
11395
11396static void intel_enable_pipe_a(struct drm_device *dev) 11398static void intel_enable_pipe_a(struct drm_device *dev)
11397{ 11399{
11398 struct intel_connector *connector; 11400 struct intel_connector *connector;
@@ -11474,8 +11476,17 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
11474 if (connector->encoder->base.crtc != &crtc->base) 11476 if (connector->encoder->base.crtc != &crtc->base)
11475 continue; 11477 continue;
11476 11478
11477 intel_connector_break_all_links(connector); 11479 connector->base.dpms = DRM_MODE_DPMS_OFF;
11480 connector->base.encoder = NULL;
11478 } 11481 }
11482 /* multiple connectors may have the same encoder:
11483 * handle them and break crtc link separately */
11484 list_for_each_entry(connector, &dev->mode_config.connector_list,
11485 base.head)
11486 if (connector->encoder->base.crtc == &crtc->base) {
11487 connector->encoder->base.crtc = NULL;
11488 connector->encoder->connectors_active = false;
11489 }
11479 11490
11480 WARN_ON(crtc->active); 11491 WARN_ON(crtc->active);
11481 crtc->base.enabled = false; 11492 crtc->base.enabled = false;
@@ -11557,6 +11568,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
11557 drm_get_encoder_name(&encoder->base)); 11568 drm_get_encoder_name(&encoder->base));
11558 encoder->disable(encoder); 11569 encoder->disable(encoder);
11559 } 11570 }
11571 encoder->base.crtc = NULL;
11572 encoder->connectors_active = false;
11560 11573
11561 /* Inconsistent output/port/pipe state happens presumably due to 11574 /* Inconsistent output/port/pipe state happens presumably due to
11562 * a bug in one of the get_hw_state functions. Or someplace else 11575 * a bug in one of the get_hw_state functions. Or someplace else
@@ -11567,8 +11580,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
11567 base.head) { 11580 base.head) {
11568 if (connector->encoder != encoder) 11581 if (connector->encoder != encoder)
11569 continue; 11582 continue;
11570 11583 connector->base.dpms = DRM_MODE_DPMS_OFF;
11571 intel_connector_break_all_links(connector); 11584 connector->base.encoder = NULL;
11572 } 11585 }
11573 } 11586 }
11574 /* Enabled encoders without active connectors will be fixed in 11587 /* Enabled encoders without active connectors will be fixed in
@@ -11616,6 +11629,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
11616 base.head) { 11629 base.head) {
11617 memset(&crtc->config, 0, sizeof(crtc->config)); 11630 memset(&crtc->config, 0, sizeof(crtc->config));
11618 11631
11632 crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
11633
11619 crtc->active = dev_priv->display.get_pipe_config(crtc, 11634 crtc->active = dev_priv->display.get_pipe_config(crtc,
11620 &crtc->config); 11635 &crtc->config);
11621 11636
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index a0dad1a2f819..5ca68aa9f237 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -105,7 +105,8 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
105 case DP_LINK_BW_2_7: 105 case DP_LINK_BW_2_7:
106 break; 106 break;
107 case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */ 107 case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */
108 if ((IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) && 108 if (((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) ||
109 INTEL_INFO(dev)->gen >= 8) &&
109 intel_dp->dpcd[DP_DPCD_REV] >= 0x12) 110 intel_dp->dpcd[DP_DPCD_REV] >= 0x12)
110 max_link_bw = DP_LINK_BW_5_4; 111 max_link_bw = DP_LINK_BW_5_4;
111 else 112 else
@@ -575,7 +576,8 @@ out:
575 return ret; 576 return ret;
576} 577}
577 578
578#define HEADER_SIZE 4 579#define BARE_ADDRESS_SIZE 3
580#define HEADER_SIZE (BARE_ADDRESS_SIZE + 1)
579static ssize_t 581static ssize_t
580intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) 582intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
581{ 583{
@@ -592,7 +594,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
592 switch (msg->request & ~DP_AUX_I2C_MOT) { 594 switch (msg->request & ~DP_AUX_I2C_MOT) {
593 case DP_AUX_NATIVE_WRITE: 595 case DP_AUX_NATIVE_WRITE:
594 case DP_AUX_I2C_WRITE: 596 case DP_AUX_I2C_WRITE:
595 txsize = HEADER_SIZE + msg->size; 597 txsize = msg->size ? HEADER_SIZE + msg->size : BARE_ADDRESS_SIZE;
596 rxsize = 1; 598 rxsize = 1;
597 599
598 if (WARN_ON(txsize > 20)) 600 if (WARN_ON(txsize > 20))
@@ -611,7 +613,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
611 613
612 case DP_AUX_NATIVE_READ: 614 case DP_AUX_NATIVE_READ:
613 case DP_AUX_I2C_READ: 615 case DP_AUX_I2C_READ:
614 txsize = HEADER_SIZE; 616 txsize = msg->size ? HEADER_SIZE : BARE_ADDRESS_SIZE;
615 rxsize = msg->size + 1; 617 rxsize = msg->size + 1;
616 618
617 if (WARN_ON(rxsize > 20)) 619 if (WARN_ON(rxsize > 20))
@@ -3618,7 +3620,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
3618{ 3620{
3619 struct drm_connector *connector = &intel_connector->base; 3621 struct drm_connector *connector = &intel_connector->base;
3620 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 3622 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
3621 struct drm_device *dev = intel_dig_port->base.base.dev; 3623 struct intel_encoder *intel_encoder = &intel_dig_port->base;
3624 struct drm_device *dev = intel_encoder->base.dev;
3622 struct drm_i915_private *dev_priv = dev->dev_private; 3625 struct drm_i915_private *dev_priv = dev->dev_private;
3623 struct drm_display_mode *fixed_mode = NULL; 3626 struct drm_display_mode *fixed_mode = NULL;
3624 bool has_dpcd; 3627 bool has_dpcd;
@@ -3628,6 +3631,14 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
3628 if (!is_edp(intel_dp)) 3631 if (!is_edp(intel_dp))
3629 return true; 3632 return true;
3630 3633
3634 /* The VDD bit needs a power domain reference, so if the bit is already
3635 * enabled when we boot, grab this reference. */
3636 if (edp_have_panel_vdd(intel_dp)) {
3637 enum intel_display_power_domain power_domain;
3638 power_domain = intel_display_port_power_domain(intel_encoder);
3639 intel_display_power_get(dev_priv, power_domain);
3640 }
3641
3631 /* Cache DPCD and EDID for edp. */ 3642 /* Cache DPCD and EDID for edp. */
3632 intel_edp_panel_vdd_on(intel_dp); 3643 intel_edp_panel_vdd_on(intel_dp);
3633 has_dpcd = intel_dp_get_dpcd(intel_dp); 3644 has_dpcd = intel_dp_get_dpcd(intel_dp);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0542de982260..328b1a70264b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -236,7 +236,8 @@ struct intel_crtc_config {
236 * tracked with quirk flags so that fastboot and state checker can act 236 * tracked with quirk flags so that fastboot and state checker can act
237 * accordingly. 237 * accordingly.
238 */ 238 */
239#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ 239#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
240#define PIPE_CONFIG_QUIRK_INHERITED_MODE (1<<1) /* mode inherited from firmware */
240 unsigned long quirks; 241 unsigned long quirks;
241 242
242 /* User requested mode, only valid as a starting point to 243 /* User requested mode, only valid as a starting point to
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index b4d44e62f0c7..fce4a0d93c0b 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -132,6 +132,16 @@ static int intelfb_create(struct drm_fb_helper *helper,
132 132
133 mutex_lock(&dev->struct_mutex); 133 mutex_lock(&dev->struct_mutex);
134 134
135 if (intel_fb &&
136 (sizes->fb_width > intel_fb->base.width ||
137 sizes->fb_height > intel_fb->base.height)) {
138 DRM_DEBUG_KMS("BIOS fb too small (%dx%d), we require (%dx%d),"
139 " releasing it\n",
140 intel_fb->base.width, intel_fb->base.height,
141 sizes->fb_width, sizes->fb_height);
142 drm_framebuffer_unreference(&intel_fb->base);
143 intel_fb = ifbdev->fb = NULL;
144 }
135 if (!intel_fb || WARN_ON(!intel_fb->obj)) { 145 if (!intel_fb || WARN_ON(!intel_fb->obj)) {
136 DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n"); 146 DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n");
137 ret = intelfb_alloc(helper, sizes); 147 ret = intelfb_alloc(helper, sizes);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index b0413e190625..157267aa3561 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -821,11 +821,11 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
821 } 821 }
822} 822}
823 823
824static int hdmi_portclock_limit(struct intel_hdmi *hdmi) 824static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit)
825{ 825{
826 struct drm_device *dev = intel_hdmi_to_dev(hdmi); 826 struct drm_device *dev = intel_hdmi_to_dev(hdmi);
827 827
828 if (!hdmi->has_hdmi_sink || IS_G4X(dev)) 828 if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev))
829 return 165000; 829 return 165000;
830 else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) 830 else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
831 return 300000; 831 return 300000;
@@ -837,7 +837,8 @@ static enum drm_mode_status
837intel_hdmi_mode_valid(struct drm_connector *connector, 837intel_hdmi_mode_valid(struct drm_connector *connector,
838 struct drm_display_mode *mode) 838 struct drm_display_mode *mode)
839{ 839{
840 if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector))) 840 if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
841 true))
841 return MODE_CLOCK_HIGH; 842 return MODE_CLOCK_HIGH;
842 if (mode->clock < 20000) 843 if (mode->clock < 20000)
843 return MODE_CLOCK_LOW; 844 return MODE_CLOCK_LOW;
@@ -879,7 +880,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
879 struct drm_device *dev = encoder->base.dev; 880 struct drm_device *dev = encoder->base.dev;
880 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 881 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
881 int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2; 882 int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2;
882 int portclock_limit = hdmi_portclock_limit(intel_hdmi); 883 int portclock_limit = hdmi_portclock_limit(intel_hdmi, false);
883 int desired_bpp; 884 int desired_bpp;
884 885
885 if (intel_hdmi->color_range_auto) { 886 if (intel_hdmi->color_range_auto) {
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index cb058408c70e..0eead16aeda7 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1065,6 +1065,11 @@ int intel_panel_setup_backlight(struct drm_connector *connector)
1065 unsigned long flags; 1065 unsigned long flags;
1066 int ret; 1066 int ret;
1067 1067
1068 if (!dev_priv->vbt.backlight.present) {
1069 DRM_DEBUG_KMS("native backlight control not available per VBT\n");
1070 return 0;
1071 }
1072
1068 /* set level and max in panel struct */ 1073 /* set level and max in panel struct */
1069 spin_lock_irqsave(&dev_priv->backlight_lock, flags); 1074 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
1070 ret = dev_priv->display.setup_backlight(intel_connector); 1075 ret = dev_priv->display.setup_backlight(intel_connector);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5874716774a7..19e94c3edc19 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1545,6 +1545,16 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
1545 1545
1546 DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); 1546 DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
1547 1547
1548 if (IS_I915GM(dev) && enabled) {
1549 struct intel_framebuffer *fb;
1550
1551 fb = to_intel_framebuffer(enabled->primary->fb);
1552
1553 /* self-refresh seems busted with untiled */
1554 if (fb->obj->tiling_mode == I915_TILING_NONE)
1555 enabled = NULL;
1556 }
1557
1548 /* 1558 /*
1549 * Overlay gets an aggressive default since video jitter is bad. 1559 * Overlay gets an aggressive default since video jitter is bad.
1550 */ 1560 */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6bc68bdcf433..79fb4cc2137c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -437,32 +437,41 @@ static void ring_setup_phys_status_page(struct intel_ring_buffer *ring)
437 I915_WRITE(HWS_PGA, addr); 437 I915_WRITE(HWS_PGA, addr);
438} 438}
439 439
440static int init_ring_common(struct intel_ring_buffer *ring) 440static bool stop_ring(struct intel_ring_buffer *ring)
441{ 441{
442 struct drm_device *dev = ring->dev; 442 struct drm_i915_private *dev_priv = to_i915(ring->dev);
443 struct drm_i915_private *dev_priv = dev->dev_private;
444 struct drm_i915_gem_object *obj = ring->obj;
445 int ret = 0;
446 u32 head;
447 443
448 gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL); 444 if (!IS_GEN2(ring->dev)) {
445 I915_WRITE_MODE(ring, _MASKED_BIT_ENABLE(STOP_RING));
446 if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) {
447 DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
448 return false;
449 }
450 }
449 451
450 /* Stop the ring if it's running. */
451 I915_WRITE_CTL(ring, 0); 452 I915_WRITE_CTL(ring, 0);
452 I915_WRITE_HEAD(ring, 0); 453 I915_WRITE_HEAD(ring, 0);
453 ring->write_tail(ring, 0); 454 ring->write_tail(ring, 0);
454 if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000))
455 DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
456 455
457 if (I915_NEED_GFX_HWS(dev)) 456 if (!IS_GEN2(ring->dev)) {
458 intel_ring_setup_status_page(ring); 457 (void)I915_READ_CTL(ring);
459 else 458 I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
460 ring_setup_phys_status_page(ring); 459 }
461 460
462 head = I915_READ_HEAD(ring) & HEAD_ADDR; 461 return (I915_READ_HEAD(ring) & HEAD_ADDR) == 0;
462}
463 463
464 /* G45 ring initialization fails to reset head to zero */ 464static int init_ring_common(struct intel_ring_buffer *ring)
465 if (head != 0) { 465{
466 struct drm_device *dev = ring->dev;
467 struct drm_i915_private *dev_priv = dev->dev_private;
468 struct drm_i915_gem_object *obj = ring->obj;
469 int ret = 0;
470
471 gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
472
473 if (!stop_ring(ring)) {
474 /* G45 ring initialization often fails to reset head to zero */
466 DRM_DEBUG_KMS("%s head not reset to zero " 475 DRM_DEBUG_KMS("%s head not reset to zero "
467 "ctl %08x head %08x tail %08x start %08x\n", 476 "ctl %08x head %08x tail %08x start %08x\n",
468 ring->name, 477 ring->name,
@@ -471,9 +480,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
471 I915_READ_TAIL(ring), 480 I915_READ_TAIL(ring),
472 I915_READ_START(ring)); 481 I915_READ_START(ring));
473 482
474 I915_WRITE_HEAD(ring, 0); 483 if (!stop_ring(ring)) {
475
476 if (I915_READ_HEAD(ring) & HEAD_ADDR) {
477 DRM_ERROR("failed to set %s head to zero " 484 DRM_ERROR("failed to set %s head to zero "
478 "ctl %08x head %08x tail %08x start %08x\n", 485 "ctl %08x head %08x tail %08x start %08x\n",
479 ring->name, 486 ring->name,
@@ -481,9 +488,16 @@ static int init_ring_common(struct intel_ring_buffer *ring)
481 I915_READ_HEAD(ring), 488 I915_READ_HEAD(ring),
482 I915_READ_TAIL(ring), 489 I915_READ_TAIL(ring),
483 I915_READ_START(ring)); 490 I915_READ_START(ring));
491 ret = -EIO;
492 goto out;
484 } 493 }
485 } 494 }
486 495
496 if (I915_NEED_GFX_HWS(dev))
497 intel_ring_setup_status_page(ring);
498 else
499 ring_setup_phys_status_page(ring);
500
487 /* Initialize the ring. This must happen _after_ we've cleared the ring 501 /* Initialize the ring. This must happen _after_ we've cleared the ring
488 * registers with the above sequence (the readback of the HEAD registers 502 * registers with the above sequence (the readback of the HEAD registers
489 * also enforces ordering), otherwise the hw might lose the new ring 503 * also enforces ordering), otherwise the hw might lose the new ring
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 270a6a973438..2b91c4b4d34b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -34,6 +34,7 @@ struct intel_hw_status_page {
34#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) 34#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
35 35
36#define I915_READ_MODE(ring) I915_READ(RING_MI_MODE((ring)->mmio_base)) 36#define I915_READ_MODE(ring) I915_READ(RING_MI_MODE((ring)->mmio_base))
37#define I915_WRITE_MODE(ring, val) I915_WRITE(RING_MI_MODE((ring)->mmio_base), val)
37 38
38enum intel_ring_hangcheck_action { 39enum intel_ring_hangcheck_action {
39 HANGCHECK_IDLE = 0, 40 HANGCHECK_IDLE = 0,
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
index 3e6c0f3ed592..ef9957dbac94 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
@@ -510,9 +510,8 @@ static void update_cursor(struct drm_crtc *crtc)
510 MDP4_DMA_CURSOR_BLEND_CONFIG_CURSOR_EN); 510 MDP4_DMA_CURSOR_BLEND_CONFIG_CURSOR_EN);
511 } else { 511 } else {
512 /* disable cursor: */ 512 /* disable cursor: */
513 mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma), 0); 513 mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma),
514 mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BLEND_CONFIG(dma), 514 mdp4_kms->blank_cursor_iova);
515 MDP4_DMA_CURSOR_BLEND_CONFIG_FORMAT(CURSOR_ARGB));
516 } 515 }
517 516
518 /* and drop the iova ref + obj rev when done scanning out: */ 517 /* and drop the iova ref + obj rev when done scanning out: */
@@ -574,11 +573,9 @@ static int mdp4_crtc_cursor_set(struct drm_crtc *crtc,
574 573
575 if (old_bo) { 574 if (old_bo) {
576 /* drop our previous reference: */ 575 /* drop our previous reference: */
577 msm_gem_put_iova(old_bo, mdp4_kms->id); 576 drm_flip_work_queue(&mdp4_crtc->unref_cursor_work, old_bo);
578 drm_gem_object_unreference_unlocked(old_bo);
579 } 577 }
580 578
581 crtc_flush(crtc);
582 request_pending(crtc, PENDING_CURSOR); 579 request_pending(crtc, PENDING_CURSOR);
583 580
584 return 0; 581 return 0;
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
index c740ccd1cc67..8edd531cb621 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
@@ -70,12 +70,12 @@ irqreturn_t mdp4_irq(struct msm_kms *kms)
70 70
71 VERB("status=%08x", status); 71 VERB("status=%08x", status);
72 72
73 mdp_dispatch_irqs(mdp_kms, status);
74
73 for (id = 0; id < priv->num_crtcs; id++) 75 for (id = 0; id < priv->num_crtcs; id++)
74 if (status & mdp4_crtc_vblank(priv->crtcs[id])) 76 if (status & mdp4_crtc_vblank(priv->crtcs[id]))
75 drm_handle_vblank(dev, id); 77 drm_handle_vblank(dev, id);
76 78
77 mdp_dispatch_irqs(mdp_kms, status);
78
79 return IRQ_HANDLED; 79 return IRQ_HANDLED;
80} 80}
81 81
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
index 272e707c9487..0bb4faa17523 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
@@ -144,6 +144,10 @@ static void mdp4_preclose(struct msm_kms *kms, struct drm_file *file)
144static void mdp4_destroy(struct msm_kms *kms) 144static void mdp4_destroy(struct msm_kms *kms)
145{ 145{
146 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); 146 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
147 if (mdp4_kms->blank_cursor_iova)
148 msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);
149 if (mdp4_kms->blank_cursor_bo)
150 drm_gem_object_unreference(mdp4_kms->blank_cursor_bo);
147 kfree(mdp4_kms); 151 kfree(mdp4_kms);
148} 152}
149 153
@@ -372,6 +376,23 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
372 goto fail; 376 goto fail;
373 } 377 }
374 378
379 mutex_lock(&dev->struct_mutex);
380 mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC);
381 mutex_unlock(&dev->struct_mutex);
382 if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
383 ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
384 dev_err(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
385 mdp4_kms->blank_cursor_bo = NULL;
386 goto fail;
387 }
388
389 ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id,
390 &mdp4_kms->blank_cursor_iova);
391 if (ret) {
392 dev_err(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
393 goto fail;
394 }
395
375 return kms; 396 return kms;
376 397
377fail: 398fail:
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h
index 66a4d31aec80..715520c54cde 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h
@@ -44,6 +44,10 @@ struct mdp4_kms {
44 struct clk *lut_clk; 44 struct clk *lut_clk;
45 45
46 struct mdp_irq error_handler; 46 struct mdp_irq error_handler;
47
48 /* empty/blank cursor bo to use when cursor is "disabled" */
49 struct drm_gem_object *blank_cursor_bo;
50 uint32_t blank_cursor_iova;
47}; 51};
48#define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base) 52#define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base)
49 53
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
index 353d494a497f..f2b985bc2adf 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
@@ -71,11 +71,11 @@ static void mdp5_irq_mdp(struct mdp_kms *mdp_kms)
71 71
72 VERB("status=%08x", status); 72 VERB("status=%08x", status);
73 73
74 mdp_dispatch_irqs(mdp_kms, status);
75
74 for (id = 0; id < priv->num_crtcs; id++) 76 for (id = 0; id < priv->num_crtcs; id++)
75 if (status & mdp5_crtc_vblank(priv->crtcs[id])) 77 if (status & mdp5_crtc_vblank(priv->crtcs[id]))
76 drm_handle_vblank(dev, id); 78 drm_handle_vblank(dev, id);
77
78 mdp_dispatch_irqs(mdp_kms, status);
79} 79}
80 80
81irqreturn_t mdp5_irq(struct msm_kms *kms) 81irqreturn_t mdp5_irq(struct msm_kms *kms)
diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c
index 6c6d7d4c9b4e..a752ab83b810 100644
--- a/drivers/gpu/drm/msm/msm_fbdev.c
+++ b/drivers/gpu/drm/msm/msm_fbdev.c
@@ -62,11 +62,8 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
62 dma_addr_t paddr; 62 dma_addr_t paddr;
63 int ret, size; 63 int ret, size;
64 64
65 /* only doing ARGB32 since this is what is needed to alpha-blend
66 * with video overlays:
67 */
68 sizes->surface_bpp = 32; 65 sizes->surface_bpp = 32;
69 sizes->surface_depth = 32; 66 sizes->surface_depth = 24;
70 67
71 DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width, 68 DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width,
72 sizes->surface_height, sizes->surface_bpp, 69 sizes->surface_height, sizes->surface_bpp,
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 3da8264d3039..bb8026daebc9 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -118,8 +118,10 @@ static void put_pages(struct drm_gem_object *obj)
118 118
119 if (iommu_present(&platform_bus_type)) 119 if (iommu_present(&platform_bus_type))
120 drm_gem_put_pages(obj, msm_obj->pages, true, false); 120 drm_gem_put_pages(obj, msm_obj->pages, true, false);
121 else 121 else {
122 drm_mm_remove_node(msm_obj->vram_node); 122 drm_mm_remove_node(msm_obj->vram_node);
123 drm_free_large(msm_obj->pages);
124 }
123 125
124 msm_obj->pages = NULL; 126 msm_obj->pages = NULL;
125 } 127 }
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxgm107.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxgm107.c
index 1dc37b1ddbfa..b0d0fb2f4d08 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxgm107.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxgm107.c
@@ -863,7 +863,7 @@ gm107_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
863{ 863{
864 mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); 864 mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
865 mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); 865 mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
866 mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW); 866 mmio_data(0x200000, 0x1000, NV_MEM_ACCESS_RW);
867 867
868 mmio_list(0x40800c, 0x00000000, 8, 1); 868 mmio_list(0x40800c, 0x00000000, 8, 1);
869 mmio_list(0x408010, 0x80000000, 0, 0); 869 mmio_list(0x408010, 0x80000000, 0, 0);
@@ -877,6 +877,8 @@ gm107_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
877 mmio_list(0x418e24, 0x00000000, 8, 0); 877 mmio_list(0x418e24, 0x00000000, 8, 0);
878 mmio_list(0x418e28, 0x80000030, 0, 0); 878 mmio_list(0x418e28, 0x80000030, 0, 0);
879 879
880 mmio_list(0x4064c8, 0x018002c0, 0, 0);
881
880 mmio_list(0x418810, 0x80000000, 12, 2); 882 mmio_list(0x418810, 0x80000000, 12, 2);
881 mmio_list(0x419848, 0x10000000, 12, 2); 883 mmio_list(0x419848, 0x10000000, 12, 2);
882 mmio_list(0x419c2c, 0x10000000, 12, 2); 884 mmio_list(0x419c2c, 0x10000000, 12, 2);
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/base.c b/drivers/gpu/drm/nouveau/core/subdev/bios/base.c
index e9df94f96d78..222e8ebb669d 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/bios/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bios/base.c
@@ -109,7 +109,7 @@ nouveau_bios_shadow_pramin(struct nouveau_bios *bios)
109 return; 109 return;
110 } 110 }
111 111
112 addr = (u64)(addr >> 8) << 8; 112 addr = (addr & 0xffffff00) << 8;
113 if (!addr) { 113 if (!addr) {
114 addr = (u64)nv_rd32(bios, 0x001700) << 16; 114 addr = (u64)nv_rd32(bios, 0x001700) << 16;
115 addr += 0xf0000; 115 addr += 0xf0000;
@@ -168,7 +168,8 @@ nouveau_bios_shadow_prom(struct nouveau_bios *bios)
168 */ 168 */
169 i = 16; 169 i = 16;
170 do { 170 do {
171 if ((nv_rd32(bios, 0x300000) & 0xffff) == 0xaa55) 171 u32 data = le32_to_cpu(nv_rd32(bios, 0x300000)) & 0xffff;
172 if (data == 0xaa55)
172 break; 173 break;
173 } while (i--); 174 } while (i--);
174 175
@@ -176,14 +177,15 @@ nouveau_bios_shadow_prom(struct nouveau_bios *bios)
176 goto out; 177 goto out;
177 178
178 /* read entire bios image to system memory */ 179 /* read entire bios image to system memory */
179 bios->size = ((nv_rd32(bios, 0x300000) >> 16) & 0xff) * 512; 180 bios->size = (le32_to_cpu(nv_rd32(bios, 0x300000)) >> 16) & 0xff;
181 bios->size = bios->size * 512;
180 if (!bios->size) 182 if (!bios->size)
181 goto out; 183 goto out;
182 184
183 bios->data = kmalloc(bios->size, GFP_KERNEL); 185 bios->data = kmalloc(bios->size, GFP_KERNEL);
184 if (bios->data) { 186 if (bios->data) {
185 for (i = 0; i < bios->size; i+=4) 187 for (i = 0; i < bios->size; i += 4)
186 nv_wo32(bios, i, nv_rd32(bios, 0x300000 + i)); 188 ((u32 *)bios->data)[i/4] = nv_rd32(bios, 0x300000 + i);
187 } 189 }
188 190
189 /* check the PCI record header */ 191 /* check the PCI record header */
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index 83face3f608f..279206997e5c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -389,9 +389,6 @@ bool nouveau_acpi_rom_supported(struct pci_dev *pdev)
389 acpi_status status; 389 acpi_status status;
390 acpi_handle dhandle, rom_handle; 390 acpi_handle dhandle, rom_handle;
391 391
392 if (!nouveau_dsm_priv.dsm_detected && !nouveau_dsm_priv.optimus_detected)
393 return false;
394
395 dhandle = ACPI_HANDLE(&pdev->dev); 392 dhandle = ACPI_HANDLE(&pdev->dev);
396 if (!dhandle) 393 if (!dhandle)
397 return false; 394 return false;
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 3ff030dc1ee3..da764a4ed958 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -764,9 +764,9 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
764 } 764 }
765 765
766 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); 766 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
767 mutex_unlock(&chan->cli->mutex);
768 if (ret) 767 if (ret)
769 goto fail_unreserve; 768 goto fail_unreserve;
769 mutex_unlock(&chan->cli->mutex);
770 770
771 /* Update the crtc struct and cleanup */ 771 /* Update the crtc struct and cleanup */
772 crtc->primary->fb = fb; 772 crtc->primary->fb = fb;
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 355157e4f78d..e3c47a8005ff 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -33,6 +33,7 @@ struct omap_crtc {
33 int pipe; 33 int pipe;
34 enum omap_channel channel; 34 enum omap_channel channel;
35 struct omap_overlay_manager_info info; 35 struct omap_overlay_manager_info info;
36 struct drm_encoder *current_encoder;
36 37
37 /* 38 /*
38 * Temporary: eventually this will go away, but it is needed 39 * Temporary: eventually this will go away, but it is needed
@@ -120,13 +121,25 @@ static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
120{ 121{
121} 122}
122 123
124static void set_enabled(struct drm_crtc *crtc, bool enable);
125
123static int omap_crtc_enable(struct omap_overlay_manager *mgr) 126static int omap_crtc_enable(struct omap_overlay_manager *mgr)
124{ 127{
128 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
129
130 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
131 dispc_mgr_set_timings(omap_crtc->channel,
132 &omap_crtc->timings);
133 set_enabled(&omap_crtc->base, true);
134
125 return 0; 135 return 0;
126} 136}
127 137
128static void omap_crtc_disable(struct omap_overlay_manager *mgr) 138static void omap_crtc_disable(struct omap_overlay_manager *mgr)
129{ 139{
140 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
141
142 set_enabled(&omap_crtc->base, false);
130} 143}
131 144
132static void omap_crtc_set_timings(struct omap_overlay_manager *mgr, 145static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
@@ -184,7 +197,6 @@ static void omap_crtc_destroy(struct drm_crtc *crtc)
184 WARN_ON(omap_crtc->apply_irq.registered); 197 WARN_ON(omap_crtc->apply_irq.registered);
185 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq); 198 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
186 199
187 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
188 drm_crtc_cleanup(crtc); 200 drm_crtc_cleanup(crtc);
189 201
190 kfree(omap_crtc); 202 kfree(omap_crtc);
@@ -338,17 +350,23 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
338 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 350 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
339 struct drm_plane *primary = crtc->primary; 351 struct drm_plane *primary = crtc->primary;
340 struct drm_gem_object *bo; 352 struct drm_gem_object *bo;
353 unsigned long flags;
341 354
342 DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1, 355 DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
343 fb->base.id, event); 356 fb->base.id, event);
344 357
358 spin_lock_irqsave(&dev->event_lock, flags);
359
345 if (omap_crtc->old_fb) { 360 if (omap_crtc->old_fb) {
361 spin_unlock_irqrestore(&dev->event_lock, flags);
346 dev_err(dev->dev, "already a pending flip\n"); 362 dev_err(dev->dev, "already a pending flip\n");
347 return -EINVAL; 363 return -EINVAL;
348 } 364 }
349 365
350 omap_crtc->event = event; 366 omap_crtc->event = event;
351 primary->fb = fb; 367 omap_crtc->old_fb = primary->fb = fb;
368
369 spin_unlock_irqrestore(&dev->event_lock, flags);
352 370
353 /* 371 /*
354 * Hold a reference temporarily until the crtc is updated 372 * Hold a reference temporarily until the crtc is updated
@@ -528,38 +546,46 @@ static void set_enabled(struct drm_crtc *crtc, bool enable)
528 struct drm_device *dev = crtc->dev; 546 struct drm_device *dev = crtc->dev;
529 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 547 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
530 enum omap_channel channel = omap_crtc->channel; 548 enum omap_channel channel = omap_crtc->channel;
531 struct omap_irq_wait *wait = NULL; 549 struct omap_irq_wait *wait;
550 u32 framedone_irq, vsync_irq;
551 int ret;
532 552
533 if (dispc_mgr_is_enabled(channel) == enable) 553 if (dispc_mgr_is_enabled(channel) == enable)
534 return; 554 return;
535 555
536 /* ignore sync-lost irqs during enable/disable */ 556 /*
557 * Digit output produces some sync lost interrupts during the first
558 * frame when enabling, so we need to ignore those.
559 */
537 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq); 560 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
538 561
539 if (dispc_mgr_get_framedone_irq(channel)) { 562 framedone_irq = dispc_mgr_get_framedone_irq(channel);
540 if (!enable) { 563 vsync_irq = dispc_mgr_get_vsync_irq(channel);
541 wait = omap_irq_wait_init(dev, 564
542 dispc_mgr_get_framedone_irq(channel), 1); 565 if (enable) {
543 } 566 wait = omap_irq_wait_init(dev, vsync_irq, 1);
544 } else { 567 } else {
545 /* 568 /*
546 * When we disable digit output, we need to wait until fields 569 * When we disable the digit output, we need to wait for
547 * are done. Otherwise the DSS is still working, and turning 570 * FRAMEDONE to know that DISPC has finished with the output.
548 * off the clocks prevents DSS from going to OFF mode. And when 571 *
549 * enabling, we need to wait for the extra sync losts 572 * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
573 * that case we need to use vsync interrupt, and wait for both
574 * even and odd frames.
550 */ 575 */
551 wait = omap_irq_wait_init(dev, 576
552 dispc_mgr_get_vsync_irq(channel), 2); 577 if (framedone_irq)
578 wait = omap_irq_wait_init(dev, framedone_irq, 1);
579 else
580 wait = omap_irq_wait_init(dev, vsync_irq, 2);
553 } 581 }
554 582
555 dispc_mgr_enable(channel, enable); 583 dispc_mgr_enable(channel, enable);
556 584
557 if (wait) { 585 ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
558 int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); 586 if (ret) {
559 if (ret) { 587 dev_err(dev->dev, "%s: timeout waiting for %s\n",
560 dev_err(dev->dev, "%s: timeout waiting for %s\n", 588 omap_crtc->name, enable ? "enable" : "disable");
561 omap_crtc->name, enable ? "enable" : "disable");
562 }
563 } 589 }
564 590
565 omap_irq_register(crtc->dev, &omap_crtc->error_irq); 591 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
@@ -586,8 +612,12 @@ static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
586 } 612 }
587 } 613 }
588 614
615 if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
616 omap_encoder_set_enabled(omap_crtc->current_encoder, false);
617
618 omap_crtc->current_encoder = encoder;
619
589 if (!omap_crtc->enabled) { 620 if (!omap_crtc->enabled) {
590 set_enabled(&omap_crtc->base, false);
591 if (encoder) 621 if (encoder)
592 omap_encoder_set_enabled(encoder, false); 622 omap_encoder_set_enabled(encoder, false);
593 } else { 623 } else {
@@ -596,13 +626,7 @@ static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
596 omap_encoder_update(encoder, omap_crtc->mgr, 626 omap_encoder_update(encoder, omap_crtc->mgr,
597 &omap_crtc->timings); 627 &omap_crtc->timings);
598 omap_encoder_set_enabled(encoder, true); 628 omap_encoder_set_enabled(encoder, true);
599 omap_crtc->full_update = false;
600 } 629 }
601
602 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
603 dispc_mgr_set_timings(omap_crtc->channel,
604 &omap_crtc->timings);
605 set_enabled(&omap_crtc->base, true);
606 } 630 }
607 631
608 omap_crtc->full_update = false; 632 omap_crtc->full_update = false;
@@ -613,10 +637,30 @@ static void omap_crtc_post_apply(struct omap_drm_apply *apply)
613 /* nothing needed for post-apply */ 637 /* nothing needed for post-apply */
614} 638}
615 639
640void omap_crtc_flush(struct drm_crtc *crtc)
641{
642 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
643 int loops = 0;
644
645 while (!list_empty(&omap_crtc->pending_applies) ||
646 !list_empty(&omap_crtc->queued_applies) ||
647 omap_crtc->event || omap_crtc->old_fb) {
648
649 if (++loops > 10) {
650 dev_err(crtc->dev->dev,
651 "omap_crtc_flush() timeout\n");
652 break;
653 }
654
655 schedule_timeout_uninterruptible(msecs_to_jiffies(20));
656 }
657}
658
616static const char *channel_names[] = { 659static const char *channel_names[] = {
617 [OMAP_DSS_CHANNEL_LCD] = "lcd", 660 [OMAP_DSS_CHANNEL_LCD] = "lcd",
618 [OMAP_DSS_CHANNEL_DIGIT] = "tv", 661 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
619 [OMAP_DSS_CHANNEL_LCD2] = "lcd2", 662 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
663 [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
620}; 664};
621 665
622void omap_crtc_pre_init(void) 666void omap_crtc_pre_init(void)
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index bf39fcc49e0f..c8270e4b26f3 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -513,12 +513,18 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
513static int dev_unload(struct drm_device *dev) 513static int dev_unload(struct drm_device *dev)
514{ 514{
515 struct omap_drm_private *priv = dev->dev_private; 515 struct omap_drm_private *priv = dev->dev_private;
516 int i;
516 517
517 DBG("unload: dev=%p", dev); 518 DBG("unload: dev=%p", dev);
518 519
519 drm_kms_helper_poll_fini(dev); 520 drm_kms_helper_poll_fini(dev);
520 521
521 omap_fbdev_free(dev); 522 omap_fbdev_free(dev);
523
524 /* flush crtcs so the fbs get released */
525 for (i = 0; i < priv->num_crtcs; i++)
526 omap_crtc_flush(priv->crtcs[i]);
527
522 omap_modeset_free(dev); 528 omap_modeset_free(dev);
523 omap_gem_deinit(dev); 529 omap_gem_deinit(dev);
524 530
@@ -696,10 +702,11 @@ static int pdev_remove(struct platform_device *device)
696{ 702{
697 DBG(""); 703 DBG("");
698 704
705 drm_put_dev(platform_get_drvdata(device));
706
699 omap_disconnect_dssdevs(); 707 omap_disconnect_dssdevs();
700 omap_crtc_pre_uninit(); 708 omap_crtc_pre_uninit();
701 709
702 drm_put_dev(platform_get_drvdata(device));
703 return 0; 710 return 0;
704} 711}
705 712
@@ -726,18 +733,33 @@ static struct platform_driver pdev = {
726 733
727static int __init omap_drm_init(void) 734static int __init omap_drm_init(void)
728{ 735{
736 int r;
737
729 DBG("init"); 738 DBG("init");
730 if (platform_driver_register(&omap_dmm_driver)) { 739
731 /* we can continue on without DMM.. so not fatal */ 740 r = platform_driver_register(&omap_dmm_driver);
732 dev_err(NULL, "DMM registration failed\n"); 741 if (r) {
742 pr_err("DMM driver registration failed\n");
743 return r;
744 }
745
746 r = platform_driver_register(&pdev);
747 if (r) {
748 pr_err("omapdrm driver registration failed\n");
749 platform_driver_unregister(&omap_dmm_driver);
750 return r;
733 } 751 }
734 return platform_driver_register(&pdev); 752
753 return 0;
735} 754}
736 755
737static void __exit omap_drm_fini(void) 756static void __exit omap_drm_fini(void)
738{ 757{
739 DBG("fini"); 758 DBG("fini");
759
740 platform_driver_unregister(&pdev); 760 platform_driver_unregister(&pdev);
761
762 platform_driver_unregister(&omap_dmm_driver);
741} 763}
742 764
743/* need late_initcall() so we load after dss_driver's are loaded */ 765/* need late_initcall() so we load after dss_driver's are loaded */
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
index 428b2981fd68..284b80fc3c54 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -163,6 +163,7 @@ void omap_crtc_pre_init(void);
163void omap_crtc_pre_uninit(void); 163void omap_crtc_pre_uninit(void);
164struct drm_crtc *omap_crtc_init(struct drm_device *dev, 164struct drm_crtc *omap_crtc_init(struct drm_device *dev,
165 struct drm_plane *plane, enum omap_channel channel, int id); 165 struct drm_plane *plane, enum omap_channel channel, int id);
166void omap_crtc_flush(struct drm_crtc *crtc);
166 167
167struct drm_plane *omap_plane_init(struct drm_device *dev, 168struct drm_plane *omap_plane_init(struct drm_device *dev,
168 int plane_id, bool private_plane); 169 int plane_id, bool private_plane);
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c
index d2b8c49bfb4a..8b019602ffe6 100644
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -218,6 +218,20 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
218 info->rotation_type = OMAP_DSS_ROT_TILER; 218 info->rotation_type = OMAP_DSS_ROT_TILER;
219 info->screen_width = omap_gem_tiled_stride(plane->bo, orient); 219 info->screen_width = omap_gem_tiled_stride(plane->bo, orient);
220 } else { 220 } else {
221 switch (win->rotation & 0xf) {
222 case 0:
223 case BIT(DRM_ROTATE_0):
224 /* OK */
225 break;
226
227 default:
228 dev_warn(fb->dev->dev,
229 "rotation '%d' ignored for non-tiled fb\n",
230 win->rotation);
231 win->rotation = 0;
232 break;
233 }
234
221 info->paddr = get_linear_addr(plane, format, 0, x, y); 235 info->paddr = get_linear_addr(plane, format, 0, x, y);
222 info->rotation_type = OMAP_DSS_ROT_DMA; 236 info->rotation_type = OMAP_DSS_ROT_DMA;
223 info->screen_width = plane->pitch; 237 info->screen_width = plane->pitch;
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c b/drivers/gpu/drm/omapdrm/omap_fbdev.c
index 002988d09021..1388ca7f87e8 100644
--- a/drivers/gpu/drm/omapdrm/omap_fbdev.c
+++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c
@@ -371,6 +371,9 @@ void omap_fbdev_free(struct drm_device *dev)
371 371
372 fbdev = to_omap_fbdev(priv->fbdev); 372 fbdev = to_omap_fbdev(priv->fbdev);
373 373
374 /* release the ref taken in omap_fbdev_create() */
375 omap_gem_put_paddr(fbdev->bo);
376
374 /* this will free the backing object */ 377 /* this will free the backing object */
375 if (fbdev->fb) { 378 if (fbdev->fb) {
376 drm_framebuffer_unregister_private(fbdev->fb); 379 drm_framebuffer_unregister_private(fbdev->fb);
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c
index c8d972763889..95dbce286a41 100644
--- a/drivers/gpu/drm/omapdrm/omap_gem.c
+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
@@ -980,12 +980,9 @@ int omap_gem_resume(struct device *dev)
980#ifdef CONFIG_DEBUG_FS 980#ifdef CONFIG_DEBUG_FS
981void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m) 981void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
982{ 982{
983 struct drm_device *dev = obj->dev;
984 struct omap_gem_object *omap_obj = to_omap_bo(obj); 983 struct omap_gem_object *omap_obj = to_omap_bo(obj);
985 uint64_t off; 984 uint64_t off;
986 985
987 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
988
989 off = drm_vma_node_start(&obj->vma_node); 986 off = drm_vma_node_start(&obj->vma_node);
990 987
991 seq_printf(m, "%08x: %2d (%2d) %08llx %08Zx (%2d) %p %4d", 988 seq_printf(m, "%08x: %2d (%2d) %08llx %08Zx (%2d) %p %4d",
@@ -1050,10 +1047,10 @@ static inline bool is_waiting(struct omap_gem_sync_waiter *waiter)
1050{ 1047{
1051 struct omap_gem_object *omap_obj = waiter->omap_obj; 1048 struct omap_gem_object *omap_obj = waiter->omap_obj;
1052 if ((waiter->op & OMAP_GEM_READ) && 1049 if ((waiter->op & OMAP_GEM_READ) &&
1053 (omap_obj->sync->read_complete < waiter->read_target)) 1050 (omap_obj->sync->write_complete < waiter->write_target))
1054 return true; 1051 return true;
1055 if ((waiter->op & OMAP_GEM_WRITE) && 1052 if ((waiter->op & OMAP_GEM_WRITE) &&
1056 (omap_obj->sync->write_complete < waiter->write_target)) 1053 (omap_obj->sync->read_complete < waiter->read_target))
1057 return true; 1054 return true;
1058 return false; 1055 return false;
1059} 1056}
@@ -1229,6 +1226,8 @@ int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
1229 } 1226 }
1230 1227
1231 spin_unlock(&sync_lock); 1228 spin_unlock(&sync_lock);
1229
1230 kfree(waiter);
1232 } 1231 }
1233 1232
1234 /* no waiting.. */ 1233 /* no waiting.. */
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c
index 046d5e660c04..3cf31ee59aac 100644
--- a/drivers/gpu/drm/omapdrm/omap_plane.c
+++ b/drivers/gpu/drm/omapdrm/omap_plane.c
@@ -225,6 +225,11 @@ int omap_plane_mode_set(struct drm_plane *plane,
225 omap_plane->apply_done_cb.arg = arg; 225 omap_plane->apply_done_cb.arg = arg;
226 } 226 }
227 227
228 if (plane->fb)
229 drm_framebuffer_unreference(plane->fb);
230
231 drm_framebuffer_reference(fb);
232
228 plane->fb = fb; 233 plane->fb = fb;
229 plane->crtc = crtc; 234 plane->crtc = crtc;
230 235
@@ -241,10 +246,13 @@ static int omap_plane_update(struct drm_plane *plane,
241 struct omap_plane *omap_plane = to_omap_plane(plane); 246 struct omap_plane *omap_plane = to_omap_plane(plane);
242 omap_plane->enabled = true; 247 omap_plane->enabled = true;
243 248
244 if (plane->fb) 249 /* omap_plane_mode_set() takes adjusted src */
245 drm_framebuffer_unreference(plane->fb); 250 switch (omap_plane->win.rotation & 0xf) {
246 251 case BIT(DRM_ROTATE_90):
247 drm_framebuffer_reference(fb); 252 case BIT(DRM_ROTATE_270):
253 swap(src_w, src_h);
254 break;
255 }
248 256
249 return omap_plane_mode_set(plane, crtc, fb, 257 return omap_plane_mode_set(plane, crtc, fb,
250 crtc_x, crtc_y, crtc_w, crtc_h, 258 crtc_x, crtc_y, crtc_w, crtc_h,
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index fb187c78978f..c31c12b4e666 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1177,27 +1177,43 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1177 1177
1178 /* Set NUM_BANKS. */ 1178 /* Set NUM_BANKS. */
1179 if (rdev->family >= CHIP_TAHITI) { 1179 if (rdev->family >= CHIP_TAHITI) {
1180 unsigned tileb, index, num_banks, tile_split_bytes; 1180 unsigned index, num_banks;
1181 1181
1182 /* Calculate the macrotile mode index. */ 1182 if (rdev->family >= CHIP_BONAIRE) {
1183 tile_split_bytes = 64 << tile_split; 1183 unsigned tileb, tile_split_bytes;
1184 tileb = 8 * 8 * target_fb->bits_per_pixel / 8;
1185 tileb = min(tile_split_bytes, tileb);
1186 1184
1187 for (index = 0; tileb > 64; index++) { 1185 /* Calculate the macrotile mode index. */
1188 tileb >>= 1; 1186 tile_split_bytes = 64 << tile_split;
1189 } 1187 tileb = 8 * 8 * target_fb->bits_per_pixel / 8;
1188 tileb = min(tile_split_bytes, tileb);
1190 1189
1191 if (index >= 16) { 1190 for (index = 0; tileb > 64; index++)
1192 DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", 1191 tileb >>= 1;
1193 target_fb->bits_per_pixel, tile_split); 1192
1194 return -EINVAL; 1193 if (index >= 16) {
1195 } 1194 DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n",
1195 target_fb->bits_per_pixel, tile_split);
1196 return -EINVAL;
1197 }
1196 1198
1197 if (rdev->family >= CHIP_BONAIRE)
1198 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; 1199 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3;
1199 else 1200 } else {
1201 switch (target_fb->bits_per_pixel) {
1202 case 8:
1203 index = 10;
1204 break;
1205 case 16:
1206 index = SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP;
1207 break;
1208 default:
1209 case 32:
1210 index = SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP;
1211 break;
1212 }
1213
1200 num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; 1214 num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3;
1215 }
1216
1201 fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); 1217 fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks);
1202 } else { 1218 } else {
1203 /* NI and older. */ 1219 /* NI and older. */
@@ -1720,8 +1736,9 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
1720 } 1736 }
1721 /* otherwise, pick one of the plls */ 1737 /* otherwise, pick one of the plls */
1722 if ((rdev->family == CHIP_KAVERI) || 1738 if ((rdev->family == CHIP_KAVERI) ||
1723 (rdev->family == CHIP_KABINI)) { 1739 (rdev->family == CHIP_KABINI) ||
1724 /* KB/KV has PPLL1 and PPLL2 */ 1740 (rdev->family == CHIP_MULLINS)) {
1741 /* KB/KV/ML has PPLL1 and PPLL2 */
1725 pll_in_use = radeon_get_pll_use_mask(crtc); 1742 pll_in_use = radeon_get_pll_use_mask(crtc);
1726 if (!(pll_in_use & (1 << ATOM_PPLL2))) 1743 if (!(pll_in_use & (1 << ATOM_PPLL2)))
1727 return ATOM_PPLL2; 1744 return ATOM_PPLL2;
@@ -1885,6 +1902,9 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
1885 (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) 1902 (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
1886 is_tvcv = true; 1903 is_tvcv = true;
1887 1904
1905 if (!radeon_crtc->adjusted_clock)
1906 return -EINVAL;
1907
1888 atombios_crtc_set_pll(crtc, adjusted_mode); 1908 atombios_crtc_set_pll(crtc, adjusted_mode);
1889 1909
1890 if (ASIC_IS_DCE4(rdev)) 1910 if (ASIC_IS_DCE4(rdev))
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 8b0ab170cef9..54e4f52549af 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -142,7 +142,8 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
142 return recv_bytes; 142 return recv_bytes;
143} 143}
144 144
145#define HEADER_SIZE 4 145#define BARE_ADDRESS_SIZE 3
146#define HEADER_SIZE (BARE_ADDRESS_SIZE + 1)
146 147
147static ssize_t 148static ssize_t
148radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) 149radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
@@ -160,13 +161,19 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
160 tx_buf[0] = msg->address & 0xff; 161 tx_buf[0] = msg->address & 0xff;
161 tx_buf[1] = msg->address >> 8; 162 tx_buf[1] = msg->address >> 8;
162 tx_buf[2] = msg->request << 4; 163 tx_buf[2] = msg->request << 4;
163 tx_buf[3] = msg->size - 1; 164 tx_buf[3] = msg->size ? (msg->size - 1) : 0;
164 165
165 switch (msg->request & ~DP_AUX_I2C_MOT) { 166 switch (msg->request & ~DP_AUX_I2C_MOT) {
166 case DP_AUX_NATIVE_WRITE: 167 case DP_AUX_NATIVE_WRITE:
167 case DP_AUX_I2C_WRITE: 168 case DP_AUX_I2C_WRITE:
169 /* tx_size needs to be 4 even for bare address packets since the atom
170 * table needs the info in tx_buf[3].
171 */
168 tx_size = HEADER_SIZE + msg->size; 172 tx_size = HEADER_SIZE + msg->size;
169 tx_buf[3] |= tx_size << 4; 173 if (msg->size == 0)
174 tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
175 else
176 tx_buf[3] |= tx_size << 4;
170 memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size); 177 memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size);
171 ret = radeon_process_aux_ch(chan, 178 ret = radeon_process_aux_ch(chan,
172 tx_buf, tx_size, NULL, 0, delay, &ack); 179 tx_buf, tx_size, NULL, 0, delay, &ack);
@@ -176,8 +183,14 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
176 break; 183 break;
177 case DP_AUX_NATIVE_READ: 184 case DP_AUX_NATIVE_READ:
178 case DP_AUX_I2C_READ: 185 case DP_AUX_I2C_READ:
186 /* tx_size needs to be 4 even for bare address packets since the atom
187 * table needs the info in tx_buf[3].
188 */
179 tx_size = HEADER_SIZE; 189 tx_size = HEADER_SIZE;
180 tx_buf[3] |= tx_size << 4; 190 if (msg->size == 0)
191 tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
192 else
193 tx_buf[3] |= tx_size << 4;
181 ret = radeon_process_aux_ch(chan, 194 ret = radeon_process_aux_ch(chan,
182 tx_buf, tx_size, msg->buffer, msg->size, delay, &ack); 195 tx_buf, tx_size, msg->buffer, msg->size, delay, &ack);
183 break; 196 break;
@@ -186,7 +199,7 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
186 break; 199 break;
187 } 200 }
188 201
189 if (ret > 0) 202 if (ret >= 0)
190 msg->reply = ack >> 4; 203 msg->reply = ack >> 4;
191 204
192 return ret; 205 return ret;
@@ -194,98 +207,16 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
194 207
195void radeon_dp_aux_init(struct radeon_connector *radeon_connector) 208void radeon_dp_aux_init(struct radeon_connector *radeon_connector)
196{ 209{
197 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
198
199 dig_connector->dp_i2c_bus->aux.dev = radeon_connector->base.kdev;
200 dig_connector->dp_i2c_bus->aux.transfer = radeon_dp_aux_transfer;
201}
202
203int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
204 u8 write_byte, u8 *read_byte)
205{
206 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
207 struct radeon_i2c_chan *auxch = i2c_get_adapdata(adapter);
208 u16 address = algo_data->address;
209 u8 msg[5];
210 u8 reply[2];
211 unsigned retry;
212 int msg_bytes;
213 int reply_bytes = 1;
214 int ret; 210 int ret;
215 u8 ack;
216 211
217 /* Set up the address */ 212 radeon_connector->ddc_bus->rec.hpd = radeon_connector->hpd.hpd;
218 msg[0] = address; 213 radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev;
219 msg[1] = address >> 8; 214 radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer;
215 ret = drm_dp_aux_register_i2c_bus(&radeon_connector->ddc_bus->aux);
216 if (!ret)
217 radeon_connector->ddc_bus->has_aux = true;
220 218
221 /* Set up the command byte */ 219 WARN(ret, "drm_dp_aux_register_i2c_bus() failed with error %d\n", ret);
222 if (mode & MODE_I2C_READ) {
223 msg[2] = DP_AUX_I2C_READ << 4;
224 msg_bytes = 4;
225 msg[3] = msg_bytes << 4;
226 } else {
227 msg[2] = DP_AUX_I2C_WRITE << 4;
228 msg_bytes = 5;
229 msg[3] = msg_bytes << 4;
230 msg[4] = write_byte;
231 }
232
233 /* special handling for start/stop */
234 if (mode & (MODE_I2C_START | MODE_I2C_STOP))
235 msg[3] = 3 << 4;
236
237 /* Set MOT bit for all but stop */
238 if ((mode & MODE_I2C_STOP) == 0)
239 msg[2] |= DP_AUX_I2C_MOT << 4;
240
241 for (retry = 0; retry < 7; retry++) {
242 ret = radeon_process_aux_ch(auxch,
243 msg, msg_bytes, reply, reply_bytes, 0, &ack);
244 if (ret == -EBUSY)
245 continue;
246 else if (ret < 0) {
247 DRM_DEBUG_KMS("aux_ch failed %d\n", ret);
248 return ret;
249 }
250
251 switch ((ack >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
252 case DP_AUX_NATIVE_REPLY_ACK:
253 /* I2C-over-AUX Reply field is only valid
254 * when paired with AUX ACK.
255 */
256 break;
257 case DP_AUX_NATIVE_REPLY_NACK:
258 DRM_DEBUG_KMS("aux_ch native nack\n");
259 return -EREMOTEIO;
260 case DP_AUX_NATIVE_REPLY_DEFER:
261 DRM_DEBUG_KMS("aux_ch native defer\n");
262 usleep_range(500, 600);
263 continue;
264 default:
265 DRM_ERROR("aux_ch invalid native reply 0x%02x\n", ack);
266 return -EREMOTEIO;
267 }
268
269 switch ((ack >> 4) & DP_AUX_I2C_REPLY_MASK) {
270 case DP_AUX_I2C_REPLY_ACK:
271 if (mode == MODE_I2C_READ)
272 *read_byte = reply[0];
273 return ret;
274 case DP_AUX_I2C_REPLY_NACK:
275 DRM_DEBUG_KMS("aux_i2c nack\n");
276 return -EREMOTEIO;
277 case DP_AUX_I2C_REPLY_DEFER:
278 DRM_DEBUG_KMS("aux_i2c defer\n");
279 usleep_range(400, 500);
280 break;
281 default:
282 DRM_ERROR("aux_i2c invalid reply 0x%02x\n", ack);
283 return -EREMOTEIO;
284 }
285 }
286
287 DRM_DEBUG_KMS("aux i2c too many retries, giving up\n");
288 return -EREMOTEIO;
289} 220}
290 221
291/***** general DP utility functions *****/ 222/***** general DP utility functions *****/
@@ -420,12 +351,11 @@ static u8 radeon_dp_encoder_service(struct radeon_device *rdev,
420 351
421u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector) 352u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)
422{ 353{
423 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
424 struct drm_device *dev = radeon_connector->base.dev; 354 struct drm_device *dev = radeon_connector->base.dev;
425 struct radeon_device *rdev = dev->dev_private; 355 struct radeon_device *rdev = dev->dev_private;
426 356
427 return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0, 357 return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0,
428 dig_connector->dp_i2c_bus->rec.i2c_id, 0); 358 radeon_connector->ddc_bus->rec.i2c_id, 0);
429} 359}
430 360
431static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector) 361static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
@@ -436,11 +366,11 @@ static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
436 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) 366 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
437 return; 367 return;
438 368
439 if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_SINK_OUI, buf, 3)) 369 if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
440 DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n", 370 DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
441 buf[0], buf[1], buf[2]); 371 buf[0], buf[1], buf[2]);
442 372
443 if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_BRANCH_OUI, buf, 3)) 373 if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
444 DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n", 374 DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
445 buf[0], buf[1], buf[2]); 375 buf[0], buf[1], buf[2]);
446} 376}
@@ -451,7 +381,7 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
451 u8 msg[DP_DPCD_SIZE]; 381 u8 msg[DP_DPCD_SIZE];
452 int ret, i; 382 int ret, i;
453 383
454 ret = drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_DPCD_REV, msg, 384 ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
455 DP_DPCD_SIZE); 385 DP_DPCD_SIZE);
456 if (ret > 0) { 386 if (ret > 0) {
457 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); 387 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
@@ -489,21 +419,23 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
489 419
490 if (dp_bridge != ENCODER_OBJECT_ID_NONE) { 420 if (dp_bridge != ENCODER_OBJECT_ID_NONE) {
491 /* DP bridge chips */ 421 /* DP bridge chips */
492 drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux, 422 if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
493 DP_EDP_CONFIGURATION_CAP, &tmp); 423 DP_EDP_CONFIGURATION_CAP, &tmp) == 1) {
494 if (tmp & 1) 424 if (tmp & 1)
495 panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; 425 panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
496 else if ((dp_bridge == ENCODER_OBJECT_ID_NUTMEG) || 426 else if ((dp_bridge == ENCODER_OBJECT_ID_NUTMEG) ||
497 (dp_bridge == ENCODER_OBJECT_ID_TRAVIS)) 427 (dp_bridge == ENCODER_OBJECT_ID_TRAVIS))
498 panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE; 428 panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
499 else 429 else
500 panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; 430 panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
431 }
501 } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { 432 } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
502 /* eDP */ 433 /* eDP */
503 drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux, 434 if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
504 DP_EDP_CONFIGURATION_CAP, &tmp); 435 DP_EDP_CONFIGURATION_CAP, &tmp) == 1) {
505 if (tmp & 1) 436 if (tmp & 1)
506 panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; 437 panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
438 }
507 } 439 }
508 440
509 return panel_mode; 441 return panel_mode;
@@ -554,7 +486,8 @@ bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
554 u8 link_status[DP_LINK_STATUS_SIZE]; 486 u8 link_status[DP_LINK_STATUS_SIZE];
555 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 487 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
556 488
557 if (drm_dp_dpcd_read_link_status(&dig->dp_i2c_bus->aux, link_status) <= 0) 489 if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status)
490 <= 0)
558 return false; 491 return false;
559 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) 492 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
560 return false; 493 return false;
@@ -574,7 +507,7 @@ void radeon_dp_set_rx_power_state(struct drm_connector *connector,
574 507
575 /* power up/down the sink */ 508 /* power up/down the sink */
576 if (dig_connector->dpcd[0] >= 0x11) { 509 if (dig_connector->dpcd[0] >= 0x11) {
577 drm_dp_dpcd_writeb(&dig_connector->dp_i2c_bus->aux, 510 drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux,
578 DP_SET_POWER, power_state); 511 DP_SET_POWER, power_state);
579 usleep_range(1000, 2000); 512 usleep_range(1000, 2000);
580 } 513 }
@@ -878,11 +811,15 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
878 else 811 else
879 dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A; 812 dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A;
880 813
881 drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux, DP_MAX_LANE_COUNT, &tmp); 814 if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp)
882 if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED)) 815 == 1) {
883 dp_info.tp3_supported = true; 816 if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED))
884 else 817 dp_info.tp3_supported = true;
818 else
819 dp_info.tp3_supported = false;
820 } else {
885 dp_info.tp3_supported = false; 821 dp_info.tp3_supported = false;
822 }
886 823
887 memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE); 824 memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);
888 dp_info.rdev = rdev; 825 dp_info.rdev = rdev;
@@ -890,7 +827,7 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
890 dp_info.connector = connector; 827 dp_info.connector = connector;
891 dp_info.dp_lane_count = dig_connector->dp_lane_count; 828 dp_info.dp_lane_count = dig_connector->dp_lane_count;
892 dp_info.dp_clock = dig_connector->dp_clock; 829 dp_info.dp_clock = dig_connector->dp_clock;
893 dp_info.aux = &dig_connector->dp_i2c_bus->aux; 830 dp_info.aux = &radeon_connector->ddc_bus->aux;
894 831
895 if (radeon_dp_link_train_init(&dp_info)) 832 if (radeon_dp_link_train_init(&dp_info))
896 goto done; 833 goto done;
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index cad89a977527..10dae4106c08 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -21,8 +21,10 @@
21 * 21 *
22 */ 22 */
23 23
24#include <linux/firmware.h>
24#include "drmP.h" 25#include "drmP.h"
25#include "radeon.h" 26#include "radeon.h"
27#include "radeon_ucode.h"
26#include "cikd.h" 28#include "cikd.h"
27#include "r600_dpm.h" 29#include "r600_dpm.h"
28#include "ci_dpm.h" 30#include "ci_dpm.h"
@@ -202,24 +204,29 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
202 struct ci_power_info *pi = ci_get_pi(rdev); 204 struct ci_power_info *pi = ci_get_pi(rdev);
203 205
204 switch (rdev->pdev->device) { 206 switch (rdev->pdev->device) {
207 case 0x6649:
205 case 0x6650: 208 case 0x6650:
209 case 0x6651:
206 case 0x6658: 210 case 0x6658:
207 case 0x665C: 211 case 0x665C:
212 case 0x665D:
208 default: 213 default:
209 pi->powertune_defaults = &defaults_bonaire_xt; 214 pi->powertune_defaults = &defaults_bonaire_xt;
210 break; 215 break;
211 case 0x6651:
212 case 0x665D:
213 pi->powertune_defaults = &defaults_bonaire_pro;
214 break;
215 case 0x6640: 216 case 0x6640:
216 pi->powertune_defaults = &defaults_saturn_xt;
217 break;
218 case 0x6641: 217 case 0x6641:
219 pi->powertune_defaults = &defaults_saturn_pro; 218 case 0x6646:
219 case 0x6647:
220 pi->powertune_defaults = &defaults_saturn_xt;
220 break; 221 break;
221 case 0x67B8: 222 case 0x67B8:
222 case 0x67B0: 223 case 0x67B0:
224 pi->powertune_defaults = &defaults_hawaii_xt;
225 break;
226 case 0x67BA:
227 case 0x67B1:
228 pi->powertune_defaults = &defaults_hawaii_pro;
229 break;
223 case 0x67A0: 230 case 0x67A0:
224 case 0x67A1: 231 case 0x67A1:
225 case 0x67A2: 232 case 0x67A2:
@@ -228,11 +235,7 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
228 case 0x67AA: 235 case 0x67AA:
229 case 0x67B9: 236 case 0x67B9:
230 case 0x67BE: 237 case 0x67BE:
231 pi->powertune_defaults = &defaults_hawaii_xt; 238 pi->powertune_defaults = &defaults_bonaire_xt;
232 break;
233 case 0x67BA:
234 case 0x67B1:
235 pi->powertune_defaults = &defaults_hawaii_pro;
236 break; 239 break;
237 } 240 }
238 241
@@ -5146,6 +5149,12 @@ int ci_dpm_init(struct radeon_device *rdev)
5146 pi->mclk_dpm_key_disabled = 0; 5149 pi->mclk_dpm_key_disabled = 0;
5147 pi->pcie_dpm_key_disabled = 0; 5150 pi->pcie_dpm_key_disabled = 0;
5148 5151
5152 /* mclk dpm is unstable on some R7 260X cards with the old mc ucode */
5153 if ((rdev->pdev->device == 0x6658) &&
5154 (rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) {
5155 pi->mclk_dpm_key_disabled = 1;
5156 }
5157
5149 pi->caps_sclk_ds = true; 5158 pi->caps_sclk_ds = true;
5150 5159
5151 pi->mclk_strobe_mode_threshold = 40000; 5160 pi->mclk_strobe_mode_threshold = 40000;
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 745143c2358f..d2fd98968085 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
38MODULE_FIRMWARE("radeon/BONAIRE_ce.bin"); 38MODULE_FIRMWARE("radeon/BONAIRE_ce.bin");
39MODULE_FIRMWARE("radeon/BONAIRE_mec.bin"); 39MODULE_FIRMWARE("radeon/BONAIRE_mec.bin");
40MODULE_FIRMWARE("radeon/BONAIRE_mc.bin"); 40MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
41MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin");
41MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin"); 42MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
42MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin"); 43MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
43MODULE_FIRMWARE("radeon/BONAIRE_smc.bin"); 44MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin");
46MODULE_FIRMWARE("radeon/HAWAII_ce.bin"); 47MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
47MODULE_FIRMWARE("radeon/HAWAII_mec.bin"); 48MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
48MODULE_FIRMWARE("radeon/HAWAII_mc.bin"); 49MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
50MODULE_FIRMWARE("radeon/HAWAII_mc2.bin");
49MODULE_FIRMWARE("radeon/HAWAII_rlc.bin"); 51MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
50MODULE_FIRMWARE("radeon/HAWAII_sdma.bin"); 52MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
51MODULE_FIRMWARE("radeon/HAWAII_smc.bin"); 53MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
@@ -61,6 +63,12 @@ MODULE_FIRMWARE("radeon/KABINI_ce.bin");
61MODULE_FIRMWARE("radeon/KABINI_mec.bin"); 63MODULE_FIRMWARE("radeon/KABINI_mec.bin");
62MODULE_FIRMWARE("radeon/KABINI_rlc.bin"); 64MODULE_FIRMWARE("radeon/KABINI_rlc.bin");
63MODULE_FIRMWARE("radeon/KABINI_sdma.bin"); 65MODULE_FIRMWARE("radeon/KABINI_sdma.bin");
66MODULE_FIRMWARE("radeon/MULLINS_pfp.bin");
67MODULE_FIRMWARE("radeon/MULLINS_me.bin");
68MODULE_FIRMWARE("radeon/MULLINS_ce.bin");
69MODULE_FIRMWARE("radeon/MULLINS_mec.bin");
70MODULE_FIRMWARE("radeon/MULLINS_rlc.bin");
71MODULE_FIRMWARE("radeon/MULLINS_sdma.bin");
64 72
65extern int r600_ih_ring_alloc(struct radeon_device *rdev); 73extern int r600_ih_ring_alloc(struct radeon_device *rdev);
66extern void r600_ih_ring_fini(struct radeon_device *rdev); 74extern void r600_ih_ring_fini(struct radeon_device *rdev);
@@ -1471,6 +1479,43 @@ static const u32 hawaii_mgcg_cgcg_init[] =
1471 0xd80c, 0xff000ff0, 0x00000100 1479 0xd80c, 0xff000ff0, 0x00000100
1472}; 1480};
1473 1481
1482static const u32 godavari_golden_registers[] =
1483{
1484 0x55e4, 0xff607fff, 0xfc000100,
1485 0x6ed8, 0x00010101, 0x00010000,
1486 0x9830, 0xffffffff, 0x00000000,
1487 0x98302, 0xf00fffff, 0x00000400,
1488 0x6130, 0xffffffff, 0x00010000,
1489 0x5bb0, 0x000000f0, 0x00000070,
1490 0x5bc0, 0xf0311fff, 0x80300000,
1491 0x98f8, 0x73773777, 0x12010001,
1492 0x98fc, 0xffffffff, 0x00000010,
1493 0x8030, 0x00001f0f, 0x0000100a,
1494 0x2f48, 0x73773777, 0x12010001,
1495 0x2408, 0x000fffff, 0x000c007f,
1496 0x8a14, 0xf000003f, 0x00000007,
1497 0x8b24, 0xffffffff, 0x00ff0fff,
1498 0x30a04, 0x0000ff0f, 0x00000000,
1499 0x28a4c, 0x07ffffff, 0x06000000,
1500 0x4d8, 0x00000fff, 0x00000100,
1501 0xd014, 0x00010000, 0x00810001,
1502 0xd814, 0x00010000, 0x00810001,
1503 0x3e78, 0x00000001, 0x00000002,
1504 0xc768, 0x00000008, 0x00000008,
1505 0xc770, 0x00000f00, 0x00000800,
1506 0xc774, 0x00000f00, 0x00000800,
1507 0xc798, 0x00ffffff, 0x00ff7fbf,
1508 0xc79c, 0x00ffffff, 0x00ff7faf,
1509 0x8c00, 0x000000ff, 0x00000001,
1510 0x214f8, 0x01ff01ff, 0x00000002,
1511 0x21498, 0x007ff800, 0x00200000,
1512 0x2015c, 0xffffffff, 0x00000f40,
1513 0x88c4, 0x001f3ae3, 0x00000082,
1514 0x88d4, 0x0000001f, 0x00000010,
1515 0x30934, 0xffffffff, 0x00000000
1516};
1517
1518
1474static void cik_init_golden_registers(struct radeon_device *rdev) 1519static void cik_init_golden_registers(struct radeon_device *rdev)
1475{ 1520{
1476 switch (rdev->family) { 1521 switch (rdev->family) {
@@ -1502,6 +1547,20 @@ static void cik_init_golden_registers(struct radeon_device *rdev)
1502 kalindi_golden_spm_registers, 1547 kalindi_golden_spm_registers,
1503 (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); 1548 (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));
1504 break; 1549 break;
1550 case CHIP_MULLINS:
1551 radeon_program_register_sequence(rdev,
1552 kalindi_mgcg_cgcg_init,
1553 (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init));
1554 radeon_program_register_sequence(rdev,
1555 godavari_golden_registers,
1556 (const u32)ARRAY_SIZE(godavari_golden_registers));
1557 radeon_program_register_sequence(rdev,
1558 kalindi_golden_common_registers,
1559 (const u32)ARRAY_SIZE(kalindi_golden_common_registers));
1560 radeon_program_register_sequence(rdev,
1561 kalindi_golden_spm_registers,
1562 (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));
1563 break;
1505 case CHIP_KAVERI: 1564 case CHIP_KAVERI:
1506 radeon_program_register_sequence(rdev, 1565 radeon_program_register_sequence(rdev,
1507 spectre_mgcg_cgcg_init, 1566 spectre_mgcg_cgcg_init,
@@ -1703,20 +1762,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
1703 const __be32 *fw_data; 1762 const __be32 *fw_data;
1704 u32 running, blackout = 0; 1763 u32 running, blackout = 0;
1705 u32 *io_mc_regs; 1764 u32 *io_mc_regs;
1706 int i, ucode_size, regs_size; 1765 int i, regs_size, ucode_size;
1707 1766
1708 if (!rdev->mc_fw) 1767 if (!rdev->mc_fw)
1709 return -EINVAL; 1768 return -EINVAL;
1710 1769
1770 ucode_size = rdev->mc_fw->size / 4;
1771
1711 switch (rdev->family) { 1772 switch (rdev->family) {
1712 case CHIP_BONAIRE: 1773 case CHIP_BONAIRE:
1713 io_mc_regs = (u32 *)&bonaire_io_mc_regs; 1774 io_mc_regs = (u32 *)&bonaire_io_mc_regs;
1714 ucode_size = CIK_MC_UCODE_SIZE;
1715 regs_size = BONAIRE_IO_MC_REGS_SIZE; 1775 regs_size = BONAIRE_IO_MC_REGS_SIZE;
1716 break; 1776 break;
1717 case CHIP_HAWAII: 1777 case CHIP_HAWAII:
1718 io_mc_regs = (u32 *)&hawaii_io_mc_regs; 1778 io_mc_regs = (u32 *)&hawaii_io_mc_regs;
1719 ucode_size = HAWAII_MC_UCODE_SIZE;
1720 regs_size = HAWAII_IO_MC_REGS_SIZE; 1779 regs_size = HAWAII_IO_MC_REGS_SIZE;
1721 break; 1780 break;
1722 default: 1781 default:
@@ -1783,7 +1842,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
1783 const char *chip_name; 1842 const char *chip_name;
1784 size_t pfp_req_size, me_req_size, ce_req_size, 1843 size_t pfp_req_size, me_req_size, ce_req_size,
1785 mec_req_size, rlc_req_size, mc_req_size = 0, 1844 mec_req_size, rlc_req_size, mc_req_size = 0,
1786 sdma_req_size, smc_req_size = 0; 1845 sdma_req_size, smc_req_size = 0, mc2_req_size = 0;
1787 char fw_name[30]; 1846 char fw_name[30];
1788 int err; 1847 int err;
1789 1848
@@ -1797,7 +1856,8 @@ static int cik_init_microcode(struct radeon_device *rdev)
1797 ce_req_size = CIK_CE_UCODE_SIZE * 4; 1856 ce_req_size = CIK_CE_UCODE_SIZE * 4;
1798 mec_req_size = CIK_MEC_UCODE_SIZE * 4; 1857 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1799 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; 1858 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
1800 mc_req_size = CIK_MC_UCODE_SIZE * 4; 1859 mc_req_size = BONAIRE_MC_UCODE_SIZE * 4;
1860 mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4;
1801 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; 1861 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1802 smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4); 1862 smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
1803 break; 1863 break;
@@ -1809,6 +1869,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
1809 mec_req_size = CIK_MEC_UCODE_SIZE * 4; 1869 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1810 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; 1870 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
1811 mc_req_size = HAWAII_MC_UCODE_SIZE * 4; 1871 mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
1872 mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4;
1812 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; 1873 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1813 smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4); 1874 smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
1814 break; 1875 break;
@@ -1830,6 +1891,15 @@ static int cik_init_microcode(struct radeon_device *rdev)
1830 rlc_req_size = KB_RLC_UCODE_SIZE * 4; 1891 rlc_req_size = KB_RLC_UCODE_SIZE * 4;
1831 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; 1892 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1832 break; 1893 break;
1894 case CHIP_MULLINS:
1895 chip_name = "MULLINS";
1896 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
1897 me_req_size = CIK_ME_UCODE_SIZE * 4;
1898 ce_req_size = CIK_CE_UCODE_SIZE * 4;
1899 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1900 rlc_req_size = ML_RLC_UCODE_SIZE * 4;
1901 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1902 break;
1833 default: BUG(); 1903 default: BUG();
1834 } 1904 }
1835 1905
@@ -1904,16 +1974,22 @@ static int cik_init_microcode(struct radeon_device *rdev)
1904 1974
1905 /* No SMC, MC ucode on APUs */ 1975 /* No SMC, MC ucode on APUs */
1906 if (!(rdev->flags & RADEON_IS_IGP)) { 1976 if (!(rdev->flags & RADEON_IS_IGP)) {
1907 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); 1977 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
1908 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); 1978 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
1909 if (err) 1979 if (err) {
1910 goto out; 1980 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
1911 if (rdev->mc_fw->size != mc_req_size) { 1981 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
1982 if (err)
1983 goto out;
1984 }
1985 if ((rdev->mc_fw->size != mc_req_size) &&
1986 (rdev->mc_fw->size != mc2_req_size)){
1912 printk(KERN_ERR 1987 printk(KERN_ERR
1913 "cik_mc: Bogus length %zu in firmware \"%s\"\n", 1988 "cik_mc: Bogus length %zu in firmware \"%s\"\n",
1914 rdev->mc_fw->size, fw_name); 1989 rdev->mc_fw->size, fw_name);
1915 err = -EINVAL; 1990 err = -EINVAL;
1916 } 1991 }
1992 DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
1917 1993
1918 snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); 1994 snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
1919 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); 1995 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
@@ -3262,6 +3338,7 @@ static void cik_gpu_init(struct radeon_device *rdev)
3262 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; 3338 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
3263 break; 3339 break;
3264 case CHIP_KABINI: 3340 case CHIP_KABINI:
3341 case CHIP_MULLINS:
3265 default: 3342 default:
3266 rdev->config.cik.max_shader_engines = 1; 3343 rdev->config.cik.max_shader_engines = 1;
3267 rdev->config.cik.max_tile_pipes = 2; 3344 rdev->config.cik.max_tile_pipes = 2;
@@ -3692,6 +3769,7 @@ int cik_copy_cpdma(struct radeon_device *rdev,
3692 r = radeon_fence_emit(rdev, fence, ring->idx); 3769 r = radeon_fence_emit(rdev, fence, ring->idx);
3693 if (r) { 3770 if (r) {
3694 radeon_ring_unlock_undo(rdev, ring); 3771 radeon_ring_unlock_undo(rdev, ring);
3772 radeon_semaphore_free(rdev, &sem, NULL);
3695 return r; 3773 return r;
3696 } 3774 }
3697 3775
@@ -5790,6 +5868,9 @@ static int cik_rlc_resume(struct radeon_device *rdev)
5790 case CHIP_KABINI: 5868 case CHIP_KABINI:
5791 size = KB_RLC_UCODE_SIZE; 5869 size = KB_RLC_UCODE_SIZE;
5792 break; 5870 break;
5871 case CHIP_MULLINS:
5872 size = ML_RLC_UCODE_SIZE;
5873 break;
5793 } 5874 }
5794 5875
5795 cik_rlc_stop(rdev); 5876 cik_rlc_stop(rdev);
@@ -6538,6 +6619,7 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
6538 buffer[count++] = cpu_to_le32(0x00000000); 6619 buffer[count++] = cpu_to_le32(0x00000000);
6539 break; 6620 break;
6540 case CHIP_KABINI: 6621 case CHIP_KABINI:
6622 case CHIP_MULLINS:
6541 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */ 6623 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
6542 buffer[count++] = cpu_to_le32(0x00000000); 6624 buffer[count++] = cpu_to_le32(0x00000000);
6543 break; 6625 break;
@@ -6683,6 +6765,19 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev)
6683 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); 6765 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
6684 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); 6766 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
6685 } 6767 }
6768 /* pflip */
6769 if (rdev->num_crtc >= 2) {
6770 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
6771 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
6772 }
6773 if (rdev->num_crtc >= 4) {
6774 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
6775 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
6776 }
6777 if (rdev->num_crtc >= 6) {
6778 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
6779 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
6780 }
6686 6781
6687 /* dac hotplug */ 6782 /* dac hotplug */
6688 WREG32(DAC_AUTODETECT_INT_CONTROL, 0); 6783 WREG32(DAC_AUTODETECT_INT_CONTROL, 0);
@@ -7039,6 +7134,25 @@ int cik_irq_set(struct radeon_device *rdev)
7039 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); 7134 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6);
7040 } 7135 }
7041 7136
7137 if (rdev->num_crtc >= 2) {
7138 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,
7139 GRPH_PFLIP_INT_MASK);
7140 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,
7141 GRPH_PFLIP_INT_MASK);
7142 }
7143 if (rdev->num_crtc >= 4) {
7144 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,
7145 GRPH_PFLIP_INT_MASK);
7146 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,
7147 GRPH_PFLIP_INT_MASK);
7148 }
7149 if (rdev->num_crtc >= 6) {
7150 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
7151 GRPH_PFLIP_INT_MASK);
7152 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,
7153 GRPH_PFLIP_INT_MASK);
7154 }
7155
7042 WREG32(DC_HPD1_INT_CONTROL, hpd1); 7156 WREG32(DC_HPD1_INT_CONTROL, hpd1);
7043 WREG32(DC_HPD2_INT_CONTROL, hpd2); 7157 WREG32(DC_HPD2_INT_CONTROL, hpd2);
7044 WREG32(DC_HPD3_INT_CONTROL, hpd3); 7158 WREG32(DC_HPD3_INT_CONTROL, hpd3);
@@ -7075,6 +7189,29 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
7075 rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5); 7189 rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5);
7076 rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6); 7190 rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6);
7077 7191
7192 rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS +
7193 EVERGREEN_CRTC0_REGISTER_OFFSET);
7194 rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS +
7195 EVERGREEN_CRTC1_REGISTER_OFFSET);
7196 if (rdev->num_crtc >= 4) {
7197 rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS +
7198 EVERGREEN_CRTC2_REGISTER_OFFSET);
7199 rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS +
7200 EVERGREEN_CRTC3_REGISTER_OFFSET);
7201 }
7202 if (rdev->num_crtc >= 6) {
7203 rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS +
7204 EVERGREEN_CRTC4_REGISTER_OFFSET);
7205 rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS +
7206 EVERGREEN_CRTC5_REGISTER_OFFSET);
7207 }
7208
7209 if (rdev->irq.stat_regs.cik.d1grph_int & GRPH_PFLIP_INT_OCCURRED)
7210 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET,
7211 GRPH_PFLIP_INT_CLEAR);
7212 if (rdev->irq.stat_regs.cik.d2grph_int & GRPH_PFLIP_INT_OCCURRED)
7213 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET,
7214 GRPH_PFLIP_INT_CLEAR);
7078 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) 7215 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)
7079 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); 7216 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK);
7080 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) 7217 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)
@@ -7085,6 +7222,12 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
7085 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); 7222 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK);
7086 7223
7087 if (rdev->num_crtc >= 4) { 7224 if (rdev->num_crtc >= 4) {
7225 if (rdev->irq.stat_regs.cik.d3grph_int & GRPH_PFLIP_INT_OCCURRED)
7226 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET,
7227 GRPH_PFLIP_INT_CLEAR);
7228 if (rdev->irq.stat_regs.cik.d4grph_int & GRPH_PFLIP_INT_OCCURRED)
7229 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET,
7230 GRPH_PFLIP_INT_CLEAR);
7088 if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT) 7231 if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT)
7089 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); 7232 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK);
7090 if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT) 7233 if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT)
@@ -7096,6 +7239,12 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
7096 } 7239 }
7097 7240
7098 if (rdev->num_crtc >= 6) { 7241 if (rdev->num_crtc >= 6) {
7242 if (rdev->irq.stat_regs.cik.d5grph_int & GRPH_PFLIP_INT_OCCURRED)
7243 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
7244 GRPH_PFLIP_INT_CLEAR);
7245 if (rdev->irq.stat_regs.cik.d6grph_int & GRPH_PFLIP_INT_OCCURRED)
7246 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET,
7247 GRPH_PFLIP_INT_CLEAR);
7099 if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT) 7248 if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)
7100 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); 7249 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);
7101 if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT) 7250 if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)
@@ -7447,6 +7596,15 @@ restart_ih:
7447 break; 7596 break;
7448 } 7597 }
7449 break; 7598 break;
7599 case 8: /* D1 page flip */
7600 case 10: /* D2 page flip */
7601 case 12: /* D3 page flip */
7602 case 14: /* D4 page flip */
7603 case 16: /* D5 page flip */
7604 case 18: /* D6 page flip */
7605 DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
7606 radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1);
7607 break;
7450 case 42: /* HPD hotplug */ 7608 case 42: /* HPD hotplug */
7451 switch (src_data) { 7609 switch (src_data) {
7452 case 0: 7610 case 0:
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c
index 89b4afa5041c..72e464c79a88 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -562,6 +562,7 @@ int cik_copy_dma(struct radeon_device *rdev,
562 r = radeon_fence_emit(rdev, fence, ring->idx); 562 r = radeon_fence_emit(rdev, fence, ring->idx);
563 if (r) { 563 if (r) {
564 radeon_ring_unlock_undo(rdev, ring); 564 radeon_ring_unlock_undo(rdev, ring);
565 radeon_semaphore_free(rdev, &sem, NULL);
565 return r; 566 return r;
566 } 567 }
567 568
@@ -597,7 +598,7 @@ int cik_sdma_ring_test(struct radeon_device *rdev,
597 tmp = 0xCAFEDEAD; 598 tmp = 0xCAFEDEAD;
598 writel(tmp, ptr); 599 writel(tmp, ptr);
599 600
600 r = radeon_ring_lock(rdev, ring, 4); 601 r = radeon_ring_lock(rdev, ring, 5);
601 if (r) { 602 if (r) {
602 DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r); 603 DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r);
603 return r; 604 return r;
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 213873270d5f..dd7926394a8f 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -888,6 +888,15 @@
888# define DC_HPD6_RX_INTERRUPT (1 << 18) 888# define DC_HPD6_RX_INTERRUPT (1 << 18)
889#define DISP_INTERRUPT_STATUS_CONTINUE6 0x6780 889#define DISP_INTERRUPT_STATUS_CONTINUE6 0x6780
890 890
891/* 0x6858, 0x7458, 0x10058, 0x10c58, 0x11858, 0x12458 */
892#define GRPH_INT_STATUS 0x6858
893# define GRPH_PFLIP_INT_OCCURRED (1 << 0)
894# define GRPH_PFLIP_INT_CLEAR (1 << 8)
895/* 0x685c, 0x745c, 0x1005c, 0x10c5c, 0x1185c, 0x1245c */
896#define GRPH_INT_CONTROL 0x685c
897# define GRPH_PFLIP_INT_MASK (1 << 0)
898# define GRPH_PFLIP_INT_TYPE (1 << 8)
899
891#define DAC_AUTODETECT_INT_CONTROL 0x67c8 900#define DAC_AUTODETECT_INT_CONTROL 0x67c8
892 901
893#define DC_HPD1_INT_STATUS 0x601c 902#define DC_HPD1_INT_STATUS 0x601c
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 94e858751994..0a65dc7e93e7 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -309,11 +309,17 @@ int dce6_audio_init(struct radeon_device *rdev)
309 309
310 rdev->audio.enabled = true; 310 rdev->audio.enabled = true;
311 311
312 if (ASIC_IS_DCE8(rdev)) 312 if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
313 rdev->audio.num_pins = 7;
314 else if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
315 rdev->audio.num_pins = 3;
316 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
317 rdev->audio.num_pins = 7;
318 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
313 rdev->audio.num_pins = 6; 319 rdev->audio.num_pins = 6;
314 else if (ASIC_IS_DCE61(rdev)) 320 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
315 rdev->audio.num_pins = 4; 321 rdev->audio.num_pins = 2;
316 else 322 else /* SI: 6 streams, 6 endpoints */
317 rdev->audio.num_pins = 6; 323 rdev->audio.num_pins = 6;
318 324
319 for (i = 0; i < rdev->audio.num_pins; i++) { 325 for (i = 0; i < rdev->audio.num_pins; i++) {
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index b406546440da..0f7a51a3694f 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4371,7 +4371,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
4371 u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; 4371 u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0;
4372 u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6; 4372 u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6;
4373 u32 grbm_int_cntl = 0; 4373 u32 grbm_int_cntl = 0;
4374 u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0;
4375 u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0; 4374 u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0;
4376 u32 dma_cntl, dma_cntl1 = 0; 4375 u32 dma_cntl, dma_cntl1 = 0;
4377 u32 thermal_int = 0; 4376 u32 thermal_int = 0;
@@ -4554,15 +4553,21 @@ int evergreen_irq_set(struct radeon_device *rdev)
4554 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); 4553 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6);
4555 } 4554 }
4556 4555
4557 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1); 4556 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,
4558 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2); 4557 GRPH_PFLIP_INT_MASK);
4558 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,
4559 GRPH_PFLIP_INT_MASK);
4559 if (rdev->num_crtc >= 4) { 4560 if (rdev->num_crtc >= 4) {
4560 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3); 4561 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,
4561 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4); 4562 GRPH_PFLIP_INT_MASK);
4563 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,
4564 GRPH_PFLIP_INT_MASK);
4562 } 4565 }
4563 if (rdev->num_crtc >= 6) { 4566 if (rdev->num_crtc >= 6) {
4564 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5); 4567 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
4565 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6); 4568 GRPH_PFLIP_INT_MASK);
4569 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,
4570 GRPH_PFLIP_INT_MASK);
4566 } 4571 }
4567 4572
4568 WREG32(DC_HPD1_INT_CONTROL, hpd1); 4573 WREG32(DC_HPD1_INT_CONTROL, hpd1);
@@ -4951,6 +4956,15 @@ restart_ih:
4951 break; 4956 break;
4952 } 4957 }
4953 break; 4958 break;
4959 case 8: /* D1 page flip */
4960 case 10: /* D2 page flip */
4961 case 12: /* D3 page flip */
4962 case 14: /* D4 page flip */
4963 case 16: /* D5 page flip */
4964 case 18: /* D6 page flip */
4965 DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
4966 radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1);
4967 break;
4954 case 42: /* HPD hotplug */ 4968 case 42: /* HPD hotplug */
4955 switch (src_data) { 4969 switch (src_data) {
4956 case 0: 4970 case 0:
diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c
index 287fe966d7de..478caefe0fef 100644
--- a/drivers/gpu/drm/radeon/evergreen_dma.c
+++ b/drivers/gpu/drm/radeon/evergreen_dma.c
@@ -151,6 +151,7 @@ int evergreen_copy_dma(struct radeon_device *rdev,
151 r = radeon_fence_emit(rdev, fence, ring->idx); 151 r = radeon_fence_emit(rdev, fence, ring->idx);
152 if (r) { 152 if (r) {
153 radeon_ring_unlock_undo(rdev, ring); 153 radeon_ring_unlock_undo(rdev, ring);
154 radeon_semaphore_free(rdev, &sem, NULL);
154 return r; 155 return r;
155 } 156 }
156 157
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
index 16ec9d56a234..3f6e817d97ee 100644
--- a/drivers/gpu/drm/radeon/kv_dpm.c
+++ b/drivers/gpu/drm/radeon/kv_dpm.c
@@ -546,6 +546,52 @@ static int kv_set_divider_value(struct radeon_device *rdev,
546 return 0; 546 return 0;
547} 547}
548 548
549static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev,
550 struct sumo_vid_mapping_table *vid_mapping_table,
551 u32 vid_2bit)
552{
553 struct radeon_clock_voltage_dependency_table *vddc_sclk_table =
554 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
555 u32 i;
556
557 if (vddc_sclk_table && vddc_sclk_table->count) {
558 if (vid_2bit < vddc_sclk_table->count)
559 return vddc_sclk_table->entries[vid_2bit].v;
560 else
561 return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v;
562 } else {
563 for (i = 0; i < vid_mapping_table->num_entries; i++) {
564 if (vid_mapping_table->entries[i].vid_2bit == vid_2bit)
565 return vid_mapping_table->entries[i].vid_7bit;
566 }
567 return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit;
568 }
569}
570
571static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev,
572 struct sumo_vid_mapping_table *vid_mapping_table,
573 u32 vid_7bit)
574{
575 struct radeon_clock_voltage_dependency_table *vddc_sclk_table =
576 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
577 u32 i;
578
579 if (vddc_sclk_table && vddc_sclk_table->count) {
580 for (i = 0; i < vddc_sclk_table->count; i++) {
581 if (vddc_sclk_table->entries[i].v == vid_7bit)
582 return i;
583 }
584 return vddc_sclk_table->count - 1;
585 } else {
586 for (i = 0; i < vid_mapping_table->num_entries; i++) {
587 if (vid_mapping_table->entries[i].vid_7bit == vid_7bit)
588 return vid_mapping_table->entries[i].vid_2bit;
589 }
590
591 return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit;
592 }
593}
594
549static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, 595static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev,
550 u16 voltage) 596 u16 voltage)
551{ 597{
@@ -556,9 +602,9 @@ static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev,
556 u32 vid_2bit) 602 u32 vid_2bit)
557{ 603{
558 struct kv_power_info *pi = kv_get_pi(rdev); 604 struct kv_power_info *pi = kv_get_pi(rdev);
559 u32 vid_8bit = sumo_convert_vid2_to_vid7(rdev, 605 u32 vid_8bit = kv_convert_vid2_to_vid7(rdev,
560 &pi->sys_info.vid_mapping_table, 606 &pi->sys_info.vid_mapping_table,
561 vid_2bit); 607 vid_2bit);
562 608
563 return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit); 609 return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit);
564} 610}
@@ -639,7 +685,7 @@ static int kv_force_lowest_valid(struct radeon_device *rdev)
639 685
640static int kv_unforce_levels(struct radeon_device *rdev) 686static int kv_unforce_levels(struct radeon_device *rdev)
641{ 687{
642 if (rdev->family == CHIP_KABINI) 688 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
643 return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); 689 return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel);
644 else 690 else
645 return kv_set_enabled_levels(rdev); 691 return kv_set_enabled_levels(rdev);
@@ -1362,13 +1408,20 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate)
1362 struct radeon_uvd_clock_voltage_dependency_table *table = 1408 struct radeon_uvd_clock_voltage_dependency_table *table =
1363 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; 1409 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
1364 int ret; 1410 int ret;
1411 u32 mask;
1365 1412
1366 if (!gate) { 1413 if (!gate) {
1367 if (!pi->caps_uvd_dpm || table->count || pi->caps_stable_p_state) 1414 if (table->count)
1368 pi->uvd_boot_level = table->count - 1; 1415 pi->uvd_boot_level = table->count - 1;
1369 else 1416 else
1370 pi->uvd_boot_level = 0; 1417 pi->uvd_boot_level = 0;
1371 1418
1419 if (!pi->caps_uvd_dpm || pi->caps_stable_p_state) {
1420 mask = 1 << pi->uvd_boot_level;
1421 } else {
1422 mask = 0x1f;
1423 }
1424
1372 ret = kv_copy_bytes_to_smc(rdev, 1425 ret = kv_copy_bytes_to_smc(rdev,
1373 pi->dpm_table_start + 1426 pi->dpm_table_start +
1374 offsetof(SMU7_Fusion_DpmTable, UvdBootLevel), 1427 offsetof(SMU7_Fusion_DpmTable, UvdBootLevel),
@@ -1377,11 +1430,9 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate)
1377 if (ret) 1430 if (ret)
1378 return ret; 1431 return ret;
1379 1432
1380 if (!pi->caps_uvd_dpm || 1433 kv_send_msg_to_smc_with_parameter(rdev,
1381 pi->caps_stable_p_state) 1434 PPSMC_MSG_UVDDPM_SetEnabledMask,
1382 kv_send_msg_to_smc_with_parameter(rdev, 1435 mask);
1383 PPSMC_MSG_UVDDPM_SetEnabledMask,
1384 (1 << pi->uvd_boot_level));
1385 } 1436 }
1386 1437
1387 return kv_enable_uvd_dpm(rdev, !gate); 1438 return kv_enable_uvd_dpm(rdev, !gate);
@@ -1617,7 +1668,7 @@ static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate)
1617 if (pi->acp_power_gated == gate) 1668 if (pi->acp_power_gated == gate)
1618 return; 1669 return;
1619 1670
1620 if (rdev->family == CHIP_KABINI) 1671 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
1621 return; 1672 return;
1622 1673
1623 pi->acp_power_gated = gate; 1674 pi->acp_power_gated = gate;
@@ -1786,7 +1837,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
1786 } 1837 }
1787 } 1838 }
1788 1839
1789 if (rdev->family == CHIP_KABINI) { 1840 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
1790 if (pi->enable_dpm) { 1841 if (pi->enable_dpm) {
1791 kv_set_valid_clock_range(rdev, new_ps); 1842 kv_set_valid_clock_range(rdev, new_ps);
1792 kv_update_dfs_bypass_settings(rdev, new_ps); 1843 kv_update_dfs_bypass_settings(rdev, new_ps);
@@ -1812,6 +1863,8 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
1812 return ret; 1863 return ret;
1813 } 1864 }
1814 kv_update_sclk_t(rdev); 1865 kv_update_sclk_t(rdev);
1866 if (rdev->family == CHIP_MULLINS)
1867 kv_enable_nb_dpm(rdev);
1815 } 1868 }
1816 } else { 1869 } else {
1817 if (pi->enable_dpm) { 1870 if (pi->enable_dpm) {
@@ -1862,7 +1915,7 @@ void kv_dpm_reset_asic(struct radeon_device *rdev)
1862{ 1915{
1863 struct kv_power_info *pi = kv_get_pi(rdev); 1916 struct kv_power_info *pi = kv_get_pi(rdev);
1864 1917
1865 if (rdev->family == CHIP_KABINI) { 1918 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
1866 kv_force_lowest_valid(rdev); 1919 kv_force_lowest_valid(rdev);
1867 kv_init_graphics_levels(rdev); 1920 kv_init_graphics_levels(rdev);
1868 kv_program_bootup_state(rdev); 1921 kv_program_bootup_state(rdev);
@@ -1901,14 +1954,41 @@ static void kv_construct_max_power_limits_table(struct radeon_device *rdev,
1901static void kv_patch_voltage_values(struct radeon_device *rdev) 1954static void kv_patch_voltage_values(struct radeon_device *rdev)
1902{ 1955{
1903 int i; 1956 int i;
1904 struct radeon_uvd_clock_voltage_dependency_table *table = 1957 struct radeon_uvd_clock_voltage_dependency_table *uvd_table =
1905 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; 1958 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
1959 struct radeon_vce_clock_voltage_dependency_table *vce_table =
1960 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
1961 struct radeon_clock_voltage_dependency_table *samu_table =
1962 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
1963 struct radeon_clock_voltage_dependency_table *acp_table =
1964 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
1906 1965
1907 if (table->count) { 1966 if (uvd_table->count) {
1908 for (i = 0; i < table->count; i++) 1967 for (i = 0; i < uvd_table->count; i++)
1909 table->entries[i].v = 1968 uvd_table->entries[i].v =
1910 kv_convert_8bit_index_to_voltage(rdev, 1969 kv_convert_8bit_index_to_voltage(rdev,
1911 table->entries[i].v); 1970 uvd_table->entries[i].v);
1971 }
1972
1973 if (vce_table->count) {
1974 for (i = 0; i < vce_table->count; i++)
1975 vce_table->entries[i].v =
1976 kv_convert_8bit_index_to_voltage(rdev,
1977 vce_table->entries[i].v);
1978 }
1979
1980 if (samu_table->count) {
1981 for (i = 0; i < samu_table->count; i++)
1982 samu_table->entries[i].v =
1983 kv_convert_8bit_index_to_voltage(rdev,
1984 samu_table->entries[i].v);
1985 }
1986
1987 if (acp_table->count) {
1988 for (i = 0; i < acp_table->count; i++)
1989 acp_table->entries[i].v =
1990 kv_convert_8bit_index_to_voltage(rdev,
1991 acp_table->entries[i].v);
1912 } 1992 }
1913 1993
1914} 1994}
@@ -1941,7 +2021,7 @@ static int kv_force_dpm_highest(struct radeon_device *rdev)
1941 break; 2021 break;
1942 } 2022 }
1943 2023
1944 if (rdev->family == CHIP_KABINI) 2024 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
1945 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); 2025 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);
1946 else 2026 else
1947 return kv_set_enabled_level(rdev, i); 2027 return kv_set_enabled_level(rdev, i);
@@ -1961,7 +2041,7 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev)
1961 break; 2041 break;
1962 } 2042 }
1963 2043
1964 if (rdev->family == CHIP_KABINI) 2044 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
1965 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); 2045 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);
1966 else 2046 else
1967 return kv_set_enabled_level(rdev, i); 2047 return kv_set_enabled_level(rdev, i);
@@ -2118,7 +2198,7 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev,
2118 else 2198 else
2119 pi->battery_state = false; 2199 pi->battery_state = false;
2120 2200
2121 if (rdev->family == CHIP_KABINI) { 2201 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
2122 ps->dpm0_pg_nb_ps_lo = 0x1; 2202 ps->dpm0_pg_nb_ps_lo = 0x1;
2123 ps->dpm0_pg_nb_ps_hi = 0x0; 2203 ps->dpm0_pg_nb_ps_hi = 0x0;
2124 ps->dpmx_nb_ps_lo = 0x1; 2204 ps->dpmx_nb_ps_lo = 0x1;
@@ -2179,7 +2259,7 @@ static int kv_calculate_nbps_level_settings(struct radeon_device *rdev)
2179 if (pi->lowest_valid > pi->highest_valid) 2259 if (pi->lowest_valid > pi->highest_valid)
2180 return -EINVAL; 2260 return -EINVAL;
2181 2261
2182 if (rdev->family == CHIP_KABINI) { 2262 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
2183 for (i = pi->lowest_valid; i <= pi->highest_valid; i++) { 2263 for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {
2184 pi->graphics_level[i].GnbSlow = 1; 2264 pi->graphics_level[i].GnbSlow = 1;
2185 pi->graphics_level[i].ForceNbPs1 = 0; 2265 pi->graphics_level[i].ForceNbPs1 = 0;
@@ -2253,9 +2333,9 @@ static void kv_init_graphics_levels(struct radeon_device *rdev)
2253 break; 2333 break;
2254 2334
2255 kv_set_divider_value(rdev, i, table->entries[i].clk); 2335 kv_set_divider_value(rdev, i, table->entries[i].clk);
2256 vid_2bit = sumo_convert_vid7_to_vid2(rdev, 2336 vid_2bit = kv_convert_vid7_to_vid2(rdev,
2257 &pi->sys_info.vid_mapping_table, 2337 &pi->sys_info.vid_mapping_table,
2258 table->entries[i].v); 2338 table->entries[i].v);
2259 kv_set_vid(rdev, i, vid_2bit); 2339 kv_set_vid(rdev, i, vid_2bit);
2260 kv_set_at(rdev, i, pi->at[i]); 2340 kv_set_at(rdev, i, pi->at[i]);
2261 kv_dpm_power_level_enabled_for_throttle(rdev, i, true); 2341 kv_dpm_power_level_enabled_for_throttle(rdev, i, true);
@@ -2324,7 +2404,7 @@ static void kv_program_nbps_index_settings(struct radeon_device *rdev,
2324 struct kv_power_info *pi = kv_get_pi(rdev); 2404 struct kv_power_info *pi = kv_get_pi(rdev);
2325 u32 nbdpmconfig1; 2405 u32 nbdpmconfig1;
2326 2406
2327 if (rdev->family == CHIP_KABINI) 2407 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
2328 return; 2408 return;
2329 2409
2330 if (pi->sys_info.nb_dpm_enable) { 2410 if (pi->sys_info.nb_dpm_enable) {
@@ -2631,9 +2711,6 @@ int kv_dpm_init(struct radeon_device *rdev)
2631 2711
2632 pi->sram_end = SMC_RAM_END; 2712 pi->sram_end = SMC_RAM_END;
2633 2713
2634 if (rdev->family == CHIP_KABINI)
2635 pi->high_voltage_t = 4001;
2636
2637 pi->enable_nb_dpm = true; 2714 pi->enable_nb_dpm = true;
2638 2715
2639 pi->caps_power_containment = true; 2716 pi->caps_power_containment = true;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6e887d004eba..bbc189fd3ddc 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2839,6 +2839,7 @@ int r600_copy_cpdma(struct radeon_device *rdev,
2839 r = radeon_fence_emit(rdev, fence, ring->idx); 2839 r = radeon_fence_emit(rdev, fence, ring->idx);
2840 if (r) { 2840 if (r) {
2841 radeon_ring_unlock_undo(rdev, ring); 2841 radeon_ring_unlock_undo(rdev, ring);
2842 radeon_semaphore_free(rdev, &sem, NULL);
2842 return r; 2843 return r;
2843 } 2844 }
2844 2845
@@ -3505,7 +3506,6 @@ int r600_irq_set(struct radeon_device *rdev)
3505 u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0; 3506 u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
3506 u32 grbm_int_cntl = 0; 3507 u32 grbm_int_cntl = 0;
3507 u32 hdmi0, hdmi1; 3508 u32 hdmi0, hdmi1;
3508 u32 d1grph = 0, d2grph = 0;
3509 u32 dma_cntl; 3509 u32 dma_cntl;
3510 u32 thermal_int = 0; 3510 u32 thermal_int = 0;
3511 3511
@@ -3614,8 +3614,8 @@ int r600_irq_set(struct radeon_device *rdev)
3614 WREG32(CP_INT_CNTL, cp_int_cntl); 3614 WREG32(CP_INT_CNTL, cp_int_cntl);
3615 WREG32(DMA_CNTL, dma_cntl); 3615 WREG32(DMA_CNTL, dma_cntl);
3616 WREG32(DxMODE_INT_MASK, mode_int); 3616 WREG32(DxMODE_INT_MASK, mode_int);
3617 WREG32(D1GRPH_INTERRUPT_CONTROL, d1grph); 3617 WREG32(D1GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK);
3618 WREG32(D2GRPH_INTERRUPT_CONTROL, d2grph); 3618 WREG32(D2GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK);
3619 WREG32(GRBM_INT_CNTL, grbm_int_cntl); 3619 WREG32(GRBM_INT_CNTL, grbm_int_cntl);
3620 if (ASIC_IS_DCE3(rdev)) { 3620 if (ASIC_IS_DCE3(rdev)) {
3621 WREG32(DC_HPD1_INT_CONTROL, hpd1); 3621 WREG32(DC_HPD1_INT_CONTROL, hpd1);
@@ -3918,6 +3918,14 @@ restart_ih:
3918 break; 3918 break;
3919 } 3919 }
3920 break; 3920 break;
3921 case 9: /* D1 pflip */
3922 DRM_DEBUG("IH: D1 flip\n");
3923 radeon_crtc_handle_flip(rdev, 0);
3924 break;
3925 case 11: /* D2 pflip */
3926 DRM_DEBUG("IH: D2 flip\n");
3927 radeon_crtc_handle_flip(rdev, 1);
3928 break;
3921 case 19: /* HPD/DAC hotplug */ 3929 case 19: /* HPD/DAC hotplug */
3922 switch (src_data) { 3930 switch (src_data) {
3923 case 0: 3931 case 0:
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c
index 53fcb28f5578..4969cef44a19 100644
--- a/drivers/gpu/drm/radeon/r600_dma.c
+++ b/drivers/gpu/drm/radeon/r600_dma.c
@@ -489,6 +489,7 @@ int r600_copy_dma(struct radeon_device *rdev,
489 r = radeon_fence_emit(rdev, fence, ring->idx); 489 r = radeon_fence_emit(rdev, fence, ring->idx);
490 if (r) { 490 if (r) {
491 radeon_ring_unlock_undo(rdev, ring); 491 radeon_ring_unlock_undo(rdev, ring);
492 radeon_semaphore_free(rdev, &sem, NULL);
492 return r; 493 return r;
493 } 494 }
494 495
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c
index cbf7e3269f84..9c61b74ef441 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.c
+++ b/drivers/gpu/drm/radeon/r600_dpm.c
@@ -158,16 +158,18 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
158 u32 line_time_us, vblank_lines; 158 u32 line_time_us, vblank_lines;
159 u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ 159 u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
160 160
161 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 161 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
162 radeon_crtc = to_radeon_crtc(crtc); 162 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
163 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { 163 radeon_crtc = to_radeon_crtc(crtc);
164 line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / 164 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
165 radeon_crtc->hw_mode.clock; 165 line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) /
166 vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - 166 radeon_crtc->hw_mode.clock;
167 radeon_crtc->hw_mode.crtc_vdisplay + 167 vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end -
168 (radeon_crtc->v_border * 2); 168 radeon_crtc->hw_mode.crtc_vdisplay +
169 vblank_time_us = vblank_lines * line_time_us; 169 (radeon_crtc->v_border * 2);
170 break; 170 vblank_time_us = vblank_lines * line_time_us;
171 break;
172 }
171 } 173 }
172 } 174 }
173 175
@@ -181,14 +183,15 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev)
181 struct radeon_crtc *radeon_crtc; 183 struct radeon_crtc *radeon_crtc;
182 u32 vrefresh = 0; 184 u32 vrefresh = 0;
183 185
184 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 186 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
185 radeon_crtc = to_radeon_crtc(crtc); 187 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
186 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { 188 radeon_crtc = to_radeon_crtc(crtc);
187 vrefresh = radeon_crtc->hw_mode.vrefresh; 189 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
188 break; 190 vrefresh = radeon_crtc->hw_mode.vrefresh;
191 break;
192 }
189 } 193 }
190 } 194 }
191
192 return vrefresh; 195 return vrefresh;
193} 196}
194 197
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index f21db7a0b34d..68528619834a 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -730,6 +730,12 @@ struct cik_irq_stat_regs {
730 u32 disp_int_cont4; 730 u32 disp_int_cont4;
731 u32 disp_int_cont5; 731 u32 disp_int_cont5;
732 u32 disp_int_cont6; 732 u32 disp_int_cont6;
733 u32 d1grph_int;
734 u32 d2grph_int;
735 u32 d3grph_int;
736 u32 d4grph_int;
737 u32 d5grph_int;
738 u32 d6grph_int;
733}; 739};
734 740
735union radeon_irq_stat_regs { 741union radeon_irq_stat_regs {
@@ -739,7 +745,7 @@ union radeon_irq_stat_regs {
739 struct cik_irq_stat_regs cik; 745 struct cik_irq_stat_regs cik;
740}; 746};
741 747
742#define RADEON_MAX_HPD_PINS 6 748#define RADEON_MAX_HPD_PINS 7
743#define RADEON_MAX_CRTCS 6 749#define RADEON_MAX_CRTCS 6
744#define RADEON_MAX_AFMT_BLOCKS 7 750#define RADEON_MAX_AFMT_BLOCKS 7
745 751
@@ -2321,6 +2327,7 @@ struct radeon_device {
2321 bool have_disp_power_ref; 2327 bool have_disp_power_ref;
2322}; 2328};
2323 2329
2330bool radeon_is_px(struct drm_device *dev);
2324int radeon_device_init(struct radeon_device *rdev, 2331int radeon_device_init(struct radeon_device *rdev,
2325 struct drm_device *ddev, 2332 struct drm_device *ddev,
2326 struct pci_dev *pdev, 2333 struct pci_dev *pdev,
@@ -2631,6 +2638,9 @@ void r100_pll_errata_after_index(struct radeon_device *rdev);
2631#define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND)) 2638#define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND))
2632#define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN)) 2639#define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN))
2633#define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) 2640#define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE))
2641#define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI))
2642#define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE))
2643#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI))
2634 2644
2635#define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ 2645#define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \
2636 (rdev->ddev->pdev->device == 0x6850) || \ 2646 (rdev->ddev->pdev->device == 0x6850) || \
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index b8a24a75d4ff..be20e62dac83 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2516,6 +2516,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2516 break; 2516 break;
2517 case CHIP_KAVERI: 2517 case CHIP_KAVERI:
2518 case CHIP_KABINI: 2518 case CHIP_KABINI:
2519 case CHIP_MULLINS:
2519 rdev->asic = &kv_asic; 2520 rdev->asic = &kv_asic;
2520 /* set num crtcs */ 2521 /* set num crtcs */
2521 if (rdev->family == CHIP_KAVERI) { 2522 if (rdev->family == CHIP_KAVERI) {
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index fa9a9c02751e..a9fb0d016d38 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -59,7 +59,7 @@ struct atpx_mux {
59 u16 mux; 59 u16 mux;
60} __packed; 60} __packed;
61 61
62bool radeon_is_px(void) { 62bool radeon_has_atpx(void) {
63 return radeon_atpx_priv.atpx_detected; 63 return radeon_atpx_priv.atpx_detected;
64} 64}
65 65
@@ -528,6 +528,13 @@ static bool radeon_atpx_detect(void)
528 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); 528 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
529 } 529 }
530 530
531 /* some newer PX laptops mark the dGPU as a non-VGA display device */
532 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
533 vga_count++;
534
535 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
536 }
537
531 if (has_atpx && vga_count == 2) { 538 if (has_atpx && vga_count == 2) {
532 acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); 539 acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);
533 printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n", 540 printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n",
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index c566b486ca08..ea50e0ae7bf7 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1261,21 +1261,6 @@ static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
1261 .force = radeon_dvi_force, 1261 .force = radeon_dvi_force,
1262}; 1262};
1263 1263
1264static void radeon_dp_connector_destroy(struct drm_connector *connector)
1265{
1266 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1267 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1268
1269 if (radeon_connector->edid)
1270 kfree(radeon_connector->edid);
1271 if (radeon_dig_connector->dp_i2c_bus)
1272 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
1273 kfree(radeon_connector->con_priv);
1274 drm_sysfs_connector_remove(connector);
1275 drm_connector_cleanup(connector);
1276 kfree(connector);
1277}
1278
1279static int radeon_dp_get_modes(struct drm_connector *connector) 1264static int radeon_dp_get_modes(struct drm_connector *connector)
1280{ 1265{
1281 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 1266 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
@@ -1553,7 +1538,7 @@ static const struct drm_connector_funcs radeon_dp_connector_funcs = {
1553 .detect = radeon_dp_detect, 1538 .detect = radeon_dp_detect,
1554 .fill_modes = drm_helper_probe_single_connector_modes, 1539 .fill_modes = drm_helper_probe_single_connector_modes,
1555 .set_property = radeon_connector_set_property, 1540 .set_property = radeon_connector_set_property,
1556 .destroy = radeon_dp_connector_destroy, 1541 .destroy = radeon_connector_destroy,
1557 .force = radeon_dvi_force, 1542 .force = radeon_dvi_force,
1558}; 1543};
1559 1544
@@ -1562,7 +1547,7 @@ static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1562 .detect = radeon_dp_detect, 1547 .detect = radeon_dp_detect,
1563 .fill_modes = drm_helper_probe_single_connector_modes, 1548 .fill_modes = drm_helper_probe_single_connector_modes,
1564 .set_property = radeon_lvds_set_property, 1549 .set_property = radeon_lvds_set_property,
1565 .destroy = radeon_dp_connector_destroy, 1550 .destroy = radeon_connector_destroy,
1566 .force = radeon_dvi_force, 1551 .force = radeon_dvi_force,
1567}; 1552};
1568 1553
@@ -1571,7 +1556,7 @@ static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1571 .detect = radeon_dp_detect, 1556 .detect = radeon_dp_detect,
1572 .fill_modes = drm_helper_probe_single_connector_modes, 1557 .fill_modes = drm_helper_probe_single_connector_modes,
1573 .set_property = radeon_lvds_set_property, 1558 .set_property = radeon_lvds_set_property,
1574 .destroy = radeon_dp_connector_destroy, 1559 .destroy = radeon_connector_destroy,
1575 .force = radeon_dvi_force, 1560 .force = radeon_dvi_force,
1576}; 1561};
1577 1562
@@ -1668,17 +1653,10 @@ radeon_add_atom_connector(struct drm_device *dev,
1668 radeon_dig_connector->igp_lane_info = igp_lane_info; 1653 radeon_dig_connector->igp_lane_info = igp_lane_info;
1669 radeon_connector->con_priv = radeon_dig_connector; 1654 radeon_connector->con_priv = radeon_dig_connector;
1670 if (i2c_bus->valid) { 1655 if (i2c_bus->valid) {
1671 /* add DP i2c bus */ 1656 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1672 if (connector_type == DRM_MODE_CONNECTOR_eDP) 1657 if (radeon_connector->ddc_bus)
1673 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1674 else
1675 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1676 if (radeon_dig_connector->dp_i2c_bus)
1677 has_aux = true; 1658 has_aux = true;
1678 else 1659 else
1679 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1680 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1681 if (!radeon_connector->ddc_bus)
1682 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); 1660 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1683 } 1661 }
1684 switch (connector_type) { 1662 switch (connector_type) {
@@ -1893,10 +1871,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1893 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); 1871 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1894 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); 1872 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1895 if (i2c_bus->valid) { 1873 if (i2c_bus->valid) {
1896 /* add DP i2c bus */
1897 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1898 if (!radeon_dig_connector->dp_i2c_bus)
1899 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1900 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); 1874 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1901 if (radeon_connector->ddc_bus) 1875 if (radeon_connector->ddc_bus)
1902 has_aux = true; 1876 has_aux = true;
@@ -1942,14 +1916,10 @@ radeon_add_atom_connector(struct drm_device *dev,
1942 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); 1916 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
1943 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); 1917 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1944 if (i2c_bus->valid) { 1918 if (i2c_bus->valid) {
1945 /* add DP i2c bus */ 1919 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1946 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); 1920 if (radeon_connector->ddc_bus)
1947 if (radeon_dig_connector->dp_i2c_bus)
1948 has_aux = true; 1921 has_aux = true;
1949 else 1922 else
1950 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1951 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1952 if (!radeon_connector->ddc_bus)
1953 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); 1923 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1954 } 1924 }
1955 drm_object_attach_property(&radeon_connector->base.base, 1925 drm_object_attach_property(&radeon_connector->base.base,
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 835516d2d257..0e770bbf7e29 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -99,14 +99,18 @@ static const char radeon_family_name[][16] = {
99 "KAVERI", 99 "KAVERI",
100 "KABINI", 100 "KABINI",
101 "HAWAII", 101 "HAWAII",
102 "MULLINS",
102 "LAST", 103 "LAST",
103}; 104};
104 105
105#if defined(CONFIG_VGA_SWITCHEROO) 106bool radeon_is_px(struct drm_device *dev)
106bool radeon_is_px(void); 107{
107#else 108 struct radeon_device *rdev = dev->dev_private;
108static inline bool radeon_is_px(void) { return false; } 109
109#endif 110 if (rdev->flags & RADEON_IS_PX)
111 return true;
112 return false;
113}
110 114
111/** 115/**
112 * radeon_program_register_sequence - program an array of registers. 116 * radeon_program_register_sequence - program an array of registers.
@@ -1082,7 +1086,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero
1082{ 1086{
1083 struct drm_device *dev = pci_get_drvdata(pdev); 1087 struct drm_device *dev = pci_get_drvdata(pdev);
1084 1088
1085 if (radeon_is_px() && state == VGA_SWITCHEROO_OFF) 1089 if (radeon_is_px(dev) && state == VGA_SWITCHEROO_OFF)
1086 return; 1090 return;
1087 1091
1088 if (state == VGA_SWITCHEROO_ON) { 1092 if (state == VGA_SWITCHEROO_ON) {
@@ -1301,9 +1305,7 @@ int radeon_device_init(struct radeon_device *rdev,
1301 * ignore it */ 1305 * ignore it */
1302 vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); 1306 vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
1303 1307
1304 if (radeon_runtime_pm == 1) 1308 if (rdev->flags & RADEON_IS_PX)
1305 runtime = true;
1306 if ((radeon_runtime_pm == -1) && radeon_is_px())
1307 runtime = true; 1309 runtime = true;
1308 vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); 1310 vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime);
1309 if (runtime) 1311 if (runtime)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 386cfa4c194d..408b6ac53f0b 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -284,6 +284,10 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
284 u32 update_pending; 284 u32 update_pending;
285 int vpos, hpos; 285 int vpos, hpos;
286 286
287 /* can happen during initialization */
288 if (radeon_crtc == NULL)
289 return;
290
287 spin_lock_irqsave(&rdev->ddev->event_lock, flags); 291 spin_lock_irqsave(&rdev->ddev->event_lock, flags);
288 work = radeon_crtc->unpin_work; 292 work = radeon_crtc->unpin_work;
289 if (work == NULL || 293 if (work == NULL ||
@@ -759,19 +763,18 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
759 763
760 if (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) != 764 if (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) !=
761 ENCODER_OBJECT_ID_NONE) { 765 ENCODER_OBJECT_ID_NONE) {
762 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 766 if (radeon_connector->ddc_bus->has_aux)
763
764 if (dig->dp_i2c_bus)
765 radeon_connector->edid = drm_get_edid(&radeon_connector->base, 767 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
766 &dig->dp_i2c_bus->adapter); 768 &radeon_connector->ddc_bus->aux.ddc);
767 } else if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || 769 } else if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
768 (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { 770 (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
769 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 771 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
770 772
771 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || 773 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
772 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) 774 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
775 radeon_connector->ddc_bus->has_aux)
773 radeon_connector->edid = drm_get_edid(&radeon_connector->base, 776 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
774 &dig->dp_i2c_bus->adapter); 777 &radeon_connector->ddc_bus->aux.ddc);
775 else if (radeon_connector->ddc_bus && !radeon_connector->edid) 778 else if (radeon_connector->ddc_bus && !radeon_connector->edid)
776 radeon_connector->edid = drm_get_edid(&radeon_connector->base, 779 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
777 &radeon_connector->ddc_bus->adapter); 780 &radeon_connector->ddc_bus->adapter);
@@ -827,20 +830,52 @@ static void avivo_reduce_ratio(unsigned *nom, unsigned *den,
827 830
828 /* make sure nominator is large enough */ 831 /* make sure nominator is large enough */
829 if (*nom < nom_min) { 832 if (*nom < nom_min) {
830 tmp = (nom_min + *nom - 1) / *nom; 833 tmp = DIV_ROUND_UP(nom_min, *nom);
831 *nom *= tmp; 834 *nom *= tmp;
832 *den *= tmp; 835 *den *= tmp;
833 } 836 }
834 837
835 /* make sure the denominator is large enough */ 838 /* make sure the denominator is large enough */
836 if (*den < den_min) { 839 if (*den < den_min) {
837 tmp = (den_min + *den - 1) / *den; 840 tmp = DIV_ROUND_UP(den_min, *den);
838 *nom *= tmp; 841 *nom *= tmp;
839 *den *= tmp; 842 *den *= tmp;
840 } 843 }
841} 844}
842 845
843/** 846/**
847 * avivo_get_fb_ref_div - feedback and ref divider calculation
848 *
849 * @nom: nominator
850 * @den: denominator
851 * @post_div: post divider
852 * @fb_div_max: feedback divider maximum
853 * @ref_div_max: reference divider maximum
854 * @fb_div: resulting feedback divider
855 * @ref_div: resulting reference divider
856 *
857 * Calculate feedback and reference divider for a given post divider. Makes
858 * sure we stay within the limits.
859 */
860static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div,
861 unsigned fb_div_max, unsigned ref_div_max,
862 unsigned *fb_div, unsigned *ref_div)
863{
864 /* limit reference * post divider to a maximum */
865 ref_div_max = min(128 / post_div, ref_div_max);
866
867 /* get matching reference and feedback divider */
868 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
869 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
870
871 /* limit fb divider to its maximum */
872 if (*fb_div > fb_div_max) {
873 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
874 *fb_div = fb_div_max;
875 }
876}
877
878/**
844 * radeon_compute_pll_avivo - compute PLL paramaters 879 * radeon_compute_pll_avivo - compute PLL paramaters
845 * 880 *
846 * @pll: information about the PLL 881 * @pll: information about the PLL
@@ -861,11 +896,14 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
861 u32 *ref_div_p, 896 u32 *ref_div_p,
862 u32 *post_div_p) 897 u32 *post_div_p)
863{ 898{
899 unsigned target_clock = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ?
900 freq : freq / 10;
901
864 unsigned fb_div_min, fb_div_max, fb_div; 902 unsigned fb_div_min, fb_div_max, fb_div;
865 unsigned post_div_min, post_div_max, post_div; 903 unsigned post_div_min, post_div_max, post_div;
866 unsigned ref_div_min, ref_div_max, ref_div; 904 unsigned ref_div_min, ref_div_max, ref_div;
867 unsigned post_div_best, diff_best; 905 unsigned post_div_best, diff_best;
868 unsigned nom, den, tmp; 906 unsigned nom, den;
869 907
870 /* determine allowed feedback divider range */ 908 /* determine allowed feedback divider range */
871 fb_div_min = pll->min_feedback_div; 909 fb_div_min = pll->min_feedback_div;
@@ -881,14 +919,18 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
881 ref_div_min = pll->reference_div; 919 ref_div_min = pll->reference_div;
882 else 920 else
883 ref_div_min = pll->min_ref_div; 921 ref_div_min = pll->min_ref_div;
884 ref_div_max = pll->max_ref_div; 922
923 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&
924 pll->flags & RADEON_PLL_USE_REF_DIV)
925 ref_div_max = pll->reference_div;
926 else
927 ref_div_max = pll->max_ref_div;
885 928
886 /* determine allowed post divider range */ 929 /* determine allowed post divider range */
887 if (pll->flags & RADEON_PLL_USE_POST_DIV) { 930 if (pll->flags & RADEON_PLL_USE_POST_DIV) {
888 post_div_min = pll->post_div; 931 post_div_min = pll->post_div;
889 post_div_max = pll->post_div; 932 post_div_max = pll->post_div;
890 } else { 933 } else {
891 unsigned target_clock = freq / 10;
892 unsigned vco_min, vco_max; 934 unsigned vco_min, vco_max;
893 935
894 if (pll->flags & RADEON_PLL_IS_LCD) { 936 if (pll->flags & RADEON_PLL_IS_LCD) {
@@ -899,6 +941,11 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
899 vco_max = pll->pll_out_max; 941 vco_max = pll->pll_out_max;
900 } 942 }
901 943
944 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
945 vco_min *= 10;
946 vco_max *= 10;
947 }
948
902 post_div_min = vco_min / target_clock; 949 post_div_min = vco_min / target_clock;
903 if ((target_clock * post_div_min) < vco_min) 950 if ((target_clock * post_div_min) < vco_min)
904 ++post_div_min; 951 ++post_div_min;
@@ -913,7 +960,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
913 } 960 }
914 961
915 /* represent the searched ratio as fractional number */ 962 /* represent the searched ratio as fractional number */
916 nom = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? freq : freq / 10; 963 nom = target_clock;
917 den = pll->reference_freq; 964 den = pll->reference_freq;
918 965
919 /* reduce the numbers to a simpler ratio */ 966 /* reduce the numbers to a simpler ratio */
@@ -927,7 +974,12 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
927 diff_best = ~0; 974 diff_best = ~0;
928 975
929 for (post_div = post_div_min; post_div <= post_div_max; ++post_div) { 976 for (post_div = post_div_min; post_div <= post_div_max; ++post_div) {
930 unsigned diff = abs(den - den / post_div * post_div); 977 unsigned diff;
978 avivo_get_fb_ref_div(nom, den, post_div, fb_div_max,
979 ref_div_max, &fb_div, &ref_div);
980 diff = abs(target_clock - (pll->reference_freq * fb_div) /
981 (ref_div * post_div));
982
931 if (diff < diff_best || (diff == diff_best && 983 if (diff < diff_best || (diff == diff_best &&
932 !(pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP))) { 984 !(pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP))) {
933 985
@@ -937,29 +989,24 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
937 } 989 }
938 post_div = post_div_best; 990 post_div = post_div_best;
939 991
940 /* get matching reference and feedback divider */ 992 /* get the feedback and reference divider for the optimal value */
941 ref_div = max(den / post_div, 1u); 993 avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, ref_div_max,
942 fb_div = nom; 994 &fb_div, &ref_div);
943
944 /* we're almost done, but reference and feedback
945 divider might be to large now */
946
947 tmp = ref_div;
948
949 if (fb_div > fb_div_max) {
950 ref_div = ref_div * fb_div_max / fb_div;
951 fb_div = fb_div_max;
952 }
953
954 if (ref_div > ref_div_max) {
955 ref_div = ref_div_max;
956 fb_div = nom * ref_div_max / tmp;
957 }
958 995
959 /* reduce the numbers to a simpler ratio once more */ 996 /* reduce the numbers to a simpler ratio once more */
960 /* this also makes sure that the reference divider is large enough */ 997 /* this also makes sure that the reference divider is large enough */
961 avivo_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min); 998 avivo_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min);
962 999
1000 /* avoid high jitter with small fractional dividers */
1001 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) {
1002 fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60);
1003 if (fb_div < fb_div_min) {
1004 unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);
1005 fb_div *= tmp;
1006 ref_div *= tmp;
1007 }
1008 }
1009
963 /* and finally save the result */ 1010 /* and finally save the result */
964 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { 1011 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
965 *fb_div_p = fb_div / 10; 1012 *fb_div_p = fb_div / 10;
@@ -976,7 +1023,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
976 *post_div_p = post_div; 1023 *post_div_p = post_div;
977 1024
978 DRM_DEBUG_KMS("%d - %d, pll dividers - fb: %d.%d ref: %d, post %d\n", 1025 DRM_DEBUG_KMS("%d - %d, pll dividers - fb: %d.%d ref: %d, post %d\n",
979 freq, *dot_clock_p, *fb_div_p, *frac_fb_div_p, 1026 freq, *dot_clock_p * 10, *fb_div_p, *frac_fb_div_p,
980 ref_div, post_div); 1027 ref_div, post_div);
981} 1028}
982 1029
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index d0eba48dd74e..c00a2f585185 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -115,6 +115,7 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
115 unsigned int flags, 115 unsigned int flags,
116 int *vpos, int *hpos, ktime_t *stime, 116 int *vpos, int *hpos, ktime_t *stime,
117 ktime_t *etime); 117 ktime_t *etime);
118extern bool radeon_is_px(struct drm_device *dev);
118extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 119extern const struct drm_ioctl_desc radeon_ioctls_kms[];
119extern int radeon_max_kms_ioctl; 120extern int radeon_max_kms_ioctl;
120int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 121int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
@@ -144,11 +145,9 @@ void radeon_debugfs_cleanup(struct drm_minor *minor);
144#if defined(CONFIG_VGA_SWITCHEROO) 145#if defined(CONFIG_VGA_SWITCHEROO)
145void radeon_register_atpx_handler(void); 146void radeon_register_atpx_handler(void);
146void radeon_unregister_atpx_handler(void); 147void radeon_unregister_atpx_handler(void);
147bool radeon_is_px(void);
148#else 148#else
149static inline void radeon_register_atpx_handler(void) {} 149static inline void radeon_register_atpx_handler(void) {}
150static inline void radeon_unregister_atpx_handler(void) {} 150static inline void radeon_unregister_atpx_handler(void) {}
151static inline bool radeon_is_px(void) { return false; }
152#endif 151#endif
153 152
154int radeon_no_wb; 153int radeon_no_wb;
@@ -186,7 +185,7 @@ module_param_named(dynclks, radeon_dynclks, int, 0444);
186MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 185MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
187module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 186module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
188 187
189MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 188MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
190module_param_named(vramlimit, radeon_vram_limit, int, 0600); 189module_param_named(vramlimit, radeon_vram_limit, int, 0600);
191 190
192MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 191MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
@@ -405,12 +404,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev)
405 struct drm_device *drm_dev = pci_get_drvdata(pdev); 404 struct drm_device *drm_dev = pci_get_drvdata(pdev);
406 int ret; 405 int ret;
407 406
408 if (radeon_runtime_pm == 0) { 407 if (!radeon_is_px(drm_dev)) {
409 pm_runtime_forbid(dev);
410 return -EBUSY;
411 }
412
413 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
414 pm_runtime_forbid(dev); 408 pm_runtime_forbid(dev);
415 return -EBUSY; 409 return -EBUSY;
416 } 410 }
@@ -434,10 +428,7 @@ static int radeon_pmops_runtime_resume(struct device *dev)
434 struct drm_device *drm_dev = pci_get_drvdata(pdev); 428 struct drm_device *drm_dev = pci_get_drvdata(pdev);
435 int ret; 429 int ret;
436 430
437 if (radeon_runtime_pm == 0) 431 if (!radeon_is_px(drm_dev))
438 return -EINVAL;
439
440 if (radeon_runtime_pm == -1 && !radeon_is_px())
441 return -EINVAL; 432 return -EINVAL;
442 433
443 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 434 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
@@ -462,14 +453,7 @@ static int radeon_pmops_runtime_idle(struct device *dev)
462 struct drm_device *drm_dev = pci_get_drvdata(pdev); 453 struct drm_device *drm_dev = pci_get_drvdata(pdev);
463 struct drm_crtc *crtc; 454 struct drm_crtc *crtc;
464 455
465 if (radeon_runtime_pm == 0) { 456 if (!radeon_is_px(drm_dev)) {
466 pm_runtime_forbid(dev);
467 return -EBUSY;
468 }
469
470 /* are we PX enabled? */
471 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
472 DRM_DEBUG_DRIVER("failing to power off - not px\n");
473 pm_runtime_forbid(dev); 457 pm_runtime_forbid(dev);
474 return -EBUSY; 458 return -EBUSY;
475 } 459 }
diff --git a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h
index 614ad549297f..4b7b87f71a63 100644
--- a/drivers/gpu/drm/radeon/radeon_family.h
+++ b/drivers/gpu/drm/radeon/radeon_family.h
@@ -97,6 +97,7 @@ enum radeon_family {
97 CHIP_KAVERI, 97 CHIP_KAVERI,
98 CHIP_KABINI, 98 CHIP_KABINI,
99 CHIP_HAWAII, 99 CHIP_HAWAII,
100 CHIP_MULLINS,
100 CHIP_LAST, 101 CHIP_LAST,
101}; 102};
102 103
@@ -115,6 +116,7 @@ enum radeon_chip_flags {
115 RADEON_NEW_MEMMAP = 0x00400000UL, 116 RADEON_NEW_MEMMAP = 0x00400000UL,
116 RADEON_IS_PCI = 0x00800000UL, 117 RADEON_IS_PCI = 0x00800000UL,
117 RADEON_IS_IGPGART = 0x01000000UL, 118 RADEON_IS_IGPGART = 0x01000000UL,
119 RADEON_IS_PX = 0x02000000UL,
118}; 120};
119 121
120#endif 122#endif
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index e24ca6ab96de..7b944142a9fd 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -64,8 +64,7 @@ bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux)
64 radeon_router_select_ddc_port(radeon_connector); 64 radeon_router_select_ddc_port(radeon_connector);
65 65
66 if (use_aux) { 66 if (use_aux) {
67 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 67 ret = i2c_transfer(&radeon_connector->ddc_bus->aux.ddc, msgs, 2);
68 ret = i2c_transfer(&dig->dp_i2c_bus->adapter, msgs, 2);
69 } else { 68 } else {
70 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); 69 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2);
71 } 70 }
@@ -950,16 +949,16 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
950 /* set the radeon bit adapter */ 949 /* set the radeon bit adapter */
951 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), 950 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
952 "Radeon i2c bit bus %s", name); 951 "Radeon i2c bit bus %s", name);
953 i2c->adapter.algo_data = &i2c->algo.bit; 952 i2c->adapter.algo_data = &i2c->bit;
954 i2c->algo.bit.pre_xfer = pre_xfer; 953 i2c->bit.pre_xfer = pre_xfer;
955 i2c->algo.bit.post_xfer = post_xfer; 954 i2c->bit.post_xfer = post_xfer;
956 i2c->algo.bit.setsda = set_data; 955 i2c->bit.setsda = set_data;
957 i2c->algo.bit.setscl = set_clock; 956 i2c->bit.setscl = set_clock;
958 i2c->algo.bit.getsda = get_data; 957 i2c->bit.getsda = get_data;
959 i2c->algo.bit.getscl = get_clock; 958 i2c->bit.getscl = get_clock;
960 i2c->algo.bit.udelay = 10; 959 i2c->bit.udelay = 10;
961 i2c->algo.bit.timeout = usecs_to_jiffies(2200); /* from VESA */ 960 i2c->bit.timeout = usecs_to_jiffies(2200); /* from VESA */
962 i2c->algo.bit.data = i2c; 961 i2c->bit.data = i2c;
963 ret = i2c_bit_add_bus(&i2c->adapter); 962 ret = i2c_bit_add_bus(&i2c->adapter);
964 if (ret) { 963 if (ret) {
965 DRM_ERROR("Failed to register bit i2c %s\n", name); 964 DRM_ERROR("Failed to register bit i2c %s\n", name);
@@ -974,46 +973,13 @@ out_free:
974 973
975} 974}
976 975
977struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
978 struct radeon_i2c_bus_rec *rec,
979 const char *name)
980{
981 struct radeon_i2c_chan *i2c;
982 int ret;
983
984 i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL);
985 if (i2c == NULL)
986 return NULL;
987
988 i2c->rec = *rec;
989 i2c->adapter.owner = THIS_MODULE;
990 i2c->adapter.class = I2C_CLASS_DDC;
991 i2c->adapter.dev.parent = &dev->pdev->dev;
992 i2c->dev = dev;
993 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
994 "Radeon aux bus %s", name);
995 i2c_set_adapdata(&i2c->adapter, i2c);
996 i2c->adapter.algo_data = &i2c->algo.dp;
997 i2c->algo.dp.aux_ch = radeon_dp_i2c_aux_ch;
998 i2c->algo.dp.address = 0;
999 ret = i2c_dp_aux_add_bus(&i2c->adapter);
1000 if (ret) {
1001 DRM_INFO("Failed to register i2c %s\n", name);
1002 goto out_free;
1003 }
1004
1005 return i2c;
1006out_free:
1007 kfree(i2c);
1008 return NULL;
1009
1010}
1011
1012void radeon_i2c_destroy(struct radeon_i2c_chan *i2c) 976void radeon_i2c_destroy(struct radeon_i2c_chan *i2c)
1013{ 977{
1014 if (!i2c) 978 if (!i2c)
1015 return; 979 return;
1016 i2c_del_adapter(&i2c->adapter); 980 i2c_del_adapter(&i2c->adapter);
981 if (i2c->has_aux)
982 drm_dp_aux_unregister_i2c_bus(&i2c->aux);
1017 kfree(i2c); 983 kfree(i2c);
1018} 984}
1019 985
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 3e49342a20e6..0cc47f12d995 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -35,9 +35,9 @@
35#include <linux/pm_runtime.h> 35#include <linux/pm_runtime.h>
36 36
37#if defined(CONFIG_VGA_SWITCHEROO) 37#if defined(CONFIG_VGA_SWITCHEROO)
38bool radeon_is_px(void); 38bool radeon_has_atpx(void);
39#else 39#else
40static inline bool radeon_is_px(void) { return false; } 40static inline bool radeon_has_atpx(void) { return false; }
41#endif 41#endif
42 42
43/** 43/**
@@ -107,6 +107,11 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
107 flags |= RADEON_IS_PCI; 107 flags |= RADEON_IS_PCI;
108 } 108 }
109 109
110 if ((radeon_runtime_pm != 0) &&
111 radeon_has_atpx() &&
112 ((flags & RADEON_IS_IGP) == 0))
113 flags |= RADEON_IS_PX;
114
110 /* radeon_device_init should report only fatal error 115 /* radeon_device_init should report only fatal error
111 * like memory allocation failure or iomapping failure, 116 * like memory allocation failure or iomapping failure,
112 * or memory manager initialization failure, it must 117 * or memory manager initialization failure, it must
@@ -137,8 +142,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
137 "Error during ACPI methods call\n"); 142 "Error during ACPI methods call\n");
138 } 143 }
139 144
140 if ((radeon_runtime_pm == 1) || 145 if (radeon_is_px(dev)) {
141 ((radeon_runtime_pm == -1) && radeon_is_px())) {
142 pm_runtime_use_autosuspend(dev->dev); 146 pm_runtime_use_autosuspend(dev->dev);
143 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 147 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
144 pm_runtime_set_active(dev->dev); 148 pm_runtime_set_active(dev->dev);
@@ -568,12 +572,17 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
568 } 572 }
569 573
570 r = radeon_vm_init(rdev, &fpriv->vm); 574 r = radeon_vm_init(rdev, &fpriv->vm);
571 if (r) 575 if (r) {
576 kfree(fpriv);
572 return r; 577 return r;
578 }
573 579
574 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); 580 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
575 if (r) 581 if (r) {
582 radeon_vm_fini(rdev, &fpriv->vm);
583 kfree(fpriv);
576 return r; 584 return r;
585 }
577 586
578 /* map the ib pool buffer read only into 587 /* map the ib pool buffer read only into
579 * virtual address space */ 588 * virtual address space */
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 832d9fa1a4c4..6ddf31a2d34e 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -187,12 +187,10 @@ struct radeon_pll {
187struct radeon_i2c_chan { 187struct radeon_i2c_chan {
188 struct i2c_adapter adapter; 188 struct i2c_adapter adapter;
189 struct drm_device *dev; 189 struct drm_device *dev;
190 union { 190 struct i2c_algo_bit_data bit;
191 struct i2c_algo_bit_data bit;
192 struct i2c_algo_dp_aux_data dp;
193 } algo;
194 struct radeon_i2c_bus_rec rec; 191 struct radeon_i2c_bus_rec rec;
195 struct drm_dp_aux aux; 192 struct drm_dp_aux aux;
193 bool has_aux;
196}; 194};
197 195
198/* mostly for macs, but really any system without connector tables */ 196/* mostly for macs, but really any system without connector tables */
@@ -440,7 +438,6 @@ struct radeon_encoder {
440struct radeon_connector_atom_dig { 438struct radeon_connector_atom_dig {
441 uint32_t igp_lane_info; 439 uint32_t igp_lane_info;
442 /* displayport */ 440 /* displayport */
443 struct radeon_i2c_chan *dp_i2c_bus;
444 u8 dpcd[DP_RECEIVER_CAP_SIZE]; 441 u8 dpcd[DP_RECEIVER_CAP_SIZE];
445 u8 dp_sink_type; 442 u8 dp_sink_type;
446 int dp_clock; 443 int dp_clock;
@@ -702,8 +699,6 @@ extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
702 uint8_t lane_set); 699 uint8_t lane_set);
703extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); 700extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
704extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder); 701extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
705extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
706 u8 write_byte, u8 *read_byte);
707void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le); 702void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
708 703
709extern void radeon_i2c_init(struct radeon_device *rdev); 704extern void radeon_i2c_init(struct radeon_device *rdev);
@@ -715,9 +710,6 @@ extern void radeon_i2c_add(struct radeon_device *rdev,
715 const char *name); 710 const char *name);
716extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, 711extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
717 struct radeon_i2c_bus_rec *i2c_bus); 712 struct radeon_i2c_bus_rec *i2c_bus);
718extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
719 struct radeon_i2c_bus_rec *rec,
720 const char *name);
721extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 713extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
722 struct radeon_i2c_bus_rec *rec, 714 struct radeon_i2c_bus_rec *rec,
723 const char *name); 715 const char *name);
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index ee738a524639..f30b8426eee2 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -603,7 +603,6 @@ static const struct attribute_group *hwmon_groups[] = {
603static int radeon_hwmon_init(struct radeon_device *rdev) 603static int radeon_hwmon_init(struct radeon_device *rdev)
604{ 604{
605 int err = 0; 605 int err = 0;
606 struct device *hwmon_dev;
607 606
608 switch (rdev->pm.int_thermal_type) { 607 switch (rdev->pm.int_thermal_type) {
609 case THERMAL_TYPE_RV6XX: 608 case THERMAL_TYPE_RV6XX:
@@ -616,11 +615,11 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
616 case THERMAL_TYPE_KV: 615 case THERMAL_TYPE_KV:
617 if (rdev->asic->pm.get_temperature == NULL) 616 if (rdev->asic->pm.get_temperature == NULL)
618 return err; 617 return err;
619 hwmon_dev = hwmon_device_register_with_groups(rdev->dev, 618 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
620 "radeon", rdev, 619 "radeon", rdev,
621 hwmon_groups); 620 hwmon_groups);
622 if (IS_ERR(hwmon_dev)) { 621 if (IS_ERR(rdev->pm.int_hwmon_dev)) {
623 err = PTR_ERR(hwmon_dev); 622 err = PTR_ERR(rdev->pm.int_hwmon_dev);
624 dev_err(rdev->dev, 623 dev_err(rdev->dev,
625 "Unable to register hwmon device: %d\n", err); 624 "Unable to register hwmon device: %d\n", err);
626 } 625 }
@@ -632,6 +631,12 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
632 return err; 631 return err;
633} 632}
634 633
634static void radeon_hwmon_fini(struct radeon_device *rdev)
635{
636 if (rdev->pm.int_hwmon_dev)
637 hwmon_device_unregister(rdev->pm.int_hwmon_dev);
638}
639
635static void radeon_dpm_thermal_work_handler(struct work_struct *work) 640static void radeon_dpm_thermal_work_handler(struct work_struct *work)
636{ 641{
637 struct radeon_device *rdev = 642 struct radeon_device *rdev =
@@ -1257,6 +1262,7 @@ int radeon_pm_init(struct radeon_device *rdev)
1257 case CHIP_RV670: 1262 case CHIP_RV670:
1258 case CHIP_RS780: 1263 case CHIP_RS780:
1259 case CHIP_RS880: 1264 case CHIP_RS880:
1265 case CHIP_RV770:
1260 case CHIP_BARTS: 1266 case CHIP_BARTS:
1261 case CHIP_TURKS: 1267 case CHIP_TURKS:
1262 case CHIP_CAICOS: 1268 case CHIP_CAICOS:
@@ -1273,7 +1279,6 @@ int radeon_pm_init(struct radeon_device *rdev)
1273 else 1279 else
1274 rdev->pm.pm_method = PM_METHOD_PROFILE; 1280 rdev->pm.pm_method = PM_METHOD_PROFILE;
1275 break; 1281 break;
1276 case CHIP_RV770:
1277 case CHIP_RV730: 1282 case CHIP_RV730:
1278 case CHIP_RV710: 1283 case CHIP_RV710:
1279 case CHIP_RV740: 1284 case CHIP_RV740:
@@ -1295,6 +1300,7 @@ int radeon_pm_init(struct radeon_device *rdev)
1295 case CHIP_KABINI: 1300 case CHIP_KABINI:
1296 case CHIP_KAVERI: 1301 case CHIP_KAVERI:
1297 case CHIP_HAWAII: 1302 case CHIP_HAWAII:
1303 case CHIP_MULLINS:
1298 /* DPM requires the RLC, RV770+ dGPU requires SMC */ 1304 /* DPM requires the RLC, RV770+ dGPU requires SMC */
1299 if (!rdev->rlc_fw) 1305 if (!rdev->rlc_fw)
1300 rdev->pm.pm_method = PM_METHOD_PROFILE; 1306 rdev->pm.pm_method = PM_METHOD_PROFILE;
@@ -1353,6 +1359,8 @@ static void radeon_pm_fini_old(struct radeon_device *rdev)
1353 device_remove_file(rdev->dev, &dev_attr_power_method); 1359 device_remove_file(rdev->dev, &dev_attr_power_method);
1354 } 1360 }
1355 1361
1362 radeon_hwmon_fini(rdev);
1363
1356 if (rdev->pm.power_state) 1364 if (rdev->pm.power_state)
1357 kfree(rdev->pm.power_state); 1365 kfree(rdev->pm.power_state);
1358} 1366}
@@ -1372,6 +1380,8 @@ static void radeon_pm_fini_dpm(struct radeon_device *rdev)
1372 } 1380 }
1373 radeon_dpm_fini(rdev); 1381 radeon_dpm_fini(rdev);
1374 1382
1383 radeon_hwmon_fini(rdev);
1384
1375 if (rdev->pm.power_state) 1385 if (rdev->pm.power_state)
1376 kfree(rdev->pm.power_state); 1386 kfree(rdev->pm.power_state);
1377} 1387}
@@ -1397,12 +1407,14 @@ static void radeon_pm_compute_clocks_old(struct radeon_device *rdev)
1397 1407
1398 rdev->pm.active_crtcs = 0; 1408 rdev->pm.active_crtcs = 0;
1399 rdev->pm.active_crtc_count = 0; 1409 rdev->pm.active_crtc_count = 0;
1400 list_for_each_entry(crtc, 1410 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
1401 &ddev->mode_config.crtc_list, head) { 1411 list_for_each_entry(crtc,
1402 radeon_crtc = to_radeon_crtc(crtc); 1412 &ddev->mode_config.crtc_list, head) {
1403 if (radeon_crtc->enabled) { 1413 radeon_crtc = to_radeon_crtc(crtc);
1404 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); 1414 if (radeon_crtc->enabled) {
1405 rdev->pm.active_crtc_count++; 1415 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
1416 rdev->pm.active_crtc_count++;
1417 }
1406 } 1418 }
1407 } 1419 }
1408 1420
@@ -1469,12 +1481,14 @@ static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev)
1469 /* update active crtc counts */ 1481 /* update active crtc counts */
1470 rdev->pm.dpm.new_active_crtcs = 0; 1482 rdev->pm.dpm.new_active_crtcs = 0;
1471 rdev->pm.dpm.new_active_crtc_count = 0; 1483 rdev->pm.dpm.new_active_crtc_count = 0;
1472 list_for_each_entry(crtc, 1484 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
1473 &ddev->mode_config.crtc_list, head) { 1485 list_for_each_entry(crtc,
1474 radeon_crtc = to_radeon_crtc(crtc); 1486 &ddev->mode_config.crtc_list, head) {
1475 if (crtc->enabled) { 1487 radeon_crtc = to_radeon_crtc(crtc);
1476 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); 1488 if (crtc->enabled) {
1477 rdev->pm.dpm.new_active_crtc_count++; 1489 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
1490 rdev->pm.dpm.new_active_crtc_count++;
1491 }
1478 } 1492 }
1479 } 1493 }
1480 1494
diff --git a/drivers/gpu/drm/radeon/radeon_ucode.h b/drivers/gpu/drm/radeon/radeon_ucode.h
index a77cd274dfc3..4e7c3269b183 100644
--- a/drivers/gpu/drm/radeon/radeon_ucode.h
+++ b/drivers/gpu/drm/radeon/radeon_ucode.h
@@ -52,14 +52,20 @@
52#define BONAIRE_RLC_UCODE_SIZE 2048 52#define BONAIRE_RLC_UCODE_SIZE 2048
53#define KB_RLC_UCODE_SIZE 2560 53#define KB_RLC_UCODE_SIZE 2560
54#define KV_RLC_UCODE_SIZE 2560 54#define KV_RLC_UCODE_SIZE 2560
55#define ML_RLC_UCODE_SIZE 2560
55 56
56/* MC */ 57/* MC */
57#define BTC_MC_UCODE_SIZE 6024 58#define BTC_MC_UCODE_SIZE 6024
58#define CAYMAN_MC_UCODE_SIZE 6037 59#define CAYMAN_MC_UCODE_SIZE 6037
59#define SI_MC_UCODE_SIZE 7769 60#define SI_MC_UCODE_SIZE 7769
61#define TAHITI_MC_UCODE_SIZE 7808
62#define PITCAIRN_MC_UCODE_SIZE 7775
63#define VERDE_MC_UCODE_SIZE 7875
60#define OLAND_MC_UCODE_SIZE 7863 64#define OLAND_MC_UCODE_SIZE 7863
61#define CIK_MC_UCODE_SIZE 7866 65#define BONAIRE_MC_UCODE_SIZE 7866
66#define BONAIRE_MC2_UCODE_SIZE 7948
62#define HAWAII_MC_UCODE_SIZE 7933 67#define HAWAII_MC_UCODE_SIZE 7933
68#define HAWAII_MC2_UCODE_SIZE 8091
63 69
64/* SDMA */ 70/* SDMA */
65#define CIK_SDMA_UCODE_SIZE 1050 71#define CIK_SDMA_UCODE_SIZE 1050
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index 5748bdaeacce..1b65ae2433cd 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -99,6 +99,7 @@ int radeon_uvd_init(struct radeon_device *rdev)
99 case CHIP_KABINI: 99 case CHIP_KABINI:
100 case CHIP_KAVERI: 100 case CHIP_KAVERI:
101 case CHIP_HAWAII: 101 case CHIP_HAWAII:
102 case CHIP_MULLINS:
102 fw_name = FIRMWARE_BONAIRE; 103 fw_name = FIRMWARE_BONAIRE;
103 break; 104 break;
104 105
@@ -465,6 +466,10 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p,
465 cmd = radeon_get_ib_value(p, p->idx) >> 1; 466 cmd = radeon_get_ib_value(p, p->idx) >> 1;
466 467
467 if (cmd < 0x4) { 468 if (cmd < 0x4) {
469 if (end <= start) {
470 DRM_ERROR("invalid reloc offset %X!\n", offset);
471 return -EINVAL;
472 }
468 if ((end - start) < buf_sizes[cmd]) { 473 if ((end - start) < buf_sizes[cmd]) {
469 DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd, 474 DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd,
470 (unsigned)(end - start), buf_sizes[cmd]); 475 (unsigned)(end - start), buf_sizes[cmd]);
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c
index 76e9904bc537..f73324c81491 100644
--- a/drivers/gpu/drm/radeon/radeon_vce.c
+++ b/drivers/gpu/drm/radeon/radeon_vce.c
@@ -66,6 +66,7 @@ int radeon_vce_init(struct radeon_device *rdev)
66 case CHIP_BONAIRE: 66 case CHIP_BONAIRE:
67 case CHIP_KAVERI: 67 case CHIP_KAVERI:
68 case CHIP_KABINI: 68 case CHIP_KABINI:
69 case CHIP_MULLINS:
69 fw_name = FIRMWARE_BONAIRE; 70 fw_name = FIRMWARE_BONAIRE;
70 break; 71 break;
71 72
@@ -613,7 +614,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev,
613 struct radeon_fence *fence) 614 struct radeon_fence *fence)
614{ 615{
615 struct radeon_ring *ring = &rdev->ring[fence->ring]; 616 struct radeon_ring *ring = &rdev->ring[fence->ring];
616 uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; 617 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
617 618
618 radeon_ring_write(ring, VCE_CMD_FENCE); 619 radeon_ring_write(ring, VCE_CMD_FENCE);
619 radeon_ring_write(ring, addr); 620 radeon_ring_write(ring, addr);
diff --git a/drivers/gpu/drm/radeon/rv770_dma.c b/drivers/gpu/drm/radeon/rv770_dma.c
index aca8cbe8a335..bbf2e076ee45 100644
--- a/drivers/gpu/drm/radeon/rv770_dma.c
+++ b/drivers/gpu/drm/radeon/rv770_dma.c
@@ -86,6 +86,7 @@ int rv770_copy_dma(struct radeon_device *rdev,
86 r = radeon_fence_emit(rdev, fence, ring->idx); 86 r = radeon_fence_emit(rdev, fence, ring->idx);
87 if (r) { 87 if (r) {
88 radeon_ring_unlock_undo(rdev, ring); 88 radeon_ring_unlock_undo(rdev, ring);
89 radeon_semaphore_free(rdev, &sem, NULL);
89 return r; 90 return r;
90 } 91 }
91 92
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index d589475fe9e6..22a63c98ba14 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -39,30 +39,35 @@ MODULE_FIRMWARE("radeon/TAHITI_pfp.bin");
39MODULE_FIRMWARE("radeon/TAHITI_me.bin"); 39MODULE_FIRMWARE("radeon/TAHITI_me.bin");
40MODULE_FIRMWARE("radeon/TAHITI_ce.bin"); 40MODULE_FIRMWARE("radeon/TAHITI_ce.bin");
41MODULE_FIRMWARE("radeon/TAHITI_mc.bin"); 41MODULE_FIRMWARE("radeon/TAHITI_mc.bin");
42MODULE_FIRMWARE("radeon/TAHITI_mc2.bin");
42MODULE_FIRMWARE("radeon/TAHITI_rlc.bin"); 43MODULE_FIRMWARE("radeon/TAHITI_rlc.bin");
43MODULE_FIRMWARE("radeon/TAHITI_smc.bin"); 44MODULE_FIRMWARE("radeon/TAHITI_smc.bin");
44MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); 45MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin");
45MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); 46MODULE_FIRMWARE("radeon/PITCAIRN_me.bin");
46MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin"); 47MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin");
47MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin"); 48MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin");
49MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin");
48MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin"); 50MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin");
49MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin"); 51MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin");
50MODULE_FIRMWARE("radeon/VERDE_pfp.bin"); 52MODULE_FIRMWARE("radeon/VERDE_pfp.bin");
51MODULE_FIRMWARE("radeon/VERDE_me.bin"); 53MODULE_FIRMWARE("radeon/VERDE_me.bin");
52MODULE_FIRMWARE("radeon/VERDE_ce.bin"); 54MODULE_FIRMWARE("radeon/VERDE_ce.bin");
53MODULE_FIRMWARE("radeon/VERDE_mc.bin"); 55MODULE_FIRMWARE("radeon/VERDE_mc.bin");
56MODULE_FIRMWARE("radeon/VERDE_mc2.bin");
54MODULE_FIRMWARE("radeon/VERDE_rlc.bin"); 57MODULE_FIRMWARE("radeon/VERDE_rlc.bin");
55MODULE_FIRMWARE("radeon/VERDE_smc.bin"); 58MODULE_FIRMWARE("radeon/VERDE_smc.bin");
56MODULE_FIRMWARE("radeon/OLAND_pfp.bin"); 59MODULE_FIRMWARE("radeon/OLAND_pfp.bin");
57MODULE_FIRMWARE("radeon/OLAND_me.bin"); 60MODULE_FIRMWARE("radeon/OLAND_me.bin");
58MODULE_FIRMWARE("radeon/OLAND_ce.bin"); 61MODULE_FIRMWARE("radeon/OLAND_ce.bin");
59MODULE_FIRMWARE("radeon/OLAND_mc.bin"); 62MODULE_FIRMWARE("radeon/OLAND_mc.bin");
63MODULE_FIRMWARE("radeon/OLAND_mc2.bin");
60MODULE_FIRMWARE("radeon/OLAND_rlc.bin"); 64MODULE_FIRMWARE("radeon/OLAND_rlc.bin");
61MODULE_FIRMWARE("radeon/OLAND_smc.bin"); 65MODULE_FIRMWARE("radeon/OLAND_smc.bin");
62MODULE_FIRMWARE("radeon/HAINAN_pfp.bin"); 66MODULE_FIRMWARE("radeon/HAINAN_pfp.bin");
63MODULE_FIRMWARE("radeon/HAINAN_me.bin"); 67MODULE_FIRMWARE("radeon/HAINAN_me.bin");
64MODULE_FIRMWARE("radeon/HAINAN_ce.bin"); 68MODULE_FIRMWARE("radeon/HAINAN_ce.bin");
65MODULE_FIRMWARE("radeon/HAINAN_mc.bin"); 69MODULE_FIRMWARE("radeon/HAINAN_mc.bin");
70MODULE_FIRMWARE("radeon/HAINAN_mc2.bin");
66MODULE_FIRMWARE("radeon/HAINAN_rlc.bin"); 71MODULE_FIRMWARE("radeon/HAINAN_rlc.bin");
67MODULE_FIRMWARE("radeon/HAINAN_smc.bin"); 72MODULE_FIRMWARE("radeon/HAINAN_smc.bin");
68 73
@@ -1467,36 +1472,33 @@ int si_mc_load_microcode(struct radeon_device *rdev)
1467 const __be32 *fw_data; 1472 const __be32 *fw_data;
1468 u32 running, blackout = 0; 1473 u32 running, blackout = 0;
1469 u32 *io_mc_regs; 1474 u32 *io_mc_regs;
1470 int i, ucode_size, regs_size; 1475 int i, regs_size, ucode_size;
1471 1476
1472 if (!rdev->mc_fw) 1477 if (!rdev->mc_fw)
1473 return -EINVAL; 1478 return -EINVAL;
1474 1479
1480 ucode_size = rdev->mc_fw->size / 4;
1481
1475 switch (rdev->family) { 1482 switch (rdev->family) {
1476 case CHIP_TAHITI: 1483 case CHIP_TAHITI:
1477 io_mc_regs = (u32 *)&tahiti_io_mc_regs; 1484 io_mc_regs = (u32 *)&tahiti_io_mc_regs;
1478 ucode_size = SI_MC_UCODE_SIZE;
1479 regs_size = TAHITI_IO_MC_REGS_SIZE; 1485 regs_size = TAHITI_IO_MC_REGS_SIZE;
1480 break; 1486 break;
1481 case CHIP_PITCAIRN: 1487 case CHIP_PITCAIRN:
1482 io_mc_regs = (u32 *)&pitcairn_io_mc_regs; 1488 io_mc_regs = (u32 *)&pitcairn_io_mc_regs;
1483 ucode_size = SI_MC_UCODE_SIZE;
1484 regs_size = TAHITI_IO_MC_REGS_SIZE; 1489 regs_size = TAHITI_IO_MC_REGS_SIZE;
1485 break; 1490 break;
1486 case CHIP_VERDE: 1491 case CHIP_VERDE:
1487 default: 1492 default:
1488 io_mc_regs = (u32 *)&verde_io_mc_regs; 1493 io_mc_regs = (u32 *)&verde_io_mc_regs;
1489 ucode_size = SI_MC_UCODE_SIZE;
1490 regs_size = TAHITI_IO_MC_REGS_SIZE; 1494 regs_size = TAHITI_IO_MC_REGS_SIZE;
1491 break; 1495 break;
1492 case CHIP_OLAND: 1496 case CHIP_OLAND:
1493 io_mc_regs = (u32 *)&oland_io_mc_regs; 1497 io_mc_regs = (u32 *)&oland_io_mc_regs;
1494 ucode_size = OLAND_MC_UCODE_SIZE;
1495 regs_size = TAHITI_IO_MC_REGS_SIZE; 1498 regs_size = TAHITI_IO_MC_REGS_SIZE;
1496 break; 1499 break;
1497 case CHIP_HAINAN: 1500 case CHIP_HAINAN:
1498 io_mc_regs = (u32 *)&hainan_io_mc_regs; 1501 io_mc_regs = (u32 *)&hainan_io_mc_regs;
1499 ucode_size = OLAND_MC_UCODE_SIZE;
1500 regs_size = TAHITI_IO_MC_REGS_SIZE; 1502 regs_size = TAHITI_IO_MC_REGS_SIZE;
1501 break; 1503 break;
1502 } 1504 }
@@ -1552,7 +1554,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1552 const char *chip_name; 1554 const char *chip_name;
1553 const char *rlc_chip_name; 1555 const char *rlc_chip_name;
1554 size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size; 1556 size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size;
1555 size_t smc_req_size; 1557 size_t smc_req_size, mc2_req_size;
1556 char fw_name[30]; 1558 char fw_name[30];
1557 int err; 1559 int err;
1558 1560
@@ -1567,6 +1569,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1567 ce_req_size = SI_CE_UCODE_SIZE * 4; 1569 ce_req_size = SI_CE_UCODE_SIZE * 4;
1568 rlc_req_size = SI_RLC_UCODE_SIZE * 4; 1570 rlc_req_size = SI_RLC_UCODE_SIZE * 4;
1569 mc_req_size = SI_MC_UCODE_SIZE * 4; 1571 mc_req_size = SI_MC_UCODE_SIZE * 4;
1572 mc2_req_size = TAHITI_MC_UCODE_SIZE * 4;
1570 smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4); 1573 smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4);
1571 break; 1574 break;
1572 case CHIP_PITCAIRN: 1575 case CHIP_PITCAIRN:
@@ -1577,6 +1580,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1577 ce_req_size = SI_CE_UCODE_SIZE * 4; 1580 ce_req_size = SI_CE_UCODE_SIZE * 4;
1578 rlc_req_size = SI_RLC_UCODE_SIZE * 4; 1581 rlc_req_size = SI_RLC_UCODE_SIZE * 4;
1579 mc_req_size = SI_MC_UCODE_SIZE * 4; 1582 mc_req_size = SI_MC_UCODE_SIZE * 4;
1583 mc2_req_size = PITCAIRN_MC_UCODE_SIZE * 4;
1580 smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4); 1584 smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4);
1581 break; 1585 break;
1582 case CHIP_VERDE: 1586 case CHIP_VERDE:
@@ -1587,6 +1591,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1587 ce_req_size = SI_CE_UCODE_SIZE * 4; 1591 ce_req_size = SI_CE_UCODE_SIZE * 4;
1588 rlc_req_size = SI_RLC_UCODE_SIZE * 4; 1592 rlc_req_size = SI_RLC_UCODE_SIZE * 4;
1589 mc_req_size = SI_MC_UCODE_SIZE * 4; 1593 mc_req_size = SI_MC_UCODE_SIZE * 4;
1594 mc2_req_size = VERDE_MC_UCODE_SIZE * 4;
1590 smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4); 1595 smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4);
1591 break; 1596 break;
1592 case CHIP_OLAND: 1597 case CHIP_OLAND:
@@ -1596,7 +1601,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1596 me_req_size = SI_PM4_UCODE_SIZE * 4; 1601 me_req_size = SI_PM4_UCODE_SIZE * 4;
1597 ce_req_size = SI_CE_UCODE_SIZE * 4; 1602 ce_req_size = SI_CE_UCODE_SIZE * 4;
1598 rlc_req_size = SI_RLC_UCODE_SIZE * 4; 1603 rlc_req_size = SI_RLC_UCODE_SIZE * 4;
1599 mc_req_size = OLAND_MC_UCODE_SIZE * 4; 1604 mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
1600 smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4); 1605 smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4);
1601 break; 1606 break;
1602 case CHIP_HAINAN: 1607 case CHIP_HAINAN:
@@ -1606,7 +1611,7 @@ static int si_init_microcode(struct radeon_device *rdev)
1606 me_req_size = SI_PM4_UCODE_SIZE * 4; 1611 me_req_size = SI_PM4_UCODE_SIZE * 4;
1607 ce_req_size = SI_CE_UCODE_SIZE * 4; 1612 ce_req_size = SI_CE_UCODE_SIZE * 4;
1608 rlc_req_size = SI_RLC_UCODE_SIZE * 4; 1613 rlc_req_size = SI_RLC_UCODE_SIZE * 4;
1609 mc_req_size = OLAND_MC_UCODE_SIZE * 4; 1614 mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
1610 smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4); 1615 smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4);
1611 break; 1616 break;
1612 default: BUG(); 1617 default: BUG();
@@ -1659,16 +1664,22 @@ static int si_init_microcode(struct radeon_device *rdev)
1659 err = -EINVAL; 1664 err = -EINVAL;
1660 } 1665 }
1661 1666
1662 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); 1667 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
1663 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); 1668 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
1664 if (err) 1669 if (err) {
1665 goto out; 1670 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
1666 if (rdev->mc_fw->size != mc_req_size) { 1671 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
1672 if (err)
1673 goto out;
1674 }
1675 if ((rdev->mc_fw->size != mc_req_size) &&
1676 (rdev->mc_fw->size != mc2_req_size)) {
1667 printk(KERN_ERR 1677 printk(KERN_ERR
1668 "si_mc: Bogus length %zu in firmware \"%s\"\n", 1678 "si_mc: Bogus length %zu in firmware \"%s\"\n",
1669 rdev->mc_fw->size, fw_name); 1679 rdev->mc_fw->size, fw_name);
1670 err = -EINVAL; 1680 err = -EINVAL;
1671 } 1681 }
1682 DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
1672 1683
1673 snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); 1684 snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
1674 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); 1685 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
@@ -5769,7 +5780,6 @@ int si_irq_set(struct radeon_device *rdev)
5769 u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; 5780 u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0;
5770 u32 hpd1 = 0, hpd2 = 0, hpd3 = 0, hpd4 = 0, hpd5 = 0, hpd6 = 0; 5781 u32 hpd1 = 0, hpd2 = 0, hpd3 = 0, hpd4 = 0, hpd5 = 0, hpd6 = 0;
5771 u32 grbm_int_cntl = 0; 5782 u32 grbm_int_cntl = 0;
5772 u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0;
5773 u32 dma_cntl, dma_cntl1; 5783 u32 dma_cntl, dma_cntl1;
5774 u32 thermal_int = 0; 5784 u32 thermal_int = 0;
5775 5785
@@ -5908,16 +5918,22 @@ int si_irq_set(struct radeon_device *rdev)
5908 } 5918 }
5909 5919
5910 if (rdev->num_crtc >= 2) { 5920 if (rdev->num_crtc >= 2) {
5911 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1); 5921 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,
5912 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2); 5922 GRPH_PFLIP_INT_MASK);
5923 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,
5924 GRPH_PFLIP_INT_MASK);
5913 } 5925 }
5914 if (rdev->num_crtc >= 4) { 5926 if (rdev->num_crtc >= 4) {
5915 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3); 5927 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,
5916 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4); 5928 GRPH_PFLIP_INT_MASK);
5929 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,
5930 GRPH_PFLIP_INT_MASK);
5917 } 5931 }
5918 if (rdev->num_crtc >= 6) { 5932 if (rdev->num_crtc >= 6) {
5919 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5); 5933 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
5920 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6); 5934 GRPH_PFLIP_INT_MASK);
5935 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,
5936 GRPH_PFLIP_INT_MASK);
5921 } 5937 }
5922 5938
5923 if (!ASIC_IS_NODCE(rdev)) { 5939 if (!ASIC_IS_NODCE(rdev)) {
@@ -6281,6 +6297,15 @@ restart_ih:
6281 break; 6297 break;
6282 } 6298 }
6283 break; 6299 break;
6300 case 8: /* D1 page flip */
6301 case 10: /* D2 page flip */
6302 case 12: /* D3 page flip */
6303 case 14: /* D4 page flip */
6304 case 16: /* D5 page flip */
6305 case 18: /* D6 page flip */
6306 DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1);
6307 radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1);
6308 break;
6284 case 42: /* HPD hotplug */ 6309 case 42: /* HPD hotplug */
6285 switch (src_data) { 6310 switch (src_data) {
6286 case 0: 6311 case 0:
diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c
index cf0fdad8c278..de0ca070122f 100644
--- a/drivers/gpu/drm/radeon/si_dma.c
+++ b/drivers/gpu/drm/radeon/si_dma.c
@@ -213,6 +213,7 @@ int si_copy_dma(struct radeon_device *rdev,
213 r = radeon_fence_emit(rdev, fence, ring->idx); 213 r = radeon_fence_emit(rdev, fence, ring->idx);
214 if (r) { 214 if (r) {
215 radeon_ring_unlock_undo(rdev, ring); 215 radeon_ring_unlock_undo(rdev, ring);
216 radeon_semaphore_free(rdev, &sem, NULL);
216 return r; 217 return r;
217 } 218 }
218 219
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c
index 0a243f0e5d68..be42c8125203 100644
--- a/drivers/gpu/drm/radeon/uvd_v1_0.c
+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
@@ -83,7 +83,10 @@ int uvd_v1_0_init(struct radeon_device *rdev)
83 int r; 83 int r;
84 84
85 /* raise clocks while booting up the VCPU */ 85 /* raise clocks while booting up the VCPU */
86 radeon_set_uvd_clocks(rdev, 53300, 40000); 86 if (rdev->family < CHIP_RV740)
87 radeon_set_uvd_clocks(rdev, 10000, 10000);
88 else
89 radeon_set_uvd_clocks(rdev, 53300, 40000);
87 90
88 r = uvd_v1_0_start(rdev); 91 r = uvd_v1_0_start(rdev);
89 if (r) 92 if (r)
@@ -407,7 +410,10 @@ int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
407 struct radeon_fence *fence = NULL; 410 struct radeon_fence *fence = NULL;
408 int r; 411 int r;
409 412
410 r = radeon_set_uvd_clocks(rdev, 53300, 40000); 413 if (rdev->family < CHIP_RV740)
414 r = radeon_set_uvd_clocks(rdev, 10000, 10000);
415 else
416 r = radeon_set_uvd_clocks(rdev, 53300, 40000);
411 if (r) { 417 if (r) {
412 DRM_ERROR("radeon: failed to raise UVD clocks (%d).\n", r); 418 DRM_ERROR("radeon: failed to raise UVD clocks (%d).\n", r);
413 return r; 419 return r;
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 36c717af6cf9..edb871d7d395 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -312,7 +312,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
312 struct drm_device *drm = crtc->dev; 312 struct drm_device *drm = crtc->dev;
313 struct drm_plane *plane; 313 struct drm_plane *plane;
314 314
315 list_for_each_entry(plane, &drm->mode_config.plane_list, head) { 315 drm_for_each_legacy_plane(plane, &drm->mode_config.plane_list) {
316 if (plane->crtc == crtc) { 316 if (plane->crtc == crtc) {
317 tegra_plane_disable(plane); 317 tegra_plane_disable(plane);
318 plane->crtc = NULL; 318 plane->crtc = NULL;
diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c
index d536ed381fbd..005c19bd92df 100644
--- a/drivers/gpu/drm/tegra/dpaux.c
+++ b/drivers/gpu/drm/tegra/dpaux.c
@@ -99,55 +99,73 @@ static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer,
99static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux, 99static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux,
100 struct drm_dp_aux_msg *msg) 100 struct drm_dp_aux_msg *msg)
101{ 101{
102 unsigned long value = DPAUX_DP_AUXCTL_TRANSACTREQ;
103 unsigned long timeout = msecs_to_jiffies(250); 102 unsigned long timeout = msecs_to_jiffies(250);
104 struct tegra_dpaux *dpaux = to_dpaux(aux); 103 struct tegra_dpaux *dpaux = to_dpaux(aux);
105 unsigned long status; 104 unsigned long status;
106 ssize_t ret = 0; 105 ssize_t ret = 0;
106 u32 value;
107 107
108 if (msg->size < 1 || msg->size > 16) 108 /* Tegra has 4x4 byte DP AUX transmit and receive FIFOs. */
109 if (msg->size > 16)
109 return -EINVAL; 110 return -EINVAL;
110 111
111 tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR); 112 /*
113 * Allow zero-sized messages only for I2C, in which case they specify
114 * address-only transactions.
115 */
116 if (msg->size < 1) {
117 switch (msg->request & ~DP_AUX_I2C_MOT) {
118 case DP_AUX_I2C_WRITE:
119 case DP_AUX_I2C_READ:
120 value = DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY;
121 break;
122
123 default:
124 return -EINVAL;
125 }
126 } else {
127 /* For non-zero-sized messages, set the CMDLEN field. */
128 value = DPAUX_DP_AUXCTL_CMDLEN(msg->size - 1);
129 }
112 130
113 switch (msg->request & ~DP_AUX_I2C_MOT) { 131 switch (msg->request & ~DP_AUX_I2C_MOT) {
114 case DP_AUX_I2C_WRITE: 132 case DP_AUX_I2C_WRITE:
115 if (msg->request & DP_AUX_I2C_MOT) 133 if (msg->request & DP_AUX_I2C_MOT)
116 value = DPAUX_DP_AUXCTL_CMD_MOT_WR; 134 value |= DPAUX_DP_AUXCTL_CMD_MOT_WR;
117 else 135 else
118 value = DPAUX_DP_AUXCTL_CMD_I2C_WR; 136 value |= DPAUX_DP_AUXCTL_CMD_I2C_WR;
119 137
120 break; 138 break;
121 139
122 case DP_AUX_I2C_READ: 140 case DP_AUX_I2C_READ:
123 if (msg->request & DP_AUX_I2C_MOT) 141 if (msg->request & DP_AUX_I2C_MOT)
124 value = DPAUX_DP_AUXCTL_CMD_MOT_RD; 142 value |= DPAUX_DP_AUXCTL_CMD_MOT_RD;
125 else 143 else
126 value = DPAUX_DP_AUXCTL_CMD_I2C_RD; 144 value |= DPAUX_DP_AUXCTL_CMD_I2C_RD;
127 145
128 break; 146 break;
129 147
130 case DP_AUX_I2C_STATUS: 148 case DP_AUX_I2C_STATUS:
131 if (msg->request & DP_AUX_I2C_MOT) 149 if (msg->request & DP_AUX_I2C_MOT)
132 value = DPAUX_DP_AUXCTL_CMD_MOT_RQ; 150 value |= DPAUX_DP_AUXCTL_CMD_MOT_RQ;
133 else 151 else
134 value = DPAUX_DP_AUXCTL_CMD_I2C_RQ; 152 value |= DPAUX_DP_AUXCTL_CMD_I2C_RQ;
135 153
136 break; 154 break;
137 155
138 case DP_AUX_NATIVE_WRITE: 156 case DP_AUX_NATIVE_WRITE:
139 value = DPAUX_DP_AUXCTL_CMD_AUX_WR; 157 value |= DPAUX_DP_AUXCTL_CMD_AUX_WR;
140 break; 158 break;
141 159
142 case DP_AUX_NATIVE_READ: 160 case DP_AUX_NATIVE_READ:
143 value = DPAUX_DP_AUXCTL_CMD_AUX_RD; 161 value |= DPAUX_DP_AUXCTL_CMD_AUX_RD;
144 break; 162 break;
145 163
146 default: 164 default:
147 return -EINVAL; 165 return -EINVAL;
148 } 166 }
149 167
150 value |= DPAUX_DP_AUXCTL_CMDLEN(msg->size - 1); 168 tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR);
151 tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXCTL); 169 tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXCTL);
152 170
153 if ((msg->request & DP_AUX_I2C_READ) == 0) { 171 if ((msg->request & DP_AUX_I2C_READ) == 0) {
@@ -198,7 +216,7 @@ static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux,
198 break; 216 break;
199 } 217 }
200 218
201 if (msg->reply == DP_AUX_NATIVE_REPLY_ACK) { 219 if ((msg->size > 0) && (msg->reply == DP_AUX_NATIVE_REPLY_ACK)) {
202 if (msg->request & DP_AUX_I2C_READ) { 220 if (msg->request & DP_AUX_I2C_READ) {
203 size_t count = value & DPAUX_DP_AUXSTAT_REPLY_MASK; 221 size_t count = value & DPAUX_DP_AUXSTAT_REPLY_MASK;
204 222
diff --git a/drivers/gpu/drm/tegra/dpaux.h b/drivers/gpu/drm/tegra/dpaux.h
index 4f5bf10fdff9..806e245ca787 100644
--- a/drivers/gpu/drm/tegra/dpaux.h
+++ b/drivers/gpu/drm/tegra/dpaux.h
@@ -32,6 +32,7 @@
32#define DPAUX_DP_AUXCTL_CMD_I2C_RQ (2 << 12) 32#define DPAUX_DP_AUXCTL_CMD_I2C_RQ (2 << 12)
33#define DPAUX_DP_AUXCTL_CMD_I2C_RD (1 << 12) 33#define DPAUX_DP_AUXCTL_CMD_I2C_RD (1 << 12)
34#define DPAUX_DP_AUXCTL_CMD_I2C_WR (0 << 12) 34#define DPAUX_DP_AUXCTL_CMD_I2C_WR (0 << 12)
35#define DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY (1 << 8)
35#define DPAUX_DP_AUXCTL_CMDLEN(x) ((x) & 0xff) 36#define DPAUX_DP_AUXCTL_CMDLEN(x) ((x) & 0xff)
36 37
37#define DPAUX_DP_AUXSTAT 0x31 38#define DPAUX_DP_AUXSTAT 0x31
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 931490b9cfed..87df0b3674fd 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -1214,14 +1214,36 @@ static int vmw_cmd_dma(struct vmw_private *dev_priv,
1214 SVGA3dCmdSurfaceDMA dma; 1214 SVGA3dCmdSurfaceDMA dma;
1215 } *cmd; 1215 } *cmd;
1216 int ret; 1216 int ret;
1217 SVGA3dCmdSurfaceDMASuffix *suffix;
1218 uint32_t bo_size;
1217 1219
1218 cmd = container_of(header, struct vmw_dma_cmd, header); 1220 cmd = container_of(header, struct vmw_dma_cmd, header);
1221 suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
1222 header->size - sizeof(*suffix));
1223
1224 /* Make sure device and verifier stays in sync. */
1225 if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
1226 DRM_ERROR("Invalid DMA suffix size.\n");
1227 return -EINVAL;
1228 }
1229
1219 ret = vmw_translate_guest_ptr(dev_priv, sw_context, 1230 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1220 &cmd->dma.guest.ptr, 1231 &cmd->dma.guest.ptr,
1221 &vmw_bo); 1232 &vmw_bo);
1222 if (unlikely(ret != 0)) 1233 if (unlikely(ret != 0))
1223 return ret; 1234 return ret;
1224 1235
1236 /* Make sure DMA doesn't cross BO boundaries. */
1237 bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
1238 if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
1239 DRM_ERROR("Invalid DMA offset.\n");
1240 return -EINVAL;
1241 }
1242
1243 bo_size -= cmd->dma.guest.ptr.offset;
1244 if (unlikely(suffix->maximumOffset > bo_size))
1245 suffix->maximumOffset = bo_size;
1246
1225 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, 1247 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1226 user_surface_converter, &cmd->dma.host.sid, 1248 user_surface_converter, &cmd->dma.host.sid,
1227 NULL); 1249 NULL);
diff --git a/drivers/gpu/host1x/hw/intr_hw.c b/drivers/gpu/host1x/hw/intr_hw.c
index db9017adfe2b..498b37e39058 100644
--- a/drivers/gpu/host1x/hw/intr_hw.c
+++ b/drivers/gpu/host1x/hw/intr_hw.c
@@ -47,7 +47,7 @@ static irqreturn_t syncpt_thresh_isr(int irq, void *dev_id)
47 unsigned long reg; 47 unsigned long reg;
48 int i, id; 48 int i, id;
49 49
50 for (i = 0; i <= BIT_WORD(host->info->nb_pts); i++) { 50 for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); i++) {
51 reg = host1x_sync_readl(host, 51 reg = host1x_sync_readl(host,
52 HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i)); 52 HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
53 for_each_set_bit(id, &reg, BITS_PER_LONG) { 53 for_each_set_bit(id, &reg, BITS_PER_LONG) {
@@ -64,7 +64,7 @@ static void _host1x_intr_disable_all_syncpt_intrs(struct host1x *host)
64{ 64{
65 u32 i; 65 u32 i;
66 66
67 for (i = 0; i <= BIT_WORD(host->info->nb_pts); ++i) { 67 for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); ++i) {
68 host1x_sync_writel(host, 0xffffffffu, 68 host1x_sync_writel(host, 0xffffffffu,
69 HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i)); 69 HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i));
70 host1x_sync_writel(host, 0xffffffffu, 70 host1x_sync_writel(host, 0xffffffffu,
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 9e8064205bc7..da52279de939 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -718,6 +718,9 @@ static int hid_scan_main(struct hid_parser *parser, struct hid_item *item)
718 case HID_MAIN_ITEM_TAG_END_COLLECTION: 718 case HID_MAIN_ITEM_TAG_END_COLLECTION:
719 break; 719 break;
720 case HID_MAIN_ITEM_TAG_INPUT: 720 case HID_MAIN_ITEM_TAG_INPUT:
721 /* ignore constant inputs, they will be ignored by hid-input */
722 if (data & HID_MAIN_ITEM_CONSTANT)
723 break;
721 for (i = 0; i < parser->local.usage_index; i++) 724 for (i = 0; i < parser->local.usage_index; i++)
722 hid_scan_input_usage(parser, parser->local.usage[i]); 725 hid_scan_input_usage(parser, parser->local.usage[i]);
723 break; 726 break;
@@ -1250,7 +1253,8 @@ EXPORT_SYMBOL_GPL(hid_output_report);
1250 1253
1251static int hid_report_len(struct hid_report *report) 1254static int hid_report_len(struct hid_report *report)
1252{ 1255{
1253 return ((report->size - 1) >> 3) + 1 + (report->id > 0) + 7; 1256 /* equivalent to DIV_ROUND_UP(report->size, 8) + !!(report->id > 0) */
1257 return ((report->size - 1) >> 3) + 1 + (report->id > 0);
1254} 1258}
1255 1259
1256/* 1260/*
@@ -1263,7 +1267,7 @@ u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags)
1263 * of implement() working on 8 byte chunks 1267 * of implement() working on 8 byte chunks
1264 */ 1268 */
1265 1269
1266 int len = hid_report_len(report); 1270 int len = hid_report_len(report) + 7;
1267 1271
1268 return kmalloc(len, flags); 1272 return kmalloc(len, flags);
1269} 1273}
@@ -1821,8 +1825,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
1821 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) }, 1825 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) },
1822 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) }, 1826 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
1823 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) }, 1827 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
1824 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2) },
1825 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2) },
1826 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_OFFICE_KB) }, 1828 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_OFFICE_KB) },
1827 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) }, 1829 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
1828 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) }, 1830 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index bd221263c739..34bb2205d2ea 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -301,6 +301,9 @@
301 301
302#define USB_VENDOR_ID_DREAM_CHEEKY 0x1d34 302#define USB_VENDOR_ID_DREAM_CHEEKY 0x1d34
303 303
304#define USB_VENDOR_ID_ELITEGROUP 0x03fc
305#define USB_DEVICE_ID_ELITEGROUP_05D8 0x05d8
306
304#define USB_VENDOR_ID_ELO 0x04E7 307#define USB_VENDOR_ID_ELO 0x04E7
305#define USB_DEVICE_ID_ELO_TS2515 0x0022 308#define USB_DEVICE_ID_ELO_TS2515 0x0022
306#define USB_DEVICE_ID_ELO_TS2700 0x0020 309#define USB_DEVICE_ID_ELO_TS2700 0x0020
@@ -455,7 +458,8 @@
455 458
456#define USB_VENDOR_ID_INTEL_0 0x8086 459#define USB_VENDOR_ID_INTEL_0 0x8086
457#define USB_VENDOR_ID_INTEL_1 0x8087 460#define USB_VENDOR_ID_INTEL_1 0x8087
458#define USB_DEVICE_ID_INTEL_HID_SENSOR 0x09fa 461#define USB_DEVICE_ID_INTEL_HID_SENSOR_0 0x09fa
462#define USB_DEVICE_ID_INTEL_HID_SENSOR_1 0x0a04
459 463
460#define USB_VENDOR_ID_STM_0 0x0483 464#define USB_VENDOR_ID_STM_0 0x0483
461#define USB_DEVICE_ID_STM_HID_SENSOR 0x91d1 465#define USB_DEVICE_ID_STM_HID_SENSOR 0x91d1
@@ -629,8 +633,6 @@
629#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713 633#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713
630#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730 634#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730
631#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c 635#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c
632#define USB_DEVICE_ID_MS_TOUCH_COVER_2 0x07a7
633#define USB_DEVICE_ID_MS_TYPE_COVER_2 0x07a9
634 636
635#define USB_VENDOR_ID_MOJO 0x8282 637#define USB_VENDOR_ID_MOJO 0x8282
636#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201 638#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201
@@ -835,6 +837,10 @@
835#define USB_DEVICE_ID_SYNAPTICS_LTS2 0x1d10 837#define USB_DEVICE_ID_SYNAPTICS_LTS2 0x1d10
836#define USB_DEVICE_ID_SYNAPTICS_HD 0x0ac3 838#define USB_DEVICE_ID_SYNAPTICS_HD 0x0ac3
837#define USB_DEVICE_ID_SYNAPTICS_QUAD_HD 0x1ac3 839#define USB_DEVICE_ID_SYNAPTICS_QUAD_HD 0x1ac3
840#define USB_DEVICE_ID_SYNAPTICS_TP_V103 0x5710
841
842#define USB_VENDOR_ID_TEXAS_INSTRUMENTS 0x2047
843#define USB_DEVICE_ID_TEXAS_INSTRUMENTS_LENOVO_YOGA 0x0855
838 844
839#define USB_VENDOR_ID_THINGM 0x27b8 845#define USB_VENDOR_ID_THINGM 0x27b8
840#define USB_DEVICE_ID_BLINK1 0x01ed 846#define USB_DEVICE_ID_BLINK1 0x01ed
diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
index 6fd58175a291..8ba17a946f2a 100644
--- a/drivers/hid/hid-microsoft.c
+++ b/drivers/hid/hid-microsoft.c
@@ -274,10 +274,6 @@ static const struct hid_device_id ms_devices[] = {
274 .driver_data = MS_NOGET }, 274 .driver_data = MS_NOGET },
275 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500), 275 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500),
276 .driver_data = MS_DUPLICATE_USAGES }, 276 .driver_data = MS_DUPLICATE_USAGES },
277 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2),
278 .driver_data = 0 },
279 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2),
280 .driver_data = 0 },
281 277
282 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT), 278 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT),
283 .driver_data = MS_PRESENTER }, 279 .driver_data = MS_PRESENTER },
diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
index 35278e43c7a4..51e25b9407f2 100644
--- a/drivers/hid/hid-multitouch.c
+++ b/drivers/hid/hid-multitouch.c
@@ -1155,6 +1155,11 @@ static const struct hid_device_id mt_devices[] = {
1155 MT_USB_DEVICE(USB_VENDOR_ID_DWAV, 1155 MT_USB_DEVICE(USB_VENDOR_ID_DWAV,
1156 USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) }, 1156 USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) },
1157 1157
1158 /* Elitegroup panel */
1159 { .driver_data = MT_CLS_SERIAL,
1160 MT_USB_DEVICE(USB_VENDOR_ID_ELITEGROUP,
1161 USB_DEVICE_ID_ELITEGROUP_05D8) },
1162
1158 /* Flatfrog Panels */ 1163 /* Flatfrog Panels */
1159 { .driver_data = MT_CLS_FLATFROG, 1164 { .driver_data = MT_CLS_FLATFROG,
1160 MT_USB_DEVICE(USB_VENDOR_ID_FLATFROG, 1165 MT_USB_DEVICE(USB_VENDOR_ID_FLATFROG,
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index 5182031f7b52..be14b5690e94 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -697,14 +697,20 @@ static void sensor_hub_remove(struct hid_device *hdev)
697 697
698static const struct hid_device_id sensor_hub_devices[] = { 698static const struct hid_device_id sensor_hub_devices[] = {
699 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_0, 699 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_0,
700 USB_DEVICE_ID_INTEL_HID_SENSOR), 700 USB_DEVICE_ID_INTEL_HID_SENSOR_0),
701 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK}, 701 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
702 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_1, 702 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_1,
703 USB_DEVICE_ID_INTEL_HID_SENSOR), 703 USB_DEVICE_ID_INTEL_HID_SENSOR_0),
704 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
705 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_1,
706 USB_DEVICE_ID_INTEL_HID_SENSOR_1),
704 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK}, 707 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
705 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_STM_0, 708 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_STM_0,
706 USB_DEVICE_ID_STM_HID_SENSOR), 709 USB_DEVICE_ID_STM_HID_SENSOR),
707 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK}, 710 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
711 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_TEXAS_INSTRUMENTS,
712 USB_DEVICE_ID_TEXAS_INSTRUMENTS_LENOVO_YOGA),
713 .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
708 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, HID_ANY_ID, 714 { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, HID_ANY_ID,
709 HID_ANY_ID) }, 715 HID_ANY_ID) },
710 { } 716 { }
diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c
index 69204afea7a4..908de2789219 100644
--- a/drivers/hid/hid-sony.c
+++ b/drivers/hid/hid-sony.c
@@ -1721,8 +1721,6 @@ static void sony_remove(struct hid_device *hdev)
1721 if (sc->quirks & SONY_LED_SUPPORT) 1721 if (sc->quirks & SONY_LED_SUPPORT)
1722 sony_leds_remove(hdev); 1722 sony_leds_remove(hdev);
1723 1723
1724 if (sc->worker_initialized)
1725 cancel_work_sync(&sc->state_worker);
1726 if (sc->quirks & SONY_BATTERY_SUPPORT) { 1724 if (sc->quirks & SONY_BATTERY_SUPPORT) {
1727 hid_hw_close(hdev); 1725 hid_hw_close(hdev);
1728 sony_battery_remove(sc); 1726 sony_battery_remove(sc);
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index dbd83878ff99..8e4ddb369883 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -119,6 +119,7 @@ static const struct hid_blacklist {
119 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2, HID_QUIRK_NO_INIT_REPORTS }, 119 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2, HID_QUIRK_NO_INIT_REPORTS },
120 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_HD, HID_QUIRK_NO_INIT_REPORTS }, 120 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_HD, HID_QUIRK_NO_INIT_REPORTS },
121 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD, HID_QUIRK_NO_INIT_REPORTS }, 121 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD, HID_QUIRK_NO_INIT_REPORTS },
122 { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP_V103, HID_QUIRK_NO_INIT_REPORTS },
122 123
123 { 0, 0 } 124 { 0, 0 }
124}; 125};
diff --git a/drivers/hv/connection.c b/drivers/hv/connection.c
index f2d7bf90c9fe..2e7801af466e 100644
--- a/drivers/hv/connection.c
+++ b/drivers/hv/connection.c
@@ -55,6 +55,9 @@ static __u32 vmbus_get_next_version(__u32 current_version)
55 case (VERSION_WIN8): 55 case (VERSION_WIN8):
56 return VERSION_WIN7; 56 return VERSION_WIN7;
57 57
58 case (VERSION_WIN8_1):
59 return VERSION_WIN8;
60
58 case (VERSION_WS2008): 61 case (VERSION_WS2008):
59 default: 62 default:
60 return VERSION_INVAL; 63 return VERSION_INVAL;
@@ -77,7 +80,7 @@ static int vmbus_negotiate_version(struct vmbus_channel_msginfo *msginfo,
77 msg->interrupt_page = virt_to_phys(vmbus_connection.int_page); 80 msg->interrupt_page = virt_to_phys(vmbus_connection.int_page);
78 msg->monitor_page1 = virt_to_phys(vmbus_connection.monitor_pages[0]); 81 msg->monitor_page1 = virt_to_phys(vmbus_connection.monitor_pages[0]);
79 msg->monitor_page2 = virt_to_phys(vmbus_connection.monitor_pages[1]); 82 msg->monitor_page2 = virt_to_phys(vmbus_connection.monitor_pages[1]);
80 if (version == VERSION_WIN8) 83 if (version == VERSION_WIN8_1)
81 msg->target_vcpu = hv_context.vp_index[smp_processor_id()]; 84 msg->target_vcpu = hv_context.vp_index[smp_processor_id()];
82 85
83 /* 86 /*
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 6d02e3b06375..d76f0b70c6e0 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -365,12 +365,12 @@ static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
365 if (cpu_has_tjmax(c)) 365 if (cpu_has_tjmax(c))
366 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); 366 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
367 } else { 367 } else {
368 val = (eax >> 16) & 0x7f; 368 val = (eax >> 16) & 0xff;
369 /* 369 /*
370 * If the TjMax is not plausible, an assumption 370 * If the TjMax is not plausible, an assumption
371 * will be used 371 * will be used
372 */ 372 */
373 if (val >= 85) { 373 if (val) {
374 dev_dbg(dev, "TjMax is %d degrees C\n", val); 374 dev_dbg(dev, "TjMax is %d degrees C\n", val);
375 return val * 1000; 375 return val * 1000;
376 } 376 }
diff --git a/drivers/hwmon/ltc2945.c b/drivers/hwmon/ltc2945.c
index c104cc32989d..c9cddf5f056b 100644
--- a/drivers/hwmon/ltc2945.c
+++ b/drivers/hwmon/ltc2945.c
@@ -1,4 +1,4 @@
1/* 1 /*
2 * Driver for Linear Technology LTC2945 I2C Power Monitor 2 * Driver for Linear Technology LTC2945 I2C Power Monitor
3 * 3 *
4 * Copyright (c) 2014 Guenter Roeck 4 * Copyright (c) 2014 Guenter Roeck
@@ -314,8 +314,8 @@ static ssize_t ltc2945_reset_history(struct device *dev,
314 reg = LTC2945_MAX_ADIN_H; 314 reg = LTC2945_MAX_ADIN_H;
315 break; 315 break;
316 default: 316 default:
317 BUG(); 317 WARN_ONCE(1, "Bad register: 0x%x\n", reg);
318 break; 318 return -EINVAL;
319 } 319 }
320 /* Reset maximum */ 320 /* Reset maximum */
321 ret = regmap_bulk_write(regmap, reg, buf_max, num_regs); 321 ret = regmap_bulk_write(regmap, reg, buf_max, num_regs);
diff --git a/drivers/hwmon/vexpress.c b/drivers/hwmon/vexpress.c
index d867e6bb2be1..8242b75d96c8 100644
--- a/drivers/hwmon/vexpress.c
+++ b/drivers/hwmon/vexpress.c
@@ -27,15 +27,15 @@
27struct vexpress_hwmon_data { 27struct vexpress_hwmon_data {
28 struct device *hwmon_dev; 28 struct device *hwmon_dev;
29 struct vexpress_config_func *func; 29 struct vexpress_config_func *func;
30 const char *name;
30}; 31};
31 32
32static ssize_t vexpress_hwmon_name_show(struct device *dev, 33static ssize_t vexpress_hwmon_name_show(struct device *dev,
33 struct device_attribute *dev_attr, char *buffer) 34 struct device_attribute *dev_attr, char *buffer)
34{ 35{
35 const char *compatible = of_get_property(dev->of_node, "compatible", 36 struct vexpress_hwmon_data *data = dev_get_drvdata(dev);
36 NULL);
37 37
38 return sprintf(buffer, "%s\n", compatible); 38 return sprintf(buffer, "%s\n", data->name);
39} 39}
40 40
41static ssize_t vexpress_hwmon_label_show(struct device *dev, 41static ssize_t vexpress_hwmon_label_show(struct device *dev,
@@ -43,9 +43,6 @@ static ssize_t vexpress_hwmon_label_show(struct device *dev,
43{ 43{
44 const char *label = of_get_property(dev->of_node, "label", NULL); 44 const char *label = of_get_property(dev->of_node, "label", NULL);
45 45
46 if (!label)
47 return -ENOENT;
48
49 return snprintf(buffer, PAGE_SIZE, "%s\n", label); 46 return snprintf(buffer, PAGE_SIZE, "%s\n", label);
50} 47}
51 48
@@ -84,6 +81,20 @@ static ssize_t vexpress_hwmon_u64_show(struct device *dev,
84 to_sensor_dev_attr(dev_attr)->index)); 81 to_sensor_dev_attr(dev_attr)->index));
85} 82}
86 83
84static umode_t vexpress_hwmon_attr_is_visible(struct kobject *kobj,
85 struct attribute *attr, int index)
86{
87 struct device *dev = kobj_to_dev(kobj);
88 struct device_attribute *dev_attr = container_of(attr,
89 struct device_attribute, attr);
90
91 if (dev_attr->show == vexpress_hwmon_label_show &&
92 !of_get_property(dev->of_node, "label", NULL))
93 return 0;
94
95 return attr->mode;
96}
97
87static DEVICE_ATTR(name, S_IRUGO, vexpress_hwmon_name_show, NULL); 98static DEVICE_ATTR(name, S_IRUGO, vexpress_hwmon_name_show, NULL);
88 99
89#define VEXPRESS_HWMON_ATTRS(_name, _label_attr, _input_attr) \ 100#define VEXPRESS_HWMON_ATTRS(_name, _label_attr, _input_attr) \
@@ -94,14 +105,27 @@ struct attribute *vexpress_hwmon_attrs_##_name[] = { \
94 NULL \ 105 NULL \
95} 106}
96 107
108struct vexpress_hwmon_type {
109 const char *name;
110 const struct attribute_group **attr_groups;
111};
112
97#if !defined(CONFIG_REGULATOR_VEXPRESS) 113#if !defined(CONFIG_REGULATOR_VEXPRESS)
98static DEVICE_ATTR(in1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); 114static DEVICE_ATTR(in1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
99static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, vexpress_hwmon_u32_show, 115static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, vexpress_hwmon_u32_show,
100 NULL, 1000); 116 NULL, 1000);
101static VEXPRESS_HWMON_ATTRS(volt, in1_label, in1_input); 117static VEXPRESS_HWMON_ATTRS(volt, in1_label, in1_input);
102static struct attribute_group vexpress_hwmon_group_volt = { 118static struct attribute_group vexpress_hwmon_group_volt = {
119 .is_visible = vexpress_hwmon_attr_is_visible,
103 .attrs = vexpress_hwmon_attrs_volt, 120 .attrs = vexpress_hwmon_attrs_volt,
104}; 121};
122static struct vexpress_hwmon_type vexpress_hwmon_volt = {
123 .name = "vexpress_volt",
124 .attr_groups = (const struct attribute_group *[]) {
125 &vexpress_hwmon_group_volt,
126 NULL,
127 },
128};
105#endif 129#endif
106 130
107static DEVICE_ATTR(curr1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); 131static DEVICE_ATTR(curr1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
@@ -109,52 +133,84 @@ static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, vexpress_hwmon_u32_show,
109 NULL, 1000); 133 NULL, 1000);
110static VEXPRESS_HWMON_ATTRS(amp, curr1_label, curr1_input); 134static VEXPRESS_HWMON_ATTRS(amp, curr1_label, curr1_input);
111static struct attribute_group vexpress_hwmon_group_amp = { 135static struct attribute_group vexpress_hwmon_group_amp = {
136 .is_visible = vexpress_hwmon_attr_is_visible,
112 .attrs = vexpress_hwmon_attrs_amp, 137 .attrs = vexpress_hwmon_attrs_amp,
113}; 138};
139static struct vexpress_hwmon_type vexpress_hwmon_amp = {
140 .name = "vexpress_amp",
141 .attr_groups = (const struct attribute_group *[]) {
142 &vexpress_hwmon_group_amp,
143 NULL
144 },
145};
114 146
115static DEVICE_ATTR(temp1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); 147static DEVICE_ATTR(temp1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
116static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, vexpress_hwmon_u32_show, 148static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, vexpress_hwmon_u32_show,
117 NULL, 1000); 149 NULL, 1000);
118static VEXPRESS_HWMON_ATTRS(temp, temp1_label, temp1_input); 150static VEXPRESS_HWMON_ATTRS(temp, temp1_label, temp1_input);
119static struct attribute_group vexpress_hwmon_group_temp = { 151static struct attribute_group vexpress_hwmon_group_temp = {
152 .is_visible = vexpress_hwmon_attr_is_visible,
120 .attrs = vexpress_hwmon_attrs_temp, 153 .attrs = vexpress_hwmon_attrs_temp,
121}; 154};
155static struct vexpress_hwmon_type vexpress_hwmon_temp = {
156 .name = "vexpress_temp",
157 .attr_groups = (const struct attribute_group *[]) {
158 &vexpress_hwmon_group_temp,
159 NULL
160 },
161};
122 162
123static DEVICE_ATTR(power1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); 163static DEVICE_ATTR(power1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
124static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, vexpress_hwmon_u32_show, 164static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, vexpress_hwmon_u32_show,
125 NULL, 1); 165 NULL, 1);
126static VEXPRESS_HWMON_ATTRS(power, power1_label, power1_input); 166static VEXPRESS_HWMON_ATTRS(power, power1_label, power1_input);
127static struct attribute_group vexpress_hwmon_group_power = { 167static struct attribute_group vexpress_hwmon_group_power = {
168 .is_visible = vexpress_hwmon_attr_is_visible,
128 .attrs = vexpress_hwmon_attrs_power, 169 .attrs = vexpress_hwmon_attrs_power,
129}; 170};
171static struct vexpress_hwmon_type vexpress_hwmon_power = {
172 .name = "vexpress_power",
173 .attr_groups = (const struct attribute_group *[]) {
174 &vexpress_hwmon_group_power,
175 NULL
176 },
177};
130 178
131static DEVICE_ATTR(energy1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); 179static DEVICE_ATTR(energy1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
132static SENSOR_DEVICE_ATTR(energy1_input, S_IRUGO, vexpress_hwmon_u64_show, 180static SENSOR_DEVICE_ATTR(energy1_input, S_IRUGO, vexpress_hwmon_u64_show,
133 NULL, 1); 181 NULL, 1);
134static VEXPRESS_HWMON_ATTRS(energy, energy1_label, energy1_input); 182static VEXPRESS_HWMON_ATTRS(energy, energy1_label, energy1_input);
135static struct attribute_group vexpress_hwmon_group_energy = { 183static struct attribute_group vexpress_hwmon_group_energy = {
184 .is_visible = vexpress_hwmon_attr_is_visible,
136 .attrs = vexpress_hwmon_attrs_energy, 185 .attrs = vexpress_hwmon_attrs_energy,
137}; 186};
187static struct vexpress_hwmon_type vexpress_hwmon_energy = {
188 .name = "vexpress_energy",
189 .attr_groups = (const struct attribute_group *[]) {
190 &vexpress_hwmon_group_energy,
191 NULL
192 },
193};
138 194
139static struct of_device_id vexpress_hwmon_of_match[] = { 195static struct of_device_id vexpress_hwmon_of_match[] = {
140#if !defined(CONFIG_REGULATOR_VEXPRESS) 196#if !defined(CONFIG_REGULATOR_VEXPRESS)
141 { 197 {
142 .compatible = "arm,vexpress-volt", 198 .compatible = "arm,vexpress-volt",
143 .data = &vexpress_hwmon_group_volt, 199 .data = &vexpress_hwmon_volt,
144 }, 200 },
145#endif 201#endif
146 { 202 {
147 .compatible = "arm,vexpress-amp", 203 .compatible = "arm,vexpress-amp",
148 .data = &vexpress_hwmon_group_amp, 204 .data = &vexpress_hwmon_amp,
149 }, { 205 }, {
150 .compatible = "arm,vexpress-temp", 206 .compatible = "arm,vexpress-temp",
151 .data = &vexpress_hwmon_group_temp, 207 .data = &vexpress_hwmon_temp,
152 }, { 208 }, {
153 .compatible = "arm,vexpress-power", 209 .compatible = "arm,vexpress-power",
154 .data = &vexpress_hwmon_group_power, 210 .data = &vexpress_hwmon_power,
155 }, { 211 }, {
156 .compatible = "arm,vexpress-energy", 212 .compatible = "arm,vexpress-energy",
157 .data = &vexpress_hwmon_group_energy, 213 .data = &vexpress_hwmon_energy,
158 }, 214 },
159 {} 215 {}
160}; 216};
@@ -165,6 +221,7 @@ static int vexpress_hwmon_probe(struct platform_device *pdev)
165 int err; 221 int err;
166 const struct of_device_id *match; 222 const struct of_device_id *match;
167 struct vexpress_hwmon_data *data; 223 struct vexpress_hwmon_data *data;
224 const struct vexpress_hwmon_type *type;
168 225
169 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 226 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
170 if (!data) 227 if (!data)
@@ -174,12 +231,14 @@ static int vexpress_hwmon_probe(struct platform_device *pdev)
174 match = of_match_device(vexpress_hwmon_of_match, &pdev->dev); 231 match = of_match_device(vexpress_hwmon_of_match, &pdev->dev);
175 if (!match) 232 if (!match)
176 return -ENODEV; 233 return -ENODEV;
234 type = match->data;
235 data->name = type->name;
177 236
178 data->func = vexpress_config_func_get_by_dev(&pdev->dev); 237 data->func = vexpress_config_func_get_by_dev(&pdev->dev);
179 if (!data->func) 238 if (!data->func)
180 return -ENODEV; 239 return -ENODEV;
181 240
182 err = sysfs_create_group(&pdev->dev.kobj, match->data); 241 err = sysfs_create_groups(&pdev->dev.kobj, type->attr_groups);
183 if (err) 242 if (err)
184 goto error; 243 goto error;
185 244
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index a43220c2e3d9..4d140bbbe100 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -750,9 +750,10 @@ void intel_idle_state_table_update(void)
750 if (package_num + 1 > num_sockets) { 750 if (package_num + 1 > num_sockets) {
751 num_sockets = package_num + 1; 751 num_sockets = package_num + 1;
752 752
753 if (num_sockets > 4) 753 if (num_sockets > 4) {
754 cpuidle_state_table = ivt_cstates_8s; 754 cpuidle_state_table = ivt_cstates_8s;
755 return; 755 return;
756 }
756 } 757 }
757 } 758 }
758 759
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index d86196cfe4b4..24c28e3f93a3 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -106,7 +106,7 @@ config AT91_ADC
106 Say yes here to build support for Atmel AT91 ADC. 106 Say yes here to build support for Atmel AT91 ADC.
107 107
108config EXYNOS_ADC 108config EXYNOS_ADC
109 bool "Exynos ADC driver support" 109 tristate "Exynos ADC driver support"
110 depends on OF 110 depends on OF
111 help 111 help
112 Core support for the ADC block found in the Samsung EXYNOS series 112 Core support for the ADC block found in the Samsung EXYNOS series
@@ -114,7 +114,7 @@ config EXYNOS_ADC
114 this resource. 114 this resource.
115 115
116config LP8788_ADC 116config LP8788_ADC
117 bool "LP8788 ADC driver" 117 tristate "LP8788 ADC driver"
118 depends on MFD_LP8788 118 depends on MFD_LP8788
119 help 119 help
120 Say yes here to build support for TI LP8788 ADC. 120 Say yes here to build support for TI LP8788 ADC.
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 5b1aa027c034..89777ed9abd8 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -765,14 +765,17 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
765 if (!pdata) 765 if (!pdata)
766 return -EINVAL; 766 return -EINVAL;
767 767
768 st->caps = (struct at91_adc_caps *)
769 platform_get_device_id(pdev)->driver_data;
770
768 st->use_external = pdata->use_external_triggers; 771 st->use_external = pdata->use_external_triggers;
769 st->vref_mv = pdata->vref; 772 st->vref_mv = pdata->vref;
770 st->channels_mask = pdata->channels_used; 773 st->channels_mask = pdata->channels_used;
771 st->num_channels = pdata->num_channels; 774 st->num_channels = st->caps->num_channels;
772 st->startup_time = pdata->startup_time; 775 st->startup_time = pdata->startup_time;
773 st->trigger_number = pdata->trigger_number; 776 st->trigger_number = pdata->trigger_number;
774 st->trigger_list = pdata->trigger_list; 777 st->trigger_list = pdata->trigger_list;
775 st->registers = pdata->registers; 778 st->registers = &st->caps->registers;
776 779
777 return 0; 780 return 0;
778} 781}
@@ -1004,8 +1007,11 @@ static int at91_adc_probe(struct platform_device *pdev)
1004 * the best converted final value between two channels selection 1007 * the best converted final value between two channels selection
1005 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock 1008 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1006 */ 1009 */
1007 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1010 if (st->sample_hold_time > 0)
1008 1000) - 1, 1); 1011 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
1012 - 1, 1);
1013 else
1014 shtim = 0;
1009 1015
1010 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask; 1016 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1011 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask; 1017 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
@@ -1101,7 +1107,6 @@ static int at91_adc_remove(struct platform_device *pdev)
1101 return 0; 1107 return 0;
1102} 1108}
1103 1109
1104#ifdef CONFIG_OF
1105static struct at91_adc_caps at91sam9260_caps = { 1110static struct at91_adc_caps at91sam9260_caps = {
1106 .calc_startup_ticks = calc_startup_ticks_9260, 1111 .calc_startup_ticks = calc_startup_ticks_9260,
1107 .num_channels = 4, 1112 .num_channels = 4,
@@ -1154,11 +1159,27 @@ static const struct of_device_id at91_adc_dt_ids[] = {
1154 {}, 1159 {},
1155}; 1160};
1156MODULE_DEVICE_TABLE(of, at91_adc_dt_ids); 1161MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1157#endif 1162
1163static const struct platform_device_id at91_adc_ids[] = {
1164 {
1165 .name = "at91sam9260-adc",
1166 .driver_data = (unsigned long)&at91sam9260_caps,
1167 }, {
1168 .name = "at91sam9g45-adc",
1169 .driver_data = (unsigned long)&at91sam9g45_caps,
1170 }, {
1171 .name = "at91sam9x5-adc",
1172 .driver_data = (unsigned long)&at91sam9x5_caps,
1173 }, {
1174 /* terminator */
1175 }
1176};
1177MODULE_DEVICE_TABLE(platform, at91_adc_ids);
1158 1178
1159static struct platform_driver at91_adc_driver = { 1179static struct platform_driver at91_adc_driver = {
1160 .probe = at91_adc_probe, 1180 .probe = at91_adc_probe,
1161 .remove = at91_adc_remove, 1181 .remove = at91_adc_remove,
1182 .id_table = at91_adc_ids,
1162 .driver = { 1183 .driver = {
1163 .name = DRIVER_NAME, 1184 .name = DRIVER_NAME,
1164 .of_match_table = of_match_ptr(at91_adc_dt_ids), 1185 .of_match_table = of_match_ptr(at91_adc_dt_ids),
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index d25b262193a7..affa93f51789 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -344,7 +344,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
344 344
345 exynos_adc_hw_init(info); 345 exynos_adc_hw_init(info);
346 346
347 ret = of_platform_populate(np, exynos_adc_match, NULL, &pdev->dev); 347 ret = of_platform_populate(np, exynos_adc_match, NULL, &indio_dev->dev);
348 if (ret < 0) { 348 if (ret < 0) {
349 dev_err(&pdev->dev, "failed adding child nodes\n"); 349 dev_err(&pdev->dev, "failed adding child nodes\n");
350 goto err_of_populate; 350 goto err_of_populate;
@@ -353,7 +353,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
353 return 0; 353 return 0;
354 354
355err_of_populate: 355err_of_populate:
356 device_for_each_child(&pdev->dev, NULL, 356 device_for_each_child(&indio_dev->dev, NULL,
357 exynos_adc_remove_devices); 357 exynos_adc_remove_devices);
358 regulator_disable(info->vdd); 358 regulator_disable(info->vdd);
359 clk_disable_unprepare(info->clk); 359 clk_disable_unprepare(info->clk);
@@ -369,7 +369,7 @@ static int exynos_adc_remove(struct platform_device *pdev)
369 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 369 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
370 struct exynos_adc *info = iio_priv(indio_dev); 370 struct exynos_adc *info = iio_priv(indio_dev);
371 371
372 device_for_each_child(&pdev->dev, NULL, 372 device_for_each_child(&indio_dev->dev, NULL,
373 exynos_adc_remove_devices); 373 exynos_adc_remove_devices);
374 regulator_disable(info->vdd); 374 regulator_disable(info->vdd);
375 clk_disable_unprepare(info->clk); 375 clk_disable_unprepare(info->clk);
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
index cb9f96b446a5..d8ad606c7cd0 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
@@ -660,6 +660,7 @@ static int inv_mpu_probe(struct i2c_client *client,
660{ 660{
661 struct inv_mpu6050_state *st; 661 struct inv_mpu6050_state *st;
662 struct iio_dev *indio_dev; 662 struct iio_dev *indio_dev;
663 struct inv_mpu6050_platform_data *pdata;
663 int result; 664 int result;
664 665
665 if (!i2c_check_functionality(client->adapter, 666 if (!i2c_check_functionality(client->adapter,
@@ -672,8 +673,10 @@ static int inv_mpu_probe(struct i2c_client *client,
672 673
673 st = iio_priv(indio_dev); 674 st = iio_priv(indio_dev);
674 st->client = client; 675 st->client = client;
675 st->plat_data = *(struct inv_mpu6050_platform_data 676 pdata = (struct inv_mpu6050_platform_data
676 *)dev_get_platdata(&client->dev); 677 *)dev_get_platdata(&client->dev);
678 if (pdata)
679 st->plat_data = *pdata;
677 /* power is turned on inside check chip type*/ 680 /* power is turned on inside check chip type*/
678 result = inv_check_and_setup_chip(st, id); 681 result = inv_check_and_setup_chip(st, id);
679 if (result) 682 if (result)
diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c
index e108f2a9d827..e472cff6eeae 100644
--- a/drivers/iio/industrialio-buffer.c
+++ b/drivers/iio/industrialio-buffer.c
@@ -165,7 +165,8 @@ static ssize_t iio_scan_el_show(struct device *dev,
165 int ret; 165 int ret;
166 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 166 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
167 167
168 ret = test_bit(to_iio_dev_attr(attr)->address, 168 /* Ensure ret is 0 or 1. */
169 ret = !!test_bit(to_iio_dev_attr(attr)->address,
169 indio_dev->buffer->scan_mask); 170 indio_dev->buffer->scan_mask);
170 171
171 return sprintf(buf, "%d\n", ret); 172 return sprintf(buf, "%d\n", ret);
@@ -862,7 +863,8 @@ int iio_scan_mask_query(struct iio_dev *indio_dev,
862 if (!buffer->scan_mask) 863 if (!buffer->scan_mask)
863 return 0; 864 return 0;
864 865
865 return test_bit(bit, buffer->scan_mask); 866 /* Ensure return value is 0 or 1. */
867 return !!test_bit(bit, buffer->scan_mask);
866}; 868};
867EXPORT_SYMBOL_GPL(iio_scan_mask_query); 869EXPORT_SYMBOL_GPL(iio_scan_mask_query);
868 870
diff --git a/drivers/iio/light/cm32181.c b/drivers/iio/light/cm32181.c
index 47a6dbac2d0c..d976e6ce60db 100644
--- a/drivers/iio/light/cm32181.c
+++ b/drivers/iio/light/cm32181.c
@@ -221,6 +221,7 @@ static int cm32181_read_raw(struct iio_dev *indio_dev,
221 *val = cm32181->calibscale; 221 *val = cm32181->calibscale;
222 return IIO_VAL_INT; 222 return IIO_VAL_INT;
223 case IIO_CHAN_INFO_INT_TIME: 223 case IIO_CHAN_INFO_INT_TIME:
224 *val = 0;
224 ret = cm32181_read_als_it(cm32181, val2); 225 ret = cm32181_read_als_it(cm32181, val2);
225 return ret; 226 return ret;
226 } 227 }
diff --git a/drivers/iio/light/cm36651.c b/drivers/iio/light/cm36651.c
index a45e07492db3..39fc67e82138 100644
--- a/drivers/iio/light/cm36651.c
+++ b/drivers/iio/light/cm36651.c
@@ -652,7 +652,19 @@ static int cm36651_probe(struct i2c_client *client,
652 cm36651->client = client; 652 cm36651->client = client;
653 cm36651->ps_client = i2c_new_dummy(client->adapter, 653 cm36651->ps_client = i2c_new_dummy(client->adapter,
654 CM36651_I2C_ADDR_PS); 654 CM36651_I2C_ADDR_PS);
655 if (!cm36651->ps_client) {
656 dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
657 ret = -ENODEV;
658 goto error_disable_reg;
659 }
660
655 cm36651->ara_client = i2c_new_dummy(client->adapter, CM36651_ARA); 661 cm36651->ara_client = i2c_new_dummy(client->adapter, CM36651_ARA);
662 if (!cm36651->ara_client) {
663 dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
664 ret = -ENODEV;
665 goto error_i2c_unregister_ps;
666 }
667
656 mutex_init(&cm36651->lock); 668 mutex_init(&cm36651->lock);
657 indio_dev->dev.parent = &client->dev; 669 indio_dev->dev.parent = &client->dev;
658 indio_dev->channels = cm36651_channels; 670 indio_dev->channels = cm36651_channels;
@@ -664,7 +676,7 @@ static int cm36651_probe(struct i2c_client *client,
664 ret = cm36651_setup_reg(cm36651); 676 ret = cm36651_setup_reg(cm36651);
665 if (ret) { 677 if (ret) {
666 dev_err(&client->dev, "%s: register setup failed\n", __func__); 678 dev_err(&client->dev, "%s: register setup failed\n", __func__);
667 goto error_disable_reg; 679 goto error_i2c_unregister_ara;
668 } 680 }
669 681
670 ret = request_threaded_irq(client->irq, NULL, cm36651_irq_handler, 682 ret = request_threaded_irq(client->irq, NULL, cm36651_irq_handler,
@@ -672,7 +684,7 @@ static int cm36651_probe(struct i2c_client *client,
672 "cm36651", indio_dev); 684 "cm36651", indio_dev);
673 if (ret) { 685 if (ret) {
674 dev_err(&client->dev, "%s: request irq failed\n", __func__); 686 dev_err(&client->dev, "%s: request irq failed\n", __func__);
675 goto error_disable_reg; 687 goto error_i2c_unregister_ara;
676 } 688 }
677 689
678 ret = iio_device_register(indio_dev); 690 ret = iio_device_register(indio_dev);
@@ -685,6 +697,10 @@ static int cm36651_probe(struct i2c_client *client,
685 697
686error_free_irq: 698error_free_irq:
687 free_irq(client->irq, indio_dev); 699 free_irq(client->irq, indio_dev);
700error_i2c_unregister_ara:
701 i2c_unregister_device(cm36651->ara_client);
702error_i2c_unregister_ps:
703 i2c_unregister_device(cm36651->ps_client);
688error_disable_reg: 704error_disable_reg:
689 regulator_disable(cm36651->vled_reg); 705 regulator_disable(cm36651->vled_reg);
690 return ret; 706 return ret;
@@ -698,6 +714,8 @@ static int cm36651_remove(struct i2c_client *client)
698 iio_device_unregister(indio_dev); 714 iio_device_unregister(indio_dev);
699 regulator_disable(cm36651->vled_reg); 715 regulator_disable(cm36651->vled_reg);
700 free_irq(client->irq, indio_dev); 716 free_irq(client->irq, indio_dev);
717 i2c_unregister_device(cm36651->ps_client);
718 i2c_unregister_device(cm36651->ara_client);
701 719
702 return 0; 720 return 0;
703} 721}
diff --git a/drivers/infiniband/hw/cxgb4/Kconfig b/drivers/infiniband/hw/cxgb4/Kconfig
index d4e8983fba53..23f38cf2c5cd 100644
--- a/drivers/infiniband/hw/cxgb4/Kconfig
+++ b/drivers/infiniband/hw/cxgb4/Kconfig
@@ -1,10 +1,10 @@
1config INFINIBAND_CXGB4 1config INFINIBAND_CXGB4
2 tristate "Chelsio T4 RDMA Driver" 2 tristate "Chelsio T4/T5 RDMA Driver"
3 depends on CHELSIO_T4 && INET && (IPV6 || IPV6=n) 3 depends on CHELSIO_T4 && INET && (IPV6 || IPV6=n)
4 select GENERIC_ALLOCATOR 4 select GENERIC_ALLOCATOR
5 ---help--- 5 ---help---
6 This is an iWARP/RDMA driver for the Chelsio T4 1GbE and 6 This is an iWARP/RDMA driver for the Chelsio T4 and T5
7 10GbE adapters. 7 1GbE, 10GbE adapters and T5 40GbE adapter.
8 8
9 For general information about Chelsio and our products, visit 9 For general information about Chelsio and our products, visit
10 our website at <http://www.chelsio.com>. 10 our website at <http://www.chelsio.com>.
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 02436d5d0dab..1f863a96a480 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -173,12 +173,15 @@ static void start_ep_timer(struct c4iw_ep *ep)
173 add_timer(&ep->timer); 173 add_timer(&ep->timer);
174} 174}
175 175
176static void stop_ep_timer(struct c4iw_ep *ep) 176static int stop_ep_timer(struct c4iw_ep *ep)
177{ 177{
178 PDBG("%s ep %p stopping\n", __func__, ep); 178 PDBG("%s ep %p stopping\n", __func__, ep);
179 del_timer_sync(&ep->timer); 179 del_timer_sync(&ep->timer);
180 if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) 180 if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) {
181 c4iw_put_ep(&ep->com); 181 c4iw_put_ep(&ep->com);
182 return 0;
183 }
184 return 1;
182} 185}
183 186
184static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb, 187static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb,
@@ -584,6 +587,10 @@ static int send_connect(struct c4iw_ep *ep)
584 opt2 |= SACK_EN(1); 587 opt2 |= SACK_EN(1);
585 if (wscale && enable_tcp_window_scaling) 588 if (wscale && enable_tcp_window_scaling)
586 opt2 |= WND_SCALE_EN(1); 589 opt2 |= WND_SCALE_EN(1);
590 if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
591 opt2 |= T5_OPT_2_VALID;
592 opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE);
593 }
587 t4_set_arp_err_handler(skb, NULL, act_open_req_arp_failure); 594 t4_set_arp_err_handler(skb, NULL, act_open_req_arp_failure);
588 595
589 if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) { 596 if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) {
@@ -993,7 +1000,7 @@ static void close_complete_upcall(struct c4iw_ep *ep, int status)
993static int abort_connection(struct c4iw_ep *ep, struct sk_buff *skb, gfp_t gfp) 1000static int abort_connection(struct c4iw_ep *ep, struct sk_buff *skb, gfp_t gfp)
994{ 1001{
995 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1002 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
996 state_set(&ep->com, ABORTING); 1003 __state_set(&ep->com, ABORTING);
997 set_bit(ABORT_CONN, &ep->com.history); 1004 set_bit(ABORT_CONN, &ep->com.history);
998 return send_abort(ep, skb, gfp); 1005 return send_abort(ep, skb, gfp);
999} 1006}
@@ -1151,7 +1158,7 @@ static int update_rx_credits(struct c4iw_ep *ep, u32 credits)
1151 return credits; 1158 return credits;
1152} 1159}
1153 1160
1154static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) 1161static int process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1155{ 1162{
1156 struct mpa_message *mpa; 1163 struct mpa_message *mpa;
1157 struct mpa_v2_conn_params *mpa_v2_params; 1164 struct mpa_v2_conn_params *mpa_v2_params;
@@ -1161,17 +1168,17 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1161 struct c4iw_qp_attributes attrs; 1168 struct c4iw_qp_attributes attrs;
1162 enum c4iw_qp_attr_mask mask; 1169 enum c4iw_qp_attr_mask mask;
1163 int err; 1170 int err;
1171 int disconnect = 0;
1164 1172
1165 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1173 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
1166 1174
1167 /* 1175 /*
1168 * Stop mpa timer. If it expired, then the state has 1176 * Stop mpa timer. If it expired, then
1169 * changed and we bail since ep_timeout already aborted 1177 * we ignore the MPA reply. process_timeout()
1170 * the connection. 1178 * will abort the connection.
1171 */ 1179 */
1172 stop_ep_timer(ep); 1180 if (stop_ep_timer(ep))
1173 if (ep->com.state != MPA_REQ_SENT) 1181 return 0;
1174 return;
1175 1182
1176 /* 1183 /*
1177 * If we get more than the supported amount of private data 1184 * If we get more than the supported amount of private data
@@ -1193,7 +1200,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1193 * if we don't even have the mpa message, then bail. 1200 * if we don't even have the mpa message, then bail.
1194 */ 1201 */
1195 if (ep->mpa_pkt_len < sizeof(*mpa)) 1202 if (ep->mpa_pkt_len < sizeof(*mpa))
1196 return; 1203 return 0;
1197 mpa = (struct mpa_message *) ep->mpa_pkt; 1204 mpa = (struct mpa_message *) ep->mpa_pkt;
1198 1205
1199 /* Validate MPA header. */ 1206 /* Validate MPA header. */
@@ -1233,7 +1240,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1233 * We'll continue process when more data arrives. 1240 * We'll continue process when more data arrives.
1234 */ 1241 */
1235 if (ep->mpa_pkt_len < (sizeof(*mpa) + plen)) 1242 if (ep->mpa_pkt_len < (sizeof(*mpa) + plen))
1236 return; 1243 return 0;
1237 1244
1238 if (mpa->flags & MPA_REJECT) { 1245 if (mpa->flags & MPA_REJECT) {
1239 err = -ECONNREFUSED; 1246 err = -ECONNREFUSED;
@@ -1335,9 +1342,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1335 attrs.layer_etype = LAYER_MPA | DDP_LLP; 1342 attrs.layer_etype = LAYER_MPA | DDP_LLP;
1336 attrs.ecode = MPA_NOMATCH_RTR; 1343 attrs.ecode = MPA_NOMATCH_RTR;
1337 attrs.next_state = C4IW_QP_STATE_TERMINATE; 1344 attrs.next_state = C4IW_QP_STATE_TERMINATE;
1345 attrs.send_term = 1;
1338 err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 1346 err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
1339 C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 1347 C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
1340 err = -ENOMEM; 1348 err = -ENOMEM;
1349 disconnect = 1;
1341 goto out; 1350 goto out;
1342 } 1351 }
1343 1352
@@ -1353,9 +1362,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
1353 attrs.layer_etype = LAYER_MPA | DDP_LLP; 1362 attrs.layer_etype = LAYER_MPA | DDP_LLP;
1354 attrs.ecode = MPA_INSUFF_IRD; 1363 attrs.ecode = MPA_INSUFF_IRD;
1355 attrs.next_state = C4IW_QP_STATE_TERMINATE; 1364 attrs.next_state = C4IW_QP_STATE_TERMINATE;
1365 attrs.send_term = 1;
1356 err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 1366 err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
1357 C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 1367 C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
1358 err = -ENOMEM; 1368 err = -ENOMEM;
1369 disconnect = 1;
1359 goto out; 1370 goto out;
1360 } 1371 }
1361 goto out; 1372 goto out;
@@ -1364,7 +1375,7 @@ err:
1364 send_abort(ep, skb, GFP_KERNEL); 1375 send_abort(ep, skb, GFP_KERNEL);
1365out: 1376out:
1366 connect_reply_upcall(ep, err); 1377 connect_reply_upcall(ep, err);
1367 return; 1378 return disconnect;
1368} 1379}
1369 1380
1370static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb) 1381static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
@@ -1375,15 +1386,12 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
1375 1386
1376 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 1387 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
1377 1388
1378 if (ep->com.state != MPA_REQ_WAIT)
1379 return;
1380
1381 /* 1389 /*
1382 * If we get more than the supported amount of private data 1390 * If we get more than the supported amount of private data
1383 * then we must fail this connection. 1391 * then we must fail this connection.
1384 */ 1392 */
1385 if (ep->mpa_pkt_len + skb->len > sizeof(ep->mpa_pkt)) { 1393 if (ep->mpa_pkt_len + skb->len > sizeof(ep->mpa_pkt)) {
1386 stop_ep_timer(ep); 1394 (void)stop_ep_timer(ep);
1387 abort_connection(ep, skb, GFP_KERNEL); 1395 abort_connection(ep, skb, GFP_KERNEL);
1388 return; 1396 return;
1389 } 1397 }
@@ -1413,13 +1421,13 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
1413 if (mpa->revision > mpa_rev) { 1421 if (mpa->revision > mpa_rev) {
1414 printk(KERN_ERR MOD "%s MPA version mismatch. Local = %d," 1422 printk(KERN_ERR MOD "%s MPA version mismatch. Local = %d,"
1415 " Received = %d\n", __func__, mpa_rev, mpa->revision); 1423 " Received = %d\n", __func__, mpa_rev, mpa->revision);
1416 stop_ep_timer(ep); 1424 (void)stop_ep_timer(ep);
1417 abort_connection(ep, skb, GFP_KERNEL); 1425 abort_connection(ep, skb, GFP_KERNEL);
1418 return; 1426 return;
1419 } 1427 }
1420 1428
1421 if (memcmp(mpa->key, MPA_KEY_REQ, sizeof(mpa->key))) { 1429 if (memcmp(mpa->key, MPA_KEY_REQ, sizeof(mpa->key))) {
1422 stop_ep_timer(ep); 1430 (void)stop_ep_timer(ep);
1423 abort_connection(ep, skb, GFP_KERNEL); 1431 abort_connection(ep, skb, GFP_KERNEL);
1424 return; 1432 return;
1425 } 1433 }
@@ -1430,7 +1438,7 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
1430 * Fail if there's too much private data. 1438 * Fail if there's too much private data.
1431 */ 1439 */
1432 if (plen > MPA_MAX_PRIVATE_DATA) { 1440 if (plen > MPA_MAX_PRIVATE_DATA) {
1433 stop_ep_timer(ep); 1441 (void)stop_ep_timer(ep);
1434 abort_connection(ep, skb, GFP_KERNEL); 1442 abort_connection(ep, skb, GFP_KERNEL);
1435 return; 1443 return;
1436 } 1444 }
@@ -1439,7 +1447,7 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
1439 * If plen does not account for pkt size 1447 * If plen does not account for pkt size
1440 */ 1448 */
1441 if (ep->mpa_pkt_len > (sizeof(*mpa) + plen)) { 1449 if (ep->mpa_pkt_len > (sizeof(*mpa) + plen)) {
1442 stop_ep_timer(ep); 1450 (void)stop_ep_timer(ep);
1443 abort_connection(ep, skb, GFP_KERNEL); 1451 abort_connection(ep, skb, GFP_KERNEL);
1444 return; 1452 return;
1445 } 1453 }
@@ -1496,18 +1504,24 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
1496 ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version, 1504 ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version,
1497 ep->mpa_attr.p2p_type); 1505 ep->mpa_attr.p2p_type);
1498 1506
1499 __state_set(&ep->com, MPA_REQ_RCVD); 1507 /*
1500 stop_ep_timer(ep); 1508 * If the endpoint timer already expired, then we ignore
1501 1509 * the start request. process_timeout() will abort
1502 /* drive upcall */ 1510 * the connection.
1503 mutex_lock(&ep->parent_ep->com.mutex); 1511 */
1504 if (ep->parent_ep->com.state != DEAD) { 1512 if (!stop_ep_timer(ep)) {
1505 if (connect_request_upcall(ep)) 1513 __state_set(&ep->com, MPA_REQ_RCVD);
1514
1515 /* drive upcall */
1516 mutex_lock(&ep->parent_ep->com.mutex);
1517 if (ep->parent_ep->com.state != DEAD) {
1518 if (connect_request_upcall(ep))
1519 abort_connection(ep, skb, GFP_KERNEL);
1520 } else {
1506 abort_connection(ep, skb, GFP_KERNEL); 1521 abort_connection(ep, skb, GFP_KERNEL);
1507 } else { 1522 }
1508 abort_connection(ep, skb, GFP_KERNEL); 1523 mutex_unlock(&ep->parent_ep->com.mutex);
1509 } 1524 }
1510 mutex_unlock(&ep->parent_ep->com.mutex);
1511 return; 1525 return;
1512} 1526}
1513 1527
@@ -1519,6 +1533,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
1519 unsigned int tid = GET_TID(hdr); 1533 unsigned int tid = GET_TID(hdr);
1520 struct tid_info *t = dev->rdev.lldi.tids; 1534 struct tid_info *t = dev->rdev.lldi.tids;
1521 __u8 status = hdr->status; 1535 __u8 status = hdr->status;
1536 int disconnect = 0;
1522 1537
1523 ep = lookup_tid(t, tid); 1538 ep = lookup_tid(t, tid);
1524 if (!ep) 1539 if (!ep)
@@ -1534,7 +1549,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
1534 switch (ep->com.state) { 1549 switch (ep->com.state) {
1535 case MPA_REQ_SENT: 1550 case MPA_REQ_SENT:
1536 ep->rcv_seq += dlen; 1551 ep->rcv_seq += dlen;
1537 process_mpa_reply(ep, skb); 1552 disconnect = process_mpa_reply(ep, skb);
1538 break; 1553 break;
1539 case MPA_REQ_WAIT: 1554 case MPA_REQ_WAIT:
1540 ep->rcv_seq += dlen; 1555 ep->rcv_seq += dlen;
@@ -1550,13 +1565,16 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
1550 ep->com.state, ep->hwtid, status); 1565 ep->com.state, ep->hwtid, status);
1551 attrs.next_state = C4IW_QP_STATE_TERMINATE; 1566 attrs.next_state = C4IW_QP_STATE_TERMINATE;
1552 c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 1567 c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
1553 C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 1568 C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
1569 disconnect = 1;
1554 break; 1570 break;
1555 } 1571 }
1556 default: 1572 default:
1557 break; 1573 break;
1558 } 1574 }
1559 mutex_unlock(&ep->com.mutex); 1575 mutex_unlock(&ep->com.mutex);
1576 if (disconnect)
1577 c4iw_ep_disconnect(ep, 0, GFP_KERNEL);
1560 return 0; 1578 return 0;
1561} 1579}
1562 1580
@@ -2004,6 +2022,10 @@ static void accept_cr(struct c4iw_ep *ep, struct sk_buff *skb,
2004 if (tcph->ece && tcph->cwr) 2022 if (tcph->ece && tcph->cwr)
2005 opt2 |= CCTRL_ECN(1); 2023 opt2 |= CCTRL_ECN(1);
2006 } 2024 }
2025 if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
2026 opt2 |= T5_OPT_2_VALID;
2027 opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE);
2028 }
2007 2029
2008 rpl = cplhdr(skb); 2030 rpl = cplhdr(skb);
2009 INIT_TP_WR(rpl, ep->hwtid); 2031 INIT_TP_WR(rpl, ep->hwtid);
@@ -2265,7 +2287,7 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb)
2265 disconnect = 0; 2287 disconnect = 0;
2266 break; 2288 break;
2267 case MORIBUND: 2289 case MORIBUND:
2268 stop_ep_timer(ep); 2290 (void)stop_ep_timer(ep);
2269 if (ep->com.cm_id && ep->com.qp) { 2291 if (ep->com.cm_id && ep->com.qp) {
2270 attrs.next_state = C4IW_QP_STATE_IDLE; 2292 attrs.next_state = C4IW_QP_STATE_IDLE;
2271 c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 2293 c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
@@ -2325,10 +2347,10 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb)
2325 case CONNECTING: 2347 case CONNECTING:
2326 break; 2348 break;
2327 case MPA_REQ_WAIT: 2349 case MPA_REQ_WAIT:
2328 stop_ep_timer(ep); 2350 (void)stop_ep_timer(ep);
2329 break; 2351 break;
2330 case MPA_REQ_SENT: 2352 case MPA_REQ_SENT:
2331 stop_ep_timer(ep); 2353 (void)stop_ep_timer(ep);
2332 if (mpa_rev == 1 || (mpa_rev == 2 && ep->tried_with_mpa_v1)) 2354 if (mpa_rev == 1 || (mpa_rev == 2 && ep->tried_with_mpa_v1))
2333 connect_reply_upcall(ep, -ECONNRESET); 2355 connect_reply_upcall(ep, -ECONNRESET);
2334 else { 2356 else {
@@ -2433,7 +2455,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb)
2433 __state_set(&ep->com, MORIBUND); 2455 __state_set(&ep->com, MORIBUND);
2434 break; 2456 break;
2435 case MORIBUND: 2457 case MORIBUND:
2436 stop_ep_timer(ep); 2458 (void)stop_ep_timer(ep);
2437 if ((ep->com.cm_id) && (ep->com.qp)) { 2459 if ((ep->com.cm_id) && (ep->com.qp)) {
2438 attrs.next_state = C4IW_QP_STATE_IDLE; 2460 attrs.next_state = C4IW_QP_STATE_IDLE;
2439 c4iw_modify_qp(ep->com.qp->rhp, 2461 c4iw_modify_qp(ep->com.qp->rhp,
@@ -3028,7 +3050,7 @@ int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp)
3028 if (!test_and_set_bit(CLOSE_SENT, &ep->com.flags)) { 3050 if (!test_and_set_bit(CLOSE_SENT, &ep->com.flags)) {
3029 close = 1; 3051 close = 1;
3030 if (abrupt) { 3052 if (abrupt) {
3031 stop_ep_timer(ep); 3053 (void)stop_ep_timer(ep);
3032 ep->com.state = ABORTING; 3054 ep->com.state = ABORTING;
3033 } else 3055 } else
3034 ep->com.state = MORIBUND; 3056 ep->com.state = MORIBUND;
@@ -3462,14 +3484,24 @@ static void process_timeout(struct c4iw_ep *ep)
3462 __state_set(&ep->com, ABORTING); 3484 __state_set(&ep->com, ABORTING);
3463 close_complete_upcall(ep, -ETIMEDOUT); 3485 close_complete_upcall(ep, -ETIMEDOUT);
3464 break; 3486 break;
3487 case ABORTING:
3488 case DEAD:
3489
3490 /*
3491 * These states are expected if the ep timed out at the same
3492 * time as another thread was calling stop_ep_timer().
3493 * So we silently do nothing for these states.
3494 */
3495 abort = 0;
3496 break;
3465 default: 3497 default:
3466 WARN(1, "%s unexpected state ep %p tid %u state %u\n", 3498 WARN(1, "%s unexpected state ep %p tid %u state %u\n",
3467 __func__, ep, ep->hwtid, ep->com.state); 3499 __func__, ep, ep->hwtid, ep->com.state);
3468 abort = 0; 3500 abort = 0;
3469 } 3501 }
3470 mutex_unlock(&ep->com.mutex);
3471 if (abort) 3502 if (abort)
3472 abort_connection(ep, NULL, GFP_KERNEL); 3503 abort_connection(ep, NULL, GFP_KERNEL);
3504 mutex_unlock(&ep->com.mutex);
3473 c4iw_put_ep(&ep->com); 3505 c4iw_put_ep(&ep->com);
3474} 3506}
3475 3507
@@ -3483,6 +3515,8 @@ static void process_timedout_eps(void)
3483 3515
3484 tmp = timeout_list.next; 3516 tmp = timeout_list.next;
3485 list_del(tmp); 3517 list_del(tmp);
3518 tmp->next = NULL;
3519 tmp->prev = NULL;
3486 spin_unlock_irq(&timeout_lock); 3520 spin_unlock_irq(&timeout_lock);
3487 ep = list_entry(tmp, struct c4iw_ep, entry); 3521 ep = list_entry(tmp, struct c4iw_ep, entry);
3488 process_timeout(ep); 3522 process_timeout(ep);
@@ -3499,6 +3533,7 @@ static void process_work(struct work_struct *work)
3499 unsigned int opcode; 3533 unsigned int opcode;
3500 int ret; 3534 int ret;
3501 3535
3536 process_timedout_eps();
3502 while ((skb = skb_dequeue(&rxq))) { 3537 while ((skb = skb_dequeue(&rxq))) {
3503 rpl = cplhdr(skb); 3538 rpl = cplhdr(skb);
3504 dev = *((struct c4iw_dev **) (skb->cb + sizeof(void *))); 3539 dev = *((struct c4iw_dev **) (skb->cb + sizeof(void *)));
@@ -3508,8 +3543,8 @@ static void process_work(struct work_struct *work)
3508 ret = work_handlers[opcode](dev, skb); 3543 ret = work_handlers[opcode](dev, skb);
3509 if (!ret) 3544 if (!ret)
3510 kfree_skb(skb); 3545 kfree_skb(skb);
3546 process_timedout_eps();
3511 } 3547 }
3512 process_timedout_eps();
3513} 3548}
3514 3549
3515static DECLARE_WORK(skb_work, process_work); 3550static DECLARE_WORK(skb_work, process_work);
@@ -3521,8 +3556,13 @@ static void ep_timeout(unsigned long arg)
3521 3556
3522 spin_lock(&timeout_lock); 3557 spin_lock(&timeout_lock);
3523 if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) { 3558 if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) {
3524 list_add_tail(&ep->entry, &timeout_list); 3559 /*
3525 kickit = 1; 3560 * Only insert if it is not already on the list.
3561 */
3562 if (!ep->entry.next) {
3563 list_add_tail(&ep->entry, &timeout_list);
3564 kickit = 1;
3565 }
3526 } 3566 }
3527 spin_unlock(&timeout_lock); 3567 spin_unlock(&timeout_lock);
3528 if (kickit) 3568 if (kickit)
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c
index ce468e542428..cfaa56ada189 100644
--- a/drivers/infiniband/hw/cxgb4/cq.c
+++ b/drivers/infiniband/hw/cxgb4/cq.c
@@ -235,27 +235,21 @@ int c4iw_flush_sq(struct c4iw_qp *qhp)
235 struct t4_cq *cq = &chp->cq; 235 struct t4_cq *cq = &chp->cq;
236 int idx; 236 int idx;
237 struct t4_swsqe *swsqe; 237 struct t4_swsqe *swsqe;
238 int error = (qhp->attr.state != C4IW_QP_STATE_CLOSING &&
239 qhp->attr.state != C4IW_QP_STATE_IDLE);
240 238
241 if (wq->sq.flush_cidx == -1) 239 if (wq->sq.flush_cidx == -1)
242 wq->sq.flush_cidx = wq->sq.cidx; 240 wq->sq.flush_cidx = wq->sq.cidx;
243 idx = wq->sq.flush_cidx; 241 idx = wq->sq.flush_cidx;
244 BUG_ON(idx >= wq->sq.size); 242 BUG_ON(idx >= wq->sq.size);
245 while (idx != wq->sq.pidx) { 243 while (idx != wq->sq.pidx) {
246 if (error) { 244 swsqe = &wq->sq.sw_sq[idx];
247 swsqe = &wq->sq.sw_sq[idx]; 245 BUG_ON(swsqe->flushed);
248 BUG_ON(swsqe->flushed); 246 swsqe->flushed = 1;
249 swsqe->flushed = 1; 247 insert_sq_cqe(wq, cq, swsqe);
250 insert_sq_cqe(wq, cq, swsqe); 248 if (wq->sq.oldest_read == swsqe) {
251 if (wq->sq.oldest_read == swsqe) { 249 BUG_ON(swsqe->opcode != FW_RI_READ_REQ);
252 BUG_ON(swsqe->opcode != FW_RI_READ_REQ); 250 advance_oldest_read(wq);
253 advance_oldest_read(wq);
254 }
255 flushed++;
256 } else {
257 t4_sq_consume(wq);
258 } 251 }
252 flushed++;
259 if (++idx == wq->sq.size) 253 if (++idx == wq->sq.size)
260 idx = 0; 254 idx = 0;
261 } 255 }
@@ -678,7 +672,7 @@ skip_cqe:
678static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc) 672static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc)
679{ 673{
680 struct c4iw_qp *qhp = NULL; 674 struct c4iw_qp *qhp = NULL;
681 struct t4_cqe cqe = {0, 0}, *rd_cqe; 675 struct t4_cqe uninitialized_var(cqe), *rd_cqe;
682 struct t4_wq *wq; 676 struct t4_wq *wq;
683 u32 credit = 0; 677 u32 credit = 0;
684 u8 cqe_flushed; 678 u8 cqe_flushed;
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c
index 9489a388376c..f4fa50a609e2 100644
--- a/drivers/infiniband/hw/cxgb4/device.c
+++ b/drivers/infiniband/hw/cxgb4/device.c
@@ -682,7 +682,10 @@ static void c4iw_dealloc(struct uld_ctx *ctx)
682 idr_destroy(&ctx->dev->hwtid_idr); 682 idr_destroy(&ctx->dev->hwtid_idr);
683 idr_destroy(&ctx->dev->stid_idr); 683 idr_destroy(&ctx->dev->stid_idr);
684 idr_destroy(&ctx->dev->atid_idr); 684 idr_destroy(&ctx->dev->atid_idr);
685 iounmap(ctx->dev->rdev.oc_mw_kva); 685 if (ctx->dev->rdev.bar2_kva)
686 iounmap(ctx->dev->rdev.bar2_kva);
687 if (ctx->dev->rdev.oc_mw_kva)
688 iounmap(ctx->dev->rdev.oc_mw_kva);
686 ib_dealloc_device(&ctx->dev->ibdev); 689 ib_dealloc_device(&ctx->dev->ibdev);
687 ctx->dev = NULL; 690 ctx->dev = NULL;
688} 691}
@@ -722,11 +725,31 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
722 } 725 }
723 devp->rdev.lldi = *infop; 726 devp->rdev.lldi = *infop;
724 727
725 devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) + 728 /*
726 (pci_resource_len(devp->rdev.lldi.pdev, 2) - 729 * For T5 devices, we map all of BAR2 with WC.
727 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size)); 730 * For T4 devices with onchip qp mem, we map only that part
728 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, 731 * of BAR2 with WC.
729 devp->rdev.lldi.vr->ocq.size); 732 */
733 devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
734 if (is_t5(devp->rdev.lldi.adapter_type)) {
735 devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
736 pci_resource_len(devp->rdev.lldi.pdev, 2));
737 if (!devp->rdev.bar2_kva) {
738 pr_err(MOD "Unable to ioremap BAR2\n");
739 return ERR_PTR(-EINVAL);
740 }
741 } else if (ocqp_supported(infop)) {
742 devp->rdev.oc_mw_pa =
743 pci_resource_start(devp->rdev.lldi.pdev, 2) +
744 pci_resource_len(devp->rdev.lldi.pdev, 2) -
745 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size);
746 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
747 devp->rdev.lldi.vr->ocq.size);
748 if (!devp->rdev.oc_mw_kva) {
749 pr_err(MOD "Unable to ioremap onchip mem\n");
750 return ERR_PTR(-EINVAL);
751 }
752 }
730 753
731 PDBG(KERN_INFO MOD "ocq memory: " 754 PDBG(KERN_INFO MOD "ocq memory: "
732 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", 755 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
@@ -1003,9 +1026,11 @@ static int enable_qp_db(int id, void *p, void *data)
1003static void resume_rc_qp(struct c4iw_qp *qp) 1026static void resume_rc_qp(struct c4iw_qp *qp)
1004{ 1027{
1005 spin_lock(&qp->lock); 1028 spin_lock(&qp->lock);
1006 t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc); 1029 t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc,
1030 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
1007 qp->wq.sq.wq_pidx_inc = 0; 1031 qp->wq.sq.wq_pidx_inc = 0;
1008 t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc); 1032 t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc,
1033 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
1009 qp->wq.rq.wq_pidx_inc = 0; 1034 qp->wq.rq.wq_pidx_inc = 0;
1010 spin_unlock(&qp->lock); 1035 spin_unlock(&qp->lock);
1011} 1036}
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
index e872203c5424..7474b490760a 100644
--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
@@ -149,6 +149,8 @@ struct c4iw_rdev {
149 struct gen_pool *ocqp_pool; 149 struct gen_pool *ocqp_pool;
150 u32 flags; 150 u32 flags;
151 struct cxgb4_lld_info lldi; 151 struct cxgb4_lld_info lldi;
152 unsigned long bar2_pa;
153 void __iomem *bar2_kva;
152 unsigned long oc_mw_pa; 154 unsigned long oc_mw_pa;
153 void __iomem *oc_mw_kva; 155 void __iomem *oc_mw_kva;
154 struct c4iw_stats stats; 156 struct c4iw_stats stats;
@@ -433,6 +435,7 @@ struct c4iw_qp_attributes {
433 u8 ecode; 435 u8 ecode;
434 u16 sq_db_inc; 436 u16 sq_db_inc;
435 u16 rq_db_inc; 437 u16 rq_db_inc;
438 u8 send_term;
436}; 439};
437 440
438struct c4iw_qp { 441struct c4iw_qp {
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index f9ca072a99ed..ec7a2988a703 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -259,8 +259,12 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry,
259 259
260 if ((!reset_tpt_entry) && (*stag == T4_STAG_UNSET)) { 260 if ((!reset_tpt_entry) && (*stag == T4_STAG_UNSET)) {
261 stag_idx = c4iw_get_resource(&rdev->resource.tpt_table); 261 stag_idx = c4iw_get_resource(&rdev->resource.tpt_table);
262 if (!stag_idx) 262 if (!stag_idx) {
263 mutex_lock(&rdev->stats.lock);
264 rdev->stats.stag.fail++;
265 mutex_unlock(&rdev->stats.lock);
263 return -ENOMEM; 266 return -ENOMEM;
267 }
264 mutex_lock(&rdev->stats.lock); 268 mutex_lock(&rdev->stats.lock);
265 rdev->stats.stag.cur += 32; 269 rdev->stats.stag.cur += 32;
266 if (rdev->stats.stag.cur > rdev->stats.stag.max) 270 if (rdev->stats.stag.cur > rdev->stats.stag.max)
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c
index 79429256023a..a94a3e12c349 100644
--- a/drivers/infiniband/hw/cxgb4/provider.c
+++ b/drivers/infiniband/hw/cxgb4/provider.c
@@ -328,7 +328,7 @@ static int c4iw_query_device(struct ib_device *ibdev,
328 props->max_mr = c4iw_num_stags(&dev->rdev); 328 props->max_mr = c4iw_num_stags(&dev->rdev);
329 props->max_pd = T4_MAX_NUM_PD; 329 props->max_pd = T4_MAX_NUM_PD;
330 props->local_ca_ack_delay = 0; 330 props->local_ca_ack_delay = 0;
331 props->max_fast_reg_page_list_len = T4_MAX_FR_DEPTH; 331 props->max_fast_reg_page_list_len = t4_max_fr_depth(use_dsgl);
332 332
333 return 0; 333 return 0;
334} 334}
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c
index cb76eb5eee1f..086f62f5dc9e 100644
--- a/drivers/infiniband/hw/cxgb4/qp.c
+++ b/drivers/infiniband/hw/cxgb4/qp.c
@@ -212,13 +212,23 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
212 212
213 wq->db = rdev->lldi.db_reg; 213 wq->db = rdev->lldi.db_reg;
214 wq->gts = rdev->lldi.gts_reg; 214 wq->gts = rdev->lldi.gts_reg;
215 if (user) { 215 if (user || is_t5(rdev->lldi.adapter_type)) {
216 wq->sq.udb = (u64)pci_resource_start(rdev->lldi.pdev, 2) + 216 u32 off;
217 (wq->sq.qid << rdev->qpshift); 217
218 wq->sq.udb &= PAGE_MASK; 218 off = (wq->sq.qid << rdev->qpshift) & PAGE_MASK;
219 wq->rq.udb = (u64)pci_resource_start(rdev->lldi.pdev, 2) + 219 if (user) {
220 (wq->rq.qid << rdev->qpshift); 220 wq->sq.udb = (u64 __iomem *)(rdev->bar2_pa + off);
221 wq->rq.udb &= PAGE_MASK; 221 } else {
222 off += 128 * (wq->sq.qid & rdev->qpmask) + 8;
223 wq->sq.udb = (u64 __iomem *)(rdev->bar2_kva + off);
224 }
225 off = (wq->rq.qid << rdev->qpshift) & PAGE_MASK;
226 if (user) {
227 wq->rq.udb = (u64 __iomem *)(rdev->bar2_pa + off);
228 } else {
229 off += 128 * (wq->rq.qid & rdev->qpmask) + 8;
230 wq->rq.udb = (u64 __iomem *)(rdev->bar2_kva + off);
231 }
222 } 232 }
223 wq->rdev = rdev; 233 wq->rdev = rdev;
224 wq->rq.msn = 1; 234 wq->rq.msn = 1;
@@ -299,9 +309,10 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
299 if (ret) 309 if (ret)
300 goto free_dma; 310 goto free_dma;
301 311
302 PDBG("%s sqid 0x%x rqid 0x%x kdb 0x%p squdb 0x%llx rqudb 0x%llx\n", 312 PDBG("%s sqid 0x%x rqid 0x%x kdb 0x%p squdb 0x%lx rqudb 0x%lx\n",
303 __func__, wq->sq.qid, wq->rq.qid, wq->db, 313 __func__, wq->sq.qid, wq->rq.qid, wq->db,
304 (unsigned long long)wq->sq.udb, (unsigned long long)wq->rq.udb); 314 (__force unsigned long) wq->sq.udb,
315 (__force unsigned long) wq->rq.udb);
305 316
306 return 0; 317 return 0;
307free_dma: 318free_dma:
@@ -425,6 +436,8 @@ static int build_rdma_send(struct t4_sq *sq, union t4_wr *wqe,
425 default: 436 default:
426 return -EINVAL; 437 return -EINVAL;
427 } 438 }
439 wqe->send.r3 = 0;
440 wqe->send.r4 = 0;
428 441
429 plen = 0; 442 plen = 0;
430 if (wr->num_sge) { 443 if (wr->num_sge) {
@@ -555,7 +568,8 @@ static int build_fastreg(struct t4_sq *sq, union t4_wr *wqe,
555 int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); 568 int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32);
556 int rem; 569 int rem;
557 570
558 if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) 571 if (wr->wr.fast_reg.page_list_len >
572 t4_max_fr_depth(use_dsgl))
559 return -EINVAL; 573 return -EINVAL;
560 574
561 wqe->fr.qpbinde_to_dcacpu = 0; 575 wqe->fr.qpbinde_to_dcacpu = 0;
@@ -650,9 +664,10 @@ static int ring_kernel_sq_db(struct c4iw_qp *qhp, u16 inc)
650 664
651 spin_lock_irqsave(&qhp->rhp->lock, flags); 665 spin_lock_irqsave(&qhp->rhp->lock, flags);
652 spin_lock(&qhp->lock); 666 spin_lock(&qhp->lock);
653 if (qhp->rhp->db_state == NORMAL) { 667 if (qhp->rhp->db_state == NORMAL)
654 t4_ring_sq_db(&qhp->wq, inc); 668 t4_ring_sq_db(&qhp->wq, inc,
655 } else { 669 is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
670 else {
656 add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry); 671 add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
657 qhp->wq.sq.wq_pidx_inc += inc; 672 qhp->wq.sq.wq_pidx_inc += inc;
658 } 673 }
@@ -667,9 +682,10 @@ static int ring_kernel_rq_db(struct c4iw_qp *qhp, u16 inc)
667 682
668 spin_lock_irqsave(&qhp->rhp->lock, flags); 683 spin_lock_irqsave(&qhp->rhp->lock, flags);
669 spin_lock(&qhp->lock); 684 spin_lock(&qhp->lock);
670 if (qhp->rhp->db_state == NORMAL) { 685 if (qhp->rhp->db_state == NORMAL)
671 t4_ring_rq_db(&qhp->wq, inc); 686 t4_ring_rq_db(&qhp->wq, inc,
672 } else { 687 is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
688 else {
673 add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry); 689 add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
674 qhp->wq.rq.wq_pidx_inc += inc; 690 qhp->wq.rq.wq_pidx_inc += inc;
675 } 691 }
@@ -686,7 +702,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
686 enum fw_wr_opcodes fw_opcode = 0; 702 enum fw_wr_opcodes fw_opcode = 0;
687 enum fw_ri_wr_flags fw_flags; 703 enum fw_ri_wr_flags fw_flags;
688 struct c4iw_qp *qhp; 704 struct c4iw_qp *qhp;
689 union t4_wr *wqe; 705 union t4_wr *wqe = NULL;
690 u32 num_wrs; 706 u32 num_wrs;
691 struct t4_swsqe *swsqe; 707 struct t4_swsqe *swsqe;
692 unsigned long flag; 708 unsigned long flag;
@@ -792,7 +808,8 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
792 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); 808 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE);
793 } 809 }
794 if (!qhp->rhp->rdev.status_page->db_off) { 810 if (!qhp->rhp->rdev.status_page->db_off) {
795 t4_ring_sq_db(&qhp->wq, idx); 811 t4_ring_sq_db(&qhp->wq, idx,
812 is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
796 spin_unlock_irqrestore(&qhp->lock, flag); 813 spin_unlock_irqrestore(&qhp->lock, flag);
797 } else { 814 } else {
798 spin_unlock_irqrestore(&qhp->lock, flag); 815 spin_unlock_irqrestore(&qhp->lock, flag);
@@ -806,7 +823,7 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
806{ 823{
807 int err = 0; 824 int err = 0;
808 struct c4iw_qp *qhp; 825 struct c4iw_qp *qhp;
809 union t4_recv_wr *wqe; 826 union t4_recv_wr *wqe = NULL;
810 u32 num_wrs; 827 u32 num_wrs;
811 u8 len16 = 0; 828 u8 len16 = 0;
812 unsigned long flag; 829 unsigned long flag;
@@ -858,7 +875,8 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
858 num_wrs--; 875 num_wrs--;
859 } 876 }
860 if (!qhp->rhp->rdev.status_page->db_off) { 877 if (!qhp->rhp->rdev.status_page->db_off) {
861 t4_ring_rq_db(&qhp->wq, idx); 878 t4_ring_rq_db(&qhp->wq, idx,
879 is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
862 spin_unlock_irqrestore(&qhp->lock, flag); 880 spin_unlock_irqrestore(&qhp->lock, flag);
863 } else { 881 } else {
864 spin_unlock_irqrestore(&qhp->lock, flag); 882 spin_unlock_irqrestore(&qhp->lock, flag);
@@ -1352,6 +1370,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,
1352 switch (attrs->next_state) { 1370 switch (attrs->next_state) {
1353 case C4IW_QP_STATE_CLOSING: 1371 case C4IW_QP_STATE_CLOSING:
1354 BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); 1372 BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2);
1373 t4_set_wq_in_error(&qhp->wq);
1355 set_state(qhp, C4IW_QP_STATE_CLOSING); 1374 set_state(qhp, C4IW_QP_STATE_CLOSING);
1356 ep = qhp->ep; 1375 ep = qhp->ep;
1357 if (!internal) { 1376 if (!internal) {
@@ -1359,30 +1378,30 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,
1359 disconnect = 1; 1378 disconnect = 1;
1360 c4iw_get_ep(&qhp->ep->com); 1379 c4iw_get_ep(&qhp->ep->com);
1361 } 1380 }
1362 t4_set_wq_in_error(&qhp->wq);
1363 ret = rdma_fini(rhp, qhp, ep); 1381 ret = rdma_fini(rhp, qhp, ep);
1364 if (ret) 1382 if (ret)
1365 goto err; 1383 goto err;
1366 break; 1384 break;
1367 case C4IW_QP_STATE_TERMINATE: 1385 case C4IW_QP_STATE_TERMINATE:
1386 t4_set_wq_in_error(&qhp->wq);
1368 set_state(qhp, C4IW_QP_STATE_TERMINATE); 1387 set_state(qhp, C4IW_QP_STATE_TERMINATE);
1369 qhp->attr.layer_etype = attrs->layer_etype; 1388 qhp->attr.layer_etype = attrs->layer_etype;
1370 qhp->attr.ecode = attrs->ecode; 1389 qhp->attr.ecode = attrs->ecode;
1371 t4_set_wq_in_error(&qhp->wq);
1372 ep = qhp->ep; 1390 ep = qhp->ep;
1373 disconnect = 1; 1391 if (!internal) {
1374 if (!internal) 1392 c4iw_get_ep(&qhp->ep->com);
1375 terminate = 1; 1393 terminate = 1;
1376 else { 1394 disconnect = 1;
1395 } else {
1396 terminate = qhp->attr.send_term;
1377 ret = rdma_fini(rhp, qhp, ep); 1397 ret = rdma_fini(rhp, qhp, ep);
1378 if (ret) 1398 if (ret)
1379 goto err; 1399 goto err;
1380 } 1400 }
1381 c4iw_get_ep(&qhp->ep->com);
1382 break; 1401 break;
1383 case C4IW_QP_STATE_ERROR: 1402 case C4IW_QP_STATE_ERROR:
1384 set_state(qhp, C4IW_QP_STATE_ERROR);
1385 t4_set_wq_in_error(&qhp->wq); 1403 t4_set_wq_in_error(&qhp->wq);
1404 set_state(qhp, C4IW_QP_STATE_ERROR);
1386 if (!internal) { 1405 if (!internal) {
1387 abort = 1; 1406 abort = 1;
1388 disconnect = 1; 1407 disconnect = 1;
@@ -1677,11 +1696,11 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs,
1677 mm2->len = PAGE_ALIGN(qhp->wq.rq.memsize); 1696 mm2->len = PAGE_ALIGN(qhp->wq.rq.memsize);
1678 insert_mmap(ucontext, mm2); 1697 insert_mmap(ucontext, mm2);
1679 mm3->key = uresp.sq_db_gts_key; 1698 mm3->key = uresp.sq_db_gts_key;
1680 mm3->addr = qhp->wq.sq.udb; 1699 mm3->addr = (__force unsigned long) qhp->wq.sq.udb;
1681 mm3->len = PAGE_SIZE; 1700 mm3->len = PAGE_SIZE;
1682 insert_mmap(ucontext, mm3); 1701 insert_mmap(ucontext, mm3);
1683 mm4->key = uresp.rq_db_gts_key; 1702 mm4->key = uresp.rq_db_gts_key;
1684 mm4->addr = qhp->wq.rq.udb; 1703 mm4->addr = (__force unsigned long) qhp->wq.rq.udb;
1685 mm4->len = PAGE_SIZE; 1704 mm4->len = PAGE_SIZE;
1686 insert_mmap(ucontext, mm4); 1705 insert_mmap(ucontext, mm4);
1687 if (mm5) { 1706 if (mm5) {
@@ -1758,11 +1777,15 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1758 /* 1777 /*
1759 * Use SQ_PSN and RQ_PSN to pass in IDX_INC values for 1778 * Use SQ_PSN and RQ_PSN to pass in IDX_INC values for
1760 * ringing the queue db when we're in DB_FULL mode. 1779 * ringing the queue db when we're in DB_FULL mode.
1780 * Only allow this on T4 devices.
1761 */ 1781 */
1762 attrs.sq_db_inc = attr->sq_psn; 1782 attrs.sq_db_inc = attr->sq_psn;
1763 attrs.rq_db_inc = attr->rq_psn; 1783 attrs.rq_db_inc = attr->rq_psn;
1764 mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0; 1784 mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0;
1765 mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0; 1785 mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0;
1786 if (is_t5(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) &&
1787 (mask & (C4IW_QP_ATTR_SQ_DB|C4IW_QP_ATTR_RQ_DB)))
1788 return -EINVAL;
1766 1789
1767 return c4iw_modify_qp(rhp, qhp, mask, &attrs, 0); 1790 return c4iw_modify_qp(rhp, qhp, mask, &attrs, 0);
1768} 1791}
diff --git a/drivers/infiniband/hw/cxgb4/resource.c b/drivers/infiniband/hw/cxgb4/resource.c
index cdef4d7fb6d8..67df71a7012e 100644
--- a/drivers/infiniband/hw/cxgb4/resource.c
+++ b/drivers/infiniband/hw/cxgb4/resource.c
@@ -179,8 +179,12 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)
179 kfree(entry); 179 kfree(entry);
180 } else { 180 } else {
181 qid = c4iw_get_resource(&rdev->resource.qid_table); 181 qid = c4iw_get_resource(&rdev->resource.qid_table);
182 if (!qid) 182 if (!qid) {
183 mutex_lock(&rdev->stats.lock);
184 rdev->stats.qid.fail++;
185 mutex_unlock(&rdev->stats.lock);
183 goto out; 186 goto out;
187 }
184 mutex_lock(&rdev->stats.lock); 188 mutex_lock(&rdev->stats.lock);
185 rdev->stats.qid.cur += rdev->qpmask + 1; 189 rdev->stats.qid.cur += rdev->qpmask + 1;
186 mutex_unlock(&rdev->stats.lock); 190 mutex_unlock(&rdev->stats.lock);
@@ -322,8 +326,8 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size)
322 unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); 326 unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6);
323 PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); 327 PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6);
324 if (!addr) 328 if (!addr)
325 printk_ratelimited(KERN_WARNING MOD "%s: Out of RQT memory\n", 329 pr_warn_ratelimited(MOD "%s: Out of RQT memory\n",
326 pci_name(rdev->lldi.pdev)); 330 pci_name(rdev->lldi.pdev));
327 mutex_lock(&rdev->stats.lock); 331 mutex_lock(&rdev->stats.lock);
328 if (addr) { 332 if (addr) {
329 rdev->stats.rqt.cur += roundup(size << 6, 1 << MIN_RQT_SHIFT); 333 rdev->stats.rqt.cur += roundup(size << 6, 1 << MIN_RQT_SHIFT);
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index eeca8b1e6376..2178f3198410 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -84,7 +84,14 @@ struct t4_status_page {
84 sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) 84 sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge))
85#define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ 85#define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \
86 sizeof(struct fw_ri_immd)) & ~31UL) 86 sizeof(struct fw_ri_immd)) & ~31UL)
87#define T4_MAX_FR_DEPTH (1024 / sizeof(u64)) 87#define T4_MAX_FR_IMMD_DEPTH (T4_MAX_FR_IMMD / sizeof(u64))
88#define T4_MAX_FR_DSGL 1024
89#define T4_MAX_FR_DSGL_DEPTH (T4_MAX_FR_DSGL / sizeof(u64))
90
91static inline int t4_max_fr_depth(int use_dsgl)
92{
93 return use_dsgl ? T4_MAX_FR_DSGL_DEPTH : T4_MAX_FR_IMMD_DEPTH;
94}
88 95
89#define T4_RQ_NUM_SLOTS 2 96#define T4_RQ_NUM_SLOTS 2
90#define T4_RQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS) 97#define T4_RQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS)
@@ -292,7 +299,7 @@ struct t4_sq {
292 unsigned long phys_addr; 299 unsigned long phys_addr;
293 struct t4_swsqe *sw_sq; 300 struct t4_swsqe *sw_sq;
294 struct t4_swsqe *oldest_read; 301 struct t4_swsqe *oldest_read;
295 u64 udb; 302 u64 __iomem *udb;
296 size_t memsize; 303 size_t memsize;
297 u32 qid; 304 u32 qid;
298 u16 in_use; 305 u16 in_use;
@@ -314,7 +321,7 @@ struct t4_rq {
314 dma_addr_t dma_addr; 321 dma_addr_t dma_addr;
315 DEFINE_DMA_UNMAP_ADDR(mapping); 322 DEFINE_DMA_UNMAP_ADDR(mapping);
316 struct t4_swrqe *sw_rq; 323 struct t4_swrqe *sw_rq;
317 u64 udb; 324 u64 __iomem *udb;
318 size_t memsize; 325 size_t memsize;
319 u32 qid; 326 u32 qid;
320 u32 msn; 327 u32 msn;
@@ -435,15 +442,67 @@ static inline u16 t4_sq_wq_size(struct t4_wq *wq)
435 return wq->sq.size * T4_SQ_NUM_SLOTS; 442 return wq->sq.size * T4_SQ_NUM_SLOTS;
436} 443}
437 444
438static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc) 445/* This function copies 64 byte coalesced work request to memory
446 * mapped BAR2 space. For coalesced WRs, the SGE fetches data
447 * from the FIFO instead of from Host.
448 */
449static inline void pio_copy(u64 __iomem *dst, u64 *src)
450{
451 int count = 8;
452
453 while (count) {
454 writeq(*src, dst);
455 src++;
456 dst++;
457 count--;
458 }
459}
460
461static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5,
462 union t4_wr *wqe)
439{ 463{
464
465 /* Flush host queue memory writes. */
440 wmb(); 466 wmb();
467 if (t5) {
468 if (inc == 1 && wqe) {
469 PDBG("%s: WC wq->sq.pidx = %d\n",
470 __func__, wq->sq.pidx);
471 pio_copy(wq->sq.udb + 7, (void *)wqe);
472 } else {
473 PDBG("%s: DB wq->sq.pidx = %d\n",
474 __func__, wq->sq.pidx);
475 writel(PIDX_T5(inc), wq->sq.udb);
476 }
477
478 /* Flush user doorbell area writes. */
479 wmb();
480 return;
481 }
441 writel(QID(wq->sq.qid) | PIDX(inc), wq->db); 482 writel(QID(wq->sq.qid) | PIDX(inc), wq->db);
442} 483}
443 484
444static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc) 485static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t5,
486 union t4_recv_wr *wqe)
445{ 487{
488
489 /* Flush host queue memory writes. */
446 wmb(); 490 wmb();
491 if (t5) {
492 if (inc == 1 && wqe) {
493 PDBG("%s: WC wq->rq.pidx = %d\n",
494 __func__, wq->rq.pidx);
495 pio_copy(wq->rq.udb + 7, (void *)wqe);
496 } else {
497 PDBG("%s: DB wq->rq.pidx = %d\n",
498 __func__, wq->rq.pidx);
499 writel(PIDX_T5(inc), wq->rq.udb);
500 }
501
502 /* Flush user doorbell area writes. */
503 wmb();
504 return;
505 }
447 writel(QID(wq->rq.qid) | PIDX(inc), wq->db); 506 writel(QID(wq->rq.qid) | PIDX(inc), wq->db);
448} 507}
449 508
@@ -568,6 +627,9 @@ static inline int t4_next_hw_cqe(struct t4_cq *cq, struct t4_cqe **cqe)
568 printk(KERN_ERR MOD "cq overflow cqid %u\n", cq->cqid); 627 printk(KERN_ERR MOD "cq overflow cqid %u\n", cq->cqid);
569 BUG_ON(1); 628 BUG_ON(1);
570 } else if (t4_valid_cqe(cq, &cq->queue[cq->cidx])) { 629 } else if (t4_valid_cqe(cq, &cq->queue[cq->cidx])) {
630
631 /* Ensure CQE is flushed to memory */
632 rmb();
571 *cqe = &cq->queue[cq->cidx]; 633 *cqe = &cq->queue[cq->cidx];
572 ret = 0; 634 ret = 0;
573 } else 635 } else
diff --git a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
index dc193c292671..6121ca08fe58 100644
--- a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
+++ b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
@@ -836,4 +836,18 @@ struct ulptx_idata {
836#define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE) 836#define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)
837#define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U) 837#define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U)
838 838
839enum { /* TCP congestion control algorithms */
840 CONG_ALG_RENO,
841 CONG_ALG_TAHOE,
842 CONG_ALG_NEWRENO,
843 CONG_ALG_HIGHSPEED
844};
845
846#define S_CONG_CNTRL 14
847#define M_CONG_CNTRL 0x3
848#define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
849#define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL)
850
851#define T5_OPT_2_VALID (1 << 31)
852
839#endif /* _T4FW_RI_API_H_ */ 853#endif /* _T4FW_RI_API_H_ */
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index fa6dc870adae..364d4b6937f5 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -282,6 +282,8 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
282 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 282 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
283 IB_GUARD_T10DIF_CSUM; 283 IB_GUARD_T10DIF_CSUM;
284 } 284 }
285 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
286 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
285 287
286 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 288 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
287 0xffffff; 289 0xffffff;
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index ae788d27b93f..dc930ed21eca 100644
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -807,6 +807,15 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
807 spin_lock_init(&qp->sq.lock); 807 spin_lock_init(&qp->sq.lock);
808 spin_lock_init(&qp->rq.lock); 808 spin_lock_init(&qp->rq.lock);
809 809
810 if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
811 if (!(dev->mdev.caps.flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)) {
812 mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n");
813 return -EINVAL;
814 } else {
815 qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK;
816 }
817 }
818
810 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 819 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
811 qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 820 qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
812 821
@@ -878,6 +887,9 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
878 if (qp->wq_sig) 887 if (qp->wq_sig)
879 in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_ENABLE_SIG); 888 in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_ENABLE_SIG);
880 889
890 if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
891 in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_BLOCK_MCAST);
892
881 if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 893 if (qp->scat_cqe && is_connected(init_attr->qp_type)) {
882 int rcqe_sz; 894 int rcqe_sz;
883 int scqe_sz; 895 int scqe_sz;
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c
index 87897b95666d..ded76c101dde 100644
--- a/drivers/infiniband/hw/mthca/mthca_main.c
+++ b/drivers/infiniband/hw/mthca/mthca_main.c
@@ -858,13 +858,9 @@ static int mthca_enable_msi_x(struct mthca_dev *mdev)
858 entries[1].entry = 1; 858 entries[1].entry = 1;
859 entries[2].entry = 2; 859 entries[2].entry = 2;
860 860
861 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 861 err = pci_enable_msix_exact(mdev->pdev, entries, ARRAY_SIZE(entries));
862 if (err) { 862 if (err)
863 if (err > 0)
864 mthca_info(mdev, "Only %d MSI-X vectors available, "
865 "not using MSI-X\n", err);
866 return err; 863 return err;
867 }
868 864
869 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 865 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
870 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 866 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c
index c8d9c4ab142b..61a0046efb76 100644
--- a/drivers/infiniband/hw/qib/qib_pcie.c
+++ b/drivers/infiniband/hw/qib/qib_pcie.c
@@ -197,46 +197,47 @@ static void qib_msix_setup(struct qib_devdata *dd, int pos, u32 *msixcnt,
197 struct qib_msix_entry *qib_msix_entry) 197 struct qib_msix_entry *qib_msix_entry)
198{ 198{
199 int ret; 199 int ret;
200 u32 tabsize = 0; 200 int nvec = *msixcnt;
201 u16 msix_flags;
202 struct msix_entry *msix_entry; 201 struct msix_entry *msix_entry;
203 int i; 202 int i;
204 203
204 ret = pci_msix_vec_count(dd->pcidev);
205 if (ret < 0)
206 goto do_intx;
207
208 nvec = min(nvec, ret);
209
205 /* We can't pass qib_msix_entry array to qib_msix_setup 210 /* We can't pass qib_msix_entry array to qib_msix_setup
206 * so use a dummy msix_entry array and copy the allocated 211 * so use a dummy msix_entry array and copy the allocated
207 * irq back to the qib_msix_entry array. */ 212 * irq back to the qib_msix_entry array. */
208 msix_entry = kmalloc(*msixcnt * sizeof(*msix_entry), GFP_KERNEL); 213 msix_entry = kmalloc(nvec * sizeof(*msix_entry), GFP_KERNEL);
209 if (!msix_entry) { 214 if (!msix_entry)
210 ret = -ENOMEM;
211 goto do_intx; 215 goto do_intx;
212 } 216
213 for (i = 0; i < *msixcnt; i++) 217 for (i = 0; i < nvec; i++)
214 msix_entry[i] = qib_msix_entry[i].msix; 218 msix_entry[i] = qib_msix_entry[i].msix;
215 219
216 pci_read_config_word(dd->pcidev, pos + PCI_MSIX_FLAGS, &msix_flags); 220 ret = pci_enable_msix_range(dd->pcidev, msix_entry, 1, nvec);
217 tabsize = 1 + (msix_flags & PCI_MSIX_FLAGS_QSIZE); 221 if (ret < 0)
218 if (tabsize > *msixcnt) 222 goto free_msix_entry;
219 tabsize = *msixcnt; 223 else
220 ret = pci_enable_msix(dd->pcidev, msix_entry, tabsize); 224 nvec = ret;
221 if (ret > 0) { 225
222 tabsize = ret; 226 for (i = 0; i < nvec; i++)
223 ret = pci_enable_msix(dd->pcidev, msix_entry, tabsize);
224 }
225do_intx:
226 if (ret) {
227 qib_dev_err(dd,
228 "pci_enable_msix %d vectors failed: %d, falling back to INTx\n",
229 tabsize, ret);
230 tabsize = 0;
231 }
232 for (i = 0; i < tabsize; i++)
233 qib_msix_entry[i].msix = msix_entry[i]; 227 qib_msix_entry[i].msix = msix_entry[i];
228
234 kfree(msix_entry); 229 kfree(msix_entry);
235 *msixcnt = tabsize; 230 *msixcnt = nvec;
231 return;
236 232
237 if (ret) 233free_msix_entry:
238 qib_enable_intx(dd->pcidev); 234 kfree(msix_entry);
239 235
236do_intx:
237 qib_dev_err(dd, "pci_enable_msix_range %d vectors failed: %d, "
238 "falling back to INTx\n", nvec, ret);
239 *msixcnt = 0;
240 qib_enable_intx(dd->pcidev);
240} 241}
241 242
242/** 243/**
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index 2626773ff29b..2dd1d0dd4f7d 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -243,6 +243,12 @@ static void (*atkbd_platform_fixup)(struct atkbd *, const void *data);
243static void *atkbd_platform_fixup_data; 243static void *atkbd_platform_fixup_data;
244static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int); 244static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int);
245 245
246/*
247 * Certain keyboards to not like ATKBD_CMD_RESET_DIS and stop responding
248 * to many commands until full reset (ATKBD_CMD_RESET_BAT) is performed.
249 */
250static bool atkbd_skip_deactivate;
251
246static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, 252static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf,
247 ssize_t (*handler)(struct atkbd *, char *)); 253 ssize_t (*handler)(struct atkbd *, char *));
248static ssize_t atkbd_attr_set_helper(struct device *dev, const char *buf, size_t count, 254static ssize_t atkbd_attr_set_helper(struct device *dev, const char *buf, size_t count,
@@ -768,7 +774,8 @@ static int atkbd_probe(struct atkbd *atkbd)
768 * Make sure nothing is coming from the keyboard and disturbs our 774 * Make sure nothing is coming from the keyboard and disturbs our
769 * internal state. 775 * internal state.
770 */ 776 */
771 atkbd_deactivate(atkbd); 777 if (!atkbd_skip_deactivate)
778 atkbd_deactivate(atkbd);
772 779
773 return 0; 780 return 0;
774} 781}
@@ -1638,6 +1645,12 @@ static int __init atkbd_setup_scancode_fixup(const struct dmi_system_id *id)
1638 return 1; 1645 return 1;
1639} 1646}
1640 1647
1648static int __init atkbd_deactivate_fixup(const struct dmi_system_id *id)
1649{
1650 atkbd_skip_deactivate = true;
1651 return 1;
1652}
1653
1641static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = { 1654static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = {
1642 { 1655 {
1643 .matches = { 1656 .matches = {
@@ -1775,6 +1788,20 @@ static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = {
1775 .callback = atkbd_setup_scancode_fixup, 1788 .callback = atkbd_setup_scancode_fixup,
1776 .driver_data = atkbd_oqo_01plus_scancode_fixup, 1789 .driver_data = atkbd_oqo_01plus_scancode_fixup,
1777 }, 1790 },
1791 {
1792 .matches = {
1793 DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"),
1794 DMI_MATCH(DMI_PRODUCT_NAME, "LW25-B7HV"),
1795 },
1796 .callback = atkbd_deactivate_fixup,
1797 },
1798 {
1799 .matches = {
1800 DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"),
1801 DMI_MATCH(DMI_PRODUCT_NAME, "P1-J273B"),
1802 },
1803 .callback = atkbd_deactivate_fixup,
1804 },
1778 { } 1805 { }
1779}; 1806};
1780 1807
diff --git a/drivers/input/keyboard/tca8418_keypad.c b/drivers/input/keyboard/tca8418_keypad.c
index 55c15304ddbc..4e491c1762cf 100644
--- a/drivers/input/keyboard/tca8418_keypad.c
+++ b/drivers/input/keyboard/tca8418_keypad.c
@@ -392,6 +392,13 @@ static const struct of_device_id tca8418_dt_ids[] = {
392 { } 392 { }
393}; 393};
394MODULE_DEVICE_TABLE(of, tca8418_dt_ids); 394MODULE_DEVICE_TABLE(of, tca8418_dt_ids);
395
396/*
397 * The device tree based i2c loader looks for
398 * "i2c:" + second_component_of(property("compatible"))
399 * and therefore we need an alias to be found.
400 */
401MODULE_ALIAS("i2c:tca8418");
395#endif 402#endif
396 403
397static struct i2c_driver tca8418_keypad_driver = { 404static struct i2c_driver tca8418_keypad_driver = {
diff --git a/drivers/input/misc/bma150.c b/drivers/input/misc/bma150.c
index 52d3a9b28f0b..b36831c828d3 100644
--- a/drivers/input/misc/bma150.c
+++ b/drivers/input/misc/bma150.c
@@ -70,6 +70,7 @@
70#define BMA150_CFG_5_REG 0x11 70#define BMA150_CFG_5_REG 0x11
71 71
72#define BMA150_CHIP_ID 2 72#define BMA150_CHIP_ID 2
73#define BMA180_CHIP_ID 3
73#define BMA150_CHIP_ID_REG BMA150_DATA_0_REG 74#define BMA150_CHIP_ID_REG BMA150_DATA_0_REG
74 75
75#define BMA150_ACC_X_LSB_REG BMA150_DATA_2_REG 76#define BMA150_ACC_X_LSB_REG BMA150_DATA_2_REG
@@ -539,7 +540,7 @@ static int bma150_probe(struct i2c_client *client,
539 } 540 }
540 541
541 chip_id = i2c_smbus_read_byte_data(client, BMA150_CHIP_ID_REG); 542 chip_id = i2c_smbus_read_byte_data(client, BMA150_CHIP_ID_REG);
542 if (chip_id != BMA150_CHIP_ID) { 543 if (chip_id != BMA150_CHIP_ID && chip_id != BMA180_CHIP_ID) {
543 dev_err(&client->dev, "BMA150 chip id error: %d\n", chip_id); 544 dev_err(&client->dev, "BMA150 chip id error: %d\n", chip_id);
544 return -EINVAL; 545 return -EINVAL;
545 } 546 }
@@ -643,6 +644,7 @@ static UNIVERSAL_DEV_PM_OPS(bma150_pm, bma150_suspend, bma150_resume, NULL);
643 644
644static const struct i2c_device_id bma150_id[] = { 645static const struct i2c_device_id bma150_id[] = {
645 { "bma150", 0 }, 646 { "bma150", 0 },
647 { "bma180", 0 },
646 { "smb380", 0 }, 648 { "smb380", 0 },
647 { "bma023", 0 }, 649 { "bma023", 0 },
648 { } 650 { }
diff --git a/drivers/input/misc/da9055_onkey.c b/drivers/input/misc/da9055_onkey.c
index 4b11ede34950..4765799fef74 100644
--- a/drivers/input/misc/da9055_onkey.c
+++ b/drivers/input/misc/da9055_onkey.c
@@ -109,7 +109,6 @@ static int da9055_onkey_probe(struct platform_device *pdev)
109 109
110 INIT_DELAYED_WORK(&onkey->work, da9055_onkey_work); 110 INIT_DELAYED_WORK(&onkey->work, da9055_onkey_work);
111 111
112 irq = regmap_irq_get_virq(da9055->irq_data, irq);
113 err = request_threaded_irq(irq, NULL, da9055_onkey_irq, 112 err = request_threaded_irq(irq, NULL, da9055_onkey_irq,
114 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 113 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
115 "ONKEY", onkey); 114 "ONKEY", onkey);
diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
index 08ead2aaede5..20c80f543d5e 100644
--- a/drivers/input/misc/soc_button_array.c
+++ b/drivers/input/misc/soc_button_array.c
@@ -169,6 +169,7 @@ static int soc_button_pnp_probe(struct pnp_dev *pdev,
169 soc_button_remove(pdev); 169 soc_button_remove(pdev);
170 return error; 170 return error;
171 } 171 }
172 continue;
172 } 173 }
173 174
174 priv->children[i] = pd; 175 priv->children[i] = pd;
diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index ef1cf52f8bb9..b96e978a37b7 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/dmi.h>
14#include <linux/slab.h> 15#include <linux/slab.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/input.h> 17#include <linux/input.h>
@@ -831,7 +832,11 @@ static int elantech_set_absolute_mode(struct psmouse *psmouse)
831 break; 832 break;
832 833
833 case 3: 834 case 3:
834 etd->reg_10 = 0x0b; 835 if (etd->set_hw_resolution)
836 etd->reg_10 = 0x0b;
837 else
838 etd->reg_10 = 0x03;
839
835 if (elantech_write_reg(psmouse, 0x10, etd->reg_10)) 840 if (elantech_write_reg(psmouse, 0x10, etd->reg_10))
836 rc = -1; 841 rc = -1;
837 842
@@ -1331,6 +1336,22 @@ static int elantech_reconnect(struct psmouse *psmouse)
1331} 1336}
1332 1337
1333/* 1338/*
1339 * Some hw_version 3 models go into error state when we try to set bit 3 of r10
1340 */
1341static const struct dmi_system_id no_hw_res_dmi_table[] = {
1342#if defined(CONFIG_DMI) && defined(CONFIG_X86)
1343 {
1344 /* Gigabyte U2442 */
1345 .matches = {
1346 DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
1347 DMI_MATCH(DMI_PRODUCT_NAME, "U2442"),
1348 },
1349 },
1350#endif
1351 { }
1352};
1353
1354/*
1334 * determine hardware version and set some properties according to it. 1355 * determine hardware version and set some properties according to it.
1335 */ 1356 */
1336static int elantech_set_properties(struct elantech_data *etd) 1357static int elantech_set_properties(struct elantech_data *etd)
@@ -1353,6 +1374,7 @@ static int elantech_set_properties(struct elantech_data *etd)
1353 case 6: 1374 case 6:
1354 case 7: 1375 case 7:
1355 case 8: 1376 case 8:
1377 case 9:
1356 etd->hw_version = 4; 1378 etd->hw_version = 4;
1357 break; 1379 break;
1358 default: 1380 default:
@@ -1389,6 +1411,9 @@ static int elantech_set_properties(struct elantech_data *etd)
1389 */ 1411 */
1390 etd->crc_enabled = ((etd->fw_version & 0x4000) == 0x4000); 1412 etd->crc_enabled = ((etd->fw_version & 0x4000) == 0x4000);
1391 1413
1414 /* Enable real hardware resolution on hw_version 3 ? */
1415 etd->set_hw_resolution = !dmi_check_system(no_hw_res_dmi_table);
1416
1392 return 0; 1417 return 0;
1393} 1418}
1394 1419
diff --git a/drivers/input/mouse/elantech.h b/drivers/input/mouse/elantech.h
index 036a04abaef7..9e0e2a1f340d 100644
--- a/drivers/input/mouse/elantech.h
+++ b/drivers/input/mouse/elantech.h
@@ -130,6 +130,7 @@ struct elantech_data {
130 bool jumpy_cursor; 130 bool jumpy_cursor;
131 bool reports_pressure; 131 bool reports_pressure;
132 bool crc_enabled; 132 bool crc_enabled;
133 bool set_hw_resolution;
133 unsigned char hw_version; 134 unsigned char hw_version;
134 unsigned int fw_version; 135 unsigned int fw_version;
135 unsigned int single_finger_reports; 136 unsigned int single_finger_reports;
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index d8d49d10f9bb..d68d33fb5ac2 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -117,6 +117,44 @@ void synaptics_reset(struct psmouse *psmouse)
117} 117}
118 118
119#ifdef CONFIG_MOUSE_PS2_SYNAPTICS 119#ifdef CONFIG_MOUSE_PS2_SYNAPTICS
120/* This list has been kindly provided by Synaptics. */
121static const char * const topbuttonpad_pnp_ids[] = {
122 "LEN0017",
123 "LEN0018",
124 "LEN0019",
125 "LEN0023",
126 "LEN002A",
127 "LEN002B",
128 "LEN002C",
129 "LEN002D",
130 "LEN002E",
131 "LEN0033", /* Helix */
132 "LEN0034", /* T431s, T540, X1 Carbon 2nd */
133 "LEN0035", /* X240 */
134 "LEN0036", /* T440 */
135 "LEN0037",
136 "LEN0038",
137 "LEN0041",
138 "LEN0042", /* Yoga */
139 "LEN0045",
140 "LEN0046",
141 "LEN0047",
142 "LEN0048",
143 "LEN0049",
144 "LEN2000",
145 "LEN2001",
146 "LEN2002",
147 "LEN2003",
148 "LEN2004", /* L440 */
149 "LEN2005",
150 "LEN2006",
151 "LEN2007",
152 "LEN2008",
153 "LEN2009",
154 "LEN200A",
155 "LEN200B",
156 NULL
157};
120 158
121/***************************************************************************** 159/*****************************************************************************
122 * Synaptics communications functions 160 * Synaptics communications functions
@@ -1255,8 +1293,10 @@ static void set_abs_position_params(struct input_dev *dev,
1255 input_abs_set_res(dev, y_code, priv->y_res); 1293 input_abs_set_res(dev, y_code, priv->y_res);
1256} 1294}
1257 1295
1258static void set_input_params(struct input_dev *dev, struct synaptics_data *priv) 1296static void set_input_params(struct psmouse *psmouse,
1297 struct synaptics_data *priv)
1259{ 1298{
1299 struct input_dev *dev = psmouse->dev;
1260 int i; 1300 int i;
1261 1301
1262 /* Things that apply to both modes */ 1302 /* Things that apply to both modes */
@@ -1325,6 +1365,17 @@ static void set_input_params(struct input_dev *dev, struct synaptics_data *priv)
1325 1365
1326 if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) { 1366 if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) {
1327 __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit); 1367 __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit);
1368 /* See if this buttonpad has a top button area */
1369 if (!strncmp(psmouse->ps2dev.serio->firmware_id, "PNP:", 4)) {
1370 for (i = 0; topbuttonpad_pnp_ids[i]; i++) {
1371 if (strstr(psmouse->ps2dev.serio->firmware_id,
1372 topbuttonpad_pnp_ids[i])) {
1373 __set_bit(INPUT_PROP_TOPBUTTONPAD,
1374 dev->propbit);
1375 break;
1376 }
1377 }
1378 }
1328 /* Clickpads report only left button */ 1379 /* Clickpads report only left button */
1329 __clear_bit(BTN_RIGHT, dev->keybit); 1380 __clear_bit(BTN_RIGHT, dev->keybit);
1330 __clear_bit(BTN_MIDDLE, dev->keybit); 1381 __clear_bit(BTN_MIDDLE, dev->keybit);
@@ -1515,6 +1566,22 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
1515 .driver_data = (int []){1232, 5710, 1156, 4696}, 1566 .driver_data = (int []){1232, 5710, 1156, 4696},
1516 }, 1567 },
1517 { 1568 {
1569 /* Lenovo ThinkPad Edge E431 */
1570 .matches = {
1571 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1572 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Edge E431"),
1573 },
1574 .driver_data = (int []){1024, 5022, 2508, 4832},
1575 },
1576 {
1577 /* Lenovo ThinkPad T431s */
1578 .matches = {
1579 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1580 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T431"),
1581 },
1582 .driver_data = (int []){1024, 5112, 2024, 4832},
1583 },
1584 {
1518 /* Lenovo ThinkPad T440s */ 1585 /* Lenovo ThinkPad T440s */
1519 .matches = { 1586 .matches = {
1520 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1587 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
@@ -1523,6 +1590,14 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
1523 .driver_data = (int []){1024, 5112, 2024, 4832}, 1590 .driver_data = (int []){1024, 5112, 2024, 4832},
1524 }, 1591 },
1525 { 1592 {
1593 /* Lenovo ThinkPad L440 */
1594 .matches = {
1595 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1596 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L440"),
1597 },
1598 .driver_data = (int []){1024, 5112, 2024, 4832},
1599 },
1600 {
1526 /* Lenovo ThinkPad T540p */ 1601 /* Lenovo ThinkPad T540p */
1527 .matches = { 1602 .matches = {
1528 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1603 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
@@ -1530,6 +1605,32 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
1530 }, 1605 },
1531 .driver_data = (int []){1024, 5056, 2058, 4832}, 1606 .driver_data = (int []){1024, 5056, 2058, 4832},
1532 }, 1607 },
1608 {
1609 /* Lenovo ThinkPad L540 */
1610 .matches = {
1611 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1612 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L540"),
1613 },
1614 .driver_data = (int []){1024, 5112, 2024, 4832},
1615 },
1616 {
1617 /* Lenovo Yoga S1 */
1618 .matches = {
1619 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1620 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION,
1621 "ThinkPad S1 Yoga"),
1622 },
1623 .driver_data = (int []){1232, 5710, 1156, 4696},
1624 },
1625 {
1626 /* Lenovo ThinkPad X1 Carbon Haswell (3rd generation) */
1627 .matches = {
1628 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1629 DMI_MATCH(DMI_PRODUCT_VERSION,
1630 "ThinkPad X1 Carbon 2nd"),
1631 },
1632 .driver_data = (int []){1024, 5112, 2024, 4832},
1633 },
1533#endif 1634#endif
1534 { } 1635 { }
1535}; 1636};
@@ -1593,7 +1694,7 @@ static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode)
1593 priv->capabilities, priv->ext_cap, priv->ext_cap_0c, 1694 priv->capabilities, priv->ext_cap, priv->ext_cap_0c,
1594 priv->board_id, priv->firmware_id); 1695 priv->board_id, priv->firmware_id);
1595 1696
1596 set_input_params(psmouse->dev, priv); 1697 set_input_params(psmouse, priv);
1597 1698
1598 /* 1699 /*
1599 * Encode touchpad model so that it can be used to set 1700 * Encode touchpad model so that it can be used to set
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 0ec9abbe31fe..381b20d4c561 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -702,6 +702,17 @@ static int i8042_pnp_aux_irq;
702static char i8042_pnp_kbd_name[32]; 702static char i8042_pnp_kbd_name[32];
703static char i8042_pnp_aux_name[32]; 703static char i8042_pnp_aux_name[32];
704 704
705static void i8042_pnp_id_to_string(struct pnp_id *id, char *dst, int dst_size)
706{
707 strlcpy(dst, "PNP:", dst_size);
708
709 while (id) {
710 strlcat(dst, " ", dst_size);
711 strlcat(dst, id->id, dst_size);
712 id = id->next;
713 }
714}
715
705static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *did) 716static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *did)
706{ 717{
707 if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1) 718 if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1)
@@ -718,6 +729,8 @@ static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *
718 strlcat(i8042_pnp_kbd_name, ":", sizeof(i8042_pnp_kbd_name)); 729 strlcat(i8042_pnp_kbd_name, ":", sizeof(i8042_pnp_kbd_name));
719 strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name)); 730 strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name));
720 } 731 }
732 i8042_pnp_id_to_string(dev->id, i8042_kbd_firmware_id,
733 sizeof(i8042_kbd_firmware_id));
721 734
722 /* Keyboard ports are always supposed to be wakeup-enabled */ 735 /* Keyboard ports are always supposed to be wakeup-enabled */
723 device_set_wakeup_enable(&dev->dev, true); 736 device_set_wakeup_enable(&dev->dev, true);
@@ -742,6 +755,8 @@ static int i8042_pnp_aux_probe(struct pnp_dev *dev, const struct pnp_device_id *
742 strlcat(i8042_pnp_aux_name, ":", sizeof(i8042_pnp_aux_name)); 755 strlcat(i8042_pnp_aux_name, ":", sizeof(i8042_pnp_aux_name));
743 strlcat(i8042_pnp_aux_name, pnp_dev_name(dev), sizeof(i8042_pnp_aux_name)); 756 strlcat(i8042_pnp_aux_name, pnp_dev_name(dev), sizeof(i8042_pnp_aux_name));
744 } 757 }
758 i8042_pnp_id_to_string(dev->id, i8042_aux_firmware_id,
759 sizeof(i8042_aux_firmware_id));
745 760
746 i8042_pnp_aux_devices++; 761 i8042_pnp_aux_devices++;
747 return 0; 762 return 0;
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index 020053fa5aaa..3807c3e971cc 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -87,6 +87,8 @@ MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
87#endif 87#endif
88 88
89static bool i8042_bypass_aux_irq_test; 89static bool i8042_bypass_aux_irq_test;
90static char i8042_kbd_firmware_id[128];
91static char i8042_aux_firmware_id[128];
90 92
91#include "i8042.h" 93#include "i8042.h"
92 94
@@ -1218,6 +1220,8 @@ static int __init i8042_create_kbd_port(void)
1218 serio->dev.parent = &i8042_platform_device->dev; 1220 serio->dev.parent = &i8042_platform_device->dev;
1219 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1221 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1220 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1222 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1223 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1224 sizeof(serio->firmware_id));
1221 1225
1222 port->serio = serio; 1226 port->serio = serio;
1223 port->irq = I8042_KBD_IRQ; 1227 port->irq = I8042_KBD_IRQ;
@@ -1244,6 +1248,8 @@ static int __init i8042_create_aux_port(int idx)
1244 if (idx < 0) { 1248 if (idx < 0) {
1245 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1249 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1246 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1250 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1251 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1252 sizeof(serio->firmware_id));
1247 serio->close = i8042_port_close; 1253 serio->close = i8042_port_close;
1248 } else { 1254 } else {
1249 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1255 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c
index 8f4c4ab04bc2..b29134de983b 100644
--- a/drivers/input/serio/serio.c
+++ b/drivers/input/serio/serio.c
@@ -451,6 +451,13 @@ static ssize_t serio_set_bind_mode(struct device *dev, struct device_attribute *
451 return retval; 451 return retval;
452} 452}
453 453
454static ssize_t firmware_id_show(struct device *dev, struct device_attribute *attr, char *buf)
455{
456 struct serio *serio = to_serio_port(dev);
457
458 return sprintf(buf, "%s\n", serio->firmware_id);
459}
460
454static DEVICE_ATTR_RO(type); 461static DEVICE_ATTR_RO(type);
455static DEVICE_ATTR_RO(proto); 462static DEVICE_ATTR_RO(proto);
456static DEVICE_ATTR_RO(id); 463static DEVICE_ATTR_RO(id);
@@ -473,12 +480,14 @@ static DEVICE_ATTR_RO(modalias);
473static DEVICE_ATTR_WO(drvctl); 480static DEVICE_ATTR_WO(drvctl);
474static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL); 481static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL);
475static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode); 482static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode);
483static DEVICE_ATTR_RO(firmware_id);
476 484
477static struct attribute *serio_device_attrs[] = { 485static struct attribute *serio_device_attrs[] = {
478 &dev_attr_modalias.attr, 486 &dev_attr_modalias.attr,
479 &dev_attr_description.attr, 487 &dev_attr_description.attr,
480 &dev_attr_drvctl.attr, 488 &dev_attr_drvctl.attr,
481 &dev_attr_bind_mode.attr, 489 &dev_attr_bind_mode.attr,
490 &dev_attr_firmware_id.attr,
482 NULL 491 NULL
483}; 492};
484 493
@@ -921,9 +930,14 @@ static int serio_uevent(struct device *dev, struct kobj_uevent_env *env)
921 SERIO_ADD_UEVENT_VAR("SERIO_PROTO=%02x", serio->id.proto); 930 SERIO_ADD_UEVENT_VAR("SERIO_PROTO=%02x", serio->id.proto);
922 SERIO_ADD_UEVENT_VAR("SERIO_ID=%02x", serio->id.id); 931 SERIO_ADD_UEVENT_VAR("SERIO_ID=%02x", serio->id.id);
923 SERIO_ADD_UEVENT_VAR("SERIO_EXTRA=%02x", serio->id.extra); 932 SERIO_ADD_UEVENT_VAR("SERIO_EXTRA=%02x", serio->id.extra);
933
924 SERIO_ADD_UEVENT_VAR("MODALIAS=serio:ty%02Xpr%02Xid%02Xex%02X", 934 SERIO_ADD_UEVENT_VAR("MODALIAS=serio:ty%02Xpr%02Xid%02Xex%02X",
925 serio->id.type, serio->id.proto, serio->id.id, serio->id.extra); 935 serio->id.type, serio->id.proto, serio->id.id, serio->id.extra);
926 936
937 if (serio->firmware_id[0])
938 SERIO_ADD_UEVENT_VAR("SERIO_FIRMWARE_ID=%s",
939 serio->firmware_id);
940
927 return 0; 941 return 0;
928} 942}
929#undef SERIO_ADD_UEVENT_VAR 943#undef SERIO_ADD_UEVENT_VAR
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c
index b16ebef5b911..611fc3905d00 100644
--- a/drivers/input/tablet/wacom_sys.c
+++ b/drivers/input/tablet/wacom_sys.c
@@ -22,23 +22,18 @@
22#define HID_USAGE_PAGE_DIGITIZER 0x0d 22#define HID_USAGE_PAGE_DIGITIZER 0x0d
23#define HID_USAGE_PAGE_DESKTOP 0x01 23#define HID_USAGE_PAGE_DESKTOP 0x01
24#define HID_USAGE 0x09 24#define HID_USAGE 0x09
25#define HID_USAGE_X 0x30 25#define HID_USAGE_X ((HID_USAGE_PAGE_DESKTOP << 16) | 0x30)
26#define HID_USAGE_Y 0x31 26#define HID_USAGE_Y ((HID_USAGE_PAGE_DESKTOP << 16) | 0x31)
27#define HID_USAGE_X_TILT 0x3d 27#define HID_USAGE_PRESSURE ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x30)
28#define HID_USAGE_Y_TILT 0x3e 28#define HID_USAGE_X_TILT ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3d)
29#define HID_USAGE_FINGER 0x22 29#define HID_USAGE_Y_TILT ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3e)
30#define HID_USAGE_STYLUS 0x20 30#define HID_USAGE_FINGER ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x22)
31#define HID_USAGE_CONTACTMAX 0x55 31#define HID_USAGE_STYLUS ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x20)
32#define HID_USAGE_CONTACTMAX ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x55)
32#define HID_COLLECTION 0xa1 33#define HID_COLLECTION 0xa1
33#define HID_COLLECTION_LOGICAL 0x02 34#define HID_COLLECTION_LOGICAL 0x02
34#define HID_COLLECTION_END 0xc0 35#define HID_COLLECTION_END 0xc0
35 36
36enum {
37 WCM_UNDEFINED = 0,
38 WCM_DESKTOP,
39 WCM_DIGITIZER,
40};
41
42struct hid_descriptor { 37struct hid_descriptor {
43 struct usb_descriptor_header header; 38 struct usb_descriptor_header header;
44 __le16 bcdHID; 39 __le16 bcdHID;
@@ -305,7 +300,7 @@ static int wacom_parse_hid(struct usb_interface *intf,
305 char limit = 0; 300 char limit = 0;
306 /* result has to be defined as int for some devices */ 301 /* result has to be defined as int for some devices */
307 int result = 0, touch_max = 0; 302 int result = 0, touch_max = 0;
308 int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0; 303 int i = 0, page = 0, finger = 0, pen = 0;
309 unsigned char *report; 304 unsigned char *report;
310 305
311 report = kzalloc(hid_desc->wDescriptorLength, GFP_KERNEL); 306 report = kzalloc(hid_desc->wDescriptorLength, GFP_KERNEL);
@@ -332,134 +327,121 @@ static int wacom_parse_hid(struct usb_interface *intf,
332 327
333 switch (report[i]) { 328 switch (report[i]) {
334 case HID_USAGE_PAGE: 329 case HID_USAGE_PAGE:
335 switch (report[i + 1]) { 330 page = report[i + 1];
336 case HID_USAGE_PAGE_DIGITIZER: 331 i++;
337 usage = WCM_DIGITIZER;
338 i++;
339 break;
340
341 case HID_USAGE_PAGE_DESKTOP:
342 usage = WCM_DESKTOP;
343 i++;
344 break;
345 }
346 break; 332 break;
347 333
348 case HID_USAGE: 334 case HID_USAGE:
349 switch (report[i + 1]) { 335 switch (page << 16 | report[i + 1]) {
350 case HID_USAGE_X: 336 case HID_USAGE_X:
351 if (usage == WCM_DESKTOP) { 337 if (finger) {
352 if (finger) { 338 features->device_type = BTN_TOOL_FINGER;
353 features->device_type = BTN_TOOL_FINGER; 339 /* touch device at least supports one touch point */
354 /* touch device at least supports one touch point */ 340 touch_max = 1;
355 touch_max = 1; 341 switch (features->type) {
356 switch (features->type) { 342 case TABLETPC2FG:
357 case TABLETPC2FG: 343 features->pktlen = WACOM_PKGLEN_TPC2FG;
358 features->pktlen = WACOM_PKGLEN_TPC2FG; 344 break;
359 break; 345
360 346 case MTSCREEN:
361 case MTSCREEN: 347 case WACOM_24HDT:
362 case WACOM_24HDT: 348 features->pktlen = WACOM_PKGLEN_MTOUCH;
363 features->pktlen = WACOM_PKGLEN_MTOUCH; 349 break;
364 break; 350
365 351 case MTTPC:
366 case MTTPC: 352 features->pktlen = WACOM_PKGLEN_MTTPC;
367 features->pktlen = WACOM_PKGLEN_MTTPC; 353 break;
368 break; 354
369 355 case BAMBOO_PT:
370 case BAMBOO_PT: 356 features->pktlen = WACOM_PKGLEN_BBTOUCH;
371 features->pktlen = WACOM_PKGLEN_BBTOUCH; 357 break;
372 break; 358
373 359 default:
374 default: 360 features->pktlen = WACOM_PKGLEN_GRAPHIRE;
375 features->pktlen = WACOM_PKGLEN_GRAPHIRE; 361 break;
376 break; 362 }
377 } 363
378 364 switch (features->type) {
379 switch (features->type) { 365 case BAMBOO_PT:
380 case BAMBOO_PT: 366 features->x_phy =
381 features->x_phy = 367 get_unaligned_le16(&report[i + 5]);
382 get_unaligned_le16(&report[i + 5]); 368 features->x_max =
383 features->x_max = 369 get_unaligned_le16(&report[i + 8]);
384 get_unaligned_le16(&report[i + 8]); 370 i += 15;
385 i += 15; 371 break;
386 break; 372
387 373 case WACOM_24HDT:
388 case WACOM_24HDT:
389 features->x_max =
390 get_unaligned_le16(&report[i + 3]);
391 features->x_phy =
392 get_unaligned_le16(&report[i + 8]);
393 features->unit = report[i - 1];
394 features->unitExpo = report[i - 3];
395 i += 12;
396 break;
397
398 default:
399 features->x_max =
400 get_unaligned_le16(&report[i + 3]);
401 features->x_phy =
402 get_unaligned_le16(&report[i + 6]);
403 features->unit = report[i + 9];
404 features->unitExpo = report[i + 11];
405 i += 12;
406 break;
407 }
408 } else if (pen) {
409 /* penabled only accepts exact bytes of data */
410 if (features->type >= TABLETPC)
411 features->pktlen = WACOM_PKGLEN_GRAPHIRE;
412 features->device_type = BTN_TOOL_PEN;
413 features->x_max = 374 features->x_max =
414 get_unaligned_le16(&report[i + 3]); 375 get_unaligned_le16(&report[i + 3]);
415 i += 4; 376 features->x_phy =
377 get_unaligned_le16(&report[i + 8]);
378 features->unit = report[i - 1];
379 features->unitExpo = report[i - 3];
380 i += 12;
381 break;
382
383 default:
384 features->x_max =
385 get_unaligned_le16(&report[i + 3]);
386 features->x_phy =
387 get_unaligned_le16(&report[i + 6]);
388 features->unit = report[i + 9];
389 features->unitExpo = report[i + 11];
390 i += 12;
391 break;
416 } 392 }
393 } else if (pen) {
394 /* penabled only accepts exact bytes of data */
395 if (features->type >= TABLETPC)
396 features->pktlen = WACOM_PKGLEN_GRAPHIRE;
397 features->device_type = BTN_TOOL_PEN;
398 features->x_max =
399 get_unaligned_le16(&report[i + 3]);
400 i += 4;
417 } 401 }
418 break; 402 break;
419 403
420 case HID_USAGE_Y: 404 case HID_USAGE_Y:
421 if (usage == WCM_DESKTOP) { 405 if (finger) {
422 if (finger) { 406 switch (features->type) {
423 switch (features->type) { 407 case TABLETPC2FG:
424 case TABLETPC2FG: 408 case MTSCREEN:
425 case MTSCREEN: 409 case MTTPC:
426 case MTTPC: 410 features->y_max =
427 features->y_max = 411 get_unaligned_le16(&report[i + 3]);
428 get_unaligned_le16(&report[i + 3]); 412 features->y_phy =
429 features->y_phy = 413 get_unaligned_le16(&report[i + 6]);
430 get_unaligned_le16(&report[i + 6]); 414 i += 7;
431 i += 7; 415 break;
432 break; 416
433 417 case WACOM_24HDT:
434 case WACOM_24HDT: 418 features->y_max =
435 features->y_max = 419 get_unaligned_le16(&report[i + 3]);
436 get_unaligned_le16(&report[i + 3]); 420 features->y_phy =
437 features->y_phy = 421 get_unaligned_le16(&report[i - 2]);
438 get_unaligned_le16(&report[i - 2]); 422 i += 7;
439 i += 7; 423 break;
440 break; 424
441 425 case BAMBOO_PT:
442 case BAMBOO_PT: 426 features->y_phy =
443 features->y_phy = 427 get_unaligned_le16(&report[i + 3]);
444 get_unaligned_le16(&report[i + 3]); 428 features->y_max =
445 features->y_max = 429 get_unaligned_le16(&report[i + 6]);
446 get_unaligned_le16(&report[i + 6]); 430 i += 12;
447 i += 12; 431 break;
448 break; 432
449 433 default:
450 default:
451 features->y_max =
452 features->x_max;
453 features->y_phy =
454 get_unaligned_le16(&report[i + 3]);
455 i += 4;
456 break;
457 }
458 } else if (pen) {
459 features->y_max = 434 features->y_max =
435 features->x_max;
436 features->y_phy =
460 get_unaligned_le16(&report[i + 3]); 437 get_unaligned_le16(&report[i + 3]);
461 i += 4; 438 i += 4;
439 break;
462 } 440 }
441 } else if (pen) {
442 features->y_max =
443 get_unaligned_le16(&report[i + 3]);
444 i += 4;
463 } 445 }
464 break; 446 break;
465 447
@@ -484,12 +466,20 @@ static int wacom_parse_hid(struct usb_interface *intf,
484 wacom_retrieve_report_data(intf, features); 466 wacom_retrieve_report_data(intf, features);
485 i++; 467 i++;
486 break; 468 break;
469
470 case HID_USAGE_PRESSURE:
471 if (pen) {
472 features->pressure_max =
473 get_unaligned_le16(&report[i + 3]);
474 i += 4;
475 }
476 break;
487 } 477 }
488 break; 478 break;
489 479
490 case HID_COLLECTION_END: 480 case HID_COLLECTION_END:
491 /* reset UsagePage and Finger */ 481 /* reset UsagePage and Finger */
492 finger = usage = 0; 482 finger = page = 0;
493 break; 483 break;
494 484
495 case HID_COLLECTION: 485 case HID_COLLECTION:
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index 05f371df6c40..4822c57a3756 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -178,10 +178,9 @@ static int wacom_ptu_irq(struct wacom_wac *wacom)
178 178
179static int wacom_dtu_irq(struct wacom_wac *wacom) 179static int wacom_dtu_irq(struct wacom_wac *wacom)
180{ 180{
181 struct wacom_features *features = &wacom->features; 181 unsigned char *data = wacom->data;
182 char *data = wacom->data;
183 struct input_dev *input = wacom->input; 182 struct input_dev *input = wacom->input;
184 int prox = data[1] & 0x20, pressure; 183 int prox = data[1] & 0x20;
185 184
186 dev_dbg(input->dev.parent, 185 dev_dbg(input->dev.parent,
187 "%s: received report #%d", __func__, data[0]); 186 "%s: received report #%d", __func__, data[0]);
@@ -198,10 +197,7 @@ static int wacom_dtu_irq(struct wacom_wac *wacom)
198 input_report_key(input, BTN_STYLUS2, data[1] & 0x10); 197 input_report_key(input, BTN_STYLUS2, data[1] & 0x10);
199 input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2])); 198 input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2]));
200 input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4])); 199 input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4]));
201 pressure = ((data[7] & 0x01) << 8) | data[6]; 200 input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x01) << 8) | data[6]);
202 if (pressure < 0)
203 pressure = features->pressure_max + pressure + 1;
204 input_report_abs(input, ABS_PRESSURE, pressure);
205 input_report_key(input, BTN_TOUCH, data[1] & 0x05); 201 input_report_key(input, BTN_TOUCH, data[1] & 0x05);
206 if (!prox) /* out-prox */ 202 if (!prox) /* out-prox */
207 wacom->id[0] = 0; 203 wacom->id[0] = 0;
@@ -906,7 +902,7 @@ static int int_dist(int x1, int y1, int x2, int y2)
906static int wacom_24hdt_irq(struct wacom_wac *wacom) 902static int wacom_24hdt_irq(struct wacom_wac *wacom)
907{ 903{
908 struct input_dev *input = wacom->input; 904 struct input_dev *input = wacom->input;
909 char *data = wacom->data; 905 unsigned char *data = wacom->data;
910 int i; 906 int i;
911 int current_num_contacts = data[61]; 907 int current_num_contacts = data[61];
912 int contacts_to_send = 0; 908 int contacts_to_send = 0;
@@ -959,7 +955,7 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom)
959static int wacom_mt_touch(struct wacom_wac *wacom) 955static int wacom_mt_touch(struct wacom_wac *wacom)
960{ 956{
961 struct input_dev *input = wacom->input; 957 struct input_dev *input = wacom->input;
962 char *data = wacom->data; 958 unsigned char *data = wacom->data;
963 int i; 959 int i;
964 int current_num_contacts = data[2]; 960 int current_num_contacts = data[2];
965 int contacts_to_send = 0; 961 int contacts_to_send = 0;
@@ -1038,7 +1034,7 @@ static int wacom_tpc_mt_touch(struct wacom_wac *wacom)
1038 1034
1039static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len) 1035static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)
1040{ 1036{
1041 char *data = wacom->data; 1037 unsigned char *data = wacom->data;
1042 struct input_dev *input = wacom->input; 1038 struct input_dev *input = wacom->input;
1043 bool prox; 1039 bool prox;
1044 int x = 0, y = 0; 1040 int x = 0, y = 0;
@@ -1074,10 +1070,8 @@ static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)
1074 1070
1075static int wacom_tpc_pen(struct wacom_wac *wacom) 1071static int wacom_tpc_pen(struct wacom_wac *wacom)
1076{ 1072{
1077 struct wacom_features *features = &wacom->features; 1073 unsigned char *data = wacom->data;
1078 char *data = wacom->data;
1079 struct input_dev *input = wacom->input; 1074 struct input_dev *input = wacom->input;
1080 int pressure;
1081 bool prox = data[1] & 0x20; 1075 bool prox = data[1] & 0x20;
1082 1076
1083 if (!wacom->shared->stylus_in_proximity) /* first in prox */ 1077 if (!wacom->shared->stylus_in_proximity) /* first in prox */
@@ -1093,10 +1087,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom)
1093 input_report_key(input, BTN_STYLUS2, data[1] & 0x10); 1087 input_report_key(input, BTN_STYLUS2, data[1] & 0x10);
1094 input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2])); 1088 input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2]));
1095 input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4])); 1089 input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4]));
1096 pressure = ((data[7] & 0x01) << 8) | data[6]; 1090 input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x03) << 8) | data[6]);
1097 if (pressure < 0)
1098 pressure = features->pressure_max + pressure + 1;
1099 input_report_abs(input, ABS_PRESSURE, pressure);
1100 input_report_key(input, BTN_TOUCH, data[1] & 0x05); 1091 input_report_key(input, BTN_TOUCH, data[1] & 0x05);
1101 input_report_key(input, wacom->tool[0], prox); 1092 input_report_key(input, wacom->tool[0], prox);
1102 return 1; 1093 return 1;
@@ -1107,7 +1098,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom)
1107 1098
1108static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len) 1099static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len)
1109{ 1100{
1110 char *data = wacom->data; 1101 unsigned char *data = wacom->data;
1111 1102
1112 dev_dbg(wacom->input->dev.parent, 1103 dev_dbg(wacom->input->dev.parent,
1113 "%s: received report #%d\n", __func__, data[0]); 1104 "%s: received report #%d\n", __func__, data[0]);
@@ -1838,7 +1829,7 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev,
1838 case DTU: 1829 case DTU:
1839 if (features->type == DTUS) { 1830 if (features->type == DTUS) {
1840 input_set_capability(input_dev, EV_MSC, MSC_SERIAL); 1831 input_set_capability(input_dev, EV_MSC, MSC_SERIAL);
1841 for (i = 0; i < 3; i++) 1832 for (i = 0; i < 4; i++)
1842 __set_bit(BTN_0 + i, input_dev->keybit); 1833 __set_bit(BTN_0 + i, input_dev->keybit);
1843 } 1834 }
1844 __set_bit(BTN_TOOL_PEN, input_dev->keybit); 1835 __set_bit(BTN_TOOL_PEN, input_dev->keybit);
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
index 45a06e495ed2..7f8aa981500d 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -425,7 +425,7 @@ static int ads7845_read12_ser(struct device *dev, unsigned command)
425name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \ 425name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \
426{ \ 426{ \
427 struct ads7846 *ts = dev_get_drvdata(dev); \ 427 struct ads7846 *ts = dev_get_drvdata(dev); \
428 ssize_t v = ads7846_read12_ser(dev, \ 428 ssize_t v = ads7846_read12_ser(&ts->spi->dev, \
429 READ_12BIT_SER(var)); \ 429 READ_12BIT_SER(var)); \
430 if (v < 0) \ 430 if (v < 0) \
431 return v; \ 431 return v; \
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 8b89e33a89fe..647c3c7fd742 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1381,7 +1381,7 @@ static int arm_smmu_alloc_init_pmd(struct arm_smmu_device *smmu, pud_t *pud,
1381 1381
1382 do { 1382 do {
1383 next = pmd_addr_end(addr, end); 1383 next = pmd_addr_end(addr, end);
1384 ret = arm_smmu_alloc_init_pte(smmu, pmd, addr, end, pfn, 1384 ret = arm_smmu_alloc_init_pte(smmu, pmd, addr, next, pfn,
1385 prot, stage); 1385 prot, stage);
1386 phys += next - addr; 1386 phys += next - addr;
1387 } while (pmd++, addr = next, addr < end); 1387 } while (pmd++, addr = next, addr < end);
@@ -1499,7 +1499,7 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
1499 1499
1500 ret = arm_smmu_handle_mapping(smmu_domain, iova, 0, size, 0); 1500 ret = arm_smmu_handle_mapping(smmu_domain, iova, 0, size, 0);
1501 arm_smmu_tlb_inv_context(&smmu_domain->root_cfg); 1501 arm_smmu_tlb_inv_context(&smmu_domain->root_cfg);
1502 return ret ? ret : size; 1502 return ret ? 0 : size;
1503} 1503}
1504 1504
1505static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain, 1505static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index f445c10df8df..39f8b717fe84 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -152,7 +152,8 @@ dmar_alloc_pci_notify_info(struct pci_dev *dev, unsigned long event)
152 info->seg = pci_domain_nr(dev->bus); 152 info->seg = pci_domain_nr(dev->bus);
153 info->level = level; 153 info->level = level;
154 if (event == BUS_NOTIFY_ADD_DEVICE) { 154 if (event == BUS_NOTIFY_ADD_DEVICE) {
155 for (tmp = dev, level--; tmp; tmp = tmp->bus->self) { 155 for (tmp = dev; tmp; tmp = tmp->bus->self) {
156 level--;
156 info->path[level].device = PCI_SLOT(tmp->devfn); 157 info->path[level].device = PCI_SLOT(tmp->devfn);
157 info->path[level].function = PCI_FUNC(tmp->devfn); 158 info->path[level].function = PCI_FUNC(tmp->devfn);
158 if (pci_is_root_bus(tmp->bus)) 159 if (pci_is_root_bus(tmp->bus))
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 69fa7da5e48b..f256ffc02e29 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1009,11 +1009,13 @@ static struct page *dma_pte_list_pagetables(struct dmar_domain *domain,
1009 if (level == 1) 1009 if (level == 1)
1010 return freelist; 1010 return freelist;
1011 1011
1012 for (pte = page_address(pg); !first_pte_in_page(pte); pte++) { 1012 pte = page_address(pg);
1013 do {
1013 if (dma_pte_present(pte) && !dma_pte_superpage(pte)) 1014 if (dma_pte_present(pte) && !dma_pte_superpage(pte))
1014 freelist = dma_pte_list_pagetables(domain, level - 1, 1015 freelist = dma_pte_list_pagetables(domain, level - 1,
1015 pte, freelist); 1016 pte, freelist);
1016 } 1017 pte++;
1018 } while (!first_pte_in_page(pte));
1017 1019
1018 return freelist; 1020 return freelist;
1019} 1021}
@@ -2235,7 +2237,9 @@ static struct dmar_domain *get_domain_for_dev(struct device *dev, int gaw)
2235 bridge_devfn = dev_tmp->devfn; 2237 bridge_devfn = dev_tmp->devfn;
2236 } 2238 }
2237 spin_lock_irqsave(&device_domain_lock, flags); 2239 spin_lock_irqsave(&device_domain_lock, flags);
2238 info = dmar_search_domain_by_dev_info(segment, bus, devfn); 2240 info = dmar_search_domain_by_dev_info(segment,
2241 bridge_bus,
2242 bridge_devfn);
2239 if (info) { 2243 if (info) {
2240 iommu = info->iommu; 2244 iommu = info->iommu;
2241 domain = info->domain; 2245 domain = info->domain;
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 41be897df8d5..3899ba7821c5 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -41,6 +41,7 @@
41#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) 41#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
42#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) 42#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
43#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4) 43#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4)
44#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF
44 45
45#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) 46#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
46#define ARMADA_375_PPI_CAUSE (0x10) 47#define ARMADA_375_PPI_CAUSE (0x10)
@@ -132,8 +133,7 @@ static int armada_370_xp_setup_msi_irq(struct msi_chip *chip,
132 struct msi_desc *desc) 133 struct msi_desc *desc)
133{ 134{
134 struct msi_msg msg; 135 struct msi_msg msg;
135 irq_hw_number_t hwirq; 136 int virq, hwirq;
136 int virq;
137 137
138 hwirq = armada_370_xp_alloc_msi(); 138 hwirq = armada_370_xp_alloc_msi();
139 if (hwirq < 0) 139 if (hwirq < 0)
@@ -159,8 +159,19 @@ static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip,
159 unsigned int irq) 159 unsigned int irq)
160{ 160{
161 struct irq_data *d = irq_get_irq_data(irq); 161 struct irq_data *d = irq_get_irq_data(irq);
162 unsigned long hwirq = d->hwirq;
163
162 irq_dispose_mapping(irq); 164 irq_dispose_mapping(irq);
163 armada_370_xp_free_msi(d->hwirq); 165 armada_370_xp_free_msi(hwirq);
166}
167
168static int armada_370_xp_check_msi_device(struct msi_chip *chip, struct pci_dev *dev,
169 int nvec, int type)
170{
171 /* We support MSI, but not MSI-X */
172 if (type == PCI_CAP_ID_MSI)
173 return 0;
174 return -EINVAL;
164} 175}
165 176
166static struct irq_chip armada_370_xp_msi_irq_chip = { 177static struct irq_chip armada_370_xp_msi_irq_chip = {
@@ -201,6 +212,7 @@ static int armada_370_xp_msi_init(struct device_node *node,
201 212
202 msi_chip->setup_irq = armada_370_xp_setup_msi_irq; 213 msi_chip->setup_irq = armada_370_xp_setup_msi_irq;
203 msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq; 214 msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq;
215 msi_chip->check_device = armada_370_xp_check_msi_device;
204 msi_chip->of_node = node; 216 msi_chip->of_node = node;
205 217
206 armada_370_xp_msi_domain = 218 armada_370_xp_msi_domain =
@@ -244,35 +256,18 @@ static DEFINE_RAW_SPINLOCK(irq_controller_lock);
244static int armada_xp_set_affinity(struct irq_data *d, 256static int armada_xp_set_affinity(struct irq_data *d,
245 const struct cpumask *mask_val, bool force) 257 const struct cpumask *mask_val, bool force)
246{ 258{
247 unsigned long reg;
248 unsigned long new_mask = 0;
249 unsigned long online_mask = 0;
250 unsigned long count = 0;
251 irq_hw_number_t hwirq = irqd_to_hwirq(d); 259 irq_hw_number_t hwirq = irqd_to_hwirq(d);
260 unsigned long reg, mask;
252 int cpu; 261 int cpu;
253 262
254 for_each_cpu(cpu, mask_val) { 263 /* Select a single core from the affinity mask which is online */
255 new_mask |= 1 << cpu_logical_map(cpu); 264 cpu = cpumask_any_and(mask_val, cpu_online_mask);
256 count++; 265 mask = 1UL << cpu_logical_map(cpu);
257 }
258
259 /*
260 * Forbid mutlicore interrupt affinity
261 * This is required since the MPIC HW doesn't limit
262 * several CPUs from acknowledging the same interrupt.
263 */
264 if (count > 1)
265 return -EINVAL;
266
267 for_each_cpu(cpu, cpu_online_mask)
268 online_mask |= 1 << cpu_logical_map(cpu);
269 266
270 raw_spin_lock(&irq_controller_lock); 267 raw_spin_lock(&irq_controller_lock);
271
272 reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq)); 268 reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
273 reg = (reg & (~online_mask)) | new_mask; 269 reg = (reg & (~ARMADA_370_XP_INT_SOURCE_CPU_MASK)) | mask;
274 writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq)); 270 writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
275
276 raw_spin_unlock(&irq_controller_lock); 271 raw_spin_unlock(&irq_controller_lock);
277 272
278 return 0; 273 return 0;
@@ -494,15 +489,6 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
494 489
495#ifdef CONFIG_SMP 490#ifdef CONFIG_SMP
496 armada_xp_mpic_smp_cpu_init(); 491 armada_xp_mpic_smp_cpu_init();
497
498 /*
499 * Set the default affinity from all CPUs to the boot cpu.
500 * This is required since the MPIC doesn't limit several CPUs
501 * from acknowledging the same interrupt.
502 */
503 cpumask_clear(irq_default_affinity);
504 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
505
506#endif 492#endif
507 493
508 armada_370_xp_msi_init(node, main_int_res.start); 494 armada_370_xp_msi_init(node, main_int_res.start);
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index fc817d28d1fe..3d15d16a7088 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -107,7 +107,7 @@ static int __init crossbar_of_init(struct device_node *node)
107 int i, size, max, reserved = 0, entry; 107 int i, size, max, reserved = 0, entry;
108 const __be32 *irqsr; 108 const __be32 *irqsr;
109 109
110 cb = kzalloc(sizeof(struct cb_device *), GFP_KERNEL); 110 cb = kzalloc(sizeof(*cb), GFP_KERNEL);
111 111
112 if (!cb) 112 if (!cb)
113 return -ENOMEM; 113 return -ENOMEM;
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 4300b6606f5e..57d165e026f4 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -246,10 +246,14 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
246 bool force) 246 bool force)
247{ 247{
248 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); 248 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
249 unsigned int shift = (gic_irq(d) % 4) * 8; 249 unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
250 unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask);
251 u32 val, mask, bit; 250 u32 val, mask, bit;
252 251
252 if (!force)
253 cpu = cpumask_any_and(mask_val, cpu_online_mask);
254 else
255 cpu = cpumask_first(mask_val);
256
253 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) 257 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
254 return -EINVAL; 258 return -EINVAL;
255 259
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c
index 37dab0b472cd..7d35287f9e90 100644
--- a/drivers/irqchip/irq-vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -24,6 +24,7 @@
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/irqchip/chained_irq.h>
27#include <linux/irqdomain.h> 28#include <linux/irqdomain.h>
28#include <linux/of.h> 29#include <linux/of.h>
29#include <linux/of_address.h> 30#include <linux/of_address.h>
@@ -228,12 +229,17 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
228static void vic_handle_irq_cascaded(unsigned int irq, struct irq_desc *desc) 229static void vic_handle_irq_cascaded(unsigned int irq, struct irq_desc *desc)
229{ 230{
230 u32 stat, hwirq; 231 u32 stat, hwirq;
232 struct irq_chip *host_chip = irq_desc_get_chip(desc);
231 struct vic_device *vic = irq_desc_get_handler_data(desc); 233 struct vic_device *vic = irq_desc_get_handler_data(desc);
232 234
235 chained_irq_enter(host_chip, desc);
236
233 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) { 237 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
234 hwirq = ffs(stat) - 1; 238 hwirq = ffs(stat) - 1;
235 generic_handle_irq(irq_find_mapping(vic->domain, hwirq)); 239 generic_handle_irq(irq_find_mapping(vic->domain, hwirq));
236 } 240 }
241
242 chained_irq_exit(host_chip, desc);
237} 243}
238 244
239/* 245/*
diff --git a/drivers/irqchip/spear-shirq.c b/drivers/irqchip/spear-shirq.c
index 8527743b5cef..3fdda3a40269 100644
--- a/drivers/irqchip/spear-shirq.c
+++ b/drivers/irqchip/spear-shirq.c
@@ -5,7 +5,7 @@
5 * Viresh Kumar <viresh.linux@gmail.com> 5 * Viresh Kumar <viresh.linux@gmail.com>
6 * 6 *
7 * Copyright (C) 2012 ST Microelectronics 7 * Copyright (C) 2012 ST Microelectronics
8 * Shiraz Hashim <shiraz.hashim@st.com> 8 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
9 * 9 *
10 * This file is licensed under the terms of the GNU General Public 10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any 11 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c
index 51dae9167238..96d1df05044f 100644
--- a/drivers/isdn/hisax/icc.c
+++ b/drivers/isdn/hisax/icc.c
@@ -425,7 +425,7 @@ afterXPR:
425 if (cs->debug & L1_DEB_MONITOR) 425 if (cs->debug & L1_DEB_MONITOR)
426 debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]); 426 debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]);
427 } 427 }
428 AfterMOX1: 428 AfterMOX1: ;
429#endif 429#endif
430 } 430 }
431 } 431 }
diff --git a/drivers/isdn/icn/icn.c b/drivers/isdn/icn/icn.c
index 53d487f0c79d..6a7447c304ac 100644
--- a/drivers/isdn/icn/icn.c
+++ b/drivers/isdn/icn/icn.c
@@ -1155,7 +1155,7 @@ icn_command(isdn_ctrl *c, icn_card *card)
1155 ulong a; 1155 ulong a;
1156 ulong flags; 1156 ulong flags;
1157 int i; 1157 int i;
1158 char cbuf[60]; 1158 char cbuf[80];
1159 isdn_ctrl cmd; 1159 isdn_ctrl cmd;
1160 icn_cdef cdef; 1160 icn_cdef cdef;
1161 char __user *arg; 1161 char __user *arg;
@@ -1309,7 +1309,6 @@ icn_command(isdn_ctrl *c, icn_card *card)
1309 break; 1309 break;
1310 if ((c->arg & 255) < ICN_BCH) { 1310 if ((c->arg & 255) < ICN_BCH) {
1311 char *p; 1311 char *p;
1312 char dial[50];
1313 char dcode[4]; 1312 char dcode[4];
1314 1313
1315 a = c->arg; 1314 a = c->arg;
@@ -1321,10 +1320,10 @@ icn_command(isdn_ctrl *c, icn_card *card)
1321 } else 1320 } else
1322 /* Normal Dial */ 1321 /* Normal Dial */
1323 strcpy(dcode, "CAL"); 1322 strcpy(dcode, "CAL");
1324 strcpy(dial, p); 1323 snprintf(cbuf, sizeof(cbuf),
1325 sprintf(cbuf, "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1), 1324 "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1),
1326 dcode, dial, c->parm.setup.si1, 1325 dcode, p, c->parm.setup.si1,
1327 c->parm.setup.si2, c->parm.setup.eazmsn); 1326 c->parm.setup.si2, c->parm.setup.eazmsn);
1328 i = icn_writecmd(cbuf, strlen(cbuf), 0, card); 1327 i = icn_writecmd(cbuf, strlen(cbuf), 0, card);
1329 } 1328 }
1330 break; 1329 break;
diff --git a/drivers/mcb/mcb-parse.c b/drivers/mcb/mcb-parse.c
index d1278b5f3028..004926955263 100644
--- a/drivers/mcb/mcb-parse.c
+++ b/drivers/mcb/mcb-parse.c
@@ -141,6 +141,7 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
141 default: 141 default:
142 pr_err("Invalid chameleon descriptor type 0x%x\n", 142 pr_err("Invalid chameleon descriptor type 0x%x\n",
143 dtype); 143 dtype);
144 kfree(header);
144 return -EINVAL; 145 return -EINVAL;
145 } 146 }
146 num_cells++; 147 num_cells++;
diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c
index 1bf4a71919ec..9380be7b1895 100644
--- a/drivers/md/dm-cache-target.c
+++ b/drivers/md/dm-cache-target.c
@@ -2488,6 +2488,7 @@ static int cache_map(struct dm_target *ti, struct bio *bio)
2488 2488
2489 } else { 2489 } else {
2490 inc_hit_counter(cache, bio); 2490 inc_hit_counter(cache, bio);
2491 pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds);
2491 2492
2492 if (bio_data_dir(bio) == WRITE && writethrough_mode(&cache->features) && 2493 if (bio_data_dir(bio) == WRITE && writethrough_mode(&cache->features) &&
2493 !is_dirty(cache, lookup_result.cblock)) 2494 !is_dirty(cache, lookup_result.cblock))
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index 53728be84dee..13abade76ad9 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -232,6 +232,13 @@ struct thin_c {
232 struct bio_list deferred_bio_list; 232 struct bio_list deferred_bio_list;
233 struct bio_list retry_on_resume_list; 233 struct bio_list retry_on_resume_list;
234 struct rb_root sort_bio_list; /* sorted list of deferred bios */ 234 struct rb_root sort_bio_list; /* sorted list of deferred bios */
235
236 /*
237 * Ensures the thin is not destroyed until the worker has finished
238 * iterating the active_thins list.
239 */
240 atomic_t refcount;
241 struct completion can_destroy;
235}; 242};
236 243
237/*----------------------------------------------------------------*/ 244/*----------------------------------------------------------------*/
@@ -1486,6 +1493,45 @@ static void process_thin_deferred_bios(struct thin_c *tc)
1486 blk_finish_plug(&plug); 1493 blk_finish_plug(&plug);
1487} 1494}
1488 1495
1496static void thin_get(struct thin_c *tc);
1497static void thin_put(struct thin_c *tc);
1498
1499/*
1500 * We can't hold rcu_read_lock() around code that can block. So we
1501 * find a thin with the rcu lock held; bump a refcount; then drop
1502 * the lock.
1503 */
1504static struct thin_c *get_first_thin(struct pool *pool)
1505{
1506 struct thin_c *tc = NULL;
1507
1508 rcu_read_lock();
1509 if (!list_empty(&pool->active_thins)) {
1510 tc = list_entry_rcu(pool->active_thins.next, struct thin_c, list);
1511 thin_get(tc);
1512 }
1513 rcu_read_unlock();
1514
1515 return tc;
1516}
1517
1518static struct thin_c *get_next_thin(struct pool *pool, struct thin_c *tc)
1519{
1520 struct thin_c *old_tc = tc;
1521
1522 rcu_read_lock();
1523 list_for_each_entry_continue_rcu(tc, &pool->active_thins, list) {
1524 thin_get(tc);
1525 thin_put(old_tc);
1526 rcu_read_unlock();
1527 return tc;
1528 }
1529 thin_put(old_tc);
1530 rcu_read_unlock();
1531
1532 return NULL;
1533}
1534
1489static void process_deferred_bios(struct pool *pool) 1535static void process_deferred_bios(struct pool *pool)
1490{ 1536{
1491 unsigned long flags; 1537 unsigned long flags;
@@ -1493,10 +1539,11 @@ static void process_deferred_bios(struct pool *pool)
1493 struct bio_list bios; 1539 struct bio_list bios;
1494 struct thin_c *tc; 1540 struct thin_c *tc;
1495 1541
1496 rcu_read_lock(); 1542 tc = get_first_thin(pool);
1497 list_for_each_entry_rcu(tc, &pool->active_thins, list) 1543 while (tc) {
1498 process_thin_deferred_bios(tc); 1544 process_thin_deferred_bios(tc);
1499 rcu_read_unlock(); 1545 tc = get_next_thin(pool, tc);
1546 }
1500 1547
1501 /* 1548 /*
1502 * If there are any deferred flush bios, we must commit 1549 * If there are any deferred flush bios, we must commit
@@ -1578,7 +1625,7 @@ static void noflush_work(struct thin_c *tc, void (*fn)(struct work_struct *))
1578{ 1625{
1579 struct noflush_work w; 1626 struct noflush_work w;
1580 1627
1581 INIT_WORK(&w.worker, fn); 1628 INIT_WORK_ONSTACK(&w.worker, fn);
1582 w.tc = tc; 1629 w.tc = tc;
1583 atomic_set(&w.complete, 0); 1630 atomic_set(&w.complete, 0);
1584 init_waitqueue_head(&w.wait); 1631 init_waitqueue_head(&w.wait);
@@ -3061,11 +3108,25 @@ static struct target_type pool_target = {
3061/*---------------------------------------------------------------- 3108/*----------------------------------------------------------------
3062 * Thin target methods 3109 * Thin target methods
3063 *--------------------------------------------------------------*/ 3110 *--------------------------------------------------------------*/
3111static void thin_get(struct thin_c *tc)
3112{
3113 atomic_inc(&tc->refcount);
3114}
3115
3116static void thin_put(struct thin_c *tc)
3117{
3118 if (atomic_dec_and_test(&tc->refcount))
3119 complete(&tc->can_destroy);
3120}
3121
3064static void thin_dtr(struct dm_target *ti) 3122static void thin_dtr(struct dm_target *ti)
3065{ 3123{
3066 struct thin_c *tc = ti->private; 3124 struct thin_c *tc = ti->private;
3067 unsigned long flags; 3125 unsigned long flags;
3068 3126
3127 thin_put(tc);
3128 wait_for_completion(&tc->can_destroy);
3129
3069 spin_lock_irqsave(&tc->pool->lock, flags); 3130 spin_lock_irqsave(&tc->pool->lock, flags);
3070 list_del_rcu(&tc->list); 3131 list_del_rcu(&tc->list);
3071 spin_unlock_irqrestore(&tc->pool->lock, flags); 3132 spin_unlock_irqrestore(&tc->pool->lock, flags);
@@ -3101,6 +3162,7 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv)
3101 struct thin_c *tc; 3162 struct thin_c *tc;
3102 struct dm_dev *pool_dev, *origin_dev; 3163 struct dm_dev *pool_dev, *origin_dev;
3103 struct mapped_device *pool_md; 3164 struct mapped_device *pool_md;
3165 unsigned long flags;
3104 3166
3105 mutex_lock(&dm_thin_pool_table.mutex); 3167 mutex_lock(&dm_thin_pool_table.mutex);
3106 3168
@@ -3191,9 +3253,12 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv)
3191 3253
3192 mutex_unlock(&dm_thin_pool_table.mutex); 3254 mutex_unlock(&dm_thin_pool_table.mutex);
3193 3255
3194 spin_lock(&tc->pool->lock); 3256 atomic_set(&tc->refcount, 1);
3257 init_completion(&tc->can_destroy);
3258
3259 spin_lock_irqsave(&tc->pool->lock, flags);
3195 list_add_tail_rcu(&tc->list, &tc->pool->active_thins); 3260 list_add_tail_rcu(&tc->list, &tc->pool->active_thins);
3196 spin_unlock(&tc->pool->lock); 3261 spin_unlock_irqrestore(&tc->pool->lock, flags);
3197 /* 3262 /*
3198 * This synchronize_rcu() call is needed here otherwise we risk a 3263 * This synchronize_rcu() call is needed here otherwise we risk a
3199 * wake_worker() call finding no bios to process (because the newly 3264 * wake_worker() call finding no bios to process (because the newly
diff --git a/drivers/md/dm-verity.c b/drivers/md/dm-verity.c
index 796007a5e0e1..7a7bab8947ae 100644
--- a/drivers/md/dm-verity.c
+++ b/drivers/md/dm-verity.c
@@ -330,15 +330,17 @@ test_block_hash:
330 return r; 330 return r;
331 } 331 }
332 } 332 }
333
334 todo = 1 << v->data_dev_block_bits; 333 todo = 1 << v->data_dev_block_bits;
335 while (io->iter.bi_size) { 334 do {
336 u8 *page; 335 u8 *page;
336 unsigned len;
337 struct bio_vec bv = bio_iter_iovec(bio, io->iter); 337 struct bio_vec bv = bio_iter_iovec(bio, io->iter);
338 338
339 page = kmap_atomic(bv.bv_page); 339 page = kmap_atomic(bv.bv_page);
340 r = crypto_shash_update(desc, page + bv.bv_offset, 340 len = bv.bv_len;
341 bv.bv_len); 341 if (likely(len >= todo))
342 len = todo;
343 r = crypto_shash_update(desc, page + bv.bv_offset, len);
342 kunmap_atomic(page); 344 kunmap_atomic(page);
343 345
344 if (r < 0) { 346 if (r < 0) {
@@ -346,8 +348,9 @@ test_block_hash:
346 return r; 348 return r;
347 } 349 }
348 350
349 bio_advance_iter(bio, &io->iter, bv.bv_len); 351 bio_advance_iter(bio, &io->iter, len);
350 } 352 todo -= len;
353 } while (todo);
351 354
352 if (!v->version) { 355 if (!v->version) {
353 r = crypto_shash_update(desc, v->salt, v->salt_size); 356 r = crypto_shash_update(desc, v->salt, v->salt_size);
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 25247a852912..ad1b9bea446e 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -4370,8 +4370,7 @@ static struct stripe_head *__get_priority_stripe(struct r5conf *conf, int group)
4370 sh->group = NULL; 4370 sh->group = NULL;
4371 } 4371 }
4372 list_del_init(&sh->lru); 4372 list_del_init(&sh->lru);
4373 atomic_inc(&sh->count); 4373 BUG_ON(atomic_inc_return(&sh->count) != 1);
4374 BUG_ON(atomic_read(&sh->count) != 1);
4375 return sh; 4374 return sh;
4376} 4375}
4377 4376
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index c137abfa0c54..20f1655e6d75 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -56,7 +56,7 @@ config VIDEO_VIU
56 56
57config VIDEO_TIMBERDALE 57config VIDEO_TIMBERDALE
58 tristate "Support for timberdale Video In/LogiWIN" 58 tristate "Support for timberdale Video In/LogiWIN"
59 depends on VIDEO_V4L2 && I2C && DMADEVICES 59 depends on MFD_TIMBERDALE && VIDEO_V4L2 && I2C && DMADEVICES
60 select DMA_ENGINE 60 select DMA_ENGINE
61 select TIMB_DMA 61 select TIMB_DMA
62 select VIDEO_ADV7180 62 select VIDEO_ADV7180
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
index 06e64b6fcb89..0c6c21c5b1a8 100644
--- a/drivers/mfd/mc13xxx-core.c
+++ b/drivers/mfd/mc13xxx-core.c
@@ -673,9 +673,13 @@ int mc13xxx_common_init(struct device *dev)
673 if (mc13xxx->flags & MC13XXX_USE_ADC) 673 if (mc13xxx->flags & MC13XXX_USE_ADC)
674 mc13xxx_add_subdevice(mc13xxx, "%s-adc"); 674 mc13xxx_add_subdevice(mc13xxx, "%s-adc");
675 675
676 if (mc13xxx->flags & MC13XXX_USE_CODEC) 676 if (mc13xxx->flags & MC13XXX_USE_CODEC) {
677 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec", 677 if (pdata)
678 pdata->codec, sizeof(*pdata->codec)); 678 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
679 pdata->codec, sizeof(*pdata->codec));
680 else
681 mc13xxx_add_subdevice(mc13xxx, "%s-codec");
682 }
679 683
680 if (mc13xxx->flags & MC13XXX_USE_RTC) 684 if (mc13xxx->flags & MC13XXX_USE_RTC)
681 mc13xxx_add_subdevice(mc13xxx, "%s-rtc"); 685 mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
index c9de3d598ea5..1d15735f9ef9 100644
--- a/drivers/mfd/rtsx_pcr.c
+++ b/drivers/mfd/rtsx_pcr.c
@@ -338,28 +338,58 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
338 int num_sg, bool read, int timeout) 338 int num_sg, bool read, int timeout)
339{ 339{
340 struct completion trans_done; 340 struct completion trans_done;
341 int err = 0, count; 341 u8 dir;
342 int err = 0, i, count;
342 long timeleft; 343 long timeleft;
343 unsigned long flags; 344 unsigned long flags;
345 struct scatterlist *sg;
346 enum dma_data_direction dma_dir;
347 u32 val;
348 dma_addr_t addr;
349 unsigned int len;
350
351 dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg);
352
353 /* don't transfer data during abort processing */
354 if (pcr->remove_pci)
355 return -EINVAL;
356
357 if ((sglist == NULL) || (num_sg <= 0))
358 return -EINVAL;
344 359
345 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); 360 if (read) {
361 dir = DEVICE_TO_HOST;
362 dma_dir = DMA_FROM_DEVICE;
363 } else {
364 dir = HOST_TO_DEVICE;
365 dma_dir = DMA_TO_DEVICE;
366 }
367
368 count = dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
346 if (count < 1) { 369 if (count < 1) {
347 dev_err(&(pcr->pci->dev), "scatterlist map failed\n"); 370 dev_err(&(pcr->pci->dev), "scatterlist map failed\n");
348 return -EINVAL; 371 return -EINVAL;
349 } 372 }
350 dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); 373 dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count);
351 374
375 val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
376 pcr->sgi = 0;
377 for_each_sg(sglist, sg, count, i) {
378 addr = sg_dma_address(sg);
379 len = sg_dma_len(sg);
380 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1);
381 }
352 382
353 spin_lock_irqsave(&pcr->lock, flags); 383 spin_lock_irqsave(&pcr->lock, flags);
354 384
355 pcr->done = &trans_done; 385 pcr->done = &trans_done;
356 pcr->trans_result = TRANS_NOT_READY; 386 pcr->trans_result = TRANS_NOT_READY;
357 init_completion(&trans_done); 387 init_completion(&trans_done);
388 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr);
389 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val);
358 390
359 spin_unlock_irqrestore(&pcr->lock, flags); 391 spin_unlock_irqrestore(&pcr->lock, flags);
360 392
361 rtsx_pci_dma_transfer(pcr, sglist, count, read);
362
363 timeleft = wait_for_completion_interruptible_timeout( 393 timeleft = wait_for_completion_interruptible_timeout(
364 &trans_done, msecs_to_jiffies(timeout)); 394 &trans_done, msecs_to_jiffies(timeout));
365 if (timeleft <= 0) { 395 if (timeleft <= 0) {
@@ -383,7 +413,7 @@ out:
383 pcr->done = NULL; 413 pcr->done = NULL;
384 spin_unlock_irqrestore(&pcr->lock, flags); 414 spin_unlock_irqrestore(&pcr->lock, flags);
385 415
386 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); 416 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
387 417
388 if ((err < 0) && (err != -ENODEV)) 418 if ((err < 0) && (err != -ENODEV))
389 rtsx_pci_stop_cmd(pcr); 419 rtsx_pci_stop_cmd(pcr);
@@ -395,73 +425,6 @@ out:
395} 425}
396EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data); 426EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data);
397 427
398int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
399 int num_sg, bool read)
400{
401 enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
402
403 if (pcr->remove_pci)
404 return -EINVAL;
405
406 if ((sglist == NULL) || num_sg < 1)
407 return -EINVAL;
408
409 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir);
410}
411EXPORT_SYMBOL_GPL(rtsx_pci_dma_map_sg);
412
413int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
414 int num_sg, bool read)
415{
416 enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
417
418 if (pcr->remove_pci)
419 return -EINVAL;
420
421 if (sglist == NULL || num_sg < 1)
422 return -EINVAL;
423
424 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir);
425 return num_sg;
426}
427EXPORT_SYMBOL_GPL(rtsx_pci_dma_unmap_sg);
428
429int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
430 int sg_count, bool read)
431{
432 struct scatterlist *sg;
433 dma_addr_t addr;
434 unsigned int len;
435 int i;
436 u32 val;
437 u8 dir = read ? DEVICE_TO_HOST : HOST_TO_DEVICE;
438 unsigned long flags;
439
440 if (pcr->remove_pci)
441 return -EINVAL;
442
443 if ((sglist == NULL) || (sg_count < 1))
444 return -EINVAL;
445
446 val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
447 pcr->sgi = 0;
448 for_each_sg(sglist, sg, sg_count, i) {
449 addr = sg_dma_address(sg);
450 len = sg_dma_len(sg);
451 rtsx_pci_add_sg_tbl(pcr, addr, len, i == sg_count - 1);
452 }
453
454 spin_lock_irqsave(&pcr->lock, flags);
455
456 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr);
457 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val);
458
459 spin_unlock_irqrestore(&pcr->lock, flags);
460
461 return 0;
462}
463EXPORT_SYMBOL_GPL(rtsx_pci_dma_transfer);
464
465int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) 428int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len)
466{ 429{
467 int err; 430 int err;
@@ -873,8 +836,6 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id)
873 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); 836 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR);
874 /* Clear interrupt flag */ 837 /* Clear interrupt flag */
875 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); 838 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg);
876 dev_dbg(&pcr->pci->dev, "=========== BIPR 0x%8x ==========\n", int_reg);
877
878 if ((int_reg & pcr->bier) == 0) { 839 if ((int_reg & pcr->bier) == 0) {
879 spin_unlock(&pcr->lock); 840 spin_unlock(&pcr->lock);
880 return IRQ_NONE; 841 return IRQ_NONE;
@@ -905,28 +866,17 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id)
905 } 866 }
906 867
907 if (int_reg & (NEED_COMPLETE_INT | DELINK_INT)) { 868 if (int_reg & (NEED_COMPLETE_INT | DELINK_INT)) {
908 if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) 869 if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) {
909 pcr->trans_result = TRANS_RESULT_FAIL; 870 pcr->trans_result = TRANS_RESULT_FAIL;
910 else if (int_reg & TRANS_OK_INT) 871 if (pcr->done)
872 complete(pcr->done);
873 } else if (int_reg & TRANS_OK_INT) {
911 pcr->trans_result = TRANS_RESULT_OK; 874 pcr->trans_result = TRANS_RESULT_OK;
912 875 if (pcr->done)
913 if (pcr->done) 876 complete(pcr->done);
914 complete(pcr->done);
915
916 if (int_reg & SD_EXIST) {
917 struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD];
918 if (slot && slot->done_transfer)
919 slot->done_transfer(slot->p_dev);
920 }
921
922 if (int_reg & MS_EXIST) {
923 struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD];
924 if (slot && slot->done_transfer)
925 slot->done_transfer(slot->p_dev);
926 } 877 }
927 } 878 }
928 879
929
930 if (pcr->card_inserted || pcr->card_removed) 880 if (pcr->card_inserted || pcr->card_removed)
931 schedule_delayed_work(&pcr->carddet_work, 881 schedule_delayed_work(&pcr->carddet_work,
932 msecs_to_jiffies(200)); 882 msecs_to_jiffies(200));
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 1cb74085e410..8baff0effc7d 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -300,8 +300,8 @@ config SGI_GRU_DEBUG
300 depends on SGI_GRU 300 depends on SGI_GRU
301 default n 301 default n
302 ---help--- 302 ---help---
303 This option enables addition debugging code for the SGI GRU driver. If 303 This option enables additional debugging code for the SGI GRU driver.
304 you are unsure, say N. 304 If you are unsure, say N.
305 305
306config APDS9802ALS 306config APDS9802ALS
307 tristate "Medfield Avago APDS9802 ALS Sensor module" 307 tristate "Medfield Avago APDS9802 ALS Sensor module"
diff --git a/drivers/misc/genwqe/card_base.h b/drivers/misc/genwqe/card_base.h
index 5e4dbd21f89a..0e608a288603 100644
--- a/drivers/misc/genwqe/card_base.h
+++ b/drivers/misc/genwqe/card_base.h
@@ -337,6 +337,44 @@ enum genwqe_requ_state {
337}; 337};
338 338
339/** 339/**
340 * struct genwqe_sgl - Scatter gather list describing user-space memory
341 * @sgl: scatter gather list needs to be 128 byte aligned
342 * @sgl_dma_addr: dma address of sgl
343 * @sgl_size: size of area used for sgl
344 * @user_addr: user-space address of memory area
345 * @user_size: size of user-space memory area
346 * @page: buffer for partial pages if needed
347 * @page_dma_addr: dma address partial pages
348 */
349struct genwqe_sgl {
350 dma_addr_t sgl_dma_addr;
351 struct sg_entry *sgl;
352 size_t sgl_size; /* size of sgl */
353
354 void __user *user_addr; /* user-space base-address */
355 size_t user_size; /* size of memory area */
356
357 unsigned long nr_pages;
358 unsigned long fpage_offs;
359 size_t fpage_size;
360 size_t lpage_size;
361
362 void *fpage;
363 dma_addr_t fpage_dma_addr;
364
365 void *lpage;
366 dma_addr_t lpage_dma_addr;
367};
368
369int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
370 void __user *user_addr, size_t user_size);
371
372int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
373 dma_addr_t *dma_list);
374
375int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl);
376
377/**
340 * struct ddcb_requ - Kernel internal representation of the DDCB request 378 * struct ddcb_requ - Kernel internal representation of the DDCB request
341 * @cmd: User space representation of the DDCB execution request 379 * @cmd: User space representation of the DDCB execution request
342 */ 380 */
@@ -347,9 +385,7 @@ struct ddcb_requ {
347 struct ddcb_queue *queue; /* associated queue */ 385 struct ddcb_queue *queue; /* associated queue */
348 386
349 struct dma_mapping dma_mappings[DDCB_FIXUPS]; 387 struct dma_mapping dma_mappings[DDCB_FIXUPS];
350 struct sg_entry *sgl[DDCB_FIXUPS]; 388 struct genwqe_sgl sgls[DDCB_FIXUPS];
351 dma_addr_t sgl_dma_addr[DDCB_FIXUPS];
352 size_t sgl_size[DDCB_FIXUPS];
353 389
354 /* kernel/user shared content */ 390 /* kernel/user shared content */
355 struct genwqe_ddcb_cmd cmd; /* ddcb_no for this request */ 391 struct genwqe_ddcb_cmd cmd; /* ddcb_no for this request */
@@ -453,22 +489,6 @@ int genwqe_user_vmap(struct genwqe_dev *cd, struct dma_mapping *m,
453int genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m, 489int genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m,
454 struct ddcb_requ *req); 490 struct ddcb_requ *req);
455 491
456struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
457 dma_addr_t *dma_addr, size_t *sgl_size);
458
459void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
460 dma_addr_t dma_addr, size_t size);
461
462int genwqe_setup_sgl(struct genwqe_dev *cd,
463 unsigned long offs,
464 unsigned long size,
465 struct sg_entry *sgl, /* genwqe sgl */
466 dma_addr_t dma_addr, size_t sgl_size,
467 dma_addr_t *dma_list, int page_offs, int num_pages);
468
469int genwqe_check_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
470 int size);
471
472static inline bool dma_mapping_used(struct dma_mapping *m) 492static inline bool dma_mapping_used(struct dma_mapping *m)
473{ 493{
474 if (!m) 494 if (!m)
diff --git a/drivers/misc/genwqe/card_ddcb.c b/drivers/misc/genwqe/card_ddcb.c
index 6f1acc0ccf88..c8046db2d5a2 100644
--- a/drivers/misc/genwqe/card_ddcb.c
+++ b/drivers/misc/genwqe/card_ddcb.c
@@ -305,6 +305,8 @@ static int enqueue_ddcb(struct genwqe_dev *cd, struct ddcb_queue *queue,
305 break; 305 break;
306 306
307 new = (old | DDCB_NEXT_BE32); 307 new = (old | DDCB_NEXT_BE32);
308
309 wmb();
308 icrc_hsi_shi = cmpxchg(&prev_ddcb->icrc_hsi_shi_32, old, new); 310 icrc_hsi_shi = cmpxchg(&prev_ddcb->icrc_hsi_shi_32, old, new);
309 311
310 if (icrc_hsi_shi == old) 312 if (icrc_hsi_shi == old)
@@ -314,6 +316,8 @@ static int enqueue_ddcb(struct genwqe_dev *cd, struct ddcb_queue *queue,
314 /* Queue must be re-started by updating QUEUE_OFFSET */ 316 /* Queue must be re-started by updating QUEUE_OFFSET */
315 ddcb_mark_tapped(pddcb); 317 ddcb_mark_tapped(pddcb);
316 num = (u64)ddcb_no << 8; 318 num = (u64)ddcb_no << 8;
319
320 wmb();
317 __genwqe_writeq(cd, queue->IO_QUEUE_OFFSET, num); /* start queue */ 321 __genwqe_writeq(cd, queue->IO_QUEUE_OFFSET, num); /* start queue */
318 322
319 return RET_DDCB_TAPPED; 323 return RET_DDCB_TAPPED;
@@ -1306,7 +1310,7 @@ static int queue_wake_up_all(struct genwqe_dev *cd)
1306 */ 1310 */
1307int genwqe_finish_queue(struct genwqe_dev *cd) 1311int genwqe_finish_queue(struct genwqe_dev *cd)
1308{ 1312{
1309 int i, rc, in_flight; 1313 int i, rc = 0, in_flight;
1310 int waitmax = genwqe_ddcb_software_timeout; 1314 int waitmax = genwqe_ddcb_software_timeout;
1311 struct pci_dev *pci_dev = cd->pci_dev; 1315 struct pci_dev *pci_dev = cd->pci_dev;
1312 struct ddcb_queue *queue = &cd->queue; 1316 struct ddcb_queue *queue = &cd->queue;
diff --git a/drivers/misc/genwqe/card_dev.c b/drivers/misc/genwqe/card_dev.c
index 2c2c9cc75231..1d2f163a1906 100644
--- a/drivers/misc/genwqe/card_dev.c
+++ b/drivers/misc/genwqe/card_dev.c
@@ -531,7 +531,9 @@ static int do_flash_update(struct genwqe_file *cfile,
531 case '1': 531 case '1':
532 cmdopts = 0x1C; 532 cmdopts = 0x1C;
533 break; /* download/erase_first/part_1 */ 533 break; /* download/erase_first/part_1 */
534 case 'v': /* cmdopts = 0x0c (VPD) */ 534 case 'v':
535 cmdopts = 0x0C;
536 break; /* download/erase_first/vpd */
535 default: 537 default:
536 return -EINVAL; 538 return -EINVAL;
537 } 539 }
@@ -665,6 +667,8 @@ static int do_flash_read(struct genwqe_file *cfile,
665 cmdopts = 0x1A; 667 cmdopts = 0x1A;
666 break; /* upload/part_1 */ 668 break; /* upload/part_1 */
667 case 'v': 669 case 'v':
670 cmdopts = 0x0A;
671 break; /* upload/vpd */
668 default: 672 default:
669 return -EINVAL; 673 return -EINVAL;
670 } 674 }
@@ -836,15 +840,8 @@ static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
836 __genwqe_del_mapping(cfile, dma_map); 840 __genwqe_del_mapping(cfile, dma_map);
837 genwqe_user_vunmap(cd, dma_map, req); 841 genwqe_user_vunmap(cd, dma_map, req);
838 } 842 }
839 if (req->sgl[i] != NULL) { 843 if (req->sgls[i].sgl != NULL)
840 genwqe_free_sgl(cd, req->sgl[i], 844 genwqe_free_sync_sgl(cd, &req->sgls[i]);
841 req->sgl_dma_addr[i],
842 req->sgl_size[i]);
843 req->sgl[i] = NULL;
844 req->sgl_dma_addr[i] = 0x0;
845 req->sgl_size[i] = 0;
846 }
847
848 } 845 }
849 return 0; 846 return 0;
850} 847}
@@ -913,7 +910,7 @@ static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
913 910
914 case ATS_TYPE_SGL_RDWR: 911 case ATS_TYPE_SGL_RDWR:
915 case ATS_TYPE_SGL_RD: { 912 case ATS_TYPE_SGL_RD: {
916 int page_offs, nr_pages, offs; 913 int page_offs;
917 914
918 u_addr = be64_to_cpu(*((__be64 *) 915 u_addr = be64_to_cpu(*((__be64 *)
919 &cmd->asiv[asiv_offs])); 916 &cmd->asiv[asiv_offs]));
@@ -951,27 +948,18 @@ static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
951 page_offs = 0; 948 page_offs = 0;
952 } 949 }
953 950
954 offs = offset_in_page(u_addr);
955 nr_pages = DIV_ROUND_UP(offs + u_size, PAGE_SIZE);
956
957 /* create genwqe style scatter gather list */ 951 /* create genwqe style scatter gather list */
958 req->sgl[i] = genwqe_alloc_sgl(cd, m->nr_pages, 952 rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
959 &req->sgl_dma_addr[i], 953 (void __user *)u_addr,
960 &req->sgl_size[i]); 954 u_size);
961 if (req->sgl[i] == NULL) { 955 if (rc != 0)
962 rc = -ENOMEM;
963 goto err_out; 956 goto err_out;
964 } 957
965 genwqe_setup_sgl(cd, offs, u_size, 958 genwqe_setup_sgl(cd, &req->sgls[i],
966 req->sgl[i], 959 &m->dma_list[page_offs]);
967 req->sgl_dma_addr[i],
968 req->sgl_size[i],
969 m->dma_list,
970 page_offs,
971 nr_pages);
972 960
973 *((__be64 *)&cmd->asiv[asiv_offs]) = 961 *((__be64 *)&cmd->asiv[asiv_offs]) =
974 cpu_to_be64(req->sgl_dma_addr[i]); 962 cpu_to_be64(req->sgls[i].sgl_dma_addr);
975 963
976 break; 964 break;
977 } 965 }
diff --git a/drivers/misc/genwqe/card_utils.c b/drivers/misc/genwqe/card_utils.c
index 6b1a6ef9f1a8..d049d271699c 100644
--- a/drivers/misc/genwqe/card_utils.c
+++ b/drivers/misc/genwqe/card_utils.c
@@ -275,67 +275,107 @@ static int genwqe_sgl_size(int num_pages)
275 return roundup(len, PAGE_SIZE); 275 return roundup(len, PAGE_SIZE);
276} 276}
277 277
278struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages, 278/**
279 dma_addr_t *dma_addr, size_t *sgl_size) 279 * genwqe_alloc_sync_sgl() - Allocate memory for sgl and overlapping pages
280 *
281 * Allocates memory for sgl and overlapping pages. Pages which might
282 * overlap other user-space memory blocks are being cached for DMAs,
283 * such that we do not run into syncronization issues. Data is copied
284 * from user-space into the cached pages.
285 */
286int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
287 void __user *user_addr, size_t user_size)
280{ 288{
289 int rc;
281 struct pci_dev *pci_dev = cd->pci_dev; 290 struct pci_dev *pci_dev = cd->pci_dev;
282 struct sg_entry *sgl;
283 291
284 *sgl_size = genwqe_sgl_size(num_pages); 292 sgl->fpage_offs = offset_in_page((unsigned long)user_addr);
285 if (get_order(*sgl_size) > MAX_ORDER) { 293 sgl->fpage_size = min_t(size_t, PAGE_SIZE-sgl->fpage_offs, user_size);
294 sgl->nr_pages = DIV_ROUND_UP(sgl->fpage_offs + user_size, PAGE_SIZE);
295 sgl->lpage_size = (user_size - sgl->fpage_size) % PAGE_SIZE;
296
297 dev_dbg(&pci_dev->dev, "[%s] uaddr=%p usize=%8ld nr_pages=%ld "
298 "fpage_offs=%lx fpage_size=%ld lpage_size=%ld\n",
299 __func__, user_addr, user_size, sgl->nr_pages,
300 sgl->fpage_offs, sgl->fpage_size, sgl->lpage_size);
301
302 sgl->user_addr = user_addr;
303 sgl->user_size = user_size;
304 sgl->sgl_size = genwqe_sgl_size(sgl->nr_pages);
305
306 if (get_order(sgl->sgl_size) > MAX_ORDER) {
286 dev_err(&pci_dev->dev, 307 dev_err(&pci_dev->dev,
287 "[%s] err: too much memory requested!\n", __func__); 308 "[%s] err: too much memory requested!\n", __func__);
288 return NULL; 309 return -ENOMEM;
289 } 310 }
290 311
291 sgl = __genwqe_alloc_consistent(cd, *sgl_size, dma_addr); 312 sgl->sgl = __genwqe_alloc_consistent(cd, sgl->sgl_size,
292 if (sgl == NULL) { 313 &sgl->sgl_dma_addr);
314 if (sgl->sgl == NULL) {
293 dev_err(&pci_dev->dev, 315 dev_err(&pci_dev->dev,
294 "[%s] err: no memory available!\n", __func__); 316 "[%s] err: no memory available!\n", __func__);
295 return NULL; 317 return -ENOMEM;
296 } 318 }
297 319
298 return sgl; 320 /* Only use buffering on incomplete pages */
321 if ((sgl->fpage_size != 0) && (sgl->fpage_size != PAGE_SIZE)) {
322 sgl->fpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
323 &sgl->fpage_dma_addr);
324 if (sgl->fpage == NULL)
325 goto err_out;
326
327 /* Sync with user memory */
328 if (copy_from_user(sgl->fpage + sgl->fpage_offs,
329 user_addr, sgl->fpage_size)) {
330 rc = -EFAULT;
331 goto err_out;
332 }
333 }
334 if (sgl->lpage_size != 0) {
335 sgl->lpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
336 &sgl->lpage_dma_addr);
337 if (sgl->lpage == NULL)
338 goto err_out1;
339
340 /* Sync with user memory */
341 if (copy_from_user(sgl->lpage, user_addr + user_size -
342 sgl->lpage_size, sgl->lpage_size)) {
343 rc = -EFAULT;
344 goto err_out1;
345 }
346 }
347 return 0;
348
349 err_out1:
350 __genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
351 sgl->fpage_dma_addr);
352 err_out:
353 __genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
354 sgl->sgl_dma_addr);
355 return -ENOMEM;
299} 356}
300 357
301int genwqe_setup_sgl(struct genwqe_dev *cd, 358int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
302 unsigned long offs, 359 dma_addr_t *dma_list)
303 unsigned long size,
304 struct sg_entry *sgl,
305 dma_addr_t dma_addr, size_t sgl_size,
306 dma_addr_t *dma_list, int page_offs, int num_pages)
307{ 360{
308 int i = 0, j = 0, p; 361 int i = 0, j = 0, p;
309 unsigned long dma_offs, map_offs; 362 unsigned long dma_offs, map_offs;
310 struct pci_dev *pci_dev = cd->pci_dev;
311 dma_addr_t prev_daddr = 0; 363 dma_addr_t prev_daddr = 0;
312 struct sg_entry *s, *last_s = NULL; 364 struct sg_entry *s, *last_s = NULL;
313 365 size_t size = sgl->user_size;
314 /* sanity checks */
315 if (offs > PAGE_SIZE) {
316 dev_err(&pci_dev->dev,
317 "[%s] too large start offs %08lx\n", __func__, offs);
318 return -EFAULT;
319 }
320 if (sgl_size < genwqe_sgl_size(num_pages)) {
321 dev_err(&pci_dev->dev,
322 "[%s] sgl_size too small %08lx for %d pages\n",
323 __func__, sgl_size, num_pages);
324 return -EFAULT;
325 }
326 366
327 dma_offs = 128; /* next block if needed/dma_offset */ 367 dma_offs = 128; /* next block if needed/dma_offset */
328 map_offs = offs; /* offset in first page */ 368 map_offs = sgl->fpage_offs; /* offset in first page */
329 369
330 s = &sgl[0]; /* first set of 8 entries */ 370 s = &sgl->sgl[0]; /* first set of 8 entries */
331 p = 0; /* page */ 371 p = 0; /* page */
332 while (p < num_pages) { 372 while (p < sgl->nr_pages) {
333 dma_addr_t daddr; 373 dma_addr_t daddr;
334 unsigned int size_to_map; 374 unsigned int size_to_map;
335 375
336 /* always write the chaining entry, cleanup is done later */ 376 /* always write the chaining entry, cleanup is done later */
337 j = 0; 377 j = 0;
338 s[j].target_addr = cpu_to_be64(dma_addr + dma_offs); 378 s[j].target_addr = cpu_to_be64(sgl->sgl_dma_addr + dma_offs);
339 s[j].len = cpu_to_be32(128); 379 s[j].len = cpu_to_be32(128);
340 s[j].flags = cpu_to_be32(SG_CHAINED); 380 s[j].flags = cpu_to_be32(SG_CHAINED);
341 j++; 381 j++;
@@ -343,7 +383,17 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
343 while (j < 8) { 383 while (j < 8) {
344 /* DMA mapping for requested page, offs, size */ 384 /* DMA mapping for requested page, offs, size */
345 size_to_map = min(size, PAGE_SIZE - map_offs); 385 size_to_map = min(size, PAGE_SIZE - map_offs);
346 daddr = dma_list[page_offs + p] + map_offs; 386
387 if ((p == 0) && (sgl->fpage != NULL)) {
388 daddr = sgl->fpage_dma_addr + map_offs;
389
390 } else if ((p == sgl->nr_pages - 1) &&
391 (sgl->lpage != NULL)) {
392 daddr = sgl->lpage_dma_addr;
393 } else {
394 daddr = dma_list[p] + map_offs;
395 }
396
347 size -= size_to_map; 397 size -= size_to_map;
348 map_offs = 0; 398 map_offs = 0;
349 399
@@ -358,7 +408,7 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
358 size_to_map); 408 size_to_map);
359 409
360 p++; /* process next page */ 410 p++; /* process next page */
361 if (p == num_pages) 411 if (p == sgl->nr_pages)
362 goto fixup; /* nothing to do */ 412 goto fixup; /* nothing to do */
363 413
364 prev_daddr = daddr + size_to_map; 414 prev_daddr = daddr + size_to_map;
@@ -374,7 +424,7 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
374 j++; 424 j++;
375 425
376 p++; /* process next page */ 426 p++; /* process next page */
377 if (p == num_pages) 427 if (p == sgl->nr_pages)
378 goto fixup; /* nothing to do */ 428 goto fixup; /* nothing to do */
379 } 429 }
380 dma_offs += 128; 430 dma_offs += 128;
@@ -395,10 +445,50 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
395 return 0; 445 return 0;
396} 446}
397 447
398void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list, 448/**
399 dma_addr_t dma_addr, size_t size) 449 * genwqe_free_sync_sgl() - Free memory for sgl and overlapping pages
450 *
451 * After the DMA transfer has been completed we free the memory for
452 * the sgl and the cached pages. Data is being transfered from cached
453 * pages into user-space buffers.
454 */
455int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl)
400{ 456{
401 __genwqe_free_consistent(cd, size, sg_list, dma_addr); 457 int rc;
458 struct pci_dev *pci_dev = cd->pci_dev;
459
460 if (sgl->fpage) {
461 if (copy_to_user(sgl->user_addr, sgl->fpage + sgl->fpage_offs,
462 sgl->fpage_size)) {
463 dev_err(&pci_dev->dev, "[%s] err: copying fpage!\n",
464 __func__);
465 rc = -EFAULT;
466 }
467 __genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
468 sgl->fpage_dma_addr);
469 sgl->fpage = NULL;
470 sgl->fpage_dma_addr = 0;
471 }
472 if (sgl->lpage) {
473 if (copy_to_user(sgl->user_addr + sgl->user_size -
474 sgl->lpage_size, sgl->lpage,
475 sgl->lpage_size)) {
476 dev_err(&pci_dev->dev, "[%s] err: copying lpage!\n",
477 __func__);
478 rc = -EFAULT;
479 }
480 __genwqe_free_consistent(cd, PAGE_SIZE, sgl->lpage,
481 sgl->lpage_dma_addr);
482 sgl->lpage = NULL;
483 sgl->lpage_dma_addr = 0;
484 }
485 __genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
486 sgl->sgl_dma_addr);
487
488 sgl->sgl = NULL;
489 sgl->sgl_dma_addr = 0x0;
490 sgl->sgl_size = 0;
491 return rc;
402} 492}
403 493
404/** 494/**
diff --git a/drivers/misc/genwqe/genwqe_driver.h b/drivers/misc/genwqe/genwqe_driver.h
index 46e916b36c70..cd5263163a6e 100644
--- a/drivers/misc/genwqe/genwqe_driver.h
+++ b/drivers/misc/genwqe/genwqe_driver.h
@@ -36,7 +36,7 @@
36#include <asm/byteorder.h> 36#include <asm/byteorder.h>
37#include <linux/genwqe/genwqe_card.h> 37#include <linux/genwqe/genwqe_card.h>
38 38
39#define DRV_VERS_STRING "2.0.0" 39#define DRV_VERS_STRING "2.0.15"
40 40
41/* 41/*
42 * Static minor number assignement, until we decide/implement 42 * Static minor number assignement, until we decide/implement
diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index 66f411a6e8ea..cabc04383685 100644
--- a/drivers/misc/mei/hw-me-regs.h
+++ b/drivers/misc/mei/hw-me-regs.h
@@ -115,6 +115,11 @@
115#define MEI_DEV_ID_LPT_HR 0x8CBA /* Lynx Point H Refresh */ 115#define MEI_DEV_ID_LPT_HR 0x8CBA /* Lynx Point H Refresh */
116 116
117#define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */ 117#define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */
118
119/* Host Firmware Status Registers in PCI Config Space */
120#define PCI_CFG_HFS_1 0x40
121#define PCI_CFG_HFS_2 0x48
122
118/* 123/*
119 * MEI HW Section 124 * MEI HW Section
120 */ 125 */
diff --git a/drivers/misc/mei/interrupt.c b/drivers/misc/mei/interrupt.c
index 29b5af8efb71..4e3cba6da3f5 100644
--- a/drivers/misc/mei/interrupt.c
+++ b/drivers/misc/mei/interrupt.c
@@ -455,8 +455,7 @@ int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list)
455 455
456 cl->status = 0; 456 cl->status = 0;
457 list_del(&cb->list); 457 list_del(&cb->list);
458 if (MEI_WRITING == cl->writing_state && 458 if (cb->fop_type == MEI_FOP_WRITE &&
459 cb->fop_type == MEI_FOP_WRITE &&
460 cl != &dev->iamthif_cl) { 459 cl != &dev->iamthif_cl) {
461 cl_dbg(dev, cl, "MEI WRITE COMPLETE\n"); 460 cl_dbg(dev, cl, "MEI WRITE COMPLETE\n");
462 cl->writing_state = MEI_WRITE_COMPLETE; 461 cl->writing_state = MEI_WRITE_COMPLETE;
diff --git a/drivers/misc/mei/main.c b/drivers/misc/mei/main.c
index b35594dbf52f..147413145c97 100644
--- a/drivers/misc/mei/main.c
+++ b/drivers/misc/mei/main.c
@@ -644,8 +644,7 @@ static unsigned int mei_poll(struct file *file, poll_table *wait)
644 goto out; 644 goto out;
645 } 645 }
646 646
647 if (MEI_WRITE_COMPLETE == cl->writing_state) 647 mask |= (POLLIN | POLLRDNORM);
648 mask |= (POLLIN | POLLRDNORM);
649 648
650out: 649out:
651 mutex_unlock(&dev->device_lock); 650 mutex_unlock(&dev->device_lock);
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index 1c8fd3a3e135..95889e2e31ff 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -97,15 +97,31 @@ static bool mei_me_quirk_probe(struct pci_dev *pdev,
97 const struct pci_device_id *ent) 97 const struct pci_device_id *ent)
98{ 98{
99 u32 reg; 99 u32 reg;
100 if (ent->device == MEI_DEV_ID_PBG_1) { 100 /* Cougar Point || Patsburg */
101 pci_read_config_dword(pdev, 0x48, &reg); 101 if (ent->device == MEI_DEV_ID_CPT_1 ||
102 /* make sure that bit 9 is up and bit 10 is down */ 102 ent->device == MEI_DEV_ID_PBG_1) {
103 if ((reg & 0x600) == 0x200) { 103 pci_read_config_dword(pdev, PCI_CFG_HFS_2, &reg);
104 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 104 /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
105 return false; 105 if ((reg & 0x600) == 0x200)
106 } 106 goto no_mei;
107 } 107 }
108
109 /* Lynx Point */
110 if (ent->device == MEI_DEV_ID_LPT_H ||
111 ent->device == MEI_DEV_ID_LPT_W ||
112 ent->device == MEI_DEV_ID_LPT_HR) {
113 /* Read ME FW Status check for SPS Firmware */
114 pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
115 /* if bits [19:16] = 15, running SPS Firmware */
116 if ((reg & 0xf0000) == 0xf0000)
117 goto no_mei;
118 }
119
108 return true; 120 return true;
121
122no_mei:
123 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
124 return false;
109} 125}
110/** 126/**
111 * mei_probe - Device Initialization Routine 127 * mei_probe - Device Initialization Routine
diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c
index 5fb994f9a653..0b9ded13a3ae 100644
--- a/drivers/mmc/host/rtsx_pci_sdmmc.c
+++ b/drivers/mmc/host/rtsx_pci_sdmmc.c
@@ -31,28 +31,14 @@
31#include <linux/mfd/rtsx_pci.h> 31#include <linux/mfd/rtsx_pci.h>
32#include <asm/unaligned.h> 32#include <asm/unaligned.h>
33 33
34struct realtek_next {
35 unsigned int sg_count;
36 s32 cookie;
37};
38
39struct realtek_pci_sdmmc { 34struct realtek_pci_sdmmc {
40 struct platform_device *pdev; 35 struct platform_device *pdev;
41 struct rtsx_pcr *pcr; 36 struct rtsx_pcr *pcr;
42 struct mmc_host *mmc; 37 struct mmc_host *mmc;
43 struct mmc_request *mrq; 38 struct mmc_request *mrq;
44 struct mmc_command *cmd; 39
45 struct mmc_data *data; 40 struct mutex host_mutex;
46 41
47 spinlock_t lock;
48 struct timer_list timer;
49 struct tasklet_struct cmd_tasklet;
50 struct tasklet_struct data_tasklet;
51 struct tasklet_struct finish_tasklet;
52
53 u8 rsp_type;
54 u8 rsp_len;
55 int sg_count;
56 u8 ssc_depth; 42 u8 ssc_depth;
57 unsigned int clock; 43 unsigned int clock;
58 bool vpclk; 44 bool vpclk;
@@ -62,13 +48,8 @@ struct realtek_pci_sdmmc {
62 int power_state; 48 int power_state;
63#define SDMMC_POWER_ON 1 49#define SDMMC_POWER_ON 1
64#define SDMMC_POWER_OFF 0 50#define SDMMC_POWER_OFF 0
65
66 struct realtek_next next_data;
67}; 51};
68 52
69static int sd_start_multi_rw(struct realtek_pci_sdmmc *host,
70 struct mmc_request *mrq);
71
72static inline struct device *sdmmc_dev(struct realtek_pci_sdmmc *host) 53static inline struct device *sdmmc_dev(struct realtek_pci_sdmmc *host)
73{ 54{
74 return &(host->pdev->dev); 55 return &(host->pdev->dev);
@@ -105,95 +86,6 @@ static void sd_print_debug_regs(struct realtek_pci_sdmmc *host)
105#define sd_print_debug_regs(host) 86#define sd_print_debug_regs(host)
106#endif /* DEBUG */ 87#endif /* DEBUG */
107 88
108static void sd_isr_done_transfer(struct platform_device *pdev)
109{
110 struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev);
111
112 spin_lock(&host->lock);
113 if (host->cmd)
114 tasklet_schedule(&host->cmd_tasklet);
115 if (host->data)
116 tasklet_schedule(&host->data_tasklet);
117 spin_unlock(&host->lock);
118}
119
120static void sd_request_timeout(unsigned long host_addr)
121{
122 struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr;
123 unsigned long flags;
124
125 spin_lock_irqsave(&host->lock, flags);
126
127 if (!host->mrq) {
128 dev_err(sdmmc_dev(host), "error: no request exist\n");
129 goto out;
130 }
131
132 if (host->cmd)
133 host->cmd->error = -ETIMEDOUT;
134 if (host->data)
135 host->data->error = -ETIMEDOUT;
136
137 dev_dbg(sdmmc_dev(host), "timeout for request\n");
138
139out:
140 tasklet_schedule(&host->finish_tasklet);
141 spin_unlock_irqrestore(&host->lock, flags);
142}
143
144static void sd_finish_request(unsigned long host_addr)
145{
146 struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr;
147 struct rtsx_pcr *pcr = host->pcr;
148 struct mmc_request *mrq;
149 struct mmc_command *cmd;
150 struct mmc_data *data;
151 unsigned long flags;
152 bool any_error;
153
154 spin_lock_irqsave(&host->lock, flags);
155
156 del_timer(&host->timer);
157 mrq = host->mrq;
158 if (!mrq) {
159 dev_err(sdmmc_dev(host), "error: no request need finish\n");
160 goto out;
161 }
162
163 cmd = mrq->cmd;
164 data = mrq->data;
165
166 any_error = (mrq->sbc && mrq->sbc->error) ||
167 (mrq->stop && mrq->stop->error) ||
168 (cmd && cmd->error) || (data && data->error);
169
170 if (any_error) {
171 rtsx_pci_stop_cmd(pcr);
172 sd_clear_error(host);
173 }
174
175 if (data) {
176 if (any_error)
177 data->bytes_xfered = 0;
178 else
179 data->bytes_xfered = data->blocks * data->blksz;
180
181 if (!data->host_cookie)
182 rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len,
183 data->flags & MMC_DATA_READ);
184
185 }
186
187 host->mrq = NULL;
188 host->cmd = NULL;
189 host->data = NULL;
190
191out:
192 spin_unlock_irqrestore(&host->lock, flags);
193 mutex_unlock(&pcr->pcr_mutex);
194 mmc_request_done(host->mmc, mrq);
195}
196
197static int sd_read_data(struct realtek_pci_sdmmc *host, u8 *cmd, u16 byte_cnt, 89static int sd_read_data(struct realtek_pci_sdmmc *host, u8 *cmd, u16 byte_cnt,
198 u8 *buf, int buf_len, int timeout) 90 u8 *buf, int buf_len, int timeout)
199{ 91{
@@ -311,7 +203,8 @@ static int sd_write_data(struct realtek_pci_sdmmc *host, u8 *cmd, u16 byte_cnt,
311 return 0; 203 return 0;
312} 204}
313 205
314static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) 206static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
207 struct mmc_command *cmd)
315{ 208{
316 struct rtsx_pcr *pcr = host->pcr; 209 struct rtsx_pcr *pcr = host->pcr;
317 u8 cmd_idx = (u8)cmd->opcode; 210 u8 cmd_idx = (u8)cmd->opcode;
@@ -319,14 +212,11 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd)
319 int err = 0; 212 int err = 0;
320 int timeout = 100; 213 int timeout = 100;
321 int i; 214 int i;
215 u8 *ptr;
216 int stat_idx = 0;
322 u8 rsp_type; 217 u8 rsp_type;
323 int rsp_len = 5; 218 int rsp_len = 5;
324 unsigned long flags; 219 bool clock_toggled = false;
325
326 if (host->cmd)
327 dev_err(sdmmc_dev(host), "error: cmd already exist\n");
328
329 host->cmd = cmd;
330 220
331 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n", 221 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
332 __func__, cmd_idx, arg); 222 __func__, cmd_idx, arg);
@@ -361,8 +251,6 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd)
361 err = -EINVAL; 251 err = -EINVAL;
362 goto out; 252 goto out;
363 } 253 }
364 host->rsp_type = rsp_type;
365 host->rsp_len = rsp_len;
366 254
367 if (rsp_type == SD_RSP_TYPE_R1b) 255 if (rsp_type == SD_RSP_TYPE_R1b)
368 timeout = 3000; 256 timeout = 3000;
@@ -372,6 +260,8 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd)
372 0xFF, SD_CLK_TOGGLE_EN); 260 0xFF, SD_CLK_TOGGLE_EN);
373 if (err < 0) 261 if (err < 0)
374 goto out; 262 goto out;
263
264 clock_toggled = true;
375 } 265 }
376 266
377 rtsx_pci_init_cmd(pcr); 267 rtsx_pci_init_cmd(pcr);
@@ -395,60 +285,25 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd)
395 /* Read data from ping-pong buffer */ 285 /* Read data from ping-pong buffer */
396 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++) 286 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
397 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); 287 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);
288 stat_idx = 16;
398 } else if (rsp_type != SD_RSP_TYPE_R0) { 289 } else if (rsp_type != SD_RSP_TYPE_R0) {
399 /* Read data from SD_CMDx registers */ 290 /* Read data from SD_CMDx registers */
400 for (i = SD_CMD0; i <= SD_CMD4; i++) 291 for (i = SD_CMD0; i <= SD_CMD4; i++)
401 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); 292 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);
293 stat_idx = 5;
402 } 294 }
403 295
404 rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0); 296 rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0);
405 297
406 mod_timer(&host->timer, jiffies + msecs_to_jiffies(timeout)); 298 err = rtsx_pci_send_cmd(pcr, timeout);
407 299 if (err < 0) {
408 spin_lock_irqsave(&pcr->lock, flags); 300 sd_print_debug_regs(host);
409 pcr->trans_result = TRANS_NOT_READY; 301 sd_clear_error(host);
410 rtsx_pci_send_cmd_no_wait(pcr); 302 dev_dbg(sdmmc_dev(host),
411 spin_unlock_irqrestore(&pcr->lock, flags); 303 "rtsx_pci_send_cmd error (err = %d)\n", err);
412
413 return;
414
415out:
416 cmd->error = err;
417 tasklet_schedule(&host->finish_tasklet);
418}
419
420static void sd_get_rsp(unsigned long host_addr)
421{
422 struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr;
423 struct rtsx_pcr *pcr = host->pcr;
424 struct mmc_command *cmd;
425 int i, err = 0, stat_idx;
426 u8 *ptr, rsp_type;
427 unsigned long flags;
428
429 spin_lock_irqsave(&host->lock, flags);
430
431 cmd = host->cmd;
432 host->cmd = NULL;
433
434 if (!cmd) {
435 dev_err(sdmmc_dev(host), "error: cmd not exist\n");
436 goto out; 304 goto out;
437 } 305 }
438 306
439 spin_lock(&pcr->lock);
440 if (pcr->trans_result == TRANS_NO_DEVICE)
441 err = -ENODEV;
442 else if (pcr->trans_result != TRANS_RESULT_OK)
443 err = -EINVAL;
444 spin_unlock(&pcr->lock);
445
446 if (err < 0)
447 goto out;
448
449 rsp_type = host->rsp_type;
450 stat_idx = host->rsp_len;
451
452 if (rsp_type == SD_RSP_TYPE_R0) { 307 if (rsp_type == SD_RSP_TYPE_R0) {
453 err = 0; 308 err = 0;
454 goto out; 309 goto out;
@@ -485,106 +340,26 @@ static void sd_get_rsp(unsigned long host_addr)
485 cmd->resp[0]); 340 cmd->resp[0]);
486 } 341 }
487 342
488 if (cmd == host->mrq->sbc) {
489 sd_send_cmd(host, host->mrq->cmd);
490 spin_unlock_irqrestore(&host->lock, flags);
491 return;
492 }
493
494 if (cmd == host->mrq->stop)
495 goto out;
496
497 if (cmd->data) {
498 sd_start_multi_rw(host, host->mrq);
499 spin_unlock_irqrestore(&host->lock, flags);
500 return;
501 }
502
503out: 343out:
504 cmd->error = err; 344 cmd->error = err;
505 345
506 tasklet_schedule(&host->finish_tasklet); 346 if (err && clock_toggled)
507 spin_unlock_irqrestore(&host->lock, flags); 347 rtsx_pci_write_register(pcr, SD_BUS_STAT,
508} 348 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
509
510static int sd_pre_dma_transfer(struct realtek_pci_sdmmc *host,
511 struct mmc_data *data, struct realtek_next *next)
512{
513 struct rtsx_pcr *pcr = host->pcr;
514 int read = data->flags & MMC_DATA_READ;
515 int sg_count = 0;
516
517 if (!next && data->host_cookie &&
518 data->host_cookie != host->next_data.cookie) {
519 dev_err(sdmmc_dev(host),
520 "error: invalid cookie data[%d] host[%d]\n",
521 data->host_cookie, host->next_data.cookie);
522 data->host_cookie = 0;
523 }
524
525 if (next || (!next && data->host_cookie != host->next_data.cookie))
526 sg_count = rtsx_pci_dma_map_sg(pcr,
527 data->sg, data->sg_len, read);
528 else
529 sg_count = host->next_data.sg_count;
530
531 if (next) {
532 next->sg_count = sg_count;
533 if (++next->cookie < 0)
534 next->cookie = 1;
535 data->host_cookie = next->cookie;
536 }
537
538 return sg_count;
539}
540
541static void sdmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq,
542 bool is_first_req)
543{
544 struct realtek_pci_sdmmc *host = mmc_priv(mmc);
545 struct mmc_data *data = mrq->data;
546
547 if (data->host_cookie) {
548 dev_err(sdmmc_dev(host),
549 "error: descard already cookie data[%d]\n",
550 data->host_cookie);
551 data->host_cookie = 0;
552 }
553
554 dev_dbg(sdmmc_dev(host), "dma sg prepared: %d\n",
555 sd_pre_dma_transfer(host, data, &host->next_data));
556}
557
558static void sdmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq,
559 int err)
560{
561 struct realtek_pci_sdmmc *host = mmc_priv(mmc);
562 struct rtsx_pcr *pcr = host->pcr;
563 struct mmc_data *data = mrq->data;
564 int read = data->flags & MMC_DATA_READ;
565
566 rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read);
567 data->host_cookie = 0;
568} 349}
569 350
570static int sd_start_multi_rw(struct realtek_pci_sdmmc *host, 351static int sd_rw_multi(struct realtek_pci_sdmmc *host, struct mmc_request *mrq)
571 struct mmc_request *mrq)
572{ 352{
573 struct rtsx_pcr *pcr = host->pcr; 353 struct rtsx_pcr *pcr = host->pcr;
574 struct mmc_host *mmc = host->mmc; 354 struct mmc_host *mmc = host->mmc;
575 struct mmc_card *card = mmc->card; 355 struct mmc_card *card = mmc->card;
576 struct mmc_data *data = mrq->data; 356 struct mmc_data *data = mrq->data;
577 int uhs = mmc_card_uhs(card); 357 int uhs = mmc_card_uhs(card);
578 int read = data->flags & MMC_DATA_READ; 358 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
579 u8 cfg2, trans_mode; 359 u8 cfg2, trans_mode;
580 int err; 360 int err;
581 size_t data_len = data->blksz * data->blocks; 361 size_t data_len = data->blksz * data->blocks;
582 362
583 if (host->data)
584 dev_err(sdmmc_dev(host), "error: data already exist\n");
585
586 host->data = data;
587
588 if (read) { 363 if (read) {
589 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | 364 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
590 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0; 365 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
@@ -635,54 +410,15 @@ static int sd_start_multi_rw(struct realtek_pci_sdmmc *host,
635 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, 410 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,
636 SD_TRANSFER_END, SD_TRANSFER_END); 411 SD_TRANSFER_END, SD_TRANSFER_END);
637 412
638 mod_timer(&host->timer, jiffies + 10 * HZ);
639 rtsx_pci_send_cmd_no_wait(pcr); 413 rtsx_pci_send_cmd_no_wait(pcr);
640 414
641 err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, read); 415 err = rtsx_pci_transfer_data(pcr, data->sg, data->sg_len, read, 10000);
642 if (err < 0) {
643 data->error = err;
644 tasklet_schedule(&host->finish_tasklet);
645 }
646 return 0;
647}
648
649static void sd_finish_multi_rw(unsigned long host_addr)
650{
651 struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr;
652 struct rtsx_pcr *pcr = host->pcr;
653 struct mmc_data *data;
654 int err = 0;
655 unsigned long flags;
656
657 spin_lock_irqsave(&host->lock, flags);
658
659 if (!host->data) {
660 dev_err(sdmmc_dev(host), "error: no data exist\n");
661 goto out;
662 }
663
664 data = host->data;
665 host->data = NULL;
666
667 if (pcr->trans_result == TRANS_NO_DEVICE)
668 err = -ENODEV;
669 else if (pcr->trans_result != TRANS_RESULT_OK)
670 err = -EINVAL;
671
672 if (err < 0) { 416 if (err < 0) {
673 data->error = err; 417 sd_clear_error(host);
674 goto out; 418 return err;
675 }
676
677 if (!host->mrq->sbc && data->stop) {
678 sd_send_cmd(host, data->stop);
679 spin_unlock_irqrestore(&host->lock, flags);
680 return;
681 } 419 }
682 420
683out: 421 return 0;
684 tasklet_schedule(&host->finish_tasklet);
685 spin_unlock_irqrestore(&host->lock, flags);
686} 422}
687 423
688static inline void sd_enable_initial_mode(struct realtek_pci_sdmmc *host) 424static inline void sd_enable_initial_mode(struct realtek_pci_sdmmc *host)
@@ -901,13 +637,6 @@ static int sd_tuning_rx(struct realtek_pci_sdmmc *host, u8 opcode)
901 return 0; 637 return 0;
902} 638}
903 639
904static inline bool sd_use_muti_rw(struct mmc_command *cmd)
905{
906 return mmc_op_multi(cmd->opcode) ||
907 (cmd->opcode == MMC_READ_SINGLE_BLOCK) ||
908 (cmd->opcode == MMC_WRITE_BLOCK);
909}
910
911static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 640static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
912{ 641{
913 struct realtek_pci_sdmmc *host = mmc_priv(mmc); 642 struct realtek_pci_sdmmc *host = mmc_priv(mmc);
@@ -916,14 +645,6 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
916 struct mmc_data *data = mrq->data; 645 struct mmc_data *data = mrq->data;
917 unsigned int data_size = 0; 646 unsigned int data_size = 0;
918 int err; 647 int err;
919 unsigned long flags;
920
921 mutex_lock(&pcr->pcr_mutex);
922 spin_lock_irqsave(&host->lock, flags);
923
924 if (host->mrq)
925 dev_err(sdmmc_dev(host), "error: request already exist\n");
926 host->mrq = mrq;
927 648
928 if (host->eject) { 649 if (host->eject) {
929 cmd->error = -ENOMEDIUM; 650 cmd->error = -ENOMEDIUM;
@@ -936,6 +657,8 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
936 goto finish; 657 goto finish;
937 } 658 }
938 659
660 mutex_lock(&pcr->pcr_mutex);
661
939 rtsx_pci_start_run(pcr); 662 rtsx_pci_start_run(pcr);
940 663
941 rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth, 664 rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth,
@@ -944,28 +667,46 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
944 rtsx_pci_write_register(pcr, CARD_SHARE_MODE, 667 rtsx_pci_write_register(pcr, CARD_SHARE_MODE,
945 CARD_SHARE_MASK, CARD_SHARE_48_SD); 668 CARD_SHARE_MASK, CARD_SHARE_48_SD);
946 669
670 mutex_lock(&host->host_mutex);
671 host->mrq = mrq;
672 mutex_unlock(&host->host_mutex);
673
947 if (mrq->data) 674 if (mrq->data)
948 data_size = data->blocks * data->blksz; 675 data_size = data->blocks * data->blksz;
949 676
950 if (sd_use_muti_rw(cmd)) 677 if (!data_size || mmc_op_multi(cmd->opcode) ||
951 host->sg_count = sd_pre_dma_transfer(host, data, NULL); 678 (cmd->opcode == MMC_READ_SINGLE_BLOCK) ||
679 (cmd->opcode == MMC_WRITE_BLOCK)) {
680 sd_send_cmd_get_rsp(host, cmd);
952 681
953 if (!data_size || sd_use_muti_rw(cmd)) { 682 if (!cmd->error && data_size) {
954 if (mrq->sbc) 683 sd_rw_multi(host, mrq);
955 sd_send_cmd(host, mrq->sbc); 684
956 else 685 if (mmc_op_multi(cmd->opcode) && mrq->stop)
957 sd_send_cmd(host, cmd); 686 sd_send_cmd_get_rsp(host, mrq->stop);
958 spin_unlock_irqrestore(&host->lock, flags); 687 }
959 } else { 688 } else {
960 spin_unlock_irqrestore(&host->lock, flags);
961 sd_normal_rw(host, mrq); 689 sd_normal_rw(host, mrq);
962 tasklet_schedule(&host->finish_tasklet);
963 } 690 }
964 return; 691
692 if (mrq->data) {
693 if (cmd->error || data->error)
694 data->bytes_xfered = 0;
695 else
696 data->bytes_xfered = data->blocks * data->blksz;
697 }
698
699 mutex_unlock(&pcr->pcr_mutex);
965 700
966finish: 701finish:
967 tasklet_schedule(&host->finish_tasklet); 702 if (cmd->error)
968 spin_unlock_irqrestore(&host->lock, flags); 703 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
704
705 mutex_lock(&host->host_mutex);
706 host->mrq = NULL;
707 mutex_unlock(&host->host_mutex);
708
709 mmc_request_done(mmc, mrq);
969} 710}
970 711
971static int sd_set_bus_width(struct realtek_pci_sdmmc *host, 712static int sd_set_bus_width(struct realtek_pci_sdmmc *host,
@@ -1400,8 +1141,6 @@ out:
1400} 1141}
1401 1142
1402static const struct mmc_host_ops realtek_pci_sdmmc_ops = { 1143static const struct mmc_host_ops realtek_pci_sdmmc_ops = {
1403 .pre_req = sdmmc_pre_req,
1404 .post_req = sdmmc_post_req,
1405 .request = sdmmc_request, 1144 .request = sdmmc_request,
1406 .set_ios = sdmmc_set_ios, 1145 .set_ios = sdmmc_set_ios,
1407 .get_ro = sdmmc_get_ro, 1146 .get_ro = sdmmc_get_ro,
@@ -1465,7 +1204,6 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev)
1465 struct realtek_pci_sdmmc *host; 1204 struct realtek_pci_sdmmc *host;
1466 struct rtsx_pcr *pcr; 1205 struct rtsx_pcr *pcr;
1467 struct pcr_handle *handle = pdev->dev.platform_data; 1206 struct pcr_handle *handle = pdev->dev.platform_data;
1468 unsigned long host_addr;
1469 1207
1470 if (!handle) 1208 if (!handle)
1471 return -ENXIO; 1209 return -ENXIO;
@@ -1489,15 +1227,8 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev)
1489 pcr->slots[RTSX_SD_CARD].p_dev = pdev; 1227 pcr->slots[RTSX_SD_CARD].p_dev = pdev;
1490 pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event; 1228 pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event;
1491 1229
1492 host_addr = (unsigned long)host; 1230 mutex_init(&host->host_mutex);
1493 host->next_data.cookie = 1;
1494 setup_timer(&host->timer, sd_request_timeout, host_addr);
1495 tasklet_init(&host->cmd_tasklet, sd_get_rsp, host_addr);
1496 tasklet_init(&host->data_tasklet, sd_finish_multi_rw, host_addr);
1497 tasklet_init(&host->finish_tasklet, sd_finish_request, host_addr);
1498 spin_lock_init(&host->lock);
1499 1231
1500 pcr->slots[RTSX_SD_CARD].done_transfer = sd_isr_done_transfer;
1501 realtek_init_host(host); 1232 realtek_init_host(host);
1502 1233
1503 mmc_add_host(mmc); 1234 mmc_add_host(mmc);
@@ -1510,8 +1241,6 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev)
1510 struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev); 1241 struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev);
1511 struct rtsx_pcr *pcr; 1242 struct rtsx_pcr *pcr;
1512 struct mmc_host *mmc; 1243 struct mmc_host *mmc;
1513 struct mmc_request *mrq;
1514 unsigned long flags;
1515 1244
1516 if (!host) 1245 if (!host)
1517 return 0; 1246 return 0;
@@ -1519,33 +1248,22 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev)
1519 pcr = host->pcr; 1248 pcr = host->pcr;
1520 pcr->slots[RTSX_SD_CARD].p_dev = NULL; 1249 pcr->slots[RTSX_SD_CARD].p_dev = NULL;
1521 pcr->slots[RTSX_SD_CARD].card_event = NULL; 1250 pcr->slots[RTSX_SD_CARD].card_event = NULL;
1522 pcr->slots[RTSX_SD_CARD].done_transfer = NULL;
1523 mmc = host->mmc; 1251 mmc = host->mmc;
1524 mrq = host->mrq;
1525 1252
1526 spin_lock_irqsave(&host->lock, flags); 1253 mutex_lock(&host->host_mutex);
1527 if (host->mrq) { 1254 if (host->mrq) {
1528 dev_dbg(&(pdev->dev), 1255 dev_dbg(&(pdev->dev),
1529 "%s: Controller removed during transfer\n", 1256 "%s: Controller removed during transfer\n",
1530 mmc_hostname(mmc)); 1257 mmc_hostname(mmc));
1531 1258
1532 if (mrq->sbc) 1259 rtsx_pci_complete_unfinished_transfer(pcr);
1533 mrq->sbc->error = -ENOMEDIUM;
1534 if (mrq->cmd)
1535 mrq->cmd->error = -ENOMEDIUM;
1536 if (mrq->stop)
1537 mrq->stop->error = -ENOMEDIUM;
1538 if (mrq->data)
1539 mrq->data->error = -ENOMEDIUM;
1540 1260
1541 tasklet_schedule(&host->finish_tasklet); 1261 host->mrq->cmd->error = -ENOMEDIUM;
1262 if (host->mrq->stop)
1263 host->mrq->stop->error = -ENOMEDIUM;
1264 mmc_request_done(mmc, host->mrq);
1542 } 1265 }
1543 spin_unlock_irqrestore(&host->lock, flags); 1266 mutex_unlock(&host->host_mutex);
1544
1545 del_timer_sync(&host->timer);
1546 tasklet_kill(&host->cmd_tasklet);
1547 tasklet_kill(&host->data_tasklet);
1548 tasklet_kill(&host->finish_tasklet);
1549 1267
1550 mmc_remove_host(mmc); 1268 mmc_remove_host(mmc);
1551 host->eject = true; 1269 host->eject = true;
diff --git a/drivers/mtd/devices/spear_smi.c b/drivers/mtd/devices/spear_smi.c
index 363da96e6891..c4176b0f382d 100644
--- a/drivers/mtd/devices/spear_smi.c
+++ b/drivers/mtd/devices/spear_smi.c
@@ -6,7 +6,7 @@
6 * 6 *
7 * Copyright © 2010 STMicroelectronics. 7 * Copyright © 2010 STMicroelectronics.
8 * Ashish Priyadarshi 8 * Ashish Priyadarshi
9 * Shiraz Hashim <shiraz.hashim@st.com> 9 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
10 * 10 *
11 * This file is licensed under the terms of the GNU General Public 11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any 12 * License version 2. This program is licensed "as is" without any
@@ -1089,5 +1089,5 @@ static struct platform_driver spear_smi_driver = {
1089module_platform_driver(spear_smi_driver); 1089module_platform_driver(spear_smi_driver);
1090 1090
1091MODULE_LICENSE("GPL"); 1091MODULE_LICENSE("GPL");
1092MODULE_AUTHOR("Ashish Priyadarshi, Shiraz Hashim <shiraz.hashim@st.com>"); 1092MODULE_AUTHOR("Ashish Priyadarshi, Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
1093MODULE_DESCRIPTION("MTD SMI driver for serial nor flash chips"); 1093MODULE_DESCRIPTION("MTD SMI driver for serial nor flash chips");
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 4615d79fc93f..b922c8efcf40 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -523,6 +523,7 @@ static struct nand_ecclayout hwecc4_2048 = {
523#if defined(CONFIG_OF) 523#if defined(CONFIG_OF)
524static const struct of_device_id davinci_nand_of_match[] = { 524static const struct of_device_id davinci_nand_of_match[] = {
525 {.compatible = "ti,davinci-nand", }, 525 {.compatible = "ti,davinci-nand", },
526 {.compatible = "ti,keystone-nand", },
526 {}, 527 {},
527}; 528};
528MODULE_DEVICE_TABLE(of, davinci_nand_of_match); 529MODULE_DEVICE_TABLE(of, davinci_nand_of_match);
@@ -581,6 +582,11 @@ static struct davinci_nand_pdata
581 of_property_read_bool(pdev->dev.of_node, 582 of_property_read_bool(pdev->dev.of_node,
582 "ti,davinci-nand-use-bbt")) 583 "ti,davinci-nand-use-bbt"))
583 pdata->bbt_options = NAND_BBT_USE_FLASH; 584 pdata->bbt_options = NAND_BBT_USE_FLASH;
585
586 if (of_device_is_compatible(pdev->dev.of_node,
587 "ti,keystone-nand")) {
588 pdata->options |= NAND_NO_SUBPAGE_WRITE;
589 }
584 } 590 }
585 591
586 return dev_get_platdata(&pdev->dev); 592 return dev_get_platdata(&pdev->dev);
diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c
index 7ff473c871a9..8d659e6a1b4c 100644
--- a/drivers/mtd/ubi/block.c
+++ b/drivers/mtd/ubi/block.c
@@ -431,7 +431,7 @@ int ubiblock_create(struct ubi_volume_info *vi)
431 * Create one workqueue per volume (per registered block device). 431 * Create one workqueue per volume (per registered block device).
432 * Rembember workqueues are cheap, they're not threads. 432 * Rembember workqueues are cheap, they're not threads.
433 */ 433 */
434 dev->wq = alloc_workqueue(gd->disk_name, 0, 0); 434 dev->wq = alloc_workqueue("%s", 0, 0, gd->disk_name);
435 if (!dev->wq) 435 if (!dev->wq)
436 goto out_free_queue; 436 goto out_free_queue;
437 INIT_WORK(&dev->work, ubiblock_do_work); 437 INIT_WORK(&dev->work, ubiblock_do_work);
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index 02317c1c0238..0f3425dac910 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -671,6 +671,8 @@ static struct ubi_wl_entry *get_peb_for_wl(struct ubi_device *ubi)
671 671
672 e = find_wl_entry(ubi, &ubi->free, WL_FREE_MAX_DIFF); 672 e = find_wl_entry(ubi, &ubi->free, WL_FREE_MAX_DIFF);
673 self_check_in_wl_tree(ubi, e, &ubi->free); 673 self_check_in_wl_tree(ubi, e, &ubi->free);
674 ubi->free_count--;
675 ubi_assert(ubi->free_count >= 0);
674 rb_erase(&e->u.rb, &ubi->free); 676 rb_erase(&e->u.rb, &ubi->free);
675 677
676 return e; 678 return e;
@@ -684,6 +686,9 @@ int ubi_wl_get_peb(struct ubi_device *ubi)
684 peb = __wl_get_peb(ubi); 686 peb = __wl_get_peb(ubi);
685 spin_unlock(&ubi->wl_lock); 687 spin_unlock(&ubi->wl_lock);
686 688
689 if (peb < 0)
690 return peb;
691
687 err = ubi_self_check_all_ff(ubi, peb, ubi->vid_hdr_aloffset, 692 err = ubi_self_check_all_ff(ubi, peb, ubi->vid_hdr_aloffset,
688 ubi->peb_size - ubi->vid_hdr_aloffset); 693 ubi->peb_size - ubi->vid_hdr_aloffset);
689 if (err) { 694 if (err) {
@@ -1068,6 +1073,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
1068 1073
1069 /* Give the unused PEB back */ 1074 /* Give the unused PEB back */
1070 wl_tree_add(e2, &ubi->free); 1075 wl_tree_add(e2, &ubi->free);
1076 ubi->free_count++;
1071 goto out_cancel; 1077 goto out_cancel;
1072 } 1078 }
1073 self_check_in_wl_tree(ubi, e1, &ubi->used); 1079 self_check_in_wl_tree(ubi, e1, &ubi->used);
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 0e8b268da0a0..5f6babcfc26e 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -534,7 +534,7 @@ static ssize_t bonding_show_min_links(struct device *d,
534{ 534{
535 struct bonding *bond = to_bond(d); 535 struct bonding *bond = to_bond(d);
536 536
537 return sprintf(buf, "%d\n", bond->params.min_links); 537 return sprintf(buf, "%u\n", bond->params.min_links);
538} 538}
539 539
540static ssize_t bonding_store_min_links(struct device *d, 540static ssize_t bonding_store_min_links(struct device *d,
diff --git a/drivers/net/can/c_can/Kconfig b/drivers/net/can/c_can/Kconfig
index 61ffc12d8fd8..8ab7103d4f44 100644
--- a/drivers/net/can/c_can/Kconfig
+++ b/drivers/net/can/c_can/Kconfig
@@ -14,6 +14,13 @@ config CAN_C_CAN_PLATFORM
14 SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com) 14 SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com)
15 boards like am335x, dm814x, dm813x and dm811x. 15 boards like am335x, dm814x, dm813x and dm811x.
16 16
17config CAN_C_CAN_STRICT_FRAME_ORDERING
18 bool "Force a strict RX CAN frame order (may cause frame loss)"
19 ---help---
20 The RX split buffer prevents packet reordering but can cause packet
21 loss. Only enable this option when you accept to lose CAN frames
22 in favour of getting the received CAN frames in the correct order.
23
17config CAN_C_CAN_PCI 24config CAN_C_CAN_PCI
18 tristate "Generic PCI Bus based C_CAN/D_CAN driver" 25 tristate "Generic PCI Bus based C_CAN/D_CAN driver"
19 depends on PCI 26 depends on PCI
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index a5c8dcfa8357..a2ca820b5373 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -60,6 +60,8 @@
60#define CONTROL_IE BIT(1) 60#define CONTROL_IE BIT(1)
61#define CONTROL_INIT BIT(0) 61#define CONTROL_INIT BIT(0)
62 62
63#define CONTROL_IRQMSK (CONTROL_EIE | CONTROL_IE | CONTROL_SIE)
64
63/* test register */ 65/* test register */
64#define TEST_RX BIT(7) 66#define TEST_RX BIT(7)
65#define TEST_TX1 BIT(6) 67#define TEST_TX1 BIT(6)
@@ -108,11 +110,14 @@
108#define IF_COMM_CONTROL BIT(4) 110#define IF_COMM_CONTROL BIT(4)
109#define IF_COMM_CLR_INT_PND BIT(3) 111#define IF_COMM_CLR_INT_PND BIT(3)
110#define IF_COMM_TXRQST BIT(2) 112#define IF_COMM_TXRQST BIT(2)
113#define IF_COMM_CLR_NEWDAT IF_COMM_TXRQST
111#define IF_COMM_DATAA BIT(1) 114#define IF_COMM_DATAA BIT(1)
112#define IF_COMM_DATAB BIT(0) 115#define IF_COMM_DATAB BIT(0)
113#define IF_COMM_ALL (IF_COMM_MASK | IF_COMM_ARB | \ 116
114 IF_COMM_CONTROL | IF_COMM_TXRQST | \ 117/* TX buffer setup */
115 IF_COMM_DATAA | IF_COMM_DATAB) 118#define IF_COMM_TX (IF_COMM_ARB | IF_COMM_CONTROL | \
119 IF_COMM_TXRQST | \
120 IF_COMM_DATAA | IF_COMM_DATAB)
116 121
117/* For the low buffers we clear the interrupt bit, but keep newdat */ 122/* For the low buffers we clear the interrupt bit, but keep newdat */
118#define IF_COMM_RCV_LOW (IF_COMM_MASK | IF_COMM_ARB | \ 123#define IF_COMM_RCV_LOW (IF_COMM_MASK | IF_COMM_ARB | \
@@ -120,12 +125,19 @@
120 IF_COMM_DATAA | IF_COMM_DATAB) 125 IF_COMM_DATAA | IF_COMM_DATAB)
121 126
122/* For the high buffers we clear the interrupt bit and newdat */ 127/* For the high buffers we clear the interrupt bit and newdat */
123#define IF_COMM_RCV_HIGH (IF_COMM_RCV_LOW | IF_COMM_TXRQST) 128#define IF_COMM_RCV_HIGH (IF_COMM_RCV_LOW | IF_COMM_CLR_NEWDAT)
129
130
131/* Receive setup of message objects */
132#define IF_COMM_RCV_SETUP (IF_COMM_MASK | IF_COMM_ARB | IF_COMM_CONTROL)
133
134/* Invalidation of message objects */
135#define IF_COMM_INVAL (IF_COMM_ARB | IF_COMM_CONTROL)
124 136
125/* IFx arbitration */ 137/* IFx arbitration */
126#define IF_ARB_MSGVAL BIT(15) 138#define IF_ARB_MSGVAL BIT(31)
127#define IF_ARB_MSGXTD BIT(14) 139#define IF_ARB_MSGXTD BIT(30)
128#define IF_ARB_TRANSMIT BIT(13) 140#define IF_ARB_TRANSMIT BIT(29)
129 141
130/* IFx message control */ 142/* IFx message control */
131#define IF_MCONT_NEWDAT BIT(15) 143#define IF_MCONT_NEWDAT BIT(15)
@@ -139,19 +151,17 @@
139#define IF_MCONT_EOB BIT(7) 151#define IF_MCONT_EOB BIT(7)
140#define IF_MCONT_DLC_MASK 0xf 152#define IF_MCONT_DLC_MASK 0xf
141 153
154#define IF_MCONT_RCV (IF_MCONT_RXIE | IF_MCONT_UMASK)
155#define IF_MCONT_RCV_EOB (IF_MCONT_RCV | IF_MCONT_EOB)
156
157#define IF_MCONT_TX (IF_MCONT_TXIE | IF_MCONT_EOB)
158
142/* 159/*
143 * Use IF1 for RX and IF2 for TX 160 * Use IF1 for RX and IF2 for TX
144 */ 161 */
145#define IF_RX 0 162#define IF_RX 0
146#define IF_TX 1 163#define IF_TX 1
147 164
148/* status interrupt */
149#define STATUS_INTERRUPT 0x8000
150
151/* global interrupt masks */
152#define ENABLE_ALL_INTERRUPTS 1
153#define DISABLE_ALL_INTERRUPTS 0
154
155/* minimum timeout for checking BUSY status */ 165/* minimum timeout for checking BUSY status */
156#define MIN_TIMEOUT_VALUE 6 166#define MIN_TIMEOUT_VALUE 6
157 167
@@ -171,6 +181,7 @@ enum c_can_lec_type {
171 LEC_BIT0_ERROR, 181 LEC_BIT0_ERROR,
172 LEC_CRC_ERROR, 182 LEC_CRC_ERROR,
173 LEC_UNUSED, 183 LEC_UNUSED,
184 LEC_MASK = LEC_UNUSED,
174}; 185};
175 186
176/* 187/*
@@ -226,143 +237,115 @@ static inline void c_can_reset_ram(const struct c_can_priv *priv, bool enable)
226 priv->raminit(priv, enable); 237 priv->raminit(priv, enable);
227} 238}
228 239
229static inline int get_tx_next_msg_obj(const struct c_can_priv *priv) 240static void c_can_irq_control(struct c_can_priv *priv, bool enable)
230{ 241{
231 return (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) + 242 u32 ctrl = priv->read_reg(priv, C_CAN_CTRL_REG) & ~CONTROL_IRQMSK;
232 C_CAN_MSG_OBJ_TX_FIRST;
233}
234
235static inline int get_tx_echo_msg_obj(int txecho)
236{
237 return (txecho & C_CAN_NEXT_MSG_OBJ_MASK) + C_CAN_MSG_OBJ_TX_FIRST;
238}
239
240static u32 c_can_read_reg32(struct c_can_priv *priv, enum reg index)
241{
242 u32 val = priv->read_reg(priv, index);
243 val |= ((u32) priv->read_reg(priv, index + 1)) << 16;
244 return val;
245}
246
247static void c_can_enable_all_interrupts(struct c_can_priv *priv,
248 int enable)
249{
250 unsigned int cntrl_save = priv->read_reg(priv,
251 C_CAN_CTRL_REG);
252 243
253 if (enable) 244 if (enable)
254 cntrl_save |= (CONTROL_SIE | CONTROL_EIE | CONTROL_IE); 245 ctrl |= CONTROL_IRQMSK;
255 else
256 cntrl_save &= ~(CONTROL_EIE | CONTROL_IE | CONTROL_SIE);
257 246
258 priv->write_reg(priv, C_CAN_CTRL_REG, cntrl_save); 247 priv->write_reg(priv, C_CAN_CTRL_REG, ctrl);
259} 248}
260 249
261static inline int c_can_msg_obj_is_busy(struct c_can_priv *priv, int iface) 250static void c_can_obj_update(struct net_device *dev, int iface, u32 cmd, u32 obj)
262{ 251{
263 int count = MIN_TIMEOUT_VALUE; 252 struct c_can_priv *priv = netdev_priv(dev);
253 int cnt, reg = C_CAN_IFACE(COMREQ_REG, iface);
254
255 priv->write_reg(priv, reg + 1, cmd);
256 priv->write_reg(priv, reg, obj);
264 257
265 while (count && priv->read_reg(priv, 258 for (cnt = MIN_TIMEOUT_VALUE; cnt; cnt--) {
266 C_CAN_IFACE(COMREQ_REG, iface)) & 259 if (!(priv->read_reg(priv, reg) & IF_COMR_BUSY))
267 IF_COMR_BUSY) { 260 return;
268 count--;
269 udelay(1); 261 udelay(1);
270 } 262 }
263 netdev_err(dev, "Updating object timed out\n");
271 264
272 if (!count) 265}
273 return 1;
274 266
275 return 0; 267static inline void c_can_object_get(struct net_device *dev, int iface,
268 u32 obj, u32 cmd)
269{
270 c_can_obj_update(dev, iface, cmd, obj);
276} 271}
277 272
278static inline void c_can_object_get(struct net_device *dev, 273static inline void c_can_object_put(struct net_device *dev, int iface,
279 int iface, int objno, int mask) 274 u32 obj, u32 cmd)
280{ 275{
281 struct c_can_priv *priv = netdev_priv(dev); 276 c_can_obj_update(dev, iface, cmd | IF_COMM_WR, obj);
277}
282 278
283 /* 279/*
284 * As per specs, after writting the message object number in the 280 * Note: According to documentation clearing TXIE while MSGVAL is set
285 * IF command request register the transfer b/w interface 281 * is not allowed, but works nicely on C/DCAN. And that lowers the I/O
286 * register and message RAM must be complete in 6 CAN-CLK 282 * load significantly.
287 * period. 283 */
288 */ 284static void c_can_inval_tx_object(struct net_device *dev, int iface, int obj)
289 priv->write_reg(priv, C_CAN_IFACE(COMMSK_REG, iface), 285{
290 IFX_WRITE_LOW_16BIT(mask)); 286 struct c_can_priv *priv = netdev_priv(dev);
291 priv->write_reg(priv, C_CAN_IFACE(COMREQ_REG, iface),
292 IFX_WRITE_LOW_16BIT(objno));
293 287
294 if (c_can_msg_obj_is_busy(priv, iface)) 288 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 0);
295 netdev_err(dev, "timed out in object get\n"); 289 c_can_object_put(dev, iface, obj, IF_COMM_INVAL);
296} 290}
297 291
298static inline void c_can_object_put(struct net_device *dev, 292static void c_can_inval_msg_object(struct net_device *dev, int iface, int obj)
299 int iface, int objno, int mask)
300{ 293{
301 struct c_can_priv *priv = netdev_priv(dev); 294 struct c_can_priv *priv = netdev_priv(dev);
302 295
303 /* 296 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 0);
304 * As per specs, after writting the message object number in the 297 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), 0);
305 * IF command request register the transfer b/w interface 298 c_can_inval_tx_object(dev, iface, obj);
306 * register and message RAM must be complete in 6 CAN-CLK
307 * period.
308 */
309 priv->write_reg(priv, C_CAN_IFACE(COMMSK_REG, iface),
310 (IF_COMM_WR | IFX_WRITE_LOW_16BIT(mask)));
311 priv->write_reg(priv, C_CAN_IFACE(COMREQ_REG, iface),
312 IFX_WRITE_LOW_16BIT(objno));
313
314 if (c_can_msg_obj_is_busy(priv, iface))
315 netdev_err(dev, "timed out in object put\n");
316} 299}
317 300
318static void c_can_write_msg_object(struct net_device *dev, 301static void c_can_setup_tx_object(struct net_device *dev, int iface,
319 int iface, struct can_frame *frame, int objno) 302 struct can_frame *frame, int idx)
320{ 303{
321 int i;
322 u16 flags = 0;
323 unsigned int id;
324 struct c_can_priv *priv = netdev_priv(dev); 304 struct c_can_priv *priv = netdev_priv(dev);
325 305 u16 ctrl = IF_MCONT_TX | frame->can_dlc;
326 if (!(frame->can_id & CAN_RTR_FLAG)) 306 bool rtr = frame->can_id & CAN_RTR_FLAG;
327 flags |= IF_ARB_TRANSMIT; 307 u32 arb = IF_ARB_MSGVAL;
308 int i;
328 309
329 if (frame->can_id & CAN_EFF_FLAG) { 310 if (frame->can_id & CAN_EFF_FLAG) {
330 id = frame->can_id & CAN_EFF_MASK; 311 arb |= frame->can_id & CAN_EFF_MASK;
331 flags |= IF_ARB_MSGXTD; 312 arb |= IF_ARB_MSGXTD;
332 } else 313 } else {
333 id = ((frame->can_id & CAN_SFF_MASK) << 18); 314 arb |= (frame->can_id & CAN_SFF_MASK) << 18;
315 }
316
317 if (!rtr)
318 arb |= IF_ARB_TRANSMIT;
334 319
335 flags |= IF_ARB_MSGVAL; 320 /*
321 * If we change the DIR bit, we need to invalidate the buffer
322 * first, i.e. clear the MSGVAL flag in the arbiter.
323 */
324 if (rtr != (bool)test_bit(idx, &priv->tx_dir)) {
325 u32 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
326
327 c_can_inval_msg_object(dev, iface, obj);
328 change_bit(idx, &priv->tx_dir);
329 }
330
331 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), arb);
332 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), arb >> 16);
336 333
337 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 334 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
338 IFX_WRITE_LOW_16BIT(id));
339 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), flags |
340 IFX_WRITE_HIGH_16BIT(id));
341 335
342 for (i = 0; i < frame->can_dlc; i += 2) { 336 for (i = 0; i < frame->can_dlc; i += 2) {
343 priv->write_reg(priv, C_CAN_IFACE(DATA1_REG, iface) + i / 2, 337 priv->write_reg(priv, C_CAN_IFACE(DATA1_REG, iface) + i / 2,
344 frame->data[i] | (frame->data[i + 1] << 8)); 338 frame->data[i] | (frame->data[i + 1] << 8));
345 } 339 }
346
347 /* enable interrupt for this message object */
348 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface),
349 IF_MCONT_TXIE | IF_MCONT_TXRQST | IF_MCONT_EOB |
350 frame->can_dlc);
351 c_can_object_put(dev, iface, objno, IF_COMM_ALL);
352} 340}
353 341
354static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev, 342static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,
355 int iface, 343 int iface)
356 int ctrl_mask)
357{ 344{
358 int i; 345 int i;
359 struct c_can_priv *priv = netdev_priv(dev);
360 346
361 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++) { 347 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++)
362 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 348 c_can_object_get(dev, iface, i, IF_COMM_CLR_NEWDAT);
363 ctrl_mask & ~IF_MCONT_NEWDAT);
364 c_can_object_put(dev, iface, i, IF_COMM_CONTROL);
365 }
366} 349}
367 350
368static int c_can_handle_lost_msg_obj(struct net_device *dev, 351static int c_can_handle_lost_msg_obj(struct net_device *dev,
@@ -377,6 +360,9 @@ static int c_can_handle_lost_msg_obj(struct net_device *dev,
377 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl); 360 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
378 c_can_object_put(dev, iface, objno, IF_COMM_CONTROL); 361 c_can_object_put(dev, iface, objno, IF_COMM_CONTROL);
379 362
363 stats->rx_errors++;
364 stats->rx_over_errors++;
365
380 /* create an error msg */ 366 /* create an error msg */
381 skb = alloc_can_err_skb(dev, &frame); 367 skb = alloc_can_err_skb(dev, &frame);
382 if (unlikely(!skb)) 368 if (unlikely(!skb))
@@ -384,22 +370,18 @@ static int c_can_handle_lost_msg_obj(struct net_device *dev,
384 370
385 frame->can_id |= CAN_ERR_CRTL; 371 frame->can_id |= CAN_ERR_CRTL;
386 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 372 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
387 stats->rx_errors++;
388 stats->rx_over_errors++;
389 373
390 netif_receive_skb(skb); 374 netif_receive_skb(skb);
391 return 1; 375 return 1;
392} 376}
393 377
394static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl) 378static int c_can_read_msg_object(struct net_device *dev, int iface, u32 ctrl)
395{ 379{
396 u16 flags, data;
397 int i;
398 unsigned int val;
399 struct c_can_priv *priv = netdev_priv(dev);
400 struct net_device_stats *stats = &dev->stats; 380 struct net_device_stats *stats = &dev->stats;
401 struct sk_buff *skb; 381 struct c_can_priv *priv = netdev_priv(dev);
402 struct can_frame *frame; 382 struct can_frame *frame;
383 struct sk_buff *skb;
384 u32 arb, data;
403 385
404 skb = alloc_can_skb(dev, &frame); 386 skb = alloc_can_skb(dev, &frame);
405 if (!skb) { 387 if (!skb) {
@@ -409,115 +391,82 @@ static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl)
409 391
410 frame->can_dlc = get_can_dlc(ctrl & 0x0F); 392 frame->can_dlc = get_can_dlc(ctrl & 0x0F);
411 393
412 flags = priv->read_reg(priv, C_CAN_IFACE(ARB2_REG, iface)); 394 arb = priv->read_reg(priv, C_CAN_IFACE(ARB1_REG, iface));
413 val = priv->read_reg(priv, C_CAN_IFACE(ARB1_REG, iface)) | 395 arb |= priv->read_reg(priv, C_CAN_IFACE(ARB2_REG, iface)) << 16;
414 (flags << 16);
415 396
416 if (flags & IF_ARB_MSGXTD) 397 if (arb & IF_ARB_MSGXTD)
417 frame->can_id = (val & CAN_EFF_MASK) | CAN_EFF_FLAG; 398 frame->can_id = (arb & CAN_EFF_MASK) | CAN_EFF_FLAG;
418 else 399 else
419 frame->can_id = (val >> 18) & CAN_SFF_MASK; 400 frame->can_id = (arb >> 18) & CAN_SFF_MASK;
420 401
421 if (flags & IF_ARB_TRANSMIT) 402 if (arb & IF_ARB_TRANSMIT) {
422 frame->can_id |= CAN_RTR_FLAG; 403 frame->can_id |= CAN_RTR_FLAG;
423 else { 404 } else {
424 for (i = 0; i < frame->can_dlc; i += 2) { 405 int i, dreg = C_CAN_IFACE(DATA1_REG, iface);
425 data = priv->read_reg(priv, 406
426 C_CAN_IFACE(DATA1_REG, iface) + i / 2); 407 for (i = 0; i < frame->can_dlc; i += 2, dreg ++) {
408 data = priv->read_reg(priv, dreg);
427 frame->data[i] = data; 409 frame->data[i] = data;
428 frame->data[i + 1] = data >> 8; 410 frame->data[i + 1] = data >> 8;
429 } 411 }
430 } 412 }
431 413
432 netif_receive_skb(skb);
433
434 stats->rx_packets++; 414 stats->rx_packets++;
435 stats->rx_bytes += frame->can_dlc; 415 stats->rx_bytes += frame->can_dlc;
416
417 netif_receive_skb(skb);
436 return 0; 418 return 0;
437} 419}
438 420
439static void c_can_setup_receive_object(struct net_device *dev, int iface, 421static void c_can_setup_receive_object(struct net_device *dev, int iface,
440 int objno, unsigned int mask, 422 u32 obj, u32 mask, u32 id, u32 mcont)
441 unsigned int id, unsigned int mcont)
442{ 423{
443 struct c_can_priv *priv = netdev_priv(dev); 424 struct c_can_priv *priv = netdev_priv(dev);
444 425
445 priv->write_reg(priv, C_CAN_IFACE(MASK1_REG, iface), 426 mask |= BIT(29);
446 IFX_WRITE_LOW_16BIT(mask)); 427 priv->write_reg(priv, C_CAN_IFACE(MASK1_REG, iface), mask);
447 428 priv->write_reg(priv, C_CAN_IFACE(MASK2_REG, iface), mask >> 16);
448 /* According to C_CAN documentation, the reserved bit
449 * in IFx_MASK2 register is fixed 1
450 */
451 priv->write_reg(priv, C_CAN_IFACE(MASK2_REG, iface),
452 IFX_WRITE_HIGH_16BIT(mask) | BIT(13));
453 429
454 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 430 id |= IF_ARB_MSGVAL;
455 IFX_WRITE_LOW_16BIT(id)); 431 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), id);
456 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), 432 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), id >> 16);
457 (IF_ARB_MSGVAL | IFX_WRITE_HIGH_16BIT(id)));
458 433
459 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), mcont); 434 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), mcont);
460 c_can_object_put(dev, iface, objno, IF_COMM_ALL & ~IF_COMM_TXRQST); 435 c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);
461
462 netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno,
463 c_can_read_reg32(priv, C_CAN_MSGVAL1_REG));
464}
465
466static void c_can_inval_msg_object(struct net_device *dev, int iface, int objno)
467{
468 struct c_can_priv *priv = netdev_priv(dev);
469
470 priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 0);
471 priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), 0);
472 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 0);
473
474 c_can_object_put(dev, iface, objno, IF_COMM_ARB | IF_COMM_CONTROL);
475
476 netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno,
477 c_can_read_reg32(priv, C_CAN_MSGVAL1_REG));
478}
479
480static inline int c_can_is_next_tx_obj_busy(struct c_can_priv *priv, int objno)
481{
482 int val = c_can_read_reg32(priv, C_CAN_TXRQST1_REG);
483
484 /*
485 * as transmission request register's bit n-1 corresponds to
486 * message object n, we need to handle the same properly.
487 */
488 if (val & (1 << (objno - 1)))
489 return 1;
490
491 return 0;
492} 436}
493 437
494static netdev_tx_t c_can_start_xmit(struct sk_buff *skb, 438static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
495 struct net_device *dev) 439 struct net_device *dev)
496{ 440{
497 u32 msg_obj_no;
498 struct c_can_priv *priv = netdev_priv(dev);
499 struct can_frame *frame = (struct can_frame *)skb->data; 441 struct can_frame *frame = (struct can_frame *)skb->data;
442 struct c_can_priv *priv = netdev_priv(dev);
443 u32 idx, obj;
500 444
501 if (can_dropped_invalid_skb(dev, skb)) 445 if (can_dropped_invalid_skb(dev, skb))
502 return NETDEV_TX_OK; 446 return NETDEV_TX_OK;
503
504 spin_lock_bh(&priv->xmit_lock);
505 msg_obj_no = get_tx_next_msg_obj(priv);
506
507 /* prepare message object for transmission */
508 c_can_write_msg_object(dev, IF_TX, frame, msg_obj_no);
509 priv->dlc[msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST] = frame->can_dlc;
510 can_put_echo_skb(skb, dev, msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST);
511
512 /* 447 /*
513 * we have to stop the queue in case of a wrap around or 448 * This is not a FIFO. C/D_CAN sends out the buffers
514 * if the next TX message object is still in use 449 * prioritized. The lowest buffer number wins.
515 */ 450 */
516 priv->tx_next++; 451 idx = fls(atomic_read(&priv->tx_active));
517 if (c_can_is_next_tx_obj_busy(priv, get_tx_next_msg_obj(priv)) || 452 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
518 (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) == 0) 453
454 /* If this is the last buffer, stop the xmit queue */
455 if (idx == C_CAN_MSG_OBJ_TX_NUM - 1)
519 netif_stop_queue(dev); 456 netif_stop_queue(dev);
520 spin_unlock_bh(&priv->xmit_lock); 457 /*
458 * Store the message in the interface so we can call
459 * can_put_echo_skb(). We must do this before we enable
460 * transmit as we might race against do_tx().
461 */
462 c_can_setup_tx_object(dev, IF_TX, frame, idx);
463 priv->dlc[idx] = frame->can_dlc;
464 can_put_echo_skb(skb, dev, idx);
465
466 /* Update the active bits */
467 atomic_add((1 << idx), &priv->tx_active);
468 /* Start transmission */
469 c_can_object_put(dev, IF_TX, obj, IF_COMM_TX);
521 470
522 return NETDEV_TX_OK; 471 return NETDEV_TX_OK;
523} 472}
@@ -594,11 +543,10 @@ static void c_can_configure_msg_objects(struct net_device *dev)
594 543
595 /* setup receive message objects */ 544 /* setup receive message objects */
596 for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++) 545 for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++)
597 c_can_setup_receive_object(dev, IF_RX, i, 0, 0, 546 c_can_setup_receive_object(dev, IF_RX, i, 0, 0, IF_MCONT_RCV);
598 (IF_MCONT_RXIE | IF_MCONT_UMASK) & ~IF_MCONT_EOB);
599 547
600 c_can_setup_receive_object(dev, IF_RX, C_CAN_MSG_OBJ_RX_LAST, 0, 0, 548 c_can_setup_receive_object(dev, IF_RX, C_CAN_MSG_OBJ_RX_LAST, 0, 0,
601 IF_MCONT_EOB | IF_MCONT_RXIE | IF_MCONT_UMASK); 549 IF_MCONT_RCV_EOB);
602} 550}
603 551
604/* 552/*
@@ -612,30 +560,22 @@ static int c_can_chip_config(struct net_device *dev)
612 struct c_can_priv *priv = netdev_priv(dev); 560 struct c_can_priv *priv = netdev_priv(dev);
613 561
614 /* enable automatic retransmission */ 562 /* enable automatic retransmission */
615 priv->write_reg(priv, C_CAN_CTRL_REG, 563 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_ENABLE_AR);
616 CONTROL_ENABLE_AR);
617 564
618 if ((priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) && 565 if ((priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) &&
619 (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)) { 566 (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)) {
620 /* loopback + silent mode : useful for hot self-test */ 567 /* loopback + silent mode : useful for hot self-test */
621 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_EIE | 568 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
622 CONTROL_SIE | CONTROL_IE | CONTROL_TEST); 569 priv->write_reg(priv, C_CAN_TEST_REG, TEST_LBACK | TEST_SILENT);
623 priv->write_reg(priv, C_CAN_TEST_REG,
624 TEST_LBACK | TEST_SILENT);
625 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) { 570 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
626 /* loopback mode : useful for self-test function */ 571 /* loopback mode : useful for self-test function */
627 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_EIE | 572 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
628 CONTROL_SIE | CONTROL_IE | CONTROL_TEST);
629 priv->write_reg(priv, C_CAN_TEST_REG, TEST_LBACK); 573 priv->write_reg(priv, C_CAN_TEST_REG, TEST_LBACK);
630 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) { 574 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) {
631 /* silent mode : bus-monitoring mode */ 575 /* silent mode : bus-monitoring mode */
632 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_EIE | 576 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
633 CONTROL_SIE | CONTROL_IE | CONTROL_TEST);
634 priv->write_reg(priv, C_CAN_TEST_REG, TEST_SILENT); 577 priv->write_reg(priv, C_CAN_TEST_REG, TEST_SILENT);
635 } else 578 }
636 /* normal mode*/
637 priv->write_reg(priv, C_CAN_CTRL_REG,
638 CONTROL_EIE | CONTROL_SIE | CONTROL_IE);
639 579
640 /* configure message objects */ 580 /* configure message objects */
641 c_can_configure_msg_objects(dev); 581 c_can_configure_msg_objects(dev);
@@ -643,6 +583,11 @@ static int c_can_chip_config(struct net_device *dev)
643 /* set a `lec` value so that we can check for updates later */ 583 /* set a `lec` value so that we can check for updates later */
644 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED); 584 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
645 585
586 /* Clear all internal status */
587 atomic_set(&priv->tx_active, 0);
588 priv->rxmasked = 0;
589 priv->tx_dir = 0;
590
646 /* set bittiming params */ 591 /* set bittiming params */
647 return c_can_set_bittiming(dev); 592 return c_can_set_bittiming(dev);
648} 593}
@@ -657,13 +602,11 @@ static int c_can_start(struct net_device *dev)
657 if (err) 602 if (err)
658 return err; 603 return err;
659 604
660 priv->can.state = CAN_STATE_ERROR_ACTIVE; 605 /* Setup the command for new messages */
661 606 priv->comm_rcv_high = priv->type != BOSCH_D_CAN ?
662 /* reset tx helper pointers */ 607 IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;
663 priv->tx_next = priv->tx_echo = 0;
664 608
665 /* enable status change, error and module interrupts */ 609 priv->can.state = CAN_STATE_ERROR_ACTIVE;
666 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS);
667 610
668 return 0; 611 return 0;
669} 612}
@@ -672,15 +615,13 @@ static void c_can_stop(struct net_device *dev)
672{ 615{
673 struct c_can_priv *priv = netdev_priv(dev); 616 struct c_can_priv *priv = netdev_priv(dev);
674 617
675 /* disable all interrupts */ 618 c_can_irq_control(priv, false);
676 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
677
678 /* set the state as STOPPED */
679 priv->can.state = CAN_STATE_STOPPED; 619 priv->can.state = CAN_STATE_STOPPED;
680} 620}
681 621
682static int c_can_set_mode(struct net_device *dev, enum can_mode mode) 622static int c_can_set_mode(struct net_device *dev, enum can_mode mode)
683{ 623{
624 struct c_can_priv *priv = netdev_priv(dev);
684 int err; 625 int err;
685 626
686 switch (mode) { 627 switch (mode) {
@@ -689,6 +630,7 @@ static int c_can_set_mode(struct net_device *dev, enum can_mode mode)
689 if (err) 630 if (err)
690 return err; 631 return err;
691 netif_wake_queue(dev); 632 netif_wake_queue(dev);
633 c_can_irq_control(priv, true);
692 break; 634 break;
693 default: 635 default:
694 return -EOPNOTSUPP; 636 return -EOPNOTSUPP;
@@ -724,42 +666,29 @@ static int c_can_get_berr_counter(const struct net_device *dev,
724 return err; 666 return err;
725} 667}
726 668
727/*
728 * priv->tx_echo holds the number of the oldest can_frame put for
729 * transmission into the hardware, but not yet ACKed by the CAN tx
730 * complete IRQ.
731 *
732 * We iterate from priv->tx_echo to priv->tx_next and check if the
733 * packet has been transmitted, echo it back to the CAN framework.
734 * If we discover a not yet transmitted packet, stop looking for more.
735 */
736static void c_can_do_tx(struct net_device *dev) 669static void c_can_do_tx(struct net_device *dev)
737{ 670{
738 struct c_can_priv *priv = netdev_priv(dev); 671 struct c_can_priv *priv = netdev_priv(dev);
739 struct net_device_stats *stats = &dev->stats; 672 struct net_device_stats *stats = &dev->stats;
740 u32 val, obj, pkts = 0, bytes = 0; 673 u32 idx, obj, pkts = 0, bytes = 0, pend, clr;
741
742 spin_lock_bh(&priv->xmit_lock);
743 674
744 for (; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) { 675 clr = pend = priv->read_reg(priv, C_CAN_INTPND2_REG);
745 obj = get_tx_echo_msg_obj(priv->tx_echo);
746 val = c_can_read_reg32(priv, C_CAN_TXRQST1_REG);
747 676
748 if (val & (1 << (obj - 1))) 677 while ((idx = ffs(pend))) {
749 break; 678 idx--;
750 679 pend &= ~(1 << idx);
751 can_get_echo_skb(dev, obj - C_CAN_MSG_OBJ_TX_FIRST); 680 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
752 bytes += priv->dlc[obj - C_CAN_MSG_OBJ_TX_FIRST]; 681 c_can_inval_tx_object(dev, IF_RX, obj);
682 can_get_echo_skb(dev, idx);
683 bytes += priv->dlc[idx];
753 pkts++; 684 pkts++;
754 c_can_inval_msg_object(dev, IF_TX, obj);
755 } 685 }
756 686
757 /* restart queue if wrap-up or if queue stalled on last pkt */ 687 /* Clear the bits in the tx_active mask */
758 if (((priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) != 0) || 688 atomic_sub(clr, &priv->tx_active);
759 ((priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) == 0))
760 netif_wake_queue(dev);
761 689
762 spin_unlock_bh(&priv->xmit_lock); 690 if (clr & (1 << (C_CAN_MSG_OBJ_TX_NUM - 1)))
691 netif_wake_queue(dev);
763 692
764 if (pkts) { 693 if (pkts) {
765 stats->tx_bytes += bytes; 694 stats->tx_bytes += bytes;
@@ -800,18 +729,42 @@ static u32 c_can_adjust_pending(u32 pend)
800 return pend & ~((1 << lasts) - 1); 729 return pend & ~((1 << lasts) - 1);
801} 730}
802 731
732static inline void c_can_rx_object_get(struct net_device *dev,
733 struct c_can_priv *priv, u32 obj)
734{
735#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING
736 if (obj < C_CAN_MSG_RX_LOW_LAST)
737 c_can_object_get(dev, IF_RX, obj, IF_COMM_RCV_LOW);
738 else
739#endif
740 c_can_object_get(dev, IF_RX, obj, priv->comm_rcv_high);
741}
742
743static inline void c_can_rx_finalize(struct net_device *dev,
744 struct c_can_priv *priv, u32 obj)
745{
746#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING
747 if (obj < C_CAN_MSG_RX_LOW_LAST)
748 priv->rxmasked |= BIT(obj - 1);
749 else if (obj == C_CAN_MSG_RX_LOW_LAST) {
750 priv->rxmasked = 0;
751 /* activate all lower message objects */
752 c_can_activate_all_lower_rx_msg_obj(dev, IF_RX);
753 }
754#endif
755 if (priv->type != BOSCH_D_CAN)
756 c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT);
757}
758
803static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv, 759static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
804 u32 pend, int quota) 760 u32 pend, int quota)
805{ 761{
806 u32 pkts = 0, ctrl, obj, mcmd; 762 u32 pkts = 0, ctrl, obj;
807 763
808 while ((obj = ffs(pend)) && quota > 0) { 764 while ((obj = ffs(pend)) && quota > 0) {
809 pend &= ~BIT(obj - 1); 765 pend &= ~BIT(obj - 1);
810 766
811 mcmd = obj < C_CAN_MSG_RX_LOW_LAST ? 767 c_can_rx_object_get(dev, priv, obj);
812 IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;
813
814 c_can_object_get(dev, IF_RX, obj, mcmd);
815 ctrl = priv->read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_RX)); 768 ctrl = priv->read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_RX));
816 769
817 if (ctrl & IF_MCONT_MSGLST) { 770 if (ctrl & IF_MCONT_MSGLST) {
@@ -833,9 +786,7 @@ static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
833 /* read the data from the message object */ 786 /* read the data from the message object */
834 c_can_read_msg_object(dev, IF_RX, ctrl); 787 c_can_read_msg_object(dev, IF_RX, ctrl);
835 788
836 if (obj == C_CAN_MSG_RX_LOW_LAST) 789 c_can_rx_finalize(dev, priv, obj);
837 /* activate all lower message objects */
838 c_can_activate_all_lower_rx_msg_obj(dev, IF_RX, ctrl);
839 790
840 pkts++; 791 pkts++;
841 quota--; 792 quota--;
@@ -844,6 +795,16 @@ static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
844 return pkts; 795 return pkts;
845} 796}
846 797
798static inline u32 c_can_get_pending(struct c_can_priv *priv)
799{
800 u32 pend = priv->read_reg(priv, C_CAN_NEWDAT1_REG);
801
802#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING
803 pend &= ~priv->rxmasked;
804#endif
805 return pend;
806}
807
847/* 808/*
848 * theory of operation: 809 * theory of operation:
849 * 810 *
@@ -853,6 +814,8 @@ static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
853 * has arrived. To work-around this issue, we keep two groups of message 814 * has arrived. To work-around this issue, we keep two groups of message
854 * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT. 815 * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT.
855 * 816 *
817 * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = y
818 *
856 * To ensure in-order frame reception we use the following 819 * To ensure in-order frame reception we use the following
857 * approach while re-activating a message object to receive further 820 * approach while re-activating a message object to receive further
858 * frames: 821 * frames:
@@ -865,6 +828,14 @@ static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
865 * - if the current message object number is greater than 828 * - if the current message object number is greater than
866 * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of 829 * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of
867 * only this message object. 830 * only this message object.
831 *
832 * This can cause packet loss!
833 *
834 * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = n
835 *
836 * We clear the newdat bit right away.
837 *
838 * This can result in packet reordering when the readout is slow.
868 */ 839 */
869static int c_can_do_rx_poll(struct net_device *dev, int quota) 840static int c_can_do_rx_poll(struct net_device *dev, int quota)
870{ 841{
@@ -880,7 +851,7 @@ static int c_can_do_rx_poll(struct net_device *dev, int quota)
880 851
881 while (quota > 0) { 852 while (quota > 0) {
882 if (!pend) { 853 if (!pend) {
883 pend = priv->read_reg(priv, C_CAN_INTPND1_REG); 854 pend = c_can_get_pending(priv);
884 if (!pend) 855 if (!pend)
885 break; 856 break;
886 /* 857 /*
@@ -905,12 +876,6 @@ static int c_can_do_rx_poll(struct net_device *dev, int quota)
905 return pkts; 876 return pkts;
906} 877}
907 878
908static inline int c_can_has_and_handle_berr(struct c_can_priv *priv)
909{
910 return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) &&
911 (priv->current_status & LEC_UNUSED);
912}
913
914static int c_can_handle_state_change(struct net_device *dev, 879static int c_can_handle_state_change(struct net_device *dev,
915 enum c_can_bus_error_types error_type) 880 enum c_can_bus_error_types error_type)
916{ 881{
@@ -922,6 +887,26 @@ static int c_can_handle_state_change(struct net_device *dev,
922 struct sk_buff *skb; 887 struct sk_buff *skb;
923 struct can_berr_counter bec; 888 struct can_berr_counter bec;
924 889
890 switch (error_type) {
891 case C_CAN_ERROR_WARNING:
892 /* error warning state */
893 priv->can.can_stats.error_warning++;
894 priv->can.state = CAN_STATE_ERROR_WARNING;
895 break;
896 case C_CAN_ERROR_PASSIVE:
897 /* error passive state */
898 priv->can.can_stats.error_passive++;
899 priv->can.state = CAN_STATE_ERROR_PASSIVE;
900 break;
901 case C_CAN_BUS_OFF:
902 /* bus-off state */
903 priv->can.state = CAN_STATE_BUS_OFF;
904 can_bus_off(dev);
905 break;
906 default:
907 break;
908 }
909
925 /* propagate the error condition to the CAN stack */ 910 /* propagate the error condition to the CAN stack */
926 skb = alloc_can_err_skb(dev, &cf); 911 skb = alloc_can_err_skb(dev, &cf);
927 if (unlikely(!skb)) 912 if (unlikely(!skb))
@@ -935,8 +920,6 @@ static int c_can_handle_state_change(struct net_device *dev,
935 switch (error_type) { 920 switch (error_type) {
936 case C_CAN_ERROR_WARNING: 921 case C_CAN_ERROR_WARNING:
937 /* error warning state */ 922 /* error warning state */
938 priv->can.can_stats.error_warning++;
939 priv->can.state = CAN_STATE_ERROR_WARNING;
940 cf->can_id |= CAN_ERR_CRTL; 923 cf->can_id |= CAN_ERR_CRTL;
941 cf->data[1] = (bec.txerr > bec.rxerr) ? 924 cf->data[1] = (bec.txerr > bec.rxerr) ?
942 CAN_ERR_CRTL_TX_WARNING : 925 CAN_ERR_CRTL_TX_WARNING :
@@ -947,8 +930,6 @@ static int c_can_handle_state_change(struct net_device *dev,
947 break; 930 break;
948 case C_CAN_ERROR_PASSIVE: 931 case C_CAN_ERROR_PASSIVE:
949 /* error passive state */ 932 /* error passive state */
950 priv->can.can_stats.error_passive++;
951 priv->can.state = CAN_STATE_ERROR_PASSIVE;
952 cf->can_id |= CAN_ERR_CRTL; 933 cf->can_id |= CAN_ERR_CRTL;
953 if (rx_err_passive) 934 if (rx_err_passive)
954 cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; 935 cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
@@ -960,22 +941,16 @@ static int c_can_handle_state_change(struct net_device *dev,
960 break; 941 break;
961 case C_CAN_BUS_OFF: 942 case C_CAN_BUS_OFF:
962 /* bus-off state */ 943 /* bus-off state */
963 priv->can.state = CAN_STATE_BUS_OFF;
964 cf->can_id |= CAN_ERR_BUSOFF; 944 cf->can_id |= CAN_ERR_BUSOFF;
965 /*
966 * disable all interrupts in bus-off mode to ensure that
967 * the CPU is not hogged down
968 */
969 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
970 can_bus_off(dev); 945 can_bus_off(dev);
971 break; 946 break;
972 default: 947 default:
973 break; 948 break;
974 } 949 }
975 950
976 netif_receive_skb(skb);
977 stats->rx_packets++; 951 stats->rx_packets++;
978 stats->rx_bytes += cf->can_dlc; 952 stats->rx_bytes += cf->can_dlc;
953 netif_receive_skb(skb);
979 954
980 return 1; 955 return 1;
981} 956}
@@ -996,6 +971,13 @@ static int c_can_handle_bus_err(struct net_device *dev,
996 if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR) 971 if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR)
997 return 0; 972 return 0;
998 973
974 if (!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
975 return 0;
976
977 /* common for all type of bus errors */
978 priv->can.can_stats.bus_error++;
979 stats->rx_errors++;
980
999 /* propagate the error condition to the CAN stack */ 981 /* propagate the error condition to the CAN stack */
1000 skb = alloc_can_err_skb(dev, &cf); 982 skb = alloc_can_err_skb(dev, &cf);
1001 if (unlikely(!skb)) 983 if (unlikely(!skb))
@@ -1005,10 +987,6 @@ static int c_can_handle_bus_err(struct net_device *dev,
1005 * check for 'last error code' which tells us the 987 * check for 'last error code' which tells us the
1006 * type of the last error to occur on the CAN bus 988 * type of the last error to occur on the CAN bus
1007 */ 989 */
1008
1009 /* common for all type of bus errors */
1010 priv->can.can_stats.bus_error++;
1011 stats->rx_errors++;
1012 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 990 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1013 cf->data[2] |= CAN_ERR_PROT_UNSPEC; 991 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1014 992
@@ -1043,95 +1021,64 @@ static int c_can_handle_bus_err(struct net_device *dev,
1043 break; 1021 break;
1044 } 1022 }
1045 1023
1046 /* set a `lec` value so that we can check for updates later */
1047 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
1048
1049 netif_receive_skb(skb);
1050 stats->rx_packets++; 1024 stats->rx_packets++;
1051 stats->rx_bytes += cf->can_dlc; 1025 stats->rx_bytes += cf->can_dlc;
1052 1026 netif_receive_skb(skb);
1053 return 1; 1027 return 1;
1054} 1028}
1055 1029
1056static int c_can_poll(struct napi_struct *napi, int quota) 1030static int c_can_poll(struct napi_struct *napi, int quota)
1057{ 1031{
1058 u16 irqstatus;
1059 int lec_type = 0;
1060 int work_done = 0;
1061 struct net_device *dev = napi->dev; 1032 struct net_device *dev = napi->dev;
1062 struct c_can_priv *priv = netdev_priv(dev); 1033 struct c_can_priv *priv = netdev_priv(dev);
1034 u16 curr, last = priv->last_status;
1035 int work_done = 0;
1063 1036
1064 irqstatus = priv->irqstatus; 1037 priv->last_status = curr = priv->read_reg(priv, C_CAN_STS_REG);
1065 if (!irqstatus) 1038 /* Ack status on C_CAN. D_CAN is self clearing */
1066 goto end; 1039 if (priv->type != BOSCH_D_CAN)
1040 priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
1067 1041
1068 /* status events have the highest priority */ 1042 /* handle state changes */
1069 if (irqstatus == STATUS_INTERRUPT) { 1043 if ((curr & STATUS_EWARN) && (!(last & STATUS_EWARN))) {
1070 priv->current_status = priv->read_reg(priv, 1044 netdev_dbg(dev, "entered error warning state\n");
1071 C_CAN_STS_REG); 1045 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);
1072 1046 }
1073 /* handle Tx/Rx events */
1074 if (priv->current_status & STATUS_TXOK)
1075 priv->write_reg(priv, C_CAN_STS_REG,
1076 priv->current_status & ~STATUS_TXOK);
1077
1078 if (priv->current_status & STATUS_RXOK)
1079 priv->write_reg(priv, C_CAN_STS_REG,
1080 priv->current_status & ~STATUS_RXOK);
1081
1082 /* handle state changes */
1083 if ((priv->current_status & STATUS_EWARN) &&
1084 (!(priv->last_status & STATUS_EWARN))) {
1085 netdev_dbg(dev, "entered error warning state\n");
1086 work_done += c_can_handle_state_change(dev,
1087 C_CAN_ERROR_WARNING);
1088 }
1089 if ((priv->current_status & STATUS_EPASS) &&
1090 (!(priv->last_status & STATUS_EPASS))) {
1091 netdev_dbg(dev, "entered error passive state\n");
1092 work_done += c_can_handle_state_change(dev,
1093 C_CAN_ERROR_PASSIVE);
1094 }
1095 if ((priv->current_status & STATUS_BOFF) &&
1096 (!(priv->last_status & STATUS_BOFF))) {
1097 netdev_dbg(dev, "entered bus off state\n");
1098 work_done += c_can_handle_state_change(dev,
1099 C_CAN_BUS_OFF);
1100 }
1101 1047
1102 /* handle bus recovery events */ 1048 if ((curr & STATUS_EPASS) && (!(last & STATUS_EPASS))) {
1103 if ((!(priv->current_status & STATUS_BOFF)) && 1049 netdev_dbg(dev, "entered error passive state\n");
1104 (priv->last_status & STATUS_BOFF)) { 1050 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);
1105 netdev_dbg(dev, "left bus off state\n"); 1051 }
1106 priv->can.state = CAN_STATE_ERROR_ACTIVE; 1052
1107 } 1053 if ((curr & STATUS_BOFF) && (!(last & STATUS_BOFF))) {
1108 if ((!(priv->current_status & STATUS_EPASS)) && 1054 netdev_dbg(dev, "entered bus off state\n");
1109 (priv->last_status & STATUS_EPASS)) { 1055 work_done += c_can_handle_state_change(dev, C_CAN_BUS_OFF);
1110 netdev_dbg(dev, "left error passive state\n"); 1056 goto end;
1111 priv->can.state = CAN_STATE_ERROR_ACTIVE; 1057 }
1112 }
1113 1058
1114 priv->last_status = priv->current_status; 1059 /* handle bus recovery events */
1115 1060 if ((!(curr & STATUS_BOFF)) && (last & STATUS_BOFF)) {
1116 /* handle lec errors on the bus */ 1061 netdev_dbg(dev, "left bus off state\n");
1117 lec_type = c_can_has_and_handle_berr(priv); 1062 priv->can.state = CAN_STATE_ERROR_ACTIVE;
1118 if (lec_type) 1063 }
1119 work_done += c_can_handle_bus_err(dev, lec_type); 1064 if ((!(curr & STATUS_EPASS)) && (last & STATUS_EPASS)) {
1120 } else if ((irqstatus >= C_CAN_MSG_OBJ_RX_FIRST) && 1065 netdev_dbg(dev, "left error passive state\n");
1121 (irqstatus <= C_CAN_MSG_OBJ_RX_LAST)) { 1066 priv->can.state = CAN_STATE_ERROR_ACTIVE;
1122 /* handle events corresponding to receive message objects */
1123 work_done += c_can_do_rx_poll(dev, (quota - work_done));
1124 } else if ((irqstatus >= C_CAN_MSG_OBJ_TX_FIRST) &&
1125 (irqstatus <= C_CAN_MSG_OBJ_TX_LAST)) {
1126 /* handle events corresponding to transmit message objects */
1127 c_can_do_tx(dev);
1128 } 1067 }
1129 1068
1069 /* handle lec errors on the bus */
1070 work_done += c_can_handle_bus_err(dev, curr & LEC_MASK);
1071
1072 /* Handle Tx/Rx events. We do this unconditionally */
1073 work_done += c_can_do_rx_poll(dev, (quota - work_done));
1074 c_can_do_tx(dev);
1075
1130end: 1076end:
1131 if (work_done < quota) { 1077 if (work_done < quota) {
1132 napi_complete(napi); 1078 napi_complete(napi);
1133 /* enable all IRQs */ 1079 /* enable all IRQs if we are not in bus off state */
1134 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS); 1080 if (priv->can.state != CAN_STATE_BUS_OFF)
1081 c_can_irq_control(priv, true);
1135 } 1082 }
1136 1083
1137 return work_done; 1084 return work_done;
@@ -1142,12 +1089,11 @@ static irqreturn_t c_can_isr(int irq, void *dev_id)
1142 struct net_device *dev = (struct net_device *)dev_id; 1089 struct net_device *dev = (struct net_device *)dev_id;
1143 struct c_can_priv *priv = netdev_priv(dev); 1090 struct c_can_priv *priv = netdev_priv(dev);
1144 1091
1145 priv->irqstatus = priv->read_reg(priv, C_CAN_INT_REG); 1092 if (!priv->read_reg(priv, C_CAN_INT_REG))
1146 if (!priv->irqstatus)
1147 return IRQ_NONE; 1093 return IRQ_NONE;
1148 1094
1149 /* disable all interrupts and schedule the NAPI */ 1095 /* disable all interrupts and schedule the NAPI */
1150 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS); 1096 c_can_irq_control(priv, false);
1151 napi_schedule(&priv->napi); 1097 napi_schedule(&priv->napi);
1152 1098
1153 return IRQ_HANDLED; 1099 return IRQ_HANDLED;
@@ -1184,6 +1130,8 @@ static int c_can_open(struct net_device *dev)
1184 can_led_event(dev, CAN_LED_EVENT_OPEN); 1130 can_led_event(dev, CAN_LED_EVENT_OPEN);
1185 1131
1186 napi_enable(&priv->napi); 1132 napi_enable(&priv->napi);
1133 /* enable status change, error and module interrupts */
1134 c_can_irq_control(priv, true);
1187 netif_start_queue(dev); 1135 netif_start_queue(dev);
1188 1136
1189 return 0; 1137 return 0;
@@ -1226,7 +1174,6 @@ struct net_device *alloc_c_can_dev(void)
1226 return NULL; 1174 return NULL;
1227 1175
1228 priv = netdev_priv(dev); 1176 priv = netdev_priv(dev);
1229 spin_lock_init(&priv->xmit_lock);
1230 netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT); 1177 netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT);
1231 1178
1232 priv->dev = dev; 1179 priv->dev = dev;
@@ -1281,6 +1228,7 @@ int c_can_power_up(struct net_device *dev)
1281 u32 val; 1228 u32 val;
1282 unsigned long time_out; 1229 unsigned long time_out;
1283 struct c_can_priv *priv = netdev_priv(dev); 1230 struct c_can_priv *priv = netdev_priv(dev);
1231 int ret;
1284 1232
1285 if (!(dev->flags & IFF_UP)) 1233 if (!(dev->flags & IFF_UP))
1286 return 0; 1234 return 0;
@@ -1307,7 +1255,11 @@ int c_can_power_up(struct net_device *dev)
1307 if (time_after(jiffies, time_out)) 1255 if (time_after(jiffies, time_out))
1308 return -ETIMEDOUT; 1256 return -ETIMEDOUT;
1309 1257
1310 return c_can_start(dev); 1258 ret = c_can_start(dev);
1259 if (!ret)
1260 c_can_irq_control(priv, true);
1261
1262 return ret;
1311} 1263}
1312EXPORT_SYMBOL_GPL(c_can_power_up); 1264EXPORT_SYMBOL_GPL(c_can_power_up);
1313#endif 1265#endif
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index faa8404162b3..c56f1b1c11ca 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -22,14 +22,6 @@
22#ifndef C_CAN_H 22#ifndef C_CAN_H
23#define C_CAN_H 23#define C_CAN_H
24 24
25/*
26 * IFx register masks:
27 * allow easy operation on 16-bit registers when the
28 * argument is 32-bit instead
29 */
30#define IFX_WRITE_LOW_16BIT(x) ((x) & 0xFFFF)
31#define IFX_WRITE_HIGH_16BIT(x) (((x) & 0xFFFF0000) >> 16)
32
33/* message object split */ 25/* message object split */
34#define C_CAN_NO_OF_OBJECTS 32 26#define C_CAN_NO_OF_OBJECTS 32
35#define C_CAN_MSG_OBJ_RX_NUM 16 27#define C_CAN_MSG_OBJ_RX_NUM 16
@@ -45,8 +37,6 @@
45 37
46#define C_CAN_MSG_OBJ_RX_SPLIT 9 38#define C_CAN_MSG_OBJ_RX_SPLIT 9
47#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1) 39#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
48
49#define C_CAN_NEXT_MSG_OBJ_MASK (C_CAN_MSG_OBJ_TX_NUM - 1)
50#define RECEIVE_OBJECT_BITS 0x0000ffff 40#define RECEIVE_OBJECT_BITS 0x0000ffff
51 41
52enum reg { 42enum reg {
@@ -183,23 +173,20 @@ struct c_can_priv {
183 struct napi_struct napi; 173 struct napi_struct napi;
184 struct net_device *dev; 174 struct net_device *dev;
185 struct device *device; 175 struct device *device;
186 spinlock_t xmit_lock; 176 atomic_t tx_active;
187 int tx_object; 177 unsigned long tx_dir;
188 int current_status;
189 int last_status; 178 int last_status;
190 u16 (*read_reg) (struct c_can_priv *priv, enum reg index); 179 u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
191 void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val); 180 void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
192 void __iomem *base; 181 void __iomem *base;
193 const u16 *regs; 182 const u16 *regs;
194 unsigned long irq_flags; /* for request_irq() */
195 unsigned int tx_next;
196 unsigned int tx_echo;
197 void *priv; /* for board-specific data */ 183 void *priv; /* for board-specific data */
198 u16 irqstatus;
199 enum c_can_dev_id type; 184 enum c_can_dev_id type;
200 u32 __iomem *raminit_ctrlreg; 185 u32 __iomem *raminit_ctrlreg;
201 unsigned int instance; 186 int instance;
202 void (*raminit) (const struct c_can_priv *priv, bool enable); 187 void (*raminit) (const struct c_can_priv *priv, bool enable);
188 u32 comm_rcv_high;
189 u32 rxmasked;
203 u32 dlc[C_CAN_MSG_OBJ_TX_NUM]; 190 u32 dlc[C_CAN_MSG_OBJ_TX_NUM];
204}; 191};
205 192
diff --git a/drivers/net/can/c_can/c_can_pci.c b/drivers/net/can/c_can/c_can_pci.c
index bce0be54c2f5..fe5f6303b584 100644
--- a/drivers/net/can/c_can/c_can_pci.c
+++ b/drivers/net/can/c_can/c_can_pci.c
@@ -84,8 +84,11 @@ static int c_can_pci_probe(struct pci_dev *pdev,
84 goto out_disable_device; 84 goto out_disable_device;
85 } 85 }
86 86
87 pci_set_master(pdev); 87 ret = pci_enable_msi(pdev);
88 pci_enable_msi(pdev); 88 if (!ret) {
89 dev_info(&pdev->dev, "MSI enabled\n");
90 pci_set_master(pdev);
91 }
89 92
90 addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0)); 93 addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
91 if (!addr) { 94 if (!addr) {
@@ -132,6 +135,8 @@ static int c_can_pci_probe(struct pci_dev *pdev,
132 goto out_free_c_can; 135 goto out_free_c_can;
133 } 136 }
134 137
138 priv->type = c_can_pci_data->type;
139
135 /* Configure access to registers */ 140 /* Configure access to registers */
136 switch (c_can_pci_data->reg_align) { 141 switch (c_can_pci_data->reg_align) {
137 case C_CAN_REG_ALIGN_32: 142 case C_CAN_REG_ALIGN_32:
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
index 806d92753427..1df0b322d1e4 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -222,7 +222,7 @@ static int c_can_plat_probe(struct platform_device *pdev)
222 222
223 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 223 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
224 priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res); 224 priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res);
225 if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0) 225 if (IS_ERR(priv->raminit_ctrlreg) || priv->instance < 0)
226 dev_info(&pdev->dev, "control memory is not used for raminit\n"); 226 dev_info(&pdev->dev, "control memory is not used for raminit\n");
227 else 227 else
228 priv->raminit = c_can_hw_raminit; 228 priv->raminit = c_can_hw_raminit;
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index c7a260478749..e318e87e2bfc 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -256,7 +256,7 @@ static int can_get_bittiming(struct net_device *dev, struct can_bittiming *bt,
256 256
257 /* Check if the CAN device has bit-timing parameters */ 257 /* Check if the CAN device has bit-timing parameters */
258 if (!btc) 258 if (!btc)
259 return -ENOTSUPP; 259 return -EOPNOTSUPP;
260 260
261 /* 261 /*
262 * Depending on the given can_bittiming parameter structure the CAN 262 * Depending on the given can_bittiming parameter structure the CAN
diff --git a/drivers/net/can/sja1000/sja1000_isa.c b/drivers/net/can/sja1000/sja1000_isa.c
index df136a2516c4..014695d7e6a3 100644
--- a/drivers/net/can/sja1000/sja1000_isa.c
+++ b/drivers/net/can/sja1000/sja1000_isa.c
@@ -46,6 +46,7 @@ static int clk[MAXDEV];
46static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff}; 46static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
47static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff}; 47static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
48static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1}; 48static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
49static spinlock_t indirect_lock[MAXDEV]; /* lock for indirect access mode */
49 50
50module_param_array(port, ulong, NULL, S_IRUGO); 51module_param_array(port, ulong, NULL, S_IRUGO);
51MODULE_PARM_DESC(port, "I/O port number"); 52MODULE_PARM_DESC(port, "I/O port number");
@@ -101,19 +102,26 @@ static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
101static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv, 102static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
102 int reg) 103 int reg)
103{ 104{
104 unsigned long base = (unsigned long)priv->reg_base; 105 unsigned long flags, base = (unsigned long)priv->reg_base;
106 u8 readval;
105 107
108 spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
106 outb(reg, base); 109 outb(reg, base);
107 return inb(base + 1); 110 readval = inb(base + 1);
111 spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
112
113 return readval;
108} 114}
109 115
110static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv, 116static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
111 int reg, u8 val) 117 int reg, u8 val)
112{ 118{
113 unsigned long base = (unsigned long)priv->reg_base; 119 unsigned long flags, base = (unsigned long)priv->reg_base;
114 120
121 spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
115 outb(reg, base); 122 outb(reg, base);
116 outb(val, base + 1); 123 outb(val, base + 1);
124 spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
117} 125}
118 126
119static int sja1000_isa_probe(struct platform_device *pdev) 127static int sja1000_isa_probe(struct platform_device *pdev)
@@ -169,6 +177,7 @@ static int sja1000_isa_probe(struct platform_device *pdev)
169 if (iosize == SJA1000_IOSIZE_INDIRECT) { 177 if (iosize == SJA1000_IOSIZE_INDIRECT) {
170 priv->read_reg = sja1000_isa_port_read_reg_indirect; 178 priv->read_reg = sja1000_isa_port_read_reg_indirect;
171 priv->write_reg = sja1000_isa_port_write_reg_indirect; 179 priv->write_reg = sja1000_isa_port_write_reg_indirect;
180 spin_lock_init(&indirect_lock[idx]);
172 } else { 181 } else {
173 priv->read_reg = sja1000_isa_port_read_reg; 182 priv->read_reg = sja1000_isa_port_read_reg;
174 priv->write_reg = sja1000_isa_port_write_reg; 183 priv->write_reg = sja1000_isa_port_write_reg;
@@ -198,6 +207,7 @@ static int sja1000_isa_probe(struct platform_device *pdev)
198 207
199 platform_set_drvdata(pdev, dev); 208 platform_set_drvdata(pdev, dev);
200 SET_NETDEV_DEV(dev, &pdev->dev); 209 SET_NETDEV_DEV(dev, &pdev->dev);
210 dev->dev_id = idx;
201 211
202 err = register_sja1000dev(dev); 212 err = register_sja1000dev(dev);
203 if (err) { 213 if (err) {
diff --git a/drivers/net/can/slcan.c b/drivers/net/can/slcan.c
index f5b16e0e3a12..dcf9196f6316 100644
--- a/drivers/net/can/slcan.c
+++ b/drivers/net/can/slcan.c
@@ -322,13 +322,13 @@ static void slcan_write_wakeup(struct tty_struct *tty)
322 if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev)) 322 if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev))
323 return; 323 return;
324 324
325 spin_lock(&sl->lock); 325 spin_lock_bh(&sl->lock);
326 if (sl->xleft <= 0) { 326 if (sl->xleft <= 0) {
327 /* Now serial buffer is almost free & we can start 327 /* Now serial buffer is almost free & we can start
328 * transmission of another packet */ 328 * transmission of another packet */
329 sl->dev->stats.tx_packets++; 329 sl->dev->stats.tx_packets++;
330 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); 330 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
331 spin_unlock(&sl->lock); 331 spin_unlock_bh(&sl->lock);
332 netif_wake_queue(sl->dev); 332 netif_wake_queue(sl->dev);
333 return; 333 return;
334 } 334 }
@@ -336,7 +336,7 @@ static void slcan_write_wakeup(struct tty_struct *tty)
336 actual = tty->ops->write(tty, sl->xhead, sl->xleft); 336 actual = tty->ops->write(tty, sl->xhead, sl->xleft);
337 sl->xleft -= actual; 337 sl->xleft -= actual;
338 sl->xhead += actual; 338 sl->xhead += actual;
339 spin_unlock(&sl->lock); 339 spin_unlock_bh(&sl->lock);
340} 340}
341 341
342/* Send a can_frame to a TTY queue. */ 342/* Send a can_frame to a TTY queue. */
diff --git a/drivers/net/ethernet/altera/Kconfig b/drivers/net/ethernet/altera/Kconfig
index 80c1ab74a4b8..fdddba51473e 100644
--- a/drivers/net/ethernet/altera/Kconfig
+++ b/drivers/net/ethernet/altera/Kconfig
@@ -1,5 +1,6 @@
1config ALTERA_TSE 1config ALTERA_TSE
2 tristate "Altera Triple-Speed Ethernet MAC support" 2 tristate "Altera Triple-Speed Ethernet MAC support"
3 depends on HAS_DMA
3 select PHYLIB 4 select PHYLIB
4 ---help--- 5 ---help---
5 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 6 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c
index 3df18669ea30..4d1f2fdd5c32 100644
--- a/drivers/net/ethernet/altera/altera_msgdma.c
+++ b/drivers/net/ethernet/altera/altera_msgdma.c
@@ -18,6 +18,7 @@
18#include "altera_utils.h" 18#include "altera_utils.h"
19#include "altera_tse.h" 19#include "altera_tse.h"
20#include "altera_msgdmahw.h" 20#include "altera_msgdmahw.h"
21#include "altera_msgdma.h"
21 22
22/* No initialization work to do for MSGDMA */ 23/* No initialization work to do for MSGDMA */
23int msgdma_initialize(struct altera_tse_private *priv) 24int msgdma_initialize(struct altera_tse_private *priv)
@@ -29,6 +30,10 @@ void msgdma_uninitialize(struct altera_tse_private *priv)
29{ 30{
30} 31}
31 32
33void msgdma_start_rxdma(struct altera_tse_private *priv)
34{
35}
36
32void msgdma_reset(struct altera_tse_private *priv) 37void msgdma_reset(struct altera_tse_private *priv)
33{ 38{
34 int counter; 39 int counter;
@@ -154,7 +159,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv)
154 159
155/* Put buffer to the mSGDMA RX FIFO 160/* Put buffer to the mSGDMA RX FIFO
156 */ 161 */
157int msgdma_add_rx_desc(struct altera_tse_private *priv, 162void msgdma_add_rx_desc(struct altera_tse_private *priv,
158 struct tse_buffer *rxbuffer) 163 struct tse_buffer *rxbuffer)
159{ 164{
160 struct msgdma_extended_desc *desc = priv->rx_dma_desc; 165 struct msgdma_extended_desc *desc = priv->rx_dma_desc;
@@ -175,7 +180,6 @@ int msgdma_add_rx_desc(struct altera_tse_private *priv,
175 iowrite32(0, &desc->burst_seq_num); 180 iowrite32(0, &desc->burst_seq_num);
176 iowrite32(0x00010001, &desc->stride); 181 iowrite32(0x00010001, &desc->stride);
177 iowrite32(control, &desc->control); 182 iowrite32(control, &desc->control);
178 return 1;
179} 183}
180 184
181/* status is returned on upper 16 bits, 185/* status is returned on upper 16 bits,
diff --git a/drivers/net/ethernet/altera/altera_msgdma.h b/drivers/net/ethernet/altera/altera_msgdma.h
index 7f0f5bf2bba2..42cf61c81057 100644
--- a/drivers/net/ethernet/altera/altera_msgdma.h
+++ b/drivers/net/ethernet/altera/altera_msgdma.h
@@ -25,10 +25,11 @@ void msgdma_disable_txirq(struct altera_tse_private *);
25void msgdma_clear_rxirq(struct altera_tse_private *); 25void msgdma_clear_rxirq(struct altera_tse_private *);
26void msgdma_clear_txirq(struct altera_tse_private *); 26void msgdma_clear_txirq(struct altera_tse_private *);
27u32 msgdma_tx_completions(struct altera_tse_private *); 27u32 msgdma_tx_completions(struct altera_tse_private *);
28int msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); 28void msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *);
29int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); 29int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *);
30u32 msgdma_rx_status(struct altera_tse_private *); 30u32 msgdma_rx_status(struct altera_tse_private *);
31int msgdma_initialize(struct altera_tse_private *); 31int msgdma_initialize(struct altera_tse_private *);
32void msgdma_uninitialize(struct altera_tse_private *); 32void msgdma_uninitialize(struct altera_tse_private *);
33void msgdma_start_rxdma(struct altera_tse_private *);
33 34
34#endif /* __ALTERA_MSGDMA_H__ */ 35#endif /* __ALTERA_MSGDMA_H__ */
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c
index 0ee96639ae44..9ce8630692b6 100644
--- a/drivers/net/ethernet/altera/altera_sgdma.c
+++ b/drivers/net/ethernet/altera/altera_sgdma.c
@@ -20,15 +20,15 @@
20#include "altera_sgdmahw.h" 20#include "altera_sgdmahw.h"
21#include "altera_sgdma.h" 21#include "altera_sgdma.h"
22 22
23static void sgdma_descrip(struct sgdma_descrip *desc, 23static void sgdma_setup_descrip(struct sgdma_descrip *desc,
24 struct sgdma_descrip *ndesc, 24 struct sgdma_descrip *ndesc,
25 dma_addr_t ndesc_phys, 25 dma_addr_t ndesc_phys,
26 dma_addr_t raddr, 26 dma_addr_t raddr,
27 dma_addr_t waddr, 27 dma_addr_t waddr,
28 u16 length, 28 u16 length,
29 int generate_eop, 29 int generate_eop,
30 int rfixed, 30 int rfixed,
31 int wfixed); 31 int wfixed);
32 32
33static int sgdma_async_write(struct altera_tse_private *priv, 33static int sgdma_async_write(struct altera_tse_private *priv,
34 struct sgdma_descrip *desc); 34 struct sgdma_descrip *desc);
@@ -64,11 +64,15 @@ queue_rx_peekhead(struct altera_tse_private *priv);
64 64
65int sgdma_initialize(struct altera_tse_private *priv) 65int sgdma_initialize(struct altera_tse_private *priv)
66{ 66{
67 priv->txctrlreg = SGDMA_CTRLREG_ILASTD; 67 priv->txctrlreg = SGDMA_CTRLREG_ILASTD |
68 SGDMA_CTRLREG_INTEN;
68 69
69 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | 70 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP |
71 SGDMA_CTRLREG_INTEN |
70 SGDMA_CTRLREG_ILASTD; 72 SGDMA_CTRLREG_ILASTD;
71 73
74 priv->sgdmadesclen = sizeof(struct sgdma_descrip);
75
72 INIT_LIST_HEAD(&priv->txlisthd); 76 INIT_LIST_HEAD(&priv->txlisthd);
73 INIT_LIST_HEAD(&priv->rxlisthd); 77 INIT_LIST_HEAD(&priv->rxlisthd);
74 78
@@ -93,6 +97,16 @@ int sgdma_initialize(struct altera_tse_private *priv)
93 return -EINVAL; 97 return -EINVAL;
94 } 98 }
95 99
100 /* Initialize descriptor memory to all 0's, sync memory to cache */
101 memset(priv->tx_dma_desc, 0, priv->txdescmem);
102 memset(priv->rx_dma_desc, 0, priv->rxdescmem);
103
104 dma_sync_single_for_device(priv->device, priv->txdescphys,
105 priv->txdescmem, DMA_TO_DEVICE);
106
107 dma_sync_single_for_device(priv->device, priv->rxdescphys,
108 priv->rxdescmem, DMA_TO_DEVICE);
109
96 return 0; 110 return 0;
97} 111}
98 112
@@ -130,26 +144,23 @@ void sgdma_reset(struct altera_tse_private *priv)
130 iowrite32(0, &prxsgdma->control); 144 iowrite32(0, &prxsgdma->control);
131} 145}
132 146
147/* For SGDMA, interrupts remain enabled after initially enabling,
148 * so no need to provide implementations for abstract enable
149 * and disable
150 */
151
133void sgdma_enable_rxirq(struct altera_tse_private *priv) 152void sgdma_enable_rxirq(struct altera_tse_private *priv)
134{ 153{
135 struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
136 priv->rxctrlreg |= SGDMA_CTRLREG_INTEN;
137 tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
138} 154}
139 155
140void sgdma_enable_txirq(struct altera_tse_private *priv) 156void sgdma_enable_txirq(struct altera_tse_private *priv)
141{ 157{
142 struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
143 priv->txctrlreg |= SGDMA_CTRLREG_INTEN;
144 tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
145} 158}
146 159
147/* for SGDMA, RX interrupts remain enabled after enabling */
148void sgdma_disable_rxirq(struct altera_tse_private *priv) 160void sgdma_disable_rxirq(struct altera_tse_private *priv)
149{ 161{
150} 162}
151 163
152/* for SGDMA, TX interrupts remain enabled after enabling */
153void sgdma_disable_txirq(struct altera_tse_private *priv) 164void sgdma_disable_txirq(struct altera_tse_private *priv)
154{ 165{
155} 166}
@@ -184,15 +195,15 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer)
184 if (sgdma_txbusy(priv)) 195 if (sgdma_txbusy(priv))
185 return 0; 196 return 0;
186 197
187 sgdma_descrip(cdesc, /* current descriptor */ 198 sgdma_setup_descrip(cdesc, /* current descriptor */
188 ndesc, /* next descriptor */ 199 ndesc, /* next descriptor */
189 sgdma_txphysaddr(priv, ndesc), 200 sgdma_txphysaddr(priv, ndesc),
190 buffer->dma_addr, /* address of packet to xmit */ 201 buffer->dma_addr, /* address of packet to xmit */
191 0, /* write addr 0 for tx dma */ 202 0, /* write addr 0 for tx dma */
192 buffer->len, /* length of packet */ 203 buffer->len, /* length of packet */
193 SGDMA_CONTROL_EOP, /* Generate EOP */ 204 SGDMA_CONTROL_EOP, /* Generate EOP */
194 0, /* read fixed */ 205 0, /* read fixed */
195 SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ 206 SGDMA_CONTROL_WR_FIXED); /* Generate SOP */
196 207
197 pktstx = sgdma_async_write(priv, cdesc); 208 pktstx = sgdma_async_write(priv, cdesc);
198 209
@@ -219,11 +230,15 @@ u32 sgdma_tx_completions(struct altera_tse_private *priv)
219 return ready; 230 return ready;
220} 231}
221 232
222int sgdma_add_rx_desc(struct altera_tse_private *priv, 233void sgdma_start_rxdma(struct altera_tse_private *priv)
223 struct tse_buffer *rxbuffer) 234{
235 sgdma_async_read(priv);
236}
237
238void sgdma_add_rx_desc(struct altera_tse_private *priv,
239 struct tse_buffer *rxbuffer)
224{ 240{
225 queue_rx(priv, rxbuffer); 241 queue_rx(priv, rxbuffer);
226 return sgdma_async_read(priv);
227} 242}
228 243
229/* status is returned on upper 16 bits, 244/* status is returned on upper 16 bits,
@@ -240,28 +255,52 @@ u32 sgdma_rx_status(struct altera_tse_private *priv)
240 unsigned int pktstatus = 0; 255 unsigned int pktstatus = 0;
241 struct tse_buffer *rxbuffer = NULL; 256 struct tse_buffer *rxbuffer = NULL;
242 257
243 dma_sync_single_for_cpu(priv->device, 258 u32 sts = ioread32(&csr->status);
244 priv->rxdescphys,
245 priv->rxdescmem,
246 DMA_BIDIRECTIONAL);
247 259
248 desc = &base[0]; 260 desc = &base[0];
249 if ((ioread32(&csr->status) & SGDMA_STSREG_EOP) || 261 if (sts & SGDMA_STSREG_EOP) {
250 (desc->status & SGDMA_STATUS_EOP)) { 262 dma_sync_single_for_cpu(priv->device,
263 priv->rxdescphys,
264 priv->sgdmadesclen,
265 DMA_FROM_DEVICE);
266
251 pktlength = desc->bytes_xferred; 267 pktlength = desc->bytes_xferred;
252 pktstatus = desc->status & 0x3f; 268 pktstatus = desc->status & 0x3f;
253 rxstatus = pktstatus; 269 rxstatus = pktstatus;
254 rxstatus = rxstatus << 16; 270 rxstatus = rxstatus << 16;
255 rxstatus |= (pktlength & 0xffff); 271 rxstatus |= (pktlength & 0xffff);
256 272
257 desc->status = 0; 273 if (rxstatus) {
274 desc->status = 0;
258 275
259 rxbuffer = dequeue_rx(priv); 276 rxbuffer = dequeue_rx(priv);
260 if (rxbuffer == NULL) 277 if (rxbuffer == NULL)
261 netdev_err(priv->dev, 278 netdev_info(priv->dev,
262 "sgdma rx and rx queue empty!\n"); 279 "sgdma rx and rx queue empty!\n");
280
281 /* Clear control */
282 iowrite32(0, &csr->control);
283 /* clear status */
284 iowrite32(0xf, &csr->status);
263 285
264 /* kick the rx sgdma after reaping this descriptor */ 286 /* kick the rx sgdma after reaping this descriptor */
287 pktsrx = sgdma_async_read(priv);
288
289 } else {
290 /* If the SGDMA indicated an end of packet on recv,
291 * then it's expected that the rxstatus from the
292 * descriptor is non-zero - meaning a valid packet
293 * with a nonzero length, or an error has been
294 * indicated. if not, then all we can do is signal
295 * an error and return no packet received. Most likely
296 * there is a system design error, or an error in the
297 * underlying kernel (cache or cache management problem)
298 */
299 netdev_err(priv->dev,
300 "SGDMA RX Error Info: %x, %x, %x\n",
301 sts, desc->status, rxstatus);
302 }
303 } else if (sts == 0) {
265 pktsrx = sgdma_async_read(priv); 304 pktsrx = sgdma_async_read(priv);
266 } 305 }
267 306
@@ -270,15 +309,15 @@ u32 sgdma_rx_status(struct altera_tse_private *priv)
270 309
271 310
272/* Private functions */ 311/* Private functions */
273static void sgdma_descrip(struct sgdma_descrip *desc, 312static void sgdma_setup_descrip(struct sgdma_descrip *desc,
274 struct sgdma_descrip *ndesc, 313 struct sgdma_descrip *ndesc,
275 dma_addr_t ndesc_phys, 314 dma_addr_t ndesc_phys,
276 dma_addr_t raddr, 315 dma_addr_t raddr,
277 dma_addr_t waddr, 316 dma_addr_t waddr,
278 u16 length, 317 u16 length,
279 int generate_eop, 318 int generate_eop,
280 int rfixed, 319 int rfixed,
281 int wfixed) 320 int wfixed)
282{ 321{
283 /* Clear the next descriptor as not owned by hardware */ 322 /* Clear the next descriptor as not owned by hardware */
284 u32 ctrl = ndesc->control; 323 u32 ctrl = ndesc->control;
@@ -319,35 +358,29 @@ static int sgdma_async_read(struct altera_tse_private *priv)
319 struct sgdma_descrip *cdesc = &descbase[0]; 358 struct sgdma_descrip *cdesc = &descbase[0];
320 struct sgdma_descrip *ndesc = &descbase[1]; 359 struct sgdma_descrip *ndesc = &descbase[1];
321 360
322 unsigned int sts = ioread32(&csr->status);
323 struct tse_buffer *rxbuffer = NULL; 361 struct tse_buffer *rxbuffer = NULL;
324 362
325 if (!sgdma_rxbusy(priv)) { 363 if (!sgdma_rxbusy(priv)) {
326 rxbuffer = queue_rx_peekhead(priv); 364 rxbuffer = queue_rx_peekhead(priv);
327 if (rxbuffer == NULL) 365 if (rxbuffer == NULL) {
366 netdev_err(priv->dev, "no rx buffers available\n");
328 return 0; 367 return 0;
329 368 }
330 sgdma_descrip(cdesc, /* current descriptor */ 369
331 ndesc, /* next descriptor */ 370 sgdma_setup_descrip(cdesc, /* current descriptor */
332 sgdma_rxphysaddr(priv, ndesc), 371 ndesc, /* next descriptor */
333 0, /* read addr 0 for rx dma */ 372 sgdma_rxphysaddr(priv, ndesc),
334 rxbuffer->dma_addr, /* write addr for rx dma */ 373 0, /* read addr 0 for rx dma */
335 0, /* read 'til EOP */ 374 rxbuffer->dma_addr, /* write addr for rx dma */
336 0, /* EOP: NA for rx dma */ 375 0, /* read 'til EOP */
337 0, /* read fixed: NA for rx dma */ 376 0, /* EOP: NA for rx dma */
338 0); /* SOP: NA for rx DMA */ 377 0, /* read fixed: NA for rx dma */
339 378 0); /* SOP: NA for rx DMA */
340 /* clear control and status */
341 iowrite32(0, &csr->control);
342
343 /* If status available, clear those bits */
344 if (sts & 0xf)
345 iowrite32(0xf, &csr->status);
346 379
347 dma_sync_single_for_device(priv->device, 380 dma_sync_single_for_device(priv->device,
348 priv->rxdescphys, 381 priv->rxdescphys,
349 priv->rxdescmem, 382 priv->sgdmadesclen,
350 DMA_BIDIRECTIONAL); 383 DMA_TO_DEVICE);
351 384
352 iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), 385 iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)),
353 &csr->next_descrip); 386 &csr->next_descrip);
@@ -374,7 +407,7 @@ static int sgdma_async_write(struct altera_tse_private *priv,
374 iowrite32(0x1f, &csr->status); 407 iowrite32(0x1f, &csr->status);
375 408
376 dma_sync_single_for_device(priv->device, priv->txdescphys, 409 dma_sync_single_for_device(priv->device, priv->txdescphys,
377 priv->txdescmem, DMA_TO_DEVICE); 410 priv->sgdmadesclen, DMA_TO_DEVICE);
378 411
379 iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), 412 iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)),
380 &csr->next_descrip); 413 &csr->next_descrip);
diff --git a/drivers/net/ethernet/altera/altera_sgdma.h b/drivers/net/ethernet/altera/altera_sgdma.h
index 07d471729dc4..584977e29ef9 100644
--- a/drivers/net/ethernet/altera/altera_sgdma.h
+++ b/drivers/net/ethernet/altera/altera_sgdma.h
@@ -26,10 +26,11 @@ void sgdma_clear_rxirq(struct altera_tse_private *);
26void sgdma_clear_txirq(struct altera_tse_private *); 26void sgdma_clear_txirq(struct altera_tse_private *);
27int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); 27int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *);
28u32 sgdma_tx_completions(struct altera_tse_private *); 28u32 sgdma_tx_completions(struct altera_tse_private *);
29int sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); 29void sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *);
30void sgdma_status(struct altera_tse_private *); 30void sgdma_status(struct altera_tse_private *);
31u32 sgdma_rx_status(struct altera_tse_private *); 31u32 sgdma_rx_status(struct altera_tse_private *);
32int sgdma_initialize(struct altera_tse_private *); 32int sgdma_initialize(struct altera_tse_private *);
33void sgdma_uninitialize(struct altera_tse_private *); 33void sgdma_uninitialize(struct altera_tse_private *);
34void sgdma_start_rxdma(struct altera_tse_private *);
34 35
35#endif /* __ALTERA_SGDMA_H__ */ 36#endif /* __ALTERA_SGDMA_H__ */
diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h
index 8feeed05de0e..465c4aabebbd 100644
--- a/drivers/net/ethernet/altera/altera_tse.h
+++ b/drivers/net/ethernet/altera/altera_tse.h
@@ -58,6 +58,8 @@
58/* MAC function configuration default settings */ 58/* MAC function configuration default settings */
59#define ALTERA_TSE_TX_IPG_LENGTH 12 59#define ALTERA_TSE_TX_IPG_LENGTH 12
60 60
61#define ALTERA_TSE_PAUSE_QUANTA 0xffff
62
61#define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) 63#define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1)
62 64
63/* MAC Command_Config Register Bit Definitions 65/* MAC Command_Config Register Bit Definitions
@@ -390,10 +392,11 @@ struct altera_dmaops {
390 void (*clear_rxirq)(struct altera_tse_private *); 392 void (*clear_rxirq)(struct altera_tse_private *);
391 int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); 393 int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *);
392 u32 (*tx_completions)(struct altera_tse_private *); 394 u32 (*tx_completions)(struct altera_tse_private *);
393 int (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); 395 void (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *);
394 u32 (*get_rx_status)(struct altera_tse_private *); 396 u32 (*get_rx_status)(struct altera_tse_private *);
395 int (*init_dma)(struct altera_tse_private *); 397 int (*init_dma)(struct altera_tse_private *);
396 void (*uninit_dma)(struct altera_tse_private *); 398 void (*uninit_dma)(struct altera_tse_private *);
399 void (*start_rxdma)(struct altera_tse_private *);
397}; 400};
398 401
399/* This structure is private to each device. 402/* This structure is private to each device.
@@ -453,6 +456,7 @@ struct altera_tse_private {
453 u32 rxctrlreg; 456 u32 rxctrlreg;
454 dma_addr_t rxdescphys; 457 dma_addr_t rxdescphys;
455 dma_addr_t txdescphys; 458 dma_addr_t txdescphys;
459 size_t sgdmadesclen;
456 460
457 struct list_head txlisthd; 461 struct list_head txlisthd;
458 struct list_head rxlisthd; 462 struct list_head rxlisthd;
diff --git a/drivers/net/ethernet/altera/altera_tse_ethtool.c b/drivers/net/ethernet/altera/altera_tse_ethtool.c
index 319ca74f5e74..76133caffa78 100644
--- a/drivers/net/ethernet/altera/altera_tse_ethtool.c
+++ b/drivers/net/ethernet/altera/altera_tse_ethtool.c
@@ -77,7 +77,7 @@ static void tse_get_drvinfo(struct net_device *dev,
77 struct altera_tse_private *priv = netdev_priv(dev); 77 struct altera_tse_private *priv = netdev_priv(dev);
78 u32 rev = ioread32(&priv->mac_dev->megacore_revision); 78 u32 rev = ioread32(&priv->mac_dev->megacore_revision);
79 79
80 strcpy(info->driver, "Altera TSE MAC IP Driver"); 80 strcpy(info->driver, "altera_tse");
81 strcpy(info->version, "v8.0"); 81 strcpy(info->version, "v8.0");
82 snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d", 82 snprintf(info->fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d",
83 rev & 0xFFFF, (rev & 0xFFFF0000) >> 16); 83 rev & 0xFFFF, (rev & 0xFFFF0000) >> 16);
@@ -185,6 +185,12 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs,
185 * how to do any special formatting of this data. 185 * how to do any special formatting of this data.
186 * This version number will need to change if and 186 * This version number will need to change if and
187 * when this register table is changed. 187 * when this register table is changed.
188 *
189 * version[31:0] = 1: Dump the first 128 TSE Registers
190 * Upper bits are all 0 by default
191 *
192 * Upper 16-bits will indicate feature presence for
193 * Ethtool register decoding in future version.
188 */ 194 */
189 195
190 regs->version = 1; 196 regs->version = 1;
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index c70a29e0b9f7..e44a4aeb9701 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -224,6 +224,7 @@ static int tse_init_rx_buffer(struct altera_tse_private *priv,
224 dev_kfree_skb_any(rxbuffer->skb); 224 dev_kfree_skb_any(rxbuffer->skb);
225 return -EINVAL; 225 return -EINVAL;
226 } 226 }
227 rxbuffer->dma_addr &= (dma_addr_t)~3;
227 rxbuffer->len = len; 228 rxbuffer->len = len;
228 return 0; 229 return 0;
229} 230}
@@ -425,9 +426,10 @@ static int tse_rx(struct altera_tse_private *priv, int limit)
425 priv->dev->stats.rx_bytes += pktlength; 426 priv->dev->stats.rx_bytes += pktlength;
426 427
427 entry = next_entry; 428 entry = next_entry;
429
430 tse_rx_refill(priv);
428 } 431 }
429 432
430 tse_rx_refill(priv);
431 return count; 433 return count;
432} 434}
433 435
@@ -520,7 +522,6 @@ static irqreturn_t altera_isr(int irq, void *dev_id)
520 struct altera_tse_private *priv; 522 struct altera_tse_private *priv;
521 unsigned long int flags; 523 unsigned long int flags;
522 524
523
524 if (unlikely(!dev)) { 525 if (unlikely(!dev)) {
525 pr_err("%s: invalid dev pointer\n", __func__); 526 pr_err("%s: invalid dev pointer\n", __func__);
526 return IRQ_NONE; 527 return IRQ_NONE;
@@ -868,13 +869,13 @@ static int init_mac(struct altera_tse_private *priv)
868 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit 869 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
869 * start address 870 * start address
870 */ 871 */
871 tse_clear_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); 872 tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
872 tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | 873 tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
873 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); 874 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
874 875
875 /* Set the MAC options */ 876 /* Set the MAC options */
876 cmd = ioread32(&mac->command_config); 877 cmd = ioread32(&mac->command_config);
877 cmd |= MAC_CMDCFG_PAD_EN; /* Padding Removal on Receive */ 878 cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */
878 cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ 879 cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */
879 cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames 880 cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames
880 * with CRC errors 881 * with CRC errors
@@ -882,8 +883,16 @@ static int init_mac(struct altera_tse_private *priv)
882 cmd |= MAC_CMDCFG_CNTL_FRM_ENA; 883 cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
883 cmd &= ~MAC_CMDCFG_TX_ENA; 884 cmd &= ~MAC_CMDCFG_TX_ENA;
884 cmd &= ~MAC_CMDCFG_RX_ENA; 885 cmd &= ~MAC_CMDCFG_RX_ENA;
886
887 /* Default speed and duplex setting, full/100 */
888 cmd &= ~MAC_CMDCFG_HD_ENA;
889 cmd &= ~MAC_CMDCFG_ETH_SPEED;
890 cmd &= ~MAC_CMDCFG_ENA_10;
891
885 iowrite32(cmd, &mac->command_config); 892 iowrite32(cmd, &mac->command_config);
886 893
894 iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta);
895
887 if (netif_msg_hw(priv)) 896 if (netif_msg_hw(priv))
888 dev_dbg(priv->device, 897 dev_dbg(priv->device,
889 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd); 898 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
@@ -1085,17 +1094,19 @@ static int tse_open(struct net_device *dev)
1085 1094
1086 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); 1095 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1087 1096
1088 /* Start MAC Rx/Tx */
1089 spin_lock(&priv->mac_cfg_lock);
1090 tse_set_mac(priv, true);
1091 spin_unlock(&priv->mac_cfg_lock);
1092
1093 if (priv->phydev) 1097 if (priv->phydev)
1094 phy_start(priv->phydev); 1098 phy_start(priv->phydev);
1095 1099
1096 napi_enable(&priv->napi); 1100 napi_enable(&priv->napi);
1097 netif_start_queue(dev); 1101 netif_start_queue(dev);
1098 1102
1103 priv->dmaops->start_rxdma(priv);
1104
1105 /* Start MAC Rx/Tx */
1106 spin_lock(&priv->mac_cfg_lock);
1107 tse_set_mac(priv, true);
1108 spin_unlock(&priv->mac_cfg_lock);
1109
1099 return 0; 1110 return 0;
1100 1111
1101tx_request_irq_error: 1112tx_request_irq_error:
@@ -1167,7 +1178,6 @@ static struct net_device_ops altera_tse_netdev_ops = {
1167 .ndo_validate_addr = eth_validate_addr, 1178 .ndo_validate_addr = eth_validate_addr,
1168}; 1179};
1169 1180
1170
1171static int request_and_map(struct platform_device *pdev, const char *name, 1181static int request_and_map(struct platform_device *pdev, const char *name,
1172 struct resource **res, void __iomem **ptr) 1182 struct resource **res, void __iomem **ptr)
1173{ 1183{
@@ -1235,7 +1245,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1235 /* Get the mapped address to the SGDMA descriptor memory */ 1245 /* Get the mapped address to the SGDMA descriptor memory */
1236 ret = request_and_map(pdev, "s1", &dma_res, &descmap); 1246 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1237 if (ret) 1247 if (ret)
1238 goto out_free; 1248 goto err_free_netdev;
1239 1249
1240 /* Start of that memory is for transmit descriptors */ 1250 /* Start of that memory is for transmit descriptors */
1241 priv->tx_dma_desc = descmap; 1251 priv->tx_dma_desc = descmap;
@@ -1254,24 +1264,24 @@ static int altera_tse_probe(struct platform_device *pdev)
1254 if (upper_32_bits(priv->rxdescmem_busaddr)) { 1264 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1255 dev_dbg(priv->device, 1265 dev_dbg(priv->device,
1256 "SGDMA bus addresses greater than 32-bits\n"); 1266 "SGDMA bus addresses greater than 32-bits\n");
1257 goto out_free; 1267 goto err_free_netdev;
1258 } 1268 }
1259 if (upper_32_bits(priv->txdescmem_busaddr)) { 1269 if (upper_32_bits(priv->txdescmem_busaddr)) {
1260 dev_dbg(priv->device, 1270 dev_dbg(priv->device,
1261 "SGDMA bus addresses greater than 32-bits\n"); 1271 "SGDMA bus addresses greater than 32-bits\n");
1262 goto out_free; 1272 goto err_free_netdev;
1263 } 1273 }
1264 } else if (priv->dmaops && 1274 } else if (priv->dmaops &&
1265 priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) { 1275 priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1266 ret = request_and_map(pdev, "rx_resp", &dma_res, 1276 ret = request_and_map(pdev, "rx_resp", &dma_res,
1267 &priv->rx_dma_resp); 1277 &priv->rx_dma_resp);
1268 if (ret) 1278 if (ret)
1269 goto out_free; 1279 goto err_free_netdev;
1270 1280
1271 ret = request_and_map(pdev, "tx_desc", &dma_res, 1281 ret = request_and_map(pdev, "tx_desc", &dma_res,
1272 &priv->tx_dma_desc); 1282 &priv->tx_dma_desc);
1273 if (ret) 1283 if (ret)
1274 goto out_free; 1284 goto err_free_netdev;
1275 1285
1276 priv->txdescmem = resource_size(dma_res); 1286 priv->txdescmem = resource_size(dma_res);
1277 priv->txdescmem_busaddr = dma_res->start; 1287 priv->txdescmem_busaddr = dma_res->start;
@@ -1279,13 +1289,13 @@ static int altera_tse_probe(struct platform_device *pdev)
1279 ret = request_and_map(pdev, "rx_desc", &dma_res, 1289 ret = request_and_map(pdev, "rx_desc", &dma_res,
1280 &priv->rx_dma_desc); 1290 &priv->rx_dma_desc);
1281 if (ret) 1291 if (ret)
1282 goto out_free; 1292 goto err_free_netdev;
1283 1293
1284 priv->rxdescmem = resource_size(dma_res); 1294 priv->rxdescmem = resource_size(dma_res);
1285 priv->rxdescmem_busaddr = dma_res->start; 1295 priv->rxdescmem_busaddr = dma_res->start;
1286 1296
1287 } else { 1297 } else {
1288 goto out_free; 1298 goto err_free_netdev;
1289 } 1299 }
1290 1300
1291 if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask))) 1301 if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
@@ -1294,26 +1304,26 @@ static int altera_tse_probe(struct platform_device *pdev)
1294 else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32))) 1304 else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1295 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32)); 1305 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1296 else 1306 else
1297 goto out_free; 1307 goto err_free_netdev;
1298 1308
1299 /* MAC address space */ 1309 /* MAC address space */
1300 ret = request_and_map(pdev, "control_port", &control_port, 1310 ret = request_and_map(pdev, "control_port", &control_port,
1301 (void __iomem **)&priv->mac_dev); 1311 (void __iomem **)&priv->mac_dev);
1302 if (ret) 1312 if (ret)
1303 goto out_free; 1313 goto err_free_netdev;
1304 1314
1305 /* xSGDMA Rx Dispatcher address space */ 1315 /* xSGDMA Rx Dispatcher address space */
1306 ret = request_and_map(pdev, "rx_csr", &dma_res, 1316 ret = request_and_map(pdev, "rx_csr", &dma_res,
1307 &priv->rx_dma_csr); 1317 &priv->rx_dma_csr);
1308 if (ret) 1318 if (ret)
1309 goto out_free; 1319 goto err_free_netdev;
1310 1320
1311 1321
1312 /* xSGDMA Tx Dispatcher address space */ 1322 /* xSGDMA Tx Dispatcher address space */
1313 ret = request_and_map(pdev, "tx_csr", &dma_res, 1323 ret = request_and_map(pdev, "tx_csr", &dma_res,
1314 &priv->tx_dma_csr); 1324 &priv->tx_dma_csr);
1315 if (ret) 1325 if (ret)
1316 goto out_free; 1326 goto err_free_netdev;
1317 1327
1318 1328
1319 /* Rx IRQ */ 1329 /* Rx IRQ */
@@ -1321,7 +1331,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1321 if (priv->rx_irq == -ENXIO) { 1331 if (priv->rx_irq == -ENXIO) {
1322 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n"); 1332 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1323 ret = -ENXIO; 1333 ret = -ENXIO;
1324 goto out_free; 1334 goto err_free_netdev;
1325 } 1335 }
1326 1336
1327 /* Tx IRQ */ 1337 /* Tx IRQ */
@@ -1329,7 +1339,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1329 if (priv->tx_irq == -ENXIO) { 1339 if (priv->tx_irq == -ENXIO) {
1330 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n"); 1340 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1331 ret = -ENXIO; 1341 ret = -ENXIO;
1332 goto out_free; 1342 goto err_free_netdev;
1333 } 1343 }
1334 1344
1335 /* get FIFO depths from device tree */ 1345 /* get FIFO depths from device tree */
@@ -1337,14 +1347,14 @@ static int altera_tse_probe(struct platform_device *pdev)
1337 &priv->rx_fifo_depth)) { 1347 &priv->rx_fifo_depth)) {
1338 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n"); 1348 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1339 ret = -ENXIO; 1349 ret = -ENXIO;
1340 goto out_free; 1350 goto err_free_netdev;
1341 } 1351 }
1342 1352
1343 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", 1353 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1344 &priv->rx_fifo_depth)) { 1354 &priv->rx_fifo_depth)) {
1345 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n"); 1355 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1346 ret = -ENXIO; 1356 ret = -ENXIO;
1347 goto out_free; 1357 goto err_free_netdev;
1348 } 1358 }
1349 1359
1350 /* get hash filter settings for this instance */ 1360 /* get hash filter settings for this instance */
@@ -1393,7 +1403,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1393 ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) { 1403 ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
1394 dev_err(&pdev->dev, "invalid phy-addr specified %d\n", 1404 dev_err(&pdev->dev, "invalid phy-addr specified %d\n",
1395 priv->phy_addr); 1405 priv->phy_addr);
1396 goto out_free; 1406 goto err_free_netdev;
1397 } 1407 }
1398 1408
1399 /* Create/attach to MDIO bus */ 1409 /* Create/attach to MDIO bus */
@@ -1401,7 +1411,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1401 atomic_add_return(1, &instance_count)); 1411 atomic_add_return(1, &instance_count));
1402 1412
1403 if (ret) 1413 if (ret)
1404 goto out_free; 1414 goto err_free_netdev;
1405 1415
1406 /* initialize netdev */ 1416 /* initialize netdev */
1407 ether_setup(ndev); 1417 ether_setup(ndev);
@@ -1438,7 +1448,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1438 ret = register_netdev(ndev); 1448 ret = register_netdev(ndev);
1439 if (ret) { 1449 if (ret) {
1440 dev_err(&pdev->dev, "failed to register TSE net device\n"); 1450 dev_err(&pdev->dev, "failed to register TSE net device\n");
1441 goto out_free_mdio; 1451 goto err_register_netdev;
1442 } 1452 }
1443 1453
1444 platform_set_drvdata(pdev, ndev); 1454 platform_set_drvdata(pdev, ndev);
@@ -1455,13 +1465,16 @@ static int altera_tse_probe(struct platform_device *pdev)
1455 ret = init_phy(ndev); 1465 ret = init_phy(ndev);
1456 if (ret != 0) { 1466 if (ret != 0) {
1457 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret); 1467 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1458 goto out_free_mdio; 1468 goto err_init_phy;
1459 } 1469 }
1460 return 0; 1470 return 0;
1461 1471
1462out_free_mdio: 1472err_init_phy:
1473 unregister_netdev(ndev);
1474err_register_netdev:
1475 netif_napi_del(&priv->napi);
1463 altera_tse_mdio_destroy(ndev); 1476 altera_tse_mdio_destroy(ndev);
1464out_free: 1477err_free_netdev:
1465 free_netdev(ndev); 1478 free_netdev(ndev);
1466 return ret; 1479 return ret;
1467} 1480}
@@ -1496,6 +1509,7 @@ struct altera_dmaops altera_dtype_sgdma = {
1496 .get_rx_status = sgdma_rx_status, 1509 .get_rx_status = sgdma_rx_status,
1497 .init_dma = sgdma_initialize, 1510 .init_dma = sgdma_initialize,
1498 .uninit_dma = sgdma_uninitialize, 1511 .uninit_dma = sgdma_uninitialize,
1512 .start_rxdma = sgdma_start_rxdma,
1499}; 1513};
1500 1514
1501struct altera_dmaops altera_dtype_msgdma = { 1515struct altera_dmaops altera_dtype_msgdma = {
@@ -1514,6 +1528,7 @@ struct altera_dmaops altera_dtype_msgdma = {
1514 .get_rx_status = msgdma_rx_status, 1528 .get_rx_status = msgdma_rx_status,
1515 .init_dma = msgdma_initialize, 1529 .init_dma = msgdma_initialize,
1516 .uninit_dma = msgdma_uninitialize, 1530 .uninit_dma = msgdma_uninitialize,
1531 .start_rxdma = msgdma_start_rxdma,
1517}; 1532};
1518 1533
1519static struct of_device_id altera_tse_ids[] = { 1534static struct of_device_id altera_tse_ids[] = {
diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h
index 928fac6dd10a..53f85bf71526 100644
--- a/drivers/net/ethernet/arc/emac.h
+++ b/drivers/net/ethernet/arc/emac.h
@@ -11,6 +11,7 @@
11#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
12#include <linux/netdevice.h> 12#include <linux/netdevice.h>
13#include <linux/phy.h> 13#include <linux/phy.h>
14#include <linux/clk.h>
14 15
15/* STATUS and ENABLE Register bit masks */ 16/* STATUS and ENABLE Register bit masks */
16#define TXINT_MASK (1<<0) /* Transmit interrupt */ 17#define TXINT_MASK (1<<0) /* Transmit interrupt */
@@ -131,6 +132,7 @@ struct arc_emac_priv {
131 struct mii_bus *bus; 132 struct mii_bus *bus;
132 133
133 void __iomem *regs; 134 void __iomem *regs;
135 struct clk *clk;
134 136
135 struct napi_struct napi; 137 struct napi_struct napi;
136 struct net_device_stats stats; 138 struct net_device_stats stats;
diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c
index eeecc29cf5b7..d647a7d115ac 100644
--- a/drivers/net/ethernet/arc/emac_main.c
+++ b/drivers/net/ethernet/arc/emac_main.c
@@ -574,6 +574,18 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
574 return NETDEV_TX_OK; 574 return NETDEV_TX_OK;
575} 575}
576 576
577static void arc_emac_set_address_internal(struct net_device *ndev)
578{
579 struct arc_emac_priv *priv = netdev_priv(ndev);
580 unsigned int addr_low, addr_hi;
581
582 addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]);
583 addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]);
584
585 arc_reg_set(priv, R_ADDRL, addr_low);
586 arc_reg_set(priv, R_ADDRH, addr_hi);
587}
588
577/** 589/**
578 * arc_emac_set_address - Set the MAC address for this device. 590 * arc_emac_set_address - Set the MAC address for this device.
579 * @ndev: Pointer to net_device structure. 591 * @ndev: Pointer to net_device structure.
@@ -587,9 +599,7 @@ static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
587 */ 599 */
588static int arc_emac_set_address(struct net_device *ndev, void *p) 600static int arc_emac_set_address(struct net_device *ndev, void *p)
589{ 601{
590 struct arc_emac_priv *priv = netdev_priv(ndev);
591 struct sockaddr *addr = p; 602 struct sockaddr *addr = p;
592 unsigned int addr_low, addr_hi;
593 603
594 if (netif_running(ndev)) 604 if (netif_running(ndev))
595 return -EBUSY; 605 return -EBUSY;
@@ -599,11 +609,7 @@ static int arc_emac_set_address(struct net_device *ndev, void *p)
599 609
600 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); 610 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
601 611
602 addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]); 612 arc_emac_set_address_internal(ndev);
603 addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]);
604
605 arc_reg_set(priv, R_ADDRL, addr_low);
606 arc_reg_set(priv, R_ADDRH, addr_hi);
607 613
608 return 0; 614 return 0;
609} 615}
@@ -643,13 +649,6 @@ static int arc_emac_probe(struct platform_device *pdev)
643 return -ENODEV; 649 return -ENODEV;
644 } 650 }
645 651
646 /* Get CPU clock frequency from device tree */
647 if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
648 &clock_frequency)) {
649 dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n");
650 return -EINVAL;
651 }
652
653 /* Get IRQ from device tree */ 652 /* Get IRQ from device tree */
654 irq = irq_of_parse_and_map(pdev->dev.of_node, 0); 653 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
655 if (!irq) { 654 if (!irq) {
@@ -677,17 +676,36 @@ static int arc_emac_probe(struct platform_device *pdev)
677 priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs); 676 priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs);
678 if (IS_ERR(priv->regs)) { 677 if (IS_ERR(priv->regs)) {
679 err = PTR_ERR(priv->regs); 678 err = PTR_ERR(priv->regs);
680 goto out; 679 goto out_netdev;
681 } 680 }
682 dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs); 681 dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs);
683 682
683 priv->clk = of_clk_get(pdev->dev.of_node, 0);
684 if (IS_ERR(priv->clk)) {
685 /* Get CPU clock frequency from device tree */
686 if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
687 &clock_frequency)) {
688 dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n");
689 err = -EINVAL;
690 goto out_netdev;
691 }
692 } else {
693 err = clk_prepare_enable(priv->clk);
694 if (err) {
695 dev_err(&pdev->dev, "failed to enable clock\n");
696 goto out_clkget;
697 }
698
699 clock_frequency = clk_get_rate(priv->clk);
700 }
701
684 id = arc_reg_get(priv, R_ID); 702 id = arc_reg_get(priv, R_ID);
685 703
686 /* Check for EMAC revision 5 or 7, magic number */ 704 /* Check for EMAC revision 5 or 7, magic number */
687 if (!(id == 0x0005fd02 || id == 0x0007fd02)) { 705 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
688 dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id); 706 dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id);
689 err = -ENODEV; 707 err = -ENODEV;
690 goto out; 708 goto out_clken;
691 } 709 }
692 dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id); 710 dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id);
693 711
@@ -702,7 +720,7 @@ static int arc_emac_probe(struct platform_device *pdev)
702 ndev->name, ndev); 720 ndev->name, ndev);
703 if (err) { 721 if (err) {
704 dev_err(&pdev->dev, "could not allocate IRQ\n"); 722 dev_err(&pdev->dev, "could not allocate IRQ\n");
705 goto out; 723 goto out_clken;
706 } 724 }
707 725
708 /* Get MAC address from device tree */ 726 /* Get MAC address from device tree */
@@ -713,6 +731,7 @@ static int arc_emac_probe(struct platform_device *pdev)
713 else 731 else
714 eth_hw_addr_random(ndev); 732 eth_hw_addr_random(ndev);
715 733
734 arc_emac_set_address_internal(ndev);
716 dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr); 735 dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr);
717 736
718 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ 737 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
@@ -722,7 +741,7 @@ static int arc_emac_probe(struct platform_device *pdev)
722 if (!priv->rxbd) { 741 if (!priv->rxbd) {
723 dev_err(&pdev->dev, "failed to allocate data buffers\n"); 742 dev_err(&pdev->dev, "failed to allocate data buffers\n");
724 err = -ENOMEM; 743 err = -ENOMEM;
725 goto out; 744 goto out_clken;
726 } 745 }
727 746
728 priv->txbd = priv->rxbd + RX_BD_NUM; 747 priv->txbd = priv->rxbd + RX_BD_NUM;
@@ -734,7 +753,7 @@ static int arc_emac_probe(struct platform_device *pdev)
734 err = arc_mdio_probe(pdev, priv); 753 err = arc_mdio_probe(pdev, priv);
735 if (err) { 754 if (err) {
736 dev_err(&pdev->dev, "failed to probe MII bus\n"); 755 dev_err(&pdev->dev, "failed to probe MII bus\n");
737 goto out; 756 goto out_clken;
738 } 757 }
739 758
740 priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, 759 priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
@@ -742,7 +761,7 @@ static int arc_emac_probe(struct platform_device *pdev)
742 if (!priv->phy_dev) { 761 if (!priv->phy_dev) {
743 dev_err(&pdev->dev, "of_phy_connect() failed\n"); 762 dev_err(&pdev->dev, "of_phy_connect() failed\n");
744 err = -ENODEV; 763 err = -ENODEV;
745 goto out; 764 goto out_mdio;
746 } 765 }
747 766
748 dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n", 767 dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n",
@@ -752,14 +771,25 @@ static int arc_emac_probe(struct platform_device *pdev)
752 771
753 err = register_netdev(ndev); 772 err = register_netdev(ndev);
754 if (err) { 773 if (err) {
755 netif_napi_del(&priv->napi);
756 dev_err(&pdev->dev, "failed to register network device\n"); 774 dev_err(&pdev->dev, "failed to register network device\n");
757 goto out; 775 goto out_netif_api;
758 } 776 }
759 777
760 return 0; 778 return 0;
761 779
762out: 780out_netif_api:
781 netif_napi_del(&priv->napi);
782 phy_disconnect(priv->phy_dev);
783 priv->phy_dev = NULL;
784out_mdio:
785 arc_mdio_remove(priv);
786out_clken:
787 if (!IS_ERR(priv->clk))
788 clk_disable_unprepare(priv->clk);
789out_clkget:
790 if (!IS_ERR(priv->clk))
791 clk_put(priv->clk);
792out_netdev:
763 free_netdev(ndev); 793 free_netdev(ndev);
764 return err; 794 return err;
765} 795}
@@ -774,6 +804,12 @@ static int arc_emac_remove(struct platform_device *pdev)
774 arc_mdio_remove(priv); 804 arc_mdio_remove(priv);
775 unregister_netdev(ndev); 805 unregister_netdev(ndev);
776 netif_napi_del(&priv->napi); 806 netif_napi_del(&priv->napi);
807
808 if (!IS_ERR(priv->clk)) {
809 clk_disable_unprepare(priv->clk);
810 clk_put(priv->clk);
811 }
812
777 free_netdev(ndev); 813 free_netdev(ndev);
778 814
779 return 0; 815 return 0;
diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c
index a8efb18e42fa..0ab83708b6a1 100644
--- a/drivers/net/ethernet/broadcom/bnx2.c
+++ b/drivers/net/ethernet/broadcom/bnx2.c
@@ -8627,6 +8627,7 @@ bnx2_remove_one(struct pci_dev *pdev)
8627 pci_disable_device(pdev); 8627 pci_disable_device(pdev);
8628} 8628}
8629 8629
8630#ifdef CONFIG_PM_SLEEP
8630static int 8631static int
8631bnx2_suspend(struct device *device) 8632bnx2_suspend(struct device *device)
8632{ 8633{
@@ -8665,7 +8666,6 @@ bnx2_resume(struct device *device)
8665 return 0; 8666 return 0;
8666} 8667}
8667 8668
8668#ifdef CONFIG_PM_SLEEP
8669static SIMPLE_DEV_PM_OPS(bnx2_pm_ops, bnx2_suspend, bnx2_resume); 8669static SIMPLE_DEV_PM_OPS(bnx2_pm_ops, bnx2_suspend, bnx2_resume);
8670#define BNX2_PM_OPS (&bnx2_pm_ops) 8670#define BNX2_PM_OPS (&bnx2_pm_ops)
8671 8671
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index a78edaccceee..b260913db236 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -13233,6 +13233,8 @@ static void __bnx2x_remove(struct pci_dev *pdev,
13233 iounmap(bp->doorbells); 13233 iounmap(bp->doorbells);
13234 13234
13235 bnx2x_release_firmware(bp); 13235 bnx2x_release_firmware(bp);
13236 } else {
13237 bnx2x_vf_pci_dealloc(bp);
13236 } 13238 }
13237 bnx2x_free_mem_bp(bp); 13239 bnx2x_free_mem_bp(bp);
13238 13240
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
index 5c523b32db70..81cc2d9831c2 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
@@ -427,7 +427,9 @@ static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
427 if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN && 427 if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN &&
428 (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >= 428 (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >=
429 vf_vlan_rules_cnt(vf))) { 429 vf_vlan_rules_cnt(vf))) {
430 BNX2X_ERR("No credits for vlan\n"); 430 BNX2X_ERR("No credits for vlan [%d >= %d]\n",
431 atomic_read(&bnx2x_vfq(vf, qid, vlan_count)),
432 vf_vlan_rules_cnt(vf));
431 return -ENOMEM; 433 return -ENOMEM;
432 } 434 }
433 435
@@ -610,6 +612,7 @@ int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
610 } 612 }
611 613
612 /* add new mcasts */ 614 /* add new mcasts */
615 mcast.mcast_list_len = mc_num;
613 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD); 616 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD);
614 if (rc) 617 if (rc)
615 BNX2X_ERR("Faled to add multicasts\n"); 618 BNX2X_ERR("Faled to add multicasts\n");
@@ -837,6 +840,29 @@ int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
837 return 0; 840 return 0;
838} 841}
839 842
843static void bnx2x_iov_re_set_vlan_filters(struct bnx2x *bp,
844 struct bnx2x_virtf *vf,
845 int new)
846{
847 int num = vf_vlan_rules_cnt(vf);
848 int diff = new - num;
849 bool rc = true;
850
851 DP(BNX2X_MSG_IOV, "vf[%d] - %d vlan filter credits [previously %d]\n",
852 vf->abs_vfid, new, num);
853
854 if (diff > 0)
855 rc = bp->vlans_pool.get(&bp->vlans_pool, diff);
856 else if (diff < 0)
857 rc = bp->vlans_pool.put(&bp->vlans_pool, -diff);
858
859 if (rc)
860 vf_vlan_rules_cnt(vf) = new;
861 else
862 DP(BNX2X_MSG_IOV, "vf[%d] - Failed to configure vlan filter credits change\n",
863 vf->abs_vfid);
864}
865
840/* must be called after the number of PF queues and the number of VFs are 866/* must be called after the number of PF queues and the number of VFs are
841 * both known 867 * both known
842 */ 868 */
@@ -854,9 +880,11 @@ bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
854 resc->num_mac_filters = 1; 880 resc->num_mac_filters = 1;
855 881
856 /* divvy up vlan rules */ 882 /* divvy up vlan rules */
883 bnx2x_iov_re_set_vlan_filters(bp, vf, 0);
857 vlan_count = bp->vlans_pool.check(&bp->vlans_pool); 884 vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
858 vlan_count = 1 << ilog2(vlan_count); 885 vlan_count = 1 << ilog2(vlan_count);
859 resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp); 886 bnx2x_iov_re_set_vlan_filters(bp, vf,
887 vlan_count / BNX2X_NR_VIRTFN(bp));
860 888
861 /* no real limitation */ 889 /* no real limitation */
862 resc->num_mc_filters = 0; 890 resc->num_mc_filters = 0;
@@ -1478,10 +1506,6 @@ int bnx2x_iov_nic_init(struct bnx2x *bp)
1478 bnx2x_iov_static_resc(bp, vf); 1506 bnx2x_iov_static_resc(bp, vf);
1479 1507
1480 /* queues are initialized during VF-ACQUIRE */ 1508 /* queues are initialized during VF-ACQUIRE */
1481
1482 /* reserve the vf vlan credit */
1483 bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
1484
1485 vf->filter_state = 0; 1509 vf->filter_state = 0;
1486 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id); 1510 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1487 1511
@@ -1912,11 +1936,12 @@ int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
1912 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); 1936 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1913 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf); 1937 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1914 1938
1939 /* Save a vlan filter for the Hypervisor */
1915 return ((req_resc->num_rxqs <= rxq_cnt) && 1940 return ((req_resc->num_rxqs <= rxq_cnt) &&
1916 (req_resc->num_txqs <= txq_cnt) && 1941 (req_resc->num_txqs <= txq_cnt) &&
1917 (req_resc->num_sbs <= vf_sb_count(vf)) && 1942 (req_resc->num_sbs <= vf_sb_count(vf)) &&
1918 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) && 1943 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
1919 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf))); 1944 (req_resc->num_vlan_filters <= vf_vlan_rules_visible_cnt(vf)));
1920} 1945}
1921 1946
1922/* CORE VF API */ 1947/* CORE VF API */
@@ -1972,14 +1997,14 @@ int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
1972 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf); 1997 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
1973 if (resc->num_mac_filters) 1998 if (resc->num_mac_filters)
1974 vf_mac_rules_cnt(vf) = resc->num_mac_filters; 1999 vf_mac_rules_cnt(vf) = resc->num_mac_filters;
1975 if (resc->num_vlan_filters) 2000 /* Add an additional vlan filter credit for the hypervisor */
1976 vf_vlan_rules_cnt(vf) = resc->num_vlan_filters; 2001 bnx2x_iov_re_set_vlan_filters(bp, vf, resc->num_vlan_filters + 1);
1977 2002
1978 DP(BNX2X_MSG_IOV, 2003 DP(BNX2X_MSG_IOV,
1979 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n", 2004 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
1980 vf_sb_count(vf), vf_rxq_count(vf), 2005 vf_sb_count(vf), vf_rxq_count(vf),
1981 vf_txq_count(vf), vf_mac_rules_cnt(vf), 2006 vf_txq_count(vf), vf_mac_rules_cnt(vf),
1982 vf_vlan_rules_cnt(vf)); 2007 vf_vlan_rules_visible_cnt(vf));
1983 2008
1984 /* Initialize the queues */ 2009 /* Initialize the queues */
1985 if (!vf->vfqs) { 2010 if (!vf->vfqs) {
@@ -2896,6 +2921,14 @@ void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
2896 return bp->regview + PXP_VF_ADDR_DB_START; 2921 return bp->regview + PXP_VF_ADDR_DB_START;
2897} 2922}
2898 2923
2924void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
2925{
2926 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
2927 sizeof(struct bnx2x_vf_mbx_msg));
2928 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
2929 sizeof(union pf_vf_bulletin));
2930}
2931
2899int bnx2x_vf_pci_alloc(struct bnx2x *bp) 2932int bnx2x_vf_pci_alloc(struct bnx2x *bp)
2900{ 2933{
2901 mutex_init(&bp->vf2pf_mutex); 2934 mutex_init(&bp->vf2pf_mutex);
@@ -2915,10 +2948,7 @@ int bnx2x_vf_pci_alloc(struct bnx2x *bp)
2915 return 0; 2948 return 0;
2916 2949
2917alloc_mem_err: 2950alloc_mem_err:
2918 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping, 2951 bnx2x_vf_pci_dealloc(bp);
2919 sizeof(struct bnx2x_vf_mbx_msg));
2920 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
2921 sizeof(union pf_vf_bulletin));
2922 return -ENOMEM; 2952 return -ENOMEM;
2923} 2953}
2924 2954
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h
index 8bf764570eef..6929adba52f9 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h
@@ -159,6 +159,8 @@ struct bnx2x_virtf {
159#define vf_mac_rules_cnt(vf) ((vf)->alloc_resc.num_mac_filters) 159#define vf_mac_rules_cnt(vf) ((vf)->alloc_resc.num_mac_filters)
160#define vf_vlan_rules_cnt(vf) ((vf)->alloc_resc.num_vlan_filters) 160#define vf_vlan_rules_cnt(vf) ((vf)->alloc_resc.num_vlan_filters)
161#define vf_mc_rules_cnt(vf) ((vf)->alloc_resc.num_mc_filters) 161#define vf_mc_rules_cnt(vf) ((vf)->alloc_resc.num_mc_filters)
162 /* Hide a single vlan filter credit for the hypervisor */
163#define vf_vlan_rules_visible_cnt(vf) (vf_vlan_rules_cnt(vf) - 1)
162 164
163 u8 sb_count; /* actual number of SBs */ 165 u8 sb_count; /* actual number of SBs */
164 u8 igu_base_id; /* base igu status block id */ 166 u8 igu_base_id; /* base igu status block id */
@@ -502,6 +504,7 @@ static inline int bnx2x_vf_ustorm_prods_offset(struct bnx2x *bp,
502enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp); 504enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp);
503void bnx2x_timer_sriov(struct bnx2x *bp); 505void bnx2x_timer_sriov(struct bnx2x *bp);
504void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp); 506void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp);
507void bnx2x_vf_pci_dealloc(struct bnx2x *bp);
505int bnx2x_vf_pci_alloc(struct bnx2x *bp); 508int bnx2x_vf_pci_alloc(struct bnx2x *bp);
506int bnx2x_enable_sriov(struct bnx2x *bp); 509int bnx2x_enable_sriov(struct bnx2x *bp);
507void bnx2x_disable_sriov(struct bnx2x *bp); 510void bnx2x_disable_sriov(struct bnx2x *bp);
@@ -568,6 +571,7 @@ static inline void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
568 return NULL; 571 return NULL;
569} 572}
570 573
574static inline void bnx2x_vf_pci_dealloc(struct bnx2 *bp) {return 0; }
571static inline int bnx2x_vf_pci_alloc(struct bnx2x *bp) {return 0; } 575static inline int bnx2x_vf_pci_alloc(struct bnx2x *bp) {return 0; }
572static inline void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp) {} 576static inline void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp) {}
573static inline int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs) {return 0; } 577static inline int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs) {return 0; }
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c
index 0622884596b2..0c067e8564dd 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c
@@ -1163,7 +1163,7 @@ static void bnx2x_vf_mbx_acquire_resp(struct bnx2x *bp, struct bnx2x_virtf *vf,
1163 bnx2x_vf_max_queue_cnt(bp, vf); 1163 bnx2x_vf_max_queue_cnt(bp, vf);
1164 resc->num_sbs = vf_sb_count(vf); 1164 resc->num_sbs = vf_sb_count(vf);
1165 resc->num_mac_filters = vf_mac_rules_cnt(vf); 1165 resc->num_mac_filters = vf_mac_rules_cnt(vf);
1166 resc->num_vlan_filters = vf_vlan_rules_cnt(vf); 1166 resc->num_vlan_filters = vf_vlan_rules_visible_cnt(vf);
1167 resc->num_mc_filters = 0; 1167 resc->num_mc_filters = 0;
1168 1168
1169 if (status == PFVF_STATUS_SUCCESS) { 1169 if (status == PFVF_STATUS_SUCCESS) {
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index b9f7022f4e81..e5d95c5ce1ad 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -12286,7 +12286,9 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
12286 if (tg3_flag(tp, MAX_RXPEND_64) && 12286 if (tg3_flag(tp, MAX_RXPEND_64) &&
12287 tp->rx_pending > 63) 12287 tp->rx_pending > 63)
12288 tp->rx_pending = 63; 12288 tp->rx_pending = 63;
12289 tp->rx_jumbo_pending = ering->rx_jumbo_pending; 12289
12290 if (tg3_flag(tp, JUMBO_RING_ENABLE))
12291 tp->rx_jumbo_pending = ering->rx_jumbo_pending;
12290 12292
12291 for (i = 0; i < tp->irq_max; i++) 12293 for (i = 0; i < tp->irq_max; i++)
12292 tp->napi[i].tx_pending = ering->tx_pending; 12294 tp->napi[i].tx_pending = ering->tx_pending;
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig
index 751d5c7b312d..9e089d24466e 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -4,7 +4,7 @@
4 4
5config NET_CADENCE 5config NET_CADENCE
6 bool "Cadence devices" 6 bool "Cadence devices"
7 depends on HAS_IOMEM 7 depends on HAS_IOMEM && (ARM || AVR32 || MICROBLAZE || COMPILE_TEST)
8 default y 8 default y
9 ---help--- 9 ---help---
10 If you have a network (Ethernet) card belonging to this class, say Y. 10 If you have a network (Ethernet) card belonging to this class, say Y.
@@ -22,7 +22,7 @@ if NET_CADENCE
22 22
23config ARM_AT91_ETHER 23config ARM_AT91_ETHER
24 tristate "AT91RM9200 Ethernet support" 24 tristate "AT91RM9200 Ethernet support"
25 depends on HAS_DMA 25 depends on HAS_DMA && (ARCH_AT91RM9200 || COMPILE_TEST)
26 select MACB 26 select MACB
27 ---help--- 27 ---help---
28 If you wish to compile a kernel for the AT91RM9200 and enable 28 If you wish to compile a kernel for the AT91RM9200 and enable
@@ -30,7 +30,7 @@ config ARM_AT91_ETHER
30 30
31config MACB 31config MACB
32 tristate "Cadence MACB/GEM support" 32 tristate "Cadence MACB/GEM support"
33 depends on HAS_DMA 33 depends on HAS_DMA && (PLATFORM_AT32AP || ARCH_AT91 || ARCH_PICOXCELL || ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST)
34 select PHYLIB 34 select PHYLIB
35 ---help--- 35 ---help---
36 The Cadence MACB ethernet interface is found on many Atmel AT32 and 36 The Cadence MACB ethernet interface is found on many Atmel AT32 and
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index ca97005e24b4..e9daa072ebb4 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -599,25 +599,16 @@ static void gem_rx_refill(struct macb *bp)
599{ 599{
600 unsigned int entry; 600 unsigned int entry;
601 struct sk_buff *skb; 601 struct sk_buff *skb;
602 struct macb_dma_desc *desc;
603 dma_addr_t paddr; 602 dma_addr_t paddr;
604 603
605 while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) { 604 while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) {
606 u32 addr, ctrl;
607
608 entry = macb_rx_ring_wrap(bp->rx_prepared_head); 605 entry = macb_rx_ring_wrap(bp->rx_prepared_head);
609 desc = &bp->rx_ring[entry];
610 606
611 /* Make hw descriptor updates visible to CPU */ 607 /* Make hw descriptor updates visible to CPU */
612 rmb(); 608 rmb();
613 609
614 addr = desc->addr;
615 ctrl = desc->ctrl;
616 bp->rx_prepared_head++; 610 bp->rx_prepared_head++;
617 611
618 if ((addr & MACB_BIT(RX_USED)))
619 continue;
620
621 if (bp->rx_skbuff[entry] == NULL) { 612 if (bp->rx_skbuff[entry] == NULL) {
622 /* allocate sk_buff for this free entry in ring */ 613 /* allocate sk_buff for this free entry in ring */
623 skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); 614 skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size);
@@ -698,7 +689,6 @@ static int gem_rx(struct macb *bp, int budget)
698 if (!(addr & MACB_BIT(RX_USED))) 689 if (!(addr & MACB_BIT(RX_USED)))
699 break; 690 break;
700 691
701 desc->addr &= ~MACB_BIT(RX_USED);
702 bp->rx_tail++; 692 bp->rx_tail++;
703 count++; 693 count++;
704 694
@@ -891,16 +881,15 @@ static int macb_poll(struct napi_struct *napi, int budget)
891 if (work_done < budget) { 881 if (work_done < budget) {
892 napi_complete(napi); 882 napi_complete(napi);
893 883
894 /*
895 * We've done what we can to clean the buffers. Make sure we
896 * get notified when new packets arrive.
897 */
898 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
899
900 /* Packets received while interrupts were disabled */ 884 /* Packets received while interrupts were disabled */
901 status = macb_readl(bp, RSR); 885 status = macb_readl(bp, RSR);
902 if (unlikely(status)) 886 if (status) {
887 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
888 macb_writel(bp, ISR, MACB_BIT(RCOMP));
903 napi_reschedule(napi); 889 napi_reschedule(napi);
890 } else {
891 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
892 }
904 } 893 }
905 894
906 /* TODO: Handle errors */ 895 /* TODO: Handle errors */
@@ -951,6 +940,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
951 if (unlikely(status & (MACB_TX_ERR_FLAGS))) { 940 if (unlikely(status & (MACB_TX_ERR_FLAGS))) {
952 macb_writel(bp, IDR, MACB_TX_INT_FLAGS); 941 macb_writel(bp, IDR, MACB_TX_INT_FLAGS);
953 schedule_work(&bp->tx_error_task); 942 schedule_work(&bp->tx_error_task);
943
944 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
945 macb_writel(bp, ISR, MACB_TX_ERR_FLAGS);
946
954 break; 947 break;
955 } 948 }
956 949
@@ -968,6 +961,9 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
968 bp->hw_stats.gem.rx_overruns++; 961 bp->hw_stats.gem.rx_overruns++;
969 else 962 else
970 bp->hw_stats.macb.rx_overruns++; 963 bp->hw_stats.macb.rx_overruns++;
964
965 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
966 macb_writel(bp, ISR, MACB_BIT(ISR_ROVR));
971 } 967 }
972 968
973 if (status & MACB_BIT(HRESP)) { 969 if (status & MACB_BIT(HRESP)) {
@@ -977,6 +973,9 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
977 * (work queue?) 973 * (work queue?)
978 */ 974 */
979 netdev_err(dev, "DMA bus error: HRESP not OK\n"); 975 netdev_err(dev, "DMA bus error: HRESP not OK\n");
976
977 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
978 macb_writel(bp, ISR, MACB_BIT(HRESP));
980 } 979 }
981 980
982 status = macb_readl(bp, ISR); 981 status = macb_readl(bp, ISR);
@@ -1113,7 +1112,7 @@ static void gem_free_rx_buffers(struct macb *bp)
1113 1112
1114 desc = &bp->rx_ring[i]; 1113 desc = &bp->rx_ring[i];
1115 addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); 1114 addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr));
1116 dma_unmap_single(&bp->pdev->dev, addr, skb->len, 1115 dma_unmap_single(&bp->pdev->dev, addr, bp->rx_buffer_size,
1117 DMA_FROM_DEVICE); 1116 DMA_FROM_DEVICE);
1118 dev_kfree_skb_any(skb); 1117 dev_kfree_skb_any(skb);
1119 skb = NULL; 1118 skb = NULL;
diff --git a/drivers/net/ethernet/chelsio/Kconfig b/drivers/net/ethernet/chelsio/Kconfig
index d40c994a4f6a..570222c33410 100644
--- a/drivers/net/ethernet/chelsio/Kconfig
+++ b/drivers/net/ethernet/chelsio/Kconfig
@@ -67,13 +67,13 @@ config CHELSIO_T3
67 will be called cxgb3. 67 will be called cxgb3.
68 68
69config CHELSIO_T4 69config CHELSIO_T4
70 tristate "Chelsio Communications T4 Ethernet support" 70 tristate "Chelsio Communications T4/T5 Ethernet support"
71 depends on PCI 71 depends on PCI
72 select FW_LOADER 72 select FW_LOADER
73 select MDIO 73 select MDIO
74 ---help--- 74 ---help---
75 This driver supports Chelsio T4-based gigabit and 10Gb Ethernet 75 This driver supports Chelsio T4 and T5 based gigabit, 10Gb Ethernet
76 adapters. 76 adapter and T5 based 40Gb Ethernet adapter.
77 77
78 For general information about Chelsio and our products, visit 78 For general information about Chelsio and our products, visit
79 our website at <http://www.chelsio.com>. 79 our website at <http://www.chelsio.com>.
@@ -87,11 +87,12 @@ config CHELSIO_T4
87 will be called cxgb4. 87 will be called cxgb4.
88 88
89config CHELSIO_T4VF 89config CHELSIO_T4VF
90 tristate "Chelsio Communications T4 Virtual Function Ethernet support" 90 tristate "Chelsio Communications T4/T5 Virtual Function Ethernet support"
91 depends on PCI 91 depends on PCI
92 ---help--- 92 ---help---
93 This driver supports Chelsio T4-based gigabit and 10Gb Ethernet 93 This driver supports Chelsio T4 and T5 based gigabit, 10Gb Ethernet
94 adapters with PCI-E SR-IOV Virtual Functions. 94 adapters and T5 based 40Gb Ethernet adapters with PCI-E SR-IOV Virtual
95 Functions.
95 96
96 For general information about Chelsio and our products, visit 97 For general information about Chelsio and our products, visit
97 our website at <http://www.chelsio.com>. 98 our website at <http://www.chelsio.com>.
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 6fe58913403a..24e16e3301e0 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -5870,6 +5870,8 @@ static void print_port_info(const struct net_device *dev)
5870 spd = " 2.5 GT/s"; 5870 spd = " 2.5 GT/s";
5871 else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB) 5871 else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB)
5872 spd = " 5 GT/s"; 5872 spd = " 5 GT/s";
5873 else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB)
5874 spd = " 8 GT/s";
5873 5875
5874 if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M) 5876 if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M)
5875 bufp += sprintf(bufp, "100/"); 5877 bufp += sprintf(bufp, "100/");
diff --git a/drivers/net/ethernet/chelsio/cxgb4/l2t.c b/drivers/net/ethernet/chelsio/cxgb4/l2t.c
index 81e8402a74b4..8a96572fdde0 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/l2t.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/l2t.c
@@ -154,7 +154,7 @@ static int write_l2e(struct adapter *adap, struct l2t_entry *e, int sync)
154 req->params = htons(L2T_W_PORT(e->lport) | L2T_W_NOREPLY(!sync)); 154 req->params = htons(L2T_W_PORT(e->lport) | L2T_W_NOREPLY(!sync));
155 req->l2t_idx = htons(e->idx); 155 req->l2t_idx = htons(e->idx);
156 req->vlan = htons(e->vlan); 156 req->vlan = htons(e->vlan);
157 if (e->neigh) 157 if (e->neigh && !(e->neigh->dev->flags & IFF_LOOPBACK))
158 memcpy(e->dmac, e->neigh->ha, sizeof(e->dmac)); 158 memcpy(e->dmac, e->neigh->ha, sizeof(e->dmac));
159 memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac)); 159 memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
160 160
@@ -394,6 +394,8 @@ struct l2t_entry *cxgb4_l2t_get(struct l2t_data *d, struct neighbour *neigh,
394 if (e) { 394 if (e) {
395 spin_lock(&e->lock); /* avoid race with t4_l2t_free */ 395 spin_lock(&e->lock); /* avoid race with t4_l2t_free */
396 e->state = L2T_STATE_RESOLVING; 396 e->state = L2T_STATE_RESOLVING;
397 if (neigh->dev->flags & IFF_LOOPBACK)
398 memcpy(e->dmac, physdev->dev_addr, sizeof(e->dmac));
397 memcpy(e->addr, addr, addr_len); 399 memcpy(e->addr, addr, addr_len);
398 e->ifindex = ifidx; 400 e->ifindex = ifidx;
399 e->hash = hash; 401 e->hash = hash;
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index fb2fe65903c2..bba67681aeaa 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -682,7 +682,7 @@ enum {
682 SF_RD_ID = 0x9f, /* read ID */ 682 SF_RD_ID = 0x9f, /* read ID */
683 SF_ERASE_SECTOR = 0xd8, /* erase sector */ 683 SF_ERASE_SECTOR = 0xd8, /* erase sector */
684 684
685 FW_MAX_SIZE = 512 * 1024, 685 FW_MAX_SIZE = 16 * SF_SEC_SIZE,
686}; 686};
687 687
688/** 688/**
diff --git a/drivers/net/ethernet/emulex/benet/be.h b/drivers/net/ethernet/emulex/benet/be.h
index 8ccaa2520dc3..97db5a7179df 100644
--- a/drivers/net/ethernet/emulex/benet/be.h
+++ b/drivers/net/ethernet/emulex/benet/be.h
@@ -374,6 +374,7 @@ enum vf_state {
374#define BE_FLAGS_NAPI_ENABLED (1 << 9) 374#define BE_FLAGS_NAPI_ENABLED (1 << 9)
375#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 375#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
376#define BE_FLAGS_VXLAN_OFFLOADS (1 << 12) 376#define BE_FLAGS_VXLAN_OFFLOADS (1 << 12)
377#define BE_FLAGS_SETUP_DONE (1 << 13)
377 378
378#define BE_UC_PMAC_COUNT 30 379#define BE_UC_PMAC_COUNT 30
379#define BE_VF_UC_PMAC_COUNT 2 380#define BE_VF_UC_PMAC_COUNT 2
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index 3e6df47b6973..a18645407d21 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -2033,11 +2033,13 @@ static void be_tx_compl_clean(struct be_adapter *adapter)
2033 bool dummy_wrb; 2033 bool dummy_wrb;
2034 int i, pending_txqs; 2034 int i, pending_txqs;
2035 2035
2036 /* Wait for a max of 200ms for all the tx-completions to arrive. */ 2036 /* Stop polling for compls when HW has been silent for 10ms */
2037 do { 2037 do {
2038 pending_txqs = adapter->num_tx_qs; 2038 pending_txqs = adapter->num_tx_qs;
2039 2039
2040 for_all_tx_queues(adapter, txo, i) { 2040 for_all_tx_queues(adapter, txo, i) {
2041 cmpl = 0;
2042 num_wrbs = 0;
2041 txq = &txo->q; 2043 txq = &txo->q;
2042 while ((txcp = be_tx_compl_get(&txo->cq))) { 2044 while ((txcp = be_tx_compl_get(&txo->cq))) {
2043 end_idx = 2045 end_idx =
@@ -2050,14 +2052,13 @@ static void be_tx_compl_clean(struct be_adapter *adapter)
2050 if (cmpl) { 2052 if (cmpl) {
2051 be_cq_notify(adapter, txo->cq.id, false, cmpl); 2053 be_cq_notify(adapter, txo->cq.id, false, cmpl);
2052 atomic_sub(num_wrbs, &txq->used); 2054 atomic_sub(num_wrbs, &txq->used);
2053 cmpl = 0; 2055 timeo = 0;
2054 num_wrbs = 0;
2055 } 2056 }
2056 if (atomic_read(&txq->used) == 0) 2057 if (atomic_read(&txq->used) == 0)
2057 pending_txqs--; 2058 pending_txqs--;
2058 } 2059 }
2059 2060
2060 if (pending_txqs == 0 || ++timeo > 200) 2061 if (pending_txqs == 0 || ++timeo > 10 || be_hw_error(adapter))
2061 break; 2062 break;
2062 2063
2063 mdelay(1); 2064 mdelay(1);
@@ -2725,6 +2726,12 @@ static int be_close(struct net_device *netdev)
2725 struct be_eq_obj *eqo; 2726 struct be_eq_obj *eqo;
2726 int i; 2727 int i;
2727 2728
2729 /* This protection is needed as be_close() may be called even when the
2730 * adapter is in cleared state (after eeh perm failure)
2731 */
2732 if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
2733 return 0;
2734
2728 be_roce_dev_close(adapter); 2735 be_roce_dev_close(adapter);
2729 2736
2730 if (adapter->flags & BE_FLAGS_NAPI_ENABLED) { 2737 if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
@@ -3055,6 +3062,7 @@ static int be_clear(struct be_adapter *adapter)
3055 be_clear_queues(adapter); 3062 be_clear_queues(adapter);
3056 3063
3057 be_msix_disable(adapter); 3064 be_msix_disable(adapter);
3065 adapter->flags &= ~BE_FLAGS_SETUP_DONE;
3058 return 0; 3066 return 0;
3059} 3067}
3060 3068
@@ -3559,6 +3567,7 @@ static int be_setup(struct be_adapter *adapter)
3559 adapter->phy.fc_autoneg = 1; 3567 adapter->phy.fc_autoneg = 1;
3560 3568
3561 be_schedule_worker(adapter); 3569 be_schedule_worker(adapter);
3570 adapter->flags |= BE_FLAGS_SETUP_DONE;
3562 return 0; 3571 return 0;
3563err: 3572err:
3564 be_clear(adapter); 3573 be_clear(adapter);
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 9125d9abf099..e2d42475b006 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -121,6 +121,7 @@ static irqreturn_t gfar_error(int irq, void *dev_id);
121static irqreturn_t gfar_transmit(int irq, void *dev_id); 121static irqreturn_t gfar_transmit(int irq, void *dev_id);
122static irqreturn_t gfar_interrupt(int irq, void *dev_id); 122static irqreturn_t gfar_interrupt(int irq, void *dev_id);
123static void adjust_link(struct net_device *dev); 123static void adjust_link(struct net_device *dev);
124static noinline void gfar_update_link_state(struct gfar_private *priv);
124static int init_phy(struct net_device *dev); 125static int init_phy(struct net_device *dev);
125static int gfar_probe(struct platform_device *ofdev); 126static int gfar_probe(struct platform_device *ofdev);
126static int gfar_remove(struct platform_device *ofdev); 127static int gfar_remove(struct platform_device *ofdev);
@@ -3076,41 +3077,6 @@ static irqreturn_t gfar_interrupt(int irq, void *grp_id)
3076 return IRQ_HANDLED; 3077 return IRQ_HANDLED;
3077} 3078}
3078 3079
3079static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv)
3080{
3081 struct phy_device *phydev = priv->phydev;
3082 u32 val = 0;
3083
3084 if (!phydev->duplex)
3085 return val;
3086
3087 if (!priv->pause_aneg_en) {
3088 if (priv->tx_pause_en)
3089 val |= MACCFG1_TX_FLOW;
3090 if (priv->rx_pause_en)
3091 val |= MACCFG1_RX_FLOW;
3092 } else {
3093 u16 lcl_adv, rmt_adv;
3094 u8 flowctrl;
3095 /* get link partner capabilities */
3096 rmt_adv = 0;
3097 if (phydev->pause)
3098 rmt_adv = LPA_PAUSE_CAP;
3099 if (phydev->asym_pause)
3100 rmt_adv |= LPA_PAUSE_ASYM;
3101
3102 lcl_adv = mii_advertise_flowctrl(phydev->advertising);
3103
3104 flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
3105 if (flowctrl & FLOW_CTRL_TX)
3106 val |= MACCFG1_TX_FLOW;
3107 if (flowctrl & FLOW_CTRL_RX)
3108 val |= MACCFG1_RX_FLOW;
3109 }
3110
3111 return val;
3112}
3113
3114/* Called every time the controller might need to be made 3080/* Called every time the controller might need to be made
3115 * aware of new link state. The PHY code conveys this 3081 * aware of new link state. The PHY code conveys this
3116 * information through variables in the phydev structure, and this 3082 * information through variables in the phydev structure, and this
@@ -3120,83 +3086,12 @@ static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv)
3120static void adjust_link(struct net_device *dev) 3086static void adjust_link(struct net_device *dev)
3121{ 3087{
3122 struct gfar_private *priv = netdev_priv(dev); 3088 struct gfar_private *priv = netdev_priv(dev);
3123 struct gfar __iomem *regs = priv->gfargrp[0].regs;
3124 struct phy_device *phydev = priv->phydev; 3089 struct phy_device *phydev = priv->phydev;
3125 int new_state = 0;
3126 3090
3127 if (test_bit(GFAR_RESETTING, &priv->state)) 3091 if (unlikely(phydev->link != priv->oldlink ||
3128 return; 3092 phydev->duplex != priv->oldduplex ||
3129 3093 phydev->speed != priv->oldspeed))
3130 if (phydev->link) { 3094 gfar_update_link_state(priv);
3131 u32 tempval1 = gfar_read(&regs->maccfg1);
3132 u32 tempval = gfar_read(&regs->maccfg2);
3133 u32 ecntrl = gfar_read(&regs->ecntrl);
3134
3135 /* Now we make sure that we can be in full duplex mode.
3136 * If not, we operate in half-duplex mode.
3137 */
3138 if (phydev->duplex != priv->oldduplex) {
3139 new_state = 1;
3140 if (!(phydev->duplex))
3141 tempval &= ~(MACCFG2_FULL_DUPLEX);
3142 else
3143 tempval |= MACCFG2_FULL_DUPLEX;
3144
3145 priv->oldduplex = phydev->duplex;
3146 }
3147
3148 if (phydev->speed != priv->oldspeed) {
3149 new_state = 1;
3150 switch (phydev->speed) {
3151 case 1000:
3152 tempval =
3153 ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
3154
3155 ecntrl &= ~(ECNTRL_R100);
3156 break;
3157 case 100:
3158 case 10:
3159 tempval =
3160 ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
3161
3162 /* Reduced mode distinguishes
3163 * between 10 and 100
3164 */
3165 if (phydev->speed == SPEED_100)
3166 ecntrl |= ECNTRL_R100;
3167 else
3168 ecntrl &= ~(ECNTRL_R100);
3169 break;
3170 default:
3171 netif_warn(priv, link, dev,
3172 "Ack! Speed (%d) is not 10/100/1000!\n",
3173 phydev->speed);
3174 break;
3175 }
3176
3177 priv->oldspeed = phydev->speed;
3178 }
3179
3180 tempval1 &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
3181 tempval1 |= gfar_get_flowctrl_cfg(priv);
3182
3183 gfar_write(&regs->maccfg1, tempval1);
3184 gfar_write(&regs->maccfg2, tempval);
3185 gfar_write(&regs->ecntrl, ecntrl);
3186
3187 if (!priv->oldlink) {
3188 new_state = 1;
3189 priv->oldlink = 1;
3190 }
3191 } else if (priv->oldlink) {
3192 new_state = 1;
3193 priv->oldlink = 0;
3194 priv->oldspeed = 0;
3195 priv->oldduplex = -1;
3196 }
3197
3198 if (new_state && netif_msg_link(priv))
3199 phy_print_status(phydev);
3200} 3095}
3201 3096
3202/* Update the hash table based on the current list of multicast 3097/* Update the hash table based on the current list of multicast
@@ -3442,6 +3337,114 @@ static irqreturn_t gfar_error(int irq, void *grp_id)
3442 return IRQ_HANDLED; 3337 return IRQ_HANDLED;
3443} 3338}
3444 3339
3340static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv)
3341{
3342 struct phy_device *phydev = priv->phydev;
3343 u32 val = 0;
3344
3345 if (!phydev->duplex)
3346 return val;
3347
3348 if (!priv->pause_aneg_en) {
3349 if (priv->tx_pause_en)
3350 val |= MACCFG1_TX_FLOW;
3351 if (priv->rx_pause_en)
3352 val |= MACCFG1_RX_FLOW;
3353 } else {
3354 u16 lcl_adv, rmt_adv;
3355 u8 flowctrl;
3356 /* get link partner capabilities */
3357 rmt_adv = 0;
3358 if (phydev->pause)
3359 rmt_adv = LPA_PAUSE_CAP;
3360 if (phydev->asym_pause)
3361 rmt_adv |= LPA_PAUSE_ASYM;
3362
3363 lcl_adv = mii_advertise_flowctrl(phydev->advertising);
3364
3365 flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
3366 if (flowctrl & FLOW_CTRL_TX)
3367 val |= MACCFG1_TX_FLOW;
3368 if (flowctrl & FLOW_CTRL_RX)
3369 val |= MACCFG1_RX_FLOW;
3370 }
3371
3372 return val;
3373}
3374
3375static noinline void gfar_update_link_state(struct gfar_private *priv)
3376{
3377 struct gfar __iomem *regs = priv->gfargrp[0].regs;
3378 struct phy_device *phydev = priv->phydev;
3379
3380 if (unlikely(test_bit(GFAR_RESETTING, &priv->state)))
3381 return;
3382
3383 if (phydev->link) {
3384 u32 tempval1 = gfar_read(&regs->maccfg1);
3385 u32 tempval = gfar_read(&regs->maccfg2);
3386 u32 ecntrl = gfar_read(&regs->ecntrl);
3387
3388 if (phydev->duplex != priv->oldduplex) {
3389 if (!(phydev->duplex))
3390 tempval &= ~(MACCFG2_FULL_DUPLEX);
3391 else
3392 tempval |= MACCFG2_FULL_DUPLEX;
3393
3394 priv->oldduplex = phydev->duplex;
3395 }
3396
3397 if (phydev->speed != priv->oldspeed) {
3398 switch (phydev->speed) {
3399 case 1000:
3400 tempval =
3401 ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
3402
3403 ecntrl &= ~(ECNTRL_R100);
3404 break;
3405 case 100:
3406 case 10:
3407 tempval =
3408 ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
3409
3410 /* Reduced mode distinguishes
3411 * between 10 and 100
3412 */
3413 if (phydev->speed == SPEED_100)
3414 ecntrl |= ECNTRL_R100;
3415 else
3416 ecntrl &= ~(ECNTRL_R100);
3417 break;
3418 default:
3419 netif_warn(priv, link, priv->ndev,
3420 "Ack! Speed (%d) is not 10/100/1000!\n",
3421 phydev->speed);
3422 break;
3423 }
3424
3425 priv->oldspeed = phydev->speed;
3426 }
3427
3428 tempval1 &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
3429 tempval1 |= gfar_get_flowctrl_cfg(priv);
3430
3431 gfar_write(&regs->maccfg1, tempval1);
3432 gfar_write(&regs->maccfg2, tempval);
3433 gfar_write(&regs->ecntrl, ecntrl);
3434
3435 if (!priv->oldlink)
3436 priv->oldlink = 1;
3437
3438 } else if (priv->oldlink) {
3439 priv->oldlink = 0;
3440 priv->oldspeed = 0;
3441 priv->oldduplex = -1;
3442 }
3443
3444 if (netif_msg_link(priv))
3445 phy_print_status(phydev);
3446}
3447
3445static struct of_device_id gfar_match[] = 3448static struct of_device_id gfar_match[] =
3446{ 3449{
3447 { 3450 {
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c
index 891dbee6e6c1..76d70708f864 100644
--- a/drivers/net/ethernet/freescale/gianfar_ethtool.c
+++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c
@@ -533,6 +533,9 @@ static int gfar_spauseparam(struct net_device *dev,
533 struct gfar __iomem *regs = priv->gfargrp[0].regs; 533 struct gfar __iomem *regs = priv->gfargrp[0].regs;
534 u32 oldadv, newadv; 534 u32 oldadv, newadv;
535 535
536 if (!phydev)
537 return -ENODEV;
538
536 if (!(phydev->supported & SUPPORTED_Pause) || 539 if (!(phydev->supported & SUPPORTED_Pause) ||
537 (!(phydev->supported & SUPPORTED_Asym_Pause) && 540 (!(phydev->supported & SUPPORTED_Asym_Pause) &&
538 (epause->rx_pause != epause->tx_pause))) 541 (epause->rx_pause != epause->tx_pause)))
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 9866f264f55e..f0bbd4246d71 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -186,7 +186,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
186{ 186{
187 u16 phy_reg = 0; 187 u16 phy_reg = 0;
188 u32 phy_id = 0; 188 u32 phy_id = 0;
189 s32 ret_val; 189 s32 ret_val = 0;
190 u16 retry_count; 190 u16 retry_count;
191 u32 mac_reg = 0; 191 u32 mac_reg = 0;
192 192
@@ -217,11 +217,13 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
217 /* In case the PHY needs to be in mdio slow mode, 217 /* In case the PHY needs to be in mdio slow mode,
218 * set slow mode and try to get the PHY id again. 218 * set slow mode and try to get the PHY id again.
219 */ 219 */
220 hw->phy.ops.release(hw); 220 if (hw->mac.type < e1000_pch_lpt) {
221 ret_val = e1000_set_mdio_slow_mode_hv(hw); 221 hw->phy.ops.release(hw);
222 if (!ret_val) 222 ret_val = e1000_set_mdio_slow_mode_hv(hw);
223 ret_val = e1000e_get_phy_id(hw); 223 if (!ret_val)
224 hw->phy.ops.acquire(hw); 224 ret_val = e1000e_get_phy_id(hw);
225 hw->phy.ops.acquire(hw);
226 }
225 227
226 if (ret_val) 228 if (ret_val)
227 return false; 229 return false;
@@ -842,6 +844,17 @@ s32 e1000_set_eee_pchlan(struct e1000_hw *hw)
842 } 844 }
843 } 845 }
844 846
847 if (hw->phy.type == e1000_phy_82579) {
848 ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
849 &data);
850 if (ret_val)
851 goto release;
852
853 data &= ~I82579_LPI_100_PLL_SHUT;
854 ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
855 data);
856 }
857
845 /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */ 858 /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */
846 ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); 859 ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);
847 if (ret_val) 860 if (ret_val)
@@ -1314,14 +1327,17 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
1314 return ret_val; 1327 return ret_val;
1315 } 1328 }
1316 1329
1317 /* When connected at 10Mbps half-duplex, 82579 parts are excessively 1330 /* When connected at 10Mbps half-duplex, some parts are excessively
1318 * aggressive resulting in many collisions. To avoid this, increase 1331 * aggressive resulting in many collisions. To avoid this, increase
1319 * the IPG and reduce Rx latency in the PHY. 1332 * the IPG and reduce Rx latency in the PHY.
1320 */ 1333 */
1321 if ((hw->mac.type == e1000_pch2lan) && link) { 1334 if (((hw->mac.type == e1000_pch2lan) ||
1335 (hw->mac.type == e1000_pch_lpt)) && link) {
1322 u32 reg; 1336 u32 reg;
1323 reg = er32(STATUS); 1337 reg = er32(STATUS);
1324 if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) { 1338 if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) {
1339 u16 emi_addr;
1340
1325 reg = er32(TIPG); 1341 reg = er32(TIPG);
1326 reg &= ~E1000_TIPG_IPGT_MASK; 1342 reg &= ~E1000_TIPG_IPGT_MASK;
1327 reg |= 0xFF; 1343 reg |= 0xFF;
@@ -1332,8 +1348,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
1332 if (ret_val) 1348 if (ret_val)
1333 return ret_val; 1349 return ret_val;
1334 1350
1335 ret_val = 1351 if (hw->mac.type == e1000_pch2lan)
1336 e1000_write_emi_reg_locked(hw, I82579_RX_CONFIG, 0); 1352 emi_addr = I82579_RX_CONFIG;
1353 else
1354 emi_addr = I217_RX_CONFIG;
1355
1356 ret_val = e1000_write_emi_reg_locked(hw, emi_addr, 0);
1337 1357
1338 hw->phy.ops.release(hw); 1358 hw->phy.ops.release(hw);
1339 1359
@@ -2493,51 +2513,44 @@ release:
2493 * e1000_k1_gig_workaround_lv - K1 Si workaround 2513 * e1000_k1_gig_workaround_lv - K1 Si workaround
2494 * @hw: pointer to the HW structure 2514 * @hw: pointer to the HW structure
2495 * 2515 *
2496 * Workaround to set the K1 beacon duration for 82579 parts 2516 * Workaround to set the K1 beacon duration for 82579 parts in 10Mbps
2517 * Disable K1 in 1000Mbps and 100Mbps
2497 **/ 2518 **/
2498static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) 2519static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
2499{ 2520{
2500 s32 ret_val = 0; 2521 s32 ret_val = 0;
2501 u16 status_reg = 0; 2522 u16 status_reg = 0;
2502 u32 mac_reg;
2503 u16 phy_reg;
2504 2523
2505 if (hw->mac.type != e1000_pch2lan) 2524 if (hw->mac.type != e1000_pch2lan)
2506 return 0; 2525 return 0;
2507 2526
2508 /* Set K1 beacon duration based on 1Gbps speed or otherwise */ 2527 /* Set K1 beacon duration based on 10Mbs speed */
2509 ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg); 2528 ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg);
2510 if (ret_val) 2529 if (ret_val)
2511 return ret_val; 2530 return ret_val;
2512 2531
2513 if ((status_reg & (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) 2532 if ((status_reg & (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE))
2514 == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) { 2533 == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) {
2515 mac_reg = er32(FEXTNVM4); 2534 if (status_reg &
2516 mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK; 2535 (HV_M_STATUS_SPEED_1000 | HV_M_STATUS_SPEED_100)) {
2517
2518 ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg);
2519 if (ret_val)
2520 return ret_val;
2521
2522 if (status_reg & HV_M_STATUS_SPEED_1000) {
2523 u16 pm_phy_reg; 2536 u16 pm_phy_reg;
2524 2537
2525 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC; 2538 /* LV 1G/100 Packet drop issue wa */
2526 phy_reg &= ~I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;
2527 /* LV 1G Packet drop issue wa */
2528 ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg); 2539 ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg);
2529 if (ret_val) 2540 if (ret_val)
2530 return ret_val; 2541 return ret_val;
2531 pm_phy_reg &= ~HV_PM_CTRL_PLL_STOP_IN_K1_GIGA; 2542 pm_phy_reg &= ~HV_PM_CTRL_K1_ENABLE;
2532 ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg); 2543 ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg);
2533 if (ret_val) 2544 if (ret_val)
2534 return ret_val; 2545 return ret_val;
2535 } else { 2546 } else {
2547 u32 mac_reg;
2548
2549 mac_reg = er32(FEXTNVM4);
2550 mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK;
2536 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC; 2551 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC;
2537 phy_reg |= I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT; 2552 ew32(FEXTNVM4, mac_reg);
2538 } 2553 }
2539 ew32(FEXTNVM4, mac_reg);
2540 ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);
2541 } 2554 }
2542 2555
2543 return ret_val; 2556 return ret_val;
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h
index bead50f9187b..5515126c81c1 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.h
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.h
@@ -232,16 +232,19 @@
232#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */ 232#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */
233#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */ 233#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */
234#define I82579_RX_CONFIG 0x3412 /* Receive configuration */ 234#define I82579_RX_CONFIG 0x3412 /* Receive configuration */
235#define I82579_LPI_PLL_SHUT 0x4412 /* LPI PLL Shut Enable */
235#define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */ 236#define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */
236#define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */ 237#define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */
237#define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */ 238#define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */
238#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */ 239#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
239#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE */ 240#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE */
240#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE */ 241#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE */
242#define I82579_LPI_100_PLL_SHUT (1 << 2) /* 100M LPI PLL Shut Enabled */
241#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */ 243#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
242#define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */ 244#define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */
243#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ 245#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
244#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */ 246#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
247#define I217_RX_CONFIG 0xB20C /* Receive configuration */
245 248
246#define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */ 249#define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */
247#define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */ 250#define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index d50c91e50528..3e69386add04 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -1165,7 +1165,7 @@ static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1165 dev_kfree_skb_any(adapter->tx_hwtstamp_skb); 1165 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1166 adapter->tx_hwtstamp_skb = NULL; 1166 adapter->tx_hwtstamp_skb = NULL;
1167 adapter->tx_hwtstamp_timeouts++; 1167 adapter->tx_hwtstamp_timeouts++;
1168 e_warn("clearing Tx timestamp hang"); 1168 e_warn("clearing Tx timestamp hang\n");
1169 } else { 1169 } else {
1170 /* reschedule to check later */ 1170 /* reschedule to check later */
1171 schedule_work(&adapter->tx_hwtstamp_work); 1171 schedule_work(&adapter->tx_hwtstamp_work);
@@ -5687,7 +5687,7 @@ struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5687static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5687static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5688{ 5688{
5689 struct e1000_adapter *adapter = netdev_priv(netdev); 5689 struct e1000_adapter *adapter = netdev_priv(netdev);
5690 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5690 int max_frame = new_mtu + VLAN_HLEN + ETH_HLEN + ETH_FCS_LEN;
5691 5691
5692 /* Jumbo frame support */ 5692 /* Jumbo frame support */
5693 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 5693 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
@@ -6235,6 +6235,7 @@ static int __e1000_resume(struct pci_dev *pdev)
6235 return 0; 6235 return 0;
6236} 6236}
6237 6237
6238#ifdef CONFIG_PM_SLEEP
6238static int e1000e_pm_thaw(struct device *dev) 6239static int e1000e_pm_thaw(struct device *dev)
6239{ 6240{
6240 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev)); 6241 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
@@ -6255,7 +6256,6 @@ static int e1000e_pm_thaw(struct device *dev)
6255 return 0; 6256 return 0;
6256} 6257}
6257 6258
6258#ifdef CONFIG_PM_SLEEP
6259static int e1000e_pm_suspend(struct device *dev) 6259static int e1000e_pm_suspend(struct device *dev)
6260{ 6260{
6261 struct pci_dev *pdev = to_pci_dev(dev); 6261 struct pci_dev *pdev = to_pci_dev(dev);
diff --git a/drivers/net/ethernet/intel/e1000e/phy.h b/drivers/net/ethernet/intel/e1000e/phy.h
index 3841bccf058c..537d2780b408 100644
--- a/drivers/net/ethernet/intel/e1000e/phy.h
+++ b/drivers/net/ethernet/intel/e1000e/phy.h
@@ -164,6 +164,7 @@ s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
164#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 164#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
165#define HV_M_STATUS_SPEED_MASK 0x0300 165#define HV_M_STATUS_SPEED_MASK 0x0300
166#define HV_M_STATUS_SPEED_1000 0x0200 166#define HV_M_STATUS_SPEED_1000 0x0200
167#define HV_M_STATUS_SPEED_100 0x0100
167#define HV_M_STATUS_LINK_UP 0x0040 168#define HV_M_STATUS_LINK_UP 0x0040
168 169
169#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 170#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 861b722c2672..cf0761f08911 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -2897,12 +2897,9 @@ static irqreturn_t i40e_intr(int irq, void *data)
2897 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 2897 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2898 2898
2899 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 2899 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2900 ena_mask &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 2900 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2901 i40e_ptp_tx_hwtstamp(pf); 2901 i40e_ptp_tx_hwtstamp(pf);
2902 prttsyn_stat &= ~I40E_PRTTSYN_STAT_0_TXTIME_MASK;
2903 } 2902 }
2904
2905 wr32(hw, I40E_PRTTSYN_STAT_0, prttsyn_stat);
2906 } 2903 }
2907 2904
2908 /* If a critical error is pending we have no choice but to reset the 2905 /* If a critical error is pending we have no choice but to reset the
@@ -4271,6 +4268,14 @@ static int i40e_open(struct net_device *netdev)
4271 if (err) 4268 if (err)
4272 return err; 4269 return err;
4273 4270
4271 /* configure global TSO hardware offload settings */
4272 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4273 TCP_FLAG_FIN) >> 16);
4274 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4275 TCP_FLAG_FIN |
4276 TCP_FLAG_CWR) >> 16);
4277 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4278
4274#ifdef CONFIG_I40E_VXLAN 4279#ifdef CONFIG_I40E_VXLAN
4275 vxlan_get_rx_port(netdev); 4280 vxlan_get_rx_port(netdev);
4276#endif 4281#endif
@@ -6712,6 +6717,7 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)
6712 NETIF_F_HW_VLAN_CTAG_FILTER | 6717 NETIF_F_HW_VLAN_CTAG_FILTER |
6713 NETIF_F_IPV6_CSUM | 6718 NETIF_F_IPV6_CSUM |
6714 NETIF_F_TSO | 6719 NETIF_F_TSO |
6720 NETIF_F_TSO_ECN |
6715 NETIF_F_TSO6 | 6721 NETIF_F_TSO6 |
6716 NETIF_F_RXCSUM | 6722 NETIF_F_RXCSUM |
6717 NETIF_F_NTUPLE | 6723 NETIF_F_NTUPLE |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
index 262bdf11d221..81299189a47d 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
@@ -160,7 +160,7 @@ static i40e_status i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw)
160 udelay(5); 160 udelay(5);
161 } 161 }
162 if (ret_code == I40E_ERR_TIMEOUT) 162 if (ret_code == I40E_ERR_TIMEOUT)
163 hw_dbg(hw, "Done bit in GLNVM_SRCTL not set"); 163 hw_dbg(hw, "Done bit in GLNVM_SRCTL not set\n");
164 return ret_code; 164 return ret_code;
165} 165}
166 166
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
index e33ec6c842b7..e61e63720800 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
@@ -239,7 +239,7 @@ static void i40e_ptp_tx_work(struct work_struct *work)
239 dev_kfree_skb_any(pf->ptp_tx_skb); 239 dev_kfree_skb_any(pf->ptp_tx_skb);
240 pf->ptp_tx_skb = NULL; 240 pf->ptp_tx_skb = NULL;
241 pf->tx_hwtstamp_timeouts++; 241 pf->tx_hwtstamp_timeouts++;
242 dev_warn(&pf->pdev->dev, "clearing Tx timestamp hang"); 242 dev_warn(&pf->pdev->dev, "clearing Tx timestamp hang\n");
243 return; 243 return;
244 } 244 }
245 245
@@ -321,7 +321,7 @@ void i40e_ptp_rx_hang(struct i40e_vsi *vsi)
321 pf->last_rx_ptp_check = jiffies; 321 pf->last_rx_ptp_check = jiffies;
322 pf->rx_hwtstamp_cleared++; 322 pf->rx_hwtstamp_cleared++;
323 dev_warn(&vsi->back->pdev->dev, 323 dev_warn(&vsi->back->pdev->dev,
324 "%s: clearing Rx timestamp hang", 324 "%s: clearing Rx timestamp hang\n",
325 __func__); 325 __func__);
326 } 326 }
327} 327}
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index 0f5d96ad281d..9478ddc66caf 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -418,7 +418,7 @@ int i40e_add_del_fdir(struct i40e_vsi *vsi,
418 } 418 }
419 break; 419 break;
420 default: 420 default:
421 dev_info(&pf->pdev->dev, "Could not specify spec type %d", 421 dev_info(&pf->pdev->dev, "Could not specify spec type %d\n",
422 input->flow_type); 422 input->flow_type);
423 ret = -EINVAL; 423 ret = -EINVAL;
424 } 424 }
@@ -478,7 +478,7 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring,
478 pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT; 478 pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT;
479 } 479 }
480 } else { 480 } else {
481 dev_info(&pdev->dev, "FD filter programming error"); 481 dev_info(&pdev->dev, "FD filter programming error\n");
482 } 482 }
483 } else if (error == 483 } else if (error ==
484 (0x1 << I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) { 484 (0x1 << I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) {
@@ -1713,9 +1713,11 @@ static int i40e_tx_prepare_vlan_flags(struct sk_buff *skb,
1713 I40E_TX_FLAGS_VLAN_PRIO_SHIFT; 1713 I40E_TX_FLAGS_VLAN_PRIO_SHIFT;
1714 if (tx_flags & I40E_TX_FLAGS_SW_VLAN) { 1714 if (tx_flags & I40E_TX_FLAGS_SW_VLAN) {
1715 struct vlan_ethhdr *vhdr; 1715 struct vlan_ethhdr *vhdr;
1716 if (skb_header_cloned(skb) && 1716 int rc;
1717 pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) 1717
1718 return -ENOMEM; 1718 rc = skb_cow_head(skb, 0);
1719 if (rc < 0)
1720 return rc;
1719 vhdr = (struct vlan_ethhdr *)skb->data; 1721 vhdr = (struct vlan_ethhdr *)skb->data;
1720 vhdr->h_vlan_TCI = htons(tx_flags >> 1722 vhdr->h_vlan_TCI = htons(tx_flags >>
1721 I40E_TX_FLAGS_VLAN_SHIFT); 1723 I40E_TX_FLAGS_VLAN_SHIFT);
@@ -1743,20 +1745,18 @@ static int i40e_tso(struct i40e_ring *tx_ring, struct sk_buff *skb,
1743 u64 *cd_type_cmd_tso_mss, u32 *cd_tunneling) 1745 u64 *cd_type_cmd_tso_mss, u32 *cd_tunneling)
1744{ 1746{
1745 u32 cd_cmd, cd_tso_len, cd_mss; 1747 u32 cd_cmd, cd_tso_len, cd_mss;
1748 struct ipv6hdr *ipv6h;
1746 struct tcphdr *tcph; 1749 struct tcphdr *tcph;
1747 struct iphdr *iph; 1750 struct iphdr *iph;
1748 u32 l4len; 1751 u32 l4len;
1749 int err; 1752 int err;
1750 struct ipv6hdr *ipv6h;
1751 1753
1752 if (!skb_is_gso(skb)) 1754 if (!skb_is_gso(skb))
1753 return 0; 1755 return 0;
1754 1756
1755 if (skb_header_cloned(skb)) { 1757 err = skb_cow_head(skb, 0);
1756 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1758 if (err < 0)
1757 if (err) 1759 return err;
1758 return err;
1759 }
1760 1760
1761 if (protocol == htons(ETH_P_IP)) { 1761 if (protocol == htons(ETH_P_IP)) {
1762 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); 1762 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb);
diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c
index db963397cc27..f67f8a170b90 100644
--- a/drivers/net/ethernet/intel/igb/e1000_i210.c
+++ b/drivers/net/ethernet/intel/igb/e1000_i210.c
@@ -365,7 +365,7 @@ static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)
365 word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword); 365 word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
366 if (word_address == address) { 366 if (word_address == address) {
367 *data = INVM_DWORD_TO_WORD_DATA(invm_dword); 367 *data = INVM_DWORD_TO_WORD_DATA(invm_dword);
368 hw_dbg("Read INVM Word 0x%02x = %x", 368 hw_dbg("Read INVM Word 0x%02x = %x\n",
369 address, *data); 369 address, *data);
370 status = E1000_SUCCESS; 370 status = E1000_SUCCESS;
371 break; 371 break;
diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c
index 5910a932ea7c..1e0c404db81a 100644
--- a/drivers/net/ethernet/intel/igb/e1000_mac.c
+++ b/drivers/net/ethernet/intel/igb/e1000_mac.c
@@ -929,11 +929,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
929 */ 929 */
930 if (hw->fc.requested_mode == e1000_fc_full) { 930 if (hw->fc.requested_mode == e1000_fc_full) {
931 hw->fc.current_mode = e1000_fc_full; 931 hw->fc.current_mode = e1000_fc_full;
932 hw_dbg("Flow Control = FULL.\r\n"); 932 hw_dbg("Flow Control = FULL.\n");
933 } else { 933 } else {
934 hw->fc.current_mode = e1000_fc_rx_pause; 934 hw->fc.current_mode = e1000_fc_rx_pause;
935 hw_dbg("Flow Control = " 935 hw_dbg("Flow Control = RX PAUSE frames only.\n");
936 "RX PAUSE frames only.\r\n");
937 } 936 }
938 } 937 }
939 /* For receiving PAUSE frames ONLY. 938 /* For receiving PAUSE frames ONLY.
@@ -948,7 +947,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
948 (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && 947 (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
949 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { 948 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
950 hw->fc.current_mode = e1000_fc_tx_pause; 949 hw->fc.current_mode = e1000_fc_tx_pause;
951 hw_dbg("Flow Control = TX PAUSE frames only.\r\n"); 950 hw_dbg("Flow Control = TX PAUSE frames only.\n");
952 } 951 }
953 /* For transmitting PAUSE frames ONLY. 952 /* For transmitting PAUSE frames ONLY.
954 * 953 *
@@ -962,7 +961,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
962 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && 961 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
963 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { 962 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
964 hw->fc.current_mode = e1000_fc_rx_pause; 963 hw->fc.current_mode = e1000_fc_rx_pause;
965 hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); 964 hw_dbg("Flow Control = RX PAUSE frames only.\n");
966 } 965 }
967 /* Per the IEEE spec, at this point flow control should be 966 /* Per the IEEE spec, at this point flow control should be
968 * disabled. However, we want to consider that we could 967 * disabled. However, we want to consider that we could
@@ -988,10 +987,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
988 (hw->fc.requested_mode == e1000_fc_tx_pause) || 987 (hw->fc.requested_mode == e1000_fc_tx_pause) ||
989 (hw->fc.strict_ieee)) { 988 (hw->fc.strict_ieee)) {
990 hw->fc.current_mode = e1000_fc_none; 989 hw->fc.current_mode = e1000_fc_none;
991 hw_dbg("Flow Control = NONE.\r\n"); 990 hw_dbg("Flow Control = NONE.\n");
992 } else { 991 } else {
993 hw->fc.current_mode = e1000_fc_rx_pause; 992 hw->fc.current_mode = e1000_fc_rx_pause;
994 hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); 993 hw_dbg("Flow Control = RX PAUSE frames only.\n");
995 } 994 }
996 995
997 /* Now we need to do one last check... If we auto- 996 /* Now we need to do one last check... If we auto-
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index fb98d4602f9d..16430a8440fa 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -5193,8 +5193,10 @@ void igb_update_stats(struct igb_adapter *adapter,
5193 5193
5194 rcu_read_lock(); 5194 rcu_read_lock();
5195 for (i = 0; i < adapter->num_rx_queues; i++) { 5195 for (i = 0; i < adapter->num_rx_queues; i++) {
5196 u32 rqdpc = rd32(E1000_RQDPC(i));
5197 struct igb_ring *ring = adapter->rx_ring[i]; 5196 struct igb_ring *ring = adapter->rx_ring[i];
5197 u32 rqdpc = rd32(E1000_RQDPC(i));
5198 if (hw->mac.type >= e1000_i210)
5199 wr32(E1000_RQDPC(i), 0);
5198 5200
5199 if (rqdpc) { 5201 if (rqdpc) {
5200 ring->rx_stats.drops += rqdpc; 5202 ring->rx_stats.drops += rqdpc;
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
index 9209d652e1c9..ab25e49365f7 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -389,7 +389,7 @@ static void igb_ptp_tx_work(struct work_struct *work)
389 adapter->ptp_tx_skb = NULL; 389 adapter->ptp_tx_skb = NULL;
390 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state); 390 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
391 adapter->tx_hwtstamp_timeouts++; 391 adapter->tx_hwtstamp_timeouts++;
392 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang"); 392 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
393 return; 393 return;
394 } 394 }
395 395
@@ -451,7 +451,7 @@ void igb_ptp_rx_hang(struct igb_adapter *adapter)
451 rd32(E1000_RXSTMPH); 451 rd32(E1000_RXSTMPH);
452 adapter->last_rx_ptp_check = jiffies; 452 adapter->last_rx_ptp_check = jiffies;
453 adapter->rx_hwtstamp_cleared++; 453 adapter->rx_hwtstamp_cleared++;
454 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang"); 454 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");
455 } 455 }
456} 456}
457 457
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 1a12c1dd7a27..c6c4ca7d68e6 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -256,7 +256,6 @@ struct ixgbe_ring {
256 struct ixgbe_tx_buffer *tx_buffer_info; 256 struct ixgbe_tx_buffer *tx_buffer_info;
257 struct ixgbe_rx_buffer *rx_buffer_info; 257 struct ixgbe_rx_buffer *rx_buffer_info;
258 }; 258 };
259 unsigned long last_rx_timestamp;
260 unsigned long state; 259 unsigned long state;
261 u8 __iomem *tail; 260 u8 __iomem *tail;
262 dma_addr_t dma; /* phys. address of descriptor ring */ 261 dma_addr_t dma; /* phys. address of descriptor ring */
@@ -770,6 +769,7 @@ struct ixgbe_adapter {
770 unsigned long ptp_tx_start; 769 unsigned long ptp_tx_start;
771 unsigned long last_overflow_check; 770 unsigned long last_overflow_check;
772 unsigned long last_rx_ptp_check; 771 unsigned long last_rx_ptp_check;
772 unsigned long last_rx_timestamp;
773 spinlock_t tmreg_lock; 773 spinlock_t tmreg_lock;
774 struct cyclecounter cc; 774 struct cyclecounter cc;
775 struct timecounter tc; 775 struct timecounter tc;
@@ -944,24 +944,7 @@ void ixgbe_ptp_init(struct ixgbe_adapter *adapter);
944void ixgbe_ptp_stop(struct ixgbe_adapter *adapter); 944void ixgbe_ptp_stop(struct ixgbe_adapter *adapter);
945void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter); 945void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter);
946void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter); 946void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter);
947void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, 947void ixgbe_ptp_rx_hwtstamp(struct ixgbe_adapter *adapter, struct sk_buff *skb);
948 struct sk_buff *skb);
949static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring,
950 union ixgbe_adv_rx_desc *rx_desc,
951 struct sk_buff *skb)
952{
953 if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
954 return;
955
956 __ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, skb);
957
958 /*
959 * Update the last_rx_timestamp timer in order to enable watchdog check
960 * for error case of latched timestamp on a dropped packet.
961 */
962 rx_ring->last_rx_timestamp = jiffies;
963}
964
965int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); 948int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
966int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); 949int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
967void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter); 950void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 24fba39e194e..981b8a7b100d 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -1195,7 +1195,7 @@ static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,
1195 */ 1195 */
1196 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; 1196 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0];
1197 1197
1198 hw_dbg(hw, "Detected EEPROM page size = %d words.", 1198 hw_dbg(hw, "Detected EEPROM page size = %d words.\n",
1199 hw->eeprom.word_page_size); 1199 hw->eeprom.word_page_size);
1200out: 1200out:
1201 return status; 1201 return status;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index c4c526b7f99f..d62e7a25cf97 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1664,7 +1664,8 @@ static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1664 1664
1665 ixgbe_rx_checksum(rx_ring, rx_desc, skb); 1665 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1666 1666
1667 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); 1667 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1668 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1668 1669
1669 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) && 1670 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1670 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { 1671 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index 23f765263f12..a76af8e28a04 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -536,7 +536,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
536 536
537 if (time_out == max_time_out) { 537 if (time_out == max_time_out) {
538 status = IXGBE_ERR_LINK_SETUP; 538 status = IXGBE_ERR_LINK_SETUP;
539 hw_dbg(hw, "ixgbe_setup_phy_link_generic: time out"); 539 hw_dbg(hw, "ixgbe_setup_phy_link_generic: time out\n");
540 } 540 }
541 541
542 return status; 542 return status;
@@ -745,7 +745,7 @@ s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)
745 745
746 if (time_out == max_time_out) { 746 if (time_out == max_time_out) {
747 status = IXGBE_ERR_LINK_SETUP; 747 status = IXGBE_ERR_LINK_SETUP;
748 hw_dbg(hw, "ixgbe_setup_phy_link_tnx: time out"); 748 hw_dbg(hw, "ixgbe_setup_phy_link_tnx: time out\n");
749 } 749 }
750 750
751 return status; 751 return status;
@@ -1175,7 +1175,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
1175 status = 0; 1175 status = 0;
1176 } else { 1176 } else {
1177 if (hw->allow_unsupported_sfp) { 1177 if (hw->allow_unsupported_sfp) {
1178 e_warn(drv, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules."); 1178 e_warn(drv, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n");
1179 status = 0; 1179 status = 0;
1180 } else { 1180 } else {
1181 hw_dbg(hw, 1181 hw_dbg(hw,
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
index 63515a6f67fa..8902ae683457 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
@@ -435,10 +435,8 @@ void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter)
435void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) 435void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter)
436{ 436{
437 struct ixgbe_hw *hw = &adapter->hw; 437 struct ixgbe_hw *hw = &adapter->hw;
438 struct ixgbe_ring *rx_ring;
439 u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); 438 u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
440 unsigned long rx_event; 439 unsigned long rx_event;
441 int n;
442 440
443 /* if we don't have a valid timestamp in the registers, just update the 441 /* if we don't have a valid timestamp in the registers, just update the
444 * timeout counter and exit 442 * timeout counter and exit
@@ -450,18 +448,15 @@ void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter)
450 448
451 /* determine the most recent watchdog or rx_timestamp event */ 449 /* determine the most recent watchdog or rx_timestamp event */
452 rx_event = adapter->last_rx_ptp_check; 450 rx_event = adapter->last_rx_ptp_check;
453 for (n = 0; n < adapter->num_rx_queues; n++) { 451 if (time_after(adapter->last_rx_timestamp, rx_event))
454 rx_ring = adapter->rx_ring[n]; 452 rx_event = adapter->last_rx_timestamp;
455 if (time_after(rx_ring->last_rx_timestamp, rx_event))
456 rx_event = rx_ring->last_rx_timestamp;
457 }
458 453
459 /* only need to read the high RXSTMP register to clear the lock */ 454 /* only need to read the high RXSTMP register to clear the lock */
460 if (time_is_before_jiffies(rx_event + 5*HZ)) { 455 if (time_is_before_jiffies(rx_event + 5*HZ)) {
461 IXGBE_READ_REG(hw, IXGBE_RXSTMPH); 456 IXGBE_READ_REG(hw, IXGBE_RXSTMPH);
462 adapter->last_rx_ptp_check = jiffies; 457 adapter->last_rx_ptp_check = jiffies;
463 458
464 e_warn(drv, "clearing RX Timestamp hang"); 459 e_warn(drv, "clearing RX Timestamp hang\n");
465 } 460 }
466} 461}
467 462
@@ -517,7 +512,7 @@ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work)
517 dev_kfree_skb_any(adapter->ptp_tx_skb); 512 dev_kfree_skb_any(adapter->ptp_tx_skb);
518 adapter->ptp_tx_skb = NULL; 513 adapter->ptp_tx_skb = NULL;
519 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state); 514 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
520 e_warn(drv, "clearing Tx Timestamp hang"); 515 e_warn(drv, "clearing Tx Timestamp hang\n");
521 return; 516 return;
522 } 517 }
523 518
@@ -530,35 +525,22 @@ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work)
530} 525}
531 526
532/** 527/**
533 * __ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp 528 * ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp
534 * @q_vector: structure containing interrupt and ring information 529 * @adapter: pointer to adapter struct
535 * @skb: particular skb to send timestamp with 530 * @skb: particular skb to send timestamp with
536 * 531 *
537 * if the timestamp is valid, we convert it into the timecounter ns 532 * if the timestamp is valid, we convert it into the timecounter ns
538 * value, then store that result into the shhwtstamps structure which 533 * value, then store that result into the shhwtstamps structure which
539 * is passed up the network stack 534 * is passed up the network stack
540 */ 535 */
541void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, 536void ixgbe_ptp_rx_hwtstamp(struct ixgbe_adapter *adapter, struct sk_buff *skb)
542 struct sk_buff *skb)
543{ 537{
544 struct ixgbe_adapter *adapter; 538 struct ixgbe_hw *hw = &adapter->hw;
545 struct ixgbe_hw *hw;
546 struct skb_shared_hwtstamps *shhwtstamps; 539 struct skb_shared_hwtstamps *shhwtstamps;
547 u64 regval = 0, ns; 540 u64 regval = 0, ns;
548 u32 tsyncrxctl; 541 u32 tsyncrxctl;
549 unsigned long flags; 542 unsigned long flags;
550 543
551 /* we cannot process timestamps on a ring without a q_vector */
552 if (!q_vector || !q_vector->adapter)
553 return;
554
555 adapter = q_vector->adapter;
556 hw = &adapter->hw;
557
558 /*
559 * Read the tsyncrxctl register afterwards in order to prevent taking an
560 * I/O hit on every packet.
561 */
562 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); 544 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
563 if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID)) 545 if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID))
564 return; 546 return;
@@ -566,13 +548,17 @@ void __ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,
566 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL); 548 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL);
567 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32; 549 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32;
568 550
569
570 spin_lock_irqsave(&adapter->tmreg_lock, flags); 551 spin_lock_irqsave(&adapter->tmreg_lock, flags);
571 ns = timecounter_cyc2time(&adapter->tc, regval); 552 ns = timecounter_cyc2time(&adapter->tc, regval);
572 spin_unlock_irqrestore(&adapter->tmreg_lock, flags); 553 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
573 554
574 shhwtstamps = skb_hwtstamps(skb); 555 shhwtstamps = skb_hwtstamps(skb);
575 shhwtstamps->hwtstamp = ns_to_ktime(ns); 556 shhwtstamps->hwtstamp = ns_to_ktime(ns);
557
558 /* Update the last_rx_timestamp timer in order to enable watchdog check
559 * for error case of latched timestamp on a dropped packet.
560 */
561 adapter->last_rx_timestamp = jiffies;
576} 562}
577 563
578int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) 564int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr)
diff --git a/drivers/net/ethernet/marvell/mvmdio.c b/drivers/net/ethernet/marvell/mvmdio.c
index b161a525fc5b..9d5ced263a5e 100644
--- a/drivers/net/ethernet/marvell/mvmdio.c
+++ b/drivers/net/ethernet/marvell/mvmdio.c
@@ -232,7 +232,7 @@ static int orion_mdio_probe(struct platform_device *pdev)
232 clk_prepare_enable(dev->clk); 232 clk_prepare_enable(dev->clk);
233 233
234 dev->err_interrupt = platform_get_irq(pdev, 0); 234 dev->err_interrupt = platform_get_irq(pdev, 0);
235 if (dev->err_interrupt != -ENXIO) { 235 if (dev->err_interrupt > 0) {
236 ret = devm_request_irq(&pdev->dev, dev->err_interrupt, 236 ret = devm_request_irq(&pdev->dev, dev->err_interrupt,
237 orion_mdio_err_irq, 237 orion_mdio_err_irq,
238 IRQF_SHARED, pdev->name, dev); 238 IRQF_SHARED, pdev->name, dev);
@@ -241,6 +241,9 @@ static int orion_mdio_probe(struct platform_device *pdev)
241 241
242 writel(MVMDIO_ERR_INT_SMI_DONE, 242 writel(MVMDIO_ERR_INT_SMI_DONE,
243 dev->regs + MVMDIO_ERR_INT_MASK); 243 dev->regs + MVMDIO_ERR_INT_MASK);
244
245 } else if (dev->err_interrupt == -EPROBE_DEFER) {
246 return -EPROBE_DEFER;
244 } 247 }
245 248
246 mutex_init(&dev->lock); 249 mutex_init(&dev->lock);
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index d04b1c3c9b85..14786c8bf99e 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -91,7 +91,7 @@
91#define MVNETA_RX_MIN_FRAME_SIZE 0x247c 91#define MVNETA_RX_MIN_FRAME_SIZE 0x247c
92#define MVNETA_SERDES_CFG 0x24A0 92#define MVNETA_SERDES_CFG 0x24A0
93#define MVNETA_SGMII_SERDES_PROTO 0x0cc7 93#define MVNETA_SGMII_SERDES_PROTO 0x0cc7
94#define MVNETA_RGMII_SERDES_PROTO 0x0667 94#define MVNETA_QSGMII_SERDES_PROTO 0x0667
95#define MVNETA_TYPE_PRIO 0x24bc 95#define MVNETA_TYPE_PRIO 0x24bc
96#define MVNETA_FORCE_UNI BIT(21) 96#define MVNETA_FORCE_UNI BIT(21)
97#define MVNETA_TXQ_CMD_1 0x24e4 97#define MVNETA_TXQ_CMD_1 0x24e4
@@ -2721,29 +2721,44 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp,
2721} 2721}
2722 2722
2723/* Power up the port */ 2723/* Power up the port */
2724static void mvneta_port_power_up(struct mvneta_port *pp, int phy_mode) 2724static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)
2725{ 2725{
2726 u32 val; 2726 u32 ctrl;
2727 2727
2728 /* MAC Cause register should be cleared */ 2728 /* MAC Cause register should be cleared */
2729 mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0); 2729 mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0);
2730 2730
2731 if (phy_mode == PHY_INTERFACE_MODE_SGMII) 2731 ctrl = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
2732 mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
2733 else
2734 mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_RGMII_SERDES_PROTO);
2735 2732
2736 val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); 2733 /* Even though it might look weird, when we're configured in
2737 2734 * SGMII or QSGMII mode, the RGMII bit needs to be set.
2738 val |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII; 2735 */
2736 switch(phy_mode) {
2737 case PHY_INTERFACE_MODE_QSGMII:
2738 mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);
2739 ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;
2740 break;
2741 case PHY_INTERFACE_MODE_SGMII:
2742 mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
2743 ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;
2744 break;
2745 case PHY_INTERFACE_MODE_RGMII:
2746 case PHY_INTERFACE_MODE_RGMII_ID:
2747 ctrl |= MVNETA_GMAC2_PORT_RGMII;
2748 break;
2749 default:
2750 return -EINVAL;
2751 }
2739 2752
2740 /* Cancel Port Reset */ 2753 /* Cancel Port Reset */
2741 val &= ~MVNETA_GMAC2_PORT_RESET; 2754 ctrl &= ~MVNETA_GMAC2_PORT_RESET;
2742 mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); 2755 mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl);
2743 2756
2744 while ((mvreg_read(pp, MVNETA_GMAC_CTRL_2) & 2757 while ((mvreg_read(pp, MVNETA_GMAC_CTRL_2) &
2745 MVNETA_GMAC2_PORT_RESET) != 0) 2758 MVNETA_GMAC2_PORT_RESET) != 0)
2746 continue; 2759 continue;
2760
2761 return 0;
2747} 2762}
2748 2763
2749/* Device initialization routine */ 2764/* Device initialization routine */
@@ -2854,7 +2869,12 @@ static int mvneta_probe(struct platform_device *pdev)
2854 dev_err(&pdev->dev, "can't init eth hal\n"); 2869 dev_err(&pdev->dev, "can't init eth hal\n");
2855 goto err_free_stats; 2870 goto err_free_stats;
2856 } 2871 }
2857 mvneta_port_power_up(pp, phy_mode); 2872
2873 err = mvneta_port_power_up(pp, phy_mode);
2874 if (err < 0) {
2875 dev_err(&pdev->dev, "can't power up port\n");
2876 goto err_deinit;
2877 }
2858 2878
2859 dram_target_info = mv_mbus_dram_info(); 2879 dram_target_info = mv_mbus_dram_info();
2860 if (dram_target_info) 2880 if (dram_target_info)
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index 70e95324a97d..c2cd8d31bcad 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -66,7 +66,6 @@ int mlx4_en_create_cq(struct mlx4_en_priv *priv,
66 66
67 cq->ring = ring; 67 cq->ring = ring;
68 cq->is_tx = mode; 68 cq->is_tx = mode;
69 spin_lock_init(&cq->lock);
70 69
71 /* Allocate HW buffers on provided NUMA node. 70 /* Allocate HW buffers on provided NUMA node.
72 * dev->numa_node is used in mtt range allocation flow. 71 * dev->numa_node is used in mtt range allocation flow.
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index f085c2df5e69..7e4b1720c3d1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -1304,15 +1304,11 @@ static void mlx4_en_netpoll(struct net_device *dev)
1304{ 1304{
1305 struct mlx4_en_priv *priv = netdev_priv(dev); 1305 struct mlx4_en_priv *priv = netdev_priv(dev);
1306 struct mlx4_en_cq *cq; 1306 struct mlx4_en_cq *cq;
1307 unsigned long flags;
1308 int i; 1307 int i;
1309 1308
1310 for (i = 0; i < priv->rx_ring_num; i++) { 1309 for (i = 0; i < priv->rx_ring_num; i++) {
1311 cq = priv->rx_cq[i]; 1310 cq = priv->rx_cq[i];
1312 spin_lock_irqsave(&cq->lock, flags); 1311 napi_schedule(&cq->napi);
1313 napi_synchronize(&cq->napi);
1314 mlx4_en_process_rx_cq(dev, cq, 0);
1315 spin_unlock_irqrestore(&cq->lock, flags);
1316 } 1312 }
1317} 1313}
1318#endif 1314#endif
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index f0ae95f66ceb..7cf9dadcb471 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -754,10 +754,10 @@ static void mlx4_request_modules(struct mlx4_dev *dev)
754 has_eth_port = true; 754 has_eth_port = true;
755 } 755 }
756 756
757 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
758 request_module_nowait(IB_DRV_NAME);
759 if (has_eth_port) 757 if (has_eth_port)
760 request_module_nowait(EN_DRV_NAME); 758 request_module_nowait(EN_DRV_NAME);
759 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
760 request_module_nowait(IB_DRV_NAME);
761} 761}
762 762
763/* 763/*
@@ -2301,13 +2301,8 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
2301 /* Allow large DMA segments, up to the firmware limit of 1 GB */ 2301 /* Allow large DMA segments, up to the firmware limit of 1 GB */
2302 dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); 2302 dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
2303 2303
2304 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 2304 dev = pci_get_drvdata(pdev);
2305 if (!priv) { 2305 priv = mlx4_priv(dev);
2306 err = -ENOMEM;
2307 goto err_release_regions;
2308 }
2309
2310 dev = &priv->dev;
2311 dev->pdev = pdev; 2306 dev->pdev = pdev;
2312 INIT_LIST_HEAD(&priv->ctx_list); 2307 INIT_LIST_HEAD(&priv->ctx_list);
2313 spin_lock_init(&priv->ctx_lock); 2308 spin_lock_init(&priv->ctx_lock);
@@ -2374,10 +2369,10 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
2374 } else { 2369 } else {
2375 atomic_inc(&pf_loading); 2370 atomic_inc(&pf_loading);
2376 err = pci_enable_sriov(pdev, total_vfs); 2371 err = pci_enable_sriov(pdev, total_vfs);
2377 atomic_dec(&pf_loading);
2378 if (err) { 2372 if (err) {
2379 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d).\n", 2373 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d).\n",
2380 err); 2374 err);
2375 atomic_dec(&pf_loading);
2381 err = 0; 2376 err = 0;
2382 } else { 2377 } else {
2383 mlx4_warn(dev, "Running in master mode\n"); 2378 mlx4_warn(dev, "Running in master mode\n");
@@ -2445,7 +2440,8 @@ slave_start:
2445 * No return code for this call, just warn the user in case of PCI 2440 * No return code for this call, just warn the user in case of PCI
2446 * express device capabilities are under-satisfied by the bus. 2441 * express device capabilities are under-satisfied by the bus.
2447 */ 2442 */
2448 mlx4_check_pcie_caps(dev); 2443 if (!mlx4_is_slave(dev))
2444 mlx4_check_pcie_caps(dev);
2449 2445
2450 /* In master functions, the communication channel must be initialized 2446 /* In master functions, the communication channel must be initialized
2451 * after obtaining its address from fw */ 2447 * after obtaining its address from fw */
@@ -2535,8 +2531,10 @@ slave_start:
2535 mlx4_sense_init(dev); 2531 mlx4_sense_init(dev);
2536 mlx4_start_sense(dev); 2532 mlx4_start_sense(dev);
2537 2533
2538 priv->pci_dev_data = pci_dev_data; 2534 priv->removed = 0;
2539 pci_set_drvdata(pdev, dev); 2535
2536 if (mlx4_is_master(dev) && dev->num_vfs)
2537 atomic_dec(&pf_loading);
2540 2538
2541 return 0; 2539 return 0;
2542 2540
@@ -2588,6 +2586,9 @@ err_rel_own:
2588 if (!mlx4_is_slave(dev)) 2586 if (!mlx4_is_slave(dev))
2589 mlx4_free_ownership(dev); 2587 mlx4_free_ownership(dev);
2590 2588
2589 if (mlx4_is_master(dev) && dev->num_vfs)
2590 atomic_dec(&pf_loading);
2591
2591 kfree(priv->dev.dev_vfs); 2592 kfree(priv->dev.dev_vfs);
2592 2593
2593err_free_dev: 2594err_free_dev:
@@ -2604,85 +2605,110 @@ err_disable_pdev:
2604 2605
2605static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 2606static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
2606{ 2607{
2608 struct mlx4_priv *priv;
2609 struct mlx4_dev *dev;
2610
2607 printk_once(KERN_INFO "%s", mlx4_version); 2611 printk_once(KERN_INFO "%s", mlx4_version);
2608 2612
2613 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
2614 if (!priv)
2615 return -ENOMEM;
2616
2617 dev = &priv->dev;
2618 pci_set_drvdata(pdev, dev);
2619 priv->pci_dev_data = id->driver_data;
2620
2609 return __mlx4_init_one(pdev, id->driver_data); 2621 return __mlx4_init_one(pdev, id->driver_data);
2610} 2622}
2611 2623
2612static void mlx4_remove_one(struct pci_dev *pdev) 2624static void __mlx4_remove_one(struct pci_dev *pdev)
2613{ 2625{
2614 struct mlx4_dev *dev = pci_get_drvdata(pdev); 2626 struct mlx4_dev *dev = pci_get_drvdata(pdev);
2615 struct mlx4_priv *priv = mlx4_priv(dev); 2627 struct mlx4_priv *priv = mlx4_priv(dev);
2628 int pci_dev_data;
2616 int p; 2629 int p;
2617 2630
2618 if (dev) { 2631 if (priv->removed)
2619 /* in SRIOV it is not allowed to unload the pf's 2632 return;
2620 * driver while there are alive vf's */
2621 if (mlx4_is_master(dev)) {
2622 if (mlx4_how_many_lives_vf(dev))
2623 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2624 }
2625 mlx4_stop_sense(dev);
2626 mlx4_unregister_device(dev);
2627 2633
2628 for (p = 1; p <= dev->caps.num_ports; p++) { 2634 pci_dev_data = priv->pci_dev_data;
2629 mlx4_cleanup_port_info(&priv->port[p]);
2630 mlx4_CLOSE_PORT(dev, p);
2631 }
2632 2635
2633 if (mlx4_is_master(dev)) 2636 /* in SRIOV it is not allowed to unload the pf's
2634 mlx4_free_resource_tracker(dev, 2637 * driver while there are alive vf's */
2635 RES_TR_FREE_SLAVES_ONLY); 2638 if (mlx4_is_master(dev) && mlx4_how_many_lives_vf(dev))
2636 2639 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2637 mlx4_cleanup_counters_table(dev); 2640 mlx4_stop_sense(dev);
2638 mlx4_cleanup_qp_table(dev); 2641 mlx4_unregister_device(dev);
2639 mlx4_cleanup_srq_table(dev);
2640 mlx4_cleanup_cq_table(dev);
2641 mlx4_cmd_use_polling(dev);
2642 mlx4_cleanup_eq_table(dev);
2643 mlx4_cleanup_mcg_table(dev);
2644 mlx4_cleanup_mr_table(dev);
2645 mlx4_cleanup_xrcd_table(dev);
2646 mlx4_cleanup_pd_table(dev);
2647 2642
2648 if (mlx4_is_master(dev)) 2643 for (p = 1; p <= dev->caps.num_ports; p++) {
2649 mlx4_free_resource_tracker(dev, 2644 mlx4_cleanup_port_info(&priv->port[p]);
2650 RES_TR_FREE_STRUCTS_ONLY); 2645 mlx4_CLOSE_PORT(dev, p);
2651 2646 }
2652 iounmap(priv->kar); 2647
2653 mlx4_uar_free(dev, &priv->driver_uar); 2648 if (mlx4_is_master(dev))
2654 mlx4_cleanup_uar_table(dev); 2649 mlx4_free_resource_tracker(dev,
2655 if (!mlx4_is_slave(dev)) 2650 RES_TR_FREE_SLAVES_ONLY);
2656 mlx4_clear_steering(dev); 2651
2657 mlx4_free_eq_table(dev); 2652 mlx4_cleanup_counters_table(dev);
2658 if (mlx4_is_master(dev)) 2653 mlx4_cleanup_qp_table(dev);
2659 mlx4_multi_func_cleanup(dev); 2654 mlx4_cleanup_srq_table(dev);
2660 mlx4_close_hca(dev); 2655 mlx4_cleanup_cq_table(dev);
2661 if (mlx4_is_slave(dev)) 2656 mlx4_cmd_use_polling(dev);
2662 mlx4_multi_func_cleanup(dev); 2657 mlx4_cleanup_eq_table(dev);
2663 mlx4_cmd_cleanup(dev); 2658 mlx4_cleanup_mcg_table(dev);
2664 2659 mlx4_cleanup_mr_table(dev);
2665 if (dev->flags & MLX4_FLAG_MSI_X) 2660 mlx4_cleanup_xrcd_table(dev);
2666 pci_disable_msix(pdev); 2661 mlx4_cleanup_pd_table(dev);
2667 if (dev->flags & MLX4_FLAG_SRIOV) {
2668 mlx4_warn(dev, "Disabling SR-IOV\n");
2669 pci_disable_sriov(pdev);
2670 }
2671 2662
2672 if (!mlx4_is_slave(dev)) 2663 if (mlx4_is_master(dev))
2673 mlx4_free_ownership(dev); 2664 mlx4_free_resource_tracker(dev,
2665 RES_TR_FREE_STRUCTS_ONLY);
2674 2666
2675 kfree(dev->caps.qp0_tunnel); 2667 iounmap(priv->kar);
2676 kfree(dev->caps.qp0_proxy); 2668 mlx4_uar_free(dev, &priv->driver_uar);
2677 kfree(dev->caps.qp1_tunnel); 2669 mlx4_cleanup_uar_table(dev);
2678 kfree(dev->caps.qp1_proxy); 2670 if (!mlx4_is_slave(dev))
2679 kfree(dev->dev_vfs); 2671 mlx4_clear_steering(dev);
2672 mlx4_free_eq_table(dev);
2673 if (mlx4_is_master(dev))
2674 mlx4_multi_func_cleanup(dev);
2675 mlx4_close_hca(dev);
2676 if (mlx4_is_slave(dev))
2677 mlx4_multi_func_cleanup(dev);
2678 mlx4_cmd_cleanup(dev);
2680 2679
2681 kfree(priv); 2680 if (dev->flags & MLX4_FLAG_MSI_X)
2682 pci_release_regions(pdev); 2681 pci_disable_msix(pdev);
2683 pci_disable_device(pdev); 2682 if (dev->flags & MLX4_FLAG_SRIOV) {
2684 pci_set_drvdata(pdev, NULL); 2683 mlx4_warn(dev, "Disabling SR-IOV\n");
2684 pci_disable_sriov(pdev);
2685 dev->num_vfs = 0;
2685 } 2686 }
2687
2688 if (!mlx4_is_slave(dev))
2689 mlx4_free_ownership(dev);
2690
2691 kfree(dev->caps.qp0_tunnel);
2692 kfree(dev->caps.qp0_proxy);
2693 kfree(dev->caps.qp1_tunnel);
2694 kfree(dev->caps.qp1_proxy);
2695 kfree(dev->dev_vfs);
2696
2697 pci_release_regions(pdev);
2698 pci_disable_device(pdev);
2699 memset(priv, 0, sizeof(*priv));
2700 priv->pci_dev_data = pci_dev_data;
2701 priv->removed = 1;
2702}
2703
2704static void mlx4_remove_one(struct pci_dev *pdev)
2705{
2706 struct mlx4_dev *dev = pci_get_drvdata(pdev);
2707 struct mlx4_priv *priv = mlx4_priv(dev);
2708
2709 __mlx4_remove_one(pdev);
2710 kfree(priv);
2711 pci_set_drvdata(pdev, NULL);
2686} 2712}
2687 2713
2688int mlx4_restart_one(struct pci_dev *pdev) 2714int mlx4_restart_one(struct pci_dev *pdev)
@@ -2692,7 +2718,7 @@ int mlx4_restart_one(struct pci_dev *pdev)
2692 int pci_dev_data; 2718 int pci_dev_data;
2693 2719
2694 pci_dev_data = priv->pci_dev_data; 2720 pci_dev_data = priv->pci_dev_data;
2695 mlx4_remove_one(pdev); 2721 __mlx4_remove_one(pdev);
2696 return __mlx4_init_one(pdev, pci_dev_data); 2722 return __mlx4_init_one(pdev, pci_dev_data);
2697} 2723}
2698 2724
@@ -2747,7 +2773,7 @@ MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2747static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev, 2773static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
2748 pci_channel_state_t state) 2774 pci_channel_state_t state)
2749{ 2775{
2750 mlx4_remove_one(pdev); 2776 __mlx4_remove_one(pdev);
2751 2777
2752 return state == pci_channel_io_perm_failure ? 2778 return state == pci_channel_io_perm_failure ?
2753 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 2779 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
@@ -2755,11 +2781,11 @@ static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
2755 2781
2756static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev) 2782static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
2757{ 2783{
2758 const struct pci_device_id *id; 2784 struct mlx4_dev *dev = pci_get_drvdata(pdev);
2759 int ret; 2785 struct mlx4_priv *priv = mlx4_priv(dev);
2786 int ret;
2760 2787
2761 id = pci_match_id(mlx4_pci_table, pdev); 2788 ret = __mlx4_init_one(pdev, priv->pci_dev_data);
2762 ret = __mlx4_init_one(pdev, id->driver_data);
2763 2789
2764 return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 2790 return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
2765} 2791}
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index cf8be41abb36..f9c465101963 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -800,6 +800,7 @@ struct mlx4_priv {
800 spinlock_t ctx_lock; 800 spinlock_t ctx_lock;
801 801
802 int pci_dev_data; 802 int pci_dev_data;
803 int removed;
803 804
804 struct list_head pgdir_list; 805 struct list_head pgdir_list;
805 struct mutex pgdir_mutex; 806 struct mutex pgdir_mutex;
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 7a733c287744..04d9b6fe3e80 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -319,7 +319,6 @@ struct mlx4_en_cq {
319 struct mlx4_cq mcq; 319 struct mlx4_cq mcq;
320 struct mlx4_hwq_resources wqres; 320 struct mlx4_hwq_resources wqres;
321 int ring; 321 int ring;
322 spinlock_t lock;
323 struct net_device *dev; 322 struct net_device *dev;
324 struct napi_struct napi; 323 struct napi_struct napi;
325 int size; 324 int size;
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c
index cfcad26ed40f..b5b3549b0c8d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/port.c
@@ -1106,6 +1106,9 @@ int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid,
1106 } 1106 }
1107 1107
1108 if (found_ix >= 0) { 1108 if (found_ix >= 0) {
1109 /* Calculate a slave_gid which is the slave number in the gid
1110 * table and not a globally unique slave number.
1111 */
1109 if (found_ix < MLX4_ROCE_PF_GIDS) 1112 if (found_ix < MLX4_ROCE_PF_GIDS)
1110 slave_gid = 0; 1113 slave_gid = 0;
1111 else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * 1114 else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) *
@@ -1118,41 +1121,43 @@ int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid,
1118 ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / 1121 ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) /
1119 (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; 1122 (vf_gids / num_vfs)) + vf_gids % num_vfs + 1;
1120 1123
1124 /* Calculate the globally unique slave id */
1121 if (slave_gid) { 1125 if (slave_gid) {
1122 struct mlx4_active_ports exclusive_ports; 1126 struct mlx4_active_ports exclusive_ports;
1123 struct mlx4_active_ports actv_ports; 1127 struct mlx4_active_ports actv_ports;
1124 struct mlx4_slaves_pport slaves_pport_actv; 1128 struct mlx4_slaves_pport slaves_pport_actv;
1125 unsigned max_port_p_one; 1129 unsigned max_port_p_one;
1126 int num_slaves_before = 1; 1130 int num_vfs_before = 0;
1131 int candidate_slave_gid;
1127 1132
1133 /* Calculate how many VFs are on the previous port, if exists */
1128 for (i = 1; i < port; i++) { 1134 for (i = 1; i < port; i++) {
1129 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1135 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports);
1130 set_bit(i, exclusive_ports.ports); 1136 set_bit(i - 1, exclusive_ports.ports);
1131 slaves_pport_actv = 1137 slaves_pport_actv =
1132 mlx4_phys_to_slaves_pport_actv( 1138 mlx4_phys_to_slaves_pport_actv(
1133 dev, &exclusive_ports); 1139 dev, &exclusive_ports);
1134 num_slaves_before += bitmap_weight( 1140 num_vfs_before += bitmap_weight(
1135 slaves_pport_actv.slaves, 1141 slaves_pport_actv.slaves,
1136 dev->num_vfs + 1); 1142 dev->num_vfs + 1);
1137 } 1143 }
1138 1144
1139 if (slave_gid < num_slaves_before) { 1145 /* candidate_slave_gid isn't necessarily the correct slave, but
1140 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1146 * it has the same number of ports and is assigned to the same
1141 set_bit(port - 1, exclusive_ports.ports); 1147 * ports as the real slave we're looking for. On dual port VF,
1142 slaves_pport_actv = 1148 * slave_gid = [single port VFs on port <port>] +
1143 mlx4_phys_to_slaves_pport_actv( 1149 * [offset of the current slave from the first dual port VF] +
1144 dev, &exclusive_ports); 1150 * 1 (for the PF).
1145 slave_gid += bitmap_weight( 1151 */
1146 slaves_pport_actv.slaves, 1152 candidate_slave_gid = slave_gid + num_vfs_before;
1147 dev->num_vfs + 1) - 1153
1148 num_slaves_before; 1154 actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid);
1149 }
1150 actv_ports = mlx4_get_active_ports(dev, slave_gid);
1151 max_port_p_one = find_first_bit( 1155 max_port_p_one = find_first_bit(
1152 actv_ports.ports, dev->caps.num_ports) + 1156 actv_ports.ports, dev->caps.num_ports) +
1153 bitmap_weight(actv_ports.ports, 1157 bitmap_weight(actv_ports.ports,
1154 dev->caps.num_ports) + 1; 1158 dev->caps.num_ports) + 1;
1155 1159
1160 /* Calculate the real slave number */
1156 for (i = 1; i < max_port_p_one; i++) { 1161 for (i = 1; i < max_port_p_one; i++) {
1157 if (i == port) 1162 if (i == port)
1158 continue; 1163 continue;
diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
index 3b5f53ef29b2..1c3fdd4a1f7d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
+++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
@@ -3733,6 +3733,25 @@ static int qp_detach(struct mlx4_dev *dev, struct mlx4_qp *qp,
3733 } 3733 }
3734} 3734}
3735 3735
3736static int mlx4_adjust_port(struct mlx4_dev *dev, int slave,
3737 u8 *gid, enum mlx4_protocol prot)
3738{
3739 int real_port;
3740
3741 if (prot != MLX4_PROT_ETH)
3742 return 0;
3743
3744 if (dev->caps.steering_mode == MLX4_STEERING_MODE_B0 ||
3745 dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
3746 real_port = mlx4_slave_convert_port(dev, slave, gid[5]);
3747 if (real_port < 0)
3748 return -EINVAL;
3749 gid[5] = real_port;
3750 }
3751
3752 return 0;
3753}
3754
3736int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 3755int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
3737 struct mlx4_vhcr *vhcr, 3756 struct mlx4_vhcr *vhcr,
3738 struct mlx4_cmd_mailbox *inbox, 3757 struct mlx4_cmd_mailbox *inbox,
@@ -3768,6 +3787,10 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
3768 if (err) 3787 if (err)
3769 goto ex_detach; 3788 goto ex_detach;
3770 } else { 3789 } else {
3790 err = mlx4_adjust_port(dev, slave, gid, prot);
3791 if (err)
3792 goto ex_put;
3793
3771 err = rem_mcg_res(dev, slave, rqp, gid, prot, type, &reg_id); 3794 err = rem_mcg_res(dev, slave, rqp, gid, prot, type, &reg_id);
3772 if (err) 3795 if (err)
3773 goto ex_put; 3796 goto ex_put;
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
index b48737dcd3c5..ba20c721ee97 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
@@ -2139,8 +2139,6 @@ static int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *adapter)
2139 ahw->max_mac_filters = nic_info.max_mac_filters; 2139 ahw->max_mac_filters = nic_info.max_mac_filters;
2140 ahw->max_mtu = nic_info.max_mtu; 2140 ahw->max_mtu = nic_info.max_mtu;
2141 2141
2142 adapter->max_tx_rings = ahw->max_tx_ques;
2143 adapter->max_sds_rings = ahw->max_rx_ques;
2144 /* eSwitch capability indicates vNIC mode. 2142 /* eSwitch capability indicates vNIC mode.
2145 * vNIC and SRIOV are mutually exclusive operational modes. 2143 * vNIC and SRIOV are mutually exclusive operational modes.
2146 * If SR-IOV capability is detected, SR-IOV physical function 2144 * If SR-IOV capability is detected, SR-IOV physical function
@@ -2161,6 +2159,7 @@ static int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *adapter)
2161int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter) 2159int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter)
2162{ 2160{
2163 struct qlcnic_hardware_context *ahw = adapter->ahw; 2161 struct qlcnic_hardware_context *ahw = adapter->ahw;
2162 u16 max_sds_rings, max_tx_rings;
2164 int ret; 2163 int ret;
2165 2164
2166 ret = qlcnic_83xx_get_nic_configuration(adapter); 2165 ret = qlcnic_83xx_get_nic_configuration(adapter);
@@ -2173,18 +2172,21 @@ int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter)
2173 if (qlcnic_83xx_config_vnic_opmode(adapter)) 2172 if (qlcnic_83xx_config_vnic_opmode(adapter))
2174 return -EIO; 2173 return -EIO;
2175 2174
2176 adapter->max_sds_rings = QLCNIC_MAX_VNIC_SDS_RINGS; 2175 max_sds_rings = QLCNIC_MAX_VNIC_SDS_RINGS;
2177 adapter->max_tx_rings = QLCNIC_MAX_VNIC_TX_RINGS; 2176 max_tx_rings = QLCNIC_MAX_VNIC_TX_RINGS;
2178 } else if (ret == QLC_83XX_DEFAULT_OPMODE) { 2177 } else if (ret == QLC_83XX_DEFAULT_OPMODE) {
2179 ahw->nic_mode = QLCNIC_DEFAULT_MODE; 2178 ahw->nic_mode = QLCNIC_DEFAULT_MODE;
2180 adapter->nic_ops->init_driver = qlcnic_83xx_init_default_driver; 2179 adapter->nic_ops->init_driver = qlcnic_83xx_init_default_driver;
2181 ahw->idc.state_entry = qlcnic_83xx_idc_ready_state_entry; 2180 ahw->idc.state_entry = qlcnic_83xx_idc_ready_state_entry;
2182 adapter->max_sds_rings = QLCNIC_MAX_SDS_RINGS; 2181 max_sds_rings = QLCNIC_MAX_SDS_RINGS;
2183 adapter->max_tx_rings = QLCNIC_MAX_TX_RINGS; 2182 max_tx_rings = QLCNIC_MAX_TX_RINGS;
2184 } else { 2183 } else {
2185 return -EIO; 2184 return -EIO;
2186 } 2185 }
2187 2186
2187 adapter->max_sds_rings = min(ahw->max_rx_ques, max_sds_rings);
2188 adapter->max_tx_rings = min(ahw->max_tx_ques, max_tx_rings);
2189
2188 return 0; 2190 return 0;
2189} 2191}
2190 2192
@@ -2348,15 +2350,16 @@ int qlcnic_83xx_init(struct qlcnic_adapter *adapter, int pci_using_dac)
2348 goto disable_intr; 2350 goto disable_intr;
2349 } 2351 }
2350 2352
2353 INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
2354
2351 err = qlcnic_83xx_setup_mbx_intr(adapter); 2355 err = qlcnic_83xx_setup_mbx_intr(adapter);
2352 if (err) 2356 if (err)
2353 goto disable_mbx_intr; 2357 goto disable_mbx_intr;
2354 2358
2355 qlcnic_83xx_clear_function_resources(adapter); 2359 qlcnic_83xx_clear_function_resources(adapter);
2356 2360 qlcnic_dcb_enable(adapter->dcb);
2357 INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
2358
2359 qlcnic_83xx_initialize_nic(adapter, 1); 2361 qlcnic_83xx_initialize_nic(adapter, 1);
2362 qlcnic_dcb_get_info(adapter->dcb);
2360 2363
2361 /* Configure default, SR-IOV or Virtual NIC mode of operation */ 2364 /* Configure default, SR-IOV or Virtual NIC mode of operation */
2362 err = qlcnic_83xx_configure_opmode(adapter); 2365 err = qlcnic_83xx_configure_opmode(adapter);
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
index 64dcbf33d8f0..c1e11f5715b0 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
@@ -883,8 +883,6 @@ int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *adapter,
883 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques); 883 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
884 npar_info->capabilities = le32_to_cpu(nic_info->capabilities); 884 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
885 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu); 885 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
886 adapter->max_tx_rings = npar_info->max_tx_ques;
887 adapter->max_sds_rings = npar_info->max_rx_ques;
888 } 886 }
889 887
890 qlcnic_free_mbx_args(&cmd); 888 qlcnic_free_mbx_args(&cmd);
@@ -1356,6 +1354,7 @@ int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1356 arg2 &= ~BIT_3; 1354 arg2 &= ~BIT_3;
1357 break; 1355 break;
1358 case QLCNIC_ADD_VLAN: 1356 case QLCNIC_ADD_VLAN:
1357 arg1 &= ~(0x0ffff << 16);
1359 arg1 |= (BIT_2 | BIT_5); 1358 arg1 |= (BIT_2 | BIT_5);
1360 arg1 |= (esw_cfg->vlan_id << 16); 1359 arg1 |= (esw_cfg->vlan_id << 16);
1361 break; 1360 break;
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
index 7d4f54912bad..a51fe18f09a8 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
@@ -330,8 +330,6 @@ static int __qlcnic_dcb_attach(struct qlcnic_dcb *dcb)
330 goto out_free_cfg; 330 goto out_free_cfg;
331 } 331 }
332 332
333 qlcnic_dcb_get_info(dcb);
334
335 return 0; 333 return 0;
336out_free_cfg: 334out_free_cfg:
337 kfree(dcb->cfg); 335 kfree(dcb->cfg);
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
index 309d05640883..0bc914859e38 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
@@ -670,7 +670,7 @@ int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *adapter)
670 else 670 else
671 num_msix += adapter->drv_tx_rings; 671 num_msix += adapter->drv_tx_rings;
672 672
673 if (adapter->drv_rss_rings > 0) 673 if (adapter->drv_rss_rings > 0)
674 num_msix += adapter->drv_rss_rings; 674 num_msix += adapter->drv_rss_rings;
675 else 675 else
676 num_msix += adapter->drv_sds_rings; 676 num_msix += adapter->drv_sds_rings;
@@ -686,19 +686,15 @@ int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *adapter)
686 return -ENOMEM; 686 return -ENOMEM;
687 } 687 }
688 688
689restore:
690 for (vector = 0; vector < num_msix; vector++) 689 for (vector = 0; vector < num_msix; vector++)
691 adapter->msix_entries[vector].entry = vector; 690 adapter->msix_entries[vector].entry = vector;
692 691
692restore:
693 err = pci_enable_msix(pdev, adapter->msix_entries, num_msix); 693 err = pci_enable_msix(pdev, adapter->msix_entries, num_msix);
694 if (err == 0) { 694 if (err > 0) {
695 adapter->ahw->num_msix = num_msix; 695 if (!adapter->drv_tss_rings && !adapter->drv_rss_rings)
696 if (adapter->drv_tss_rings > 0) 696 return -ENOSPC;
697 adapter->drv_tx_rings = adapter->drv_tss_rings;
698 697
699 if (adapter->drv_rss_rings > 0)
700 adapter->drv_sds_rings = adapter->drv_rss_rings;
701 } else {
702 netdev_info(adapter->netdev, 698 netdev_info(adapter->netdev,
703 "Unable to allocate %d MSI-X vectors, Available vectors %d\n", 699 "Unable to allocate %d MSI-X vectors, Available vectors %d\n",
704 num_msix, err); 700 num_msix, err);
@@ -716,12 +712,20 @@ restore:
716 "Restoring %d Tx, %d SDS rings for total %d vectors.\n", 712 "Restoring %d Tx, %d SDS rings for total %d vectors.\n",
717 adapter->drv_tx_rings, adapter->drv_sds_rings, 713 adapter->drv_tx_rings, adapter->drv_sds_rings,
718 num_msix); 714 num_msix);
719 goto restore;
720 715
721 err = -EIO; 716 goto restore;
717 } else if (err < 0) {
718 return err;
722 } 719 }
723 720
724 return err; 721 adapter->ahw->num_msix = num_msix;
722 if (adapter->drv_tss_rings > 0)
723 adapter->drv_tx_rings = adapter->drv_tss_rings;
724
725 if (adapter->drv_rss_rings > 0)
726 adapter->drv_sds_rings = adapter->drv_rss_rings;
727
728 return 0;
725} 729}
726 730
727int qlcnic_enable_msix(struct qlcnic_adapter *adapter, u32 num_msix) 731int qlcnic_enable_msix(struct qlcnic_adapter *adapter, u32 num_msix)
@@ -2370,6 +2374,14 @@ void qlcnic_set_drv_version(struct qlcnic_adapter *adapter)
2370 qlcnic_fw_cmd_set_drv_version(adapter, fw_cmd); 2374 qlcnic_fw_cmd_set_drv_version(adapter, fw_cmd);
2371} 2375}
2372 2376
2377/* Reset firmware API lock */
2378static void qlcnic_reset_api_lock(struct qlcnic_adapter *adapter)
2379{
2380 qlcnic_api_lock(adapter);
2381 qlcnic_api_unlock(adapter);
2382}
2383
2384
2373static int 2385static int
2374qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2386qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2375{ 2387{
@@ -2472,6 +2484,7 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2472 if (qlcnic_82xx_check(adapter)) { 2484 if (qlcnic_82xx_check(adapter)) {
2473 qlcnic_check_vf(adapter, ent); 2485 qlcnic_check_vf(adapter, ent);
2474 adapter->portnum = adapter->ahw->pci_func; 2486 adapter->portnum = adapter->ahw->pci_func;
2487 qlcnic_reset_api_lock(adapter);
2475 err = qlcnic_start_firmware(adapter); 2488 err = qlcnic_start_firmware(adapter);
2476 if (err) { 2489 if (err) {
2477 dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n" 2490 dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n"
@@ -2528,8 +2541,6 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2528 goto err_out_free_hw; 2541 goto err_out_free_hw;
2529 } 2542 }
2530 2543
2531 qlcnic_dcb_enable(adapter->dcb);
2532
2533 if (qlcnic_read_mac_addr(adapter)) 2544 if (qlcnic_read_mac_addr(adapter))
2534 dev_warn(&pdev->dev, "failed to read mac addr\n"); 2545 dev_warn(&pdev->dev, "failed to read mac addr\n");
2535 2546
@@ -2549,7 +2560,10 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2549 "Device does not support MSI interrupts\n"); 2560 "Device does not support MSI interrupts\n");
2550 2561
2551 if (qlcnic_82xx_check(adapter)) { 2562 if (qlcnic_82xx_check(adapter)) {
2563 qlcnic_dcb_enable(adapter->dcb);
2564 qlcnic_dcb_get_info(adapter->dcb);
2552 err = qlcnic_setup_intr(adapter); 2565 err = qlcnic_setup_intr(adapter);
2566
2553 if (err) { 2567 if (err) {
2554 dev_err(&pdev->dev, "Failed to setup interrupt\n"); 2568 dev_err(&pdev->dev, "Failed to setup interrupt\n");
2555 goto err_out_disable_msi; 2569 goto err_out_disable_msi;
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
index 0638c1810d54..6afe9c1f5ab9 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
@@ -1370,7 +1370,7 @@ static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1370 1370
1371 rsp = qlcnic_sriov_alloc_bc_trans(&trans); 1371 rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1372 if (rsp) 1372 if (rsp)
1373 return rsp; 1373 goto free_cmd;
1374 1374
1375 rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND); 1375 rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1376 if (rsp) 1376 if (rsp)
@@ -1425,6 +1425,13 @@ err_out:
1425 1425
1426cleanup_transaction: 1426cleanup_transaction:
1427 qlcnic_sriov_cleanup_transaction(trans); 1427 qlcnic_sriov_cleanup_transaction(trans);
1428
1429free_cmd:
1430 if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1431 qlcnic_free_mbx_args(cmd);
1432 kfree(cmd);
1433 }
1434
1428 return rsp; 1435 return rsp;
1429} 1436}
1430 1437
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c
index 14f748cbf0de..280137991544 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c
@@ -461,6 +461,16 @@ static int qlcnic_pci_sriov_disable(struct qlcnic_adapter *adapter)
461{ 461{
462 struct net_device *netdev = adapter->netdev; 462 struct net_device *netdev = adapter->netdev;
463 463
464 if (pci_vfs_assigned(adapter->pdev)) {
465 netdev_err(adapter->netdev,
466 "SR-IOV VFs belonging to port %d are assigned to VMs. SR-IOV can not be disabled on this port\n",
467 adapter->portnum);
468 netdev_info(adapter->netdev,
469 "Please detach SR-IOV VFs belonging to port %d from VMs, and then try to disable SR-IOV on this port\n",
470 adapter->portnum);
471 return -EPERM;
472 }
473
464 rtnl_lock(); 474 rtnl_lock();
465 if (netif_running(netdev)) 475 if (netif_running(netdev))
466 __qlcnic_down(adapter, netdev); 476 __qlcnic_down(adapter, netdev);
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
index 448d156c3d08..cd346e27f2e1 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
@@ -354,7 +354,7 @@ int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
354{ 354{
355 int i; 355 int i;
356 356
357 for (i = 0; i < adapter->ahw->max_vnic_func; i++) { 357 for (i = 0; i < adapter->ahw->total_nic_func; i++) {
358 if (adapter->npars[i].pci_func == pci_func) 358 if (adapter->npars[i].pci_func == pci_func)
359 return i; 359 return i;
360 } 360 }
@@ -720,6 +720,7 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,
720 struct qlcnic_adapter *adapter = dev_get_drvdata(dev); 720 struct qlcnic_adapter *adapter = dev_get_drvdata(dev);
721 struct qlcnic_npar_func_cfg *np_cfg; 721 struct qlcnic_npar_func_cfg *np_cfg;
722 struct qlcnic_info nic_info; 722 struct qlcnic_info nic_info;
723 u8 pci_func;
723 int i, ret; 724 int i, ret;
724 u32 count; 725 u32 count;
725 726
@@ -729,26 +730,28 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,
729 730
730 count = size / sizeof(struct qlcnic_npar_func_cfg); 731 count = size / sizeof(struct qlcnic_npar_func_cfg);
731 for (i = 0; i < adapter->ahw->total_nic_func; i++) { 732 for (i = 0; i < adapter->ahw->total_nic_func; i++) {
732 if (qlcnic_is_valid_nic_func(adapter, i) < 0)
733 continue;
734 if (adapter->npars[i].pci_func >= count) { 733 if (adapter->npars[i].pci_func >= count) {
735 dev_dbg(dev, "%s: Total nic functions[%d], App sent function count[%d]\n", 734 dev_dbg(dev, "%s: Total nic functions[%d], App sent function count[%d]\n",
736 __func__, adapter->ahw->total_nic_func, count); 735 __func__, adapter->ahw->total_nic_func, count);
737 continue; 736 continue;
738 } 737 }
739 ret = qlcnic_get_nic_info(adapter, &nic_info, i);
740 if (ret)
741 return ret;
742 if (!adapter->npars[i].eswitch_status) 738 if (!adapter->npars[i].eswitch_status)
743 continue; 739 continue;
744 np_cfg[i].pci_func = i; 740 pci_func = adapter->npars[i].pci_func;
745 np_cfg[i].op_mode = (u8)nic_info.op_mode; 741 if (qlcnic_is_valid_nic_func(adapter, pci_func) < 0)
746 np_cfg[i].port_num = nic_info.phys_port; 742 continue;
747 np_cfg[i].fw_capab = nic_info.capabilities; 743 ret = qlcnic_get_nic_info(adapter, &nic_info, pci_func);
748 np_cfg[i].min_bw = nic_info.min_tx_bw; 744 if (ret)
749 np_cfg[i].max_bw = nic_info.max_tx_bw; 745 return ret;
750 np_cfg[i].max_tx_queues = nic_info.max_tx_ques; 746
751 np_cfg[i].max_rx_queues = nic_info.max_rx_ques; 747 np_cfg[pci_func].pci_func = pci_func;
748 np_cfg[pci_func].op_mode = (u8)nic_info.op_mode;
749 np_cfg[pci_func].port_num = nic_info.phys_port;
750 np_cfg[pci_func].fw_capab = nic_info.capabilities;
751 np_cfg[pci_func].min_bw = nic_info.min_tx_bw;
752 np_cfg[pci_func].max_bw = nic_info.max_tx_bw;
753 np_cfg[pci_func].max_tx_queues = nic_info.max_tx_ques;
754 np_cfg[pci_func].max_rx_queues = nic_info.max_rx_ques;
752 } 755 }
753 return size; 756 return size;
754} 757}
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
index 6203c7d8550f..45019649bbbd 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
@@ -358,6 +358,8 @@ struct sxgbe_core_ops {
358 /* Enable disable checksum offload operations */ 358 /* Enable disable checksum offload operations */
359 void (*enable_rx_csum)(void __iomem *ioaddr); 359 void (*enable_rx_csum)(void __iomem *ioaddr);
360 void (*disable_rx_csum)(void __iomem *ioaddr); 360 void (*disable_rx_csum)(void __iomem *ioaddr);
361 void (*enable_rxqueue)(void __iomem *ioaddr, int queue_num);
362 void (*disable_rxqueue)(void __iomem *ioaddr, int queue_num);
361}; 363};
362 364
363const struct sxgbe_core_ops *sxgbe_get_core_ops(void); 365const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
index c4da7a2b002a..58c35692560e 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
@@ -165,6 +165,26 @@ static void sxgbe_core_set_speed(void __iomem *ioaddr, unsigned char speed)
165 writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG); 165 writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
166} 166}
167 167
168static void sxgbe_core_enable_rxqueue(void __iomem *ioaddr, int queue_num)
169{
170 u32 reg_val;
171
172 reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
173 reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num);
174 reg_val |= SXGBE_CORE_RXQ_ENABLE;
175 writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
176}
177
178static void sxgbe_core_disable_rxqueue(void __iomem *ioaddr, int queue_num)
179{
180 u32 reg_val;
181
182 reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
183 reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num);
184 reg_val |= SXGBE_CORE_RXQ_DISABLE;
185 writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
186}
187
168static void sxgbe_set_eee_mode(void __iomem *ioaddr) 188static void sxgbe_set_eee_mode(void __iomem *ioaddr)
169{ 189{
170 u32 ctrl; 190 u32 ctrl;
@@ -254,6 +274,8 @@ static const struct sxgbe_core_ops core_ops = {
254 .set_eee_pls = sxgbe_set_eee_pls, 274 .set_eee_pls = sxgbe_set_eee_pls,
255 .enable_rx_csum = sxgbe_enable_rx_csum, 275 .enable_rx_csum = sxgbe_enable_rx_csum,
256 .disable_rx_csum = sxgbe_disable_rx_csum, 276 .disable_rx_csum = sxgbe_disable_rx_csum,
277 .enable_rxqueue = sxgbe_core_enable_rxqueue,
278 .disable_rxqueue = sxgbe_core_disable_rxqueue,
257}; 279};
258 280
259const struct sxgbe_core_ops *sxgbe_get_core_ops(void) 281const struct sxgbe_core_ops *sxgbe_get_core_ops(void)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
index e896dbbd2e15..2686bb5b6765 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
@@ -45,10 +45,10 @@ static void sxgbe_prepare_tx_desc(struct sxgbe_tx_norm_desc *p, u8 is_fd,
45 p->tdes23.tx_rd_des23.first_desc = is_fd; 45 p->tdes23.tx_rd_des23.first_desc = is_fd;
46 p->tdes23.tx_rd_des23.buf1_size = buf1_len; 46 p->tdes23.tx_rd_des23.buf1_size = buf1_len;
47 47
48 p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.total_pkt_len = pkt_len; 48 p->tdes23.tx_rd_des23.tx_pkt_len.pkt_len.total_pkt_len = pkt_len;
49 49
50 if (cksum) 50 if (cksum)
51 p->tdes23.tx_rd_des23.tx_pkt_len.cksum_pktlen.cksum_ctl = cic_full; 51 p->tdes23.tx_rd_des23.cksum_ctl = cic_full;
52} 52}
53 53
54/* Set VLAN control information */ 54/* Set VLAN control information */
@@ -233,6 +233,12 @@ static void sxgbe_set_rx_owner(struct sxgbe_rx_norm_desc *p)
233 p->rdes23.rx_rd_des23.own_bit = 1; 233 p->rdes23.rx_rd_des23.own_bit = 1;
234} 234}
235 235
236/* Set Interrupt on completion bit */
237static void sxgbe_set_rx_int_on_com(struct sxgbe_rx_norm_desc *p)
238{
239 p->rdes23.rx_rd_des23.int_on_com = 1;
240}
241
236/* Get the receive frame size */ 242/* Get the receive frame size */
237static int sxgbe_get_rx_frame_len(struct sxgbe_rx_norm_desc *p) 243static int sxgbe_get_rx_frame_len(struct sxgbe_rx_norm_desc *p)
238{ 244{
@@ -498,6 +504,7 @@ static const struct sxgbe_desc_ops desc_ops = {
498 .init_rx_desc = sxgbe_init_rx_desc, 504 .init_rx_desc = sxgbe_init_rx_desc,
499 .get_rx_owner = sxgbe_get_rx_owner, 505 .get_rx_owner = sxgbe_get_rx_owner,
500 .set_rx_owner = sxgbe_set_rx_owner, 506 .set_rx_owner = sxgbe_set_rx_owner,
507 .set_rx_int_on_com = sxgbe_set_rx_int_on_com,
501 .get_rx_frame_len = sxgbe_get_rx_frame_len, 508 .get_rx_frame_len = sxgbe_get_rx_frame_len,
502 .get_rx_fd_status = sxgbe_get_rx_fd_status, 509 .get_rx_fd_status = sxgbe_get_rx_fd_status,
503 .get_rx_ld_status = sxgbe_get_rx_ld_status, 510 .get_rx_ld_status = sxgbe_get_rx_ld_status,
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
index 838cb9fb0ea9..18609324db72 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
@@ -39,22 +39,22 @@ struct sxgbe_tx_norm_desc {
39 u32 int_on_com:1; 39 u32 int_on_com:1;
40 /* TDES3 */ 40 /* TDES3 */
41 union { 41 union {
42 u32 tcp_payload_len:18; 42 u16 tcp_payload_len;
43 struct { 43 struct {
44 u32 total_pkt_len:15; 44 u32 total_pkt_len:15;
45 u32 reserved1:1; 45 u32 reserved1:1;
46 u32 cksum_ctl:2; 46 } pkt_len;
47 } cksum_pktlen;
48 } tx_pkt_len; 47 } tx_pkt_len;
49 48
50 u32 tse_bit:1; 49 u16 cksum_ctl:2;
51 u32 tcp_hdr_len:4; 50 u16 tse_bit:1;
52 u32 sa_insert_ctl:3; 51 u16 tcp_hdr_len:4;
53 u32 crc_pad_ctl:2; 52 u16 sa_insert_ctl:3;
54 u32 last_desc:1; 53 u16 crc_pad_ctl:2;
55 u32 first_desc:1; 54 u16 last_desc:1;
56 u32 ctxt_bit:1; 55 u16 first_desc:1;
57 u32 own_bit:1; 56 u16 ctxt_bit:1;
57 u16 own_bit:1;
58 } tx_rd_des23; 58 } tx_rd_des23;
59 59
60 /* tx write back Desc 2,3 */ 60 /* tx write back Desc 2,3 */
@@ -70,25 +70,20 @@ struct sxgbe_tx_norm_desc {
70 70
71struct sxgbe_rx_norm_desc { 71struct sxgbe_rx_norm_desc {
72 union { 72 union {
73 u32 rdes0; /* buf1 address */ 73 u64 rdes01; /* buf1 address */
74 struct { 74 union {
75 u32 out_vlan_tag:16; 75 u32 out_vlan_tag:16;
76 u32 in_vlan_tag:16; 76 u32 in_vlan_tag:16;
77 } wb_rx_des0; 77 u32 rss_hash;
78 } rd_wb_des0; 78 } rx_wb_des01;
79 79 } rdes01;
80 union {
81 u32 rdes1; /* buf2 address or buf1[63:32] */
82 u32 rss_hash; /* Write-back RX */
83 } rd_wb_des1;
84 80
85 union { 81 union {
86 /* RX Read format Desc 2,3 */ 82 /* RX Read format Desc 2,3 */
87 struct{ 83 struct{
88 /* RDES2 */ 84 /* RDES2 */
89 u32 buf2_addr; 85 u64 buf2_addr:62;
90 /* RDES3 */ 86 /* RDES3 */
91 u32 buf2_hi_addr:30;
92 u32 int_on_com:1; 87 u32 int_on_com:1;
93 u32 own_bit:1; 88 u32 own_bit:1;
94 } rx_rd_des23; 89 } rx_rd_des23;
@@ -263,6 +258,9 @@ struct sxgbe_desc_ops {
263 /* Set own bit */ 258 /* Set own bit */
264 void (*set_rx_owner)(struct sxgbe_rx_norm_desc *p); 259 void (*set_rx_owner)(struct sxgbe_rx_norm_desc *p);
265 260
261 /* Set Interrupt on completion bit */
262 void (*set_rx_int_on_com)(struct sxgbe_rx_norm_desc *p);
263
266 /* Get the receive frame size */ 264 /* Get the receive frame size */
267 int (*get_rx_frame_len)(struct sxgbe_rx_norm_desc *p); 265 int (*get_rx_frame_len)(struct sxgbe_rx_norm_desc *p);
268 266
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
index 4d989ff6c978..bb9b5b8afc5f 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
@@ -23,21 +23,8 @@
23/* DMA core initialization */ 23/* DMA core initialization */
24static int sxgbe_dma_init(void __iomem *ioaddr, int fix_burst, int burst_map) 24static int sxgbe_dma_init(void __iomem *ioaddr, int fix_burst, int burst_map)
25{ 25{
26 int retry_count = 10;
27 u32 reg_val; 26 u32 reg_val;
28 27
29 /* reset the DMA */
30 writel(SXGBE_DMA_SOFT_RESET, ioaddr + SXGBE_DMA_MODE_REG);
31 while (retry_count--) {
32 if (!(readl(ioaddr + SXGBE_DMA_MODE_REG) &
33 SXGBE_DMA_SOFT_RESET))
34 break;
35 mdelay(10);
36 }
37
38 if (retry_count < 0)
39 return -EBUSY;
40
41 reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); 28 reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG);
42 29
43 /* if fix_burst = 0, Set UNDEF = 1 of DMA_Sys_Mode Register. 30 /* if fix_burst = 0, Set UNDEF = 1 of DMA_Sys_Mode Register.
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
index 27e8c824b204..82a9a983869f 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
@@ -1076,6 +1076,9 @@ static int sxgbe_open(struct net_device *dev)
1076 1076
1077 /* Initialize the MAC Core */ 1077 /* Initialize the MAC Core */
1078 priv->hw->mac->core_init(priv->ioaddr); 1078 priv->hw->mac->core_init(priv->ioaddr);
1079 SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) {
1080 priv->hw->mac->enable_rxqueue(priv->ioaddr, queue_num);
1081 }
1079 1082
1080 /* Request the IRQ lines */ 1083 /* Request the IRQ lines */
1081 ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt, 1084 ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt,
@@ -1453,6 +1456,7 @@ static void sxgbe_rx_refill(struct sxgbe_priv_data *priv)
1453 /* Added memory barrier for RX descriptor modification */ 1456 /* Added memory barrier for RX descriptor modification */
1454 wmb(); 1457 wmb();
1455 priv->hw->desc->set_rx_owner(p); 1458 priv->hw->desc->set_rx_owner(p);
1459 priv->hw->desc->set_rx_int_on_com(p);
1456 /* Added memory barrier for RX descriptor modification */ 1460 /* Added memory barrier for RX descriptor modification */
1457 wmb(); 1461 wmb();
1458 } 1462 }
@@ -2070,6 +2074,24 @@ static int sxgbe_hw_init(struct sxgbe_priv_data * const priv)
2070 return 0; 2074 return 0;
2071} 2075}
2072 2076
2077static int sxgbe_sw_reset(void __iomem *addr)
2078{
2079 int retry_count = 10;
2080
2081 writel(SXGBE_DMA_SOFT_RESET, addr + SXGBE_DMA_MODE_REG);
2082 while (retry_count--) {
2083 if (!(readl(addr + SXGBE_DMA_MODE_REG) &
2084 SXGBE_DMA_SOFT_RESET))
2085 break;
2086 mdelay(10);
2087 }
2088
2089 if (retry_count < 0)
2090 return -EBUSY;
2091
2092 return 0;
2093}
2094
2073/** 2095/**
2074 * sxgbe_drv_probe 2096 * sxgbe_drv_probe
2075 * @device: device pointer 2097 * @device: device pointer
@@ -2102,6 +2124,10 @@ struct sxgbe_priv_data *sxgbe_drv_probe(struct device *device,
2102 priv->plat = plat_dat; 2124 priv->plat = plat_dat;
2103 priv->ioaddr = addr; 2125 priv->ioaddr = addr;
2104 2126
2127 ret = sxgbe_sw_reset(priv->ioaddr);
2128 if (ret)
2129 goto error_free_netdev;
2130
2105 /* Verify driver arguments */ 2131 /* Verify driver arguments */
2106 sxgbe_verify_args(); 2132 sxgbe_verify_args();
2107 2133
@@ -2218,9 +2244,14 @@ error_free_netdev:
2218int sxgbe_drv_remove(struct net_device *ndev) 2244int sxgbe_drv_remove(struct net_device *ndev)
2219{ 2245{
2220 struct sxgbe_priv_data *priv = netdev_priv(ndev); 2246 struct sxgbe_priv_data *priv = netdev_priv(ndev);
2247 u8 queue_num;
2221 2248
2222 netdev_info(ndev, "%s: removing driver\n", __func__); 2249 netdev_info(ndev, "%s: removing driver\n", __func__);
2223 2250
2251 SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) {
2252 priv->hw->mac->disable_rxqueue(priv->ioaddr, queue_num);
2253 }
2254
2224 priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES); 2255 priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES);
2225 priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES); 2256 priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES);
2226 2257
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
index 01af2cbb479d..43ccb4a6de15 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
@@ -27,7 +27,7 @@
27#define SXGBE_SMA_PREAD_CMD 0x02 /* post read increament address */ 27#define SXGBE_SMA_PREAD_CMD 0x02 /* post read increament address */
28#define SXGBE_SMA_READ_CMD 0x03 /* read command */ 28#define SXGBE_SMA_READ_CMD 0x03 /* read command */
29#define SXGBE_SMA_SKIP_ADDRFRM 0x00040000 /* skip the address frame */ 29#define SXGBE_SMA_SKIP_ADDRFRM 0x00040000 /* skip the address frame */
30#define SXGBE_MII_BUSY 0x00800000 /* mii busy */ 30#define SXGBE_MII_BUSY 0x00400000 /* mii busy */
31 31
32static int sxgbe_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_data) 32static int sxgbe_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_data)
33{ 33{
@@ -147,6 +147,7 @@ int sxgbe_mdio_register(struct net_device *ndev)
147 struct sxgbe_mdio_bus_data *mdio_data = priv->plat->mdio_bus_data; 147 struct sxgbe_mdio_bus_data *mdio_data = priv->plat->mdio_bus_data;
148 int err, phy_addr; 148 int err, phy_addr;
149 int *irqlist; 149 int *irqlist;
150 bool phy_found = false;
150 bool act; 151 bool act;
151 152
152 /* allocate the new mdio bus */ 153 /* allocate the new mdio bus */
@@ -162,7 +163,7 @@ int sxgbe_mdio_register(struct net_device *ndev)
162 irqlist = priv->mii_irq; 163 irqlist = priv->mii_irq;
163 164
164 /* assign mii bus fields */ 165 /* assign mii bus fields */
165 mdio_bus->name = "samsxgbe"; 166 mdio_bus->name = "sxgbe";
166 mdio_bus->read = &sxgbe_mdio_read; 167 mdio_bus->read = &sxgbe_mdio_read;
167 mdio_bus->write = &sxgbe_mdio_write; 168 mdio_bus->write = &sxgbe_mdio_write;
168 snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "%s-%x", 169 snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "%s-%x",
@@ -216,13 +217,22 @@ int sxgbe_mdio_register(struct net_device *ndev)
216 netdev_info(ndev, "PHY ID %08x at %d IRQ %s (%s)%s\n", 217 netdev_info(ndev, "PHY ID %08x at %d IRQ %s (%s)%s\n",
217 phy->phy_id, phy_addr, irq_str, 218 phy->phy_id, phy_addr, irq_str,
218 dev_name(&phy->dev), act ? " active" : ""); 219 dev_name(&phy->dev), act ? " active" : "");
220 phy_found = true;
219 } 221 }
220 } 222 }
221 223
224 if (!phy_found) {
225 netdev_err(ndev, "PHY not found\n");
226 goto phyfound_err;
227 }
228
222 priv->mii = mdio_bus; 229 priv->mii = mdio_bus;
223 230
224 return 0; 231 return 0;
225 232
233phyfound_err:
234 err = -ENODEV;
235 mdiobus_unregister(mdio_bus);
226mdiobus_err: 236mdiobus_err:
227 mdiobus_free(mdio_bus); 237 mdiobus_free(mdio_bus);
228 return err; 238 return err;
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h b/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h
index 5a89acb4c505..56f8bf5a3f1b 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h
@@ -52,6 +52,10 @@
52#define SXGBE_CORE_RX_CTL2_REG 0x00A8 52#define SXGBE_CORE_RX_CTL2_REG 0x00A8
53#define SXGBE_CORE_RX_CTL3_REG 0x00AC 53#define SXGBE_CORE_RX_CTL3_REG 0x00AC
54 54
55#define SXGBE_CORE_RXQ_ENABLE_MASK 0x0003
56#define SXGBE_CORE_RXQ_ENABLE 0x0002
57#define SXGBE_CORE_RXQ_DISABLE 0x0000
58
55/* Interrupt Registers */ 59/* Interrupt Registers */
56#define SXGBE_CORE_INT_STATUS_REG 0x00B0 60#define SXGBE_CORE_INT_STATUS_REG 0x00B0
57#define SXGBE_CORE_INT_ENABLE_REG 0x00B4 61#define SXGBE_CORE_INT_ENABLE_REG 0x00B4
diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c
index 21c20ea0dad0..b5ed30a39144 100644
--- a/drivers/net/ethernet/sfc/ef10.c
+++ b/drivers/net/ethernet/sfc/ef10.c
@@ -738,8 +738,11 @@ static int efx_ef10_reset(struct efx_nic *efx, enum reset_type reset_type)
738 /* If it was a port reset, trigger reallocation of MC resources. 738 /* If it was a port reset, trigger reallocation of MC resources.
739 * Note that on an MC reset nothing needs to be done now because we'll 739 * Note that on an MC reset nothing needs to be done now because we'll
740 * detect the MC reset later and handle it then. 740 * detect the MC reset later and handle it then.
741 * For an FLR, we never get an MC reset event, but the MC has reset all
742 * resources assigned to us, so we have to trigger reallocation now.
741 */ 743 */
742 if (reset_type == RESET_TYPE_ALL && !rc) 744 if ((reset_type == RESET_TYPE_ALL ||
745 reset_type == RESET_TYPE_MCDI_TIMEOUT) && !rc)
743 efx_ef10_reset_mc_allocations(efx); 746 efx_ef10_reset_mc_allocations(efx);
744 return rc; 747 return rc;
745} 748}
@@ -2141,6 +2144,11 @@ static int efx_ef10_fini_dmaq(struct efx_nic *efx)
2141 return 0; 2144 return 0;
2142} 2145}
2143 2146
2147static void efx_ef10_prepare_flr(struct efx_nic *efx)
2148{
2149 atomic_set(&efx->active_queues, 0);
2150}
2151
2144static bool efx_ef10_filter_equal(const struct efx_filter_spec *left, 2152static bool efx_ef10_filter_equal(const struct efx_filter_spec *left,
2145 const struct efx_filter_spec *right) 2153 const struct efx_filter_spec *right)
2146{ 2154{
@@ -3603,6 +3611,8 @@ const struct efx_nic_type efx_hunt_a0_nic_type = {
3603 .probe_port = efx_mcdi_port_probe, 3611 .probe_port = efx_mcdi_port_probe,
3604 .remove_port = efx_mcdi_port_remove, 3612 .remove_port = efx_mcdi_port_remove,
3605 .fini_dmaq = efx_ef10_fini_dmaq, 3613 .fini_dmaq = efx_ef10_fini_dmaq,
3614 .prepare_flr = efx_ef10_prepare_flr,
3615 .finish_flr = efx_port_dummy_op_void,
3606 .describe_stats = efx_ef10_describe_stats, 3616 .describe_stats = efx_ef10_describe_stats,
3607 .update_stats = efx_ef10_update_stats, 3617 .update_stats = efx_ef10_update_stats,
3608 .start_stats = efx_mcdi_mac_start_stats, 3618 .start_stats = efx_mcdi_mac_start_stats,
diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c
index 57b971e5e6b2..63d595fd3cc5 100644
--- a/drivers/net/ethernet/sfc/efx.c
+++ b/drivers/net/ethernet/sfc/efx.c
@@ -76,6 +76,7 @@ const char *const efx_reset_type_names[] = {
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD", 77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_MC_BIST] = "MC_BIST",
79 [RESET_TYPE_DISABLE] = "DISABLE", 80 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
@@ -83,7 +84,7 @@ const char *const efx_reset_type_names[] = {
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 84 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 85 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 86 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 [RESET_TYPE_MC_BIST] = "MC_BIST", 87 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
87}; 88};
88 89
89/* Reset workqueue. If any NIC has a hardware failure then a reset will be 90/* Reset workqueue. If any NIC has a hardware failure then a reset will be
@@ -1739,7 +1740,8 @@ static void efx_start_all(struct efx_nic *efx)
1739 1740
1740 /* Check that it is appropriate to restart the interface. All 1741 /* Check that it is appropriate to restart the interface. All
1741 * of these flags are safe to read under just the rtnl lock */ 1742 * of these flags are safe to read under just the rtnl lock */
1742 if (efx->port_enabled || !netif_running(efx->net_dev)) 1743 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1744 efx->reset_pending)
1743 return; 1745 return;
1744 1746
1745 efx_start_port(efx); 1747 efx_start_port(efx);
@@ -2334,6 +2336,9 @@ void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2334{ 2336{
2335 EFX_ASSERT_RESET_SERIALISED(efx); 2337 EFX_ASSERT_RESET_SERIALISED(efx);
2336 2338
2339 if (method == RESET_TYPE_MCDI_TIMEOUT)
2340 efx->type->prepare_flr(efx);
2341
2337 efx_stop_all(efx); 2342 efx_stop_all(efx);
2338 efx_disable_interrupts(efx); 2343 efx_disable_interrupts(efx);
2339 2344
@@ -2354,6 +2359,10 @@ int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2354 2359
2355 EFX_ASSERT_RESET_SERIALISED(efx); 2360 EFX_ASSERT_RESET_SERIALISED(efx);
2356 2361
2362 if (method == RESET_TYPE_MCDI_TIMEOUT)
2363 efx->type->finish_flr(efx);
2364
2365 /* Ensure that SRAM is initialised even if we're disabling the device */
2357 rc = efx->type->init(efx); 2366 rc = efx->type->init(efx);
2358 if (rc) { 2367 if (rc) {
2359 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2368 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
@@ -2417,7 +2426,10 @@ int efx_reset(struct efx_nic *efx, enum reset_type method)
2417 /* Clear flags for the scopes we covered. We assume the NIC and 2426 /* Clear flags for the scopes we covered. We assume the NIC and
2418 * driver are now quiescent so that there is no race here. 2427 * driver are now quiescent so that there is no race here.
2419 */ 2428 */
2420 efx->reset_pending &= -(1 << (method + 1)); 2429 if (method < RESET_TYPE_MAX_METHOD)
2430 efx->reset_pending &= -(1 << (method + 1));
2431 else /* it doesn't fit into the well-ordered scope hierarchy */
2432 __clear_bit(method, &efx->reset_pending);
2421 2433
2422 /* Reinitialise bus-mastering, which may have been turned off before 2434 /* Reinitialise bus-mastering, which may have been turned off before
2423 * the reset was scheduled. This is still appropriate, even in the 2435 * the reset was scheduled. This is still appropriate, even in the
@@ -2546,6 +2558,7 @@ void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2546 case RESET_TYPE_DISABLE: 2558 case RESET_TYPE_DISABLE:
2547 case RESET_TYPE_RECOVER_OR_DISABLE: 2559 case RESET_TYPE_RECOVER_OR_DISABLE:
2548 case RESET_TYPE_MC_BIST: 2560 case RESET_TYPE_MC_BIST:
2561 case RESET_TYPE_MCDI_TIMEOUT:
2549 method = type; 2562 method = type;
2550 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2563 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2551 RESET_TYPE(method)); 2564 RESET_TYPE(method));
diff --git a/drivers/net/ethernet/sfc/enum.h b/drivers/net/ethernet/sfc/enum.h
index 75ef7ef6450b..d1dbb5fb31bb 100644
--- a/drivers/net/ethernet/sfc/enum.h
+++ b/drivers/net/ethernet/sfc/enum.h
@@ -143,6 +143,7 @@ enum efx_loopback_mode {
143 * @RESET_TYPE_WORLD: Reset as much as possible 143 * @RESET_TYPE_WORLD: Reset as much as possible
144 * @RESET_TYPE_RECOVER_OR_DISABLE: Try to recover. Apply RESET_TYPE_DISABLE if 144 * @RESET_TYPE_RECOVER_OR_DISABLE: Try to recover. Apply RESET_TYPE_DISABLE if
145 * unsuccessful. 145 * unsuccessful.
146 * @RESET_TYPE_MC_BIST: MC entering BIST mode.
146 * @RESET_TYPE_DISABLE: Reset datapath, MAC and PHY; leave NIC disabled 147 * @RESET_TYPE_DISABLE: Reset datapath, MAC and PHY; leave NIC disabled
147 * @RESET_TYPE_TX_WATCHDOG: reset due to TX watchdog 148 * @RESET_TYPE_TX_WATCHDOG: reset due to TX watchdog
148 * @RESET_TYPE_INT_ERROR: reset due to internal error 149 * @RESET_TYPE_INT_ERROR: reset due to internal error
@@ -150,14 +151,16 @@ enum efx_loopback_mode {
150 * @RESET_TYPE_DMA_ERROR: DMA error 151 * @RESET_TYPE_DMA_ERROR: DMA error
151 * @RESET_TYPE_TX_SKIP: hardware completed empty tx descriptors 152 * @RESET_TYPE_TX_SKIP: hardware completed empty tx descriptors
152 * @RESET_TYPE_MC_FAILURE: MC reboot/assertion 153 * @RESET_TYPE_MC_FAILURE: MC reboot/assertion
154 * @RESET_TYPE_MCDI_TIMEOUT: MCDI timeout.
153 */ 155 */
154enum reset_type { 156enum reset_type {
155 RESET_TYPE_INVISIBLE = 0, 157 RESET_TYPE_INVISIBLE,
156 RESET_TYPE_RECOVER_OR_ALL = 1, 158 RESET_TYPE_RECOVER_OR_ALL,
157 RESET_TYPE_ALL = 2, 159 RESET_TYPE_ALL,
158 RESET_TYPE_WORLD = 3, 160 RESET_TYPE_WORLD,
159 RESET_TYPE_RECOVER_OR_DISABLE = 4, 161 RESET_TYPE_RECOVER_OR_DISABLE,
160 RESET_TYPE_DISABLE = 5, 162 RESET_TYPE_MC_BIST,
163 RESET_TYPE_DISABLE,
161 RESET_TYPE_MAX_METHOD, 164 RESET_TYPE_MAX_METHOD,
162 RESET_TYPE_TX_WATCHDOG, 165 RESET_TYPE_TX_WATCHDOG,
163 RESET_TYPE_INT_ERROR, 166 RESET_TYPE_INT_ERROR,
@@ -165,7 +168,13 @@ enum reset_type {
165 RESET_TYPE_DMA_ERROR, 168 RESET_TYPE_DMA_ERROR,
166 RESET_TYPE_TX_SKIP, 169 RESET_TYPE_TX_SKIP,
167 RESET_TYPE_MC_FAILURE, 170 RESET_TYPE_MC_FAILURE,
168 RESET_TYPE_MC_BIST, 171 /* RESET_TYPE_MCDI_TIMEOUT is actually a method, not just a reason, but
172 * it doesn't fit the scope hierarchy (not well-ordered by inclusion).
173 * We encode this by having its enum value be greater than
174 * RESET_TYPE_MAX_METHOD. This also prevents issuing it with
175 * efx_ioctl_reset.
176 */
177 RESET_TYPE_MCDI_TIMEOUT,
169 RESET_TYPE_MAX, 178 RESET_TYPE_MAX,
170}; 179};
171 180
diff --git a/drivers/net/ethernet/sfc/falcon.c b/drivers/net/ethernet/sfc/falcon.c
index 8ec20b713cc6..fae25a418647 100644
--- a/drivers/net/ethernet/sfc/falcon.c
+++ b/drivers/net/ethernet/sfc/falcon.c
@@ -2696,6 +2696,8 @@ const struct efx_nic_type falcon_a1_nic_type = {
2696 .fini_dmaq = efx_farch_fini_dmaq, 2696 .fini_dmaq = efx_farch_fini_dmaq,
2697 .prepare_flush = falcon_prepare_flush, 2697 .prepare_flush = falcon_prepare_flush,
2698 .finish_flush = efx_port_dummy_op_void, 2698 .finish_flush = efx_port_dummy_op_void,
2699 .prepare_flr = efx_port_dummy_op_void,
2700 .finish_flr = efx_farch_finish_flr,
2699 .describe_stats = falcon_describe_nic_stats, 2701 .describe_stats = falcon_describe_nic_stats,
2700 .update_stats = falcon_update_nic_stats, 2702 .update_stats = falcon_update_nic_stats,
2701 .start_stats = falcon_start_nic_stats, 2703 .start_stats = falcon_start_nic_stats,
@@ -2790,6 +2792,8 @@ const struct efx_nic_type falcon_b0_nic_type = {
2790 .fini_dmaq = efx_farch_fini_dmaq, 2792 .fini_dmaq = efx_farch_fini_dmaq,
2791 .prepare_flush = falcon_prepare_flush, 2793 .prepare_flush = falcon_prepare_flush,
2792 .finish_flush = efx_port_dummy_op_void, 2794 .finish_flush = efx_port_dummy_op_void,
2795 .prepare_flr = efx_port_dummy_op_void,
2796 .finish_flr = efx_farch_finish_flr,
2793 .describe_stats = falcon_describe_nic_stats, 2797 .describe_stats = falcon_describe_nic_stats,
2794 .update_stats = falcon_update_nic_stats, 2798 .update_stats = falcon_update_nic_stats,
2795 .start_stats = falcon_start_nic_stats, 2799 .start_stats = falcon_start_nic_stats,
diff --git a/drivers/net/ethernet/sfc/farch.c b/drivers/net/ethernet/sfc/farch.c
index a08761360cdf..0537381cd2f6 100644
--- a/drivers/net/ethernet/sfc/farch.c
+++ b/drivers/net/ethernet/sfc/farch.c
@@ -741,6 +741,28 @@ int efx_farch_fini_dmaq(struct efx_nic *efx)
741 return rc; 741 return rc;
742} 742}
743 743
744/* Reset queue and flush accounting after FLR
745 *
746 * One possible cause of FLR recovery is that DMA may be failing (eg. if bus
747 * mastering was disabled), in which case we don't receive (RXQ) flush
748 * completion events. This means that efx->rxq_flush_outstanding remained at 4
749 * after the FLR; also, efx->active_queues was non-zero (as no flush completion
750 * events were received, and we didn't go through efx_check_tx_flush_complete())
751 * If we don't fix this up, on the next call to efx_realloc_channels() we won't
752 * flush any RX queues because efx->rxq_flush_outstanding is at the limit of 4
753 * for batched flush requests; and the efx->active_queues gets messed up because
754 * we keep incrementing for the newly initialised queues, but it never went to
755 * zero previously. Then we get a timeout every time we try to restart the
756 * queues, as it doesn't go back to zero when we should be flushing the queues.
757 */
758void efx_farch_finish_flr(struct efx_nic *efx)
759{
760 atomic_set(&efx->rxq_flush_pending, 0);
761 atomic_set(&efx->rxq_flush_outstanding, 0);
762 atomic_set(&efx->active_queues, 0);
763}
764
765
744/************************************************************************** 766/**************************************************************************
745 * 767 *
746 * Event queue processing 768 * Event queue processing
diff --git a/drivers/net/ethernet/sfc/mcdi.c b/drivers/net/ethernet/sfc/mcdi.c
index 7bd4b14bf3b3..5239cf9bdc56 100644
--- a/drivers/net/ethernet/sfc/mcdi.c
+++ b/drivers/net/ethernet/sfc/mcdi.c
@@ -52,12 +52,7 @@ static void efx_mcdi_timeout_async(unsigned long context);
52static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 52static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
53 bool *was_attached_out); 53 bool *was_attached_out);
54static bool efx_mcdi_poll_once(struct efx_nic *efx); 54static bool efx_mcdi_poll_once(struct efx_nic *efx);
55 55static void efx_mcdi_abandon(struct efx_nic *efx);
56static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
57{
58 EFX_BUG_ON_PARANOID(!efx->mcdi);
59 return &efx->mcdi->iface;
60}
61 56
62int efx_mcdi_init(struct efx_nic *efx) 57int efx_mcdi_init(struct efx_nic *efx)
63{ 58{
@@ -558,6 +553,8 @@ static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
558 rc = 0; 553 rc = 0;
559 } 554 }
560 555
556 efx_mcdi_abandon(efx);
557
561 /* Close the race with efx_mcdi_ev_cpl() executing just too late 558 /* Close the race with efx_mcdi_ev_cpl() executing just too late
562 * and completing a request we've just cancelled, by ensuring 559 * and completing a request we've just cancelled, by ensuring
563 * that the seqno check therein fails. 560 * that the seqno check therein fails.
@@ -672,6 +669,9 @@ int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
672 if (efx->mc_bist_for_other_fn) 669 if (efx->mc_bist_for_other_fn)
673 return -ENETDOWN; 670 return -ENETDOWN;
674 671
672 if (mcdi->mode == MCDI_MODE_FAIL)
673 return -ENETDOWN;
674
675 efx_mcdi_acquire_sync(mcdi); 675 efx_mcdi_acquire_sync(mcdi);
676 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 676 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
677 return 0; 677 return 0;
@@ -812,7 +812,11 @@ void efx_mcdi_mode_poll(struct efx_nic *efx)
812 return; 812 return;
813 813
814 mcdi = efx_mcdi(efx); 814 mcdi = efx_mcdi(efx);
815 if (mcdi->mode == MCDI_MODE_POLL) 815 /* If already in polling mode, nothing to do.
816 * If in fail-fast state, don't switch to polled completion.
817 * FLR recovery will do that later.
818 */
819 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
816 return; 820 return;
817 821
818 /* We can switch from event completion to polled completion, because 822 /* We can switch from event completion to polled completion, because
@@ -841,8 +845,8 @@ void efx_mcdi_flush_async(struct efx_nic *efx)
841 845
842 mcdi = efx_mcdi(efx); 846 mcdi = efx_mcdi(efx);
843 847
844 /* We must be in polling mode so no more requests can be queued */ 848 /* We must be in poll or fail mode so no more requests can be queued */
845 BUG_ON(mcdi->mode != MCDI_MODE_POLL); 849 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
846 850
847 del_timer_sync(&mcdi->async_timer); 851 del_timer_sync(&mcdi->async_timer);
848 852
@@ -875,8 +879,11 @@ void efx_mcdi_mode_event(struct efx_nic *efx)
875 return; 879 return;
876 880
877 mcdi = efx_mcdi(efx); 881 mcdi = efx_mcdi(efx);
878 882 /* If already in event completion mode, nothing to do.
879 if (mcdi->mode == MCDI_MODE_EVENTS) 883 * If in fail-fast state, don't switch to event completion. FLR
884 * recovery will do that later.
885 */
886 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
880 return; 887 return;
881 888
882 /* We can't switch from polled to event completion in the middle of a 889 /* We can't switch from polled to event completion in the middle of a
@@ -966,6 +973,19 @@ static void efx_mcdi_ev_bist(struct efx_nic *efx)
966 spin_unlock(&mcdi->iface_lock); 973 spin_unlock(&mcdi->iface_lock);
967} 974}
968 975
976/* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
977 * to recover.
978 */
979static void efx_mcdi_abandon(struct efx_nic *efx)
980{
981 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
982
983 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
984 return; /* it had already been done */
985 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
986 efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
987}
988
969/* Called from falcon_process_eventq for MCDI events */ 989/* Called from falcon_process_eventq for MCDI events */
970void efx_mcdi_process_event(struct efx_channel *channel, 990void efx_mcdi_process_event(struct efx_channel *channel,
971 efx_qword_t *event) 991 efx_qword_t *event)
@@ -1512,6 +1532,19 @@ int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1512{ 1532{
1513 int rc; 1533 int rc;
1514 1534
1535 /* If MCDI is down, we can't handle_assertion */
1536 if (method == RESET_TYPE_MCDI_TIMEOUT) {
1537 rc = pci_reset_function(efx->pci_dev);
1538 if (rc)
1539 return rc;
1540 /* Re-enable polled MCDI completion */
1541 if (efx->mcdi) {
1542 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1543 mcdi->mode = MCDI_MODE_POLL;
1544 }
1545 return 0;
1546 }
1547
1515 /* Recover from a failed assertion pre-reset */ 1548 /* Recover from a failed assertion pre-reset */
1516 rc = efx_mcdi_handle_assertion(efx); 1549 rc = efx_mcdi_handle_assertion(efx);
1517 if (rc) 1550 if (rc)
diff --git a/drivers/net/ethernet/sfc/mcdi.h b/drivers/net/ethernet/sfc/mcdi.h
index 52931aebf3c3..56465f7465a2 100644
--- a/drivers/net/ethernet/sfc/mcdi.h
+++ b/drivers/net/ethernet/sfc/mcdi.h
@@ -28,9 +28,16 @@ enum efx_mcdi_state {
28 MCDI_STATE_COMPLETED, 28 MCDI_STATE_COMPLETED,
29}; 29};
30 30
31/**
32 * enum efx_mcdi_mode - MCDI transaction mode
33 * @MCDI_MODE_POLL: poll for MCDI completion, until timeout
34 * @MCDI_MODE_EVENTS: wait for an mcdi_event. On timeout, poll once
35 * @MCDI_MODE_FAIL: we think MCDI is dead, so fail-fast all calls
36 */
31enum efx_mcdi_mode { 37enum efx_mcdi_mode {
32 MCDI_MODE_POLL, 38 MCDI_MODE_POLL,
33 MCDI_MODE_EVENTS, 39 MCDI_MODE_EVENTS,
40 MCDI_MODE_FAIL,
34}; 41};
35 42
36/** 43/**
@@ -104,6 +111,12 @@ struct efx_mcdi_data {
104 u32 fn_flags; 111 u32 fn_flags;
105}; 112};
106 113
114static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
115{
116 EFX_BUG_ON_PARANOID(!efx->mcdi);
117 return &efx->mcdi->iface;
118}
119
107#ifdef CONFIG_SFC_MCDI_MON 120#ifdef CONFIG_SFC_MCDI_MON
108static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx) 121static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
109{ 122{
diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h
index 8a400a0595eb..5bdae8ed7c57 100644
--- a/drivers/net/ethernet/sfc/net_driver.h
+++ b/drivers/net/ethernet/sfc/net_driver.h
@@ -972,6 +972,8 @@ struct efx_mtd_partition {
972 * (for Falcon architecture) 972 * (for Falcon architecture)
973 * @finish_flush: Clean up after flushing the DMA queues (for Falcon 973 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
974 * architecture) 974 * architecture)
975 * @prepare_flr: Prepare for an FLR
976 * @finish_flr: Clean up after an FLR
975 * @describe_stats: Describe statistics for ethtool 977 * @describe_stats: Describe statistics for ethtool
976 * @update_stats: Update statistics not provided by event handling. 978 * @update_stats: Update statistics not provided by event handling.
977 * Either argument may be %NULL. 979 * Either argument may be %NULL.
@@ -1100,6 +1102,8 @@ struct efx_nic_type {
1100 int (*fini_dmaq)(struct efx_nic *efx); 1102 int (*fini_dmaq)(struct efx_nic *efx);
1101 void (*prepare_flush)(struct efx_nic *efx); 1103 void (*prepare_flush)(struct efx_nic *efx);
1102 void (*finish_flush)(struct efx_nic *efx); 1104 void (*finish_flush)(struct efx_nic *efx);
1105 void (*prepare_flr)(struct efx_nic *efx);
1106 void (*finish_flr)(struct efx_nic *efx);
1103 size_t (*describe_stats)(struct efx_nic *efx, u8 *names); 1107 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1104 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats, 1108 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1105 struct rtnl_link_stats64 *core_stats); 1109 struct rtnl_link_stats64 *core_stats);
diff --git a/drivers/net/ethernet/sfc/nic.h b/drivers/net/ethernet/sfc/nic.h
index a001fae1a8d7..d3ad8ed8d901 100644
--- a/drivers/net/ethernet/sfc/nic.h
+++ b/drivers/net/ethernet/sfc/nic.h
@@ -757,6 +757,7 @@ static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
757int efx_nic_flush_queues(struct efx_nic *efx); 757int efx_nic_flush_queues(struct efx_nic *efx);
758void siena_prepare_flush(struct efx_nic *efx); 758void siena_prepare_flush(struct efx_nic *efx);
759int efx_farch_fini_dmaq(struct efx_nic *efx); 759int efx_farch_fini_dmaq(struct efx_nic *efx);
760void efx_farch_finish_flr(struct efx_nic *efx);
760void siena_finish_flush(struct efx_nic *efx); 761void siena_finish_flush(struct efx_nic *efx);
761void falcon_start_nic_stats(struct efx_nic *efx); 762void falcon_start_nic_stats(struct efx_nic *efx);
762void falcon_stop_nic_stats(struct efx_nic *efx); 763void falcon_stop_nic_stats(struct efx_nic *efx);
diff --git a/drivers/net/ethernet/sfc/siena.c b/drivers/net/ethernet/sfc/siena.c
index 23f3a6f7737a..50ffefed492c 100644
--- a/drivers/net/ethernet/sfc/siena.c
+++ b/drivers/net/ethernet/sfc/siena.c
@@ -921,6 +921,8 @@ const struct efx_nic_type siena_a0_nic_type = {
921 .fini_dmaq = efx_farch_fini_dmaq, 921 .fini_dmaq = efx_farch_fini_dmaq,
922 .prepare_flush = siena_prepare_flush, 922 .prepare_flush = siena_prepare_flush,
923 .finish_flush = siena_finish_flush, 923 .finish_flush = siena_finish_flush,
924 .prepare_flr = efx_port_dummy_op_void,
925 .finish_flr = efx_farch_finish_flr,
924 .describe_stats = siena_describe_nic_stats, 926 .describe_stats = siena_describe_nic_stats,
925 .update_stats = siena_update_nic_stats, 927 .update_stats = siena_update_nic_stats,
926 .start_stats = efx_mcdi_mac_start_stats, 928 .start_stats = efx_mcdi_mac_start_stats,
diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c
index d1b4dca53a9d..bcaa41af1e62 100644
--- a/drivers/net/ethernet/smsc/smc91x.c
+++ b/drivers/net/ethernet/smsc/smc91x.c
@@ -147,18 +147,19 @@ MODULE_ALIAS("platform:smc91x");
147 */ 147 */
148#define MII_DELAY 1 148#define MII_DELAY 1
149 149
150#if SMC_DEBUG > 0 150#define DBG(n, dev, fmt, ...) \
151#define DBG(n, dev, args...) \ 151 do { \
152 do { \ 152 if (SMC_DEBUG >= (n)) \
153 if (SMC_DEBUG >= (n)) \ 153 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
154 netdev_dbg(dev, args); \
155 } while (0) 154 } while (0)
156 155
157#define PRINTK(dev, args...) netdev_info(dev, args) 156#define PRINTK(dev, fmt, ...) \
158#else 157 do { \
159#define DBG(n, dev, args...) do { } while (0) 158 if (SMC_DEBUG > 0) \
160#define PRINTK(dev, args...) netdev_dbg(dev, args) 159 netdev_info(dev, fmt, ##__VA_ARGS__); \
161#endif 160 else \
161 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
162 } while (0)
162 163
163#if SMC_DEBUG > 3 164#if SMC_DEBUG > 3
164static void PRINT_PKT(u_char *buf, int length) 165static void PRINT_PKT(u_char *buf, int length)
@@ -191,7 +192,7 @@ static void PRINT_PKT(u_char *buf, int length)
191 pr_cont("\n"); 192 pr_cont("\n");
192} 193}
193#else 194#else
194#define PRINT_PKT(x...) do { } while (0) 195static inline void PRINT_PKT(u_char *buf, int length) { }
195#endif 196#endif
196 197
197 198
@@ -1781,7 +1782,7 @@ static int smc_findirq(struct smc_local *lp)
1781 int timeout = 20; 1782 int timeout = 20;
1782 unsigned long cookie; 1783 unsigned long cookie;
1783 1784
1784 DBG(2, dev, "%s: %s\n", CARDNAME, __func__); 1785 DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1785 1786
1786 cookie = probe_irq_on(); 1787 cookie = probe_irq_on();
1787 1788
diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index 31e55fba7cad..7918d5132c1f 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -382,6 +382,10 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
382 if (skb_is_gso(skb)) 382 if (skb_is_gso(skb))
383 goto do_lso; 383 goto do_lso;
384 384
385 if ((skb->ip_summed == CHECKSUM_NONE) ||
386 (skb->ip_summed == CHECKSUM_UNNECESSARY))
387 goto do_send;
388
385 rndis_msg_size += NDIS_CSUM_PPI_SIZE; 389 rndis_msg_size += NDIS_CSUM_PPI_SIZE;
386 ppi = init_ppi_data(rndis_msg, NDIS_CSUM_PPI_SIZE, 390 ppi = init_ppi_data(rndis_msg, NDIS_CSUM_PPI_SIZE,
387 TCPIP_CHKSUM_PKTINFO); 391 TCPIP_CHKSUM_PKTINFO);
diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c
index 430bb0db9bc4..e36f194673a4 100644
--- a/drivers/net/ieee802154/at86rf230.c
+++ b/drivers/net/ieee802154/at86rf230.c
@@ -365,7 +365,7 @@ __at86rf230_read_subreg(struct at86rf230_local *lp,
365 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]); 365 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
366 366
367 if (status == 0) 367 if (status == 0)
368 *data = buf[1]; 368 *data = (buf[1] & mask) >> shift;
369 369
370 return status; 370 return status;
371} 371}
@@ -1025,14 +1025,6 @@ static int at86rf230_hw_init(struct at86rf230_local *lp)
1025 return -EINVAL; 1025 return -EINVAL;
1026 } 1026 }
1027 1027
1028 rc = at86rf230_read_subreg(lp, SR_AVDD_OK, &status);
1029 if (rc)
1030 return rc;
1031 if (!status) {
1032 dev_err(&lp->spi->dev, "AVDD error\n");
1033 return -EINVAL;
1034 }
1035
1036 return 0; 1028 return 0;
1037} 1029}
1038 1030
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index 753a8c23d15d..b0e2865a6810 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -263,11 +263,9 @@ static int macvlan_queue_xmit(struct sk_buff *skb, struct net_device *dev)
263 const struct macvlan_dev *vlan = netdev_priv(dev); 263 const struct macvlan_dev *vlan = netdev_priv(dev);
264 const struct macvlan_port *port = vlan->port; 264 const struct macvlan_port *port = vlan->port;
265 const struct macvlan_dev *dest; 265 const struct macvlan_dev *dest;
266 __u8 ip_summed = skb->ip_summed;
267 266
268 if (vlan->mode == MACVLAN_MODE_BRIDGE) { 267 if (vlan->mode == MACVLAN_MODE_BRIDGE) {
269 const struct ethhdr *eth = (void *)skb->data; 268 const struct ethhdr *eth = (void *)skb->data;
270 skb->ip_summed = CHECKSUM_UNNECESSARY;
271 269
272 /* send to other bridge ports directly */ 270 /* send to other bridge ports directly */
273 if (is_multicast_ether_addr(eth->h_dest)) { 271 if (is_multicast_ether_addr(eth->h_dest)) {
@@ -285,7 +283,6 @@ static int macvlan_queue_xmit(struct sk_buff *skb, struct net_device *dev)
285 } 283 }
286 284
287xmit_world: 285xmit_world:
288 skb->ip_summed = ip_summed;
289 skb->dev = vlan->lowerdev; 286 skb->dev = vlan->lowerdev;
290 return dev_queue_xmit(skb); 287 return dev_queue_xmit(skb);
291} 288}
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index ff111a89e17f..3381c4f91a8c 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -322,6 +322,15 @@ static rx_handler_result_t macvtap_handle_frame(struct sk_buff **pskb)
322 segs = nskb; 322 segs = nskb;
323 } 323 }
324 } else { 324 } else {
325 /* If we receive a partial checksum and the tap side
326 * doesn't support checksum offload, compute the checksum.
327 * Note: it doesn't matter which checksum feature to
328 * check, we either support them all or none.
329 */
330 if (skb->ip_summed == CHECKSUM_PARTIAL &&
331 !(features & NETIF_F_ALL_CSUM) &&
332 skb_checksum_help(skb))
333 goto drop;
325 skb_queue_tail(&q->sk.sk_receive_queue, skb); 334 skb_queue_tail(&q->sk.sk_receive_queue, skb);
326 } 335 }
327 336
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index e701433bf52f..9c4defdec67b 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -32,29 +32,39 @@
32 32
33struct mdio_gpio_info { 33struct mdio_gpio_info {
34 struct mdiobb_ctrl ctrl; 34 struct mdiobb_ctrl ctrl;
35 int mdc, mdio; 35 int mdc, mdio, mdo;
36 int mdc_active_low, mdio_active_low, mdo_active_low;
36}; 37};
37 38
38static void *mdio_gpio_of_get_data(struct platform_device *pdev) 39static void *mdio_gpio_of_get_data(struct platform_device *pdev)
39{ 40{
40 struct device_node *np = pdev->dev.of_node; 41 struct device_node *np = pdev->dev.of_node;
41 struct mdio_gpio_platform_data *pdata; 42 struct mdio_gpio_platform_data *pdata;
43 enum of_gpio_flags flags;
42 int ret; 44 int ret;
43 45
44 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 46 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
45 if (!pdata) 47 if (!pdata)
46 return NULL; 48 return NULL;
47 49
48 ret = of_get_gpio(np, 0); 50 ret = of_get_gpio_flags(np, 0, &flags);
49 if (ret < 0) 51 if (ret < 0)
50 return NULL; 52 return NULL;
51 53
52 pdata->mdc = ret; 54 pdata->mdc = ret;
55 pdata->mdc_active_low = flags & OF_GPIO_ACTIVE_LOW;
53 56
54 ret = of_get_gpio(np, 1); 57 ret = of_get_gpio_flags(np, 1, &flags);
55 if (ret < 0) 58 if (ret < 0)
56 return NULL; 59 return NULL;
57 pdata->mdio = ret; 60 pdata->mdio = ret;
61 pdata->mdio_active_low = flags & OF_GPIO_ACTIVE_LOW;
62
63 ret = of_get_gpio_flags(np, 2, &flags);
64 if (ret > 0) {
65 pdata->mdo = ret;
66 pdata->mdo_active_low = flags & OF_GPIO_ACTIVE_LOW;
67 }
58 68
59 return pdata; 69 return pdata;
60} 70}
@@ -64,8 +74,19 @@ static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
64 struct mdio_gpio_info *bitbang = 74 struct mdio_gpio_info *bitbang =
65 container_of(ctrl, struct mdio_gpio_info, ctrl); 75 container_of(ctrl, struct mdio_gpio_info, ctrl);
66 76
77 if (bitbang->mdo) {
78 /* Separate output pin. Always set its value to high
79 * when changing direction. If direction is input,
80 * assume the pin serves as pull-up. If direction is
81 * output, the default value is high.
82 */
83 gpio_set_value(bitbang->mdo, 1 ^ bitbang->mdo_active_low);
84 return;
85 }
86
67 if (dir) 87 if (dir)
68 gpio_direction_output(bitbang->mdio, 1); 88 gpio_direction_output(bitbang->mdio,
89 1 ^ bitbang->mdio_active_low);
69 else 90 else
70 gpio_direction_input(bitbang->mdio); 91 gpio_direction_input(bitbang->mdio);
71} 92}
@@ -75,7 +96,7 @@ static int mdio_get(struct mdiobb_ctrl *ctrl)
75 struct mdio_gpio_info *bitbang = 96 struct mdio_gpio_info *bitbang =
76 container_of(ctrl, struct mdio_gpio_info, ctrl); 97 container_of(ctrl, struct mdio_gpio_info, ctrl);
77 98
78 return gpio_get_value(bitbang->mdio); 99 return gpio_get_value(bitbang->mdio) ^ bitbang->mdio_active_low;
79} 100}
80 101
81static void mdio_set(struct mdiobb_ctrl *ctrl, int what) 102static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
@@ -83,7 +104,10 @@ static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
83 struct mdio_gpio_info *bitbang = 104 struct mdio_gpio_info *bitbang =
84 container_of(ctrl, struct mdio_gpio_info, ctrl); 105 container_of(ctrl, struct mdio_gpio_info, ctrl);
85 106
86 gpio_set_value(bitbang->mdio, what); 107 if (bitbang->mdo)
108 gpio_set_value(bitbang->mdo, what ^ bitbang->mdo_active_low);
109 else
110 gpio_set_value(bitbang->mdio, what ^ bitbang->mdio_active_low);
87} 111}
88 112
89static void mdc_set(struct mdiobb_ctrl *ctrl, int what) 113static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
@@ -91,7 +115,7 @@ static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
91 struct mdio_gpio_info *bitbang = 115 struct mdio_gpio_info *bitbang =
92 container_of(ctrl, struct mdio_gpio_info, ctrl); 116 container_of(ctrl, struct mdio_gpio_info, ctrl);
93 117
94 gpio_set_value(bitbang->mdc, what); 118 gpio_set_value(bitbang->mdc, what ^ bitbang->mdc_active_low);
95} 119}
96 120
97static struct mdiobb_ops mdio_gpio_ops = { 121static struct mdiobb_ops mdio_gpio_ops = {
@@ -110,18 +134,22 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
110 struct mdio_gpio_info *bitbang; 134 struct mdio_gpio_info *bitbang;
111 int i; 135 int i;
112 136
113 bitbang = kzalloc(sizeof(*bitbang), GFP_KERNEL); 137 bitbang = devm_kzalloc(dev, sizeof(*bitbang), GFP_KERNEL);
114 if (!bitbang) 138 if (!bitbang)
115 goto out; 139 goto out;
116 140
117 bitbang->ctrl.ops = &mdio_gpio_ops; 141 bitbang->ctrl.ops = &mdio_gpio_ops;
118 bitbang->ctrl.reset = pdata->reset; 142 bitbang->ctrl.reset = pdata->reset;
119 bitbang->mdc = pdata->mdc; 143 bitbang->mdc = pdata->mdc;
144 bitbang->mdc_active_low = pdata->mdc_active_low;
120 bitbang->mdio = pdata->mdio; 145 bitbang->mdio = pdata->mdio;
146 bitbang->mdio_active_low = pdata->mdio_active_low;
147 bitbang->mdo = pdata->mdo;
148 bitbang->mdo_active_low = pdata->mdo_active_low;
121 149
122 new_bus = alloc_mdio_bitbang(&bitbang->ctrl); 150 new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
123 if (!new_bus) 151 if (!new_bus)
124 goto out_free_bitbang; 152 goto out;
125 153
126 new_bus->name = "GPIO Bitbanged MDIO", 154 new_bus->name = "GPIO Bitbanged MDIO",
127 155
@@ -138,11 +166,18 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
138 166
139 snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id); 167 snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id);
140 168
141 if (gpio_request(bitbang->mdc, "mdc")) 169 if (devm_gpio_request(dev, bitbang->mdc, "mdc"))
170 goto out_free_bus;
171
172 if (devm_gpio_request(dev, bitbang->mdio, "mdio"))
142 goto out_free_bus; 173 goto out_free_bus;
143 174
144 if (gpio_request(bitbang->mdio, "mdio")) 175 if (bitbang->mdo) {
145 goto out_free_mdc; 176 if (devm_gpio_request(dev, bitbang->mdo, "mdo"))
177 goto out_free_bus;
178 gpio_direction_output(bitbang->mdo, 1);
179 gpio_direction_input(bitbang->mdio);
180 }
146 181
147 gpio_direction_output(bitbang->mdc, 0); 182 gpio_direction_output(bitbang->mdc, 0);
148 183
@@ -150,12 +185,8 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
150 185
151 return new_bus; 186 return new_bus;
152 187
153out_free_mdc:
154 gpio_free(bitbang->mdc);
155out_free_bus: 188out_free_bus:
156 free_mdio_bitbang(new_bus); 189 free_mdio_bitbang(new_bus);
157out_free_bitbang:
158 kfree(bitbang);
159out: 190out:
160 return NULL; 191 return NULL;
161} 192}
@@ -163,13 +194,8 @@ out:
163static void mdio_gpio_bus_deinit(struct device *dev) 194static void mdio_gpio_bus_deinit(struct device *dev)
164{ 195{
165 struct mii_bus *bus = dev_get_drvdata(dev); 196 struct mii_bus *bus = dev_get_drvdata(dev);
166 struct mdio_gpio_info *bitbang = bus->priv;
167 197
168 dev_set_drvdata(dev, NULL);
169 gpio_free(bitbang->mdio);
170 gpio_free(bitbang->mdc);
171 free_mdio_bitbang(bus); 198 free_mdio_bitbang(bus);
172 kfree(bitbang);
173} 199}
174 200
175static void mdio_gpio_bus_destroy(struct device *dev) 201static void mdio_gpio_bus_destroy(struct device *dev)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 5ad971a55c5d..d849684231c1 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -246,13 +246,13 @@ static int ksz9021_load_values_from_of(struct phy_device *phydev,
246 if (val1 != -1) 246 if (val1 != -1)
247 newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0); 247 newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0);
248 248
249 if (val2 != -1) 249 if (val2 != -2)
250 newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4); 250 newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4);
251 251
252 if (val3 != -1) 252 if (val3 != -3)
253 newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8); 253 newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8);
254 254
255 if (val4 != -1) 255 if (val4 != -4)
256 newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12); 256 newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12);
257 257
258 return kszphy_extended_write(phydev, reg, newval); 258 return kszphy_extended_write(phydev, reg, newval);
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 1b6d09aef427..a972056b2249 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -765,6 +765,17 @@ void phy_state_machine(struct work_struct *work)
765 break; 765 break;
766 766
767 if (phydev->link) { 767 if (phydev->link) {
768 if (AUTONEG_ENABLE == phydev->autoneg) {
769 err = phy_aneg_done(phydev);
770 if (err < 0)
771 break;
772
773 if (!err) {
774 phydev->state = PHY_AN;
775 phydev->link_timeout = PHY_AN_TIMEOUT;
776 break;
777 }
778 }
768 phydev->state = PHY_RUNNING; 779 phydev->state = PHY_RUNNING;
769 netif_carrier_on(phydev->attached_dev); 780 netif_carrier_on(phydev->attached_dev);
770 phydev->adjust_link(phydev->attached_dev); 781 phydev->adjust_link(phydev->attached_dev);
diff --git a/drivers/net/slip/slip.c b/drivers/net/slip/slip.c
index cc70ecfc7062..ad4a94e9ff57 100644
--- a/drivers/net/slip/slip.c
+++ b/drivers/net/slip/slip.c
@@ -429,13 +429,13 @@ static void slip_write_wakeup(struct tty_struct *tty)
429 if (!sl || sl->magic != SLIP_MAGIC || !netif_running(sl->dev)) 429 if (!sl || sl->magic != SLIP_MAGIC || !netif_running(sl->dev))
430 return; 430 return;
431 431
432 spin_lock(&sl->lock); 432 spin_lock_bh(&sl->lock);
433 if (sl->xleft <= 0) { 433 if (sl->xleft <= 0) {
434 /* Now serial buffer is almost free & we can start 434 /* Now serial buffer is almost free & we can start
435 * transmission of another packet */ 435 * transmission of another packet */
436 sl->dev->stats.tx_packets++; 436 sl->dev->stats.tx_packets++;
437 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); 437 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
438 spin_unlock(&sl->lock); 438 spin_unlock_bh(&sl->lock);
439 sl_unlock(sl); 439 sl_unlock(sl);
440 return; 440 return;
441 } 441 }
@@ -443,7 +443,7 @@ static void slip_write_wakeup(struct tty_struct *tty)
443 actual = tty->ops->write(tty, sl->xhead, sl->xleft); 443 actual = tty->ops->write(tty, sl->xhead, sl->xleft);
444 sl->xleft -= actual; 444 sl->xleft -= actual;
445 sl->xhead += actual; 445 sl->xhead += actual;
446 spin_unlock(&sl->lock); 446 spin_unlock_bh(&sl->lock);
447} 447}
448 448
449static void sl_tx_timeout(struct net_device *dev) 449static void sl_tx_timeout(struct net_device *dev)
diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index 33008c1d1d67..767fe61b5ac9 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -2834,8 +2834,10 @@ static int team_device_event(struct notifier_block *unused,
2834 case NETDEV_UP: 2834 case NETDEV_UP:
2835 if (netif_carrier_ok(dev)) 2835 if (netif_carrier_ok(dev))
2836 team_port_change_check(port, true); 2836 team_port_change_check(port, true);
2837 break;
2837 case NETDEV_DOWN: 2838 case NETDEV_DOWN:
2838 team_port_change_check(port, false); 2839 team_port_change_check(port, false);
2840 break;
2839 case NETDEV_CHANGE: 2841 case NETDEV_CHANGE:
2840 if (netif_running(port->dev)) 2842 if (netif_running(port->dev))
2841 team_port_change_check(port, 2843 team_port_change_check(port,
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index 549dbac710ed..9a2bd11943eb 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -785,7 +785,7 @@ cdc_ncm_fill_tx_frame(struct usbnet *dev, struct sk_buff *skb, __le32 sign)
785 skb_out->len > CDC_NCM_MIN_TX_PKT) 785 skb_out->len > CDC_NCM_MIN_TX_PKT)
786 memset(skb_put(skb_out, ctx->tx_max - skb_out->len), 0, 786 memset(skb_put(skb_out, ctx->tx_max - skb_out->len), 0,
787 ctx->tx_max - skb_out->len); 787 ctx->tx_max - skb_out->len);
788 else if ((skb_out->len % dev->maxpacket) == 0) 788 else if (skb_out->len < ctx->tx_max && (skb_out->len % dev->maxpacket) == 0)
789 *skb_put(skb_out, 1) = 0; /* force short packet */ 789 *skb_put(skb_out, 1) = 0; /* force short packet */
790 790
791 /* set final frame length */ 791 /* set final frame length */
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index e3458e3c44f1..83208d4fdc59 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -669,6 +669,22 @@ static const struct usb_device_id products[] = {
669 {QMI_FIXED_INTF(0x05c6, 0x920d, 5)}, 669 {QMI_FIXED_INTF(0x05c6, 0x920d, 5)},
670 {QMI_FIXED_INTF(0x12d1, 0x140c, 1)}, /* Huawei E173 */ 670 {QMI_FIXED_INTF(0x12d1, 0x140c, 1)}, /* Huawei E173 */
671 {QMI_FIXED_INTF(0x12d1, 0x14ac, 1)}, /* Huawei E1820 */ 671 {QMI_FIXED_INTF(0x12d1, 0x14ac, 1)}, /* Huawei E1820 */
672 {QMI_FIXED_INTF(0x16d8, 0x6003, 0)}, /* CMOTech 6003 */
673 {QMI_FIXED_INTF(0x16d8, 0x6007, 0)}, /* CMOTech CHE-628S */
674 {QMI_FIXED_INTF(0x16d8, 0x6008, 0)}, /* CMOTech CMU-301 */
675 {QMI_FIXED_INTF(0x16d8, 0x6280, 0)}, /* CMOTech CHU-628 */
676 {QMI_FIXED_INTF(0x16d8, 0x7001, 0)}, /* CMOTech CHU-720S */
677 {QMI_FIXED_INTF(0x16d8, 0x7002, 0)}, /* CMOTech 7002 */
678 {QMI_FIXED_INTF(0x16d8, 0x7003, 4)}, /* CMOTech CHU-629K */
679 {QMI_FIXED_INTF(0x16d8, 0x7004, 3)}, /* CMOTech 7004 */
680 {QMI_FIXED_INTF(0x16d8, 0x7006, 5)}, /* CMOTech CGU-629 */
681 {QMI_FIXED_INTF(0x16d8, 0x700a, 4)}, /* CMOTech CHU-629S */
682 {QMI_FIXED_INTF(0x16d8, 0x7211, 0)}, /* CMOTech CHU-720I */
683 {QMI_FIXED_INTF(0x16d8, 0x7212, 0)}, /* CMOTech 7212 */
684 {QMI_FIXED_INTF(0x16d8, 0x7213, 0)}, /* CMOTech 7213 */
685 {QMI_FIXED_INTF(0x16d8, 0x7251, 1)}, /* CMOTech 7251 */
686 {QMI_FIXED_INTF(0x16d8, 0x7252, 1)}, /* CMOTech 7252 */
687 {QMI_FIXED_INTF(0x16d8, 0x7253, 1)}, /* CMOTech 7253 */
672 {QMI_FIXED_INTF(0x19d2, 0x0002, 1)}, 688 {QMI_FIXED_INTF(0x19d2, 0x0002, 1)},
673 {QMI_FIXED_INTF(0x19d2, 0x0012, 1)}, 689 {QMI_FIXED_INTF(0x19d2, 0x0012, 1)},
674 {QMI_FIXED_INTF(0x19d2, 0x0017, 3)}, 690 {QMI_FIXED_INTF(0x19d2, 0x0017, 3)},
@@ -730,16 +746,28 @@ static const struct usb_device_id products[] = {
730 {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */ 746 {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */
731 {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */ 747 {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */
732 {QMI_FIXED_INTF(0x1199, 0x68a2, 19)}, /* Sierra Wireless MC7710 in QMI mode */ 748 {QMI_FIXED_INTF(0x1199, 0x68a2, 19)}, /* Sierra Wireless MC7710 in QMI mode */
749 {QMI_FIXED_INTF(0x1199, 0x68c0, 8)}, /* Sierra Wireless MC73xx */
750 {QMI_FIXED_INTF(0x1199, 0x68c0, 10)}, /* Sierra Wireless MC73xx */
751 {QMI_FIXED_INTF(0x1199, 0x68c0, 11)}, /* Sierra Wireless MC73xx */
733 {QMI_FIXED_INTF(0x1199, 0x901c, 8)}, /* Sierra Wireless EM7700 */ 752 {QMI_FIXED_INTF(0x1199, 0x901c, 8)}, /* Sierra Wireless EM7700 */
753 {QMI_FIXED_INTF(0x1199, 0x901f, 8)}, /* Sierra Wireless EM7355 */
754 {QMI_FIXED_INTF(0x1199, 0x9041, 8)}, /* Sierra Wireless MC7305/MC7355 */
734 {QMI_FIXED_INTF(0x1199, 0x9051, 8)}, /* Netgear AirCard 340U */ 755 {QMI_FIXED_INTF(0x1199, 0x9051, 8)}, /* Netgear AirCard 340U */
735 {QMI_FIXED_INTF(0x1bbb, 0x011e, 4)}, /* Telekom Speedstick LTE II (Alcatel One Touch L100V LTE) */ 756 {QMI_FIXED_INTF(0x1bbb, 0x011e, 4)}, /* Telekom Speedstick LTE II (Alcatel One Touch L100V LTE) */
757 {QMI_FIXED_INTF(0x1bbb, 0x0203, 2)}, /* Alcatel L800MA */
736 {QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */ 758 {QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */
737 {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ 759 {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */
738 {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ 760 {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */
739 {QMI_FIXED_INTF(0x1bc7, 0x1201, 2)}, /* Telit LE920 */ 761 {QMI_FIXED_INTF(0x1bc7, 0x1201, 2)}, /* Telit LE920 */
740 {QMI_FIXED_INTF(0x0b3c, 0xc005, 6)}, /* Olivetti Olicard 200 */ 762 {QMI_FIXED_INTF(0x0b3c, 0xc005, 6)}, /* Olivetti Olicard 200 */
763 {QMI_FIXED_INTF(0x0b3c, 0xc00b, 4)}, /* Olivetti Olicard 500 */
741 {QMI_FIXED_INTF(0x1e2d, 0x0060, 4)}, /* Cinterion PLxx */ 764 {QMI_FIXED_INTF(0x1e2d, 0x0060, 4)}, /* Cinterion PLxx */
742 {QMI_FIXED_INTF(0x1e2d, 0x0053, 4)}, /* Cinterion PHxx,PXxx */ 765 {QMI_FIXED_INTF(0x1e2d, 0x0053, 4)}, /* Cinterion PHxx,PXxx */
766 {QMI_FIXED_INTF(0x413c, 0x81a2, 8)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */
767 {QMI_FIXED_INTF(0x413c, 0x81a3, 8)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */
768 {QMI_FIXED_INTF(0x413c, 0x81a4, 8)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */
769 {QMI_FIXED_INTF(0x413c, 0x81a8, 8)}, /* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card */
770 {QMI_FIXED_INTF(0x413c, 0x81a9, 8)}, /* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card */
743 771
744 /* 4. Gobi 1000 devices */ 772 /* 4. Gobi 1000 devices */
745 {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */ 773 {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 7b687469199b..8a852b5f215f 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -1285,7 +1285,7 @@ static int virtnet_set_channels(struct net_device *dev,
1285 if (channels->rx_count || channels->tx_count || channels->other_count) 1285 if (channels->rx_count || channels->tx_count || channels->other_count)
1286 return -EINVAL; 1286 return -EINVAL;
1287 1287
1288 if (queue_pairs > vi->max_queue_pairs) 1288 if (queue_pairs > vi->max_queue_pairs || queue_pairs == 0)
1289 return -EINVAL; 1289 return -EINVAL;
1290 1290
1291 get_online_cpus(); 1291 get_online_cpus();
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
index c55e316373a1..4dbb2ed85b97 100644
--- a/drivers/net/vxlan.c
+++ b/drivers/net/vxlan.c
@@ -389,8 +389,8 @@ static inline size_t vxlan_nlmsg_size(void)
389 + nla_total_size(sizeof(struct nda_cacheinfo)); 389 + nla_total_size(sizeof(struct nda_cacheinfo));
390} 390}
391 391
392static void vxlan_fdb_notify(struct vxlan_dev *vxlan, 392static void vxlan_fdb_notify(struct vxlan_dev *vxlan, struct vxlan_fdb *fdb,
393 struct vxlan_fdb *fdb, int type) 393 struct vxlan_rdst *rd, int type)
394{ 394{
395 struct net *net = dev_net(vxlan->dev); 395 struct net *net = dev_net(vxlan->dev);
396 struct sk_buff *skb; 396 struct sk_buff *skb;
@@ -400,8 +400,7 @@ static void vxlan_fdb_notify(struct vxlan_dev *vxlan,
400 if (skb == NULL) 400 if (skb == NULL)
401 goto errout; 401 goto errout;
402 402
403 err = vxlan_fdb_info(skb, vxlan, fdb, 0, 0, type, 0, 403 err = vxlan_fdb_info(skb, vxlan, fdb, 0, 0, type, 0, rd);
404 first_remote_rtnl(fdb));
405 if (err < 0) { 404 if (err < 0) {
406 /* -EMSGSIZE implies BUG in vxlan_nlmsg_size() */ 405 /* -EMSGSIZE implies BUG in vxlan_nlmsg_size() */
407 WARN_ON(err == -EMSGSIZE); 406 WARN_ON(err == -EMSGSIZE);
@@ -427,10 +426,7 @@ static void vxlan_ip_miss(struct net_device *dev, union vxlan_addr *ipa)
427 .remote_vni = VXLAN_N_VID, 426 .remote_vni = VXLAN_N_VID,
428 }; 427 };
429 428
430 INIT_LIST_HEAD(&f.remotes); 429 vxlan_fdb_notify(vxlan, &f, &remote, RTM_GETNEIGH);
431 list_add_rcu(&remote.list, &f.remotes);
432
433 vxlan_fdb_notify(vxlan, &f, RTM_GETNEIGH);
434} 430}
435 431
436static void vxlan_fdb_miss(struct vxlan_dev *vxlan, const u8 eth_addr[ETH_ALEN]) 432static void vxlan_fdb_miss(struct vxlan_dev *vxlan, const u8 eth_addr[ETH_ALEN])
@@ -438,11 +434,11 @@ static void vxlan_fdb_miss(struct vxlan_dev *vxlan, const u8 eth_addr[ETH_ALEN])
438 struct vxlan_fdb f = { 434 struct vxlan_fdb f = {
439 .state = NUD_STALE, 435 .state = NUD_STALE,
440 }; 436 };
437 struct vxlan_rdst remote = { };
441 438
442 INIT_LIST_HEAD(&f.remotes);
443 memcpy(f.eth_addr, eth_addr, ETH_ALEN); 439 memcpy(f.eth_addr, eth_addr, ETH_ALEN);
444 440
445 vxlan_fdb_notify(vxlan, &f, RTM_GETNEIGH); 441 vxlan_fdb_notify(vxlan, &f, &remote, RTM_GETNEIGH);
446} 442}
447 443
448/* Hash Ethernet address */ 444/* Hash Ethernet address */
@@ -533,7 +529,8 @@ static int vxlan_fdb_replace(struct vxlan_fdb *f,
533 529
534/* Add/update destinations for multicast */ 530/* Add/update destinations for multicast */
535static int vxlan_fdb_append(struct vxlan_fdb *f, 531static int vxlan_fdb_append(struct vxlan_fdb *f,
536 union vxlan_addr *ip, __be16 port, __u32 vni, __u32 ifindex) 532 union vxlan_addr *ip, __be16 port, __u32 vni,
533 __u32 ifindex, struct vxlan_rdst **rdp)
537{ 534{
538 struct vxlan_rdst *rd; 535 struct vxlan_rdst *rd;
539 536
@@ -551,6 +548,7 @@ static int vxlan_fdb_append(struct vxlan_fdb *f,
551 548
552 list_add_tail_rcu(&rd->list, &f->remotes); 549 list_add_tail_rcu(&rd->list, &f->remotes);
553 550
551 *rdp = rd;
554 return 1; 552 return 1;
555} 553}
556 554
@@ -690,6 +688,7 @@ static int vxlan_fdb_create(struct vxlan_dev *vxlan,
690 __be16 port, __u32 vni, __u32 ifindex, 688 __be16 port, __u32 vni, __u32 ifindex,
691 __u8 ndm_flags) 689 __u8 ndm_flags)
692{ 690{
691 struct vxlan_rdst *rd = NULL;
693 struct vxlan_fdb *f; 692 struct vxlan_fdb *f;
694 int notify = 0; 693 int notify = 0;
695 694
@@ -726,7 +725,8 @@ static int vxlan_fdb_create(struct vxlan_dev *vxlan,
726 if ((flags & NLM_F_APPEND) && 725 if ((flags & NLM_F_APPEND) &&
727 (is_multicast_ether_addr(f->eth_addr) || 726 (is_multicast_ether_addr(f->eth_addr) ||
728 is_zero_ether_addr(f->eth_addr))) { 727 is_zero_ether_addr(f->eth_addr))) {
729 int rc = vxlan_fdb_append(f, ip, port, vni, ifindex); 728 int rc = vxlan_fdb_append(f, ip, port, vni, ifindex,
729 &rd);
730 730
731 if (rc < 0) 731 if (rc < 0)
732 return rc; 732 return rc;
@@ -756,15 +756,18 @@ static int vxlan_fdb_create(struct vxlan_dev *vxlan,
756 INIT_LIST_HEAD(&f->remotes); 756 INIT_LIST_HEAD(&f->remotes);
757 memcpy(f->eth_addr, mac, ETH_ALEN); 757 memcpy(f->eth_addr, mac, ETH_ALEN);
758 758
759 vxlan_fdb_append(f, ip, port, vni, ifindex); 759 vxlan_fdb_append(f, ip, port, vni, ifindex, &rd);
760 760
761 ++vxlan->addrcnt; 761 ++vxlan->addrcnt;
762 hlist_add_head_rcu(&f->hlist, 762 hlist_add_head_rcu(&f->hlist,
763 vxlan_fdb_head(vxlan, mac)); 763 vxlan_fdb_head(vxlan, mac));
764 } 764 }
765 765
766 if (notify) 766 if (notify) {
767 vxlan_fdb_notify(vxlan, f, RTM_NEWNEIGH); 767 if (rd == NULL)
768 rd = first_remote_rtnl(f);
769 vxlan_fdb_notify(vxlan, f, rd, RTM_NEWNEIGH);
770 }
768 771
769 return 0; 772 return 0;
770} 773}
@@ -785,7 +788,7 @@ static void vxlan_fdb_destroy(struct vxlan_dev *vxlan, struct vxlan_fdb *f)
785 "delete %pM\n", f->eth_addr); 788 "delete %pM\n", f->eth_addr);
786 789
787 --vxlan->addrcnt; 790 --vxlan->addrcnt;
788 vxlan_fdb_notify(vxlan, f, RTM_DELNEIGH); 791 vxlan_fdb_notify(vxlan, f, first_remote_rtnl(f), RTM_DELNEIGH);
789 792
790 hlist_del_rcu(&f->hlist); 793 hlist_del_rcu(&f->hlist);
791 call_rcu(&f->rcu, vxlan_fdb_free); 794 call_rcu(&f->rcu, vxlan_fdb_free);
@@ -919,6 +922,7 @@ static int vxlan_fdb_delete(struct ndmsg *ndm, struct nlattr *tb[],
919 */ 922 */
920 if (rd && !list_is_singular(&f->remotes)) { 923 if (rd && !list_is_singular(&f->remotes)) {
921 list_del_rcu(&rd->list); 924 list_del_rcu(&rd->list);
925 vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH);
922 kfree_rcu(rd, rcu); 926 kfree_rcu(rd, rcu);
923 goto out; 927 goto out;
924 } 928 }
@@ -993,7 +997,7 @@ static bool vxlan_snoop(struct net_device *dev,
993 997
994 rdst->remote_ip = *src_ip; 998 rdst->remote_ip = *src_ip;
995 f->updated = jiffies; 999 f->updated = jiffies;
996 vxlan_fdb_notify(vxlan, f, RTM_NEWNEIGH); 1000 vxlan_fdb_notify(vxlan, f, rdst, RTM_NEWNEIGH);
997 } else { 1001 } else {
998 /* learned new entry */ 1002 /* learned new entry */
999 spin_lock(&vxlan->hash_lock); 1003 spin_lock(&vxlan->hash_lock);
@@ -1755,8 +1759,8 @@ int vxlan_xmit_skb(struct vxlan_sock *vs,
1755 if (err) 1759 if (err)
1756 return err; 1760 return err;
1757 1761
1758 return iptunnel_xmit(rt, skb, src, dst, IPPROTO_UDP, tos, ttl, df, 1762 return iptunnel_xmit(vs->sock->sk, rt, skb, src, dst, IPPROTO_UDP,
1759 false); 1763 tos, ttl, df, false);
1760} 1764}
1761EXPORT_SYMBOL_GPL(vxlan_xmit_skb); 1765EXPORT_SYMBOL_GPL(vxlan_xmit_skb);
1762 1766
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index 84734a805092..83c39e2858bf 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -1521,11 +1521,7 @@ static int cosa_reset_and_read_id(struct cosa_data *cosa, char *idstring)
1521 cosa_putstatus(cosa, 0); 1521 cosa_putstatus(cosa, 0);
1522 cosa_getdata8(cosa); 1522 cosa_getdata8(cosa);
1523 cosa_putstatus(cosa, SR_RST); 1523 cosa_putstatus(cosa, SR_RST);
1524#ifdef MODULE
1525 msleep(500); 1524 msleep(500);
1526#else
1527 udelay(5*100000);
1528#endif
1529 /* Disable all IRQs from the card */ 1525 /* Disable all IRQs from the card */
1530 cosa_putstatus(cosa, 0); 1526 cosa_putstatus(cosa, 0);
1531 1527
diff --git a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index a0398fe3eb28..be3eb2a8d602 100644
--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
@@ -86,7 +86,6 @@ static int ath_ahb_probe(struct platform_device *pdev)
86 int irq; 86 int irq;
87 int ret = 0; 87 int ret = 0;
88 struct ath_hw *ah; 88 struct ath_hw *ah;
89 struct ath_common *common;
90 char hw_name[64]; 89 char hw_name[64];
91 90
92 if (!dev_get_platdata(&pdev->dev)) { 91 if (!dev_get_platdata(&pdev->dev)) {
@@ -146,9 +145,6 @@ static int ath_ahb_probe(struct platform_device *pdev)
146 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n", 145 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
147 hw_name, (unsigned long)mem, irq); 146 hw_name, (unsigned long)mem, irq);
148 147
149 common = ath9k_hw_common(sc->sc_ah);
150 /* Will be cleared in ath9k_start() */
151 set_bit(ATH_OP_INVALID, &common->op_flags);
152 return 0; 148 return 0;
153 149
154 err_irq: 150 err_irq:
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index 6d47783f2e5b..ba502a2d199b 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -155,6 +155,9 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
155 ATH9K_ANI_RSSI_THR_LOW, 155 ATH9K_ANI_RSSI_THR_LOW,
156 ATH9K_ANI_RSSI_THR_HIGH); 156 ATH9K_ANI_RSSI_THR_HIGH);
157 157
158 if (AR_SREV_9100(ah) && immunityLevel < ATH9K_ANI_OFDM_DEF_LEVEL)
159 immunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
160
158 if (!scan) 161 if (!scan)
159 aniState->ofdmNoiseImmunityLevel = immunityLevel; 162 aniState->ofdmNoiseImmunityLevel = immunityLevel;
160 163
@@ -235,6 +238,9 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel,
235 BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW, 238 BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
236 ATH9K_ANI_RSSI_THR_HIGH); 239 ATH9K_ANI_RSSI_THR_HIGH);
237 240
241 if (AR_SREV_9100(ah) && immunityLevel < ATH9K_ANI_CCK_DEF_LEVEL)
242 immunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
243
238 if (ah->opmode == NL80211_IFTYPE_STATION && 244 if (ah->opmode == NL80211_IFTYPE_STATION &&
239 BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW && 245 BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
240 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI) 246 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 44d74495c4de..3ba03dde4215 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -251,7 +251,6 @@ struct ath_atx_tid {
251 251
252 s8 bar_index; 252 s8 bar_index;
253 bool sched; 253 bool sched;
254 bool paused;
255 bool active; 254 bool active;
256}; 255};
257 256
diff --git a/drivers/net/wireless/ath/ath9k/debug_sta.c b/drivers/net/wireless/ath/ath9k/debug_sta.c
index d76e6e0120d2..ffca918ff16a 100644
--- a/drivers/net/wireless/ath/ath9k/debug_sta.c
+++ b/drivers/net/wireless/ath/ath9k/debug_sta.c
@@ -72,7 +72,7 @@ static ssize_t read_file_node_aggr(struct file *file, char __user *user_buf,
72 ath_txq_lock(sc, txq); 72 ath_txq_lock(sc, txq);
73 if (tid->active) { 73 if (tid->active) {
74 len += scnprintf(buf + len, size - len, 74 len += scnprintf(buf + len, size - len,
75 "%3d%11d%10d%10d%10d%10d%9d%6d%8d\n", 75 "%3d%11d%10d%10d%10d%10d%9d%6d\n",
76 tid->tidno, 76 tid->tidno,
77 tid->seq_start, 77 tid->seq_start,
78 tid->seq_next, 78 tid->seq_next,
@@ -80,8 +80,7 @@ static ssize_t read_file_node_aggr(struct file *file, char __user *user_buf,
80 tid->baw_head, 80 tid->baw_head,
81 tid->baw_tail, 81 tid->baw_tail,
82 tid->bar_index, 82 tid->bar_index,
83 tid->sched, 83 tid->sched);
84 tid->paused);
85 } 84 }
86 ath_txq_unlock(sc, txq); 85 ath_txq_unlock(sc, txq);
87 } 86 }
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index cbbb02a6b13b..36ae6490e554 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -783,6 +783,9 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
783 common = ath9k_hw_common(ah); 783 common = ath9k_hw_common(ah);
784 ath9k_set_hw_capab(sc, hw); 784 ath9k_set_hw_capab(sc, hw);
785 785
786 /* Will be cleared in ath9k_start() */
787 set_bit(ATH_OP_INVALID, &common->op_flags);
788
786 /* Initialize regulatory */ 789 /* Initialize regulatory */
787 error = ath_regd_init(&common->regulatory, sc->hw->wiphy, 790 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
788 ath9k_reg_notifier); 791 ath9k_reg_notifier);
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 25304adece57..914dbc6b1720 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -784,7 +784,6 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
784{ 784{
785 struct ath_softc *sc; 785 struct ath_softc *sc;
786 struct ieee80211_hw *hw; 786 struct ieee80211_hw *hw;
787 struct ath_common *common;
788 u8 csz; 787 u8 csz;
789 u32 val; 788 u32 val;
790 int ret = 0; 789 int ret = 0;
@@ -877,10 +876,6 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
877 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n", 876 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
878 hw_name, (unsigned long)sc->mem, pdev->irq); 877 hw_name, (unsigned long)sc->mem, pdev->irq);
879 878
880 /* Will be cleared in ath9k_start() */
881 common = ath9k_hw_common(sc->sc_ah);
882 set_bit(ATH_OP_INVALID, &common->op_flags);
883
884 return 0; 879 return 0;
885 880
886err_init: 881err_init:
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index 6c9accdb52e4..19df969ec909 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -975,6 +975,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
975 u64 tsf = 0; 975 u64 tsf = 0;
976 unsigned long flags; 976 unsigned long flags;
977 dma_addr_t new_buf_addr; 977 dma_addr_t new_buf_addr;
978 unsigned int budget = 512;
978 979
979 if (edma) 980 if (edma)
980 dma_type = DMA_BIDIRECTIONAL; 981 dma_type = DMA_BIDIRECTIONAL;
@@ -1113,15 +1114,17 @@ requeue_drop_frag:
1113 } 1114 }
1114requeue: 1115requeue:
1115 list_add_tail(&bf->list, &sc->rx.rxbuf); 1116 list_add_tail(&bf->list, &sc->rx.rxbuf);
1116 if (flush)
1117 continue;
1118 1117
1119 if (edma) { 1118 if (edma) {
1120 ath_rx_edma_buf_link(sc, qtype); 1119 ath_rx_edma_buf_link(sc, qtype);
1121 } else { 1120 } else {
1122 ath_rx_buf_relink(sc, bf); 1121 ath_rx_buf_relink(sc, bf);
1123 ath9k_hw_rxena(ah); 1122 if (!flush)
1123 ath9k_hw_rxena(ah);
1124 } 1124 }
1125
1126 if (!budget--)
1127 break;
1125 } while (1); 1128 } while (1);
1126 1129
1127 if (!(ah->imask & ATH9K_INT_RXEOL)) { 1130 if (!(ah->imask & ATH9K_INT_RXEOL)) {
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 87cbec47fb48..66acb2cbd9df 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -107,9 +107,6 @@ static void ath_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid)
107{ 107{
108 struct ath_atx_ac *ac = tid->ac; 108 struct ath_atx_ac *ac = tid->ac;
109 109
110 if (tid->paused)
111 return;
112
113 if (tid->sched) 110 if (tid->sched)
114 return; 111 return;
115 112
@@ -1407,7 +1404,6 @@ int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
1407 ath_tx_tid_change_state(sc, txtid); 1404 ath_tx_tid_change_state(sc, txtid);
1408 1405
1409 txtid->active = true; 1406 txtid->active = true;
1410 txtid->paused = true;
1411 *ssn = txtid->seq_start = txtid->seq_next; 1407 *ssn = txtid->seq_start = txtid->seq_next;
1412 txtid->bar_index = -1; 1408 txtid->bar_index = -1;
1413 1409
@@ -1427,7 +1423,6 @@ void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
1427 1423
1428 ath_txq_lock(sc, txq); 1424 ath_txq_lock(sc, txq);
1429 txtid->active = false; 1425 txtid->active = false;
1430 txtid->paused = false;
1431 ath_tx_flush_tid(sc, txtid); 1426 ath_tx_flush_tid(sc, txtid);
1432 ath_tx_tid_change_state(sc, txtid); 1427 ath_tx_tid_change_state(sc, txtid);
1433 ath_txq_unlock_complete(sc, txq); 1428 ath_txq_unlock_complete(sc, txq);
@@ -1487,7 +1482,7 @@ void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an)
1487 ath_txq_lock(sc, txq); 1482 ath_txq_lock(sc, txq);
1488 ac->clear_ps_filter = true; 1483 ac->clear_ps_filter = true;
1489 1484
1490 if (!tid->paused && ath_tid_has_buffered(tid)) { 1485 if (ath_tid_has_buffered(tid)) {
1491 ath_tx_queue_tid(txq, tid); 1486 ath_tx_queue_tid(txq, tid);
1492 ath_txq_schedule(sc, txq); 1487 ath_txq_schedule(sc, txq);
1493 } 1488 }
@@ -1510,7 +1505,6 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta,
1510 ath_txq_lock(sc, txq); 1505 ath_txq_lock(sc, txq);
1511 1506
1512 tid->baw_size = IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor; 1507 tid->baw_size = IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor;
1513 tid->paused = false;
1514 1508
1515 if (ath_tid_has_buffered(tid)) { 1509 if (ath_tid_has_buffered(tid)) {
1516 ath_tx_queue_tid(txq, tid); 1510 ath_tx_queue_tid(txq, tid);
@@ -1544,8 +1538,6 @@ void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
1544 continue; 1538 continue;
1545 1539
1546 tid = ATH_AN_2_TID(an, i); 1540 tid = ATH_AN_2_TID(an, i);
1547 if (tid->paused)
1548 continue;
1549 1541
1550 ath_txq_lock(sc, tid->ac->txq); 1542 ath_txq_lock(sc, tid->ac->txq);
1551 while (nframes > 0) { 1543 while (nframes > 0) {
@@ -1844,9 +1836,6 @@ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
1844 list_del(&tid->list); 1836 list_del(&tid->list);
1845 tid->sched = false; 1837 tid->sched = false;
1846 1838
1847 if (tid->paused)
1848 continue;
1849
1850 if (ath_tx_sched_aggr(sc, txq, tid, &stop)) 1839 if (ath_tx_sched_aggr(sc, txq, tid, &stop))
1851 sent = true; 1840 sent = true;
1852 1841
@@ -2698,7 +2687,6 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2698 tid->baw_size = WME_MAX_BA; 2687 tid->baw_size = WME_MAX_BA;
2699 tid->baw_head = tid->baw_tail = 0; 2688 tid->baw_head = tid->baw_tail = 0;
2700 tid->sched = false; 2689 tid->sched = false;
2701 tid->paused = false;
2702 tid->active = false; 2690 tid->active = false;
2703 __skb_queue_head_init(&tid->buf_q); 2691 __skb_queue_head_init(&tid->buf_q);
2704 __skb_queue_head_init(&tid->retry_q); 2692 __skb_queue_head_init(&tid->retry_q);
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/brcm80211/brcmfmac/chip.c
index df130ef53d1c..c7c9f15c0fe0 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/chip.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/chip.c
@@ -303,10 +303,10 @@ static void brcmf_chip_ai_coredisable(struct brcmf_core_priv *core,
303 303
304 ci = core->chip; 304 ci = core->chip;
305 305
306 /* if core is already in reset, just return */ 306 /* if core is already in reset, skip reset */
307 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); 307 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL);
308 if ((regdata & BCMA_RESET_CTL_RESET) != 0) 308 if ((regdata & BCMA_RESET_CTL_RESET) != 0)
309 return; 309 goto in_reset_configure;
310 310
311 /* configure reset */ 311 /* configure reset */
312 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, 312 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL,
@@ -322,6 +322,7 @@ static void brcmf_chip_ai_coredisable(struct brcmf_core_priv *core,
322 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) != 322 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) !=
323 BCMA_RESET_CTL_RESET, 300); 323 BCMA_RESET_CTL_RESET, 300);
324 324
325in_reset_configure:
325 /* in-reset configure */ 326 /* in-reset configure */
326 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, 327 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL,
327 reset | BCMA_IOCTL_FGC | BCMA_IOCTL_CLK); 328 reset | BCMA_IOCTL_FGC | BCMA_IOCTL_CLK);
diff --git a/drivers/net/wireless/cw1200/debug.c b/drivers/net/wireless/cw1200/debug.c
index e323b4d54338..34f97c31eecf 100644
--- a/drivers/net/wireless/cw1200/debug.c
+++ b/drivers/net/wireless/cw1200/debug.c
@@ -41,6 +41,8 @@ static const char * const cw1200_debug_link_id[] = {
41 "REQ", 41 "REQ",
42 "SOFT", 42 "SOFT",
43 "HARD", 43 "HARD",
44 "RESET",
45 "RESET_REMAP",
44}; 46};
45 47
46static const char *cw1200_debug_mode(int mode) 48static const char *cw1200_debug_mode(int mode)
diff --git a/drivers/net/wireless/iwlwifi/iwl-7000.c b/drivers/net/wireless/iwlwifi/iwl-7000.c
index 003a546571d4..4c2d4ef28b22 100644
--- a/drivers/net/wireless/iwlwifi/iwl-7000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-7000.c
@@ -67,8 +67,8 @@
67#include "iwl-agn-hw.h" 67#include "iwl-agn-hw.h"
68 68
69/* Highest firmware API version supported */ 69/* Highest firmware API version supported */
70#define IWL7260_UCODE_API_MAX 8 70#define IWL7260_UCODE_API_MAX 9
71#define IWL3160_UCODE_API_MAX 8 71#define IWL3160_UCODE_API_MAX 9
72 72
73/* Oldest version we won't warn about */ 73/* Oldest version we won't warn about */
74#define IWL7260_UCODE_API_OK 8 74#define IWL7260_UCODE_API_OK 8
@@ -244,3 +244,4 @@ const struct iwl_cfg iwl7265_n_cfg = {
244 244
245MODULE_FIRMWARE(IWL7260_MODULE_FIRMWARE(IWL7260_UCODE_API_OK)); 245MODULE_FIRMWARE(IWL7260_MODULE_FIRMWARE(IWL7260_UCODE_API_OK));
246MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL3160_UCODE_API_OK)); 246MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL3160_UCODE_API_OK));
247MODULE_FIRMWARE(IWL7265_MODULE_FIRMWARE(IWL7260_UCODE_API_OK));
diff --git a/drivers/net/wireless/iwlwifi/mvm/coex.c b/drivers/net/wireless/iwlwifi/mvm/coex.c
index 685f7e8e6943..fa858d548d13 100644
--- a/drivers/net/wireless/iwlwifi/mvm/coex.c
+++ b/drivers/net/wireless/iwlwifi/mvm/coex.c
@@ -190,7 +190,7 @@ static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
190 cpu_to_le32(0xcc00aaaa), 190 cpu_to_le32(0xcc00aaaa),
191 cpu_to_le32(0x0000aaaa), 191 cpu_to_le32(0x0000aaaa),
192 cpu_to_le32(0xc0004000), 192 cpu_to_le32(0xc0004000),
193 cpu_to_le32(0x00000000), 193 cpu_to_le32(0x00004000),
194 cpu_to_le32(0xf0005000), 194 cpu_to_le32(0xf0005000),
195 cpu_to_le32(0xf0005000), 195 cpu_to_le32(0xf0005000),
196 }, 196 },
@@ -213,16 +213,16 @@ static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
213 /* Tx Tx disabled */ 213 /* Tx Tx disabled */
214 cpu_to_le32(0xaaaaaaaa), 214 cpu_to_le32(0xaaaaaaaa),
215 cpu_to_le32(0xaaaaaaaa), 215 cpu_to_le32(0xaaaaaaaa),
216 cpu_to_le32(0xaaaaaaaa), 216 cpu_to_le32(0xeeaaaaaa),
217 cpu_to_le32(0xaaaaaaaa), 217 cpu_to_le32(0xaaaaaaaa),
218 cpu_to_le32(0xcc00ff28), 218 cpu_to_le32(0xcc00ff28),
219 cpu_to_le32(0x0000aaaa), 219 cpu_to_le32(0x0000aaaa),
220 cpu_to_le32(0xcc00aaaa), 220 cpu_to_le32(0xcc00aaaa),
221 cpu_to_le32(0x0000aaaa), 221 cpu_to_le32(0x0000aaaa),
222 cpu_to_le32(0xC0004000), 222 cpu_to_le32(0xc0004000),
223 cpu_to_le32(0xC0004000), 223 cpu_to_le32(0xc0004000),
224 cpu_to_le32(0xF0005000), 224 cpu_to_le32(0xf0005000),
225 cpu_to_le32(0xF0005000), 225 cpu_to_le32(0xf0005000),
226 }, 226 },
227}; 227};
228 228
@@ -1262,6 +1262,7 @@ int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
1262 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1262 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1263 u32 ant_isolation = le32_to_cpup((void *)pkt->data); 1263 u32 ant_isolation = le32_to_cpup((void *)pkt->data);
1264 u8 __maybe_unused lower_bound, upper_bound; 1264 u8 __maybe_unused lower_bound, upper_bound;
1265 int ret;
1265 u8 lut; 1266 u8 lut;
1266 1267
1267 struct iwl_bt_coex_cmd *bt_cmd; 1268 struct iwl_bt_coex_cmd *bt_cmd;
@@ -1318,5 +1319,8 @@ int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
1318 memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, 1319 memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20,
1319 sizeof(bt_cmd->bt4_corun_lut40)); 1320 sizeof(bt_cmd->bt4_corun_lut40));
1320 1321
1321 return 0; 1322 ret = iwl_mvm_send_cmd(mvm, &cmd);
1323
1324 kfree(bt_cmd);
1325 return ret;
1322} 1326}
diff --git a/drivers/net/wireless/iwlwifi/mvm/mac80211.c b/drivers/net/wireless/iwlwifi/mvm/mac80211.c
index 4dd9ff43b8b6..f0cebf12c7b8 100644
--- a/drivers/net/wireless/iwlwifi/mvm/mac80211.c
+++ b/drivers/net/wireless/iwlwifi/mvm/mac80211.c
@@ -1332,6 +1332,7 @@ static void iwl_mvm_bss_info_changed_station(struct iwl_mvm *mvm,
1332 */ 1332 */
1333 iwl_mvm_remove_time_event(mvm, mvmvif, 1333 iwl_mvm_remove_time_event(mvm, mvmvif,
1334 &mvmvif->time_event_data); 1334 &mvmvif->time_event_data);
1335 iwl_mvm_sf_update(mvm, vif, false);
1335 WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, CMD_SYNC)); 1336 WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, CMD_SYNC));
1336 } else if (changes & (BSS_CHANGED_PS | BSS_CHANGED_P2P_PS | 1337 } else if (changes & (BSS_CHANGED_PS | BSS_CHANGED_P2P_PS |
1337 BSS_CHANGED_QOS)) { 1338 BSS_CHANGED_QOS)) {
diff --git a/drivers/net/wireless/iwlwifi/mvm/rs.c b/drivers/net/wireless/iwlwifi/mvm/rs.c
index 568abd61b14f..9f52c5b3f0ec 100644
--- a/drivers/net/wireless/iwlwifi/mvm/rs.c
+++ b/drivers/net/wireless/iwlwifi/mvm/rs.c
@@ -59,7 +59,7 @@
59/* max allowed rate miss before sync LQ cmd */ 59/* max allowed rate miss before sync LQ cmd */
60#define IWL_MISSED_RATE_MAX 15 60#define IWL_MISSED_RATE_MAX 15
61#define RS_STAY_IN_COLUMN_TIMEOUT (5*HZ) 61#define RS_STAY_IN_COLUMN_TIMEOUT (5*HZ)
62 62#define RS_IDLE_TIMEOUT (5*HZ)
63 63
64static u8 rs_ht_to_legacy[] = { 64static u8 rs_ht_to_legacy[] = {
65 [IWL_RATE_MCS_0_INDEX] = IWL_RATE_6M_INDEX, 65 [IWL_RATE_MCS_0_INDEX] = IWL_RATE_6M_INDEX,
@@ -142,7 +142,7 @@ enum rs_column_mode {
142 RS_MIMO2, 142 RS_MIMO2,
143}; 143};
144 144
145#define MAX_NEXT_COLUMNS 5 145#define MAX_NEXT_COLUMNS 7
146#define MAX_COLUMN_CHECKS 3 146#define MAX_COLUMN_CHECKS 3
147 147
148typedef bool (*allow_column_func_t) (struct iwl_mvm *mvm, 148typedef bool (*allow_column_func_t) (struct iwl_mvm *mvm,
@@ -212,8 +212,10 @@ static const struct rs_tx_column rs_tx_columns[] = {
212 RS_COLUMN_LEGACY_ANT_B, 212 RS_COLUMN_LEGACY_ANT_B,
213 RS_COLUMN_SISO_ANT_A, 213 RS_COLUMN_SISO_ANT_A,
214 RS_COLUMN_SISO_ANT_B, 214 RS_COLUMN_SISO_ANT_B,
215 RS_COLUMN_MIMO2, 215 RS_COLUMN_INVALID,
216 RS_COLUMN_MIMO2_SGI, 216 RS_COLUMN_INVALID,
217 RS_COLUMN_INVALID,
218 RS_COLUMN_INVALID,
217 }, 219 },
218 }, 220 },
219 [RS_COLUMN_LEGACY_ANT_B] = { 221 [RS_COLUMN_LEGACY_ANT_B] = {
@@ -223,8 +225,10 @@ static const struct rs_tx_column rs_tx_columns[] = {
223 RS_COLUMN_LEGACY_ANT_A, 225 RS_COLUMN_LEGACY_ANT_A,
224 RS_COLUMN_SISO_ANT_A, 226 RS_COLUMN_SISO_ANT_A,
225 RS_COLUMN_SISO_ANT_B, 227 RS_COLUMN_SISO_ANT_B,
226 RS_COLUMN_MIMO2, 228 RS_COLUMN_INVALID,
227 RS_COLUMN_MIMO2_SGI, 229 RS_COLUMN_INVALID,
230 RS_COLUMN_INVALID,
231 RS_COLUMN_INVALID,
228 }, 232 },
229 }, 233 },
230 [RS_COLUMN_SISO_ANT_A] = { 234 [RS_COLUMN_SISO_ANT_A] = {
@@ -235,7 +239,9 @@ static const struct rs_tx_column rs_tx_columns[] = {
235 RS_COLUMN_MIMO2, 239 RS_COLUMN_MIMO2,
236 RS_COLUMN_SISO_ANT_A_SGI, 240 RS_COLUMN_SISO_ANT_A_SGI,
237 RS_COLUMN_SISO_ANT_B_SGI, 241 RS_COLUMN_SISO_ANT_B_SGI,
238 RS_COLUMN_MIMO2_SGI, 242 RS_COLUMN_LEGACY_ANT_A,
243 RS_COLUMN_LEGACY_ANT_B,
244 RS_COLUMN_INVALID,
239 }, 245 },
240 .checks = { 246 .checks = {
241 rs_siso_allow, 247 rs_siso_allow,
@@ -249,7 +255,9 @@ static const struct rs_tx_column rs_tx_columns[] = {
249 RS_COLUMN_MIMO2, 255 RS_COLUMN_MIMO2,
250 RS_COLUMN_SISO_ANT_B_SGI, 256 RS_COLUMN_SISO_ANT_B_SGI,
251 RS_COLUMN_SISO_ANT_A_SGI, 257 RS_COLUMN_SISO_ANT_A_SGI,
252 RS_COLUMN_MIMO2_SGI, 258 RS_COLUMN_LEGACY_ANT_A,
259 RS_COLUMN_LEGACY_ANT_B,
260 RS_COLUMN_INVALID,
253 }, 261 },
254 .checks = { 262 .checks = {
255 rs_siso_allow, 263 rs_siso_allow,
@@ -265,6 +273,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
265 RS_COLUMN_SISO_ANT_A, 273 RS_COLUMN_SISO_ANT_A,
266 RS_COLUMN_SISO_ANT_B, 274 RS_COLUMN_SISO_ANT_B,
267 RS_COLUMN_MIMO2, 275 RS_COLUMN_MIMO2,
276 RS_COLUMN_LEGACY_ANT_A,
277 RS_COLUMN_LEGACY_ANT_B,
268 }, 278 },
269 .checks = { 279 .checks = {
270 rs_siso_allow, 280 rs_siso_allow,
@@ -281,6 +291,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
281 RS_COLUMN_SISO_ANT_B, 291 RS_COLUMN_SISO_ANT_B,
282 RS_COLUMN_SISO_ANT_A, 292 RS_COLUMN_SISO_ANT_A,
283 RS_COLUMN_MIMO2, 293 RS_COLUMN_MIMO2,
294 RS_COLUMN_LEGACY_ANT_A,
295 RS_COLUMN_LEGACY_ANT_B,
284 }, 296 },
285 .checks = { 297 .checks = {
286 rs_siso_allow, 298 rs_siso_allow,
@@ -296,6 +308,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
296 RS_COLUMN_SISO_ANT_A_SGI, 308 RS_COLUMN_SISO_ANT_A_SGI,
297 RS_COLUMN_SISO_ANT_B_SGI, 309 RS_COLUMN_SISO_ANT_B_SGI,
298 RS_COLUMN_MIMO2_SGI, 310 RS_COLUMN_MIMO2_SGI,
311 RS_COLUMN_LEGACY_ANT_A,
312 RS_COLUMN_LEGACY_ANT_B,
299 }, 313 },
300 .checks = { 314 .checks = {
301 rs_mimo_allow, 315 rs_mimo_allow,
@@ -311,6 +325,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
311 RS_COLUMN_SISO_ANT_A, 325 RS_COLUMN_SISO_ANT_A,
312 RS_COLUMN_SISO_ANT_B, 326 RS_COLUMN_SISO_ANT_B,
313 RS_COLUMN_MIMO2, 327 RS_COLUMN_MIMO2,
328 RS_COLUMN_LEGACY_ANT_A,
329 RS_COLUMN_LEGACY_ANT_B,
314 }, 330 },
315 .checks = { 331 .checks = {
316 rs_mimo_allow, 332 rs_mimo_allow,
@@ -503,10 +519,12 @@ static void rs_rate_scale_clear_window(struct iwl_rate_scale_data *window)
503 window->average_tpt = IWL_INVALID_VALUE; 519 window->average_tpt = IWL_INVALID_VALUE;
504} 520}
505 521
506static void rs_rate_scale_clear_tbl_windows(struct iwl_scale_tbl_info *tbl) 522static void rs_rate_scale_clear_tbl_windows(struct iwl_mvm *mvm,
523 struct iwl_scale_tbl_info *tbl)
507{ 524{
508 int i; 525 int i;
509 526
527 IWL_DEBUG_RATE(mvm, "Clearing up window stats\n");
510 for (i = 0; i < IWL_RATE_COUNT; i++) 528 for (i = 0; i < IWL_RATE_COUNT; i++)
511 rs_rate_scale_clear_window(&tbl->win[i]); 529 rs_rate_scale_clear_window(&tbl->win[i]);
512} 530}
@@ -992,6 +1010,13 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband,
992 return; 1010 return;
993 } 1011 }
994 1012
1013#ifdef CPTCFG_MAC80211_DEBUGFS
1014 /* Disable last tx check if we are debugging with fixed rate */
1015 if (lq_sta->dbg_fixed_rate) {
1016 IWL_DEBUG_RATE(mvm, "Fixed rate. avoid rate scaling\n");
1017 return;
1018 }
1019#endif
995 if (!ieee80211_is_data(hdr->frame_control) || 1020 if (!ieee80211_is_data(hdr->frame_control) ||
996 info->flags & IEEE80211_TX_CTL_NO_ACK) 1021 info->flags & IEEE80211_TX_CTL_NO_ACK)
997 return; 1022 return;
@@ -1034,6 +1059,18 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband,
1034 mac_index++; 1059 mac_index++;
1035 } 1060 }
1036 1061
1062 if (time_after(jiffies,
1063 (unsigned long)(lq_sta->last_tx + RS_IDLE_TIMEOUT))) {
1064 int tid;
1065 IWL_DEBUG_RATE(mvm, "Tx idle for too long. reinit rs\n");
1066 for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++)
1067 ieee80211_stop_tx_ba_session(sta, tid);
1068
1069 iwl_mvm_rs_rate_init(mvm, sta, sband->band, false);
1070 return;
1071 }
1072 lq_sta->last_tx = jiffies;
1073
1037 /* Here we actually compare this rate to the latest LQ command */ 1074 /* Here we actually compare this rate to the latest LQ command */
1038 if ((mac_index < 0) || 1075 if ((mac_index < 0) ||
1039 (rate.sgi != !!(mac_flags & IEEE80211_TX_RC_SHORT_GI)) || 1076 (rate.sgi != !!(mac_flags & IEEE80211_TX_RC_SHORT_GI)) ||
@@ -1186,9 +1223,26 @@ static void rs_set_stay_in_table(struct iwl_mvm *mvm, u8 is_legacy,
1186 lq_sta->visited_columns = 0; 1223 lq_sta->visited_columns = 0;
1187} 1224}
1188 1225
1226static int rs_get_max_allowed_rate(struct iwl_lq_sta *lq_sta,
1227 const struct rs_tx_column *column)
1228{
1229 switch (column->mode) {
1230 case RS_LEGACY:
1231 return lq_sta->max_legacy_rate_idx;
1232 case RS_SISO:
1233 return lq_sta->max_siso_rate_idx;
1234 case RS_MIMO2:
1235 return lq_sta->max_mimo2_rate_idx;
1236 default:
1237 WARN_ON_ONCE(1);
1238 }
1239
1240 return lq_sta->max_legacy_rate_idx;
1241}
1242
1189static const u16 *rs_get_expected_tpt_table(struct iwl_lq_sta *lq_sta, 1243static const u16 *rs_get_expected_tpt_table(struct iwl_lq_sta *lq_sta,
1190 const struct rs_tx_column *column, 1244 const struct rs_tx_column *column,
1191 u32 bw) 1245 u32 bw)
1192{ 1246{
1193 /* Used to choose among HT tables */ 1247 /* Used to choose among HT tables */
1194 const u16 (*ht_tbl_pointer)[IWL_RATE_COUNT]; 1248 const u16 (*ht_tbl_pointer)[IWL_RATE_COUNT];
@@ -1438,7 +1492,7 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta, bool force_search)
1438 1492
1439 IWL_DEBUG_RATE(mvm, 1493 IWL_DEBUG_RATE(mvm,
1440 "LQ: stay in table clear win\n"); 1494 "LQ: stay in table clear win\n");
1441 rs_rate_scale_clear_tbl_windows(tbl); 1495 rs_rate_scale_clear_tbl_windows(mvm, tbl);
1442 } 1496 }
1443 } 1497 }
1444 1498
@@ -1446,8 +1500,7 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta, bool force_search)
1446 * bitmaps and stats in active table (this will become the new 1500 * bitmaps and stats in active table (this will become the new
1447 * "search" table). */ 1501 * "search" table). */
1448 if (lq_sta->rs_state == RS_STATE_SEARCH_CYCLE_STARTED) { 1502 if (lq_sta->rs_state == RS_STATE_SEARCH_CYCLE_STARTED) {
1449 IWL_DEBUG_RATE(mvm, "Clearing up window stats\n"); 1503 rs_rate_scale_clear_tbl_windows(mvm, tbl);
1450 rs_rate_scale_clear_tbl_windows(tbl);
1451 } 1504 }
1452 } 1505 }
1453} 1506}
@@ -1485,14 +1538,14 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
1485 struct ieee80211_sta *sta, 1538 struct ieee80211_sta *sta,
1486 struct iwl_scale_tbl_info *tbl) 1539 struct iwl_scale_tbl_info *tbl)
1487{ 1540{
1488 int i, j, n; 1541 int i, j, max_rate;
1489 enum rs_column next_col_id; 1542 enum rs_column next_col_id;
1490 const struct rs_tx_column *curr_col = &rs_tx_columns[tbl->column]; 1543 const struct rs_tx_column *curr_col = &rs_tx_columns[tbl->column];
1491 const struct rs_tx_column *next_col; 1544 const struct rs_tx_column *next_col;
1492 allow_column_func_t allow_func; 1545 allow_column_func_t allow_func;
1493 u8 valid_ants = mvm->fw->valid_tx_ant; 1546 u8 valid_ants = mvm->fw->valid_tx_ant;
1494 const u16 *expected_tpt_tbl; 1547 const u16 *expected_tpt_tbl;
1495 s32 tpt, max_expected_tpt; 1548 u16 tpt, max_expected_tpt;
1496 1549
1497 for (i = 0; i < MAX_NEXT_COLUMNS; i++) { 1550 for (i = 0; i < MAX_NEXT_COLUMNS; i++) {
1498 next_col_id = curr_col->next_columns[i]; 1551 next_col_id = curr_col->next_columns[i];
@@ -1535,11 +1588,11 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
1535 if (WARN_ON_ONCE(!expected_tpt_tbl)) 1588 if (WARN_ON_ONCE(!expected_tpt_tbl))
1536 continue; 1589 continue;
1537 1590
1538 max_expected_tpt = 0; 1591 max_rate = rs_get_max_allowed_rate(lq_sta, next_col);
1539 for (n = 0; n < IWL_RATE_COUNT; n++) 1592 if (WARN_ON_ONCE(max_rate == IWL_RATE_INVALID))
1540 if (expected_tpt_tbl[n] > max_expected_tpt) 1593 continue;
1541 max_expected_tpt = expected_tpt_tbl[n];
1542 1594
1595 max_expected_tpt = expected_tpt_tbl[max_rate];
1543 if (tpt >= max_expected_tpt) { 1596 if (tpt >= max_expected_tpt) {
1544 IWL_DEBUG_RATE(mvm, 1597 IWL_DEBUG_RATE(mvm,
1545 "Skip column %d: can't beat current TPT. Max expected %d current %d\n", 1598 "Skip column %d: can't beat current TPT. Max expected %d current %d\n",
@@ -1547,14 +1600,15 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
1547 continue; 1600 continue;
1548 } 1601 }
1549 1602
1603 IWL_DEBUG_RATE(mvm,
1604 "Found potential column %d. Max expected %d current %d\n",
1605 next_col_id, max_expected_tpt, tpt);
1550 break; 1606 break;
1551 } 1607 }
1552 1608
1553 if (i == MAX_NEXT_COLUMNS) 1609 if (i == MAX_NEXT_COLUMNS)
1554 return RS_COLUMN_INVALID; 1610 return RS_COLUMN_INVALID;
1555 1611
1556 IWL_DEBUG_RATE(mvm, "Found potential column %d\n", next_col_id);
1557
1558 return next_col_id; 1612 return next_col_id;
1559} 1613}
1560 1614
@@ -1640,85 +1694,76 @@ static enum rs_action rs_get_rate_action(struct iwl_mvm *mvm,
1640{ 1694{
1641 enum rs_action action = RS_ACTION_STAY; 1695 enum rs_action action = RS_ACTION_STAY;
1642 1696
1643 /* Too many failures, decrease rate */
1644 if ((sr <= RS_SR_FORCE_DECREASE) || (current_tpt == 0)) { 1697 if ((sr <= RS_SR_FORCE_DECREASE) || (current_tpt == 0)) {
1645 IWL_DEBUG_RATE(mvm, 1698 IWL_DEBUG_RATE(mvm,
1646 "decrease rate because of low SR\n"); 1699 "Decrease rate because of low SR\n");
1647 action = RS_ACTION_DOWNSCALE; 1700 return RS_ACTION_DOWNSCALE;
1648 /* No throughput measured yet for adjacent rates; try increase. */
1649 } else if ((low_tpt == IWL_INVALID_VALUE) &&
1650 (high_tpt == IWL_INVALID_VALUE)) {
1651 if (high != IWL_RATE_INVALID && sr >= IWL_RATE_INCREASE_TH) {
1652 IWL_DEBUG_RATE(mvm,
1653 "Good SR and no high rate measurement. "
1654 "Increase rate\n");
1655 action = RS_ACTION_UPSCALE;
1656 } else if (low != IWL_RATE_INVALID) {
1657 IWL_DEBUG_RATE(mvm,
1658 "Remain in current rate\n");
1659 action = RS_ACTION_STAY;
1660 }
1661 } 1701 }
1662 1702
1663 /* Both adjacent throughputs are measured, but neither one has better 1703 if ((low_tpt == IWL_INVALID_VALUE) &&
1664 * throughput; we're using the best rate, don't change it! 1704 (high_tpt == IWL_INVALID_VALUE) &&
1665 */ 1705 (high != IWL_RATE_INVALID)) {
1666 else if ((low_tpt != IWL_INVALID_VALUE) &&
1667 (high_tpt != IWL_INVALID_VALUE) &&
1668 (low_tpt < current_tpt) &&
1669 (high_tpt < current_tpt)) {
1670 IWL_DEBUG_RATE(mvm, 1706 IWL_DEBUG_RATE(mvm,
1671 "Both high and low are worse. " 1707 "No data about high/low rates. Increase rate\n");
1672 "Maintain rate\n"); 1708 return RS_ACTION_UPSCALE;
1673 action = RS_ACTION_STAY;
1674 } 1709 }
1675 1710
1676 /* At least one adjacent rate's throughput is measured, 1711 if ((high_tpt == IWL_INVALID_VALUE) &&
1677 * and may have better performance. 1712 (high != IWL_RATE_INVALID) &&
1678 */ 1713 (low_tpt != IWL_INVALID_VALUE) &&
1679 else { 1714 (low_tpt < current_tpt)) {
1680 /* Higher adjacent rate's throughput is measured */ 1715 IWL_DEBUG_RATE(mvm,
1681 if (high_tpt != IWL_INVALID_VALUE) { 1716 "No data about high rate and low rate is worse. Increase rate\n");
1682 /* Higher rate has better throughput */ 1717 return RS_ACTION_UPSCALE;
1683 if (high_tpt > current_tpt && 1718 }
1684 sr >= IWL_RATE_INCREASE_TH) {
1685 IWL_DEBUG_RATE(mvm,
1686 "Higher rate is better and good "
1687 "SR. Increate rate\n");
1688 action = RS_ACTION_UPSCALE;
1689 } else {
1690 IWL_DEBUG_RATE(mvm,
1691 "Higher rate isn't better OR "
1692 "no good SR. Maintain rate\n");
1693 action = RS_ACTION_STAY;
1694 }
1695 1719
1696 /* Lower adjacent rate's throughput is measured */ 1720 if ((high_tpt != IWL_INVALID_VALUE) &&
1697 } else if (low_tpt != IWL_INVALID_VALUE) { 1721 (high_tpt > current_tpt)) {
1698 /* Lower rate has better throughput */ 1722 IWL_DEBUG_RATE(mvm,
1699 if (low_tpt > current_tpt) { 1723 "Higher rate is better. Increate rate\n");
1700 IWL_DEBUG_RATE(mvm, 1724 return RS_ACTION_UPSCALE;
1701 "Lower rate is better. "
1702 "Decrease rate\n");
1703 action = RS_ACTION_DOWNSCALE;
1704 } else if (sr >= IWL_RATE_INCREASE_TH) {
1705 IWL_DEBUG_RATE(mvm,
1706 "Lower rate isn't better and "
1707 "good SR. Increase rate\n");
1708 action = RS_ACTION_UPSCALE;
1709 }
1710 }
1711 } 1725 }
1712 1726
1713 /* Sanity check; asked for decrease, but success rate or throughput 1727 if ((low_tpt != IWL_INVALID_VALUE) &&
1714 * has been good at old rate. Don't change it. 1728 (high_tpt != IWL_INVALID_VALUE) &&
1715 */ 1729 (low_tpt < current_tpt) &&
1716 if ((action == RS_ACTION_DOWNSCALE) && (low != IWL_RATE_INVALID) && 1730 (high_tpt < current_tpt)) {
1717 ((sr > IWL_RATE_HIGH_TH) || 1731 IWL_DEBUG_RATE(mvm,
1718 (current_tpt > (100 * tbl->expected_tpt[low])))) { 1732 "Both high and low are worse. Maintain rate\n");
1733 return RS_ACTION_STAY;
1734 }
1735
1736 if ((low_tpt != IWL_INVALID_VALUE) &&
1737 (low_tpt > current_tpt)) {
1738 IWL_DEBUG_RATE(mvm,
1739 "Lower rate is better\n");
1740 action = RS_ACTION_DOWNSCALE;
1741 goto out;
1742 }
1743
1744 if ((low_tpt == IWL_INVALID_VALUE) &&
1745 (low != IWL_RATE_INVALID)) {
1719 IWL_DEBUG_RATE(mvm, 1746 IWL_DEBUG_RATE(mvm,
1720 "Sanity check failed. Maintain rate\n"); 1747 "No data about lower rate\n");
1721 action = RS_ACTION_STAY; 1748 action = RS_ACTION_DOWNSCALE;
1749 goto out;
1750 }
1751
1752 IWL_DEBUG_RATE(mvm, "Maintain rate\n");
1753
1754out:
1755 if ((action == RS_ACTION_DOWNSCALE) && (low != IWL_RATE_INVALID)) {
1756 if (sr >= RS_SR_NO_DECREASE) {
1757 IWL_DEBUG_RATE(mvm,
1758 "SR is above NO DECREASE. Avoid downscale\n");
1759 action = RS_ACTION_STAY;
1760 } else if (current_tpt > (100 * tbl->expected_tpt[low])) {
1761 IWL_DEBUG_RATE(mvm,
1762 "Current TPT is higher than max expected in low rate. Avoid downscale\n");
1763 action = RS_ACTION_STAY;
1764 } else {
1765 IWL_DEBUG_RATE(mvm, "Decrease rate\n");
1766 }
1722 } 1767 }
1723 1768
1724 return action; 1769 return action;
@@ -1792,6 +1837,7 @@ static void rs_rate_scale_perform(struct iwl_mvm *mvm,
1792 "Aggregation changed: prev %d current %d. Update expected TPT table\n", 1837 "Aggregation changed: prev %d current %d. Update expected TPT table\n",
1793 prev_agg, lq_sta->is_agg); 1838 prev_agg, lq_sta->is_agg);
1794 rs_set_expected_tpt_table(lq_sta, tbl); 1839 rs_set_expected_tpt_table(lq_sta, tbl);
1840 rs_rate_scale_clear_tbl_windows(mvm, tbl);
1795 } 1841 }
1796 1842
1797 /* current tx rate */ 1843 /* current tx rate */
@@ -2021,7 +2067,7 @@ lq_update:
2021 if (lq_sta->search_better_tbl) { 2067 if (lq_sta->search_better_tbl) {
2022 /* Access the "search" table, clear its history. */ 2068 /* Access the "search" table, clear its history. */
2023 tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); 2069 tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]);
2024 rs_rate_scale_clear_tbl_windows(tbl); 2070 rs_rate_scale_clear_tbl_windows(mvm, tbl);
2025 2071
2026 /* Use new "search" start rate */ 2072 /* Use new "search" start rate */
2027 index = tbl->rate.index; 2073 index = tbl->rate.index;
@@ -2042,8 +2088,18 @@ lq_update:
2042 * stay with best antenna legacy modulation for a while 2088 * stay with best antenna legacy modulation for a while
2043 * before next round of mode comparisons. */ 2089 * before next round of mode comparisons. */
2044 tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]); 2090 tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]);
2045 if (is_legacy(&tbl1->rate) && !sta->ht_cap.ht_supported) { 2091 if (is_legacy(&tbl1->rate)) {
2046 IWL_DEBUG_RATE(mvm, "LQ: STAY in legacy table\n"); 2092 IWL_DEBUG_RATE(mvm, "LQ: STAY in legacy table\n");
2093
2094 if (tid != IWL_MAX_TID_COUNT) {
2095 tid_data = &sta_priv->tid_data[tid];
2096 if (tid_data->state != IWL_AGG_OFF) {
2097 IWL_DEBUG_RATE(mvm,
2098 "Stop aggregation on tid %d\n",
2099 tid);
2100 ieee80211_stop_tx_ba_session(sta, tid);
2101 }
2102 }
2047 rs_set_stay_in_table(mvm, 1, lq_sta); 2103 rs_set_stay_in_table(mvm, 1, lq_sta);
2048 } else { 2104 } else {
2049 /* If we're in an HT mode, and all 3 mode switch actions 2105 /* If we're in an HT mode, and all 3 mode switch actions
@@ -2342,9 +2398,10 @@ void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
2342 lq_sta->lq.sta_id = sta_priv->sta_id; 2398 lq_sta->lq.sta_id = sta_priv->sta_id;
2343 2399
2344 for (j = 0; j < LQ_SIZE; j++) 2400 for (j = 0; j < LQ_SIZE; j++)
2345 rs_rate_scale_clear_tbl_windows(&lq_sta->lq_info[j]); 2401 rs_rate_scale_clear_tbl_windows(mvm, &lq_sta->lq_info[j]);
2346 2402
2347 lq_sta->flush_timer = 0; 2403 lq_sta->flush_timer = 0;
2404 lq_sta->last_tx = jiffies;
2348 2405
2349 IWL_DEBUG_RATE(mvm, 2406 IWL_DEBUG_RATE(mvm,
2350 "LQ: *** rate scale station global init for station %d ***\n", 2407 "LQ: *** rate scale station global init for station %d ***\n",
@@ -2388,11 +2445,22 @@ void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
2388 lq_sta->is_vht = true; 2445 lq_sta->is_vht = true;
2389 } 2446 }
2390 2447
2391 IWL_DEBUG_RATE(mvm, 2448 lq_sta->max_legacy_rate_idx = find_last_bit(&lq_sta->active_legacy_rate,
2392 "SISO-RATE=%X MIMO2-RATE=%X VHT=%d\n", 2449 BITS_PER_LONG);
2450 lq_sta->max_siso_rate_idx = find_last_bit(&lq_sta->active_siso_rate,
2451 BITS_PER_LONG);
2452 lq_sta->max_mimo2_rate_idx = find_last_bit(&lq_sta->active_mimo2_rate,
2453 BITS_PER_LONG);
2454
2455 IWL_DEBUG_RATE(mvm, "RATE MASK: LEGACY=%lX SISO=%lX MIMO2=%lX VHT=%d\n",
2456 lq_sta->active_legacy_rate,
2393 lq_sta->active_siso_rate, 2457 lq_sta->active_siso_rate,
2394 lq_sta->active_mimo2_rate, 2458 lq_sta->active_mimo2_rate,
2395 lq_sta->is_vht); 2459 lq_sta->is_vht);
2460 IWL_DEBUG_RATE(mvm, "MAX RATE: LEGACY=%d SISO=%d MIMO2=%d\n",
2461 lq_sta->max_legacy_rate_idx,
2462 lq_sta->max_siso_rate_idx,
2463 lq_sta->max_mimo2_rate_idx);
2396 2464
2397 /* These values will be overridden later */ 2465 /* These values will be overridden later */
2398 lq_sta->lq.single_stream_ant_msk = 2466 lq_sta->lq.single_stream_ant_msk =
@@ -2547,6 +2615,7 @@ static void rs_build_rates_table(struct iwl_mvm *mvm,
2547 if (is_siso(&rate)) { 2615 if (is_siso(&rate)) {
2548 num_rates = RS_SECONDARY_SISO_NUM_RATES; 2616 num_rates = RS_SECONDARY_SISO_NUM_RATES;
2549 num_retries = RS_SECONDARY_SISO_RETRIES; 2617 num_retries = RS_SECONDARY_SISO_RETRIES;
2618 lq_cmd->mimo_delim = index;
2550 } else if (is_legacy(&rate)) { 2619 } else if (is_legacy(&rate)) {
2551 num_rates = RS_SECONDARY_LEGACY_NUM_RATES; 2620 num_rates = RS_SECONDARY_LEGACY_NUM_RATES;
2552 num_retries = RS_LEGACY_RETRIES_PER_RATE; 2621 num_retries = RS_LEGACY_RETRIES_PER_RATE;
@@ -2749,7 +2818,7 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
2749 return -ENOMEM; 2818 return -ENOMEM;
2750 2819
2751 desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id); 2820 desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id);
2752 desc += sprintf(buff+desc, "failed=%d success=%d rate=0%X\n", 2821 desc += sprintf(buff+desc, "failed=%d success=%d rate=0%lX\n",
2753 lq_sta->total_failed, lq_sta->total_success, 2822 lq_sta->total_failed, lq_sta->total_success,
2754 lq_sta->active_legacy_rate); 2823 lq_sta->active_legacy_rate);
2755 desc += sprintf(buff+desc, "fixed rate 0x%X\n", 2824 desc += sprintf(buff+desc, "fixed rate 0x%X\n",
diff --git a/drivers/net/wireless/iwlwifi/mvm/rs.h b/drivers/net/wireless/iwlwifi/mvm/rs.h
index 3332b396011e..0acfac96a56c 100644
--- a/drivers/net/wireless/iwlwifi/mvm/rs.h
+++ b/drivers/net/wireless/iwlwifi/mvm/rs.h
@@ -156,6 +156,7 @@ enum {
156#define IWL_RATE_HIGH_TH 10880 /* 85% */ 156#define IWL_RATE_HIGH_TH 10880 /* 85% */
157#define IWL_RATE_INCREASE_TH 6400 /* 50% */ 157#define IWL_RATE_INCREASE_TH 6400 /* 50% */
158#define RS_SR_FORCE_DECREASE 1920 /* 15% */ 158#define RS_SR_FORCE_DECREASE 1920 /* 15% */
159#define RS_SR_NO_DECREASE 10880 /* 85% */
159 160
160#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 161#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
161#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 162#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
@@ -310,13 +311,20 @@ struct iwl_lq_sta {
310 u32 visited_columns; /* Bitmask marking which Tx columns were 311 u32 visited_columns; /* Bitmask marking which Tx columns were
311 * explored during a search cycle 312 * explored during a search cycle
312 */ 313 */
314 u64 last_tx;
313 bool is_vht; 315 bool is_vht;
314 enum ieee80211_band band; 316 enum ieee80211_band band;
315 317
316 /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */ 318 /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */
317 u16 active_legacy_rate; 319 unsigned long active_legacy_rate;
318 u16 active_siso_rate; 320 unsigned long active_siso_rate;
319 u16 active_mimo2_rate; 321 unsigned long active_mimo2_rate;
322
323 /* Highest rate per Tx mode */
324 u8 max_legacy_rate_idx;
325 u8 max_siso_rate_idx;
326 u8 max_mimo2_rate_idx;
327
320 s8 max_rate_idx; /* Max rate set by user */ 328 s8 max_rate_idx; /* Max rate set by user */
321 u8 missed_rate_counter; 329 u8 missed_rate_counter;
322 330
diff --git a/drivers/net/wireless/iwlwifi/mvm/sf.c b/drivers/net/wireless/iwlwifi/mvm/sf.c
index 8401627c0030..88809b2d1654 100644
--- a/drivers/net/wireless/iwlwifi/mvm/sf.c
+++ b/drivers/net/wireless/iwlwifi/mvm/sf.c
@@ -274,7 +274,8 @@ int iwl_mvm_sf_update(struct iwl_mvm *mvm, struct ieee80211_vif *changed_vif,
274 return -EINVAL; 274 return -EINVAL;
275 if (changed_vif->type != NL80211_IFTYPE_STATION) { 275 if (changed_vif->type != NL80211_IFTYPE_STATION) {
276 new_state = SF_UNINIT; 276 new_state = SF_UNINIT;
277 } else if (changed_vif->bss_conf.assoc) { 277 } else if (changed_vif->bss_conf.assoc &&
278 changed_vif->bss_conf.dtim_period) {
278 mvmvif = iwl_mvm_vif_from_mac80211(changed_vif); 279 mvmvif = iwl_mvm_vif_from_mac80211(changed_vif);
279 sta_id = mvmvif->ap_sta_id; 280 sta_id = mvmvif->ap_sta_id;
280 new_state = SF_FULL_ON; 281 new_state = SF_FULL_ON;
diff --git a/drivers/net/wireless/iwlwifi/pcie/drv.c b/drivers/net/wireless/iwlwifi/pcie/drv.c
index edb015c99049..3d1d57f9f5bc 100644
--- a/drivers/net/wireless/iwlwifi/pcie/drv.c
+++ b/drivers/net/wireless/iwlwifi/pcie/drv.c
@@ -373,12 +373,14 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
373 {IWL_PCI_DEVICE(0x095A, 0x500A, iwl7265_2n_cfg)}, 373 {IWL_PCI_DEVICE(0x095A, 0x500A, iwl7265_2n_cfg)},
374 {IWL_PCI_DEVICE(0x095B, 0x5200, iwl7265_2n_cfg)}, 374 {IWL_PCI_DEVICE(0x095B, 0x5200, iwl7265_2n_cfg)},
375 {IWL_PCI_DEVICE(0x095A, 0x5002, iwl7265_n_cfg)}, 375 {IWL_PCI_DEVICE(0x095A, 0x5002, iwl7265_n_cfg)},
376 {IWL_PCI_DEVICE(0x095A, 0x5102, iwl7265_n_cfg)},
376 {IWL_PCI_DEVICE(0x095B, 0x5202, iwl7265_n_cfg)}, 377 {IWL_PCI_DEVICE(0x095B, 0x5202, iwl7265_n_cfg)},
377 {IWL_PCI_DEVICE(0x095A, 0x9010, iwl7265_2ac_cfg)}, 378 {IWL_PCI_DEVICE(0x095A, 0x9010, iwl7265_2ac_cfg)},
378 {IWL_PCI_DEVICE(0x095A, 0x9012, iwl7265_2ac_cfg)}, 379 {IWL_PCI_DEVICE(0x095A, 0x9012, iwl7265_2ac_cfg)},
379 {IWL_PCI_DEVICE(0x095A, 0x9110, iwl7265_2ac_cfg)}, 380 {IWL_PCI_DEVICE(0x095A, 0x9110, iwl7265_2ac_cfg)},
380 {IWL_PCI_DEVICE(0x095A, 0x9112, iwl7265_2ac_cfg)}, 381 {IWL_PCI_DEVICE(0x095A, 0x9112, iwl7265_2ac_cfg)},
381 {IWL_PCI_DEVICE(0x095A, 0x9210, iwl7265_2ac_cfg)}, 382 {IWL_PCI_DEVICE(0x095A, 0x9210, iwl7265_2ac_cfg)},
383 {IWL_PCI_DEVICE(0x095A, 0x9200, iwl7265_2ac_cfg)},
382 {IWL_PCI_DEVICE(0x095A, 0x9510, iwl7265_2ac_cfg)}, 384 {IWL_PCI_DEVICE(0x095A, 0x9510, iwl7265_2ac_cfg)},
383 {IWL_PCI_DEVICE(0x095A, 0x9310, iwl7265_2ac_cfg)}, 385 {IWL_PCI_DEVICE(0x095A, 0x9310, iwl7265_2ac_cfg)},
384 {IWL_PCI_DEVICE(0x095A, 0x9410, iwl7265_2ac_cfg)}, 386 {IWL_PCI_DEVICE(0x095A, 0x9410, iwl7265_2ac_cfg)},
diff --git a/drivers/net/wireless/mwifiex/main.c b/drivers/net/wireless/mwifiex/main.c
index 77db0886c6e2..9c771b3e9918 100644
--- a/drivers/net/wireless/mwifiex/main.c
+++ b/drivers/net/wireless/mwifiex/main.c
@@ -292,6 +292,12 @@ process_start:
292 while ((skb = skb_dequeue(&adapter->usb_rx_data_q))) 292 while ((skb = skb_dequeue(&adapter->usb_rx_data_q)))
293 mwifiex_handle_rx_packet(adapter, skb); 293 mwifiex_handle_rx_packet(adapter, skb);
294 294
295 /* Check for event */
296 if (adapter->event_received) {
297 adapter->event_received = false;
298 mwifiex_process_event(adapter);
299 }
300
295 /* Check for Cmd Resp */ 301 /* Check for Cmd Resp */
296 if (adapter->cmd_resp_received) { 302 if (adapter->cmd_resp_received) {
297 adapter->cmd_resp_received = false; 303 adapter->cmd_resp_received = false;
@@ -304,12 +310,6 @@ process_start:
304 } 310 }
305 } 311 }
306 312
307 /* Check for event */
308 if (adapter->event_received) {
309 adapter->event_received = false;
310 mwifiex_process_event(adapter);
311 }
312
313 /* Check if we need to confirm Sleep Request 313 /* Check if we need to confirm Sleep Request
314 received previously */ 314 received previously */
315 if (adapter->ps_state == PS_STATE_PRE_SLEEP) { 315 if (adapter->ps_state == PS_STATE_PRE_SLEEP) {
diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c
index 894270611f2c..536c14aa71f3 100644
--- a/drivers/net/wireless/mwifiex/sta_ioctl.c
+++ b/drivers/net/wireless/mwifiex/sta_ioctl.c
@@ -60,9 +60,10 @@ int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter,
60 int status; 60 int status;
61 61
62 /* Wait for completion */ 62 /* Wait for completion */
63 status = wait_event_interruptible(adapter->cmd_wait_q.wait, 63 status = wait_event_interruptible_timeout(adapter->cmd_wait_q.wait,
64 *(cmd_queued->condition)); 64 *(cmd_queued->condition),
65 if (status) { 65 (12 * HZ));
66 if (status <= 0) {
66 dev_err(adapter->dev, "cmd_wait_q terminated: %d\n", status); 67 dev_err(adapter->dev, "cmd_wait_q terminated: %d\n", status);
67 mwifiex_cancel_all_pending_cmd(adapter); 68 mwifiex_cancel_all_pending_cmd(adapter);
68 return status; 69 return status;
diff --git a/drivers/net/wireless/rsi/rsi_91x_core.c b/drivers/net/wireless/rsi/rsi_91x_core.c
index 1a8d32138593..cf61d6e3eaa7 100644
--- a/drivers/net/wireless/rsi/rsi_91x_core.c
+++ b/drivers/net/wireless/rsi/rsi_91x_core.c
@@ -88,7 +88,7 @@ static u8 rsi_core_determine_hal_queue(struct rsi_common *common)
88 bool recontend_queue = false; 88 bool recontend_queue = false;
89 u32 q_len = 0; 89 u32 q_len = 0;
90 u8 q_num = INVALID_QUEUE; 90 u8 q_num = INVALID_QUEUE;
91 u8 ii, min = 0; 91 u8 ii = 0, min = 0;
92 92
93 if (skb_queue_len(&common->tx_queue[MGMT_SOFT_Q])) { 93 if (skb_queue_len(&common->tx_queue[MGMT_SOFT_Q])) {
94 if (!common->mgmt_q_block) 94 if (!common->mgmt_q_block)
diff --git a/drivers/net/wireless/rsi/rsi_91x_mgmt.c b/drivers/net/wireless/rsi/rsi_91x_mgmt.c
index 73694295648f..1b28cda6ca88 100644
--- a/drivers/net/wireless/rsi/rsi_91x_mgmt.c
+++ b/drivers/net/wireless/rsi/rsi_91x_mgmt.c
@@ -841,16 +841,6 @@ int rsi_set_channel(struct rsi_common *common, u16 channel)
841 rsi_dbg(MGMT_TX_ZONE, 841 rsi_dbg(MGMT_TX_ZONE,
842 "%s: Sending scan req frame\n", __func__); 842 "%s: Sending scan req frame\n", __func__);
843 843
844 skb = dev_alloc_skb(FRAME_DESC_SZ);
845 if (!skb) {
846 rsi_dbg(ERR_ZONE, "%s: Failed in allocation of skb\n",
847 __func__);
848 return -ENOMEM;
849 }
850
851 memset(skb->data, 0, FRAME_DESC_SZ);
852 mgmt_frame = (struct rsi_mac_frame *)skb->data;
853
854 if (common->band == IEEE80211_BAND_5GHZ) { 844 if (common->band == IEEE80211_BAND_5GHZ) {
855 if ((channel >= 36) && (channel <= 64)) 845 if ((channel >= 36) && (channel <= 64))
856 channel = ((channel - 32) / 4); 846 channel = ((channel - 32) / 4);
@@ -868,6 +858,16 @@ int rsi_set_channel(struct rsi_common *common, u16 channel)
868 } 858 }
869 } 859 }
870 860
861 skb = dev_alloc_skb(FRAME_DESC_SZ);
862 if (!skb) {
863 rsi_dbg(ERR_ZONE, "%s: Failed in allocation of skb\n",
864 __func__);
865 return -ENOMEM;
866 }
867
868 memset(skb->data, 0, FRAME_DESC_SZ);
869 mgmt_frame = (struct rsi_mac_frame *)skb->data;
870
871 mgmt_frame->desc_word[0] = cpu_to_le16(RSI_WIFI_MGMT_Q << 12); 871 mgmt_frame->desc_word[0] = cpu_to_le16(RSI_WIFI_MGMT_Q << 12);
872 mgmt_frame->desc_word[1] = cpu_to_le16(SCAN_REQUEST); 872 mgmt_frame->desc_word[1] = cpu_to_le16(SCAN_REQUEST);
873 mgmt_frame->desc_word[4] = cpu_to_le16(channel); 873 mgmt_frame->desc_word[4] = cpu_to_le16(channel);
@@ -966,6 +966,7 @@ static int rsi_send_auto_rate_request(struct rsi_common *common)
966 if (!selected_rates) { 966 if (!selected_rates) {
967 rsi_dbg(ERR_ZONE, "%s: Failed in allocation of mem\n", 967 rsi_dbg(ERR_ZONE, "%s: Failed in allocation of mem\n",
968 __func__); 968 __func__);
969 dev_kfree_skb(skb);
969 return -ENOMEM; 970 return -ENOMEM;
970 } 971 }
971 972
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index ddeb5a709aa3..a87ee9b6585a 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -621,20 +621,18 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
621 bss_conf->bssid); 621 bss_conf->bssid);
622 622
623 /* 623 /*
624 * Update the beacon. This is only required on USB devices. PCI
625 * devices fetch beacons periodically.
626 */
627 if (changes & BSS_CHANGED_BEACON && rt2x00_is_usb(rt2x00dev))
628 rt2x00queue_update_beacon(rt2x00dev, vif);
629
630 /*
631 * Start/stop beaconing. 624 * Start/stop beaconing.
632 */ 625 */
633 if (changes & BSS_CHANGED_BEACON_ENABLED) { 626 if (changes & BSS_CHANGED_BEACON_ENABLED) {
634 if (!bss_conf->enable_beacon && intf->enable_beacon) { 627 if (!bss_conf->enable_beacon && intf->enable_beacon) {
635 rt2x00queue_clear_beacon(rt2x00dev, vif);
636 rt2x00dev->intf_beaconing--; 628 rt2x00dev->intf_beaconing--;
637 intf->enable_beacon = false; 629 intf->enable_beacon = false;
630 /*
631 * Clear beacon in the H/W for this vif. This is needed
632 * to disable beaconing on this particular interface
633 * and keep it running on other interfaces.
634 */
635 rt2x00queue_clear_beacon(rt2x00dev, vif);
638 636
639 if (rt2x00dev->intf_beaconing == 0) { 637 if (rt2x00dev->intf_beaconing == 0) {
640 /* 638 /*
@@ -645,11 +643,15 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
645 rt2x00queue_stop_queue(rt2x00dev->bcn); 643 rt2x00queue_stop_queue(rt2x00dev->bcn);
646 mutex_unlock(&intf->beacon_skb_mutex); 644 mutex_unlock(&intf->beacon_skb_mutex);
647 } 645 }
648
649
650 } else if (bss_conf->enable_beacon && !intf->enable_beacon) { 646 } else if (bss_conf->enable_beacon && !intf->enable_beacon) {
651 rt2x00dev->intf_beaconing++; 647 rt2x00dev->intf_beaconing++;
652 intf->enable_beacon = true; 648 intf->enable_beacon = true;
649 /*
650 * Upload beacon to the H/W. This is only required on
651 * USB devices. PCI devices fetch beacons periodically.
652 */
653 if (rt2x00_is_usb(rt2x00dev))
654 rt2x00queue_update_beacon(rt2x00dev, vif);
653 655
654 if (rt2x00dev->intf_beaconing == 1) { 656 if (rt2x00dev->intf_beaconing == 1) {
655 /* 657 /*
diff --git a/drivers/net/wireless/rtlwifi/rtl8188ee/trx.c b/drivers/net/wireless/rtlwifi/rtl8188ee/trx.c
index 06ef47cd6203..5b4c225396f2 100644
--- a/drivers/net/wireless/rtlwifi/rtl8188ee/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8188ee/trx.c
@@ -293,7 +293,7 @@ static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
293 u8 *psaddr; 293 u8 *psaddr;
294 __le16 fc; 294 __le16 fc;
295 u16 type, ufc; 295 u16 type, ufc;
296 bool match_bssid, packet_toself, packet_beacon, addr; 296 bool match_bssid, packet_toself, packet_beacon = false, addr;
297 297
298 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift; 298 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
299 299
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
index 68b5c7e92cfb..07cb06da6729 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
@@ -1001,7 +1001,7 @@ int rtl92cu_hw_init(struct ieee80211_hw *hw)
1001 err = _rtl92cu_init_mac(hw); 1001 err = _rtl92cu_init_mac(hw);
1002 if (err) { 1002 if (err) {
1003 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n"); 1003 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n");
1004 return err; 1004 goto exit;
1005 } 1005 }
1006 err = rtl92c_download_fw(hw); 1006 err = rtl92c_download_fw(hw);
1007 if (err) { 1007 if (err) {
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
index 36b48be8329c..2b3c78baa9f8 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
@@ -49,6 +49,12 @@ static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
49 if (ieee80211_is_nullfunc(fc)) 49 if (ieee80211_is_nullfunc(fc))
50 return QSLT_HIGH; 50 return QSLT_HIGH;
51 51
52 /* Kernel commit 1bf4bbb4024dcdab changed EAPOL packets to use
53 * queue V0 at priority 7; however, the RTL8192SE appears to have
54 * that queue at priority 6
55 */
56 if (skb->priority == 7)
57 return QSLT_VO;
52 return skb->priority; 58 return skb->priority;
53} 59}
54 60
diff --git a/drivers/net/wireless/ti/wl18xx/event.h b/drivers/net/wireless/ti/wl18xx/event.h
index 398f3d2c0a6c..a76e98eb8372 100644
--- a/drivers/net/wireless/ti/wl18xx/event.h
+++ b/drivers/net/wireless/ti/wl18xx/event.h
@@ -68,6 +68,26 @@ struct wl18xx_event_mailbox {
68 68
69 /* bitmap of inactive stations (by HLID) */ 69 /* bitmap of inactive stations (by HLID) */
70 __le32 inactive_sta_bitmap; 70 __le32 inactive_sta_bitmap;
71
72 /* rx BA win size indicated by RX_BA_WIN_SIZE_CHANGE_EVENT_ID */
73 u8 rx_ba_role_id;
74 u8 rx_ba_link_id;
75 u8 rx_ba_win_size;
76 u8 padding;
77
78 /* smart config */
79 u8 sc_ssid_len;
80 u8 sc_pwd_len;
81 u8 sc_token_len;
82 u8 padding1;
83 u8 sc_ssid[32];
84 u8 sc_pwd[32];
85 u8 sc_token[32];
86
87 /* smart config sync channel */
88 u8 sc_sync_channel;
89 u8 sc_sync_band;
90 u8 padding2[2];
71} __packed; 91} __packed;
72 92
73int wl18xx_wait_for_event(struct wl1271 *wl, enum wlcore_wait_event event, 93int wl18xx_wait_for_event(struct wl1271 *wl, enum wlcore_wait_event event,
diff --git a/drivers/net/wireless/ti/wlcore/event.c b/drivers/net/wireless/ti/wlcore/event.c
index 1f9a36031b06..16d10281798d 100644
--- a/drivers/net/wireless/ti/wlcore/event.c
+++ b/drivers/net/wireless/ti/wlcore/event.c
@@ -158,6 +158,11 @@ EXPORT_SYMBOL_GPL(wlcore_event_channel_switch);
158 158
159void wlcore_event_dummy_packet(struct wl1271 *wl) 159void wlcore_event_dummy_packet(struct wl1271 *wl)
160{ 160{
161 if (wl->plt) {
162 wl1271_info("Got DUMMY_PACKET event in PLT mode. FW bug, ignoring.");
163 return;
164 }
165
161 wl1271_debug(DEBUG_EVENT, "DUMMY_PACKET_ID_EVENT_ID"); 166 wl1271_debug(DEBUG_EVENT, "DUMMY_PACKET_ID_EVENT_ID");
162 wl1271_tx_dummy_packet(wl); 167 wl1271_tx_dummy_packet(wl);
163} 168}
diff --git a/drivers/of/base.c b/drivers/of/base.c
index f72d19b7e5d2..6d4ee22708c9 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1828,17 +1828,13 @@ int of_update_property(struct device_node *np, struct property *newprop)
1828 next = &(*next)->next; 1828 next = &(*next)->next;
1829 } 1829 }
1830 raw_spin_unlock_irqrestore(&devtree_lock, flags); 1830 raw_spin_unlock_irqrestore(&devtree_lock, flags);
1831 if (rc) 1831 if (!found)
1832 return rc; 1832 return -ENODEV;
1833 1833
1834 /* Update the sysfs attribute */ 1834 /* Update the sysfs attribute */
1835 if (oldprop) 1835 sysfs_remove_bin_file(&np->kobj, &oldprop->attr);
1836 sysfs_remove_bin_file(&np->kobj, &oldprop->attr);
1837 __of_add_property_sysfs(np, newprop); 1836 __of_add_property_sysfs(np, newprop);
1838 1837
1839 if (!found)
1840 return -ENODEV;
1841
1842 return 0; 1838 return 0;
1843} 1839}
1844 1840
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index fa16a912a927..7a2ef7bb8022 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -491,7 +491,7 @@ static int __init __reserved_mem_reserve_reg(unsigned long node,
491 * in /reserved-memory matches the values supported by the current implementation, 491 * in /reserved-memory matches the values supported by the current implementation,
492 * also check if ranges property has been provided 492 * also check if ranges property has been provided
493 */ 493 */
494static int __reserved_mem_check_root(unsigned long node) 494static int __init __reserved_mem_check_root(unsigned long node)
495{ 495{
496 __be32 *prop; 496 __be32 *prop;
497 497
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 9bcf2cf19357..5aeb89411350 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -364,7 +364,7 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
364 364
365 memset(r, 0, sizeof(*r)); 365 memset(r, 0, sizeof(*r));
366 /* 366 /*
367 * Get optional "interrupts-names" property to add a name 367 * Get optional "interrupt-names" property to add a name
368 * to the resource. 368 * to the resource.
369 */ 369 */
370 of_property_read_string_index(dev, "interrupt-names", index, 370 of_property_read_string_index(dev, "interrupt-names", index,
@@ -380,6 +380,32 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
380EXPORT_SYMBOL_GPL(of_irq_to_resource); 380EXPORT_SYMBOL_GPL(of_irq_to_resource);
381 381
382/** 382/**
383 * of_irq_get - Decode a node's IRQ and return it as a Linux irq number
384 * @dev: pointer to device tree node
385 * @index: zero-based index of the irq
386 *
387 * Returns Linux irq number on success, or -EPROBE_DEFER if the irq domain
388 * is not yet created.
389 *
390 */
391int of_irq_get(struct device_node *dev, int index)
392{
393 int rc;
394 struct of_phandle_args oirq;
395 struct irq_domain *domain;
396
397 rc = of_irq_parse_one(dev, index, &oirq);
398 if (rc)
399 return rc;
400
401 domain = irq_find_host(oirq.np);
402 if (!domain)
403 return -EPROBE_DEFER;
404
405 return irq_create_of_mapping(&oirq);
406}
407
408/**
383 * of_irq_count - Count the number of IRQs a node uses 409 * of_irq_count - Count the number of IRQs a node uses
384 * @dev: pointer to device tree node 410 * @dev: pointer to device tree node
385 */ 411 */
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index 404d1daebefa..bd47fbc53dc9 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -168,7 +168,9 @@ struct platform_device *of_device_alloc(struct device_node *np,
168 rc = of_address_to_resource(np, i, res); 168 rc = of_address_to_resource(np, i, res);
169 WARN_ON(rc); 169 WARN_ON(rc);
170 } 170 }
171 WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq); 171 if (of_irq_to_resource_table(np, res, num_irq) != num_irq)
172 pr_debug("not all legacy IRQ resources mapped for %s\n",
173 np->name);
172 } 174 }
173 175
174 dev->dev.of_node = of_node_get(np); 176 dev->dev.of_node = of_node_get(np);
diff --git a/drivers/of/selftest.c b/drivers/of/selftest.c
index ae4450070503..fe70b86bcffb 100644
--- a/drivers/of/selftest.c
+++ b/drivers/of/selftest.c
@@ -10,6 +10,7 @@
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/of.h> 11#include <linux/of.h>
12#include <linux/of_irq.h> 12#include <linux/of_irq.h>
13#include <linux/of_platform.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/mutex.h> 15#include <linux/mutex.h>
15#include <linux/slab.h> 16#include <linux/slab.h>
@@ -427,6 +428,36 @@ static void __init of_selftest_match_node(void)
427 } 428 }
428} 429}
429 430
431static void __init of_selftest_platform_populate(void)
432{
433 int irq;
434 struct device_node *np;
435 struct platform_device *pdev;
436
437 np = of_find_node_by_path("/testcase-data");
438 of_platform_populate(np, of_default_bus_match_table, NULL, NULL);
439
440 /* Test that a missing irq domain returns -EPROBE_DEFER */
441 np = of_find_node_by_path("/testcase-data/testcase-device1");
442 pdev = of_find_device_by_node(np);
443 if (!pdev)
444 selftest(0, "device 1 creation failed\n");
445 irq = platform_get_irq(pdev, 0);
446 if (irq != -EPROBE_DEFER)
447 selftest(0, "device deferred probe failed - %d\n", irq);
448
449 /* Test that a parsing failure does not return -EPROBE_DEFER */
450 np = of_find_node_by_path("/testcase-data/testcase-device2");
451 pdev = of_find_device_by_node(np);
452 if (!pdev)
453 selftest(0, "device 2 creation failed\n");
454 irq = platform_get_irq(pdev, 0);
455 if (irq >= 0 || irq == -EPROBE_DEFER)
456 selftest(0, "device parsing error failed - %d\n", irq);
457
458 selftest(1, "passed");
459}
460
430static int __init of_selftest(void) 461static int __init of_selftest(void)
431{ 462{
432 struct device_node *np; 463 struct device_node *np;
@@ -445,6 +476,7 @@ static int __init of_selftest(void)
445 of_selftest_parse_interrupts(); 476 of_selftest_parse_interrupts();
446 of_selftest_parse_interrupts_extended(); 477 of_selftest_parse_interrupts_extended();
447 of_selftest_match_node(); 478 of_selftest_match_node();
479 of_selftest_platform_populate();
448 pr_info("end of selftest - %i passed, %i failed\n", 480 pr_info("end of selftest - %i passed, %i failed\n",
449 selftest_results.passed, selftest_results.failed); 481 selftest_results.passed, selftest_results.failed);
450 return 0; 482 return 0;
diff --git a/drivers/of/testcase-data/tests-interrupts.dtsi b/drivers/of/testcase-data/tests-interrupts.dtsi
index c843720bd3e5..da4695f60351 100644
--- a/drivers/of/testcase-data/tests-interrupts.dtsi
+++ b/drivers/of/testcase-data/tests-interrupts.dtsi
@@ -54,5 +54,18 @@
54 <&test_intmap1 1 2>; 54 <&test_intmap1 1 2>;
55 }; 55 };
56 }; 56 };
57
58 testcase-device1 {
59 compatible = "testcase-device";
60 interrupt-parent = <&test_intc0>;
61 interrupts = <1>;
62 };
63
64 testcase-device2 {
65 compatible = "testcase-device";
66 interrupt-parent = <&test_intc2>;
67 interrupts = <1>; /* invalid specifier - too short */
68 };
57 }; 69 };
70
58}; 71};
diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index fd3e3ab56509..4fe349dcaf59 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -15,6 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/of_pci.h>
18#include <linux/pci.h> 19#include <linux/pci.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/pm_runtime.h> 21#include <linux/pm_runtime.h>
@@ -180,8 +181,13 @@ static int rcar_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
180{ 181{
181 struct pci_sys_data *sys = dev->bus->sysdata; 182 struct pci_sys_data *sys = dev->bus->sysdata;
182 struct rcar_pci_priv *priv = sys->private_data; 183 struct rcar_pci_priv *priv = sys->private_data;
184 int irq;
185
186 irq = of_irq_parse_and_map_pci(dev, slot, pin);
187 if (!irq)
188 irq = priv->irq;
183 189
184 return priv->irq; 190 return irq;
185} 191}
186 192
187#ifdef CONFIG_PCI_DEBUG 193#ifdef CONFIG_PCI_DEBUG
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 330f7e3a32dd..083cf37ca047 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -639,10 +639,15 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
639static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin) 639static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
640{ 640{
641 struct tegra_pcie *pcie = sys_to_pcie(pdev->bus->sysdata); 641 struct tegra_pcie *pcie = sys_to_pcie(pdev->bus->sysdata);
642 int irq;
642 643
643 tegra_cpuidle_pcie_irqs_in_use(); 644 tegra_cpuidle_pcie_irqs_in_use();
644 645
645 return pcie->irq; 646 irq = of_irq_parse_and_map_pci(pdev, slot, pin);
647 if (!irq)
648 irq = pcie->irq;
649
650 return irq;
646} 651}
647 652
648static void tegra_pcie_add_bus(struct pci_bus *bus) 653static void tegra_pcie_add_bus(struct pci_bus *bus)
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 509a29d84509..c4e373294476 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -17,6 +17,7 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/msi.h> 18#include <linux/msi.h>
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_pci.h>
20#include <linux/pci.h> 21#include <linux/pci.h>
21#include <linux/pci_regs.h> 22#include <linux/pci_regs.h>
22#include <linux/types.h> 23#include <linux/types.h>
@@ -490,7 +491,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
490 dw_pci.nr_controllers = 1; 491 dw_pci.nr_controllers = 1;
491 dw_pci.private_data = (void **)&pp; 492 dw_pci.private_data = (void **)&pp;
492 493
493 pci_common_init(&dw_pci); 494 pci_common_init_dev(pp->dev, &dw_pci);
494 pci_assign_unassigned_resources(); 495 pci_assign_unassigned_resources();
495#ifdef CONFIG_PCI_DOMAINS 496#ifdef CONFIG_PCI_DOMAINS
496 dw_pci.domain++; 497 dw_pci.domain++;
@@ -520,13 +521,13 @@ static void dw_pcie_prog_viewport_cfg1(struct pcie_port *pp, u32 busdev)
520 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, 521 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
521 PCIE_ATU_VIEWPORT); 522 PCIE_ATU_VIEWPORT);
522 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1); 523 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1);
523 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
524 dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE); 524 dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE);
525 dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE); 525 dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE);
526 dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1, 526 dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1,
527 PCIE_ATU_LIMIT); 527 PCIE_ATU_LIMIT);
528 dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); 528 dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET);
529 dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); 529 dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET);
530 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
530} 531}
531 532
532static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp) 533static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
@@ -535,7 +536,6 @@ static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
535 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, 536 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0,
536 PCIE_ATU_VIEWPORT); 537 PCIE_ATU_VIEWPORT);
537 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1); 538 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1);
538 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
539 dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE); 539 dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE);
540 dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE); 540 dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE);
541 dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1, 541 dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1,
@@ -543,6 +543,7 @@ static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
543 dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET); 543 dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET);
544 dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr), 544 dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr),
545 PCIE_ATU_UPPER_TARGET); 545 PCIE_ATU_UPPER_TARGET);
546 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
546} 547}
547 548
548static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp) 549static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
@@ -551,7 +552,6 @@ static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
551 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, 552 dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
552 PCIE_ATU_VIEWPORT); 553 PCIE_ATU_VIEWPORT);
553 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1); 554 dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1);
554 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
555 dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE); 555 dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE);
556 dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE); 556 dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE);
557 dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1, 557 dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1,
@@ -559,6 +559,7 @@ static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
559 dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET); 559 dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET);
560 dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr), 560 dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr),
561 PCIE_ATU_UPPER_TARGET); 561 PCIE_ATU_UPPER_TARGET);
562 dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
562} 563}
563 564
564static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, 565static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
@@ -723,7 +724,7 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
723 724
724 if (pp) { 725 if (pp) {
725 pp->root_bus_nr = sys->busnr; 726 pp->root_bus_nr = sys->busnr;
726 bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops, 727 bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
727 sys, &sys->resources); 728 sys, &sys->resources);
728 } else { 729 } else {
729 bus = NULL; 730 bus = NULL;
@@ -736,8 +737,13 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
736static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 737static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
737{ 738{
738 struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); 739 struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
740 int irq;
741
742 irq = of_irq_parse_and_map_pci(dev, slot, pin);
743 if (!irq)
744 irq = pp->irq;
739 745
740 return pp->irq; 746 return irq;
741} 747}
742 748
743static void dw_pcie_add_bus(struct pci_bus *bus) 749static void dw_pcie_add_bus(struct pci_bus *bus)
@@ -764,7 +770,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
764 u32 membase; 770 u32 membase;
765 u32 memlimit; 771 u32 memlimit;
766 772
767 /* set the number of lines as 4 */ 773 /* set the number of lanes */
768 dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val); 774 dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val);
769 val &= ~PORT_LINK_MODE_MASK; 775 val &= ~PORT_LINK_MODE_MASK;
770 switch (pp->lanes) { 776 switch (pp->lanes) {
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3bb05f17b9b4..4906c27fa3bd 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -33,6 +33,7 @@ config PHY_MVEBU_SATA
33 33
34config OMAP_CONTROL_PHY 34config OMAP_CONTROL_PHY
35 tristate "OMAP CONTROL PHY Driver" 35 tristate "OMAP CONTROL PHY Driver"
36 depends on ARCH_OMAP2PLUS || COMPILE_TEST
36 help 37 help
37 Enable this to add support for the PHY part present in the control 38 Enable this to add support for the PHY part present in the control
38 module. This driver has API to power on the USB2 PHY and to write to 39 module. This driver has API to power on the USB2 PHY and to write to
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 2faf78edc864..7728518572a4 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -13,8 +13,9 @@ obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
13obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o 13obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
14obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o 14obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o
15obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o 15obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o
16obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-samsung-usb2.o 16obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
17obj-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o 17phy-exynos-usb2-y += phy-samsung-usb2.o
18obj-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o 18phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
19obj-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o 19phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o
20phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o
20obj-$(CONFIG_PHY_XGENE) += phy-xgene.o 21obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 623b71c54b3e..c64a2f3b2d62 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -64,6 +64,9 @@ static struct phy *phy_lookup(struct device *device, const char *port)
64 class_dev_iter_init(&iter, phy_class, NULL, NULL); 64 class_dev_iter_init(&iter, phy_class, NULL, NULL);
65 while ((dev = class_dev_iter_next(&iter))) { 65 while ((dev = class_dev_iter_next(&iter))) {
66 phy = to_phy(dev); 66 phy = to_phy(dev);
67
68 if (!phy->init_data)
69 continue;
67 count = phy->init_data->num_consumers; 70 count = phy->init_data->num_consumers;
68 consumers = phy->init_data->consumers; 71 consumers = phy->init_data->consumers;
69 while (count--) { 72 while (count--) {
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index e49324032611..e00c02d0a094 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -104,16 +104,16 @@ config PINCTRL_BCM2835
104 select PINMUX 104 select PINMUX
105 select PINCONF 105 select PINCONF
106 106
107config PINCTRL_CAPRI 107config PINCTRL_BCM281XX
108 bool "Broadcom Capri pinctrl driver" 108 bool "Broadcom BCM281xx pinctrl driver"
109 depends on OF 109 depends on OF
110 select PINMUX 110 select PINMUX
111 select PINCONF 111 select PINCONF
112 select GENERIC_PINCONF 112 select GENERIC_PINCONF
113 select REGMAP_MMIO 113 select REGMAP_MMIO
114 help 114 help
115 Say Y here to support Broadcom Capri pinctrl driver, which is used for 115 Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
116 the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351, 116 for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
117 BCM28145, and BCM28155 SoCs. This driver requires the pinctrl 117 BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
118 framework. GPIO is provided by a separate GPIO driver. 118 framework. GPIO is provided by a separate GPIO driver.
119 119
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 4b835880cf80..6d3fd62b9ae8 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -21,7 +21,7 @@ obj-$(CONFIG_PINCTRL_BF60x) += pinctrl-adi2-bf60x.o
21obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o 21obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
22obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o 22obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
23obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o 23obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
24obj-$(CONFIG_PINCTRL_CAPRI) += pinctrl-capri.o 24obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
25obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o 25obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o
26obj-$(CONFIG_PINCTRL_IMX1_CORE) += pinctrl-imx1-core.o 26obj-$(CONFIG_PINCTRL_IMX1_CORE) += pinctrl-imx1-core.o
27obj-$(CONFIG_PINCTRL_IMX27) += pinctrl-imx27.o 27obj-$(CONFIG_PINCTRL_IMX27) += pinctrl-imx27.o
diff --git a/drivers/pinctrl/pinctrl-as3722.c b/drivers/pinctrl/pinctrl-as3722.c
index 92ed4b2e3c07..c862f9c0e9ce 100644
--- a/drivers/pinctrl/pinctrl-as3722.c
+++ b/drivers/pinctrl/pinctrl-as3722.c
@@ -64,7 +64,6 @@ struct as3722_pin_function {
64}; 64};
65 65
66struct as3722_gpio_pin_control { 66struct as3722_gpio_pin_control {
67 bool enable_gpio_invert;
68 unsigned mode_prop; 67 unsigned mode_prop;
69 int io_function; 68 int io_function;
70}; 69};
@@ -320,10 +319,8 @@ static int as3722_pinctrl_gpio_set_direction(struct pinctrl_dev *pctldev,
320 return mode; 319 return mode;
321 } 320 }
322 321
323 if (as_pci->gpio_control[offset].enable_gpio_invert) 322 return as3722_update_bits(as3722, AS3722_GPIOn_CONTROL_REG(offset),
324 mode |= AS3722_GPIO_INV; 323 AS3722_GPIO_MODE_MASK, mode);
325
326 return as3722_write(as3722, AS3722_GPIOn_CONTROL_REG(offset), mode);
327} 324}
328 325
329static const struct pinmux_ops as3722_pinmux_ops = { 326static const struct pinmux_ops as3722_pinmux_ops = {
@@ -496,10 +493,18 @@ static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset,
496{ 493{
497 struct as3722_pctrl_info *as_pci = to_as_pci(chip); 494 struct as3722_pctrl_info *as_pci = to_as_pci(chip);
498 struct as3722 *as3722 = as_pci->as3722; 495 struct as3722 *as3722 = as_pci->as3722;
499 int en_invert = as_pci->gpio_control[offset].enable_gpio_invert; 496 int en_invert;
500 u32 val; 497 u32 val;
501 int ret; 498 int ret;
502 499
500 ret = as3722_read(as3722, AS3722_GPIOn_CONTROL_REG(offset), &val);
501 if (ret < 0) {
502 dev_err(as_pci->dev,
503 "GPIO_CONTROL%d_REG read failed: %d\n", offset, ret);
504 return;
505 }
506 en_invert = !!(val & AS3722_GPIO_INV);
507
503 if (value) 508 if (value)
504 val = (en_invert) ? 0 : AS3722_GPIOn_SIGNAL(offset); 509 val = (en_invert) ? 0 : AS3722_GPIOn_SIGNAL(offset);
505 else 510 else
diff --git a/drivers/pinctrl/pinctrl-bcm281xx.c b/drivers/pinctrl/pinctrl-bcm281xx.c
new file mode 100644
index 000000000000..3bed792b2c03
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-bcm281xx.c
@@ -0,0 +1,1461 @@
1/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#include <linux/err.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/platform_device.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/pinctrl/pinmux.h>
20#include <linux/pinctrl/pinconf.h>
21#include <linux/pinctrl/pinconf-generic.h>
22#include <linux/regmap.h>
23#include <linux/slab.h>
24#include "core.h"
25#include "pinctrl-utils.h"
26
27/* BCM281XX Pin Control Registers Definitions */
28
29/* Function Select bits are the same for all pin control registers */
30#define BCM281XX_PIN_REG_F_SEL_MASK 0x0700
31#define BCM281XX_PIN_REG_F_SEL_SHIFT 8
32
33/* Standard pin register */
34#define BCM281XX_STD_PIN_REG_DRV_STR_MASK 0x0007
35#define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT 0
36#define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK 0x0008
37#define BCM281XX_STD_PIN_REG_INPUT_DIS_SHIFT 3
38#define BCM281XX_STD_PIN_REG_SLEW_MASK 0x0010
39#define BCM281XX_STD_PIN_REG_SLEW_SHIFT 4
40#define BCM281XX_STD_PIN_REG_PULL_UP_MASK 0x0020
41#define BCM281XX_STD_PIN_REG_PULL_UP_SHIFT 5
42#define BCM281XX_STD_PIN_REG_PULL_DN_MASK 0x0040
43#define BCM281XX_STD_PIN_REG_PULL_DN_SHIFT 6
44#define BCM281XX_STD_PIN_REG_HYST_MASK 0x0080
45#define BCM281XX_STD_PIN_REG_HYST_SHIFT 7
46
47/* I2C pin register */
48#define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
49#define BCM281XX_I2C_PIN_REG_INPUT_DIS_SHIFT 2
50#define BCM281XX_I2C_PIN_REG_SLEW_MASK 0x0008
51#define BCM281XX_I2C_PIN_REG_SLEW_SHIFT 3
52#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_MASK 0x0070
53#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_SHIFT 4
54
55/* HDMI pin register */
56#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_MASK 0x0008
57#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_SHIFT 3
58#define BCM281XX_HDMI_PIN_REG_MODE_MASK 0x0010
59#define BCM281XX_HDMI_PIN_REG_MODE_SHIFT 4
60
61/**
62 * bcm281xx_pin_type - types of pin register
63 */
64enum bcm281xx_pin_type {
65 BCM281XX_PIN_TYPE_UNKNOWN = 0,
66 BCM281XX_PIN_TYPE_STD,
67 BCM281XX_PIN_TYPE_I2C,
68 BCM281XX_PIN_TYPE_HDMI,
69};
70
71static enum bcm281xx_pin_type std_pin = BCM281XX_PIN_TYPE_STD;
72static enum bcm281xx_pin_type i2c_pin = BCM281XX_PIN_TYPE_I2C;
73static enum bcm281xx_pin_type hdmi_pin = BCM281XX_PIN_TYPE_HDMI;
74
75/**
76 * bcm281xx_pin_function- define pin function
77 */
78struct bcm281xx_pin_function {
79 const char *name;
80 const char * const *groups;
81 const unsigned ngroups;
82};
83
84/**
85 * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
86 * @reg_base - base of pinctrl registers
87 */
88struct bcm281xx_pinctrl_data {
89 void __iomem *reg_base;
90
91 /* List of all pins */
92 const struct pinctrl_pin_desc *pins;
93 const unsigned npins;
94
95 const struct bcm281xx_pin_function *functions;
96 const unsigned nfunctions;
97
98 struct regmap *regmap;
99};
100
101/*
102 * Pin number definition. The order here must be the same as defined in the
103 * PADCTRLREG block in the RDB.
104 */
105#define BCM281XX_PIN_ADCSYNC 0
106#define BCM281XX_PIN_BAT_RM 1
107#define BCM281XX_PIN_BSC1_SCL 2
108#define BCM281XX_PIN_BSC1_SDA 3
109#define BCM281XX_PIN_BSC2_SCL 4
110#define BCM281XX_PIN_BSC2_SDA 5
111#define BCM281XX_PIN_CLASSGPWR 6
112#define BCM281XX_PIN_CLK_CX8 7
113#define BCM281XX_PIN_CLKOUT_0 8
114#define BCM281XX_PIN_CLKOUT_1 9
115#define BCM281XX_PIN_CLKOUT_2 10
116#define BCM281XX_PIN_CLKOUT_3 11
117#define BCM281XX_PIN_CLKREQ_IN_0 12
118#define BCM281XX_PIN_CLKREQ_IN_1 13
119#define BCM281XX_PIN_CWS_SYS_REQ1 14
120#define BCM281XX_PIN_CWS_SYS_REQ2 15
121#define BCM281XX_PIN_CWS_SYS_REQ3 16
122#define BCM281XX_PIN_DIGMIC1_CLK 17
123#define BCM281XX_PIN_DIGMIC1_DQ 18
124#define BCM281XX_PIN_DIGMIC2_CLK 19
125#define BCM281XX_PIN_DIGMIC2_DQ 20
126#define BCM281XX_PIN_GPEN13 21
127#define BCM281XX_PIN_GPEN14 22
128#define BCM281XX_PIN_GPEN15 23
129#define BCM281XX_PIN_GPIO00 24
130#define BCM281XX_PIN_GPIO01 25
131#define BCM281XX_PIN_GPIO02 26
132#define BCM281XX_PIN_GPIO03 27
133#define BCM281XX_PIN_GPIO04 28
134#define BCM281XX_PIN_GPIO05 29
135#define BCM281XX_PIN_GPIO06 30
136#define BCM281XX_PIN_GPIO07 31
137#define BCM281XX_PIN_GPIO08 32
138#define BCM281XX_PIN_GPIO09 33
139#define BCM281XX_PIN_GPIO10 34
140#define BCM281XX_PIN_GPIO11 35
141#define BCM281XX_PIN_GPIO12 36
142#define BCM281XX_PIN_GPIO13 37
143#define BCM281XX_PIN_GPIO14 38
144#define BCM281XX_PIN_GPS_PABLANK 39
145#define BCM281XX_PIN_GPS_TMARK 40
146#define BCM281XX_PIN_HDMI_SCL 41
147#define BCM281XX_PIN_HDMI_SDA 42
148#define BCM281XX_PIN_IC_DM 43
149#define BCM281XX_PIN_IC_DP 44
150#define BCM281XX_PIN_KP_COL_IP_0 45
151#define BCM281XX_PIN_KP_COL_IP_1 46
152#define BCM281XX_PIN_KP_COL_IP_2 47
153#define BCM281XX_PIN_KP_COL_IP_3 48
154#define BCM281XX_PIN_KP_ROW_OP_0 49
155#define BCM281XX_PIN_KP_ROW_OP_1 50
156#define BCM281XX_PIN_KP_ROW_OP_2 51
157#define BCM281XX_PIN_KP_ROW_OP_3 52
158#define BCM281XX_PIN_LCD_B_0 53
159#define BCM281XX_PIN_LCD_B_1 54
160#define BCM281XX_PIN_LCD_B_2 55
161#define BCM281XX_PIN_LCD_B_3 56
162#define BCM281XX_PIN_LCD_B_4 57
163#define BCM281XX_PIN_LCD_B_5 58
164#define BCM281XX_PIN_LCD_B_6 59
165#define BCM281XX_PIN_LCD_B_7 60
166#define BCM281XX_PIN_LCD_G_0 61
167#define BCM281XX_PIN_LCD_G_1 62
168#define BCM281XX_PIN_LCD_G_2 63
169#define BCM281XX_PIN_LCD_G_3 64
170#define BCM281XX_PIN_LCD_G_4 65
171#define BCM281XX_PIN_LCD_G_5 66
172#define BCM281XX_PIN_LCD_G_6 67
173#define BCM281XX_PIN_LCD_G_7 68
174#define BCM281XX_PIN_LCD_HSYNC 69
175#define BCM281XX_PIN_LCD_OE 70
176#define BCM281XX_PIN_LCD_PCLK 71
177#define BCM281XX_PIN_LCD_R_0 72
178#define BCM281XX_PIN_LCD_R_1 73
179#define BCM281XX_PIN_LCD_R_2 74
180#define BCM281XX_PIN_LCD_R_3 75
181#define BCM281XX_PIN_LCD_R_4 76
182#define BCM281XX_PIN_LCD_R_5 77
183#define BCM281XX_PIN_LCD_R_6 78
184#define BCM281XX_PIN_LCD_R_7 79
185#define BCM281XX_PIN_LCD_VSYNC 80
186#define BCM281XX_PIN_MDMGPIO0 81
187#define BCM281XX_PIN_MDMGPIO1 82
188#define BCM281XX_PIN_MDMGPIO2 83
189#define BCM281XX_PIN_MDMGPIO3 84
190#define BCM281XX_PIN_MDMGPIO4 85
191#define BCM281XX_PIN_MDMGPIO5 86
192#define BCM281XX_PIN_MDMGPIO6 87
193#define BCM281XX_PIN_MDMGPIO7 88
194#define BCM281XX_PIN_MDMGPIO8 89
195#define BCM281XX_PIN_MPHI_DATA_0 90
196#define BCM281XX_PIN_MPHI_DATA_1 91
197#define BCM281XX_PIN_MPHI_DATA_2 92
198#define BCM281XX_PIN_MPHI_DATA_3 93
199#define BCM281XX_PIN_MPHI_DATA_4 94
200#define BCM281XX_PIN_MPHI_DATA_5 95
201#define BCM281XX_PIN_MPHI_DATA_6 96
202#define BCM281XX_PIN_MPHI_DATA_7 97
203#define BCM281XX_PIN_MPHI_DATA_8 98
204#define BCM281XX_PIN_MPHI_DATA_9 99
205#define BCM281XX_PIN_MPHI_DATA_10 100
206#define BCM281XX_PIN_MPHI_DATA_11 101
207#define BCM281XX_PIN_MPHI_DATA_12 102
208#define BCM281XX_PIN_MPHI_DATA_13 103
209#define BCM281XX_PIN_MPHI_DATA_14 104
210#define BCM281XX_PIN_MPHI_DATA_15 105
211#define BCM281XX_PIN_MPHI_HA0 106
212#define BCM281XX_PIN_MPHI_HAT0 107
213#define BCM281XX_PIN_MPHI_HAT1 108
214#define BCM281XX_PIN_MPHI_HCE0_N 109
215#define BCM281XX_PIN_MPHI_HCE1_N 110
216#define BCM281XX_PIN_MPHI_HRD_N 111
217#define BCM281XX_PIN_MPHI_HWR_N 112
218#define BCM281XX_PIN_MPHI_RUN0 113
219#define BCM281XX_PIN_MPHI_RUN1 114
220#define BCM281XX_PIN_MTX_SCAN_CLK 115
221#define BCM281XX_PIN_MTX_SCAN_DATA 116
222#define BCM281XX_PIN_NAND_AD_0 117
223#define BCM281XX_PIN_NAND_AD_1 118
224#define BCM281XX_PIN_NAND_AD_2 119
225#define BCM281XX_PIN_NAND_AD_3 120
226#define BCM281XX_PIN_NAND_AD_4 121
227#define BCM281XX_PIN_NAND_AD_5 122
228#define BCM281XX_PIN_NAND_AD_6 123
229#define BCM281XX_PIN_NAND_AD_7 124
230#define BCM281XX_PIN_NAND_ALE 125
231#define BCM281XX_PIN_NAND_CEN_0 126
232#define BCM281XX_PIN_NAND_CEN_1 127
233#define BCM281XX_PIN_NAND_CLE 128
234#define BCM281XX_PIN_NAND_OEN 129
235#define BCM281XX_PIN_NAND_RDY_0 130
236#define BCM281XX_PIN_NAND_RDY_1 131
237#define BCM281XX_PIN_NAND_WEN 132
238#define BCM281XX_PIN_NAND_WP 133
239#define BCM281XX_PIN_PC1 134
240#define BCM281XX_PIN_PC2 135
241#define BCM281XX_PIN_PMU_INT 136
242#define BCM281XX_PIN_PMU_SCL 137
243#define BCM281XX_PIN_PMU_SDA 138
244#define BCM281XX_PIN_RFST2G_MTSLOTEN3G 139
245#define BCM281XX_PIN_RGMII_0_RX_CTL 140
246#define BCM281XX_PIN_RGMII_0_RXC 141
247#define BCM281XX_PIN_RGMII_0_RXD_0 142
248#define BCM281XX_PIN_RGMII_0_RXD_1 143
249#define BCM281XX_PIN_RGMII_0_RXD_2 144
250#define BCM281XX_PIN_RGMII_0_RXD_3 145
251#define BCM281XX_PIN_RGMII_0_TX_CTL 146
252#define BCM281XX_PIN_RGMII_0_TXC 147
253#define BCM281XX_PIN_RGMII_0_TXD_0 148
254#define BCM281XX_PIN_RGMII_0_TXD_1 149
255#define BCM281XX_PIN_RGMII_0_TXD_2 150
256#define BCM281XX_PIN_RGMII_0_TXD_3 151
257#define BCM281XX_PIN_RGMII_1_RX_CTL 152
258#define BCM281XX_PIN_RGMII_1_RXC 153
259#define BCM281XX_PIN_RGMII_1_RXD_0 154
260#define BCM281XX_PIN_RGMII_1_RXD_1 155
261#define BCM281XX_PIN_RGMII_1_RXD_2 156
262#define BCM281XX_PIN_RGMII_1_RXD_3 157
263#define BCM281XX_PIN_RGMII_1_TX_CTL 158
264#define BCM281XX_PIN_RGMII_1_TXC 159
265#define BCM281XX_PIN_RGMII_1_TXD_0 160
266#define BCM281XX_PIN_RGMII_1_TXD_1 161
267#define BCM281XX_PIN_RGMII_1_TXD_2 162
268#define BCM281XX_PIN_RGMII_1_TXD_3 163
269#define BCM281XX_PIN_RGMII_GPIO_0 164
270#define BCM281XX_PIN_RGMII_GPIO_1 165
271#define BCM281XX_PIN_RGMII_GPIO_2 166
272#define BCM281XX_PIN_RGMII_GPIO_3 167
273#define BCM281XX_PIN_RTXDATA2G_TXDATA3G1 168
274#define BCM281XX_PIN_RTXEN2G_TXDATA3G2 169
275#define BCM281XX_PIN_RXDATA3G0 170
276#define BCM281XX_PIN_RXDATA3G1 171
277#define BCM281XX_PIN_RXDATA3G2 172
278#define BCM281XX_PIN_SDIO1_CLK 173
279#define BCM281XX_PIN_SDIO1_CMD 174
280#define BCM281XX_PIN_SDIO1_DATA_0 175
281#define BCM281XX_PIN_SDIO1_DATA_1 176
282#define BCM281XX_PIN_SDIO1_DATA_2 177
283#define BCM281XX_PIN_SDIO1_DATA_3 178
284#define BCM281XX_PIN_SDIO4_CLK 179
285#define BCM281XX_PIN_SDIO4_CMD 180
286#define BCM281XX_PIN_SDIO4_DATA_0 181
287#define BCM281XX_PIN_SDIO4_DATA_1 182
288#define BCM281XX_PIN_SDIO4_DATA_2 183
289#define BCM281XX_PIN_SDIO4_DATA_3 184
290#define BCM281XX_PIN_SIM_CLK 185
291#define BCM281XX_PIN_SIM_DATA 186
292#define BCM281XX_PIN_SIM_DET 187
293#define BCM281XX_PIN_SIM_RESETN 188
294#define BCM281XX_PIN_SIM2_CLK 189
295#define BCM281XX_PIN_SIM2_DATA 190
296#define BCM281XX_PIN_SIM2_DET 191
297#define BCM281XX_PIN_SIM2_RESETN 192
298#define BCM281XX_PIN_SRI_C 193
299#define BCM281XX_PIN_SRI_D 194
300#define BCM281XX_PIN_SRI_E 195
301#define BCM281XX_PIN_SSP_EXTCLK 196
302#define BCM281XX_PIN_SSP0_CLK 197
303#define BCM281XX_PIN_SSP0_FS 198
304#define BCM281XX_PIN_SSP0_RXD 199
305#define BCM281XX_PIN_SSP0_TXD 200
306#define BCM281XX_PIN_SSP2_CLK 201
307#define BCM281XX_PIN_SSP2_FS_0 202
308#define BCM281XX_PIN_SSP2_FS_1 203
309#define BCM281XX_PIN_SSP2_FS_2 204
310#define BCM281XX_PIN_SSP2_FS_3 205
311#define BCM281XX_PIN_SSP2_RXD_0 206
312#define BCM281XX_PIN_SSP2_RXD_1 207
313#define BCM281XX_PIN_SSP2_TXD_0 208
314#define BCM281XX_PIN_SSP2_TXD_1 209
315#define BCM281XX_PIN_SSP3_CLK 210
316#define BCM281XX_PIN_SSP3_FS 211
317#define BCM281XX_PIN_SSP3_RXD 212
318#define BCM281XX_PIN_SSP3_TXD 213
319#define BCM281XX_PIN_SSP4_CLK 214
320#define BCM281XX_PIN_SSP4_FS 215
321#define BCM281XX_PIN_SSP4_RXD 216
322#define BCM281XX_PIN_SSP4_TXD 217
323#define BCM281XX_PIN_SSP5_CLK 218
324#define BCM281XX_PIN_SSP5_FS 219
325#define BCM281XX_PIN_SSP5_RXD 220
326#define BCM281XX_PIN_SSP5_TXD 221
327#define BCM281XX_PIN_SSP6_CLK 222
328#define BCM281XX_PIN_SSP6_FS 223
329#define BCM281XX_PIN_SSP6_RXD 224
330#define BCM281XX_PIN_SSP6_TXD 225
331#define BCM281XX_PIN_STAT_1 226
332#define BCM281XX_PIN_STAT_2 227
333#define BCM281XX_PIN_SYSCLKEN 228
334#define BCM281XX_PIN_TRACECLK 229
335#define BCM281XX_PIN_TRACEDT00 230
336#define BCM281XX_PIN_TRACEDT01 231
337#define BCM281XX_PIN_TRACEDT02 232
338#define BCM281XX_PIN_TRACEDT03 233
339#define BCM281XX_PIN_TRACEDT04 234
340#define BCM281XX_PIN_TRACEDT05 235
341#define BCM281XX_PIN_TRACEDT06 236
342#define BCM281XX_PIN_TRACEDT07 237
343#define BCM281XX_PIN_TRACEDT08 238
344#define BCM281XX_PIN_TRACEDT09 239
345#define BCM281XX_PIN_TRACEDT10 240
346#define BCM281XX_PIN_TRACEDT11 241
347#define BCM281XX_PIN_TRACEDT12 242
348#define BCM281XX_PIN_TRACEDT13 243
349#define BCM281XX_PIN_TRACEDT14 244
350#define BCM281XX_PIN_TRACEDT15 245
351#define BCM281XX_PIN_TXDATA3G0 246
352#define BCM281XX_PIN_TXPWRIND 247
353#define BCM281XX_PIN_UARTB1_UCTS 248
354#define BCM281XX_PIN_UARTB1_URTS 249
355#define BCM281XX_PIN_UARTB1_URXD 250
356#define BCM281XX_PIN_UARTB1_UTXD 251
357#define BCM281XX_PIN_UARTB2_URXD 252
358#define BCM281XX_PIN_UARTB2_UTXD 253
359#define BCM281XX_PIN_UARTB3_UCTS 254
360#define BCM281XX_PIN_UARTB3_URTS 255
361#define BCM281XX_PIN_UARTB3_URXD 256
362#define BCM281XX_PIN_UARTB3_UTXD 257
363#define BCM281XX_PIN_UARTB4_UCTS 258
364#define BCM281XX_PIN_UARTB4_URTS 259
365#define BCM281XX_PIN_UARTB4_URXD 260
366#define BCM281XX_PIN_UARTB4_UTXD 261
367#define BCM281XX_PIN_VC_CAM1_SCL 262
368#define BCM281XX_PIN_VC_CAM1_SDA 263
369#define BCM281XX_PIN_VC_CAM2_SCL 264
370#define BCM281XX_PIN_VC_CAM2_SDA 265
371#define BCM281XX_PIN_VC_CAM3_SCL 266
372#define BCM281XX_PIN_VC_CAM3_SDA 267
373
374#define BCM281XX_PIN_DESC(a, b, c) \
375 { .number = a, .name = b, .drv_data = &c##_pin }
376
377/*
378 * Pin description definition. The order here must be the same as defined in
379 * the PADCTRLREG block in the RDB, since the pin number is used as an index
380 * into this array.
381 */
382static const struct pinctrl_pin_desc bcm281xx_pinctrl_pins[] = {
383 BCM281XX_PIN_DESC(BCM281XX_PIN_ADCSYNC, "adcsync", std),
384 BCM281XX_PIN_DESC(BCM281XX_PIN_BAT_RM, "bat_rm", std),
385 BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SCL, "bsc1_scl", i2c),
386 BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SDA, "bsc1_sda", i2c),
387 BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SCL, "bsc2_scl", i2c),
388 BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SDA, "bsc2_sda", i2c),
389 BCM281XX_PIN_DESC(BCM281XX_PIN_CLASSGPWR, "classgpwr", std),
390 BCM281XX_PIN_DESC(BCM281XX_PIN_CLK_CX8, "clk_cx8", std),
391 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_0, "clkout_0", std),
392 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_1, "clkout_1", std),
393 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_2, "clkout_2", std),
394 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_3, "clkout_3", std),
395 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
396 BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
397 BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
398 BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
399 BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
400 BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_CLK, "digmic1_clk", std),
401 BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_DQ, "digmic1_dq", std),
402 BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_CLK, "digmic2_clk", std),
403 BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_DQ, "digmic2_dq", std),
404 BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN13, "gpen13", std),
405 BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN14, "gpen14", std),
406 BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN15, "gpen15", std),
407 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO00, "gpio00", std),
408 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO01, "gpio01", std),
409 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO02, "gpio02", std),
410 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO03, "gpio03", std),
411 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO04, "gpio04", std),
412 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO05, "gpio05", std),
413 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO06, "gpio06", std),
414 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO07, "gpio07", std),
415 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO08, "gpio08", std),
416 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO09, "gpio09", std),
417 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO10, "gpio10", std),
418 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO11, "gpio11", std),
419 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO12, "gpio12", std),
420 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO13, "gpio13", std),
421 BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO14, "gpio14", std),
422 BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_PABLANK, "gps_pablank", std),
423 BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_TMARK, "gps_tmark", std),
424 BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
425 BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
426 BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DM, "ic_dm", std),
427 BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DP, "ic_dp", std),
428 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
429 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
430 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
431 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
432 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
433 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
434 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
435 BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
436 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_0, "lcd_b_0", std),
437 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_1, "lcd_b_1", std),
438 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_2, "lcd_b_2", std),
439 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_3, "lcd_b_3", std),
440 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_4, "lcd_b_4", std),
441 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_5, "lcd_b_5", std),
442 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_6, "lcd_b_6", std),
443 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_7, "lcd_b_7", std),
444 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_0, "lcd_g_0", std),
445 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_1, "lcd_g_1", std),
446 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_2, "lcd_g_2", std),
447 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_3, "lcd_g_3", std),
448 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_4, "lcd_g_4", std),
449 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_5, "lcd_g_5", std),
450 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_6, "lcd_g_6", std),
451 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_7, "lcd_g_7", std),
452 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_HSYNC, "lcd_hsync", std),
453 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_OE, "lcd_oe", std),
454 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_PCLK, "lcd_pclk", std),
455 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_0, "lcd_r_0", std),
456 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_1, "lcd_r_1", std),
457 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_2, "lcd_r_2", std),
458 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_3, "lcd_r_3", std),
459 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_4, "lcd_r_4", std),
460 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_5, "lcd_r_5", std),
461 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_6, "lcd_r_6", std),
462 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_7, "lcd_r_7", std),
463 BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_VSYNC, "lcd_vsync", std),
464 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO0, "mdmgpio0", std),
465 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO1, "mdmgpio1", std),
466 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO2, "mdmgpio2", std),
467 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO3, "mdmgpio3", std),
468 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO4, "mdmgpio4", std),
469 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO5, "mdmgpio5", std),
470 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO6, "mdmgpio6", std),
471 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO7, "mdmgpio7", std),
472 BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO8, "mdmgpio8", std),
473 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_0, "mphi_data_0", std),
474 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_1, "mphi_data_1", std),
475 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_2, "mphi_data_2", std),
476 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_3, "mphi_data_3", std),
477 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_4, "mphi_data_4", std),
478 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_5, "mphi_data_5", std),
479 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_6, "mphi_data_6", std),
480 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_7, "mphi_data_7", std),
481 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_8, "mphi_data_8", std),
482 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_9, "mphi_data_9", std),
483 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_10, "mphi_data_10", std),
484 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_11, "mphi_data_11", std),
485 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_12, "mphi_data_12", std),
486 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_13, "mphi_data_13", std),
487 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_14, "mphi_data_14", std),
488 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_15, "mphi_data_15", std),
489 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HA0, "mphi_ha0", std),
490 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT0, "mphi_hat0", std),
491 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT1, "mphi_hat1", std),
492 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
493 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
494 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
495 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
496 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN0, "mphi_run0", std),
497 BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN1, "mphi_run1", std),
498 BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
499 BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
500 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_0, "nand_ad_0", std),
501 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_1, "nand_ad_1", std),
502 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_2, "nand_ad_2", std),
503 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_3, "nand_ad_3", std),
504 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_4, "nand_ad_4", std),
505 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_5, "nand_ad_5", std),
506 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_6, "nand_ad_6", std),
507 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_7, "nand_ad_7", std),
508 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_ALE, "nand_ale", std),
509 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_0, "nand_cen_0", std),
510 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_1, "nand_cen_1", std),
511 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CLE, "nand_cle", std),
512 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_OEN, "nand_oen", std),
513 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_0, "nand_rdy_0", std),
514 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_1, "nand_rdy_1", std),
515 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WEN, "nand_wen", std),
516 BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WP, "nand_wp", std),
517 BCM281XX_PIN_DESC(BCM281XX_PIN_PC1, "pc1", std),
518 BCM281XX_PIN_DESC(BCM281XX_PIN_PC2, "pc2", std),
519 BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_INT, "pmu_int", std),
520 BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SCL, "pmu_scl", i2c),
521 BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SDA, "pmu_sda", i2c),
522 BCM281XX_PIN_DESC(BCM281XX_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g",
523 std),
524 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
525 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
526 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
527 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
528 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
529 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
530 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
531 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
532 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
533 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
534 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
535 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
536 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
537 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
538 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
539 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
540 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
541 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
542 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
543 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
544 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
545 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
546 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
547 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
548 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
549 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
550 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
551 BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
552 BCM281XX_PIN_DESC(BCM281XX_PIN_RTXDATA2G_TXDATA3G1,
553 "rtxdata2g_txdata3g1", std),
554 BCM281XX_PIN_DESC(BCM281XX_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2",
555 std),
556 BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G0, "rxdata3g0", std),
557 BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G1, "rxdata3g1", std),
558 BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G2, "rxdata3g2", std),
559 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CLK, "sdio1_clk", std),
560 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CMD, "sdio1_cmd", std),
561 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
562 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
563 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
564 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
565 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CLK, "sdio4_clk", std),
566 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CMD, "sdio4_cmd", std),
567 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
568 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
569 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
570 BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
571 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_CLK, "sim_clk", std),
572 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DATA, "sim_data", std),
573 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DET, "sim_det", std),
574 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_RESETN, "sim_resetn", std),
575 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_CLK, "sim2_clk", std),
576 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DATA, "sim2_data", std),
577 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DET, "sim2_det", std),
578 BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_RESETN, "sim2_resetn", std),
579 BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_C, "sri_c", std),
580 BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_D, "sri_d", std),
581 BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_E, "sri_e", std),
582 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP_EXTCLK, "ssp_extclk", std),
583 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_CLK, "ssp0_clk", std),
584 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_FS, "ssp0_fs", std),
585 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_RXD, "ssp0_rxd", std),
586 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_TXD, "ssp0_txd", std),
587 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_CLK, "ssp2_clk", std),
588 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_0, "ssp2_fs_0", std),
589 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_1, "ssp2_fs_1", std),
590 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_2, "ssp2_fs_2", std),
591 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_3, "ssp2_fs_3", std),
592 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
593 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
594 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
595 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
596 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_CLK, "ssp3_clk", std),
597 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_FS, "ssp3_fs", std),
598 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_RXD, "ssp3_rxd", std),
599 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_TXD, "ssp3_txd", std),
600 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_CLK, "ssp4_clk", std),
601 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_FS, "ssp4_fs", std),
602 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_RXD, "ssp4_rxd", std),
603 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_TXD, "ssp4_txd", std),
604 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_CLK, "ssp5_clk", std),
605 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_FS, "ssp5_fs", std),
606 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_RXD, "ssp5_rxd", std),
607 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_TXD, "ssp5_txd", std),
608 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_CLK, "ssp6_clk", std),
609 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_FS, "ssp6_fs", std),
610 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_RXD, "ssp6_rxd", std),
611 BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_TXD, "ssp6_txd", std),
612 BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_1, "stat_1", std),
613 BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_2, "stat_2", std),
614 BCM281XX_PIN_DESC(BCM281XX_PIN_SYSCLKEN, "sysclken", std),
615 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACECLK, "traceclk", std),
616 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT00, "tracedt00", std),
617 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT01, "tracedt01", std),
618 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT02, "tracedt02", std),
619 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT03, "tracedt03", std),
620 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT04, "tracedt04", std),
621 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT05, "tracedt05", std),
622 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT06, "tracedt06", std),
623 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT07, "tracedt07", std),
624 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT08, "tracedt08", std),
625 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT09, "tracedt09", std),
626 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT10, "tracedt10", std),
627 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT11, "tracedt11", std),
628 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT12, "tracedt12", std),
629 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT13, "tracedt13", std),
630 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT14, "tracedt14", std),
631 BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT15, "tracedt15", std),
632 BCM281XX_PIN_DESC(BCM281XX_PIN_TXDATA3G0, "txdata3g0", std),
633 BCM281XX_PIN_DESC(BCM281XX_PIN_TXPWRIND, "txpwrind", std),
634 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UCTS, "uartb1_ucts", std),
635 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URTS, "uartb1_urts", std),
636 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URXD, "uartb1_urxd", std),
637 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UTXD, "uartb1_utxd", std),
638 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_URXD, "uartb2_urxd", std),
639 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_UTXD, "uartb2_utxd", std),
640 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UCTS, "uartb3_ucts", std),
641 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URTS, "uartb3_urts", std),
642 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URXD, "uartb3_urxd", std),
643 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UTXD, "uartb3_utxd", std),
644 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UCTS, "uartb4_ucts", std),
645 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URTS, "uartb4_urts", std),
646 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URXD, "uartb4_urxd", std),
647 BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UTXD, "uartb4_utxd", std),
648 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
649 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
650 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
651 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
652 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
653 BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
654};
655
656static const char * const bcm281xx_alt_groups[] = {
657 "adcsync",
658 "bat_rm",
659 "bsc1_scl",
660 "bsc1_sda",
661 "bsc2_scl",
662 "bsc2_sda",
663 "classgpwr",
664 "clk_cx8",
665 "clkout_0",
666 "clkout_1",
667 "clkout_2",
668 "clkout_3",
669 "clkreq_in_0",
670 "clkreq_in_1",
671 "cws_sys_req1",
672 "cws_sys_req2",
673 "cws_sys_req3",
674 "digmic1_clk",
675 "digmic1_dq",
676 "digmic2_clk",
677 "digmic2_dq",
678 "gpen13",
679 "gpen14",
680 "gpen15",
681 "gpio00",
682 "gpio01",
683 "gpio02",
684 "gpio03",
685 "gpio04",
686 "gpio05",
687 "gpio06",
688 "gpio07",
689 "gpio08",
690 "gpio09",
691 "gpio10",
692 "gpio11",
693 "gpio12",
694 "gpio13",
695 "gpio14",
696 "gps_pablank",
697 "gps_tmark",
698 "hdmi_scl",
699 "hdmi_sda",
700 "ic_dm",
701 "ic_dp",
702 "kp_col_ip_0",
703 "kp_col_ip_1",
704 "kp_col_ip_2",
705 "kp_col_ip_3",
706 "kp_row_op_0",
707 "kp_row_op_1",
708 "kp_row_op_2",
709 "kp_row_op_3",
710 "lcd_b_0",
711 "lcd_b_1",
712 "lcd_b_2",
713 "lcd_b_3",
714 "lcd_b_4",
715 "lcd_b_5",
716 "lcd_b_6",
717 "lcd_b_7",
718 "lcd_g_0",
719 "lcd_g_1",
720 "lcd_g_2",
721 "lcd_g_3",
722 "lcd_g_4",
723 "lcd_g_5",
724 "lcd_g_6",
725 "lcd_g_7",
726 "lcd_hsync",
727 "lcd_oe",
728 "lcd_pclk",
729 "lcd_r_0",
730 "lcd_r_1",
731 "lcd_r_2",
732 "lcd_r_3",
733 "lcd_r_4",
734 "lcd_r_5",
735 "lcd_r_6",
736 "lcd_r_7",
737 "lcd_vsync",
738 "mdmgpio0",
739 "mdmgpio1",
740 "mdmgpio2",
741 "mdmgpio3",
742 "mdmgpio4",
743 "mdmgpio5",
744 "mdmgpio6",
745 "mdmgpio7",
746 "mdmgpio8",
747 "mphi_data_0",
748 "mphi_data_1",
749 "mphi_data_2",
750 "mphi_data_3",
751 "mphi_data_4",
752 "mphi_data_5",
753 "mphi_data_6",
754 "mphi_data_7",
755 "mphi_data_8",
756 "mphi_data_9",
757 "mphi_data_10",
758 "mphi_data_11",
759 "mphi_data_12",
760 "mphi_data_13",
761 "mphi_data_14",
762 "mphi_data_15",
763 "mphi_ha0",
764 "mphi_hat0",
765 "mphi_hat1",
766 "mphi_hce0_n",
767 "mphi_hce1_n",
768 "mphi_hrd_n",
769 "mphi_hwr_n",
770 "mphi_run0",
771 "mphi_run1",
772 "mtx_scan_clk",
773 "mtx_scan_data",
774 "nand_ad_0",
775 "nand_ad_1",
776 "nand_ad_2",
777 "nand_ad_3",
778 "nand_ad_4",
779 "nand_ad_5",
780 "nand_ad_6",
781 "nand_ad_7",
782 "nand_ale",
783 "nand_cen_0",
784 "nand_cen_1",
785 "nand_cle",
786 "nand_oen",
787 "nand_rdy_0",
788 "nand_rdy_1",
789 "nand_wen",
790 "nand_wp",
791 "pc1",
792 "pc2",
793 "pmu_int",
794 "pmu_scl",
795 "pmu_sda",
796 "rfst2g_mtsloten3g",
797 "rgmii_0_rx_ctl",
798 "rgmii_0_rxc",
799 "rgmii_0_rxd_0",
800 "rgmii_0_rxd_1",
801 "rgmii_0_rxd_2",
802 "rgmii_0_rxd_3",
803 "rgmii_0_tx_ctl",
804 "rgmii_0_txc",
805 "rgmii_0_txd_0",
806 "rgmii_0_txd_1",
807 "rgmii_0_txd_2",
808 "rgmii_0_txd_3",
809 "rgmii_1_rx_ctl",
810 "rgmii_1_rxc",
811 "rgmii_1_rxd_0",
812 "rgmii_1_rxd_1",
813 "rgmii_1_rxd_2",
814 "rgmii_1_rxd_3",
815 "rgmii_1_tx_ctl",
816 "rgmii_1_txc",
817 "rgmii_1_txd_0",
818 "rgmii_1_txd_1",
819 "rgmii_1_txd_2",
820 "rgmii_1_txd_3",
821 "rgmii_gpio_0",
822 "rgmii_gpio_1",
823 "rgmii_gpio_2",
824 "rgmii_gpio_3",
825 "rtxdata2g_txdata3g1",
826 "rtxen2g_txdata3g2",
827 "rxdata3g0",
828 "rxdata3g1",
829 "rxdata3g2",
830 "sdio1_clk",
831 "sdio1_cmd",
832 "sdio1_data_0",
833 "sdio1_data_1",
834 "sdio1_data_2",
835 "sdio1_data_3",
836 "sdio4_clk",
837 "sdio4_cmd",
838 "sdio4_data_0",
839 "sdio4_data_1",
840 "sdio4_data_2",
841 "sdio4_data_3",
842 "sim_clk",
843 "sim_data",
844 "sim_det",
845 "sim_resetn",
846 "sim2_clk",
847 "sim2_data",
848 "sim2_det",
849 "sim2_resetn",
850 "sri_c",
851 "sri_d",
852 "sri_e",
853 "ssp_extclk",
854 "ssp0_clk",
855 "ssp0_fs",
856 "ssp0_rxd",
857 "ssp0_txd",
858 "ssp2_clk",
859 "ssp2_fs_0",
860 "ssp2_fs_1",
861 "ssp2_fs_2",
862 "ssp2_fs_3",
863 "ssp2_rxd_0",
864 "ssp2_rxd_1",
865 "ssp2_txd_0",
866 "ssp2_txd_1",
867 "ssp3_clk",
868 "ssp3_fs",
869 "ssp3_rxd",
870 "ssp3_txd",
871 "ssp4_clk",
872 "ssp4_fs",
873 "ssp4_rxd",
874 "ssp4_txd",
875 "ssp5_clk",
876 "ssp5_fs",
877 "ssp5_rxd",
878 "ssp5_txd",
879 "ssp6_clk",
880 "ssp6_fs",
881 "ssp6_rxd",
882 "ssp6_txd",
883 "stat_1",
884 "stat_2",
885 "sysclken",
886 "traceclk",
887 "tracedt00",
888 "tracedt01",
889 "tracedt02",
890 "tracedt03",
891 "tracedt04",
892 "tracedt05",
893 "tracedt06",
894 "tracedt07",
895 "tracedt08",
896 "tracedt09",
897 "tracedt10",
898 "tracedt11",
899 "tracedt12",
900 "tracedt13",
901 "tracedt14",
902 "tracedt15",
903 "txdata3g0",
904 "txpwrind",
905 "uartb1_ucts",
906 "uartb1_urts",
907 "uartb1_urxd",
908 "uartb1_utxd",
909 "uartb2_urxd",
910 "uartb2_utxd",
911 "uartb3_ucts",
912 "uartb3_urts",
913 "uartb3_urxd",
914 "uartb3_utxd",
915 "uartb4_ucts",
916 "uartb4_urts",
917 "uartb4_urxd",
918 "uartb4_utxd",
919 "vc_cam1_scl",
920 "vc_cam1_sda",
921 "vc_cam2_scl",
922 "vc_cam2_sda",
923 "vc_cam3_scl",
924 "vc_cam3_sda",
925};
926
927/* Every pin can implement all ALT1-ALT4 functions */
928#define BCM281XX_PIN_FUNCTION(fcn_name) \
929{ \
930 .name = #fcn_name, \
931 .groups = bcm281xx_alt_groups, \
932 .ngroups = ARRAY_SIZE(bcm281xx_alt_groups), \
933}
934
935static const struct bcm281xx_pin_function bcm281xx_functions[] = {
936 BCM281XX_PIN_FUNCTION(alt1),
937 BCM281XX_PIN_FUNCTION(alt2),
938 BCM281XX_PIN_FUNCTION(alt3),
939 BCM281XX_PIN_FUNCTION(alt4),
940};
941
942static struct bcm281xx_pinctrl_data bcm281xx_pinctrl = {
943 .pins = bcm281xx_pinctrl_pins,
944 .npins = ARRAY_SIZE(bcm281xx_pinctrl_pins),
945 .functions = bcm281xx_functions,
946 .nfunctions = ARRAY_SIZE(bcm281xx_functions),
947};
948
949static inline enum bcm281xx_pin_type pin_type_get(struct pinctrl_dev *pctldev,
950 unsigned pin)
951{
952 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
953
954 if (pin >= pdata->npins)
955 return BCM281XX_PIN_TYPE_UNKNOWN;
956
957 return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data);
958}
959
960#define BCM281XX_PIN_SHIFT(type, param) \
961 (BCM281XX_ ## type ## _PIN_REG_ ## param ## _SHIFT)
962
963#define BCM281XX_PIN_MASK(type, param) \
964 (BCM281XX_ ## type ## _PIN_REG_ ## param ## _MASK)
965
966/*
967 * This helper function is used to build up the value and mask used to write to
968 * a pin register, but does not actually write to the register.
969 */
970static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask,
971 u32 param_val, u32 param_shift,
972 u32 param_mask)
973{
974 *reg_val &= ~param_mask;
975 *reg_val |= (param_val << param_shift) & param_mask;
976 *reg_mask |= param_mask;
977}
978
979static struct regmap_config bcm281xx_pinctrl_regmap_config = {
980 .reg_bits = 32,
981 .reg_stride = 4,
982 .val_bits = 32,
983 .max_register = BCM281XX_PIN_VC_CAM3_SDA,
984};
985
986static int bcm281xx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
987{
988 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
989
990 return pdata->npins;
991}
992
993static const char *bcm281xx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
994 unsigned group)
995{
996 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
997
998 return pdata->pins[group].name;
999}
1000
1001static int bcm281xx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
1002 unsigned group,
1003 const unsigned **pins,
1004 unsigned *num_pins)
1005{
1006 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1007
1008 *pins = &pdata->pins[group].number;
1009 *num_pins = 1;
1010
1011 return 0;
1012}
1013
1014static void bcm281xx_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
1015 struct seq_file *s,
1016 unsigned offset)
1017{
1018 seq_printf(s, " %s", dev_name(pctldev->dev));
1019}
1020
1021static struct pinctrl_ops bcm281xx_pinctrl_ops = {
1022 .get_groups_count = bcm281xx_pinctrl_get_groups_count,
1023 .get_group_name = bcm281xx_pinctrl_get_group_name,
1024 .get_group_pins = bcm281xx_pinctrl_get_group_pins,
1025 .pin_dbg_show = bcm281xx_pinctrl_pin_dbg_show,
1026 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
1027 .dt_free_map = pinctrl_utils_dt_free_map,
1028};
1029
1030static int bcm281xx_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
1031{
1032 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1033
1034 return pdata->nfunctions;
1035}
1036
1037static const char *bcm281xx_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
1038 unsigned function)
1039{
1040 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1041
1042 return pdata->functions[function].name;
1043}
1044
1045static int bcm281xx_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
1046 unsigned function,
1047 const char * const **groups,
1048 unsigned * const num_groups)
1049{
1050 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1051
1052 *groups = pdata->functions[function].groups;
1053 *num_groups = pdata->functions[function].ngroups;
1054
1055 return 0;
1056}
1057
1058static int bcm281xx_pinmux_enable(struct pinctrl_dev *pctldev,
1059 unsigned function,
1060 unsigned group)
1061{
1062 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1063 const struct bcm281xx_pin_function *f = &pdata->functions[function];
1064 u32 offset = 4 * pdata->pins[group].number;
1065 int rc = 0;
1066
1067 dev_dbg(pctldev->dev,
1068 "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
1069 __func__, f->name, function, pdata->pins[group].name,
1070 pdata->pins[group].number, offset);
1071
1072 rc = regmap_update_bits(pdata->regmap, offset,
1073 BCM281XX_PIN_REG_F_SEL_MASK,
1074 function << BCM281XX_PIN_REG_F_SEL_SHIFT);
1075 if (rc)
1076 dev_err(pctldev->dev,
1077 "Error updating register for pin %s (%d).\n",
1078 pdata->pins[group].name, pdata->pins[group].number);
1079
1080 return rc;
1081}
1082
1083static struct pinmux_ops bcm281xx_pinctrl_pinmux_ops = {
1084 .get_functions_count = bcm281xx_pinctrl_get_fcns_count,
1085 .get_function_name = bcm281xx_pinctrl_get_fcn_name,
1086 .get_function_groups = bcm281xx_pinctrl_get_fcn_groups,
1087 .enable = bcm281xx_pinmux_enable,
1088};
1089
1090static int bcm281xx_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
1091 unsigned pin,
1092 unsigned long *config)
1093{
1094 return -ENOTSUPP;
1095}
1096
1097
1098/* Goes through the configs and update register val/mask */
1099static int bcm281xx_std_pin_update(struct pinctrl_dev *pctldev,
1100 unsigned pin,
1101 unsigned long *configs,
1102 unsigned num_configs,
1103 u32 *val,
1104 u32 *mask)
1105{
1106 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1107 int i;
1108 enum pin_config_param param;
1109 u16 arg;
1110
1111 for (i = 0; i < num_configs; i++) {
1112 param = pinconf_to_config_param(configs[i]);
1113 arg = pinconf_to_config_argument(configs[i]);
1114
1115 switch (param) {
1116 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1117 arg = (arg >= 1 ? 1 : 0);
1118 bcm281xx_pin_update(val, mask, arg,
1119 BCM281XX_PIN_SHIFT(STD, HYST),
1120 BCM281XX_PIN_MASK(STD, HYST));
1121 break;
1122 /*
1123 * The pin bias can only be one of pull-up, pull-down, or
1124 * disable. The user does not need to specify a value for the
1125 * property, and the default value from pinconf-generic is
1126 * ignored.
1127 */
1128 case PIN_CONFIG_BIAS_DISABLE:
1129 bcm281xx_pin_update(val, mask, 0,
1130 BCM281XX_PIN_SHIFT(STD, PULL_UP),
1131 BCM281XX_PIN_MASK(STD, PULL_UP));
1132 bcm281xx_pin_update(val, mask, 0,
1133 BCM281XX_PIN_SHIFT(STD, PULL_DN),
1134 BCM281XX_PIN_MASK(STD, PULL_DN));
1135 break;
1136
1137 case PIN_CONFIG_BIAS_PULL_UP:
1138 bcm281xx_pin_update(val, mask, 1,
1139 BCM281XX_PIN_SHIFT(STD, PULL_UP),
1140 BCM281XX_PIN_MASK(STD, PULL_UP));
1141 bcm281xx_pin_update(val, mask, 0,
1142 BCM281XX_PIN_SHIFT(STD, PULL_DN),
1143 BCM281XX_PIN_MASK(STD, PULL_DN));
1144 break;
1145
1146 case PIN_CONFIG_BIAS_PULL_DOWN:
1147 bcm281xx_pin_update(val, mask, 0,
1148 BCM281XX_PIN_SHIFT(STD, PULL_UP),
1149 BCM281XX_PIN_MASK(STD, PULL_UP));
1150 bcm281xx_pin_update(val, mask, 1,
1151 BCM281XX_PIN_SHIFT(STD, PULL_DN),
1152 BCM281XX_PIN_MASK(STD, PULL_DN));
1153 break;
1154
1155 case PIN_CONFIG_SLEW_RATE:
1156 arg = (arg >= 1 ? 1 : 0);
1157 bcm281xx_pin_update(val, mask, arg,
1158 BCM281XX_PIN_SHIFT(STD, SLEW),
1159 BCM281XX_PIN_MASK(STD, SLEW));
1160 break;
1161
1162 case PIN_CONFIG_INPUT_ENABLE:
1163 /* inversed since register is for input _disable_ */
1164 arg = (arg >= 1 ? 0 : 1);
1165 bcm281xx_pin_update(val, mask, arg,
1166 BCM281XX_PIN_SHIFT(STD, INPUT_DIS),
1167 BCM281XX_PIN_MASK(STD, INPUT_DIS));
1168 break;
1169
1170 case PIN_CONFIG_DRIVE_STRENGTH:
1171 /* Valid range is 2-16 mA, even numbers only */
1172 if ((arg < 2) || (arg > 16) || (arg % 2)) {
1173 dev_err(pctldev->dev,
1174 "Invalid Drive Strength value (%d) for "
1175 "pin %s (%d). Valid values are "
1176 "(2..16) mA, even numbers only.\n",
1177 arg, pdata->pins[pin].name, pin);
1178 return -EINVAL;
1179 }
1180 bcm281xx_pin_update(val, mask, (arg/2)-1,
1181 BCM281XX_PIN_SHIFT(STD, DRV_STR),
1182 BCM281XX_PIN_MASK(STD, DRV_STR));
1183 break;
1184
1185 default:
1186 dev_err(pctldev->dev,
1187 "Unrecognized pin config %d for pin %s (%d).\n",
1188 param, pdata->pins[pin].name, pin);
1189 return -EINVAL;
1190
1191 } /* switch config */
1192 } /* for each config */
1193
1194 return 0;
1195}
1196
1197/*
1198 * The pull-up strength for an I2C pin is represented by bits 4-6 in the
1199 * register with the following mapping:
1200 * 0b000: No pull-up
1201 * 0b001: 1200 Ohm
1202 * 0b010: 1800 Ohm
1203 * 0b011: 720 Ohm
1204 * 0b100: 2700 Ohm
1205 * 0b101: 831 Ohm
1206 * 0b110: 1080 Ohm
1207 * 0b111: 568 Ohm
1208 * This array maps pull-up strength in Ohms to register values (1+index).
1209 */
1210static const u16 bcm281xx_pullup_map[] = {
1211 1200, 1800, 720, 2700, 831, 1080, 568
1212};
1213
1214/* Goes through the configs and update register val/mask */
1215static int bcm281xx_i2c_pin_update(struct pinctrl_dev *pctldev,
1216 unsigned pin,
1217 unsigned long *configs,
1218 unsigned num_configs,
1219 u32 *val,
1220 u32 *mask)
1221{
1222 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1223 int i, j;
1224 enum pin_config_param param;
1225 u16 arg;
1226
1227 for (i = 0; i < num_configs; i++) {
1228 param = pinconf_to_config_param(configs[i]);
1229 arg = pinconf_to_config_argument(configs[i]);
1230
1231 switch (param) {
1232 case PIN_CONFIG_BIAS_PULL_UP:
1233 for (j = 0; j < ARRAY_SIZE(bcm281xx_pullup_map); j++)
1234 if (bcm281xx_pullup_map[j] == arg)
1235 break;
1236
1237 if (j == ARRAY_SIZE(bcm281xx_pullup_map)) {
1238 dev_err(pctldev->dev,
1239 "Invalid pull-up value (%d) for pin %s "
1240 "(%d). Valid values are 568, 720, 831, "
1241 "1080, 1200, 1800, 2700 Ohms.\n",
1242 arg, pdata->pins[pin].name, pin);
1243 return -EINVAL;
1244 }
1245
1246 bcm281xx_pin_update(val, mask, j+1,
1247 BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
1248 BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
1249 break;
1250
1251 case PIN_CONFIG_BIAS_DISABLE:
1252 bcm281xx_pin_update(val, mask, 0,
1253 BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
1254 BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
1255 break;
1256
1257 case PIN_CONFIG_SLEW_RATE:
1258 arg = (arg >= 1 ? 1 : 0);
1259 bcm281xx_pin_update(val, mask, arg,
1260 BCM281XX_PIN_SHIFT(I2C, SLEW),
1261 BCM281XX_PIN_MASK(I2C, SLEW));
1262 break;
1263
1264 case PIN_CONFIG_INPUT_ENABLE:
1265 /* inversed since register is for input _disable_ */
1266 arg = (arg >= 1 ? 0 : 1);
1267 bcm281xx_pin_update(val, mask, arg,
1268 BCM281XX_PIN_SHIFT(I2C, INPUT_DIS),
1269 BCM281XX_PIN_MASK(I2C, INPUT_DIS));
1270 break;
1271
1272 default:
1273 dev_err(pctldev->dev,
1274 "Unrecognized pin config %d for pin %s (%d).\n",
1275 param, pdata->pins[pin].name, pin);
1276 return -EINVAL;
1277
1278 } /* switch config */
1279 } /* for each config */
1280
1281 return 0;
1282}
1283
1284/* Goes through the configs and update register val/mask */
1285static int bcm281xx_hdmi_pin_update(struct pinctrl_dev *pctldev,
1286 unsigned pin,
1287 unsigned long *configs,
1288 unsigned num_configs,
1289 u32 *val,
1290 u32 *mask)
1291{
1292 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1293 int i;
1294 enum pin_config_param param;
1295 u16 arg;
1296
1297 for (i = 0; i < num_configs; i++) {
1298 param = pinconf_to_config_param(configs[i]);
1299 arg = pinconf_to_config_argument(configs[i]);
1300
1301 switch (param) {
1302 case PIN_CONFIG_SLEW_RATE:
1303 arg = (arg >= 1 ? 1 : 0);
1304 bcm281xx_pin_update(val, mask, arg,
1305 BCM281XX_PIN_SHIFT(HDMI, MODE),
1306 BCM281XX_PIN_MASK(HDMI, MODE));
1307 break;
1308
1309 case PIN_CONFIG_INPUT_ENABLE:
1310 /* inversed since register is for input _disable_ */
1311 arg = (arg >= 1 ? 0 : 1);
1312 bcm281xx_pin_update(val, mask, arg,
1313 BCM281XX_PIN_SHIFT(HDMI, INPUT_DIS),
1314 BCM281XX_PIN_MASK(HDMI, INPUT_DIS));
1315 break;
1316
1317 default:
1318 dev_err(pctldev->dev,
1319 "Unrecognized pin config %d for pin %s (%d).\n",
1320 param, pdata->pins[pin].name, pin);
1321 return -EINVAL;
1322
1323 } /* switch config */
1324 } /* for each config */
1325
1326 return 0;
1327}
1328
1329static int bcm281xx_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
1330 unsigned pin,
1331 unsigned long *configs,
1332 unsigned num_configs)
1333{
1334 struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1335 enum bcm281xx_pin_type pin_type;
1336 u32 offset = 4 * pin;
1337 u32 cfg_val, cfg_mask;
1338 int rc;
1339
1340 cfg_val = 0;
1341 cfg_mask = 0;
1342 pin_type = pin_type_get(pctldev, pin);
1343
1344 /* Different pins have different configuration options */
1345 switch (pin_type) {
1346 case BCM281XX_PIN_TYPE_STD:
1347 rc = bcm281xx_std_pin_update(pctldev, pin, configs,
1348 num_configs, &cfg_val, &cfg_mask);
1349 break;
1350
1351 case BCM281XX_PIN_TYPE_I2C:
1352 rc = bcm281xx_i2c_pin_update(pctldev, pin, configs,
1353 num_configs, &cfg_val, &cfg_mask);
1354 break;
1355
1356 case BCM281XX_PIN_TYPE_HDMI:
1357 rc = bcm281xx_hdmi_pin_update(pctldev, pin, configs,
1358 num_configs, &cfg_val, &cfg_mask);
1359 break;
1360
1361 default:
1362 dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
1363 pdata->pins[pin].name, pin);
1364 return -EINVAL;
1365
1366 } /* switch pin type */
1367
1368 if (rc)
1369 return rc;
1370
1371 dev_dbg(pctldev->dev,
1372 "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
1373 __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
1374
1375 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
1376 if (rc) {
1377 dev_err(pctldev->dev,
1378 "Error updating register for pin %s (%d).\n",
1379 pdata->pins[pin].name, pin);
1380 return rc;
1381 }
1382
1383 return 0;
1384}
1385
1386static struct pinconf_ops bcm281xx_pinctrl_pinconf_ops = {
1387 .pin_config_get = bcm281xx_pinctrl_pin_config_get,
1388 .pin_config_set = bcm281xx_pinctrl_pin_config_set,
1389};
1390
1391static struct pinctrl_desc bcm281xx_pinctrl_desc = {
1392 /* name, pins, npins members initialized in probe function */
1393 .pctlops = &bcm281xx_pinctrl_ops,
1394 .pmxops = &bcm281xx_pinctrl_pinmux_ops,
1395 .confops = &bcm281xx_pinctrl_pinconf_ops,
1396 .owner = THIS_MODULE,
1397};
1398
1399int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
1400{
1401 struct bcm281xx_pinctrl_data *pdata = &bcm281xx_pinctrl;
1402 struct resource *res;
1403 struct pinctrl_dev *pctl;
1404
1405 /* So far We can assume there is only 1 bank of registers */
1406 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1407 if (!res) {
1408 dev_err(&pdev->dev, "Missing MEM resource\n");
1409 return -ENODEV;
1410 }
1411
1412 pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
1413 if (IS_ERR(pdata->reg_base)) {
1414 dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
1415 return -ENODEV;
1416 }
1417
1418 /* Initialize the dynamic part of pinctrl_desc */
1419 pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
1420 &bcm281xx_pinctrl_regmap_config);
1421 if (IS_ERR(pdata->regmap)) {
1422 dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
1423 return -ENODEV;
1424 }
1425
1426 bcm281xx_pinctrl_desc.name = dev_name(&pdev->dev);
1427 bcm281xx_pinctrl_desc.pins = bcm281xx_pinctrl.pins;
1428 bcm281xx_pinctrl_desc.npins = bcm281xx_pinctrl.npins;
1429
1430 pctl = pinctrl_register(&bcm281xx_pinctrl_desc,
1431 &pdev->dev,
1432 pdata);
1433 if (!pctl) {
1434 dev_err(&pdev->dev, "Failed to register pinctrl\n");
1435 return -ENODEV;
1436 }
1437
1438 platform_set_drvdata(pdev, pdata);
1439
1440 return 0;
1441}
1442
1443static struct of_device_id bcm281xx_pinctrl_of_match[] = {
1444 { .compatible = "brcm,bcm11351-pinctrl", },
1445 { },
1446};
1447
1448static struct platform_driver bcm281xx_pinctrl_driver = {
1449 .driver = {
1450 .name = "bcm281xx-pinctrl",
1451 .owner = THIS_MODULE,
1452 .of_match_table = bcm281xx_pinctrl_of_match,
1453 },
1454};
1455
1456module_platform_driver_probe(bcm281xx_pinctrl_driver, bcm281xx_pinctrl_probe);
1457
1458MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");
1459MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
1460MODULE_DESCRIPTION("Broadcom BCM281xx pinctrl driver");
1461MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-capri.c b/drivers/pinctrl/pinctrl-capri.c
deleted file mode 100644
index eb2500212147..000000000000
--- a/drivers/pinctrl/pinctrl-capri.c
+++ /dev/null
@@ -1,1454 +0,0 @@
1/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#include <linux/err.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/platform_device.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/pinctrl/pinmux.h>
20#include <linux/pinctrl/pinconf.h>
21#include <linux/pinctrl/pinconf-generic.h>
22#include <linux/regmap.h>
23#include <linux/slab.h>
24#include "core.h"
25#include "pinctrl-utils.h"
26
27/* Capri Pin Control Registers Definitions */
28
29/* Function Select bits are the same for all pin control registers */
30#define CAPRI_PIN_REG_F_SEL_MASK 0x0700
31#define CAPRI_PIN_REG_F_SEL_SHIFT 8
32
33/* Standard pin register */
34#define CAPRI_STD_PIN_REG_DRV_STR_MASK 0x0007
35#define CAPRI_STD_PIN_REG_DRV_STR_SHIFT 0
36#define CAPRI_STD_PIN_REG_INPUT_DIS_MASK 0x0008
37#define CAPRI_STD_PIN_REG_INPUT_DIS_SHIFT 3
38#define CAPRI_STD_PIN_REG_SLEW_MASK 0x0010
39#define CAPRI_STD_PIN_REG_SLEW_SHIFT 4
40#define CAPRI_STD_PIN_REG_PULL_UP_MASK 0x0020
41#define CAPRI_STD_PIN_REG_PULL_UP_SHIFT 5
42#define CAPRI_STD_PIN_REG_PULL_DN_MASK 0x0040
43#define CAPRI_STD_PIN_REG_PULL_DN_SHIFT 6
44#define CAPRI_STD_PIN_REG_HYST_MASK 0x0080
45#define CAPRI_STD_PIN_REG_HYST_SHIFT 7
46
47/* I2C pin register */
48#define CAPRI_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
49#define CAPRI_I2C_PIN_REG_INPUT_DIS_SHIFT 2
50#define CAPRI_I2C_PIN_REG_SLEW_MASK 0x0008
51#define CAPRI_I2C_PIN_REG_SLEW_SHIFT 3
52#define CAPRI_I2C_PIN_REG_PULL_UP_STR_MASK 0x0070
53#define CAPRI_I2C_PIN_REG_PULL_UP_STR_SHIFT 4
54
55/* HDMI pin register */
56#define CAPRI_HDMI_PIN_REG_INPUT_DIS_MASK 0x0008
57#define CAPRI_HDMI_PIN_REG_INPUT_DIS_SHIFT 3
58#define CAPRI_HDMI_PIN_REG_MODE_MASK 0x0010
59#define CAPRI_HDMI_PIN_REG_MODE_SHIFT 4
60
61/**
62 * capri_pin_type - types of pin register
63 */
64enum capri_pin_type {
65 CAPRI_PIN_TYPE_UNKNOWN = 0,
66 CAPRI_PIN_TYPE_STD,
67 CAPRI_PIN_TYPE_I2C,
68 CAPRI_PIN_TYPE_HDMI,
69};
70
71static enum capri_pin_type std_pin = CAPRI_PIN_TYPE_STD;
72static enum capri_pin_type i2c_pin = CAPRI_PIN_TYPE_I2C;
73static enum capri_pin_type hdmi_pin = CAPRI_PIN_TYPE_HDMI;
74
75/**
76 * capri_pin_function- define pin function
77 */
78struct capri_pin_function {
79 const char *name;
80 const char * const *groups;
81 const unsigned ngroups;
82};
83
84/**
85 * capri_pinctrl_data - Broadcom-specific pinctrl data
86 * @reg_base - base of pinctrl registers
87 */
88struct capri_pinctrl_data {
89 void __iomem *reg_base;
90
91 /* List of all pins */
92 const struct pinctrl_pin_desc *pins;
93 const unsigned npins;
94
95 const struct capri_pin_function *functions;
96 const unsigned nfunctions;
97
98 struct regmap *regmap;
99};
100
101/*
102 * Pin number definition. The order here must be the same as defined in the
103 * PADCTRLREG block in the RDB.
104 */
105#define CAPRI_PIN_ADCSYNC 0
106#define CAPRI_PIN_BAT_RM 1
107#define CAPRI_PIN_BSC1_SCL 2
108#define CAPRI_PIN_BSC1_SDA 3
109#define CAPRI_PIN_BSC2_SCL 4
110#define CAPRI_PIN_BSC2_SDA 5
111#define CAPRI_PIN_CLASSGPWR 6
112#define CAPRI_PIN_CLK_CX8 7
113#define CAPRI_PIN_CLKOUT_0 8
114#define CAPRI_PIN_CLKOUT_1 9
115#define CAPRI_PIN_CLKOUT_2 10
116#define CAPRI_PIN_CLKOUT_3 11
117#define CAPRI_PIN_CLKREQ_IN_0 12
118#define CAPRI_PIN_CLKREQ_IN_1 13
119#define CAPRI_PIN_CWS_SYS_REQ1 14
120#define CAPRI_PIN_CWS_SYS_REQ2 15
121#define CAPRI_PIN_CWS_SYS_REQ3 16
122#define CAPRI_PIN_DIGMIC1_CLK 17
123#define CAPRI_PIN_DIGMIC1_DQ 18
124#define CAPRI_PIN_DIGMIC2_CLK 19
125#define CAPRI_PIN_DIGMIC2_DQ 20
126#define CAPRI_PIN_GPEN13 21
127#define CAPRI_PIN_GPEN14 22
128#define CAPRI_PIN_GPEN15 23
129#define CAPRI_PIN_GPIO00 24
130#define CAPRI_PIN_GPIO01 25
131#define CAPRI_PIN_GPIO02 26
132#define CAPRI_PIN_GPIO03 27
133#define CAPRI_PIN_GPIO04 28
134#define CAPRI_PIN_GPIO05 29
135#define CAPRI_PIN_GPIO06 30
136#define CAPRI_PIN_GPIO07 31
137#define CAPRI_PIN_GPIO08 32
138#define CAPRI_PIN_GPIO09 33
139#define CAPRI_PIN_GPIO10 34
140#define CAPRI_PIN_GPIO11 35
141#define CAPRI_PIN_GPIO12 36
142#define CAPRI_PIN_GPIO13 37
143#define CAPRI_PIN_GPIO14 38
144#define CAPRI_PIN_GPS_PABLANK 39
145#define CAPRI_PIN_GPS_TMARK 40
146#define CAPRI_PIN_HDMI_SCL 41
147#define CAPRI_PIN_HDMI_SDA 42
148#define CAPRI_PIN_IC_DM 43
149#define CAPRI_PIN_IC_DP 44
150#define CAPRI_PIN_KP_COL_IP_0 45
151#define CAPRI_PIN_KP_COL_IP_1 46
152#define CAPRI_PIN_KP_COL_IP_2 47
153#define CAPRI_PIN_KP_COL_IP_3 48
154#define CAPRI_PIN_KP_ROW_OP_0 49
155#define CAPRI_PIN_KP_ROW_OP_1 50
156#define CAPRI_PIN_KP_ROW_OP_2 51
157#define CAPRI_PIN_KP_ROW_OP_3 52
158#define CAPRI_PIN_LCD_B_0 53
159#define CAPRI_PIN_LCD_B_1 54
160#define CAPRI_PIN_LCD_B_2 55
161#define CAPRI_PIN_LCD_B_3 56
162#define CAPRI_PIN_LCD_B_4 57
163#define CAPRI_PIN_LCD_B_5 58
164#define CAPRI_PIN_LCD_B_6 59
165#define CAPRI_PIN_LCD_B_7 60
166#define CAPRI_PIN_LCD_G_0 61
167#define CAPRI_PIN_LCD_G_1 62
168#define CAPRI_PIN_LCD_G_2 63
169#define CAPRI_PIN_LCD_G_3 64
170#define CAPRI_PIN_LCD_G_4 65
171#define CAPRI_PIN_LCD_G_5 66
172#define CAPRI_PIN_LCD_G_6 67
173#define CAPRI_PIN_LCD_G_7 68
174#define CAPRI_PIN_LCD_HSYNC 69
175#define CAPRI_PIN_LCD_OE 70
176#define CAPRI_PIN_LCD_PCLK 71
177#define CAPRI_PIN_LCD_R_0 72
178#define CAPRI_PIN_LCD_R_1 73
179#define CAPRI_PIN_LCD_R_2 74
180#define CAPRI_PIN_LCD_R_3 75
181#define CAPRI_PIN_LCD_R_4 76
182#define CAPRI_PIN_LCD_R_5 77
183#define CAPRI_PIN_LCD_R_6 78
184#define CAPRI_PIN_LCD_R_7 79
185#define CAPRI_PIN_LCD_VSYNC 80
186#define CAPRI_PIN_MDMGPIO0 81
187#define CAPRI_PIN_MDMGPIO1 82
188#define CAPRI_PIN_MDMGPIO2 83
189#define CAPRI_PIN_MDMGPIO3 84
190#define CAPRI_PIN_MDMGPIO4 85
191#define CAPRI_PIN_MDMGPIO5 86
192#define CAPRI_PIN_MDMGPIO6 87
193#define CAPRI_PIN_MDMGPIO7 88
194#define CAPRI_PIN_MDMGPIO8 89
195#define CAPRI_PIN_MPHI_DATA_0 90
196#define CAPRI_PIN_MPHI_DATA_1 91
197#define CAPRI_PIN_MPHI_DATA_2 92
198#define CAPRI_PIN_MPHI_DATA_3 93
199#define CAPRI_PIN_MPHI_DATA_4 94
200#define CAPRI_PIN_MPHI_DATA_5 95
201#define CAPRI_PIN_MPHI_DATA_6 96
202#define CAPRI_PIN_MPHI_DATA_7 97
203#define CAPRI_PIN_MPHI_DATA_8 98
204#define CAPRI_PIN_MPHI_DATA_9 99
205#define CAPRI_PIN_MPHI_DATA_10 100
206#define CAPRI_PIN_MPHI_DATA_11 101
207#define CAPRI_PIN_MPHI_DATA_12 102
208#define CAPRI_PIN_MPHI_DATA_13 103
209#define CAPRI_PIN_MPHI_DATA_14 104
210#define CAPRI_PIN_MPHI_DATA_15 105
211#define CAPRI_PIN_MPHI_HA0 106
212#define CAPRI_PIN_MPHI_HAT0 107
213#define CAPRI_PIN_MPHI_HAT1 108
214#define CAPRI_PIN_MPHI_HCE0_N 109
215#define CAPRI_PIN_MPHI_HCE1_N 110
216#define CAPRI_PIN_MPHI_HRD_N 111
217#define CAPRI_PIN_MPHI_HWR_N 112
218#define CAPRI_PIN_MPHI_RUN0 113
219#define CAPRI_PIN_MPHI_RUN1 114
220#define CAPRI_PIN_MTX_SCAN_CLK 115
221#define CAPRI_PIN_MTX_SCAN_DATA 116
222#define CAPRI_PIN_NAND_AD_0 117
223#define CAPRI_PIN_NAND_AD_1 118
224#define CAPRI_PIN_NAND_AD_2 119
225#define CAPRI_PIN_NAND_AD_3 120
226#define CAPRI_PIN_NAND_AD_4 121
227#define CAPRI_PIN_NAND_AD_5 122
228#define CAPRI_PIN_NAND_AD_6 123
229#define CAPRI_PIN_NAND_AD_7 124
230#define CAPRI_PIN_NAND_ALE 125
231#define CAPRI_PIN_NAND_CEN_0 126
232#define CAPRI_PIN_NAND_CEN_1 127
233#define CAPRI_PIN_NAND_CLE 128
234#define CAPRI_PIN_NAND_OEN 129
235#define CAPRI_PIN_NAND_RDY_0 130
236#define CAPRI_PIN_NAND_RDY_1 131
237#define CAPRI_PIN_NAND_WEN 132
238#define CAPRI_PIN_NAND_WP 133
239#define CAPRI_PIN_PC1 134
240#define CAPRI_PIN_PC2 135
241#define CAPRI_PIN_PMU_INT 136
242#define CAPRI_PIN_PMU_SCL 137
243#define CAPRI_PIN_PMU_SDA 138
244#define CAPRI_PIN_RFST2G_MTSLOTEN3G 139
245#define CAPRI_PIN_RGMII_0_RX_CTL 140
246#define CAPRI_PIN_RGMII_0_RXC 141
247#define CAPRI_PIN_RGMII_0_RXD_0 142
248#define CAPRI_PIN_RGMII_0_RXD_1 143
249#define CAPRI_PIN_RGMII_0_RXD_2 144
250#define CAPRI_PIN_RGMII_0_RXD_3 145
251#define CAPRI_PIN_RGMII_0_TX_CTL 146
252#define CAPRI_PIN_RGMII_0_TXC 147
253#define CAPRI_PIN_RGMII_0_TXD_0 148
254#define CAPRI_PIN_RGMII_0_TXD_1 149
255#define CAPRI_PIN_RGMII_0_TXD_2 150
256#define CAPRI_PIN_RGMII_0_TXD_3 151
257#define CAPRI_PIN_RGMII_1_RX_CTL 152
258#define CAPRI_PIN_RGMII_1_RXC 153
259#define CAPRI_PIN_RGMII_1_RXD_0 154
260#define CAPRI_PIN_RGMII_1_RXD_1 155
261#define CAPRI_PIN_RGMII_1_RXD_2 156
262#define CAPRI_PIN_RGMII_1_RXD_3 157
263#define CAPRI_PIN_RGMII_1_TX_CTL 158
264#define CAPRI_PIN_RGMII_1_TXC 159
265#define CAPRI_PIN_RGMII_1_TXD_0 160
266#define CAPRI_PIN_RGMII_1_TXD_1 161
267#define CAPRI_PIN_RGMII_1_TXD_2 162
268#define CAPRI_PIN_RGMII_1_TXD_3 163
269#define CAPRI_PIN_RGMII_GPIO_0 164
270#define CAPRI_PIN_RGMII_GPIO_1 165
271#define CAPRI_PIN_RGMII_GPIO_2 166
272#define CAPRI_PIN_RGMII_GPIO_3 167
273#define CAPRI_PIN_RTXDATA2G_TXDATA3G1 168
274#define CAPRI_PIN_RTXEN2G_TXDATA3G2 169
275#define CAPRI_PIN_RXDATA3G0 170
276#define CAPRI_PIN_RXDATA3G1 171
277#define CAPRI_PIN_RXDATA3G2 172
278#define CAPRI_PIN_SDIO1_CLK 173
279#define CAPRI_PIN_SDIO1_CMD 174
280#define CAPRI_PIN_SDIO1_DATA_0 175
281#define CAPRI_PIN_SDIO1_DATA_1 176
282#define CAPRI_PIN_SDIO1_DATA_2 177
283#define CAPRI_PIN_SDIO1_DATA_3 178
284#define CAPRI_PIN_SDIO4_CLK 179
285#define CAPRI_PIN_SDIO4_CMD 180
286#define CAPRI_PIN_SDIO4_DATA_0 181
287#define CAPRI_PIN_SDIO4_DATA_1 182
288#define CAPRI_PIN_SDIO4_DATA_2 183
289#define CAPRI_PIN_SDIO4_DATA_3 184
290#define CAPRI_PIN_SIM_CLK 185
291#define CAPRI_PIN_SIM_DATA 186
292#define CAPRI_PIN_SIM_DET 187
293#define CAPRI_PIN_SIM_RESETN 188
294#define CAPRI_PIN_SIM2_CLK 189
295#define CAPRI_PIN_SIM2_DATA 190
296#define CAPRI_PIN_SIM2_DET 191
297#define CAPRI_PIN_SIM2_RESETN 192
298#define CAPRI_PIN_SRI_C 193
299#define CAPRI_PIN_SRI_D 194
300#define CAPRI_PIN_SRI_E 195
301#define CAPRI_PIN_SSP_EXTCLK 196
302#define CAPRI_PIN_SSP0_CLK 197
303#define CAPRI_PIN_SSP0_FS 198
304#define CAPRI_PIN_SSP0_RXD 199
305#define CAPRI_PIN_SSP0_TXD 200
306#define CAPRI_PIN_SSP2_CLK 201
307#define CAPRI_PIN_SSP2_FS_0 202
308#define CAPRI_PIN_SSP2_FS_1 203
309#define CAPRI_PIN_SSP2_FS_2 204
310#define CAPRI_PIN_SSP2_FS_3 205
311#define CAPRI_PIN_SSP2_RXD_0 206
312#define CAPRI_PIN_SSP2_RXD_1 207
313#define CAPRI_PIN_SSP2_TXD_0 208
314#define CAPRI_PIN_SSP2_TXD_1 209
315#define CAPRI_PIN_SSP3_CLK 210
316#define CAPRI_PIN_SSP3_FS 211
317#define CAPRI_PIN_SSP3_RXD 212
318#define CAPRI_PIN_SSP3_TXD 213
319#define CAPRI_PIN_SSP4_CLK 214
320#define CAPRI_PIN_SSP4_FS 215
321#define CAPRI_PIN_SSP4_RXD 216
322#define CAPRI_PIN_SSP4_TXD 217
323#define CAPRI_PIN_SSP5_CLK 218
324#define CAPRI_PIN_SSP5_FS 219
325#define CAPRI_PIN_SSP5_RXD 220
326#define CAPRI_PIN_SSP5_TXD 221
327#define CAPRI_PIN_SSP6_CLK 222
328#define CAPRI_PIN_SSP6_FS 223
329#define CAPRI_PIN_SSP6_RXD 224
330#define CAPRI_PIN_SSP6_TXD 225
331#define CAPRI_PIN_STAT_1 226
332#define CAPRI_PIN_STAT_2 227
333#define CAPRI_PIN_SYSCLKEN 228
334#define CAPRI_PIN_TRACECLK 229
335#define CAPRI_PIN_TRACEDT00 230
336#define CAPRI_PIN_TRACEDT01 231
337#define CAPRI_PIN_TRACEDT02 232
338#define CAPRI_PIN_TRACEDT03 233
339#define CAPRI_PIN_TRACEDT04 234
340#define CAPRI_PIN_TRACEDT05 235
341#define CAPRI_PIN_TRACEDT06 236
342#define CAPRI_PIN_TRACEDT07 237
343#define CAPRI_PIN_TRACEDT08 238
344#define CAPRI_PIN_TRACEDT09 239
345#define CAPRI_PIN_TRACEDT10 240
346#define CAPRI_PIN_TRACEDT11 241
347#define CAPRI_PIN_TRACEDT12 242
348#define CAPRI_PIN_TRACEDT13 243
349#define CAPRI_PIN_TRACEDT14 244
350#define CAPRI_PIN_TRACEDT15 245
351#define CAPRI_PIN_TXDATA3G0 246
352#define CAPRI_PIN_TXPWRIND 247
353#define CAPRI_PIN_UARTB1_UCTS 248
354#define CAPRI_PIN_UARTB1_URTS 249
355#define CAPRI_PIN_UARTB1_URXD 250
356#define CAPRI_PIN_UARTB1_UTXD 251
357#define CAPRI_PIN_UARTB2_URXD 252
358#define CAPRI_PIN_UARTB2_UTXD 253
359#define CAPRI_PIN_UARTB3_UCTS 254
360#define CAPRI_PIN_UARTB3_URTS 255
361#define CAPRI_PIN_UARTB3_URXD 256
362#define CAPRI_PIN_UARTB3_UTXD 257
363#define CAPRI_PIN_UARTB4_UCTS 258
364#define CAPRI_PIN_UARTB4_URTS 259
365#define CAPRI_PIN_UARTB4_URXD 260
366#define CAPRI_PIN_UARTB4_UTXD 261
367#define CAPRI_PIN_VC_CAM1_SCL 262
368#define CAPRI_PIN_VC_CAM1_SDA 263
369#define CAPRI_PIN_VC_CAM2_SCL 264
370#define CAPRI_PIN_VC_CAM2_SDA 265
371#define CAPRI_PIN_VC_CAM3_SCL 266
372#define CAPRI_PIN_VC_CAM3_SDA 267
373
374#define CAPRI_PIN_DESC(a, b, c) \
375 { .number = a, .name = b, .drv_data = &c##_pin }
376
377/*
378 * Pin description definition. The order here must be the same as defined in
379 * the PADCTRLREG block in the RDB, since the pin number is used as an index
380 * into this array.
381 */
382static const struct pinctrl_pin_desc capri_pinctrl_pins[] = {
383 CAPRI_PIN_DESC(CAPRI_PIN_ADCSYNC, "adcsync", std),
384 CAPRI_PIN_DESC(CAPRI_PIN_BAT_RM, "bat_rm", std),
385 CAPRI_PIN_DESC(CAPRI_PIN_BSC1_SCL, "bsc1_scl", i2c),
386 CAPRI_PIN_DESC(CAPRI_PIN_BSC1_SDA, "bsc1_sda", i2c),
387 CAPRI_PIN_DESC(CAPRI_PIN_BSC2_SCL, "bsc2_scl", i2c),
388 CAPRI_PIN_DESC(CAPRI_PIN_BSC2_SDA, "bsc2_sda", i2c),
389 CAPRI_PIN_DESC(CAPRI_PIN_CLASSGPWR, "classgpwr", std),
390 CAPRI_PIN_DESC(CAPRI_PIN_CLK_CX8, "clk_cx8", std),
391 CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_0, "clkout_0", std),
392 CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_1, "clkout_1", std),
393 CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_2, "clkout_2", std),
394 CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_3, "clkout_3", std),
395 CAPRI_PIN_DESC(CAPRI_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
396 CAPRI_PIN_DESC(CAPRI_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
397 CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
398 CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
399 CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
400 CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC1_CLK, "digmic1_clk", std),
401 CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC1_DQ, "digmic1_dq", std),
402 CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC2_CLK, "digmic2_clk", std),
403 CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC2_DQ, "digmic2_dq", std),
404 CAPRI_PIN_DESC(CAPRI_PIN_GPEN13, "gpen13", std),
405 CAPRI_PIN_DESC(CAPRI_PIN_GPEN14, "gpen14", std),
406 CAPRI_PIN_DESC(CAPRI_PIN_GPEN15, "gpen15", std),
407 CAPRI_PIN_DESC(CAPRI_PIN_GPIO00, "gpio00", std),
408 CAPRI_PIN_DESC(CAPRI_PIN_GPIO01, "gpio01", std),
409 CAPRI_PIN_DESC(CAPRI_PIN_GPIO02, "gpio02", std),
410 CAPRI_PIN_DESC(CAPRI_PIN_GPIO03, "gpio03", std),
411 CAPRI_PIN_DESC(CAPRI_PIN_GPIO04, "gpio04", std),
412 CAPRI_PIN_DESC(CAPRI_PIN_GPIO05, "gpio05", std),
413 CAPRI_PIN_DESC(CAPRI_PIN_GPIO06, "gpio06", std),
414 CAPRI_PIN_DESC(CAPRI_PIN_GPIO07, "gpio07", std),
415 CAPRI_PIN_DESC(CAPRI_PIN_GPIO08, "gpio08", std),
416 CAPRI_PIN_DESC(CAPRI_PIN_GPIO09, "gpio09", std),
417 CAPRI_PIN_DESC(CAPRI_PIN_GPIO10, "gpio10", std),
418 CAPRI_PIN_DESC(CAPRI_PIN_GPIO11, "gpio11", std),
419 CAPRI_PIN_DESC(CAPRI_PIN_GPIO12, "gpio12", std),
420 CAPRI_PIN_DESC(CAPRI_PIN_GPIO13, "gpio13", std),
421 CAPRI_PIN_DESC(CAPRI_PIN_GPIO14, "gpio14", std),
422 CAPRI_PIN_DESC(CAPRI_PIN_GPS_PABLANK, "gps_pablank", std),
423 CAPRI_PIN_DESC(CAPRI_PIN_GPS_TMARK, "gps_tmark", std),
424 CAPRI_PIN_DESC(CAPRI_PIN_HDMI_SCL, "hdmi_scl", hdmi),
425 CAPRI_PIN_DESC(CAPRI_PIN_HDMI_SDA, "hdmi_sda", hdmi),
426 CAPRI_PIN_DESC(CAPRI_PIN_IC_DM, "ic_dm", std),
427 CAPRI_PIN_DESC(CAPRI_PIN_IC_DP, "ic_dp", std),
428 CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
429 CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
430 CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
431 CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
432 CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
433 CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
434 CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
435 CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
436 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_0, "lcd_b_0", std),
437 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_1, "lcd_b_1", std),
438 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_2, "lcd_b_2", std),
439 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_3, "lcd_b_3", std),
440 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_4, "lcd_b_4", std),
441 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_5, "lcd_b_5", std),
442 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_6, "lcd_b_6", std),
443 CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_7, "lcd_b_7", std),
444 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_0, "lcd_g_0", std),
445 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_1, "lcd_g_1", std),
446 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_2, "lcd_g_2", std),
447 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_3, "lcd_g_3", std),
448 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_4, "lcd_g_4", std),
449 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_5, "lcd_g_5", std),
450 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_6, "lcd_g_6", std),
451 CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_7, "lcd_g_7", std),
452 CAPRI_PIN_DESC(CAPRI_PIN_LCD_HSYNC, "lcd_hsync", std),
453 CAPRI_PIN_DESC(CAPRI_PIN_LCD_OE, "lcd_oe", std),
454 CAPRI_PIN_DESC(CAPRI_PIN_LCD_PCLK, "lcd_pclk", std),
455 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_0, "lcd_r_0", std),
456 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_1, "lcd_r_1", std),
457 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_2, "lcd_r_2", std),
458 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_3, "lcd_r_3", std),
459 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_4, "lcd_r_4", std),
460 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_5, "lcd_r_5", std),
461 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_6, "lcd_r_6", std),
462 CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_7, "lcd_r_7", std),
463 CAPRI_PIN_DESC(CAPRI_PIN_LCD_VSYNC, "lcd_vsync", std),
464 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO0, "mdmgpio0", std),
465 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO1, "mdmgpio1", std),
466 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO2, "mdmgpio2", std),
467 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO3, "mdmgpio3", std),
468 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO4, "mdmgpio4", std),
469 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO5, "mdmgpio5", std),
470 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO6, "mdmgpio6", std),
471 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO7, "mdmgpio7", std),
472 CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO8, "mdmgpio8", std),
473 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_0, "mphi_data_0", std),
474 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_1, "mphi_data_1", std),
475 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_2, "mphi_data_2", std),
476 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_3, "mphi_data_3", std),
477 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_4, "mphi_data_4", std),
478 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_5, "mphi_data_5", std),
479 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_6, "mphi_data_6", std),
480 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_7, "mphi_data_7", std),
481 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_8, "mphi_data_8", std),
482 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_9, "mphi_data_9", std),
483 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_10, "mphi_data_10", std),
484 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_11, "mphi_data_11", std),
485 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_12, "mphi_data_12", std),
486 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_13, "mphi_data_13", std),
487 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_14, "mphi_data_14", std),
488 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_15, "mphi_data_15", std),
489 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HA0, "mphi_ha0", std),
490 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HAT0, "mphi_hat0", std),
491 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HAT1, "mphi_hat1", std),
492 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
493 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
494 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
495 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
496 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_RUN0, "mphi_run0", std),
497 CAPRI_PIN_DESC(CAPRI_PIN_MPHI_RUN1, "mphi_run1", std),
498 CAPRI_PIN_DESC(CAPRI_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
499 CAPRI_PIN_DESC(CAPRI_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
500 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_0, "nand_ad_0", std),
501 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_1, "nand_ad_1", std),
502 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_2, "nand_ad_2", std),
503 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_3, "nand_ad_3", std),
504 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_4, "nand_ad_4", std),
505 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_5, "nand_ad_5", std),
506 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_6, "nand_ad_6", std),
507 CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_7, "nand_ad_7", std),
508 CAPRI_PIN_DESC(CAPRI_PIN_NAND_ALE, "nand_ale", std),
509 CAPRI_PIN_DESC(CAPRI_PIN_NAND_CEN_0, "nand_cen_0", std),
510 CAPRI_PIN_DESC(CAPRI_PIN_NAND_CEN_1, "nand_cen_1", std),
511 CAPRI_PIN_DESC(CAPRI_PIN_NAND_CLE, "nand_cle", std),
512 CAPRI_PIN_DESC(CAPRI_PIN_NAND_OEN, "nand_oen", std),
513 CAPRI_PIN_DESC(CAPRI_PIN_NAND_RDY_0, "nand_rdy_0", std),
514 CAPRI_PIN_DESC(CAPRI_PIN_NAND_RDY_1, "nand_rdy_1", std),
515 CAPRI_PIN_DESC(CAPRI_PIN_NAND_WEN, "nand_wen", std),
516 CAPRI_PIN_DESC(CAPRI_PIN_NAND_WP, "nand_wp", std),
517 CAPRI_PIN_DESC(CAPRI_PIN_PC1, "pc1", std),
518 CAPRI_PIN_DESC(CAPRI_PIN_PC2, "pc2", std),
519 CAPRI_PIN_DESC(CAPRI_PIN_PMU_INT, "pmu_int", std),
520 CAPRI_PIN_DESC(CAPRI_PIN_PMU_SCL, "pmu_scl", i2c),
521 CAPRI_PIN_DESC(CAPRI_PIN_PMU_SDA, "pmu_sda", i2c),
522 CAPRI_PIN_DESC(CAPRI_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g", std),
523 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
524 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
525 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
526 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
527 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
528 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
529 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
530 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
531 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
532 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
533 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
534 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
535 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
536 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
537 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
538 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
539 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
540 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
541 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
542 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
543 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
544 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
545 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
546 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
547 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
548 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
549 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
550 CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
551 CAPRI_PIN_DESC(CAPRI_PIN_RTXDATA2G_TXDATA3G1, "rtxdata2g_txdata3g1",
552 std),
553 CAPRI_PIN_DESC(CAPRI_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2", std),
554 CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G0, "rxdata3g0", std),
555 CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G1, "rxdata3g1", std),
556 CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G2, "rxdata3g2", std),
557 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_CLK, "sdio1_clk", std),
558 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_CMD, "sdio1_cmd", std),
559 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
560 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
561 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
562 CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
563 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_CLK, "sdio4_clk", std),
564 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_CMD, "sdio4_cmd", std),
565 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
566 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
567 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
568 CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
569 CAPRI_PIN_DESC(CAPRI_PIN_SIM_CLK, "sim_clk", std),
570 CAPRI_PIN_DESC(CAPRI_PIN_SIM_DATA, "sim_data", std),
571 CAPRI_PIN_DESC(CAPRI_PIN_SIM_DET, "sim_det", std),
572 CAPRI_PIN_DESC(CAPRI_PIN_SIM_RESETN, "sim_resetn", std),
573 CAPRI_PIN_DESC(CAPRI_PIN_SIM2_CLK, "sim2_clk", std),
574 CAPRI_PIN_DESC(CAPRI_PIN_SIM2_DATA, "sim2_data", std),
575 CAPRI_PIN_DESC(CAPRI_PIN_SIM2_DET, "sim2_det", std),
576 CAPRI_PIN_DESC(CAPRI_PIN_SIM2_RESETN, "sim2_resetn", std),
577 CAPRI_PIN_DESC(CAPRI_PIN_SRI_C, "sri_c", std),
578 CAPRI_PIN_DESC(CAPRI_PIN_SRI_D, "sri_d", std),
579 CAPRI_PIN_DESC(CAPRI_PIN_SRI_E, "sri_e", std),
580 CAPRI_PIN_DESC(CAPRI_PIN_SSP_EXTCLK, "ssp_extclk", std),
581 CAPRI_PIN_DESC(CAPRI_PIN_SSP0_CLK, "ssp0_clk", std),
582 CAPRI_PIN_DESC(CAPRI_PIN_SSP0_FS, "ssp0_fs", std),
583 CAPRI_PIN_DESC(CAPRI_PIN_SSP0_RXD, "ssp0_rxd", std),
584 CAPRI_PIN_DESC(CAPRI_PIN_SSP0_TXD, "ssp0_txd", std),
585 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_CLK, "ssp2_clk", std),
586 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_0, "ssp2_fs_0", std),
587 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_1, "ssp2_fs_1", std),
588 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_2, "ssp2_fs_2", std),
589 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_3, "ssp2_fs_3", std),
590 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
591 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
592 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
593 CAPRI_PIN_DESC(CAPRI_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
594 CAPRI_PIN_DESC(CAPRI_PIN_SSP3_CLK, "ssp3_clk", std),
595 CAPRI_PIN_DESC(CAPRI_PIN_SSP3_FS, "ssp3_fs", std),
596 CAPRI_PIN_DESC(CAPRI_PIN_SSP3_RXD, "ssp3_rxd", std),
597 CAPRI_PIN_DESC(CAPRI_PIN_SSP3_TXD, "ssp3_txd", std),
598 CAPRI_PIN_DESC(CAPRI_PIN_SSP4_CLK, "ssp4_clk", std),
599 CAPRI_PIN_DESC(CAPRI_PIN_SSP4_FS, "ssp4_fs", std),
600 CAPRI_PIN_DESC(CAPRI_PIN_SSP4_RXD, "ssp4_rxd", std),
601 CAPRI_PIN_DESC(CAPRI_PIN_SSP4_TXD, "ssp4_txd", std),
602 CAPRI_PIN_DESC(CAPRI_PIN_SSP5_CLK, "ssp5_clk", std),
603 CAPRI_PIN_DESC(CAPRI_PIN_SSP5_FS, "ssp5_fs", std),
604 CAPRI_PIN_DESC(CAPRI_PIN_SSP5_RXD, "ssp5_rxd", std),
605 CAPRI_PIN_DESC(CAPRI_PIN_SSP5_TXD, "ssp5_txd", std),
606 CAPRI_PIN_DESC(CAPRI_PIN_SSP6_CLK, "ssp6_clk", std),
607 CAPRI_PIN_DESC(CAPRI_PIN_SSP6_FS, "ssp6_fs", std),
608 CAPRI_PIN_DESC(CAPRI_PIN_SSP6_RXD, "ssp6_rxd", std),
609 CAPRI_PIN_DESC(CAPRI_PIN_SSP6_TXD, "ssp6_txd", std),
610 CAPRI_PIN_DESC(CAPRI_PIN_STAT_1, "stat_1", std),
611 CAPRI_PIN_DESC(CAPRI_PIN_STAT_2, "stat_2", std),
612 CAPRI_PIN_DESC(CAPRI_PIN_SYSCLKEN, "sysclken", std),
613 CAPRI_PIN_DESC(CAPRI_PIN_TRACECLK, "traceclk", std),
614 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT00, "tracedt00", std),
615 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT01, "tracedt01", std),
616 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT02, "tracedt02", std),
617 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT03, "tracedt03", std),
618 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT04, "tracedt04", std),
619 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT05, "tracedt05", std),
620 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT06, "tracedt06", std),
621 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT07, "tracedt07", std),
622 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT08, "tracedt08", std),
623 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT09, "tracedt09", std),
624 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT10, "tracedt10", std),
625 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT11, "tracedt11", std),
626 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT12, "tracedt12", std),
627 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT13, "tracedt13", std),
628 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT14, "tracedt14", std),
629 CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT15, "tracedt15", std),
630 CAPRI_PIN_DESC(CAPRI_PIN_TXDATA3G0, "txdata3g0", std),
631 CAPRI_PIN_DESC(CAPRI_PIN_TXPWRIND, "txpwrind", std),
632 CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_UCTS, "uartb1_ucts", std),
633 CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_URTS, "uartb1_urts", std),
634 CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_URXD, "uartb1_urxd", std),
635 CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_UTXD, "uartb1_utxd", std),
636 CAPRI_PIN_DESC(CAPRI_PIN_UARTB2_URXD, "uartb2_urxd", std),
637 CAPRI_PIN_DESC(CAPRI_PIN_UARTB2_UTXD, "uartb2_utxd", std),
638 CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_UCTS, "uartb3_ucts", std),
639 CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_URTS, "uartb3_urts", std),
640 CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_URXD, "uartb3_urxd", std),
641 CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_UTXD, "uartb3_utxd", std),
642 CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_UCTS, "uartb4_ucts", std),
643 CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_URTS, "uartb4_urts", std),
644 CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_URXD, "uartb4_urxd", std),
645 CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_UTXD, "uartb4_utxd", std),
646 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
647 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
648 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
649 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
650 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
651 CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
652};
653
654static const char * const capri_alt_groups[] = {
655 "adcsync",
656 "bat_rm",
657 "bsc1_scl",
658 "bsc1_sda",
659 "bsc2_scl",
660 "bsc2_sda",
661 "classgpwr",
662 "clk_cx8",
663 "clkout_0",
664 "clkout_1",
665 "clkout_2",
666 "clkout_3",
667 "clkreq_in_0",
668 "clkreq_in_1",
669 "cws_sys_req1",
670 "cws_sys_req2",
671 "cws_sys_req3",
672 "digmic1_clk",
673 "digmic1_dq",
674 "digmic2_clk",
675 "digmic2_dq",
676 "gpen13",
677 "gpen14",
678 "gpen15",
679 "gpio00",
680 "gpio01",
681 "gpio02",
682 "gpio03",
683 "gpio04",
684 "gpio05",
685 "gpio06",
686 "gpio07",
687 "gpio08",
688 "gpio09",
689 "gpio10",
690 "gpio11",
691 "gpio12",
692 "gpio13",
693 "gpio14",
694 "gps_pablank",
695 "gps_tmark",
696 "hdmi_scl",
697 "hdmi_sda",
698 "ic_dm",
699 "ic_dp",
700 "kp_col_ip_0",
701 "kp_col_ip_1",
702 "kp_col_ip_2",
703 "kp_col_ip_3",
704 "kp_row_op_0",
705 "kp_row_op_1",
706 "kp_row_op_2",
707 "kp_row_op_3",
708 "lcd_b_0",
709 "lcd_b_1",
710 "lcd_b_2",
711 "lcd_b_3",
712 "lcd_b_4",
713 "lcd_b_5",
714 "lcd_b_6",
715 "lcd_b_7",
716 "lcd_g_0",
717 "lcd_g_1",
718 "lcd_g_2",
719 "lcd_g_3",
720 "lcd_g_4",
721 "lcd_g_5",
722 "lcd_g_6",
723 "lcd_g_7",
724 "lcd_hsync",
725 "lcd_oe",
726 "lcd_pclk",
727 "lcd_r_0",
728 "lcd_r_1",
729 "lcd_r_2",
730 "lcd_r_3",
731 "lcd_r_4",
732 "lcd_r_5",
733 "lcd_r_6",
734 "lcd_r_7",
735 "lcd_vsync",
736 "mdmgpio0",
737 "mdmgpio1",
738 "mdmgpio2",
739 "mdmgpio3",
740 "mdmgpio4",
741 "mdmgpio5",
742 "mdmgpio6",
743 "mdmgpio7",
744 "mdmgpio8",
745 "mphi_data_0",
746 "mphi_data_1",
747 "mphi_data_2",
748 "mphi_data_3",
749 "mphi_data_4",
750 "mphi_data_5",
751 "mphi_data_6",
752 "mphi_data_7",
753 "mphi_data_8",
754 "mphi_data_9",
755 "mphi_data_10",
756 "mphi_data_11",
757 "mphi_data_12",
758 "mphi_data_13",
759 "mphi_data_14",
760 "mphi_data_15",
761 "mphi_ha0",
762 "mphi_hat0",
763 "mphi_hat1",
764 "mphi_hce0_n",
765 "mphi_hce1_n",
766 "mphi_hrd_n",
767 "mphi_hwr_n",
768 "mphi_run0",
769 "mphi_run1",
770 "mtx_scan_clk",
771 "mtx_scan_data",
772 "nand_ad_0",
773 "nand_ad_1",
774 "nand_ad_2",
775 "nand_ad_3",
776 "nand_ad_4",
777 "nand_ad_5",
778 "nand_ad_6",
779 "nand_ad_7",
780 "nand_ale",
781 "nand_cen_0",
782 "nand_cen_1",
783 "nand_cle",
784 "nand_oen",
785 "nand_rdy_0",
786 "nand_rdy_1",
787 "nand_wen",
788 "nand_wp",
789 "pc1",
790 "pc2",
791 "pmu_int",
792 "pmu_scl",
793 "pmu_sda",
794 "rfst2g_mtsloten3g",
795 "rgmii_0_rx_ctl",
796 "rgmii_0_rxc",
797 "rgmii_0_rxd_0",
798 "rgmii_0_rxd_1",
799 "rgmii_0_rxd_2",
800 "rgmii_0_rxd_3",
801 "rgmii_0_tx_ctl",
802 "rgmii_0_txc",
803 "rgmii_0_txd_0",
804 "rgmii_0_txd_1",
805 "rgmii_0_txd_2",
806 "rgmii_0_txd_3",
807 "rgmii_1_rx_ctl",
808 "rgmii_1_rxc",
809 "rgmii_1_rxd_0",
810 "rgmii_1_rxd_1",
811 "rgmii_1_rxd_2",
812 "rgmii_1_rxd_3",
813 "rgmii_1_tx_ctl",
814 "rgmii_1_txc",
815 "rgmii_1_txd_0",
816 "rgmii_1_txd_1",
817 "rgmii_1_txd_2",
818 "rgmii_1_txd_3",
819 "rgmii_gpio_0",
820 "rgmii_gpio_1",
821 "rgmii_gpio_2",
822 "rgmii_gpio_3",
823 "rtxdata2g_txdata3g1",
824 "rtxen2g_txdata3g2",
825 "rxdata3g0",
826 "rxdata3g1",
827 "rxdata3g2",
828 "sdio1_clk",
829 "sdio1_cmd",
830 "sdio1_data_0",
831 "sdio1_data_1",
832 "sdio1_data_2",
833 "sdio1_data_3",
834 "sdio4_clk",
835 "sdio4_cmd",
836 "sdio4_data_0",
837 "sdio4_data_1",
838 "sdio4_data_2",
839 "sdio4_data_3",
840 "sim_clk",
841 "sim_data",
842 "sim_det",
843 "sim_resetn",
844 "sim2_clk",
845 "sim2_data",
846 "sim2_det",
847 "sim2_resetn",
848 "sri_c",
849 "sri_d",
850 "sri_e",
851 "ssp_extclk",
852 "ssp0_clk",
853 "ssp0_fs",
854 "ssp0_rxd",
855 "ssp0_txd",
856 "ssp2_clk",
857 "ssp2_fs_0",
858 "ssp2_fs_1",
859 "ssp2_fs_2",
860 "ssp2_fs_3",
861 "ssp2_rxd_0",
862 "ssp2_rxd_1",
863 "ssp2_txd_0",
864 "ssp2_txd_1",
865 "ssp3_clk",
866 "ssp3_fs",
867 "ssp3_rxd",
868 "ssp3_txd",
869 "ssp4_clk",
870 "ssp4_fs",
871 "ssp4_rxd",
872 "ssp4_txd",
873 "ssp5_clk",
874 "ssp5_fs",
875 "ssp5_rxd",
876 "ssp5_txd",
877 "ssp6_clk",
878 "ssp6_fs",
879 "ssp6_rxd",
880 "ssp6_txd",
881 "stat_1",
882 "stat_2",
883 "sysclken",
884 "traceclk",
885 "tracedt00",
886 "tracedt01",
887 "tracedt02",
888 "tracedt03",
889 "tracedt04",
890 "tracedt05",
891 "tracedt06",
892 "tracedt07",
893 "tracedt08",
894 "tracedt09",
895 "tracedt10",
896 "tracedt11",
897 "tracedt12",
898 "tracedt13",
899 "tracedt14",
900 "tracedt15",
901 "txdata3g0",
902 "txpwrind",
903 "uartb1_ucts",
904 "uartb1_urts",
905 "uartb1_urxd",
906 "uartb1_utxd",
907 "uartb2_urxd",
908 "uartb2_utxd",
909 "uartb3_ucts",
910 "uartb3_urts",
911 "uartb3_urxd",
912 "uartb3_utxd",
913 "uartb4_ucts",
914 "uartb4_urts",
915 "uartb4_urxd",
916 "uartb4_utxd",
917 "vc_cam1_scl",
918 "vc_cam1_sda",
919 "vc_cam2_scl",
920 "vc_cam2_sda",
921 "vc_cam3_scl",
922 "vc_cam3_sda",
923};
924
925/* Every pin can implement all ALT1-ALT4 functions */
926#define CAPRI_PIN_FUNCTION(fcn_name) \
927{ \
928 .name = #fcn_name, \
929 .groups = capri_alt_groups, \
930 .ngroups = ARRAY_SIZE(capri_alt_groups), \
931}
932
933static const struct capri_pin_function capri_functions[] = {
934 CAPRI_PIN_FUNCTION(alt1),
935 CAPRI_PIN_FUNCTION(alt2),
936 CAPRI_PIN_FUNCTION(alt3),
937 CAPRI_PIN_FUNCTION(alt4),
938};
939
940static struct capri_pinctrl_data capri_pinctrl = {
941 .pins = capri_pinctrl_pins,
942 .npins = ARRAY_SIZE(capri_pinctrl_pins),
943 .functions = capri_functions,
944 .nfunctions = ARRAY_SIZE(capri_functions),
945};
946
947static inline enum capri_pin_type pin_type_get(struct pinctrl_dev *pctldev,
948 unsigned pin)
949{
950 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
951
952 if (pin >= pdata->npins)
953 return CAPRI_PIN_TYPE_UNKNOWN;
954
955 return *(enum capri_pin_type *)(pdata->pins[pin].drv_data);
956}
957
958#define CAPRI_PIN_SHIFT(type, param) \
959 (CAPRI_ ## type ## _PIN_REG_ ## param ## _SHIFT)
960
961#define CAPRI_PIN_MASK(type, param) \
962 (CAPRI_ ## type ## _PIN_REG_ ## param ## _MASK)
963
964/*
965 * This helper function is used to build up the value and mask used to write to
966 * a pin register, but does not actually write to the register.
967 */
968static inline void capri_pin_update(u32 *reg_val, u32 *reg_mask, u32 param_val,
969 u32 param_shift, u32 param_mask)
970{
971 *reg_val &= ~param_mask;
972 *reg_val |= (param_val << param_shift) & param_mask;
973 *reg_mask |= param_mask;
974}
975
976static struct regmap_config capri_pinctrl_regmap_config = {
977 .reg_bits = 32,
978 .reg_stride = 4,
979 .val_bits = 32,
980 .max_register = CAPRI_PIN_VC_CAM3_SDA,
981};
982
983static int capri_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
984{
985 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
986
987 return pdata->npins;
988}
989
990static const char *capri_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
991 unsigned group)
992{
993 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
994
995 return pdata->pins[group].name;
996}
997
998static int capri_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
999 unsigned group,
1000 const unsigned **pins,
1001 unsigned *num_pins)
1002{
1003 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1004
1005 *pins = &pdata->pins[group].number;
1006 *num_pins = 1;
1007
1008 return 0;
1009}
1010
1011static void capri_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
1012 struct seq_file *s,
1013 unsigned offset)
1014{
1015 seq_printf(s, " %s", dev_name(pctldev->dev));
1016}
1017
1018static struct pinctrl_ops capri_pinctrl_ops = {
1019 .get_groups_count = capri_pinctrl_get_groups_count,
1020 .get_group_name = capri_pinctrl_get_group_name,
1021 .get_group_pins = capri_pinctrl_get_group_pins,
1022 .pin_dbg_show = capri_pinctrl_pin_dbg_show,
1023 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
1024 .dt_free_map = pinctrl_utils_dt_free_map,
1025};
1026
1027static int capri_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
1028{
1029 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1030
1031 return pdata->nfunctions;
1032}
1033
1034static const char *capri_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
1035 unsigned function)
1036{
1037 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1038
1039 return pdata->functions[function].name;
1040}
1041
1042static int capri_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
1043 unsigned function,
1044 const char * const **groups,
1045 unsigned * const num_groups)
1046{
1047 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1048
1049 *groups = pdata->functions[function].groups;
1050 *num_groups = pdata->functions[function].ngroups;
1051
1052 return 0;
1053}
1054
1055static int capri_pinmux_enable(struct pinctrl_dev *pctldev,
1056 unsigned function,
1057 unsigned group)
1058{
1059 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1060 const struct capri_pin_function *f = &pdata->functions[function];
1061 u32 offset = 4 * pdata->pins[group].number;
1062 int rc = 0;
1063
1064 dev_dbg(pctldev->dev,
1065 "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
1066 __func__, f->name, function, pdata->pins[group].name,
1067 pdata->pins[group].number, offset);
1068
1069 rc = regmap_update_bits(pdata->regmap, offset, CAPRI_PIN_REG_F_SEL_MASK,
1070 function << CAPRI_PIN_REG_F_SEL_SHIFT);
1071 if (rc)
1072 dev_err(pctldev->dev,
1073 "Error updating register for pin %s (%d).\n",
1074 pdata->pins[group].name, pdata->pins[group].number);
1075
1076 return rc;
1077}
1078
1079static struct pinmux_ops capri_pinctrl_pinmux_ops = {
1080 .get_functions_count = capri_pinctrl_get_fcns_count,
1081 .get_function_name = capri_pinctrl_get_fcn_name,
1082 .get_function_groups = capri_pinctrl_get_fcn_groups,
1083 .enable = capri_pinmux_enable,
1084};
1085
1086static int capri_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
1087 unsigned pin,
1088 unsigned long *config)
1089{
1090 return -ENOTSUPP;
1091}
1092
1093
1094/* Goes through the configs and update register val/mask */
1095static int capri_std_pin_update(struct pinctrl_dev *pctldev,
1096 unsigned pin,
1097 unsigned long *configs,
1098 unsigned num_configs,
1099 u32 *val,
1100 u32 *mask)
1101{
1102 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1103 int i;
1104 enum pin_config_param param;
1105 u16 arg;
1106
1107 for (i = 0; i < num_configs; i++) {
1108 param = pinconf_to_config_param(configs[i]);
1109 arg = pinconf_to_config_argument(configs[i]);
1110
1111 switch (param) {
1112 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1113 arg = (arg >= 1 ? 1 : 0);
1114 capri_pin_update(val, mask, arg,
1115 CAPRI_PIN_SHIFT(STD, HYST),
1116 CAPRI_PIN_MASK(STD, HYST));
1117 break;
1118 /*
1119 * The pin bias can only be one of pull-up, pull-down, or
1120 * disable. The user does not need to specify a value for the
1121 * property, and the default value from pinconf-generic is
1122 * ignored.
1123 */
1124 case PIN_CONFIG_BIAS_DISABLE:
1125 capri_pin_update(val, mask, 0,
1126 CAPRI_PIN_SHIFT(STD, PULL_UP),
1127 CAPRI_PIN_MASK(STD, PULL_UP));
1128 capri_pin_update(val, mask, 0,
1129 CAPRI_PIN_SHIFT(STD, PULL_DN),
1130 CAPRI_PIN_MASK(STD, PULL_DN));
1131 break;
1132
1133 case PIN_CONFIG_BIAS_PULL_UP:
1134 capri_pin_update(val, mask, 1,
1135 CAPRI_PIN_SHIFT(STD, PULL_UP),
1136 CAPRI_PIN_MASK(STD, PULL_UP));
1137 capri_pin_update(val, mask, 0,
1138 CAPRI_PIN_SHIFT(STD, PULL_DN),
1139 CAPRI_PIN_MASK(STD, PULL_DN));
1140 break;
1141
1142 case PIN_CONFIG_BIAS_PULL_DOWN:
1143 capri_pin_update(val, mask, 0,
1144 CAPRI_PIN_SHIFT(STD, PULL_UP),
1145 CAPRI_PIN_MASK(STD, PULL_UP));
1146 capri_pin_update(val, mask, 1,
1147 CAPRI_PIN_SHIFT(STD, PULL_DN),
1148 CAPRI_PIN_MASK(STD, PULL_DN));
1149 break;
1150
1151 case PIN_CONFIG_SLEW_RATE:
1152 arg = (arg >= 1 ? 1 : 0);
1153 capri_pin_update(val, mask, arg,
1154 CAPRI_PIN_SHIFT(STD, SLEW),
1155 CAPRI_PIN_MASK(STD, SLEW));
1156 break;
1157
1158 case PIN_CONFIG_INPUT_ENABLE:
1159 /* inversed since register is for input _disable_ */
1160 arg = (arg >= 1 ? 0 : 1);
1161 capri_pin_update(val, mask, arg,
1162 CAPRI_PIN_SHIFT(STD, INPUT_DIS),
1163 CAPRI_PIN_MASK(STD, INPUT_DIS));
1164 break;
1165
1166 case PIN_CONFIG_DRIVE_STRENGTH:
1167 /* Valid range is 2-16 mA, even numbers only */
1168 if ((arg < 2) || (arg > 16) || (arg % 2)) {
1169 dev_err(pctldev->dev,
1170 "Invalid Drive Strength value (%d) for "
1171 "pin %s (%d). Valid values are "
1172 "(2..16) mA, even numbers only.\n",
1173 arg, pdata->pins[pin].name, pin);
1174 return -EINVAL;
1175 }
1176 capri_pin_update(val, mask, (arg/2)-1,
1177 CAPRI_PIN_SHIFT(STD, DRV_STR),
1178 CAPRI_PIN_MASK(STD, DRV_STR));
1179 break;
1180
1181 default:
1182 dev_err(pctldev->dev,
1183 "Unrecognized pin config %d for pin %s (%d).\n",
1184 param, pdata->pins[pin].name, pin);
1185 return -EINVAL;
1186
1187 } /* switch config */
1188 } /* for each config */
1189
1190 return 0;
1191}
1192
1193/*
1194 * The pull-up strength for an I2C pin is represented by bits 4-6 in the
1195 * register with the following mapping:
1196 * 0b000: No pull-up
1197 * 0b001: 1200 Ohm
1198 * 0b010: 1800 Ohm
1199 * 0b011: 720 Ohm
1200 * 0b100: 2700 Ohm
1201 * 0b101: 831 Ohm
1202 * 0b110: 1080 Ohm
1203 * 0b111: 568 Ohm
1204 * This array maps pull-up strength in Ohms to register values (1+index).
1205 */
1206static const u16 capri_pullup_map[] = {1200, 1800, 720, 2700, 831, 1080, 568};
1207
1208/* Goes through the configs and update register val/mask */
1209static int capri_i2c_pin_update(struct pinctrl_dev *pctldev,
1210 unsigned pin,
1211 unsigned long *configs,
1212 unsigned num_configs,
1213 u32 *val,
1214 u32 *mask)
1215{
1216 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1217 int i, j;
1218 enum pin_config_param param;
1219 u16 arg;
1220
1221 for (i = 0; i < num_configs; i++) {
1222 param = pinconf_to_config_param(configs[i]);
1223 arg = pinconf_to_config_argument(configs[i]);
1224
1225 switch (param) {
1226 case PIN_CONFIG_BIAS_PULL_UP:
1227 for (j = 0; j < ARRAY_SIZE(capri_pullup_map); j++)
1228 if (capri_pullup_map[j] == arg)
1229 break;
1230
1231 if (j == ARRAY_SIZE(capri_pullup_map)) {
1232 dev_err(pctldev->dev,
1233 "Invalid pull-up value (%d) for pin %s "
1234 "(%d). Valid values are 568, 720, 831, "
1235 "1080, 1200, 1800, 2700 Ohms.\n",
1236 arg, pdata->pins[pin].name, pin);
1237 return -EINVAL;
1238 }
1239
1240 capri_pin_update(val, mask, j+1,
1241 CAPRI_PIN_SHIFT(I2C, PULL_UP_STR),
1242 CAPRI_PIN_MASK(I2C, PULL_UP_STR));
1243 break;
1244
1245 case PIN_CONFIG_BIAS_DISABLE:
1246 capri_pin_update(val, mask, 0,
1247 CAPRI_PIN_SHIFT(I2C, PULL_UP_STR),
1248 CAPRI_PIN_MASK(I2C, PULL_UP_STR));
1249 break;
1250
1251 case PIN_CONFIG_SLEW_RATE:
1252 arg = (arg >= 1 ? 1 : 0);
1253 capri_pin_update(val, mask, arg,
1254 CAPRI_PIN_SHIFT(I2C, SLEW),
1255 CAPRI_PIN_MASK(I2C, SLEW));
1256 break;
1257
1258 case PIN_CONFIG_INPUT_ENABLE:
1259 /* inversed since register is for input _disable_ */
1260 arg = (arg >= 1 ? 0 : 1);
1261 capri_pin_update(val, mask, arg,
1262 CAPRI_PIN_SHIFT(I2C, INPUT_DIS),
1263 CAPRI_PIN_MASK(I2C, INPUT_DIS));
1264 break;
1265
1266 default:
1267 dev_err(pctldev->dev,
1268 "Unrecognized pin config %d for pin %s (%d).\n",
1269 param, pdata->pins[pin].name, pin);
1270 return -EINVAL;
1271
1272 } /* switch config */
1273 } /* for each config */
1274
1275 return 0;
1276}
1277
1278/* Goes through the configs and update register val/mask */
1279static int capri_hdmi_pin_update(struct pinctrl_dev *pctldev,
1280 unsigned pin,
1281 unsigned long *configs,
1282 unsigned num_configs,
1283 u32 *val,
1284 u32 *mask)
1285{
1286 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1287 int i;
1288 enum pin_config_param param;
1289 u16 arg;
1290
1291 for (i = 0; i < num_configs; i++) {
1292 param = pinconf_to_config_param(configs[i]);
1293 arg = pinconf_to_config_argument(configs[i]);
1294
1295 switch (param) {
1296 case PIN_CONFIG_SLEW_RATE:
1297 arg = (arg >= 1 ? 1 : 0);
1298 capri_pin_update(val, mask, arg,
1299 CAPRI_PIN_SHIFT(HDMI, MODE),
1300 CAPRI_PIN_MASK(HDMI, MODE));
1301 break;
1302
1303 case PIN_CONFIG_INPUT_ENABLE:
1304 /* inversed since register is for input _disable_ */
1305 arg = (arg >= 1 ? 0 : 1);
1306 capri_pin_update(val, mask, arg,
1307 CAPRI_PIN_SHIFT(HDMI, INPUT_DIS),
1308 CAPRI_PIN_MASK(HDMI, INPUT_DIS));
1309 break;
1310
1311 default:
1312 dev_err(pctldev->dev,
1313 "Unrecognized pin config %d for pin %s (%d).\n",
1314 param, pdata->pins[pin].name, pin);
1315 return -EINVAL;
1316
1317 } /* switch config */
1318 } /* for each config */
1319
1320 return 0;
1321}
1322
1323static int capri_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
1324 unsigned pin,
1325 unsigned long *configs,
1326 unsigned num_configs)
1327{
1328 struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
1329 enum capri_pin_type pin_type;
1330 u32 offset = 4 * pin;
1331 u32 cfg_val, cfg_mask;
1332 int rc;
1333
1334 cfg_val = 0;
1335 cfg_mask = 0;
1336 pin_type = pin_type_get(pctldev, pin);
1337
1338 /* Different pins have different configuration options */
1339 switch (pin_type) {
1340 case CAPRI_PIN_TYPE_STD:
1341 rc = capri_std_pin_update(pctldev, pin, configs, num_configs,
1342 &cfg_val, &cfg_mask);
1343 break;
1344
1345 case CAPRI_PIN_TYPE_I2C:
1346 rc = capri_i2c_pin_update(pctldev, pin, configs, num_configs,
1347 &cfg_val, &cfg_mask);
1348 break;
1349
1350 case CAPRI_PIN_TYPE_HDMI:
1351 rc = capri_hdmi_pin_update(pctldev, pin, configs, num_configs,
1352 &cfg_val, &cfg_mask);
1353 break;
1354
1355 default:
1356 dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
1357 pdata->pins[pin].name, pin);
1358 return -EINVAL;
1359
1360 } /* switch pin type */
1361
1362 if (rc)
1363 return rc;
1364
1365 dev_dbg(pctldev->dev,
1366 "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
1367 __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
1368
1369 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
1370 if (rc) {
1371 dev_err(pctldev->dev,
1372 "Error updating register for pin %s (%d).\n",
1373 pdata->pins[pin].name, pin);
1374 return rc;
1375 }
1376
1377 return 0;
1378}
1379
1380static struct pinconf_ops capri_pinctrl_pinconf_ops = {
1381 .pin_config_get = capri_pinctrl_pin_config_get,
1382 .pin_config_set = capri_pinctrl_pin_config_set,
1383};
1384
1385static struct pinctrl_desc capri_pinctrl_desc = {
1386 /* name, pins, npins members initialized in probe function */
1387 .pctlops = &capri_pinctrl_ops,
1388 .pmxops = &capri_pinctrl_pinmux_ops,
1389 .confops = &capri_pinctrl_pinconf_ops,
1390 .owner = THIS_MODULE,
1391};
1392
1393int __init capri_pinctrl_probe(struct platform_device *pdev)
1394{
1395 struct capri_pinctrl_data *pdata = &capri_pinctrl;
1396 struct resource *res;
1397 struct pinctrl_dev *pctl;
1398
1399 /* So far We can assume there is only 1 bank of registers */
1400 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1401 if (!res) {
1402 dev_err(&pdev->dev, "Missing MEM resource\n");
1403 return -ENODEV;
1404 }
1405
1406 pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
1407 if (IS_ERR(pdata->reg_base)) {
1408 dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
1409 return -ENODEV;
1410 }
1411
1412 /* Initialize the dynamic part of pinctrl_desc */
1413 pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
1414 &capri_pinctrl_regmap_config);
1415 if (IS_ERR(pdata->regmap)) {
1416 dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
1417 return -ENODEV;
1418 }
1419
1420 capri_pinctrl_desc.name = dev_name(&pdev->dev);
1421 capri_pinctrl_desc.pins = capri_pinctrl.pins;
1422 capri_pinctrl_desc.npins = capri_pinctrl.npins;
1423
1424 pctl = pinctrl_register(&capri_pinctrl_desc,
1425 &pdev->dev,
1426 pdata);
1427 if (!pctl) {
1428 dev_err(&pdev->dev, "Failed to register pinctrl\n");
1429 return -ENODEV;
1430 }
1431
1432 platform_set_drvdata(pdev, pdata);
1433
1434 return 0;
1435}
1436
1437static struct of_device_id capri_pinctrl_of_match[] = {
1438 { .compatible = "brcm,bcm11351-pinctrl", },
1439 { },
1440};
1441
1442static struct platform_driver capri_pinctrl_driver = {
1443 .driver = {
1444 .name = "bcm-capri-pinctrl",
1445 .owner = THIS_MODULE,
1446 .of_match_table = capri_pinctrl_of_match,
1447 },
1448};
1449
1450module_platform_driver_probe(capri_pinctrl_driver, capri_pinctrl_probe);
1451
1452MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
1453MODULE_DESCRIPTION("Broadcom Capri pinctrl driver");
1454MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-msm.c b/drivers/pinctrl/pinctrl-msm.c
index 38d579b47f31..e43fbce56598 100644
--- a/drivers/pinctrl/pinctrl-msm.c
+++ b/drivers/pinctrl/pinctrl-msm.c
@@ -665,7 +665,10 @@ static void msm_gpio_irq_ack(struct irq_data *d)
665 spin_lock_irqsave(&pctrl->lock, flags); 665 spin_lock_irqsave(&pctrl->lock, flags);
666 666
667 val = readl(pctrl->regs + g->intr_status_reg); 667 val = readl(pctrl->regs + g->intr_status_reg);
668 val &= ~BIT(g->intr_status_bit); 668 if (g->intr_ack_high)
669 val |= BIT(g->intr_status_bit);
670 else
671 val &= ~BIT(g->intr_status_bit);
669 writel(val, pctrl->regs + g->intr_status_reg); 672 writel(val, pctrl->regs + g->intr_status_reg);
670 673
671 if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) 674 if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
@@ -744,6 +747,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
744 break; 747 break;
745 case IRQ_TYPE_EDGE_BOTH: 748 case IRQ_TYPE_EDGE_BOTH:
746 val |= BIT(g->intr_detection_bit); 749 val |= BIT(g->intr_detection_bit);
750 val |= BIT(g->intr_polarity_bit);
747 break; 751 break;
748 case IRQ_TYPE_LEVEL_LOW: 752 case IRQ_TYPE_LEVEL_LOW:
749 break; 753 break;
diff --git a/drivers/pinctrl/pinctrl-msm.h b/drivers/pinctrl/pinctrl-msm.h
index 8fbe9fb19f36..6e26f1b676d7 100644
--- a/drivers/pinctrl/pinctrl-msm.h
+++ b/drivers/pinctrl/pinctrl-msm.h
@@ -84,6 +84,7 @@ struct msm_pingroup {
84 84
85 unsigned intr_enable_bit:5; 85 unsigned intr_enable_bit:5;
86 unsigned intr_status_bit:5; 86 unsigned intr_status_bit:5;
87 unsigned intr_ack_high:1;
87 88
88 unsigned intr_target_bit:5; 89 unsigned intr_target_bit:5;
89 unsigned intr_raw_status_bit:5; 90 unsigned intr_raw_status_bit:5;
diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c
index 208341fd57d2..8f6f16ef73f3 100644
--- a/drivers/pinctrl/pinctrl-nomadik.c
+++ b/drivers/pinctrl/pinctrl-nomadik.c
@@ -877,7 +877,6 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
877 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); 877 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
878 u32 status; 878 u32 status;
879 879
880 pr_err("PLONK IRQ %d\n", irq);
881 clk_enable(nmk_chip->clk); 880 clk_enable(nmk_chip->clk);
882 status = readl(nmk_chip->addr + NMK_GPIO_IS); 881 status = readl(nmk_chip->addr + NMK_GPIO_IS);
883 clk_disable(nmk_chip->clk); 882 clk_disable(nmk_chip->clk);
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 46dddc159286..96c60d230c13 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -342,7 +342,7 @@ static const struct pinctrl_ops rockchip_pctrl_ops = {
342 * @pin: pin to change 342 * @pin: pin to change
343 * @mux: new mux function to set 343 * @mux: new mux function to set
344 */ 344 */
345static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) 345static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
346{ 346{
347 struct rockchip_pinctrl *info = bank->drvdata; 347 struct rockchip_pinctrl *info = bank->drvdata;
348 void __iomem *reg = info->reg_base + info->ctrl->mux_offset; 348 void __iomem *reg = info->reg_base + info->ctrl->mux_offset;
@@ -350,6 +350,20 @@ static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
350 u8 bit; 350 u8 bit;
351 u32 data; 351 u32 data;
352 352
353 /*
354 * The first 16 pins of rk3188_bank0 are always gpios and do not have
355 * a mux register at all.
356 */
357 if (bank->bank_type == RK3188_BANK0 && pin < 16) {
358 if (mux != RK_FUNC_GPIO) {
359 dev_err(info->dev,
360 "pin %d only supports a gpio mux\n", pin);
361 return -ENOTSUPP;
362 } else {
363 return 0;
364 }
365 }
366
353 dev_dbg(info->dev, "setting mux of GPIO%d-%d to %d\n", 367 dev_dbg(info->dev, "setting mux of GPIO%d-%d to %d\n",
354 bank->bank_num, pin, mux); 368 bank->bank_num, pin, mux);
355 369
@@ -365,6 +379,8 @@ static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
365 writel(data, reg); 379 writel(data, reg);
366 380
367 spin_unlock_irqrestore(&bank->slock, flags); 381 spin_unlock_irqrestore(&bank->slock, flags);
382
383 return 0;
368} 384}
369 385
370#define RK2928_PULL_OFFSET 0x118 386#define RK2928_PULL_OFFSET 0x118
@@ -560,7 +576,7 @@ static int rockchip_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
560 const unsigned int *pins = info->groups[group].pins; 576 const unsigned int *pins = info->groups[group].pins;
561 const struct rockchip_pin_config *data = info->groups[group].data; 577 const struct rockchip_pin_config *data = info->groups[group].data;
562 struct rockchip_pin_bank *bank; 578 struct rockchip_pin_bank *bank;
563 int cnt; 579 int cnt, ret = 0;
564 580
565 dev_dbg(info->dev, "enable function %s group %s\n", 581 dev_dbg(info->dev, "enable function %s group %s\n",
566 info->functions[selector].name, info->groups[group].name); 582 info->functions[selector].name, info->groups[group].name);
@@ -571,8 +587,18 @@ static int rockchip_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
571 */ 587 */
572 for (cnt = 0; cnt < info->groups[group].npins; cnt++) { 588 for (cnt = 0; cnt < info->groups[group].npins; cnt++) {
573 bank = pin_to_bank(info, pins[cnt]); 589 bank = pin_to_bank(info, pins[cnt]);
574 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 590 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base,
575 data[cnt].func); 591 data[cnt].func);
592 if (ret)
593 break;
594 }
595
596 if (ret) {
597 /* revert the already done pin settings */
598 for (cnt--; cnt >= 0; cnt--)
599 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
600
601 return ret;
576 } 602 }
577 603
578 return 0; 604 return 0;
@@ -607,7 +633,7 @@ static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
607 struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 633 struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
608 struct rockchip_pin_bank *bank; 634 struct rockchip_pin_bank *bank;
609 struct gpio_chip *chip; 635 struct gpio_chip *chip;
610 int pin; 636 int pin, ret;
611 u32 data; 637 u32 data;
612 638
613 chip = range->gc; 639 chip = range->gc;
@@ -617,7 +643,9 @@ static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
617 dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n", 643 dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n",
618 offset, range->name, pin, input ? "input" : "output"); 644 offset, range->name, pin, input ? "input" : "output");
619 645
620 rockchip_set_mux(bank, pin, RK_FUNC_GPIO); 646 ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO);
647 if (ret < 0)
648 return ret;
621 649
622 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); 650 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
623 /* set bit to 1 for output, 0 for input */ 651 /* set bit to 1 for output, 0 for input */
@@ -1144,9 +1172,13 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
1144 u32 polarity; 1172 u32 polarity;
1145 u32 level; 1173 u32 level;
1146 u32 data; 1174 u32 data;
1175 int ret;
1147 1176
1148 /* make sure the pin is configured as gpio input */ 1177 /* make sure the pin is configured as gpio input */
1149 rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO); 1178 ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO);
1179 if (ret < 0)
1180 return ret;
1181
1150 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); 1182 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
1151 data &= ~mask; 1183 data &= ~mask;
1152 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); 1184 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR);
@@ -1534,7 +1566,7 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
1534 .nr_banks = ARRAY_SIZE(rk3188_pin_banks), 1566 .nr_banks = ARRAY_SIZE(rk3188_pin_banks),
1535 .label = "RK3188-GPIO", 1567 .label = "RK3188-GPIO",
1536 .type = RK3188, 1568 .type = RK3188,
1537 .mux_offset = 0x68, 1569 .mux_offset = 0x60,
1538 .pull_calc_reg = rk3188_calc_pull_reg_and_bit, 1570 .pull_calc_reg = rk3188_calc_pull_reg_and_bit,
1539}; 1571};
1540 1572
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 81075f2a1d3f..2960557bfed9 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -810,6 +810,7 @@ static const struct pinconf_ops pcs_pinconf_ops = {
810static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, 810static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
811 unsigned pin_pos) 811 unsigned pin_pos)
812{ 812{
813 struct pcs_soc_data *pcs_soc = &pcs->socdata;
813 struct pinctrl_pin_desc *pin; 814 struct pinctrl_pin_desc *pin;
814 struct pcs_name *pn; 815 struct pcs_name *pn;
815 int i; 816 int i;
@@ -821,6 +822,18 @@ static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
821 return -ENOMEM; 822 return -ENOMEM;
822 } 823 }
823 824
825 if (pcs_soc->irq_enable_mask) {
826 unsigned val;
827
828 val = pcs->read(pcs->base + offset);
829 if (val & pcs_soc->irq_enable_mask) {
830 dev_dbg(pcs->dev, "irq enabled at boot for pin at %lx (%x), clearing\n",
831 (unsigned long)pcs->res->start + offset, val);
832 val &= ~pcs_soc->irq_enable_mask;
833 pcs->write(val, pcs->base + offset);
834 }
835 }
836
824 pin = &pcs->pins.pa[i]; 837 pin = &pcs->pins.pa[i];
825 pn = &pcs->names[i]; 838 pn = &pcs->names[i];
826 sprintf(pn->name, "%lx.%d", 839 sprintf(pn->name, "%lx.%d",
diff --git a/drivers/pinctrl/pinctrl-tb10x.c b/drivers/pinctrl/pinctrl-tb10x.c
index c5e0f6973a3b..26ca6855f478 100644
--- a/drivers/pinctrl/pinctrl-tb10x.c
+++ b/drivers/pinctrl/pinctrl-tb10x.c
@@ -629,9 +629,8 @@ static int tb10x_gpio_request_enable(struct pinctrl_dev *pctl,
629 */ 629 */
630 for (i = 0; i < state->pinfuncgrpcnt; i++) { 630 for (i = 0; i < state->pinfuncgrpcnt; i++) {
631 const struct tb10x_pinfuncgrp *pfg = &state->pingroups[i]; 631 const struct tb10x_pinfuncgrp *pfg = &state->pingroups[i];
632 unsigned int port = pfg->port;
633 unsigned int mode = pfg->mode; 632 unsigned int mode = pfg->mode;
634 int j; 633 int j, port = pfg->port;
635 634
636 /* 635 /*
637 * Skip pin groups which are always mapped and don't need 636 * Skip pin groups which are always mapped and don't need
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 48093719167a..f5cd3f961808 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -4794,8 +4794,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
4794 FN_MSIOF0_SCK_B, 0, 4794 FN_MSIOF0_SCK_B, 0,
4795 /* IP5_23_21 [3] */ 4795 /* IP5_23_21 [3] */
4796 FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4, 4796 FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4,
4797 FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, 4797 FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, FN_IERX_C,
4798 FN_IERX_C, 0,
4799 /* IP5_20_18 [3] */ 4798 /* IP5_20_18 [3] */
4800 FN_WE0_N, FN_IECLK, FN_CAN_CLK, 4799 FN_WE0_N, FN_IECLK, FN_CAN_CLK,
4801 FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0, 4800 FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 5186d70c49d4..7868bf3a0f91 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -5288,7 +5288,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
5288 /* SEL_SCIF3 [2] */ 5288 /* SEL_SCIF3 [2] */
5289 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, 5289 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
5290 /* SEL_IEB [2] */ 5290 /* SEL_IEB [2] */
5291 FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 5291 FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
5292 /* SEL_MMC [1] */ 5292 /* SEL_MMC [1] */
5293 FN_SEL_MMC_0, FN_SEL_MMC_1, 5293 FN_SEL_MMC_0, FN_SEL_MMC_1,
5294 /* SEL_SCIF5 [1] */ 5294 /* SEL_SCIF5 [1] */
diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c
index 9f611cbbc294..c31aa07b3ba5 100644
--- a/drivers/pnp/pnpacpi/core.c
+++ b/drivers/pnp/pnpacpi/core.c
@@ -83,8 +83,7 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
83{ 83{
84 struct acpi_device *acpi_dev; 84 struct acpi_device *acpi_dev;
85 acpi_handle handle; 85 acpi_handle handle;
86 struct acpi_buffer buffer; 86 int ret = 0;
87 int ret;
88 87
89 pnp_dbg(&dev->dev, "set resources\n"); 88 pnp_dbg(&dev->dev, "set resources\n");
90 89
@@ -97,19 +96,26 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
97 if (WARN_ON_ONCE(acpi_dev != dev->data)) 96 if (WARN_ON_ONCE(acpi_dev != dev->data))
98 dev->data = acpi_dev; 97 dev->data = acpi_dev;
99 98
100 ret = pnpacpi_build_resource_template(dev, &buffer); 99 if (acpi_has_method(handle, METHOD_NAME__SRS)) {
101 if (ret) 100 struct acpi_buffer buffer;
102 return ret; 101
103 ret = pnpacpi_encode_resources(dev, &buffer); 102 ret = pnpacpi_build_resource_template(dev, &buffer);
104 if (ret) { 103 if (ret)
104 return ret;
105
106 ret = pnpacpi_encode_resources(dev, &buffer);
107 if (!ret) {
108 acpi_status status;
109
110 status = acpi_set_current_resources(handle, &buffer);
111 if (ACPI_FAILURE(status))
112 ret = -EIO;
113 }
105 kfree(buffer.pointer); 114 kfree(buffer.pointer);
106 return ret;
107 } 115 }
108 if (ACPI_FAILURE(acpi_set_current_resources(handle, &buffer))) 116 if (!ret && acpi_bus_power_manageable(handle))
109 ret = -EINVAL;
110 else if (acpi_bus_power_manageable(handle))
111 ret = acpi_bus_set_power(handle, ACPI_STATE_D0); 117 ret = acpi_bus_set_power(handle, ACPI_STATE_D0);
112 kfree(buffer.pointer); 118
113 return ret; 119 return ret;
114} 120}
115 121
@@ -117,7 +123,7 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
117{ 123{
118 struct acpi_device *acpi_dev; 124 struct acpi_device *acpi_dev;
119 acpi_handle handle; 125 acpi_handle handle;
120 int ret; 126 acpi_status status;
121 127
122 dev_dbg(&dev->dev, "disable resources\n"); 128 dev_dbg(&dev->dev, "disable resources\n");
123 129
@@ -128,13 +134,15 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
128 } 134 }
129 135
130 /* acpi_unregister_gsi(pnp_irq(dev, 0)); */ 136 /* acpi_unregister_gsi(pnp_irq(dev, 0)); */
131 ret = 0;
132 if (acpi_bus_power_manageable(handle)) 137 if (acpi_bus_power_manageable(handle))
133 acpi_bus_set_power(handle, ACPI_STATE_D3_COLD); 138 acpi_bus_set_power(handle, ACPI_STATE_D3_COLD);
134 /* continue even if acpi_bus_set_power() fails */ 139
135 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_DIS", NULL, NULL))) 140 /* continue even if acpi_bus_set_power() fails */
136 ret = -ENODEV; 141 status = acpi_evaluate_object(handle, "_DIS", NULL, NULL);
137 return ret; 142 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
143 return -ENODEV;
144
145 return 0;
138} 146}
139 147
140#ifdef CONFIG_ACPI_SLEEP 148#ifdef CONFIG_ACPI_SLEEP
diff --git a/drivers/pnp/pnpbios/bioscalls.c b/drivers/pnp/pnpbios/bioscalls.c
index deb7f4bcdb7b..438d4c72c7b3 100644
--- a/drivers/pnp/pnpbios/bioscalls.c
+++ b/drivers/pnp/pnpbios/bioscalls.c
@@ -37,7 +37,7 @@ __visible struct {
37 * kernel begins at offset 3GB... 37 * kernel begins at offset 3GB...
38 */ 38 */
39 39
40asmlinkage void pnp_bios_callfunc(void); 40asmlinkage __visible void pnp_bios_callfunc(void);
41 41
42__asm__(".text \n" 42__asm__(".text \n"
43 __ALIGN_STR "\n" 43 __ALIGN_STR "\n"
diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c
index 258fef272ea7..ebf0d6710b5a 100644
--- a/drivers/pnp/quirks.c
+++ b/drivers/pnp/quirks.c
@@ -15,6 +15,7 @@
15 15
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/pci.h>
18#include <linux/string.h> 19#include <linux/string.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
20#include <linux/pnp.h> 21#include <linux/pnp.h>
@@ -334,6 +335,81 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
334} 335}
335#endif 336#endif
336 337
338#ifdef CONFIG_PCI
339/* Device IDs of parts that have 32KB MCH space */
340static const unsigned int mch_quirk_devices[] = {
341 0x0154, /* Ivy Bridge */
342 0x0c00, /* Haswell */
343};
344
345static struct pci_dev *get_intel_host(void)
346{
347 int i;
348 struct pci_dev *host;
349
350 for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) {
351 host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i],
352 NULL);
353 if (host)
354 return host;
355 }
356 return NULL;
357}
358
359static void quirk_intel_mch(struct pnp_dev *dev)
360{
361 struct pci_dev *host;
362 u32 addr_lo, addr_hi;
363 struct pci_bus_region region;
364 struct resource mch;
365 struct pnp_resource *pnp_res;
366 struct resource *res;
367
368 host = get_intel_host();
369 if (!host)
370 return;
371
372 /*
373 * MCHBAR is not an architected PCI BAR, so MCH space is usually
374 * reported as a PNP0C02 resource. The MCH space was originally
375 * 16KB, but is 32KB in newer parts. Some BIOSes still report a
376 * PNP0C02 resource that is only 16KB, which means the rest of the
377 * MCH space is consumed but unreported.
378 */
379
380 /*
381 * Read MCHBAR for Host Member Mapped Register Range Base
382 * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
383 * Sec 3.1.12.
384 */
385 pci_read_config_dword(host, 0x48, &addr_lo);
386 region.start = addr_lo & ~0x7fff;
387 pci_read_config_dword(host, 0x4c, &addr_hi);
388 region.start |= (u64) addr_hi << 32;
389 region.end = region.start + 32*1024 - 1;
390
391 memset(&mch, 0, sizeof(mch));
392 mch.flags = IORESOURCE_MEM;
393 pcibios_bus_to_resource(host->bus, &mch, &region);
394
395 list_for_each_entry(pnp_res, &dev->resources, list) {
396 res = &pnp_res->res;
397 if (res->end < mch.start || res->start > mch.end)
398 continue; /* no overlap */
399 if (res->start == mch.start && res->end == mch.end)
400 continue; /* exact match */
401
402 dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n",
403 res, pci_name(host), &mch);
404 res->start = mch.start;
405 res->end = mch.end;
406 break;
407 }
408
409 pci_dev_put(host);
410}
411#endif
412
337/* 413/*
338 * PnP Quirks 414 * PnP Quirks
339 * Cards or devices that need some tweaking due to incomplete resource info 415 * Cards or devices that need some tweaking due to incomplete resource info
@@ -364,6 +440,9 @@ static struct pnp_fixup pnp_fixups[] = {
364#ifdef CONFIG_AMD_NB 440#ifdef CONFIG_AMD_NB
365 {"PNP0c01", quirk_amd_mmconfig_area}, 441 {"PNP0c01", quirk_amd_mmconfig_area},
366#endif 442#endif
443#ifdef CONFIG_PCI
444 {"PNP0c02", quirk_intel_mch},
445#endif
367 {""} 446 {""}
368}; 447};
369 448
diff --git a/drivers/power/reset/vexpress-poweroff.c b/drivers/power/reset/vexpress-poweroff.c
index 476aa495c110..b95cf71ed695 100644
--- a/drivers/power/reset/vexpress-poweroff.c
+++ b/drivers/power/reset/vexpress-poweroff.c
@@ -11,7 +11,7 @@
11 * Copyright (C) 2012 ARM Limited 11 * Copyright (C) 2012 ARM Limited
12 */ 12 */
13 13
14#include <linux/jiffies.h> 14#include <linux/delay.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_device.h> 16#include <linux/of_device.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
@@ -23,17 +23,12 @@
23static void vexpress_reset_do(struct device *dev, const char *what) 23static void vexpress_reset_do(struct device *dev, const char *what)
24{ 24{
25 int err = -ENOENT; 25 int err = -ENOENT;
26 struct vexpress_config_func *func = 26 struct vexpress_config_func *func = dev_get_drvdata(dev);
27 vexpress_config_func_get_by_dev(dev);
28 27
29 if (func) { 28 if (func) {
30 unsigned long timeout;
31
32 err = vexpress_config_write(func, 0, 0); 29 err = vexpress_config_write(func, 0, 0);
33 30 if (!err)
34 timeout = jiffies + HZ; 31 mdelay(1000);
35 while (time_before(jiffies, timeout))
36 cpu_relax();
37 } 32 }
38 33
39 dev_emerg(dev, "Unable to %s (%d)\n", what, err); 34 dev_emerg(dev, "Unable to %s (%d)\n", what, err);
@@ -96,12 +91,18 @@ static int vexpress_reset_probe(struct platform_device *pdev)
96 enum vexpress_reset_func func; 91 enum vexpress_reset_func func;
97 const struct of_device_id *match = 92 const struct of_device_id *match =
98 of_match_device(vexpress_reset_of_match, &pdev->dev); 93 of_match_device(vexpress_reset_of_match, &pdev->dev);
94 struct vexpress_config_func *config_func;
99 95
100 if (match) 96 if (match)
101 func = (enum vexpress_reset_func)match->data; 97 func = (enum vexpress_reset_func)match->data;
102 else 98 else
103 func = pdev->id_entry->driver_data; 99 func = pdev->id_entry->driver_data;
104 100
101 config_func = vexpress_config_func_get_by_dev(&pdev->dev);
102 if (!config_func)
103 return -EINVAL;
104 dev_set_drvdata(&pdev->dev, config_func);
105
105 switch (func) { 106 switch (func) {
106 case FUNC_SHUTDOWN: 107 case FUNC_SHUTDOWN:
107 vexpress_power_off_device = &pdev->dev; 108 vexpress_power_off_device = &pdev->dev;
diff --git a/drivers/pwm/pwm-spear.c b/drivers/pwm/pwm-spear.c
index 8ad26b8bf418..cb2d4f0f9711 100644
--- a/drivers/pwm/pwm-spear.c
+++ b/drivers/pwm/pwm-spear.c
@@ -2,7 +2,7 @@
2 * ST Microelectronics SPEAr Pulse Width Modulator driver 2 * ST Microelectronics SPEAr Pulse Width Modulator driver
3 * 3 *
4 * Copyright (C) 2012 ST Microelectronics 4 * Copyright (C) 2012 ST Microelectronics
5 * Shiraz Hashim <shiraz.hashim@st.com> 5 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any 8 * License version 2. This program is licensed "as is" without any
@@ -264,6 +264,6 @@ static struct platform_driver spear_pwm_driver = {
264module_platform_driver(spear_pwm_driver); 264module_platform_driver(spear_pwm_driver);
265 265
266MODULE_LICENSE("GPL"); 266MODULE_LICENSE("GPL");
267MODULE_AUTHOR("Shiraz Hashim <shiraz.hashim@st.com>"); 267MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
268MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.com>"); 268MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.com>");
269MODULE_ALIAS("platform:spear-pwm"); 269MODULE_ALIAS("platform:spear-pwm");
diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c
index ded3b3574209..6d38be3d970c 100644
--- a/drivers/regulator/pbias-regulator.c
+++ b/drivers/regulator/pbias-regulator.c
@@ -38,66 +38,24 @@ struct pbias_reg_info {
38struct pbias_regulator_data { 38struct pbias_regulator_data {
39 struct regulator_desc desc; 39 struct regulator_desc desc;
40 void __iomem *pbias_addr; 40 void __iomem *pbias_addr;
41 unsigned int pbias_reg;
42 struct regulator_dev *dev; 41 struct regulator_dev *dev;
43 struct regmap *syscon; 42 struct regmap *syscon;
44 const struct pbias_reg_info *info; 43 const struct pbias_reg_info *info;
45 int voltage; 44 int voltage;
46}; 45};
47 46
48static int pbias_regulator_set_voltage(struct regulator_dev *dev, 47static const unsigned int pbias_volt_table[] = {
49 int min_uV, int max_uV, unsigned *selector) 48 1800000,
50{ 49 3000000
51 struct pbias_regulator_data *data = rdev_get_drvdata(dev); 50};
52 const struct pbias_reg_info *info = data->info;
53 int ret, vmode;
54
55 if (min_uV <= 1800000)
56 vmode = 0;
57 else if (min_uV > 1800000)
58 vmode = info->vmode;
59
60 ret = regmap_update_bits(data->syscon, data->pbias_reg,
61 info->vmode, vmode);
62
63 return ret;
64}
65
66static int pbias_regulator_get_voltage(struct regulator_dev *rdev)
67{
68 struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
69 const struct pbias_reg_info *info = data->info;
70 int value, voltage;
71
72 regmap_read(data->syscon, data->pbias_reg, &value);
73 value &= info->vmode;
74
75 voltage = value ? 3000000 : 1800000;
76
77 return voltage;
78}
79 51
80static int pbias_regulator_enable(struct regulator_dev *rdev) 52static int pbias_regulator_enable(struct regulator_dev *rdev)
81{ 53{
82 struct pbias_regulator_data *data = rdev_get_drvdata(rdev); 54 struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
83 const struct pbias_reg_info *info = data->info; 55 const struct pbias_reg_info *info = data->info;
84 int ret;
85
86 ret = regmap_update_bits(data->syscon, data->pbias_reg,
87 info->enable_mask, info->enable);
88
89 return ret;
90}
91
92static int pbias_regulator_disable(struct regulator_dev *rdev)
93{
94 struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
95 const struct pbias_reg_info *info = data->info;
96 int ret;
97 56
98 ret = regmap_update_bits(data->syscon, data->pbias_reg, 57 return regmap_update_bits(data->syscon, rdev->desc->enable_reg,
99 info->enable_mask, 0); 58 info->enable_mask, info->enable);
100 return ret;
101} 59}
102 60
103static int pbias_regulator_is_enable(struct regulator_dev *rdev) 61static int pbias_regulator_is_enable(struct regulator_dev *rdev)
@@ -106,17 +64,18 @@ static int pbias_regulator_is_enable(struct regulator_dev *rdev)
106 const struct pbias_reg_info *info = data->info; 64 const struct pbias_reg_info *info = data->info;
107 int value; 65 int value;
108 66
109 regmap_read(data->syscon, data->pbias_reg, &value); 67 regmap_read(data->syscon, rdev->desc->enable_reg, &value);
110 68
111 return (value & info->enable_mask) == info->enable_mask; 69 return (value & info->enable_mask) == info->enable;
112} 70}
113 71
114static struct regulator_ops pbias_regulator_voltage_ops = { 72static struct regulator_ops pbias_regulator_voltage_ops = {
115 .set_voltage = pbias_regulator_set_voltage, 73 .list_voltage = regulator_list_voltage_table,
116 .get_voltage = pbias_regulator_get_voltage, 74 .get_voltage_sel = regulator_get_voltage_sel_regmap,
117 .enable = pbias_regulator_enable, 75 .set_voltage_sel = regulator_set_voltage_sel_regmap,
118 .disable = pbias_regulator_disable, 76 .enable = pbias_regulator_enable,
119 .is_enabled = pbias_regulator_is_enable, 77 .disable = regulator_disable_regmap,
78 .is_enabled = pbias_regulator_is_enable,
120}; 79};
121 80
122static const struct pbias_reg_info pbias_mmc_omap2430 = { 81static const struct pbias_reg_info pbias_mmc_omap2430 = {
@@ -192,6 +151,7 @@ static int pbias_regulator_probe(struct platform_device *pdev)
192 if (IS_ERR(syscon)) 151 if (IS_ERR(syscon))
193 return PTR_ERR(syscon); 152 return PTR_ERR(syscon);
194 153
154 cfg.regmap = syscon;
195 cfg.dev = &pdev->dev; 155 cfg.dev = &pdev->dev;
196 156
197 for (idx = 0; idx < PBIAS_NUM_REGS && data_idx < count; idx++) { 157 for (idx = 0; idx < PBIAS_NUM_REGS && data_idx < count; idx++) {
@@ -207,15 +167,19 @@ static int pbias_regulator_probe(struct platform_device *pdev)
207 if (!res) 167 if (!res)
208 return -EINVAL; 168 return -EINVAL;
209 169
210 drvdata[data_idx].pbias_reg = res->start;
211 drvdata[data_idx].syscon = syscon; 170 drvdata[data_idx].syscon = syscon;
212 drvdata[data_idx].info = info; 171 drvdata[data_idx].info = info;
213 drvdata[data_idx].desc.name = info->name; 172 drvdata[data_idx].desc.name = info->name;
214 drvdata[data_idx].desc.owner = THIS_MODULE; 173 drvdata[data_idx].desc.owner = THIS_MODULE;
215 drvdata[data_idx].desc.type = REGULATOR_VOLTAGE; 174 drvdata[data_idx].desc.type = REGULATOR_VOLTAGE;
216 drvdata[data_idx].desc.ops = &pbias_regulator_voltage_ops; 175 drvdata[data_idx].desc.ops = &pbias_regulator_voltage_ops;
176 drvdata[data_idx].desc.volt_table = pbias_volt_table;
217 drvdata[data_idx].desc.n_voltages = 2; 177 drvdata[data_idx].desc.n_voltages = 2;
218 drvdata[data_idx].desc.enable_time = info->enable_time; 178 drvdata[data_idx].desc.enable_time = info->enable_time;
179 drvdata[data_idx].desc.vsel_reg = res->start;
180 drvdata[data_idx].desc.vsel_mask = info->vmode;
181 drvdata[data_idx].desc.enable_reg = res->start;
182 drvdata[data_idx].desc.enable_mask = info->enable_mask;
219 183
220 cfg.init_data = pbias_matches[idx].init_data; 184 cfg.init_data = pbias_matches[idx].init_data;
221 cfg.driver_data = &drvdata[data_idx]; 185 cfg.driver_data = &drvdata[data_idx];
diff --git a/drivers/rtc/rtc-pcf8523.c b/drivers/rtc/rtc-pcf8523.c
index 5c8f8226c848..4cdb64be061b 100644
--- a/drivers/rtc/rtc-pcf8523.c
+++ b/drivers/rtc/rtc-pcf8523.c
@@ -206,7 +206,7 @@ static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
206 tm->tm_hour = bcd2bin(regs[2] & 0x3f); 206 tm->tm_hour = bcd2bin(regs[2] & 0x3f);
207 tm->tm_mday = bcd2bin(regs[3] & 0x3f); 207 tm->tm_mday = bcd2bin(regs[3] & 0x3f);
208 tm->tm_wday = regs[4] & 0x7; 208 tm->tm_wday = regs[4] & 0x7;
209 tm->tm_mon = bcd2bin(regs[5] & 0x1f); 209 tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
210 tm->tm_year = bcd2bin(regs[6]) + 100; 210 tm->tm_year = bcd2bin(regs[6]) + 100;
211 211
212 return rtc_valid_tm(tm); 212 return rtc_valid_tm(tm);
@@ -229,7 +229,7 @@ static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
229 regs[3] = bin2bcd(tm->tm_hour); 229 regs[3] = bin2bcd(tm->tm_hour);
230 regs[4] = bin2bcd(tm->tm_mday); 230 regs[4] = bin2bcd(tm->tm_mday);
231 regs[5] = tm->tm_wday; 231 regs[5] = tm->tm_wday;
232 regs[6] = bin2bcd(tm->tm_mon); 232 regs[6] = bin2bcd(tm->tm_mon + 1);
233 regs[7] = bin2bcd(tm->tm_year - 100); 233 regs[7] = bin2bcd(tm->tm_year - 100);
234 234
235 msg.addr = client->addr; 235 msg.addr = client->addr;
diff --git a/drivers/s390/char/sclp.c b/drivers/s390/char/sclp.c
index 1990285296c6..c316051d9bda 100644
--- a/drivers/s390/char/sclp.c
+++ b/drivers/s390/char/sclp.c
@@ -1252,7 +1252,7 @@ static __init int sclp_initcall(void)
1252 return rc; 1252 return rc;
1253 1253
1254 sclp_pdev = platform_device_register_simple("sclp", -1, NULL, 0); 1254 sclp_pdev = platform_device_register_simple("sclp", -1, NULL, 0);
1255 rc = PTR_RET(sclp_pdev); 1255 rc = PTR_ERR_OR_ZERO(sclp_pdev);
1256 if (rc) 1256 if (rc)
1257 goto fail_platform_driver_unregister; 1257 goto fail_platform_driver_unregister;
1258 1258
diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c
index 6e8f90f84e49..6e14999f9e8f 100644
--- a/drivers/s390/char/sclp_cmd.c
+++ b/drivers/s390/char/sclp_cmd.c
@@ -515,7 +515,7 @@ static int __init sclp_detect_standby_memory(void)
515 if (rc) 515 if (rc)
516 goto out; 516 goto out;
517 sclp_pdev = platform_device_register_simple("sclp_mem", -1, NULL, 0); 517 sclp_pdev = platform_device_register_simple("sclp_mem", -1, NULL, 0);
518 rc = PTR_RET(sclp_pdev); 518 rc = PTR_ERR_OR_ZERO(sclp_pdev);
519 if (rc) 519 if (rc)
520 goto out_driver; 520 goto out_driver;
521 sclp_add_standby_memory(); 521 sclp_add_standby_memory();
diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c
index 4eed38cd0af6..cd9c91909596 100644
--- a/drivers/s390/char/sclp_vt220.c
+++ b/drivers/s390/char/sclp_vt220.c
@@ -97,13 +97,16 @@ static void sclp_vt220_pm_event_fn(struct sclp_register *reg,
97static int __sclp_vt220_emit(struct sclp_vt220_request *request); 97static int __sclp_vt220_emit(struct sclp_vt220_request *request);
98static void sclp_vt220_emit_current(void); 98static void sclp_vt220_emit_current(void);
99 99
100/* Registration structure for our interest in SCLP event buffers */ 100/* Registration structure for SCLP output event buffers */
101static struct sclp_register sclp_vt220_register = { 101static struct sclp_register sclp_vt220_register = {
102 .send_mask = EVTYP_VT220MSG_MASK, 102 .send_mask = EVTYP_VT220MSG_MASK,
103 .pm_event_fn = sclp_vt220_pm_event_fn,
104};
105
106/* Registration structure for SCLP input event buffers */
107static struct sclp_register sclp_vt220_register_input = {
103 .receive_mask = EVTYP_VT220MSG_MASK, 108 .receive_mask = EVTYP_VT220MSG_MASK,
104 .state_change_fn = NULL,
105 .receiver_fn = sclp_vt220_receiver_fn, 109 .receiver_fn = sclp_vt220_receiver_fn,
106 .pm_event_fn = sclp_vt220_pm_event_fn,
107}; 110};
108 111
109 112
@@ -715,9 +718,14 @@ static int __init sclp_vt220_tty_init(void)
715 rc = tty_register_driver(driver); 718 rc = tty_register_driver(driver);
716 if (rc) 719 if (rc)
717 goto out_init; 720 goto out_init;
721 rc = sclp_register(&sclp_vt220_register_input);
722 if (rc)
723 goto out_reg;
718 sclp_vt220_driver = driver; 724 sclp_vt220_driver = driver;
719 return 0; 725 return 0;
720 726
727out_reg:
728 tty_unregister_driver(driver);
721out_init: 729out_init:
722 __sclp_vt220_cleanup(); 730 __sclp_vt220_cleanup();
723out_driver: 731out_driver:
diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c
index 9f0ea6cb6922..e3bf885f4a6c 100644
--- a/drivers/s390/cio/chsc.c
+++ b/drivers/s390/cio/chsc.c
@@ -541,18 +541,27 @@ static void chsc_process_sei_nt0(struct chsc_sei_nt0_area *sei_area)
541 541
542static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm) 542static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm)
543{ 543{
544 do { 544 static int ntsm_unsupported;
545
546 while (true) {
545 memset(sei, 0, sizeof(*sei)); 547 memset(sei, 0, sizeof(*sei));
546 sei->request.length = 0x0010; 548 sei->request.length = 0x0010;
547 sei->request.code = 0x000e; 549 sei->request.code = 0x000e;
548 sei->ntsm = ntsm; 550 if (!ntsm_unsupported)
551 sei->ntsm = ntsm;
549 552
550 if (chsc(sei)) 553 if (chsc(sei))
551 break; 554 break;
552 555
553 if (sei->response.code != 0x0001) { 556 if (sei->response.code != 0x0001) {
554 CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x)\n", 557 CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x, ntsm=%llx)\n",
555 sei->response.code); 558 sei->response.code, sei->ntsm);
559
560 if (sei->response.code == 3 && sei->ntsm) {
561 /* Fallback for old firmware. */
562 ntsm_unsupported = 1;
563 continue;
564 }
556 break; 565 break;
557 } 566 }
558 567
@@ -568,7 +577,10 @@ static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm)
568 CIO_CRW_EVENT(2, "chsc: unhandled nt: %d\n", sei->nt); 577 CIO_CRW_EVENT(2, "chsc: unhandled nt: %d\n", sei->nt);
569 break; 578 break;
570 } 579 }
571 } while (sei->u.nt0_area.flags & 0x80); 580
581 if (!(sei->u.nt0_area.flags & 0x80))
582 break;
583 }
572} 584}
573 585
574/* 586/*
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index 8cf4a0c69baf..9a6e4a2cd072 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -7463,6 +7463,10 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7463 if (hpsa_simple_mode) 7463 if (hpsa_simple_mode)
7464 return; 7464 return;
7465 7465
7466 trans_support = readl(&(h->cfgtable->TransportSupport));
7467 if (!(trans_support & PERFORMANT_MODE))
7468 return;
7469
7466 /* Check for I/O accelerator mode support */ 7470 /* Check for I/O accelerator mode support */
7467 if (trans_support & CFGTBL_Trans_io_accel1) { 7471 if (trans_support & CFGTBL_Trans_io_accel1) {
7468 transMethod |= CFGTBL_Trans_io_accel1 | 7472 transMethod |= CFGTBL_Trans_io_accel1 |
@@ -7479,10 +7483,6 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7479 } 7483 }
7480 7484
7481 /* TODO, check that this next line h->nreply_queues is correct */ 7485 /* TODO, check that this next line h->nreply_queues is correct */
7482 trans_support = readl(&(h->cfgtable->TransportSupport));
7483 if (!(trans_support & PERFORMANT_MODE))
7484 return;
7485
7486 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 7486 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7487 hpsa_get_max_perf_mode_cmds(h); 7487 hpsa_get_max_perf_mode_cmds(h);
7488 /* Performant mode ring buffer and supporting data structures */ 7488 /* Performant mode ring buffer and supporting data structures */
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
index 7f0af4fcc001..6fd7d40b2c4d 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -8293,7 +8293,6 @@ _scsih_suspend(struct pci_dev *pdev, pm_message_t state)
8293 8293
8294 mpt2sas_base_free_resources(ioc); 8294 mpt2sas_base_free_resources(ioc);
8295 pci_save_state(pdev); 8295 pci_save_state(pdev);
8296 pci_disable_device(pdev);
8297 pci_set_power_state(pdev, device_state); 8296 pci_set_power_state(pdev, device_state);
8298 return 0; 8297 return 0;
8299} 8298}
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c
index 771c16bfdbac..f17aa7aa7879 100644
--- a/drivers/scsi/scsi_error.c
+++ b/drivers/scsi/scsi_error.c
@@ -189,6 +189,7 @@ scsi_abort_command(struct scsi_cmnd *scmd)
189 /* 189 /*
190 * Retry after abort failed, escalate to next level. 190 * Retry after abort failed, escalate to next level.
191 */ 191 */
192 scmd->eh_eflags &= ~SCSI_EH_ABORT_SCHEDULED;
192 SCSI_LOG_ERROR_RECOVERY(3, 193 SCSI_LOG_ERROR_RECOVERY(3,
193 scmd_printk(KERN_INFO, scmd, 194 scmd_printk(KERN_INFO, scmd,
194 "scmd %p previous abort failed\n", scmd)); 195 "scmd %p previous abort failed\n", scmd));
@@ -920,10 +921,12 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses,
920 ses->prot_op = scmd->prot_op; 921 ses->prot_op = scmd->prot_op;
921 922
922 scmd->prot_op = SCSI_PROT_NORMAL; 923 scmd->prot_op = SCSI_PROT_NORMAL;
924 scmd->eh_eflags = 0;
923 scmd->cmnd = ses->eh_cmnd; 925 scmd->cmnd = ses->eh_cmnd;
924 memset(scmd->cmnd, 0, BLK_MAX_CDB); 926 memset(scmd->cmnd, 0, BLK_MAX_CDB);
925 memset(&scmd->sdb, 0, sizeof(scmd->sdb)); 927 memset(&scmd->sdb, 0, sizeof(scmd->sdb));
926 scmd->request->next_rq = NULL; 928 scmd->request->next_rq = NULL;
929 scmd->result = 0;
927 930
928 if (sense_bytes) { 931 if (sense_bytes) {
929 scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE, 932 scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE,
@@ -1157,6 +1160,15 @@ int scsi_eh_get_sense(struct list_head *work_q,
1157 __func__)); 1160 __func__));
1158 break; 1161 break;
1159 } 1162 }
1163 if (status_byte(scmd->result) != CHECK_CONDITION)
1164 /*
1165 * don't request sense if there's no check condition
1166 * status because the error we're processing isn't one
1167 * that has a sense code (and some devices get
1168 * confused by sense requests out of the blue)
1169 */
1170 continue;
1171
1160 SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd, 1172 SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd,
1161 "%s: requesting sense\n", 1173 "%s: requesting sense\n",
1162 current->comm)); 1174 current->comm));
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index 65a123d9c676..9db097a28a74 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -137,6 +137,7 @@ static void __scsi_queue_insert(struct scsi_cmnd *cmd, int reason, int unbusy)
137 * lock such that the kblockd_schedule_work() call happens 137 * lock such that the kblockd_schedule_work() call happens
138 * before blk_cleanup_queue() finishes. 138 * before blk_cleanup_queue() finishes.
139 */ 139 */
140 cmd->result = 0;
140 spin_lock_irqsave(q->queue_lock, flags); 141 spin_lock_irqsave(q->queue_lock, flags);
141 blk_requeue_request(q, cmd->request); 142 blk_requeue_request(q, cmd->request);
142 kblockd_schedule_work(q, &device->requeue_work); 143 kblockd_schedule_work(q, &device->requeue_work);
@@ -1044,6 +1045,7 @@ static int scsi_init_sgtable(struct request *req, struct scsi_data_buffer *sdb,
1044 */ 1045 */
1045int scsi_init_io(struct scsi_cmnd *cmd, gfp_t gfp_mask) 1046int scsi_init_io(struct scsi_cmnd *cmd, gfp_t gfp_mask)
1046{ 1047{
1048 struct scsi_device *sdev = cmd->device;
1047 struct request *rq = cmd->request; 1049 struct request *rq = cmd->request;
1048 1050
1049 int error = scsi_init_sgtable(rq, &cmd->sdb, gfp_mask); 1051 int error = scsi_init_sgtable(rq, &cmd->sdb, gfp_mask);
@@ -1091,7 +1093,7 @@ err_exit:
1091 scsi_release_buffers(cmd); 1093 scsi_release_buffers(cmd);
1092 cmd->request->special = NULL; 1094 cmd->request->special = NULL;
1093 scsi_put_command(cmd); 1095 scsi_put_command(cmd);
1094 put_device(&cmd->device->sdev_gendev); 1096 put_device(&sdev->sdev_gendev);
1095 return error; 1097 return error;
1096} 1098}
1097EXPORT_SYMBOL(scsi_init_io); 1099EXPORT_SYMBOL(scsi_init_io);
@@ -1273,7 +1275,7 @@ int scsi_prep_return(struct request_queue *q, struct request *req, int ret)
1273 struct scsi_cmnd *cmd = req->special; 1275 struct scsi_cmnd *cmd = req->special;
1274 scsi_release_buffers(cmd); 1276 scsi_release_buffers(cmd);
1275 scsi_put_command(cmd); 1277 scsi_put_command(cmd);
1276 put_device(&cmd->device->sdev_gendev); 1278 put_device(&sdev->sdev_gendev);
1277 req->special = NULL; 1279 req->special = NULL;
1278 } 1280 }
1279 break; 1281 break;
diff --git a/drivers/scsi/scsi_netlink.c b/drivers/scsi/scsi_netlink.c
index fe30ea94ffe6..109802f776ed 100644
--- a/drivers/scsi/scsi_netlink.c
+++ b/drivers/scsi/scsi_netlink.c
@@ -77,7 +77,7 @@ scsi_nl_rcv_msg(struct sk_buff *skb)
77 goto next_msg; 77 goto next_msg;
78 } 78 }
79 79
80 if (!capable(CAP_SYS_ADMIN)) { 80 if (!netlink_capable(skb, CAP_SYS_ADMIN)) {
81 err = -EPERM; 81 err = -EPERM;
82 goto next_msg; 82 goto next_msg;
83 } 83 }
diff --git a/drivers/scsi/virtio_scsi.c b/drivers/scsi/virtio_scsi.c
index 16bfd50cd3fe..db3b494e5926 100644
--- a/drivers/scsi/virtio_scsi.c
+++ b/drivers/scsi/virtio_scsi.c
@@ -750,8 +750,12 @@ static void __virtscsi_set_affinity(struct virtio_scsi *vscsi, bool affinity)
750 750
751 vscsi->affinity_hint_set = true; 751 vscsi->affinity_hint_set = true;
752 } else { 752 } else {
753 for (i = 0; i < vscsi->num_queues; i++) 753 for (i = 0; i < vscsi->num_queues; i++) {
754 if (!vscsi->req_vqs[i].vq)
755 continue;
756
754 virtqueue_set_affinity(vscsi->req_vqs[i].vq, -1); 757 virtqueue_set_affinity(vscsi->req_vqs[i].vq, -1);
758 }
755 759
756 vscsi->affinity_hint_set = false; 760 vscsi->affinity_hint_set = false;
757 } 761 }
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 8005f9869481..079e6b1b0cdb 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -1115,8 +1115,11 @@ static int atmel_spi_one_transfer(struct spi_master *master,
1115 atmel_spi_next_xfer_pio(master, xfer); 1115 atmel_spi_next_xfer_pio(master, xfer);
1116 } 1116 }
1117 1117
1118 /* interrupts are disabled, so free the lock for schedule */
1119 atmel_spi_unlock(as);
1118 ret = wait_for_completion_timeout(&as->xfer_completion, 1120 ret = wait_for_completion_timeout(&as->xfer_completion,
1119 SPI_DMA_TIMEOUT); 1121 SPI_DMA_TIMEOUT);
1122 atmel_spi_lock(as);
1120 if (WARN_ON(ret == 0)) { 1123 if (WARN_ON(ret == 0)) {
1121 dev_err(&spi->dev, 1124 dev_err(&spi->dev,
1122 "spi trasfer timeout, err %d\n", ret); 1125 "spi trasfer timeout, err %d\n", ret);
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c
index 55e57c3eb9bd..ebf720b88a2a 100644
--- a/drivers/spi/spi-bfin5xx.c
+++ b/drivers/spi/spi-bfin5xx.c
@@ -12,6 +12,7 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/gpio.h>
15#include <linux/slab.h> 16#include <linux/slab.h>
16#include <linux/io.h> 17#include <linux/io.h>
17#include <linux/ioport.h> 18#include <linux/ioport.h>
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
index 9009456bdf4d..c8e795ef2e13 100644
--- a/drivers/spi/spi-sh-hspi.c
+++ b/drivers/spi/spi-sh-hspi.c
@@ -244,9 +244,9 @@ static int hspi_probe(struct platform_device *pdev)
244 return -ENOMEM; 244 return -ENOMEM;
245 } 245 }
246 246
247 clk = clk_get(NULL, "shyway_clk"); 247 clk = clk_get(&pdev->dev, NULL);
248 if (IS_ERR(clk)) { 248 if (IS_ERR(clk)) {
249 dev_err(&pdev->dev, "shyway_clk is required\n"); 249 dev_err(&pdev->dev, "couldn't get clock\n");
250 ret = -EINVAL; 250 ret = -EINVAL;
251 goto error0; 251 goto error0;
252 } 252 }
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 1a77ad52812f..67d8909dcf39 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
287 sspi->left_rx_word) 287 sspi->left_rx_word)
288 sspi->rx_word(sspi); 288 sspi->rx_word(sspi);
289 289
290 if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY 290 if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
291 | SIRFSOC_SPI_TXFIFO_THD_REACH)) 291 SIRFSOC_SPI_TXFIFO_THD_REACH))
292 while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) 292 while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
293 & SIRFSOC_SPI_FIFO_FULL)) && 293 & SIRFSOC_SPI_FIFO_FULL)) &&
294 sspi->left_tx_word) 294 sspi->left_tx_word)
@@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
470 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); 470 writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
471 } else { 471 } else {
472 int gpio = sspi->chipselect[spi->chip_select]; 472 int gpio = sspi->chipselect[spi->chip_select];
473 gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); 473 switch (value) {
474 case BITBANG_CS_ACTIVE:
475 gpio_direction_output(gpio,
476 spi->mode & SPI_CS_HIGH ? 1 : 0);
477 break;
478 case BITBANG_CS_INACTIVE:
479 gpio_direction_output(gpio,
480 spi->mode & SPI_CS_HIGH ? 0 : 1);
481 break;
482 }
474 } 483 }
475} 484}
476 485
@@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
559 regval &= ~SIRFSOC_SPI_CMD_MODE; 568 regval &= ~SIRFSOC_SPI_CMD_MODE;
560 sspi->tx_by_cmd = false; 569 sspi->tx_by_cmd = false;
561 } 570 }
571 /*
572 * set spi controller in RISC chipselect mode, we are controlling CS by
573 * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
574 */
575 regval |= SIRFSOC_SPI_CS_IO_MODE;
562 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); 576 writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
563 577
564 if (IS_DMA_VALID(t)) { 578 if (IS_DMA_VALID(t)) {
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index ea5efb426f75..22365f140bec 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -40,8 +40,6 @@ source "drivers/staging/olpc_dcon/Kconfig"
40 40
41source "drivers/staging/panel/Kconfig" 41source "drivers/staging/panel/Kconfig"
42 42
43source "drivers/staging/rtl8187se/Kconfig"
44
45source "drivers/staging/rtl8192u/Kconfig" 43source "drivers/staging/rtl8192u/Kconfig"
46 44
47source "drivers/staging/rtl8192e/Kconfig" 45source "drivers/staging/rtl8192e/Kconfig"
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 86e020c2ad0d..fbe84ed2d048 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_PRISM2_USB) += wlan-ng/
12obj-$(CONFIG_COMEDI) += comedi/ 12obj-$(CONFIG_COMEDI) += comedi/
13obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/ 13obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
14obj-$(CONFIG_PANEL) += panel/ 14obj-$(CONFIG_PANEL) += panel/
15obj-$(CONFIG_R8187SE) += rtl8187se/
16obj-$(CONFIG_RTL8192U) += rtl8192u/ 15obj-$(CONFIG_RTL8192U) += rtl8192u/
17obj-$(CONFIG_RTL8192E) += rtl8192e/ 16obj-$(CONFIG_RTL8192E) += rtl8192e/
18obj-$(CONFIG_R8712U) += rtl8712/ 17obj-$(CONFIG_R8712U) += rtl8712/
diff --git a/drivers/staging/comedi/comedi_buf.c b/drivers/staging/comedi/comedi_buf.c
index 924fce977985..257595016161 100644
--- a/drivers/staging/comedi/comedi_buf.c
+++ b/drivers/staging/comedi/comedi_buf.c
@@ -61,6 +61,8 @@ static void __comedi_buf_free(struct comedi_device *dev,
61 struct comedi_subdevice *s) 61 struct comedi_subdevice *s)
62{ 62{
63 struct comedi_async *async = s->async; 63 struct comedi_async *async = s->async;
64 struct comedi_buf_map *bm;
65 unsigned long flags;
64 66
65 if (async->prealloc_buf) { 67 if (async->prealloc_buf) {
66 vunmap(async->prealloc_buf); 68 vunmap(async->prealloc_buf);
@@ -68,8 +70,11 @@ static void __comedi_buf_free(struct comedi_device *dev,
68 async->prealloc_bufsz = 0; 70 async->prealloc_bufsz = 0;
69 } 71 }
70 72
71 comedi_buf_map_put(async->buf_map); 73 spin_lock_irqsave(&s->spin_lock, flags);
74 bm = async->buf_map;
72 async->buf_map = NULL; 75 async->buf_map = NULL;
76 spin_unlock_irqrestore(&s->spin_lock, flags);
77 comedi_buf_map_put(bm);
73} 78}
74 79
75static void __comedi_buf_alloc(struct comedi_device *dev, 80static void __comedi_buf_alloc(struct comedi_device *dev,
@@ -80,6 +85,7 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
80 struct page **pages = NULL; 85 struct page **pages = NULL;
81 struct comedi_buf_map *bm; 86 struct comedi_buf_map *bm;
82 struct comedi_buf_page *buf; 87 struct comedi_buf_page *buf;
88 unsigned long flags;
83 unsigned i; 89 unsigned i;
84 90
85 if (!IS_ENABLED(CONFIG_HAS_DMA) && s->async_dma_dir != DMA_NONE) { 91 if (!IS_ENABLED(CONFIG_HAS_DMA) && s->async_dma_dir != DMA_NONE) {
@@ -92,8 +98,10 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
92 if (!bm) 98 if (!bm)
93 return; 99 return;
94 100
95 async->buf_map = bm;
96 kref_init(&bm->refcount); 101 kref_init(&bm->refcount);
102 spin_lock_irqsave(&s->spin_lock, flags);
103 async->buf_map = bm;
104 spin_unlock_irqrestore(&s->spin_lock, flags);
97 bm->dma_dir = s->async_dma_dir; 105 bm->dma_dir = s->async_dma_dir;
98 if (bm->dma_dir != DMA_NONE) 106 if (bm->dma_dir != DMA_NONE)
99 /* Need ref to hardware device to free buffer later. */ 107 /* Need ref to hardware device to free buffer later. */
@@ -127,7 +135,9 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
127 135
128 pages[i] = virt_to_page(buf->virt_addr); 136 pages[i] = virt_to_page(buf->virt_addr);
129 } 137 }
138 spin_lock_irqsave(&s->spin_lock, flags);
130 bm->n_pages = i; 139 bm->n_pages = i;
140 spin_unlock_irqrestore(&s->spin_lock, flags);
131 141
132 /* vmap the prealloc_buf if all the pages were allocated */ 142 /* vmap the prealloc_buf if all the pages were allocated */
133 if (i == n_pages) 143 if (i == n_pages)
@@ -150,6 +160,29 @@ int comedi_buf_map_put(struct comedi_buf_map *bm)
150 return 1; 160 return 1;
151} 161}
152 162
163/* returns s->async->buf_map and increments its kref refcount */
164struct comedi_buf_map *
165comedi_buf_map_from_subdev_get(struct comedi_subdevice *s)
166{
167 struct comedi_async *async = s->async;
168 struct comedi_buf_map *bm = NULL;
169 unsigned long flags;
170
171 if (!async)
172 return NULL;
173
174 spin_lock_irqsave(&s->spin_lock, flags);
175 bm = async->buf_map;
176 /* only want it if buffer pages allocated */
177 if (bm && bm->n_pages)
178 comedi_buf_map_get(bm);
179 else
180 bm = NULL;
181 spin_unlock_irqrestore(&s->spin_lock, flags);
182
183 return bm;
184}
185
153bool comedi_buf_is_mmapped(struct comedi_async *async) 186bool comedi_buf_is_mmapped(struct comedi_async *async)
154{ 187{
155 struct comedi_buf_map *bm = async->buf_map; 188 struct comedi_buf_map *bm = async->buf_map;
diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c
index ea6dc36d753b..acc80197e35e 100644
--- a/drivers/staging/comedi/comedi_fops.c
+++ b/drivers/staging/comedi/comedi_fops.c
@@ -1926,14 +1926,21 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
1926 struct comedi_device *dev = file->private_data; 1926 struct comedi_device *dev = file->private_data;
1927 struct comedi_subdevice *s; 1927 struct comedi_subdevice *s;
1928 struct comedi_async *async; 1928 struct comedi_async *async;
1929 struct comedi_buf_map *bm; 1929 struct comedi_buf_map *bm = NULL;
1930 unsigned long start = vma->vm_start; 1930 unsigned long start = vma->vm_start;
1931 unsigned long size; 1931 unsigned long size;
1932 int n_pages; 1932 int n_pages;
1933 int i; 1933 int i;
1934 int retval; 1934 int retval;
1935 1935
1936 mutex_lock(&dev->mutex); 1936 /*
1937 * 'trylock' avoids circular dependency with current->mm->mmap_sem
1938 * and down-reading &dev->attach_lock should normally succeed without
1939 * contention unless the device is in the process of being attached
1940 * or detached.
1941 */
1942 if (!down_read_trylock(&dev->attach_lock))
1943 return -EAGAIN;
1937 1944
1938 if (!dev->attached) { 1945 if (!dev->attached) {
1939 dev_dbg(dev->class_dev, "no driver attached\n"); 1946 dev_dbg(dev->class_dev, "no driver attached\n");
@@ -1973,7 +1980,9 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
1973 } 1980 }
1974 1981
1975 n_pages = size >> PAGE_SHIFT; 1982 n_pages = size >> PAGE_SHIFT;
1976 bm = async->buf_map; 1983
1984 /* get reference to current buf map (if any) */
1985 bm = comedi_buf_map_from_subdev_get(s);
1977 if (!bm || n_pages > bm->n_pages) { 1986 if (!bm || n_pages > bm->n_pages) {
1978 retval = -EINVAL; 1987 retval = -EINVAL;
1979 goto done; 1988 goto done;
@@ -1997,7 +2006,8 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
1997 2006
1998 retval = 0; 2007 retval = 0;
1999done: 2008done:
2000 mutex_unlock(&dev->mutex); 2009 up_read(&dev->attach_lock);
2010 comedi_buf_map_put(bm); /* put reference to buf map - okay if NULL */
2001 return retval; 2011 return retval;
2002} 2012}
2003 2013
diff --git a/drivers/staging/comedi/comedi_internal.h b/drivers/staging/comedi/comedi_internal.h
index 9a746570f161..a492f2d2436e 100644
--- a/drivers/staging/comedi/comedi_internal.h
+++ b/drivers/staging/comedi/comedi_internal.h
@@ -19,6 +19,8 @@ void comedi_buf_reset(struct comedi_async *async);
19bool comedi_buf_is_mmapped(struct comedi_async *async); 19bool comedi_buf_is_mmapped(struct comedi_async *async);
20void comedi_buf_map_get(struct comedi_buf_map *bm); 20void comedi_buf_map_get(struct comedi_buf_map *bm);
21int comedi_buf_map_put(struct comedi_buf_map *bm); 21int comedi_buf_map_put(struct comedi_buf_map *bm);
22struct comedi_buf_map *comedi_buf_map_from_subdev_get(
23 struct comedi_subdevice *s);
22unsigned int comedi_buf_write_n_allocated(struct comedi_async *async); 24unsigned int comedi_buf_write_n_allocated(struct comedi_async *async);
23void comedi_device_cancel_all(struct comedi_device *dev); 25void comedi_device_cancel_all(struct comedi_device *dev);
24 26
diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c
index 71db683098d6..b59af0303581 100644
--- a/drivers/staging/comedi/drivers/usbdux.c
+++ b/drivers/staging/comedi/drivers/usbdux.c
@@ -493,7 +493,7 @@ static void usbduxsub_ao_isoc_irq(struct urb *urb)
493 /* pointer to the DA */ 493 /* pointer to the DA */
494 *datap++ = val & 0xff; 494 *datap++ = val & 0xff;
495 *datap++ = (val >> 8) & 0xff; 495 *datap++ = (val >> 8) & 0xff;
496 *datap++ = chan; 496 *datap++ = chan << 6;
497 devpriv->ao_readback[chan] = val; 497 devpriv->ao_readback[chan] = val;
498 498
499 s->async->events |= COMEDI_CB_BLOCK; 499 s->async->events |= COMEDI_CB_BLOCK;
@@ -1040,11 +1040,8 @@ static int usbdux_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1040 /* set current channel of the running acquisition to zero */ 1040 /* set current channel of the running acquisition to zero */
1041 s->async->cur_chan = 0; 1041 s->async->cur_chan = 0;
1042 1042
1043 for (i = 0; i < cmd->chanlist_len; ++i) { 1043 for (i = 0; i < cmd->chanlist_len; ++i)
1044 unsigned int chan = CR_CHAN(cmd->chanlist[i]); 1044 devpriv->ao_chanlist[i] = CR_CHAN(cmd->chanlist[i]);
1045
1046 devpriv->ao_chanlist[i] = chan << 6;
1047 }
1048 1045
1049 /* we count in steps of 1ms (125us) */ 1046 /* we count in steps of 1ms (125us) */
1050 /* 125us mode not used yet */ 1047 /* 125us mode not used yet */
diff --git a/drivers/staging/goldfish/goldfish_audio.c b/drivers/staging/goldfish/goldfish_audio.c
index f96dcec740ae..7ac2602242f1 100644
--- a/drivers/staging/goldfish/goldfish_audio.c
+++ b/drivers/staging/goldfish/goldfish_audio.c
@@ -334,6 +334,7 @@ static int goldfish_audio_probe(struct platform_device *pdev)
334 return 0; 334 return 0;
335 335
336err_misc_register_failed: 336err_misc_register_failed:
337 free_irq(data->irq, data);
337err_request_irq_failed: 338err_request_irq_failed:
338 dma_free_coherent(&pdev->dev, COMBINED_BUFFER_SIZE, 339 dma_free_coherent(&pdev->dev, COMBINED_BUFFER_SIZE,
339 data->buffer_virt, data->buffer_phys); 340 data->buffer_virt, data->buffer_phys);
diff --git a/drivers/staging/gs_fpgaboot/Makefile b/drivers/staging/gs_fpgaboot/Makefile
index 34cb606e0e3d..d2f0211ba540 100644
--- a/drivers/staging/gs_fpgaboot/Makefile
+++ b/drivers/staging/gs_fpgaboot/Makefile
@@ -1,4 +1,2 @@
1gs_fpga-y += gs_fpgaboot.o io.o 1gs_fpga-y += gs_fpgaboot.o io.o
2obj-$(CONFIG_GS_FPGABOOT) += gs_fpga.o 2obj-$(CONFIG_GS_FPGABOOT) += gs_fpga.o
3
4ccflags-$(CONFIG_GS_FPGA_DEBUG) := -DDEBUG
diff --git a/drivers/staging/gs_fpgaboot/gs_fpgaboot.c b/drivers/staging/gs_fpgaboot/gs_fpgaboot.c
index 89bc84d833e6..7506900c9b8d 100644
--- a/drivers/staging/gs_fpgaboot/gs_fpgaboot.c
+++ b/drivers/staging/gs_fpgaboot/gs_fpgaboot.c
@@ -373,7 +373,6 @@ static int __init gs_fpgaboot_init(void)
373 r = -1; 373 r = -1;
374 374
375 pr_info("FPGA DOWNLOAD --->\n"); 375 pr_info("FPGA DOWNLOAD --->\n");
376 pr_info("built at %s UTC\n", __TIMESTAMP__);
377 376
378 pr_info("FPGA image file name: %s\n", file); 377 pr_info("FPGA image file name: %s\n", file);
379 378
diff --git a/drivers/staging/iio/adc/mxs-lradc.c b/drivers/staging/iio/adc/mxs-lradc.c
index 11fb95201545..dae8d1a9038e 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -1526,7 +1526,7 @@ static int mxs_lradc_probe(struct platform_device *pdev)
1526 struct resource *iores; 1526 struct resource *iores;
1527 int ret = 0, touch_ret; 1527 int ret = 0, touch_ret;
1528 int i, s; 1528 int i, s;
1529 unsigned int scale_uv; 1529 uint64_t scale_uv;
1530 1530
1531 /* Allocate the IIO device. */ 1531 /* Allocate the IIO device. */
1532 iio = devm_iio_device_alloc(dev, sizeof(*lradc)); 1532 iio = devm_iio_device_alloc(dev, sizeof(*lradc));
diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
index 36eedd8a0ea9..017d2f8379b7 100644
--- a/drivers/staging/iio/resolver/ad2s1200.c
+++ b/drivers/staging/iio/resolver/ad2s1200.c
@@ -70,6 +70,7 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
70 vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4); 70 vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
71 vel = (vel << 4) >> 4; 71 vel = (vel << 4) >> 4;
72 *val = vel; 72 *val = vel;
73 break;
73 default: 74 default:
74 mutex_unlock(&st->lock); 75 mutex_unlock(&st->lock);
75 return -EINVAL; 76 return -EINVAL;
@@ -106,7 +107,7 @@ static int ad2s1200_probe(struct spi_device *spi)
106 int pn, ret = 0; 107 int pn, ret = 0;
107 unsigned short *pins = spi->dev.platform_data; 108 unsigned short *pins = spi->dev.platform_data;
108 109
109 for (pn = 0; pn < AD2S1200_PN; pn++) 110 for (pn = 0; pn < AD2S1200_PN; pn++) {
110 ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT, 111 ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT,
111 DRV_NAME); 112 DRV_NAME);
112 if (ret) { 113 if (ret) {
@@ -114,6 +115,7 @@ static int ad2s1200_probe(struct spi_device *spi)
114 pins[pn]); 115 pins[pn]);
115 return ret; 116 return ret;
116 } 117 }
118 }
117 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 119 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
118 if (!indio_dev) 120 if (!indio_dev)
119 return -ENOMEM; 121 return -ENOMEM;
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig
deleted file mode 100644
index ff8d41ebca36..000000000000
--- a/drivers/staging/rtl8187se/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
1config R8187SE
2 tristate "RealTek RTL8187SE Wireless LAN NIC driver"
3 depends on PCI && WLAN
4 depends on m
5 select WIRELESS_EXT
6 select WEXT_PRIV
7 select EEPROM_93CX6
8 select CRYPTO
9 ---help---
10 If built as a module, it will be called r8187se.ko.
diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile
deleted file mode 100644
index 91d1aa2830c9..000000000000
--- a/drivers/staging/rtl8187se/Makefile
+++ /dev/null
@@ -1,38 +0,0 @@
1
2#ccflags-y += -DCONFIG_IEEE80211_NOWEP=y
3#ccflags-y += -std=gnu89
4#ccflags-y += -O2
5#CC = gcc
6
7ccflags-y := -DSW_ANTE
8ccflags-y += -DTX_TRACK
9ccflags-y += -DHIGH_POWER
10ccflags-y += -DSW_DIG
11ccflags-y += -DRATE_ADAPT
12
13#enable it for legacy power save, disable it for leisure power save
14ccflags-y += -DENABLE_LPS
15
16
17#ccflags-y := -mhard-float -DCONFIG_FORCE_HARD_FLOAT=y
18
19r8187se-y := \
20 r8180_core.o \
21 r8180_wx.o \
22 r8180_rtl8225z2.o \
23 r8185b_init.o \
24 r8180_dm.o \
25 ieee80211/dot11d.o \
26 ieee80211/ieee80211_softmac.o \
27 ieee80211/ieee80211_rx.o \
28 ieee80211/ieee80211_tx.o \
29 ieee80211/ieee80211_wx.o \
30 ieee80211/ieee80211_module.o \
31 ieee80211/ieee80211_softmac_wx.o \
32 ieee80211/ieee80211_crypt.o \
33 ieee80211/ieee80211_crypt_tkip.o \
34 ieee80211/ieee80211_crypt_ccmp.o \
35 ieee80211/ieee80211_crypt_wep.o
36
37obj-$(CONFIG_R8187SE) += r8187se.o
38
diff --git a/drivers/staging/rtl8187se/Module.symvers b/drivers/staging/rtl8187se/Module.symvers
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/drivers/staging/rtl8187se/Module.symvers
+++ /dev/null
diff --git a/drivers/staging/rtl8187se/TODO b/drivers/staging/rtl8187se/TODO
deleted file mode 100644
index 704949a9da0d..000000000000
--- a/drivers/staging/rtl8187se/TODO
+++ /dev/null
@@ -1,13 +0,0 @@
1TODO:
2- prepare private ieee80211 stack for merge with rtl8192su's version:
3 - add hwsec_active flag to struct ieee80211_device
4 - add bHwSec flag to cb_desc structure
5- switch to use shared "librtl" instead of private ieee80211 stack
6- switch to use LIB80211
7- switch to use MAC80211
8- use kernel coding style
9- checkpatch.pl fixes
10- sparse fixes
11- integrate with drivers/net/wireless/rtl818x
12
13Please send any patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/rtl8187se/ieee80211/dot11d.c b/drivers/staging/rtl8187se/ieee80211/dot11d.c
deleted file mode 100644
index 4483c2c0307c..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/dot11d.c
+++ /dev/null
@@ -1,189 +0,0 @@
1#include "dot11d.h"
2
3void Dot11d_Init(struct ieee80211_device *ieee)
4{
5 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
6
7 pDot11dInfo->bEnabled = 0;
8
9 pDot11dInfo->State = DOT11D_STATE_NONE;
10 pDot11dInfo->CountryIeLen = 0;
11 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
12 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
13 RESET_CIE_WATCHDOG(ieee);
14
15 netdev_info(ieee->dev, "Dot11d_Init()\n");
16}
17
18/* Reset to the state as we are just entering a regulatory domain. */
19void Dot11d_Reset(struct ieee80211_device *ieee)
20{
21 u32 i;
22 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
23
24 /* Clear old channel map */
25 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
26 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
27 /* Set new channel map */
28 for (i = 1; i <= 11; i++)
29 (pDot11dInfo->channel_map)[i] = 1;
30
31 for (i = 12; i <= 14; i++)
32 (pDot11dInfo->channel_map)[i] = 2;
33
34 pDot11dInfo->State = DOT11D_STATE_NONE;
35 pDot11dInfo->CountryIeLen = 0;
36 RESET_CIE_WATCHDOG(ieee);
37}
38
39/*
40 * Description:
41 * Update country IE from Beacon or Probe Response and configure PHY for
42 * operation in the regulatory domain.
43 *
44 * TODO:
45 * Configure Tx power.
46 *
47 * Assumption:
48 * 1. IS_DOT11D_ENABLE() is TRUE.
49 * 2. Input IE is an valid one.
50 */
51void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr,
52 u16 CoutryIeLen, u8 *pCoutryIe)
53{
54 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
55 u8 i, j, NumTriples, MaxChnlNum;
56 u8 index, MaxTxPowerInDbm;
57 PCHNL_TXPOWER_TRIPLE pTriple;
58
59 if ((CoutryIeLen - 3)%3 != 0) {
60 netdev_info(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
61 Dot11d_Reset(dev);
62 return;
63 }
64
65 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
66 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
67 MaxChnlNum = 0;
68 NumTriples = (CoutryIeLen - 3) / 3; /* skip 3-byte country string. */
69 pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
70 for (i = 0; i < NumTriples; i++) {
71 if (MaxChnlNum >= pTriple->FirstChnl) {
72 /*
73 * It is not in a monotonically increasing order,
74 * so stop processing.
75 */
76 netdev_info(dev->dev,
77 "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
78 Dot11d_Reset(dev);
79 return;
80 }
81 if (MAX_CHANNEL_NUMBER <
82 (pTriple->FirstChnl + pTriple->NumChnls)) {
83 /*
84 * It is not a valid set of channel id,
85 * so stop processing
86 */
87 netdev_info(dev->dev,
88 "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
89 Dot11d_Reset(dev);
90 return;
91 }
92
93 for (j = 0; j < pTriple->NumChnls; j++) {
94 index = pTriple->FirstChnl + j;
95 pDot11dInfo->channel_map[index] = 1;
96 MaxTxPowerInDbm = pTriple->MaxTxPowerInDbm;
97 pDot11dInfo->MaxTxPwrDbmList[index] = MaxTxPowerInDbm;
98 MaxChnlNum = pTriple->FirstChnl + j;
99 }
100
101 pTriple = (PCHNL_TXPOWER_TRIPLE)((u8 *)pTriple + 3);
102 }
103#if 1
104 netdev_info(dev->dev, "Channel List:");
105 for (i = 1; i <= MAX_CHANNEL_NUMBER; i++)
106 if (pDot11dInfo->channel_map[i] > 0)
107 netdev_info(dev->dev, " %d", i);
108 netdev_info(dev->dev, "\n");
109#endif
110
111 UPDATE_CIE_SRC(dev, pTaddr);
112
113 pDot11dInfo->CountryIeLen = CoutryIeLen;
114 memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe, CoutryIeLen);
115 pDot11dInfo->State = DOT11D_STATE_LEARNED;
116}
117
118u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 Channel)
119{
120 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
121 u8 MaxTxPwrInDbm = 255;
122
123 if (MAX_CHANNEL_NUMBER < Channel) {
124 netdev_info(dev->dev, "DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
125 return MaxTxPwrInDbm;
126 }
127 if (pDot11dInfo->channel_map[Channel])
128 MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
129
130 return MaxTxPwrInDbm;
131}
132
133
134void DOT11D_ScanComplete(struct ieee80211_device *dev)
135{
136 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
137
138 switch (pDot11dInfo->State) {
139 case DOT11D_STATE_LEARNED:
140 pDot11dInfo->State = DOT11D_STATE_DONE;
141 break;
142
143 case DOT11D_STATE_DONE:
144 if (GET_CIE_WATCHDOG(dev) == 0) {
145 /* Reset country IE if previous one is gone. */
146 Dot11d_Reset(dev);
147 }
148 break;
149 case DOT11D_STATE_NONE:
150 break;
151 }
152}
153
154int IsLegalChannel(struct ieee80211_device *dev, u8 channel)
155{
156 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
157
158 if (MAX_CHANNEL_NUMBER < channel) {
159 netdev_info(dev->dev, "IsLegalChannel(): Invalid Channel\n");
160 return 0;
161 }
162 if (pDot11dInfo->channel_map[channel] > 0)
163 return 1;
164 return 0;
165}
166
167int ToLegalChannel(struct ieee80211_device *dev, u8 channel)
168{
169 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
170 u8 default_chn = 0;
171 u32 i = 0;
172
173 for (i = 1; i <= MAX_CHANNEL_NUMBER; i++) {
174 if (pDot11dInfo->channel_map[i] > 0) {
175 default_chn = i;
176 break;
177 }
178 }
179
180 if (MAX_CHANNEL_NUMBER < channel) {
181 netdev_info(dev->dev, "IsLegalChannel(): Invalid Channel\n");
182 return default_chn;
183 }
184
185 if (pDot11dInfo->channel_map[channel] > 0)
186 return channel;
187
188 return default_chn;
189}
diff --git a/drivers/staging/rtl8187se/ieee80211/dot11d.h b/drivers/staging/rtl8187se/ieee80211/dot11d.h
deleted file mode 100644
index f996691307bf..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/dot11d.h
+++ /dev/null
@@ -1,71 +0,0 @@
1#ifndef __INC_DOT11D_H
2#define __INC_DOT11D_H
3
4#include "ieee80211.h"
5
6/* #define ENABLE_DOT11D */
7
8/* #define DOT11D_MAX_CHNL_NUM 83 */
9
10typedef struct _CHNL_TXPOWER_TRIPLE {
11 u8 FirstChnl;
12 u8 NumChnls;
13 u8 MaxTxPowerInDbm;
14} CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
15
16typedef enum _DOT11D_STATE {
17 DOT11D_STATE_NONE = 0,
18 DOT11D_STATE_LEARNED,
19 DOT11D_STATE_DONE,
20} DOT11D_STATE;
21
22typedef struct _RT_DOT11D_INFO {
23 /* DECLARE_RT_OBJECT(RT_DOT12D_INFO); */
24
25 bool bEnabled; /* dot11MultiDomainCapabilityEnabled */
26
27 u16 CountryIeLen; /* > 0 if CountryIeBuf[] contains valid country information element. */
28 u8 CountryIeBuf[MAX_IE_LEN];
29 u8 CountryIeSrcAddr[6]; /* Source AP of the country IE. */
30 u8 CountryIeWatchdog;
31
32 u8 channel_map[MAX_CHANNEL_NUMBER+1]; /* !!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) */
33 /* u8 ChnlListLen; // #Bytes valid in ChnlList[]. */
34 /* u8 ChnlList[DOT11D_MAX_CHNL_NUM]; */
35 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
36
37 DOT11D_STATE State;
38} RT_DOT11D_INFO, *PRT_DOT11D_INFO;
39
40#define eqMacAddr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1:0)
41#define cpMacAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
42#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
43
44#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
45#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
46
47#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
48#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
49
50#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
51 (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
52 FALSE : \
53 (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
54
55#define CIE_WATCHDOG_TH 1
56#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
57#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
58#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
59
60#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
61
62void Dot11d_Init(struct ieee80211_device *dev);
63void Dot11d_Reset(struct ieee80211_device *dev);
64void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr,
65 u16 CoutryIeLen, u8 *pCoutryIe);
66u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 Channel);
67void DOT11D_ScanComplete(struct ieee80211_device *dev);
68int IsLegalChannel(struct ieee80211_device *dev, u8 channel);
69int ToLegalChannel(struct ieee80211_device *dev, u8 channel);
70
71#endif /* #ifndef __INC_DOT11D_H */
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
deleted file mode 100644
index d1763b7b8f27..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211.h
+++ /dev/null
@@ -1,1496 +0,0 @@
1/*
2 * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
3 * remains copyright by the original authors
4 *
5 * Portions of the merged code are based on Host AP (software wireless
6 * LAN access point) driver for Intersil Prism2/2.5/3.
7 *
8 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
9 * <jkmaline@cc.hut.fi>
10 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
11 *
12 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
13 * <jketreno@linux.intel.com>
14 * Copyright (c) 2004, Intel Corporation
15 *
16 * Modified for Realtek's wi-fi cards by Andrea Merello
17 * <andrea.merello@gmail.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation. See README and COPYING for
22 * more details.
23 */
24#ifndef IEEE80211_H
25#define IEEE80211_H
26#include <linux/if_ether.h> /* ETH_ALEN */
27#include <linux/kernel.h> /* ARRAY_SIZE */
28#include <linux/jiffies.h>
29#include <linux/timer.h>
30#include <linux/sched.h>
31#include <linux/semaphore.h>
32#include <linux/wireless.h>
33#include <linux/ieee80211.h>
34#include <linux/interrupt.h>
35
36#define KEY_TYPE_NA 0x0
37#define KEY_TYPE_WEP40 0x1
38#define KEY_TYPE_TKIP 0x2
39#define KEY_TYPE_CCMP 0x4
40#define KEY_TYPE_WEP104 0x5
41
42#define aSifsTime 10
43
44#define MGMT_QUEUE_NUM 5
45
46
47#define IEEE_CMD_SET_WPA_PARAM 1
48#define IEEE_CMD_SET_WPA_IE 2
49#define IEEE_CMD_SET_ENCRYPTION 3
50#define IEEE_CMD_MLME 4
51
52#define IEEE_PARAM_WPA_ENABLED 1
53#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
54#define IEEE_PARAM_DROP_UNENCRYPTED 3
55#define IEEE_PARAM_PRIVACY_INVOKED 4
56#define IEEE_PARAM_AUTH_ALGS 5
57#define IEEE_PARAM_IEEE_802_1X 6
58//It should consistent with the driver_XXX.c
59// David, 2006.9.26
60#define IEEE_PARAM_WPAX_SELECT 7
61//Added for notify the encryption type selection
62// David, 2006.9.26
63#define IEEE_PROTO_WPA 1
64#define IEEE_PROTO_RSN 2
65//Added for notify the encryption type selection
66// David, 2006.9.26
67#define IEEE_WPAX_USEGROUP 0
68#define IEEE_WPAX_WEP40 1
69#define IEEE_WPAX_TKIP 2
70#define IEEE_WPAX_WRAP 3
71#define IEEE_WPAX_CCMP 4
72#define IEEE_WPAX_WEP104 5
73
74#define IEEE_KEY_MGMT_IEEE8021X 1
75#define IEEE_KEY_MGMT_PSK 2
76
77
78
79#define IEEE_MLME_STA_DEAUTH 1
80#define IEEE_MLME_STA_DISASSOC 2
81
82
83#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
84#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
85#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
86#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
87#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
88#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
89
90
91#define IEEE_CRYPT_ALG_NAME_LEN 16
92
93extern int ieee80211_crypto_tkip_init(void);
94extern void ieee80211_crypto_tkip_exit(void);
95
96//by amy for ps
97typedef struct ieee_param {
98 u32 cmd;
99 u8 sta_addr[ETH_ALEN];
100 union {
101 struct {
102 u8 name;
103 u32 value;
104 } wpa_param;
105 struct {
106 u32 len;
107 u8 reserved[32];
108 u8 data[0];
109 } wpa_ie;
110 struct{
111 int command;
112 int reason_code;
113 } mlme;
114 struct {
115 u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
116 u8 set_tx;
117 u32 err;
118 u8 idx;
119 u8 seq[8]; /* sequence counter (set: RX, get: TX) */
120 u16 key_len;
121 u8 key[0];
122 } crypt;
123
124 } u;
125}ieee_param;
126
127
128#define MSECS(t) msecs_to_jiffies(t)
129#define msleep_interruptible_rtl msleep_interruptible
130
131#define IEEE80211_DATA_LEN 2304
132/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
133 6.2.1.1.2.
134
135 The figure in section 7.1.2 suggests a body size of up to 2312
136 bytes is allowed, which is a bit confusing, I suspect this
137 represents the 2304 bytes of real data, plus a possible 8 bytes of
138 WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
139
140#define IEEE80211_3ADDR_LEN 24
141#define IEEE80211_4ADDR_LEN 30
142#define IEEE80211_FCS_LEN 4
143#define IEEE80211_HLEN IEEE80211_4ADDR_LEN
144#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
145#define IEEE80211_MGMT_HDR_LEN 24
146#define IEEE80211_DATA_HDR3_LEN 24
147#define IEEE80211_DATA_HDR4_LEN 30
148
149#define MIN_FRAG_THRESHOLD 256U
150#define MAX_FRAG_THRESHOLD 2346U
151
152/* Frame control field constants */
153#define IEEE80211_FCTL_DSTODS 0x0300 //added by david
154#define IEEE80211_FCTL_WEP 0x4000
155
156/* debug macros */
157
158#ifdef CONFIG_IEEE80211_DEBUG
159extern u32 ieee80211_debug_level;
160#define IEEE80211_DEBUG(level, fmt, args...) \
161do { if (ieee80211_debug_level & (level)) \
162 printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
163 in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0)
164#else
165#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
166#endif /* CONFIG_IEEE80211_DEBUG */
167
168/*
169 * To use the debug system;
170 *
171 * If you are defining a new debug classification, simply add it to the #define
172 * list here in the form of:
173 *
174 * #define IEEE80211_DL_xxxx VALUE
175 *
176 * shifting value to the left one bit from the previous entry. xxxx should be
177 * the name of the classification (for example, WEP)
178 *
179 * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
180 * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
181 * to send output to that classification.
182 *
183 * To add your debug level to the list of levels seen when you perform
184 *
185 * % cat /proc/net/ipw/debug_level
186 *
187 * you simply need to add your entry to the ipw_debug_levels array.
188 *
189 * If you do not see debug_level in /proc/net/ipw then you do not have
190 * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
191 *
192 */
193
194#define IEEE80211_DL_INFO (1<<0)
195#define IEEE80211_DL_WX (1<<1)
196#define IEEE80211_DL_SCAN (1<<2)
197#define IEEE80211_DL_STATE (1<<3)
198#define IEEE80211_DL_MGMT (1<<4)
199#define IEEE80211_DL_FRAG (1<<5)
200#define IEEE80211_DL_EAP (1<<6)
201#define IEEE80211_DL_DROP (1<<7)
202
203#define IEEE80211_DL_TX (1<<8)
204#define IEEE80211_DL_RX (1<<9)
205
206#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
207#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
208#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
209
210#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
211#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
212//#define IEEE_DEBUG_SCAN IEEE80211_WARNING
213#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
214#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
215#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
216#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
217#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
218#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
219#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
220#include <linux/netdevice.h>
221#include <linux/if_arp.h> /* ARPHRD_ETHER */
222
223#ifndef WIRELESS_SPY
224#define WIRELESS_SPY // enable iwspy support
225#endif
226#include <net/iw_handler.h> // new driver API
227
228#ifndef ETH_P_PAE
229#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
230#endif /* ETH_P_PAE */
231
232#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
233
234#ifndef ETH_P_80211_RAW
235#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
236#endif
237
238/* IEEE 802.11 defines */
239
240#define P80211_OUI_LEN 3
241
242struct ieee80211_snap_hdr {
243
244 u8 dsap; /* always 0xAA */
245 u8 ssap; /* always 0xAA */
246 u8 ctrl; /* always 0x03 */
247 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
248
249} __attribute__ ((packed));
250
251#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
252
253#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
254#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
255
256#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
257#define WLAN_GET_SEQ_SEQ(seq) ((seq) & IEEE80211_SCTL_SEQ)
258
259#define WLAN_CAPABILITY_BSS (1<<0)
260#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
261
262#define IEEE80211_STATMASK_SIGNAL (1<<0)
263#define IEEE80211_STATMASK_RSSI (1<<1)
264#define IEEE80211_STATMASK_NOISE (1<<2)
265#define IEEE80211_STATMASK_RATE (1<<3)
266#define IEEE80211_STATMASK_WEMASK 0x7
267
268
269#define IEEE80211_CCK_MODULATION (1<<0)
270#define IEEE80211_OFDM_MODULATION (1<<1)
271
272#define IEEE80211_24GHZ_BAND (1<<0)
273#define IEEE80211_52GHZ_BAND (1<<1)
274
275#define IEEE80211_CCK_RATE_LEN 4
276#define IEEE80211_CCK_RATE_1MB 0x02
277#define IEEE80211_CCK_RATE_2MB 0x04
278#define IEEE80211_CCK_RATE_5MB 0x0B
279#define IEEE80211_CCK_RATE_11MB 0x16
280#define IEEE80211_OFDM_RATE_LEN 8
281#define IEEE80211_OFDM_RATE_6MB 0x0C
282#define IEEE80211_OFDM_RATE_9MB 0x12
283#define IEEE80211_OFDM_RATE_12MB 0x18
284#define IEEE80211_OFDM_RATE_18MB 0x24
285#define IEEE80211_OFDM_RATE_24MB 0x30
286#define IEEE80211_OFDM_RATE_36MB 0x48
287#define IEEE80211_OFDM_RATE_48MB 0x60
288#define IEEE80211_OFDM_RATE_54MB 0x6C
289#define IEEE80211_BASIC_RATE_MASK 0x80
290
291#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
292#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
293#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
294#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
295#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
296#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
297#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
298#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
299#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
300#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
301#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
302#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
303
304#define IEEE80211_CCK_RATES_MASK 0x0000000F
305#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
306 IEEE80211_CCK_RATE_2MB_MASK)
307#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
308 IEEE80211_CCK_RATE_5MB_MASK | \
309 IEEE80211_CCK_RATE_11MB_MASK)
310
311#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
312#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
313 IEEE80211_OFDM_RATE_12MB_MASK | \
314 IEEE80211_OFDM_RATE_24MB_MASK)
315#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
316 IEEE80211_OFDM_RATE_9MB_MASK | \
317 IEEE80211_OFDM_RATE_18MB_MASK | \
318 IEEE80211_OFDM_RATE_36MB_MASK | \
319 IEEE80211_OFDM_RATE_48MB_MASK | \
320 IEEE80211_OFDM_RATE_54MB_MASK)
321#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
322 IEEE80211_CCK_DEFAULT_RATES_MASK)
323
324#define IEEE80211_NUM_OFDM_RATES 8
325#define IEEE80211_NUM_CCK_RATES 4
326#define IEEE80211_OFDM_SHIFT_MASK_A 4
327
328/* this is stolen and modified from the madwifi driver*/
329#define IEEE80211_FC0_TYPE_MASK 0x0c
330#define IEEE80211_FC0_TYPE_DATA 0x08
331#define IEEE80211_FC0_SUBTYPE_MASK 0xB0
332#define IEEE80211_FC0_SUBTYPE_QOS 0x80
333
334#define IEEE80211_QOS_HAS_SEQ(fc) \
335 (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
336 (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
337
338/* this is stolen from ipw2200 driver */
339#define IEEE_IBSS_MAC_HASH_SIZE 31
340struct ieee_ibss_seq {
341 u8 mac[ETH_ALEN];
342 u16 seq_num[17];
343 u16 frag_num[17];
344 unsigned long packet_time[17];
345 struct list_head list;
346};
347
348/* NOTE: This data is for statistical purposes; not all hardware provides this
349 * information for frames received. Not setting these will not cause
350 * any adverse affects. */
351struct ieee80211_rx_stats {
352 u32 mac_time[2];
353 u8 signalstrength;
354 s8 rssi;
355 u8 signal;
356 u8 noise;
357 u16 rate; /* in 100 kbps */
358 u8 received_channel;
359 u8 control;
360 u8 mask;
361 u8 freq;
362 u16 len;
363 u8 nic_type;
364};
365
366/* IEEE 802.11 requires that STA supports concurrent reception of at least
367 * three fragmented frames. This define can be increased to support more
368 * concurrent frames, but it should be noted that each entry can consume about
369 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
370#define IEEE80211_FRAG_CACHE_LEN 4
371
372struct ieee80211_frag_entry {
373 unsigned long first_frag_time;
374 unsigned int seq;
375 unsigned int last_frag;
376 struct sk_buff *skb;
377 u8 src_addr[ETH_ALEN];
378 u8 dst_addr[ETH_ALEN];
379};
380
381struct ieee80211_stats {
382 unsigned int tx_unicast_frames;
383 unsigned int tx_multicast_frames;
384 unsigned int tx_fragments;
385 unsigned int tx_unicast_octets;
386 unsigned int tx_multicast_octets;
387 unsigned int tx_deferred_transmissions;
388 unsigned int tx_single_retry_frames;
389 unsigned int tx_multiple_retry_frames;
390 unsigned int tx_retry_limit_exceeded;
391 unsigned int tx_discards;
392 unsigned int rx_unicast_frames;
393 unsigned int rx_multicast_frames;
394 unsigned int rx_fragments;
395 unsigned int rx_unicast_octets;
396 unsigned int rx_multicast_octets;
397 unsigned int rx_fcs_errors;
398 unsigned int rx_discards_no_buffer;
399 unsigned int tx_discards_wrong_sa;
400 unsigned int rx_discards_undecryptable;
401 unsigned int rx_message_in_msg_fragments;
402 unsigned int rx_message_in_bad_msg_fragments;
403};
404
405struct ieee80211_device;
406
407#include "ieee80211_crypt.h"
408
409#define SEC_KEY_1 (1<<0)
410#define SEC_KEY_2 (1<<1)
411#define SEC_KEY_3 (1<<2)
412#define SEC_KEY_4 (1<<3)
413#define SEC_ACTIVE_KEY (1<<4)
414#define SEC_AUTH_MODE (1<<5)
415#define SEC_UNICAST_GROUP (1<<6)
416#define SEC_LEVEL (1<<7)
417#define SEC_ENABLED (1<<8)
418
419#define SEC_LEVEL_0 0 /* None */
420#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
421#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
422#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
423#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
424
425#define WEP_KEYS 4
426#define WEP_KEY_LEN 13
427
428#define WEP_KEY_LEN_MODIF 32
429
430struct ieee80211_security {
431 u16 active_key:2,
432 enabled:1,
433 auth_mode:2,
434 auth_algo:4,
435 unicast_uses_group:1;
436 u8 key_sizes[WEP_KEYS];
437 u8 keys[WEP_KEYS][WEP_KEY_LEN_MODIF];
438 u8 level;
439 u16 flags;
440} __attribute__ ((packed));
441
442
443/*
444
445 802.11 data frame from AP
446
447 ,-------------------------------------------------------------------.
448Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
449 |------|------|---------|---------|---------|------|---------|------|
450Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
451 | | tion | (BSSID) | | | ence | data | |
452 `-------------------------------------------------------------------'
453
454Total: 28-2340 bytes
455
456*/
457
458/* Management Frame Information Element Types */
459enum {
460 MFIE_TYPE_SSID = 0,
461 MFIE_TYPE_RATES = 1,
462 MFIE_TYPE_FH_SET = 2,
463 MFIE_TYPE_DS_SET = 3,
464 MFIE_TYPE_CF_SET = 4,
465 MFIE_TYPE_TIM = 5,
466 MFIE_TYPE_IBSS_SET = 6,
467 MFIE_TYPE_COUNTRY = 7,
468 MFIE_TYPE_CHALLENGE = 16,
469 MFIE_TYPE_ERP = 42,
470 MFIE_TYPE_RSN = 48,
471 MFIE_TYPE_RATES_EX = 50,
472 MFIE_TYPE_GENERIC = 221,
473};
474
475struct ieee80211_header_data {
476 __le16 frame_ctl;
477 u16 duration_id;
478 u8 addr1[6];
479 u8 addr2[6];
480 u8 addr3[6];
481 u16 seq_ctrl;
482};
483
484struct ieee80211_hdr_4addr {
485 __le16 frame_ctl;
486 u16 duration_id;
487 u8 addr1[ETH_ALEN];
488 u8 addr2[ETH_ALEN];
489 u8 addr3[ETH_ALEN];
490 u16 seq_ctl;
491 u8 addr4[ETH_ALEN];
492} __attribute__ ((packed));
493
494struct ieee80211_hdr_3addrqos {
495 u16 frame_ctl;
496 u16 duration_id;
497 u8 addr1[ETH_ALEN];
498 u8 addr2[ETH_ALEN];
499 u8 addr3[ETH_ALEN];
500 u16 seq_ctl;
501 u16 qos_ctl;
502} __attribute__ ((packed));
503
504struct ieee80211_hdr_4addrqos {
505 u16 frame_ctl;
506 u16 duration_id;
507 u8 addr1[ETH_ALEN];
508 u8 addr2[ETH_ALEN];
509 u8 addr3[ETH_ALEN];
510 u16 seq_ctl;
511 u8 addr4[ETH_ALEN];
512 u16 qos_ctl;
513} __attribute__ ((packed));
514
515struct ieee80211_info_element_hdr {
516 u8 id;
517 u8 len;
518} __attribute__ ((packed));
519
520struct ieee80211_info_element {
521 u8 id;
522 u8 len;
523 u8 data[0];
524} __attribute__ ((packed));
525
526struct ieee80211_authentication {
527 struct ieee80211_header_data header;
528 u16 algorithm;
529 u16 transaction;
530 u16 status;
531 //struct ieee80211_info_element_hdr info_element;
532} __attribute__ ((packed));
533
534struct ieee80211_disassoc_frame {
535 struct ieee80211_hdr_3addr header;
536 u16 reasoncode;
537} __attribute__ ((packed));
538
539struct ieee80211_probe_request {
540 struct ieee80211_header_data header;
541 /* struct ieee80211_info_element info_element; */
542} __attribute__ ((packed));
543
544struct ieee80211_probe_response {
545 struct ieee80211_header_data header;
546 u32 time_stamp[2];
547 u16 beacon_interval;
548 u16 capability;
549 struct ieee80211_info_element info_element;
550} __attribute__ ((packed));
551
552struct ieee80211_assoc_request_frame {
553 struct ieee80211_hdr_3addr header;
554 u16 capability;
555 u16 listen_interval;
556 //u8 current_ap[ETH_ALEN];
557 struct ieee80211_info_element_hdr info_element;
558} __attribute__ ((packed));
559
560struct ieee80211_assoc_response_frame {
561 struct ieee80211_hdr_3addr header;
562 u16 capability;
563 u16 status;
564 u16 aid;
565 struct ieee80211_info_element info_element; /* supported rates */
566} __attribute__ ((packed));
567
568struct ieee80211_txb {
569 u8 nr_frags;
570 u8 encrypted;
571 u16 reserved;
572 u16 frag_size;
573 u16 payload_size;
574 struct sk_buff *fragments[0];
575};
576
577/* SWEEP TABLE ENTRIES NUMBER */
578#define MAX_SWEEP_TAB_ENTRIES 42
579#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
580
581/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
582 * only use 8, and then use extended rates for the remaining supported
583 * rates. Other APs, however, stick all of their supported rates on the
584 * main rates information element... */
585#define MAX_RATES_LENGTH ((u8)12)
586#define MAX_RATES_EX_LENGTH ((u8)16)
587
588#define MAX_NETWORK_COUNT 128
589
590#define MAX_CHANNEL_NUMBER 165
591
592#define IEEE80211_SOFTMAC_SCAN_TIME 100 /* (HZ / 2) */
593#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
594
595#define CRC_LENGTH 4U
596
597#define MAX_WPA_IE_LEN 64
598
599#define NETWORK_EMPTY_ESSID (1 << 0)
600#define NETWORK_HAS_OFDM (1 << 1)
601#define NETWORK_HAS_CCK (1 << 2)
602
603struct ieee80211_wmm_ac_param {
604 u8 ac_aci_acm_aifsn;
605 u8 ac_ecwmin_ecwmax;
606 u16 ac_txop_limit;
607};
608
609struct ieee80211_wmm_ts_info {
610 u8 ac_dir_tid;
611 u8 ac_up_psb;
612 u8 reserved;
613} __attribute__ ((packed));
614
615struct ieee80211_wmm_tspec_elem {
616 struct ieee80211_wmm_ts_info ts_info;
617 u16 norm_msdu_size;
618 u16 max_msdu_size;
619 u32 min_serv_inter;
620 u32 max_serv_inter;
621 u32 inact_inter;
622 u32 suspen_inter;
623 u32 serv_start_time;
624 u32 min_data_rate;
625 u32 mean_data_rate;
626 u32 peak_data_rate;
627 u32 max_burst_size;
628 u32 delay_bound;
629 u32 min_phy_rate;
630 u16 surp_band_allow;
631 u16 medium_time;
632}__attribute__((packed));
633
634enum eap_type {
635 EAP_PACKET = 0,
636 EAPOL_START,
637 EAPOL_LOGOFF,
638 EAPOL_KEY,
639 EAPOL_ENCAP_ASF_ALERT
640};
641
642static const char *eap_types[] = {
643 [EAP_PACKET] = "EAP-Packet",
644 [EAPOL_START] = "EAPOL-Start",
645 [EAPOL_LOGOFF] = "EAPOL-Logoff",
646 [EAPOL_KEY] = "EAPOL-Key",
647 [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
648};
649
650static inline const char *eap_get_type(int type)
651{
652 return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
653}
654
655struct eapol {
656 u8 snap[6];
657 u16 ethertype;
658 u8 version;
659 u8 type;
660 u16 length;
661} __attribute__ ((packed));
662
663struct ieee80211_softmac_stats {
664 unsigned int rx_ass_ok;
665 unsigned int rx_ass_err;
666 unsigned int rx_probe_rq;
667 unsigned int tx_probe_rs;
668 unsigned int tx_beacons;
669 unsigned int rx_auth_rq;
670 unsigned int rx_auth_rs_ok;
671 unsigned int rx_auth_rs_err;
672 unsigned int tx_auth_rq;
673 unsigned int no_auth_rs;
674 unsigned int no_ass_rs;
675 unsigned int tx_ass_rq;
676 unsigned int rx_ass_rq;
677 unsigned int tx_probe_rq;
678 unsigned int reassoc;
679 unsigned int swtxstop;
680 unsigned int swtxawake;
681};
682
683#define BEACON_PROBE_SSID_ID_POSITION 12
684
685/*
686 * These are the data types that can make up management packets
687 *
688 u16 auth_algorithm;
689 u16 auth_sequence;
690 u16 beacon_interval;
691 u16 capability;
692 u8 current_ap[ETH_ALEN];
693 u16 listen_interval;
694 struct {
695 u16 association_id:14, reserved:2;
696 } __attribute__ ((packed));
697 u32 time_stamp[2];
698 u16 reason;
699 u16 status;
700*/
701
702#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
703#define IEEE80211_DEFAULT_BASIC_RATE 10
704
705enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
706#define MAX_SP_Len (WMM_all_frame << 4)
707#define IEEE80211_QOS_TID 0x0f
708#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
709
710#define MAX_IE_LEN 0xFF //+YJ,080625
711
712struct rtl8187se_channel_list {
713 u8 channel[MAX_CHANNEL_NUMBER + 1];
714 u8 len;
715};
716
717//by amy for ps
718#define IEEE80211_WATCH_DOG_TIME 2000
719//by amy for ps
720//by amy for antenna
721#define ANTENNA_DIVERSITY_TIMER_PERIOD 1000 // 1000 m
722//by amy for antenna
723
724#define IEEE80211_DTIM_MBCAST 4
725#define IEEE80211_DTIM_UCAST 2
726#define IEEE80211_DTIM_VALID 1
727#define IEEE80211_DTIM_INVALID 0
728
729#define IEEE80211_PS_DISABLED 0
730#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
731#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
732#define IEEE80211_PS_ENABLE IEEE80211_DTIM_VALID
733//added by David for QoS 2006/6/30
734//#define WMM_Hang_8187
735#ifdef WMM_Hang_8187
736#undef WMM_Hang_8187
737#endif
738
739#define WME_AC_BE 0x00
740#define WME_AC_BK 0x01
741#define WME_AC_VI 0x02
742#define WME_AC_VO 0x03
743#define WME_ACI_MASK 0x03
744#define WME_AIFSN_MASK 0x03
745#define WME_AC_PRAM_LEN 16
746
747//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
748//#define UP2AC(up) ((up<3) ? ((up==0)?1:0) : (up>>1))
749#define UP2AC(up) ( \
750 ((up) < 1) ? WME_AC_BE : \
751 ((up) < 3) ? WME_AC_BK : \
752 ((up) < 4) ? WME_AC_BE : \
753 ((up) < 6) ? WME_AC_VI : \
754 WME_AC_VO)
755//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
756#define AC2UP(_ac) ( \
757 ((_ac) == WME_AC_VO) ? 6 : \
758 ((_ac) == WME_AC_VI) ? 5 : \
759 ((_ac) == WME_AC_BK) ? 1 : \
760 0)
761
762#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
763struct ether_header {
764 u8 ether_dhost[ETHER_ADDR_LEN];
765 u8 ether_shost[ETHER_ADDR_LEN];
766 u16 ether_type;
767} __attribute__((packed));
768
769#ifndef ETHERTYPE_PAE
770#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
771#endif
772#ifndef ETHERTYPE_IP
773#define ETHERTYPE_IP 0x0800 /* IP protocol */
774#endif
775
776struct ieee80211_network {
777 /* These entries are used to identify a unique network */
778 u8 bssid[ETH_ALEN];
779 u8 channel;
780 /* Ensure null-terminated for any debug msgs */
781 u8 ssid[IW_ESSID_MAX_SIZE + 1];
782 u8 ssid_len;
783
784 /* These are network statistics */
785 struct ieee80211_rx_stats stats;
786 u16 capability;
787 u8 rates[MAX_RATES_LENGTH];
788 u8 rates_len;
789 u8 rates_ex[MAX_RATES_EX_LENGTH];
790 u8 rates_ex_len;
791 unsigned long last_scanned;
792 u8 mode;
793 u8 flags;
794 u32 last_associate;
795 u32 time_stamp[2];
796 u16 beacon_interval;
797 u16 listen_interval;
798 u16 atim_window;
799 u8 wpa_ie[MAX_WPA_IE_LEN];
800 size_t wpa_ie_len;
801 u8 rsn_ie[MAX_WPA_IE_LEN];
802 size_t rsn_ie_len;
803 u8 dtim_period;
804 u8 dtim_data;
805 u32 last_dtim_sta_time[2];
806 struct list_head list;
807 //appeded for QoS
808 u8 wmm_info;
809 struct ieee80211_wmm_ac_param wmm_param[4];
810 u8 QoS_Enable;
811 u8 SignalStrength;
812//by amy 080312
813 u8 HighestOperaRate;
814//by amy 080312
815 u8 Turbo_Enable;//enable turbo mode, added by thomas
816 u16 CountryIeLen;
817 u8 CountryIeBuf[MAX_IE_LEN];
818};
819
820enum ieee80211_state {
821
822 /* the card is not linked at all */
823 IEEE80211_NOLINK = 0,
824
825 /* IEEE80211_ASSOCIATING* are for BSS client mode
826 * the driver shall not perform RX filtering unless
827 * the state is LINKED.
828 * The driver shall just check for the state LINKED and
829 * defaults to NOLINK for ALL the other states (including
830 * LINKED_SCANNING)
831 */
832
833 /* the association procedure will start (wq scheduling)*/
834 IEEE80211_ASSOCIATING,
835 IEEE80211_ASSOCIATING_RETRY,
836
837 /* the association procedure is sending AUTH request*/
838 IEEE80211_ASSOCIATING_AUTHENTICATING,
839
840 /* the association procedure has successfully authenticated
841 * and is sending association request
842 */
843 IEEE80211_ASSOCIATING_AUTHENTICATED,
844
845 /* the link is ok. the card associated to a BSS or linked
846 * to a ibss cell or acting as an AP and creating the bss
847 */
848 IEEE80211_LINKED,
849
850 /* same as LINKED, but the driver shall apply RX filter
851 * rules as we are in NO_LINK mode. As the card is still
852 * logically linked, but it is doing a syncro site survey
853 * then it will be back to LINKED state.
854 */
855 IEEE80211_LINKED_SCANNING,
856
857};
858
859#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
860#define DEFAULT_FTS 2346
861
862#define CFG_IEEE80211_RESERVE_FCS (1<<0)
863#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
864
865typedef struct tx_pending_t{
866 int frag;
867 struct ieee80211_txb *txb;
868}tx_pending_t;
869
870enum {
871 COUNTRY_CODE_FCC = 0,
872 COUNTRY_CODE_IC = 1,
873 COUNTRY_CODE_ETSI = 2,
874 COUNTRY_CODE_SPAIN = 3,
875 COUNTRY_CODE_FRANCE = 4,
876 COUNTRY_CODE_MKK = 5,
877 COUNTRY_CODE_MKK1 = 6,
878 COUNTRY_CODE_ISRAEL = 7,
879 COUNTRY_CODE_TELEC = 8,
880 COUNTRY_CODE_GLOBAL_DOMAIN = 9,
881 COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10
882};
883
884struct ieee80211_device {
885 struct net_device *dev;
886
887 /* Bookkeeping structures */
888 struct net_device_stats stats;
889 struct ieee80211_stats ieee_stats;
890 struct ieee80211_softmac_stats softmac_stats;
891
892 /* Probe / Beacon management */
893 struct list_head network_free_list;
894 struct list_head network_list;
895 struct ieee80211_network *networks;
896 int scans;
897 int scan_age;
898
899 int iw_mode; /* operating mode (IW_MODE_*) */
900
901 spinlock_t lock;
902 spinlock_t wpax_suitlist_lock;
903
904 int tx_headroom; /* Set to size of any additional room needed at front
905 * of allocated Tx SKBs */
906 u32 config;
907
908 /* WEP and other encryption related settings at the device level */
909 int open_wep; /* Set to 1 to allow unencrypted frames */
910
911 int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
912 * WEP key changes */
913
914 /* If the host performs {en,de}cryption, then set to 1 */
915 int host_encrypt;
916 int host_decrypt;
917 int ieee802_1x; /* is IEEE 802.1X used */
918
919 /* WPA data */
920 int wpa_enabled;
921 int drop_unencrypted;
922 int tkip_countermeasures;
923 int privacy_invoked;
924 size_t wpa_ie_len;
925 u8 *wpa_ie;
926
927 u8 ap_mac_addr[6];
928 u16 pairwise_key_type;
929 u16 broadcast_key_type;
930
931 struct list_head crypt_deinit_list;
932 struct ieee80211_crypt_data *crypt[WEP_KEYS];
933 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
934 struct timer_list crypt_deinit_timer;
935
936 int bcrx_sta_key; /* use individual keys to override default keys even
937 * with RX of broad/multicast frames */
938
939 /* Fragmentation structures */
940 /* each stream contains an entry */
941 struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
942 unsigned int frag_next_idx[17];
943 u16 fts; /* Fragmentation Threshold */
944
945 /* This stores infos for the current network.
946 * Either the network we are associated in INFRASTRUCTURE
947 * or the network that we are creating in MASTER mode.
948 * ad-hoc is a mixture ;-).
949 * Note that in infrastructure mode, even when not associated,
950 * fields bssid and essid may be valid (if wpa_set and essid_set
951 * are true) as thy carry the value set by the user via iwconfig
952 */
953 struct ieee80211_network current_network;
954
955
956 enum ieee80211_state state;
957
958 int short_slot;
959 int mode; /* A, B, G */
960 int modulation; /* CCK, OFDM */
961 int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
962 int abg_true; /* ABG flag */
963
964 /* used for forcing the ibss workqueue to terminate
965 * without wait for the syncro scan to terminate
966 */
967 short sync_scan_hurryup;
968
969 void * pDot11dInfo;
970 bool bGlobalDomain;
971
972 // For Liteon Ch12~13 passive scan
973 u8 MinPassiveChnlNum;
974 u8 IbssStartChnl;
975
976 int rate; /* current rate */
977 int basic_rate;
978 //FIXME: please callback, see if redundant with softmac_features
979 short active_scan;
980
981 /* this contains flags for selectively enable softmac support */
982 u16 softmac_features;
983
984 /* if the sequence control field is not filled by HW */
985 u16 seq_ctrl[5];
986
987 /* association procedure transaction sequence number */
988 u16 associate_seq;
989
990 /* AID for RTXed association responses */
991 u16 assoc_id;
992
993 /* power save mode related*/
994 short ps;
995 short sta_sleep;
996 int ps_timeout;
997 struct tasklet_struct ps_task;
998 u32 ps_th;
999 u32 ps_tl;
1000
1001 short raw_tx;
1002 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
1003 short queue_stop;
1004 short scanning;
1005 short proto_started;
1006
1007 struct semaphore wx_sem;
1008 struct semaphore scan_sem;
1009
1010 spinlock_t mgmt_tx_lock;
1011 spinlock_t beacon_lock;
1012
1013 short beacon_txing;
1014
1015 short wap_set;
1016 short ssid_set;
1017
1018 u8 wpax_type_set; //{added by David, 2006.9.28}
1019 u32 wpax_type_notify; //{added by David, 2006.9.26}
1020
1021 /* QoS related flag */
1022 char init_wmmparam_flag;
1023
1024 /* for discarding duplicated packets in IBSS */
1025 struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
1026
1027 /* for discarding duplicated packets in BSS */
1028 u16 last_rxseq_num[17]; /* rx seq previous per-tid */
1029 u16 last_rxfrag_num[17];/* tx frag previous per-tid */
1030 unsigned long last_packet_time[17];
1031
1032 /* for PS mode */
1033 unsigned long last_rx_ps_time;
1034
1035 /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
1036 struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
1037 int mgmt_queue_head;
1038 int mgmt_queue_tail;
1039
1040
1041 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
1042 struct tx_pending_t tx_pending;
1043
1044 /* used if IEEE_SOFTMAC_ASSOCIATE is set */
1045 struct timer_list associate_timer;
1046
1047 /* used if IEEE_SOFTMAC_BEACONS is set */
1048 struct timer_list beacon_timer;
1049
1050 struct work_struct associate_complete_wq;
1051// struct work_struct associate_retry_wq;
1052 struct work_struct associate_procedure_wq;
1053// struct work_struct softmac_scan_wq;
1054 struct work_struct wx_sync_scan_wq;
1055 struct work_struct wmm_param_update_wq;
1056 struct work_struct ps_request_tx_ack_wq;//for ps
1057// struct work_struct hw_wakeup_wq;
1058// struct work_struct hw_sleep_wq;
1059// struct work_struct watch_dog_wq;
1060 bool bInactivePs;
1061 bool actscanning;
1062 bool beinretry;
1063 u16 ListenInterval;
1064 unsigned long NumRxDataInPeriod; //YJ,add,080828
1065 unsigned long NumRxBcnInPeriod; //YJ,add,080828
1066 unsigned long NumRxOkTotal;
1067 unsigned long NumRxUnicast;//YJ,add,080828,for keep alive
1068 bool bHwRadioOff;
1069 struct delayed_work softmac_scan_wq;
1070 struct delayed_work associate_retry_wq;
1071 struct delayed_work hw_wakeup_wq;
1072 struct delayed_work hw_sleep_wq;//+by amy 080324
1073 struct delayed_work watch_dog_wq;
1074 struct delayed_work sw_antenna_wq;
1075 struct delayed_work start_ibss_wq;
1076//by amy for rate adaptive 080312
1077 struct delayed_work rate_adapter_wq;
1078//by amy for rate adaptive
1079 struct delayed_work hw_dig_wq;
1080 struct delayed_work tx_pw_wq;
1081
1082//Added for RF power on power off by lizhaoming 080512
1083 struct delayed_work GPIOChangeRFWorkItem;
1084
1085 struct workqueue_struct *wq;
1086
1087 /* Callback functions */
1088 void (*set_security)(struct net_device *dev,
1089 struct ieee80211_security *sec);
1090
1091 /* Used to TX data frame by using txb structs.
1092 * this is not used if in the softmac_features
1093 * is set the flag IEEE_SOFTMAC_TX_QUEUE
1094 */
1095 int (*hard_start_xmit)(struct ieee80211_txb *txb,
1096 struct net_device *dev);
1097
1098 int (*reset_port)(struct net_device *dev);
1099
1100 /* Softmac-generated frames (management) are TXed via this
1101 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
1102 * not set. As some cards may have different HW queues that
1103 * one might want to use for data and management frames
1104 * the option to have two callbacks might be useful.
1105 * This function can't sleep.
1106 */
1107 int (*softmac_hard_start_xmit)(struct sk_buff *skb,
1108 struct net_device *dev);
1109
1110 /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
1111 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
1112 * frames. If the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
1113 * then also management frames are sent via this callback.
1114 * This function can't sleep.
1115 */
1116 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
1117 struct net_device *dev,int rate);
1118
1119 /* stops the HW queue for DATA frames. Useful to avoid
1120 * waste time to TX data frame when we are reassociating
1121 * This function can sleep.
1122 */
1123 void (*data_hard_stop)(struct net_device *dev);
1124
1125 /* OK this is complementar to data_poll_hard_stop */
1126 void (*data_hard_resume)(struct net_device *dev);
1127
1128 /* ask to the driver to retune the radio .
1129 * This function can sleep. the driver should ensure
1130 * the radio has been switched before return.
1131 */
1132 void (*set_chan)(struct net_device *dev,short ch);
1133
1134 /* These are not used if the ieee stack takes care of
1135 * scanning (IEEE_SOFTMAC_SCAN feature set).
1136 * In this case only the set_chan is used.
1137 *
1138 * The syncro version is similar to the start_scan but
1139 * does not return until all channels has been scanned.
1140 * this is called in user context and should sleep,
1141 * it is called in a work_queue when switching to ad-hoc mode
1142 * or in behalf of iwlist scan when the card is associated
1143 * and root user ask for a scan.
1144 * the function stop_scan should stop both the syncro and
1145 * background scanning and can sleep.
1146 * The function start_scan should initiate the background
1147 * scanning and can't sleep.
1148 */
1149 void (*scan_syncro)(struct net_device *dev);
1150 void (*start_scan)(struct net_device *dev);
1151 void (*stop_scan)(struct net_device *dev);
1152
1153 /* indicate the driver that the link state is changed
1154 * for example it may indicate the card is associated now.
1155 * Driver might be interested in this to apply RX filter
1156 * rules or simply light the LINK led
1157 */
1158 void (*link_change)(struct net_device *dev);
1159
1160 /* these two function indicates to the HW when to start
1161 * and stop to send beacons. This is used when the
1162 * IEEE_SOFTMAC_BEACONS is not set. For now the
1163 * stop_send_bacons is NOT guaranteed to be called only
1164 * after start_send_beacons.
1165 */
1166 void (*start_send_beacons) (struct net_device *dev);
1167 void (*stop_send_beacons) (struct net_device *dev);
1168
1169 /* power save mode related */
1170 void (*sta_wake_up) (struct net_device *dev);
1171 void (*ps_request_tx_ack) (struct net_device *dev);
1172 void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
1173 short (*ps_is_queue_empty) (struct net_device *dev);
1174
1175 /* QoS related */
1176 //void (*wmm_param_update) (struct net_device *dev, u8 *ac_param);
1177 //void (*wmm_param_update) (struct ieee80211_device *ieee);
1178
1179 /* This must be the last item so that it points to the data
1180 * allocated beyond this structure by alloc_ieee80211 */
1181 u8 priv[0];
1182};
1183
1184#define IEEE_A (1<<0)
1185#define IEEE_B (1<<1)
1186#define IEEE_G (1<<2)
1187#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
1188
1189/* Generate a 802.11 header */
1190
1191/* Uses the channel change callback directly
1192 * instead of [start/stop] scan callbacks
1193 */
1194#define IEEE_SOFTMAC_SCAN (1<<2)
1195
1196/* Perform authentication and association handshake */
1197#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
1198
1199/* Generate probe requests */
1200#define IEEE_SOFTMAC_PROBERQ (1<<4)
1201
1202/* Generate response to probe requests */
1203#define IEEE_SOFTMAC_PROBERS (1<<5)
1204
1205/* The ieee802.11 stack will manages the netif queue
1206 * wake/stop for the driver, taking care of 802.11
1207 * fragmentation. See softmac.c for details. */
1208#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
1209
1210/* Uses only the softmac_data_hard_start_xmit
1211 * even for TX management frames.
1212 */
1213#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
1214
1215/* Generate beacons. The stack will enqueue beacons
1216 * to the card
1217 */
1218#define IEEE_SOFTMAC_BEACONS (1<<6)
1219
1220
1221
1222static inline void *ieee80211_priv(struct net_device *dev)
1223{
1224 return ((struct ieee80211_device *)netdev_priv(dev))->priv;
1225}
1226
1227static inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
1228{
1229 /* Single white space is for Linksys APs */
1230 if (essid_len == 1 && essid[0] == ' ')
1231 return 1;
1232
1233 /* Otherwise, if the entire essid is 0, we assume it is hidden */
1234 while (essid_len) {
1235 essid_len--;
1236 if (essid[essid_len] != '\0')
1237 return 0;
1238 }
1239
1240 return 1;
1241}
1242
1243static inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee,
1244 int mode)
1245{
1246 /*
1247 * It is possible for both access points and our device to support
1248 * combinations of modes, so as long as there is one valid combination
1249 * of ap/device supported modes, then return success
1250 *
1251 */
1252 if ((mode & IEEE_A) &&
1253 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
1254 (ieee->freq_band & IEEE80211_52GHZ_BAND))
1255 return 1;
1256
1257 if ((mode & IEEE_G) &&
1258 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
1259 (ieee->freq_band & IEEE80211_24GHZ_BAND))
1260 return 1;
1261
1262 if ((mode & IEEE_B) &&
1263 (ieee->modulation & IEEE80211_CCK_MODULATION) &&
1264 (ieee->freq_band & IEEE80211_24GHZ_BAND))
1265 return 1;
1266
1267 return 0;
1268}
1269
1270static inline int ieee80211_get_hdrlen(u16 fc)
1271{
1272 int hdrlen = 24;
1273
1274 switch (WLAN_FC_GET_TYPE(fc)) {
1275 case IEEE80211_FTYPE_DATA:
1276 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
1277 hdrlen = 30; /* Addr4 */
1278 if(IEEE80211_QOS_HAS_SEQ(fc))
1279 hdrlen += 2; /* QOS ctrl*/
1280 break;
1281 case IEEE80211_FTYPE_CTL:
1282 switch (WLAN_FC_GET_STYPE(fc)) {
1283 case IEEE80211_STYPE_CTS:
1284 case IEEE80211_STYPE_ACK:
1285 hdrlen = 10;
1286 break;
1287 default:
1288 hdrlen = 16;
1289 break;
1290 }
1291 break;
1292 }
1293
1294 return hdrlen;
1295}
1296
1297
1298
1299/* ieee80211.c */
1300extern void free_ieee80211(struct net_device *dev);
1301extern struct net_device *alloc_ieee80211(int sizeof_priv);
1302
1303extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
1304
1305/* ieee80211_tx.c */
1306
1307extern int ieee80211_encrypt_fragment(struct ieee80211_device *ieee,
1308 struct sk_buff *frag, int hdr_len);
1309
1310extern int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev);
1311extern void ieee80211_txb_free(struct ieee80211_txb *);
1312
1313
1314/* ieee80211_rx.c */
1315extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1316 struct ieee80211_rx_stats *rx_stats);
1317extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
1318 struct ieee80211_hdr_4addr *header,
1319 struct ieee80211_rx_stats *stats);
1320
1321/* ieee80211_wx.c */
1322extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
1323 struct iw_request_info *info,
1324 union iwreq_data *wrqu, char *key);
1325extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
1326 struct iw_request_info *info,
1327 union iwreq_data *wrqu, char *key);
1328extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
1329 struct iw_request_info *info,
1330 union iwreq_data *wrqu, char *key);
1331extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
1332 struct iw_request_info *info,
1333 union iwreq_data *wrqu, char *extra);
1334int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
1335 struct iw_request_info *info,
1336 struct iw_param *data, char *extra);
1337int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
1338 struct iw_request_info *info,
1339 union iwreq_data *wrqu, char *extra);
1340
1341int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
1342/* ieee80211_softmac.c */
1343extern short ieee80211_is_54g(const struct ieee80211_network *net);
1344extern short ieee80211_is_shortslot(const struct ieee80211_network *net);
1345extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee,
1346 struct sk_buff *skb,
1347 struct ieee80211_rx_stats *rx_stats,
1348 u16 type, u16 stype);
1349extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee,
1350 struct ieee80211_network *net);
1351
1352extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb,
1353 struct ieee80211_device *ieee);
1354extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
1355extern void ieee80211_start_bss(struct ieee80211_device *ieee);
1356extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
1357extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
1358extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
1359extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
1360extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
1361extern void ieee80211_disassociate(struct ieee80211_device *ieee);
1362extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
1363extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
1364extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
1365extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
1366extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
1367extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
1368extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
1369extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
1370extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
1371extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
1372extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
1373extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
1374extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
1375extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee,
1376 struct iw_point *p);
1377extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
1378extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
1379extern void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta,
1380 u8 asRsn);
1381extern void ieee80211_rtl_start_scan(struct ieee80211_device *ieee);
1382
1383//Add for RF power on power off by lizhaoming 080512
1384extern void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta,
1385 u8 asRsn);
1386
1387/* ieee80211_crypt_ccmp&tkip&wep.c */
1388extern void ieee80211_tkip_null(void);
1389extern void ieee80211_wep_null(void);
1390extern void ieee80211_ccmp_null(void);
1391/* ieee80211_softmac_wx.c */
1392
1393extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
1394 struct iw_request_info *info,
1395 union iwreq_data *wrqu, char *ext);
1396
1397extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
1398 struct iw_request_info *info,
1399 union iwreq_data *awrq,
1400 char *extra);
1401
1402extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee,
1403 struct iw_request_info *a,
1404 union iwreq_data *wrqu, char *b);
1405
1406extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
1407 struct iw_request_info *info,
1408 union iwreq_data *wrqu, char *extra);
1409
1410extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
1411 struct iw_request_info *info,
1412 union iwreq_data *wrqu, char *extra);
1413
1414extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee,
1415 struct iw_request_info *a,
1416 union iwreq_data *wrqu, char *b);
1417
1418extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee,
1419 struct iw_request_info *a,
1420 union iwreq_data *wrqu, char *b);
1421
1422extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
1423 struct iw_request_info *a,
1424 union iwreq_data *wrqu, char *extra);
1425
1426extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee,
1427 struct iw_request_info *a,
1428 union iwreq_data *wrqu, char *b);
1429
1430extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee,
1431 struct iw_request_info *a,
1432 union iwreq_data *wrqu, char *b);
1433
1434extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
1435 struct iw_request_info *a,
1436 union iwreq_data *wrqu, char *b);
1437
1438extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
1439
1440extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
1441 struct iw_request_info *info,
1442 union iwreq_data *wrqu, char *extra);
1443
1444extern int ieee80211_wx_get_name(struct ieee80211_device *ieee,
1445 struct iw_request_info *info,
1446 union iwreq_data *wrqu, char *extra);
1447
1448extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
1449 struct iw_request_info *info,
1450 union iwreq_data *wrqu, char *extra);
1451
1452extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
1453 struct iw_request_info *info,
1454 union iwreq_data *wrqu, char *extra);
1455
1456extern void ieee80211_softmac_ips_scan_syncro(struct ieee80211_device *ieee);
1457
1458extern void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee,
1459 short pwr);
1460
1461extern const long ieee80211_wlan_frequencies[];
1462
1463extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
1464{
1465 ieee->scans++;
1466}
1467
1468extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
1469{
1470 return ieee->scans;
1471}
1472
1473static inline const char *escape_essid(const char *essid, u8 essid_len) {
1474 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
1475 const char *s = essid;
1476 char *d = escaped;
1477
1478 if (ieee80211_is_empty_essid(essid, essid_len)) {
1479 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
1480 return escaped;
1481 }
1482
1483 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
1484 while (essid_len--) {
1485 if (*s == '\0') {
1486 *d++ = '\\';
1487 *d++ = '0';
1488 s++;
1489 } else {
1490 *d++ = *s++;
1491 }
1492 }
1493 *d = '\0';
1494 return escaped;
1495}
1496#endif /* IEEE80211_H */
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
deleted file mode 100644
index 101f0c0cdb0a..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
+++ /dev/null
@@ -1,240 +0,0 @@
1/*
2 * Host AP crypto routines
3 *
4 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
5 * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. See README and COPYING for
10 * more details.
11 *
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16//#include <linux/config.h>
17#include <linux/module.h>
18#include <linux/slab.h>
19#include <linux/string.h>
20#include <linux/errno.h>
21
22#include "ieee80211.h"
23
24MODULE_AUTHOR("Jouni Malinen");
25MODULE_DESCRIPTION("HostAP crypto");
26MODULE_LICENSE("GPL");
27
28struct ieee80211_crypto_alg {
29 struct list_head list;
30 struct ieee80211_crypto_ops *ops;
31};
32
33
34struct ieee80211_crypto {
35 struct list_head algs;
36 spinlock_t lock;
37};
38
39static struct ieee80211_crypto *hcrypt;
40
41void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, int force)
42{
43 struct list_head *ptr, *n;
44 struct ieee80211_crypt_data *entry;
45
46 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
47 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
48 entry = list_entry(ptr, struct ieee80211_crypt_data, list);
49
50 if (atomic_read(&entry->refcnt) != 0 && !force)
51 continue;
52
53 list_del(ptr);
54
55 if (entry->ops)
56 entry->ops->deinit(entry->priv);
57 kfree(entry);
58 }
59}
60
61void ieee80211_crypt_deinit_handler(unsigned long data)
62{
63 struct ieee80211_device *ieee = (struct ieee80211_device *)data;
64 unsigned long flags;
65
66 spin_lock_irqsave(&ieee->lock, flags);
67 ieee80211_crypt_deinit_entries(ieee, 0);
68 if (!list_empty(&ieee->crypt_deinit_list)) {
69 pr_debug("entries remaining in delayed crypt deletion list\n");
70 ieee->crypt_deinit_timer.expires = jiffies + HZ;
71 add_timer(&ieee->crypt_deinit_timer);
72 }
73 spin_unlock_irqrestore(&ieee->lock, flags);
74
75}
76
77void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
78 struct ieee80211_crypt_data **crypt)
79{
80 struct ieee80211_crypt_data *tmp;
81 unsigned long flags;
82
83 if (*crypt == NULL)
84 return;
85
86 tmp = *crypt;
87 *crypt = NULL;
88
89 /* must not run ops->deinit() while there may be pending encrypt or
90 * decrypt operations. Use a list of delayed deinits to avoid needing
91 * locking. */
92
93 spin_lock_irqsave(&ieee->lock, flags);
94 list_add(&tmp->list, &ieee->crypt_deinit_list);
95 if (!timer_pending(&ieee->crypt_deinit_timer)) {
96 ieee->crypt_deinit_timer.expires = jiffies + HZ;
97 add_timer(&ieee->crypt_deinit_timer);
98 }
99 spin_unlock_irqrestore(&ieee->lock, flags);
100}
101
102int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
103{
104 unsigned long flags;
105 struct ieee80211_crypto_alg *alg;
106
107 if (hcrypt == NULL)
108 return -1;
109
110 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
111 if (alg == NULL)
112 return -ENOMEM;
113
114 alg->ops = ops;
115
116 spin_lock_irqsave(&hcrypt->lock, flags);
117 list_add(&alg->list, &hcrypt->algs);
118 spin_unlock_irqrestore(&hcrypt->lock, flags);
119
120 pr_debug("registered algorithm '%s'\n", ops->name);
121
122 return 0;
123}
124
125int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
126{
127 unsigned long flags;
128 struct list_head *ptr;
129 struct ieee80211_crypto_alg *del_alg = NULL;
130
131 if (hcrypt == NULL)
132 return -1;
133
134 spin_lock_irqsave(&hcrypt->lock, flags);
135 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
136 struct ieee80211_crypto_alg *alg =
137 (struct ieee80211_crypto_alg *) ptr;
138 if (alg->ops == ops) {
139 list_del(&alg->list);
140 del_alg = alg;
141 break;
142 }
143 }
144 spin_unlock_irqrestore(&hcrypt->lock, flags);
145
146 if (del_alg) {
147 pr_debug("unregistered algorithm '%s'\n", ops->name);
148 kfree(del_alg);
149 }
150
151 return del_alg ? 0 : -1;
152}
153
154
155struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name)
156{
157 unsigned long flags;
158 struct list_head *ptr;
159 struct ieee80211_crypto_alg *found_alg = NULL;
160
161 if (hcrypt == NULL)
162 return NULL;
163
164 spin_lock_irqsave(&hcrypt->lock, flags);
165 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
166 struct ieee80211_crypto_alg *alg =
167 (struct ieee80211_crypto_alg *) ptr;
168 if (strcmp(alg->ops->name, name) == 0) {
169 found_alg = alg;
170 break;
171 }
172 }
173 spin_unlock_irqrestore(&hcrypt->lock, flags);
174
175 if (found_alg)
176 return found_alg->ops;
177 else
178 return NULL;
179}
180
181
182static void *ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
183static void ieee80211_crypt_null_deinit(void *priv) {}
184
185static struct ieee80211_crypto_ops ieee80211_crypt_null = {
186 .name = "NULL",
187 .init = ieee80211_crypt_null_init,
188 .deinit = ieee80211_crypt_null_deinit,
189 .encrypt_mpdu = NULL,
190 .decrypt_mpdu = NULL,
191 .encrypt_msdu = NULL,
192 .decrypt_msdu = NULL,
193 .set_key = NULL,
194 .get_key = NULL,
195 .extra_prefix_len = 0,
196 .extra_postfix_len = 0,
197 .owner = THIS_MODULE,
198};
199
200
201int ieee80211_crypto_init(void)
202{
203 int ret = -ENOMEM;
204
205 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
206 if (!hcrypt)
207 goto out;
208
209 INIT_LIST_HEAD(&hcrypt->algs);
210 spin_lock_init(&hcrypt->lock);
211
212 ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
213 if (ret < 0) {
214 kfree(hcrypt);
215 hcrypt = NULL;
216 }
217out:
218 return ret;
219}
220
221
222void ieee80211_crypto_deinit(void)
223{
224 struct list_head *ptr, *n;
225 struct ieee80211_crypto_alg *alg = NULL;
226
227 if (hcrypt == NULL)
228 return;
229
230 list_for_each_safe(ptr, n, &hcrypt->algs) {
231 alg = list_entry(ptr, struct ieee80211_crypto_alg, list);
232 if (alg) {
233 list_del(ptr);
234 pr_debug("unregistered algorithm '%s' (deinit)\n",
235 alg->ops->name);
236 kfree(alg);
237 }
238 }
239 kfree(hcrypt);
240}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
deleted file mode 100644
index 0b4ea431982d..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * Original code based on Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3.
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 *
9 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
10 * <jketreno@linux.intel.com>
11 *
12 * Copyright (c) 2004, Intel Corporation
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation. See README and COPYING for
17 * more details.
18 */
19
20/*
21 * This file defines the interface to the ieee80211 crypto module.
22 */
23#ifndef IEEE80211_CRYPT_H
24#define IEEE80211_CRYPT_H
25
26#include <linux/skbuff.h>
27
28struct ieee80211_crypto_ops {
29 const char *name;
30
31 /* init new crypto context (e.g., allocate private data space,
32 * select IV, etc.); returns NULL on failure or pointer to allocated
33 * private data on success */
34 void * (*init)(int keyidx);
35
36 /* deinitialize crypto context and free allocated private data */
37 void (*deinit)(void *priv);
38
39 /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
40 * value from decrypt_mpdu is passed as the keyidx value for
41 * decrypt_msdu. skb must have enough head and tail room for the
42 * encryption; if not, error will be returned; these functions are
43 * called for all MPDUs (i.e., fragments).
44 */
45 int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
46 int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
47
48 /* These functions are called for full MSDUs, i.e. full frames.
49 * These can be NULL if full MSDU operations are not needed. */
50 int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
51 int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
52 void *priv);
53
54 int (*set_key)(void *key, int len, u8 *seq, void *priv);
55 int (*get_key)(void *key, int len, u8 *seq, void *priv);
56
57 /* procfs handler for printing out key information and possible
58 * statistics */
59 char * (*print_stats)(char *p, void *priv);
60
61 /* maximum number of bytes added by encryption; encrypt buf is
62 * allocated with extra_prefix_len bytes, copy of in_buf, and
63 * extra_postfix_len; encrypt need not use all this space, but
64 * the result must start at the beginning of the buffer and correct
65 * length must be returned */
66 int extra_prefix_len, extra_postfix_len;
67
68 struct module *owner;
69};
70
71struct ieee80211_crypt_data {
72 struct list_head list; /* delayed deletion list */
73 struct ieee80211_crypto_ops *ops;
74 void *priv;
75 atomic_t refcnt;
76};
77
78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
80struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name);
81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
82void ieee80211_crypt_deinit_handler(unsigned long);
83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
84 struct ieee80211_crypt_data **crypt);
85
86#endif
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
deleted file mode 100644
index 4fe253818630..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
+++ /dev/null
@@ -1,455 +0,0 @@
1/*
2 * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/random.h>
17#include <linux/skbuff.h>
18#include <linux/netdevice.h>
19#include <linux/if_ether.h>
20#include <linux/if_arp.h>
21#include <linux/string.h>
22#include <linux/wireless.h>
23
24#include "ieee80211.h"
25
26#include <linux/crypto.h>
27#include <linux/scatterlist.h>
28
29MODULE_AUTHOR("Jouni Malinen");
30MODULE_DESCRIPTION("Host AP crypt: CCMP");
31MODULE_LICENSE("GPL");
32
33
34#define AES_BLOCK_LEN 16
35#define CCMP_HDR_LEN 8
36#define CCMP_MIC_LEN 8
37#define CCMP_TK_LEN 16
38#define CCMP_PN_LEN 6
39
40struct ieee80211_ccmp_data {
41 u8 key[CCMP_TK_LEN];
42 int key_set;
43
44 u8 tx_pn[CCMP_PN_LEN];
45 u8 rx_pn[CCMP_PN_LEN];
46
47 u32 dot11RSNAStatsCCMPFormatErrors;
48 u32 dot11RSNAStatsCCMPReplays;
49 u32 dot11RSNAStatsCCMPDecryptErrors;
50
51 int key_idx;
52
53 struct crypto_tfm *tfm;
54
55 /* scratch buffers for virt_to_page() (crypto API) */
56 u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
57 tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
58 u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
59};
60
61static void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
62 const u8 pt[16], u8 ct[16])
63{
64 crypto_cipher_encrypt_one((void *)tfm, ct, pt);
65}
66
67static void *ieee80211_ccmp_init(int key_idx)
68{
69 struct ieee80211_ccmp_data *priv;
70
71 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
72 if (priv == NULL)
73 goto fail;
74 priv->key_idx = key_idx;
75
76 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
77 if (IS_ERR(priv->tfm)) {
78 pr_debug("could not allocate crypto API aes\n");
79 priv->tfm = NULL;
80 goto fail;
81 }
82
83 return priv;
84
85fail:
86 if (priv) {
87 if (priv->tfm)
88 crypto_free_cipher((void *)priv->tfm);
89 kfree(priv);
90 }
91
92 return NULL;
93}
94
95
96static void ieee80211_ccmp_deinit(void *priv)
97{
98 struct ieee80211_ccmp_data *_priv = priv;
99
100 if (_priv && _priv->tfm)
101 crypto_free_cipher((void *)_priv->tfm);
102 kfree(priv);
103}
104
105
106static inline void xor_block(u8 *b, u8 *a, size_t len)
107{
108 int i;
109 for (i = 0; i < len; i++)
110 b[i] ^= a[i];
111}
112
113static void ccmp_init_blocks(struct crypto_tfm *tfm,
114 struct ieee80211_hdr_4addr *hdr,
115 u8 *pn, size_t dlen, u8 *b0, u8 *auth,
116 u8 *s0)
117{
118 u8 *pos, qc = 0;
119 size_t aad_len;
120 u16 fc;
121 int a4_included, qc_included;
122 u8 aad[2 * AES_BLOCK_LEN];
123
124 fc = le16_to_cpu(hdr->frame_ctl);
125 a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
126 (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
127 /*
128 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
129 (WLAN_FC_GET_STYPE(fc) & 0x08));
130 */
131 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
132 (WLAN_FC_GET_STYPE(fc) & 0x80));
133 aad_len = 22;
134 if (a4_included)
135 aad_len += 6;
136 if (qc_included) {
137 pos = (u8 *) &hdr->addr4;
138 if (a4_included)
139 pos += 6;
140 qc = *pos & 0x0f;
141 aad_len += 2;
142 }
143 /* CCM Initial Block:
144 * Flag (Include authentication header, M=3 (8-octet MIC),
145 * L=1 (2-octet Dlen))
146 * Nonce: 0x00 | A2 | PN
147 * Dlen */
148 b0[0] = 0x59;
149 b0[1] = qc;
150 memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
151 memcpy(b0 + 8, pn, CCMP_PN_LEN);
152 b0[14] = (dlen >> 8) & 0xff;
153 b0[15] = dlen & 0xff;
154
155 /* AAD:
156 * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
157 * A1 | A2 | A3
158 * SC with bits 4..15 (seq#) masked to zero
159 * A4 (if present)
160 * QC (if present)
161 */
162 pos = (u8 *) hdr;
163 aad[0] = 0; /* aad_len >> 8 */
164 aad[1] = aad_len & 0xff;
165 aad[2] = pos[0] & 0x8f;
166 aad[3] = pos[1] & 0xc7;
167 memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
168 pos = (u8 *) &hdr->seq_ctl;
169 aad[22] = pos[0] & 0x0f;
170 aad[23] = 0; /* all bits masked */
171 memset(aad + 24, 0, 8);
172 if (a4_included)
173 memcpy(aad + 24, hdr->addr4, ETH_ALEN);
174 if (qc_included) {
175 aad[a4_included ? 30 : 24] = qc;
176 /* rest of QC masked */
177 }
178
179 /* Start with the first block and AAD */
180 ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
181 xor_block(auth, aad, AES_BLOCK_LEN);
182 ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
183 xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
184 ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
185 b0[0] &= 0x07;
186 b0[14] = b0[15] = 0;
187 ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
188}
189
190static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
191{
192 struct ieee80211_ccmp_data *key = priv;
193 int data_len, i;
194 u8 *pos;
195 struct ieee80211_hdr_4addr *hdr;
196 int blocks, last, len;
197 u8 *mic;
198 u8 *b0 = key->tx_b0;
199 u8 *b = key->tx_b;
200 u8 *e = key->tx_e;
201 u8 *s0 = key->tx_s0;
202
203 if (skb_headroom(skb) < CCMP_HDR_LEN ||
204 skb_tailroom(skb) < CCMP_MIC_LEN ||
205 skb->len < hdr_len)
206 return -1;
207
208 data_len = skb->len - hdr_len;
209 pos = skb_push(skb, CCMP_HDR_LEN);
210 memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
211 pos += hdr_len;
212
213 i = CCMP_PN_LEN - 1;
214 while (i >= 0) {
215 key->tx_pn[i]++;
216 if (key->tx_pn[i] != 0)
217 break;
218 i--;
219 }
220
221 *pos++ = key->tx_pn[5];
222 *pos++ = key->tx_pn[4];
223 *pos++ = 0;
224 *pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
225 *pos++ = key->tx_pn[3];
226 *pos++ = key->tx_pn[2];
227 *pos++ = key->tx_pn[1];
228 *pos++ = key->tx_pn[0];
229
230 hdr = (struct ieee80211_hdr_4addr *)skb->data;
231 mic = skb_put(skb, CCMP_MIC_LEN);
232
233 ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
234
235 blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
236 last = data_len % AES_BLOCK_LEN;
237
238 for (i = 1; i <= blocks; i++) {
239 len = (i == blocks && last) ? last : AES_BLOCK_LEN;
240 /* Authentication */
241 xor_block(b, pos, len);
242 ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
243 /* Encryption, with counter */
244 b0[14] = (i >> 8) & 0xff;
245 b0[15] = i & 0xff;
246 ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
247 xor_block(pos, e, len);
248 pos += len;
249 }
250
251 for (i = 0; i < CCMP_MIC_LEN; i++)
252 mic[i] = b[i] ^ s0[i];
253
254 return 0;
255}
256
257
258static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
259{
260 struct ieee80211_ccmp_data *key = priv;
261 u8 keyidx, *pos;
262 struct ieee80211_hdr_4addr *hdr;
263 u8 pn[6];
264 size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
265 u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
266 u8 *b0 = key->rx_b0;
267 u8 *b = key->rx_b;
268 u8 *a = key->rx_a;
269 int i, blocks, last, len;
270
271 if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
272 key->dot11RSNAStatsCCMPFormatErrors++;
273 return -1;
274 }
275
276 hdr = (struct ieee80211_hdr_4addr *)skb->data;
277 pos = skb->data + hdr_len;
278 keyidx = pos[3];
279 if (!(keyidx & (1 << 5))) {
280 if (net_ratelimit()) {
281 pr_debug("received packet without ExtIV flag from %pM\n",
282 hdr->addr2);
283 }
284 key->dot11RSNAStatsCCMPFormatErrors++;
285 return -2;
286 }
287 keyidx >>= 6;
288 if (key->key_idx != keyidx) {
289 pr_debug("RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
290 key->key_idx, keyidx, priv);
291 return -6;
292 }
293 if (!key->key_set) {
294 if (net_ratelimit()) {
295 pr_debug("received packet from %pM with keyid=%d that does not have a configured key\n",
296 hdr->addr2, keyidx);
297 }
298 return -3;
299 }
300
301 pn[0] = pos[7];
302 pn[1] = pos[6];
303 pn[2] = pos[5];
304 pn[3] = pos[4];
305 pn[4] = pos[1];
306 pn[5] = pos[0];
307 pos += 8;
308
309 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
310 if (net_ratelimit()) {
311 pr_debug("replay detected: STA=%pM previous PN %pm received PN %pm\n",
312 hdr->addr2, key->rx_pn, pn);
313 }
314 key->dot11RSNAStatsCCMPReplays++;
315 return -4;
316 }
317
318 ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
319 xor_block(mic, b, CCMP_MIC_LEN);
320
321 blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
322 last = data_len % AES_BLOCK_LEN;
323
324 for (i = 1; i <= blocks; i++) {
325 len = (i == blocks && last) ? last : AES_BLOCK_LEN;
326 /* Decrypt, with counter */
327 b0[14] = (i >> 8) & 0xff;
328 b0[15] = i & 0xff;
329 ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
330 xor_block(pos, b, len);
331 /* Authentication */
332 xor_block(a, pos, len);
333 ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
334 pos += len;
335 }
336
337 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
338 if (net_ratelimit())
339 pr_debug("decrypt failed: STA=%pM\n", hdr->addr2);
340
341 key->dot11RSNAStatsCCMPDecryptErrors++;
342 return -5;
343 }
344
345 memcpy(key->rx_pn, pn, CCMP_PN_LEN);
346
347 /* Remove hdr and MIC */
348 memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
349 skb_pull(skb, CCMP_HDR_LEN);
350 skb_trim(skb, skb->len - CCMP_MIC_LEN);
351
352 return keyidx;
353}
354
355
356static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
357{
358 struct ieee80211_ccmp_data *data = priv;
359 int keyidx;
360 struct crypto_tfm *tfm = data->tfm;
361
362 keyidx = data->key_idx;
363 memset(data, 0, sizeof(*data));
364 data->key_idx = keyidx;
365 data->tfm = tfm;
366 if (len == CCMP_TK_LEN) {
367 memcpy(data->key, key, CCMP_TK_LEN);
368 data->key_set = 1;
369 if (seq) {
370 data->rx_pn[0] = seq[5];
371 data->rx_pn[1] = seq[4];
372 data->rx_pn[2] = seq[3];
373 data->rx_pn[3] = seq[2];
374 data->rx_pn[4] = seq[1];
375 data->rx_pn[5] = seq[0];
376 }
377 crypto_cipher_setkey((void *)data->tfm, data->key, CCMP_TK_LEN);
378 } else if (len == 0)
379 data->key_set = 0;
380 else
381 return -1;
382
383 return 0;
384}
385
386
387static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
388{
389 struct ieee80211_ccmp_data *data = priv;
390
391 if (len < CCMP_TK_LEN)
392 return -1;
393
394 if (!data->key_set)
395 return 0;
396 memcpy(key, data->key, CCMP_TK_LEN);
397
398 if (seq) {
399 seq[0] = data->tx_pn[5];
400 seq[1] = data->tx_pn[4];
401 seq[2] = data->tx_pn[3];
402 seq[3] = data->tx_pn[2];
403 seq[4] = data->tx_pn[1];
404 seq[5] = data->tx_pn[0];
405 }
406
407 return CCMP_TK_LEN;
408}
409
410
411static char *ieee80211_ccmp_print_stats(char *p, void *priv)
412{
413 struct ieee80211_ccmp_data *ccmp = priv;
414 p += sprintf(p,
415 "key[%d] alg=CCMP key_set=%d tx_pn=%pm rx_pn=%pm format_errors=%d replays=%d decrypt_errors=%d\n",
416 ccmp->key_idx, ccmp->key_set,
417 ccmp->tx_pn, ccmp->rx_pn,
418 ccmp->dot11RSNAStatsCCMPFormatErrors,
419 ccmp->dot11RSNAStatsCCMPReplays,
420 ccmp->dot11RSNAStatsCCMPDecryptErrors);
421
422 return p;
423}
424
425void ieee80211_ccmp_null(void)
426{
427 return;
428}
429static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
430 .name = "CCMP",
431 .init = ieee80211_ccmp_init,
432 .deinit = ieee80211_ccmp_deinit,
433 .encrypt_mpdu = ieee80211_ccmp_encrypt,
434 .decrypt_mpdu = ieee80211_ccmp_decrypt,
435 .encrypt_msdu = NULL,
436 .decrypt_msdu = NULL,
437 .set_key = ieee80211_ccmp_set_key,
438 .get_key = ieee80211_ccmp_get_key,
439 .print_stats = ieee80211_ccmp_print_stats,
440 .extra_prefix_len = CCMP_HDR_LEN,
441 .extra_postfix_len = CCMP_MIC_LEN,
442 .owner = THIS_MODULE,
443};
444
445
446int ieee80211_crypto_ccmp_init(void)
447{
448 return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
449}
450
451
452void ieee80211_crypto_ccmp_exit(void)
453{
454 ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
455}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
deleted file mode 100644
index 6c1acc5dfba7..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
+++ /dev/null
@@ -1,740 +0,0 @@
1/*
2 * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/random.h>
15#include <linux/skbuff.h>
16#include <linux/netdevice.h>
17#include <linux/if_ether.h>
18#include <linux/if_arp.h>
19#include <asm/string.h>
20
21#include "ieee80211.h"
22
23#include <linux/crypto.h>
24#include <linux/scatterlist.h>
25#include <linux/crc32.h>
26
27MODULE_AUTHOR("Jouni Malinen");
28MODULE_DESCRIPTION("Host AP crypt: TKIP");
29MODULE_LICENSE("GPL");
30
31
32struct ieee80211_tkip_data {
33#define TKIP_KEY_LEN 32
34 u8 key[TKIP_KEY_LEN];
35 int key_set;
36
37 u32 tx_iv32;
38 u16 tx_iv16;
39 u16 tx_ttak[5];
40 int tx_phase1_done;
41
42 u32 rx_iv32;
43 u16 rx_iv16;
44 u16 rx_ttak[5];
45 int rx_phase1_done;
46 u32 rx_iv32_new;
47 u16 rx_iv16_new;
48
49 u32 dot11RSNAStatsTKIPReplays;
50 u32 dot11RSNAStatsTKIPICVErrors;
51 u32 dot11RSNAStatsTKIPLocalMICFailures;
52
53 int key_idx;
54
55 struct crypto_blkcipher *rx_tfm_arc4;
56 struct crypto_hash *rx_tfm_michael;
57 struct crypto_blkcipher *tx_tfm_arc4;
58 struct crypto_hash *tx_tfm_michael;
59 struct crypto_tfm *tfm_arc4;
60 struct crypto_tfm *tfm_michael;
61
62 /* scratch buffers for virt_to_page() (crypto API) */
63 u8 rx_hdr[16], tx_hdr[16];
64};
65
66static void *ieee80211_tkip_init(int key_idx)
67{
68 struct ieee80211_tkip_data *priv;
69
70 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
71 if (priv == NULL)
72 goto fail;
73 priv->key_idx = key_idx;
74
75 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
76 CRYPTO_ALG_ASYNC);
77 if (IS_ERR(priv->tx_tfm_arc4)) {
78 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
79 "crypto API arc4\n");
80 priv->tx_tfm_arc4 = NULL;
81 goto fail;
82 }
83
84 priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
85 CRYPTO_ALG_ASYNC);
86 if (IS_ERR(priv->tx_tfm_michael)) {
87 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
88 "crypto API michael_mic\n");
89 priv->tx_tfm_michael = NULL;
90 goto fail;
91 }
92
93 priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
94 CRYPTO_ALG_ASYNC);
95 if (IS_ERR(priv->rx_tfm_arc4)) {
96 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
97 "crypto API arc4\n");
98 priv->rx_tfm_arc4 = NULL;
99 goto fail;
100 }
101
102 priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
103 CRYPTO_ALG_ASYNC);
104 if (IS_ERR(priv->rx_tfm_michael)) {
105 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
106 "crypto API michael_mic\n");
107 priv->rx_tfm_michael = NULL;
108 goto fail;
109 }
110
111 return priv;
112
113fail:
114 if (priv) {
115 if (priv->tx_tfm_michael)
116 crypto_free_hash(priv->tx_tfm_michael);
117 if (priv->tx_tfm_arc4)
118 crypto_free_blkcipher(priv->tx_tfm_arc4);
119 if (priv->rx_tfm_michael)
120 crypto_free_hash(priv->rx_tfm_michael);
121 if (priv->rx_tfm_arc4)
122 crypto_free_blkcipher(priv->rx_tfm_arc4);
123 kfree(priv);
124 }
125
126 return NULL;
127}
128
129
130static void ieee80211_tkip_deinit(void *priv)
131{
132 struct ieee80211_tkip_data *_priv = priv;
133
134 if (_priv) {
135 if (_priv->tx_tfm_michael)
136 crypto_free_hash(_priv->tx_tfm_michael);
137 if (_priv->tx_tfm_arc4)
138 crypto_free_blkcipher(_priv->tx_tfm_arc4);
139 if (_priv->rx_tfm_michael)
140 crypto_free_hash(_priv->rx_tfm_michael);
141 if (_priv->rx_tfm_arc4)
142 crypto_free_blkcipher(_priv->rx_tfm_arc4);
143 }
144 kfree(priv);
145}
146
147
148static inline u16 RotR1(u16 val)
149{
150 return (val >> 1) | (val << 15);
151}
152
153
154static inline u8 Lo8(u16 val)
155{
156 return val & 0xff;
157}
158
159
160static inline u8 Hi8(u16 val)
161{
162 return val >> 8;
163}
164
165
166static inline u16 Lo16(u32 val)
167{
168 return val & 0xffff;
169}
170
171
172static inline u16 Hi16(u32 val)
173{
174 return val >> 16;
175}
176
177
178static inline u16 Mk16(u8 hi, u8 lo)
179{
180 return lo | (((u16) hi) << 8);
181}
182
183
184static inline u16 Mk16_le(u16 *v)
185{
186 return le16_to_cpu(*v);
187}
188
189
190static const u16 Sbox[256] = {
191 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
192 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
193 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
194 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
195 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
196 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
197 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
198 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
199 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
200 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
201 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
202 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
203 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
204 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
205 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
206 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
207 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
208 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
209 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
210 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
211 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
212 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
213 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
214 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
215 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
216 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
217 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
218 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
219 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
220 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
221 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
222 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
223};
224
225
226static inline u16 _S_(u16 v)
227{
228 u16 t = Sbox[Hi8(v)];
229 return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
230}
231
232#define PHASE1_LOOP_COUNT 8
233
234static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
235{
236 int i, j;
237
238 /* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
239 TTAK[0] = Lo16(IV32);
240 TTAK[1] = Hi16(IV32);
241 TTAK[2] = Mk16(TA[1], TA[0]);
242 TTAK[3] = Mk16(TA[3], TA[2]);
243 TTAK[4] = Mk16(TA[5], TA[4]);
244
245 for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
246 j = 2 * (i & 1);
247 TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
248 TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
249 TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
250 TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
251 TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
252 }
253}
254
255
256static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
257 u16 IV16)
258{
259 /* Make temporary area overlap WEP seed so that the final copy can be
260 * avoided on little endian hosts. */
261 u16 *PPK = (u16 *) &WEPSeed[4];
262
263 /* Step 1 - make copy of TTAK and bring in TSC */
264 PPK[0] = TTAK[0];
265 PPK[1] = TTAK[1];
266 PPK[2] = TTAK[2];
267 PPK[3] = TTAK[3];
268 PPK[4] = TTAK[4];
269 PPK[5] = TTAK[4] + IV16;
270
271 /* Step 2 - 96-bit bijective mixing using S-box */
272 PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
273 PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
274 PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
275 PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
276 PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
277 PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
278
279 PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
280 PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
281 PPK[2] += RotR1(PPK[1]);
282 PPK[3] += RotR1(PPK[2]);
283 PPK[4] += RotR1(PPK[3]);
284 PPK[5] += RotR1(PPK[4]);
285
286 /* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
287 * WEPSeed[0..2] is transmitted as WEP IV */
288 WEPSeed[0] = Hi8(IV16);
289 WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
290 WEPSeed[2] = Lo8(IV16);
291 WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
292
293#ifdef __BIG_ENDIAN
294 {
295 int i;
296 for (i = 0; i < 6; i++)
297 PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
298 }
299#endif
300}
301
302static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
303{
304 struct ieee80211_tkip_data *tkey = priv;
305 struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
306 int len;
307 u8 *pos;
308 struct ieee80211_hdr_4addr *hdr;
309 u8 rc4key[16], *icv;
310 u32 crc;
311 struct scatterlist sg;
312 int ret;
313
314 ret = 0;
315 if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
316 skb->len < hdr_len)
317 return -1;
318
319 hdr = (struct ieee80211_hdr_4addr *)skb->data;
320
321 if (!tkey->tx_phase1_done) {
322 tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
323 tkey->tx_iv32);
324 tkey->tx_phase1_done = 1;
325 }
326 tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
327
328 len = skb->len - hdr_len;
329 pos = skb_push(skb, 8);
330 memmove(pos, pos + 8, hdr_len);
331 pos += hdr_len;
332
333 *pos++ = rc4key[0];
334 *pos++ = rc4key[1];
335 *pos++ = rc4key[2];
336 *pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
337 *pos++ = tkey->tx_iv32 & 0xff;
338 *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
339 *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
340 *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
341
342 icv = skb_put(skb, 4);
343 crc = ~crc32_le(~0, pos, len);
344 icv[0] = crc;
345 icv[1] = crc >> 8;
346 icv[2] = crc >> 16;
347 icv[3] = crc >> 24;
348 crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
349 sg_init_one(&sg, pos, len + 4);
350 ret = crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
351
352 tkey->tx_iv16++;
353 if (tkey->tx_iv16 == 0) {
354 tkey->tx_phase1_done = 0;
355 tkey->tx_iv32++;
356 }
357 return ret;
358}
359
360static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
361{
362 struct ieee80211_tkip_data *tkey = priv;
363 struct blkcipher_desc desc = { .tfm = tkey->rx_tfm_arc4 };
364 u8 keyidx, *pos;
365 u32 iv32;
366 u16 iv16;
367 struct ieee80211_hdr_4addr *hdr;
368 u8 icv[4];
369 u32 crc;
370 struct scatterlist sg;
371 u8 rc4key[16];
372 int plen;
373
374 if (skb->len < hdr_len + 8 + 4)
375 return -1;
376
377 hdr = (struct ieee80211_hdr_4addr *)skb->data;
378 pos = skb->data + hdr_len;
379 keyidx = pos[3];
380 if (!(keyidx & (1 << 5))) {
381 if (net_ratelimit()) {
382 printk(KERN_DEBUG "TKIP: received packet without ExtIV"
383 " flag from %pM\n", hdr->addr2);
384 }
385 return -2;
386 }
387 keyidx >>= 6;
388 if (tkey->key_idx != keyidx) {
389 printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
390 "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
391 return -6;
392 }
393 if (!tkey->key_set) {
394 if (net_ratelimit()) {
395 printk(KERN_DEBUG "TKIP: received packet from %pM"
396 " with keyid=%d that does not have a configured"
397 " key\n", hdr->addr2, keyidx);
398 }
399 return -3;
400 }
401 iv16 = (pos[0] << 8) | pos[2];
402 iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
403 pos += 8;
404
405 if (iv32 < tkey->rx_iv32 ||
406 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
407 if (net_ratelimit()) {
408 printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
409 " previous TSC %08x%04x received TSC "
410 "%08x%04x\n", hdr->addr2,
411 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
412 }
413 tkey->dot11RSNAStatsTKIPReplays++;
414 return -4;
415 }
416
417 if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
418 tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
419 tkey->rx_phase1_done = 1;
420 }
421 tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
422
423 plen = skb->len - hdr_len - 12;
424 crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
425 sg_init_one(&sg, pos, plen + 4);
426 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
427 if (net_ratelimit()) {
428 printk(KERN_DEBUG ": TKIP: failed to decrypt "
429 "received packet from %pM\n",
430 hdr->addr2);
431 }
432 return -7;
433 }
434
435 crc = ~crc32_le(~0, pos, plen);
436 icv[0] = crc;
437 icv[1] = crc >> 8;
438 icv[2] = crc >> 16;
439 icv[3] = crc >> 24;
440 if (memcmp(icv, pos + plen, 4) != 0) {
441 if (iv32 != tkey->rx_iv32) {
442 /* Previously cached Phase1 result was already lost, so
443 * it needs to be recalculated for the next packet. */
444 tkey->rx_phase1_done = 0;
445 }
446 if (net_ratelimit()) {
447 printk(KERN_DEBUG "TKIP: ICV error detected: STA="
448 "%pM\n", hdr->addr2);
449 }
450 tkey->dot11RSNAStatsTKIPICVErrors++;
451 return -5;
452 }
453
454 /* Update real counters only after Michael MIC verification has
455 * completed */
456 tkey->rx_iv32_new = iv32;
457 tkey->rx_iv16_new = iv16;
458
459 /* Remove IV and ICV */
460 memmove(skb->data + 8, skb->data, hdr_len);
461 skb_pull(skb, 8);
462 skb_trim(skb, skb->len - 4);
463
464 return keyidx;
465}
466
467static int michael_mic(struct crypto_hash *tfm_michael, u8 *key, u8 *hdr,
468 u8 *data, size_t data_len, u8 *mic)
469{
470 struct hash_desc desc;
471 struct scatterlist sg[2];
472
473 if (tfm_michael == NULL) {
474 printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
475 return -1;
476 }
477
478 sg_init_table(sg, 2);
479 sg_set_buf(&sg[0], hdr, 16);
480 sg_set_buf(&sg[1], data, data_len);
481
482 if (crypto_hash_setkey(tfm_michael, key, 8))
483 return -1;
484
485 desc.tfm = tfm_michael;
486 desc.flags = 0;
487 return crypto_hash_digest(&desc, sg, data_len + 16, mic);
488}
489
490static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
491{
492 struct ieee80211_hdr_4addr *hdr11;
493
494 hdr11 = (struct ieee80211_hdr_4addr *)skb->data;
495 switch (le16_to_cpu(hdr11->frame_ctl) &
496 (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
497 case IEEE80211_FCTL_TODS:
498 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
499 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
500 break;
501 case IEEE80211_FCTL_FROMDS:
502 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
503 memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
504 break;
505 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
506 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
507 memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
508 break;
509 case 0:
510 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
511 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
512 break;
513 }
514
515 hdr[12] = 0; /* priority */
516
517 hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
518}
519
520
521static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len,
522 void *priv)
523{
524 struct ieee80211_tkip_data *tkey = priv;
525 u8 *pos;
526 struct ieee80211_hdr_4addr *hdr;
527
528 hdr = (struct ieee80211_hdr_4addr *)skb->data;
529
530 if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
531 printk(KERN_DEBUG "Invalid packet for Michael MIC add "
532 "(tailroom=%d hdr_len=%d skb->len=%d)\n",
533 skb_tailroom(skb), hdr_len, skb->len);
534 return -1;
535 }
536
537 michael_mic_hdr(skb, tkey->tx_hdr);
538
539 if (IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl)))
540 tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
541
542 pos = skb_put(skb, 8);
543
544 if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
545 skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
546 return -1;
547
548 return 0;
549}
550
551static void ieee80211_michael_mic_failure(struct net_device *dev,
552 struct ieee80211_hdr_4addr *hdr,
553 int keyidx)
554{
555 union iwreq_data wrqu;
556 struct iw_michaelmicfailure ev;
557
558 /* TODO: needed parameters: count, keyid, key type, TSC */
559 memset(&ev, 0, sizeof(ev));
560 ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
561 if (hdr->addr1[0] & 0x01)
562 ev.flags |= IW_MICFAILURE_GROUP;
563 else
564 ev.flags |= IW_MICFAILURE_PAIRWISE;
565 ev.src_addr.sa_family = ARPHRD_ETHER;
566 memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
567 memset(&wrqu, 0, sizeof(wrqu));
568 wrqu.data.length = sizeof(ev);
569 wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
570}
571
572static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
573 int hdr_len, void *priv)
574{
575 struct ieee80211_tkip_data *tkey = priv;
576 u8 mic[8];
577 struct ieee80211_hdr_4addr *hdr;
578
579 hdr = (struct ieee80211_hdr_4addr *)skb->data;
580
581 if (!tkey->key_set)
582 return -1;
583
584 michael_mic_hdr(skb, tkey->rx_hdr);
585 if (IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl)))
586 tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
587
588 if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
589 skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
590 return -1;
591
592 if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
593 struct ieee80211_hdr_4addr *hdr;
594 hdr = (struct ieee80211_hdr_4addr *)skb->data;
595 printk(KERN_DEBUG "%s: Michael MIC verification failed for "
596 "MSDU from %pM keyidx=%d\n",
597 skb->dev ? skb->dev->name : "N/A", hdr->addr2,
598 keyidx);
599 if (skb->dev)
600 ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
601 tkey->dot11RSNAStatsTKIPLocalMICFailures++;
602 return -1;
603 }
604
605 /* Update TSC counters for RX now that the packet verification has
606 * completed. */
607 tkey->rx_iv32 = tkey->rx_iv32_new;
608 tkey->rx_iv16 = tkey->rx_iv16_new;
609
610 skb_trim(skb, skb->len - 8);
611
612 return 0;
613}
614
615
616static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
617{
618 struct ieee80211_tkip_data *tkey = priv;
619 int keyidx;
620 struct crypto_hash *tfm = tkey->tx_tfm_michael;
621 struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
622 struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
623 struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
624
625 keyidx = tkey->key_idx;
626 memset(tkey, 0, sizeof(*tkey));
627 tkey->key_idx = keyidx;
628
629 tkey->tx_tfm_michael = tfm;
630 tkey->tx_tfm_arc4 = tfm2;
631 tkey->rx_tfm_michael = tfm3;
632 tkey->rx_tfm_arc4 = tfm4;
633
634 if (len == TKIP_KEY_LEN) {
635 memcpy(tkey->key, key, TKIP_KEY_LEN);
636 tkey->key_set = 1;
637 tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
638 if (seq) {
639 tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
640 (seq[3] << 8) | seq[2];
641 tkey->rx_iv16 = (seq[1] << 8) | seq[0];
642 }
643 } else if (len == 0)
644 tkey->key_set = 0;
645 else
646 return -1;
647
648 return 0;
649}
650
651
652static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
653{
654 struct ieee80211_tkip_data *tkey = priv;
655
656 if (len < TKIP_KEY_LEN)
657 return -1;
658
659 if (!tkey->key_set)
660 return 0;
661 memcpy(key, tkey->key, TKIP_KEY_LEN);
662
663 if (seq) {
664 /* Return the sequence number of the last transmitted frame. */
665 u16 iv16 = tkey->tx_iv16;
666 u32 iv32 = tkey->tx_iv32;
667 if (iv16 == 0)
668 iv32--;
669 iv16--;
670 seq[0] = tkey->tx_iv16;
671 seq[1] = tkey->tx_iv16 >> 8;
672 seq[2] = tkey->tx_iv32;
673 seq[3] = tkey->tx_iv32 >> 8;
674 seq[4] = tkey->tx_iv32 >> 16;
675 seq[5] = tkey->tx_iv32 >> 24;
676 }
677
678 return TKIP_KEY_LEN;
679}
680
681
682static char *ieee80211_tkip_print_stats(char *p, void *priv)
683{
684 struct ieee80211_tkip_data *tkip = priv;
685 p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
686 "tx_pn=%02x%02x%02x%02x%02x%02x "
687 "rx_pn=%02x%02x%02x%02x%02x%02x "
688 "replays=%d icv_errors=%d local_mic_failures=%d\n",
689 tkip->key_idx, tkip->key_set,
690 (tkip->tx_iv32 >> 24) & 0xff,
691 (tkip->tx_iv32 >> 16) & 0xff,
692 (tkip->tx_iv32 >> 8) & 0xff,
693 tkip->tx_iv32 & 0xff,
694 (tkip->tx_iv16 >> 8) & 0xff,
695 tkip->tx_iv16 & 0xff,
696 (tkip->rx_iv32 >> 24) & 0xff,
697 (tkip->rx_iv32 >> 16) & 0xff,
698 (tkip->rx_iv32 >> 8) & 0xff,
699 tkip->rx_iv32 & 0xff,
700 (tkip->rx_iv16 >> 8) & 0xff,
701 tkip->rx_iv16 & 0xff,
702 tkip->dot11RSNAStatsTKIPReplays,
703 tkip->dot11RSNAStatsTKIPICVErrors,
704 tkip->dot11RSNAStatsTKIPLocalMICFailures);
705 return p;
706}
707
708
709static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
710 .name = "TKIP",
711 .init = ieee80211_tkip_init,
712 .deinit = ieee80211_tkip_deinit,
713 .encrypt_mpdu = ieee80211_tkip_encrypt,
714 .decrypt_mpdu = ieee80211_tkip_decrypt,
715 .encrypt_msdu = ieee80211_michael_mic_add,
716 .decrypt_msdu = ieee80211_michael_mic_verify,
717 .set_key = ieee80211_tkip_set_key,
718 .get_key = ieee80211_tkip_get_key,
719 .print_stats = ieee80211_tkip_print_stats,
720 .extra_prefix_len = 4 + 4, /* IV + ExtIV */
721 .extra_postfix_len = 8 + 4, /* MIC + ICV */
722 .owner = THIS_MODULE,
723};
724
725
726int ieee80211_crypto_tkip_init(void)
727{
728 return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
729}
730
731
732void ieee80211_crypto_tkip_exit(void)
733{
734 ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
735}
736
737
738void ieee80211_tkip_null(void)
739{
740}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
deleted file mode 100644
index f25367224941..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
+++ /dev/null
@@ -1,277 +0,0 @@
1/*
2 * Host AP crypt: host-based WEP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/random.h>
17#include <linux/skbuff.h>
18#include <linux/string.h>
19
20#include "ieee80211.h"
21
22#include <linux/crypto.h>
23#include <linux/scatterlist.h>
24#include <linux/crc32.h>
25
26MODULE_AUTHOR("Jouni Malinen");
27MODULE_DESCRIPTION("Host AP crypt: WEP");
28MODULE_LICENSE("GPL");
29
30struct prism2_wep_data {
31 u32 iv;
32#define WEP_KEY_LEN 13
33 u8 key[WEP_KEY_LEN + 1];
34 u8 key_len;
35 u8 key_idx;
36 struct crypto_blkcipher *tx_tfm;
37 struct crypto_blkcipher *rx_tfm;
38};
39
40static void *prism2_wep_init(int keyidx)
41{
42 struct prism2_wep_data *priv;
43
44 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
45 if (priv == NULL)
46 goto fail;
47 priv->key_idx = keyidx;
48 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
49 if (IS_ERR(priv->tx_tfm)) {
50 pr_debug("could not allocate crypto API arc4\n");
51 priv->tx_tfm = NULL;
52 goto fail;
53 }
54 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
55 if (IS_ERR(priv->rx_tfm)) {
56 pr_debug("could not allocate crypto API arc4\n");
57 priv->rx_tfm = NULL;
58 goto fail;
59 }
60
61 /* start WEP IV from a random value */
62 get_random_bytes(&priv->iv, 4);
63
64 return priv;
65
66fail:
67 if (priv) {
68 if (priv->tx_tfm)
69 crypto_free_blkcipher(priv->tx_tfm);
70 if (priv->rx_tfm)
71 crypto_free_blkcipher(priv->rx_tfm);
72 kfree(priv);
73 }
74
75 return NULL;
76}
77
78static void prism2_wep_deinit(void *priv)
79{
80 struct prism2_wep_data *_priv = priv;
81
82 if (_priv) {
83 if (_priv->tx_tfm)
84 crypto_free_blkcipher(_priv->tx_tfm);
85 if (_priv->rx_tfm)
86 crypto_free_blkcipher(_priv->rx_tfm);
87 }
88
89 kfree(priv);
90}
91
92/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
93 * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
94 * so the payload length increases with 8 bytes.
95 *
96 * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
97 */
98static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
99{
100 struct prism2_wep_data *wep = priv;
101 struct blkcipher_desc desc = { .tfm = wep->tx_tfm };
102 u32 klen, len;
103 u8 key[WEP_KEY_LEN + 3];
104 u8 *pos;
105 u32 crc;
106 u8 *icv;
107 struct scatterlist sg;
108
109 if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
110 skb->len < hdr_len)
111 return -1;
112
113 len = skb->len - hdr_len;
114 pos = skb_push(skb, 4);
115 memmove(pos, pos + 4, hdr_len);
116 pos += hdr_len;
117
118 klen = 3 + wep->key_len;
119
120 wep->iv++;
121
122 /* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
123 * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
124 * can be used to speedup attacks, so avoid using them. */
125 if ((wep->iv & 0xff00) == 0xff00) {
126 u8 B = (wep->iv >> 16) & 0xff;
127 if (B >= 3 && B < klen)
128 wep->iv += 0x0100;
129 }
130
131 /* Prepend 24-bit IV to RC4 key and TX frame */
132 *pos++ = key[0] = (wep->iv >> 16) & 0xff;
133 *pos++ = key[1] = (wep->iv >> 8) & 0xff;
134 *pos++ = key[2] = wep->iv & 0xff;
135 *pos++ = wep->key_idx << 6;
136
137 /* Copy rest of the WEP key (the secret part) */
138 memcpy(key + 3, wep->key, wep->key_len);
139
140 /* Append little-endian CRC32 and encrypt it to produce ICV */
141 crc = ~crc32_le(~0, pos, len);
142 icv = skb_put(skb, 4);
143 icv[0] = crc;
144 icv[1] = crc >> 8;
145 icv[2] = crc >> 16;
146 icv[3] = crc >> 24;
147
148 crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
149 sg_init_one(&sg, pos, len + 4);
150
151 return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
152}
153
154/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
155 * the frame: IV (4 bytes), encrypted payload (including SNAP header),
156 * ICV (4 bytes). len includes both IV and ICV.
157 *
158 * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
159 * failure. If frame is OK, IV and ICV will be removed.
160 */
161static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
162{
163 struct prism2_wep_data *wep = priv;
164 struct blkcipher_desc desc = { .tfm = wep->rx_tfm };
165 u32 klen, plen;
166 u8 key[WEP_KEY_LEN + 3];
167 u8 keyidx, *pos;
168 u32 crc;
169 u8 icv[4];
170 struct scatterlist sg;
171
172 if (skb->len < hdr_len + 8)
173 return -1;
174
175 pos = skb->data + hdr_len;
176 key[0] = *pos++;
177 key[1] = *pos++;
178 key[2] = *pos++;
179 keyidx = *pos++ >> 6;
180 if (keyidx != wep->key_idx)
181 return -1;
182
183 klen = 3 + wep->key_len;
184
185 /* Copy rest of the WEP key (the secret part) */
186 memcpy(key + 3, wep->key, wep->key_len);
187
188 /* Apply RC4 to data and compute CRC32 over decrypted data */
189 plen = skb->len - hdr_len - 8;
190
191 crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
192 sg_init_one(&sg, pos, plen + 4);
193
194 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
195 return -7;
196
197 crc = ~crc32_le(~0, pos, plen);
198 icv[0] = crc;
199 icv[1] = crc >> 8;
200 icv[2] = crc >> 16;
201 icv[3] = crc >> 24;
202
203 if (memcmp(icv, pos + plen, 4) != 0) {
204 /* ICV mismatch - drop frame */
205 return -2;
206 }
207
208 /* Remove IV and ICV */
209 memmove(skb->data + 4, skb->data, hdr_len);
210 skb_pull(skb, 4);
211 skb_trim(skb, skb->len - 4);
212 return 0;
213}
214
215static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
216{
217 struct prism2_wep_data *wep = priv;
218
219 if (len < 0 || len > WEP_KEY_LEN)
220 return -1;
221
222 memcpy(wep->key, key, len);
223 wep->key_len = len;
224
225 return 0;
226}
227
228static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
229{
230 struct prism2_wep_data *wep = priv;
231
232 if (len < wep->key_len)
233 return -1;
234
235 memcpy(key, wep->key, wep->key_len);
236
237 return wep->key_len;
238}
239
240static char *prism2_wep_print_stats(char *p, void *priv)
241{
242 struct prism2_wep_data *wep = priv;
243 p += sprintf(p, "key[%d] alg=WEP len=%d\n",
244 wep->key_idx, wep->key_len);
245 return p;
246}
247
248static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
249 .name = "WEP",
250 .init = prism2_wep_init,
251 .deinit = prism2_wep_deinit,
252 .encrypt_mpdu = prism2_wep_encrypt,
253 .decrypt_mpdu = prism2_wep_decrypt,
254 .encrypt_msdu = NULL,
255 .decrypt_msdu = NULL,
256 .set_key = prism2_wep_set_key,
257 .get_key = prism2_wep_get_key,
258 .print_stats = prism2_wep_print_stats,
259 .extra_prefix_len = 4, /* IV */
260 .extra_postfix_len = 4, /* ICV */
261 .owner = THIS_MODULE,
262};
263
264int ieee80211_crypto_wep_init(void)
265{
266 return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
267}
268
269void ieee80211_crypto_wep_exit(void)
270{
271 ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
272}
273
274void ieee80211_wep_null(void)
275{
276 return;
277}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
deleted file mode 100644
index 07a1fbb6678e..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
+++ /dev/null
@@ -1,203 +0,0 @@
1/*******************************************************************************
2
3 Copyright(c) 2004 Intel Corporation. All rights reserved.
4
5 Portions of this file are based on the WEP enablement code provided by the
6 Host AP project hostap-drivers v0.1.3
7 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8 <jkmaline@cc.hut.fi>
9 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31*******************************************************************************/
32
33#include <linux/compiler.h>
34//#include <linux/config.h>
35#include <linux/errno.h>
36#include <linux/if_arp.h>
37#include <linux/in6.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/netdevice.h>
43#include <linux/pci.h>
44#include <linux/proc_fs.h>
45#include <linux/skbuff.h>
46#include <linux/slab.h>
47#include <linux/tcp.h>
48#include <linux/types.h>
49#include <linux/wireless.h>
50#include <linux/etherdevice.h>
51#include <linux/uaccess.h>
52#include <net/arp.h>
53#include <net/net_namespace.h>
54
55#include "ieee80211.h"
56
57MODULE_DESCRIPTION("802.11 data/management/control stack");
58MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
59MODULE_LICENSE("GPL");
60
61#define DRV_NAME "ieee80211"
62
63static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
64{
65 if (ieee->networks)
66 return 0;
67
68 ieee->networks = kcalloc(
69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
70 GFP_KERNEL);
71 if (!ieee->networks)
72 return -ENOMEM;
73
74 return 0;
75}
76
77static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
78{
79 if (!ieee->networks)
80 return;
81 kfree(ieee->networks);
82 ieee->networks = NULL;
83}
84
85static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
86{
87 int i;
88
89 INIT_LIST_HEAD(&ieee->network_free_list);
90 INIT_LIST_HEAD(&ieee->network_list);
91 for (i = 0; i < MAX_NETWORK_COUNT; i++)
92 list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
93}
94
95
96struct net_device *alloc_ieee80211(int sizeof_priv)
97{
98 struct ieee80211_device *ieee;
99 struct net_device *dev;
100 int i, err;
101
102 IEEE80211_DEBUG_INFO("Initializing...\n");
103
104 dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
105 if (!dev) {
106 IEEE80211_ERROR("Unable to network device.\n");
107 goto failed;
108 }
109 ieee = netdev_priv(dev);
110
111 ieee->dev = dev;
112
113 err = ieee80211_networks_allocate(ieee);
114 if (err) {
115 IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
116 err);
117 goto failed;
118 }
119 ieee80211_networks_initialize(ieee);
120
121 /* Default fragmentation threshold is maximum payload size */
122 ieee->fts = DEFAULT_FTS;
123 ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
124 ieee->open_wep = 1;
125
126 /* Default to enabling full open WEP with host based encrypt/decrypt */
127 ieee->host_encrypt = 1;
128 ieee->host_decrypt = 1;
129 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
130
131 INIT_LIST_HEAD(&ieee->crypt_deinit_list);
132 init_timer(&ieee->crypt_deinit_timer);
133 ieee->crypt_deinit_timer.data = (unsigned long)ieee;
134 ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
135
136 spin_lock_init(&ieee->lock);
137 spin_lock_init(&ieee->wpax_suitlist_lock);
138
139 ieee->wpax_type_set = 0;
140 ieee->wpa_enabled = 0;
141 ieee->tkip_countermeasures = 0;
142 ieee->drop_unencrypted = 0;
143 ieee->privacy_invoked = 0;
144 ieee->ieee802_1x = 1;
145 ieee->raw_tx = 0;
146
147 ieee80211_softmac_init(ieee);
148
149 for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
150 INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
151
152 for (i = 0; i < 17; i++) {
153 ieee->last_rxseq_num[i] = -1;
154 ieee->last_rxfrag_num[i] = -1;
155 ieee->last_packet_time[i] = 0;
156 }
157//These function were added to load crypte module autoly
158 ieee80211_tkip_null();
159 ieee80211_wep_null();
160 ieee80211_ccmp_null();
161 return dev;
162
163 failed:
164 if (dev)
165 free_netdev(dev);
166 return NULL;
167}
168
169
170void free_ieee80211(struct net_device *dev)
171{
172 struct ieee80211_device *ieee = netdev_priv(dev);
173
174 int i;
175 struct list_head *p, *q;
176
177
178 ieee80211_softmac_free(ieee);
179 del_timer_sync(&ieee->crypt_deinit_timer);
180 ieee80211_crypt_deinit_entries(ieee, 1);
181
182 for (i = 0; i < WEP_KEYS; i++) {
183 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
184 if (crypt) {
185 if (crypt->ops)
186 crypt->ops->deinit(crypt->priv);
187 kfree(crypt);
188 ieee->crypt[i] = NULL;
189 }
190 }
191
192 ieee80211_networks_free(ieee);
193
194 for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
195 list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
196 kfree(list_entry(p, struct ieee_ibss_seq, list));
197 list_del(p);
198 }
199 }
200
201
202 free_netdev(dev);
203}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
deleted file mode 100644
index b522b57a2691..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ /dev/null
@@ -1,1486 +0,0 @@
1/*
2 * Original code based Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3 - hostap.o module, common routines
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 * Copyright (c) 2004, Intel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. See README and COPYING for
13 * more details.
14 ******************************************************************************
15
16 Few modifications for Realtek's Wi-Fi drivers by
17 Andrea Merello <andrea.merello@gmail.com>
18
19 A special thanks goes to Realtek for their support !
20
21******************************************************************************/
22
23
24#include <linux/compiler.h>
25//#include <linux/config.h>
26#include <linux/errno.h>
27#include <linux/if_arp.h>
28#include <linux/in6.h>
29#include <linux/in.h>
30#include <linux/ip.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/netdevice.h>
34#include <linux/pci.h>
35#include <linux/proc_fs.h>
36#include <linux/skbuff.h>
37#include <linux/slab.h>
38#include <linux/tcp.h>
39#include <linux/types.h>
40#include <linux/wireless.h>
41#include <linux/etherdevice.h>
42#include <linux/uaccess.h>
43#include <linux/ctype.h>
44
45#include "ieee80211.h"
46#include "dot11d.h"
47static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
48 struct sk_buff *skb,
49 struct ieee80211_rx_stats *rx_stats)
50{
51 struct ieee80211_hdr_4addr *hdr =
52 (struct ieee80211_hdr_4addr *)skb->data;
53 u16 fc = le16_to_cpu(hdr->frame_ctl);
54
55 skb->dev = ieee->dev;
56 skb_reset_mac_header(skb);
57 skb_pull(skb, ieee80211_get_hdrlen(fc));
58 skb->pkt_type = PACKET_OTHERHOST;
59 skb->protocol = __constant_htons(ETH_P_80211_RAW);
60 memset(skb->cb, 0, sizeof(skb->cb));
61 netif_rx(skb);
62}
63
64
65/* Called only as a tasklet (software IRQ) */
66static struct ieee80211_frag_entry *
67ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
68 unsigned int frag, u8 tid, u8 *src, u8 *dst)
69{
70 struct ieee80211_frag_entry *entry;
71 int i;
72
73 for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
74 entry = &ieee->frag_cache[tid][i];
75 if (entry->skb != NULL &&
76 time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
77 IEEE80211_DEBUG_FRAG(
78 "expiring fragment cache entry "
79 "seq=%u last_frag=%u\n",
80 entry->seq, entry->last_frag);
81 dev_kfree_skb_any(entry->skb);
82 entry->skb = NULL;
83 }
84
85 if (entry->skb != NULL && entry->seq == seq &&
86 (entry->last_frag + 1 == frag || frag == -1) &&
87 memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
88 memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
89 return entry;
90 }
91
92 return NULL;
93}
94
95/* Called only as a tasklet (software IRQ) */
96static struct sk_buff *
97ieee80211_frag_cache_get(struct ieee80211_device *ieee,
98 struct ieee80211_hdr_4addr *hdr)
99{
100 struct sk_buff *skb = NULL;
101 u16 fc = le16_to_cpu(hdr->frame_ctl);
102 u16 sc = le16_to_cpu(hdr->seq_ctl);
103 unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
104 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
105 struct ieee80211_frag_entry *entry;
106 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
107 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
108 u8 tid;
109
110 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
111 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
112 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
113 tid = UP2AC(tid);
114 tid++;
115 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
116 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
117 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
118 tid = UP2AC(tid);
119 tid++;
120 } else {
121 tid = 0;
122 }
123
124 if (frag == 0) {
125 /* Reserve enough space to fit maximum frame length */
126 skb = dev_alloc_skb(ieee->dev->mtu +
127 sizeof(struct ieee80211_hdr_4addr) +
128 8 /* LLC */ +
129 2 /* alignment */ +
130 8 /* WEP */ +
131 ETH_ALEN /* WDS */ +
132 (IEEE80211_QOS_HAS_SEQ(fc) ? 2 : 0) /* QOS Control */);
133 if (skb == NULL)
134 return NULL;
135
136 entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
137 ieee->frag_next_idx[tid]++;
138 if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
139 ieee->frag_next_idx[tid] = 0;
140
141 if (entry->skb != NULL)
142 dev_kfree_skb_any(entry->skb);
143
144 entry->first_frag_time = jiffies;
145 entry->seq = seq;
146 entry->last_frag = frag;
147 entry->skb = skb;
148 memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
149 memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
150 } else {
151 /* received a fragment of a frame for which the head fragment
152 * should have already been received */
153 entry = ieee80211_frag_cache_find(ieee, seq, frag, tid, hdr->addr2,
154 hdr->addr1);
155 if (entry != NULL) {
156 entry->last_frag = frag;
157 skb = entry->skb;
158 }
159 }
160
161 return skb;
162}
163
164
165/* Called only as a tasklet (software IRQ) */
166static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
167 struct ieee80211_hdr_4addr *hdr)
168{
169 u16 fc = le16_to_cpu(hdr->frame_ctl);
170 u16 sc = le16_to_cpu(hdr->seq_ctl);
171 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
172 struct ieee80211_frag_entry *entry;
173 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
174 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
175 u8 tid;
176
177 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
178 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
179 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
180 tid = UP2AC(tid);
181 tid++;
182 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
183 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
184 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
185 tid = UP2AC(tid);
186 tid++;
187 } else {
188 tid = 0;
189 }
190
191 entry = ieee80211_frag_cache_find(ieee, seq, -1, tid, hdr->addr2,
192 hdr->addr1);
193
194 if (entry == NULL) {
195 IEEE80211_DEBUG_FRAG(
196 "could not invalidate fragment cache "
197 "entry (seq=%u)\n", seq);
198 return -1;
199 }
200
201 entry->skb = NULL;
202 return 0;
203}
204
205
206
207/* ieee80211_rx_frame_mgtmt
208 *
209 * Responsible for handling management control frames
210 *
211 * Called by ieee80211_rx */
212static inline int
213ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
214 struct ieee80211_rx_stats *rx_stats, u16 type,
215 u16 stype)
216{
217 struct ieee80211_hdr_4addr *hdr;
218
219 // cheat the the hdr type
220 hdr = (struct ieee80211_hdr_4addr *)skb->data;
221
222 /* On the struct stats definition there is written that
223 * this is not mandatory.... but seems that the probe
224 * response parser uses it
225 */
226 rx_stats->len = skb->len;
227 ieee80211_rx_mgt(ieee, (struct ieee80211_hdr_4addr *)skb->data,
228 rx_stats);
229
230 if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))) {
231 dev_kfree_skb_any(skb);
232 return 0;
233 }
234
235 ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
236
237 dev_kfree_skb_any(skb);
238
239 return 0;
240
241}
242
243
244
245/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
246/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
247static unsigned char rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
248/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
249static unsigned char bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
250/* No encapsulation header if EtherType < 0x600 (=length) */
251
252/* Called by ieee80211_rx_frame_decrypt */
253static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
254 struct sk_buff *skb, size_t hdrlen)
255{
256 struct net_device *dev = ieee->dev;
257 u16 fc, ethertype;
258 struct ieee80211_hdr_4addr *hdr;
259 u8 *pos;
260
261 if (skb->len < 24)
262 return 0;
263
264 hdr = (struct ieee80211_hdr_4addr *)skb->data;
265 fc = le16_to_cpu(hdr->frame_ctl);
266
267 /* check that the frame is unicast frame to us */
268 if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
269 IEEE80211_FCTL_TODS &&
270 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
271 memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
272 /* ToDS frame with own addr BSSID and DA */
273 } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
274 IEEE80211_FCTL_FROMDS &&
275 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
276 /* FromDS frame with own addr as DA */
277 } else
278 return 0;
279
280 if (skb->len < 24 + 8)
281 return 0;
282
283 /* check for port access entity Ethernet type */
284// pos = skb->data + 24;
285 pos = skb->data + hdrlen;
286 ethertype = (pos[6] << 8) | pos[7];
287 if (ethertype == ETH_P_PAE)
288 return 1;
289
290 return 0;
291}
292
293/* Called only as a tasklet (software IRQ), by ieee80211_rx */
294static inline int
295ieee80211_rx_frame_decrypt(struct ieee80211_device *ieee, struct sk_buff *skb,
296 struct ieee80211_crypt_data *crypt)
297{
298 struct ieee80211_hdr_4addr *hdr;
299 int res, hdrlen;
300
301 if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
302 return 0;
303
304 hdr = (struct ieee80211_hdr_4addr *)skb->data;
305 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
306
307#ifdef CONFIG_IEEE80211_CRYPT_TKIP
308 if (ieee->tkip_countermeasures &&
309 strcmp(crypt->ops->name, "TKIP") == 0) {
310 if (net_ratelimit()) {
311 netdev_dbg(ieee->dev,
312 "TKIP countermeasures: dropped received packet from %pM\n",
313 ieee->dev->name, hdr->addr2);
314 }
315 return -1;
316 }
317#endif
318
319 atomic_inc(&crypt->refcnt);
320 res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
321 atomic_dec(&crypt->refcnt);
322 if (res < 0) {
323 IEEE80211_DEBUG_DROP(
324 "decryption failed (SA=%pM"
325 ") res=%d\n", hdr->addr2, res);
326 if (res == -2)
327 IEEE80211_DEBUG_DROP("Decryption failed ICV "
328 "mismatch (key %d)\n",
329 skb->data[hdrlen + 3] >> 6);
330 ieee->ieee_stats.rx_discards_undecryptable++;
331 return -1;
332 }
333
334 return res;
335}
336
337
338/* Called only as a tasklet (software IRQ), by ieee80211_rx */
339static inline int
340ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device *ieee,
341 struct sk_buff *skb, int keyidx,
342 struct ieee80211_crypt_data *crypt)
343{
344 struct ieee80211_hdr_4addr *hdr;
345 int res, hdrlen;
346
347 if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
348 return 0;
349
350 hdr = (struct ieee80211_hdr_4addr *)skb->data;
351 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
352
353 atomic_inc(&crypt->refcnt);
354 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
355 atomic_dec(&crypt->refcnt);
356 if (res < 0) {
357 netdev_dbg(ieee->dev,
358 "MSDU decryption/MIC verification failed (SA=%pM keyidx=%d)\n",
359 hdr->addr2, keyidx);
360 return -1;
361 }
362
363 return 0;
364}
365
366
367/* this function is stolen from ipw2200 driver*/
368#define IEEE_PACKET_RETRY_TIME (5*HZ)
369static int is_duplicate_packet(struct ieee80211_device *ieee,
370 struct ieee80211_hdr_4addr *header)
371{
372 u16 fc = le16_to_cpu(header->frame_ctl);
373 u16 sc = le16_to_cpu(header->seq_ctl);
374 u16 seq = WLAN_GET_SEQ_SEQ(sc);
375 u16 frag = WLAN_GET_SEQ_FRAG(sc);
376 u16 *last_seq, *last_frag;
377 unsigned long *last_time;
378 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
379 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
380 u8 tid;
381
382 //TO2DS and QoS
383 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
384 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header;
385 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
386 tid = UP2AC(tid);
387 tid++;
388 } else if (IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
389 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)header;
390 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
391 tid = UP2AC(tid);
392 tid++;
393 } else { // no QoS
394 tid = 0;
395 }
396 switch (ieee->iw_mode) {
397 case IW_MODE_ADHOC:
398 {
399 struct list_head *p;
400 struct ieee_ibss_seq *entry = NULL;
401 u8 *mac = header->addr2;
402 int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
403
404 list_for_each(p, &ieee->ibss_mac_hash[index]) {
405 entry = list_entry(p, struct ieee_ibss_seq, list);
406 if (!memcmp(entry->mac, mac, ETH_ALEN))
407 break;
408 }
409 // if (memcmp(entry->mac, mac, ETH_ALEN)){
410 if (p == &ieee->ibss_mac_hash[index]) {
411 entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
412 if (!entry)
413 return 0;
414
415 memcpy(entry->mac, mac, ETH_ALEN);
416 entry->seq_num[tid] = seq;
417 entry->frag_num[tid] = frag;
418 entry->packet_time[tid] = jiffies;
419 list_add(&entry->list, &ieee->ibss_mac_hash[index]);
420 return 0;
421 }
422 last_seq = &entry->seq_num[tid];
423 last_frag = &entry->frag_num[tid];
424 last_time = &entry->packet_time[tid];
425 break;
426 }
427
428 case IW_MODE_INFRA:
429 last_seq = &ieee->last_rxseq_num[tid];
430 last_frag = &ieee->last_rxfrag_num[tid];
431 last_time = &ieee->last_packet_time[tid];
432
433 break;
434 default:
435 return 0;
436 }
437
438// if(tid != 0) {
439// printk(KERN_WARNING ":)))))))))))%x %x %x, fc(%x)\n", tid, *last_seq, seq, header->frame_ctl);
440// }
441 if ((*last_seq == seq) &&
442 time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
443 if (*last_frag == frag) {
444 //printk(KERN_WARNING "[1] go drop!\n");
445 goto drop;
446
447 }
448 if (*last_frag + 1 != frag)
449 /* out-of-order fragment */
450 //printk(KERN_WARNING "[2] go drop!\n");
451 goto drop;
452 } else
453 *last_seq = seq;
454
455 *last_frag = frag;
456 *last_time = jiffies;
457 return 0;
458
459drop:
460// BUG_ON(!(fc & IEEE80211_FCTL_RETRY));
461// printk("DUP\n");
462
463 return 1;
464}
465
466
467/* All received frames are sent to this function. @skb contains the frame in
468 * IEEE 802.11 format, i.e., in the format it was sent over air.
469 * This function is called only as a tasklet (software IRQ). */
470int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
471 struct ieee80211_rx_stats *rx_stats)
472{
473 struct net_device *dev = ieee->dev;
474 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
475 struct ieee80211_hdr_4addr *hdr;
476
477 size_t hdrlen;
478 u16 fc, type, stype, sc;
479 struct net_device_stats *stats;
480 unsigned int frag;
481 u8 *payload;
482 u16 ethertype;
483 u8 dst[ETH_ALEN];
484 u8 src[ETH_ALEN];
485 u8 bssid[ETH_ALEN];
486 struct ieee80211_crypt_data *crypt = NULL;
487 int keyidx = 0;
488
489 // cheat the the hdr type
490 hdr = (struct ieee80211_hdr_4addr *)skb->data;
491 stats = &ieee->stats;
492
493 if (skb->len < 10) {
494 netdev_info(ieee->dev, "SKB length < 10\n");
495 goto rx_dropped;
496 }
497
498 fc = le16_to_cpu(hdr->frame_ctl);
499 type = WLAN_FC_GET_TYPE(fc);
500 stype = WLAN_FC_GET_STYPE(fc);
501 sc = le16_to_cpu(hdr->seq_ctl);
502
503 frag = WLAN_GET_SEQ_FRAG(sc);
504
505//YJ,add,080828,for keep alive
506 if ((fc & IEEE80211_FCTL_TODS) != IEEE80211_FCTL_TODS) {
507 if (!memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN))
508 ieee->NumRxUnicast++;
509 } else {
510 if (!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
511 ieee->NumRxUnicast++;
512 }
513//YJ,add,080828,for keep alive,end
514
515 hdrlen = ieee80211_get_hdrlen(fc);
516
517
518 if (ieee->iw_mode == IW_MODE_MONITOR) {
519 ieee80211_monitor_rx(ieee, skb, rx_stats);
520 stats->rx_packets++;
521 stats->rx_bytes += skb->len;
522 return 1;
523 }
524
525 if (ieee->host_decrypt) {
526 int idx = 0;
527 if (skb->len >= hdrlen + 3)
528 idx = skb->data[hdrlen + 3] >> 6;
529 crypt = ieee->crypt[idx];
530
531 /* allow NULL decrypt to indicate an station specific override
532 * for default encryption */
533 if (crypt && (crypt->ops == NULL ||
534 crypt->ops->decrypt_mpdu == NULL))
535 crypt = NULL;
536
537 if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
538 /* This seems to be triggered by some (multicast?)
539 * frames from other than current BSS, so just drop the
540 * frames silently instead of filling system log with
541 * these reports. */
542 IEEE80211_DEBUG_DROP("Decryption failed (not set)"
543 " (SA=%pM)\n",
544 hdr->addr2);
545 ieee->ieee_stats.rx_discards_undecryptable++;
546 goto rx_dropped;
547 }
548 }
549
550 if (skb->len < IEEE80211_DATA_HDR3_LEN)
551 goto rx_dropped;
552
553 // if QoS enabled, should check the sequence for each of the AC
554 if (is_duplicate_packet(ieee, hdr))
555 goto rx_dropped;
556
557
558 if (type == IEEE80211_FTYPE_MGMT) {
559 if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
560 goto rx_dropped;
561 else
562 goto rx_exit;
563 }
564
565 /* Data frame - extract src/dst addresses */
566 switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
567 case IEEE80211_FCTL_FROMDS:
568 memcpy(dst, hdr->addr1, ETH_ALEN);
569 memcpy(src, hdr->addr3, ETH_ALEN);
570 memcpy(bssid, hdr->addr2, ETH_ALEN);
571 break;
572 case IEEE80211_FCTL_TODS:
573 memcpy(dst, hdr->addr3, ETH_ALEN);
574 memcpy(src, hdr->addr2, ETH_ALEN);
575 memcpy(bssid, hdr->addr1, ETH_ALEN);
576 break;
577 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
578 if (skb->len < IEEE80211_DATA_HDR4_LEN)
579 goto rx_dropped;
580 memcpy(dst, hdr->addr3, ETH_ALEN);
581 memcpy(src, hdr->addr4, ETH_ALEN);
582 memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
583 break;
584 case 0:
585 memcpy(dst, hdr->addr1, ETH_ALEN);
586 memcpy(src, hdr->addr2, ETH_ALEN);
587 memcpy(bssid, hdr->addr3, ETH_ALEN);
588 break;
589 }
590
591
592 dev->last_rx = jiffies;
593
594
595 /* Nullfunc frames may have PS-bit set, so they must be passed to
596 * hostap_handle_sta_rx() before being dropped here. */
597 if (stype != IEEE80211_STYPE_DATA &&
598 stype != IEEE80211_STYPE_DATA_CFACK &&
599 stype != IEEE80211_STYPE_DATA_CFPOLL &&
600 stype != IEEE80211_STYPE_DATA_CFACKPOLL &&
601 stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
602 ) {
603 if (stype != IEEE80211_STYPE_NULLFUNC)
604 IEEE80211_DEBUG_DROP(
605 "RX: dropped data frame "
606 "with no data (type=0x%02x, "
607 "subtype=0x%02x, len=%d)\n",
608 type, stype, skb->len);
609 goto rx_dropped;
610 }
611 if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
612 goto rx_dropped;
613
614 ieee->NumRxDataInPeriod++;
615 ieee->NumRxOkTotal++;
616 /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
617
618 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
619 (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
620 goto rx_dropped;
621
622 hdr = (struct ieee80211_hdr_4addr *)skb->data;
623
624 /* skb: hdr + (possibly fragmented) plaintext payload */
625 // PR: FIXME: hostap has additional conditions in the "if" below:
626 // ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
627 if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
628 int flen;
629 struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
630 IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
631
632 if (!frag_skb) {
633 IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
634 "Rx cannot get skb from fragment "
635 "cache (morefrag=%d seq=%u frag=%u)\n",
636 (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
637 WLAN_GET_SEQ_SEQ(sc), frag);
638 goto rx_dropped;
639 }
640 flen = skb->len;
641 if (frag != 0)
642 flen -= hdrlen;
643
644 if (frag_skb->tail + flen > frag_skb->end) {
645 netdev_warn(ieee->dev,
646 "host decrypted and reassembled frame did not fit skb\n");
647 ieee80211_frag_cache_invalidate(ieee, hdr);
648 goto rx_dropped;
649 }
650
651 if (frag == 0) {
652 /* copy first fragment (including full headers) into
653 * beginning of the fragment cache skb */
654 memcpy(skb_put(frag_skb, flen), skb->data, flen);
655 } else {
656 /* append frame payload to the end of the fragment
657 * cache skb */
658 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
659 flen);
660 }
661 dev_kfree_skb_any(skb);
662 skb = NULL;
663
664 if (fc & IEEE80211_FCTL_MOREFRAGS) {
665 /* more fragments expected - leave the skb in fragment
666 * cache for now; it will be delivered to upper layers
667 * after all fragments have been received */
668 goto rx_exit;
669 }
670
671 /* this was the last fragment and the frame will be
672 * delivered, so remove skb from fragment cache */
673 skb = frag_skb;
674 hdr = (struct ieee80211_hdr_4addr *)skb->data;
675 ieee80211_frag_cache_invalidate(ieee, hdr);
676 }
677
678 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
679 * encrypted/authenticated */
680 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
681 ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
682 goto rx_dropped;
683
684 hdr = (struct ieee80211_hdr_4addr *)skb->data;
685 if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
686 if (/*ieee->ieee802_1x &&*/
687 ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
688
689#ifdef CONFIG_IEEE80211_DEBUG
690 /* pass unencrypted EAPOL frames even if encryption is
691 * configured */
692 struct eapol *eap = (struct eapol *)(skb->data +
693 24);
694 IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
695 eap_get_type(eap->type));
696#endif
697 } else {
698 IEEE80211_DEBUG_DROP(
699 "encryption configured, but RX "
700 "frame not encrypted (SA=%pM)\n",
701 hdr->addr2);
702 goto rx_dropped;
703 }
704 }
705
706#ifdef CONFIG_IEEE80211_DEBUG
707 if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
708 ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
709 struct eapol *eap = (struct eapol *)(skb->data +
710 24);
711 IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
712 eap_get_type(eap->type));
713 }
714#endif
715
716 if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
717 !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
718 IEEE80211_DEBUG_DROP(
719 "dropped unencrypted RX data "
720 "frame from %pM"
721 " (drop_unencrypted=1)\n",
722 hdr->addr2);
723 goto rx_dropped;
724 }
725/*
726 if(ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
727 printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
728 }
729*/
730 /* skb: hdr + (possible reassembled) full plaintext payload */
731 payload = skb->data + hdrlen;
732 ethertype = (payload[6] << 8) | payload[7];
733
734
735 /* convert hdr + possible LLC headers into Ethernet header */
736 if (skb->len - hdrlen >= 8 &&
737 ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
738 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
739 memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
740 /* remove RFC1042 or Bridge-Tunnel encapsulation and
741 * replace EtherType */
742 skb_pull(skb, hdrlen + SNAP_SIZE);
743 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
744 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
745 } else {
746 u16 len;
747 /* Leave Ethernet header part of hdr and full payload */
748 skb_pull(skb, hdrlen);
749 len = htons(skb->len);
750 memcpy(skb_push(skb, 2), &len, 2);
751 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
752 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
753 }
754
755
756 stats->rx_packets++;
757 stats->rx_bytes += skb->len;
758
759 if (skb) {
760 skb->protocol = eth_type_trans(skb, dev);
761 memset(skb->cb, 0, sizeof(skb->cb));
762 skb->dev = dev;
763 skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
764 ieee->last_rx_ps_time = jiffies;
765 netif_rx(skb);
766 }
767
768 rx_exit:
769 return 1;
770
771 rx_dropped:
772 stats->rx_dropped++;
773
774 /* Returning 0 indicates to caller that we have not handled the SKB--
775 * so it is still allocated and can be used again by underlying
776 * hardware as a DMA target */
777 return 0;
778}
779
780#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
781
782static inline int ieee80211_is_ofdm_rate(u8 rate)
783{
784 switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
785 case IEEE80211_OFDM_RATE_6MB:
786 case IEEE80211_OFDM_RATE_9MB:
787 case IEEE80211_OFDM_RATE_12MB:
788 case IEEE80211_OFDM_RATE_18MB:
789 case IEEE80211_OFDM_RATE_24MB:
790 case IEEE80211_OFDM_RATE_36MB:
791 case IEEE80211_OFDM_RATE_48MB:
792 case IEEE80211_OFDM_RATE_54MB:
793 return 1;
794 }
795 return 0;
796}
797
798static inline int ieee80211_SignalStrengthTranslate(int CurrSS)
799{
800 int RetSS;
801
802 // Step 1. Scale mapping.
803 if (CurrSS >= 71 && CurrSS <= 100)
804 RetSS = 90 + ((CurrSS - 70) / 3);
805 else if (CurrSS >= 41 && CurrSS <= 70)
806 RetSS = 78 + ((CurrSS - 40) / 3);
807 else if (CurrSS >= 31 && CurrSS <= 40)
808 RetSS = 66 + (CurrSS - 30);
809 else if (CurrSS >= 21 && CurrSS <= 30)
810 RetSS = 54 + (CurrSS - 20);
811 else if (CurrSS >= 5 && CurrSS <= 20)
812 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
813 else if (CurrSS == 4)
814 RetSS = 36;
815 else if (CurrSS == 3)
816 RetSS = 27;
817 else if (CurrSS == 2)
818 RetSS = 18;
819 else if (CurrSS == 1)
820 RetSS = 9;
821 else
822 RetSS = CurrSS;
823
824 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
825
826 // Step 2. Smoothing.
827
828 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
829
830 return RetSS;
831}
832
833static inline void
834ieee80211_extract_country_ie(struct ieee80211_device *ieee,
835 struct ieee80211_info_element *info_element,
836 struct ieee80211_network *network, u8 *addr2)
837{
838 if (IS_DOT11D_ENABLE(ieee)) {
839 if (info_element->len != 0) {
840 memcpy(network->CountryIeBuf, info_element->data, info_element->len);
841 network->CountryIeLen = info_element->len;
842
843 if (!IS_COUNTRY_IE_VALID(ieee))
844 Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
845 }
846
847 //
848 // 070305, rcnjko: I update country IE watch dog here because
849 // some AP (e.g. Cisco 1242) don't include country IE in their
850 // probe response frame.
851 //
852 if (IS_EQUAL_CIE_SRC(ieee, addr2))
853 UPDATE_CIE_WATCHDOG(ieee);
854 }
855
856}
857
858/* SignalStrengthIndex is 0-100 */
859static int ieee80211_TranslateToDbm(unsigned char SignalStrengthIndex)
860{
861 unsigned char SignalPower; // in dBm.
862
863 // Translate to dBm (x=0.5y-95).
864 SignalPower = (int)SignalStrengthIndex * 7 / 10;
865 SignalPower -= 95;
866
867 return SignalPower;
868}
869inline int ieee80211_network_init(
870 struct ieee80211_device *ieee,
871 struct ieee80211_probe_response *beacon,
872 struct ieee80211_network *network,
873 struct ieee80211_rx_stats *stats)
874{
875#ifdef CONFIG_IEEE80211_DEBUG
876 char rates_str[64];
877 char *p;
878#endif
879 struct ieee80211_info_element *info_element;
880 u16 left;
881 u8 i;
882 short offset;
883 u8 curRate = 0, hOpRate = 0, curRate_ex = 0;
884
885 /* Pull out fixed field data */
886 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
887 network->capability = beacon->capability;
888 network->last_scanned = jiffies;
889 network->time_stamp[0] = beacon->time_stamp[0];
890 network->time_stamp[1] = beacon->time_stamp[1];
891 network->beacon_interval = beacon->beacon_interval;
892 /* Where to pull this? beacon->listen_interval;*/
893 network->listen_interval = 0x0A;
894 network->rates_len = network->rates_ex_len = 0;
895 network->last_associate = 0;
896 network->ssid_len = 0;
897 network->flags = 0;
898 network->atim_window = 0;
899 network->QoS_Enable = 0;
900//by amy 080312
901 network->HighestOperaRate = 0;
902//by amy 080312
903 network->Turbo_Enable = 0;
904 network->CountryIeLen = 0;
905 memset(network->CountryIeBuf, 0, MAX_IE_LEN);
906
907 if (stats->freq == IEEE80211_52GHZ_BAND) {
908 /* for A band (No DS info) */
909 network->channel = stats->received_channel;
910 } else
911 network->flags |= NETWORK_HAS_CCK;
912
913 network->wpa_ie_len = 0;
914 network->rsn_ie_len = 0;
915
916 info_element = &beacon->info_element;
917 left = stats->len - ((void *)info_element - (void *)beacon);
918 while (left >= sizeof(struct ieee80211_info_element_hdr)) {
919 if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
920 IEEE80211_DEBUG_SCAN("SCAN: parse failed: info_element->len + 2 > left : info_element->len+2=%d left=%d.\n",
921 info_element->len + sizeof(struct ieee80211_info_element),
922 left);
923 return 1;
924 }
925
926 switch (info_element->id) {
927 case MFIE_TYPE_SSID:
928 if (ieee80211_is_empty_essid(info_element->data,
929 info_element->len)) {
930 network->flags |= NETWORK_EMPTY_ESSID;
931 break;
932 }
933
934 network->ssid_len = min(info_element->len,
935 (u8)IW_ESSID_MAX_SIZE);
936 memcpy(network->ssid, info_element->data, network->ssid_len);
937 if (network->ssid_len < IW_ESSID_MAX_SIZE)
938 memset(network->ssid + network->ssid_len, 0,
939 IW_ESSID_MAX_SIZE - network->ssid_len);
940
941 IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
942 network->ssid, network->ssid_len);
943 break;
944
945 case MFIE_TYPE_RATES:
946#ifdef CONFIG_IEEE80211_DEBUG
947 p = rates_str;
948#endif
949 network->rates_len = min(info_element->len, MAX_RATES_LENGTH);
950 for (i = 0; i < network->rates_len; i++) {
951 network->rates[i] = info_element->data[i];
952 curRate = network->rates[i] & 0x7f;
953 if (hOpRate < curRate)
954 hOpRate = curRate;
955#ifdef CONFIG_IEEE80211_DEBUG
956 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
957#endif
958 if (ieee80211_is_ofdm_rate(info_element->data[i])) {
959 network->flags |= NETWORK_HAS_OFDM;
960 if (info_element->data[i] &
961 IEEE80211_BASIC_RATE_MASK)
962 network->flags &=
963 ~NETWORK_HAS_CCK;
964 }
965 }
966
967 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES: '%s' (%d)\n",
968 rates_str, network->rates_len);
969 break;
970
971 case MFIE_TYPE_RATES_EX:
972#ifdef CONFIG_IEEE80211_DEBUG
973 p = rates_str;
974#endif
975 network->rates_ex_len = min(info_element->len, MAX_RATES_EX_LENGTH);
976 for (i = 0; i < network->rates_ex_len; i++) {
977 network->rates_ex[i] = info_element->data[i];
978 curRate_ex = network->rates_ex[i] & 0x7f;
979 if (hOpRate < curRate_ex)
980 hOpRate = curRate_ex;
981#ifdef CONFIG_IEEE80211_DEBUG
982 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
983#endif
984 if (ieee80211_is_ofdm_rate(info_element->data[i])) {
985 network->flags |= NETWORK_HAS_OFDM;
986 if (info_element->data[i] &
987 IEEE80211_BASIC_RATE_MASK)
988 network->flags &=
989 ~NETWORK_HAS_CCK;
990 }
991 }
992
993 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
994 rates_str, network->rates_ex_len);
995 break;
996
997 case MFIE_TYPE_DS_SET:
998 IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
999 info_element->data[0]);
1000 if (stats->freq == IEEE80211_24GHZ_BAND)
1001 network->channel = info_element->data[0];
1002 break;
1003
1004 case MFIE_TYPE_FH_SET:
1005 IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
1006 break;
1007
1008 case MFIE_TYPE_CF_SET:
1009 IEEE80211_DEBUG_SCAN("MFIE_TYPE_CF_SET: ignored\n");
1010 break;
1011
1012 case MFIE_TYPE_TIM:
1013
1014 if (info_element->len < 4)
1015 break;
1016
1017 network->dtim_period = info_element->data[1];
1018
1019 if (ieee->state != IEEE80211_LINKED)
1020 break;
1021
1022 network->last_dtim_sta_time[0] = jiffies;
1023 network->last_dtim_sta_time[1] = stats->mac_time[1];
1024
1025 network->dtim_data = IEEE80211_DTIM_VALID;
1026
1027 if (info_element->data[0] != 0)
1028 break;
1029
1030 if (info_element->data[2] & 1)
1031 network->dtim_data |= IEEE80211_DTIM_MBCAST;
1032
1033 offset = (info_element->data[2] >> 1)*2;
1034
1035 //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id);
1036
1037 /* add and modified for ps 2008.1.22 */
1038 if (ieee->assoc_id < 8*offset ||
1039 ieee->assoc_id > 8*(offset + info_element->len - 3)) {
1040 break;
1041 }
1042
1043 offset = (ieee->assoc_id/8) - offset;// + ((aid % 8)? 0 : 1) ;
1044
1045 // printk("offset:%x data:%x, ucast:%d\n", offset,
1046 // info_element->data[3+offset] ,
1047 // info_element->data[3+offset] & (1<<(ieee->assoc_id%8)));
1048
1049 if (info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
1050 network->dtim_data |= IEEE80211_DTIM_UCAST;
1051
1052 break;
1053
1054 case MFIE_TYPE_IBSS_SET:
1055 IEEE80211_DEBUG_SCAN("MFIE_TYPE_IBSS_SET: ignored\n");
1056 break;
1057
1058 case MFIE_TYPE_CHALLENGE:
1059 IEEE80211_DEBUG_SCAN("MFIE_TYPE_CHALLENGE: ignored\n");
1060 break;
1061
1062 case MFIE_TYPE_GENERIC:
1063 //nic is 87B
1064 IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n",
1065 info_element->len);
1066 if (info_element->len >= 4 &&
1067 info_element->data[0] == 0x00 &&
1068 info_element->data[1] == 0x50 &&
1069 info_element->data[2] == 0xf2 &&
1070 info_element->data[3] == 0x01) {
1071 network->wpa_ie_len = min(info_element->len + 2,
1072 MAX_WPA_IE_LEN);
1073 memcpy(network->wpa_ie, info_element,
1074 network->wpa_ie_len);
1075 }
1076
1077 if (info_element->len == 7 &&
1078 info_element->data[0] == 0x00 &&
1079 info_element->data[1] == 0xe0 &&
1080 info_element->data[2] == 0x4c &&
1081 info_element->data[3] == 0x01 &&
1082 info_element->data[4] == 0x02) {
1083 network->Turbo_Enable = 1;
1084 }
1085 if (1 == stats->nic_type) //nic 87
1086 break;
1087
1088 if (info_element->len >= 5 &&
1089 info_element->data[0] == 0x00 &&
1090 info_element->data[1] == 0x50 &&
1091 info_element->data[2] == 0xf2 &&
1092 info_element->data[3] == 0x02 &&
1093 info_element->data[4] == 0x00) {
1094 //printk(KERN_WARNING "wmm info updated: %x\n", info_element->data[6]);
1095 //WMM Information Element
1096 network->wmm_info = info_element->data[6];
1097 network->QoS_Enable = 1;
1098 }
1099
1100 if (info_element->len >= 8 &&
1101 info_element->data[0] == 0x00 &&
1102 info_element->data[1] == 0x50 &&
1103 info_element->data[2] == 0xf2 &&
1104 info_element->data[3] == 0x02 &&
1105 info_element->data[4] == 0x01) {
1106 // Not care about version at present.
1107 //WMM Information Element
1108 //printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]);
1109 network->wmm_info = info_element->data[6];
1110 //WMM Parameter Element
1111 memcpy(network->wmm_param, (u8 *)(info_element->data + 8), (info_element->len - 8));
1112 network->QoS_Enable = 1;
1113 }
1114 break;
1115
1116 case MFIE_TYPE_RSN:
1117 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RSN: %d bytes\n",
1118 info_element->len);
1119 network->rsn_ie_len = min(info_element->len + 2,
1120 MAX_WPA_IE_LEN);
1121 memcpy(network->rsn_ie, info_element,
1122 network->rsn_ie_len);
1123 break;
1124 case MFIE_TYPE_COUNTRY:
1125 IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
1126 info_element->len);
1127// printk("=====>Receive <%s> Country IE\n",network->ssid);
1128 ieee80211_extract_country_ie(ieee, info_element, network, beacon->header.addr2);
1129 break;
1130 default:
1131 IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
1132 info_element->id);
1133 break;
1134 }
1135
1136 left -= sizeof(struct ieee80211_info_element_hdr) +
1137 info_element->len;
1138 info_element = (struct ieee80211_info_element *)
1139 &info_element->data[info_element->len];
1140 }
1141//by amy 080312
1142 network->HighestOperaRate = hOpRate;
1143//by amy 080312
1144 network->mode = 0;
1145 if (stats->freq == IEEE80211_52GHZ_BAND)
1146 network->mode = IEEE_A;
1147 else {
1148 if (network->flags & NETWORK_HAS_OFDM)
1149 network->mode |= IEEE_G;
1150 if (network->flags & NETWORK_HAS_CCK)
1151 network->mode |= IEEE_B;
1152 }
1153
1154 if (network->mode == 0) {
1155 IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' "
1156 "network.\n",
1157 escape_essid(network->ssid,
1158 network->ssid_len),
1159 network->bssid);
1160 return 1;
1161 }
1162
1163 if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
1164 network->flags |= NETWORK_EMPTY_ESSID;
1165
1166 stats->signal = ieee80211_TranslateToDbm(stats->signalstrength);
1167 //stats->noise = stats->signal - stats->noise;
1168 stats->noise = ieee80211_TranslateToDbm(100 - stats->signalstrength) - 25;
1169 memcpy(&network->stats, stats, sizeof(network->stats));
1170
1171 return 0;
1172}
1173
1174static inline int is_same_network(struct ieee80211_network *src,
1175 struct ieee80211_network *dst,
1176 struct ieee80211_device *ieee)
1177{
1178 /* A network is only a duplicate if the channel, BSSID, ESSID
1179 * and the capability field (in particular IBSS and BSS) all match.
1180 * We treat all <hidden> with the same BSSID and channel
1181 * as one network */
1182 return (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
1183 //((src->ssid_len == dst->ssid_len) &&
1184 (src->channel == dst->channel) &&
1185 !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
1186 (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
1187 //!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
1188 ((src->capability & WLAN_CAPABILITY_IBSS) ==
1189 (dst->capability & WLAN_CAPABILITY_IBSS)) &&
1190 ((src->capability & WLAN_CAPABILITY_BSS) ==
1191 (dst->capability & WLAN_CAPABILITY_BSS)));
1192}
1193
1194inline void update_network(struct ieee80211_network *dst,
1195 struct ieee80211_network *src)
1196{
1197 unsigned char quality = src->stats.signalstrength;
1198 unsigned char signal = 0;
1199 unsigned char noise = 0;
1200 if (dst->stats.signalstrength > 0)
1201 quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6;
1202 signal = ieee80211_TranslateToDbm(quality);
1203 //noise = signal - src->stats.noise;
1204 if (dst->stats.noise > 0)
1205 noise = (dst->stats.noise * 5 + src->stats.noise)/6;
1206 //if(strcmp(dst->ssid, "linksys_lzm000") == 0)
1207// printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal);
1208 memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
1209 dst->stats.signalstrength = quality;
1210 dst->stats.signal = signal;
1211// printk("==================>stats.signal is %d\n",dst->stats.signal);
1212 dst->stats.noise = noise;
1213
1214
1215 dst->capability = src->capability;
1216 memcpy(dst->rates, src->rates, src->rates_len);
1217 dst->rates_len = src->rates_len;
1218 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
1219 dst->rates_ex_len = src->rates_ex_len;
1220 dst->HighestOperaRate = src->HighestOperaRate;
1221 //printk("==========>in %s: src->ssid is %s,chan is %d\n",__func__,src->ssid,src->channel);
1222
1223 //YJ,add,080819,for hidden ap
1224 if (src->ssid_len > 0) {
1225 //if(src->ssid_len == 13)
1226 // printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid);
1227 memset(dst->ssid, 0, dst->ssid_len);
1228 dst->ssid_len = src->ssid_len;
1229 memcpy(dst->ssid, src->ssid, src->ssid_len);
1230 }
1231 //YJ,add,080819,for hidden ap,end
1232
1233 dst->channel = src->channel;
1234 dst->mode = src->mode;
1235 dst->flags = src->flags;
1236 dst->time_stamp[0] = src->time_stamp[0];
1237 dst->time_stamp[1] = src->time_stamp[1];
1238
1239 dst->beacon_interval = src->beacon_interval;
1240 dst->listen_interval = src->listen_interval;
1241 dst->atim_window = src->atim_window;
1242 dst->dtim_period = src->dtim_period;
1243 dst->dtim_data = src->dtim_data;
1244 dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
1245 dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
1246// printk("update:%s, dtim_period:%x, dtim_data:%x\n", src->ssid, src->dtim_period, src->dtim_data);
1247 memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
1248 dst->wpa_ie_len = src->wpa_ie_len;
1249 memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
1250 dst->rsn_ie_len = src->rsn_ie_len;
1251
1252 dst->last_scanned = jiffies;
1253 /* dst->last_associate is not overwritten */
1254// disable QoS process now, added by David 2006/7/25
1255#if 1
1256 dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
1257/*
1258 if((dst->wmm_info^src->wmm_info)&0x0f) {//Param Set Count change, update Parameter
1259 memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN);
1260 }
1261*/
1262 if (src->wmm_param[0].ac_aci_acm_aifsn || \
1263 src->wmm_param[1].ac_aci_acm_aifsn || \
1264 src->wmm_param[2].ac_aci_acm_aifsn || \
1265 src->wmm_param[3].ac_aci_acm_aifsn) {
1266 memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
1267 }
1268 dst->QoS_Enable = src->QoS_Enable;
1269#else
1270 dst->QoS_Enable = 1;//for Rtl8187 simulation
1271#endif
1272 dst->SignalStrength = src->SignalStrength;
1273 dst->Turbo_Enable = src->Turbo_Enable;
1274 dst->CountryIeLen = src->CountryIeLen;
1275 memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
1276}
1277
1278
1279inline void
1280ieee80211_process_probe_response(struct ieee80211_device *ieee,
1281 struct ieee80211_probe_response *beacon,
1282 struct ieee80211_rx_stats *stats)
1283{
1284 struct ieee80211_network network;
1285 struct ieee80211_network *target;
1286 struct ieee80211_network *oldest = NULL;
1287#ifdef CONFIG_IEEE80211_DEBUG
1288 struct ieee80211_info_element *info_element = &beacon->info_element;
1289#endif
1290 unsigned long flags;
1291 short renew;
1292 u8 wmm_info;
1293 u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON) ? 1 : 0; //YJ,add,080819,for hidden ap
1294
1295 memset(&network, 0, sizeof(struct ieee80211_network));
1296
1297 IEEE80211_DEBUG_SCAN(
1298 "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
1299 escape_essid(info_element->data, info_element->len),
1300 beacon->header.addr3,
1301 (beacon->capability & (1<<0xf)) ? '1' : '0',
1302 (beacon->capability & (1<<0xe)) ? '1' : '0',
1303 (beacon->capability & (1<<0xd)) ? '1' : '0',
1304 (beacon->capability & (1<<0xc)) ? '1' : '0',
1305 (beacon->capability & (1<<0xb)) ? '1' : '0',
1306 (beacon->capability & (1<<0xa)) ? '1' : '0',
1307 (beacon->capability & (1<<0x9)) ? '1' : '0',
1308 (beacon->capability & (1<<0x8)) ? '1' : '0',
1309 (beacon->capability & (1<<0x7)) ? '1' : '0',
1310 (beacon->capability & (1<<0x6)) ? '1' : '0',
1311 (beacon->capability & (1<<0x5)) ? '1' : '0',
1312 (beacon->capability & (1<<0x4)) ? '1' : '0',
1313 (beacon->capability & (1<<0x3)) ? '1' : '0',
1314 (beacon->capability & (1<<0x2)) ? '1' : '0',
1315 (beacon->capability & (1<<0x1)) ? '1' : '0',
1316 (beacon->capability & (1<<0x0)) ? '1' : '0');
1317
1318 if (ieee80211_network_init(ieee, beacon, &network, stats)) {
1319 IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n",
1320 escape_essid(info_element->data,
1321 info_element->len),
1322 beacon->header.addr3,
1323 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1324 IEEE80211_STYPE_PROBE_RESP ?
1325 "PROBE RESPONSE" : "BEACON");
1326 return;
1327 }
1328
1329 // For Asus EeePc request,
1330 // (1) if wireless adapter receive get any 802.11d country code in AP beacon,
1331 // wireless adapter should follow the country code.
1332 // (2) If there is no any country code in beacon,
1333 // then wireless adapter should do active scan from ch1~11 and
1334 // passive scan from ch12~14
1335 if (ieee->bGlobalDomain) {
1336 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP) {
1337 // Case 1: Country code
1338 if (IS_COUNTRY_IE_VALID(ieee)) {
1339 if (!IsLegalChannel(ieee, network.channel)) {
1340 printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
1341 return;
1342 }
1343 }
1344 // Case 2: No any country code.
1345 else {
1346 // Filter over channel ch12~14
1347 if (network.channel > 11) {
1348 printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
1349 return;
1350 }
1351 }
1352 } else {
1353 // Case 1: Country code
1354 if (IS_COUNTRY_IE_VALID(ieee)) {
1355 if (!IsLegalChannel(ieee, network.channel)) {
1356 printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n", network.channel);
1357 return;
1358 }
1359 }
1360 // Case 2: No any country code.
1361 else {
1362 // Filter over channel ch12~14
1363 if (network.channel > 14) {
1364 printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n", network.channel);
1365 return;
1366 }
1367 }
1368 }
1369 }
1370 /* The network parsed correctly -- so now we scan our known networks
1371 * to see if we can find it in our list.
1372 *
1373 * NOTE: This search is definitely not optimized. Once its doing
1374 * the "right thing" we'll optimize it for efficiency if
1375 * necessary */
1376
1377 /* Search for this entry in the list and update it if it is
1378 * already there. */
1379
1380 spin_lock_irqsave(&ieee->lock, flags);
1381
1382 if (is_same_network(&ieee->current_network, &network, ieee)) {
1383 wmm_info = ieee->current_network.wmm_info;
1384 //YJ,add,080819,for hidden ap
1385 if (is_beacon == 0)
1386 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
1387 else if (ieee->state == IEEE80211_LINKED)
1388 ieee->NumRxBcnInPeriod++;
1389 //YJ,add,080819,for hidden ap,end
1390 //printk("====>network.ssid=%s cur_ssid=%s\n", network.ssid, ieee->current_network.ssid);
1391 update_network(&ieee->current_network, &network);
1392 }
1393
1394 list_for_each_entry(target, &ieee->network_list, list) {
1395 if (is_same_network(target, &network, ieee))
1396 break;
1397 if ((oldest == NULL) ||
1398 (target->last_scanned < oldest->last_scanned))
1399 oldest = target;
1400 }
1401
1402 /* If we didn't find a match, then get a new network slot to initialize
1403 * with this beacon's information */
1404 if (&target->list == &ieee->network_list) {
1405 if (list_empty(&ieee->network_free_list)) {
1406 /* If there are no more slots, expire the oldest */
1407 list_del(&oldest->list);
1408 target = oldest;
1409 IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from "
1410 "network list.\n",
1411 escape_essid(target->ssid,
1412 target->ssid_len),
1413 target->bssid);
1414 } else {
1415 /* Otherwise just pull from the free list */
1416 target = list_entry(ieee->network_free_list.next,
1417 struct ieee80211_network, list);
1418 list_del(ieee->network_free_list.next);
1419 }
1420
1421
1422#ifdef CONFIG_IEEE80211_DEBUG
1423 IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n",
1424 escape_essid(network.ssid,
1425 network.ssid_len),
1426 network.bssid,
1427 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1428 IEEE80211_STYPE_PROBE_RESP ?
1429 "PROBE RESPONSE" : "BEACON");
1430#endif
1431
1432 memcpy(target, &network, sizeof(*target));
1433 list_add_tail(&target->list, &ieee->network_list);
1434 } else {
1435 IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n",
1436 escape_essid(target->ssid,
1437 target->ssid_len),
1438 target->bssid,
1439 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1440 IEEE80211_STYPE_PROBE_RESP ?
1441 "PROBE RESPONSE" : "BEACON");
1442
1443 /* we have an entry and we are going to update it. But this entry may
1444 * be already expired. In this case we do the same as we found a new
1445 * net and call the new_net handler
1446 */
1447 renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
1448 //YJ,add,080819,for hidden ap
1449 if (is_beacon == 0)
1450 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
1451 //if(strncmp(network.ssid, "linksys-c",9) == 0)
1452 // printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
1453 if (((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
1454 && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
1455 || ((ieee->current_network.ssid_len == network.ssid_len) && (strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0) && (ieee->state == IEEE80211_NOLINK))))
1456 renew = 1;
1457 //YJ,add,080819,for hidden ap,end
1458 update_network(target, &network);
1459 }
1460
1461 spin_unlock_irqrestore(&ieee->lock, flags);
1462}
1463
1464void ieee80211_rx_mgt(struct ieee80211_device *ieee,
1465 struct ieee80211_hdr_4addr *header,
1466 struct ieee80211_rx_stats *stats)
1467{
1468 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
1469
1470 case IEEE80211_STYPE_BEACON:
1471 IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
1472 WLAN_FC_GET_STYPE(header->frame_ctl));
1473 IEEE80211_DEBUG_SCAN("Beacon\n");
1474 ieee80211_process_probe_response(
1475 ieee, (struct ieee80211_probe_response *)header, stats);
1476 break;
1477
1478 case IEEE80211_STYPE_PROBE_RESP:
1479 IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
1480 WLAN_FC_GET_STYPE(header->frame_ctl));
1481 IEEE80211_DEBUG_SCAN("Probe response\n");
1482 ieee80211_process_probe_response(
1483 ieee, (struct ieee80211_probe_response *)header, stats);
1484 break;
1485 }
1486}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
deleted file mode 100644
index 03eb164798cd..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ /dev/null
@@ -1,2711 +0,0 @@
1/* IEEE 802.11 SoftMAC layer
2 * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
3 *
4 * Mostly extracted from the rtl8180-sa2400 driver for the
5 * in-kernel generic ieee802.11 stack.
6 *
7 * Few lines might be stolen from other part of the ieee80211
8 * stack. Copyright who own it's copyright
9 *
10 * WPA code stolen from the ipw2200 driver.
11 * Copyright who own it's copyright.
12 *
13 * released under the GPL
14 */
15
16#include "ieee80211.h"
17
18#include <linux/random.h>
19#include <linux/delay.h>
20#include <linux/slab.h>
21#include <linux/interrupt.h>
22#include <linux/uaccess.h>
23#include <linux/etherdevice.h>
24
25#include "dot11d.h"
26
27short ieee80211_is_54g(const struct ieee80211_network *net)
28{
29 return (net->rates_ex_len > 0) || (net->rates_len > 4);
30}
31
32short ieee80211_is_shortslot(const struct ieee80211_network *net)
33{
34 return net->capability & WLAN_CAPABILITY_SHORT_SLOT;
35}
36
37/* returns the total length needed for placing the RATE MFIE
38 * tag and the EXTENDED RATE MFIE tag if needed.
39 * It encludes two bytes per tag for the tag itself and its len
40 */
41static unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
42{
43 unsigned int rate_len = 0;
44
45 if (ieee->modulation & IEEE80211_CCK_MODULATION)
46 rate_len = IEEE80211_CCK_RATE_LEN + 2;
47
48 if (ieee->modulation & IEEE80211_OFDM_MODULATION)
49
50 rate_len += IEEE80211_OFDM_RATE_LEN + 2;
51
52 return rate_len;
53}
54
55/* place the MFIE rate, tag to the memory (double) poised.
56 * Then it updates the pointer so that it points after the new MFIE tag added.
57 */
58static void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
59{
60 u8 *tag = *tag_p;
61
62 if (ieee->modulation & IEEE80211_CCK_MODULATION) {
63 *tag++ = MFIE_TYPE_RATES;
64 *tag++ = 4;
65 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
66 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
67 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
68 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
69 }
70
71 /* We may add an option for custom rates that specific HW might support */
72 *tag_p = tag;
73}
74
75static void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
76{
77 u8 *tag = *tag_p;
78
79 if (ieee->modulation & IEEE80211_OFDM_MODULATION) {
80 *tag++ = MFIE_TYPE_RATES_EX;
81 *tag++ = 8;
82 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
83 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
84 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
85 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
86 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
87 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
88 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
89 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
90
91 }
92 /* We may add an option for custom rates that specific HW might support */
93 *tag_p = tag;
94}
95
96static void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p)
97{
98 u8 *tag = *tag_p;
99
100 *tag++ = MFIE_TYPE_GENERIC; /* 0 */
101 *tag++ = 7;
102 *tag++ = 0x00;
103 *tag++ = 0x50;
104 *tag++ = 0xf2;
105 *tag++ = 0x02; /* 5 */
106 *tag++ = 0x00;
107 *tag++ = 0x01;
108#ifdef SUPPORT_USPD
109 if (ieee->current_network.wmm_info & 0x80)
110 *tag++ = 0x0f|MAX_SP_Len;
111 else
112 *tag++ = MAX_SP_Len;
113#else
114 *tag++ = MAX_SP_Len;
115#endif
116 *tag_p = tag;
117}
118
119static void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p)
120{
121 u8 *tag = *tag_p;
122 *tag++ = MFIE_TYPE_GENERIC; /* 0 */
123 *tag++ = 7;
124 *tag++ = 0x00;
125 *tag++ = 0xe0;
126 *tag++ = 0x4c;
127 *tag++ = 0x01; /* 5 */
128 *tag++ = 0x02;
129 *tag++ = 0x11;
130 *tag++ = 0x00;
131 *tag_p = tag;
132 printk(KERN_ALERT "This is enable turbo mode IE process\n");
133}
134
135static void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
136{
137 int nh;
138 nh = (ieee->mgmt_queue_head + 1) % MGMT_QUEUE_NUM;
139
140 ieee->mgmt_queue_head = nh;
141 ieee->mgmt_queue_ring[nh] = skb;
142}
143
144static struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
145{
146 struct sk_buff *ret;
147
148 if (ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
149 return NULL;
150
151 ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
152
153 ieee->mgmt_queue_tail =
154 (ieee->mgmt_queue_tail + 1) % MGMT_QUEUE_NUM;
155
156 return ret;
157}
158
159static void init_mgmt_queue(struct ieee80211_device *ieee)
160{
161 ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
162}
163
164void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
165
166inline void softmac_mgmt_xmit(struct sk_buff *skb,
167 struct ieee80211_device *ieee)
168{
169 unsigned long flags;
170 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
171 struct ieee80211_hdr_3addr *header =
172 (struct ieee80211_hdr_3addr *) skb->data;
173
174 spin_lock_irqsave(&ieee->lock, flags);
175
176 /* called with 2nd param 0, no mgmt lock required */
177 ieee80211_sta_wakeup(ieee, 0);
178
179 if (single) {
180 if (ieee->queue_stop) {
181 enqueue_mgmt(ieee, skb);
182 } else {
183 header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
184
185 if (ieee->seq_ctrl[0] == 0xFFF)
186 ieee->seq_ctrl[0] = 0;
187 else
188 ieee->seq_ctrl[0]++;
189
190 /* avoid watchdog triggers */
191 ieee->dev->trans_start = jiffies;
192 ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
193 }
194
195 spin_unlock_irqrestore(&ieee->lock, flags);
196 } else {
197 spin_unlock_irqrestore(&ieee->lock, flags);
198 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
199
200 header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
201
202 if (ieee->seq_ctrl[0] == 0xFFF)
203 ieee->seq_ctrl[0] = 0;
204 else
205 ieee->seq_ctrl[0]++;
206
207 /* avoid watchdog triggers */
208 ieee->dev->trans_start = jiffies;
209 ieee->softmac_hard_start_xmit(skb, ieee->dev);
210
211 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
212 }
213}
214
215inline void softmac_ps_mgmt_xmit(struct sk_buff *skb,
216 struct ieee80211_device *ieee)
217{
218 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
219 struct ieee80211_hdr_3addr *header =
220 (struct ieee80211_hdr_3addr *) skb->data;
221
222 if (single) {
223 header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
224
225 if (ieee->seq_ctrl[0] == 0xFFF)
226 ieee->seq_ctrl[0] = 0;
227 else
228 ieee->seq_ctrl[0]++;
229
230 /* avoid watchdog triggers */
231 ieee->dev->trans_start = jiffies;
232 ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
233 } else {
234 header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
235
236 if (ieee->seq_ctrl[0] == 0xFFF)
237 ieee->seq_ctrl[0] = 0;
238 else
239 ieee->seq_ctrl[0]++;
240
241 /* avoid watchdog triggers */
242 ieee->dev->trans_start = jiffies;
243 ieee->softmac_hard_start_xmit(skb, ieee->dev);
244 }
245}
246
247inline struct sk_buff *
248ieee80211_disassociate_skb(struct ieee80211_network *beacon,
249 struct ieee80211_device *ieee, u8 asRsn)
250{
251 struct sk_buff *skb;
252 struct ieee80211_disassoc_frame *disass;
253
254 skb = dev_alloc_skb(sizeof(struct ieee80211_disassoc_frame));
255 if (!skb)
256 return NULL;
257
258 disass = (struct ieee80211_disassoc_frame *) skb_put(skb, sizeof(struct ieee80211_disassoc_frame));
259 disass->header.frame_control = cpu_to_le16(IEEE80211_STYPE_DISASSOC);
260 disass->header.duration_id = 0;
261
262 memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
263 memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
264 memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
265
266 disass->reasoncode = asRsn;
267 return skb;
268}
269
270void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta, u8 asRsn)
271{
272 struct ieee80211_network *beacon = &ieee->current_network;
273 struct sk_buff *skb;
274 skb = ieee80211_disassociate_skb(beacon, ieee, asRsn);
275 if (skb)
276 softmac_mgmt_xmit(skb, ieee);
277}
278
279inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
280{
281 unsigned int len, rate_len;
282 u8 *tag;
283 struct sk_buff *skb;
284 struct ieee80211_probe_request *req;
285
286 len = ieee->current_network.ssid_len;
287
288 rate_len = ieee80211_MFIE_rate_len(ieee);
289
290 skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
291 2 + len + rate_len);
292 if (!skb)
293 return NULL;
294
295 req = (struct ieee80211_probe_request *) skb_put(skb, sizeof(struct ieee80211_probe_request));
296 req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
297 req->header.duration_id = 0; /* FIXME: is this OK ? */
298
299 memset(req->header.addr1, 0xff, ETH_ALEN);
300 memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
301 memset(req->header.addr3, 0xff, ETH_ALEN);
302
303 tag = (u8 *) skb_put(skb, len + 2 + rate_len);
304
305 *tag++ = MFIE_TYPE_SSID;
306 *tag++ = len;
307 memcpy(tag, ieee->current_network.ssid, len);
308 tag += len;
309 ieee80211_MFIE_Brate(ieee, &tag);
310 ieee80211_MFIE_Grate(ieee, &tag);
311
312 return skb;
313}
314
315struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
316
317static void ieee80211_send_beacon(struct ieee80211_device *ieee)
318{
319 struct sk_buff *skb;
320
321 skb = ieee80211_get_beacon_(ieee);
322
323 if (skb) {
324 softmac_mgmt_xmit(skb, ieee);
325 ieee->softmac_stats.tx_beacons++;
326 dev_kfree_skb_any(skb);
327 }
328
329 ieee->beacon_timer.expires = jiffies +
330 (MSECS(ieee->current_network.beacon_interval - 5));
331
332 if (ieee->beacon_txing)
333 add_timer(&ieee->beacon_timer);
334}
335
336
337static void ieee80211_send_beacon_cb(unsigned long _ieee)
338{
339 struct ieee80211_device *ieee =
340 (struct ieee80211_device *) _ieee;
341 unsigned long flags;
342
343 spin_lock_irqsave(&ieee->beacon_lock, flags);
344 ieee80211_send_beacon(ieee);
345 spin_unlock_irqrestore(&ieee->beacon_lock, flags);
346}
347
348static void ieee80211_send_probe(struct ieee80211_device *ieee)
349{
350 struct sk_buff *skb;
351
352 skb = ieee80211_probe_req(ieee);
353 if (skb) {
354 softmac_mgmt_xmit(skb, ieee);
355 ieee->softmac_stats.tx_probe_rq++;
356 }
357}
358
359static void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
360{
361 if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)) {
362 ieee80211_send_probe(ieee);
363 ieee80211_send_probe(ieee);
364 }
365}
366
367/* this performs syncro scan blocking the caller until all channels
368 * in the allowed channel map has been checked.
369 */
370static void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
371{
372 short ch = 0;
373 u8 channel_map[MAX_CHANNEL_NUMBER+1];
374 memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
375 down(&ieee->scan_sem);
376
377 while (1) {
378 do {
379 ch++;
380 if (ch > MAX_CHANNEL_NUMBER)
381 goto out; /* scan completed */
382
383 } while (!channel_map[ch]);
384 /* this function can be called in two situations
385 * 1- We have switched to ad-hoc mode and we are
386 * performing a complete syncro scan before conclude
387 * there are no interesting cell and to create a
388 * new one. In this case the link state is
389 * IEEE80211_NOLINK until we found an interesting cell.
390 * If so the ieee8021_new_net, called by the RX path
391 * will set the state to IEEE80211_LINKED, so we stop
392 * scanning
393 * 2- We are linked and the root uses run iwlist scan.
394 * So we switch to IEEE80211_LINKED_SCANNING to remember
395 * that we are still logically linked (not interested in
396 * new network events, despite for updating the net list,
397 * but we are temporarily 'unlinked' as the driver shall
398 * not filter RX frames and the channel is changing.
399 * So the only situation in witch are interested is to check
400 * if the state become LINKED because of the #1 situation
401 */
402
403 if (ieee->state == IEEE80211_LINKED)
404 goto out;
405
406 ieee->set_chan(ieee->dev, ch);
407 if (channel_map[ch] == 1)
408 ieee80211_send_probe_requests(ieee);
409
410 /* this prevent excessive time wait when we
411 * need to wait for a syncro scan to end..
412 */
413 if (ieee->sync_scan_hurryup)
414 goto out;
415
416 msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
417 }
418out:
419 ieee->sync_scan_hurryup = 0;
420 up(&ieee->scan_sem);
421 if (IS_DOT11D_ENABLE(ieee))
422 DOT11D_ScanComplete(ieee);
423}
424
425void ieee80211_softmac_ips_scan_syncro(struct ieee80211_device *ieee)
426{
427 int ch;
428 unsigned int watch_dog = 0;
429 u8 channel_map[MAX_CHANNEL_NUMBER+1];
430 memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
431 down(&ieee->scan_sem);
432 ch = ieee->current_network.channel;
433
434 while (1) {
435 /* this function can be called in two situations
436 * 1- We have switched to ad-hoc mode and we are
437 * performing a complete syncro scan before conclude
438 * there are no interesting cell and to create a
439 * new one. In this case the link state is
440 * IEEE80211_NOLINK until we found an interesting cell.
441 * If so the ieee8021_new_net, called by the RX path
442 * will set the state to IEEE80211_LINKED, so we stop
443 * scanning
444 * 2- We are linked and the root uses run iwlist scan.
445 * So we switch to IEEE80211_LINKED_SCANNING to remember
446 * that we are still logically linked (not interested in
447 * new network events, despite for updating the net list,
448 * but we are temporarily 'unlinked' as the driver shall
449 * not filter RX frames and the channel is changing.
450 * So the only situation in witch are interested is to check
451 * if the state become LINKED because of the #1 situation
452 */
453 if (ieee->state == IEEE80211_LINKED)
454 goto out;
455
456 if (channel_map[ieee->current_network.channel] > 0)
457 ieee->set_chan(ieee->dev, ieee->current_network.channel);
458
459 if (channel_map[ieee->current_network.channel] == 1)
460 ieee80211_send_probe_requests(ieee);
461
462 msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
463
464 do {
465 if (watch_dog++ >= MAX_CHANNEL_NUMBER)
466 goto out; /* scan completed */
467
468 ieee->current_network.channel = (ieee->current_network.channel + 1)%MAX_CHANNEL_NUMBER;
469 } while (!channel_map[ieee->current_network.channel]);
470 }
471out:
472 ieee->actscanning = false;
473 up(&ieee->scan_sem);
474 if (IS_DOT11D_ENABLE(ieee))
475 DOT11D_ScanComplete(ieee);
476}
477
478static void ieee80211_softmac_scan_wq(struct work_struct *work)
479{
480 struct delayed_work *dwork = to_delayed_work(work);
481 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
482 static short watchdog;
483 u8 channel_map[MAX_CHANNEL_NUMBER+1];
484 memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
485 down(&ieee->scan_sem);
486
487 do {
488 ieee->current_network.channel =
489 (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
490 if (watchdog++ > MAX_CHANNEL_NUMBER)
491 goto out; /* no good chans */
492 } while (!channel_map[ieee->current_network.channel]);
493
494 if (ieee->scanning == 0) {
495 printk("error out, scanning = 0\n");
496 goto out;
497 }
498 ieee->set_chan(ieee->dev, ieee->current_network.channel);
499 if (channel_map[ieee->current_network.channel] == 1)
500 ieee80211_send_probe_requests(ieee);
501
502 queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
503 up(&ieee->scan_sem);
504 return;
505out:
506 ieee->actscanning = false;
507 watchdog = 0;
508 ieee->scanning = 0;
509 up(&ieee->scan_sem);
510
511 if (IS_DOT11D_ENABLE(ieee))
512 DOT11D_ScanComplete(ieee);
513 return;
514}
515
516static void ieee80211_beacons_start(struct ieee80211_device *ieee)
517{
518 unsigned long flags;
519
520 spin_lock_irqsave(&ieee->beacon_lock, flags);
521
522 ieee->beacon_txing = 1;
523 ieee80211_send_beacon(ieee);
524
525 spin_unlock_irqrestore(&ieee->beacon_lock, flags);
526}
527
528static void ieee80211_beacons_stop(struct ieee80211_device *ieee)
529{
530 unsigned long flags;
531
532 spin_lock_irqsave(&ieee->beacon_lock, flags);
533
534 ieee->beacon_txing = 0;
535 del_timer_sync(&ieee->beacon_timer);
536
537 spin_unlock_irqrestore(&ieee->beacon_lock, flags);
538}
539
540void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
541{
542 if (ieee->stop_send_beacons)
543 ieee->stop_send_beacons(ieee->dev);
544 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
545 ieee80211_beacons_stop(ieee);
546}
547
548void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
549{
550 if (ieee->start_send_beacons)
551 ieee->start_send_beacons(ieee->dev);
552 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
553 ieee80211_beacons_start(ieee);
554}
555
556static void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
557{
558 down(&ieee->scan_sem);
559
560 if (ieee->scanning == 1) {
561 ieee->scanning = 0;
562 cancel_delayed_work(&ieee->softmac_scan_wq);
563 }
564
565 up(&ieee->scan_sem);
566}
567
568void ieee80211_stop_scan(struct ieee80211_device *ieee)
569{
570 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
571 ieee80211_softmac_stop_scan(ieee);
572 else
573 ieee->stop_scan(ieee->dev);
574}
575
576/* called with ieee->lock held */
577void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
578{
579 if (IS_DOT11D_ENABLE(ieee)) {
580 if (IS_COUNTRY_IE_VALID(ieee))
581 RESET_CIE_WATCHDOG(ieee);
582 }
583
584 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN) {
585 if (ieee->scanning == 0) {
586 ieee->scanning = 1;
587#if 1
588 queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, 0);
589#endif
590 }
591 }else
592 ieee->start_scan(ieee->dev);
593}
594
595/* called with wx_sem held */
596void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
597{
598 if (IS_DOT11D_ENABLE(ieee)) {
599 if (IS_COUNTRY_IE_VALID(ieee))
600 RESET_CIE_WATCHDOG(ieee);
601 }
602 ieee->sync_scan_hurryup = 0;
603
604 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
605 ieee80211_softmac_scan_syncro(ieee);
606 else
607 ieee->scan_syncro(ieee->dev);
608}
609
610inline struct sk_buff *
611ieee80211_authentication_req(struct ieee80211_network *beacon,
612 struct ieee80211_device *ieee, int challengelen)
613{
614 struct sk_buff *skb;
615 struct ieee80211_authentication *auth;
616
617 skb = dev_alloc_skb(sizeof(struct ieee80211_authentication) + challengelen);
618
619 if (!skb)
620 return NULL;
621
622 auth = (struct ieee80211_authentication *)
623 skb_put(skb, sizeof(struct ieee80211_authentication));
624
625 auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
626 if (challengelen)
627 auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
628
629 auth->header.duration_id = 0x013a; /* FIXME */
630
631 memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
632 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
633 memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
634
635 auth->algorithm = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
636
637 auth->transaction = cpu_to_le16(ieee->associate_seq);
638 ieee->associate_seq++;
639
640 auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
641
642 return skb;
643}
644
645static struct sk_buff *ieee80211_probe_resp(struct ieee80211_device *ieee,
646 u8 *dest)
647{
648 u8 *tag;
649 int beacon_size;
650 struct ieee80211_probe_response *beacon_buf;
651 struct sk_buff *skb;
652 int encrypt;
653 int atim_len, erp_len;
654 struct ieee80211_crypt_data *crypt;
655
656 char *ssid = ieee->current_network.ssid;
657 int ssid_len = ieee->current_network.ssid_len;
658 int rate_len = ieee->current_network.rates_len+2;
659 int rate_ex_len = ieee->current_network.rates_ex_len;
660 int wpa_ie_len = ieee->wpa_ie_len;
661 if (rate_ex_len > 0)
662 rate_ex_len += 2;
663
664 if (ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
665 atim_len = 4;
666 else
667 atim_len = 0;
668
669 if (ieee80211_is_54g(&ieee->current_network))
670 erp_len = 3;
671 else
672 erp_len = 0;
673
674 beacon_size = sizeof(struct ieee80211_probe_response)+
675 ssid_len
676 +3 /* channel */
677 +rate_len
678 +rate_ex_len
679 +atim_len
680 +wpa_ie_len
681 +erp_len;
682
683 skb = dev_alloc_skb(beacon_size);
684
685 if (!skb)
686 return NULL;
687
688 beacon_buf = (struct ieee80211_probe_response *) skb_put(skb, beacon_size);
689
690 memcpy(beacon_buf->header.addr1, dest, ETH_ALEN);
691 memcpy(beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
692 memcpy(beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
693
694 beacon_buf->header.duration_id = 0; /* FIXME */
695 beacon_buf->beacon_interval =
696 cpu_to_le16(ieee->current_network.beacon_interval);
697 beacon_buf->capability =
698 cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
699
700 if (ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
701 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
702
703 crypt = ieee->crypt[ieee->tx_keyidx];
704
705 encrypt = ieee->host_encrypt && crypt && crypt->ops &&
706 ((0 == strcmp(crypt->ops->name, "WEP")) || wpa_ie_len);
707
708 if (encrypt)
709 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
710
711
712 beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
713
714 beacon_buf->info_element.id = MFIE_TYPE_SSID;
715 beacon_buf->info_element.len = ssid_len;
716
717 tag = (u8 *) beacon_buf->info_element.data;
718
719 memcpy(tag, ssid, ssid_len);
720
721 tag += ssid_len;
722
723 *(tag++) = MFIE_TYPE_RATES;
724 *(tag++) = rate_len - 2;
725 memcpy(tag, ieee->current_network.rates, rate_len-2);
726 tag += rate_len - 2;
727
728 *(tag++) = MFIE_TYPE_DS_SET;
729 *(tag++) = 1;
730 *(tag++) = ieee->current_network.channel;
731
732 if (atim_len) {
733 *(tag++) = MFIE_TYPE_IBSS_SET;
734 *(tag++) = 2;
735 *((u16 *)(tag)) = cpu_to_le16(ieee->current_network.atim_window);
736 tag += 2;
737 }
738
739 if (erp_len) {
740 *(tag++) = MFIE_TYPE_ERP;
741 *(tag++) = 1;
742 *(tag++) = 0;
743 }
744
745 if (rate_ex_len) {
746 *(tag++) = MFIE_TYPE_RATES_EX;
747 *(tag++) = rate_ex_len-2;
748 memcpy(tag, ieee->current_network.rates_ex, rate_ex_len-2);
749 tag += rate_ex_len - 2;
750 }
751
752 if (wpa_ie_len) {
753 if (ieee->iw_mode == IW_MODE_ADHOC) {
754 /* as Windows will set pairwise key same as the group
755 * key which is not allowed in Linux, so set this for
756 * IOT issue.
757 */
758 memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
759 }
760
761 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
762 }
763 skb->dev = ieee->dev;
764 return skb;
765}
766
767static struct sk_buff *ieee80211_assoc_resp(struct ieee80211_device *ieee,
768 u8 *dest)
769{
770 struct sk_buff *skb;
771 u8 *tag;
772
773 struct ieee80211_crypt_data *crypt;
774 struct ieee80211_assoc_response_frame *assoc;
775 short encrypt;
776
777 unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
778 int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
779
780 skb = dev_alloc_skb(len);
781
782 if (!skb)
783 return NULL;
784
785 assoc = (struct ieee80211_assoc_response_frame *)
786 skb_put(skb, sizeof(struct ieee80211_assoc_response_frame));
787
788 assoc->header.frame_control = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
789 memcpy(assoc->header.addr1, dest, ETH_ALEN);
790 memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
791 memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
792 assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
793 WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
794
795 if (ieee->short_slot)
796 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
797
798 if (ieee->host_encrypt)
799 crypt = ieee->crypt[ieee->tx_keyidx];
800 else
801 crypt = NULL;
802
803 encrypt = (crypt && crypt->ops);
804
805 if (encrypt)
806 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
807
808 assoc->status = 0;
809 assoc->aid = cpu_to_le16(ieee->assoc_id);
810 if (ieee->assoc_id == 0x2007)
811 ieee->assoc_id = 0;
812 else
813 ieee->assoc_id++;
814
815 tag = (u8 *) skb_put(skb, rate_len);
816
817 ieee80211_MFIE_Brate(ieee, &tag);
818 ieee80211_MFIE_Grate(ieee, &tag);
819
820 return skb;
821}
822
823static struct sk_buff *ieee80211_auth_resp(struct ieee80211_device *ieee,
824 int status, u8 *dest)
825{
826 struct sk_buff *skb;
827 struct ieee80211_authentication *auth;
828
829 skb = dev_alloc_skb(sizeof(struct ieee80211_authentication)+1);
830
831 if (!skb)
832 return NULL;
833
834 skb->len = sizeof(struct ieee80211_authentication);
835
836 auth = (struct ieee80211_authentication *)skb->data;
837
838 auth->status = cpu_to_le16(status);
839 auth->transaction = cpu_to_le16(2);
840 auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
841
842 memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
843 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
844 memcpy(auth->header.addr1, dest, ETH_ALEN);
845 auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH);
846 return skb;
847}
848
849static struct sk_buff *ieee80211_null_func(struct ieee80211_device *ieee, short pwr)
850{
851 struct sk_buff *skb;
852 struct ieee80211_hdr_3addr *hdr;
853
854 skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr));
855
856 if (!skb)
857 return NULL;
858
859 hdr = (struct ieee80211_hdr_3addr *)skb_put(skb, sizeof(struct ieee80211_hdr_3addr));
860
861 memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
862 memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
863 memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
864
865 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
866 IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS |
867 (pwr ? IEEE80211_FCTL_PM:0));
868
869 return skb;
870}
871
872static void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8 *dest)
873{
874 struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
875
876 if (buf) {
877 softmac_mgmt_xmit(buf, ieee);
878 dev_kfree_skb_any(buf);
879 }
880}
881
882static void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8 *dest)
883{
884 struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
885
886 if (buf) {
887 softmac_mgmt_xmit(buf, ieee);
888 dev_kfree_skb_any(buf);
889 }
890}
891
892static void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
893{
894 struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
895
896 if (buf) {
897 softmac_mgmt_xmit(buf, ieee);
898 dev_kfree_skb_any(buf);
899 }
900}
901
902inline struct sk_buff *
903ieee80211_association_req(struct ieee80211_network *beacon,
904 struct ieee80211_device *ieee)
905{
906 struct sk_buff *skb;
907
908 struct ieee80211_assoc_request_frame *hdr;
909 u8 *tag;
910 unsigned int wpa_len = beacon->wpa_ie_len;
911#if 1
912 /* for testing purpose */
913 unsigned int rsn_len = beacon->rsn_ie_len;
914#endif
915 unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
916 unsigned int wmm_info_len = beacon->QoS_Enable?9:0;
917 unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
918
919 u8 encry_proto = ieee->wpax_type_notify & 0xff;
920
921 int len = 0;
922
923 /* [0] Notify type of encryption: WPA/WPA2
924 * [1] pair wise type
925 * [2] authen type
926 */
927 if (ieee->wpax_type_set) {
928 if (IEEE_PROTO_WPA == encry_proto) {
929 rsn_len = 0;
930 } else if (IEEE_PROTO_RSN == encry_proto) {
931 wpa_len = 0;
932 }
933 }
934 len = sizeof(struct ieee80211_assoc_request_frame)+
935 + beacon->ssid_len /* essid tagged val */
936 + rate_len /* rates tagged val */
937 + wpa_len
938 + rsn_len
939 + wmm_info_len
940 + turbo_info_len;
941
942 skb = dev_alloc_skb(len);
943
944 if (!skb)
945 return NULL;
946
947 hdr = (struct ieee80211_assoc_request_frame *)
948 skb_put(skb, sizeof(struct ieee80211_assoc_request_frame));
949
950 hdr->header.frame_control = IEEE80211_STYPE_ASSOC_REQ;
951 hdr->header.duration_id = 37; /* FIXME */
952 memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
953 memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
954 memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
955 memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN); /* for HW security */
956
957 hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
958 if (beacon->capability & WLAN_CAPABILITY_PRIVACY)
959 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
960 if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
961 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
962
963 if (ieee->short_slot)
964 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
965
966 hdr->listen_interval = 0xa; /* FIXME */
967
968 hdr->info_element.id = MFIE_TYPE_SSID;
969
970 hdr->info_element.len = beacon->ssid_len;
971 tag = skb_put(skb, beacon->ssid_len);
972 memcpy(tag, beacon->ssid, beacon->ssid_len);
973
974 tag = skb_put(skb, rate_len);
975
976 ieee80211_MFIE_Brate(ieee, &tag);
977 ieee80211_MFIE_Grate(ieee, &tag);
978
979 /* add rsn==0 condition for ap's mix security mode(wpa+wpa2)
980 * choose AES encryption as default algorithm while using mixed mode.
981 */
982
983 tag = skb_put(skb, ieee->wpa_ie_len);
984 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
985
986 tag = skb_put(skb, wmm_info_len);
987 if (wmm_info_len)
988 ieee80211_WMM_Info(ieee, &tag);
989
990 tag = skb_put(skb, turbo_info_len);
991 if (turbo_info_len)
992 ieee80211_TURBO_Info(ieee, &tag);
993
994 return skb;
995}
996
997void ieee80211_associate_abort(struct ieee80211_device *ieee)
998{
999 unsigned long flags;
1000 spin_lock_irqsave(&ieee->lock, flags);
1001
1002 ieee->associate_seq++;
1003
1004 /* don't scan, and avoid to have the RX path possibly
1005 * try again to associate. Even do not react to AUTH or
1006 * ASSOC response. Just wait for the retry wq to be scheduled.
1007 * Here we will check if there are good nets to associate
1008 * with, so we retry or just get back to NO_LINK and scanning
1009 */
1010 if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING) {
1011 IEEE80211_DEBUG_MGMT("Authentication failed\n");
1012 ieee->softmac_stats.no_auth_rs++;
1013 } else {
1014 IEEE80211_DEBUG_MGMT("Association failed\n");
1015 ieee->softmac_stats.no_ass_rs++;
1016 }
1017
1018 ieee->state = IEEE80211_ASSOCIATING_RETRY;
1019
1020 queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
1021
1022 spin_unlock_irqrestore(&ieee->lock, flags);
1023}
1024
1025static void ieee80211_associate_abort_cb(unsigned long dev)
1026{
1027 ieee80211_associate_abort((struct ieee80211_device *) dev);
1028}
1029
1030static void ieee80211_associate_step1(struct ieee80211_device *ieee)
1031{
1032 struct ieee80211_network *beacon = &ieee->current_network;
1033 struct sk_buff *skb;
1034
1035 IEEE80211_DEBUG_MGMT("Stopping scan\n");
1036 ieee->softmac_stats.tx_auth_rq++;
1037 skb = ieee80211_authentication_req(beacon, ieee, 0);
1038 if (!skb) {
1039 ieee80211_associate_abort(ieee);
1040 } else {
1041 ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING;
1042 IEEE80211_DEBUG_MGMT("Sending authentication request\n");
1043 softmac_mgmt_xmit(skb, ieee);
1044 /* BUGON when you try to add_timer twice, using mod_timer may
1045 * be better.
1046 */
1047 if (!timer_pending(&ieee->associate_timer)) {
1048 ieee->associate_timer.expires = jiffies + (HZ / 2);
1049 add_timer(&ieee->associate_timer);
1050 }
1051 /* If call dev_kfree_skb_any,a warning will ocur....
1052 * KERNEL: assertion (!atomic_read(&skb->users)) failed at
1053 * net/core/dev.c (1708)
1054 */
1055 }
1056}
1057
1058static void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge,
1059 int chlen)
1060{
1061 u8 *c;
1062 struct sk_buff *skb;
1063 struct ieee80211_network *beacon = &ieee->current_network;
1064 del_timer_sync(&ieee->associate_timer);
1065 ieee->associate_seq++;
1066 ieee->softmac_stats.tx_auth_rq++;
1067
1068 skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
1069 if (!skb)
1070 ieee80211_associate_abort(ieee);
1071 else {
1072 c = skb_put(skb, chlen+2);
1073 *(c++) = MFIE_TYPE_CHALLENGE;
1074 *(c++) = chlen;
1075 memcpy(c, challenge, chlen);
1076
1077 IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
1078
1079 ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr));
1080
1081 softmac_mgmt_xmit(skb, ieee);
1082 if (!timer_pending(&ieee->associate_timer)) {
1083 ieee->associate_timer.expires = jiffies + (HZ / 2);
1084 add_timer(&ieee->associate_timer);
1085 }
1086 dev_kfree_skb_any(skb);
1087 }
1088 kfree(challenge);
1089}
1090
1091static void ieee80211_associate_step2(struct ieee80211_device *ieee)
1092{
1093 struct sk_buff *skb;
1094 struct ieee80211_network *beacon = &ieee->current_network;
1095
1096 del_timer_sync(&ieee->associate_timer);
1097
1098 IEEE80211_DEBUG_MGMT("Sending association request\n");
1099 ieee->softmac_stats.tx_ass_rq++;
1100 skb = ieee80211_association_req(beacon, ieee);
1101 if (!skb)
1102 ieee80211_associate_abort(ieee);
1103 else {
1104 softmac_mgmt_xmit(skb, ieee);
1105 if (!timer_pending(&ieee->associate_timer)) {
1106 ieee->associate_timer.expires = jiffies + (HZ / 2);
1107 add_timer(&ieee->associate_timer);
1108 }
1109 }
1110}
1111
1112static void ieee80211_associate_complete_wq(struct work_struct *work)
1113{
1114 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
1115
1116 printk(KERN_INFO "Associated successfully\n");
1117 if (ieee80211_is_54g(&ieee->current_network) &&
1118 (ieee->modulation & IEEE80211_OFDM_MODULATION)) {
1119 ieee->rate = 540;
1120 printk(KERN_INFO"Using G rates\n");
1121 } else {
1122 ieee->rate = 110;
1123 printk(KERN_INFO"Using B rates\n");
1124 }
1125 ieee->link_change(ieee->dev);
1126 notify_wx_assoc_event(ieee);
1127 if (ieee->data_hard_resume)
1128 ieee->data_hard_resume(ieee->dev);
1129 netif_carrier_on(ieee->dev);
1130}
1131
1132static void ieee80211_associate_complete(struct ieee80211_device *ieee)
1133{
1134 del_timer_sync(&ieee->associate_timer);
1135
1136 ieee->state = IEEE80211_LINKED;
1137 IEEE80211_DEBUG_MGMT("Successfully associated\n");
1138
1139 queue_work(ieee->wq, &ieee->associate_complete_wq);
1140}
1141
1142static void ieee80211_associate_procedure_wq(struct work_struct *work)
1143{
1144 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
1145
1146 ieee->sync_scan_hurryup = 1;
1147 down(&ieee->wx_sem);
1148
1149 if (ieee->data_hard_stop)
1150 ieee->data_hard_stop(ieee->dev);
1151
1152 ieee80211_stop_scan(ieee);
1153 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1154
1155 ieee->associate_seq = 1;
1156 ieee80211_associate_step1(ieee);
1157
1158 up(&ieee->wx_sem);
1159}
1160
1161inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee,
1162 struct ieee80211_network *net)
1163{
1164 u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
1165 int tmp_ssid_len = 0;
1166
1167 short apset, ssidset, ssidbroad, apmatch, ssidmatch;
1168
1169 /* we are interested in new new only if we are not associated
1170 * and we are not associating / authenticating
1171 */
1172 if (ieee->state != IEEE80211_NOLINK)
1173 return;
1174
1175 if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
1176 return;
1177
1178 if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
1179 return;
1180
1181 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
1182 /* if the user specified the AP MAC, we need also the essid
1183 * This could be obtained by beacons or, if the network does not
1184 * broadcast it, it can be put manually.
1185 */
1186 apset = ieee->wap_set;
1187 ssidset = ieee->ssid_set;
1188 ssidbroad = !(net->ssid_len == 0 || net->ssid[0] == '\0');
1189 apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN) == 0);
1190
1191 if (ieee->current_network.ssid_len != net->ssid_len)
1192 ssidmatch = 0;
1193 else
1194 ssidmatch = (0 == strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
1195
1196 /* if the user set the AP check if match.
1197 * if the network does not broadcast essid we check the user
1198 * supplied ANY essid
1199 * if the network does broadcast and the user does not set essid
1200 * it is OK
1201 * if the network does broadcast and the user did set essid
1202 * chech if essid match
1203 * (apset && apmatch && ((ssidset && ssidbroad && ssidmatch) ||
1204 * (ssidbroad && !ssidset) || (!ssidbroad && ssidset))) ||
1205 * if the ap is not set, check that the user set the bssid and
1206 * the network does broadcast and that those two bssid matches
1207 * (!apset && ssidset && ssidbroad && ssidmatch)
1208 */
1209 if ((apset && apmatch && ((ssidset && ssidbroad && ssidmatch) ||
1210 (ssidbroad && !ssidset) || (!ssidbroad && ssidset))) ||
1211 (!apset && ssidset && ssidbroad && ssidmatch)) {
1212 /* if the essid is hidden replace it with the
1213 * essid provided by the user.
1214 */
1215 if (!ssidbroad) {
1216 strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
1217 tmp_ssid_len = ieee->current_network.ssid_len;
1218 }
1219 memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
1220
1221 if (!ssidbroad) {
1222 strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
1223 ieee->current_network.ssid_len = tmp_ssid_len;
1224 }
1225 printk(KERN_INFO"Linking with %s: channel is %d\n", ieee->current_network.ssid, ieee->current_network.channel);
1226
1227 if (ieee->iw_mode == IW_MODE_INFRA) {
1228 ieee->state = IEEE80211_ASSOCIATING;
1229 ieee->beinretry = false;
1230 queue_work(ieee->wq, &ieee->associate_procedure_wq);
1231 } else {
1232 if (ieee80211_is_54g(&ieee->current_network) &&
1233 (ieee->modulation & IEEE80211_OFDM_MODULATION)) {
1234 ieee->rate = 540;
1235 printk(KERN_INFO"Using G rates\n");
1236 } else {
1237 ieee->rate = 110;
1238 printk(KERN_INFO"Using B rates\n");
1239 }
1240 ieee->state = IEEE80211_LINKED;
1241 ieee->beinretry = false;
1242 }
1243 }
1244 }
1245}
1246
1247void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
1248{
1249 unsigned long flags;
1250 struct ieee80211_network *target;
1251
1252 spin_lock_irqsave(&ieee->lock, flags);
1253 list_for_each_entry(target, &ieee->network_list, list) {
1254 /* if the state become different that NOLINK means
1255 * we had found what we are searching for
1256 */
1257 if (ieee->state != IEEE80211_NOLINK)
1258 break;
1259
1260 if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
1261 ieee80211_softmac_new_net(ieee, target);
1262 }
1263 spin_unlock_irqrestore(&ieee->lock, flags);
1264}
1265
1266static inline u16 auth_parse(struct sk_buff *skb, u8 **challenge, int *chlen)
1267{
1268 struct ieee80211_authentication *a;
1269 u8 *t;
1270 if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
1271 IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
1272 return 0xcafe;
1273 }
1274 *challenge = NULL;
1275 a = (struct ieee80211_authentication *) skb->data;
1276 if (skb->len > (sizeof(struct ieee80211_authentication) + 3)) {
1277 t = skb->data + sizeof(struct ieee80211_authentication);
1278
1279 if (*(t++) == MFIE_TYPE_CHALLENGE) {
1280 *chlen = *(t++);
1281 *challenge = kmemdup(t, *chlen, GFP_ATOMIC);
1282 if (!*challenge)
1283 return -ENOMEM;
1284 }
1285 }
1286 return cpu_to_le16(a->status);
1287}
1288
1289static int auth_rq_parse(struct sk_buff *skb, u8 *dest)
1290{
1291 struct ieee80211_authentication *a;
1292
1293 if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
1294 IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n", skb->len);
1295 return -1;
1296 }
1297 a = (struct ieee80211_authentication *) skb->data;
1298
1299 memcpy(dest, a->header.addr2, ETH_ALEN);
1300
1301 if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
1302 return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
1303
1304 return WLAN_STATUS_SUCCESS;
1305}
1306
1307static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb,
1308 u8 *src)
1309{
1310 u8 *tag;
1311 u8 *skbend;
1312 u8 *ssid = NULL;
1313 u8 ssidlen = 0;
1314
1315 struct ieee80211_hdr_3addr *header =
1316 (struct ieee80211_hdr_3addr *) skb->data;
1317
1318 if (skb->len < sizeof(struct ieee80211_hdr_3addr))
1319 return -1; /* corrupted */
1320
1321 memcpy(src, header->addr2, ETH_ALEN);
1322
1323 skbend = (u8 *)skb->data + skb->len;
1324
1325 tag = skb->data + sizeof(struct ieee80211_hdr_3addr);
1326
1327 while (tag+1 < skbend) {
1328 if (*tag == 0) {
1329 ssid = tag+2;
1330 ssidlen = *(tag+1);
1331 break;
1332 }
1333 tag++; /* point to the len field */
1334 tag = tag + *(tag); /* point to the last data byte of the tag */
1335 tag++; /* point to the next tag */
1336 }
1337
1338 if (ssidlen == 0)
1339 return 1;
1340
1341 if (!ssid)
1342 return 1; /* ssid not found in tagged param */
1343
1344 return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
1345
1346}
1347
1348static int assoc_rq_parse(struct sk_buff *skb, u8 *dest)
1349{
1350 struct ieee80211_assoc_request_frame *a;
1351
1352 if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) -
1353 sizeof(struct ieee80211_info_element))) {
1354
1355 IEEE80211_DEBUG_MGMT("invalid len in auth request:%d\n", skb->len);
1356 return -1;
1357 }
1358
1359 a = (struct ieee80211_assoc_request_frame *) skb->data;
1360
1361 memcpy(dest, a->header.addr2, ETH_ALEN);
1362
1363 return 0;
1364}
1365
1366static inline u16 assoc_parse(struct sk_buff *skb, int *aid)
1367{
1368 struct ieee80211_assoc_response_frame *a;
1369 if (skb->len < sizeof(struct ieee80211_assoc_response_frame)) {
1370 IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
1371 return 0xcafe;
1372 }
1373
1374 a = (struct ieee80211_assoc_response_frame *) skb->data;
1375 *aid = le16_to_cpu(a->aid) & 0x3fff;
1376 return le16_to_cpu(a->status);
1377}
1378
1379static inline void ieee80211_rx_probe_rq(struct ieee80211_device *ieee,
1380 struct sk_buff *skb)
1381{
1382 u8 dest[ETH_ALEN];
1383
1384 ieee->softmac_stats.rx_probe_rq++;
1385 if (probe_rq_parse(ieee, skb, dest)) {
1386 ieee->softmac_stats.tx_probe_rs++;
1387 ieee80211_resp_to_probe(ieee, dest);
1388 }
1389}
1390
1391inline void ieee80211_rx_auth_rq(struct ieee80211_device *ieee,
1392 struct sk_buff *skb)
1393{
1394 u8 dest[ETH_ALEN];
1395 int status;
1396 ieee->softmac_stats.rx_auth_rq++;
1397
1398 status = auth_rq_parse(skb, dest);
1399 if (status != -1)
1400 ieee80211_resp_to_auth(ieee, status, dest);
1401}
1402
1403inline void
1404ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1405{
1406
1407 u8 dest[ETH_ALEN];
1408
1409 ieee->softmac_stats.rx_ass_rq++;
1410 if (assoc_rq_parse(skb, dest) != -1)
1411 ieee80211_resp_to_assoc_rq(ieee, dest);
1412
1413
1414 printk(KERN_INFO"New client associated: %pM\n", dest);
1415}
1416
1417void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
1418{
1419 struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
1420
1421 if (buf)
1422 softmac_ps_mgmt_xmit(buf, ieee);
1423}
1424
1425static short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h,
1426 u32 *time_l)
1427{
1428 int timeout = 0;
1429
1430 u8 dtim;
1431 dtim = ieee->current_network.dtim_data;
1432
1433 if (!(dtim & IEEE80211_DTIM_VALID))
1434 return 0;
1435 else
1436 timeout = ieee->current_network.beacon_interval;
1437
1438 ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
1439
1440 if (dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST) & ieee->ps))
1441 return 2;
1442
1443 if (!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
1444 return 0;
1445
1446 if (!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
1447 return 0;
1448
1449 if ((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) &&
1450 (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
1451 return 0;
1452
1453 if (time_l) {
1454 *time_l = ieee->current_network.last_dtim_sta_time[0]
1455 + MSECS((ieee->current_network.beacon_interval));
1456 }
1457
1458 if (time_h) {
1459 *time_h = ieee->current_network.last_dtim_sta_time[1];
1460 if (time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
1461 *time_h += 1;
1462 }
1463
1464 return 1;
1465}
1466
1467static inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
1468{
1469
1470 u32 th, tl;
1471 short sleep;
1472
1473 unsigned long flags, flags2;
1474
1475 spin_lock_irqsave(&ieee->lock, flags);
1476
1477 if ((ieee->ps == IEEE80211_PS_DISABLED ||
1478 ieee->iw_mode != IW_MODE_INFRA ||
1479 ieee->state != IEEE80211_LINKED)) {
1480
1481 /* #warning CHECK_LOCK_HERE */
1482 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
1483
1484 ieee80211_sta_wakeup(ieee, 1);
1485
1486 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
1487 }
1488
1489 sleep = ieee80211_sta_ps_sleep(ieee, &th, &tl);
1490 /* 2 wake, 1 sleep, 0 do nothing */
1491 if (sleep == 0)
1492 goto out;
1493
1494 if (sleep == 1) {
1495 if (ieee->sta_sleep == 1)
1496 ieee->enter_sleep_state(ieee->dev, th, tl);
1497
1498 else if (ieee->sta_sleep == 0) {
1499 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
1500 if (ieee->ps_is_queue_empty(ieee->dev)) {
1501 ieee->sta_sleep = 2;
1502
1503 ieee->ps_request_tx_ack(ieee->dev);
1504
1505 ieee80211_sta_ps_send_null_frame(ieee, 1);
1506
1507 ieee->ps_th = th;
1508 ieee->ps_tl = tl;
1509 }
1510 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
1511 }
1512 } else if (sleep == 2) {
1513 /* #warning CHECK_LOCK_HERE */
1514 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
1515
1516 ieee80211_sta_wakeup(ieee, 1);
1517
1518 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
1519 }
1520out:
1521 spin_unlock_irqrestore(&ieee->lock, flags);
1522}
1523
1524void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
1525{
1526 if (ieee->sta_sleep == 0) {
1527 if (nl) {
1528 ieee->ps_request_tx_ack(ieee->dev);
1529 ieee80211_sta_ps_send_null_frame(ieee, 0);
1530 }
1531 return;
1532 }
1533
1534 if (ieee->sta_sleep == 1)
1535 ieee->sta_wake_up(ieee->dev);
1536
1537 ieee->sta_sleep = 0;
1538
1539 if (nl) {
1540 ieee->ps_request_tx_ack(ieee->dev);
1541 ieee80211_sta_ps_send_null_frame(ieee, 0);
1542 }
1543}
1544
1545void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
1546{
1547 unsigned long flags, flags2;
1548
1549 spin_lock_irqsave(&ieee->lock, flags);
1550 if (ieee->sta_sleep == 2) {
1551 /* Null frame with PS bit set */
1552 if (success) {
1553 ieee->sta_sleep = 1;
1554 ieee->enter_sleep_state(ieee->dev, ieee->ps_th, ieee->ps_tl);
1555 }
1556 /* if the card report not success we can't be sure the AP
1557 * has not RXed so we can't assume the AP believe us awake
1558 */
1559 } else {
1560 if ((ieee->sta_sleep == 0) && !success) {
1561 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
1562 ieee80211_sta_ps_send_null_frame(ieee, 0);
1563 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
1564 }
1565 }
1566 spin_unlock_irqrestore(&ieee->lock, flags);
1567}
1568
1569inline int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee,
1570 struct sk_buff *skb,
1571 struct ieee80211_rx_stats *rx_stats,
1572 u16 type, u16 stype)
1573{
1574 struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
1575 u16 errcode;
1576 u8 *challenge = NULL;
1577 int chlen = 0;
1578 int aid = 0;
1579 struct ieee80211_assoc_response_frame *assoc_resp;
1580 struct ieee80211_info_element *info_element;
1581
1582 if (!ieee->proto_started)
1583 return 0;
1584
1585 if (ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
1586 ieee->iw_mode == IW_MODE_INFRA &&
1587 ieee->state == IEEE80211_LINKED))
1588
1589 tasklet_schedule(&ieee->ps_task);
1590
1591 if (WLAN_FC_GET_STYPE(header->frame_control) != IEEE80211_STYPE_PROBE_RESP &&
1592 WLAN_FC_GET_STYPE(header->frame_control) != IEEE80211_STYPE_BEACON)
1593 ieee->last_rx_ps_time = jiffies;
1594
1595 switch (WLAN_FC_GET_STYPE(header->frame_control)) {
1596 case IEEE80211_STYPE_ASSOC_RESP:
1597 case IEEE80211_STYPE_REASSOC_RESP:
1598 IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
1599 WLAN_FC_GET_STYPE(header->frame_ctl));
1600 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
1601 ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED &&
1602 ieee->iw_mode == IW_MODE_INFRA) {
1603 errcode = assoc_parse(skb, &aid);
1604 if (0 == errcode) {
1605 u16 left;
1606
1607 ieee->state = IEEE80211_LINKED;
1608 ieee->assoc_id = aid;
1609 ieee->softmac_stats.rx_ass_ok++;
1610 /* card type is 8187 */
1611 if (1 == rx_stats->nic_type)
1612 goto associate_complete;
1613
1614 assoc_resp = (struct ieee80211_assoc_response_frame *)skb->data;
1615 info_element = &assoc_resp->info_element;
1616 left = skb->len - ((void *)info_element - (void *)assoc_resp);
1617
1618 while (left >= sizeof(struct ieee80211_info_element_hdr)) {
1619 if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
1620 printk(KERN_WARNING "[re]associate response error!");
1621 return 1;
1622 }
1623 switch (info_element->id) {
1624 case MFIE_TYPE_GENERIC:
1625 IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n", info_element->len);
1626 if (info_element->len >= 8 &&
1627 info_element->data[0] == 0x00 &&
1628 info_element->data[1] == 0x50 &&
1629 info_element->data[2] == 0xf2 &&
1630 info_element->data[3] == 0x02 &&
1631 info_element->data[4] == 0x01) {
1632 /* Not care about version at present.
1633 * WMM Parameter Element.
1634 */
1635 memcpy(ieee->current_network.wmm_param, (u8 *)(info_element->data\
1636 + 8), (info_element->len - 8));
1637
1638 if (((ieee->current_network.wmm_info^info_element->data[6])& \
1639 0x0f) || (!ieee->init_wmmparam_flag)) {
1640 /* refresh parameter element for current network
1641 * update the register parameter for hardware.
1642 */
1643 ieee->init_wmmparam_flag = 1;
1644 queue_work(ieee->wq, &ieee->wmm_param_update_wq);
1645 }
1646 /* update info_element for current network */
1647 ieee->current_network.wmm_info = info_element->data[6];
1648 }
1649 break;
1650 default:
1651 /* nothing to do at present!!! */
1652 break;
1653 }
1654
1655 left -= sizeof(struct ieee80211_info_element_hdr) +
1656 info_element->len;
1657 info_element = (struct ieee80211_info_element *)
1658 &info_element->data[info_element->len];
1659 }
1660 /* legacy AP, reset the AC_xx_param register */
1661 if (!ieee->init_wmmparam_flag) {
1662 queue_work(ieee->wq, &ieee->wmm_param_update_wq);
1663 ieee->init_wmmparam_flag = 1; /* indicate AC_xx_param upated since last associate */
1664 }
1665associate_complete:
1666 ieee80211_associate_complete(ieee);
1667 } else {
1668 ieee->softmac_stats.rx_ass_err++;
1669 IEEE80211_DEBUG_MGMT(
1670 "Association response status code 0x%x\n",
1671 errcode);
1672 ieee80211_associate_abort(ieee);
1673 }
1674 }
1675 break;
1676 case IEEE80211_STYPE_ASSOC_REQ:
1677 case IEEE80211_STYPE_REASSOC_REQ:
1678 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
1679 ieee->iw_mode == IW_MODE_MASTER)
1680
1681 ieee80211_rx_assoc_rq(ieee, skb);
1682 break;
1683 case IEEE80211_STYPE_AUTH:
1684 if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) {
1685 if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
1686 ieee->iw_mode == IW_MODE_INFRA){
1687 IEEE80211_DEBUG_MGMT("Received authentication response");
1688
1689 errcode = auth_parse(skb, &challenge, &chlen);
1690 if (0 == errcode) {
1691 if (ieee->open_wep || !challenge) {
1692 ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
1693 ieee->softmac_stats.rx_auth_rs_ok++;
1694
1695 ieee80211_associate_step2(ieee);
1696 } else {
1697 ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
1698 }
1699 } else {
1700 ieee->softmac_stats.rx_auth_rs_err++;
1701 IEEE80211_DEBUG_MGMT("Authentication response status code 0x%x", errcode);
1702 ieee80211_associate_abort(ieee);
1703 }
1704
1705 } else if (ieee->iw_mode == IW_MODE_MASTER) {
1706 ieee80211_rx_auth_rq(ieee, skb);
1707 }
1708 }
1709 break;
1710 case IEEE80211_STYPE_PROBE_REQ:
1711 if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
1712 ((ieee->iw_mode == IW_MODE_ADHOC ||
1713 ieee->iw_mode == IW_MODE_MASTER) &&
1714 ieee->state == IEEE80211_LINKED))
1715
1716 ieee80211_rx_probe_rq(ieee, skb);
1717 break;
1718 case IEEE80211_STYPE_DISASSOC:
1719 case IEEE80211_STYPE_DEAUTH:
1720 /* FIXME for now repeat all the association procedure
1721 * both for disassociation and deauthentication
1722 */
1723 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
1724 (ieee->state == IEEE80211_LINKED) &&
1725 (ieee->iw_mode == IW_MODE_INFRA) &&
1726 (!memcmp(header->addr2, ieee->current_network.bssid, ETH_ALEN))) {
1727 ieee->state = IEEE80211_ASSOCIATING;
1728 ieee->softmac_stats.reassoc++;
1729
1730 queue_work(ieee->wq, &ieee->associate_procedure_wq);
1731 }
1732 break;
1733 default:
1734 return -1;
1735 break;
1736 }
1737 return 0;
1738}
1739
1740/* following are for a simpler TX queue management.
1741 * Instead of using netif_[stop/wake]_queue the driver
1742 * will uses these two function (plus a reset one), that
1743 * will internally uses the kernel netif_* and takes
1744 * care of the ieee802.11 fragmentation.
1745 * So the driver receives a fragment per time and might
1746 * call the stop function when it want without take care
1747 * to have enough room to TX an entire packet.
1748 * This might be useful if each fragment need it's own
1749 * descriptor, thus just keep a total free memory > than
1750 * the max fragmentation threshold is not enough.. If the
1751 * ieee802.11 stack passed a TXB struct then you needed
1752 * to keep N free descriptors where
1753 * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
1754 * In this way you need just one and the 802.11 stack
1755 * will take care of buffering fragments and pass them to
1756 * to the driver later, when it wakes the queue.
1757 */
1758
1759void ieee80211_softmac_xmit(struct ieee80211_txb *txb,
1760 struct ieee80211_device *ieee)
1761{
1762 unsigned long flags;
1763 int i;
1764
1765 spin_lock_irqsave(&ieee->lock, flags);
1766
1767 /* called with 2nd parm 0, no tx mgmt lock required */
1768 ieee80211_sta_wakeup(ieee, 0);
1769
1770 for (i = 0; i < txb->nr_frags; i++) {
1771 if (ieee->queue_stop) {
1772 ieee->tx_pending.txb = txb;
1773 ieee->tx_pending.frag = i;
1774 goto exit;
1775 } else {
1776 ieee->softmac_data_hard_start_xmit(
1777 txb->fragments[i],
1778 ieee->dev, ieee->rate);
1779 ieee->stats.tx_packets++;
1780 ieee->stats.tx_bytes += txb->fragments[i]->len;
1781 ieee->dev->trans_start = jiffies;
1782 }
1783 }
1784
1785 ieee80211_txb_free(txb);
1786
1787 exit:
1788 spin_unlock_irqrestore(&ieee->lock, flags);
1789}
1790
1791/* called with ieee->lock acquired */
1792static void ieee80211_resume_tx(struct ieee80211_device *ieee)
1793{
1794 int i;
1795 for (i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
1796
1797 if (ieee->queue_stop) {
1798 ieee->tx_pending.frag = i;
1799 return;
1800 } else {
1801 ieee->softmac_data_hard_start_xmit(
1802 ieee->tx_pending.txb->fragments[i],
1803 ieee->dev, ieee->rate);
1804 ieee->stats.tx_packets++;
1805 ieee->dev->trans_start = jiffies;
1806 }
1807 }
1808
1809 ieee80211_txb_free(ieee->tx_pending.txb);
1810 ieee->tx_pending.txb = NULL;
1811}
1812
1813void ieee80211_reset_queue(struct ieee80211_device *ieee)
1814{
1815 unsigned long flags;
1816
1817 spin_lock_irqsave(&ieee->lock, flags);
1818 init_mgmt_queue(ieee);
1819 if (ieee->tx_pending.txb) {
1820 ieee80211_txb_free(ieee->tx_pending.txb);
1821 ieee->tx_pending.txb = NULL;
1822 }
1823 ieee->queue_stop = 0;
1824 spin_unlock_irqrestore(&ieee->lock, flags);
1825}
1826
1827void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
1828{
1829 unsigned long flags;
1830 struct sk_buff *skb;
1831 struct ieee80211_hdr_3addr *header;
1832
1833 spin_lock_irqsave(&ieee->lock, flags);
1834 if (!ieee->queue_stop)
1835 goto exit;
1836
1837 ieee->queue_stop = 0;
1838
1839 if (ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) {
1840 while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))) {
1841 header = (struct ieee80211_hdr_3addr *) skb->data;
1842
1843 header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
1844
1845 if (ieee->seq_ctrl[0] == 0xFFF)
1846 ieee->seq_ctrl[0] = 0;
1847 else
1848 ieee->seq_ctrl[0]++;
1849
1850 ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
1851 dev_kfree_skb_any(skb);
1852 }
1853 }
1854 if (!ieee->queue_stop && ieee->tx_pending.txb)
1855 ieee80211_resume_tx(ieee);
1856
1857 if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)) {
1858 ieee->softmac_stats.swtxawake++;
1859 netif_wake_queue(ieee->dev);
1860 }
1861exit:
1862 spin_unlock_irqrestore(&ieee->lock, flags);
1863}
1864
1865void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
1866{
1867 if (!netif_queue_stopped(ieee->dev)) {
1868 netif_stop_queue(ieee->dev);
1869 ieee->softmac_stats.swtxstop++;
1870 }
1871 ieee->queue_stop = 1;
1872}
1873
1874inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
1875{
1876 random_ether_addr(ieee->current_network.bssid);
1877}
1878
1879/* called in user context only */
1880void ieee80211_start_master_bss(struct ieee80211_device *ieee)
1881{
1882 ieee->assoc_id = 1;
1883
1884 if (ieee->current_network.ssid_len == 0) {
1885 strncpy(ieee->current_network.ssid,
1886 IEEE80211_DEFAULT_TX_ESSID,
1887 IW_ESSID_MAX_SIZE);
1888
1889 ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
1890 ieee->ssid_set = 1;
1891 }
1892
1893 memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
1894
1895 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1896 ieee->state = IEEE80211_LINKED;
1897 ieee->link_change(ieee->dev);
1898 notify_wx_assoc_event(ieee);
1899
1900 if (ieee->data_hard_resume)
1901 ieee->data_hard_resume(ieee->dev);
1902
1903 netif_carrier_on(ieee->dev);
1904}
1905
1906static void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
1907{
1908 if (ieee->raw_tx) {
1909
1910 if (ieee->data_hard_resume)
1911 ieee->data_hard_resume(ieee->dev);
1912
1913 netif_carrier_on(ieee->dev);
1914 }
1915}
1916
1917static void ieee80211_start_ibss_wq(struct work_struct *work)
1918{
1919 struct delayed_work *dwork = to_delayed_work(work);
1920 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
1921
1922 /* iwconfig mode ad-hoc will schedule this and return
1923 * on the other hand this will block further iwconfig SET
1924 * operations because of the wx_sem hold.
1925 * Anyway some most set operations set a flag to speed-up
1926 * (abort) this wq (when syncro scanning) before sleeping
1927 * on the semaphore
1928 */
1929
1930 down(&ieee->wx_sem);
1931
1932 if (ieee->current_network.ssid_len == 0) {
1933 strcpy(ieee->current_network.ssid, IEEE80211_DEFAULT_TX_ESSID);
1934 ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
1935 ieee->ssid_set = 1;
1936 }
1937
1938 /* check if we have this cell in our network list */
1939 ieee80211_softmac_check_all_nets(ieee);
1940
1941 if (ieee->state == IEEE80211_NOLINK)
1942 ieee->current_network.channel = 10;
1943 /* if not then the state is not linked. Maybe the user switched to
1944 * ad-hoc mode just after being in monitor mode, or just after
1945 * being very few time in managed mode (so the card have had no
1946 * time to scan all the chans..) or we have just run up the iface
1947 * after setting ad-hoc mode. So we have to give another try..
1948 * Here, in ibss mode, should be safe to do this without extra care
1949 * (in bss mode we had to make sure no-one tried to associate when
1950 * we had just checked the ieee->state and we was going to start the
1951 * scan) because in ibss mode the ieee80211_new_net function, when
1952 * finds a good net, just set the ieee->state to IEEE80211_LINKED,
1953 * so, at worst, we waste a bit of time to initiate an unneeded syncro
1954 * scan, that will stop at the first round because it sees the state
1955 * associated.
1956 */
1957 if (ieee->state == IEEE80211_NOLINK)
1958 ieee80211_start_scan_syncro(ieee);
1959
1960 /* the network definitively is not here.. create a new cell */
1961 if (ieee->state == IEEE80211_NOLINK) {
1962 printk("creating new IBSS cell\n");
1963 if (!ieee->wap_set)
1964 ieee80211_randomize_cell(ieee);
1965
1966 if (ieee->modulation & IEEE80211_CCK_MODULATION) {
1967 ieee->current_network.rates_len = 4;
1968
1969 ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
1970 ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
1971 ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
1972 ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
1973
1974 } else
1975 ieee->current_network.rates_len = 0;
1976
1977 if (ieee->modulation & IEEE80211_OFDM_MODULATION) {
1978 ieee->current_network.rates_ex_len = 8;
1979
1980 ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
1981 ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
1982 ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
1983 ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
1984 ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
1985 ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
1986 ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
1987 ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
1988
1989 ieee->rate = 540;
1990 } else {
1991 ieee->current_network.rates_ex_len = 0;
1992 ieee->rate = 110;
1993 }
1994
1995 /* By default, WMM function will be disabled in IBSS mode */
1996 ieee->current_network.QoS_Enable = 0;
1997
1998 ieee->current_network.atim_window = 0;
1999 ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
2000 if (ieee->short_slot)
2001 ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
2002 }
2003
2004 ieee->state = IEEE80211_LINKED;
2005 ieee->set_chan(ieee->dev, ieee->current_network.channel);
2006 ieee->link_change(ieee->dev);
2007
2008 notify_wx_assoc_event(ieee);
2009
2010 ieee80211_start_send_beacons(ieee);
2011 printk(KERN_WARNING "after sending beacon packet!\n");
2012
2013 if (ieee->data_hard_resume)
2014 ieee->data_hard_resume(ieee->dev);
2015
2016 netif_carrier_on(ieee->dev);
2017
2018 up(&ieee->wx_sem);
2019}
2020
2021inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
2022{
2023 queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 100);
2024}
2025
2026/* this is called only in user context, with wx_sem held */
2027void ieee80211_start_bss(struct ieee80211_device *ieee)
2028{
2029 unsigned long flags;
2030 /* Ref: 802.11d 11.1.3.3
2031 * STA shall not start a BSS unless properly formed Beacon frame
2032 * including a Country IE.
2033 */
2034 if (IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee)) {
2035 if (!ieee->bGlobalDomain)
2036 return;
2037 }
2038 /* check if we have already found the net we are interested in (if any).
2039 * if not (we are disassociated and we are not
2040 * in associating / authenticating phase) start the background scanning.
2041 */
2042 ieee80211_softmac_check_all_nets(ieee);
2043
2044 /* ensure no-one start an associating process (thus setting
2045 * the ieee->state to ieee80211_ASSOCIATING) while we
2046 * have just cheked it and we are going to enable scan.
2047 * The ieee80211_new_net function is always called with
2048 * lock held (from both ieee80211_softmac_check_all_nets and
2049 * the rx path), so we cannot be in the middle of such function
2050 */
2051 spin_lock_irqsave(&ieee->lock, flags);
2052
2053 if (ieee->state == IEEE80211_NOLINK) {
2054 ieee->actscanning = true;
2055 ieee80211_rtl_start_scan(ieee);
2056 }
2057 spin_unlock_irqrestore(&ieee->lock, flags);
2058}
2059
2060/* called only in userspace context */
2061void ieee80211_disassociate(struct ieee80211_device *ieee)
2062{
2063 netif_carrier_off(ieee->dev);
2064
2065 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
2066 ieee80211_reset_queue(ieee);
2067
2068 if (ieee->data_hard_stop)
2069 ieee->data_hard_stop(ieee->dev);
2070
2071 if (IS_DOT11D_ENABLE(ieee))
2072 Dot11d_Reset(ieee);
2073
2074 ieee->link_change(ieee->dev);
2075 if (ieee->state == IEEE80211_LINKED)
2076 notify_wx_assoc_event(ieee);
2077 ieee->state = IEEE80211_NOLINK;
2078
2079}
2080static void ieee80211_associate_retry_wq(struct work_struct *work)
2081{
2082 struct delayed_work *dwork = to_delayed_work(work);
2083 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
2084 unsigned long flags;
2085 down(&ieee->wx_sem);
2086 if (!ieee->proto_started)
2087 goto exit;
2088 if (ieee->state != IEEE80211_ASSOCIATING_RETRY)
2089 goto exit;
2090 /* until we do not set the state to IEEE80211_NOLINK
2091 * there are no possibility to have someone else trying
2092 * to start an association procedure (we get here with
2093 * ieee->state = IEEE80211_ASSOCIATING).
2094 * When we set the state to IEEE80211_NOLINK it is possible
2095 * that the RX path run an attempt to associate, but
2096 * both ieee80211_softmac_check_all_nets and the
2097 * RX path works with ieee->lock held so there are no
2098 * problems. If we are still disassociated then start a scan.
2099 * the lock here is necessary to ensure no one try to start
2100 * an association procedure when we have just checked the
2101 * state and we are going to start the scan.
2102 */
2103 ieee->state = IEEE80211_NOLINK;
2104 ieee->beinretry = true;
2105 ieee80211_softmac_check_all_nets(ieee);
2106
2107 spin_lock_irqsave(&ieee->lock, flags);
2108
2109 if (ieee->state == IEEE80211_NOLINK) {
2110 ieee->beinretry = false;
2111 ieee->actscanning = true;
2112 ieee80211_rtl_start_scan(ieee);
2113 }
2114 if (ieee->state == IEEE80211_NOLINK)
2115 notify_wx_assoc_event(ieee);
2116 spin_unlock_irqrestore(&ieee->lock, flags);
2117
2118exit:
2119 up(&ieee->wx_sem);
2120}
2121
2122struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
2123{
2124 u8 broadcast_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
2125
2126 struct sk_buff *skb = NULL;
2127 struct ieee80211_probe_response *b;
2128
2129 skb = ieee80211_probe_resp(ieee, broadcast_addr);
2130 if (!skb)
2131 return NULL;
2132
2133 b = (struct ieee80211_probe_response *) skb->data;
2134 b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
2135
2136 return skb;
2137}
2138
2139struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
2140{
2141 struct sk_buff *skb;
2142 struct ieee80211_probe_response *b;
2143
2144 skb = ieee80211_get_beacon_(ieee);
2145 if (!skb)
2146 return NULL;
2147
2148 b = (struct ieee80211_probe_response *) skb->data;
2149 b->header.seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
2150
2151 if (ieee->seq_ctrl[0] == 0xFFF)
2152 ieee->seq_ctrl[0] = 0;
2153 else
2154 ieee->seq_ctrl[0]++;
2155
2156 return skb;
2157}
2158
2159void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)
2160{
2161 ieee->sync_scan_hurryup = 1;
2162 down(&ieee->wx_sem);
2163 ieee80211_stop_protocol(ieee);
2164 up(&ieee->wx_sem);
2165}
2166
2167void ieee80211_stop_protocol(struct ieee80211_device *ieee)
2168{
2169 if (!ieee->proto_started)
2170 return;
2171
2172 ieee->proto_started = 0;
2173
2174 ieee80211_stop_send_beacons(ieee);
2175 if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_LINKED))
2176 SendDisassociation(ieee, NULL, WLAN_REASON_DISASSOC_STA_HAS_LEFT);
2177
2178 del_timer_sync(&ieee->associate_timer);
2179 cancel_delayed_work(&ieee->associate_retry_wq);
2180 cancel_delayed_work(&ieee->start_ibss_wq);
2181 ieee80211_stop_scan(ieee);
2182
2183 ieee80211_disassociate(ieee);
2184}
2185
2186void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
2187{
2188 ieee->sync_scan_hurryup = 0;
2189 down(&ieee->wx_sem);
2190 ieee80211_start_protocol(ieee);
2191 up(&ieee->wx_sem);
2192}
2193
2194void ieee80211_start_protocol(struct ieee80211_device *ieee)
2195{
2196 short ch = 0;
2197 int i = 0;
2198
2199 if (ieee->proto_started)
2200 return;
2201
2202 ieee->proto_started = 1;
2203
2204 if (ieee->current_network.channel == 0) {
2205 do {
2206 ch++;
2207 if (ch > MAX_CHANNEL_NUMBER)
2208 return; /* no channel found */
2209
2210 } while (!GET_DOT11D_INFO(ieee)->channel_map[ch]);
2211
2212 ieee->current_network.channel = ch;
2213 }
2214
2215 if (ieee->current_network.beacon_interval == 0)
2216 ieee->current_network.beacon_interval = 100;
2217 ieee->set_chan(ieee->dev, ieee->current_network.channel);
2218
2219 for (i = 0; i < 17; i++) {
2220 ieee->last_rxseq_num[i] = -1;
2221 ieee->last_rxfrag_num[i] = -1;
2222 ieee->last_packet_time[i] = 0;
2223 }
2224
2225 ieee->init_wmmparam_flag = 0; /* reinitialize AC_xx_PARAM registers. */
2226
2227 /* if the user set the MAC of the ad-hoc cell and then
2228 * switch to managed mode, shall we make sure that association
2229 * attempts does not fail just because the user provide the essid
2230 * and the nic is still checking for the AP MAC ??
2231 */
2232 switch (ieee->iw_mode) {
2233 case IW_MODE_AUTO:
2234 ieee->iw_mode = IW_MODE_INFRA;
2235 /* not set break here intentionly */
2236 case IW_MODE_INFRA:
2237 ieee80211_start_bss(ieee);
2238 break;
2239
2240 case IW_MODE_ADHOC:
2241 ieee80211_start_ibss(ieee);
2242 break;
2243
2244 case IW_MODE_MASTER:
2245 ieee80211_start_master_bss(ieee);
2246 break;
2247
2248 case IW_MODE_MONITOR:
2249 ieee80211_start_monitor_mode(ieee);
2250 break;
2251
2252 default:
2253 ieee->iw_mode = IW_MODE_INFRA;
2254 ieee80211_start_bss(ieee);
2255 break;
2256 }
2257}
2258
2259#define DRV_NAME "Ieee80211"
2260void ieee80211_softmac_init(struct ieee80211_device *ieee)
2261{
2262 int i;
2263 memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
2264
2265 ieee->state = IEEE80211_NOLINK;
2266 ieee->sync_scan_hurryup = 0;
2267 for (i = 0; i < 5; i++)
2268 ieee->seq_ctrl[i] = 0;
2269
2270 ieee->assoc_id = 0;
2271 ieee->queue_stop = 0;
2272 ieee->scanning = 0;
2273 ieee->softmac_features = 0; /* so IEEE2100-like driver are happy */
2274 ieee->wap_set = 0;
2275 ieee->ssid_set = 0;
2276 ieee->proto_started = 0;
2277 ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
2278 ieee->rate = 3;
2279 ieee->ps = IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST;
2280 ieee->sta_sleep = 0;
2281 ieee->bInactivePs = false;
2282 ieee->actscanning = false;
2283 ieee->ListenInterval = 2;
2284 ieee->NumRxDataInPeriod = 0;
2285 ieee->NumRxBcnInPeriod = 0;
2286 ieee->NumRxOkTotal = 0;
2287 ieee->NumRxUnicast = 0; /* for keep alive */
2288 ieee->beinretry = false;
2289 ieee->bHwRadioOff = false;
2290
2291 init_mgmt_queue(ieee);
2292
2293 ieee->tx_pending.txb = NULL;
2294
2295 init_timer(&ieee->associate_timer);
2296 ieee->associate_timer.data = (unsigned long)ieee;
2297 ieee->associate_timer.function = ieee80211_associate_abort_cb;
2298
2299 init_timer(&ieee->beacon_timer);
2300 ieee->beacon_timer.data = (unsigned long) ieee;
2301 ieee->beacon_timer.function = ieee80211_send_beacon_cb;
2302
2303 ieee->wq = create_workqueue(DRV_NAME);
2304
2305 INIT_DELAYED_WORK(&ieee->start_ibss_wq, (void *) ieee80211_start_ibss_wq);
2306 INIT_WORK(&ieee->associate_complete_wq, (void *) ieee80211_associate_complete_wq);
2307 INIT_WORK(&ieee->associate_procedure_wq, (void *) ieee80211_associate_procedure_wq);
2308 INIT_DELAYED_WORK(&ieee->softmac_scan_wq, (void *) ieee80211_softmac_scan_wq);
2309 INIT_DELAYED_WORK(&ieee->associate_retry_wq, (void *) ieee80211_associate_retry_wq);
2310 INIT_WORK(&ieee->wx_sync_scan_wq, (void *) ieee80211_wx_sync_scan_wq);
2311
2312 sema_init(&ieee->wx_sem, 1);
2313 sema_init(&ieee->scan_sem, 1);
2314
2315 spin_lock_init(&ieee->mgmt_tx_lock);
2316 spin_lock_init(&ieee->beacon_lock);
2317
2318 tasklet_init(&ieee->ps_task,
2319 (void(*)(unsigned long)) ieee80211_sta_ps,
2320 (unsigned long)ieee);
2321 ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
2322}
2323
2324void ieee80211_softmac_free(struct ieee80211_device *ieee)
2325{
2326 down(&ieee->wx_sem);
2327
2328 del_timer_sync(&ieee->associate_timer);
2329 cancel_delayed_work(&ieee->associate_retry_wq);
2330
2331 /* add for RF power on power of */
2332 cancel_delayed_work(&ieee->GPIOChangeRFWorkItem);
2333
2334 destroy_workqueue(ieee->wq);
2335 kfree(ieee->pDot11dInfo);
2336 up(&ieee->wx_sem);
2337}
2338
2339/* Start of WPA code. This is stolen from the ipw2200 driver */
2340static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
2341{
2342 /* This is called when wpa_supplicant loads and closes the driver
2343 * interface. */
2344 printk("%s WPA\n", value ? "enabling" : "disabling");
2345 ieee->wpa_enabled = value;
2346 return 0;
2347}
2348
2349static void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie,
2350 int wpa_ie_len)
2351{
2352 /* make sure WPA is enabled */
2353 ieee80211_wpa_enable(ieee, 1);
2354
2355 ieee80211_disassociate(ieee);
2356}
2357
2358static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command,
2359 int reason)
2360{
2361 int ret = 0;
2362
2363 switch (command) {
2364 case IEEE_MLME_STA_DEAUTH:
2365 /* silently ignore */
2366 break;
2367
2368 case IEEE_MLME_STA_DISASSOC:
2369 ieee80211_disassociate(ieee);
2370 break;
2371
2372 default:
2373 printk("Unknown MLME request: %d\n", command);
2374 ret = -EOPNOTSUPP;
2375 }
2376
2377 return ret;
2378}
2379
2380static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
2381 struct ieee_param *param, int plen)
2382{
2383 u8 *buf;
2384
2385 if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
2386 (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
2387 return -EINVAL;
2388
2389 if (param->u.wpa_ie.len) {
2390 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
2391 GFP_KERNEL);
2392 if (buf == NULL)
2393 return -ENOMEM;
2394
2395 kfree(ieee->wpa_ie);
2396 ieee->wpa_ie = buf;
2397 ieee->wpa_ie_len = param->u.wpa_ie.len;
2398 } else {
2399 kfree(ieee->wpa_ie);
2400 ieee->wpa_ie = NULL;
2401 ieee->wpa_ie_len = 0;
2402 }
2403
2404 ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
2405 return 0;
2406}
2407
2408#define AUTH_ALG_OPEN_SYSTEM 0x1
2409#define AUTH_ALG_SHARED_KEY 0x2
2410
2411static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
2412{
2413 struct ieee80211_security sec = {
2414 .flags = SEC_AUTH_MODE,
2415 };
2416 int ret = 0;
2417
2418 if (value & AUTH_ALG_SHARED_KEY) {
2419 sec.auth_mode = WLAN_AUTH_SHARED_KEY;
2420 ieee->open_wep = 0;
2421 } else {
2422 sec.auth_mode = WLAN_AUTH_OPEN;
2423 ieee->open_wep = 1;
2424 }
2425
2426 if (ieee->set_security)
2427 ieee->set_security(ieee->dev, &sec);
2428 else
2429 ret = -EOPNOTSUPP;
2430
2431 return ret;
2432}
2433
2434static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name,
2435 u32 value)
2436{
2437 int ret = 0;
2438 unsigned long flags;
2439
2440 switch (name) {
2441 case IEEE_PARAM_WPA_ENABLED:
2442 ret = ieee80211_wpa_enable(ieee, value);
2443 break;
2444
2445 case IEEE_PARAM_TKIP_COUNTERMEASURES:
2446 ieee->tkip_countermeasures = value;
2447 break;
2448
2449 case IEEE_PARAM_DROP_UNENCRYPTED: {
2450 /* HACK:
2451 *
2452 * wpa_supplicant calls set_wpa_enabled when the driver
2453 * is loaded and unloaded, regardless of if WPA is being
2454 * used. No other calls are made which can be used to
2455 * determine if encryption will be used or not prior to
2456 * association being expected. If encryption is not being
2457 * used, drop_unencrypted is set to false, else true -- we
2458 * can use this to determine if the CAP_PRIVACY_ON bit should
2459 * be set.
2460 */
2461 struct ieee80211_security sec = {
2462 .flags = SEC_ENABLED,
2463 .enabled = value,
2464 };
2465 ieee->drop_unencrypted = value;
2466 /* We only change SEC_LEVEL for open mode. Others
2467 * are set by ipw_wpa_set_encryption.
2468 */
2469 if (!value) {
2470 sec.flags |= SEC_LEVEL;
2471 sec.level = SEC_LEVEL_0;
2472 } else {
2473 sec.flags |= SEC_LEVEL;
2474 sec.level = SEC_LEVEL_1;
2475 }
2476 if (ieee->set_security)
2477 ieee->set_security(ieee->dev, &sec);
2478 break;
2479 }
2480
2481 case IEEE_PARAM_PRIVACY_INVOKED:
2482 ieee->privacy_invoked = value;
2483 break;
2484 case IEEE_PARAM_AUTH_ALGS:
2485 ret = ieee80211_wpa_set_auth_algs(ieee, value);
2486 break;
2487 case IEEE_PARAM_IEEE_802_1X:
2488 ieee->ieee802_1x = value;
2489 break;
2490 case IEEE_PARAM_WPAX_SELECT:
2491 spin_lock_irqsave(&ieee->wpax_suitlist_lock, flags);
2492 ieee->wpax_type_set = 1;
2493 ieee->wpax_type_notify = value;
2494 spin_unlock_irqrestore(&ieee->wpax_suitlist_lock, flags);
2495 break;
2496 default:
2497 printk("Unknown WPA param: %d\n", name);
2498 ret = -EOPNOTSUPP;
2499 }
2500
2501 return ret;
2502}
2503
2504/* implementation borrowed from hostap driver */
2505
2506static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
2507 struct ieee_param *param, int param_len)
2508{
2509 int ret = 0;
2510
2511 struct ieee80211_crypto_ops *ops;
2512 struct ieee80211_crypt_data **crypt;
2513
2514 struct ieee80211_security sec = {
2515 .flags = 0,
2516 };
2517
2518 param->u.crypt.err = 0;
2519 param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
2520
2521 if (param_len !=
2522 (int) ((char *) param->u.crypt.key - (char *) param) +
2523 param->u.crypt.key_len) {
2524 printk("Len mismatch %d, %d\n", param_len,
2525 param->u.crypt.key_len);
2526 return -EINVAL;
2527 }
2528 if (is_broadcast_ether_addr(param->sta_addr)) {
2529 if (param->u.crypt.idx >= WEP_KEYS)
2530 return -EINVAL;
2531 crypt = &ieee->crypt[param->u.crypt.idx];
2532 } else {
2533 return -EINVAL;
2534 }
2535
2536 if (strcmp(param->u.crypt.alg, "none") == 0) {
2537 if (crypt) {
2538 sec.enabled = 0;
2539 /* FIXME FIXME */
2540 sec.level = SEC_LEVEL_0;
2541 sec.flags |= SEC_ENABLED | SEC_LEVEL;
2542 ieee80211_crypt_delayed_deinit(ieee, crypt);
2543 }
2544 goto done;
2545 }
2546 sec.enabled = 1;
2547 /* FIXME FIXME */
2548 sec.flags |= SEC_ENABLED;
2549
2550 /* IPW HW cannot build TKIP MIC, host decryption still needed. */
2551 if (!(ieee->host_encrypt || ieee->host_decrypt) &&
2552 strcmp(param->u.crypt.alg, "TKIP"))
2553 goto skip_host_crypt;
2554
2555 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2556 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
2557 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2558 else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
2559 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2560 else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
2561 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2562 if (ops == NULL) {
2563 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
2564 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
2565 ret = -EINVAL;
2566 goto done;
2567 }
2568
2569 if (*crypt == NULL || (*crypt)->ops != ops) {
2570 struct ieee80211_crypt_data *new_crypt;
2571
2572 ieee80211_crypt_delayed_deinit(ieee, crypt);
2573
2574 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
2575 if (new_crypt == NULL) {
2576 ret = -ENOMEM;
2577 goto done;
2578 }
2579 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
2580 new_crypt->ops = ops;
2581 if (new_crypt->ops)
2582 new_crypt->priv =
2583 new_crypt->ops->init(param->u.crypt.idx);
2584
2585 if (new_crypt->priv == NULL) {
2586 kfree(new_crypt);
2587 param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
2588 ret = -EINVAL;
2589 goto done;
2590 }
2591
2592 *crypt = new_crypt;
2593 }
2594
2595 if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
2596 (*crypt)->ops->set_key(param->u.crypt.key,
2597 param->u.crypt.key_len, param->u.crypt.seq,
2598 (*crypt)->priv) < 0) {
2599 printk("key setting failed\n");
2600 param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
2601 ret = -EINVAL;
2602 goto done;
2603 }
2604
2605 skip_host_crypt:
2606 if (param->u.crypt.set_tx) {
2607 ieee->tx_keyidx = param->u.crypt.idx;
2608 sec.active_key = param->u.crypt.idx;
2609 sec.flags |= SEC_ACTIVE_KEY;
2610 } else
2611 sec.flags &= ~SEC_ACTIVE_KEY;
2612
2613 if (param->u.crypt.alg != NULL) {
2614 memcpy(sec.keys[param->u.crypt.idx],
2615 param->u.crypt.key,
2616 param->u.crypt.key_len);
2617 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
2618 sec.flags |= (1 << param->u.crypt.idx);
2619
2620 if (strcmp(param->u.crypt.alg, "WEP") == 0) {
2621 sec.flags |= SEC_LEVEL;
2622 sec.level = SEC_LEVEL_1;
2623 } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
2624 sec.flags |= SEC_LEVEL;
2625 sec.level = SEC_LEVEL_2;
2626 } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
2627 sec.flags |= SEC_LEVEL;
2628 sec.level = SEC_LEVEL_3;
2629 }
2630 }
2631 done:
2632 if (ieee->set_security)
2633 ieee->set_security(ieee->dev, &sec);
2634
2635 /* Do not reset port if card is in Managed mode since resetting will
2636 * generate new IEEE 802.11 authentication which may end up in looping
2637 * with IEEE 802.1X. If your hardware requires a reset after WEP
2638 * configuration (for example... Prism2), implement the reset_port in
2639 * the callbacks structures used to initialize the 802.11 stack. */
2640 if (ieee->reset_on_keychange &&
2641 ieee->iw_mode != IW_MODE_INFRA &&
2642 ieee->reset_port &&
2643 ieee->reset_port(ieee->dev)) {
2644 printk("reset_port failed\n");
2645 param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
2646 return -EINVAL;
2647 }
2648
2649 return ret;
2650}
2651
2652int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee,
2653 struct iw_point *p)
2654{
2655 struct ieee_param *param;
2656 int ret = 0;
2657
2658 down(&ieee->wx_sem);
2659
2660 if (p->length < sizeof(struct ieee_param) || !p->pointer) {
2661 ret = -EINVAL;
2662 goto out;
2663 }
2664
2665 param = memdup_user(p->pointer, p->length);
2666 if (IS_ERR(param)) {
2667 ret = PTR_ERR(param);
2668 goto out;
2669 }
2670
2671 switch (param->cmd) {
2672 case IEEE_CMD_SET_WPA_PARAM:
2673 ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
2674 param->u.wpa_param.value);
2675 break;
2676 case IEEE_CMD_SET_WPA_IE:
2677 ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
2678 break;
2679 case IEEE_CMD_SET_ENCRYPTION:
2680 ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
2681 break;
2682 case IEEE_CMD_MLME:
2683 ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
2684 param->u.mlme.reason_code);
2685 break;
2686 default:
2687 printk("Unknown WPA supplicant request: %d\n", param->cmd);
2688 ret = -EOPNOTSUPP;
2689 break;
2690 }
2691
2692 if (ret == 0 && copy_to_user(p->pointer, param, p->length))
2693 ret = -EFAULT;
2694
2695 kfree(param);
2696out:
2697 up(&ieee->wx_sem);
2698
2699 return ret;
2700}
2701
2702void notify_wx_assoc_event(struct ieee80211_device *ieee)
2703{
2704 union iwreq_data wrqu;
2705 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
2706 if (ieee->state == IEEE80211_LINKED)
2707 memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
2708 else
2709 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
2710 wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
2711}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
deleted file mode 100644
index 46f35644126c..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
+++ /dev/null
@@ -1,567 +0,0 @@
1/* IEEE 802.11 SoftMAC layer
2 * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
3 *
4 * Mostly extracted from the rtl8180-sa2400 driver for the
5 * in-kernel generic ieee802.11 stack.
6 *
7 * Some pieces of code might be stolen from ipw2100 driver
8 * copyright of who own it's copyright ;-)
9 *
10 * PS wx handler mostly stolen from hostap, copyright who
11 * own it's copyright ;-)
12 *
13 * released under the GPL
14 */
15
16
17#include <linux/etherdevice.h>
18
19#include "ieee80211.h"
20
21/* FIXME: add A freqs */
22
23const long ieee80211_wlan_frequencies[] = {
24 2412, 2417, 2422, 2427,
25 2432, 2437, 2442, 2447,
26 2452, 2457, 2462, 2467,
27 2472, 2484
28};
29
30
31int ieee80211_wx_set_freq(struct ieee80211_device *ieee,
32 struct iw_request_info *a, union iwreq_data *wrqu,
33 char *b)
34{
35 int ret;
36 struct iw_freq *fwrq = &wrqu->freq;
37// printk("in %s\n",__func__);
38 down(&ieee->wx_sem);
39
40 if (ieee->iw_mode == IW_MODE_INFRA) {
41 ret = -EOPNOTSUPP;
42 goto out;
43 }
44
45 /* if setting by freq convert to channel */
46 if (fwrq->e == 1) {
47 if ((fwrq->m >= (int) 2.412e8 &&
48 fwrq->m <= (int) 2.487e8)) {
49 int f = fwrq->m / 100000;
50 int c = 0;
51
52 while ((c < 14) && (f != ieee80211_wlan_frequencies[c]))
53 c++;
54
55 /* hack to fall through */
56 fwrq->e = 0;
57 fwrq->m = c + 1;
58 }
59 }
60
61 if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1) {
62 ret = -EOPNOTSUPP;
63 goto out;
64
65 } else { /* Set the channel */
66
67
68 ieee->current_network.channel = fwrq->m;
69 ieee->set_chan(ieee->dev, ieee->current_network.channel);
70
71 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
72 if (ieee->state == IEEE80211_LINKED) {
73 ieee80211_stop_send_beacons(ieee);
74 ieee80211_start_send_beacons(ieee);
75 }
76 }
77
78 ret = 0;
79out:
80 up(&ieee->wx_sem);
81 return ret;
82}
83
84
85int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
86 struct iw_request_info *a, union iwreq_data *wrqu,
87 char *b)
88{
89 struct iw_freq *fwrq = &wrqu->freq;
90
91 if (ieee->current_network.channel == 0)
92 return -1;
93
94 fwrq->m = ieee->current_network.channel;
95 fwrq->e = 0;
96
97 return 0;
98}
99
100int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
101 struct iw_request_info *info, union iwreq_data *wrqu,
102 char *extra)
103{
104 unsigned long flags;
105
106 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
107
108 if (ieee->iw_mode == IW_MODE_MONITOR)
109 return -1;
110
111 /* We want avoid to give to the user inconsistent infos*/
112 spin_lock_irqsave(&ieee->lock, flags);
113
114 if (ieee->state != IEEE80211_LINKED &&
115 ieee->state != IEEE80211_LINKED_SCANNING &&
116 ieee->wap_set == 0)
117
118 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
119 else
120 memcpy(wrqu->ap_addr.sa_data,
121 ieee->current_network.bssid, ETH_ALEN);
122
123 spin_unlock_irqrestore(&ieee->lock, flags);
124
125 return 0;
126}
127
128
129int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
130 struct iw_request_info *info, union iwreq_data *awrq,
131 char *extra)
132{
133
134 int ret = 0;
135 unsigned long flags;
136
137 short ifup = ieee->proto_started;//dev->flags & IFF_UP;
138 struct sockaddr *temp = (struct sockaddr *)awrq;
139
140 //printk("=======Set WAP:");
141 ieee->sync_scan_hurryup = 1;
142
143 down(&ieee->wx_sem);
144 /* use ifconfig hw ether */
145 if (ieee->iw_mode == IW_MODE_MASTER) {
146 ret = -1;
147 goto out;
148 }
149
150 if (temp->sa_family != ARPHRD_ETHER) {
151 ret = -EINVAL;
152 goto out;
153 }
154
155 if (ifup)
156 ieee80211_stop_protocol(ieee);
157
158 /* just to avoid to give inconsistent infos in the
159 * get wx method. not really needed otherwise
160 */
161 spin_lock_irqsave(&ieee->lock, flags);
162
163 memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
164 ieee->wap_set = !is_zero_ether_addr(temp->sa_data);
165 //printk(" %x:%x:%x:%x:%x:%x\n", ieee->current_network.bssid[0],ieee->current_network.bssid[1],ieee->current_network.bssid[2],ieee->current_network.bssid[3],ieee->current_network.bssid[4],ieee->current_network.bssid[5]);
166
167 spin_unlock_irqrestore(&ieee->lock, flags);
168
169 if (ifup)
170 ieee80211_start_protocol(ieee);
171
172out:
173 up(&ieee->wx_sem);
174 return ret;
175}
176
177int ieee80211_wx_get_essid(struct ieee80211_device *ieee,
178 struct iw_request_info *a, union iwreq_data *wrqu,
179 char *b)
180{
181 int len, ret = 0;
182 unsigned long flags;
183
184 if (ieee->iw_mode == IW_MODE_MONITOR)
185 return -1;
186
187 /* We want avoid to give to the user inconsistent infos*/
188 spin_lock_irqsave(&ieee->lock, flags);
189
190 if (ieee->current_network.ssid[0] == '\0' ||
191 ieee->current_network.ssid_len == 0){
192 ret = -1;
193 goto out;
194 }
195
196 if (ieee->state != IEEE80211_LINKED &&
197 ieee->state != IEEE80211_LINKED_SCANNING &&
198 ieee->ssid_set == 0){
199 ret = -1;
200 goto out;
201 }
202 len = ieee->current_network.ssid_len;
203 wrqu->essid.length = len;
204 strncpy(b, ieee->current_network.ssid, len);
205 wrqu->essid.flags = 1;
206
207out:
208 spin_unlock_irqrestore(&ieee->lock, flags);
209
210 return ret;
211
212}
213
214int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
215 struct iw_request_info *info, union iwreq_data *wrqu,
216 char *extra)
217{
218
219 u32 target_rate = wrqu->bitrate.value;
220
221 //added by lizhaoming for auto mode
222 if (target_rate == -1)
223 ieee->rate = 110;
224 else
225 ieee->rate = target_rate/100000;
226
227 //FIXME: we might want to limit rate also in management protocols.
228 return 0;
229}
230
231
232
233int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
234 struct iw_request_info *info, union iwreq_data *wrqu,
235 char *extra)
236{
237
238 wrqu->bitrate.value = ieee->rate * 100000;
239
240 return 0;
241}
242
243int ieee80211_wx_set_mode(struct ieee80211_device *ieee,
244 struct iw_request_info *a, union iwreq_data *wrqu,
245 char *b)
246{
247
248 ieee->sync_scan_hurryup = 1;
249
250 down(&ieee->wx_sem);
251
252 if (wrqu->mode == ieee->iw_mode)
253 goto out;
254
255 if (wrqu->mode == IW_MODE_MONITOR)
256 ieee->dev->type = ARPHRD_IEEE80211;
257 else
258 ieee->dev->type = ARPHRD_ETHER;
259
260 if (!ieee->proto_started) {
261 ieee->iw_mode = wrqu->mode;
262 } else {
263 ieee80211_stop_protocol(ieee);
264 ieee->iw_mode = wrqu->mode;
265 ieee80211_start_protocol(ieee);
266 }
267
268out:
269 up(&ieee->wx_sem);
270 return 0;
271}
272
273
274void ieee80211_wx_sync_scan_wq(struct work_struct *work)
275{
276 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq);
277 short chan;
278
279 chan = ieee->current_network.channel;
280
281 if (ieee->data_hard_stop)
282 ieee->data_hard_stop(ieee->dev);
283
284 ieee80211_stop_send_beacons(ieee);
285
286 ieee->state = IEEE80211_LINKED_SCANNING;
287 ieee->link_change(ieee->dev);
288
289 ieee80211_start_scan_syncro(ieee);
290
291 ieee->set_chan(ieee->dev, chan);
292
293 ieee->state = IEEE80211_LINKED;
294 ieee->link_change(ieee->dev);
295
296 if (ieee->data_hard_resume)
297 ieee->data_hard_resume(ieee->dev);
298
299 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
300 ieee80211_start_send_beacons(ieee);
301
302 //YJ,add,080828, In prevent of lossing ping packet during scanning
303 //ieee80211_sta_ps_send_null_frame(ieee, false);
304 //YJ,add,080828,end
305
306 up(&ieee->wx_sem);
307
308}
309
310int ieee80211_wx_set_scan(struct ieee80211_device *ieee,
311 struct iw_request_info *a, union iwreq_data *wrqu,
312 char *b)
313{
314 int ret = 0;
315
316 down(&ieee->wx_sem);
317
318 if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)) {
319 ret = -1;
320 goto out;
321 }
322 //YJ,add,080828
323 //In prevent of lossing ping packet during scanning
324 //ieee80211_sta_ps_send_null_frame(ieee, true);
325 //YJ,add,080828,end
326
327 if (ieee->state == IEEE80211_LINKED) {
328 queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
329 /* intentionally forget to up sem */
330 return 0;
331 }
332
333out:
334 up(&ieee->wx_sem);
335 return ret;
336}
337
338int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
339 struct iw_request_info *a, union iwreq_data *wrqu,
340 char *extra)
341{
342
343 int ret = 0, len;
344 short proto_started;
345 unsigned long flags;
346
347 ieee->sync_scan_hurryup = 1;
348
349 down(&ieee->wx_sem);
350
351 proto_started = ieee->proto_started;
352
353 if (wrqu->essid.length > IW_ESSID_MAX_SIZE) {
354 ret = -E2BIG;
355 goto out;
356 }
357
358 if (ieee->iw_mode == IW_MODE_MONITOR) {
359 ret = -1;
360 goto out;
361 }
362
363 if (proto_started)
364 ieee80211_stop_protocol(ieee);
365
366 /* this is just to be sure that the GET wx callback
367 * has consistent infos. not needed otherwise
368 */
369 spin_lock_irqsave(&ieee->lock, flags);
370
371 if (wrqu->essid.flags && wrqu->essid.length) {
372//YJ,modified,080819
373 len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length) : IW_ESSID_MAX_SIZE;
374 memset(ieee->current_network.ssid, 0, ieee->current_network.ssid_len); //YJ,add,080819
375 strncpy(ieee->current_network.ssid, extra, len);
376 ieee->current_network.ssid_len = len;
377 ieee->ssid_set = 1;
378//YJ,modified,080819,end
379
380 //YJ,add,080819,for hidden ap
381 if (len == 0) {
382 memset(ieee->current_network.bssid, 0, ETH_ALEN);
383 ieee->current_network.capability = 0;
384 }
385 //YJ,add,080819,for hidden ap,end
386 } else {
387 ieee->ssid_set = 0;
388 ieee->current_network.ssid[0] = '\0';
389 ieee->current_network.ssid_len = 0;
390 }
391 //printk("==========set essid %s!\n",ieee->current_network.ssid);
392 spin_unlock_irqrestore(&ieee->lock, flags);
393
394 if (proto_started)
395 ieee80211_start_protocol(ieee);
396out:
397 up(&ieee->wx_sem);
398 return ret;
399}
400
401int ieee80211_wx_get_mode(struct ieee80211_device *ieee,
402 struct iw_request_info *a, union iwreq_data *wrqu,
403 char *b)
404{
405
406 wrqu->mode = ieee->iw_mode;
407 return 0;
408}
409
410int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
411 struct iw_request_info *info, union iwreq_data *wrqu,
412 char *extra)
413{
414
415 int *parms = (int *)extra;
416 int enable = (parms[0] > 0);
417 short prev = ieee->raw_tx;
418
419 down(&ieee->wx_sem);
420
421 if (enable)
422 ieee->raw_tx = 1;
423 else
424 ieee->raw_tx = 0;
425
426 netdev_info(ieee->dev, "raw TX is %s\n",
427 ieee->raw_tx ? "enabled" : "disabled");
428
429 if (ieee->iw_mode == IW_MODE_MONITOR) {
430 if (prev == 0 && ieee->raw_tx) {
431 if (ieee->data_hard_resume)
432 ieee->data_hard_resume(ieee->dev);
433
434 netif_carrier_on(ieee->dev);
435 }
436
437 if (prev && ieee->raw_tx == 1)
438 netif_carrier_off(ieee->dev);
439 }
440
441 up(&ieee->wx_sem);
442
443 return 0;
444}
445
446int ieee80211_wx_get_name(struct ieee80211_device *ieee,
447 struct iw_request_info *info, union iwreq_data *wrqu,
448 char *extra)
449{
450 strlcpy(wrqu->name, "802.11", IFNAMSIZ);
451 if (ieee->modulation & IEEE80211_CCK_MODULATION) {
452 strlcat(wrqu->name, "b", IFNAMSIZ);
453 if (ieee->modulation & IEEE80211_OFDM_MODULATION)
454 strlcat(wrqu->name, "/g", IFNAMSIZ);
455 } else if (ieee->modulation & IEEE80211_OFDM_MODULATION)
456 strlcat(wrqu->name, "g", IFNAMSIZ);
457
458 if ((ieee->state == IEEE80211_LINKED) ||
459 (ieee->state == IEEE80211_LINKED_SCANNING))
460 strlcat(wrqu->name, " link", IFNAMSIZ);
461 else if (ieee->state != IEEE80211_NOLINK)
462 strlcat(wrqu->name, " .....", IFNAMSIZ);
463
464
465 return 0;
466}
467
468
469/* this is mostly stolen from hostap */
470int ieee80211_wx_set_power(struct ieee80211_device *ieee,
471 struct iw_request_info *info, union iwreq_data *wrqu,
472 char *extra)
473{
474 int ret = 0;
475
476 if ((!ieee->sta_wake_up) ||
477 (!ieee->ps_request_tx_ack) ||
478 (!ieee->enter_sleep_state) ||
479 (!ieee->ps_is_queue_empty)) {
480
481 printk("ERROR. PS mode tried to be use but driver missed a callback\n\n");
482
483 return -1;
484 }
485
486 down(&ieee->wx_sem);
487
488 if (wrqu->power.disabled) {
489 ieee->ps = IEEE80211_PS_DISABLED;
490
491 goto exit;
492 }
493 switch (wrqu->power.flags & IW_POWER_MODE) {
494 case IW_POWER_UNICAST_R:
495 ieee->ps = IEEE80211_PS_UNICAST;
496
497 break;
498 case IW_POWER_ALL_R:
499 ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST;
500 break;
501
502 case IW_POWER_ON:
503 ieee->ps = IEEE80211_PS_DISABLED;
504 break;
505
506 default:
507 ret = -EINVAL;
508 goto exit;
509 }
510
511 if (wrqu->power.flags & IW_POWER_TIMEOUT) {
512
513 ieee->ps_timeout = wrqu->power.value / 1000;
514 printk("Timeout %d\n", ieee->ps_timeout);
515 }
516
517 if (wrqu->power.flags & IW_POWER_PERIOD) {
518
519 ret = -EOPNOTSUPP;
520 goto exit;
521 //wrq->value / 1024;
522
523 }
524exit:
525 up(&ieee->wx_sem);
526 return ret;
527
528}
529
530/* this is stolen from hostap */
531int ieee80211_wx_get_power(struct ieee80211_device *ieee,
532 struct iw_request_info *info, union iwreq_data *wrqu,
533 char *extra)
534{
535 int ret = 0;
536
537 down(&ieee->wx_sem);
538
539 if (ieee->ps == IEEE80211_PS_DISABLED) {
540 wrqu->power.disabled = 1;
541 goto exit;
542 }
543
544 wrqu->power.disabled = 0;
545
546// if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
547 wrqu->power.flags = IW_POWER_TIMEOUT;
548 wrqu->power.value = ieee->ps_timeout * 1000;
549// } else {
550// ret = -EOPNOTSUPP;
551// goto exit;
552 //wrqu->power.flags = IW_POWER_PERIOD;
553 //wrqu->power.value = ieee->current_network.dtim_period *
554 // ieee->current_network.beacon_interval * 1024;
555// }
556
557
558 if (ieee->ps & IEEE80211_PS_MBCAST)
559 wrqu->power.flags |= IW_POWER_ALL_R;
560 else
561 wrqu->power.flags |= IW_POWER_UNICAST_R;
562
563exit:
564 up(&ieee->wx_sem);
565 return ret;
566
567}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
deleted file mode 100644
index 0dc5ae414270..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
+++ /dev/null
@@ -1,591 +0,0 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************
26
27 Few modifications for Realtek's Wi-Fi drivers by
28 Andrea Merello <andrea.merello@gmail.com>
29
30 A special thanks goes to Realtek for their support !
31
32******************************************************************************/
33
34#include <linux/compiler.h>
35#include <linux/errno.h>
36#include <linux/if_arp.h>
37#include <linux/in6.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/netdevice.h>
43#include <linux/pci.h>
44#include <linux/proc_fs.h>
45#include <linux/skbuff.h>
46#include <linux/slab.h>
47#include <linux/tcp.h>
48#include <linux/types.h>
49#include <linux/wireless.h>
50#include <linux/etherdevice.h>
51#include <asm/uaccess.h>
52#include <linux/if_vlan.h>
53
54#include "ieee80211.h"
55
56
57/*
58
59
60802.11 Data Frame
61
62
63802.11 frame_contorl for data frames - 2 bytes
64 ,-----------------------------------------------------------------------------------------.
65bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e |
66 |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
67val | 0 | 0 | 0 | 1 | x | 0 | 0 | 0 | 1 | 0 | x | x | x | x | x |
68 |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
69desc | ^-ver-^ | ^type-^ | ^-----subtype-----^ | to |from |more |retry| pwr |more |wep |
70 | | | x=0 data,x=1 data+ack | DS | DS |frag | | mgm |data | |
71 '-----------------------------------------------------------------------------------------'
72 /\
73 |
74802.11 Data Frame |
75 ,--------- 'ctrl' expands to >-----------'
76 |
77 ,--'---,-------------------------------------------------------------.
78Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
79 |------|------|---------|---------|---------|------|---------|------|
80Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
81 | | tion | (BSSID) | | | ence | data | |
82 `--------------------------------------------------| |------'
83Total: 28 non-data bytes `----.----'
84 |
85 .- 'Frame data' expands to <---------------------------'
86 |
87 V
88 ,---------------------------------------------------.
89Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
90 |------|------|---------|----------|------|---------|
91Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
92 | DSAP | SSAP | | | | Packet |
93 | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
94 `-----------------------------------------| |
95Total: 8 non-data bytes `----.----'
96 |
97 .- 'IP Packet' expands, if WEP enabled, to <--'
98 |
99 V
100 ,-----------------------.
101Bytes | 4 | 0-2296 | 4 |
102 |-----|-----------|-----|
103Desc. | IV | Encrypted | ICV |
104 | | IP Packet | |
105 `-----------------------'
106Total: 8 non-data bytes
107
108
109802.3 Ethernet Data Frame
110
111 ,-----------------------------------------.
112Bytes | 6 | 6 | 2 | Variable | 4 |
113 |-------|-------|------|-----------|------|
114Desc. | Dest. | Source| Type | IP Packet | fcs |
115 | MAC | MAC | | | |
116 `-----------------------------------------'
117Total: 18 non-data bytes
118
119In the event that fragmentation is required, the incoming payload is split into
120N parts of size ieee->fts. The first fragment contains the SNAP header and the
121remaining packets are just data.
122
123If encryption is enabled, each fragment payload size is reduced by enough space
124to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
125So if you have 1500 bytes of payload with ieee->fts set to 500 without
126encryption it will take 3 frames. With WEP it will take 4 frames as the
127payload of each frame is reduced to 492 bytes.
128
129* SKB visualization
130*
131* ,- skb->data
132* |
133* | ETHERNET HEADER ,-<-- PAYLOAD
134* | | 14 bytes from skb->data
135* | 2 bytes for Type --> ,T. | (sizeof ethhdr)
136* | | | |
137* |,-Dest.--. ,--Src.---. | | |
138* | 6 bytes| | 6 bytes | | | |
139* v | | | | | |
140* 0 | v 1 | v | v 2
141* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
142* ^ | ^ | ^ |
143* | | | | | |
144* | | | | `T' <---- 2 bytes for Type
145* | | | |
146* | | '---SNAP--' <-------- 6 bytes for SNAP
147* | |
148* `-IV--' <-------------------- 4 bytes for IV (WEP)
149*
150* SNAP HEADER
151*
152*/
153
154static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
155static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
156
157static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
158{
159 struct ieee80211_snap_hdr *snap;
160 u8 *oui;
161
162 snap = (struct ieee80211_snap_hdr *)data;
163 snap->dsap = 0xaa;
164 snap->ssap = 0xaa;
165 snap->ctrl = 0x03;
166
167 if (h_proto == 0x8137 || h_proto == 0x80f3)
168 oui = P802_1H_OUI;
169 else
170 oui = RFC1042_OUI;
171 snap->oui[0] = oui[0];
172 snap->oui[1] = oui[1];
173 snap->oui[2] = oui[2];
174
175 *(u16 *)(data + SNAP_SIZE) = htons(h_proto);
176
177 return SNAP_SIZE + sizeof(u16);
178}
179
180int ieee80211_encrypt_fragment(struct ieee80211_device *ieee,
181 struct sk_buff *frag, int hdr_len)
182{
183 struct ieee80211_crypt_data* crypt = ieee->crypt[ieee->tx_keyidx];
184 int res;
185
186 /*
187 * added to care about null crypt condition, to solve that system hangs
188 * when shared keys error
189 */
190 if (!crypt || !crypt->ops)
191 return -1;
192
193#ifdef CONFIG_IEEE80211_CRYPT_TKIP
194 struct ieee80211_hdr_4addr *header;
195
196 if (ieee->tkip_countermeasures &&
197 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
198 header = (struct ieee80211_hdr_4addr *)frag->data;
199 if (net_ratelimit()) {
200 netdev_dbg(ieee->dev, "TKIP countermeasures: dropped "
201 "TX packet to %pM\n", header->addr1);
202 }
203 return -1;
204 }
205#endif
206 /*
207 * To encrypt, frame format is:
208 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes)
209 *
210 * PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU
211 * encryption.
212 *
213 * Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
214 * call both MSDU and MPDU encryption functions from here.
215 */
216 atomic_inc(&crypt->refcnt);
217 res = 0;
218 if (crypt->ops->encrypt_msdu)
219 res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
220 if (res == 0 && crypt->ops->encrypt_mpdu)
221 res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
222
223 atomic_dec(&crypt->refcnt);
224 if (res < 0) {
225 netdev_info(ieee->dev, "Encryption failed: len=%d.\n", frag->len);
226 ieee->ieee_stats.tx_discards++;
227 return -1;
228 }
229
230 return 0;
231}
232
233
234void ieee80211_txb_free(struct ieee80211_txb *txb)
235{
236 int i;
237 if (unlikely(!txb))
238 return;
239 for (i = 0; i < txb->nr_frags; i++)
240 if (txb->fragments[i])
241 dev_kfree_skb_any(txb->fragments[i]);
242 kfree(txb);
243}
244
245static struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
246 gfp_t gfp_mask)
247{
248 struct ieee80211_txb *txb;
249 int i;
250 txb = kmalloc(
251 sizeof(struct ieee80211_txb) + (sizeof(u8 *) * nr_frags),
252 gfp_mask);
253 if (!txb)
254 return NULL;
255
256 memset(txb, 0, sizeof(struct ieee80211_txb));
257 txb->nr_frags = nr_frags;
258 txb->frag_size = txb_size;
259
260 for (i = 0; i < nr_frags; i++) {
261 txb->fragments[i] = dev_alloc_skb(txb_size);
262 if (unlikely(!txb->fragments[i])) {
263 i--;
264 break;
265 }
266 }
267 if (unlikely(i != nr_frags)) {
268 while (i >= 0)
269 dev_kfree_skb_any(txb->fragments[i--]);
270 kfree(txb);
271 return NULL;
272 }
273 return txb;
274}
275
276/*
277 * Classify the to-be send data packet
278 * Need to acquire the sent queue index.
279 */
280static int ieee80211_classify(struct sk_buff *skb,
281 struct ieee80211_network *network)
282{
283 struct ether_header *eh = (struct ether_header *)skb->data;
284 unsigned int wme_UP = 0;
285
286 if (!network->QoS_Enable) {
287 skb->priority = 0;
288 return(wme_UP);
289 }
290
291 if (eh->ether_type == __constant_htons(ETHERTYPE_IP)) {
292 const struct iphdr *ih = (struct iphdr *)(skb->data +
293 sizeof(struct ether_header));
294 wme_UP = (ih->tos >> 5)&0x07;
295 } else if (vlan_tx_tag_present(skb)) {/* vtag packet */
296#ifndef VLAN_PRI_SHIFT
297#define VLAN_PRI_SHIFT 13 /* Shift to find VLAN user priority */
298#define VLAN_PRI_MASK 7 /* Mask for user priority bits in VLAN */
299#endif
300 u32 tag = vlan_tx_tag_get(skb);
301 wme_UP = (tag >> VLAN_PRI_SHIFT) & VLAN_PRI_MASK;
302 } else if (ETH_P_PAE == ntohs(((struct ethhdr *)skb->data)->h_proto)) {
303 wme_UP = 7;
304 }
305
306 skb->priority = wme_UP;
307 return(wme_UP);
308}
309
310/* SKBs are added to the ieee->tx_queue. */
311int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
312{
313 struct ieee80211_device *ieee = netdev_priv(dev);
314 struct ieee80211_txb *txb = NULL;
315 struct ieee80211_hdr_3addrqos *frag_hdr;
316 int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
317 unsigned long flags;
318 struct net_device_stats *stats = &ieee->stats;
319 int ether_type, encrypt;
320 int bytes, fc, qos_ctl, hdr_len;
321 struct sk_buff *skb_frag;
322 struct ieee80211_hdr_3addrqos header = { /* Ensure zero initialized */
323 .duration_id = 0,
324 .seq_ctl = 0,
325 .qos_ctl = 0
326 };
327 u8 dest[ETH_ALEN], src[ETH_ALEN];
328
329 struct ieee80211_crypt_data* crypt;
330
331 spin_lock_irqsave(&ieee->lock, flags);
332
333 /*
334 * If there is no driver handler to take the TXB, don't bother
335 * creating it...
336 */
337 if ((!ieee->hard_start_xmit &&
338 !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)) ||
339 ((!ieee->softmac_data_hard_start_xmit &&
340 (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
341 netdev_warn(ieee->dev, "No xmit handler.\n");
342 goto success;
343 }
344
345 ieee80211_classify(skb,&ieee->current_network);
346 if (likely(ieee->raw_tx == 0)){
347
348 if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
349 netdev_warn(ieee->dev, "skb too small (%d).\n", skb->len);
350 goto success;
351 }
352
353 ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
354
355 crypt = ieee->crypt[ieee->tx_keyidx];
356
357 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
358 ieee->host_encrypt && crypt && crypt->ops;
359
360 if (!encrypt && ieee->ieee802_1x &&
361 ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
362 stats->tx_dropped++;
363 goto success;
364 }
365
366 #ifdef CONFIG_IEEE80211_DEBUG
367 if (crypt && !encrypt && ether_type == ETH_P_PAE) {
368 struct eapol *eap = (struct eapol *)(skb->data +
369 sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
370 IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
371 eap_get_type(eap->type));
372 }
373 #endif
374
375 /* Save source and destination addresses */
376 memcpy(&dest, skb->data, ETH_ALEN);
377 memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
378
379 /* Advance the SKB to the start of the payload */
380 skb_pull(skb, sizeof(struct ethhdr));
381
382 /* Determine total amount of storage required for TXB packets */
383 bytes = skb->len + SNAP_SIZE + sizeof(u16);
384
385 if (ieee->current_network.QoS_Enable) {
386 if (encrypt)
387 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA |
388 IEEE80211_FCTL_WEP;
389 else
390 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
391
392 } else {
393 if (encrypt)
394 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
395 IEEE80211_FCTL_WEP;
396 else
397 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
398 }
399
400 if (ieee->iw_mode == IW_MODE_INFRA) {
401 fc |= IEEE80211_FCTL_TODS;
402 /* To DS: Addr1 = BSSID, Addr2 = SA, Addr3 = DA */
403 memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
404 memcpy(&header.addr2, &src, ETH_ALEN);
405 memcpy(&header.addr3, &dest, ETH_ALEN);
406 } else if (ieee->iw_mode == IW_MODE_ADHOC) {
407 /*
408 * not From/To DS: Addr1 = DA, Addr2 = SA,
409 * Addr3 = BSSID
410 */
411 memcpy(&header.addr1, dest, ETH_ALEN);
412 memcpy(&header.addr2, src, ETH_ALEN);
413 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
414 }
415 header.frame_ctl = cpu_to_le16(fc);
416
417 /*
418 * Determine fragmentation size based on destination (multicast
419 * and broadcast are not fragmented)
420 */
421 if (is_multicast_ether_addr(header.addr1)) {
422 frag_size = MAX_FRAG_THRESHOLD;
423 qos_ctl = QOS_CTL_NOTCONTAIN_ACK;
424 } else {
425 /* default:392 */
426 frag_size = ieee->fts;
427 qos_ctl = 0;
428 }
429
430 if (ieee->current_network.QoS_Enable) {
431 hdr_len = IEEE80211_3ADDR_LEN + 2;
432 /* skb->priority is set in the ieee80211_classify() */
433 qos_ctl |= skb->priority;
434 header.qos_ctl = cpu_to_le16(qos_ctl);
435 } else {
436 hdr_len = IEEE80211_3ADDR_LEN;
437 }
438
439 /*
440 * Determine amount of payload per fragment. Regardless of if
441 * this stack is providing the full 802.11 header, one will
442 * eventually be affixed to this fragment -- so we must account
443 * for it when determining the amount of payload space.
444 */
445 bytes_per_frag = frag_size - hdr_len;
446 if (ieee->config &
447 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
448 bytes_per_frag -= IEEE80211_FCS_LEN;
449
450 /* Each fragment may need to have room for encryption pre/postfix */
451 if (encrypt)
452 bytes_per_frag -= crypt->ops->extra_prefix_len +
453 crypt->ops->extra_postfix_len;
454
455 /*
456 * Number of fragments is the total bytes_per_frag /
457 * payload_per_fragment
458 */
459 nr_frags = bytes / bytes_per_frag;
460 bytes_last_frag = bytes % bytes_per_frag;
461 if (bytes_last_frag)
462 nr_frags++;
463 else
464 bytes_last_frag = bytes_per_frag;
465
466 /*
467 * When we allocate the TXB we allocate enough space for the
468 * reserve and full fragment bytes (bytes_per_frag doesn't
469 * include prefix, postfix, header, FCS, etc.)
470 */
471 txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
472 if (unlikely(!txb)) {
473 netdev_warn(ieee->dev, "Could not allocate TXB\n");
474 goto failed;
475 }
476 txb->encrypted = encrypt;
477 txb->payload_size = bytes;
478
479 for (i = 0; i < nr_frags; i++) {
480 skb_frag = txb->fragments[i];
481 skb_frag->priority = UP2AC(skb->priority);
482 if (encrypt)
483 skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
484
485 frag_hdr = (struct ieee80211_hdr_3addrqos *)skb_put(
486 skb_frag, hdr_len);
487 memcpy(frag_hdr, &header, hdr_len);
488
489 /*
490 * If this is not the last fragment, then add the MOREFRAGS
491 * bit to the frame control
492 */
493 if (i != nr_frags - 1) {
494 frag_hdr->frame_ctl = cpu_to_le16(
495 fc | IEEE80211_FCTL_MOREFRAGS);
496 bytes = bytes_per_frag;
497
498 } else {
499 /* The last fragment takes the remaining length */
500 bytes = bytes_last_frag;
501 }
502 if (ieee->current_network.QoS_Enable) {
503 /*
504 * add 1 only indicate to corresponding seq
505 * number control 2006/7/12
506 */
507 frag_hdr->seq_ctl = cpu_to_le16(
508 ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i);
509 } else {
510 frag_hdr->seq_ctl = cpu_to_le16(
511 ieee->seq_ctrl[0]<<4 | i);
512 }
513
514 /* Put a SNAP header on the first fragment */
515 if (i == 0) {
516 ieee80211_put_snap(
517 skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
518 ether_type);
519 bytes -= SNAP_SIZE + sizeof(u16);
520 }
521
522 memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
523
524 /* Advance the SKB... */
525 skb_pull(skb, bytes);
526
527 /*
528 * Encryption routine will move the header forward in
529 * order to insert the IV between the header and the
530 * payload
531 */
532 if (encrypt)
533 ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
534 if (ieee->config &
535 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
536 skb_put(skb_frag, 4);
537 }
538 /* Advance sequence number in data frame. */
539 if (ieee->current_network.QoS_Enable) {
540 if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
541 ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
542 else
543 ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
544 } else {
545 if (ieee->seq_ctrl[0] == 0xFFF)
546 ieee->seq_ctrl[0] = 0;
547 else
548 ieee->seq_ctrl[0]++;
549 }
550 } else {
551 if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) {
552 netdev_warn(ieee->dev, "skb too small (%d).\n", skb->len);
553 goto success;
554 }
555
556 txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC);
557 if (!txb) {
558 netdev_warn(ieee->dev, "Could not allocate TXB\n");
559 goto failed;
560 }
561
562 txb->encrypted = 0;
563 txb->payload_size = skb->len;
564 memcpy(skb_put(txb->fragments[0], skb->len), skb->data, skb->len);
565 }
566
567 success:
568 spin_unlock_irqrestore(&ieee->lock, flags);
569 dev_kfree_skb_any(skb);
570 if (txb) {
571 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE) {
572 ieee80211_softmac_xmit(txb, ieee);
573 } else {
574 if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
575 stats->tx_packets++;
576 stats->tx_bytes += txb->payload_size;
577 return NETDEV_TX_OK;
578 }
579 ieee80211_txb_free(txb);
580 }
581 }
582
583 return NETDEV_TX_OK;
584
585 failed:
586 spin_unlock_irqrestore(&ieee->lock, flags);
587 netif_stop_queue(dev);
588 stats->tx_errors++;
589 return NETDEV_TX_BUSY;
590
591}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
deleted file mode 100644
index 07c3f715a6f5..000000000000
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
+++ /dev/null
@@ -1,713 +0,0 @@
1/*
2 * Copyright(c) 2004 Intel Corporation. All rights reserved.
3 *
4 * Portions of this file are based on the WEP enablement code provided by the
5 * Host AP project hostap-drivers v0.1.3
6 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
7 * <jkmaline@cc.hut.fi>
8 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called LICENSE.
25 *
26 * Contact Information:
27 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
28 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
29 */
30
31#include <linux/wireless.h>
32#include <linux/kmod.h>
33#include <linux/slab.h>
34#include <linux/module.h>
35#include <linux/etherdevice.h>
36
37#include "ieee80211.h"
38static const char *ieee80211_modes[] = {
39 "?", "a", "b", "ab", "g", "ag", "bg", "abg"
40};
41
42#define MAX_CUSTOM_LEN 64
43static inline char *rtl818x_translate_scan(struct ieee80211_device *ieee,
44 char *start, char *stop,
45 struct ieee80211_network *network,
46 struct iw_request_info *info)
47{
48 char custom[MAX_CUSTOM_LEN];
49 char *p;
50 struct iw_event iwe;
51 int i, j;
52 u8 max_rate, rate;
53
54 /* First entry *MUST* be the AP MAC address */
55 iwe.cmd = SIOCGIWAP;
56 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
57 ether_addr_copy(iwe.u.ap_addr.sa_data, network->bssid);
58 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
59
60 /* Remaining entries will be displayed in the order we provide them */
61
62 /* Add the ESSID */
63 iwe.cmd = SIOCGIWESSID;
64 iwe.u.data.flags = 1;
65 if (network->ssid_len == 0) {
66 iwe.u.data.length = sizeof("<hidden>");
67 start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
68 } else {
69 iwe.u.data.length = min_t(u8, network->ssid_len, 32);
70 start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
71 }
72 /* Add the protocol name */
73 iwe.cmd = SIOCGIWNAME;
74 snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11%s", ieee80211_modes[network->mode]);
75 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN);
76
77 /* Add mode */
78 iwe.cmd = SIOCGIWMODE;
79 if (network->capability &
80 (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) {
81 if (network->capability & WLAN_CAPABILITY_BSS)
82 iwe.u.mode = IW_MODE_MASTER;
83 else
84 iwe.u.mode = IW_MODE_ADHOC;
85
86 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN);
87 }
88
89 /* Add frequency/channel */
90 iwe.cmd = SIOCGIWFREQ;
91 iwe.u.freq.m = network->channel;
92 iwe.u.freq.e = 0;
93 iwe.u.freq.i = 0;
94 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN);
95
96 /* Add encryption capability */
97 iwe.cmd = SIOCGIWENCODE;
98 if (network->capability & WLAN_CAPABILITY_PRIVACY)
99 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
100 else
101 iwe.u.data.flags = IW_ENCODE_DISABLED;
102 iwe.u.data.length = 0;
103 start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
104
105 /* Add basic and extended rates */
106 max_rate = 0;
107 p = custom;
108 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
109 for (i = 0, j = 0; i < network->rates_len; ) {
110 if (j < network->rates_ex_len &&
111 ((network->rates_ex[j] & 0x7F) <
112 (network->rates[i] & 0x7F)))
113 rate = network->rates_ex[j++] & 0x7F;
114 else
115 rate = network->rates[i++] & 0x7F;
116 if (rate > max_rate)
117 max_rate = rate;
118 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
119 "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
120 }
121 for (; j < network->rates_ex_len; j++) {
122 rate = network->rates_ex[j] & 0x7F;
123 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
124 "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
125 if (rate > max_rate)
126 max_rate = rate;
127 }
128
129 iwe.cmd = SIOCGIWRATE;
130 iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
131 iwe.u.bitrate.value = max_rate * 500000;
132 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN);
133
134 iwe.cmd = IWEVCUSTOM;
135 iwe.u.data.length = p - custom;
136 if (iwe.u.data.length)
137 start = iwe_stream_add_point(info, start, stop, &iwe, custom);
138
139 /* Add quality statistics */
140 /* TODO: Fix these values... */
141 if (network->stats.signal == 0 || network->stats.rssi == 0)
142 netdev_info(ieee->dev, "========>signal:%d, rssi:%d\n",
143 network->stats.signal, network->stats.rssi);
144 iwe.cmd = IWEVQUAL;
145 iwe.u.qual.qual = network->stats.signalstrength;
146 iwe.u.qual.level = network->stats.signal;
147 iwe.u.qual.noise = network->stats.noise;
148 iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
149 if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
150 iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
151 if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
152 iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
153 if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
154 iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
155 iwe.u.qual.updated = 7;
156 start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN);
157
158 iwe.cmd = IWEVCUSTOM;
159 p = custom;
160
161 iwe.u.data.length = p - custom;
162 if (iwe.u.data.length)
163 start = iwe_stream_add_point(info, start, stop, &iwe, custom);
164
165 memset(&iwe, 0, sizeof(iwe));
166 if (network->wpa_ie_len) {
167 char buf[MAX_WPA_IE_LEN];
168 memcpy(buf, network->wpa_ie, network->wpa_ie_len);
169 iwe.cmd = IWEVGENIE;
170 iwe.u.data.length = network->wpa_ie_len;
171 start = iwe_stream_add_point(info, start, stop, &iwe, buf);
172 }
173
174 memset(&iwe, 0, sizeof(iwe));
175 if (network->rsn_ie_len) {
176 char buf[MAX_WPA_IE_LEN];
177 memcpy(buf, network->rsn_ie, network->rsn_ie_len);
178 iwe.cmd = IWEVGENIE;
179 iwe.u.data.length = network->rsn_ie_len;
180 start = iwe_stream_add_point(info, start, stop, &iwe, buf);
181 }
182
183 /* Add EXTRA: Age to display seconds since last beacon/probe response
184 * for given network.
185 */
186 iwe.cmd = IWEVCUSTOM;
187 p = custom;
188 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
189 " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
190 iwe.u.data.length = p - custom;
191 if (iwe.u.data.length)
192 start = iwe_stream_add_point(info, start, stop, &iwe, custom);
193
194 return start;
195}
196
197int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
198 struct iw_request_info *info,
199 union iwreq_data *wrqu, char *extra)
200{
201 struct ieee80211_network *network;
202 unsigned long flags;
203 int err = 0;
204 char *ev = extra;
205 char *stop = ev + wrqu->data.length;
206 int i = 0;
207
208 IEEE80211_DEBUG_WX("Getting scan\n");
209 down(&ieee->wx_sem);
210 spin_lock_irqsave(&ieee->lock, flags);
211
212 if (!ieee->bHwRadioOff) {
213 list_for_each_entry(network, &ieee->network_list, list) {
214 i++;
215
216 if ((stop-ev) < 200) {
217 err = -E2BIG;
218 break;
219 }
220 if (ieee->scan_age == 0 ||
221 time_after(network->last_scanned + ieee->scan_age, jiffies)) {
222 ev = rtl818x_translate_scan(ieee, ev, stop, network, info);
223 } else
224 IEEE80211_DEBUG_SCAN(
225 "Not showing network '%s ("
226 "%pM)' due to age (%lums).\n",
227 escape_essid(network->ssid,
228 network->ssid_len),
229 network->bssid,
230 (jiffies - network->last_scanned) / (HZ / 100));
231 }
232 }
233 spin_unlock_irqrestore(&ieee->lock, flags);
234 up(&ieee->wx_sem);
235 wrqu->data.length = ev - extra;
236 wrqu->data.flags = 0;
237 IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
238
239 return err;
240}
241
242int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
243 struct iw_request_info *info,
244 union iwreq_data *wrqu, char *keybuf)
245{
246 struct iw_point *erq = &(wrqu->encoding);
247 struct net_device *dev = ieee->dev;
248 struct ieee80211_security sec = {
249 .flags = 0
250 };
251 int i, key, key_provided, len;
252 struct ieee80211_crypt_data **crypt;
253
254 IEEE80211_DEBUG_WX("SET_ENCODE\n");
255
256 key = erq->flags & IW_ENCODE_INDEX;
257 if (key) {
258 if (key > WEP_KEYS)
259 return -EINVAL;
260 key--;
261 key_provided = 1;
262 } else {
263 key_provided = 0;
264 key = ieee->tx_keyidx;
265 }
266
267 IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
268 "provided" : "default");
269
270 crypt = &ieee->crypt[key];
271
272 if (erq->flags & IW_ENCODE_DISABLED) {
273 if (key_provided && *crypt) {
274 IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
275 key);
276 ieee80211_crypt_delayed_deinit(ieee, crypt);
277 } else
278 IEEE80211_DEBUG_WX("Disabling encryption.\n");
279
280 /* Check all the keys to see if any are still configured,
281 * and if no key index was provided, de-init them all.
282 */
283 for (i = 0; i < WEP_KEYS; i++) {
284 if (ieee->crypt[i] != NULL) {
285 if (key_provided)
286 break;
287 ieee80211_crypt_delayed_deinit(
288 ieee, &ieee->crypt[i]);
289 }
290 }
291
292 if (i == WEP_KEYS) {
293 sec.enabled = 0;
294 sec.level = SEC_LEVEL_0;
295 sec.flags |= SEC_ENABLED | SEC_LEVEL;
296 }
297
298 goto done;
299 }
300
301 sec.enabled = 1;
302 sec.flags |= SEC_ENABLED;
303
304 if (*crypt != NULL && (*crypt)->ops != NULL &&
305 strcmp((*crypt)->ops->name, "WEP") != 0) {
306 /* changing to use WEP; deinit previously used algorithm
307 * on this key.
308 */
309 ieee80211_crypt_delayed_deinit(ieee, crypt);
310 }
311
312 if (*crypt == NULL) {
313 struct ieee80211_crypt_data *new_crypt;
314
315 /* take WEP into use */
316 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
317 GFP_KERNEL);
318 if (new_crypt == NULL)
319 return -ENOMEM;
320 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
321 if (!new_crypt->ops)
322 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
323
324 if (new_crypt->ops)
325 new_crypt->priv = new_crypt->ops->init(key);
326
327 if (!new_crypt->ops || !new_crypt->priv) {
328 kfree(new_crypt);
329 new_crypt = NULL;
330
331 netdev_warn(ieee->dev,
332 "could not initialize WEP: load module ieee80211_crypt_wep\n");
333 return -EOPNOTSUPP;
334 }
335 *crypt = new_crypt;
336 }
337
338 /* If a new key was provided, set it up */
339 if (erq->length > 0) {
340 len = erq->length <= 5 ? 5 : 13;
341 memcpy(sec.keys[key], keybuf, erq->length);
342 if (len > erq->length)
343 memset(sec.keys[key] + erq->length, 0,
344 len - erq->length);
345 IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
346 key, escape_essid(sec.keys[key], len),
347 erq->length, len);
348 sec.key_sizes[key] = len;
349 (*crypt)->ops->set_key(sec.keys[key], len, NULL,
350 (*crypt)->priv);
351 sec.flags |= (1 << key);
352 /* This ensures a key will be activated if no key is
353 * explicitly set.
354 */
355 if (key == sec.active_key)
356 sec.flags |= SEC_ACTIVE_KEY;
357 ieee->tx_keyidx = key;
358 } else {
359 len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
360 NULL, (*crypt)->priv);
361 if (len == 0) {
362 /* Set a default key of all 0 */
363 IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
364 key);
365 memset(sec.keys[key], 0, 13);
366 (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
367 (*crypt)->priv);
368 sec.key_sizes[key] = 13;
369 sec.flags |= (1 << key);
370 }
371
372 /* No key data - just set the default TX key index */
373 if (key_provided) {
374 IEEE80211_DEBUG_WX(
375 "Setting key %d to default Tx key.\n", key);
376 ieee->tx_keyidx = key;
377 sec.active_key = key;
378 sec.flags |= SEC_ACTIVE_KEY;
379 }
380 }
381
382 done:
383 ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
384 sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
385 sec.flags |= SEC_AUTH_MODE;
386 IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
387 "OPEN" : "SHARED KEY");
388
389 /* For now we just support WEP, so only set that security level...
390 * TODO: When WPA is added this is one place that needs to change
391 */
392 sec.flags |= SEC_LEVEL;
393 sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
394
395 if (ieee->set_security)
396 ieee->set_security(dev, &sec);
397
398 /* Do not reset port if card is in Managed mode since resetting will
399 * generate new IEEE 802.11 authentication which may end up in looping
400 * with IEEE 802.1X. If your hardware requires a reset after WEP
401 * configuration (for example... Prism2), implement the reset_port in
402 * the callbacks structures used to initialize the 802.11 stack.
403 */
404 if (ieee->reset_on_keychange &&
405 ieee->iw_mode != IW_MODE_INFRA &&
406 ieee->reset_port && ieee->reset_port(dev)) {
407 netdev_dbg(ieee->dev, "reset_port failed\n");
408 return -EINVAL;
409 }
410 return 0;
411}
412
413int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
414 struct iw_request_info *info,
415 union iwreq_data *wrqu, char *keybuf)
416{
417 struct iw_point *erq = &(wrqu->encoding);
418 int len, key;
419 struct ieee80211_crypt_data *crypt;
420
421 IEEE80211_DEBUG_WX("GET_ENCODE\n");
422
423 if (ieee->iw_mode == IW_MODE_MONITOR)
424 return -1;
425
426 key = erq->flags & IW_ENCODE_INDEX;
427 if (key) {
428 if (key > WEP_KEYS)
429 return -EINVAL;
430 key--;
431 } else
432 key = ieee->tx_keyidx;
433
434 crypt = ieee->crypt[key];
435 erq->flags = key + 1;
436
437 if (crypt == NULL || crypt->ops == NULL) {
438 erq->length = 0;
439 erq->flags |= IW_ENCODE_DISABLED;
440 return 0;
441 }
442
443 if (strcmp(crypt->ops->name, "WEP") != 0) {
444 /* only WEP is supported with wireless extensions, so just
445 * report that encryption is used.
446 */
447 erq->length = 0;
448 erq->flags |= IW_ENCODE_ENABLED;
449 return 0;
450 }
451
452 len = crypt->ops->get_key(keybuf, WEP_KEY_LEN, NULL, crypt->priv);
453 erq->length = (len >= 0 ? len : 0);
454
455 erq->flags |= IW_ENCODE_ENABLED;
456
457 if (ieee->open_wep)
458 erq->flags |= IW_ENCODE_OPEN;
459 else
460 erq->flags |= IW_ENCODE_RESTRICTED;
461
462 return 0;
463}
464
465int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
466 struct iw_request_info *info,
467 union iwreq_data *wrqu, char *extra)
468{
469 struct net_device *dev = ieee->dev;
470 struct iw_point *encoding = &wrqu->encoding;
471 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
472 int i, idx, ret = 0;
473 int group_key = 0;
474 const char *alg;
475 struct ieee80211_crypto_ops *ops;
476 struct ieee80211_crypt_data **crypt;
477
478 struct ieee80211_security sec = {
479 .flags = 0,
480 };
481 idx = encoding->flags & IW_ENCODE_INDEX;
482 if (idx) {
483 if (idx < 1 || idx > WEP_KEYS)
484 return -EINVAL;
485 idx--;
486 } else
487 idx = ieee->tx_keyidx;
488
489 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
490 crypt = &ieee->crypt[idx];
491 group_key = 1;
492 } else {
493 /* some Cisco APs use idx>0 for unicast in dynamic WEP */
494 if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
495 return -EINVAL;
496 if (ieee->iw_mode == IW_MODE_INFRA)
497 crypt = &ieee->crypt[idx];
498 else
499 return -EINVAL;
500 }
501
502 sec.flags |= SEC_ENABLED;
503 if ((encoding->flags & IW_ENCODE_DISABLED) ||
504 ext->alg == IW_ENCODE_ALG_NONE) {
505 if (*crypt)
506 ieee80211_crypt_delayed_deinit(ieee, crypt);
507
508 for (i = 0; i < WEP_KEYS; i++)
509 if (ieee->crypt[i] != NULL)
510 break;
511
512 if (i == WEP_KEYS) {
513 sec.enabled = 0;
514 sec.level = SEC_LEVEL_0;
515 sec.flags |= SEC_LEVEL;
516 }
517 goto done;
518 }
519
520 sec.enabled = 1;
521
522 switch (ext->alg) {
523 case IW_ENCODE_ALG_WEP:
524 alg = "WEP";
525 break;
526 case IW_ENCODE_ALG_TKIP:
527 alg = "TKIP";
528 break;
529 case IW_ENCODE_ALG_CCMP:
530 alg = "CCMP";
531 break;
532 default:
533 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
534 dev->name, ext->alg);
535 ret = -EINVAL;
536 goto done;
537 }
538
539 ops = ieee80211_get_crypto_ops(alg);
540 if (ops == NULL)
541 ops = ieee80211_get_crypto_ops(alg);
542 if (ops == NULL) {
543 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
544 dev->name, ext->alg);
545 netdev_err(ieee->dev, "========>unknown crypto alg %d\n",
546 ext->alg);
547 ret = -EINVAL;
548 goto done;
549 }
550
551 if (*crypt == NULL || (*crypt)->ops != ops) {
552 struct ieee80211_crypt_data *new_crypt;
553
554 ieee80211_crypt_delayed_deinit(ieee, crypt);
555
556 new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
557 if (new_crypt == NULL) {
558 ret = -ENOMEM;
559 goto done;
560 }
561 new_crypt->ops = ops;
562 if (new_crypt->ops)
563 new_crypt->priv = new_crypt->ops->init(idx);
564 if (new_crypt->priv == NULL) {
565 kfree(new_crypt);
566 ret = -EINVAL;
567 goto done;
568 }
569 *crypt = new_crypt;
570
571 }
572
573 if (ext->key_len > 0 && (*crypt)->ops->set_key &&
574 (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
575 (*crypt)->priv) < 0) {
576 IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name);
577 netdev_err(ieee->dev, "key setting failed\n");
578 ret = -EINVAL;
579 goto done;
580 }
581#if 1
582 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
583 ieee->tx_keyidx = idx;
584 sec.active_key = idx;
585 sec.flags |= SEC_ACTIVE_KEY;
586 }
587
588 if (ext->alg != IW_ENCODE_ALG_NONE) {
589 memcpy(sec.keys[idx], ext->key, ext->key_len);
590 sec.key_sizes[idx] = ext->key_len;
591 sec.flags |= (1 << idx);
592 if (ext->alg == IW_ENCODE_ALG_WEP) {
593 sec.flags |= SEC_LEVEL;
594 sec.level = SEC_LEVEL_1;
595 } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
596 sec.flags |= SEC_LEVEL;
597 sec.level = SEC_LEVEL_2;
598 } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
599 sec.flags |= SEC_LEVEL;
600 sec.level = SEC_LEVEL_3;
601 }
602 /* Don't set sec level for group keys. */
603 if (group_key)
604 sec.flags &= ~SEC_LEVEL;
605 }
606#endif
607done:
608 if (ieee->set_security)
609 ieee->set_security(ieee->dev, &sec);
610
611 if (ieee->reset_on_keychange &&
612 ieee->iw_mode != IW_MODE_INFRA &&
613 ieee->reset_port && ieee->reset_port(dev)) {
614 IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name);
615 return -EINVAL;
616 }
617
618 return ret;
619}
620
621int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
622 struct iw_request_info *info,
623 union iwreq_data *wrqu, char *extra)
624{
625 struct iw_mlme *mlme = (struct iw_mlme *) extra;
626#if 1
627 switch (mlme->cmd) {
628 case IW_MLME_DEAUTH:
629 case IW_MLME_DISASSOC:
630 ieee80211_disassociate(ieee);
631 break;
632 default:
633 return -EOPNOTSUPP;
634 }
635#endif
636 return 0;
637}
638
639int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
640 struct iw_request_info *info,
641 struct iw_param *data, char *extra)
642{
643 switch (data->flags & IW_AUTH_INDEX) {
644 case IW_AUTH_WPA_VERSION:
645 /* need to support wpa2 here */
646 break;
647 case IW_AUTH_CIPHER_PAIRWISE:
648 case IW_AUTH_CIPHER_GROUP:
649 case IW_AUTH_KEY_MGMT:
650 /* Host AP driver does not use these parameters and allows
651 * wpa_supplicant to control them internally.
652 */
653 break;
654 case IW_AUTH_TKIP_COUNTERMEASURES:
655 ieee->tkip_countermeasures = data->value;
656 break;
657 case IW_AUTH_DROP_UNENCRYPTED:
658 ieee->drop_unencrypted = data->value;
659 break;
660
661 case IW_AUTH_80211_AUTH_ALG:
662 ieee->open_wep = (data->value&IW_AUTH_ALG_OPEN_SYSTEM) ? 1 : 0;
663 break;
664
665#if 1
666 case IW_AUTH_WPA_ENABLED:
667 ieee->wpa_enabled = (data->value) ? 1 : 0;
668 break;
669
670#endif
671 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
672 ieee->ieee802_1x = data->value;
673 break;
674 case IW_AUTH_PRIVACY_INVOKED:
675 ieee->privacy_invoked = data->value;
676 break;
677 default:
678 return -EOPNOTSUPP;
679 }
680 return 0;
681}
682
683#if 1
684int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
685{
686 u8 *buf = NULL;
687
688 if (len > MAX_WPA_IE_LEN || (len && ie == NULL)) {
689 netdev_err(ieee->dev, "return error out, len:%zu\n", len);
690 return -EINVAL;
691 }
692
693 if (len) {
694 if (len != ie[1]+2) {
695 netdev_err(ieee->dev, "len:%zu, ie:%d\n", len, ie[1]);
696 return -EINVAL;
697 }
698 buf = kmemdup(ie, len, GFP_KERNEL);
699 if (buf == NULL)
700 return -ENOMEM;
701 kfree(ieee->wpa_ie);
702 ieee->wpa_ie = buf;
703 ieee->wpa_ie_len = len;
704 } else {
705 kfree(ieee->wpa_ie);
706 ieee->wpa_ie = NULL;
707 ieee->wpa_ie_len = 0;
708 }
709
710 return 0;
711
712}
713#endif
diff --git a/drivers/staging/rtl8187se/r8180.h b/drivers/staging/rtl8187se/r8180.h
deleted file mode 100644
index 9f931dba1d82..000000000000
--- a/drivers/staging/rtl8187se/r8180.h
+++ /dev/null
@@ -1,640 +0,0 @@
1/*
2 * This is part of rtl8180 OpenSource driver.
3 * Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
4 * Released under the terms of GPL (General Public Licence)
5 *
6 * Parts of this driver are based on the GPL part of the official realtek driver
7 *
8 * Parts of this driver are based on the rtl8180 driver skeleton from Patric
9 * Schenke & Andres Salomon
10 *
11 * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
12 *
13 * We want to thanks the Authors of those projects and the Ndiswrapper project
14 * Authors.
15 */
16
17#ifndef R8180H
18#define R8180H
19
20#include <linux/interrupt.h>
21
22#define RTL8180_MODULE_NAME "r8180"
23#define DMESG(x, a...) printk(KERN_INFO RTL8180_MODULE_NAME ": " x "\n", ## a)
24#define DMESGW(x, a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": WW:" x "\n", ## a)
25#define DMESGE(x, a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": EE:" x "\n", ## a)
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/ioport.h>
30#include <linux/sched.h>
31#include <linux/types.h>
32#include <linux/slab.h>
33#include <linux/netdevice.h>
34#include <linux/pci.h>
35#include <linux/etherdevice.h>
36#include <linux/delay.h>
37#include <linux/rtnetlink.h> /* for rtnl_lock() */
38#include <linux/wireless.h>
39#include <linux/timer.h>
40#include <linux/proc_fs.h> /* Necessary because we use the proc fs. */
41#include <linux/if_arp.h>
42#include "ieee80211/ieee80211.h"
43#include <asm/io.h>
44
45#define EPROM_93c46 0
46#define EPROM_93c56 1
47
48#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
49
50#define DEFAULT_FRAG_THRESHOLD 2342U
51#define MIN_FRAG_THRESHOLD 256U
52#define DEFAULT_RTS_THRESHOLD 2342U
53#define MIN_RTS_THRESHOLD 0U
54#define MAX_RTS_THRESHOLD 2342U
55#define DEFAULT_BEACONINTERVAL 0x64U
56
57#define DEFAULT_RETRY_RTS 7
58#define DEFAULT_RETRY_DATA 7
59
60#define BEACON_QUEUE 6
61
62#define aSifsTime 10
63
64#define sCrcLng 4
65#define sAckCtsLng 112 /* bits in ACK and CTS frames. */
66/* +by amy 080312. */
67#define RATE_ADAPTIVE_TIMER_PERIOD 300
68
69enum wireless_mode {
70 WIRELESS_MODE_UNKNOWN = 0x00,
71 WIRELESS_MODE_A = 0x01,
72 WIRELESS_MODE_B = 0x02,
73 WIRELESS_MODE_G = 0x04,
74 WIRELESS_MODE_AUTO = 0x08,
75};
76
77struct chnl_access_setting {
78 u16 sifs_timer;
79 u16 difs_timer;
80 u16 slot_time_timer;
81 u16 eifs_timer;
82 u16 cwmin_index;
83 u16 cwmax_index;
84};
85
86enum nic_t {
87 NIC_8185 = 1,
88 NIC_8185B
89};
90
91typedef u32 AC_CODING;
92#define AC0_BE 0 /* ACI: 0x00 */ /* Best Effort. */
93#define AC1_BK 1 /* ACI: 0x01 */ /* Background. */
94#define AC2_VI 2 /* ACI: 0x10 */ /* Video. */
95#define AC3_VO 3 /* ACI: 0x11 */ /* Voice. */
96#define AC_MAX 4 /* Max: define total number; Should not to be used as a real
97 * enum.
98 */
99
100/*
101 * ECWmin/ECWmax field.
102 * Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
103 */
104typedef union _ECW {
105 u8 charData;
106 struct {
107 u8 ECWmin:4;
108 u8 ECWmax:4;
109 } f; /* Field */
110} ECW, *PECW;
111
112/*
113 * ACI/AIFSN Field. Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
114 */
115typedef union _ACI_AIFSN {
116 u8 charData;
117
118 struct {
119 u8 AIFSN:4;
120 u8 ACM:1;
121 u8 ACI:2;
122 u8 Reserved:1;
123 } f; /* Field */
124} ACI_AIFSN, *PACI_AIFSN;
125
126/*
127 * AC Parameters Record Format.
128 * Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
129 */
130typedef union _AC_PARAM {
131 u32 longData;
132 u8 charData[4];
133
134 struct {
135 ACI_AIFSN AciAifsn;
136 ECW Ecw;
137 u16 TXOPLimit;
138 } f; /* Field */
139} AC_PARAM, *PAC_PARAM;
140
141struct buffer {
142 struct buffer *next;
143 u32 *buf;
144 dma_addr_t dma;
145};
146
147/* YJ,modified,080828. */
148struct stats {
149 unsigned long txrdu;
150 unsigned long rxrdu;
151 unsigned long rxnolast;
152 unsigned long rxnodata;
153 unsigned long rxnopointer;
154 unsigned long txnperr;
155 unsigned long txresumed;
156 unsigned long rxerr;
157 unsigned long rxoverflow;
158 unsigned long rxint;
159 unsigned long txbkpokint;
160 unsigned long txbepoking;
161 unsigned long txbkperr;
162 unsigned long txbeperr;
163 unsigned long txnpokint;
164 unsigned long txhpokint;
165 unsigned long txhperr;
166 unsigned long ints;
167 unsigned long shints;
168 unsigned long txoverflow;
169 unsigned long rxdmafail;
170 unsigned long txbeacon;
171 unsigned long txbeaconerr;
172 unsigned long txlpokint;
173 unsigned long txlperr;
174 unsigned long txretry; /* retry number tony 20060601 */
175 unsigned long rxcrcerrmin; /* crc error (0-500) */
176 unsigned long rxcrcerrmid; /* crc error (500-1000) */
177 unsigned long rxcrcerrmax; /* crc error (>1000) */
178 unsigned long rxicverr; /* ICV error */
179};
180
181#define MAX_LD_SLOT_NUM 10
182#define KEEP_ALIVE_INTERVAL 20 /* in seconds. */
183#define CHECK_FOR_HANG_PERIOD 2 /* be equal to watchdog check time. */
184#define DEFAULT_KEEP_ALIVE_LEVEL 1
185#define DEFAULT_SLOT_NUM 2
186#define POWER_PROFILE_AC 0
187#define POWER_PROFILE_BATTERY 1
188
189struct link_detect_t {
190 u32 rx_frame_num[MAX_LD_SLOT_NUM]; /* number of Rx Frame.
191 * CheckForHang_period to determine
192 * link status.
193 */
194 u16 slot_num; /* number of CheckForHang period to determine link status,
195 * default is 2.
196 */
197 u16 slot_index;
198 u32 num_tx_ok_in_period; /* number of packet transmitted during
199 * CheckForHang.
200 */
201 u32 num_rx_ok_in_period; /* number of packet received during
202 * CheckForHang.
203 */
204 u8 idle_count; /* (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD) */
205 u32 last_num_tx_unicast;
206 u32 last_num_rx_unicast;
207
208 bool b_busy_traffic; /* when it is set to 1, UI cann't scan at will. */
209};
210
211/* YJ,modified,080828,end */
212
213/* by amy for led
214 * ==========================================================================
215 * LED customization.
216 * ==========================================================================
217 */
218enum led_strategy_8185 {
219 SW_LED_MODE0,
220 SW_LED_MODE1,
221 HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different
222 * control modes). */
223};
224
225enum rt_rf_power_state {
226 RF_ON,
227 RF_SLEEP,
228 RF_OFF
229};
230
231enum _ReasonCode {
232 unspec_reason = 0x1,
233 auth_not_valid = 0x2,
234 deauth_lv_ss = 0x3,
235 inactivity = 0x4,
236 ap_overload = 0x5,
237 class2_err = 0x6,
238 class3_err = 0x7,
239 disas_lv_ss = 0x8,
240 asoc_not_auth = 0x9,
241
242 /* ----MIC_CHECK */
243 mic_failure = 0xe,
244 /* ----END MIC_CHECK */
245
246 /* Reason code defined in 802.11i D10.0 p.28. */
247 invalid_IE = 0x0d,
248 four_way_tmout = 0x0f,
249 two_way_tmout = 0x10,
250 IE_dismatch = 0x11,
251 invalid_Gcipher = 0x12,
252 invalid_Pcipher = 0x13,
253 invalid_AKMP = 0x14,
254 unsup_RSNIEver = 0x15,
255 invalid_RSNIE = 0x16,
256 auth_802_1x_fail = 0x17,
257 ciper_reject = 0x18,
258
259 /* Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie,
260 * 2005-11-15.
261 */
262 QoS_unspec = 0x20, /* 32 */
263 QAP_bandwidth = 0x21, /* 33 */
264 poor_condition = 0x22, /* 34 */
265 no_facility = 0x23, /* 35 */
266 /* Where is 36??? */
267 req_declined = 0x25, /* 37 */
268 invalid_param = 0x26, /* 38 */
269 req_not_honored = 0x27, /* 39 */
270 TS_not_created = 0x2F, /* 47 */
271 DL_not_allowed = 0x30, /* 48 */
272 dest_not_exist = 0x31, /* 49 */
273 dest_not_QSTA = 0x32, /* 50 */
274};
275
276enum rt_ps_mode {
277 ACTIVE, /* Active/Continuous access. */
278 MAX_PS, /* Max power save mode. */
279 FAST_PS /* Fast power save mode. */
280};
281
282/* by amy for power save. */
283struct r8180_priv {
284 struct pci_dev *pdev;
285
286 short epromtype;
287 int irq;
288 struct ieee80211_device *ieee80211;
289
290 short plcp_preamble_mode; /* 0:auto 1:short 2:long */
291
292 spinlock_t irq_th_lock;
293 spinlock_t tx_lock;
294 spinlock_t ps_lock;
295 spinlock_t rf_ps_lock;
296
297 u16 irq_mask;
298 short irq_enabled;
299 struct net_device *dev;
300 short chan;
301 short sens;
302 short max_sens;
303 u8 chtxpwr[15]; /* channels from 1 to 14, 0 not used. */
304 u8 chtxpwr_ofdm[15]; /* channels from 1 to 14, 0 not used. */
305 u8 channel_plan; /* it's the channel plan index. */
306 short up;
307 short crcmon; /* if 1 allow bad crc frame reception in monitor mode. */
308
309 struct timer_list scan_timer;
310 spinlock_t scan_lock;
311 u8 active_probe;
312 struct semaphore wx_sem;
313 short hw_wep;
314
315 short digphy;
316 short antb;
317 short diversity;
318 u32 key0[4];
319 short (*rf_set_sens)(struct net_device *dev, short sens);
320 void (*rf_set_chan)(struct net_device *dev, short ch);
321 void (*rf_close)(struct net_device *dev);
322 void (*rf_init)(struct net_device *dev);
323 void (*rf_sleep)(struct net_device *dev);
324 void (*rf_wakeup)(struct net_device *dev);
325 /* short rate; */
326 short promisc;
327 /* stats */
328 struct stats stats;
329 struct link_detect_t link_detect; /* YJ,add,080828 */
330 struct iw_statistics wstats;
331
332 /* RX stuff. */
333 u32 *rxring;
334 u32 *rxringtail;
335 dma_addr_t rxringdma;
336 struct buffer *rxbuffer;
337 struct buffer *rxbufferhead;
338 int rxringcount;
339 u16 rxbuffersize;
340
341 struct sk_buff *rx_skb;
342
343 short rx_skb_complete;
344
345 u32 rx_prevlen;
346
347 u32 *txmapring;
348 u32 *txbkpring;
349 u32 *txbepring;
350 u32 *txvipring;
351 u32 *txvopring;
352 u32 *txhpring;
353 dma_addr_t txmapringdma;
354 dma_addr_t txbkpringdma;
355 dma_addr_t txbepringdma;
356 dma_addr_t txvipringdma;
357 dma_addr_t txvopringdma;
358 dma_addr_t txhpringdma;
359 u32 *txmapringtail;
360 u32 *txbkpringtail;
361 u32 *txbepringtail;
362 u32 *txvipringtail;
363 u32 *txvopringtail;
364 u32 *txhpringtail;
365 u32 *txmapringhead;
366 u32 *txbkpringhead;
367 u32 *txbepringhead;
368 u32 *txvipringhead;
369 u32 *txvopringhead;
370 u32 *txhpringhead;
371 struct buffer *txmapbufs;
372 struct buffer *txbkpbufs;
373 struct buffer *txbepbufs;
374 struct buffer *txvipbufs;
375 struct buffer *txvopbufs;
376 struct buffer *txhpbufs;
377 struct buffer *txmapbufstail;
378 struct buffer *txbkpbufstail;
379 struct buffer *txbepbufstail;
380 struct buffer *txvipbufstail;
381 struct buffer *txvopbufstail;
382 struct buffer *txhpbufstail;
383
384 int txringcount;
385 int txbuffsize;
386 struct tasklet_struct irq_rx_tasklet;
387 u8 dma_poll_mask;
388
389 /* adhoc/master mode stuff. */
390 u32 *txbeaconringtail;
391 dma_addr_t txbeaconringdma;
392 u32 *txbeaconring;
393 int txbeaconcount;
394 struct buffer *txbeaconbufs;
395 struct buffer *txbeaconbufstail;
396
397 u8 retry_data;
398 u8 retry_rts;
399 u16 rts;
400
401 /* by amy for led. */
402 enum led_strategy_8185 led_strategy;
403 /* by amy for led. */
404
405 /* by amy for power save. */
406 struct timer_list watch_dog_timer;
407 bool bInactivePs;
408 bool bSwRfProcessing;
409 enum rt_rf_power_state eInactivePowerState;
410 enum rt_rf_power_state eRFPowerState;
411 u32 RfOffReason;
412 bool RFChangeInProgress;
413 bool SetRFPowerStateInProgress;
414 u8 RFProgType;
415 bool bLeisurePs;
416 enum rt_ps_mode dot11PowerSaveMode;
417 u8 TxPollingTimes;
418
419 bool bApBufOurFrame; /* TRUE if AP buffer our unicast data , we will
420 * keep eAwake until receive data or timeout.
421 */
422 u8 WaitBufDataBcnCount;
423 u8 WaitBufDataTimeOut;
424
425 /* by amy for power save. */
426 /* by amy for antenna. */
427 u8 EEPROMSwAntennaDiversity;
428 bool EEPROMDefaultAntenna1;
429 u8 RegSwAntennaDiversityMechanism;
430 bool bSwAntennaDiverity;
431 u8 RegDefaultAntenna;
432 bool bDefaultAntenna1;
433 u8 SignalStrength;
434 long Stats_SignalStrength;
435 long LastSignalStrengthInPercent; /* In percentage, used for smoothing,
436 * e.g. Moving Average.
437 */
438 u8 SignalQuality; /* in 0-100 index. */
439 long Stats_SignalQuality;
440 long RecvSignalPower; /* in dBm. */
441 long Stats_RecvSignalPower;
442 u8 LastRxPktAntenna; /* +by amy 080312 Antenna which received the lasted
443 * packet. 0: Aux, 1:Main. Added by Roger,
444 * 2008.01.25.
445 */
446 u32 AdRxOkCnt;
447 long AdRxSignalStrength;
448 u8 CurrAntennaIndex; /* Index to current Antenna (both Tx and Rx). */
449 u8 AdTickCount; /* Times of SwAntennaDiversityTimer happened. */
450 u8 AdCheckPeriod; /* # of period SwAntennaDiversityTimer to check Rx
451 * signal strength for SW Antenna Diversity.
452 */
453 u8 AdMinCheckPeriod; /* Min value of AdCheckPeriod. */
454 u8 AdMaxCheckPeriod; /* Max value of AdCheckPeriod. */
455 long AdRxSsThreshold; /* Signal strength threshold to switch antenna. */
456 long AdMaxRxSsThreshold; /* Max value of AdRxSsThreshold. */
457 bool bAdSwitchedChecking; /* TRUE if we shall shall check Rx signal
458 * strength for last time switching antenna.
459 */
460 long AdRxSsBeforeSwitched; /* Rx signal strength before we switched
461 * antenna.
462 */
463 struct timer_list SwAntennaDiversityTimer;
464 /* by amy for antenna {by amy 080312 */
465
466 /* Crystal calibration. Added by Roger, 2007.12.11. */
467
468 bool bXtalCalibration; /* Crystal calibration.*/
469 u8 XtalCal_Xin; /* Crystal calibration for Xin. 0~7.5pF */
470 u8 XtalCal_Xout; /* Crystal calibration for Xout. 0~7.5pF */
471
472 /* Tx power tracking with thermal meter indication.
473 * Added by Roger, 2007.12.11.
474 */
475
476 bool bTxPowerTrack; /* Tx Power tracking. */
477 u8 ThermalMeter; /* Thermal meter reference indication. */
478
479 /* Dynamic Initial Gain Adjustment Mechanism. Added by Bruce,
480 * 2007-02-14.
481 */
482 bool bDigMechanism; /* TRUE if DIG is enabled, FALSE ow. */
483 bool bRegHighPowerMechanism; /* For High Power Mechanism. 061010,
484 * by rcnjko.
485 */
486 u32 FalseAlarmRegValue;
487 u8 RegDigOfdmFaUpTh; /* Upper threshold of OFDM false alarm, which is
488 * used in DIG.
489 */
490 u8 DIG_NumberFallbackVote;
491 u8 DIG_NumberUpgradeVote;
492 /* For HW antenna diversity, added by Roger, 2008.01.30. */
493 u32 AdMainAntennaRxOkCnt; /* Main antenna Rx OK count. */
494 u32 AdAuxAntennaRxOkCnt; /* Aux antenna Rx OK count. */
495 bool bHWAdSwitched; /* TRUE if we has switched default antenna by HW
496 * evaluation.
497 */
498 /* RF High Power upper/lower threshold. */
499 u8 RegHiPwrUpperTh;
500 u8 RegHiPwrLowerTh;
501 /* RF RSSI High Power upper/lower Threshold. */
502 u8 RegRSSIHiPwrUpperTh;
503 u8 RegRSSIHiPwrLowerTh;
504 /* Current CCK RSSI value to determine CCK high power, asked by SD3 DZ,
505 * by Bruce, 2007-04-12.
506 */
507 u8 CurCCKRSSI;
508 bool bCurCCKPkt;
509 /* High Power Mechanism. Added by amy, 080312. */
510 bool bToUpdateTxPwr;
511 long UndecoratedSmoothedSS;
512 long UndecoratedSmoothedRxPower;
513 u8 RSSI;
514 char RxPower;
515 u8 InitialGain;
516 /* For adjust Dig Threshold during Legacy/Leisure Power Save Mode. */
517 u32 DozePeriodInPast2Sec;
518 /* Don't access BB/RF under disable PLL situation. */
519 u8 InitialGainBackUp;
520 u8 RegBModeGainStage;
521 /* by amy for rate adaptive */
522 struct timer_list rateadapter_timer;
523 u32 RateAdaptivePeriod;
524 bool bEnhanceTxPwr;
525 bool bUpdateARFR;
526 int ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M.)
527 */
528 u32 NumTxUnicast; /* YJ,add,080828,for keep alive. */
529 u8 keepAliveLevel; /*YJ,add,080828,for KeepAlive. */
530 unsigned long NumTxOkTotal;
531 u16 LastRetryCnt;
532 u16 LastRetryRate;
533 unsigned long LastTxokCnt;
534 unsigned long LastRxokCnt;
535 u16 CurrRetryCnt;
536 unsigned long LastTxOKBytes;
537 unsigned long NumTxOkBytesTotal;
538 u8 LastFailTxRate;
539 long LastFailTxRateSS;
540 u8 FailTxRateCount;
541 u32 LastTxThroughput;
542 /* for up rate. */
543 unsigned short bTryuping;
544 u8 CurrTxRate; /* the rate before up. */
545 u16 CurrRetryRate;
546 u16 TryupingCount;
547 u8 TryDownCountLowData;
548 u8 TryupingCountNoData;
549
550 u8 CurrentOperaRate;
551 struct work_struct reset_wq;
552 struct work_struct watch_dog_wq;
553 short ack_tx_to_ieee;
554
555 u8 dma_poll_stop_mask;
556
557 u16 ShortRetryLimit;
558 u16 LongRetryLimit;
559 u16 EarlyRxThreshold;
560 u32 TransmitConfig;
561 u32 ReceiveConfig;
562 u32 IntrMask;
563
564 struct chnl_access_setting ChannelAccessSetting;
565};
566
567#define MANAGE_PRIORITY 0
568#define BK_PRIORITY 1
569#define BE_PRIORITY 2
570#define VI_PRIORITY 3
571#define VO_PRIORITY 4
572#define HI_PRIORITY 5
573#define BEACON_PRIORITY 6
574
575#define LOW_PRIORITY VI_PRIORITY
576#define NORM_PRIORITY VO_PRIORITY
577/* AC2Queue mapping. */
578#define AC2Q(_ac) (((_ac) == WME_AC_VO) ? VO_PRIORITY : \
579 ((_ac) == WME_AC_VI) ? VI_PRIORITY : \
580 ((_ac) == WME_AC_BK) ? BK_PRIORITY : \
581 BE_PRIORITY)
582
583short rtl8180_tx(struct net_device *dev, u8 *skbuf, int len, int priority,
584 bool morefrag, short fragdesc, int rate);
585
586u8 read_nic_byte(struct net_device *dev, int x);
587u32 read_nic_dword(struct net_device *dev, int x);
588u16 read_nic_word(struct net_device *dev, int x);
589void write_nic_byte(struct net_device *dev, int x, u8 y);
590void write_nic_word(struct net_device *dev, int x, u16 y);
591void write_nic_dword(struct net_device *dev, int x, u32 y);
592void force_pci_posting(struct net_device *dev);
593
594void rtl8180_rtx_disable(struct net_device *);
595void rtl8180_set_anaparam(struct net_device *dev, u32 a);
596void rtl8185_set_anaparam2(struct net_device *dev, u32 a);
597void rtl8180_set_hw_wep(struct net_device *dev);
598void rtl8180_no_hw_wep(struct net_device *dev);
599void rtl8180_update_msr(struct net_device *dev);
600void rtl8180_beacon_tx_disable(struct net_device *dev);
601void rtl8180_beacon_rx_disable(struct net_device *dev);
602int rtl8180_down(struct net_device *dev);
603int rtl8180_up(struct net_device *dev);
604void rtl8180_commit(struct net_device *dev);
605void rtl8180_set_chan(struct net_device *dev, short ch);
606void write_phy(struct net_device *dev, u8 adr, u8 data);
607void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
608void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
609void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
610void rtl8185_rf_pins_enable(struct net_device *dev);
611void IPSEnter(struct net_device *dev);
612void IPSLeave(struct net_device *dev);
613int get_curr_tx_free_desc(struct net_device *dev, int priority);
614void UpdateInitialGain(struct net_device *dev);
615bool SetAntennaConfig87SE(struct net_device *dev, u8 DefaultAnt,
616 bool bAntDiversity);
617
618void rtl8185b_adapter_start(struct net_device *dev);
619void rtl8185b_rx_enable(struct net_device *dev);
620void rtl8185b_tx_enable(struct net_device *dev);
621void rtl8180_reset(struct net_device *dev);
622void rtl8185b_irq_enable(struct net_device *dev);
623void fix_rx_fifo(struct net_device *dev);
624void fix_tx_fifo(struct net_device *dev);
625void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch);
626void rtl8180_rate_adapter(struct work_struct *work);
627bool MgntActSet_RF_State(struct net_device *dev, enum rt_rf_power_state StateToSet,
628 u32 ChangeSource);
629
630#endif
631
632/* fun with the built-in ieee80211 stack... */
633extern int ieee80211_crypto_init(void);
634extern void ieee80211_crypto_deinit(void);
635extern int ieee80211_crypto_tkip_init(void);
636extern void ieee80211_crypto_tkip_exit(void);
637extern int ieee80211_crypto_ccmp_init(void);
638extern void ieee80211_crypto_ccmp_exit(void);
639extern int ieee80211_crypto_wep_init(void);
640extern void ieee80211_crypto_wep_exit(void);
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.h b/drivers/staging/rtl8187se/r8180_93cx6.h
deleted file mode 100644
index b52b5b0610ab..000000000000
--- a/drivers/staging/rtl8187se/r8180_93cx6.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 This is part of rtl8180 OpenSource driver
3 Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
4 Released under the terms of GPL (General Public Licence)
5
6 Parts of this driver are based on the GPL part of the official realtek driver
7 Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
8 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
9
10 We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
11*/
12
13/*This files contains card eeprom (93c46 or 93c56) programming routines*/
14/*memory is addressed by WORDS*/
15
16#include "r8180.h"
17#include "r8180_hw.h"
18
19#define EPROM_DELAY 10
20
21#define EPROM_ANAPARAM_ADDRLWORD 0xd
22#define EPROM_ANAPARAM_ADDRHWORD 0xe
23
24#define RFCHIPID 0x6
25#define RFCHIPID_INTERSIL 1
26#define RFCHIPID_RFMD 2
27#define RFCHIPID_PHILIPS 3
28#define RFCHIPID_MAXIM 4
29#define RFCHIPID_GCT 5
30#define RFCHIPID_RTL8225 9
31#define RF_ZEBRA2 11
32#define EPROM_TXPW_BASE 0x05
33#define RF_ZEBRA4 12
34#define RFCHIPID_RTL8255 0xa
35#define RF_PARAM 0x19
36#define RF_PARAM_DIGPHY_SHIFT 0
37#define RF_PARAM_ANTBDEFAULT_SHIFT 1
38#define RF_PARAM_CARRIERSENSE_SHIFT 2
39#define RF_PARAM_CARRIERSENSE_MASK (3<<2)
40#define ENERGY_TRESHOLD 0x17
41#define EPROM_VERSION 0x1E
42#define MAC_ADR 0x7
43
44#define CIS 0x18
45
46#define EPROM_TXPW_OFDM_CH1_2 0x20
47
48#define EPROM_TXPW_CH1_2 0x30
49
50#define RTL818X_EEPROM_CMD_READ (1 << 0)
51#define RTL818X_EEPROM_CMD_WRITE (1 << 1)
52#define RTL818X_EEPROM_CMD_CK (1 << 2)
53#define RTL818X_EEPROM_CMD_CS (1 << 3)
54
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
deleted file mode 100644
index a6022d4e7573..000000000000
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ /dev/null
@@ -1,3775 +0,0 @@
1/*
2 * This is part of rtl818x pci OpenSource driver - v 0.1
3 * Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
4 * Released under the terms of GPL (General Public License)
5 *
6 * Parts of this driver are based on the GPL part of the official
7 * Realtek driver.
8 *
9 * Parts of this driver are based on the rtl8180 driver skeleton
10 * from Patric Schenke & Andres Salomon.
11 *
12 * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13 *
14 * Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15 *
16 * RSSI calc function from 'The Deuce'
17 *
18 * Some ideas borrowed from the 8139too.c driver included in linux kernel.
19 *
20 * We (I?) want to thanks the Authors of those projecs and also the
21 * Ndiswrapper's project Authors.
22 *
23 * A big big thanks goes also to Realtek corp. for their help in my attempt to
24 * add RTL8185 and RTL8225 support, and to David Young also.
25 *
26 * Power management interface routines.
27 * Written by Mariusz Matuszek.
28 */
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#undef RX_DONT_PASS_UL
33#undef DUMMY_RX
34
35#include <linux/slab.h>
36#include <linux/syscalls.h>
37#include <linux/eeprom_93cx6.h>
38#include <linux/interrupt.h>
39#include <linux/proc_fs.h>
40#include <linux/seq_file.h>
41
42#include "r8180_hw.h"
43#include "r8180.h"
44#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
45#include "r8180_93cx6.h" /* Card EEPROM */
46#include "r8180_wx.h"
47#include "r8180_dm.h"
48
49#include "ieee80211/dot11d.h"
50
51static struct pci_device_id rtl8180_pci_id_tbl[] = {
52 {
53 .vendor = PCI_VENDOR_ID_REALTEK,
54 .device = 0x8199,
55 .subvendor = PCI_ANY_ID,
56 .subdevice = PCI_ANY_ID,
57 .driver_data = 0,
58 },
59 {
60 .vendor = 0,
61 .device = 0,
62 .subvendor = 0,
63 .subdevice = 0,
64 .driver_data = 0,
65 }
66};
67
68static char ifname[IFNAMSIZ] = "wlan%d";
69static int hwwep;
70
71MODULE_LICENSE("GPL");
72MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
73MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
74MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
75
76module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
77module_param(hwwep, int, S_IRUGO|S_IWUSR);
78
79MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
80
81static int rtl8180_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83
84static void rtl8180_pci_remove(struct pci_dev *pdev);
85
86static void rtl8180_shutdown(struct pci_dev *pdev)
87{
88 struct net_device *dev = pci_get_drvdata(pdev);
89 if (dev->netdev_ops->ndo_stop)
90 dev->netdev_ops->ndo_stop(dev);
91 pci_disable_device(pdev);
92}
93
94static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
95{
96 struct net_device *dev = pci_get_drvdata(pdev);
97
98 if (!netif_running(dev))
99 goto out_pci_suspend;
100
101 if (dev->netdev_ops->ndo_stop)
102 dev->netdev_ops->ndo_stop(dev);
103
104 netif_device_detach(dev);
105
106out_pci_suspend:
107 pci_save_state(pdev);
108 pci_disable_device(pdev);
109 pci_set_power_state(pdev, pci_choose_state(pdev, state));
110 return 0;
111}
112
113static int rtl8180_resume(struct pci_dev *pdev)
114{
115 struct net_device *dev = pci_get_drvdata(pdev);
116 int err;
117 u32 val;
118
119 pci_set_power_state(pdev, PCI_D0);
120
121 err = pci_enable_device(pdev);
122 if (err) {
123 dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
124
125 return err;
126 }
127
128 pci_restore_state(pdev);
129
130 /*
131 * Suspend/Resume resets the PCI configuration space, so we have to
132 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
133 * from interfering with C3 CPU state. pci_restore_state won't help
134 * here since it only restores the first 64 bytes pci config header.
135 */
136 pci_read_config_dword(pdev, 0x40, &val);
137 if ((val & 0x0000ff00) != 0)
138 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
139
140 if (!netif_running(dev))
141 goto out;
142
143 if (dev->netdev_ops->ndo_open)
144 dev->netdev_ops->ndo_open(dev);
145
146 netif_device_attach(dev);
147out:
148 return 0;
149}
150
151static struct pci_driver rtl8180_pci_driver = {
152 .name = RTL8180_MODULE_NAME,
153 .id_table = rtl8180_pci_id_tbl,
154 .probe = rtl8180_pci_probe,
155 .remove = rtl8180_pci_remove,
156 .suspend = rtl8180_suspend,
157 .resume = rtl8180_resume,
158 .shutdown = rtl8180_shutdown,
159};
160
161u8 read_nic_byte(struct net_device *dev, int x)
162{
163 return 0xff&readb((u8 __iomem *)dev->mem_start + x);
164}
165
166u32 read_nic_dword(struct net_device *dev, int x)
167{
168 return readl((u8 __iomem *)dev->mem_start + x);
169}
170
171u16 read_nic_word(struct net_device *dev, int x)
172{
173 return readw((u8 __iomem *)dev->mem_start + x);
174}
175
176void write_nic_byte(struct net_device *dev, int x, u8 y)
177{
178 writeb(y, (u8 __iomem *)dev->mem_start + x);
179 udelay(20);
180}
181
182void write_nic_dword(struct net_device *dev, int x, u32 y)
183{
184 writel(y, (u8 __iomem *)dev->mem_start + x);
185 udelay(20);
186}
187
188void write_nic_word(struct net_device *dev, int x, u16 y)
189{
190 writew(y, (u8 __iomem *)dev->mem_start + x);
191 udelay(20);
192}
193
194inline void force_pci_posting(struct net_device *dev)
195{
196 read_nic_byte(dev, EPROM_CMD);
197 mb();
198}
199
200static irqreturn_t rtl8180_interrupt(int irq, void *netdev);
201void set_nic_rxring(struct net_device *dev);
202void set_nic_txring(struct net_device *dev);
203static struct net_device_stats *rtl8180_stats(struct net_device *dev);
204void rtl8180_commit(struct net_device *dev);
205void rtl8180_start_tx_beacon(struct net_device *dev);
206
207static struct proc_dir_entry *rtl8180_proc;
208
209static int proc_get_registers(struct seq_file *m, void *v)
210{
211 struct net_device *dev = m->private;
212 int i, n, max = 0xff;
213
214 /* This dump the current register page */
215 for (n = 0; n <= max;) {
216 seq_printf(m, "\nD: %2x > ", n);
217
218 for (i = 0; i < 16 && n <= max; i++, n++)
219 seq_printf(m, "%2x ", read_nic_byte(dev, n));
220 }
221 seq_putc(m, '\n');
222 return 0;
223}
224
225int get_curr_tx_free_desc(struct net_device *dev, int priority);
226
227static int proc_get_stats_hw(struct seq_file *m, void *v)
228{
229 return 0;
230}
231
232static int proc_get_stats_rx(struct seq_file *m, void *v)
233{
234 struct net_device *dev = m->private;
235 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
236
237 seq_printf(m,
238 "RX OK: %lu\n"
239 "RX Retry: %lu\n"
240 "RX CRC Error(0-500): %lu\n"
241 "RX CRC Error(500-1000): %lu\n"
242 "RX CRC Error(>1000): %lu\n"
243 "RX ICV Error: %lu\n",
244 priv->stats.rxint,
245 priv->stats.rxerr,
246 priv->stats.rxcrcerrmin,
247 priv->stats.rxcrcerrmid,
248 priv->stats.rxcrcerrmax,
249 priv->stats.rxicverr
250 );
251
252 return 0;
253}
254
255static int proc_get_stats_tx(struct seq_file *m, void *v)
256{
257 struct net_device *dev = m->private;
258 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
259 unsigned long totalOK;
260
261 totalOK = priv->stats.txnpokint + priv->stats.txhpokint +
262 priv->stats.txlpokint;
263
264 seq_printf(m,
265 "TX OK: %lu\n"
266 "TX Error: %lu\n"
267 "TX Retry: %lu\n"
268 "TX beacon OK: %lu\n"
269 "TX beacon error: %lu\n",
270 totalOK,
271 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
272 priv->stats.txretry,
273 priv->stats.txbeacon,
274 priv->stats.txbeaconerr
275 );
276
277 return 0;
278}
279
280static void rtl8180_proc_module_init(void)
281{
282 DMESG("Initializing proc filesystem");
283 rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
284}
285
286static void rtl8180_proc_module_remove(void)
287{
288 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
289}
290
291static void rtl8180_proc_remove_one(struct net_device *dev)
292{
293 remove_proc_subtree(dev->name, rtl8180_proc);
294}
295
296/*
297 * seq_file wrappers for procfile show routines.
298 */
299static int rtl8180_proc_open(struct inode *inode, struct file *file)
300{
301 struct net_device *dev = proc_get_parent_data(inode);
302 int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
303
304 return single_open(file, show, dev);
305}
306
307static const struct file_operations rtl8180_proc_fops = {
308 .open = rtl8180_proc_open,
309 .read = seq_read,
310 .llseek = seq_lseek,
311 .release = single_release,
312};
313
314/*
315 * Table of proc files we need to create.
316 */
317struct rtl8180_proc_file {
318 char name[12];
319 int (*show)(struct seq_file *, void *);
320};
321
322static const struct rtl8180_proc_file rtl8180_proc_files[] = {
323 { "stats-hw", &proc_get_stats_hw },
324 { "stats-rx", &proc_get_stats_rx },
325 { "stats-tx", &proc_get_stats_tx },
326 { "registers", &proc_get_registers },
327 { "" }
328};
329
330static void rtl8180_proc_init_one(struct net_device *dev)
331{
332 const struct rtl8180_proc_file *f;
333 struct proc_dir_entry *dir;
334
335 dir = proc_mkdir_data(dev->name, 0, rtl8180_proc, dev);
336 if (!dir) {
337 DMESGE("Unable to initialize /proc/net/r8180/%s\n", dev->name);
338 return;
339 }
340
341 for (f = rtl8180_proc_files; f->name[0]; f++) {
342 if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
343 &rtl8180_proc_fops, f->show)) {
344 DMESGE("Unable to initialize /proc/net/r8180/%s/%s\n",
345 dev->name, f->name);
346 return;
347 }
348 }
349}
350
351/*
352 * FIXME: check if we can use some standard already-existent
353 * data type+functions in kernel.
354 */
355
356static short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
357 struct buffer **bufferhead)
358{
359 struct buffer *tmp;
360
361 if (!*buffer) {
362
363 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
364
365 if (*buffer == NULL) {
366 DMESGE("Failed to kmalloc head of TX/RX struct");
367 return -1;
368 }
369 (*buffer)->next = *buffer;
370 (*buffer)->buf = buf;
371 (*buffer)->dma = dma;
372 if (bufferhead != NULL)
373 (*bufferhead) = (*buffer);
374 return 0;
375 }
376 tmp = *buffer;
377
378 while (tmp->next != (*buffer))
379 tmp = tmp->next;
380 tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
381 if (tmp->next == NULL) {
382 DMESGE("Failed to kmalloc TX/RX struct");
383 return -1;
384 }
385 tmp->next->buf = buf;
386 tmp->next->dma = dma;
387 tmp->next->next = *buffer;
388
389 return 0;
390}
391
392static void buffer_free(struct net_device *dev, struct buffer **buffer, int len,
393 short consistent)
394{
395
396 struct buffer *tmp, *next;
397 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
398 struct pci_dev *pdev = priv->pdev;
399
400 if (!*buffer)
401 return;
402
403 tmp = *buffer;
404
405 do {
406 next = tmp->next;
407 if (consistent) {
408 pci_free_consistent(pdev, len,
409 tmp->buf, tmp->dma);
410 } else {
411 pci_unmap_single(pdev, tmp->dma,
412 len, PCI_DMA_FROMDEVICE);
413 kfree(tmp->buf);
414 }
415 kfree(tmp);
416 tmp = next;
417 } while (next != *buffer);
418
419 *buffer = NULL;
420}
421
422int get_curr_tx_free_desc(struct net_device *dev, int priority)
423{
424 struct r8180_priv *priv = ieee80211_priv(dev);
425 u32 *tail;
426 u32 *head;
427 int ret;
428
429 switch (priority) {
430 case MANAGE_PRIORITY:
431 head = priv->txmapringhead;
432 tail = priv->txmapringtail;
433 break;
434 case BK_PRIORITY:
435 head = priv->txbkpringhead;
436 tail = priv->txbkpringtail;
437 break;
438 case BE_PRIORITY:
439 head = priv->txbepringhead;
440 tail = priv->txbepringtail;
441 break;
442 case VI_PRIORITY:
443 head = priv->txvipringhead;
444 tail = priv->txvipringtail;
445 break;
446 case VO_PRIORITY:
447 head = priv->txvopringhead;
448 tail = priv->txvopringtail;
449 break;
450 case HI_PRIORITY:
451 head = priv->txhpringhead;
452 tail = priv->txhpringtail;
453 break;
454 default:
455 return -1;
456 }
457
458 if (head <= tail)
459 ret = priv->txringcount - (tail - head)/8;
460 else
461 ret = (head - tail)/8;
462
463 if (ret > priv->txringcount)
464 DMESG("BUG");
465
466 return ret;
467}
468
469static short check_nic_enought_desc(struct net_device *dev, int priority)
470{
471 struct r8180_priv *priv = ieee80211_priv(dev);
472 struct ieee80211_device *ieee = netdev_priv(dev);
473 int requiredbyte;
474 int required;
475
476 requiredbyte = priv->ieee80211->fts +
477 sizeof(struct ieee80211_header_data);
478
479 if (ieee->current_network.QoS_Enable)
480 requiredbyte += 2;
481
482 required = requiredbyte / (priv->txbuffsize-4);
483
484 if (requiredbyte % priv->txbuffsize)
485 required++;
486
487 /* for now we keep two free descriptor as a safety boundary
488 * between the tail and the head
489 */
490
491 return required + 2 < get_curr_tx_free_desc(dev, priority);
492}
493
494void fix_tx_fifo(struct net_device *dev)
495{
496 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
497 u32 *tmp;
498 int i;
499
500 for (tmp = priv->txmapring, i = 0;
501 i < priv->txringcount;
502 tmp += 8, i++) {
503 *tmp = *tmp & ~(1<<31);
504 }
505
506 for (tmp = priv->txbkpring, i = 0;
507 i < priv->txringcount;
508 tmp += 8, i++) {
509 *tmp = *tmp & ~(1<<31);
510 }
511
512 for (tmp = priv->txbepring, i = 0;
513 i < priv->txringcount;
514 tmp += 8, i++) {
515 *tmp = *tmp & ~(1<<31);
516 }
517 for (tmp = priv->txvipring, i = 0;
518 i < priv->txringcount;
519 tmp += 8, i++) {
520 *tmp = *tmp & ~(1<<31);
521 }
522
523 for (tmp = priv->txvopring, i = 0;
524 i < priv->txringcount;
525 tmp += 8, i++) {
526 *tmp = *tmp & ~(1<<31);
527 }
528
529 for (tmp = priv->txhpring, i = 0;
530 i < priv->txringcount;
531 tmp += 8, i++) {
532 *tmp = *tmp & ~(1<<31);
533 }
534
535 for (tmp = priv->txbeaconring, i = 0;
536 i < priv->txbeaconcount;
537 tmp += 8, i++) {
538 *tmp = *tmp & ~(1<<31);
539 }
540
541 priv->txmapringtail = priv->txmapring;
542 priv->txmapringhead = priv->txmapring;
543 priv->txmapbufstail = priv->txmapbufs;
544
545 priv->txbkpringtail = priv->txbkpring;
546 priv->txbkpringhead = priv->txbkpring;
547 priv->txbkpbufstail = priv->txbkpbufs;
548
549 priv->txbepringtail = priv->txbepring;
550 priv->txbepringhead = priv->txbepring;
551 priv->txbepbufstail = priv->txbepbufs;
552
553 priv->txvipringtail = priv->txvipring;
554 priv->txvipringhead = priv->txvipring;
555 priv->txvipbufstail = priv->txvipbufs;
556
557 priv->txvopringtail = priv->txvopring;
558 priv->txvopringhead = priv->txvopring;
559 priv->txvopbufstail = priv->txvopbufs;
560
561 priv->txhpringtail = priv->txhpring;
562 priv->txhpringhead = priv->txhpring;
563 priv->txhpbufstail = priv->txhpbufs;
564
565 priv->txbeaconringtail = priv->txbeaconring;
566 priv->txbeaconbufstail = priv->txbeaconbufs;
567 set_nic_txring(dev);
568
569 ieee80211_reset_queue(priv->ieee80211);
570 priv->ack_tx_to_ieee = 0;
571}
572
573void fix_rx_fifo(struct net_device *dev)
574{
575 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
576 u32 *tmp;
577 struct buffer *rxbuf;
578 u8 rx_desc_size;
579
580 rx_desc_size = 8; /* 4*8 = 32 bytes */
581
582 for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
583 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
584 tmp += rx_desc_size, rxbuf = rxbuf->next) {
585 *(tmp+2) = rxbuf->dma;
586 *tmp = *tmp & ~0xfff;
587 *tmp = *tmp | priv->rxbuffersize;
588 *tmp |= (1<<31);
589 }
590
591 priv->rxringtail = priv->rxring;
592 priv->rxbuffer = priv->rxbufferhead;
593 priv->rx_skb_complete = 1;
594 set_nic_rxring(dev);
595}
596
597static void rtl8180_irq_disable(struct net_device *dev)
598{
599 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
600
601 write_nic_dword(dev, IMR, 0);
602 force_pci_posting(dev);
603 priv->irq_enabled = 0;
604}
605
606void rtl8180_set_mode(struct net_device *dev, int mode)
607{
608 u8 ecmd;
609
610 ecmd = read_nic_byte(dev, EPROM_CMD);
611 ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
612 ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
613 ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
614 ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
615 write_nic_byte(dev, EPROM_CMD, ecmd);
616}
617
618void rtl8180_beacon_tx_enable(struct net_device *dev);
619
620void rtl8180_update_msr(struct net_device *dev)
621{
622 struct r8180_priv *priv = ieee80211_priv(dev);
623 u8 msr;
624 u32 rxconf;
625
626 msr = read_nic_byte(dev, MSR);
627 msr &= ~MSR_LINK_MASK;
628
629 rxconf = read_nic_dword(dev, RX_CONF);
630
631 if (priv->ieee80211->state == IEEE80211_LINKED) {
632 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
633 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
634 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
635 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
636 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
637 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
638 else
639 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
640 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
641
642 } else {
643 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
644 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
645 }
646
647 write_nic_byte(dev, MSR, msr);
648 write_nic_dword(dev, RX_CONF, rxconf);
649}
650
651void rtl8180_set_chan(struct net_device *dev, short ch)
652{
653 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
654
655 if ((ch > 14) || (ch < 1)) {
656 netdev_err(dev, "In %s: Invalid channel %d\n", __func__, ch);
657 return;
658 }
659
660 priv->chan = ch;
661 priv->rf_set_chan(dev, priv->chan);
662}
663
664void set_nic_txring(struct net_device *dev)
665{
666 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
667
668 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
669 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
670 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
671 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
672 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
673 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
674 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
675}
676
677void rtl8180_beacon_tx_enable(struct net_device *dev)
678{
679 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
680
681 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
682 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
683 write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
684 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
685}
686
687void rtl8180_beacon_tx_disable(struct net_device *dev)
688{
689 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
690
691 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
692 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
693 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
694 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
695
696}
697
698void rtl8180_rtx_disable(struct net_device *dev)
699{
700 u8 cmd;
701 struct r8180_priv *priv = ieee80211_priv(dev);
702
703 cmd = read_nic_byte(dev, CMD);
704 write_nic_byte(dev, CMD, cmd &
705 ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
706 force_pci_posting(dev);
707 mdelay(10);
708
709 if (!priv->rx_skb_complete)
710 dev_kfree_skb_any(priv->rx_skb);
711}
712
713static short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
714 int addr)
715{
716 int i;
717 u32 *desc;
718 u32 *tmp;
719 dma_addr_t dma_desc, dma_tmp;
720 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
721 struct pci_dev *pdev = priv->pdev;
722 void *buf;
723
724 if ((bufsize & 0xfff) != bufsize) {
725 DMESGE("TX buffer allocation too large");
726 return 0;
727 }
728 desc = (u32 *)pci_alloc_consistent(pdev,
729 sizeof(u32)*8*count+256, &dma_desc);
730 if (desc == NULL)
731 return -1;
732
733 if (dma_desc & 0xff)
734 /*
735 * descriptor's buffer must be 256 byte aligned
736 * we shouldn't be here, since we set DMA mask !
737 */
738 WARN(1, "DMA buffer is not aligned\n");
739
740 tmp = desc;
741
742 for (i = 0; i < count; i++) {
743 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
744 if (buf == NULL)
745 return -ENOMEM;
746
747 switch (addr) {
748 case TX_MANAGEPRIORITY_RING_ADDR:
749 if (-1 == buffer_add(&priv->txmapbufs,
750 buf, dma_tmp, NULL)) {
751 DMESGE("Unable to allocate mem for buffer NP");
752 return -ENOMEM;
753 }
754 break;
755 case TX_BKPRIORITY_RING_ADDR:
756 if (-1 == buffer_add(&priv->txbkpbufs,
757 buf, dma_tmp, NULL)) {
758 DMESGE("Unable to allocate mem for buffer LP");
759 return -ENOMEM;
760 }
761 break;
762 case TX_BEPRIORITY_RING_ADDR:
763 if (-1 == buffer_add(&priv->txbepbufs,
764 buf, dma_tmp, NULL)) {
765 DMESGE("Unable to allocate mem for buffer NP");
766 return -ENOMEM;
767 }
768 break;
769 case TX_VIPRIORITY_RING_ADDR:
770 if (-1 == buffer_add(&priv->txvipbufs,
771 buf, dma_tmp, NULL)) {
772 DMESGE("Unable to allocate mem for buffer LP");
773 return -ENOMEM;
774 }
775 break;
776 case TX_VOPRIORITY_RING_ADDR:
777 if (-1 == buffer_add(&priv->txvopbufs,
778 buf, dma_tmp, NULL)) {
779 DMESGE("Unable to allocate mem for buffer NP");
780 return -ENOMEM;
781 }
782 break;
783 case TX_HIGHPRIORITY_RING_ADDR:
784 if (-1 == buffer_add(&priv->txhpbufs,
785 buf, dma_tmp, NULL)) {
786 DMESGE("Unable to allocate mem for buffer HP");
787 return -ENOMEM;
788 }
789 break;
790 case TX_BEACON_RING_ADDR:
791 if (-1 == buffer_add(&priv->txbeaconbufs,
792 buf, dma_tmp, NULL)) {
793 DMESGE("Unable to allocate mem for buffer BP");
794 return -ENOMEM;
795 }
796 break;
797 }
798 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
799 *(tmp+2) = (u32)dma_tmp;
800 *(tmp+3) = bufsize;
801
802 if (i+1 < count)
803 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
804 else
805 *(tmp+4) = (u32)dma_desc;
806
807 tmp = tmp+8;
808 }
809
810 switch (addr) {
811 case TX_MANAGEPRIORITY_RING_ADDR:
812 priv->txmapringdma = dma_desc;
813 priv->txmapring = desc;
814 break;
815 case TX_BKPRIORITY_RING_ADDR:
816 priv->txbkpringdma = dma_desc;
817 priv->txbkpring = desc;
818 break;
819 case TX_BEPRIORITY_RING_ADDR:
820 priv->txbepringdma = dma_desc;
821 priv->txbepring = desc;
822 break;
823 case TX_VIPRIORITY_RING_ADDR:
824 priv->txvipringdma = dma_desc;
825 priv->txvipring = desc;
826 break;
827 case TX_VOPRIORITY_RING_ADDR:
828 priv->txvopringdma = dma_desc;
829 priv->txvopring = desc;
830 break;
831 case TX_HIGHPRIORITY_RING_ADDR:
832 priv->txhpringdma = dma_desc;
833 priv->txhpring = desc;
834 break;
835 case TX_BEACON_RING_ADDR:
836 priv->txbeaconringdma = dma_desc;
837 priv->txbeaconring = desc;
838 break;
839
840 }
841
842 return 0;
843}
844
845static void free_tx_desc_rings(struct net_device *dev)
846{
847 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
848 struct pci_dev *pdev = priv->pdev;
849 int count = priv->txringcount;
850
851 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
852 priv->txmapring, priv->txmapringdma);
853 buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
854
855 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
856 priv->txbkpring, priv->txbkpringdma);
857 buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
858
859 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
860 priv->txbepring, priv->txbepringdma);
861 buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
862
863 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
864 priv->txvipring, priv->txvipringdma);
865 buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
866
867 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
868 priv->txvopring, priv->txvopringdma);
869 buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
870
871 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
872 priv->txhpring, priv->txhpringdma);
873 buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
874
875 count = priv->txbeaconcount;
876 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
877 priv->txbeaconring, priv->txbeaconringdma);
878 buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
879}
880
881static void free_rx_desc_ring(struct net_device *dev)
882{
883 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
884 struct pci_dev *pdev = priv->pdev;
885 int count = priv->rxringcount;
886
887 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
888 priv->rxring, priv->rxringdma);
889
890 buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
891}
892
893static short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
894{
895 int i;
896 u32 *desc;
897 u32 *tmp;
898 dma_addr_t dma_desc, dma_tmp;
899 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
900 struct pci_dev *pdev = priv->pdev;
901 void *buf;
902 u8 rx_desc_size;
903
904 rx_desc_size = 8; /* 4*8 = 32 bytes */
905
906 if ((bufsize & 0xfff) != bufsize) {
907 DMESGE("RX buffer allocation too large");
908 return -1;
909 }
910
911 desc = (u32 *)pci_alloc_consistent(pdev,
912 sizeof(u32) * rx_desc_size * count + 256, &dma_desc);
913
914 if (dma_desc & 0xff)
915 /*
916 * descriptor's buffer must be 256 byte aligned
917 * should never happen since we specify the DMA mask
918 */
919 WARN(1, "DMA buffer is not aligned\n");
920
921 priv->rxring = desc;
922 priv->rxringdma = dma_desc;
923 tmp = desc;
924
925 for (i = 0; i < count; i++) {
926 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
927 if (buf == NULL) {
928 DMESGE("Failed to kmalloc RX buffer");
929 return -1;
930 }
931
932 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
933 PCI_DMA_FROMDEVICE);
934 if (pci_dma_mapping_error(pdev, dma_tmp))
935 return -1;
936 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
937 &(priv->rxbufferhead))) {
938 DMESGE("Unable to allocate mem RX buf");
939 return -1;
940 }
941 *tmp = 0; /* zero pads the header of the descriptor */
942 *tmp = *tmp | (bufsize&0xfff);
943 *(tmp+2) = (u32)dma_tmp;
944 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
945
946 tmp = tmp+rx_desc_size;
947 }
948
949 /* this is the last descriptor */
950 *(tmp - rx_desc_size) = *(tmp - rx_desc_size) | (1 << 30);
951
952 return 0;
953}
954
955
956void set_nic_rxring(struct net_device *dev)
957{
958 u8 pgreg;
959 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
960
961 pgreg = read_nic_byte(dev, PGSELECT);
962 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
963
964 write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
965}
966
967void rtl8180_reset(struct net_device *dev)
968{
969 u8 cr;
970
971 rtl8180_irq_disable(dev);
972
973 cr = read_nic_byte(dev, CMD);
974 cr = cr & 2;
975 cr = cr | (1<<CMD_RST_SHIFT);
976 write_nic_byte(dev, CMD, cr);
977
978 force_pci_posting(dev);
979
980 mdelay(200);
981
982 if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
983 DMESGW("Card reset timeout!");
984 else
985 DMESG("Card successfully reset");
986
987 rtl8180_set_mode(dev, EPROM_CMD_LOAD);
988 force_pci_posting(dev);
989 mdelay(200);
990}
991
992inline u16 ieeerate2rtlrate(int rate)
993{
994 switch (rate) {
995 case 10:
996 return 0;
997 case 20:
998 return 1;
999 case 55:
1000 return 2;
1001 case 110:
1002 return 3;
1003 case 60:
1004 return 4;
1005 case 90:
1006 return 5;
1007 case 120:
1008 return 6;
1009 case 180:
1010 return 7;
1011 case 240:
1012 return 8;
1013 case 360:
1014 return 9;
1015 case 480:
1016 return 10;
1017 case 540:
1018 return 11;
1019 default:
1020 return 3;
1021 }
1022}
1023
1024static u16 rtl_rate[] = {10, 20, 55, 110, 60,
1025 90, 120, 180, 240, 360, 480, 540, 720};
1026
1027inline u16 rtl8180_rate2rate(short rate)
1028{
1029 if (rate > 12)
1030 return 10;
1031 return rtl_rate[rate];
1032}
1033
1034inline u8 rtl8180_IsWirelessBMode(u16 rate)
1035{
1036 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1037 return 1;
1038 else
1039 return 0;
1040}
1041
1042u16 N_DBPSOfRate(u16 DataRate);
1043
1044static u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1045 u8 bShortPreamble)
1046{
1047 u16 FrameTime;
1048 u16 N_DBPS;
1049 u16 Ceiling;
1050
1051 if (rtl8180_IsWirelessBMode(DataRate)) {
1052 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1053 /* long preamble */
1054 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1055 else
1056 /* short preamble */
1057 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1058
1059 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1060 FrameTime++;
1061 } else { /* 802.11g DSSS-OFDM PLCP length field calculation. */
1062 N_DBPS = N_DBPSOfRate(DataRate);
1063 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1064 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1065 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1066 }
1067 return FrameTime;
1068}
1069
1070u16 N_DBPSOfRate(u16 DataRate)
1071{
1072 u16 N_DBPS = 24;
1073
1074 switch (DataRate) {
1075 case 60:
1076 N_DBPS = 24;
1077 break;
1078 case 90:
1079 N_DBPS = 36;
1080 break;
1081 case 120:
1082 N_DBPS = 48;
1083 break;
1084 case 180:
1085 N_DBPS = 72;
1086 break;
1087 case 240:
1088 N_DBPS = 96;
1089 break;
1090 case 360:
1091 N_DBPS = 144;
1092 break;
1093 case 480:
1094 N_DBPS = 192;
1095 break;
1096 case 540:
1097 N_DBPS = 216;
1098 break;
1099 default:
1100 break;
1101 }
1102
1103 return N_DBPS;
1104}
1105
1106/*
1107 * For Netgear case, they want good-looking signal strength.
1108 */
1109static long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1110{
1111 long RetSS;
1112
1113 /* Step 1. Scale mapping. */
1114 if (CurrSS >= 71 && CurrSS <= 100)
1115 RetSS = 90 + ((CurrSS - 70) / 3);
1116 else if (CurrSS >= 41 && CurrSS <= 70)
1117 RetSS = 78 + ((CurrSS - 40) / 3);
1118 else if (CurrSS >= 31 && CurrSS <= 40)
1119 RetSS = 66 + (CurrSS - 30);
1120 else if (CurrSS >= 21 && CurrSS <= 30)
1121 RetSS = 54 + (CurrSS - 20);
1122 else if (CurrSS >= 5 && CurrSS <= 20)
1123 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1124 else if (CurrSS == 4)
1125 RetSS = 36;
1126 else if (CurrSS == 3)
1127 RetSS = 27;
1128 else if (CurrSS == 2)
1129 RetSS = 18;
1130 else if (CurrSS == 1)
1131 RetSS = 9;
1132 else
1133 RetSS = CurrSS;
1134
1135 /* Step 2. Smoothing. */
1136 if (LastSS > 0)
1137 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1138
1139 return RetSS;
1140}
1141
1142/*
1143 * Translate 0-100 signal strength index into dBm.
1144 */
1145static long TranslateToDbm8185(u8 SignalStrengthIndex)
1146{
1147 long SignalPower;
1148
1149 /* Translate to dBm (x=0.5y-95). */
1150 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1151 SignalPower -= 95;
1152
1153 return SignalPower;
1154}
1155
1156/*
1157 * Perform signal smoothing for dynamic mechanism.
1158 * This is different with PerformSignalSmoothing8185 in smoothing formula.
1159 * No dramatic adjustment is applied because dynamic mechanism need some
1160 * degree of correctness. Ported from 8187B.
1161 */
1162static void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1163 bool bCckRate)
1164{
1165 long smoothedSS;
1166 long smoothedRx;
1167
1168 /* Determine the current packet is CCK rate. */
1169 priv->bCurCCKPkt = bCckRate;
1170
1171 smoothedSS = priv->SignalStrength * 10;
1172
1173 if (priv->UndecoratedSmoothedSS >= 0)
1174 smoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1175 smoothedSS) / 6;
1176
1177 priv->UndecoratedSmoothedSS = smoothedSS;
1178
1179 smoothedRx = ((priv->UndecoratedSmoothedRxPower * 50) +
1180 (priv->RxPower * 11)) / 60;
1181
1182 priv->UndecoratedSmoothedRxPower = smoothedRx;
1183
1184 if (bCckRate)
1185 priv->CurCCKRSSI = priv->RSSI;
1186 else
1187 priv->CurCCKRSSI = 0;
1188}
1189
1190
1191/*
1192 * This is rough RX isr handling routine
1193 */
1194static void rtl8180_rx(struct net_device *dev)
1195{
1196 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1197 struct sk_buff *tmp_skb;
1198 short first, last;
1199 u32 len;
1200 int lastlen;
1201 unsigned char quality, signal;
1202 u8 rate;
1203 u32 *tmp, *tmp2;
1204 u8 rx_desc_size;
1205 u8 padding;
1206 char rxpower = 0;
1207 u32 RXAGC = 0;
1208 long RxAGC_dBm = 0;
1209 u8 LNA = 0, BB = 0;
1210 u8 LNA_gain[4] = {02, 17, 29, 39};
1211 u8 Antenna = 0;
1212 struct ieee80211_hdr_4addr *hdr;
1213 u16 fc, type;
1214 u8 bHwError = 0, bCRC = 0, bICV = 0;
1215 bool bCckRate = false;
1216 u8 RSSI = 0;
1217 long SignalStrengthIndex = 0;
1218 struct ieee80211_rx_stats stats = {
1219 .signal = 0,
1220 .noise = -98,
1221 .rate = 0,
1222 .freq = IEEE80211_24GHZ_BAND,
1223 };
1224
1225 stats.nic_type = NIC_8185B;
1226 rx_desc_size = 8;
1227
1228 if ((*(priv->rxringtail)) & (1<<31)) {
1229 /* we have got an RX int, but the descriptor. we are pointing
1230 * is empty.
1231 */
1232
1233 priv->stats.rxnodata++;
1234 priv->ieee80211->stats.rx_errors++;
1235
1236 tmp2 = NULL;
1237 tmp = priv->rxringtail;
1238 do {
1239 if (tmp == priv->rxring)
1240 tmp = priv->rxring + (priv->rxringcount - 1) *
1241 rx_desc_size;
1242 else
1243 tmp -= rx_desc_size;
1244
1245 if (!(*tmp & (1<<31)))
1246 tmp2 = tmp;
1247 } while (tmp != priv->rxring);
1248
1249 if (tmp2)
1250 priv->rxringtail = tmp2;
1251 }
1252
1253 /* while there are filled descriptors */
1254 while (!(*(priv->rxringtail) & (1<<31))) {
1255 if (*(priv->rxringtail) & (1<<26))
1256 DMESGW("RX buffer overflow");
1257 if (*(priv->rxringtail) & (1<<12))
1258 priv->stats.rxicverr++;
1259
1260 if (*(priv->rxringtail) & (1<<27)) {
1261 priv->stats.rxdmafail++;
1262 goto drop;
1263 }
1264
1265 pci_dma_sync_single_for_cpu(priv->pdev,
1266 priv->rxbuffer->dma,
1267 priv->rxbuffersize * sizeof(u8),
1268 PCI_DMA_FROMDEVICE);
1269
1270 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1271 if (first)
1272 priv->rx_prevlen = 0;
1273
1274 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1275 if (last) {
1276 lastlen = ((*priv->rxringtail) & 0xfff);
1277
1278 /* if the last descriptor (that should tell us the total
1279 * packet len) tell us something less than the
1280 * descriptors len we had until now, then there is some
1281 * problem..
1282 * workaround to prevent kernel panic
1283 */
1284 if (lastlen < priv->rx_prevlen)
1285 len = 0;
1286 else
1287 len = lastlen-priv->rx_prevlen;
1288
1289 if (*(priv->rxringtail) & (1<<13)) {
1290 if ((*(priv->rxringtail) & 0xfff) < 500)
1291 priv->stats.rxcrcerrmin++;
1292 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1293 priv->stats.rxcrcerrmax++;
1294 else
1295 priv->stats.rxcrcerrmid++;
1296
1297 }
1298
1299 } else {
1300 len = priv->rxbuffersize;
1301 }
1302
1303 if (first && last) {
1304 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1305 } else if (first) {
1306 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1307 if (padding)
1308 len -= 2;
1309 } else {
1310 padding = 0;
1311 }
1312 padding = 0;
1313 priv->rx_prevlen += len;
1314
1315 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1316 /* HW is probably passing several buggy frames without
1317 * FD or LD flag set.
1318 * Throw this garbage away to prevent skb memory
1319 * exhausting
1320 */
1321 if (!priv->rx_skb_complete)
1322 dev_kfree_skb_any(priv->rx_skb);
1323 priv->rx_skb_complete = 1;
1324 }
1325
1326 signal = (unsigned char)((*(priv->rxringtail + 3) &
1327 0x00ff0000) >> 16);
1328 signal = (signal & 0xfe) >> 1;
1329
1330 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1331
1332 stats.mac_time[0] = *(priv->rxringtail+1);
1333 stats.mac_time[1] = *(priv->rxringtail+2);
1334
1335 rxpower = ((char)((*(priv->rxringtail + 4) &
1336 0x00ff0000) >> 16)) / 2 - 42;
1337
1338 RSSI = ((u8)((*(priv->rxringtail + 3) &
1339 0x0000ff00) >> 8)) & 0x7f;
1340
1341 rate = ((*(priv->rxringtail)) &
1342 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1343
1344 stats.rate = rtl8180_rate2rate(rate);
1345 Antenna = (*(priv->rxringtail + 3) & 0x00008000) == 0 ? 0 : 1;
1346 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1347 RxAGC_dBm = rxpower+1; /* bias */
1348 } else { /* CCK rate. */
1349 RxAGC_dBm = signal; /* bit 0 discard */
1350
1351 LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1352 BB = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1353
1354 /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1355 RxAGC_dBm = -(LNA_gain[LNA] + (BB * 2));
1356
1357 RxAGC_dBm += 4; /* bias */
1358 }
1359
1360 if (RxAGC_dBm & 0x80) /* absolute value */
1361 RXAGC = ~(RxAGC_dBm)+1;
1362 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1363 /* Translate RXAGC into 1-100. */
1364 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1365 if (RXAGC > 90)
1366 RXAGC = 90;
1367 else if (RXAGC < 25)
1368 RXAGC = 25;
1369 RXAGC = (90-RXAGC)*100/65;
1370 } else { /* CCK rate. */
1371 if (RXAGC > 95)
1372 RXAGC = 95;
1373 else if (RXAGC < 30)
1374 RXAGC = 30;
1375 RXAGC = (95-RXAGC)*100/65;
1376 }
1377 priv->SignalStrength = (u8)RXAGC;
1378 priv->RecvSignalPower = RxAGC_dBm;
1379 priv->RxPower = rxpower;
1380 priv->RSSI = RSSI;
1381 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1382 if (quality >= 127)
1383 /* 0 causes epc to show signal zero, walk around now */
1384 quality = 1;
1385 else if (quality < 27)
1386 quality = 100;
1387 else
1388 quality = 127 - quality;
1389 priv->SignalQuality = quality;
1390
1391 stats.signal = (u8) quality;
1392
1393 stats.signalstrength = RXAGC;
1394 if (stats.signalstrength > 100)
1395 stats.signalstrength = 100;
1396 stats.signalstrength = (stats.signalstrength * 70) / 100 + 30;
1397 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1398 stats.noise = priv->wstats.qual.noise =
1399 100 - priv->wstats.qual.qual;
1400 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1401 (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1402 (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1403 (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1404 (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1405 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1406 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1407 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1408 fc = le16_to_cpu(hdr->frame_ctl);
1409 type = WLAN_FC_GET_TYPE(fc);
1410
1411 if (IEEE80211_FTYPE_CTL != type &&
1412 !bHwError && !bCRC && !bICV &&
1413 eqMacAddr(priv->ieee80211->current_network.bssid,
1414 fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1415 fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1416 hdr->addr3)) {
1417
1418 /* Perform signal smoothing for dynamic
1419 * mechanism on demand. This is different
1420 * with PerformSignalSmoothing8185 in smoothing
1421 * fomula. No dramatic adjustion is apply
1422 * because dynamic mechanism need some degree
1423 * of correctness. */
1424 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1425
1426 /* For good-looking singal strength. */
1427 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1428 priv->LastSignalStrengthInPercent,
1429 priv->SignalStrength);
1430
1431 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1432 priv->Stats_SignalStrength =
1433 TranslateToDbm8185((u8)SignalStrengthIndex);
1434
1435 /*
1436 * We need more correct power of received packets and
1437 * the "SignalStrength" of RxStats is beautified, so we
1438 * record the correct power here.
1439 */
1440
1441 priv->Stats_SignalQuality = (long)(
1442 priv->Stats_SignalQuality * 5 +
1443 (long)priv->SignalQuality + 5) / 6;
1444
1445 priv->Stats_RecvSignalPower = (long)(
1446 priv->Stats_RecvSignalPower * 5 +
1447 priv->RecvSignalPower - 1) / 6;
1448
1449 /*
1450 * Figure out which antenna received the last packet.
1451 * 0: aux, 1: main
1452 */
1453 priv->LastRxPktAntenna = Antenna ? 1 : 0;
1454 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1455 }
1456
1457 if (first) {
1458 if (!priv->rx_skb_complete) {
1459 /* seems that HW sometimes fails to receive and
1460 * doesn't provide the last descriptor.
1461 */
1462 dev_kfree_skb_any(priv->rx_skb);
1463 priv->stats.rxnolast++;
1464 }
1465 priv->rx_skb = dev_alloc_skb(len+2);
1466 if (!priv->rx_skb)
1467 goto drop;
1468
1469 priv->rx_skb_complete = 0;
1470 priv->rx_skb->dev = dev;
1471 } else {
1472 /* if we are here we should have already RXed the first
1473 * frame.
1474 * If we get here and the skb is not allocated then
1475 * we have just throw out garbage (skb not allocated)
1476 * and we are still rxing garbage....
1477 */
1478 if (!priv->rx_skb_complete) {
1479
1480 tmp_skb = dev_alloc_skb(
1481 priv->rx_skb->len + len + 2);
1482
1483 if (!tmp_skb)
1484 goto drop;
1485
1486 tmp_skb->dev = dev;
1487
1488 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1489 priv->rx_skb->data,
1490 priv->rx_skb->len);
1491
1492 dev_kfree_skb_any(priv->rx_skb);
1493
1494 priv->rx_skb = tmp_skb;
1495 }
1496 }
1497
1498 if (!priv->rx_skb_complete) {
1499 memcpy(skb_put(priv->rx_skb, len), ((unsigned char *)
1500 priv->rxbuffer->buf) + (padding ? 2 : 0), len);
1501 }
1502
1503 if (last && !priv->rx_skb_complete) {
1504 if (priv->rx_skb->len > 4)
1505 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1506 if (!ieee80211_rtl_rx(priv->ieee80211,
1507 priv->rx_skb, &stats))
1508 dev_kfree_skb_any(priv->rx_skb);
1509 priv->rx_skb_complete = 1;
1510 }
1511
1512 pci_dma_sync_single_for_device(priv->pdev,
1513 priv->rxbuffer->dma,
1514 priv->rxbuffersize * sizeof(u8),
1515 PCI_DMA_FROMDEVICE);
1516
1517drop: /* this is used when we have not enough mem */
1518 /* restore the descriptor */
1519 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1520 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1521 *(priv->rxringtail) =
1522 *(priv->rxringtail) | priv->rxbuffersize;
1523
1524 *(priv->rxringtail) =
1525 *(priv->rxringtail) | (1<<31);
1526
1527 priv->rxringtail += rx_desc_size;
1528 if (priv->rxringtail >=
1529 (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1530 priv->rxringtail = priv->rxring;
1531
1532 priv->rxbuffer = (priv->rxbuffer->next);
1533 }
1534}
1535
1536
1537static void rtl8180_dma_kick(struct net_device *dev, int priority)
1538{
1539 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1540
1541 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1542 write_nic_byte(dev, TX_DMA_POLLING,
1543 (1 << (priority + 1)) | priv->dma_poll_mask);
1544 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1545
1546 force_pci_posting(dev);
1547}
1548
1549static void rtl8180_data_hard_stop(struct net_device *dev)
1550{
1551 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1552
1553 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1554 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1555 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1556 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1557}
1558
1559static void rtl8180_data_hard_resume(struct net_device *dev)
1560{
1561 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1562
1563 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1564 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1565 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1566 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1567}
1568
1569/*
1570 * This function TX data frames when the ieee80211 stack requires this.
1571 * It checks also if we need to stop the ieee tx queue, eventually do it
1572 */
1573static void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
1574 int rate)
1575{
1576 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1577 int mode;
1578 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *)skb->data;
1579 bool morefrag = le16_to_cpu(h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1580 unsigned long flags;
1581 int priority;
1582
1583 mode = priv->ieee80211->iw_mode;
1584
1585 rate = ieeerate2rtlrate(rate);
1586 /*
1587 * This function doesn't require lock because we make sure it's called
1588 * with the tx_lock already acquired.
1589 * This come from the kernel's hard_xmit callback (through the ieee
1590 * stack, or from the try_wake_queue (again through the ieee stack.
1591 */
1592 priority = AC2Q(skb->priority);
1593 spin_lock_irqsave(&priv->tx_lock, flags);
1594
1595 if (priv->ieee80211->bHwRadioOff) {
1596 spin_unlock_irqrestore(&priv->tx_lock, flags);
1597
1598 return;
1599 }
1600
1601 if (!check_nic_enought_desc(dev, priority)) {
1602 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1603 get_curr_tx_free_desc(dev, priority));
1604 ieee80211_rtl_stop_queue(priv->ieee80211);
1605 }
1606 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1607 if (!check_nic_enought_desc(dev, priority))
1608 ieee80211_rtl_stop_queue(priv->ieee80211);
1609
1610 spin_unlock_irqrestore(&priv->tx_lock, flags);
1611}
1612
1613/*
1614 * This is a rough attempt to TX a frame
1615 * This is called by the ieee 80211 stack to TX management frames.
1616 * If the ring is full packets are dropped (for data frame the queue
1617 * is stopped before this can happen). For this reason it is better
1618 * if the descriptors are larger than the largest management frame
1619 * we intend to TX: i'm unsure what the HW does if it will not find
1620 * the last fragment of a frame because it has been dropped...
1621 * Since queues for Management and Data frames are different we
1622 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1623 */
1624/* these function may loop if invoked with 0 descriptors or 0 len buffer */
1625static int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1626{
1627 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1628 unsigned long flags;
1629 int priority;
1630
1631 priority = MANAGE_PRIORITY;
1632
1633 spin_lock_irqsave(&priv->tx_lock, flags);
1634
1635 if (priv->ieee80211->bHwRadioOff) {
1636 spin_unlock_irqrestore(&priv->tx_lock, flags);
1637 dev_kfree_skb_any(skb);
1638 return NETDEV_TX_OK;
1639 }
1640
1641 rtl8180_tx(dev, skb->data, skb->len, priority,
1642 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1643
1644 priv->ieee80211->stats.tx_bytes += skb->len;
1645 priv->ieee80211->stats.tx_packets++;
1646 spin_unlock_irqrestore(&priv->tx_lock, flags);
1647
1648 dev_kfree_skb_any(skb);
1649 return NETDEV_TX_OK;
1650}
1651
1652static void rtl8180_prepare_beacon(struct net_device *dev)
1653{
1654 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1655 struct sk_buff *skb;
1656
1657 u16 word = read_nic_word(dev, BcnItv);
1658 word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1659
1660 /* word |= 0x64; */
1661 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);
1662
1663 write_nic_word(dev, BcnItv, word);
1664
1665 skb = ieee80211_get_beacon(priv->ieee80211);
1666 if (skb) {
1667 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1668 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1669 dev_kfree_skb_any(skb);
1670 }
1671}
1672
1673/*
1674 * This function do the real dirty work: it enqueues a TX command descriptor in
1675 * the ring buffer, copyes the frame in a TX buffer and kicks the NIC to ensure
1676 * it does the DMA transfer.
1677 */
1678short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1679 bool morefrag, short descfrag, int rate)
1680{
1681 struct r8180_priv *priv = ieee80211_priv(dev);
1682 u32 *tail, *temp_tail;
1683 u32 *begin;
1684 u32 *buf;
1685 int i;
1686 int remain;
1687 int buflen;
1688 int count;
1689 struct buffer *buflist;
1690 struct ieee80211_hdr_3addr *frag_hdr =
1691 (struct ieee80211_hdr_3addr *)txbuf;
1692 u8 dest[ETH_ALEN];
1693 u8 bUseShortPreamble = 0;
1694 u8 bCTSEnable = 0;
1695 u8 bRTSEnable = 0;
1696 u16 Duration = 0;
1697 u16 RtsDur = 0;
1698 u16 ThisFrameTime = 0;
1699 u16 TxDescDuration = 0;
1700 bool ownbit_flag = false;
1701
1702 switch (priority) {
1703 case MANAGE_PRIORITY:
1704 tail = priv->txmapringtail;
1705 begin = priv->txmapring;
1706 buflist = priv->txmapbufstail;
1707 count = priv->txringcount;
1708 break;
1709 case BK_PRIORITY:
1710 tail = priv->txbkpringtail;
1711 begin = priv->txbkpring;
1712 buflist = priv->txbkpbufstail;
1713 count = priv->txringcount;
1714 break;
1715 case BE_PRIORITY:
1716 tail = priv->txbepringtail;
1717 begin = priv->txbepring;
1718 buflist = priv->txbepbufstail;
1719 count = priv->txringcount;
1720 break;
1721 case VI_PRIORITY:
1722 tail = priv->txvipringtail;
1723 begin = priv->txvipring;
1724 buflist = priv->txvipbufstail;
1725 count = priv->txringcount;
1726 break;
1727 case VO_PRIORITY:
1728 tail = priv->txvopringtail;
1729 begin = priv->txvopring;
1730 buflist = priv->txvopbufstail;
1731 count = priv->txringcount;
1732 break;
1733 case HI_PRIORITY:
1734 tail = priv->txhpringtail;
1735 begin = priv->txhpring;
1736 buflist = priv->txhpbufstail;
1737 count = priv->txringcount;
1738 break;
1739 case BEACON_PRIORITY:
1740 tail = priv->txbeaconringtail;
1741 begin = priv->txbeaconring;
1742 buflist = priv->txbeaconbufstail;
1743 count = priv->txbeaconcount;
1744 break;
1745 default:
1746 return -1;
1747 break;
1748 }
1749
1750 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1751 if (is_multicast_ether_addr(dest)) {
1752 Duration = 0;
1753 RtsDur = 0;
1754 bRTSEnable = 0;
1755 bCTSEnable = 0;
1756
1757 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1758 rtl8180_rate2rate(rate), 0, bUseShortPreamble);
1759 TxDescDuration = ThisFrameTime;
1760 } else { /* Unicast packet */
1761 u16 AckTime;
1762
1763 /* for Keep alive */
1764 priv->NumTxUnicast++;
1765
1766 /* Figure out ACK rate according to BSS basic rate
1767 * and Tx rate.
1768 * AckCTSLng = 14 use 1M bps send
1769 */
1770 AckTime = ComputeTxTime(14, 10, 0, 0);
1771
1772 if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1773 u16 RtsTime, CtsTime;
1774 bRTSEnable = 1;
1775 bCTSEnable = 0;
1776
1777 /* Rate and time required for RTS. */
1778 RtsTime = ComputeTxTime(sAckCtsLng / 8,
1779 priv->ieee80211->basic_rate, 0, 0);
1780
1781 /* Rate and time required for CTS.
1782 * AckCTSLng = 14 use 1M bps send
1783 */
1784 CtsTime = ComputeTxTime(14, 10, 0, 0);
1785
1786 /* Figure out time required to transmit this frame. */
1787 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1788 rtl8180_rate2rate(rate), 0,
1789 bUseShortPreamble);
1790
1791 /* RTS-CTS-ThisFrame-ACK. */
1792 RtsDur = CtsTime + ThisFrameTime +
1793 AckTime + 3 * aSifsTime;
1794
1795 TxDescDuration = RtsTime + RtsDur;
1796 } else { /* Normal case. */
1797 bCTSEnable = 0;
1798 bRTSEnable = 0;
1799 RtsDur = 0;
1800
1801 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1802 rtl8180_rate2rate(rate), 0, bUseShortPreamble);
1803 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1804 }
1805
1806 if (!(le16_to_cpu(frag_hdr->frame_control) & IEEE80211_FCTL_MOREFRAGS)) {
1807 /* ThisFrame-ACK. */
1808 Duration = aSifsTime + AckTime;
1809 } else { /* One or more fragments remained. */
1810 u16 NextFragTime;
1811
1812 /* pretend following packet length = current packet */
1813 NextFragTime = ComputeTxTime(len + sCrcLng,
1814 rtl8180_rate2rate(rate), 0, bUseShortPreamble);
1815
1816 /* ThisFrag-ACk-NextFrag-ACK. */
1817 Duration = NextFragTime + 3 * aSifsTime + 2 * AckTime;
1818 }
1819
1820 } /* End of Unicast packet */
1821
1822 frag_hdr->duration_id = Duration;
1823
1824 buflen = priv->txbuffsize;
1825 remain = len;
1826 temp_tail = tail;
1827
1828 while (remain != 0) {
1829 mb();
1830 if (!buflist) {
1831 DMESGE("TX buffer error, cannot TX frames. pri %d.",
1832 priority);
1833 return -1;
1834 }
1835 buf = buflist->buf;
1836
1837 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1838 DMESGW("No more TX desc, returning %x of %x",
1839 remain, len);
1840 priv->stats.txrdu++;
1841 return remain;
1842 }
1843
1844 *tail = 0; /* zeroes header */
1845 *(tail+1) = 0;
1846 *(tail+3) = 0;
1847 *(tail+5) = 0;
1848 *(tail+6) = 0;
1849 *(tail+7) = 0;
1850
1851 /* FIXME: should be triggered by HW encryption parameters.*/
1852 *tail |= (1<<15); /* no encrypt */
1853
1854 if (remain == len && !descfrag) {
1855 ownbit_flag = false;
1856 *tail = *tail | (1 << 29); /* first segment of packet */
1857 *tail = *tail | (len);
1858 } else {
1859 ownbit_flag = true;
1860 }
1861
1862 for (i = 0; i < buflen && remain > 0; i++, remain--) {
1863 /* copy data into descriptor pointed DMAble buffer */
1864 ((u8 *)buf)[i] = txbuf[i];
1865
1866 if (remain == 4 && i+4 >= buflen)
1867 break;
1868 /* ensure the last desc has at least 4 bytes payload */
1869 }
1870 txbuf = txbuf + i;
1871 *(tail+3) = *(tail+3) & ~0xfff;
1872 *(tail+3) = *(tail+3) | i; /* buffer length */
1873
1874 if (bCTSEnable)
1875 *tail |= (1<<18);
1876
1877 if (bRTSEnable) { /* rts enable */
1878 /* RTS RATE */
1879 *tail |= (ieeerate2rtlrate(
1880 priv->ieee80211->basic_rate) << 19);
1881
1882 *tail |= (1<<23); /* rts enable */
1883 *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1884 }
1885 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1886
1887 *(tail + 5) |= (11 << 8); /* retry lim; */
1888
1889 *tail = *tail | ((rate&0xf) << 24);
1890
1891 if (morefrag)
1892 *tail = (*tail) | (1<<17); /* more fragment */
1893 if (!remain)
1894 *tail = (*tail) | (1<<28); /* last segment of frame */
1895
1896 *(tail+5) = *(tail+5)|(2<<27);
1897 *(tail+7) = *(tail+7)|(1<<4);
1898
1899 wmb();
1900 if (ownbit_flag)
1901 /* descriptor ready to be txed */
1902 *tail |= (1 << 31);
1903
1904 if ((tail - begin)/8 == count-1)
1905 tail = begin;
1906 else
1907 tail = tail+8;
1908
1909 buflist = buflist->next;
1910
1911 mb();
1912
1913 switch (priority) {
1914 case MANAGE_PRIORITY:
1915 priv->txmapringtail = tail;
1916 priv->txmapbufstail = buflist;
1917 break;
1918 case BK_PRIORITY:
1919 priv->txbkpringtail = tail;
1920 priv->txbkpbufstail = buflist;
1921 break;
1922 case BE_PRIORITY:
1923 priv->txbepringtail = tail;
1924 priv->txbepbufstail = buflist;
1925 break;
1926 case VI_PRIORITY:
1927 priv->txvipringtail = tail;
1928 priv->txvipbufstail = buflist;
1929 break;
1930 case VO_PRIORITY:
1931 priv->txvopringtail = tail;
1932 priv->txvopbufstail = buflist;
1933 break;
1934 case HI_PRIORITY:
1935 priv->txhpringtail = tail;
1936 priv->txhpbufstail = buflist;
1937 break;
1938 case BEACON_PRIORITY:
1939 /*
1940 * The HW seems to be happy with the 1st
1941 * descriptor filled and the 2nd empty...
1942 * So always update descriptor 1 and never
1943 * touch 2nd
1944 */
1945 break;
1946 }
1947 }
1948 *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1949 rtl8180_dma_kick(dev, priority);
1950
1951 return 0;
1952}
1953
1954void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1955
1956static void rtl8180_link_change(struct net_device *dev)
1957{
1958 struct r8180_priv *priv = ieee80211_priv(dev);
1959 u16 beacon_interval;
1960 struct ieee80211_network *net = &priv->ieee80211->current_network;
1961
1962 rtl8180_update_msr(dev);
1963
1964 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1965
1966 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1967 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1968
1969 beacon_interval = read_nic_word(dev, BEACON_INTERVAL);
1970 beacon_interval &= ~BEACON_INTERVAL_MASK;
1971 beacon_interval |= net->beacon_interval;
1972 write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1973
1974 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1975
1976 rtl8180_set_chan(dev, priv->chan);
1977}
1978
1979static void rtl8180_rq_tx_ack(struct net_device *dev)
1980{
1981
1982 struct r8180_priv *priv = ieee80211_priv(dev);
1983
1984 write_nic_byte(dev, CONFIG4,
1985 read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
1986 priv->ack_tx_to_ieee = 1;
1987}
1988
1989static short rtl8180_is_tx_queue_empty(struct net_device *dev)
1990{
1991
1992 struct r8180_priv *priv = ieee80211_priv(dev);
1993 u32 *d;
1994
1995 for (d = priv->txmapring;
1996 d < priv->txmapring + priv->txringcount; d += 8)
1997 if (*d & (1<<31))
1998 return 0;
1999
2000 for (d = priv->txbkpring;
2001 d < priv->txbkpring + priv->txringcount; d += 8)
2002 if (*d & (1<<31))
2003 return 0;
2004
2005 for (d = priv->txbepring;
2006 d < priv->txbepring + priv->txringcount; d += 8)
2007 if (*d & (1<<31))
2008 return 0;
2009
2010 for (d = priv->txvipring;
2011 d < priv->txvipring + priv->txringcount; d += 8)
2012 if (*d & (1<<31))
2013 return 0;
2014
2015 for (d = priv->txvopring;
2016 d < priv->txvopring + priv->txringcount; d += 8)
2017 if (*d & (1<<31))
2018 return 0;
2019
2020 for (d = priv->txhpring;
2021 d < priv->txhpring + priv->txringcount; d += 8)
2022 if (*d & (1<<31))
2023 return 0;
2024 return 1;
2025}
2026
2027static void rtl8180_hw_wakeup(struct net_device *dev)
2028{
2029 unsigned long flags;
2030 struct r8180_priv *priv = ieee80211_priv(dev);
2031
2032 spin_lock_irqsave(&priv->ps_lock, flags);
2033 write_nic_byte(dev, CONFIG4,
2034 read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2035 if (priv->rf_wakeup)
2036 priv->rf_wakeup(dev);
2037 spin_unlock_irqrestore(&priv->ps_lock, flags);
2038}
2039
2040static void rtl8180_hw_sleep_down(struct net_device *dev)
2041{
2042 unsigned long flags;
2043 struct r8180_priv *priv = ieee80211_priv(dev);
2044
2045 spin_lock_irqsave(&priv->ps_lock, flags);
2046 if (priv->rf_sleep)
2047 priv->rf_sleep(dev);
2048 spin_unlock_irqrestore(&priv->ps_lock, flags);
2049}
2050
2051static void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2052{
2053 struct r8180_priv *priv = ieee80211_priv(dev);
2054 u32 rb = jiffies;
2055 unsigned long flags;
2056
2057 spin_lock_irqsave(&priv->ps_lock, flags);
2058
2059 /*
2060 * Writing HW register with 0 equals to disable
2061 * the timer, that is not really what we want
2062 */
2063 tl -= MSECS(4+16+7);
2064
2065 /*
2066 * If the interval in which we are requested to sleep is too
2067 * short then give up and remain awake
2068 */
2069 if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2070 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2071 spin_unlock_irqrestore(&priv->ps_lock, flags);
2072 netdev_warn(dev, "too short to sleep\n");
2073 return;
2074 }
2075
2076 {
2077 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2078
2079 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2080 /* as tl may be less than rb */
2081 queue_delayed_work(priv->ieee80211->wq,
2082 &priv->ieee80211->hw_wakeup_wq, tmp);
2083 }
2084 /*
2085 * If we suspect the TimerInt is gone beyond tl
2086 * while setting it, then give up
2087 */
2088
2089 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2090 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2091 spin_unlock_irqrestore(&priv->ps_lock, flags);
2092 return;
2093 }
2094
2095 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2096 spin_unlock_irqrestore(&priv->ps_lock, flags);
2097}
2098
2099static void rtl8180_wmm_single_param_update(struct net_device *dev,
2100 u8 mode, AC_CODING eACI, PAC_PARAM param)
2101{
2102 u8 u1bAIFS;
2103 u32 u4bAcParam;
2104
2105 /* Retrieve parameters to update. */
2106 /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2107 u1bAIFS = param->f.AciAifsn.f.AIFSN * ((mode & IEEE_G) == IEEE_G ?
2108 9 : 20) + aSifsTime;
2109 u4bAcParam = (((u32)param->f.TXOPLimit << AC_PARAM_TXOP_LIMIT_OFFSET) |
2110 ((u32)param->f.Ecw.f.ECWmax << AC_PARAM_ECW_MAX_OFFSET) |
2111 ((u32)param->f.Ecw.f.ECWmin << AC_PARAM_ECW_MIN_OFFSET) |
2112 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2113
2114 switch (eACI) {
2115 case AC1_BK:
2116 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2117 return;
2118 case AC0_BE:
2119 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2120 return;
2121 case AC2_VI:
2122 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2123 return;
2124 case AC3_VO:
2125 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2126 return;
2127 default:
2128 pr_warn("SetHwReg8185(): invalid ACI: %d!\n", eACI);
2129 return;
2130 }
2131}
2132
2133static void rtl8180_wmm_param_update(struct work_struct *work)
2134{
2135 struct ieee80211_device *ieee = container_of(work,
2136 struct ieee80211_device, wmm_param_update_wq);
2137 struct net_device *dev = ieee->dev;
2138 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2139 u8 mode = ieee->current_network.mode;
2140 AC_CODING eACI;
2141 AC_PARAM AcParam;
2142
2143 if (!ieee->current_network.QoS_Enable) {
2144 /* legacy ac_xx_param update */
2145 AcParam.longData = 0;
2146 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2147 AcParam.f.AciAifsn.f.ACM = 0;
2148 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2149 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2150 AcParam.f.TXOPLimit = 0;
2151
2152 for (eACI = 0; eACI < AC_MAX; eACI++) {
2153 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2154
2155 rtl8180_wmm_single_param_update(dev, mode, eACI,
2156 (PAC_PARAM)&AcParam);
2157 }
2158 return;
2159 }
2160
2161 for (eACI = 0; eACI < AC_MAX; eACI++) {
2162 rtl8180_wmm_single_param_update(dev, mode,
2163 ((PAC_PARAM)ac_param)->f.AciAifsn.f.ACI,
2164 (PAC_PARAM)ac_param);
2165
2166 ac_param += sizeof(AC_PARAM);
2167 }
2168}
2169
2170void rtl8180_restart_wq(struct work_struct *work);
2171void rtl8180_watch_dog_wq(struct work_struct *work);
2172void rtl8180_hw_wakeup_wq(struct work_struct *work);
2173void rtl8180_hw_sleep_wq(struct work_struct *work);
2174void rtl8180_sw_antenna_wq(struct work_struct *work);
2175void rtl8180_watch_dog(struct net_device *dev);
2176
2177static void watch_dog_adaptive(unsigned long data)
2178{
2179 struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2180
2181 if (!priv->up) {
2182 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2183 return;
2184 }
2185
2186 /* Tx High Power Mechanism. */
2187 if (CheckHighPower((struct net_device *)data))
2188 queue_work(priv->ieee80211->wq,
2189 (void *)&priv->ieee80211->tx_pw_wq);
2190
2191 /* Tx Power Tracking on 87SE. */
2192 if (CheckTxPwrTracking((struct net_device *)data))
2193 TxPwrTracking87SE((struct net_device *)data);
2194
2195 /* Perform DIG immediately. */
2196 if (CheckDig((struct net_device *)data))
2197 queue_work(priv->ieee80211->wq,
2198 (void *)&priv->ieee80211->hw_dig_wq);
2199
2200 rtl8180_watch_dog((struct net_device *)data);
2201
2202 queue_work(priv->ieee80211->wq,
2203 (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2204
2205 priv->watch_dog_timer.expires = jiffies +
2206 MSECS(IEEE80211_WATCH_DOG_TIME);
2207
2208 add_timer(&priv->watch_dog_timer);
2209}
2210
2211static struct rtl8187se_channel_list channel_plan_list[] = {
2212 /* FCC */
2213 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40,
2214 44, 48, 52, 56, 60, 64}, 19},
2215
2216 /* IC */
2217 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},
2218
2219 /* ETSI */
2220 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
2221 44, 48, 52, 56, 60, 64}, 21},
2222
2223 /* Spain. Change to ETSI. */
2224 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
2225 44, 48, 52, 56, 60, 64}, 21},
2226
2227 /* France. Change to ETSI. */
2228 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
2229 44, 48, 52, 56, 60, 64}, 21},
2230
2231 /* MKK */
2232 {{14, 36, 40, 44, 48, 52, 56, 60, 64}, 9},
2233
2234 /* MKK1 */
2235 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36,
2236 40, 44, 48, 52, 56, 60, 64}, 22},
2237
2238 /* Israel. */
2239 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
2240 44, 48, 52, 56, 60, 64}, 21},
2241
2242 /* For 11a , TELEC */
2243 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 34, 38, 42, 46}, 17},
2244
2245 /* For Global Domain. 1-11 active, 12-14 passive. */
2246 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
2247
2248 /* world wide 13: ch1~ch11 active, ch12~13 passive */
2249 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}
2250};
2251
2252static void rtl8180_set_channel_map(u8 channel_plan,
2253 struct ieee80211_device *ieee)
2254{
2255 int i;
2256
2257 ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2258 ieee->IbssStartChnl = 0;
2259
2260 switch (channel_plan) {
2261 case COUNTRY_CODE_FCC:
2262 case COUNTRY_CODE_IC:
2263 case COUNTRY_CODE_ETSI:
2264 case COUNTRY_CODE_SPAIN:
2265 case COUNTRY_CODE_FRANCE:
2266 case COUNTRY_CODE_MKK:
2267 case COUNTRY_CODE_MKK1:
2268 case COUNTRY_CODE_ISRAEL:
2269 case COUNTRY_CODE_TELEC:
2270 {
2271 Dot11d_Init(ieee);
2272 ieee->bGlobalDomain = false;
2273 if (channel_plan_list[channel_plan].len != 0) {
2274 /* Clear old channel map */
2275 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2276 /* Set new channel map */
2277 for (i = 0; i < channel_plan_list[channel_plan].len; i++) {
2278 if (channel_plan_list[channel_plan].channel[i] <= 14)
2279 GET_DOT11D_INFO(ieee)->channel_map[channel_plan_list[channel_plan].channel[i]] = 1;
2280 }
2281 }
2282 break;
2283 }
2284 case COUNTRY_CODE_GLOBAL_DOMAIN:
2285 {
2286 GET_DOT11D_INFO(ieee)->bEnabled = false;
2287 Dot11d_Reset(ieee);
2288 ieee->bGlobalDomain = true;
2289 break;
2290 }
2291 case COUNTRY_CODE_WORLD_WIDE_13_INDEX:
2292 {
2293 ieee->MinPassiveChnlNum = 12;
2294 ieee->IbssStartChnl = 10;
2295 break;
2296 }
2297 default:
2298 {
2299 Dot11d_Init(ieee);
2300 ieee->bGlobalDomain = false;
2301 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2302 for (i = 1; i <= 14; i++)
2303 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2304 break;
2305 }
2306 }
2307}
2308
2309void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2310
2311static void rtl8180_statistics_init(struct stats *pstats)
2312{
2313 memset(pstats, 0, sizeof(struct stats));
2314}
2315
2316static void rtl8180_link_detect_init(struct link_detect_t *plink_detect)
2317{
2318 memset(plink_detect, 0, sizeof(struct link_detect_t));
2319 plink_detect->slot_num = DEFAULT_SLOT_NUM;
2320}
2321
2322static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2323{
2324 struct net_device *dev = eeprom->data;
2325 u8 reg = read_nic_byte(dev, EPROM_CMD);
2326
2327 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2328 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2329 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2330 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2331}
2332
2333static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2334{
2335 struct net_device *dev = eeprom->data;
2336 u8 reg = 2 << 6;
2337
2338 if (eeprom->reg_data_in)
2339 reg |= RTL818X_EEPROM_CMD_WRITE;
2340 if (eeprom->reg_data_out)
2341 reg |= RTL818X_EEPROM_CMD_READ;
2342 if (eeprom->reg_data_clock)
2343 reg |= RTL818X_EEPROM_CMD_CK;
2344 if (eeprom->reg_chip_select)
2345 reg |= RTL818X_EEPROM_CMD_CS;
2346
2347 write_nic_byte(dev, EPROM_CMD, reg);
2348 read_nic_byte(dev, EPROM_CMD);
2349 udelay(10);
2350}
2351
2352static short rtl8180_init(struct net_device *dev)
2353{
2354 struct r8180_priv *priv = ieee80211_priv(dev);
2355 u16 word;
2356 u16 usValue;
2357 u16 tmpu16;
2358 int i, j;
2359 struct eeprom_93cx6 eeprom;
2360 u16 eeprom_val;
2361
2362 eeprom.data = dev;
2363 eeprom.register_read = rtl8187se_eeprom_register_read;
2364 eeprom.register_write = rtl8187se_eeprom_register_write;
2365 eeprom.width = PCI_EEPROM_WIDTH_93C46;
2366
2367 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2368 priv->channel_plan = eeprom_val & 0xFF;
2369 if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2370 netdev_err(dev, "rtl8180_init: Invalid channel plan! Set to default.\n");
2371 priv->channel_plan = 0;
2372 }
2373
2374 DMESG("Channel plan is %d\n", priv->channel_plan);
2375 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2376
2377 /* FIXME: these constants are placed in a bad pleace. */
2378 priv->txbuffsize = 2048; /* 1024; */
2379 priv->txringcount = 32; /* 32; */
2380 priv->rxbuffersize = 2048; /* 1024; */
2381 priv->rxringcount = 64; /* 32; */
2382 priv->txbeaconcount = 2;
2383 priv->rx_skb_complete = 1;
2384
2385 priv->RFChangeInProgress = false;
2386 priv->SetRFPowerStateInProgress = false;
2387 priv->RFProgType = 0;
2388
2389 priv->irq_enabled = 0;
2390
2391 rtl8180_statistics_init(&priv->stats);
2392 rtl8180_link_detect_init(&priv->link_detect);
2393
2394 priv->ack_tx_to_ieee = 0;
2395 priv->ieee80211->current_network.beacon_interval =
2396 DEFAULT_BEACONINTERVAL;
2397 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2398 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2399 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2400 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2401 priv->ieee80211->active_scan = 1;
2402 priv->ieee80211->rate = 110; /* 11 mbps */
2403 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2404 priv->ieee80211->host_encrypt = 1;
2405 priv->ieee80211->host_decrypt = 1;
2406 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2407 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2408 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2409 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2410
2411 priv->hw_wep = hwwep;
2412 priv->dev = dev;
2413 priv->retry_rts = DEFAULT_RETRY_RTS;
2414 priv->retry_data = DEFAULT_RETRY_DATA;
2415 priv->RFChangeInProgress = false;
2416 priv->SetRFPowerStateInProgress = false;
2417 priv->RFProgType = 0;
2418 priv->bInactivePs = true; /* false; */
2419 priv->ieee80211->bInactivePs = priv->bInactivePs;
2420 priv->bSwRfProcessing = false;
2421 priv->eRFPowerState = RF_OFF;
2422 priv->RfOffReason = 0;
2423 priv->led_strategy = SW_LED_MODE0;
2424 priv->TxPollingTimes = 0;
2425 priv->bLeisurePs = true;
2426 priv->dot11PowerSaveMode = ACTIVE;
2427 priv->AdMinCheckPeriod = 5;
2428 priv->AdMaxCheckPeriod = 10;
2429 priv->AdMaxRxSsThreshold = 30; /* 60->30 */
2430 priv->AdRxSsThreshold = 20; /* 50->20 */
2431 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2432 priv->AdTickCount = 0;
2433 priv->AdRxSignalStrength = -1;
2434 priv->RegSwAntennaDiversityMechanism = 0;
2435 priv->RegDefaultAntenna = 0;
2436 priv->SignalStrength = 0;
2437 priv->AdRxOkCnt = 0;
2438 priv->CurrAntennaIndex = 0;
2439 priv->AdRxSsBeforeSwitched = 0;
2440 init_timer(&priv->SwAntennaDiversityTimer);
2441 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2442 priv->SwAntennaDiversityTimer.function =
2443 (void *)SwAntennaDiversityTimerCallback;
2444 priv->bDigMechanism = true;
2445 priv->InitialGain = 6;
2446 priv->bXtalCalibration = false;
2447 priv->XtalCal_Xin = 0;
2448 priv->XtalCal_Xout = 0;
2449 priv->bTxPowerTrack = false;
2450 priv->ThermalMeter = 0;
2451 priv->FalseAlarmRegValue = 0;
2452 priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm,
2453 which is used in DIG. */
2454 priv->DIG_NumberFallbackVote = 0;
2455 priv->DIG_NumberUpgradeVote = 0;
2456 priv->LastSignalStrengthInPercent = 0;
2457 priv->Stats_SignalStrength = 0;
2458 priv->LastRxPktAntenna = 0;
2459 priv->SignalQuality = 0; /* in 0-100 index. */
2460 priv->Stats_SignalQuality = 0;
2461 priv->RecvSignalPower = 0; /* in dBm. */
2462 priv->Stats_RecvSignalPower = 0;
2463 priv->AdMainAntennaRxOkCnt = 0;
2464 priv->AdAuxAntennaRxOkCnt = 0;
2465 priv->bHWAdSwitched = false;
2466 priv->bRegHighPowerMechanism = true;
2467 priv->RegHiPwrUpperTh = 77;
2468 priv->RegHiPwrLowerTh = 75;
2469 priv->RegRSSIHiPwrUpperTh = 70;
2470 priv->RegRSSIHiPwrLowerTh = 20;
2471 priv->bCurCCKPkt = false;
2472 priv->UndecoratedSmoothedSS = -1;
2473 priv->bToUpdateTxPwr = false;
2474 priv->CurCCKRSSI = 0;
2475 priv->RxPower = 0;
2476 priv->RSSI = 0;
2477 priv->NumTxOkTotal = 0;
2478 priv->NumTxUnicast = 0;
2479 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2480 priv->CurrRetryCnt = 0;
2481 priv->LastRetryCnt = 0;
2482 priv->LastTxokCnt = 0;
2483 priv->LastRxokCnt = 0;
2484 priv->LastRetryRate = 0;
2485 priv->bTryuping = 0;
2486 priv->CurrTxRate = 0;
2487 priv->CurrRetryRate = 0;
2488 priv->TryupingCount = 0;
2489 priv->TryupingCountNoData = 0;
2490 priv->TryDownCountLowData = 0;
2491 priv->LastTxOKBytes = 0;
2492 priv->LastFailTxRate = 0;
2493 priv->LastFailTxRateSS = 0;
2494 priv->FailTxRateCount = 0;
2495 priv->LastTxThroughput = 0;
2496 priv->NumTxOkBytesTotal = 0;
2497 priv->ForcedDataRate = 0;
2498 priv->RegBModeGainStage = 1;
2499
2500 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2501 spin_lock_init(&priv->irq_th_lock);
2502 spin_lock_init(&priv->tx_lock);
2503 spin_lock_init(&priv->ps_lock);
2504 spin_lock_init(&priv->rf_ps_lock);
2505 sema_init(&priv->wx_sem, 1);
2506 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2507 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2508 (void *)rtl8180_hw_wakeup_wq);
2509 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2510 (void *)rtl8180_hw_sleep_wq);
2511 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2512 (void *)rtl8180_wmm_param_update);
2513 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2514 (void *)rtl8180_rate_adapter);
2515 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2516 (void *)rtl8180_hw_dig_wq);
2517 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2518 (void *)rtl8180_tx_pw_wq);
2519 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2520 (void *) GPIOChangeRFWorkItemCallBack);
2521 tasklet_init(&priv->irq_rx_tasklet,
2522 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2523 (unsigned long)priv);
2524
2525 init_timer(&priv->watch_dog_timer);
2526 priv->watch_dog_timer.data = (unsigned long)dev;
2527 priv->watch_dog_timer.function = watch_dog_adaptive;
2528
2529 init_timer(&priv->rateadapter_timer);
2530 priv->rateadapter_timer.data = (unsigned long)dev;
2531 priv->rateadapter_timer.function = timer_rate_adaptive;
2532 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2533 priv->bEnhanceTxPwr = false;
2534
2535 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2536 priv->ieee80211->set_chan = rtl8180_set_chan;
2537 priv->ieee80211->link_change = rtl8180_link_change;
2538 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2539 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2540 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2541
2542 priv->ieee80211->init_wmmparam_flag = 0;
2543
2544 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2545 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2546 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2547
2548 priv->ShortRetryLimit = 7;
2549 priv->LongRetryLimit = 7;
2550 priv->EarlyRxThreshold = 7;
2551
2552 priv->TransmitConfig = (1<<TCR_DurProcMode_OFFSET) |
2553 (7<<TCR_MXDMA_OFFSET) |
2554 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2555 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2556
2557 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2558 RCR_AB | RCR_AM | RCR_APM |
2559 (7<<RCR_MXDMA_OFFSET) |
2560 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2561 (priv->EarlyRxThreshold == 7 ?
2562 RCR_ONLYERLPKT : 0);
2563
2564 priv->IntrMask = IMR_TMGDOK | IMR_TBDER |
2565 IMR_THPDER | IMR_THPDOK |
2566 IMR_TVODER | IMR_TVODOK |
2567 IMR_TVIDER | IMR_TVIDOK |
2568 IMR_TBEDER | IMR_TBEDOK |
2569 IMR_TBKDER | IMR_TBKDOK |
2570 IMR_RDU |
2571 IMR_RER | IMR_ROK |
2572 IMR_RQoSOK;
2573
2574 priv->InitialGain = 6;
2575
2576 DMESG("MAC controller is a RTL8187SE b/g");
2577
2578 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2579 priv->ieee80211->short_slot = 1;
2580
2581 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2582 DMESG("usValue is %#hx\n", usValue);
2583 /* 3Read AntennaDiversity */
2584
2585 /* SW Antenna Diversity. */
2586 priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2587 EEPROM_SW_AD_ENABLE;
2588
2589 /* Default Antenna to use. */
2590 priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2591 EEPROM_DEF_ANT_1;
2592
2593 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2594 /* 0: default from EEPROM. */
2595 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2596 else
2597 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2598 priv->bSwAntennaDiverity =
2599 priv->RegSwAntennaDiversityMechanism == 2;
2600
2601 if (priv->RegDefaultAntenna == 0)
2602 /* 0: default from EEPROM. */
2603 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2604 else
2605 /* 1: main, 2: aux. */
2606 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2607
2608 priv->plcp_preamble_mode = 2;
2609 /* the eeprom type is stored in RCR register bit #6 */
2610 if (RCR_9356SEL & read_nic_dword(dev, RCR))
2611 priv->epromtype = EPROM_93c56;
2612 else
2613 priv->epromtype = EPROM_93c46;
2614
2615 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2616 dev->dev_addr, 3);
2617
2618 for (i = 1, j = 0; i < 14; i += 2, j++) {
2619 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2620 priv->chtxpwr[i] = word & 0xff;
2621 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2622 }
2623 for (i = 1, j = 0; i < 14; i += 2, j++) {
2624 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2625 priv->chtxpwr_ofdm[i] = word & 0xff;
2626 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2627 }
2628
2629 /* 3Read crystal calibration and thermal meter indication on 87SE. */
2630 eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2631
2632 /* Crystal calibration for Xin and Xout resp. */
2633 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2634 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2635 if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2636 priv->bXtalCalibration = true;
2637
2638 /* Thermal meter reference indication. */
2639 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2640 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2641 priv->bTxPowerTrack = true;
2642
2643 priv->rf_sleep = rtl8225z4_rf_sleep;
2644 priv->rf_wakeup = rtl8225z4_rf_wakeup;
2645 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2646
2647 priv->rf_close = rtl8225z2_rf_close;
2648 priv->rf_init = rtl8225z2_rf_init;
2649 priv->rf_set_chan = rtl8225z2_rf_set_chan;
2650 priv->rf_set_sens = NULL;
2651
2652 if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2653 return -ENOMEM;
2654
2655 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2656 TX_MANAGEPRIORITY_RING_ADDR))
2657 return -ENOMEM;
2658
2659 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2660 TX_BKPRIORITY_RING_ADDR))
2661 return -ENOMEM;
2662
2663 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2664 TX_BEPRIORITY_RING_ADDR))
2665 return -ENOMEM;
2666
2667 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2668 TX_VIPRIORITY_RING_ADDR))
2669 return -ENOMEM;
2670
2671 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2672 TX_VOPRIORITY_RING_ADDR))
2673 return -ENOMEM;
2674
2675 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2676 TX_HIGHPRIORITY_RING_ADDR))
2677 return -ENOMEM;
2678
2679 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2680 TX_BEACON_RING_ADDR))
2681 return -ENOMEM;
2682
2683 if (request_irq(dev->irq, rtl8180_interrupt,
2684 IRQF_SHARED, dev->name, dev)) {
2685 DMESGE("Error allocating IRQ %d", dev->irq);
2686 return -1;
2687 } else {
2688 priv->irq = dev->irq;
2689 DMESG("IRQ %d", dev->irq);
2690 }
2691
2692 return 0;
2693}
2694
2695void rtl8180_no_hw_wep(struct net_device *dev)
2696{
2697}
2698
2699void rtl8180_set_hw_wep(struct net_device *dev)
2700{
2701 struct r8180_priv *priv = ieee80211_priv(dev);
2702 u8 pgreg;
2703 u8 security;
2704 u32 key0_word4;
2705
2706 pgreg = read_nic_byte(dev, PGSELECT);
2707 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2708
2709 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2710 key0_word4 &= ~0xff;
2711 key0_word4 |= priv->key0[3] & 0xff;
2712 write_nic_dword(dev, KEY0, (priv->key0[0]));
2713 write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2714 write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2715 write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2716
2717 security = read_nic_byte(dev, SECURITY);
2718 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2719 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2720 security &= ~SECURITY_ENCRYP_MASK;
2721 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2722
2723 write_nic_byte(dev, SECURITY, security);
2724
2725 DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2726 read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2727 read_nic_dword(dev, KEY0));
2728}
2729
2730
2731void rtl8185_rf_pins_enable(struct net_device *dev)
2732{
2733 write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2734}
2735
2736void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2737{
2738 u8 conf3;
2739
2740 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2741
2742 conf3 = read_nic_byte(dev, CONFIG3);
2743 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2744 write_nic_dword(dev, ANAPARAM2, a);
2745
2746 conf3 = read_nic_byte(dev, CONFIG3);
2747 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2748 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2749}
2750
2751void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2752{
2753 u8 conf3;
2754
2755 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2756
2757 conf3 = read_nic_byte(dev, CONFIG3);
2758 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2759 write_nic_dword(dev, ANAPARAM, a);
2760
2761 conf3 = read_nic_byte(dev, CONFIG3);
2762 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2763 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2764}
2765
2766void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2767{
2768 write_nic_byte(dev, TX_ANTENNA, ant);
2769 force_pci_posting(dev);
2770 mdelay(1);
2771}
2772
2773static void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2774{
2775 u32 phyw;
2776
2777 adr |= 0x80;
2778
2779 phyw = ((data<<8) | adr);
2780
2781 /* Note: we must write 0xff7c after 0x7d-0x7f to write BB register. */
2782 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2783 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2784 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2785 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2786}
2787
2788inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2789{
2790 data = data & 0xff;
2791 rtl8185_write_phy(dev, adr, data);
2792}
2793
2794void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2795{
2796 data = data & 0xff;
2797 rtl8185_write_phy(dev, adr, data | 0x10000);
2798}
2799
2800/*
2801 * This configures registers for beacon tx and enables it via
2802 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2803 * be used to stop beacon transmission
2804 */
2805void rtl8180_start_tx_beacon(struct net_device *dev)
2806{
2807 u16 word;
2808
2809 DMESG("Enabling beacon TX");
2810 rtl8180_prepare_beacon(dev);
2811 rtl8180_irq_disable(dev);
2812 rtl8180_beacon_tx_enable(dev);
2813
2814 word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2815 write_nic_word(dev, AtimWnd, word); /* word |= */
2816
2817 word = read_nic_word(dev, BintrItv);
2818 word &= ~BintrItv_BintrItv;
2819 word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2820 * ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2821 * FIXME: check if correct ^^ worked with 0x3e8;
2822 */
2823 write_nic_word(dev, BintrItv, word);
2824
2825 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2826
2827 rtl8185b_irq_enable(dev);
2828}
2829
2830static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2831{
2832 struct r8180_priv *priv = ieee80211_priv(dev);
2833
2834 return &priv->ieee80211->stats;
2835}
2836
2837/*
2838 * Change current and default preamble mode.
2839 */
2840static bool MgntActSet_802_11_PowerSaveMode(struct r8180_priv *priv,
2841 enum rt_ps_mode rtPsMode)
2842{
2843 /* Currently, we do not change power save mode on IBSS mode. */
2844 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2845 return false;
2846
2847 priv->ieee80211->ps = rtPsMode;
2848
2849 return true;
2850}
2851
2852static void LeisurePSEnter(struct r8180_priv *priv)
2853{
2854 if (priv->bLeisurePs)
2855 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2856 /* IEEE80211_PS_ENABLE */
2857 MgntActSet_802_11_PowerSaveMode(priv,
2858 IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST);
2859}
2860
2861static void LeisurePSLeave(struct r8180_priv *priv)
2862{
2863 if (priv->bLeisurePs)
2864 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2865 MgntActSet_802_11_PowerSaveMode(
2866 priv, IEEE80211_PS_DISABLED);
2867}
2868
2869void rtl8180_hw_wakeup_wq(struct work_struct *work)
2870{
2871 struct delayed_work *dwork = to_delayed_work(work);
2872 struct ieee80211_device *ieee = container_of(
2873 dwork, struct ieee80211_device, hw_wakeup_wq);
2874 struct net_device *dev = ieee->dev;
2875
2876 rtl8180_hw_wakeup(dev);
2877}
2878
2879void rtl8180_hw_sleep_wq(struct work_struct *work)
2880{
2881 struct delayed_work *dwork = to_delayed_work(work);
2882 struct ieee80211_device *ieee = container_of(
2883 dwork, struct ieee80211_device, hw_sleep_wq);
2884 struct net_device *dev = ieee->dev;
2885
2886 rtl8180_hw_sleep_down(dev);
2887}
2888
2889static void MgntLinkKeepAlive(struct r8180_priv *priv)
2890{
2891 if (priv->keepAliveLevel == 0)
2892 return;
2893
2894 if (priv->ieee80211->state == IEEE80211_LINKED) {
2895 /*
2896 * Keep-Alive.
2897 */
2898
2899 if ((priv->keepAliveLevel == 2) ||
2900 (priv->link_detect.last_num_tx_unicast ==
2901 priv->NumTxUnicast &&
2902 priv->link_detect.last_num_rx_unicast ==
2903 priv->ieee80211->NumRxUnicast)
2904 ) {
2905 priv->link_detect.idle_count++;
2906
2907 /*
2908 * Send a Keep-Alive packet packet to AP if we had
2909 * been idle for a while.
2910 */
2911 if (priv->link_detect.idle_count >=
2912 KEEP_ALIVE_INTERVAL /
2913 CHECK_FOR_HANG_PERIOD - 1) {
2914 priv->link_detect.idle_count = 0;
2915 ieee80211_sta_ps_send_null_frame(
2916 priv->ieee80211, false);
2917 }
2918 } else {
2919 priv->link_detect.idle_count = 0;
2920 }
2921 priv->link_detect.last_num_tx_unicast = priv->NumTxUnicast;
2922 priv->link_detect.last_num_rx_unicast =
2923 priv->ieee80211->NumRxUnicast;
2924 }
2925}
2926
2927void rtl8180_watch_dog(struct net_device *dev)
2928{
2929 struct r8180_priv *priv = ieee80211_priv(dev);
2930 bool bEnterPS = false;
2931 bool bBusyTraffic = false;
2932 u32 TotalRxNum = 0;
2933 u16 SlotIndex = 0;
2934 u16 i = 0;
2935 if (priv->ieee80211->actscanning == false) {
2936 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2937 (priv->ieee80211->state == IEEE80211_NOLINK) &&
2938 (priv->ieee80211->beinretry == false) &&
2939 (priv->eRFPowerState == RF_ON))
2940 IPSEnter(dev);
2941 }
2942 if ((priv->ieee80211->state == IEEE80211_LINKED) &&
2943 (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2944 SlotIndex = (priv->link_detect.slot_index++) %
2945 priv->link_detect.slot_num;
2946
2947 priv->link_detect.rx_frame_num[SlotIndex] =
2948 priv->ieee80211->NumRxDataInPeriod +
2949 priv->ieee80211->NumRxBcnInPeriod;
2950
2951 for (i = 0; i < priv->link_detect.slot_num; i++)
2952 TotalRxNum += priv->link_detect.rx_frame_num[i];
2953
2954 if (TotalRxNum == 0) {
2955 priv->ieee80211->state = IEEE80211_ASSOCIATING;
2956 queue_work(priv->ieee80211->wq,
2957 &priv->ieee80211->associate_procedure_wq);
2958 }
2959 }
2960
2961 MgntLinkKeepAlive(priv);
2962
2963 LeisurePSLeave(priv);
2964
2965 if (priv->ieee80211->state == IEEE80211_LINKED) {
2966 priv->link_detect.num_rx_ok_in_period =
2967 priv->ieee80211->NumRxDataInPeriod;
2968 if (priv->link_detect.num_rx_ok_in_period > 666 ||
2969 priv->link_detect.num_tx_ok_in_period > 666) {
2970 bBusyTraffic = true;
2971 }
2972 if ((priv->link_detect.num_rx_ok_in_period +
2973 priv->link_detect.num_tx_ok_in_period > 8)
2974 || (priv->link_detect.num_rx_ok_in_period > 2)) {
2975 bEnterPS = false;
2976 } else
2977 bEnterPS = true;
2978
2979 if (bEnterPS)
2980 LeisurePSEnter(priv);
2981 else
2982 LeisurePSLeave(priv);
2983 } else
2984 LeisurePSLeave(priv);
2985 priv->link_detect.b_busy_traffic = bBusyTraffic;
2986 priv->link_detect.num_rx_ok_in_period = 0;
2987 priv->link_detect.num_tx_ok_in_period = 0;
2988 priv->ieee80211->NumRxDataInPeriod = 0;
2989 priv->ieee80211->NumRxBcnInPeriod = 0;
2990}
2991
2992static int _rtl8180_up(struct net_device *dev)
2993{
2994 struct r8180_priv *priv = ieee80211_priv(dev);
2995
2996 priv->up = 1;
2997
2998 DMESG("Bringing up iface");
2999 rtl8185b_adapter_start(dev);
3000 rtl8185b_rx_enable(dev);
3001 rtl8185b_tx_enable(dev);
3002 if (priv->bInactivePs) {
3003 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3004 IPSLeave(dev);
3005 }
3006 timer_rate_adaptive((unsigned long)dev);
3007 watch_dog_adaptive((unsigned long)dev);
3008 if (priv->bSwAntennaDiverity)
3009 SwAntennaDiversityTimerCallback(dev);
3010 ieee80211_softmac_start_protocol(priv->ieee80211);
3011 return 0;
3012}
3013
3014static int rtl8180_open(struct net_device *dev)
3015{
3016 struct r8180_priv *priv = ieee80211_priv(dev);
3017 int ret;
3018
3019 down(&priv->wx_sem);
3020 ret = rtl8180_up(dev);
3021 up(&priv->wx_sem);
3022 return ret;
3023}
3024
3025int rtl8180_up(struct net_device *dev)
3026{
3027 struct r8180_priv *priv = ieee80211_priv(dev);
3028
3029 if (priv->up == 1)
3030 return -1;
3031
3032 return _rtl8180_up(dev);
3033}
3034
3035static int rtl8180_close(struct net_device *dev)
3036{
3037 struct r8180_priv *priv = ieee80211_priv(dev);
3038 int ret;
3039
3040 down(&priv->wx_sem);
3041 ret = rtl8180_down(dev);
3042 up(&priv->wx_sem);
3043
3044 return ret;
3045}
3046
3047int rtl8180_down(struct net_device *dev)
3048{
3049 struct r8180_priv *priv = ieee80211_priv(dev);
3050
3051 if (priv->up == 0)
3052 return -1;
3053
3054 priv->up = 0;
3055
3056 ieee80211_softmac_stop_protocol(priv->ieee80211);
3057 /* FIXME */
3058 if (!netif_queue_stopped(dev))
3059 netif_stop_queue(dev);
3060 rtl8180_rtx_disable(dev);
3061 rtl8180_irq_disable(dev);
3062 del_timer_sync(&priv->watch_dog_timer);
3063 del_timer_sync(&priv->rateadapter_timer);
3064 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3065 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3066 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3067 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3068 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3069 del_timer_sync(&priv->SwAntennaDiversityTimer);
3070 SetZebraRFPowerState8185(dev, RF_OFF);
3071 memset(&priv->ieee80211->current_network,
3072 0, sizeof(struct ieee80211_network));
3073 priv->ieee80211->state = IEEE80211_NOLINK;
3074 return 0;
3075}
3076
3077void rtl8180_restart_wq(struct work_struct *work)
3078{
3079 struct r8180_priv *priv = container_of(
3080 work, struct r8180_priv, reset_wq);
3081 struct net_device *dev = priv->dev;
3082
3083 down(&priv->wx_sem);
3084
3085 rtl8180_commit(dev);
3086
3087 up(&priv->wx_sem);
3088}
3089
3090static void rtl8180_restart(struct net_device *dev)
3091{
3092 struct r8180_priv *priv = ieee80211_priv(dev);
3093
3094 schedule_work(&priv->reset_wq);
3095}
3096
3097void rtl8180_commit(struct net_device *dev)
3098{
3099 struct r8180_priv *priv = ieee80211_priv(dev);
3100
3101 if (priv->up == 0)
3102 return;
3103
3104 del_timer_sync(&priv->watch_dog_timer);
3105 del_timer_sync(&priv->rateadapter_timer);
3106 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3107 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3108 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3109 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3110 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3111 del_timer_sync(&priv->SwAntennaDiversityTimer);
3112 ieee80211_softmac_stop_protocol(priv->ieee80211);
3113 rtl8180_irq_disable(dev);
3114 rtl8180_rtx_disable(dev);
3115 _rtl8180_up(dev);
3116}
3117
3118static void r8180_set_multicast(struct net_device *dev)
3119{
3120 struct r8180_priv *priv = ieee80211_priv(dev);
3121 short promisc;
3122
3123 promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3124
3125 if (promisc != priv->promisc)
3126 rtl8180_restart(dev);
3127
3128 priv->promisc = promisc;
3129}
3130
3131static int r8180_set_mac_adr(struct net_device *dev, void *mac)
3132{
3133 struct r8180_priv *priv = ieee80211_priv(dev);
3134 struct sockaddr *addr = mac;
3135
3136 down(&priv->wx_sem);
3137
3138 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3139
3140 if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3141 memcpy(priv->ieee80211->current_network.bssid,
3142 dev->dev_addr, ETH_ALEN);
3143
3144 if (priv->up) {
3145 rtl8180_down(dev);
3146 rtl8180_up(dev);
3147 }
3148
3149 up(&priv->wx_sem);
3150
3151 return 0;
3152}
3153
3154/* based on ipw2200 driver */
3155static int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3156{
3157 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3158 struct iwreq *wrq = (struct iwreq *) rq;
3159 int ret = -1;
3160
3161 switch (cmd) {
3162 case RTL_IOCTL_WPA_SUPPLICANT:
3163 ret = ieee80211_wpa_supplicant_ioctl(
3164 priv->ieee80211, &wrq->u.data);
3165 return ret;
3166 default:
3167 return -EOPNOTSUPP;
3168 }
3169
3170 return -EOPNOTSUPP;
3171}
3172
3173static const struct net_device_ops rtl8180_netdev_ops = {
3174 .ndo_open = rtl8180_open,
3175 .ndo_stop = rtl8180_close,
3176 .ndo_get_stats = rtl8180_stats,
3177 .ndo_tx_timeout = rtl8180_restart,
3178 .ndo_do_ioctl = rtl8180_ioctl,
3179 .ndo_set_rx_mode = r8180_set_multicast,
3180 .ndo_set_mac_address = r8180_set_mac_adr,
3181 .ndo_validate_addr = eth_validate_addr,
3182 .ndo_change_mtu = eth_change_mtu,
3183 .ndo_start_xmit = ieee80211_rtl_xmit,
3184};
3185
3186static int rtl8180_pci_probe(struct pci_dev *pdev,
3187 const struct pci_device_id *id)
3188{
3189 unsigned long ioaddr = 0;
3190 struct net_device *dev = NULL;
3191 struct r8180_priv *priv = NULL;
3192 u8 unit = 0;
3193 int ret = -ENODEV;
3194
3195 unsigned long pmem_start, pmem_len, pmem_flags;
3196
3197 DMESG("Configuring chip resources");
3198
3199 if (pci_enable_device(pdev)) {
3200 DMESG("Failed to enable PCI device");
3201 return -EIO;
3202 }
3203
3204 pci_set_master(pdev);
3205 pci_set_dma_mask(pdev, 0xffffff00ULL);
3206 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3207 dev = alloc_ieee80211(sizeof(struct r8180_priv));
3208 if (!dev) {
3209 ret = -ENOMEM;
3210 goto fail_free;
3211 }
3212 priv = ieee80211_priv(dev);
3213 priv->ieee80211 = netdev_priv(dev);
3214
3215 pci_set_drvdata(pdev, dev);
3216 SET_NETDEV_DEV(dev, &pdev->dev);
3217
3218 priv = ieee80211_priv(dev);
3219 priv->pdev = pdev;
3220
3221 pmem_start = pci_resource_start(pdev, 1);
3222 pmem_len = pci_resource_len(pdev, 1);
3223 pmem_flags = pci_resource_flags(pdev, 1);
3224
3225 if (!(pmem_flags & IORESOURCE_MEM)) {
3226 DMESG("region #1 not a MMIO resource, aborting");
3227 goto fail;
3228 }
3229
3230 if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3231 DMESG("request_mem_region failed!");
3232 goto fail;
3233 }
3234
3235 ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3236 if (ioaddr == (unsigned long)NULL) {
3237 DMESG("ioremap failed!");
3238 goto fail1;
3239 }
3240
3241 dev->mem_start = ioaddr; /* shared mem start */
3242 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3243
3244 pci_read_config_byte(pdev, 0x05, &unit);
3245 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3246
3247 dev->irq = pdev->irq;
3248 priv->irq = 0;
3249
3250 dev->netdev_ops = &rtl8180_netdev_ops;
3251 dev->wireless_handlers = &r8180_wx_handlers_def;
3252
3253 dev->type = ARPHRD_ETHER;
3254 dev->watchdog_timeo = HZ*3;
3255
3256 if (dev_alloc_name(dev, ifname) < 0) {
3257 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3258 strcpy(ifname, "wlan%d");
3259 dev_alloc_name(dev, ifname);
3260 }
3261
3262 if (rtl8180_init(dev) != 0) {
3263 DMESG("Initialization failed");
3264 goto fail1;
3265 }
3266
3267 netif_carrier_off(dev);
3268
3269 if (register_netdev(dev))
3270 goto fail1;
3271
3272 rtl8180_proc_init_one(dev);
3273
3274 DMESG("Driver probe completed\n");
3275 return 0;
3276fail1:
3277 if (dev->mem_start != (unsigned long)NULL) {
3278 iounmap((void __iomem *)dev->mem_start);
3279 release_mem_region(pci_resource_start(pdev, 1),
3280 pci_resource_len(pdev, 1));
3281 }
3282fail:
3283 if (dev) {
3284 if (priv->irq) {
3285 free_irq(dev->irq, dev);
3286 dev->irq = 0;
3287 }
3288 free_ieee80211(dev);
3289 }
3290
3291fail_free:
3292 pci_disable_device(pdev);
3293
3294 DMESG("wlan driver load failed\n");
3295 return ret;
3296}
3297
3298static void rtl8180_pci_remove(struct pci_dev *pdev)
3299{
3300 struct r8180_priv *priv;
3301 struct net_device *dev = pci_get_drvdata(pdev);
3302
3303 if (dev) {
3304 unregister_netdev(dev);
3305
3306 priv = ieee80211_priv(dev);
3307
3308 rtl8180_proc_remove_one(dev);
3309 rtl8180_down(dev);
3310 priv->rf_close(dev);
3311 rtl8180_reset(dev);
3312 mdelay(10);
3313
3314 if (priv->irq) {
3315 DMESG("Freeing irq %d", dev->irq);
3316 free_irq(dev->irq, dev);
3317 priv->irq = 0;
3318 }
3319
3320 free_rx_desc_ring(dev);
3321 free_tx_desc_rings(dev);
3322
3323 if (dev->mem_start != (unsigned long)NULL) {
3324 iounmap((void __iomem *)dev->mem_start);
3325 release_mem_region(pci_resource_start(pdev, 1),
3326 pci_resource_len(pdev, 1));
3327 }
3328
3329 free_ieee80211(dev);
3330 }
3331 pci_disable_device(pdev);
3332
3333 DMESG("wlan driver removed\n");
3334}
3335
3336static int __init rtl8180_pci_module_init(void)
3337{
3338 int ret;
3339
3340 ret = ieee80211_crypto_init();
3341 if (ret) {
3342 pr_err("ieee80211_crypto_init() failed %d\n", ret);
3343 return ret;
3344 }
3345 ret = ieee80211_crypto_tkip_init();
3346 if (ret) {
3347 pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3348 return ret;
3349 }
3350 ret = ieee80211_crypto_ccmp_init();
3351 if (ret) {
3352 pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3353 return ret;
3354 }
3355 ret = ieee80211_crypto_wep_init();
3356 if (ret) {
3357 pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3358 return ret;
3359 }
3360
3361 pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3362 pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3363 DMESG("Initializing module");
3364 DMESG("Wireless extensions version %d", WIRELESS_EXT);
3365 rtl8180_proc_module_init();
3366
3367 if (pci_register_driver(&rtl8180_pci_driver)) {
3368 DMESG("No device found");
3369 return -ENODEV;
3370 }
3371 return 0;
3372}
3373
3374static void __exit rtl8180_pci_module_exit(void)
3375{
3376 pci_unregister_driver(&rtl8180_pci_driver);
3377 rtl8180_proc_module_remove();
3378 ieee80211_crypto_tkip_exit();
3379 ieee80211_crypto_ccmp_exit();
3380 ieee80211_crypto_wep_exit();
3381 ieee80211_crypto_deinit();
3382 DMESG("Exiting");
3383}
3384
3385static void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3386{
3387 unsigned long flags;
3388 short enough_desc;
3389 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3390
3391 spin_lock_irqsave(&priv->tx_lock, flags);
3392 enough_desc = check_nic_enought_desc(dev, pri);
3393 spin_unlock_irqrestore(&priv->tx_lock, flags);
3394
3395 if (enough_desc)
3396 ieee80211_rtl_wake_queue(priv->ieee80211);
3397}
3398
3399static void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3400{
3401 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3402 u32 *tail; /* tail virtual addr */
3403 u32 *head; /* head virtual addr */
3404 u32 *begin; /* start of ring virtual addr */
3405 u32 *nicv; /* nic pointer virtual addr */
3406 u32 nic; /* nic pointer physical addr */
3407 u32 nicbegin; /* start of ring physical addr */
3408 unsigned long flag;
3409 /* physical addr are ok on 32 bits since we set DMA mask */
3410 int offs;
3411 int j, i;
3412 int hd;
3413 if (error)
3414 priv->stats.txretry++;
3415 spin_lock_irqsave(&priv->tx_lock, flag);
3416 switch (pri) {
3417 case MANAGE_PRIORITY:
3418 tail = priv->txmapringtail;
3419 begin = priv->txmapring;
3420 head = priv->txmapringhead;
3421 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3422 nicbegin = priv->txmapringdma;
3423 break;
3424 case BK_PRIORITY:
3425 tail = priv->txbkpringtail;
3426 begin = priv->txbkpring;
3427 head = priv->txbkpringhead;
3428 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3429 nicbegin = priv->txbkpringdma;
3430 break;
3431 case BE_PRIORITY:
3432 tail = priv->txbepringtail;
3433 begin = priv->txbepring;
3434 head = priv->txbepringhead;
3435 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3436 nicbegin = priv->txbepringdma;
3437 break;
3438 case VI_PRIORITY:
3439 tail = priv->txvipringtail;
3440 begin = priv->txvipring;
3441 head = priv->txvipringhead;
3442 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3443 nicbegin = priv->txvipringdma;
3444 break;
3445 case VO_PRIORITY:
3446 tail = priv->txvopringtail;
3447 begin = priv->txvopring;
3448 head = priv->txvopringhead;
3449 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3450 nicbegin = priv->txvopringdma;
3451 break;
3452 case HI_PRIORITY:
3453 tail = priv->txhpringtail;
3454 begin = priv->txhpring;
3455 head = priv->txhpringhead;
3456 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3457 nicbegin = priv->txhpringdma;
3458 break;
3459
3460 default:
3461 spin_unlock_irqrestore(&priv->tx_lock, flag);
3462 return;
3463 }
3464
3465 nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3466 if ((head <= tail && (nicv > tail || nicv < head)) ||
3467 (head > tail && (nicv > tail && nicv < head))) {
3468 DMESGW("nic has lost pointer");
3469 spin_unlock_irqrestore(&priv->tx_lock, flag);
3470 rtl8180_restart(dev);
3471 return;
3472 }
3473
3474 /*
3475 * We check all the descriptors between the head and the nic,
3476 * but not the currently pointed by the nic (the next to be txed)
3477 * and the previous of the pointed (might be in process ??)
3478 */
3479 offs = (nic - nicbegin);
3480 offs = offs / 8 / 4;
3481 hd = (head - begin) / 8;
3482
3483 if (offs >= hd)
3484 j = offs - hd;
3485 else
3486 j = offs + (priv->txringcount-1-hd);
3487
3488 j -= 2;
3489 if (j < 0)
3490 j = 0;
3491
3492 for (i = 0; i < j; i++) {
3493 if ((*head) & (1<<31))
3494 break;
3495 if (((*head)&(0x10000000)) != 0) {
3496 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3497 if (!error)
3498 priv->NumTxOkTotal++;
3499 }
3500
3501 if (!error)
3502 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3503
3504 *head = *head & ~(1<<31);
3505
3506 if ((head - begin)/8 == priv->txringcount-1)
3507 head = begin;
3508 else
3509 head += 8;
3510 }
3511
3512 /*
3513 * The head has been moved to the last certainly TXed
3514 * (or at least processed by the nic) packet.
3515 * The driver take forcefully owning of all these packets
3516 * If the packet previous of the nic pointer has been
3517 * processed this doesn't matter: it will be checked
3518 * here at the next round. Anyway if no more packet are
3519 * TXed no memory leak occur at all.
3520 */
3521
3522 switch (pri) {
3523 case MANAGE_PRIORITY:
3524 priv->txmapringhead = head;
3525
3526 if (priv->ack_tx_to_ieee) {
3527 if (rtl8180_is_tx_queue_empty(dev)) {
3528 priv->ack_tx_to_ieee = 0;
3529 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3530 }
3531 }
3532 break;
3533 case BK_PRIORITY:
3534 priv->txbkpringhead = head;
3535 break;
3536 case BE_PRIORITY:
3537 priv->txbepringhead = head;
3538 break;
3539 case VI_PRIORITY:
3540 priv->txvipringhead = head;
3541 break;
3542 case VO_PRIORITY:
3543 priv->txvopringhead = head;
3544 break;
3545 case HI_PRIORITY:
3546 priv->txhpringhead = head;
3547 break;
3548 }
3549
3550 spin_unlock_irqrestore(&priv->tx_lock, flag);
3551}
3552
3553static irqreturn_t rtl8180_interrupt(int irq, void *netdev)
3554{
3555 struct net_device *dev = (struct net_device *) netdev;
3556 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3557 unsigned long flags;
3558 u32 inta;
3559
3560 /* We should return IRQ_NONE, but for now let me keep this */
3561 if (priv->irq_enabled == 0)
3562 return IRQ_HANDLED;
3563
3564 spin_lock_irqsave(&priv->irq_th_lock, flags);
3565
3566 /* ISR: 4bytes */
3567 inta = read_nic_dword(dev, ISR);
3568 write_nic_dword(dev, ISR, inta); /* reset int situation */
3569
3570 priv->stats.shints++;
3571
3572 if (!inta) {
3573 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3574 return IRQ_HANDLED;
3575 /*
3576 * most probably we can safely return IRQ_NONE,
3577 * but for now is better to avoid problems
3578 */
3579 }
3580
3581 if (inta == 0xffff) {
3582 /* HW disappeared */
3583 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3584 return IRQ_HANDLED;
3585 }
3586
3587 priv->stats.ints++;
3588
3589 if (!netif_running(dev)) {
3590 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3591 return IRQ_HANDLED;
3592 }
3593
3594 if (inta & ISR_TimeOut)
3595 write_nic_dword(dev, TimerInt, 0);
3596
3597 if (inta & ISR_TBDOK)
3598 priv->stats.txbeacon++;
3599
3600 if (inta & ISR_TBDER)
3601 priv->stats.txbeaconerr++;
3602
3603 if (inta & IMR_TMGDOK)
3604 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3605
3606 if (inta & ISR_THPDER) {
3607 priv->stats.txhperr++;
3608 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3609 priv->ieee80211->stats.tx_errors++;
3610 }
3611
3612 if (inta & ISR_THPDOK) { /* High priority tx ok */
3613 priv->link_detect.num_tx_ok_in_period++;
3614 priv->stats.txhpokint++;
3615 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3616 }
3617
3618 if (inta & ISR_RER)
3619 priv->stats.rxerr++;
3620
3621 if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3622 priv->stats.txbkperr++;
3623 priv->ieee80211->stats.tx_errors++;
3624 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3625 rtl8180_try_wake_queue(dev, BK_PRIORITY);
3626 }
3627
3628 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3629 priv->stats.txbeperr++;
3630 priv->ieee80211->stats.tx_errors++;
3631 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3632 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3633 }
3634 if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3635 priv->stats.txnperr++;
3636 priv->ieee80211->stats.tx_errors++;
3637 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3638 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3639 }
3640
3641 if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3642 priv->stats.txlperr++;
3643 priv->ieee80211->stats.tx_errors++;
3644 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3645 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3646 }
3647
3648 if (inta & ISR_ROK) {
3649 priv->stats.rxint++;
3650 tasklet_schedule(&priv->irq_rx_tasklet);
3651 }
3652
3653 if (inta & ISR_RQoSOK) {
3654 priv->stats.rxint++;
3655 tasklet_schedule(&priv->irq_rx_tasklet);
3656 }
3657
3658 if (inta & ISR_BcnInt)
3659 rtl8180_prepare_beacon(dev);
3660
3661 if (inta & ISR_RDU) {
3662 DMESGW("No RX descriptor available");
3663 priv->stats.rxrdu++;
3664 tasklet_schedule(&priv->irq_rx_tasklet);
3665 }
3666
3667 if (inta & ISR_RXFOVW) {
3668 priv->stats.rxoverflow++;
3669 tasklet_schedule(&priv->irq_rx_tasklet);
3670 }
3671
3672 if (inta & ISR_TXFOVW)
3673 priv->stats.txoverflow++;
3674
3675 if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3676 priv->link_detect.num_tx_ok_in_period++;
3677 priv->stats.txnpokint++;
3678 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3679 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3680 }
3681
3682 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3683 priv->link_detect.num_tx_ok_in_period++;
3684 priv->stats.txlpokint++;
3685 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3686 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3687 }
3688
3689 if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3690 priv->stats.txbkpokint++;
3691 priv->link_detect.num_tx_ok_in_period++;
3692 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3693 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3694 }
3695
3696 if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3697 priv->stats.txbeperr++;
3698 priv->link_detect.num_tx_ok_in_period++;
3699 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3700 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3701 }
3702 force_pci_posting(dev);
3703 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3704
3705 return IRQ_HANDLED;
3706}
3707
3708void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3709{
3710 rtl8180_rx(priv->dev);
3711}
3712
3713void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3714{
3715 struct ieee80211_device *ieee = container_of(
3716 work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3717 struct net_device *dev = ieee->dev;
3718 struct r8180_priv *priv = ieee80211_priv(dev);
3719 u8 btPSR;
3720 u8 btConfig0;
3721 enum rt_rf_power_state eRfPowerStateToSet;
3722 bool bActuallySet = false;
3723
3724 char *argv[3];
3725 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3726 static char *envp[] = {"HOME=/", "TERM=linux",
3727 "PATH=/usr/bin:/bin", NULL};
3728 static int readf_count;
3729
3730 readf_count = (readf_count+1)%0xffff;
3731 /* We should turn off LED before polling FF51[4]. */
3732
3733 /* Turn off LED. */
3734 btPSR = read_nic_byte(dev, PSR);
3735 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3736
3737 /* It need to delay 4us suggested */
3738 udelay(4);
3739
3740 /* HW radio On/Off according to the value of FF51[4](config0) */
3741 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3742
3743 eRfPowerStateToSet = (btConfig0 & BIT4) ? RF_ON : RF_OFF;
3744
3745 /* Turn LED back on when radio enabled */
3746 if (eRfPowerStateToSet == RF_ON)
3747 write_nic_byte(dev, PSR, btPSR | BIT3);
3748
3749 if ((priv->ieee80211->bHwRadioOff == true) &&
3750 (eRfPowerStateToSet == RF_ON)) {
3751 priv->ieee80211->bHwRadioOff = false;
3752 bActuallySet = true;
3753 } else if ((priv->ieee80211->bHwRadioOff == false) &&
3754 (eRfPowerStateToSet == RF_OFF)) {
3755 priv->ieee80211->bHwRadioOff = true;
3756 bActuallySet = true;
3757 }
3758
3759 if (bActuallySet) {
3760 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3761
3762 /* To update the UI status for Power status changed */
3763 if (priv->ieee80211->bHwRadioOff == true)
3764 argv[1] = "RFOFF";
3765 else
3766 argv[1] = "RFON";
3767 argv[0] = RadioPowerPath;
3768 argv[2] = NULL;
3769
3770 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3771 }
3772}
3773
3774module_init(rtl8180_pci_module_init);
3775module_exit(rtl8180_pci_module_exit);
diff --git a/drivers/staging/rtl8187se/r8180_dm.c b/drivers/staging/rtl8187se/r8180_dm.c
deleted file mode 100644
index 8c020e064869..000000000000
--- a/drivers/staging/rtl8187se/r8180_dm.c
+++ /dev/null
@@ -1,1139 +0,0 @@
1#include "r8180_dm.h"
2#include "r8180_hw.h"
3#include "r8180_93cx6.h"
4
5 /* Return TRUE if we shall perform High Power Mechanism, FALSE otherwise. */
6#define RATE_ADAPTIVE_TIMER_PERIOD 300
7
8bool CheckHighPower(struct net_device *dev)
9{
10 struct r8180_priv *priv = ieee80211_priv(dev);
11 struct ieee80211_device *ieee = priv->ieee80211;
12
13 if (!priv->bRegHighPowerMechanism)
14 return false;
15
16 if (ieee->state == IEEE80211_LINKED_SCANNING)
17 return false;
18
19 return true;
20}
21
22/*
23 * Description:
24 * Update Tx power level if necessary.
25 * See also DoRxHighPower() and SetTxPowerLevel8185() for reference.
26 *
27 * Note:
28 * The reason why we udpate Tx power level here instead of DoRxHighPower()
29 * is the number of IO to change Tx power is much more than channel TR switch
30 * and they are related to OFDM and MAC registers.
31 * So, we don't want to update it so frequently in per-Rx packet base.
32 */
33static void DoTxHighPower(struct net_device *dev)
34{
35 struct r8180_priv *priv = ieee80211_priv(dev);
36 u16 HiPwrUpperTh = 0;
37 u16 HiPwrLowerTh = 0;
38 u8 RSSIHiPwrUpperTh;
39 u8 RSSIHiPwrLowerTh;
40 u8 u1bTmp;
41 char OfdmTxPwrIdx, CckTxPwrIdx;
42
43 HiPwrUpperTh = priv->RegHiPwrUpperTh;
44 HiPwrLowerTh = priv->RegHiPwrLowerTh;
45
46 HiPwrUpperTh = HiPwrUpperTh * 10;
47 HiPwrLowerTh = HiPwrLowerTh * 10;
48 RSSIHiPwrUpperTh = priv->RegRSSIHiPwrUpperTh;
49 RSSIHiPwrLowerTh = priv->RegRSSIHiPwrLowerTh;
50
51 /* lzm add 080826 */
52 OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
53 CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
54
55 if ((priv->UndecoratedSmoothedSS > HiPwrUpperTh) ||
56 (priv->bCurCCKPkt && (priv->CurCCKRSSI > RSSIHiPwrUpperTh))) {
57 /* Stevenl suggested that degrade 8dbm in high power sate. 2007-12-04 Isaiah */
58
59 priv->bToUpdateTxPwr = true;
60 u1bTmp = read_nic_byte(dev, CCK_TXAGC);
61
62 /* If it never enter High Power. */
63 if (CckTxPwrIdx == u1bTmp) {
64 u1bTmp = (u1bTmp > 16) ? (u1bTmp - 16) : 0; /* 8dbm */
65 write_nic_byte(dev, CCK_TXAGC, u1bTmp);
66
67 u1bTmp = read_nic_byte(dev, OFDM_TXAGC);
68 u1bTmp = (u1bTmp > 16) ? (u1bTmp - 16) : 0; /* 8dbm */
69 write_nic_byte(dev, OFDM_TXAGC, u1bTmp);
70 }
71
72 } else if ((priv->UndecoratedSmoothedSS < HiPwrLowerTh) &&
73 (!priv->bCurCCKPkt || priv->CurCCKRSSI < RSSIHiPwrLowerTh)) {
74 if (priv->bToUpdateTxPwr) {
75 priv->bToUpdateTxPwr = false;
76 /* SD3 required. */
77 u1bTmp = read_nic_byte(dev, CCK_TXAGC);
78 if (u1bTmp < CckTxPwrIdx) {
79 write_nic_byte(dev, CCK_TXAGC, CckTxPwrIdx);
80 }
81
82 u1bTmp = read_nic_byte(dev, OFDM_TXAGC);
83 if (u1bTmp < OfdmTxPwrIdx) {
84 write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
85 }
86 }
87 }
88}
89
90
91/*
92 * Description:
93 * Callback function of UpdateTxPowerWorkItem.
94 * Because of some event happened, e.g. CCX TPC, High Power Mechanism,
95 * We update Tx power of current channel again.
96 */
97void rtl8180_tx_pw_wq(struct work_struct *work)
98{
99 struct delayed_work *dwork = to_delayed_work(work);
100 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, tx_pw_wq);
101 struct net_device *dev = ieee->dev;
102
103 DoTxHighPower(dev);
104}
105
106
107/*
108 * Return TRUE if we shall perform DIG Mechanism, FALSE otherwise.
109 */
110bool CheckDig(struct net_device *dev)
111{
112 struct r8180_priv *priv = ieee80211_priv(dev);
113 struct ieee80211_device *ieee = priv->ieee80211;
114
115 if (!priv->bDigMechanism)
116 return false;
117
118 if (ieee->state != IEEE80211_LINKED)
119 return false;
120
121 if ((priv->ieee80211->rate / 5) < 36) /* Schedule Dig under all OFDM rates. By Bruce, 2007-06-01. */
122 return false;
123 return true;
124}
125/*
126 * Implementation of DIG for Zebra and Zebra2.
127 */
128static void DIG_Zebra(struct net_device *dev)
129{
130 struct r8180_priv *priv = ieee80211_priv(dev);
131 u16 CCKFalseAlarm, OFDMFalseAlarm;
132 u16 OfdmFA1, OfdmFA2;
133 int InitialGainStep = 7; /* The number of initial gain stages. */
134 int LowestGainStage = 4; /* The capable lowest stage of performing dig workitem. */
135 u32 AwakePeriodIn2Sec = 0;
136
137 CCKFalseAlarm = (u16)(priv->FalseAlarmRegValue & 0x0000ffff);
138 OFDMFalseAlarm = (u16)((priv->FalseAlarmRegValue >> 16) & 0x0000ffff);
139 OfdmFA1 = 0x15;
140 OfdmFA2 = ((u16)(priv->RegDigOfdmFaUpTh)) << 8;
141
142 /* The number of initial gain steps is different, by Bruce, 2007-04-13. */
143 if (priv->InitialGain == 0) { /* autoDIG */
144 /* Advised from SD3 DZ */
145 priv->InitialGain = 4; /* In 87B, m74dBm means State 4 (m82dBm) */
146 }
147 /* Advised from SD3 DZ */
148 OfdmFA1 = 0x20;
149
150#if 1 /* lzm reserved 080826 */
151 AwakePeriodIn2Sec = (2000 - priv->DozePeriodInPast2Sec);
152 priv->DozePeriodInPast2Sec = 0;
153
154 if (AwakePeriodIn2Sec) {
155 OfdmFA1 = (u16)((OfdmFA1 * AwakePeriodIn2Sec) / 2000);
156 OfdmFA2 = (u16)((OfdmFA2 * AwakePeriodIn2Sec) / 2000);
157 } else {
158 ;
159 }
160#endif
161
162 InitialGainStep = 8;
163 LowestGainStage = priv->RegBModeGainStage; /* Lowest gain stage. */
164
165 if (OFDMFalseAlarm > OfdmFA1) {
166 if (OFDMFalseAlarm > OfdmFA2) {
167 priv->DIG_NumberFallbackVote++;
168 if (priv->DIG_NumberFallbackVote > 1) {
169 /* serious OFDM False Alarm, need fallback */
170 if (priv->InitialGain < InitialGainStep) {
171 priv->InitialGainBackUp = priv->InitialGain;
172
173 priv->InitialGain = (priv->InitialGain + 1);
174 UpdateInitialGain(dev);
175 }
176 priv->DIG_NumberFallbackVote = 0;
177 priv->DIG_NumberUpgradeVote = 0;
178 }
179 } else {
180 if (priv->DIG_NumberFallbackVote)
181 priv->DIG_NumberFallbackVote--;
182 }
183 priv->DIG_NumberUpgradeVote = 0;
184 } else {
185 if (priv->DIG_NumberFallbackVote)
186 priv->DIG_NumberFallbackVote--;
187 priv->DIG_NumberUpgradeVote++;
188
189 if (priv->DIG_NumberUpgradeVote > 9) {
190 if (priv->InitialGain > LowestGainStage) { /* In 87B, m78dBm means State 4 (m864dBm) */
191 priv->InitialGainBackUp = priv->InitialGain;
192
193 priv->InitialGain = (priv->InitialGain - 1);
194 UpdateInitialGain(dev);
195 }
196 priv->DIG_NumberFallbackVote = 0;
197 priv->DIG_NumberUpgradeVote = 0;
198 }
199 }
200}
201
202/*
203 * Dispatch DIG implementation according to RF.
204 */
205static void DynamicInitGain(struct net_device *dev)
206{
207 DIG_Zebra(dev);
208}
209
210void rtl8180_hw_dig_wq(struct work_struct *work)
211{
212 struct delayed_work *dwork = to_delayed_work(work);
213 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_dig_wq);
214 struct net_device *dev = ieee->dev;
215 struct r8180_priv *priv = ieee80211_priv(dev);
216
217 /* Read CCK and OFDM False Alarm. */
218 priv->FalseAlarmRegValue = read_nic_dword(dev, CCK_FALSE_ALARM);
219
220
221 /* Adjust Initial Gain dynamically. */
222 DynamicInitGain(dev);
223
224}
225
226static int IncludedInSupportedRates(struct r8180_priv *priv, u8 TxRate)
227{
228 u8 rate_len;
229 u8 rate_ex_len;
230 u8 RateMask = 0x7F;
231 u8 idx;
232 unsigned short Found = 0;
233 u8 NaiveTxRate = TxRate&RateMask;
234
235 rate_len = priv->ieee80211->current_network.rates_len;
236 rate_ex_len = priv->ieee80211->current_network.rates_ex_len;
237 for (idx = 0; idx < rate_len; idx++) {
238 if ((priv->ieee80211->current_network.rates[idx] & RateMask) == NaiveTxRate) {
239 Found = 1;
240 goto found_rate;
241 }
242 }
243 for (idx = 0; idx < rate_ex_len; idx++) {
244 if ((priv->ieee80211->current_network.rates_ex[idx] & RateMask) == NaiveTxRate) {
245 Found = 1;
246 goto found_rate;
247 }
248 }
249 return Found;
250found_rate:
251 return Found;
252}
253
254/*
255 * Get the Tx rate one degree up form the input rate in the supported rates.
256 * Return the upgrade rate if it is successed, otherwise return the input rate.
257 */
258static u8 GetUpgradeTxRate(struct net_device *dev, u8 rate)
259{
260 struct r8180_priv *priv = ieee80211_priv(dev);
261 u8 UpRate;
262
263 /* Upgrade 1 degree. */
264 switch (rate) {
265 case 108: /* Up to 54Mbps. */
266 UpRate = 108;
267 break;
268
269 case 96: /* Up to 54Mbps. */
270 UpRate = 108;
271 break;
272
273 case 72: /* Up to 48Mbps. */
274 UpRate = 96;
275 break;
276
277 case 48: /* Up to 36Mbps. */
278 UpRate = 72;
279 break;
280
281 case 36: /* Up to 24Mbps. */
282 UpRate = 48;
283 break;
284
285 case 22: /* Up to 18Mbps. */
286 UpRate = 36;
287 break;
288
289 case 11: /* Up to 11Mbps. */
290 UpRate = 22;
291 break;
292
293 case 4: /* Up to 5.5Mbps. */
294 UpRate = 11;
295 break;
296
297 case 2: /* Up to 2Mbps. */
298 UpRate = 4;
299 break;
300
301 default:
302 printk("GetUpgradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
303 return rate;
304 }
305 /* Check if the rate is valid. */
306 if (IncludedInSupportedRates(priv, UpRate)) {
307 return UpRate;
308 } else {
309 return rate;
310 }
311 return rate;
312}
313/*
314 * Get the Tx rate one degree down form the input rate in the supported rates.
315 * Return the degrade rate if it is successed, otherwise return the input rate.
316 */
317
318static u8 GetDegradeTxRate(struct net_device *dev, u8 rate)
319{
320 struct r8180_priv *priv = ieee80211_priv(dev);
321 u8 DownRate;
322
323 /* Upgrade 1 degree. */
324 switch (rate) {
325 case 108: /* Down to 48Mbps. */
326 DownRate = 96;
327 break;
328
329 case 96: /* Down to 36Mbps. */
330 DownRate = 72;
331 break;
332
333 case 72: /* Down to 24Mbps. */
334 DownRate = 48;
335 break;
336
337 case 48: /* Down to 18Mbps. */
338 DownRate = 36;
339 break;
340
341 case 36: /* Down to 11Mbps. */
342 DownRate = 22;
343 break;
344
345 case 22: /* Down to 5.5Mbps. */
346 DownRate = 11;
347 break;
348
349 case 11: /* Down to 2Mbps. */
350 DownRate = 4;
351 break;
352
353 case 4: /* Down to 1Mbps. */
354 DownRate = 2;
355 break;
356
357 case 2: /* Down to 1Mbps. */
358 DownRate = 2;
359 break;
360
361 default:
362 printk("GetDegradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
363 return rate;
364 }
365 /* Check if the rate is valid. */
366 if (IncludedInSupportedRates(priv, DownRate)) {
367 return DownRate;
368 } else {
369 return rate;
370 }
371 return rate;
372}
373/*
374 * Helper function to determine if specified data rate is
375 * CCK rate.
376 */
377
378static bool MgntIsCckRate(u16 rate)
379{
380 bool bReturn = false;
381
382 if ((rate <= 22) && (rate != 12) && (rate != 18)) {
383 bReturn = true;
384 }
385
386 return bReturn;
387}
388/*
389 * Description:
390 * Tx Power tracking mechanism routine on 87SE.
391 */
392void TxPwrTracking87SE(struct net_device *dev)
393{
394 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
395 u8 tmpu1Byte, CurrentThermal, Idx;
396 char CckTxPwrIdx, OfdmTxPwrIdx;
397
398 tmpu1Byte = read_nic_byte(dev, EN_LPF_CAL);
399 CurrentThermal = (tmpu1Byte & 0xf0) >> 4; /*[ 7:4]: thermal meter indication. */
400 CurrentThermal = (CurrentThermal > 0x0c) ? 0x0c : CurrentThermal;/* lzm add 080826 */
401
402 if (CurrentThermal != priv->ThermalMeter) {
403 /* Update Tx Power level on each channel. */
404 for (Idx = 1; Idx < 15; Idx++) {
405 CckTxPwrIdx = priv->chtxpwr[Idx];
406 OfdmTxPwrIdx = priv->chtxpwr_ofdm[Idx];
407
408 if (CurrentThermal > priv->ThermalMeter) {
409 /* higher thermal meter. */
410 CckTxPwrIdx += (CurrentThermal - priv->ThermalMeter) * 2;
411 OfdmTxPwrIdx += (CurrentThermal - priv->ThermalMeter) * 2;
412
413 if (CckTxPwrIdx > 35)
414 CckTxPwrIdx = 35; /* Force TxPower to maximal index. */
415 if (OfdmTxPwrIdx > 35)
416 OfdmTxPwrIdx = 35;
417 } else {
418 /* lower thermal meter. */
419 CckTxPwrIdx -= (priv->ThermalMeter - CurrentThermal) * 2;
420 OfdmTxPwrIdx -= (priv->ThermalMeter - CurrentThermal) * 2;
421
422 if (CckTxPwrIdx < 0)
423 CckTxPwrIdx = 0;
424 if (OfdmTxPwrIdx < 0)
425 OfdmTxPwrIdx = 0;
426 }
427
428 /* Update TxPower level on CCK and OFDM resp. */
429 priv->chtxpwr[Idx] = CckTxPwrIdx;
430 priv->chtxpwr_ofdm[Idx] = OfdmTxPwrIdx;
431 }
432
433 /* Update TxPower level immediately. */
434 rtl8225z2_SetTXPowerLevel(dev, priv->ieee80211->current_network.channel);
435 }
436 priv->ThermalMeter = CurrentThermal;
437}
438static void StaRateAdaptive87SE(struct net_device *dev)
439{
440 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
441 unsigned long CurrTxokCnt;
442 u16 CurrRetryCnt;
443 u16 CurrRetryRate;
444 unsigned long CurrRxokCnt;
445 bool bTryUp = false;
446 bool bTryDown = false;
447 u8 TryUpTh = 1;
448 u8 TryDownTh = 2;
449 u32 TxThroughput;
450 long CurrSignalStrength;
451 bool bUpdateInitialGain = false;
452 u8 u1bOfdm = 0, u1bCck = 0;
453 char OfdmTxPwrIdx, CckTxPwrIdx;
454
455 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
456
457
458 CurrRetryCnt = priv->CurrRetryCnt;
459 CurrTxokCnt = priv->NumTxOkTotal - priv->LastTxokCnt;
460 CurrRxokCnt = priv->ieee80211->NumRxOkTotal - priv->LastRxokCnt;
461 CurrSignalStrength = priv->Stats_RecvSignalPower;
462 TxThroughput = (u32)(priv->NumTxOkBytesTotal - priv->LastTxOKBytes);
463 priv->LastTxOKBytes = priv->NumTxOkBytesTotal;
464 priv->CurrentOperaRate = priv->ieee80211->rate / 5;
465 /* 2 Compute retry ratio. */
466 if (CurrTxokCnt > 0) {
467 CurrRetryRate = (u16)(CurrRetryCnt * 100 / CurrTxokCnt);
468 } else {
469 /* It may be serious retry. To distinguish serious retry or no packets modified by Bruce */
470 CurrRetryRate = (u16)(CurrRetryCnt * 100 / 1);
471 }
472
473 priv->LastRetryCnt = priv->CurrRetryCnt;
474 priv->LastTxokCnt = priv->NumTxOkTotal;
475 priv->LastRxokCnt = priv->ieee80211->NumRxOkTotal;
476 priv->CurrRetryCnt = 0;
477
478 /* 2No Tx packets, return to init_rate or not? */
479 if (CurrRetryRate == 0 && CurrTxokCnt == 0) {
480 /*
481 * After 9 (30*300ms) seconds in this condition, we try to raise rate.
482 */
483 priv->TryupingCountNoData++;
484
485 /* [TRC Dell Lab] Extend raised period from 4.5sec to 9sec, Isaiah 2008-02-15 18:00 */
486 if (priv->TryupingCountNoData > 30) {
487 priv->TryupingCountNoData = 0;
488 priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
489 /* Reset Fail Record */
490 priv->LastFailTxRate = 0;
491 priv->LastFailTxRateSS = -200;
492 priv->FailTxRateCount = 0;
493 }
494 goto SetInitialGain;
495 } else {
496 priv->TryupingCountNoData = 0; /*Reset trying up times. */
497 }
498
499
500 /*
501 * For Netgear case, I comment out the following signal strength estimation,
502 * which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).
503 *
504 * Restructure rate adaptive as the following main stages:
505 * (1) Add retry threshold in 54M upgrading condition with signal strength.
506 * (2) Add the mechanism to degrade to CCK rate according to signal strength
507 * and retry rate.
508 * (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated
509 * situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
510 * (4) Add the mechanism of trying to upgrade tx rate.
511 * (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
512 *
513 */
514
515 /*
516 * 11Mbps or 36Mbps
517 * Check more times in these rate(key rates).
518 */
519 if (priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
520 TryUpTh += 9;
521 /*
522 * Let these rates down more difficult.
523 */
524 if (MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
525 TryDownTh += 1;
526
527 /* 1 Adjust Rate. */
528 if (priv->bTryuping == true) {
529 /* 2 For Test Upgrading mechanism
530 * Note:
531 * Sometimes the throughput is upon on the capability between the AP and NIC,
532 * thus the low data rate does not improve the performance.
533 * We randomly upgrade the data rate and check if the retry rate is improved.
534 */
535
536 /* Upgrading rate did not improve the retry rate, fallback to the original rate. */
537 if ((CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput) {
538 /*Not necessary raising rate, fall back rate. */
539 bTryDown = true;
540 } else {
541 priv->bTryuping = false;
542 }
543 } else if (CurrSignalStrength > -47 && (CurrRetryRate < 50)) {
544 /*
545 * 2For High Power
546 *
547 * Return to highest data rate, if signal strength is good enough.
548 * SignalStrength threshold(-50dbm) is for RTL8186.
549 * Revise SignalStrength threshold to -51dbm.
550 */
551 /* Also need to check retry rate for safety, by Bruce, 2007-06-05. */
552 if (priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate) {
553 bTryUp = true;
554 /* Upgrade Tx Rate directly. */
555 priv->TryupingCount += TryUpTh;
556 }
557
558 } else if (CurrTxokCnt > 9 && CurrTxokCnt < 100 && CurrRetryRate >= 600) {
559 /*
560 *2 For Serious Retry
561 *
562 * Traffic is not busy but our Tx retry is serious.
563 */
564 bTryDown = true;
565 /* Let Rate Mechanism to degrade tx rate directly. */
566 priv->TryDownCountLowData += TryDownTh;
567 } else if (priv->CurrentOperaRate == 108) {
568 /* 2For 54Mbps */
569 /* Air Link */
570 if ((CurrRetryRate > 26) && (priv->LastRetryRate > 25)) {
571 bTryDown = true;
572 }
573 /* Cable Link */
574 else if ((CurrRetryRate > 17) && (priv->LastRetryRate > 16) && (CurrSignalStrength > -72)) {
575 bTryDown = true;
576 }
577
578 if (bTryDown && (CurrSignalStrength < -75)) /* cable link */
579 priv->TryDownCountLowData += TryDownTh;
580 } else if (priv->CurrentOperaRate == 96) {
581 /* 2For 48Mbps */
582 /* Air Link */
583 if (((CurrRetryRate > 48) && (priv->LastRetryRate > 47))) {
584 bTryDown = true;
585 } else if (((CurrRetryRate > 21) && (priv->LastRetryRate > 20)) && (CurrSignalStrength > -74)) { /* Cable Link */
586 /* Down to rate 36Mbps. */
587 bTryDown = true;
588 } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
589 bTryDown = true;
590 priv->TryDownCountLowData += TryDownTh;
591 } else if ((CurrRetryRate < 8) && (priv->LastRetryRate < 8)) { /* TO DO: need to consider (RSSI) */
592 bTryUp = true;
593 }
594
595 if (bTryDown && (CurrSignalStrength < -75)) {
596 priv->TryDownCountLowData += TryDownTh;
597 }
598 } else if (priv->CurrentOperaRate == 72) {
599 /* 2For 36Mbps */
600 if ((CurrRetryRate > 43) && (priv->LastRetryRate > 41)) {
601 /* Down to rate 24Mbps. */
602 bTryDown = true;
603 } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
604 bTryDown = true;
605 priv->TryDownCountLowData += TryDownTh;
606 } else if ((CurrRetryRate < 15) && (priv->LastRetryRate < 16)) { /* TO DO: need to consider (RSSI) */
607 bTryUp = true;
608 }
609
610 if (bTryDown && (CurrSignalStrength < -80))
611 priv->TryDownCountLowData += TryDownTh;
612
613 } else if (priv->CurrentOperaRate == 48) {
614 /* 2For 24Mbps */
615 /* Air Link */
616 if (((CurrRetryRate > 63) && (priv->LastRetryRate > 62))) {
617 bTryDown = true;
618 } else if (((CurrRetryRate > 33) && (priv->LastRetryRate > 32)) && (CurrSignalStrength > -82)) { /* Cable Link */
619 bTryDown = true;
620 } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
621 bTryDown = true;
622 priv->TryDownCountLowData += TryDownTh;
623 } else if ((CurrRetryRate < 20) && (priv->LastRetryRate < 21)) { /* TO DO: need to consider (RSSI) */
624 bTryUp = true;
625 }
626
627 if (bTryDown && (CurrSignalStrength < -82))
628 priv->TryDownCountLowData += TryDownTh;
629
630 } else if (priv->CurrentOperaRate == 36) {
631 if (((CurrRetryRate > 85) && (priv->LastRetryRate > 86))) {
632 bTryDown = true;
633 } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
634 bTryDown = true;
635 priv->TryDownCountLowData += TryDownTh;
636 } else if ((CurrRetryRate < 22) && (priv->LastRetryRate < 23)) { /* TO DO: need to consider (RSSI) */
637 bTryUp = true;
638 }
639 } else if (priv->CurrentOperaRate == 22) {
640 /* 2For 11Mbps */
641 if (CurrRetryRate > 95) {
642 bTryDown = true;
643 } else if ((CurrRetryRate < 29) && (priv->LastRetryRate < 30)) { /*TO DO: need to consider (RSSI) */
644 bTryUp = true;
645 }
646 } else if (priv->CurrentOperaRate == 11) {
647 /* 2For 5.5Mbps */
648 if (CurrRetryRate > 149) {
649 bTryDown = true;
650 } else if ((CurrRetryRate < 60) && (priv->LastRetryRate < 65)) {
651 bTryUp = true;
652 }
653 } else if (priv->CurrentOperaRate == 4) {
654 /* 2For 2 Mbps */
655 if ((CurrRetryRate > 99) && (priv->LastRetryRate > 99)) {
656 bTryDown = true;
657 } else if ((CurrRetryRate < 65) && (priv->LastRetryRate < 70)) {
658 bTryUp = true;
659 }
660 } else if (priv->CurrentOperaRate == 2) {
661 /* 2For 1 Mbps */
662 if ((CurrRetryRate < 70) && (priv->LastRetryRate < 75)) {
663 bTryUp = true;
664 }
665 }
666
667 if (bTryUp && bTryDown)
668 printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
669
670 /* 1 Test Upgrading Tx Rate
671 * Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
672 * To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
673 */
674 if (!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
675 && priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate && priv->FailTxRateCount < 2) {
676 if (jiffies % (CurrRetryRate + 101) == 0) {
677 bTryUp = true;
678 priv->bTryuping = true;
679 }
680 }
681
682 /* 1 Rate Mechanism */
683 if (bTryUp) {
684 priv->TryupingCount++;
685 priv->TryDownCountLowData = 0;
686
687 /*
688 * Check more times if we need to upgrade indeed.
689 * Because the largest value of pHalData->TryupingCount is 0xFFFF and
690 * the largest value of pHalData->FailTxRateCount is 0x14,
691 * this condition will be satisfied at most every 2 min.
692 */
693
694 if ((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
695 (CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping) {
696 priv->TryupingCount = 0;
697 /*
698 * When transferring from CCK to OFDM, DIG is an important issue.
699 */
700 if (priv->CurrentOperaRate == 22)
701 bUpdateInitialGain = true;
702
703 /*
704 * The difference in throughput between 48Mbps and 36Mbps is 8M.
705 * So, we must be careful in this rate scale. Isaiah 2008-02-15.
706 */
707 if (((priv->CurrentOperaRate == 72) || (priv->CurrentOperaRate == 48) || (priv->CurrentOperaRate == 36)) &&
708 (priv->FailTxRateCount > 2))
709 priv->RateAdaptivePeriod = (RATE_ADAPTIVE_TIMER_PERIOD / 2);
710
711 /* (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold. */
712 /* (2)If the signal strength is increased, it may be able to upgrade. */
713
714 priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
715
716 if (priv->CurrentOperaRate == 36) {
717 priv->bUpdateARFR = true;
718 write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
719 } else if (priv->bUpdateARFR) {
720 priv->bUpdateARFR = false;
721 write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
722 }
723
724 /* Update Fail Tx rate and count. */
725 if (priv->LastFailTxRate != priv->CurrentOperaRate) {
726 priv->LastFailTxRate = priv->CurrentOperaRate;
727 priv->FailTxRateCount = 0;
728 priv->LastFailTxRateSS = -200; /* Set lowest power. */
729 }
730 }
731 } else {
732 if (priv->TryupingCount > 0)
733 priv->TryupingCount--;
734 }
735
736 if (bTryDown) {
737 priv->TryDownCountLowData++;
738 priv->TryupingCount = 0;
739
740 /* Check if Tx rate can be degraded or Test trying upgrading should fallback. */
741 if (priv->TryDownCountLowData > TryDownTh || priv->bTryuping) {
742 priv->TryDownCountLowData = 0;
743 priv->bTryuping = false;
744 /* Update fail information. */
745 if (priv->LastFailTxRate == priv->CurrentOperaRate) {
746 priv->FailTxRateCount++;
747 /* Record the Tx fail rate signal strength. */
748 if (CurrSignalStrength > priv->LastFailTxRateSS)
749 priv->LastFailTxRateSS = CurrSignalStrength;
750 } else {
751 priv->LastFailTxRate = priv->CurrentOperaRate;
752 priv->FailTxRateCount = 1;
753 priv->LastFailTxRateSS = CurrSignalStrength;
754 }
755 priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
756
757 /* Reduce chariot training time at weak signal strength situation. SD3 ED demand. */
758 if ((CurrSignalStrength < -80) && (priv->CurrentOperaRate > 72)) {
759 priv->CurrentOperaRate = 72;
760 }
761
762 if (priv->CurrentOperaRate == 36) {
763 priv->bUpdateARFR = true;
764 write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
765 } else if (priv->bUpdateARFR) {
766 priv->bUpdateARFR = false;
767 write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
768 }
769
770 /*
771 * When it is CCK rate, it may need to update initial gain to receive lower power packets.
772 */
773 if (MgntIsCckRate(priv->CurrentOperaRate)) {
774 bUpdateInitialGain = true;
775 }
776 }
777 } else {
778 if (priv->TryDownCountLowData > 0)
779 priv->TryDownCountLowData--;
780 }
781
782 /*
783 * Keep the Tx fail rate count to equal to 0x15 at most.
784 * Reduce the fail count at least to 10 sec if tx rate is tending stable.
785 */
786 if (priv->FailTxRateCount >= 0x15 ||
787 (!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6)) {
788 priv->FailTxRateCount--;
789 }
790
791
792 OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
793 CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
794
795 /* Mac0x9e increase 2 level in 36M~18M situation */
796 if ((priv->CurrentOperaRate < 96) && (priv->CurrentOperaRate > 22)) {
797 u1bCck = read_nic_byte(dev, CCK_TXAGC);
798 u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
799
800 /* case 1: Never enter High power */
801 if (u1bCck == CckTxPwrIdx) {
802 if (u1bOfdm != (OfdmTxPwrIdx + 2)) {
803 priv->bEnhanceTxPwr = true;
804 u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
805 write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
806 }
807 } else if (u1bCck < CckTxPwrIdx) {
808 /* case 2: enter high power */
809 if (!priv->bEnhanceTxPwr) {
810 priv->bEnhanceTxPwr = true;
811 u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
812 write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
813 }
814 }
815 } else if (priv->bEnhanceTxPwr) { /* 54/48/11/5.5/2/1 */
816 u1bCck = read_nic_byte(dev, CCK_TXAGC);
817 u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
818
819 /* case 1: Never enter High power */
820 if (u1bCck == CckTxPwrIdx) {
821 priv->bEnhanceTxPwr = false;
822 write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
823 }
824 /* case 2: enter high power */
825 else if (u1bCck < CckTxPwrIdx) {
826 priv->bEnhanceTxPwr = false;
827 u1bOfdm = ((u1bOfdm - 2) > 0) ? (u1bOfdm - 2) : 0;
828 write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
829 }
830 }
831
832 /*
833 * We need update initial gain when we set tx rate "from OFDM to CCK" or
834 * "from CCK to OFDM".
835 */
836SetInitialGain:
837 if (bUpdateInitialGain) {
838 if (MgntIsCckRate(priv->CurrentOperaRate)) { /* CCK */
839 if (priv->InitialGain > priv->RegBModeGainStage) {
840 priv->InitialGainBackUp = priv->InitialGain;
841
842 if (CurrSignalStrength < -85) /* Low power, OFDM [0x17] = 26. */
843 /* SD3 SYs suggest that CurrSignalStrength < -65, ofdm 0x17=26. */
844 priv->InitialGain = priv->RegBModeGainStage;
845
846 else if (priv->InitialGain > priv->RegBModeGainStage + 1)
847 priv->InitialGain -= 2;
848
849 else
850 priv->InitialGain--;
851
852 printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
853 UpdateInitialGain(dev);
854 }
855 } else { /* OFDM */
856 if (priv->InitialGain < 4) {
857 priv->InitialGainBackUp = priv->InitialGain;
858
859 priv->InitialGain++;
860 printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
861 UpdateInitialGain(dev);
862 }
863 }
864 }
865
866 /* Record the related info */
867 priv->LastRetryRate = CurrRetryRate;
868 priv->LastTxThroughput = TxThroughput;
869 priv->ieee80211->rate = priv->CurrentOperaRate * 5;
870}
871
872void rtl8180_rate_adapter(struct work_struct *work)
873{
874 struct delayed_work *dwork = to_delayed_work(work);
875 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, rate_adapter_wq);
876 struct net_device *dev = ieee->dev;
877 StaRateAdaptive87SE(dev);
878}
879void timer_rate_adaptive(unsigned long data)
880{
881 struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
882 if (!priv->up) {
883 return;
884 }
885 if ((priv->ieee80211->iw_mode != IW_MODE_MASTER)
886 && (priv->ieee80211->state == IEEE80211_LINKED) &&
887 (priv->ForcedDataRate == 0)) {
888 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->rate_adapter_wq);
889 }
890 priv->rateadapter_timer.expires = jiffies + MSECS(priv->RateAdaptivePeriod);
891 add_timer(&priv->rateadapter_timer);
892}
893
894void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength)
895{
896 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
897
898 priv->AdRxOkCnt++;
899
900 if (priv->AdRxSignalStrength != -1) {
901 priv->AdRxSignalStrength = ((priv->AdRxSignalStrength * 7) + (SignalStrength * 3)) / 10;
902 } else { /* Initialization case. */
903 priv->AdRxSignalStrength = SignalStrength;
904 }
905
906 if (priv->LastRxPktAntenna) /* Main antenna. */
907 priv->AdMainAntennaRxOkCnt++;
908 else /* Aux antenna. */
909 priv->AdAuxAntennaRxOkCnt++;
910}
911 /* Change Antenna Switch. */
912bool SetAntenna8185(struct net_device *dev, u8 u1bAntennaIndex)
913{
914 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
915 bool bAntennaSwitched = false;
916
917 switch (u1bAntennaIndex) {
918 case 0:
919 /* Mac register, main antenna */
920 write_nic_byte(dev, ANTSEL, 0x03);
921 /* base band */
922 write_phy_cck(dev, 0x11, 0x9b); /* Config CCK RX antenna. */
923 write_phy_ofdm(dev, 0x0d, 0x5c); /* Config OFDM RX antenna. */
924
925 bAntennaSwitched = true;
926 break;
927
928 case 1:
929 /* Mac register, aux antenna */
930 write_nic_byte(dev, ANTSEL, 0x00);
931 /* base band */
932 write_phy_cck(dev, 0x11, 0xbb); /* Config CCK RX antenna. */
933 write_phy_ofdm(dev, 0x0d, 0x54); /* Config OFDM RX antenna. */
934
935 bAntennaSwitched = true;
936
937 break;
938
939 default:
940 printk("SetAntenna8185: unknown u1bAntennaIndex(%d)\n", u1bAntennaIndex);
941 break;
942 }
943
944 if (bAntennaSwitched)
945 priv->CurrAntennaIndex = u1bAntennaIndex;
946
947 return bAntennaSwitched;
948}
949 /* Toggle Antenna switch. */
950bool SwitchAntenna(struct net_device *dev)
951{
952 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
953
954 bool bResult;
955
956 if (priv->CurrAntennaIndex == 0) {
957 bResult = SetAntenna8185(dev, 1);
958 } else {
959 bResult = SetAntenna8185(dev, 0);
960 }
961
962 return bResult;
963}
964/*
965 * Engine of SW Antenna Diversity mechanism.
966 * Since 8187 has no Tx part information,
967 * this implementation is only dependend on Rx part information.
968 */
969void SwAntennaDiversity(struct net_device *dev)
970{
971 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
972 bool bSwCheckSS = false;
973 if (bSwCheckSS) {
974 priv->AdTickCount++;
975
976 printk("(1) AdTickCount: %d, AdCheckPeriod: %d\n",
977 priv->AdTickCount, priv->AdCheckPeriod);
978 printk("(2) AdRxSignalStrength: %ld, AdRxSsThreshold: %ld\n",
979 priv->AdRxSignalStrength, priv->AdRxSsThreshold);
980 }
981
982 /* Case 1. No Link. */
983 if (priv->ieee80211->state != IEEE80211_LINKED) {
984 priv->bAdSwitchedChecking = false;
985 /* I switch antenna here to prevent any one of antenna is broken before link established, 2006.04.18, by rcnjko.. */
986 SwitchAntenna(dev);
987
988 /* Case 2. Linked but no packet receive.d */
989 } else if (priv->AdRxOkCnt == 0) {
990 priv->bAdSwitchedChecking = false;
991 SwitchAntenna(dev);
992
993 /* Case 3. Evaluate last antenna switch action and undo it if necessary. */
994 } else if (priv->bAdSwitchedChecking == true) {
995 priv->bAdSwitchedChecking = false;
996
997 /* Adjust Rx signal strength threshold. */
998 priv->AdRxSsThreshold = (priv->AdRxSignalStrength + priv->AdRxSsBeforeSwitched) / 2;
999
1000 priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
1001 priv->AdMaxRxSsThreshold : priv->AdRxSsThreshold;
1002 if (priv->AdRxSignalStrength < priv->AdRxSsBeforeSwitched) {
1003 /* Rx signal strength is not improved after we swtiched antenna. => Swich back. */
1004 /* Increase Antenna Diversity checking period due to bad decision. */
1005 priv->AdCheckPeriod *= 2;
1006 /* Increase Antenna Diversity checking period. */
1007 if (priv->AdCheckPeriod > priv->AdMaxCheckPeriod)
1008 priv->AdCheckPeriod = priv->AdMaxCheckPeriod;
1009
1010 /* Wrong decision => switch back. */
1011 SwitchAntenna(dev);
1012 } else {
1013 /* Rx Signal Strength is improved. */
1014
1015 /* Reset Antenna Diversity checking period to its min value. */
1016 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
1017 }
1018
1019 }
1020 /* Case 4. Evaluate if we shall switch antenna now. */
1021 /* Cause Table Speed is very fast in TRC Dell Lab, we check it every time. */
1022 else {
1023 priv->AdTickCount = 0;
1024
1025 /*
1026 * <Roger_Notes> We evaluate RxOk counts for each antenna first and than
1027 * evaluate signal strength.
1028 * The following operation can overcome the disability of CCA on both two antennas
1029 * When signal strength was extremely low or high.
1030 * 2008.01.30.
1031 */
1032
1033 /*
1034 * Evaluate RxOk count from each antenna if we shall switch default antenna now.
1035 */
1036 if ((priv->AdMainAntennaRxOkCnt < priv->AdAuxAntennaRxOkCnt)
1037 && (priv->CurrAntennaIndex == 0)) {
1038 /* We set Main antenna as default but RxOk count was less than Aux ones. */
1039
1040 /* Switch to Aux antenna. */
1041 SwitchAntenna(dev);
1042 priv->bHWAdSwitched = true;
1043 } else if ((priv->AdAuxAntennaRxOkCnt < priv->AdMainAntennaRxOkCnt)
1044 && (priv->CurrAntennaIndex == 1)) {
1045 /* We set Aux antenna as default but RxOk count was less than Main ones. */
1046
1047 /* Switch to Main antenna. */
1048 SwitchAntenna(dev);
1049 priv->bHWAdSwitched = true;
1050 } else {
1051 /* Default antenna is better. */
1052
1053 /* Still need to check current signal strength. */
1054 priv->bHWAdSwitched = false;
1055 }
1056 /*
1057 * <Roger_Notes> We evaluate Rx signal strength ONLY when default antenna
1058 * didn't change by HW evaluation.
1059 * 2008.02.27.
1060 *
1061 * [TRC Dell Lab] SignalStrength is inaccuracy. Isaiah 2008-03-05
1062 * For example, Throughput of aux is better than main antenna(about 10M v.s 2M),
1063 * but AdRxSignalStrength is less than main.
1064 * Our guess is that main antenna have lower throughput and get many change
1065 * to receive more CCK packets(ex.Beacon) which have stronger SignalStrength.
1066 */
1067 if ((!priv->bHWAdSwitched) && (bSwCheckSS)) {
1068 /* Evaluate Rx signal strength if we shall switch antenna now. */
1069 if (priv->AdRxSignalStrength < priv->AdRxSsThreshold) {
1070 /* Rx signal strength is weak => Switch Antenna. */
1071 priv->AdRxSsBeforeSwitched = priv->AdRxSignalStrength;
1072 priv->bAdSwitchedChecking = true;
1073
1074 SwitchAntenna(dev);
1075 } else {
1076 /* Rx signal strength is OK. */
1077 priv->bAdSwitchedChecking = false;
1078 /* Increase Rx signal strength threshold if necessary. */
1079 if ((priv->AdRxSignalStrength > (priv->AdRxSsThreshold + 10)) && /* Signal is much stronger than current threshold */
1080 priv->AdRxSsThreshold <= priv->AdMaxRxSsThreshold) { /* Current threhold is not yet reach upper limit. */
1081
1082 priv->AdRxSsThreshold = (priv->AdRxSsThreshold + priv->AdRxSignalStrength) / 2;
1083 priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
1084 priv->AdMaxRxSsThreshold : priv->AdRxSsThreshold;/* +by amy 080312 */
1085 }
1086
1087 /* Reduce Antenna Diversity checking period if possible. */
1088 if (priv->AdCheckPeriod > priv->AdMinCheckPeriod)
1089 priv->AdCheckPeriod /= 2;
1090 }
1091 }
1092 }
1093 /* Reset antenna diversity Rx related statistics. */
1094 priv->AdRxOkCnt = 0;
1095 priv->AdMainAntennaRxOkCnt = 0;
1096 priv->AdAuxAntennaRxOkCnt = 0;
1097}
1098
1099 /* Return TRUE if we shall perform Tx Power Tracking Mechanism, FALSE otherwise. */
1100bool CheckTxPwrTracking(struct net_device *dev)
1101{
1102 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1103
1104 if (!priv->bTxPowerTrack)
1105 return false;
1106
1107 /* if 87SE is in High Power , don't do Tx Power Tracking. asked by SD3 ED. 2008-08-08 Isaiah */
1108 if (priv->bToUpdateTxPwr)
1109 return false;
1110
1111 return true;
1112}
1113
1114
1115 /* Timer callback function of SW Antenna Diversity. */
1116void SwAntennaDiversityTimerCallback(struct net_device *dev)
1117{
1118 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1119 enum rt_rf_power_state rtState;
1120
1121 /* We do NOT need to switch antenna while RF is off. */
1122 rtState = priv->eRFPowerState;
1123 do {
1124 if (rtState == RF_OFF) {
1125 break;
1126 } else if (rtState == RF_SLEEP) {
1127 /* Don't access BB/RF under Disable PLL situation. */
1128 break;
1129 }
1130 SwAntennaDiversity(dev);
1131
1132 } while (false);
1133
1134 if (priv->up) {
1135 priv->SwAntennaDiversityTimer.expires = jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD);
1136 add_timer(&priv->SwAntennaDiversityTimer);
1137 }
1138}
1139
diff --git a/drivers/staging/rtl8187se/r8180_dm.h b/drivers/staging/rtl8187se/r8180_dm.h
deleted file mode 100644
index cb4046f346ef..000000000000
--- a/drivers/staging/rtl8187se/r8180_dm.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef R8180_DM_H
2#define R8180_DM_H
3
4#include "r8180.h"
5/* #include "r8180_hw.h" */
6/* #include "r8180_93cx6.h" */
7void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength);
8bool SetAntenna8185(struct net_device *dev, u8 u1bAntennaIndex);
9bool SwitchAntenna(struct net_device *dev);
10void SwAntennaDiversity(struct net_device *dev);
11void SwAntennaDiversityTimerCallback(struct net_device *dev);
12bool CheckDig(struct net_device *dev);
13bool CheckHighPower(struct net_device *dev);
14void rtl8180_hw_dig_wq(struct work_struct *work);
15void rtl8180_tx_pw_wq(struct work_struct *work);
16void rtl8180_rate_adapter(struct work_struct *work);
17void TxPwrTracking87SE(struct net_device *dev);
18bool CheckTxPwrTracking(struct net_device *dev);
19void rtl8180_rate_adapter(struct work_struct *work);
20void timer_rate_adaptive(unsigned long data);
21
22
23#endif
diff --git a/drivers/staging/rtl8187se/r8180_hw.h b/drivers/staging/rtl8187se/r8180_hw.h
deleted file mode 100644
index e59d74f8ecfc..000000000000
--- a/drivers/staging/rtl8187se/r8180_hw.h
+++ /dev/null
@@ -1,588 +0,0 @@
1/*
2 This is part of rtl8180 OpenSource driver.
3 Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
4 Released under the terms of GPL (General Public Licence)
5
6 Parts of this driver are based on the GPL part of the
7 official Realtek driver.
8 Parts of this driver are based on the rtl8180 driver skeleton
9 from Patric Schenke & Andres Salomon.
10 Parts of this driver are based on the Intel Pro Wireless
11 2100 GPL driver.
12
13 We want to tanks the Authors of those projects
14 and the Ndiswrapper project Authors.
15*/
16
17/* Mariusz Matuszek added full registers definition with Realtek's name */
18
19/* this file contains register definitions for the rtl8180 MAC controller */
20#ifndef R8180_HW
21#define R8180_HW
22
23
24#define BIT0 0x00000001
25#define BIT1 0x00000002
26#define BIT2 0x00000004
27#define BIT3 0x00000008
28#define BIT4 0x00000010
29#define BIT5 0x00000020
30#define BIT6 0x00000040
31#define BIT7 0x00000080
32#define BIT9 0x00000200
33#define BIT11 0x00000800
34#define BIT13 0x00002000
35#define BIT15 0x00008000
36#define BIT20 0x00100000
37#define BIT21 0x00200000
38#define BIT22 0x00400000
39#define BIT23 0x00800000
40#define BIT24 0x01000000
41#define BIT25 0x02000000
42#define BIT26 0x04000000
43#define BIT27 0x08000000
44#define BIT28 0x10000000
45#define BIT29 0x20000000
46#define BIT30 0x40000000
47#define BIT31 0x80000000
48
49#define MAX_SLEEP_TIME (10000)
50#define MIN_SLEEP_TIME (50)
51
52#define BB_HOST_BANG_EN (1<<2)
53#define BB_HOST_BANG_CLK (1<<1)
54
55#define MAC0 0
56#define MAC4 4
57
58#define CMD 0x37
59#define CMD_RST_SHIFT 4
60#define CMD_RX_ENABLE_SHIFT 3
61#define CMD_TX_ENABLE_SHIFT 2
62
63#define EPROM_CMD 0x50
64#define EPROM_CMD_RESERVED_MASK ((1<<5)|(1<<4))
65#define EPROM_CMD_OPERATING_MODE_SHIFT 6
66#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
67#define EPROM_CMD_CONFIG 0x3
68#define EPROM_CMD_NORMAL 0
69#define EPROM_CMD_LOAD 1
70#define EPROM_CMD_PROGRAM 2
71#define EPROM_CS_SHIFT 3
72#define EPROM_CK_SHIFT 2
73#define EPROM_W_SHIFT 1
74#define EPROM_R_SHIFT 0
75#define CONFIG2_DMA_POLLING_MODE_SHIFT 3
76
77#define INTA_TXOVERFLOW (1<<15)
78#define INTA_TIMEOUT (1<<14)
79#define INTA_HIPRIORITYDESCERR (1<<9)
80#define INTA_HIPRIORITYDESCOK (1<<8)
81#define INTA_NORMPRIORITYDESCERR (1<<7)
82#define INTA_NORMPRIORITYDESCOK (1<<6)
83#define INTA_RXOVERFLOW (1<<5)
84#define INTA_RXDESCERR (1<<4)
85#define INTA_LOWPRIORITYDESCERR (1<<3)
86#define INTA_LOWPRIORITYDESCOK (1<<2)
87#define INTA_RXOK (1)
88#define INTA_MASK 0x3c
89
90#define RXRING_ADDR 0xe4 /* page 0 */
91#define PGSELECT 0x5e
92#define PGSELECT_PG_SHIFT 0
93#define RX_CONF 0x44
94#define MAC_FILTER_MASK ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
95(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))
96#define RX_CHECK_BSSID_SHIFT 23
97#define ACCEPT_PWR_FRAME_SHIFT 22
98#define ACCEPT_MNG_FRAME_SHIFT 20
99#define ACCEPT_CTL_FRAME_SHIFT 19
100#define ACCEPT_DATA_FRAME_SHIFT 18
101#define ACCEPT_ICVERR_FRAME_SHIFT 12
102#define ACCEPT_CRCERR_FRAME_SHIFT 5
103#define ACCEPT_BCAST_FRAME_SHIFT 3
104#define ACCEPT_MCAST_FRAME_SHIFT 2
105#define ACCEPT_ALLMAC_FRAME_SHIFT 0
106#define ACCEPT_NICMAC_FRAME_SHIFT 1
107
108#define RX_FIFO_THRESHOLD_MASK ((1<<13) | (1<<14) | (1<<15))
109#define RX_FIFO_THRESHOLD_SHIFT 13
110#define RX_FIFO_THRESHOLD_NONE 7
111#define RX_AUTORESETPHY_SHIFT 28
112
113#define TX_CONF 0x40
114#define TX_CONF_HEADER_AUTOICREMENT_SHIFT 30
115#define TX_LOOPBACK_SHIFT 17
116#define TX_LOOPBACK_NONE 0
117#define TX_LOOPBACK_CONTINUE 3
118#define TX_LOOPBACK_MASK ((1<<17)|(1<<18))
119#define TX_DPRETRY_SHIFT 0
120#define R8180_MAX_RETRY 255
121#define TX_RTSRETRY_SHIFT 8
122#define TX_NOICV_SHIFT 19
123#define TX_NOCRC_SHIFT 16
124#define TX_DMA_POLLING 0xd9
125#define TX_DMA_POLLING_BEACON_SHIFT 7
126#define TX_DMA_POLLING_HIPRIORITY_SHIFT 6
127#define TX_DMA_POLLING_NORMPRIORITY_SHIFT 5
128#define TX_DMA_POLLING_LOWPRIORITY_SHIFT 4
129#define TX_MANAGEPRIORITY_RING_ADDR 0x0C
130#define TX_BKPRIORITY_RING_ADDR 0x10
131#define TX_BEPRIORITY_RING_ADDR 0x14
132#define TX_VIPRIORITY_RING_ADDR 0x20
133#define TX_VOPRIORITY_RING_ADDR 0x24
134#define TX_HIGHPRIORITY_RING_ADDR 0x28
135#define MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
136#define MAX_RX_DMA_2048 7
137#define MAX_RX_DMA_1024 6
138#define MAX_RX_DMA_SHIFT 10
139#define INT_TIMEOUT 0x48
140#define CONFIG3_CLKRUN_SHIFT 2
141#define CONFIG3_ANAPARAM_W_SHIFT 6
142#define ANAPARAM 0x54
143#define BEACON_INTERVAL 0x70
144#define BEACON_INTERVAL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
145(1<<6)|(1<<7)|(1<<8)|(1<<9))
146#define ATIM_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)| \
147(1<<8)|(1<<9))
148#define ATIM 0x72
149#define EPROM_CS_SHIFT 3
150#define EPROM_CK_SHIFT 2
151#define PHY_ADR 0x7c
152#define SECURITY 0x5f /* 1209 this is sth wrong */
153#define SECURITY_WEP_TX_ENABLE_SHIFT 1
154#define SECURITY_WEP_RX_ENABLE_SHIFT 0
155#define SECURITY_ENCRYP_104 1
156#define SECURITY_ENCRYP_SHIFT 4
157#define SECURITY_ENCRYP_MASK ((1<<4)|(1<<5))
158#define KEY0 0x90 /* 1209 this is sth wrong */
159#define CONFIG2_ANTENNA_SHIFT 6
160#define TX_BEACON_RING_ADDR 0x4c
161#define CONFIG0_WEP40_SHIFT 7
162#define CONFIG0_WEP104_SHIFT 6
163#define AGCRESET_SHIFT 5
164
165
166
167/*
168 * Operational registers offsets in PCI (I/O) space.
169 * RealTek names are used.
170 */
171
172#define TSFTR 0x0018
173
174#define TLPDA 0x0020
175
176#define BSSID 0x002E
177
178#define CR 0x0037
179
180#define RF_SW_CONFIG 0x8 /* store data which is transmitted to RF for driver */
181#define RF_SW_CFG_SI BIT1
182#define EIFS 0x2D /* Extended InterFrame Space Timer, in unit of 4 us. */
183
184#define BRSR 0x34 /* Basic rate set */
185
186#define IMR 0x006C
187#define ISR 0x003C
188
189#define TCR 0x0040
190
191#define RCR 0x0044
192
193#define TimerInt 0x0048
194
195#define CR9346 0x0050
196
197#define CONFIG0 0x0051
198#define CONFIG2 0x0053
199
200#define MSR 0x0058
201
202#define CONFIG3 0x0059
203#define CONFIG4 0x005A
204 /* SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6 */
205 /* Mac0x60 = 0x000004C6 power save parameters */
206 #define ANAPARM_ASIC_ON 0xB0054D00
207 #define ANAPARM2_ASIC_ON 0x000004C6
208
209 #define ANAPARM_ON ANAPARM_ASIC_ON
210 #define ANAPARM2_ON ANAPARM2_ASIC_ON
211
212#define TESTR 0x005B
213
214#define PSR 0x005E
215
216#define BcnItv 0x0070
217
218#define AtimWnd 0x0072
219
220#define BintrItv 0x0074
221
222#define PhyAddr 0x007C
223#define PhyDataR 0x007E
224
225/* following are for rtl8185 */
226#define RFPinsOutput 0x80
227#define RFPinsEnable 0x82
228#define RF_TIMING 0x8c
229#define RFPinsSelect 0x84
230#define ANAPARAM2 0x60
231#define RF_PARA 0x88
232#define RFPinsInput 0x86
233#define GP_ENABLE 0x90
234#define GPIO 0x91
235#define SW_CONTROL_GPIO 0x400
236#define TX_ANTENNA 0x9f
237#define TX_GAIN_OFDM 0x9e
238#define TX_GAIN_CCK 0x9d
239#define WPA_CONFIG 0xb0
240#define TX_AGC_CTL 0x9c
241#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT 0
242#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT 1
243#define TX_AGC_CTL_FEEDBACK_ANT 2
244#define RESP_RATE 0x34
245#define SIFS 0xb4
246#define DIFS 0xb5
247
248#define SLOT 0xb6
249#define CW_CONF 0xbc
250#define CW_CONF_PERPACKET_RETRY_SHIFT 1
251#define CW_CONF_PERPACKET_CW_SHIFT 0
252#define CW_VAL 0xbd
253#define MAX_RESP_RATE_SHIFT 4
254#define MIN_RESP_RATE_SHIFT 0
255#define RATE_FALLBACK 0xbe
256
257#define CONFIG5 0x00D8
258
259#define PHYPR 0xDA /* 0xDA - 0x0B PHY Parameter Register. */
260
261#define FEMR 0x1D4 /* Function Event Mask register */
262
263#define FFER 0x00FC
264#define FFER_END 0x00FF
265
266
267
268/*
269 * Bitmasks for specific register functions.
270 * Names are derived from the register name and function name.
271 *
272 * <REGISTER>_<FUNCTION>[<bit>]
273 *
274 * this leads to some awkward names...
275 */
276
277#define BRSR_BPLCP ((1 << 8))
278#define BRSR_MBR ((1 << 1)|(1 << 0))
279#define BRSR_MBR_8185 ((1 << 11)|(1 << 10)|(1 << 9)|(1 << 8)|(1 << 7)|(1 << 6)|(1 << 5)|(1 << 4)|(1 << 3)|(1 << 2)|(1 << 1)|(1 << 0))
280#define BRSR_MBR0 ((1 << 0))
281#define BRSR_MBR1 ((1 << 1))
282
283#define CR_RST ((1 << 4))
284#define CR_RE ((1 << 3))
285#define CR_TE ((1 << 2))
286#define CR_MulRW ((1 << 0))
287
288#define IMR_Dot11hInt ((1 << 25)) /*802.11h Measurement Interrupt */
289#define IMR_BcnDmaInt ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */
290#define IMR_WakeInt ((1 << 23)) /*Wake Up Interrupt */
291#define IMR_TXFOVW ((1 << 22)) /*Tx FIFO Overflow Interrupt */
292#define IMR_TimeOut1 ((1 << 21)) /*Time Out Interrupt 1 */
293#define IMR_BcnInt ((1 << 20)) /*Beacon Time out Interrupt */
294#define IMR_ATIMInt ((1 << 19)) /*ATIM Time Out Interrupt */
295#define IMR_TBDER ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */
296#define IMR_TBDOK ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */
297#define IMR_THPDER ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */
298#define IMR_THPDOK ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */
299#define IMR_TVODER ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */
300#define IMR_TVODOK ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */
301#define IMR_FOVW ((1 << 12)) /*Rx FIFO Overflow Interrupt */
302#define IMR_RDU ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */
303#define IMR_TVIDER ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */
304#define IMR_TVIDOK ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */
305#define IMR_RER ((1 << 8)) /*Rx Error Interrupt */
306#define IMR_ROK ((1 << 7)) /*Receive OK Interrupt */
307#define IMR_TBEDER ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */
308#define IMR_TBEDOK ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */
309#define IMR_TBKDER ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */
310#define IMR_TBKDOK ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */
311#define IMR_RQoSOK ((1 << 2)) /*Rx QoS OK Interrupt */
312#define IMR_TimeOut2 ((1 << 1)) /*Time Out Interrupt 2 */
313#define IMR_TimeOut3 ((1 << 0)) /*Time Out Interrupt 3 */
314#define IMR_TMGDOK ((1 << 30))
315#define ISR_Dot11hInt ((1 << 25)) /*802.11h Measurement Interrupt */
316#define ISR_BcnDmaInt ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */
317#define ISR_WakeInt ((1 << 23)) /*Wake Up Interrupt */
318#define ISR_TXFOVW ((1 << 22)) /*Tx FIFO Overflow Interrupt */
319#define ISR_TimeOut1 ((1 << 21)) /*Time Out Interrupt 1 */
320#define ISR_BcnInt ((1 << 20)) /*Beacon Time out Interrupt */
321#define ISR_ATIMInt ((1 << 19)) /*ATIM Time Out Interrupt */
322#define ISR_TBDER ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */
323#define ISR_TBDOK ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */
324#define ISR_THPDER ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */
325#define ISR_THPDOK ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */
326#define ISR_TVODER ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */
327#define ISR_TVODOK ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */
328#define ISR_FOVW ((1 << 12)) /*Rx FIFO Overflow Interrupt */
329#define ISR_RDU ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */
330#define ISR_TVIDER ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */
331#define ISR_TVIDOK ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */
332#define ISR_RER ((1 << 8)) /*Rx Error Interrupt */
333#define ISR_ROK ((1 << 7)) /*Receive OK Interrupt */
334#define ISR_TBEDER ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */
335#define ISR_TBEDOK ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */
336#define ISR_TBKDER ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */
337#define ISR_TBKDOK ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */
338#define ISR_RQoSOK ((1 << 2)) /*Rx QoS OK Interrupt */
339#define ISR_TimeOut2 ((1 << 1)) /*Time Out Interrupt 2 */
340#define ISR_TimeOut3 ((1 << 0)) /*Time Out Interrupt 3 */
341
342/* these definition is used for Tx/Rx test temporarily */
343#define ISR_TLPDER ISR_TVIDER
344#define ISR_TLPDOK ISR_TVIDOK
345#define ISR_TNPDER ISR_TVODER
346#define ISR_TNPDOK ISR_TVODOK
347#define ISR_TimeOut ISR_TimeOut1
348#define ISR_RXFOVW ISR_FOVW
349
350
351#define HW_VERID_R8180_F 3
352#define HW_VERID_R8180_ABCD 2
353#define HW_VERID_R8185_ABC 4
354#define HW_VERID_R8185_D 5
355#define HW_VERID_R8185B_B 6
356
357#define TCR_CWMIN ((1 << 31))
358#define TCR_SWSEQ ((1 << 30))
359#define TCR_HWVERID_MASK ((1 << 27)|(1 << 26)|(1 << 25))
360#define TCR_HWVERID_SHIFT 25
361#define TCR_SAT ((1 << 24))
362#define TCR_PLCP_LEN TCR_SAT /* rtl8180 */
363#define TCR_MXDMA_MASK ((1 << 23)|(1 << 22)|(1 << 21))
364#define TCR_MXDMA_1024 6
365#define TCR_MXDMA_2048 7
366#define TCR_MXDMA_SHIFT 21
367#define TCR_DISCW ((1 << 20))
368#define TCR_ICV ((1 << 19))
369#define TCR_LBK ((1 << 18)|(1 << 17))
370#define TCR_LBK1 ((1 << 18))
371#define TCR_LBK0 ((1 << 17))
372#define TCR_CRC ((1 << 16))
373#define TCR_DPRETRY_MASK ((1 << 15)|(1 << 14)|(1 << 13)|(1 << 12)|(1 << 11)|(1 << 10)|(1 << 9)|(1 << 8))
374#define TCR_RTSRETRY_MASK ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5)|(1 << 6)|(1 << 7))
375#define TCR_PROBE_NOTIMESTAMP_SHIFT 29 /* rtl8185 */
376
377#define RCR_ONLYERLPKT ((1 << 31))
378#define RCR_CS_SHIFT 29
379#define RCR_CS_MASK ((1 << 30) | (1 << 29))
380#define RCR_ENMARP ((1 << 28))
381#define RCR_CBSSID ((1 << 23))
382#define RCR_APWRMGT ((1 << 22))
383#define RCR_ADD3 ((1 << 21))
384#define RCR_AMF ((1 << 20))
385#define RCR_ACF ((1 << 19))
386#define RCR_ADF ((1 << 18))
387#define RCR_RXFTH ((1 << 15)|(1 << 14)|(1 << 13))
388#define RCR_RXFTH2 ((1 << 15))
389#define RCR_RXFTH1 ((1 << 14))
390#define RCR_RXFTH0 ((1 << 13))
391#define RCR_AICV ((1 << 12))
392#define RCR_MXDMA ((1 << 10)|(1 << 9)|(1 << 8))
393#define RCR_MXDMA2 ((1 << 10))
394#define RCR_MXDMA1 ((1 << 9))
395#define RCR_MXDMA0 ((1 << 8))
396#define RCR_9356SEL ((1 << 6))
397#define RCR_ACRC32 ((1 << 5))
398#define RCR_AB ((1 << 3))
399#define RCR_AM ((1 << 2))
400#define RCR_APM ((1 << 1))
401#define RCR_AAP ((1 << 0))
402
403#define CR9346_EEM ((1 << 7)|(1 << 6))
404#define CR9346_EEM1 ((1 << 7))
405#define CR9346_EEM0 ((1 << 6))
406#define CR9346_EECS ((1 << 3))
407#define CR9346_EESK ((1 << 2))
408#define CR9346_EED1 ((1 << 1))
409#define CR9346_EED0 ((1 << 0))
410
411#define CONFIG3_PARM_En ((1 << 6))
412#define CONFIG3_FuncRegEn ((1 << 1))
413
414#define CONFIG4_PWRMGT ((1 << 5))
415
416#define MSR_LINK_MASK ((1 << 2)|(1 << 3))
417#define MSR_LINK_MANAGED 2
418#define MSR_LINK_NONE 0
419#define MSR_LINK_SHIFT 2
420#define MSR_LINK_ADHOC 1
421#define MSR_LINK_MASTER 3
422
423#define BcnItv_BcnItv (0x01FF)
424
425#define AtimWnd_AtimWnd (0x01FF)
426
427#define BintrItv_BintrItv (0x01FF)
428
429#define FEMR_INTR ((1 << 15))
430#define FEMR_WKUP ((1 << 14))
431#define FEMR_GWAKE ((1 << 4))
432
433#define FFER_INTR ((1 << 15))
434#define FFER_GWAKE ((1 << 4))
435
436/* Three wire mode. */
437#define SW_THREE_WIRE 0
438#define HW_THREE_WIRE 2
439/* RTL8187S by amy */
440#define HW_THREE_WIRE_PI 5
441#define HW_THREE_WIRE_SI 6
442/* by amy */
443#define TCR_LRL_OFFSET 0
444#define TCR_SRL_OFFSET 8
445#define TCR_MXDMA_OFFSET 21
446#define TCR_DISReqQsize_OFFSET 28
447#define TCR_DurProcMode_OFFSET 30
448
449#define RCR_MXDMA_OFFSET 8
450#define RCR_FIFO_OFFSET 13
451
452#define AckTimeOutReg 0x79 /* ACK timeout register, in unit of 4 us. */
453
454#define RFTiming 0x8C
455
456#define TPPollStop 0x93
457
458#define TXAGC_CTL 0x9C /*< RJ_TODO_8185B> TX_AGC_CONTROL (0x9C seems be removed at 8185B, see p37). */
459#define CCK_TXAGC 0x9D
460#define OFDM_TXAGC 0x9E
461#define ANTSEL 0x9F
462
463#define ACM_CONTROL 0x00BF /* ACM Control Registe */
464
465#define IntMig 0xE2 /* Interrupt Migration (0xE2 ~ 0xE3) */
466
467#define TID_AC_MAP 0xE8 /* TID to AC Mapping Register */
468
469#define ANAPARAM3 0xEE /* <RJ_TODO_8185B> How to use it? */
470
471#define AC_VO_PARAM 0xF0 /* AC_VO Parameters Record */
472#define AC_VI_PARAM 0xF4 /* AC_VI Parameters Record */
473#define AC_BE_PARAM 0xF8 /* AC_BE Parameters Record */
474#define AC_BK_PARAM 0xFC /* AC_BK Parameters Record */
475
476#define GPIOCtrl 0x16B /*GPIO Control Register. */
477#define ARFR 0x1E0 /* Auto Rate Fallback Register (0x1e0 ~ 0x1e2) */
478
479#define RFSW_CTRL 0x272 /* 0x272-0x273. */
480#define SW_3W_DB0 0x274 /* Software 3-wire data buffer bit 31~0. */
481#define SW_3W_DB1 0x278 /* Software 3-wire data buffer bit 63~32. */
482#define SW_3W_CMD0 0x27C /* Software 3-wire Control/Status Register. */
483#define SW_3W_CMD1 0x27D /* Software 3-wire Control/Status Register. */
484
485#define PI_DATA_READ 0X360 /* 0x360 - 0x361 Parallel Interface Data Register. */
486#define SI_DATA_READ 0x362 /* 0x362 - 0x363 Serial Interface Data Register. */
487
488/*
489----------------------------------------------------------------------------
490 8185B TPPollStop bits (offset 0x93, 1 byte)
491----------------------------------------------------------------------------
492*/
493#define TPPOLLSTOP_BQ (0x01 << 7)
494#define TPPOLLSTOP_AC_VIQ (0x01 << 4)
495
496#define MSR_LINK_ENEDCA (1<<4)
497
498/*
499----------------------------------------------------------------------------
500 8187B AC_XX_PARAM bits
501----------------------------------------------------------------------------
502*/
503#define AC_PARAM_TXOP_LIMIT_OFFSET 16
504#define AC_PARAM_ECW_MAX_OFFSET 12
505#define AC_PARAM_ECW_MIN_OFFSET 8
506#define AC_PARAM_AIFS_OFFSET 0
507
508/*
509----------------------------------------------------------------------------
510 8187B ACM_CONTROL bits (Offset 0xBF, 1 Byte)
511----------------------------------------------------------------------------
512*/
513#define VOQ_ACM_EN (0x01 << 7) /*BIT7 */
514#define VIQ_ACM_EN (0x01 << 6) /*BIT6 */
515#define BEQ_ACM_EN (0x01 << 5) /*BIT5 */
516#define ACM_HW_EN (0x01 << 4) /*BIT4 */
517#define VOQ_ACM_CTL (0x01 << 2) /*BIT2 */ /* Set to 1 when AC_VO used time reaches or exceeds the admitted time */
518#define VIQ_ACM_CTL (0x01 << 1) /*BIT1 */ /* Set to 1 when AC_VI used time reaches or exceeds the admitted time */
519#define BEQ_ACM_CTL (0x01 << 0) /*BIT0 */ /* Set to 1 when AC_BE used time reaches or exceeds the admitted time */
520
521
522/*
523----------------------------------------------------------------------------
524 8185B SW_3W_CMD bits (Offset 0x27C-0x27D, 16bit)
525----------------------------------------------------------------------------
526*/
527#define SW_3W_CMD0_HOLD ((1 << 7))
528#define SW_3W_CMD1_RE ((1 << 0)) /* BIT8 */
529#define SW_3W_CMD1_WE ((1 << 1)) /* BIT9 */
530#define SW_3W_CMD1_DONE ((1 << 2)) /* BIT10 */
531
532#define BB_HOST_BANG_RW (1 << 3)
533
534/*
535----------------------------------------------------------------------------
536 8185B RATE_FALLBACK_CTL bits (Offset 0xBE, 8bit)
537----------------------------------------------------------------------------
538*/
539#define RATE_FALLBACK_CTL_ENABLE ((1 << 7))
540#define RATE_FALLBACK_CTL_ENABLE_RTSCTS ((1 << 6))
541/* Auto rate fallback per 2^n retry. */
542#define RATE_FALLBACK_CTL_AUTO_STEP0 0x00
543#define RATE_FALLBACK_CTL_AUTO_STEP1 0x01
544#define RATE_FALLBACK_CTL_AUTO_STEP2 0x02
545#define RATE_FALLBACK_CTL_AUTO_STEP3 0x03
546
547
548#define RTL8225z2_ANAPARAM_OFF 0x55480658
549#define RTL8225z2_ANAPARAM2_OFF 0x72003f70
550/* by amy for power save */
551#define RF_CHANGE_BY_HW BIT30
552#define RF_CHANGE_BY_PS BIT29
553#define RF_CHANGE_BY_IPS BIT28
554/* by amy for power save */
555/* by amy for antenna */
556#define EEPROM_SW_REVD_OFFSET 0x3f
557
558/* BIT[8-9] is for SW Antenna Diversity.
559 * Only the value EEPROM_SW_AD_ENABLE means enable, other values are disable.
560 */
561#define EEPROM_SW_AD_MASK 0x0300
562#define EEPROM_SW_AD_ENABLE 0x0100
563
564/* BIT[10-11] determine if Antenna 1 is the Default Antenna.
565 * Only the value EEPROM_DEF_ANT_1 means TRUE, other values are FALSE.
566 */
567#define EEPROM_DEF_ANT_MASK 0x0C00
568#define EEPROM_DEF_ANT_1 0x0400
569/*by amy for antenna */
570/* {by amy 080312 */
571/* 0x7C, 0x7D Crystal calibration and Tx Power tracking mechanism. Added by Roger. 2007.12.10. */
572#define EEPROM_RSV 0x7C
573#define EEPROM_XTAL_CAL_XOUT_MASK 0x0F /* 0x7C[3:0], Crystal calibration for Xout. */
574#define EEPROM_XTAL_CAL_XIN_MASK 0xF0 /* 0x7C[7:4], Crystal calibration for Xin. */
575#define EEPROM_THERMAL_METER_MASK 0x0F00 /* 0x7D[3:0], Thermal meter reference level. */
576#define EEPROM_XTAL_CAL_ENABLE 0x1000 /* 0x7D[4], Crystal calibration enabled/disabled BIT. */
577#define EEPROM_THERMAL_METER_ENABLE 0x2000 /* 0x7D[5], Thermal meter enabled/disabled BIT. */
578#define EN_LPF_CAL 0x238 /* Enable LPF Calibration. */
579#define PWR_METER_EN BIT1
580/* <RJ_TODO_8185B> where are false alarm counters in 8185B? */
581#define CCK_FALSE_ALARM 0xD0
582/* by amy 080312} */
583
584/* YJ,add for Country IE, 080630 */
585#define EEPROM_COUNTRY_CODE 0x2E
586/* YJ,add,080630,end */
587
588#endif
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225.h b/drivers/staging/rtl8187se/r8180_rtl8225.h
deleted file mode 100644
index 7df73927b3cc..000000000000
--- a/drivers/staging/rtl8187se/r8180_rtl8225.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * This is part of the rtl8180-sa2400 driver released under the GPL (See file
3 * COPYING for details).
4 *
5 * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
6 *
7 * This files contains programming code for the rtl8225 radio frontend.
8 *
9 * *Many* thanks to Realtek Corp. for their great support!
10 */
11
12#include "r8180.h"
13
14#define RTL8225_ANAPARAM_ON 0xa0000b59
15#define RTL8225_ANAPARAM_OFF 0xa00beb59
16#define RTL8225_ANAPARAM2_OFF 0x840dec11
17#define RTL8225_ANAPARAM2_ON 0x860dec11
18#define RTL8225_ANAPARAM_SLEEP 0xa00bab59
19#define RTL8225_ANAPARAM2_SLEEP 0x840dec11
20
21void rtl8225z2_rf_init(struct net_device *dev);
22void rtl8225z2_rf_set_chan(struct net_device *dev, short ch);
23void rtl8225z2_rf_close(struct net_device *dev);
24
25void RF_WriteReg(struct net_device *dev, u8 offset, u16 data);
26u16 RF_ReadReg(struct net_device *dev, u8 offset);
27
28void rtl8180_set_mode(struct net_device *dev, int mode);
29void rtl8180_set_mode(struct net_device *dev, int mode);
30bool SetZebraRFPowerState8185(struct net_device *dev,
31 enum rt_rf_power_state eRFPowerState);
32void rtl8225z4_rf_sleep(struct net_device *dev);
33void rtl8225z4_rf_wakeup(struct net_device *dev);
34
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
deleted file mode 100644
index 47104fa05c55..000000000000
--- a/drivers/staging/rtl8187se/r8180_rtl8225z2.c
+++ /dev/null
@@ -1,811 +0,0 @@
1/*
2 * This is part of the rtl8180-sa2400 driver
3 * released under the GPL (See file COPYING for details).
4 * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
5 *
6 * This files contains programming code for the rtl8225
7 * radio frontend.
8 *
9 * *Many* thanks to Realtek Corp. for their great support!
10 */
11
12#include "r8180_hw.h"
13#include "r8180_rtl8225.h"
14#include "r8180_93cx6.h"
15
16#include "ieee80211/dot11d.h"
17
18static void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
19{
20 int i;
21 u16 out, select;
22 u8 bit;
23 u32 bangdata = (data << 4) | (adr & 0xf);
24
25 out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
26
27 write_nic_word(dev, RFPinsEnable,
28 (read_nic_word(dev, RFPinsEnable) | 0x7));
29
30 select = read_nic_word(dev, RFPinsSelect);
31
32 write_nic_word(dev, RFPinsSelect, select | 0x7 |
33 SW_CONTROL_GPIO);
34
35 force_pci_posting(dev);
36 udelay(10);
37
38 write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
39
40 force_pci_posting(dev);
41 udelay(2);
42
43 write_nic_word(dev, RFPinsOutput, out);
44
45 force_pci_posting(dev);
46 udelay(10);
47
48 for (i = 15; i >= 0; i--) {
49 bit = (bangdata & (1 << i)) >> i;
50
51 write_nic_word(dev, RFPinsOutput, bit | out);
52
53 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
54 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
55
56 i--;
57 bit = (bangdata & (1 << i)) >> i;
58
59 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
60 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
61
62 write_nic_word(dev, RFPinsOutput, bit | out);
63
64 }
65
66 write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
67
68 force_pci_posting(dev);
69 udelay(10);
70
71 write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
72
73 write_nic_word(dev, RFPinsSelect, select | SW_CONTROL_GPIO);
74
75 rtl8185_rf_pins_enable(dev);
76}
77
78static const u8 rtl8225_agc[] = {
79 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e,
80 0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96,
81 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 0x8f, 0x8e,
82 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86,
83 0x85, 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e,
84 0x3d, 0x3c, 0x3b, 0x3a, 0x39, 0x38, 0x37, 0x36,
85 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 0x2e,
86 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26,
87 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e,
88 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 0x17, 0x16,
89 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
90 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06,
91 0x05, 0x04, 0x03, 0x02, 0x01, 0x01, 0x01, 0x01,
92 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
93 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
94 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
95};
96
97static const u32 rtl8225_chan[] = {
98 0,
99 0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380,
100 0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A,
101};
102
103static const u8 rtl8225z2_gain_bg[] = {
104 0x23, 0x15, 0xa5, /* -82-1dBm */
105 0x23, 0x15, 0xb5, /* -82-2dBm */
106 0x23, 0x15, 0xc5, /* -82-3dBm */
107 0x33, 0x15, 0xc5, /* -78dBm */
108 0x43, 0x15, 0xc5, /* -74dBm */
109 0x53, 0x15, 0xc5, /* -70dBm */
110 0x63, 0x15, 0xc5, /* -66dBm */
111};
112
113static const u8 rtl8225z2_gain_a[] = {
114 0x13, 0x27, 0x5a, /* -82dBm */
115 0x23, 0x23, 0x58, /* -82dBm */
116 0x33, 0x1f, 0x56, /* -82dBm */
117 0x43, 0x1b, 0x54, /* -78dBm */
118 0x53, 0x17, 0x51, /* -74dBm */
119 0x63, 0x24, 0x4f, /* -70dBm */
120 0x73, 0x0f, 0x4c, /* -66dBm */
121};
122
123static const u16 rtl8225z2_rxgain[] = {
124 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
125 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
126 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
127 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
128 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
129 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
130 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
131 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
132 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
133 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
134 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
135 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb
136
137};
138
139static void rtl8225z2_set_gain(struct net_device *dev, short gain)
140{
141 const u8 *rtl8225_gain;
142 struct r8180_priv *priv = ieee80211_priv(dev);
143 u8 mode = priv->ieee80211->mode;
144
145 if (mode == IEEE_B || mode == IEEE_G)
146 rtl8225_gain = rtl8225z2_gain_bg;
147 else
148 rtl8225_gain = rtl8225z2_gain_a;
149
150 write_phy_ofdm(dev, 0x0b, rtl8225_gain[gain * 3]);
151 write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 1]);
152 write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 3 + 2]);
153 write_phy_ofdm(dev, 0x21, 0x37);
154}
155
156static u32 read_rtl8225(struct net_device *dev, u8 adr)
157{
158 u32 data2Write = ((u32)(adr & 0x1f)) << 27;
159 u32 dataRead;
160 u32 mask;
161 u16 oval, oval2, oval3, tmp;
162 int i;
163 short bit, rw;
164 u8 wLength = 6;
165 u8 rLength = 12;
166 u8 low2high = 0;
167
168 oval = read_nic_word(dev, RFPinsOutput);
169 oval2 = read_nic_word(dev, RFPinsEnable);
170 oval3 = read_nic_word(dev, RFPinsSelect);
171
172 write_nic_word(dev, RFPinsEnable, (oval2|0xf));
173 write_nic_word(dev, RFPinsSelect, (oval3|0xf));
174
175 dataRead = 0;
176
177 oval &= ~0xf;
178
179 write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN);
180 udelay(4);
181
182 write_nic_word(dev, RFPinsOutput, oval);
183 udelay(5);
184
185 rw = 0;
186
187 mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
188
189 for (i = 0; i < wLength/2; i++) {
190 bit = ((data2Write&mask) != 0) ? 1 : 0;
191 write_nic_word(dev, RFPinsOutput, bit | oval | rw);
192 udelay(1);
193
194 write_nic_word(dev, RFPinsOutput,
195 bit | oval | BB_HOST_BANG_CLK | rw);
196 udelay(2);
197 write_nic_word(dev, RFPinsOutput,
198 bit | oval | BB_HOST_BANG_CLK | rw);
199 udelay(2);
200
201 mask = (low2high) ? (mask<<1) : (mask>>1);
202
203 if (i == 2) {
204 rw = BB_HOST_BANG_RW;
205 write_nic_word(dev, RFPinsOutput,
206 bit | oval | BB_HOST_BANG_CLK | rw);
207 udelay(2);
208 write_nic_word(dev, RFPinsOutput, bit | oval | rw);
209 udelay(2);
210 break;
211 }
212
213 bit = ((data2Write&mask) != 0) ? 1 : 0;
214
215 write_nic_word(dev, RFPinsOutput,
216 oval | bit | rw | BB_HOST_BANG_CLK);
217 udelay(2);
218 write_nic_word(dev, RFPinsOutput,
219 oval | bit | rw | BB_HOST_BANG_CLK);
220 udelay(2);
221
222 write_nic_word(dev, RFPinsOutput, oval | bit | rw);
223 udelay(1);
224
225 mask = (low2high) ? (mask<<1) : (mask>>1);
226 }
227
228 write_nic_word(dev, RFPinsOutput, rw|oval);
229 udelay(2);
230 mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
231
232 /*
233 * We must set data pin to HW controlled, otherwise RF can't driver it
234 * and value RF register won't be able to read back properly.
235 */
236 write_nic_word(dev, RFPinsEnable, (oval2 & (~0x01)));
237
238 for (i = 0; i < rLength; i++) {
239 write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
240
241 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
242 udelay(2);
243 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
244 udelay(2);
245 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
246 udelay(2);
247 tmp = read_nic_word(dev, RFPinsInput);
248
249 dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
250
251 write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
252
253 mask = (low2high) ? (mask<<1) : (mask>>1);
254 }
255
256 write_nic_word(dev, RFPinsOutput,
257 BB_HOST_BANG_EN | BB_HOST_BANG_RW | oval);
258 udelay(2);
259
260 write_nic_word(dev, RFPinsEnable, oval2);
261 write_nic_word(dev, RFPinsSelect, oval3); /* Set To SW Switch */
262 write_nic_word(dev, RFPinsOutput, 0x3a0);
263
264 return dataRead;
265}
266
267void rtl8225z2_rf_close(struct net_device *dev)
268{
269 RF_WriteReg(dev, 0x4, 0x1f);
270
271 force_pci_posting(dev);
272 mdelay(1);
273
274 rtl8180_set_anaparam(dev, RTL8225z2_ANAPARAM_OFF);
275 rtl8185_set_anaparam2(dev, RTL8225z2_ANAPARAM2_OFF);
276}
277
278/*
279 * Map dBm into Tx power index according to current HW model, for example,
280 * RF and PA, and current wireless mode.
281 */
282static s8 DbmToTxPwrIdx(struct r8180_priv *priv,
283 enum wireless_mode mode, s32 PowerInDbm)
284{
285 bool bUseDefault = true;
286 s8 TxPwrIdx = 0;
287
288 /*
289 * OFDM Power in dBm = Index * 0.5 + 0
290 * CCK Power in dBm = Index * 0.25 + 13
291 */
292 s32 tmp = 0;
293
294 if (mode == WIRELESS_MODE_G) {
295 bUseDefault = false;
296 tmp = (2 * PowerInDbm);
297
298 if (tmp < 0)
299 TxPwrIdx = 0;
300 else if (tmp > 40) /* 40 means 20 dBm. */
301 TxPwrIdx = 40;
302 else
303 TxPwrIdx = (s8)tmp;
304 } else if (mode == WIRELESS_MODE_B) {
305 bUseDefault = false;
306 tmp = (4 * PowerInDbm) - 52;
307
308 if (tmp < 0)
309 TxPwrIdx = 0;
310 else if (tmp > 28) /* 28 means 20 dBm. */
311 TxPwrIdx = 28;
312 else
313 TxPwrIdx = (s8)tmp;
314 }
315
316 /*
317 * TRUE if we want to use a default implementation.
318 * We shall set it to FALSE when we have exact translation formula
319 * for target IC. 070622, by rcnjko.
320 */
321 if (bUseDefault) {
322 if (PowerInDbm < 0)
323 TxPwrIdx = 0;
324 else if (PowerInDbm > 35)
325 TxPwrIdx = 35;
326 else
327 TxPwrIdx = (u8)PowerInDbm;
328 }
329
330 return TxPwrIdx;
331}
332
333void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
334{
335 struct r8180_priv *priv = ieee80211_priv(dev);
336 u8 max_cck_power_level;
337 u8 max_ofdm_power_level;
338 u8 min_ofdm_power_level;
339 char cck_power_level = (char)(0xff & priv->chtxpwr[ch]);
340 char ofdm_power_level = (char)(0xff & priv->chtxpwr_ofdm[ch]);
341
342 if (IS_DOT11D_ENABLE(priv->ieee80211) &&
343 IS_DOT11D_STATE_DONE(priv->ieee80211)) {
344 u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
345 u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B,
346 MaxTxPwrInDbm);
347 u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G,
348 MaxTxPwrInDbm);
349
350 if (cck_power_level > CckMaxPwrIdx)
351 cck_power_level = CckMaxPwrIdx;
352 if (ofdm_power_level > OfdmMaxPwrIdx)
353 ofdm_power_level = OfdmMaxPwrIdx;
354 }
355
356 max_cck_power_level = 15;
357 max_ofdm_power_level = 25;
358 min_ofdm_power_level = 10;
359
360 if (cck_power_level > 35)
361 cck_power_level = 35;
362
363 write_nic_byte(dev, CCK_TXAGC, cck_power_level);
364 force_pci_posting(dev);
365 mdelay(1);
366
367 if (ofdm_power_level > 35)
368 ofdm_power_level = 35;
369
370 if (priv->up == 0) {
371 write_phy_ofdm(dev, 2, 0x42);
372 write_phy_ofdm(dev, 5, 0x00);
373 write_phy_ofdm(dev, 6, 0x40);
374 write_phy_ofdm(dev, 7, 0x00);
375 write_phy_ofdm(dev, 8, 0x40);
376 }
377
378 write_nic_byte(dev, OFDM_TXAGC, ofdm_power_level);
379
380 if (ofdm_power_level <= 11) {
381 write_phy_ofdm(dev, 0x07, 0x5c);
382 write_phy_ofdm(dev, 0x09, 0x5c);
383 }
384
385 if (ofdm_power_level <= 17) {
386 write_phy_ofdm(dev, 0x07, 0x54);
387 write_phy_ofdm(dev, 0x09, 0x54);
388 } else {
389 write_phy_ofdm(dev, 0x07, 0x50);
390 write_phy_ofdm(dev, 0x09, 0x50);
391 }
392
393 force_pci_posting(dev);
394 mdelay(1);
395}
396
397void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)
398{
399 rtl8225z2_SetTXPowerLevel(dev, ch);
400
401 RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);
402
403 if ((RF_ReadReg(dev, 0x7) & 0x0F80) != rtl8225_chan[ch])
404 RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);
405
406 mdelay(1);
407
408 force_pci_posting(dev);
409 mdelay(10);
410}
411
412static void rtl8225_host_pci_init(struct net_device *dev)
413{
414 write_nic_word(dev, RFPinsOutput, 0x480);
415
416 rtl8185_rf_pins_enable(dev);
417
418 write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO);
419
420 write_nic_byte(dev, GP_ENABLE, 0);
421
422 force_pci_posting(dev);
423 mdelay(200);
424
425 /* bit 6 is for RF on/off detection */
426 write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6)));
427}
428
429void rtl8225z2_rf_init(struct net_device *dev)
430{
431 struct r8180_priv *priv = ieee80211_priv(dev);
432 int i;
433 short channel = 1;
434 u16 brsr;
435 u32 data;
436
437 priv->chan = channel;
438
439 rtl8225_host_pci_init(dev);
440
441 write_nic_dword(dev, RF_TIMING, 0x000a8008);
442
443 brsr = read_nic_word(dev, BRSR);
444
445 write_nic_word(dev, BRSR, 0xffff);
446
447 write_nic_dword(dev, RF_PARA, 0x100044);
448
449 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
450 write_nic_byte(dev, CONFIG3, 0x44);
451 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
452
453 rtl8185_rf_pins_enable(dev);
454
455 write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
456 write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
457 write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
458 write_rtl8225(dev, 0x3, 0x441); mdelay(1);
459 write_rtl8225(dev, 0x4, 0x8c3); mdelay(1);
460 write_rtl8225(dev, 0x5, 0xc72); mdelay(1);
461 write_rtl8225(dev, 0x6, 0xe6); mdelay(1);
462 write_rtl8225(dev, 0x7, rtl8225_chan[channel]); mdelay(1);
463 write_rtl8225(dev, 0x8, 0x3f); mdelay(1);
464 write_rtl8225(dev, 0x9, 0x335); mdelay(1);
465 write_rtl8225(dev, 0xa, 0x9d4); mdelay(1);
466 write_rtl8225(dev, 0xb, 0x7bb); mdelay(1);
467 write_rtl8225(dev, 0xc, 0x850); mdelay(1);
468 write_rtl8225(dev, 0xd, 0xcdf); mdelay(1);
469 write_rtl8225(dev, 0xe, 0x2b); mdelay(1);
470 write_rtl8225(dev, 0xf, 0x114);
471
472 mdelay(100);
473
474 write_rtl8225(dev, 0x0, 0x1b7);
475
476 for (i = 0; i < ARRAY_SIZE(rtl8225z2_rxgain); i++) {
477 write_rtl8225(dev, 0x1, i + 1);
478 write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
479 }
480
481 write_rtl8225(dev, 0x3, 0x80);
482 write_rtl8225(dev, 0x5, 0x4);
483
484 write_rtl8225(dev, 0x0, 0xb7);
485
486 write_rtl8225(dev, 0x2, 0xc4d);
487
488 /* FIXME!! rtl8187 we have to check if calibrarion
489 * is successful and eventually cal. again (repeat
490 * the two write on reg 2)
491 */
492 data = read_rtl8225(dev, 6);
493 if (!(data & 0x00000080)) {
494 write_rtl8225(dev, 0x02, 0x0c4d);
495 force_pci_posting(dev); mdelay(200);
496 write_rtl8225(dev, 0x02, 0x044d);
497 force_pci_posting(dev); mdelay(100);
498 data = read_rtl8225(dev, 6);
499 if (!(data & 0x00000080))
500 DMESGW("RF Calibration Failed!!!!\n");
501 }
502
503 mdelay(200);
504
505 write_rtl8225(dev, 0x0, 0x2bf);
506
507 for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) {
508 write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
509 mdelay(1);
510
511 /* enable writing AGC table */
512 write_phy_ofdm(dev, 0xa, i + 0x80);
513 mdelay(1);
514 }
515
516 force_pci_posting(dev);
517 mdelay(1);
518
519 write_phy_ofdm(dev, 0x00, 0x01); mdelay(1);
520 write_phy_ofdm(dev, 0x01, 0x02); mdelay(1);
521 write_phy_ofdm(dev, 0x02, 0x62); mdelay(1);
522 write_phy_ofdm(dev, 0x03, 0x00); mdelay(1);
523 write_phy_ofdm(dev, 0x04, 0x00); mdelay(1);
524 write_phy_ofdm(dev, 0x05, 0x00); mdelay(1);
525 write_phy_ofdm(dev, 0x06, 0x40); mdelay(1);
526 write_phy_ofdm(dev, 0x07, 0x00); mdelay(1);
527 write_phy_ofdm(dev, 0x08, 0x40); mdelay(1);
528 write_phy_ofdm(dev, 0x09, 0xfe); mdelay(1);
529 write_phy_ofdm(dev, 0x0a, 0x08); mdelay(1);
530 write_phy_ofdm(dev, 0x0b, 0x80); mdelay(1);
531 write_phy_ofdm(dev, 0x0c, 0x01); mdelay(1);
532 write_phy_ofdm(dev, 0x0d, 0x43);
533 write_phy_ofdm(dev, 0x0e, 0xd3); mdelay(1);
534 write_phy_ofdm(dev, 0x0f, 0x38); mdelay(1);
535 write_phy_ofdm(dev, 0x10, 0x84); mdelay(1);
536 write_phy_ofdm(dev, 0x11, 0x07); mdelay(1);
537 write_phy_ofdm(dev, 0x12, 0x20); mdelay(1);
538 write_phy_ofdm(dev, 0x13, 0x20); mdelay(1);
539 write_phy_ofdm(dev, 0x14, 0x00); mdelay(1);
540 write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
541 write_phy_ofdm(dev, 0x16, 0x00); mdelay(1);
542 write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
543 write_phy_ofdm(dev, 0x18, 0xef); mdelay(1);
544 write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
545 write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
546 write_phy_ofdm(dev, 0x1b, 0x15); mdelay(1);
547 write_phy_ofdm(dev, 0x1c, 0x04); mdelay(1);
548 write_phy_ofdm(dev, 0x1d, 0xc5); mdelay(1);
549 write_phy_ofdm(dev, 0x1e, 0x95); mdelay(1);
550 write_phy_ofdm(dev, 0x1f, 0x75); mdelay(1);
551 write_phy_ofdm(dev, 0x20, 0x1f); mdelay(1);
552 write_phy_ofdm(dev, 0x21, 0x17); mdelay(1);
553 write_phy_ofdm(dev, 0x22, 0x16); mdelay(1);
554 write_phy_ofdm(dev, 0x23, 0x80); mdelay(1); /* FIXME maybe not needed */
555 write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
556 write_phy_ofdm(dev, 0x25, 0x00); mdelay(1);
557 write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
558 write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
559
560 rtl8225z2_set_gain(dev, 4);
561
562 write_phy_cck(dev, 0x0, 0x98); mdelay(1);
563 write_phy_cck(dev, 0x3, 0x20); mdelay(1);
564 write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
565 write_phy_cck(dev, 0x5, 0x12); mdelay(1);
566 write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
567 write_phy_cck(dev, 0x7, 0x78); mdelay(1);
568 write_phy_cck(dev, 0x8, 0x2e); mdelay(1);
569 write_phy_cck(dev, 0x10, 0x93); mdelay(1);
570 write_phy_cck(dev, 0x11, 0x88); mdelay(1);
571 write_phy_cck(dev, 0x12, 0x47); mdelay(1);
572 write_phy_cck(dev, 0x13, 0xd0);
573 write_phy_cck(dev, 0x19, 0x00);
574 write_phy_cck(dev, 0x1a, 0xa0);
575 write_phy_cck(dev, 0x1b, 0x08);
576 write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
577 write_phy_cck(dev, 0x41, 0x8d); mdelay(1);
578 write_phy_cck(dev, 0x42, 0x15); mdelay(1);
579 write_phy_cck(dev, 0x43, 0x18); mdelay(1);
580 write_phy_cck(dev, 0x44, 0x36); mdelay(1);
581 write_phy_cck(dev, 0x45, 0x35); mdelay(1);
582 write_phy_cck(dev, 0x46, 0x2e); mdelay(1);
583 write_phy_cck(dev, 0x47, 0x25); mdelay(1);
584 write_phy_cck(dev, 0x48, 0x1c); mdelay(1);
585 write_phy_cck(dev, 0x49, 0x12); mdelay(1);
586 write_phy_cck(dev, 0x4a, 0x09); mdelay(1);
587 write_phy_cck(dev, 0x4b, 0x04); mdelay(1);
588 write_phy_cck(dev, 0x4c, 0x05); mdelay(1);
589
590 write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
591
592 rtl8225z2_SetTXPowerLevel(dev, channel);
593
594 /* RX antenna default to A */
595 write_phy_cck(dev, 0x11, 0x9b); mdelay(1); /* B: 0xDB */
596 write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* B: 0x10 */
597
598 rtl8185_tx_antenna(dev, 0x03); /* B: 0x00 */
599
600 /* switch to high-speed 3-wire
601 * last digit. 2 for both cck and ofdm
602 */
603 write_nic_dword(dev, 0x94, 0x15c00002);
604 rtl8185_rf_pins_enable(dev);
605
606 rtl8225z2_rf_set_chan(dev, priv->chan);
607}
608
609#define MAX_DOZE_WAITING_TIMES_85B 20
610#define MAX_POLLING_24F_TIMES_87SE 10
611#define LPS_MAX_SLEEP_WAITING_TIMES_87SE 5
612
613bool SetZebraRFPowerState8185(struct net_device *dev,
614 enum rt_rf_power_state eRFPowerState)
615{
616 struct r8180_priv *priv = ieee80211_priv(dev);
617 u8 btCR9346, btConfig3;
618 bool bActionAllowed = true, bTurnOffBB = true;
619 u8 u1bTmp;
620 int i;
621 bool bResult = true;
622 u8 QueueID;
623
624 if (priv->SetRFPowerStateInProgress == true)
625 return false;
626
627 priv->SetRFPowerStateInProgress = true;
628
629 btCR9346 = read_nic_byte(dev, CR9346);
630 write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
631
632 btConfig3 = read_nic_byte(dev, CONFIG3);
633 write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
634
635 switch (eRFPowerState) {
636 case RF_ON:
637 write_nic_word(dev, 0x37C, 0x00EC);
638
639 /* turn on AFE */
640 write_nic_byte(dev, 0x54, 0x00);
641 write_nic_byte(dev, 0x62, 0x00);
642
643 /* turn on RF */
644 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
645 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
646
647 /* turn on RF again */
648 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
649 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
650
651 /* turn on BB */
652 write_phy_ofdm(dev, 0x10, 0x40);
653 write_phy_ofdm(dev, 0x12, 0x40);
654
655 /* Avoid power down at init time. */
656 write_nic_byte(dev, CONFIG4, priv->RFProgType);
657
658 u1bTmp = read_nic_byte(dev, 0x24E);
659 write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
660 break;
661 case RF_SLEEP:
662 for (QueueID = 0, i = 0; QueueID < 6;) {
663 if (get_curr_tx_free_desc(dev, QueueID) ==
664 priv->txringcount) {
665 QueueID++;
666 continue;
667 } else {
668 priv->TxPollingTimes++;
669 if (priv->TxPollingTimes >=
670 LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
671 bActionAllowed = false;
672 break;
673 } else
674 udelay(10);
675 }
676 }
677
678 if (bActionAllowed) {
679 /* turn off BB RXIQ matrix to cut off rx signal */
680 write_phy_ofdm(dev, 0x10, 0x00);
681 write_phy_ofdm(dev, 0x12, 0x00);
682
683 /* turn off RF */
684 RF_WriteReg(dev, 0x4, 0x0000);
685 RF_WriteReg(dev, 0x0, 0x0000);
686
687 /* turn off AFE except PLL */
688 write_nic_byte(dev, 0x62, 0xff);
689 write_nic_byte(dev, 0x54, 0xec);
690
691 mdelay(1);
692
693 {
694 int i = 0;
695 while (true) {
696 u8 tmp24F = read_nic_byte(dev, 0x24f);
697
698 if ((tmp24F == 0x01) ||
699 (tmp24F == 0x09)) {
700 bTurnOffBB = true;
701 break;
702 } else {
703 udelay(10);
704 i++;
705 priv->TxPollingTimes++;
706
707 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
708 bTurnOffBB = false;
709 break;
710 } else
711 udelay(10);
712 }
713 }
714 }
715
716 if (bTurnOffBB) {
717 /* turn off BB */
718 u1bTmp = read_nic_byte(dev, 0x24E);
719 write_nic_byte(dev, 0x24E,
720 (u1bTmp | BIT5 | BIT6));
721
722 /* turn off AFE PLL */
723 write_nic_byte(dev, 0x54, 0xFC);
724 write_nic_word(dev, 0x37C, 0x00FC);
725 }
726 }
727 break;
728 case RF_OFF:
729 for (QueueID = 0, i = 0; QueueID < 6;) {
730 if (get_curr_tx_free_desc(dev, QueueID) ==
731 priv->txringcount) {
732 QueueID++;
733 continue;
734 } else {
735 udelay(10);
736 i++;
737 }
738
739 if (i >= MAX_DOZE_WAITING_TIMES_85B)
740 break;
741 }
742
743 /* turn off BB RXIQ matrix to cut off rx signal */
744 write_phy_ofdm(dev, 0x10, 0x00);
745 write_phy_ofdm(dev, 0x12, 0x00);
746
747 /* turn off RF */
748 RF_WriteReg(dev, 0x4, 0x0000);
749 RF_WriteReg(dev, 0x0, 0x0000);
750
751 /* turn off AFE except PLL */
752 write_nic_byte(dev, 0x62, 0xff);
753 write_nic_byte(dev, 0x54, 0xec);
754
755 mdelay(1);
756
757 {
758 int i = 0;
759
760 while (true) {
761 u8 tmp24F = read_nic_byte(dev, 0x24f);
762
763 if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
764 bTurnOffBB = true;
765 break;
766 } else {
767 bTurnOffBB = false;
768 udelay(10);
769 i++;
770 }
771
772 if (i > MAX_POLLING_24F_TIMES_87SE)
773 break;
774 }
775 }
776
777 if (bTurnOffBB) {
778 /* turn off BB */
779 u1bTmp = read_nic_byte(dev, 0x24E);
780 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
781
782 /* turn off AFE PLL (80M) */
783 write_nic_byte(dev, 0x54, 0xFC);
784 write_nic_word(dev, 0x37C, 0x00FC);
785 }
786 break;
787 }
788
789 btConfig3 &= ~(CONFIG3_PARM_En);
790 write_nic_byte(dev, CONFIG3, btConfig3);
791
792 btCR9346 &= ~(0xC0);
793 write_nic_byte(dev, CR9346, btCR9346);
794
795 if (bResult && bActionAllowed)
796 priv->eRFPowerState = eRFPowerState;
797
798 priv->SetRFPowerStateInProgress = false;
799
800 return bResult && bActionAllowed;
801}
802
803void rtl8225z4_rf_sleep(struct net_device *dev)
804{
805 MgntActSet_RF_State(dev, RF_SLEEP, RF_CHANGE_BY_PS);
806}
807
808void rtl8225z4_rf_wakeup(struct net_device *dev)
809{
810 MgntActSet_RF_State(dev, RF_ON, RF_CHANGE_BY_PS);
811}
diff --git a/drivers/staging/rtl8187se/r8180_wx.c b/drivers/staging/rtl8187se/r8180_wx.c
deleted file mode 100644
index b55249170f18..000000000000
--- a/drivers/staging/rtl8187se/r8180_wx.c
+++ /dev/null
@@ -1,1409 +0,0 @@
1/*
2 This file contains wireless extension handlers.
3
4 This is part of rtl8180 OpenSource driver.
5 Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
6 Released under the terms of GPL (General Public Licence)
7
8 Parts of this driver are based on the GPL part
9 of the official realtek driver.
10
11 Parts of this driver are based on the rtl8180 driver skeleton
12 from Patric Schenke & Andres Salomon.
13
14 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
15
16 We want to thanks the Authors of those projects and the Ndiswrapper
17 project Authors.
18*/
19
20
21#include "r8180.h"
22#include "r8180_hw.h"
23
24#include <net/iw_handler.h>
25#include "ieee80211/dot11d.h"
26
27static u32 rtl8180_rates[] = {1000000, 2000000, 5500000, 11000000,
28 6000000, 9000000, 12000000, 18000000, 24000000, 36000000, 48000000, 54000000};
29
30#define RATE_COUNT ARRAY_SIZE(rtl8180_rates)
31
32static struct rtl8187se_channel_list default_channel_plan[] = {
33 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, /* FCC */
34 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, /* IC */
35 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, /* ETSI */
36 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, /* Spain. Change to ETSI. */
37 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, /* France. Change to ETSI. */
38 {{14, 36, 40, 44, 48, 52, 56, 60, 64}, 9}, /* MKK */
39 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, /* MKK1 */
40 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, /* Israel */
41 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 34, 38, 42, 46}, 17}, /* For 11a , TELEC */
42 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14} /* For Global Domain. 1-11:active scan, 12-14 passive scan.*/ /* +YJ, 080626 */
43};
44static int r8180_wx_get_freq(struct net_device *dev,
45 struct iw_request_info *a,
46 union iwreq_data *wrqu, char *b)
47{
48 struct r8180_priv *priv = ieee80211_priv(dev);
49
50 return ieee80211_wx_get_freq(priv->ieee80211, a, wrqu, b);
51}
52
53
54static int r8180_wx_set_key(struct net_device *dev,
55 struct iw_request_info *info,
56 union iwreq_data *wrqu, char *key)
57{
58 struct r8180_priv *priv = ieee80211_priv(dev);
59 struct iw_point *erq = &(wrqu->encoding);
60
61 if (priv->ieee80211->bHwRadioOff)
62 return 0;
63
64 if (erq->length > 0) {
65 u32 *tkey = (u32 *) key;
66 priv->key0[0] = tkey[0];
67 priv->key0[1] = tkey[1];
68 priv->key0[2] = tkey[2];
69 priv->key0[3] = tkey[3] & 0xff;
70 DMESG("Setting wep key to %x %x %x %x",
71 tkey[0], tkey[1], tkey[2], tkey[3]);
72 rtl8180_set_hw_wep(dev);
73 }
74 return 0;
75}
76
77
78static int r8180_wx_set_beaconinterval(struct net_device *dev,
79 struct iw_request_info *aa,
80 union iwreq_data *wrqu, char *b)
81{
82 int *parms = (int *)b;
83 int bi = parms[0];
84
85 struct r8180_priv *priv = ieee80211_priv(dev);
86
87 if (priv->ieee80211->bHwRadioOff)
88 return 0;
89
90 down(&priv->wx_sem);
91 DMESG("setting beacon interval to %x", bi);
92
93 priv->ieee80211->current_network.beacon_interval = bi;
94 rtl8180_commit(dev);
95 up(&priv->wx_sem);
96
97 return 0;
98}
99
100
101
102static int r8180_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
103 union iwreq_data *wrqu, char *b)
104{
105 struct r8180_priv *priv = ieee80211_priv(dev);
106 return ieee80211_wx_get_mode(priv->ieee80211, a, wrqu, b);
107}
108
109
110
111static int r8180_wx_get_rate(struct net_device *dev,
112 struct iw_request_info *info,
113 union iwreq_data *wrqu, char *extra)
114{
115 struct r8180_priv *priv = ieee80211_priv(dev);
116 return ieee80211_wx_get_rate(priv->ieee80211, info, wrqu, extra);
117}
118
119
120
121static int r8180_wx_set_rate(struct net_device *dev,
122 struct iw_request_info *info,
123 union iwreq_data *wrqu, char *extra)
124{
125 int ret;
126 struct r8180_priv *priv = ieee80211_priv(dev);
127
128
129 if (priv->ieee80211->bHwRadioOff)
130 return 0;
131
132 down(&priv->wx_sem);
133
134 ret = ieee80211_wx_set_rate(priv->ieee80211, info, wrqu, extra);
135
136 up(&priv->wx_sem);
137
138 return ret;
139}
140
141
142static int r8180_wx_set_crcmon(struct net_device *dev,
143 struct iw_request_info *info,
144 union iwreq_data *wrqu, char *extra)
145{
146 struct r8180_priv *priv = ieee80211_priv(dev);
147 int *parms = (int *)extra;
148 int enable = (parms[0] > 0);
149 short prev = priv->crcmon;
150
151
152 if (priv->ieee80211->bHwRadioOff)
153 return 0;
154
155 down(&priv->wx_sem);
156
157 if (enable)
158 priv->crcmon = 1;
159 else
160 priv->crcmon = 0;
161
162 DMESG("bad CRC in monitor mode are %s",
163 priv->crcmon ? "accepted" : "rejected");
164
165 if (prev != priv->crcmon && priv->up) {
166 rtl8180_down(dev);
167 rtl8180_up(dev);
168 }
169
170 up(&priv->wx_sem);
171
172 return 0;
173}
174
175
176static int r8180_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
177 union iwreq_data *wrqu, char *b)
178{
179 struct r8180_priv *priv = ieee80211_priv(dev);
180 int ret;
181
182
183 if (priv->ieee80211->bHwRadioOff)
184 return 0;
185
186 down(&priv->wx_sem);
187 if (priv->bInactivePs) {
188 if (wrqu->mode == IW_MODE_ADHOC)
189 IPSLeave(dev);
190 }
191 ret = ieee80211_wx_set_mode(priv->ieee80211, a, wrqu, b);
192
193 up(&priv->wx_sem);
194 return ret;
195}
196
197/* YJ,add,080819,for hidden ap */
198struct iw_range_with_scan_capa {
199 /* Informative stuff (to choose between different interface) */
200
201 __u32 throughput; /* To give an idea... */
202
203 /* In theory this value should be the maximum benchmarked
204 * TCP/IP throughput, because with most of these devices the
205 * bit rate is meaningless (overhead an co) to estimate how
206 * fast the connection will go and pick the fastest one.
207 * I suggest people to play with Netperf or any benchmark...
208 */
209
210 /* NWID (or domain id) */
211 __u32 min_nwid; /* Minimal NWID we are able to set */
212 __u32 max_nwid; /* Maximal NWID we are able to set */
213
214 /* Old Frequency (backward compat - moved lower ) */
215 __u16 old_num_channels;
216 __u8 old_num_frequency;
217
218 /* Scan capabilities */
219 __u8 scan_capa;
220};
221/* YJ,add,080819,for hidden ap */
222
223
224static int rtl8180_wx_get_range(struct net_device *dev,
225 struct iw_request_info *info,
226 union iwreq_data *wrqu, char *extra)
227{
228 struct iw_range *range = (struct iw_range *)extra;
229 struct r8180_priv *priv = ieee80211_priv(dev);
230 u16 val;
231 int i;
232
233 wrqu->data.length = sizeof(*range);
234 memset(range, 0, sizeof(*range));
235
236 /* Let's try to keep this struct in the same order as in
237 * linux/include/wireless.h
238 */
239
240 /* TODO: See what values we can set, and remove the ones we can't
241 * set, or fill them with some default data.
242 */
243
244 /* ~5 Mb/s real (802.11b) */
245 range->throughput = 5 * 1000 * 1000;
246
247 /* TODO: Not used in 802.11b? */
248/* range->min_nwid; */ /* Minimal NWID we are able to set */
249 /* TODO: Not used in 802.11b? */
250/* range->max_nwid; */ /* Maximal NWID we are able to set */
251
252 /* Old Frequency (backward compat - moved lower ) */
253/* range->old_num_channels; */
254/* range->old_num_frequency; */
255/* range->old_freq[6]; */ /* Filler to keep "version" at the same offset */
256 if (priv->rf_set_sens != NULL)
257 range->sensitivity = priv->max_sens; /* signal level threshold range */
258
259 range->max_qual.qual = 100;
260 /* TODO: Find real max RSSI and stick here */
261 range->max_qual.level = 0;
262 range->max_qual.noise = -98;
263 range->max_qual.updated = 7; /* Updated all three */
264
265 range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
266 /* TODO: Find real 'good' to 'bad' threshold value for RSSI */
267 range->avg_qual.level = 20 + -98;
268 range->avg_qual.noise = 0;
269 range->avg_qual.updated = 7; /* Updated all three */
270
271 range->num_bitrates = RATE_COUNT;
272
273 for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++)
274 range->bitrate[i] = rtl8180_rates[i];
275
276 range->min_frag = MIN_FRAG_THRESHOLD;
277 range->max_frag = MAX_FRAG_THRESHOLD;
278
279 range->pm_capa = 0;
280
281 range->we_version_compiled = WIRELESS_EXT;
282 range->we_version_source = 16;
283
284 range->num_channels = 14;
285
286 for (i = 0, val = 0; i < 14; i++) {
287
288 /* Include only legal frequencies for some countries */
289 if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
290 range->freq[val].i = i + 1;
291 range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
292 range->freq[val].e = 1;
293 val++;
294 } else {
295 /* FIXME: do we need to set anything for channels */
296 /* we don't use ? */
297 }
298
299 if (val == IW_MAX_FREQUENCIES)
300 break;
301 }
302
303 range->num_frequency = val;
304 range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
305 IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
306
307 return 0;
308}
309
310
311static int r8180_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
312 union iwreq_data *wrqu, char *b)
313{
314 struct r8180_priv *priv = ieee80211_priv(dev);
315 int ret;
316 struct ieee80211_device *ieee = priv->ieee80211;
317
318
319 if (priv->ieee80211->bHwRadioOff)
320 return 0;
321
322 if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
323 struct iw_scan_req *req = (struct iw_scan_req *)b;
324 if (req->essid_len) {
325 ieee->current_network.ssid_len = req->essid_len;
326 memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
327 }
328 }
329
330 down(&priv->wx_sem);
331 if (priv->up) {
332 priv->ieee80211->actscanning = true;
333 if (priv->bInactivePs && (priv->ieee80211->state != IEEE80211_LINKED)) {
334 IPSLeave(dev);
335 ieee80211_softmac_ips_scan_syncro(priv->ieee80211);
336 ret = 0;
337 } else {
338 /* prevent scan in BusyTraffic */
339 /* FIXME: Need to consider last scan time */
340 if ((priv->link_detect.b_busy_traffic) && (true)) {
341 ret = 0;
342 printk("Now traffic is busy, please try later!\n");
343 } else
344 /* prevent scan in BusyTraffic,end */
345 ret = ieee80211_wx_set_scan(priv->ieee80211, a, wrqu, b);
346 }
347 } else
348 ret = -1;
349
350 up(&priv->wx_sem);
351
352 return ret;
353}
354
355
356static int r8180_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
357 union iwreq_data *wrqu, char *b)
358{
359
360 int ret;
361 struct r8180_priv *priv = ieee80211_priv(dev);
362
363 down(&priv->wx_sem);
364 if (priv->up)
365 ret = ieee80211_wx_get_scan(priv->ieee80211, a, wrqu, b);
366 else
367 ret = -1;
368
369 up(&priv->wx_sem);
370 return ret;
371}
372
373
374static int r8180_wx_set_essid(struct net_device *dev,
375 struct iw_request_info *a,
376 union iwreq_data *wrqu, char *b)
377{
378 struct r8180_priv *priv = ieee80211_priv(dev);
379
380 int ret;
381
382 if (priv->ieee80211->bHwRadioOff)
383 return 0;
384
385 down(&priv->wx_sem);
386 if (priv->bInactivePs)
387 IPSLeave(dev);
388
389 ret = ieee80211_wx_set_essid(priv->ieee80211, a, wrqu, b);
390
391 up(&priv->wx_sem);
392 return ret;
393}
394
395
396static int r8180_wx_get_essid(struct net_device *dev,
397 struct iw_request_info *a,
398 union iwreq_data *wrqu, char *b)
399{
400 int ret;
401 struct r8180_priv *priv = ieee80211_priv(dev);
402
403 down(&priv->wx_sem);
404
405 ret = ieee80211_wx_get_essid(priv->ieee80211, a, wrqu, b);
406
407 up(&priv->wx_sem);
408
409 return ret;
410}
411
412
413static int r8180_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
414 union iwreq_data *wrqu, char *b)
415{
416 int ret;
417 struct r8180_priv *priv = ieee80211_priv(dev);
418
419
420 if (priv->ieee80211->bHwRadioOff)
421 return 0;
422
423 down(&priv->wx_sem);
424
425 ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b);
426
427 up(&priv->wx_sem);
428 return ret;
429}
430
431
432static int r8180_wx_get_name(struct net_device *dev,
433 struct iw_request_info *info,
434 union iwreq_data *wrqu, char *extra)
435{
436 struct r8180_priv *priv = ieee80211_priv(dev);
437 return ieee80211_wx_get_name(priv->ieee80211, info, wrqu, extra);
438}
439
440static int r8180_wx_set_frag(struct net_device *dev,
441 struct iw_request_info *info,
442 union iwreq_data *wrqu, char *extra)
443{
444 struct r8180_priv *priv = ieee80211_priv(dev);
445
446 if (priv->ieee80211->bHwRadioOff)
447 return 0;
448
449 if (wrqu->frag.disabled)
450 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
451 else {
452 if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
453 wrqu->frag.value > MAX_FRAG_THRESHOLD)
454 return -EINVAL;
455
456 priv->ieee80211->fts = wrqu->frag.value & ~0x1;
457 }
458
459 return 0;
460}
461
462
463static int r8180_wx_get_frag(struct net_device *dev,
464 struct iw_request_info *info,
465 union iwreq_data *wrqu, char *extra)
466{
467 struct r8180_priv *priv = ieee80211_priv(dev);
468
469 wrqu->frag.value = priv->ieee80211->fts;
470 wrqu->frag.fixed = 0; /* no auto select */
471 wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
472
473 return 0;
474}
475
476
477static int r8180_wx_set_wap(struct net_device *dev,
478 struct iw_request_info *info,
479 union iwreq_data *awrq, char *extra)
480{
481 int ret;
482 struct r8180_priv *priv = ieee80211_priv(dev);
483
484 if (priv->ieee80211->bHwRadioOff)
485 return 0;
486
487 down(&priv->wx_sem);
488
489 ret = ieee80211_wx_set_wap(priv->ieee80211, info, awrq, extra);
490
491 up(&priv->wx_sem);
492 return ret;
493
494}
495
496
497static int r8180_wx_get_wap(struct net_device *dev,
498 struct iw_request_info *info,
499 union iwreq_data *wrqu, char *extra)
500{
501 struct r8180_priv *priv = ieee80211_priv(dev);
502
503 return ieee80211_wx_get_wap(priv->ieee80211, info, wrqu, extra);
504}
505
506
507static int r8180_wx_set_enc(struct net_device *dev,
508 struct iw_request_info *info,
509 union iwreq_data *wrqu, char *key)
510{
511 struct r8180_priv *priv = ieee80211_priv(dev);
512 int ret;
513
514 if (priv->ieee80211->bHwRadioOff)
515 return 0;
516
517
518 down(&priv->wx_sem);
519
520 if (priv->hw_wep)
521 ret = r8180_wx_set_key(dev, info, wrqu, key);
522 else {
523 DMESG("Setting SW wep key");
524 ret = ieee80211_wx_set_encode(priv->ieee80211, info, wrqu, key);
525 }
526
527 up(&priv->wx_sem);
528 return ret;
529}
530
531
532static int r8180_wx_get_enc(struct net_device *dev,
533 struct iw_request_info *info,
534 union iwreq_data *wrqu, char *key)
535{
536 struct r8180_priv *priv = ieee80211_priv(dev);
537
538 return ieee80211_wx_get_encode(priv->ieee80211, info, wrqu, key);
539}
540
541
542static int r8180_wx_set_scan_type(struct net_device *dev,
543 struct iw_request_info *aa,
544 union iwreq_data *wrqu, char *p)
545{
546
547 struct r8180_priv *priv = ieee80211_priv(dev);
548 int *parms = (int *)p;
549 int mode = parms[0];
550
551 if (priv->ieee80211->bHwRadioOff)
552 return 0;
553
554 priv->ieee80211->active_scan = mode;
555
556 return 1;
557}
558
559static int r8180_wx_set_retry(struct net_device *dev,
560 struct iw_request_info *info,
561 union iwreq_data *wrqu, char *extra)
562{
563 struct r8180_priv *priv = ieee80211_priv(dev);
564 int err = 0;
565
566 if (priv->ieee80211->bHwRadioOff)
567 return 0;
568
569 down(&priv->wx_sem);
570
571 if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
572 wrqu->retry.disabled) {
573 err = -EINVAL;
574 goto exit;
575 }
576 if (!(wrqu->retry.flags & IW_RETRY_LIMIT)) {
577 err = -EINVAL;
578 goto exit;
579 }
580
581 if (wrqu->retry.value > R8180_MAX_RETRY) {
582 err = -EINVAL;
583 goto exit;
584 }
585 if (wrqu->retry.flags & IW_RETRY_MAX) {
586 priv->retry_rts = wrqu->retry.value;
587 DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
588
589 } else {
590 priv->retry_data = wrqu->retry.value;
591 DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
592 }
593
594 /* FIXME !
595 * We might try to write directly the TX config register
596 * or to restart just the (R)TX process.
597 * I'm unsure if whole reset is really needed
598 */
599
600 rtl8180_commit(dev);
601exit:
602 up(&priv->wx_sem);
603
604 return err;
605}
606
607static int r8180_wx_get_retry(struct net_device *dev,
608 struct iw_request_info *info,
609 union iwreq_data *wrqu, char *extra)
610{
611 struct r8180_priv *priv = ieee80211_priv(dev);
612
613
614 wrqu->retry.disabled = 0; /* can't be disabled */
615
616 if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
617 IW_RETRY_LIFETIME)
618 return -EINVAL;
619
620 if (wrqu->retry.flags & IW_RETRY_MAX) {
621 wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
622 wrqu->retry.value = priv->retry_rts;
623 } else {
624 wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MIN;
625 wrqu->retry.value = priv->retry_data;
626 }
627
628 return 0;
629}
630
631static int r8180_wx_get_sens(struct net_device *dev,
632 struct iw_request_info *info,
633 union iwreq_data *wrqu, char *extra)
634{
635 struct r8180_priv *priv = ieee80211_priv(dev);
636 if (priv->rf_set_sens == NULL)
637 return -1; /* we have not this support for this radio */
638 wrqu->sens.value = priv->sens;
639 return 0;
640}
641
642
643static int r8180_wx_set_sens(struct net_device *dev,
644 struct iw_request_info *info,
645 union iwreq_data *wrqu, char *extra)
646{
647
648 struct r8180_priv *priv = ieee80211_priv(dev);
649
650 short err = 0;
651
652 if (priv->ieee80211->bHwRadioOff)
653 return 0;
654
655 down(&priv->wx_sem);
656 if (priv->rf_set_sens == NULL) {
657 err = -1; /* we have not this support for this radio */
658 goto exit;
659 }
660 if (priv->rf_set_sens(dev, wrqu->sens.value) == 0)
661 priv->sens = wrqu->sens.value;
662 else
663 err = -EINVAL;
664
665exit:
666 up(&priv->wx_sem);
667
668 return err;
669}
670
671
672static int r8180_wx_set_rawtx(struct net_device *dev,
673 struct iw_request_info *info,
674 union iwreq_data *wrqu, char *extra)
675{
676 struct r8180_priv *priv = ieee80211_priv(dev);
677 int ret;
678
679 if (priv->ieee80211->bHwRadioOff)
680 return 0;
681
682 down(&priv->wx_sem);
683
684 ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra);
685
686 up(&priv->wx_sem);
687
688 return ret;
689
690}
691
692static int r8180_wx_get_power(struct net_device *dev,
693 struct iw_request_info *info,
694 union iwreq_data *wrqu, char *extra)
695{
696 int ret;
697 struct r8180_priv *priv = ieee80211_priv(dev);
698
699 down(&priv->wx_sem);
700
701 ret = ieee80211_wx_get_power(priv->ieee80211, info, wrqu, extra);
702
703 up(&priv->wx_sem);
704
705 return ret;
706}
707
708static int r8180_wx_set_power(struct net_device *dev,
709 struct iw_request_info *info,
710 union iwreq_data *wrqu, char *extra)
711{
712 int ret;
713 struct r8180_priv *priv = ieee80211_priv(dev);
714
715
716 if (priv->ieee80211->bHwRadioOff)
717 return 0;
718
719 down(&priv->wx_sem);
720 printk("=>>>>>>>>>>=============================>set power:%d, %d!\n", wrqu->power.disabled, wrqu->power.flags);
721 if (wrqu->power.disabled == 0) {
722 wrqu->power.flags |= IW_POWER_ALL_R;
723 wrqu->power.flags |= IW_POWER_TIMEOUT;
724 wrqu->power.value = 1000;
725 }
726
727 ret = ieee80211_wx_set_power(priv->ieee80211, info, wrqu, extra);
728
729 up(&priv->wx_sem);
730
731 return ret;
732}
733
734static int r8180_wx_set_rts(struct net_device *dev,
735 struct iw_request_info *info,
736 union iwreq_data *wrqu, char *extra)
737{
738 struct r8180_priv *priv = ieee80211_priv(dev);
739
740
741 if (priv->ieee80211->bHwRadioOff)
742 return 0;
743
744 if (wrqu->rts.disabled)
745 priv->rts = DEFAULT_RTS_THRESHOLD;
746 else {
747 if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
748 wrqu->rts.value > MAX_RTS_THRESHOLD)
749 return -EINVAL;
750
751 priv->rts = wrqu->rts.value;
752 }
753
754 return 0;
755}
756static int r8180_wx_get_rts(struct net_device *dev,
757 struct iw_request_info *info,
758 union iwreq_data *wrqu, char *extra)
759{
760 struct r8180_priv *priv = ieee80211_priv(dev);
761
762
763
764 wrqu->rts.value = priv->rts;
765 wrqu->rts.fixed = 0; /* no auto select */
766 wrqu->rts.disabled = (wrqu->rts.value == 0);
767
768 return 0;
769}
770static int dummy(struct net_device *dev, struct iw_request_info *a,
771 union iwreq_data *wrqu, char *b)
772{
773 return -1;
774}
775
776static int r8180_wx_get_iwmode(struct net_device *dev,
777 struct iw_request_info *info,
778 union iwreq_data *wrqu, char *extra)
779{
780 struct r8180_priv *priv = ieee80211_priv(dev);
781 struct ieee80211_device *ieee;
782 int ret = 0;
783
784
785
786 down(&priv->wx_sem);
787
788 ieee = priv->ieee80211;
789
790 strcpy(extra, "802.11");
791 if (ieee->modulation & IEEE80211_CCK_MODULATION) {
792 strcat(extra, "b");
793 if (ieee->modulation & IEEE80211_OFDM_MODULATION)
794 strcat(extra, "/g");
795 } else if (ieee->modulation & IEEE80211_OFDM_MODULATION)
796 strcat(extra, "g");
797
798 up(&priv->wx_sem);
799
800 return ret;
801}
802static int r8180_wx_set_iwmode(struct net_device *dev,
803 struct iw_request_info *info,
804 union iwreq_data *wrqu, char *extra)
805{
806 struct r8180_priv *priv = ieee80211_priv(dev);
807 struct ieee80211_device *ieee = priv->ieee80211;
808 int *param = (int *)extra;
809 int ret = 0;
810 int modulation = 0, mode = 0;
811
812
813 if (priv->ieee80211->bHwRadioOff)
814 return 0;
815
816 down(&priv->wx_sem);
817
818 if (*param == 1) {
819 modulation |= IEEE80211_CCK_MODULATION;
820 mode = IEEE_B;
821 printk(KERN_INFO "B mode!\n");
822 } else if (*param == 2) {
823 modulation |= IEEE80211_OFDM_MODULATION;
824 mode = IEEE_G;
825 printk(KERN_INFO "G mode!\n");
826 } else if (*param == 3) {
827 modulation |= IEEE80211_CCK_MODULATION;
828 modulation |= IEEE80211_OFDM_MODULATION;
829 mode = IEEE_B|IEEE_G;
830 printk(KERN_INFO "B/G mode!\n");
831 }
832
833 if (ieee->proto_started) {
834 ieee80211_stop_protocol(ieee);
835 ieee->mode = mode;
836 ieee->modulation = modulation;
837 ieee80211_start_protocol(ieee);
838 } else {
839 ieee->mode = mode;
840 ieee->modulation = modulation;
841 }
842
843 up(&priv->wx_sem);
844
845 return ret;
846}
847static int r8180_wx_get_preamble(struct net_device *dev,
848 struct iw_request_info *info,
849 union iwreq_data *wrqu, char *extra)
850{
851 struct r8180_priv *priv = ieee80211_priv(dev);
852
853
854
855 down(&priv->wx_sem);
856
857
858
859 *extra = (char) priv->plcp_preamble_mode; /* 0:auto 1:short 2:long */
860 up(&priv->wx_sem);
861
862 return 0;
863}
864static int r8180_wx_set_preamble(struct net_device *dev,
865 struct iw_request_info *info,
866 union iwreq_data *wrqu, char *extra)
867{
868 struct r8180_priv *priv = ieee80211_priv(dev);
869 int ret = 0;
870
871
872 if (priv->ieee80211->bHwRadioOff)
873 return 0;
874
875 down(&priv->wx_sem);
876 if (*extra < 0 || *extra > 2)
877 ret = -1;
878 else
879 priv->plcp_preamble_mode = *((short *)extra);
880
881
882
883 up(&priv->wx_sem);
884
885 return ret;
886}
887static int r8180_wx_get_siglevel(struct net_device *dev,
888 struct iw_request_info *info,
889 union iwreq_data *wrqu, char *extra)
890{
891 struct r8180_priv *priv = ieee80211_priv(dev);
892 int ret = 0;
893
894
895
896 down(&priv->wx_sem);
897 /* Modify by hikaru 6.5 */
898 *((int *)extra) = priv->wstats.qual.level;/*for interface test ,it should be the priv->wstats.qual.level; */
899
900
901
902 up(&priv->wx_sem);
903
904 return ret;
905}
906static int r8180_wx_get_sigqual(struct net_device *dev,
907 struct iw_request_info *info,
908 union iwreq_data *wrqu, char *extra)
909{
910 struct r8180_priv *priv = ieee80211_priv(dev);
911 int ret = 0;
912
913
914
915 down(&priv->wx_sem);
916 /* Modify by hikaru 6.5 */
917 *((int *)extra) = priv->wstats.qual.qual;/* for interface test ,it should be the priv->wstats.qual.qual; */
918
919
920
921 up(&priv->wx_sem);
922
923 return ret;
924}
925static int r8180_wx_reset_stats(struct net_device *dev,
926 struct iw_request_info *info,
927 union iwreq_data *wrqu, char *extra)
928{
929 struct r8180_priv *priv = ieee80211_priv(dev);
930 down(&priv->wx_sem);
931
932 priv->stats.txrdu = 0;
933 priv->stats.rxrdu = 0;
934 priv->stats.rxnolast = 0;
935 priv->stats.rxnodata = 0;
936 priv->stats.rxnopointer = 0;
937 priv->stats.txnperr = 0;
938 priv->stats.txresumed = 0;
939 priv->stats.rxerr = 0;
940 priv->stats.rxoverflow = 0;
941 priv->stats.rxint = 0;
942
943 priv->stats.txnpokint = 0;
944 priv->stats.txhpokint = 0;
945 priv->stats.txhperr = 0;
946 priv->stats.ints = 0;
947 priv->stats.shints = 0;
948 priv->stats.txoverflow = 0;
949 priv->stats.rxdmafail = 0;
950 priv->stats.txbeacon = 0;
951 priv->stats.txbeaconerr = 0;
952 priv->stats.txlpokint = 0;
953 priv->stats.txlperr = 0;
954 priv->stats.txretry = 0;/* 20060601 */
955 priv->stats.rxcrcerrmin = 0 ;
956 priv->stats.rxcrcerrmid = 0;
957 priv->stats.rxcrcerrmax = 0;
958 priv->stats.rxicverr = 0;
959
960 up(&priv->wx_sem);
961
962 return 0;
963
964}
965static int r8180_wx_radio_on(struct net_device *dev,
966 struct iw_request_info *info,
967 union iwreq_data *wrqu, char *extra)
968{
969 struct r8180_priv *priv = ieee80211_priv(dev);
970
971 if (priv->ieee80211->bHwRadioOff)
972 return 0;
973
974
975 down(&priv->wx_sem);
976 priv->rf_wakeup(dev);
977
978 up(&priv->wx_sem);
979
980 return 0;
981
982}
983
984static int r8180_wx_radio_off(struct net_device *dev,
985 struct iw_request_info *info,
986 union iwreq_data *wrqu, char *extra)
987{
988 struct r8180_priv *priv = ieee80211_priv(dev);
989
990 if (priv->ieee80211->bHwRadioOff)
991 return 0;
992
993
994 down(&priv->wx_sem);
995 priv->rf_sleep(dev);
996
997 up(&priv->wx_sem);
998
999 return 0;
1000
1001}
1002static int r8180_wx_get_channelplan(struct net_device *dev,
1003 struct iw_request_info *info,
1004 union iwreq_data *wrqu, char *extra)
1005{
1006 struct r8180_priv *priv = ieee80211_priv(dev);
1007
1008
1009
1010 down(&priv->wx_sem);
1011 *extra = priv->channel_plan;
1012
1013
1014
1015 up(&priv->wx_sem);
1016
1017 return 0;
1018}
1019static int r8180_wx_set_channelplan(struct net_device *dev,
1020 struct iw_request_info *info,
1021 union iwreq_data *wrqu, char *extra)
1022{
1023 struct r8180_priv *priv = ieee80211_priv(dev);
1024 int *val = (int *)extra;
1025 int i;
1026 printk("-----in fun %s\n", __func__);
1027
1028 if (priv->ieee80211->bHwRadioOff)
1029 return 0;
1030
1031 /* unsigned long flags; */
1032 down(&priv->wx_sem);
1033 if (default_channel_plan[*val].len != 0) {
1034 priv->channel_plan = *val;
1035 /* Clear old channel map 8 */
1036 for (i = 1; i <= MAX_CHANNEL_NUMBER; i++)
1037 GET_DOT11D_INFO(priv->ieee80211)->channel_map[i] = 0;
1038
1039 /* Set new channel map */
1040 for (i = 1; i <= default_channel_plan[*val].len; i++)
1041 GET_DOT11D_INFO(priv->ieee80211)->channel_map[default_channel_plan[*val].channel[i-1]] = 1;
1042
1043 }
1044 up(&priv->wx_sem);
1045
1046 return 0;
1047}
1048
1049static int r8180_wx_get_version(struct net_device *dev,
1050 struct iw_request_info *info,
1051 union iwreq_data *wrqu, char *extra)
1052{
1053 struct r8180_priv *priv = ieee80211_priv(dev);
1054 /* struct ieee80211_device *ieee; */
1055
1056 down(&priv->wx_sem);
1057 strcpy(extra, "1020.0808");
1058 up(&priv->wx_sem);
1059
1060 return 0;
1061}
1062
1063/* added by amy 080818 */
1064/*receive datarate from user typing valid rate is from 2 to 108 (1 - 54M), if input 0, return to normal rate adaptive. */
1065static int r8180_wx_set_forcerate(struct net_device *dev,
1066 struct iw_request_info *info,
1067 union iwreq_data *wrqu, char *extra)
1068{
1069 struct r8180_priv *priv = ieee80211_priv(dev);
1070 u8 forcerate = *extra;
1071
1072 down(&priv->wx_sem);
1073
1074 printk("==============>%s(): forcerate is %d\n", __func__, forcerate);
1075 if ((forcerate == 2) || (forcerate == 4) || (forcerate == 11) || (forcerate == 22) || (forcerate == 12) ||
1076 (forcerate == 18) || (forcerate == 24) || (forcerate == 36) || (forcerate == 48) || (forcerate == 72) ||
1077 (forcerate == 96) || (forcerate == 108)) {
1078 priv->ForcedDataRate = 1;
1079 priv->ieee80211->rate = forcerate * 5;
1080 } else if (forcerate == 0) {
1081 priv->ForcedDataRate = 0;
1082 printk("OK! return rate adaptive\n");
1083 } else
1084 printk("ERR: wrong rate\n");
1085 up(&priv->wx_sem);
1086 return 0;
1087}
1088
1089static int r8180_wx_set_enc_ext(struct net_device *dev,
1090 struct iw_request_info *info,
1091 union iwreq_data *wrqu, char *extra)
1092{
1093
1094 struct r8180_priv *priv = ieee80211_priv(dev);
1095
1096 int ret = 0;
1097
1098 if (priv->ieee80211->bHwRadioOff)
1099 return 0;
1100
1101 down(&priv->wx_sem);
1102 ret = ieee80211_wx_set_encode_ext(priv->ieee80211, info, wrqu, extra);
1103 up(&priv->wx_sem);
1104 return ret;
1105
1106}
1107static int r8180_wx_set_auth(struct net_device *dev,
1108 struct iw_request_info *info,
1109 union iwreq_data *wrqu, char *extra)
1110{
1111 struct r8180_priv *priv = ieee80211_priv(dev);
1112 int ret = 0;
1113
1114 if (priv->ieee80211->bHwRadioOff)
1115 return 0;
1116
1117 down(&priv->wx_sem);
1118 ret = ieee80211_wx_set_auth(priv->ieee80211, info, &wrqu->param, extra);
1119 up(&priv->wx_sem);
1120 return ret;
1121}
1122
1123static int r8180_wx_set_mlme(struct net_device *dev,
1124 struct iw_request_info *info,
1125 union iwreq_data *wrqu, char *extra)
1126{
1127 int ret = 0;
1128 struct r8180_priv *priv = ieee80211_priv(dev);
1129
1130
1131 if (priv->ieee80211->bHwRadioOff)
1132 return 0;
1133
1134
1135 down(&priv->wx_sem);
1136#if 1
1137 ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra);
1138#endif
1139 up(&priv->wx_sem);
1140 return ret;
1141}
1142static int r8180_wx_set_gen_ie(struct net_device *dev,
1143 struct iw_request_info *info,
1144 union iwreq_data *wrqu, char *extra)
1145{
1146 int ret = 0;
1147 struct r8180_priv *priv = ieee80211_priv(dev);
1148
1149
1150 if (priv->ieee80211->bHwRadioOff)
1151 return 0;
1152
1153 down(&priv->wx_sem);
1154#if 1
1155 ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, wrqu->data.length);
1156#endif
1157 up(&priv->wx_sem);
1158 return ret;
1159
1160
1161}
1162
1163static const iw_handler r8180_wx_handlers[] = {
1164 IW_HANDLER(SIOCGIWNAME, r8180_wx_get_name),
1165 IW_HANDLER(SIOCSIWNWID, dummy),
1166 IW_HANDLER(SIOCGIWNWID, dummy),
1167 IW_HANDLER(SIOCSIWFREQ, r8180_wx_set_freq),
1168 IW_HANDLER(SIOCGIWFREQ, r8180_wx_get_freq),
1169 IW_HANDLER(SIOCSIWMODE, r8180_wx_set_mode),
1170 IW_HANDLER(SIOCGIWMODE, r8180_wx_get_mode),
1171 IW_HANDLER(SIOCSIWSENS, r8180_wx_set_sens),
1172 IW_HANDLER(SIOCGIWSENS, r8180_wx_get_sens),
1173 IW_HANDLER(SIOCGIWRANGE, rtl8180_wx_get_range),
1174 IW_HANDLER(SIOCSIWSPY, dummy),
1175 IW_HANDLER(SIOCGIWSPY, dummy),
1176 IW_HANDLER(SIOCSIWAP, r8180_wx_set_wap),
1177 IW_HANDLER(SIOCGIWAP, r8180_wx_get_wap),
1178 IW_HANDLER(SIOCSIWMLME, r8180_wx_set_mlme),
1179 IW_HANDLER(SIOCGIWAPLIST, dummy), /* deprecated */
1180 IW_HANDLER(SIOCSIWSCAN, r8180_wx_set_scan),
1181 IW_HANDLER(SIOCGIWSCAN, r8180_wx_get_scan),
1182 IW_HANDLER(SIOCSIWESSID, r8180_wx_set_essid),
1183 IW_HANDLER(SIOCGIWESSID, r8180_wx_get_essid),
1184 IW_HANDLER(SIOCSIWNICKN, dummy),
1185 IW_HANDLER(SIOCGIWNICKN, dummy),
1186 IW_HANDLER(SIOCSIWRATE, r8180_wx_set_rate),
1187 IW_HANDLER(SIOCGIWRATE, r8180_wx_get_rate),
1188 IW_HANDLER(SIOCSIWRTS, r8180_wx_set_rts),
1189 IW_HANDLER(SIOCGIWRTS, r8180_wx_get_rts),
1190 IW_HANDLER(SIOCSIWFRAG, r8180_wx_set_frag),
1191 IW_HANDLER(SIOCGIWFRAG, r8180_wx_get_frag),
1192 IW_HANDLER(SIOCSIWTXPOW, dummy),
1193 IW_HANDLER(SIOCGIWTXPOW, dummy),
1194 IW_HANDLER(SIOCSIWRETRY, r8180_wx_set_retry),
1195 IW_HANDLER(SIOCGIWRETRY, r8180_wx_get_retry),
1196 IW_HANDLER(SIOCSIWENCODE, r8180_wx_set_enc),
1197 IW_HANDLER(SIOCGIWENCODE, r8180_wx_get_enc),
1198 IW_HANDLER(SIOCSIWPOWER, r8180_wx_set_power),
1199 IW_HANDLER(SIOCGIWPOWER, r8180_wx_get_power),
1200 IW_HANDLER(SIOCSIWGENIE, r8180_wx_set_gen_ie),
1201 IW_HANDLER(SIOCSIWAUTH, r8180_wx_set_auth),
1202 IW_HANDLER(SIOCSIWENCODEEXT, r8180_wx_set_enc_ext),
1203};
1204
1205static const struct iw_priv_args r8180_private_args[] = {
1206 {
1207 SIOCIWFIRSTPRIV + 0x0,
1208 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "badcrc"
1209 },
1210 { SIOCIWFIRSTPRIV + 0x1,
1211 0, 0, "dummy"
1212
1213 },
1214 {
1215 SIOCIWFIRSTPRIV + 0x2,
1216 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "beaconint"
1217 },
1218 { SIOCIWFIRSTPRIV + 0x3,
1219 0, 0, "dummy"
1220
1221 },
1222 {
1223 SIOCIWFIRSTPRIV + 0x4,
1224 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
1225
1226 },
1227 { SIOCIWFIRSTPRIV + 0x5,
1228 0, 0, "dummy"
1229
1230 },
1231 {
1232 SIOCIWFIRSTPRIV + 0x6,
1233 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx"
1234
1235 },
1236 { SIOCIWFIRSTPRIV + 0x7,
1237 0, 0, "dummy"
1238
1239 },
1240 {
1241 SIOCIWFIRSTPRIV + 0x8,
1242 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setiwmode"
1243 },
1244 {
1245 SIOCIWFIRSTPRIV + 0x9,
1246 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 32, "getiwmode"
1247 },
1248 {
1249 SIOCIWFIRSTPRIV + 0xA,
1250 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setpreamble"
1251 },
1252 {
1253 SIOCIWFIRSTPRIV + 0xB,
1254 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getpreamble"
1255 },
1256 { SIOCIWFIRSTPRIV + 0xC,
1257 0, 0, "dummy"
1258 },
1259 {
1260 SIOCIWFIRSTPRIV + 0xD,
1261 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getrssi"
1262 },
1263 { SIOCIWFIRSTPRIV + 0xE,
1264 0, 0, "dummy"
1265 },
1266 {
1267 SIOCIWFIRSTPRIV + 0xF,
1268 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getlinkqual"
1269 },
1270 {
1271 SIOCIWFIRSTPRIV + 0x10,
1272 0, 0, "resetstats"
1273 },
1274 {
1275 SIOCIWFIRSTPRIV + 0x11,
1276 0, 0, "dummy"
1277 },
1278 {
1279 SIOCIWFIRSTPRIV + 0x12,
1280 0, 0, "radioon"
1281 },
1282 {
1283 SIOCIWFIRSTPRIV + 0x13,
1284 0, 0, "radiooff"
1285 },
1286 {
1287 SIOCIWFIRSTPRIV + 0x14,
1288 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setchannel"
1289 },
1290 {
1291 SIOCIWFIRSTPRIV + 0x15,
1292 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getchannel"
1293 },
1294 {
1295 SIOCIWFIRSTPRIV + 0x16,
1296 0, 0, "dummy"
1297 },
1298 {
1299 SIOCIWFIRSTPRIV + 0x17,
1300 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 32, "getversion"
1301 },
1302 {
1303 SIOCIWFIRSTPRIV + 0x18,
1304 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setrate"
1305 },
1306};
1307
1308
1309static iw_handler r8180_private_handler[] = {
1310 r8180_wx_set_crcmon, /*SIOCIWSECONDPRIV*/
1311 dummy,
1312 r8180_wx_set_beaconinterval,
1313 dummy,
1314 /* r8180_wx_set_monitor_type, */
1315 r8180_wx_set_scan_type,
1316 dummy,
1317 r8180_wx_set_rawtx,
1318 dummy,
1319 r8180_wx_set_iwmode,
1320 r8180_wx_get_iwmode,
1321 r8180_wx_set_preamble,
1322 r8180_wx_get_preamble,
1323 dummy,
1324 r8180_wx_get_siglevel,
1325 dummy,
1326 r8180_wx_get_sigqual,
1327 r8180_wx_reset_stats,
1328 dummy,/* r8180_wx_get_stats */
1329 r8180_wx_radio_on,
1330 r8180_wx_radio_off,
1331 r8180_wx_set_channelplan,
1332 r8180_wx_get_channelplan,
1333 dummy,
1334 r8180_wx_get_version,
1335 r8180_wx_set_forcerate,
1336};
1337
1338static inline int is_same_network(struct ieee80211_network *src,
1339 struct ieee80211_network *dst,
1340 struct ieee80211_device *ieee)
1341{
1342 /* A network is only a duplicate if the channel, BSSID, ESSID
1343 * and the capability field (in particular IBSS and BSS) all match.
1344 * We treat all <hidden> with the same BSSID and channel
1345 * as one network
1346 */
1347 if (src->channel != dst->channel)
1348 return 0;
1349
1350 if (memcmp(src->bssid, dst->bssid, ETH_ALEN) != 0)
1351 return 0;
1352
1353 if (ieee->iw_mode != IW_MODE_INFRA) {
1354 if (src->ssid_len != dst->ssid_len)
1355 return 0;
1356 if (memcmp(src->ssid, dst->ssid, src->ssid_len) != 0)
1357 return 0;
1358 }
1359
1360 if ((src->capability & WLAN_CAPABILITY_IBSS) !=
1361 (dst->capability & WLAN_CAPABILITY_IBSS))
1362 return 0;
1363 if ((src->capability & WLAN_CAPABILITY_BSS) !=
1364 (dst->capability & WLAN_CAPABILITY_BSS))
1365 return 0;
1366
1367 return 1;
1368}
1369
1370/* WB modified to show signal to GUI on 18-01-2008 */
1371static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
1372{
1373 struct r8180_priv *priv = ieee80211_priv(dev);
1374 struct ieee80211_device *ieee = priv->ieee80211;
1375 struct iw_statistics *wstats = &priv->wstats;
1376 int tmp_level = 0;
1377 int tmp_qual = 0;
1378 int tmp_noise = 0;
1379
1380 if (ieee->state < IEEE80211_LINKED) {
1381 wstats->qual.qual = 0;
1382 wstats->qual.level = 0;
1383 wstats->qual.noise = 0;
1384 wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
1385 return wstats;
1386 }
1387
1388 tmp_level = (&ieee->current_network)->stats.signal;
1389 tmp_qual = (&ieee->current_network)->stats.signalstrength;
1390 tmp_noise = (&ieee->current_network)->stats.noise;
1391
1392 wstats->qual.level = tmp_level;
1393 wstats->qual.qual = tmp_qual;
1394 wstats->qual.noise = tmp_noise;
1395 wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
1396 return wstats;
1397}
1398
1399struct iw_handler_def r8180_wx_handlers_def = {
1400 .standard = r8180_wx_handlers,
1401 .num_standard = ARRAY_SIZE(r8180_wx_handlers),
1402 .private = r8180_private_handler,
1403 .num_private = ARRAY_SIZE(r8180_private_handler),
1404 .num_private_args = sizeof(r8180_private_args) / sizeof(struct iw_priv_args),
1405 .get_wireless_stats = r8180_get_wireless_stats,
1406 .private_args = (struct iw_priv_args *)r8180_private_args,
1407};
1408
1409
diff --git a/drivers/staging/rtl8187se/r8180_wx.h b/drivers/staging/rtl8187se/r8180_wx.h
deleted file mode 100644
index d471520ac772..000000000000
--- a/drivers/staging/rtl8187se/r8180_wx.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 This is part of rtl8180 OpenSource driver - v 0.3
3 Copyright (C) Andrea Merello 2004 <andrea.merello@gmail.com>
4 Released under the terms of GPL (General Public Licence)
5
6 Parts of this driver are based on the GPL part of the official realtek driver
7 Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
8 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
9
10 We want to thanks the Authors of such projects and the Ndiswrapper project Authors.
11*/
12
13/* this file (will) contains wireless extension handlers*/
14
15#ifndef R8180_WX_H
16#define R8180_WX_H
17#include <linux/wireless.h>
18#include "ieee80211/ieee80211.h"
19extern struct iw_handler_def r8180_wx_handlers_def;
20
21#endif
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c
deleted file mode 100644
index cc6f100814f3..000000000000
--- a/drivers/staging/rtl8187se/r8185b_init.c
+++ /dev/null
@@ -1,1464 +0,0 @@
1/*
2 * Copyright (c) Realtek Semiconductor Corp. All rights reserved.
3 *
4 * Module Name:
5 * r8185b_init.c
6 *
7 * Abstract:
8 * Hardware Initialization and Hardware IO for RTL8185B
9 *
10 * Major Change History:
11 * When Who What
12 * ---------- --------------- -------------------------------
13 * 2006-11-15 Xiong Created
14 *
15 * Notes:
16 * This file is ported from RTL8185B Windows driver.
17 *
18 *
19 */
20
21/*--------------------------Include File------------------------------------*/
22#include <linux/spinlock.h>
23#include "r8180_hw.h"
24#include "r8180.h"
25#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
26#include "r8180_93cx6.h" /* Card EEPROM */
27#include "r8180_wx.h"
28#include "ieee80211/dot11d.h"
29/* #define CONFIG_RTL8180_IO_MAP */
30#define TC_3W_POLL_MAX_TRY_CNT 5
31
32static u8 MAC_REG_TABLE[][2] = {
33 /*
34 * PAGE 0:
35 * 0x34(BRSR), 0xBE(RATE_FALLBACK_CTL), 0x1E0(ARFR) would set in
36 * HwConfigureRTL8185()
37 * 0x272(RFSW_CTRL), 0x1CE(AESMSK_QC) set in InitializeAdapter8185().
38 * 0x1F0~0x1F8 set in MacConfig_85BASIC()
39 */
40 {0x08, 0xae}, {0x0a, 0x72}, {0x5b, 0x42},
41 {0x84, 0x88}, {0x85, 0x24}, {0x88, 0x54}, {0x8b, 0xb8}, {0x8c, 0x03},
42 {0x8d, 0x40}, {0x8e, 0x00}, {0x8f, 0x00}, {0x5b, 0x18}, {0x91, 0x03},
43 {0x94, 0x0F}, {0x95, 0x32},
44 {0x96, 0x00}, {0x97, 0x07}, {0xb4, 0x22}, {0xdb, 0x00},
45 {0xf0, 0x32}, {0xf1, 0x32}, {0xf2, 0x00}, {0xf3, 0x00}, {0xf4, 0x32},
46 {0xf5, 0x43}, {0xf6, 0x00}, {0xf7, 0x00}, {0xf8, 0x46}, {0xf9, 0xa4},
47 {0xfa, 0x00}, {0xfb, 0x00}, {0xfc, 0x96}, {0xfd, 0xa4}, {0xfe, 0x00},
48 {0xff, 0x00},
49
50 /*
51 * PAGE 1:
52 * For Flextronics system Logo PCIHCT failure:
53 * 0x1C4~0x1CD set no-zero value to avoid PCI configuration
54 * space 0x45[7]=1
55 */
56 {0x5e, 0x01},
57 {0x58, 0x00}, {0x59, 0x00}, {0x5a, 0x04}, {0x5b, 0x00}, {0x60, 0x24},
58 {0x61, 0x97}, {0x62, 0xF0}, {0x63, 0x09}, {0x80, 0x0F}, {0x81, 0xFF},
59 {0x82, 0xFF}, {0x83, 0x03},
60 /* lzm add 080826 */
61 {0xC4, 0x22}, {0xC5, 0x22}, {0xC6, 0x22}, {0xC7, 0x22}, {0xC8, 0x22},
62 /* lzm add 080826 */
63 {0xC9, 0x22}, {0xCA, 0x22}, {0xCB, 0x22}, {0xCC, 0x22}, {0xCD, 0x22},
64 {0xe2, 0x00},
65
66
67 /* PAGE 2: */
68 {0x5e, 0x02},
69 {0x0c, 0x04}, {0x4c, 0x30}, {0x4d, 0x08}, {0x50, 0x05}, {0x51, 0xf5},
70 {0x52, 0x04}, {0x53, 0xa0}, {0x54, 0xff}, {0x55, 0xff}, {0x56, 0xff},
71 {0x57, 0xff}, {0x58, 0x08}, {0x59, 0x08}, {0x5a, 0x08}, {0x5b, 0x08},
72 {0x60, 0x08}, {0x61, 0x08}, {0x62, 0x08}, {0x63, 0x08}, {0x64, 0x2f},
73 {0x8c, 0x3f}, {0x8d, 0x3f}, {0x8e, 0x3f},
74 {0x8f, 0x3f}, {0xc4, 0xff}, {0xc5, 0xff}, {0xc6, 0xff}, {0xc7, 0xff},
75 {0xc8, 0x00}, {0xc9, 0x00}, {0xca, 0x80}, {0xcb, 0x00},
76
77 /* PAGE 0: */
78 {0x5e, 0x00}, {0x9f, 0x03}
79 };
80
81
82static u8 ZEBRA_AGC[] = {
83 0,
84 0x7E, 0x7E, 0x7E, 0x7E, 0x7D, 0x7C, 0x7B, 0x7A, 0x79, 0x78, 0x77, 0x76,
85 0x75, 0x74, 0x73, 0x72, 0x71, 0x70, 0x6F, 0x6E, 0x6D, 0x6C, 0x6B, 0x6A,
86 0x69, 0x68, 0x67, 0x66, 0x65, 0x64, 0x63, 0x62, 0x48, 0x47, 0x46, 0x45,
87 0x44, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x08, 0x07,
88 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
90 0x0f, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x15, 0x16, 0x17, 0x17, 0x18, 0x18,
91 0x19, 0x1a, 0x1a, 0x1b, 0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e,
92 0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, 0x22, 0x22,
93 0x22, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
94 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F
95 };
96
97static u32 ZEBRA_RF_RX_GAIN_TABLE[] = {
98 0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
99 0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
100 0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
101 0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
102 0x0183, 0x0163, 0x0143, 0x0123, 0x0103
103 };
104
105static u8 OFDM_CONFIG[] = {
106 /* OFDM reg0x06[7:0]=0xFF: Enable power saving mode in RX */
107 /* OFDM reg0x3C[4]=1'b1: Enable RX power saving mode */
108 /* ofdm 0x3a = 0x7b ,(original : 0xfb) For ECS shielding room TP test */
109 /* 0x00 */
110 0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
111 0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
112 /* 0x10 */
113 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xA8, 0x26,
114 0x32, 0x33, 0x06, 0xA5, 0x6F, 0x55, 0xC8, 0xBB,
115 /* 0x20 */
116 0x0A, 0xE1, 0x2C, 0x4A, 0x86, 0x83, 0x34, 0x00,
117 0x4F, 0x24, 0x6F, 0xC2, 0x03, 0x40, 0x80, 0x00,
118 /* 0x30 */
119 0xC0, 0xC1, 0x58, 0xF1, 0x00, 0xC4, 0x90, 0x3e,
120 0xD8, 0x3C, 0x7B, 0x10, 0x10
121 };
122
123 /*---------------------------------------------------------------
124 * Hardware IO
125 * the code is ported from Windows source code
126 *---------------------------------------------------------------
127 */
128
129static u8 PlatformIORead1Byte(struct net_device *dev, u32 offset)
130{
131 return read_nic_byte(dev, offset);
132}
133
134static void PlatformIOWrite1Byte(struct net_device *dev, u32 offset, u8 data)
135{
136 write_nic_byte(dev, offset, data);
137 /*
138 * To make sure write operation is completed,
139 * 2005.11.09, by rcnjko.
140 */
141 read_nic_byte(dev, offset);
142}
143
144static void PlatformIOWrite2Byte(struct net_device *dev, u32 offset, u16 data)
145{
146 write_nic_word(dev, offset, data);
147 /*
148 * To make sure write operation is completed,
149 * 2005.11.09, by rcnjko.
150 */
151 read_nic_word(dev, offset);
152}
153
154static void PlatformIOWrite4Byte(struct net_device *dev, u32 offset, u32 data)
155{
156 if (offset == PhyAddr) {
157 /* For Base Band configuration. */
158 unsigned char cmdByte;
159 unsigned long dataBytes;
160 unsigned char idx;
161 u8 u1bTmp;
162
163 cmdByte = (u8)(data & 0x000000ff);
164 dataBytes = data>>8;
165
166 /*
167 * 071010, rcnjko:
168 * The critical section is only BB read/write race
169 * condition. Assumption:
170 * 1. We assume NO one will access BB at DIRQL, otherwise,
171 * system will crash for
172 * acquiring the spinlock in such context.
173 * 2. PlatformIOWrite4Byte() MUST NOT be recursive.
174 */
175 /* NdisAcquireSpinLock( &(pDevice->IoSpinLock) ); */
176
177 for (idx = 0; idx < 30; idx++) {
178 /* Make sure command bit is clear before access it. */
179 u1bTmp = PlatformIORead1Byte(dev, PhyAddr);
180 if ((u1bTmp & BIT7) == 0)
181 break;
182 else
183 mdelay(10);
184 }
185
186 for (idx = 0; idx < 3; idx++)
187 PlatformIOWrite1Byte(dev, offset+1+idx,
188 ((u8 *)&dataBytes)[idx]);
189
190 write_nic_byte(dev, offset, cmdByte);
191
192 /* NdisReleaseSpinLock( &(pDevice->IoSpinLock) ); */
193 } else {
194 write_nic_dword(dev, offset, data);
195 /*
196 * To make sure write operation is completed, 2005.11.09,
197 * by rcnjko.
198 */
199 read_nic_dword(dev, offset);
200 }
201}
202
203static void SetOutputEnableOfRfPins(struct net_device *dev)
204{
205 write_nic_word(dev, RFPinsEnable, 0x1bff);
206}
207
208static bool HwHSSIThreeWire(struct net_device *dev,
209 u8 *pDataBuf,
210 bool write)
211{
212 u8 TryCnt;
213 u8 u1bTmp;
214
215 /* Check if WE and RE are cleared. */
216 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
217 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
218 if ((u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0)
219 break;
220
221 udelay(10);
222 }
223 if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) {
224 netdev_err(dev,
225 "HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n",
226 u1bTmp);
227 return false;
228 }
229
230 /* RTL8187S HSSI Read/Write Function */
231 u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
232 u1bTmp |= RF_SW_CFG_SI; /* reg08[1]=1 Serial Interface(SI) */
233 write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
234
235 /* jong: HW SI read must set reg84[3]=0. */
236 u1bTmp = read_nic_byte(dev, RFPinsSelect);
237 u1bTmp &= ~BIT3;
238 write_nic_byte(dev, RFPinsSelect, u1bTmp);
239 /* Fill up data buffer for write operation. */
240
241 /* SI - reg274[3:0] : RF register's Address */
242 if (write)
243 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
244 else
245 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
246
247 /* Set up command: WE or RE. */
248 if (write)
249 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE);
250 else
251 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE);
252
253
254 /* Check if DONE is set. */
255 for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
256 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
257 if (u1bTmp & SW_3W_CMD1_DONE)
258 break;
259
260 udelay(10);
261 }
262
263 write_nic_byte(dev, SW_3W_CMD1, 0);
264
265 /* Read back data for read operation. */
266 if (!write) {
267 /* Serial Interface : reg363_362[11:0] */
268 *((u16 *)pDataBuf) = read_nic_word(dev, SI_DATA_READ);
269 *((u16 *)pDataBuf) &= 0x0FFF;
270 }
271
272 return true;
273}
274
275void RF_WriteReg(struct net_device *dev, u8 offset, u16 data)
276{
277 u16 reg = (data << 4) | (offset & 0x0f);
278 HwHSSIThreeWire(dev, (u8 *)&reg, true);
279}
280
281u16 RF_ReadReg(struct net_device *dev, u8 offset)
282{
283 u16 reg = offset & 0x0f;
284 HwHSSIThreeWire(dev, (u8 *)&reg, false);
285 return reg;
286}
287
288static u8 ReadBBPortUchar(struct net_device *dev, u32 addr)
289{
290 PlatformIOWrite4Byte(dev, PhyAddr, addr & 0xffffff7f);
291 return PlatformIORead1Byte(dev, PhyDataR);
292}
293
294/* by Owen on 04/07/14 for writing BB register successfully */
295static void WriteBBPortUchar(struct net_device *dev, u32 Data)
296{
297 PlatformIOWrite4Byte(dev, PhyAddr, Data);
298 ReadBBPortUchar(dev, Data);
299}
300
301/*
302 * Description:
303 * Perform Antenna settings with antenna diversity on 87SE.
304 * Created by Roger, 2008.01.25.
305 */
306bool SetAntennaConfig87SE(struct net_device *dev,
307 u8 DefaultAnt, /* 0: Main, 1: Aux. */
308 bool bAntDiversity) /* 1:Enable, 0: Disable. */
309{
310 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
311 bool bAntennaSwitched = true;
312 /* 0x00 = disabled, 0x80 = enabled */
313 u8 ant_diversity_offset = 0x00;
314
315 /*
316 * printk("SetAntennaConfig87SE(): DefaultAnt(%d), bAntDiversity(%d)\n",
317 * DefaultAnt, bAntDiversity);
318 */
319
320 /* Threshold for antenna diversity. */
321 write_phy_cck(dev, 0x0c, 0x09); /* Reg0c : 09 */
322
323 if (bAntDiversity) /* Enable Antenna Diversity. */
324 ant_diversity_offset = 0x80;
325
326 if (DefaultAnt == 1) { /* aux Antenna */
327 /* Mac register, aux antenna */
328 write_nic_byte(dev, ANTSEL, 0x00);
329
330 /* Config CCK RX antenna. */
331 write_phy_cck(dev, 0x11, 0xbb); /* Reg11 : bb */
332
333 /* Reg01 : 47 | ant_diversity_offset */
334 write_phy_cck(dev, 0x01, 0x47|ant_diversity_offset);
335
336 /* Config OFDM RX antenna. */
337 write_phy_ofdm(dev, 0x0D, 0x54); /* Reg0d : 54 */
338 /* Reg18 : 32 */
339 write_phy_ofdm(dev, 0x18, 0x32|ant_diversity_offset);
340 } else { /* main Antenna */
341 /* Mac register, main antenna */
342 write_nic_byte(dev, ANTSEL, 0x03);
343
344 /* Config CCK RX antenna. */
345 write_phy_cck(dev, 0x11, 0x9b); /* Reg11 : 9b */
346 /* Reg01 : 47 */
347 write_phy_cck(dev, 0x01, 0x47|ant_diversity_offset);
348
349 /* Config OFDM RX antenna. */
350 write_phy_ofdm(dev, 0x0D, 0x5c); /* Reg0d : 5c */
351 /*Reg18 : 32 */
352 write_phy_ofdm(dev, 0x18, 0x32|ant_diversity_offset);
353 }
354 priv->CurrAntennaIndex = DefaultAnt; /* Update default settings. */
355 return bAntennaSwitched;
356}
357/*
358 *--------------------------------------------------------------
359 * Hardware Initialization.
360 * the code is ported from Windows source code
361 *--------------------------------------------------------------
362 */
363
364static void ZEBRA_Config_85BASIC_HardCode(struct net_device *dev)
365{
366
367 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
368 u32 i;
369 u32 addr, data;
370 u32 u4bRegOffset, u4bRegValue;
371 u16 u4bRF23, u4bRF24;
372 u8 u1b24E;
373 int d_cut = 0;
374
375
376/*
377 *===========================================================================
378 * 87S_PCIE :: RADIOCFG.TXT
379 *===========================================================================
380 */
381
382
383 /* Page1 : reg16-reg30 */
384 RF_WriteReg(dev, 0x00, 0x013f); mdelay(1); /* switch to page1 */
385 u4bRF23 = RF_ReadReg(dev, 0x08); mdelay(1);
386 u4bRF24 = RF_ReadReg(dev, 0x09); mdelay(1);
387
388 if (u4bRF23 == 0x818 && u4bRF24 == 0x70C) {
389 d_cut = 1;
390 netdev_info(dev, "card type changed from C- to D-cut\n");
391 }
392
393 /* Page0 : reg0-reg15 */
394
395 RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);/* 1 */
396 RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1);
397 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);/* 2 */
398 RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);/* 3 */
399 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1);
400 RF_WriteReg(dev, 0x05, 0x0c72); mdelay(1);
401 RF_WriteReg(dev, 0x06, 0x0ae6); mdelay(1);
402 RF_WriteReg(dev, 0x07, 0x00ca); mdelay(1);
403 RF_WriteReg(dev, 0x08, 0x0e1c); mdelay(1);
404 RF_WriteReg(dev, 0x09, 0x02f0); mdelay(1);
405 RF_WriteReg(dev, 0x0a, 0x09d0); mdelay(1);
406 RF_WriteReg(dev, 0x0b, 0x01ba); mdelay(1);
407 RF_WriteReg(dev, 0x0c, 0x0640); mdelay(1);
408 RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1);
409 RF_WriteReg(dev, 0x0e, 0x0020); mdelay(1);
410 RF_WriteReg(dev, 0x0f, 0x0990); mdelay(1);
411
412 /* Page1 : reg16-reg30 */
413 RF_WriteReg(dev, 0x00, 0x013f); mdelay(1);
414 RF_WriteReg(dev, 0x03, 0x0806); mdelay(1);
415 RF_WriteReg(dev, 0x04, 0x03a7); mdelay(1);
416 RF_WriteReg(dev, 0x05, 0x059b); mdelay(1);
417 RF_WriteReg(dev, 0x06, 0x0081); mdelay(1);
418 RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1);
419/*
420 * Don't write RF23/RF24 to make a difference between 87S C cut and D cut.
421 * asked by SD3 stevenl.
422 */
423 RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1);
424 RF_WriteReg(dev, 0x0b, 0x0418); mdelay(1);
425
426 if (d_cut) {
427 RF_WriteReg(dev, 0x0c, 0x0fbe); mdelay(1);
428 RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1);
429 /* RX LO buffer */
430 RF_WriteReg(dev, 0x0e, 0x0807); mdelay(1);
431 } else {
432 RF_WriteReg(dev, 0x0c, 0x0fbe); mdelay(1);
433 RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1);
434 /* RX LO buffer */
435 RF_WriteReg(dev, 0x0e, 0x0806); mdelay(1);
436 }
437
438 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
439 RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1); /* 6 */
440 RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1);
441 RF_WriteReg(dev, 0x04, 0x0e50); mdelay(1);
442
443 for (i = 0; i <= 36; i++) {
444 RF_WriteReg(dev, 0x01, i); mdelay(1);
445 RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
446 }
447
448 RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /* 203, 343 */
449 RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); /* 400 */
450 /* switch to reg16-reg30, and HSSI disable 137 */
451 RF_WriteReg(dev, 0x00, 0x0137); mdelay(1);
452 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
453
454 /* Z4 synthesizer loop filter setting, 392 */
455 RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1);
456 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
457
458 /* switch to reg0-reg15, and HSSI disable */
459 RF_WriteReg(dev, 0x00, 0x0037); mdelay(1);
460 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
461
462 /* CBC on, Tx Rx disable, High gain */
463 RF_WriteReg(dev, 0x04, 0x0160); mdelay(1);
464 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
465
466 /* Z4 setted channel 1 */
467 RF_WriteReg(dev, 0x07, 0x0080); mdelay(1);
468 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
469
470 RF_WriteReg(dev, 0x02, 0x088D); mdelay(1); /* LC calibration */
471 mdelay(200); /* Deay 200 ms. */ /* 0xfd */
472 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
473 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
474
475 /* switch to reg16-reg30 137, and HSSI disable 137 */
476 RF_WriteReg(dev, 0x00, 0x0137); mdelay(1);
477 mdelay(10); /* Deay 10 ms. */ /* 0xfd */
478
479 RF_WriteReg(dev, 0x07, 0x0000); mdelay(1);
480 RF_WriteReg(dev, 0x07, 0x0180); mdelay(1);
481 RF_WriteReg(dev, 0x07, 0x0220); mdelay(1);
482 RF_WriteReg(dev, 0x07, 0x03E0); mdelay(1);
483
484 /* DAC calibration off 20070702 */
485 RF_WriteReg(dev, 0x06, 0x00c1); mdelay(1);
486 RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1);
487 /* For crystal calibration, added by Roger, 2007.12.11. */
488 if (priv->bXtalCalibration) { /* reg 30. */
489 /*
490 * enable crystal calibration.
491 * RF Reg[30], (1)Xin:[12:9], Xout:[8:5], addr[4:0].
492 * (2)PA Pwr delay timer[15:14], default: 2.4us,
493 * set BIT15=0
494 * (3)RF signal on/off when calibration[13], default: on,
495 * set BIT13=0.
496 * So we should minus 4 BITs offset.
497 */
498 RF_WriteReg(dev, 0x0f, (priv->XtalCal_Xin<<5) |
499 (priv->XtalCal_Xout<<1) | BIT11 | BIT9); mdelay(1);
500 netdev_info(dev, "ZEBRA_Config_85BASIC_HardCode(): (%02x)\n",
501 (priv->XtalCal_Xin<<5) | (priv->XtalCal_Xout<<1) |
502 BIT11 | BIT9);
503 } else {
504 /* using default value. Xin=6, Xout=6. */
505 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
506 }
507 /* switch to reg0-reg15, and HSSI enable */
508 RF_WriteReg(dev, 0x00, 0x00bf); mdelay(1);
509 /* Rx BB start calibration, 00c//+edward */
510 RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1);
511 /* temperature meter off */
512 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);
513 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); /* Rx mode */
514 mdelay(10); /* Deay 10 ms.*/ /* 0xfe */
515 mdelay(10); /* Deay 10 ms.*/ /* 0xfe */
516 mdelay(10); /* Deay 10 ms.*/ /* 0xfe */
517 /* Rx mode*/ /*+edward */
518 RF_WriteReg(dev, 0x00, 0x0197); mdelay(1);
519 /* Rx mode*/ /*+edward */
520 RF_WriteReg(dev, 0x05, 0x05ab); mdelay(1);
521 /* Rx mode*/ /*+edward */
522 RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);
523 /* Rx mode*/ /*+edward */
524 RF_WriteReg(dev, 0x01, 0x0000); mdelay(1);
525 /* Rx mode*/ /*+edward */
526 RF_WriteReg(dev, 0x02, 0x0000); mdelay(1);
527 /* power save parameters. */
528 u1b24E = read_nic_byte(dev, 0x24E);
529 write_nic_byte(dev, 0x24E, (u1b24E & (~(BIT5|BIT6))));
530
531 /*======================================================================
532 *
533 *======================================================================
534 * CCKCONF.TXT
535 *======================================================================
536 *
537 * [POWER SAVE] Power Saving Parameters by jong. 2007-11-27
538 * CCK reg0x00[7]=1'b1 :power saving for TX (default)
539 * CCK reg0x00[6]=1'b1: power saving for RX (default)
540 * CCK reg0x06[4]=1'b1: turn off channel estimation related
541 * circuits if not doing channel estimation.
542 * CCK reg0x06[3]=1'b1: turn off unused circuits before cca = 1
543 * CCK reg0x06[2]=1'b1: turn off cck's circuit if macrst =0
544 */
545
546 write_phy_cck(dev, 0x00, 0xc8);
547 write_phy_cck(dev, 0x06, 0x1c);
548 write_phy_cck(dev, 0x10, 0x78);
549 write_phy_cck(dev, 0x2e, 0xd0);
550 write_phy_cck(dev, 0x2f, 0x06);
551 write_phy_cck(dev, 0x01, 0x46);
552
553 /* power control */
554 write_nic_byte(dev, CCK_TXAGC, 0x10);
555 write_nic_byte(dev, OFDM_TXAGC, 0x1B);
556 write_nic_byte(dev, ANTSEL, 0x03);
557
558
559
560 /*
561 *======================================================================
562 * AGC.txt
563 *======================================================================
564 */
565
566 write_phy_ofdm(dev, 0x00, 0x12);
567
568 for (i = 0; i < 128; i++) {
569
570 data = ZEBRA_AGC[i+1];
571 data = data << 8;
572 data = data | 0x0000008F;
573
574 addr = i + 0x80; /* enable writing AGC table */
575 addr = addr << 8;
576 addr = addr | 0x0000008E;
577
578 WriteBBPortUchar(dev, data);
579 WriteBBPortUchar(dev, addr);
580 WriteBBPortUchar(dev, 0x0000008E);
581 }
582
583 PlatformIOWrite4Byte(dev, PhyAddr, 0x00001080); /* Annie, 2006-05-05 */
584
585 /*
586 *======================================================================
587 *
588 *======================================================================
589 * OFDMCONF.TXT
590 *======================================================================
591 */
592
593 for (i = 0; i < 60; i++) {
594 u4bRegOffset = i;
595 u4bRegValue = OFDM_CONFIG[i];
596
597 WriteBBPortUchar(dev,
598 (0x00000080 |
599 (u4bRegOffset & 0x7f) |
600 ((u4bRegValue & 0xff) << 8)));
601 }
602
603 /*
604 *======================================================================
605 * by amy for antenna
606 *======================================================================
607 */
608 /*
609 * Config Sw/Hw Combinational Antenna Diversity. Added by Roger,
610 * 2008.02.26.
611 */
612 SetAntennaConfig87SE(dev, priv->bDefaultAntenna1,
613 priv->bSwAntennaDiverity);
614}
615
616
617void UpdateInitialGain(struct net_device *dev)
618{
619 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
620
621 /* lzm add 080826 */
622 if (priv->eRFPowerState != RF_ON) {
623 /* Don't access BB/RF under disable PLL situation.
624 * RT_TRACE(COMP_DIG, DBG_LOUD, ("UpdateInitialGain -
625 * pHalData->eRFPowerState!=RF_ON\n"));
626 * Back to the original state
627 */
628 priv->InitialGain = priv->InitialGainBackUp;
629 return;
630 }
631
632 switch (priv->InitialGain) {
633 case 1: /* m861dBm */
634 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
635 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
636 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
637 break;
638
639 case 2: /* m862dBm */
640 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
641 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
642 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
643 break;
644
645 case 3: /* m863dBm */
646 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
647 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
648 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
649 break;
650
651 case 4: /* m864dBm */
652 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
653 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
654 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
655 break;
656
657 case 5: /* m82dBm */
658 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
659 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
660 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
661 break;
662
663 case 6: /* m78dBm */
664 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
665 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
666 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
667 break;
668
669 case 7: /* m74dBm */
670 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
671 write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1);
672 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
673 break;
674
675 case 8:
676 write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
677 write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1);
678 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
679 break;
680
681 default: /* MP */
682 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
683 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
684 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
685 break;
686 }
687}
688/*
689 * Description:
690 * Tx Power tracking mechanism routine on 87SE.
691 * Created by Roger, 2007.12.11.
692 */
693static void InitTxPwrTracking87SE(struct net_device *dev)
694{
695 u32 u4bRfReg;
696
697 u4bRfReg = RF_ReadReg(dev, 0x02);
698
699 /* Enable Thermal meter indication. */
700 RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN); mdelay(1);
701}
702
703static void PhyConfig8185(struct net_device *dev)
704{
705 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
706 write_nic_dword(dev, RCR, priv->ReceiveConfig);
707 priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03;
708 /* RF config */
709 ZEBRA_Config_85BASIC_HardCode(dev);
710 /* Set default initial gain state to 4, approved by SD3 DZ, by Bruce,
711 * 2007-06-06.
712 */
713 if (priv->bDigMechanism) {
714 if (priv->InitialGain == 0)
715 priv->InitialGain = 4;
716 }
717
718 /*
719 * Enable thermal meter indication to implement TxPower tracking
720 * on 87SE. We initialize thermal meter here to avoid unsuccessful
721 * configuration. Added by Roger, 2007.12.11.
722 */
723 if (priv->bTxPowerTrack)
724 InitTxPwrTracking87SE(dev);
725
726 priv->InitialGainBackUp = priv->InitialGain;
727 UpdateInitialGain(dev);
728
729 return;
730}
731
732static void HwConfigureRTL8185(struct net_device *dev)
733{
734 /*
735 * RTL8185_TODO: Determine Retrylimit, TxAGC,
736 * AutoRateFallback control.
737 */
738 u8 bUNIVERSAL_CONTROL_RL = 0;
739 u8 bUNIVERSAL_CONTROL_AGC = 1;
740 u8 bUNIVERSAL_CONTROL_ANT = 1;
741 u8 bAUTO_RATE_FALLBACK_CTL = 1;
742 u8 val8;
743 write_nic_word(dev, BRSR, 0x0fff);
744 /* Retry limit */
745 val8 = read_nic_byte(dev, CW_CONF);
746
747 if (bUNIVERSAL_CONTROL_RL)
748 val8 = val8 & 0xfd;
749 else
750 val8 = val8 | 0x02;
751
752 write_nic_byte(dev, CW_CONF, val8);
753
754 /* Tx AGC */
755 val8 = read_nic_byte(dev, TXAGC_CTL);
756 if (bUNIVERSAL_CONTROL_AGC) {
757 write_nic_byte(dev, CCK_TXAGC, 128);
758 write_nic_byte(dev, OFDM_TXAGC, 128);
759 val8 = val8 & 0xfe;
760 } else {
761 val8 = val8 | 0x01;
762 }
763
764
765 write_nic_byte(dev, TXAGC_CTL, val8);
766
767 /* Tx Antenna including Feedback control */
768 val8 = read_nic_byte(dev, TXAGC_CTL);
769
770 if (bUNIVERSAL_CONTROL_ANT) {
771 write_nic_byte(dev, ANTSEL, 0x00);
772 val8 = val8 & 0xfd;
773 } else {
774 val8 = val8 & (val8|0x02); /* xiong-2006-11-15 */
775 }
776
777 write_nic_byte(dev, TXAGC_CTL, val8);
778
779 /* Auto Rate fallback control */
780 val8 = read_nic_byte(dev, RATE_FALLBACK);
781 val8 &= 0x7c;
782 if (bAUTO_RATE_FALLBACK_CTL) {
783 val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1;
784
785 /* <RJ_TODO_8185B> We shall set up the ARFR according
786 * to user's setting.
787 */
788 PlatformIOWrite2Byte(dev, ARFR, 0x0fff); /* set 1M ~ 54Mbps. */
789 }
790 write_nic_byte(dev, RATE_FALLBACK, val8);
791}
792
793static void MacConfig_85BASIC_HardCode(struct net_device *dev)
794{
795 /*
796 *======================================================================
797 * MACREG.TXT
798 *======================================================================
799 */
800 int nLinesRead = 0;
801 u32 u4bRegOffset, u4bRegValue, u4bPageIndex = 0;
802 int i;
803
804 nLinesRead = sizeof(MAC_REG_TABLE)/2;
805
806 for (i = 0; i < nLinesRead; i++) { /* nLinesRead=101 */
807 u4bRegOffset = MAC_REG_TABLE[i][0];
808 u4bRegValue = MAC_REG_TABLE[i][1];
809
810 if (u4bRegOffset == 0x5e)
811 u4bPageIndex = u4bRegValue;
812 else
813 u4bRegOffset |= (u4bPageIndex << 8);
814
815 write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue);
816 }
817 /* ================================================================= */
818}
819
820static void MacConfig_85BASIC(struct net_device *dev)
821{
822
823 u8 u1DA;
824 MacConfig_85BASIC_HardCode(dev);
825
826 /* ================================================================= */
827
828 /* Follow TID_AC_MAP of WMac. */
829 write_nic_word(dev, TID_AC_MAP, 0xfa50);
830
831 /* Interrupt Migration, Jong suggested we use set 0x0000 first,
832 * 2005.12.14, by rcnjko.
833 */
834 write_nic_word(dev, IntMig, 0x0000);
835
836 /* Prevent TPC to cause CRC error. Added by Annie, 2006-06-10. */
837 PlatformIOWrite4Byte(dev, 0x1F0, 0x00000000);
838 PlatformIOWrite4Byte(dev, 0x1F4, 0x00000000);
839 PlatformIOWrite1Byte(dev, 0x1F8, 0x00);
840
841 /* Asked for by SD3 CM Lin, 2006.06.27, by rcnjko. */
842
843 /*
844 * power save parameter based on
845 * "87SE power save parameters 20071127.doc", as follow.
846 */
847
848 /* Enable DA10 TX power saving */
849 u1DA = read_nic_byte(dev, PHYPR);
850 write_nic_byte(dev, PHYPR, (u1DA | BIT2));
851
852 /* POWER: */
853 write_nic_word(dev, 0x360, 0x1000);
854 write_nic_word(dev, 0x362, 0x1000);
855
856 /* AFE. */
857 write_nic_word(dev, 0x370, 0x0560);
858 write_nic_word(dev, 0x372, 0x0560);
859 write_nic_word(dev, 0x374, 0x0DA4);
860 write_nic_word(dev, 0x376, 0x0DA4);
861 write_nic_word(dev, 0x378, 0x0560);
862 write_nic_word(dev, 0x37A, 0x0560);
863 write_nic_word(dev, 0x37C, 0x00EC);
864 write_nic_word(dev, 0x37E, 0x00EC); /* +edward */
865 write_nic_byte(dev, 0x24E, 0x01);
866}
867
868static u8 GetSupportedWirelessMode8185(struct net_device *dev)
869{
870 return WIRELESS_MODE_B | WIRELESS_MODE_G;
871}
872
873static void
874ActUpdateChannelAccessSetting(struct net_device *dev,
875 enum wireless_mode mode,
876 struct chnl_access_setting *chnl_access_setting)
877{
878 AC_CODING eACI;
879
880 /*
881 * <RJ_TODO_8185B>
882 * TODO: We still don't know how to set up these registers,
883 * just follow WMAC to verify 8185B FPAG.
884 *
885 * <RJ_TODO_8185B>
886 * Jong said CWmin/CWmax register are not functional in 8185B,
887 * so we shall fill channel access realted register into AC
888 * parameter registers,
889 * even in nQBss.
890 */
891
892 /* Suggested by Jong, 2005.12.08. */
893 chnl_access_setting->sifs_timer = 0x22;
894 chnl_access_setting->difs_timer = 0x1C; /* 2006.06.02, by rcnjko. */
895 chnl_access_setting->slot_time_timer = 9; /* 2006.06.02, by rcnjko. */
896 /*
897 * Suggested by wcchu, it is the default value of EIFS register,
898 * 2005.12.08.
899 */
900 chnl_access_setting->eifs_timer = 0x5B;
901 chnl_access_setting->cwmin_index = 3; /* 2006.06.02, by rcnjko. */
902 chnl_access_setting->cwmax_index = 7; /* 2006.06.02, by rcnjko. */
903
904 write_nic_byte(dev, SIFS, chnl_access_setting->sifs_timer);
905 /*
906 * Rewrited from directly use PlatformEFIOWrite1Byte(),
907 * by Annie, 2006-03-29.
908 */
909 write_nic_byte(dev, SLOT, chnl_access_setting->slot_time_timer);
910
911 write_nic_byte(dev, EIFS, chnl_access_setting->eifs_timer);
912
913 /*
914 * <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS
915 * register, 2005.12.08.
916 */
917 write_nic_byte(dev, AckTimeOutReg, 0x5B);
918
919 for (eACI = 0; eACI < AC_MAX; eACI++)
920 write_nic_byte(dev, ACM_CONTROL, 0);
921}
922
923static void ActSetWirelessMode8185(struct net_device *dev, u8 btWirelessMode)
924{
925 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
926 struct ieee80211_device *ieee = priv->ieee80211;
927 u8 btSupportedWirelessMode = GetSupportedWirelessMode8185(dev);
928
929 if ((btWirelessMode & btSupportedWirelessMode) == 0) {
930 /*
931 * Don't switch to unsupported wireless mode, 2006.02.15,
932 * by rcnjko.
933 */
934 DMESGW("ActSetWirelessMode8185(): WirelessMode(%d) is not supported (%d)!\n",
935 btWirelessMode, btSupportedWirelessMode);
936 return;
937 }
938
939 /* 1. Assign wireless mode to switch if necessary. */
940 if (btWirelessMode == WIRELESS_MODE_AUTO) {
941 if ((btSupportedWirelessMode & WIRELESS_MODE_A)) {
942 btWirelessMode = WIRELESS_MODE_A;
943 } else if (btSupportedWirelessMode & WIRELESS_MODE_G) {
944 btWirelessMode = WIRELESS_MODE_G;
945
946 } else if ((btSupportedWirelessMode & WIRELESS_MODE_B)) {
947 btWirelessMode = WIRELESS_MODE_B;
948 } else {
949 DMESGW("ActSetWirelessMode8185(): No valid wireless mode supported, btSupportedWirelessMode(%x)!!!\n",
950 btSupportedWirelessMode);
951 btWirelessMode = WIRELESS_MODE_B;
952 }
953 }
954
955 /*
956 * 2. Swtich band: RF or BB specific actions,
957 * for example, refresh tables in omc8255, or change initial gain if
958 * necessary. Nothing to do for Zebra to switch band. Update current
959 * wireless mode if we switch to specified band successfully.
960 */
961
962 ieee->mode = (enum wireless_mode)btWirelessMode;
963
964 /* 3. Change related setting. */
965 if (ieee->mode == WIRELESS_MODE_A)
966 DMESG("WIRELESS_MODE_A\n");
967 else if (ieee->mode == WIRELESS_MODE_B)
968 DMESG("WIRELESS_MODE_B\n");
969 else if (ieee->mode == WIRELESS_MODE_G)
970 DMESG("WIRELESS_MODE_G\n");
971
972 ActUpdateChannelAccessSetting(dev, ieee->mode,
973 &priv->ChannelAccessSetting);
974}
975
976void rtl8185b_irq_enable(struct net_device *dev)
977{
978 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
979
980 priv->irq_enabled = 1;
981 write_nic_dword(dev, IMR, priv->IntrMask);
982}
983
984static void MgntDisconnectIBSS(struct net_device *dev)
985{
986 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
987 u8 i;
988
989 for (i = 0; i < 6; i++)
990 priv->ieee80211->current_network.bssid[i] = 0x55;
991
992
993
994 priv->ieee80211->state = IEEE80211_NOLINK;
995 /*
996 * Stop Beacon.
997 *
998 * Vista add a Adhoc profile, HW radio off until
999 * OID_DOT11_RESET_REQUEST Driver would set MSR=NO_LINK,
1000 * then HW Radio ON, MgntQueue Stuck. Because Bcn DMA isn't
1001 * complete, mgnt queue would stuck until Bcn packet send.
1002 *
1003 * Disable Beacon Queue Own bit, suggested by jong
1004 */
1005 ieee80211_stop_send_beacons(priv->ieee80211);
1006
1007 priv->ieee80211->link_change(dev);
1008 notify_wx_assoc_event(priv->ieee80211);
1009}
1010
1011static void MlmeDisassociateRequest(struct net_device *dev, u8 *asSta, u8 asRsn)
1012{
1013 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1014 u8 i;
1015
1016 SendDisassociation(priv->ieee80211, asSta, asRsn);
1017
1018 if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) {
1019 /* ShuChen TODO: change media status. */
1020
1021 for (i = 0; i < 6; i++)
1022 priv->ieee80211->current_network.bssid[i] = 0x22;
1023
1024 ieee80211_disassociate(priv->ieee80211);
1025 }
1026}
1027
1028static void MgntDisconnectAP(struct net_device *dev, u8 asRsn)
1029{
1030 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1031
1032 /*
1033 * Commented out by rcnjko, 2005.01.27:
1034 * I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE().
1035 *
1036 * 2004/09/15, kcwu, the key should be cleared, or the new
1037 * handshaking will not success
1038 *
1039 * In WPA WPA2 need to Clear all key ... because new key will set
1040 * after new handshaking. 2004.10.11, by rcnjko.
1041 */
1042 MlmeDisassociateRequest(dev, priv->ieee80211->current_network.bssid,
1043 asRsn);
1044
1045 priv->ieee80211->state = IEEE80211_NOLINK;
1046}
1047
1048static bool MgntDisconnect(struct net_device *dev, u8 asRsn)
1049{
1050 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1051 /*
1052 * Schedule an workitem to wake up for ps mode, 070109, by rcnjko.
1053 */
1054
1055 if (IS_DOT11D_ENABLE(priv->ieee80211))
1056 Dot11d_Reset(priv->ieee80211);
1057 /* In adhoc mode, update beacon frame. */
1058 if (priv->ieee80211->state == IEEE80211_LINKED) {
1059 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1060 MgntDisconnectIBSS(dev);
1061
1062 if (priv->ieee80211->iw_mode == IW_MODE_INFRA) {
1063 /*
1064 * We clear key here instead of MgntDisconnectAP()
1065 * because that MgntActSet_802_11_DISASSOCIATE()
1066 * is an interface called by OS, e.g.
1067 * OID_802_11_DISASSOCIATE in Windows while as
1068 * MgntDisconnectAP() is used to handle
1069 * disassociation related things to AP, e.g. send
1070 * Disassoc frame to AP. 2005.01.27, by rcnjko.
1071 */
1072 MgntDisconnectAP(dev, asRsn);
1073 }
1074 /* Indicate Disconnect, 2005.02.23, by rcnjko. */
1075 }
1076 return true;
1077}
1078/*
1079 * Description:
1080 * Chang RF Power State.
1081 * Note that, only MgntActSet_RF_State() is allowed to set
1082 * HW_VAR_RF_STATE.
1083 *
1084 * Assumption:
1085 * PASSIVE LEVEL.
1086 */
1087static bool SetRFPowerState(struct net_device *dev,
1088 enum rt_rf_power_state eRFPowerState)
1089{
1090 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1091 bool bResult = false;
1092
1093 if (eRFPowerState == priv->eRFPowerState)
1094 return bResult;
1095
1096 bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
1097
1098 return bResult;
1099}
1100
1101bool MgntActSet_RF_State(struct net_device *dev, enum rt_rf_power_state StateToSet,
1102 u32 ChangeSource)
1103{
1104 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1105 bool bActionAllowed = false;
1106 bool bConnectBySSID = false;
1107 enum rt_rf_power_state rtState;
1108 u16 RFWaitCounter = 0;
1109 unsigned long flag;
1110 /*
1111 * Prevent the race condition of RF state change. By Bruce,
1112 * 2007-11-28. Only one thread can change the RF state at one time,
1113 * and others should wait to be executed.
1114 */
1115 while (true) {
1116 spin_lock_irqsave(&priv->rf_ps_lock, flag);
1117 if (priv->RFChangeInProgress) {
1118 spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
1119 /* Set RF after the previous action is done. */
1120 while (priv->RFChangeInProgress) {
1121 RFWaitCounter++;
1122 udelay(1000); /* 1 ms */
1123
1124 /*
1125 * Wait too long, return FALSE to avoid
1126 * to be stuck here.
1127 */
1128 if (RFWaitCounter > 1000) { /* 1sec */
1129 netdev_info(dev, "MgntActSet_RF_State(): Wait too long to set RF\n");
1130 /* TODO: Reset RF state? */
1131 return false;
1132 }
1133 }
1134 } else {
1135 priv->RFChangeInProgress = true;
1136 spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
1137 break;
1138 }
1139 }
1140 rtState = priv->eRFPowerState;
1141
1142 switch (StateToSet) {
1143 case RF_ON:
1144 /*
1145 * Turn On RF no matter the IPS setting because we need to
1146 * update the RF state to Ndis under Vista, or the Windows
1147 * does not allow the driver to perform site survey any
1148 * more. By Bruce, 2007-10-02.
1149 */
1150 priv->RfOffReason &= (~ChangeSource);
1151
1152 if (!priv->RfOffReason) {
1153 priv->RfOffReason = 0;
1154 bActionAllowed = true;
1155
1156 if (rtState == RF_OFF &&
1157 ChangeSource >= RF_CHANGE_BY_HW)
1158 bConnectBySSID = true;
1159 }
1160 break;
1161
1162 case RF_OFF:
1163 /* 070125, rcnjko: we always keep connected in AP mode. */
1164
1165 if (priv->RfOffReason > RF_CHANGE_BY_IPS) {
1166 /*
1167 * 060808, Annie:
1168 * Disconnect to current BSS when radio off.
1169 * Asked by QuanTa.
1170 *
1171 * Calling MgntDisconnect() instead of
1172 * MgntActSet_802_11_DISASSOCIATE(), because
1173 * we do NOT need to set ssid to dummy ones.
1174 */
1175 MgntDisconnect(dev, disas_lv_ss);
1176 /*
1177 * Clear content of bssDesc[] and bssDesc4Query[]
1178 * to avoid reporting old bss to UI.
1179 */
1180 }
1181
1182 priv->RfOffReason |= ChangeSource;
1183 bActionAllowed = true;
1184 break;
1185 case RF_SLEEP:
1186 priv->RfOffReason |= ChangeSource;
1187 bActionAllowed = true;
1188 break;
1189 default:
1190 break;
1191 }
1192
1193 if (bActionAllowed) {
1194 /* Config HW to the specified mode. */
1195 SetRFPowerState(dev, StateToSet);
1196 }
1197
1198 /* Release RF spinlock */
1199 spin_lock_irqsave(&priv->rf_ps_lock, flag);
1200 priv->RFChangeInProgress = false;
1201 spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
1202 return bActionAllowed;
1203}
1204
1205static void InactivePowerSave(struct net_device *dev)
1206{
1207 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1208 /*
1209 * This flag "bSwRfProcessing", indicates the status of IPS
1210 * procedure, should be set if the IPS workitem is really
1211 * scheduled. The old code, sets this flag before scheduling the
1212 * IPS workitem and however, at the same time the previous IPS
1213 * workitem did not end yet, fails to schedule the current
1214 * workitem. Thus, bSwRfProcessing blocks the IPS procedure of
1215 * switching RF.
1216 */
1217 priv->bSwRfProcessing = true;
1218
1219 MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
1220
1221 /*
1222 * To solve CAM values miss in RF OFF, rewrite CAM values after
1223 * RF ON. By Bruce, 2007-09-20.
1224 */
1225
1226 priv->bSwRfProcessing = false;
1227}
1228
1229/*
1230 * Description:
1231 * Enter the inactive power save mode. RF will be off
1232 */
1233void IPSEnter(struct net_device *dev)
1234{
1235 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1236 enum rt_rf_power_state rtState;
1237 if (priv->bInactivePs) {
1238 rtState = priv->eRFPowerState;
1239
1240 /*
1241 * Do not enter IPS in the following conditions:
1242 * (1) RF is already OFF or
1243 * Sleep (2) bSwRfProcessing (indicates the IPS is still
1244 * under going) (3) Connected (only disconnected can
1245 * trigger IPS)(4) IBSS (send Beacon)
1246 * (5) AP mode (send Beacon)
1247 */
1248 if (rtState == RF_ON && !priv->bSwRfProcessing
1249 && (priv->ieee80211->state != IEEE80211_LINKED)) {
1250 priv->eInactivePowerState = RF_OFF;
1251 InactivePowerSave(dev);
1252 }
1253 }
1254}
1255void IPSLeave(struct net_device *dev)
1256{
1257 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1258 enum rt_rf_power_state rtState;
1259 if (priv->bInactivePs) {
1260 rtState = priv->eRFPowerState;
1261 if ((rtState == RF_OFF || rtState == RF_SLEEP) &&
1262 !priv->bSwRfProcessing
1263 && priv->RfOffReason <= RF_CHANGE_BY_IPS) {
1264 priv->eInactivePowerState = RF_ON;
1265 InactivePowerSave(dev);
1266 }
1267 }
1268}
1269
1270void rtl8185b_adapter_start(struct net_device *dev)
1271{
1272 struct r8180_priv *priv = ieee80211_priv(dev);
1273 struct ieee80211_device *ieee = priv->ieee80211;
1274
1275 u8 SupportedWirelessMode;
1276 u8 InitWirelessMode;
1277 u8 bInvalidWirelessMode = 0;
1278 u8 tmpu8;
1279 u8 btCR9346;
1280 u8 TmpU1b;
1281 u8 btPSR;
1282
1283 write_nic_byte(dev, 0x24e, (BIT5|BIT6|BIT0));
1284 rtl8180_reset(dev);
1285
1286 priv->dma_poll_mask = 0;
1287 priv->dma_poll_stop_mask = 0;
1288
1289 HwConfigureRTL8185(dev);
1290 write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
1291 write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
1292 /* default network type to 'No Link' */
1293 write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3);
1294 write_nic_word(dev, BcnItv, 100);
1295 write_nic_word(dev, AtimWnd, 2);
1296 PlatformIOWrite2Byte(dev, FEMR, 0xFFFF);
1297 write_nic_byte(dev, WPA_CONFIG, 0);
1298 MacConfig_85BASIC(dev);
1299 /* Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07,
1300 * by rcnjko.
1301 */
1302 /* BT_DEMO_BOARD type */
1303 PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a);
1304
1305 /*
1306 *---------------------------------------------------------------------
1307 * Set up PHY related.
1308 *---------------------------------------------------------------------
1309 */
1310 /* Enable Config3.PARAM_En to revise AnaaParm. */
1311 write_nic_byte(dev, CR9346, 0xc0); /* enable config register write */
1312 tmpu8 = read_nic_byte(dev, CONFIG3);
1313 write_nic_byte(dev, CONFIG3, (tmpu8 | CONFIG3_PARM_En));
1314 /* Turn on Analog power. */
1315 /* Asked for by William, otherwise, MAC 3-wire can't work,
1316 * 2006.06.27, by rcnjko.
1317 */
1318 write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON);
1319 write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON);
1320 write_nic_word(dev, ANAPARAM3, 0x0010);
1321
1322 write_nic_byte(dev, CONFIG3, tmpu8);
1323 write_nic_byte(dev, CR9346, 0x00);
1324 /* enable EEM0 and EEM1 in 9346CR */
1325 btCR9346 = read_nic_byte(dev, CR9346);
1326 write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
1327
1328 /* B cut use LED1 to control HW RF on/off */
1329 TmpU1b = read_nic_byte(dev, CONFIG5);
1330 TmpU1b = TmpU1b & ~BIT3;
1331 write_nic_byte(dev, CONFIG5, TmpU1b);
1332
1333 /* disable EEM0 and EEM1 in 9346CR */
1334 btCR9346 &= ~(0xC0);
1335 write_nic_byte(dev, CR9346, btCR9346);
1336
1337 /* Enable Led (suggested by Jong) */
1338 /* B-cut RF Radio on/off 5e[3]=0 */
1339 btPSR = read_nic_byte(dev, PSR);
1340 write_nic_byte(dev, PSR, (btPSR | BIT3));
1341 /* setup initial timing for RFE. */
1342 write_nic_word(dev, RFPinsOutput, 0x0480);
1343 SetOutputEnableOfRfPins(dev);
1344 write_nic_word(dev, RFPinsSelect, 0x2488);
1345
1346 /* PHY config. */
1347 PhyConfig8185(dev);
1348
1349 /*
1350 * We assume RegWirelessMode has already been initialized before,
1351 * however, we has to validate the wireless mode here and provide a
1352 * reasonable initialized value if necessary. 2005.01.13,
1353 * by rcnjko.
1354 */
1355 SupportedWirelessMode = GetSupportedWirelessMode8185(dev);
1356 if ((ieee->mode != WIRELESS_MODE_B) &&
1357 (ieee->mode != WIRELESS_MODE_G) &&
1358 (ieee->mode != WIRELESS_MODE_A) &&
1359 (ieee->mode != WIRELESS_MODE_AUTO)) {
1360 /* It should be one of B, G, A, or AUTO. */
1361 bInvalidWirelessMode = 1;
1362 } else {
1363 /* One of B, G, A, or AUTO. */
1364 /* Check if the wireless mode is supported by RF. */
1365 if ((ieee->mode != WIRELESS_MODE_AUTO) &&
1366 (ieee->mode & SupportedWirelessMode) == 0) {
1367 bInvalidWirelessMode = 1;
1368 }
1369 }
1370
1371 if (bInvalidWirelessMode || ieee->mode == WIRELESS_MODE_AUTO) {
1372 /* Auto or other invalid value. */
1373 /* Assigne a wireless mode to initialize. */
1374 if ((SupportedWirelessMode & WIRELESS_MODE_A)) {
1375 InitWirelessMode = WIRELESS_MODE_A;
1376 } else if ((SupportedWirelessMode & WIRELESS_MODE_G)) {
1377 InitWirelessMode = WIRELESS_MODE_G;
1378 } else if ((SupportedWirelessMode & WIRELESS_MODE_B)) {
1379 InitWirelessMode = WIRELESS_MODE_B;
1380 } else {
1381 DMESGW("InitializeAdapter8185(): No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n",
1382 SupportedWirelessMode);
1383 InitWirelessMode = WIRELESS_MODE_B;
1384 }
1385
1386 /* Initialize RegWirelessMode if it is not a valid one. */
1387 if (bInvalidWirelessMode)
1388 ieee->mode = (enum wireless_mode)InitWirelessMode;
1389
1390 } else {
1391 /* One of B, G, A. */
1392 InitWirelessMode = ieee->mode;
1393 }
1394 priv->eRFPowerState = RF_OFF;
1395 priv->RfOffReason = 0;
1396 {
1397 MgntActSet_RF_State(dev, RF_ON, 0);
1398 }
1399 /*
1400 * If inactive power mode is enabled, disable rf while in
1401 * disconnected state.
1402 */
1403 if (priv->bInactivePs)
1404 MgntActSet_RF_State(dev , RF_OFF, RF_CHANGE_BY_IPS);
1405
1406 ActSetWirelessMode8185(dev, (u8)(InitWirelessMode));
1407
1408 /* ----------------------------------------------------------------- */
1409
1410 rtl8185b_irq_enable(dev);
1411
1412 netif_start_queue(dev);
1413}
1414
1415void rtl8185b_rx_enable(struct net_device *dev)
1416{
1417 u8 cmd;
1418 /* for now we accept data, management & ctl frame*/
1419 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1420
1421
1422 if (dev->flags & IFF_PROMISC)
1423 DMESG("NIC in promisc mode");
1424
1425 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || dev->flags &
1426 IFF_PROMISC) {
1427 priv->ReceiveConfig = priv->ReceiveConfig & (~RCR_APM);
1428 priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP;
1429 }
1430
1431 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1432 priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF |
1433 RCR_APWRMGT | RCR_AICV;
1434
1435
1436 if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1437 priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACRC32;
1438
1439 write_nic_dword(dev, RCR, priv->ReceiveConfig);
1440
1441 fix_rx_fifo(dev);
1442
1443 cmd = read_nic_byte(dev, CMD);
1444 write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
1445
1446}
1447
1448void rtl8185b_tx_enable(struct net_device *dev)
1449{
1450 u8 cmd;
1451 u8 byte;
1452 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1453
1454 write_nic_dword(dev, TCR, priv->TransmitConfig);
1455 byte = read_nic_byte(dev, MSR);
1456 byte |= MSR_LINK_ENEDCA;
1457 write_nic_byte(dev, MSR, byte);
1458
1459 fix_tx_fifo(dev);
1460
1461 cmd = read_nic_byte(dev, CMD);
1462 write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
1463}
1464
diff --git a/drivers/staging/rtl8188eu/core/rtw_recv.c b/drivers/staging/rtl8188eu/core/rtw_recv.c
index 636ec553ae83..e305d43ebd06 100644
--- a/drivers/staging/rtl8188eu/core/rtw_recv.c
+++ b/drivers/staging/rtl8188eu/core/rtw_recv.c
@@ -545,20 +545,18 @@ static struct recv_frame *decryptor(struct adapter *padapter,
545static struct recv_frame *portctrl(struct adapter *adapter, 545static struct recv_frame *portctrl(struct adapter *adapter,
546 struct recv_frame *precv_frame) 546 struct recv_frame *precv_frame)
547{ 547{
548 u8 *psta_addr = NULL, *ptr; 548 u8 *psta_addr, *ptr;
549 uint auth_alg; 549 uint auth_alg;
550 struct recv_frame *pfhdr; 550 struct recv_frame *pfhdr;
551 struct sta_info *psta; 551 struct sta_info *psta;
552 struct sta_priv *pstapriv; 552 struct sta_priv *pstapriv;
553 struct recv_frame *prtnframe; 553 struct recv_frame *prtnframe;
554 u16 ether_type = 0; 554 u16 ether_type;
555 u16 eapol_type = 0x888e;/* for Funia BD's WPA issue */ 555 u16 eapol_type = 0x888e;/* for Funia BD's WPA issue */
556 struct rx_pkt_attrib *pattrib; 556 struct rx_pkt_attrib *pattrib;
557 __be16 be_tmp;
558 557
559 558
560 pstapriv = &adapter->stapriv; 559 pstapriv = &adapter->stapriv;
561 psta = rtw_get_stainfo(pstapriv, psta_addr);
562 560
563 auth_alg = adapter->securitypriv.dot11AuthAlgrthm; 561 auth_alg = adapter->securitypriv.dot11AuthAlgrthm;
564 562
@@ -566,24 +564,23 @@ static struct recv_frame *portctrl(struct adapter *adapter,
566 pfhdr = precv_frame; 564 pfhdr = precv_frame;
567 pattrib = &pfhdr->attrib; 565 pattrib = &pfhdr->attrib;
568 psta_addr = pattrib->ta; 566 psta_addr = pattrib->ta;
567 psta = rtw_get_stainfo(pstapriv, psta_addr);
569 568
570 prtnframe = NULL; 569 prtnframe = NULL;
571 570
572 RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:adapter->securitypriv.dot11AuthAlgrthm=%d\n", adapter->securitypriv.dot11AuthAlgrthm)); 571 RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:adapter->securitypriv.dot11AuthAlgrthm=%d\n", adapter->securitypriv.dot11AuthAlgrthm));
573 572
574 if (auth_alg == 2) { 573 if (auth_alg == 2) {
574 /* get ether_type */
575 ptr = ptr + pfhdr->attrib.hdrlen + LLC_HEADER_SIZE;
576 memcpy(&ether_type, ptr, 2);
577 ether_type = ntohs((unsigned short)ether_type);
578
575 if ((psta != NULL) && (psta->ieee8021x_blocked)) { 579 if ((psta != NULL) && (psta->ieee8021x_blocked)) {
576 /* blocked */ 580 /* blocked */
577 /* only accept EAPOL frame */ 581 /* only accept EAPOL frame */
578 RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:psta->ieee8021x_blocked==1\n")); 582 RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:psta->ieee8021x_blocked==1\n"));
579 583
580 prtnframe = precv_frame;
581
582 /* get ether_type */
583 ptr = ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE;
584 memcpy(&be_tmp, ptr, 2);
585 ether_type = ntohs(be_tmp);
586
587 if (ether_type == eapol_type) { 584 if (ether_type == eapol_type) {
588 prtnframe = precv_frame; 585 prtnframe = precv_frame;
589 } else { 586 } else {
diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
index 2636e7f3dbb8..cf30a08912d1 100644
--- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
@@ -359,7 +359,7 @@ static char *translate_scan(struct adapter *padapter,
359 if (wpa_len > 0) { 359 if (wpa_len > 0) {
360 p = buf; 360 p = buf;
361 _rtw_memset(buf, 0, MAX_WPA_IE_LEN); 361 _rtw_memset(buf, 0, MAX_WPA_IE_LEN);
362 p += sprintf(p, "wpa_ie ="); 362 p += sprintf(p, "wpa_ie=");
363 for (i = 0; i < wpa_len; i++) 363 for (i = 0; i < wpa_len; i++)
364 p += sprintf(p, "%02x", wpa_ie[i]); 364 p += sprintf(p, "%02x", wpa_ie[i]);
365 365
@@ -376,7 +376,7 @@ static char *translate_scan(struct adapter *padapter,
376 if (rsn_len > 0) { 376 if (rsn_len > 0) {
377 p = buf; 377 p = buf;
378 _rtw_memset(buf, 0, MAX_WPA_IE_LEN); 378 _rtw_memset(buf, 0, MAX_WPA_IE_LEN);
379 p += sprintf(p, "rsn_ie ="); 379 p += sprintf(p, "rsn_ie=");
380 for (i = 0; i < rsn_len; i++) 380 for (i = 0; i < rsn_len; i++)
381 p += sprintf(p, "%02x", rsn_ie[i]); 381 p += sprintf(p, "%02x", rsn_ie[i]);
382 _rtw_memset(&iwe, 0, sizeof(iwe)); 382 _rtw_memset(&iwe, 0, sizeof(iwe));
@@ -2899,7 +2899,7 @@ static int rtw_p2p_get_status(struct net_device *dev,
2899 /* Commented by Albert 2010/10/12 */ 2899 /* Commented by Albert 2010/10/12 */
2900 /* Because of the output size limitation, I had removed the "Role" information. */ 2900 /* Because of the output size limitation, I had removed the "Role" information. */
2901 /* About the "Role" information, we will use the new private IOCTL to get the "Role" information. */ 2901 /* About the "Role" information, we will use the new private IOCTL to get the "Role" information. */
2902 sprintf(extra, "\n\nStatus =%.2d\n", rtw_p2p_state(pwdinfo)); 2902 sprintf(extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo));
2903 wrqu->data.length = strlen(extra); 2903 wrqu->data.length = strlen(extra);
2904 2904
2905 return ret; 2905 return ret;
@@ -2918,7 +2918,7 @@ static int rtw_p2p_get_req_cm(struct net_device *dev,
2918 struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); 2918 struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
2919 struct wifidirect_info *pwdinfo = &(padapter->wdinfo); 2919 struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
2920 2920
2921 sprintf(extra, "\n\nCM =%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req); 2921 sprintf(extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
2922 wrqu->data.length = strlen(extra); 2922 wrqu->data.length = strlen(extra);
2923 return ret; 2923 return ret;
2924} 2924}
@@ -2935,7 +2935,7 @@ static int rtw_p2p_get_role(struct net_device *dev,
2935 pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], 2935 pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2],
2936 pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); 2936 pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]);
2937 2937
2938 sprintf(extra, "\n\nRole =%.2d\n", rtw_p2p_role(pwdinfo)); 2938 sprintf(extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo));
2939 wrqu->data.length = strlen(extra); 2939 wrqu->data.length = strlen(extra);
2940 return ret; 2940 return ret;
2941} 2941}
@@ -3022,7 +3022,7 @@ static int rtw_p2p_get_op_ch(struct net_device *dev,
3022 3022
3023 DBG_88E("[%s] Op_ch = %02x\n", __func__, pwdinfo->operating_channel); 3023 DBG_88E("[%s] Op_ch = %02x\n", __func__, pwdinfo->operating_channel);
3024 3024
3025 sprintf(extra, "\n\nOp_ch =%.2d\n", pwdinfo->operating_channel); 3025 sprintf(extra, "\n\nOp_ch=%.2d\n", pwdinfo->operating_channel);
3026 wrqu->data.length = strlen(extra); 3026 wrqu->data.length = strlen(extra);
3027 return ret; 3027 return ret;
3028} 3028}
@@ -3043,7 +3043,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
3043 u8 blnMatch = 0; 3043 u8 blnMatch = 0;
3044 u16 attr_content = 0; 3044 u16 attr_content = 0;
3045 uint attr_contentlen = 0; 3045 uint attr_contentlen = 0;
3046 /* 6 is the string "wpsCM =", 17 is the MAC addr, we have to clear it at wrqu->data.pointer */ 3046 /* 6 is the string "wpsCM=", 17 is the MAC addr, we have to clear it at wrqu->data.pointer */
3047 u8 attr_content_str[6 + 17] = {0x00}; 3047 u8 attr_content_str[6 + 17] = {0x00};
3048 3048
3049 /* Commented by Albert 20110727 */ 3049 /* Commented by Albert 20110727 */
@@ -3079,7 +3079,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
3079 rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *) &be_tmp, &attr_contentlen); 3079 rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *) &be_tmp, &attr_contentlen);
3080 if (attr_contentlen) { 3080 if (attr_contentlen) {
3081 attr_content = be16_to_cpu(be_tmp); 3081 attr_content = be16_to_cpu(be_tmp);
3082 sprintf(attr_content_str, "\n\nM =%.4d", attr_content); 3082 sprintf(attr_content_str, "\n\nM=%.4d", attr_content);
3083 blnMatch = 1; 3083 blnMatch = 1;
3084 } 3084 }
3085 } 3085 }
@@ -3091,7 +3091,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
3091 spin_unlock_bh(&pmlmepriv->scanned_queue.lock); 3091 spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
3092 3092
3093 if (!blnMatch) 3093 if (!blnMatch)
3094 sprintf(attr_content_str, "\n\nM = 0000"); 3094 sprintf(attr_content_str, "\n\nM=0000");
3095 3095
3096 if (copy_to_user(wrqu->data.pointer, attr_content_str, 6 + 17)) 3096 if (copy_to_user(wrqu->data.pointer, attr_content_str, 6 + 17))
3097 return -EFAULT; 3097 return -EFAULT;
@@ -3172,9 +3172,9 @@ static int rtw_p2p_get_go_device_address(struct net_device *dev,
3172 spin_unlock_bh(&pmlmepriv->scanned_queue.lock); 3172 spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
3173 3173
3174 if (!blnMatch) 3174 if (!blnMatch)
3175 snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add = NULL"); 3175 snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add=NULL");
3176 else 3176 else
3177 snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add =%.2X:%.2X:%.2X:%.2X:%.2X:%.2X", 3177 snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add=%.2X:%.2X:%.2X:%.2X:%.2X:%.2X",
3178 attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]); 3178 attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]);
3179 3179
3180 if (copy_to_user(wrqu->data.pointer, go_devadd_str, sizeof(go_devadd_str))) 3180 if (copy_to_user(wrqu->data.pointer, go_devadd_str, sizeof(go_devadd_str)))
@@ -3198,7 +3198,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
3198 u8 blnMatch = 0; 3198 u8 blnMatch = 0;
3199 u8 dev_type[8] = {0x00}; 3199 u8 dev_type[8] = {0x00};
3200 uint dev_type_len = 0; 3200 uint dev_type_len = 0;
3201 u8 dev_type_str[17 + 9] = {0x00}; /* +9 is for the str "dev_type =", we have to clear it at wrqu->data.pointer */ 3201 u8 dev_type_str[17 + 9] = {0x00}; /* +9 is for the str "dev_type=", we have to clear it at wrqu->data.pointer */
3202 3202
3203 /* Commented by Albert 20121209 */ 3203 /* Commented by Albert 20121209 */
3204 /* The input data is the MAC address which the application wants to know its device type. */ 3204 /* The input data is the MAC address which the application wants to know its device type. */
@@ -3239,7 +3239,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
3239 3239
3240 memcpy(&be_tmp, dev_type, 2); 3240 memcpy(&be_tmp, dev_type, 2);
3241 type = be16_to_cpu(be_tmp); 3241 type = be16_to_cpu(be_tmp);
3242 sprintf(dev_type_str, "\n\nN =%.2d", type); 3242 sprintf(dev_type_str, "\n\nN=%.2d", type);
3243 blnMatch = 1; 3243 blnMatch = 1;
3244 } 3244 }
3245 } 3245 }
@@ -3252,7 +3252,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
3252 spin_unlock_bh(&pmlmepriv->scanned_queue.lock); 3252 spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
3253 3253
3254 if (!blnMatch) 3254 if (!blnMatch)
3255 sprintf(dev_type_str, "\n\nN = 00"); 3255 sprintf(dev_type_str, "\n\nN=00");
3256 3256
3257 if (copy_to_user(wrqu->data.pointer, dev_type_str, 9 + 17)) { 3257 if (copy_to_user(wrqu->data.pointer, dev_type_str, 9 + 17)) {
3258 return -EFAULT; 3258 return -EFAULT;
@@ -3277,7 +3277,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
3277 u8 blnMatch = 0; 3277 u8 blnMatch = 0;
3278 u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = {0x00}; 3278 u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = {0x00};
3279 uint dev_len = 0; 3279 uint dev_len = 0;
3280 u8 dev_name_str[WPS_MAX_DEVICE_NAME_LEN + 5] = {0x00}; /* +5 is for the str "devN =", we have to clear it at wrqu->data.pointer */ 3280 u8 dev_name_str[WPS_MAX_DEVICE_NAME_LEN + 5] = {0x00}; /* +5 is for the str "devN=", we have to clear it at wrqu->data.pointer */
3281 3281
3282 /* Commented by Albert 20121225 */ 3282 /* Commented by Albert 20121225 */
3283 /* The input data is the MAC address which the application wants to know its device name. */ 3283 /* The input data is the MAC address which the application wants to know its device name. */
@@ -3310,7 +3310,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
3310 if (wpsie) { 3310 if (wpsie) {
3311 rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len); 3311 rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len);
3312 if (dev_len) { 3312 if (dev_len) {
3313 sprintf(dev_name_str, "\n\nN =%s", dev_name); 3313 sprintf(dev_name_str, "\n\nN=%s", dev_name);
3314 blnMatch = 1; 3314 blnMatch = 1;
3315 } 3315 }
3316 } 3316 }
@@ -3323,7 +3323,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
3323 spin_unlock_bh(&pmlmepriv->scanned_queue.lock); 3323 spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
3324 3324
3325 if (!blnMatch) 3325 if (!blnMatch)
3326 sprintf(dev_name_str, "\n\nN = 0000"); 3326 sprintf(dev_name_str, "\n\nN=0000");
3327 3327
3328 if (copy_to_user(wrqu->data.pointer, dev_name_str, 5 + ((dev_len > 17) ? dev_len : 17))) 3328 if (copy_to_user(wrqu->data.pointer, dev_name_str, 5 + ((dev_len > 17) ? dev_len : 17)))
3329 return -EFAULT; 3329 return -EFAULT;
@@ -3349,7 +3349,7 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev,
3349 u8 attr_content[2] = {0x00}; 3349 u8 attr_content[2] = {0x00};
3350 3350
3351 u8 inv_proc_str[17 + 8] = {0x00}; 3351 u8 inv_proc_str[17 + 8] = {0x00};
3352 /* +8 is for the str "InvProc =", we have to clear it at wrqu->data.pointer */ 3352 /* +8 is for the str "InvProc=", we have to clear it at wrqu->data.pointer */
3353 3353
3354 /* Commented by Ouden 20121226 */ 3354 /* Commented by Ouden 20121226 */
3355 /* The application wants to know P2P initiation procedure is supported or not. */ 3355 /* The application wants to know P2P initiation procedure is supported or not. */
@@ -3397,12 +3397,12 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev,
3397 spin_unlock_bh(&pmlmepriv->scanned_queue.lock); 3397 spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
3398 3398
3399 if (!blnMatch) { 3399 if (!blnMatch) {
3400 sprintf(inv_proc_str, "\nIP =-1"); 3400 sprintf(inv_proc_str, "\nIP=-1");
3401 } else { 3401 } else {
3402 if (attr_content[0] & 0x20) 3402 if (attr_content[0] & 0x20)
3403 sprintf(inv_proc_str, "\nIP = 1"); 3403 sprintf(inv_proc_str, "\nIP=1");
3404 else 3404 else
3405 sprintf(inv_proc_str, "\nIP = 0"); 3405 sprintf(inv_proc_str, "\nIP=0");
3406 } 3406 }
3407 if (copy_to_user(wrqu->data.pointer, inv_proc_str, 8 + 17)) 3407 if (copy_to_user(wrqu->data.pointer, inv_proc_str, 8 + 17))
3408 return -EFAULT; 3408 return -EFAULT;
@@ -3512,7 +3512,7 @@ static int rtw_p2p_invite_req(struct net_device *dev,
3512 /* The input data contains two informations. */ 3512 /* The input data contains two informations. */
3513 /* 1. First information is the P2P device address which you want to send to. */ 3513 /* 1. First information is the P2P device address which you want to send to. */
3514 /* 2. Second information is the group id which combines with GO's mac address, space and GO's ssid. */ 3514 /* 2. Second information is the group id which combines with GO's mac address, space and GO's ssid. */
3515 /* Command line sample: iwpriv wlan0 p2p_set invite ="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" */ 3515 /* Command line sample: iwpriv wlan0 p2p_set invite="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" */
3516 /* Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy */ 3516 /* Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy */
3517 3517
3518 DBG_88E("[%s] data = %s\n", __func__, extra); 3518 DBG_88E("[%s] data = %s\n", __func__, extra);
@@ -3805,48 +3805,48 @@ static int rtw_p2p_set(struct net_device *dev,
3805 3805
3806#ifdef CONFIG_88EU_P2P 3806#ifdef CONFIG_88EU_P2P
3807 DBG_88E("[%s] extra = %s\n", __func__, extra); 3807 DBG_88E("[%s] extra = %s\n", __func__, extra);
3808 if (!memcmp(extra, "enable =", 7)) { 3808 if (!memcmp(extra, "enable=", 7)) {
3809 rtw_wext_p2p_enable(dev, info, wrqu, &extra[7]); 3809 rtw_wext_p2p_enable(dev, info, wrqu, &extra[7]);
3810 } else if (!memcmp(extra, "setDN =", 6)) { 3810 } else if (!memcmp(extra, "setDN=", 6)) {
3811 wrqu->data.length -= 6; 3811 wrqu->data.length -= 6;
3812 rtw_p2p_setDN(dev, info, wrqu, &extra[6]); 3812 rtw_p2p_setDN(dev, info, wrqu, &extra[6]);
3813 } else if (!memcmp(extra, "profilefound =", 13)) { 3813 } else if (!memcmp(extra, "profilefound=", 13)) {
3814 wrqu->data.length -= 13; 3814 wrqu->data.length -= 13;
3815 rtw_p2p_profilefound(dev, info, wrqu, &extra[13]); 3815 rtw_p2p_profilefound(dev, info, wrqu, &extra[13]);
3816 } else if (!memcmp(extra, "prov_disc =", 10)) { 3816 } else if (!memcmp(extra, "prov_disc=", 10)) {
3817 wrqu->data.length -= 10; 3817 wrqu->data.length -= 10;
3818 rtw_p2p_prov_disc(dev, info, wrqu, &extra[10]); 3818 rtw_p2p_prov_disc(dev, info, wrqu, &extra[10]);
3819 } else if (!memcmp(extra, "nego =", 5)) { 3819 } else if (!memcmp(extra, "nego=", 5)) {
3820 wrqu->data.length -= 5; 3820 wrqu->data.length -= 5;
3821 rtw_p2p_connect(dev, info, wrqu, &extra[5]); 3821 rtw_p2p_connect(dev, info, wrqu, &extra[5]);
3822 } else if (!memcmp(extra, "intent =", 7)) { 3822 } else if (!memcmp(extra, "intent=", 7)) {
3823 /* Commented by Albert 2011/03/23 */ 3823 /* Commented by Albert 2011/03/23 */
3824 /* The wrqu->data.length will include the null character */ 3824 /* The wrqu->data.length will include the null character */
3825 /* So, we will decrease 7 + 1 */ 3825 /* So, we will decrease 7 + 1 */
3826 wrqu->data.length -= 8; 3826 wrqu->data.length -= 8;
3827 rtw_p2p_set_intent(dev, info, wrqu, &extra[7]); 3827 rtw_p2p_set_intent(dev, info, wrqu, &extra[7]);
3828 } else if (!memcmp(extra, "ssid =", 5)) { 3828 } else if (!memcmp(extra, "ssid=", 5)) {
3829 wrqu->data.length -= 5; 3829 wrqu->data.length -= 5;
3830 rtw_p2p_set_go_nego_ssid(dev, info, wrqu, &extra[5]); 3830 rtw_p2p_set_go_nego_ssid(dev, info, wrqu, &extra[5]);
3831 } else if (!memcmp(extra, "got_wpsinfo =", 12)) { 3831 } else if (!memcmp(extra, "got_wpsinfo=", 12)) {
3832 wrqu->data.length -= 12; 3832 wrqu->data.length -= 12;
3833 rtw_p2p_got_wpsinfo(dev, info, wrqu, &extra[12]); 3833 rtw_p2p_got_wpsinfo(dev, info, wrqu, &extra[12]);
3834 } else if (!memcmp(extra, "listen_ch =", 10)) { 3834 } else if (!memcmp(extra, "listen_ch=", 10)) {
3835 /* Commented by Albert 2011/05/24 */ 3835 /* Commented by Albert 2011/05/24 */
3836 /* The wrqu->data.length will include the null character */ 3836 /* The wrqu->data.length will include the null character */
3837 /* So, we will decrease (10 + 1) */ 3837 /* So, we will decrease (10 + 1) */
3838 wrqu->data.length -= 11; 3838 wrqu->data.length -= 11;
3839 rtw_p2p_set_listen_ch(dev, info, wrqu, &extra[10]); 3839 rtw_p2p_set_listen_ch(dev, info, wrqu, &extra[10]);
3840 } else if (!memcmp(extra, "op_ch =", 6)) { 3840 } else if (!memcmp(extra, "op_ch=", 6)) {
3841 /* Commented by Albert 2011/05/24 */ 3841 /* Commented by Albert 2011/05/24 */
3842 /* The wrqu->data.length will include the null character */ 3842 /* The wrqu->data.length will include the null character */
3843 /* So, we will decrease (6 + 1) */ 3843 /* So, we will decrease (6 + 1) */
3844 wrqu->data.length -= 7; 3844 wrqu->data.length -= 7;
3845 rtw_p2p_set_op_ch(dev, info, wrqu, &extra[6]); 3845 rtw_p2p_set_op_ch(dev, info, wrqu, &extra[6]);
3846 } else if (!memcmp(extra, "invite =", 7)) { 3846 } else if (!memcmp(extra, "invite=", 7)) {
3847 wrqu->data.length -= 8; 3847 wrqu->data.length -= 8;
3848 rtw_p2p_invite_req(dev, info, wrqu, &extra[7]); 3848 rtw_p2p_invite_req(dev, info, wrqu, &extra[7]);
3849 } else if (!memcmp(extra, "persistent =", 11)) { 3849 } else if (!memcmp(extra, "persistent=", 11)) {
3850 wrqu->data.length -= 11; 3850 wrqu->data.length -= 11;
3851 rtw_p2p_set_persistent(dev, info, wrqu, &extra[11]); 3851 rtw_p2p_set_persistent(dev, info, wrqu, &extra[11]);
3852 } 3852 }
@@ -3887,7 +3887,7 @@ static int rtw_p2p_get(struct net_device *dev,
3887 "group_id", 8)) { 3887 "group_id", 8)) {
3888 rtw_p2p_get_groupid(dev, info, wrqu, extra); 3888 rtw_p2p_get_groupid(dev, info, wrqu, extra);
3889 } else if (!memcmp((__force const char *)wrqu->data.pointer, 3889 } else if (!memcmp((__force const char *)wrqu->data.pointer,
3890 "peer_deva_inv", 9)) { 3890 "peer_deva_inv", 13)) {
3891 /* Get the P2P device address when receiving the P2P Invitation request frame. */ 3891 /* Get the P2P device address when receiving the P2P Invitation request frame. */
3892 rtw_p2p_get_peer_devaddr_by_invitation(dev, info, wrqu, extra); 3892 rtw_p2p_get_peer_devaddr_by_invitation(dev, info, wrqu, extra);
3893 } else if (!memcmp((__force const char *)wrqu->data.pointer, 3893 } else if (!memcmp((__force const char *)wrqu->data.pointer,
@@ -6920,7 +6920,7 @@ static int rtw_mp_ctx(struct net_device *dev,
6920 6920
6921 DBG_88E("%s: in =%s\n", __func__, extra); 6921 DBG_88E("%s: in =%s\n", __func__, extra);
6922 6922
6923 countPkTx = strncmp(extra, "count =", 5); /* strncmp true is 0 */ 6923 countPkTx = strncmp(extra, "count=", 6); /* strncmp true is 0 */
6924 cotuTx = strncmp(extra, "background", 20); 6924 cotuTx = strncmp(extra, "background", 20);
6925 CarrSprTx = strncmp(extra, "background, cs", 20); 6925 CarrSprTx = strncmp(extra, "background, cs", 20);
6926 scTx = strncmp(extra, "background, sc", 20); 6926 scTx = strncmp(extra, "background, sc", 20);
@@ -7044,7 +7044,7 @@ static int rtw_mp_arx(struct net_device *dev,
7044 DBG_88E("%s: %s\n", __func__, input); 7044 DBG_88E("%s: %s\n", __func__, input);
7045 7045
7046 bStartRx = (strncmp(input, "start", 5) == 0) ? 1 : 0; /* strncmp true is 0 */ 7046 bStartRx = (strncmp(input, "start", 5) == 0) ? 1 : 0; /* strncmp true is 0 */
7047 bStopRx = (strncmp(input, "stop", 5) == 0) ? 1 : 0; /* strncmp true is 0 */ 7047 bStopRx = (strncmp(input, "stop", 4) == 0) ? 1 : 0; /* strncmp true is 0 */
7048 bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp true is 0 */ 7048 bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp true is 0 */
7049 7049
7050 if (bStartRx) { 7050 if (bStartRx) {
diff --git a/drivers/staging/rtl8712/rtl871x_recv.c b/drivers/staging/rtl8712/rtl871x_recv.c
index 23ec684b60e1..274c359279ef 100644
--- a/drivers/staging/rtl8712/rtl871x_recv.c
+++ b/drivers/staging/rtl8712/rtl871x_recv.c
@@ -254,7 +254,7 @@ union recv_frame *r8712_portctrl(struct _adapter *adapter,
254 struct sta_info *psta; 254 struct sta_info *psta;
255 struct sta_priv *pstapriv; 255 struct sta_priv *pstapriv;
256 union recv_frame *prtnframe; 256 union recv_frame *prtnframe;
257 u16 ether_type = 0; 257 u16 ether_type;
258 258
259 pstapriv = &adapter->stapriv; 259 pstapriv = &adapter->stapriv;
260 ptr = get_recvframe_data(precv_frame); 260 ptr = get_recvframe_data(precv_frame);
@@ -263,15 +263,14 @@ union recv_frame *r8712_portctrl(struct _adapter *adapter,
263 psta = r8712_get_stainfo(pstapriv, psta_addr); 263 psta = r8712_get_stainfo(pstapriv, psta_addr);
264 auth_alg = adapter->securitypriv.AuthAlgrthm; 264 auth_alg = adapter->securitypriv.AuthAlgrthm;
265 if (auth_alg == 2) { 265 if (auth_alg == 2) {
266 /* get ether_type */
267 ptr = ptr + pfhdr->attrib.hdrlen + LLC_HEADER_SIZE;
268 memcpy(&ether_type, ptr, 2);
269 ether_type = ntohs((unsigned short)ether_type);
270
266 if ((psta != NULL) && (psta->ieee8021x_blocked)) { 271 if ((psta != NULL) && (psta->ieee8021x_blocked)) {
267 /* blocked 272 /* blocked
268 * only accept EAPOL frame */ 273 * only accept EAPOL frame */
269 prtnframe = precv_frame;
270 /*get ether_type */
271 ptr = ptr + pfhdr->attrib.hdrlen +
272 pfhdr->attrib.iv_len + LLC_HEADER_SIZE;
273 memcpy(&ether_type, ptr, 2);
274 ether_type = ntohs((unsigned short)ether_type);
275 if (ether_type == 0x888e) 274 if (ether_type == 0x888e)
276 prtnframe = precv_frame; 275 prtnframe = precv_frame;
277 else { 276 else {
diff --git a/drivers/staging/rtl8723au/core/rtw_ieee80211.c b/drivers/staging/rtl8723au/core/rtw_ieee80211.c
index 780631fd3b6d..a48ab25a7d8a 100644
--- a/drivers/staging/rtl8723au/core/rtw_ieee80211.c
+++ b/drivers/staging/rtl8723au/core/rtw_ieee80211.c
@@ -1496,45 +1496,23 @@ void rtw_wlan_bssid_ex_remove_p2p_attr23a(struct wlan_bssid_ex *bss_ex, u8 attr_
1496int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) 1496int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen)
1497{ 1497{
1498 int match; 1498 int match;
1499 uint cnt = 0; 1499 const u8 *ie;
1500 u8 eid, wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A};
1501 1500
1502 match = false; 1501 match = 0;
1503 1502
1504 if (in_len < 0) { 1503 if (in_len < 0)
1505 return match; 1504 return match;
1506 }
1507
1508 while (cnt < in_len)
1509 {
1510 eid = in_ie[cnt];
1511 1505
1512 if ((eid == _VENDOR_SPECIFIC_IE_) && 1506 ie = cfg80211_find_vendor_ie(0x506F9A, 0x0A, in_ie, in_len);
1513 !memcmp(&in_ie[cnt+2], wfd_oui, 4)) { 1507 if (ie && (ie[1] <= (MAX_WFD_IE_LEN - 2))) {
1514 if (wfd_ie != NULL) { 1508 if (wfd_ie) {
1515 memcpy(wfd_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); 1509 *wfd_ielen = ie[1] + 2;
1516 1510 memcpy(wfd_ie, ie, ie[1] + 2);
1517 } else { 1511 } else
1518 if (wfd_ielen != NULL) { 1512 if (wfd_ielen)
1519 *wfd_ielen = 0; 1513 *wfd_ielen = 0;
1520 }
1521 }
1522
1523 if (wfd_ielen != NULL) {
1524 *wfd_ielen = in_ie[cnt + 1] + 2;
1525 }
1526
1527 cnt += in_ie[cnt + 1] + 2;
1528
1529 match = true;
1530 break;
1531 } else {
1532 cnt += in_ie[cnt + 1] +2; /* goto next */
1533 }
1534 }
1535 1514
1536 if (match == true) { 1515 match = 1;
1537 match = cnt;
1538 } 1516 }
1539 1517
1540 return match; 1518 return match;
diff --git a/drivers/staging/rtl8723au/core/rtw_mlme_ext.c b/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
index 4c753639ea5a..1f3e8a0aece4 100644
--- a/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
+++ b/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
@@ -1281,7 +1281,7 @@ unsigned int OnAssocReq23a(struct rtw_adapter *padapter, struct recv_frame *prec
1281 u8 p2p_status_code = P2P_STATUS_SUCCESS; 1281 u8 p2p_status_code = P2P_STATUS_SUCCESS;
1282 u8 *p2pie; 1282 u8 *p2pie;
1283 u32 p2pielen = 0; 1283 u32 p2pielen = 0;
1284 u8 wfd_ie[ 128 ] = { 0x00 }; 1284 u8 wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
1285 u32 wfd_ielen = 0; 1285 u32 wfd_ielen = 0;
1286#endif /* CONFIG_8723AU_P2P */ 1286#endif /* CONFIG_8723AU_P2P */
1287 1287
diff --git a/drivers/staging/rtl8723au/core/rtw_p2p.c b/drivers/staging/rtl8723au/core/rtw_p2p.c
index 27a6cc76973d..1a961e3f3a55 100644
--- a/drivers/staging/rtl8723au/core/rtw_p2p.c
+++ b/drivers/staging/rtl8723au/core/rtw_p2p.c
@@ -2535,7 +2535,7 @@ u8 process_p2p_group_negotation_req23a(struct wifidirect_info *pwdinfo, u8 *pfra
2535 u16 wps_devicepassword_id = 0x0000; 2535 u16 wps_devicepassword_id = 0x0000;
2536 uint wps_devicepassword_id_len = 0; 2536 uint wps_devicepassword_id_len = 0;
2537#ifdef CONFIG_8723AU_P2P 2537#ifdef CONFIG_8723AU_P2P
2538 u8 wfd_ie[ 128 ] = { 0x00 }; 2538 u8 wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
2539 u32 wfd_ielen = 0; 2539 u32 wfd_ielen = 0;
2540#endif /* CONFIG_8723AU_P2P */ 2540#endif /* CONFIG_8723AU_P2P */
2541 2541
@@ -2741,7 +2741,7 @@ u8 process_p2p_group_negotation_resp23a(struct wifidirect_info *pwdinfo, u8 *pfr
2741 u32 ies_len; 2741 u32 ies_len;
2742 u8 * p2p_ie; 2742 u8 * p2p_ie;
2743#ifdef CONFIG_8723AU_P2P 2743#ifdef CONFIG_8723AU_P2P
2744 u8 wfd_ie[ 128 ] = { 0x00 }; 2744 u8 wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
2745 u32 wfd_ielen = 0; 2745 u32 wfd_ielen = 0;
2746#endif /* CONFIG_8723AU_P2P */ 2746#endif /* CONFIG_8723AU_P2P */
2747 2747
diff --git a/drivers/staging/rtl8723au/core/rtw_wlan_util.c b/drivers/staging/rtl8723au/core/rtw_wlan_util.c
index 0dfcfbce3b52..99d81e612e7b 100644
--- a/drivers/staging/rtl8723au/core/rtw_wlan_util.c
+++ b/drivers/staging/rtl8723au/core/rtw_wlan_util.c
@@ -570,7 +570,7 @@ void flush_all_cam_entry23a(struct rtw_adapter *padapter)
570int WFD_info_handler(struct rtw_adapter *padapter, struct ndis_802_11_var_ies * pIE) 570int WFD_info_handler(struct rtw_adapter *padapter, struct ndis_802_11_var_ies * pIE)
571{ 571{
572 struct wifidirect_info *pwdinfo; 572 struct wifidirect_info *pwdinfo;
573 u8 wfd_ie[128] = {0x00}; 573 u8 wfd_ie[MAX_WFD_IE_LEN] = {0x00};
574 u32 wfd_ielen = 0; 574 u32 wfd_ielen = 0;
575 575
576 pwdinfo = &padapter->wdinfo; 576 pwdinfo = &padapter->wdinfo;
@@ -681,7 +681,7 @@ void WMMOnAssocRsp23a(struct rtw_adapter *padapter)
681 inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; 681 inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3;
682 682
683 if (pregpriv->wifi_spec == 1) { 683 if (pregpriv->wifi_spec == 1) {
684 u32 j, tmp, change_inx; 684 u32 j, tmp, change_inx = false;
685 685
686 /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ 686 /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */
687 for (i = 0; i < 4; i++) { 687 for (i = 0; i < 4; i++) {
diff --git a/drivers/staging/rtl8821ae/base.c b/drivers/staging/rtl8821ae/base.c
index e5073fe24770..a4c9cc437bc6 100644
--- a/drivers/staging/rtl8821ae/base.c
+++ b/drivers/staging/rtl8821ae/base.c
@@ -388,7 +388,7 @@ static void _rtl_init_mac80211(struct ieee80211_hw *hw)
388 388
389} 389}
390 390
391static void _rtl_init_deferred_work(struct ieee80211_hw *hw) 391static int _rtl_init_deferred_work(struct ieee80211_hw *hw)
392{ 392{
393 struct rtl_priv *rtlpriv = rtl_priv(hw); 393 struct rtl_priv *rtlpriv = rtl_priv(hw);
394 394
@@ -410,6 +410,9 @@ static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
410 rtlpriv->works.rtl_wq = create_workqueue(rtlpriv->cfg->name); 410 rtlpriv->works.rtl_wq = create_workqueue(rtlpriv->cfg->name);
411#endif 411#endif
412/*<delete in kernel end>*/ 412/*<delete in kernel end>*/
413 if (!rtlpriv->works.rtl_wq)
414 return -ENOMEM;
415
413 INIT_DELAYED_WORK(&rtlpriv->works.watchdog_wq, 416 INIT_DELAYED_WORK(&rtlpriv->works.watchdog_wq,
414 (void *)rtl_watchdog_wq_callback); 417 (void *)rtl_watchdog_wq_callback);
415 INIT_DELAYED_WORK(&rtlpriv->works.ips_nic_off_wq, 418 INIT_DELAYED_WORK(&rtlpriv->works.ips_nic_off_wq,
@@ -421,6 +424,8 @@ static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
421 INIT_DELAYED_WORK(&rtlpriv->works.fwevt_wq, 424 INIT_DELAYED_WORK(&rtlpriv->works.fwevt_wq,
422 (void *)rtl_fwevt_wq_callback); 425 (void *)rtl_fwevt_wq_callback);
423 426
427 return 0;
428
424} 429}
425 430
426void rtl_deinit_deferred_work(struct ieee80211_hw *hw) 431void rtl_deinit_deferred_work(struct ieee80211_hw *hw)
@@ -519,7 +524,8 @@ int rtl_init_core(struct ieee80211_hw *hw)
519 INIT_LIST_HEAD(&rtlpriv->entry_list); 524 INIT_LIST_HEAD(&rtlpriv->entry_list);
520 525
521 /* <6> init deferred work */ 526 /* <6> init deferred work */
522 _rtl_init_deferred_work(hw); 527 if (_rtl_init_deferred_work(hw))
528 return 1;
523 529
524 /* <7> */ 530 /* <7> */
525#ifdef VIF_TODO 531#ifdef VIF_TODO
diff --git a/drivers/staging/speakup/main.c b/drivers/staging/speakup/main.c
index ef5933b93590..3b6e5358c723 100644
--- a/drivers/staging/speakup/main.c
+++ b/drivers/staging/speakup/main.c
@@ -1855,8 +1855,9 @@ static int handle_goto(struct vc_data *vc, u_char type, u_char ch, u_short key)
1855{ 1855{
1856 static u_char goto_buf[8]; 1856 static u_char goto_buf[8];
1857 static int num; 1857 static int num;
1858 int maxlen, go_pos; 1858 int maxlen;
1859 char *cp; 1859 char *cp;
1860
1860 if (type == KT_SPKUP && ch == SPEAKUP_GOTO) 1861 if (type == KT_SPKUP && ch == SPEAKUP_GOTO)
1861 goto do_goto; 1862 goto do_goto;
1862 if (type == KT_LATIN && ch == '\n') 1863 if (type == KT_LATIN && ch == '\n')
@@ -1891,25 +1892,24 @@ oops:
1891 spk_special_handler = NULL; 1892 spk_special_handler = NULL;
1892 return 1; 1893 return 1;
1893 } 1894 }
1894 go_pos = kstrtol(goto_buf, 10, (long *)&cp); 1895
1895 goto_pos = (u_long) go_pos; 1896 goto_pos = simple_strtoul(goto_buf, &cp, 10);
1897
1896 if (*cp == 'x') { 1898 if (*cp == 'x') {
1897 if (*goto_buf < '0') 1899 if (*goto_buf < '0')
1898 goto_pos += spk_x; 1900 goto_pos += spk_x;
1899 else 1901 else if (goto_pos > 0)
1900 goto_pos--; 1902 goto_pos--;
1901 if (goto_pos < 0) 1903
1902 goto_pos = 0;
1903 if (goto_pos >= vc->vc_cols) 1904 if (goto_pos >= vc->vc_cols)
1904 goto_pos = vc->vc_cols - 1; 1905 goto_pos = vc->vc_cols - 1;
1905 goto_x = 1; 1906 goto_x = 1;
1906 } else { 1907 } else {
1907 if (*goto_buf < '0') 1908 if (*goto_buf < '0')
1908 goto_pos += spk_y; 1909 goto_pos += spk_y;
1909 else 1910 else if (goto_pos > 0)
1910 goto_pos--; 1911 goto_pos--;
1911 if (goto_pos < 0) 1912
1912 goto_pos = 0;
1913 if (goto_pos >= vc->vc_rows) 1913 if (goto_pos >= vc->vc_rows)
1914 goto_pos = vc->vc_rows - 1; 1914 goto_pos = vc->vc_rows - 1;
1915 goto_x = 0; 1915 goto_x = 0;
diff --git a/drivers/staging/unisys/uislib/uislib.c b/drivers/staging/unisys/uislib/uislib.c
index 8ea9c46e56ae..3152a2180c45 100644
--- a/drivers/staging/unisys/uislib/uislib.c
+++ b/drivers/staging/unisys/uislib/uislib.c
@@ -381,17 +381,17 @@ create_bus(CONTROLVM_MESSAGE *msg, char *buf)
381 cmd.add_vbus.busTypeGuid = msg->cmd.createBus.busDataTypeGuid; 381 cmd.add_vbus.busTypeGuid = msg->cmd.createBus.busDataTypeGuid;
382 cmd.add_vbus.busInstGuid = msg->cmd.createBus.busInstGuid; 382 cmd.add_vbus.busInstGuid = msg->cmd.createBus.busInstGuid;
383 if (!VirtControlChanFunc) { 383 if (!VirtControlChanFunc) {
384 kfree(bus);
385 LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci callback not registered."); 384 LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci callback not registered.");
386 POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo, 385 POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo,
387 POSTCODE_SEVERITY_ERR); 386 POSTCODE_SEVERITY_ERR);
387 kfree(bus);
388 return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE; 388 return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
389 } 389 }
390 if (!VirtControlChanFunc(&cmd)) { 390 if (!VirtControlChanFunc(&cmd)) {
391 kfree(bus);
392 LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci GUEST_ADD_VBUS returned error."); 391 LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci GUEST_ADD_VBUS returned error.");
393 POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo, 392 POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo,
394 POSTCODE_SEVERITY_ERR); 393 POSTCODE_SEVERITY_ERR);
394 kfree(bus);
395 return 395 return
396 CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR; 396 CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
397 } 397 }
diff --git a/drivers/staging/unisys/visorchipset/visorchipset.h b/drivers/staging/unisys/visorchipset/visorchipset.h
index d4bf203cdfdf..d95825dc5414 100644
--- a/drivers/staging/unisys/visorchipset/visorchipset.h
+++ b/drivers/staging/unisys/visorchipset/visorchipset.h
@@ -104,9 +104,9 @@ finddevice(struct list_head *list, U32 busNo, U32 devNo)
104 104
105static inline void delbusdevices(struct list_head *list, U32 busNo) 105static inline void delbusdevices(struct list_head *list, U32 busNo)
106{ 106{
107 VISORCHIPSET_DEVICE_INFO *p; 107 VISORCHIPSET_DEVICE_INFO *p, *tmp;
108 108
109 list_for_each_entry(p, list, entry) { 109 list_for_each_entry_safe(p, tmp, list, entry) {
110 if (p->busNo == busNo) { 110 if (p->busNo == busNo) {
111 list_del(&p->entry); 111 list_del(&p->entry);
112 kfree(p); 112 kfree(p);
diff --git a/drivers/staging/unisys/visorchipset/visorchipset_main.c b/drivers/staging/unisys/visorchipset/visorchipset_main.c
index 257c6e59b460..c475e256e34b 100644
--- a/drivers/staging/unisys/visorchipset/visorchipset_main.c
+++ b/drivers/staging/unisys/visorchipset/visorchipset_main.c
@@ -605,16 +605,16 @@ EXPORT_SYMBOL_GPL(visorchipset_register_busdev_client);
605static void 605static void
606cleanup_controlvm_structures(void) 606cleanup_controlvm_structures(void)
607{ 607{
608 VISORCHIPSET_BUS_INFO *bi; 608 VISORCHIPSET_BUS_INFO *bi, *tmp_bi;
609 VISORCHIPSET_DEVICE_INFO *di; 609 VISORCHIPSET_DEVICE_INFO *di, *tmp_di;
610 610
611 list_for_each_entry(bi, &BusInfoList, entry) { 611 list_for_each_entry_safe(bi, tmp_bi, &BusInfoList, entry) {
612 busInfo_clear(bi); 612 busInfo_clear(bi);
613 list_del(&bi->entry); 613 list_del(&bi->entry);
614 kfree(bi); 614 kfree(bi);
615 } 615 }
616 616
617 list_for_each_entry(di, &DevInfoList, entry) { 617 list_for_each_entry_safe(di, tmp_di, &DevInfoList, entry) {
618 devInfo_clear(di); 618 devInfo_clear(di);
619 list_del(&di->entry); 619 list_del(&di->entry);
620 kfree(di); 620 kfree(di);
diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c
index c5bf60b135b9..92caef7474c7 100644
--- a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c
+++ b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c
@@ -118,6 +118,7 @@ static int refresh_exported_devices(void)
118 struct udev_list_entry *devices, *dev_list_entry; 118 struct udev_list_entry *devices, *dev_list_entry;
119 struct udev_device *dev; 119 struct udev_device *dev;
120 const char *path; 120 const char *path;
121 const char *driver;
121 122
122 enumerate = udev_enumerate_new(udev_context); 123 enumerate = udev_enumerate_new(udev_context);
123 udev_enumerate_add_match_subsystem(enumerate, "usb"); 124 udev_enumerate_add_match_subsystem(enumerate, "usb");
@@ -128,10 +129,12 @@ static int refresh_exported_devices(void)
128 udev_list_entry_foreach(dev_list_entry, devices) { 129 udev_list_entry_foreach(dev_list_entry, devices) {
129 path = udev_list_entry_get_name(dev_list_entry); 130 path = udev_list_entry_get_name(dev_list_entry);
130 dev = udev_device_new_from_syspath(udev_context, path); 131 dev = udev_device_new_from_syspath(udev_context, path);
132 if (dev == NULL)
133 continue;
131 134
132 /* Check whether device uses usbip-host driver. */ 135 /* Check whether device uses usbip-host driver. */
133 if (!strcmp(udev_device_get_driver(dev), 136 driver = udev_device_get_driver(dev);
134 USBIP_HOST_DRV_NAME)) { 137 if (driver != NULL && !strcmp(driver, USBIP_HOST_DRV_NAME)) {
135 edev = usbip_exported_device_new(path); 138 edev = usbip_exported_device_new(path);
136 if (!edev) { 139 if (!edev) {
137 dbg("usbip_exported_device_new failed"); 140 dbg("usbip_exported_device_new failed");
diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c
index 47bddcdde0a6..211f43f67ea2 100644
--- a/drivers/staging/usbip/vhci_sysfs.c
+++ b/drivers/staging/usbip/vhci_sysfs.c
@@ -184,7 +184,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
184 * @devid: unique device identifier in a remote host 184 * @devid: unique device identifier in a remote host
185 * @speed: usb device speed in a remote host 185 * @speed: usb device speed in a remote host
186 */ 186 */
187 if (sscanf(buf, "%u %u %u %u", &rhport, &sockfd, &devid, &speed) != 1) 187 if (sscanf(buf, "%u %u %u %u", &rhport, &sockfd, &devid, &speed) != 4)
188 return -EINVAL; 188 return -EINVAL;
189 189
190 usbip_dbg_vhci_sysfs("rhport(%u) sockfd(%u) devid(%u) speed(%u)\n", 190 usbip_dbg_vhci_sysfs("rhport(%u) sockfd(%u) devid(%u) speed(%u)\n",
diff --git a/drivers/staging/vme/devices/vme_user.c b/drivers/staging/vme/devices/vme_user.c
index 792792715673..ffb4eeefdddb 100644
--- a/drivers/staging/vme/devices/vme_user.c
+++ b/drivers/staging/vme/devices/vme_user.c
@@ -776,7 +776,8 @@ static int vme_user_probe(struct vme_dev *vdev)
776 image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL); 776 image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL);
777 if (image[i].kern_buf == NULL) { 777 if (image[i].kern_buf == NULL) {
778 err = -ENOMEM; 778 err = -ENOMEM;
779 goto err_master_buf; 779 vme_master_free(image[i].resource);
780 goto err_master;
780 } 781 }
781 } 782 }
782 783
@@ -819,8 +820,6 @@ static int vme_user_probe(struct vme_dev *vdev)
819 820
820 return 0; 821 return 0;
821 822
822 /* Ensure counter set correcty to destroy all sysfs devices */
823 i = VME_DEVS;
824err_sysfs: 823err_sysfs:
825 while (i > 0) { 824 while (i > 0) {
826 i--; 825 i--;
@@ -830,12 +829,10 @@ err_sysfs:
830 829
831 /* Ensure counter set correcty to unalloc all master windows */ 830 /* Ensure counter set correcty to unalloc all master windows */
832 i = MASTER_MAX + 1; 831 i = MASTER_MAX + 1;
833err_master_buf:
834 for (i = MASTER_MINOR; i < (MASTER_MAX + 1); i++)
835 kfree(image[i].kern_buf);
836err_master: 832err_master:
837 while (i > MASTER_MINOR) { 833 while (i > MASTER_MINOR) {
838 i--; 834 i--;
835 kfree(image[i].kern_buf);
839 vme_master_free(image[i].resource); 836 vme_master_free(image[i].resource);
840 } 837 }
841 838
diff --git a/drivers/staging/xgifb/vb_def.h b/drivers/staging/xgifb/vb_def.h
index 5c739bebd8a5..949f0e5eed8d 100644
--- a/drivers/staging/xgifb/vb_def.h
+++ b/drivers/staging/xgifb/vb_def.h
@@ -1,6 +1,6 @@
1#ifndef _VB_DEF_ 1#ifndef _VB_DEF_
2#define _VB_DEF_ 2#define _VB_DEF_
3#include "../../video/sis/initdef.h" 3#include "../../video/fbdev/sis/initdef.h"
4 4
5#define VB_XGI301C 0x0020 /* for 301C */ 5#define VB_XGI301C 0x0020 /* for 301C */
6 6
diff --git a/drivers/staging/xgifb/vb_struct.h b/drivers/staging/xgifb/vb_struct.h
index c08ff5b2d6ee..0d27594554ca 100644
--- a/drivers/staging/xgifb/vb_struct.h
+++ b/drivers/staging/xgifb/vb_struct.h
@@ -1,6 +1,6 @@
1#ifndef _VB_STRUCT_ 1#ifndef _VB_STRUCT_
2#define _VB_STRUCT_ 2#define _VB_STRUCT_
3#include "../../video/sis/vstruct.h" 3#include "../../video/fbdev/sis/vstruct.h"
4 4
5struct XGI_LVDSCRT1HDataStruct { 5struct XGI_LVDSCRT1HDataStruct {
6 unsigned char Reg[8]; 6 unsigned char Reg[8];
diff --git a/drivers/staging/xgifb/vgatypes.h b/drivers/staging/xgifb/vgatypes.h
index ddf7776c295b..264351441f99 100644
--- a/drivers/staging/xgifb/vgatypes.h
+++ b/drivers/staging/xgifb/vgatypes.h
@@ -2,8 +2,8 @@
2#define _VGATYPES_ 2#define _VGATYPES_
3 3
4#include <linux/fb.h> /* for struct fb_var_screeninfo for sis.h */ 4#include <linux/fb.h> /* for struct fb_var_screeninfo for sis.h */
5#include "../../video/sis/vgatypes.h" 5#include "../../video/fbdev/sis/vgatypes.h"
6#include "../../video/sis/sis.h" /* for LCD_TYPE */ 6#include "../../video/fbdev/sis/sis.h" /* for LCD_TYPE */
7 7
8#ifndef XGI_VB_CHIP_TYPE 8#ifndef XGI_VB_CHIP_TYPE
9enum XGI_VB_CHIP_TYPE { 9enum XGI_VB_CHIP_TYPE {
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index 94f9e3a38412..0ff7fda0742f 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -190,7 +190,7 @@ static struct tty_driver *hvc_console_device(struct console *c, int *index)
190 return hvc_driver; 190 return hvc_driver;
191} 191}
192 192
193static int __init hvc_console_setup(struct console *co, char *options) 193static int hvc_console_setup(struct console *co, char *options)
194{ 194{
195 if (co->index < 0 || co->index >= MAX_NR_HVC_CONSOLES) 195 if (co->index < 0 || co->index >= MAX_NR_HVC_CONSOLES)
196 return -ENODEV; 196 return -ENODEV;
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 41fe8a047d37..fe9d129c8735 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -2353,8 +2353,12 @@ static ssize_t n_tty_write(struct tty_struct *tty, struct file *file,
2353 if (tty->ops->flush_chars) 2353 if (tty->ops->flush_chars)
2354 tty->ops->flush_chars(tty); 2354 tty->ops->flush_chars(tty);
2355 } else { 2355 } else {
2356 struct n_tty_data *ldata = tty->disc_data;
2357
2356 while (nr > 0) { 2358 while (nr > 0) {
2359 mutex_lock(&ldata->output_lock);
2357 c = tty->ops->write(tty, b, nr); 2360 c = tty->ops->write(tty, b, nr);
2361 mutex_unlock(&ldata->output_lock);
2358 if (c < 0) { 2362 if (c < 0) {
2359 retval = c; 2363 retval = c;
2360 goto break_out; 2364 goto break_out;
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 81f909c2101f..2d4bd3929e50 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -555,7 +555,7 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
555 */ 555 */
556 if ((p->port.type == PORT_XR17V35X) || 556 if ((p->port.type == PORT_XR17V35X) ||
557 (p->port.type == PORT_XR17D15X)) { 557 (p->port.type == PORT_XR17D15X)) {
558 serial_out(p, UART_EXAR_SLEEP, 0xff); 558 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
559 return; 559 return;
560 } 560 }
561 561
@@ -1520,7 +1520,7 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1520 status = serial8250_rx_chars(up, status); 1520 status = serial8250_rx_chars(up, status);
1521 } 1521 }
1522 serial8250_modem_status(up); 1522 serial8250_modem_status(up);
1523 if (status & UART_LSR_THRE) 1523 if (!up->dma && (status & UART_LSR_THRE))
1524 serial8250_tx_chars(up); 1524 serial8250_tx_chars(up);
1525 1525
1526 spin_unlock_irqrestore(&port->lock, flags); 1526 spin_unlock_irqrestore(&port->lock, flags);
diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c
index 7046769608d4..ab9096dc3849 100644
--- a/drivers/tty/serial/8250/8250_dma.c
+++ b/drivers/tty/serial/8250/8250_dma.c
@@ -20,12 +20,15 @@ static void __dma_tx_complete(void *param)
20 struct uart_8250_port *p = param; 20 struct uart_8250_port *p = param;
21 struct uart_8250_dma *dma = p->dma; 21 struct uart_8250_dma *dma = p->dma;
22 struct circ_buf *xmit = &p->port.state->xmit; 22 struct circ_buf *xmit = &p->port.state->xmit;
23 23 unsigned long flags;
24 dma->tx_running = 0;
25 24
26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 25 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
27 UART_XMIT_SIZE, DMA_TO_DEVICE); 26 UART_XMIT_SIZE, DMA_TO_DEVICE);
28 27
28 spin_lock_irqsave(&p->port.lock, flags);
29
30 dma->tx_running = 0;
31
29 xmit->tail += dma->tx_size; 32 xmit->tail += dma->tx_size;
30 xmit->tail &= UART_XMIT_SIZE - 1; 33 xmit->tail &= UART_XMIT_SIZE - 1;
31 p->port.icount.tx += dma->tx_size; 34 p->port.icount.tx += dma->tx_size;
@@ -35,6 +38,8 @@ static void __dma_tx_complete(void *param)
35 38
36 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) 39 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port))
37 serial8250_tx_dma(p); 40 serial8250_tx_dma(p);
41
42 spin_unlock_irqrestore(&p->port.lock, flags);
38} 43}
39 44
40static void __dma_rx_complete(void *param) 45static void __dma_rx_complete(void *param)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 2e6d8ddc4425..5d9b01aa54f4 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1226,6 +1226,7 @@ config SERIAL_BFIN_SPORT3_UART_CTSRTS
1226config SERIAL_TIMBERDALE 1226config SERIAL_TIMBERDALE
1227 tristate "Support for timberdale UART" 1227 tristate "Support for timberdale UART"
1228 select SERIAL_CORE 1228 select SERIAL_CORE
1229 depends on X86_32 || COMPILE_TEST
1229 ---help--- 1230 ---help---
1230 Add support for UART controller on timberdale. 1231 Add support for UART controller on timberdale.
1231 1232
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index d4eda24aa68b..dacf0a09ab24 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -318,7 +318,7 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port *
318 .src_addr = uap->port.mapbase + UART01x_DR, 318 .src_addr = uap->port.mapbase + UART01x_DR,
319 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, 319 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
320 .direction = DMA_DEV_TO_MEM, 320 .direction = DMA_DEV_TO_MEM,
321 .src_maxburst = uap->fifosize >> 1, 321 .src_maxburst = uap->fifosize >> 2,
322 .device_fc = false, 322 .device_fc = false,
323 }; 323 };
324 324
@@ -2176,6 +2176,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
2176static int pl011_remove(struct amba_device *dev) 2176static int pl011_remove(struct amba_device *dev)
2177{ 2177{
2178 struct uart_amba_port *uap = amba_get_drvdata(dev); 2178 struct uart_amba_port *uap = amba_get_drvdata(dev);
2179 bool busy = false;
2179 int i; 2180 int i;
2180 2181
2181 uart_remove_one_port(&amba_reg, &uap->port); 2182 uart_remove_one_port(&amba_reg, &uap->port);
@@ -2183,9 +2184,12 @@ static int pl011_remove(struct amba_device *dev)
2183 for (i = 0; i < ARRAY_SIZE(amba_ports); i++) 2184 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
2184 if (amba_ports[i] == uap) 2185 if (amba_ports[i] == uap)
2185 amba_ports[i] = NULL; 2186 amba_ports[i] = NULL;
2187 else if (amba_ports[i])
2188 busy = true;
2186 2189
2187 pl011_dma_remove(uap); 2190 pl011_dma_remove(uap);
2188 uart_unregister_driver(&amba_reg); 2191 if (!busy)
2192 uart_unregister_driver(&amba_reg);
2189 return 0; 2193 return 0;
2190} 2194}
2191 2195
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index 5e6fdb1ea73b..14aaea0d4131 100644
--- a/drivers/tty/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
@@ -368,16 +368,12 @@ static const struct uart_ops uart_clps711x_ops = {
368static void uart_clps711x_console_putchar(struct uart_port *port, int ch) 368static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
369{ 369{
370 struct clps711x_port *s = dev_get_drvdata(port->dev); 370 struct clps711x_port *s = dev_get_drvdata(port->dev);
371 u32 sysflg = 0;
371 372
372 /* Wait for FIFO is not full */ 373 /* Wait for FIFO is not full */
373 while (1) { 374 do {
374 u32 sysflg = 0;
375
376 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); 375 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
377 if (!(sysflg & SYSFLG_UTXFF)) 376 } while (sysflg & SYSFLG_UTXFF);
378 break;
379 cond_resched();
380 }
381 377
382 writew(ch, port->membase + UARTDR_OFFSET); 378 writew(ch, port->membase + UARTDR_OFFSET);
383} 379}
@@ -387,18 +383,14 @@ static void uart_clps711x_console_write(struct console *co, const char *c,
387{ 383{
388 struct uart_port *port = clps711x_uart.state[co->index].uart_port; 384 struct uart_port *port = clps711x_uart.state[co->index].uart_port;
389 struct clps711x_port *s = dev_get_drvdata(port->dev); 385 struct clps711x_port *s = dev_get_drvdata(port->dev);
386 u32 sysflg = 0;
390 387
391 uart_console_write(port, c, n, uart_clps711x_console_putchar); 388 uart_console_write(port, c, n, uart_clps711x_console_putchar);
392 389
393 /* Wait for transmitter to become empty */ 390 /* Wait for transmitter to become empty */
394 while (1) { 391 do {
395 u32 sysflg = 0;
396
397 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); 392 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
398 if (!(sysflg & SYSFLG_UBUSY)) 393 } while (sysflg & SYSFLG_UBUSY);
399 break;
400 cond_resched();
401 }
402} 394}
403 395
404static int uart_clps711x_console_setup(struct console *co, char *options) 396static int uart_clps711x_console_setup(struct console *co, char *options)
diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c
index 028582e924a5..c167a710dc39 100644
--- a/drivers/tty/serial/efm32-uart.c
+++ b/drivers/tty/serial/efm32-uart.c
@@ -798,6 +798,9 @@ static int efm32_uart_remove(struct platform_device *pdev)
798 798
799static const struct of_device_id efm32_uart_dt_ids[] = { 799static const struct of_device_id efm32_uart_dt_ids[] = {
800 { 800 {
801 .compatible = "energymicro,efm32-uart",
802 }, {
803 /* doesn't follow the "vendor,device" scheme, don't use */
801 .compatible = "efm32,uart", 804 .compatible = "efm32,uart",
802 }, { 805 }, {
803 /* sentinel */ 806 /* sentinel */
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index dd8b1a5458ff..08b6b9419f0d 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -225,14 +225,19 @@ static inline void serial_omap_enable_wakeirq(struct uart_omap_port *up,
225 if (enable) 225 if (enable)
226 enable_irq(up->wakeirq); 226 enable_irq(up->wakeirq);
227 else 227 else
228 disable_irq(up->wakeirq); 228 disable_irq_nosync(up->wakeirq);
229} 229}
230 230
231static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 231static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
232{ 232{
233 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 233 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev);
234 234
235 if (enable == up->wakeups_enabled)
236 return;
237
235 serial_omap_enable_wakeirq(up, enable); 238 serial_omap_enable_wakeirq(up, enable);
239 up->wakeups_enabled = enable;
240
236 if (!pdata || !pdata->enable_wakeup) 241 if (!pdata || !pdata->enable_wakeup)
237 return; 242 return;
238 243
@@ -1495,6 +1500,11 @@ static int serial_omap_suspend(struct device *dev)
1495 uart_suspend_port(&serial_omap_reg, &up->port); 1500 uart_suspend_port(&serial_omap_reg, &up->port);
1496 flush_work(&up->qos_work); 1501 flush_work(&up->qos_work);
1497 1502
1503 if (device_may_wakeup(dev))
1504 serial_omap_enable_wakeup(up, true);
1505 else
1506 serial_omap_enable_wakeup(up, false);
1507
1498 return 0; 1508 return 0;
1499} 1509}
1500 1510
@@ -1502,6 +1512,9 @@ static int serial_omap_resume(struct device *dev)
1502{ 1512{
1503 struct uart_omap_port *up = dev_get_drvdata(dev); 1513 struct uart_omap_port *up = dev_get_drvdata(dev);
1504 1514
1515 if (device_may_wakeup(dev))
1516 serial_omap_enable_wakeup(up, false);
1517
1505 uart_resume_port(&serial_omap_reg, &up->port); 1518 uart_resume_port(&serial_omap_reg, &up->port);
1506 1519
1507 return 0; 1520 return 0;
@@ -1789,6 +1802,7 @@ static int serial_omap_remove(struct platform_device *dev)
1789 pm_runtime_disable(up->dev); 1802 pm_runtime_disable(up->dev);
1790 uart_remove_one_port(&serial_omap_reg, &up->port); 1803 uart_remove_one_port(&serial_omap_reg, &up->port);
1791 pm_qos_remove_request(&up->pm_qos_request); 1804 pm_qos_remove_request(&up->pm_qos_request);
1805 device_init_wakeup(&dev->dev, false);
1792 1806
1793 return 0; 1807 return 0;
1794} 1808}
@@ -1877,17 +1891,7 @@ static int serial_omap_runtime_suspend(struct device *dev)
1877 1891
1878 up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1892 up->context_loss_cnt = serial_omap_get_context_loss_count(up);
1879 1893
1880 if (device_may_wakeup(dev)) { 1894 serial_omap_enable_wakeup(up, true);
1881 if (!up->wakeups_enabled) {
1882 serial_omap_enable_wakeup(up, true);
1883 up->wakeups_enabled = true;
1884 }
1885 } else {
1886 if (up->wakeups_enabled) {
1887 serial_omap_enable_wakeup(up, false);
1888 up->wakeups_enabled = false;
1889 }
1890 }
1891 1895
1892 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1896 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1893 schedule_work(&up->qos_work); 1897 schedule_work(&up->qos_work);
@@ -1901,6 +1905,8 @@ static int serial_omap_runtime_resume(struct device *dev)
1901 1905
1902 int loss_cnt = serial_omap_get_context_loss_count(up); 1906 int loss_cnt = serial_omap_get_context_loss_count(up);
1903 1907
1908 serial_omap_enable_wakeup(up, false);
1909
1904 if (loss_cnt < 0) { 1910 if (loss_cnt < 0) {
1905 dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 1911 dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n",
1906 loss_cnt); 1912 loss_cnt);
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 23f459600738..1f5505e7f90d 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1446,8 +1446,8 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port)
1446static void s3c24xx_serial_put_poll_char(struct uart_port *port, 1446static void s3c24xx_serial_put_poll_char(struct uart_port *port,
1447 unsigned char c) 1447 unsigned char c)
1448{ 1448{
1449 unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); 1449 unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
1450 unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON); 1450 unsigned int ucon = rd_regl(port, S3C2410_UCON);
1451 1451
1452 /* not possible to xmit on unconfigured port */ 1452 /* not possible to xmit on unconfigured port */
1453 if (!s3c24xx_port_configured(ucon)) 1453 if (!s3c24xx_port_configured(ucon))
@@ -1455,7 +1455,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port,
1455 1455
1456 while (!s3c24xx_serial_console_txrdy(port, ufcon)) 1456 while (!s3c24xx_serial_console_txrdy(port, ufcon))
1457 cpu_relax(); 1457 cpu_relax();
1458 wr_regb(cons_uart, S3C2410_UTXH, c); 1458 wr_regb(port, S3C2410_UTXH, c);
1459} 1459}
1460 1460
1461#endif /* CONFIG_CONSOLE_POLL */ 1461#endif /* CONFIG_CONSOLE_POLL */
@@ -1463,22 +1463,23 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port,
1463static void 1463static void
1464s3c24xx_serial_console_putchar(struct uart_port *port, int ch) 1464s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
1465{ 1465{
1466 unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); 1466 unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
1467 unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON);
1468
1469 /* not possible to xmit on unconfigured port */
1470 if (!s3c24xx_port_configured(ucon))
1471 return;
1472 1467
1473 while (!s3c24xx_serial_console_txrdy(port, ufcon)) 1468 while (!s3c24xx_serial_console_txrdy(port, ufcon))
1474 barrier(); 1469 cpu_relax();
1475 wr_regb(cons_uart, S3C2410_UTXH, ch); 1470 wr_regb(port, S3C2410_UTXH, ch);
1476} 1471}
1477 1472
1478static void 1473static void
1479s3c24xx_serial_console_write(struct console *co, const char *s, 1474s3c24xx_serial_console_write(struct console *co, const char *s,
1480 unsigned int count) 1475 unsigned int count)
1481{ 1476{
1477 unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON);
1478
1479 /* not possible to xmit on unconfigured port */
1480 if (!s3c24xx_port_configured(ucon))
1481 return;
1482
1482 uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); 1483 uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
1483} 1484}
1484 1485
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 2cf5649a6dc0..b68550d95a40 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -89,8 +89,7 @@ static void __uart_start(struct tty_struct *tty)
89 struct uart_state *state = tty->driver_data; 89 struct uart_state *state = tty->driver_data;
90 struct uart_port *port = state->uart_port; 90 struct uart_port *port = state->uart_port;
91 91
92 if (!uart_circ_empty(&state->xmit) && state->xmit.buf && 92 if (!tty->stopped && !tty->hw_stopped)
93 !tty->stopped && !tty->hw_stopped)
94 port->ops->start_tx(port); 93 port->ops->start_tx(port);
95} 94}
96 95
@@ -138,6 +137,11 @@ static int uart_port_startup(struct tty_struct *tty, struct uart_state *state,
138 return 1; 137 return 1;
139 138
140 /* 139 /*
140 * Make sure the device is in D0 state.
141 */
142 uart_change_pm(state, UART_PM_STATE_ON);
143
144 /*
141 * Initialise and allocate the transmit and temporary 145 * Initialise and allocate the transmit and temporary
142 * buffer. 146 * buffer.
143 */ 147 */
@@ -826,25 +830,29 @@ static int uart_set_info(struct tty_struct *tty, struct tty_port *port,
826 * If we fail to request resources for the 830 * If we fail to request resources for the
827 * new port, try to restore the old settings. 831 * new port, try to restore the old settings.
828 */ 832 */
829 if (retval && old_type != PORT_UNKNOWN) { 833 if (retval) {
830 uport->iobase = old_iobase; 834 uport->iobase = old_iobase;
831 uport->type = old_type; 835 uport->type = old_type;
832 uport->hub6 = old_hub6; 836 uport->hub6 = old_hub6;
833 uport->iotype = old_iotype; 837 uport->iotype = old_iotype;
834 uport->regshift = old_shift; 838 uport->regshift = old_shift;
835 uport->mapbase = old_mapbase; 839 uport->mapbase = old_mapbase;
836 retval = uport->ops->request_port(uport);
837 /*
838 * If we failed to restore the old settings,
839 * we fail like this.
840 */
841 if (retval)
842 uport->type = PORT_UNKNOWN;
843 840
844 /* 841 if (old_type != PORT_UNKNOWN) {
845 * We failed anyway. 842 retval = uport->ops->request_port(uport);
846 */ 843 /*
847 retval = -EBUSY; 844 * If we failed to restore the old settings,
845 * we fail like this.
846 */
847 if (retval)
848 uport->type = PORT_UNKNOWN;
849
850 /*
851 * We failed anyway.
852 */
853 retval = -EBUSY;
854 }
855
848 /* Added to return the correct error -Ram Gupta */ 856 /* Added to return the correct error -Ram Gupta */
849 goto exit; 857 goto exit;
850 } 858 }
@@ -1452,6 +1460,8 @@ static void uart_hangup(struct tty_struct *tty)
1452 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); 1460 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
1453 spin_unlock_irqrestore(&port->lock, flags); 1461 spin_unlock_irqrestore(&port->lock, flags);
1454 tty_port_tty_set(port, NULL); 1462 tty_port_tty_set(port, NULL);
1463 if (!uart_console(state->uart_port))
1464 uart_change_pm(state, UART_PM_STATE_OFF);
1455 wake_up_interruptible(&port->open_wait); 1465 wake_up_interruptible(&port->open_wait);
1456 wake_up_interruptible(&port->delta_msr_wait); 1466 wake_up_interruptible(&port->delta_msr_wait);
1457 } 1467 }
@@ -1570,12 +1580,6 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1570 } 1580 }
1571 1581
1572 /* 1582 /*
1573 * Make sure the device is in D0 state.
1574 */
1575 if (port->count == 1)
1576 uart_change_pm(state, UART_PM_STATE_ON);
1577
1578 /*
1579 * Start up the serial port. 1583 * Start up the serial port.
1580 */ 1584 */
1581 retval = uart_startup(tty, state, 0); 1585 retval = uart_startup(tty, state, 0);
diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c
index 21e6e84c0df8..dd3a96e07026 100644
--- a/drivers/tty/serial/st-asc.c
+++ b/drivers/tty/serial/st-asc.c
@@ -295,7 +295,7 @@ static void asc_receive_chars(struct uart_port *port)
295 status & ASC_STA_OE) { 295 status & ASC_STA_OE) {
296 296
297 if (c & ASC_RXBUF_FE) { 297 if (c & ASC_RXBUF_FE) {
298 if (c == ASC_RXBUF_FE) { 298 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) {
299 port->icount.brk++; 299 port->icount.brk++;
300 if (uart_handle_break(port)) 300 if (uart_handle_break(port))
301 continue; 301 continue;
@@ -325,7 +325,7 @@ static void asc_receive_chars(struct uart_port *port)
325 flag = TTY_FRAME; 325 flag = TTY_FRAME;
326 } 326 }
327 327
328 if (uart_handle_sysrq_char(port, c)) 328 if (uart_handle_sysrq_char(port, c & 0xff))
329 continue; 329 continue;
330 330
331 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag); 331 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag);
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c
index 8ebd9f88a6f6..cf78d1985cd8 100644
--- a/drivers/tty/tty_buffer.c
+++ b/drivers/tty/tty_buffer.c
@@ -258,7 +258,11 @@ static int __tty_buffer_request_room(struct tty_port *port, size_t size,
258 n->flags = flags; 258 n->flags = flags;
259 buf->tail = n; 259 buf->tail = n;
260 b->commit = b->used; 260 b->commit = b->used;
261 smp_mb(); 261 /* paired w/ barrier in flush_to_ldisc(); ensures the
262 * latest commit value can be read before the head is
263 * advanced to the next buffer
264 */
265 smp_wmb();
262 b->next = n; 266 b->next = n;
263 } else if (change) 267 } else if (change)
264 size = 0; 268 size = 0;
@@ -444,17 +448,24 @@ static void flush_to_ldisc(struct work_struct *work)
444 448
445 while (1) { 449 while (1) {
446 struct tty_buffer *head = buf->head; 450 struct tty_buffer *head = buf->head;
451 struct tty_buffer *next;
447 int count; 452 int count;
448 453
449 /* Ldisc or user is trying to gain exclusive access */ 454 /* Ldisc or user is trying to gain exclusive access */
450 if (atomic_read(&buf->priority)) 455 if (atomic_read(&buf->priority))
451 break; 456 break;
452 457
458 next = head->next;
459 /* paired w/ barrier in __tty_buffer_request_room();
460 * ensures commit value read is not stale if the head
461 * is advancing to the next buffer
462 */
463 smp_rmb();
453 count = head->commit - head->read; 464 count = head->commit - head->read;
454 if (!count) { 465 if (!count) {
455 if (head->next == NULL) 466 if (next == NULL)
456 break; 467 break;
457 buf->head = head->next; 468 buf->head = next;
458 tty_buffer_free(port, head); 469 tty_buffer_free(port, head);
459 continue; 470 continue;
460 } 471 }
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index d3448a90f0f9..34110719fe03 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -878,9 +878,8 @@ void disassociate_ctty(int on_exit)
878 spin_lock_irq(&current->sighand->siglock); 878 spin_lock_irq(&current->sighand->siglock);
879 put_pid(current->signal->tty_old_pgrp); 879 put_pid(current->signal->tty_old_pgrp);
880 current->signal->tty_old_pgrp = NULL; 880 current->signal->tty_old_pgrp = NULL;
881 spin_unlock_irq(&current->sighand->siglock);
882 881
883 tty = get_current_tty(); 882 tty = tty_kref_get(current->signal->tty);
884 if (tty) { 883 if (tty) {
885 unsigned long flags; 884 unsigned long flags;
886 spin_lock_irqsave(&tty->ctrl_lock, flags); 885 spin_lock_irqsave(&tty->ctrl_lock, flags);
@@ -897,6 +896,7 @@ void disassociate_ctty(int on_exit)
897#endif 896#endif
898 } 897 }
899 898
899 spin_unlock_irq(&current->sighand->siglock);
900 /* Now clear signal->tty under the lock */ 900 /* Now clear signal->tty under the lock */
901 read_lock(&tasklist_lock); 901 read_lock(&tasklist_lock);
902 session_clear_tty(task_session(current)); 902 session_clear_tty(task_session(current));
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index ca6831c5b763..1cd5d0ba587c 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -277,6 +277,39 @@ static void hw_phymode_configure(struct ci_hdrc *ci)
277} 277}
278 278
279/** 279/**
280 * ci_usb_phy_init: initialize phy according to different phy type
281 * @ci: the controller
282 *
283 * This function returns an error code if usb_phy_init has failed
284 */
285static int ci_usb_phy_init(struct ci_hdrc *ci)
286{
287 int ret;
288
289 switch (ci->platdata->phy_mode) {
290 case USBPHY_INTERFACE_MODE_UTMI:
291 case USBPHY_INTERFACE_MODE_UTMIW:
292 case USBPHY_INTERFACE_MODE_HSIC:
293 ret = usb_phy_init(ci->transceiver);
294 if (ret)
295 return ret;
296 hw_phymode_configure(ci);
297 break;
298 case USBPHY_INTERFACE_MODE_ULPI:
299 case USBPHY_INTERFACE_MODE_SERIAL:
300 hw_phymode_configure(ci);
301 ret = usb_phy_init(ci->transceiver);
302 if (ret)
303 return ret;
304 break;
305 default:
306 ret = usb_phy_init(ci->transceiver);
307 }
308
309 return ret;
310}
311
312/**
280 * hw_device_reset: resets chip (execute without interruption) 313 * hw_device_reset: resets chip (execute without interruption)
281 * @ci: the controller 314 * @ci: the controller
282 * 315 *
@@ -543,8 +576,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
543 return -ENODEV; 576 return -ENODEV;
544 } 577 }
545 578
546 hw_phymode_configure(ci);
547
548 if (ci->platdata->phy) 579 if (ci->platdata->phy)
549 ci->transceiver = ci->platdata->phy; 580 ci->transceiver = ci->platdata->phy;
550 else 581 else
@@ -564,7 +595,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
564 return -EPROBE_DEFER; 595 return -EPROBE_DEFER;
565 } 596 }
566 597
567 ret = usb_phy_init(ci->transceiver); 598 ret = ci_usb_phy_init(ci);
568 if (ret) { 599 if (ret) {
569 dev_err(dev, "unable to init phy: %d\n", ret); 600 dev_err(dev, "unable to init phy: %d\n", ret);
570 return ret; 601 return ret;
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 900f7ff805ee..904efb6035b0 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -518,13 +518,16 @@ static int acm_port_activate(struct tty_port *port, struct tty_struct *tty)
518 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) { 518 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) {
519 dev_err(&acm->control->dev, 519 dev_err(&acm->control->dev,
520 "%s - usb_submit_urb(ctrl irq) failed\n", __func__); 520 "%s - usb_submit_urb(ctrl irq) failed\n", __func__);
521 usb_autopm_put_interface(acm->control);
521 goto error_submit_urb; 522 goto error_submit_urb;
522 } 523 }
523 524
524 acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS; 525 acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS;
525 if (acm_set_control(acm, acm->ctrlout) < 0 && 526 if (acm_set_control(acm, acm->ctrlout) < 0 &&
526 (acm->ctrl_caps & USB_CDC_CAP_LINE)) 527 (acm->ctrl_caps & USB_CDC_CAP_LINE)) {
528 usb_autopm_put_interface(acm->control);
527 goto error_set_control; 529 goto error_set_control;
530 }
528 531
529 usb_autopm_put_interface(acm->control); 532 usb_autopm_put_interface(acm->control);
530 533
@@ -549,7 +552,6 @@ error_submit_read_urbs:
549error_set_control: 552error_set_control:
550 usb_kill_urb(acm->ctrlurb); 553 usb_kill_urb(acm->ctrlurb);
551error_submit_urb: 554error_submit_urb:
552 usb_autopm_put_interface(acm->control);
553error_get_interface: 555error_get_interface:
554disconnected: 556disconnected:
555 mutex_unlock(&acm->mutex); 557 mutex_unlock(&acm->mutex);
@@ -1652,13 +1654,27 @@ static const struct usb_device_id acm_ids[] = {
1652 }, 1654 },
1653 /* Motorola H24 HSPA module: */ 1655 /* Motorola H24 HSPA module: */
1654 { USB_DEVICE(0x22b8, 0x2d91) }, /* modem */ 1656 { USB_DEVICE(0x22b8, 0x2d91) }, /* modem */
1655 { USB_DEVICE(0x22b8, 0x2d92) }, /* modem + diagnostics */ 1657 { USB_DEVICE(0x22b8, 0x2d92), /* modem + diagnostics */
1656 { USB_DEVICE(0x22b8, 0x2d93) }, /* modem + AT port */ 1658 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1657 { USB_DEVICE(0x22b8, 0x2d95) }, /* modem + AT port + diagnostics */ 1659 },
1658 { USB_DEVICE(0x22b8, 0x2d96) }, /* modem + NMEA */ 1660 { USB_DEVICE(0x22b8, 0x2d93), /* modem + AT port */
1659 { USB_DEVICE(0x22b8, 0x2d97) }, /* modem + diagnostics + NMEA */ 1661 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1660 { USB_DEVICE(0x22b8, 0x2d99) }, /* modem + AT port + NMEA */ 1662 },
1661 { USB_DEVICE(0x22b8, 0x2d9a) }, /* modem + AT port + diagnostics + NMEA */ 1663 { USB_DEVICE(0x22b8, 0x2d95), /* modem + AT port + diagnostics */
1664 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1665 },
1666 { USB_DEVICE(0x22b8, 0x2d96), /* modem + NMEA */
1667 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1668 },
1669 { USB_DEVICE(0x22b8, 0x2d97), /* modem + diagnostics + NMEA */
1670 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1671 },
1672 { USB_DEVICE(0x22b8, 0x2d99), /* modem + AT port + NMEA */
1673 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1674 },
1675 { USB_DEVICE(0x22b8, 0x2d9a), /* modem + AT port + diagnostics + NMEA */
1676 .driver_info = NO_UNION_NORMAL, /* handle only modem interface */
1677 },
1662 1678
1663 { USB_DEVICE(0x0572, 0x1329), /* Hummingbird huc56s (Conexant) */ 1679 { USB_DEVICE(0x0572, 0x1329), /* Hummingbird huc56s (Conexant) */
1664 .driver_info = NO_UNION_NORMAL, /* union descriptor misplaced on 1680 .driver_info = NO_UNION_NORMAL, /* union descriptor misplaced on
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index d59d99347d54..1f02e65fe305 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -75,7 +75,7 @@ static void for_each_companion(struct pci_dev *pdev, struct usb_hcd *hcd,
75 PCI_SLOT(companion->devfn) != slot) 75 PCI_SLOT(companion->devfn) != slot)
76 continue; 76 continue;
77 companion_hcd = pci_get_drvdata(companion); 77 companion_hcd = pci_get_drvdata(companion);
78 if (!companion_hcd) 78 if (!companion_hcd || !companion_hcd->self.root_hub)
79 continue; 79 continue;
80 fn(pdev, hcd, companion, companion_hcd); 80 fn(pdev, hcd, companion, companion_hcd);
81 } 81 }
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index d001417e8e37..10aaaae9af25 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -821,6 +821,7 @@ static void dwc3_complete(struct device *dev)
821 821
822 spin_lock_irqsave(&dwc->lock, flags); 822 spin_lock_irqsave(&dwc->lock, flags);
823 823
824 dwc3_event_buffers_setup(dwc);
824 switch (dwc->dr_mode) { 825 switch (dwc->dr_mode) {
825 case USB_DR_MODE_PERIPHERAL: 826 case USB_DR_MODE_PERIPHERAL:
826 case USB_DR_MODE_OTG: 827 case USB_DR_MODE_OTG:
@@ -828,7 +829,6 @@ static void dwc3_complete(struct device *dev)
828 /* FALLTHROUGH */ 829 /* FALLTHROUGH */
829 case USB_DR_MODE_HOST: 830 case USB_DR_MODE_HOST:
830 default: 831 default:
831 dwc3_event_buffers_setup(dwc);
832 break; 832 break;
833 } 833 }
834 834
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index a740eac74d56..70715eeededd 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -187,15 +187,12 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
187 * improve this algorithm so that we better use the internal 187 * improve this algorithm so that we better use the internal
188 * FIFO space 188 * FIFO space
189 */ 189 */
190 for (num = 0; num < DWC3_ENDPOINTS_NUM; num++) { 190 for (num = 0; num < dwc->num_in_eps; num++) {
191 struct dwc3_ep *dep = dwc->eps[num]; 191 /* bit0 indicates direction; 1 means IN ep */
192 int fifo_number = dep->number >> 1; 192 struct dwc3_ep *dep = dwc->eps[(num << 1) | 1];
193 int mult = 1; 193 int mult = 1;
194 int tmp; 194 int tmp;
195 195
196 if (!(dep->number & 1))
197 continue;
198
199 if (!(dep->flags & DWC3_EP_ENABLED)) 196 if (!(dep->flags & DWC3_EP_ENABLED))
200 continue; 197 continue;
201 198
@@ -224,8 +221,7 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
224 dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n", 221 dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n",
225 dep->name, last_fifo_depth, fifo_size & 0xffff); 222 dep->name, last_fifo_depth, fifo_size & 0xffff);
226 223
227 dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(fifo_number), 224 dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), fifo_size);
228 fifo_size);
229 225
230 last_fifo_depth += (fifo_size & 0xffff); 226 last_fifo_depth += (fifo_size & 0xffff);
231 } 227 }
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index f605ad8c1902..cfd18bcca723 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1709,16 +1709,6 @@ static int at91udc_probe(struct platform_device *pdev)
1709 return -ENODEV; 1709 return -ENODEV;
1710 } 1710 }
1711 1711
1712 if (pdev->num_resources != 2) {
1713 DBG("invalid num_resources\n");
1714 return -ENODEV;
1715 }
1716 if ((pdev->resource[0].flags != IORESOURCE_MEM)
1717 || (pdev->resource[1].flags != IORESOURCE_IRQ)) {
1718 DBG("invalid resource type\n");
1719 return -ENODEV;
1720 }
1721
1722 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1712 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1723 if (!res) 1713 if (!res)
1724 return -ENXIO; 1714 return -ENXIO;
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index 2e164dca08e8..1e12b3ee56fd 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -745,6 +745,12 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
745 */ 745 */
746 struct usb_gadget *gadget = epfile->ffs->gadget; 746 struct usb_gadget *gadget = epfile->ffs->gadget;
747 747
748 spin_lock_irq(&epfile->ffs->eps_lock);
749 /* In the meantime, endpoint got disabled or changed. */
750 if (epfile->ep != ep) {
751 spin_unlock_irq(&epfile->ffs->eps_lock);
752 return -ESHUTDOWN;
753 }
748 /* 754 /*
749 * Controller may require buffer size to be aligned to 755 * Controller may require buffer size to be aligned to
750 * maxpacketsize of an out endpoint. 756 * maxpacketsize of an out endpoint.
@@ -752,6 +758,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
752 data_len = io_data->read ? 758 data_len = io_data->read ?
753 usb_ep_align_maybe(gadget, ep->ep, io_data->len) : 759 usb_ep_align_maybe(gadget, ep->ep, io_data->len) :
754 io_data->len; 760 io_data->len;
761 spin_unlock_irq(&epfile->ffs->eps_lock);
755 762
756 data = kmalloc(data_len, GFP_KERNEL); 763 data = kmalloc(data_len, GFP_KERNEL);
757 if (unlikely(!data)) 764 if (unlikely(!data))
diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c
index c11761ce5113..9a4f49dc6ac4 100644
--- a/drivers/usb/gadget/f_rndis.c
+++ b/drivers/usb/gadget/f_rndis.c
@@ -377,7 +377,7 @@ static struct sk_buff *rndis_add_header(struct gether *port,
377 if (skb2) 377 if (skb2)
378 rndis_add_hdr(skb2); 378 rndis_add_hdr(skb2);
379 379
380 dev_kfree_skb_any(skb); 380 dev_kfree_skb(skb);
381 return skb2; 381 return skb2;
382} 382}
383 383
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 15960af0f67e..a2f26cdb56fe 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -1219,6 +1219,10 @@ static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1219 struct fsl_udc *udc; 1219 struct fsl_udc *udc;
1220 1220
1221 udc = container_of(gadget, struct fsl_udc, gadget); 1221 udc = container_of(gadget, struct fsl_udc, gadget);
1222
1223 if (!udc->vbus_active)
1224 return -EOPNOTSUPP;
1225
1222 udc->softconnect = (is_on != 0); 1226 udc->softconnect = (is_on != 0);
1223 if (can_pullup(udc)) 1227 if (can_pullup(udc))
1224 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP), 1228 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
@@ -2532,8 +2536,8 @@ static int __exit fsl_udc_remove(struct platform_device *pdev)
2532 if (!udc_controller) 2536 if (!udc_controller)
2533 return -ENODEV; 2537 return -ENODEV;
2534 2538
2535 usb_del_gadget_udc(&udc_controller->gadget);
2536 udc_controller->done = &done; 2539 udc_controller->done = &done;
2540 usb_del_gadget_udc(&udc_controller->gadget);
2537 2541
2538 fsl_udc_clk_release(); 2542 fsl_udc_clk_release();
2539 2543
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index b5be6f0308c2..a925d0cbcd41 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -2043,6 +2043,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent)
2043 return -ESRCH; 2043 return -ESRCH;
2044 2044
2045 /* fake probe to determine $CHIP */ 2045 /* fake probe to determine $CHIP */
2046 CHIP = NULL;
2046 usb_gadget_probe_driver(&probe_driver); 2047 usb_gadget_probe_driver(&probe_driver);
2047 if (!CHIP) 2048 if (!CHIP)
2048 return -ENODEV; 2049 return -ENODEV;
diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c
index d822d822efb3..7ed452d90f4d 100644
--- a/drivers/usb/gadget/rndis.c
+++ b/drivers/usb/gadget/rndis.c
@@ -35,6 +35,7 @@
35#include <asm/byteorder.h> 35#include <asm/byteorder.h>
36#include <asm/unaligned.h> 36#include <asm/unaligned.h>
37 37
38#include "u_rndis.h"
38 39
39#undef VERBOSE_DEBUG 40#undef VERBOSE_DEBUG
40 41
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index 50d09c289137..b7d4f82872b7 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -48,8 +48,6 @@
48 48
49#define UETH__VERSION "29-May-2008" 49#define UETH__VERSION "29-May-2008"
50 50
51#define GETHER_NAPI_WEIGHT 32
52
53struct eth_dev { 51struct eth_dev {
54 /* lock is held while accessing port_usb 52 /* lock is held while accessing port_usb
55 */ 53 */
@@ -74,7 +72,6 @@ struct eth_dev {
74 struct sk_buff_head *list); 72 struct sk_buff_head *list);
75 73
76 struct work_struct work; 74 struct work_struct work;
77 struct napi_struct rx_napi;
78 75
79 unsigned long todo; 76 unsigned long todo;
80#define WORK_RX_MEMORY 0 77#define WORK_RX_MEMORY 0
@@ -256,16 +253,18 @@ enomem:
256 DBG(dev, "rx submit --> %d\n", retval); 253 DBG(dev, "rx submit --> %d\n", retval);
257 if (skb) 254 if (skb)
258 dev_kfree_skb_any(skb); 255 dev_kfree_skb_any(skb);
256 spin_lock_irqsave(&dev->req_lock, flags);
257 list_add(&req->list, &dev->rx_reqs);
258 spin_unlock_irqrestore(&dev->req_lock, flags);
259 } 259 }
260 return retval; 260 return retval;
261} 261}
262 262
263static void rx_complete(struct usb_ep *ep, struct usb_request *req) 263static void rx_complete(struct usb_ep *ep, struct usb_request *req)
264{ 264{
265 struct sk_buff *skb = req->context; 265 struct sk_buff *skb = req->context, *skb2;
266 struct eth_dev *dev = ep->driver_data; 266 struct eth_dev *dev = ep->driver_data;
267 int status = req->status; 267 int status = req->status;
268 bool rx_queue = 0;
269 268
270 switch (status) { 269 switch (status) {
271 270
@@ -289,8 +288,30 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req)
289 } else { 288 } else {
290 skb_queue_tail(&dev->rx_frames, skb); 289 skb_queue_tail(&dev->rx_frames, skb);
291 } 290 }
292 if (!status) 291 skb = NULL;
293 rx_queue = 1; 292
293 skb2 = skb_dequeue(&dev->rx_frames);
294 while (skb2) {
295 if (status < 0
296 || ETH_HLEN > skb2->len
297 || skb2->len > VLAN_ETH_FRAME_LEN) {
298 dev->net->stats.rx_errors++;
299 dev->net->stats.rx_length_errors++;
300 DBG(dev, "rx length %d\n", skb2->len);
301 dev_kfree_skb_any(skb2);
302 goto next_frame;
303 }
304 skb2->protocol = eth_type_trans(skb2, dev->net);
305 dev->net->stats.rx_packets++;
306 dev->net->stats.rx_bytes += skb2->len;
307
308 /* no buffer copies needed, unless hardware can't
309 * use skb buffers.
310 */
311 status = netif_rx(skb2);
312next_frame:
313 skb2 = skb_dequeue(&dev->rx_frames);
314 }
294 break; 315 break;
295 316
296 /* software-driven interface shutdown */ 317 /* software-driven interface shutdown */
@@ -313,20 +334,22 @@ quiesce:
313 /* FALLTHROUGH */ 334 /* FALLTHROUGH */
314 335
315 default: 336 default:
316 rx_queue = 1;
317 dev_kfree_skb_any(skb);
318 dev->net->stats.rx_errors++; 337 dev->net->stats.rx_errors++;
319 DBG(dev, "rx status %d\n", status); 338 DBG(dev, "rx status %d\n", status);
320 break; 339 break;
321 } 340 }
322 341
342 if (skb)
343 dev_kfree_skb_any(skb);
344 if (!netif_running(dev->net)) {
323clean: 345clean:
324 spin_lock(&dev->req_lock); 346 spin_lock(&dev->req_lock);
325 list_add(&req->list, &dev->rx_reqs); 347 list_add(&req->list, &dev->rx_reqs);
326 spin_unlock(&dev->req_lock); 348 spin_unlock(&dev->req_lock);
327 349 req = NULL;
328 if (rx_queue && likely(napi_schedule_prep(&dev->rx_napi))) 350 }
329 __napi_schedule(&dev->rx_napi); 351 if (req)
352 rx_submit(dev, req, GFP_ATOMIC);
330} 353}
331 354
332static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n) 355static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n)
@@ -391,24 +414,16 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags)
391{ 414{
392 struct usb_request *req; 415 struct usb_request *req;
393 unsigned long flags; 416 unsigned long flags;
394 int rx_counts = 0;
395 417
396 /* fill unused rxq slots with some skb */ 418 /* fill unused rxq slots with some skb */
397 spin_lock_irqsave(&dev->req_lock, flags); 419 spin_lock_irqsave(&dev->req_lock, flags);
398 while (!list_empty(&dev->rx_reqs)) { 420 while (!list_empty(&dev->rx_reqs)) {
399
400 if (++rx_counts > qlen(dev->gadget, dev->qmult))
401 break;
402
403 req = container_of(dev->rx_reqs.next, 421 req = container_of(dev->rx_reqs.next,
404 struct usb_request, list); 422 struct usb_request, list);
405 list_del_init(&req->list); 423 list_del_init(&req->list);
406 spin_unlock_irqrestore(&dev->req_lock, flags); 424 spin_unlock_irqrestore(&dev->req_lock, flags);
407 425
408 if (rx_submit(dev, req, gfp_flags) < 0) { 426 if (rx_submit(dev, req, gfp_flags) < 0) {
409 spin_lock_irqsave(&dev->req_lock, flags);
410 list_add(&req->list, &dev->rx_reqs);
411 spin_unlock_irqrestore(&dev->req_lock, flags);
412 defer_kevent(dev, WORK_RX_MEMORY); 427 defer_kevent(dev, WORK_RX_MEMORY);
413 return; 428 return;
414 } 429 }
@@ -418,41 +433,6 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags)
418 spin_unlock_irqrestore(&dev->req_lock, flags); 433 spin_unlock_irqrestore(&dev->req_lock, flags);
419} 434}
420 435
421static int gether_poll(struct napi_struct *napi, int budget)
422{
423 struct eth_dev *dev = container_of(napi, struct eth_dev, rx_napi);
424 struct sk_buff *skb;
425 unsigned int work_done = 0;
426 int status = 0;
427
428 while ((skb = skb_dequeue(&dev->rx_frames))) {
429 if (status < 0
430 || ETH_HLEN > skb->len
431 || skb->len > VLAN_ETH_FRAME_LEN) {
432 dev->net->stats.rx_errors++;
433 dev->net->stats.rx_length_errors++;
434 DBG(dev, "rx length %d\n", skb->len);
435 dev_kfree_skb_any(skb);
436 continue;
437 }
438 skb->protocol = eth_type_trans(skb, dev->net);
439 dev->net->stats.rx_packets++;
440 dev->net->stats.rx_bytes += skb->len;
441
442 status = netif_rx_ni(skb);
443 }
444
445 if (netif_running(dev->net)) {
446 rx_fill(dev, GFP_KERNEL);
447 work_done++;
448 }
449
450 if (work_done < budget)
451 napi_complete(&dev->rx_napi);
452
453 return work_done;
454}
455
456static void eth_work(struct work_struct *work) 436static void eth_work(struct work_struct *work)
457{ 437{
458 struct eth_dev *dev = container_of(work, struct eth_dev, work); 438 struct eth_dev *dev = container_of(work, struct eth_dev, work);
@@ -645,7 +625,6 @@ static void eth_start(struct eth_dev *dev, gfp_t gfp_flags)
645 /* and open the tx floodgates */ 625 /* and open the tx floodgates */
646 atomic_set(&dev->tx_qlen, 0); 626 atomic_set(&dev->tx_qlen, 0);
647 netif_wake_queue(dev->net); 627 netif_wake_queue(dev->net);
648 napi_enable(&dev->rx_napi);
649} 628}
650 629
651static int eth_open(struct net_device *net) 630static int eth_open(struct net_device *net)
@@ -672,7 +651,6 @@ static int eth_stop(struct net_device *net)
672 unsigned long flags; 651 unsigned long flags;
673 652
674 VDBG(dev, "%s\n", __func__); 653 VDBG(dev, "%s\n", __func__);
675 napi_disable(&dev->rx_napi);
676 netif_stop_queue(net); 654 netif_stop_queue(net);
677 655
678 DBG(dev, "stop stats: rx/tx %ld/%ld, errs %ld/%ld\n", 656 DBG(dev, "stop stats: rx/tx %ld/%ld, errs %ld/%ld\n",
@@ -790,7 +768,6 @@ struct eth_dev *gether_setup_name(struct usb_gadget *g,
790 return ERR_PTR(-ENOMEM); 768 return ERR_PTR(-ENOMEM);
791 769
792 dev = netdev_priv(net); 770 dev = netdev_priv(net);
793 netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT);
794 spin_lock_init(&dev->lock); 771 spin_lock_init(&dev->lock);
795 spin_lock_init(&dev->req_lock); 772 spin_lock_init(&dev->req_lock);
796 INIT_WORK(&dev->work, eth_work); 773 INIT_WORK(&dev->work, eth_work);
@@ -853,7 +830,6 @@ struct net_device *gether_setup_name_default(const char *netname)
853 return ERR_PTR(-ENOMEM); 830 return ERR_PTR(-ENOMEM);
854 831
855 dev = netdev_priv(net); 832 dev = netdev_priv(net);
856 netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT);
857 spin_lock_init(&dev->lock); 833 spin_lock_init(&dev->lock);
858 spin_lock_init(&dev->req_lock); 834 spin_lock_init(&dev->req_lock);
859 INIT_WORK(&dev->work, eth_work); 835 INIT_WORK(&dev->work, eth_work);
@@ -1137,7 +1113,6 @@ void gether_disconnect(struct gether *link)
1137{ 1113{
1138 struct eth_dev *dev = link->ioport; 1114 struct eth_dev *dev = link->ioport;
1139 struct usb_request *req; 1115 struct usb_request *req;
1140 struct sk_buff *skb;
1141 1116
1142 WARN_ON(!dev); 1117 WARN_ON(!dev);
1143 if (!dev) 1118 if (!dev)
@@ -1164,12 +1139,6 @@ void gether_disconnect(struct gether *link)
1164 spin_lock(&dev->req_lock); 1139 spin_lock(&dev->req_lock);
1165 } 1140 }
1166 spin_unlock(&dev->req_lock); 1141 spin_unlock(&dev->req_lock);
1167
1168 spin_lock(&dev->rx_frames.lock);
1169 while ((skb = __skb_dequeue(&dev->rx_frames)))
1170 dev_kfree_skb_any(skb);
1171 spin_unlock(&dev->rx_frames.lock);
1172
1173 link->in_ep->driver_data = NULL; 1142 link->in_ep->driver_data = NULL;
1174 link->in_ep->desc = NULL; 1143 link->in_ep->desc = NULL;
1175 1144
diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
index 9f170c53e3d9..134f354ede62 100644
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -300,7 +300,7 @@ static int __init zero_bind(struct usb_composite_dev *cdev)
300 ss_opts->isoc_interval = gzero_options.isoc_interval; 300 ss_opts->isoc_interval = gzero_options.isoc_interval;
301 ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket; 301 ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket;
302 ss_opts->isoc_mult = gzero_options.isoc_mult; 302 ss_opts->isoc_mult = gzero_options.isoc_mult;
303 ss_opts->isoc_maxburst = gzero_options.isoc_maxpacket; 303 ss_opts->isoc_maxburst = gzero_options.isoc_maxburst;
304 ss_opts->bulk_buflen = gzero_options.bulk_buflen; 304 ss_opts->bulk_buflen = gzero_options.bulk_buflen;
305 305
306 func_ss = usb_get_function(func_inst_ss); 306 func_ss = usb_get_function(func_inst_ss);
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index d1d8c47777c5..7f425acd9be5 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -212,6 +212,8 @@ static int exynos_ehci_suspend(struct device *dev)
212 int rc; 212 int rc;
213 213
214 rc = ehci_suspend(hcd, do_wakeup); 214 rc = ehci_suspend(hcd, do_wakeup);
215 if (rc)
216 return rc;
215 217
216 if (exynos_ehci->otg) 218 if (exynos_ehci->otg)
217 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self); 219 exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 6f2c8d3899d2..cf2734b532a7 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -248,7 +248,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
248 break; 248 break;
249 } 249 }
250 250
251 if (pdata->have_sysif_regs && pdata->controller_ver && 251 if (pdata->have_sysif_regs &&
252 pdata->controller_ver > FSL_USB_VER_1_6 &&
252 (phy_mode == FSL_USB2_PHY_ULPI)) { 253 (phy_mode == FSL_USB2_PHY_ULPI)) {
253 /* check PHY_CLK_VALID to get phy clk valid */ 254 /* check PHY_CLK_VALID to get phy clk valid */
254 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & 255 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index b3a0e11073aa..c7dd93aad20c 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -303,6 +303,8 @@ static int ehci_platform_suspend(struct device *dev)
303 int ret; 303 int ret;
304 304
305 ret = ehci_suspend(hcd, do_wakeup); 305 ret = ehci_suspend(hcd, do_wakeup);
306 if (ret)
307 return ret;
306 308
307 if (pdata->power_suspend) 309 if (pdata->power_suspend)
308 pdata->power_suspend(pdev); 310 pdata->power_suspend(pdev);
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 27ac6ad53c3d..7ef00ecb0da1 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -509,8 +509,31 @@ static struct platform_driver tegra_ehci_driver = {
509 } 509 }
510}; 510};
511 511
512static int tegra_ehci_reset(struct usb_hcd *hcd)
513{
514 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
515 int retval;
516 int txfifothresh;
517
518 retval = ehci_setup(hcd);
519 if (retval)
520 return retval;
521
522 /*
523 * We should really pull this value out of tegra_ehci_soc_config, but
524 * to avoid needing access to it, make use of the fact that Tegra20 is
525 * the only one so far that needs a value of 10, and Tegra20 is the
526 * only one which doesn't set has_hostpc.
527 */
528 txfifothresh = ehci->has_hostpc ? 0x10 : 10;
529 ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);
530
531 return 0;
532}
533
512static const struct ehci_driver_overrides tegra_overrides __initconst = { 534static const struct ehci_driver_overrides tegra_overrides __initconst = {
513 .extra_priv_size = sizeof(struct tegra_ehci_hcd), 535 .extra_priv_size = sizeof(struct tegra_ehci_hcd),
536 .reset = tegra_ehci_reset,
514}; 537};
515 538
516static int __init ehci_tegra_init(void) 539static int __init ehci_tegra_init(void)
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index c81c8721cc5a..cd871b895013 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -90,6 +90,24 @@ __acquires(ohci->lock)
90 dl_done_list (ohci); 90 dl_done_list (ohci);
91 finish_unlinks (ohci, ohci_frame_no(ohci)); 91 finish_unlinks (ohci, ohci_frame_no(ohci));
92 92
93 /*
94 * Some controllers don't handle "global" suspend properly if
95 * there are unsuspended ports. For these controllers, put all
96 * the enabled ports into suspend before suspending the root hub.
97 */
98 if (ohci->flags & OHCI_QUIRK_GLOBAL_SUSPEND) {
99 __hc32 __iomem *portstat = ohci->regs->roothub.portstatus;
100 int i;
101 unsigned temp;
102
103 for (i = 0; i < ohci->num_ports; (++i, ++portstat)) {
104 temp = ohci_readl(ohci, portstat);
105 if ((temp & (RH_PS_PES | RH_PS_PSS)) ==
106 RH_PS_PES)
107 ohci_writel(ohci, RH_PS_PSS, portstat);
108 }
109 }
110
93 /* maybe resume can wake root hub */ 111 /* maybe resume can wake root hub */
94 if (ohci_to_hcd(ohci)->self.root_hub->do_remote_wakeup || autostop) { 112 if (ohci_to_hcd(ohci)->self.root_hub->do_remote_wakeup || autostop) {
95 ohci->hc_control |= OHCI_CTRL_RWE; 113 ohci->hc_control |= OHCI_CTRL_RWE;
diff --git a/drivers/usb/host/ohci-jz4740.c b/drivers/usb/host/ohci-jz4740.c
index af8dc1b92d75..c2c221a332eb 100644
--- a/drivers/usb/host/ohci-jz4740.c
+++ b/drivers/usb/host/ohci-jz4740.c
@@ -82,14 +82,14 @@ static int ohci_jz4740_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
82 u16 wIndex, char *buf, u16 wLength) 82 u16 wIndex, char *buf, u16 wLength)
83{ 83{
84 struct jz4740_ohci_hcd *jz4740_ohci = hcd_to_jz4740_hcd(hcd); 84 struct jz4740_ohci_hcd *jz4740_ohci = hcd_to_jz4740_hcd(hcd);
85 int ret; 85 int ret = 0;
86 86
87 switch (typeReq) { 87 switch (typeReq) {
88 case SetHubFeature: 88 case SetPortFeature:
89 if (wValue == USB_PORT_FEAT_POWER) 89 if (wValue == USB_PORT_FEAT_POWER)
90 ret = ohci_jz4740_set_vbus_power(jz4740_ohci, true); 90 ret = ohci_jz4740_set_vbus_power(jz4740_ohci, true);
91 break; 91 break;
92 case ClearHubFeature: 92 case ClearPortFeature:
93 if (wValue == USB_PORT_FEAT_POWER) 93 if (wValue == USB_PORT_FEAT_POWER)
94 ret = ohci_jz4740_set_vbus_power(jz4740_ohci, false); 94 ret = ohci_jz4740_set_vbus_power(jz4740_ohci, false);
95 break; 95 break;
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index 90879e9ccbec..bb1509675727 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -160,6 +160,7 @@ static int ohci_quirk_amd700(struct usb_hcd *hcd)
160 ohci_dbg(ohci, "enabled AMD prefetch quirk\n"); 160 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
161 } 161 }
162 162
163 ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
163 return 0; 164 return 0;
164} 165}
165 166
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 9250cada13f0..4550ce05af7f 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -405,6 +405,8 @@ struct ohci_hcd {
405#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ 405#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */
406#define OHCI_QUIRK_AMD_PLL 0x200 /* AMD PLL quirk*/ 406#define OHCI_QUIRK_AMD_PLL 0x200 /* AMD PLL quirk*/
407#define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */ 407#define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */
408#define OHCI_QUIRK_GLOBAL_SUSPEND 0x800 /* must suspend ports */
409
408 // there are also chip quirks/bugs in init logic 410 // there are also chip quirks/bugs in init logic
409 411
410 struct work_struct nec_work; /* Worker for NEC quirk */ 412 struct work_struct nec_work; /* Worker for NEC quirk */
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 47390e369cd4..35d447780707 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -134,6 +134,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
134 */ 134 */
135 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) 135 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)
136 xhci->quirks |= XHCI_SPURIOUS_WAKEUP; 136 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
137
138 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
137 } 139 }
138 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 140 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
139 pdev->device == PCI_DEVICE_ID_ASROCK_P67) { 141 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
@@ -143,9 +145,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
143 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 145 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
144 } 146 }
145 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 147 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
146 pdev->device == 0x0015 && 148 pdev->device == 0x0015)
147 pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
148 pdev->subsystem_device == 0xc0cd)
149 xhci->quirks |= XHCI_RESET_ON_RESUME; 149 xhci->quirks |= XHCI_RESET_ON_RESUME;
150 if (pdev->vendor == PCI_VENDOR_ID_VIA) 150 if (pdev->vendor == PCI_VENDOR_ID_VIA)
151 xhci->quirks |= XHCI_RESET_ON_RESUME; 151 xhci->quirks |= XHCI_RESET_ON_RESUME;
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 5f926bea5ab1..7a0e3c720c00 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -550,6 +550,7 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
550 struct xhci_ring *ep_ring; 550 struct xhci_ring *ep_ring;
551 struct xhci_generic_trb *trb; 551 struct xhci_generic_trb *trb;
552 dma_addr_t addr; 552 dma_addr_t addr;
553 u64 hw_dequeue;
553 554
554 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id, 555 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
555 ep_index, stream_id); 556 ep_index, stream_id);
@@ -559,16 +560,6 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
559 stream_id); 560 stream_id);
560 return; 561 return;
561 } 562 }
562 state->new_cycle_state = 0;
563 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
564 "Finding segment containing stopped TRB.");
565 state->new_deq_seg = find_trb_seg(cur_td->start_seg,
566 dev->eps[ep_index].stopped_trb,
567 &state->new_cycle_state);
568 if (!state->new_deq_seg) {
569 WARN_ON(1);
570 return;
571 }
572 563
573 /* Dig out the cycle state saved by the xHC during the stop ep cmd */ 564 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
574 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 565 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
@@ -577,46 +568,57 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
577 if (ep->ep_state & EP_HAS_STREAMS) { 568 if (ep->ep_state & EP_HAS_STREAMS) {
578 struct xhci_stream_ctx *ctx = 569 struct xhci_stream_ctx *ctx =
579 &ep->stream_info->stream_ctx_array[stream_id]; 570 &ep->stream_info->stream_ctx_array[stream_id];
580 state->new_cycle_state = 0x1 & le64_to_cpu(ctx->stream_ring); 571 hw_dequeue = le64_to_cpu(ctx->stream_ring);
581 } else { 572 } else {
582 struct xhci_ep_ctx *ep_ctx 573 struct xhci_ep_ctx *ep_ctx
583 = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); 574 = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
584 state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq); 575 hw_dequeue = le64_to_cpu(ep_ctx->deq);
585 } 576 }
586 577
578 /* Find virtual address and segment of hardware dequeue pointer */
579 state->new_deq_seg = ep_ring->deq_seg;
580 state->new_deq_ptr = ep_ring->dequeue;
581 while (xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr)
582 != (dma_addr_t)(hw_dequeue & ~0xf)) {
583 next_trb(xhci, ep_ring, &state->new_deq_seg,
584 &state->new_deq_ptr);
585 if (state->new_deq_ptr == ep_ring->dequeue) {
586 WARN_ON(1);
587 return;
588 }
589 }
590 /*
591 * Find cycle state for last_trb, starting at old cycle state of
592 * hw_dequeue. If there is only one segment ring, find_trb_seg() will
593 * return immediately and cannot toggle the cycle state if this search
594 * wraps around, so add one more toggle manually in that case.
595 */
596 state->new_cycle_state = hw_dequeue & 0x1;
597 if (ep_ring->first_seg == ep_ring->first_seg->next &&
598 cur_td->last_trb < state->new_deq_ptr)
599 state->new_cycle_state ^= 0x1;
600
587 state->new_deq_ptr = cur_td->last_trb; 601 state->new_deq_ptr = cur_td->last_trb;
588 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 602 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
589 "Finding segment containing last TRB in TD."); 603 "Finding segment containing last TRB in TD.");
590 state->new_deq_seg = find_trb_seg(state->new_deq_seg, 604 state->new_deq_seg = find_trb_seg(state->new_deq_seg,
591 state->new_deq_ptr, 605 state->new_deq_ptr, &state->new_cycle_state);
592 &state->new_cycle_state);
593 if (!state->new_deq_seg) { 606 if (!state->new_deq_seg) {
594 WARN_ON(1); 607 WARN_ON(1);
595 return; 608 return;
596 } 609 }
597 610
611 /* Increment to find next TRB after last_trb. Cycle if appropriate. */
598 trb = &state->new_deq_ptr->generic; 612 trb = &state->new_deq_ptr->generic;
599 if (TRB_TYPE_LINK_LE32(trb->field[3]) && 613 if (TRB_TYPE_LINK_LE32(trb->field[3]) &&
600 (trb->field[3] & cpu_to_le32(LINK_TOGGLE))) 614 (trb->field[3] & cpu_to_le32(LINK_TOGGLE)))
601 state->new_cycle_state ^= 0x1; 615 state->new_cycle_state ^= 0x1;
602 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); 616 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
603 617
604 /* 618 /* Don't update the ring cycle state for the producer (us). */
605 * If there is only one segment in a ring, find_trb_seg()'s while loop
606 * will not run, and it will return before it has a chance to see if it
607 * needs to toggle the cycle bit. It can't tell if the stalled transfer
608 * ended just before the link TRB on a one-segment ring, or if the TD
609 * wrapped around the top of the ring, because it doesn't have the TD in
610 * question. Look for the one-segment case where stalled TRB's address
611 * is greater than the new dequeue pointer address.
612 */
613 if (ep_ring->first_seg == ep_ring->first_seg->next &&
614 state->new_deq_ptr < dev->eps[ep_index].stopped_trb)
615 state->new_cycle_state ^= 0x1;
616 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 619 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
617 "Cycle state = 0x%x", state->new_cycle_state); 620 "Cycle state = 0x%x", state->new_cycle_state);
618 621
619 /* Don't update the ring cycle state for the producer (us). */
620 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 622 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
621 "New dequeue segment = %p (virtual)", 623 "New dequeue segment = %p (virtual)",
622 state->new_deq_seg); 624 state->new_deq_seg);
@@ -799,7 +801,6 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
799 if (list_empty(&ep->cancelled_td_list)) { 801 if (list_empty(&ep->cancelled_td_list)) {
800 xhci_stop_watchdog_timer_in_irq(xhci, ep); 802 xhci_stop_watchdog_timer_in_irq(xhci, ep);
801 ep->stopped_td = NULL; 803 ep->stopped_td = NULL;
802 ep->stopped_trb = NULL;
803 ring_doorbell_for_active_rings(xhci, slot_id, ep_index); 804 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
804 return; 805 return;
805 } 806 }
@@ -867,11 +868,9 @@ remove_finished_td:
867 ring_doorbell_for_active_rings(xhci, slot_id, ep_index); 868 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
868 } 869 }
869 870
870 /* Clear stopped_td and stopped_trb if endpoint is not halted */ 871 /* Clear stopped_td if endpoint is not halted */
871 if (!(ep->ep_state & EP_HALTED)) { 872 if (!(ep->ep_state & EP_HALTED))
872 ep->stopped_td = NULL; 873 ep->stopped_td = NULL;
873 ep->stopped_trb = NULL;
874 }
875 874
876 /* 875 /*
877 * Drop the lock and complete the URBs in the cancelled TD list. 876 * Drop the lock and complete the URBs in the cancelled TD list.
@@ -1941,14 +1940,12 @@ static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1941 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; 1940 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1942 ep->ep_state |= EP_HALTED; 1941 ep->ep_state |= EP_HALTED;
1943 ep->stopped_td = td; 1942 ep->stopped_td = td;
1944 ep->stopped_trb = event_trb;
1945 ep->stopped_stream = stream_id; 1943 ep->stopped_stream = stream_id;
1946 1944
1947 xhci_queue_reset_ep(xhci, slot_id, ep_index); 1945 xhci_queue_reset_ep(xhci, slot_id, ep_index);
1948 xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index); 1946 xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
1949 1947
1950 ep->stopped_td = NULL; 1948 ep->stopped_td = NULL;
1951 ep->stopped_trb = NULL;
1952 ep->stopped_stream = 0; 1949 ep->stopped_stream = 0;
1953 1950
1954 xhci_ring_cmd_db(xhci); 1951 xhci_ring_cmd_db(xhci);
@@ -2030,7 +2027,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
2030 * the ring dequeue pointer or take this TD off any lists yet. 2027 * the ring dequeue pointer or take this TD off any lists yet.
2031 */ 2028 */
2032 ep->stopped_td = td; 2029 ep->stopped_td = td;
2033 ep->stopped_trb = event_trb;
2034 return 0; 2030 return 0;
2035 } else { 2031 } else {
2036 if (trb_comp_code == COMP_STALL) { 2032 if (trb_comp_code == COMP_STALL) {
@@ -2042,7 +2038,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
2042 * USB class driver clear the stall later. 2038 * USB class driver clear the stall later.
2043 */ 2039 */
2044 ep->stopped_td = td; 2040 ep->stopped_td = td;
2045 ep->stopped_trb = event_trb;
2046 ep->stopped_stream = ep_ring->stream_id; 2041 ep->stopped_stream = ep_ring->stream_id;
2047 } else if (xhci_requires_manual_halt_cleanup(xhci, 2042 } else if (xhci_requires_manual_halt_cleanup(xhci,
2048 ep_ctx, trb_comp_code)) { 2043 ep_ctx, trb_comp_code)) {
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 8fe4e124ddd4..300836972faa 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -408,16 +408,16 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd)
408 408
409#else 409#else
410 410
411static int xhci_try_enable_msi(struct usb_hcd *hcd) 411static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
412{ 412{
413 return 0; 413 return 0;
414} 414}
415 415
416static void xhci_cleanup_msix(struct xhci_hcd *xhci) 416static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
417{ 417{
418} 418}
419 419
420static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) 420static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
421{ 421{
422} 422}
423 423
@@ -2954,7 +2954,6 @@ void xhci_endpoint_reset(struct usb_hcd *hcd,
2954 xhci_ring_cmd_db(xhci); 2954 xhci_ring_cmd_db(xhci);
2955 } 2955 }
2956 virt_ep->stopped_td = NULL; 2956 virt_ep->stopped_td = NULL;
2957 virt_ep->stopped_trb = NULL;
2958 virt_ep->stopped_stream = 0; 2957 virt_ep->stopped_stream = 0;
2959 spin_unlock_irqrestore(&xhci->lock, flags); 2958 spin_unlock_irqrestore(&xhci->lock, flags);
2960 2959
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d280e9213d08..4746816aed3e 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -865,8 +865,6 @@ struct xhci_virt_ep {
865#define EP_GETTING_NO_STREAMS (1 << 5) 865#define EP_GETTING_NO_STREAMS (1 << 5)
866 /* ---- Related to URB cancellation ---- */ 866 /* ---- Related to URB cancellation ---- */
867 struct list_head cancelled_td_list; 867 struct list_head cancelled_td_list;
868 /* The TRB that was last reported in a stopped endpoint ring */
869 union xhci_trb *stopped_trb;
870 struct xhci_td *stopped_td; 868 struct xhci_td *stopped_td;
871 unsigned int stopped_stream; 869 unsigned int stopped_stream;
872 /* Watchdog timer for stop endpoint command to cancel URBs */ 870 /* Watchdog timer for stop endpoint command to cancel URBs */
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 3372ded5def7..e2fd263585de 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -470,8 +470,9 @@ static int dsps_musb_exit(struct musb *musb)
470 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 470 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
471 471
472 del_timer_sync(&glue->timer); 472 del_timer_sync(&glue->timer);
473
474 usb_phy_shutdown(musb->xceiv); 473 usb_phy_shutdown(musb->xceiv);
474 debugfs_remove_recursive(glue->dbgfs_root);
475
475 return 0; 476 return 0;
476} 477}
477 478
@@ -708,8 +709,6 @@ static int dsps_remove(struct platform_device *pdev)
708 pm_runtime_put(&pdev->dev); 709 pm_runtime_put(&pdev->dev);
709 pm_runtime_disable(&pdev->dev); 710 pm_runtime_disable(&pdev->dev);
710 711
711 debugfs_remove_recursive(glue->dbgfs_root);
712
713 return 0; 712 return 0;
714} 713}
715 714
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index d341c149a2f9..d369bf1f3936 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -316,7 +316,13 @@ static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
316{ 316{
317 struct omap2430_glue *glue = container_of(mailbox_work, 317 struct omap2430_glue *glue = container_of(mailbox_work,
318 struct omap2430_glue, omap_musb_mailbox_work); 318 struct omap2430_glue, omap_musb_mailbox_work);
319 struct musb *musb = glue_to_musb(glue);
320 struct device *dev = musb->controller;
321
322 pm_runtime_get_sync(dev);
319 omap_musb_set_mailbox(glue); 323 omap_musb_set_mailbox(glue);
324 pm_runtime_mark_last_busy(dev);
325 pm_runtime_put_autosuspend(dev);
320} 326}
321 327
322static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci) 328static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
@@ -416,6 +422,7 @@ static int omap2430_musb_init(struct musb *musb)
416 omap_musb_set_mailbox(glue); 422 omap_musb_set_mailbox(glue);
417 423
418 phy_init(musb->phy); 424 phy_init(musb->phy);
425 phy_power_on(musb->phy);
419 426
420 pm_runtime_put_noidle(musb->controller); 427 pm_runtime_put_noidle(musb->controller);
421 return 0; 428 return 0;
@@ -478,6 +485,7 @@ static int omap2430_musb_exit(struct musb *musb)
478 del_timer_sync(&musb_idle_timer); 485 del_timer_sync(&musb_idle_timer);
479 486
480 omap2430_low_level_exit(musb); 487 omap2430_low_level_exit(musb);
488 phy_power_off(musb->phy);
481 phy_exit(musb->phy); 489 phy_exit(musb->phy);
482 490
483 return 0; 491 return 0;
diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c
index d75196ad5f2f..35b6083b7999 100644
--- a/drivers/usb/phy/phy-am335x-control.c
+++ b/drivers/usb/phy/phy-am335x-control.c
@@ -3,6 +3,7 @@
3#include <linux/err.h> 3#include <linux/err.h>
4#include <linux/of.h> 4#include <linux/of.h>
5#include <linux/io.h> 5#include <linux/io.h>
6#include <linux/delay.h>
6#include "am35x-phy-control.h" 7#include "am35x-phy-control.h"
7 8
8struct am335x_control_usb { 9struct am335x_control_usb {
@@ -86,6 +87,14 @@ static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, bool on)
86 } 87 }
87 88
88 writel(val, usb_ctrl->phy_reg + reg); 89 writel(val, usb_ctrl->phy_reg + reg);
90
91 /*
92 * Give the PHY ~1ms to complete the power up operation.
93 * Tests have shown unstable behaviour if other USB PHY related
94 * registers are written too shortly after such a transition.
95 */
96 if (on)
97 mdelay(1);
89} 98}
90 99
91static const struct phy_control ctrl_am335x = { 100static const struct phy_control ctrl_am335x = {
diff --git a/drivers/usb/phy/phy-fsm-usb.c b/drivers/usb/phy/phy-fsm-usb.c
index c47e5a6edde2..d03fadd2629f 100644
--- a/drivers/usb/phy/phy-fsm-usb.c
+++ b/drivers/usb/phy/phy-fsm-usb.c
@@ -303,17 +303,18 @@ int otg_statemachine(struct otg_fsm *fsm)
303 otg_set_state(fsm, OTG_STATE_A_WAIT_VRISE); 303 otg_set_state(fsm, OTG_STATE_A_WAIT_VRISE);
304 break; 304 break;
305 case OTG_STATE_A_WAIT_VRISE: 305 case OTG_STATE_A_WAIT_VRISE:
306 if (fsm->id || fsm->a_bus_drop || fsm->a_vbus_vld || 306 if (fsm->a_vbus_vld)
307 fsm->a_wait_vrise_tmout) {
308 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON); 307 otg_set_state(fsm, OTG_STATE_A_WAIT_BCON);
309 } 308 else if (fsm->id || fsm->a_bus_drop ||
309 fsm->a_wait_vrise_tmout)
310 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
310 break; 311 break;
311 case OTG_STATE_A_WAIT_BCON: 312 case OTG_STATE_A_WAIT_BCON:
312 if (!fsm->a_vbus_vld) 313 if (!fsm->a_vbus_vld)
313 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR); 314 otg_set_state(fsm, OTG_STATE_A_VBUS_ERR);
314 else if (fsm->b_conn) 315 else if (fsm->b_conn)
315 otg_set_state(fsm, OTG_STATE_A_HOST); 316 otg_set_state(fsm, OTG_STATE_A_HOST);
316 else if (fsm->id | fsm->a_bus_drop | fsm->a_wait_bcon_tmout) 317 else if (fsm->id || fsm->a_bus_drop || fsm->a_wait_bcon_tmout)
317 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL); 318 otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL);
318 break; 319 break;
319 case OTG_STATE_A_HOST: 320 case OTG_STATE_A_HOST:
diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c
index 8afa813d690b..36b6bce33b20 100644
--- a/drivers/usb/phy/phy.c
+++ b/drivers/usb/phy/phy.c
@@ -132,6 +132,9 @@ struct usb_phy *usb_get_phy(enum usb_phy_type type)
132 if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { 132 if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) {
133 pr_debug("PHY: unable to find transceiver of type %s\n", 133 pr_debug("PHY: unable to find transceiver of type %s\n",
134 usb_phy_type_string(type)); 134 usb_phy_type_string(type));
135 if (!IS_ERR(phy))
136 phy = ERR_PTR(-ENODEV);
137
135 goto err0; 138 goto err0;
136 } 139 }
137 140
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 95fa1217afdd..762e4a5f5ae9 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -104,6 +104,7 @@ static const struct usb_device_id id_table[] = {
104 { USB_DEVICE(0x10C4, 0x8218) }, /* Lipowsky Industrie Elektronik GmbH, HARP-1 */ 104 { USB_DEVICE(0x10C4, 0x8218) }, /* Lipowsky Industrie Elektronik GmbH, HARP-1 */
105 { USB_DEVICE(0x10C4, 0x822B) }, /* Modem EDGE(GSM) Comander 2 */ 105 { USB_DEVICE(0x10C4, 0x822B) }, /* Modem EDGE(GSM) Comander 2 */
106 { USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demonstration module */ 106 { USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demonstration module */
107 { USB_DEVICE(0x10C4, 0x8281) }, /* Nanotec Plug & Drive */
107 { USB_DEVICE(0x10C4, 0x8293) }, /* Telegesis ETRX2USB */ 108 { USB_DEVICE(0x10C4, 0x8293) }, /* Telegesis ETRX2USB */
108 { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */ 109 { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
109 { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */ 110 { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 44ab12986805..7c6e1dedeb06 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -909,6 +909,39 @@ static const struct usb_device_id id_table_combined[] = {
909 { USB_DEVICE(FTDI_VID, FTDI_Z3X_PID) }, 909 { USB_DEVICE(FTDI_VID, FTDI_Z3X_PID) },
910 /* Cressi Devices */ 910 /* Cressi Devices */
911 { USB_DEVICE(FTDI_VID, FTDI_CRESSI_PID) }, 911 { USB_DEVICE(FTDI_VID, FTDI_CRESSI_PID) },
912 /* Brainboxes Devices */
913 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_001_PID) },
914 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_012_PID) },
915 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_023_PID) },
916 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_034_PID) },
917 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_101_PID) },
918 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_1_PID) },
919 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_2_PID) },
920 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_3_PID) },
921 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_4_PID) },
922 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_5_PID) },
923 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_6_PID) },
924 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_7_PID) },
925 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_8_PID) },
926 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_257_PID) },
927 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_1_PID) },
928 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_2_PID) },
929 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_3_PID) },
930 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_4_PID) },
931 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_313_PID) },
932 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_324_PID) },
933 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_346_1_PID) },
934 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_346_2_PID) },
935 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_357_PID) },
936 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_1_PID) },
937 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_2_PID) },
938 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_3_PID) },
939 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_701_1_PID) },
940 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_701_2_PID) },
941 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_1_PID) },
942 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_2_PID) },
943 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_3_PID) },
944 { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_4_PID) },
912 { } /* Terminating entry */ 945 { } /* Terminating entry */
913}; 946};
914 947
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index e599fbfcde5f..993c93df6874 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -1326,3 +1326,40 @@
1326 * Manufacturer: Cressi 1326 * Manufacturer: Cressi
1327 */ 1327 */
1328#define FTDI_CRESSI_PID 0x87d0 1328#define FTDI_CRESSI_PID 0x87d0
1329
1330/*
1331 * Brainboxes devices
1332 */
1333#define BRAINBOXES_VID 0x05d1
1334#define BRAINBOXES_VX_001_PID 0x1001 /* VX-001 ExpressCard 1 Port RS232 */
1335#define BRAINBOXES_VX_012_PID 0x1002 /* VX-012 ExpressCard 2 Port RS232 */
1336#define BRAINBOXES_VX_023_PID 0x1003 /* VX-023 ExpressCard 1 Port RS422/485 */
1337#define BRAINBOXES_VX_034_PID 0x1004 /* VX-034 ExpressCard 2 Port RS422/485 */
1338#define BRAINBOXES_US_101_PID 0x1011 /* US-101 1xRS232 */
1339#define BRAINBOXES_US_324_PID 0x1013 /* US-324 1xRS422/485 1Mbaud */
1340#define BRAINBOXES_US_606_1_PID 0x2001 /* US-606 6 Port RS232 Serial Port 1 and 2 */
1341#define BRAINBOXES_US_606_2_PID 0x2002 /* US-606 6 Port RS232 Serial Port 3 and 4 */
1342#define BRAINBOXES_US_606_3_PID 0x2003 /* US-606 6 Port RS232 Serial Port 4 and 6 */
1343#define BRAINBOXES_US_701_1_PID 0x2011 /* US-701 4xRS232 1Mbaud Port 1 and 2 */
1344#define BRAINBOXES_US_701_2_PID 0x2012 /* US-701 4xRS422 1Mbaud Port 3 and 4 */
1345#define BRAINBOXES_US_279_1_PID 0x2021 /* US-279 8xRS422 1Mbaud Port 1 and 2 */
1346#define BRAINBOXES_US_279_2_PID 0x2022 /* US-279 8xRS422 1Mbaud Port 3 and 4 */
1347#define BRAINBOXES_US_279_3_PID 0x2023 /* US-279 8xRS422 1Mbaud Port 5 and 6 */
1348#define BRAINBOXES_US_279_4_PID 0x2024 /* US-279 8xRS422 1Mbaud Port 7 and 8 */
1349#define BRAINBOXES_US_346_1_PID 0x3011 /* US-346 4xRS422/485 1Mbaud Port 1 and 2 */
1350#define BRAINBOXES_US_346_2_PID 0x3012 /* US-346 4xRS422/485 1Mbaud Port 3 and 4 */
1351#define BRAINBOXES_US_257_PID 0x5001 /* US-257 2xRS232 1Mbaud */
1352#define BRAINBOXES_US_313_PID 0x6001 /* US-313 2xRS422/485 1Mbaud */
1353#define BRAINBOXES_US_357_PID 0x7001 /* US_357 1xRS232/422/485 */
1354#define BRAINBOXES_US_842_1_PID 0x8001 /* US-842 8xRS422/485 1Mbaud Port 1 and 2 */
1355#define BRAINBOXES_US_842_2_PID 0x8002 /* US-842 8xRS422/485 1Mbaud Port 3 and 4 */
1356#define BRAINBOXES_US_842_3_PID 0x8003 /* US-842 8xRS422/485 1Mbaud Port 5 and 6 */
1357#define BRAINBOXES_US_842_4_PID 0x8004 /* US-842 8xRS422/485 1Mbaud Port 7 and 8 */
1358#define BRAINBOXES_US_160_1_PID 0x9001 /* US-160 16xRS232 1Mbaud Port 1 and 2 */
1359#define BRAINBOXES_US_160_2_PID 0x9002 /* US-160 16xRS232 1Mbaud Port 3 and 4 */
1360#define BRAINBOXES_US_160_3_PID 0x9003 /* US-160 16xRS232 1Mbaud Port 5 and 6 */
1361#define BRAINBOXES_US_160_4_PID 0x9004 /* US-160 16xRS232 1Mbaud Port 7 and 8 */
1362#define BRAINBOXES_US_160_5_PID 0x9005 /* US-160 16xRS232 1Mbaud Port 9 and 10 */
1363#define BRAINBOXES_US_160_6_PID 0x9006 /* US-160 16xRS232 1Mbaud Port 11 and 12 */
1364#define BRAINBOXES_US_160_7_PID 0x9007 /* US-160 16xRS232 1Mbaud Port 13 and 14 */
1365#define BRAINBOXES_US_160_8_PID 0x9008 /* US-160 16xRS232 1Mbaud Port 15 and 16 */
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index a2db5be9c305..df90dae53eb9 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -28,6 +28,7 @@
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/serial.h> 30#include <linux/serial.h>
31#include <linux/swab.h>
31#include <linux/kfifo.h> 32#include <linux/kfifo.h>
32#include <linux/ioctl.h> 33#include <linux/ioctl.h>
33#include <linux/firmware.h> 34#include <linux/firmware.h>
@@ -280,7 +281,7 @@ static int read_download_mem(struct usb_device *dev, int start_address,
280{ 281{
281 int status = 0; 282 int status = 0;
282 __u8 read_length; 283 __u8 read_length;
283 __be16 be_start_address; 284 u16 be_start_address;
284 285
285 dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, length); 286 dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, length);
286 287
@@ -296,10 +297,14 @@ static int read_download_mem(struct usb_device *dev, int start_address,
296 if (read_length > 1) { 297 if (read_length > 1) {
297 dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, read_length); 298 dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, read_length);
298 } 299 }
299 be_start_address = cpu_to_be16(start_address); 300 /*
301 * NOTE: Must use swab as wIndex is sent in little-endian
302 * byte order regardless of host byte order.
303 */
304 be_start_address = swab16((u16)start_address);
300 status = ti_vread_sync(dev, UMPC_MEMORY_READ, 305 status = ti_vread_sync(dev, UMPC_MEMORY_READ,
301 (__u16)address_type, 306 (__u16)address_type,
302 (__force __u16)be_start_address, 307 be_start_address,
303 buffer, read_length); 308 buffer, read_length);
304 309
305 if (status) { 310 if (status) {
@@ -394,7 +399,7 @@ static int write_i2c_mem(struct edgeport_serial *serial,
394 struct device *dev = &serial->serial->dev->dev; 399 struct device *dev = &serial->serial->dev->dev;
395 int status = 0; 400 int status = 0;
396 int write_length; 401 int write_length;
397 __be16 be_start_address; 402 u16 be_start_address;
398 403
399 /* We can only send a maximum of 1 aligned byte page at a time */ 404 /* We can only send a maximum of 1 aligned byte page at a time */
400 405
@@ -409,11 +414,16 @@ static int write_i2c_mem(struct edgeport_serial *serial,
409 __func__, start_address, write_length); 414 __func__, start_address, write_length);
410 usb_serial_debug_data(dev, __func__, write_length, buffer); 415 usb_serial_debug_data(dev, __func__, write_length, buffer);
411 416
412 /* Write first page */ 417 /*
413 be_start_address = cpu_to_be16(start_address); 418 * Write first page.
419 *
420 * NOTE: Must use swab as wIndex is sent in little-endian byte order
421 * regardless of host byte order.
422 */
423 be_start_address = swab16((u16)start_address);
414 status = ti_vsend_sync(serial->serial->dev, 424 status = ti_vsend_sync(serial->serial->dev,
415 UMPC_MEMORY_WRITE, (__u16)address_type, 425 UMPC_MEMORY_WRITE, (__u16)address_type,
416 (__force __u16)be_start_address, 426 be_start_address,
417 buffer, write_length); 427 buffer, write_length);
418 if (status) { 428 if (status) {
419 dev_dbg(dev, "%s - ERROR %d\n", __func__, status); 429 dev_dbg(dev, "%s - ERROR %d\n", __func__, status);
@@ -436,11 +446,16 @@ static int write_i2c_mem(struct edgeport_serial *serial,
436 __func__, start_address, write_length); 446 __func__, start_address, write_length);
437 usb_serial_debug_data(dev, __func__, write_length, buffer); 447 usb_serial_debug_data(dev, __func__, write_length, buffer);
438 448
439 /* Write next page */ 449 /*
440 be_start_address = cpu_to_be16(start_address); 450 * Write next page.
451 *
452 * NOTE: Must use swab as wIndex is sent in little-endian byte
453 * order regardless of host byte order.
454 */
455 be_start_address = swab16((u16)start_address);
441 status = ti_vsend_sync(serial->serial->dev, UMPC_MEMORY_WRITE, 456 status = ti_vsend_sync(serial->serial->dev, UMPC_MEMORY_WRITE,
442 (__u16)address_type, 457 (__u16)address_type,
443 (__force __u16)be_start_address, 458 be_start_address,
444 buffer, write_length); 459 buffer, write_length);
445 if (status) { 460 if (status) {
446 dev_err(dev, "%s - ERROR %d\n", __func__, status); 461 dev_err(dev, "%s - ERROR %d\n", __func__, status);
@@ -585,8 +600,8 @@ static int get_descriptor_addr(struct edgeport_serial *serial,
585 if (rom_desc->Type == desc_type) 600 if (rom_desc->Type == desc_type)
586 return start_address; 601 return start_address;
587 602
588 start_address = start_address + sizeof(struct ti_i2c_desc) 603 start_address = start_address + sizeof(struct ti_i2c_desc) +
589 + rom_desc->Size; 604 le16_to_cpu(rom_desc->Size);
590 605
591 } while ((start_address < TI_MAX_I2C_SIZE) && rom_desc->Type); 606 } while ((start_address < TI_MAX_I2C_SIZE) && rom_desc->Type);
592 607
@@ -599,7 +614,7 @@ static int valid_csum(struct ti_i2c_desc *rom_desc, __u8 *buffer)
599 __u16 i; 614 __u16 i;
600 __u8 cs = 0; 615 __u8 cs = 0;
601 616
602 for (i = 0; i < rom_desc->Size; i++) 617 for (i = 0; i < le16_to_cpu(rom_desc->Size); i++)
603 cs = (__u8)(cs + buffer[i]); 618 cs = (__u8)(cs + buffer[i]);
604 619
605 if (cs != rom_desc->CheckSum) { 620 if (cs != rom_desc->CheckSum) {
@@ -650,7 +665,7 @@ static int check_i2c_image(struct edgeport_serial *serial)
650 break; 665 break;
651 666
652 if ((start_address + sizeof(struct ti_i2c_desc) + 667 if ((start_address + sizeof(struct ti_i2c_desc) +
653 rom_desc->Size) > TI_MAX_I2C_SIZE) { 668 le16_to_cpu(rom_desc->Size)) > TI_MAX_I2C_SIZE) {
654 status = -ENODEV; 669 status = -ENODEV;
655 dev_dbg(dev, "%s - structure too big, erroring out.\n", __func__); 670 dev_dbg(dev, "%s - structure too big, erroring out.\n", __func__);
656 break; 671 break;
@@ -665,7 +680,8 @@ static int check_i2c_image(struct edgeport_serial *serial)
665 /* Read the descriptor data */ 680 /* Read the descriptor data */
666 status = read_rom(serial, start_address + 681 status = read_rom(serial, start_address +
667 sizeof(struct ti_i2c_desc), 682 sizeof(struct ti_i2c_desc),
668 rom_desc->Size, buffer); 683 le16_to_cpu(rom_desc->Size),
684 buffer);
669 if (status) 685 if (status)
670 break; 686 break;
671 687
@@ -674,7 +690,7 @@ static int check_i2c_image(struct edgeport_serial *serial)
674 break; 690 break;
675 } 691 }
676 start_address = start_address + sizeof(struct ti_i2c_desc) + 692 start_address = start_address + sizeof(struct ti_i2c_desc) +
677 rom_desc->Size; 693 le16_to_cpu(rom_desc->Size);
678 694
679 } while ((rom_desc->Type != I2C_DESC_TYPE_ION) && 695 } while ((rom_desc->Type != I2C_DESC_TYPE_ION) &&
680 (start_address < TI_MAX_I2C_SIZE)); 696 (start_address < TI_MAX_I2C_SIZE));
@@ -712,7 +728,7 @@ static int get_manuf_info(struct edgeport_serial *serial, __u8 *buffer)
712 728
713 /* Read the descriptor data */ 729 /* Read the descriptor data */
714 status = read_rom(serial, start_address+sizeof(struct ti_i2c_desc), 730 status = read_rom(serial, start_address+sizeof(struct ti_i2c_desc),
715 rom_desc->Size, buffer); 731 le16_to_cpu(rom_desc->Size), buffer);
716 if (status) 732 if (status)
717 goto exit; 733 goto exit;
718 734
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 68fc9fe65936..f213ee978516 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -234,8 +234,31 @@ static void option_instat_callback(struct urb *urb);
234#define QUALCOMM_VENDOR_ID 0x05C6 234#define QUALCOMM_VENDOR_ID 0x05C6
235 235
236#define CMOTECH_VENDOR_ID 0x16d8 236#define CMOTECH_VENDOR_ID 0x16d8
237#define CMOTECH_PRODUCT_6008 0x6008 237#define CMOTECH_PRODUCT_6001 0x6001
238#define CMOTECH_PRODUCT_6280 0x6280 238#define CMOTECH_PRODUCT_CMU_300 0x6002
239#define CMOTECH_PRODUCT_6003 0x6003
240#define CMOTECH_PRODUCT_6004 0x6004
241#define CMOTECH_PRODUCT_6005 0x6005
242#define CMOTECH_PRODUCT_CGU_628A 0x6006
243#define CMOTECH_PRODUCT_CHE_628S 0x6007
244#define CMOTECH_PRODUCT_CMU_301 0x6008
245#define CMOTECH_PRODUCT_CHU_628 0x6280
246#define CMOTECH_PRODUCT_CHU_628S 0x6281
247#define CMOTECH_PRODUCT_CDU_680 0x6803
248#define CMOTECH_PRODUCT_CDU_685A 0x6804
249#define CMOTECH_PRODUCT_CHU_720S 0x7001
250#define CMOTECH_PRODUCT_7002 0x7002
251#define CMOTECH_PRODUCT_CHU_629K 0x7003
252#define CMOTECH_PRODUCT_7004 0x7004
253#define CMOTECH_PRODUCT_7005 0x7005
254#define CMOTECH_PRODUCT_CGU_629 0x7006
255#define CMOTECH_PRODUCT_CHU_629S 0x700a
256#define CMOTECH_PRODUCT_CHU_720I 0x7211
257#define CMOTECH_PRODUCT_7212 0x7212
258#define CMOTECH_PRODUCT_7213 0x7213
259#define CMOTECH_PRODUCT_7251 0x7251
260#define CMOTECH_PRODUCT_7252 0x7252
261#define CMOTECH_PRODUCT_7253 0x7253
239 262
240#define TELIT_VENDOR_ID 0x1bc7 263#define TELIT_VENDOR_ID 0x1bc7
241#define TELIT_PRODUCT_UC864E 0x1003 264#define TELIT_PRODUCT_UC864E 0x1003
@@ -243,6 +266,7 @@ static void option_instat_callback(struct urb *urb);
243#define TELIT_PRODUCT_CC864_DUAL 0x1005 266#define TELIT_PRODUCT_CC864_DUAL 0x1005
244#define TELIT_PRODUCT_CC864_SINGLE 0x1006 267#define TELIT_PRODUCT_CC864_SINGLE 0x1006
245#define TELIT_PRODUCT_DE910_DUAL 0x1010 268#define TELIT_PRODUCT_DE910_DUAL 0x1010
269#define TELIT_PRODUCT_UE910_V2 0x1012
246#define TELIT_PRODUCT_LE920 0x1200 270#define TELIT_PRODUCT_LE920 0x1200
247 271
248/* ZTE PRODUCTS */ 272/* ZTE PRODUCTS */
@@ -286,6 +310,7 @@ static void option_instat_callback(struct urb *urb);
286#define ALCATEL_PRODUCT_X060S_X200 0x0000 310#define ALCATEL_PRODUCT_X060S_X200 0x0000
287#define ALCATEL_PRODUCT_X220_X500D 0x0017 311#define ALCATEL_PRODUCT_X220_X500D 0x0017
288#define ALCATEL_PRODUCT_L100V 0x011e 312#define ALCATEL_PRODUCT_L100V 0x011e
313#define ALCATEL_PRODUCT_L800MA 0x0203
289 314
290#define PIRELLI_VENDOR_ID 0x1266 315#define PIRELLI_VENDOR_ID 0x1266
291#define PIRELLI_PRODUCT_C100_1 0x1002 316#define PIRELLI_PRODUCT_C100_1 0x1002
@@ -348,6 +373,7 @@ static void option_instat_callback(struct urb *urb);
348#define OLIVETTI_PRODUCT_OLICARD100 0xc000 373#define OLIVETTI_PRODUCT_OLICARD100 0xc000
349#define OLIVETTI_PRODUCT_OLICARD145 0xc003 374#define OLIVETTI_PRODUCT_OLICARD145 0xc003
350#define OLIVETTI_PRODUCT_OLICARD200 0xc005 375#define OLIVETTI_PRODUCT_OLICARD200 0xc005
376#define OLIVETTI_PRODUCT_OLICARD500 0xc00b
351 377
352/* Celot products */ 378/* Celot products */
353#define CELOT_VENDOR_ID 0x211f 379#define CELOT_VENDOR_ID 0x211f
@@ -501,6 +527,10 @@ static const struct option_blacklist_info huawei_cdc12_blacklist = {
501 .reserved = BIT(1) | BIT(2), 527 .reserved = BIT(1) | BIT(2),
502}; 528};
503 529
530static const struct option_blacklist_info net_intf0_blacklist = {
531 .reserved = BIT(0),
532};
533
504static const struct option_blacklist_info net_intf1_blacklist = { 534static const struct option_blacklist_info net_intf1_blacklist = {
505 .reserved = BIT(1), 535 .reserved = BIT(1),
506}; 536};
@@ -1034,13 +1064,53 @@ static const struct usb_device_id option_ids[] = {
1034 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ 1064 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
1035 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ 1065 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
1036 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */ 1066 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */
1037 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6280) }, /* BP3-USB & BP3-EXT HSDPA */ 1067 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
1038 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6008) }, 1068 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) },
1069 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003),
1070 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1071 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6004) },
1072 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6005) },
1073 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_628A) },
1074 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHE_628S),
1075 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1076 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_301),
1077 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1078 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628),
1079 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1080 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628S) },
1081 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_680) },
1082 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_685A) },
1083 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720S),
1084 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1085 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7002),
1086 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1087 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629K),
1088 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1089 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7004),
1090 .driver_info = (kernel_ulong_t)&net_intf3_blacklist },
1091 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7005) },
1092 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_629),
1093 .driver_info = (kernel_ulong_t)&net_intf5_blacklist },
1094 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629S),
1095 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1096 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720I),
1097 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1098 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7212),
1099 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1100 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7213),
1101 .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
1102 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7251),
1103 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
1104 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7252),
1105 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
1106 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7253),
1107 .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
1039 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) }, 1108 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
1040 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) }, 1109 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) },
1041 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_DUAL) }, 1110 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_DUAL) },
1042 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_SINGLE) }, 1111 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_SINGLE) },
1043 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_DE910_DUAL) }, 1112 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_DE910_DUAL) },
1113 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UE910_V2) },
1044 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE920), 1114 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE920),
1045 .driver_info = (kernel_ulong_t)&telit_le920_blacklist }, 1115 .driver_info = (kernel_ulong_t)&telit_le920_blacklist },
1046 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */ 1116 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */
@@ -1498,6 +1568,8 @@ static const struct usb_device_id option_ids[] = {
1498 .driver_info = (kernel_ulong_t)&net_intf5_blacklist }, 1568 .driver_info = (kernel_ulong_t)&net_intf5_blacklist },
1499 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L100V), 1569 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L100V),
1500 .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, 1570 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1571 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L800MA),
1572 .driver_info = (kernel_ulong_t)&net_intf2_blacklist },
1501 { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, 1573 { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
1502 { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, 1574 { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
1503 { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), 1575 { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14),
@@ -1543,6 +1615,9 @@ static const struct usb_device_id option_ids[] = {
1543 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200), 1615 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200),
1544 .driver_info = (kernel_ulong_t)&net_intf6_blacklist 1616 .driver_info = (kernel_ulong_t)&net_intf6_blacklist
1545 }, 1617 },
1618 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD500),
1619 .driver_info = (kernel_ulong_t)&net_intf4_blacklist
1620 },
1546 { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ 1621 { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
1547 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/ 1622 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/
1548 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) }, 1623 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) },
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 2e22fc22c382..b3d5a35c0d4b 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -83,6 +83,9 @@ static const struct usb_device_id id_table[] = {
83 { USB_DEVICE(YCCABLE_VENDOR_ID, YCCABLE_PRODUCT_ID) }, 83 { USB_DEVICE(YCCABLE_VENDOR_ID, YCCABLE_PRODUCT_ID) },
84 { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) }, 84 { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) },
85 { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, 85 { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) },
86 { USB_DEVICE(HP_VENDOR_ID, HP_LD960_PRODUCT_ID) },
87 { USB_DEVICE(HP_VENDOR_ID, HP_LCM220_PRODUCT_ID) },
88 { USB_DEVICE(HP_VENDOR_ID, HP_LCM960_PRODUCT_ID) },
86 { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, 89 { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) },
87 { USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) }, 90 { USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) },
88 { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) }, 91 { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) },
diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h
index c38b8c00c06f..42bc082896ac 100644
--- a/drivers/usb/serial/pl2303.h
+++ b/drivers/usb/serial/pl2303.h
@@ -121,8 +121,11 @@
121#define SUPERIAL_VENDOR_ID 0x5372 121#define SUPERIAL_VENDOR_ID 0x5372
122#define SUPERIAL_PRODUCT_ID 0x2303 122#define SUPERIAL_PRODUCT_ID 0x2303
123 123
124/* Hewlett-Packard LD220-HP POS Pole Display */ 124/* Hewlett-Packard POS Pole Displays */
125#define HP_VENDOR_ID 0x03f0 125#define HP_VENDOR_ID 0x03f0
126#define HP_LD960_PRODUCT_ID 0x0b39
127#define HP_LCM220_PRODUCT_ID 0x3139
128#define HP_LCM960_PRODUCT_ID 0x3239
126#define HP_LD220_PRODUCT_ID 0x3524 129#define HP_LD220_PRODUCT_ID 0x3524
127 130
128/* Cressi Edy (diving computer) PC interface */ 131/* Cressi Edy (diving computer) PC interface */
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index 968a40201e5f..6c0a542e8ec1 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
@@ -136,12 +136,36 @@ static const struct usb_device_id id_table[] = {
136 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 0)}, /* Sierra Wireless MC7710 Device Management */ 136 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 0)}, /* Sierra Wireless MC7710 Device Management */
137 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 2)}, /* Sierra Wireless MC7710 NMEA */ 137 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 2)}, /* Sierra Wireless MC7710 NMEA */
138 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 3)}, /* Sierra Wireless MC7710 Modem */ 138 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 3)}, /* Sierra Wireless MC7710 Modem */
139 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 0)}, /* Sierra Wireless MC73xx Device Management */
140 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 2)}, /* Sierra Wireless MC73xx NMEA */
141 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 3)}, /* Sierra Wireless MC73xx Modem */
139 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 0)}, /* Sierra Wireless EM7700 Device Management */ 142 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 0)}, /* Sierra Wireless EM7700 Device Management */
140 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 2)}, /* Sierra Wireless EM7700 NMEA */ 143 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 2)}, /* Sierra Wireless EM7700 NMEA */
141 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 3)}, /* Sierra Wireless EM7700 Modem */ 144 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 3)}, /* Sierra Wireless EM7700 Modem */
145 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 0)}, /* Sierra Wireless EM7355 Device Management */
146 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 2)}, /* Sierra Wireless EM7355 NMEA */
147 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 3)}, /* Sierra Wireless EM7355 Modem */
148 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 0)}, /* Sierra Wireless MC7305/MC7355 Device Management */
149 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 2)}, /* Sierra Wireless MC7305/MC7355 NMEA */
150 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 3)}, /* Sierra Wireless MC7305/MC7355 Modem */
142 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 0)}, /* Netgear AirCard 340U Device Management */ 151 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 0)}, /* Netgear AirCard 340U Device Management */
143 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 2)}, /* Netgear AirCard 340U NMEA */ 152 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 2)}, /* Netgear AirCard 340U NMEA */
144 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 3)}, /* Netgear AirCard 340U Modem */ 153 {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 3)}, /* Netgear AirCard 340U Modem */
154 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a2, 0)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card Device Management */
155 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a2, 2)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card NMEA */
156 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a2, 3)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card Modem */
157 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a3, 0)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card Device Management */
158 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a3, 2)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card NMEA */
159 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a3, 3)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card Modem */
160 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a4, 0)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card Device Management */
161 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a4, 2)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card NMEA */
162 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a4, 3)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card Modem */
163 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a8, 0)}, /* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card Device Management */
164 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a8, 2)}, /* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card NMEA */
165 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a8, 3)}, /* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card Modem */
166 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a9, 0)}, /* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card Device Management */
167 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a9, 2)}, /* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card NMEA */
168 {USB_DEVICE_INTERFACE_NUMBER(0x413c, 0x81a9, 3)}, /* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card Modem */
145 169
146 { } /* Terminating entry */ 170 { } /* Terminating entry */
147}; 171};
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index a9eb6221a815..6b192e602ce0 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -291,7 +291,6 @@ static const struct usb_device_id id_table[] = {
291 { USB_DEVICE(0x0f3d, 0x68A3), /* Airprime/Sierra Wireless Direct IP modems */ 291 { USB_DEVICE(0x0f3d, 0x68A3), /* Airprime/Sierra Wireless Direct IP modems */
292 .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist 292 .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
293 }, 293 },
294 { USB_DEVICE(0x413C, 0x08133) }, /* Dell Computer Corp. Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port */
295 294
296 { } 295 { }
297}; 296};
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index 81fc0dfcfdcf..6d40d56378d7 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -1347,10 +1347,12 @@ static int usb_serial_register(struct usb_serial_driver *driver)
1347static void usb_serial_deregister(struct usb_serial_driver *device) 1347static void usb_serial_deregister(struct usb_serial_driver *device)
1348{ 1348{
1349 pr_info("USB Serial deregistering driver %s\n", device->description); 1349 pr_info("USB Serial deregistering driver %s\n", device->description);
1350
1350 mutex_lock(&table_lock); 1351 mutex_lock(&table_lock);
1351 list_del(&device->driver_list); 1352 list_del(&device->driver_list);
1352 usb_serial_bus_deregister(device);
1353 mutex_unlock(&table_lock); 1353 mutex_unlock(&table_lock);
1354
1355 usb_serial_bus_deregister(device);
1354} 1356}
1355 1357
1356/** 1358/**
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c
index 640fe0173236..b078440e822f 100644
--- a/drivers/usb/serial/usb_wwan.c
+++ b/drivers/usb/serial/usb_wwan.c
@@ -466,6 +466,9 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
466 int err; 466 int err;
467 int i; 467 int i;
468 468
469 if (!port->bulk_in_size || !port->bulk_out_size)
470 return -ENODEV;
471
469 portdata = kzalloc(sizeof(*portdata), GFP_KERNEL); 472 portdata = kzalloc(sizeof(*portdata), GFP_KERNEL);
470 if (!portdata) 473 if (!portdata)
471 return -ENOMEM; 474 return -ENOMEM;
@@ -473,9 +476,6 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
473 init_usb_anchor(&portdata->delayed); 476 init_usb_anchor(&portdata->delayed);
474 477
475 for (i = 0; i < N_IN_URB; i++) { 478 for (i = 0; i < N_IN_URB; i++) {
476 if (!port->bulk_in_size)
477 break;
478
479 buffer = (u8 *)__get_free_page(GFP_KERNEL); 479 buffer = (u8 *)__get_free_page(GFP_KERNEL);
480 if (!buffer) 480 if (!buffer)
481 goto bail_out_error; 481 goto bail_out_error;
@@ -489,9 +489,6 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
489 } 489 }
490 490
491 for (i = 0; i < N_OUT_URB; i++) { 491 for (i = 0; i < N_OUT_URB; i++) {
492 if (!port->bulk_out_size)
493 break;
494
495 buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL); 492 buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL);
496 if (!buffer) 493 if (!buffer)
497 goto bail_out_error2; 494 goto bail_out_error2;
diff --git a/drivers/usb/storage/shuttle_usbat.c b/drivers/usb/storage/shuttle_usbat.c
index 4ef2a80728f7..008d805c3d21 100644
--- a/drivers/usb/storage/shuttle_usbat.c
+++ b/drivers/usb/storage/shuttle_usbat.c
@@ -1851,7 +1851,7 @@ static int usbat_probe(struct usb_interface *intf,
1851 us->transport_name = "Shuttle USBAT"; 1851 us->transport_name = "Shuttle USBAT";
1852 us->transport = usbat_flash_transport; 1852 us->transport = usbat_flash_transport;
1853 us->transport_reset = usb_stor_CB_reset; 1853 us->transport_reset = usb_stor_CB_reset;
1854 us->max_lun = 1; 1854 us->max_lun = 0;
1855 1855
1856 result = usb_stor_probe2(us); 1856 result = usb_stor_probe2(us);
1857 return result; 1857 return result;
diff --git a/drivers/usb/storage/uas.c b/drivers/usb/storage/uas.c
index a7ac97cc5949..511b22953167 100644
--- a/drivers/usb/storage/uas.c
+++ b/drivers/usb/storage/uas.c
@@ -137,7 +137,7 @@ static void uas_do_work(struct work_struct *work)
137 if (!(cmdinfo->state & IS_IN_WORK_LIST)) 137 if (!(cmdinfo->state & IS_IN_WORK_LIST))
138 continue; 138 continue;
139 139
140 err = uas_submit_urbs(cmnd, cmnd->device->hostdata, GFP_NOIO); 140 err = uas_submit_urbs(cmnd, cmnd->device->hostdata, GFP_ATOMIC);
141 if (!err) 141 if (!err)
142 cmdinfo->state &= ~IS_IN_WORK_LIST; 142 cmdinfo->state &= ~IS_IN_WORK_LIST;
143 else 143 else
@@ -803,7 +803,7 @@ static int uas_eh_task_mgmt(struct scsi_cmnd *cmnd,
803 803
804 devinfo->running_task = 1; 804 devinfo->running_task = 1;
805 memset(&devinfo->response, 0, sizeof(devinfo->response)); 805 memset(&devinfo->response, 0, sizeof(devinfo->response));
806 sense_urb = uas_submit_sense_urb(cmnd, GFP_NOIO, 806 sense_urb = uas_submit_sense_urb(cmnd, GFP_ATOMIC,
807 devinfo->use_streams ? tag : 0); 807 devinfo->use_streams ? tag : 0);
808 if (!sense_urb) { 808 if (!sense_urb) {
809 shost_printk(KERN_INFO, shost, 809 shost_printk(KERN_INFO, shost,
@@ -813,7 +813,7 @@ static int uas_eh_task_mgmt(struct scsi_cmnd *cmnd,
813 spin_unlock_irqrestore(&devinfo->lock, flags); 813 spin_unlock_irqrestore(&devinfo->lock, flags);
814 return FAILED; 814 return FAILED;
815 } 815 }
816 if (uas_submit_task_urb(cmnd, GFP_NOIO, function, tag)) { 816 if (uas_submit_task_urb(cmnd, GFP_ATOMIC, function, tag)) {
817 shost_printk(KERN_INFO, shost, 817 shost_printk(KERN_INFO, shost,
818 "%s: %s: submit task mgmt urb failed\n", 818 "%s: %s: submit task mgmt urb failed\n",
819 __func__, fname); 819 __func__, fname);
@@ -1030,7 +1030,7 @@ static int uas_configure_endpoints(struct uas_dev_info *devinfo)
1030 devinfo->use_streams = 0; 1030 devinfo->use_streams = 0;
1031 } else { 1031 } else {
1032 devinfo->qdepth = usb_alloc_streams(devinfo->intf, eps + 1, 1032 devinfo->qdepth = usb_alloc_streams(devinfo->intf, eps + 1,
1033 3, 256, GFP_KERNEL); 1033 3, 256, GFP_NOIO);
1034 if (devinfo->qdepth < 0) 1034 if (devinfo->qdepth < 0)
1035 return devinfo->qdepth; 1035 return devinfo->qdepth;
1036 devinfo->use_streams = 1; 1036 devinfo->use_streams = 1;
@@ -1047,7 +1047,7 @@ static void uas_free_streams(struct uas_dev_info *devinfo)
1047 eps[0] = usb_pipe_endpoint(udev, devinfo->status_pipe); 1047 eps[0] = usb_pipe_endpoint(udev, devinfo->status_pipe);
1048 eps[1] = usb_pipe_endpoint(udev, devinfo->data_in_pipe); 1048 eps[1] = usb_pipe_endpoint(udev, devinfo->data_in_pipe);
1049 eps[2] = usb_pipe_endpoint(udev, devinfo->data_out_pipe); 1049 eps[2] = usb_pipe_endpoint(udev, devinfo->data_out_pipe);
1050 usb_free_streams(devinfo->intf, eps, 3, GFP_KERNEL); 1050 usb_free_streams(devinfo->intf, eps, 3, GFP_NOIO);
1051} 1051}
1052 1052
1053static int uas_probe(struct usb_interface *intf, const struct usb_device_id *id) 1053static int uas_probe(struct usb_interface *intf, const struct usb_device_id *id)
@@ -1096,16 +1096,17 @@ static int uas_probe(struct usb_interface *intf, const struct usb_device_id *id)
1096 if (result) 1096 if (result)
1097 goto free_streams; 1097 goto free_streams;
1098 1098
1099 usb_set_intfdata(intf, shost);
1099 result = scsi_add_host(shost, &intf->dev); 1100 result = scsi_add_host(shost, &intf->dev);
1100 if (result) 1101 if (result)
1101 goto free_streams; 1102 goto free_streams;
1102 1103
1103 scsi_scan_host(shost); 1104 scsi_scan_host(shost);
1104 usb_set_intfdata(intf, shost);
1105 return result; 1105 return result;
1106 1106
1107free_streams: 1107free_streams:
1108 uas_free_streams(devinfo); 1108 uas_free_streams(devinfo);
1109 usb_set_intfdata(intf, NULL);
1109set_alt0: 1110set_alt0:
1110 usb_set_interface(udev, intf->altsetting[0].desc.bInterfaceNumber, 0); 1111 usb_set_interface(udev, intf->altsetting[0].desc.bInterfaceNumber, 0);
1111 if (shost) 1112 if (shost)
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index f4a82291894a..174a447868cd 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -234,6 +234,20 @@ UNUSUAL_DEV( 0x0421, 0x0495, 0x0370, 0x0370,
234 USB_SC_DEVICE, USB_PR_DEVICE, NULL, 234 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
235 US_FL_MAX_SECTORS_64 ), 235 US_FL_MAX_SECTORS_64 ),
236 236
237/* Reported by Daniele Forsi <dforsi@gmail.com> */
238UNUSUAL_DEV( 0x0421, 0x04b9, 0x0350, 0x0350,
239 "Nokia",
240 "5300",
241 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
242 US_FL_MAX_SECTORS_64 ),
243
244/* Patch submitted by Victor A. Santos <victoraur.santos@gmail.com> */
245UNUSUAL_DEV( 0x0421, 0x05af, 0x0742, 0x0742,
246 "Nokia",
247 "305",
248 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
249 US_FL_MAX_SECTORS_64),
250
237/* Patch submitted by Mikhail Zolotaryov <lebon@lebon.org.ua> */ 251/* Patch submitted by Mikhail Zolotaryov <lebon@lebon.org.ua> */
238UNUSUAL_DEV( 0x0421, 0x06aa, 0x1110, 0x1110, 252UNUSUAL_DEV( 0x0421, 0x06aa, 0x1110, 0x1110,
239 "Nokia", 253 "Nokia",
diff --git a/drivers/usb/usb-common.c b/drivers/usb/usb-common.c
index d771870a819e..6dfd30a863c7 100644
--- a/drivers/usb/usb-common.c
+++ b/drivers/usb/usb-common.c
@@ -69,7 +69,7 @@ const char *usb_state_string(enum usb_device_state state)
69 [USB_STATE_RECONNECTING] = "reconnecting", 69 [USB_STATE_RECONNECTING] = "reconnecting",
70 [USB_STATE_UNAUTHENTICATED] = "unauthenticated", 70 [USB_STATE_UNAUTHENTICATED] = "unauthenticated",
71 [USB_STATE_DEFAULT] = "default", 71 [USB_STATE_DEFAULT] = "default",
72 [USB_STATE_ADDRESS] = "addresssed", 72 [USB_STATE_ADDRESS] = "addressed",
73 [USB_STATE_CONFIGURED] = "configured", 73 [USB_STATE_CONFIGURED] = "configured",
74 [USB_STATE_SUSPENDED] = "suspended", 74 [USB_STATE_SUSPENDED] = "suspended",
75 }; 75 };
diff --git a/drivers/usb/wusbcore/mmc.c b/drivers/usb/wusbcore/mmc.c
index 44741267c917..3f485df96226 100644
--- a/drivers/usb/wusbcore/mmc.c
+++ b/drivers/usb/wusbcore/mmc.c
@@ -301,7 +301,7 @@ int wusbhc_chid_set(struct wusbhc *wusbhc, const struct wusb_ckhdid *chid)
301 301
302 if (chid) 302 if (chid)
303 result = uwb_radio_start(&wusbhc->pal); 303 result = uwb_radio_start(&wusbhc->pal);
304 else 304 else if (wusbhc->uwb_rc)
305 uwb_radio_stop(&wusbhc->pal); 305 uwb_radio_stop(&wusbhc->pal);
306 306
307 return result; 307 return result;
diff --git a/drivers/usb/wusbcore/wa-xfer.c b/drivers/usb/wusbcore/wa-xfer.c
index c8e2a47d62a7..3e2e4ed20157 100644
--- a/drivers/usb/wusbcore/wa-xfer.c
+++ b/drivers/usb/wusbcore/wa-xfer.c
@@ -2390,10 +2390,10 @@ error_complete:
2390 done) { 2390 done) {
2391 2391
2392 dev_info(dev, "Control EP stall. Queue delayed work.\n"); 2392 dev_info(dev, "Control EP stall. Queue delayed work.\n");
2393 spin_lock_irq(&wa->xfer_list_lock); 2393 spin_lock(&wa->xfer_list_lock);
2394 /* move xfer from xfer_list to xfer_errored_list. */ 2394 /* move xfer from xfer_list to xfer_errored_list. */
2395 list_move_tail(&xfer->list_node, &wa->xfer_errored_list); 2395 list_move_tail(&xfer->list_node, &wa->xfer_errored_list);
2396 spin_unlock_irq(&wa->xfer_list_lock); 2396 spin_unlock(&wa->xfer_list_lock);
2397 spin_unlock_irqrestore(&xfer->lock, flags); 2397 spin_unlock_irqrestore(&xfer->lock, flags);
2398 queue_work(wusbd, &wa->xfer_error_work); 2398 queue_work(wusbd, &wa->xfer_error_work);
2399 } else { 2399 } else {
diff --git a/drivers/uwb/drp.c b/drivers/uwb/drp.c
index 16ada8341c46..468c89fb6a16 100644
--- a/drivers/uwb/drp.c
+++ b/drivers/uwb/drp.c
@@ -59,6 +59,7 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg,
59 struct uwb_rceb *reply, ssize_t reply_size) 59 struct uwb_rceb *reply, ssize_t reply_size)
60{ 60{
61 struct uwb_rc_evt_set_drp_ie *r = (struct uwb_rc_evt_set_drp_ie *)reply; 61 struct uwb_rc_evt_set_drp_ie *r = (struct uwb_rc_evt_set_drp_ie *)reply;
62 unsigned long flags;
62 63
63 if (r != NULL) { 64 if (r != NULL) {
64 if (r->bResultCode != UWB_RC_RES_SUCCESS) 65 if (r->bResultCode != UWB_RC_RES_SUCCESS)
@@ -67,14 +68,14 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg,
67 } else 68 } else
68 dev_err(&rc->uwb_dev.dev, "SET-DRP-IE: timeout\n"); 69 dev_err(&rc->uwb_dev.dev, "SET-DRP-IE: timeout\n");
69 70
70 spin_lock_irq(&rc->rsvs_lock); 71 spin_lock_irqsave(&rc->rsvs_lock, flags);
71 if (rc->set_drp_ie_pending > 1) { 72 if (rc->set_drp_ie_pending > 1) {
72 rc->set_drp_ie_pending = 0; 73 rc->set_drp_ie_pending = 0;
73 uwb_rsv_queue_update(rc); 74 uwb_rsv_queue_update(rc);
74 } else { 75 } else {
75 rc->set_drp_ie_pending = 0; 76 rc->set_drp_ie_pending = 0;
76 } 77 }
77 spin_unlock_irq(&rc->rsvs_lock); 78 spin_unlock_irqrestore(&rc->rsvs_lock, flags);
78} 79}
79 80
80/** 81/**
@@ -599,8 +600,11 @@ static void uwb_drp_handle_alien_drp(struct uwb_rc *rc, struct uwb_ie_drp *drp_i
599 600
600 /* alloc and initialize new uwb_cnflt_alien */ 601 /* alloc and initialize new uwb_cnflt_alien */
601 cnflt = kzalloc(sizeof(struct uwb_cnflt_alien), GFP_KERNEL); 602 cnflt = kzalloc(sizeof(struct uwb_cnflt_alien), GFP_KERNEL);
602 if (!cnflt) 603 if (!cnflt) {
603 dev_err(dev, "failed to alloc uwb_cnflt_alien struct\n"); 604 dev_err(dev, "failed to alloc uwb_cnflt_alien struct\n");
605 return;
606 }
607
604 INIT_LIST_HEAD(&cnflt->rc_node); 608 INIT_LIST_HEAD(&cnflt->rc_node);
605 init_timer(&cnflt->timer); 609 init_timer(&cnflt->timer);
606 cnflt->timer.function = uwb_cnflt_timer; 610 cnflt->timer.function = uwb_cnflt_timer;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 6c793bc683d9..c7b4f0f927b1 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -21,7 +21,15 @@ source "drivers/gpu/vga/Kconfig"
21 21
22source "drivers/gpu/host1x/Kconfig" 22source "drivers/gpu/host1x/Kconfig"
23 23
24menu "Direct Rendering Manager"
24source "drivers/gpu/drm/Kconfig" 25source "drivers/gpu/drm/Kconfig"
26endmenu
27
28menu "Frame buffer Devices"
29source "drivers/video/fbdev/Kconfig"
30endmenu
31
32source "drivers/video/backlight/Kconfig"
25 33
26config VGASTATE 34config VGASTATE
27 tristate 35 tristate
@@ -33,2482 +41,14 @@ config VIDEOMODE_HELPERS
33config HDMI 41config HDMI
34 bool 42 bool
35 43
36menuconfig FB
37 tristate "Support for frame buffer devices"
38 ---help---
39 The frame buffer device provides an abstraction for the graphics
40 hardware. It represents the frame buffer of some video hardware and
41 allows application software to access the graphics hardware through
42 a well-defined interface, so the software doesn't need to know
43 anything about the low-level (hardware register) stuff.
44
45 Frame buffer devices work identically across the different
46 architectures supported by Linux and make the implementation of
47 application programs easier and more portable; at this point, an X
48 server exists which uses the frame buffer device exclusively.
49 On several non-X86 architectures, the frame buffer device is the
50 only way to use the graphics hardware.
51
52 The device is accessed through special device nodes, usually located
53 in the /dev directory, i.e. /dev/fb*.
54
55 You need an utility program called fbset to make full use of frame
56 buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
57 and the Framebuffer-HOWTO at
58 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
59 information.
60
61 Say Y here and to the driver for your graphics board below if you
62 are compiling a kernel for a non-x86 architecture.
63
64 If you are compiling for the x86 architecture, you can say Y if you
65 want to play with it, but it is not essential. Please note that
66 running graphical applications that directly touch the hardware
67 (e.g. an accelerated X server) and that are not frame buffer
68 device-aware may cause unexpected results. If unsure, say N.
69
70config FIRMWARE_EDID
71 bool "Enable firmware EDID"
72 depends on FB
73 default n
74 ---help---
75 This enables access to the EDID transferred from the firmware.
76 On the i386, this is from the Video BIOS. Enable this if DDC/I2C
77 transfers do not work for your driver and if you are using
78 nvidiafb, i810fb or savagefb.
79
80 In general, choosing Y for this option is safe. If you
81 experience extremely long delays while booting before you get
82 something on your display, try setting this to N. Matrox cards in
83 combination with certain motherboards and monitors are known to
84 suffer from this problem.
85
86config FB_DDC
87 tristate
88 depends on FB
89 select I2C_ALGOBIT
90 select I2C
91 default n
92
93config FB_BOOT_VESA_SUPPORT
94 bool
95 depends on FB
96 default n
97 ---help---
98 If true, at least one selected framebuffer driver can take advantage
99 of VESA video modes set at an early boot stage via the vga= parameter.
100
101config FB_CFB_FILLRECT
102 tristate
103 depends on FB
104 default n
105 ---help---
106 Include the cfb_fillrect function for generic software rectangle
107 filling. This is used by drivers that don't provide their own
108 (accelerated) version.
109
110config FB_CFB_COPYAREA
111 tristate
112 depends on FB
113 default n
114 ---help---
115 Include the cfb_copyarea function for generic software area copying.
116 This is used by drivers that don't provide their own (accelerated)
117 version.
118
119config FB_CFB_IMAGEBLIT
120 tristate
121 depends on FB
122 default n
123 ---help---
124 Include the cfb_imageblit function for generic software image
125 blitting. This is used by drivers that don't provide their own
126 (accelerated) version.
127
128config FB_CFB_REV_PIXELS_IN_BYTE
129 bool
130 depends on FB
131 default n
132 ---help---
133 Allow generic frame-buffer functions to work on displays with 1, 2
134 and 4 bits per pixel depths which has opposite order of pixels in
135 byte order to bytes in long order.
136
137config FB_SYS_FILLRECT
138 tristate
139 depends on FB
140 default n
141 ---help---
142 Include the sys_fillrect function for generic software rectangle
143 filling. This is used by drivers that don't provide their own
144 (accelerated) version and the framebuffer is in system RAM.
145
146config FB_SYS_COPYAREA
147 tristate
148 depends on FB
149 default n
150 ---help---
151 Include the sys_copyarea function for generic software area copying.
152 This is used by drivers that don't provide their own (accelerated)
153 version and the framebuffer is in system RAM.
154
155config FB_SYS_IMAGEBLIT
156 tristate
157 depends on FB
158 default n
159 ---help---
160 Include the sys_imageblit function for generic software image
161 blitting. This is used by drivers that don't provide their own
162 (accelerated) version and the framebuffer is in system RAM.
163
164menuconfig FB_FOREIGN_ENDIAN
165 bool "Framebuffer foreign endianness support"
166 depends on FB
167 ---help---
168 This menu will let you enable support for the framebuffers with
169 non-native endianness (e.g. Little-Endian framebuffer on a
170 Big-Endian machine). Most probably you don't have such hardware,
171 so it's safe to say "n" here.
172
173choice
174 prompt "Choice endianness support"
175 depends on FB_FOREIGN_ENDIAN
176
177config FB_BOTH_ENDIAN
178 bool "Support for Big- and Little-Endian framebuffers"
179
180config FB_BIG_ENDIAN
181 bool "Support for Big-Endian framebuffers only"
182
183config FB_LITTLE_ENDIAN
184 bool "Support for Little-Endian framebuffers only"
185
186endchoice
187
188config FB_SYS_FOPS
189 tristate
190 depends on FB
191 default n
192
193config FB_DEFERRED_IO
194 bool
195 depends on FB
196
197config FB_HECUBA
198 tristate
199 depends on FB
200 depends on FB_DEFERRED_IO
201
202config FB_SVGALIB
203 tristate
204 depends on FB
205 default n
206 ---help---
207 Common utility functions useful to fbdev drivers of VGA-based
208 cards.
209
210config FB_MACMODES
211 tristate
212 depends on FB
213 default n
214
215config FB_BACKLIGHT
216 bool
217 depends on FB
218 select BACKLIGHT_LCD_SUPPORT
219 select BACKLIGHT_CLASS_DEVICE
220 default n
221
222config FB_MODE_HELPERS
223 bool "Enable Video Mode Handling Helpers"
224 depends on FB
225 default n
226 ---help---
227 This enables functions for handling video modes using the
228 Generalized Timing Formula and the EDID parser. A few drivers rely
229 on this feature such as the radeonfb, rivafb, and the i810fb. If
230 your driver does not take advantage of this feature, choosing Y will
231 just increase the kernel size by about 5K.
232
233config FB_TILEBLITTING
234 bool "Enable Tile Blitting Support"
235 depends on FB
236 default n
237 ---help---
238 This enables tile blitting. Tile blitting is a drawing technique
239 where the screen is divided into rectangular sections (tiles), whereas
240 the standard blitting divides the screen into pixels. Because the
241 default drawing element is a tile, drawing functions will be passed
242 parameters in terms of number of tiles instead of number of pixels.
243 For example, to draw a single character, instead of using bitmaps,
244 an index to an array of bitmaps will be used. To clear or move a
245 rectangular section of a screen, the rectangle will be described in
246 terms of number of tiles in the x- and y-axis.
247
248 This is particularly important to one driver, matroxfb. If
249 unsure, say N.
250
251comment "Frame buffer hardware drivers"
252 depends on FB
253
254config FB_GRVGA
255 tristate "Aeroflex Gaisler framebuffer support"
256 depends on FB && SPARC
257 select FB_CFB_FILLRECT
258 select FB_CFB_COPYAREA
259 select FB_CFB_IMAGEBLIT
260 ---help---
261 This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler.
262
263config FB_CIRRUS
264 tristate "Cirrus Logic support"
265 depends on FB && (ZORRO || PCI)
266 select FB_CFB_FILLRECT
267 select FB_CFB_COPYAREA
268 select FB_CFB_IMAGEBLIT
269 ---help---
270 This enables support for Cirrus Logic GD542x/543x based boards on
271 Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum.
272
273 If you have a PCI-based system, this enables support for these
274 chips: GD-543x, GD-544x, GD-5480.
275
276 Please read the file <file:Documentation/fb/cirrusfb.txt>.
277
278 Say N unless you have such a graphics board or plan to get one
279 before you next recompile the kernel.
280
281config FB_PM2
282 tristate "Permedia2 support"
283 depends on FB && ((AMIGA && BROKEN) || PCI)
284 select FB_CFB_FILLRECT
285 select FB_CFB_COPYAREA
286 select FB_CFB_IMAGEBLIT
287 help
288 This is the frame buffer device driver for cards based on
289 the 3D Labs Permedia, Permedia 2 and Permedia 2V chips.
290 The driver was tested on the following cards:
291 Diamond FireGL 1000 PRO AGP
292 ELSA Gloria Synergy PCI
293 Appian Jeronimo PRO (both heads) PCI
294 3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI
295 Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC
296 ASK Graphic Blaster Exxtreme AGP
297
298 To compile this driver as a module, choose M here: the
299 module will be called pm2fb.
300
301config FB_PM2_FIFO_DISCONNECT
302 bool "enable FIFO disconnect feature"
303 depends on FB_PM2 && PCI
304 help
305 Support the Permedia2 FIFO disconnect feature.
306
307config FB_ARMCLCD
308 tristate "ARM PrimeCell PL110 support"
309 depends on ARM || ARM64 || COMPILE_TEST
310 depends on FB && ARM_AMBA
311 select FB_CFB_FILLRECT
312 select FB_CFB_COPYAREA
313 select FB_CFB_IMAGEBLIT
314 help
315 This framebuffer device driver is for the ARM PrimeCell PL110
316 Colour LCD controller. ARM PrimeCells provide the building
317 blocks for System on a Chip devices.
318
319 If you want to compile this as a module (=code which can be
320 inserted into and removed from the running kernel), say M
321 here and read <file:Documentation/kbuild/modules.txt>. The module
322 will be called amba-clcd.
323
324config FB_ACORN
325 bool "Acorn VIDC support"
326 depends on (FB = y) && ARM && ARCH_ACORN
327 select FB_CFB_FILLRECT
328 select FB_CFB_COPYAREA
329 select FB_CFB_IMAGEBLIT
330 help
331 This is the frame buffer device driver for the Acorn VIDC graphics
332 hardware found in Acorn RISC PCs and other ARM-based machines. If
333 unsure, say N.
334
335config FB_CLPS711X
336 bool "CLPS711X LCD support"
337 depends on (FB = y) && ARM && ARCH_CLPS711X
338 select FB_CFB_FILLRECT
339 select FB_CFB_COPYAREA
340 select FB_CFB_IMAGEBLIT
341 help
342 Say Y to enable the Framebuffer driver for the CLPS7111 and
343 EP7212 processors.
344
345config FB_SA1100
346 bool "SA-1100 LCD support"
347 depends on (FB = y) && ARM && ARCH_SA1100
348 select FB_CFB_FILLRECT
349 select FB_CFB_COPYAREA
350 select FB_CFB_IMAGEBLIT
351 help
352 This is a framebuffer device for the SA-1100 LCD Controller.
353 See <http://www.linux-fbdev.org/> for information on framebuffer
354 devices.
355
356 If you plan to use the LCD display with your SA-1100 system, say
357 Y here.
358
359config FB_IMX
360 tristate "Freescale i.MX1/21/25/27 LCD support"
361 depends on FB && ARCH_MXC
362 select FB_CFB_FILLRECT
363 select FB_CFB_COPYAREA
364 select FB_CFB_IMAGEBLIT
365 select FB_MODE_HELPERS
366 select VIDEOMODE_HELPERS
367
368config FB_CYBER2000
369 tristate "CyberPro 2000/2010/5000 support"
370 depends on FB && PCI && (BROKEN || !SPARC64)
371 select FB_CFB_FILLRECT
372 select FB_CFB_COPYAREA
373 select FB_CFB_IMAGEBLIT
374 help
375 This enables support for the Integraphics CyberPro 20x0 and 5000
376 VGA chips used in the Rebel.com Netwinder and other machines.
377 Say Y if you have a NetWinder or a graphics card containing this
378 device, otherwise say N.
379
380config FB_CYBER2000_DDC
381 bool "DDC for CyberPro support"
382 depends on FB_CYBER2000
383 select FB_DDC
384 default y
385 help
386 Say Y here if you want DDC support for your CyberPro graphics
387 card. This is only I2C bus support, driver does not use EDID.
388
389config FB_CYBER2000_I2C
390 bool "CyberPro 2000/2010/5000 I2C support"
391 depends on FB_CYBER2000 && I2C && ARCH_NETWINDER
392 select I2C_ALGOBIT
393 help
394 Enable support for the I2C video decoder interface on the
395 Integraphics CyberPro 20x0 and 5000 VGA chips. This is used
396 on the Netwinder machines for the SAA7111 video capture.
397
398config FB_APOLLO
399 bool
400 depends on (FB = y) && APOLLO
401 default y
402 select FB_CFB_FILLRECT
403 select FB_CFB_IMAGEBLIT
404
405config FB_Q40
406 bool
407 depends on (FB = y) && Q40
408 default y
409 select FB_CFB_FILLRECT
410 select FB_CFB_COPYAREA
411 select FB_CFB_IMAGEBLIT
412
413config FB_AMIGA
414 tristate "Amiga native chipset support"
415 depends on FB && AMIGA
416 help
417 This is the frame buffer device driver for the builtin graphics
418 chipset found in Amigas.
419
420 To compile this driver as a module, choose M here: the
421 module will be called amifb.
422
423config FB_AMIGA_OCS
424 bool "Amiga OCS chipset support"
425 depends on FB_AMIGA
426 help
427 This enables support for the original Agnus and Denise video chips,
428 found in the Amiga 1000 and most A500's and A2000's. If you intend
429 to run Linux on any of these systems, say Y; otherwise say N.
430
431config FB_AMIGA_ECS
432 bool "Amiga ECS chipset support"
433 depends on FB_AMIGA
434 help
435 This enables support for the Enhanced Chip Set, found in later
436 A500's, later A2000's, the A600, the A3000, the A3000T and CDTV. If
437 you intend to run Linux on any of these systems, say Y; otherwise
438 say N.
439
440config FB_AMIGA_AGA
441 bool "Amiga AGA chipset support"
442 depends on FB_AMIGA
443 help
444 This enables support for the Advanced Graphics Architecture (also
445 known as the AGA or AA) Chip Set, found in the A1200, A4000, A4000T
446 and CD32. If you intend to run Linux on any of these systems, say Y;
447 otherwise say N.
448
449config FB_FM2
450 bool "Amiga FrameMaster II/Rainbow II support"
451 depends on (FB = y) && ZORRO
452 select FB_CFB_FILLRECT
453 select FB_CFB_COPYAREA
454 select FB_CFB_IMAGEBLIT
455 help
456 This is the frame buffer device driver for the Amiga FrameMaster
457 card from BSC (exhibited 1992 but not shipped as a CBM product).
458
459config FB_ARC
460 tristate "Arc Monochrome LCD board support"
461 depends on FB && X86
462 select FB_SYS_FILLRECT
463 select FB_SYS_COPYAREA
464 select FB_SYS_IMAGEBLIT
465 select FB_SYS_FOPS
466 help
467 This enables support for the Arc Monochrome LCD board. The board
468 is based on the KS-108 lcd controller and is typically a matrix
469 of 2*n chips. This driver was tested with a 128x64 panel. This
470 driver supports it for use with x86 SBCs through a 16 bit GPIO
471 interface (8 bit data, 8 bit control). If you anticipate using
472 this driver, say Y or M; otherwise say N. You must specify the
473 GPIO IO address to be used for setting control and data.
474
475config FB_ATARI
476 bool "Atari native chipset support"
477 depends on (FB = y) && ATARI
478 select FB_CFB_FILLRECT
479 select FB_CFB_COPYAREA
480 select FB_CFB_IMAGEBLIT
481 help
482 This is the frame buffer device driver for the builtin graphics
483 chipset found in Ataris.
484
485config FB_OF
486 bool "Open Firmware frame buffer device support"
487 depends on (FB = y) && (PPC64 || PPC_OF) && (!PPC_PSERIES || PCI)
488 select FB_CFB_FILLRECT
489 select FB_CFB_COPYAREA
490 select FB_CFB_IMAGEBLIT
491 select FB_MACMODES
492 help
493 Say Y if you want support with Open Firmware for your graphics
494 board.
495
496config FB_CONTROL
497 bool "Apple \"control\" display support"
498 depends on (FB = y) && PPC_PMAC && PPC32
499 select FB_CFB_FILLRECT
500 select FB_CFB_COPYAREA
501 select FB_CFB_IMAGEBLIT
502 select FB_MACMODES
503 help
504 This driver supports a frame buffer for the graphics adapter in the
505 Power Macintosh 7300 and others.
506
507config FB_PLATINUM
508 bool "Apple \"platinum\" display support"
509 depends on (FB = y) && PPC_PMAC && PPC32
510 select FB_CFB_FILLRECT
511 select FB_CFB_COPYAREA
512 select FB_CFB_IMAGEBLIT
513 select FB_MACMODES
514 help
515 This driver supports a frame buffer for the "platinum" graphics
516 adapter in some Power Macintoshes.
517
518config FB_VALKYRIE
519 bool "Apple \"valkyrie\" display support"
520 depends on (FB = y) && (MAC || (PPC_PMAC && PPC32))
521 select FB_CFB_FILLRECT
522 select FB_CFB_COPYAREA
523 select FB_CFB_IMAGEBLIT
524 select FB_MACMODES
525 help
526 This driver supports a frame buffer for the "valkyrie" graphics
527 adapter in some Power Macintoshes.
528
529config FB_CT65550
530 bool "Chips 65550 display support"
531 depends on (FB = y) && PPC32 && PCI
532 select FB_CFB_FILLRECT
533 select FB_CFB_COPYAREA
534 select FB_CFB_IMAGEBLIT
535 help
536 This is the frame buffer device driver for the Chips & Technologies
537 65550 graphics chip in PowerBooks.
538
539config FB_ASILIANT
540 bool "Asiliant (Chips) 69000 display support"
541 depends on (FB = y) && PCI
542 select FB_CFB_FILLRECT
543 select FB_CFB_COPYAREA
544 select FB_CFB_IMAGEBLIT
545 help
546 This is the frame buffer device driver for the Asiliant 69030 chipset
547
548config FB_IMSTT
549 bool "IMS Twin Turbo display support"
550 depends on (FB = y) && PCI
551 select FB_CFB_IMAGEBLIT
552 select FB_MACMODES if PPC
553 help
554 The IMS Twin Turbo is a PCI-based frame buffer card bundled with
555 many Macintosh and compatible computers.
556
557config FB_VGA16
558 tristate "VGA 16-color graphics support"
559 depends on FB && (X86 || PPC)
560 select FB_CFB_FILLRECT
561 select FB_CFB_COPYAREA
562 select FB_CFB_IMAGEBLIT
563 select VGASTATE
564 select FONT_8x16 if FRAMEBUFFER_CONSOLE
565 help
566 This is the frame buffer device driver for VGA 16 color graphic
567 cards. Say Y if you have such a card.
568
569 To compile this driver as a module, choose M here: the
570 module will be called vga16fb.
571
572config FB_BF54X_LQ043
573 tristate "SHARP LQ043 TFT LCD (BF548 EZKIT)"
574 depends on FB && (BF54x) && !BF542
575 select FB_CFB_FILLRECT
576 select FB_CFB_COPYAREA
577 select FB_CFB_IMAGEBLIT
578 help
579 This is the framebuffer device driver for a SHARP LQ043T1DG01 TFT LCD
580
581config FB_BFIN_T350MCQB
582 tristate "Varitronix COG-T350MCQB TFT LCD display (BF527 EZKIT)"
583 depends on FB && BLACKFIN
584 select BFIN_GPTIMERS
585 select FB_CFB_FILLRECT
586 select FB_CFB_COPYAREA
587 select FB_CFB_IMAGEBLIT
588 help
589 This is the framebuffer device driver for a Varitronix VL-PS-COG-T350MCQB-01 display TFT LCD
590 This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
591 It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
592
593config FB_BFIN_LQ035Q1
594 tristate "SHARP LQ035Q1DH02 TFT LCD"
595 depends on FB && BLACKFIN && SPI
596 select FB_CFB_FILLRECT
597 select FB_CFB_COPYAREA
598 select FB_CFB_IMAGEBLIT
599 select BFIN_GPTIMERS
600 help
601 This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
602 the Blackfin Landscape LCD EZ-Extender Card.
603 This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
604 It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
605
606 To compile this driver as a module, choose M here: the
607 module will be called bfin-lq035q1-fb.
608
609config FB_BF537_LQ035
610 tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
611 depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
612 select FB_CFB_FILLRECT
613 select FB_CFB_COPYAREA
614 select FB_CFB_IMAGEBLIT
615 select BFIN_GPTIMERS
616 help
617 This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
618 attached to a BF537.
619
620 To compile this driver as a module, choose M here: the
621 module will be called bf537-lq035.
622
623config FB_BFIN_7393
624 tristate "Blackfin ADV7393 Video encoder"
625 depends on FB && BLACKFIN
626 select I2C
627 select FB_CFB_FILLRECT
628 select FB_CFB_COPYAREA
629 select FB_CFB_IMAGEBLIT
630 help
631 This is the framebuffer device for a ADV7393 video encoder
632 attached to a Blackfin on the PPI port.
633 If your Blackfin board has a ADV7393 select Y.
634
635 To compile this driver as a module, choose M here: the
636 module will be called bfin_adv7393fb.
637
638choice
639 prompt "Video mode support"
640 depends on FB_BFIN_7393
641 default NTSC
642
643config NTSC
644 bool 'NTSC 720x480'
645
646config PAL
647 bool 'PAL 720x576'
648
649config NTSC_640x480
650 bool 'NTSC 640x480 (Experimental)'
651
652config PAL_640x480
653 bool 'PAL 640x480 (Experimental)'
654
655config NTSC_YCBCR
656 bool 'NTSC 720x480 YCbCR input'
657
658config PAL_YCBCR
659 bool 'PAL 720x576 YCbCR input'
660
661endchoice
662
663choice
664 prompt "Size of ADV7393 frame buffer memory Single/Double Size"
665 depends on (FB_BFIN_7393)
666 default ADV7393_1XMEM
667
668config ADV7393_1XMEM
669 bool 'Single'
670
671config ADV7393_2XMEM
672 bool 'Double'
673endchoice
674
675config FB_STI
676 tristate "HP STI frame buffer device support"
677 depends on FB && PARISC
678 select FB_CFB_FILLRECT
679 select FB_CFB_COPYAREA
680 select FB_CFB_IMAGEBLIT
681 select STI_CONSOLE
682 select VT
683 default y
684 ---help---
685 STI refers to the HP "Standard Text Interface" which is a set of
686 BIOS routines contained in a ROM chip in HP PA-RISC based machines.
687 Enabling this option will implement the linux framebuffer device
688 using calls to the STI BIOS routines for initialisation.
689
690 If you enable this option, you will get a planar framebuffer device
691 /dev/fb which will work on the most common HP graphic cards of the
692 NGLE family, including the artist chips (in the 7xx and Bxxx series),
693 HCRX, HCRX24, CRX, CRX24 and VisEG series.
694
695 It is safe to enable this option, so you should probably say "Y".
696
697config FB_MAC
698 bool "Generic Macintosh display support"
699 depends on (FB = y) && MAC
700 select FB_CFB_FILLRECT
701 select FB_CFB_COPYAREA
702 select FB_CFB_IMAGEBLIT
703 select FB_MACMODES
704
705config FB_HP300
706 bool
707 depends on (FB = y) && DIO
708 select FB_CFB_IMAGEBLIT
709 default y
710
711config FB_TGA
712 tristate "TGA/SFB+ framebuffer support"
713 depends on FB && (ALPHA || TC)
714 select FB_CFB_FILLRECT
715 select FB_CFB_COPYAREA
716 select FB_CFB_IMAGEBLIT
717 select BITREVERSE
718 ---help---
719 This is the frame buffer device driver for generic TGA and SFB+
720 graphic cards. These include DEC ZLXp-E1, -E2 and -E3 PCI cards,
721 also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3
722 TURBOchannel cards, also known as PMAGD-A, -B and -C.
723
724 Due to hardware limitations ZLX-E2 and E3 cards are not supported
725 for DECstation 5000/200 systems. Additionally due to firmware
726 limitations these cards may cause troubles with booting DECstation
727 5000/240 and /260 systems, but are fully supported under Linux if
728 you manage to get it going. ;-)
729
730 Say Y if you have one of those.
731
732config FB_UVESA
733 tristate "Userspace VESA VGA graphics support"
734 depends on FB && CONNECTOR
735 select FB_CFB_FILLRECT
736 select FB_CFB_COPYAREA
737 select FB_CFB_IMAGEBLIT
738 select FB_MODE_HELPERS
739 help
740 This is the frame buffer driver for generic VBE 2.0 compliant
741 graphic cards. It can also take advantage of VBE 3.0 features,
742 such as refresh rate adjustment.
743
744 This driver generally provides more features than vesafb but
745 requires a userspace helper application called 'v86d'. See
746 <file:Documentation/fb/uvesafb.txt> for more information.
747
748 If unsure, say N.
749
750config FB_VESA
751 bool "VESA VGA graphics support"
752 depends on (FB = y) && X86
753 select FB_CFB_FILLRECT
754 select FB_CFB_COPYAREA
755 select FB_CFB_IMAGEBLIT
756 select FB_BOOT_VESA_SUPPORT
757 help
758 This is the frame buffer device driver for generic VESA 2.0
759 compliant graphic cards. The older VESA 1.2 cards are not supported.
760 You will get a boot time penguin logo at no additional cost. Please
761 read <file:Documentation/fb/vesafb.txt>. If unsure, say Y.
762
763config FB_EFI
764 bool "EFI-based Framebuffer Support"
765 depends on (FB = y) && X86 && EFI
766 select FB_CFB_FILLRECT
767 select FB_CFB_COPYAREA
768 select FB_CFB_IMAGEBLIT
769 help
770 This is the EFI frame buffer device driver. If the firmware on
771 your platform is EFI 1.10 or UEFI 2.0, select Y to add support for
772 using the EFI framebuffer as your console.
773
774config FB_N411
775 tristate "N411 Apollo/Hecuba devkit support"
776 depends on FB && X86 && MMU
777 select FB_SYS_FILLRECT
778 select FB_SYS_COPYAREA
779 select FB_SYS_IMAGEBLIT
780 select FB_SYS_FOPS
781 select FB_DEFERRED_IO
782 select FB_HECUBA
783 help
784 This enables support for the Apollo display controller in its
785 Hecuba form using the n411 devkit.
786
787config FB_HGA
788 tristate "Hercules mono graphics support"
789 depends on FB && X86
790 help
791 Say Y here if you have a Hercules mono graphics card.
792
793 To compile this driver as a module, choose M here: the
794 module will be called hgafb.
795
796 As this card technology is at least 25 years old,
797 most people will answer N here.
798
799config FB_GBE
800 bool "SGI Graphics Backend frame buffer support"
801 depends on (FB = y) && SGI_IP32
802 select FB_CFB_FILLRECT
803 select FB_CFB_COPYAREA
804 select FB_CFB_IMAGEBLIT
805 help
806 This is the frame buffer device driver for SGI Graphics Backend.
807 This chip is used in SGI O2 and Visual Workstation 320/540.
808
809config FB_GBE_MEM
810 int "Video memory size in MB"
811 depends on FB_GBE
812 default 4
813 help
814 This is the amount of memory reserved for the framebuffer,
815 which can be any value between 1MB and 8MB.
816
817config FB_SBUS
818 bool "SBUS and UPA framebuffers"
819 depends on (FB = y) && SPARC
820 help
821 Say Y if you want support for SBUS or UPA based frame buffer device.
822
823config FB_BW2
824 bool "BWtwo support"
825 depends on (FB = y) && (SPARC && FB_SBUS)
826 select FB_CFB_FILLRECT
827 select FB_CFB_COPYAREA
828 select FB_CFB_IMAGEBLIT
829 help
830 This is the frame buffer device driver for the BWtwo frame buffer.
831
832config FB_CG3
833 bool "CGthree support"
834 depends on (FB = y) && (SPARC && FB_SBUS)
835 select FB_CFB_FILLRECT
836 select FB_CFB_COPYAREA
837 select FB_CFB_IMAGEBLIT
838 help
839 This is the frame buffer device driver for the CGthree frame buffer.
840
841config FB_CG6
842 bool "CGsix (GX,TurboGX) support"
843 depends on (FB = y) && (SPARC && FB_SBUS)
844 select FB_CFB_COPYAREA
845 select FB_CFB_IMAGEBLIT
846 help
847 This is the frame buffer device driver for the CGsix (GX, TurboGX)
848 frame buffer.
849
850config FB_FFB
851 bool "Creator/Creator3D/Elite3D support"
852 depends on FB_SBUS && SPARC64
853 select FB_CFB_COPYAREA
854 select FB_CFB_IMAGEBLIT
855 help
856 This is the frame buffer device driver for the Creator, Creator3D,
857 and Elite3D graphics boards.
858
859config FB_TCX
860 bool "TCX (SS4/SS5 only) support"
861 depends on FB_SBUS
862 select FB_CFB_FILLRECT
863 select FB_CFB_COPYAREA
864 select FB_CFB_IMAGEBLIT
865 help
866 This is the frame buffer device driver for the TCX 24/8bit frame
867 buffer.
868
869config FB_CG14
870 bool "CGfourteen (SX) support"
871 depends on FB_SBUS
872 select FB_CFB_FILLRECT
873 select FB_CFB_COPYAREA
874 select FB_CFB_IMAGEBLIT
875 help
876 This is the frame buffer device driver for the CGfourteen frame
877 buffer on Desktop SPARCsystems with the SX graphics option.
878
879config FB_P9100
880 bool "P9100 (Sparcbook 3 only) support"
881 depends on FB_SBUS
882 select FB_CFB_FILLRECT
883 select FB_CFB_COPYAREA
884 select FB_CFB_IMAGEBLIT
885 help
886 This is the frame buffer device driver for the P9100 card
887 supported on Sparcbook 3 machines.
888
889config FB_LEO
890 bool "Leo (ZX) support"
891 depends on FB_SBUS
892 select FB_CFB_FILLRECT
893 select FB_CFB_COPYAREA
894 select FB_CFB_IMAGEBLIT
895 help
896 This is the frame buffer device driver for the SBUS-based Sun ZX
897 (leo) frame buffer cards.
898
899config FB_IGA
900 bool "IGA 168x display support"
901 depends on (FB = y) && SPARC32
902 select FB_CFB_FILLRECT
903 select FB_CFB_COPYAREA
904 select FB_CFB_IMAGEBLIT
905 help
906 This is the framebuffer device for the INTERGRAPHICS 1680 and
907 successor frame buffer cards.
908
909config FB_XVR500
910 bool "Sun XVR-500 3DLABS Wildcat support"
911 depends on (FB = y) && PCI && SPARC64
912 select FB_CFB_FILLRECT
913 select FB_CFB_COPYAREA
914 select FB_CFB_IMAGEBLIT
915 help
916 This is the framebuffer device for the Sun XVR-500 and similar
917 graphics cards based upon the 3DLABS Wildcat chipset. The driver
918 only works on sparc64 systems where the system firmware has
919 mostly initialized the card already. It is treated as a
920 completely dumb framebuffer device.
921
922config FB_XVR2500
923 bool "Sun XVR-2500 3DLABS Wildcat support"
924 depends on (FB = y) && PCI && SPARC64
925 select FB_CFB_FILLRECT
926 select FB_CFB_COPYAREA
927 select FB_CFB_IMAGEBLIT
928 help
929 This is the framebuffer device for the Sun XVR-2500 and similar
930 graphics cards based upon the 3DLABS Wildcat chipset. The driver
931 only works on sparc64 systems where the system firmware has
932 mostly initialized the card already. It is treated as a
933 completely dumb framebuffer device.
934
935config FB_XVR1000
936 bool "Sun XVR-1000 support"
937 depends on (FB = y) && SPARC64
938 select FB_CFB_FILLRECT
939 select FB_CFB_COPYAREA
940 select FB_CFB_IMAGEBLIT
941 help
942 This is the framebuffer device for the Sun XVR-1000 and similar
943 graphics cards. The driver only works on sparc64 systems where
944 the system firmware has mostly initialized the card already. It
945 is treated as a completely dumb framebuffer device.
946
947config FB_PVR2
948 tristate "NEC PowerVR 2 display support"
949 depends on FB && SH_DREAMCAST
950 select FB_CFB_FILLRECT
951 select FB_CFB_COPYAREA
952 select FB_CFB_IMAGEBLIT
953 ---help---
954 Say Y here if you have a PowerVR 2 card in your box. If you plan to
955 run linux on your Dreamcast, you will have to say Y here.
956 This driver may or may not work on other PowerVR 2 cards, but is
957 totally untested. Use at your own risk. If unsure, say N.
958
959 To compile this driver as a module, choose M here: the
960 module will be called pvr2fb.
961
962 You can pass several parameters to the driver at boot time or at
963 module load time. The parameters look like "video=pvr2:XXX", where
964 the meaning of XXX can be found at the end of the main source file
965 (<file:drivers/video/pvr2fb.c>). Please see the file
966 <file:Documentation/fb/pvr2fb.txt>.
967
968config FB_OPENCORES
969 tristate "OpenCores VGA/LCD core 2.0 framebuffer support"
970 depends on FB && HAS_DMA
971 select FB_CFB_FILLRECT
972 select FB_CFB_COPYAREA
973 select FB_CFB_IMAGEBLIT
974 help
975 This enables support for the OpenCores VGA/LCD core.
976
977 The OpenCores VGA/LCD core is typically used together with
978 softcore CPUs (e.g. OpenRISC or Microblaze) or hard processor
979 systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
980
981 The source code and specification for the core is available at
982 <http://opencores.org/project,vga_lcd>
983
984config FB_S1D13XXX
985 tristate "Epson S1D13XXX framebuffer support"
986 depends on FB
987 select FB_CFB_FILLRECT
988 select FB_CFB_COPYAREA
989 select FB_CFB_IMAGEBLIT
990 help
991 Support for S1D13XXX framebuffer device family (currently only
992 working with S1D13806). Product specs at
993 <http://vdc.epson.com/>
994
995config FB_ATMEL
996 tristate "AT91/AT32 LCD Controller support"
997 depends on FB && HAVE_FB_ATMEL
998 select FB_CFB_FILLRECT
999 select FB_CFB_COPYAREA
1000 select FB_CFB_IMAGEBLIT
1001 select FB_MODE_HELPERS
1002 select VIDEOMODE_HELPERS
1003 help
1004 This enables support for the AT91/AT32 LCD Controller.
1005
1006config FB_INTSRAM
1007 bool "Frame Buffer in internal SRAM"
1008 depends on FB_ATMEL && ARCH_AT91SAM9261
1009 help
1010 Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
1011 to let frame buffer in external SDRAM.
1012
1013config FB_ATMEL_STN
1014 bool "Use a STN display with AT91/AT32 LCD Controller"
1015 depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
1016 default n
1017 help
1018 Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
1019 Controller. Say N if you want to connect a TFT.
1020
1021 If unsure, say N.
1022
1023config FB_NVIDIA
1024 tristate "nVidia Framebuffer Support"
1025 depends on FB && PCI
1026 select FB_BACKLIGHT if FB_NVIDIA_BACKLIGHT
1027 select FB_MODE_HELPERS
1028 select FB_CFB_FILLRECT
1029 select FB_CFB_COPYAREA
1030 select FB_CFB_IMAGEBLIT
1031 select BITREVERSE
1032 select VGASTATE
1033 help
1034 This driver supports graphics boards with the nVidia chips, TNT
1035 and newer. For very old chipsets, such as the RIVA128, then use
1036 the rivafb.
1037 Say Y if you have such a graphics board.
1038
1039 To compile this driver as a module, choose M here: the
1040 module will be called nvidiafb.
1041
1042config FB_NVIDIA_I2C
1043 bool "Enable DDC Support"
1044 depends on FB_NVIDIA
1045 select FB_DDC
1046 help
1047 This enables I2C support for nVidia Chipsets. This is used
1048 only for getting EDID information from the attached display
1049 allowing for robust video mode handling and switching.
1050
1051 Because fbdev-2.6 requires that drivers must be able to
1052 independently validate video mode parameters, you should say Y
1053 here.
1054
1055config FB_NVIDIA_DEBUG
1056 bool "Lots of debug output"
1057 depends on FB_NVIDIA
1058 default n
1059 help
1060 Say Y here if you want the nVidia driver to output all sorts
1061 of debugging information to provide to the maintainer when
1062 something goes wrong.
1063
1064config FB_NVIDIA_BACKLIGHT
1065 bool "Support for backlight control"
1066 depends on FB_NVIDIA
1067 default y
1068 help
1069 Say Y here if you want to control the backlight of your display.
1070
1071config FB_RIVA
1072 tristate "nVidia Riva support"
1073 depends on FB && PCI
1074 select FB_BACKLIGHT if FB_RIVA_BACKLIGHT
1075 select FB_MODE_HELPERS
1076 select FB_CFB_FILLRECT
1077 select FB_CFB_COPYAREA
1078 select FB_CFB_IMAGEBLIT
1079 select BITREVERSE
1080 select VGASTATE
1081 help
1082 This driver supports graphics boards with the nVidia Riva/Geforce
1083 chips.
1084 Say Y if you have such a graphics board.
1085
1086 To compile this driver as a module, choose M here: the
1087 module will be called rivafb.
1088
1089config FB_RIVA_I2C
1090 bool "Enable DDC Support"
1091 depends on FB_RIVA
1092 select FB_DDC
1093 help
1094 This enables I2C support for nVidia Chipsets. This is used
1095 only for getting EDID information from the attached display
1096 allowing for robust video mode handling and switching.
1097
1098 Because fbdev-2.6 requires that drivers must be able to
1099 independently validate video mode parameters, you should say Y
1100 here.
1101
1102config FB_RIVA_DEBUG
1103 bool "Lots of debug output"
1104 depends on FB_RIVA
1105 default n
1106 help
1107 Say Y here if you want the Riva driver to output all sorts
1108 of debugging information to provide to the maintainer when
1109 something goes wrong.
1110
1111config FB_RIVA_BACKLIGHT
1112 bool "Support for backlight control"
1113 depends on FB_RIVA
1114 default y
1115 help
1116 Say Y here if you want to control the backlight of your display.
1117
1118config FB_I740
1119 tristate "Intel740 support"
1120 depends on FB && PCI
1121 select FB_MODE_HELPERS
1122 select FB_CFB_FILLRECT
1123 select FB_CFB_COPYAREA
1124 select FB_CFB_IMAGEBLIT
1125 select VGASTATE
1126 select FB_DDC
1127 help
1128 This driver supports graphics cards based on Intel740 chip.
1129
1130config FB_I810
1131 tristate "Intel 810/815 support"
1132 depends on FB && PCI && X86_32 && AGP_INTEL
1133 select FB_MODE_HELPERS
1134 select FB_CFB_FILLRECT
1135 select FB_CFB_COPYAREA
1136 select FB_CFB_IMAGEBLIT
1137 select VGASTATE
1138 help
1139 This driver supports the on-board graphics built in to the Intel 810
1140 and 815 chipsets. Say Y if you have and plan to use such a board.
1141
1142 To compile this driver as a module, choose M here: the
1143 module will be called i810fb.
1144
1145 For more information, please read
1146 <file:Documentation/fb/intel810.txt>
1147
1148config FB_I810_GTF
1149 bool "use VESA Generalized Timing Formula"
1150 depends on FB_I810
1151 help
1152 If you say Y, then the VESA standard, Generalized Timing Formula
1153 or GTF, will be used to calculate the required video timing values
1154 per video mode. Since the GTF allows nondiscrete timings
1155 (nondiscrete being a range of values as opposed to discrete being a
1156 set of values), you'll be able to use any combination of horizontal
1157 and vertical resolutions, and vertical refresh rates without having
1158 to specify your own timing parameters. This is especially useful
1159 to maximize the performance of an aging display, or if you just
1160 have a display with nonstandard dimensions. A VESA compliant
1161 monitor is recommended, but can still work with non-compliant ones.
1162 If you need or want this, then select this option. The timings may
1163 not be compliant with Intel's recommended values. Use at your own
1164 risk.
1165
1166 If you say N, the driver will revert to discrete video timings
1167 using a set recommended by Intel in their documentation.
1168
1169 If unsure, say N.
1170
1171config FB_I810_I2C
1172 bool "Enable DDC Support"
1173 depends on FB_I810 && FB_I810_GTF
1174 select FB_DDC
1175 help
1176
1177config FB_LE80578
1178 tristate "Intel LE80578 (Vermilion) support"
1179 depends on FB && PCI && X86
1180 select FB_MODE_HELPERS
1181 select FB_CFB_FILLRECT
1182 select FB_CFB_COPYAREA
1183 select FB_CFB_IMAGEBLIT
1184 help
1185 This driver supports the LE80578 (Vermilion Range) chipset
1186
1187config FB_CARILLO_RANCH
1188 tristate "Intel Carillo Ranch support"
1189 depends on FB_LE80578 && FB && PCI && X86
1190 help
1191 This driver supports the LE80578 (Carillo Ranch) board
1192
1193config FB_INTEL
1194 tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support"
1195 depends on FB && PCI && X86 && AGP_INTEL && EXPERT
1196 select FB_MODE_HELPERS
1197 select FB_CFB_FILLRECT
1198 select FB_CFB_COPYAREA
1199 select FB_CFB_IMAGEBLIT
1200 select FB_BOOT_VESA_SUPPORT if FB_INTEL = y
1201 depends on !DRM_I915
1202 help
1203 This driver supports the on-board graphics built in to the Intel
1204 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
1205 Say Y if you have and plan to use such a board.
1206
1207 To make FB_INTELFB=Y work you need to say AGP_INTEL=y too.
1208
1209 To compile this driver as a module, choose M here: the
1210 module will be called intelfb.
1211
1212 For more information, please read <file:Documentation/fb/intelfb.txt>
1213
1214config FB_INTEL_DEBUG
1215 bool "Intel driver Debug Messages"
1216 depends on FB_INTEL
1217 ---help---
1218 Say Y here if you want the Intel driver to output all sorts
1219 of debugging information to provide to the maintainer when
1220 something goes wrong.
1221
1222config FB_INTEL_I2C
1223 bool "DDC/I2C for Intel framebuffer support"
1224 depends on FB_INTEL
1225 select FB_DDC
1226 default y
1227 help
1228 Say Y here if you want DDC/I2C support for your on-board Intel graphics.
1229
1230config FB_MATROX
1231 tristate "Matrox acceleration"
1232 depends on FB && PCI
1233 select FB_CFB_FILLRECT
1234 select FB_CFB_COPYAREA
1235 select FB_CFB_IMAGEBLIT
1236 select FB_TILEBLITTING
1237 select FB_MACMODES if PPC_PMAC
1238 ---help---
1239 Say Y here if you have a Matrox Millennium, Matrox Millennium II,
1240 Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox
1241 Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video,
1242 Matrox G400, G450 or G550 card in your box.
1243
1244 To compile this driver as a module, choose M here: the
1245 module will be called matroxfb.
1246
1247 You can pass several parameters to the driver at boot time or at
1248 module load time. The parameters look like "video=matroxfb:XXX", and
1249 are described in <file:Documentation/fb/matroxfb.txt>.
1250
1251config FB_MATROX_MILLENIUM
1252 bool "Millennium I/II support"
1253 depends on FB_MATROX
1254 help
1255 Say Y here if you have a Matrox Millennium or Matrox Millennium II
1256 video card. If you select "Advanced lowlevel driver options" below,
1257 you should check 4 bpp packed pixel, 8 bpp packed pixel, 16 bpp
1258 packed pixel, 24 bpp packed pixel and 32 bpp packed pixel. You can
1259 also use font widths different from 8.
1260
1261config FB_MATROX_MYSTIQUE
1262 bool "Mystique support"
1263 depends on FB_MATROX
1264 help
1265 Say Y here if you have a Matrox Mystique or Matrox Mystique 220
1266 video card. If you select "Advanced lowlevel driver options" below,
1267 you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp
1268 packed pixel and 32 bpp packed pixel. You can also use font widths
1269 different from 8.
1270
1271config FB_MATROX_G
1272 bool "G100/G200/G400/G450/G550 support"
1273 depends on FB_MATROX
1274 ---help---
1275 Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based
1276 video card. If you select "Advanced lowlevel driver options", you
1277 should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed
1278 pixel and 32 bpp packed pixel. You can also use font widths
1279 different from 8.
1280
1281 If you need support for G400 secondary head, you must say Y to
1282 "Matrox I2C support" and "G400 second head support" right below.
1283 G450/G550 secondary head and digital output are supported without
1284 additional modules.
1285
1286 The driver starts in monitor mode. You must use the matroxset tool
1287 (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to
1288 swap primary and secondary head outputs, or to change output mode.
1289 Secondary head driver always start in 640x480 resolution and you
1290 must use fbset to change it.
1291
1292 Do not forget that second head supports only 16 and 32 bpp
1293 packed pixels, so it is a good idea to compile them into the kernel
1294 too. You can use only some font widths, as the driver uses generic
1295 painting procedures (the secondary head does not use acceleration
1296 engine).
1297
1298 G450/G550 hardware can display TV picture only from secondary CRTC,
1299 and it performs no scaling, so picture must have 525 or 625 lines.
1300
1301config FB_MATROX_I2C
1302 tristate "Matrox I2C support"
1303 depends on FB_MATROX
1304 select FB_DDC
1305 ---help---
1306 This drivers creates I2C buses which are needed for accessing the
1307 DDC (I2C) bus present on all Matroxes, an I2C bus which
1308 interconnects Matrox optional devices, like MGA-TVO on G200 and
1309 G400, and the secondary head DDC bus, present on G400 only.
1310
1311 You can say Y or M here if you want to experiment with monitor
1312 detection code. You must say Y or M here if you want to use either
1313 second head of G400 or MGA-TVO on G200 or G400.
1314
1315 If you compile it as module, it will create a module named
1316 i2c-matroxfb.
1317
1318config FB_MATROX_MAVEN
1319 tristate "G400 second head support"
1320 depends on FB_MATROX_G && FB_MATROX_I2C
1321 ---help---
1322 WARNING !!! This support does not work with G450 !!!
1323
1324 Say Y or M here if you want to use a secondary head (meaning two
1325 monitors in parallel) on G400 or MGA-TVO add-on on G200. Secondary
1326 head is not compatible with accelerated XFree 3.3.x SVGA servers -
1327 secondary head output is blanked while you are in X. With XFree
1328 3.9.17 preview you can use both heads if you use SVGA over fbdev or
1329 the fbdev driver on first head and the fbdev driver on second head.
1330
1331 If you compile it as module, two modules are created,
1332 matroxfb_crtc2 and matroxfb_maven. Matroxfb_maven is needed for
1333 both G200 and G400, matroxfb_crtc2 is needed only by G400. You must
1334 also load i2c-matroxfb to get it to run.
1335
1336 The driver starts in monitor mode and you must use the matroxset
1337 tool (available at
1338 <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to switch it to
1339 PAL or NTSC or to swap primary and secondary head outputs.
1340 Secondary head driver also always start in 640x480 resolution, you
1341 must use fbset to change it.
1342
1343 Also do not forget that second head supports only 16 and 32 bpp
1344 packed pixels, so it is a good idea to compile them into the kernel
1345 too. You can use only some font widths, as the driver uses generic
1346 painting procedures (the secondary head does not use acceleration
1347 engine).
1348
1349config FB_RADEON
1350 tristate "ATI Radeon display support"
1351 depends on FB && PCI
1352 select FB_BACKLIGHT if FB_RADEON_BACKLIGHT
1353 select FB_MODE_HELPERS
1354 select FB_CFB_FILLRECT
1355 select FB_CFB_COPYAREA
1356 select FB_CFB_IMAGEBLIT
1357 select FB_MACMODES if PPC_OF
1358 help
1359 Choose this option if you want to use an ATI Radeon graphics card as
1360 a framebuffer device. There are both PCI and AGP versions. You
1361 don't need to choose this to run the Radeon in plain VGA mode.
1362
1363 There is a product page at
1364 http://products.amd.com/en-us/GraphicCardResult.aspx
1365
1366config FB_RADEON_I2C
1367 bool "DDC/I2C for ATI Radeon support"
1368 depends on FB_RADEON
1369 select FB_DDC
1370 default y
1371 help
1372 Say Y here if you want DDC/I2C support for your Radeon board.
1373
1374config FB_RADEON_BACKLIGHT
1375 bool "Support for backlight control"
1376 depends on FB_RADEON
1377 default y
1378 help
1379 Say Y here if you want to control the backlight of your display.
1380
1381config FB_RADEON_DEBUG
1382 bool "Lots of debug output from Radeon driver"
1383 depends on FB_RADEON
1384 default n
1385 help
1386 Say Y here if you want the Radeon driver to output all sorts
1387 of debugging information to provide to the maintainer when
1388 something goes wrong.
1389
1390config FB_ATY128
1391 tristate "ATI Rage128 display support"
1392 depends on FB && PCI
1393 select FB_CFB_FILLRECT
1394 select FB_CFB_COPYAREA
1395 select FB_CFB_IMAGEBLIT
1396 select FB_BACKLIGHT if FB_ATY128_BACKLIGHT
1397 select FB_MACMODES if PPC_PMAC
1398 help
1399 This driver supports graphics boards with the ATI Rage128 chips.
1400 Say Y if you have such a graphics board and read
1401 <file:Documentation/fb/aty128fb.txt>.
1402
1403 To compile this driver as a module, choose M here: the
1404 module will be called aty128fb.
1405
1406config FB_ATY128_BACKLIGHT
1407 bool "Support for backlight control"
1408 depends on FB_ATY128
1409 default y
1410 help
1411 Say Y here if you want to control the backlight of your display.
1412
1413config FB_ATY
1414 tristate "ATI Mach64 display support" if PCI || ATARI
1415 depends on FB && !SPARC32
1416 select FB_CFB_FILLRECT
1417 select FB_CFB_COPYAREA
1418 select FB_CFB_IMAGEBLIT
1419 select FB_BACKLIGHT if FB_ATY_BACKLIGHT
1420 select FB_MACMODES if PPC
1421 help
1422 This driver supports graphics boards with the ATI Mach64 chips.
1423 Say Y if you have such a graphics board.
1424
1425 To compile this driver as a module, choose M here: the
1426 module will be called atyfb.
1427
1428config FB_ATY_CT
1429 bool "Mach64 CT/VT/GT/LT (incl. 3D RAGE) support"
1430 depends on PCI && FB_ATY
1431 default y if SPARC64 && PCI
1432 help
1433 Say Y here to support use of ATI's 64-bit Rage boards (or other
1434 boards based on the Mach64 CT, VT, GT, and LT chipsets) as a
1435 framebuffer device. The ATI product support page for these boards
1436 is at <http://support.ati.com/products/pc/mach64/mach64.html>.
1437
1438config FB_ATY_GENERIC_LCD
1439 bool "Mach64 generic LCD support"
1440 depends on FB_ATY_CT
1441 help
1442 Say Y if you have a laptop with an ATI Rage LT PRO, Rage Mobility,
1443 Rage XC, or Rage XL chipset.
1444
1445config FB_ATY_GX
1446 bool "Mach64 GX support" if PCI
1447 depends on FB_ATY
1448 default y if ATARI
1449 help
1450 Say Y here to support use of the ATI Mach64 Graphics Expression
1451 board (or other boards based on the Mach64 GX chipset) as a
1452 framebuffer device. The ATI product support page for these boards
1453 is at
1454 <http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
1455
1456config FB_ATY_BACKLIGHT
1457 bool "Support for backlight control"
1458 depends on FB_ATY
1459 default y
1460 help
1461 Say Y here if you want to control the backlight of your display.
1462
1463config FB_S3
1464 tristate "S3 Trio/Virge support"
1465 depends on FB && PCI
1466 select FB_CFB_FILLRECT
1467 select FB_CFB_COPYAREA
1468 select FB_CFB_IMAGEBLIT
1469 select FB_TILEBLITTING
1470 select FB_SVGALIB
1471 select VGASTATE
1472 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1473 ---help---
1474 Driver for graphics boards with S3 Trio / S3 Virge chip.
1475
1476config FB_S3_DDC
1477 bool "DDC for S3 support"
1478 depends on FB_S3
1479 select FB_DDC
1480 default y
1481 help
1482 Say Y here if you want DDC support for your S3 graphics card.
1483
1484config FB_SAVAGE
1485 tristate "S3 Savage support"
1486 depends on FB && PCI
1487 select FB_MODE_HELPERS
1488 select FB_CFB_FILLRECT
1489 select FB_CFB_COPYAREA
1490 select FB_CFB_IMAGEBLIT
1491 select VGASTATE
1492 help
1493 This driver supports notebooks and computers with S3 Savage PCI/AGP
1494 chips.
1495
1496 Say Y if you have such a graphics card.
1497
1498 To compile this driver as a module, choose M here; the module
1499 will be called savagefb.
1500
1501config FB_SAVAGE_I2C
1502 bool "Enable DDC2 Support"
1503 depends on FB_SAVAGE
1504 select FB_DDC
1505 help
1506 This enables I2C support for S3 Savage Chipsets. This is used
1507 only for getting EDID information from the attached display
1508 allowing for robust video mode handling and switching.
1509
1510 Because fbdev-2.6 requires that drivers must be able to
1511 independently validate video mode parameters, you should say Y
1512 here.
1513
1514config FB_SAVAGE_ACCEL
1515 bool "Enable Console Acceleration"
1516 depends on FB_SAVAGE
1517 default n
1518 help
1519 This option will compile in console acceleration support. If
1520 the resulting framebuffer console has bothersome glitches, then
1521 choose N here.
1522
1523config FB_SIS
1524 tristate "SiS/XGI display support"
1525 depends on FB && PCI
1526 select FB_CFB_FILLRECT
1527 select FB_CFB_COPYAREA
1528 select FB_CFB_IMAGEBLIT
1529 select FB_BOOT_VESA_SUPPORT if FB_SIS = y
1530 help
1531 This is the frame buffer device driver for the SiS 300, 315, 330
1532 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
1533 Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
1534
1535 To compile this driver as a module, choose M here; the module
1536 will be called sisfb.
1537
1538config FB_SIS_300
1539 bool "SiS 300 series support"
1540 depends on FB_SIS
1541 help
1542 Say Y here to support use of the SiS 300/305, 540, 630 and 730.
1543
1544config FB_SIS_315
1545 bool "SiS 315/330/340 series and XGI support"
1546 depends on FB_SIS
1547 help
1548 Say Y here to support use of the SiS 315, 330 and 340 series
1549 (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
1550 as XGI V3XT, V5, V8 and Z7.
1551
1552config FB_VIA
1553 tristate "VIA UniChrome (Pro) and Chrome9 display support"
1554 depends on FB && PCI && X86
1555 select FB_CFB_FILLRECT
1556 select FB_CFB_COPYAREA
1557 select FB_CFB_IMAGEBLIT
1558 select I2C_ALGOBIT
1559 select I2C
1560 select GPIOLIB
1561 help
1562 This is the frame buffer device driver for Graphics chips of VIA
1563 UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/
1564 CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896
1565 /P4M900,VX800)
1566 Say Y if you have a VIA UniChrome graphics board.
1567
1568 To compile this driver as a module, choose M here: the
1569 module will be called viafb.
1570
1571if FB_VIA
1572
1573config FB_VIA_DIRECT_PROCFS
1574 bool "direct hardware access via procfs (DEPRECATED)(DANGEROUS)"
1575 depends on FB_VIA
1576 default n
1577 help
1578 Allow direct hardware access to some output registers via procfs.
1579 This is dangerous but may provide the only chance to get the
1580 correct output device configuration.
1581 Its use is strongly discouraged.
1582
1583config FB_VIA_X_COMPATIBILITY
1584 bool "X server compatibility"
1585 depends on FB_VIA
1586 default n
1587 help
1588 This option reduces the functionality (power saving, ...) of the
1589 framebuffer to avoid negative impact on the OpenChrome X server.
1590 If you use any X server other than fbdev you should enable this
1591 otherwise it should be safe to disable it and allow using all
1592 features.
1593
1594endif
1595
1596config FB_NEOMAGIC
1597 tristate "NeoMagic display support"
1598 depends on FB && PCI
1599 select FB_MODE_HELPERS
1600 select FB_CFB_FILLRECT
1601 select FB_CFB_COPYAREA
1602 select FB_CFB_IMAGEBLIT
1603 select VGASTATE
1604 help
1605 This driver supports notebooks with NeoMagic PCI chips.
1606 Say Y if you have such a graphics card.
1607
1608 To compile this driver as a module, choose M here: the
1609 module will be called neofb.
1610
1611config FB_KYRO
1612 tristate "IMG Kyro support"
1613 depends on FB && PCI
1614 select FB_CFB_FILLRECT
1615 select FB_CFB_COPYAREA
1616 select FB_CFB_IMAGEBLIT
1617 help
1618 Say Y here if you have a STG4000 / Kyro / PowerVR 3 based
1619 graphics board.
1620
1621 To compile this driver as a module, choose M here: the
1622 module will be called kyrofb.
1623
1624config FB_3DFX
1625 tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
1626 depends on FB && PCI
1627 select FB_CFB_IMAGEBLIT
1628 select FB_CFB_FILLRECT
1629 select FB_CFB_COPYAREA
1630 select FB_MODE_HELPERS
1631 help
1632 This driver supports graphics boards with the 3Dfx Banshee,
1633 Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have
1634 such a graphics board.
1635
1636 To compile this driver as a module, choose M here: the
1637 module will be called tdfxfb.
1638
1639config FB_3DFX_ACCEL
1640 bool "3Dfx Acceleration functions"
1641 depends on FB_3DFX
1642 ---help---
1643 This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
1644 device driver with acceleration functions.
1645
1646config FB_3DFX_I2C
1647 bool "Enable DDC/I2C support"
1648 depends on FB_3DFX
1649 select FB_DDC
1650 default y
1651 help
1652 Say Y here if you want DDC/I2C support for your 3dfx Voodoo3.
1653
1654config FB_VOODOO1
1655 tristate "3Dfx Voodoo Graphics (sst1) support"
1656 depends on FB && PCI
1657 select FB_CFB_FILLRECT
1658 select FB_CFB_COPYAREA
1659 select FB_CFB_IMAGEBLIT
1660 ---help---
1661 Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or
1662 Voodoo2 (cvg) based graphics card.
1663
1664 To compile this driver as a module, choose M here: the
1665 module will be called sstfb.
1666
1667 WARNING: Do not use any application that uses the 3D engine
1668 (namely glide) while using this driver.
1669 Please read the <file:Documentation/fb/sstfb.txt> for supported
1670 options and other important info support.
1671
1672config FB_VT8623
1673 tristate "VIA VT8623 support"
1674 depends on FB && PCI
1675 select FB_CFB_FILLRECT
1676 select FB_CFB_COPYAREA
1677 select FB_CFB_IMAGEBLIT
1678 select FB_TILEBLITTING
1679 select FB_SVGALIB
1680 select VGASTATE
1681 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1682 ---help---
1683 Driver for CastleRock integrated graphics core in the
1684 VIA VT8623 [Apollo CLE266] chipset.
1685
1686config FB_TRIDENT
1687 tristate "Trident/CyberXXX/CyberBlade support"
1688 depends on FB && PCI
1689 select FB_CFB_FILLRECT
1690 select FB_CFB_COPYAREA
1691 select FB_CFB_IMAGEBLIT
1692 ---help---
1693 This is the frame buffer device driver for Trident PCI/AGP chipsets.
1694 Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D
1695 and Blade XP.
1696 There are also integrated versions of these chips called CyberXXXX,
1697 CyberImage or CyberBlade. These chips are mostly found in laptops
1698 but also on some motherboards including early VIA EPIA motherboards.
1699 For more information, read <file:Documentation/fb/tridentfb.txt>
1700
1701 Say Y if you have such a graphics board.
1702
1703 To compile this driver as a module, choose M here: the
1704 module will be called tridentfb.
1705
1706config FB_ARK
1707 tristate "ARK 2000PV support"
1708 depends on FB && PCI
1709 select FB_CFB_FILLRECT
1710 select FB_CFB_COPYAREA
1711 select FB_CFB_IMAGEBLIT
1712 select FB_TILEBLITTING
1713 select FB_SVGALIB
1714 select VGASTATE
1715 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1716 ---help---
1717 Driver for PCI graphics boards with ARK 2000PV chip
1718 and ICS 5342 RAMDAC.
1719
1720config FB_PM3
1721 tristate "Permedia3 support"
1722 depends on FB && PCI
1723 select FB_CFB_FILLRECT
1724 select FB_CFB_COPYAREA
1725 select FB_CFB_IMAGEBLIT
1726 help
1727 This is the frame buffer device driver for the 3DLabs Permedia3
1728 chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
1729 similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
1730 and maybe other boards.
1731
1732config FB_CARMINE
1733 tristate "Fujitsu carmine frame buffer support"
1734 depends on FB && PCI
1735 select FB_CFB_FILLRECT
1736 select FB_CFB_COPYAREA
1737 select FB_CFB_IMAGEBLIT
1738 help
1739 This is the frame buffer device driver for the Fujitsu Carmine chip.
1740 The driver provides two independent frame buffer devices.
1741
1742choice
1743 depends on FB_CARMINE
1744 prompt "DRAM timing"
1745 default FB_CARMINE_DRAM_EVAL
1746
1747config FB_CARMINE_DRAM_EVAL
1748 bool "Eval board timings"
1749 help
1750 Use timings which work on the eval card.
1751
1752config CARMINE_DRAM_CUSTOM
1753 bool "Custom board timings"
1754 help
1755 Use custom board timings.
1756endchoice
1757
1758config FB_AU1100
1759 bool "Au1100 LCD Driver"
1760 depends on (FB = y) && MIPS_ALCHEMY
1761 select FB_CFB_FILLRECT
1762 select FB_CFB_COPYAREA
1763 select FB_CFB_IMAGEBLIT
1764 help
1765 This is the framebuffer driver for the AMD Au1100 SOC. It can drive
1766 various panels and CRTs by passing in kernel cmd line option
1767 au1100fb:panel=<name>.
1768
1769config FB_AU1200
1770 bool "Au1200/Au1300 LCD Driver"
1771 depends on (FB = y) && MIPS_ALCHEMY
1772 select FB_SYS_FILLRECT
1773 select FB_SYS_COPYAREA
1774 select FB_SYS_IMAGEBLIT
1775 select FB_SYS_FOPS
1776 help
1777 This is the framebuffer driver for the Au1200/Au1300 SOCs.
1778 It can drive various panels and CRTs by passing in kernel cmd line
1779 option au1200fb:panel=<name>.
1780
1781config FB_VT8500
1782 bool "VIA VT8500 framebuffer support"
1783 depends on (FB = y) && ARM && ARCH_VT8500
1784 select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
1785 select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
1786 select FB_SYS_IMAGEBLIT
1787 select FB_MODE_HELPERS
1788 select VIDEOMODE_HELPERS
1789 help
1790 This is the framebuffer driver for VIA VT8500 integrated LCD
1791 controller.
1792
1793config FB_WM8505
1794 bool "Wondermedia WM8xxx-series frame buffer support"
1795 depends on (FB = y) && ARM && ARCH_VT8500
1796 select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
1797 select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
1798 select FB_SYS_IMAGEBLIT
1799 select FB_MODE_HELPERS
1800 select VIDEOMODE_HELPERS
1801 help
1802 This is the framebuffer driver for WonderMedia WM8xxx-series
1803 integrated LCD controller. This driver covers the WM8505, WM8650
1804 and WM8850 SoCs.
1805
1806config FB_WMT_GE_ROPS
1807 bool "VT8500/WM8xxx accelerated raster ops support"
1808 depends on (FB = y) && (FB_VT8500 || FB_WM8505)
1809 default n
1810 help
1811 This adds support for accelerated raster operations on the
1812 VIA VT8500 and Wondermedia 85xx series SoCs.
1813
1814source "drivers/video/geode/Kconfig"
1815
1816config FB_HIT
1817 tristate "HD64461 Frame Buffer support"
1818 depends on FB && HD64461
1819 select FB_CFB_FILLRECT
1820 select FB_CFB_COPYAREA
1821 select FB_CFB_IMAGEBLIT
1822 help
1823 This is the frame buffer device driver for the Hitachi HD64461 LCD
1824 frame buffer card.
1825
1826config FB_PMAG_AA
1827 bool "PMAG-AA TURBOchannel framebuffer support"
1828 depends on (FB = y) && TC
1829 select FB_CFB_FILLRECT
1830 select FB_CFB_COPYAREA
1831 select FB_CFB_IMAGEBLIT
1832 help
1833 Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1)
1834 used mainly in the MIPS-based DECstation series.
1835
1836config FB_PMAG_BA
1837 tristate "PMAG-BA TURBOchannel framebuffer support"
1838 depends on FB && TC
1839 select FB_CFB_FILLRECT
1840 select FB_CFB_COPYAREA
1841 select FB_CFB_IMAGEBLIT
1842 help
1843 Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8)
1844 used mainly in the MIPS-based DECstation series.
1845
1846config FB_PMAGB_B
1847 tristate "PMAGB-B TURBOchannel framebuffer support"
1848 depends on FB && TC
1849 select FB_CFB_FILLRECT
1850 select FB_CFB_COPYAREA
1851 select FB_CFB_IMAGEBLIT
1852 help
1853 Support for the PMAGB-B TURBOchannel framebuffer card used mainly
1854 in the MIPS-based DECstation series. The card is currently only
1855 supported in 1280x1024x8 mode.
1856
1857config FB_MAXINE
1858 bool "Maxine (Personal DECstation) onboard framebuffer support"
1859 depends on (FB = y) && MACH_DECSTATION
1860 select FB_CFB_FILLRECT
1861 select FB_CFB_COPYAREA
1862 select FB_CFB_IMAGEBLIT
1863 help
1864 Support for the onboard framebuffer (1024x768x8) in the Personal
1865 DECstation series (Personal DECstation 5000/20, /25, /33, /50,
1866 Codename "Maxine").
1867
1868config FB_G364
1869 bool "G364 frame buffer support"
1870 depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
1871 select FB_CFB_FILLRECT
1872 select FB_CFB_COPYAREA
1873 select FB_CFB_IMAGEBLIT
1874 help
1875 The G364 driver is the framebuffer used in MIPS Magnum 4000 and
1876 Olivetti M700-10 systems.
1877
1878config FB_68328
1879 bool "Motorola 68328 native frame buffer support"
1880 depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328)
1881 select FB_CFB_FILLRECT
1882 select FB_CFB_COPYAREA
1883 select FB_CFB_IMAGEBLIT
1884 help
1885 Say Y here if you want to support the built-in frame buffer of
1886 the Motorola 68328 CPU family.
1887
1888config FB_PXA168
1889 tristate "PXA168/910 LCD framebuffer support"
1890 depends on FB && (CPU_PXA168 || CPU_PXA910)
1891 select FB_CFB_FILLRECT
1892 select FB_CFB_COPYAREA
1893 select FB_CFB_IMAGEBLIT
1894 ---help---
1895 Frame buffer driver for the built-in LCD controller in the Marvell
1896 MMP processor.
1897
1898config FB_PXA
1899 tristate "PXA LCD framebuffer support"
1900 depends on FB && ARCH_PXA
1901 select FB_CFB_FILLRECT
1902 select FB_CFB_COPYAREA
1903 select FB_CFB_IMAGEBLIT
1904 ---help---
1905 Frame buffer driver for the built-in LCD controller in the Intel
1906 PXA2x0 processor.
1907
1908 This driver is also available as a module ( = code which can be
1909 inserted and removed from the running kernel whenever you want). The
1910 module will be called pxafb. If you want to compile it as a module,
1911 say M here and read <file:Documentation/kbuild/modules.txt>.
1912
1913 If unsure, say N.
1914
1915config FB_PXA_OVERLAY
1916 bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
1917 default n
1918 depends on FB_PXA && (PXA27x || PXA3xx)
1919
1920config FB_PXA_SMARTPANEL
1921 bool "PXA Smartpanel LCD support"
1922 default n
1923 depends on FB_PXA
1924
1925config FB_PXA_PARAMETERS
1926 bool "PXA LCD command line parameters"
1927 default n
1928 depends on FB_PXA
1929 ---help---
1930 Enable the use of kernel command line or module parameters
1931 to configure the physical properties of the LCD panel when
1932 using the PXA LCD driver.
1933
1934 This option allows you to override the panel parameters
1935 supplied by the platform in order to support multiple
1936 different models of flatpanel. If you will only be using a
1937 single model of flatpanel then you can safely leave this
1938 option disabled.
1939
1940 <file:Documentation/fb/pxafb.txt> describes the available parameters.
1941
1942config PXA3XX_GCU
1943 tristate "PXA3xx 2D graphics accelerator driver"
1944 depends on FB_PXA
1945 help
1946 Kernelspace driver for the 2D graphics controller unit (GCU)
1947 found on PXA3xx processors. There is a counterpart driver in the
1948 DirectFB suite, see http://www.directfb.org/
1949
1950 If you compile this as a module, it will be called pxa3xx_gcu.
1951
1952config FB_MBX
1953 tristate "2700G LCD framebuffer support"
1954 depends on FB && ARCH_PXA
1955 select FB_CFB_FILLRECT
1956 select FB_CFB_COPYAREA
1957 select FB_CFB_IMAGEBLIT
1958 ---help---
1959 Framebuffer driver for the Intel 2700G (Marathon) Graphics
1960 Accelerator
1961
1962config FB_MBX_DEBUG
1963 bool "Enable debugging info via debugfs"
1964 depends on FB_MBX && DEBUG_FS
1965 default n
1966 ---help---
1967 Enable this if you want debugging information using the debug
1968 filesystem (debugfs)
1969
1970 If unsure, say N.
1971
1972config FB_FSL_DIU
1973 tristate "Freescale DIU framebuffer support"
1974 depends on FB && FSL_SOC
1975 select FB_MODE_HELPERS
1976 select FB_CFB_FILLRECT
1977 select FB_CFB_COPYAREA
1978 select FB_CFB_IMAGEBLIT
1979 select PPC_LIB_RHEAP
1980 ---help---
1981 Framebuffer driver for the Freescale SoC DIU
1982
1983config FB_W100
1984 tristate "W100 frame buffer support"
1985 depends on FB && ARCH_PXA
1986 select FB_CFB_FILLRECT
1987 select FB_CFB_COPYAREA
1988 select FB_CFB_IMAGEBLIT
1989 ---help---
1990 Frame buffer driver for the w100 as found on the Sharp SL-Cxx series.
1991 It can also drive the w3220 chip found on iPAQ hx4700.
1992
1993 This driver is also available as a module ( = code which can be
1994 inserted and removed from the running kernel whenever you want). The
1995 module will be called w100fb. If you want to compile it as a module,
1996 say M here and read <file:Documentation/kbuild/modules.txt>.
1997
1998 If unsure, say N.
1999
2000config FB_SH_MOBILE_LCDC
2001 tristate "SuperH Mobile LCDC framebuffer support"
2002 depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
2003 select FB_SYS_FILLRECT
2004 select FB_SYS_COPYAREA
2005 select FB_SYS_IMAGEBLIT
2006 select FB_SYS_FOPS
2007 select FB_DEFERRED_IO
2008 select FB_BACKLIGHT
2009 select SH_MIPI_DSI if SH_LCD_MIPI_DSI
2010 ---help---
2011 Frame buffer driver for the on-chip SH-Mobile LCD controller.
2012
2013config FB_SH_MOBILE_HDMI
2014 tristate "SuperH Mobile HDMI controller support"
2015 depends on FB_SH_MOBILE_LCDC
2016 select FB_MODE_HELPERS
2017 select SOUND
2018 select SND
2019 select SND_SOC
2020 ---help---
2021 Driver for the on-chip SH-Mobile HDMI controller.
2022
2023config FB_TMIO
2024 tristate "Toshiba Mobile IO FrameBuffer support"
2025 depends on FB && MFD_CORE
2026 select FB_CFB_FILLRECT
2027 select FB_CFB_COPYAREA
2028 select FB_CFB_IMAGEBLIT
2029 ---help---
2030 Frame buffer driver for the Toshiba Mobile IO integrated as found
2031 on the Sharp SL-6000 series
2032
2033 This driver is also available as a module ( = code which can be
2034 inserted and removed from the running kernel whenever you want). The
2035 module will be called tmiofb. If you want to compile it as a module,
2036 say M here and read <file:Documentation/kbuild/modules.txt>.
2037
2038 If unsure, say N.
2039
2040config FB_TMIO_ACCELL
2041 bool "tmiofb acceleration"
2042 depends on FB_TMIO
2043 default y
2044
2045config FB_S3C
2046 tristate "Samsung S3C framebuffer support"
2047 depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
2048 ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
2049 select FB_CFB_FILLRECT
2050 select FB_CFB_COPYAREA
2051 select FB_CFB_IMAGEBLIT
2052 ---help---
2053 Frame buffer driver for the built-in FB controller in the Samsung
2054 SoC line from the S3C2443 onwards, including the S3C2416, S3C2450,
2055 and the S3C64XX series such as the S3C6400 and S3C6410.
2056
2057 These chips all have the same basic framebuffer design with the
2058 actual capabilities depending on the chip. For instance the S3C6400
2059 and S3C6410 support 4 hardware windows whereas the S3C24XX series
2060 currently only have two.
2061
2062 Currently the support is only for the S3C6400 and S3C6410 SoCs.
2063
2064config FB_S3C_DEBUG_REGWRITE
2065 bool "Debug register writes"
2066 depends on FB_S3C
2067 ---help---
2068 Show all register writes via pr_debug()
2069
2070config FB_S3C2410
2071 tristate "S3C2410 LCD framebuffer support"
2072 depends on FB && ARCH_S3C24XX
2073 select FB_CFB_FILLRECT
2074 select FB_CFB_COPYAREA
2075 select FB_CFB_IMAGEBLIT
2076 ---help---
2077 Frame buffer driver for the built-in LCD controller in the Samsung
2078 S3C2410 processor.
2079
2080 This driver is also available as a module ( = code which can be
2081 inserted and removed from the running kernel whenever you want). The
2082 module will be called s3c2410fb. If you want to compile it as a module,
2083 say M here and read <file:Documentation/kbuild/modules.txt>.
2084
2085 If unsure, say N.
2086config FB_S3C2410_DEBUG
2087 bool "S3C2410 lcd debug messages"
2088 depends on FB_S3C2410
2089 help
2090 Turn on debugging messages. Note that you can set/unset at run time
2091 through sysfs
2092
2093config FB_NUC900
2094 bool "NUC900 LCD framebuffer support"
2095 depends on FB && ARCH_W90X900
2096 select FB_CFB_FILLRECT
2097 select FB_CFB_COPYAREA
2098 select FB_CFB_IMAGEBLIT
2099 ---help---
2100 Frame buffer driver for the built-in LCD controller in the Nuvoton
2101 NUC900 processor
2102
2103config GPM1040A0_320X240
2104 bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
2105 depends on FB_NUC900
2106
2107config FB_SM501
2108 tristate "Silicon Motion SM501 framebuffer support"
2109 depends on FB && MFD_SM501
2110 select FB_CFB_FILLRECT
2111 select FB_CFB_COPYAREA
2112 select FB_CFB_IMAGEBLIT
2113 ---help---
2114 Frame buffer driver for the CRT and LCD controllers in the Silicon
2115 Motion SM501.
2116
2117 This driver is also available as a module ( = code which can be
2118 inserted and removed from the running kernel whenever you want). The
2119 module will be called sm501fb. If you want to compile it as a module,
2120 say M here and read <file:Documentation/kbuild/modules.txt>.
2121
2122 If unsure, say N.
2123
2124config FB_SMSCUFX
2125 tristate "SMSC UFX6000/7000 USB Framebuffer support"
2126 depends on FB && USB
2127 select FB_MODE_HELPERS
2128 select FB_SYS_FILLRECT
2129 select FB_SYS_COPYAREA
2130 select FB_SYS_IMAGEBLIT
2131 select FB_SYS_FOPS
2132 select FB_DEFERRED_IO
2133 ---help---
2134 This is a kernel framebuffer driver for SMSC UFX USB devices.
2135 Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
2136 mplayer -vo fbdev. Supports both UFX6000 (USB 2.0) and UFX7000
2137 (USB 3.0) devices.
2138 To compile as a module, choose M here: the module name is smscufx.
2139
2140config FB_UDL
2141 tristate "Displaylink USB Framebuffer support"
2142 depends on FB && USB
2143 select FB_MODE_HELPERS
2144 select FB_SYS_FILLRECT
2145 select FB_SYS_COPYAREA
2146 select FB_SYS_IMAGEBLIT
2147 select FB_SYS_FOPS
2148 select FB_DEFERRED_IO
2149 ---help---
2150 This is a kernel framebuffer driver for DisplayLink USB devices.
2151 Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
2152 mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
2153 To compile as a module, choose M here: the module name is udlfb.
2154
2155config FB_IBM_GXT4500
2156 tristate "Framebuffer support for IBM GXT4000P/4500P/6000P/6500P adaptors"
2157 depends on FB && PPC
2158 select FB_CFB_FILLRECT
2159 select FB_CFB_COPYAREA
2160 select FB_CFB_IMAGEBLIT
2161 ---help---
2162 Say Y here to enable support for the IBM GXT4000P/6000P and
2163 GXT4500P/6500P display adaptor based on Raster Engine RC1000,
2164 found on some IBM System P (pSeries) machines. This driver
2165 doesn't use Geometry Engine GT1000.
2166
2167config FB_PS3
2168 tristate "PS3 GPU framebuffer driver"
2169 depends on FB && PS3_PS3AV
2170 select FB_SYS_FILLRECT
2171 select FB_SYS_COPYAREA
2172 select FB_SYS_IMAGEBLIT
2173 select FB_SYS_FOPS
2174 select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
2175 ---help---
2176 Include support for the virtual frame buffer in the PS3 platform.
2177
2178config FB_PS3_DEFAULT_SIZE_M
2179 int "PS3 default frame buffer size (in MiB)"
2180 depends on FB_PS3
2181 default 9
2182 ---help---
2183 This is the default size (in MiB) of the virtual frame buffer in
2184 the PS3.
2185 The default value can be overridden on the kernel command line
2186 using the "ps3fb" option (e.g. "ps3fb=9M");
2187
2188config FB_XILINX
2189 tristate "Xilinx frame buffer support"
2190 depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ)
2191 select FB_CFB_FILLRECT
2192 select FB_CFB_COPYAREA
2193 select FB_CFB_IMAGEBLIT
2194 ---help---
2195 Include support for the Xilinx ML300/ML403 reference design
2196 framebuffer. ML300 carries a 640*480 LCD display on the board,
2197 ML403 uses a standard DB15 VGA connector.
2198
2199config FB_GOLDFISH
2200 tristate "Goldfish Framebuffer"
2201 depends on FB && HAS_DMA
2202 select FB_CFB_FILLRECT
2203 select FB_CFB_COPYAREA
2204 select FB_CFB_IMAGEBLIT
2205 ---help---
2206 Framebuffer driver for Goldfish Virtual Platform
2207
2208config FB_COBALT
2209 tristate "Cobalt server LCD frame buffer support"
2210 depends on FB && (MIPS_COBALT || MIPS_SEAD3)
2211
2212config FB_SH7760
2213 bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
2214 depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
2215 || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
2216 select FB_CFB_FILLRECT
2217 select FB_CFB_COPYAREA
2218 select FB_CFB_IMAGEBLIT
2219 ---help---
2220 Support for the SH7760/SH7763/SH7720/SH7721 integrated
2221 (D)STN/TFT LCD Controller.
2222 Supports display resolutions up to 1024x1024 pixel, grayscale and
2223 color operation, with depths ranging from 1 bpp to 8 bpp monochrome
2224 and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
2225 panels <= 320 pixel horizontal resolution.
2226
2227config FB_DA8XX
2228 tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support"
2229 depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX)
2230 select FB_CFB_FILLRECT
2231 select FB_CFB_COPYAREA
2232 select FB_CFB_IMAGEBLIT
2233 select FB_CFB_REV_PIXELS_IN_BYTE
2234 select FB_MODE_HELPERS
2235 select VIDEOMODE_HELPERS
2236 ---help---
2237 This is the frame buffer device driver for the TI LCD controller
2238 found on DA8xx/OMAP-L1xx/AM335x SoCs.
2239 If unsure, say N.
2240
2241config FB_VIRTUAL
2242 tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
2243 depends on FB
2244 select FB_SYS_FILLRECT
2245 select FB_SYS_COPYAREA
2246 select FB_SYS_IMAGEBLIT
2247 select FB_SYS_FOPS
2248 ---help---
2249 This is a `virtual' frame buffer device. It operates on a chunk of
2250 unswappable kernel memory instead of on the memory of a graphics
2251 board. This means you cannot see any output sent to this frame
2252 buffer device, while it does consume precious memory. The main use
2253 of this frame buffer device is testing and debugging the frame
2254 buffer subsystem. Do NOT enable it for normal systems! To protect
2255 the innocent, it has to be enabled explicitly at boot time using the
2256 kernel option `video=vfb:'.
2257
2258 To compile this driver as a module, choose M here: the
2259 module will be called vfb. In order to load it, you must use
2260 the vfb_enable=1 option.
2261
2262 If unsure, say N.
2263
2264config XEN_FBDEV_FRONTEND
2265 tristate "Xen virtual frame buffer support"
2266 depends on FB && XEN
2267 select FB_SYS_FILLRECT
2268 select FB_SYS_COPYAREA
2269 select FB_SYS_IMAGEBLIT
2270 select FB_SYS_FOPS
2271 select FB_DEFERRED_IO
2272 select INPUT_XEN_KBDDEV_FRONTEND if INPUT_MISC
2273 select XEN_XENBUS_FRONTEND
2274 default y
2275 help
2276 This driver implements the front-end of the Xen virtual
2277 frame buffer driver. It communicates with a back-end
2278 in another domain.
2279
2280config FB_METRONOME
2281 tristate "E-Ink Metronome/8track controller support"
2282 depends on FB
2283 select FB_SYS_FILLRECT
2284 select FB_SYS_COPYAREA
2285 select FB_SYS_IMAGEBLIT
2286 select FB_SYS_FOPS
2287 select FB_DEFERRED_IO
2288 help
2289 This driver implements support for the E-Ink Metronome
2290 controller. The pre-release name for this device was 8track
2291 and could also have been called by some vendors as PVI-nnnn.
2292
2293config FB_MB862XX
2294 tristate "Fujitsu MB862xx GDC support"
2295 depends on FB
2296 depends on PCI || (OF && PPC)
2297 select FB_CFB_FILLRECT
2298 select FB_CFB_COPYAREA
2299 select FB_CFB_IMAGEBLIT
2300 ---help---
2301 Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers.
2302
2303choice
2304 prompt "GDC variant"
2305 depends on FB_MB862XX
2306
2307config FB_MB862XX_PCI_GDC
2308 bool "Carmine/Coral-P(A) GDC"
2309 depends on PCI
2310 ---help---
2311 This enables framebuffer support for Fujitsu Carmine/Coral-P(A)
2312 PCI graphics controller devices.
2313
2314config FB_MB862XX_LIME
2315 bool "Lime GDC"
2316 depends on OF && PPC
2317 select FB_FOREIGN_ENDIAN
2318 select FB_LITTLE_ENDIAN
2319 ---help---
2320 Framebuffer support for Fujitsu Lime GDC on host CPU bus.
2321
2322endchoice
2323
2324config FB_MB862XX_I2C
2325 bool "Support I2C bus on MB862XX GDC"
2326 depends on FB_MB862XX && I2C
2327 default y
2328 help
2329 Selecting this option adds Coral-P(A)/Lime GDC I2C bus adapter
2330 driver to support accessing I2C devices on controller's I2C bus.
2331 These are usually some video decoder chips.
2332
2333config FB_EP93XX
2334 tristate "EP93XX frame buffer support"
2335 depends on FB && ARCH_EP93XX
2336 select FB_CFB_FILLRECT
2337 select FB_CFB_COPYAREA
2338 select FB_CFB_IMAGEBLIT
2339 ---help---
2340 Framebuffer driver for the Cirrus Logic EP93XX series of processors.
2341 This driver is also available as a module. The module will be called
2342 ep93xx-fb.
2343
2344config FB_PRE_INIT_FB
2345 bool "Don't reinitialize, use bootloader's GDC/Display configuration"
2346 depends on FB && FB_MB862XX_LIME
2347 ---help---
2348 Select this option if display contents should be inherited as set by
2349 the bootloader.
2350
2351config FB_MSM
2352 tristate "MSM Framebuffer support"
2353 depends on FB && ARCH_MSM
2354 select FB_CFB_FILLRECT
2355 select FB_CFB_COPYAREA
2356 select FB_CFB_IMAGEBLIT
2357
2358config FB_MX3
2359 tristate "MX3 Framebuffer support"
2360 depends on FB && MX3_IPU
2361 select FB_CFB_FILLRECT
2362 select FB_CFB_COPYAREA
2363 select FB_CFB_IMAGEBLIT
2364 default y
2365 help
2366 This is a framebuffer device for the i.MX31 LCD Controller. So
2367 far only synchronous displays are supported. If you plan to use
2368 an LCD display with your i.MX31 system, say Y here.
2369
2370config FB_BROADSHEET
2371 tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
2372 depends on FB
2373 select FB_SYS_FILLRECT
2374 select FB_SYS_COPYAREA
2375 select FB_SYS_IMAGEBLIT
2376 select FB_SYS_FOPS
2377 select FB_DEFERRED_IO
2378 help
2379 This driver implements support for the E-Ink Broadsheet
2380 controller. The release name for this device was Epson S1D13521
2381 and could also have been called by other names when coupled with
2382 a bridge adapter.
2383
2384config FB_AUO_K190X
2385 tristate "AUO-K190X EPD controller support"
2386 depends on FB
2387 select FB_SYS_FILLRECT
2388 select FB_SYS_COPYAREA
2389 select FB_SYS_IMAGEBLIT
2390 select FB_SYS_FOPS
2391 select FB_DEFERRED_IO
2392 help
2393 Provides support for epaper controllers from the K190X series
2394 of AUO. These controllers can be used to drive epaper displays
2395 from Sipix.
2396
2397 This option enables the common support, shared by the individual
2398 controller drivers. You will also have to enable the driver
2399 for the controller type used in your device.
2400
2401config FB_AUO_K1900
2402 tristate "AUO-K1900 EPD controller support"
2403 depends on FB && FB_AUO_K190X
2404 help
2405 This driver implements support for the AUO K1900 epd-controller.
2406 This controller can drive Sipix epaper displays but can only do
2407 serial updates, reducing the number of possible frames per second.
2408
2409config FB_AUO_K1901
2410 tristate "AUO-K1901 EPD controller support"
2411 depends on FB && FB_AUO_K190X
2412 help
2413 This driver implements support for the AUO K1901 epd-controller.
2414 This controller can drive Sipix epaper displays and supports
2415 concurrent updates, making higher frames per second possible.
2416
2417config FB_JZ4740
2418 tristate "JZ4740 LCD framebuffer support"
2419 depends on FB && MACH_JZ4740
2420 select FB_SYS_FILLRECT
2421 select FB_SYS_COPYAREA
2422 select FB_SYS_IMAGEBLIT
2423 help
2424 Framebuffer support for the JZ4740 SoC.
2425
2426config FB_MXS
2427 tristate "MXS LCD framebuffer support"
2428 depends on FB && ARCH_MXS
2429 select FB_CFB_FILLRECT
2430 select FB_CFB_COPYAREA
2431 select FB_CFB_IMAGEBLIT
2432 select FB_MODE_HELPERS
2433 select VIDEOMODE_HELPERS
2434 help
2435 Framebuffer support for the MXS SoC.
2436
2437config FB_PUV3_UNIGFX
2438 tristate "PKUnity v3 Unigfx framebuffer support"
2439 depends on FB && UNICORE32 && ARCH_PUV3
2440 select FB_SYS_FILLRECT
2441 select FB_SYS_COPYAREA
2442 select FB_SYS_IMAGEBLIT
2443 select FB_SYS_FOPS
2444 help
2445 Choose this option if you want to use the Unigfx device as a
2446 framebuffer device. Without the support of PCI & AGP.
2447
2448config FB_HYPERV
2449 tristate "Microsoft Hyper-V Synthetic Video support"
2450 depends on FB && HYPERV
2451 select FB_CFB_FILLRECT
2452 select FB_CFB_COPYAREA
2453 select FB_CFB_IMAGEBLIT
2454 help
2455 This framebuffer driver supports Microsoft Hyper-V Synthetic Video.
2456
2457config FB_SIMPLE
2458 bool "Simple framebuffer support"
2459 depends on (FB = y)
2460 select FB_CFB_FILLRECT
2461 select FB_CFB_COPYAREA
2462 select FB_CFB_IMAGEBLIT
2463 help
2464 Say Y if you want support for a simple frame-buffer.
2465
2466 This driver assumes that the display hardware has been initialized
2467 before the kernel boots, and the kernel will simply render to the
2468 pre-allocated frame buffer surface.
2469
2470 Configuration re: surface address, size, and format must be provided
2471 through device tree, or plain old platform data.
2472
2473source "drivers/video/omap/Kconfig"
2474source "drivers/video/omap2/Kconfig"
2475source "drivers/video/exynos/Kconfig"
2476source "drivers/video/mmp/Kconfig"
2477source "drivers/video/backlight/Kconfig"
2478
2479if VT 44if VT
2480 source "drivers/video/console/Kconfig" 45 source "drivers/video/console/Kconfig"
2481endif 46endif
2482 47
2483if FB || SGI_NEWPORT_CONSOLE 48if FB || SGI_NEWPORT_CONSOLE
2484 source "drivers/video/logo/Kconfig" 49 source "drivers/video/logo/Kconfig"
2485endif
2486 50
2487config FB_SH_MOBILE_MERAM 51endif
2488 tristate "SuperH Mobile MERAM read ahead support"
2489 depends on (SUPERH || ARCH_SHMOBILE)
2490 select GENERIC_ALLOCATOR
2491 ---help---
2492 Enable MERAM support for the SuperH controller.
2493
2494 This will allow for caching of the framebuffer to provide more
2495 reliable access under heavy main memory bus traffic situations.
2496 Up to 4 memory channels can be configured, allowing 4 RGB or
2497 2 YCbCr framebuffers to be configured.
2498 52
2499config FB_SSD1307
2500 tristate "Solomon SSD1307 framebuffer support"
2501 depends on FB && I2C
2502 depends on OF
2503 depends on GPIOLIB
2504 select FB_SYS_FOPS
2505 select FB_SYS_FILLRECT
2506 select FB_SYS_COPYAREA
2507 select FB_SYS_IMAGEBLIT
2508 select FB_DEFERRED_IO
2509 select PWM
2510 help
2511 This driver implements support for the Solomon SSD1307
2512 OLED controller over I2C.
2513 53
2514endmenu 54endmenu
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 1be26fe10592..9ad3c17d6456 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -1,175 +1,11 @@
1# Makefile for the Linux video drivers.
2# 5 Aug 1999, James Simmons, <mailto:jsimmons@users.sf.net>
3# Rewritten to use lists instead of if-statements.
4
5# Each configuration option enables a list of files.
6
7obj-$(CONFIG_VGASTATE) += vgastate.o 1obj-$(CONFIG_VGASTATE) += vgastate.o
8obj-$(CONFIG_HDMI) += hdmi.o 2obj-$(CONFIG_HDMI) += hdmi.o
9obj-y += fb_notify.o
10obj-$(CONFIG_FB) += fb.o
11fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
12 modedb.o fbcvt.o
13fb-objs := $(fb-y)
14 3
15obj-$(CONFIG_VT) += console/ 4obj-$(CONFIG_VT) += console/
16obj-$(CONFIG_LOGO) += logo/ 5obj-$(CONFIG_LOGO) += logo/
17obj-y += backlight/ 6obj-y += backlight/
18 7
19obj-$(CONFIG_EXYNOS_VIDEO) += exynos/ 8obj-y += fbdev/
20
21obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o
22obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o
23obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o
24obj-$(CONFIG_FB_SYS_FILLRECT) += sysfillrect.o
25obj-$(CONFIG_FB_SYS_COPYAREA) += syscopyarea.o
26obj-$(CONFIG_FB_SYS_IMAGEBLIT) += sysimgblt.o
27obj-$(CONFIG_FB_SYS_FOPS) += fb_sys_fops.o
28obj-$(CONFIG_FB_SVGALIB) += svgalib.o
29obj-$(CONFIG_FB_MACMODES) += macmodes.o
30obj-$(CONFIG_FB_DDC) += fb_ddc.o
31obj-$(CONFIG_FB_DEFERRED_IO) += fb_defio.o
32obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
33
34# Hardware specific drivers go first
35obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
36obj-$(CONFIG_FB_ARC) += arcfb.o
37obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o
38obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o
39obj-$(CONFIG_FB_GRVGA) += grvga.o
40obj-$(CONFIG_FB_PM2) += pm2fb.o
41obj-$(CONFIG_FB_PM3) += pm3fb.o
42
43obj-$(CONFIG_FB_I740) += i740fb.o
44obj-$(CONFIG_FB_MATROX) += matrox/
45obj-$(CONFIG_FB_RIVA) += riva/
46obj-$(CONFIG_FB_NVIDIA) += nvidia/
47obj-$(CONFIG_FB_ATY) += aty/ macmodes.o
48obj-$(CONFIG_FB_ATY128) += aty/ macmodes.o
49obj-$(CONFIG_FB_RADEON) += aty/
50obj-$(CONFIG_FB_SIS) += sis/
51obj-$(CONFIG_FB_VIA) += via/
52obj-$(CONFIG_FB_KYRO) += kyro/
53obj-$(CONFIG_FB_SAVAGE) += savage/
54obj-$(CONFIG_FB_GEODE) += geode/
55obj-$(CONFIG_FB_MBX) += mbx/
56obj-$(CONFIG_FB_NEOMAGIC) += neofb.o
57obj-$(CONFIG_FB_3DFX) += tdfxfb.o
58obj-$(CONFIG_FB_CONTROL) += controlfb.o
59obj-$(CONFIG_FB_PLATINUM) += platinumfb.o
60obj-$(CONFIG_FB_VALKYRIE) += valkyriefb.o
61obj-$(CONFIG_FB_CT65550) += chipsfb.o
62obj-$(CONFIG_FB_IMSTT) += imsttfb.o
63obj-$(CONFIG_FB_FM2) += fm2fb.o
64obj-$(CONFIG_FB_VT8623) += vt8623fb.o
65obj-$(CONFIG_FB_TRIDENT) += tridentfb.o
66obj-$(CONFIG_FB_LE80578) += vermilion/
67obj-$(CONFIG_FB_S3) += s3fb.o
68obj-$(CONFIG_FB_ARK) += arkfb.o
69obj-$(CONFIG_FB_STI) += stifb.o
70obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o
71obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o
72obj-$(CONFIG_FB_CG3) += cg3.o sbuslib.o
73obj-$(CONFIG_FB_BW2) += bw2.o sbuslib.o
74obj-$(CONFIG_FB_CG14) += cg14.o sbuslib.o
75obj-$(CONFIG_FB_P9100) += p9100.o sbuslib.o
76obj-$(CONFIG_FB_TCX) += tcx.o sbuslib.o
77obj-$(CONFIG_FB_LEO) += leo.o sbuslib.o
78obj-$(CONFIG_FB_ACORN) += acornfb.o
79obj-$(CONFIG_FB_ATARI) += atafb.o c2p_iplan2.o atafb_mfb.o \
80 atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
81obj-$(CONFIG_FB_MAC) += macfb.o
82obj-$(CONFIG_FB_HECUBA) += hecubafb.o
83obj-$(CONFIG_FB_N411) += n411.o
84obj-$(CONFIG_FB_HGA) += hgafb.o
85obj-$(CONFIG_FB_XVR500) += sunxvr500.o
86obj-$(CONFIG_FB_XVR2500) += sunxvr2500.o
87obj-$(CONFIG_FB_XVR1000) += sunxvr1000.o
88obj-$(CONFIG_FB_IGA) += igafb.o
89obj-$(CONFIG_FB_APOLLO) += dnfb.o
90obj-$(CONFIG_FB_Q40) += q40fb.o
91obj-$(CONFIG_FB_TGA) += tgafb.o
92obj-$(CONFIG_FB_HP300) += hpfb.o
93obj-$(CONFIG_FB_G364) += g364fb.o
94obj-$(CONFIG_FB_EP93XX) += ep93xx-fb.o
95obj-$(CONFIG_FB_SA1100) += sa1100fb.o
96obj-$(CONFIG_FB_HIT) += hitfb.o
97obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
98obj-$(CONFIG_FB_PVR2) += pvr2fb.o
99obj-$(CONFIG_FB_VOODOO1) += sstfb.o
100obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
101obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o
102obj-$(CONFIG_FB_68328) += 68328fb.o
103obj-$(CONFIG_FB_GBE) += gbefb.o
104obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
105obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
106obj-$(CONFIG_FB_PXA) += pxafb.o
107obj-$(CONFIG_FB_PXA168) += pxa168fb.o
108obj-$(CONFIG_PXA3XX_GCU) += pxa3xx-gcu.o
109obj-$(CONFIG_MMP_DISP) += mmp/
110obj-$(CONFIG_FB_W100) += w100fb.o
111obj-$(CONFIG_FB_TMIO) += tmiofb.o
112obj-$(CONFIG_FB_AU1100) += au1100fb.o
113obj-$(CONFIG_FB_AU1200) += au1200fb.o
114obj-$(CONFIG_FB_VT8500) += vt8500lcdfb.o
115obj-$(CONFIG_FB_WM8505) += wm8505fb.o
116obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
117obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
118obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
119obj-$(CONFIG_FB_MAXINE) += maxinefb.o
120obj-$(CONFIG_FB_METRONOME) += metronomefb.o
121obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o
122obj-$(CONFIG_FB_AUO_K190X) += auo_k190x.o
123obj-$(CONFIG_FB_AUO_K1900) += auo_k1900fb.o
124obj-$(CONFIG_FB_AUO_K1901) += auo_k1901fb.o
125obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
126obj-$(CONFIG_FB_SH7760) += sh7760fb.o
127obj-$(CONFIG_FB_IMX) += imxfb.o
128obj-$(CONFIG_FB_S3C) += s3c-fb.o
129obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o
130obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o
131obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o
132obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
133obj-$(CONFIG_FB_PS3) += ps3fb.o
134obj-$(CONFIG_FB_SM501) += sm501fb.o
135obj-$(CONFIG_FB_UDL) += udlfb.o
136obj-$(CONFIG_FB_SMSCUFX) += smscufx.o
137obj-$(CONFIG_FB_XILINX) += xilinxfb.o
138obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
139obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
140obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o
141obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
142obj-$(CONFIG_FB_OMAP) += omap/
143obj-y += omap2/
144obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
145obj-$(CONFIG_FB_CARMINE) += carminefb.o
146obj-$(CONFIG_FB_MB862XX) += mb862xx/
147obj-$(CONFIG_FB_MSM) += msm/
148obj-$(CONFIG_FB_NUC900) += nuc900fb.o
149obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
150obj-$(CONFIG_FB_PUV3_UNIGFX) += fb-puv3.o
151obj-$(CONFIG_FB_HYPERV) += hyperv_fb.o
152obj-$(CONFIG_FB_OPENCORES) += ocfb.o
153
154# Platform or fallback drivers go here
155obj-$(CONFIG_FB_UVESA) += uvesafb.o
156obj-$(CONFIG_FB_VESA) += vesafb.o
157obj-$(CONFIG_FB_EFI) += efifb.o
158obj-$(CONFIG_FB_VGA16) += vga16fb.o
159obj-$(CONFIG_FB_OF) += offb.o
160obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
161obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
162obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
163obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
164obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
165obj-$(CONFIG_FB_MX3) += mx3fb.o
166obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
167obj-$(CONFIG_FB_MXS) += mxsfb.o
168obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o
169obj-$(CONFIG_FB_SIMPLE) += simplefb.o
170
171# the test framebuffer is last
172obj-$(CONFIG_FB_VIRTUAL) += vfb.o
173 9
174obj-$(CONFIG_VIDEOMODE_HELPERS) += display_timing.o videomode.o 10obj-$(CONFIG_VIDEOMODE_HELPERS) += display_timing.o videomode.o
175ifeq ($(CONFIG_OF),y) 11ifeq ($(CONFIG_OF),y)
diff --git a/drivers/video/console/sticon.c b/drivers/video/console/sticon.c
index 5f65ca3d8564..026fd1215933 100644
--- a/drivers/video/console/sticon.c
+++ b/drivers/video/console/sticon.c
@@ -46,7 +46,7 @@
46 46
47#include <asm/io.h> 47#include <asm/io.h>
48 48
49#include "../sticore.h" 49#include "../fbdev/sticore.h"
50 50
51/* switching to graphics mode */ 51/* switching to graphics mode */
52#define BLANK 0 52#define BLANK 0
diff --git a/drivers/video/console/sticore.c b/drivers/video/console/sticore.c
index cecd3de01c24..7da1ad03acb5 100644
--- a/drivers/video/console/sticore.c
+++ b/drivers/video/console/sticore.c
@@ -28,7 +28,7 @@
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/grfioctl.h> 29#include <asm/grfioctl.h>
30 30
31#include "../sticore.h" 31#include "../fbdev/sticore.h"
32 32
33#define STI_DRIVERVERSION "Version 0.9b" 33#define STI_DRIVERVERSION "Version 0.9b"
34 34
diff --git a/drivers/video/68328fb.c b/drivers/video/fbdev/68328fb.c
index 552258c8f99d..552258c8f99d 100644
--- a/drivers/video/68328fb.c
+++ b/drivers/video/fbdev/68328fb.c
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
new file mode 100644
index 000000000000..e1f47272fdea
--- /dev/null
+++ b/drivers/video/fbdev/Kconfig
@@ -0,0 +1,2474 @@
1#
2# fbdev configuration
3#
4
5menuconfig FB
6 tristate "Support for frame buffer devices"
7 ---help---
8 The frame buffer device provides an abstraction for the graphics
9 hardware. It represents the frame buffer of some video hardware and
10 allows application software to access the graphics hardware through
11 a well-defined interface, so the software doesn't need to know
12 anything about the low-level (hardware register) stuff.
13
14 Frame buffer devices work identically across the different
15 architectures supported by Linux and make the implementation of
16 application programs easier and more portable; at this point, an X
17 server exists which uses the frame buffer device exclusively.
18 On several non-X86 architectures, the frame buffer device is the
19 only way to use the graphics hardware.
20
21 The device is accessed through special device nodes, usually located
22 in the /dev directory, i.e. /dev/fb*.
23
24 You need an utility program called fbset to make full use of frame
25 buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
26 and the Framebuffer-HOWTO at
27 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
28 information.
29
30 Say Y here and to the driver for your graphics board below if you
31 are compiling a kernel for a non-x86 architecture.
32
33 If you are compiling for the x86 architecture, you can say Y if you
34 want to play with it, but it is not essential. Please note that
35 running graphical applications that directly touch the hardware
36 (e.g. an accelerated X server) and that are not frame buffer
37 device-aware may cause unexpected results. If unsure, say N.
38
39config FIRMWARE_EDID
40 bool "Enable firmware EDID"
41 depends on FB
42 default n
43 ---help---
44 This enables access to the EDID transferred from the firmware.
45 On the i386, this is from the Video BIOS. Enable this if DDC/I2C
46 transfers do not work for your driver and if you are using
47 nvidiafb, i810fb or savagefb.
48
49 In general, choosing Y for this option is safe. If you
50 experience extremely long delays while booting before you get
51 something on your display, try setting this to N. Matrox cards in
52 combination with certain motherboards and monitors are known to
53 suffer from this problem.
54
55config FB_DDC
56 tristate
57 depends on FB
58 select I2C_ALGOBIT
59 select I2C
60 default n
61
62config FB_BOOT_VESA_SUPPORT
63 bool
64 depends on FB
65 default n
66 ---help---
67 If true, at least one selected framebuffer driver can take advantage
68 of VESA video modes set at an early boot stage via the vga= parameter.
69
70config FB_CFB_FILLRECT
71 tristate
72 depends on FB
73 default n
74 ---help---
75 Include the cfb_fillrect function for generic software rectangle
76 filling. This is used by drivers that don't provide their own
77 (accelerated) version.
78
79config FB_CFB_COPYAREA
80 tristate
81 depends on FB
82 default n
83 ---help---
84 Include the cfb_copyarea function for generic software area copying.
85 This is used by drivers that don't provide their own (accelerated)
86 version.
87
88config FB_CFB_IMAGEBLIT
89 tristate
90 depends on FB
91 default n
92 ---help---
93 Include the cfb_imageblit function for generic software image
94 blitting. This is used by drivers that don't provide their own
95 (accelerated) version.
96
97config FB_CFB_REV_PIXELS_IN_BYTE
98 bool
99 depends on FB
100 default n
101 ---help---
102 Allow generic frame-buffer functions to work on displays with 1, 2
103 and 4 bits per pixel depths which has opposite order of pixels in
104 byte order to bytes in long order.
105
106config FB_SYS_FILLRECT
107 tristate
108 depends on FB
109 default n
110 ---help---
111 Include the sys_fillrect function for generic software rectangle
112 filling. This is used by drivers that don't provide their own
113 (accelerated) version and the framebuffer is in system RAM.
114
115config FB_SYS_COPYAREA
116 tristate
117 depends on FB
118 default n
119 ---help---
120 Include the sys_copyarea function for generic software area copying.
121 This is used by drivers that don't provide their own (accelerated)
122 version and the framebuffer is in system RAM.
123
124config FB_SYS_IMAGEBLIT
125 tristate
126 depends on FB
127 default n
128 ---help---
129 Include the sys_imageblit function for generic software image
130 blitting. This is used by drivers that don't provide their own
131 (accelerated) version and the framebuffer is in system RAM.
132
133menuconfig FB_FOREIGN_ENDIAN
134 bool "Framebuffer foreign endianness support"
135 depends on FB
136 ---help---
137 This menu will let you enable support for the framebuffers with
138 non-native endianness (e.g. Little-Endian framebuffer on a
139 Big-Endian machine). Most probably you don't have such hardware,
140 so it's safe to say "n" here.
141
142choice
143 prompt "Choice endianness support"
144 depends on FB_FOREIGN_ENDIAN
145
146config FB_BOTH_ENDIAN
147 bool "Support for Big- and Little-Endian framebuffers"
148
149config FB_BIG_ENDIAN
150 bool "Support for Big-Endian framebuffers only"
151
152config FB_LITTLE_ENDIAN
153 bool "Support for Little-Endian framebuffers only"
154
155endchoice
156
157config FB_SYS_FOPS
158 tristate
159 depends on FB
160 default n
161
162config FB_DEFERRED_IO
163 bool
164 depends on FB
165
166config FB_HECUBA
167 tristate
168 depends on FB
169 depends on FB_DEFERRED_IO
170
171config FB_SVGALIB
172 tristate
173 depends on FB
174 default n
175 ---help---
176 Common utility functions useful to fbdev drivers of VGA-based
177 cards.
178
179config FB_MACMODES
180 tristate
181 depends on FB
182 default n
183
184config FB_BACKLIGHT
185 bool
186 depends on FB
187 select BACKLIGHT_LCD_SUPPORT
188 select BACKLIGHT_CLASS_DEVICE
189 default n
190
191config FB_MODE_HELPERS
192 bool "Enable Video Mode Handling Helpers"
193 depends on FB
194 default n
195 ---help---
196 This enables functions for handling video modes using the
197 Generalized Timing Formula and the EDID parser. A few drivers rely
198 on this feature such as the radeonfb, rivafb, and the i810fb. If
199 your driver does not take advantage of this feature, choosing Y will
200 just increase the kernel size by about 5K.
201
202config FB_TILEBLITTING
203 bool "Enable Tile Blitting Support"
204 depends on FB
205 default n
206 ---help---
207 This enables tile blitting. Tile blitting is a drawing technique
208 where the screen is divided into rectangular sections (tiles), whereas
209 the standard blitting divides the screen into pixels. Because the
210 default drawing element is a tile, drawing functions will be passed
211 parameters in terms of number of tiles instead of number of pixels.
212 For example, to draw a single character, instead of using bitmaps,
213 an index to an array of bitmaps will be used. To clear or move a
214 rectangular section of a screen, the rectangle will be described in
215 terms of number of tiles in the x- and y-axis.
216
217 This is particularly important to one driver, matroxfb. If
218 unsure, say N.
219
220comment "Frame buffer hardware drivers"
221 depends on FB
222
223config FB_GRVGA
224 tristate "Aeroflex Gaisler framebuffer support"
225 depends on FB && SPARC
226 select FB_CFB_FILLRECT
227 select FB_CFB_COPYAREA
228 select FB_CFB_IMAGEBLIT
229 ---help---
230 This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler.
231
232config FB_CIRRUS
233 tristate "Cirrus Logic support"
234 depends on FB && (ZORRO || PCI)
235 select FB_CFB_FILLRECT
236 select FB_CFB_COPYAREA
237 select FB_CFB_IMAGEBLIT
238 ---help---
239 This enables support for Cirrus Logic GD542x/543x based boards on
240 Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum.
241
242 If you have a PCI-based system, this enables support for these
243 chips: GD-543x, GD-544x, GD-5480.
244
245 Please read the file <file:Documentation/fb/cirrusfb.txt>.
246
247 Say N unless you have such a graphics board or plan to get one
248 before you next recompile the kernel.
249
250config FB_PM2
251 tristate "Permedia2 support"
252 depends on FB && ((AMIGA && BROKEN) || PCI)
253 select FB_CFB_FILLRECT
254 select FB_CFB_COPYAREA
255 select FB_CFB_IMAGEBLIT
256 help
257 This is the frame buffer device driver for cards based on
258 the 3D Labs Permedia, Permedia 2 and Permedia 2V chips.
259 The driver was tested on the following cards:
260 Diamond FireGL 1000 PRO AGP
261 ELSA Gloria Synergy PCI
262 Appian Jeronimo PRO (both heads) PCI
263 3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI
264 Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC
265 ASK Graphic Blaster Exxtreme AGP
266
267 To compile this driver as a module, choose M here: the
268 module will be called pm2fb.
269
270config FB_PM2_FIFO_DISCONNECT
271 bool "enable FIFO disconnect feature"
272 depends on FB_PM2 && PCI
273 help
274 Support the Permedia2 FIFO disconnect feature.
275
276config FB_ARMCLCD
277 tristate "ARM PrimeCell PL110 support"
278 depends on ARM || ARM64 || COMPILE_TEST
279 depends on FB && ARM_AMBA
280 select FB_CFB_FILLRECT
281 select FB_CFB_COPYAREA
282 select FB_CFB_IMAGEBLIT
283 help
284 This framebuffer device driver is for the ARM PrimeCell PL110
285 Colour LCD controller. ARM PrimeCells provide the building
286 blocks for System on a Chip devices.
287
288 If you want to compile this as a module (=code which can be
289 inserted into and removed from the running kernel), say M
290 here and read <file:Documentation/kbuild/modules.txt>. The module
291 will be called amba-clcd.
292
293config FB_ACORN
294 bool "Acorn VIDC support"
295 depends on (FB = y) && ARM && ARCH_ACORN
296 select FB_CFB_FILLRECT
297 select FB_CFB_COPYAREA
298 select FB_CFB_IMAGEBLIT
299 help
300 This is the frame buffer device driver for the Acorn VIDC graphics
301 hardware found in Acorn RISC PCs and other ARM-based machines. If
302 unsure, say N.
303
304config FB_CLPS711X
305 bool "CLPS711X LCD support"
306 depends on (FB = y) && ARM && ARCH_CLPS711X
307 select FB_CFB_FILLRECT
308 select FB_CFB_COPYAREA
309 select FB_CFB_IMAGEBLIT
310 help
311 Say Y to enable the Framebuffer driver for the CLPS7111 and
312 EP7212 processors.
313
314config FB_SA1100
315 bool "SA-1100 LCD support"
316 depends on (FB = y) && ARM && ARCH_SA1100
317 select FB_CFB_FILLRECT
318 select FB_CFB_COPYAREA
319 select FB_CFB_IMAGEBLIT
320 help
321 This is a framebuffer device for the SA-1100 LCD Controller.
322 See <http://www.linux-fbdev.org/> for information on framebuffer
323 devices.
324
325 If you plan to use the LCD display with your SA-1100 system, say
326 Y here.
327
328config FB_IMX
329 tristate "Freescale i.MX1/21/25/27 LCD support"
330 depends on FB && ARCH_MXC
331 select BACKLIGHT_LCD_SUPPORT
332 select LCD_CLASS_DEVICE
333 select FB_CFB_FILLRECT
334 select FB_CFB_COPYAREA
335 select FB_CFB_IMAGEBLIT
336 select FB_MODE_HELPERS
337 select VIDEOMODE_HELPERS
338
339config FB_CYBER2000
340 tristate "CyberPro 2000/2010/5000 support"
341 depends on FB && PCI && (BROKEN || !SPARC64)
342 select FB_CFB_FILLRECT
343 select FB_CFB_COPYAREA
344 select FB_CFB_IMAGEBLIT
345 help
346 This enables support for the Integraphics CyberPro 20x0 and 5000
347 VGA chips used in the Rebel.com Netwinder and other machines.
348 Say Y if you have a NetWinder or a graphics card containing this
349 device, otherwise say N.
350
351config FB_CYBER2000_DDC
352 bool "DDC for CyberPro support"
353 depends on FB_CYBER2000
354 select FB_DDC
355 default y
356 help
357 Say Y here if you want DDC support for your CyberPro graphics
358 card. This is only I2C bus support, driver does not use EDID.
359
360config FB_CYBER2000_I2C
361 bool "CyberPro 2000/2010/5000 I2C support"
362 depends on FB_CYBER2000 && I2C && ARCH_NETWINDER
363 select I2C_ALGOBIT
364 help
365 Enable support for the I2C video decoder interface on the
366 Integraphics CyberPro 20x0 and 5000 VGA chips. This is used
367 on the Netwinder machines for the SAA7111 video capture.
368
369config FB_APOLLO
370 bool
371 depends on (FB = y) && APOLLO
372 default y
373 select FB_CFB_FILLRECT
374 select FB_CFB_IMAGEBLIT
375
376config FB_Q40
377 bool
378 depends on (FB = y) && Q40
379 default y
380 select FB_CFB_FILLRECT
381 select FB_CFB_COPYAREA
382 select FB_CFB_IMAGEBLIT
383
384config FB_AMIGA
385 tristate "Amiga native chipset support"
386 depends on FB && AMIGA
387 help
388 This is the frame buffer device driver for the builtin graphics
389 chipset found in Amigas.
390
391 To compile this driver as a module, choose M here: the
392 module will be called amifb.
393
394config FB_AMIGA_OCS
395 bool "Amiga OCS chipset support"
396 depends on FB_AMIGA
397 help
398 This enables support for the original Agnus and Denise video chips,
399 found in the Amiga 1000 and most A500's and A2000's. If you intend
400 to run Linux on any of these systems, say Y; otherwise say N.
401
402config FB_AMIGA_ECS
403 bool "Amiga ECS chipset support"
404 depends on FB_AMIGA
405 help
406 This enables support for the Enhanced Chip Set, found in later
407 A500's, later A2000's, the A600, the A3000, the A3000T and CDTV. If
408 you intend to run Linux on any of these systems, say Y; otherwise
409 say N.
410
411config FB_AMIGA_AGA
412 bool "Amiga AGA chipset support"
413 depends on FB_AMIGA
414 help
415 This enables support for the Advanced Graphics Architecture (also
416 known as the AGA or AA) Chip Set, found in the A1200, A4000, A4000T
417 and CD32. If you intend to run Linux on any of these systems, say Y;
418 otherwise say N.
419
420config FB_FM2
421 bool "Amiga FrameMaster II/Rainbow II support"
422 depends on (FB = y) && ZORRO
423 select FB_CFB_FILLRECT
424 select FB_CFB_COPYAREA
425 select FB_CFB_IMAGEBLIT
426 help
427 This is the frame buffer device driver for the Amiga FrameMaster
428 card from BSC (exhibited 1992 but not shipped as a CBM product).
429
430config FB_ARC
431 tristate "Arc Monochrome LCD board support"
432 depends on FB && X86
433 select FB_SYS_FILLRECT
434 select FB_SYS_COPYAREA
435 select FB_SYS_IMAGEBLIT
436 select FB_SYS_FOPS
437 help
438 This enables support for the Arc Monochrome LCD board. The board
439 is based on the KS-108 lcd controller and is typically a matrix
440 of 2*n chips. This driver was tested with a 128x64 panel. This
441 driver supports it for use with x86 SBCs through a 16 bit GPIO
442 interface (8 bit data, 8 bit control). If you anticipate using
443 this driver, say Y or M; otherwise say N. You must specify the
444 GPIO IO address to be used for setting control and data.
445
446config FB_ATARI
447 bool "Atari native chipset support"
448 depends on (FB = y) && ATARI
449 select FB_CFB_FILLRECT
450 select FB_CFB_COPYAREA
451 select FB_CFB_IMAGEBLIT
452 help
453 This is the frame buffer device driver for the builtin graphics
454 chipset found in Ataris.
455
456config FB_OF
457 bool "Open Firmware frame buffer device support"
458 depends on (FB = y) && (PPC64 || PPC_OF) && (!PPC_PSERIES || PCI)
459 select FB_CFB_FILLRECT
460 select FB_CFB_COPYAREA
461 select FB_CFB_IMAGEBLIT
462 select FB_MACMODES
463 help
464 Say Y if you want support with Open Firmware for your graphics
465 board.
466
467config FB_CONTROL
468 bool "Apple \"control\" display support"
469 depends on (FB = y) && PPC_PMAC && PPC32
470 select FB_CFB_FILLRECT
471 select FB_CFB_COPYAREA
472 select FB_CFB_IMAGEBLIT
473 select FB_MACMODES
474 help
475 This driver supports a frame buffer for the graphics adapter in the
476 Power Macintosh 7300 and others.
477
478config FB_PLATINUM
479 bool "Apple \"platinum\" display support"
480 depends on (FB = y) && PPC_PMAC && PPC32
481 select FB_CFB_FILLRECT
482 select FB_CFB_COPYAREA
483 select FB_CFB_IMAGEBLIT
484 select FB_MACMODES
485 help
486 This driver supports a frame buffer for the "platinum" graphics
487 adapter in some Power Macintoshes.
488
489config FB_VALKYRIE
490 bool "Apple \"valkyrie\" display support"
491 depends on (FB = y) && (MAC || (PPC_PMAC && PPC32))
492 select FB_CFB_FILLRECT
493 select FB_CFB_COPYAREA
494 select FB_CFB_IMAGEBLIT
495 select FB_MACMODES
496 help
497 This driver supports a frame buffer for the "valkyrie" graphics
498 adapter in some Power Macintoshes.
499
500config FB_CT65550
501 bool "Chips 65550 display support"
502 depends on (FB = y) && PPC32 && PCI
503 select FB_CFB_FILLRECT
504 select FB_CFB_COPYAREA
505 select FB_CFB_IMAGEBLIT
506 help
507 This is the frame buffer device driver for the Chips & Technologies
508 65550 graphics chip in PowerBooks.
509
510config FB_ASILIANT
511 bool "Asiliant (Chips) 69000 display support"
512 depends on (FB = y) && PCI
513 select FB_CFB_FILLRECT
514 select FB_CFB_COPYAREA
515 select FB_CFB_IMAGEBLIT
516 help
517 This is the frame buffer device driver for the Asiliant 69030 chipset
518
519config FB_IMSTT
520 bool "IMS Twin Turbo display support"
521 depends on (FB = y) && PCI
522 select FB_CFB_IMAGEBLIT
523 select FB_MACMODES if PPC
524 help
525 The IMS Twin Turbo is a PCI-based frame buffer card bundled with
526 many Macintosh and compatible computers.
527
528config FB_VGA16
529 tristate "VGA 16-color graphics support"
530 depends on FB && (X86 || PPC)
531 select FB_CFB_FILLRECT
532 select FB_CFB_COPYAREA
533 select FB_CFB_IMAGEBLIT
534 select VGASTATE
535 select FONT_8x16 if FRAMEBUFFER_CONSOLE
536 help
537 This is the frame buffer device driver for VGA 16 color graphic
538 cards. Say Y if you have such a card.
539
540 To compile this driver as a module, choose M here: the
541 module will be called vga16fb.
542
543config FB_BF54X_LQ043
544 tristate "SHARP LQ043 TFT LCD (BF548 EZKIT)"
545 depends on FB && (BF54x) && !BF542
546 select FB_CFB_FILLRECT
547 select FB_CFB_COPYAREA
548 select FB_CFB_IMAGEBLIT
549 help
550 This is the framebuffer device driver for a SHARP LQ043T1DG01 TFT LCD
551
552config FB_BFIN_T350MCQB
553 tristate "Varitronix COG-T350MCQB TFT LCD display (BF527 EZKIT)"
554 depends on FB && BLACKFIN
555 select BFIN_GPTIMERS
556 select FB_CFB_FILLRECT
557 select FB_CFB_COPYAREA
558 select FB_CFB_IMAGEBLIT
559 help
560 This is the framebuffer device driver for a Varitronix VL-PS-COG-T350MCQB-01 display TFT LCD
561 This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
562 It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
563
564config FB_BFIN_LQ035Q1
565 tristate "SHARP LQ035Q1DH02 TFT LCD"
566 depends on FB && BLACKFIN && SPI
567 select FB_CFB_FILLRECT
568 select FB_CFB_COPYAREA
569 select FB_CFB_IMAGEBLIT
570 select BFIN_GPTIMERS
571 help
572 This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
573 the Blackfin Landscape LCD EZ-Extender Card.
574 This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
575 It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
576
577 To compile this driver as a module, choose M here: the
578 module will be called bfin-lq035q1-fb.
579
580config FB_BF537_LQ035
581 tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
582 depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
583 select FB_CFB_FILLRECT
584 select FB_CFB_COPYAREA
585 select FB_CFB_IMAGEBLIT
586 select BFIN_GPTIMERS
587 help
588 This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
589 attached to a BF537.
590
591 To compile this driver as a module, choose M here: the
592 module will be called bf537-lq035.
593
594config FB_BFIN_7393
595 tristate "Blackfin ADV7393 Video encoder"
596 depends on FB && BLACKFIN
597 select I2C
598 select FB_CFB_FILLRECT
599 select FB_CFB_COPYAREA
600 select FB_CFB_IMAGEBLIT
601 help
602 This is the framebuffer device for a ADV7393 video encoder
603 attached to a Blackfin on the PPI port.
604 If your Blackfin board has a ADV7393 select Y.
605
606 To compile this driver as a module, choose M here: the
607 module will be called bfin_adv7393fb.
608
609choice
610 prompt "Video mode support"
611 depends on FB_BFIN_7393
612 default NTSC
613
614config NTSC
615 bool 'NTSC 720x480'
616
617config PAL
618 bool 'PAL 720x576'
619
620config NTSC_640x480
621 bool 'NTSC 640x480 (Experimental)'
622
623config PAL_640x480
624 bool 'PAL 640x480 (Experimental)'
625
626config NTSC_YCBCR
627 bool 'NTSC 720x480 YCbCR input'
628
629config PAL_YCBCR
630 bool 'PAL 720x576 YCbCR input'
631
632endchoice
633
634choice
635 prompt "Size of ADV7393 frame buffer memory Single/Double Size"
636 depends on (FB_BFIN_7393)
637 default ADV7393_1XMEM
638
639config ADV7393_1XMEM
640 bool 'Single'
641
642config ADV7393_2XMEM
643 bool 'Double'
644endchoice
645
646config FB_STI
647 tristate "HP STI frame buffer device support"
648 depends on FB && PARISC
649 select FB_CFB_FILLRECT
650 select FB_CFB_COPYAREA
651 select FB_CFB_IMAGEBLIT
652 select STI_CONSOLE
653 select VT
654 default y
655 ---help---
656 STI refers to the HP "Standard Text Interface" which is a set of
657 BIOS routines contained in a ROM chip in HP PA-RISC based machines.
658 Enabling this option will implement the linux framebuffer device
659 using calls to the STI BIOS routines for initialisation.
660
661 If you enable this option, you will get a planar framebuffer device
662 /dev/fb which will work on the most common HP graphic cards of the
663 NGLE family, including the artist chips (in the 7xx and Bxxx series),
664 HCRX, HCRX24, CRX, CRX24 and VisEG series.
665
666 It is safe to enable this option, so you should probably say "Y".
667
668config FB_MAC
669 bool "Generic Macintosh display support"
670 depends on (FB = y) && MAC
671 select FB_CFB_FILLRECT
672 select FB_CFB_COPYAREA
673 select FB_CFB_IMAGEBLIT
674 select FB_MACMODES
675
676config FB_HP300
677 bool
678 depends on (FB = y) && DIO
679 select FB_CFB_IMAGEBLIT
680 default y
681
682config FB_TGA
683 tristate "TGA/SFB+ framebuffer support"
684 depends on FB && (ALPHA || TC)
685 select FB_CFB_FILLRECT
686 select FB_CFB_COPYAREA
687 select FB_CFB_IMAGEBLIT
688 select BITREVERSE
689 ---help---
690 This is the frame buffer device driver for generic TGA and SFB+
691 graphic cards. These include DEC ZLXp-E1, -E2 and -E3 PCI cards,
692 also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3
693 TURBOchannel cards, also known as PMAGD-A, -B and -C.
694
695 Due to hardware limitations ZLX-E2 and E3 cards are not supported
696 for DECstation 5000/200 systems. Additionally due to firmware
697 limitations these cards may cause troubles with booting DECstation
698 5000/240 and /260 systems, but are fully supported under Linux if
699 you manage to get it going. ;-)
700
701 Say Y if you have one of those.
702
703config FB_UVESA
704 tristate "Userspace VESA VGA graphics support"
705 depends on FB && CONNECTOR
706 select FB_CFB_FILLRECT
707 select FB_CFB_COPYAREA
708 select FB_CFB_IMAGEBLIT
709 select FB_MODE_HELPERS
710 help
711 This is the frame buffer driver for generic VBE 2.0 compliant
712 graphic cards. It can also take advantage of VBE 3.0 features,
713 such as refresh rate adjustment.
714
715 This driver generally provides more features than vesafb but
716 requires a userspace helper application called 'v86d'. See
717 <file:Documentation/fb/uvesafb.txt> for more information.
718
719 If unsure, say N.
720
721config FB_VESA
722 bool "VESA VGA graphics support"
723 depends on (FB = y) && X86
724 select FB_CFB_FILLRECT
725 select FB_CFB_COPYAREA
726 select FB_CFB_IMAGEBLIT
727 select FB_BOOT_VESA_SUPPORT
728 help
729 This is the frame buffer device driver for generic VESA 2.0
730 compliant graphic cards. The older VESA 1.2 cards are not supported.
731 You will get a boot time penguin logo at no additional cost. Please
732 read <file:Documentation/fb/vesafb.txt>. If unsure, say Y.
733
734config FB_EFI
735 bool "EFI-based Framebuffer Support"
736 depends on (FB = y) && X86 && EFI
737 select FB_CFB_FILLRECT
738 select FB_CFB_COPYAREA
739 select FB_CFB_IMAGEBLIT
740 help
741 This is the EFI frame buffer device driver. If the firmware on
742 your platform is EFI 1.10 or UEFI 2.0, select Y to add support for
743 using the EFI framebuffer as your console.
744
745config FB_N411
746 tristate "N411 Apollo/Hecuba devkit support"
747 depends on FB && X86 && MMU
748 select FB_SYS_FILLRECT
749 select FB_SYS_COPYAREA
750 select FB_SYS_IMAGEBLIT
751 select FB_SYS_FOPS
752 select FB_DEFERRED_IO
753 select FB_HECUBA
754 help
755 This enables support for the Apollo display controller in its
756 Hecuba form using the n411 devkit.
757
758config FB_HGA
759 tristate "Hercules mono graphics support"
760 depends on FB && X86
761 help
762 Say Y here if you have a Hercules mono graphics card.
763
764 To compile this driver as a module, choose M here: the
765 module will be called hgafb.
766
767 As this card technology is at least 25 years old,
768 most people will answer N here.
769
770config FB_GBE
771 bool "SGI Graphics Backend frame buffer support"
772 depends on (FB = y) && SGI_IP32
773 select FB_CFB_FILLRECT
774 select FB_CFB_COPYAREA
775 select FB_CFB_IMAGEBLIT
776 help
777 This is the frame buffer device driver for SGI Graphics Backend.
778 This chip is used in SGI O2 and Visual Workstation 320/540.
779
780config FB_GBE_MEM
781 int "Video memory size in MB"
782 depends on FB_GBE
783 default 4
784 help
785 This is the amount of memory reserved for the framebuffer,
786 which can be any value between 1MB and 8MB.
787
788config FB_SBUS
789 bool "SBUS and UPA framebuffers"
790 depends on (FB = y) && SPARC
791 help
792 Say Y if you want support for SBUS or UPA based frame buffer device.
793
794config FB_BW2
795 bool "BWtwo support"
796 depends on (FB = y) && (SPARC && FB_SBUS)
797 select FB_CFB_FILLRECT
798 select FB_CFB_COPYAREA
799 select FB_CFB_IMAGEBLIT
800 help
801 This is the frame buffer device driver for the BWtwo frame buffer.
802
803config FB_CG3
804 bool "CGthree support"
805 depends on (FB = y) && (SPARC && FB_SBUS)
806 select FB_CFB_FILLRECT
807 select FB_CFB_COPYAREA
808 select FB_CFB_IMAGEBLIT
809 help
810 This is the frame buffer device driver for the CGthree frame buffer.
811
812config FB_CG6
813 bool "CGsix (GX,TurboGX) support"
814 depends on (FB = y) && (SPARC && FB_SBUS)
815 select FB_CFB_COPYAREA
816 select FB_CFB_IMAGEBLIT
817 help
818 This is the frame buffer device driver for the CGsix (GX, TurboGX)
819 frame buffer.
820
821config FB_FFB
822 bool "Creator/Creator3D/Elite3D support"
823 depends on FB_SBUS && SPARC64
824 select FB_CFB_COPYAREA
825 select FB_CFB_IMAGEBLIT
826 help
827 This is the frame buffer device driver for the Creator, Creator3D,
828 and Elite3D graphics boards.
829
830config FB_TCX
831 bool "TCX (SS4/SS5 only) support"
832 depends on FB_SBUS
833 select FB_CFB_FILLRECT
834 select FB_CFB_COPYAREA
835 select FB_CFB_IMAGEBLIT
836 help
837 This is the frame buffer device driver for the TCX 24/8bit frame
838 buffer.
839
840config FB_CG14
841 bool "CGfourteen (SX) support"
842 depends on FB_SBUS
843 select FB_CFB_FILLRECT
844 select FB_CFB_COPYAREA
845 select FB_CFB_IMAGEBLIT
846 help
847 This is the frame buffer device driver for the CGfourteen frame
848 buffer on Desktop SPARCsystems with the SX graphics option.
849
850config FB_P9100
851 bool "P9100 (Sparcbook 3 only) support"
852 depends on FB_SBUS
853 select FB_CFB_FILLRECT
854 select FB_CFB_COPYAREA
855 select FB_CFB_IMAGEBLIT
856 help
857 This is the frame buffer device driver for the P9100 card
858 supported on Sparcbook 3 machines.
859
860config FB_LEO
861 bool "Leo (ZX) support"
862 depends on FB_SBUS
863 select FB_CFB_FILLRECT
864 select FB_CFB_COPYAREA
865 select FB_CFB_IMAGEBLIT
866 help
867 This is the frame buffer device driver for the SBUS-based Sun ZX
868 (leo) frame buffer cards.
869
870config FB_IGA
871 bool "IGA 168x display support"
872 depends on (FB = y) && SPARC32
873 select FB_CFB_FILLRECT
874 select FB_CFB_COPYAREA
875 select FB_CFB_IMAGEBLIT
876 help
877 This is the framebuffer device for the INTERGRAPHICS 1680 and
878 successor frame buffer cards.
879
880config FB_XVR500
881 bool "Sun XVR-500 3DLABS Wildcat support"
882 depends on (FB = y) && PCI && SPARC64
883 select FB_CFB_FILLRECT
884 select FB_CFB_COPYAREA
885 select FB_CFB_IMAGEBLIT
886 help
887 This is the framebuffer device for the Sun XVR-500 and similar
888 graphics cards based upon the 3DLABS Wildcat chipset. The driver
889 only works on sparc64 systems where the system firmware has
890 mostly initialized the card already. It is treated as a
891 completely dumb framebuffer device.
892
893config FB_XVR2500
894 bool "Sun XVR-2500 3DLABS Wildcat support"
895 depends on (FB = y) && PCI && SPARC64
896 select FB_CFB_FILLRECT
897 select FB_CFB_COPYAREA
898 select FB_CFB_IMAGEBLIT
899 help
900 This is the framebuffer device for the Sun XVR-2500 and similar
901 graphics cards based upon the 3DLABS Wildcat chipset. The driver
902 only works on sparc64 systems where the system firmware has
903 mostly initialized the card already. It is treated as a
904 completely dumb framebuffer device.
905
906config FB_XVR1000
907 bool "Sun XVR-1000 support"
908 depends on (FB = y) && SPARC64
909 select FB_CFB_FILLRECT
910 select FB_CFB_COPYAREA
911 select FB_CFB_IMAGEBLIT
912 help
913 This is the framebuffer device for the Sun XVR-1000 and similar
914 graphics cards. The driver only works on sparc64 systems where
915 the system firmware has mostly initialized the card already. It
916 is treated as a completely dumb framebuffer device.
917
918config FB_PVR2
919 tristate "NEC PowerVR 2 display support"
920 depends on FB && SH_DREAMCAST
921 select FB_CFB_FILLRECT
922 select FB_CFB_COPYAREA
923 select FB_CFB_IMAGEBLIT
924 ---help---
925 Say Y here if you have a PowerVR 2 card in your box. If you plan to
926 run linux on your Dreamcast, you will have to say Y here.
927 This driver may or may not work on other PowerVR 2 cards, but is
928 totally untested. Use at your own risk. If unsure, say N.
929
930 To compile this driver as a module, choose M here: the
931 module will be called pvr2fb.
932
933 You can pass several parameters to the driver at boot time or at
934 module load time. The parameters look like "video=pvr2:XXX", where
935 the meaning of XXX can be found at the end of the main source file
936 (<file:drivers/video/pvr2fb.c>). Please see the file
937 <file:Documentation/fb/pvr2fb.txt>.
938
939config FB_OPENCORES
940 tristate "OpenCores VGA/LCD core 2.0 framebuffer support"
941 depends on FB && HAS_DMA
942 select FB_CFB_FILLRECT
943 select FB_CFB_COPYAREA
944 select FB_CFB_IMAGEBLIT
945 help
946 This enables support for the OpenCores VGA/LCD core.
947
948 The OpenCores VGA/LCD core is typically used together with
949 softcore CPUs (e.g. OpenRISC or Microblaze) or hard processor
950 systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
951
952 The source code and specification for the core is available at
953 <http://opencores.org/project,vga_lcd>
954
955config FB_S1D13XXX
956 tristate "Epson S1D13XXX framebuffer support"
957 depends on FB
958 select FB_CFB_FILLRECT
959 select FB_CFB_COPYAREA
960 select FB_CFB_IMAGEBLIT
961 help
962 Support for S1D13XXX framebuffer device family (currently only
963 working with S1D13806). Product specs at
964 <http://vdc.epson.com/>
965
966config FB_ATMEL
967 tristate "AT91/AT32 LCD Controller support"
968 depends on FB && HAVE_FB_ATMEL
969 select FB_CFB_FILLRECT
970 select FB_CFB_COPYAREA
971 select FB_CFB_IMAGEBLIT
972 select FB_MODE_HELPERS
973 select VIDEOMODE_HELPERS
974 help
975 This enables support for the AT91/AT32 LCD Controller.
976
977config FB_INTSRAM
978 bool "Frame Buffer in internal SRAM"
979 depends on FB_ATMEL && ARCH_AT91SAM9261
980 help
981 Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
982 to let frame buffer in external SDRAM.
983
984config FB_ATMEL_STN
985 bool "Use a STN display with AT91/AT32 LCD Controller"
986 depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
987 default n
988 help
989 Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
990 Controller. Say N if you want to connect a TFT.
991
992 If unsure, say N.
993
994config FB_NVIDIA
995 tristate "nVidia Framebuffer Support"
996 depends on FB && PCI
997 select FB_BACKLIGHT if FB_NVIDIA_BACKLIGHT
998 select FB_MODE_HELPERS
999 select FB_CFB_FILLRECT
1000 select FB_CFB_COPYAREA
1001 select FB_CFB_IMAGEBLIT
1002 select BITREVERSE
1003 select VGASTATE
1004 help
1005 This driver supports graphics boards with the nVidia chips, TNT
1006 and newer. For very old chipsets, such as the RIVA128, then use
1007 the rivafb.
1008 Say Y if you have such a graphics board.
1009
1010 To compile this driver as a module, choose M here: the
1011 module will be called nvidiafb.
1012
1013config FB_NVIDIA_I2C
1014 bool "Enable DDC Support"
1015 depends on FB_NVIDIA
1016 select FB_DDC
1017 help
1018 This enables I2C support for nVidia Chipsets. This is used
1019 only for getting EDID information from the attached display
1020 allowing for robust video mode handling and switching.
1021
1022 Because fbdev-2.6 requires that drivers must be able to
1023 independently validate video mode parameters, you should say Y
1024 here.
1025
1026config FB_NVIDIA_DEBUG
1027 bool "Lots of debug output"
1028 depends on FB_NVIDIA
1029 default n
1030 help
1031 Say Y here if you want the nVidia driver to output all sorts
1032 of debugging information to provide to the maintainer when
1033 something goes wrong.
1034
1035config FB_NVIDIA_BACKLIGHT
1036 bool "Support for backlight control"
1037 depends on FB_NVIDIA
1038 default y
1039 help
1040 Say Y here if you want to control the backlight of your display.
1041
1042config FB_RIVA
1043 tristate "nVidia Riva support"
1044 depends on FB && PCI
1045 select FB_BACKLIGHT if FB_RIVA_BACKLIGHT
1046 select FB_MODE_HELPERS
1047 select FB_CFB_FILLRECT
1048 select FB_CFB_COPYAREA
1049 select FB_CFB_IMAGEBLIT
1050 select BITREVERSE
1051 select VGASTATE
1052 help
1053 This driver supports graphics boards with the nVidia Riva/Geforce
1054 chips.
1055 Say Y if you have such a graphics board.
1056
1057 To compile this driver as a module, choose M here: the
1058 module will be called rivafb.
1059
1060config FB_RIVA_I2C
1061 bool "Enable DDC Support"
1062 depends on FB_RIVA
1063 select FB_DDC
1064 help
1065 This enables I2C support for nVidia Chipsets. This is used
1066 only for getting EDID information from the attached display
1067 allowing for robust video mode handling and switching.
1068
1069 Because fbdev-2.6 requires that drivers must be able to
1070 independently validate video mode parameters, you should say Y
1071 here.
1072
1073config FB_RIVA_DEBUG
1074 bool "Lots of debug output"
1075 depends on FB_RIVA
1076 default n
1077 help
1078 Say Y here if you want the Riva driver to output all sorts
1079 of debugging information to provide to the maintainer when
1080 something goes wrong.
1081
1082config FB_RIVA_BACKLIGHT
1083 bool "Support for backlight control"
1084 depends on FB_RIVA
1085 default y
1086 help
1087 Say Y here if you want to control the backlight of your display.
1088
1089config FB_I740
1090 tristate "Intel740 support"
1091 depends on FB && PCI
1092 select FB_MODE_HELPERS
1093 select FB_CFB_FILLRECT
1094 select FB_CFB_COPYAREA
1095 select FB_CFB_IMAGEBLIT
1096 select VGASTATE
1097 select FB_DDC
1098 help
1099 This driver supports graphics cards based on Intel740 chip.
1100
1101config FB_I810
1102 tristate "Intel 810/815 support"
1103 depends on FB && PCI && X86_32 && AGP_INTEL
1104 select FB_MODE_HELPERS
1105 select FB_CFB_FILLRECT
1106 select FB_CFB_COPYAREA
1107 select FB_CFB_IMAGEBLIT
1108 select VGASTATE
1109 help
1110 This driver supports the on-board graphics built in to the Intel 810
1111 and 815 chipsets. Say Y if you have and plan to use such a board.
1112
1113 To compile this driver as a module, choose M here: the
1114 module will be called i810fb.
1115
1116 For more information, please read
1117 <file:Documentation/fb/intel810.txt>
1118
1119config FB_I810_GTF
1120 bool "use VESA Generalized Timing Formula"
1121 depends on FB_I810
1122 help
1123 If you say Y, then the VESA standard, Generalized Timing Formula
1124 or GTF, will be used to calculate the required video timing values
1125 per video mode. Since the GTF allows nondiscrete timings
1126 (nondiscrete being a range of values as opposed to discrete being a
1127 set of values), you'll be able to use any combination of horizontal
1128 and vertical resolutions, and vertical refresh rates without having
1129 to specify your own timing parameters. This is especially useful
1130 to maximize the performance of an aging display, or if you just
1131 have a display with nonstandard dimensions. A VESA compliant
1132 monitor is recommended, but can still work with non-compliant ones.
1133 If you need or want this, then select this option. The timings may
1134 not be compliant with Intel's recommended values. Use at your own
1135 risk.
1136
1137 If you say N, the driver will revert to discrete video timings
1138 using a set recommended by Intel in their documentation.
1139
1140 If unsure, say N.
1141
1142config FB_I810_I2C
1143 bool "Enable DDC Support"
1144 depends on FB_I810 && FB_I810_GTF
1145 select FB_DDC
1146 help
1147
1148config FB_LE80578
1149 tristate "Intel LE80578 (Vermilion) support"
1150 depends on FB && PCI && X86
1151 select FB_MODE_HELPERS
1152 select FB_CFB_FILLRECT
1153 select FB_CFB_COPYAREA
1154 select FB_CFB_IMAGEBLIT
1155 help
1156 This driver supports the LE80578 (Vermilion Range) chipset
1157
1158config FB_CARILLO_RANCH
1159 tristate "Intel Carillo Ranch support"
1160 depends on FB_LE80578 && FB && PCI && X86
1161 help
1162 This driver supports the LE80578 (Carillo Ranch) board
1163
1164config FB_INTEL
1165 tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support"
1166 depends on FB && PCI && X86 && AGP_INTEL && EXPERT
1167 select FB_MODE_HELPERS
1168 select FB_CFB_FILLRECT
1169 select FB_CFB_COPYAREA
1170 select FB_CFB_IMAGEBLIT
1171 select FB_BOOT_VESA_SUPPORT if FB_INTEL = y
1172 depends on !DRM_I915
1173 help
1174 This driver supports the on-board graphics built in to the Intel
1175 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
1176 Say Y if you have and plan to use such a board.
1177
1178 To make FB_INTELFB=Y work you need to say AGP_INTEL=y too.
1179
1180 To compile this driver as a module, choose M here: the
1181 module will be called intelfb.
1182
1183 For more information, please read <file:Documentation/fb/intelfb.txt>
1184
1185config FB_INTEL_DEBUG
1186 bool "Intel driver Debug Messages"
1187 depends on FB_INTEL
1188 ---help---
1189 Say Y here if you want the Intel driver to output all sorts
1190 of debugging information to provide to the maintainer when
1191 something goes wrong.
1192
1193config FB_INTEL_I2C
1194 bool "DDC/I2C for Intel framebuffer support"
1195 depends on FB_INTEL
1196 select FB_DDC
1197 default y
1198 help
1199 Say Y here if you want DDC/I2C support for your on-board Intel graphics.
1200
1201config FB_MATROX
1202 tristate "Matrox acceleration"
1203 depends on FB && PCI
1204 select FB_CFB_FILLRECT
1205 select FB_CFB_COPYAREA
1206 select FB_CFB_IMAGEBLIT
1207 select FB_TILEBLITTING
1208 select FB_MACMODES if PPC_PMAC
1209 ---help---
1210 Say Y here if you have a Matrox Millennium, Matrox Millennium II,
1211 Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox
1212 Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video,
1213 Matrox G400, G450 or G550 card in your box.
1214
1215 To compile this driver as a module, choose M here: the
1216 module will be called matroxfb.
1217
1218 You can pass several parameters to the driver at boot time or at
1219 module load time. The parameters look like "video=matroxfb:XXX", and
1220 are described in <file:Documentation/fb/matroxfb.txt>.
1221
1222config FB_MATROX_MILLENIUM
1223 bool "Millennium I/II support"
1224 depends on FB_MATROX
1225 help
1226 Say Y here if you have a Matrox Millennium or Matrox Millennium II
1227 video card. If you select "Advanced lowlevel driver options" below,
1228 you should check 4 bpp packed pixel, 8 bpp packed pixel, 16 bpp
1229 packed pixel, 24 bpp packed pixel and 32 bpp packed pixel. You can
1230 also use font widths different from 8.
1231
1232config FB_MATROX_MYSTIQUE
1233 bool "Mystique support"
1234 depends on FB_MATROX
1235 help
1236 Say Y here if you have a Matrox Mystique or Matrox Mystique 220
1237 video card. If you select "Advanced lowlevel driver options" below,
1238 you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp
1239 packed pixel and 32 bpp packed pixel. You can also use font widths
1240 different from 8.
1241
1242config FB_MATROX_G
1243 bool "G100/G200/G400/G450/G550 support"
1244 depends on FB_MATROX
1245 ---help---
1246 Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based
1247 video card. If you select "Advanced lowlevel driver options", you
1248 should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed
1249 pixel and 32 bpp packed pixel. You can also use font widths
1250 different from 8.
1251
1252 If you need support for G400 secondary head, you must say Y to
1253 "Matrox I2C support" and "G400 second head support" right below.
1254 G450/G550 secondary head and digital output are supported without
1255 additional modules.
1256
1257 The driver starts in monitor mode. You must use the matroxset tool
1258 (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to
1259 swap primary and secondary head outputs, or to change output mode.
1260 Secondary head driver always start in 640x480 resolution and you
1261 must use fbset to change it.
1262
1263 Do not forget that second head supports only 16 and 32 bpp
1264 packed pixels, so it is a good idea to compile them into the kernel
1265 too. You can use only some font widths, as the driver uses generic
1266 painting procedures (the secondary head does not use acceleration
1267 engine).
1268
1269 G450/G550 hardware can display TV picture only from secondary CRTC,
1270 and it performs no scaling, so picture must have 525 or 625 lines.
1271
1272config FB_MATROX_I2C
1273 tristate "Matrox I2C support"
1274 depends on FB_MATROX
1275 select FB_DDC
1276 ---help---
1277 This drivers creates I2C buses which are needed for accessing the
1278 DDC (I2C) bus present on all Matroxes, an I2C bus which
1279 interconnects Matrox optional devices, like MGA-TVO on G200 and
1280 G400, and the secondary head DDC bus, present on G400 only.
1281
1282 You can say Y or M here if you want to experiment with monitor
1283 detection code. You must say Y or M here if you want to use either
1284 second head of G400 or MGA-TVO on G200 or G400.
1285
1286 If you compile it as module, it will create a module named
1287 i2c-matroxfb.
1288
1289config FB_MATROX_MAVEN
1290 tristate "G400 second head support"
1291 depends on FB_MATROX_G && FB_MATROX_I2C
1292 ---help---
1293 WARNING !!! This support does not work with G450 !!!
1294
1295 Say Y or M here if you want to use a secondary head (meaning two
1296 monitors in parallel) on G400 or MGA-TVO add-on on G200. Secondary
1297 head is not compatible with accelerated XFree 3.3.x SVGA servers -
1298 secondary head output is blanked while you are in X. With XFree
1299 3.9.17 preview you can use both heads if you use SVGA over fbdev or
1300 the fbdev driver on first head and the fbdev driver on second head.
1301
1302 If you compile it as module, two modules are created,
1303 matroxfb_crtc2 and matroxfb_maven. Matroxfb_maven is needed for
1304 both G200 and G400, matroxfb_crtc2 is needed only by G400. You must
1305 also load i2c-matroxfb to get it to run.
1306
1307 The driver starts in monitor mode and you must use the matroxset
1308 tool (available at
1309 <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to switch it to
1310 PAL or NTSC or to swap primary and secondary head outputs.
1311 Secondary head driver also always start in 640x480 resolution, you
1312 must use fbset to change it.
1313
1314 Also do not forget that second head supports only 16 and 32 bpp
1315 packed pixels, so it is a good idea to compile them into the kernel
1316 too. You can use only some font widths, as the driver uses generic
1317 painting procedures (the secondary head does not use acceleration
1318 engine).
1319
1320config FB_RADEON
1321 tristate "ATI Radeon display support"
1322 depends on FB && PCI
1323 select FB_BACKLIGHT if FB_RADEON_BACKLIGHT
1324 select FB_MODE_HELPERS
1325 select FB_CFB_FILLRECT
1326 select FB_CFB_COPYAREA
1327 select FB_CFB_IMAGEBLIT
1328 select FB_MACMODES if PPC_OF
1329 help
1330 Choose this option if you want to use an ATI Radeon graphics card as
1331 a framebuffer device. There are both PCI and AGP versions. You
1332 don't need to choose this to run the Radeon in plain VGA mode.
1333
1334 There is a product page at
1335 http://products.amd.com/en-us/GraphicCardResult.aspx
1336
1337config FB_RADEON_I2C
1338 bool "DDC/I2C for ATI Radeon support"
1339 depends on FB_RADEON
1340 select FB_DDC
1341 default y
1342 help
1343 Say Y here if you want DDC/I2C support for your Radeon board.
1344
1345config FB_RADEON_BACKLIGHT
1346 bool "Support for backlight control"
1347 depends on FB_RADEON
1348 default y
1349 help
1350 Say Y here if you want to control the backlight of your display.
1351
1352config FB_RADEON_DEBUG
1353 bool "Lots of debug output from Radeon driver"
1354 depends on FB_RADEON
1355 default n
1356 help
1357 Say Y here if you want the Radeon driver to output all sorts
1358 of debugging information to provide to the maintainer when
1359 something goes wrong.
1360
1361config FB_ATY128
1362 tristate "ATI Rage128 display support"
1363 depends on FB && PCI
1364 select FB_CFB_FILLRECT
1365 select FB_CFB_COPYAREA
1366 select FB_CFB_IMAGEBLIT
1367 select FB_BACKLIGHT if FB_ATY128_BACKLIGHT
1368 select FB_MACMODES if PPC_PMAC
1369 help
1370 This driver supports graphics boards with the ATI Rage128 chips.
1371 Say Y if you have such a graphics board and read
1372 <file:Documentation/fb/aty128fb.txt>.
1373
1374 To compile this driver as a module, choose M here: the
1375 module will be called aty128fb.
1376
1377config FB_ATY128_BACKLIGHT
1378 bool "Support for backlight control"
1379 depends on FB_ATY128
1380 default y
1381 help
1382 Say Y here if you want to control the backlight of your display.
1383
1384config FB_ATY
1385 tristate "ATI Mach64 display support" if PCI || ATARI
1386 depends on FB && !SPARC32
1387 select FB_CFB_FILLRECT
1388 select FB_CFB_COPYAREA
1389 select FB_CFB_IMAGEBLIT
1390 select FB_BACKLIGHT if FB_ATY_BACKLIGHT
1391 select FB_MACMODES if PPC
1392 help
1393 This driver supports graphics boards with the ATI Mach64 chips.
1394 Say Y if you have such a graphics board.
1395
1396 To compile this driver as a module, choose M here: the
1397 module will be called atyfb.
1398
1399config FB_ATY_CT
1400 bool "Mach64 CT/VT/GT/LT (incl. 3D RAGE) support"
1401 depends on PCI && FB_ATY
1402 default y if SPARC64 && PCI
1403 help
1404 Say Y here to support use of ATI's 64-bit Rage boards (or other
1405 boards based on the Mach64 CT, VT, GT, and LT chipsets) as a
1406 framebuffer device. The ATI product support page for these boards
1407 is at <http://support.ati.com/products/pc/mach64/mach64.html>.
1408
1409config FB_ATY_GENERIC_LCD
1410 bool "Mach64 generic LCD support"
1411 depends on FB_ATY_CT
1412 help
1413 Say Y if you have a laptop with an ATI Rage LT PRO, Rage Mobility,
1414 Rage XC, or Rage XL chipset.
1415
1416config FB_ATY_GX
1417 bool "Mach64 GX support" if PCI
1418 depends on FB_ATY
1419 default y if ATARI
1420 help
1421 Say Y here to support use of the ATI Mach64 Graphics Expression
1422 board (or other boards based on the Mach64 GX chipset) as a
1423 framebuffer device. The ATI product support page for these boards
1424 is at
1425 <http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
1426
1427config FB_ATY_BACKLIGHT
1428 bool "Support for backlight control"
1429 depends on FB_ATY
1430 default y
1431 help
1432 Say Y here if you want to control the backlight of your display.
1433
1434config FB_S3
1435 tristate "S3 Trio/Virge support"
1436 depends on FB && PCI
1437 select FB_CFB_FILLRECT
1438 select FB_CFB_COPYAREA
1439 select FB_CFB_IMAGEBLIT
1440 select FB_TILEBLITTING
1441 select FB_SVGALIB
1442 select VGASTATE
1443 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1444 ---help---
1445 Driver for graphics boards with S3 Trio / S3 Virge chip.
1446
1447config FB_S3_DDC
1448 bool "DDC for S3 support"
1449 depends on FB_S3
1450 select FB_DDC
1451 default y
1452 help
1453 Say Y here if you want DDC support for your S3 graphics card.
1454
1455config FB_SAVAGE
1456 tristate "S3 Savage support"
1457 depends on FB && PCI
1458 select FB_MODE_HELPERS
1459 select FB_CFB_FILLRECT
1460 select FB_CFB_COPYAREA
1461 select FB_CFB_IMAGEBLIT
1462 select VGASTATE
1463 help
1464 This driver supports notebooks and computers with S3 Savage PCI/AGP
1465 chips.
1466
1467 Say Y if you have such a graphics card.
1468
1469 To compile this driver as a module, choose M here; the module
1470 will be called savagefb.
1471
1472config FB_SAVAGE_I2C
1473 bool "Enable DDC2 Support"
1474 depends on FB_SAVAGE
1475 select FB_DDC
1476 help
1477 This enables I2C support for S3 Savage Chipsets. This is used
1478 only for getting EDID information from the attached display
1479 allowing for robust video mode handling and switching.
1480
1481 Because fbdev-2.6 requires that drivers must be able to
1482 independently validate video mode parameters, you should say Y
1483 here.
1484
1485config FB_SAVAGE_ACCEL
1486 bool "Enable Console Acceleration"
1487 depends on FB_SAVAGE
1488 default n
1489 help
1490 This option will compile in console acceleration support. If
1491 the resulting framebuffer console has bothersome glitches, then
1492 choose N here.
1493
1494config FB_SIS
1495 tristate "SiS/XGI display support"
1496 depends on FB && PCI
1497 select FB_CFB_FILLRECT
1498 select FB_CFB_COPYAREA
1499 select FB_CFB_IMAGEBLIT
1500 select FB_BOOT_VESA_SUPPORT if FB_SIS = y
1501 help
1502 This is the frame buffer device driver for the SiS 300, 315, 330
1503 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
1504 Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
1505
1506 To compile this driver as a module, choose M here; the module
1507 will be called sisfb.
1508
1509config FB_SIS_300
1510 bool "SiS 300 series support"
1511 depends on FB_SIS
1512 help
1513 Say Y here to support use of the SiS 300/305, 540, 630 and 730.
1514
1515config FB_SIS_315
1516 bool "SiS 315/330/340 series and XGI support"
1517 depends on FB_SIS
1518 help
1519 Say Y here to support use of the SiS 315, 330 and 340 series
1520 (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
1521 as XGI V3XT, V5, V8 and Z7.
1522
1523config FB_VIA
1524 tristate "VIA UniChrome (Pro) and Chrome9 display support"
1525 depends on FB && PCI && X86
1526 select FB_CFB_FILLRECT
1527 select FB_CFB_COPYAREA
1528 select FB_CFB_IMAGEBLIT
1529 select I2C_ALGOBIT
1530 select I2C
1531 select GPIOLIB
1532 help
1533 This is the frame buffer device driver for Graphics chips of VIA
1534 UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/
1535 CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896
1536 /P4M900,VX800)
1537 Say Y if you have a VIA UniChrome graphics board.
1538
1539 To compile this driver as a module, choose M here: the
1540 module will be called viafb.
1541
1542if FB_VIA
1543
1544config FB_VIA_DIRECT_PROCFS
1545 bool "direct hardware access via procfs (DEPRECATED)(DANGEROUS)"
1546 depends on FB_VIA
1547 default n
1548 help
1549 Allow direct hardware access to some output registers via procfs.
1550 This is dangerous but may provide the only chance to get the
1551 correct output device configuration.
1552 Its use is strongly discouraged.
1553
1554config FB_VIA_X_COMPATIBILITY
1555 bool "X server compatibility"
1556 depends on FB_VIA
1557 default n
1558 help
1559 This option reduces the functionality (power saving, ...) of the
1560 framebuffer to avoid negative impact on the OpenChrome X server.
1561 If you use any X server other than fbdev you should enable this
1562 otherwise it should be safe to disable it and allow using all
1563 features.
1564
1565endif
1566
1567config FB_NEOMAGIC
1568 tristate "NeoMagic display support"
1569 depends on FB && PCI
1570 select FB_MODE_HELPERS
1571 select FB_CFB_FILLRECT
1572 select FB_CFB_COPYAREA
1573 select FB_CFB_IMAGEBLIT
1574 select VGASTATE
1575 help
1576 This driver supports notebooks with NeoMagic PCI chips.
1577 Say Y if you have such a graphics card.
1578
1579 To compile this driver as a module, choose M here: the
1580 module will be called neofb.
1581
1582config FB_KYRO
1583 tristate "IMG Kyro support"
1584 depends on FB && PCI
1585 select FB_CFB_FILLRECT
1586 select FB_CFB_COPYAREA
1587 select FB_CFB_IMAGEBLIT
1588 help
1589 Say Y here if you have a STG4000 / Kyro / PowerVR 3 based
1590 graphics board.
1591
1592 To compile this driver as a module, choose M here: the
1593 module will be called kyrofb.
1594
1595config FB_3DFX
1596 tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
1597 depends on FB && PCI
1598 select FB_CFB_IMAGEBLIT
1599 select FB_CFB_FILLRECT
1600 select FB_CFB_COPYAREA
1601 select FB_MODE_HELPERS
1602 help
1603 This driver supports graphics boards with the 3Dfx Banshee,
1604 Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have
1605 such a graphics board.
1606
1607 To compile this driver as a module, choose M here: the
1608 module will be called tdfxfb.
1609
1610config FB_3DFX_ACCEL
1611 bool "3Dfx Acceleration functions"
1612 depends on FB_3DFX
1613 ---help---
1614 This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
1615 device driver with acceleration functions.
1616
1617config FB_3DFX_I2C
1618 bool "Enable DDC/I2C support"
1619 depends on FB_3DFX
1620 select FB_DDC
1621 default y
1622 help
1623 Say Y here if you want DDC/I2C support for your 3dfx Voodoo3.
1624
1625config FB_VOODOO1
1626 tristate "3Dfx Voodoo Graphics (sst1) support"
1627 depends on FB && PCI
1628 select FB_CFB_FILLRECT
1629 select FB_CFB_COPYAREA
1630 select FB_CFB_IMAGEBLIT
1631 ---help---
1632 Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or
1633 Voodoo2 (cvg) based graphics card.
1634
1635 To compile this driver as a module, choose M here: the
1636 module will be called sstfb.
1637
1638 WARNING: Do not use any application that uses the 3D engine
1639 (namely glide) while using this driver.
1640 Please read the <file:Documentation/fb/sstfb.txt> for supported
1641 options and other important info support.
1642
1643config FB_VT8623
1644 tristate "VIA VT8623 support"
1645 depends on FB && PCI
1646 select FB_CFB_FILLRECT
1647 select FB_CFB_COPYAREA
1648 select FB_CFB_IMAGEBLIT
1649 select FB_TILEBLITTING
1650 select FB_SVGALIB
1651 select VGASTATE
1652 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1653 ---help---
1654 Driver for CastleRock integrated graphics core in the
1655 VIA VT8623 [Apollo CLE266] chipset.
1656
1657config FB_TRIDENT
1658 tristate "Trident/CyberXXX/CyberBlade support"
1659 depends on FB && PCI
1660 select FB_CFB_FILLRECT
1661 select FB_CFB_COPYAREA
1662 select FB_CFB_IMAGEBLIT
1663 ---help---
1664 This is the frame buffer device driver for Trident PCI/AGP chipsets.
1665 Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D
1666 and Blade XP.
1667 There are also integrated versions of these chips called CyberXXXX,
1668 CyberImage or CyberBlade. These chips are mostly found in laptops
1669 but also on some motherboards including early VIA EPIA motherboards.
1670 For more information, read <file:Documentation/fb/tridentfb.txt>
1671
1672 Say Y if you have such a graphics board.
1673
1674 To compile this driver as a module, choose M here: the
1675 module will be called tridentfb.
1676
1677config FB_ARK
1678 tristate "ARK 2000PV support"
1679 depends on FB && PCI
1680 select FB_CFB_FILLRECT
1681 select FB_CFB_COPYAREA
1682 select FB_CFB_IMAGEBLIT
1683 select FB_TILEBLITTING
1684 select FB_SVGALIB
1685 select VGASTATE
1686 select FONT_8x16 if FRAMEBUFFER_CONSOLE
1687 ---help---
1688 Driver for PCI graphics boards with ARK 2000PV chip
1689 and ICS 5342 RAMDAC.
1690
1691config FB_PM3
1692 tristate "Permedia3 support"
1693 depends on FB && PCI
1694 select FB_CFB_FILLRECT
1695 select FB_CFB_COPYAREA
1696 select FB_CFB_IMAGEBLIT
1697 help
1698 This is the frame buffer device driver for the 3DLabs Permedia3
1699 chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
1700 similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
1701 and maybe other boards.
1702
1703config FB_CARMINE
1704 tristate "Fujitsu carmine frame buffer support"
1705 depends on FB && PCI
1706 select FB_CFB_FILLRECT
1707 select FB_CFB_COPYAREA
1708 select FB_CFB_IMAGEBLIT
1709 help
1710 This is the frame buffer device driver for the Fujitsu Carmine chip.
1711 The driver provides two independent frame buffer devices.
1712
1713choice
1714 depends on FB_CARMINE
1715 prompt "DRAM timing"
1716 default FB_CARMINE_DRAM_EVAL
1717
1718config FB_CARMINE_DRAM_EVAL
1719 bool "Eval board timings"
1720 help
1721 Use timings which work on the eval card.
1722
1723config CARMINE_DRAM_CUSTOM
1724 bool "Custom board timings"
1725 help
1726 Use custom board timings.
1727endchoice
1728
1729config FB_AU1100
1730 bool "Au1100 LCD Driver"
1731 depends on (FB = y) && MIPS_ALCHEMY
1732 select FB_CFB_FILLRECT
1733 select FB_CFB_COPYAREA
1734 select FB_CFB_IMAGEBLIT
1735 help
1736 This is the framebuffer driver for the AMD Au1100 SOC. It can drive
1737 various panels and CRTs by passing in kernel cmd line option
1738 au1100fb:panel=<name>.
1739
1740config FB_AU1200
1741 bool "Au1200/Au1300 LCD Driver"
1742 depends on (FB = y) && MIPS_ALCHEMY
1743 select FB_SYS_FILLRECT
1744 select FB_SYS_COPYAREA
1745 select FB_SYS_IMAGEBLIT
1746 select FB_SYS_FOPS
1747 help
1748 This is the framebuffer driver for the Au1200/Au1300 SOCs.
1749 It can drive various panels and CRTs by passing in kernel cmd line
1750 option au1200fb:panel=<name>.
1751
1752config FB_VT8500
1753 bool "VIA VT8500 framebuffer support"
1754 depends on (FB = y) && ARM && ARCH_VT8500
1755 select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
1756 select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
1757 select FB_SYS_IMAGEBLIT
1758 select FB_MODE_HELPERS
1759 select VIDEOMODE_HELPERS
1760 help
1761 This is the framebuffer driver for VIA VT8500 integrated LCD
1762 controller.
1763
1764config FB_WM8505
1765 bool "Wondermedia WM8xxx-series frame buffer support"
1766 depends on (FB = y) && ARM && ARCH_VT8500
1767 select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
1768 select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
1769 select FB_SYS_IMAGEBLIT
1770 select FB_MODE_HELPERS
1771 select VIDEOMODE_HELPERS
1772 help
1773 This is the framebuffer driver for WonderMedia WM8xxx-series
1774 integrated LCD controller. This driver covers the WM8505, WM8650
1775 and WM8850 SoCs.
1776
1777config FB_WMT_GE_ROPS
1778 bool "VT8500/WM8xxx accelerated raster ops support"
1779 depends on (FB = y) && (FB_VT8500 || FB_WM8505)
1780 default n
1781 help
1782 This adds support for accelerated raster operations on the
1783 VIA VT8500 and Wondermedia 85xx series SoCs.
1784
1785source "drivers/video/fbdev/geode/Kconfig"
1786
1787config FB_HIT
1788 tristate "HD64461 Frame Buffer support"
1789 depends on FB && HD64461
1790 select FB_CFB_FILLRECT
1791 select FB_CFB_COPYAREA
1792 select FB_CFB_IMAGEBLIT
1793 help
1794 This is the frame buffer device driver for the Hitachi HD64461 LCD
1795 frame buffer card.
1796
1797config FB_PMAG_AA
1798 bool "PMAG-AA TURBOchannel framebuffer support"
1799 depends on (FB = y) && TC
1800 select FB_CFB_FILLRECT
1801 select FB_CFB_COPYAREA
1802 select FB_CFB_IMAGEBLIT
1803 help
1804 Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1)
1805 used mainly in the MIPS-based DECstation series.
1806
1807config FB_PMAG_BA
1808 tristate "PMAG-BA TURBOchannel framebuffer support"
1809 depends on FB && TC
1810 select FB_CFB_FILLRECT
1811 select FB_CFB_COPYAREA
1812 select FB_CFB_IMAGEBLIT
1813 help
1814 Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8)
1815 used mainly in the MIPS-based DECstation series.
1816
1817config FB_PMAGB_B
1818 tristate "PMAGB-B TURBOchannel framebuffer support"
1819 depends on FB && TC
1820 select FB_CFB_FILLRECT
1821 select FB_CFB_COPYAREA
1822 select FB_CFB_IMAGEBLIT
1823 help
1824 Support for the PMAGB-B TURBOchannel framebuffer card used mainly
1825 in the MIPS-based DECstation series. The card is currently only
1826 supported in 1280x1024x8 mode.
1827
1828config FB_MAXINE
1829 bool "Maxine (Personal DECstation) onboard framebuffer support"
1830 depends on (FB = y) && MACH_DECSTATION
1831 select FB_CFB_FILLRECT
1832 select FB_CFB_COPYAREA
1833 select FB_CFB_IMAGEBLIT
1834 help
1835 Support for the onboard framebuffer (1024x768x8) in the Personal
1836 DECstation series (Personal DECstation 5000/20, /25, /33, /50,
1837 Codename "Maxine").
1838
1839config FB_G364
1840 bool "G364 frame buffer support"
1841 depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
1842 select FB_CFB_FILLRECT
1843 select FB_CFB_COPYAREA
1844 select FB_CFB_IMAGEBLIT
1845 help
1846 The G364 driver is the framebuffer used in MIPS Magnum 4000 and
1847 Olivetti M700-10 systems.
1848
1849config FB_68328
1850 bool "Motorola 68328 native frame buffer support"
1851 depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328)
1852 select FB_CFB_FILLRECT
1853 select FB_CFB_COPYAREA
1854 select FB_CFB_IMAGEBLIT
1855 help
1856 Say Y here if you want to support the built-in frame buffer of
1857 the Motorola 68328 CPU family.
1858
1859config FB_PXA168
1860 tristate "PXA168/910 LCD framebuffer support"
1861 depends on FB && (CPU_PXA168 || CPU_PXA910)
1862 select FB_CFB_FILLRECT
1863 select FB_CFB_COPYAREA
1864 select FB_CFB_IMAGEBLIT
1865 ---help---
1866 Frame buffer driver for the built-in LCD controller in the Marvell
1867 MMP processor.
1868
1869config FB_PXA
1870 tristate "PXA LCD framebuffer support"
1871 depends on FB && ARCH_PXA
1872 select FB_CFB_FILLRECT
1873 select FB_CFB_COPYAREA
1874 select FB_CFB_IMAGEBLIT
1875 ---help---
1876 Frame buffer driver for the built-in LCD controller in the Intel
1877 PXA2x0 processor.
1878
1879 This driver is also available as a module ( = code which can be
1880 inserted and removed from the running kernel whenever you want). The
1881 module will be called pxafb. If you want to compile it as a module,
1882 say M here and read <file:Documentation/kbuild/modules.txt>.
1883
1884 If unsure, say N.
1885
1886config FB_PXA_OVERLAY
1887 bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
1888 default n
1889 depends on FB_PXA && (PXA27x || PXA3xx)
1890
1891config FB_PXA_SMARTPANEL
1892 bool "PXA Smartpanel LCD support"
1893 default n
1894 depends on FB_PXA
1895
1896config FB_PXA_PARAMETERS
1897 bool "PXA LCD command line parameters"
1898 default n
1899 depends on FB_PXA
1900 ---help---
1901 Enable the use of kernel command line or module parameters
1902 to configure the physical properties of the LCD panel when
1903 using the PXA LCD driver.
1904
1905 This option allows you to override the panel parameters
1906 supplied by the platform in order to support multiple
1907 different models of flatpanel. If you will only be using a
1908 single model of flatpanel then you can safely leave this
1909 option disabled.
1910
1911 <file:Documentation/fb/pxafb.txt> describes the available parameters.
1912
1913config PXA3XX_GCU
1914 tristate "PXA3xx 2D graphics accelerator driver"
1915 depends on FB_PXA
1916 help
1917 Kernelspace driver for the 2D graphics controller unit (GCU)
1918 found on PXA3xx processors. There is a counterpart driver in the
1919 DirectFB suite, see http://www.directfb.org/
1920
1921 If you compile this as a module, it will be called pxa3xx_gcu.
1922
1923config FB_MBX
1924 tristate "2700G LCD framebuffer support"
1925 depends on FB && ARCH_PXA
1926 select FB_CFB_FILLRECT
1927 select FB_CFB_COPYAREA
1928 select FB_CFB_IMAGEBLIT
1929 ---help---
1930 Framebuffer driver for the Intel 2700G (Marathon) Graphics
1931 Accelerator
1932
1933config FB_MBX_DEBUG
1934 bool "Enable debugging info via debugfs"
1935 depends on FB_MBX && DEBUG_FS
1936 default n
1937 ---help---
1938 Enable this if you want debugging information using the debug
1939 filesystem (debugfs)
1940
1941 If unsure, say N.
1942
1943config FB_FSL_DIU
1944 tristate "Freescale DIU framebuffer support"
1945 depends on FB && FSL_SOC
1946 select FB_MODE_HELPERS
1947 select FB_CFB_FILLRECT
1948 select FB_CFB_COPYAREA
1949 select FB_CFB_IMAGEBLIT
1950 select PPC_LIB_RHEAP
1951 ---help---
1952 Framebuffer driver for the Freescale SoC DIU
1953
1954config FB_W100
1955 tristate "W100 frame buffer support"
1956 depends on FB && ARCH_PXA
1957 select FB_CFB_FILLRECT
1958 select FB_CFB_COPYAREA
1959 select FB_CFB_IMAGEBLIT
1960 ---help---
1961 Frame buffer driver for the w100 as found on the Sharp SL-Cxx series.
1962 It can also drive the w3220 chip found on iPAQ hx4700.
1963
1964 This driver is also available as a module ( = code which can be
1965 inserted and removed from the running kernel whenever you want). The
1966 module will be called w100fb. If you want to compile it as a module,
1967 say M here and read <file:Documentation/kbuild/modules.txt>.
1968
1969 If unsure, say N.
1970
1971config FB_SH_MOBILE_LCDC
1972 tristate "SuperH Mobile LCDC framebuffer support"
1973 depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
1974 select FB_SYS_FILLRECT
1975 select FB_SYS_COPYAREA
1976 select FB_SYS_IMAGEBLIT
1977 select FB_SYS_FOPS
1978 select FB_DEFERRED_IO
1979 select FB_BACKLIGHT
1980 select SH_MIPI_DSI if SH_LCD_MIPI_DSI
1981 ---help---
1982 Frame buffer driver for the on-chip SH-Mobile LCD controller.
1983
1984config FB_SH_MOBILE_HDMI
1985 tristate "SuperH Mobile HDMI controller support"
1986 depends on FB_SH_MOBILE_LCDC
1987 select FB_MODE_HELPERS
1988 select SOUND
1989 select SND
1990 select SND_SOC
1991 ---help---
1992 Driver for the on-chip SH-Mobile HDMI controller.
1993
1994config FB_TMIO
1995 tristate "Toshiba Mobile IO FrameBuffer support"
1996 depends on FB && MFD_CORE
1997 select FB_CFB_FILLRECT
1998 select FB_CFB_COPYAREA
1999 select FB_CFB_IMAGEBLIT
2000 ---help---
2001 Frame buffer driver for the Toshiba Mobile IO integrated as found
2002 on the Sharp SL-6000 series
2003
2004 This driver is also available as a module ( = code which can be
2005 inserted and removed from the running kernel whenever you want). The
2006 module will be called tmiofb. If you want to compile it as a module,
2007 say M here and read <file:Documentation/kbuild/modules.txt>.
2008
2009 If unsure, say N.
2010
2011config FB_TMIO_ACCELL
2012 bool "tmiofb acceleration"
2013 depends on FB_TMIO
2014 default y
2015
2016config FB_S3C
2017 tristate "Samsung S3C framebuffer support"
2018 depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
2019 ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
2020 select FB_CFB_FILLRECT
2021 select FB_CFB_COPYAREA
2022 select FB_CFB_IMAGEBLIT
2023 ---help---
2024 Frame buffer driver for the built-in FB controller in the Samsung
2025 SoC line from the S3C2443 onwards, including the S3C2416, S3C2450,
2026 and the S3C64XX series such as the S3C6400 and S3C6410.
2027
2028 These chips all have the same basic framebuffer design with the
2029 actual capabilities depending on the chip. For instance the S3C6400
2030 and S3C6410 support 4 hardware windows whereas the S3C24XX series
2031 currently only have two.
2032
2033 Currently the support is only for the S3C6400 and S3C6410 SoCs.
2034
2035config FB_S3C_DEBUG_REGWRITE
2036 bool "Debug register writes"
2037 depends on FB_S3C
2038 ---help---
2039 Show all register writes via pr_debug()
2040
2041config FB_S3C2410
2042 tristate "S3C2410 LCD framebuffer support"
2043 depends on FB && ARCH_S3C24XX
2044 select FB_CFB_FILLRECT
2045 select FB_CFB_COPYAREA
2046 select FB_CFB_IMAGEBLIT
2047 ---help---
2048 Frame buffer driver for the built-in LCD controller in the Samsung
2049 S3C2410 processor.
2050
2051 This driver is also available as a module ( = code which can be
2052 inserted and removed from the running kernel whenever you want). The
2053 module will be called s3c2410fb. If you want to compile it as a module,
2054 say M here and read <file:Documentation/kbuild/modules.txt>.
2055
2056 If unsure, say N.
2057config FB_S3C2410_DEBUG
2058 bool "S3C2410 lcd debug messages"
2059 depends on FB_S3C2410
2060 help
2061 Turn on debugging messages. Note that you can set/unset at run time
2062 through sysfs
2063
2064config FB_NUC900
2065 bool "NUC900 LCD framebuffer support"
2066 depends on FB && ARCH_W90X900
2067 select FB_CFB_FILLRECT
2068 select FB_CFB_COPYAREA
2069 select FB_CFB_IMAGEBLIT
2070 ---help---
2071 Frame buffer driver for the built-in LCD controller in the Nuvoton
2072 NUC900 processor
2073
2074config GPM1040A0_320X240
2075 bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
2076 depends on FB_NUC900
2077
2078config FB_SM501
2079 tristate "Silicon Motion SM501 framebuffer support"
2080 depends on FB && MFD_SM501
2081 select FB_CFB_FILLRECT
2082 select FB_CFB_COPYAREA
2083 select FB_CFB_IMAGEBLIT
2084 ---help---
2085 Frame buffer driver for the CRT and LCD controllers in the Silicon
2086 Motion SM501.
2087
2088 This driver is also available as a module ( = code which can be
2089 inserted and removed from the running kernel whenever you want). The
2090 module will be called sm501fb. If you want to compile it as a module,
2091 say M here and read <file:Documentation/kbuild/modules.txt>.
2092
2093 If unsure, say N.
2094
2095config FB_SMSCUFX
2096 tristate "SMSC UFX6000/7000 USB Framebuffer support"
2097 depends on FB && USB
2098 select FB_MODE_HELPERS
2099 select FB_SYS_FILLRECT
2100 select FB_SYS_COPYAREA
2101 select FB_SYS_IMAGEBLIT
2102 select FB_SYS_FOPS
2103 select FB_DEFERRED_IO
2104 ---help---
2105 This is a kernel framebuffer driver for SMSC UFX USB devices.
2106 Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
2107 mplayer -vo fbdev. Supports both UFX6000 (USB 2.0) and UFX7000
2108 (USB 3.0) devices.
2109 To compile as a module, choose M here: the module name is smscufx.
2110
2111config FB_UDL
2112 tristate "Displaylink USB Framebuffer support"
2113 depends on FB && USB
2114 select FB_MODE_HELPERS
2115 select FB_SYS_FILLRECT
2116 select FB_SYS_COPYAREA
2117 select FB_SYS_IMAGEBLIT
2118 select FB_SYS_FOPS
2119 select FB_DEFERRED_IO
2120 ---help---
2121 This is a kernel framebuffer driver for DisplayLink USB devices.
2122 Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
2123 mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
2124 To compile as a module, choose M here: the module name is udlfb.
2125
2126config FB_IBM_GXT4500
2127 tristate "Framebuffer support for IBM GXT4000P/4500P/6000P/6500P adaptors"
2128 depends on FB && PPC
2129 select FB_CFB_FILLRECT
2130 select FB_CFB_COPYAREA
2131 select FB_CFB_IMAGEBLIT
2132 ---help---
2133 Say Y here to enable support for the IBM GXT4000P/6000P and
2134 GXT4500P/6500P display adaptor based on Raster Engine RC1000,
2135 found on some IBM System P (pSeries) machines. This driver
2136 doesn't use Geometry Engine GT1000.
2137
2138config FB_PS3
2139 tristate "PS3 GPU framebuffer driver"
2140 depends on FB && PS3_PS3AV
2141 select FB_SYS_FILLRECT
2142 select FB_SYS_COPYAREA
2143 select FB_SYS_IMAGEBLIT
2144 select FB_SYS_FOPS
2145 select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
2146 ---help---
2147 Include support for the virtual frame buffer in the PS3 platform.
2148
2149config FB_PS3_DEFAULT_SIZE_M
2150 int "PS3 default frame buffer size (in MiB)"
2151 depends on FB_PS3
2152 default 9
2153 ---help---
2154 This is the default size (in MiB) of the virtual frame buffer in
2155 the PS3.
2156 The default value can be overridden on the kernel command line
2157 using the "ps3fb" option (e.g. "ps3fb=9M");
2158
2159config FB_XILINX
2160 tristate "Xilinx frame buffer support"
2161 depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ)
2162 select FB_CFB_FILLRECT
2163 select FB_CFB_COPYAREA
2164 select FB_CFB_IMAGEBLIT
2165 ---help---
2166 Include support for the Xilinx ML300/ML403 reference design
2167 framebuffer. ML300 carries a 640*480 LCD display on the board,
2168 ML403 uses a standard DB15 VGA connector.
2169
2170config FB_GOLDFISH
2171 tristate "Goldfish Framebuffer"
2172 depends on FB && HAS_DMA
2173 select FB_CFB_FILLRECT
2174 select FB_CFB_COPYAREA
2175 select FB_CFB_IMAGEBLIT
2176 ---help---
2177 Framebuffer driver for Goldfish Virtual Platform
2178
2179config FB_COBALT
2180 tristate "Cobalt server LCD frame buffer support"
2181 depends on FB && (MIPS_COBALT || MIPS_SEAD3)
2182
2183config FB_SH7760
2184 bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
2185 depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
2186 || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
2187 select FB_CFB_FILLRECT
2188 select FB_CFB_COPYAREA
2189 select FB_CFB_IMAGEBLIT
2190 ---help---
2191 Support for the SH7760/SH7763/SH7720/SH7721 integrated
2192 (D)STN/TFT LCD Controller.
2193 Supports display resolutions up to 1024x1024 pixel, grayscale and
2194 color operation, with depths ranging from 1 bpp to 8 bpp monochrome
2195 and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
2196 panels <= 320 pixel horizontal resolution.
2197
2198config FB_DA8XX
2199 tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support"
2200 depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX)
2201 select FB_CFB_FILLRECT
2202 select FB_CFB_COPYAREA
2203 select FB_CFB_IMAGEBLIT
2204 select FB_CFB_REV_PIXELS_IN_BYTE
2205 select FB_MODE_HELPERS
2206 select VIDEOMODE_HELPERS
2207 ---help---
2208 This is the frame buffer device driver for the TI LCD controller
2209 found on DA8xx/OMAP-L1xx/AM335x SoCs.
2210 If unsure, say N.
2211
2212config FB_VIRTUAL
2213 tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
2214 depends on FB
2215 select FB_SYS_FILLRECT
2216 select FB_SYS_COPYAREA
2217 select FB_SYS_IMAGEBLIT
2218 select FB_SYS_FOPS
2219 ---help---
2220 This is a `virtual' frame buffer device. It operates on a chunk of
2221 unswappable kernel memory instead of on the memory of a graphics
2222 board. This means you cannot see any output sent to this frame
2223 buffer device, while it does consume precious memory. The main use
2224 of this frame buffer device is testing and debugging the frame
2225 buffer subsystem. Do NOT enable it for normal systems! To protect
2226 the innocent, it has to be enabled explicitly at boot time using the
2227 kernel option `video=vfb:'.
2228
2229 To compile this driver as a module, choose M here: the
2230 module will be called vfb. In order to load it, you must use
2231 the vfb_enable=1 option.
2232
2233 If unsure, say N.
2234
2235config XEN_FBDEV_FRONTEND
2236 tristate "Xen virtual frame buffer support"
2237 depends on FB && XEN
2238 select FB_SYS_FILLRECT
2239 select FB_SYS_COPYAREA
2240 select FB_SYS_IMAGEBLIT
2241 select FB_SYS_FOPS
2242 select FB_DEFERRED_IO
2243 select INPUT_XEN_KBDDEV_FRONTEND if INPUT_MISC
2244 select XEN_XENBUS_FRONTEND
2245 default y
2246 help
2247 This driver implements the front-end of the Xen virtual
2248 frame buffer driver. It communicates with a back-end
2249 in another domain.
2250
2251config FB_METRONOME
2252 tristate "E-Ink Metronome/8track controller support"
2253 depends on FB
2254 select FB_SYS_FILLRECT
2255 select FB_SYS_COPYAREA
2256 select FB_SYS_IMAGEBLIT
2257 select FB_SYS_FOPS
2258 select FB_DEFERRED_IO
2259 help
2260 This driver implements support for the E-Ink Metronome
2261 controller. The pre-release name for this device was 8track
2262 and could also have been called by some vendors as PVI-nnnn.
2263
2264config FB_MB862XX
2265 tristate "Fujitsu MB862xx GDC support"
2266 depends on FB
2267 depends on PCI || (OF && PPC)
2268 select FB_CFB_FILLRECT
2269 select FB_CFB_COPYAREA
2270 select FB_CFB_IMAGEBLIT
2271 ---help---
2272 Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers.
2273
2274choice
2275 prompt "GDC variant"
2276 depends on FB_MB862XX
2277
2278config FB_MB862XX_PCI_GDC
2279 bool "Carmine/Coral-P(A) GDC"
2280 depends on PCI
2281 ---help---
2282 This enables framebuffer support for Fujitsu Carmine/Coral-P(A)
2283 PCI graphics controller devices.
2284
2285config FB_MB862XX_LIME
2286 bool "Lime GDC"
2287 depends on OF && PPC
2288 select FB_FOREIGN_ENDIAN
2289 select FB_LITTLE_ENDIAN
2290 ---help---
2291 Framebuffer support for Fujitsu Lime GDC on host CPU bus.
2292
2293endchoice
2294
2295config FB_MB862XX_I2C
2296 bool "Support I2C bus on MB862XX GDC"
2297 depends on FB_MB862XX && I2C
2298 default y
2299 help
2300 Selecting this option adds Coral-P(A)/Lime GDC I2C bus adapter
2301 driver to support accessing I2C devices on controller's I2C bus.
2302 These are usually some video decoder chips.
2303
2304config FB_EP93XX
2305 tristate "EP93XX frame buffer support"
2306 depends on FB && ARCH_EP93XX
2307 select FB_CFB_FILLRECT
2308 select FB_CFB_COPYAREA
2309 select FB_CFB_IMAGEBLIT
2310 ---help---
2311 Framebuffer driver for the Cirrus Logic EP93XX series of processors.
2312 This driver is also available as a module. The module will be called
2313 ep93xx-fb.
2314
2315config FB_PRE_INIT_FB
2316 bool "Don't reinitialize, use bootloader's GDC/Display configuration"
2317 depends on FB && FB_MB862XX_LIME
2318 ---help---
2319 Select this option if display contents should be inherited as set by
2320 the bootloader.
2321
2322config FB_MSM
2323 tristate "MSM Framebuffer support"
2324 depends on FB && ARCH_MSM
2325 select FB_CFB_FILLRECT
2326 select FB_CFB_COPYAREA
2327 select FB_CFB_IMAGEBLIT
2328
2329config FB_MX3
2330 tristate "MX3 Framebuffer support"
2331 depends on FB && MX3_IPU
2332 select FB_CFB_FILLRECT
2333 select FB_CFB_COPYAREA
2334 select FB_CFB_IMAGEBLIT
2335 default y
2336 help
2337 This is a framebuffer device for the i.MX31 LCD Controller. So
2338 far only synchronous displays are supported. If you plan to use
2339 an LCD display with your i.MX31 system, say Y here.
2340
2341config FB_BROADSHEET
2342 tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
2343 depends on FB
2344 select FB_SYS_FILLRECT
2345 select FB_SYS_COPYAREA
2346 select FB_SYS_IMAGEBLIT
2347 select FB_SYS_FOPS
2348 select FB_DEFERRED_IO
2349 help
2350 This driver implements support for the E-Ink Broadsheet
2351 controller. The release name for this device was Epson S1D13521
2352 and could also have been called by other names when coupled with
2353 a bridge adapter.
2354
2355config FB_AUO_K190X
2356 tristate "AUO-K190X EPD controller support"
2357 depends on FB
2358 select FB_SYS_FILLRECT
2359 select FB_SYS_COPYAREA
2360 select FB_SYS_IMAGEBLIT
2361 select FB_SYS_FOPS
2362 select FB_DEFERRED_IO
2363 help
2364 Provides support for epaper controllers from the K190X series
2365 of AUO. These controllers can be used to drive epaper displays
2366 from Sipix.
2367
2368 This option enables the common support, shared by the individual
2369 controller drivers. You will also have to enable the driver
2370 for the controller type used in your device.
2371
2372config FB_AUO_K1900
2373 tristate "AUO-K1900 EPD controller support"
2374 depends on FB && FB_AUO_K190X
2375 help
2376 This driver implements support for the AUO K1900 epd-controller.
2377 This controller can drive Sipix epaper displays but can only do
2378 serial updates, reducing the number of possible frames per second.
2379
2380config FB_AUO_K1901
2381 tristate "AUO-K1901 EPD controller support"
2382 depends on FB && FB_AUO_K190X
2383 help
2384 This driver implements support for the AUO K1901 epd-controller.
2385 This controller can drive Sipix epaper displays and supports
2386 concurrent updates, making higher frames per second possible.
2387
2388config FB_JZ4740
2389 tristate "JZ4740 LCD framebuffer support"
2390 depends on FB && MACH_JZ4740
2391 select FB_SYS_FILLRECT
2392 select FB_SYS_COPYAREA
2393 select FB_SYS_IMAGEBLIT
2394 help
2395 Framebuffer support for the JZ4740 SoC.
2396
2397config FB_MXS
2398 tristate "MXS LCD framebuffer support"
2399 depends on FB && ARCH_MXS
2400 select FB_CFB_FILLRECT
2401 select FB_CFB_COPYAREA
2402 select FB_CFB_IMAGEBLIT
2403 select FB_MODE_HELPERS
2404 select VIDEOMODE_HELPERS
2405 help
2406 Framebuffer support for the MXS SoC.
2407
2408config FB_PUV3_UNIGFX
2409 tristate "PKUnity v3 Unigfx framebuffer support"
2410 depends on FB && UNICORE32 && ARCH_PUV3
2411 select FB_SYS_FILLRECT
2412 select FB_SYS_COPYAREA
2413 select FB_SYS_IMAGEBLIT
2414 select FB_SYS_FOPS
2415 help
2416 Choose this option if you want to use the Unigfx device as a
2417 framebuffer device. Without the support of PCI & AGP.
2418
2419config FB_HYPERV
2420 tristate "Microsoft Hyper-V Synthetic Video support"
2421 depends on FB && HYPERV
2422 select FB_CFB_FILLRECT
2423 select FB_CFB_COPYAREA
2424 select FB_CFB_IMAGEBLIT
2425 help
2426 This framebuffer driver supports Microsoft Hyper-V Synthetic Video.
2427
2428config FB_SIMPLE
2429 bool "Simple framebuffer support"
2430 depends on (FB = y)
2431 select FB_CFB_FILLRECT
2432 select FB_CFB_COPYAREA
2433 select FB_CFB_IMAGEBLIT
2434 help
2435 Say Y if you want support for a simple frame-buffer.
2436
2437 This driver assumes that the display hardware has been initialized
2438 before the kernel boots, and the kernel will simply render to the
2439 pre-allocated frame buffer surface.
2440
2441 Configuration re: surface address, size, and format must be provided
2442 through device tree, or plain old platform data.
2443
2444source "drivers/video/fbdev/omap/Kconfig"
2445source "drivers/video/fbdev/omap2/Kconfig"
2446source "drivers/video/fbdev/exynos/Kconfig"
2447source "drivers/video/fbdev/mmp/Kconfig"
2448
2449config FB_SH_MOBILE_MERAM
2450 tristate "SuperH Mobile MERAM read ahead support"
2451 depends on (SUPERH || ARCH_SHMOBILE)
2452 select GENERIC_ALLOCATOR
2453 ---help---
2454 Enable MERAM support for the SuperH controller.
2455
2456 This will allow for caching of the framebuffer to provide more
2457 reliable access under heavy main memory bus traffic situations.
2458 Up to 4 memory channels can be configured, allowing 4 RGB or
2459 2 YCbCr framebuffers to be configured.
2460
2461config FB_SSD1307
2462 tristate "Solomon SSD1307 framebuffer support"
2463 depends on FB && I2C
2464 depends on OF
2465 depends on GPIOLIB
2466 select FB_SYS_FOPS
2467 select FB_SYS_FILLRECT
2468 select FB_SYS_COPYAREA
2469 select FB_SYS_IMAGEBLIT
2470 select FB_DEFERRED_IO
2471 select PWM
2472 help
2473 This driver implements support for the Solomon SSD1307
2474 OLED controller over I2C.
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
new file mode 100644
index 000000000000..0284f2a12538
--- /dev/null
+++ b/drivers/video/fbdev/Makefile
@@ -0,0 +1,152 @@
1# Makefile for the Linux video drivers.
2# 5 Aug 1999, James Simmons, <mailto:jsimmons@users.sf.net>
3# Rewritten to use lists instead of if-statements.
4
5# Each configuration option enables a list of files.
6
7obj-y += core/
8
9obj-$(CONFIG_EXYNOS_VIDEO) += exynos/
10
11obj-$(CONFIG_FB_MACMODES) += macmodes.o
12obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
13
14# Hardware specific drivers go first
15obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
16obj-$(CONFIG_FB_ARC) += arcfb.o
17obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o
18obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o
19obj-$(CONFIG_FB_GRVGA) += grvga.o
20obj-$(CONFIG_FB_PM2) += pm2fb.o
21obj-$(CONFIG_FB_PM3) += pm3fb.o
22
23obj-$(CONFIG_FB_I740) += i740fb.o
24obj-$(CONFIG_FB_MATROX) += matrox/
25obj-$(CONFIG_FB_RIVA) += riva/
26obj-$(CONFIG_FB_NVIDIA) += nvidia/
27obj-$(CONFIG_FB_ATY) += aty/ macmodes.o
28obj-$(CONFIG_FB_ATY128) += aty/ macmodes.o
29obj-$(CONFIG_FB_RADEON) += aty/
30obj-$(CONFIG_FB_SIS) += sis/
31obj-$(CONFIG_FB_VIA) += via/
32obj-$(CONFIG_FB_KYRO) += kyro/
33obj-$(CONFIG_FB_SAVAGE) += savage/
34obj-$(CONFIG_FB_GEODE) += geode/
35obj-$(CONFIG_FB_MBX) += mbx/
36obj-$(CONFIG_FB_NEOMAGIC) += neofb.o
37obj-$(CONFIG_FB_3DFX) += tdfxfb.o
38obj-$(CONFIG_FB_CONTROL) += controlfb.o
39obj-$(CONFIG_FB_PLATINUM) += platinumfb.o
40obj-$(CONFIG_FB_VALKYRIE) += valkyriefb.o
41obj-$(CONFIG_FB_CT65550) += chipsfb.o
42obj-$(CONFIG_FB_IMSTT) += imsttfb.o
43obj-$(CONFIG_FB_FM2) += fm2fb.o
44obj-$(CONFIG_FB_VT8623) += vt8623fb.o
45obj-$(CONFIG_FB_TRIDENT) += tridentfb.o
46obj-$(CONFIG_FB_LE80578) += vermilion/
47obj-$(CONFIG_FB_S3) += s3fb.o
48obj-$(CONFIG_FB_ARK) += arkfb.o
49obj-$(CONFIG_FB_STI) += stifb.o
50obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o
51obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o
52obj-$(CONFIG_FB_CG3) += cg3.o sbuslib.o
53obj-$(CONFIG_FB_BW2) += bw2.o sbuslib.o
54obj-$(CONFIG_FB_CG14) += cg14.o sbuslib.o
55obj-$(CONFIG_FB_P9100) += p9100.o sbuslib.o
56obj-$(CONFIG_FB_TCX) += tcx.o sbuslib.o
57obj-$(CONFIG_FB_LEO) += leo.o sbuslib.o
58obj-$(CONFIG_FB_ACORN) += acornfb.o
59obj-$(CONFIG_FB_ATARI) += atafb.o c2p_iplan2.o atafb_mfb.o \
60 atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
61obj-$(CONFIG_FB_MAC) += macfb.o
62obj-$(CONFIG_FB_HECUBA) += hecubafb.o
63obj-$(CONFIG_FB_N411) += n411.o
64obj-$(CONFIG_FB_HGA) += hgafb.o
65obj-$(CONFIG_FB_XVR500) += sunxvr500.o
66obj-$(CONFIG_FB_XVR2500) += sunxvr2500.o
67obj-$(CONFIG_FB_XVR1000) += sunxvr1000.o
68obj-$(CONFIG_FB_IGA) += igafb.o
69obj-$(CONFIG_FB_APOLLO) += dnfb.o
70obj-$(CONFIG_FB_Q40) += q40fb.o
71obj-$(CONFIG_FB_TGA) += tgafb.o
72obj-$(CONFIG_FB_HP300) += hpfb.o
73obj-$(CONFIG_FB_G364) += g364fb.o
74obj-$(CONFIG_FB_EP93XX) += ep93xx-fb.o
75obj-$(CONFIG_FB_SA1100) += sa1100fb.o
76obj-$(CONFIG_FB_HIT) += hitfb.o
77obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
78obj-$(CONFIG_FB_PVR2) += pvr2fb.o
79obj-$(CONFIG_FB_VOODOO1) += sstfb.o
80obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
81obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o
82obj-$(CONFIG_FB_68328) += 68328fb.o
83obj-$(CONFIG_FB_GBE) += gbefb.o
84obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
85obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
86obj-$(CONFIG_FB_PXA) += pxafb.o
87obj-$(CONFIG_FB_PXA168) += pxa168fb.o
88obj-$(CONFIG_PXA3XX_GCU) += pxa3xx-gcu.o
89obj-$(CONFIG_MMP_DISP) += mmp/
90obj-$(CONFIG_FB_W100) += w100fb.o
91obj-$(CONFIG_FB_TMIO) += tmiofb.o
92obj-$(CONFIG_FB_AU1100) += au1100fb.o
93obj-$(CONFIG_FB_AU1200) += au1200fb.o
94obj-$(CONFIG_FB_VT8500) += vt8500lcdfb.o
95obj-$(CONFIG_FB_WM8505) += wm8505fb.o
96obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
97obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
98obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
99obj-$(CONFIG_FB_MAXINE) += maxinefb.o
100obj-$(CONFIG_FB_METRONOME) += metronomefb.o
101obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o
102obj-$(CONFIG_FB_AUO_K190X) += auo_k190x.o
103obj-$(CONFIG_FB_AUO_K1900) += auo_k1900fb.o
104obj-$(CONFIG_FB_AUO_K1901) += auo_k1901fb.o
105obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
106obj-$(CONFIG_FB_SH7760) += sh7760fb.o
107obj-$(CONFIG_FB_IMX) += imxfb.o
108obj-$(CONFIG_FB_S3C) += s3c-fb.o
109obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o
110obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o
111obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o
112obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
113obj-$(CONFIG_FB_PS3) += ps3fb.o
114obj-$(CONFIG_FB_SM501) += sm501fb.o
115obj-$(CONFIG_FB_UDL) += udlfb.o
116obj-$(CONFIG_FB_SMSCUFX) += smscufx.o
117obj-$(CONFIG_FB_XILINX) += xilinxfb.o
118obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
119obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
120obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o
121obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
122obj-$(CONFIG_FB_OMAP) += omap/
123obj-y += omap2/
124obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
125obj-$(CONFIG_FB_CARMINE) += carminefb.o
126obj-$(CONFIG_FB_MB862XX) += mb862xx/
127obj-$(CONFIG_FB_MSM) += msm/
128obj-$(CONFIG_FB_NUC900) += nuc900fb.o
129obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
130obj-$(CONFIG_FB_PUV3_UNIGFX) += fb-puv3.o
131obj-$(CONFIG_FB_HYPERV) += hyperv_fb.o
132obj-$(CONFIG_FB_OPENCORES) += ocfb.o
133
134# Platform or fallback drivers go here
135obj-$(CONFIG_FB_UVESA) += uvesafb.o
136obj-$(CONFIG_FB_VESA) += vesafb.o
137obj-$(CONFIG_FB_EFI) += efifb.o
138obj-$(CONFIG_FB_VGA16) += vga16fb.o
139obj-$(CONFIG_FB_OF) += offb.o
140obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
141obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
142obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
143obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
144obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
145obj-$(CONFIG_FB_MX3) += mx3fb.o
146obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
147obj-$(CONFIG_FB_MXS) += mxsfb.o
148obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o
149obj-$(CONFIG_FB_SIMPLE) += simplefb.o
150
151# the test framebuffer is last
152obj-$(CONFIG_FB_VIRTUAL) += vfb.o
diff --git a/drivers/video/acornfb.c b/drivers/video/fbdev/acornfb.c
index a305caea58ee..a305caea58ee 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/fbdev/acornfb.c
diff --git a/drivers/video/acornfb.h b/drivers/video/fbdev/acornfb.h
index 175c8ff3367c..175c8ff3367c 100644
--- a/drivers/video/acornfb.h
+++ b/drivers/video/fbdev/acornfb.h
diff --git a/drivers/video/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index 14d6b3793e0a..14d6b3793e0a 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
diff --git a/drivers/video/amifb.c b/drivers/video/fbdev/amifb.c
index 518f790ef88a..518f790ef88a 100644
--- a/drivers/video/amifb.c
+++ b/drivers/video/fbdev/amifb.c
diff --git a/drivers/video/arcfb.c b/drivers/video/fbdev/arcfb.c
index 1b0b233b8b39..1b0b233b8b39 100644
--- a/drivers/video/arcfb.c
+++ b/drivers/video/fbdev/arcfb.c
diff --git a/drivers/video/arkfb.c b/drivers/video/fbdev/arkfb.c
index adc4ea2cc5a0..adc4ea2cc5a0 100644
--- a/drivers/video/arkfb.c
+++ b/drivers/video/fbdev/arkfb.c
diff --git a/drivers/video/asiliantfb.c b/drivers/video/fbdev/asiliantfb.c
index 7e8ddf00ccc2..7e8ddf00ccc2 100644
--- a/drivers/video/asiliantfb.c
+++ b/drivers/video/fbdev/asiliantfb.c
diff --git a/drivers/video/atafb.c b/drivers/video/fbdev/atafb.c
index e21d1f58554c..e21d1f58554c 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/fbdev/atafb.c
diff --git a/drivers/video/atafb.h b/drivers/video/fbdev/atafb.h
index 014e05906cb1..014e05906cb1 100644
--- a/drivers/video/atafb.h
+++ b/drivers/video/fbdev/atafb.h
diff --git a/drivers/video/atafb_iplan2p2.c b/drivers/video/fbdev/atafb_iplan2p2.c
index 8cc9c50379d0..8cc9c50379d0 100644
--- a/drivers/video/atafb_iplan2p2.c
+++ b/drivers/video/fbdev/atafb_iplan2p2.c
diff --git a/drivers/video/atafb_iplan2p4.c b/drivers/video/fbdev/atafb_iplan2p4.c
index bee0d89463f7..bee0d89463f7 100644
--- a/drivers/video/atafb_iplan2p4.c
+++ b/drivers/video/fbdev/atafb_iplan2p4.c
diff --git a/drivers/video/atafb_iplan2p8.c b/drivers/video/fbdev/atafb_iplan2p8.c
index 356fb52ce443..356fb52ce443 100644
--- a/drivers/video/atafb_iplan2p8.c
+++ b/drivers/video/fbdev/atafb_iplan2p8.c
diff --git a/drivers/video/atafb_mfb.c b/drivers/video/fbdev/atafb_mfb.c
index 6a352d62eecf..6a352d62eecf 100644
--- a/drivers/video/atafb_mfb.c
+++ b/drivers/video/fbdev/atafb_mfb.c
diff --git a/drivers/video/atafb_utils.h b/drivers/video/fbdev/atafb_utils.h
index ac9e19dc5057..ac9e19dc5057 100644
--- a/drivers/video/atafb_utils.h
+++ b/drivers/video/fbdev/atafb_utils.h
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/fbdev/atmel_lcdfb.c
index e683b6ef9594..e683b6ef9594 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/fbdev/atmel_lcdfb.c
diff --git a/drivers/video/aty/Makefile b/drivers/video/fbdev/aty/Makefile
index a6cc0e9ec790..a6cc0e9ec790 100644
--- a/drivers/video/aty/Makefile
+++ b/drivers/video/fbdev/aty/Makefile
diff --git a/drivers/video/aty/ati_ids.h b/drivers/video/fbdev/aty/ati_ids.h
index 3e9d28bcd9f8..3e9d28bcd9f8 100644
--- a/drivers/video/aty/ati_ids.h
+++ b/drivers/video/fbdev/aty/ati_ids.h
diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/fbdev/aty/aty128fb.c
index 52108be69e77..52108be69e77 100644
--- a/drivers/video/aty/aty128fb.c
+++ b/drivers/video/fbdev/aty/aty128fb.c
diff --git a/drivers/video/aty/atyfb.h b/drivers/video/fbdev/aty/atyfb.h
index 1f39a62f899b..1f39a62f899b 100644
--- a/drivers/video/aty/atyfb.h
+++ b/drivers/video/fbdev/aty/atyfb.h
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/fbdev/aty/atyfb_base.c
index c3d0074a32db..c3d0074a32db 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/fbdev/aty/atyfb_base.c
diff --git a/drivers/video/aty/mach64_accel.c b/drivers/video/fbdev/aty/mach64_accel.c
index 182bd680141f..182bd680141f 100644
--- a/drivers/video/aty/mach64_accel.c
+++ b/drivers/video/fbdev/aty/mach64_accel.c
diff --git a/drivers/video/aty/mach64_ct.c b/drivers/video/fbdev/aty/mach64_ct.c
index 51f29d627ceb..51f29d627ceb 100644
--- a/drivers/video/aty/mach64_ct.c
+++ b/drivers/video/fbdev/aty/mach64_ct.c
diff --git a/drivers/video/aty/mach64_cursor.c b/drivers/video/fbdev/aty/mach64_cursor.c
index 0fe02e22d9a4..2fa0317ab3c7 100644
--- a/drivers/video/aty/mach64_cursor.c
+++ b/drivers/video/fbdev/aty/mach64_cursor.c
@@ -5,7 +5,7 @@
5#include <linux/fb.h> 5#include <linux/fb.h>
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/string.h> 7#include <linux/string.h>
8#include "../fb_draw.h" 8#include "../core/fb_draw.h"
9 9
10#include <asm/io.h> 10#include <asm/io.h>
11 11
diff --git a/drivers/video/aty/mach64_gx.c b/drivers/video/fbdev/aty/mach64_gx.c
index 10c988aef58e..10c988aef58e 100644
--- a/drivers/video/aty/mach64_gx.c
+++ b/drivers/video/fbdev/aty/mach64_gx.c
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/fbdev/aty/radeon_accel.c
index a469a3d6edcb..a469a3d6edcb 100644
--- a/drivers/video/aty/radeon_accel.c
+++ b/drivers/video/fbdev/aty/radeon_accel.c
diff --git a/drivers/video/aty/radeon_backlight.c b/drivers/video/fbdev/aty/radeon_backlight.c
index db572df7e1ef..db572df7e1ef 100644
--- a/drivers/video/aty/radeon_backlight.c
+++ b/drivers/video/fbdev/aty/radeon_backlight.c
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/fbdev/aty/radeon_base.c
index 26d80a4486fb..26d80a4486fb 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/fbdev/aty/radeon_base.c
diff --git a/drivers/video/aty/radeon_i2c.c b/drivers/video/fbdev/aty/radeon_i2c.c
index ab1d0fd76316..ab1d0fd76316 100644
--- a/drivers/video/aty/radeon_i2c.c
+++ b/drivers/video/fbdev/aty/radeon_i2c.c
diff --git a/drivers/video/aty/radeon_monitor.c b/drivers/video/fbdev/aty/radeon_monitor.c
index bc078d50d8f1..bc078d50d8f1 100644
--- a/drivers/video/aty/radeon_monitor.c
+++ b/drivers/video/fbdev/aty/radeon_monitor.c
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/fbdev/aty/radeon_pm.c
index 46a12f1a93c3..46a12f1a93c3 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/fbdev/aty/radeon_pm.c
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/fbdev/aty/radeonfb.h
index cb846044f57c..cb846044f57c 100644
--- a/drivers/video/aty/radeonfb.h
+++ b/drivers/video/fbdev/aty/radeonfb.h
diff --git a/drivers/video/au1100fb.c b/drivers/video/fbdev/au1100fb.c
index 372d4aea9d1c..372d4aea9d1c 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/fbdev/au1100fb.c
diff --git a/drivers/video/au1100fb.h b/drivers/video/fbdev/au1100fb.h
index 12d9642d5465..12d9642d5465 100644
--- a/drivers/video/au1100fb.h
+++ b/drivers/video/fbdev/au1100fb.h
diff --git a/drivers/video/au1200fb.c b/drivers/video/fbdev/au1200fb.c
index 4cfba78a1458..4cfba78a1458 100644
--- a/drivers/video/au1200fb.c
+++ b/drivers/video/fbdev/au1200fb.c
diff --git a/drivers/video/au1200fb.h b/drivers/video/fbdev/au1200fb.h
index e2672714d8d4..e2672714d8d4 100644
--- a/drivers/video/au1200fb.h
+++ b/drivers/video/fbdev/au1200fb.h
diff --git a/drivers/video/auo_k1900fb.c b/drivers/video/fbdev/auo_k1900fb.c
index f5b668e77af3..f5b668e77af3 100644
--- a/drivers/video/auo_k1900fb.c
+++ b/drivers/video/fbdev/auo_k1900fb.c
diff --git a/drivers/video/auo_k1901fb.c b/drivers/video/fbdev/auo_k1901fb.c
index 12b9adcb75c5..12b9adcb75c5 100644
--- a/drivers/video/auo_k1901fb.c
+++ b/drivers/video/fbdev/auo_k1901fb.c
diff --git a/drivers/video/auo_k190x.c b/drivers/video/fbdev/auo_k190x.c
index 8d2499d1cafb..8d2499d1cafb 100644
--- a/drivers/video/auo_k190x.c
+++ b/drivers/video/fbdev/auo_k190x.c
diff --git a/drivers/video/auo_k190x.h b/drivers/video/fbdev/auo_k190x.h
index e35af1f51b28..e35af1f51b28 100644
--- a/drivers/video/auo_k190x.h
+++ b/drivers/video/fbdev/auo_k190x.h
diff --git a/drivers/video/bf537-lq035.c b/drivers/video/fbdev/bf537-lq035.c
index a82d2578d976..a82d2578d976 100644
--- a/drivers/video/bf537-lq035.c
+++ b/drivers/video/fbdev/bf537-lq035.c
diff --git a/drivers/video/bf54x-lq043fb.c b/drivers/video/fbdev/bf54x-lq043fb.c
index 42b8f9d11018..e2c42ad8515a 100644
--- a/drivers/video/bf54x-lq043fb.c
+++ b/drivers/video/fbdev/bf54x-lq043fb.c
@@ -49,13 +49,13 @@
49#include <linux/spinlock.h> 49#include <linux/spinlock.h>
50#include <linux/dma-mapping.h> 50#include <linux/dma-mapping.h>
51#include <linux/platform_device.h> 51#include <linux/platform_device.h>
52#include <linux/gpio.h>
52 53
53#include <asm/blackfin.h> 54#include <asm/blackfin.h>
54#include <asm/irq.h> 55#include <asm/irq.h>
55#include <asm/dpmc.h> 56#include <asm/dpmc.h>
56#include <asm/dma-mapping.h> 57#include <asm/dma-mapping.h>
57#include <asm/dma.h> 58#include <asm/dma.h>
58#include <asm/gpio.h>
59#include <asm/portmux.h> 59#include <asm/portmux.h>
60 60
61#include <mach/bf54x-lq043.h> 61#include <mach/bf54x-lq043.h>
diff --git a/drivers/video/bfin-lq035q1-fb.c b/drivers/video/fbdev/bfin-lq035q1-fb.c
index b594a58ff21d..b594a58ff21d 100644
--- a/drivers/video/bfin-lq035q1-fb.c
+++ b/drivers/video/fbdev/bfin-lq035q1-fb.c
diff --git a/drivers/video/bfin-t350mcqb-fb.c b/drivers/video/fbdev/bfin-t350mcqb-fb.c
index b5cf1307a3d9..b5cf1307a3d9 100644
--- a/drivers/video/bfin-t350mcqb-fb.c
+++ b/drivers/video/fbdev/bfin-t350mcqb-fb.c
diff --git a/drivers/video/bfin_adv7393fb.c b/drivers/video/fbdev/bfin_adv7393fb.c
index a54f7f7d763b..a54f7f7d763b 100644
--- a/drivers/video/bfin_adv7393fb.c
+++ b/drivers/video/fbdev/bfin_adv7393fb.c
diff --git a/drivers/video/bfin_adv7393fb.h b/drivers/video/fbdev/bfin_adv7393fb.h
index cd591b5152a5..cd591b5152a5 100644
--- a/drivers/video/bfin_adv7393fb.h
+++ b/drivers/video/fbdev/bfin_adv7393fb.h
diff --git a/drivers/video/broadsheetfb.c b/drivers/video/fbdev/broadsheetfb.c
index 8556264b16b7..8556264b16b7 100644
--- a/drivers/video/broadsheetfb.c
+++ b/drivers/video/fbdev/broadsheetfb.c
diff --git a/drivers/video/bt431.h b/drivers/video/fbdev/bt431.h
index 04e0cfbba538..04e0cfbba538 100644
--- a/drivers/video/bt431.h
+++ b/drivers/video/fbdev/bt431.h
diff --git a/drivers/video/bt455.h b/drivers/video/fbdev/bt455.h
index 80f61b03e9ae..80f61b03e9ae 100644
--- a/drivers/video/bt455.h
+++ b/drivers/video/fbdev/bt455.h
diff --git a/drivers/video/bw2.c b/drivers/video/fbdev/bw2.c
index bc123d6947a4..bc123d6947a4 100644
--- a/drivers/video/bw2.c
+++ b/drivers/video/fbdev/bw2.c
diff --git a/drivers/video/c2p.h b/drivers/video/fbdev/c2p.h
index 6c38d40427d8..6c38d40427d8 100644
--- a/drivers/video/c2p.h
+++ b/drivers/video/fbdev/c2p.h
diff --git a/drivers/video/c2p_core.h b/drivers/video/fbdev/c2p_core.h
index e1035a865fb9..e1035a865fb9 100644
--- a/drivers/video/c2p_core.h
+++ b/drivers/video/fbdev/c2p_core.h
diff --git a/drivers/video/c2p_iplan2.c b/drivers/video/fbdev/c2p_iplan2.c
index 19156dc6158c..19156dc6158c 100644
--- a/drivers/video/c2p_iplan2.c
+++ b/drivers/video/fbdev/c2p_iplan2.c
diff --git a/drivers/video/c2p_planar.c b/drivers/video/fbdev/c2p_planar.c
index ec7ac8526f06..ec7ac8526f06 100644
--- a/drivers/video/c2p_planar.c
+++ b/drivers/video/fbdev/c2p_planar.c
diff --git a/drivers/video/carminefb.c b/drivers/video/fbdev/carminefb.c
index 65f7c15f5fdb..65f7c15f5fdb 100644
--- a/drivers/video/carminefb.c
+++ b/drivers/video/fbdev/carminefb.c
diff --git a/drivers/video/carminefb.h b/drivers/video/fbdev/carminefb.h
index 05306de0c6b6..05306de0c6b6 100644
--- a/drivers/video/carminefb.h
+++ b/drivers/video/fbdev/carminefb.h
diff --git a/drivers/video/carminefb_regs.h b/drivers/video/fbdev/carminefb_regs.h
index 045215600b73..045215600b73 100644
--- a/drivers/video/carminefb_regs.h
+++ b/drivers/video/fbdev/carminefb_regs.h
diff --git a/drivers/video/cg14.c b/drivers/video/fbdev/cg14.c
index c79745b136bb..c79745b136bb 100644
--- a/drivers/video/cg14.c
+++ b/drivers/video/fbdev/cg14.c
diff --git a/drivers/video/cg3.c b/drivers/video/fbdev/cg3.c
index 64a89d5747ed..64a89d5747ed 100644
--- a/drivers/video/cg3.c
+++ b/drivers/video/fbdev/cg3.c
diff --git a/drivers/video/cg6.c b/drivers/video/fbdev/cg6.c
index 70781fea092a..70781fea092a 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/fbdev/cg6.c
diff --git a/drivers/video/chipsfb.c b/drivers/video/fbdev/chipsfb.c
index 206a66b61072..206a66b61072 100644
--- a/drivers/video/chipsfb.c
+++ b/drivers/video/fbdev/chipsfb.c
diff --git a/drivers/video/cirrusfb.c b/drivers/video/fbdev/cirrusfb.c
index d992aa5eb3f0..d992aa5eb3f0 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/fbdev/cirrusfb.c
diff --git a/drivers/video/clps711xfb.c b/drivers/video/fbdev/clps711xfb.c
index f00980607b8f..f00980607b8f 100644
--- a/drivers/video/clps711xfb.c
+++ b/drivers/video/fbdev/clps711xfb.c
diff --git a/drivers/video/cobalt_lcdfb.c b/drivers/video/fbdev/cobalt_lcdfb.c
index d5533f4db1cf..d5533f4db1cf 100644
--- a/drivers/video/cobalt_lcdfb.c
+++ b/drivers/video/fbdev/cobalt_lcdfb.c
diff --git a/drivers/video/controlfb.c b/drivers/video/fbdev/controlfb.c
index fdadef979238..fdadef979238 100644
--- a/drivers/video/controlfb.c
+++ b/drivers/video/fbdev/controlfb.c
diff --git a/drivers/video/controlfb.h b/drivers/video/fbdev/controlfb.h
index 6026c60fc100..6026c60fc100 100644
--- a/drivers/video/controlfb.h
+++ b/drivers/video/fbdev/controlfb.h
diff --git a/drivers/video/fbdev/core/Makefile b/drivers/video/fbdev/core/Makefile
new file mode 100644
index 000000000000..fa306538dac2
--- /dev/null
+++ b/drivers/video/fbdev/core/Makefile
@@ -0,0 +1,16 @@
1obj-y += fb_notify.o
2obj-$(CONFIG_FB) += fb.o
3fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
4 modedb.o fbcvt.o
5fb-objs := $(fb-y)
6
7obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o
8obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o
9obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o
10obj-$(CONFIG_FB_SYS_FILLRECT) += sysfillrect.o
11obj-$(CONFIG_FB_SYS_COPYAREA) += syscopyarea.o
12obj-$(CONFIG_FB_SYS_IMAGEBLIT) += sysimgblt.o
13obj-$(CONFIG_FB_SYS_FOPS) += fb_sys_fops.o
14obj-$(CONFIG_FB_SVGALIB) += svgalib.o
15obj-$(CONFIG_FB_DDC) += fb_ddc.o
16obj-$(CONFIG_FB_DEFERRED_IO) += fb_defio.o
diff --git a/drivers/video/cfbcopyarea.c b/drivers/video/fbdev/core/cfbcopyarea.c
index bcb57235fcc7..bcb57235fcc7 100644
--- a/drivers/video/cfbcopyarea.c
+++ b/drivers/video/fbdev/core/cfbcopyarea.c
diff --git a/drivers/video/cfbfillrect.c b/drivers/video/fbdev/core/cfbfillrect.c
index ba9f58b2a5e8..ba9f58b2a5e8 100644
--- a/drivers/video/cfbfillrect.c
+++ b/drivers/video/fbdev/core/cfbfillrect.c
diff --git a/drivers/video/cfbimgblt.c b/drivers/video/fbdev/core/cfbimgblt.c
index a2bb276a8b24..a2bb276a8b24 100644
--- a/drivers/video/cfbimgblt.c
+++ b/drivers/video/fbdev/core/cfbimgblt.c
diff --git a/drivers/video/fb_ddc.c b/drivers/video/fbdev/core/fb_ddc.c
index 2b106f046fde..94322ccfedde 100644
--- a/drivers/video/fb_ddc.c
+++ b/drivers/video/fbdev/core/fb_ddc.c
@@ -15,7 +15,7 @@
15#include <linux/i2c-algo-bit.h> 15#include <linux/i2c-algo-bit.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17 17
18#include "edid.h" 18#include "../edid.h"
19 19
20#define DDC_ADDR 0x50 20#define DDC_ADDR 0x50
21 21
diff --git a/drivers/video/fb_defio.c b/drivers/video/fbdev/core/fb_defio.c
index 900aa4ecd617..900aa4ecd617 100644
--- a/drivers/video/fb_defio.c
+++ b/drivers/video/fbdev/core/fb_defio.c
diff --git a/drivers/video/fb_draw.h b/drivers/video/fbdev/core/fb_draw.h
index 624ee115f129..624ee115f129 100644
--- a/drivers/video/fb_draw.h
+++ b/drivers/video/fbdev/core/fb_draw.h
diff --git a/drivers/video/fb_notify.c b/drivers/video/fbdev/core/fb_notify.c
index 74c2da528884..74c2da528884 100644
--- a/drivers/video/fb_notify.c
+++ b/drivers/video/fbdev/core/fb_notify.c
diff --git a/drivers/video/fb_sys_fops.c b/drivers/video/fbdev/core/fb_sys_fops.c
index ff275d7f3eaf..ff275d7f3eaf 100644
--- a/drivers/video/fb_sys_fops.c
+++ b/drivers/video/fbdev/core/fb_sys_fops.c
diff --git a/drivers/video/fbcmap.c b/drivers/video/fbdev/core/fbcmap.c
index f89245b8ba8e..f89245b8ba8e 100644
--- a/drivers/video/fbcmap.c
+++ b/drivers/video/fbdev/core/fbcmap.c
diff --git a/drivers/video/fbcvt.c b/drivers/video/fbdev/core/fbcvt.c
index 7cb715dfc0e1..7cb715dfc0e1 100644
--- a/drivers/video/fbcvt.c
+++ b/drivers/video/fbdev/core/fbcvt.c
diff --git a/drivers/video/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index b6d5008f361f..b6d5008f361f 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
diff --git a/drivers/video/fbmon.c b/drivers/video/fbdev/core/fbmon.c
index 6103fa6fb54f..c204ebe6187e 100644
--- a/drivers/video/fbmon.c
+++ b/drivers/video/fbdev/core/fbmon.c
@@ -37,7 +37,7 @@
37#include <asm/prom.h> 37#include <asm/prom.h>
38#include <asm/pci-bridge.h> 38#include <asm/pci-bridge.h>
39#endif 39#endif
40#include "edid.h" 40#include "../edid.h"
41 41
42/* 42/*
43 * EDID parser 43 * EDID parser
diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbdev/core/fbsysfs.c
index 53444ac19fe0..53444ac19fe0 100644
--- a/drivers/video/fbsysfs.c
+++ b/drivers/video/fbdev/core/fbsysfs.c
diff --git a/drivers/video/modedb.c b/drivers/video/fbdev/core/modedb.c
index a9a907c440d7..a9a907c440d7 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/fbdev/core/modedb.c
diff --git a/drivers/video/svgalib.c b/drivers/video/fbdev/core/svgalib.c
index 9e01322fabe3..9e01322fabe3 100644
--- a/drivers/video/svgalib.c
+++ b/drivers/video/fbdev/core/svgalib.c
diff --git a/drivers/video/syscopyarea.c b/drivers/video/fbdev/core/syscopyarea.c
index 844a32fd38ed..844a32fd38ed 100644
--- a/drivers/video/syscopyarea.c
+++ b/drivers/video/fbdev/core/syscopyarea.c
diff --git a/drivers/video/sysfillrect.c b/drivers/video/fbdev/core/sysfillrect.c
index 33ee3d34f9d2..33ee3d34f9d2 100644
--- a/drivers/video/sysfillrect.c
+++ b/drivers/video/fbdev/core/sysfillrect.c
diff --git a/drivers/video/sysimgblt.c b/drivers/video/fbdev/core/sysimgblt.c
index a4d05b1b17d7..a4d05b1b17d7 100644
--- a/drivers/video/sysimgblt.c
+++ b/drivers/video/fbdev/core/sysimgblt.c
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/fbdev/cyber2000fb.c
index b0a950f36970..b0a950f36970 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/fbdev/cyber2000fb.c
diff --git a/drivers/video/cyber2000fb.h b/drivers/video/fbdev/cyber2000fb.h
index bad69102e774..bad69102e774 100644
--- a/drivers/video/cyber2000fb.h
+++ b/drivers/video/fbdev/cyber2000fb.h
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/fbdev/da8xx-fb.c
index 0c0ba920ea48..6b23508ff0a5 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/fbdev/da8xx-fb.c
@@ -663,15 +663,7 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
663 (green << info->var.green.offset) | 663 (green << info->var.green.offset) |
664 (blue << info->var.blue.offset); 664 (blue << info->var.blue.offset);
665 665
666 switch (info->var.bits_per_pixel) { 666 ((u32 *) (info->pseudo_palette))[regno] = v;
667 case 16:
668 ((u16 *) (info->pseudo_palette))[regno] = v;
669 break;
670 case 24:
671 case 32:
672 ((u32 *) (info->pseudo_palette))[regno] = v;
673 break;
674 }
675 if (palette[0] != 0x4000) { 667 if (palette[0] != 0x4000) {
676 update_hw = 1; 668 update_hw = 1;
677 palette[0] = 0x4000; 669 palette[0] = 0x4000;
diff --git a/drivers/video/dnfb.c b/drivers/video/fbdev/dnfb.c
index 3526899da61b..3526899da61b 100644
--- a/drivers/video/dnfb.c
+++ b/drivers/video/fbdev/dnfb.c
diff --git a/drivers/video/edid.h b/drivers/video/fbdev/edid.h
index d03a232d90b2..d03a232d90b2 100644
--- a/drivers/video/edid.h
+++ b/drivers/video/fbdev/edid.h
diff --git a/drivers/video/efifb.c b/drivers/video/fbdev/efifb.c
index ae9618ff6735..ae9618ff6735 100644
--- a/drivers/video/efifb.c
+++ b/drivers/video/fbdev/efifb.c
diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/fbdev/ep93xx-fb.c
index 35a0f533f1a2..35a0f533f1a2 100644
--- a/drivers/video/ep93xx-fb.c
+++ b/drivers/video/fbdev/ep93xx-fb.c
diff --git a/drivers/video/exynos/Kconfig b/drivers/video/fbdev/exynos/Kconfig
index fcf2d48ac6d1..fcf2d48ac6d1 100644
--- a/drivers/video/exynos/Kconfig
+++ b/drivers/video/fbdev/exynos/Kconfig
diff --git a/drivers/video/exynos/Makefile b/drivers/video/fbdev/exynos/Makefile
index b5b1bd228abb..b5b1bd228abb 100644
--- a/drivers/video/exynos/Makefile
+++ b/drivers/video/fbdev/exynos/Makefile
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/fbdev/exynos/exynos_mipi_dsi.c
index cee9602f9a7b..cee9602f9a7b 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi.c
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/fbdev/exynos/exynos_mipi_dsi_common.c
index 85edabfdef5a..85edabfdef5a 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.c
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi_common.c
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.h b/drivers/video/fbdev/exynos/exynos_mipi_dsi_common.h
index 412552274df3..412552274df3 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.h
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi_common.h
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c b/drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.c
index c148d06540c1..c148d06540c1 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.c
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.h b/drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.h
index 85460701c7ea..85460701c7ea 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.h
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.h
diff --git a/drivers/video/exynos/exynos_mipi_dsi_regs.h b/drivers/video/fbdev/exynos/exynos_mipi_dsi_regs.h
index 4227106d3fd0..4227106d3fd0 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_regs.h
+++ b/drivers/video/fbdev/exynos/exynos_mipi_dsi_regs.h
diff --git a/drivers/video/exynos/s6e8ax0.c b/drivers/video/fbdev/exynos/s6e8ax0.c
index 29e70ed3f154..29e70ed3f154 100644
--- a/drivers/video/exynos/s6e8ax0.c
+++ b/drivers/video/fbdev/exynos/s6e8ax0.c
diff --git a/drivers/video/fb-puv3.c b/drivers/video/fbdev/fb-puv3.c
index 6db9ebd042a3..6db9ebd042a3 100644
--- a/drivers/video/fb-puv3.c
+++ b/drivers/video/fbdev/fb-puv3.c
diff --git a/drivers/video/ffb.c b/drivers/video/fbdev/ffb.c
index 4c4ffa61ae26..4c4ffa61ae26 100644
--- a/drivers/video/ffb.c
+++ b/drivers/video/fbdev/ffb.c
diff --git a/drivers/video/fm2fb.c b/drivers/video/fbdev/fm2fb.c
index e69d47af9932..e69d47af9932 100644
--- a/drivers/video/fm2fb.c
+++ b/drivers/video/fbdev/fm2fb.c
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fbdev/fsl-diu-fb.c
index e8758b9c3bcc..e8758b9c3bcc 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fbdev/fsl-diu-fb.c
diff --git a/drivers/video/g364fb.c b/drivers/video/fbdev/g364fb.c
index 223896cc5f7d..223896cc5f7d 100644
--- a/drivers/video/g364fb.c
+++ b/drivers/video/fbdev/g364fb.c
diff --git a/drivers/video/gbefb.c b/drivers/video/fbdev/gbefb.c
index 3ec65a878ac8..3ec65a878ac8 100644
--- a/drivers/video/gbefb.c
+++ b/drivers/video/fbdev/gbefb.c
diff --git a/drivers/video/geode/Kconfig b/drivers/video/fbdev/geode/Kconfig
index 1e8555284786..1e8555284786 100644
--- a/drivers/video/geode/Kconfig
+++ b/drivers/video/fbdev/geode/Kconfig
diff --git a/drivers/video/geode/Makefile b/drivers/video/fbdev/geode/Makefile
index 5c98da126883..5c98da126883 100644
--- a/drivers/video/geode/Makefile
+++ b/drivers/video/fbdev/geode/Makefile
diff --git a/drivers/video/geode/display_gx.c b/drivers/video/fbdev/geode/display_gx.c
index f0af911a096d..f0af911a096d 100644
--- a/drivers/video/geode/display_gx.c
+++ b/drivers/video/fbdev/geode/display_gx.c
diff --git a/drivers/video/geode/display_gx1.c b/drivers/video/fbdev/geode/display_gx1.c
index 926d53eeb549..926d53eeb549 100644
--- a/drivers/video/geode/display_gx1.c
+++ b/drivers/video/fbdev/geode/display_gx1.c
diff --git a/drivers/video/geode/display_gx1.h b/drivers/video/fbdev/geode/display_gx1.h
index 671c05558c79..671c05558c79 100644
--- a/drivers/video/geode/display_gx1.h
+++ b/drivers/video/fbdev/geode/display_gx1.h
diff --git a/drivers/video/geode/geodefb.h b/drivers/video/fbdev/geode/geodefb.h
index ae04820e0c57..ae04820e0c57 100644
--- a/drivers/video/geode/geodefb.h
+++ b/drivers/video/fbdev/geode/geodefb.h
diff --git a/drivers/video/geode/gx1fb_core.c b/drivers/video/fbdev/geode/gx1fb_core.c
index 2794ba11f332..2794ba11f332 100644
--- a/drivers/video/geode/gx1fb_core.c
+++ b/drivers/video/fbdev/geode/gx1fb_core.c
diff --git a/drivers/video/geode/gxfb.h b/drivers/video/fbdev/geode/gxfb.h
index d19e9378b0c0..d19e9378b0c0 100644
--- a/drivers/video/geode/gxfb.h
+++ b/drivers/video/fbdev/geode/gxfb.h
diff --git a/drivers/video/geode/gxfb_core.c b/drivers/video/fbdev/geode/gxfb_core.c
index 1790f14bab15..1790f14bab15 100644
--- a/drivers/video/geode/gxfb_core.c
+++ b/drivers/video/fbdev/geode/gxfb_core.c
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/fbdev/geode/lxfb.h
index cfcd8090f313..cfcd8090f313 100644
--- a/drivers/video/geode/lxfb.h
+++ b/drivers/video/fbdev/geode/lxfb.h
diff --git a/drivers/video/geode/lxfb_core.c b/drivers/video/fbdev/geode/lxfb_core.c
index 9e1d19d673a1..9e1d19d673a1 100644
--- a/drivers/video/geode/lxfb_core.c
+++ b/drivers/video/fbdev/geode/lxfb_core.c
diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/fbdev/geode/lxfb_ops.c
index 79e9abc72b83..79e9abc72b83 100644
--- a/drivers/video/geode/lxfb_ops.c
+++ b/drivers/video/fbdev/geode/lxfb_ops.c
diff --git a/drivers/video/geode/suspend_gx.c b/drivers/video/fbdev/geode/suspend_gx.c
index 1bb043d70c64..1bb043d70c64 100644
--- a/drivers/video/geode/suspend_gx.c
+++ b/drivers/video/fbdev/geode/suspend_gx.c
diff --git a/drivers/video/geode/video_cs5530.c b/drivers/video/fbdev/geode/video_cs5530.c
index 649c3943d431..649c3943d431 100644
--- a/drivers/video/geode/video_cs5530.c
+++ b/drivers/video/fbdev/geode/video_cs5530.c
diff --git a/drivers/video/geode/video_cs5530.h b/drivers/video/fbdev/geode/video_cs5530.h
index 56cecca7f1ce..56cecca7f1ce 100644
--- a/drivers/video/geode/video_cs5530.h
+++ b/drivers/video/fbdev/geode/video_cs5530.h
diff --git a/drivers/video/geode/video_gx.c b/drivers/video/fbdev/geode/video_gx.c
index 6082f653c68a..6082f653c68a 100644
--- a/drivers/video/geode/video_gx.c
+++ b/drivers/video/fbdev/geode/video_gx.c
diff --git a/drivers/video/goldfishfb.c b/drivers/video/fbdev/goldfishfb.c
index 7f6c9e6cfc6c..7f6c9e6cfc6c 100644
--- a/drivers/video/goldfishfb.c
+++ b/drivers/video/fbdev/goldfishfb.c
diff --git a/drivers/video/grvga.c b/drivers/video/fbdev/grvga.c
index c078701f15f6..c078701f15f6 100644
--- a/drivers/video/grvga.c
+++ b/drivers/video/fbdev/grvga.c
diff --git a/drivers/video/gxt4500.c b/drivers/video/fbdev/gxt4500.c
index 135d78a02588..135d78a02588 100644
--- a/drivers/video/gxt4500.c
+++ b/drivers/video/fbdev/gxt4500.c
diff --git a/drivers/video/hecubafb.c b/drivers/video/fbdev/hecubafb.c
index f64120ec9192..f64120ec9192 100644
--- a/drivers/video/hecubafb.c
+++ b/drivers/video/fbdev/hecubafb.c
diff --git a/drivers/video/hgafb.c b/drivers/video/fbdev/hgafb.c
index 5ff9fe2116a4..5ff9fe2116a4 100644
--- a/drivers/video/hgafb.c
+++ b/drivers/video/fbdev/hgafb.c
diff --git a/drivers/video/hitfb.c b/drivers/video/fbdev/hitfb.c
index a648d5186c6e..a648d5186c6e 100644
--- a/drivers/video/hitfb.c
+++ b/drivers/video/fbdev/hitfb.c
diff --git a/drivers/video/hpfb.c b/drivers/video/fbdev/hpfb.c
index a1b7e5fa9b09..a1b7e5fa9b09 100644
--- a/drivers/video/hpfb.c
+++ b/drivers/video/fbdev/hpfb.c
diff --git a/drivers/video/hyperv_fb.c b/drivers/video/fbdev/hyperv_fb.c
index e23392ec5af3..e23392ec5af3 100644
--- a/drivers/video/hyperv_fb.c
+++ b/drivers/video/fbdev/hyperv_fb.c
diff --git a/drivers/video/i740_reg.h b/drivers/video/fbdev/i740_reg.h
index 91bac76549d7..91bac76549d7 100644
--- a/drivers/video/i740_reg.h
+++ b/drivers/video/fbdev/i740_reg.h
diff --git a/drivers/video/i740fb.c b/drivers/video/fbdev/i740fb.c
index ca7c9df193b0..ca7c9df193b0 100644
--- a/drivers/video/i740fb.c
+++ b/drivers/video/fbdev/i740fb.c
diff --git a/drivers/video/i810/Makefile b/drivers/video/fbdev/i810/Makefile
index 96e08c8ded97..96e08c8ded97 100644
--- a/drivers/video/i810/Makefile
+++ b/drivers/video/fbdev/i810/Makefile
diff --git a/drivers/video/i810/i810-i2c.c b/drivers/video/fbdev/i810/i810-i2c.c
index 7db17d0d8a8c..7db17d0d8a8c 100644
--- a/drivers/video/i810/i810-i2c.c
+++ b/drivers/video/fbdev/i810/i810-i2c.c
diff --git a/drivers/video/i810/i810.h b/drivers/video/fbdev/i810/i810.h
index 1414b73ac55b..1414b73ac55b 100644
--- a/drivers/video/i810/i810.h
+++ b/drivers/video/fbdev/i810/i810.h
diff --git a/drivers/video/i810/i810_accel.c b/drivers/video/fbdev/i810/i810_accel.c
index 7672d2ea9b35..7672d2ea9b35 100644
--- a/drivers/video/i810/i810_accel.c
+++ b/drivers/video/fbdev/i810/i810_accel.c
diff --git a/drivers/video/i810/i810_dvt.c b/drivers/video/fbdev/i810/i810_dvt.c
index b4b3670667ab..b4b3670667ab 100644
--- a/drivers/video/i810/i810_dvt.c
+++ b/drivers/video/fbdev/i810/i810_dvt.c
diff --git a/drivers/video/i810/i810_gtf.c b/drivers/video/fbdev/i810/i810_gtf.c
index 9743d51e7f8c..9743d51e7f8c 100644
--- a/drivers/video/i810/i810_gtf.c
+++ b/drivers/video/fbdev/i810/i810_gtf.c
diff --git a/drivers/video/i810/i810_main.c b/drivers/video/fbdev/i810/i810_main.c
index bb674e431741..bb674e431741 100644
--- a/drivers/video/i810/i810_main.c
+++ b/drivers/video/fbdev/i810/i810_main.c
diff --git a/drivers/video/i810/i810_main.h b/drivers/video/fbdev/i810/i810_main.h
index a25afaa534ba..a25afaa534ba 100644
--- a/drivers/video/i810/i810_main.h
+++ b/drivers/video/fbdev/i810/i810_main.h
diff --git a/drivers/video/i810/i810_regs.h b/drivers/video/fbdev/i810/i810_regs.h
index 91c6bd9d0d0d..91c6bd9d0d0d 100644
--- a/drivers/video/i810/i810_regs.h
+++ b/drivers/video/fbdev/i810/i810_regs.h
diff --git a/drivers/video/igafb.c b/drivers/video/fbdev/igafb.c
index 486f18897414..486f18897414 100644
--- a/drivers/video/igafb.c
+++ b/drivers/video/fbdev/igafb.c
diff --git a/drivers/video/imsttfb.c b/drivers/video/fbdev/imsttfb.c
index aae10ce74f14..aae10ce74f14 100644
--- a/drivers/video/imsttfb.c
+++ b/drivers/video/fbdev/imsttfb.c
diff --git a/drivers/video/imxfb.c b/drivers/video/fbdev/imxfb.c
index f6e621684953..f6e621684953 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/fbdev/imxfb.c
diff --git a/drivers/video/intelfb/Makefile b/drivers/video/fbdev/intelfb/Makefile
index f7d631ebee8e..f7d631ebee8e 100644
--- a/drivers/video/intelfb/Makefile
+++ b/drivers/video/fbdev/intelfb/Makefile
diff --git a/drivers/video/intelfb/intelfb.h b/drivers/video/fbdev/intelfb/intelfb.h
index 6b51175629c7..6b51175629c7 100644
--- a/drivers/video/intelfb/intelfb.h
+++ b/drivers/video/fbdev/intelfb/intelfb.h
diff --git a/drivers/video/intelfb/intelfb_i2c.c b/drivers/video/fbdev/intelfb/intelfb_i2c.c
index 3300bd31d9d7..3300bd31d9d7 100644
--- a/drivers/video/intelfb/intelfb_i2c.c
+++ b/drivers/video/fbdev/intelfb/intelfb_i2c.c
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/fbdev/intelfb/intelfbdrv.c
index b847d530471a..b847d530471a 100644
--- a/drivers/video/intelfb/intelfbdrv.c
+++ b/drivers/video/fbdev/intelfb/intelfbdrv.c
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/fbdev/intelfb/intelfbhw.c
index fbad61da359f..fbad61da359f 100644
--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/fbdev/intelfb/intelfbhw.c
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/fbdev/intelfb/intelfbhw.h
index 216ca20f259f..216ca20f259f 100644
--- a/drivers/video/intelfb/intelfbhw.h
+++ b/drivers/video/fbdev/intelfb/intelfbhw.h
diff --git a/drivers/video/jz4740_fb.c b/drivers/video/fbdev/jz4740_fb.c
index 87790e9644d0..87790e9644d0 100644
--- a/drivers/video/jz4740_fb.c
+++ b/drivers/video/fbdev/jz4740_fb.c
diff --git a/drivers/video/kyro/Makefile b/drivers/video/fbdev/kyro/Makefile
index 2fd66f551bae..2fd66f551bae 100644
--- a/drivers/video/kyro/Makefile
+++ b/drivers/video/fbdev/kyro/Makefile
diff --git a/drivers/video/kyro/STG4000InitDevice.c b/drivers/video/fbdev/kyro/STG4000InitDevice.c
index 1d3f2080aa6f..1d3f2080aa6f 100644
--- a/drivers/video/kyro/STG4000InitDevice.c
+++ b/drivers/video/fbdev/kyro/STG4000InitDevice.c
diff --git a/drivers/video/kyro/STG4000Interface.h b/drivers/video/fbdev/kyro/STG4000Interface.h
index b7c83d5dfb13..b7c83d5dfb13 100644
--- a/drivers/video/kyro/STG4000Interface.h
+++ b/drivers/video/fbdev/kyro/STG4000Interface.h
diff --git a/drivers/video/kyro/STG4000OverlayDevice.c b/drivers/video/fbdev/kyro/STG4000OverlayDevice.c
index 0aeeaa10708b..0aeeaa10708b 100644
--- a/drivers/video/kyro/STG4000OverlayDevice.c
+++ b/drivers/video/fbdev/kyro/STG4000OverlayDevice.c
diff --git a/drivers/video/kyro/STG4000Ramdac.c b/drivers/video/fbdev/kyro/STG4000Ramdac.c
index e6ad037e4396..e6ad037e4396 100644
--- a/drivers/video/kyro/STG4000Ramdac.c
+++ b/drivers/video/fbdev/kyro/STG4000Ramdac.c
diff --git a/drivers/video/kyro/STG4000Reg.h b/drivers/video/fbdev/kyro/STG4000Reg.h
index 50f4670e9252..50f4670e9252 100644
--- a/drivers/video/kyro/STG4000Reg.h
+++ b/drivers/video/fbdev/kyro/STG4000Reg.h
diff --git a/drivers/video/kyro/STG4000VTG.c b/drivers/video/fbdev/kyro/STG4000VTG.c
index bd389709d234..bd389709d234 100644
--- a/drivers/video/kyro/STG4000VTG.c
+++ b/drivers/video/fbdev/kyro/STG4000VTG.c
diff --git a/drivers/video/kyro/fbdev.c b/drivers/video/fbdev/kyro/fbdev.c
index 65041e15fd59..65041e15fd59 100644
--- a/drivers/video/kyro/fbdev.c
+++ b/drivers/video/fbdev/kyro/fbdev.c
diff --git a/drivers/video/leo.c b/drivers/video/fbdev/leo.c
index 2c7f7d479fe2..2c7f7d479fe2 100644
--- a/drivers/video/leo.c
+++ b/drivers/video/fbdev/leo.c
diff --git a/drivers/video/macfb.c b/drivers/video/fbdev/macfb.c
index cda7587cbc86..cda7587cbc86 100644
--- a/drivers/video/macfb.c
+++ b/drivers/video/fbdev/macfb.c
diff --git a/drivers/video/macmodes.c b/drivers/video/fbdev/macmodes.c
index af86c081d2be..af86c081d2be 100644
--- a/drivers/video/macmodes.c
+++ b/drivers/video/fbdev/macmodes.c
diff --git a/drivers/video/macmodes.h b/drivers/video/fbdev/macmodes.h
index b86ba08aac9e..b86ba08aac9e 100644
--- a/drivers/video/macmodes.h
+++ b/drivers/video/fbdev/macmodes.h
diff --git a/drivers/video/matrox/Makefile b/drivers/video/fbdev/matrox/Makefile
index f9c00ebe2530..f9c00ebe2530 100644
--- a/drivers/video/matrox/Makefile
+++ b/drivers/video/fbdev/matrox/Makefile
diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/fbdev/matrox/g450_pll.c
index c15f8a57498e..c15f8a57498e 100644
--- a/drivers/video/matrox/g450_pll.c
+++ b/drivers/video/fbdev/matrox/g450_pll.c
diff --git a/drivers/video/matrox/g450_pll.h b/drivers/video/fbdev/matrox/g450_pll.h
index aac615d18440..aac615d18440 100644
--- a/drivers/video/matrox/g450_pll.h
+++ b/drivers/video/fbdev/matrox/g450_pll.h
diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/fbdev/matrox/i2c-matroxfb.c
index 0fb280ead3dc..0fb280ead3dc 100644
--- a/drivers/video/matrox/i2c-matroxfb.c
+++ b/drivers/video/fbdev/matrox/i2c-matroxfb.c
diff --git a/drivers/video/matrox/matroxfb_DAC1064.c b/drivers/video/fbdev/matrox/matroxfb_DAC1064.c
index a01147fdf270..a01147fdf270 100644
--- a/drivers/video/matrox/matroxfb_DAC1064.c
+++ b/drivers/video/fbdev/matrox/matroxfb_DAC1064.c
diff --git a/drivers/video/matrox/matroxfb_DAC1064.h b/drivers/video/fbdev/matrox/matroxfb_DAC1064.h
index 1e6e45b57b78..1e6e45b57b78 100644
--- a/drivers/video/matrox/matroxfb_DAC1064.h
+++ b/drivers/video/fbdev/matrox/matroxfb_DAC1064.h
diff --git a/drivers/video/matrox/matroxfb_Ti3026.c b/drivers/video/fbdev/matrox/matroxfb_Ti3026.c
index 195ad7cac1ba..195ad7cac1ba 100644
--- a/drivers/video/matrox/matroxfb_Ti3026.c
+++ b/drivers/video/fbdev/matrox/matroxfb_Ti3026.c
diff --git a/drivers/video/matrox/matroxfb_Ti3026.h b/drivers/video/fbdev/matrox/matroxfb_Ti3026.h
index 27872aaa0a17..27872aaa0a17 100644
--- a/drivers/video/matrox/matroxfb_Ti3026.h
+++ b/drivers/video/fbdev/matrox/matroxfb_Ti3026.h
diff --git a/drivers/video/matrox/matroxfb_accel.c b/drivers/video/fbdev/matrox/matroxfb_accel.c
index 0d5cb85d071a..0d5cb85d071a 100644
--- a/drivers/video/matrox/matroxfb_accel.c
+++ b/drivers/video/fbdev/matrox/matroxfb_accel.c
diff --git a/drivers/video/matrox/matroxfb_accel.h b/drivers/video/fbdev/matrox/matroxfb_accel.h
index 1e418e62c22d..1e418e62c22d 100644
--- a/drivers/video/matrox/matroxfb_accel.h
+++ b/drivers/video/fbdev/matrox/matroxfb_accel.h
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/fbdev/matrox/matroxfb_base.c
index 7116c5309c7d..7116c5309c7d 100644
--- a/drivers/video/matrox/matroxfb_base.c
+++ b/drivers/video/fbdev/matrox/matroxfb_base.c
diff --git a/drivers/video/matrox/matroxfb_base.h b/drivers/video/fbdev/matrox/matroxfb_base.h
index 556d96ce40bf..556d96ce40bf 100644
--- a/drivers/video/matrox/matroxfb_base.h
+++ b/drivers/video/fbdev/matrox/matroxfb_base.h
diff --git a/drivers/video/matrox/matroxfb_crtc2.c b/drivers/video/fbdev/matrox/matroxfb_crtc2.c
index 02796a4317a9..02796a4317a9 100644
--- a/drivers/video/matrox/matroxfb_crtc2.c
+++ b/drivers/video/fbdev/matrox/matroxfb_crtc2.c
diff --git a/drivers/video/matrox/matroxfb_crtc2.h b/drivers/video/fbdev/matrox/matroxfb_crtc2.h
index 1005582e843e..1005582e843e 100644
--- a/drivers/video/matrox/matroxfb_crtc2.h
+++ b/drivers/video/fbdev/matrox/matroxfb_crtc2.h
diff --git a/drivers/video/matrox/matroxfb_g450.c b/drivers/video/fbdev/matrox/matroxfb_g450.c
index cff0546ea6fd..cff0546ea6fd 100644
--- a/drivers/video/matrox/matroxfb_g450.c
+++ b/drivers/video/fbdev/matrox/matroxfb_g450.c
diff --git a/drivers/video/matrox/matroxfb_g450.h b/drivers/video/fbdev/matrox/matroxfb_g450.h
index 3a3e654444b8..3a3e654444b8 100644
--- a/drivers/video/matrox/matroxfb_g450.h
+++ b/drivers/video/fbdev/matrox/matroxfb_g450.h
diff --git a/drivers/video/matrox/matroxfb_maven.c b/drivers/video/fbdev/matrox/matroxfb_maven.c
index ee41a0f276b2..ee41a0f276b2 100644
--- a/drivers/video/matrox/matroxfb_maven.c
+++ b/drivers/video/fbdev/matrox/matroxfb_maven.c
diff --git a/drivers/video/matrox/matroxfb_maven.h b/drivers/video/fbdev/matrox/matroxfb_maven.h
index 99eddec9f30c..99eddec9f30c 100644
--- a/drivers/video/matrox/matroxfb_maven.h
+++ b/drivers/video/fbdev/matrox/matroxfb_maven.h
diff --git a/drivers/video/matrox/matroxfb_misc.c b/drivers/video/fbdev/matrox/matroxfb_misc.c
index 9948ca2a3046..9948ca2a3046 100644
--- a/drivers/video/matrox/matroxfb_misc.c
+++ b/drivers/video/fbdev/matrox/matroxfb_misc.c
diff --git a/drivers/video/matrox/matroxfb_misc.h b/drivers/video/fbdev/matrox/matroxfb_misc.h
index 351c823f1f74..351c823f1f74 100644
--- a/drivers/video/matrox/matroxfb_misc.h
+++ b/drivers/video/fbdev/matrox/matroxfb_misc.h
diff --git a/drivers/video/maxinefb.c b/drivers/video/fbdev/maxinefb.c
index 5cf52d3c8e75..5cf52d3c8e75 100644
--- a/drivers/video/maxinefb.c
+++ b/drivers/video/fbdev/maxinefb.c
diff --git a/drivers/video/mb862xx/Makefile b/drivers/video/fbdev/mb862xx/Makefile
index 5707ed0e31a7..5707ed0e31a7 100644
--- a/drivers/video/mb862xx/Makefile
+++ b/drivers/video/fbdev/mb862xx/Makefile
diff --git a/drivers/video/mb862xx/mb862xx-i2c.c b/drivers/video/fbdev/mb862xx/mb862xx-i2c.c
index c87e17afb3e2..c87e17afb3e2 100644
--- a/drivers/video/mb862xx/mb862xx-i2c.c
+++ b/drivers/video/fbdev/mb862xx/mb862xx-i2c.c
diff --git a/drivers/video/mb862xx/mb862xx_reg.h b/drivers/video/fbdev/mb862xx/mb862xx_reg.h
index 9df48b8edc94..9df48b8edc94 100644
--- a/drivers/video/mb862xx/mb862xx_reg.h
+++ b/drivers/video/fbdev/mb862xx/mb862xx_reg.h
diff --git a/drivers/video/mb862xx/mb862xxfb.h b/drivers/video/fbdev/mb862xx/mb862xxfb.h
index 8550630c1e01..8550630c1e01 100644
--- a/drivers/video/mb862xx/mb862xxfb.h
+++ b/drivers/video/fbdev/mb862xx/mb862xxfb.h
diff --git a/drivers/video/mb862xx/mb862xxfb_accel.c b/drivers/video/fbdev/mb862xx/mb862xxfb_accel.c
index fe92eed6da70..fe92eed6da70 100644
--- a/drivers/video/mb862xx/mb862xxfb_accel.c
+++ b/drivers/video/fbdev/mb862xx/mb862xxfb_accel.c
diff --git a/drivers/video/mb862xx/mb862xxfb_accel.h b/drivers/video/fbdev/mb862xx/mb862xxfb_accel.h
index 96a2dfef0f60..96a2dfef0f60 100644
--- a/drivers/video/mb862xx/mb862xxfb_accel.h
+++ b/drivers/video/fbdev/mb862xx/mb862xxfb_accel.h
diff --git a/drivers/video/mb862xx/mb862xxfbdrv.c b/drivers/video/fbdev/mb862xx/mb862xxfbdrv.c
index 0cd4c3318511..0cd4c3318511 100644
--- a/drivers/video/mb862xx/mb862xxfbdrv.c
+++ b/drivers/video/fbdev/mb862xx/mb862xxfbdrv.c
diff --git a/drivers/video/mbx/Makefile b/drivers/video/fbdev/mbx/Makefile
index 16c1165cf9c7..16c1165cf9c7 100644
--- a/drivers/video/mbx/Makefile
+++ b/drivers/video/fbdev/mbx/Makefile
diff --git a/drivers/video/mbx/mbxdebugfs.c b/drivers/video/fbdev/mbx/mbxdebugfs.c
index 4449f249b0e7..4449f249b0e7 100644
--- a/drivers/video/mbx/mbxdebugfs.c
+++ b/drivers/video/fbdev/mbx/mbxdebugfs.c
diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/fbdev/mbx/mbxfb.c
index f0a5392f5fd3..f0a5392f5fd3 100644
--- a/drivers/video/mbx/mbxfb.c
+++ b/drivers/video/fbdev/mbx/mbxfb.c
diff --git a/drivers/video/mbx/reg_bits.h b/drivers/video/fbdev/mbx/reg_bits.h
index 5f14b4befd71..5f14b4befd71 100644
--- a/drivers/video/mbx/reg_bits.h
+++ b/drivers/video/fbdev/mbx/reg_bits.h
diff --git a/drivers/video/mbx/regs.h b/drivers/video/fbdev/mbx/regs.h
index 063099d48839..063099d48839 100644
--- a/drivers/video/mbx/regs.h
+++ b/drivers/video/fbdev/mbx/regs.h
diff --git a/drivers/video/metronomefb.c b/drivers/video/fbdev/metronomefb.c
index 195cc2db4c2c..195cc2db4c2c 100644
--- a/drivers/video/metronomefb.c
+++ b/drivers/video/fbdev/metronomefb.c
diff --git a/drivers/video/mmp/Kconfig b/drivers/video/fbdev/mmp/Kconfig
index e9ea39e13722..d4a4ffc24749 100644
--- a/drivers/video/mmp/Kconfig
+++ b/drivers/video/fbdev/mmp/Kconfig
@@ -5,7 +5,7 @@ menuconfig MMP_DISP
5 Marvell Display Subsystem support. 5 Marvell Display Subsystem support.
6 6
7if MMP_DISP 7if MMP_DISP
8source "drivers/video/mmp/hw/Kconfig" 8source "drivers/video/fbdev/mmp/hw/Kconfig"
9source "drivers/video/mmp/panel/Kconfig" 9source "drivers/video/fbdev/mmp/panel/Kconfig"
10source "drivers/video/mmp/fb/Kconfig" 10source "drivers/video/fbdev/mmp/fb/Kconfig"
11endif 11endif
diff --git a/drivers/video/mmp/Makefile b/drivers/video/fbdev/mmp/Makefile
index a014cb358bf8..a014cb358bf8 100644
--- a/drivers/video/mmp/Makefile
+++ b/drivers/video/fbdev/mmp/Makefile
diff --git a/drivers/video/mmp/core.c b/drivers/video/fbdev/mmp/core.c
index b563b920f159..b563b920f159 100644
--- a/drivers/video/mmp/core.c
+++ b/drivers/video/fbdev/mmp/core.c
diff --git a/drivers/video/mmp/fb/Kconfig b/drivers/video/fbdev/mmp/fb/Kconfig
index 9b0141f105f5..9b0141f105f5 100644
--- a/drivers/video/mmp/fb/Kconfig
+++ b/drivers/video/fbdev/mmp/fb/Kconfig
diff --git a/drivers/video/mmp/fb/Makefile b/drivers/video/fbdev/mmp/fb/Makefile
index 709fd1f76abe..709fd1f76abe 100644
--- a/drivers/video/mmp/fb/Makefile
+++ b/drivers/video/fbdev/mmp/fb/Makefile
diff --git a/drivers/video/mmp/fb/mmpfb.c b/drivers/video/fbdev/mmp/fb/mmpfb.c
index 7ab31eb76a8c..7ab31eb76a8c 100644
--- a/drivers/video/mmp/fb/mmpfb.c
+++ b/drivers/video/fbdev/mmp/fb/mmpfb.c
diff --git a/drivers/video/mmp/fb/mmpfb.h b/drivers/video/fbdev/mmp/fb/mmpfb.h
index 88c23c10a9ec..88c23c10a9ec 100644
--- a/drivers/video/mmp/fb/mmpfb.h
+++ b/drivers/video/fbdev/mmp/fb/mmpfb.h
diff --git a/drivers/video/mmp/hw/Kconfig b/drivers/video/fbdev/mmp/hw/Kconfig
index 02f109a20cd0..02f109a20cd0 100644
--- a/drivers/video/mmp/hw/Kconfig
+++ b/drivers/video/fbdev/mmp/hw/Kconfig
diff --git a/drivers/video/mmp/hw/Makefile b/drivers/video/fbdev/mmp/hw/Makefile
index 0000a714fedf..0000a714fedf 100644
--- a/drivers/video/mmp/hw/Makefile
+++ b/drivers/video/fbdev/mmp/hw/Makefile
diff --git a/drivers/video/mmp/hw/mmp_ctrl.c b/drivers/video/fbdev/mmp/hw/mmp_ctrl.c
index 8621a9f2bdcc..8621a9f2bdcc 100644
--- a/drivers/video/mmp/hw/mmp_ctrl.c
+++ b/drivers/video/fbdev/mmp/hw/mmp_ctrl.c
diff --git a/drivers/video/mmp/hw/mmp_ctrl.h b/drivers/video/fbdev/mmp/hw/mmp_ctrl.h
index 53301cfdb1ae..53301cfdb1ae 100644
--- a/drivers/video/mmp/hw/mmp_ctrl.h
+++ b/drivers/video/fbdev/mmp/hw/mmp_ctrl.h
diff --git a/drivers/video/mmp/hw/mmp_spi.c b/drivers/video/fbdev/mmp/hw/mmp_spi.c
index e62ca7bf0d5e..e62ca7bf0d5e 100644
--- a/drivers/video/mmp/hw/mmp_spi.c
+++ b/drivers/video/fbdev/mmp/hw/mmp_spi.c
diff --git a/drivers/video/mmp/panel/Kconfig b/drivers/video/fbdev/mmp/panel/Kconfig
index 4b2c4f457b11..4b2c4f457b11 100644
--- a/drivers/video/mmp/panel/Kconfig
+++ b/drivers/video/fbdev/mmp/panel/Kconfig
diff --git a/drivers/video/mmp/panel/Makefile b/drivers/video/fbdev/mmp/panel/Makefile
index 2f91611c7e5e..2f91611c7e5e 100644
--- a/drivers/video/mmp/panel/Makefile
+++ b/drivers/video/fbdev/mmp/panel/Makefile
diff --git a/drivers/video/mmp/panel/tpo_tj032md01bw.c b/drivers/video/fbdev/mmp/panel/tpo_tj032md01bw.c
index 998978b08f5e..998978b08f5e 100644
--- a/drivers/video/mmp/panel/tpo_tj032md01bw.c
+++ b/drivers/video/fbdev/mmp/panel/tpo_tj032md01bw.c
diff --git a/drivers/video/msm/Makefile b/drivers/video/fbdev/msm/Makefile
index 802d6ae523fb..802d6ae523fb 100644
--- a/drivers/video/msm/Makefile
+++ b/drivers/video/fbdev/msm/Makefile
diff --git a/drivers/video/msm/mddi.c b/drivers/video/fbdev/msm/mddi.c
index e0f8011a3c4b..e0f8011a3c4b 100644
--- a/drivers/video/msm/mddi.c
+++ b/drivers/video/fbdev/msm/mddi.c
diff --git a/drivers/video/msm/mddi_client_dummy.c b/drivers/video/fbdev/msm/mddi_client_dummy.c
index f1b0dfcc9717..f1b0dfcc9717 100644
--- a/drivers/video/msm/mddi_client_dummy.c
+++ b/drivers/video/fbdev/msm/mddi_client_dummy.c
diff --git a/drivers/video/msm/mddi_client_nt35399.c b/drivers/video/fbdev/msm/mddi_client_nt35399.c
index f96df32e5509..f96df32e5509 100644
--- a/drivers/video/msm/mddi_client_nt35399.c
+++ b/drivers/video/fbdev/msm/mddi_client_nt35399.c
diff --git a/drivers/video/msm/mddi_client_toshiba.c b/drivers/video/fbdev/msm/mddi_client_toshiba.c
index 061d7dfebbf3..061d7dfebbf3 100644
--- a/drivers/video/msm/mddi_client_toshiba.c
+++ b/drivers/video/fbdev/msm/mddi_client_toshiba.c
diff --git a/drivers/video/msm/mddi_hw.h b/drivers/video/fbdev/msm/mddi_hw.h
index 45cc01fc1e7f..45cc01fc1e7f 100644
--- a/drivers/video/msm/mddi_hw.h
+++ b/drivers/video/fbdev/msm/mddi_hw.h
diff --git a/drivers/video/msm/mdp.c b/drivers/video/fbdev/msm/mdp.c
index 113c7876c855..113c7876c855 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/fbdev/msm/mdp.c
diff --git a/drivers/video/msm/mdp_csc_table.h b/drivers/video/fbdev/msm/mdp_csc_table.h
index d1cde30ead52..d1cde30ead52 100644
--- a/drivers/video/msm/mdp_csc_table.h
+++ b/drivers/video/fbdev/msm/mdp_csc_table.h
diff --git a/drivers/video/msm/mdp_hw.h b/drivers/video/fbdev/msm/mdp_hw.h
index 35848d741001..35848d741001 100644
--- a/drivers/video/msm/mdp_hw.h
+++ b/drivers/video/fbdev/msm/mdp_hw.h
diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/fbdev/msm/mdp_ppp.c
index be6079cdfbb6..be6079cdfbb6 100644
--- a/drivers/video/msm/mdp_ppp.c
+++ b/drivers/video/fbdev/msm/mdp_ppp.c
diff --git a/drivers/video/msm/mdp_scale_tables.c b/drivers/video/fbdev/msm/mdp_scale_tables.c
index 604783b2e17c..604783b2e17c 100644
--- a/drivers/video/msm/mdp_scale_tables.c
+++ b/drivers/video/fbdev/msm/mdp_scale_tables.c
diff --git a/drivers/video/msm/mdp_scale_tables.h b/drivers/video/fbdev/msm/mdp_scale_tables.h
index 34077b1af603..34077b1af603 100644
--- a/drivers/video/msm/mdp_scale_tables.h
+++ b/drivers/video/fbdev/msm/mdp_scale_tables.h
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/fbdev/msm/msm_fb.c
index 1374803fbcd9..1374803fbcd9 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/fbdev/msm/msm_fb.c
diff --git a/drivers/video/mx3fb.c b/drivers/video/fbdev/mx3fb.c
index 142e860fb527..142e860fb527 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/fbdev/mx3fb.c
diff --git a/drivers/video/mxsfb.c b/drivers/video/fbdev/mxsfb.c
index accf48a2cce4..accf48a2cce4 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/fbdev/mxsfb.c
diff --git a/drivers/video/n411.c b/drivers/video/fbdev/n411.c
index 935830fea7b6..935830fea7b6 100644
--- a/drivers/video/n411.c
+++ b/drivers/video/fbdev/n411.c
diff --git a/drivers/video/neofb.c b/drivers/video/fbdev/neofb.c
index 44f99a60bb9b..44f99a60bb9b 100644
--- a/drivers/video/neofb.c
+++ b/drivers/video/fbdev/neofb.c
diff --git a/drivers/video/nuc900fb.c b/drivers/video/fbdev/nuc900fb.c
index 478f9808dee4..478f9808dee4 100644
--- a/drivers/video/nuc900fb.c
+++ b/drivers/video/fbdev/nuc900fb.c
diff --git a/drivers/video/nuc900fb.h b/drivers/video/fbdev/nuc900fb.h
index 9a1ca6dbb6b2..9a1ca6dbb6b2 100644
--- a/drivers/video/nuc900fb.h
+++ b/drivers/video/fbdev/nuc900fb.h
diff --git a/drivers/video/nvidia/Makefile b/drivers/video/fbdev/nvidia/Makefile
index ca47432113e0..ca47432113e0 100644
--- a/drivers/video/nvidia/Makefile
+++ b/drivers/video/fbdev/nvidia/Makefile
diff --git a/drivers/video/nvidia/nv_accel.c b/drivers/video/fbdev/nvidia/nv_accel.c
index ad6472a894ea..ad6472a894ea 100644
--- a/drivers/video/nvidia/nv_accel.c
+++ b/drivers/video/fbdev/nvidia/nv_accel.c
diff --git a/drivers/video/nvidia/nv_backlight.c b/drivers/video/fbdev/nvidia/nv_backlight.c
index 8471008aa6ff..8471008aa6ff 100644
--- a/drivers/video/nvidia/nv_backlight.c
+++ b/drivers/video/fbdev/nvidia/nv_backlight.c
diff --git a/drivers/video/nvidia/nv_dma.h b/drivers/video/fbdev/nvidia/nv_dma.h
index a7ed1c0acbbb..a7ed1c0acbbb 100644
--- a/drivers/video/nvidia/nv_dma.h
+++ b/drivers/video/fbdev/nvidia/nv_dma.h
diff --git a/drivers/video/nvidia/nv_hw.c b/drivers/video/fbdev/nvidia/nv_hw.c
index 81c80ac3c76f..81c80ac3c76f 100644
--- a/drivers/video/nvidia/nv_hw.c
+++ b/drivers/video/fbdev/nvidia/nv_hw.c
diff --git a/drivers/video/nvidia/nv_i2c.c b/drivers/video/fbdev/nvidia/nv_i2c.c
index d7994a173245..d7994a173245 100644
--- a/drivers/video/nvidia/nv_i2c.c
+++ b/drivers/video/fbdev/nvidia/nv_i2c.c
diff --git a/drivers/video/nvidia/nv_local.h b/drivers/video/fbdev/nvidia/nv_local.h
index 68e508daa417..68e508daa417 100644
--- a/drivers/video/nvidia/nv_local.h
+++ b/drivers/video/fbdev/nvidia/nv_local.h
diff --git a/drivers/video/nvidia/nv_of.c b/drivers/video/fbdev/nvidia/nv_of.c
index 3bc13df4b120..3bc13df4b120 100644
--- a/drivers/video/nvidia/nv_of.c
+++ b/drivers/video/fbdev/nvidia/nv_of.c
diff --git a/drivers/video/nvidia/nv_proto.h b/drivers/video/fbdev/nvidia/nv_proto.h
index ff5c410355ea..ff5c410355ea 100644
--- a/drivers/video/nvidia/nv_proto.h
+++ b/drivers/video/fbdev/nvidia/nv_proto.h
diff --git a/drivers/video/nvidia/nv_setup.c b/drivers/video/fbdev/nvidia/nv_setup.c
index 2f2e162134fa..2f2e162134fa 100644
--- a/drivers/video/nvidia/nv_setup.c
+++ b/drivers/video/fbdev/nvidia/nv_setup.c
diff --git a/drivers/video/nvidia/nv_type.h b/drivers/video/fbdev/nvidia/nv_type.h
index c03f7f55c76d..c03f7f55c76d 100644
--- a/drivers/video/nvidia/nv_type.h
+++ b/drivers/video/fbdev/nvidia/nv_type.h
diff --git a/drivers/video/nvidia/nvidia.c b/drivers/video/fbdev/nvidia/nvidia.c
index def041204676..def041204676 100644
--- a/drivers/video/nvidia/nvidia.c
+++ b/drivers/video/fbdev/nvidia/nvidia.c
diff --git a/drivers/video/ocfb.c b/drivers/video/fbdev/ocfb.c
index 7f9dc9bec309..7f9dc9bec309 100644
--- a/drivers/video/ocfb.c
+++ b/drivers/video/fbdev/ocfb.c
diff --git a/drivers/video/offb.c b/drivers/video/fbdev/offb.c
index 7d44d669d5b6..7d44d669d5b6 100644
--- a/drivers/video/offb.c
+++ b/drivers/video/fbdev/offb.c
diff --git a/drivers/video/omap/Kconfig b/drivers/video/fbdev/omap/Kconfig
index 0bc3a936ce2b..0bc3a936ce2b 100644
--- a/drivers/video/omap/Kconfig
+++ b/drivers/video/fbdev/omap/Kconfig
diff --git a/drivers/video/omap/Makefile b/drivers/video/fbdev/omap/Makefile
index 1927faffb5bc..1927faffb5bc 100644
--- a/drivers/video/omap/Makefile
+++ b/drivers/video/fbdev/omap/Makefile
diff --git a/drivers/video/omap/hwa742.c b/drivers/video/fbdev/omap/hwa742.c
index a4ee65b8f918..a4ee65b8f918 100644
--- a/drivers/video/omap/hwa742.c
+++ b/drivers/video/fbdev/omap/hwa742.c
diff --git a/drivers/video/omap/lcd_ams_delta.c b/drivers/video/fbdev/omap/lcd_ams_delta.c
index 4a5f2cd3d3bf..4a5f2cd3d3bf 100644
--- a/drivers/video/omap/lcd_ams_delta.c
+++ b/drivers/video/fbdev/omap/lcd_ams_delta.c
diff --git a/drivers/video/omap/lcd_h3.c b/drivers/video/fbdev/omap/lcd_h3.c
index 49bdeca81e50..49bdeca81e50 100644
--- a/drivers/video/omap/lcd_h3.c
+++ b/drivers/video/fbdev/omap/lcd_h3.c
diff --git a/drivers/video/omap/lcd_htcherald.c b/drivers/video/fbdev/omap/lcd_htcherald.c
index 20f477851d54..20f477851d54 100644
--- a/drivers/video/omap/lcd_htcherald.c
+++ b/drivers/video/fbdev/omap/lcd_htcherald.c
diff --git a/drivers/video/omap/lcd_inn1510.c b/drivers/video/fbdev/omap/lcd_inn1510.c
index 2ee423279e35..2ee423279e35 100644
--- a/drivers/video/omap/lcd_inn1510.c
+++ b/drivers/video/fbdev/omap/lcd_inn1510.c
diff --git a/drivers/video/omap/lcd_inn1610.c b/drivers/video/fbdev/omap/lcd_inn1610.c
index e3d3d135aa48..e3d3d135aa48 100644
--- a/drivers/video/omap/lcd_inn1610.c
+++ b/drivers/video/fbdev/omap/lcd_inn1610.c
diff --git a/drivers/video/omap/lcd_mipid.c b/drivers/video/fbdev/omap/lcd_mipid.c
index 803fee618d57..803fee618d57 100644
--- a/drivers/video/omap/lcd_mipid.c
+++ b/drivers/video/fbdev/omap/lcd_mipid.c
diff --git a/drivers/video/omap/lcd_osk.c b/drivers/video/fbdev/omap/lcd_osk.c
index 7fbe04bce0ed..7fbe04bce0ed 100644
--- a/drivers/video/omap/lcd_osk.c
+++ b/drivers/video/fbdev/omap/lcd_osk.c
diff --git a/drivers/video/omap/lcd_palmte.c b/drivers/video/fbdev/omap/lcd_palmte.c
index ff4fb624b904..ff4fb624b904 100644
--- a/drivers/video/omap/lcd_palmte.c
+++ b/drivers/video/fbdev/omap/lcd_palmte.c
diff --git a/drivers/video/omap/lcd_palmtt.c b/drivers/video/fbdev/omap/lcd_palmtt.c
index aaf3c8ba1243..aaf3c8ba1243 100644
--- a/drivers/video/omap/lcd_palmtt.c
+++ b/drivers/video/fbdev/omap/lcd_palmtt.c
diff --git a/drivers/video/omap/lcd_palmz71.c b/drivers/video/fbdev/omap/lcd_palmz71.c
index 3b7d8aa1cf34..3b7d8aa1cf34 100644
--- a/drivers/video/omap/lcd_palmz71.c
+++ b/drivers/video/fbdev/omap/lcd_palmz71.c
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c
index b52f62595f65..b52f62595f65 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/fbdev/omap/lcdc.c
diff --git a/drivers/video/omap/lcdc.h b/drivers/video/fbdev/omap/lcdc.h
index 845222270db3..845222270db3 100644
--- a/drivers/video/omap/lcdc.h
+++ b/drivers/video/fbdev/omap/lcdc.h
diff --git a/drivers/video/omap/omapfb.h b/drivers/video/fbdev/omap/omapfb.h
index 2921d20e4fba..2921d20e4fba 100644
--- a/drivers/video/omap/omapfb.h
+++ b/drivers/video/fbdev/omap/omapfb.h
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/fbdev/omap/omapfb_main.c
index e4fc6d9b5371..e4fc6d9b5371 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/fbdev/omap/omapfb_main.c
diff --git a/drivers/video/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c
index d4e7684e7045..d4e7684e7045 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/fbdev/omap/sossi.c
diff --git a/drivers/video/fbdev/omap2/Kconfig b/drivers/video/fbdev/omap2/Kconfig
new file mode 100644
index 000000000000..c22955d2de9a
--- /dev/null
+++ b/drivers/video/fbdev/omap2/Kconfig
@@ -0,0 +1,10 @@
1config OMAP2_VRFB
2 bool
3
4if ARCH_OMAP2PLUS
5
6source "drivers/video/fbdev/omap2/dss/Kconfig"
7source "drivers/video/fbdev/omap2/omapfb/Kconfig"
8source "drivers/video/fbdev/omap2/displays-new/Kconfig"
9
10endif
diff --git a/drivers/video/omap2/Makefile b/drivers/video/fbdev/omap2/Makefile
index bf8127df8c71..bf8127df8c71 100644
--- a/drivers/video/omap2/Makefile
+++ b/drivers/video/fbdev/omap2/Makefile
diff --git a/drivers/video/omap2/displays-new/Kconfig b/drivers/video/fbdev/omap2/displays-new/Kconfig
index e6cfc38160d3..e6cfc38160d3 100644
--- a/drivers/video/omap2/displays-new/Kconfig
+++ b/drivers/video/fbdev/omap2/displays-new/Kconfig
diff --git a/drivers/video/omap2/displays-new/Makefile b/drivers/video/fbdev/omap2/displays-new/Makefile
index 0323a8a1c682..0323a8a1c682 100644
--- a/drivers/video/omap2/displays-new/Makefile
+++ b/drivers/video/fbdev/omap2/displays-new/Makefile
diff --git a/drivers/video/omap2/displays-new/connector-analog-tv.c b/drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c
index 5ee3b5505f7f..5ee3b5505f7f 100644
--- a/drivers/video/omap2/displays-new/connector-analog-tv.c
+++ b/drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c
diff --git a/drivers/video/omap2/displays-new/connector-dvi.c b/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
index 74de2bc50c4f..74de2bc50c4f 100644
--- a/drivers/video/omap2/displays-new/connector-dvi.c
+++ b/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
diff --git a/drivers/video/omap2/displays-new/connector-hdmi.c b/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
index 29ed21b9dce5..29ed21b9dce5 100644
--- a/drivers/video/omap2/displays-new/connector-hdmi.c
+++ b/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
diff --git a/drivers/video/omap2/displays-new/encoder-tfp410.c b/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
index b4e9a42a79e6..b4e9a42a79e6 100644
--- a/drivers/video/omap2/displays-new/encoder-tfp410.c
+++ b/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
diff --git a/drivers/video/omap2/displays-new/encoder-tpd12s015.c b/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
index 7e33686171e3..7e33686171e3 100644
--- a/drivers/video/omap2/displays-new/encoder-tpd12s015.c
+++ b/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
diff --git a/drivers/video/omap2/displays-new/panel-dpi.c b/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
index 5f8f7e7c81ef..5f8f7e7c81ef 100644
--- a/drivers/video/omap2/displays-new/panel-dpi.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
diff --git a/drivers/video/omap2/displays-new/panel-dsi-cm.c b/drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c
index d6f14e8717e8..d6f14e8717e8 100644
--- a/drivers/video/omap2/displays-new/panel-dsi-cm.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c
diff --git a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c b/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
index 2e6b513222d9..2e6b513222d9 100644
--- a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
diff --git a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c b/drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c
index 996fa004b48c..996fa004b48c 100644
--- a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c
diff --git a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c b/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
index b2f710be565d..b2f710be565d 100644
--- a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
diff --git a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
index c7ba4d8b928a..c7ba4d8b928a 100644
--- a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
diff --git a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
index fae6adc005a7..fae6adc005a7 100644
--- a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
diff --git a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
index 875b40263b33..875b40263b33 100644
--- a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/fbdev/omap2/dss/Kconfig
index dde4281663b1..dde4281663b1 100644
--- a/drivers/video/omap2/dss/Kconfig
+++ b/drivers/video/fbdev/omap2/dss/Kconfig
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/fbdev/omap2/dss/Makefile
index 8aec8bda27cc..8aec8bda27cc 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/fbdev/omap2/dss/Makefile
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/fbdev/omap2/dss/apply.c
index 0a0b084ce65d..0a0b084ce65d 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/fbdev/omap2/dss/apply.c
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/fbdev/omap2/dss/core.c
index ffa45c894cd4..ffa45c894cd4 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/fbdev/omap2/dss/core.c
diff --git a/drivers/video/omap2/dss/dispc-compat.c b/drivers/video/fbdev/omap2/dss/dispc-compat.c
index 83779c2b292a..83779c2b292a 100644
--- a/drivers/video/omap2/dss/dispc-compat.c
+++ b/drivers/video/fbdev/omap2/dss/dispc-compat.c
diff --git a/drivers/video/omap2/dss/dispc-compat.h b/drivers/video/fbdev/omap2/dss/dispc-compat.h
index 14a69b3d4fb0..14a69b3d4fb0 100644
--- a/drivers/video/omap2/dss/dispc-compat.h
+++ b/drivers/video/fbdev/omap2/dss/dispc-compat.h
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/fbdev/omap2/dss/dispc.c
index 2bbdb7ff7daf..f18397c33e8f 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/fbdev/omap2/dss/dispc.c
@@ -101,6 +101,8 @@ static struct {
101 void __iomem *base; 101 void __iomem *base;
102 102
103 int irq; 103 int irq;
104 irq_handler_t user_handler;
105 void *user_data;
104 106
105 unsigned long core_clk_rate; 107 unsigned long core_clk_rate;
106 unsigned long tv_pclk_rate; 108 unsigned long tv_pclk_rate;
@@ -113,6 +115,8 @@ static struct {
113 u32 ctx[DISPC_SZ_REGS / sizeof(u32)]; 115 u32 ctx[DISPC_SZ_REGS / sizeof(u32)];
114 116
115 const struct dispc_features *feat; 117 const struct dispc_features *feat;
118
119 bool is_enabled;
116} dispc; 120} dispc;
117 121
118enum omap_color_component { 122enum omap_color_component {
@@ -141,12 +145,18 @@ enum mgr_reg_fields {
141 DISPC_MGR_FLD_NUM, 145 DISPC_MGR_FLD_NUM,
142}; 146};
143 147
148struct dispc_reg_field {
149 u16 reg;
150 u8 high;
151 u8 low;
152};
153
144static const struct { 154static const struct {
145 const char *name; 155 const char *name;
146 u32 vsync_irq; 156 u32 vsync_irq;
147 u32 framedone_irq; 157 u32 framedone_irq;
148 u32 sync_lost_irq; 158 u32 sync_lost_irq;
149 struct reg_field reg_desc[DISPC_MGR_FLD_NUM]; 159 struct dispc_reg_field reg_desc[DISPC_MGR_FLD_NUM];
150} mgr_desc[] = { 160} mgr_desc[] = {
151 [OMAP_DSS_CHANNEL_LCD] = { 161 [OMAP_DSS_CHANNEL_LCD] = {
152 .name = "LCD", 162 .name = "LCD",
@@ -238,13 +248,13 @@ static inline u32 dispc_read_reg(const u16 idx)
238 248
239static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld) 249static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld)
240{ 250{
241 const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld]; 251 const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
242 return REG_GET(rfld.reg, rfld.high, rfld.low); 252 return REG_GET(rfld.reg, rfld.high, rfld.low);
243} 253}
244 254
245static void mgr_fld_write(enum omap_channel channel, 255static void mgr_fld_write(enum omap_channel channel,
246 enum mgr_reg_fields regfld, int val) { 256 enum mgr_reg_fields regfld, int val) {
247 const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld]; 257 const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
248 REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); 258 REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
249} 259}
250 260
@@ -3669,16 +3679,44 @@ static int __init dispc_init_features(struct platform_device *pdev)
3669 return 0; 3679 return 0;
3670} 3680}
3671 3681
3682static irqreturn_t dispc_irq_handler(int irq, void *arg)
3683{
3684 if (!dispc.is_enabled)
3685 return IRQ_NONE;
3686
3687 return dispc.user_handler(irq, dispc.user_data);
3688}
3689
3672int dispc_request_irq(irq_handler_t handler, void *dev_id) 3690int dispc_request_irq(irq_handler_t handler, void *dev_id)
3673{ 3691{
3674 return devm_request_irq(&dispc.pdev->dev, dispc.irq, handler, 3692 int r;
3675 IRQF_SHARED, "OMAP DISPC", dev_id); 3693
3694 if (dispc.user_handler != NULL)
3695 return -EBUSY;
3696
3697 dispc.user_handler = handler;
3698 dispc.user_data = dev_id;
3699
3700 /* ensure the dispc_irq_handler sees the values above */
3701 smp_wmb();
3702
3703 r = devm_request_irq(&dispc.pdev->dev, dispc.irq, dispc_irq_handler,
3704 IRQF_SHARED, "OMAP DISPC", &dispc);
3705 if (r) {
3706 dispc.user_handler = NULL;
3707 dispc.user_data = NULL;
3708 }
3709
3710 return r;
3676} 3711}
3677EXPORT_SYMBOL(dispc_request_irq); 3712EXPORT_SYMBOL(dispc_request_irq);
3678 3713
3679void dispc_free_irq(void *dev_id) 3714void dispc_free_irq(void *dev_id)
3680{ 3715{
3681 devm_free_irq(&dispc.pdev->dev, dispc.irq, dev_id); 3716 devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc);
3717
3718 dispc.user_handler = NULL;
3719 dispc.user_data = NULL;
3682} 3720}
3683EXPORT_SYMBOL(dispc_free_irq); 3721EXPORT_SYMBOL(dispc_free_irq);
3684 3722
@@ -3750,6 +3788,12 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev)
3750 3788
3751static int dispc_runtime_suspend(struct device *dev) 3789static int dispc_runtime_suspend(struct device *dev)
3752{ 3790{
3791 dispc.is_enabled = false;
3792 /* ensure the dispc_irq_handler sees the is_enabled value */
3793 smp_wmb();
3794 /* wait for current handler to finish before turning the DISPC off */
3795 synchronize_irq(dispc.irq);
3796
3753 dispc_save_context(); 3797 dispc_save_context();
3754 3798
3755 return 0; 3799 return 0;
@@ -3763,12 +3807,15 @@ static int dispc_runtime_resume(struct device *dev)
3763 * _omap_dispc_initial_config(). We can thus use it to detect if 3807 * _omap_dispc_initial_config(). We can thus use it to detect if
3764 * we have lost register context. 3808 * we have lost register context.
3765 */ 3809 */
3766 if (REG_GET(DISPC_CONFIG, 2, 1) == OMAP_DSS_LOAD_FRAME_ONLY) 3810 if (REG_GET(DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {
3767 return 0; 3811 _omap_dispc_initial_config();
3768 3812
3769 _omap_dispc_initial_config(); 3813 dispc_restore_context();
3814 }
3770 3815
3771 dispc_restore_context(); 3816 dispc.is_enabled = true;
3817 /* ensure the dispc_irq_handler sees the is_enabled value */
3818 smp_wmb();
3772 3819
3773 return 0; 3820 return 0;
3774} 3821}
diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/fbdev/omap2/dss/dispc.h
index 78edb449c763..78edb449c763 100644
--- a/drivers/video/omap2/dss/dispc.h
+++ b/drivers/video/fbdev/omap2/dss/dispc.h
diff --git a/drivers/video/omap2/dss/dispc_coefs.c b/drivers/video/fbdev/omap2/dss/dispc_coefs.c
index 038c15b04215..038c15b04215 100644
--- a/drivers/video/omap2/dss/dispc_coefs.c
+++ b/drivers/video/fbdev/omap2/dss/dispc_coefs.c
diff --git a/drivers/video/omap2/dss/display-sysfs.c b/drivers/video/fbdev/omap2/dss/display-sysfs.c
index 5a2095a98ed8..5a2095a98ed8 100644
--- a/drivers/video/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c
diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/fbdev/omap2/dss/display.c
index 2412a0dd0c13..2412a0dd0c13 100644
--- a/drivers/video/omap2/dss/display.c
+++ b/drivers/video/fbdev/omap2/dss/display.c
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/fbdev/omap2/dss/dpi.c
index 157921db447a..157921db447a 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/fbdev/omap2/dss/dpi.c
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/fbdev/omap2/dss/dsi.c
index 121d1049d0bc..8be9b04d8849 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/fbdev/omap2/dss/dsi.c
@@ -297,6 +297,8 @@ struct dsi_data {
297 297
298 int irq; 298 int irq;
299 299
300 bool is_enabled;
301
300 struct clk *dss_clk; 302 struct clk *dss_clk;
301 struct clk *sys_clk; 303 struct clk *sys_clk;
302 304
@@ -795,6 +797,9 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg)
795 dsidev = (struct platform_device *) arg; 797 dsidev = (struct platform_device *) arg;
796 dsi = dsi_get_dsidrv_data(dsidev); 798 dsi = dsi_get_dsidrv_data(dsidev);
797 799
800 if (!dsi->is_enabled)
801 return IRQ_NONE;
802
798 spin_lock(&dsi->irq_lock); 803 spin_lock(&dsi->irq_lock);
799 804
800 irqstatus = dsi_read_reg(dsidev, DSI_IRQSTATUS); 805 irqstatus = dsi_read_reg(dsidev, DSI_IRQSTATUS);
@@ -5671,6 +5676,15 @@ static int __exit omap_dsihw_remove(struct platform_device *dsidev)
5671 5676
5672static int dsi_runtime_suspend(struct device *dev) 5677static int dsi_runtime_suspend(struct device *dev)
5673{ 5678{
5679 struct platform_device *pdev = to_platform_device(dev);
5680 struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
5681
5682 dsi->is_enabled = false;
5683 /* ensure the irq handler sees the is_enabled value */
5684 smp_wmb();
5685 /* wait for current handler to finish before turning the DSI off */
5686 synchronize_irq(dsi->irq);
5687
5674 dispc_runtime_put(); 5688 dispc_runtime_put();
5675 5689
5676 return 0; 5690 return 0;
@@ -5678,12 +5692,18 @@ static int dsi_runtime_suspend(struct device *dev)
5678 5692
5679static int dsi_runtime_resume(struct device *dev) 5693static int dsi_runtime_resume(struct device *dev)
5680{ 5694{
5695 struct platform_device *pdev = to_platform_device(dev);
5696 struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
5681 int r; 5697 int r;
5682 5698
5683 r = dispc_runtime_get(); 5699 r = dispc_runtime_get();
5684 if (r) 5700 if (r)
5685 return r; 5701 return r;
5686 5702
5703 dsi->is_enabled = true;
5704 /* ensure the irq handler sees the is_enabled value */
5705 smp_wmb();
5706
5687 return 0; 5707 return 0;
5688} 5708}
5689 5709
diff --git a/drivers/video/omap2/dss/dss-of.c b/drivers/video/fbdev/omap2/dss/dss-of.c
index a4b20aaf6142..a4b20aaf6142 100644
--- a/drivers/video/omap2/dss/dss-of.c
+++ b/drivers/video/fbdev/omap2/dss/dss-of.c
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/fbdev/omap2/dss/dss.c
index 825c019ddee7..d55266c0e029 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/fbdev/omap2/dss/dss.c
@@ -457,7 +457,7 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
457 fckd_stop = max(DIV_ROUND_UP(prate * m, fck_hw_max), 1ul); 457 fckd_stop = max(DIV_ROUND_UP(prate * m, fck_hw_max), 1ul);
458 458
459 for (fckd = fckd_start; fckd >= fckd_stop; --fckd) { 459 for (fckd = fckd_start; fckd >= fckd_stop; --fckd) {
460 fck = prate / fckd * m; 460 fck = DIV_ROUND_UP(prate, fckd) * m;
461 461
462 if (func(fck, data)) 462 if (func(fck, data))
463 return true; 463 return true;
@@ -506,7 +506,7 @@ static int dss_setup_default_clock(void)
506 506
507 fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier, 507 fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
508 max_dss_fck); 508 max_dss_fck);
509 fck = prate / fck_div * dss.feat->dss_fck_multiplier; 509 fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;
510 } 510 }
511 511
512 r = dss_set_fck_rate(fck); 512 r = dss_set_fck_rate(fck);
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/fbdev/omap2/dss/dss.h
index 918fec182424..560078fcb198 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/fbdev/omap2/dss/dss.h
@@ -131,12 +131,6 @@ struct dsi_clock_info {
131 u16 lp_clk_div; 131 u16 lp_clk_div;
132}; 132};
133 133
134struct reg_field {
135 u16 reg;
136 u8 high;
137 u8 low;
138};
139
140struct dss_lcd_mgr_config { 134struct dss_lcd_mgr_config {
141 enum dss_io_pad_mode io_pad_mode; 135 enum dss_io_pad_mode io_pad_mode;
142 136
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/fbdev/omap2/dss/dss_features.c
index 7f8969191dc6..7f8969191dc6 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/fbdev/omap2/dss/dss_features.c
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/fbdev/omap2/dss/dss_features.h
index e3ef3b714896..e3ef3b714896 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/fbdev/omap2/dss/dss_features.h
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/dss/hdmi.h
index e25681ff5a70..e25681ff5a70 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi.h
diff --git a/drivers/video/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
index f5f7944a1fd1..f5f7944a1fd1 100644
--- a/drivers/video/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
diff --git a/drivers/video/omap2/dss/hdmi4_core.c b/drivers/video/fbdev/omap2/dss/hdmi4_core.c
index 2eb04dcf807c..2eb04dcf807c 100644
--- a/drivers/video/omap2/dss/hdmi4_core.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4_core.c
diff --git a/drivers/video/omap2/dss/hdmi4_core.h b/drivers/video/fbdev/omap2/dss/hdmi4_core.h
index bb646896fa82..bb646896fa82 100644
--- a/drivers/video/omap2/dss/hdmi4_core.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi4_core.h
diff --git a/drivers/video/omap2/dss/hdmi_common.c b/drivers/video/fbdev/omap2/dss/hdmi_common.c
index b11afac8e068..0b12a3f62fe1 100644
--- a/drivers/video/omap2/dss/hdmi_common.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_common.c
@@ -347,17 +347,17 @@ int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
347 case 96000: 347 case 96000:
348 case 192000: 348 case 192000:
349 if (deep_color == 125) 349 if (deep_color == 125)
350 if (pclk == 27027 || pclk == 74250) 350 if (pclk == 27027000 || pclk == 74250000)
351 deep_color_correct = true; 351 deep_color_correct = true;
352 if (deep_color == 150) 352 if (deep_color == 150)
353 if (pclk == 27027) 353 if (pclk == 27027000)
354 deep_color_correct = true; 354 deep_color_correct = true;
355 break; 355 break;
356 case 44100: 356 case 44100:
357 case 88200: 357 case 88200:
358 case 176400: 358 case 176400:
359 if (deep_color == 125) 359 if (deep_color == 125)
360 if (pclk == 27027) 360 if (pclk == 27027000)
361 deep_color_correct = true; 361 deep_color_correct = true;
362 break; 362 break;
363 default: 363 default:
@@ -418,7 +418,7 @@ int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
418 } 418 }
419 } 419 }
420 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ 420 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */
421 *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10); 421 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
422 422
423 return 0; 423 return 0;
424} 424}
diff --git a/drivers/video/omap2/dss/hdmi_phy.c b/drivers/video/fbdev/omap2/dss/hdmi_phy.c
index dd376ce8da01..dd376ce8da01 100644
--- a/drivers/video/omap2/dss/hdmi_phy.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_phy.c
diff --git a/drivers/video/omap2/dss/hdmi_pll.c b/drivers/video/fbdev/omap2/dss/hdmi_pll.c
index 5fc71215c303..5fc71215c303 100644
--- a/drivers/video/omap2/dss/hdmi_pll.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_pll.c
diff --git a/drivers/video/omap2/dss/hdmi_wp.c b/drivers/video/fbdev/omap2/dss/hdmi_wp.c
index f5f4ccf50d90..f5f4ccf50d90 100644
--- a/drivers/video/omap2/dss/hdmi_wp.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_wp.c
diff --git a/drivers/video/omap2/dss/manager-sysfs.c b/drivers/video/fbdev/omap2/dss/manager-sysfs.c
index 37b59fe28dc8..37b59fe28dc8 100644
--- a/drivers/video/omap2/dss/manager-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/manager-sysfs.c
diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/fbdev/omap2/dss/manager.c
index 1aac9b4191a9..1aac9b4191a9 100644
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/fbdev/omap2/dss/manager.c
diff --git a/drivers/video/omap2/dss/output.c b/drivers/video/fbdev/omap2/dss/output.c
index 2ab3afa615e8..2ab3afa615e8 100644
--- a/drivers/video/omap2/dss/output.c
+++ b/drivers/video/fbdev/omap2/dss/output.c
diff --git a/drivers/video/omap2/dss/overlay-sysfs.c b/drivers/video/fbdev/omap2/dss/overlay-sysfs.c
index 4cc5ddebfb34..4cc5ddebfb34 100644
--- a/drivers/video/omap2/dss/overlay-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/overlay-sysfs.c
diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/fbdev/omap2/dss/overlay.c
index 2f7cee985cdd..2f7cee985cdd 100644
--- a/drivers/video/omap2/dss/overlay.c
+++ b/drivers/video/fbdev/omap2/dss/overlay.c
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/fbdev/omap2/dss/rfbi.c
index c8a81a2b879c..c8a81a2b879c 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/fbdev/omap2/dss/rfbi.c
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/fbdev/omap2/dss/sdi.c
index 911dcc9173a6..911dcc9173a6 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/fbdev/omap2/dss/sdi.c
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/fbdev/omap2/dss/venc.c
index 21d81113962b..21d81113962b 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/fbdev/omap2/dss/venc.c
diff --git a/drivers/video/omap2/dss/venc_panel.c b/drivers/video/fbdev/omap2/dss/venc_panel.c
index af68cd444d7e..af68cd444d7e 100644
--- a/drivers/video/omap2/dss/venc_panel.c
+++ b/drivers/video/fbdev/omap2/dss/venc_panel.c
diff --git a/drivers/video/omap2/omapfb/Kconfig b/drivers/video/fbdev/omap2/omapfb/Kconfig
index 4cb12ce68855..4cb12ce68855 100644
--- a/drivers/video/omap2/omapfb/Kconfig
+++ b/drivers/video/fbdev/omap2/omapfb/Kconfig
diff --git a/drivers/video/omap2/omapfb/Makefile b/drivers/video/fbdev/omap2/omapfb/Makefile
index 51c2e00d9bf8..51c2e00d9bf8 100644
--- a/drivers/video/omap2/omapfb/Makefile
+++ b/drivers/video/fbdev/omap2/omapfb/Makefile
diff --git a/drivers/video/omap2/omapfb/omapfb-ioctl.c b/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c
index 146b6f5428db..146b6f5428db 100644
--- a/drivers/video/omap2/omapfb/omapfb-ioctl.c
+++ b/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c
index ec2d132c782d..ec2d132c782d 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c
diff --git a/drivers/video/omap2/omapfb/omapfb-sysfs.c b/drivers/video/fbdev/omap2/omapfb/omapfb-sysfs.c
index 18fa9e1d0033..18fa9e1d0033 100644
--- a/drivers/video/omap2/omapfb/omapfb-sysfs.c
+++ b/drivers/video/fbdev/omap2/omapfb/omapfb-sysfs.c
diff --git a/drivers/video/omap2/omapfb/omapfb.h b/drivers/video/fbdev/omap2/omapfb/omapfb.h
index 623cd872a367..623cd872a367 100644
--- a/drivers/video/omap2/omapfb/omapfb.h
+++ b/drivers/video/fbdev/omap2/omapfb/omapfb.h
diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/fbdev/omap2/vrfb.c
index f346b02eee1d..f346b02eee1d 100644
--- a/drivers/video/omap2/vrfb.c
+++ b/drivers/video/fbdev/omap2/vrfb.c
diff --git a/drivers/video/p9100.c b/drivers/video/fbdev/p9100.c
index 367cea8f43f3..367cea8f43f3 100644
--- a/drivers/video/p9100.c
+++ b/drivers/video/fbdev/p9100.c
diff --git a/drivers/video/platinumfb.c b/drivers/video/fbdev/platinumfb.c
index 4c9299576827..4c9299576827 100644
--- a/drivers/video/platinumfb.c
+++ b/drivers/video/fbdev/platinumfb.c
diff --git a/drivers/video/platinumfb.h b/drivers/video/fbdev/platinumfb.h
index f6bd77cafd17..f6bd77cafd17 100644
--- a/drivers/video/platinumfb.h
+++ b/drivers/video/fbdev/platinumfb.h
diff --git a/drivers/video/pm2fb.c b/drivers/video/fbdev/pm2fb.c
index 3b85b647bc10..3b85b647bc10 100644
--- a/drivers/video/pm2fb.c
+++ b/drivers/video/fbdev/pm2fb.c
diff --git a/drivers/video/pm3fb.c b/drivers/video/fbdev/pm3fb.c
index 4bf3273d0433..4bf3273d0433 100644
--- a/drivers/video/pm3fb.c
+++ b/drivers/video/fbdev/pm3fb.c
diff --git a/drivers/video/pmag-aa-fb.c b/drivers/video/fbdev/pmag-aa-fb.c
index 838424817de2..838424817de2 100644
--- a/drivers/video/pmag-aa-fb.c
+++ b/drivers/video/fbdev/pmag-aa-fb.c
diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/fbdev/pmag-ba-fb.c
index 914a52ba8477..914a52ba8477 100644
--- a/drivers/video/pmag-ba-fb.c
+++ b/drivers/video/fbdev/pmag-ba-fb.c
diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/fbdev/pmagb-b-fb.c
index 0822b6f8dddc..0822b6f8dddc 100644
--- a/drivers/video/pmagb-b-fb.c
+++ b/drivers/video/fbdev/pmagb-b-fb.c
diff --git a/drivers/video/ps3fb.c b/drivers/video/fbdev/ps3fb.c
index b269abd932aa..b269abd932aa 100644
--- a/drivers/video/ps3fb.c
+++ b/drivers/video/fbdev/ps3fb.c
diff --git a/drivers/video/pvr2fb.c b/drivers/video/fbdev/pvr2fb.c
index 167cffff3d4e..167cffff3d4e 100644
--- a/drivers/video/pvr2fb.c
+++ b/drivers/video/fbdev/pvr2fb.c
diff --git a/drivers/video/pxa168fb.c b/drivers/video/fbdev/pxa168fb.c
index c95b9e46d48f..c95b9e46d48f 100644
--- a/drivers/video/pxa168fb.c
+++ b/drivers/video/fbdev/pxa168fb.c
diff --git a/drivers/video/pxa168fb.h b/drivers/video/fbdev/pxa168fb.h
index eee09279c524..eee09279c524 100644
--- a/drivers/video/pxa168fb.h
+++ b/drivers/video/fbdev/pxa168fb.h
diff --git a/drivers/video/pxa3xx-gcu.c b/drivers/video/fbdev/pxa3xx-gcu.c
index 417f9a27eb7d..417f9a27eb7d 100644
--- a/drivers/video/pxa3xx-gcu.c
+++ b/drivers/video/fbdev/pxa3xx-gcu.c
diff --git a/drivers/video/pxa3xx-gcu.h b/drivers/video/fbdev/pxa3xx-gcu.h
index 0428ed03dc49..0428ed03dc49 100644
--- a/drivers/video/pxa3xx-gcu.h
+++ b/drivers/video/fbdev/pxa3xx-gcu.h
diff --git a/drivers/video/pxafb.c b/drivers/video/fbdev/pxafb.c
index 1ecd9cec2921..1ecd9cec2921 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/fbdev/pxafb.c
diff --git a/drivers/video/pxafb.h b/drivers/video/fbdev/pxafb.h
index 26ba9fa3f737..26ba9fa3f737 100644
--- a/drivers/video/pxafb.h
+++ b/drivers/video/fbdev/pxafb.h
diff --git a/drivers/video/q40fb.c b/drivers/video/fbdev/q40fb.c
index 7487f76f6275..7487f76f6275 100644
--- a/drivers/video/q40fb.c
+++ b/drivers/video/fbdev/q40fb.c
diff --git a/drivers/video/riva/Makefile b/drivers/video/fbdev/riva/Makefile
index 8898c9915b02..8898c9915b02 100644
--- a/drivers/video/riva/Makefile
+++ b/drivers/video/fbdev/riva/Makefile
diff --git a/drivers/video/riva/fbdev.c b/drivers/video/fbdev/riva/fbdev.c
index 8a8d7f060784..8a8d7f060784 100644
--- a/drivers/video/riva/fbdev.c
+++ b/drivers/video/fbdev/riva/fbdev.c
diff --git a/drivers/video/riva/nv_driver.c b/drivers/video/fbdev/riva/nv_driver.c
index f3694cf17e58..f3694cf17e58 100644
--- a/drivers/video/riva/nv_driver.c
+++ b/drivers/video/fbdev/riva/nv_driver.c
diff --git a/drivers/video/riva/nv_type.h b/drivers/video/fbdev/riva/nv_type.h
index a69480c9a67c..a69480c9a67c 100644
--- a/drivers/video/riva/nv_type.h
+++ b/drivers/video/fbdev/riva/nv_type.h
diff --git a/drivers/video/riva/nvreg.h b/drivers/video/fbdev/riva/nvreg.h
index abfc167ae8d8..abfc167ae8d8 100644
--- a/drivers/video/riva/nvreg.h
+++ b/drivers/video/fbdev/riva/nvreg.h
diff --git a/drivers/video/riva/riva_hw.c b/drivers/video/fbdev/riva/riva_hw.c
index 78fdbf5178d7..78fdbf5178d7 100644
--- a/drivers/video/riva/riva_hw.c
+++ b/drivers/video/fbdev/riva/riva_hw.c
diff --git a/drivers/video/riva/riva_hw.h b/drivers/video/fbdev/riva/riva_hw.h
index c2769f73e0b2..c2769f73e0b2 100644
--- a/drivers/video/riva/riva_hw.h
+++ b/drivers/video/fbdev/riva/riva_hw.h
diff --git a/drivers/video/riva/riva_tbl.h b/drivers/video/fbdev/riva/riva_tbl.h
index 7ee7d72932d4..7ee7d72932d4 100644
--- a/drivers/video/riva/riva_tbl.h
+++ b/drivers/video/fbdev/riva/riva_tbl.h
diff --git a/drivers/video/riva/rivafb-i2c.c b/drivers/video/fbdev/riva/rivafb-i2c.c
index 6a183375ced1..6a183375ced1 100644
--- a/drivers/video/riva/rivafb-i2c.c
+++ b/drivers/video/fbdev/riva/rivafb-i2c.c
diff --git a/drivers/video/riva/rivafb.h b/drivers/video/fbdev/riva/rivafb.h
index d9f107b704c6..d9f107b704c6 100644
--- a/drivers/video/riva/rivafb.h
+++ b/drivers/video/fbdev/riva/rivafb.h
diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/fbdev/s1d13xxxfb.c
index 83433cb0dfba..83433cb0dfba 100644
--- a/drivers/video/s1d13xxxfb.c
+++ b/drivers/video/fbdev/s1d13xxxfb.c
diff --git a/drivers/video/s3c-fb.c b/drivers/video/fbdev/s3c-fb.c
index 62acae2694a9..62acae2694a9 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/fbdev/s3c-fb.c
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/fbdev/s3c2410fb.c
index 81af5a63e9e1..81af5a63e9e1 100644
--- a/drivers/video/s3c2410fb.c
+++ b/drivers/video/fbdev/s3c2410fb.c
diff --git a/drivers/video/s3c2410fb.h b/drivers/video/fbdev/s3c2410fb.h
index 47a17bd23011..47a17bd23011 100644
--- a/drivers/video/s3c2410fb.h
+++ b/drivers/video/fbdev/s3c2410fb.h
diff --git a/drivers/video/s3fb.c b/drivers/video/fbdev/s3fb.c
index 9a3f8f1c6aab..9a3f8f1c6aab 100644
--- a/drivers/video/s3fb.c
+++ b/drivers/video/fbdev/s3fb.c
diff --git a/drivers/video/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c
index 580c444ec301..580c444ec301 100644
--- a/drivers/video/sa1100fb.c
+++ b/drivers/video/fbdev/sa1100fb.c
diff --git a/drivers/video/sa1100fb.h b/drivers/video/fbdev/sa1100fb.h
index fc5d4292fad6..fc5d4292fad6 100644
--- a/drivers/video/sa1100fb.h
+++ b/drivers/video/fbdev/sa1100fb.h
diff --git a/drivers/video/savage/Makefile b/drivers/video/fbdev/savage/Makefile
index e09770fff8ea..e09770fff8ea 100644
--- a/drivers/video/savage/Makefile
+++ b/drivers/video/fbdev/savage/Makefile
diff --git a/drivers/video/savage/savagefb-i2c.c b/drivers/video/fbdev/savage/savagefb-i2c.c
index 80fa87e2ae2f..80fa87e2ae2f 100644
--- a/drivers/video/savage/savagefb-i2c.c
+++ b/drivers/video/fbdev/savage/savagefb-i2c.c
diff --git a/drivers/video/savage/savagefb.h b/drivers/video/fbdev/savage/savagefb.h
index dcaab9012ca2..dcaab9012ca2 100644
--- a/drivers/video/savage/savagefb.h
+++ b/drivers/video/fbdev/savage/savagefb.h
diff --git a/drivers/video/savage/savagefb_accel.c b/drivers/video/fbdev/savage/savagefb_accel.c
index bfefa6234cf0..bfefa6234cf0 100644
--- a/drivers/video/savage/savagefb_accel.c
+++ b/drivers/video/fbdev/savage/savagefb_accel.c
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/fbdev/savage/savagefb_driver.c
index 4dbf45f3b21a..4dbf45f3b21a 100644
--- a/drivers/video/savage/savagefb_driver.c
+++ b/drivers/video/fbdev/savage/savagefb_driver.c
diff --git a/drivers/video/sbuslib.c b/drivers/video/fbdev/sbuslib.c
index a350209ffbd3..a350209ffbd3 100644
--- a/drivers/video/sbuslib.c
+++ b/drivers/video/fbdev/sbuslib.c
diff --git a/drivers/video/sbuslib.h b/drivers/video/fbdev/sbuslib.h
index 7ba3250236bd..7ba3250236bd 100644
--- a/drivers/video/sbuslib.h
+++ b/drivers/video/fbdev/sbuslib.h
diff --git a/drivers/video/sh7760fb.c b/drivers/video/fbdev/sh7760fb.c
index 1265b25f9f99..1265b25f9f99 100644
--- a/drivers/video/sh7760fb.c
+++ b/drivers/video/fbdev/sh7760fb.c
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/fbdev/sh_mipi_dsi.c
index 8f6e8ff620d4..8f6e8ff620d4 100644
--- a/drivers/video/sh_mipi_dsi.c
+++ b/drivers/video/fbdev/sh_mipi_dsi.c
diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/fbdev/sh_mobile_hdmi.c
index 9a33ee0413fb..9a33ee0413fb 100644
--- a/drivers/video/sh_mobile_hdmi.c
+++ b/drivers/video/fbdev/sh_mobile_hdmi.c
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/fbdev/sh_mobile_lcdcfb.c
index 2bcc84ac18c7..2bcc84ac18c7 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/fbdev/sh_mobile_lcdcfb.c
diff --git a/drivers/video/sh_mobile_lcdcfb.h b/drivers/video/fbdev/sh_mobile_lcdcfb.h
index f839adef1d90..f839adef1d90 100644
--- a/drivers/video/sh_mobile_lcdcfb.h
+++ b/drivers/video/fbdev/sh_mobile_lcdcfb.h
diff --git a/drivers/video/sh_mobile_meram.c b/drivers/video/fbdev/sh_mobile_meram.c
index a297de5cc859..a297de5cc859 100644
--- a/drivers/video/sh_mobile_meram.c
+++ b/drivers/video/fbdev/sh_mobile_meram.c
diff --git a/drivers/video/simplefb.c b/drivers/video/fbdev/simplefb.c
index 210f3a02121a..210f3a02121a 100644
--- a/drivers/video/simplefb.c
+++ b/drivers/video/fbdev/simplefb.c
diff --git a/drivers/video/sis/300vtbl.h b/drivers/video/fbdev/sis/300vtbl.h
index e4b4a2626da4..e4b4a2626da4 100644
--- a/drivers/video/sis/300vtbl.h
+++ b/drivers/video/fbdev/sis/300vtbl.h
diff --git a/drivers/video/sis/310vtbl.h b/drivers/video/fbdev/sis/310vtbl.h
index 54fcbbf4ef63..54fcbbf4ef63 100644
--- a/drivers/video/sis/310vtbl.h
+++ b/drivers/video/fbdev/sis/310vtbl.h
diff --git a/drivers/video/sis/Makefile b/drivers/video/fbdev/sis/Makefile
index f7c0046e5b1d..f7c0046e5b1d 100644
--- a/drivers/video/sis/Makefile
+++ b/drivers/video/fbdev/sis/Makefile
diff --git a/drivers/video/sis/init.c b/drivers/video/fbdev/sis/init.c
index bd40f5ecd901..bd40f5ecd901 100644
--- a/drivers/video/sis/init.c
+++ b/drivers/video/fbdev/sis/init.c
diff --git a/drivers/video/sis/init.h b/drivers/video/fbdev/sis/init.h
index 85d6738b6c64..85d6738b6c64 100644
--- a/drivers/video/sis/init.h
+++ b/drivers/video/fbdev/sis/init.h
diff --git a/drivers/video/sis/init301.c b/drivers/video/fbdev/sis/init301.c
index a89e3cafd5ad..a89e3cafd5ad 100644
--- a/drivers/video/sis/init301.c
+++ b/drivers/video/fbdev/sis/init301.c
diff --git a/drivers/video/sis/init301.h b/drivers/video/fbdev/sis/init301.h
index 2112d6d7feda..2112d6d7feda 100644
--- a/drivers/video/sis/init301.h
+++ b/drivers/video/fbdev/sis/init301.h
diff --git a/drivers/video/sis/initdef.h b/drivers/video/fbdev/sis/initdef.h
index 264b55a5947b..264b55a5947b 100644
--- a/drivers/video/sis/initdef.h
+++ b/drivers/video/fbdev/sis/initdef.h
diff --git a/drivers/video/sis/initextlfb.c b/drivers/video/fbdev/sis/initextlfb.c
index 3ab18f5a3759..3ab18f5a3759 100644
--- a/drivers/video/sis/initextlfb.c
+++ b/drivers/video/fbdev/sis/initextlfb.c
diff --git a/drivers/video/sis/oem300.h b/drivers/video/fbdev/sis/oem300.h
index b73f26840143..b73f26840143 100644
--- a/drivers/video/sis/oem300.h
+++ b/drivers/video/fbdev/sis/oem300.h
diff --git a/drivers/video/sis/oem310.h b/drivers/video/fbdev/sis/oem310.h
index 8fce56e4482c..8fce56e4482c 100644
--- a/drivers/video/sis/oem310.h
+++ b/drivers/video/fbdev/sis/oem310.h
diff --git a/drivers/video/sis/sis.h b/drivers/video/fbdev/sis/sis.h
index 1987f1b7212f..1987f1b7212f 100644
--- a/drivers/video/sis/sis.h
+++ b/drivers/video/fbdev/sis/sis.h
diff --git a/drivers/video/sis/sis_accel.c b/drivers/video/fbdev/sis/sis_accel.c
index ceb434c95c0d..ceb434c95c0d 100644
--- a/drivers/video/sis/sis_accel.c
+++ b/drivers/video/fbdev/sis/sis_accel.c
diff --git a/drivers/video/sis/sis_accel.h b/drivers/video/fbdev/sis/sis_accel.h
index 30e03cdf6b85..30e03cdf6b85 100644
--- a/drivers/video/sis/sis_accel.h
+++ b/drivers/video/fbdev/sis/sis_accel.h
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c
index 22ad028bf123..22ad028bf123 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/fbdev/sis/sis_main.c
diff --git a/drivers/video/sis/sis_main.h b/drivers/video/fbdev/sis/sis_main.h
index 32e23c209430..32e23c209430 100644
--- a/drivers/video/sis/sis_main.h
+++ b/drivers/video/fbdev/sis/sis_main.h
diff --git a/drivers/video/sis/vgatypes.h b/drivers/video/fbdev/sis/vgatypes.h
index e3f9976cfef0..e3f9976cfef0 100644
--- a/drivers/video/sis/vgatypes.h
+++ b/drivers/video/fbdev/sis/vgatypes.h
diff --git a/drivers/video/sis/vstruct.h b/drivers/video/fbdev/sis/vstruct.h
index ea94d214dcff..ea94d214dcff 100644
--- a/drivers/video/sis/vstruct.h
+++ b/drivers/video/fbdev/sis/vstruct.h
diff --git a/drivers/video/skeletonfb.c b/drivers/video/fbdev/skeletonfb.c
index fefde7c6add7..fefde7c6add7 100644
--- a/drivers/video/skeletonfb.c
+++ b/drivers/video/fbdev/skeletonfb.c
diff --git a/drivers/video/sm501fb.c b/drivers/video/fbdev/sm501fb.c
index 1501979099dc..1501979099dc 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/fbdev/sm501fb.c
diff --git a/drivers/video/smscufx.c b/drivers/video/fbdev/smscufx.c
index d513ed6a49f2..d513ed6a49f2 100644
--- a/drivers/video/smscufx.c
+++ b/drivers/video/fbdev/smscufx.c
diff --git a/drivers/video/ssd1307fb.c b/drivers/video/fbdev/ssd1307fb.c
index f4daa59f0a80..f4daa59f0a80 100644
--- a/drivers/video/ssd1307fb.c
+++ b/drivers/video/fbdev/ssd1307fb.c
diff --git a/drivers/video/sstfb.c b/drivers/video/fbdev/sstfb.c
index f0cb279ef333..f0cb279ef333 100644
--- a/drivers/video/sstfb.c
+++ b/drivers/video/fbdev/sstfb.c
diff --git a/drivers/video/sticore.h b/drivers/video/fbdev/sticore.h
index af1619536ac8..af1619536ac8 100644
--- a/drivers/video/sticore.h
+++ b/drivers/video/fbdev/sticore.h
diff --git a/drivers/video/stifb.c b/drivers/video/fbdev/stifb.c
index cfe8a2f905c5..cfe8a2f905c5 100644
--- a/drivers/video/stifb.c
+++ b/drivers/video/fbdev/stifb.c
diff --git a/drivers/video/sunxvr1000.c b/drivers/video/fbdev/sunxvr1000.c
index 58241b47a96d..58241b47a96d 100644
--- a/drivers/video/sunxvr1000.c
+++ b/drivers/video/fbdev/sunxvr1000.c
diff --git a/drivers/video/sunxvr2500.c b/drivers/video/fbdev/sunxvr2500.c
index 843b6bab0483..843b6bab0483 100644
--- a/drivers/video/sunxvr2500.c
+++ b/drivers/video/fbdev/sunxvr2500.c
diff --git a/drivers/video/sunxvr500.c b/drivers/video/fbdev/sunxvr500.c
index 387350d004df..387350d004df 100644
--- a/drivers/video/sunxvr500.c
+++ b/drivers/video/fbdev/sunxvr500.c
diff --git a/drivers/video/tcx.c b/drivers/video/fbdev/tcx.c
index 7fb2d696fac7..7fb2d696fac7 100644
--- a/drivers/video/tcx.c
+++ b/drivers/video/fbdev/tcx.c
diff --git a/drivers/video/tdfxfb.c b/drivers/video/fbdev/tdfxfb.c
index f761fe375f5b..f761fe375f5b 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/fbdev/tdfxfb.c
diff --git a/drivers/video/tgafb.c b/drivers/video/fbdev/tgafb.c
index 65ba9921506e..65ba9921506e 100644
--- a/drivers/video/tgafb.c
+++ b/drivers/video/fbdev/tgafb.c
diff --git a/drivers/video/tmiofb.c b/drivers/video/fbdev/tmiofb.c
index 7fb4e321a431..7fb4e321a431 100644
--- a/drivers/video/tmiofb.c
+++ b/drivers/video/fbdev/tmiofb.c
diff --git a/drivers/video/tridentfb.c b/drivers/video/fbdev/tridentfb.c
index 7ed9a227f5ea..7ed9a227f5ea 100644
--- a/drivers/video/tridentfb.c
+++ b/drivers/video/fbdev/tridentfb.c
diff --git a/drivers/video/udlfb.c b/drivers/video/fbdev/udlfb.c
index 77b890e4d296..77b890e4d296 100644
--- a/drivers/video/udlfb.c
+++ b/drivers/video/fbdev/udlfb.c
diff --git a/drivers/video/uvesafb.c b/drivers/video/fbdev/uvesafb.c
index 509d452e8f91..509d452e8f91 100644
--- a/drivers/video/uvesafb.c
+++ b/drivers/video/fbdev/uvesafb.c
diff --git a/drivers/video/valkyriefb.c b/drivers/video/fbdev/valkyriefb.c
index 97cb9bd1d1dd..97cb9bd1d1dd 100644
--- a/drivers/video/valkyriefb.c
+++ b/drivers/video/fbdev/valkyriefb.c
diff --git a/drivers/video/valkyriefb.h b/drivers/video/fbdev/valkyriefb.h
index d787441e5a42..d787441e5a42 100644
--- a/drivers/video/valkyriefb.h
+++ b/drivers/video/fbdev/valkyriefb.h
diff --git a/drivers/video/vermilion/Makefile b/drivers/video/fbdev/vermilion/Makefile
index cc21a656153d..cc21a656153d 100644
--- a/drivers/video/vermilion/Makefile
+++ b/drivers/video/fbdev/vermilion/Makefile
diff --git a/drivers/video/vermilion/cr_pll.c b/drivers/video/fbdev/vermilion/cr_pll.c
index ebc6e6e0dd0f..ebc6e6e0dd0f 100644
--- a/drivers/video/vermilion/cr_pll.c
+++ b/drivers/video/fbdev/vermilion/cr_pll.c
diff --git a/drivers/video/vermilion/vermilion.c b/drivers/video/fbdev/vermilion/vermilion.c
index 048a66640b03..048a66640b03 100644
--- a/drivers/video/vermilion/vermilion.c
+++ b/drivers/video/fbdev/vermilion/vermilion.c
diff --git a/drivers/video/vermilion/vermilion.h b/drivers/video/fbdev/vermilion/vermilion.h
index 43d11ec197fc..43d11ec197fc 100644
--- a/drivers/video/vermilion/vermilion.h
+++ b/drivers/video/fbdev/vermilion/vermilion.h
diff --git a/drivers/video/vesafb.c b/drivers/video/fbdev/vesafb.c
index 6170e7f58640..6170e7f58640 100644
--- a/drivers/video/vesafb.c
+++ b/drivers/video/fbdev/vesafb.c
diff --git a/drivers/video/vfb.c b/drivers/video/fbdev/vfb.c
index 70a897b1e458..70a897b1e458 100644
--- a/drivers/video/vfb.c
+++ b/drivers/video/fbdev/vfb.c
diff --git a/drivers/video/vga16fb.c b/drivers/video/fbdev/vga16fb.c
index 283d335a759f..283d335a759f 100644
--- a/drivers/video/vga16fb.c
+++ b/drivers/video/fbdev/vga16fb.c
diff --git a/drivers/video/via/Makefile b/drivers/video/fbdev/via/Makefile
index 159f26e6adb5..159f26e6adb5 100644
--- a/drivers/video/via/Makefile
+++ b/drivers/video/fbdev/via/Makefile
diff --git a/drivers/video/via/accel.c b/drivers/video/fbdev/via/accel.c
index 4b67b8e6030a..4b67b8e6030a 100644
--- a/drivers/video/via/accel.c
+++ b/drivers/video/fbdev/via/accel.c
diff --git a/drivers/video/via/accel.h b/drivers/video/fbdev/via/accel.h
index 79d5e10cc835..79d5e10cc835 100644
--- a/drivers/video/via/accel.h
+++ b/drivers/video/fbdev/via/accel.h
diff --git a/drivers/video/via/chip.h b/drivers/video/fbdev/via/chip.h
index d32a5076c20f..d32a5076c20f 100644
--- a/drivers/video/via/chip.h
+++ b/drivers/video/fbdev/via/chip.h
diff --git a/drivers/video/via/debug.h b/drivers/video/fbdev/via/debug.h
index 86eacc2017f3..86eacc2017f3 100644
--- a/drivers/video/via/debug.h
+++ b/drivers/video/fbdev/via/debug.h
diff --git a/drivers/video/via/dvi.c b/drivers/video/fbdev/via/dvi.c
index 7789553952d3..7789553952d3 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/fbdev/via/dvi.c
diff --git a/drivers/video/via/dvi.h b/drivers/video/fbdev/via/dvi.h
index 4c6bfba57d11..4c6bfba57d11 100644
--- a/drivers/video/via/dvi.h
+++ b/drivers/video/fbdev/via/dvi.h
diff --git a/drivers/video/via/global.c b/drivers/video/fbdev/via/global.c
index 3102171c1674..3102171c1674 100644
--- a/drivers/video/via/global.c
+++ b/drivers/video/fbdev/via/global.c
diff --git a/drivers/video/via/global.h b/drivers/video/fbdev/via/global.h
index 275dbbbd6b81..275dbbbd6b81 100644
--- a/drivers/video/via/global.h
+++ b/drivers/video/fbdev/via/global.h
diff --git a/drivers/video/via/hw.c b/drivers/video/fbdev/via/hw.c
index 22450908306c..22450908306c 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/fbdev/via/hw.c
diff --git a/drivers/video/via/hw.h b/drivers/video/fbdev/via/hw.h
index 3be073c58b03..3be073c58b03 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/fbdev/via/hw.h
diff --git a/drivers/video/via/ioctl.c b/drivers/video/fbdev/via/ioctl.c
index ea1c51428823..ea1c51428823 100644
--- a/drivers/video/via/ioctl.c
+++ b/drivers/video/fbdev/via/ioctl.c
diff --git a/drivers/video/via/ioctl.h b/drivers/video/fbdev/via/ioctl.h
index 6010d10b59e8..6010d10b59e8 100644
--- a/drivers/video/via/ioctl.h
+++ b/drivers/video/fbdev/via/ioctl.h
diff --git a/drivers/video/via/lcd.c b/drivers/video/fbdev/via/lcd.c
index 5d21ff436ec8..5d21ff436ec8 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/fbdev/via/lcd.c
diff --git a/drivers/video/via/lcd.h b/drivers/video/fbdev/via/lcd.h
index 5c988a063ad5..5c988a063ad5 100644
--- a/drivers/video/via/lcd.h
+++ b/drivers/video/fbdev/via/lcd.h
diff --git a/drivers/video/via/share.h b/drivers/video/fbdev/via/share.h
index 65c65c611e0a..65c65c611e0a 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/fbdev/via/share.h
diff --git a/drivers/video/via/tblDPASetting.c b/drivers/video/fbdev/via/tblDPASetting.c
index 73bb554e7c1e..73bb554e7c1e 100644
--- a/drivers/video/via/tblDPASetting.c
+++ b/drivers/video/fbdev/via/tblDPASetting.c
diff --git a/drivers/video/via/tblDPASetting.h b/drivers/video/fbdev/via/tblDPASetting.h
index 6db61519cb5d..6db61519cb5d 100644
--- a/drivers/video/via/tblDPASetting.h
+++ b/drivers/video/fbdev/via/tblDPASetting.h
diff --git a/drivers/video/via/via-core.c b/drivers/video/fbdev/via/via-core.c
index 6e274825fb31..6e274825fb31 100644
--- a/drivers/video/via/via-core.c
+++ b/drivers/video/fbdev/via/via-core.c
diff --git a/drivers/video/via/via-gpio.c b/drivers/video/fbdev/via/via-gpio.c
index e408679081ab..e408679081ab 100644
--- a/drivers/video/via/via-gpio.c
+++ b/drivers/video/fbdev/via/via-gpio.c
diff --git a/drivers/video/via/via_aux.c b/drivers/video/fbdev/via/via_aux.c
index 4a0a55cdac3d..4a0a55cdac3d 100644
--- a/drivers/video/via/via_aux.c
+++ b/drivers/video/fbdev/via/via_aux.c
diff --git a/drivers/video/via/via_aux.h b/drivers/video/fbdev/via/via_aux.h
index a8de3f038cea..a8de3f038cea 100644
--- a/drivers/video/via/via_aux.h
+++ b/drivers/video/fbdev/via/via_aux.h
diff --git a/drivers/video/via/via_aux_ch7301.c b/drivers/video/fbdev/via/via_aux_ch7301.c
index 1cbe5037a6b0..1cbe5037a6b0 100644
--- a/drivers/video/via/via_aux_ch7301.c
+++ b/drivers/video/fbdev/via/via_aux_ch7301.c
diff --git a/drivers/video/via/via_aux_edid.c b/drivers/video/fbdev/via/via_aux_edid.c
index 754d4509033f..754d4509033f 100644
--- a/drivers/video/via/via_aux_edid.c
+++ b/drivers/video/fbdev/via/via_aux_edid.c
diff --git a/drivers/video/via/via_aux_sii164.c b/drivers/video/fbdev/via/via_aux_sii164.c
index ca1b35f033b1..ca1b35f033b1 100644
--- a/drivers/video/via/via_aux_sii164.c
+++ b/drivers/video/fbdev/via/via_aux_sii164.c
diff --git a/drivers/video/via/via_aux_vt1621.c b/drivers/video/fbdev/via/via_aux_vt1621.c
index 38eca8479898..38eca8479898 100644
--- a/drivers/video/via/via_aux_vt1621.c
+++ b/drivers/video/fbdev/via/via_aux_vt1621.c
diff --git a/drivers/video/via/via_aux_vt1622.c b/drivers/video/fbdev/via/via_aux_vt1622.c
index 8c79c68ba683..8c79c68ba683 100644
--- a/drivers/video/via/via_aux_vt1622.c
+++ b/drivers/video/fbdev/via/via_aux_vt1622.c
diff --git a/drivers/video/via/via_aux_vt1625.c b/drivers/video/fbdev/via/via_aux_vt1625.c
index 03eb30165d36..03eb30165d36 100644
--- a/drivers/video/via/via_aux_vt1625.c
+++ b/drivers/video/fbdev/via/via_aux_vt1625.c
diff --git a/drivers/video/via/via_aux_vt1631.c b/drivers/video/fbdev/via/via_aux_vt1631.c
index 06e742f1f723..06e742f1f723 100644
--- a/drivers/video/via/via_aux_vt1631.c
+++ b/drivers/video/fbdev/via/via_aux_vt1631.c
diff --git a/drivers/video/via/via_aux_vt1632.c b/drivers/video/fbdev/via/via_aux_vt1632.c
index d24f4cd97401..d24f4cd97401 100644
--- a/drivers/video/via/via_aux_vt1632.c
+++ b/drivers/video/fbdev/via/via_aux_vt1632.c
diff --git a/drivers/video/via/via_aux_vt1636.c b/drivers/video/fbdev/via/via_aux_vt1636.c
index 9e015c101d4d..9e015c101d4d 100644
--- a/drivers/video/via/via_aux_vt1636.c
+++ b/drivers/video/fbdev/via/via_aux_vt1636.c
diff --git a/drivers/video/via/via_clock.c b/drivers/video/fbdev/via/via_clock.c
index db1e39277e32..db1e39277e32 100644
--- a/drivers/video/via/via_clock.c
+++ b/drivers/video/fbdev/via/via_clock.c
diff --git a/drivers/video/via/via_clock.h b/drivers/video/fbdev/via/via_clock.h
index 88714ae0d157..88714ae0d157 100644
--- a/drivers/video/via/via_clock.h
+++ b/drivers/video/fbdev/via/via_clock.h
diff --git a/drivers/video/via/via_i2c.c b/drivers/video/fbdev/via/via_i2c.c
index dd53058bbbb7..dd53058bbbb7 100644
--- a/drivers/video/via/via_i2c.c
+++ b/drivers/video/fbdev/via/via_i2c.c
diff --git a/drivers/video/via/via_modesetting.c b/drivers/video/fbdev/via/via_modesetting.c
index 0b414b09b9b4..0b414b09b9b4 100644
--- a/drivers/video/via/via_modesetting.c
+++ b/drivers/video/fbdev/via/via_modesetting.c
diff --git a/drivers/video/via/via_modesetting.h b/drivers/video/fbdev/via/via_modesetting.h
index f6a6503da3b3..f6a6503da3b3 100644
--- a/drivers/video/via/via_modesetting.h
+++ b/drivers/video/fbdev/via/via_modesetting.h
diff --git a/drivers/video/via/via_utility.c b/drivers/video/fbdev/via/via_utility.c
index 35458a5eadc8..35458a5eadc8 100644
--- a/drivers/video/via/via_utility.c
+++ b/drivers/video/fbdev/via/via_utility.c
diff --git a/drivers/video/via/via_utility.h b/drivers/video/fbdev/via/via_utility.h
index f23be1708c14..f23be1708c14 100644
--- a/drivers/video/via/via_utility.h
+++ b/drivers/video/fbdev/via/via_utility.h
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/fbdev/via/viafbdev.c
index 325c43c6ff97..325c43c6ff97 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/fbdev/via/viafbdev.c
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/fbdev/via/viafbdev.h
index f6b2ddf56e94..f6b2ddf56e94 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/fbdev/via/viafbdev.h
diff --git a/drivers/video/via/viamode.c b/drivers/video/fbdev/via/viamode.c
index 0666ab01cf4a..0666ab01cf4a 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/fbdev/via/viamode.c
diff --git a/drivers/video/via/viamode.h b/drivers/video/fbdev/via/viamode.h
index dd19106698e7..dd19106698e7 100644
--- a/drivers/video/via/viamode.h
+++ b/drivers/video/fbdev/via/viamode.h
diff --git a/drivers/video/via/vt1636.c b/drivers/video/fbdev/via/vt1636.c
index ee2903b472cf..ee2903b472cf 100644
--- a/drivers/video/via/vt1636.c
+++ b/drivers/video/fbdev/via/vt1636.c
diff --git a/drivers/video/via/vt1636.h b/drivers/video/fbdev/via/vt1636.h
index 4c1314e57468..4c1314e57468 100644
--- a/drivers/video/via/vt1636.h
+++ b/drivers/video/fbdev/via/vt1636.h
diff --git a/drivers/video/vt8500lcdfb.c b/drivers/video/fbdev/vt8500lcdfb.c
index a8f2b280f796..a8f2b280f796 100644
--- a/drivers/video/vt8500lcdfb.c
+++ b/drivers/video/fbdev/vt8500lcdfb.c
diff --git a/drivers/video/vt8500lcdfb.h b/drivers/video/fbdev/vt8500lcdfb.h
index 36ca3ca09d83..36ca3ca09d83 100644
--- a/drivers/video/vt8500lcdfb.h
+++ b/drivers/video/fbdev/vt8500lcdfb.h
diff --git a/drivers/video/vt8623fb.c b/drivers/video/fbdev/vt8623fb.c
index 5c7cbc6c6236..5c7cbc6c6236 100644
--- a/drivers/video/vt8623fb.c
+++ b/drivers/video/fbdev/vt8623fb.c
diff --git a/drivers/video/w100fb.c b/drivers/video/fbdev/w100fb.c
index 10951c82f6ed..10951c82f6ed 100644
--- a/drivers/video/w100fb.c
+++ b/drivers/video/fbdev/w100fb.c
diff --git a/drivers/video/w100fb.h b/drivers/video/fbdev/w100fb.h
index fffae7b4f6e9..fffae7b4f6e9 100644
--- a/drivers/video/w100fb.h
+++ b/drivers/video/fbdev/w100fb.h
diff --git a/drivers/video/wm8505fb.c b/drivers/video/fbdev/wm8505fb.c
index 537d199612af..537d199612af 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/fbdev/wm8505fb.c
diff --git a/drivers/video/wm8505fb_regs.h b/drivers/video/fbdev/wm8505fb_regs.h
index 4dd41668c6d1..4dd41668c6d1 100644
--- a/drivers/video/wm8505fb_regs.h
+++ b/drivers/video/fbdev/wm8505fb_regs.h
diff --git a/drivers/video/wmt_ge_rops.c b/drivers/video/fbdev/wmt_ge_rops.c
index b0a9f34b2e01..9df6fe78a44b 100644
--- a/drivers/video/wmt_ge_rops.c
+++ b/drivers/video/fbdev/wmt_ge_rops.c
@@ -18,7 +18,7 @@
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/fb.h> 19#include <linux/fb.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include "fb_draw.h" 21#include "core/fb_draw.h"
22 22
23#define GE_COMMAND_OFF 0x00 23#define GE_COMMAND_OFF 0x00
24#define GE_DEPTH_OFF 0x04 24#define GE_DEPTH_OFF 0x04
diff --git a/drivers/video/wmt_ge_rops.h b/drivers/video/fbdev/wmt_ge_rops.h
index f73ec6377a46..f73ec6377a46 100644
--- a/drivers/video/wmt_ge_rops.h
+++ b/drivers/video/fbdev/wmt_ge_rops.h
diff --git a/drivers/video/xen-fbfront.c b/drivers/video/fbdev/xen-fbfront.c
index 901014bbc821..901014bbc821 100644
--- a/drivers/video/xen-fbfront.c
+++ b/drivers/video/fbdev/xen-fbfront.c
diff --git a/drivers/video/xilinxfb.c b/drivers/video/fbdev/xilinxfb.c
index 553cff2f3f4c..553cff2f3f4c 100644
--- a/drivers/video/xilinxfb.c
+++ b/drivers/video/fbdev/xilinxfb.c
diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
deleted file mode 100644
index 63b23f87081d..000000000000
--- a/drivers/video/omap2/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
1config OMAP2_VRFB
2 bool
3
4if ARCH_OMAP2PLUS
5
6source "drivers/video/omap2/dss/Kconfig"
7source "drivers/video/omap2/omapfb/Kconfig"
8source "drivers/video/omap2/displays-new/Kconfig"
9
10endif
diff --git a/drivers/vme/bridges/vme_tsi148.c b/drivers/vme/bridges/vme_tsi148.c
index 06990c6a1a69..61e706c0e00c 100644
--- a/drivers/vme/bridges/vme_tsi148.c
+++ b/drivers/vme/bridges/vme_tsi148.c
@@ -320,7 +320,7 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge)
320 struct pci_dev *pdev; 320 struct pci_dev *pdev;
321 struct tsi148_driver *bridge; 321 struct tsi148_driver *bridge;
322 322
323 pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); 323 pdev = to_pci_dev(tsi148_bridge->parent);
324 324
325 bridge = tsi148_bridge->driver_priv; 325 bridge = tsi148_bridge->driver_priv;
326 326
@@ -433,9 +433,7 @@ static void tsi148_irq_set(struct vme_bridge *tsi148_bridge, int level,
433 iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO); 433 iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO);
434 434
435 if (sync != 0) { 435 if (sync != 0) {
436 pdev = container_of(tsi148_bridge->parent, 436 pdev = to_pci_dev(tsi148_bridge->parent);
437 struct pci_dev, dev);
438
439 synchronize_irq(pdev->irq); 437 synchronize_irq(pdev->irq);
440 } 438 }
441 } else { 439 } else {
@@ -741,7 +739,7 @@ static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled,
741 reg_join(vme_bound_high, vme_bound_low, &vme_bound); 739 reg_join(vme_bound_high, vme_bound_low, &vme_bound);
742 reg_join(pci_offset_high, pci_offset_low, &pci_offset); 740 reg_join(pci_offset_high, pci_offset_low, &pci_offset);
743 741
744 *pci_base = (dma_addr_t)vme_base + pci_offset; 742 *pci_base = (dma_addr_t)(*vme_base + pci_offset);
745 743
746 *enabled = 0; 744 *enabled = 0;
747 *aspace = 0; 745 *aspace = 0;
@@ -814,7 +812,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
814 812
815 tsi148_bridge = image->parent; 813 tsi148_bridge = image->parent;
816 814
817 pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); 815 pdev = to_pci_dev(tsi148_bridge->parent);
818 816
819 existing_size = (unsigned long long)(image->bus_resource.end - 817 existing_size = (unsigned long long)(image->bus_resource.end -
820 image->bus_resource.start); 818 image->bus_resource.start);
@@ -910,11 +908,15 @@ static int tsi148_master_set(struct vme_master_resource *image, int enabled,
910 unsigned long long pci_bound, vme_offset, pci_base; 908 unsigned long long pci_bound, vme_offset, pci_base;
911 struct vme_bridge *tsi148_bridge; 909 struct vme_bridge *tsi148_bridge;
912 struct tsi148_driver *bridge; 910 struct tsi148_driver *bridge;
911 struct pci_bus_region region;
912 struct pci_dev *pdev;
913 913
914 tsi148_bridge = image->parent; 914 tsi148_bridge = image->parent;
915 915
916 bridge = tsi148_bridge->driver_priv; 916 bridge = tsi148_bridge->driver_priv;
917 917
918 pdev = to_pci_dev(tsi148_bridge->parent);
919
918 /* Verify input data */ 920 /* Verify input data */
919 if (vme_base & 0xFFFF) { 921 if (vme_base & 0xFFFF) {
920 dev_err(tsi148_bridge->parent, "Invalid VME Window " 922 dev_err(tsi148_bridge->parent, "Invalid VME Window "
@@ -949,7 +951,9 @@ static int tsi148_master_set(struct vme_master_resource *image, int enabled,
949 pci_bound = 0; 951 pci_bound = 0;
950 vme_offset = 0; 952 vme_offset = 0;
951 } else { 953 } else {
952 pci_base = (unsigned long long)image->bus_resource.start; 954 pcibios_resource_to_bus(pdev->bus, &region,
955 &image->bus_resource);
956 pci_base = region.start;
953 957
954 /* 958 /*
955 * Bound address is a valid address for the window, adjust 959 * Bound address is a valid address for the window, adjust
@@ -2232,7 +2236,7 @@ static void *tsi148_alloc_consistent(struct device *parent, size_t size,
2232 struct pci_dev *pdev; 2236 struct pci_dev *pdev;
2233 2237
2234 /* Find pci_dev container of dev */ 2238 /* Find pci_dev container of dev */
2235 pdev = container_of(parent, struct pci_dev, dev); 2239 pdev = to_pci_dev(parent);
2236 2240
2237 return pci_alloc_consistent(pdev, size, dma); 2241 return pci_alloc_consistent(pdev, size, dma);
2238} 2242}
@@ -2243,7 +2247,7 @@ static void tsi148_free_consistent(struct device *parent, size_t size,
2243 struct pci_dev *pdev; 2247 struct pci_dev *pdev;
2244 2248
2245 /* Find pci_dev container of dev */ 2249 /* Find pci_dev container of dev */
2246 pdev = container_of(parent, struct pci_dev, dev); 2250 pdev = to_pci_dev(parent);
2247 2251
2248 pci_free_consistent(pdev, size, vaddr, dma); 2252 pci_free_consistent(pdev, size, vaddr, dma);
2249} 2253}
diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index b96f61b15dc6..ff52618cafbe 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -614,27 +614,11 @@ end:
614 return err; 614 return err;
615} 615}
616 616
617/* 617static int w1_family_notify(unsigned long action, struct w1_slave *sl)
618 * Handle sysfs file creation and removal here, before userspace is told that
619 * the device is added / removed from the system
620 */
621static int w1_bus_notify(struct notifier_block *nb, unsigned long action,
622 void *data)
623{ 618{
624 struct device *dev = data;
625 struct w1_slave *sl;
626 struct w1_family_ops *fops; 619 struct w1_family_ops *fops;
627 int err; 620 int err;
628 621
629 /*
630 * Only care about slave devices at the moment. Yes, we should use a
631 * separate "type" for this, but for now, look at the release function
632 * to know which type it is...
633 */
634 if (dev->release != w1_slave_release)
635 return 0;
636
637 sl = dev_to_w1_slave(dev);
638 fops = sl->family->fops; 622 fops = sl->family->fops;
639 623
640 if (!fops) 624 if (!fops)
@@ -673,10 +657,6 @@ static int w1_bus_notify(struct notifier_block *nb, unsigned long action,
673 return 0; 657 return 0;
674} 658}
675 659
676static struct notifier_block w1_bus_nb = {
677 .notifier_call = w1_bus_notify,
678};
679
680static int __w1_attach_slave_device(struct w1_slave *sl) 660static int __w1_attach_slave_device(struct w1_slave *sl)
681{ 661{
682 int err; 662 int err;
@@ -698,6 +678,9 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
698 dev_dbg(&sl->dev, "%s: registering %s as %p.\n", __func__, 678 dev_dbg(&sl->dev, "%s: registering %s as %p.\n", __func__,
699 dev_name(&sl->dev), sl); 679 dev_name(&sl->dev), sl);
700 680
681 /* suppress for w1_family_notify before sending KOBJ_ADD */
682 dev_set_uevent_suppress(&sl->dev, true);
683
701 err = device_register(&sl->dev); 684 err = device_register(&sl->dev);
702 if (err < 0) { 685 if (err < 0) {
703 dev_err(&sl->dev, 686 dev_err(&sl->dev,
@@ -705,7 +688,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
705 dev_name(&sl->dev), err); 688 dev_name(&sl->dev), err);
706 return err; 689 return err;
707 } 690 }
708 691 w1_family_notify(BUS_NOTIFY_ADD_DEVICE, sl);
709 692
710 dev_set_uevent_suppress(&sl->dev, false); 693 dev_set_uevent_suppress(&sl->dev, false);
711 kobject_uevent(&sl->dev.kobj, KOBJ_ADD); 694 kobject_uevent(&sl->dev.kobj, KOBJ_ADD);
@@ -799,6 +782,7 @@ int w1_unref_slave(struct w1_slave *sl)
799 msg.type = W1_SLAVE_REMOVE; 782 msg.type = W1_SLAVE_REMOVE;
800 w1_netlink_send(sl->master, &msg); 783 w1_netlink_send(sl->master, &msg);
801 784
785 w1_family_notify(BUS_NOTIFY_DEL_DEVICE, sl);
802 device_unregister(&sl->dev); 786 device_unregister(&sl->dev);
803 #ifdef DEBUG 787 #ifdef DEBUG
804 memset(sl, 0, sizeof(*sl)); 788 memset(sl, 0, sizeof(*sl));
@@ -1186,10 +1170,6 @@ static int __init w1_init(void)
1186 goto err_out_exit_init; 1170 goto err_out_exit_init;
1187 } 1171 }
1188 1172
1189 retval = bus_register_notifier(&w1_bus_type, &w1_bus_nb);
1190 if (retval)
1191 goto err_out_bus_unregister;
1192
1193 retval = driver_register(&w1_master_driver); 1173 retval = driver_register(&w1_master_driver);
1194 if (retval) { 1174 if (retval) {
1195 printk(KERN_ERR 1175 printk(KERN_ERR
diff --git a/drivers/w1/w1_netlink.c b/drivers/w1/w1_netlink.c
index 5234964fe001..a02704a59321 100644
--- a/drivers/w1/w1_netlink.c
+++ b/drivers/w1/w1_netlink.c
@@ -300,12 +300,6 @@ static int w1_process_command_root(struct cn_msg *msg,
300 struct w1_netlink_msg *w; 300 struct w1_netlink_msg *w;
301 u32 *id; 301 u32 *id;
302 302
303 if (mcmd->type != W1_LIST_MASTERS) {
304 printk(KERN_NOTICE "%s: msg: %x.%x, wrong type: %u, len: %u.\n",
305 __func__, msg->id.idx, msg->id.val, mcmd->type, mcmd->len);
306 return -EPROTO;
307 }
308
309 cn = kmalloc(PAGE_SIZE, GFP_KERNEL); 303 cn = kmalloc(PAGE_SIZE, GFP_KERNEL);
310 if (!cn) 304 if (!cn)
311 return -ENOMEM; 305 return -ENOMEM;
@@ -441,6 +435,9 @@ static void w1_process_cb(struct w1_master *dev, struct w1_async_cmd *async_cmd)
441 w1_netlink_send_error(&node->block->msg, node->m, cmd, 435 w1_netlink_send_error(&node->block->msg, node->m, cmd,
442 node->block->portid, err); 436 node->block->portid, err);
443 437
438 /* ref taken in w1_search_slave or w1_search_master_id when building
439 * the block
440 */
444 if (sl) 441 if (sl)
445 w1_unref_slave(sl); 442 w1_unref_slave(sl);
446 else 443 else
@@ -503,30 +500,42 @@ static void w1_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
503 500
504 msg_len = msg->len; 501 msg_len = msg->len;
505 while (msg_len && !err) { 502 while (msg_len && !err) {
506 struct w1_reg_num id;
507 u16 mlen = m->len;
508 503
509 dev = NULL; 504 dev = NULL;
510 sl = NULL; 505 sl = NULL;
511 506
512 memcpy(&id, m->id.id, sizeof(id));
513#if 0
514 printk("%s: %02x.%012llx.%02x: type=%02x, len=%u.\n",
515 __func__, id.family, (unsigned long long)id.id, id.crc, m->type, m->len);
516#endif
517 if (m->len + sizeof(struct w1_netlink_msg) > msg_len) { 507 if (m->len + sizeof(struct w1_netlink_msg) > msg_len) {
518 err = -E2BIG; 508 err = -E2BIG;
519 break; 509 break;
520 } 510 }
521 511
512 /* execute on this thread, no need to process later */
513 if (m->type == W1_LIST_MASTERS) {
514 err = w1_process_command_root(msg, m, nsp->portid);
515 goto out_cont;
516 }
517
518 /* All following message types require additional data,
519 * check here before references are taken.
520 */
521 if (!m->len) {
522 err = -EPROTO;
523 goto out_cont;
524 }
525
526 /* both search calls take reference counts */
522 if (m->type == W1_MASTER_CMD) { 527 if (m->type == W1_MASTER_CMD) {
523 dev = w1_search_master_id(m->id.mst.id); 528 dev = w1_search_master_id(m->id.mst.id);
524 } else if (m->type == W1_SLAVE_CMD) { 529 } else if (m->type == W1_SLAVE_CMD) {
525 sl = w1_search_slave(&id); 530 sl = w1_search_slave((struct w1_reg_num *)m->id.id);
526 if (sl) 531 if (sl)
527 dev = sl->master; 532 dev = sl->master;
528 } else { 533 } else {
529 err = w1_process_command_root(msg, m, nsp->portid); 534 printk(KERN_NOTICE
535 "%s: msg: %x.%x, wrong type: %u, len: %u.\n",
536 __func__, msg->id.idx, msg->id.val,
537 m->type, m->len);
538 err = -EPROTO;
530 goto out_cont; 539 goto out_cont;
531 } 540 }
532 541
@@ -536,8 +545,6 @@ static void w1_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
536 } 545 }
537 546
538 err = 0; 547 err = 0;
539 if (!mlen)
540 goto out_cont;
541 548
542 atomic_inc(&block->refcnt); 549 atomic_inc(&block->refcnt);
543 node->async.cb = w1_process_cb; 550 node->async.cb = w1_process_cb;
@@ -557,7 +564,8 @@ out_cont:
557 if (err) 564 if (err)
558 w1_netlink_send_error(msg, m, NULL, nsp->portid, err); 565 w1_netlink_send_error(msg, m, NULL, nsp->portid, err);
559 msg_len -= sizeof(struct w1_netlink_msg) + m->len; 566 msg_len -= sizeof(struct w1_netlink_msg) + m->len;
560 m = (struct w1_netlink_msg *)(((u8 *)m) + sizeof(struct w1_netlink_msg) + m->len); 567 m = (struct w1_netlink_msg *)(((u8 *)m) +
568 sizeof(struct w1_netlink_msg) + m->len);
561 569
562 /* 570 /*
563 * Let's allow requests for nonexisting devices. 571 * Let's allow requests for nonexisting devices.
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c
index fc6c94c0b436..32f9236c959f 100644
--- a/drivers/xen/manage.c
+++ b/drivers/xen/manage.c
@@ -198,10 +198,32 @@ struct shutdown_handler {
198 void (*cb)(void); 198 void (*cb)(void);
199}; 199};
200 200
201static int poweroff_nb(struct notifier_block *cb, unsigned long code, void *unused)
202{
203 switch (code) {
204 case SYS_DOWN:
205 case SYS_HALT:
206 case SYS_POWER_OFF:
207 shutting_down = SHUTDOWN_POWEROFF;
208 default:
209 break;
210 }
211 return NOTIFY_DONE;
212}
201static void do_poweroff(void) 213static void do_poweroff(void)
202{ 214{
203 shutting_down = SHUTDOWN_POWEROFF; 215 switch (system_state) {
204 orderly_poweroff(false); 216 case SYSTEM_BOOTING:
217 orderly_poweroff(true);
218 break;
219 case SYSTEM_RUNNING:
220 orderly_poweroff(false);
221 break;
222 default:
223 /* Don't do it when we are halting/rebooting. */
224 pr_info("Ignoring Xen toolstack shutdown.\n");
225 break;
226 }
205} 227}
206 228
207static void do_reboot(void) 229static void do_reboot(void)
@@ -307,6 +329,10 @@ static struct xenbus_watch shutdown_watch = {
307 .callback = shutdown_handler 329 .callback = shutdown_handler
308}; 330};
309 331
332static struct notifier_block xen_reboot_nb = {
333 .notifier_call = poweroff_nb,
334};
335
310static int setup_shutdown_watcher(void) 336static int setup_shutdown_watcher(void)
311{ 337{
312 int err; 338 int err;
@@ -317,6 +343,7 @@ static int setup_shutdown_watcher(void)
317 return err; 343 return err;
318 } 344 }
319 345
346
320#ifdef CONFIG_MAGIC_SYSRQ 347#ifdef CONFIG_MAGIC_SYSRQ
321 err = register_xenbus_watch(&sysrq_watch); 348 err = register_xenbus_watch(&sysrq_watch);
322 if (err) { 349 if (err) {
@@ -345,6 +372,7 @@ int xen_setup_shutdown_event(void)
345 if (!xen_domain()) 372 if (!xen_domain())
346 return -ENODEV; 373 return -ENODEV;
347 register_xenstore_notifier(&xenstore_notifier); 374 register_xenstore_notifier(&xenstore_notifier);
375 register_reboot_notifier(&xen_reboot_nb);
348 376
349 return 0; 377 return 0;
350} 378}
diff --git a/drivers/xen/xen-pciback/pciback_ops.c b/drivers/xen/xen-pciback/pciback_ops.c
index 929dd46bb40c..607e41460c0d 100644
--- a/drivers/xen/xen-pciback/pciback_ops.c
+++ b/drivers/xen/xen-pciback/pciback_ops.c
@@ -217,7 +217,7 @@ int xen_pcibk_enable_msix(struct xen_pcibk_device *pdev,
217 if (result == 0) { 217 if (result == 0) {
218 for (i = 0; i < op->value; i++) { 218 for (i = 0; i < op->value; i++) {
219 op->msix_entries[i].entry = entries[i].entry; 219 op->msix_entries[i].entry = entries[i].entry;
220 if (entries[i].vector) 220 if (entries[i].vector) {
221 op->msix_entries[i].vector = 221 op->msix_entries[i].vector =
222 xen_pirq_from_irq(entries[i].vector); 222 xen_pirq_from_irq(entries[i].vector);
223 if (unlikely(verbose_request)) 223 if (unlikely(verbose_request))
@@ -225,6 +225,7 @@ int xen_pcibk_enable_msix(struct xen_pcibk_device *pdev,
225 "MSI-X[%d]: %d\n", 225 "MSI-X[%d]: %d\n",
226 pci_name(dev), i, 226 pci_name(dev), i,
227 op->msix_entries[i].vector); 227 op->msix_entries[i].vector);
228 }
228 } 229 }
229 } else 230 } else
230 pr_warn_ratelimited("%s: error enabling MSI-X for guest %u: err %d!\n", 231 pr_warn_ratelimited("%s: error enabling MSI-X for guest %u: err %d!\n",
diff --git a/drivers/xen/xen-pciback/vpci.c b/drivers/xen/xen-pciback/vpci.c
index 3165ce361b00..51afff96c515 100644
--- a/drivers/xen/xen-pciback/vpci.c
+++ b/drivers/xen/xen-pciback/vpci.c
@@ -137,6 +137,8 @@ unlock:
137 /* Publish this device. */ 137 /* Publish this device. */
138 if (!err) 138 if (!err)
139 err = publish_cb(pdev, 0, 0, PCI_DEVFN(slot, func), devid); 139 err = publish_cb(pdev, 0, 0, PCI_DEVFN(slot, func), devid);
140 else
141 kfree(dev_entry);
140 142
141out: 143out:
142 return err; 144 return err;
diff --git a/drivers/xen/xenbus/xenbus_xs.c b/drivers/xen/xenbus/xenbus_xs.c
index b6d5fff43d16..ba804f3d8278 100644
--- a/drivers/xen/xenbus/xenbus_xs.c
+++ b/drivers/xen/xenbus/xenbus_xs.c
@@ -50,6 +50,7 @@
50#include <xen/xenbus.h> 50#include <xen/xenbus.h>
51#include <xen/xen.h> 51#include <xen/xen.h>
52#include "xenbus_comms.h" 52#include "xenbus_comms.h"
53#include "xenbus_probe.h"
53 54
54struct xs_stored_msg { 55struct xs_stored_msg {
55 struct list_head list; 56 struct list_head list;
@@ -139,6 +140,29 @@ static int get_error(const char *errorstring)
139 return xsd_errors[i].errnum; 140 return xsd_errors[i].errnum;
140} 141}
141 142
143static bool xenbus_ok(void)
144{
145 switch (xen_store_domain_type) {
146 case XS_LOCAL:
147 switch (system_state) {
148 case SYSTEM_POWER_OFF:
149 case SYSTEM_RESTART:
150 case SYSTEM_HALT:
151 return false;
152 default:
153 break;
154 }
155 return true;
156 case XS_PV:
157 case XS_HVM:
158 /* FIXME: Could check that the remote domain is alive,
159 * but it is normally initial domain. */
160 return true;
161 default:
162 break;
163 }
164 return false;
165}
142static void *read_reply(enum xsd_sockmsg_type *type, unsigned int *len) 166static void *read_reply(enum xsd_sockmsg_type *type, unsigned int *len)
143{ 167{
144 struct xs_stored_msg *msg; 168 struct xs_stored_msg *msg;
@@ -148,9 +172,20 @@ static void *read_reply(enum xsd_sockmsg_type *type, unsigned int *len)
148 172
149 while (list_empty(&xs_state.reply_list)) { 173 while (list_empty(&xs_state.reply_list)) {
150 spin_unlock(&xs_state.reply_lock); 174 spin_unlock(&xs_state.reply_lock);
151 /* XXX FIXME: Avoid synchronous wait for response here. */ 175 if (xenbus_ok())
152 wait_event(xs_state.reply_waitq, 176 /* XXX FIXME: Avoid synchronous wait for response here. */
153 !list_empty(&xs_state.reply_list)); 177 wait_event_timeout(xs_state.reply_waitq,
178 !list_empty(&xs_state.reply_list),
179 msecs_to_jiffies(500));
180 else {
181 /*
182 * If we are in the process of being shut-down there is
183 * no point of trying to contact XenBus - it is either
184 * killed (xenstored application) or the other domain
185 * has been killed or is unreachable.
186 */
187 return ERR_PTR(-EIO);
188 }
154 spin_lock(&xs_state.reply_lock); 189 spin_lock(&xs_state.reply_lock);
155 } 190 }
156 191
@@ -215,6 +250,9 @@ void *xenbus_dev_request_and_reply(struct xsd_sockmsg *msg)
215 250
216 mutex_unlock(&xs_state.request_mutex); 251 mutex_unlock(&xs_state.request_mutex);
217 252
253 if (IS_ERR(ret))
254 return ret;
255
218 if ((msg->type == XS_TRANSACTION_END) || 256 if ((msg->type == XS_TRANSACTION_END) ||
219 ((req_msg.type == XS_TRANSACTION_START) && 257 ((req_msg.type == XS_TRANSACTION_START) &&
220 (msg->type == XS_ERROR))) 258 (msg->type == XS_ERROR)))
diff --git a/firmware/WHENCE b/firmware/WHENCE
index 8388f02de2bd..0c4d96dee9b6 100644
--- a/firmware/WHENCE
+++ b/firmware/WHENCE
@@ -273,16 +273,6 @@ Converted from Intel HEX files, used in our binary representation of ihex.
273 273
274-------------------------------------------------------------------------- 274--------------------------------------------------------------------------
275 275
276Driver: ip2 -- Computone IntelliPort Plus serial device
277
278File: intelliport2.bin
279
280Licence: Unknown
281
282Found in hex form in kernel source.
283
284--------------------------------------------------------------------------
285
286Driver: CPiA2 -- cameras based on Vision's CPiA2 276Driver: CPiA2 -- cameras based on Vision's CPiA2
287 277
288File: cpia2/stv0672_vp4.bin 278File: cpia2/stv0672_vp4.bin
diff --git a/fs/affs/super.c b/fs/affs/super.c
index 6d589f28bf9b..895ac7dc9dbf 100644
--- a/fs/affs/super.c
+++ b/fs/affs/super.c
@@ -340,8 +340,6 @@ static int affs_fill_super(struct super_block *sb, void *data, int silent)
340 &blocksize,&sbi->s_prefix, 340 &blocksize,&sbi->s_prefix,
341 sbi->s_volume, &mount_flags)) { 341 sbi->s_volume, &mount_flags)) {
342 printk(KERN_ERR "AFFS: Error parsing options\n"); 342 printk(KERN_ERR "AFFS: Error parsing options\n");
343 kfree(sbi->s_prefix);
344 kfree(sbi);
345 return -EINVAL; 343 return -EINVAL;
346 } 344 }
347 /* N.B. after this point s_prefix must be released */ 345 /* N.B. after this point s_prefix must be released */
diff --git a/fs/aio.c b/fs/aio.c
index 12a3de0ee6da..a0ed6c7d2cd2 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -112,6 +112,11 @@ struct kioctx {
112 112
113 struct work_struct free_work; 113 struct work_struct free_work;
114 114
115 /*
116 * signals when all in-flight requests are done
117 */
118 struct completion *requests_done;
119
115 struct { 120 struct {
116 /* 121 /*
117 * This counts the number of available slots in the ringbuffer, 122 * This counts the number of available slots in the ringbuffer,
@@ -508,6 +513,10 @@ static void free_ioctx_reqs(struct percpu_ref *ref)
508{ 513{
509 struct kioctx *ctx = container_of(ref, struct kioctx, reqs); 514 struct kioctx *ctx = container_of(ref, struct kioctx, reqs);
510 515
516 /* At this point we know that there are no any in-flight requests */
517 if (ctx->requests_done)
518 complete(ctx->requests_done);
519
511 INIT_WORK(&ctx->free_work, free_ioctx); 520 INIT_WORK(&ctx->free_work, free_ioctx);
512 schedule_work(&ctx->free_work); 521 schedule_work(&ctx->free_work);
513} 522}
@@ -718,7 +727,8 @@ err:
718 * when the processes owning a context have all exited to encourage 727 * when the processes owning a context have all exited to encourage
719 * the rapid destruction of the kioctx. 728 * the rapid destruction of the kioctx.
720 */ 729 */
721static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx) 730static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
731 struct completion *requests_done)
722{ 732{
723 if (!atomic_xchg(&ctx->dead, 1)) { 733 if (!atomic_xchg(&ctx->dead, 1)) {
724 struct kioctx_table *table; 734 struct kioctx_table *table;
@@ -747,7 +757,11 @@ static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx)
747 if (ctx->mmap_size) 757 if (ctx->mmap_size)
748 vm_munmap(ctx->mmap_base, ctx->mmap_size); 758 vm_munmap(ctx->mmap_base, ctx->mmap_size);
749 759
760 ctx->requests_done = requests_done;
750 percpu_ref_kill(&ctx->users); 761 percpu_ref_kill(&ctx->users);
762 } else {
763 if (requests_done)
764 complete(requests_done);
751 } 765 }
752} 766}
753 767
@@ -809,7 +823,7 @@ void exit_aio(struct mm_struct *mm)
809 */ 823 */
810 ctx->mmap_size = 0; 824 ctx->mmap_size = 0;
811 825
812 kill_ioctx(mm, ctx); 826 kill_ioctx(mm, ctx, NULL);
813 } 827 }
814} 828}
815 829
@@ -1185,7 +1199,7 @@ SYSCALL_DEFINE2(io_setup, unsigned, nr_events, aio_context_t __user *, ctxp)
1185 if (!IS_ERR(ioctx)) { 1199 if (!IS_ERR(ioctx)) {
1186 ret = put_user(ioctx->user_id, ctxp); 1200 ret = put_user(ioctx->user_id, ctxp);
1187 if (ret) 1201 if (ret)
1188 kill_ioctx(current->mm, ioctx); 1202 kill_ioctx(current->mm, ioctx, NULL);
1189 percpu_ref_put(&ioctx->users); 1203 percpu_ref_put(&ioctx->users);
1190 } 1204 }
1191 1205
@@ -1203,8 +1217,22 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx)
1203{ 1217{
1204 struct kioctx *ioctx = lookup_ioctx(ctx); 1218 struct kioctx *ioctx = lookup_ioctx(ctx);
1205 if (likely(NULL != ioctx)) { 1219 if (likely(NULL != ioctx)) {
1206 kill_ioctx(current->mm, ioctx); 1220 struct completion requests_done =
1221 COMPLETION_INITIALIZER_ONSTACK(requests_done);
1222
1223 /* Pass requests_done to kill_ioctx() where it can be set
1224 * in a thread-safe way. If we try to set it here then we have
1225 * a race condition if two io_destroy() called simultaneously.
1226 */
1227 kill_ioctx(current->mm, ioctx, &requests_done);
1207 percpu_ref_put(&ioctx->users); 1228 percpu_ref_put(&ioctx->users);
1229
1230 /* Wait until all IO for the context are done. Otherwise kernel
1231 * keep using user-space buffers even if user thinks the context
1232 * is destroyed.
1233 */
1234 wait_for_completion(&requests_done);
1235
1208 return 0; 1236 return 0;
1209 } 1237 }
1210 pr_debug("EINVAL: io_destroy: invalid context id\n"); 1238 pr_debug("EINVAL: io_destroy: invalid context id\n");
@@ -1299,10 +1327,8 @@ rw_common:
1299 &iovec, compat) 1327 &iovec, compat)
1300 : aio_setup_single_vector(req, rw, buf, &nr_segs, 1328 : aio_setup_single_vector(req, rw, buf, &nr_segs,
1301 iovec); 1329 iovec);
1302 if (ret) 1330 if (!ret)
1303 return ret; 1331 ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes);
1304
1305 ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes);
1306 if (ret < 0) { 1332 if (ret < 0) {
1307 if (iovec != &inline_vec) 1333 if (iovec != &inline_vec)
1308 kfree(iovec); 1334 kfree(iovec);
diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c
index 2caf36ac3e93..cc87c1abac97 100644
--- a/fs/autofs4/root.c
+++ b/fs/autofs4/root.c
@@ -179,7 +179,7 @@ static struct dentry *autofs4_lookup_active(struct dentry *dentry)
179 spin_lock(&active->d_lock); 179 spin_lock(&active->d_lock);
180 180
181 /* Already gone? */ 181 /* Already gone? */
182 if (!d_count(active)) 182 if ((int) d_count(active) <= 0)
183 goto next; 183 goto next;
184 184
185 qstr = &active->d_name; 185 qstr = &active->d_name;
@@ -230,7 +230,7 @@ static struct dentry *autofs4_lookup_expiring(struct dentry *dentry)
230 230
231 spin_lock(&expiring->d_lock); 231 spin_lock(&expiring->d_lock);
232 232
233 /* Bad luck, we've already been dentry_iput */ 233 /* We've already been dentry_iput or unlinked */
234 if (!expiring->d_inode) 234 if (!expiring->d_inode)
235 goto next; 235 goto next;
236 236
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h
index 4c48df572bd6..ba6b88528dc7 100644
--- a/fs/btrfs/ctree.h
+++ b/fs/btrfs/ctree.h
@@ -2058,6 +2058,20 @@ struct btrfs_ioctl_defrag_range_args {
2058#define btrfs_raw_test_opt(o, opt) ((o) & BTRFS_MOUNT_##opt) 2058#define btrfs_raw_test_opt(o, opt) ((o) & BTRFS_MOUNT_##opt)
2059#define btrfs_test_opt(root, opt) ((root)->fs_info->mount_opt & \ 2059#define btrfs_test_opt(root, opt) ((root)->fs_info->mount_opt & \
2060 BTRFS_MOUNT_##opt) 2060 BTRFS_MOUNT_##opt)
2061#define btrfs_set_and_info(root, opt, fmt, args...) \
2062{ \
2063 if (!btrfs_test_opt(root, opt)) \
2064 btrfs_info(root->fs_info, fmt, ##args); \
2065 btrfs_set_opt(root->fs_info->mount_opt, opt); \
2066}
2067
2068#define btrfs_clear_and_info(root, opt, fmt, args...) \
2069{ \
2070 if (btrfs_test_opt(root, opt)) \
2071 btrfs_info(root->fs_info, fmt, ##args); \
2072 btrfs_clear_opt(root->fs_info->mount_opt, opt); \
2073}
2074
2061/* 2075/*
2062 * Inode flags 2076 * Inode flags
2063 */ 2077 */
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 029d46c2e170..983314932af3 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -2861,7 +2861,7 @@ retry_root_backup:
2861 printk(KERN_ERR "BTRFS: failed to read log tree\n"); 2861 printk(KERN_ERR "BTRFS: failed to read log tree\n");
2862 free_extent_buffer(log_tree_root->node); 2862 free_extent_buffer(log_tree_root->node);
2863 kfree(log_tree_root); 2863 kfree(log_tree_root);
2864 goto fail_trans_kthread; 2864 goto fail_qgroup;
2865 } 2865 }
2866 /* returns with log_tree_root freed on success */ 2866 /* returns with log_tree_root freed on success */
2867 ret = btrfs_recover_log_trees(log_tree_root); 2867 ret = btrfs_recover_log_trees(log_tree_root);
@@ -2870,24 +2870,24 @@ retry_root_backup:
2870 "Failed to recover log tree"); 2870 "Failed to recover log tree");
2871 free_extent_buffer(log_tree_root->node); 2871 free_extent_buffer(log_tree_root->node);
2872 kfree(log_tree_root); 2872 kfree(log_tree_root);
2873 goto fail_trans_kthread; 2873 goto fail_qgroup;
2874 } 2874 }
2875 2875
2876 if (sb->s_flags & MS_RDONLY) { 2876 if (sb->s_flags & MS_RDONLY) {
2877 ret = btrfs_commit_super(tree_root); 2877 ret = btrfs_commit_super(tree_root);
2878 if (ret) 2878 if (ret)
2879 goto fail_trans_kthread; 2879 goto fail_qgroup;
2880 } 2880 }
2881 } 2881 }
2882 2882
2883 ret = btrfs_find_orphan_roots(tree_root); 2883 ret = btrfs_find_orphan_roots(tree_root);
2884 if (ret) 2884 if (ret)
2885 goto fail_trans_kthread; 2885 goto fail_qgroup;
2886 2886
2887 if (!(sb->s_flags & MS_RDONLY)) { 2887 if (!(sb->s_flags & MS_RDONLY)) {
2888 ret = btrfs_cleanup_fs_roots(fs_info); 2888 ret = btrfs_cleanup_fs_roots(fs_info);
2889 if (ret) 2889 if (ret)
2890 goto fail_trans_kthread; 2890 goto fail_qgroup;
2891 2891
2892 ret = btrfs_recover_relocation(tree_root); 2892 ret = btrfs_recover_relocation(tree_root);
2893 if (ret < 0) { 2893 if (ret < 0) {
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 1306487c82cf..5590af92094b 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -1542,6 +1542,7 @@ again:
1542 ret = 0; 1542 ret = 0;
1543 } 1543 }
1544 if (ret) { 1544 if (ret) {
1545 key.objectid = bytenr;
1545 key.type = BTRFS_EXTENT_ITEM_KEY; 1546 key.type = BTRFS_EXTENT_ITEM_KEY;
1546 key.offset = num_bytes; 1547 key.offset = num_bytes;
1547 btrfs_release_path(path); 1548 btrfs_release_path(path);
@@ -3542,11 +3543,13 @@ static u64 btrfs_reduce_alloc_profile(struct btrfs_root *root, u64 flags)
3542 return extended_to_chunk(flags | tmp); 3543 return extended_to_chunk(flags | tmp);
3543} 3544}
3544 3545
3545static u64 get_alloc_profile(struct btrfs_root *root, u64 flags) 3546static u64 get_alloc_profile(struct btrfs_root *root, u64 orig_flags)
3546{ 3547{
3547 unsigned seq; 3548 unsigned seq;
3549 u64 flags;
3548 3550
3549 do { 3551 do {
3552 flags = orig_flags;
3550 seq = read_seqbegin(&root->fs_info->profiles_lock); 3553 seq = read_seqbegin(&root->fs_info->profiles_lock);
3551 3554
3552 if (flags & BTRFS_BLOCK_GROUP_DATA) 3555 if (flags & BTRFS_BLOCK_GROUP_DATA)
@@ -5719,6 +5722,7 @@ static int __btrfs_free_extent(struct btrfs_trans_handle *trans,
5719 5722
5720 if (ret > 0 && skinny_metadata) { 5723 if (ret > 0 && skinny_metadata) {
5721 skinny_metadata = false; 5724 skinny_metadata = false;
5725 key.objectid = bytenr;
5722 key.type = BTRFS_EXTENT_ITEM_KEY; 5726 key.type = BTRFS_EXTENT_ITEM_KEY;
5723 key.offset = num_bytes; 5727 key.offset = num_bytes;
5724 btrfs_release_path(path); 5728 btrfs_release_path(path);
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index eb742c07e7a4..ae6af072b635 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -800,7 +800,7 @@ next_slot:
800 if (start > key.offset && end < extent_end) { 800 if (start > key.offset && end < extent_end) {
801 BUG_ON(del_nr > 0); 801 BUG_ON(del_nr > 0);
802 if (extent_type == BTRFS_FILE_EXTENT_INLINE) { 802 if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
803 ret = -EINVAL; 803 ret = -EOPNOTSUPP;
804 break; 804 break;
805 } 805 }
806 806
@@ -846,7 +846,7 @@ next_slot:
846 */ 846 */
847 if (start <= key.offset && end < extent_end) { 847 if (start <= key.offset && end < extent_end) {
848 if (extent_type == BTRFS_FILE_EXTENT_INLINE) { 848 if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
849 ret = -EINVAL; 849 ret = -EOPNOTSUPP;
850 break; 850 break;
851 } 851 }
852 852
@@ -872,7 +872,7 @@ next_slot:
872 if (start > key.offset && end >= extent_end) { 872 if (start > key.offset && end >= extent_end) {
873 BUG_ON(del_nr > 0); 873 BUG_ON(del_nr > 0);
874 if (extent_type == BTRFS_FILE_EXTENT_INLINE) { 874 if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
875 ret = -EINVAL; 875 ret = -EOPNOTSUPP;
876 break; 876 break;
877 } 877 }
878 878
@@ -1777,7 +1777,7 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb,
1777 start_pos = round_down(pos, root->sectorsize); 1777 start_pos = round_down(pos, root->sectorsize);
1778 if (start_pos > i_size_read(inode)) { 1778 if (start_pos > i_size_read(inode)) {
1779 /* Expand hole size to cover write data, preventing empty gap */ 1779 /* Expand hole size to cover write data, preventing empty gap */
1780 end_pos = round_up(pos + iov->iov_len, root->sectorsize); 1780 end_pos = round_up(pos + count, root->sectorsize);
1781 err = btrfs_cont_expand(inode, i_size_read(inode), end_pos); 1781 err = btrfs_cont_expand(inode, i_size_read(inode), end_pos);
1782 if (err) { 1782 if (err) {
1783 mutex_unlock(&inode->i_mutex); 1783 mutex_unlock(&inode->i_mutex);
diff --git a/fs/btrfs/inode-map.c b/fs/btrfs/inode-map.c
index cc8ca193d830..86935f5ae291 100644
--- a/fs/btrfs/inode-map.c
+++ b/fs/btrfs/inode-map.c
@@ -176,7 +176,11 @@ static void start_caching(struct btrfs_root *root)
176 176
177 tsk = kthread_run(caching_kthread, root, "btrfs-ino-cache-%llu\n", 177 tsk = kthread_run(caching_kthread, root, "btrfs-ino-cache-%llu\n",
178 root->root_key.objectid); 178 root->root_key.objectid);
179 BUG_ON(IS_ERR(tsk)); /* -ENOMEM */ 179 if (IS_ERR(tsk)) {
180 btrfs_warn(root->fs_info, "failed to start inode caching task");
181 btrfs_clear_and_info(root, CHANGE_INODE_CACHE,
182 "disabling inode map caching");
183 }
180} 184}
181 185
182int btrfs_find_free_ino(struct btrfs_root *root, u64 *objectid) 186int btrfs_find_free_ino(struct btrfs_root *root, u64 *objectid)
@@ -205,24 +209,14 @@ again:
205 209
206void btrfs_return_ino(struct btrfs_root *root, u64 objectid) 210void btrfs_return_ino(struct btrfs_root *root, u64 objectid)
207{ 211{
208 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl;
209 struct btrfs_free_space_ctl *pinned = root->free_ino_pinned; 212 struct btrfs_free_space_ctl *pinned = root->free_ino_pinned;
210 213
211 if (!btrfs_test_opt(root, INODE_MAP_CACHE)) 214 if (!btrfs_test_opt(root, INODE_MAP_CACHE))
212 return; 215 return;
213
214again: 216again:
215 if (root->cached == BTRFS_CACHE_FINISHED) { 217 if (root->cached == BTRFS_CACHE_FINISHED) {
216 __btrfs_add_free_space(ctl, objectid, 1); 218 __btrfs_add_free_space(pinned, objectid, 1);
217 } else { 219 } else {
218 /*
219 * If we are in the process of caching free ino chunks,
220 * to avoid adding the same inode number to the free_ino
221 * tree twice due to cross transaction, we'll leave it
222 * in the pinned tree until a transaction is committed
223 * or the caching work is done.
224 */
225
226 down_write(&root->fs_info->commit_root_sem); 220 down_write(&root->fs_info->commit_root_sem);
227 spin_lock(&root->cache_lock); 221 spin_lock(&root->cache_lock);
228 if (root->cached == BTRFS_CACHE_FINISHED) { 222 if (root->cached == BTRFS_CACHE_FINISHED) {
@@ -234,11 +228,7 @@ again:
234 228
235 start_caching(root); 229 start_caching(root);
236 230
237 if (objectid <= root->cache_progress || 231 __btrfs_add_free_space(pinned, objectid, 1);
238 objectid >= root->highest_objectid)
239 __btrfs_add_free_space(ctl, objectid, 1);
240 else
241 __btrfs_add_free_space(pinned, objectid, 1);
242 232
243 up_write(&root->fs_info->commit_root_sem); 233 up_write(&root->fs_info->commit_root_sem);
244 } 234 }
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index e79ff6b90cb7..2ad7de94efef 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -3066,7 +3066,7 @@ process_slot:
3066 new_key.offset + datal, 3066 new_key.offset + datal,
3067 1); 3067 1);
3068 if (ret) { 3068 if (ret) {
3069 if (ret != -EINVAL) 3069 if (ret != -EOPNOTSUPP)
3070 btrfs_abort_transaction(trans, 3070 btrfs_abort_transaction(trans,
3071 root, ret); 3071 root, ret);
3072 btrfs_end_transaction(trans, root); 3072 btrfs_end_transaction(trans, root);
@@ -3141,7 +3141,7 @@ process_slot:
3141 new_key.offset + datal, 3141 new_key.offset + datal,
3142 1); 3142 1);
3143 if (ret) { 3143 if (ret) {
3144 if (ret != -EINVAL) 3144 if (ret != -EOPNOTSUPP)
3145 btrfs_abort_transaction(trans, 3145 btrfs_abort_transaction(trans,
3146 root, ret); 3146 root, ret);
3147 btrfs_end_transaction(trans, root); 3147 btrfs_end_transaction(trans, root);
diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c
index 1ac3ca98c429..eb6537a08c1b 100644
--- a/fs/btrfs/send.c
+++ b/fs/btrfs/send.c
@@ -349,6 +349,11 @@ static int fs_path_ensure_buf(struct fs_path *p, int len)
349 if (p->buf_len >= len) 349 if (p->buf_len >= len)
350 return 0; 350 return 0;
351 351
352 if (len > PATH_MAX) {
353 WARN_ON(1);
354 return -ENOMEM;
355 }
356
352 path_len = p->end - p->start; 357 path_len = p->end - p->start;
353 old_buf_len = p->buf_len; 358 old_buf_len = p->buf_len;
354 359
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 5011aadacab8..9601d25a4607 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -385,20 +385,6 @@ static match_table_t tokens = {
385 {Opt_err, NULL}, 385 {Opt_err, NULL},
386}; 386};
387 387
388#define btrfs_set_and_info(root, opt, fmt, args...) \
389{ \
390 if (!btrfs_test_opt(root, opt)) \
391 btrfs_info(root->fs_info, fmt, ##args); \
392 btrfs_set_opt(root->fs_info->mount_opt, opt); \
393}
394
395#define btrfs_clear_and_info(root, opt, fmt, args...) \
396{ \
397 if (btrfs_test_opt(root, opt)) \
398 btrfs_info(root->fs_info, fmt, ##args); \
399 btrfs_clear_opt(root->fs_info->mount_opt, opt); \
400}
401
402/* 388/*
403 * Regular mount options parser. Everything that is needed only when 389 * Regular mount options parser. Everything that is needed only when
404 * reading in a new superblock is parsed here. 390 * reading in a new superblock is parsed here.
@@ -1186,7 +1172,6 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags,
1186 return ERR_PTR(-ENOMEM); 1172 return ERR_PTR(-ENOMEM);
1187 mnt = vfs_kern_mount(&btrfs_fs_type, flags, device_name, 1173 mnt = vfs_kern_mount(&btrfs_fs_type, flags, device_name,
1188 newargs); 1174 newargs);
1189 kfree(newargs);
1190 1175
1191 if (PTR_RET(mnt) == -EBUSY) { 1176 if (PTR_RET(mnt) == -EBUSY) {
1192 if (flags & MS_RDONLY) { 1177 if (flags & MS_RDONLY) {
@@ -1196,17 +1181,22 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags,
1196 int r; 1181 int r;
1197 mnt = vfs_kern_mount(&btrfs_fs_type, flags | MS_RDONLY, device_name, 1182 mnt = vfs_kern_mount(&btrfs_fs_type, flags | MS_RDONLY, device_name,
1198 newargs); 1183 newargs);
1199 if (IS_ERR(mnt)) 1184 if (IS_ERR(mnt)) {
1185 kfree(newargs);
1200 return ERR_CAST(mnt); 1186 return ERR_CAST(mnt);
1187 }
1201 1188
1202 r = btrfs_remount(mnt->mnt_sb, &flags, NULL); 1189 r = btrfs_remount(mnt->mnt_sb, &flags, NULL);
1203 if (r < 0) { 1190 if (r < 0) {
1204 /* FIXME: release vfsmount mnt ??*/ 1191 /* FIXME: release vfsmount mnt ??*/
1192 kfree(newargs);
1205 return ERR_PTR(r); 1193 return ERR_PTR(r);
1206 } 1194 }
1207 } 1195 }
1208 } 1196 }
1209 1197
1198 kfree(newargs);
1199
1210 if (IS_ERR(mnt)) 1200 if (IS_ERR(mnt))
1211 return ERR_CAST(mnt); 1201 return ERR_CAST(mnt);
1212 1202
diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c
index 2e5e648eb5c3..c561b628ebce 100644
--- a/fs/ceph/caps.c
+++ b/fs/ceph/caps.c
@@ -3261,7 +3261,7 @@ int ceph_encode_inode_release(void **p, struct inode *inode,
3261 rel->seq = cpu_to_le32(cap->seq); 3261 rel->seq = cpu_to_le32(cap->seq);
3262 rel->issue_seq = cpu_to_le32(cap->issue_seq), 3262 rel->issue_seq = cpu_to_le32(cap->issue_seq),
3263 rel->mseq = cpu_to_le32(cap->mseq); 3263 rel->mseq = cpu_to_le32(cap->mseq);
3264 rel->caps = cpu_to_le32(cap->issued); 3264 rel->caps = cpu_to_le32(cap->implemented);
3265 rel->wanted = cpu_to_le32(cap->mds_wanted); 3265 rel->wanted = cpu_to_le32(cap->mds_wanted);
3266 rel->dname_len = 0; 3266 rel->dname_len = 0;
3267 rel->dname_seq = 0; 3267 rel->dname_seq = 0;
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index 766410a12c2c..c29d6ae68874 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -141,7 +141,7 @@ static int __dcache_readdir(struct file *file, struct dir_context *ctx,
141 141
142 /* start at beginning? */ 142 /* start at beginning? */
143 if (ctx->pos == 2 || last == NULL || 143 if (ctx->pos == 2 || last == NULL ||
144 ctx->pos < ceph_dentry(last)->offset) { 144 fpos_cmp(ctx->pos, ceph_dentry(last)->offset) < 0) {
145 if (list_empty(&parent->d_subdirs)) 145 if (list_empty(&parent->d_subdirs))
146 goto out_unlock; 146 goto out_unlock;
147 p = parent->d_subdirs.prev; 147 p = parent->d_subdirs.prev;
@@ -182,9 +182,16 @@ more:
182 spin_unlock(&dentry->d_lock); 182 spin_unlock(&dentry->d_lock);
183 spin_unlock(&parent->d_lock); 183 spin_unlock(&parent->d_lock);
184 184
185 /* make sure a dentry wasn't dropped while we didn't have parent lock */
186 if (!ceph_dir_is_complete(dir)) {
187 dout(" lost dir complete on %p; falling back to mds\n", dir);
188 dput(dentry);
189 err = -EAGAIN;
190 goto out;
191 }
192
185 dout(" %llu (%llu) dentry %p %.*s %p\n", di->offset, ctx->pos, 193 dout(" %llu (%llu) dentry %p %.*s %p\n", di->offset, ctx->pos,
186 dentry, dentry->d_name.len, dentry->d_name.name, dentry->d_inode); 194 dentry, dentry->d_name.len, dentry->d_name.name, dentry->d_inode);
187 ctx->pos = di->offset;
188 if (!dir_emit(ctx, dentry->d_name.name, 195 if (!dir_emit(ctx, dentry->d_name.name,
189 dentry->d_name.len, 196 dentry->d_name.len,
190 ceph_translate_ino(dentry->d_sb, dentry->d_inode->i_ino), 197 ceph_translate_ino(dentry->d_sb, dentry->d_inode->i_ino),
@@ -198,19 +205,12 @@ more:
198 return 0; 205 return 0;
199 } 206 }
200 207
208 ctx->pos = di->offset + 1;
209
201 if (last) 210 if (last)
202 dput(last); 211 dput(last);
203 last = dentry; 212 last = dentry;
204 213
205 ctx->pos++;
206
207 /* make sure a dentry wasn't dropped while we didn't have parent lock */
208 if (!ceph_dir_is_complete(dir)) {
209 dout(" lost dir complete on %p; falling back to mds\n", dir);
210 err = -EAGAIN;
211 goto out;
212 }
213
214 spin_lock(&parent->d_lock); 214 spin_lock(&parent->d_lock);
215 p = p->prev; /* advance to next dentry */ 215 p = p->prev; /* advance to next dentry */
216 goto more; 216 goto more;
@@ -296,6 +296,8 @@ static int ceph_readdir(struct file *file, struct dir_context *ctx)
296 err = __dcache_readdir(file, ctx, shared_gen); 296 err = __dcache_readdir(file, ctx, shared_gen);
297 if (err != -EAGAIN) 297 if (err != -EAGAIN)
298 return err; 298 return err;
299 frag = fpos_frag(ctx->pos);
300 off = fpos_off(ctx->pos);
299 } else { 301 } else {
300 spin_unlock(&ci->i_ceph_lock); 302 spin_unlock(&ci->i_ceph_lock);
301 } 303 }
@@ -446,7 +448,6 @@ more:
446 if (atomic_read(&ci->i_release_count) == fi->dir_release_count) { 448 if (atomic_read(&ci->i_release_count) == fi->dir_release_count) {
447 dout(" marking %p complete\n", inode); 449 dout(" marking %p complete\n", inode);
448 __ceph_dir_set_complete(ci, fi->dir_release_count); 450 __ceph_dir_set_complete(ci, fi->dir_release_count);
449 ci->i_max_offset = ctx->pos;
450 } 451 }
451 spin_unlock(&ci->i_ceph_lock); 452 spin_unlock(&ci->i_ceph_lock);
452 453
@@ -935,14 +936,16 @@ static int ceph_rename(struct inode *old_dir, struct dentry *old_dentry,
935 * to do it here. 936 * to do it here.
936 */ 937 */
937 938
938 /* d_move screws up d_subdirs order */
939 ceph_dir_clear_complete(new_dir);
940
941 d_move(old_dentry, new_dentry); 939 d_move(old_dentry, new_dentry);
942 940
943 /* ensure target dentry is invalidated, despite 941 /* ensure target dentry is invalidated, despite
944 rehashing bug in vfs_rename_dir */ 942 rehashing bug in vfs_rename_dir */
945 ceph_invalidate_dentry_lease(new_dentry); 943 ceph_invalidate_dentry_lease(new_dentry);
944
945 /* d_move screws up sibling dentries' offsets */
946 ceph_dir_clear_complete(old_dir);
947 ceph_dir_clear_complete(new_dir);
948
946 } 949 }
947 ceph_mdsc_put_request(req); 950 ceph_mdsc_put_request(req);
948 return err; 951 return err;
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index 39da1c2efa50..88a6df4cbe6d 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -1221,9 +1221,6 @@ static long ceph_fallocate(struct file *file, int mode,
1221 if (!S_ISREG(inode->i_mode)) 1221 if (!S_ISREG(inode->i_mode))
1222 return -EOPNOTSUPP; 1222 return -EOPNOTSUPP;
1223 1223
1224 if (IS_SWAPFILE(inode))
1225 return -ETXTBSY;
1226
1227 mutex_lock(&inode->i_mutex); 1224 mutex_lock(&inode->i_mutex);
1228 1225
1229 if (ceph_snap(inode) != CEPH_NOSNAP) { 1226 if (ceph_snap(inode) != CEPH_NOSNAP) {
diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c
index 0b0728e5be2d..233c6f96910a 100644
--- a/fs/ceph/inode.c
+++ b/fs/ceph/inode.c
@@ -744,7 +744,6 @@ static int fill_inode(struct inode *inode,
744 !__ceph_dir_is_complete(ci)) { 744 !__ceph_dir_is_complete(ci)) {
745 dout(" marking %p complete (empty)\n", inode); 745 dout(" marking %p complete (empty)\n", inode);
746 __ceph_dir_set_complete(ci, atomic_read(&ci->i_release_count)); 746 __ceph_dir_set_complete(ci, atomic_read(&ci->i_release_count));
747 ci->i_max_offset = 2;
748 } 747 }
749no_change: 748no_change:
750 /* only update max_size on auth cap */ 749 /* only update max_size on auth cap */
@@ -890,41 +889,6 @@ out_unlock:
890} 889}
891 890
892/* 891/*
893 * Set dentry's directory position based on the current dir's max, and
894 * order it in d_subdirs, so that dcache_readdir behaves.
895 *
896 * Always called under directory's i_mutex.
897 */
898static void ceph_set_dentry_offset(struct dentry *dn)
899{
900 struct dentry *dir = dn->d_parent;
901 struct inode *inode = dir->d_inode;
902 struct ceph_inode_info *ci;
903 struct ceph_dentry_info *di;
904
905 BUG_ON(!inode);
906
907 ci = ceph_inode(inode);
908 di = ceph_dentry(dn);
909
910 spin_lock(&ci->i_ceph_lock);
911 if (!__ceph_dir_is_complete(ci)) {
912 spin_unlock(&ci->i_ceph_lock);
913 return;
914 }
915 di->offset = ceph_inode(inode)->i_max_offset++;
916 spin_unlock(&ci->i_ceph_lock);
917
918 spin_lock(&dir->d_lock);
919 spin_lock_nested(&dn->d_lock, DENTRY_D_LOCK_NESTED);
920 list_move(&dn->d_u.d_child, &dir->d_subdirs);
921 dout("set_dentry_offset %p %lld (%p %p)\n", dn, di->offset,
922 dn->d_u.d_child.prev, dn->d_u.d_child.next);
923 spin_unlock(&dn->d_lock);
924 spin_unlock(&dir->d_lock);
925}
926
927/*
928 * splice a dentry to an inode. 892 * splice a dentry to an inode.
929 * caller must hold directory i_mutex for this to be safe. 893 * caller must hold directory i_mutex for this to be safe.
930 * 894 *
@@ -933,7 +897,7 @@ static void ceph_set_dentry_offset(struct dentry *dn)
933 * the caller) if we fail. 897 * the caller) if we fail.
934 */ 898 */
935static struct dentry *splice_dentry(struct dentry *dn, struct inode *in, 899static struct dentry *splice_dentry(struct dentry *dn, struct inode *in,
936 bool *prehash, bool set_offset) 900 bool *prehash)
937{ 901{
938 struct dentry *realdn; 902 struct dentry *realdn;
939 903
@@ -965,8 +929,6 @@ static struct dentry *splice_dentry(struct dentry *dn, struct inode *in,
965 } 929 }
966 if ((!prehash || *prehash) && d_unhashed(dn)) 930 if ((!prehash || *prehash) && d_unhashed(dn))
967 d_rehash(dn); 931 d_rehash(dn);
968 if (set_offset)
969 ceph_set_dentry_offset(dn);
970out: 932out:
971 return dn; 933 return dn;
972} 934}
@@ -987,7 +949,6 @@ int ceph_fill_trace(struct super_block *sb, struct ceph_mds_request *req,
987{ 949{
988 struct ceph_mds_reply_info_parsed *rinfo = &req->r_reply_info; 950 struct ceph_mds_reply_info_parsed *rinfo = &req->r_reply_info;
989 struct inode *in = NULL; 951 struct inode *in = NULL;
990 struct ceph_mds_reply_inode *ininfo;
991 struct ceph_vino vino; 952 struct ceph_vino vino;
992 struct ceph_fs_client *fsc = ceph_sb_to_client(sb); 953 struct ceph_fs_client *fsc = ceph_sb_to_client(sb);
993 int err = 0; 954 int err = 0;
@@ -1161,6 +1122,9 @@ retry_lookup:
1161 1122
1162 /* rename? */ 1123 /* rename? */
1163 if (req->r_old_dentry && req->r_op == CEPH_MDS_OP_RENAME) { 1124 if (req->r_old_dentry && req->r_op == CEPH_MDS_OP_RENAME) {
1125 struct inode *olddir = req->r_old_dentry_dir;
1126 BUG_ON(!olddir);
1127
1164 dout(" src %p '%.*s' dst %p '%.*s'\n", 1128 dout(" src %p '%.*s' dst %p '%.*s'\n",
1165 req->r_old_dentry, 1129 req->r_old_dentry,
1166 req->r_old_dentry->d_name.len, 1130 req->r_old_dentry->d_name.len,
@@ -1180,13 +1144,10 @@ retry_lookup:
1180 rehashing bug in vfs_rename_dir */ 1144 rehashing bug in vfs_rename_dir */
1181 ceph_invalidate_dentry_lease(dn); 1145 ceph_invalidate_dentry_lease(dn);
1182 1146
1183 /* 1147 /* d_move screws up sibling dentries' offsets */
1184 * d_move() puts the renamed dentry at the end of 1148 ceph_dir_clear_complete(dir);
1185 * d_subdirs. We need to assign it an appropriate 1149 ceph_dir_clear_complete(olddir);
1186 * directory offset so we can behave when dir is 1150
1187 * complete.
1188 */
1189 ceph_set_dentry_offset(req->r_old_dentry);
1190 dout("dn %p gets new offset %lld\n", req->r_old_dentry, 1151 dout("dn %p gets new offset %lld\n", req->r_old_dentry,
1191 ceph_dentry(req->r_old_dentry)->offset); 1152 ceph_dentry(req->r_old_dentry)->offset);
1192 1153
@@ -1213,8 +1174,9 @@ retry_lookup:
1213 1174
1214 /* attach proper inode */ 1175 /* attach proper inode */
1215 if (!dn->d_inode) { 1176 if (!dn->d_inode) {
1177 ceph_dir_clear_complete(dir);
1216 ihold(in); 1178 ihold(in);
1217 dn = splice_dentry(dn, in, &have_lease, true); 1179 dn = splice_dentry(dn, in, &have_lease);
1218 if (IS_ERR(dn)) { 1180 if (IS_ERR(dn)) {
1219 err = PTR_ERR(dn); 1181 err = PTR_ERR(dn);
1220 goto done; 1182 goto done;
@@ -1235,17 +1197,16 @@ retry_lookup:
1235 (req->r_op == CEPH_MDS_OP_LOOKUPSNAP || 1197 (req->r_op == CEPH_MDS_OP_LOOKUPSNAP ||
1236 req->r_op == CEPH_MDS_OP_MKSNAP)) { 1198 req->r_op == CEPH_MDS_OP_MKSNAP)) {
1237 struct dentry *dn = req->r_dentry; 1199 struct dentry *dn = req->r_dentry;
1200 struct inode *dir = req->r_locked_dir;
1238 1201
1239 /* fill out a snapdir LOOKUPSNAP dentry */ 1202 /* fill out a snapdir LOOKUPSNAP dentry */
1240 BUG_ON(!dn); 1203 BUG_ON(!dn);
1241 BUG_ON(!req->r_locked_dir); 1204 BUG_ON(!dir);
1242 BUG_ON(ceph_snap(req->r_locked_dir) != CEPH_SNAPDIR); 1205 BUG_ON(ceph_snap(dir) != CEPH_SNAPDIR);
1243 ininfo = rinfo->targeti.in;
1244 vino.ino = le64_to_cpu(ininfo->ino);
1245 vino.snap = le64_to_cpu(ininfo->snapid);
1246 dout(" linking snapped dir %p to dn %p\n", in, dn); 1206 dout(" linking snapped dir %p to dn %p\n", in, dn);
1207 ceph_dir_clear_complete(dir);
1247 ihold(in); 1208 ihold(in);
1248 dn = splice_dentry(dn, in, NULL, true); 1209 dn = splice_dentry(dn, in, NULL);
1249 if (IS_ERR(dn)) { 1210 if (IS_ERR(dn)) {
1250 err = PTR_ERR(dn); 1211 err = PTR_ERR(dn);
1251 goto done; 1212 goto done;
@@ -1407,7 +1368,7 @@ retry_lookup:
1407 } 1368 }
1408 1369
1409 if (!dn->d_inode) { 1370 if (!dn->d_inode) {
1410 dn = splice_dentry(dn, in, NULL, false); 1371 dn = splice_dentry(dn, in, NULL);
1411 if (IS_ERR(dn)) { 1372 if (IS_ERR(dn)) {
1412 err = PTR_ERR(dn); 1373 err = PTR_ERR(dn);
1413 dn = NULL; 1374 dn = NULL;
diff --git a/fs/ceph/ioctl.c b/fs/ceph/ioctl.c
index fdf941b44ff1..a822a6e58290 100644
--- a/fs/ceph/ioctl.c
+++ b/fs/ceph/ioctl.c
@@ -109,6 +109,8 @@ static long ceph_ioctl_set_layout(struct file *file, void __user *arg)
109 return PTR_ERR(req); 109 return PTR_ERR(req);
110 req->r_inode = inode; 110 req->r_inode = inode;
111 ihold(inode); 111 ihold(inode);
112 req->r_num_caps = 1;
113
112 req->r_inode_drop = CEPH_CAP_FILE_SHARED | CEPH_CAP_FILE_EXCL; 114 req->r_inode_drop = CEPH_CAP_FILE_SHARED | CEPH_CAP_FILE_EXCL;
113 115
114 req->r_args.setlayout.layout.fl_stripe_unit = 116 req->r_args.setlayout.layout.fl_stripe_unit =
@@ -153,6 +155,7 @@ static long ceph_ioctl_set_layout_policy (struct file *file, void __user *arg)
153 return PTR_ERR(req); 155 return PTR_ERR(req);
154 req->r_inode = inode; 156 req->r_inode = inode;
155 ihold(inode); 157 ihold(inode);
158 req->r_num_caps = 1;
156 159
157 req->r_args.setlayout.layout.fl_stripe_unit = 160 req->r_args.setlayout.layout.fl_stripe_unit =
158 cpu_to_le32(l.stripe_unit); 161 cpu_to_le32(l.stripe_unit);
diff --git a/fs/ceph/locks.c b/fs/ceph/locks.c
index d94ba0df9f4d..191398852a2e 100644
--- a/fs/ceph/locks.c
+++ b/fs/ceph/locks.c
@@ -45,6 +45,7 @@ static int ceph_lock_message(u8 lock_type, u16 operation, struct file *file,
45 return PTR_ERR(req); 45 return PTR_ERR(req);
46 req->r_inode = inode; 46 req->r_inode = inode;
47 ihold(inode); 47 ihold(inode);
48 req->r_num_caps = 1;
48 49
49 /* mds requires start and length rather than start and end */ 50 /* mds requires start and length rather than start and end */
50 if (LLONG_MAX == fl->fl_end) 51 if (LLONG_MAX == fl->fl_end)
diff --git a/fs/ceph/super.h b/fs/ceph/super.h
index 7866cd05a6bb..ead05cc1f447 100644
--- a/fs/ceph/super.h
+++ b/fs/ceph/super.h
@@ -266,7 +266,6 @@ struct ceph_inode_info {
266 struct timespec i_rctime; 266 struct timespec i_rctime;
267 u64 i_rbytes, i_rfiles, i_rsubdirs; 267 u64 i_rbytes, i_rfiles, i_rsubdirs;
268 u64 i_files, i_subdirs; 268 u64 i_files, i_subdirs;
269 u64 i_max_offset; /* largest readdir offset, set with complete dir */
270 269
271 struct rb_root i_fragtree; 270 struct rb_root i_fragtree;
272 struct mutex i_fragtree_mutex; 271 struct mutex i_fragtree_mutex;
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index df9c9141c099..5be1f997ecde 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -253,6 +253,11 @@ cifs_alloc_inode(struct super_block *sb)
253 cifs_set_oplock_level(cifs_inode, 0); 253 cifs_set_oplock_level(cifs_inode, 0);
254 cifs_inode->delete_pending = false; 254 cifs_inode->delete_pending = false;
255 cifs_inode->invalid_mapping = false; 255 cifs_inode->invalid_mapping = false;
256 clear_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cifs_inode->flags);
257 clear_bit(CIFS_INODE_PENDING_WRITERS, &cifs_inode->flags);
258 clear_bit(CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2, &cifs_inode->flags);
259 spin_lock_init(&cifs_inode->writers_lock);
260 cifs_inode->writers = 0;
256 cifs_inode->vfs_inode.i_blkbits = 14; /* 2**14 = CIFS_MAX_MSGSIZE */ 261 cifs_inode->vfs_inode.i_blkbits = 14; /* 2**14 = CIFS_MAX_MSGSIZE */
257 cifs_inode->server_eof = 0; 262 cifs_inode->server_eof = 0;
258 cifs_inode->uniqueid = 0; 263 cifs_inode->uniqueid = 0;
@@ -732,19 +737,26 @@ static ssize_t cifs_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
732 unsigned long nr_segs, loff_t pos) 737 unsigned long nr_segs, loff_t pos)
733{ 738{
734 struct inode *inode = file_inode(iocb->ki_filp); 739 struct inode *inode = file_inode(iocb->ki_filp);
740 struct cifsInodeInfo *cinode = CIFS_I(inode);
735 ssize_t written; 741 ssize_t written;
736 int rc; 742 int rc;
737 743
744 written = cifs_get_writer(cinode);
745 if (written)
746 return written;
747
738 written = generic_file_aio_write(iocb, iov, nr_segs, pos); 748 written = generic_file_aio_write(iocb, iov, nr_segs, pos);
739 749
740 if (CIFS_CACHE_WRITE(CIFS_I(inode))) 750 if (CIFS_CACHE_WRITE(CIFS_I(inode)))
741 return written; 751 goto out;
742 752
743 rc = filemap_fdatawrite(inode->i_mapping); 753 rc = filemap_fdatawrite(inode->i_mapping);
744 if (rc) 754 if (rc)
745 cifs_dbg(FYI, "cifs_file_aio_write: %d rc on %p inode\n", 755 cifs_dbg(FYI, "cifs_file_aio_write: %d rc on %p inode\n",
746 rc, inode); 756 rc, inode);
747 757
758out:
759 cifs_put_writer(cinode);
748 return written; 760 return written;
749} 761}
750 762
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index c0f3718b77a8..30f6e9251a4a 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -228,6 +228,8 @@ struct smb_version_operations {
228 /* verify the message */ 228 /* verify the message */
229 int (*check_message)(char *, unsigned int); 229 int (*check_message)(char *, unsigned int);
230 bool (*is_oplock_break)(char *, struct TCP_Server_Info *); 230 bool (*is_oplock_break)(char *, struct TCP_Server_Info *);
231 void (*downgrade_oplock)(struct TCP_Server_Info *,
232 struct cifsInodeInfo *, bool);
231 /* process transaction2 response */ 233 /* process transaction2 response */
232 bool (*check_trans2)(struct mid_q_entry *, struct TCP_Server_Info *, 234 bool (*check_trans2)(struct mid_q_entry *, struct TCP_Server_Info *,
233 char *, int); 235 char *, int);
@@ -1113,6 +1115,12 @@ struct cifsInodeInfo {
1113 unsigned int epoch; /* used to track lease state changes */ 1115 unsigned int epoch; /* used to track lease state changes */
1114 bool delete_pending; /* DELETE_ON_CLOSE is set */ 1116 bool delete_pending; /* DELETE_ON_CLOSE is set */
1115 bool invalid_mapping; /* pagecache is invalid */ 1117 bool invalid_mapping; /* pagecache is invalid */
1118 unsigned long flags;
1119#define CIFS_INODE_PENDING_OPLOCK_BREAK (0) /* oplock break in progress */
1120#define CIFS_INODE_PENDING_WRITERS (1) /* Writes in progress */
1121#define CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2 (2) /* Downgrade oplock to L2 */
1122 spinlock_t writers_lock;
1123 unsigned int writers; /* Number of writers on this inode */
1116 unsigned long time; /* jiffies of last update of inode */ 1124 unsigned long time; /* jiffies of last update of inode */
1117 u64 server_eof; /* current file size on server -- protected by i_lock */ 1125 u64 server_eof; /* current file size on server -- protected by i_lock */
1118 u64 uniqueid; /* server inode number */ 1126 u64 uniqueid; /* server inode number */
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index acc4ee8ed075..ca7980a1e303 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -127,6 +127,9 @@ extern u64 cifs_UnixTimeToNT(struct timespec);
127extern struct timespec cnvrtDosUnixTm(__le16 le_date, __le16 le_time, 127extern struct timespec cnvrtDosUnixTm(__le16 le_date, __le16 le_time,
128 int offset); 128 int offset);
129extern void cifs_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock); 129extern void cifs_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock);
130extern int cifs_get_writer(struct cifsInodeInfo *cinode);
131extern void cifs_put_writer(struct cifsInodeInfo *cinode);
132extern void cifs_done_oplock_break(struct cifsInodeInfo *cinode);
130extern int cifs_unlock_range(struct cifsFileInfo *cfile, 133extern int cifs_unlock_range(struct cifsFileInfo *cfile,
131 struct file_lock *flock, const unsigned int xid); 134 struct file_lock *flock, const unsigned int xid);
132extern int cifs_push_mandatory_locks(struct cifsFileInfo *cfile); 135extern int cifs_push_mandatory_locks(struct cifsFileInfo *cfile);
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index f3264bd7a83d..6ce4e0954b98 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -6197,6 +6197,9 @@ QAllEAsRetry:
6197 cifs_dbg(FYI, "ea length %d\n", list_len); 6197 cifs_dbg(FYI, "ea length %d\n", list_len);
6198 if (list_len <= 8) { 6198 if (list_len <= 8) {
6199 cifs_dbg(FYI, "empty EA list returned from server\n"); 6199 cifs_dbg(FYI, "empty EA list returned from server\n");
6200 /* didn't find the named attribute */
6201 if (ea_name)
6202 rc = -ENODATA;
6200 goto QAllEAsOut; 6203 goto QAllEAsOut;
6201 } 6204 }
6202 6205
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 8add25538a3b..5ed03e0b8b40 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -2599,7 +2599,7 @@ cifs_writev(struct kiocb *iocb, const struct iovec *iov,
2599 ssize_t err; 2599 ssize_t err;
2600 2600
2601 err = generic_write_sync(file, iocb->ki_pos - rc, rc); 2601 err = generic_write_sync(file, iocb->ki_pos - rc, rc);
2602 if (rc < 0) 2602 if (err < 0)
2603 rc = err; 2603 rc = err;
2604 } 2604 }
2605 } else { 2605 } else {
@@ -2621,12 +2621,20 @@ cifs_strict_writev(struct kiocb *iocb, const struct iovec *iov,
2621 struct cifs_tcon *tcon = tlink_tcon(cfile->tlink); 2621 struct cifs_tcon *tcon = tlink_tcon(cfile->tlink);
2622 ssize_t written; 2622 ssize_t written;
2623 2623
2624 written = cifs_get_writer(cinode);
2625 if (written)
2626 return written;
2627
2624 if (CIFS_CACHE_WRITE(cinode)) { 2628 if (CIFS_CACHE_WRITE(cinode)) {
2625 if (cap_unix(tcon->ses) && 2629 if (cap_unix(tcon->ses) &&
2626 (CIFS_UNIX_FCNTL_CAP & le64_to_cpu(tcon->fsUnixInfo.Capability)) 2630 (CIFS_UNIX_FCNTL_CAP & le64_to_cpu(tcon->fsUnixInfo.Capability))
2627 && ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NOPOSIXBRL) == 0)) 2631 && ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NOPOSIXBRL) == 0)) {
2628 return generic_file_aio_write(iocb, iov, nr_segs, pos); 2632 written = generic_file_aio_write(
2629 return cifs_writev(iocb, iov, nr_segs, pos); 2633 iocb, iov, nr_segs, pos);
2634 goto out;
2635 }
2636 written = cifs_writev(iocb, iov, nr_segs, pos);
2637 goto out;
2630 } 2638 }
2631 /* 2639 /*
2632 * For non-oplocked files in strict cache mode we need to write the data 2640 * For non-oplocked files in strict cache mode we need to write the data
@@ -2646,6 +2654,8 @@ cifs_strict_writev(struct kiocb *iocb, const struct iovec *iov,
2646 inode); 2654 inode);
2647 cinode->oplock = 0; 2655 cinode->oplock = 0;
2648 } 2656 }
2657out:
2658 cifs_put_writer(cinode);
2649 return written; 2659 return written;
2650} 2660}
2651 2661
@@ -2872,7 +2882,7 @@ ssize_t cifs_user_readv(struct kiocb *iocb, const struct iovec *iov,
2872 cifs_uncached_readv_complete); 2882 cifs_uncached_readv_complete);
2873 if (!rdata) { 2883 if (!rdata) {
2874 rc = -ENOMEM; 2884 rc = -ENOMEM;
2875 goto error; 2885 break;
2876 } 2886 }
2877 2887
2878 rc = cifs_read_allocate_pages(rdata, npages); 2888 rc = cifs_read_allocate_pages(rdata, npages);
@@ -3621,6 +3631,13 @@ static int cifs_launder_page(struct page *page)
3621 return rc; 3631 return rc;
3622} 3632}
3623 3633
3634static int
3635cifs_pending_writers_wait(void *unused)
3636{
3637 schedule();
3638 return 0;
3639}
3640
3624void cifs_oplock_break(struct work_struct *work) 3641void cifs_oplock_break(struct work_struct *work)
3625{ 3642{
3626 struct cifsFileInfo *cfile = container_of(work, struct cifsFileInfo, 3643 struct cifsFileInfo *cfile = container_of(work, struct cifsFileInfo,
@@ -3628,8 +3645,15 @@ void cifs_oplock_break(struct work_struct *work)
3628 struct inode *inode = cfile->dentry->d_inode; 3645 struct inode *inode = cfile->dentry->d_inode;
3629 struct cifsInodeInfo *cinode = CIFS_I(inode); 3646 struct cifsInodeInfo *cinode = CIFS_I(inode);
3630 struct cifs_tcon *tcon = tlink_tcon(cfile->tlink); 3647 struct cifs_tcon *tcon = tlink_tcon(cfile->tlink);
3648 struct TCP_Server_Info *server = tcon->ses->server;
3631 int rc = 0; 3649 int rc = 0;
3632 3650
3651 wait_on_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS,
3652 cifs_pending_writers_wait, TASK_UNINTERRUPTIBLE);
3653
3654 server->ops->downgrade_oplock(server, cinode,
3655 test_bit(CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2, &cinode->flags));
3656
3633 if (!CIFS_CACHE_WRITE(cinode) && CIFS_CACHE_READ(cinode) && 3657 if (!CIFS_CACHE_WRITE(cinode) && CIFS_CACHE_READ(cinode) &&
3634 cifs_has_mand_locks(cinode)) { 3658 cifs_has_mand_locks(cinode)) {
3635 cifs_dbg(FYI, "Reset oplock to None for inode=%p due to mand locks\n", 3659 cifs_dbg(FYI, "Reset oplock to None for inode=%p due to mand locks\n",
@@ -3666,6 +3690,7 @@ void cifs_oplock_break(struct work_struct *work)
3666 cinode); 3690 cinode);
3667 cifs_dbg(FYI, "Oplock release rc = %d\n", rc); 3691 cifs_dbg(FYI, "Oplock release rc = %d\n", rc);
3668 } 3692 }
3693 cifs_done_oplock_break(cinode);
3669} 3694}
3670 3695
3671/* 3696/*
diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c
index 2f9f3790679d..3b0c62e622da 100644
--- a/fs/cifs/misc.c
+++ b/fs/cifs/misc.c
@@ -466,8 +466,22 @@ is_valid_oplock_break(char *buffer, struct TCP_Server_Info *srv)
466 cifs_dbg(FYI, "file id match, oplock break\n"); 466 cifs_dbg(FYI, "file id match, oplock break\n");
467 pCifsInode = CIFS_I(netfile->dentry->d_inode); 467 pCifsInode = CIFS_I(netfile->dentry->d_inode);
468 468
469 cifs_set_oplock_level(pCifsInode, 469 set_bit(CIFS_INODE_PENDING_OPLOCK_BREAK,
470 pSMB->OplockLevel ? OPLOCK_READ : 0); 470 &pCifsInode->flags);
471
472 /*
473 * Set flag if the server downgrades the oplock
474 * to L2 else clear.
475 */
476 if (pSMB->OplockLevel)
477 set_bit(
478 CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
479 &pCifsInode->flags);
480 else
481 clear_bit(
482 CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
483 &pCifsInode->flags);
484
471 queue_work(cifsiod_wq, 485 queue_work(cifsiod_wq,
472 &netfile->oplock_break); 486 &netfile->oplock_break);
473 netfile->oplock_break_cancelled = false; 487 netfile->oplock_break_cancelled = false;
@@ -551,6 +565,62 @@ void cifs_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock)
551 cinode->oplock = 0; 565 cinode->oplock = 0;
552} 566}
553 567
568static int
569cifs_oplock_break_wait(void *unused)
570{
571 schedule();
572 return signal_pending(current) ? -ERESTARTSYS : 0;
573}
574
575/*
576 * We wait for oplock breaks to be processed before we attempt to perform
577 * writes.
578 */
579int cifs_get_writer(struct cifsInodeInfo *cinode)
580{
581 int rc;
582
583start:
584 rc = wait_on_bit(&cinode->flags, CIFS_INODE_PENDING_OPLOCK_BREAK,
585 cifs_oplock_break_wait, TASK_KILLABLE);
586 if (rc)
587 return rc;
588
589 spin_lock(&cinode->writers_lock);
590 if (!cinode->writers)
591 set_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
592 cinode->writers++;
593 /* Check to see if we have started servicing an oplock break */
594 if (test_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cinode->flags)) {
595 cinode->writers--;
596 if (cinode->writers == 0) {
597 clear_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
598 wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS);
599 }
600 spin_unlock(&cinode->writers_lock);
601 goto start;
602 }
603 spin_unlock(&cinode->writers_lock);
604 return 0;
605}
606
607void cifs_put_writer(struct cifsInodeInfo *cinode)
608{
609 spin_lock(&cinode->writers_lock);
610 cinode->writers--;
611 if (cinode->writers == 0) {
612 clear_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
613 wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS);
614 }
615 spin_unlock(&cinode->writers_lock);
616}
617
618void cifs_done_oplock_break(struct cifsInodeInfo *cinode)
619{
620 clear_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cinode->flags);
621 wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_OPLOCK_BREAK);
622}
623
554bool 624bool
555backup_cred(struct cifs_sb_info *cifs_sb) 625backup_cred(struct cifs_sb_info *cifs_sb)
556{ 626{
diff --git a/fs/cifs/smb1ops.c b/fs/cifs/smb1ops.c
index 526fb89f9230..d1fdfa848703 100644
--- a/fs/cifs/smb1ops.c
+++ b/fs/cifs/smb1ops.c
@@ -372,6 +372,16 @@ coalesce_t2(char *second_buf, struct smb_hdr *target_hdr)
372 return 0; 372 return 0;
373} 373}
374 374
375static void
376cifs_downgrade_oplock(struct TCP_Server_Info *server,
377 struct cifsInodeInfo *cinode, bool set_level2)
378{
379 if (set_level2)
380 cifs_set_oplock_level(cinode, OPLOCK_READ);
381 else
382 cifs_set_oplock_level(cinode, 0);
383}
384
375static bool 385static bool
376cifs_check_trans2(struct mid_q_entry *mid, struct TCP_Server_Info *server, 386cifs_check_trans2(struct mid_q_entry *mid, struct TCP_Server_Info *server,
377 char *buf, int malformed) 387 char *buf, int malformed)
@@ -1019,6 +1029,7 @@ struct smb_version_operations smb1_operations = {
1019 .clear_stats = cifs_clear_stats, 1029 .clear_stats = cifs_clear_stats,
1020 .print_stats = cifs_print_stats, 1030 .print_stats = cifs_print_stats,
1021 .is_oplock_break = is_valid_oplock_break, 1031 .is_oplock_break = is_valid_oplock_break,
1032 .downgrade_oplock = cifs_downgrade_oplock,
1022 .check_trans2 = cifs_check_trans2, 1033 .check_trans2 = cifs_check_trans2,
1023 .need_neg = cifs_need_neg, 1034 .need_neg = cifs_need_neg,
1024 .negotiate = cifs_negotiate, 1035 .negotiate = cifs_negotiate,
diff --git a/fs/cifs/smb2misc.c b/fs/cifs/smb2misc.c
index fb3966265b6e..b8021fde987d 100644
--- a/fs/cifs/smb2misc.c
+++ b/fs/cifs/smb2misc.c
@@ -575,9 +575,21 @@ smb2_is_valid_oplock_break(char *buffer, struct TCP_Server_Info *server)
575 else 575 else
576 cfile->oplock_break_cancelled = false; 576 cfile->oplock_break_cancelled = false;
577 577
578 server->ops->set_oplock_level(cinode, 578 set_bit(CIFS_INODE_PENDING_OPLOCK_BREAK,
579 rsp->OplockLevel ? SMB2_OPLOCK_LEVEL_II : 0, 579 &cinode->flags);
580 0, NULL); 580
581 /*
582 * Set flag if the server downgrades the oplock
583 * to L2 else clear.
584 */
585 if (rsp->OplockLevel)
586 set_bit(
587 CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
588 &cinode->flags);
589 else
590 clear_bit(
591 CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
592 &cinode->flags);
581 593
582 queue_work(cifsiod_wq, &cfile->oplock_break); 594 queue_work(cifsiod_wq, &cfile->oplock_break);
583 595
diff --git a/fs/cifs/smb2ops.c b/fs/cifs/smb2ops.c
index 192f51a12cf1..35ddc3ed119d 100644
--- a/fs/cifs/smb2ops.c
+++ b/fs/cifs/smb2ops.c
@@ -905,6 +905,17 @@ smb2_query_symlink(const unsigned int xid, struct cifs_tcon *tcon,
905} 905}
906 906
907static void 907static void
908smb2_downgrade_oplock(struct TCP_Server_Info *server,
909 struct cifsInodeInfo *cinode, bool set_level2)
910{
911 if (set_level2)
912 server->ops->set_oplock_level(cinode, SMB2_OPLOCK_LEVEL_II,
913 0, NULL);
914 else
915 server->ops->set_oplock_level(cinode, 0, 0, NULL);
916}
917
918static void
908smb2_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock, 919smb2_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock,
909 unsigned int epoch, bool *purge_cache) 920 unsigned int epoch, bool *purge_cache)
910{ 921{
@@ -1110,6 +1121,7 @@ struct smb_version_operations smb20_operations = {
1110 .clear_stats = smb2_clear_stats, 1121 .clear_stats = smb2_clear_stats,
1111 .print_stats = smb2_print_stats, 1122 .print_stats = smb2_print_stats,
1112 .is_oplock_break = smb2_is_valid_oplock_break, 1123 .is_oplock_break = smb2_is_valid_oplock_break,
1124 .downgrade_oplock = smb2_downgrade_oplock,
1113 .need_neg = smb2_need_neg, 1125 .need_neg = smb2_need_neg,
1114 .negotiate = smb2_negotiate, 1126 .negotiate = smb2_negotiate,
1115 .negotiate_wsize = smb2_negotiate_wsize, 1127 .negotiate_wsize = smb2_negotiate_wsize,
@@ -1184,6 +1196,7 @@ struct smb_version_operations smb21_operations = {
1184 .clear_stats = smb2_clear_stats, 1196 .clear_stats = smb2_clear_stats,
1185 .print_stats = smb2_print_stats, 1197 .print_stats = smb2_print_stats,
1186 .is_oplock_break = smb2_is_valid_oplock_break, 1198 .is_oplock_break = smb2_is_valid_oplock_break,
1199 .downgrade_oplock = smb2_downgrade_oplock,
1187 .need_neg = smb2_need_neg, 1200 .need_neg = smb2_need_neg,
1188 .negotiate = smb2_negotiate, 1201 .negotiate = smb2_negotiate,
1189 .negotiate_wsize = smb2_negotiate_wsize, 1202 .negotiate_wsize = smb2_negotiate_wsize,
@@ -1259,6 +1272,7 @@ struct smb_version_operations smb30_operations = {
1259 .print_stats = smb2_print_stats, 1272 .print_stats = smb2_print_stats,
1260 .dump_share_caps = smb2_dump_share_caps, 1273 .dump_share_caps = smb2_dump_share_caps,
1261 .is_oplock_break = smb2_is_valid_oplock_break, 1274 .is_oplock_break = smb2_is_valid_oplock_break,
1275 .downgrade_oplock = smb2_downgrade_oplock,
1262 .need_neg = smb2_need_neg, 1276 .need_neg = smb2_need_neg,
1263 .negotiate = smb2_negotiate, 1277 .negotiate = smb2_negotiate,
1264 .negotiate_wsize = smb2_negotiate_wsize, 1278 .negotiate_wsize = smb2_negotiate_wsize,
diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c
index 860344701067..3802f8c94acc 100644
--- a/fs/cifs/smb2pdu.c
+++ b/fs/cifs/smb2pdu.c
@@ -1352,7 +1352,6 @@ SMB2_set_compression(const unsigned int xid, struct cifs_tcon *tcon,
1352 u64 persistent_fid, u64 volatile_fid) 1352 u64 persistent_fid, u64 volatile_fid)
1353{ 1353{
1354 int rc; 1354 int rc;
1355 char *res_key = NULL;
1356 struct compress_ioctl fsctl_input; 1355 struct compress_ioctl fsctl_input;
1357 char *ret_data = NULL; 1356 char *ret_data = NULL;
1358 1357
@@ -1365,7 +1364,6 @@ SMB2_set_compression(const unsigned int xid, struct cifs_tcon *tcon,
1365 2 /* in data len */, &ret_data /* out data */, NULL); 1364 2 /* in data len */, &ret_data /* out data */, NULL);
1366 1365
1367 cifs_dbg(FYI, "set compression rc %d\n", rc); 1366 cifs_dbg(FYI, "set compression rc %d\n", rc);
1368 kfree(res_key);
1369 1367
1370 return rc; 1368 return rc;
1371} 1369}
diff --git a/fs/compat.c b/fs/compat.c
index ca926ad0430c..66d3d3c6b4b2 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -457,9 +457,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
457 case F_GETLK64: 457 case F_GETLK64:
458 case F_SETLK64: 458 case F_SETLK64:
459 case F_SETLKW64: 459 case F_SETLKW64:
460 case F_GETLKP: 460 case F_OFD_GETLK:
461 case F_SETLKP: 461 case F_OFD_SETLK:
462 case F_SETLKPW: 462 case F_OFD_SETLKW:
463 ret = get_compat_flock64(&f, compat_ptr(arg)); 463 ret = get_compat_flock64(&f, compat_ptr(arg));
464 if (ret != 0) 464 if (ret != 0)
465 break; 465 break;
@@ -468,7 +468,7 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
468 conv_cmd = convert_fcntl_cmd(cmd); 468 conv_cmd = convert_fcntl_cmd(cmd);
469 ret = sys_fcntl(fd, conv_cmd, (unsigned long)&f); 469 ret = sys_fcntl(fd, conv_cmd, (unsigned long)&f);
470 set_fs(old_fs); 470 set_fs(old_fs);
471 if ((conv_cmd == F_GETLK || conv_cmd == F_GETLKP) && ret == 0) { 471 if ((conv_cmd == F_GETLK || conv_cmd == F_OFD_GETLK) && ret == 0) {
472 /* need to return lock information - see above for commentary */ 472 /* need to return lock information - see above for commentary */
473 if (f.l_start > COMPAT_LOFF_T_MAX) 473 if (f.l_start > COMPAT_LOFF_T_MAX)
474 ret = -EOVERFLOW; 474 ret = -EOVERFLOW;
@@ -493,9 +493,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl, unsigned int, fd, unsigned int, cmd,
493 case F_GETLK64: 493 case F_GETLK64:
494 case F_SETLK64: 494 case F_SETLK64:
495 case F_SETLKW64: 495 case F_SETLKW64:
496 case F_GETLKP: 496 case F_OFD_GETLK:
497 case F_SETLKP: 497 case F_OFD_SETLK:
498 case F_SETLKPW: 498 case F_OFD_SETLKW:
499 return -EINVAL; 499 return -EINVAL;
500 } 500 }
501 return compat_sys_fcntl64(fd, cmd, arg); 501 return compat_sys_fcntl64(fd, cmd, arg);
diff --git a/fs/coredump.c b/fs/coredump.c
index e3ad709a4232..0b2528fb640e 100644
--- a/fs/coredump.c
+++ b/fs/coredump.c
@@ -73,10 +73,15 @@ static int expand_corename(struct core_name *cn, int size)
73static int cn_vprintf(struct core_name *cn, const char *fmt, va_list arg) 73static int cn_vprintf(struct core_name *cn, const char *fmt, va_list arg)
74{ 74{
75 int free, need; 75 int free, need;
76 va_list arg_copy;
76 77
77again: 78again:
78 free = cn->size - cn->used; 79 free = cn->size - cn->used;
79 need = vsnprintf(cn->corename + cn->used, free, fmt, arg); 80
81 va_copy(arg_copy, arg);
82 need = vsnprintf(cn->corename + cn->used, free, fmt, arg_copy);
83 va_end(arg_copy);
84
80 if (need < free) { 85 if (need < free) {
81 cn->used += need; 86 cn->used += need;
82 return 0; 87 return 0;
diff --git a/fs/dcache.c b/fs/dcache.c
index 40707d88a945..42ae01eefc07 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -246,16 +246,8 @@ static void __d_free(struct rcu_head *head)
246 kmem_cache_free(dentry_cache, dentry); 246 kmem_cache_free(dentry_cache, dentry);
247} 247}
248 248
249/* 249static void dentry_free(struct dentry *dentry)
250 * no locks, please.
251 */
252static void d_free(struct dentry *dentry)
253{ 250{
254 BUG_ON((int)dentry->d_lockref.count > 0);
255 this_cpu_dec(nr_dentry);
256 if (dentry->d_op && dentry->d_op->d_release)
257 dentry->d_op->d_release(dentry);
258
259 /* if dentry was never visible to RCU, immediate free is OK */ 251 /* if dentry was never visible to RCU, immediate free is OK */
260 if (!(dentry->d_flags & DCACHE_RCUACCESS)) 252 if (!(dentry->d_flags & DCACHE_RCUACCESS))
261 __d_free(&dentry->d_u.d_rcu); 253 __d_free(&dentry->d_u.d_rcu);
@@ -403,56 +395,6 @@ static void dentry_lru_add(struct dentry *dentry)
403 d_lru_add(dentry); 395 d_lru_add(dentry);
404} 396}
405 397
406/*
407 * Remove a dentry with references from the LRU.
408 *
409 * If we are on the shrink list, then we can get to try_prune_one_dentry() and
410 * lose our last reference through the parent walk. In this case, we need to
411 * remove ourselves from the shrink list, not the LRU.
412 */
413static void dentry_lru_del(struct dentry *dentry)
414{
415 if (dentry->d_flags & DCACHE_LRU_LIST) {
416 if (dentry->d_flags & DCACHE_SHRINK_LIST)
417 return d_shrink_del(dentry);
418 d_lru_del(dentry);
419 }
420}
421
422/**
423 * d_kill - kill dentry and return parent
424 * @dentry: dentry to kill
425 * @parent: parent dentry
426 *
427 * The dentry must already be unhashed and removed from the LRU.
428 *
429 * If this is the root of the dentry tree, return NULL.
430 *
431 * dentry->d_lock and parent->d_lock must be held by caller, and are dropped by
432 * d_kill.
433 */
434static struct dentry *d_kill(struct dentry *dentry, struct dentry *parent)
435 __releases(dentry->d_lock)
436 __releases(parent->d_lock)
437 __releases(dentry->d_inode->i_lock)
438{
439 list_del(&dentry->d_u.d_child);
440 /*
441 * Inform d_walk() that we are no longer attached to the
442 * dentry tree
443 */
444 dentry->d_flags |= DCACHE_DENTRY_KILLED;
445 if (parent)
446 spin_unlock(&parent->d_lock);
447 dentry_iput(dentry);
448 /*
449 * dentry_iput drops the locks, at which point nobody (except
450 * transient RCU lookups) can reach this dentry.
451 */
452 d_free(dentry);
453 return parent;
454}
455
456/** 398/**
457 * d_drop - drop a dentry 399 * d_drop - drop a dentry
458 * @dentry: dentry to drop 400 * @dentry: dentry to drop
@@ -510,7 +452,14 @@ dentry_kill(struct dentry *dentry, int unlock_on_failure)
510 __releases(dentry->d_lock) 452 __releases(dentry->d_lock)
511{ 453{
512 struct inode *inode; 454 struct inode *inode;
513 struct dentry *parent; 455 struct dentry *parent = NULL;
456 bool can_free = true;
457
458 if (unlikely(dentry->d_flags & DCACHE_DENTRY_KILLED)) {
459 can_free = dentry->d_flags & DCACHE_MAY_FREE;
460 spin_unlock(&dentry->d_lock);
461 goto out;
462 }
514 463
515 inode = dentry->d_inode; 464 inode = dentry->d_inode;
516 if (inode && !spin_trylock(&inode->i_lock)) { 465 if (inode && !spin_trylock(&inode->i_lock)) {
@@ -521,9 +470,7 @@ relock:
521 } 470 }
522 return dentry; /* try again with same dentry */ 471 return dentry; /* try again with same dentry */
523 } 472 }
524 if (IS_ROOT(dentry)) 473 if (!IS_ROOT(dentry))
525 parent = NULL;
526 else
527 parent = dentry->d_parent; 474 parent = dentry->d_parent;
528 if (parent && !spin_trylock(&parent->d_lock)) { 475 if (parent && !spin_trylock(&parent->d_lock)) {
529 if (inode) 476 if (inode)
@@ -543,10 +490,40 @@ relock:
543 if ((dentry->d_flags & DCACHE_OP_PRUNE) && !d_unhashed(dentry)) 490 if ((dentry->d_flags & DCACHE_OP_PRUNE) && !d_unhashed(dentry))
544 dentry->d_op->d_prune(dentry); 491 dentry->d_op->d_prune(dentry);
545 492
546 dentry_lru_del(dentry); 493 if (dentry->d_flags & DCACHE_LRU_LIST) {
494 if (!(dentry->d_flags & DCACHE_SHRINK_LIST))
495 d_lru_del(dentry);
496 }
547 /* if it was on the hash then remove it */ 497 /* if it was on the hash then remove it */
548 __d_drop(dentry); 498 __d_drop(dentry);
549 return d_kill(dentry, parent); 499 list_del(&dentry->d_u.d_child);
500 /*
501 * Inform d_walk() that we are no longer attached to the
502 * dentry tree
503 */
504 dentry->d_flags |= DCACHE_DENTRY_KILLED;
505 if (parent)
506 spin_unlock(&parent->d_lock);
507 dentry_iput(dentry);
508 /*
509 * dentry_iput drops the locks, at which point nobody (except
510 * transient RCU lookups) can reach this dentry.
511 */
512 BUG_ON((int)dentry->d_lockref.count > 0);
513 this_cpu_dec(nr_dentry);
514 if (dentry->d_op && dentry->d_op->d_release)
515 dentry->d_op->d_release(dentry);
516
517 spin_lock(&dentry->d_lock);
518 if (dentry->d_flags & DCACHE_SHRINK_LIST) {
519 dentry->d_flags |= DCACHE_MAY_FREE;
520 can_free = false;
521 }
522 spin_unlock(&dentry->d_lock);
523out:
524 if (likely(can_free))
525 dentry_free(dentry);
526 return parent;
550} 527}
551 528
552/* 529/*
@@ -815,65 +792,13 @@ restart:
815} 792}
816EXPORT_SYMBOL(d_prune_aliases); 793EXPORT_SYMBOL(d_prune_aliases);
817 794
818/*
819 * Try to throw away a dentry - free the inode, dput the parent.
820 * Requires dentry->d_lock is held, and dentry->d_count == 0.
821 * Releases dentry->d_lock.
822 *
823 * This may fail if locks cannot be acquired no problem, just try again.
824 */
825static struct dentry * try_prune_one_dentry(struct dentry *dentry)
826 __releases(dentry->d_lock)
827{
828 struct dentry *parent;
829
830 parent = dentry_kill(dentry, 0);
831 /*
832 * If dentry_kill returns NULL, we have nothing more to do.
833 * if it returns the same dentry, trylocks failed. In either
834 * case, just loop again.
835 *
836 * Otherwise, we need to prune ancestors too. This is necessary
837 * to prevent quadratic behavior of shrink_dcache_parent(), but
838 * is also expected to be beneficial in reducing dentry cache
839 * fragmentation.
840 */
841 if (!parent)
842 return NULL;
843 if (parent == dentry)
844 return dentry;
845
846 /* Prune ancestors. */
847 dentry = parent;
848 while (dentry) {
849 if (lockref_put_or_lock(&dentry->d_lockref))
850 return NULL;
851 dentry = dentry_kill(dentry, 1);
852 }
853 return NULL;
854}
855
856static void shrink_dentry_list(struct list_head *list) 795static void shrink_dentry_list(struct list_head *list)
857{ 796{
858 struct dentry *dentry; 797 struct dentry *dentry, *parent;
859 798
860 rcu_read_lock(); 799 while (!list_empty(list)) {
861 for (;;) { 800 dentry = list_entry(list->prev, struct dentry, d_lru);
862 dentry = list_entry_rcu(list->prev, struct dentry, d_lru);
863 if (&dentry->d_lru == list)
864 break; /* empty */
865
866 /*
867 * Get the dentry lock, and re-verify that the dentry is
868 * this on the shrinking list. If it is, we know that
869 * DCACHE_SHRINK_LIST and DCACHE_LRU_LIST are set.
870 */
871 spin_lock(&dentry->d_lock); 801 spin_lock(&dentry->d_lock);
872 if (dentry != list_entry(list->prev, struct dentry, d_lru)) {
873 spin_unlock(&dentry->d_lock);
874 continue;
875 }
876
877 /* 802 /*
878 * The dispose list is isolated and dentries are not accounted 803 * The dispose list is isolated and dentries are not accounted
879 * to the LRU here, so we can simply remove it from the list 804 * to the LRU here, so we can simply remove it from the list
@@ -885,30 +810,38 @@ static void shrink_dentry_list(struct list_head *list)
885 * We found an inuse dentry which was not removed from 810 * We found an inuse dentry which was not removed from
886 * the LRU because of laziness during lookup. Do not free it. 811 * the LRU because of laziness during lookup. Do not free it.
887 */ 812 */
888 if (dentry->d_lockref.count) { 813 if ((int)dentry->d_lockref.count > 0) {
889 spin_unlock(&dentry->d_lock); 814 spin_unlock(&dentry->d_lock);
890 continue; 815 continue;
891 } 816 }
892 rcu_read_unlock();
893 817
818 parent = dentry_kill(dentry, 0);
894 /* 819 /*
895 * If 'try_to_prune()' returns a dentry, it will 820 * If dentry_kill returns NULL, we have nothing more to do.
896 * be the same one we passed in, and d_lock will
897 * have been held the whole time, so it will not
898 * have been added to any other lists. We failed
899 * to get the inode lock.
900 *
901 * We just add it back to the shrink list.
902 */ 821 */
903 dentry = try_prune_one_dentry(dentry); 822 if (!parent)
823 continue;
904 824
905 rcu_read_lock(); 825 if (unlikely(parent == dentry)) {
906 if (dentry) { 826 /*
827 * trylocks have failed and d_lock has been held the
828 * whole time, so it could not have been added to any
829 * other lists. Just add it back to the shrink list.
830 */
907 d_shrink_add(dentry, list); 831 d_shrink_add(dentry, list);
908 spin_unlock(&dentry->d_lock); 832 spin_unlock(&dentry->d_lock);
833 continue;
909 } 834 }
835 /*
836 * We need to prune ancestors too. This is necessary to prevent
837 * quadratic behavior of shrink_dcache_parent(), but is also
838 * expected to be beneficial in reducing dentry cache
839 * fragmentation.
840 */
841 dentry = parent;
842 while (dentry && !lockref_put_or_lock(&dentry->d_lockref))
843 dentry = dentry_kill(dentry, 1);
910 } 844 }
911 rcu_read_unlock();
912} 845}
913 846
914static enum lru_status 847static enum lru_status
@@ -1261,34 +1194,23 @@ static enum d_walk_ret select_collect(void *_data, struct dentry *dentry)
1261 if (data->start == dentry) 1194 if (data->start == dentry)
1262 goto out; 1195 goto out;
1263 1196
1264 /* 1197 if (dentry->d_flags & DCACHE_SHRINK_LIST) {
1265 * move only zero ref count dentries to the dispose list.
1266 *
1267 * Those which are presently on the shrink list, being processed
1268 * by shrink_dentry_list(), shouldn't be moved. Otherwise the
1269 * loop in shrink_dcache_parent() might not make any progress
1270 * and loop forever.
1271 */
1272 if (dentry->d_lockref.count) {
1273 dentry_lru_del(dentry);
1274 } else if (!(dentry->d_flags & DCACHE_SHRINK_LIST)) {
1275 /*
1276 * We can't use d_lru_shrink_move() because we
1277 * need to get the global LRU lock and do the
1278 * LRU accounting.
1279 */
1280 d_lru_del(dentry);
1281 d_shrink_add(dentry, &data->dispose);
1282 data->found++; 1198 data->found++;
1283 ret = D_WALK_NORETRY; 1199 } else {
1200 if (dentry->d_flags & DCACHE_LRU_LIST)
1201 d_lru_del(dentry);
1202 if (!dentry->d_lockref.count) {
1203 d_shrink_add(dentry, &data->dispose);
1204 data->found++;
1205 }
1284 } 1206 }
1285 /* 1207 /*
1286 * We can return to the caller if we have found some (this 1208 * We can return to the caller if we have found some (this
1287 * ensures forward progress). We'll be coming back to find 1209 * ensures forward progress). We'll be coming back to find
1288 * the rest. 1210 * the rest.
1289 */ 1211 */
1290 if (data->found && need_resched()) 1212 if (!list_empty(&data->dispose))
1291 ret = D_WALK_QUIT; 1213 ret = need_resched() ? D_WALK_QUIT : D_WALK_NORETRY;
1292out: 1214out:
1293 return ret; 1215 return ret;
1294} 1216}
@@ -1318,45 +1240,35 @@ void shrink_dcache_parent(struct dentry *parent)
1318} 1240}
1319EXPORT_SYMBOL(shrink_dcache_parent); 1241EXPORT_SYMBOL(shrink_dcache_parent);
1320 1242
1321static enum d_walk_ret umount_collect(void *_data, struct dentry *dentry) 1243static enum d_walk_ret umount_check(void *_data, struct dentry *dentry)
1322{ 1244{
1323 struct select_data *data = _data; 1245 /* it has busy descendents; complain about those instead */
1324 enum d_walk_ret ret = D_WALK_CONTINUE; 1246 if (!list_empty(&dentry->d_subdirs))
1247 return D_WALK_CONTINUE;
1325 1248
1326 if (dentry->d_lockref.count) { 1249 /* root with refcount 1 is fine */
1327 dentry_lru_del(dentry); 1250 if (dentry == _data && dentry->d_lockref.count == 1)
1328 if (likely(!list_empty(&dentry->d_subdirs))) 1251 return D_WALK_CONTINUE;
1329 goto out; 1252
1330 if (dentry == data->start && dentry->d_lockref.count == 1) 1253 printk(KERN_ERR "BUG: Dentry %p{i=%lx,n=%pd} "
1331 goto out; 1254 " still in use (%d) [unmount of %s %s]\n",
1332 printk(KERN_ERR
1333 "BUG: Dentry %p{i=%lx,n=%s}"
1334 " still in use (%d)"
1335 " [unmount of %s %s]\n",
1336 dentry, 1255 dentry,
1337 dentry->d_inode ? 1256 dentry->d_inode ?
1338 dentry->d_inode->i_ino : 0UL, 1257 dentry->d_inode->i_ino : 0UL,
1339 dentry->d_name.name, 1258 dentry,
1340 dentry->d_lockref.count, 1259 dentry->d_lockref.count,
1341 dentry->d_sb->s_type->name, 1260 dentry->d_sb->s_type->name,
1342 dentry->d_sb->s_id); 1261 dentry->d_sb->s_id);
1343 BUG(); 1262 WARN_ON(1);
1344 } else if (!(dentry->d_flags & DCACHE_SHRINK_LIST)) { 1263 return D_WALK_CONTINUE;
1345 /* 1264}
1346 * We can't use d_lru_shrink_move() because we 1265
1347 * need to get the global LRU lock and do the 1266static void do_one_tree(struct dentry *dentry)
1348 * LRU accounting. 1267{
1349 */ 1268 shrink_dcache_parent(dentry);
1350 if (dentry->d_flags & DCACHE_LRU_LIST) 1269 d_walk(dentry, dentry, umount_check, NULL);
1351 d_lru_del(dentry); 1270 d_drop(dentry);
1352 d_shrink_add(dentry, &data->dispose); 1271 dput(dentry);
1353 data->found++;
1354 ret = D_WALK_NORETRY;
1355 }
1356out:
1357 if (data->found && need_resched())
1358 ret = D_WALK_QUIT;
1359 return ret;
1360} 1272}
1361 1273
1362/* 1274/*
@@ -1366,40 +1278,15 @@ void shrink_dcache_for_umount(struct super_block *sb)
1366{ 1278{
1367 struct dentry *dentry; 1279 struct dentry *dentry;
1368 1280
1369 if (down_read_trylock(&sb->s_umount)) 1281 WARN(down_read_trylock(&sb->s_umount), "s_umount should've been locked");
1370 BUG();
1371 1282
1372 dentry = sb->s_root; 1283 dentry = sb->s_root;
1373 sb->s_root = NULL; 1284 sb->s_root = NULL;
1374 for (;;) { 1285 do_one_tree(dentry);
1375 struct select_data data;
1376
1377 INIT_LIST_HEAD(&data.dispose);
1378 data.start = dentry;
1379 data.found = 0;
1380
1381 d_walk(dentry, &data, umount_collect, NULL);
1382 if (!data.found)
1383 break;
1384
1385 shrink_dentry_list(&data.dispose);
1386 cond_resched();
1387 }
1388 d_drop(dentry);
1389 dput(dentry);
1390 1286
1391 while (!hlist_bl_empty(&sb->s_anon)) { 1287 while (!hlist_bl_empty(&sb->s_anon)) {
1392 struct select_data data; 1288 dentry = dget(hlist_bl_entry(hlist_bl_first(&sb->s_anon), struct dentry, d_hash));
1393 dentry = hlist_bl_entry(hlist_bl_first(&sb->s_anon), struct dentry, d_hash); 1289 do_one_tree(dentry);
1394
1395 INIT_LIST_HEAD(&data.dispose);
1396 data.start = NULL;
1397 data.found = 0;
1398
1399 d_walk(dentry, &data, umount_collect, NULL);
1400 if (data.found)
1401 shrink_dentry_list(&data.dispose);
1402 cond_resched();
1403 } 1290 }
1404} 1291}
1405 1292
@@ -1647,8 +1534,7 @@ static void __d_instantiate(struct dentry *dentry, struct inode *inode)
1647 unsigned add_flags = d_flags_for_inode(inode); 1534 unsigned add_flags = d_flags_for_inode(inode);
1648 1535
1649 spin_lock(&dentry->d_lock); 1536 spin_lock(&dentry->d_lock);
1650 dentry->d_flags &= ~DCACHE_ENTRY_TYPE; 1537 __d_set_type(dentry, add_flags);
1651 dentry->d_flags |= add_flags;
1652 if (inode) 1538 if (inode)
1653 hlist_add_head(&dentry->d_alias, &inode->i_dentry); 1539 hlist_add_head(&dentry->d_alias, &inode->i_dentry);
1654 dentry->d_inode = inode; 1540 dentry->d_inode = inode;
diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c
index 6ea7b1436bbc..5c56785007e0 100644
--- a/fs/ext4/balloc.c
+++ b/fs/ext4/balloc.c
@@ -667,7 +667,7 @@ ext4_fsblk_t ext4_count_free_clusters(struct super_block *sb)
667 continue; 667 continue;
668 668
669 x = ext4_count_free(bitmap_bh->b_data, 669 x = ext4_count_free(bitmap_bh->b_data,
670 EXT4_BLOCKS_PER_GROUP(sb) / 8); 670 EXT4_CLUSTERS_PER_GROUP(sb) / 8);
671 printk(KERN_DEBUG "group %u: stored = %d, counted = %u\n", 671 printk(KERN_DEBUG "group %u: stored = %d, counted = %u\n",
672 i, ext4_free_group_clusters(sb, gdp), x); 672 i, ext4_free_group_clusters(sb, gdp), x);
673 bitmap_count += x; 673 bitmap_count += x;
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index f1c65dc7cc0a..66946aa62127 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -2466,23 +2466,6 @@ static inline void ext4_update_i_disksize(struct inode *inode, loff_t newsize)
2466 up_write(&EXT4_I(inode)->i_data_sem); 2466 up_write(&EXT4_I(inode)->i_data_sem);
2467} 2467}
2468 2468
2469/*
2470 * Update i_disksize after writeback has been started. Races with truncate
2471 * are avoided by checking i_size under i_data_sem.
2472 */
2473static inline void ext4_wb_update_i_disksize(struct inode *inode, loff_t newsize)
2474{
2475 loff_t i_size;
2476
2477 down_write(&EXT4_I(inode)->i_data_sem);
2478 i_size = i_size_read(inode);
2479 if (newsize > i_size)
2480 newsize = i_size;
2481 if (newsize > EXT4_I(inode)->i_disksize)
2482 EXT4_I(inode)->i_disksize = newsize;
2483 up_write(&EXT4_I(inode)->i_data_sem);
2484}
2485
2486struct ext4_group_info { 2469struct ext4_group_info {
2487 unsigned long bb_state; 2470 unsigned long bb_state;
2488 struct rb_root bb_free_root; 2471 struct rb_root bb_free_root;
diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c
index 82df3ce9874a..01b0c208f625 100644
--- a/fs/ext4/extents.c
+++ b/fs/ext4/extents.c
@@ -3313,6 +3313,11 @@ static int ext4_split_extent(handle_t *handle,
3313 return PTR_ERR(path); 3313 return PTR_ERR(path);
3314 depth = ext_depth(inode); 3314 depth = ext_depth(inode);
3315 ex = path[depth].p_ext; 3315 ex = path[depth].p_ext;
3316 if (!ex) {
3317 EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
3318 (unsigned long) map->m_lblk);
3319 return -EIO;
3320 }
3316 uninitialized = ext4_ext_is_uninitialized(ex); 3321 uninitialized = ext4_ext_is_uninitialized(ex);
3317 split_flag1 = 0; 3322 split_flag1 = 0;
3318 3323
@@ -3694,6 +3699,12 @@ static int ext4_convert_initialized_extents(handle_t *handle,
3694 } 3699 }
3695 depth = ext_depth(inode); 3700 depth = ext_depth(inode);
3696 ex = path[depth].p_ext; 3701 ex = path[depth].p_ext;
3702 if (!ex) {
3703 EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
3704 (unsigned long) map->m_lblk);
3705 err = -EIO;
3706 goto out;
3707 }
3697 } 3708 }
3698 3709
3699 err = ext4_ext_get_access(handle, inode, path + depth); 3710 err = ext4_ext_get_access(handle, inode, path + depth);
@@ -4730,6 +4741,9 @@ static long ext4_zero_range(struct file *file, loff_t offset,
4730 4741
4731 trace_ext4_zero_range(inode, offset, len, mode); 4742 trace_ext4_zero_range(inode, offset, len, mode);
4732 4743
4744 if (!S_ISREG(inode->i_mode))
4745 return -EINVAL;
4746
4733 /* 4747 /*
4734 * Write out all dirty pages to avoid race conditions 4748 * Write out all dirty pages to avoid race conditions
4735 * Then release them. 4749 * Then release them.
@@ -4878,9 +4892,6 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
4878 if (mode & FALLOC_FL_PUNCH_HOLE) 4892 if (mode & FALLOC_FL_PUNCH_HOLE)
4879 return ext4_punch_hole(inode, offset, len); 4893 return ext4_punch_hole(inode, offset, len);
4880 4894
4881 if (mode & FALLOC_FL_COLLAPSE_RANGE)
4882 return ext4_collapse_range(inode, offset, len);
4883
4884 ret = ext4_convert_inline_data(inode); 4895 ret = ext4_convert_inline_data(inode);
4885 if (ret) 4896 if (ret)
4886 return ret; 4897 return ret;
@@ -4892,6 +4903,9 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
4892 if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) 4903 if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
4893 return -EOPNOTSUPP; 4904 return -EOPNOTSUPP;
4894 4905
4906 if (mode & FALLOC_FL_COLLAPSE_RANGE)
4907 return ext4_collapse_range(inode, offset, len);
4908
4895 if (mode & FALLOC_FL_ZERO_RANGE) 4909 if (mode & FALLOC_FL_ZERO_RANGE)
4896 return ext4_zero_range(file, offset, len, mode); 4910 return ext4_zero_range(file, offset, len, mode);
4897 4911
@@ -5229,18 +5243,19 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift,
5229 if (ex_start == EXT_FIRST_EXTENT(path[depth].p_hdr)) 5243 if (ex_start == EXT_FIRST_EXTENT(path[depth].p_hdr))
5230 update = 1; 5244 update = 1;
5231 5245
5232 *start = ex_last->ee_block + 5246 *start = le32_to_cpu(ex_last->ee_block) +
5233 ext4_ext_get_actual_len(ex_last); 5247 ext4_ext_get_actual_len(ex_last);
5234 5248
5235 while (ex_start <= ex_last) { 5249 while (ex_start <= ex_last) {
5236 ex_start->ee_block -= shift; 5250 le32_add_cpu(&ex_start->ee_block, -shift);
5237 if (ex_start > 5251 /* Try to merge to the left. */
5238 EXT_FIRST_EXTENT(path[depth].p_hdr)) { 5252 if ((ex_start >
5239 if (ext4_ext_try_to_merge_right(inode, 5253 EXT_FIRST_EXTENT(path[depth].p_hdr)) &&
5240 path, ex_start - 1)) 5254 ext4_ext_try_to_merge_right(inode,
5241 ex_last--; 5255 path, ex_start - 1))
5242 } 5256 ex_last--;
5243 ex_start++; 5257 else
5258 ex_start++;
5244 } 5259 }
5245 err = ext4_ext_dirty(handle, inode, path + depth); 5260 err = ext4_ext_dirty(handle, inode, path + depth);
5246 if (err) 5261 if (err)
@@ -5255,7 +5270,7 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift,
5255 if (err) 5270 if (err)
5256 goto out; 5271 goto out;
5257 5272
5258 path[depth].p_idx->ei_block -= shift; 5273 le32_add_cpu(&path[depth].p_idx->ei_block, -shift);
5259 err = ext4_ext_dirty(handle, inode, path + depth); 5274 err = ext4_ext_dirty(handle, inode, path + depth);
5260 if (err) 5275 if (err)
5261 goto out; 5276 goto out;
@@ -5300,7 +5315,8 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
5300 return ret; 5315 return ret;
5301 } 5316 }
5302 5317
5303 stop_block = extent->ee_block + ext4_ext_get_actual_len(extent); 5318 stop_block = le32_to_cpu(extent->ee_block) +
5319 ext4_ext_get_actual_len(extent);
5304 ext4_ext_drop_refs(path); 5320 ext4_ext_drop_refs(path);
5305 kfree(path); 5321 kfree(path);
5306 5322
@@ -5313,10 +5329,18 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
5313 * enough to accomodate the shift. 5329 * enough to accomodate the shift.
5314 */ 5330 */
5315 path = ext4_ext_find_extent(inode, start - 1, NULL, 0); 5331 path = ext4_ext_find_extent(inode, start - 1, NULL, 0);
5332 if (IS_ERR(path))
5333 return PTR_ERR(path);
5316 depth = path->p_depth; 5334 depth = path->p_depth;
5317 extent = path[depth].p_ext; 5335 extent = path[depth].p_ext;
5318 ex_start = extent->ee_block; 5336 if (extent) {
5319 ex_end = extent->ee_block + ext4_ext_get_actual_len(extent); 5337 ex_start = le32_to_cpu(extent->ee_block);
5338 ex_end = le32_to_cpu(extent->ee_block) +
5339 ext4_ext_get_actual_len(extent);
5340 } else {
5341 ex_start = 0;
5342 ex_end = 0;
5343 }
5320 ext4_ext_drop_refs(path); 5344 ext4_ext_drop_refs(path);
5321 kfree(path); 5345 kfree(path);
5322 5346
@@ -5331,7 +5355,13 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
5331 return PTR_ERR(path); 5355 return PTR_ERR(path);
5332 depth = path->p_depth; 5356 depth = path->p_depth;
5333 extent = path[depth].p_ext; 5357 extent = path[depth].p_ext;
5334 current_block = extent->ee_block; 5358 if (!extent) {
5359 EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
5360 (unsigned long) start);
5361 return -EIO;
5362 }
5363
5364 current_block = le32_to_cpu(extent->ee_block);
5335 if (start > current_block) { 5365 if (start > current_block) {
5336 /* Hole, move to the next extent */ 5366 /* Hole, move to the next extent */
5337 ret = mext_next_extent(inode, path, &extent); 5367 ret = mext_next_extent(inode, path, &extent);
@@ -5365,17 +5395,18 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5365 ext4_lblk_t punch_start, punch_stop; 5395 ext4_lblk_t punch_start, punch_stop;
5366 handle_t *handle; 5396 handle_t *handle;
5367 unsigned int credits; 5397 unsigned int credits;
5368 loff_t new_size; 5398 loff_t new_size, ioffset;
5369 int ret; 5399 int ret;
5370 5400
5371 BUG_ON(offset + len > i_size_read(inode));
5372
5373 /* Collapse range works only on fs block size aligned offsets. */ 5401 /* Collapse range works only on fs block size aligned offsets. */
5374 if (offset & (EXT4_BLOCK_SIZE(sb) - 1) || 5402 if (offset & (EXT4_BLOCK_SIZE(sb) - 1) ||
5375 len & (EXT4_BLOCK_SIZE(sb) - 1)) 5403 len & (EXT4_BLOCK_SIZE(sb) - 1))
5376 return -EINVAL; 5404 return -EINVAL;
5377 5405
5378 if (!S_ISREG(inode->i_mode)) 5406 if (!S_ISREG(inode->i_mode))
5407 return -EINVAL;
5408
5409 if (EXT4_SB(inode->i_sb)->s_cluster_ratio > 1)
5379 return -EOPNOTSUPP; 5410 return -EOPNOTSUPP;
5380 5411
5381 trace_ext4_collapse_range(inode, offset, len); 5412 trace_ext4_collapse_range(inode, offset, len);
@@ -5383,22 +5414,34 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5383 punch_start = offset >> EXT4_BLOCK_SIZE_BITS(sb); 5414 punch_start = offset >> EXT4_BLOCK_SIZE_BITS(sb);
5384 punch_stop = (offset + len) >> EXT4_BLOCK_SIZE_BITS(sb); 5415 punch_stop = (offset + len) >> EXT4_BLOCK_SIZE_BITS(sb);
5385 5416
5417 /* Call ext4_force_commit to flush all data in case of data=journal. */
5418 if (ext4_should_journal_data(inode)) {
5419 ret = ext4_force_commit(inode->i_sb);
5420 if (ret)
5421 return ret;
5422 }
5423
5424 /*
5425 * Need to round down offset to be aligned with page size boundary
5426 * for page size > block size.
5427 */
5428 ioffset = round_down(offset, PAGE_SIZE);
5429
5386 /* Write out all dirty pages */ 5430 /* Write out all dirty pages */
5387 ret = filemap_write_and_wait_range(inode->i_mapping, offset, -1); 5431 ret = filemap_write_and_wait_range(inode->i_mapping, ioffset,
5432 LLONG_MAX);
5388 if (ret) 5433 if (ret)
5389 return ret; 5434 return ret;
5390 5435
5391 /* Take mutex lock */ 5436 /* Take mutex lock */
5392 mutex_lock(&inode->i_mutex); 5437 mutex_lock(&inode->i_mutex);
5393 5438
5394 /* It's not possible punch hole on append only file */ 5439 /*
5395 if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) { 5440 * There is no need to overlap collapse range with EOF, in which case
5396 ret = -EPERM; 5441 * it is effectively a truncate operation
5397 goto out_mutex; 5442 */
5398 } 5443 if (offset + len >= i_size_read(inode)) {
5399 5444 ret = -EINVAL;
5400 if (IS_SWAPFILE(inode)) {
5401 ret = -ETXTBSY;
5402 goto out_mutex; 5445 goto out_mutex;
5403 } 5446 }
5404 5447
@@ -5408,7 +5451,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5408 goto out_mutex; 5451 goto out_mutex;
5409 } 5452 }
5410 5453
5411 truncate_pagecache_range(inode, offset, -1); 5454 truncate_pagecache(inode, ioffset);
5412 5455
5413 /* Wait for existing dio to complete */ 5456 /* Wait for existing dio to complete */
5414 ext4_inode_block_unlocked_dio(inode); 5457 ext4_inode_block_unlocked_dio(inode);
@@ -5425,7 +5468,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5425 ext4_discard_preallocations(inode); 5468 ext4_discard_preallocations(inode);
5426 5469
5427 ret = ext4_es_remove_extent(inode, punch_start, 5470 ret = ext4_es_remove_extent(inode, punch_start,
5428 EXT_MAX_BLOCKS - punch_start - 1); 5471 EXT_MAX_BLOCKS - punch_start);
5429 if (ret) { 5472 if (ret) {
5430 up_write(&EXT4_I(inode)->i_data_sem); 5473 up_write(&EXT4_I(inode)->i_data_sem);
5431 goto out_stop; 5474 goto out_stop;
@@ -5436,6 +5479,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5436 up_write(&EXT4_I(inode)->i_data_sem); 5479 up_write(&EXT4_I(inode)->i_data_sem);
5437 goto out_stop; 5480 goto out_stop;
5438 } 5481 }
5482 ext4_discard_preallocations(inode);
5439 5483
5440 ret = ext4_ext_shift_extents(inode, handle, punch_stop, 5484 ret = ext4_ext_shift_extents(inode, handle, punch_stop,
5441 punch_stop - punch_start); 5485 punch_stop - punch_start);
@@ -5445,10 +5489,9 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
5445 } 5489 }
5446 5490
5447 new_size = i_size_read(inode) - len; 5491 new_size = i_size_read(inode) - len;
5448 truncate_setsize(inode, new_size); 5492 i_size_write(inode, new_size);
5449 EXT4_I(inode)->i_disksize = new_size; 5493 EXT4_I(inode)->i_disksize = new_size;
5450 5494
5451 ext4_discard_preallocations(inode);
5452 up_write(&EXT4_I(inode)->i_data_sem); 5495 up_write(&EXT4_I(inode)->i_data_sem);
5453 if (IS_SYNC(inode)) 5496 if (IS_SYNC(inode))
5454 ext4_handle_sync(handle); 5497 ext4_handle_sync(handle);
diff --git a/fs/ext4/extents_status.c b/fs/ext4/extents_status.c
index 0a014a7194b2..0ebc21204b51 100644
--- a/fs/ext4/extents_status.c
+++ b/fs/ext4/extents_status.c
@@ -810,7 +810,7 @@ retry:
810 810
811 newes.es_lblk = end + 1; 811 newes.es_lblk = end + 1;
812 newes.es_len = len2; 812 newes.es_len = len2;
813 block = 0x7FDEADBEEF; 813 block = 0x7FDEADBEEFULL;
814 if (ext4_es_is_written(&orig_es) || 814 if (ext4_es_is_written(&orig_es) ||
815 ext4_es_is_unwritten(&orig_es)) 815 ext4_es_is_unwritten(&orig_es))
816 block = ext4_es_pblock(&orig_es) + 816 block = ext4_es_pblock(&orig_es) +
diff --git a/fs/ext4/file.c b/fs/ext4/file.c
index ca7502d89fde..063fc1538355 100644
--- a/fs/ext4/file.c
+++ b/fs/ext4/file.c
@@ -82,7 +82,7 @@ ext4_unaligned_aio(struct inode *inode, const struct iovec *iov,
82 size_t count = iov_length(iov, nr_segs); 82 size_t count = iov_length(iov, nr_segs);
83 loff_t final_size = pos + count; 83 loff_t final_size = pos + count;
84 84
85 if (pos >= inode->i_size) 85 if (pos >= i_size_read(inode))
86 return 0; 86 return 0;
87 87
88 if ((pos & blockmask) || (final_size & blockmask)) 88 if ((pos & blockmask) || (final_size & blockmask))
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 5b0d2c7d5408..d7b7462a0e13 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -522,6 +522,10 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode,
522 if (unlikely(map->m_len > INT_MAX)) 522 if (unlikely(map->m_len > INT_MAX))
523 map->m_len = INT_MAX; 523 map->m_len = INT_MAX;
524 524
525 /* We can handle the block number less than EXT_MAX_BLOCKS */
526 if (unlikely(map->m_lblk >= EXT_MAX_BLOCKS))
527 return -EIO;
528
525 /* Lookup extent status tree firstly */ 529 /* Lookup extent status tree firstly */
526 if (ext4_es_lookup_extent(inode, map->m_lblk, &es)) { 530 if (ext4_es_lookup_extent(inode, map->m_lblk, &es)) {
527 ext4_es_lru_add(inode); 531 ext4_es_lru_add(inode);
@@ -2243,13 +2247,23 @@ static int mpage_map_and_submit_extent(handle_t *handle,
2243 return err; 2247 return err;
2244 } while (map->m_len); 2248 } while (map->m_len);
2245 2249
2246 /* Update on-disk size after IO is submitted */ 2250 /*
2251 * Update on-disk size after IO is submitted. Races with
2252 * truncate are avoided by checking i_size under i_data_sem.
2253 */
2247 disksize = ((loff_t)mpd->first_page) << PAGE_CACHE_SHIFT; 2254 disksize = ((loff_t)mpd->first_page) << PAGE_CACHE_SHIFT;
2248 if (disksize > EXT4_I(inode)->i_disksize) { 2255 if (disksize > EXT4_I(inode)->i_disksize) {
2249 int err2; 2256 int err2;
2250 2257 loff_t i_size;
2251 ext4_wb_update_i_disksize(inode, disksize); 2258
2259 down_write(&EXT4_I(inode)->i_data_sem);
2260 i_size = i_size_read(inode);
2261 if (disksize > i_size)
2262 disksize = i_size;
2263 if (disksize > EXT4_I(inode)->i_disksize)
2264 EXT4_I(inode)->i_disksize = disksize;
2252 err2 = ext4_mark_inode_dirty(handle, inode); 2265 err2 = ext4_mark_inode_dirty(handle, inode);
2266 up_write(&EXT4_I(inode)->i_data_sem);
2253 if (err2) 2267 if (err2)
2254 ext4_error(inode->i_sb, 2268 ext4_error(inode->i_sb,
2255 "Failed to mark inode %lu dirty", 2269 "Failed to mark inode %lu dirty",
@@ -3527,15 +3541,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
3527 } 3541 }
3528 3542
3529 mutex_lock(&inode->i_mutex); 3543 mutex_lock(&inode->i_mutex);
3530 /* It's not possible punch hole on append only file */
3531 if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) {
3532 ret = -EPERM;
3533 goto out_mutex;
3534 }
3535 if (IS_SWAPFILE(inode)) {
3536 ret = -ETXTBSY;
3537 goto out_mutex;
3538 }
3539 3544
3540 /* No need to punch hole beyond i_size */ 3545 /* No need to punch hole beyond i_size */
3541 if (offset >= inode->i_size) 3546 if (offset >= inode->i_size)
@@ -3616,7 +3621,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
3616 ret = ext4_free_hole_blocks(handle, inode, first_block, 3621 ret = ext4_free_hole_blocks(handle, inode, first_block,
3617 stop_block); 3622 stop_block);
3618 3623
3619 ext4_discard_preallocations(inode);
3620 up_write(&EXT4_I(inode)->i_data_sem); 3624 up_write(&EXT4_I(inode)->i_data_sem);
3621 if (IS_SYNC(inode)) 3625 if (IS_SYNC(inode))
3622 ext4_handle_sync(handle); 3626 ext4_handle_sync(handle);
@@ -4423,21 +4427,20 @@ out_brelse:
4423 * 4427 *
4424 * We are called from a few places: 4428 * We are called from a few places:
4425 * 4429 *
4426 * - Within generic_file_write() for O_SYNC files. 4430 * - Within generic_file_aio_write() -> generic_write_sync() for O_SYNC files.
4427 * Here, there will be no transaction running. We wait for any running 4431 * Here, there will be no transaction running. We wait for any running
4428 * transaction to commit. 4432 * transaction to commit.
4429 * 4433 *
4430 * - Within sys_sync(), kupdate and such. 4434 * - Within flush work (sys_sync(), kupdate and such).
4431 * We wait on commit, if tol to. 4435 * We wait on commit, if told to.
4432 * 4436 *
4433 * - Within prune_icache() (PF_MEMALLOC == true) 4437 * - Within iput_final() -> write_inode_now()
4434 * Here we simply return. We can't afford to block kswapd on the 4438 * We wait on commit, if told to.
4435 * journal commit.
4436 * 4439 *
4437 * In all cases it is actually safe for us to return without doing anything, 4440 * In all cases it is actually safe for us to return without doing anything,
4438 * because the inode has been copied into a raw inode buffer in 4441 * because the inode has been copied into a raw inode buffer in
4439 * ext4_mark_inode_dirty(). This is a correctness thing for O_SYNC and for 4442 * ext4_mark_inode_dirty(). This is a correctness thing for WB_SYNC_ALL
4440 * knfsd. 4443 * writeback.
4441 * 4444 *
4442 * Note that we are absolutely dependent upon all inode dirtiers doing the 4445 * Note that we are absolutely dependent upon all inode dirtiers doing the
4443 * right thing: they *must* call mark_inode_dirty() after dirtying info in 4446 * right thing: they *must* call mark_inode_dirty() after dirtying info in
@@ -4449,15 +4452,15 @@ out_brelse:
4449 * stuff(); 4452 * stuff();
4450 * inode->i_size = expr; 4453 * inode->i_size = expr;
4451 * 4454 *
4452 * is in error because a kswapd-driven write_inode() could occur while 4455 * is in error because write_inode() could occur while `stuff()' is running,
4453 * `stuff()' is running, and the new i_size will be lost. Plus the inode 4456 * and the new i_size will be lost. Plus the inode will no longer be on the
4454 * will no longer be on the superblock's dirty inode list. 4457 * superblock's dirty inode list.
4455 */ 4458 */
4456int ext4_write_inode(struct inode *inode, struct writeback_control *wbc) 4459int ext4_write_inode(struct inode *inode, struct writeback_control *wbc)
4457{ 4460{
4458 int err; 4461 int err;
4459 4462
4460 if (current->flags & PF_MEMALLOC) 4463 if (WARN_ON_ONCE(current->flags & PF_MEMALLOC))
4461 return 0; 4464 return 0;
4462 4465
4463 if (EXT4_SB(inode->i_sb)->s_journal) { 4466 if (EXT4_SB(inode->i_sb)->s_journal) {
diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
index a888cac76e9c..c8238a26818c 100644
--- a/fs/ext4/mballoc.c
+++ b/fs/ext4/mballoc.c
@@ -989,7 +989,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb,
989 poff = block % blocks_per_page; 989 poff = block % blocks_per_page;
990 page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); 990 page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS);
991 if (!page) 991 if (!page)
992 return -EIO; 992 return -ENOMEM;
993 BUG_ON(page->mapping != inode->i_mapping); 993 BUG_ON(page->mapping != inode->i_mapping);
994 e4b->bd_bitmap_page = page; 994 e4b->bd_bitmap_page = page;
995 e4b->bd_bitmap = page_address(page) + (poff * sb->s_blocksize); 995 e4b->bd_bitmap = page_address(page) + (poff * sb->s_blocksize);
@@ -1003,7 +1003,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb,
1003 pnum = block / blocks_per_page; 1003 pnum = block / blocks_per_page;
1004 page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); 1004 page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS);
1005 if (!page) 1005 if (!page)
1006 return -EIO; 1006 return -ENOMEM;
1007 BUG_ON(page->mapping != inode->i_mapping); 1007 BUG_ON(page->mapping != inode->i_mapping);
1008 e4b->bd_buddy_page = page; 1008 e4b->bd_buddy_page = page;
1009 return 0; 1009 return 0;
@@ -1168,7 +1168,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group,
1168 unlock_page(page); 1168 unlock_page(page);
1169 } 1169 }
1170 } 1170 }
1171 if (page == NULL || !PageUptodate(page)) { 1171 if (page == NULL) {
1172 ret = -ENOMEM;
1173 goto err;
1174 }
1175 if (!PageUptodate(page)) {
1172 ret = -EIO; 1176 ret = -EIO;
1173 goto err; 1177 goto err;
1174 } 1178 }
@@ -1197,7 +1201,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group,
1197 unlock_page(page); 1201 unlock_page(page);
1198 } 1202 }
1199 } 1203 }
1200 if (page == NULL || !PageUptodate(page)) { 1204 if (page == NULL) {
1205 ret = -ENOMEM;
1206 goto err;
1207 }
1208 if (!PageUptodate(page)) {
1201 ret = -EIO; 1209 ret = -EIO;
1202 goto err; 1210 goto err;
1203 } 1211 }
@@ -5008,6 +5016,8 @@ error_return:
5008 */ 5016 */
5009static int ext4_trim_extent(struct super_block *sb, int start, int count, 5017static int ext4_trim_extent(struct super_block *sb, int start, int count,
5010 ext4_group_t group, struct ext4_buddy *e4b) 5018 ext4_group_t group, struct ext4_buddy *e4b)
5019__releases(bitlock)
5020__acquires(bitlock)
5011{ 5021{
5012 struct ext4_free_extent ex; 5022 struct ext4_free_extent ex;
5013 int ret = 0; 5023 int ret = 0;
diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c
index ab95508e3d40..c18d95b50540 100644
--- a/fs/ext4/page-io.c
+++ b/fs/ext4/page-io.c
@@ -308,13 +308,14 @@ static void ext4_end_bio(struct bio *bio, int error)
308 if (error) { 308 if (error) {
309 struct inode *inode = io_end->inode; 309 struct inode *inode = io_end->inode;
310 310
311 ext4_warning(inode->i_sb, "I/O error writing to inode %lu " 311 ext4_warning(inode->i_sb, "I/O error %d writing to inode %lu "
312 "(offset %llu size %ld starting block %llu)", 312 "(offset %llu size %ld starting block %llu)",
313 inode->i_ino, 313 error, inode->i_ino,
314 (unsigned long long) io_end->offset, 314 (unsigned long long) io_end->offset,
315 (long) io_end->size, 315 (long) io_end->size,
316 (unsigned long long) 316 (unsigned long long)
317 bi_sector >> (inode->i_blkbits - 9)); 317 bi_sector >> (inode->i_blkbits - 9));
318 mapping_set_error(inode->i_mapping, error);
318 } 319 }
319 320
320 if (io_end->flag & EXT4_IO_END_UNWRITTEN) { 321 if (io_end->flag & EXT4_IO_END_UNWRITTEN) {
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index f3c667091618..6f9e6fadac04 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -3869,19 +3869,38 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
3869 goto failed_mount2; 3869 goto failed_mount2;
3870 } 3870 }
3871 } 3871 }
3872
3873 /*
3874 * set up enough so that it can read an inode,
3875 * and create new inode for buddy allocator
3876 */
3877 sbi->s_gdb_count = db_count;
3878 if (!test_opt(sb, NOLOAD) &&
3879 EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL))
3880 sb->s_op = &ext4_sops;
3881 else
3882 sb->s_op = &ext4_nojournal_sops;
3883
3884 ext4_ext_init(sb);
3885 err = ext4_mb_init(sb);
3886 if (err) {
3887 ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)",
3888 err);
3889 goto failed_mount2;
3890 }
3891
3872 if (!ext4_check_descriptors(sb, &first_not_zeroed)) { 3892 if (!ext4_check_descriptors(sb, &first_not_zeroed)) {
3873 ext4_msg(sb, KERN_ERR, "group descriptors corrupted!"); 3893 ext4_msg(sb, KERN_ERR, "group descriptors corrupted!");
3874 goto failed_mount2; 3894 goto failed_mount2a;
3875 } 3895 }
3876 if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG)) 3896 if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG))
3877 if (!ext4_fill_flex_info(sb)) { 3897 if (!ext4_fill_flex_info(sb)) {
3878 ext4_msg(sb, KERN_ERR, 3898 ext4_msg(sb, KERN_ERR,
3879 "unable to initialize " 3899 "unable to initialize "
3880 "flex_bg meta info!"); 3900 "flex_bg meta info!");
3881 goto failed_mount2; 3901 goto failed_mount2a;
3882 } 3902 }
3883 3903
3884 sbi->s_gdb_count = db_count;
3885 get_random_bytes(&sbi->s_next_generation, sizeof(u32)); 3904 get_random_bytes(&sbi->s_next_generation, sizeof(u32));
3886 spin_lock_init(&sbi->s_next_gen_lock); 3905 spin_lock_init(&sbi->s_next_gen_lock);
3887 3906
@@ -3916,14 +3935,6 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
3916 sbi->s_stripe = ext4_get_stripe_size(sbi); 3935 sbi->s_stripe = ext4_get_stripe_size(sbi);
3917 sbi->s_extent_max_zeroout_kb = 32; 3936 sbi->s_extent_max_zeroout_kb = 32;
3918 3937
3919 /*
3920 * set up enough so that it can read an inode
3921 */
3922 if (!test_opt(sb, NOLOAD) &&
3923 EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL))
3924 sb->s_op = &ext4_sops;
3925 else
3926 sb->s_op = &ext4_nojournal_sops;
3927 sb->s_export_op = &ext4_export_ops; 3938 sb->s_export_op = &ext4_export_ops;
3928 sb->s_xattr = ext4_xattr_handlers; 3939 sb->s_xattr = ext4_xattr_handlers;
3929#ifdef CONFIG_QUOTA 3940#ifdef CONFIG_QUOTA
@@ -4113,21 +4124,13 @@ no_journal:
4113 if (err) { 4124 if (err) {
4114 ext4_msg(sb, KERN_ERR, "failed to reserve %llu clusters for " 4125 ext4_msg(sb, KERN_ERR, "failed to reserve %llu clusters for "
4115 "reserved pool", ext4_calculate_resv_clusters(sb)); 4126 "reserved pool", ext4_calculate_resv_clusters(sb));
4116 goto failed_mount4a; 4127 goto failed_mount5;
4117 } 4128 }
4118 4129
4119 err = ext4_setup_system_zone(sb); 4130 err = ext4_setup_system_zone(sb);
4120 if (err) { 4131 if (err) {
4121 ext4_msg(sb, KERN_ERR, "failed to initialize system " 4132 ext4_msg(sb, KERN_ERR, "failed to initialize system "
4122 "zone (%d)", err); 4133 "zone (%d)", err);
4123 goto failed_mount4a;
4124 }
4125
4126 ext4_ext_init(sb);
4127 err = ext4_mb_init(sb);
4128 if (err) {
4129 ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)",
4130 err);
4131 goto failed_mount5; 4134 goto failed_mount5;
4132 } 4135 }
4133 4136
@@ -4204,11 +4207,8 @@ failed_mount8:
4204failed_mount7: 4207failed_mount7:
4205 ext4_unregister_li_request(sb); 4208 ext4_unregister_li_request(sb);
4206failed_mount6: 4209failed_mount6:
4207 ext4_mb_release(sb);
4208failed_mount5:
4209 ext4_ext_release(sb);
4210 ext4_release_system_zone(sb); 4210 ext4_release_system_zone(sb);
4211failed_mount4a: 4211failed_mount5:
4212 dput(sb->s_root); 4212 dput(sb->s_root);
4213 sb->s_root = NULL; 4213 sb->s_root = NULL;
4214failed_mount4: 4214failed_mount4:
@@ -4232,11 +4232,14 @@ failed_mount3:
4232 percpu_counter_destroy(&sbi->s_extent_cache_cnt); 4232 percpu_counter_destroy(&sbi->s_extent_cache_cnt);
4233 if (sbi->s_mmp_tsk) 4233 if (sbi->s_mmp_tsk)
4234 kthread_stop(sbi->s_mmp_tsk); 4234 kthread_stop(sbi->s_mmp_tsk);
4235failed_mount2a:
4236 ext4_mb_release(sb);
4235failed_mount2: 4237failed_mount2:
4236 for (i = 0; i < db_count; i++) 4238 for (i = 0; i < db_count; i++)
4237 brelse(sbi->s_group_desc[i]); 4239 brelse(sbi->s_group_desc[i]);
4238 ext4_kvfree(sbi->s_group_desc); 4240 ext4_kvfree(sbi->s_group_desc);
4239failed_mount: 4241failed_mount:
4242 ext4_ext_release(sb);
4240 if (sbi->s_chksum_driver) 4243 if (sbi->s_chksum_driver)
4241 crypto_free_shash(sbi->s_chksum_driver); 4244 crypto_free_shash(sbi->s_chksum_driver);
4242 if (sbi->s_proc) { 4245 if (sbi->s_proc) {
diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c
index 1f5cf5880718..4eec399ec807 100644
--- a/fs/ext4/xattr.c
+++ b/fs/ext4/xattr.c
@@ -520,8 +520,8 @@ static void ext4_xattr_update_super_block(handle_t *handle,
520} 520}
521 521
522/* 522/*
523 * Release the xattr block BH: If the reference count is > 1, decrement 523 * Release the xattr block BH: If the reference count is > 1, decrement it;
524 * it; otherwise free the block. 524 * otherwise free the block.
525 */ 525 */
526static void 526static void
527ext4_xattr_release_block(handle_t *handle, struct inode *inode, 527ext4_xattr_release_block(handle_t *handle, struct inode *inode,
@@ -542,16 +542,31 @@ ext4_xattr_release_block(handle_t *handle, struct inode *inode,
542 if (ce) 542 if (ce)
543 mb_cache_entry_free(ce); 543 mb_cache_entry_free(ce);
544 get_bh(bh); 544 get_bh(bh);
545 unlock_buffer(bh);
545 ext4_free_blocks(handle, inode, bh, 0, 1, 546 ext4_free_blocks(handle, inode, bh, 0, 1,
546 EXT4_FREE_BLOCKS_METADATA | 547 EXT4_FREE_BLOCKS_METADATA |
547 EXT4_FREE_BLOCKS_FORGET); 548 EXT4_FREE_BLOCKS_FORGET);
548 unlock_buffer(bh);
549 } else { 549 } else {
550 le32_add_cpu(&BHDR(bh)->h_refcount, -1); 550 le32_add_cpu(&BHDR(bh)->h_refcount, -1);
551 if (ce) 551 if (ce)
552 mb_cache_entry_release(ce); 552 mb_cache_entry_release(ce);
553 /*
554 * Beware of this ugliness: Releasing of xattr block references
555 * from different inodes can race and so we have to protect
556 * from a race where someone else frees the block (and releases
557 * its journal_head) before we are done dirtying the buffer. In
558 * nojournal mode this race is harmless and we actually cannot
559 * call ext4_handle_dirty_xattr_block() with locked buffer as
560 * that function can call sync_dirty_buffer() so for that case
561 * we handle the dirtying after unlocking the buffer.
562 */
563 if (ext4_handle_valid(handle))
564 error = ext4_handle_dirty_xattr_block(handle, inode,
565 bh);
553 unlock_buffer(bh); 566 unlock_buffer(bh);
554 error = ext4_handle_dirty_xattr_block(handle, inode, bh); 567 if (!ext4_handle_valid(handle))
568 error = ext4_handle_dirty_xattr_block(handle, inode,
569 bh);
555 if (IS_SYNC(inode)) 570 if (IS_SYNC(inode))
556 ext4_handle_sync(handle); 571 ext4_handle_sync(handle);
557 dquot_free_block(inode, EXT4_C2B(EXT4_SB(inode->i_sb), 1)); 572 dquot_free_block(inode, EXT4_C2B(EXT4_SB(inode->i_sb), 1));
diff --git a/fs/fcntl.c b/fs/fcntl.c
index 9ead1596399a..72c82f69b01b 100644
--- a/fs/fcntl.c
+++ b/fs/fcntl.c
@@ -274,15 +274,15 @@ static long do_fcntl(int fd, unsigned int cmd, unsigned long arg,
274 break; 274 break;
275#if BITS_PER_LONG != 32 275#if BITS_PER_LONG != 32
276 /* 32-bit arches must use fcntl64() */ 276 /* 32-bit arches must use fcntl64() */
277 case F_GETLKP: 277 case F_OFD_GETLK:
278#endif 278#endif
279 case F_GETLK: 279 case F_GETLK:
280 err = fcntl_getlk(filp, cmd, (struct flock __user *) arg); 280 err = fcntl_getlk(filp, cmd, (struct flock __user *) arg);
281 break; 281 break;
282#if BITS_PER_LONG != 32 282#if BITS_PER_LONG != 32
283 /* 32-bit arches must use fcntl64() */ 283 /* 32-bit arches must use fcntl64() */
284 case F_SETLKP: 284 case F_OFD_SETLK:
285 case F_SETLKPW: 285 case F_OFD_SETLKW:
286#endif 286#endif
287 /* Fallthrough */ 287 /* Fallthrough */
288 case F_SETLK: 288 case F_SETLK:
@@ -399,13 +399,13 @@ SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
399 399
400 switch (cmd) { 400 switch (cmd) {
401 case F_GETLK64: 401 case F_GETLK64:
402 case F_GETLKP: 402 case F_OFD_GETLK:
403 err = fcntl_getlk64(f.file, cmd, (struct flock64 __user *) arg); 403 err = fcntl_getlk64(f.file, cmd, (struct flock64 __user *) arg);
404 break; 404 break;
405 case F_SETLK64: 405 case F_SETLK64:
406 case F_SETLKW64: 406 case F_SETLKW64:
407 case F_SETLKP: 407 case F_OFD_SETLK:
408 case F_SETLKPW: 408 case F_OFD_SETLKW:
409 err = fcntl_setlk64(fd, f.file, cmd, 409 err = fcntl_setlk64(fd, f.file, cmd,
410 (struct flock64 __user *) arg); 410 (struct flock64 __user *) arg);
411 break; 411 break;
diff --git a/fs/fuse/control.c b/fs/fuse/control.c
index a0b0855d00a9..205e0d5d5307 100644
--- a/fs/fuse/control.c
+++ b/fs/fuse/control.c
@@ -348,7 +348,7 @@ int __init fuse_ctl_init(void)
348 return register_filesystem(&fuse_ctl_fs_type); 348 return register_filesystem(&fuse_ctl_fs_type);
349} 349}
350 350
351void fuse_ctl_cleanup(void) 351void __exit fuse_ctl_cleanup(void)
352{ 352{
353 unregister_filesystem(&fuse_ctl_fs_type); 353 unregister_filesystem(&fuse_ctl_fs_type);
354} 354}
diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c
index 5b4e035b364c..42198359fa1b 100644
--- a/fs/fuse/dir.c
+++ b/fs/fuse/dir.c
@@ -679,6 +679,14 @@ static int fuse_symlink(struct inode *dir, struct dentry *entry,
679 return create_new_entry(fc, req, dir, entry, S_IFLNK); 679 return create_new_entry(fc, req, dir, entry, S_IFLNK);
680} 680}
681 681
682static inline void fuse_update_ctime(struct inode *inode)
683{
684 if (!IS_NOCMTIME(inode)) {
685 inode->i_ctime = current_fs_time(inode->i_sb);
686 mark_inode_dirty_sync(inode);
687 }
688}
689
682static int fuse_unlink(struct inode *dir, struct dentry *entry) 690static int fuse_unlink(struct inode *dir, struct dentry *entry)
683{ 691{
684 int err; 692 int err;
@@ -713,6 +721,7 @@ static int fuse_unlink(struct inode *dir, struct dentry *entry)
713 fuse_invalidate_attr(inode); 721 fuse_invalidate_attr(inode);
714 fuse_invalidate_attr(dir); 722 fuse_invalidate_attr(dir);
715 fuse_invalidate_entry_cache(entry); 723 fuse_invalidate_entry_cache(entry);
724 fuse_update_ctime(inode);
716 } else if (err == -EINTR) 725 } else if (err == -EINTR)
717 fuse_invalidate_entry(entry); 726 fuse_invalidate_entry(entry);
718 return err; 727 return err;
@@ -743,23 +752,26 @@ static int fuse_rmdir(struct inode *dir, struct dentry *entry)
743 return err; 752 return err;
744} 753}
745 754
746static int fuse_rename(struct inode *olddir, struct dentry *oldent, 755static int fuse_rename_common(struct inode *olddir, struct dentry *oldent,
747 struct inode *newdir, struct dentry *newent) 756 struct inode *newdir, struct dentry *newent,
757 unsigned int flags, int opcode, size_t argsize)
748{ 758{
749 int err; 759 int err;
750 struct fuse_rename_in inarg; 760 struct fuse_rename2_in inarg;
751 struct fuse_conn *fc = get_fuse_conn(olddir); 761 struct fuse_conn *fc = get_fuse_conn(olddir);
752 struct fuse_req *req = fuse_get_req_nopages(fc); 762 struct fuse_req *req;
753 763
764 req = fuse_get_req_nopages(fc);
754 if (IS_ERR(req)) 765 if (IS_ERR(req))
755 return PTR_ERR(req); 766 return PTR_ERR(req);
756 767
757 memset(&inarg, 0, sizeof(inarg)); 768 memset(&inarg, 0, argsize);
758 inarg.newdir = get_node_id(newdir); 769 inarg.newdir = get_node_id(newdir);
759 req->in.h.opcode = FUSE_RENAME; 770 inarg.flags = flags;
771 req->in.h.opcode = opcode;
760 req->in.h.nodeid = get_node_id(olddir); 772 req->in.h.nodeid = get_node_id(olddir);
761 req->in.numargs = 3; 773 req->in.numargs = 3;
762 req->in.args[0].size = sizeof(inarg); 774 req->in.args[0].size = argsize;
763 req->in.args[0].value = &inarg; 775 req->in.args[0].value = &inarg;
764 req->in.args[1].size = oldent->d_name.len + 1; 776 req->in.args[1].size = oldent->d_name.len + 1;
765 req->in.args[1].value = oldent->d_name.name; 777 req->in.args[1].value = oldent->d_name.name;
@@ -771,15 +783,22 @@ static int fuse_rename(struct inode *olddir, struct dentry *oldent,
771 if (!err) { 783 if (!err) {
772 /* ctime changes */ 784 /* ctime changes */
773 fuse_invalidate_attr(oldent->d_inode); 785 fuse_invalidate_attr(oldent->d_inode);
786 fuse_update_ctime(oldent->d_inode);
787
788 if (flags & RENAME_EXCHANGE) {
789 fuse_invalidate_attr(newent->d_inode);
790 fuse_update_ctime(newent->d_inode);
791 }
774 792
775 fuse_invalidate_attr(olddir); 793 fuse_invalidate_attr(olddir);
776 if (olddir != newdir) 794 if (olddir != newdir)
777 fuse_invalidate_attr(newdir); 795 fuse_invalidate_attr(newdir);
778 796
779 /* newent will end up negative */ 797 /* newent will end up negative */
780 if (newent->d_inode) { 798 if (!(flags & RENAME_EXCHANGE) && newent->d_inode) {
781 fuse_invalidate_attr(newent->d_inode); 799 fuse_invalidate_attr(newent->d_inode);
782 fuse_invalidate_entry_cache(newent); 800 fuse_invalidate_entry_cache(newent);
801 fuse_update_ctime(newent->d_inode);
783 } 802 }
784 } else if (err == -EINTR) { 803 } else if (err == -EINTR) {
785 /* If request was interrupted, DEITY only knows if the 804 /* If request was interrupted, DEITY only knows if the
@@ -795,6 +814,36 @@ static int fuse_rename(struct inode *olddir, struct dentry *oldent,
795 return err; 814 return err;
796} 815}
797 816
817static int fuse_rename(struct inode *olddir, struct dentry *oldent,
818 struct inode *newdir, struct dentry *newent)
819{
820 return fuse_rename_common(olddir, oldent, newdir, newent, 0,
821 FUSE_RENAME, sizeof(struct fuse_rename_in));
822}
823
824static int fuse_rename2(struct inode *olddir, struct dentry *oldent,
825 struct inode *newdir, struct dentry *newent,
826 unsigned int flags)
827{
828 struct fuse_conn *fc = get_fuse_conn(olddir);
829 int err;
830
831 if (flags & ~(RENAME_NOREPLACE | RENAME_EXCHANGE))
832 return -EINVAL;
833
834 if (fc->no_rename2 || fc->minor < 23)
835 return -EINVAL;
836
837 err = fuse_rename_common(olddir, oldent, newdir, newent, flags,
838 FUSE_RENAME2, sizeof(struct fuse_rename2_in));
839 if (err == -ENOSYS) {
840 fc->no_rename2 = 1;
841 err = -EINVAL;
842 }
843 return err;
844
845}
846
798static int fuse_link(struct dentry *entry, struct inode *newdir, 847static int fuse_link(struct dentry *entry, struct inode *newdir,
799 struct dentry *newent) 848 struct dentry *newent)
800{ 849{
@@ -829,6 +878,7 @@ static int fuse_link(struct dentry *entry, struct inode *newdir,
829 inc_nlink(inode); 878 inc_nlink(inode);
830 spin_unlock(&fc->lock); 879 spin_unlock(&fc->lock);
831 fuse_invalidate_attr(inode); 880 fuse_invalidate_attr(inode);
881 fuse_update_ctime(inode);
832 } else if (err == -EINTR) { 882 } else if (err == -EINTR) {
833 fuse_invalidate_attr(inode); 883 fuse_invalidate_attr(inode);
834 } 884 }
@@ -846,6 +896,8 @@ static void fuse_fillattr(struct inode *inode, struct fuse_attr *attr,
846 attr->size = i_size_read(inode); 896 attr->size = i_size_read(inode);
847 attr->mtime = inode->i_mtime.tv_sec; 897 attr->mtime = inode->i_mtime.tv_sec;
848 attr->mtimensec = inode->i_mtime.tv_nsec; 898 attr->mtimensec = inode->i_mtime.tv_nsec;
899 attr->ctime = inode->i_ctime.tv_sec;
900 attr->ctimensec = inode->i_ctime.tv_nsec;
849 } 901 }
850 902
851 stat->dev = inode->i_sb->s_dev; 903 stat->dev = inode->i_sb->s_dev;
@@ -1504,7 +1556,7 @@ static bool update_mtime(unsigned ivalid, bool trust_local_mtime)
1504} 1556}
1505 1557
1506static void iattr_to_fattr(struct iattr *iattr, struct fuse_setattr_in *arg, 1558static void iattr_to_fattr(struct iattr *iattr, struct fuse_setattr_in *arg,
1507 bool trust_local_mtime) 1559 bool trust_local_cmtime)
1508{ 1560{
1509 unsigned ivalid = iattr->ia_valid; 1561 unsigned ivalid = iattr->ia_valid;
1510 1562
@@ -1523,13 +1575,18 @@ static void iattr_to_fattr(struct iattr *iattr, struct fuse_setattr_in *arg,
1523 if (!(ivalid & ATTR_ATIME_SET)) 1575 if (!(ivalid & ATTR_ATIME_SET))
1524 arg->valid |= FATTR_ATIME_NOW; 1576 arg->valid |= FATTR_ATIME_NOW;
1525 } 1577 }
1526 if ((ivalid & ATTR_MTIME) && update_mtime(ivalid, trust_local_mtime)) { 1578 if ((ivalid & ATTR_MTIME) && update_mtime(ivalid, trust_local_cmtime)) {
1527 arg->valid |= FATTR_MTIME; 1579 arg->valid |= FATTR_MTIME;
1528 arg->mtime = iattr->ia_mtime.tv_sec; 1580 arg->mtime = iattr->ia_mtime.tv_sec;
1529 arg->mtimensec = iattr->ia_mtime.tv_nsec; 1581 arg->mtimensec = iattr->ia_mtime.tv_nsec;
1530 if (!(ivalid & ATTR_MTIME_SET) && !trust_local_mtime) 1582 if (!(ivalid & ATTR_MTIME_SET) && !trust_local_cmtime)
1531 arg->valid |= FATTR_MTIME_NOW; 1583 arg->valid |= FATTR_MTIME_NOW;
1532 } 1584 }
1585 if ((ivalid & ATTR_CTIME) && trust_local_cmtime) {
1586 arg->valid |= FATTR_CTIME;
1587 arg->ctime = iattr->ia_ctime.tv_sec;
1588 arg->ctimensec = iattr->ia_ctime.tv_nsec;
1589 }
1533} 1590}
1534 1591
1535/* 1592/*
@@ -1597,39 +1654,38 @@ static void fuse_setattr_fill(struct fuse_conn *fc, struct fuse_req *req,
1597/* 1654/*
1598 * Flush inode->i_mtime to the server 1655 * Flush inode->i_mtime to the server
1599 */ 1656 */
1600int fuse_flush_mtime(struct file *file, bool nofail) 1657int fuse_flush_times(struct inode *inode, struct fuse_file *ff)
1601{ 1658{
1602 struct inode *inode = file->f_mapping->host;
1603 struct fuse_inode *fi = get_fuse_inode(inode);
1604 struct fuse_conn *fc = get_fuse_conn(inode); 1659 struct fuse_conn *fc = get_fuse_conn(inode);
1605 struct fuse_req *req = NULL; 1660 struct fuse_req *req;
1606 struct fuse_setattr_in inarg; 1661 struct fuse_setattr_in inarg;
1607 struct fuse_attr_out outarg; 1662 struct fuse_attr_out outarg;
1608 int err; 1663 int err;
1609 1664
1610 if (nofail) { 1665 req = fuse_get_req_nopages(fc);
1611 req = fuse_get_req_nofail_nopages(fc, file); 1666 if (IS_ERR(req))
1612 } else { 1667 return PTR_ERR(req);
1613 req = fuse_get_req_nopages(fc);
1614 if (IS_ERR(req))
1615 return PTR_ERR(req);
1616 }
1617 1668
1618 memset(&inarg, 0, sizeof(inarg)); 1669 memset(&inarg, 0, sizeof(inarg));
1619 memset(&outarg, 0, sizeof(outarg)); 1670 memset(&outarg, 0, sizeof(outarg));
1620 1671
1621 inarg.valid |= FATTR_MTIME; 1672 inarg.valid = FATTR_MTIME;
1622 inarg.mtime = inode->i_mtime.tv_sec; 1673 inarg.mtime = inode->i_mtime.tv_sec;
1623 inarg.mtimensec = inode->i_mtime.tv_nsec; 1674 inarg.mtimensec = inode->i_mtime.tv_nsec;
1624 1675 if (fc->minor >= 23) {
1676 inarg.valid |= FATTR_CTIME;
1677 inarg.ctime = inode->i_ctime.tv_sec;
1678 inarg.ctimensec = inode->i_ctime.tv_nsec;
1679 }
1680 if (ff) {
1681 inarg.valid |= FATTR_FH;
1682 inarg.fh = ff->fh;
1683 }
1625 fuse_setattr_fill(fc, req, inode, &inarg, &outarg); 1684 fuse_setattr_fill(fc, req, inode, &inarg, &outarg);
1626 fuse_request_send(fc, req); 1685 fuse_request_send(fc, req);
1627 err = req->out.h.error; 1686 err = req->out.h.error;
1628 fuse_put_request(fc, req); 1687 fuse_put_request(fc, req);
1629 1688
1630 if (!err)
1631 clear_bit(FUSE_I_MTIME_DIRTY, &fi->state);
1632
1633 return err; 1689 return err;
1634} 1690}
1635 1691
@@ -1653,7 +1709,7 @@ int fuse_do_setattr(struct inode *inode, struct iattr *attr,
1653 bool is_wb = fc->writeback_cache; 1709 bool is_wb = fc->writeback_cache;
1654 loff_t oldsize; 1710 loff_t oldsize;
1655 int err; 1711 int err;
1656 bool trust_local_mtime = is_wb && S_ISREG(inode->i_mode); 1712 bool trust_local_cmtime = is_wb && S_ISREG(inode->i_mode);
1657 1713
1658 if (!(fc->flags & FUSE_DEFAULT_PERMISSIONS)) 1714 if (!(fc->flags & FUSE_DEFAULT_PERMISSIONS))
1659 attr->ia_valid |= ATTR_FORCE; 1715 attr->ia_valid |= ATTR_FORCE;
@@ -1678,11 +1734,13 @@ int fuse_do_setattr(struct inode *inode, struct iattr *attr,
1678 if (is_truncate) { 1734 if (is_truncate) {
1679 fuse_set_nowrite(inode); 1735 fuse_set_nowrite(inode);
1680 set_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); 1736 set_bit(FUSE_I_SIZE_UNSTABLE, &fi->state);
1737 if (trust_local_cmtime && attr->ia_size != inode->i_size)
1738 attr->ia_valid |= ATTR_MTIME | ATTR_CTIME;
1681 } 1739 }
1682 1740
1683 memset(&inarg, 0, sizeof(inarg)); 1741 memset(&inarg, 0, sizeof(inarg));
1684 memset(&outarg, 0, sizeof(outarg)); 1742 memset(&outarg, 0, sizeof(outarg));
1685 iattr_to_fattr(attr, &inarg, trust_local_mtime); 1743 iattr_to_fattr(attr, &inarg, trust_local_cmtime);
1686 if (file) { 1744 if (file) {
1687 struct fuse_file *ff = file->private_data; 1745 struct fuse_file *ff = file->private_data;
1688 inarg.valid |= FATTR_FH; 1746 inarg.valid |= FATTR_FH;
@@ -1711,9 +1769,12 @@ int fuse_do_setattr(struct inode *inode, struct iattr *attr,
1711 1769
1712 spin_lock(&fc->lock); 1770 spin_lock(&fc->lock);
1713 /* the kernel maintains i_mtime locally */ 1771 /* the kernel maintains i_mtime locally */
1714 if (trust_local_mtime && (attr->ia_valid & ATTR_MTIME)) { 1772 if (trust_local_cmtime) {
1715 inode->i_mtime = attr->ia_mtime; 1773 if (attr->ia_valid & ATTR_MTIME)
1716 clear_bit(FUSE_I_MTIME_DIRTY, &fi->state); 1774 inode->i_mtime = attr->ia_mtime;
1775 if (attr->ia_valid & ATTR_CTIME)
1776 inode->i_ctime = attr->ia_ctime;
1777 /* FIXME: clear I_DIRTY_SYNC? */
1717 } 1778 }
1718 1779
1719 fuse_change_attributes_common(inode, &outarg.attr, 1780 fuse_change_attributes_common(inode, &outarg.attr,
@@ -1810,8 +1871,10 @@ static int fuse_setxattr(struct dentry *entry, const char *name,
1810 fc->no_setxattr = 1; 1871 fc->no_setxattr = 1;
1811 err = -EOPNOTSUPP; 1872 err = -EOPNOTSUPP;
1812 } 1873 }
1813 if (!err) 1874 if (!err) {
1814 fuse_invalidate_attr(inode); 1875 fuse_invalidate_attr(inode);
1876 fuse_update_ctime(inode);
1877 }
1815 return err; 1878 return err;
1816} 1879}
1817 1880
@@ -1941,20 +2004,11 @@ static int fuse_removexattr(struct dentry *entry, const char *name)
1941 fc->no_removexattr = 1; 2004 fc->no_removexattr = 1;
1942 err = -EOPNOTSUPP; 2005 err = -EOPNOTSUPP;
1943 } 2006 }
1944 if (!err) 2007 if (!err) {
1945 fuse_invalidate_attr(inode); 2008 fuse_invalidate_attr(inode);
1946 return err; 2009 fuse_update_ctime(inode);
1947}
1948
1949static int fuse_update_time(struct inode *inode, struct timespec *now,
1950 int flags)
1951{
1952 if (flags & S_MTIME) {
1953 inode->i_mtime = *now;
1954 set_bit(FUSE_I_MTIME_DIRTY, &get_fuse_inode(inode)->state);
1955 BUG_ON(!S_ISREG(inode->i_mode));
1956 } 2010 }
1957 return 0; 2011 return err;
1958} 2012}
1959 2013
1960static const struct inode_operations fuse_dir_inode_operations = { 2014static const struct inode_operations fuse_dir_inode_operations = {
@@ -1964,6 +2018,7 @@ static const struct inode_operations fuse_dir_inode_operations = {
1964 .unlink = fuse_unlink, 2018 .unlink = fuse_unlink,
1965 .rmdir = fuse_rmdir, 2019 .rmdir = fuse_rmdir,
1966 .rename = fuse_rename, 2020 .rename = fuse_rename,
2021 .rename2 = fuse_rename2,
1967 .link = fuse_link, 2022 .link = fuse_link,
1968 .setattr = fuse_setattr, 2023 .setattr = fuse_setattr,
1969 .create = fuse_create, 2024 .create = fuse_create,
@@ -1996,7 +2051,6 @@ static const struct inode_operations fuse_common_inode_operations = {
1996 .getxattr = fuse_getxattr, 2051 .getxattr = fuse_getxattr,
1997 .listxattr = fuse_listxattr, 2052 .listxattr = fuse_listxattr,
1998 .removexattr = fuse_removexattr, 2053 .removexattr = fuse_removexattr,
1999 .update_time = fuse_update_time,
2000}; 2054};
2001 2055
2002static const struct inode_operations fuse_symlink_inode_operations = { 2056static const struct inode_operations fuse_symlink_inode_operations = {
diff --git a/fs/fuse/file.c b/fs/fuse/file.c
index 13f8bdec5110..96d513e01a5d 100644
--- a/fs/fuse/file.c
+++ b/fs/fuse/file.c
@@ -223,6 +223,8 @@ void fuse_finish_open(struct inode *inode, struct file *file)
223 i_size_write(inode, 0); 223 i_size_write(inode, 0);
224 spin_unlock(&fc->lock); 224 spin_unlock(&fc->lock);
225 fuse_invalidate_attr(inode); 225 fuse_invalidate_attr(inode);
226 if (fc->writeback_cache)
227 file_update_time(file);
226 } 228 }
227 if ((file->f_mode & FMODE_WRITE) && fc->writeback_cache) 229 if ((file->f_mode & FMODE_WRITE) && fc->writeback_cache)
228 fuse_link_write_file(file); 230 fuse_link_write_file(file);
@@ -232,18 +234,26 @@ int fuse_open_common(struct inode *inode, struct file *file, bool isdir)
232{ 234{
233 struct fuse_conn *fc = get_fuse_conn(inode); 235 struct fuse_conn *fc = get_fuse_conn(inode);
234 int err; 236 int err;
237 bool lock_inode = (file->f_flags & O_TRUNC) &&
238 fc->atomic_o_trunc &&
239 fc->writeback_cache;
235 240
236 err = generic_file_open(inode, file); 241 err = generic_file_open(inode, file);
237 if (err) 242 if (err)
238 return err; 243 return err;
239 244
245 if (lock_inode)
246 mutex_lock(&inode->i_mutex);
247
240 err = fuse_do_open(fc, get_node_id(inode), file, isdir); 248 err = fuse_do_open(fc, get_node_id(inode), file, isdir);
241 if (err)
242 return err;
243 249
244 fuse_finish_open(inode, file); 250 if (!err)
251 fuse_finish_open(inode, file);
245 252
246 return 0; 253 if (lock_inode)
254 mutex_unlock(&inode->i_mutex);
255
256 return err;
247} 257}
248 258
249static void fuse_prepare_release(struct fuse_file *ff, int flags, int opcode) 259static void fuse_prepare_release(struct fuse_file *ff, int flags, int opcode)
@@ -314,10 +324,7 @@ static int fuse_release(struct inode *inode, struct file *file)
314 324
315 /* see fuse_vma_close() for !writeback_cache case */ 325 /* see fuse_vma_close() for !writeback_cache case */
316 if (fc->writeback_cache) 326 if (fc->writeback_cache)
317 filemap_write_and_wait(file->f_mapping); 327 write_inode_now(inode, 1);
318
319 if (test_bit(FUSE_I_MTIME_DIRTY, &get_fuse_inode(inode)->state))
320 fuse_flush_mtime(file, true);
321 328
322 fuse_release_common(file, FUSE_RELEASE); 329 fuse_release_common(file, FUSE_RELEASE);
323 330
@@ -439,7 +446,7 @@ static int fuse_flush(struct file *file, fl_owner_t id)
439 if (fc->no_flush) 446 if (fc->no_flush)
440 return 0; 447 return 0;
441 448
442 err = filemap_write_and_wait(file->f_mapping); 449 err = write_inode_now(inode, 1);
443 if (err) 450 if (err)
444 return err; 451 return err;
445 452
@@ -480,13 +487,6 @@ int fuse_fsync_common(struct file *file, loff_t start, loff_t end,
480 if (is_bad_inode(inode)) 487 if (is_bad_inode(inode))
481 return -EIO; 488 return -EIO;
482 489
483 err = filemap_write_and_wait_range(inode->i_mapping, start, end);
484 if (err)
485 return err;
486
487 if ((!isdir && fc->no_fsync) || (isdir && fc->no_fsyncdir))
488 return 0;
489
490 mutex_lock(&inode->i_mutex); 490 mutex_lock(&inode->i_mutex);
491 491
492 /* 492 /*
@@ -494,17 +494,17 @@ int fuse_fsync_common(struct file *file, loff_t start, loff_t end,
494 * wait for all outstanding writes, before sending the FSYNC 494 * wait for all outstanding writes, before sending the FSYNC
495 * request. 495 * request.
496 */ 496 */
497 err = write_inode_now(inode, 0); 497 err = filemap_write_and_wait_range(inode->i_mapping, start, end);
498 if (err) 498 if (err)
499 goto out; 499 goto out;
500 500
501 fuse_sync_writes(inode); 501 fuse_sync_writes(inode);
502 err = sync_inode_metadata(inode, 1);
503 if (err)
504 goto out;
502 505
503 if (test_bit(FUSE_I_MTIME_DIRTY, &get_fuse_inode(inode)->state)) { 506 if ((!isdir && fc->no_fsync) || (isdir && fc->no_fsyncdir))
504 int err = fuse_flush_mtime(file, false); 507 goto out;
505 if (err)
506 goto out;
507 }
508 508
509 req = fuse_get_req_nopages(fc); 509 req = fuse_get_req_nopages(fc);
510 if (IS_ERR(req)) { 510 if (IS_ERR(req)) {
@@ -1659,13 +1659,13 @@ static void fuse_writepage_end(struct fuse_conn *fc, struct fuse_req *req)
1659 fuse_writepage_free(fc, req); 1659 fuse_writepage_free(fc, req);
1660} 1660}
1661 1661
1662static struct fuse_file *fuse_write_file_get(struct fuse_conn *fc, 1662static struct fuse_file *__fuse_write_file_get(struct fuse_conn *fc,
1663 struct fuse_inode *fi) 1663 struct fuse_inode *fi)
1664{ 1664{
1665 struct fuse_file *ff = NULL; 1665 struct fuse_file *ff = NULL;
1666 1666
1667 spin_lock(&fc->lock); 1667 spin_lock(&fc->lock);
1668 if (!WARN_ON(list_empty(&fi->write_files))) { 1668 if (!list_empty(&fi->write_files)) {
1669 ff = list_entry(fi->write_files.next, struct fuse_file, 1669 ff = list_entry(fi->write_files.next, struct fuse_file,
1670 write_entry); 1670 write_entry);
1671 fuse_file_get(ff); 1671 fuse_file_get(ff);
@@ -1675,6 +1675,29 @@ static struct fuse_file *fuse_write_file_get(struct fuse_conn *fc,
1675 return ff; 1675 return ff;
1676} 1676}
1677 1677
1678static struct fuse_file *fuse_write_file_get(struct fuse_conn *fc,
1679 struct fuse_inode *fi)
1680{
1681 struct fuse_file *ff = __fuse_write_file_get(fc, fi);
1682 WARN_ON(!ff);
1683 return ff;
1684}
1685
1686int fuse_write_inode(struct inode *inode, struct writeback_control *wbc)
1687{
1688 struct fuse_conn *fc = get_fuse_conn(inode);
1689 struct fuse_inode *fi = get_fuse_inode(inode);
1690 struct fuse_file *ff;
1691 int err;
1692
1693 ff = __fuse_write_file_get(fc, fi);
1694 err = fuse_flush_times(inode, ff);
1695 if (ff)
1696 fuse_file_put(ff, 0);
1697
1698 return err;
1699}
1700
1678static int fuse_writepage_locked(struct page *page) 1701static int fuse_writepage_locked(struct page *page)
1679{ 1702{
1680 struct address_space *mapping = page->mapping; 1703 struct address_space *mapping = page->mapping;
@@ -2972,6 +2995,9 @@ static long fuse_file_fallocate(struct file *file, int mode, loff_t offset,
2972 bool lock_inode = !(mode & FALLOC_FL_KEEP_SIZE) || 2995 bool lock_inode = !(mode & FALLOC_FL_KEEP_SIZE) ||
2973 (mode & FALLOC_FL_PUNCH_HOLE); 2996 (mode & FALLOC_FL_PUNCH_HOLE);
2974 2997
2998 if (mode & ~(FALLOC_FL_KEEP_SIZE | FALLOC_FL_PUNCH_HOLE))
2999 return -EOPNOTSUPP;
3000
2975 if (fc->no_fallocate) 3001 if (fc->no_fallocate)
2976 return -EOPNOTSUPP; 3002 return -EOPNOTSUPP;
2977 3003
@@ -3017,12 +3043,8 @@ static long fuse_file_fallocate(struct file *file, int mode, loff_t offset,
3017 if (!(mode & FALLOC_FL_KEEP_SIZE)) { 3043 if (!(mode & FALLOC_FL_KEEP_SIZE)) {
3018 bool changed = fuse_write_update_size(inode, offset + length); 3044 bool changed = fuse_write_update_size(inode, offset + length);
3019 3045
3020 if (changed && fc->writeback_cache) { 3046 if (changed && fc->writeback_cache)
3021 struct fuse_inode *fi = get_fuse_inode(inode); 3047 file_update_time(file);
3022
3023 inode->i_mtime = current_fs_time(inode->i_sb);
3024 set_bit(FUSE_I_MTIME_DIRTY, &fi->state);
3025 }
3026 } 3048 }
3027 3049
3028 if (mode & FALLOC_FL_PUNCH_HOLE) 3050 if (mode & FALLOC_FL_PUNCH_HOLE)
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h
index a257ed8ebee6..7aa5c75e0de1 100644
--- a/fs/fuse/fuse_i.h
+++ b/fs/fuse/fuse_i.h
@@ -119,8 +119,6 @@ enum {
119 FUSE_I_INIT_RDPLUS, 119 FUSE_I_INIT_RDPLUS,
120 /** An operation changing file size is in progress */ 120 /** An operation changing file size is in progress */
121 FUSE_I_SIZE_UNSTABLE, 121 FUSE_I_SIZE_UNSTABLE,
122 /** i_mtime has been updated locally; a flush to userspace needed */
123 FUSE_I_MTIME_DIRTY,
124}; 122};
125 123
126struct fuse_conn; 124struct fuse_conn;
@@ -544,6 +542,9 @@ struct fuse_conn {
544 /** Is fallocate not implemented by fs? */ 542 /** Is fallocate not implemented by fs? */
545 unsigned no_fallocate:1; 543 unsigned no_fallocate:1;
546 544
545 /** Is rename with flags implemented by fs? */
546 unsigned no_rename2:1;
547
547 /** Use enhanced/automatic page cache invalidation. */ 548 /** Use enhanced/automatic page cache invalidation. */
548 unsigned auto_inval_data:1; 549 unsigned auto_inval_data:1;
549 550
@@ -725,7 +726,7 @@ int fuse_dev_init(void);
725void fuse_dev_cleanup(void); 726void fuse_dev_cleanup(void);
726 727
727int fuse_ctl_init(void); 728int fuse_ctl_init(void);
728void fuse_ctl_cleanup(void); 729void __exit fuse_ctl_cleanup(void);
729 730
730/** 731/**
731 * Allocate a request 732 * Allocate a request
@@ -891,7 +892,8 @@ int fuse_dev_release(struct inode *inode, struct file *file);
891 892
892bool fuse_write_update_size(struct inode *inode, loff_t pos); 893bool fuse_write_update_size(struct inode *inode, loff_t pos);
893 894
894int fuse_flush_mtime(struct file *file, bool nofail); 895int fuse_flush_times(struct inode *inode, struct fuse_file *ff);
896int fuse_write_inode(struct inode *inode, struct writeback_control *wbc);
895 897
896int fuse_do_setattr(struct inode *inode, struct iattr *attr, 898int fuse_do_setattr(struct inode *inode, struct iattr *attr,
897 struct file *file); 899 struct file *file);
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 8d611696fcad..754dcf23de8a 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -175,9 +175,9 @@ void fuse_change_attributes_common(struct inode *inode, struct fuse_attr *attr,
175 if (!fc->writeback_cache || !S_ISREG(inode->i_mode)) { 175 if (!fc->writeback_cache || !S_ISREG(inode->i_mode)) {
176 inode->i_mtime.tv_sec = attr->mtime; 176 inode->i_mtime.tv_sec = attr->mtime;
177 inode->i_mtime.tv_nsec = attr->mtimensec; 177 inode->i_mtime.tv_nsec = attr->mtimensec;
178 inode->i_ctime.tv_sec = attr->ctime;
179 inode->i_ctime.tv_nsec = attr->ctimensec;
178 } 180 }
179 inode->i_ctime.tv_sec = attr->ctime;
180 inode->i_ctime.tv_nsec = attr->ctimensec;
181 181
182 if (attr->blksize != 0) 182 if (attr->blksize != 0)
183 inode->i_blkbits = ilog2(attr->blksize); 183 inode->i_blkbits = ilog2(attr->blksize);
@@ -256,6 +256,8 @@ static void fuse_init_inode(struct inode *inode, struct fuse_attr *attr)
256 inode->i_size = attr->size; 256 inode->i_size = attr->size;
257 inode->i_mtime.tv_sec = attr->mtime; 257 inode->i_mtime.tv_sec = attr->mtime;
258 inode->i_mtime.tv_nsec = attr->mtimensec; 258 inode->i_mtime.tv_nsec = attr->mtimensec;
259 inode->i_ctime.tv_sec = attr->ctime;
260 inode->i_ctime.tv_nsec = attr->ctimensec;
259 if (S_ISREG(inode->i_mode)) { 261 if (S_ISREG(inode->i_mode)) {
260 fuse_init_common(inode); 262 fuse_init_common(inode);
261 fuse_init_file_inode(inode); 263 fuse_init_file_inode(inode);
@@ -303,7 +305,7 @@ struct inode *fuse_iget(struct super_block *sb, u64 nodeid,
303 305
304 if ((inode->i_state & I_NEW)) { 306 if ((inode->i_state & I_NEW)) {
305 inode->i_flags |= S_NOATIME; 307 inode->i_flags |= S_NOATIME;
306 if (!fc->writeback_cache || !S_ISREG(inode->i_mode)) 308 if (!fc->writeback_cache || !S_ISREG(attr->mode))
307 inode->i_flags |= S_NOCMTIME; 309 inode->i_flags |= S_NOCMTIME;
308 inode->i_generation = generation; 310 inode->i_generation = generation;
309 inode->i_data.backing_dev_info = &fc->bdi; 311 inode->i_data.backing_dev_info = &fc->bdi;
@@ -788,6 +790,7 @@ static const struct super_operations fuse_super_operations = {
788 .alloc_inode = fuse_alloc_inode, 790 .alloc_inode = fuse_alloc_inode,
789 .destroy_inode = fuse_destroy_inode, 791 .destroy_inode = fuse_destroy_inode,
790 .evict_inode = fuse_evict_inode, 792 .evict_inode = fuse_evict_inode,
793 .write_inode = fuse_write_inode,
791 .drop_inode = generic_delete_inode, 794 .drop_inode = generic_delete_inode,
792 .remount_fs = fuse_remount_fs, 795 .remount_fs = fuse_remount_fs,
793 .put_super = fuse_put_super, 796 .put_super = fuse_put_super,
@@ -890,6 +893,11 @@ static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req)
890 fc->async_dio = 1; 893 fc->async_dio = 1;
891 if (arg->flags & FUSE_WRITEBACK_CACHE) 894 if (arg->flags & FUSE_WRITEBACK_CACHE)
892 fc->writeback_cache = 1; 895 fc->writeback_cache = 1;
896 if (arg->time_gran && arg->time_gran <= 1000000000)
897 fc->sb->s_time_gran = arg->time_gran;
898 else
899 fc->sb->s_time_gran = 1000000000;
900
893 } else { 901 } else {
894 ra_pages = fc->max_read / PAGE_CACHE_SIZE; 902 ra_pages = fc->max_read / PAGE_CACHE_SIZE;
895 fc->no_lock = 1; 903 fc->no_lock = 1;
@@ -996,7 +1004,7 @@ static int fuse_fill_super(struct super_block *sb, void *data, int silent)
996 if (sb->s_flags & MS_MANDLOCK) 1004 if (sb->s_flags & MS_MANDLOCK)
997 goto err; 1005 goto err;
998 1006
999 sb->s_flags &= ~MS_NOSEC; 1007 sb->s_flags &= ~(MS_NOSEC | MS_I_VERSION);
1000 1008
1001 if (!parse_fuse_opt((char *) data, &d, is_bdev)) 1009 if (!parse_fuse_opt((char *) data, &d, is_bdev))
1002 goto err; 1010 goto err;
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 204027520937..e19d4c0cacae 100644
--- a/fs/hugetlbfs/inode.c
+++ b/fs/hugetlbfs/inode.c
@@ -1030,6 +1030,11 @@ static int __init init_hugetlbfs_fs(void)
1030 int error; 1030 int error;
1031 int i; 1031 int i;
1032 1032
1033 if (!hugepages_supported()) {
1034 pr_info("hugetlbfs: disabling because there are no supported hugepage sizes\n");
1035 return -ENOTSUPP;
1036 }
1037
1033 error = bdi_init(&hugetlbfs_backing_dev_info); 1038 error = bdi_init(&hugetlbfs_backing_dev_info);
1034 if (error) 1039 if (error)
1035 return error; 1040 return error;
diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c
index 78f3403300af..ac127cd008bf 100644
--- a/fs/kernfs/dir.c
+++ b/fs/kernfs/dir.c
@@ -232,9 +232,6 @@ static int kernfs_link_sibling(struct kernfs_node *kn)
232 struct rb_node **node = &kn->parent->dir.children.rb_node; 232 struct rb_node **node = &kn->parent->dir.children.rb_node;
233 struct rb_node *parent = NULL; 233 struct rb_node *parent = NULL;
234 234
235 if (kernfs_type(kn) == KERNFS_DIR)
236 kn->parent->dir.subdirs++;
237
238 while (*node) { 235 while (*node) {
239 struct kernfs_node *pos; 236 struct kernfs_node *pos;
240 int result; 237 int result;
@@ -249,9 +246,15 @@ static int kernfs_link_sibling(struct kernfs_node *kn)
249 else 246 else
250 return -EEXIST; 247 return -EEXIST;
251 } 248 }
249
252 /* add new node and rebalance the tree */ 250 /* add new node and rebalance the tree */
253 rb_link_node(&kn->rb, parent, node); 251 rb_link_node(&kn->rb, parent, node);
254 rb_insert_color(&kn->rb, &kn->parent->dir.children); 252 rb_insert_color(&kn->rb, &kn->parent->dir.children);
253
254 /* successfully added, account subdir number */
255 if (kernfs_type(kn) == KERNFS_DIR)
256 kn->parent->dir.subdirs++;
257
255 return 0; 258 return 0;
256} 259}
257 260
diff --git a/fs/kernfs/file.c b/fs/kernfs/file.c
index 8034706a7af8..e01ea4a14a01 100644
--- a/fs/kernfs/file.c
+++ b/fs/kernfs/file.c
@@ -484,6 +484,8 @@ static int kernfs_fop_mmap(struct file *file, struct vm_area_struct *vma)
484 484
485 ops = kernfs_ops(of->kn); 485 ops = kernfs_ops(of->kn);
486 rc = ops->mmap(of, vma); 486 rc = ops->mmap(of, vma);
487 if (rc)
488 goto out_put;
487 489
488 /* 490 /*
489 * PowerPC's pci_mmap of legacy_mem uses shmem_zero_setup() 491 * PowerPC's pci_mmap of legacy_mem uses shmem_zero_setup()
diff --git a/fs/kernfs/inode.c b/fs/kernfs/inode.c
index abb0f1f53d93..985217626e66 100644
--- a/fs/kernfs/inode.c
+++ b/fs/kernfs/inode.c
@@ -48,14 +48,18 @@ void __init kernfs_inode_init(void)
48 48
49static struct kernfs_iattrs *kernfs_iattrs(struct kernfs_node *kn) 49static struct kernfs_iattrs *kernfs_iattrs(struct kernfs_node *kn)
50{ 50{
51 static DEFINE_MUTEX(iattr_mutex);
52 struct kernfs_iattrs *ret;
51 struct iattr *iattrs; 53 struct iattr *iattrs;
52 54
55 mutex_lock(&iattr_mutex);
56
53 if (kn->iattr) 57 if (kn->iattr)
54 return kn->iattr; 58 goto out_unlock;
55 59
56 kn->iattr = kzalloc(sizeof(struct kernfs_iattrs), GFP_KERNEL); 60 kn->iattr = kzalloc(sizeof(struct kernfs_iattrs), GFP_KERNEL);
57 if (!kn->iattr) 61 if (!kn->iattr)
58 return NULL; 62 goto out_unlock;
59 iattrs = &kn->iattr->ia_iattr; 63 iattrs = &kn->iattr->ia_iattr;
60 64
61 /* assign default attributes */ 65 /* assign default attributes */
@@ -65,8 +69,10 @@ static struct kernfs_iattrs *kernfs_iattrs(struct kernfs_node *kn)
65 iattrs->ia_atime = iattrs->ia_mtime = iattrs->ia_ctime = CURRENT_TIME; 69 iattrs->ia_atime = iattrs->ia_mtime = iattrs->ia_ctime = CURRENT_TIME;
66 70
67 simple_xattrs_init(&kn->iattr->xattrs); 71 simple_xattrs_init(&kn->iattr->xattrs);
68 72out_unlock:
69 return kn->iattr; 73 ret = kn->iattr;
74 mutex_unlock(&iattr_mutex);
75 return ret;
70} 76}
71 77
72static int __kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr) 78static int __kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr)
diff --git a/fs/locks.c b/fs/locks.c
index 13fc7a6d380a..e663aeac579e 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -135,7 +135,7 @@
135#define IS_POSIX(fl) (fl->fl_flags & FL_POSIX) 135#define IS_POSIX(fl) (fl->fl_flags & FL_POSIX)
136#define IS_FLOCK(fl) (fl->fl_flags & FL_FLOCK) 136#define IS_FLOCK(fl) (fl->fl_flags & FL_FLOCK)
137#define IS_LEASE(fl) (fl->fl_flags & (FL_LEASE|FL_DELEG)) 137#define IS_LEASE(fl) (fl->fl_flags & (FL_LEASE|FL_DELEG))
138#define IS_FILE_PVT(fl) (fl->fl_flags & FL_FILE_PVT) 138#define IS_OFDLCK(fl) (fl->fl_flags & FL_OFDLCK)
139 139
140static bool lease_breaking(struct file_lock *fl) 140static bool lease_breaking(struct file_lock *fl)
141{ 141{
@@ -564,7 +564,7 @@ static void __locks_insert_block(struct file_lock *blocker,
564 BUG_ON(!list_empty(&waiter->fl_block)); 564 BUG_ON(!list_empty(&waiter->fl_block));
565 waiter->fl_next = blocker; 565 waiter->fl_next = blocker;
566 list_add_tail(&waiter->fl_block, &blocker->fl_block); 566 list_add_tail(&waiter->fl_block, &blocker->fl_block);
567 if (IS_POSIX(blocker) && !IS_FILE_PVT(blocker)) 567 if (IS_POSIX(blocker) && !IS_OFDLCK(blocker))
568 locks_insert_global_blocked(waiter); 568 locks_insert_global_blocked(waiter);
569} 569}
570 570
@@ -759,12 +759,12 @@ EXPORT_SYMBOL(posix_test_lock);
759 * of tasks (such as posix threads) sharing the same open file table. 759 * of tasks (such as posix threads) sharing the same open file table.
760 * To handle those cases, we just bail out after a few iterations. 760 * To handle those cases, we just bail out after a few iterations.
761 * 761 *
762 * For FL_FILE_PVT locks, the owner is the filp, not the files_struct. 762 * For FL_OFDLCK locks, the owner is the filp, not the files_struct.
763 * Because the owner is not even nominally tied to a thread of 763 * Because the owner is not even nominally tied to a thread of
764 * execution, the deadlock detection below can't reasonably work well. Just 764 * execution, the deadlock detection below can't reasonably work well. Just
765 * skip it for those. 765 * skip it for those.
766 * 766 *
767 * In principle, we could do a more limited deadlock detection on FL_FILE_PVT 767 * In principle, we could do a more limited deadlock detection on FL_OFDLCK
768 * locks that just checks for the case where two tasks are attempting to 768 * locks that just checks for the case where two tasks are attempting to
769 * upgrade from read to write locks on the same inode. 769 * upgrade from read to write locks on the same inode.
770 */ 770 */
@@ -791,9 +791,9 @@ static int posix_locks_deadlock(struct file_lock *caller_fl,
791 791
792 /* 792 /*
793 * This deadlock detector can't reasonably detect deadlocks with 793 * This deadlock detector can't reasonably detect deadlocks with
794 * FL_FILE_PVT locks, since they aren't owned by a process, per-se. 794 * FL_OFDLCK locks, since they aren't owned by a process, per-se.
795 */ 795 */
796 if (IS_FILE_PVT(caller_fl)) 796 if (IS_OFDLCK(caller_fl))
797 return 0; 797 return 0;
798 798
799 while ((block_fl = what_owner_is_waiting_for(block_fl))) { 799 while ((block_fl = what_owner_is_waiting_for(block_fl))) {
@@ -1391,11 +1391,10 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type)
1391 1391
1392restart: 1392restart:
1393 break_time = flock->fl_break_time; 1393 break_time = flock->fl_break_time;
1394 if (break_time != 0) { 1394 if (break_time != 0)
1395 break_time -= jiffies; 1395 break_time -= jiffies;
1396 if (break_time == 0) 1396 if (break_time == 0)
1397 break_time++; 1397 break_time++;
1398 }
1399 locks_insert_block(flock, new_fl); 1398 locks_insert_block(flock, new_fl);
1400 spin_unlock(&inode->i_lock); 1399 spin_unlock(&inode->i_lock);
1401 error = wait_event_interruptible_timeout(new_fl->fl_wait, 1400 error = wait_event_interruptible_timeout(new_fl->fl_wait,
@@ -1891,7 +1890,7 @@ EXPORT_SYMBOL_GPL(vfs_test_lock);
1891 1890
1892static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl) 1891static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl)
1893{ 1892{
1894 flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid; 1893 flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid;
1895#if BITS_PER_LONG == 32 1894#if BITS_PER_LONG == 32
1896 /* 1895 /*
1897 * Make sure we can represent the posix lock via 1896 * Make sure we can represent the posix lock via
@@ -1913,7 +1912,7 @@ static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl)
1913#if BITS_PER_LONG == 32 1912#if BITS_PER_LONG == 32
1914static void posix_lock_to_flock64(struct flock64 *flock, struct file_lock *fl) 1913static void posix_lock_to_flock64(struct flock64 *flock, struct file_lock *fl)
1915{ 1914{
1916 flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid; 1915 flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid;
1917 flock->l_start = fl->fl_start; 1916 flock->l_start = fl->fl_start;
1918 flock->l_len = fl->fl_end == OFFSET_MAX ? 0 : 1917 flock->l_len = fl->fl_end == OFFSET_MAX ? 0 :
1919 fl->fl_end - fl->fl_start + 1; 1918 fl->fl_end - fl->fl_start + 1;
@@ -1942,13 +1941,13 @@ int fcntl_getlk(struct file *filp, unsigned int cmd, struct flock __user *l)
1942 if (error) 1941 if (error)
1943 goto out; 1942 goto out;
1944 1943
1945 if (cmd == F_GETLKP) { 1944 if (cmd == F_OFD_GETLK) {
1946 error = -EINVAL; 1945 error = -EINVAL;
1947 if (flock.l_pid != 0) 1946 if (flock.l_pid != 0)
1948 goto out; 1947 goto out;
1949 1948
1950 cmd = F_GETLK; 1949 cmd = F_GETLK;
1951 file_lock.fl_flags |= FL_FILE_PVT; 1950 file_lock.fl_flags |= FL_OFDLCK;
1952 file_lock.fl_owner = (fl_owner_t)filp; 1951 file_lock.fl_owner = (fl_owner_t)filp;
1953 } 1952 }
1954 1953
@@ -2074,25 +2073,25 @@ again:
2074 2073
2075 /* 2074 /*
2076 * If the cmd is requesting file-private locks, then set the 2075 * If the cmd is requesting file-private locks, then set the
2077 * FL_FILE_PVT flag and override the owner. 2076 * FL_OFDLCK flag and override the owner.
2078 */ 2077 */
2079 switch (cmd) { 2078 switch (cmd) {
2080 case F_SETLKP: 2079 case F_OFD_SETLK:
2081 error = -EINVAL; 2080 error = -EINVAL;
2082 if (flock.l_pid != 0) 2081 if (flock.l_pid != 0)
2083 goto out; 2082 goto out;
2084 2083
2085 cmd = F_SETLK; 2084 cmd = F_SETLK;
2086 file_lock->fl_flags |= FL_FILE_PVT; 2085 file_lock->fl_flags |= FL_OFDLCK;
2087 file_lock->fl_owner = (fl_owner_t)filp; 2086 file_lock->fl_owner = (fl_owner_t)filp;
2088 break; 2087 break;
2089 case F_SETLKPW: 2088 case F_OFD_SETLKW:
2090 error = -EINVAL; 2089 error = -EINVAL;
2091 if (flock.l_pid != 0) 2090 if (flock.l_pid != 0)
2092 goto out; 2091 goto out;
2093 2092
2094 cmd = F_SETLKW; 2093 cmd = F_SETLKW;
2095 file_lock->fl_flags |= FL_FILE_PVT; 2094 file_lock->fl_flags |= FL_OFDLCK;
2096 file_lock->fl_owner = (fl_owner_t)filp; 2095 file_lock->fl_owner = (fl_owner_t)filp;
2097 /* Fallthrough */ 2096 /* Fallthrough */
2098 case F_SETLKW: 2097 case F_SETLKW:
@@ -2144,13 +2143,13 @@ int fcntl_getlk64(struct file *filp, unsigned int cmd, struct flock64 __user *l)
2144 if (error) 2143 if (error)
2145 goto out; 2144 goto out;
2146 2145
2147 if (cmd == F_GETLKP) { 2146 if (cmd == F_OFD_GETLK) {
2148 error = -EINVAL; 2147 error = -EINVAL;
2149 if (flock.l_pid != 0) 2148 if (flock.l_pid != 0)
2150 goto out; 2149 goto out;
2151 2150
2152 cmd = F_GETLK64; 2151 cmd = F_GETLK64;
2153 file_lock.fl_flags |= FL_FILE_PVT; 2152 file_lock.fl_flags |= FL_OFDLCK;
2154 file_lock.fl_owner = (fl_owner_t)filp; 2153 file_lock.fl_owner = (fl_owner_t)filp;
2155 } 2154 }
2156 2155
@@ -2209,25 +2208,25 @@ again:
2209 2208
2210 /* 2209 /*
2211 * If the cmd is requesting file-private locks, then set the 2210 * If the cmd is requesting file-private locks, then set the
2212 * FL_FILE_PVT flag and override the owner. 2211 * FL_OFDLCK flag and override the owner.
2213 */ 2212 */
2214 switch (cmd) { 2213 switch (cmd) {
2215 case F_SETLKP: 2214 case F_OFD_SETLK:
2216 error = -EINVAL; 2215 error = -EINVAL;
2217 if (flock.l_pid != 0) 2216 if (flock.l_pid != 0)
2218 goto out; 2217 goto out;
2219 2218
2220 cmd = F_SETLK64; 2219 cmd = F_SETLK64;
2221 file_lock->fl_flags |= FL_FILE_PVT; 2220 file_lock->fl_flags |= FL_OFDLCK;
2222 file_lock->fl_owner = (fl_owner_t)filp; 2221 file_lock->fl_owner = (fl_owner_t)filp;
2223 break; 2222 break;
2224 case F_SETLKPW: 2223 case F_OFD_SETLKW:
2225 error = -EINVAL; 2224 error = -EINVAL;
2226 if (flock.l_pid != 0) 2225 if (flock.l_pid != 0)
2227 goto out; 2226 goto out;
2228 2227
2229 cmd = F_SETLKW64; 2228 cmd = F_SETLKW64;
2230 file_lock->fl_flags |= FL_FILE_PVT; 2229 file_lock->fl_flags |= FL_OFDLCK;
2231 file_lock->fl_owner = (fl_owner_t)filp; 2230 file_lock->fl_owner = (fl_owner_t)filp;
2232 /* Fallthrough */ 2231 /* Fallthrough */
2233 case F_SETLKW64: 2232 case F_SETLKW64:
@@ -2413,8 +2412,8 @@ static void lock_get_status(struct seq_file *f, struct file_lock *fl,
2413 if (IS_POSIX(fl)) { 2412 if (IS_POSIX(fl)) {
2414 if (fl->fl_flags & FL_ACCESS) 2413 if (fl->fl_flags & FL_ACCESS)
2415 seq_printf(f, "ACCESS"); 2414 seq_printf(f, "ACCESS");
2416 else if (IS_FILE_PVT(fl)) 2415 else if (IS_OFDLCK(fl))
2417 seq_printf(f, "FLPVT "); 2416 seq_printf(f, "OFDLCK");
2418 else 2417 else
2419 seq_printf(f, "POSIX "); 2418 seq_printf(f, "POSIX ");
2420 2419
diff --git a/fs/namei.c b/fs/namei.c
index c6157c894fce..80168273396b 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1542,7 +1542,7 @@ static inline int walk_component(struct nameidata *nd, struct path *path,
1542 inode = path->dentry->d_inode; 1542 inode = path->dentry->d_inode;
1543 } 1543 }
1544 err = -ENOENT; 1544 err = -ENOENT;
1545 if (!inode) 1545 if (!inode || d_is_negative(path->dentry))
1546 goto out_path_put; 1546 goto out_path_put;
1547 1547
1548 if (should_follow_link(path->dentry, follow)) { 1548 if (should_follow_link(path->dentry, follow)) {
@@ -2249,7 +2249,7 @@ mountpoint_last(struct nameidata *nd, struct path *path)
2249 mutex_unlock(&dir->d_inode->i_mutex); 2249 mutex_unlock(&dir->d_inode->i_mutex);
2250 2250
2251done: 2251done:
2252 if (!dentry->d_inode) { 2252 if (!dentry->d_inode || d_is_negative(dentry)) {
2253 error = -ENOENT; 2253 error = -ENOENT;
2254 dput(dentry); 2254 dput(dentry);
2255 goto out; 2255 goto out;
@@ -2994,7 +2994,7 @@ retry_lookup:
2994finish_lookup: 2994finish_lookup:
2995 /* we _can_ be in RCU mode here */ 2995 /* we _can_ be in RCU mode here */
2996 error = -ENOENT; 2996 error = -ENOENT;
2997 if (d_is_negative(path->dentry)) { 2997 if (!inode || d_is_negative(path->dentry)) {
2998 path_to_nameidata(path, nd); 2998 path_to_nameidata(path, nd);
2999 goto out; 2999 goto out;
3000 } 3000 }
diff --git a/fs/nfsd/nfs4callback.c b/fs/nfsd/nfs4callback.c
index 39c8ef875f91..2c73cae9899d 100644
--- a/fs/nfsd/nfs4callback.c
+++ b/fs/nfsd/nfs4callback.c
@@ -654,9 +654,11 @@ static struct rpc_clnt *create_backchannel_client(struct rpc_create_args *args)
654 654
655static int setup_callback_client(struct nfs4_client *clp, struct nfs4_cb_conn *conn, struct nfsd4_session *ses) 655static int setup_callback_client(struct nfs4_client *clp, struct nfs4_cb_conn *conn, struct nfsd4_session *ses)
656{ 656{
657 int maxtime = max_cb_time(clp->net);
657 struct rpc_timeout timeparms = { 658 struct rpc_timeout timeparms = {
658 .to_initval = max_cb_time(clp->net), 659 .to_initval = maxtime,
659 .to_retries = 0, 660 .to_retries = 0,
661 .to_maxval = maxtime,
660 }; 662 };
661 struct rpc_create_args args = { 663 struct rpc_create_args args = {
662 .net = clp->net, 664 .net = clp->net,
diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 2723c1badd01..18881f34737a 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -3627,14 +3627,6 @@ nfsd4_encode_operation(struct nfsd4_compoundres *resp, struct nfsd4_op *op)
3627 /* nfsd4_check_resp_size guarantees enough room for error status */ 3627 /* nfsd4_check_resp_size guarantees enough room for error status */
3628 if (!op->status) 3628 if (!op->status)
3629 op->status = nfsd4_check_resp_size(resp, 0); 3629 op->status = nfsd4_check_resp_size(resp, 0);
3630 if (op->status == nfserr_resource && nfsd4_has_session(&resp->cstate)) {
3631 struct nfsd4_slot *slot = resp->cstate.slot;
3632
3633 if (slot->sl_flags & NFSD4_SLOT_CACHETHIS)
3634 op->status = nfserr_rep_too_big_to_cache;
3635 else
3636 op->status = nfserr_rep_too_big;
3637 }
3638 if (so) { 3630 if (so) {
3639 so->so_replay.rp_status = op->status; 3631 so->so_replay.rp_status = op->status;
3640 so->so_replay.rp_buflen = (char *)resp->p - (char *)(statp+1); 3632 so->so_replay.rp_buflen = (char *)resp->p - (char *)(statp+1);
diff --git a/fs/notify/fanotify/fanotify_user.c b/fs/notify/fanotify/fanotify_user.c
index 4e565c814309..732648b270dc 100644
--- a/fs/notify/fanotify/fanotify_user.c
+++ b/fs/notify/fanotify/fanotify_user.c
@@ -698,6 +698,8 @@ SYSCALL_DEFINE2(fanotify_init, unsigned int, flags, unsigned int, event_f_flags)
698 } 698 }
699 group->overflow_event = &oevent->fse; 699 group->overflow_event = &oevent->fse;
700 700
701 if (force_o_largefile())
702 event_f_flags |= O_LARGEFILE;
701 group->fanotify_data.f_flags = event_f_flags; 703 group->fanotify_data.f_flags = event_f_flags;
702#ifdef CONFIG_FANOTIFY_ACCESS_PERMISSIONS 704#ifdef CONFIG_FANOTIFY_ACCESS_PERMISSIONS
703 spin_lock_init(&group->fanotify_data.access_lock); 705 spin_lock_init(&group->fanotify_data.access_lock);
diff --git a/fs/open.c b/fs/open.c
index 3d30eb1fc95e..9d64679cec73 100644
--- a/fs/open.c
+++ b/fs/open.c
@@ -254,17 +254,22 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
254 return -EBADF; 254 return -EBADF;
255 255
256 /* 256 /*
257 * It's not possible to punch hole or perform collapse range 257 * We can only allow pure fallocate on append only files
258 * on append only file
259 */ 258 */
260 if (mode & (FALLOC_FL_PUNCH_HOLE | FALLOC_FL_COLLAPSE_RANGE) 259 if ((mode & ~FALLOC_FL_KEEP_SIZE) && IS_APPEND(inode))
261 && IS_APPEND(inode))
262 return -EPERM; 260 return -EPERM;
263 261
264 if (IS_IMMUTABLE(inode)) 262 if (IS_IMMUTABLE(inode))
265 return -EPERM; 263 return -EPERM;
266 264
267 /* 265 /*
266 * We can not allow to do any fallocate operation on an active
267 * swapfile
268 */
269 if (IS_SWAPFILE(inode))
270 ret = -ETXTBSY;
271
272 /*
268 * Revalidate the write permissions, in case security policy has 273 * Revalidate the write permissions, in case security policy has
269 * changed since the files were opened. 274 * changed since the files were opened.
270 */ 275 */
@@ -286,14 +291,6 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
286 if (((offset + len) > inode->i_sb->s_maxbytes) || ((offset + len) < 0)) 291 if (((offset + len) > inode->i_sb->s_maxbytes) || ((offset + len) < 0))
287 return -EFBIG; 292 return -EFBIG;
288 293
289 /*
290 * There is no need to overlap collapse range with EOF, in which case
291 * it is effectively a truncate operation
292 */
293 if ((mode & FALLOC_FL_COLLAPSE_RANGE) &&
294 (offset + len >= i_size_read(inode)))
295 return -EINVAL;
296
297 if (!file->f_op->fallocate) 294 if (!file->f_op->fallocate)
298 return -EOPNOTSUPP; 295 return -EOPNOTSUPP;
299 296
diff --git a/fs/posix_acl.c b/fs/posix_acl.c
index 9e363e41dacc..0855f772cd41 100644
--- a/fs/posix_acl.c
+++ b/fs/posix_acl.c
@@ -246,6 +246,12 @@ posix_acl_equiv_mode(const struct posix_acl *acl, umode_t *mode_p)
246 umode_t mode = 0; 246 umode_t mode = 0;
247 int not_equiv = 0; 247 int not_equiv = 0;
248 248
249 /*
250 * A null ACL can always be presented as mode bits.
251 */
252 if (!acl)
253 return 0;
254
249 FOREACH_ACL_ENTRY(pa, acl, pe) { 255 FOREACH_ACL_ENTRY(pa, acl, pe) {
250 switch (pa->e_tag) { 256 switch (pa->e_tag) {
251 case ACL_USER_OBJ: 257 case ACL_USER_OBJ:
diff --git a/fs/super.c b/fs/super.c
index e9dc3c3fe159..48377f7463c0 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -800,7 +800,10 @@ void emergency_remount(void)
800 800
801static DEFINE_IDA(unnamed_dev_ida); 801static DEFINE_IDA(unnamed_dev_ida);
802static DEFINE_SPINLOCK(unnamed_dev_lock);/* protects the above */ 802static DEFINE_SPINLOCK(unnamed_dev_lock);/* protects the above */
803static int unnamed_dev_start = 0; /* don't bother trying below it */ 803/* Many userspace utilities consider an FSID of 0 invalid.
804 * Always return at least 1 from get_anon_bdev.
805 */
806static int unnamed_dev_start = 1;
804 807
805int get_anon_bdev(dev_t *p) 808int get_anon_bdev(dev_t *p)
806{ 809{
diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c
index 1b8b91b67fdb..28cc1acd5439 100644
--- a/fs/sysfs/file.c
+++ b/fs/sysfs/file.c
@@ -453,95 +453,3 @@ void sysfs_remove_bin_file(struct kobject *kobj,
453 kernfs_remove_by_name(kobj->sd, attr->attr.name); 453 kernfs_remove_by_name(kobj->sd, attr->attr.name);
454} 454}
455EXPORT_SYMBOL_GPL(sysfs_remove_bin_file); 455EXPORT_SYMBOL_GPL(sysfs_remove_bin_file);
456
457struct sysfs_schedule_callback_struct {
458 struct list_head workq_list;
459 struct kobject *kobj;
460 void (*func)(void *);
461 void *data;
462 struct module *owner;
463 struct work_struct work;
464};
465
466static struct workqueue_struct *sysfs_workqueue;
467static DEFINE_MUTEX(sysfs_workq_mutex);
468static LIST_HEAD(sysfs_workq);
469static void sysfs_schedule_callback_work(struct work_struct *work)
470{
471 struct sysfs_schedule_callback_struct *ss = container_of(work,
472 struct sysfs_schedule_callback_struct, work);
473
474 (ss->func)(ss->data);
475 kobject_put(ss->kobj);
476 module_put(ss->owner);
477 mutex_lock(&sysfs_workq_mutex);
478 list_del(&ss->workq_list);
479 mutex_unlock(&sysfs_workq_mutex);
480 kfree(ss);
481}
482
483/**
484 * sysfs_schedule_callback - helper to schedule a callback for a kobject
485 * @kobj: object we're acting for.
486 * @func: callback function to invoke later.
487 * @data: argument to pass to @func.
488 * @owner: module owning the callback code
489 *
490 * sysfs attribute methods must not unregister themselves or their parent
491 * kobject (which would amount to the same thing). Attempts to do so will
492 * deadlock, since unregistration is mutually exclusive with driver
493 * callbacks.
494 *
495 * Instead methods can call this routine, which will attempt to allocate
496 * and schedule a workqueue request to call back @func with @data as its
497 * argument in the workqueue's process context. @kobj will be pinned
498 * until @func returns.
499 *
500 * Returns 0 if the request was submitted, -ENOMEM if storage could not
501 * be allocated, -ENODEV if a reference to @owner isn't available,
502 * -EAGAIN if a callback has already been scheduled for @kobj.
503 */
504int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
505 void *data, struct module *owner)
506{
507 struct sysfs_schedule_callback_struct *ss, *tmp;
508
509 if (!try_module_get(owner))
510 return -ENODEV;
511
512 mutex_lock(&sysfs_workq_mutex);
513 list_for_each_entry_safe(ss, tmp, &sysfs_workq, workq_list)
514 if (ss->kobj == kobj) {
515 module_put(owner);
516 mutex_unlock(&sysfs_workq_mutex);
517 return -EAGAIN;
518 }
519 mutex_unlock(&sysfs_workq_mutex);
520
521 if (sysfs_workqueue == NULL) {
522 sysfs_workqueue = create_singlethread_workqueue("sysfsd");
523 if (sysfs_workqueue == NULL) {
524 module_put(owner);
525 return -ENOMEM;
526 }
527 }
528
529 ss = kmalloc(sizeof(*ss), GFP_KERNEL);
530 if (!ss) {
531 module_put(owner);
532 return -ENOMEM;
533 }
534 kobject_get(kobj);
535 ss->kobj = kobj;
536 ss->func = func;
537 ss->data = data;
538 ss->owner = owner;
539 INIT_WORK(&ss->work, sysfs_schedule_callback_work);
540 INIT_LIST_HEAD(&ss->workq_list);
541 mutex_lock(&sysfs_workq_mutex);
542 list_add_tail(&ss->workq_list, &sysfs_workq);
543 mutex_unlock(&sysfs_workq_mutex);
544 queue_work(sysfs_workqueue, &ss->work);
545 return 0;
546}
547EXPORT_SYMBOL_GPL(sysfs_schedule_callback);
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index a1266089eca1..a81c7b556896 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -1556,7 +1556,7 @@ static int ubifs_remount_rw(struct ubifs_info *c)
1556 if (c->space_fixup) { 1556 if (c->space_fixup) {
1557 err = ubifs_fixup_free_space(c); 1557 err = ubifs_fixup_free_space(c);
1558 if (err) 1558 if (err)
1559 return err; 1559 goto out;
1560 } 1560 }
1561 1561
1562 err = check_free_space(c); 1562 err = check_free_space(c);
diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c
index 75df77d09f75..0479c32c5eb1 100644
--- a/fs/xfs/xfs_aops.c
+++ b/fs/xfs/xfs_aops.c
@@ -1344,6 +1344,14 @@ __xfs_get_blocks(
1344 /* 1344 /*
1345 * If this is O_DIRECT or the mpage code calling tell them how large 1345 * If this is O_DIRECT or the mpage code calling tell them how large
1346 * the mapping is, so that we can avoid repeated get_blocks calls. 1346 * the mapping is, so that we can avoid repeated get_blocks calls.
1347 *
1348 * If the mapping spans EOF, then we have to break the mapping up as the
1349 * mapping for blocks beyond EOF must be marked new so that sub block
1350 * regions can be correctly zeroed. We can't do this for mappings within
1351 * EOF unless the mapping was just allocated or is unwritten, otherwise
1352 * the callers would overwrite existing data with zeros. Hence we have
1353 * to split the mapping into a range up to and including EOF, and a
1354 * second mapping for beyond EOF.
1347 */ 1355 */
1348 if (direct || size > (1 << inode->i_blkbits)) { 1356 if (direct || size > (1 << inode->i_blkbits)) {
1349 xfs_off_t mapping_size; 1357 xfs_off_t mapping_size;
@@ -1354,6 +1362,12 @@ __xfs_get_blocks(
1354 ASSERT(mapping_size > 0); 1362 ASSERT(mapping_size > 0);
1355 if (mapping_size > size) 1363 if (mapping_size > size)
1356 mapping_size = size; 1364 mapping_size = size;
1365 if (offset < i_size_read(inode) &&
1366 offset + mapping_size >= i_size_read(inode)) {
1367 /* limit mapping to block that spans EOF */
1368 mapping_size = roundup_64(i_size_read(inode) - offset,
1369 1 << inode->i_blkbits);
1370 }
1357 if (mapping_size > LONG_MAX) 1371 if (mapping_size > LONG_MAX)
1358 mapping_size = LONG_MAX; 1372 mapping_size = LONG_MAX;
1359 1373
@@ -1566,6 +1580,16 @@ xfs_vm_write_failed(
1566 1580
1567 xfs_vm_kill_delalloc_range(inode, block_offset, 1581 xfs_vm_kill_delalloc_range(inode, block_offset,
1568 block_offset + bh->b_size); 1582 block_offset + bh->b_size);
1583
1584 /*
1585 * This buffer does not contain data anymore. make sure anyone
1586 * who finds it knows that for certain.
1587 */
1588 clear_buffer_delay(bh);
1589 clear_buffer_uptodate(bh);
1590 clear_buffer_mapped(bh);
1591 clear_buffer_new(bh);
1592 clear_buffer_dirty(bh);
1569 } 1593 }
1570 1594
1571} 1595}
@@ -1599,12 +1623,21 @@ xfs_vm_write_begin(
1599 status = __block_write_begin(page, pos, len, xfs_get_blocks); 1623 status = __block_write_begin(page, pos, len, xfs_get_blocks);
1600 if (unlikely(status)) { 1624 if (unlikely(status)) {
1601 struct inode *inode = mapping->host; 1625 struct inode *inode = mapping->host;
1626 size_t isize = i_size_read(inode);
1602 1627
1603 xfs_vm_write_failed(inode, page, pos, len); 1628 xfs_vm_write_failed(inode, page, pos, len);
1604 unlock_page(page); 1629 unlock_page(page);
1605 1630
1606 if (pos + len > i_size_read(inode)) 1631 /*
1607 truncate_pagecache(inode, i_size_read(inode)); 1632 * If the write is beyond EOF, we only want to kill blocks
1633 * allocated in this write, not blocks that were previously
1634 * written successfully.
1635 */
1636 if (pos + len > isize) {
1637 ssize_t start = max_t(ssize_t, pos, isize);
1638
1639 truncate_pagecache_range(inode, start, pos + len);
1640 }
1608 1641
1609 page_cache_release(page); 1642 page_cache_release(page);
1610 page = NULL; 1643 page = NULL;
@@ -1615,9 +1648,12 @@ xfs_vm_write_begin(
1615} 1648}
1616 1649
1617/* 1650/*
1618 * On failure, we only need to kill delalloc blocks beyond EOF because they 1651 * On failure, we only need to kill delalloc blocks beyond EOF in the range of
1619 * will never be written. For blocks within EOF, generic_write_end() zeros them 1652 * this specific write because they will never be written. Previous writes
1620 * so they are safe to leave alone and be written with all the other valid data. 1653 * beyond EOF where block allocation succeeded do not need to be trashed, so
1654 * only new blocks from this write should be trashed. For blocks within
1655 * EOF, generic_write_end() zeros them so they are safe to leave alone and be
1656 * written with all the other valid data.
1621 */ 1657 */
1622STATIC int 1658STATIC int
1623xfs_vm_write_end( 1659xfs_vm_write_end(
@@ -1640,8 +1676,11 @@ xfs_vm_write_end(
1640 loff_t to = pos + len; 1676 loff_t to = pos + len;
1641 1677
1642 if (to > isize) { 1678 if (to > isize) {
1643 truncate_pagecache(inode, isize); 1679 /* only kill blocks in this write beyond EOF */
1680 if (pos > isize)
1681 isize = pos;
1644 xfs_vm_kill_delalloc_range(inode, isize, to); 1682 xfs_vm_kill_delalloc_range(inode, isize, to);
1683 truncate_pagecache_range(inode, isize, to);
1645 } 1684 }
1646 } 1685 }
1647 return ret; 1686 return ret;
diff --git a/fs/xfs/xfs_attr.c b/fs/xfs/xfs_attr.c
index 01b6a0102fbd..abda1124a70f 100644
--- a/fs/xfs/xfs_attr.c
+++ b/fs/xfs/xfs_attr.c
@@ -213,7 +213,7 @@ xfs_attr_calc_size(
213 * Out of line attribute, cannot double split, but 213 * Out of line attribute, cannot double split, but
214 * make room for the attribute value itself. 214 * make room for the attribute value itself.
215 */ 215 */
216 uint dblocks = XFS_B_TO_FSB(mp, valuelen); 216 uint dblocks = xfs_attr3_rmt_blocks(mp, valuelen);
217 nblks += dblocks; 217 nblks += dblocks;
218 nblks += XFS_NEXTENTADD_SPACE_RES(mp, dblocks, XFS_ATTR_FORK); 218 nblks += XFS_NEXTENTADD_SPACE_RES(mp, dblocks, XFS_ATTR_FORK);
219 } 219 }
@@ -698,11 +698,22 @@ xfs_attr_leaf_addname(xfs_da_args_t *args)
698 698
699 trace_xfs_attr_leaf_replace(args); 699 trace_xfs_attr_leaf_replace(args);
700 700
701 /* save the attribute state for later removal*/
701 args->op_flags |= XFS_DA_OP_RENAME; /* an atomic rename */ 702 args->op_flags |= XFS_DA_OP_RENAME; /* an atomic rename */
702 args->blkno2 = args->blkno; /* set 2nd entry info*/ 703 args->blkno2 = args->blkno; /* set 2nd entry info*/
703 args->index2 = args->index; 704 args->index2 = args->index;
704 args->rmtblkno2 = args->rmtblkno; 705 args->rmtblkno2 = args->rmtblkno;
705 args->rmtblkcnt2 = args->rmtblkcnt; 706 args->rmtblkcnt2 = args->rmtblkcnt;
707 args->rmtvaluelen2 = args->rmtvaluelen;
708
709 /*
710 * clear the remote attr state now that it is saved so that the
711 * values reflect the state of the attribute we are about to
712 * add, not the attribute we just found and will remove later.
713 */
714 args->rmtblkno = 0;
715 args->rmtblkcnt = 0;
716 args->rmtvaluelen = 0;
706 } 717 }
707 718
708 /* 719 /*
@@ -794,6 +805,7 @@ xfs_attr_leaf_addname(xfs_da_args_t *args)
794 args->blkno = args->blkno2; 805 args->blkno = args->blkno2;
795 args->rmtblkno = args->rmtblkno2; 806 args->rmtblkno = args->rmtblkno2;
796 args->rmtblkcnt = args->rmtblkcnt2; 807 args->rmtblkcnt = args->rmtblkcnt2;
808 args->rmtvaluelen = args->rmtvaluelen2;
797 if (args->rmtblkno) { 809 if (args->rmtblkno) {
798 error = xfs_attr_rmtval_remove(args); 810 error = xfs_attr_rmtval_remove(args);
799 if (error) 811 if (error)
@@ -999,13 +1011,22 @@ restart:
999 1011
1000 trace_xfs_attr_node_replace(args); 1012 trace_xfs_attr_node_replace(args);
1001 1013
1014 /* save the attribute state for later removal*/
1002 args->op_flags |= XFS_DA_OP_RENAME; /* atomic rename op */ 1015 args->op_flags |= XFS_DA_OP_RENAME; /* atomic rename op */
1003 args->blkno2 = args->blkno; /* set 2nd entry info*/ 1016 args->blkno2 = args->blkno; /* set 2nd entry info*/
1004 args->index2 = args->index; 1017 args->index2 = args->index;
1005 args->rmtblkno2 = args->rmtblkno; 1018 args->rmtblkno2 = args->rmtblkno;
1006 args->rmtblkcnt2 = args->rmtblkcnt; 1019 args->rmtblkcnt2 = args->rmtblkcnt;
1020 args->rmtvaluelen2 = args->rmtvaluelen;
1021
1022 /*
1023 * clear the remote attr state now that it is saved so that the
1024 * values reflect the state of the attribute we are about to
1025 * add, not the attribute we just found and will remove later.
1026 */
1007 args->rmtblkno = 0; 1027 args->rmtblkno = 0;
1008 args->rmtblkcnt = 0; 1028 args->rmtblkcnt = 0;
1029 args->rmtvaluelen = 0;
1009 } 1030 }
1010 1031
1011 retval = xfs_attr3_leaf_add(blk->bp, state->args); 1032 retval = xfs_attr3_leaf_add(blk->bp, state->args);
@@ -1133,6 +1154,7 @@ restart:
1133 args->blkno = args->blkno2; 1154 args->blkno = args->blkno2;
1134 args->rmtblkno = args->rmtblkno2; 1155 args->rmtblkno = args->rmtblkno2;
1135 args->rmtblkcnt = args->rmtblkcnt2; 1156 args->rmtblkcnt = args->rmtblkcnt2;
1157 args->rmtvaluelen = args->rmtvaluelen2;
1136 if (args->rmtblkno) { 1158 if (args->rmtblkno) {
1137 error = xfs_attr_rmtval_remove(args); 1159 error = xfs_attr_rmtval_remove(args);
1138 if (error) 1160 if (error)
diff --git a/fs/xfs/xfs_attr_leaf.c b/fs/xfs/xfs_attr_leaf.c
index fe9587fab17a..511c283459b1 100644
--- a/fs/xfs/xfs_attr_leaf.c
+++ b/fs/xfs/xfs_attr_leaf.c
@@ -1229,6 +1229,7 @@ xfs_attr3_leaf_add_work(
1229 name_rmt->valueblk = 0; 1229 name_rmt->valueblk = 0;
1230 args->rmtblkno = 1; 1230 args->rmtblkno = 1;
1231 args->rmtblkcnt = xfs_attr3_rmt_blocks(mp, args->valuelen); 1231 args->rmtblkcnt = xfs_attr3_rmt_blocks(mp, args->valuelen);
1232 args->rmtvaluelen = args->valuelen;
1232 } 1233 }
1233 xfs_trans_log_buf(args->trans, bp, 1234 xfs_trans_log_buf(args->trans, bp,
1234 XFS_DA_LOGRANGE(leaf, xfs_attr3_leaf_name(leaf, args->index), 1235 XFS_DA_LOGRANGE(leaf, xfs_attr3_leaf_name(leaf, args->index),
@@ -2167,11 +2168,11 @@ xfs_attr3_leaf_lookup_int(
2167 if (!xfs_attr_namesp_match(args->flags, entry->flags)) 2168 if (!xfs_attr_namesp_match(args->flags, entry->flags))
2168 continue; 2169 continue;
2169 args->index = probe; 2170 args->index = probe;
2170 args->valuelen = be32_to_cpu(name_rmt->valuelen); 2171 args->rmtvaluelen = be32_to_cpu(name_rmt->valuelen);
2171 args->rmtblkno = be32_to_cpu(name_rmt->valueblk); 2172 args->rmtblkno = be32_to_cpu(name_rmt->valueblk);
2172 args->rmtblkcnt = xfs_attr3_rmt_blocks( 2173 args->rmtblkcnt = xfs_attr3_rmt_blocks(
2173 args->dp->i_mount, 2174 args->dp->i_mount,
2174 args->valuelen); 2175 args->rmtvaluelen);
2175 return XFS_ERROR(EEXIST); 2176 return XFS_ERROR(EEXIST);
2176 } 2177 }
2177 } 2178 }
@@ -2220,19 +2221,19 @@ xfs_attr3_leaf_getvalue(
2220 name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index); 2221 name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index);
2221 ASSERT(name_rmt->namelen == args->namelen); 2222 ASSERT(name_rmt->namelen == args->namelen);
2222 ASSERT(memcmp(args->name, name_rmt->name, args->namelen) == 0); 2223 ASSERT(memcmp(args->name, name_rmt->name, args->namelen) == 0);
2223 valuelen = be32_to_cpu(name_rmt->valuelen); 2224 args->rmtvaluelen = be32_to_cpu(name_rmt->valuelen);
2224 args->rmtblkno = be32_to_cpu(name_rmt->valueblk); 2225 args->rmtblkno = be32_to_cpu(name_rmt->valueblk);
2225 args->rmtblkcnt = xfs_attr3_rmt_blocks(args->dp->i_mount, 2226 args->rmtblkcnt = xfs_attr3_rmt_blocks(args->dp->i_mount,
2226 valuelen); 2227 args->rmtvaluelen);
2227 if (args->flags & ATTR_KERNOVAL) { 2228 if (args->flags & ATTR_KERNOVAL) {
2228 args->valuelen = valuelen; 2229 args->valuelen = args->rmtvaluelen;
2229 return 0; 2230 return 0;
2230 } 2231 }
2231 if (args->valuelen < valuelen) { 2232 if (args->valuelen < args->rmtvaluelen) {
2232 args->valuelen = valuelen; 2233 args->valuelen = args->rmtvaluelen;
2233 return XFS_ERROR(ERANGE); 2234 return XFS_ERROR(ERANGE);
2234 } 2235 }
2235 args->valuelen = valuelen; 2236 args->valuelen = args->rmtvaluelen;
2236 } 2237 }
2237 return 0; 2238 return 0;
2238} 2239}
@@ -2519,7 +2520,7 @@ xfs_attr3_leaf_clearflag(
2519 ASSERT((entry->flags & XFS_ATTR_LOCAL) == 0); 2520 ASSERT((entry->flags & XFS_ATTR_LOCAL) == 0);
2520 name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index); 2521 name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index);
2521 name_rmt->valueblk = cpu_to_be32(args->rmtblkno); 2522 name_rmt->valueblk = cpu_to_be32(args->rmtblkno);
2522 name_rmt->valuelen = cpu_to_be32(args->valuelen); 2523 name_rmt->valuelen = cpu_to_be32(args->rmtvaluelen);
2523 xfs_trans_log_buf(args->trans, bp, 2524 xfs_trans_log_buf(args->trans, bp,
2524 XFS_DA_LOGRANGE(leaf, name_rmt, sizeof(*name_rmt))); 2525 XFS_DA_LOGRANGE(leaf, name_rmt, sizeof(*name_rmt)));
2525 } 2526 }
@@ -2677,7 +2678,7 @@ xfs_attr3_leaf_flipflags(
2677 ASSERT((entry1->flags & XFS_ATTR_LOCAL) == 0); 2678 ASSERT((entry1->flags & XFS_ATTR_LOCAL) == 0);
2678 name_rmt = xfs_attr3_leaf_name_remote(leaf1, args->index); 2679 name_rmt = xfs_attr3_leaf_name_remote(leaf1, args->index);
2679 name_rmt->valueblk = cpu_to_be32(args->rmtblkno); 2680 name_rmt->valueblk = cpu_to_be32(args->rmtblkno);
2680 name_rmt->valuelen = cpu_to_be32(args->valuelen); 2681 name_rmt->valuelen = cpu_to_be32(args->rmtvaluelen);
2681 xfs_trans_log_buf(args->trans, bp1, 2682 xfs_trans_log_buf(args->trans, bp1,
2682 XFS_DA_LOGRANGE(leaf1, name_rmt, sizeof(*name_rmt))); 2683 XFS_DA_LOGRANGE(leaf1, name_rmt, sizeof(*name_rmt)));
2683 } 2684 }
diff --git a/fs/xfs/xfs_attr_list.c b/fs/xfs/xfs_attr_list.c
index 01db96f60cf0..833fe5d98d80 100644
--- a/fs/xfs/xfs_attr_list.c
+++ b/fs/xfs/xfs_attr_list.c
@@ -447,6 +447,7 @@ xfs_attr3_leaf_list_int(
447 args.dp = context->dp; 447 args.dp = context->dp;
448 args.whichfork = XFS_ATTR_FORK; 448 args.whichfork = XFS_ATTR_FORK;
449 args.valuelen = valuelen; 449 args.valuelen = valuelen;
450 args.rmtvaluelen = valuelen;
450 args.value = kmem_alloc(valuelen, KM_SLEEP | KM_NOFS); 451 args.value = kmem_alloc(valuelen, KM_SLEEP | KM_NOFS);
451 args.rmtblkno = be32_to_cpu(name_rmt->valueblk); 452 args.rmtblkno = be32_to_cpu(name_rmt->valueblk);
452 args.rmtblkcnt = xfs_attr3_rmt_blocks( 453 args.rmtblkcnt = xfs_attr3_rmt_blocks(
diff --git a/fs/xfs/xfs_attr_remote.c b/fs/xfs/xfs_attr_remote.c
index 6e37823e2932..d2e6e948cec7 100644
--- a/fs/xfs/xfs_attr_remote.c
+++ b/fs/xfs/xfs_attr_remote.c
@@ -337,7 +337,7 @@ xfs_attr_rmtval_get(
337 struct xfs_buf *bp; 337 struct xfs_buf *bp;
338 xfs_dablk_t lblkno = args->rmtblkno; 338 xfs_dablk_t lblkno = args->rmtblkno;
339 __uint8_t *dst = args->value; 339 __uint8_t *dst = args->value;
340 int valuelen = args->valuelen; 340 int valuelen;
341 int nmap; 341 int nmap;
342 int error; 342 int error;
343 int blkcnt = args->rmtblkcnt; 343 int blkcnt = args->rmtblkcnt;
@@ -347,7 +347,9 @@ xfs_attr_rmtval_get(
347 trace_xfs_attr_rmtval_get(args); 347 trace_xfs_attr_rmtval_get(args);
348 348
349 ASSERT(!(args->flags & ATTR_KERNOVAL)); 349 ASSERT(!(args->flags & ATTR_KERNOVAL));
350 ASSERT(args->rmtvaluelen == args->valuelen);
350 351
352 valuelen = args->rmtvaluelen;
351 while (valuelen > 0) { 353 while (valuelen > 0) {
352 nmap = ATTR_RMTVALUE_MAPSIZE; 354 nmap = ATTR_RMTVALUE_MAPSIZE;
353 error = xfs_bmapi_read(args->dp, (xfs_fileoff_t)lblkno, 355 error = xfs_bmapi_read(args->dp, (xfs_fileoff_t)lblkno,
@@ -415,7 +417,7 @@ xfs_attr_rmtval_set(
415 * attributes have headers, we can't just do a straight byte to FSB 417 * attributes have headers, we can't just do a straight byte to FSB
416 * conversion and have to take the header space into account. 418 * conversion and have to take the header space into account.
417 */ 419 */
418 blkcnt = xfs_attr3_rmt_blocks(mp, args->valuelen); 420 blkcnt = xfs_attr3_rmt_blocks(mp, args->rmtvaluelen);
419 error = xfs_bmap_first_unused(args->trans, args->dp, blkcnt, &lfileoff, 421 error = xfs_bmap_first_unused(args->trans, args->dp, blkcnt, &lfileoff,
420 XFS_ATTR_FORK); 422 XFS_ATTR_FORK);
421 if (error) 423 if (error)
@@ -480,7 +482,7 @@ xfs_attr_rmtval_set(
480 */ 482 */
481 lblkno = args->rmtblkno; 483 lblkno = args->rmtblkno;
482 blkcnt = args->rmtblkcnt; 484 blkcnt = args->rmtblkcnt;
483 valuelen = args->valuelen; 485 valuelen = args->rmtvaluelen;
484 while (valuelen > 0) { 486 while (valuelen > 0) {
485 struct xfs_buf *bp; 487 struct xfs_buf *bp;
486 xfs_daddr_t dblkno; 488 xfs_daddr_t dblkno;
diff --git a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c
index 5b6092ef51ef..f0efc7e970ef 100644
--- a/fs/xfs/xfs_bmap.c
+++ b/fs/xfs/xfs_bmap.c
@@ -5413,6 +5413,7 @@ xfs_bmap_shift_extents(
5413 int whichfork = XFS_DATA_FORK; 5413 int whichfork = XFS_DATA_FORK;
5414 int logflags; 5414 int logflags;
5415 xfs_filblks_t blockcount = 0; 5415 xfs_filblks_t blockcount = 0;
5416 int total_extents;
5416 5417
5417 if (unlikely(XFS_TEST_ERROR( 5418 if (unlikely(XFS_TEST_ERROR(
5418 (XFS_IFORK_FORMAT(ip, whichfork) != XFS_DINODE_FMT_EXTENTS && 5419 (XFS_IFORK_FORMAT(ip, whichfork) != XFS_DINODE_FMT_EXTENTS &&
@@ -5429,7 +5430,6 @@ xfs_bmap_shift_extents(
5429 ASSERT(current_ext != NULL); 5430 ASSERT(current_ext != NULL);
5430 5431
5431 ifp = XFS_IFORK_PTR(ip, whichfork); 5432 ifp = XFS_IFORK_PTR(ip, whichfork);
5432
5433 if (!(ifp->if_flags & XFS_IFEXTENTS)) { 5433 if (!(ifp->if_flags & XFS_IFEXTENTS)) {
5434 /* Read in all the extents */ 5434 /* Read in all the extents */
5435 error = xfs_iread_extents(tp, ip, whichfork); 5435 error = xfs_iread_extents(tp, ip, whichfork);
@@ -5456,7 +5456,6 @@ xfs_bmap_shift_extents(
5456 5456
5457 /* We are going to change core inode */ 5457 /* We are going to change core inode */
5458 logflags = XFS_ILOG_CORE; 5458 logflags = XFS_ILOG_CORE;
5459
5460 if (ifp->if_flags & XFS_IFBROOT) { 5459 if (ifp->if_flags & XFS_IFBROOT) {
5461 cur = xfs_bmbt_init_cursor(mp, tp, ip, whichfork); 5460 cur = xfs_bmbt_init_cursor(mp, tp, ip, whichfork);
5462 cur->bc_private.b.firstblock = *firstblock; 5461 cur->bc_private.b.firstblock = *firstblock;
@@ -5467,8 +5466,14 @@ xfs_bmap_shift_extents(
5467 logflags |= XFS_ILOG_DEXT; 5466 logflags |= XFS_ILOG_DEXT;
5468 } 5467 }
5469 5468
5470 while (nexts++ < num_exts && 5469 /*
5471 *current_ext < XFS_IFORK_NEXTENTS(ip, whichfork)) { 5470 * There may be delalloc extents in the data fork before the range we
5471 * are collapsing out, so we cannot
5472 * use the count of real extents here. Instead we have to calculate it
5473 * from the incore fork.
5474 */
5475 total_extents = ifp->if_bytes / sizeof(xfs_bmbt_rec_t);
5476 while (nexts++ < num_exts && *current_ext < total_extents) {
5472 5477
5473 gotp = xfs_iext_get_ext(ifp, *current_ext); 5478 gotp = xfs_iext_get_ext(ifp, *current_ext);
5474 xfs_bmbt_get_all(gotp, &got); 5479 xfs_bmbt_get_all(gotp, &got);
@@ -5556,10 +5561,11 @@ xfs_bmap_shift_extents(
5556 } 5561 }
5557 5562
5558 (*current_ext)++; 5563 (*current_ext)++;
5564 total_extents = ifp->if_bytes / sizeof(xfs_bmbt_rec_t);
5559 } 5565 }
5560 5566
5561 /* Check if we are done */ 5567 /* Check if we are done */
5562 if (*current_ext == XFS_IFORK_NEXTENTS(ip, whichfork)) 5568 if (*current_ext == total_extents)
5563 *done = 1; 5569 *done = 1;
5564 5570
5565del_cursor: 5571del_cursor:
@@ -5568,6 +5574,5 @@ del_cursor:
5568 error ? XFS_BTREE_ERROR : XFS_BTREE_NOERROR); 5574 error ? XFS_BTREE_ERROR : XFS_BTREE_NOERROR);
5569 5575
5570 xfs_trans_log_inode(tp, ip, logflags); 5576 xfs_trans_log_inode(tp, ip, logflags);
5571
5572 return error; 5577 return error;
5573} 5578}
diff --git a/fs/xfs/xfs_bmap_util.c b/fs/xfs/xfs_bmap_util.c
index 01f6a646caa1..296160b8e78c 100644
--- a/fs/xfs/xfs_bmap_util.c
+++ b/fs/xfs/xfs_bmap_util.c
@@ -1418,6 +1418,8 @@ xfs_zero_file_space(
1418 xfs_off_t end_boundary; 1418 xfs_off_t end_boundary;
1419 int error; 1419 int error;
1420 1420
1421 trace_xfs_zero_file_space(ip);
1422
1421 granularity = max_t(uint, 1 << mp->m_sb.sb_blocklog, PAGE_CACHE_SIZE); 1423 granularity = max_t(uint, 1 << mp->m_sb.sb_blocklog, PAGE_CACHE_SIZE);
1422 1424
1423 /* 1425 /*
@@ -1432,9 +1434,18 @@ xfs_zero_file_space(
1432 ASSERT(end_boundary <= offset + len); 1434 ASSERT(end_boundary <= offset + len);
1433 1435
1434 if (start_boundary < end_boundary - 1) { 1436 if (start_boundary < end_boundary - 1) {
1435 /* punch out the page cache over the conversion range */ 1437 /*
1438 * punch out delayed allocation blocks and the page cache over
1439 * the conversion range
1440 */
1441 xfs_ilock(ip, XFS_ILOCK_EXCL);
1442 error = xfs_bmap_punch_delalloc_range(ip,
1443 XFS_B_TO_FSBT(mp, start_boundary),
1444 XFS_B_TO_FSB(mp, end_boundary - start_boundary));
1445 xfs_iunlock(ip, XFS_ILOCK_EXCL);
1436 truncate_pagecache_range(VFS_I(ip), start_boundary, 1446 truncate_pagecache_range(VFS_I(ip), start_boundary,
1437 end_boundary - 1); 1447 end_boundary - 1);
1448
1438 /* convert the blocks */ 1449 /* convert the blocks */
1439 error = xfs_alloc_file_space(ip, start_boundary, 1450 error = xfs_alloc_file_space(ip, start_boundary,
1440 end_boundary - start_boundary - 1, 1451 end_boundary - start_boundary - 1,
diff --git a/fs/xfs/xfs_buf.c b/fs/xfs/xfs_buf.c
index 107f2fdfe41f..cb10a0aaab3a 100644
--- a/fs/xfs/xfs_buf.c
+++ b/fs/xfs/xfs_buf.c
@@ -1372,21 +1372,29 @@ xfs_buf_iorequest(
1372 xfs_buf_wait_unpin(bp); 1372 xfs_buf_wait_unpin(bp);
1373 xfs_buf_hold(bp); 1373 xfs_buf_hold(bp);
1374 1374
1375 /* Set the count to 1 initially, this will stop an I/O 1375 /*
1376 * Set the count to 1 initially, this will stop an I/O
1376 * completion callout which happens before we have started 1377 * completion callout which happens before we have started
1377 * all the I/O from calling xfs_buf_ioend too early. 1378 * all the I/O from calling xfs_buf_ioend too early.
1378 */ 1379 */
1379 atomic_set(&bp->b_io_remaining, 1); 1380 atomic_set(&bp->b_io_remaining, 1);
1380 _xfs_buf_ioapply(bp); 1381 _xfs_buf_ioapply(bp);
1381 _xfs_buf_ioend(bp, 1); 1382 /*
1383 * If _xfs_buf_ioapply failed, we'll get back here with
1384 * only the reference we took above. _xfs_buf_ioend will
1385 * drop it to zero, so we'd better not queue it for later,
1386 * or we'll free it before it's done.
1387 */
1388 _xfs_buf_ioend(bp, bp->b_error ? 0 : 1);
1382 1389
1383 xfs_buf_rele(bp); 1390 xfs_buf_rele(bp);
1384} 1391}
1385 1392
1386/* 1393/*
1387 * Waits for I/O to complete on the buffer supplied. It returns immediately if 1394 * Waits for I/O to complete on the buffer supplied. It returns immediately if
1388 * no I/O is pending or there is already a pending error on the buffer. It 1395 * no I/O is pending or there is already a pending error on the buffer, in which
1389 * returns the I/O error code, if any, or 0 if there was no error. 1396 * case nothing will ever complete. It returns the I/O error code, if any, or
1397 * 0 if there was no error.
1390 */ 1398 */
1391int 1399int
1392xfs_buf_iowait( 1400xfs_buf_iowait(
diff --git a/fs/xfs/xfs_da_btree.h b/fs/xfs/xfs_da_btree.h
index 6e95ea79f5d7..201c6091d26a 100644
--- a/fs/xfs/xfs_da_btree.h
+++ b/fs/xfs/xfs_da_btree.h
@@ -60,10 +60,12 @@ typedef struct xfs_da_args {
60 int index; /* index of attr of interest in blk */ 60 int index; /* index of attr of interest in blk */
61 xfs_dablk_t rmtblkno; /* remote attr value starting blkno */ 61 xfs_dablk_t rmtblkno; /* remote attr value starting blkno */
62 int rmtblkcnt; /* remote attr value block count */ 62 int rmtblkcnt; /* remote attr value block count */
63 int rmtvaluelen; /* remote attr value length in bytes */
63 xfs_dablk_t blkno2; /* blkno of 2nd attr leaf of interest */ 64 xfs_dablk_t blkno2; /* blkno of 2nd attr leaf of interest */
64 int index2; /* index of 2nd attr in blk */ 65 int index2; /* index of 2nd attr in blk */
65 xfs_dablk_t rmtblkno2; /* remote attr value starting blkno */ 66 xfs_dablk_t rmtblkno2; /* remote attr value starting blkno */
66 int rmtblkcnt2; /* remote attr value block count */ 67 int rmtblkcnt2; /* remote attr value block count */
68 int rmtvaluelen2; /* remote attr value length in bytes */
67 int op_flags; /* operation flags */ 69 int op_flags; /* operation flags */
68 enum xfs_dacmp cmpresult; /* name compare result for lookups */ 70 enum xfs_dacmp cmpresult; /* name compare result for lookups */
69} xfs_da_args_t; 71} xfs_da_args_t;
diff --git a/fs/xfs/xfs_file.c b/fs/xfs/xfs_file.c
index 79e96ce98733..951a2321ee01 100644
--- a/fs/xfs/xfs_file.c
+++ b/fs/xfs/xfs_file.c
@@ -679,7 +679,7 @@ xfs_file_dio_aio_write(
679 goto out; 679 goto out;
680 680
681 if (mapping->nrpages) { 681 if (mapping->nrpages) {
682 ret = -filemap_write_and_wait_range(VFS_I(ip)->i_mapping, 682 ret = filemap_write_and_wait_range(VFS_I(ip)->i_mapping,
683 pos, -1); 683 pos, -1);
684 if (ret) 684 if (ret)
685 goto out; 685 goto out;
@@ -841,7 +841,15 @@ xfs_file_fallocate(
841 goto out_unlock; 841 goto out_unlock;
842 } 842 }
843 843
844 ASSERT(offset + len < i_size_read(inode)); 844 /*
845 * There is no need to overlap collapse range with EOF,
846 * in which case it is effectively a truncate operation
847 */
848 if (offset + len >= i_size_read(inode)) {
849 error = -EINVAL;
850 goto out_unlock;
851 }
852
845 new_size = i_size_read(inode) - len; 853 new_size = i_size_read(inode) - len;
846 854
847 error = xfs_collapse_file_space(ip, offset, len); 855 error = xfs_collapse_file_space(ip, offset, len);
diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c
index 5e7a38fa6ee6..768087bedbac 100644
--- a/fs/xfs/xfs_inode.c
+++ b/fs/xfs/xfs_inode.c
@@ -1334,7 +1334,8 @@ int
1334xfs_create_tmpfile( 1334xfs_create_tmpfile(
1335 struct xfs_inode *dp, 1335 struct xfs_inode *dp,
1336 struct dentry *dentry, 1336 struct dentry *dentry,
1337 umode_t mode) 1337 umode_t mode,
1338 struct xfs_inode **ipp)
1338{ 1339{
1339 struct xfs_mount *mp = dp->i_mount; 1340 struct xfs_mount *mp = dp->i_mount;
1340 struct xfs_inode *ip = NULL; 1341 struct xfs_inode *ip = NULL;
@@ -1402,7 +1403,6 @@ xfs_create_tmpfile(
1402 xfs_qm_vop_create_dqattach(tp, ip, udqp, gdqp, pdqp); 1403 xfs_qm_vop_create_dqattach(tp, ip, udqp, gdqp, pdqp);
1403 1404
1404 ip->i_d.di_nlink--; 1405 ip->i_d.di_nlink--;
1405 d_tmpfile(dentry, VFS_I(ip));
1406 error = xfs_iunlink(tp, ip); 1406 error = xfs_iunlink(tp, ip);
1407 if (error) 1407 if (error)
1408 goto out_trans_abort; 1408 goto out_trans_abort;
@@ -1415,6 +1415,7 @@ xfs_create_tmpfile(
1415 xfs_qm_dqrele(gdqp); 1415 xfs_qm_dqrele(gdqp);
1416 xfs_qm_dqrele(pdqp); 1416 xfs_qm_dqrele(pdqp);
1417 1417
1418 *ipp = ip;
1418 return 0; 1419 return 0;
1419 1420
1420 out_trans_abort: 1421 out_trans_abort:
diff --git a/fs/xfs/xfs_inode.h b/fs/xfs/xfs_inode.h
index 396cc1fafd0d..f2fcde52b66d 100644
--- a/fs/xfs/xfs_inode.h
+++ b/fs/xfs/xfs_inode.h
@@ -334,7 +334,7 @@ int xfs_lookup(struct xfs_inode *dp, struct xfs_name *name,
334int xfs_create(struct xfs_inode *dp, struct xfs_name *name, 334int xfs_create(struct xfs_inode *dp, struct xfs_name *name,
335 umode_t mode, xfs_dev_t rdev, struct xfs_inode **ipp); 335 umode_t mode, xfs_dev_t rdev, struct xfs_inode **ipp);
336int xfs_create_tmpfile(struct xfs_inode *dp, struct dentry *dentry, 336int xfs_create_tmpfile(struct xfs_inode *dp, struct dentry *dentry,
337 umode_t mode); 337 umode_t mode, struct xfs_inode **ipp);
338int xfs_remove(struct xfs_inode *dp, struct xfs_name *name, 338int xfs_remove(struct xfs_inode *dp, struct xfs_name *name,
339 struct xfs_inode *ip); 339 struct xfs_inode *ip);
340int xfs_link(struct xfs_inode *tdp, struct xfs_inode *sip, 340int xfs_link(struct xfs_inode *tdp, struct xfs_inode *sip,
diff --git a/fs/xfs/xfs_iops.c b/fs/xfs/xfs_iops.c
index 89b07e43ca28..301ecbfcc0be 100644
--- a/fs/xfs/xfs_iops.c
+++ b/fs/xfs/xfs_iops.c
@@ -124,15 +124,15 @@ xfs_cleanup_inode(
124 xfs_dentry_to_name(&teardown, dentry, 0); 124 xfs_dentry_to_name(&teardown, dentry, 0);
125 125
126 xfs_remove(XFS_I(dir), &teardown, XFS_I(inode)); 126 xfs_remove(XFS_I(dir), &teardown, XFS_I(inode));
127 iput(inode);
128} 127}
129 128
130STATIC int 129STATIC int
131xfs_vn_mknod( 130xfs_generic_create(
132 struct inode *dir, 131 struct inode *dir,
133 struct dentry *dentry, 132 struct dentry *dentry,
134 umode_t mode, 133 umode_t mode,
135 dev_t rdev) 134 dev_t rdev,
135 bool tmpfile) /* unnamed file */
136{ 136{
137 struct inode *inode; 137 struct inode *inode;
138 struct xfs_inode *ip = NULL; 138 struct xfs_inode *ip = NULL;
@@ -156,8 +156,12 @@ xfs_vn_mknod(
156 if (error) 156 if (error)
157 return error; 157 return error;
158 158
159 xfs_dentry_to_name(&name, dentry, mode); 159 if (!tmpfile) {
160 error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip); 160 xfs_dentry_to_name(&name, dentry, mode);
161 error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip);
162 } else {
163 error = xfs_create_tmpfile(XFS_I(dir), dentry, mode, &ip);
164 }
161 if (unlikely(error)) 165 if (unlikely(error))
162 goto out_free_acl; 166 goto out_free_acl;
163 167
@@ -180,7 +184,11 @@ xfs_vn_mknod(
180 } 184 }
181#endif 185#endif
182 186
183 d_instantiate(dentry, inode); 187 if (tmpfile)
188 d_tmpfile(dentry, inode);
189 else
190 d_instantiate(dentry, inode);
191
184 out_free_acl: 192 out_free_acl:
185 if (default_acl) 193 if (default_acl)
186 posix_acl_release(default_acl); 194 posix_acl_release(default_acl);
@@ -189,11 +197,23 @@ xfs_vn_mknod(
189 return -error; 197 return -error;
190 198
191 out_cleanup_inode: 199 out_cleanup_inode:
192 xfs_cleanup_inode(dir, inode, dentry); 200 if (!tmpfile)
201 xfs_cleanup_inode(dir, inode, dentry);
202 iput(inode);
193 goto out_free_acl; 203 goto out_free_acl;
194} 204}
195 205
196STATIC int 206STATIC int
207xfs_vn_mknod(
208 struct inode *dir,
209 struct dentry *dentry,
210 umode_t mode,
211 dev_t rdev)
212{
213 return xfs_generic_create(dir, dentry, mode, rdev, false);
214}
215
216STATIC int
197xfs_vn_create( 217xfs_vn_create(
198 struct inode *dir, 218 struct inode *dir,
199 struct dentry *dentry, 219 struct dentry *dentry,
@@ -353,6 +373,7 @@ xfs_vn_symlink(
353 373
354 out_cleanup_inode: 374 out_cleanup_inode:
355 xfs_cleanup_inode(dir, inode, dentry); 375 xfs_cleanup_inode(dir, inode, dentry);
376 iput(inode);
356 out: 377 out:
357 return -error; 378 return -error;
358} 379}
@@ -1053,11 +1074,7 @@ xfs_vn_tmpfile(
1053 struct dentry *dentry, 1074 struct dentry *dentry,
1054 umode_t mode) 1075 umode_t mode)
1055{ 1076{
1056 int error; 1077 return xfs_generic_create(dir, dentry, mode, 0, true);
1057
1058 error = xfs_create_tmpfile(XFS_I(dir), dentry, mode);
1059
1060 return -error;
1061} 1078}
1062 1079
1063static const struct inode_operations xfs_inode_operations = { 1080static const struct inode_operations xfs_inode_operations = {
diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
index 8497a00e399d..a5f8bd9899d3 100644
--- a/fs/xfs/xfs_log.c
+++ b/fs/xfs/xfs_log.c
@@ -616,11 +616,13 @@ xfs_log_mount(
616 int error = 0; 616 int error = 0;
617 int min_logfsbs; 617 int min_logfsbs;
618 618
619 if (!(mp->m_flags & XFS_MOUNT_NORECOVERY)) 619 if (!(mp->m_flags & XFS_MOUNT_NORECOVERY)) {
620 xfs_notice(mp, "Mounting Filesystem"); 620 xfs_notice(mp, "Mounting V%d Filesystem",
621 else { 621 XFS_SB_VERSION_NUM(&mp->m_sb));
622 } else {
622 xfs_notice(mp, 623 xfs_notice(mp,
623"Mounting filesystem in no-recovery mode. Filesystem will be inconsistent."); 624"Mounting V%d filesystem in no-recovery mode. Filesystem will be inconsistent.",
625 XFS_SB_VERSION_NUM(&mp->m_sb));
624 ASSERT(mp->m_flags & XFS_MOUNT_RDONLY); 626 ASSERT(mp->m_flags & XFS_MOUNT_RDONLY);
625 } 627 }
626 628
@@ -1181,11 +1183,14 @@ xlog_iodone(xfs_buf_t *bp)
1181 /* log I/O is always issued ASYNC */ 1183 /* log I/O is always issued ASYNC */
1182 ASSERT(XFS_BUF_ISASYNC(bp)); 1184 ASSERT(XFS_BUF_ISASYNC(bp));
1183 xlog_state_done_syncing(iclog, aborted); 1185 xlog_state_done_syncing(iclog, aborted);
1186
1184 /* 1187 /*
1185 * do not reference the buffer (bp) here as we could race 1188 * drop the buffer lock now that we are done. Nothing references
1186 * with it being freed after writing the unmount record to the 1189 * the buffer after this, so an unmount waiting on this lock can now
1187 * log. 1190 * tear it down safely. As such, it is unsafe to reference the buffer
1191 * (bp) after the unlock as we could race with it being freed.
1188 */ 1192 */
1193 xfs_buf_unlock(bp);
1189} 1194}
1190 1195
1191/* 1196/*
@@ -1368,8 +1373,16 @@ xlog_alloc_log(
1368 bp = xfs_buf_alloc(mp->m_logdev_targp, 0, BTOBB(log->l_iclog_size), 0); 1373 bp = xfs_buf_alloc(mp->m_logdev_targp, 0, BTOBB(log->l_iclog_size), 0);
1369 if (!bp) 1374 if (!bp)
1370 goto out_free_log; 1375 goto out_free_log;
1371 bp->b_iodone = xlog_iodone; 1376
1377 /*
1378 * The iclogbuf buffer locks are held over IO but we are not going to do
1379 * IO yet. Hence unlock the buffer so that the log IO path can grab it
1380 * when appropriately.
1381 */
1372 ASSERT(xfs_buf_islocked(bp)); 1382 ASSERT(xfs_buf_islocked(bp));
1383 xfs_buf_unlock(bp);
1384
1385 bp->b_iodone = xlog_iodone;
1373 log->l_xbuf = bp; 1386 log->l_xbuf = bp;
1374 1387
1375 spin_lock_init(&log->l_icloglock); 1388 spin_lock_init(&log->l_icloglock);
@@ -1398,6 +1411,9 @@ xlog_alloc_log(
1398 if (!bp) 1411 if (!bp)
1399 goto out_free_iclog; 1412 goto out_free_iclog;
1400 1413
1414 ASSERT(xfs_buf_islocked(bp));
1415 xfs_buf_unlock(bp);
1416
1401 bp->b_iodone = xlog_iodone; 1417 bp->b_iodone = xlog_iodone;
1402 iclog->ic_bp = bp; 1418 iclog->ic_bp = bp;
1403 iclog->ic_data = bp->b_addr; 1419 iclog->ic_data = bp->b_addr;
@@ -1422,7 +1438,6 @@ xlog_alloc_log(
1422 iclog->ic_callback_tail = &(iclog->ic_callback); 1438 iclog->ic_callback_tail = &(iclog->ic_callback);
1423 iclog->ic_datap = (char *)iclog->ic_data + log->l_iclog_hsize; 1439 iclog->ic_datap = (char *)iclog->ic_data + log->l_iclog_hsize;
1424 1440
1425 ASSERT(xfs_buf_islocked(iclog->ic_bp));
1426 init_waitqueue_head(&iclog->ic_force_wait); 1441 init_waitqueue_head(&iclog->ic_force_wait);
1427 init_waitqueue_head(&iclog->ic_write_wait); 1442 init_waitqueue_head(&iclog->ic_write_wait);
1428 1443
@@ -1631,6 +1646,12 @@ xlog_cksum(
1631 * we transition the iclogs to IOERROR state *after* flushing all existing 1646 * we transition the iclogs to IOERROR state *after* flushing all existing
1632 * iclogs to disk. This is because we don't want anymore new transactions to be 1647 * iclogs to disk. This is because we don't want anymore new transactions to be
1633 * started or completed afterwards. 1648 * started or completed afterwards.
1649 *
1650 * We lock the iclogbufs here so that we can serialise against IO completion
1651 * during unmount. We might be processing a shutdown triggered during unmount,
1652 * and that can occur asynchronously to the unmount thread, and hence we need to
1653 * ensure that completes before tearing down the iclogbufs. Hence we need to
1654 * hold the buffer lock across the log IO to acheive that.
1634 */ 1655 */
1635STATIC int 1656STATIC int
1636xlog_bdstrat( 1657xlog_bdstrat(
@@ -1638,6 +1659,7 @@ xlog_bdstrat(
1638{ 1659{
1639 struct xlog_in_core *iclog = bp->b_fspriv; 1660 struct xlog_in_core *iclog = bp->b_fspriv;
1640 1661
1662 xfs_buf_lock(bp);
1641 if (iclog->ic_state & XLOG_STATE_IOERROR) { 1663 if (iclog->ic_state & XLOG_STATE_IOERROR) {
1642 xfs_buf_ioerror(bp, EIO); 1664 xfs_buf_ioerror(bp, EIO);
1643 xfs_buf_stale(bp); 1665 xfs_buf_stale(bp);
@@ -1645,7 +1667,8 @@ xlog_bdstrat(
1645 /* 1667 /*
1646 * It would seem logical to return EIO here, but we rely on 1668 * It would seem logical to return EIO here, but we rely on
1647 * the log state machine to propagate I/O errors instead of 1669 * the log state machine to propagate I/O errors instead of
1648 * doing it here. 1670 * doing it here. Similarly, IO completion will unlock the
1671 * buffer, so we don't do it here.
1649 */ 1672 */
1650 return 0; 1673 return 0;
1651 } 1674 }
@@ -1847,14 +1870,28 @@ xlog_dealloc_log(
1847 xlog_cil_destroy(log); 1870 xlog_cil_destroy(log);
1848 1871
1849 /* 1872 /*
1850 * always need to ensure that the extra buffer does not point to memory 1873 * Cycle all the iclogbuf locks to make sure all log IO completion
1851 * owned by another log buffer before we free it. 1874 * is done before we tear down these buffers.
1852 */ 1875 */
1876 iclog = log->l_iclog;
1877 for (i = 0; i < log->l_iclog_bufs; i++) {
1878 xfs_buf_lock(iclog->ic_bp);
1879 xfs_buf_unlock(iclog->ic_bp);
1880 iclog = iclog->ic_next;
1881 }
1882
1883 /*
1884 * Always need to ensure that the extra buffer does not point to memory
1885 * owned by another log buffer before we free it. Also, cycle the lock
1886 * first to ensure we've completed IO on it.
1887 */
1888 xfs_buf_lock(log->l_xbuf);
1889 xfs_buf_unlock(log->l_xbuf);
1853 xfs_buf_set_empty(log->l_xbuf, BTOBB(log->l_iclog_size)); 1890 xfs_buf_set_empty(log->l_xbuf, BTOBB(log->l_iclog_size));
1854 xfs_buf_free(log->l_xbuf); 1891 xfs_buf_free(log->l_xbuf);
1855 1892
1856 iclog = log->l_iclog; 1893 iclog = log->l_iclog;
1857 for (i=0; i<log->l_iclog_bufs; i++) { 1894 for (i = 0; i < log->l_iclog_bufs; i++) {
1858 xfs_buf_free(iclog->ic_bp); 1895 xfs_buf_free(iclog->ic_bp);
1859 next_iclog = iclog->ic_next; 1896 next_iclog = iclog->ic_next;
1860 kmem_free(iclog); 1897 kmem_free(iclog);
diff --git a/fs/xfs/xfs_mount.c b/fs/xfs/xfs_mount.c
index 993cb19e7d39..944f3d9456a8 100644
--- a/fs/xfs/xfs_mount.c
+++ b/fs/xfs/xfs_mount.c
@@ -743,8 +743,6 @@ xfs_mountfs(
743 new_size *= mp->m_sb.sb_inodesize / XFS_DINODE_MIN_SIZE; 743 new_size *= mp->m_sb.sb_inodesize / XFS_DINODE_MIN_SIZE;
744 if (mp->m_sb.sb_inoalignmt >= XFS_B_TO_FSBT(mp, new_size)) 744 if (mp->m_sb.sb_inoalignmt >= XFS_B_TO_FSBT(mp, new_size))
745 mp->m_inode_cluster_size = new_size; 745 mp->m_inode_cluster_size = new_size;
746 xfs_info(mp, "Using inode cluster size of %d bytes",
747 mp->m_inode_cluster_size);
748 } 746 }
749 747
750 /* 748 /*
diff --git a/fs/xfs/xfs_sb.c b/fs/xfs/xfs_sb.c
index 0c0e41bbe4e3..8baf61afae1d 100644
--- a/fs/xfs/xfs_sb.c
+++ b/fs/xfs/xfs_sb.c
@@ -201,10 +201,6 @@ xfs_mount_validate_sb(
201 * write validation, we don't need to check feature masks. 201 * write validation, we don't need to check feature masks.
202 */ 202 */
203 if (check_version && XFS_SB_VERSION_NUM(sbp) == XFS_SB_VERSION_5) { 203 if (check_version && XFS_SB_VERSION_NUM(sbp) == XFS_SB_VERSION_5) {
204 xfs_alert(mp,
205"Version 5 superblock detected. This kernel has EXPERIMENTAL support enabled!\n"
206"Use of these features in this kernel is at your own risk!");
207
208 if (xfs_sb_has_compat_feature(sbp, 204 if (xfs_sb_has_compat_feature(sbp,
209 XFS_SB_FEAT_COMPAT_UNKNOWN)) { 205 XFS_SB_FEAT_COMPAT_UNKNOWN)) {
210 xfs_warn(mp, 206 xfs_warn(mp,
diff --git a/fs/xfs/xfs_trace.h b/fs/xfs/xfs_trace.h
index a4ae41c179a8..65d8c793a25c 100644
--- a/fs/xfs/xfs_trace.h
+++ b/fs/xfs/xfs_trace.h
@@ -603,6 +603,7 @@ DEFINE_INODE_EVENT(xfs_readlink);
603DEFINE_INODE_EVENT(xfs_inactive_symlink); 603DEFINE_INODE_EVENT(xfs_inactive_symlink);
604DEFINE_INODE_EVENT(xfs_alloc_file_space); 604DEFINE_INODE_EVENT(xfs_alloc_file_space);
605DEFINE_INODE_EVENT(xfs_free_file_space); 605DEFINE_INODE_EVENT(xfs_free_file_space);
606DEFINE_INODE_EVENT(xfs_zero_file_space);
606DEFINE_INODE_EVENT(xfs_collapse_file_space); 607DEFINE_INODE_EVENT(xfs_collapse_file_space);
607DEFINE_INODE_EVENT(xfs_readdir); 608DEFINE_INODE_EVENT(xfs_readdir);
608#ifdef CONFIG_XFS_POSIX_ACL 609#ifdef CONFIG_XFS_POSIX_ACL
diff --git a/include/asm-generic/fixmap.h b/include/asm-generic/fixmap.h
index 5a64ca4621f3..f23174fb9ec4 100644
--- a/include/asm-generic/fixmap.h
+++ b/include/asm-generic/fixmap.h
@@ -93,5 +93,8 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
93#define set_fixmap_io(idx, phys) \ 93#define set_fixmap_io(idx, phys) \
94 __set_fixmap(idx, phys, FIXMAP_PAGE_IO) 94 __set_fixmap(idx, phys, FIXMAP_PAGE_IO)
95 95
96#define set_fixmap_offset_io(idx, phys) \
97 __set_fixmap_offset(idx, phys, FIXMAP_PAGE_IO)
98
96#endif /* __ASSEMBLY__ */ 99#endif /* __ASSEMBLY__ */
97#endif /* __ASM_GENERIC_FIXMAP_H */ 100#endif /* __ASM_GENERIC_FIXMAP_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 1ec08c198b66..a8015a7a55bb 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -693,24 +693,35 @@ static inline int pmd_numa(pmd_t pmd)
693#ifndef pte_mknonnuma 693#ifndef pte_mknonnuma
694static inline pte_t pte_mknonnuma(pte_t pte) 694static inline pte_t pte_mknonnuma(pte_t pte)
695{ 695{
696 pte = pte_clear_flags(pte, _PAGE_NUMA); 696 pteval_t val = pte_val(pte);
697 return pte_set_flags(pte, _PAGE_PRESENT|_PAGE_ACCESSED); 697
698 val &= ~_PAGE_NUMA;
699 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
700 return __pte(val);
698} 701}
699#endif 702#endif
700 703
701#ifndef pmd_mknonnuma 704#ifndef pmd_mknonnuma
702static inline pmd_t pmd_mknonnuma(pmd_t pmd) 705static inline pmd_t pmd_mknonnuma(pmd_t pmd)
703{ 706{
704 pmd = pmd_clear_flags(pmd, _PAGE_NUMA); 707 pmdval_t val = pmd_val(pmd);
705 return pmd_set_flags(pmd, _PAGE_PRESENT|_PAGE_ACCESSED); 708
709 val &= ~_PAGE_NUMA;
710 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
711
712 return __pmd(val);
706} 713}
707#endif 714#endif
708 715
709#ifndef pte_mknuma 716#ifndef pte_mknuma
710static inline pte_t pte_mknuma(pte_t pte) 717static inline pte_t pte_mknuma(pte_t pte)
711{ 718{
712 pte = pte_set_flags(pte, _PAGE_NUMA); 719 pteval_t val = pte_val(pte);
713 return pte_clear_flags(pte, _PAGE_PRESENT); 720
721 val &= ~_PAGE_PRESENT;
722 val |= _PAGE_NUMA;
723
724 return __pte(val);
714} 725}
715#endif 726#endif
716 727
@@ -729,8 +740,12 @@ static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
729#ifndef pmd_mknuma 740#ifndef pmd_mknuma
730static inline pmd_t pmd_mknuma(pmd_t pmd) 741static inline pmd_t pmd_mknuma(pmd_t pmd)
731{ 742{
732 pmd = pmd_set_flags(pmd, _PAGE_NUMA); 743 pmdval_t val = pmd_val(pmd);
733 return pmd_clear_flags(pmd, _PAGE_PRESENT); 744
745 val &= ~_PAGE_PRESENT;
746 val |= _PAGE_NUMA;
747
748 return __pmd(val);
734} 749}
735#endif 750#endif
736 751
diff --git a/include/asm-generic/word-at-a-time.h b/include/asm-generic/word-at-a-time.h
index d3909effd725..94f9ea8abcae 100644
--- a/include/asm-generic/word-at-a-time.h
+++ b/include/asm-generic/word-at-a-time.h
@@ -50,11 +50,7 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
50} 50}
51 51
52#ifndef zero_bytemask 52#ifndef zero_bytemask
53#ifdef CONFIG_64BIT 53#define zero_bytemask(mask) (~1ul << __fls(mask))
54#define zero_bytemask(mask) (~0ul << fls64(mask)) 54#endif
55#else
56#define zero_bytemask(mask) (~0ul << fls(mask))
57#endif /* CONFIG_64BIT */
58#endif /* zero_bytemask */
59 55
60#endif /* _ASM_WORD_AT_A_TIME_H */ 56#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h
index 0bb34ca2ad2b..36a5febac2a6 100644
--- a/include/drm/drm_crtc_helper.h
+++ b/include/drm/drm_crtc_helper.h
@@ -125,7 +125,6 @@ struct drm_connector_helper_funcs {
125 struct drm_encoder *(*best_encoder)(struct drm_connector *connector); 125 struct drm_encoder *(*best_encoder)(struct drm_connector *connector);
126}; 126};
127 127
128extern int drm_helper_probe_single_connector_modes(struct drm_connector *connector, uint32_t maxX, uint32_t maxY);
129extern void drm_helper_disable_unused_functions(struct drm_device *dev); 128extern void drm_helper_disable_unused_functions(struct drm_device *dev);
130extern int drm_crtc_helper_set_config(struct drm_mode_set *set); 129extern int drm_crtc_helper_set_config(struct drm_mode_set *set);
131extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, 130extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
@@ -161,6 +160,11 @@ static inline void drm_connector_helper_add(struct drm_connector *connector,
161} 160}
162 161
163extern void drm_helper_resume_force_mode(struct drm_device *dev); 162extern void drm_helper_resume_force_mode(struct drm_device *dev);
163
164/* drm_probe_helper.c */
165extern int drm_helper_probe_single_connector_modes(struct drm_connector
166 *connector, uint32_t maxX,
167 uint32_t maxY);
164extern void drm_kms_helper_poll_init(struct drm_device *dev); 168extern void drm_kms_helper_poll_init(struct drm_device *dev);
165extern void drm_kms_helper_poll_fini(struct drm_device *dev); 169extern void drm_kms_helper_poll_fini(struct drm_device *dev);
166extern bool drm_helper_hpd_irq_event(struct drm_device *dev); 170extern bool drm_helper_hpd_irq_event(struct drm_device *dev);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index b4f58914bf7d..cfcacec5b89d 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -456,6 +456,10 @@ struct drm_dp_aux_msg {
456 * transactions. The drm_dp_aux_register_i2c_bus() function registers an 456 * transactions. The drm_dp_aux_register_i2c_bus() function registers an
457 * I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers 457 * I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers
458 * should call drm_dp_aux_unregister_i2c_bus() to remove the I2C adapter. 458 * should call drm_dp_aux_unregister_i2c_bus() to remove the I2C adapter.
459 *
460 * Note that the aux helper code assumes that the .transfer() function
461 * only modifies the reply field of the drm_dp_aux_msg structure. The
462 * retry logic and i2c helpers assume this is the case.
459 */ 463 */
460struct drm_dp_aux { 464struct drm_dp_aux {
461 const char *name; 465 const char *name;
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 49376aec2fbb..6dfd64b3a604 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -637,6 +637,22 @@
637 {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 637 {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
638 {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 638 {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
639 {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 639 {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
640 {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
641 {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
642 {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
643 {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
644 {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
645 {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
646 {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
647 {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
648 {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
649 {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
650 {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
651 {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
652 {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
653 {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
654 {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
655 {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
640 {0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 656 {0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
641 {0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 657 {0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
642 {0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ 658 {0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 940ece4934ba..012d58fa8ff0 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -191,8 +191,8 @@
191 INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ 191 INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
192 INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ 192 INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
193 INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ 193 INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
194 INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ 194 INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
195 INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ 195 INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
196 INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ 196 INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
197 INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ 197 INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
198 INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ 198 INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 6548a5fbcf4a..9a7c4c5a35d1 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -33,8 +33,8 @@
33#define R8A7790_CLK_TMU0 25 33#define R8A7790_CLK_TMU0 25
34#define R8A7790_CLK_VSP1_DU1 27 34#define R8A7790_CLK_VSP1_DU1 27
35#define R8A7790_CLK_VSP1_DU0 28 35#define R8A7790_CLK_VSP1_DU0 28
36#define R8A7790_CLK_VSP1_RT 30 36#define R8A7790_CLK_VSP1_R 30
37#define R8A7790_CLK_VSP1_SY 31 37#define R8A7790_CLK_VSP1_S 31
38 38
39/* MSTP2 */ 39/* MSTP2 */
40#define R8A7790_CLK_SCIFA2 2 40#define R8A7790_CLK_SCIFA2 2
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 30f82f286e29..f069bc6627cb 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -32,7 +32,7 @@
32#define R8A7791_CLK_TMU0 25 32#define R8A7791_CLK_TMU0 25
33#define R8A7791_CLK_VSP1_DU1 27 33#define R8A7791_CLK_VSP1_DU1 27
34#define R8A7791_CLK_VSP1_DU0 28 34#define R8A7791_CLK_VSP1_DU0 28
35#define R8A7791_CLK_VSP1_SY 31 35#define R8A7791_CLK_VSP1_S 31
36 36
37/* MSTP2 */ 37/* MSTP2 */
38#define R8A7791_CLK_SCIFA2 2 38#define R8A7791_CLK_SCIFA2 2
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 8c1603b10665..433528ab5161 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -29,7 +29,7 @@
29/* 10 (register bit affects spdif_in and spdif_out) */ 29/* 10 (register bit affects spdif_in and spdif_out) */
30#define TEGRA124_CLK_I2S1 11 30#define TEGRA124_CLK_I2S1 11
31#define TEGRA124_CLK_I2C1 12 31#define TEGRA124_CLK_I2C1 12
32#define TEGRA124_CLK_NDFLASH 13 32/* 13 */
33#define TEGRA124_CLK_SDMMC1 14 33#define TEGRA124_CLK_SDMMC1 14
34#define TEGRA124_CLK_SDMMC4 15 34#define TEGRA124_CLK_SDMMC4 15
35/* 16 */ 35/* 16 */
@@ -83,7 +83,7 @@
83 83
84/* 64 */ 84/* 64 */
85#define TEGRA124_CLK_UARTD 65 85#define TEGRA124_CLK_UARTD 65
86#define TEGRA124_CLK_UARTE 66 86/* 66 */
87#define TEGRA124_CLK_I2C3 67 87#define TEGRA124_CLK_I2C3 67
88#define TEGRA124_CLK_SBC4 68 88#define TEGRA124_CLK_SBC4 68
89#define TEGRA124_CLK_SDMMC3 69 89#define TEGRA124_CLK_SDMMC3 69
@@ -97,7 +97,7 @@
97#define TEGRA124_CLK_TRACE 77 97#define TEGRA124_CLK_TRACE 77
98#define TEGRA124_CLK_SOC_THERM 78 98#define TEGRA124_CLK_SOC_THERM 78
99#define TEGRA124_CLK_DTV 79 99#define TEGRA124_CLK_DTV 79
100#define TEGRA124_CLK_NDSPEED 80 100/* 80 */
101#define TEGRA124_CLK_I2CSLOW 81 101#define TEGRA124_CLK_I2CSLOW 81
102#define TEGRA124_CLK_DSIB 82 102#define TEGRA124_CLK_DSIB 82
103#define TEGRA124_CLK_TSEC 83 103#define TEGRA124_CLK_TSEC 83
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 3b9bfdb83ba6..3c7ec327ebd2 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -221,6 +221,8 @@ struct dentry_operations {
221#define DCACHE_SYMLINK_TYPE 0x00300000 /* Symlink */ 221#define DCACHE_SYMLINK_TYPE 0x00300000 /* Symlink */
222#define DCACHE_FILE_TYPE 0x00400000 /* Other file type */ 222#define DCACHE_FILE_TYPE 0x00400000 /* Other file type */
223 223
224#define DCACHE_MAY_FREE 0x00800000
225
224extern seqlock_t rename_lock; 226extern seqlock_t rename_lock;
225 227
226static inline int dname_external(const struct dentry *dentry) 228static inline int dname_external(const struct dentry *dentry)
diff --git a/include/linux/device.h b/include/linux/device.h
index 233bbbeb768d..d1d1c055b48e 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -566,12 +566,6 @@ extern int __must_check device_create_bin_file(struct device *dev,
566 const struct bin_attribute *attr); 566 const struct bin_attribute *attr);
567extern void device_remove_bin_file(struct device *dev, 567extern void device_remove_bin_file(struct device *dev,
568 const struct bin_attribute *attr); 568 const struct bin_attribute *attr);
569extern int device_schedule_callback_owner(struct device *dev,
570 void (*func)(struct device *dev), struct module *owner);
571
572/* This is a macro to avoid include problems with THIS_MODULE */
573#define device_schedule_callback(dev, func) \
574 device_schedule_callback_owner(dev, func, THIS_MODULE)
575 569
576/* device resource management */ 570/* device resource management */
577typedef void (*dr_release_t)(struct device *dev, void *res); 571typedef void (*dr_release_t)(struct device *dev, void *res);
@@ -932,10 +926,7 @@ extern int device_online(struct device *dev);
932extern struct device *__root_device_register(const char *name, 926extern struct device *__root_device_register(const char *name,
933 struct module *owner); 927 struct module *owner);
934 928
935/* 929/* This is a macro to avoid include problems with THIS_MODULE */
936 * This is a macro to avoid include problems with THIS_MODULE,
937 * just as per what is done for device_schedule_callback() above.
938 */
939#define root_device_register(name) \ 930#define root_device_register(name) \
940 __root_device_register(name, THIS_MODULE) 931 __root_device_register(name, THIS_MODULE)
941 932
diff --git a/include/linux/filter.h b/include/linux/filter.h
index 262dcbb75ffe..024fd03e5d18 100644
--- a/include/linux/filter.h
+++ b/include/linux/filter.h
@@ -220,7 +220,6 @@ enum {
220 BPF_S_ANC_RXHASH, 220 BPF_S_ANC_RXHASH,
221 BPF_S_ANC_CPU, 221 BPF_S_ANC_CPU,
222 BPF_S_ANC_ALU_XOR_X, 222 BPF_S_ANC_ALU_XOR_X,
223 BPF_S_ANC_SECCOMP_LD_W,
224 BPF_S_ANC_VLAN_TAG, 223 BPF_S_ANC_VLAN_TAG,
225 BPF_S_ANC_VLAN_TAG_PRESENT, 224 BPF_S_ANC_VLAN_TAG_PRESENT,
226 BPF_S_ANC_PAY_OFFSET, 225 BPF_S_ANC_PAY_OFFSET,
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 7a9c5bca2b76..878031227c57 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -815,7 +815,7 @@ static inline struct file *get_file(struct file *f)
815#define FL_SLEEP 128 /* A blocking lock */ 815#define FL_SLEEP 128 /* A blocking lock */
816#define FL_DOWNGRADE_PENDING 256 /* Lease is being downgraded */ 816#define FL_DOWNGRADE_PENDING 256 /* Lease is being downgraded */
817#define FL_UNLOCK_PENDING 512 /* Lease is being broken */ 817#define FL_UNLOCK_PENDING 512 /* Lease is being broken */
818#define FL_FILE_PVT 1024 /* lock is private to the file */ 818#define FL_OFDLCK 1024 /* lock is "owned" by struct file */
819 819
820/* 820/*
821 * Special return value from posix_lock_file() and vfs_lock_file() for 821 * Special return value from posix_lock_file() and vfs_lock_file() for
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index 9212b017bc72..ae9504b4b67d 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -535,6 +535,7 @@ static inline int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_a
535extern int ftrace_arch_read_dyn_info(char *buf, int size); 535extern int ftrace_arch_read_dyn_info(char *buf, int size);
536 536
537extern int skip_trace(unsigned long ip); 537extern int skip_trace(unsigned long ip);
538extern void ftrace_module_init(struct module *mod);
538 539
539extern void ftrace_disable_daemon(void); 540extern void ftrace_disable_daemon(void);
540extern void ftrace_enable_daemon(void); 541extern void ftrace_enable_daemon(void);
@@ -544,6 +545,7 @@ static inline int ftrace_force_update(void) { return 0; }
544static inline void ftrace_disable_daemon(void) { } 545static inline void ftrace_disable_daemon(void) { }
545static inline void ftrace_enable_daemon(void) { } 546static inline void ftrace_enable_daemon(void) { }
546static inline void ftrace_release_mod(struct module *mod) {} 547static inline void ftrace_release_mod(struct module *mod) {}
548static inline void ftrace_module_init(struct module *mod) {}
547static inline __init int register_ftrace_command(struct ftrace_func_command *cmd) 549static inline __init int register_ftrace_command(struct ftrace_func_command *cmd)
548{ 550{
549 return -EINVAL; 551 return -EINVAL;
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 5b337cf8fb86..b65166de1d9d 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -412,6 +412,16 @@ static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
412 return &mm->page_table_lock; 412 return &mm->page_table_lock;
413} 413}
414 414
415static inline bool hugepages_supported(void)
416{
417 /*
418 * Some platform decide whether they support huge pages at boot
419 * time. On these, such as powerpc, HPAGE_SHIFT is set to 0 when
420 * there is no such support
421 */
422 return HPAGE_SHIFT != 0;
423}
424
415#else /* CONFIG_HUGETLB_PAGE */ 425#else /* CONFIG_HUGETLB_PAGE */
416struct hstate {}; 426struct hstate {};
417#define alloc_huge_page_node(h, nid) NULL 427#define alloc_huge_page_node(h, nid) NULL
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index ab7359fde987..2d7b4f139c32 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -147,15 +147,17 @@ hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,
147 * 0 . 13 (Windows Server 2008) 147 * 0 . 13 (Windows Server 2008)
148 * 1 . 1 (Windows 7) 148 * 1 . 1 (Windows 7)
149 * 2 . 4 (Windows 8) 149 * 2 . 4 (Windows 8)
150 * 3 . 0 (Windows 8 R2)
150 */ 151 */
151 152
152#define VERSION_WS2008 ((0 << 16) | (13)) 153#define VERSION_WS2008 ((0 << 16) | (13))
153#define VERSION_WIN7 ((1 << 16) | (1)) 154#define VERSION_WIN7 ((1 << 16) | (1))
154#define VERSION_WIN8 ((2 << 16) | (4)) 155#define VERSION_WIN8 ((2 << 16) | (4))
156#define VERSION_WIN8_1 ((3 << 16) | (0))
155 157
156#define VERSION_INVAL -1 158#define VERSION_INVAL -1
157 159
158#define VERSION_CURRENT VERSION_WIN8 160#define VERSION_CURRENT VERSION_WIN8_1
159 161
160/* Make maximum size of pipe payload of 16K */ 162/* Make maximum size of pipe payload of 16K */
161#define MAX_PIPE_DATA_PAYLOAD (sizeof(u8) * 16384) 163#define MAX_PIPE_DATA_PAYLOAD (sizeof(u8) * 16384)
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index c7bfac1c4a7b..97ac926c78a7 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -203,7 +203,40 @@ static inline int check_wakeup_irqs(void) { return 0; }
203 203
204extern cpumask_var_t irq_default_affinity; 204extern cpumask_var_t irq_default_affinity;
205 205
206extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask); 206/* Internal implementation. Use the helpers below */
207extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask,
208 bool force);
209
210/**
211 * irq_set_affinity - Set the irq affinity of a given irq
212 * @irq: Interrupt to set affinity
213 * @cpumask: cpumask
214 *
215 * Fails if cpumask does not contain an online CPU
216 */
217static inline int
218irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
219{
220 return __irq_set_affinity(irq, cpumask, false);
221}
222
223/**
224 * irq_force_affinity - Force the irq affinity of a given irq
225 * @irq: Interrupt to set affinity
226 * @cpumask: cpumask
227 *
228 * Same as irq_set_affinity, but without checking the mask against
229 * online cpus.
230 *
231 * Solely for low level cpu hotplug code, where we need to make per
232 * cpu interrupts affine before the cpu becomes online.
233 */
234static inline int
235irq_force_affinity(unsigned int irq, const struct cpumask *cpumask)
236{
237 return __irq_set_affinity(irq, cpumask, true);
238}
239
207extern int irq_can_set_affinity(unsigned int irq); 240extern int irq_can_set_affinity(unsigned int irq);
208extern int irq_select_affinity(unsigned int irq); 241extern int irq_select_affinity(unsigned int irq);
209 242
diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h
index 1f9f56e28851..76d2acbfa7c6 100644
--- a/include/linux/ipmi.h
+++ b/include/linux/ipmi.h
@@ -237,7 +237,7 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode);
237 * The first user that sets this to TRUE will receive all events that 237 * The first user that sets this to TRUE will receive all events that
238 * have been queued while no one was waiting for events. 238 * have been queued while no one was waiting for events.
239 */ 239 */
240int ipmi_set_gets_events(ipmi_user_t user, int val); 240int ipmi_set_gets_events(ipmi_user_t user, bool val);
241 241
242/* 242/*
243 * Called when a new SMI is registered. This will also be called on 243 * Called when a new SMI is registered. This will also be called on
diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h
index 8ea3fe0b9759..bd349240d50e 100644
--- a/include/linux/ipmi_smi.h
+++ b/include/linux/ipmi_smi.h
@@ -109,12 +109,19 @@ struct ipmi_smi_handlers {
109 events from the BMC we are attached to. */ 109 events from the BMC we are attached to. */
110 void (*request_events)(void *send_info); 110 void (*request_events)(void *send_info);
111 111
112 /* Called by the upper layer when some user requires that the
113 interface watch for events, received messages, watchdog
114 pretimeouts, or not. Used by the SMI to know if it should
115 watch for these. This may be NULL if the SMI does not
116 implement it. */
117 void (*set_need_watch)(void *send_info, bool enable);
118
112 /* Called when the interface should go into "run to 119 /* Called when the interface should go into "run to
113 completion" mode. If this call sets the value to true, the 120 completion" mode. If this call sets the value to true, the
114 interface should make sure that all messages are flushed 121 interface should make sure that all messages are flushed
115 out and that none are pending, and any new requests are run 122 out and that none are pending, and any new requests are run
116 to completion immediately. */ 123 to completion immediately. */
117 void (*set_run_to_completion)(void *send_info, int run_to_completion); 124 void (*set_run_to_completion)(void *send_info, bool run_to_completion);
118 125
119 /* Called to poll for work to do. This is so upper layers can 126 /* Called to poll for work to do. This is so upper layers can
120 poll for operations during things like crash dumps. */ 127 poll for operations during things like crash dumps. */
@@ -125,7 +132,7 @@ struct ipmi_smi_handlers {
125 setting. The message handler does the mode handling. Note 132 setting. The message handler does the mode handling. Note
126 that this is called from interrupt context, so it cannot 133 that this is called from interrupt context, so it cannot
127 block. */ 134 block. */
128 void (*set_maintenance_mode)(void *send_info, int enable); 135 void (*set_maintenance_mode)(void *send_info, bool enable);
129 136
130 /* Tell the handler that we are using it/not using it. The 137 /* Tell the handler that we are using it/not using it. The
131 message handler get the modules that this handler belongs 138 message handler get the modules that this handler belongs
diff --git a/include/linux/irq.h b/include/linux/irq.h
index d278838908cb..5c57efb863d0 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -394,7 +394,8 @@ extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
394 394
395extern void irq_cpu_online(void); 395extern void irq_cpu_online(void);
396extern void irq_cpu_offline(void); 396extern void irq_cpu_offline(void);
397extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask); 397extern int irq_set_affinity_locked(struct irq_data *data,
398 const struct cpumask *cpumask, bool force);
398 399
399#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ) 400#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
400void irq_move_irq(struct irq_data *data); 401void irq_move_irq(struct irq_data *data);
@@ -602,6 +603,8 @@ static inline u32 irq_get_trigger_type(unsigned int irq)
602 return d ? irqd_get_trigger_type(d) : 0; 603 return d ? irqd_get_trigger_type(d) : 0;
603} 604}
604 605
606unsigned int arch_dynirq_lower_bound(unsigned int from);
607
605int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, 608int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
606 struct module *owner); 609 struct module *owner);
607 610
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 1de36be64df4..5ab4e3a76721 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -822,6 +822,7 @@ struct ata_port {
822 unsigned long qc_allocated; 822 unsigned long qc_allocated;
823 unsigned int qc_active; 823 unsigned int qc_active;
824 int nr_active_links; /* #links with active qcs */ 824 int nr_active_links; /* #links with active qcs */
825 unsigned int last_tag; /* track next tag hw expects */
825 826
826 struct ata_link link; /* host default link */ 827 struct ata_link link; /* host default link */
827 struct ata_link *slave_link; /* see ata_slave_link_init() */ 828 struct ata_link *slave_link; /* see ata_slave_link_init() */
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 34a513a2727b..a6a42dd02466 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -12,9 +12,9 @@
12#endif 12#endif
13 13
14#ifdef __cplusplus 14#ifdef __cplusplus
15#define CPP_ASMLINKAGE extern "C" __visible 15#define CPP_ASMLINKAGE extern "C"
16#else 16#else
17#define CPP_ASMLINKAGE __visible 17#define CPP_ASMLINKAGE
18#endif 18#endif
19 19
20#ifndef asmlinkage 20#ifndef asmlinkage
diff --git a/include/linux/mdio-gpio.h b/include/linux/mdio-gpio.h
index 7c9fe3c2be73..66c30a763b10 100644
--- a/include/linux/mdio-gpio.h
+++ b/include/linux/mdio-gpio.h
@@ -17,6 +17,11 @@ struct mdio_gpio_platform_data {
17 /* GPIO numbers for bus pins */ 17 /* GPIO numbers for bus pins */
18 unsigned int mdc; 18 unsigned int mdc;
19 unsigned int mdio; 19 unsigned int mdio;
20 unsigned int mdo;
21
22 bool mdc_active_low;
23 bool mdio_active_low;
24 bool mdo_active_low;
20 25
21 unsigned int phy_mask; 26 unsigned int phy_mask;
22 int irqs[PHY_MAX_ADDR]; 27 int irqs[PHY_MAX_ADDR];
diff --git a/include/linux/mfd/rtsx_common.h b/include/linux/mfd/rtsx_common.h
index 7c36cc55d2c7..443176ee1ab0 100644
--- a/include/linux/mfd/rtsx_common.h
+++ b/include/linux/mfd/rtsx_common.h
@@ -45,7 +45,6 @@ struct platform_device;
45struct rtsx_slot { 45struct rtsx_slot {
46 struct platform_device *p_dev; 46 struct platform_device *p_dev;
47 void (*card_event)(struct platform_device *p_dev); 47 void (*card_event)(struct platform_device *p_dev);
48 void (*done_transfer)(struct platform_device *p_dev);
49}; 48};
50 49
51#endif 50#endif
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 8d6bbd609ad9..a3835976f7c6 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -943,12 +943,6 @@ void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
943int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout); 943int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
944int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, 944int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
945 int num_sg, bool read, int timeout); 945 int num_sg, bool read, int timeout);
946int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
947 int num_sg, bool read);
948int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
949 int num_sg, bool read);
950int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
951 int sg_count, bool read);
952int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); 946int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
953int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); 947int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
954int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card); 948int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 407bdb67fd4f..3406cfb1267a 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -179,6 +179,7 @@ enum {
179 MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9, 179 MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
180 MLX5_DEV_CAP_FLAG_APM = 1LL << 17, 180 MLX5_DEV_CAP_FLAG_APM = 1LL << 17,
181 MLX5_DEV_CAP_FLAG_ATOMIC = 1LL << 18, 181 MLX5_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
182 MLX5_DEV_CAP_FLAG_BLOCK_MCAST = 1LL << 23,
182 MLX5_DEV_CAP_FLAG_ON_DMND_PG = 1LL << 24, 183 MLX5_DEV_CAP_FLAG_ON_DMND_PG = 1LL << 24,
183 MLX5_DEV_CAP_FLAG_CQ_MODER = 1LL << 29, 184 MLX5_DEV_CAP_FLAG_CQ_MODER = 1LL << 29,
184 MLX5_DEV_CAP_FLAG_RESIZE_CQ = 1LL << 30, 185 MLX5_DEV_CAP_FLAG_RESIZE_CQ = 1LL << 30,
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index f829ad80ff28..9709b30e2d69 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -146,6 +146,7 @@ enum {
146 146
147enum { 147enum {
148 MLX5_QP_LAT_SENSITIVE = 1 << 28, 148 MLX5_QP_LAT_SENSITIVE = 1 << 28,
149 MLX5_QP_BLOCK_MCAST = 1 << 30,
149 MLX5_QP_ENABLE_SIG = 1 << 31, 150 MLX5_QP_ENABLE_SIG = 1 << 31,
150}; 151};
151 152
diff --git a/include/linux/mm.h b/include/linux/mm.h
index bf9811e1321a..d6777060449f 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -370,6 +370,8 @@ static inline int is_vmalloc_or_module_addr(const void *x)
370} 370}
371#endif 371#endif
372 372
373extern void kvfree(const void *addr);
374
373static inline void compound_lock(struct page *page) 375static inline void compound_lock(struct page *page)
374{ 376{
375#ifdef CONFIG_TRANSPARENT_HUGEPAGE 377#ifdef CONFIG_TRANSPARENT_HUGEPAGE
diff --git a/include/linux/mtd/spear_smi.h b/include/linux/mtd/spear_smi.h
index 8ae1726044c3..581603ac1277 100644
--- a/include/linux/mtd/spear_smi.h
+++ b/include/linux/mtd/spear_smi.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright © 2010 ST Microelectronics 2 * Copyright © 2010 ST Microelectronics
3 * Shiraz Hashim <shiraz.hashim@st.com> 3 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
4 * 4 *
5 * This file is licensed under the terms of the GNU General Public 5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any 6 * License version 2. This program is licensed "as is" without any
diff --git a/include/linux/netfilter/nf_conntrack_proto_gre.h b/include/linux/netfilter/nf_conntrack_proto_gre.h
index ec2ffaf418c8..df78dc2b5524 100644
--- a/include/linux/netfilter/nf_conntrack_proto_gre.h
+++ b/include/linux/netfilter/nf_conntrack_proto_gre.h
@@ -87,7 +87,6 @@ int nf_ct_gre_keymap_add(struct nf_conn *ct, enum ip_conntrack_dir dir,
87/* delete keymap entries */ 87/* delete keymap entries */
88void nf_ct_gre_keymap_destroy(struct nf_conn *ct); 88void nf_ct_gre_keymap_destroy(struct nf_conn *ct);
89 89
90void nf_ct_gre_keymap_flush(struct net *net);
91void nf_nat_need_gre(void); 90void nf_nat_need_gre(void);
92 91
93#endif /* __KERNEL__ */ 92#endif /* __KERNEL__ */
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index aad8eeaf416d..f64b01787ddc 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -169,4 +169,11 @@ struct netlink_tap {
169extern int netlink_add_tap(struct netlink_tap *nt); 169extern int netlink_add_tap(struct netlink_tap *nt);
170extern int netlink_remove_tap(struct netlink_tap *nt); 170extern int netlink_remove_tap(struct netlink_tap *nt);
171 171
172bool __netlink_ns_capable(const struct netlink_skb_parms *nsp,
173 struct user_namespace *ns, int cap);
174bool netlink_ns_capable(const struct sk_buff *skb,
175 struct user_namespace *ns, int cap);
176bool netlink_capable(const struct sk_buff *skb, int cap);
177bool netlink_net_capable(const struct sk_buff *skb, int cap);
178
172#endif /* __LINUX_NETLINK_H */ 179#endif /* __LINUX_NETLINK_H */
diff --git a/include/linux/of.h b/include/linux/of.h
index 919bf211877d..3bad8d106e0e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -374,6 +374,11 @@ static inline struct device_node *of_find_matching_node_and_match(
374 return NULL; 374 return NULL;
375} 375}
376 376
377static inline struct device_node *of_find_node_by_path(const char *path)
378{
379 return NULL;
380}
381
377static inline struct device_node *of_get_parent(const struct device_node *node) 382static inline struct device_node *of_get_parent(const struct device_node *node)
378{ 383{
379 return NULL; 384 return NULL;
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 3f23b4472c31..6404253d810d 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -44,11 +44,16 @@ extern void of_irq_init(const struct of_device_id *matches);
44 44
45#ifdef CONFIG_OF_IRQ 45#ifdef CONFIG_OF_IRQ
46extern int of_irq_count(struct device_node *dev); 46extern int of_irq_count(struct device_node *dev);
47extern int of_irq_get(struct device_node *dev, int index);
47#else 48#else
48static inline int of_irq_count(struct device_node *dev) 49static inline int of_irq_count(struct device_node *dev)
49{ 50{
50 return 0; 51 return 0;
51} 52}
53static inline int of_irq_get(struct device_node *dev, int index)
54{
55 return 0;
56}
52#endif 57#endif
53 58
54#if defined(CONFIG_OF) 59#if defined(CONFIG_OF)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 24126c4b27b5..4d0221fd0688 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -75,6 +75,7 @@ typedef enum {
75 PHY_INTERFACE_MODE_SMII, 75 PHY_INTERFACE_MODE_SMII,
76 PHY_INTERFACE_MODE_XGMII, 76 PHY_INTERFACE_MODE_XGMII,
77 PHY_INTERFACE_MODE_MOCA, 77 PHY_INTERFACE_MODE_MOCA,
78 PHY_INTERFACE_MODE_QSGMII,
78 PHY_INTERFACE_MODE_MAX, 79 PHY_INTERFACE_MODE_MAX,
79} phy_interface_t; 80} phy_interface_t;
80 81
@@ -116,6 +117,8 @@ static inline const char *phy_modes(phy_interface_t interface)
116 return "xgmii"; 117 return "xgmii";
117 case PHY_INTERFACE_MODE_MOCA: 118 case PHY_INTERFACE_MODE_MOCA:
118 return "moca"; 119 return "moca";
120 case PHY_INTERFACE_MODE_QSGMII:
121 return "qsgmii";
119 default: 122 default:
120 return "unknown"; 123 return "unknown";
121 } 124 }
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e2f5ca96cddc..2760744cb2a7 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -174,21 +174,29 @@ void devm_of_phy_provider_unregister(struct device *dev,
174#else 174#else
175static inline int phy_pm_runtime_get(struct phy *phy) 175static inline int phy_pm_runtime_get(struct phy *phy)
176{ 176{
177 if (!phy)
178 return 0;
177 return -ENOSYS; 179 return -ENOSYS;
178} 180}
179 181
180static inline int phy_pm_runtime_get_sync(struct phy *phy) 182static inline int phy_pm_runtime_get_sync(struct phy *phy)
181{ 183{
184 if (!phy)
185 return 0;
182 return -ENOSYS; 186 return -ENOSYS;
183} 187}
184 188
185static inline int phy_pm_runtime_put(struct phy *phy) 189static inline int phy_pm_runtime_put(struct phy *phy)
186{ 190{
191 if (!phy)
192 return 0;
187 return -ENOSYS; 193 return -ENOSYS;
188} 194}
189 195
190static inline int phy_pm_runtime_put_sync(struct phy *phy) 196static inline int phy_pm_runtime_put_sync(struct phy *phy)
191{ 197{
198 if (!phy)
199 return 0;
192 return -ENOSYS; 200 return -ENOSYS;
193} 201}
194 202
@@ -204,21 +212,29 @@ static inline void phy_pm_runtime_forbid(struct phy *phy)
204 212
205static inline int phy_init(struct phy *phy) 213static inline int phy_init(struct phy *phy)
206{ 214{
215 if (!phy)
216 return 0;
207 return -ENOSYS; 217 return -ENOSYS;
208} 218}
209 219
210static inline int phy_exit(struct phy *phy) 220static inline int phy_exit(struct phy *phy)
211{ 221{
222 if (!phy)
223 return 0;
212 return -ENOSYS; 224 return -ENOSYS;
213} 225}
214 226
215static inline int phy_power_on(struct phy *phy) 227static inline int phy_power_on(struct phy *phy)
216{ 228{
229 if (!phy)
230 return 0;
217 return -ENOSYS; 231 return -ENOSYS;
218} 232}
219 233
220static inline int phy_power_off(struct phy *phy) 234static inline int phy_power_off(struct phy *phy)
221{ 235{
236 if (!phy)
237 return 0;
222 return -ENOSYS; 238 return -ENOSYS;
223} 239}
224 240
diff --git a/include/linux/platform_data/adau17x1.h b/include/linux/platform_data/adau17x1.h
new file mode 100644
index 000000000000..a81766cae230
--- /dev/null
+++ b/include/linux/platform_data/adau17x1.h
@@ -0,0 +1,109 @@
1/*
2 * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961/ADAU1781/ADAU1781 codecs
3 *
4 * Copyright 2011-2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#ifndef __LINUX_PLATFORM_DATA_ADAU17X1_H__
11#define __LINUX_PLATFORM_DATA_ADAU17X1_H__
12
13/**
14 * enum adau17x1_micbias_voltage - Microphone bias voltage
15 * @ADAU17X1_MICBIAS_0_90_AVDD: 0.9 * AVDD
16 * @ADAU17X1_MICBIAS_0_65_AVDD: 0.65 * AVDD
17 */
18enum adau17x1_micbias_voltage {
19 ADAU17X1_MICBIAS_0_90_AVDD = 0,
20 ADAU17X1_MICBIAS_0_65_AVDD = 1,
21};
22
23/**
24 * enum adau1761_digmic_jackdet_pin_mode - Configuration of the JACKDET/MICIN pin
25 * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: Disable the pin
26 * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: Configure the pin for usage as
27 * digital microphone input.
28 * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: Configure the pin for jack
29 * insertion detection.
30 */
31enum adau1761_digmic_jackdet_pin_mode {
32 ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE,
33 ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC,
34 ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT,
35};
36
37/**
38 * adau1761_jackdetect_debounce_time - Jack insertion detection debounce time
39 * @ADAU1761_JACKDETECT_DEBOUNCE_5MS: 5 milliseconds
40 * @ADAU1761_JACKDETECT_DEBOUNCE_10MS: 10 milliseconds
41 * @ADAU1761_JACKDETECT_DEBOUNCE_20MS: 20 milliseconds
42 * @ADAU1761_JACKDETECT_DEBOUNCE_40MS: 40 milliseconds
43 */
44enum adau1761_jackdetect_debounce_time {
45 ADAU1761_JACKDETECT_DEBOUNCE_5MS = 0,
46 ADAU1761_JACKDETECT_DEBOUNCE_10MS = 1,
47 ADAU1761_JACKDETECT_DEBOUNCE_20MS = 2,
48 ADAU1761_JACKDETECT_DEBOUNCE_40MS = 3,
49};
50
51/**
52 * enum adau1761_output_mode - Output mode configuration
53 * @ADAU1761_OUTPUT_MODE_HEADPHONE: Headphone output
54 * @ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: Capless headphone output
55 * @ADAU1761_OUTPUT_MODE_LINE: Line output
56 */
57enum adau1761_output_mode {
58 ADAU1761_OUTPUT_MODE_HEADPHONE,
59 ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
60 ADAU1761_OUTPUT_MODE_LINE,
61};
62
63/**
64 * struct adau1761_platform_data - ADAU1761 Codec driver platform data
65 * @input_differential: If true the input pins will be configured in
66 * differential mode.
67 * @lineout_mode: Output mode for the LOUT/ROUT pins
68 * @headphone_mode: Output mode for the LHP/RHP pins
69 * @digmic_jackdetect_pin_mode: JACKDET/MICIN pin configuration
70 * @jackdetect_debounce_time: Jack insertion detection debounce time.
71 * Note: This value will only be used, if the JACKDET/MICIN pin is configured
72 * for jack insertion detection.
73 * @jackdetect_active_low: If true the jack insertion detection is active low.
74 * Othwise it will be active high.
75 * @micbias_voltage: Microphone voltage bias
76 */
77struct adau1761_platform_data {
78 bool input_differential;
79 enum adau1761_output_mode lineout_mode;
80 enum adau1761_output_mode headphone_mode;
81
82 enum adau1761_digmic_jackdet_pin_mode digmic_jackdetect_pin_mode;
83
84 enum adau1761_jackdetect_debounce_time jackdetect_debounce_time;
85 bool jackdetect_active_low;
86
87 enum adau17x1_micbias_voltage micbias_voltage;
88};
89
90/**
91 * struct adau1781_platform_data - ADAU1781 Codec driver platform data
92 * @left_input_differential: If true configure the left input as
93 * differential input.
94 * @right_input_differential: If true configure the right input as differntial
95 * input.
96 * @use_dmic: If true configure the MIC pins as digital microphone pins instead
97 * of analog microphone pins.
98 * @micbias_voltage: Microphone voltage bias
99 */
100struct adau1781_platform_data {
101 bool left_input_differential;
102 bool right_input_differential;
103
104 bool use_dmic;
105
106 enum adau17x1_micbias_voltage micbias_voltage;
107};
108
109#endif
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index 9e7db9e73cc1..48bf152761c7 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -20,13 +20,13 @@ enum reboot_mode {
20extern enum reboot_mode reboot_mode; 20extern enum reboot_mode reboot_mode;
21 21
22enum reboot_type { 22enum reboot_type {
23 BOOT_TRIPLE = 't', 23 BOOT_TRIPLE = 't',
24 BOOT_KBD = 'k', 24 BOOT_KBD = 'k',
25 BOOT_BIOS = 'b', 25 BOOT_BIOS = 'b',
26 BOOT_ACPI = 'a', 26 BOOT_ACPI = 'a',
27 BOOT_EFI = 'e', 27 BOOT_EFI = 'e',
28 BOOT_CF9 = 'p', 28 BOOT_CF9_FORCE = 'p',
29 BOOT_CF9_COND = 'q', 29 BOOT_CF9_SAFE = 'q',
30}; 30};
31extern enum reboot_type reboot_type; 31extern enum reboot_type reboot_type;
32 32
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h
index e530681bea70..1a4a8c157b31 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -258,14 +258,14 @@ regulator_get_exclusive(struct device *dev, const char *id)
258static inline struct regulator *__must_check 258static inline struct regulator *__must_check
259regulator_get_optional(struct device *dev, const char *id) 259regulator_get_optional(struct device *dev, const char *id)
260{ 260{
261 return NULL; 261 return ERR_PTR(-ENODEV);
262} 262}
263 263
264 264
265static inline struct regulator *__must_check 265static inline struct regulator *__must_check
266devm_regulator_get_optional(struct device *dev, const char *id) 266devm_regulator_get_optional(struct device *dev, const char *id)
267{ 267{
268 return NULL; 268 return ERR_PTR(-ENODEV);
269} 269}
270 270
271static inline void regulator_put(struct regulator *regulator) 271static inline void regulator_put(struct regulator *regulator)
diff --git a/include/linux/serio.h b/include/linux/serio.h
index 36aac733840a..9f779c7a2da4 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -23,6 +23,7 @@ struct serio {
23 23
24 char name[32]; 24 char name[32];
25 char phys[32]; 25 char phys[32];
26 char firmware_id[128];
26 27
27 bool manual_bind; 28 bool manual_bind;
28 29
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index f2f7398848cf..d82abd40a3c0 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -101,4 +101,13 @@ struct kmem_cache {
101 struct kmem_cache_node *node[MAX_NUMNODES]; 101 struct kmem_cache_node *node[MAX_NUMNODES];
102}; 102};
103 103
104#ifdef CONFIG_SYSFS
105#define SLAB_SUPPORTS_SYSFS
106void sysfs_slab_remove(struct kmem_cache *);
107#else
108static inline void sysfs_slab_remove(struct kmem_cache *s)
109{
110}
111#endif
112
104#endif /* _LINUX_SLUB_DEF_H */ 113#endif /* _LINUX_SLUB_DEF_H */
diff --git a/include/linux/sock_diag.h b/include/linux/sock_diag.h
index 54f91d35e5fd..46cca4c06848 100644
--- a/include/linux/sock_diag.h
+++ b/include/linux/sock_diag.h
@@ -23,7 +23,7 @@ int sock_diag_check_cookie(void *sk, __u32 *cookie);
23void sock_diag_save_cookie(void *sk, __u32 *cookie); 23void sock_diag_save_cookie(void *sk, __u32 *cookie);
24 24
25int sock_diag_put_meminfo(struct sock *sk, struct sk_buff *skb, int attr); 25int sock_diag_put_meminfo(struct sock *sk, struct sk_buff *skb, int attr);
26int sock_diag_put_filterinfo(struct user_namespace *user_ns, struct sock *sk, 26int sock_diag_put_filterinfo(bool may_report_filterinfo, struct sock *sk,
27 struct sk_buff *skb, int attrtype); 27 struct sk_buff *skb, int attrtype);
28 28
29#endif 29#endif
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index 084354b0e814..5ffaa3443712 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -179,9 +179,6 @@ struct sysfs_ops {
179 179
180#ifdef CONFIG_SYSFS 180#ifdef CONFIG_SYSFS
181 181
182int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
183 void *data, struct module *owner);
184
185int __must_check sysfs_create_dir_ns(struct kobject *kobj, const void *ns); 182int __must_check sysfs_create_dir_ns(struct kobject *kobj, const void *ns);
186void sysfs_remove_dir(struct kobject *kobj); 183void sysfs_remove_dir(struct kobject *kobj);
187int __must_check sysfs_rename_dir_ns(struct kobject *kobj, const char *new_name, 184int __must_check sysfs_rename_dir_ns(struct kobject *kobj, const char *new_name,
@@ -255,12 +252,6 @@ static inline void sysfs_enable_ns(struct kernfs_node *kn)
255 252
256#else /* CONFIG_SYSFS */ 253#else /* CONFIG_SYSFS */
257 254
258static inline int sysfs_schedule_callback(struct kobject *kobj,
259 void (*func)(void *), void *data, struct module *owner)
260{
261 return -ENOSYS;
262}
263
264static inline int sysfs_create_dir_ns(struct kobject *kobj, const void *ns) 255static inline int sysfs_create_dir_ns(struct kobject *kobj, const void *ns)
265{ 256{
266 return 0; 257 return 0;
diff --git a/include/linux/wait.h b/include/linux/wait.h
index e7d9d9ed14f5..bd68819f0815 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -191,11 +191,23 @@ wait_queue_head_t *bit_waitqueue(void *, int);
191 (!__builtin_constant_p(state) || \ 191 (!__builtin_constant_p(state) || \
192 state == TASK_INTERRUPTIBLE || state == TASK_KILLABLE) \ 192 state == TASK_INTERRUPTIBLE || state == TASK_KILLABLE) \
193 193
194/*
195 * The below macro ___wait_event() has an explicit shadow of the __ret
196 * variable when used from the wait_event_*() macros.
197 *
198 * This is so that both can use the ___wait_cond_timeout() construct
199 * to wrap the condition.
200 *
201 * The type inconsistency of the wait_event_*() __ret variable is also
202 * on purpose; we use long where we can return timeout values and int
203 * otherwise.
204 */
205
194#define ___wait_event(wq, condition, state, exclusive, ret, cmd) \ 206#define ___wait_event(wq, condition, state, exclusive, ret, cmd) \
195({ \ 207({ \
196 __label__ __out; \ 208 __label__ __out; \
197 wait_queue_t __wait; \ 209 wait_queue_t __wait; \
198 long __ret = ret; \ 210 long __ret = ret; /* explicit shadow */ \
199 \ 211 \
200 INIT_LIST_HEAD(&__wait.task_list); \ 212 INIT_LIST_HEAD(&__wait.task_list); \
201 if (exclusive) \ 213 if (exclusive) \
diff --git a/include/net/af_vsock.h b/include/net/af_vsock.h
index 7d64d3609ec9..428277869400 100644
--- a/include/net/af_vsock.h
+++ b/include/net/af_vsock.h
@@ -155,7 +155,11 @@ struct vsock_transport {
155 155
156/**** CORE ****/ 156/**** CORE ****/
157 157
158int vsock_core_init(const struct vsock_transport *t); 158int __vsock_core_init(const struct vsock_transport *t, struct module *owner);
159static inline int vsock_core_init(const struct vsock_transport *t)
160{
161 return __vsock_core_init(t, THIS_MODULE);
162}
159void vsock_core_exit(void); 163void vsock_core_exit(void);
160 164
161/**** UTILS ****/ 165/**** UTILS ****/
diff --git a/include/net/dst.h b/include/net/dst.h
index 46ed958e0c6e..71c60f42be48 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -45,7 +45,7 @@ struct dst_entry {
45 void *__pad1; 45 void *__pad1;
46#endif 46#endif
47 int (*input)(struct sk_buff *); 47 int (*input)(struct sk_buff *);
48 int (*output)(struct sk_buff *); 48 int (*output)(struct sock *sk, struct sk_buff *skb);
49 49
50 unsigned short flags; 50 unsigned short flags;
51#define DST_HOST 0x0001 51#define DST_HOST 0x0001
@@ -367,7 +367,11 @@ static inline struct dst_entry *skb_dst_pop(struct sk_buff *skb)
367 return child; 367 return child;
368} 368}
369 369
370int dst_discard(struct sk_buff *skb); 370int dst_discard_sk(struct sock *sk, struct sk_buff *skb);
371static inline int dst_discard(struct sk_buff *skb)
372{
373 return dst_discard_sk(skb->sk, skb);
374}
371void *dst_alloc(struct dst_ops *ops, struct net_device *dev, int initial_ref, 375void *dst_alloc(struct dst_ops *ops, struct net_device *dev, int initial_ref,
372 int initial_obsolete, unsigned short flags); 376 int initial_obsolete, unsigned short flags);
373void __dst_free(struct dst_entry *dst); 377void __dst_free(struct dst_entry *dst);
@@ -449,9 +453,13 @@ static inline void dst_set_expires(struct dst_entry *dst, int timeout)
449} 453}
450 454
451/* Output packet to network from transport. */ 455/* Output packet to network from transport. */
456static inline int dst_output_sk(struct sock *sk, struct sk_buff *skb)
457{
458 return skb_dst(skb)->output(sk, skb);
459}
452static inline int dst_output(struct sk_buff *skb) 460static inline int dst_output(struct sk_buff *skb)
453{ 461{
454 return skb_dst(skb)->output(skb); 462 return dst_output_sk(skb->sk, skb);
455} 463}
456 464
457/* Input packet from network to transport. */ 465/* Input packet from network to transport. */
diff --git a/include/net/flow.h b/include/net/flow.h
index 64fd24836650..8109a159d1b3 100644
--- a/include/net/flow.h
+++ b/include/net/flow.h
@@ -11,6 +11,14 @@
11#include <linux/in6.h> 11#include <linux/in6.h>
12#include <linux/atomic.h> 12#include <linux/atomic.h>
13 13
14/*
15 * ifindex generation is per-net namespace, and loopback is
16 * always the 1st device in ns (see net_dev_init), thus any
17 * loopback device should get ifindex 1
18 */
19
20#define LOOPBACK_IFINDEX 1
21
14struct flowi_common { 22struct flowi_common {
15 int flowic_oif; 23 int flowic_oif;
16 int flowic_iif; 24 int flowic_iif;
@@ -80,7 +88,7 @@ static inline void flowi4_init_output(struct flowi4 *fl4, int oif,
80 __be16 dport, __be16 sport) 88 __be16 dport, __be16 sport)
81{ 89{
82 fl4->flowi4_oif = oif; 90 fl4->flowi4_oif = oif;
83 fl4->flowi4_iif = 0; 91 fl4->flowi4_iif = LOOPBACK_IFINDEX;
84 fl4->flowi4_mark = mark; 92 fl4->flowi4_mark = mark;
85 fl4->flowi4_tos = tos; 93 fl4->flowi4_tos = tos;
86 fl4->flowi4_scope = scope; 94 fl4->flowi4_scope = scope;
diff --git a/include/net/inet6_connection_sock.h b/include/net/inet6_connection_sock.h
index f981ba7adeed..74af137304be 100644
--- a/include/net/inet6_connection_sock.h
+++ b/include/net/inet6_connection_sock.h
@@ -40,7 +40,7 @@ void inet6_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req,
40 40
41void inet6_csk_addr2sockaddr(struct sock *sk, struct sockaddr *uaddr); 41void inet6_csk_addr2sockaddr(struct sock *sk, struct sockaddr *uaddr);
42 42
43int inet6_csk_xmit(struct sk_buff *skb, struct flowi *fl); 43int inet6_csk_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
44 44
45struct dst_entry *inet6_csk_update_pmtu(struct sock *sk, u32 mtu); 45struct dst_entry *inet6_csk_update_pmtu(struct sock *sk, u32 mtu);
46#endif /* _INET6_CONNECTION_SOCK_H */ 46#endif /* _INET6_CONNECTION_SOCK_H */
diff --git a/include/net/inet_connection_sock.h b/include/net/inet_connection_sock.h
index c55aeed41ace..7a4313887568 100644
--- a/include/net/inet_connection_sock.h
+++ b/include/net/inet_connection_sock.h
@@ -36,7 +36,7 @@ struct tcp_congestion_ops;
36 * (i.e. things that depend on the address family) 36 * (i.e. things that depend on the address family)
37 */ 37 */
38struct inet_connection_sock_af_ops { 38struct inet_connection_sock_af_ops {
39 int (*queue_xmit)(struct sk_buff *skb, struct flowi *fl); 39 int (*queue_xmit)(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
40 void (*send_check)(struct sock *sk, struct sk_buff *skb); 40 void (*send_check)(struct sock *sk, struct sk_buff *skb);
41 int (*rebuild_header)(struct sock *sk); 41 int (*rebuild_header)(struct sock *sk);
42 void (*sk_rx_dst_set)(struct sock *sk, const struct sk_buff *skb); 42 void (*sk_rx_dst_set)(struct sock *sk, const struct sk_buff *skb);
diff --git a/include/net/ip.h b/include/net/ip.h
index 25064c28e059..3ec2b0fb9d83 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -104,14 +104,19 @@ int ip_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_type *pt,
104 struct net_device *orig_dev); 104 struct net_device *orig_dev);
105int ip_local_deliver(struct sk_buff *skb); 105int ip_local_deliver(struct sk_buff *skb);
106int ip_mr_input(struct sk_buff *skb); 106int ip_mr_input(struct sk_buff *skb);
107int ip_output(struct sk_buff *skb); 107int ip_output(struct sock *sk, struct sk_buff *skb);
108int ip_mc_output(struct sk_buff *skb); 108int ip_mc_output(struct sock *sk, struct sk_buff *skb);
109int ip_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *)); 109int ip_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *));
110int ip_do_nat(struct sk_buff *skb); 110int ip_do_nat(struct sk_buff *skb);
111void ip_send_check(struct iphdr *ip); 111void ip_send_check(struct iphdr *ip);
112int __ip_local_out(struct sk_buff *skb); 112int __ip_local_out(struct sk_buff *skb);
113int ip_local_out(struct sk_buff *skb); 113int ip_local_out_sk(struct sock *sk, struct sk_buff *skb);
114int ip_queue_xmit(struct sk_buff *skb, struct flowi *fl); 114static inline int ip_local_out(struct sk_buff *skb)
115{
116 return ip_local_out_sk(skb->sk, skb);
117}
118
119int ip_queue_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
115void ip_init(void); 120void ip_init(void);
116int ip_append_data(struct sock *sk, struct flowi4 *fl4, 121int ip_append_data(struct sock *sk, struct flowi4 *fl4,
117 int getfrag(void *from, char *to, int offset, int len, 122 int getfrag(void *from, char *to, int offset, int len,
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index 3c3bb184eb8f..6c4f5eac98e7 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -32,6 +32,11 @@ struct route_info {
32#define RT6_LOOKUP_F_SRCPREF_PUBLIC 0x00000010 32#define RT6_LOOKUP_F_SRCPREF_PUBLIC 0x00000010
33#define RT6_LOOKUP_F_SRCPREF_COA 0x00000020 33#define RT6_LOOKUP_F_SRCPREF_COA 0x00000020
34 34
35/* We do not (yet ?) support IPv6 jumbograms (RFC 2675)
36 * Unlike IPv4, hdr->seg_len doesn't include the IPv6 header
37 */
38#define IP6_MAX_MTU (0xFFFF + sizeof(struct ipv6hdr))
39
35/* 40/*
36 * rt6_srcprefs2flags() and rt6_flags2srcprefs() translate 41 * rt6_srcprefs2flags() and rt6_flags2srcprefs() translate
37 * between IPV6_ADDR_PREFERENCES socket option values 42 * between IPV6_ADDR_PREFERENCES socket option values
diff --git a/include/net/ip_tunnels.h b/include/net/ip_tunnels.h
index e77c10405d51..a4daf9eb8562 100644
--- a/include/net/ip_tunnels.h
+++ b/include/net/ip_tunnels.h
@@ -153,7 +153,7 @@ static inline u8 ip_tunnel_ecn_encap(u8 tos, const struct iphdr *iph,
153} 153}
154 154
155int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto); 155int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto);
156int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb, 156int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
157 __be32 src, __be32 dst, __u8 proto, 157 __be32 src, __be32 dst, __u8 proto,
158 __u8 tos, __u8 ttl, __be16 df, bool xnet); 158 __u8 tos, __u8 ttl, __be16 df, bool xnet);
159 159
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 4f541f11ce63..d640925bc454 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -731,7 +731,7 @@ struct dst_entry *ip6_blackhole_route(struct net *net,
731 * skb processing functions 731 * skb processing functions
732 */ 732 */
733 733
734int ip6_output(struct sk_buff *skb); 734int ip6_output(struct sock *sk, struct sk_buff *skb);
735int ip6_forward(struct sk_buff *skb); 735int ip6_forward(struct sk_buff *skb);
736int ip6_input(struct sk_buff *skb); 736int ip6_input(struct sk_buff *skb);
737int ip6_mc_input(struct sk_buff *skb); 737int ip6_mc_input(struct sk_buff *skb);
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index 79387f73f875..5f9eb260990f 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -9,6 +9,7 @@
9#include <linux/list.h> 9#include <linux/list.h>
10#include <linux/sysctl.h> 10#include <linux/sysctl.h>
11 11
12#include <net/flow.h>
12#include <net/netns/core.h> 13#include <net/netns/core.h>
13#include <net/netns/mib.h> 14#include <net/netns/mib.h>
14#include <net/netns/unix.h> 15#include <net/netns/unix.h>
@@ -131,14 +132,6 @@ struct net {
131 atomic_t fnhe_genid; 132 atomic_t fnhe_genid;
132}; 133};
133 134
134/*
135 * ifindex generation is per-net namespace, and loopback is
136 * always the 1st device in ns (see net_dev_init), thus any
137 * loopback device should get ifindex 1
138 */
139
140#define LOOPBACK_IFINDEX 1
141
142#include <linux/seq_file_net.h> 135#include <linux/seq_file_net.h>
143 136
144/* Init's network namespace */ 137/* Init's network namespace */
diff --git a/include/net/netfilter/nf_tables_core.h b/include/net/netfilter/nf_tables_core.h
index cf2b7ae2b9d8..a75fc8e27cd6 100644
--- a/include/net/netfilter/nf_tables_core.h
+++ b/include/net/netfilter/nf_tables_core.h
@@ -13,6 +13,16 @@ struct nft_cmp_fast_expr {
13 u8 len; 13 u8 len;
14}; 14};
15 15
16/* Calculate the mask for the nft_cmp_fast expression. On big endian the
17 * mask needs to include the *upper* bytes when interpreting that data as
18 * something smaller than the full u32, therefore a cpu_to_le32 is done.
19 */
20static inline u32 nft_cmp_fast_mask(unsigned int len)
21{
22 return cpu_to_le32(~0U >> (FIELD_SIZEOF(struct nft_cmp_fast_expr,
23 data) * BITS_PER_BYTE - len));
24}
25
16extern const struct nft_expr_ops nft_cmp_fast_ops; 26extern const struct nft_expr_ops nft_cmp_fast_ops;
17 27
18int nft_cmp_module_init(void); 28int nft_cmp_module_init(void);
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 6ee76c804893..0dfcc92600e8 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -1241,6 +1241,7 @@ struct sctp_endpoint {
1241 /* SCTP-AUTH: endpoint shared keys */ 1241 /* SCTP-AUTH: endpoint shared keys */
1242 struct list_head endpoint_shared_keys; 1242 struct list_head endpoint_shared_keys;
1243 __u16 active_key_id; 1243 __u16 active_key_id;
1244 __u8 auth_enable;
1244}; 1245};
1245 1246
1246/* Recover the outter endpoint structure. */ 1247/* Recover the outter endpoint structure. */
@@ -1269,7 +1270,8 @@ struct sctp_endpoint *sctp_endpoint_is_match(struct sctp_endpoint *,
1269int sctp_has_association(struct net *net, const union sctp_addr *laddr, 1270int sctp_has_association(struct net *net, const union sctp_addr *laddr,
1270 const union sctp_addr *paddr); 1271 const union sctp_addr *paddr);
1271 1272
1272int sctp_verify_init(struct net *net, const struct sctp_association *asoc, 1273int sctp_verify_init(struct net *net, const struct sctp_endpoint *ep,
1274 const struct sctp_association *asoc,
1273 sctp_cid_t, sctp_init_chunk_t *peer_init, 1275 sctp_cid_t, sctp_init_chunk_t *peer_init,
1274 struct sctp_chunk *chunk, struct sctp_chunk **err_chunk); 1276 struct sctp_chunk *chunk, struct sctp_chunk **err_chunk);
1275int sctp_process_init(struct sctp_association *, struct sctp_chunk *chunk, 1277int sctp_process_init(struct sctp_association *, struct sctp_chunk *chunk,
@@ -1653,6 +1655,17 @@ struct sctp_association {
1653 /* This is the last advertised value of rwnd over a SACK chunk. */ 1655 /* This is the last advertised value of rwnd over a SACK chunk. */
1654 __u32 a_rwnd; 1656 __u32 a_rwnd;
1655 1657
1658 /* Number of bytes by which the rwnd has slopped. The rwnd is allowed
1659 * to slop over a maximum of the association's frag_point.
1660 */
1661 __u32 rwnd_over;
1662
1663 /* Keeps treack of rwnd pressure. This happens when we have
1664 * a window, but not recevie buffer (i.e small packets). This one
1665 * is releases slowly (1 PMTU at a time ).
1666 */
1667 __u32 rwnd_press;
1668
1656 /* This is the sndbuf size in use for the association. 1669 /* This is the sndbuf size in use for the association.
1657 * This corresponds to the sndbuf size for the association, 1670 * This corresponds to the sndbuf size for the association,
1658 * as specified in the sk->sndbuf. 1671 * as specified in the sk->sndbuf.
@@ -1881,7 +1894,8 @@ void sctp_assoc_update(struct sctp_association *old,
1881__u32 sctp_association_get_next_tsn(struct sctp_association *); 1894__u32 sctp_association_get_next_tsn(struct sctp_association *);
1882 1895
1883void sctp_assoc_sync_pmtu(struct sock *, struct sctp_association *); 1896void sctp_assoc_sync_pmtu(struct sock *, struct sctp_association *);
1884void sctp_assoc_rwnd_update(struct sctp_association *, bool); 1897void sctp_assoc_rwnd_increase(struct sctp_association *, unsigned int);
1898void sctp_assoc_rwnd_decrease(struct sctp_association *, unsigned int);
1885void sctp_assoc_set_primary(struct sctp_association *, 1899void sctp_assoc_set_primary(struct sctp_association *,
1886 struct sctp_transport *); 1900 struct sctp_transport *);
1887void sctp_assoc_del_nonprimary_peers(struct sctp_association *, 1901void sctp_assoc_del_nonprimary_peers(struct sctp_association *,
diff --git a/include/net/sock.h b/include/net/sock.h
index 8338a14e4805..21569cf456ed 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -2255,6 +2255,11 @@ int sock_get_timestampns(struct sock *, struct timespec __user *);
2255int sock_recv_errqueue(struct sock *sk, struct msghdr *msg, int len, int level, 2255int sock_recv_errqueue(struct sock *sk, struct msghdr *msg, int len, int level,
2256 int type); 2256 int type);
2257 2257
2258bool sk_ns_capable(const struct sock *sk,
2259 struct user_namespace *user_ns, int cap);
2260bool sk_capable(const struct sock *sk, int cap);
2261bool sk_net_capable(const struct sock *sk, int cap);
2262
2258/* 2263/*
2259 * Enable debug/info messages 2264 * Enable debug/info messages
2260 */ 2265 */
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index 32682ae47b3f..116e9c7e19cb 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -333,7 +333,7 @@ struct xfrm_state_afinfo {
333 const xfrm_address_t *saddr); 333 const xfrm_address_t *saddr);
334 int (*tmpl_sort)(struct xfrm_tmpl **dst, struct xfrm_tmpl **src, int n); 334 int (*tmpl_sort)(struct xfrm_tmpl **dst, struct xfrm_tmpl **src, int n);
335 int (*state_sort)(struct xfrm_state **dst, struct xfrm_state **src, int n); 335 int (*state_sort)(struct xfrm_state **dst, struct xfrm_state **src, int n);
336 int (*output)(struct sk_buff *skb); 336 int (*output)(struct sock *sk, struct sk_buff *skb);
337 int (*output_finish)(struct sk_buff *skb); 337 int (*output_finish)(struct sk_buff *skb);
338 int (*extract_input)(struct xfrm_state *x, 338 int (*extract_input)(struct xfrm_state *x,
339 struct sk_buff *skb); 339 struct sk_buff *skb);
@@ -1540,7 +1540,7 @@ static inline int xfrm4_rcv_spi(struct sk_buff *skb, int nexthdr, __be32 spi)
1540 1540
1541int xfrm4_extract_output(struct xfrm_state *x, struct sk_buff *skb); 1541int xfrm4_extract_output(struct xfrm_state *x, struct sk_buff *skb);
1542int xfrm4_prepare_output(struct xfrm_state *x, struct sk_buff *skb); 1542int xfrm4_prepare_output(struct xfrm_state *x, struct sk_buff *skb);
1543int xfrm4_output(struct sk_buff *skb); 1543int xfrm4_output(struct sock *sk, struct sk_buff *skb);
1544int xfrm4_output_finish(struct sk_buff *skb); 1544int xfrm4_output_finish(struct sk_buff *skb);
1545int xfrm4_rcv_cb(struct sk_buff *skb, u8 protocol, int err); 1545int xfrm4_rcv_cb(struct sk_buff *skb, u8 protocol, int err);
1546int xfrm4_protocol_register(struct xfrm4_protocol *handler, unsigned char protocol); 1546int xfrm4_protocol_register(struct xfrm4_protocol *handler, unsigned char protocol);
@@ -1565,7 +1565,7 @@ __be32 xfrm6_tunnel_alloc_spi(struct net *net, xfrm_address_t *saddr);
1565__be32 xfrm6_tunnel_spi_lookup(struct net *net, const xfrm_address_t *saddr); 1565__be32 xfrm6_tunnel_spi_lookup(struct net *net, const xfrm_address_t *saddr);
1566int xfrm6_extract_output(struct xfrm_state *x, struct sk_buff *skb); 1566int xfrm6_extract_output(struct xfrm_state *x, struct sk_buff *skb);
1567int xfrm6_prepare_output(struct xfrm_state *x, struct sk_buff *skb); 1567int xfrm6_prepare_output(struct xfrm_state *x, struct sk_buff *skb);
1568int xfrm6_output(struct sk_buff *skb); 1568int xfrm6_output(struct sock *sk, struct sk_buff *skb);
1569int xfrm6_output_finish(struct sk_buff *skb); 1569int xfrm6_output_finish(struct sk_buff *skb);
1570int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb, 1570int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb,
1571 u8 **prevhdr); 1571 u8 **prevhdr);
diff --git a/include/sound/cs42l56.h b/include/sound/cs42l56.h
new file mode 100644
index 000000000000..2467c8ff132c
--- /dev/null
+++ b/include/sound/cs42l56.h
@@ -0,0 +1,48 @@
1/*
2 * linux/sound/cs42l56.h -- Platform data for CS42L56
3 *
4 * Copyright (c) 2014 Cirrus Logic Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __CS42L56_H
12#define __CS42L56_H
13
14struct cs42l56_platform_data {
15
16 /* GPIO for Reset */
17 unsigned int gpio_nreset;
18
19 /* MICBIAS Level. Check datasheet Pg48 */
20 unsigned int micbias_lvl;
21
22 /* Analog Input 1A Reference 0=Single 1=Pseudo-Differential */
23 unsigned int ain1a_ref_cfg;
24
25 /* Analog Input 2A Reference 0=Single 1=Pseudo-Differential */
26 unsigned int ain2a_ref_cfg;
27
28 /* Analog Input 1B Reference 0=Single 1=Pseudo-Differential */
29 unsigned int ain1b_ref_cfg;
30
31 /* Analog Input 2B Reference 0=Single 1=Pseudo-Differential */
32 unsigned int ain2b_ref_cfg;
33
34 /* Charge Pump Freq. Check datasheet Pg62 */
35 unsigned int chgfreq;
36
37 /* HighPass Filter Right Channel Corner Frequency */
38 unsigned int hpfb_freq;
39
40 /* HighPass Filter Left Channel Corner Frequency */
41 unsigned int hpfa_freq;
42
43 /* Adaptive Power Control for LO/HP */
44 unsigned int adaptive_pwr;
45
46};
47
48#endif /* __CS42L56_H */
diff --git a/include/sound/omap-pcm.h b/include/sound/omap-pcm.h
new file mode 100644
index 000000000000..c1d2f31d71e9
--- /dev/null
+++ b/include/sound/omap-pcm.h
@@ -0,0 +1,30 @@
1/*
2 * omap-pcm.h - OMAP PCM driver
3 *
4 * Copyright (C) 2014 Texas Instruments, Inc.
5 *
6 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __OMAP_PCM_H__
19#define __OMAP_PCM_H__
20
21#if IS_ENABLED(CONFIG_SND_OMAP_SOC)
22int omap_pcm_platform_register(struct device *dev);
23#else
24static inline int omap_pcm_platform_register(struct device *dev)
25{
26 return 0;
27}
28#endif /* CONFIG_SND_OMAP_SOC */
29
30#endif /* __OMAP_PCM_H__ */
diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
index 34a3c02a4576..f4a706f82cb7 100644
--- a/include/sound/rcar_snd.h
+++ b/include/sound/rcar_snd.h
@@ -34,47 +34,39 @@
34 * B : SSI direction 34 * B : SSI direction
35 */ 35 */
36#define RSND_SSI_CLK_PIN_SHARE (1 << 31) 36#define RSND_SSI_CLK_PIN_SHARE (1 << 31)
37#define RSND_SSI_PLAY (1 << 24)
38 37
39#define RSND_SSI(_dma_id, _pio_irq, _flags) \ 38#define RSND_SSI(_dma_id, _pio_irq, _flags) \
40{ .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags } 39{ .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
41#define RSND_SSI_SET(_dai_id, _dma_id, _pio_irq, _flags) \
42{ .dai_id = _dai_id, .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
43#define RSND_SSI_UNUSED \ 40#define RSND_SSI_UNUSED \
44{ .dai_id = -1, .dma_id = -1, .pio_irq = -1, .flags = 0 } 41{ .dma_id = -1, .pio_irq = -1, .flags = 0 }
45 42
46struct rsnd_ssi_platform_info { 43struct rsnd_ssi_platform_info {
47 int dai_id; /* will be removed */
48 int dma_id; 44 int dma_id;
49 int pio_irq; 45 int pio_irq;
50 u32 flags; 46 u32 flags;
51}; 47};
52 48
53/*
54 * flags
55 */
56#define RSND_SCU_USE_HPBIF (1 << 31) /* it needs RSND_SSI_DEPENDENT */
57
58#define RSND_SRC(rate, _dma_id) \ 49#define RSND_SRC(rate, _dma_id) \
59{ .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, } 50{ .convert_rate = rate, .dma_id = _dma_id, }
60#define RSND_SRC_SET(rate, _dma_id) \
61 { .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
62#define RSND_SRC_UNUSED \ 51#define RSND_SRC_UNUSED \
63 { .flags = 0, .convert_rate = 0, .dma_id = 0, } 52{ .convert_rate = 0, .dma_id = -1, }
64
65#define rsnd_scu_platform_info rsnd_src_platform_info
66#define src_info scu_info
67#define src_info_nr scu_info_nr
68 53
69struct rsnd_src_platform_info { 54struct rsnd_src_platform_info {
70 u32 flags;
71 u32 convert_rate; /* sampling rate convert */ 55 u32 convert_rate; /* sampling rate convert */
72 int dma_id; /* for Gen2 SCU */ 56 int dma_id; /* for Gen2 SCU */
73}; 57};
74 58
59/*
60 * flags
61 */
62struct rsnd_dvc_platform_info {
63 u32 flags;
64};
65
75struct rsnd_dai_path_info { 66struct rsnd_dai_path_info {
76 struct rsnd_ssi_platform_info *ssi; 67 struct rsnd_ssi_platform_info *ssi;
77 struct rsnd_src_platform_info *src; 68 struct rsnd_src_platform_info *src;
69 struct rsnd_dvc_platform_info *dvc;
78}; 70};
79 71
80struct rsnd_dai_platform_info { 72struct rsnd_dai_platform_info {
@@ -99,6 +91,8 @@ struct rcar_snd_info {
99 int ssi_info_nr; 91 int ssi_info_nr;
100 struct rsnd_src_platform_info *src_info; 92 struct rsnd_src_platform_info *src_info;
101 int src_info_nr; 93 int src_info_nr;
94 struct rsnd_dvc_platform_info *dvc_info;
95 int dvc_info_nr;
102 struct rsnd_dai_platform_info *dai_info; 96 struct rsnd_dai_platform_info *dai_info;
103 int dai_info_nr; 97 int dai_info_nr;
104 int (*start)(int id); 98 int (*start)(int id);
diff --git a/include/sound/rt5640.h b/include/sound/rt5640.h
index 27cc75ed67f8..59d26dd81e45 100644
--- a/include/sound/rt5640.h
+++ b/include/sound/rt5640.h
@@ -16,6 +16,10 @@ struct rt5640_platform_data {
16 bool in1_diff; 16 bool in1_diff;
17 bool in2_diff; 17 bool in2_diff;
18 18
19 bool dmic_en;
20 bool dmic1_data_pin; /* 0 = IN1P; 1 = GPIO3 */
21 bool dmic2_data_pin; /* 0 = IN1N; 1 = GPIO4 */
22
19 int ldo1_en; /* GPIO for LDO1_EN */ 23 int ldo1_en; /* GPIO for LDO1_EN */
20}; 24};
21 25
diff --git a/include/sound/rt5645.h b/include/sound/rt5645.h
new file mode 100644
index 000000000000..1de744c242f6
--- /dev/null
+++ b/include/sound/rt5645.h
@@ -0,0 +1,25 @@
1/*
2 * linux/sound/rt5645.h -- Platform data for RT5645
3 *
4 * Copyright 2013 Realtek Microelectronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_SND_RT5645_H
12#define __LINUX_SND_RT5645_H
13
14struct rt5645_platform_data {
15 /* IN2 can optionally be differential */
16 bool in2_diff;
17
18 bool dmic_en;
19 unsigned int dmic1_data_pin;
20 /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
21 unsigned int dmic2_data_pin;
22 /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
23};
24
25#endif
diff --git a/include/sound/rt5651.h b/include/sound/rt5651.h
new file mode 100644
index 000000000000..d35de758dfb5
--- /dev/null
+++ b/include/sound/rt5651.h
@@ -0,0 +1,21 @@
1/*
2 * linux/sound/rt286.h -- Platform data for RT286
3 *
4 * Copyright 2013 Realtek Microelectronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_SND_RT5651_H
12#define __LINUX_SND_RT5651_H
13
14struct rt5651_platform_data {
15 /* IN2 can optionally be differential */
16 bool in2_diff;
17
18 bool dmic_en;
19};
20
21#endif
diff --git a/include/sound/rt5677.h b/include/sound/rt5677.h
new file mode 100644
index 000000000000..3da14313bcfc
--- /dev/null
+++ b/include/sound/rt5677.h
@@ -0,0 +1,21 @@
1/*
2 * linux/sound/rt5677.h -- Platform data for RT5677
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Oder Chiou <oder_chiou@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __LINUX_SND_RT5677_H
13#define __LINUX_SND_RT5677_H
14
15struct rt5677_platform_data {
16 /* IN1 IN2 can optionally be differential */
17 bool in1_diff;
18 bool in2_diff;
19};
20
21#endif
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index fad76769f153..688f2ba8009f 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -252,7 +252,6 @@ struct snd_soc_dai {
252 unsigned int symmetric_rates:1; 252 unsigned int symmetric_rates:1;
253 unsigned int symmetric_channels:1; 253 unsigned int symmetric_channels:1;
254 unsigned int symmetric_samplebits:1; 254 unsigned int symmetric_samplebits:1;
255 struct snd_pcm_runtime *runtime;
256 unsigned int active; 255 unsigned int active;
257 unsigned char probed:1; 256 unsigned char probed:1;
258 257
@@ -277,7 +276,6 @@ struct snd_soc_dai {
277 struct snd_soc_card *card; 276 struct snd_soc_card *card;
278 277
279 struct list_head list; 278 struct list_head list;
280 struct list_head card_list;
281}; 279};
282 280
283static inline void *snd_soc_dai_get_dma_data(const struct snd_soc_dai *dai, 281static inline void *snd_soc_dai_get_dma_data(const struct snd_soc_dai *dai,
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index ef78f562f4a8..6b59471cdf44 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -107,10 +107,6 @@ struct device;
107{ .id = snd_soc_dapm_mux, .name = wname, \ 107{ .id = snd_soc_dapm_mux, .name = wname, \
108 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \ 108 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
109 .kcontrol_news = wcontrols, .num_kcontrols = 1} 109 .kcontrol_news = wcontrols, .num_kcontrols = 1}
110#define SND_SOC_DAPM_VIRT_MUX(wname, wreg, wshift, winvert, wcontrols) \
111 SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
112#define SND_SOC_DAPM_VALUE_MUX(wname, wreg, wshift, winvert, wcontrols) \
113 SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
114 110
115/* Simplified versions of above macros, assuming wncontrols = ARRAY_SIZE(wcontrols) */ 111/* Simplified versions of above macros, assuming wncontrols = ARRAY_SIZE(wcontrols) */
116#define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\ 112#define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\
@@ -166,10 +162,6 @@ struct device;
166 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \ 162 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
167 .kcontrol_news = wcontrols, .num_kcontrols = 1, \ 163 .kcontrol_news = wcontrols, .num_kcontrols = 1, \
168 .event = wevent, .event_flags = wflags} 164 .event = wevent, .event_flags = wflags}
169#define SND_SOC_DAPM_VIRT_MUX_E(wname, wreg, wshift, winvert, wcontrols, \
170 wevent, wflags) \
171 SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, wevent, \
172 wflags)
173 165
174/* additional sequencing control within an event type */ 166/* additional sequencing control within an event type */
175#define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \ 167#define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \
@@ -256,9 +248,8 @@ struct device;
256/* generic widgets */ 248/* generic widgets */
257#define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \ 249#define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \
258{ .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \ 250{ .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \
259 .reg = -((wreg) + 1), .shift = wshift, .mask = wmask, \ 251 .reg = wreg, .shift = wshift, .mask = wmask, \
260 .on_val = won_val, .off_val = woff_val, .event = dapm_reg_event, \ 252 .on_val = won_val, .off_val = woff_val, }
261 .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
262#define SND_SOC_DAPM_SUPPLY(wname, wreg, wshift, winvert, wevent, wflags) \ 253#define SND_SOC_DAPM_SUPPLY(wname, wreg, wshift, winvert, wevent, wflags) \
263{ .id = snd_soc_dapm_supply, .name = wname, \ 254{ .id = snd_soc_dapm_supply, .name = wname, \
264 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \ 255 SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
@@ -305,16 +296,12 @@ struct device;
305 .get = snd_soc_dapm_get_enum_double, \ 296 .get = snd_soc_dapm_get_enum_double, \
306 .put = snd_soc_dapm_put_enum_double, \ 297 .put = snd_soc_dapm_put_enum_double, \
307 .private_value = (unsigned long)&xenum } 298 .private_value = (unsigned long)&xenum }
308#define SOC_DAPM_ENUM_VIRT(xname, xenum) \
309 SOC_DAPM_ENUM(xname, xenum)
310#define SOC_DAPM_ENUM_EXT(xname, xenum, xget, xput) \ 299#define SOC_DAPM_ENUM_EXT(xname, xenum, xget, xput) \
311{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 300{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
312 .info = snd_soc_info_enum_double, \ 301 .info = snd_soc_info_enum_double, \
313 .get = xget, \ 302 .get = xget, \
314 .put = xput, \ 303 .put = xput, \
315 .private_value = (unsigned long)&xenum } 304 .private_value = (unsigned long)&xenum }
316#define SOC_DAPM_VALUE_ENUM(xname, xenum) \
317 SOC_DAPM_ENUM(xname, xenum)
318#define SOC_DAPM_PIN_SWITCH(xname) \ 305#define SOC_DAPM_PIN_SWITCH(xname) \
319{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname " Switch", \ 306{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname " Switch", \
320 .info = snd_soc_dapm_info_pin_switch, \ 307 .info = snd_soc_dapm_info_pin_switch, \
@@ -362,8 +349,6 @@ struct regulator;
362struct snd_soc_dapm_widget_list; 349struct snd_soc_dapm_widget_list;
363struct snd_soc_dapm_update; 350struct snd_soc_dapm_update;
364 351
365int dapm_reg_event(struct snd_soc_dapm_widget *w,
366 struct snd_kcontrol *kcontrol, int event);
367int dapm_regulator_event(struct snd_soc_dapm_widget *w, 352int dapm_regulator_event(struct snd_soc_dapm_widget *w,
368 struct snd_kcontrol *kcontrol, int event); 353 struct snd_kcontrol *kcontrol, int event);
369int dapm_clock_event(struct snd_soc_dapm_widget *w, 354int dapm_clock_event(struct snd_soc_dapm_widget *w,
@@ -606,6 +591,7 @@ struct snd_soc_dapm_context {
606 enum snd_soc_dapm_type, int); 591 enum snd_soc_dapm_type, int);
607 592
608 struct device *dev; /* from parent - for debug */ 593 struct device *dev; /* from parent - for debug */
594 struct snd_soc_component *component; /* parent component */
609 struct snd_soc_codec *codec; /* parent codec */ 595 struct snd_soc_codec *codec; /* parent codec */
610 struct snd_soc_platform *platform; /* parent platform */ 596 struct snd_soc_platform *platform; /* parent platform */
611 struct snd_soc_card *card; /* parent card */ 597 struct snd_soc_card *card; /* parent card */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 0b83168d8ff4..ed9e2d7e5fdc 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -196,8 +196,6 @@
196 .info = snd_soc_info_enum_double, \ 196 .info = snd_soc_info_enum_double, \
197 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ 197 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
198 .private_value = (unsigned long)&xenum } 198 .private_value = (unsigned long)&xenum }
199#define SOC_VALUE_ENUM(xname, xenum) \
200 SOC_ENUM(xname, xenum)
201#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\ 199#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
202 xhandler_get, xhandler_put) \ 200 xhandler_get, xhandler_put) \
203{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 201{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
@@ -266,6 +264,13 @@
266 {.base = xbase, .num_regs = xregs, \ 264 {.base = xbase, .num_regs = xregs, \
267 .mask = xmask }) } 265 .mask = xmask }) }
268 266
267#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \
268{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
269 .info = snd_soc_bytes_info_ext, \
270 .get = xhandler_get, .put = xhandler_put, \
271 .private_value = (unsigned long)&(struct soc_bytes_ext) \
272 {.max = xcount} }
273
269#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \ 274#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
270 xmin, xmax, xinvert) \ 275 xmin, xmax, xinvert) \
271{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 276{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@@ -377,6 +382,8 @@ int snd_soc_resume(struct device *dev);
377int snd_soc_poweroff(struct device *dev); 382int snd_soc_poweroff(struct device *dev);
378int snd_soc_register_platform(struct device *dev, 383int snd_soc_register_platform(struct device *dev,
379 const struct snd_soc_platform_driver *platform_drv); 384 const struct snd_soc_platform_driver *platform_drv);
385int devm_snd_soc_register_platform(struct device *dev,
386 const struct snd_soc_platform_driver *platform_drv);
380void snd_soc_unregister_platform(struct device *dev); 387void snd_soc_unregister_platform(struct device *dev);
381int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform, 388int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
382 const struct snd_soc_platform_driver *platform_drv); 389 const struct snd_soc_platform_driver *platform_drv);
@@ -393,14 +400,6 @@ int devm_snd_soc_register_component(struct device *dev,
393 const struct snd_soc_component_driver *cmpnt_drv, 400 const struct snd_soc_component_driver *cmpnt_drv,
394 struct snd_soc_dai_driver *dai_drv, int num_dai); 401 struct snd_soc_dai_driver *dai_drv, int num_dai);
395void snd_soc_unregister_component(struct device *dev); 402void snd_soc_unregister_component(struct device *dev);
396int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
397 unsigned int reg);
398int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
399 unsigned int reg);
400int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
401 unsigned int reg);
402int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
403 struct regmap *regmap);
404int snd_soc_cache_sync(struct snd_soc_codec *codec); 403int snd_soc_cache_sync(struct snd_soc_codec *codec);
405int snd_soc_cache_init(struct snd_soc_codec *codec); 404int snd_soc_cache_init(struct snd_soc_codec *codec);
406int snd_soc_cache_exit(struct snd_soc_codec *codec); 405int snd_soc_cache_exit(struct snd_soc_codec *codec);
@@ -453,6 +452,9 @@ int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
453#ifdef CONFIG_GPIOLIB 452#ifdef CONFIG_GPIOLIB
454int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, 453int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
455 struct snd_soc_jack_gpio *gpios); 454 struct snd_soc_jack_gpio *gpios);
455int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
456 struct snd_soc_jack *jack,
457 int count, struct snd_soc_jack_gpio *gpios);
456void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, 458void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
457 struct snd_soc_jack_gpio *gpios); 459 struct snd_soc_jack_gpio *gpios);
458#else 460#else
@@ -462,6 +464,14 @@ static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
462 return 0; 464 return 0;
463} 465}
464 466
467static inline int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
468 struct snd_soc_jack *jack,
469 int count,
470 struct snd_soc_jack_gpio *gpios)
471{
472 return 0;
473}
474
465static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, 475static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
466 struct snd_soc_jack_gpio *gpios) 476 struct snd_soc_jack_gpio *gpios)
467{ 477{
@@ -469,12 +479,12 @@ static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
469#endif 479#endif
470 480
471/* codec register bit access */ 481/* codec register bit access */
472int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, 482int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg,
473 unsigned int mask, unsigned int value); 483 unsigned int mask, unsigned int value);
474int snd_soc_update_bits_locked(struct snd_soc_codec *codec, 484int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
475 unsigned short reg, unsigned int mask, 485 unsigned int reg, unsigned int mask,
476 unsigned int value); 486 unsigned int value);
477int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, 487int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg,
478 unsigned int mask, unsigned int value); 488 unsigned int mask, unsigned int value);
479 489
480int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, 490int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
@@ -540,6 +550,8 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_value *ucontrol); 550 struct snd_ctl_elem_value *ucontrol);
541int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, 551int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol); 552 struct snd_ctl_elem_value *ucontrol);
553int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_info *ucontrol);
543int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol, 555int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_info *uinfo); 556 struct snd_ctl_elem_info *uinfo);
545int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, 557int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
@@ -586,8 +598,12 @@ struct snd_soc_jack_zone {
586/** 598/**
587 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection 599 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
588 * 600 *
589 * @gpio: gpio number 601 * @gpio: legacy gpio number
590 * @name: gpio name 602 * @idx: gpio descriptor index within the function of the GPIO
603 * consumer device
604 * @gpiod_dev GPIO consumer device
605 * @name: gpio name. Also as connection ID for the GPIO consumer
606 * device function name lookup
591 * @report: value to report when jack detected 607 * @report: value to report when jack detected
592 * @invert: report presence in low state 608 * @invert: report presence in low state
593 * @debouce_time: debouce time in ms 609 * @debouce_time: debouce time in ms
@@ -598,6 +614,8 @@ struct snd_soc_jack_zone {
598 */ 614 */
599struct snd_soc_jack_gpio { 615struct snd_soc_jack_gpio {
600 unsigned int gpio; 616 unsigned int gpio;
617 unsigned int idx;
618 struct device *gpiod_dev;
601 const char *name; 619 const char *name;
602 int report; 620 int report;
603 int invert; 621 int invert;
@@ -606,6 +624,7 @@ struct snd_soc_jack_gpio {
606 624
607 struct snd_soc_jack *jack; 625 struct snd_soc_jack *jack;
608 struct delayed_work work; 626 struct delayed_work work;
627 struct gpio_desc *desc;
609 628
610 void *data; 629 void *data;
611 int (*jack_status_check)(void *data); 630 int (*jack_status_check)(void *data);
@@ -668,6 +687,7 @@ struct snd_soc_component {
668 unsigned int active; 687 unsigned int active;
669 688
670 unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */ 689 unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
690 unsigned int registered_as_component:1;
671 691
672 struct list_head list; 692 struct list_head list;
673 693
@@ -677,6 +697,14 @@ struct snd_soc_component {
677 const struct snd_soc_component_driver *driver; 697 const struct snd_soc_component_driver *driver;
678 698
679 struct list_head dai_list; 699 struct list_head dai_list;
700
701 int (*read)(struct snd_soc_component *, unsigned int, unsigned int *);
702 int (*write)(struct snd_soc_component *, unsigned int, unsigned int);
703
704 struct regmap *regmap;
705 int val_bytes;
706
707 struct mutex io_mutex;
680}; 708};
681 709
682/* SoC Audio Codec device */ 710/* SoC Audio Codec device */
@@ -691,10 +719,6 @@ struct snd_soc_codec {
691 struct snd_soc_card *card; 719 struct snd_soc_card *card;
692 struct list_head list; 720 struct list_head list;
693 struct list_head card_list; 721 struct list_head card_list;
694 int num_dai;
695 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
696 int (*readable_register)(struct snd_soc_codec *, unsigned int);
697 int (*writable_register)(struct snd_soc_codec *, unsigned int);
698 722
699 /* runtime */ 723 /* runtime */
700 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ 724 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
@@ -704,18 +728,14 @@ struct snd_soc_codec {
704 unsigned int ac97_registered:1; /* Codec has been AC97 registered */ 728 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
705 unsigned int ac97_created:1; /* Codec has been created by SoC */ 729 unsigned int ac97_created:1; /* Codec has been created by SoC */
706 unsigned int cache_init:1; /* codec cache has been initialized */ 730 unsigned int cache_init:1; /* codec cache has been initialized */
707 unsigned int using_regmap:1; /* using regmap access */
708 u32 cache_only; /* Suppress writes to hardware */ 731 u32 cache_only; /* Suppress writes to hardware */
709 u32 cache_sync; /* Cache needs to be synced to hardware */ 732 u32 cache_sync; /* Cache needs to be synced to hardware */
710 733
711 /* codec IO */ 734 /* codec IO */
712 void *control_data; /* codec control (i2c/3wire) data */ 735 void *control_data; /* codec control (i2c/3wire) data */
713 hw_write_t hw_write; 736 hw_write_t hw_write;
714 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
715 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
716 void *reg_cache; 737 void *reg_cache;
717 struct mutex cache_rw_mutex; 738 struct mutex cache_rw_mutex;
718 int val_bytes;
719 739
720 /* component */ 740 /* component */
721 struct snd_soc_component component; 741 struct snd_soc_component component;
@@ -754,13 +774,9 @@ struct snd_soc_codec_driver {
754 unsigned int freq_in, unsigned int freq_out); 774 unsigned int freq_in, unsigned int freq_out);
755 775
756 /* codec IO */ 776 /* codec IO */
777 struct regmap *(*get_regmap)(struct device *);
757 unsigned int (*read)(struct snd_soc_codec *, unsigned int); 778 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
758 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); 779 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
759 int (*display_register)(struct snd_soc_codec *, char *,
760 size_t, unsigned int);
761 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
762 int (*readable_register)(struct snd_soc_codec *, unsigned int);
763 int (*writable_register)(struct snd_soc_codec *, unsigned int);
764 unsigned int reg_cache_size; 780 unsigned int reg_cache_size;
765 short reg_cache_step; 781 short reg_cache_step;
766 short reg_word_size; 782 short reg_word_size;
@@ -791,6 +807,7 @@ struct snd_soc_platform_driver {
791 int (*remove)(struct snd_soc_platform *); 807 int (*remove)(struct snd_soc_platform *);
792 int (*suspend)(struct snd_soc_dai *dai); 808 int (*suspend)(struct snd_soc_dai *dai);
793 int (*resume)(struct snd_soc_dai *dai); 809 int (*resume)(struct snd_soc_dai *dai);
810 struct snd_soc_component_driver component_driver;
794 811
795 /* pcm creation and destruction */ 812 /* pcm creation and destruction */
796 int (*pcm_new)(struct snd_soc_pcm_runtime *); 813 int (*pcm_new)(struct snd_soc_pcm_runtime *);
@@ -835,7 +852,6 @@ struct snd_soc_platform {
835 int id; 852 int id;
836 struct device *dev; 853 struct device *dev;
837 const struct snd_soc_platform_driver *driver; 854 const struct snd_soc_platform_driver *driver;
838 struct mutex mutex;
839 855
840 unsigned int suspended:1; /* platform is suspended */ 856 unsigned int suspended:1; /* platform is suspended */
841 unsigned int probed:1; 857 unsigned int probed:1;
@@ -844,6 +860,8 @@ struct snd_soc_platform {
844 struct list_head list; 860 struct list_head list;
845 struct list_head card_list; 861 struct list_head card_list;
846 862
863 struct snd_soc_component component;
864
847 struct snd_soc_dapm_context dapm; 865 struct snd_soc_dapm_context dapm;
848 866
849#ifdef CONFIG_DEBUG_FS 867#ifdef CONFIG_DEBUG_FS
@@ -931,7 +949,12 @@ struct snd_soc_dai_link {
931}; 949};
932 950
933struct snd_soc_codec_conf { 951struct snd_soc_codec_conf {
952 /*
953 * specify device either by device name, or by
954 * DT/OF node, but not both.
955 */
934 const char *dev_name; 956 const char *dev_name;
957 const struct device_node *of_node;
935 958
936 /* 959 /*
937 * optional map of kcontrol, widget and path name prefixes that are 960 * optional map of kcontrol, widget and path name prefixes that are
@@ -942,7 +965,13 @@ struct snd_soc_codec_conf {
942 965
943struct snd_soc_aux_dev { 966struct snd_soc_aux_dev {
944 const char *name; /* Codec name */ 967 const char *name; /* Codec name */
945 const char *codec_name; /* for multi-codec */ 968
969 /*
970 * specify multi-codec either by device name, or by
971 * DT/OF node, but not both.
972 */
973 const char *codec_name;
974 const struct device_node *codec_of_node;
946 975
947 /* codec/machine specific init - e.g. add machine controls */ 976 /* codec/machine specific init - e.g. add machine controls */
948 int (*init)(struct snd_soc_dapm_context *dapm); 977 int (*init)(struct snd_soc_dapm_context *dapm);
@@ -957,7 +986,6 @@ struct snd_soc_card {
957 struct snd_card *snd_card; 986 struct snd_card *snd_card;
958 struct module *owner; 987 struct module *owner;
959 988
960 struct list_head list;
961 struct mutex mutex; 989 struct mutex mutex;
962 struct mutex dapm_mutex; 990 struct mutex dapm_mutex;
963 991
@@ -1020,7 +1048,6 @@ struct snd_soc_card {
1020 /* lists of probed devices belonging to this card */ 1048 /* lists of probed devices belonging to this card */
1021 struct list_head codec_dev_list; 1049 struct list_head codec_dev_list;
1022 struct list_head platform_dev_list; 1050 struct list_head platform_dev_list;
1023 struct list_head dai_dev_list;
1024 1051
1025 struct list_head widgets; 1052 struct list_head widgets;
1026 struct list_head paths; 1053 struct list_head paths;
@@ -1090,6 +1117,10 @@ struct soc_bytes {
1090 u32 mask; 1117 u32 mask;
1091}; 1118};
1092 1119
1120struct soc_bytes_ext {
1121 int max;
1122};
1123
1093/* multi register control */ 1124/* multi register control */
1094struct soc_mreg_control { 1125struct soc_mreg_control {
1095 long min, max; 1126 long min, max;
@@ -1120,10 +1151,66 @@ static inline struct snd_soc_codec *snd_soc_component_to_codec(
1120 return container_of(component, struct snd_soc_codec, component); 1151 return container_of(component, struct snd_soc_codec, component);
1121} 1152}
1122 1153
1154/**
1155 * snd_soc_component_to_platform() - Casts a component to the platform it is embedded in
1156 * @component: The component to cast to a platform
1157 *
1158 * This function must only be used on components that are known to be platforms.
1159 * Otherwise the behavior is undefined.
1160 */
1161static inline struct snd_soc_platform *snd_soc_component_to_platform(
1162 struct snd_soc_component *component)
1163{
1164 return container_of(component, struct snd_soc_platform, component);
1165}
1166
1167/**
1168 * snd_soc_dapm_to_codec() - Casts a DAPM context to the CODEC it is embedded in
1169 * @dapm: The DAPM context to cast to the CODEC
1170 *
1171 * This function must only be used on DAPM contexts that are known to be part of
1172 * a CODEC (e.g. in a CODEC driver). Otherwise the behavior is undefined.
1173 */
1174static inline struct snd_soc_codec *snd_soc_dapm_to_codec(
1175 struct snd_soc_dapm_context *dapm)
1176{
1177 return container_of(dapm, struct snd_soc_codec, dapm);
1178}
1179
1180/**
1181 * snd_soc_dapm_to_platform() - Casts a DAPM context to the platform it is
1182 * embedded in
1183 * @dapm: The DAPM context to cast to the platform.
1184 *
1185 * This function must only be used on DAPM contexts that are known to be part of
1186 * a platform (e.g. in a platform driver). Otherwise the behavior is undefined.
1187 */
1188static inline struct snd_soc_platform *snd_soc_dapm_to_platform(
1189 struct snd_soc_dapm_context *dapm)
1190{
1191 return container_of(dapm, struct snd_soc_platform, dapm);
1192}
1193
1123/* codec IO */ 1194/* codec IO */
1124unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg); 1195unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
1125unsigned int snd_soc_write(struct snd_soc_codec *codec, 1196int snd_soc_write(struct snd_soc_codec *codec, unsigned int reg,
1126 unsigned int reg, unsigned int val); 1197 unsigned int val);
1198
1199/* component IO */
1200int snd_soc_component_read(struct snd_soc_component *component,
1201 unsigned int reg, unsigned int *val);
1202int snd_soc_component_write(struct snd_soc_component *component,
1203 unsigned int reg, unsigned int val);
1204int snd_soc_component_update_bits(struct snd_soc_component *component,
1205 unsigned int reg, unsigned int mask, unsigned int val);
1206int snd_soc_component_update_bits_async(struct snd_soc_component *component,
1207 unsigned int reg, unsigned int mask, unsigned int val);
1208void snd_soc_component_async_complete(struct snd_soc_component *component);
1209int snd_soc_component_test_bits(struct snd_soc_component *component,
1210 unsigned int reg, unsigned int mask, unsigned int value);
1211
1212int snd_soc_component_init_io(struct snd_soc_component *component,
1213 struct regmap *regmap);
1127 1214
1128/* device driver data */ 1215/* device driver data */
1129 1216
@@ -1173,7 +1260,6 @@ static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
1173 1260
1174static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card) 1261static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
1175{ 1262{
1176 INIT_LIST_HEAD(&card->dai_dev_list);
1177 INIT_LIST_HEAD(&card->codec_dev_list); 1263 INIT_LIST_HEAD(&card->codec_dev_list);
1178 INIT_LIST_HEAD(&card->platform_dev_list); 1264 INIT_LIST_HEAD(&card->platform_dev_list);
1179 INIT_LIST_HEAD(&card->widgets); 1265 INIT_LIST_HEAD(&card->widgets);
@@ -1228,6 +1314,50 @@ static inline bool snd_soc_codec_is_active(struct snd_soc_codec *codec)
1228 return snd_soc_component_is_active(&codec->component); 1314 return snd_soc_component_is_active(&codec->component);
1229} 1315}
1230 1316
1317/**
1318 * snd_soc_kcontrol_component() - Returns the component that registered the
1319 * control
1320 * @kcontrol: The control for which to get the component
1321 *
1322 * Note: This function will work correctly if the control has been registered
1323 * for a component. Either with snd_soc_add_codec_controls() or
1324 * snd_soc_add_platform_controls() or via table based setup for either a
1325 * CODEC, a platform or component driver. Otherwise the behavior is undefined.
1326 */
1327static inline struct snd_soc_component *snd_soc_kcontrol_component(
1328 struct snd_kcontrol *kcontrol)
1329{
1330 return snd_kcontrol_chip(kcontrol);
1331}
1332
1333/**
1334 * snd_soc_kcontrol_codec() - Returns the CODEC that registered the control
1335 * @kcontrol: The control for which to get the CODEC
1336 *
1337 * Note: This function will only work correctly if the control has been
1338 * registered with snd_soc_add_codec_controls() or via table based setup of
1339 * snd_soc_codec_driver. Otherwise the behavior is undefined.
1340 */
1341static inline struct snd_soc_codec *snd_soc_kcontrol_codec(
1342 struct snd_kcontrol *kcontrol)
1343{
1344 return snd_soc_component_to_codec(snd_soc_kcontrol_component(kcontrol));
1345}
1346
1347/**
1348 * snd_soc_kcontrol_platform() - Returns the platform that registerd the control
1349 * @kcontrol: The control for which to get the platform
1350 *
1351 * Note: This function will only work correctly if the control has been
1352 * registered with snd_soc_add_platform_controls() or via table based setup of
1353 * a snd_soc_platform_driver. Otherwise the behavior is undefined.
1354 */
1355static inline struct snd_soc_platform *snd_soc_kcontrol_platform(
1356 struct snd_kcontrol *kcontrol)
1357{
1358 return snd_soc_component_to_platform(snd_soc_kcontrol_component(kcontrol));
1359}
1360
1231int snd_soc_util_init(void); 1361int snd_soc_util_init(void);
1232void snd_soc_util_exit(void); 1362void snd_soc_util_exit(void);
1233 1363
@@ -1241,7 +1371,9 @@ int snd_soc_of_parse_tdm_slot(struct device_node *np,
1241int snd_soc_of_parse_audio_routing(struct snd_soc_card *card, 1371int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
1242 const char *propname); 1372 const char *propname);
1243unsigned int snd_soc_of_parse_daifmt(struct device_node *np, 1373unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
1244 const char *prefix); 1374 const char *prefix,
1375 struct device_node **bitclkmaster,
1376 struct device_node **framemaster);
1245int snd_soc_of_get_dai_name(struct device_node *of_node, 1377int snd_soc_of_get_dai_name(struct device_node *of_node,
1246 const char **dai_name); 1378 const char **dai_name);
1247 1379
diff --git a/include/sound/sta350.h b/include/sound/sta350.h
new file mode 100644
index 000000000000..42edceb096a0
--- /dev/null
+++ b/include/sound/sta350.h
@@ -0,0 +1,57 @@
1/*
2 * Platform data for ST STA350 ASoC codec driver.
3 *
4 * Copyright: 2014 Raumfeld GmbH
5 * Author: Sven Brandau <info@brandau.biz>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12#ifndef __LINUX_SND__STA350_H
13#define __LINUX_SND__STA350_H
14
15#define STA350_OCFG_2CH 0
16#define STA350_OCFG_2_1CH 1
17#define STA350_OCFG_1CH 3
18
19#define STA350_OM_CH1 0
20#define STA350_OM_CH2 1
21#define STA350_OM_CH3 2
22
23#define STA350_THERMAL_ADJUSTMENT_ENABLE 1
24#define STA350_THERMAL_RECOVERY_ENABLE 2
25#define STA350_FAULT_DETECT_RECOVERY_BYPASS 1
26
27#define STA350_FFX_PM_DROP_COMP 0
28#define STA350_FFX_PM_TAPERED_COMP 1
29#define STA350_FFX_PM_FULL_POWER 2
30#define STA350_FFX_PM_VARIABLE_DROP_COMP 3
31
32
33struct sta350_platform_data {
34 u8 output_conf;
35 u8 ch1_output_mapping;
36 u8 ch2_output_mapping;
37 u8 ch3_output_mapping;
38 u8 ffx_power_output_mode;
39 u8 drop_compensation_ns;
40 u8 powerdown_delay_divider;
41 unsigned int thermal_warning_recovery:1;
42 unsigned int thermal_warning_adjustment:1;
43 unsigned int fault_detect_recovery:1;
44 unsigned int oc_warning_adjustment:1;
45 unsigned int max_power_use_mpcc:1;
46 unsigned int max_power_correction:1;
47 unsigned int am_reduction_mode:1;
48 unsigned int odd_pwm_speed_mode:1;
49 unsigned int distortion_compensation:1;
50 unsigned int invalid_input_detect_mute:1;
51 unsigned int activate_mute_output:1;
52 unsigned int bridge_immediate_off:1;
53 unsigned int noise_shape_dc_cut:1;
54 unsigned int powerdown_master_vol:1;
55};
56
57#endif /* __LINUX_SND__STA350_H */
diff --git a/include/trace/events/asoc.h b/include/trace/events/asoc.h
index 03996b2bb04f..c75c795a377b 100644
--- a/include/trace/events/asoc.h
+++ b/include/trace/events/asoc.h
@@ -11,102 +11,10 @@
11 11
12struct snd_soc_jack; 12struct snd_soc_jack;
13struct snd_soc_codec; 13struct snd_soc_codec;
14struct snd_soc_platform;
15struct snd_soc_card; 14struct snd_soc_card;
16struct snd_soc_dapm_widget; 15struct snd_soc_dapm_widget;
17struct snd_soc_dapm_path; 16struct snd_soc_dapm_path;
18 17
19/*
20 * Log register events
21 */
22DECLARE_EVENT_CLASS(snd_soc_reg,
23
24 TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
25 unsigned int val),
26
27 TP_ARGS(codec, reg, val),
28
29 TP_STRUCT__entry(
30 __string( name, codec->name )
31 __field( int, id )
32 __field( unsigned int, reg )
33 __field( unsigned int, val )
34 ),
35
36 TP_fast_assign(
37 __assign_str(name, codec->name);
38 __entry->id = codec->id;
39 __entry->reg = reg;
40 __entry->val = val;
41 ),
42
43 TP_printk("codec=%s.%d reg=%x val=%x", __get_str(name),
44 (int)__entry->id, (unsigned int)__entry->reg,
45 (unsigned int)__entry->val)
46);
47
48DEFINE_EVENT(snd_soc_reg, snd_soc_reg_write,
49
50 TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
51 unsigned int val),
52
53 TP_ARGS(codec, reg, val)
54
55);
56
57DEFINE_EVENT(snd_soc_reg, snd_soc_reg_read,
58
59 TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
60 unsigned int val),
61
62 TP_ARGS(codec, reg, val)
63
64);
65
66DECLARE_EVENT_CLASS(snd_soc_preg,
67
68 TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
69 unsigned int val),
70
71 TP_ARGS(platform, reg, val),
72
73 TP_STRUCT__entry(
74 __string( name, platform->name )
75 __field( int, id )
76 __field( unsigned int, reg )
77 __field( unsigned int, val )
78 ),
79
80 TP_fast_assign(
81 __assign_str(name, platform->name);
82 __entry->id = platform->id;
83 __entry->reg = reg;
84 __entry->val = val;
85 ),
86
87 TP_printk("platform=%s.%d reg=%x val=%x", __get_str(name),
88 (int)__entry->id, (unsigned int)__entry->reg,
89 (unsigned int)__entry->val)
90);
91
92DEFINE_EVENT(snd_soc_preg, snd_soc_preg_write,
93
94 TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
95 unsigned int val),
96
97 TP_ARGS(platform, reg, val)
98
99);
100
101DEFINE_EVENT(snd_soc_preg, snd_soc_preg_read,
102
103 TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
104 unsigned int val),
105
106 TP_ARGS(platform, reg, val)
107
108);
109
110DECLARE_EVENT_CLASS(snd_soc_card, 18DECLARE_EVENT_CLASS(snd_soc_card,
111 19
112 TP_PROTO(struct snd_soc_card *card, int val), 20 TP_PROTO(struct snd_soc_card *card, int val),
diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h
index 010ea89eeb0e..6a1a0245474f 100644
--- a/include/trace/events/ext4.h
+++ b/include/trace/events/ext4.h
@@ -16,15 +16,6 @@ struct mpage_da_data;
16struct ext4_map_blocks; 16struct ext4_map_blocks;
17struct extent_status; 17struct extent_status;
18 18
19/* shim until we merge in the xfs_collapse_range branch */
20#ifndef FALLOC_FL_COLLAPSE_RANGE
21#define FALLOC_FL_COLLAPSE_RANGE 0x08
22#endif
23
24#ifndef FALLOC_FL_ZERO_RANGE
25#define FALLOC_FL_ZERO_RANGE 0x10
26#endif
27
28#define EXT4_I(inode) (container_of(inode, struct ext4_inode_info, vfs_inode)) 19#define EXT4_I(inode) (container_of(inode, struct ext4_inode_info, vfs_inode))
29 20
30#define show_mballoc_flags(flags) __print_flags(flags, "|", \ 21#define show_mballoc_flags(flags) __print_flags(flags, "|", \
diff --git a/include/trace/events/module.h b/include/trace/events/module.h
index 11fd51b413de..7c5cbfe3fc49 100644
--- a/include/trace/events/module.h
+++ b/include/trace/events/module.h
@@ -25,7 +25,7 @@ struct module;
25 { (1UL << TAINT_OOT_MODULE), "O" }, \ 25 { (1UL << TAINT_OOT_MODULE), "O" }, \
26 { (1UL << TAINT_FORCED_MODULE), "F" }, \ 26 { (1UL << TAINT_FORCED_MODULE), "F" }, \
27 { (1UL << TAINT_CRAP), "C" }, \ 27 { (1UL << TAINT_CRAP), "C" }, \
28 { (1UL << TAINT_UNSIGNED_MODULE), "X" }) 28 { (1UL << TAINT_UNSIGNED_MODULE), "E" })
29 29
30TRACE_EVENT(module_load, 30TRACE_EVENT(module_load,
31 31
@@ -80,7 +80,7 @@ DECLARE_EVENT_CLASS(module_refcnt,
80 80
81 TP_fast_assign( 81 TP_fast_assign(
82 __entry->ip = ip; 82 __entry->ip = ip;
83 __entry->refcnt = __this_cpu_read(mod->refptr->incs) + __this_cpu_read(mod->refptr->decs); 83 __entry->refcnt = __this_cpu_read(mod->refptr->incs) - __this_cpu_read(mod->refptr->decs);
84 __assign_str(name, mod->name); 84 __assign_str(name, mod->name);
85 ), 85 ),
86 86
diff --git a/include/uapi/asm-generic/fcntl.h b/include/uapi/asm-generic/fcntl.h
index a9b13f8b3595..7543b3e51331 100644
--- a/include/uapi/asm-generic/fcntl.h
+++ b/include/uapi/asm-generic/fcntl.h
@@ -133,20 +133,20 @@
133#endif 133#endif
134 134
135/* 135/*
136 * fd "private" POSIX locks. 136 * Open File Description Locks
137 * 137 *
138 * Usually POSIX locks held by a process are released on *any* close and are 138 * Usually record locks held by a process are released on *any* close and are
139 * not inherited across a fork(). 139 * not inherited across a fork().
140 * 140 *
141 * These cmd values will set locks that conflict with normal POSIX locks, but 141 * These cmd values will set locks that conflict with process-associated
142 * are "owned" by the opened file, not the process. This means that they are 142 * record locks, but are "owned" by the open file description, not the
143 * inherited across fork() like BSD (flock) locks, and they are only released 143 * process. This means that they are inherited across fork() like BSD (flock)
144 * automatically when the last reference to the the open file against which 144 * locks, and they are only released automatically when the last reference to
145 * they were acquired is put. 145 * the the open file against which they were acquired is put.
146 */ 146 */
147#define F_GETLKP 36 147#define F_OFD_GETLK 36
148#define F_SETLKP 37 148#define F_OFD_SETLK 37
149#define F_SETLKPW 38 149#define F_OFD_SETLKW 38
150 150
151#define F_OWNER_TID 0 151#define F_OWNER_TID 0
152#define F_OWNER_PID 1 152#define F_OWNER_PID 1
diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
index b042b48495d9..b75482112428 100644
--- a/include/uapi/drm/tegra_drm.h
+++ b/include/uapi/drm/tegra_drm.h
@@ -120,7 +120,6 @@ struct drm_tegra_submit {
120 __u32 num_waitchks; 120 __u32 num_waitchks;
121 __u32 waitchk_mask; 121 __u32 waitchk_mask;
122 __u32 timeout; 122 __u32 timeout;
123 __u32 pad;
124 __u64 syncpts; 123 __u64 syncpts;
125 __u64 cmdbufs; 124 __u64 cmdbufs;
126 __u64 relocs; 125 __u64 relocs;
diff --git a/include/uapi/linux/fuse.h b/include/uapi/linux/fuse.h
index cf4750e1bb49..40b5ca8a1b1f 100644
--- a/include/uapi/linux/fuse.h
+++ b/include/uapi/linux/fuse.h
@@ -96,6 +96,11 @@
96 * 96 *
97 * 7.23 97 * 7.23
98 * - add FUSE_WRITEBACK_CACHE 98 * - add FUSE_WRITEBACK_CACHE
99 * - add time_gran to fuse_init_out
100 * - add reserved space to fuse_init_out
101 * - add FATTR_CTIME
102 * - add ctime and ctimensec to fuse_setattr_in
103 * - add FUSE_RENAME2 request
99 */ 104 */
100 105
101#ifndef _LINUX_FUSE_H 106#ifndef _LINUX_FUSE_H
@@ -191,6 +196,7 @@ struct fuse_file_lock {
191#define FATTR_ATIME_NOW (1 << 7) 196#define FATTR_ATIME_NOW (1 << 7)
192#define FATTR_MTIME_NOW (1 << 8) 197#define FATTR_MTIME_NOW (1 << 8)
193#define FATTR_LOCKOWNER (1 << 9) 198#define FATTR_LOCKOWNER (1 << 9)
199#define FATTR_CTIME (1 << 10)
194 200
195/** 201/**
196 * Flags returned by the OPEN request 202 * Flags returned by the OPEN request
@@ -348,6 +354,7 @@ enum fuse_opcode {
348 FUSE_BATCH_FORGET = 42, 354 FUSE_BATCH_FORGET = 42,
349 FUSE_FALLOCATE = 43, 355 FUSE_FALLOCATE = 43,
350 FUSE_READDIRPLUS = 44, 356 FUSE_READDIRPLUS = 44,
357 FUSE_RENAME2 = 45,
351 358
352 /* CUSE specific operations */ 359 /* CUSE specific operations */
353 CUSE_INIT = 4096, 360 CUSE_INIT = 4096,
@@ -426,6 +433,12 @@ struct fuse_rename_in {
426 uint64_t newdir; 433 uint64_t newdir;
427}; 434};
428 435
436struct fuse_rename2_in {
437 uint64_t newdir;
438 uint32_t flags;
439 uint32_t padding;
440};
441
429struct fuse_link_in { 442struct fuse_link_in {
430 uint64_t oldnodeid; 443 uint64_t oldnodeid;
431}; 444};
@@ -438,10 +451,10 @@ struct fuse_setattr_in {
438 uint64_t lock_owner; 451 uint64_t lock_owner;
439 uint64_t atime; 452 uint64_t atime;
440 uint64_t mtime; 453 uint64_t mtime;
441 uint64_t unused2; 454 uint64_t ctime;
442 uint32_t atimensec; 455 uint32_t atimensec;
443 uint32_t mtimensec; 456 uint32_t mtimensec;
444 uint32_t unused3; 457 uint32_t ctimensec;
445 uint32_t mode; 458 uint32_t mode;
446 uint32_t unused4; 459 uint32_t unused4;
447 uint32_t uid; 460 uint32_t uid;
@@ -559,6 +572,9 @@ struct fuse_init_in {
559 uint32_t flags; 572 uint32_t flags;
560}; 573};
561 574
575#define FUSE_COMPAT_INIT_OUT_SIZE 8
576#define FUSE_COMPAT_22_INIT_OUT_SIZE 24
577
562struct fuse_init_out { 578struct fuse_init_out {
563 uint32_t major; 579 uint32_t major;
564 uint32_t minor; 580 uint32_t minor;
@@ -567,6 +583,8 @@ struct fuse_init_out {
567 uint16_t max_background; 583 uint16_t max_background;
568 uint16_t congestion_threshold; 584 uint16_t congestion_threshold;
569 uint32_t max_write; 585 uint32_t max_write;
586 uint32_t time_gran;
587 uint32_t unused[9];
570}; 588};
571 589
572#define CUSE_INIT_INFO_MAX 4096 590#define CUSE_INIT_INFO_MAX 4096
diff --git a/include/uapi/linux/hyperv.h b/include/uapi/linux/hyperv.h
index 9beb7c991638..78e4a86030dd 100644
--- a/include/uapi/linux/hyperv.h
+++ b/include/uapi/linux/hyperv.h
@@ -305,6 +305,7 @@ enum hv_kvp_exchg_pool {
305#define HV_ERROR_DEVICE_NOT_CONNECTED 0x8007048F 305#define HV_ERROR_DEVICE_NOT_CONNECTED 0x8007048F
306#define HV_INVALIDARG 0x80070057 306#define HV_INVALIDARG 0x80070057
307#define HV_GUID_NOTFOUND 0x80041002 307#define HV_GUID_NOTFOUND 0x80041002
308#define HV_ERROR_ALREADY_EXISTS 0x80070050
308 309
309#define ADDR_FAMILY_NONE 0x00 310#define ADDR_FAMILY_NONE 0x00
310#define ADDR_FAMILY_IPV4 0x01 311#define ADDR_FAMILY_IPV4 0x01
diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h
index bd24470d24a2..f4849525519c 100644
--- a/include/uapi/linux/input.h
+++ b/include/uapi/linux/input.h
@@ -164,6 +164,7 @@ struct input_keymap_entry {
164#define INPUT_PROP_DIRECT 0x01 /* direct input devices */ 164#define INPUT_PROP_DIRECT 0x01 /* direct input devices */
165#define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ 165#define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
166#define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ 166#define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
167#define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
167 168
168#define INPUT_PROP_MAX 0x1f 169#define INPUT_PROP_MAX 0x1f
169#define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) 170#define INPUT_PROP_CNT (INPUT_PROP_MAX + 1)
diff --git a/init/Kconfig b/init/Kconfig
index 765018c24cf9..9d3585bb2a7a 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1646,6 +1646,18 @@ config MMAP_ALLOW_UNINITIALIZED
1646 1646
1647 See Documentation/nommu-mmap.txt for more information. 1647 See Documentation/nommu-mmap.txt for more information.
1648 1648
1649config SYSTEM_TRUSTED_KEYRING
1650 bool "Provide system-wide ring of trusted keys"
1651 depends on KEYS
1652 help
1653 Provide a system keyring to which trusted keys can be added. Keys in
1654 the keyring are considered to be trusted. Keys may be added at will
1655 by the kernel from compiled-in data and from hardware key stores, but
1656 userspace may only add extra keys if those keys can be verified by
1657 keys already in the keyring.
1658
1659 Keys in this keyring are used by module signature checking.
1660
1649config PROFILING 1661config PROFILING
1650 bool "Profiling support" 1662 bool "Profiling support"
1651 help 1663 help
@@ -1681,18 +1693,6 @@ config BASE_SMALL
1681 default 0 if BASE_FULL 1693 default 0 if BASE_FULL
1682 default 1 if !BASE_FULL 1694 default 1 if !BASE_FULL
1683 1695
1684config SYSTEM_TRUSTED_KEYRING
1685 bool "Provide system-wide ring of trusted keys"
1686 depends on KEYS
1687 help
1688 Provide a system keyring to which trusted keys can be added. Keys in
1689 the keyring are considered to be trusted. Keys may be added at will
1690 by the kernel from compiled-in data and from hardware key stores, but
1691 userspace may only add extra keys if those keys can be verified by
1692 keys already in the keyring.
1693
1694 Keys in this keyring are used by module signature checking.
1695
1696menuconfig MODULES 1696menuconfig MODULES
1697 bool "Enable loadable module support" 1697 bool "Enable loadable module support"
1698 option modules 1698 option modules
diff --git a/init/main.c b/init/main.c
index 9c7fd4c9249f..48655ceb66f4 100644
--- a/init/main.c
+++ b/init/main.c
@@ -476,7 +476,7 @@ static void __init mm_init(void)
476 vmalloc_init(); 476 vmalloc_init();
477} 477}
478 478
479asmlinkage void __init start_kernel(void) 479asmlinkage __visible void __init start_kernel(void)
480{ 480{
481 char * command_line; 481 char * command_line;
482 extern const struct kernel_param __start___param[], __stop___param[]; 482 extern const struct kernel_param __start___param[], __stop___param[];
diff --git a/kernel/audit.c b/kernel/audit.c
index 7c2893602d06..47845c57eb19 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -643,13 +643,13 @@ static int audit_netlink_ok(struct sk_buff *skb, u16 msg_type)
643 if ((task_active_pid_ns(current) != &init_pid_ns)) 643 if ((task_active_pid_ns(current) != &init_pid_ns))
644 return -EPERM; 644 return -EPERM;
645 645
646 if (!capable(CAP_AUDIT_CONTROL)) 646 if (!netlink_capable(skb, CAP_AUDIT_CONTROL))
647 err = -EPERM; 647 err = -EPERM;
648 break; 648 break;
649 case AUDIT_USER: 649 case AUDIT_USER:
650 case AUDIT_FIRST_USER_MSG ... AUDIT_LAST_USER_MSG: 650 case AUDIT_FIRST_USER_MSG ... AUDIT_LAST_USER_MSG:
651 case AUDIT_FIRST_USER_MSG2 ... AUDIT_LAST_USER_MSG2: 651 case AUDIT_FIRST_USER_MSG2 ... AUDIT_LAST_USER_MSG2:
652 if (!capable(CAP_AUDIT_WRITE)) 652 if (!netlink_capable(skb, CAP_AUDIT_WRITE))
653 err = -EPERM; 653 err = -EPERM;
654 break; 654 break;
655 default: /* bad msg */ 655 default: /* bad msg */
diff --git a/kernel/context_tracking.c b/kernel/context_tracking.c
index 6cb20d2e7ee0..019d45008448 100644
--- a/kernel/context_tracking.c
+++ b/kernel/context_tracking.c
@@ -120,7 +120,7 @@ void context_tracking_user_enter(void)
120 * instead of preempt_schedule() to exit user context if needed before 120 * instead of preempt_schedule() to exit user context if needed before
121 * calling the scheduler. 121 * calling the scheduler.
122 */ 122 */
123asmlinkage void __sched notrace preempt_schedule_context(void) 123asmlinkage __visible void __sched notrace preempt_schedule_context(void)
124{ 124{
125 enum ctx_state prev_ctx; 125 enum ctx_state prev_ctx;
126 126
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index d55092ceee29..6b715c0af1b1 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -234,6 +234,11 @@ again:
234 goto again; 234 goto again;
235 } 235 }
236 timer->base = new_base; 236 timer->base = new_base;
237 } else {
238 if (cpu != this_cpu && hrtimer_check_target(timer, new_base)) {
239 cpu = this_cpu;
240 goto again;
241 }
237 } 242 }
238 return new_base; 243 return new_base;
239} 244}
@@ -569,6 +574,23 @@ hrtimer_force_reprogram(struct hrtimer_cpu_base *cpu_base, int skip_equal)
569 574
570 cpu_base->expires_next.tv64 = expires_next.tv64; 575 cpu_base->expires_next.tv64 = expires_next.tv64;
571 576
577 /*
578 * If a hang was detected in the last timer interrupt then we
579 * leave the hang delay active in the hardware. We want the
580 * system to make progress. That also prevents the following
581 * scenario:
582 * T1 expires 50ms from now
583 * T2 expires 5s from now
584 *
585 * T1 is removed, so this code is called and would reprogram
586 * the hardware to 5s from now. Any hrtimer_start after that
587 * will not reprogram the hardware due to hang_detected being
588 * set. So we'd effectivly block all timers until the T2 event
589 * fires.
590 */
591 if (cpu_base->hang_detected)
592 return;
593
572 if (cpu_base->expires_next.tv64 != KTIME_MAX) 594 if (cpu_base->expires_next.tv64 != KTIME_MAX)
573 tick_program_event(cpu_base->expires_next, 1); 595 tick_program_event(cpu_base->expires_next, 1);
574} 596}
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index a7174617616b..bb07f2928f4b 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -363,6 +363,13 @@ __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
363 if (from > irq) 363 if (from > irq)
364 return -EINVAL; 364 return -EINVAL;
365 from = irq; 365 from = irq;
366 } else {
367 /*
368 * For interrupts which are freely allocated the
369 * architecture can force a lower bound to the @from
370 * argument. x86 uses this to exclude the GSI space.
371 */
372 from = arch_dynirq_lower_bound(from);
366 } 373 }
367 374
368 mutex_lock(&sparse_irq_lock); 375 mutex_lock(&sparse_irq_lock);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 2486a4c1a710..d34131ca372b 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -180,7 +180,7 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
180 struct irq_chip *chip = irq_data_get_irq_chip(data); 180 struct irq_chip *chip = irq_data_get_irq_chip(data);
181 int ret; 181 int ret;
182 182
183 ret = chip->irq_set_affinity(data, mask, false); 183 ret = chip->irq_set_affinity(data, mask, force);
184 switch (ret) { 184 switch (ret) {
185 case IRQ_SET_MASK_OK: 185 case IRQ_SET_MASK_OK:
186 cpumask_copy(data->affinity, mask); 186 cpumask_copy(data->affinity, mask);
@@ -192,7 +192,8 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
192 return ret; 192 return ret;
193} 193}
194 194
195int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) 195int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
196 bool force)
196{ 197{
197 struct irq_chip *chip = irq_data_get_irq_chip(data); 198 struct irq_chip *chip = irq_data_get_irq_chip(data);
198 struct irq_desc *desc = irq_data_to_desc(data); 199 struct irq_desc *desc = irq_data_to_desc(data);
@@ -202,7 +203,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
202 return -EINVAL; 203 return -EINVAL;
203 204
204 if (irq_can_move_pcntxt(data)) { 205 if (irq_can_move_pcntxt(data)) {
205 ret = irq_do_set_affinity(data, mask, false); 206 ret = irq_do_set_affinity(data, mask, force);
206 } else { 207 } else {
207 irqd_set_move_pending(data); 208 irqd_set_move_pending(data);
208 irq_copy_pending(desc, mask); 209 irq_copy_pending(desc, mask);
@@ -217,13 +218,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
217 return ret; 218 return ret;
218} 219}
219 220
220/** 221int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
221 * irq_set_affinity - Set the irq affinity of a given irq
222 * @irq: Interrupt to set affinity
223 * @mask: cpumask
224 *
225 */
226int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
227{ 222{
228 struct irq_desc *desc = irq_to_desc(irq); 223 struct irq_desc *desc = irq_to_desc(irq);
229 unsigned long flags; 224 unsigned long flags;
@@ -233,7 +228,7 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
233 return -EINVAL; 228 return -EINVAL;
234 229
235 raw_spin_lock_irqsave(&desc->lock, flags); 230 raw_spin_lock_irqsave(&desc->lock, flags);
236 ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask); 231 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
237 raw_spin_unlock_irqrestore(&desc->lock, flags); 232 raw_spin_unlock_irqrestore(&desc->lock, flags);
238 return ret; 233 return ret;
239} 234}
diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index b0e9467922e1..d24e4339b46d 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -4188,7 +4188,7 @@ void debug_show_held_locks(struct task_struct *task)
4188} 4188}
4189EXPORT_SYMBOL_GPL(debug_show_held_locks); 4189EXPORT_SYMBOL_GPL(debug_show_held_locks);
4190 4190
4191asmlinkage void lockdep_sys_exit(void) 4191asmlinkage __visible void lockdep_sys_exit(void)
4192{ 4192{
4193 struct task_struct *curr = current; 4193 struct task_struct *curr = current;
4194 4194
diff --git a/kernel/locking/mutex-debug.c b/kernel/locking/mutex-debug.c
index e1191c996c59..5cf6731b98e9 100644
--- a/kernel/locking/mutex-debug.c
+++ b/kernel/locking/mutex-debug.c
@@ -71,18 +71,17 @@ void mutex_remove_waiter(struct mutex *lock, struct mutex_waiter *waiter,
71 71
72void debug_mutex_unlock(struct mutex *lock) 72void debug_mutex_unlock(struct mutex *lock)
73{ 73{
74 if (unlikely(!debug_locks)) 74 if (likely(debug_locks)) {
75 return; 75 DEBUG_LOCKS_WARN_ON(lock->magic != lock);
76 76
77 DEBUG_LOCKS_WARN_ON(lock->magic != lock); 77 if (!lock->owner)
78 DEBUG_LOCKS_WARN_ON(!lock->owner);
79 else
80 DEBUG_LOCKS_WARN_ON(lock->owner != current);
78 81
79 if (!lock->owner) 82 DEBUG_LOCKS_WARN_ON(!lock->wait_list.prev && !lock->wait_list.next);
80 DEBUG_LOCKS_WARN_ON(!lock->owner); 83 mutex_clear_owner(lock);
81 else 84 }
82 DEBUG_LOCKS_WARN_ON(lock->owner != current);
83
84 DEBUG_LOCKS_WARN_ON(!lock->wait_list.prev && !lock->wait_list.next);
85 mutex_clear_owner(lock);
86 85
87 /* 86 /*
88 * __mutex_slowpath_needs_to_unlock() is explicitly 0 for debug 87 * __mutex_slowpath_needs_to_unlock() is explicitly 0 for debug
diff --git a/kernel/module.c b/kernel/module.c
index 11869408f79b..079c4615607d 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -815,9 +815,6 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user,
815 return -EFAULT; 815 return -EFAULT;
816 name[MODULE_NAME_LEN-1] = '\0'; 816 name[MODULE_NAME_LEN-1] = '\0';
817 817
818 if (!(flags & O_NONBLOCK))
819 pr_warn("waiting module removal not supported: please upgrade\n");
820
821 if (mutex_lock_interruptible(&module_mutex) != 0) 818 if (mutex_lock_interruptible(&module_mutex) != 0)
822 return -EINTR; 819 return -EINTR;
823 820
@@ -3271,6 +3268,9 @@ static int load_module(struct load_info *info, const char __user *uargs,
3271 3268
3272 dynamic_debug_setup(info->debug, info->num_debug); 3269 dynamic_debug_setup(info->debug, info->num_debug);
3273 3270
3271 /* Ftrace init must be called in the MODULE_STATE_UNFORMED state */
3272 ftrace_module_init(mod);
3273
3274 /* Finally it's fully formed, ready to start executing. */ 3274 /* Finally it's fully formed, ready to start executing. */
3275 err = complete_formation(mod, info); 3275 err = complete_formation(mod, info);
3276 if (err) 3276 if (err)
diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c
index 18fb7a2fb14b..1ea328aafdc9 100644
--- a/kernel/power/snapshot.c
+++ b/kernel/power/snapshot.c
@@ -1586,7 +1586,7 @@ swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm,
1586 return -ENOMEM; 1586 return -ENOMEM;
1587} 1587}
1588 1588
1589asmlinkage int swsusp_save(void) 1589asmlinkage __visible int swsusp_save(void)
1590{ 1590{
1591 unsigned int nr_pages, nr_highmem; 1591 unsigned int nr_pages, nr_highmem;
1592 1592
diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c
index c3ad9cafe930..8233cd4047d7 100644
--- a/kernel/power/suspend.c
+++ b/kernel/power/suspend.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/console.h> 15#include <linux/console.h>
16#include <linux/cpu.h> 16#include <linux/cpu.h>
17#include <linux/cpuidle.h>
17#include <linux/syscalls.h> 18#include <linux/syscalls.h>
18#include <linux/gfp.h> 19#include <linux/gfp.h>
19#include <linux/io.h> 20#include <linux/io.h>
@@ -53,7 +54,9 @@ static void freeze_begin(void)
53 54
54static void freeze_enter(void) 55static void freeze_enter(void)
55{ 56{
57 cpuidle_resume();
56 wait_event(suspend_freeze_wait_head, suspend_freeze_wake); 58 wait_event(suspend_freeze_wait_head, suspend_freeze_wake);
59 cpuidle_pause();
57} 60}
58 61
59void freeze_wake(void) 62void freeze_wake(void)
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
index a45b50962295..7228258b85ec 100644
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -1674,7 +1674,7 @@ EXPORT_SYMBOL(printk_emit);
1674 * 1674 *
1675 * See the vsnprintf() documentation for format string extensions over C99. 1675 * See the vsnprintf() documentation for format string extensions over C99.
1676 */ 1676 */
1677asmlinkage int printk(const char *fmt, ...) 1677asmlinkage __visible int printk(const char *fmt, ...)
1678{ 1678{
1679 va_list args; 1679 va_list args;
1680 int r; 1680 int r;
@@ -1737,7 +1737,7 @@ void early_vprintk(const char *fmt, va_list ap)
1737 } 1737 }
1738} 1738}
1739 1739
1740asmlinkage void early_printk(const char *fmt, ...) 1740asmlinkage __visible void early_printk(const char *fmt, ...)
1741{ 1741{
1742 va_list ap; 1742 va_list ap;
1743 1743
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 268a45ea238c..d9d8ece46a15 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2192,7 +2192,7 @@ static inline void post_schedule(struct rq *rq)
2192 * schedule_tail - first thing a freshly forked thread must call. 2192 * schedule_tail - first thing a freshly forked thread must call.
2193 * @prev: the thread we just switched away from. 2193 * @prev: the thread we just switched away from.
2194 */ 2194 */
2195asmlinkage void schedule_tail(struct task_struct *prev) 2195asmlinkage __visible void schedule_tail(struct task_struct *prev)
2196 __releases(rq->lock) 2196 __releases(rq->lock)
2197{ 2197{
2198 struct rq *rq = this_rq(); 2198 struct rq *rq = this_rq();
@@ -2741,7 +2741,7 @@ static inline void sched_submit_work(struct task_struct *tsk)
2741 blk_schedule_flush_plug(tsk); 2741 blk_schedule_flush_plug(tsk);
2742} 2742}
2743 2743
2744asmlinkage void __sched schedule(void) 2744asmlinkage __visible void __sched schedule(void)
2745{ 2745{
2746 struct task_struct *tsk = current; 2746 struct task_struct *tsk = current;
2747 2747
@@ -2751,7 +2751,7 @@ asmlinkage void __sched schedule(void)
2751EXPORT_SYMBOL(schedule); 2751EXPORT_SYMBOL(schedule);
2752 2752
2753#ifdef CONFIG_CONTEXT_TRACKING 2753#ifdef CONFIG_CONTEXT_TRACKING
2754asmlinkage void __sched schedule_user(void) 2754asmlinkage __visible void __sched schedule_user(void)
2755{ 2755{
2756 /* 2756 /*
2757 * If we come here after a random call to set_need_resched(), 2757 * If we come here after a random call to set_need_resched(),
@@ -2783,7 +2783,7 @@ void __sched schedule_preempt_disabled(void)
2783 * off of preempt_enable. Kernel preemptions off return from interrupt 2783 * off of preempt_enable. Kernel preemptions off return from interrupt
2784 * occur there and call schedule directly. 2784 * occur there and call schedule directly.
2785 */ 2785 */
2786asmlinkage void __sched notrace preempt_schedule(void) 2786asmlinkage __visible void __sched notrace preempt_schedule(void)
2787{ 2787{
2788 /* 2788 /*
2789 * If there is a non-zero preempt_count or interrupts are disabled, 2789 * If there is a non-zero preempt_count or interrupts are disabled,
@@ -2813,7 +2813,7 @@ EXPORT_SYMBOL(preempt_schedule);
2813 * Note, that this is called and return with irqs disabled. This will 2813 * Note, that this is called and return with irqs disabled. This will
2814 * protect us against recursive calling from irq. 2814 * protect us against recursive calling from irq.
2815 */ 2815 */
2816asmlinkage void __sched preempt_schedule_irq(void) 2816asmlinkage __visible void __sched preempt_schedule_irq(void)
2817{ 2817{
2818 enum ctx_state prev_state; 2818 enum ctx_state prev_state;
2819 2819
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index 27ef40925525..b08095786cb8 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -1021,8 +1021,17 @@ struct task_struct *pick_next_task_dl(struct rq *rq, struct task_struct *prev)
1021 1021
1022 dl_rq = &rq->dl; 1022 dl_rq = &rq->dl;
1023 1023
1024 if (need_pull_dl_task(rq, prev)) 1024 if (need_pull_dl_task(rq, prev)) {
1025 pull_dl_task(rq); 1025 pull_dl_task(rq);
1026 /*
1027 * pull_rt_task() can drop (and re-acquire) rq->lock; this
1028 * means a stop task can slip in, in which case we need to
1029 * re-start task selection.
1030 */
1031 if (rq->stop && rq->stop->on_rq)
1032 return RETRY_TASK;
1033 }
1034
1026 /* 1035 /*
1027 * When prev is DL, we may throttle it in put_prev_task(). 1036 * When prev is DL, we may throttle it in put_prev_task().
1028 * So, we update time before we check for dl_nr_running. 1037 * So, we update time before we check for dl_nr_running.
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 7e9bd0b1fa9e..7570dd969c28 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -1497,7 +1497,7 @@ static void task_numa_placement(struct task_struct *p)
1497 /* If the task is part of a group prevent parallel updates to group stats */ 1497 /* If the task is part of a group prevent parallel updates to group stats */
1498 if (p->numa_group) { 1498 if (p->numa_group) {
1499 group_lock = &p->numa_group->lock; 1499 group_lock = &p->numa_group->lock;
1500 spin_lock(group_lock); 1500 spin_lock_irq(group_lock);
1501 } 1501 }
1502 1502
1503 /* Find the node with the highest number of faults */ 1503 /* Find the node with the highest number of faults */
@@ -1572,7 +1572,7 @@ static void task_numa_placement(struct task_struct *p)
1572 } 1572 }
1573 } 1573 }
1574 1574
1575 spin_unlock(group_lock); 1575 spin_unlock_irq(group_lock);
1576 } 1576 }
1577 1577
1578 /* Preferred node as the node with the most faults */ 1578 /* Preferred node as the node with the most faults */
@@ -1677,7 +1677,8 @@ static void task_numa_group(struct task_struct *p, int cpupid, int flags,
1677 if (!join) 1677 if (!join)
1678 return; 1678 return;
1679 1679
1680 double_lock(&my_grp->lock, &grp->lock); 1680 BUG_ON(irqs_disabled());
1681 double_lock_irq(&my_grp->lock, &grp->lock);
1681 1682
1682 for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++) { 1683 for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++) {
1683 my_grp->faults[i] -= p->numa_faults_memory[i]; 1684 my_grp->faults[i] -= p->numa_faults_memory[i];
@@ -1691,7 +1692,7 @@ static void task_numa_group(struct task_struct *p, int cpupid, int flags,
1691 grp->nr_tasks++; 1692 grp->nr_tasks++;
1692 1693
1693 spin_unlock(&my_grp->lock); 1694 spin_unlock(&my_grp->lock);
1694 spin_unlock(&grp->lock); 1695 spin_unlock_irq(&grp->lock);
1695 1696
1696 rcu_assign_pointer(p->numa_group, grp); 1697 rcu_assign_pointer(p->numa_group, grp);
1697 1698
@@ -1710,14 +1711,14 @@ void task_numa_free(struct task_struct *p)
1710 void *numa_faults = p->numa_faults_memory; 1711 void *numa_faults = p->numa_faults_memory;
1711 1712
1712 if (grp) { 1713 if (grp) {
1713 spin_lock(&grp->lock); 1714 spin_lock_irq(&grp->lock);
1714 for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++) 1715 for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++)
1715 grp->faults[i] -= p->numa_faults_memory[i]; 1716 grp->faults[i] -= p->numa_faults_memory[i];
1716 grp->total_faults -= p->total_numa_faults; 1717 grp->total_faults -= p->total_numa_faults;
1717 1718
1718 list_del(&p->numa_entry); 1719 list_del(&p->numa_entry);
1719 grp->nr_tasks--; 1720 grp->nr_tasks--;
1720 spin_unlock(&grp->lock); 1721 spin_unlock_irq(&grp->lock);
1721 rcu_assign_pointer(p->numa_group, NULL); 1722 rcu_assign_pointer(p->numa_group, NULL);
1722 put_numa_group(grp); 1723 put_numa_group(grp);
1723 } 1724 }
@@ -6727,7 +6728,8 @@ static int idle_balance(struct rq *this_rq)
6727out: 6728out:
6728 /* Is there a task of a high priority class? */ 6729 /* Is there a task of a high priority class? */
6729 if (this_rq->nr_running != this_rq->cfs.h_nr_running && 6730 if (this_rq->nr_running != this_rq->cfs.h_nr_running &&
6730 (this_rq->dl.dl_nr_running || 6731 ((this_rq->stop && this_rq->stop->on_rq) ||
6732 this_rq->dl.dl_nr_running ||
6731 (this_rq->rt.rt_nr_running && !rt_rq_throttled(&this_rq->rt)))) 6733 (this_rq->rt.rt_nr_running && !rt_rq_throttled(&this_rq->rt))))
6732 pulled_task = -1; 6734 pulled_task = -1;
6733 6735
diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
index d8cdf1618551..bd2267ad404f 100644
--- a/kernel/sched/rt.c
+++ b/kernel/sched/rt.c
@@ -1362,10 +1362,11 @@ pick_next_task_rt(struct rq *rq, struct task_struct *prev)
1362 pull_rt_task(rq); 1362 pull_rt_task(rq);
1363 /* 1363 /*
1364 * pull_rt_task() can drop (and re-acquire) rq->lock; this 1364 * pull_rt_task() can drop (and re-acquire) rq->lock; this
1365 * means a dl task can slip in, in which case we need to 1365 * means a dl or stop task can slip in, in which case we need
1366 * re-start task selection. 1366 * to re-start task selection.
1367 */ 1367 */
1368 if (unlikely(rq->dl.dl_nr_running)) 1368 if (unlikely((rq->stop && rq->stop->on_rq) ||
1369 rq->dl.dl_nr_running))
1369 return RETRY_TASK; 1370 return RETRY_TASK;
1370 } 1371 }
1371 1372
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index c9007f28d3a2..456e492a3dca 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -1385,6 +1385,15 @@ static inline void double_lock(spinlock_t *l1, spinlock_t *l2)
1385 spin_lock_nested(l2, SINGLE_DEPTH_NESTING); 1385 spin_lock_nested(l2, SINGLE_DEPTH_NESTING);
1386} 1386}
1387 1387
1388static inline void double_lock_irq(spinlock_t *l1, spinlock_t *l2)
1389{
1390 if (l1 > l2)
1391 swap(l1, l2);
1392
1393 spin_lock_irq(l1);
1394 spin_lock_nested(l2, SINGLE_DEPTH_NESTING);
1395}
1396
1388static inline void double_raw_lock(raw_spinlock_t *l1, raw_spinlock_t *l2) 1397static inline void double_raw_lock(raw_spinlock_t *l1, raw_spinlock_t *l2)
1389{ 1398{
1390 if (l1 > l2) 1399 if (l1 > l2)
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index d8d046c0726a..b35c21503a36 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -69,18 +69,17 @@ static void populate_seccomp_data(struct seccomp_data *sd)
69{ 69{
70 struct task_struct *task = current; 70 struct task_struct *task = current;
71 struct pt_regs *regs = task_pt_regs(task); 71 struct pt_regs *regs = task_pt_regs(task);
72 unsigned long args[6];
72 73
73 sd->nr = syscall_get_nr(task, regs); 74 sd->nr = syscall_get_nr(task, regs);
74 sd->arch = syscall_get_arch(); 75 sd->arch = syscall_get_arch();
75 76 syscall_get_arguments(task, regs, 0, 6, args);
76 /* Unroll syscall_get_args to help gcc on arm. */ 77 sd->args[0] = args[0];
77 syscall_get_arguments(task, regs, 0, 1, (unsigned long *) &sd->args[0]); 78 sd->args[1] = args[1];
78 syscall_get_arguments(task, regs, 1, 1, (unsigned long *) &sd->args[1]); 79 sd->args[2] = args[2];
79 syscall_get_arguments(task, regs, 2, 1, (unsigned long *) &sd->args[2]); 80 sd->args[3] = args[3];
80 syscall_get_arguments(task, regs, 3, 1, (unsigned long *) &sd->args[3]); 81 sd->args[4] = args[4];
81 syscall_get_arguments(task, regs, 4, 1, (unsigned long *) &sd->args[4]); 82 sd->args[5] = args[5];
82 syscall_get_arguments(task, regs, 5, 1, (unsigned long *) &sd->args[5]);
83
84 sd->instruction_pointer = KSTK_EIP(task); 83 sd->instruction_pointer = KSTK_EIP(task);
85} 84}
86 85
@@ -256,6 +255,7 @@ static long seccomp_attach_filter(struct sock_fprog *fprog)
256 goto free_prog; 255 goto free_prog;
257 256
258 /* Allocate a new seccomp_filter */ 257 /* Allocate a new seccomp_filter */
258 ret = -ENOMEM;
259 filter = kzalloc(sizeof(struct seccomp_filter) + 259 filter = kzalloc(sizeof(struct seccomp_filter) +
260 sizeof(struct sock_filter_int) * new_len, 260 sizeof(struct sock_filter_int) * new_len,
261 GFP_KERNEL|__GFP_NOWARN); 261 GFP_KERNEL|__GFP_NOWARN);
@@ -265,6 +265,7 @@ static long seccomp_attach_filter(struct sock_fprog *fprog)
265 ret = sk_convert_filter(fp, fprog->len, filter->insnsi, &new_len); 265 ret = sk_convert_filter(fp, fprog->len, filter->insnsi, &new_len);
266 if (ret) 266 if (ret)
267 goto free_filter; 267 goto free_filter;
268 kfree(fp);
268 269
269 atomic_set(&filter->usage, 1); 270 atomic_set(&filter->usage, 1);
270 filter->len = new_len; 271 filter->len = new_len;
diff --git a/kernel/softirq.c b/kernel/softirq.c
index b50990a5bea0..92f24f5e8d52 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -223,7 +223,7 @@ static inline bool lockdep_softirq_start(void) { return false; }
223static inline void lockdep_softirq_end(bool in_hardirq) { } 223static inline void lockdep_softirq_end(bool in_hardirq) { }
224#endif 224#endif
225 225
226asmlinkage void __do_softirq(void) 226asmlinkage __visible void __do_softirq(void)
227{ 227{
228 unsigned long end = jiffies + MAX_SOFTIRQ_TIME; 228 unsigned long end = jiffies + MAX_SOFTIRQ_TIME;
229 unsigned long old_flags = current->flags; 229 unsigned long old_flags = current->flags;
@@ -299,7 +299,7 @@ restart:
299 tsk_restore_flags(current, old_flags, PF_MEMALLOC); 299 tsk_restore_flags(current, old_flags, PF_MEMALLOC);
300} 300}
301 301
302asmlinkage void do_softirq(void) 302asmlinkage __visible void do_softirq(void)
303{ 303{
304 __u32 pending; 304 __u32 pending;
305 unsigned long flags; 305 unsigned long flags;
@@ -779,3 +779,8 @@ int __init __weak arch_early_irq_init(void)
779{ 779{
780 return 0; 780 return 0;
781} 781}
782
783unsigned int __weak arch_dynirq_lower_bound(unsigned int from)
784{
785 return from;
786}
diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c
index 015661279b68..0a0608edeb26 100644
--- a/kernel/time/tick-common.c
+++ b/kernel/time/tick-common.c
@@ -276,7 +276,7 @@ static bool tick_check_preferred(struct clock_event_device *curdev,
276bool tick_check_replacement(struct clock_event_device *curdev, 276bool tick_check_replacement(struct clock_event_device *curdev,
277 struct clock_event_device *newdev) 277 struct clock_event_device *newdev)
278{ 278{
279 if (tick_check_percpu(curdev, newdev, smp_processor_id())) 279 if (!tick_check_percpu(curdev, newdev, smp_processor_id()))
280 return false; 280 return false;
281 281
282 return tick_check_preferred(curdev, newdev); 282 return tick_check_preferred(curdev, newdev);
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 9f8af69c67ec..6558b7ac112d 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -84,6 +84,9 @@ static void tick_do_update_jiffies64(ktime_t now)
84 84
85 /* Keep the tick_next_period variable up to date */ 85 /* Keep the tick_next_period variable up to date */
86 tick_next_period = ktime_add(last_jiffies_update, tick_period); 86 tick_next_period = ktime_add(last_jiffies_update, tick_period);
87 } else {
88 write_sequnlock(&jiffies_lock);
89 return;
87 } 90 }
88 write_sequnlock(&jiffies_lock); 91 write_sequnlock(&jiffies_lock);
89 update_wall_time(); 92 update_wall_time();
@@ -967,7 +970,7 @@ static void tick_nohz_switch_to_nohz(void)
967 struct tick_sched *ts = &__get_cpu_var(tick_cpu_sched); 970 struct tick_sched *ts = &__get_cpu_var(tick_cpu_sched);
968 ktime_t next; 971 ktime_t next;
969 972
970 if (!tick_nohz_active) 973 if (!tick_nohz_enabled)
971 return; 974 return;
972 975
973 local_irq_disable(); 976 local_irq_disable();
diff --git a/kernel/timer.c b/kernel/timer.c
index 87bd529879c2..3bb01a323b2a 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -838,7 +838,7 @@ unsigned long apply_slack(struct timer_list *timer, unsigned long expires)
838 838
839 bit = find_last_bit(&mask, BITS_PER_LONG); 839 bit = find_last_bit(&mask, BITS_PER_LONG);
840 840
841 mask = (1 << bit) - 1; 841 mask = (1UL << bit) - 1;
842 842
843 expires_limit = expires_limit & ~(mask); 843 expires_limit = expires_limit & ~(mask);
844 844
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 1fd4b9479210..4a54a25afa2f 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -4330,16 +4330,11 @@ static void ftrace_init_module(struct module *mod,
4330 ftrace_process_locs(mod, start, end); 4330 ftrace_process_locs(mod, start, end);
4331} 4331}
4332 4332
4333static int ftrace_module_notify_enter(struct notifier_block *self, 4333void ftrace_module_init(struct module *mod)
4334 unsigned long val, void *data)
4335{ 4334{
4336 struct module *mod = data; 4335 ftrace_init_module(mod, mod->ftrace_callsites,
4337 4336 mod->ftrace_callsites +
4338 if (val == MODULE_STATE_COMING) 4337 mod->num_ftrace_callsites);
4339 ftrace_init_module(mod, mod->ftrace_callsites,
4340 mod->ftrace_callsites +
4341 mod->num_ftrace_callsites);
4342 return 0;
4343} 4338}
4344 4339
4345static int ftrace_module_notify_exit(struct notifier_block *self, 4340static int ftrace_module_notify_exit(struct notifier_block *self,
@@ -4353,11 +4348,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self,
4353 return 0; 4348 return 0;
4354} 4349}
4355#else 4350#else
4356static int ftrace_module_notify_enter(struct notifier_block *self,
4357 unsigned long val, void *data)
4358{
4359 return 0;
4360}
4361static int ftrace_module_notify_exit(struct notifier_block *self, 4351static int ftrace_module_notify_exit(struct notifier_block *self,
4362 unsigned long val, void *data) 4352 unsigned long val, void *data)
4363{ 4353{
@@ -4365,11 +4355,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self,
4365} 4355}
4366#endif /* CONFIG_MODULES */ 4356#endif /* CONFIG_MODULES */
4367 4357
4368struct notifier_block ftrace_module_enter_nb = {
4369 .notifier_call = ftrace_module_notify_enter,
4370 .priority = INT_MAX, /* Run before anything that can use kprobes */
4371};
4372
4373struct notifier_block ftrace_module_exit_nb = { 4358struct notifier_block ftrace_module_exit_nb = {
4374 .notifier_call = ftrace_module_notify_exit, 4359 .notifier_call = ftrace_module_notify_exit,
4375 .priority = INT_MIN, /* Run after anything that can remove kprobes */ 4360 .priority = INT_MIN, /* Run after anything that can remove kprobes */
@@ -4403,10 +4388,6 @@ void __init ftrace_init(void)
4403 __start_mcount_loc, 4388 __start_mcount_loc,
4404 __stop_mcount_loc); 4389 __stop_mcount_loc);
4405 4390
4406 ret = register_module_notifier(&ftrace_module_enter_nb);
4407 if (ret)
4408 pr_warning("Failed to register trace ftrace module enter notifier\n");
4409
4410 ret = register_module_notifier(&ftrace_module_exit_nb); 4391 ret = register_module_notifier(&ftrace_module_exit_nb);
4411 if (ret) 4392 if (ret)
4412 pr_warning("Failed to register trace ftrace module exit notifier\n"); 4393 pr_warning("Failed to register trace ftrace module exit notifier\n");
diff --git a/kernel/trace/trace_events_trigger.c b/kernel/trace/trace_events_trigger.c
index 925f537f07d1..4747b476a030 100644
--- a/kernel/trace/trace_events_trigger.c
+++ b/kernel/trace/trace_events_trigger.c
@@ -77,7 +77,7 @@ event_triggers_call(struct ftrace_event_file *file, void *rec)
77 data->ops->func(data); 77 data->ops->func(data);
78 continue; 78 continue;
79 } 79 }
80 filter = rcu_dereference(data->filter); 80 filter = rcu_dereference_sched(data->filter);
81 if (filter && !filter_match_preds(filter, rec)) 81 if (filter && !filter_match_preds(filter, rec))
82 continue; 82 continue;
83 if (data->cmd_ops->post_trigger) { 83 if (data->cmd_ops->post_trigger) {
diff --git a/kernel/trace/trace_functions.c b/kernel/trace/trace_functions.c
index 5b781d2be383..ffd56351b521 100644
--- a/kernel/trace/trace_functions.c
+++ b/kernel/trace/trace_functions.c
@@ -58,12 +58,16 @@ int ftrace_create_function_files(struct trace_array *tr,
58{ 58{
59 int ret; 59 int ret;
60 60
61 /* The top level array uses the "global_ops". */ 61 /*
62 if (!(tr->flags & TRACE_ARRAY_FL_GLOBAL)) { 62 * The top level array uses the "global_ops", and the files are
63 ret = allocate_ftrace_ops(tr); 63 * created on boot up.
64 if (ret) 64 */
65 return ret; 65 if (tr->flags & TRACE_ARRAY_FL_GLOBAL)
66 } 66 return 0;
67
68 ret = allocate_ftrace_ops(tr);
69 if (ret)
70 return ret;
67 71
68 ftrace_create_filter_files(tr->ops, parent); 72 ftrace_create_filter_files(tr->ops, parent);
69 73
diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c
index 930e51462dc8..c082a7441345 100644
--- a/kernel/trace/trace_uprobe.c
+++ b/kernel/trace/trace_uprobe.c
@@ -732,9 +732,15 @@ static int uprobe_buffer_enable(void)
732 732
733static void uprobe_buffer_disable(void) 733static void uprobe_buffer_disable(void)
734{ 734{
735 int cpu;
736
735 BUG_ON(!mutex_is_locked(&event_mutex)); 737 BUG_ON(!mutex_is_locked(&event_mutex));
736 738
737 if (--uprobe_buffer_refcnt == 0) { 739 if (--uprobe_buffer_refcnt == 0) {
740 for_each_possible_cpu(cpu)
741 free_page((unsigned long)per_cpu_ptr(uprobe_cpu_buffer,
742 cpu)->buf);
743
738 free_percpu(uprobe_cpu_buffer); 744 free_percpu(uprobe_cpu_buffer);
739 uprobe_cpu_buffer = NULL; 745 uprobe_cpu_buffer = NULL;
740 } 746 }
diff --git a/kernel/tracepoint.c b/kernel/tracepoint.c
index ac5b23cf7212..6620e5837ce2 100644
--- a/kernel/tracepoint.c
+++ b/kernel/tracepoint.c
@@ -188,7 +188,6 @@ static int tracepoint_add_func(struct tracepoint *tp,
188 WARN_ON_ONCE(1); 188 WARN_ON_ONCE(1);
189 return PTR_ERR(old); 189 return PTR_ERR(old);
190 } 190 }
191 release_probes(old);
192 191
193 /* 192 /*
194 * rcu_assign_pointer has a smp_wmb() which makes sure that the new 193 * rcu_assign_pointer has a smp_wmb() which makes sure that the new
@@ -200,6 +199,7 @@ static int tracepoint_add_func(struct tracepoint *tp,
200 rcu_assign_pointer(tp->funcs, tp_funcs); 199 rcu_assign_pointer(tp->funcs, tp_funcs);
201 if (!static_key_enabled(&tp->key)) 200 if (!static_key_enabled(&tp->key))
202 static_key_slow_inc(&tp->key); 201 static_key_slow_inc(&tp->key);
202 release_probes(old);
203 return 0; 203 return 0;
204} 204}
205 205
@@ -221,7 +221,6 @@ static int tracepoint_remove_func(struct tracepoint *tp,
221 WARN_ON_ONCE(1); 221 WARN_ON_ONCE(1);
222 return PTR_ERR(old); 222 return PTR_ERR(old);
223 } 223 }
224 release_probes(old);
225 224
226 if (!tp_funcs) { 225 if (!tp_funcs) {
227 /* Removed last function */ 226 /* Removed last function */
@@ -232,6 +231,7 @@ static int tracepoint_remove_func(struct tracepoint *tp,
232 static_key_slow_dec(&tp->key); 231 static_key_slow_dec(&tp->key);
233 } 232 }
234 rcu_assign_pointer(tp->funcs, tp_funcs); 233 rcu_assign_pointer(tp->funcs, tp_funcs);
234 release_probes(old);
235 return 0; 235 return 0;
236} 236}
237 237
diff --git a/kernel/user_namespace.c b/kernel/user_namespace.c
index 0d8f6023fd8d..bf71b4b2d632 100644
--- a/kernel/user_namespace.c
+++ b/kernel/user_namespace.c
@@ -152,7 +152,7 @@ static u32 map_id_range_down(struct uid_gid_map *map, u32 id, u32 count)
152 152
153 /* Find the matching extent */ 153 /* Find the matching extent */
154 extents = map->nr_extents; 154 extents = map->nr_extents;
155 smp_read_barrier_depends(); 155 smp_rmb();
156 for (idx = 0; idx < extents; idx++) { 156 for (idx = 0; idx < extents; idx++) {
157 first = map->extent[idx].first; 157 first = map->extent[idx].first;
158 last = first + map->extent[idx].count - 1; 158 last = first + map->extent[idx].count - 1;
@@ -176,7 +176,7 @@ static u32 map_id_down(struct uid_gid_map *map, u32 id)
176 176
177 /* Find the matching extent */ 177 /* Find the matching extent */
178 extents = map->nr_extents; 178 extents = map->nr_extents;
179 smp_read_barrier_depends(); 179 smp_rmb();
180 for (idx = 0; idx < extents; idx++) { 180 for (idx = 0; idx < extents; idx++) {
181 first = map->extent[idx].first; 181 first = map->extent[idx].first;
182 last = first + map->extent[idx].count - 1; 182 last = first + map->extent[idx].count - 1;
@@ -199,7 +199,7 @@ static u32 map_id_up(struct uid_gid_map *map, u32 id)
199 199
200 /* Find the matching extent */ 200 /* Find the matching extent */
201 extents = map->nr_extents; 201 extents = map->nr_extents;
202 smp_read_barrier_depends(); 202 smp_rmb();
203 for (idx = 0; idx < extents; idx++) { 203 for (idx = 0; idx < extents; idx++) {
204 first = map->extent[idx].lower_first; 204 first = map->extent[idx].lower_first;
205 last = first + map->extent[idx].count - 1; 205 last = first + map->extent[idx].count - 1;
@@ -615,9 +615,8 @@ static ssize_t map_write(struct file *file, const char __user *buf,
615 * were written before the count of the extents. 615 * were written before the count of the extents.
616 * 616 *
617 * To achieve this smp_wmb() is used on guarantee the write 617 * To achieve this smp_wmb() is used on guarantee the write
618 * order and smp_read_barrier_depends() is guaranteed that we 618 * order and smp_rmb() is guaranteed that we don't have crazy
619 * don't have crazy architectures returning stale data. 619 * architectures returning stale data.
620 *
621 */ 620 */
622 mutex_lock(&id_map_mutex); 621 mutex_lock(&id_map_mutex);
623 622
diff --git a/kernel/watchdog.c b/kernel/watchdog.c
index e90089fd78e0..516203e665fc 100644
--- a/kernel/watchdog.c
+++ b/kernel/watchdog.c
@@ -138,7 +138,11 @@ static void __touch_watchdog(void)
138 138
139void touch_softlockup_watchdog(void) 139void touch_softlockup_watchdog(void)
140{ 140{
141 __this_cpu_write(watchdog_touch_ts, 0); 141 /*
142 * Preemption can be enabled. It doesn't matter which CPU's timestamp
143 * gets zeroed here, so use the raw_ operation.
144 */
145 raw_cpu_write(watchdog_touch_ts, 0);
142} 146}
143EXPORT_SYMBOL(touch_softlockup_watchdog); 147EXPORT_SYMBOL(touch_softlockup_watchdog);
144 148
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 140b66a874c1..819ac51202c0 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -505,8 +505,7 @@ config DEBUG_VM_RB
505 bool "Debug VM red-black trees" 505 bool "Debug VM red-black trees"
506 depends on DEBUG_VM 506 depends on DEBUG_VM
507 help 507 help
508 Enable this to turn on more extended checks in the virtual-memory 508 Enable VM red-black tree debugging information and extra validations.
509 system that may impact performance.
510 509
511 If unsure, say N. 510 If unsure, say N.
512 511
diff --git a/lib/dump_stack.c b/lib/dump_stack.c
index f23b63f0a1c3..6745c6230db3 100644
--- a/lib/dump_stack.c
+++ b/lib/dump_stack.c
@@ -23,7 +23,7 @@ static void __dump_stack(void)
23#ifdef CONFIG_SMP 23#ifdef CONFIG_SMP
24static atomic_t dump_lock = ATOMIC_INIT(-1); 24static atomic_t dump_lock = ATOMIC_INIT(-1);
25 25
26asmlinkage void dump_stack(void) 26asmlinkage __visible void dump_stack(void)
27{ 27{
28 int was_locked; 28 int was_locked;
29 int old; 29 int old;
@@ -55,7 +55,7 @@ retry:
55 preempt_enable(); 55 preempt_enable();
56} 56}
57#else 57#else
58asmlinkage void dump_stack(void) 58asmlinkage __visible void dump_stack(void)
59{ 59{
60 __dump_stack(); 60 __dump_stack();
61} 61}
diff --git a/mm/compaction.c b/mm/compaction.c
index 37f976287068..627dc2e4320f 100644
--- a/mm/compaction.c
+++ b/mm/compaction.c
@@ -671,16 +671,20 @@ static void isolate_freepages(struct zone *zone,
671 struct compact_control *cc) 671 struct compact_control *cc)
672{ 672{
673 struct page *page; 673 struct page *page;
674 unsigned long high_pfn, low_pfn, pfn, z_end_pfn, end_pfn; 674 unsigned long high_pfn, low_pfn, pfn, z_end_pfn;
675 int nr_freepages = cc->nr_freepages; 675 int nr_freepages = cc->nr_freepages;
676 struct list_head *freelist = &cc->freepages; 676 struct list_head *freelist = &cc->freepages;
677 677
678 /* 678 /*
679 * Initialise the free scanner. The starting point is where we last 679 * Initialise the free scanner. The starting point is where we last
680 * scanned from (or the end of the zone if starting). The low point 680 * successfully isolated from, zone-cached value, or the end of the
681 * is the end of the pageblock the migration scanner is using. 681 * zone when isolating for the first time. We need this aligned to
682 * the pageblock boundary, because we do pfn -= pageblock_nr_pages
683 * in the for loop.
684 * The low boundary is the end of the pageblock the migration scanner
685 * is using.
682 */ 686 */
683 pfn = cc->free_pfn; 687 pfn = cc->free_pfn & ~(pageblock_nr_pages-1);
684 low_pfn = ALIGN(cc->migrate_pfn + 1, pageblock_nr_pages); 688 low_pfn = ALIGN(cc->migrate_pfn + 1, pageblock_nr_pages);
685 689
686 /* 690 /*
@@ -700,6 +704,7 @@ static void isolate_freepages(struct zone *zone,
700 for (; pfn >= low_pfn && cc->nr_migratepages > nr_freepages; 704 for (; pfn >= low_pfn && cc->nr_migratepages > nr_freepages;
701 pfn -= pageblock_nr_pages) { 705 pfn -= pageblock_nr_pages) {
702 unsigned long isolated; 706 unsigned long isolated;
707 unsigned long end_pfn;
703 708
704 /* 709 /*
705 * This can iterate a massively long zone without finding any 710 * This can iterate a massively long zone without finding any
@@ -734,13 +739,10 @@ static void isolate_freepages(struct zone *zone,
734 isolated = 0; 739 isolated = 0;
735 740
736 /* 741 /*
737 * As pfn may not start aligned, pfn+pageblock_nr_page 742 * Take care when isolating in last pageblock of a zone which
738 * may cross a MAX_ORDER_NR_PAGES boundary and miss 743 * ends in the middle of a pageblock.
739 * a pfn_valid check. Ensure isolate_freepages_block()
740 * only scans within a pageblock
741 */ 744 */
742 end_pfn = ALIGN(pfn + 1, pageblock_nr_pages); 745 end_pfn = min(pfn + pageblock_nr_pages, z_end_pfn);
743 end_pfn = min(end_pfn, z_end_pfn);
744 isolated = isolate_freepages_block(cc, pfn, end_pfn, 746 isolated = isolate_freepages_block(cc, pfn, end_pfn,
745 freelist, false); 747 freelist, false);
746 nr_freepages += isolated; 748 nr_freepages += isolated;
diff --git a/mm/filemap.c b/mm/filemap.c
index a82fbe4c9e8e..000a220e2a41 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -906,8 +906,8 @@ EXPORT_SYMBOL(page_cache_prev_hole);
906 * Looks up the page cache slot at @mapping & @offset. If there is a 906 * Looks up the page cache slot at @mapping & @offset. If there is a
907 * page cache page, it is returned with an increased refcount. 907 * page cache page, it is returned with an increased refcount.
908 * 908 *
909 * If the slot holds a shadow entry of a previously evicted page, it 909 * If the slot holds a shadow entry of a previously evicted page, or a
910 * is returned. 910 * swap entry from shmem/tmpfs, it is returned.
911 * 911 *
912 * Otherwise, %NULL is returned. 912 * Otherwise, %NULL is returned.
913 */ 913 */
@@ -928,9 +928,9 @@ repeat:
928 if (radix_tree_deref_retry(page)) 928 if (radix_tree_deref_retry(page))
929 goto repeat; 929 goto repeat;
930 /* 930 /*
931 * Otherwise, shmem/tmpfs must be storing a swap entry 931 * A shadow entry of a recently evicted page,
932 * here as an exceptional entry: so return it without 932 * or a swap entry from shmem/tmpfs. Return
933 * attempting to raise page count. 933 * it without attempting to raise page count.
934 */ 934 */
935 goto out; 935 goto out;
936 } 936 }
@@ -983,8 +983,8 @@ EXPORT_SYMBOL(find_get_page);
983 * page cache page, it is returned locked and with an increased 983 * page cache page, it is returned locked and with an increased
984 * refcount. 984 * refcount.
985 * 985 *
986 * If the slot holds a shadow entry of a previously evicted page, it 986 * If the slot holds a shadow entry of a previously evicted page, or a
987 * is returned. 987 * swap entry from shmem/tmpfs, it is returned.
988 * 988 *
989 * Otherwise, %NULL is returned. 989 * Otherwise, %NULL is returned.
990 * 990 *
@@ -1099,8 +1099,8 @@ EXPORT_SYMBOL(find_or_create_page);
1099 * with ascending indexes. There may be holes in the indices due to 1099 * with ascending indexes. There may be holes in the indices due to
1100 * not-present pages. 1100 * not-present pages.
1101 * 1101 *
1102 * Any shadow entries of evicted pages are included in the returned 1102 * Any shadow entries of evicted pages, or swap entries from
1103 * array. 1103 * shmem/tmpfs, are included in the returned array.
1104 * 1104 *
1105 * find_get_entries() returns the number of pages and shadow entries 1105 * find_get_entries() returns the number of pages and shadow entries
1106 * which were found. 1106 * which were found.
@@ -1128,9 +1128,9 @@ repeat:
1128 if (radix_tree_deref_retry(page)) 1128 if (radix_tree_deref_retry(page))
1129 goto restart; 1129 goto restart;
1130 /* 1130 /*
1131 * Otherwise, we must be storing a swap entry 1131 * A shadow entry of a recently evicted page,
1132 * here as an exceptional entry: so return it 1132 * or a swap entry from shmem/tmpfs. Return
1133 * without attempting to raise page count. 1133 * it without attempting to raise page count.
1134 */ 1134 */
1135 goto export; 1135 goto export;
1136 } 1136 }
@@ -1198,9 +1198,9 @@ repeat:
1198 goto restart; 1198 goto restart;
1199 } 1199 }
1200 /* 1200 /*
1201 * Otherwise, shmem/tmpfs must be storing a swap entry 1201 * A shadow entry of a recently evicted page,
1202 * here as an exceptional entry: so skip over it - 1202 * or a swap entry from shmem/tmpfs. Skip
1203 * we only reach this from invalidate_mapping_pages(). 1203 * over it.
1204 */ 1204 */
1205 continue; 1205 continue;
1206 } 1206 }
@@ -1265,9 +1265,9 @@ repeat:
1265 goto restart; 1265 goto restart;
1266 } 1266 }
1267 /* 1267 /*
1268 * Otherwise, shmem/tmpfs must be storing a swap entry 1268 * A shadow entry of a recently evicted page,
1269 * here as an exceptional entry: so stop looking for 1269 * or a swap entry from shmem/tmpfs. Stop
1270 * contiguous pages. 1270 * looking for contiguous pages.
1271 */ 1271 */
1272 break; 1272 break;
1273 } 1273 }
@@ -1341,10 +1341,17 @@ repeat:
1341 goto restart; 1341 goto restart;
1342 } 1342 }
1343 /* 1343 /*
1344 * This function is never used on a shmem/tmpfs 1344 * A shadow entry of a recently evicted page.
1345 * mapping, so a swap entry won't be found here. 1345 *
1346 * Those entries should never be tagged, but
1347 * this tree walk is lockless and the tags are
1348 * looked up in bulk, one radix tree node at a
1349 * time, so there is a sizable window for page
1350 * reclaim to evict a page we saw tagged.
1351 *
1352 * Skip over it.
1346 */ 1353 */
1347 BUG(); 1354 continue;
1348 } 1355 }
1349 1356
1350 if (!page_cache_get_speculative(page)) 1357 if (!page_cache_get_speculative(page))
@@ -2581,7 +2588,6 @@ EXPORT_SYMBOL(generic_perform_write);
2581 * @iocb: IO state structure (file, offset, etc.) 2588 * @iocb: IO state structure (file, offset, etc.)
2582 * @iov: vector with data to write 2589 * @iov: vector with data to write
2583 * @nr_segs: number of segments in the vector 2590 * @nr_segs: number of segments in the vector
2584 * @ppos: position where to write
2585 * 2591 *
2586 * This function does all the work needed for actually writing data to a 2592 * This function does all the work needed for actually writing data to a
2587 * file. It does all basic checks, removes SUID from the file, updates 2593 * file. It does all basic checks, removes SUID from the file, updates
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 64635f5278ff..b4b1feba6472 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1536,16 +1536,23 @@ pmd_t *page_check_address_pmd(struct page *page,
1536 enum page_check_address_pmd_flag flag, 1536 enum page_check_address_pmd_flag flag,
1537 spinlock_t **ptl) 1537 spinlock_t **ptl)
1538{ 1538{
1539 pgd_t *pgd;
1540 pud_t *pud;
1539 pmd_t *pmd; 1541 pmd_t *pmd;
1540 1542
1541 if (address & ~HPAGE_PMD_MASK) 1543 if (address & ~HPAGE_PMD_MASK)
1542 return NULL; 1544 return NULL;
1543 1545
1544 pmd = mm_find_pmd(mm, address); 1546 pgd = pgd_offset(mm, address);
1545 if (!pmd) 1547 if (!pgd_present(*pgd))
1546 return NULL; 1548 return NULL;
1549 pud = pud_offset(pgd, address);
1550 if (!pud_present(*pud))
1551 return NULL;
1552 pmd = pmd_offset(pud, address);
1553
1547 *ptl = pmd_lock(mm, pmd); 1554 *ptl = pmd_lock(mm, pmd);
1548 if (pmd_none(*pmd)) 1555 if (!pmd_present(*pmd))
1549 goto unlock; 1556 goto unlock;
1550 if (pmd_page(*pmd) != page) 1557 if (pmd_page(*pmd) != page)
1551 goto unlock; 1558 goto unlock;
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index dd30f22b35e0..c82290b9c1fc 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -1172,6 +1172,7 @@ static void return_unused_surplus_pages(struct hstate *h,
1172 while (nr_pages--) { 1172 while (nr_pages--) {
1173 if (!free_pool_huge_page(h, &node_states[N_MEMORY], 1)) 1173 if (!free_pool_huge_page(h, &node_states[N_MEMORY], 1))
1174 break; 1174 break;
1175 cond_resched_lock(&hugetlb_lock);
1175 } 1176 }
1176} 1177}
1177 1178
@@ -1980,11 +1981,7 @@ static int __init hugetlb_init(void)
1980{ 1981{
1981 int i; 1982 int i;
1982 1983
1983 /* Some platform decide whether they support huge pages at boot 1984 if (!hugepages_supported())
1984 * time. On these, such as powerpc, HPAGE_SHIFT is set to 0 when
1985 * there is no such support
1986 */
1987 if (HPAGE_SHIFT == 0)
1988 return 0; 1985 return 0;
1989 1986
1990 if (!size_to_hstate(default_hstate_size)) { 1987 if (!size_to_hstate(default_hstate_size)) {
@@ -2111,6 +2108,9 @@ static int hugetlb_sysctl_handler_common(bool obey_mempolicy,
2111 unsigned long tmp; 2108 unsigned long tmp;
2112 int ret; 2109 int ret;
2113 2110
2111 if (!hugepages_supported())
2112 return -ENOTSUPP;
2113
2114 tmp = h->max_huge_pages; 2114 tmp = h->max_huge_pages;
2115 2115
2116 if (write && h->order >= MAX_ORDER) 2116 if (write && h->order >= MAX_ORDER)
@@ -2164,6 +2164,9 @@ int hugetlb_overcommit_handler(struct ctl_table *table, int write,
2164 unsigned long tmp; 2164 unsigned long tmp;
2165 int ret; 2165 int ret;
2166 2166
2167 if (!hugepages_supported())
2168 return -ENOTSUPP;
2169
2167 tmp = h->nr_overcommit_huge_pages; 2170 tmp = h->nr_overcommit_huge_pages;
2168 2171
2169 if (write && h->order >= MAX_ORDER) 2172 if (write && h->order >= MAX_ORDER)
@@ -2189,6 +2192,8 @@ out:
2189void hugetlb_report_meminfo(struct seq_file *m) 2192void hugetlb_report_meminfo(struct seq_file *m)
2190{ 2193{
2191 struct hstate *h = &default_hstate; 2194 struct hstate *h = &default_hstate;
2195 if (!hugepages_supported())
2196 return;
2192 seq_printf(m, 2197 seq_printf(m,
2193 "HugePages_Total: %5lu\n" 2198 "HugePages_Total: %5lu\n"
2194 "HugePages_Free: %5lu\n" 2199 "HugePages_Free: %5lu\n"
@@ -2205,6 +2210,8 @@ void hugetlb_report_meminfo(struct seq_file *m)
2205int hugetlb_report_node_meminfo(int nid, char *buf) 2210int hugetlb_report_node_meminfo(int nid, char *buf)
2206{ 2211{
2207 struct hstate *h = &default_hstate; 2212 struct hstate *h = &default_hstate;
2213 if (!hugepages_supported())
2214 return 0;
2208 return sprintf(buf, 2215 return sprintf(buf,
2209 "Node %d HugePages_Total: %5u\n" 2216 "Node %d HugePages_Total: %5u\n"
2210 "Node %d HugePages_Free: %5u\n" 2217 "Node %d HugePages_Free: %5u\n"
@@ -2219,6 +2226,9 @@ void hugetlb_show_meminfo(void)
2219 struct hstate *h; 2226 struct hstate *h;
2220 int nid; 2227 int nid;
2221 2228
2229 if (!hugepages_supported())
2230 return;
2231
2222 for_each_node_state(nid, N_MEMORY) 2232 for_each_node_state(nid, N_MEMORY)
2223 for_each_hstate(h) 2233 for_each_hstate(h)
2224 pr_info("Node %d hugepages_total=%u hugepages_free=%u hugepages_surp=%u hugepages_size=%lukB\n", 2234 pr_info("Node %d hugepages_total=%u hugepages_free=%u hugepages_surp=%u hugepages_size=%lukB\n",
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 29501f040568..c47dffdcb246 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -6686,16 +6686,20 @@ static struct page *mc_handle_file_pte(struct vm_area_struct *vma,
6686 pgoff = pte_to_pgoff(ptent); 6686 pgoff = pte_to_pgoff(ptent);
6687 6687
6688 /* page is moved even if it's not RSS of this task(page-faulted). */ 6688 /* page is moved even if it's not RSS of this task(page-faulted). */
6689 page = find_get_page(mapping, pgoff);
6690
6691#ifdef CONFIG_SWAP 6689#ifdef CONFIG_SWAP
6692 /* shmem/tmpfs may report page out on swap: account for that too. */ 6690 /* shmem/tmpfs may report page out on swap: account for that too. */
6693 if (radix_tree_exceptional_entry(page)) { 6691 if (shmem_mapping(mapping)) {
6694 swp_entry_t swap = radix_to_swp_entry(page); 6692 page = find_get_entry(mapping, pgoff);
6695 if (do_swap_account) 6693 if (radix_tree_exceptional_entry(page)) {
6696 *entry = swap; 6694 swp_entry_t swp = radix_to_swp_entry(page);
6697 page = find_get_page(swap_address_space(swap), swap.val); 6695 if (do_swap_account)
6698 } 6696 *entry = swp;
6697 page = find_get_page(swap_address_space(swp), swp.val);
6698 }
6699 } else
6700 page = find_get_page(mapping, pgoff);
6701#else
6702 page = find_get_page(mapping, pgoff);
6699#endif 6703#endif
6700 return page; 6704 return page;
6701} 6705}
diff --git a/mm/memory.c b/mm/memory.c
index d0f0bef3be48..037b812a9531 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -232,17 +232,18 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long
232#endif 232#endif
233} 233}
234 234
235void tlb_flush_mmu(struct mmu_gather *tlb) 235static void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
236{ 236{
237 struct mmu_gather_batch *batch;
238
239 if (!tlb->need_flush)
240 return;
241 tlb->need_flush = 0; 237 tlb->need_flush = 0;
242 tlb_flush(tlb); 238 tlb_flush(tlb);
243#ifdef CONFIG_HAVE_RCU_TABLE_FREE 239#ifdef CONFIG_HAVE_RCU_TABLE_FREE
244 tlb_table_flush(tlb); 240 tlb_table_flush(tlb);
245#endif 241#endif
242}
243
244static void tlb_flush_mmu_free(struct mmu_gather *tlb)
245{
246 struct mmu_gather_batch *batch;
246 247
247 for (batch = &tlb->local; batch; batch = batch->next) { 248 for (batch = &tlb->local; batch; batch = batch->next) {
248 free_pages_and_swap_cache(batch->pages, batch->nr); 249 free_pages_and_swap_cache(batch->pages, batch->nr);
@@ -251,6 +252,14 @@ void tlb_flush_mmu(struct mmu_gather *tlb)
251 tlb->active = &tlb->local; 252 tlb->active = &tlb->local;
252} 253}
253 254
255void tlb_flush_mmu(struct mmu_gather *tlb)
256{
257 if (!tlb->need_flush)
258 return;
259 tlb_flush_mmu_tlbonly(tlb);
260 tlb_flush_mmu_free(tlb);
261}
262
254/* tlb_finish_mmu 263/* tlb_finish_mmu
255 * Called at the end of the shootdown operation to free up any resources 264 * Called at the end of the shootdown operation to free up any resources
256 * that were required. 265 * that were required.
@@ -1127,8 +1136,10 @@ again:
1127 if (PageAnon(page)) 1136 if (PageAnon(page))
1128 rss[MM_ANONPAGES]--; 1137 rss[MM_ANONPAGES]--;
1129 else { 1138 else {
1130 if (pte_dirty(ptent)) 1139 if (pte_dirty(ptent)) {
1140 force_flush = 1;
1131 set_page_dirty(page); 1141 set_page_dirty(page);
1142 }
1132 if (pte_young(ptent) && 1143 if (pte_young(ptent) &&
1133 likely(!(vma->vm_flags & VM_SEQ_READ))) 1144 likely(!(vma->vm_flags & VM_SEQ_READ)))
1134 mark_page_accessed(page); 1145 mark_page_accessed(page);
@@ -1137,9 +1148,10 @@ again:
1137 page_remove_rmap(page); 1148 page_remove_rmap(page);
1138 if (unlikely(page_mapcount(page) < 0)) 1149 if (unlikely(page_mapcount(page) < 0))
1139 print_bad_pte(vma, addr, ptent, page); 1150 print_bad_pte(vma, addr, ptent, page);
1140 force_flush = !__tlb_remove_page(tlb, page); 1151 if (unlikely(!__tlb_remove_page(tlb, page))) {
1141 if (force_flush) 1152 force_flush = 1;
1142 break; 1153 break;
1154 }
1143 continue; 1155 continue;
1144 } 1156 }
1145 /* 1157 /*
@@ -1174,18 +1186,11 @@ again:
1174 1186
1175 add_mm_rss_vec(mm, rss); 1187 add_mm_rss_vec(mm, rss);
1176 arch_leave_lazy_mmu_mode(); 1188 arch_leave_lazy_mmu_mode();
1177 pte_unmap_unlock(start_pte, ptl);
1178 1189
1179 /* 1190 /* Do the actual TLB flush before dropping ptl */
1180 * mmu_gather ran out of room to batch pages, we break out of
1181 * the PTE lock to avoid doing the potential expensive TLB invalidate
1182 * and page-free while holding it.
1183 */
1184 if (force_flush) { 1191 if (force_flush) {
1185 unsigned long old_end; 1192 unsigned long old_end;
1186 1193
1187 force_flush = 0;
1188
1189 /* 1194 /*
1190 * Flush the TLB just for the previous segment, 1195 * Flush the TLB just for the previous segment,
1191 * then update the range to be the remaining 1196 * then update the range to be the remaining
@@ -1193,11 +1198,21 @@ again:
1193 */ 1198 */
1194 old_end = tlb->end; 1199 old_end = tlb->end;
1195 tlb->end = addr; 1200 tlb->end = addr;
1196 1201 tlb_flush_mmu_tlbonly(tlb);
1197 tlb_flush_mmu(tlb);
1198
1199 tlb->start = addr; 1202 tlb->start = addr;
1200 tlb->end = old_end; 1203 tlb->end = old_end;
1204 }
1205 pte_unmap_unlock(start_pte, ptl);
1206
1207 /*
1208 * If we forced a TLB flush (either due to running out of
1209 * batch buffers or because we needed to flush dirty TLB
1210 * entries before releasing the ptl), free the batched
1211 * memory too. Restart if we didn't do everything.
1212 */
1213 if (force_flush) {
1214 force_flush = 0;
1215 tlb_flush_mmu_free(tlb);
1201 1216
1202 if (addr != end) 1217 if (addr != end)
1203 goto again; 1218 goto again;
@@ -1955,12 +1970,17 @@ int fixup_user_fault(struct task_struct *tsk, struct mm_struct *mm,
1955 unsigned long address, unsigned int fault_flags) 1970 unsigned long address, unsigned int fault_flags)
1956{ 1971{
1957 struct vm_area_struct *vma; 1972 struct vm_area_struct *vma;
1973 vm_flags_t vm_flags;
1958 int ret; 1974 int ret;
1959 1975
1960 vma = find_extend_vma(mm, address); 1976 vma = find_extend_vma(mm, address);
1961 if (!vma || address < vma->vm_start) 1977 if (!vma || address < vma->vm_start)
1962 return -EFAULT; 1978 return -EFAULT;
1963 1979
1980 vm_flags = (fault_flags & FAULT_FLAG_WRITE) ? VM_WRITE : VM_READ;
1981 if (!(vm_flags & vma->vm_flags))
1982 return -EFAULT;
1983
1964 ret = handle_mm_fault(mm, vma, address, fault_flags); 1984 ret = handle_mm_fault(mm, vma, address, fault_flags);
1965 if (ret & VM_FAULT_ERROR) { 1985 if (ret & VM_FAULT_ERROR) {
1966 if (ret & VM_FAULT_OOM) 1986 if (ret & VM_FAULT_OOM)
diff --git a/mm/page-writeback.c b/mm/page-writeback.c
index ef413492a149..a4317da60532 100644
--- a/mm/page-writeback.c
+++ b/mm/page-writeback.c
@@ -593,14 +593,14 @@ unsigned long bdi_dirty_limit(struct backing_dev_info *bdi, unsigned long dirty)
593 * (5) the closer to setpoint, the smaller |df/dx| (and the reverse) 593 * (5) the closer to setpoint, the smaller |df/dx| (and the reverse)
594 * => fast response on large errors; small oscillation near setpoint 594 * => fast response on large errors; small oscillation near setpoint
595 */ 595 */
596static inline long long pos_ratio_polynom(unsigned long setpoint, 596static long long pos_ratio_polynom(unsigned long setpoint,
597 unsigned long dirty, 597 unsigned long dirty,
598 unsigned long limit) 598 unsigned long limit)
599{ 599{
600 long long pos_ratio; 600 long long pos_ratio;
601 long x; 601 long x;
602 602
603 x = div_s64(((s64)setpoint - (s64)dirty) << RATELIMIT_CALC_SHIFT, 603 x = div64_s64(((s64)setpoint - (s64)dirty) << RATELIMIT_CALC_SHIFT,
604 limit - setpoint + 1); 604 limit - setpoint + 1);
605 pos_ratio = x; 605 pos_ratio = x;
606 pos_ratio = pos_ratio * x >> RATELIMIT_CALC_SHIFT; 606 pos_ratio = pos_ratio * x >> RATELIMIT_CALC_SHIFT;
@@ -842,7 +842,7 @@ static unsigned long bdi_position_ratio(struct backing_dev_info *bdi,
842 x_intercept = bdi_setpoint + span; 842 x_intercept = bdi_setpoint + span;
843 843
844 if (bdi_dirty < x_intercept - span / 4) { 844 if (bdi_dirty < x_intercept - span / 4) {
845 pos_ratio = div_u64(pos_ratio * (x_intercept - bdi_dirty), 845 pos_ratio = div64_u64(pos_ratio * (x_intercept - bdi_dirty),
846 x_intercept - bdi_setpoint + 1); 846 x_intercept - bdi_setpoint + 1);
847 } else 847 } else
848 pos_ratio /= 4; 848 pos_ratio /= 4;
diff --git a/mm/slab.c b/mm/slab.c
index 388cb1ae6fbc..19d92181ce24 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -166,7 +166,7 @@ typedef unsigned char freelist_idx_t;
166typedef unsigned short freelist_idx_t; 166typedef unsigned short freelist_idx_t;
167#endif 167#endif
168 168
169#define SLAB_OBJ_MAX_NUM (1 << sizeof(freelist_idx_t) * BITS_PER_BYTE) 169#define SLAB_OBJ_MAX_NUM ((1 << sizeof(freelist_idx_t) * BITS_PER_BYTE) - 1)
170 170
171/* 171/*
172 * true if a page was allocated from pfmemalloc reserves for network-based 172 * true if a page was allocated from pfmemalloc reserves for network-based
@@ -2572,13 +2572,13 @@ static void *alloc_slabmgmt(struct kmem_cache *cachep,
2572 return freelist; 2572 return freelist;
2573} 2573}
2574 2574
2575static inline freelist_idx_t get_free_obj(struct page *page, unsigned char idx) 2575static inline freelist_idx_t get_free_obj(struct page *page, unsigned int idx)
2576{ 2576{
2577 return ((freelist_idx_t *)page->freelist)[idx]; 2577 return ((freelist_idx_t *)page->freelist)[idx];
2578} 2578}
2579 2579
2580static inline void set_free_obj(struct page *page, 2580static inline void set_free_obj(struct page *page,
2581 unsigned char idx, freelist_idx_t val) 2581 unsigned int idx, freelist_idx_t val)
2582{ 2582{
2583 ((freelist_idx_t *)(page->freelist))[idx] = val; 2583 ((freelist_idx_t *)(page->freelist))[idx] = val;
2584} 2584}
diff --git a/mm/slab.h b/mm/slab.h
index 3045316b7c9d..6bd4c353704f 100644
--- a/mm/slab.h
+++ b/mm/slab.h
@@ -91,6 +91,7 @@ __kmem_cache_alias(const char *name, size_t size, size_t align,
91#define CACHE_CREATE_MASK (SLAB_CORE_FLAGS | SLAB_DEBUG_FLAGS | SLAB_CACHE_FLAGS) 91#define CACHE_CREATE_MASK (SLAB_CORE_FLAGS | SLAB_DEBUG_FLAGS | SLAB_CACHE_FLAGS)
92 92
93int __kmem_cache_shutdown(struct kmem_cache *); 93int __kmem_cache_shutdown(struct kmem_cache *);
94void slab_kmem_cache_release(struct kmem_cache *);
94 95
95struct seq_file; 96struct seq_file;
96struct file; 97struct file;
diff --git a/mm/slab_common.c b/mm/slab_common.c
index f3cfccf76dda..102cc6fca3d3 100644
--- a/mm/slab_common.c
+++ b/mm/slab_common.c
@@ -323,6 +323,12 @@ static int kmem_cache_destroy_memcg_children(struct kmem_cache *s)
323} 323}
324#endif /* CONFIG_MEMCG_KMEM */ 324#endif /* CONFIG_MEMCG_KMEM */
325 325
326void slab_kmem_cache_release(struct kmem_cache *s)
327{
328 kfree(s->name);
329 kmem_cache_free(kmem_cache, s);
330}
331
326void kmem_cache_destroy(struct kmem_cache *s) 332void kmem_cache_destroy(struct kmem_cache *s)
327{ 333{
328 get_online_cpus(); 334 get_online_cpus();
@@ -352,8 +358,11 @@ void kmem_cache_destroy(struct kmem_cache *s)
352 rcu_barrier(); 358 rcu_barrier();
353 359
354 memcg_free_cache_params(s); 360 memcg_free_cache_params(s);
355 kfree(s->name); 361#ifdef SLAB_SUPPORTS_SYSFS
356 kmem_cache_free(kmem_cache, s); 362 sysfs_slab_remove(s);
363#else
364 slab_kmem_cache_release(s);
365#endif
357 goto out_put_cpus; 366 goto out_put_cpus;
358 367
359out_unlock: 368out_unlock:
diff --git a/mm/slub.c b/mm/slub.c
index 5e234f1f8853..2b1ce697fc4b 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -210,14 +210,11 @@ enum track_item { TRACK_ALLOC, TRACK_FREE };
210#ifdef CONFIG_SYSFS 210#ifdef CONFIG_SYSFS
211static int sysfs_slab_add(struct kmem_cache *); 211static int sysfs_slab_add(struct kmem_cache *);
212static int sysfs_slab_alias(struct kmem_cache *, const char *); 212static int sysfs_slab_alias(struct kmem_cache *, const char *);
213static void sysfs_slab_remove(struct kmem_cache *);
214static void memcg_propagate_slab_attrs(struct kmem_cache *s); 213static void memcg_propagate_slab_attrs(struct kmem_cache *s);
215#else 214#else
216static inline int sysfs_slab_add(struct kmem_cache *s) { return 0; } 215static inline int sysfs_slab_add(struct kmem_cache *s) { return 0; }
217static inline int sysfs_slab_alias(struct kmem_cache *s, const char *p) 216static inline int sysfs_slab_alias(struct kmem_cache *s, const char *p)
218 { return 0; } 217 { return 0; }
219static inline void sysfs_slab_remove(struct kmem_cache *s) { }
220
221static inline void memcg_propagate_slab_attrs(struct kmem_cache *s) { } 218static inline void memcg_propagate_slab_attrs(struct kmem_cache *s) { }
222#endif 219#endif
223 220
@@ -3238,24 +3235,7 @@ static inline int kmem_cache_close(struct kmem_cache *s)
3238 3235
3239int __kmem_cache_shutdown(struct kmem_cache *s) 3236int __kmem_cache_shutdown(struct kmem_cache *s)
3240{ 3237{
3241 int rc = kmem_cache_close(s); 3238 return kmem_cache_close(s);
3242
3243 if (!rc) {
3244 /*
3245 * Since slab_attr_store may take the slab_mutex, we should
3246 * release the lock while removing the sysfs entry in order to
3247 * avoid a deadlock. Because this is pretty much the last
3248 * operation we do and the lock will be released shortly after
3249 * that in slab_common.c, we could just move sysfs_slab_remove
3250 * to a later point in common code. We should do that when we
3251 * have a common sysfs framework for all allocators.
3252 */
3253 mutex_unlock(&slab_mutex);
3254 sysfs_slab_remove(s);
3255 mutex_lock(&slab_mutex);
3256 }
3257
3258 return rc;
3259} 3239}
3260 3240
3261/******************************************************************** 3241/********************************************************************
@@ -5071,15 +5051,18 @@ static void memcg_propagate_slab_attrs(struct kmem_cache *s)
5071#ifdef CONFIG_MEMCG_KMEM 5051#ifdef CONFIG_MEMCG_KMEM
5072 int i; 5052 int i;
5073 char *buffer = NULL; 5053 char *buffer = NULL;
5054 struct kmem_cache *root_cache;
5074 5055
5075 if (!is_root_cache(s)) 5056 if (is_root_cache(s))
5076 return; 5057 return;
5077 5058
5059 root_cache = s->memcg_params->root_cache;
5060
5078 /* 5061 /*
5079 * This mean this cache had no attribute written. Therefore, no point 5062 * This mean this cache had no attribute written. Therefore, no point
5080 * in copying default values around 5063 * in copying default values around
5081 */ 5064 */
5082 if (!s->max_attr_size) 5065 if (!root_cache->max_attr_size)
5083 return; 5066 return;
5084 5067
5085 for (i = 0; i < ARRAY_SIZE(slab_attrs); i++) { 5068 for (i = 0; i < ARRAY_SIZE(slab_attrs); i++) {
@@ -5101,7 +5084,7 @@ static void memcg_propagate_slab_attrs(struct kmem_cache *s)
5101 */ 5084 */
5102 if (buffer) 5085 if (buffer)
5103 buf = buffer; 5086 buf = buffer;
5104 else if (s->max_attr_size < ARRAY_SIZE(mbuf)) 5087 else if (root_cache->max_attr_size < ARRAY_SIZE(mbuf))
5105 buf = mbuf; 5088 buf = mbuf;
5106 else { 5089 else {
5107 buffer = (char *) get_zeroed_page(GFP_KERNEL); 5090 buffer = (char *) get_zeroed_page(GFP_KERNEL);
@@ -5110,7 +5093,7 @@ static void memcg_propagate_slab_attrs(struct kmem_cache *s)
5110 buf = buffer; 5093 buf = buffer;
5111 } 5094 }
5112 5095
5113 attr->show(s->memcg_params->root_cache, buf); 5096 attr->show(root_cache, buf);
5114 attr->store(s, buf, strlen(buf)); 5097 attr->store(s, buf, strlen(buf));
5115 } 5098 }
5116 5099
@@ -5119,6 +5102,11 @@ static void memcg_propagate_slab_attrs(struct kmem_cache *s)
5119#endif 5102#endif
5120} 5103}
5121 5104
5105static void kmem_cache_release(struct kobject *k)
5106{
5107 slab_kmem_cache_release(to_slab(k));
5108}
5109
5122static const struct sysfs_ops slab_sysfs_ops = { 5110static const struct sysfs_ops slab_sysfs_ops = {
5123 .show = slab_attr_show, 5111 .show = slab_attr_show,
5124 .store = slab_attr_store, 5112 .store = slab_attr_store,
@@ -5126,6 +5114,7 @@ static const struct sysfs_ops slab_sysfs_ops = {
5126 5114
5127static struct kobj_type slab_ktype = { 5115static struct kobj_type slab_ktype = {
5128 .sysfs_ops = &slab_sysfs_ops, 5116 .sysfs_ops = &slab_sysfs_ops,
5117 .release = kmem_cache_release,
5129}; 5118};
5130 5119
5131static int uevent_filter(struct kset *kset, struct kobject *kobj) 5120static int uevent_filter(struct kset *kset, struct kobject *kobj)
@@ -5252,7 +5241,7 @@ out_put_kobj:
5252 goto out; 5241 goto out;
5253} 5242}
5254 5243
5255static void sysfs_slab_remove(struct kmem_cache *s) 5244void sysfs_slab_remove(struct kmem_cache *s)
5256{ 5245{
5257 if (slab_state < FULL) 5246 if (slab_state < FULL)
5258 /* 5247 /*
diff --git a/mm/truncate.c b/mm/truncate.c
index e5cc39ab0751..6a78c814bebf 100644
--- a/mm/truncate.c
+++ b/mm/truncate.c
@@ -484,14 +484,6 @@ unsigned long invalidate_mapping_pages(struct address_space *mapping,
484 unsigned long count = 0; 484 unsigned long count = 0;
485 int i; 485 int i;
486 486
487 /*
488 * Note: this function may get called on a shmem/tmpfs mapping:
489 * pagevec_lookup() might then return 0 prematurely (because it
490 * got a gangful of swap entries); but it's hardly worth worrying
491 * about - it can rarely have anything to free from such a mapping
492 * (most pages are dirty), and already skips over any difficulties.
493 */
494
495 pagevec_init(&pvec, 0); 487 pagevec_init(&pvec, 0);
496 while (index <= end && pagevec_lookup_entries(&pvec, mapping, index, 488 while (index <= end && pagevec_lookup_entries(&pvec, mapping, index,
497 min(end - index, (pgoff_t)PAGEVEC_SIZE - 1) + 1, 489 min(end - index, (pgoff_t)PAGEVEC_SIZE - 1) + 1,
diff --git a/mm/util.c b/mm/util.c
index f380af7ea779..d5ea733c5082 100644
--- a/mm/util.c
+++ b/mm/util.c
@@ -10,6 +10,7 @@
10#include <linux/swapops.h> 10#include <linux/swapops.h>
11#include <linux/mman.h> 11#include <linux/mman.h>
12#include <linux/hugetlb.h> 12#include <linux/hugetlb.h>
13#include <linux/vmalloc.h>
13 14
14#include <asm/uaccess.h> 15#include <asm/uaccess.h>
15 16
@@ -387,6 +388,15 @@ unsigned long vm_mmap(struct file *file, unsigned long addr,
387} 388}
388EXPORT_SYMBOL(vm_mmap); 389EXPORT_SYMBOL(vm_mmap);
389 390
391void kvfree(const void *addr)
392{
393 if (is_vmalloc_addr(addr))
394 vfree(addr);
395 else
396 kfree(addr);
397}
398EXPORT_SYMBOL(kvfree);
399
390struct address_space *page_mapping(struct page *page) 400struct address_space *page_mapping(struct page *page)
391{ 401{
392 struct address_space *mapping = page->mapping; 402 struct address_space *mapping = page->mapping;
diff --git a/mm/vmacache.c b/mm/vmacache.c
index d4224b397c0e..1037a3bab505 100644
--- a/mm/vmacache.c
+++ b/mm/vmacache.c
@@ -81,10 +81,12 @@ struct vm_area_struct *vmacache_find(struct mm_struct *mm, unsigned long addr)
81 for (i = 0; i < VMACACHE_SIZE; i++) { 81 for (i = 0; i < VMACACHE_SIZE; i++) {
82 struct vm_area_struct *vma = current->vmacache[i]; 82 struct vm_area_struct *vma = current->vmacache[i];
83 83
84 if (vma && vma->vm_start <= addr && vma->vm_end > addr) { 84 if (!vma)
85 BUG_ON(vma->vm_mm != mm); 85 continue;
86 if (WARN_ON_ONCE(vma->vm_mm != mm))
87 break;
88 if (vma->vm_start <= addr && vma->vm_end > addr)
86 return vma; 89 return vma;
87 }
88 } 90 }
89 91
90 return NULL; 92 return NULL;
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 9b6497eda806..32c661d66a45 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -1158,7 +1158,7 @@ unsigned long reclaim_clean_pages_from_list(struct zone *zone,
1158 TTU_UNMAP|TTU_IGNORE_ACCESS, 1158 TTU_UNMAP|TTU_IGNORE_ACCESS,
1159 &dummy1, &dummy2, &dummy3, &dummy4, &dummy5, true); 1159 &dummy1, &dummy2, &dummy3, &dummy4, &dummy5, true);
1160 list_splice(&clean_pages, page_list); 1160 list_splice(&clean_pages, page_list);
1161 __mod_zone_page_state(zone, NR_ISOLATED_FILE, -ret); 1161 mod_zone_page_state(zone, NR_ISOLATED_FILE, -ret);
1162 return ret; 1162 return ret;
1163} 1163}
1164 1164
@@ -1916,6 +1916,24 @@ static void get_scan_count(struct lruvec *lruvec, struct scan_control *sc,
1916 get_lru_size(lruvec, LRU_INACTIVE_FILE); 1916 get_lru_size(lruvec, LRU_INACTIVE_FILE);
1917 1917
1918 /* 1918 /*
1919 * Prevent the reclaimer from falling into the cache trap: as
1920 * cache pages start out inactive, every cache fault will tip
1921 * the scan balance towards the file LRU. And as the file LRU
1922 * shrinks, so does the window for rotation from references.
1923 * This means we have a runaway feedback loop where a tiny
1924 * thrashing file LRU becomes infinitely more attractive than
1925 * anon pages. Try to detect this based on file LRU size.
1926 */
1927 if (global_reclaim(sc)) {
1928 unsigned long free = zone_page_state(zone, NR_FREE_PAGES);
1929
1930 if (unlikely(file + free <= high_wmark_pages(zone))) {
1931 scan_balance = SCAN_ANON;
1932 goto out;
1933 }
1934 }
1935
1936 /*
1919 * There is enough inactive page cache, do not reclaim 1937 * There is enough inactive page cache, do not reclaim
1920 * anything from the anonymous working set right now. 1938 * anything from the anonymous working set right now.
1921 */ 1939 */
diff --git a/net/8021q/vlan_dev.c b/net/8021q/vlan_dev.c
index 6f142f03716d..733ec283ed1b 100644
--- a/net/8021q/vlan_dev.c
+++ b/net/8021q/vlan_dev.c
@@ -493,10 +493,48 @@ static void vlan_dev_change_rx_flags(struct net_device *dev, int change)
493 } 493 }
494} 494}
495 495
496static int vlan_calculate_locking_subclass(struct net_device *real_dev)
497{
498 int subclass = 0;
499
500 while (is_vlan_dev(real_dev)) {
501 subclass++;
502 real_dev = vlan_dev_priv(real_dev)->real_dev;
503 }
504
505 return subclass;
506}
507
508static void vlan_dev_mc_sync(struct net_device *to, struct net_device *from)
509{
510 int err = 0, subclass;
511
512 subclass = vlan_calculate_locking_subclass(to);
513
514 spin_lock_nested(&to->addr_list_lock, subclass);
515 err = __hw_addr_sync(&to->mc, &from->mc, to->addr_len);
516 if (!err)
517 __dev_set_rx_mode(to);
518 spin_unlock(&to->addr_list_lock);
519}
520
521static void vlan_dev_uc_sync(struct net_device *to, struct net_device *from)
522{
523 int err = 0, subclass;
524
525 subclass = vlan_calculate_locking_subclass(to);
526
527 spin_lock_nested(&to->addr_list_lock, subclass);
528 err = __hw_addr_sync(&to->uc, &from->uc, to->addr_len);
529 if (!err)
530 __dev_set_rx_mode(to);
531 spin_unlock(&to->addr_list_lock);
532}
533
496static void vlan_dev_set_rx_mode(struct net_device *vlan_dev) 534static void vlan_dev_set_rx_mode(struct net_device *vlan_dev)
497{ 535{
498 dev_mc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev); 536 vlan_dev_mc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
499 dev_uc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev); 537 vlan_dev_uc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
500} 538}
501 539
502/* 540/*
@@ -608,9 +646,7 @@ static int vlan_dev_init(struct net_device *dev)
608 646
609 SET_NETDEV_DEVTYPE(dev, &vlan_type); 647 SET_NETDEV_DEVTYPE(dev, &vlan_type);
610 648
611 if (is_vlan_dev(real_dev)) 649 subclass = vlan_calculate_locking_subclass(dev);
612 subclass = 1;
613
614 vlan_dev_set_lockdep_class(dev, subclass); 650 vlan_dev_set_lockdep_class(dev, subclass);
615 651
616 vlan_dev_priv(dev)->vlan_pcpu_stats = netdev_alloc_pcpu_stats(struct vlan_pcpu_stats); 652 vlan_dev_priv(dev)->vlan_pcpu_stats = netdev_alloc_pcpu_stats(struct vlan_pcpu_stats);
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index d958e2dca52f..521fd4f3985e 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -819,14 +819,17 @@ static int hci_conn_auth(struct hci_conn *conn, __u8 sec_level, __u8 auth_type)
819 if (!test_and_set_bit(HCI_CONN_AUTH_PEND, &conn->flags)) { 819 if (!test_and_set_bit(HCI_CONN_AUTH_PEND, &conn->flags)) {
820 struct hci_cp_auth_requested cp; 820 struct hci_cp_auth_requested cp;
821 821
822 /* encrypt must be pending if auth is also pending */
823 set_bit(HCI_CONN_ENCRYPT_PEND, &conn->flags);
824
825 cp.handle = cpu_to_le16(conn->handle); 822 cp.handle = cpu_to_le16(conn->handle);
826 hci_send_cmd(conn->hdev, HCI_OP_AUTH_REQUESTED, 823 hci_send_cmd(conn->hdev, HCI_OP_AUTH_REQUESTED,
827 sizeof(cp), &cp); 824 sizeof(cp), &cp);
825
826 /* If we're already encrypted set the REAUTH_PEND flag,
827 * otherwise set the ENCRYPT_PEND.
828 */
828 if (conn->key_type != 0xff) 829 if (conn->key_type != 0xff)
829 set_bit(HCI_CONN_REAUTH_PEND, &conn->flags); 830 set_bit(HCI_CONN_REAUTH_PEND, &conn->flags);
831 else
832 set_bit(HCI_CONN_ENCRYPT_PEND, &conn->flags);
830 } 833 }
831 834
832 return 0; 835 return 0;
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index 49774912cb01..15010a230b6d 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -3330,6 +3330,12 @@ static void hci_key_refresh_complete_evt(struct hci_dev *hdev,
3330 if (!conn) 3330 if (!conn)
3331 goto unlock; 3331 goto unlock;
3332 3332
3333 /* For BR/EDR the necessary steps are taken through the
3334 * auth_complete event.
3335 */
3336 if (conn->type != LE_LINK)
3337 goto unlock;
3338
3333 if (!ev->status) 3339 if (!ev->status)
3334 conn->sec_level = conn->pending_sec_level; 3340 conn->sec_level = conn->pending_sec_level;
3335 3341
diff --git a/net/bridge/br_netlink.c b/net/bridge/br_netlink.c
index e74b6d530cb6..e8844d975b32 100644
--- a/net/bridge/br_netlink.c
+++ b/net/bridge/br_netlink.c
@@ -445,6 +445,20 @@ static int br_validate(struct nlattr *tb[], struct nlattr *data[])
445 return 0; 445 return 0;
446} 446}
447 447
448static int br_dev_newlink(struct net *src_net, struct net_device *dev,
449 struct nlattr *tb[], struct nlattr *data[])
450{
451 struct net_bridge *br = netdev_priv(dev);
452
453 if (tb[IFLA_ADDRESS]) {
454 spin_lock_bh(&br->lock);
455 br_stp_change_bridge_id(br, nla_data(tb[IFLA_ADDRESS]));
456 spin_unlock_bh(&br->lock);
457 }
458
459 return register_netdevice(dev);
460}
461
448static size_t br_get_link_af_size(const struct net_device *dev) 462static size_t br_get_link_af_size(const struct net_device *dev)
449{ 463{
450 struct net_port_vlans *pv; 464 struct net_port_vlans *pv;
@@ -473,6 +487,7 @@ struct rtnl_link_ops br_link_ops __read_mostly = {
473 .priv_size = sizeof(struct net_bridge), 487 .priv_size = sizeof(struct net_bridge),
474 .setup = br_dev_setup, 488 .setup = br_dev_setup,
475 .validate = br_validate, 489 .validate = br_validate,
490 .newlink = br_dev_newlink,
476 .dellink = br_dev_delete, 491 .dellink = br_dev_delete,
477}; 492};
478 493
diff --git a/net/can/gw.c b/net/can/gw.c
index ac31891967da..050a2110d43f 100644
--- a/net/can/gw.c
+++ b/net/can/gw.c
@@ -804,7 +804,7 @@ static int cgw_create_job(struct sk_buff *skb, struct nlmsghdr *nlh)
804 u8 limhops = 0; 804 u8 limhops = 0;
805 int err = 0; 805 int err = 0;
806 806
807 if (!capable(CAP_NET_ADMIN)) 807 if (!netlink_capable(skb, CAP_NET_ADMIN))
808 return -EPERM; 808 return -EPERM;
809 809
810 if (nlmsg_len(nlh) < sizeof(*r)) 810 if (nlmsg_len(nlh) < sizeof(*r))
@@ -893,7 +893,7 @@ static int cgw_remove_job(struct sk_buff *skb, struct nlmsghdr *nlh)
893 u8 limhops = 0; 893 u8 limhops = 0;
894 int err = 0; 894 int err = 0;
895 895
896 if (!capable(CAP_NET_ADMIN)) 896 if (!netlink_capable(skb, CAP_NET_ADMIN))
897 return -EPERM; 897 return -EPERM;
898 898
899 if (nlmsg_len(nlh) < sizeof(*r)) 899 if (nlmsg_len(nlh) < sizeof(*r))
diff --git a/net/ceph/osdmap.c b/net/ceph/osdmap.c
index e632b5a52f5b..8b8a5a24b223 100644
--- a/net/ceph/osdmap.c
+++ b/net/ceph/osdmap.c
@@ -1548,8 +1548,10 @@ static void apply_primary_affinity(struct ceph_osdmap *osdmap, u32 pps,
1548 return; 1548 return;
1549 1549
1550 for (i = 0; i < len; i++) { 1550 for (i = 0; i < len; i++) {
1551 if (osds[i] != CRUSH_ITEM_NONE && 1551 int osd = osds[i];
1552 osdmap->osd_primary_affinity[i] != 1552
1553 if (osd != CRUSH_ITEM_NONE &&
1554 osdmap->osd_primary_affinity[osd] !=
1553 CEPH_OSD_DEFAULT_PRIMARY_AFFINITY) { 1555 CEPH_OSD_DEFAULT_PRIMARY_AFFINITY) {
1554 break; 1556 break;
1555 } 1557 }
@@ -1563,10 +1565,9 @@ static void apply_primary_affinity(struct ceph_osdmap *osdmap, u32 pps,
1563 * osd's pgs get rejected as primary. 1565 * osd's pgs get rejected as primary.
1564 */ 1566 */
1565 for (i = 0; i < len; i++) { 1567 for (i = 0; i < len; i++) {
1566 int osd; 1568 int osd = osds[i];
1567 u32 aff; 1569 u32 aff;
1568 1570
1569 osd = osds[i];
1570 if (osd == CRUSH_ITEM_NONE) 1571 if (osd == CRUSH_ITEM_NONE)
1571 continue; 1572 continue;
1572 1573
diff --git a/net/core/dev.c b/net/core/dev.c
index 14dac0654f28..d2c8a06b3a98 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -2284,7 +2284,7 @@ EXPORT_SYMBOL(skb_checksum_help);
2284__be16 skb_network_protocol(struct sk_buff *skb, int *depth) 2284__be16 skb_network_protocol(struct sk_buff *skb, int *depth)
2285{ 2285{
2286 __be16 type = skb->protocol; 2286 __be16 type = skb->protocol;
2287 int vlan_depth = ETH_HLEN; 2287 int vlan_depth = skb->mac_len;
2288 2288
2289 /* Tunnel gso handlers can set protocol to ethernet. */ 2289 /* Tunnel gso handlers can set protocol to ethernet. */
2290 if (type == htons(ETH_P_TEB)) { 2290 if (type == htons(ETH_P_TEB)) {
@@ -5238,6 +5238,7 @@ void __dev_set_rx_mode(struct net_device *dev)
5238 if (ops->ndo_set_rx_mode) 5238 if (ops->ndo_set_rx_mode)
5239 ops->ndo_set_rx_mode(dev); 5239 ops->ndo_set_rx_mode(dev);
5240} 5240}
5241EXPORT_SYMBOL(__dev_set_rx_mode);
5241 5242
5242void dev_set_rx_mode(struct net_device *dev) 5243void dev_set_rx_mode(struct net_device *dev)
5243{ 5244{
diff --git a/net/core/dst.c b/net/core/dst.c
index ca4231ec7347..80d6286c8b62 100644
--- a/net/core/dst.c
+++ b/net/core/dst.c
@@ -142,12 +142,12 @@ loop:
142 mutex_unlock(&dst_gc_mutex); 142 mutex_unlock(&dst_gc_mutex);
143} 143}
144 144
145int dst_discard(struct sk_buff *skb) 145int dst_discard_sk(struct sock *sk, struct sk_buff *skb)
146{ 146{
147 kfree_skb(skb); 147 kfree_skb(skb);
148 return 0; 148 return 0;
149} 149}
150EXPORT_SYMBOL(dst_discard); 150EXPORT_SYMBOL(dst_discard_sk);
151 151
152const u32 dst_default_metrics[RTAX_MAX + 1] = { 152const u32 dst_default_metrics[RTAX_MAX + 1] = {
153 /* This initializer is needed to force linker to place this variable 153 /* This initializer is needed to force linker to place this variable
@@ -184,7 +184,7 @@ void *dst_alloc(struct dst_ops *ops, struct net_device *dev,
184 dst->xfrm = NULL; 184 dst->xfrm = NULL;
185#endif 185#endif
186 dst->input = dst_discard; 186 dst->input = dst_discard;
187 dst->output = dst_discard; 187 dst->output = dst_discard_sk;
188 dst->error = 0; 188 dst->error = 0;
189 dst->obsolete = initial_obsolete; 189 dst->obsolete = initial_obsolete;
190 dst->header_len = 0; 190 dst->header_len = 0;
@@ -209,8 +209,10 @@ static void ___dst_free(struct dst_entry *dst)
209 /* The first case (dev==NULL) is required, when 209 /* The first case (dev==NULL) is required, when
210 protocol module is unloaded. 210 protocol module is unloaded.
211 */ 211 */
212 if (dst->dev == NULL || !(dst->dev->flags&IFF_UP)) 212 if (dst->dev == NULL || !(dst->dev->flags&IFF_UP)) {
213 dst->input = dst->output = dst_discard; 213 dst->input = dst_discard;
214 dst->output = dst_discard_sk;
215 }
214 dst->obsolete = DST_OBSOLETE_DEAD; 216 dst->obsolete = DST_OBSOLETE_DEAD;
215} 217}
216 218
@@ -361,7 +363,8 @@ static void dst_ifdown(struct dst_entry *dst, struct net_device *dev,
361 return; 363 return;
362 364
363 if (!unregister) { 365 if (!unregister) {
364 dst->input = dst->output = dst_discard; 366 dst->input = dst_discard;
367 dst->output = dst_discard_sk;
365 } else { 368 } else {
366 dst->dev = dev_net(dst->dev)->loopback_dev; 369 dst->dev = dev_net(dst->dev)->loopback_dev;
367 dev_hold(dst->dev); 370 dev_hold(dst->dev);
diff --git a/net/core/filter.c b/net/core/filter.c
index e08b3822c72a..9d79ca0a6e8e 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -122,6 +122,13 @@ noinline u64 __bpf_call_base(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5)
122 return 0; 122 return 0;
123} 123}
124 124
125/* Register mappings for user programs. */
126#define A_REG 0
127#define X_REG 7
128#define TMP_REG 8
129#define ARG2_REG 2
130#define ARG3_REG 3
131
125/** 132/**
126 * __sk_run_filter - run a filter on a given context 133 * __sk_run_filter - run a filter on a given context
127 * @ctx: buffer to run the filter on 134 * @ctx: buffer to run the filter on
@@ -242,6 +249,8 @@ unsigned int __sk_run_filter(void *ctx, const struct sock_filter_int *insn)
242 249
243 regs[FP_REG] = (u64) (unsigned long) &stack[ARRAY_SIZE(stack)]; 250 regs[FP_REG] = (u64) (unsigned long) &stack[ARRAY_SIZE(stack)];
244 regs[ARG1_REG] = (u64) (unsigned long) ctx; 251 regs[ARG1_REG] = (u64) (unsigned long) ctx;
252 regs[A_REG] = 0;
253 regs[X_REG] = 0;
245 254
246select_insn: 255select_insn:
247 goto *jumptable[insn->code]; 256 goto *jumptable[insn->code];
@@ -600,6 +609,9 @@ static u64 __skb_get_nlattr(u64 ctx, u64 A, u64 X, u64 r4, u64 r5)
600 if (skb_is_nonlinear(skb)) 609 if (skb_is_nonlinear(skb))
601 return 0; 610 return 0;
602 611
612 if (skb->len < sizeof(struct nlattr))
613 return 0;
614
603 if (A > skb->len - sizeof(struct nlattr)) 615 if (A > skb->len - sizeof(struct nlattr))
604 return 0; 616 return 0;
605 617
@@ -618,11 +630,14 @@ static u64 __skb_get_nlattr_nest(u64 ctx, u64 A, u64 X, u64 r4, u64 r5)
618 if (skb_is_nonlinear(skb)) 630 if (skb_is_nonlinear(skb))
619 return 0; 631 return 0;
620 632
633 if (skb->len < sizeof(struct nlattr))
634 return 0;
635
621 if (A > skb->len - sizeof(struct nlattr)) 636 if (A > skb->len - sizeof(struct nlattr))
622 return 0; 637 return 0;
623 638
624 nla = (struct nlattr *) &skb->data[A]; 639 nla = (struct nlattr *) &skb->data[A];
625 if (nla->nla_len > A - skb->len) 640 if (nla->nla_len > skb->len - A)
626 return 0; 641 return 0;
627 642
628 nla = nla_find_nested(nla, X); 643 nla = nla_find_nested(nla, X);
@@ -637,13 +652,6 @@ static u64 __get_raw_cpu_id(u64 ctx, u64 A, u64 X, u64 r4, u64 r5)
637 return raw_smp_processor_id(); 652 return raw_smp_processor_id();
638} 653}
639 654
640/* Register mappings for user programs. */
641#define A_REG 0
642#define X_REG 7
643#define TMP_REG 8
644#define ARG2_REG 2
645#define ARG3_REG 3
646
647static bool convert_bpf_extensions(struct sock_filter *fp, 655static bool convert_bpf_extensions(struct sock_filter *fp,
648 struct sock_filter_int **insnp) 656 struct sock_filter_int **insnp)
649{ 657{
@@ -1737,7 +1745,6 @@ void sk_decode_filter(struct sock_filter *filt, struct sock_filter *to)
1737 [BPF_S_ANC_RXHASH] = BPF_LD|BPF_B|BPF_ABS, 1745 [BPF_S_ANC_RXHASH] = BPF_LD|BPF_B|BPF_ABS,
1738 [BPF_S_ANC_CPU] = BPF_LD|BPF_B|BPF_ABS, 1746 [BPF_S_ANC_CPU] = BPF_LD|BPF_B|BPF_ABS,
1739 [BPF_S_ANC_ALU_XOR_X] = BPF_LD|BPF_B|BPF_ABS, 1747 [BPF_S_ANC_ALU_XOR_X] = BPF_LD|BPF_B|BPF_ABS,
1740 [BPF_S_ANC_SECCOMP_LD_W] = BPF_LD|BPF_B|BPF_ABS,
1741 [BPF_S_ANC_VLAN_TAG] = BPF_LD|BPF_B|BPF_ABS, 1748 [BPF_S_ANC_VLAN_TAG] = BPF_LD|BPF_B|BPF_ABS,
1742 [BPF_S_ANC_VLAN_TAG_PRESENT] = BPF_LD|BPF_B|BPF_ABS, 1749 [BPF_S_ANC_VLAN_TAG_PRESENT] = BPF_LD|BPF_B|BPF_ABS,
1743 [BPF_S_ANC_PAY_OFFSET] = BPF_LD|BPF_B|BPF_ABS, 1750 [BPF_S_ANC_PAY_OFFSET] = BPF_LD|BPF_B|BPF_ABS,
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index d4ff41739b0f..9837bebf93ce 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -774,7 +774,8 @@ static inline int rtnl_vfinfo_size(const struct net_device *dev,
774 return 0; 774 return 0;
775} 775}
776 776
777static size_t rtnl_port_size(const struct net_device *dev) 777static size_t rtnl_port_size(const struct net_device *dev,
778 u32 ext_filter_mask)
778{ 779{
779 size_t port_size = nla_total_size(4) /* PORT_VF */ 780 size_t port_size = nla_total_size(4) /* PORT_VF */
780 + nla_total_size(PORT_PROFILE_MAX) /* PORT_PROFILE */ 781 + nla_total_size(PORT_PROFILE_MAX) /* PORT_PROFILE */
@@ -790,7 +791,8 @@ static size_t rtnl_port_size(const struct net_device *dev)
790 size_t port_self_size = nla_total_size(sizeof(struct nlattr)) 791 size_t port_self_size = nla_total_size(sizeof(struct nlattr))
791 + port_size; 792 + port_size;
792 793
793 if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent) 794 if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent ||
795 !(ext_filter_mask & RTEXT_FILTER_VF))
794 return 0; 796 return 0;
795 if (dev_num_vf(dev->dev.parent)) 797 if (dev_num_vf(dev->dev.parent))
796 return port_self_size + vf_ports_size + 798 return port_self_size + vf_ports_size +
@@ -826,7 +828,7 @@ static noinline size_t if_nlmsg_size(const struct net_device *dev,
826 + nla_total_size(ext_filter_mask 828 + nla_total_size(ext_filter_mask
827 & RTEXT_FILTER_VF ? 4 : 0) /* IFLA_NUM_VF */ 829 & RTEXT_FILTER_VF ? 4 : 0) /* IFLA_NUM_VF */
828 + rtnl_vfinfo_size(dev, ext_filter_mask) /* IFLA_VFINFO_LIST */ 830 + rtnl_vfinfo_size(dev, ext_filter_mask) /* IFLA_VFINFO_LIST */
829 + rtnl_port_size(dev) /* IFLA_VF_PORTS + IFLA_PORT_SELF */ 831 + rtnl_port_size(dev, ext_filter_mask) /* IFLA_VF_PORTS + IFLA_PORT_SELF */
830 + rtnl_link_get_size(dev) /* IFLA_LINKINFO */ 832 + rtnl_link_get_size(dev) /* IFLA_LINKINFO */
831 + rtnl_link_get_af_size(dev) /* IFLA_AF_SPEC */ 833 + rtnl_link_get_af_size(dev) /* IFLA_AF_SPEC */
832 + nla_total_size(MAX_PHYS_PORT_ID_LEN); /* IFLA_PHYS_PORT_ID */ 834 + nla_total_size(MAX_PHYS_PORT_ID_LEN); /* IFLA_PHYS_PORT_ID */
@@ -888,11 +890,13 @@ static int rtnl_port_self_fill(struct sk_buff *skb, struct net_device *dev)
888 return 0; 890 return 0;
889} 891}
890 892
891static int rtnl_port_fill(struct sk_buff *skb, struct net_device *dev) 893static int rtnl_port_fill(struct sk_buff *skb, struct net_device *dev,
894 u32 ext_filter_mask)
892{ 895{
893 int err; 896 int err;
894 897
895 if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent) 898 if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent ||
899 !(ext_filter_mask & RTEXT_FILTER_VF))
896 return 0; 900 return 0;
897 901
898 err = rtnl_port_self_fill(skb, dev); 902 err = rtnl_port_self_fill(skb, dev);
@@ -1079,7 +1083,7 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
1079 nla_nest_end(skb, vfinfo); 1083 nla_nest_end(skb, vfinfo);
1080 } 1084 }
1081 1085
1082 if (rtnl_port_fill(skb, dev)) 1086 if (rtnl_port_fill(skb, dev, ext_filter_mask))
1083 goto nla_put_failure; 1087 goto nla_put_failure;
1084 1088
1085 if (dev->rtnl_link_ops || rtnl_have_link_slave_info(dev)) { 1089 if (dev->rtnl_link_ops || rtnl_have_link_slave_info(dev)) {
@@ -1198,6 +1202,7 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
1198 struct hlist_head *head; 1202 struct hlist_head *head;
1199 struct nlattr *tb[IFLA_MAX+1]; 1203 struct nlattr *tb[IFLA_MAX+1];
1200 u32 ext_filter_mask = 0; 1204 u32 ext_filter_mask = 0;
1205 int err;
1201 1206
1202 s_h = cb->args[0]; 1207 s_h = cb->args[0];
1203 s_idx = cb->args[1]; 1208 s_idx = cb->args[1];
@@ -1218,11 +1223,17 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
1218 hlist_for_each_entry_rcu(dev, head, index_hlist) { 1223 hlist_for_each_entry_rcu(dev, head, index_hlist) {
1219 if (idx < s_idx) 1224 if (idx < s_idx)
1220 goto cont; 1225 goto cont;
1221 if (rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK, 1226 err = rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK,
1222 NETLINK_CB(cb->skb).portid, 1227 NETLINK_CB(cb->skb).portid,
1223 cb->nlh->nlmsg_seq, 0, 1228 cb->nlh->nlmsg_seq, 0,
1224 NLM_F_MULTI, 1229 NLM_F_MULTI,
1225 ext_filter_mask) <= 0) 1230 ext_filter_mask);
1231 /* If we ran out of room on the first message,
1232 * we're in trouble
1233 */
1234 WARN_ON((err == -EMSGSIZE) && (skb->len == 0));
1235
1236 if (err <= 0)
1226 goto out; 1237 goto out;
1227 1238
1228 nl_dump_check_consistent(cb, nlmsg_hdr(skb)); 1239 nl_dump_check_consistent(cb, nlmsg_hdr(skb));
@@ -1395,7 +1406,8 @@ static int do_set_master(struct net_device *dev, int ifindex)
1395 return 0; 1406 return 0;
1396} 1407}
1397 1408
1398static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm, 1409static int do_setlink(const struct sk_buff *skb,
1410 struct net_device *dev, struct ifinfomsg *ifm,
1399 struct nlattr **tb, char *ifname, int modified) 1411 struct nlattr **tb, char *ifname, int modified)
1400{ 1412{
1401 const struct net_device_ops *ops = dev->netdev_ops; 1413 const struct net_device_ops *ops = dev->netdev_ops;
@@ -1407,7 +1419,7 @@ static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
1407 err = PTR_ERR(net); 1419 err = PTR_ERR(net);
1408 goto errout; 1420 goto errout;
1409 } 1421 }
1410 if (!ns_capable(net->user_ns, CAP_NET_ADMIN)) { 1422 if (!netlink_ns_capable(skb, net->user_ns, CAP_NET_ADMIN)) {
1411 err = -EPERM; 1423 err = -EPERM;
1412 goto errout; 1424 goto errout;
1413 } 1425 }
@@ -1661,7 +1673,7 @@ static int rtnl_setlink(struct sk_buff *skb, struct nlmsghdr *nlh)
1661 if (err < 0) 1673 if (err < 0)
1662 goto errout; 1674 goto errout;
1663 1675
1664 err = do_setlink(dev, ifm, tb, ifname, 0); 1676 err = do_setlink(skb, dev, ifm, tb, ifname, 0);
1665errout: 1677errout:
1666 return err; 1678 return err;
1667} 1679}
@@ -1778,7 +1790,8 @@ err:
1778} 1790}
1779EXPORT_SYMBOL(rtnl_create_link); 1791EXPORT_SYMBOL(rtnl_create_link);
1780 1792
1781static int rtnl_group_changelink(struct net *net, int group, 1793static int rtnl_group_changelink(const struct sk_buff *skb,
1794 struct net *net, int group,
1782 struct ifinfomsg *ifm, 1795 struct ifinfomsg *ifm,
1783 struct nlattr **tb) 1796 struct nlattr **tb)
1784{ 1797{
@@ -1787,7 +1800,7 @@ static int rtnl_group_changelink(struct net *net, int group,
1787 1800
1788 for_each_netdev(net, dev) { 1801 for_each_netdev(net, dev) {
1789 if (dev->group == group) { 1802 if (dev->group == group) {
1790 err = do_setlink(dev, ifm, tb, NULL, 0); 1803 err = do_setlink(skb, dev, ifm, tb, NULL, 0);
1791 if (err < 0) 1804 if (err < 0)
1792 return err; 1805 return err;
1793 } 1806 }
@@ -1929,12 +1942,12 @@ replay:
1929 modified = 1; 1942 modified = 1;
1930 } 1943 }
1931 1944
1932 return do_setlink(dev, ifm, tb, ifname, modified); 1945 return do_setlink(skb, dev, ifm, tb, ifname, modified);
1933 } 1946 }
1934 1947
1935 if (!(nlh->nlmsg_flags & NLM_F_CREATE)) { 1948 if (!(nlh->nlmsg_flags & NLM_F_CREATE)) {
1936 if (ifm->ifi_index == 0 && tb[IFLA_GROUP]) 1949 if (ifm->ifi_index == 0 && tb[IFLA_GROUP])
1937 return rtnl_group_changelink(net, 1950 return rtnl_group_changelink(skb, net,
1938 nla_get_u32(tb[IFLA_GROUP]), 1951 nla_get_u32(tb[IFLA_GROUP]),
1939 ifm, tb); 1952 ifm, tb);
1940 return -ENODEV; 1953 return -ENODEV;
@@ -2321,7 +2334,7 @@ static int rtnl_fdb_del(struct sk_buff *skb, struct nlmsghdr *nlh)
2321 int err = -EINVAL; 2334 int err = -EINVAL;
2322 __u8 *addr; 2335 __u8 *addr;
2323 2336
2324 if (!capable(CAP_NET_ADMIN)) 2337 if (!netlink_capable(skb, CAP_NET_ADMIN))
2325 return -EPERM; 2338 return -EPERM;
2326 2339
2327 err = nlmsg_parse(nlh, sizeof(*ndm), tb, NDA_MAX, NULL); 2340 err = nlmsg_parse(nlh, sizeof(*ndm), tb, NDA_MAX, NULL);
@@ -2773,7 +2786,7 @@ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
2773 sz_idx = type>>2; 2786 sz_idx = type>>2;
2774 kind = type&3; 2787 kind = type&3;
2775 2788
2776 if (kind != 2 && !ns_capable(net->user_ns, CAP_NET_ADMIN)) 2789 if (kind != 2 && !netlink_net_capable(skb, CAP_NET_ADMIN))
2777 return -EPERM; 2790 return -EPERM;
2778 2791
2779 if (kind == 2 && nlh->nlmsg_flags&NLM_F_DUMP) { 2792 if (kind == 2 && nlh->nlmsg_flags&NLM_F_DUMP) {
diff --git a/net/core/sock.c b/net/core/sock.c
index b4fff008136f..664ee4295b6f 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -145,6 +145,55 @@
145static DEFINE_MUTEX(proto_list_mutex); 145static DEFINE_MUTEX(proto_list_mutex);
146static LIST_HEAD(proto_list); 146static LIST_HEAD(proto_list);
147 147
148/**
149 * sk_ns_capable - General socket capability test
150 * @sk: Socket to use a capability on or through
151 * @user_ns: The user namespace of the capability to use
152 * @cap: The capability to use
153 *
154 * Test to see if the opener of the socket had when the socket was
155 * created and the current process has the capability @cap in the user
156 * namespace @user_ns.
157 */
158bool sk_ns_capable(const struct sock *sk,
159 struct user_namespace *user_ns, int cap)
160{
161 return file_ns_capable(sk->sk_socket->file, user_ns, cap) &&
162 ns_capable(user_ns, cap);
163}
164EXPORT_SYMBOL(sk_ns_capable);
165
166/**
167 * sk_capable - Socket global capability test
168 * @sk: Socket to use a capability on or through
169 * @cap: The global capbility to use
170 *
171 * Test to see if the opener of the socket had when the socket was
172 * created and the current process has the capability @cap in all user
173 * namespaces.
174 */
175bool sk_capable(const struct sock *sk, int cap)
176{
177 return sk_ns_capable(sk, &init_user_ns, cap);
178}
179EXPORT_SYMBOL(sk_capable);
180
181/**
182 * sk_net_capable - Network namespace socket capability test
183 * @sk: Socket to use a capability on or through
184 * @cap: The capability to use
185 *
186 * Test to see if the opener of the socket had when the socke was created
187 * and the current process has the capability @cap over the network namespace
188 * the socket is a member of.
189 */
190bool sk_net_capable(const struct sock *sk, int cap)
191{
192 return sk_ns_capable(sk, sock_net(sk)->user_ns, cap);
193}
194EXPORT_SYMBOL(sk_net_capable);
195
196
148#ifdef CONFIG_MEMCG_KMEM 197#ifdef CONFIG_MEMCG_KMEM
149int mem_cgroup_sockets_init(struct mem_cgroup *memcg, struct cgroup_subsys *ss) 198int mem_cgroup_sockets_init(struct mem_cgroup *memcg, struct cgroup_subsys *ss)
150{ 199{
diff --git a/net/core/sock_diag.c b/net/core/sock_diag.c
index d7af18859322..a4216a4c9572 100644
--- a/net/core/sock_diag.c
+++ b/net/core/sock_diag.c
@@ -49,7 +49,7 @@ int sock_diag_put_meminfo(struct sock *sk, struct sk_buff *skb, int attrtype)
49} 49}
50EXPORT_SYMBOL_GPL(sock_diag_put_meminfo); 50EXPORT_SYMBOL_GPL(sock_diag_put_meminfo);
51 51
52int sock_diag_put_filterinfo(struct user_namespace *user_ns, struct sock *sk, 52int sock_diag_put_filterinfo(bool may_report_filterinfo, struct sock *sk,
53 struct sk_buff *skb, int attrtype) 53 struct sk_buff *skb, int attrtype)
54{ 54{
55 struct sock_fprog_kern *fprog; 55 struct sock_fprog_kern *fprog;
@@ -58,7 +58,7 @@ int sock_diag_put_filterinfo(struct user_namespace *user_ns, struct sock *sk,
58 unsigned int flen; 58 unsigned int flen;
59 int err = 0; 59 int err = 0;
60 60
61 if (!ns_capable(user_ns, CAP_NET_ADMIN)) { 61 if (!may_report_filterinfo) {
62 nla_reserve(skb, attrtype, 0); 62 nla_reserve(skb, attrtype, 0);
63 return 0; 63 return 0;
64 } 64 }
diff --git a/net/dcb/dcbnl.c b/net/dcb/dcbnl.c
index 553644402670..f8b98d89c285 100644
--- a/net/dcb/dcbnl.c
+++ b/net/dcb/dcbnl.c
@@ -1669,7 +1669,7 @@ static int dcb_doit(struct sk_buff *skb, struct nlmsghdr *nlh)
1669 struct nlmsghdr *reply_nlh = NULL; 1669 struct nlmsghdr *reply_nlh = NULL;
1670 const struct reply_func *fn; 1670 const struct reply_func *fn;
1671 1671
1672 if ((nlh->nlmsg_type == RTM_SETDCB) && !capable(CAP_NET_ADMIN)) 1672 if ((nlh->nlmsg_type == RTM_SETDCB) && !netlink_capable(skb, CAP_NET_ADMIN))
1673 return -EPERM; 1673 return -EPERM;
1674 1674
1675 ret = nlmsg_parse(nlh, sizeof(*dcb), tb, DCB_ATTR_MAX, 1675 ret = nlmsg_parse(nlh, sizeof(*dcb), tb, DCB_ATTR_MAX,
diff --git a/net/dccp/output.c b/net/dccp/output.c
index 8876078859da..0248e8a3460c 100644
--- a/net/dccp/output.c
+++ b/net/dccp/output.c
@@ -138,7 +138,7 @@ static int dccp_transmit_skb(struct sock *sk, struct sk_buff *skb)
138 138
139 DCCP_INC_STATS(DCCP_MIB_OUTSEGS); 139 DCCP_INC_STATS(DCCP_MIB_OUTSEGS);
140 140
141 err = icsk->icsk_af_ops->queue_xmit(skb, &inet->cork.fl); 141 err = icsk->icsk_af_ops->queue_xmit(sk, skb, &inet->cork.fl);
142 return net_xmit_eval(err); 142 return net_xmit_eval(err);
143 } 143 }
144 return -ENOBUFS; 144 return -ENOBUFS;
diff --git a/net/decnet/dn_dev.c b/net/decnet/dn_dev.c
index a603823a3e27..3b726f31c64c 100644
--- a/net/decnet/dn_dev.c
+++ b/net/decnet/dn_dev.c
@@ -574,7 +574,7 @@ static int dn_nl_deladdr(struct sk_buff *skb, struct nlmsghdr *nlh)
574 struct dn_ifaddr __rcu **ifap; 574 struct dn_ifaddr __rcu **ifap;
575 int err = -EINVAL; 575 int err = -EINVAL;
576 576
577 if (!capable(CAP_NET_ADMIN)) 577 if (!netlink_capable(skb, CAP_NET_ADMIN))
578 return -EPERM; 578 return -EPERM;
579 579
580 if (!net_eq(net, &init_net)) 580 if (!net_eq(net, &init_net))
@@ -618,7 +618,7 @@ static int dn_nl_newaddr(struct sk_buff *skb, struct nlmsghdr *nlh)
618 struct dn_ifaddr *ifa; 618 struct dn_ifaddr *ifa;
619 int err; 619 int err;
620 620
621 if (!capable(CAP_NET_ADMIN)) 621 if (!netlink_capable(skb, CAP_NET_ADMIN))
622 return -EPERM; 622 return -EPERM;
623 623
624 if (!net_eq(net, &init_net)) 624 if (!net_eq(net, &init_net))
diff --git a/net/decnet/dn_fib.c b/net/decnet/dn_fib.c
index 57dc159245ec..d332aefb0846 100644
--- a/net/decnet/dn_fib.c
+++ b/net/decnet/dn_fib.c
@@ -505,7 +505,7 @@ static int dn_fib_rtm_delroute(struct sk_buff *skb, struct nlmsghdr *nlh)
505 struct nlattr *attrs[RTA_MAX+1]; 505 struct nlattr *attrs[RTA_MAX+1];
506 int err; 506 int err;
507 507
508 if (!capable(CAP_NET_ADMIN)) 508 if (!netlink_capable(skb, CAP_NET_ADMIN))
509 return -EPERM; 509 return -EPERM;
510 510
511 if (!net_eq(net, &init_net)) 511 if (!net_eq(net, &init_net))
@@ -530,7 +530,7 @@ static int dn_fib_rtm_newroute(struct sk_buff *skb, struct nlmsghdr *nlh)
530 struct nlattr *attrs[RTA_MAX+1]; 530 struct nlattr *attrs[RTA_MAX+1];
531 int err; 531 int err;
532 532
533 if (!capable(CAP_NET_ADMIN)) 533 if (!netlink_capable(skb, CAP_NET_ADMIN))
534 return -EPERM; 534 return -EPERM;
535 535
536 if (!net_eq(net, &init_net)) 536 if (!net_eq(net, &init_net))
diff --git a/net/decnet/dn_route.c b/net/decnet/dn_route.c
index ce0cbbfe0f43..daccc4a36d80 100644
--- a/net/decnet/dn_route.c
+++ b/net/decnet/dn_route.c
@@ -752,7 +752,7 @@ static int dn_to_neigh_output(struct sk_buff *skb)
752 return n->output(n, skb); 752 return n->output(n, skb);
753} 753}
754 754
755static int dn_output(struct sk_buff *skb) 755static int dn_output(struct sock *sk, struct sk_buff *skb)
756{ 756{
757 struct dst_entry *dst = skb_dst(skb); 757 struct dst_entry *dst = skb_dst(skb);
758 struct dn_route *rt = (struct dn_route *)dst; 758 struct dn_route *rt = (struct dn_route *)dst;
@@ -838,6 +838,18 @@ drop:
838 * Used to catch bugs. This should never normally get 838 * Used to catch bugs. This should never normally get
839 * called. 839 * called.
840 */ 840 */
841static int dn_rt_bug_sk(struct sock *sk, struct sk_buff *skb)
842{
843 struct dn_skb_cb *cb = DN_SKB_CB(skb);
844
845 net_dbg_ratelimited("dn_rt_bug: skb from:%04x to:%04x\n",
846 le16_to_cpu(cb->src), le16_to_cpu(cb->dst));
847
848 kfree_skb(skb);
849
850 return NET_RX_DROP;
851}
852
841static int dn_rt_bug(struct sk_buff *skb) 853static int dn_rt_bug(struct sk_buff *skb)
842{ 854{
843 struct dn_skb_cb *cb = DN_SKB_CB(skb); 855 struct dn_skb_cb *cb = DN_SKB_CB(skb);
@@ -1463,7 +1475,7 @@ make_route:
1463 1475
1464 rt->n = neigh; 1476 rt->n = neigh;
1465 rt->dst.lastuse = jiffies; 1477 rt->dst.lastuse = jiffies;
1466 rt->dst.output = dn_rt_bug; 1478 rt->dst.output = dn_rt_bug_sk;
1467 switch (res.type) { 1479 switch (res.type) {
1468 case RTN_UNICAST: 1480 case RTN_UNICAST:
1469 rt->dst.input = dn_forward; 1481 rt->dst.input = dn_forward;
diff --git a/net/decnet/netfilter/dn_rtmsg.c b/net/decnet/netfilter/dn_rtmsg.c
index e83015cecfa7..e4d9560a910b 100644
--- a/net/decnet/netfilter/dn_rtmsg.c
+++ b/net/decnet/netfilter/dn_rtmsg.c
@@ -107,7 +107,7 @@ static inline void dnrmg_receive_user_skb(struct sk_buff *skb)
107 if (nlh->nlmsg_len < sizeof(*nlh) || skb->len < nlh->nlmsg_len) 107 if (nlh->nlmsg_len < sizeof(*nlh) || skb->len < nlh->nlmsg_len)
108 return; 108 return;
109 109
110 if (!capable(CAP_NET_ADMIN)) 110 if (!netlink_capable(skb, CAP_NET_ADMIN))
111 RCV_SKB_FAIL(-EPERM); 111 RCV_SKB_FAIL(-EPERM);
112 112
113 /* Eventually we might send routing messages too */ 113 /* Eventually we might send routing messages too */
diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c
index 1a629f870274..255aa9946fe7 100644
--- a/net/ipv4/fib_frontend.c
+++ b/net/ipv4/fib_frontend.c
@@ -250,7 +250,7 @@ static int __fib_validate_source(struct sk_buff *skb, __be32 src, __be32 dst,
250 bool dev_match; 250 bool dev_match;
251 251
252 fl4.flowi4_oif = 0; 252 fl4.flowi4_oif = 0;
253 fl4.flowi4_iif = oif; 253 fl4.flowi4_iif = oif ? : LOOPBACK_IFINDEX;
254 fl4.daddr = src; 254 fl4.daddr = src;
255 fl4.saddr = dst; 255 fl4.saddr = dst;
256 fl4.flowi4_tos = tos; 256 fl4.flowi4_tos = tos;
diff --git a/net/ipv4/fib_semantics.c b/net/ipv4/fib_semantics.c
index b53f0bf84dca..8a043f03c88e 100644
--- a/net/ipv4/fib_semantics.c
+++ b/net/ipv4/fib_semantics.c
@@ -631,6 +631,7 @@ static int fib_check_nh(struct fib_config *cfg, struct fib_info *fi,
631 .daddr = nh->nh_gw, 631 .daddr = nh->nh_gw,
632 .flowi4_scope = cfg->fc_scope + 1, 632 .flowi4_scope = cfg->fc_scope + 1,
633 .flowi4_oif = nh->nh_oif, 633 .flowi4_oif = nh->nh_oif,
634 .flowi4_iif = LOOPBACK_IFINDEX,
634 }; 635 };
635 636
636 /* It is not necessary, but requires a bit of thinking */ 637 /* It is not necessary, but requires a bit of thinking */
diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index 1a0755fea491..1cbeba5edff9 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -101,17 +101,17 @@ int __ip_local_out(struct sk_buff *skb)
101 skb_dst(skb)->dev, dst_output); 101 skb_dst(skb)->dev, dst_output);
102} 102}
103 103
104int ip_local_out(struct sk_buff *skb) 104int ip_local_out_sk(struct sock *sk, struct sk_buff *skb)
105{ 105{
106 int err; 106 int err;
107 107
108 err = __ip_local_out(skb); 108 err = __ip_local_out(skb);
109 if (likely(err == 1)) 109 if (likely(err == 1))
110 err = dst_output(skb); 110 err = dst_output_sk(sk, skb);
111 111
112 return err; 112 return err;
113} 113}
114EXPORT_SYMBOL_GPL(ip_local_out); 114EXPORT_SYMBOL_GPL(ip_local_out_sk);
115 115
116static inline int ip_select_ttl(struct inet_sock *inet, struct dst_entry *dst) 116static inline int ip_select_ttl(struct inet_sock *inet, struct dst_entry *dst)
117{ 117{
@@ -226,9 +226,8 @@ static int ip_finish_output(struct sk_buff *skb)
226 return ip_finish_output2(skb); 226 return ip_finish_output2(skb);
227} 227}
228 228
229int ip_mc_output(struct sk_buff *skb) 229int ip_mc_output(struct sock *sk, struct sk_buff *skb)
230{ 230{
231 struct sock *sk = skb->sk;
232 struct rtable *rt = skb_rtable(skb); 231 struct rtable *rt = skb_rtable(skb);
233 struct net_device *dev = rt->dst.dev; 232 struct net_device *dev = rt->dst.dev;
234 233
@@ -287,7 +286,7 @@ int ip_mc_output(struct sk_buff *skb)
287 !(IPCB(skb)->flags & IPSKB_REROUTED)); 286 !(IPCB(skb)->flags & IPSKB_REROUTED));
288} 287}
289 288
290int ip_output(struct sk_buff *skb) 289int ip_output(struct sock *sk, struct sk_buff *skb)
291{ 290{
292 struct net_device *dev = skb_dst(skb)->dev; 291 struct net_device *dev = skb_dst(skb)->dev;
293 292
@@ -315,9 +314,9 @@ static void ip_copy_addrs(struct iphdr *iph, const struct flowi4 *fl4)
315 sizeof(fl4->saddr) + sizeof(fl4->daddr)); 314 sizeof(fl4->saddr) + sizeof(fl4->daddr));
316} 315}
317 316
318int ip_queue_xmit(struct sk_buff *skb, struct flowi *fl) 317/* Note: skb->sk can be different from sk, in case of tunnels */
318int ip_queue_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl)
319{ 319{
320 struct sock *sk = skb->sk;
321 struct inet_sock *inet = inet_sk(sk); 320 struct inet_sock *inet = inet_sk(sk);
322 struct ip_options_rcu *inet_opt; 321 struct ip_options_rcu *inet_opt;
323 struct flowi4 *fl4; 322 struct flowi4 *fl4;
@@ -389,6 +388,7 @@ packet_routed:
389 ip_select_ident_more(skb, &rt->dst, sk, 388 ip_select_ident_more(skb, &rt->dst, sk,
390 (skb_shinfo(skb)->gso_segs ?: 1) - 1); 389 (skb_shinfo(skb)->gso_segs ?: 1) - 1);
391 390
391 /* TODO : should we use skb->sk here instead of sk ? */
392 skb->priority = sk->sk_priority; 392 skb->priority = sk->sk_priority;
393 skb->mark = sk->sk_mark; 393 skb->mark = sk->sk_mark;
394 394
diff --git a/net/ipv4/ip_tunnel.c b/net/ipv4/ip_tunnel.c
index e77381d1df9a..b3f859731c60 100644
--- a/net/ipv4/ip_tunnel.c
+++ b/net/ipv4/ip_tunnel.c
@@ -442,6 +442,8 @@ int ip_tunnel_rcv(struct ip_tunnel *tunnel, struct sk_buff *skb,
442 tunnel->i_seqno = ntohl(tpi->seq) + 1; 442 tunnel->i_seqno = ntohl(tpi->seq) + 1;
443 } 443 }
444 444
445 skb_reset_network_header(skb);
446
445 err = IP_ECN_decapsulate(iph, skb); 447 err = IP_ECN_decapsulate(iph, skb);
446 if (unlikely(err)) { 448 if (unlikely(err)) {
447 if (log_ecn_error) 449 if (log_ecn_error)
@@ -670,7 +672,7 @@ void ip_tunnel_xmit(struct sk_buff *skb, struct net_device *dev,
670 return; 672 return;
671 } 673 }
672 674
673 err = iptunnel_xmit(rt, skb, fl4.saddr, fl4.daddr, protocol, 675 err = iptunnel_xmit(skb->sk, rt, skb, fl4.saddr, fl4.daddr, protocol,
674 tos, ttl, df, !net_eq(tunnel->net, dev_net(dev))); 676 tos, ttl, df, !net_eq(tunnel->net, dev_net(dev)));
675 iptunnel_xmit_stats(err, &dev->stats, dev->tstats); 677 iptunnel_xmit_stats(err, &dev->stats, dev->tstats);
676 678
@@ -722,19 +724,18 @@ static void ip_tunnel_update(struct ip_tunnel_net *itn,
722int ip_tunnel_ioctl(struct net_device *dev, struct ip_tunnel_parm *p, int cmd) 724int ip_tunnel_ioctl(struct net_device *dev, struct ip_tunnel_parm *p, int cmd)
723{ 725{
724 int err = 0; 726 int err = 0;
725 struct ip_tunnel *t; 727 struct ip_tunnel *t = netdev_priv(dev);
726 struct net *net = dev_net(dev); 728 struct net *net = t->net;
727 struct ip_tunnel *tunnel = netdev_priv(dev); 729 struct ip_tunnel_net *itn = net_generic(net, t->ip_tnl_net_id);
728 struct ip_tunnel_net *itn = net_generic(net, tunnel->ip_tnl_net_id);
729 730
730 BUG_ON(!itn->fb_tunnel_dev); 731 BUG_ON(!itn->fb_tunnel_dev);
731 switch (cmd) { 732 switch (cmd) {
732 case SIOCGETTUNNEL: 733 case SIOCGETTUNNEL:
733 t = NULL; 734 if (dev == itn->fb_tunnel_dev) {
734 if (dev == itn->fb_tunnel_dev)
735 t = ip_tunnel_find(itn, p, itn->fb_tunnel_dev->type); 735 t = ip_tunnel_find(itn, p, itn->fb_tunnel_dev->type);
736 if (t == NULL) 736 if (t == NULL)
737 t = netdev_priv(dev); 737 t = netdev_priv(dev);
738 }
738 memcpy(p, &t->parms, sizeof(*p)); 739 memcpy(p, &t->parms, sizeof(*p));
739 break; 740 break;
740 741
diff --git a/net/ipv4/ip_tunnel_core.c b/net/ipv4/ip_tunnel_core.c
index e0c2b1d2ea4e..bcf206c79005 100644
--- a/net/ipv4/ip_tunnel_core.c
+++ b/net/ipv4/ip_tunnel_core.c
@@ -46,7 +46,7 @@
46#include <net/netns/generic.h> 46#include <net/netns/generic.h>
47#include <net/rtnetlink.h> 47#include <net/rtnetlink.h>
48 48
49int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb, 49int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
50 __be32 src, __be32 dst, __u8 proto, 50 __be32 src, __be32 dst, __u8 proto,
51 __u8 tos, __u8 ttl, __be16 df, bool xnet) 51 __u8 tos, __u8 ttl, __be16 df, bool xnet)
52{ 52{
@@ -76,7 +76,7 @@ int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb,
76 iph->ttl = ttl; 76 iph->ttl = ttl;
77 __ip_select_ident(iph, &rt->dst, (skb_shinfo(skb)->gso_segs ?: 1) - 1); 77 __ip_select_ident(iph, &rt->dst, (skb_shinfo(skb)->gso_segs ?: 1) - 1);
78 78
79 err = ip_local_out(skb); 79 err = ip_local_out_sk(sk, skb);
80 if (unlikely(net_xmit_eval(err))) 80 if (unlikely(net_xmit_eval(err)))
81 pkt_len = 0; 81 pkt_len = 0;
82 return pkt_len; 82 return pkt_len;
diff --git a/net/ipv4/ipmr.c b/net/ipv4/ipmr.c
index 28863570dd60..d84dc8d4c916 100644
--- a/net/ipv4/ipmr.c
+++ b/net/ipv4/ipmr.c
@@ -455,7 +455,7 @@ static netdev_tx_t reg_vif_xmit(struct sk_buff *skb, struct net_device *dev)
455 struct mr_table *mrt; 455 struct mr_table *mrt;
456 struct flowi4 fl4 = { 456 struct flowi4 fl4 = {
457 .flowi4_oif = dev->ifindex, 457 .flowi4_oif = dev->ifindex,
458 .flowi4_iif = skb->skb_iif, 458 .flowi4_iif = skb->skb_iif ? : LOOPBACK_IFINDEX,
459 .flowi4_mark = skb->mark, 459 .flowi4_mark = skb->mark,
460 }; 460 };
461 int err; 461 int err;
diff --git a/net/ipv4/netfilter/ipt_rpfilter.c b/net/ipv4/netfilter/ipt_rpfilter.c
index c49dcd0284a0..4bfaedf9b34e 100644
--- a/net/ipv4/netfilter/ipt_rpfilter.c
+++ b/net/ipv4/netfilter/ipt_rpfilter.c
@@ -89,11 +89,8 @@ static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
89 if (ipv4_is_multicast(iph->daddr)) { 89 if (ipv4_is_multicast(iph->daddr)) {
90 if (ipv4_is_zeronet(iph->saddr)) 90 if (ipv4_is_zeronet(iph->saddr))
91 return ipv4_is_local_multicast(iph->daddr) ^ invert; 91 return ipv4_is_local_multicast(iph->daddr) ^ invert;
92 flow.flowi4_iif = 0;
93 } else {
94 flow.flowi4_iif = LOOPBACK_IFINDEX;
95 } 92 }
96 93 flow.flowi4_iif = LOOPBACK_IFINDEX;
97 flow.daddr = iph->saddr; 94 flow.daddr = iph->saddr;
98 flow.saddr = rpfilter_get_saddr(iph->daddr); 95 flow.saddr = rpfilter_get_saddr(iph->daddr);
99 flow.flowi4_oif = 0; 96 flow.flowi4_oif = 0;
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index f4b19e5dde54..8210964a9f19 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -252,26 +252,33 @@ int ping_init_sock(struct sock *sk)
252{ 252{
253 struct net *net = sock_net(sk); 253 struct net *net = sock_net(sk);
254 kgid_t group = current_egid(); 254 kgid_t group = current_egid();
255 struct group_info *group_info = get_current_groups(); 255 struct group_info *group_info;
256 int i, j, count = group_info->ngroups; 256 int i, j, count;
257 kgid_t low, high; 257 kgid_t low, high;
258 int ret = 0;
258 259
259 inet_get_ping_group_range_net(net, &low, &high); 260 inet_get_ping_group_range_net(net, &low, &high);
260 if (gid_lte(low, group) && gid_lte(group, high)) 261 if (gid_lte(low, group) && gid_lte(group, high))
261 return 0; 262 return 0;
262 263
264 group_info = get_current_groups();
265 count = group_info->ngroups;
263 for (i = 0; i < group_info->nblocks; i++) { 266 for (i = 0; i < group_info->nblocks; i++) {
264 int cp_count = min_t(int, NGROUPS_PER_BLOCK, count); 267 int cp_count = min_t(int, NGROUPS_PER_BLOCK, count);
265 for (j = 0; j < cp_count; j++) { 268 for (j = 0; j < cp_count; j++) {
266 kgid_t gid = group_info->blocks[i][j]; 269 kgid_t gid = group_info->blocks[i][j];
267 if (gid_lte(low, gid) && gid_lte(gid, high)) 270 if (gid_lte(low, gid) && gid_lte(gid, high))
268 return 0; 271 goto out_release_group;
269 } 272 }
270 273
271 count -= cp_count; 274 count -= cp_count;
272 } 275 }
273 276
274 return -EACCES; 277 ret = -EACCES;
278
279out_release_group:
280 put_group_info(group_info);
281 return ret;
275} 282}
276EXPORT_SYMBOL_GPL(ping_init_sock); 283EXPORT_SYMBOL_GPL(ping_init_sock);
277 284
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 34d094cadb11..db1e0da871f4 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -1129,7 +1129,7 @@ static void ipv4_link_failure(struct sk_buff *skb)
1129 dst_set_expires(&rt->dst, 0); 1129 dst_set_expires(&rt->dst, 0);
1130} 1130}
1131 1131
1132static int ip_rt_bug(struct sk_buff *skb) 1132static int ip_rt_bug(struct sock *sk, struct sk_buff *skb)
1133{ 1133{
1134 pr_debug("%s: %pI4 -> %pI4, %s\n", 1134 pr_debug("%s: %pI4 -> %pI4, %s\n",
1135 __func__, &ip_hdr(skb)->saddr, &ip_hdr(skb)->daddr, 1135 __func__, &ip_hdr(skb)->saddr, &ip_hdr(skb)->daddr,
@@ -1700,8 +1700,7 @@ static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr,
1700 1700
1701 if (res.type == RTN_LOCAL) { 1701 if (res.type == RTN_LOCAL) {
1702 err = fib_validate_source(skb, saddr, daddr, tos, 1702 err = fib_validate_source(skb, saddr, daddr, tos,
1703 LOOPBACK_IFINDEX, 1703 0, dev, in_dev, &itag);
1704 dev, in_dev, &itag);
1705 if (err < 0) 1704 if (err < 0)
1706 goto martian_source_keep_err; 1705 goto martian_source_keep_err;
1707 goto local_input; 1706 goto local_input;
@@ -2218,7 +2217,7 @@ struct dst_entry *ipv4_blackhole_route(struct net *net, struct dst_entry *dst_or
2218 2217
2219 new->__use = 1; 2218 new->__use = 1;
2220 new->input = dst_discard; 2219 new->input = dst_discard;
2221 new->output = dst_discard; 2220 new->output = dst_discard_sk;
2222 2221
2223 new->dev = ort->dst.dev; 2222 new->dev = ort->dst.dev;
2224 if (new->dev) 2223 if (new->dev)
@@ -2357,7 +2356,7 @@ static int rt_fill_info(struct net *net, __be32 dst, __be32 src,
2357 } 2356 }
2358 } else 2357 } else
2359#endif 2358#endif
2360 if (nla_put_u32(skb, RTA_IIF, rt->rt_iif)) 2359 if (nla_put_u32(skb, RTA_IIF, skb->dev->ifindex))
2361 goto nla_put_failure; 2360 goto nla_put_failure;
2362 } 2361 }
2363 2362
diff --git a/net/ipv4/tcp_cubic.c b/net/ipv4/tcp_cubic.c
index 8bf224516ba2..b4f1b29b08bd 100644
--- a/net/ipv4/tcp_cubic.c
+++ b/net/ipv4/tcp_cubic.c
@@ -409,7 +409,7 @@ static void bictcp_acked(struct sock *sk, u32 cnt, s32 rtt_us)
409 ratio -= ca->delayed_ack >> ACK_RATIO_SHIFT; 409 ratio -= ca->delayed_ack >> ACK_RATIO_SHIFT;
410 ratio += cnt; 410 ratio += cnt;
411 411
412 ca->delayed_ack = min(ratio, ACK_RATIO_LIMIT); 412 ca->delayed_ack = clamp(ratio, 1U, ACK_RATIO_LIMIT);
413 } 413 }
414 414
415 /* Some calls are for duplicates without timetamps */ 415 /* Some calls are for duplicates without timetamps */
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 699fb102e971..12d6016bdd9a 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -981,7 +981,7 @@ static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
981 TCP_ADD_STATS(sock_net(sk), TCP_MIB_OUTSEGS, 981 TCP_ADD_STATS(sock_net(sk), TCP_MIB_OUTSEGS,
982 tcp_skb_pcount(skb)); 982 tcp_skb_pcount(skb));
983 983
984 err = icsk->icsk_af_ops->queue_xmit(skb, &inet->cork.fl); 984 err = icsk->icsk_af_ops->queue_xmit(sk, skb, &inet->cork.fl);
985 if (likely(err <= 0)) 985 if (likely(err <= 0))
986 return err; 986 return err;
987 987
@@ -2441,8 +2441,14 @@ int __tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
2441 err = tcp_transmit_skb(sk, skb, 1, GFP_ATOMIC); 2441 err = tcp_transmit_skb(sk, skb, 1, GFP_ATOMIC);
2442 } 2442 }
2443 2443
2444 if (likely(!err)) 2444 if (likely(!err)) {
2445 TCP_SKB_CB(skb)->sacked |= TCPCB_EVER_RETRANS; 2445 TCP_SKB_CB(skb)->sacked |= TCPCB_EVER_RETRANS;
2446 /* Update global TCP statistics. */
2447 TCP_INC_STATS(sock_net(sk), TCP_MIB_RETRANSSEGS);
2448 if (TCP_SKB_CB(skb)->tcp_flags & TCPHDR_SYN)
2449 NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_TCPSYNRETRANS);
2450 tp->total_retrans++;
2451 }
2446 return err; 2452 return err;
2447} 2453}
2448 2454
@@ -2452,12 +2458,6 @@ int tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
2452 int err = __tcp_retransmit_skb(sk, skb); 2458 int err = __tcp_retransmit_skb(sk, skb);
2453 2459
2454 if (err == 0) { 2460 if (err == 0) {
2455 /* Update global TCP statistics. */
2456 TCP_INC_STATS(sock_net(sk), TCP_MIB_RETRANSSEGS);
2457 if (TCP_SKB_CB(skb)->tcp_flags & TCPHDR_SYN)
2458 NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_TCPSYNRETRANS);
2459 tp->total_retrans++;
2460
2461#if FASTRETRANS_DEBUG > 0 2461#if FASTRETRANS_DEBUG > 0
2462 if (TCP_SKB_CB(skb)->sacked & TCPCB_SACKED_RETRANS) { 2462 if (TCP_SKB_CB(skb)->sacked & TCPCB_SACKED_RETRANS) {
2463 net_dbg_ratelimited("retrans_out leaked\n"); 2463 net_dbg_ratelimited("retrans_out leaked\n");
diff --git a/net/ipv4/xfrm4_output.c b/net/ipv4/xfrm4_output.c
index baa0f63731fd..40e701f2e1e0 100644
--- a/net/ipv4/xfrm4_output.c
+++ b/net/ipv4/xfrm4_output.c
@@ -86,7 +86,7 @@ int xfrm4_output_finish(struct sk_buff *skb)
86 return xfrm_output(skb); 86 return xfrm_output(skb);
87} 87}
88 88
89int xfrm4_output(struct sk_buff *skb) 89int xfrm4_output(struct sock *sk, struct sk_buff *skb)
90{ 90{
91 struct dst_entry *dst = skb_dst(skb); 91 struct dst_entry *dst = skb_dst(skb);
92 struct xfrm_state *x = dst->xfrm; 92 struct xfrm_state *x = dst->xfrm;
diff --git a/net/ipv6/inet6_connection_sock.c b/net/ipv6/inet6_connection_sock.c
index c9138189415a..d4ade34ab375 100644
--- a/net/ipv6/inet6_connection_sock.c
+++ b/net/ipv6/inet6_connection_sock.c
@@ -224,9 +224,8 @@ static struct dst_entry *inet6_csk_route_socket(struct sock *sk,
224 return dst; 224 return dst;
225} 225}
226 226
227int inet6_csk_xmit(struct sk_buff *skb, struct flowi *fl_unused) 227int inet6_csk_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl_unused)
228{ 228{
229 struct sock *sk = skb->sk;
230 struct ipv6_pinfo *np = inet6_sk(sk); 229 struct ipv6_pinfo *np = inet6_sk(sk);
231 struct flowi6 fl6; 230 struct flowi6 fl6;
232 struct dst_entry *dst; 231 struct dst_entry *dst;
diff --git a/net/ipv6/ip6_fib.c b/net/ipv6/ip6_fib.c
index 34e0ded5c14b..87891f5f57b5 100644
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -1459,7 +1459,7 @@ static int fib6_walk_continue(struct fib6_walker_t *w)
1459 1459
1460 if (w->skip) { 1460 if (w->skip) {
1461 w->skip--; 1461 w->skip--;
1462 continue; 1462 goto skip;
1463 } 1463 }
1464 1464
1465 err = w->func(w); 1465 err = w->func(w);
@@ -1469,6 +1469,7 @@ static int fib6_walk_continue(struct fib6_walker_t *w)
1469 w->count++; 1469 w->count++;
1470 continue; 1470 continue;
1471 } 1471 }
1472skip:
1472 w->state = FWS_U; 1473 w->state = FWS_U;
1473 case FWS_U: 1474 case FWS_U:
1474 if (fn == w->root) 1475 if (fn == w->root)
diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c
index c98338b81d30..9d921462b57f 100644
--- a/net/ipv6/ip6_gre.c
+++ b/net/ipv6/ip6_gre.c
@@ -1559,6 +1559,15 @@ static int ip6gre_changelink(struct net_device *dev, struct nlattr *tb[],
1559 return 0; 1559 return 0;
1560} 1560}
1561 1561
1562static void ip6gre_dellink(struct net_device *dev, struct list_head *head)
1563{
1564 struct net *net = dev_net(dev);
1565 struct ip6gre_net *ign = net_generic(net, ip6gre_net_id);
1566
1567 if (dev != ign->fb_tunnel_dev)
1568 unregister_netdevice_queue(dev, head);
1569}
1570
1562static size_t ip6gre_get_size(const struct net_device *dev) 1571static size_t ip6gre_get_size(const struct net_device *dev)
1563{ 1572{
1564 return 1573 return
@@ -1636,6 +1645,7 @@ static struct rtnl_link_ops ip6gre_link_ops __read_mostly = {
1636 .validate = ip6gre_tunnel_validate, 1645 .validate = ip6gre_tunnel_validate,
1637 .newlink = ip6gre_newlink, 1646 .newlink = ip6gre_newlink,
1638 .changelink = ip6gre_changelink, 1647 .changelink = ip6gre_changelink,
1648 .dellink = ip6gre_dellink,
1639 .get_size = ip6gre_get_size, 1649 .get_size = ip6gre_get_size,
1640 .fill_info = ip6gre_fill_info, 1650 .fill_info = ip6gre_fill_info,
1641}; 1651};
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 3284d61577c0..40e7581374f7 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -132,7 +132,7 @@ static int ip6_finish_output(struct sk_buff *skb)
132 return ip6_finish_output2(skb); 132 return ip6_finish_output2(skb);
133} 133}
134 134
135int ip6_output(struct sk_buff *skb) 135int ip6_output(struct sock *sk, struct sk_buff *skb)
136{ 136{
137 struct net_device *dev = skb_dst(skb)->dev; 137 struct net_device *dev = skb_dst(skb)->dev;
138 struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); 138 struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb));
diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c
index e1df691d78be..b05b609f69d1 100644
--- a/net/ipv6/ip6_tunnel.c
+++ b/net/ipv6/ip6_tunnel.c
@@ -1340,8 +1340,8 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1340 int err = 0; 1340 int err = 0;
1341 struct ip6_tnl_parm p; 1341 struct ip6_tnl_parm p;
1342 struct __ip6_tnl_parm p1; 1342 struct __ip6_tnl_parm p1;
1343 struct ip6_tnl *t = NULL; 1343 struct ip6_tnl *t = netdev_priv(dev);
1344 struct net *net = dev_net(dev); 1344 struct net *net = t->net;
1345 struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); 1345 struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
1346 1346
1347 switch (cmd) { 1347 switch (cmd) {
@@ -1353,11 +1353,11 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1353 } 1353 }
1354 ip6_tnl_parm_from_user(&p1, &p); 1354 ip6_tnl_parm_from_user(&p1, &p);
1355 t = ip6_tnl_locate(net, &p1, 0); 1355 t = ip6_tnl_locate(net, &p1, 0);
1356 if (t == NULL)
1357 t = netdev_priv(dev);
1356 } else { 1358 } else {
1357 memset(&p, 0, sizeof(p)); 1359 memset(&p, 0, sizeof(p));
1358 } 1360 }
1359 if (t == NULL)
1360 t = netdev_priv(dev);
1361 ip6_tnl_parm_to_user(&p, &t->parms); 1361 ip6_tnl_parm_to_user(&p, &t->parms);
1362 if (copy_to_user(ifr->ifr_ifru.ifru_data, &p, sizeof (p))) { 1362 if (copy_to_user(ifr->ifr_ifru.ifru_data, &p, sizeof (p))) {
1363 err = -EFAULT; 1363 err = -EFAULT;
diff --git a/net/ipv6/ip6mr.c b/net/ipv6/ip6mr.c
index 8737400af0a0..8250474ab7dc 100644
--- a/net/ipv6/ip6mr.c
+++ b/net/ipv6/ip6mr.c
@@ -700,7 +700,7 @@ static netdev_tx_t reg_vif_xmit(struct sk_buff *skb,
700 struct mr6_table *mrt; 700 struct mr6_table *mrt;
701 struct flowi6 fl6 = { 701 struct flowi6 fl6 = {
702 .flowi6_oif = dev->ifindex, 702 .flowi6_oif = dev->ifindex,
703 .flowi6_iif = skb->skb_iif, 703 .flowi6_iif = skb->skb_iif ? : LOOPBACK_IFINDEX,
704 .flowi6_mark = skb->mark, 704 .flowi6_mark = skb->mark,
705 }; 705 };
706 int err; 706 int err;
@@ -1633,7 +1633,7 @@ struct sock *mroute6_socket(struct net *net, struct sk_buff *skb)
1633{ 1633{
1634 struct mr6_table *mrt; 1634 struct mr6_table *mrt;
1635 struct flowi6 fl6 = { 1635 struct flowi6 fl6 = {
1636 .flowi6_iif = skb->skb_iif, 1636 .flowi6_iif = skb->skb_iif ? : LOOPBACK_IFINDEX,
1637 .flowi6_oif = skb->dev->ifindex, 1637 .flowi6_oif = skb->dev->ifindex,
1638 .flowi6_mark = skb->mark, 1638 .flowi6_mark = skb->mark,
1639 }; 1639 };
diff --git a/net/ipv6/netfilter/ip6t_rpfilter.c b/net/ipv6/netfilter/ip6t_rpfilter.c
index e0983f3648a6..790e0c6b19e1 100644
--- a/net/ipv6/netfilter/ip6t_rpfilter.c
+++ b/net/ipv6/netfilter/ip6t_rpfilter.c
@@ -33,6 +33,7 @@ static bool rpfilter_lookup_reverse6(const struct sk_buff *skb,
33 struct ipv6hdr *iph = ipv6_hdr(skb); 33 struct ipv6hdr *iph = ipv6_hdr(skb);
34 bool ret = false; 34 bool ret = false;
35 struct flowi6 fl6 = { 35 struct flowi6 fl6 = {
36 .flowi6_iif = LOOPBACK_IFINDEX,
36 .flowlabel = (* (__be32 *) iph) & IPV6_FLOWINFO_MASK, 37 .flowlabel = (* (__be32 *) iph) & IPV6_FLOWINFO_MASK,
37 .flowi6_proto = iph->nexthdr, 38 .flowi6_proto = iph->nexthdr,
38 .daddr = iph->saddr, 39 .daddr = iph->saddr,
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 5015c50a5ba7..004fffb6c221 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -84,9 +84,9 @@ static void ip6_dst_ifdown(struct dst_entry *,
84static int ip6_dst_gc(struct dst_ops *ops); 84static int ip6_dst_gc(struct dst_ops *ops);
85 85
86static int ip6_pkt_discard(struct sk_buff *skb); 86static int ip6_pkt_discard(struct sk_buff *skb);
87static int ip6_pkt_discard_out(struct sk_buff *skb); 87static int ip6_pkt_discard_out(struct sock *sk, struct sk_buff *skb);
88static int ip6_pkt_prohibit(struct sk_buff *skb); 88static int ip6_pkt_prohibit(struct sk_buff *skb);
89static int ip6_pkt_prohibit_out(struct sk_buff *skb); 89static int ip6_pkt_prohibit_out(struct sock *sk, struct sk_buff *skb);
90static void ip6_link_failure(struct sk_buff *skb); 90static void ip6_link_failure(struct sk_buff *skb);
91static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, 91static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
92 struct sk_buff *skb, u32 mtu); 92 struct sk_buff *skb, u32 mtu);
@@ -290,7 +290,7 @@ static const struct rt6_info ip6_blk_hole_entry_template = {
290 .obsolete = DST_OBSOLETE_FORCE_CHK, 290 .obsolete = DST_OBSOLETE_FORCE_CHK,
291 .error = -EINVAL, 291 .error = -EINVAL,
292 .input = dst_discard, 292 .input = dst_discard,
293 .output = dst_discard, 293 .output = dst_discard_sk,
294 }, 294 },
295 .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), 295 .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP),
296 .rt6i_protocol = RTPROT_KERNEL, 296 .rt6i_protocol = RTPROT_KERNEL,
@@ -1058,7 +1058,7 @@ struct dst_entry *ip6_blackhole_route(struct net *net, struct dst_entry *dst_ori
1058 1058
1059 new->__use = 1; 1059 new->__use = 1;
1060 new->input = dst_discard; 1060 new->input = dst_discard;
1061 new->output = dst_discard; 1061 new->output = dst_discard_sk;
1062 1062
1063 if (dst_metrics_read_only(&ort->dst)) 1063 if (dst_metrics_read_only(&ort->dst))
1064 new->_metrics = ort->dst._metrics; 1064 new->_metrics = ort->dst._metrics;
@@ -1273,6 +1273,7 @@ void ip6_redirect(struct sk_buff *skb, struct net *net, int oif, u32 mark)
1273 struct flowi6 fl6; 1273 struct flowi6 fl6;
1274 1274
1275 memset(&fl6, 0, sizeof(fl6)); 1275 memset(&fl6, 0, sizeof(fl6));
1276 fl6.flowi6_iif = LOOPBACK_IFINDEX;
1276 fl6.flowi6_oif = oif; 1277 fl6.flowi6_oif = oif;
1277 fl6.flowi6_mark = mark; 1278 fl6.flowi6_mark = mark;
1278 fl6.daddr = iph->daddr; 1279 fl6.daddr = iph->daddr;
@@ -1294,6 +1295,7 @@ void ip6_redirect_no_header(struct sk_buff *skb, struct net *net, int oif,
1294 struct flowi6 fl6; 1295 struct flowi6 fl6;
1295 1296
1296 memset(&fl6, 0, sizeof(fl6)); 1297 memset(&fl6, 0, sizeof(fl6));
1298 fl6.flowi6_iif = LOOPBACK_IFINDEX;
1297 fl6.flowi6_oif = oif; 1299 fl6.flowi6_oif = oif;
1298 fl6.flowi6_mark = mark; 1300 fl6.flowi6_mark = mark;
1299 fl6.daddr = msg->dest; 1301 fl6.daddr = msg->dest;
@@ -1338,7 +1340,7 @@ static unsigned int ip6_mtu(const struct dst_entry *dst)
1338 unsigned int mtu = dst_metric_raw(dst, RTAX_MTU); 1340 unsigned int mtu = dst_metric_raw(dst, RTAX_MTU);
1339 1341
1340 if (mtu) 1342 if (mtu)
1341 return mtu; 1343 goto out;
1342 1344
1343 mtu = IPV6_MIN_MTU; 1345 mtu = IPV6_MIN_MTU;
1344 1346
@@ -1348,7 +1350,8 @@ static unsigned int ip6_mtu(const struct dst_entry *dst)
1348 mtu = idev->cnf.mtu6; 1350 mtu = idev->cnf.mtu6;
1349 rcu_read_unlock(); 1351 rcu_read_unlock();
1350 1352
1351 return mtu; 1353out:
1354 return min_t(unsigned int, mtu, IP6_MAX_MTU);
1352} 1355}
1353 1356
1354static struct dst_entry *icmp6_dst_gc_list; 1357static struct dst_entry *icmp6_dst_gc_list;
@@ -1576,7 +1579,7 @@ int ip6_route_add(struct fib6_config *cfg)
1576 switch (cfg->fc_type) { 1579 switch (cfg->fc_type) {
1577 case RTN_BLACKHOLE: 1580 case RTN_BLACKHOLE:
1578 rt->dst.error = -EINVAL; 1581 rt->dst.error = -EINVAL;
1579 rt->dst.output = dst_discard; 1582 rt->dst.output = dst_discard_sk;
1580 rt->dst.input = dst_discard; 1583 rt->dst.input = dst_discard;
1581 break; 1584 break;
1582 case RTN_PROHIBIT: 1585 case RTN_PROHIBIT:
@@ -2128,7 +2131,7 @@ static int ip6_pkt_discard(struct sk_buff *skb)
2128 return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_INNOROUTES); 2131 return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_INNOROUTES);
2129} 2132}
2130 2133
2131static int ip6_pkt_discard_out(struct sk_buff *skb) 2134static int ip6_pkt_discard_out(struct sock *sk, struct sk_buff *skb)
2132{ 2135{
2133 skb->dev = skb_dst(skb)->dev; 2136 skb->dev = skb_dst(skb)->dev;
2134 return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_OUTNOROUTES); 2137 return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_OUTNOROUTES);
@@ -2139,7 +2142,7 @@ static int ip6_pkt_prohibit(struct sk_buff *skb)
2139 return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_INNOROUTES); 2142 return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_INNOROUTES);
2140} 2143}
2141 2144
2142static int ip6_pkt_prohibit_out(struct sk_buff *skb) 2145static int ip6_pkt_prohibit_out(struct sock *sk, struct sk_buff *skb)
2143{ 2146{
2144 skb->dev = skb_dst(skb)->dev; 2147 skb->dev = skb_dst(skb)->dev;
2145 return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); 2148 return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index 1693c8d885f0..e5a453ca302e 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -974,8 +974,9 @@ static netdev_tx_t ipip6_tunnel_xmit(struct sk_buff *skb,
974 goto out; 974 goto out;
975 } 975 }
976 976
977 err = iptunnel_xmit(rt, skb, fl4.saddr, fl4.daddr, IPPROTO_IPV6, tos, 977 err = iptunnel_xmit(skb->sk, rt, skb, fl4.saddr, fl4.daddr,
978 ttl, df, !net_eq(tunnel->net, dev_net(dev))); 978 IPPROTO_IPV6, tos, ttl, df,
979 !net_eq(tunnel->net, dev_net(dev)));
979 iptunnel_xmit_stats(err, &dev->stats, dev->tstats); 980 iptunnel_xmit_stats(err, &dev->stats, dev->tstats);
980 return NETDEV_TX_OK; 981 return NETDEV_TX_OK;
981 982
@@ -1126,8 +1127,8 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
1126 int err = 0; 1127 int err = 0;
1127 struct ip_tunnel_parm p; 1128 struct ip_tunnel_parm p;
1128 struct ip_tunnel_prl prl; 1129 struct ip_tunnel_prl prl;
1129 struct ip_tunnel *t; 1130 struct ip_tunnel *t = netdev_priv(dev);
1130 struct net *net = dev_net(dev); 1131 struct net *net = t->net;
1131 struct sit_net *sitn = net_generic(net, sit_net_id); 1132 struct sit_net *sitn = net_generic(net, sit_net_id);
1132#ifdef CONFIG_IPV6_SIT_6RD 1133#ifdef CONFIG_IPV6_SIT_6RD
1133 struct ip_tunnel_6rd ip6rd; 1134 struct ip_tunnel_6rd ip6rd;
@@ -1138,16 +1139,15 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
1138#ifdef CONFIG_IPV6_SIT_6RD 1139#ifdef CONFIG_IPV6_SIT_6RD
1139 case SIOCGET6RD: 1140 case SIOCGET6RD:
1140#endif 1141#endif
1141 t = NULL;
1142 if (dev == sitn->fb_tunnel_dev) { 1142 if (dev == sitn->fb_tunnel_dev) {
1143 if (copy_from_user(&p, ifr->ifr_ifru.ifru_data, sizeof(p))) { 1143 if (copy_from_user(&p, ifr->ifr_ifru.ifru_data, sizeof(p))) {
1144 err = -EFAULT; 1144 err = -EFAULT;
1145 break; 1145 break;
1146 } 1146 }
1147 t = ipip6_tunnel_locate(net, &p, 0); 1147 t = ipip6_tunnel_locate(net, &p, 0);
1148 if (t == NULL)
1149 t = netdev_priv(dev);
1148 } 1150 }
1149 if (t == NULL)
1150 t = netdev_priv(dev);
1151 1151
1152 err = -EFAULT; 1152 err = -EFAULT;
1153 if (cmd == SIOCGETTUNNEL) { 1153 if (cmd == SIOCGETTUNNEL) {
@@ -1243,9 +1243,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
1243 err = -EINVAL; 1243 err = -EINVAL;
1244 if (dev == sitn->fb_tunnel_dev) 1244 if (dev == sitn->fb_tunnel_dev)
1245 goto done; 1245 goto done;
1246 err = -ENOENT;
1247 if (!(t = netdev_priv(dev)))
1248 goto done;
1249 err = ipip6_tunnel_get_prl(t, ifr->ifr_ifru.ifru_data); 1246 err = ipip6_tunnel_get_prl(t, ifr->ifr_ifru.ifru_data);
1250 break; 1247 break;
1251 1248
@@ -1261,9 +1258,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
1261 err = -EFAULT; 1258 err = -EFAULT;
1262 if (copy_from_user(&prl, ifr->ifr_ifru.ifru_data, sizeof(prl))) 1259 if (copy_from_user(&prl, ifr->ifr_ifru.ifru_data, sizeof(prl)))
1263 goto done; 1260 goto done;
1264 err = -ENOENT;
1265 if (!(t = netdev_priv(dev)))
1266 goto done;
1267 1261
1268 switch (cmd) { 1262 switch (cmd) {
1269 case SIOCDELPRL: 1263 case SIOCDELPRL:
@@ -1291,8 +1285,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
1291 sizeof(ip6rd))) 1285 sizeof(ip6rd)))
1292 goto done; 1286 goto done;
1293 1287
1294 t = netdev_priv(dev);
1295
1296 if (cmd != SIOCDEL6RD) { 1288 if (cmd != SIOCDEL6RD) {
1297 err = ipip6_tunnel_update_6rd(t, &ip6rd); 1289 err = ipip6_tunnel_update_6rd(t, &ip6rd);
1298 if (err < 0) 1290 if (err < 0)
diff --git a/net/ipv6/xfrm6_output.c b/net/ipv6/xfrm6_output.c
index 6cd625e37706..19ef329bdbf8 100644
--- a/net/ipv6/xfrm6_output.c
+++ b/net/ipv6/xfrm6_output.c
@@ -163,7 +163,7 @@ static int __xfrm6_output(struct sk_buff *skb)
163 return x->outer_mode->afinfo->output_finish(skb); 163 return x->outer_mode->afinfo->output_finish(skb);
164} 164}
165 165
166int xfrm6_output(struct sk_buff *skb) 166int xfrm6_output(struct sock *sk, struct sk_buff *skb)
167{ 167{
168 return NF_HOOK(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL, 168 return NF_HOOK(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL,
169 skb_dst(skb)->dev, __xfrm6_output); 169 skb_dst(skb)->dev, __xfrm6_output);
diff --git a/net/l2tp/l2tp_core.c b/net/l2tp/l2tp_core.c
index 47f7a5490555..a4e37d7158dc 100644
--- a/net/l2tp/l2tp_core.c
+++ b/net/l2tp/l2tp_core.c
@@ -1131,10 +1131,10 @@ static int l2tp_xmit_core(struct l2tp_session *session, struct sk_buff *skb,
1131 skb->local_df = 1; 1131 skb->local_df = 1;
1132#if IS_ENABLED(CONFIG_IPV6) 1132#if IS_ENABLED(CONFIG_IPV6)
1133 if (tunnel->sock->sk_family == PF_INET6 && !tunnel->v4mapped) 1133 if (tunnel->sock->sk_family == PF_INET6 && !tunnel->v4mapped)
1134 error = inet6_csk_xmit(skb, NULL); 1134 error = inet6_csk_xmit(tunnel->sock, skb, NULL);
1135 else 1135 else
1136#endif 1136#endif
1137 error = ip_queue_xmit(skb, fl); 1137 error = ip_queue_xmit(tunnel->sock, skb, fl);
1138 1138
1139 /* Update stats */ 1139 /* Update stats */
1140 if (error >= 0) { 1140 if (error >= 0) {
diff --git a/net/l2tp/l2tp_ip.c b/net/l2tp/l2tp_ip.c
index 0b44d855269c..3397fe6897c0 100644
--- a/net/l2tp/l2tp_ip.c
+++ b/net/l2tp/l2tp_ip.c
@@ -487,7 +487,7 @@ static int l2tp_ip_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *m
487 487
488xmit: 488xmit:
489 /* Queue the packet to IP for output */ 489 /* Queue the packet to IP for output */
490 rc = ip_queue_xmit(skb, &inet->cork.fl); 490 rc = ip_queue_xmit(sk, skb, &inet->cork.fl);
491 rcu_read_unlock(); 491 rcu_read_unlock();
492 492
493error: 493error:
diff --git a/net/mac80211/chan.c b/net/mac80211/chan.c
index bd1fd8ea5105..75b5dd2c9267 100644
--- a/net/mac80211/chan.c
+++ b/net/mac80211/chan.c
@@ -249,7 +249,7 @@ ieee80211_new_chanctx(struct ieee80211_local *local,
249 249
250 if (!local->use_chanctx) { 250 if (!local->use_chanctx) {
251 local->_oper_chandef = *chandef; 251 local->_oper_chandef = *chandef;
252 ieee80211_hw_config(local, 0); 252 ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
253 } else { 253 } else {
254 err = drv_add_chanctx(local, ctx); 254 err = drv_add_chanctx(local, ctx);
255 if (err) { 255 if (err) {
@@ -286,7 +286,7 @@ static void ieee80211_free_chanctx(struct ieee80211_local *local,
286 check_single_channel = true; 286 check_single_channel = true;
287 local->hw.conf.radar_enabled = false; 287 local->hw.conf.radar_enabled = false;
288 288
289 ieee80211_hw_config(local, 0); 289 ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
290 } else { 290 } else {
291 drv_remove_chanctx(local, ctx); 291 drv_remove_chanctx(local, ctx);
292 } 292 }
@@ -492,6 +492,13 @@ void ieee80211_recalc_smps_chanctx(struct ieee80211_local *local,
492 rx_chains_static = max(rx_chains_static, needed_static); 492 rx_chains_static = max(rx_chains_static, needed_static);
493 rx_chains_dynamic = max(rx_chains_dynamic, needed_dynamic); 493 rx_chains_dynamic = max(rx_chains_dynamic, needed_dynamic);
494 } 494 }
495
496 /* Disable SMPS for the monitor interface */
497 sdata = rcu_dereference(local->monitor_sdata);
498 if (sdata &&
499 rcu_access_pointer(sdata->vif.chanctx_conf) == &chanctx->conf)
500 rx_chains_dynamic = rx_chains_static = local->rx_chains;
501
495 rcu_read_unlock(); 502 rcu_read_unlock();
496 503
497 if (!local->use_chanctx) { 504 if (!local->use_chanctx) {
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index b055f6a55c68..4c1bf61bc778 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -148,6 +148,8 @@ static u32 ieee80211_hw_conf_chan(struct ieee80211_local *local)
148 list_for_each_entry_rcu(sdata, &local->interfaces, list) { 148 list_for_each_entry_rcu(sdata, &local->interfaces, list) {
149 if (!rcu_access_pointer(sdata->vif.chanctx_conf)) 149 if (!rcu_access_pointer(sdata->vif.chanctx_conf))
150 continue; 150 continue;
151 if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
152 continue;
151 power = min(power, sdata->vif.bss_conf.txpower); 153 power = min(power, sdata->vif.bss_conf.txpower);
152 } 154 }
153 rcu_read_unlock(); 155 rcu_read_unlock();
@@ -199,7 +201,7 @@ void ieee80211_bss_info_change_notify(struct ieee80211_sub_if_data *sdata,
199{ 201{
200 struct ieee80211_local *local = sdata->local; 202 struct ieee80211_local *local = sdata->local;
201 203
202 if (!changed) 204 if (!changed || sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
203 return; 205 return;
204 206
205 drv_bss_info_changed(local, sdata, &sdata->vif.bss_conf, changed); 207 drv_bss_info_changed(local, sdata, &sdata->vif.bss_conf, changed);
diff --git a/net/mac80211/offchannel.c b/net/mac80211/offchannel.c
index 0c2a29484c07..6fb38558a5e6 100644
--- a/net/mac80211/offchannel.c
+++ b/net/mac80211/offchannel.c
@@ -355,6 +355,7 @@ void ieee80211_sw_roc_work(struct work_struct *work)
355 struct ieee80211_roc_work *dep; 355 struct ieee80211_roc_work *dep;
356 356
357 /* start this ROC */ 357 /* start this ROC */
358 ieee80211_offchannel_stop_vifs(local);
358 359
359 /* switch channel etc */ 360 /* switch channel etc */
360 ieee80211_recalc_idle(local); 361 ieee80211_recalc_idle(local);
diff --git a/net/mac80211/status.c b/net/mac80211/status.c
index e6e574a307c8..00ba90b02ab2 100644
--- a/net/mac80211/status.c
+++ b/net/mac80211/status.c
@@ -618,6 +618,7 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
618 sta, true, acked); 618 sta, true, acked);
619 619
620 if ((local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL) && 620 if ((local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL) &&
621 (ieee80211_is_data(hdr->frame_control)) &&
621 (rates_idx != -1)) 622 (rates_idx != -1))
622 sta->last_tx_rate = info->status.rates[rates_idx]; 623 sta->last_tx_rate = info->status.rates[rates_idx];
623 624
diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
index 6dba48efe01e..75421f2ba8be 100644
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -1795,6 +1795,7 @@ int nf_conntrack_init_net(struct net *net)
1795 int cpu; 1795 int cpu;
1796 1796
1797 atomic_set(&net->ct.count, 0); 1797 atomic_set(&net->ct.count, 0);
1798 seqcount_init(&net->ct.generation);
1798 1799
1799 net->ct.pcpu_lists = alloc_percpu(struct ct_pcpu); 1800 net->ct.pcpu_lists = alloc_percpu(struct ct_pcpu);
1800 if (!net->ct.pcpu_lists) 1801 if (!net->ct.pcpu_lists)
diff --git a/net/netfilter/nf_conntrack_pptp.c b/net/netfilter/nf_conntrack_pptp.c
index 7bd03decd36c..825c3e3f8305 100644
--- a/net/netfilter/nf_conntrack_pptp.c
+++ b/net/netfilter/nf_conntrack_pptp.c
@@ -605,32 +605,14 @@ static struct nf_conntrack_helper pptp __read_mostly = {
605 .expect_policy = &pptp_exp_policy, 605 .expect_policy = &pptp_exp_policy,
606}; 606};
607 607
608static void nf_conntrack_pptp_net_exit(struct net *net)
609{
610 nf_ct_gre_keymap_flush(net);
611}
612
613static struct pernet_operations nf_conntrack_pptp_net_ops = {
614 .exit = nf_conntrack_pptp_net_exit,
615};
616
617static int __init nf_conntrack_pptp_init(void) 608static int __init nf_conntrack_pptp_init(void)
618{ 609{
619 int rv; 610 return nf_conntrack_helper_register(&pptp);
620
621 rv = nf_conntrack_helper_register(&pptp);
622 if (rv < 0)
623 return rv;
624 rv = register_pernet_subsys(&nf_conntrack_pptp_net_ops);
625 if (rv < 0)
626 nf_conntrack_helper_unregister(&pptp);
627 return rv;
628} 611}
629 612
630static void __exit nf_conntrack_pptp_fini(void) 613static void __exit nf_conntrack_pptp_fini(void)
631{ 614{
632 nf_conntrack_helper_unregister(&pptp); 615 nf_conntrack_helper_unregister(&pptp);
633 unregister_pernet_subsys(&nf_conntrack_pptp_net_ops);
634} 616}
635 617
636module_init(nf_conntrack_pptp_init); 618module_init(nf_conntrack_pptp_init);
diff --git a/net/netfilter/nf_conntrack_proto_gre.c b/net/netfilter/nf_conntrack_proto_gre.c
index 9d9c0dade602..d5665739e3b1 100644
--- a/net/netfilter/nf_conntrack_proto_gre.c
+++ b/net/netfilter/nf_conntrack_proto_gre.c
@@ -66,7 +66,7 @@ static inline struct netns_proto_gre *gre_pernet(struct net *net)
66 return net_generic(net, proto_gre_net_id); 66 return net_generic(net, proto_gre_net_id);
67} 67}
68 68
69void nf_ct_gre_keymap_flush(struct net *net) 69static void nf_ct_gre_keymap_flush(struct net *net)
70{ 70{
71 struct netns_proto_gre *net_gre = gre_pernet(net); 71 struct netns_proto_gre *net_gre = gre_pernet(net);
72 struct nf_ct_gre_keymap *km, *tmp; 72 struct nf_ct_gre_keymap *km, *tmp;
@@ -78,7 +78,6 @@ void nf_ct_gre_keymap_flush(struct net *net)
78 } 78 }
79 write_unlock_bh(&net_gre->keymap_lock); 79 write_unlock_bh(&net_gre->keymap_lock);
80} 80}
81EXPORT_SYMBOL(nf_ct_gre_keymap_flush);
82 81
83static inline int gre_key_cmpfn(const struct nf_ct_gre_keymap *km, 82static inline int gre_key_cmpfn(const struct nf_ct_gre_keymap *km,
84 const struct nf_conntrack_tuple *t) 83 const struct nf_conntrack_tuple *t)
diff --git a/net/netfilter/nf_tables_core.c b/net/netfilter/nf_tables_core.c
index 90998a6ff8b9..804105391b9a 100644
--- a/net/netfilter/nf_tables_core.c
+++ b/net/netfilter/nf_tables_core.c
@@ -25,9 +25,8 @@ static void nft_cmp_fast_eval(const struct nft_expr *expr,
25 struct nft_data data[NFT_REG_MAX + 1]) 25 struct nft_data data[NFT_REG_MAX + 1])
26{ 26{
27 const struct nft_cmp_fast_expr *priv = nft_expr_priv(expr); 27 const struct nft_cmp_fast_expr *priv = nft_expr_priv(expr);
28 u32 mask; 28 u32 mask = nft_cmp_fast_mask(priv->len);
29 29
30 mask = ~0U >> (sizeof(priv->data) * BITS_PER_BYTE - priv->len);
31 if ((data[priv->sreg].data[0] & mask) == priv->data) 30 if ((data[priv->sreg].data[0] & mask) == priv->data)
32 return; 31 return;
33 data[NFT_REG_VERDICT].verdict = NFT_BREAK; 32 data[NFT_REG_VERDICT].verdict = NFT_BREAK;
diff --git a/net/netfilter/nfnetlink.c b/net/netfilter/nfnetlink.c
index e8138da4c14f..e009087620e3 100644
--- a/net/netfilter/nfnetlink.c
+++ b/net/netfilter/nfnetlink.c
@@ -368,14 +368,13 @@ done:
368static void nfnetlink_rcv(struct sk_buff *skb) 368static void nfnetlink_rcv(struct sk_buff *skb)
369{ 369{
370 struct nlmsghdr *nlh = nlmsg_hdr(skb); 370 struct nlmsghdr *nlh = nlmsg_hdr(skb);
371 struct net *net = sock_net(skb->sk);
372 int msglen; 371 int msglen;
373 372
374 if (nlh->nlmsg_len < NLMSG_HDRLEN || 373 if (nlh->nlmsg_len < NLMSG_HDRLEN ||
375 skb->len < nlh->nlmsg_len) 374 skb->len < nlh->nlmsg_len)
376 return; 375 return;
377 376
378 if (!ns_capable(net->user_ns, CAP_NET_ADMIN)) { 377 if (!netlink_net_capable(skb, CAP_NET_ADMIN)) {
379 netlink_ack(skb, nlh, -EPERM); 378 netlink_ack(skb, nlh, -EPERM);
380 return; 379 return;
381 } 380 }
diff --git a/net/netfilter/nft_cmp.c b/net/netfilter/nft_cmp.c
index 954925db414d..e2b3f51c81f1 100644
--- a/net/netfilter/nft_cmp.c
+++ b/net/netfilter/nft_cmp.c
@@ -128,7 +128,7 @@ static int nft_cmp_fast_init(const struct nft_ctx *ctx,
128 BUG_ON(err < 0); 128 BUG_ON(err < 0);
129 desc.len *= BITS_PER_BYTE; 129 desc.len *= BITS_PER_BYTE;
130 130
131 mask = ~0U >> (sizeof(priv->data) * BITS_PER_BYTE - desc.len); 131 mask = nft_cmp_fast_mask(desc.len);
132 priv->data = data.data[0] & mask; 132 priv->data = data.data[0] & mask;
133 priv->len = desc.len; 133 priv->len = desc.len;
134 return 0; 134 return 0;
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 894cda0206bb..81dca96d2be6 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -1360,7 +1360,72 @@ retry:
1360 return err; 1360 return err;
1361} 1361}
1362 1362
1363static inline int netlink_capable(const struct socket *sock, unsigned int flag) 1363/**
1364 * __netlink_ns_capable - General netlink message capability test
1365 * @nsp: NETLINK_CB of the socket buffer holding a netlink command from userspace.
1366 * @user_ns: The user namespace of the capability to use
1367 * @cap: The capability to use
1368 *
1369 * Test to see if the opener of the socket we received the message
1370 * from had when the netlink socket was created and the sender of the
1371 * message has has the capability @cap in the user namespace @user_ns.
1372 */
1373bool __netlink_ns_capable(const struct netlink_skb_parms *nsp,
1374 struct user_namespace *user_ns, int cap)
1375{
1376 return sk_ns_capable(nsp->sk, user_ns, cap);
1377}
1378EXPORT_SYMBOL(__netlink_ns_capable);
1379
1380/**
1381 * netlink_ns_capable - General netlink message capability test
1382 * @skb: socket buffer holding a netlink command from userspace
1383 * @user_ns: The user namespace of the capability to use
1384 * @cap: The capability to use
1385 *
1386 * Test to see if the opener of the socket we received the message
1387 * from had when the netlink socket was created and the sender of the
1388 * message has has the capability @cap in the user namespace @user_ns.
1389 */
1390bool netlink_ns_capable(const struct sk_buff *skb,
1391 struct user_namespace *user_ns, int cap)
1392{
1393 return __netlink_ns_capable(&NETLINK_CB(skb), user_ns, cap);
1394}
1395EXPORT_SYMBOL(netlink_ns_capable);
1396
1397/**
1398 * netlink_capable - Netlink global message capability test
1399 * @skb: socket buffer holding a netlink command from userspace
1400 * @cap: The capability to use
1401 *
1402 * Test to see if the opener of the socket we received the message
1403 * from had when the netlink socket was created and the sender of the
1404 * message has has the capability @cap in all user namespaces.
1405 */
1406bool netlink_capable(const struct sk_buff *skb, int cap)
1407{
1408 return netlink_ns_capable(skb, &init_user_ns, cap);
1409}
1410EXPORT_SYMBOL(netlink_capable);
1411
1412/**
1413 * netlink_net_capable - Netlink network namespace message capability test
1414 * @skb: socket buffer holding a netlink command from userspace
1415 * @cap: The capability to use
1416 *
1417 * Test to see if the opener of the socket we received the message
1418 * from had when the netlink socket was created and the sender of the
1419 * message has has the capability @cap over the network namespace of
1420 * the socket we received the message from.
1421 */
1422bool netlink_net_capable(const struct sk_buff *skb, int cap)
1423{
1424 return netlink_ns_capable(skb, sock_net(skb->sk)->user_ns, cap);
1425}
1426EXPORT_SYMBOL(netlink_net_capable);
1427
1428static inline int netlink_allowed(const struct socket *sock, unsigned int flag)
1364{ 1429{
1365 return (nl_table[sock->sk->sk_protocol].flags & flag) || 1430 return (nl_table[sock->sk->sk_protocol].flags & flag) ||
1366 ns_capable(sock_net(sock->sk)->user_ns, CAP_NET_ADMIN); 1431 ns_capable(sock_net(sock->sk)->user_ns, CAP_NET_ADMIN);
@@ -1428,7 +1493,7 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
1428 1493
1429 /* Only superuser is allowed to listen multicasts */ 1494 /* Only superuser is allowed to listen multicasts */
1430 if (nladdr->nl_groups) { 1495 if (nladdr->nl_groups) {
1431 if (!netlink_capable(sock, NL_CFG_F_NONROOT_RECV)) 1496 if (!netlink_allowed(sock, NL_CFG_F_NONROOT_RECV))
1432 return -EPERM; 1497 return -EPERM;
1433 err = netlink_realloc_groups(sk); 1498 err = netlink_realloc_groups(sk);
1434 if (err) 1499 if (err)
@@ -1490,7 +1555,7 @@ static int netlink_connect(struct socket *sock, struct sockaddr *addr,
1490 return -EINVAL; 1555 return -EINVAL;
1491 1556
1492 if ((nladdr->nl_groups || nladdr->nl_pid) && 1557 if ((nladdr->nl_groups || nladdr->nl_pid) &&
1493 !netlink_capable(sock, NL_CFG_F_NONROOT_SEND)) 1558 !netlink_allowed(sock, NL_CFG_F_NONROOT_SEND))
1494 return -EPERM; 1559 return -EPERM;
1495 1560
1496 if (!nlk->portid) 1561 if (!nlk->portid)
@@ -2096,7 +2161,7 @@ static int netlink_setsockopt(struct socket *sock, int level, int optname,
2096 break; 2161 break;
2097 case NETLINK_ADD_MEMBERSHIP: 2162 case NETLINK_ADD_MEMBERSHIP:
2098 case NETLINK_DROP_MEMBERSHIP: { 2163 case NETLINK_DROP_MEMBERSHIP: {
2099 if (!netlink_capable(sock, NL_CFG_F_NONROOT_RECV)) 2164 if (!netlink_allowed(sock, NL_CFG_F_NONROOT_RECV))
2100 return -EPERM; 2165 return -EPERM;
2101 err = netlink_realloc_groups(sk); 2166 err = netlink_realloc_groups(sk);
2102 if (err) 2167 if (err)
@@ -2247,7 +2312,7 @@ static int netlink_sendmsg(struct kiocb *kiocb, struct socket *sock,
2247 dst_group = ffs(addr->nl_groups); 2312 dst_group = ffs(addr->nl_groups);
2248 err = -EPERM; 2313 err = -EPERM;
2249 if ((dst_group || dst_portid) && 2314 if ((dst_group || dst_portid) &&
2250 !netlink_capable(sock, NL_CFG_F_NONROOT_SEND)) 2315 !netlink_allowed(sock, NL_CFG_F_NONROOT_SEND))
2251 goto out; 2316 goto out;
2252 } else { 2317 } else {
2253 dst_portid = nlk->dst_portid; 2318 dst_portid = nlk->dst_portid;
diff --git a/net/netlink/genetlink.c b/net/netlink/genetlink.c
index b1dcdb932a86..a3ba3ca0ff92 100644
--- a/net/netlink/genetlink.c
+++ b/net/netlink/genetlink.c
@@ -561,7 +561,7 @@ static int genl_family_rcv_msg(struct genl_family *family,
561 return -EOPNOTSUPP; 561 return -EOPNOTSUPP;
562 562
563 if ((ops->flags & GENL_ADMIN_PERM) && 563 if ((ops->flags & GENL_ADMIN_PERM) &&
564 !capable(CAP_NET_ADMIN)) 564 !netlink_capable(skb, CAP_NET_ADMIN))
565 return -EPERM; 565 return -EPERM;
566 566
567 if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) { 567 if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
diff --git a/net/openvswitch/vport-gre.c b/net/openvswitch/vport-gre.c
index a3d6951602db..ebb6e2442554 100644
--- a/net/openvswitch/vport-gre.c
+++ b/net/openvswitch/vport-gre.c
@@ -174,7 +174,7 @@ static int gre_tnl_send(struct vport *vport, struct sk_buff *skb)
174 174
175 skb->local_df = 1; 175 skb->local_df = 1;
176 176
177 return iptunnel_xmit(rt, skb, fl.saddr, 177 return iptunnel_xmit(skb->sk, rt, skb, fl.saddr,
178 OVS_CB(skb)->tun_key->ipv4_dst, IPPROTO_GRE, 178 OVS_CB(skb)->tun_key->ipv4_dst, IPPROTO_GRE,
179 OVS_CB(skb)->tun_key->ipv4_tos, 179 OVS_CB(skb)->tun_key->ipv4_tos,
180 OVS_CB(skb)->tun_key->ipv4_ttl, df, false); 180 OVS_CB(skb)->tun_key->ipv4_ttl, df, false);
diff --git a/net/packet/diag.c b/net/packet/diag.c
index 533ce4ff108a..92f2c7107eec 100644
--- a/net/packet/diag.c
+++ b/net/packet/diag.c
@@ -128,6 +128,7 @@ static int pdiag_put_fanout(struct packet_sock *po, struct sk_buff *nlskb)
128 128
129static int sk_diag_fill(struct sock *sk, struct sk_buff *skb, 129static int sk_diag_fill(struct sock *sk, struct sk_buff *skb,
130 struct packet_diag_req *req, 130 struct packet_diag_req *req,
131 bool may_report_filterinfo,
131 struct user_namespace *user_ns, 132 struct user_namespace *user_ns,
132 u32 portid, u32 seq, u32 flags, int sk_ino) 133 u32 portid, u32 seq, u32 flags, int sk_ino)
133{ 134{
@@ -172,7 +173,8 @@ static int sk_diag_fill(struct sock *sk, struct sk_buff *skb,
172 goto out_nlmsg_trim; 173 goto out_nlmsg_trim;
173 174
174 if ((req->pdiag_show & PACKET_SHOW_FILTER) && 175 if ((req->pdiag_show & PACKET_SHOW_FILTER) &&
175 sock_diag_put_filterinfo(user_ns, sk, skb, PACKET_DIAG_FILTER)) 176 sock_diag_put_filterinfo(may_report_filterinfo, sk, skb,
177 PACKET_DIAG_FILTER))
176 goto out_nlmsg_trim; 178 goto out_nlmsg_trim;
177 179
178 return nlmsg_end(skb, nlh); 180 return nlmsg_end(skb, nlh);
@@ -188,9 +190,11 @@ static int packet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb)
188 struct packet_diag_req *req; 190 struct packet_diag_req *req;
189 struct net *net; 191 struct net *net;
190 struct sock *sk; 192 struct sock *sk;
193 bool may_report_filterinfo;
191 194
192 net = sock_net(skb->sk); 195 net = sock_net(skb->sk);
193 req = nlmsg_data(cb->nlh); 196 req = nlmsg_data(cb->nlh);
197 may_report_filterinfo = netlink_net_capable(cb->skb, CAP_NET_ADMIN);
194 198
195 mutex_lock(&net->packet.sklist_lock); 199 mutex_lock(&net->packet.sklist_lock);
196 sk_for_each(sk, &net->packet.sklist) { 200 sk_for_each(sk, &net->packet.sklist) {
@@ -200,6 +204,7 @@ static int packet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb)
200 goto next; 204 goto next;
201 205
202 if (sk_diag_fill(sk, skb, req, 206 if (sk_diag_fill(sk, skb, req,
207 may_report_filterinfo,
203 sk_user_ns(NETLINK_CB(cb->skb).sk), 208 sk_user_ns(NETLINK_CB(cb->skb).sk),
204 NETLINK_CB(cb->skb).portid, 209 NETLINK_CB(cb->skb).portid,
205 cb->nlh->nlmsg_seq, NLM_F_MULTI, 210 cb->nlh->nlmsg_seq, NLM_F_MULTI,
diff --git a/net/phonet/pn_netlink.c b/net/phonet/pn_netlink.c
index dc15f4300808..b64151ade6b3 100644
--- a/net/phonet/pn_netlink.c
+++ b/net/phonet/pn_netlink.c
@@ -70,10 +70,10 @@ static int addr_doit(struct sk_buff *skb, struct nlmsghdr *nlh)
70 int err; 70 int err;
71 u8 pnaddr; 71 u8 pnaddr;
72 72
73 if (!capable(CAP_NET_ADMIN)) 73 if (!netlink_capable(skb, CAP_NET_ADMIN))
74 return -EPERM; 74 return -EPERM;
75 75
76 if (!capable(CAP_SYS_ADMIN)) 76 if (!netlink_capable(skb, CAP_SYS_ADMIN))
77 return -EPERM; 77 return -EPERM;
78 78
79 ASSERT_RTNL(); 79 ASSERT_RTNL();
@@ -233,10 +233,10 @@ static int route_doit(struct sk_buff *skb, struct nlmsghdr *nlh)
233 int err; 233 int err;
234 u8 dst; 234 u8 dst;
235 235
236 if (!capable(CAP_NET_ADMIN)) 236 if (!netlink_capable(skb, CAP_NET_ADMIN))
237 return -EPERM; 237 return -EPERM;
238 238
239 if (!capable(CAP_SYS_ADMIN)) 239 if (!netlink_capable(skb, CAP_SYS_ADMIN))
240 return -EPERM; 240 return -EPERM;
241 241
242 ASSERT_RTNL(); 242 ASSERT_RTNL();
diff --git a/net/sched/act_api.c b/net/sched/act_api.c
index 8a5ba5add4bc..648778aef1a2 100644
--- a/net/sched/act_api.c
+++ b/net/sched/act_api.c
@@ -948,7 +948,7 @@ static int tc_ctl_action(struct sk_buff *skb, struct nlmsghdr *n)
948 u32 portid = skb ? NETLINK_CB(skb).portid : 0; 948 u32 portid = skb ? NETLINK_CB(skb).portid : 0;
949 int ret = 0, ovr = 0; 949 int ret = 0, ovr = 0;
950 950
951 if ((n->nlmsg_type != RTM_GETACTION) && !capable(CAP_NET_ADMIN)) 951 if ((n->nlmsg_type != RTM_GETACTION) && !netlink_capable(skb, CAP_NET_ADMIN))
952 return -EPERM; 952 return -EPERM;
953 953
954 ret = nlmsg_parse(n, sizeof(struct tcamsg), tca, TCA_ACT_MAX, NULL); 954 ret = nlmsg_parse(n, sizeof(struct tcamsg), tca, TCA_ACT_MAX, NULL);
diff --git a/net/sched/cls_api.c b/net/sched/cls_api.c
index 29a30a14c315..bdbdb1a7920a 100644
--- a/net/sched/cls_api.c
+++ b/net/sched/cls_api.c
@@ -134,7 +134,7 @@ static int tc_ctl_tfilter(struct sk_buff *skb, struct nlmsghdr *n)
134 int err; 134 int err;
135 int tp_created = 0; 135 int tp_created = 0;
136 136
137 if ((n->nlmsg_type != RTM_GETTFILTER) && !capable(CAP_NET_ADMIN)) 137 if ((n->nlmsg_type != RTM_GETTFILTER) && !netlink_capable(skb, CAP_NET_ADMIN))
138 return -EPERM; 138 return -EPERM;
139 139
140replay: 140replay:
diff --git a/net/sched/sch_api.c b/net/sched/sch_api.c
index a0b84e0e22de..400769014bbd 100644
--- a/net/sched/sch_api.c
+++ b/net/sched/sch_api.c
@@ -1084,7 +1084,7 @@ static int tc_get_qdisc(struct sk_buff *skb, struct nlmsghdr *n)
1084 struct Qdisc *p = NULL; 1084 struct Qdisc *p = NULL;
1085 int err; 1085 int err;
1086 1086
1087 if ((n->nlmsg_type != RTM_GETQDISC) && !capable(CAP_NET_ADMIN)) 1087 if ((n->nlmsg_type != RTM_GETQDISC) && !netlink_capable(skb, CAP_NET_ADMIN))
1088 return -EPERM; 1088 return -EPERM;
1089 1089
1090 err = nlmsg_parse(n, sizeof(*tcm), tca, TCA_MAX, NULL); 1090 err = nlmsg_parse(n, sizeof(*tcm), tca, TCA_MAX, NULL);
@@ -1151,7 +1151,7 @@ static int tc_modify_qdisc(struct sk_buff *skb, struct nlmsghdr *n)
1151 struct Qdisc *q, *p; 1151 struct Qdisc *q, *p;
1152 int err; 1152 int err;
1153 1153
1154 if (!capable(CAP_NET_ADMIN)) 1154 if (!netlink_capable(skb, CAP_NET_ADMIN))
1155 return -EPERM; 1155 return -EPERM;
1156 1156
1157replay: 1157replay:
@@ -1490,7 +1490,7 @@ static int tc_ctl_tclass(struct sk_buff *skb, struct nlmsghdr *n)
1490 u32 qid; 1490 u32 qid;
1491 int err; 1491 int err;
1492 1492
1493 if ((n->nlmsg_type != RTM_GETTCLASS) && !capable(CAP_NET_ADMIN)) 1493 if ((n->nlmsg_type != RTM_GETTCLASS) && !netlink_capable(skb, CAP_NET_ADMIN))
1494 return -EPERM; 1494 return -EPERM;
1495 1495
1496 err = nlmsg_parse(n, sizeof(*tcm), tca, TCA_MAX, NULL); 1496 err = nlmsg_parse(n, sizeof(*tcm), tca, TCA_MAX, NULL);
diff --git a/net/sched/sch_hhf.c b/net/sched/sch_hhf.c
index edee03d922e2..6e957c3b9854 100644
--- a/net/sched/sch_hhf.c
+++ b/net/sched/sch_hhf.c
@@ -553,11 +553,6 @@ static int hhf_change(struct Qdisc *sch, struct nlattr *opt)
553 if (err < 0) 553 if (err < 0)
554 return err; 554 return err;
555 555
556 sch_tree_lock(sch);
557
558 if (tb[TCA_HHF_BACKLOG_LIMIT])
559 sch->limit = nla_get_u32(tb[TCA_HHF_BACKLOG_LIMIT]);
560
561 if (tb[TCA_HHF_QUANTUM]) 556 if (tb[TCA_HHF_QUANTUM])
562 new_quantum = nla_get_u32(tb[TCA_HHF_QUANTUM]); 557 new_quantum = nla_get_u32(tb[TCA_HHF_QUANTUM]);
563 558
@@ -567,6 +562,12 @@ static int hhf_change(struct Qdisc *sch, struct nlattr *opt)
567 non_hh_quantum = (u64)new_quantum * new_hhf_non_hh_weight; 562 non_hh_quantum = (u64)new_quantum * new_hhf_non_hh_weight;
568 if (non_hh_quantum > INT_MAX) 563 if (non_hh_quantum > INT_MAX)
569 return -EINVAL; 564 return -EINVAL;
565
566 sch_tree_lock(sch);
567
568 if (tb[TCA_HHF_BACKLOG_LIMIT])
569 sch->limit = nla_get_u32(tb[TCA_HHF_BACKLOG_LIMIT]);
570
570 q->quantum = new_quantum; 571 q->quantum = new_quantum;
571 q->hhf_non_hh_weight = new_hhf_non_hh_weight; 572 q->hhf_non_hh_weight = new_hhf_non_hh_weight;
572 573
diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 4f6d6f9d1274..39579c3e0d14 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -1395,35 +1395,44 @@ static inline bool sctp_peer_needs_update(struct sctp_association *asoc)
1395 return false; 1395 return false;
1396} 1396}
1397 1397
1398/* Update asoc's rwnd for the approximated state in the buffer, 1398/* Increase asoc's rwnd by len and send any window update SACK if needed. */
1399 * and check whether SACK needs to be sent. 1399void sctp_assoc_rwnd_increase(struct sctp_association *asoc, unsigned int len)
1400 */
1401void sctp_assoc_rwnd_update(struct sctp_association *asoc, bool update_peer)
1402{ 1400{
1403 int rx_count;
1404 struct sctp_chunk *sack; 1401 struct sctp_chunk *sack;
1405 struct timer_list *timer; 1402 struct timer_list *timer;
1406 1403
1407 if (asoc->ep->rcvbuf_policy) 1404 if (asoc->rwnd_over) {
1408 rx_count = atomic_read(&asoc->rmem_alloc); 1405 if (asoc->rwnd_over >= len) {
1409 else 1406 asoc->rwnd_over -= len;
1410 rx_count = atomic_read(&asoc->base.sk->sk_rmem_alloc); 1407 } else {
1408 asoc->rwnd += (len - asoc->rwnd_over);
1409 asoc->rwnd_over = 0;
1410 }
1411 } else {
1412 asoc->rwnd += len;
1413 }
1411 1414
1412 if ((asoc->base.sk->sk_rcvbuf - rx_count) > 0) 1415 /* If we had window pressure, start recovering it
1413 asoc->rwnd = (asoc->base.sk->sk_rcvbuf - rx_count) >> 1; 1416 * once our rwnd had reached the accumulated pressure
1414 else 1417 * threshold. The idea is to recover slowly, but up
1415 asoc->rwnd = 0; 1418 * to the initial advertised window.
1419 */
1420 if (asoc->rwnd_press && asoc->rwnd >= asoc->rwnd_press) {
1421 int change = min(asoc->pathmtu, asoc->rwnd_press);
1422 asoc->rwnd += change;
1423 asoc->rwnd_press -= change;
1424 }
1416 1425
1417 pr_debug("%s: asoc:%p rwnd=%u, rx_count=%d, sk_rcvbuf=%d\n", 1426 pr_debug("%s: asoc:%p rwnd increased by %d to (%u, %u) - %u\n",
1418 __func__, asoc, asoc->rwnd, rx_count, 1427 __func__, asoc, len, asoc->rwnd, asoc->rwnd_over,
1419 asoc->base.sk->sk_rcvbuf); 1428 asoc->a_rwnd);
1420 1429
1421 /* Send a window update SACK if the rwnd has increased by at least the 1430 /* Send a window update SACK if the rwnd has increased by at least the
1422 * minimum of the association's PMTU and half of the receive buffer. 1431 * minimum of the association's PMTU and half of the receive buffer.
1423 * The algorithm used is similar to the one described in 1432 * The algorithm used is similar to the one described in
1424 * Section 4.2.3.3 of RFC 1122. 1433 * Section 4.2.3.3 of RFC 1122.
1425 */ 1434 */
1426 if (update_peer && sctp_peer_needs_update(asoc)) { 1435 if (sctp_peer_needs_update(asoc)) {
1427 asoc->a_rwnd = asoc->rwnd; 1436 asoc->a_rwnd = asoc->rwnd;
1428 1437
1429 pr_debug("%s: sending window update SACK- asoc:%p rwnd:%u " 1438 pr_debug("%s: sending window update SACK- asoc:%p rwnd:%u "
@@ -1445,6 +1454,45 @@ void sctp_assoc_rwnd_update(struct sctp_association *asoc, bool update_peer)
1445 } 1454 }
1446} 1455}
1447 1456
1457/* Decrease asoc's rwnd by len. */
1458void sctp_assoc_rwnd_decrease(struct sctp_association *asoc, unsigned int len)
1459{
1460 int rx_count;
1461 int over = 0;
1462
1463 if (unlikely(!asoc->rwnd || asoc->rwnd_over))
1464 pr_debug("%s: association:%p has asoc->rwnd:%u, "
1465 "asoc->rwnd_over:%u!\n", __func__, asoc,
1466 asoc->rwnd, asoc->rwnd_over);
1467
1468 if (asoc->ep->rcvbuf_policy)
1469 rx_count = atomic_read(&asoc->rmem_alloc);
1470 else
1471 rx_count = atomic_read(&asoc->base.sk->sk_rmem_alloc);
1472
1473 /* If we've reached or overflowed our receive buffer, announce
1474 * a 0 rwnd if rwnd would still be positive. Store the
1475 * the potential pressure overflow so that the window can be restored
1476 * back to original value.
1477 */
1478 if (rx_count >= asoc->base.sk->sk_rcvbuf)
1479 over = 1;
1480
1481 if (asoc->rwnd >= len) {
1482 asoc->rwnd -= len;
1483 if (over) {
1484 asoc->rwnd_press += asoc->rwnd;
1485 asoc->rwnd = 0;
1486 }
1487 } else {
1488 asoc->rwnd_over = len - asoc->rwnd;
1489 asoc->rwnd = 0;
1490 }
1491
1492 pr_debug("%s: asoc:%p rwnd decreased by %d to (%u, %u, %u)\n",
1493 __func__, asoc, len, asoc->rwnd, asoc->rwnd_over,
1494 asoc->rwnd_press);
1495}
1448 1496
1449/* Build the bind address list for the association based on info from the 1497/* Build the bind address list for the association based on info from the
1450 * local endpoint and the remote peer. 1498 * local endpoint and the remote peer.
diff --git a/net/sctp/auth.c b/net/sctp/auth.c
index 683c7d1b1306..0e8529113dc5 100644
--- a/net/sctp/auth.c
+++ b/net/sctp/auth.c
@@ -386,14 +386,13 @@ nomem:
386 */ 386 */
387int sctp_auth_asoc_init_active_key(struct sctp_association *asoc, gfp_t gfp) 387int sctp_auth_asoc_init_active_key(struct sctp_association *asoc, gfp_t gfp)
388{ 388{
389 struct net *net = sock_net(asoc->base.sk);
390 struct sctp_auth_bytes *secret; 389 struct sctp_auth_bytes *secret;
391 struct sctp_shared_key *ep_key; 390 struct sctp_shared_key *ep_key;
392 391
393 /* If we don't support AUTH, or peer is not capable 392 /* If we don't support AUTH, or peer is not capable
394 * we don't need to do anything. 393 * we don't need to do anything.
395 */ 394 */
396 if (!net->sctp.auth_enable || !asoc->peer.auth_capable) 395 if (!asoc->ep->auth_enable || !asoc->peer.auth_capable)
397 return 0; 396 return 0;
398 397
399 /* If the key_id is non-zero and we couldn't find an 398 /* If the key_id is non-zero and we couldn't find an
@@ -440,16 +439,16 @@ struct sctp_shared_key *sctp_auth_get_shkey(
440 */ 439 */
441int sctp_auth_init_hmacs(struct sctp_endpoint *ep, gfp_t gfp) 440int sctp_auth_init_hmacs(struct sctp_endpoint *ep, gfp_t gfp)
442{ 441{
443 struct net *net = sock_net(ep->base.sk);
444 struct crypto_hash *tfm = NULL; 442 struct crypto_hash *tfm = NULL;
445 __u16 id; 443 __u16 id;
446 444
447 /* if the transforms are already allocted, we are done */ 445 /* If AUTH extension is disabled, we are done */
448 if (!net->sctp.auth_enable) { 446 if (!ep->auth_enable) {
449 ep->auth_hmacs = NULL; 447 ep->auth_hmacs = NULL;
450 return 0; 448 return 0;
451 } 449 }
452 450
451 /* If the transforms are already allocated, we are done */
453 if (ep->auth_hmacs) 452 if (ep->auth_hmacs)
454 return 0; 453 return 0;
455 454
@@ -665,12 +664,10 @@ static int __sctp_auth_cid(sctp_cid_t chunk, struct sctp_chunks_param *param)
665/* Check if peer requested that this chunk is authenticated */ 664/* Check if peer requested that this chunk is authenticated */
666int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc) 665int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
667{ 666{
668 struct net *net;
669 if (!asoc) 667 if (!asoc)
670 return 0; 668 return 0;
671 669
672 net = sock_net(asoc->base.sk); 670 if (!asoc->ep->auth_enable || !asoc->peer.auth_capable)
673 if (!net->sctp.auth_enable || !asoc->peer.auth_capable)
674 return 0; 671 return 0;
675 672
676 return __sctp_auth_cid(chunk, asoc->peer.peer_chunks); 673 return __sctp_auth_cid(chunk, asoc->peer.peer_chunks);
@@ -679,12 +676,10 @@ int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
679/* Check if we requested that peer authenticate this chunk. */ 676/* Check if we requested that peer authenticate this chunk. */
680int sctp_auth_recv_cid(sctp_cid_t chunk, const struct sctp_association *asoc) 677int sctp_auth_recv_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
681{ 678{
682 struct net *net;
683 if (!asoc) 679 if (!asoc)
684 return 0; 680 return 0;
685 681
686 net = sock_net(asoc->base.sk); 682 if (!asoc->ep->auth_enable)
687 if (!net->sctp.auth_enable)
688 return 0; 683 return 0;
689 684
690 return __sctp_auth_cid(chunk, 685 return __sctp_auth_cid(chunk,
diff --git a/net/sctp/endpointola.c b/net/sctp/endpointola.c
index 8e5fdea05216..3d9f429858dc 100644
--- a/net/sctp/endpointola.c
+++ b/net/sctp/endpointola.c
@@ -68,7 +68,8 @@ static struct sctp_endpoint *sctp_endpoint_init(struct sctp_endpoint *ep,
68 if (!ep->digest) 68 if (!ep->digest)
69 return NULL; 69 return NULL;
70 70
71 if (net->sctp.auth_enable) { 71 ep->auth_enable = net->sctp.auth_enable;
72 if (ep->auth_enable) {
72 /* Allocate space for HMACS and CHUNKS authentication 73 /* Allocate space for HMACS and CHUNKS authentication
73 * variables. There are arrays that we encode directly 74 * variables. There are arrays that we encode directly
74 * into parameters to make the rest of the operations easier. 75 * into parameters to make the rest of the operations easier.
diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c
index 4e1d0fcb028e..44cbb54c8574 100644
--- a/net/sctp/protocol.c
+++ b/net/sctp/protocol.c
@@ -491,8 +491,13 @@ static void sctp_v4_get_dst(struct sctp_transport *t, union sctp_addr *saddr,
491 continue; 491 continue;
492 if ((laddr->state == SCTP_ADDR_SRC) && 492 if ((laddr->state == SCTP_ADDR_SRC) &&
493 (AF_INET == laddr->a.sa.sa_family)) { 493 (AF_INET == laddr->a.sa.sa_family)) {
494 fl4->saddr = laddr->a.v4.sin_addr.s_addr;
495 fl4->fl4_sport = laddr->a.v4.sin_port; 494 fl4->fl4_sport = laddr->a.v4.sin_port;
495 flowi4_update_output(fl4,
496 asoc->base.sk->sk_bound_dev_if,
497 RT_CONN_FLAGS(asoc->base.sk),
498 daddr->v4.sin_addr.s_addr,
499 laddr->a.v4.sin_addr.s_addr);
500
496 rt = ip_route_output_key(sock_net(sk), fl4); 501 rt = ip_route_output_key(sock_net(sk), fl4);
497 if (!IS_ERR(rt)) { 502 if (!IS_ERR(rt)) {
498 dst = &rt->dst; 503 dst = &rt->dst;
@@ -957,7 +962,7 @@ static inline int sctp_v4_xmit(struct sk_buff *skb,
957 962
958 SCTP_INC_STATS(sock_net(&inet->sk), SCTP_MIB_OUTSCTPPACKS); 963 SCTP_INC_STATS(sock_net(&inet->sk), SCTP_MIB_OUTSCTPPACKS);
959 964
960 return ip_queue_xmit(skb, &transport->fl); 965 return ip_queue_xmit(&inet->sk, skb, &transport->fl);
961} 966}
962 967
963static struct sctp_af sctp_af_inet; 968static struct sctp_af sctp_af_inet;
diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c
index 3a1767ef3201..fee5552ddf92 100644
--- a/net/sctp/sm_make_chunk.c
+++ b/net/sctp/sm_make_chunk.c
@@ -219,6 +219,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
219 gfp_t gfp, int vparam_len) 219 gfp_t gfp, int vparam_len)
220{ 220{
221 struct net *net = sock_net(asoc->base.sk); 221 struct net *net = sock_net(asoc->base.sk);
222 struct sctp_endpoint *ep = asoc->ep;
222 sctp_inithdr_t init; 223 sctp_inithdr_t init;
223 union sctp_params addrs; 224 union sctp_params addrs;
224 size_t chunksize; 225 size_t chunksize;
@@ -278,7 +279,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
278 chunksize += vparam_len; 279 chunksize += vparam_len;
279 280
280 /* Account for AUTH related parameters */ 281 /* Account for AUTH related parameters */
281 if (net->sctp.auth_enable) { 282 if (ep->auth_enable) {
282 /* Add random parameter length*/ 283 /* Add random parameter length*/
283 chunksize += sizeof(asoc->c.auth_random); 284 chunksize += sizeof(asoc->c.auth_random);
284 285
@@ -363,7 +364,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
363 } 364 }
364 365
365 /* Add SCTP-AUTH chunks to the parameter list */ 366 /* Add SCTP-AUTH chunks to the parameter list */
366 if (net->sctp.auth_enable) { 367 if (ep->auth_enable) {
367 sctp_addto_chunk(retval, sizeof(asoc->c.auth_random), 368 sctp_addto_chunk(retval, sizeof(asoc->c.auth_random),
368 asoc->c.auth_random); 369 asoc->c.auth_random);
369 if (auth_hmacs) 370 if (auth_hmacs)
@@ -2010,7 +2011,7 @@ static void sctp_process_ext_param(struct sctp_association *asoc,
2010 /* if the peer reports AUTH, assume that he 2011 /* if the peer reports AUTH, assume that he
2011 * supports AUTH. 2012 * supports AUTH.
2012 */ 2013 */
2013 if (net->sctp.auth_enable) 2014 if (asoc->ep->auth_enable)
2014 asoc->peer.auth_capable = 1; 2015 asoc->peer.auth_capable = 1;
2015 break; 2016 break;
2016 case SCTP_CID_ASCONF: 2017 case SCTP_CID_ASCONF:
@@ -2102,6 +2103,7 @@ static sctp_ierror_t sctp_process_unk_param(const struct sctp_association *asoc,
2102 * SCTP_IERROR_NO_ERROR - continue with the chunk 2103 * SCTP_IERROR_NO_ERROR - continue with the chunk
2103 */ 2104 */
2104static sctp_ierror_t sctp_verify_param(struct net *net, 2105static sctp_ierror_t sctp_verify_param(struct net *net,
2106 const struct sctp_endpoint *ep,
2105 const struct sctp_association *asoc, 2107 const struct sctp_association *asoc,
2106 union sctp_params param, 2108 union sctp_params param,
2107 sctp_cid_t cid, 2109 sctp_cid_t cid,
@@ -2152,7 +2154,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
2152 goto fallthrough; 2154 goto fallthrough;
2153 2155
2154 case SCTP_PARAM_RANDOM: 2156 case SCTP_PARAM_RANDOM:
2155 if (!net->sctp.auth_enable) 2157 if (!ep->auth_enable)
2156 goto fallthrough; 2158 goto fallthrough;
2157 2159
2158 /* SCTP-AUTH: Secion 6.1 2160 /* SCTP-AUTH: Secion 6.1
@@ -2169,7 +2171,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
2169 break; 2171 break;
2170 2172
2171 case SCTP_PARAM_CHUNKS: 2173 case SCTP_PARAM_CHUNKS:
2172 if (!net->sctp.auth_enable) 2174 if (!ep->auth_enable)
2173 goto fallthrough; 2175 goto fallthrough;
2174 2176
2175 /* SCTP-AUTH: Section 3.2 2177 /* SCTP-AUTH: Section 3.2
@@ -2185,7 +2187,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
2185 break; 2187 break;
2186 2188
2187 case SCTP_PARAM_HMAC_ALGO: 2189 case SCTP_PARAM_HMAC_ALGO:
2188 if (!net->sctp.auth_enable) 2190 if (!ep->auth_enable)
2189 goto fallthrough; 2191 goto fallthrough;
2190 2192
2191 hmacs = (struct sctp_hmac_algo_param *)param.p; 2193 hmacs = (struct sctp_hmac_algo_param *)param.p;
@@ -2220,10 +2222,9 @@ fallthrough:
2220} 2222}
2221 2223
2222/* Verify the INIT packet before we process it. */ 2224/* Verify the INIT packet before we process it. */
2223int sctp_verify_init(struct net *net, const struct sctp_association *asoc, 2225int sctp_verify_init(struct net *net, const struct sctp_endpoint *ep,
2224 sctp_cid_t cid, 2226 const struct sctp_association *asoc, sctp_cid_t cid,
2225 sctp_init_chunk_t *peer_init, 2227 sctp_init_chunk_t *peer_init, struct sctp_chunk *chunk,
2226 struct sctp_chunk *chunk,
2227 struct sctp_chunk **errp) 2228 struct sctp_chunk **errp)
2228{ 2229{
2229 union sctp_params param; 2230 union sctp_params param;
@@ -2264,8 +2265,8 @@ int sctp_verify_init(struct net *net, const struct sctp_association *asoc,
2264 2265
2265 /* Verify all the variable length parameters */ 2266 /* Verify all the variable length parameters */
2266 sctp_walk_params(param, peer_init, init_hdr.params) { 2267 sctp_walk_params(param, peer_init, init_hdr.params) {
2267 2268 result = sctp_verify_param(net, ep, asoc, param, cid,
2268 result = sctp_verify_param(net, asoc, param, cid, chunk, errp); 2269 chunk, errp);
2269 switch (result) { 2270 switch (result) {
2270 case SCTP_IERROR_ABORT: 2271 case SCTP_IERROR_ABORT:
2271 case SCTP_IERROR_NOMEM: 2272 case SCTP_IERROR_NOMEM:
@@ -2497,6 +2498,7 @@ static int sctp_process_param(struct sctp_association *asoc,
2497 struct sctp_af *af; 2498 struct sctp_af *af;
2498 union sctp_addr_param *addr_param; 2499 union sctp_addr_param *addr_param;
2499 struct sctp_transport *t; 2500 struct sctp_transport *t;
2501 struct sctp_endpoint *ep = asoc->ep;
2500 2502
2501 /* We maintain all INIT parameters in network byte order all the 2503 /* We maintain all INIT parameters in network byte order all the
2502 * time. This allows us to not worry about whether the parameters 2504 * time. This allows us to not worry about whether the parameters
@@ -2636,7 +2638,7 @@ do_addr_param:
2636 goto fall_through; 2638 goto fall_through;
2637 2639
2638 case SCTP_PARAM_RANDOM: 2640 case SCTP_PARAM_RANDOM:
2639 if (!net->sctp.auth_enable) 2641 if (!ep->auth_enable)
2640 goto fall_through; 2642 goto fall_through;
2641 2643
2642 /* Save peer's random parameter */ 2644 /* Save peer's random parameter */
@@ -2649,7 +2651,7 @@ do_addr_param:
2649 break; 2651 break;
2650 2652
2651 case SCTP_PARAM_HMAC_ALGO: 2653 case SCTP_PARAM_HMAC_ALGO:
2652 if (!net->sctp.auth_enable) 2654 if (!ep->auth_enable)
2653 goto fall_through; 2655 goto fall_through;
2654 2656
2655 /* Save peer's HMAC list */ 2657 /* Save peer's HMAC list */
@@ -2665,7 +2667,7 @@ do_addr_param:
2665 break; 2667 break;
2666 2668
2667 case SCTP_PARAM_CHUNKS: 2669 case SCTP_PARAM_CHUNKS:
2668 if (!net->sctp.auth_enable) 2670 if (!ep->auth_enable)
2669 goto fall_through; 2671 goto fall_through;
2670 2672
2671 asoc->peer.peer_chunks = kmemdup(param.p, 2673 asoc->peer.peer_chunks = kmemdup(param.p,
diff --git a/net/sctp/sm_sideeffect.c b/net/sctp/sm_sideeffect.c
index 5d6883ff00c3..fef2acdf4a2e 100644
--- a/net/sctp/sm_sideeffect.c
+++ b/net/sctp/sm_sideeffect.c
@@ -496,11 +496,10 @@ static void sctp_do_8_2_transport_strike(sctp_cmd_seq_t *commands,
496 496
497 /* If the transport error count is greater than the pf_retrans 497 /* If the transport error count is greater than the pf_retrans
498 * threshold, and less than pathmaxrtx, and if the current state 498 * threshold, and less than pathmaxrtx, and if the current state
499 * is not SCTP_UNCONFIRMED, then mark this transport as Partially 499 * is SCTP_ACTIVE, then mark this transport as Partially Failed,
500 * Failed, see SCTP Quick Failover Draft, section 5.1 500 * see SCTP Quick Failover Draft, section 5.1
501 */ 501 */
502 if ((transport->state != SCTP_PF) && 502 if ((transport->state == SCTP_ACTIVE) &&
503 (transport->state != SCTP_UNCONFIRMED) &&
504 (asoc->pf_retrans < transport->pathmaxrxt) && 503 (asoc->pf_retrans < transport->pathmaxrxt) &&
505 (transport->error_count > asoc->pf_retrans)) { 504 (transport->error_count > asoc->pf_retrans)) {
506 505
diff --git a/net/sctp/sm_statefuns.c b/net/sctp/sm_statefuns.c
index 01e002430c85..5170a1ff95a1 100644
--- a/net/sctp/sm_statefuns.c
+++ b/net/sctp/sm_statefuns.c
@@ -357,7 +357,7 @@ sctp_disposition_t sctp_sf_do_5_1B_init(struct net *net,
357 357
358 /* Verify the INIT chunk before processing it. */ 358 /* Verify the INIT chunk before processing it. */
359 err_chunk = NULL; 359 err_chunk = NULL;
360 if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type, 360 if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
361 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk, 361 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
362 &err_chunk)) { 362 &err_chunk)) {
363 /* This chunk contains fatal error. It is to be discarded. 363 /* This chunk contains fatal error. It is to be discarded.
@@ -524,7 +524,7 @@ sctp_disposition_t sctp_sf_do_5_1C_ack(struct net *net,
524 524
525 /* Verify the INIT chunk before processing it. */ 525 /* Verify the INIT chunk before processing it. */
526 err_chunk = NULL; 526 err_chunk = NULL;
527 if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type, 527 if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
528 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk, 528 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
529 &err_chunk)) { 529 &err_chunk)) {
530 530
@@ -1430,7 +1430,7 @@ static sctp_disposition_t sctp_sf_do_unexpected_init(
1430 1430
1431 /* Verify the INIT chunk before processing it. */ 1431 /* Verify the INIT chunk before processing it. */
1432 err_chunk = NULL; 1432 err_chunk = NULL;
1433 if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type, 1433 if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
1434 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk, 1434 (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
1435 &err_chunk)) { 1435 &err_chunk)) {
1436 /* This chunk contains fatal error. It is to be discarded. 1436 /* This chunk contains fatal error. It is to be discarded.
@@ -6178,7 +6178,7 @@ static int sctp_eat_data(const struct sctp_association *asoc,
6178 * PMTU. In cases, such as loopback, this might be a rather 6178 * PMTU. In cases, such as loopback, this might be a rather
6179 * large spill over. 6179 * large spill over.
6180 */ 6180 */
6181 if ((!chunk->data_accepted) && (!asoc->rwnd || 6181 if ((!chunk->data_accepted) && (!asoc->rwnd || asoc->rwnd_over ||
6182 (datalen > asoc->rwnd + asoc->frag_point))) { 6182 (datalen > asoc->rwnd + asoc->frag_point))) {
6183 6183
6184 /* If this is the next TSN, consider reneging to make 6184 /* If this is the next TSN, consider reneging to make
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index e13519e9df80..fee06b99a4da 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -2115,6 +2115,12 @@ static int sctp_recvmsg(struct kiocb *iocb, struct sock *sk,
2115 sctp_skb_pull(skb, copied); 2115 sctp_skb_pull(skb, copied);
2116 skb_queue_head(&sk->sk_receive_queue, skb); 2116 skb_queue_head(&sk->sk_receive_queue, skb);
2117 2117
2118 /* When only partial message is copied to the user, increase
2119 * rwnd by that amount. If all the data in the skb is read,
2120 * rwnd is updated when the event is freed.
2121 */
2122 if (!sctp_ulpevent_is_notification(event))
2123 sctp_assoc_rwnd_increase(event->asoc, copied);
2118 goto out; 2124 goto out;
2119 } else if ((event->msg_flags & MSG_NOTIFICATION) || 2125 } else if ((event->msg_flags & MSG_NOTIFICATION) ||
2120 (event->msg_flags & MSG_EOR)) 2126 (event->msg_flags & MSG_EOR))
@@ -3315,10 +3321,10 @@ static int sctp_setsockopt_auth_chunk(struct sock *sk,
3315 char __user *optval, 3321 char __user *optval,
3316 unsigned int optlen) 3322 unsigned int optlen)
3317{ 3323{
3318 struct net *net = sock_net(sk); 3324 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
3319 struct sctp_authchunk val; 3325 struct sctp_authchunk val;
3320 3326
3321 if (!net->sctp.auth_enable) 3327 if (!ep->auth_enable)
3322 return -EACCES; 3328 return -EACCES;
3323 3329
3324 if (optlen != sizeof(struct sctp_authchunk)) 3330 if (optlen != sizeof(struct sctp_authchunk))
@@ -3335,7 +3341,7 @@ static int sctp_setsockopt_auth_chunk(struct sock *sk,
3335 } 3341 }
3336 3342
3337 /* add this chunk id to the endpoint */ 3343 /* add this chunk id to the endpoint */
3338 return sctp_auth_ep_add_chunkid(sctp_sk(sk)->ep, val.sauth_chunk); 3344 return sctp_auth_ep_add_chunkid(ep, val.sauth_chunk);
3339} 3345}
3340 3346
3341/* 3347/*
@@ -3348,12 +3354,12 @@ static int sctp_setsockopt_hmac_ident(struct sock *sk,
3348 char __user *optval, 3354 char __user *optval,
3349 unsigned int optlen) 3355 unsigned int optlen)
3350{ 3356{
3351 struct net *net = sock_net(sk); 3357 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
3352 struct sctp_hmacalgo *hmacs; 3358 struct sctp_hmacalgo *hmacs;
3353 u32 idents; 3359 u32 idents;
3354 int err; 3360 int err;
3355 3361
3356 if (!net->sctp.auth_enable) 3362 if (!ep->auth_enable)
3357 return -EACCES; 3363 return -EACCES;
3358 3364
3359 if (optlen < sizeof(struct sctp_hmacalgo)) 3365 if (optlen < sizeof(struct sctp_hmacalgo))
@@ -3370,7 +3376,7 @@ static int sctp_setsockopt_hmac_ident(struct sock *sk,
3370 goto out; 3376 goto out;
3371 } 3377 }
3372 3378
3373 err = sctp_auth_ep_set_hmacs(sctp_sk(sk)->ep, hmacs); 3379 err = sctp_auth_ep_set_hmacs(ep, hmacs);
3374out: 3380out:
3375 kfree(hmacs); 3381 kfree(hmacs);
3376 return err; 3382 return err;
@@ -3386,12 +3392,12 @@ static int sctp_setsockopt_auth_key(struct sock *sk,
3386 char __user *optval, 3392 char __user *optval,
3387 unsigned int optlen) 3393 unsigned int optlen)
3388{ 3394{
3389 struct net *net = sock_net(sk); 3395 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
3390 struct sctp_authkey *authkey; 3396 struct sctp_authkey *authkey;
3391 struct sctp_association *asoc; 3397 struct sctp_association *asoc;
3392 int ret; 3398 int ret;
3393 3399
3394 if (!net->sctp.auth_enable) 3400 if (!ep->auth_enable)
3395 return -EACCES; 3401 return -EACCES;
3396 3402
3397 if (optlen <= sizeof(struct sctp_authkey)) 3403 if (optlen <= sizeof(struct sctp_authkey))
@@ -3412,7 +3418,7 @@ static int sctp_setsockopt_auth_key(struct sock *sk,
3412 goto out; 3418 goto out;
3413 } 3419 }
3414 3420
3415 ret = sctp_auth_set_key(sctp_sk(sk)->ep, asoc, authkey); 3421 ret = sctp_auth_set_key(ep, asoc, authkey);
3416out: 3422out:
3417 kzfree(authkey); 3423 kzfree(authkey);
3418 return ret; 3424 return ret;
@@ -3428,11 +3434,11 @@ static int sctp_setsockopt_active_key(struct sock *sk,
3428 char __user *optval, 3434 char __user *optval,
3429 unsigned int optlen) 3435 unsigned int optlen)
3430{ 3436{
3431 struct net *net = sock_net(sk); 3437 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
3432 struct sctp_authkeyid val; 3438 struct sctp_authkeyid val;
3433 struct sctp_association *asoc; 3439 struct sctp_association *asoc;
3434 3440
3435 if (!net->sctp.auth_enable) 3441 if (!ep->auth_enable)
3436 return -EACCES; 3442 return -EACCES;
3437 3443
3438 if (optlen != sizeof(struct sctp_authkeyid)) 3444 if (optlen != sizeof(struct sctp_authkeyid))
@@ -3444,8 +3450,7 @@ static int sctp_setsockopt_active_key(struct sock *sk,
3444 if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP)) 3450 if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP))
3445 return -EINVAL; 3451 return -EINVAL;
3446 3452
3447 return sctp_auth_set_active_key(sctp_sk(sk)->ep, asoc, 3453 return sctp_auth_set_active_key(ep, asoc, val.scact_keynumber);
3448 val.scact_keynumber);
3449} 3454}
3450 3455
3451/* 3456/*
@@ -3457,11 +3462,11 @@ static int sctp_setsockopt_del_key(struct sock *sk,
3457 char __user *optval, 3462 char __user *optval,
3458 unsigned int optlen) 3463 unsigned int optlen)
3459{ 3464{
3460 struct net *net = sock_net(sk); 3465 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
3461 struct sctp_authkeyid val; 3466 struct sctp_authkeyid val;
3462 struct sctp_association *asoc; 3467 struct sctp_association *asoc;
3463 3468
3464 if (!net->sctp.auth_enable) 3469 if (!ep->auth_enable)
3465 return -EACCES; 3470 return -EACCES;
3466 3471
3467 if (optlen != sizeof(struct sctp_authkeyid)) 3472 if (optlen != sizeof(struct sctp_authkeyid))
@@ -3473,8 +3478,7 @@ static int sctp_setsockopt_del_key(struct sock *sk,
3473 if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP)) 3478 if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP))
3474 return -EINVAL; 3479 return -EINVAL;
3475 3480
3476 return sctp_auth_del_key_id(sctp_sk(sk)->ep, asoc, 3481 return sctp_auth_del_key_id(ep, asoc, val.scact_keynumber);
3477 val.scact_keynumber);
3478 3482
3479} 3483}
3480 3484
@@ -5381,16 +5385,16 @@ static int sctp_getsockopt_maxburst(struct sock *sk, int len,
5381static int sctp_getsockopt_hmac_ident(struct sock *sk, int len, 5385static int sctp_getsockopt_hmac_ident(struct sock *sk, int len,
5382 char __user *optval, int __user *optlen) 5386 char __user *optval, int __user *optlen)
5383{ 5387{
5384 struct net *net = sock_net(sk); 5388 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
5385 struct sctp_hmacalgo __user *p = (void __user *)optval; 5389 struct sctp_hmacalgo __user *p = (void __user *)optval;
5386 struct sctp_hmac_algo_param *hmacs; 5390 struct sctp_hmac_algo_param *hmacs;
5387 __u16 data_len = 0; 5391 __u16 data_len = 0;
5388 u32 num_idents; 5392 u32 num_idents;
5389 5393
5390 if (!net->sctp.auth_enable) 5394 if (!ep->auth_enable)
5391 return -EACCES; 5395 return -EACCES;
5392 5396
5393 hmacs = sctp_sk(sk)->ep->auth_hmacs_list; 5397 hmacs = ep->auth_hmacs_list;
5394 data_len = ntohs(hmacs->param_hdr.length) - sizeof(sctp_paramhdr_t); 5398 data_len = ntohs(hmacs->param_hdr.length) - sizeof(sctp_paramhdr_t);
5395 5399
5396 if (len < sizeof(struct sctp_hmacalgo) + data_len) 5400 if (len < sizeof(struct sctp_hmacalgo) + data_len)
@@ -5411,11 +5415,11 @@ static int sctp_getsockopt_hmac_ident(struct sock *sk, int len,
5411static int sctp_getsockopt_active_key(struct sock *sk, int len, 5415static int sctp_getsockopt_active_key(struct sock *sk, int len,
5412 char __user *optval, int __user *optlen) 5416 char __user *optval, int __user *optlen)
5413{ 5417{
5414 struct net *net = sock_net(sk); 5418 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
5415 struct sctp_authkeyid val; 5419 struct sctp_authkeyid val;
5416 struct sctp_association *asoc; 5420 struct sctp_association *asoc;
5417 5421
5418 if (!net->sctp.auth_enable) 5422 if (!ep->auth_enable)
5419 return -EACCES; 5423 return -EACCES;
5420 5424
5421 if (len < sizeof(struct sctp_authkeyid)) 5425 if (len < sizeof(struct sctp_authkeyid))
@@ -5430,7 +5434,7 @@ static int sctp_getsockopt_active_key(struct sock *sk, int len,
5430 if (asoc) 5434 if (asoc)
5431 val.scact_keynumber = asoc->active_key_id; 5435 val.scact_keynumber = asoc->active_key_id;
5432 else 5436 else
5433 val.scact_keynumber = sctp_sk(sk)->ep->active_key_id; 5437 val.scact_keynumber = ep->active_key_id;
5434 5438
5435 len = sizeof(struct sctp_authkeyid); 5439 len = sizeof(struct sctp_authkeyid);
5436 if (put_user(len, optlen)) 5440 if (put_user(len, optlen))
@@ -5444,7 +5448,7 @@ static int sctp_getsockopt_active_key(struct sock *sk, int len,
5444static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len, 5448static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
5445 char __user *optval, int __user *optlen) 5449 char __user *optval, int __user *optlen)
5446{ 5450{
5447 struct net *net = sock_net(sk); 5451 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
5448 struct sctp_authchunks __user *p = (void __user *)optval; 5452 struct sctp_authchunks __user *p = (void __user *)optval;
5449 struct sctp_authchunks val; 5453 struct sctp_authchunks val;
5450 struct sctp_association *asoc; 5454 struct sctp_association *asoc;
@@ -5452,7 +5456,7 @@ static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
5452 u32 num_chunks = 0; 5456 u32 num_chunks = 0;
5453 char __user *to; 5457 char __user *to;
5454 5458
5455 if (!net->sctp.auth_enable) 5459 if (!ep->auth_enable)
5456 return -EACCES; 5460 return -EACCES;
5457 5461
5458 if (len < sizeof(struct sctp_authchunks)) 5462 if (len < sizeof(struct sctp_authchunks))
@@ -5489,7 +5493,7 @@ num:
5489static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len, 5493static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
5490 char __user *optval, int __user *optlen) 5494 char __user *optval, int __user *optlen)
5491{ 5495{
5492 struct net *net = sock_net(sk); 5496 struct sctp_endpoint *ep = sctp_sk(sk)->ep;
5493 struct sctp_authchunks __user *p = (void __user *)optval; 5497 struct sctp_authchunks __user *p = (void __user *)optval;
5494 struct sctp_authchunks val; 5498 struct sctp_authchunks val;
5495 struct sctp_association *asoc; 5499 struct sctp_association *asoc;
@@ -5497,7 +5501,7 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
5497 u32 num_chunks = 0; 5501 u32 num_chunks = 0;
5498 char __user *to; 5502 char __user *to;
5499 5503
5500 if (!net->sctp.auth_enable) 5504 if (!ep->auth_enable)
5501 return -EACCES; 5505 return -EACCES;
5502 5506
5503 if (len < sizeof(struct sctp_authchunks)) 5507 if (len < sizeof(struct sctp_authchunks))
@@ -5514,7 +5518,7 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
5514 if (asoc) 5518 if (asoc)
5515 ch = (struct sctp_chunks_param *)asoc->c.auth_chunks; 5519 ch = (struct sctp_chunks_param *)asoc->c.auth_chunks;
5516 else 5520 else
5517 ch = sctp_sk(sk)->ep->auth_chunk_list; 5521 ch = ep->auth_chunk_list;
5518 5522
5519 if (!ch) 5523 if (!ch)
5520 goto num; 5524 goto num;
diff --git a/net/sctp/sysctl.c b/net/sctp/sysctl.c
index 35c8923b5554..c82fdc1eab7c 100644
--- a/net/sctp/sysctl.c
+++ b/net/sctp/sysctl.c
@@ -64,6 +64,9 @@ static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
64static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write, 64static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
65 void __user *buffer, size_t *lenp, 65 void __user *buffer, size_t *lenp,
66 loff_t *ppos); 66 loff_t *ppos);
67static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
68 void __user *buffer, size_t *lenp,
69 loff_t *ppos);
67 70
68static struct ctl_table sctp_table[] = { 71static struct ctl_table sctp_table[] = {
69 { 72 {
@@ -266,7 +269,7 @@ static struct ctl_table sctp_net_table[] = {
266 .data = &init_net.sctp.auth_enable, 269 .data = &init_net.sctp.auth_enable,
267 .maxlen = sizeof(int), 270 .maxlen = sizeof(int),
268 .mode = 0644, 271 .mode = 0644,
269 .proc_handler = proc_dointvec, 272 .proc_handler = proc_sctp_do_auth,
270 }, 273 },
271 { 274 {
272 .procname = "addr_scope_policy", 275 .procname = "addr_scope_policy",
@@ -400,6 +403,37 @@ static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
400 return ret; 403 return ret;
401} 404}
402 405
406static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
407 void __user *buffer, size_t *lenp,
408 loff_t *ppos)
409{
410 struct net *net = current->nsproxy->net_ns;
411 struct ctl_table tbl;
412 int new_value, ret;
413
414 memset(&tbl, 0, sizeof(struct ctl_table));
415 tbl.maxlen = sizeof(unsigned int);
416
417 if (write)
418 tbl.data = &new_value;
419 else
420 tbl.data = &net->sctp.auth_enable;
421
422 ret = proc_dointvec(&tbl, write, buffer, lenp, ppos);
423
424 if (write) {
425 struct sock *sk = net->sctp.ctl_sock;
426
427 net->sctp.auth_enable = new_value;
428 /* Update the value in the control socket */
429 lock_sock(sk);
430 sctp_sk(sk)->ep->auth_enable = new_value;
431 release_sock(sk);
432 }
433
434 return ret;
435}
436
403int sctp_sysctl_net_register(struct net *net) 437int sctp_sysctl_net_register(struct net *net)
404{ 438{
405 struct ctl_table *table = sctp_net_table; 439 struct ctl_table *table = sctp_net_table;
diff --git a/net/sctp/ulpevent.c b/net/sctp/ulpevent.c
index 8d198ae03606..85c64658bd0b 100644
--- a/net/sctp/ulpevent.c
+++ b/net/sctp/ulpevent.c
@@ -989,7 +989,7 @@ static void sctp_ulpevent_receive_data(struct sctp_ulpevent *event,
989 skb = sctp_event2skb(event); 989 skb = sctp_event2skb(event);
990 /* Set the owner and charge rwnd for bytes received. */ 990 /* Set the owner and charge rwnd for bytes received. */
991 sctp_ulpevent_set_owner(event, asoc); 991 sctp_ulpevent_set_owner(event, asoc);
992 sctp_assoc_rwnd_update(asoc, false); 992 sctp_assoc_rwnd_decrease(asoc, skb_headlen(skb));
993 993
994 if (!skb->data_len) 994 if (!skb->data_len)
995 return; 995 return;
@@ -1011,7 +1011,6 @@ static void sctp_ulpevent_release_data(struct sctp_ulpevent *event)
1011{ 1011{
1012 struct sk_buff *skb, *frag; 1012 struct sk_buff *skb, *frag;
1013 unsigned int len; 1013 unsigned int len;
1014 struct sctp_association *asoc;
1015 1014
1016 /* Current stack structures assume that the rcv buffer is 1015 /* Current stack structures assume that the rcv buffer is
1017 * per socket. For UDP style sockets this is not true as 1016 * per socket. For UDP style sockets this is not true as
@@ -1036,11 +1035,8 @@ static void sctp_ulpevent_release_data(struct sctp_ulpevent *event)
1036 } 1035 }
1037 1036
1038done: 1037done:
1039 asoc = event->asoc; 1038 sctp_assoc_rwnd_increase(event->asoc, len);
1040 sctp_association_hold(asoc);
1041 sctp_ulpevent_release_owner(event); 1039 sctp_ulpevent_release_owner(event);
1042 sctp_assoc_rwnd_update(asoc, true);
1043 sctp_association_put(asoc);
1044} 1040}
1045 1041
1046static void sctp_ulpevent_release_frag_data(struct sctp_ulpevent *event) 1042static void sctp_ulpevent_release_frag_data(struct sctp_ulpevent *event)
diff --git a/net/socket.c b/net/socket.c
index 1b1e7e6a960f..abf56b2a14f9 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -1880,8 +1880,8 @@ out:
1880 * Receive a datagram from a socket. 1880 * Receive a datagram from a socket.
1881 */ 1881 */
1882 1882
1883asmlinkage long sys_recv(int fd, void __user *ubuf, size_t size, 1883SYSCALL_DEFINE4(recv, int, fd, void __user *, ubuf, size_t, size,
1884 unsigned int flags) 1884 unsigned int, flags)
1885{ 1885{
1886 return sys_recvfrom(fd, ubuf, size, flags, NULL, NULL); 1886 return sys_recvfrom(fd, ubuf, size, flags, NULL, NULL);
1887} 1887}
diff --git a/net/tipc/netlink.c b/net/tipc/netlink.c
index 3aaf73de9e2d..ad844d365340 100644
--- a/net/tipc/netlink.c
+++ b/net/tipc/netlink.c
@@ -47,7 +47,7 @@ static int handle_cmd(struct sk_buff *skb, struct genl_info *info)
47 int hdr_space = nlmsg_total_size(GENL_HDRLEN + TIPC_GENL_HDRLEN); 47 int hdr_space = nlmsg_total_size(GENL_HDRLEN + TIPC_GENL_HDRLEN);
48 u16 cmd; 48 u16 cmd;
49 49
50 if ((req_userhdr->cmd & 0xC000) && (!capable(CAP_NET_ADMIN))) 50 if ((req_userhdr->cmd & 0xC000) && (!netlink_capable(skb, CAP_NET_ADMIN)))
51 cmd = TIPC_CMD_NOT_NET_ADMIN; 51 cmd = TIPC_CMD_NOT_NET_ADMIN;
52 else 52 else
53 cmd = req_userhdr->cmd; 53 cmd = req_userhdr->cmd;
diff --git a/net/vmw_vsock/af_vsock.c b/net/vmw_vsock/af_vsock.c
index 5adfd94c5b85..85d232bed87d 100644
--- a/net/vmw_vsock/af_vsock.c
+++ b/net/vmw_vsock/af_vsock.c
@@ -1925,9 +1925,23 @@ static struct miscdevice vsock_device = {
1925 .fops = &vsock_device_ops, 1925 .fops = &vsock_device_ops,
1926}; 1926};
1927 1927
1928static int __vsock_core_init(void) 1928int __vsock_core_init(const struct vsock_transport *t, struct module *owner)
1929{ 1929{
1930 int err; 1930 int err = mutex_lock_interruptible(&vsock_register_mutex);
1931
1932 if (err)
1933 return err;
1934
1935 if (transport) {
1936 err = -EBUSY;
1937 goto err_busy;
1938 }
1939
1940 /* Transport must be the owner of the protocol so that it can't
1941 * unload while there are open sockets.
1942 */
1943 vsock_proto.owner = owner;
1944 transport = t;
1931 1945
1932 vsock_init_tables(); 1946 vsock_init_tables();
1933 1947
@@ -1951,36 +1965,19 @@ static int __vsock_core_init(void)
1951 goto err_unregister_proto; 1965 goto err_unregister_proto;
1952 } 1966 }
1953 1967
1968 mutex_unlock(&vsock_register_mutex);
1954 return 0; 1969 return 0;
1955 1970
1956err_unregister_proto: 1971err_unregister_proto:
1957 proto_unregister(&vsock_proto); 1972 proto_unregister(&vsock_proto);
1958err_misc_deregister: 1973err_misc_deregister:
1959 misc_deregister(&vsock_device); 1974 misc_deregister(&vsock_device);
1960 return err; 1975 transport = NULL;
1961} 1976err_busy:
1962
1963int vsock_core_init(const struct vsock_transport *t)
1964{
1965 int retval = mutex_lock_interruptible(&vsock_register_mutex);
1966 if (retval)
1967 return retval;
1968
1969 if (transport) {
1970 retval = -EBUSY;
1971 goto out;
1972 }
1973
1974 transport = t;
1975 retval = __vsock_core_init();
1976 if (retval)
1977 transport = NULL;
1978
1979out:
1980 mutex_unlock(&vsock_register_mutex); 1977 mutex_unlock(&vsock_register_mutex);
1981 return retval; 1978 return err;
1982} 1979}
1983EXPORT_SYMBOL_GPL(vsock_core_init); 1980EXPORT_SYMBOL_GPL(__vsock_core_init);
1984 1981
1985void vsock_core_exit(void) 1982void vsock_core_exit(void)
1986{ 1983{
@@ -2000,5 +1997,5 @@ EXPORT_SYMBOL_GPL(vsock_core_exit);
2000 1997
2001MODULE_AUTHOR("VMware, Inc."); 1998MODULE_AUTHOR("VMware, Inc.");
2002MODULE_DESCRIPTION("VMware Virtual Socket Family"); 1999MODULE_DESCRIPTION("VMware Virtual Socket Family");
2003MODULE_VERSION("1.0.0.0-k"); 2000MODULE_VERSION("1.0.1.0-k");
2004MODULE_LICENSE("GPL v2"); 2001MODULE_LICENSE("GPL v2");
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index f02f511b7107..c08fbd11ceff 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -1842,7 +1842,7 @@ purge_queue:
1842 xfrm_pol_put(pol); 1842 xfrm_pol_put(pol);
1843} 1843}
1844 1844
1845static int xdst_queue_output(struct sk_buff *skb) 1845static int xdst_queue_output(struct sock *sk, struct sk_buff *skb)
1846{ 1846{
1847 unsigned long sched_next; 1847 unsigned long sched_next;
1848 struct dst_entry *dst = skb_dst(skb); 1848 struct dst_entry *dst = skb_dst(skb);
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 8f131c10a6f3..51398ae6cda8 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -2377,7 +2377,7 @@ static int xfrm_user_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
2377 link = &xfrm_dispatch[type]; 2377 link = &xfrm_dispatch[type];
2378 2378
2379 /* All operations require privileges, even GET */ 2379 /* All operations require privileges, even GET */
2380 if (!ns_capable(net->user_ns, CAP_NET_ADMIN)) 2380 if (!netlink_net_capable(skb, CAP_NET_ADMIN))
2381 return -EPERM; 2381 return -EPERM;
2382 2382
2383 if ((type == (XFRM_MSG_GETSA - XFRM_MSG_BASE) || 2383 if ((type == (XFRM_MSG_GETSA - XFRM_MSG_BASE) ||
diff --git a/scripts/sortextable.c b/scripts/sortextable.c
index cc49062acdee..1052d4834a44 100644
--- a/scripts/sortextable.c
+++ b/scripts/sortextable.c
@@ -35,6 +35,10 @@
35#define EM_ARCOMPACT 93 35#define EM_ARCOMPACT 93
36#endif 36#endif
37 37
38#ifndef EM_XTENSA
39#define EM_XTENSA 94
40#endif
41
38#ifndef EM_AARCH64 42#ifndef EM_AARCH64
39#define EM_AARCH64 183 43#define EM_AARCH64 183
40#endif 44#endif
@@ -281,6 +285,7 @@ do_file(char const *const fname)
281 case EM_AARCH64: 285 case EM_AARCH64:
282 case EM_MICROBLAZE: 286 case EM_MICROBLAZE:
283 case EM_MIPS: 287 case EM_MIPS:
288 case EM_XTENSA:
284 break; 289 break;
285 } /* end switch */ 290 } /* end switch */
286 291
diff --git a/security/apparmor/include/apparmor.h b/security/apparmor/include/apparmor.h
index 8fb1488a3cd4..97130f88838b 100644
--- a/security/apparmor/include/apparmor.h
+++ b/security/apparmor/include/apparmor.h
@@ -66,7 +66,6 @@ extern int apparmor_initialized __initdata;
66char *aa_split_fqname(char *args, char **ns_name); 66char *aa_split_fqname(char *args, char **ns_name);
67void aa_info_message(const char *str); 67void aa_info_message(const char *str);
68void *__aa_kvmalloc(size_t size, gfp_t flags); 68void *__aa_kvmalloc(size_t size, gfp_t flags);
69void kvfree(void *buffer);
70 69
71static inline void *kvmalloc(size_t size) 70static inline void *kvmalloc(size_t size)
72{ 71{
diff --git a/security/apparmor/lib.c b/security/apparmor/lib.c
index 69689922c491..c1827e068454 100644
--- a/security/apparmor/lib.c
+++ b/security/apparmor/lib.c
@@ -104,17 +104,3 @@ void *__aa_kvmalloc(size_t size, gfp_t flags)
104 } 104 }
105 return buffer; 105 return buffer;
106} 106}
107
108/**
109 * kvfree - free an allocation do by kvmalloc
110 * @buffer: buffer to free (MAYBE_NULL)
111 *
112 * Free a buffer allocated by kvmalloc
113 */
114void kvfree(void *buffer)
115{
116 if (is_vmalloc_addr(buffer))
117 vfree(buffer);
118 else
119 kfree(buffer);
120}
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index b4beb77967b1..2c7341dbc5d6 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -3317,9 +3317,9 @@ static int selinux_file_fcntl(struct file *file, unsigned int cmd,
3317 case F_GETLK: 3317 case F_GETLK:
3318 case F_SETLK: 3318 case F_SETLK:
3319 case F_SETLKW: 3319 case F_SETLKW:
3320 case F_GETLKP: 3320 case F_OFD_GETLK:
3321 case F_SETLKP: 3321 case F_OFD_SETLK:
3322 case F_SETLKPW: 3322 case F_OFD_SETLKW:
3323#if BITS_PER_LONG == 32 3323#if BITS_PER_LONG == 32
3324 case F_GETLK64: 3324 case F_GETLK64:
3325 case F_SETLK64: 3325 case F_SETLK64:
diff --git a/sound/arm/pxa2xx-pcm.c b/sound/arm/pxa2xx-pcm.c
index e6c727b317fb..83be8e3f095e 100644
--- a/sound/arm/pxa2xx-pcm.c
+++ b/sound/arm/pxa2xx-pcm.c
@@ -14,6 +14,8 @@
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/dmaengine.h> 15#include <linux/dmaengine.h>
16 16
17#include <mach/dma.h>
18
17#include <sound/core.h> 19#include <sound/core.h>
18#include <sound/pxa2xx-lib.h> 20#include <sound/pxa2xx-lib.h>
19#include <sound/dmaengine_pcm.h> 21#include <sound/dmaengine_pcm.h>
diff --git a/sound/arm/pxa2xx-pcm.h b/sound/arm/pxa2xx-pcm.h
index 2a8fc08d52a1..00330985beec 100644
--- a/sound/arm/pxa2xx-pcm.h
+++ b/sound/arm/pxa2xx-pcm.h
@@ -9,12 +9,11 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#include <mach/dma.h>
13 12
14struct pxa2xx_runtime_data { 13struct pxa2xx_runtime_data {
15 int dma_ch; 14 int dma_ch;
16 struct snd_dmaengine_dai_dma_data *params; 15 struct snd_dmaengine_dai_dma_data *params;
17 pxa_dma_desc *dma_desc_array; 16 struct pxa_dma_desc *dma_desc_array;
18 dma_addr_t dma_desc_array_phys; 17 dma_addr_t dma_desc_array_phys;
19}; 18};
20 19
diff --git a/sound/isa/es18xx.c b/sound/isa/es18xx.c
index 1c16830af3d8..6faaac60161a 100644
--- a/sound/isa/es18xx.c
+++ b/sound/isa/es18xx.c
@@ -520,7 +520,7 @@ static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip,
520 snd_es18xx_mixer_write(chip, 0x78, 0x93); 520 snd_es18xx_mixer_write(chip, 0x78, 0x93);
521#ifdef AVOID_POPS 521#ifdef AVOID_POPS
522 /* Avoid pops */ 522 /* Avoid pops */
523 udelay(100000); 523 mdelay(100);
524 if (chip->caps & ES18XX_PCM2) 524 if (chip->caps & ES18XX_PCM2)
525 /* Restore Audio 2 volume */ 525 /* Restore Audio 2 volume */
526 snd_es18xx_mixer_write(chip, 0x7C, chip->audio2_vol); 526 snd_es18xx_mixer_write(chip, 0x7C, chip->audio2_vol);
@@ -537,7 +537,7 @@ static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip,
537 /* Stop DMA */ 537 /* Stop DMA */
538 snd_es18xx_mixer_write(chip, 0x78, 0x00); 538 snd_es18xx_mixer_write(chip, 0x78, 0x00);
539#ifdef AVOID_POPS 539#ifdef AVOID_POPS
540 udelay(25000); 540 mdelay(25);
541 if (chip->caps & ES18XX_PCM2) 541 if (chip->caps & ES18XX_PCM2)
542 /* Set Audio 2 volume to 0 */ 542 /* Set Audio 2 volume to 0 */
543 snd_es18xx_mixer_write(chip, 0x7C, 0); 543 snd_es18xx_mixer_write(chip, 0x7C, 0);
@@ -596,7 +596,7 @@ static int snd_es18xx_capture_prepare(struct snd_pcm_substream *substream)
596 snd_es18xx_write(chip, 0xA5, count >> 8); 596 snd_es18xx_write(chip, 0xA5, count >> 8);
597 597
598#ifdef AVOID_POPS 598#ifdef AVOID_POPS
599 udelay(100000); 599 mdelay(100);
600#endif 600#endif
601 601
602 /* Set format */ 602 /* Set format */
@@ -691,7 +691,7 @@ static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip,
691 snd_es18xx_write(chip, 0xB8, 0x05); 691 snd_es18xx_write(chip, 0xB8, 0x05);
692#ifdef AVOID_POPS 692#ifdef AVOID_POPS
693 /* Avoid pops */ 693 /* Avoid pops */
694 udelay(100000); 694 mdelay(100);
695 /* Enable Audio 1 */ 695 /* Enable Audio 1 */
696 snd_es18xx_dsp_command(chip, 0xD1); 696 snd_es18xx_dsp_command(chip, 0xD1);
697#endif 697#endif
@@ -705,7 +705,7 @@ static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip,
705 snd_es18xx_write(chip, 0xB8, 0x00); 705 snd_es18xx_write(chip, 0xB8, 0x00);
706#ifdef AVOID_POPS 706#ifdef AVOID_POPS
707 /* Avoid pops */ 707 /* Avoid pops */
708 udelay(25000); 708 mdelay(25);
709 /* Disable Audio 1 */ 709 /* Disable Audio 1 */
710 snd_es18xx_dsp_command(chip, 0xD3); 710 snd_es18xx_dsp_command(chip, 0xD3);
711#endif 711#endif
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index 248b90abb882..480bbddbd801 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip)
1059 1059
1060 /* reset the corb hw read pointer */ 1060 /* reset the corb hw read pointer */
1061 azx_writew(chip, CORBRP, ICH6_CORBRP_RST); 1061 azx_writew(chip, CORBRP, ICH6_CORBRP_RST);
1062 for (timeout = 1000; timeout > 0; timeout--) { 1062 if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) {
1063 if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) 1063 for (timeout = 1000; timeout > 0; timeout--) {
1064 break; 1064 if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
1065 udelay(1); 1065 break;
1066 } 1066 udelay(1);
1067 if (timeout <= 0) 1067 }
1068 dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", 1068 if (timeout <= 0)
1069 azx_readw(chip, CORBRP)); 1069 dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
1070 azx_readw(chip, CORBRP));
1070 1071
1071 azx_writew(chip, CORBRP, 0); 1072 azx_writew(chip, CORBRP, 0);
1072 for (timeout = 1000; timeout > 0; timeout--) { 1073 for (timeout = 1000; timeout > 0; timeout--) {
1073 if (azx_readw(chip, CORBRP) == 0) 1074 if (azx_readw(chip, CORBRP) == 0)
1074 break; 1075 break;
1075 udelay(1); 1076 udelay(1);
1077 }
1078 if (timeout <= 0)
1079 dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
1080 azx_readw(chip, CORBRP));
1076 } 1081 }
1077 if (timeout <= 0)
1078 dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
1079 azx_readw(chip, CORBRP));
1080 1082
1081 /* enable corb dma */ 1083 /* enable corb dma */
1082 azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); 1084 azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index d6bca62ef387..b540ad71eb0d 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -249,7 +249,8 @@ enum {
249/* quirks for Nvidia */ 249/* quirks for Nvidia */
250#define AZX_DCAPS_PRESET_NVIDIA \ 250#define AZX_DCAPS_PRESET_NVIDIA \
251 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ 251 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
252 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) 252 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
253 AZX_DCAPS_CORBRP_SELF_CLEAR)
253 254
254#define AZX_DCAPS_PRESET_CTHDA \ 255#define AZX_DCAPS_PRESET_CTHDA \
255 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) 256 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h
index ba38b819f984..4a7cb01fa912 100644
--- a/sound/pci/hda/hda_priv.h
+++ b/sound/pci/hda/hda_priv.h
@@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
189#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ 189#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
190#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ 190#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
191#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ 191#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
192#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
192 193
193/* position fix mode */ 194/* position fix mode */
194enum { 195enum {
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 0cb5b89cd0c8..1edbb9c47c2d 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -1127,8 +1127,10 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1127 AMP_OUT_UNMUTE); 1127 AMP_OUT_UNMUTE);
1128 1128
1129 eld = &per_pin->sink_eld; 1129 eld = &per_pin->sink_eld;
1130 if (!eld->monitor_present) 1130 if (!eld->monitor_present) {
1131 hdmi_set_channel_count(codec, per_pin->cvt_nid, channels);
1131 return; 1132 return;
1133 }
1132 1134
1133 if (!non_pcm && per_pin->chmap_set) 1135 if (!non_pcm && per_pin->chmap_set)
1134 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap); 1136 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 14ae979a92ea..5f7c765391f1 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -4621,6 +4621,9 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
4621 SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), 4621 SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
4622 SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), 4622 SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
4623 SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), 4623 SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
4624 SND_PCI_QUIRK(0x1028, 0x0674, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
4625 SND_PCI_QUIRK(0x1028, 0x067e, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
4626 SND_PCI_QUIRK(0x1028, 0x067f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
4624 SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), 4627 SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
4625 SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), 4628 SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
4626 SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), 4629 SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),
@@ -4912,6 +4915,7 @@ static int patch_alc269(struct hda_codec *codec)
4912 spec->codec_variant = ALC269_TYPE_ALC285; 4915 spec->codec_variant = ALC269_TYPE_ALC285;
4913 break; 4916 break;
4914 case 0x10ec0286: 4917 case 0x10ec0286:
4918 case 0x10ec0288:
4915 spec->codec_variant = ALC269_TYPE_ALC286; 4919 spec->codec_variant = ALC269_TYPE_ALC286;
4916 break; 4920 break;
4917 case 0x10ec0255: 4921 case 0x10ec0255:
@@ -5539,6 +5543,8 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = {
5539 SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), 5543 SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
5540 SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_AUTO_MUTE), 5544 SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_AUTO_MUTE),
5541 SND_PCI_QUIRK(0x1028, 0x064e, "Dell", ALC668_FIXUP_AUTO_MUTE), 5545 SND_PCI_QUIRK(0x1028, 0x064e, "Dell", ALC668_FIXUP_AUTO_MUTE),
5546 SND_PCI_QUIRK(0x1028, 0x0696, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
5547 SND_PCI_QUIRK(0x1028, 0x0698, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
5542 SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), 5548 SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800),
5543 SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A), 5549 SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A),
5544 SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_MODE4_CHMAP), 5550 SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_MODE4_CHMAP),
@@ -5781,6 +5787,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = {
5781 { .id = 0x10ec0284, .name = "ALC284", .patch = patch_alc269 }, 5787 { .id = 0x10ec0284, .name = "ALC284", .patch = patch_alc269 },
5782 { .id = 0x10ec0285, .name = "ALC285", .patch = patch_alc269 }, 5788 { .id = 0x10ec0285, .name = "ALC285", .patch = patch_alc269 },
5783 { .id = 0x10ec0286, .name = "ALC286", .patch = patch_alc269 }, 5789 { .id = 0x10ec0286, .name = "ALC286", .patch = patch_alc269 },
5790 { .id = 0x10ec0288, .name = "ALC288", .patch = patch_alc269 },
5784 { .id = 0x10ec0290, .name = "ALC290", .patch = patch_alc269 }, 5791 { .id = 0x10ec0290, .name = "ALC290", .patch = patch_alc269 },
5785 { .id = 0x10ec0292, .name = "ALC292", .patch = patch_alc269 }, 5792 { .id = 0x10ec0292, .name = "ALC292", .patch = patch_alc269 },
5786 { .id = 0x10ec0293, .name = "ALC293", .patch = patch_alc269 }, 5793 { .id = 0x10ec0293, .name = "ALC293", .patch = patch_alc269 },
diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig
index 4789619a52d8..27e3fc4a536b 100644
--- a/sound/soc/atmel/Kconfig
+++ b/sound/soc/atmel/Kconfig
@@ -35,7 +35,7 @@ config SND_AT91_SOC_SAM9G20_WM8731
35 35
36config SND_ATMEL_SOC_WM8904 36config SND_ATMEL_SOC_WM8904
37 tristate "Atmel ASoC driver for boards using WM8904 codec" 37 tristate "Atmel ASoC driver for boards using WM8904 codec"
38 depends on ARCH_AT91 && ATMEL_SSC && SND_ATMEL_SOC 38 depends on ARCH_AT91 && ATMEL_SSC && SND_ATMEL_SOC && I2C
39 select SND_ATMEL_SOC_SSC 39 select SND_ATMEL_SOC_SSC
40 select SND_ATMEL_SOC_DMA 40 select SND_ATMEL_SOC_DMA
41 select SND_SOC_WM8904 41 select SND_SOC_WM8904
diff --git a/sound/soc/atmel/atmel-pcm-pdc.c b/sound/soc/atmel/atmel-pcm-pdc.c
index 33ec592ecd75..a366b3503c28 100644
--- a/sound/soc/atmel/atmel-pcm-pdc.c
+++ b/sound/soc/atmel/atmel-pcm-pdc.c
@@ -76,12 +76,6 @@ struct atmel_runtime_data {
76 size_t period_size; 76 size_t period_size;
77 77
78 dma_addr_t period_ptr; /* physical address of next period */ 78 dma_addr_t period_ptr; /* physical address of next period */
79
80 /* PDC register save */
81 u32 pdc_xpr_save;
82 u32 pdc_xcr_save;
83 u32 pdc_xnpr_save;
84 u32 pdc_xncr_save;
85}; 79};
86 80
87/*--------------------------------------------------------------------------*\ 81/*--------------------------------------------------------------------------*\
@@ -320,67 +314,10 @@ static struct snd_pcm_ops atmel_pcm_ops = {
320 .mmap = atmel_pcm_mmap, 314 .mmap = atmel_pcm_mmap,
321}; 315};
322 316
323
324/*--------------------------------------------------------------------------*\
325 * ASoC platform driver
326\*--------------------------------------------------------------------------*/
327#ifdef CONFIG_PM
328static int atmel_pcm_suspend(struct snd_soc_dai *dai)
329{
330 struct snd_pcm_runtime *runtime = dai->runtime;
331 struct atmel_runtime_data *prtd;
332 struct atmel_pcm_dma_params *params;
333
334 if (!runtime)
335 return 0;
336
337 prtd = runtime->private_data;
338 params = prtd->params;
339
340 /* disable the PDC and save the PDC registers */
341
342 ssc_writel(params->ssc->regs, PDC_PTCR, params->mask->pdc_disable);
343
344 prtd->pdc_xpr_save = ssc_readx(params->ssc->regs, params->pdc->xpr);
345 prtd->pdc_xcr_save = ssc_readx(params->ssc->regs, params->pdc->xcr);
346 prtd->pdc_xnpr_save = ssc_readx(params->ssc->regs, params->pdc->xnpr);
347 prtd->pdc_xncr_save = ssc_readx(params->ssc->regs, params->pdc->xncr);
348
349 return 0;
350}
351
352static int atmel_pcm_resume(struct snd_soc_dai *dai)
353{
354 struct snd_pcm_runtime *runtime = dai->runtime;
355 struct atmel_runtime_data *prtd;
356 struct atmel_pcm_dma_params *params;
357
358 if (!runtime)
359 return 0;
360
361 prtd = runtime->private_data;
362 params = prtd->params;
363
364 /* restore the PDC registers and enable the PDC */
365 ssc_writex(params->ssc->regs, params->pdc->xpr, prtd->pdc_xpr_save);
366 ssc_writex(params->ssc->regs, params->pdc->xcr, prtd->pdc_xcr_save);
367 ssc_writex(params->ssc->regs, params->pdc->xnpr, prtd->pdc_xnpr_save);
368 ssc_writex(params->ssc->regs, params->pdc->xncr, prtd->pdc_xncr_save);
369
370 ssc_writel(params->ssc->regs, PDC_PTCR, params->mask->pdc_enable);
371 return 0;
372}
373#else
374#define atmel_pcm_suspend NULL
375#define atmel_pcm_resume NULL
376#endif
377
378static struct snd_soc_platform_driver atmel_soc_platform = { 317static struct snd_soc_platform_driver atmel_soc_platform = {
379 .ops = &atmel_pcm_ops, 318 .ops = &atmel_pcm_ops,
380 .pcm_new = atmel_pcm_new, 319 .pcm_new = atmel_pcm_new,
381 .pcm_free = atmel_pcm_free, 320 .pcm_free = atmel_pcm_free,
382 .suspend = atmel_pcm_suspend,
383 .resume = atmel_pcm_resume,
384}; 321};
385 322
386int atmel_pcm_pdc_platform_register(struct device *dev) 323int atmel_pcm_pdc_platform_register(struct device *dev)
diff --git a/sound/soc/atmel/snd-soc-afeb9260.c b/sound/soc/atmel/snd-soc-afeb9260.c
index f65f08beac31..9579799ace54 100644
--- a/sound/soc/atmel/snd-soc-afeb9260.c
+++ b/sound/soc/atmel/snd-soc-afeb9260.c
@@ -80,17 +80,6 @@ static const struct snd_soc_dapm_route afeb9260_audio_map[] = {
80 {"MICIN", NULL, "Mic Jack"}, 80 {"MICIN", NULL, "Mic Jack"},
81}; 81};
82 82
83static int afeb9260_tlv320aic23_init(struct snd_soc_pcm_runtime *rtd)
84{
85 struct snd_soc_codec *codec = rtd->codec;
86 struct snd_soc_dapm_context *dapm = &codec->dapm;
87
88 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
89 snd_soc_dapm_enable_pin(dapm, "Line In");
90 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
91
92 return 0;
93}
94 83
95/* Digital audio interface glue - connects codec <--> CPU */ 84/* Digital audio interface glue - connects codec <--> CPU */
96static struct snd_soc_dai_link afeb9260_dai = { 85static struct snd_soc_dai_link afeb9260_dai = {
@@ -100,7 +89,6 @@ static struct snd_soc_dai_link afeb9260_dai = {
100 .codec_dai_name = "tlv320aic23-hifi", 89 .codec_dai_name = "tlv320aic23-hifi",
101 .platform_name = "atmel_pcm-audio", 90 .platform_name = "atmel_pcm-audio",
102 .codec_name = "tlv320aic23-codec.0-001a", 91 .codec_name = "tlv320aic23-codec.0-001a",
103 .init = afeb9260_tlv320aic23_init,
104 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | 92 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
105 SND_SOC_DAIFMT_CBM_CFM, 93 SND_SOC_DAIFMT_CBM_CFM,
106 .ops = &afeb9260_ops, 94 .ops = &afeb9260_ops,
diff --git a/sound/soc/blackfin/Kconfig b/sound/soc/blackfin/Kconfig
index 6347d5910138..6410aa2cc2cf 100644
--- a/sound/soc/blackfin/Kconfig
+++ b/sound/soc/blackfin/Kconfig
@@ -43,6 +43,32 @@ config SND_SOC_BFIN_EVAL_ADAU1373
43 Note: This driver assumes that first ADAU1373 DAI is connected to the 43 Note: This driver assumes that first ADAU1373 DAI is connected to the
44 first SPORT port on the BF5XX board. 44 first SPORT port on the BF5XX board.
45 45
46config SND_SOC_BFIN_EVAL_ADAU1X61
47 tristate "Support for the EVAL-ADAU1X61 board on Blackfin eval boards"
48 depends on SND_BF5XX_I2S && I2C
49 select SND_BF5XX_SOC_I2S
50 select SND_SOC_ADAU1761_I2C
51 help
52 Say Y if you want to add support for the Analog Devices EVAL-ADAU1X61
53 board connected to one of the Blackfin evaluation boards like the
54 BF5XX-STAMP or BF5XX-EZKIT.
55
56 Note: This driver assumes that the ADAU1X61 is connected to the
57 first SPORT port on the BF5XX board.
58
59config SND_SOC_BFIN_EVAL_ADAU1X81
60 tristate "Support for the EVAL-ADAU1X81 boards on Blackfin eval boards"
61 depends on SND_BF5XX_I2S && I2C
62 select SND_BF5XX_SOC_I2S
63 select SND_SOC_ADAU1781_I2C
64 help
65 Say Y if you want to add support for the Analog Devices EVAL-ADAU1X81
66 board connected to one of the Blackfin evaluation boards like the
67 BF5XX-STAMP or BF5XX-EZKIT.
68
69 Note: This driver assumes that the ADAU1X81 is connected to the
70 first SPORT port on the BF5XX board.
71
46config SND_SOC_BFIN_EVAL_ADAV80X 72config SND_SOC_BFIN_EVAL_ADAV80X
47 tristate "Support for the EVAL-ADAV80X boards on Blackfin eval boards" 73 tristate "Support for the EVAL-ADAV80X boards on Blackfin eval boards"
48 depends on SND_BF5XX_I2S && SND_SOC_I2C_AND_SPI 74 depends on SND_BF5XX_I2S && SND_SOC_I2C_AND_SPI
diff --git a/sound/soc/blackfin/Makefile b/sound/soc/blackfin/Makefile
index ad0a6e99bc5d..f21e948b2e9b 100644
--- a/sound/soc/blackfin/Makefile
+++ b/sound/soc/blackfin/Makefile
@@ -22,6 +22,8 @@ snd-ssm2602-objs := bf5xx-ssm2602.o
22snd-ad73311-objs := bf5xx-ad73311.o 22snd-ad73311-objs := bf5xx-ad73311.o
23snd-ad193x-objs := bf5xx-ad193x.o 23snd-ad193x-objs := bf5xx-ad193x.o
24snd-soc-bfin-eval-adau1373-objs := bfin-eval-adau1373.o 24snd-soc-bfin-eval-adau1373-objs := bfin-eval-adau1373.o
25snd-soc-bfin-eval-adau1x61-objs := bfin-eval-adau1x61.o
26snd-soc-bfin-eval-adau1x81-objs := bfin-eval-adau1x81.o
25snd-soc-bfin-eval-adau1701-objs := bfin-eval-adau1701.o 27snd-soc-bfin-eval-adau1701-objs := bfin-eval-adau1701.o
26snd-soc-bfin-eval-adav80x-objs := bfin-eval-adav80x.o 28snd-soc-bfin-eval-adav80x-objs := bfin-eval-adav80x.o
27 29
@@ -31,5 +33,7 @@ obj-$(CONFIG_SND_BF5XX_SOC_SSM2602) += snd-ssm2602.o
31obj-$(CONFIG_SND_BF5XX_SOC_AD73311) += snd-ad73311.o 33obj-$(CONFIG_SND_BF5XX_SOC_AD73311) += snd-ad73311.o
32obj-$(CONFIG_SND_BF5XX_SOC_AD193X) += snd-ad193x.o 34obj-$(CONFIG_SND_BF5XX_SOC_AD193X) += snd-ad193x.o
33obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) += snd-soc-bfin-eval-adau1373.o 35obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) += snd-soc-bfin-eval-adau1373.o
36obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) += snd-soc-bfin-eval-adau1x61.o
37obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X81) += snd-soc-bfin-eval-adau1x81.o
34obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) += snd-soc-bfin-eval-adau1701.o 38obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) += snd-soc-bfin-eval-adau1701.o
35obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) += snd-soc-bfin-eval-adav80x.o 39obj-$(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) += snd-soc-bfin-eval-adav80x.o
diff --git a/sound/soc/blackfin/bfin-eval-adau1x61.c b/sound/soc/blackfin/bfin-eval-adau1x61.c
new file mode 100644
index 000000000000..3011906f9d3b
--- /dev/null
+++ b/sound/soc/blackfin/bfin-eval-adau1x61.c
@@ -0,0 +1,142 @@
1/*
2 * Machine driver for EVAL-ADAU1x61MINIZ on Analog Devices bfin
3 * evaluation boards.
4 *
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/module.h>
12#include <linux/device.h>
13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/pcm.h>
16#include <sound/soc.h>
17#include <sound/pcm_params.h>
18
19#include "../codecs/adau17x1.h"
20
21static const struct snd_soc_dapm_widget bfin_eval_adau1x61_dapm_widgets[] = {
22 SND_SOC_DAPM_LINE("In 1", NULL),
23 SND_SOC_DAPM_LINE("In 2", NULL),
24 SND_SOC_DAPM_LINE("In 3-4", NULL),
25
26 SND_SOC_DAPM_LINE("Diff Out L", NULL),
27 SND_SOC_DAPM_LINE("Diff Out R", NULL),
28 SND_SOC_DAPM_LINE("Stereo Out", NULL),
29 SND_SOC_DAPM_HP("Capless HP Out", NULL),
30};
31
32static const struct snd_soc_dapm_route bfin_eval_adau1x61_dapm_routes[] = {
33 { "LAUX", NULL, "In 3-4" },
34 { "RAUX", NULL, "In 3-4" },
35 { "LINP", NULL, "In 1" },
36 { "LINN", NULL, "In 1"},
37 { "RINP", NULL, "In 2" },
38 { "RINN", NULL, "In 2" },
39
40 { "In 1", NULL, "MICBIAS" },
41 { "In 2", NULL, "MICBIAS" },
42
43 { "Capless HP Out", NULL, "LHP" },
44 { "Capless HP Out", NULL, "RHP" },
45 { "Diff Out L", NULL, "LOUT" },
46 { "Diff Out R", NULL, "ROUT" },
47 { "Stereo Out", NULL, "LOUT" },
48 { "Stereo Out", NULL, "ROUT" },
49};
50
51static int bfin_eval_adau1x61_hw_params(struct snd_pcm_substream *substream,
52 struct snd_pcm_hw_params *params)
53{
54 struct snd_soc_pcm_runtime *rtd = substream->private_data;
55 struct snd_soc_dai *codec_dai = rtd->codec_dai;
56 int pll_rate;
57 int ret;
58
59 switch (params_rate(params)) {
60 case 48000:
61 case 8000:
62 case 12000:
63 case 16000:
64 case 24000:
65 case 32000:
66 case 96000:
67 pll_rate = 48000 * 1024;
68 break;
69 case 44100:
70 case 7350:
71 case 11025:
72 case 14700:
73 case 22050:
74 case 29400:
75 case 88200:
76 pll_rate = 44100 * 1024;
77 break;
78 default:
79 return -EINVAL;
80 }
81
82 ret = snd_soc_dai_set_pll(codec_dai, ADAU17X1_PLL,
83 ADAU17X1_PLL_SRC_MCLK, 12288000, pll_rate);
84 if (ret)
85 return ret;
86
87 ret = snd_soc_dai_set_sysclk(codec_dai, ADAU17X1_CLK_SRC_PLL, pll_rate,
88 SND_SOC_CLOCK_IN);
89
90 return ret;
91}
92
93static const struct snd_soc_ops bfin_eval_adau1x61_ops = {
94 .hw_params = bfin_eval_adau1x61_hw_params,
95};
96
97static struct snd_soc_dai_link bfin_eval_adau1x61_dai = {
98 .name = "adau1x61",
99 .stream_name = "adau1x61",
100 .cpu_dai_name = "bfin-i2s.0",
101 .codec_dai_name = "adau-hifi",
102 .platform_name = "bfin-i2s-pcm-audio",
103 .codec_name = "adau1761.0-0038",
104 .ops = &bfin_eval_adau1x61_ops,
105 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
106 SND_SOC_DAIFMT_CBM_CFM,
107};
108
109static struct snd_soc_card bfin_eval_adau1x61 = {
110 .name = "bfin-eval-adau1x61",
111 .driver_name = "eval-adau1x61",
112 .dai_link = &bfin_eval_adau1x61_dai,
113 .num_links = 1,
114
115 .dapm_widgets = bfin_eval_adau1x61_dapm_widgets,
116 .num_dapm_widgets = ARRAY_SIZE(bfin_eval_adau1x61_dapm_widgets),
117 .dapm_routes = bfin_eval_adau1x61_dapm_routes,
118 .num_dapm_routes = ARRAY_SIZE(bfin_eval_adau1x61_dapm_routes),
119 .fully_routed = true,
120};
121
122static int bfin_eval_adau1x61_probe(struct platform_device *pdev)
123{
124 bfin_eval_adau1x61.dev = &pdev->dev;
125
126 return devm_snd_soc_register_card(&pdev->dev, &bfin_eval_adau1x61);
127}
128
129static struct platform_driver bfin_eval_adau1x61_driver = {
130 .driver = {
131 .name = "bfin-eval-adau1x61",
132 .owner = THIS_MODULE,
133 .pm = &snd_soc_pm_ops,
134 },
135 .probe = bfin_eval_adau1x61_probe,
136};
137module_platform_driver(bfin_eval_adau1x61_driver);
138
139MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
140MODULE_DESCRIPTION("ALSA SoC bfin adau1x61 driver");
141MODULE_LICENSE("GPL");
142MODULE_ALIAS("platform:bfin-eval-adau1x61");
diff --git a/sound/soc/blackfin/bfin-eval-adau1x81.c b/sound/soc/blackfin/bfin-eval-adau1x81.c
new file mode 100644
index 000000000000..5c380f6aed1a
--- /dev/null
+++ b/sound/soc/blackfin/bfin-eval-adau1x81.c
@@ -0,0 +1,130 @@
1/*
2 * Machine driver for EVAL-ADAU1x81 on Analog Devices bfin
3 * evaluation boards.
4 *
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/module.h>
12#include <linux/device.h>
13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/pcm.h>
16#include <sound/soc.h>
17#include <sound/pcm_params.h>
18
19#include "../codecs/adau17x1.h"
20
21static const struct snd_soc_dapm_widget bfin_eval_adau1x81_dapm_widgets[] = {
22 SND_SOC_DAPM_LINE("Stereo In", NULL),
23 SND_SOC_DAPM_LINE("Beep", NULL),
24
25 SND_SOC_DAPM_SPK("Speaker", NULL),
26 SND_SOC_DAPM_HP("Headphone", NULL),
27};
28
29static const struct snd_soc_dapm_route bfin_eval_adau1x81_dapm_routes[] = {
30 { "BEEP", NULL, "Beep" },
31 { "LMIC", NULL, "Stereo In" },
32 { "LMIC", NULL, "Stereo In" },
33
34 { "Headphone", NULL, "AOUTL" },
35 { "Headphone", NULL, "AOUTR" },
36 { "Speaker", NULL, "SP" },
37};
38
39static int bfin_eval_adau1x81_hw_params(struct snd_pcm_substream *substream,
40 struct snd_pcm_hw_params *params)
41{
42 struct snd_soc_pcm_runtime *rtd = substream->private_data;
43 struct snd_soc_dai *codec_dai = rtd->codec_dai;
44 int pll_rate;
45 int ret;
46
47 switch (params_rate(params)) {
48 case 48000:
49 case 8000:
50 case 12000:
51 case 16000:
52 case 24000:
53 case 32000:
54 case 96000:
55 pll_rate = 48000 * 1024;
56 break;
57 case 44100:
58 case 7350:
59 case 11025:
60 case 14700:
61 case 22050:
62 case 29400:
63 case 88200:
64 pll_rate = 44100 * 1024;
65 break;
66 default:
67 return -EINVAL;
68 }
69
70 ret = snd_soc_dai_set_pll(codec_dai, ADAU17X1_PLL,
71 ADAU17X1_PLL_SRC_MCLK, 12288000, pll_rate);
72 if (ret)
73 return ret;
74
75 ret = snd_soc_dai_set_sysclk(codec_dai, ADAU17X1_CLK_SRC_PLL, pll_rate,
76 SND_SOC_CLOCK_IN);
77
78 return ret;
79}
80
81static const struct snd_soc_ops bfin_eval_adau1x81_ops = {
82 .hw_params = bfin_eval_adau1x81_hw_params,
83};
84
85static struct snd_soc_dai_link bfin_eval_adau1x81_dai = {
86 .name = "adau1x81",
87 .stream_name = "adau1x81",
88 .cpu_dai_name = "bfin-i2s.0",
89 .codec_dai_name = "adau-hifi",
90 .platform_name = "bfin-i2s-pcm-audio",
91 .codec_name = "adau1781.0-0038",
92 .ops = &bfin_eval_adau1x81_ops,
93 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
94 SND_SOC_DAIFMT_CBM_CFM,
95};
96
97static struct snd_soc_card bfin_eval_adau1x81 = {
98 .name = "bfin-eval-adau1x81",
99 .driver_name = "eval-adau1x81",
100 .dai_link = &bfin_eval_adau1x81_dai,
101 .num_links = 1,
102
103 .dapm_widgets = bfin_eval_adau1x81_dapm_widgets,
104 .num_dapm_widgets = ARRAY_SIZE(bfin_eval_adau1x81_dapm_widgets),
105 .dapm_routes = bfin_eval_adau1x81_dapm_routes,
106 .num_dapm_routes = ARRAY_SIZE(bfin_eval_adau1x81_dapm_routes),
107 .fully_routed = true,
108};
109
110static int bfin_eval_adau1x81_probe(struct platform_device *pdev)
111{
112 bfin_eval_adau1x81.dev = &pdev->dev;
113
114 return devm_snd_soc_register_card(&pdev->dev, &bfin_eval_adau1x81);
115}
116
117static struct platform_driver bfin_eval_adau1x81_driver = {
118 .driver = {
119 .name = "bfin-eval-adau1x81",
120 .owner = THIS_MODULE,
121 .pm = &snd_soc_pm_ops,
122 },
123 .probe = bfin_eval_adau1x81_probe,
124};
125module_platform_driver(bfin_eval_adau1x81_driver);
126
127MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
128MODULE_DESCRIPTION("ALSA SoC bfin adau1x81 driver");
129MODULE_LICENSE("GPL");
130MODULE_ALIAS("platform:bfin-eval-adau1x81");
diff --git a/sound/soc/codecs/88pm860x-codec.c b/sound/soc/codecs/88pm860x-codec.c
index b07e17160f94..3c4b10ff48c1 100644
--- a/sound/soc/codecs/88pm860x-codec.c
+++ b/sound/soc/codecs/88pm860x-codec.c
@@ -276,7 +276,7 @@ static int snd_soc_get_volsw_2r_st(struct snd_kcontrol *kcontrol,
276{ 276{
277 struct soc_mixer_control *mc = 277 struct soc_mixer_control *mc =
278 (struct soc_mixer_control *)kcontrol->private_value; 278 (struct soc_mixer_control *)kcontrol->private_value;
279 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 279 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
280 unsigned int reg = mc->reg; 280 unsigned int reg = mc->reg;
281 unsigned int reg2 = mc->rreg; 281 unsigned int reg2 = mc->rreg;
282 int val[2], val2[2], i; 282 int val[2], val2[2], i;
@@ -300,7 +300,7 @@ static int snd_soc_put_volsw_2r_st(struct snd_kcontrol *kcontrol,
300{ 300{
301 struct soc_mixer_control *mc = 301 struct soc_mixer_control *mc =
302 (struct soc_mixer_control *)kcontrol->private_value; 302 (struct soc_mixer_control *)kcontrol->private_value;
303 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 303 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
304 unsigned int reg = mc->reg; 304 unsigned int reg = mc->reg;
305 unsigned int reg2 = mc->rreg; 305 unsigned int reg2 = mc->rreg;
306 int err; 306 int err;
@@ -333,7 +333,7 @@ static int snd_soc_get_volsw_2r_out(struct snd_kcontrol *kcontrol,
333{ 333{
334 struct soc_mixer_control *mc = 334 struct soc_mixer_control *mc =
335 (struct soc_mixer_control *)kcontrol->private_value; 335 (struct soc_mixer_control *)kcontrol->private_value;
336 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 336 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
337 unsigned int reg = mc->reg; 337 unsigned int reg = mc->reg;
338 unsigned int reg2 = mc->rreg; 338 unsigned int reg2 = mc->rreg;
339 unsigned int shift = mc->shift; 339 unsigned int shift = mc->shift;
@@ -353,7 +353,7 @@ static int snd_soc_put_volsw_2r_out(struct snd_kcontrol *kcontrol,
353{ 353{
354 struct soc_mixer_control *mc = 354 struct soc_mixer_control *mc =
355 (struct soc_mixer_control *)kcontrol->private_value; 355 (struct soc_mixer_control *)kcontrol->private_value;
356 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 356 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
357 unsigned int reg = mc->reg; 357 unsigned int reg = mc->reg;
358 unsigned int reg2 = mc->rreg; 358 unsigned int reg2 = mc->rreg;
359 unsigned int shift = mc->shift; 359 unsigned int shift = mc->shift;
@@ -1327,10 +1327,6 @@ static int pm860x_probe(struct snd_soc_codec *codec)
1327 1327
1328 pm860x->codec = codec; 1328 pm860x->codec = codec;
1329 1329
1330 ret = snd_soc_codec_set_cache_io(codec, pm860x->regmap);
1331 if (ret)
1332 return ret;
1333
1334 for (i = 0; i < 4; i++) { 1330 for (i = 0; i < 4; i++) {
1335 ret = request_threaded_irq(pm860x->irq[i], NULL, 1331 ret = request_threaded_irq(pm860x->irq[i], NULL,
1336 pm860x_codec_handler, IRQF_ONESHOT, 1332 pm860x_codec_handler, IRQF_ONESHOT,
@@ -1362,10 +1358,18 @@ static int pm860x_remove(struct snd_soc_codec *codec)
1362 return 0; 1358 return 0;
1363} 1359}
1364 1360
1361static struct regmap *pm860x_get_regmap(struct device *dev)
1362{
1363 struct pm860x_priv *pm860x = dev_get_drvdata(dev);
1364
1365 return pm860x->regmap;
1366}
1367
1365static struct snd_soc_codec_driver soc_codec_dev_pm860x = { 1368static struct snd_soc_codec_driver soc_codec_dev_pm860x = {
1366 .probe = pm860x_probe, 1369 .probe = pm860x_probe,
1367 .remove = pm860x_remove, 1370 .remove = pm860x_remove,
1368 .set_bias_level = pm860x_set_bias_level, 1371 .set_bias_level = pm860x_set_bias_level,
1372 .get_regmap = pm860x_get_regmap,
1369 1373
1370 .controls = pm860x_snd_controls, 1374 .controls = pm860x_snd_controls,
1371 .num_controls = ARRAY_SIZE(pm860x_snd_controls), 1375 .num_controls = ARRAY_SIZE(pm860x_snd_controls),
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index f0e840137887..cbfa1e18f651 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -23,6 +23,10 @@ config SND_SOC_ALL_CODECS
23 select SND_SOC_AD1980 if SND_SOC_AC97_BUS 23 select SND_SOC_AD1980 if SND_SOC_AC97_BUS
24 select SND_SOC_AD73311 24 select SND_SOC_AD73311
25 select SND_SOC_ADAU1373 if I2C 25 select SND_SOC_ADAU1373 if I2C
26 select SND_SOC_ADAU1761_I2C if I2C
27 select SND_SOC_ADAU1761_SPI if SPI
28 select SND_SOC_ADAU1781_I2C if I2C
29 select SND_SOC_ADAU1781_SPI if SPI
26 select SND_SOC_ADAV801 if SPI_MASTER 30 select SND_SOC_ADAV801 if SPI_MASTER
27 select SND_SOC_ADAV803 if I2C 31 select SND_SOC_ADAV803 if I2C
28 select SND_SOC_ADAU1977_SPI if SPI_MASTER 32 select SND_SOC_ADAU1977_SPI if SPI_MASTER
@@ -39,8 +43,9 @@ config SND_SOC_ALL_CODECS
39 select SND_SOC_ALC5623 if I2C 43 select SND_SOC_ALC5623 if I2C
40 select SND_SOC_ALC5632 if I2C 44 select SND_SOC_ALC5632 if I2C
41 select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC 45 select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC
42 select SND_SOC_CS42L51 if I2C 46 select SND_SOC_CS42L51_I2C if I2C
43 select SND_SOC_CS42L52 if I2C 47 select SND_SOC_CS42L52 if I2C && INPUT
48 select SND_SOC_CS42L56 if I2C && INPUT
44 select SND_SOC_CS42L73 if I2C 49 select SND_SOC_CS42L73 if I2C
45 select SND_SOC_CS4270 if I2C 50 select SND_SOC_CS4270 if I2C
46 select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI 51 select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI
@@ -71,6 +76,9 @@ config SND_SOC_ALL_CODECS
71 select SND_SOC_PCM512x_SPI if SPI_MASTER 76 select SND_SOC_PCM512x_SPI if SPI_MASTER
72 select SND_SOC_RT5631 if I2C 77 select SND_SOC_RT5631 if I2C
73 select SND_SOC_RT5640 if I2C 78 select SND_SOC_RT5640 if I2C
79 select SND_SOC_RT5645 if I2C
80 select SND_SOC_RT5651 if I2C
81 select SND_SOC_RT5677 if I2C
74 select SND_SOC_SGTL5000 if I2C 82 select SND_SOC_SGTL5000 if I2C
75 select SND_SOC_SI476X if MFD_SI476X_CORE 83 select SND_SOC_SI476X if MFD_SI476X_CORE
76 select SND_SOC_SIRF_AUDIO_CODEC 84 select SND_SOC_SIRF_AUDIO_CODEC
@@ -80,6 +88,7 @@ config SND_SOC_ALL_CODECS
80 select SND_SOC_SSM2602_SPI if SPI_MASTER 88 select SND_SOC_SSM2602_SPI if SPI_MASTER
81 select SND_SOC_SSM2602_I2C if I2C 89 select SND_SOC_SSM2602_I2C if I2C
82 select SND_SOC_STA32X if I2C 90 select SND_SOC_STA32X if I2C
91 select SND_SOC_STA350 if I2C
83 select SND_SOC_STA529 if I2C 92 select SND_SOC_STA529 if I2C
84 select SND_SOC_STAC9766 if SND_SOC_AC97_BUS 93 select SND_SOC_STAC9766 if SND_SOC_AC97_BUS
85 select SND_SOC_TAS5086 if I2C 94 select SND_SOC_TAS5086 if I2C
@@ -127,7 +136,7 @@ config SND_SOC_ALL_CODECS
127 select SND_SOC_WM8955 if I2C 136 select SND_SOC_WM8955 if I2C
128 select SND_SOC_WM8960 if I2C 137 select SND_SOC_WM8960 if I2C
129 select SND_SOC_WM8961 if I2C 138 select SND_SOC_WM8961 if I2C
130 select SND_SOC_WM8962 if I2C 139 select SND_SOC_WM8962 if I2C && INPUT
131 select SND_SOC_WM8971 if I2C 140 select SND_SOC_WM8971 if I2C
132 select SND_SOC_WM8974 if I2C 141 select SND_SOC_WM8974 if I2C
133 select SND_SOC_WM8978 if I2C 142 select SND_SOC_WM8978 if I2C
@@ -210,13 +219,45 @@ config SND_SOC_AD1980
210config SND_SOC_AD73311 219config SND_SOC_AD73311
211 tristate 220 tristate
212 221
222config SND_SOC_ADAU1373
223 tristate
224
213config SND_SOC_ADAU1701 225config SND_SOC_ADAU1701
214 tristate "Analog Devices ADAU1701 CODEC" 226 tristate "Analog Devices ADAU1701 CODEC"
215 depends on I2C 227 depends on I2C
216 select SND_SOC_SIGMADSP 228 select SND_SOC_SIGMADSP
217 229
218config SND_SOC_ADAU1373 230config SND_SOC_ADAU17X1
231 tristate
232 select SND_SOC_SIGMADSP
233
234config SND_SOC_ADAU1761
235 tristate
236 select SND_SOC_ADAU17X1
237
238config SND_SOC_ADAU1761_I2C
239 tristate
240 select SND_SOC_ADAU1761
241 select REGMAP_I2C
242
243config SND_SOC_ADAU1761_SPI
244 tristate
245 select SND_SOC_ADAU1761
246 select REGMAP_SPI
247
248config SND_SOC_ADAU1781
249 select SND_SOC_ADAU17X1
250 tristate
251
252config SND_SOC_ADAU1781_I2C
253 tristate
254 select SND_SOC_ADAU1781
255 select REGMAP_I2C
256
257config SND_SOC_ADAU1781_SPI
219 tristate 258 tristate
259 select SND_SOC_ADAU1781
260 select REGMAP_SPI
220 261
221config SND_SOC_ADAU1977 262config SND_SOC_ADAU1977
222 tristate 263 tristate
@@ -269,7 +310,8 @@ config SND_SOC_AK5386
269 tristate "AKM AK5638 CODEC" 310 tristate "AKM AK5638 CODEC"
270 311
271config SND_SOC_ALC5623 312config SND_SOC_ALC5623
272 tristate 313 tristate "Realtek ALC5623 CODEC"
314 depends on I2C
273 315
274config SND_SOC_ALC5632 316config SND_SOC_ALC5632
275 tristate 317 tristate
@@ -280,9 +322,17 @@ config SND_SOC_CQ0093VC
280config SND_SOC_CS42L51 322config SND_SOC_CS42L51
281 tristate 323 tristate
282 324
325config SND_SOC_CS42L51_I2C
326 tristate
327 select SND_SOC_CS42L51
328
283config SND_SOC_CS42L52 329config SND_SOC_CS42L52
284 tristate "Cirrus Logic CS42L52 CODEC" 330 tristate "Cirrus Logic CS42L52 CODEC"
285 depends on I2C 331 depends on I2C && INPUT
332
333config SND_SOC_CS42L56
334 tristate "Cirrus Logic CS42L56 CODEC"
335 depends on I2C && INPUT
286 336
287config SND_SOC_CS42L73 337config SND_SOC_CS42L73
288 tristate "Cirrus Logic CS42L73 CODEC" 338 tristate "Cirrus Logic CS42L73 CODEC"
@@ -390,12 +440,30 @@ config SND_SOC_PCM512x_SPI
390 select SND_SOC_PCM512x 440 select SND_SOC_PCM512x
391 select REGMAP_SPI 441 select REGMAP_SPI
392 442
443config SND_SOC_RL6231
444 tristate
445 default y if SND_SOC_RT5640=y
446 default y if SND_SOC_RT5645=y
447 default y if SND_SOC_RT5651=y
448 default m if SND_SOC_RT5640=m
449 default m if SND_SOC_RT5645=m
450 default m if SND_SOC_RT5651=m
451
393config SND_SOC_RT5631 452config SND_SOC_RT5631
394 tristate 453 tristate
395 454
396config SND_SOC_RT5640 455config SND_SOC_RT5640
397 tristate 456 tristate
398 457
458config SND_SOC_RT5645
459 tristate
460
461config SND_SOC_RT5651
462 tristate
463
464config SND_SOC_RT5677
465 tristate
466
399#Freescale sgtl5000 codec 467#Freescale sgtl5000 codec
400config SND_SOC_SGTL5000 468config SND_SOC_SGTL5000
401 tristate "Freescale SGTL5000 CODEC" 469 tristate "Freescale SGTL5000 CODEC"
@@ -435,6 +503,10 @@ config SND_SOC_SSM2602_I2C
435config SND_SOC_STA32X 503config SND_SOC_STA32X
436 tristate 504 tristate
437 505
506config SND_SOC_STA350
507 tristate "STA350 speaker amplifier"
508 depends on I2C
509
438config SND_SOC_STA529 510config SND_SOC_STA529
439 tristate 511 tristate
440 512
@@ -598,7 +670,7 @@ config SND_SOC_WM8961
598 670
599config SND_SOC_WM8962 671config SND_SOC_WM8962
600 tristate "Wolfson Microelectronics WM8962 CODEC" 672 tristate "Wolfson Microelectronics WM8962 CODEC"
601 depends on I2C 673 depends on I2C && INPUT
602 674
603config SND_SOC_WM8971 675config SND_SOC_WM8971
604 tristate 676 tristate
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 3c4d275d064b..be3377b8d73f 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -7,8 +7,15 @@ snd-soc-ad193x-spi-objs := ad193x-spi.o
7snd-soc-ad193x-i2c-objs := ad193x-i2c.o 7snd-soc-ad193x-i2c-objs := ad193x-i2c.o
8snd-soc-ad1980-objs := ad1980.o 8snd-soc-ad1980-objs := ad1980.o
9snd-soc-ad73311-objs := ad73311.o 9snd-soc-ad73311-objs := ad73311.o
10snd-soc-adau1701-objs := adau1701.o
11snd-soc-adau1373-objs := adau1373.o 10snd-soc-adau1373-objs := adau1373.o
11snd-soc-adau1701-objs := adau1701.o
12snd-soc-adau17x1-objs := adau17x1.o
13snd-soc-adau1761-objs := adau1761.o
14snd-soc-adau1761-i2c-objs := adau1761-i2c.o
15snd-soc-adau1761-spi-objs := adau1761-spi.o
16snd-soc-adau1781-objs := adau1781.o
17snd-soc-adau1781-i2c-objs := adau1781-i2c.o
18snd-soc-adau1781-spi-objs := adau1781-spi.o
12snd-soc-adau1977-objs := adau1977.o 19snd-soc-adau1977-objs := adau1977.o
13snd-soc-adau1977-spi-objs := adau1977-spi.o 20snd-soc-adau1977-spi-objs := adau1977-spi.o
14snd-soc-adau1977-i2c-objs := adau1977-i2c.o 21snd-soc-adau1977-i2c-objs := adau1977-i2c.o
@@ -26,7 +33,9 @@ snd-soc-ak5386-objs := ak5386.o
26snd-soc-arizona-objs := arizona.o 33snd-soc-arizona-objs := arizona.o
27snd-soc-cq93vc-objs := cq93vc.o 34snd-soc-cq93vc-objs := cq93vc.o
28snd-soc-cs42l51-objs := cs42l51.o 35snd-soc-cs42l51-objs := cs42l51.o
36snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o
29snd-soc-cs42l52-objs := cs42l52.o 37snd-soc-cs42l52-objs := cs42l52.o
38snd-soc-cs42l56-objs := cs42l56.o
30snd-soc-cs42l73-objs := cs42l73.o 39snd-soc-cs42l73-objs := cs42l73.o
31snd-soc-cs4270-objs := cs4270.o 40snd-soc-cs4270-objs := cs4270.o
32snd-soc-cs4271-objs := cs4271.o 41snd-soc-cs4271-objs := cs4271.o
@@ -58,8 +67,12 @@ snd-soc-pcm3008-objs := pcm3008.o
58snd-soc-pcm512x-objs := pcm512x.o 67snd-soc-pcm512x-objs := pcm512x.o
59snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o 68snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o
60snd-soc-pcm512x-spi-objs := pcm512x-spi.o 69snd-soc-pcm512x-spi-objs := pcm512x-spi.o
70snd-soc-rl6231-objs := rl6231.o
61snd-soc-rt5631-objs := rt5631.o 71snd-soc-rt5631-objs := rt5631.o
62snd-soc-rt5640-objs := rt5640.o 72snd-soc-rt5640-objs := rt5640.o
73snd-soc-rt5645-objs := rt5645.o
74snd-soc-rt5651-objs := rt5651.o
75snd-soc-rt5677-objs := rt5677.o
63snd-soc-sgtl5000-objs := sgtl5000.o 76snd-soc-sgtl5000-objs := sgtl5000.o
64snd-soc-alc5623-objs := alc5623.o 77snd-soc-alc5623-objs := alc5623.o
65snd-soc-alc5632-objs := alc5632.o 78snd-soc-alc5632-objs := alc5632.o
@@ -74,6 +87,7 @@ snd-soc-ssm2602-objs := ssm2602.o
74snd-soc-ssm2602-spi-objs := ssm2602-spi.o 87snd-soc-ssm2602-spi-objs := ssm2602-spi.o
75snd-soc-ssm2602-i2c-objs := ssm2602-i2c.o 88snd-soc-ssm2602-i2c-objs := ssm2602-i2c.o
76snd-soc-sta32x-objs := sta32x.o 89snd-soc-sta32x-objs := sta32x.o
90snd-soc-sta350-objs := sta350.o
77snd-soc-sta529-objs := sta529.o 91snd-soc-sta529-objs := sta529.o
78snd-soc-stac9766-objs := stac9766.o 92snd-soc-stac9766-objs := stac9766.o
79snd-soc-tas5086-objs := tas5086.o 93snd-soc-tas5086-objs := tas5086.o
@@ -157,10 +171,17 @@ obj-$(CONFIG_SND_SOC_AD193X_I2C) += snd-soc-ad193x-i2c.o
157obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o 171obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o
158obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o 172obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
159obj-$(CONFIG_SND_SOC_ADAU1373) += snd-soc-adau1373.o 173obj-$(CONFIG_SND_SOC_ADAU1373) += snd-soc-adau1373.o
174obj-$(CONFIG_SND_SOC_ADAU1701) += snd-soc-adau1701.o
175obj-$(CONFIG_SND_SOC_ADAU17X1) += snd-soc-adau17x1.o
176obj-$(CONFIG_SND_SOC_ADAU1761) += snd-soc-adau1761.o
177obj-$(CONFIG_SND_SOC_ADAU1761_I2C) += snd-soc-adau1761-i2c.o
178obj-$(CONFIG_SND_SOC_ADAU1761_SPI) += snd-soc-adau1761-spi.o
179obj-$(CONFIG_SND_SOC_ADAU1781) += snd-soc-adau1781.o
180obj-$(CONFIG_SND_SOC_ADAU1781_I2C) += snd-soc-adau1781-i2c.o
181obj-$(CONFIG_SND_SOC_ADAU1781_SPI) += snd-soc-adau1781-spi.o
160obj-$(CONFIG_SND_SOC_ADAU1977) += snd-soc-adau1977.o 182obj-$(CONFIG_SND_SOC_ADAU1977) += snd-soc-adau1977.o
161obj-$(CONFIG_SND_SOC_ADAU1977_SPI) += snd-soc-adau1977-spi.o 183obj-$(CONFIG_SND_SOC_ADAU1977_SPI) += snd-soc-adau1977-spi.o
162obj-$(CONFIG_SND_SOC_ADAU1977_I2C) += snd-soc-adau1977-i2c.o 184obj-$(CONFIG_SND_SOC_ADAU1977_I2C) += snd-soc-adau1977-i2c.o
163obj-$(CONFIG_SND_SOC_ADAU1701) += snd-soc-adau1701.o
164obj-$(CONFIG_SND_SOC_ADAV80X) += snd-soc-adav80x.o 185obj-$(CONFIG_SND_SOC_ADAV80X) += snd-soc-adav80x.o
165obj-$(CONFIG_SND_SOC_ADAV801) += snd-soc-adav801.o 186obj-$(CONFIG_SND_SOC_ADAV801) += snd-soc-adav801.o
166obj-$(CONFIG_SND_SOC_ADAV803) += snd-soc-adav803.o 187obj-$(CONFIG_SND_SOC_ADAV803) += snd-soc-adav803.o
@@ -177,7 +198,9 @@ obj-$(CONFIG_SND_SOC_ALC5632) += snd-soc-alc5632.o
177obj-$(CONFIG_SND_SOC_ARIZONA) += snd-soc-arizona.o 198obj-$(CONFIG_SND_SOC_ARIZONA) += snd-soc-arizona.o
178obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o 199obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o
179obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o 200obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o
201obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o
180obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o 202obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o
203obj-$(CONFIG_SND_SOC_CS42L56) += snd-soc-cs42l56.o
181obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o 204obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o
182obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o 205obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o
183obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o 206obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o
@@ -209,8 +232,12 @@ obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o
209obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o 232obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o
210obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o 233obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o
211obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o 234obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o
235obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o
212obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o 236obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o
213obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o 237obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o
238obj-$(CONFIG_SND_SOC_RT5645) += snd-soc-rt5645.o
239obj-$(CONFIG_SND_SOC_RT5651) += snd-soc-rt5651.o
240obj-$(CONFIG_SND_SOC_RT5677) += snd-soc-rt5677.o
214obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o 241obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o
215obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o 242obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o
216obj-$(CONFIG_SND_SOC_SI476X) += snd-soc-si476x.o 243obj-$(CONFIG_SND_SOC_SI476X) += snd-soc-si476x.o
@@ -221,6 +248,7 @@ obj-$(CONFIG_SND_SOC_SSM2602) += snd-soc-ssm2602.o
221obj-$(CONFIG_SND_SOC_SSM2602_SPI) += snd-soc-ssm2602-spi.o 248obj-$(CONFIG_SND_SOC_SSM2602_SPI) += snd-soc-ssm2602-spi.o
222obj-$(CONFIG_SND_SOC_SSM2602_I2C) += snd-soc-ssm2602-i2c.o 249obj-$(CONFIG_SND_SOC_SSM2602_I2C) += snd-soc-ssm2602-i2c.o
223obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o 250obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o
251obj-$(CONFIG_SND_SOC_STA350) += snd-soc-sta350.o
224obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o 252obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
225obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o 253obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
226obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o 254obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
diff --git a/sound/soc/codecs/ab8500-codec.c b/sound/soc/codecs/ab8500-codec.c
index 1ad92cbf0b24..1fb4402bf72d 100644
--- a/sound/soc/codecs/ab8500-codec.c
+++ b/sound/soc/codecs/ab8500-codec.c
@@ -1139,7 +1139,7 @@ static void anc_configure(struct snd_soc_codec *codec,
1139static int sid_status_control_get(struct snd_kcontrol *kcontrol, 1139static int sid_status_control_get(struct snd_kcontrol *kcontrol,
1140 struct snd_ctl_elem_value *ucontrol) 1140 struct snd_ctl_elem_value *ucontrol)
1141{ 1141{
1142 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1142 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1143 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev); 1143 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev);
1144 1144
1145 mutex_lock(&codec->mutex); 1145 mutex_lock(&codec->mutex);
@@ -1153,7 +1153,7 @@ static int sid_status_control_get(struct snd_kcontrol *kcontrol,
1153static int sid_status_control_put(struct snd_kcontrol *kcontrol, 1153static int sid_status_control_put(struct snd_kcontrol *kcontrol,
1154 struct snd_ctl_elem_value *ucontrol) 1154 struct snd_ctl_elem_value *ucontrol)
1155{ 1155{
1156 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1156 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1157 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev); 1157 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev);
1158 unsigned int param, sidconf, val; 1158 unsigned int param, sidconf, val;
1159 int status = 1; 1159 int status = 1;
@@ -1208,7 +1208,7 @@ out:
1208static int anc_status_control_get(struct snd_kcontrol *kcontrol, 1208static int anc_status_control_get(struct snd_kcontrol *kcontrol,
1209 struct snd_ctl_elem_value *ucontrol) 1209 struct snd_ctl_elem_value *ucontrol)
1210{ 1210{
1211 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1211 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1212 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev); 1212 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev);
1213 1213
1214 mutex_lock(&codec->mutex); 1214 mutex_lock(&codec->mutex);
@@ -1221,7 +1221,7 @@ static int anc_status_control_get(struct snd_kcontrol *kcontrol,
1221static int anc_status_control_put(struct snd_kcontrol *kcontrol, 1221static int anc_status_control_put(struct snd_kcontrol *kcontrol,
1222 struct snd_ctl_elem_value *ucontrol) 1222 struct snd_ctl_elem_value *ucontrol)
1223{ 1223{
1224 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1224 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1225 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev); 1225 struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev);
1226 struct device *dev = codec->dev; 1226 struct device *dev = codec->dev;
1227 bool apply_fir, apply_iir; 1227 bool apply_fir, apply_iir;
@@ -1306,7 +1306,7 @@ static int filter_control_info(struct snd_kcontrol *kcontrol,
1306static int filter_control_get(struct snd_kcontrol *kcontrol, 1306static int filter_control_get(struct snd_kcontrol *kcontrol,
1307 struct snd_ctl_elem_value *ucontrol) 1307 struct snd_ctl_elem_value *ucontrol)
1308{ 1308{
1309 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1309 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1310 struct filter_control *fc = 1310 struct filter_control *fc =
1311 (struct filter_control *)kcontrol->private_value; 1311 (struct filter_control *)kcontrol->private_value;
1312 unsigned int i; 1312 unsigned int i;
@@ -1322,7 +1322,7 @@ static int filter_control_get(struct snd_kcontrol *kcontrol,
1322static int filter_control_put(struct snd_kcontrol *kcontrol, 1322static int filter_control_put(struct snd_kcontrol *kcontrol,
1323 struct snd_ctl_elem_value *ucontrol) 1323 struct snd_ctl_elem_value *ucontrol)
1324{ 1324{
1325 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1325 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1326 struct filter_control *fc = 1326 struct filter_control *fc =
1327 (struct filter_control *)kcontrol->private_value; 1327 (struct filter_control *)kcontrol->private_value;
1328 unsigned int i; 1328 unsigned int i;
diff --git a/sound/soc/codecs/ad1980.c b/sound/soc/codecs/ad1980.c
index 34d965a4a040..304d3003339a 100644
--- a/sound/soc/codecs/ad1980.c
+++ b/sound/soc/codecs/ad1980.c
@@ -189,28 +189,27 @@ static struct snd_soc_dai_driver ad1980_dai = {
189 189
190static int ad1980_reset(struct snd_soc_codec *codec, int try_warm) 190static int ad1980_reset(struct snd_soc_codec *codec, int try_warm)
191{ 191{
192 u16 retry_cnt = 0; 192 unsigned int retry_cnt = 0;
193 193
194retry: 194 do {
195 if (try_warm && soc_ac97_ops->warm_reset) { 195 if (try_warm && soc_ac97_ops->warm_reset) {
196 soc_ac97_ops->warm_reset(codec->ac97); 196 soc_ac97_ops->warm_reset(codec->ac97);
197 if (ac97_read(codec, AC97_RESET) == 0x0090) 197 if (ac97_read(codec, AC97_RESET) == 0x0090)
198 return 1; 198 return 1;
199 } 199 }
200
201 soc_ac97_ops->reset(codec->ac97);
202 /* Set bit 16slot in register 74h, then every slot will has only 16
203 * bits. This command is sent out in 20bit mode, in which case the
204 * first nibble of data is eaten by the addr. (Tag is always 16 bit)*/
205 ac97_write(codec, AC97_AD_SERIAL_CFG, 0x9900);
206
207 if (ac97_read(codec, AC97_RESET) != 0x0090)
208 goto err;
209 return 0;
210 200
211err: 201 soc_ac97_ops->reset(codec->ac97);
212 while (retry_cnt++ < 10) 202 /*
213 goto retry; 203 * Set bit 16slot in register 74h, then every slot will has only
204 * 16 bits. This command is sent out in 20bit mode, in which
205 * case the first nibble of data is eaten by the addr. (Tag is
206 * always 16 bit)
207 */
208 ac97_write(codec, AC97_AD_SERIAL_CFG, 0x9900);
209
210 if (ac97_read(codec, AC97_RESET) == 0x0090)
211 return 0;
212 } while (retry_cnt++ < 10);
214 213
215 printk(KERN_ERR "AD1980 AC97 reset failed\n"); 214 printk(KERN_ERR "AD1980 AC97 reset failed\n");
216 return -EIO; 215 return -EIO;
diff --git a/sound/soc/codecs/adau1373.c b/sound/soc/codecs/adau1373.c
index 877f5737bb6b..1ff7d4d027e9 100644
--- a/sound/soc/codecs/adau1373.c
+++ b/sound/soc/codecs/adau1373.c
@@ -519,8 +519,7 @@ static const struct snd_kcontrol_new adau1373_controls[] = {
519 SOC_ENUM("HPF Channel", adau1373_hpf_channel_enum), 519 SOC_ENUM("HPF Channel", adau1373_hpf_channel_enum),
520 520
521 SOC_ENUM("Bass HPF Cutoff", adau1373_bass_hpf_cutoff_enum), 521 SOC_ENUM("Bass HPF Cutoff", adau1373_bass_hpf_cutoff_enum),
522 SOC_VALUE_ENUM("Bass Clip Level Threshold", 522 SOC_ENUM("Bass Clip Level Threshold", adau1373_bass_clip_level_enum),
523 adau1373_bass_clip_level_enum),
524 SOC_ENUM("Bass LPF Cutoff", adau1373_bass_lpf_cutoff_enum), 523 SOC_ENUM("Bass LPF Cutoff", adau1373_bass_lpf_cutoff_enum),
525 SOC_DOUBLE("Bass Playback Switch", ADAU1373_BASS2, 0, 1, 1, 0), 524 SOC_DOUBLE("Bass Playback Switch", ADAU1373_BASS2, 0, 1, 1, 0),
526 SOC_SINGLE_TLV("Bass Playback Volume", ADAU1373_BASS2, 2, 7, 0, 525 SOC_SINGLE_TLV("Bass Playback Volume", ADAU1373_BASS2, 2, 7, 0,
@@ -580,7 +579,7 @@ static SOC_ENUM_SINGLE_VIRT_DECL(adau1373_decimator_enum,
580 adau1373_decimator_text); 579 adau1373_decimator_text);
581 580
582static const struct snd_kcontrol_new adau1373_decimator_mux = 581static const struct snd_kcontrol_new adau1373_decimator_mux =
583 SOC_DAPM_ENUM_VIRT("Decimator Mux", adau1373_decimator_enum); 582 SOC_DAPM_ENUM("Decimator Mux", adau1373_decimator_enum);
584 583
585static const struct snd_kcontrol_new adau1373_left_adc_mixer_controls[] = { 584static const struct snd_kcontrol_new adau1373_left_adc_mixer_controls[] = {
586 SOC_DAPM_SINGLE("DAC1 Switch", ADAU1373_LADC_MIXER, 4, 1, 0), 585 SOC_DAPM_SINGLE("DAC1 Switch", ADAU1373_LADC_MIXER, 4, 1, 0),
@@ -694,7 +693,7 @@ static const struct snd_soc_dapm_widget adau1373_dapm_widgets[] = {
694 SND_SOC_DAPM_ADC("DMIC1", NULL, ADAU1373_DIGMICCTRL, 0, 0), 693 SND_SOC_DAPM_ADC("DMIC1", NULL, ADAU1373_DIGMICCTRL, 0, 0),
695 SND_SOC_DAPM_ADC("DMIC2", NULL, ADAU1373_DIGMICCTRL, 2, 0), 694 SND_SOC_DAPM_ADC("DMIC2", NULL, ADAU1373_DIGMICCTRL, 2, 0),
696 695
697 SND_SOC_DAPM_VIRT_MUX("Decimator Mux", SND_SOC_NOPM, 0, 0, 696 SND_SOC_DAPM_MUX("Decimator Mux", SND_SOC_NOPM, 0, 0,
698 &adau1373_decimator_mux), 697 &adau1373_decimator_mux),
699 698
700 SND_SOC_DAPM_SUPPLY("MICBIAS2", ADAU1373_PWDN_CTRL1, 5, 0, NULL, 0), 699 SND_SOC_DAPM_SUPPLY("MICBIAS2", ADAU1373_PWDN_CTRL1, 5, 0, NULL, 0),
diff --git a/sound/soc/codecs/adau1761-i2c.c b/sound/soc/codecs/adau1761-i2c.c
new file mode 100644
index 000000000000..862796dec693
--- /dev/null
+++ b/sound/soc/codecs/adau1761-i2c.c
@@ -0,0 +1,60 @@
1/*
2 * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/i2c.h>
11#include <linux/mod_devicetable.h>
12#include <linux/module.h>
13#include <linux/regmap.h>
14#include <sound/soc.h>
15
16#include "adau1761.h"
17
18static int adau1761_i2c_probe(struct i2c_client *client,
19 const struct i2c_device_id *id)
20{
21 struct regmap_config config;
22
23 config = adau1761_regmap_config;
24 config.val_bits = 8;
25 config.reg_bits = 16;
26
27 return adau1761_probe(&client->dev,
28 devm_regmap_init_i2c(client, &config),
29 id->driver_data, NULL);
30}
31
32static int adau1761_i2c_remove(struct i2c_client *client)
33{
34 snd_soc_unregister_codec(&client->dev);
35 return 0;
36}
37
38static const struct i2c_device_id adau1761_i2c_ids[] = {
39 { "adau1361", ADAU1361 },
40 { "adau1461", ADAU1761 },
41 { "adau1761", ADAU1761 },
42 { "adau1961", ADAU1361 },
43 { }
44};
45MODULE_DEVICE_TABLE(i2c, adau1761_i2c_ids);
46
47static struct i2c_driver adau1761_i2c_driver = {
48 .driver = {
49 .name = "adau1761",
50 .owner = THIS_MODULE,
51 },
52 .probe = adau1761_i2c_probe,
53 .remove = adau1761_i2c_remove,
54 .id_table = adau1761_i2c_ids,
55};
56module_i2c_driver(adau1761_i2c_driver);
57
58MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC I2C driver");
59MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
60MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1761-spi.c b/sound/soc/codecs/adau1761-spi.c
new file mode 100644
index 000000000000..cce2f11f1ffb
--- /dev/null
+++ b/sound/soc/codecs/adau1761-spi.c
@@ -0,0 +1,77 @@
1/*
2 * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/mod_devicetable.h>
11#include <linux/module.h>
12#include <linux/regmap.h>
13#include <linux/spi/spi.h>
14#include <sound/soc.h>
15
16#include "adau1761.h"
17
18static void adau1761_spi_switch_mode(struct device *dev)
19{
20 struct spi_device *spi = to_spi_device(dev);
21
22 /*
23 * To get the device into SPI mode CLATCH has to be pulled low three
24 * times. Do this by issuing three dummy reads.
25 */
26 spi_w8r8(spi, 0x00);
27 spi_w8r8(spi, 0x00);
28 spi_w8r8(spi, 0x00);
29}
30
31static int adau1761_spi_probe(struct spi_device *spi)
32{
33 const struct spi_device_id *id = spi_get_device_id(spi);
34 struct regmap_config config;
35
36 if (!id)
37 return -EINVAL;
38
39 config = adau1761_regmap_config;
40 config.val_bits = 8;
41 config.reg_bits = 24;
42 config.read_flag_mask = 0x1;
43
44 return adau1761_probe(&spi->dev,
45 devm_regmap_init_spi(spi, &config),
46 id->driver_data, adau1761_spi_switch_mode);
47}
48
49static int adau1761_spi_remove(struct spi_device *spi)
50{
51 snd_soc_unregister_codec(&spi->dev);
52 return 0;
53}
54
55static const struct spi_device_id adau1761_spi_id[] = {
56 { "adau1361", ADAU1361 },
57 { "adau1461", ADAU1761 },
58 { "adau1761", ADAU1761 },
59 { "adau1961", ADAU1361 },
60 { }
61};
62MODULE_DEVICE_TABLE(spi, adau1761_spi_id);
63
64static struct spi_driver adau1761_spi_driver = {
65 .driver = {
66 .name = "adau1761",
67 .owner = THIS_MODULE,
68 },
69 .probe = adau1761_spi_probe,
70 .remove = adau1761_spi_remove,
71 .id_table = adau1761_spi_id,
72};
73module_spi_driver(adau1761_spi_driver);
74
75MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC SPI driver");
76MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
77MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c
new file mode 100644
index 000000000000..848cab839553
--- /dev/null
+++ b/sound/soc/codecs/adau1761.c
@@ -0,0 +1,803 @@
1/*
2 * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec
3 *
4 * Copyright 2011-2013 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/i2c.h>
13#include <linux/spi/spi.h>
14#include <linux/slab.h>
15#include <sound/core.h>
16#include <sound/pcm.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19#include <sound/tlv.h>
20#include <linux/platform_data/adau17x1.h>
21
22#include "adau17x1.h"
23#include "adau1761.h"
24
25#define ADAU1761_DIGMIC_JACKDETECT 0x4008
26#define ADAU1761_REC_MIXER_LEFT0 0x400a
27#define ADAU1761_REC_MIXER_LEFT1 0x400b
28#define ADAU1761_REC_MIXER_RIGHT0 0x400c
29#define ADAU1761_REC_MIXER_RIGHT1 0x400d
30#define ADAU1761_LEFT_DIFF_INPUT_VOL 0x400e
31#define ADAU1761_RIGHT_DIFF_INPUT_VOL 0x400f
32#define ADAU1761_PLAY_LR_MIXER_LEFT 0x4020
33#define ADAU1761_PLAY_MIXER_LEFT0 0x401c
34#define ADAU1761_PLAY_MIXER_LEFT1 0x401d
35#define ADAU1761_PLAY_MIXER_RIGHT0 0x401e
36#define ADAU1761_PLAY_MIXER_RIGHT1 0x401f
37#define ADAU1761_PLAY_LR_MIXER_RIGHT 0x4021
38#define ADAU1761_PLAY_MIXER_MONO 0x4022
39#define ADAU1761_PLAY_HP_LEFT_VOL 0x4023
40#define ADAU1761_PLAY_HP_RIGHT_VOL 0x4024
41#define ADAU1761_PLAY_LINE_LEFT_VOL 0x4025
42#define ADAU1761_PLAY_LINE_RIGHT_VOL 0x4026
43#define ADAU1761_PLAY_MONO_OUTPUT_VOL 0x4027
44#define ADAU1761_POP_CLICK_SUPPRESS 0x4028
45#define ADAU1761_JACK_DETECT_PIN 0x4031
46#define ADAU1761_DEJITTER 0x4036
47#define ADAU1761_CLK_ENABLE0 0x40f9
48#define ADAU1761_CLK_ENABLE1 0x40fa
49
50#define ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW BIT(0)
51#define ADAU1761_DIGMIC_JACKDETECT_DIGMIC BIT(5)
52
53#define ADAU1761_DIFF_INPUT_VOL_LDEN BIT(0)
54
55#define ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP BIT(0)
56#define ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE BIT(1)
57
58#define ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP BIT(0)
59
60#define ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP BIT(0)
61
62#define ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP BIT(0)
63
64
65#define ADAU1761_FIRMWARE "adau1761.bin"
66
67static const struct reg_default adau1761_reg_defaults[] = {
68 { ADAU1761_DEJITTER, 0x03 },
69 { ADAU1761_DIGMIC_JACKDETECT, 0x00 },
70 { ADAU1761_REC_MIXER_LEFT0, 0x00 },
71 { ADAU1761_REC_MIXER_LEFT1, 0x00 },
72 { ADAU1761_REC_MIXER_RIGHT0, 0x00 },
73 { ADAU1761_REC_MIXER_RIGHT1, 0x00 },
74 { ADAU1761_LEFT_DIFF_INPUT_VOL, 0x00 },
75 { ADAU1761_RIGHT_DIFF_INPUT_VOL, 0x00 },
76 { ADAU1761_PLAY_LR_MIXER_LEFT, 0x00 },
77 { ADAU1761_PLAY_MIXER_LEFT0, 0x00 },
78 { ADAU1761_PLAY_MIXER_LEFT1, 0x00 },
79 { ADAU1761_PLAY_MIXER_RIGHT0, 0x00 },
80 { ADAU1761_PLAY_MIXER_RIGHT1, 0x00 },
81 { ADAU1761_PLAY_LR_MIXER_RIGHT, 0x00 },
82 { ADAU1761_PLAY_MIXER_MONO, 0x00 },
83 { ADAU1761_PLAY_HP_LEFT_VOL, 0x00 },
84 { ADAU1761_PLAY_HP_RIGHT_VOL, 0x00 },
85 { ADAU1761_PLAY_LINE_LEFT_VOL, 0x00 },
86 { ADAU1761_PLAY_LINE_RIGHT_VOL, 0x00 },
87 { ADAU1761_PLAY_MONO_OUTPUT_VOL, 0x00 },
88 { ADAU1761_POP_CLICK_SUPPRESS, 0x00 },
89 { ADAU1761_JACK_DETECT_PIN, 0x00 },
90 { ADAU1761_CLK_ENABLE0, 0x00 },
91 { ADAU1761_CLK_ENABLE1, 0x00 },
92 { ADAU17X1_CLOCK_CONTROL, 0x00 },
93 { ADAU17X1_PLL_CONTROL, 0x00 },
94 { ADAU17X1_REC_POWER_MGMT, 0x00 },
95 { ADAU17X1_MICBIAS, 0x00 },
96 { ADAU17X1_SERIAL_PORT0, 0x00 },
97 { ADAU17X1_SERIAL_PORT1, 0x00 },
98 { ADAU17X1_CONVERTER0, 0x00 },
99 { ADAU17X1_CONVERTER1, 0x00 },
100 { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 },
101 { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 },
102 { ADAU17X1_ADC_CONTROL, 0x00 },
103 { ADAU17X1_PLAY_POWER_MGMT, 0x00 },
104 { ADAU17X1_DAC_CONTROL0, 0x00 },
105 { ADAU17X1_DAC_CONTROL1, 0x00 },
106 { ADAU17X1_DAC_CONTROL2, 0x00 },
107 { ADAU17X1_SERIAL_PORT_PAD, 0xaa },
108 { ADAU17X1_CONTROL_PORT_PAD0, 0xaa },
109 { ADAU17X1_CONTROL_PORT_PAD1, 0x00 },
110 { ADAU17X1_DSP_SAMPLING_RATE, 0x01 },
111 { ADAU17X1_SERIAL_INPUT_ROUTE, 0x00 },
112 { ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x00 },
113 { ADAU17X1_DSP_ENABLE, 0x00 },
114 { ADAU17X1_DSP_RUN, 0x00 },
115 { ADAU17X1_SERIAL_SAMPLING_RATE, 0x00 },
116};
117
118static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1);
119static const DECLARE_TLV_DB_SCALE(adau1761_diff_in_tlv, -1200, 75, 0);
120static const DECLARE_TLV_DB_SCALE(adau1761_out_tlv, -5700, 100, 0);
121static const DECLARE_TLV_DB_SCALE(adau1761_sidetone_tlv, -1800, 300, 1);
122static const DECLARE_TLV_DB_SCALE(adau1761_boost_tlv, -600, 600, 1);
123static const DECLARE_TLV_DB_SCALE(adau1761_pga_boost_tlv, -2000, 2000, 1);
124
125static const unsigned int adau1761_bias_select_values[] = {
126 0, 2, 3,
127};
128
129static const char * const adau1761_bias_select_text[] = {
130 "Normal operation", "Enhanced performance", "Power saving",
131};
132
133static const char * const adau1761_bias_select_extreme_text[] = {
134 "Normal operation", "Extreme power saving", "Enhanced performance",
135 "Power saving",
136};
137
138static SOC_ENUM_SINGLE_DECL(adau1761_adc_bias_enum,
139 ADAU17X1_REC_POWER_MGMT, 3, adau1761_bias_select_extreme_text);
140static SOC_ENUM_SINGLE_DECL(adau1761_hp_bias_enum,
141 ADAU17X1_PLAY_POWER_MGMT, 6, adau1761_bias_select_extreme_text);
142static SOC_ENUM_SINGLE_DECL(adau1761_dac_bias_enum,
143 ADAU17X1_PLAY_POWER_MGMT, 4, adau1761_bias_select_extreme_text);
144static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_playback_bias_enum,
145 ADAU17X1_PLAY_POWER_MGMT, 2, 0x3, adau1761_bias_select_text,
146 adau1761_bias_select_values);
147static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_capture_bias_enum,
148 ADAU17X1_REC_POWER_MGMT, 1, 0x3, adau1761_bias_select_text,
149 adau1761_bias_select_values);
150
151static const struct snd_kcontrol_new adau1761_jack_detect_controls[] = {
152 SOC_SINGLE("Speaker Auto-mute Switch", ADAU1761_DIGMIC_JACKDETECT,
153 4, 1, 0),
154};
155
156static const struct snd_kcontrol_new adau1761_differential_mode_controls[] = {
157 SOC_DOUBLE_R_TLV("Capture Volume", ADAU1761_LEFT_DIFF_INPUT_VOL,
158 ADAU1761_RIGHT_DIFF_INPUT_VOL, 2, 0x3f, 0,
159 adau1761_diff_in_tlv),
160 SOC_DOUBLE_R("Capture Switch", ADAU1761_LEFT_DIFF_INPUT_VOL,
161 ADAU1761_RIGHT_DIFF_INPUT_VOL, 1, 1, 0),
162
163 SOC_DOUBLE_R_TLV("PGA Boost Capture Volume", ADAU1761_REC_MIXER_LEFT1,
164 ADAU1761_REC_MIXER_RIGHT1, 3, 2, 0, adau1761_pga_boost_tlv),
165};
166
167static const struct snd_kcontrol_new adau1761_single_mode_controls[] = {
168 SOC_SINGLE_TLV("Input 1 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
169 4, 7, 0, adau1761_sing_in_tlv),
170 SOC_SINGLE_TLV("Input 2 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
171 1, 7, 0, adau1761_sing_in_tlv),
172 SOC_SINGLE_TLV("Input 3 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
173 4, 7, 0, adau1761_sing_in_tlv),
174 SOC_SINGLE_TLV("Input 4 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
175 1, 7, 0, adau1761_sing_in_tlv),
176};
177
178static const struct snd_kcontrol_new adau1761_controls[] = {
179 SOC_DOUBLE_R_TLV("Aux Capture Volume", ADAU1761_REC_MIXER_LEFT1,
180 ADAU1761_REC_MIXER_RIGHT1, 0, 7, 0, adau1761_sing_in_tlv),
181
182 SOC_DOUBLE_R_TLV("Headphone Playback Volume", ADAU1761_PLAY_HP_LEFT_VOL,
183 ADAU1761_PLAY_HP_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv),
184 SOC_DOUBLE_R("Headphone Playback Switch", ADAU1761_PLAY_HP_LEFT_VOL,
185 ADAU1761_PLAY_HP_RIGHT_VOL, 1, 1, 0),
186 SOC_DOUBLE_R_TLV("Lineout Playback Volume", ADAU1761_PLAY_LINE_LEFT_VOL,
187 ADAU1761_PLAY_LINE_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv),
188 SOC_DOUBLE_R("Lineout Playback Switch", ADAU1761_PLAY_LINE_LEFT_VOL,
189 ADAU1761_PLAY_LINE_RIGHT_VOL, 1, 1, 0),
190
191 SOC_ENUM("ADC Bias", adau1761_adc_bias_enum),
192 SOC_ENUM("DAC Bias", adau1761_dac_bias_enum),
193 SOC_ENUM("Capture Bias", adau1761_capture_bias_enum),
194 SOC_ENUM("Playback Bias", adau1761_playback_bias_enum),
195 SOC_ENUM("Headphone Bias", adau1761_hp_bias_enum),
196};
197
198static const struct snd_kcontrol_new adau1761_mono_controls[] = {
199 SOC_SINGLE_TLV("Mono Playback Volume", ADAU1761_PLAY_MONO_OUTPUT_VOL,
200 2, 0x3f, 0, adau1761_out_tlv),
201 SOC_SINGLE("Mono Playback Switch", ADAU1761_PLAY_MONO_OUTPUT_VOL,
202 1, 1, 0),
203};
204
205static const struct snd_kcontrol_new adau1761_left_mixer_controls[] = {
206 SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch",
207 ADAU1761_PLAY_MIXER_LEFT0, 5, 1, 0),
208 SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch",
209 ADAU1761_PLAY_MIXER_LEFT0, 6, 1, 0),
210 SOC_DAPM_SINGLE_TLV("Aux Bypass Volume",
211 ADAU1761_PLAY_MIXER_LEFT0, 1, 8, 0, adau1761_sidetone_tlv),
212 SOC_DAPM_SINGLE_TLV("Right Bypass Volume",
213 ADAU1761_PLAY_MIXER_LEFT1, 4, 8, 0, adau1761_sidetone_tlv),
214 SOC_DAPM_SINGLE_TLV("Left Bypass Volume",
215 ADAU1761_PLAY_MIXER_LEFT1, 0, 8, 0, adau1761_sidetone_tlv),
216};
217
218static const struct snd_kcontrol_new adau1761_right_mixer_controls[] = {
219 SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch",
220 ADAU1761_PLAY_MIXER_RIGHT0, 5, 1, 0),
221 SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch",
222 ADAU1761_PLAY_MIXER_RIGHT0, 6, 1, 0),
223 SOC_DAPM_SINGLE_TLV("Aux Bypass Volume",
224 ADAU1761_PLAY_MIXER_RIGHT0, 1, 8, 0, adau1761_sidetone_tlv),
225 SOC_DAPM_SINGLE_TLV("Right Bypass Volume",
226 ADAU1761_PLAY_MIXER_RIGHT1, 4, 8, 0, adau1761_sidetone_tlv),
227 SOC_DAPM_SINGLE_TLV("Left Bypass Volume",
228 ADAU1761_PLAY_MIXER_RIGHT1, 0, 8, 0, adau1761_sidetone_tlv),
229};
230
231static const struct snd_kcontrol_new adau1761_left_lr_mixer_controls[] = {
232 SOC_DAPM_SINGLE_TLV("Left Volume",
233 ADAU1761_PLAY_LR_MIXER_LEFT, 1, 2, 0, adau1761_boost_tlv),
234 SOC_DAPM_SINGLE_TLV("Right Volume",
235 ADAU1761_PLAY_LR_MIXER_LEFT, 3, 2, 0, adau1761_boost_tlv),
236};
237
238static const struct snd_kcontrol_new adau1761_right_lr_mixer_controls[] = {
239 SOC_DAPM_SINGLE_TLV("Left Volume",
240 ADAU1761_PLAY_LR_MIXER_RIGHT, 1, 2, 0, adau1761_boost_tlv),
241 SOC_DAPM_SINGLE_TLV("Right Volume",
242 ADAU1761_PLAY_LR_MIXER_RIGHT, 3, 2, 0, adau1761_boost_tlv),
243};
244
245static const char * const adau1761_input_mux_text[] = {
246 "ADC", "DMIC",
247};
248
249static SOC_ENUM_SINGLE_DECL(adau1761_input_mux_enum,
250 ADAU17X1_ADC_CONTROL, 2, adau1761_input_mux_text);
251
252static const struct snd_kcontrol_new adau1761_input_mux_control =
253 SOC_DAPM_ENUM("Input Select", adau1761_input_mux_enum);
254
255static int adau1761_dejitter_fixup(struct snd_soc_dapm_widget *w,
256 struct snd_kcontrol *kcontrol, int event)
257{
258 struct adau *adau = snd_soc_codec_get_drvdata(w->codec);
259
260 /* After any power changes have been made the dejitter circuit
261 * has to be reinitialized. */
262 regmap_write(adau->regmap, ADAU1761_DEJITTER, 0);
263 if (!adau->master)
264 regmap_write(adau->regmap, ADAU1761_DEJITTER, 3);
265
266 return 0;
267}
268
269static const struct snd_soc_dapm_widget adau1x61_dapm_widgets[] = {
270 SND_SOC_DAPM_MIXER("Left Input Mixer", ADAU1761_REC_MIXER_LEFT0, 0, 0,
271 NULL, 0),
272 SND_SOC_DAPM_MIXER("Right Input Mixer", ADAU1761_REC_MIXER_RIGHT0, 0, 0,
273 NULL, 0),
274
275 SOC_MIXER_ARRAY("Left Playback Mixer", ADAU1761_PLAY_MIXER_LEFT0,
276 0, 0, adau1761_left_mixer_controls),
277 SOC_MIXER_ARRAY("Right Playback Mixer", ADAU1761_PLAY_MIXER_RIGHT0,
278 0, 0, adau1761_right_mixer_controls),
279 SOC_MIXER_ARRAY("Left LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_LEFT,
280 0, 0, adau1761_left_lr_mixer_controls),
281 SOC_MIXER_ARRAY("Right LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_RIGHT,
282 0, 0, adau1761_right_lr_mixer_controls),
283
284 SND_SOC_DAPM_SUPPLY("Headphone", ADAU1761_PLAY_HP_LEFT_VOL,
285 0, 0, NULL, 0),
286
287 SND_SOC_DAPM_SUPPLY_S("SYSCLK", 2, SND_SOC_NOPM, 0, 0, NULL, 0),
288
289 SND_SOC_DAPM_POST("Dejitter fixup", adau1761_dejitter_fixup),
290
291 SND_SOC_DAPM_INPUT("LAUX"),
292 SND_SOC_DAPM_INPUT("RAUX"),
293 SND_SOC_DAPM_INPUT("LINP"),
294 SND_SOC_DAPM_INPUT("LINN"),
295 SND_SOC_DAPM_INPUT("RINP"),
296 SND_SOC_DAPM_INPUT("RINN"),
297
298 SND_SOC_DAPM_OUTPUT("LOUT"),
299 SND_SOC_DAPM_OUTPUT("ROUT"),
300 SND_SOC_DAPM_OUTPUT("LHP"),
301 SND_SOC_DAPM_OUTPUT("RHP"),
302};
303
304static const struct snd_soc_dapm_widget adau1761_mono_dapm_widgets[] = {
305 SND_SOC_DAPM_MIXER("Mono Playback Mixer", ADAU1761_PLAY_MIXER_MONO,
306 0, 0, NULL, 0),
307
308 SND_SOC_DAPM_OUTPUT("MONOOUT"),
309};
310
311static const struct snd_soc_dapm_widget adau1761_capless_dapm_widgets[] = {
312 SND_SOC_DAPM_SUPPLY_S("Headphone VGND", 1, ADAU1761_PLAY_MIXER_MONO,
313 0, 0, NULL, 0),
314};
315
316static const struct snd_soc_dapm_route adau1x61_dapm_routes[] = {
317 { "Left Input Mixer", NULL, "LINP" },
318 { "Left Input Mixer", NULL, "LINN" },
319 { "Left Input Mixer", NULL, "LAUX" },
320
321 { "Right Input Mixer", NULL, "RINP" },
322 { "Right Input Mixer", NULL, "RINN" },
323 { "Right Input Mixer", NULL, "RAUX" },
324
325 { "Left Playback Mixer", NULL, "Left Playback Enable"},
326 { "Right Playback Mixer", NULL, "Right Playback Enable"},
327 { "Left LR Playback Mixer", NULL, "Left Playback Enable"},
328 { "Right LR Playback Mixer", NULL, "Right Playback Enable"},
329
330 { "Left Playback Mixer", "Left DAC Switch", "Left DAC" },
331 { "Left Playback Mixer", "Right DAC Switch", "Right DAC" },
332
333 { "Right Playback Mixer", "Left DAC Switch", "Left DAC" },
334 { "Right Playback Mixer", "Right DAC Switch", "Right DAC" },
335
336 { "Left LR Playback Mixer", "Left Volume", "Left Playback Mixer" },
337 { "Left LR Playback Mixer", "Right Volume", "Right Playback Mixer" },
338
339 { "Right LR Playback Mixer", "Left Volume", "Left Playback Mixer" },
340 { "Right LR Playback Mixer", "Right Volume", "Right Playback Mixer" },
341
342 { "LHP", NULL, "Left Playback Mixer" },
343 { "RHP", NULL, "Right Playback Mixer" },
344
345 { "LHP", NULL, "Headphone" },
346 { "RHP", NULL, "Headphone" },
347
348 { "LOUT", NULL, "Left LR Playback Mixer" },
349 { "ROUT", NULL, "Right LR Playback Mixer" },
350
351 { "Left Playback Mixer", "Aux Bypass Volume", "LAUX" },
352 { "Left Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
353 { "Left Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
354 { "Right Playback Mixer", "Aux Bypass Volume", "RAUX" },
355 { "Right Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
356 { "Right Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
357};
358
359static const struct snd_soc_dapm_route adau1761_mono_dapm_routes[] = {
360 { "Mono Playback Mixer", NULL, "Left Playback Mixer" },
361 { "Mono Playback Mixer", NULL, "Right Playback Mixer" },
362
363 { "MONOOUT", NULL, "Mono Playback Mixer" },
364};
365
366static const struct snd_soc_dapm_route adau1761_capless_dapm_routes[] = {
367 { "Headphone", NULL, "Headphone VGND" },
368};
369
370static const struct snd_soc_dapm_widget adau1761_dmic_widgets[] = {
371 SND_SOC_DAPM_MUX("Left Decimator Mux", SND_SOC_NOPM, 0, 0,
372 &adau1761_input_mux_control),
373 SND_SOC_DAPM_MUX("Right Decimator Mux", SND_SOC_NOPM, 0, 0,
374 &adau1761_input_mux_control),
375
376 SND_SOC_DAPM_INPUT("DMIC"),
377};
378
379static const struct snd_soc_dapm_route adau1761_dmic_routes[] = {
380 { "Left Decimator Mux", "ADC", "Left Input Mixer" },
381 { "Left Decimator Mux", "DMIC", "DMIC" },
382 { "Right Decimator Mux", "ADC", "Right Input Mixer" },
383 { "Right Decimator Mux", "DMIC", "DMIC" },
384
385 { "Left Decimator", NULL, "Left Decimator Mux" },
386 { "Right Decimator", NULL, "Right Decimator Mux" },
387};
388
389static const struct snd_soc_dapm_route adau1761_no_dmic_routes[] = {
390 { "Left Decimator", NULL, "Left Input Mixer" },
391 { "Right Decimator", NULL, "Right Input Mixer" },
392};
393
394static const struct snd_soc_dapm_widget adau1761_dapm_widgets[] = {
395 SND_SOC_DAPM_SUPPLY("Serial Port Clock", ADAU1761_CLK_ENABLE0,
396 0, 0, NULL, 0),
397 SND_SOC_DAPM_SUPPLY("Serial Input Routing Clock", ADAU1761_CLK_ENABLE0,
398 1, 0, NULL, 0),
399 SND_SOC_DAPM_SUPPLY("Serial Output Routing Clock", ADAU1761_CLK_ENABLE0,
400 3, 0, NULL, 0),
401
402 SND_SOC_DAPM_SUPPLY("Decimator Resync Clock", ADAU1761_CLK_ENABLE0,
403 4, 0, NULL, 0),
404 SND_SOC_DAPM_SUPPLY("Interpolator Resync Clock", ADAU1761_CLK_ENABLE0,
405 2, 0, NULL, 0),
406
407 SND_SOC_DAPM_SUPPLY("Slew Clock", ADAU1761_CLK_ENABLE0, 6, 0, NULL, 0),
408
409 SND_SOC_DAPM_SUPPLY_S("Digital Clock 0", 1, ADAU1761_CLK_ENABLE1,
410 0, 0, NULL, 0),
411 SND_SOC_DAPM_SUPPLY_S("Digital Clock 1", 1, ADAU1761_CLK_ENABLE1,
412 1, 0, NULL, 0),
413};
414
415static const struct snd_soc_dapm_route adau1761_dapm_routes[] = {
416 { "Left Decimator", NULL, "Digital Clock 0", },
417 { "Right Decimator", NULL, "Digital Clock 0", },
418 { "Left DAC", NULL, "Digital Clock 0", },
419 { "Right DAC", NULL, "Digital Clock 0", },
420
421 { "AIFCLK", NULL, "Digital Clock 1" },
422
423 { "Playback", NULL, "Serial Port Clock" },
424 { "Capture", NULL, "Serial Port Clock" },
425 { "Playback", NULL, "Serial Input Routing Clock" },
426 { "Capture", NULL, "Serial Output Routing Clock" },
427
428 { "Left Decimator", NULL, "Decimator Resync Clock" },
429 { "Right Decimator", NULL, "Decimator Resync Clock" },
430 { "Left DAC", NULL, "Interpolator Resync Clock" },
431 { "Right DAC", NULL, "Interpolator Resync Clock" },
432
433 { "DSP", NULL, "Digital Clock 0" },
434
435 { "Slew Clock", NULL, "Digital Clock 0" },
436 { "Right Playback Mixer", NULL, "Slew Clock" },
437 { "Left Playback Mixer", NULL, "Slew Clock" },
438
439 { "Digital Clock 0", NULL, "SYSCLK" },
440 { "Digital Clock 1", NULL, "SYSCLK" },
441};
442
443static int adau1761_set_bias_level(struct snd_soc_codec *codec,
444 enum snd_soc_bias_level level)
445{
446 struct adau *adau = snd_soc_codec_get_drvdata(codec);
447
448 switch (level) {
449 case SND_SOC_BIAS_ON:
450 break;
451 case SND_SOC_BIAS_PREPARE:
452 break;
453 case SND_SOC_BIAS_STANDBY:
454 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
455 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
456 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
457 break;
458 case SND_SOC_BIAS_OFF:
459 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
460 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
461 break;
462
463 }
464 codec->dapm.bias_level = level;
465 return 0;
466}
467
468static enum adau1761_output_mode adau1761_get_lineout_mode(
469 struct snd_soc_codec *codec)
470{
471 struct adau1761_platform_data *pdata = codec->dev->platform_data;
472
473 if (pdata)
474 return pdata->lineout_mode;
475
476 return ADAU1761_OUTPUT_MODE_LINE;
477}
478
479static int adau1761_setup_digmic_jackdetect(struct snd_soc_codec *codec)
480{
481 struct adau1761_platform_data *pdata = codec->dev->platform_data;
482 struct adau *adau = snd_soc_codec_get_drvdata(codec);
483 enum adau1761_digmic_jackdet_pin_mode mode;
484 unsigned int val = 0;
485 int ret;
486
487 if (pdata)
488 mode = pdata->digmic_jackdetect_pin_mode;
489 else
490 mode = ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE;
491
492 switch (mode) {
493 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT:
494 switch (pdata->jackdetect_debounce_time) {
495 case ADAU1761_JACKDETECT_DEBOUNCE_5MS:
496 case ADAU1761_JACKDETECT_DEBOUNCE_10MS:
497 case ADAU1761_JACKDETECT_DEBOUNCE_20MS:
498 case ADAU1761_JACKDETECT_DEBOUNCE_40MS:
499 val |= pdata->jackdetect_debounce_time << 6;
500 break;
501 default:
502 return -EINVAL;
503 }
504 if (pdata->jackdetect_active_low)
505 val |= ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW;
506
507 ret = snd_soc_add_codec_controls(codec,
508 adau1761_jack_detect_controls,
509 ARRAY_SIZE(adau1761_jack_detect_controls));
510 if (ret)
511 return ret;
512 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: /* fallthrough */
513 ret = snd_soc_dapm_add_routes(&codec->dapm,
514 adau1761_no_dmic_routes,
515 ARRAY_SIZE(adau1761_no_dmic_routes));
516 if (ret)
517 return ret;
518 break;
519 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC:
520 ret = snd_soc_dapm_new_controls(&codec->dapm,
521 adau1761_dmic_widgets,
522 ARRAY_SIZE(adau1761_dmic_widgets));
523 if (ret)
524 return ret;
525
526 ret = snd_soc_dapm_add_routes(&codec->dapm,
527 adau1761_dmic_routes,
528 ARRAY_SIZE(adau1761_dmic_routes));
529 if (ret)
530 return ret;
531
532 val |= ADAU1761_DIGMIC_JACKDETECT_DIGMIC;
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 regmap_write(adau->regmap, ADAU1761_DIGMIC_JACKDETECT, val);
539
540 return 0;
541}
542
543static int adau1761_setup_headphone_mode(struct snd_soc_codec *codec)
544{
545 struct adau *adau = snd_soc_codec_get_drvdata(codec);
546 struct adau1761_platform_data *pdata = codec->dev->platform_data;
547 enum adau1761_output_mode mode;
548 int ret;
549
550 if (pdata)
551 mode = pdata->headphone_mode;
552 else
553 mode = ADAU1761_OUTPUT_MODE_HEADPHONE;
554
555 switch (mode) {
556 case ADAU1761_OUTPUT_MODE_LINE:
557 break;
558 case ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS:
559 regmap_update_bits(adau->regmap, ADAU1761_PLAY_MONO_OUTPUT_VOL,
560 ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
561 ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE,
562 ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
563 ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE);
564 /* fallthrough */
565 case ADAU1761_OUTPUT_MODE_HEADPHONE:
566 regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL,
567 ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP,
568 ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP);
569 break;
570 default:
571 return -EINVAL;
572 }
573
574 if (mode == ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS) {
575 ret = snd_soc_dapm_new_controls(&codec->dapm,
576 adau1761_capless_dapm_widgets,
577 ARRAY_SIZE(adau1761_capless_dapm_widgets));
578 if (ret)
579 return ret;
580 ret = snd_soc_dapm_add_routes(&codec->dapm,
581 adau1761_capless_dapm_routes,
582 ARRAY_SIZE(adau1761_capless_dapm_routes));
583 } else {
584 ret = snd_soc_add_codec_controls(codec, adau1761_mono_controls,
585 ARRAY_SIZE(adau1761_mono_controls));
586 if (ret)
587 return ret;
588 ret = snd_soc_dapm_new_controls(&codec->dapm,
589 adau1761_mono_dapm_widgets,
590 ARRAY_SIZE(adau1761_mono_dapm_widgets));
591 if (ret)
592 return ret;
593 ret = snd_soc_dapm_add_routes(&codec->dapm,
594 adau1761_mono_dapm_routes,
595 ARRAY_SIZE(adau1761_mono_dapm_routes));
596 }
597
598 return ret;
599}
600
601static bool adau1761_readable_register(struct device *dev, unsigned int reg)
602{
603 switch (reg) {
604 case ADAU1761_DIGMIC_JACKDETECT:
605 case ADAU1761_REC_MIXER_LEFT0:
606 case ADAU1761_REC_MIXER_LEFT1:
607 case ADAU1761_REC_MIXER_RIGHT0:
608 case ADAU1761_REC_MIXER_RIGHT1:
609 case ADAU1761_LEFT_DIFF_INPUT_VOL:
610 case ADAU1761_RIGHT_DIFF_INPUT_VOL:
611 case ADAU1761_PLAY_LR_MIXER_LEFT:
612 case ADAU1761_PLAY_MIXER_LEFT0:
613 case ADAU1761_PLAY_MIXER_LEFT1:
614 case ADAU1761_PLAY_MIXER_RIGHT0:
615 case ADAU1761_PLAY_MIXER_RIGHT1:
616 case ADAU1761_PLAY_LR_MIXER_RIGHT:
617 case ADAU1761_PLAY_MIXER_MONO:
618 case ADAU1761_PLAY_HP_LEFT_VOL:
619 case ADAU1761_PLAY_HP_RIGHT_VOL:
620 case ADAU1761_PLAY_LINE_LEFT_VOL:
621 case ADAU1761_PLAY_LINE_RIGHT_VOL:
622 case ADAU1761_PLAY_MONO_OUTPUT_VOL:
623 case ADAU1761_POP_CLICK_SUPPRESS:
624 case ADAU1761_JACK_DETECT_PIN:
625 case ADAU1761_DEJITTER:
626 case ADAU1761_CLK_ENABLE0:
627 case ADAU1761_CLK_ENABLE1:
628 return true;
629 default:
630 break;
631 }
632
633 return adau17x1_readable_register(dev, reg);
634}
635
636static int adau1761_codec_probe(struct snd_soc_codec *codec)
637{
638 struct adau1761_platform_data *pdata = codec->dev->platform_data;
639 struct adau *adau = snd_soc_codec_get_drvdata(codec);
640 int ret;
641
642 ret = adau17x1_add_widgets(codec);
643 if (ret < 0)
644 return ret;
645
646 if (pdata && pdata->input_differential) {
647 regmap_update_bits(adau->regmap, ADAU1761_LEFT_DIFF_INPUT_VOL,
648 ADAU1761_DIFF_INPUT_VOL_LDEN,
649 ADAU1761_DIFF_INPUT_VOL_LDEN);
650 regmap_update_bits(adau->regmap, ADAU1761_RIGHT_DIFF_INPUT_VOL,
651 ADAU1761_DIFF_INPUT_VOL_LDEN,
652 ADAU1761_DIFF_INPUT_VOL_LDEN);
653 ret = snd_soc_add_codec_controls(codec,
654 adau1761_differential_mode_controls,
655 ARRAY_SIZE(adau1761_differential_mode_controls));
656 if (ret)
657 return ret;
658 } else {
659 ret = snd_soc_add_codec_controls(codec,
660 adau1761_single_mode_controls,
661 ARRAY_SIZE(adau1761_single_mode_controls));
662 if (ret)
663 return ret;
664 }
665
666 switch (adau1761_get_lineout_mode(codec)) {
667 case ADAU1761_OUTPUT_MODE_LINE:
668 break;
669 case ADAU1761_OUTPUT_MODE_HEADPHONE:
670 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_LEFT_VOL,
671 ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP,
672 ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP);
673 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_RIGHT_VOL,
674 ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP,
675 ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP);
676 break;
677 default:
678 return -EINVAL;
679 }
680
681 ret = adau1761_setup_headphone_mode(codec);
682 if (ret)
683 return ret;
684
685 ret = adau1761_setup_digmic_jackdetect(codec);
686 if (ret)
687 return ret;
688
689 if (adau->type == ADAU1761) {
690 ret = snd_soc_dapm_new_controls(&codec->dapm,
691 adau1761_dapm_widgets,
692 ARRAY_SIZE(adau1761_dapm_widgets));
693 if (ret)
694 return ret;
695
696 ret = snd_soc_dapm_add_routes(&codec->dapm,
697 adau1761_dapm_routes,
698 ARRAY_SIZE(adau1761_dapm_routes));
699 if (ret)
700 return ret;
701
702 ret = adau17x1_load_firmware(adau, codec->dev,
703 ADAU1761_FIRMWARE);
704 if (ret)
705 dev_warn(codec->dev, "Failed to firmware\n");
706 }
707
708 ret = adau17x1_add_routes(codec);
709 if (ret < 0)
710 return ret;
711
712 return 0;
713}
714
715static const struct snd_soc_codec_driver adau1761_codec_driver = {
716 .probe = adau1761_codec_probe,
717 .suspend = adau17x1_suspend,
718 .resume = adau17x1_resume,
719 .set_bias_level = adau1761_set_bias_level,
720
721 .controls = adau1761_controls,
722 .num_controls = ARRAY_SIZE(adau1761_controls),
723 .dapm_widgets = adau1x61_dapm_widgets,
724 .num_dapm_widgets = ARRAY_SIZE(adau1x61_dapm_widgets),
725 .dapm_routes = adau1x61_dapm_routes,
726 .num_dapm_routes = ARRAY_SIZE(adau1x61_dapm_routes),
727};
728
729#define ADAU1761_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
730 SNDRV_PCM_FMTBIT_S32_LE)
731
732static struct snd_soc_dai_driver adau1361_dai_driver = {
733 .name = "adau-hifi",
734 .playback = {
735 .stream_name = "Playback",
736 .channels_min = 2,
737 .channels_max = 4,
738 .rates = SNDRV_PCM_RATE_8000_96000,
739 .formats = ADAU1761_FORMATS,
740 },
741 .capture = {
742 .stream_name = "Capture",
743 .channels_min = 2,
744 .channels_max = 4,
745 .rates = SNDRV_PCM_RATE_8000_96000,
746 .formats = ADAU1761_FORMATS,
747 },
748 .ops = &adau17x1_dai_ops,
749};
750
751static struct snd_soc_dai_driver adau1761_dai_driver = {
752 .name = "adau-hifi",
753 .playback = {
754 .stream_name = "Playback",
755 .channels_min = 2,
756 .channels_max = 8,
757 .rates = SNDRV_PCM_RATE_8000_96000,
758 .formats = ADAU1761_FORMATS,
759 },
760 .capture = {
761 .stream_name = "Capture",
762 .channels_min = 2,
763 .channels_max = 8,
764 .rates = SNDRV_PCM_RATE_8000_96000,
765 .formats = ADAU1761_FORMATS,
766 },
767 .ops = &adau17x1_dai_ops,
768};
769
770int adau1761_probe(struct device *dev, struct regmap *regmap,
771 enum adau17x1_type type, void (*switch_mode)(struct device *dev))
772{
773 struct snd_soc_dai_driver *dai_drv;
774 int ret;
775
776 ret = adau17x1_probe(dev, regmap, type, switch_mode);
777 if (ret)
778 return ret;
779
780 if (type == ADAU1361)
781 dai_drv = &adau1361_dai_driver;
782 else
783 dai_drv = &adau1761_dai_driver;
784
785 return snd_soc_register_codec(dev, &adau1761_codec_driver, dai_drv, 1);
786}
787EXPORT_SYMBOL_GPL(adau1761_probe);
788
789const struct regmap_config adau1761_regmap_config = {
790 .val_bits = 8,
791 .reg_bits = 16,
792 .max_register = 0x40fa,
793 .reg_defaults = adau1761_reg_defaults,
794 .num_reg_defaults = ARRAY_SIZE(adau1761_reg_defaults),
795 .readable_reg = adau1761_readable_register,
796 .volatile_reg = adau17x1_volatile_register,
797 .cache_type = REGCACHE_RBTREE,
798};
799EXPORT_SYMBOL_GPL(adau1761_regmap_config);
800
801MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC driver");
802MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
803MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1761.h b/sound/soc/codecs/adau1761.h
new file mode 100644
index 000000000000..a9e0d288301e
--- /dev/null
+++ b/sound/soc/codecs/adau1761.h
@@ -0,0 +1,23 @@
1/*
2 * ADAU1361/ADAU1461/ADAU1761/ADAU1961 driver
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#ifndef __SOUND_SOC_CODECS_ADAU1761_H__
11#define __SOUND_SOC_CODECS_ADAU1761_H__
12
13#include <linux/regmap.h>
14#include "adau17x1.h"
15
16struct device;
17
18int adau1761_probe(struct device *dev, struct regmap *regmap,
19 enum adau17x1_type type, void (*switch_mode)(struct device *dev));
20
21extern const struct regmap_config adau1761_regmap_config;
22
23#endif
diff --git a/sound/soc/codecs/adau1781-i2c.c b/sound/soc/codecs/adau1781-i2c.c
new file mode 100644
index 000000000000..2ce4362ccec1
--- /dev/null
+++ b/sound/soc/codecs/adau1781-i2c.c
@@ -0,0 +1,58 @@
1/*
2 * Driver for ADAU1381/ADAU1781 CODEC
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/i2c.h>
11#include <linux/mod_devicetable.h>
12#include <linux/module.h>
13#include <linux/regmap.h>
14#include <sound/soc.h>
15
16#include "adau1781.h"
17
18static int adau1781_i2c_probe(struct i2c_client *client,
19 const struct i2c_device_id *id)
20{
21 struct regmap_config config;
22
23 config = adau1781_regmap_config;
24 config.val_bits = 8;
25 config.reg_bits = 16;
26
27 return adau1781_probe(&client->dev,
28 devm_regmap_init_i2c(client, &config),
29 id->driver_data, NULL);
30}
31
32static int adau1781_i2c_remove(struct i2c_client *client)
33{
34 snd_soc_unregister_codec(&client->dev);
35 return 0;
36}
37
38static const struct i2c_device_id adau1781_i2c_ids[] = {
39 { "adau1381", ADAU1381 },
40 { "adau1781", ADAU1781 },
41 { }
42};
43MODULE_DEVICE_TABLE(i2c, adau1781_i2c_ids);
44
45static struct i2c_driver adau1781_i2c_driver = {
46 .driver = {
47 .name = "adau1781",
48 .owner = THIS_MODULE,
49 },
50 .probe = adau1781_i2c_probe,
51 .remove = adau1781_i2c_remove,
52 .id_table = adau1781_i2c_ids,
53};
54module_i2c_driver(adau1781_i2c_driver);
55
56MODULE_DESCRIPTION("ASoC ADAU1381/ADAU1781 CODEC I2C driver");
57MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
58MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1781-spi.c b/sound/soc/codecs/adau1781-spi.c
new file mode 100644
index 000000000000..194686716bbe
--- /dev/null
+++ b/sound/soc/codecs/adau1781-spi.c
@@ -0,0 +1,75 @@
1/*
2 * Driver for ADAU1381/ADAU1781 CODEC
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/mod_devicetable.h>
11#include <linux/module.h>
12#include <linux/regmap.h>
13#include <linux/spi/spi.h>
14#include <sound/soc.h>
15
16#include "adau1781.h"
17
18static void adau1781_spi_switch_mode(struct device *dev)
19{
20 struct spi_device *spi = to_spi_device(dev);
21
22 /*
23 * To get the device into SPI mode CLATCH has to be pulled low three
24 * times. Do this by issuing three dummy reads.
25 */
26 spi_w8r8(spi, 0x00);
27 spi_w8r8(spi, 0x00);
28 spi_w8r8(spi, 0x00);
29}
30
31static int adau1781_spi_probe(struct spi_device *spi)
32{
33 const struct spi_device_id *id = spi_get_device_id(spi);
34 struct regmap_config config;
35
36 if (!id)
37 return -EINVAL;
38
39 config = adau1781_regmap_config;
40 config.val_bits = 8;
41 config.reg_bits = 24;
42 config.read_flag_mask = 0x1;
43
44 return adau1781_probe(&spi->dev,
45 devm_regmap_init_spi(spi, &config),
46 id->driver_data, adau1781_spi_switch_mode);
47}
48
49static int adau1781_spi_remove(struct spi_device *spi)
50{
51 snd_soc_unregister_codec(&spi->dev);
52 return 0;
53}
54
55static const struct spi_device_id adau1781_spi_id[] = {
56 { "adau1381", ADAU1381 },
57 { "adau1781", ADAU1781 },
58 { }
59};
60MODULE_DEVICE_TABLE(spi, adau1781_spi_id);
61
62static struct spi_driver adau1781_spi_driver = {
63 .driver = {
64 .name = "adau1781",
65 .owner = THIS_MODULE,
66 },
67 .probe = adau1781_spi_probe,
68 .remove = adau1781_spi_remove,
69 .id_table = adau1781_spi_id,
70};
71module_spi_driver(adau1781_spi_driver);
72
73MODULE_DESCRIPTION("ASoC ADAU1381/ADAU1781 CODEC SPI driver");
74MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
75MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1781.c b/sound/soc/codecs/adau1781.c
new file mode 100644
index 000000000000..045a61413840
--- /dev/null
+++ b/sound/soc/codecs/adau1781.c
@@ -0,0 +1,511 @@
1/*
2 * Driver for ADAU1781/ADAU1781 codec
3 *
4 * Copyright 2011-2013 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/i2c.h>
13#include <linux/spi/spi.h>
14#include <linux/slab.h>
15#include <sound/core.h>
16#include <sound/pcm.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19#include <sound/tlv.h>
20#include <linux/platform_data/adau17x1.h>
21
22#include "adau17x1.h"
23#include "adau1781.h"
24
25#define ADAU1781_DMIC_BEEP_CTRL 0x4008
26#define ADAU1781_LEFT_PGA 0x400e
27#define ADAU1781_RIGHT_PGA 0x400f
28#define ADAU1781_LEFT_PLAYBACK_MIXER 0x401c
29#define ADAU1781_RIGHT_PLAYBACK_MIXER 0x401e
30#define ADAU1781_MONO_PLAYBACK_MIXER 0x401f
31#define ADAU1781_LEFT_LINEOUT 0x4025
32#define ADAU1781_RIGHT_LINEOUT 0x4026
33#define ADAU1781_SPEAKER 0x4027
34#define ADAU1781_BEEP_ZC 0x4028
35#define ADAU1781_DEJITTER 0x4032
36#define ADAU1781_DIG_PWDN0 0x4080
37#define ADAU1781_DIG_PWDN1 0x4081
38
39#define ADAU1781_INPUT_DIFFERNTIAL BIT(3)
40
41#define ADAU1381_FIRMWARE "adau1381.bin"
42#define ADAU1781_FIRMWARE "adau1781.bin"
43
44static const struct reg_default adau1781_reg_defaults[] = {
45 { ADAU1781_DMIC_BEEP_CTRL, 0x00 },
46 { ADAU1781_LEFT_PGA, 0xc7 },
47 { ADAU1781_RIGHT_PGA, 0xc7 },
48 { ADAU1781_LEFT_PLAYBACK_MIXER, 0x00 },
49 { ADAU1781_RIGHT_PLAYBACK_MIXER, 0x00 },
50 { ADAU1781_MONO_PLAYBACK_MIXER, 0x00 },
51 { ADAU1781_LEFT_LINEOUT, 0x00 },
52 { ADAU1781_RIGHT_LINEOUT, 0x00 },
53 { ADAU1781_SPEAKER, 0x00 },
54 { ADAU1781_BEEP_ZC, 0x19 },
55 { ADAU1781_DEJITTER, 0x60 },
56 { ADAU1781_DIG_PWDN1, 0x0c },
57 { ADAU1781_DIG_PWDN1, 0x00 },
58 { ADAU17X1_CLOCK_CONTROL, 0x00 },
59 { ADAU17X1_PLL_CONTROL, 0x00 },
60 { ADAU17X1_REC_POWER_MGMT, 0x00 },
61 { ADAU17X1_MICBIAS, 0x04 },
62 { ADAU17X1_SERIAL_PORT0, 0x00 },
63 { ADAU17X1_SERIAL_PORT1, 0x00 },
64 { ADAU17X1_CONVERTER0, 0x00 },
65 { ADAU17X1_CONVERTER1, 0x00 },
66 { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 },
67 { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 },
68 { ADAU17X1_ADC_CONTROL, 0x00 },
69 { ADAU17X1_PLAY_POWER_MGMT, 0x00 },
70 { ADAU17X1_DAC_CONTROL0, 0x00 },
71 { ADAU17X1_DAC_CONTROL1, 0x00 },
72 { ADAU17X1_DAC_CONTROL2, 0x00 },
73 { ADAU17X1_SERIAL_PORT_PAD, 0x00 },
74 { ADAU17X1_CONTROL_PORT_PAD0, 0x00 },
75 { ADAU17X1_CONTROL_PORT_PAD1, 0x00 },
76 { ADAU17X1_DSP_SAMPLING_RATE, 0x01 },
77 { ADAU17X1_SERIAL_INPUT_ROUTE, 0x00 },
78 { ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x00 },
79 { ADAU17X1_DSP_ENABLE, 0x00 },
80 { ADAU17X1_DSP_RUN, 0x00 },
81 { ADAU17X1_SERIAL_SAMPLING_RATE, 0x00 },
82};
83
84static const DECLARE_TLV_DB_SCALE(adau1781_speaker_tlv, 0, 200, 0);
85
86static const DECLARE_TLV_DB_RANGE(adau1781_pga_tlv,
87 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0),
88 2, 3, TLV_DB_SCALE_ITEM(1000, 400, 0),
89 4, 4, TLV_DB_SCALE_ITEM(1700, 0, 0),
90 5, 7, TLV_DB_SCALE_ITEM(2000, 600, 0)
91);
92
93static const DECLARE_TLV_DB_RANGE(adau1781_beep_tlv,
94 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0),
95 2, 3, TLV_DB_SCALE_ITEM(1000, 400, 0),
96 4, 4, TLV_DB_SCALE_ITEM(-2300, 0, 0),
97 5, 7, TLV_DB_SCALE_ITEM(2000, 600, 0)
98);
99
100static const DECLARE_TLV_DB_SCALE(adau1781_sidetone_tlv, -1800, 300, 1);
101
102static const char * const adau1781_speaker_bias_select_text[] = {
103 "Normal operation", "Power saving", "Enhanced performance",
104};
105
106static const char * const adau1781_bias_select_text[] = {
107 "Normal operation", "Extreme power saving", "Power saving",
108 "Enhanced performance",
109};
110
111static SOC_ENUM_SINGLE_DECL(adau1781_adc_bias_enum,
112 ADAU17X1_REC_POWER_MGMT, 3, adau1781_bias_select_text);
113static SOC_ENUM_SINGLE_DECL(adau1781_speaker_bias_enum,
114 ADAU17X1_PLAY_POWER_MGMT, 6, adau1781_speaker_bias_select_text);
115static SOC_ENUM_SINGLE_DECL(adau1781_dac_bias_enum,
116 ADAU17X1_PLAY_POWER_MGMT, 4, adau1781_bias_select_text);
117static SOC_ENUM_SINGLE_DECL(adau1781_playback_bias_enum,
118 ADAU17X1_PLAY_POWER_MGMT, 2, adau1781_bias_select_text);
119static SOC_ENUM_SINGLE_DECL(adau1781_capture_bias_enum,
120 ADAU17X1_REC_POWER_MGMT, 1, adau1781_bias_select_text);
121
122static const struct snd_kcontrol_new adau1781_controls[] = {
123 SOC_SINGLE_TLV("Beep Capture Volume", ADAU1781_DMIC_BEEP_CTRL, 0, 7, 0,
124 adau1781_beep_tlv),
125 SOC_DOUBLE_R_TLV("PGA Capture Volume", ADAU1781_LEFT_PGA,
126 ADAU1781_RIGHT_PGA, 5, 7, 0, adau1781_pga_tlv),
127 SOC_DOUBLE_R("PGA Capture Switch", ADAU1781_LEFT_PGA,
128 ADAU1781_RIGHT_PGA, 1, 1, 0),
129
130 SOC_DOUBLE_R("Lineout Playback Switch", ADAU1781_LEFT_LINEOUT,
131 ADAU1781_RIGHT_LINEOUT, 1, 1, 0),
132 SOC_SINGLE("Beep ZC Switch", ADAU1781_BEEP_ZC, 0, 1, 0),
133
134 SOC_SINGLE("Mono Playback Switch", ADAU1781_MONO_PLAYBACK_MIXER,
135 0, 1, 0),
136 SOC_SINGLE_TLV("Mono Playback Volume", ADAU1781_SPEAKER, 6, 3, 0,
137 adau1781_speaker_tlv),
138
139 SOC_ENUM("ADC Bias", adau1781_adc_bias_enum),
140 SOC_ENUM("DAC Bias", adau1781_dac_bias_enum),
141 SOC_ENUM("Capture Bias", adau1781_capture_bias_enum),
142 SOC_ENUM("Playback Bias", adau1781_playback_bias_enum),
143 SOC_ENUM("Speaker Bias", adau1781_speaker_bias_enum),
144};
145
146static const struct snd_kcontrol_new adau1781_beep_mixer_controls[] = {
147 SOC_DAPM_SINGLE("Beep Capture Switch", ADAU1781_DMIC_BEEP_CTRL,
148 3, 1, 0),
149};
150
151static const struct snd_kcontrol_new adau1781_left_mixer_controls[] = {
152 SOC_DAPM_SINGLE_AUTODISABLE("Switch",
153 ADAU1781_LEFT_PLAYBACK_MIXER, 5, 1, 0),
154 SOC_DAPM_SINGLE_TLV("Beep Playback Volume",
155 ADAU1781_LEFT_PLAYBACK_MIXER, 1, 8, 0, adau1781_sidetone_tlv),
156};
157
158static const struct snd_kcontrol_new adau1781_right_mixer_controls[] = {
159 SOC_DAPM_SINGLE_AUTODISABLE("Switch",
160 ADAU1781_RIGHT_PLAYBACK_MIXER, 6, 1, 0),
161 SOC_DAPM_SINGLE_TLV("Beep Playback Volume",
162 ADAU1781_LEFT_PLAYBACK_MIXER, 1, 8, 0, adau1781_sidetone_tlv),
163};
164
165static const struct snd_kcontrol_new adau1781_mono_mixer_controls[] = {
166 SOC_DAPM_SINGLE_AUTODISABLE("Left Switch",
167 ADAU1781_MONO_PLAYBACK_MIXER, 7, 1, 0),
168 SOC_DAPM_SINGLE_AUTODISABLE("Right Switch",
169 ADAU1781_MONO_PLAYBACK_MIXER, 6, 1, 0),
170 SOC_DAPM_SINGLE_TLV("Beep Playback Volume",
171 ADAU1781_MONO_PLAYBACK_MIXER, 2, 8, 0, adau1781_sidetone_tlv),
172};
173
174static int adau1781_dejitter_fixup(struct snd_soc_dapm_widget *w,
175 struct snd_kcontrol *kcontrol, int event)
176{
177 struct snd_soc_codec *codec = w->codec;
178 struct adau *adau = snd_soc_codec_get_drvdata(codec);
179
180 /* After any power changes have been made the dejitter circuit
181 * has to be reinitialized. */
182 regmap_write(adau->regmap, ADAU1781_DEJITTER, 0);
183 if (!adau->master)
184 regmap_write(adau->regmap, ADAU1781_DEJITTER, 5);
185
186 return 0;
187}
188
189static const struct snd_soc_dapm_widget adau1781_dapm_widgets[] = {
190 SND_SOC_DAPM_PGA("Left PGA", ADAU1781_LEFT_PGA, 0, 0, NULL, 0),
191 SND_SOC_DAPM_PGA("Right PGA", ADAU1781_RIGHT_PGA, 0, 0, NULL, 0),
192
193 SND_SOC_DAPM_OUT_DRV("Speaker", ADAU1781_SPEAKER, 0, 0, NULL, 0),
194
195 SOC_MIXER_NAMED_CTL_ARRAY("Beep Mixer", ADAU17X1_MICBIAS, 4, 0,
196 adau1781_beep_mixer_controls),
197
198 SOC_MIXER_ARRAY("Left Lineout Mixer", SND_SOC_NOPM, 0, 0,
199 adau1781_left_mixer_controls),
200 SOC_MIXER_ARRAY("Right Lineout Mixer", SND_SOC_NOPM, 0, 0,
201 adau1781_right_mixer_controls),
202 SOC_MIXER_ARRAY("Mono Mixer", SND_SOC_NOPM, 0, 0,
203 adau1781_mono_mixer_controls),
204
205 SND_SOC_DAPM_SUPPLY("Serial Input Routing", ADAU1781_DIG_PWDN0,
206 2, 0, NULL, 0),
207 SND_SOC_DAPM_SUPPLY("Serial Output Routing", ADAU1781_DIG_PWDN0,
208 3, 0, NULL, 0),
209 SND_SOC_DAPM_SUPPLY("Clock Domain Transfer", ADAU1781_DIG_PWDN0,
210 5, 0, NULL, 0),
211 SND_SOC_DAPM_SUPPLY("Serial Ports", ADAU1781_DIG_PWDN0, 4, 0, NULL, 0),
212 SND_SOC_DAPM_SUPPLY("ADC Engine", ADAU1781_DIG_PWDN0, 7, 0, NULL, 0),
213 SND_SOC_DAPM_SUPPLY("DAC Engine", ADAU1781_DIG_PWDN1, 0, 0, NULL, 0),
214 SND_SOC_DAPM_SUPPLY("Digital Mic", ADAU1781_DIG_PWDN1, 1, 0, NULL, 0),
215
216 SND_SOC_DAPM_SUPPLY("Sound Engine", ADAU1781_DIG_PWDN0, 0, 0, NULL, 0),
217 SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, ADAU1781_DIG_PWDN0, 1, 0, NULL, 0),
218
219 SND_SOC_DAPM_SUPPLY("Zero Crossing Detector", ADAU1781_DIG_PWDN1, 2, 0,
220 NULL, 0),
221
222 SND_SOC_DAPM_POST("Dejitter fixup", adau1781_dejitter_fixup),
223
224 SND_SOC_DAPM_INPUT("BEEP"),
225
226 SND_SOC_DAPM_OUTPUT("AOUTL"),
227 SND_SOC_DAPM_OUTPUT("AOUTR"),
228 SND_SOC_DAPM_OUTPUT("SP"),
229 SND_SOC_DAPM_INPUT("LMIC"),
230 SND_SOC_DAPM_INPUT("RMIC"),
231};
232
233static const struct snd_soc_dapm_route adau1781_dapm_routes[] = {
234 { "Left Lineout Mixer", NULL, "Left Playback Enable" },
235 { "Right Lineout Mixer", NULL, "Right Playback Enable" },
236
237 { "Left Lineout Mixer", "Beep Playback Volume", "Beep Mixer" },
238 { "Left Lineout Mixer", "Switch", "Left DAC" },
239
240 { "Right Lineout Mixer", "Beep Playback Volume", "Beep Mixer" },
241 { "Right Lineout Mixer", "Switch", "Right DAC" },
242
243 { "Mono Mixer", "Beep Playback Volume", "Beep Mixer" },
244 { "Mono Mixer", "Right Switch", "Right DAC" },
245 { "Mono Mixer", "Left Switch", "Left DAC" },
246 { "Speaker", NULL, "Mono Mixer" },
247
248 { "Mono Mixer", NULL, "SYSCLK" },
249 { "Left Lineout Mixer", NULL, "SYSCLK" },
250 { "Left Lineout Mixer", NULL, "SYSCLK" },
251
252 { "Beep Mixer", "Beep Capture Switch", "BEEP" },
253 { "Beep Mixer", NULL, "Zero Crossing Detector" },
254
255 { "Left DAC", NULL, "DAC Engine" },
256 { "Right DAC", NULL, "DAC Engine" },
257
258 { "Sound Engine", NULL, "SYSCLK" },
259 { "DSP", NULL, "Sound Engine" },
260
261 { "Left Decimator", NULL, "ADC Engine" },
262 { "Right Decimator", NULL, "ADC Engine" },
263
264 { "AIFCLK", NULL, "SYSCLK" },
265
266 { "Playback", NULL, "Serial Input Routing" },
267 { "Playback", NULL, "Serial Ports" },
268 { "Playback", NULL, "Clock Domain Transfer" },
269 { "Capture", NULL, "Serial Output Routing" },
270 { "Capture", NULL, "Serial Ports" },
271 { "Capture", NULL, "Clock Domain Transfer" },
272
273 { "AOUTL", NULL, "Left Lineout Mixer" },
274 { "AOUTR", NULL, "Right Lineout Mixer" },
275 { "SP", NULL, "Speaker" },
276};
277
278static const struct snd_soc_dapm_route adau1781_adc_dapm_routes[] = {
279 { "Left PGA", NULL, "LMIC" },
280 { "Right PGA", NULL, "RMIC" },
281
282 { "Left Decimator", NULL, "Left PGA" },
283 { "Right Decimator", NULL, "Right PGA" },
284};
285
286static const char * const adau1781_dmic_select_text[] = {
287 "DMIC1", "DMIC2",
288};
289
290static SOC_ENUM_SINGLE_VIRT_DECL(adau1781_dmic_select_enum,
291 adau1781_dmic_select_text);
292
293static const struct snd_kcontrol_new adau1781_dmic_mux =
294 SOC_DAPM_ENUM("DMIC Select", adau1781_dmic_select_enum);
295
296static const struct snd_soc_dapm_widget adau1781_dmic_dapm_widgets[] = {
297 SND_SOC_DAPM_MUX("DMIC Select", SND_SOC_NOPM, 0, 0, &adau1781_dmic_mux),
298
299 SND_SOC_DAPM_ADC("DMIC1", NULL, ADAU1781_DMIC_BEEP_CTRL, 4, 0),
300 SND_SOC_DAPM_ADC("DMIC2", NULL, ADAU1781_DMIC_BEEP_CTRL, 5, 0),
301};
302
303static const struct snd_soc_dapm_route adau1781_dmic_dapm_routes[] = {
304 { "DMIC1", NULL, "LMIC" },
305 { "DMIC2", NULL, "RMIC" },
306
307 { "DMIC1", NULL, "Digital Mic" },
308 { "DMIC2", NULL, "Digital Mic" },
309
310 { "DMIC Select", "DMIC1", "DMIC1" },
311 { "DMIC Select", "DMIC2", "DMIC2" },
312
313 { "Left Decimator", NULL, "DMIC Select" },
314 { "Right Decimator", NULL, "DMIC Select" },
315};
316
317static int adau1781_set_bias_level(struct snd_soc_codec *codec,
318 enum snd_soc_bias_level level)
319{
320 struct adau *adau = snd_soc_codec_get_drvdata(codec);
321
322 switch (level) {
323 case SND_SOC_BIAS_ON:
324 break;
325 case SND_SOC_BIAS_PREPARE:
326 break;
327 case SND_SOC_BIAS_STANDBY:
328 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
329 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN,
330 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN);
331
332 /* Precharge */
333 regmap_update_bits(adau->regmap, ADAU1781_DIG_PWDN1, 0x8, 0x8);
334 break;
335 case SND_SOC_BIAS_OFF:
336 regmap_update_bits(adau->regmap, ADAU1781_DIG_PWDN1, 0xc, 0x0);
337 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
338 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0);
339 break;
340 }
341
342 codec->dapm.bias_level = level;
343 return 0;
344}
345
346static bool adau1781_readable_register(struct device *dev, unsigned int reg)
347{
348 switch (reg) {
349 case ADAU1781_DMIC_BEEP_CTRL:
350 case ADAU1781_LEFT_PGA:
351 case ADAU1781_RIGHT_PGA:
352 case ADAU1781_LEFT_PLAYBACK_MIXER:
353 case ADAU1781_RIGHT_PLAYBACK_MIXER:
354 case ADAU1781_MONO_PLAYBACK_MIXER:
355 case ADAU1781_LEFT_LINEOUT:
356 case ADAU1781_RIGHT_LINEOUT:
357 case ADAU1781_SPEAKER:
358 case ADAU1781_BEEP_ZC:
359 case ADAU1781_DEJITTER:
360 case ADAU1781_DIG_PWDN0:
361 case ADAU1781_DIG_PWDN1:
362 return true;
363 default:
364 break;
365 }
366
367 return adau17x1_readable_register(dev, reg);
368}
369
370static int adau1781_set_input_mode(struct adau *adau, unsigned int reg,
371 bool differential)
372{
373 unsigned int val;
374
375 if (differential)
376 val = ADAU1781_INPUT_DIFFERNTIAL;
377 else
378 val = 0;
379
380 return regmap_update_bits(adau->regmap, reg,
381 ADAU1781_INPUT_DIFFERNTIAL, val);
382}
383
384static int adau1781_codec_probe(struct snd_soc_codec *codec)
385{
386 struct adau1781_platform_data *pdata = dev_get_platdata(codec->dev);
387 struct adau *adau = snd_soc_codec_get_drvdata(codec);
388 const char *firmware;
389 int ret;
390
391 ret = adau17x1_add_widgets(codec);
392 if (ret)
393 return ret;
394
395 if (pdata) {
396 ret = adau1781_set_input_mode(adau, ADAU1781_LEFT_PGA,
397 pdata->left_input_differential);
398 if (ret)
399 return ret;
400 ret = adau1781_set_input_mode(adau, ADAU1781_RIGHT_PGA,
401 pdata->right_input_differential);
402 if (ret)
403 return ret;
404 }
405
406 if (pdata && pdata->use_dmic) {
407 ret = snd_soc_dapm_new_controls(&codec->dapm,
408 adau1781_dmic_dapm_widgets,
409 ARRAY_SIZE(adau1781_dmic_dapm_widgets));
410 if (ret)
411 return ret;
412 ret = snd_soc_dapm_add_routes(&codec->dapm,
413 adau1781_dmic_dapm_routes,
414 ARRAY_SIZE(adau1781_dmic_dapm_routes));
415 if (ret)
416 return ret;
417 } else {
418 ret = snd_soc_dapm_add_routes(&codec->dapm,
419 adau1781_adc_dapm_routes,
420 ARRAY_SIZE(adau1781_adc_dapm_routes));
421 if (ret)
422 return ret;
423 }
424
425 switch (adau->type) {
426 case ADAU1381:
427 firmware = ADAU1381_FIRMWARE;
428 break;
429 case ADAU1781:
430 firmware = ADAU1781_FIRMWARE;
431 break;
432 default:
433 return -EINVAL;
434 }
435
436 ret = adau17x1_add_routes(codec);
437 if (ret < 0)
438 return ret;
439
440 ret = adau17x1_load_firmware(adau, codec->dev, firmware);
441 if (ret)
442 dev_warn(codec->dev, "Failed to load firmware\n");
443
444 return 0;
445}
446
447static const struct snd_soc_codec_driver adau1781_codec_driver = {
448 .probe = adau1781_codec_probe,
449 .suspend = adau17x1_suspend,
450 .resume = adau17x1_resume,
451 .set_bias_level = adau1781_set_bias_level,
452
453 .controls = adau1781_controls,
454 .num_controls = ARRAY_SIZE(adau1781_controls),
455 .dapm_widgets = adau1781_dapm_widgets,
456 .num_dapm_widgets = ARRAY_SIZE(adau1781_dapm_widgets),
457 .dapm_routes = adau1781_dapm_routes,
458 .num_dapm_routes = ARRAY_SIZE(adau1781_dapm_routes),
459};
460
461#define ADAU1781_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
462 SNDRV_PCM_FMTBIT_S32_LE)
463
464static struct snd_soc_dai_driver adau1781_dai_driver = {
465 .name = "adau-hifi",
466 .playback = {
467 .stream_name = "Playback",
468 .channels_min = 2,
469 .channels_max = 8,
470 .rates = SNDRV_PCM_RATE_8000_96000,
471 .formats = ADAU1781_FORMATS,
472 },
473 .capture = {
474 .stream_name = "Capture",
475 .channels_min = 2,
476 .channels_max = 8,
477 .rates = SNDRV_PCM_RATE_8000_96000,
478 .formats = ADAU1781_FORMATS,
479 },
480 .ops = &adau17x1_dai_ops,
481};
482
483const struct regmap_config adau1781_regmap_config = {
484 .val_bits = 8,
485 .reg_bits = 16,
486 .max_register = 0x40f8,
487 .reg_defaults = adau1781_reg_defaults,
488 .num_reg_defaults = ARRAY_SIZE(adau1781_reg_defaults),
489 .readable_reg = adau1781_readable_register,
490 .volatile_reg = adau17x1_volatile_register,
491 .cache_type = REGCACHE_RBTREE,
492};
493EXPORT_SYMBOL_GPL(adau1781_regmap_config);
494
495int adau1781_probe(struct device *dev, struct regmap *regmap,
496 enum adau17x1_type type, void (*switch_mode)(struct device *dev))
497{
498 int ret;
499
500 ret = adau17x1_probe(dev, regmap, type, switch_mode);
501 if (ret)
502 return ret;
503
504 return snd_soc_register_codec(dev, &adau1781_codec_driver,
505 &adau1781_dai_driver, 1);
506}
507EXPORT_SYMBOL_GPL(adau1781_probe);
508
509MODULE_DESCRIPTION("ASoC ADAU1381/ADAU1781 driver");
510MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
511MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau1781.h b/sound/soc/codecs/adau1781.h
new file mode 100644
index 000000000000..2b96e0a9ff2e
--- /dev/null
+++ b/sound/soc/codecs/adau1781.h
@@ -0,0 +1,23 @@
1/*
2 * ADAU1381/ADAU1781 driver
3 *
4 * Copyright 2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#ifndef __SOUND_SOC_CODECS_ADAU1781_H__
11#define __SOUND_SOC_CODECS_ADAU1781_H__
12
13#include <linux/regmap.h>
14#include "adau17x1.h"
15
16struct device;
17
18int adau1781_probe(struct device *dev, struct regmap *regmap,
19 enum adau17x1_type type, void (*switch_mode)(struct device *dev));
20
21extern const struct regmap_config adau1781_regmap_config;
22
23#endif
diff --git a/sound/soc/codecs/adau17x1.c b/sound/soc/codecs/adau17x1.c
new file mode 100644
index 000000000000..2961fae9670a
--- /dev/null
+++ b/sound/soc/codecs/adau17x1.c
@@ -0,0 +1,866 @@
1/*
2 * Common code for ADAU1X61 and ADAU1X81 codecs
3 *
4 * Copyright 2011-2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/pcm.h>
16#include <sound/pcm_params.h>
17#include <sound/soc.h>
18#include <sound/tlv.h>
19#include <linux/gcd.h>
20#include <linux/i2c.h>
21#include <linux/spi/spi.h>
22#include <linux/regmap.h>
23
24#include "sigmadsp.h"
25#include "adau17x1.h"
26
27static const char * const adau17x1_capture_mixer_boost_text[] = {
28 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
29};
30
31static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
32 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
33
34static const char * const adau17x1_mic_bias_mode_text[] = {
35 "Normal operation", "High performance",
36};
37
38static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
39 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
40
41static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
42
43static const struct snd_kcontrol_new adau17x1_controls[] = {
44 SOC_DOUBLE_R_TLV("Digital Capture Volume",
45 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
46 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
47 0, 0xff, 1, adau17x1_digital_tlv),
48 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
49 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
50
51 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
52 5, 1, 0),
53 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
54 2, 1, 0),
55
56 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
57
58 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
59};
60
61static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
62 struct snd_kcontrol *kcontrol, int event)
63{
64 struct adau *adau = snd_soc_codec_get_drvdata(w->codec);
65 int ret;
66
67 if (SND_SOC_DAPM_EVENT_ON(event)) {
68 adau->pll_regs[5] = 1;
69 } else {
70 adau->pll_regs[5] = 0;
71 /* Bypass the PLL when disabled, otherwise registers will become
72 * inaccessible. */
73 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
74 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
75 }
76
77 /* The PLL register is 6 bytes long and can only be written at once. */
78 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
79 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
80
81 if (SND_SOC_DAPM_EVENT_ON(event)) {
82 mdelay(5);
83 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
84 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
85 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
86 }
87
88 return 0;
89}
90
91static const char * const adau17x1_mono_stereo_text[] = {
92 "Stereo",
93 "Mono Left Channel (L+R)",
94 "Mono Right Channel (L+R)",
95 "Mono (L+R)",
96};
97
98static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
99 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
100
101static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
102 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
103
104static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
105 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
106 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
107
108 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
109
110 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
111
112 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
113 0, 0, NULL, 0),
114 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
115 1, 0, NULL, 0),
116
117 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
118 &adau17x1_dac_mode_mux),
119 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
120 &adau17x1_dac_mode_mux),
121
122 SND_SOC_DAPM_ADC("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0),
123 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
124 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
125 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
126};
127
128static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
129 { "Left Decimator", NULL, "SYSCLK" },
130 { "Right Decimator", NULL, "SYSCLK" },
131 { "Left DAC", NULL, "SYSCLK" },
132 { "Right DAC", NULL, "SYSCLK" },
133 { "Capture", NULL, "SYSCLK" },
134 { "Playback", NULL, "SYSCLK" },
135
136 { "Left DAC", NULL, "Left DAC Mode Mux" },
137 { "Right DAC", NULL, "Right DAC Mode Mux" },
138
139 { "Capture", NULL, "AIFCLK" },
140 { "Playback", NULL, "AIFCLK" },
141};
142
143static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
144 "SYSCLK", NULL, "PLL",
145};
146
147/*
148 * The MUX register for the Capture and Playback MUXs selects either DSP as
149 * source/destination or one of the TDM slots. The TDM slot is selected via
150 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
151 * directly to the DAI interface with this control.
152 */
153static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
154 struct snd_ctl_elem_value *ucontrol)
155{
156 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
157 struct adau *adau = snd_soc_codec_get_drvdata(codec);
158 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
159 struct snd_soc_dapm_update update;
160 unsigned int stream = e->shift_l;
161 unsigned int val, change;
162 int reg;
163
164 if (ucontrol->value.enumerated.item[0] >= e->items)
165 return -EINVAL;
166
167 switch (ucontrol->value.enumerated.item[0]) {
168 case 0:
169 val = 0;
170 adau->dsp_bypass[stream] = false;
171 break;
172 default:
173 val = (adau->tdm_slot[stream] * 2) + 1;
174 adau->dsp_bypass[stream] = true;
175 break;
176 }
177
178 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
179 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
180 else
181 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
182
183 change = snd_soc_test_bits(codec, reg, 0xff, val);
184 if (change) {
185 update.kcontrol = kcontrol;
186 update.mask = 0xff;
187 update.reg = reg;
188 update.val = val;
189
190 snd_soc_dapm_mux_update_power(&codec->dapm, kcontrol,
191 ucontrol->value.enumerated.item[0], e, &update);
192 }
193
194 return change;
195}
196
197static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
198 struct snd_ctl_elem_value *ucontrol)
199{
200 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
201 struct adau *adau = snd_soc_codec_get_drvdata(codec);
202 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
203 unsigned int stream = e->shift_l;
204 unsigned int reg, val;
205 int ret;
206
207 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
208 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
209 else
210 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
211
212 ret = regmap_read(adau->regmap, reg, &val);
213 if (ret)
214 return ret;
215
216 if (val != 0)
217 val = 1;
218 ucontrol->value.enumerated.item[0] = val;
219
220 return 0;
221}
222
223#define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
224 const struct snd_kcontrol_new _name = \
225 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
226 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
227 ARRAY_SIZE(_text), _text), \
228 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
229
230static const char * const adau17x1_dac_mux_text[] = {
231 "DSP",
232 "AIFIN",
233};
234
235static const char * const adau17x1_capture_mux_text[] = {
236 "DSP",
237 "Decimator",
238};
239
240static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
241 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
242
243static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
244 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
245
246static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
247 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
248 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
249
250 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
251 &adau17x1_dac_mux),
252 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
253 &adau17x1_capture_mux),
254};
255
256static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
257 { "DAC Playback Mux", "DSP", "DSP" },
258 { "DAC Playback Mux", "AIFIN", "Playback" },
259
260 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
261 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
262 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
263 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
264 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
265 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
266
267 { "Capture Mux", "DSP", "DSP" },
268 { "Capture Mux", "Decimator", "Left Decimator" },
269 { "Capture Mux", "Decimator", "Right Decimator" },
270
271 { "Capture", NULL, "Capture Mux" },
272
273 { "DSP", NULL, "DSP Siggen" },
274
275 { "DSP", NULL, "Left Decimator" },
276 { "DSP", NULL, "Right Decimator" },
277};
278
279static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
280 { "Left DAC Mode Mux", "Stereo", "Playback" },
281 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
282 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
283 { "Right DAC Mode Mux", "Stereo", "Playback" },
284 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
285 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
286 { "Capture", NULL, "Left Decimator" },
287 { "Capture", NULL, "Right Decimator" },
288};
289
290bool adau17x1_has_dsp(struct adau *adau)
291{
292 switch (adau->type) {
293 case ADAU1761:
294 case ADAU1381:
295 case ADAU1781:
296 return true;
297 default:
298 return false;
299 }
300}
301EXPORT_SYMBOL_GPL(adau17x1_has_dsp);
302
303static int adau17x1_hw_params(struct snd_pcm_substream *substream,
304 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
305{
306 struct snd_soc_codec *codec = dai->codec;
307 struct adau *adau = snd_soc_codec_get_drvdata(codec);
308 unsigned int val, div, dsp_div;
309 unsigned int freq;
310
311 if (adau->clk_src == ADAU17X1_CLK_SRC_PLL)
312 freq = adau->pll_freq;
313 else
314 freq = adau->sysclk;
315
316 if (freq % params_rate(params) != 0)
317 return -EINVAL;
318
319 switch (freq / params_rate(params)) {
320 case 1024: /* fs */
321 div = 0;
322 dsp_div = 1;
323 break;
324 case 6144: /* fs / 6 */
325 div = 1;
326 dsp_div = 6;
327 break;
328 case 4096: /* fs / 4 */
329 div = 2;
330 dsp_div = 5;
331 break;
332 case 3072: /* fs / 3 */
333 div = 3;
334 dsp_div = 4;
335 break;
336 case 2048: /* fs / 2 */
337 div = 4;
338 dsp_div = 3;
339 break;
340 case 1536: /* fs / 1.5 */
341 div = 5;
342 dsp_div = 2;
343 break;
344 case 512: /* fs / 0.5 */
345 div = 6;
346 dsp_div = 0;
347 break;
348 default:
349 return -EINVAL;
350 }
351
352 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
353 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
354 if (adau17x1_has_dsp(adau)) {
355 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
356 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
357 }
358
359 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
360 return 0;
361
362 switch (params_format(params)) {
363 case SNDRV_PCM_FORMAT_S16_LE:
364 val = ADAU17X1_SERIAL_PORT1_DELAY16;
365 break;
366 case SNDRV_PCM_FORMAT_S24_LE:
367 val = ADAU17X1_SERIAL_PORT1_DELAY8;
368 break;
369 case SNDRV_PCM_FORMAT_S32_LE:
370 val = ADAU17X1_SERIAL_PORT1_DELAY0;
371 break;
372 default:
373 return -EINVAL;
374 }
375
376 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
377 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
378}
379
380static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
381 int source, unsigned int freq_in, unsigned int freq_out)
382{
383 struct snd_soc_codec *codec = dai->codec;
384 struct adau *adau = snd_soc_codec_get_drvdata(codec);
385 unsigned int r, n, m, i, j;
386 unsigned int div;
387 int ret;
388
389 if (freq_in < 8000000 || freq_in > 27000000)
390 return -EINVAL;
391
392 if (!freq_out) {
393 r = 0;
394 n = 0;
395 m = 0;
396 div = 0;
397 } else {
398 if (freq_out % freq_in != 0) {
399 div = DIV_ROUND_UP(freq_in, 13500000);
400 freq_in /= div;
401 r = freq_out / freq_in;
402 i = freq_out % freq_in;
403 j = gcd(i, freq_in);
404 n = i / j;
405 m = freq_in / j;
406 div--;
407 } else {
408 r = freq_out / freq_in;
409 n = 0;
410 m = 0;
411 div = 0;
412 }
413 if (n > 0xffff || m > 0xffff || div > 3 || r > 8 || r < 2)
414 return -EINVAL;
415 }
416
417 adau->pll_regs[0] = m >> 8;
418 adau->pll_regs[1] = m & 0xff;
419 adau->pll_regs[2] = n >> 8;
420 adau->pll_regs[3] = n & 0xff;
421 adau->pll_regs[4] = (r << 3) | (div << 1);
422 if (m != 0)
423 adau->pll_regs[4] |= 1; /* Fractional mode */
424
425 /* The PLL register is 6 bytes long and can only be written at once. */
426 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
427 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
428 if (ret)
429 return ret;
430
431 adau->pll_freq = freq_out;
432
433 return 0;
434}
435
436static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
437 int clk_id, unsigned int freq, int dir)
438{
439 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
440 struct snd_soc_dapm_context *dapm = &dai->codec->dapm;
441
442 switch (clk_id) {
443 case ADAU17X1_CLK_SRC_MCLK:
444 case ADAU17X1_CLK_SRC_PLL:
445 break;
446 default:
447 return -EINVAL;
448 }
449
450 adau->sysclk = freq;
451
452 if (adau->clk_src != clk_id) {
453 if (clk_id == ADAU17X1_CLK_SRC_PLL) {
454 snd_soc_dapm_add_routes(dapm,
455 &adau17x1_dapm_pll_route, 1);
456 } else {
457 snd_soc_dapm_del_routes(dapm,
458 &adau17x1_dapm_pll_route, 1);
459 }
460 }
461
462 adau->clk_src = clk_id;
463
464 return 0;
465}
466
467static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
468 unsigned int fmt)
469{
470 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
471 unsigned int ctrl0, ctrl1;
472 int lrclk_pol;
473
474 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
475 case SND_SOC_DAIFMT_CBM_CFM:
476 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
477 adau->master = true;
478 break;
479 case SND_SOC_DAIFMT_CBS_CFS:
480 ctrl0 = 0;
481 adau->master = false;
482 break;
483 default:
484 return -EINVAL;
485 }
486
487 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
488 case SND_SOC_DAIFMT_I2S:
489 lrclk_pol = 0;
490 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
491 break;
492 case SND_SOC_DAIFMT_LEFT_J:
493 case SND_SOC_DAIFMT_RIGHT_J:
494 lrclk_pol = 1;
495 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
496 break;
497 case SND_SOC_DAIFMT_DSP_A:
498 lrclk_pol = 1;
499 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
500 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
501 break;
502 case SND_SOC_DAIFMT_DSP_B:
503 lrclk_pol = 1;
504 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
505 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
506 break;
507 default:
508 return -EINVAL;
509 }
510
511 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
512 case SND_SOC_DAIFMT_NB_NF:
513 break;
514 case SND_SOC_DAIFMT_IB_NF:
515 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
516 break;
517 case SND_SOC_DAIFMT_NB_IF:
518 lrclk_pol = !lrclk_pol;
519 break;
520 case SND_SOC_DAIFMT_IB_IF:
521 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
522 lrclk_pol = !lrclk_pol;
523 break;
524 default:
525 return -EINVAL;
526 }
527
528 if (lrclk_pol)
529 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
530
531 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0);
532 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1);
533
534 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
535
536 return 0;
537}
538
539static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
540 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
541{
542 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
543 unsigned int ser_ctrl0, ser_ctrl1;
544 unsigned int conv_ctrl0, conv_ctrl1;
545
546 /* I2S mode */
547 if (slots == 0) {
548 slots = 2;
549 rx_mask = 3;
550 tx_mask = 3;
551 slot_width = 32;
552 }
553
554 switch (slots) {
555 case 2:
556 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
557 break;
558 case 4:
559 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
560 break;
561 case 8:
562 if (adau->type == ADAU1361)
563 return -EINVAL;
564
565 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
566 break;
567 default:
568 return -EINVAL;
569 }
570
571 switch (slot_width * slots) {
572 case 32:
573 if (adau->type == ADAU1761)
574 return -EINVAL;
575
576 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
577 break;
578 case 64:
579 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
580 break;
581 case 48:
582 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
583 break;
584 case 128:
585 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
586 break;
587 case 256:
588 if (adau->type == ADAU1361)
589 return -EINVAL;
590
591 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
592 break;
593 default:
594 return -EINVAL;
595 }
596
597 switch (rx_mask) {
598 case 0x03:
599 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
600 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
601 break;
602 case 0x0c:
603 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
604 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
605 break;
606 case 0x30:
607 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
608 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
609 break;
610 case 0xc0:
611 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
612 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
613 break;
614 default:
615 return -EINVAL;
616 }
617
618 switch (tx_mask) {
619 case 0x03:
620 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
621 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
622 break;
623 case 0x0c:
624 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
625 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
626 break;
627 case 0x30:
628 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
629 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
630 break;
631 case 0xc0:
632 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
633 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
634 break;
635 default:
636 return -EINVAL;
637 }
638
639 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
640 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
641 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
642 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
643 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
644 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
645 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
646 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
647
648 if (!adau17x1_has_dsp(adau))
649 return 0;
650
651 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
652 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
653 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
654 }
655
656 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
657 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
658 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
659 }
660
661 return 0;
662}
663
664const struct snd_soc_dai_ops adau17x1_dai_ops = {
665 .hw_params = adau17x1_hw_params,
666 .set_sysclk = adau17x1_set_dai_sysclk,
667 .set_fmt = adau17x1_set_dai_fmt,
668 .set_pll = adau17x1_set_dai_pll,
669 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
670};
671EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
672
673int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec,
674 enum adau17x1_micbias_voltage micbias)
675{
676 struct adau *adau = snd_soc_codec_get_drvdata(codec);
677
678 switch (micbias) {
679 case ADAU17X1_MICBIAS_0_90_AVDD:
680 case ADAU17X1_MICBIAS_0_65_AVDD:
681 break;
682 default:
683 return -EINVAL;
684 }
685
686 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
687}
688EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
689
690bool adau17x1_readable_register(struct device *dev, unsigned int reg)
691{
692 switch (reg) {
693 case ADAU17X1_CLOCK_CONTROL:
694 case ADAU17X1_PLL_CONTROL:
695 case ADAU17X1_REC_POWER_MGMT:
696 case ADAU17X1_MICBIAS:
697 case ADAU17X1_SERIAL_PORT0:
698 case ADAU17X1_SERIAL_PORT1:
699 case ADAU17X1_CONVERTER0:
700 case ADAU17X1_CONVERTER1:
701 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
702 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
703 case ADAU17X1_ADC_CONTROL:
704 case ADAU17X1_PLAY_POWER_MGMT:
705 case ADAU17X1_DAC_CONTROL0:
706 case ADAU17X1_DAC_CONTROL1:
707 case ADAU17X1_DAC_CONTROL2:
708 case ADAU17X1_SERIAL_PORT_PAD:
709 case ADAU17X1_CONTROL_PORT_PAD0:
710 case ADAU17X1_CONTROL_PORT_PAD1:
711 case ADAU17X1_DSP_SAMPLING_RATE:
712 case ADAU17X1_SERIAL_INPUT_ROUTE:
713 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
714 case ADAU17X1_DSP_ENABLE:
715 case ADAU17X1_DSP_RUN:
716 case ADAU17X1_SERIAL_SAMPLING_RATE:
717 return true;
718 default:
719 break;
720 }
721 return false;
722}
723EXPORT_SYMBOL_GPL(adau17x1_readable_register);
724
725bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
726{
727 /* SigmaDSP parameter and program memory */
728 if (reg < 0x4000)
729 return true;
730
731 switch (reg) {
732 /* The PLL register is 6 bytes long */
733 case ADAU17X1_PLL_CONTROL:
734 case ADAU17X1_PLL_CONTROL + 1:
735 case ADAU17X1_PLL_CONTROL + 2:
736 case ADAU17X1_PLL_CONTROL + 3:
737 case ADAU17X1_PLL_CONTROL + 4:
738 case ADAU17X1_PLL_CONTROL + 5:
739 return true;
740 default:
741 break;
742 }
743
744 return false;
745}
746EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
747
748int adau17x1_load_firmware(struct adau *adau, struct device *dev,
749 const char *firmware)
750{
751 int ret;
752 int dspsr;
753
754 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
755 if (ret)
756 return ret;
757
758 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
759 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
760
761 ret = process_sigma_firmware_regmap(dev, adau->regmap, firmware);
762 if (ret) {
763 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
764 return ret;
765 }
766 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
767
768 return 0;
769}
770EXPORT_SYMBOL_GPL(adau17x1_load_firmware);
771
772int adau17x1_add_widgets(struct snd_soc_codec *codec)
773{
774 struct adau *adau = snd_soc_codec_get_drvdata(codec);
775 int ret;
776
777 ret = snd_soc_add_codec_controls(codec, adau17x1_controls,
778 ARRAY_SIZE(adau17x1_controls));
779 if (ret)
780 return ret;
781 ret = snd_soc_dapm_new_controls(&codec->dapm, adau17x1_dapm_widgets,
782 ARRAY_SIZE(adau17x1_dapm_widgets));
783 if (ret)
784 return ret;
785
786 if (adau17x1_has_dsp(adau)) {
787 ret = snd_soc_dapm_new_controls(&codec->dapm,
788 adau17x1_dsp_dapm_widgets,
789 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
790 }
791 return ret;
792}
793EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
794
795int adau17x1_add_routes(struct snd_soc_codec *codec)
796{
797 struct adau *adau = snd_soc_codec_get_drvdata(codec);
798 int ret;
799
800 ret = snd_soc_dapm_add_routes(&codec->dapm, adau17x1_dapm_routes,
801 ARRAY_SIZE(adau17x1_dapm_routes));
802 if (ret)
803 return ret;
804
805 if (adau17x1_has_dsp(adau)) {
806 ret = snd_soc_dapm_add_routes(&codec->dapm,
807 adau17x1_dsp_dapm_routes,
808 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
809 } else {
810 ret = snd_soc_dapm_add_routes(&codec->dapm,
811 adau17x1_no_dsp_dapm_routes,
812 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
813 }
814 return ret;
815}
816EXPORT_SYMBOL_GPL(adau17x1_add_routes);
817
818int adau17x1_suspend(struct snd_soc_codec *codec)
819{
820 codec->driver->set_bias_level(codec, SND_SOC_BIAS_OFF);
821 return 0;
822}
823EXPORT_SYMBOL_GPL(adau17x1_suspend);
824
825int adau17x1_resume(struct snd_soc_codec *codec)
826{
827 struct adau *adau = snd_soc_codec_get_drvdata(codec);
828
829 if (adau->switch_mode)
830 adau->switch_mode(codec->dev);
831
832 codec->driver->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
833 regcache_sync(adau->regmap);
834
835 return 0;
836}
837EXPORT_SYMBOL_GPL(adau17x1_resume);
838
839int adau17x1_probe(struct device *dev, struct regmap *regmap,
840 enum adau17x1_type type, void (*switch_mode)(struct device *dev))
841{
842 struct adau *adau;
843
844 if (IS_ERR(regmap))
845 return PTR_ERR(regmap);
846
847 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
848 if (!adau)
849 return -ENOMEM;
850
851 adau->regmap = regmap;
852 adau->switch_mode = switch_mode;
853 adau->type = type;
854
855 dev_set_drvdata(dev, adau);
856
857 if (switch_mode)
858 switch_mode(dev);
859
860 return 0;
861}
862EXPORT_SYMBOL_GPL(adau17x1_probe);
863
864MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
865MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
866MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/adau17x1.h b/sound/soc/codecs/adau17x1.h
new file mode 100644
index 000000000000..3ffabaf4c7a8
--- /dev/null
+++ b/sound/soc/codecs/adau17x1.h
@@ -0,0 +1,124 @@
1#ifndef __ADAU17X1_H__
2#define __ADAU17X1_H__
3
4#include <linux/regmap.h>
5#include <linux/platform_data/adau17x1.h>
6
7enum adau17x1_type {
8 ADAU1361,
9 ADAU1761,
10 ADAU1381,
11 ADAU1781,
12};
13
14enum adau17x1_pll {
15 ADAU17X1_PLL,
16};
17
18enum adau17x1_pll_src {
19 ADAU17X1_PLL_SRC_MCLK,
20};
21
22enum adau17x1_clk_src {
23 ADAU17X1_CLK_SRC_MCLK,
24 ADAU17X1_CLK_SRC_PLL,
25};
26
27struct adau {
28 unsigned int sysclk;
29 unsigned int pll_freq;
30
31 enum adau17x1_clk_src clk_src;
32 enum adau17x1_type type;
33 void (*switch_mode)(struct device *dev);
34
35 unsigned int dai_fmt;
36
37 uint8_t pll_regs[6];
38
39 bool master;
40
41 unsigned int tdm_slot[2];
42 bool dsp_bypass[2];
43
44 struct regmap *regmap;
45};
46
47int adau17x1_add_widgets(struct snd_soc_codec *codec);
48int adau17x1_add_routes(struct snd_soc_codec *codec);
49int adau17x1_probe(struct device *dev, struct regmap *regmap,
50 enum adau17x1_type type, void (*switch_mode)(struct device *dev));
51int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec,
52 enum adau17x1_micbias_voltage micbias);
53bool adau17x1_readable_register(struct device *dev, unsigned int reg);
54bool adau17x1_volatile_register(struct device *dev, unsigned int reg);
55int adau17x1_suspend(struct snd_soc_codec *codec);
56int adau17x1_resume(struct snd_soc_codec *codec);
57
58extern const struct snd_soc_dai_ops adau17x1_dai_ops;
59
60int adau17x1_load_firmware(struct adau *adau, struct device *dev,
61 const char *firmware);
62bool adau17x1_has_dsp(struct adau *adau);
63
64#define ADAU17X1_CLOCK_CONTROL 0x4000
65#define ADAU17X1_PLL_CONTROL 0x4002
66#define ADAU17X1_REC_POWER_MGMT 0x4009
67#define ADAU17X1_MICBIAS 0x4010
68#define ADAU17X1_SERIAL_PORT0 0x4015
69#define ADAU17X1_SERIAL_PORT1 0x4016
70#define ADAU17X1_CONVERTER0 0x4017
71#define ADAU17X1_CONVERTER1 0x4018
72#define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
73#define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
74#define ADAU17X1_ADC_CONTROL 0x4019
75#define ADAU17X1_PLAY_POWER_MGMT 0x4029
76#define ADAU17X1_DAC_CONTROL0 0x402a
77#define ADAU17X1_DAC_CONTROL1 0x402b
78#define ADAU17X1_DAC_CONTROL2 0x402c
79#define ADAU17X1_SERIAL_PORT_PAD 0x402d
80#define ADAU17X1_CONTROL_PORT_PAD0 0x402f
81#define ADAU17X1_CONTROL_PORT_PAD1 0x4030
82#define ADAU17X1_DSP_SAMPLING_RATE 0x40eb
83#define ADAU17X1_SERIAL_INPUT_ROUTE 0x40f2
84#define ADAU17X1_SERIAL_OUTPUT_ROUTE 0x40f3
85#define ADAU17X1_DSP_ENABLE 0x40f5
86#define ADAU17X1_DSP_RUN 0x40f6
87#define ADAU17X1_SERIAL_SAMPLING_RATE 0x40f8
88
89#define ADAU17X1_SERIAL_PORT0_BCLK_POL BIT(4)
90#define ADAU17X1_SERIAL_PORT0_LRCLK_POL BIT(3)
91#define ADAU17X1_SERIAL_PORT0_MASTER BIT(0)
92
93#define ADAU17X1_SERIAL_PORT1_DELAY1 0x00
94#define ADAU17X1_SERIAL_PORT1_DELAY0 0x01
95#define ADAU17X1_SERIAL_PORT1_DELAY8 0x02
96#define ADAU17X1_SERIAL_PORT1_DELAY16 0x03
97#define ADAU17X1_SERIAL_PORT1_DELAY_MASK 0x03
98
99#define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK 0x6
100#define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL BIT(3)
101#define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN BIT(0)
102
103#define ADAU17X1_SERIAL_PORT1_BCLK32 (0x0 << 5)
104#define ADAU17X1_SERIAL_PORT1_BCLK48 (0x1 << 5)
105#define ADAU17X1_SERIAL_PORT1_BCLK64 (0x2 << 5)
106#define ADAU17X1_SERIAL_PORT1_BCLK128 (0x3 << 5)
107#define ADAU17X1_SERIAL_PORT1_BCLK256 (0x4 << 5)
108#define ADAU17X1_SERIAL_PORT1_BCLK_MASK (0x7 << 5)
109
110#define ADAU17X1_SERIAL_PORT0_STEREO (0x0 << 1)
111#define ADAU17X1_SERIAL_PORT0_TDM4 (0x1 << 1)
112#define ADAU17X1_SERIAL_PORT0_TDM8 (0x2 << 1)
113#define ADAU17X1_SERIAL_PORT0_TDM_MASK (0x3 << 1)
114#define ADAU17X1_SERIAL_PORT0_PULSE_MODE BIT(5)
115
116#define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5)
117#define ADAU17X1_CONVERTER0_DAC_PAIR_MASK (0x3 << 5)
118#define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1)
119#define ADAU17X1_CONVERTER1_ADC_PAIR_MASK 0x3
120
121#define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7
122
123
124#endif
diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c
index 5062e34ee8dc..c43b93fdf0df 100644
--- a/sound/soc/codecs/adav80x.c
+++ b/sound/soc/codecs/adav80x.c
@@ -172,14 +172,14 @@ static ADAV80X_MUX_ENUM_DECL(adav80x_capture_enum, ADAV80X_DPATH_CTRL1, 3);
172static ADAV80X_MUX_ENUM_DECL(adav80x_dac_enum, ADAV80X_DPATH_CTRL2, 3); 172static ADAV80X_MUX_ENUM_DECL(adav80x_dac_enum, ADAV80X_DPATH_CTRL2, 3);
173 173
174static const struct snd_kcontrol_new adav80x_aux_capture_mux_ctrl = 174static const struct snd_kcontrol_new adav80x_aux_capture_mux_ctrl =
175 SOC_DAPM_VALUE_ENUM("Route", adav80x_aux_capture_enum); 175 SOC_DAPM_ENUM("Route", adav80x_aux_capture_enum);
176static const struct snd_kcontrol_new adav80x_capture_mux_ctrl = 176static const struct snd_kcontrol_new adav80x_capture_mux_ctrl =
177 SOC_DAPM_VALUE_ENUM("Route", adav80x_capture_enum); 177 SOC_DAPM_ENUM("Route", adav80x_capture_enum);
178static const struct snd_kcontrol_new adav80x_dac_mux_ctrl = 178static const struct snd_kcontrol_new adav80x_dac_mux_ctrl =
179 SOC_DAPM_VALUE_ENUM("Route", adav80x_dac_enum); 179 SOC_DAPM_ENUM("Route", adav80x_dac_enum);
180 180
181#define ADAV80X_MUX(name, ctrl) \ 181#define ADAV80X_MUX(name, ctrl) \
182 SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) 182 SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, 0, 0, ctrl)
183 183
184static const struct snd_soc_dapm_widget adav80x_dapm_widgets[] = { 184static const struct snd_soc_dapm_widget adav80x_dapm_widgets[] = {
185 SND_SOC_DAPM_DAC("DAC", NULL, ADAV80X_DAC_CTRL1, 7, 1), 185 SND_SOC_DAPM_DAC("DAC", NULL, ADAV80X_DAC_CTRL1, 7, 1),
@@ -315,7 +315,7 @@ static int adav80x_set_deemph(struct snd_soc_codec *codec)
315static int adav80x_put_deemph(struct snd_kcontrol *kcontrol, 315static int adav80x_put_deemph(struct snd_kcontrol *kcontrol,
316 struct snd_ctl_elem_value *ucontrol) 316 struct snd_ctl_elem_value *ucontrol)
317{ 317{
318 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 318 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
319 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); 319 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec);
320 unsigned int deemph = ucontrol->value.enumerated.item[0]; 320 unsigned int deemph = ucontrol->value.enumerated.item[0];
321 321
@@ -330,7 +330,7 @@ static int adav80x_put_deemph(struct snd_kcontrol *kcontrol,
330static int adav80x_get_deemph(struct snd_kcontrol *kcontrol, 330static int adav80x_get_deemph(struct snd_kcontrol *kcontrol,
331 struct snd_ctl_elem_value *ucontrol) 331 struct snd_ctl_elem_value *ucontrol)
332{ 332{
333 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 333 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
334 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); 334 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec);
335 335
336 ucontrol->value.enumerated.item[0] = adav80x->deemph; 336 ucontrol->value.enumerated.item[0] = adav80x->deemph;
diff --git a/sound/soc/codecs/ak4104.c b/sound/soc/codecs/ak4104.c
index 10adf25d4c14..1fd7f72b2a62 100644
--- a/sound/soc/codecs/ak4104.c
+++ b/sound/soc/codecs/ak4104.c
@@ -11,13 +11,14 @@
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/soc.h>
16#include <sound/initval.h>
17#include <linux/spi/spi.h> 14#include <linux/spi/spi.h>
18#include <linux/of_device.h> 15#include <linux/of_device.h>
19#include <linux/of_gpio.h> 16#include <linux/of_gpio.h>
17#include <linux/regulator/consumer.h>
20#include <sound/asoundef.h> 18#include <sound/asoundef.h>
19#include <sound/core.h>
20#include <sound/soc.h>
21#include <sound/initval.h>
21 22
22/* AK4104 registers addresses */ 23/* AK4104 registers addresses */
23#define AK4104_REG_CONTROL1 0x00 24#define AK4104_REG_CONTROL1 0x00
@@ -47,6 +48,7 @@
47 48
48struct ak4104_private { 49struct ak4104_private {
49 struct regmap *regmap; 50 struct regmap *regmap;
51 struct regulator *regulator;
50}; 52};
51 53
52static const struct snd_soc_dapm_widget ak4104_dapm_widgets[] = { 54static const struct snd_soc_dapm_widget ak4104_dapm_widgets[] = {
@@ -174,20 +176,30 @@ static int ak4104_probe(struct snd_soc_codec *codec)
174 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec); 176 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
175 int ret; 177 int ret;
176 178
179 ret = regulator_enable(ak4104->regulator);
180 if (ret < 0) {
181 dev_err(codec->dev, "Unable to enable regulator: %d\n", ret);
182 return ret;
183 }
184
177 /* set power-up and non-reset bits */ 185 /* set power-up and non-reset bits */
178 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1, 186 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1,
179 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 187 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN,
180 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN); 188 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
181 if (ret < 0) 189 if (ret < 0)
182 return ret; 190 goto exit_disable_regulator;
183 191
184 /* enable transmitter */ 192 /* enable transmitter */
185 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_TX, 193 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_TX,
186 AK4104_TX_TXE, AK4104_TX_TXE); 194 AK4104_TX_TXE, AK4104_TX_TXE);
187 if (ret < 0) 195 if (ret < 0)
188 return ret; 196 goto exit_disable_regulator;
189 197
190 return 0; 198 return 0;
199
200exit_disable_regulator:
201 regulator_disable(ak4104->regulator);
202 return ret;
191} 203}
192 204
193static int ak4104_remove(struct snd_soc_codec *codec) 205static int ak4104_remove(struct snd_soc_codec *codec)
@@ -196,13 +208,42 @@ static int ak4104_remove(struct snd_soc_codec *codec)
196 208
197 regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1, 209 regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1,
198 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0); 210 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0);
211 regulator_disable(ak4104->regulator);
199 212
200 return 0; 213 return 0;
201} 214}
202 215
216#ifdef CONFIG_PM
217static int ak4104_soc_suspend(struct snd_soc_codec *codec)
218{
219 struct ak4104_private *priv = snd_soc_codec_get_drvdata(codec);
220
221 regulator_disable(priv->regulator);
222
223 return 0;
224}
225
226static int ak4104_soc_resume(struct snd_soc_codec *codec)
227{
228 struct ak4104_private *priv = snd_soc_codec_get_drvdata(codec);
229 int ret;
230
231 ret = regulator_enable(priv->regulator);
232 if (ret < 0)
233 return ret;
234
235 return 0;
236}
237#else
238#define ak4104_soc_suspend NULL
239#define ak4104_soc_resume NULL
240#endif /* CONFIG_PM */
241
203static struct snd_soc_codec_driver soc_codec_device_ak4104 = { 242static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
204 .probe = ak4104_probe, 243 .probe = ak4104_probe,
205 .remove = ak4104_remove, 244 .remove = ak4104_remove,
245 .suspend = ak4104_soc_suspend,
246 .resume = ak4104_soc_resume,
206 247
207 .dapm_widgets = ak4104_dapm_widgets, 248 .dapm_widgets = ak4104_dapm_widgets,
208 .num_dapm_widgets = ARRAY_SIZE(ak4104_dapm_widgets), 249 .num_dapm_widgets = ARRAY_SIZE(ak4104_dapm_widgets),
@@ -239,6 +280,13 @@ static int ak4104_spi_probe(struct spi_device *spi)
239 if (ak4104 == NULL) 280 if (ak4104 == NULL)
240 return -ENOMEM; 281 return -ENOMEM;
241 282
283 ak4104->regulator = devm_regulator_get(&spi->dev, "vdd");
284 if (IS_ERR(ak4104->regulator)) {
285 ret = PTR_ERR(ak4104->regulator);
286 dev_err(&spi->dev, "Unable to get Vdd regulator: %d\n", ret);
287 return ret;
288 }
289
242 ak4104->regmap = devm_regmap_init_spi(spi, &ak4104_regmap); 290 ak4104->regmap = devm_regmap_init_spi(spi, &ak4104_regmap);
243 if (IS_ERR(ak4104->regmap)) { 291 if (IS_ERR(ak4104->regmap)) {
244 ret = PTR_ERR(ak4104->regmap); 292 ret = PTR_ERR(ak4104->regmap);
diff --git a/sound/soc/codecs/ak4641.c b/sound/soc/codecs/ak4641.c
index 868c0e2da1ec..7afe8f482088 100644
--- a/sound/soc/codecs/ak4641.c
+++ b/sound/soc/codecs/ak4641.c
@@ -74,7 +74,7 @@ static int ak4641_set_deemph(struct snd_soc_codec *codec)
74static int ak4641_put_deemph(struct snd_kcontrol *kcontrol, 74static int ak4641_put_deemph(struct snd_kcontrol *kcontrol,
75 struct snd_ctl_elem_value *ucontrol) 75 struct snd_ctl_elem_value *ucontrol)
76{ 76{
77 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 77 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
78 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); 78 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec);
79 int deemph = ucontrol->value.enumerated.item[0]; 79 int deemph = ucontrol->value.enumerated.item[0];
80 80
@@ -89,7 +89,7 @@ static int ak4641_put_deemph(struct snd_kcontrol *kcontrol,
89static int ak4641_get_deemph(struct snd_kcontrol *kcontrol, 89static int ak4641_get_deemph(struct snd_kcontrol *kcontrol,
90 struct snd_ctl_elem_value *ucontrol) 90 struct snd_ctl_elem_value *ucontrol)
91{ 91{
92 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 92 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
93 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); 93 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec);
94 94
95 ucontrol->value.enumerated.item[0] = ak4641->deemph; 95 ucontrol->value.enumerated.item[0] = ak4641->deemph;
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 92655cc189ae..3ba4c0f11418 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -98,7 +98,7 @@
98#define MGAIN0 (1 << 0) /* MIC amp gain*/ 98#define MGAIN0 (1 << 0) /* MIC amp gain*/
99 99
100/* TIMER */ 100/* TIMER */
101#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */ 101#define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */
102#define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2)) 102#define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
103 103
104/* ALC_CTL1 */ 104/* ALC_CTL1 */
@@ -134,6 +134,15 @@
134/* MD_CTL4 */ 134/* MD_CTL4 */
135#define DACH (1 << 0) 135#define DACH (1 << 0)
136 136
137struct ak4642_drvdata {
138 const struct regmap_config *regmap_config;
139 int extended_frequencies;
140};
141
142struct ak4642_priv {
143 const struct ak4642_drvdata *drvdata;
144};
145
137/* 146/*
138 * Playback Volume (table 39) 147 * Playback Volume (table 39)
139 * 148 *
@@ -148,6 +157,8 @@ static const struct snd_kcontrol_new ak4642_snd_controls[] = {
148 157
149 SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC, 158 SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
150 0, 0xFF, 1, out_tlv), 159 0, 0xFF, 1, out_tlv),
160 SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0),
161 SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1),
151}; 162};
152 163
153static const struct snd_kcontrol_new ak4642_headphone_control = 164static const struct snd_kcontrol_new ak4642_headphone_control =
@@ -287,7 +298,9 @@ static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
287 int clk_id, unsigned int freq, int dir) 298 int clk_id, unsigned int freq, int dir)
288{ 299{
289 struct snd_soc_codec *codec = codec_dai->codec; 300 struct snd_soc_codec *codec = codec_dai->codec;
301 struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec);
290 u8 pll; 302 u8 pll;
303 int extended_freq = 0;
291 304
292 switch (freq) { 305 switch (freq) {
293 case 11289600: 306 case 11289600:
@@ -308,9 +321,25 @@ static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
308 case 27000000: 321 case 27000000:
309 pll = PLL3 | PLL2 | PLL0; 322 pll = PLL3 | PLL2 | PLL0;
310 break; 323 break;
324 case 19200000:
325 pll = PLL3;
326 extended_freq = 1;
327 break;
328 case 13000000:
329 pll = PLL3 | PLL2 | PLL1;
330 extended_freq = 1;
331 break;
332 case 26000000:
333 pll = PLL3 | PLL2 | PLL1 | PLL0;
334 extended_freq = 1;
335 break;
311 default: 336 default:
312 return -EINVAL; 337 return -EINVAL;
313 } 338 }
339
340 if (extended_freq && !priv->drvdata->extended_frequencies)
341 return -EINVAL;
342
314 snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll); 343 snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
315 344
316 return 0; 345 return 0;
@@ -505,30 +534,52 @@ static const struct regmap_config ak4648_regmap = {
505 .num_reg_defaults = ARRAY_SIZE(ak4648_reg), 534 .num_reg_defaults = ARRAY_SIZE(ak4648_reg),
506}; 535};
507 536
537static const struct ak4642_drvdata ak4642_drvdata = {
538 .regmap_config = &ak4642_regmap,
539};
540
541static const struct ak4642_drvdata ak4643_drvdata = {
542 .regmap_config = &ak4642_regmap,
543};
544
545static const struct ak4642_drvdata ak4648_drvdata = {
546 .regmap_config = &ak4648_regmap,
547 .extended_frequencies = 1,
548};
549
508static struct of_device_id ak4642_of_match[]; 550static struct of_device_id ak4642_of_match[];
509static int ak4642_i2c_probe(struct i2c_client *i2c, 551static int ak4642_i2c_probe(struct i2c_client *i2c,
510 const struct i2c_device_id *id) 552 const struct i2c_device_id *id)
511{ 553{
512 struct device_node *np = i2c->dev.of_node; 554 struct device_node *np = i2c->dev.of_node;
513 const struct regmap_config *regmap_config = NULL; 555 const struct ak4642_drvdata *drvdata = NULL;
514 struct regmap *regmap; 556 struct regmap *regmap;
557 struct ak4642_priv *priv;
515 558
516 if (np) { 559 if (np) {
517 const struct of_device_id *of_id; 560 const struct of_device_id *of_id;
518 561
519 of_id = of_match_device(ak4642_of_match, &i2c->dev); 562 of_id = of_match_device(ak4642_of_match, &i2c->dev);
520 if (of_id) 563 if (of_id)
521 regmap_config = of_id->data; 564 drvdata = of_id->data;
522 } else { 565 } else {
523 regmap_config = (const struct regmap_config *)id->driver_data; 566 drvdata = (const struct ak4642_drvdata *)id->driver_data;
524 } 567 }
525 568
526 if (!regmap_config) { 569 if (!drvdata) {
527 dev_err(&i2c->dev, "Unknown device type\n"); 570 dev_err(&i2c->dev, "Unknown device type\n");
528 return -EINVAL; 571 return -EINVAL;
529 } 572 }
530 573
531 regmap = devm_regmap_init_i2c(i2c, regmap_config); 574 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
575 if (!priv)
576 return -ENOMEM;
577
578 priv->drvdata = drvdata;
579
580 i2c_set_clientdata(i2c, priv);
581
582 regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config);
532 if (IS_ERR(regmap)) 583 if (IS_ERR(regmap))
533 return PTR_ERR(regmap); 584 return PTR_ERR(regmap);
534 585
@@ -543,17 +594,17 @@ static int ak4642_i2c_remove(struct i2c_client *client)
543} 594}
544 595
545static struct of_device_id ak4642_of_match[] = { 596static struct of_device_id ak4642_of_match[] = {
546 { .compatible = "asahi-kasei,ak4642", .data = &ak4642_regmap}, 597 { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata},
547 { .compatible = "asahi-kasei,ak4643", .data = &ak4642_regmap}, 598 { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata},
548 { .compatible = "asahi-kasei,ak4648", .data = &ak4648_regmap}, 599 { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata},
549 {}, 600 {},
550}; 601};
551MODULE_DEVICE_TABLE(of, ak4642_of_match); 602MODULE_DEVICE_TABLE(of, ak4642_of_match);
552 603
553static const struct i2c_device_id ak4642_i2c_id[] = { 604static const struct i2c_device_id ak4642_i2c_id[] = {
554 { "ak4642", (kernel_ulong_t)&ak4642_regmap }, 605 { "ak4642", (kernel_ulong_t)&ak4642_drvdata },
555 { "ak4643", (kernel_ulong_t)&ak4642_regmap }, 606 { "ak4643", (kernel_ulong_t)&ak4643_drvdata },
556 { "ak4648", (kernel_ulong_t)&ak4648_regmap }, 607 { "ak4648", (kernel_ulong_t)&ak4648_drvdata },
557 { } 608 { }
558}; 609};
559MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id); 610MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
diff --git a/sound/soc/codecs/alc5623.c b/sound/soc/codecs/alc5623.c
index f500905e9373..9d0755aa1d16 100644
--- a/sound/soc/codecs/alc5623.c
+++ b/sound/soc/codecs/alc5623.c
@@ -23,6 +23,7 @@
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/regmap.h> 24#include <linux/regmap.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/of.h>
26#include <sound/core.h> 27#include <sound/core.h>
27#include <sound/pcm.h> 28#include <sound/pcm.h>
28#include <sound/pcm_params.h> 29#include <sound/pcm_params.h>
@@ -998,8 +999,10 @@ static int alc5623_i2c_probe(struct i2c_client *client,
998{ 999{
999 struct alc5623_platform_data *pdata; 1000 struct alc5623_platform_data *pdata;
1000 struct alc5623_priv *alc5623; 1001 struct alc5623_priv *alc5623;
1002 struct device_node *np;
1001 unsigned int vid1, vid2; 1003 unsigned int vid1, vid2;
1002 int ret; 1004 int ret;
1005 u32 val32;
1003 1006
1004 alc5623 = devm_kzalloc(&client->dev, sizeof(struct alc5623_priv), 1007 alc5623 = devm_kzalloc(&client->dev, sizeof(struct alc5623_priv),
1005 GFP_KERNEL); 1008 GFP_KERNEL);
@@ -1018,13 +1021,13 @@ static int alc5623_i2c_probe(struct i2c_client *client,
1018 dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret); 1021 dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret);
1019 return ret; 1022 return ret;
1020 } 1023 }
1021 vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8);
1022 1024
1023 ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2); 1025 ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2);
1024 if (ret < 0) { 1026 if (ret < 0) {
1025 dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret); 1027 dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret);
1026 return ret; 1028 return ret;
1027 } 1029 }
1030 vid2 >>= 8;
1028 1031
1029 if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) { 1032 if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) {
1030 dev_err(&client->dev, "unknown or wrong codec\n"); 1033 dev_err(&client->dev, "unknown or wrong codec\n");
@@ -1040,6 +1043,16 @@ static int alc5623_i2c_probe(struct i2c_client *client,
1040 if (pdata) { 1043 if (pdata) {
1041 alc5623->add_ctrl = pdata->add_ctrl; 1044 alc5623->add_ctrl = pdata->add_ctrl;
1042 alc5623->jack_det_ctrl = pdata->jack_det_ctrl; 1045 alc5623->jack_det_ctrl = pdata->jack_det_ctrl;
1046 } else {
1047 if (client->dev.of_node) {
1048 np = client->dev.of_node;
1049 ret = of_property_read_u32(np, "add-ctrl", &val32);
1050 if (!ret)
1051 alc5623->add_ctrl = val32;
1052 ret = of_property_read_u32(np, "jack-det-ctrl", &val32);
1053 if (!ret)
1054 alc5623->jack_det_ctrl = val32;
1055 }
1043 } 1056 }
1044 1057
1045 alc5623->id = vid2; 1058 alc5623->id = vid2;
@@ -1081,11 +1094,18 @@ static const struct i2c_device_id alc5623_i2c_table[] = {
1081}; 1094};
1082MODULE_DEVICE_TABLE(i2c, alc5623_i2c_table); 1095MODULE_DEVICE_TABLE(i2c, alc5623_i2c_table);
1083 1096
1097static const struct of_device_id alc5623_of_match[] = {
1098 { .compatible = "realtek,alc5623", },
1099 { }
1100};
1101MODULE_DEVICE_TABLE(of, alc5623_of_match);
1102
1084/* i2c codec control layer */ 1103/* i2c codec control layer */
1085static struct i2c_driver alc5623_i2c_driver = { 1104static struct i2c_driver alc5623_i2c_driver = {
1086 .driver = { 1105 .driver = {
1087 .name = "alc562x-codec", 1106 .name = "alc562x-codec",
1088 .owner = THIS_MODULE, 1107 .owner = THIS_MODULE,
1108 .of_match_table = of_match_ptr(alc5623_of_match),
1089 }, 1109 },
1090 .probe = alc5623_i2c_probe, 1110 .probe = alc5623_i2c_probe,
1091 .remove = alc5623_i2c_remove, 1111 .remove = alc5623_i2c_remove,
diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h
index 16df0f913353..05ae17f5bca3 100644
--- a/sound/soc/codecs/arizona.h
+++ b/sound/soc/codecs/arizona.h
@@ -107,7 +107,7 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS];
107 107
108#define ARIZONA_MUX_CTL_DECL(name) \ 108#define ARIZONA_MUX_CTL_DECL(name) \
109 const struct snd_kcontrol_new name##_mux = \ 109 const struct snd_kcontrol_new name##_mux = \
110 SOC_DAPM_VALUE_ENUM("Route", name##_enum) 110 SOC_DAPM_ENUM("Route", name##_enum)
111 111
112#define ARIZONA_MUX_ENUMS(name, base_reg) \ 112#define ARIZONA_MUX_ENUMS(name, base_reg) \
113 static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \ 113 static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \
@@ -128,7 +128,7 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS];
128 ARIZONA_MUX_ENUMS(name##_aux6, base_reg + 40) 128 ARIZONA_MUX_ENUMS(name##_aux6, base_reg + 40)
129 129
130#define ARIZONA_MUX(name, ctrl) \ 130#define ARIZONA_MUX(name, ctrl) \
131 SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) 131 SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, 0, 0, ctrl)
132 132
133#define ARIZONA_MUX_WIDGETS(name, name_str) \ 133#define ARIZONA_MUX_WIDGETS(name, name_str) \
134 ARIZONA_MUX(name_str " Input", &name##_mux) 134 ARIZONA_MUX(name_str " Input", &name##_mux)
diff --git a/sound/soc/codecs/cq93vc.c b/sound/soc/codecs/cq93vc.c
index 1e25c7af853b..537327c7f7f1 100644
--- a/sound/soc/codecs/cq93vc.c
+++ b/sound/soc/codecs/cq93vc.c
@@ -139,8 +139,6 @@ static int cq93vc_probe(struct snd_soc_codec *codec)
139 139
140 davinci_vc->cq93vc.codec = codec; 140 davinci_vc->cq93vc.codec = codec;
141 141
142 snd_soc_codec_set_cache_io(codec, davinci_vc->regmap);
143
144 /* Off, with power on */ 142 /* Off, with power on */
145 cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 143 cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
146 144
@@ -154,11 +152,19 @@ static int cq93vc_remove(struct snd_soc_codec *codec)
154 return 0; 152 return 0;
155} 153}
156 154
155static struct regmap *cq93vc_get_regmap(struct device *dev)
156{
157 struct davinci_vc *davinci_vc = dev->platform_data;
158
159 return davinci_vc->regmap;
160}
161
157static struct snd_soc_codec_driver soc_codec_dev_cq93vc = { 162static struct snd_soc_codec_driver soc_codec_dev_cq93vc = {
158 .set_bias_level = cq93vc_set_bias_level, 163 .set_bias_level = cq93vc_set_bias_level,
159 .probe = cq93vc_probe, 164 .probe = cq93vc_probe,
160 .remove = cq93vc_remove, 165 .remove = cq93vc_remove,
161 .resume = cq93vc_resume, 166 .resume = cq93vc_resume,
167 .get_regmap = cq93vc_get_regmap,
162 .controls = cq93vc_snd_controls, 168 .controls = cq93vc_snd_controls,
163 .num_controls = ARRAY_SIZE(cq93vc_snd_controls), 169 .num_controls = ARRAY_SIZE(cq93vc_snd_controls),
164}; 170};
diff --git a/sound/soc/codecs/cs4270.c b/sound/soc/codecs/cs4270.c
index 3920e6264948..9947a9583679 100644
--- a/sound/soc/codecs/cs4270.c
+++ b/sound/soc/codecs/cs4270.c
@@ -438,7 +438,7 @@ static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
438static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, 438static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol) 439 struct snd_ctl_elem_value *ucontrol)
440{ 440{
441 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 441 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
442 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec); 442 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
443 int left = !ucontrol->value.integer.value[0]; 443 int left = !ucontrol->value.integer.value[0];
444 int right = !ucontrol->value.integer.value[1]; 444 int right = !ucontrol->value.integer.value[1];
diff --git a/sound/soc/codecs/cs4271.c b/sound/soc/codecs/cs4271.c
index aef4965750c7..93cec52f4733 100644
--- a/sound/soc/codecs/cs4271.c
+++ b/sound/soc/codecs/cs4271.c
@@ -284,7 +284,7 @@ static int cs4271_set_deemph(struct snd_soc_codec *codec)
284static int cs4271_get_deemph(struct snd_kcontrol *kcontrol, 284static int cs4271_get_deemph(struct snd_kcontrol *kcontrol,
285 struct snd_ctl_elem_value *ucontrol) 285 struct snd_ctl_elem_value *ucontrol)
286{ 286{
287 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 287 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
288 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 288 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec);
289 289
290 ucontrol->value.enumerated.item[0] = cs4271->deemph; 290 ucontrol->value.enumerated.item[0] = cs4271->deemph;
@@ -294,7 +294,7 @@ static int cs4271_get_deemph(struct snd_kcontrol *kcontrol,
294static int cs4271_put_deemph(struct snd_kcontrol *kcontrol, 294static int cs4271_put_deemph(struct snd_kcontrol *kcontrol,
295 struct snd_ctl_elem_value *ucontrol) 295 struct snd_ctl_elem_value *ucontrol)
296{ 296{
297 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 297 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
298 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 298 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec);
299 299
300 cs4271->deemph = ucontrol->value.enumerated.item[0]; 300 cs4271->deemph = ucontrol->value.enumerated.item[0];
diff --git a/sound/soc/codecs/cs42l51-i2c.c b/sound/soc/codecs/cs42l51-i2c.c
new file mode 100644
index 000000000000..cee51ae177c1
--- /dev/null
+++ b/sound/soc/codecs/cs42l51-i2c.c
@@ -0,0 +1,59 @@
1/*
2 * cs42l56.c -- CS42L51 ALSA SoC I2C audio driver
3 *
4 * Copyright 2014 CirrusLogic, Inc.
5 *
6 * Author: Brian Austin <brian.austin@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/i2c.h>
15#include <linux/module.h>
16#include <sound/soc.h>
17
18#include "cs42l51.h"
19
20static struct i2c_device_id cs42l51_i2c_id[] = {
21 {"cs42l51", 0},
22 {}
23};
24MODULE_DEVICE_TABLE(i2c, cs42l51_i2c_id);
25
26static int cs42l51_i2c_probe(struct i2c_client *i2c,
27 const struct i2c_device_id *id)
28{
29 struct regmap_config config;
30
31 config = cs42l51_regmap;
32 config.val_bits = 8;
33 config.reg_bits = 8;
34
35 return cs42l51_probe(&i2c->dev, devm_regmap_init_i2c(i2c, &config));
36}
37
38static int cs42l51_i2c_remove(struct i2c_client *i2c)
39{
40 snd_soc_unregister_codec(&i2c->dev);
41
42 return 0;
43}
44
45static struct i2c_driver cs42l51_i2c_driver = {
46 .driver = {
47 .name = "cs42l51",
48 .owner = THIS_MODULE,
49 },
50 .probe = cs42l51_i2c_probe,
51 .remove = cs42l51_i2c_remove,
52 .id_table = cs42l51_i2c_id,
53};
54
55module_i2c_driver(cs42l51_i2c_driver);
56
57MODULE_DESCRIPTION("ASoC CS42L51 I2C Driver");
58MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
59MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c
index 6c0da2baa154..09488d97de60 100644
--- a/sound/soc/codecs/cs42l51.c
+++ b/sound/soc/codecs/cs42l51.c
@@ -29,7 +29,6 @@
29#include <sound/initval.h> 29#include <sound/initval.h>
30#include <sound/pcm_params.h> 30#include <sound/pcm_params.h>
31#include <sound/pcm.h> 31#include <sound/pcm.h>
32#include <linux/i2c.h>
33#include <linux/regmap.h> 32#include <linux/regmap.h>
34 33
35#include "cs42l51.h" 34#include "cs42l51.h"
@@ -55,7 +54,7 @@ struct cs42l51_private {
55static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol, 54static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
56 struct snd_ctl_elem_value *ucontrol) 55 struct snd_ctl_elem_value *ucontrol)
57{ 56{
58 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 57 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
59 unsigned long value = snd_soc_read(codec, CS42L51_PCM_MIXER)&3; 58 unsigned long value = snd_soc_read(codec, CS42L51_PCM_MIXER)&3;
60 59
61 switch (value) { 60 switch (value) {
@@ -83,7 +82,7 @@ static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
83static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol, 82static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol,
84 struct snd_ctl_elem_value *ucontrol) 83 struct snd_ctl_elem_value *ucontrol)
85{ 84{
86 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 85 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
87 unsigned char val; 86 unsigned char val;
88 87
89 switch (ucontrol->value.integer.value[0]) { 88 switch (ucontrol->value.integer.value[0]) {
@@ -483,7 +482,7 @@ static struct snd_soc_dai_driver cs42l51_dai = {
483 .ops = &cs42l51_dai_ops, 482 .ops = &cs42l51_dai_ops,
484}; 483};
485 484
486static int cs42l51_probe(struct snd_soc_codec *codec) 485static int cs42l51_codec_probe(struct snd_soc_codec *codec)
487{ 486{
488 int ret, reg; 487 int ret, reg;
489 488
@@ -504,7 +503,7 @@ static int cs42l51_probe(struct snd_soc_codec *codec)
504} 503}
505 504
506static struct snd_soc_codec_driver soc_codec_device_cs42l51 = { 505static struct snd_soc_codec_driver soc_codec_device_cs42l51 = {
507 .probe = cs42l51_probe, 506 .probe = cs42l51_codec_probe,
508 507
509 .controls = cs42l51_snd_controls, 508 .controls = cs42l51_snd_controls,
510 .num_controls = ARRAY_SIZE(cs42l51_snd_controls), 509 .num_controls = ARRAY_SIZE(cs42l51_snd_controls),
@@ -514,91 +513,56 @@ static struct snd_soc_codec_driver soc_codec_device_cs42l51 = {
514 .num_dapm_routes = ARRAY_SIZE(cs42l51_routes), 513 .num_dapm_routes = ARRAY_SIZE(cs42l51_routes),
515}; 514};
516 515
517static const struct regmap_config cs42l51_regmap = { 516const struct regmap_config cs42l51_regmap = {
518 .reg_bits = 8,
519 .val_bits = 8,
520
521 .max_register = CS42L51_CHARGE_FREQ, 517 .max_register = CS42L51_CHARGE_FREQ,
522 .cache_type = REGCACHE_RBTREE, 518 .cache_type = REGCACHE_RBTREE,
523}; 519};
520EXPORT_SYMBOL_GPL(cs42l51_regmap);
524 521
525static int cs42l51_i2c_probe(struct i2c_client *i2c_client, 522int cs42l51_probe(struct device *dev, struct regmap *regmap)
526 const struct i2c_device_id *id)
527{ 523{
528 struct cs42l51_private *cs42l51; 524 struct cs42l51_private *cs42l51;
529 struct regmap *regmap;
530 unsigned int val; 525 unsigned int val;
531 int ret; 526 int ret;
532 527
533 regmap = devm_regmap_init_i2c(i2c_client, &cs42l51_regmap); 528 if (IS_ERR(regmap))
534 if (IS_ERR(regmap)) { 529 return PTR_ERR(regmap);
535 ret = PTR_ERR(regmap); 530
536 dev_err(&i2c_client->dev, "Failed to create regmap: %d\n", 531 cs42l51 = devm_kzalloc(dev, sizeof(struct cs42l51_private),
537 ret); 532 GFP_KERNEL);
538 return ret; 533 if (!cs42l51)
539 } 534 return -ENOMEM;
535
536 dev_set_drvdata(dev, cs42l51);
540 537
541 /* Verify that we have a CS42L51 */ 538 /* Verify that we have a CS42L51 */
542 ret = regmap_read(regmap, CS42L51_CHIP_REV_ID, &val); 539 ret = regmap_read(regmap, CS42L51_CHIP_REV_ID, &val);
543 if (ret < 0) { 540 if (ret < 0) {
544 dev_err(&i2c_client->dev, "failed to read I2C\n"); 541 dev_err(dev, "failed to read I2C\n");
545 goto error; 542 goto error;
546 } 543 }
547 544
548 if ((val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) && 545 if ((val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
549 (val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) { 546 (val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) {
550 dev_err(&i2c_client->dev, "Invalid chip id: %x\n", val); 547 dev_err(dev, "Invalid chip id: %x\n", val);
551 ret = -ENODEV; 548 ret = -ENODEV;
552 goto error; 549 goto error;
553 } 550 }
551 dev_info(dev, "Cirrus Logic CS42L51, Revision: %02X\n",
552 val & CS42L51_CHIP_REV_MASK);
554 553
555 dev_info(&i2c_client->dev, "found device cs42l51 rev %d\n", 554 ret = snd_soc_register_codec(dev,
556 val & 7);
557
558 cs42l51 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l51_private),
559 GFP_KERNEL);
560 if (!cs42l51)
561 return -ENOMEM;
562
563 i2c_set_clientdata(i2c_client, cs42l51);
564
565 ret = snd_soc_register_codec(&i2c_client->dev,
566 &soc_codec_device_cs42l51, &cs42l51_dai, 1); 555 &soc_codec_device_cs42l51, &cs42l51_dai, 1);
567error: 556error:
568 return ret; 557 return ret;
569} 558}
570 559EXPORT_SYMBOL_GPL(cs42l51_probe);
571static int cs42l51_i2c_remove(struct i2c_client *client)
572{
573 snd_soc_unregister_codec(&client->dev);
574 return 0;
575}
576
577static const struct i2c_device_id cs42l51_id[] = {
578 {"cs42l51", 0},
579 {}
580};
581MODULE_DEVICE_TABLE(i2c, cs42l51_id);
582 560
583static const struct of_device_id cs42l51_of_match[] = { 561static const struct of_device_id cs42l51_of_match[] = {
584 { .compatible = "cirrus,cs42l51", }, 562 { .compatible = "cirrus,cs42l51", },
585 { } 563 { }
586}; 564};
587MODULE_DEVICE_TABLE(of, cs42l51_of_match); 565MODULE_DEVICE_TABLE(of, cs42l51_of_match);
588
589static struct i2c_driver cs42l51_i2c_driver = {
590 .driver = {
591 .name = "cs42l51-codec",
592 .owner = THIS_MODULE,
593 .of_match_table = cs42l51_of_match,
594 },
595 .id_table = cs42l51_id,
596 .probe = cs42l51_i2c_probe,
597 .remove = cs42l51_i2c_remove,
598};
599
600module_i2c_driver(cs42l51_i2c_driver);
601
602MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); 566MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
603MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver"); 567MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
604MODULE_LICENSE("GPL"); 568MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/cs42l51.h b/sound/soc/codecs/cs42l51.h
index 2beeb171db4b..8c55bf384bc6 100644
--- a/sound/soc/codecs/cs42l51.h
+++ b/sound/soc/codecs/cs42l51.h
@@ -18,9 +18,15 @@
18#ifndef _CS42L51_H 18#ifndef _CS42L51_H
19#define _CS42L51_H 19#define _CS42L51_H
20 20
21struct device;
22
23extern const struct regmap_config cs42l51_regmap;
24int cs42l51_probe(struct device *dev, struct regmap *regmap);
25
21#define CS42L51_CHIP_ID 0x1B 26#define CS42L51_CHIP_ID 0x1B
22#define CS42L51_CHIP_REV_A 0x00 27#define CS42L51_CHIP_REV_A 0x00
23#define CS42L51_CHIP_REV_B 0x01 28#define CS42L51_CHIP_REV_B 0x01
29#define CS42L51_CHIP_REV_MASK 0x07
24 30
25#define CS42L51_CHIP_REV_ID 0x01 31#define CS42L51_CHIP_REV_ID 0x01
26#define CS42L51_MK_CHIP_REV(a, b) ((a)<<3|(b)) 32#define CS42L51_MK_CHIP_REV(a, b) ((a)<<3|(b))
diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c
index 460d35547a68..071fc77f2f06 100644
--- a/sound/soc/codecs/cs42l52.c
+++ b/sound/soc/codecs/cs42l52.c
@@ -50,11 +50,9 @@ struct cs42l52_private {
50 u8 mclksel; 50 u8 mclksel;
51 u32 mclk; 51 u32 mclk;
52 u8 flags; 52 u8 flags;
53#if IS_ENABLED(CONFIG_INPUT)
54 struct input_dev *beep; 53 struct input_dev *beep;
55 struct work_struct beep_work; 54 struct work_struct beep_work;
56 int beep_rate; 55 int beep_rate;
57#endif
58}; 56};
59 57
60static const struct reg_default cs42l52_reg_defaults[] = { 58static const struct reg_default cs42l52_reg_defaults[] = {
@@ -962,7 +960,6 @@ static int cs42l52_resume(struct snd_soc_codec *codec)
962 return 0; 960 return 0;
963} 961}
964 962
965#if IS_ENABLED(CONFIG_INPUT)
966static int beep_rates[] = { 963static int beep_rates[] = {
967 261, 522, 585, 667, 706, 774, 889, 1000, 964 261, 522, 585, 667, 706, 774, 889, 1000,
968 1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182 965 1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182
@@ -1096,15 +1093,6 @@ static void cs42l52_free_beep(struct snd_soc_codec *codec)
1096 snd_soc_update_bits(codec, CS42L52_BEEP_TONE_CTL, 1093 snd_soc_update_bits(codec, CS42L52_BEEP_TONE_CTL,
1097 CS42L52_BEEP_EN_MASK, 0); 1094 CS42L52_BEEP_EN_MASK, 0);
1098} 1095}
1099#else
1100static void cs42l52_init_beep(struct snd_soc_codec *codec)
1101{
1102}
1103
1104static void cs42l52_free_beep(struct snd_soc_codec *codec)
1105{
1106}
1107#endif
1108 1096
1109static int cs42l52_probe(struct snd_soc_codec *codec) 1097static int cs42l52_probe(struct snd_soc_codec *codec)
1110{ 1098{
@@ -1229,8 +1217,10 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
1229 } 1217 }
1230 1218
1231 if (cs42l52->pdata.reset_gpio) { 1219 if (cs42l52->pdata.reset_gpio) {
1232 ret = gpio_request_one(cs42l52->pdata.reset_gpio, 1220 ret = devm_gpio_request_one(&i2c_client->dev,
1233 GPIOF_OUT_INIT_HIGH, "CS42L52 /RST"); 1221 cs42l52->pdata.reset_gpio,
1222 GPIOF_OUT_INIT_HIGH,
1223 "CS42L52 /RST");
1234 if (ret < 0) { 1224 if (ret < 0) {
1235 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", 1225 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
1236 cs42l52->pdata.reset_gpio, ret); 1226 cs42l52->pdata.reset_gpio, ret);
diff --git a/sound/soc/codecs/cs42l56.c b/sound/soc/codecs/cs42l56.c
new file mode 100644
index 000000000000..fdc4bd27b0df
--- /dev/null
+++ b/sound/soc/codecs/cs42l56.c
@@ -0,0 +1,1419 @@
1/*
2 * cs42l56.c -- CS42L56 ALSA SoC audio driver
3 *
4 * Copyright 2014 CirrusLogic, Inc.
5 *
6 * Author: Brian Austin <brian.austin@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/input.h>
22#include <linux/regmap.h>
23#include <linux/slab.h>
24#include <linux/workqueue.h>
25#include <linux/platform_device.h>
26#include <linux/regulator/consumer.h>
27#include <linux/of_device.h>
28#include <linux/of_gpio.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
33#include <sound/soc-dapm.h>
34#include <sound/initval.h>
35#include <sound/tlv.h>
36#include <sound/cs42l56.h>
37#include "cs42l56.h"
38
39#define CS42L56_NUM_SUPPLIES 3
40static const char *const cs42l56_supply_names[CS42L56_NUM_SUPPLIES] = {
41 "VA",
42 "VCP",
43 "VLDO",
44};
45
46struct cs42l56_private {
47 struct regmap *regmap;
48 struct snd_soc_codec *codec;
49 struct device *dev;
50 struct cs42l56_platform_data pdata;
51 struct regulator_bulk_data supplies[CS42L56_NUM_SUPPLIES];
52 u32 mclk;
53 u8 mclk_prediv;
54 u8 mclk_div2;
55 u8 mclk_ratio;
56 u8 iface;
57 u8 iface_fmt;
58 u8 iface_inv;
59#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
60 struct input_dev *beep;
61 struct work_struct beep_work;
62 int beep_rate;
63#endif
64};
65
66static const struct reg_default cs42l56_reg_defaults[] = {
67 { 1, 0x56 }, /* r01 - ID 1 */
68 { 2, 0x04 }, /* r02 - ID 2 */
69 { 3, 0x7f }, /* r03 - Power Ctl 1 */
70 { 4, 0xff }, /* r04 - Power Ctl 2 */
71 { 5, 0x00 }, /* ro5 - Clocking Ctl 1 */
72 { 6, 0x0b }, /* r06 - Clocking Ctl 2 */
73 { 7, 0x00 }, /* r07 - Serial Format */
74 { 8, 0x05 }, /* r08 - Class H Ctl */
75 { 9, 0x0c }, /* r09 - Misc Ctl */
76 { 10, 0x80 }, /* r0a - INT Status */
77 { 11, 0x00 }, /* r0b - Playback Ctl */
78 { 12, 0x0c }, /* r0c - DSP Mute Ctl */
79 { 13, 0x00 }, /* r0d - ADCA Mixer Volume */
80 { 14, 0x00 }, /* r0e - ADCB Mixer Volume */
81 { 15, 0x00 }, /* r0f - PCMA Mixer Volume */
82 { 16, 0x00 }, /* r10 - PCMB Mixer Volume */
83 { 17, 0x00 }, /* r11 - Analog Input Advisory Volume */
84 { 18, 0x00 }, /* r12 - Digital Input Advisory Volume */
85 { 19, 0x00 }, /* r13 - Master A Volume */
86 { 20, 0x00 }, /* r14 - Master B Volume */
87 { 21, 0x00 }, /* r15 - Beep Freq / On Time */
88 { 22, 0x00 }, /* r16 - Beep Volume / Off Time */
89 { 23, 0x00 }, /* r17 - Beep Tone Ctl */
90 { 24, 0x88 }, /* r18 - Tone Ctl */
91 { 25, 0x00 }, /* r19 - Channel Mixer & Swap */
92 { 26, 0x00 }, /* r1a - AIN Ref Config / ADC Mux */
93 { 27, 0xa0 }, /* r1b - High-Pass Filter Ctl */
94 { 28, 0x00 }, /* r1c - Misc ADC Ctl */
95 { 29, 0x00 }, /* r1d - Gain & Bias Ctl */
96 { 30, 0x00 }, /* r1e - PGAA Mux & Volume */
97 { 31, 0x00 }, /* r1f - PGAB Mux & Volume */
98 { 32, 0x00 }, /* r20 - ADCA Attenuator */
99 { 33, 0x00 }, /* r21 - ADCB Attenuator */
100 { 34, 0x00 }, /* r22 - ALC Enable & Attack Rate */
101 { 35, 0xbf }, /* r23 - ALC Release Rate */
102 { 36, 0x00 }, /* r24 - ALC Threshold */
103 { 37, 0x00 }, /* r25 - Noise Gate Ctl */
104 { 38, 0x00 }, /* r26 - ALC, Limiter, SFT, ZeroCross */
105 { 39, 0x00 }, /* r27 - Analog Mute, LO & HP Mux */
106 { 40, 0x00 }, /* r28 - HP A Volume */
107 { 41, 0x00 }, /* r29 - HP B Volume */
108 { 42, 0x00 }, /* r2a - LINEOUT A Volume */
109 { 43, 0x00 }, /* r2b - LINEOUT B Volume */
110 { 44, 0x00 }, /* r2c - Limit Threshold Ctl */
111 { 45, 0x7f }, /* r2d - Limiter Ctl & Release Rate */
112 { 46, 0x00 }, /* r2e - Limiter Attack Rate */
113};
114
115static bool cs42l56_readable_register(struct device *dev, unsigned int reg)
116{
117 switch (reg) {
118 case CS42L56_CHIP_ID_1:
119 case CS42L56_CHIP_ID_2:
120 case CS42L56_PWRCTL_1:
121 case CS42L56_PWRCTL_2:
122 case CS42L56_CLKCTL_1:
123 case CS42L56_CLKCTL_2:
124 case CS42L56_SERIAL_FMT:
125 case CS42L56_CLASSH_CTL:
126 case CS42L56_MISC_CTL:
127 case CS42L56_INT_STATUS:
128 case CS42L56_PLAYBACK_CTL:
129 case CS42L56_DSP_MUTE_CTL:
130 case CS42L56_ADCA_MIX_VOLUME:
131 case CS42L56_ADCB_MIX_VOLUME:
132 case CS42L56_PCMA_MIX_VOLUME:
133 case CS42L56_PCMB_MIX_VOLUME:
134 case CS42L56_ANAINPUT_ADV_VOLUME:
135 case CS42L56_DIGINPUT_ADV_VOLUME:
136 case CS42L56_MASTER_A_VOLUME:
137 case CS42L56_MASTER_B_VOLUME:
138 case CS42L56_BEEP_FREQ_ONTIME:
139 case CS42L56_BEEP_FREQ_OFFTIME:
140 case CS42L56_BEEP_TONE_CFG:
141 case CS42L56_TONE_CTL:
142 case CS42L56_CHAN_MIX_SWAP:
143 case CS42L56_AIN_REFCFG_ADC_MUX:
144 case CS42L56_HPF_CTL:
145 case CS42L56_MISC_ADC_CTL:
146 case CS42L56_GAIN_BIAS_CTL:
147 case CS42L56_PGAA_MUX_VOLUME:
148 case CS42L56_PGAB_MUX_VOLUME:
149 case CS42L56_ADCA_ATTENUATOR:
150 case CS42L56_ADCB_ATTENUATOR:
151 case CS42L56_ALC_EN_ATTACK_RATE:
152 case CS42L56_ALC_RELEASE_RATE:
153 case CS42L56_ALC_THRESHOLD:
154 case CS42L56_NOISE_GATE_CTL:
155 case CS42L56_ALC_LIM_SFT_ZC:
156 case CS42L56_AMUTE_HPLO_MUX:
157 case CS42L56_HPA_VOLUME:
158 case CS42L56_HPB_VOLUME:
159 case CS42L56_LOA_VOLUME:
160 case CS42L56_LOB_VOLUME:
161 case CS42L56_LIM_THRESHOLD_CTL:
162 case CS42L56_LIM_CTL_RELEASE_RATE:
163 case CS42L56_LIM_ATTACK_RATE:
164 return true;
165 default:
166 return false;
167 }
168}
169
170static bool cs42l56_volatile_register(struct device *dev, unsigned int reg)
171{
172 switch (reg) {
173 case CS42L56_INT_STATUS:
174 return 1;
175 default:
176 return 0;
177 }
178}
179
180static DECLARE_TLV_DB_SCALE(beep_tlv, -5000, 200, 0);
181static DECLARE_TLV_DB_SCALE(hl_tlv, -6000, 50, 0);
182static DECLARE_TLV_DB_SCALE(adv_tlv, -10200, 50, 0);
183static DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 100, 0);
184static DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
185static DECLARE_TLV_DB_SCALE(preamp_tlv, 0, 1000, 0);
186static DECLARE_TLV_DB_SCALE(pga_tlv, -600, 50, 0);
187
188static const unsigned int ngnb_tlv[] = {
189 TLV_DB_RANGE_HEAD(2),
190 0, 1, TLV_DB_SCALE_ITEM(-8200, 600, 0),
191 2, 5, TLV_DB_SCALE_ITEM(-7600, 300, 0),
192};
193static const unsigned int ngb_tlv[] = {
194 TLV_DB_RANGE_HEAD(2),
195 0, 2, TLV_DB_SCALE_ITEM(-6400, 600, 0),
196 3, 7, TLV_DB_SCALE_ITEM(-4600, 300, 0),
197};
198static const unsigned int alc_tlv[] = {
199 TLV_DB_RANGE_HEAD(2),
200 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0),
201 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0),
202};
203
204static const char * const beep_config_text[] = {
205 "Off", "Single", "Multiple", "Continuous"
206};
207
208static const struct soc_enum beep_config_enum =
209 SOC_ENUM_SINGLE(CS42L56_BEEP_TONE_CFG, 6,
210 ARRAY_SIZE(beep_config_text), beep_config_text);
211
212static const char * const beep_pitch_text[] = {
213 "C4", "C5", "D5", "E5", "F5", "G5", "A5", "B5",
214 "C6", "D6", "E6", "F6", "G6", "A6", "B6", "C7"
215};
216
217static const struct soc_enum beep_pitch_enum =
218 SOC_ENUM_SINGLE(CS42L56_BEEP_FREQ_ONTIME, 4,
219 ARRAY_SIZE(beep_pitch_text), beep_pitch_text);
220
221static const char * const beep_ontime_text[] = {
222 "86 ms", "430 ms", "780 ms", "1.20 s", "1.50 s",
223 "1.80 s", "2.20 s", "2.50 s", "2.80 s", "3.20 s",
224 "3.50 s", "3.80 s", "4.20 s", "4.50 s", "4.80 s", "5.20 s"
225};
226
227static const struct soc_enum beep_ontime_enum =
228 SOC_ENUM_SINGLE(CS42L56_BEEP_FREQ_ONTIME, 0,
229 ARRAY_SIZE(beep_ontime_text), beep_ontime_text);
230
231static const char * const beep_offtime_text[] = {
232 "1.23 s", "2.58 s", "3.90 s", "5.20 s",
233 "6.60 s", "8.05 s", "9.35 s", "10.80 s"
234};
235
236static const struct soc_enum beep_offtime_enum =
237 SOC_ENUM_SINGLE(CS42L56_BEEP_FREQ_OFFTIME, 5,
238 ARRAY_SIZE(beep_offtime_text), beep_offtime_text);
239
240static const char * const beep_treble_text[] = {
241 "5kHz", "7kHz", "10kHz", "15kHz"
242};
243
244static const struct soc_enum beep_treble_enum =
245 SOC_ENUM_SINGLE(CS42L56_BEEP_TONE_CFG, 3,
246 ARRAY_SIZE(beep_treble_text), beep_treble_text);
247
248static const char * const beep_bass_text[] = {
249 "50Hz", "100Hz", "200Hz", "250Hz"
250};
251
252static const struct soc_enum beep_bass_enum =
253 SOC_ENUM_SINGLE(CS42L56_BEEP_TONE_CFG, 1,
254 ARRAY_SIZE(beep_bass_text), beep_bass_text);
255
256static const char * const adc_swap_text[] = {
257 "None", "A+B/2", "A-B/2", "Swap"
258};
259
260static const struct soc_enum adc_swap_enum =
261 SOC_ENUM_SINGLE(CS42L56_MISC_ADC_CTL, 3,
262 ARRAY_SIZE(adc_swap_text), adc_swap_text);
263
264static const char * const pgaa_mux_text[] = {
265 "AIN1A", "AIN2A", "AIN3A"};
266
267static const struct soc_enum pgaa_mux_enum =
268 SOC_ENUM_SINGLE(CS42L56_PGAA_MUX_VOLUME, 0,
269 ARRAY_SIZE(pgaa_mux_text),
270 pgaa_mux_text);
271
272static const struct snd_kcontrol_new pgaa_mux =
273 SOC_DAPM_ENUM("Route", pgaa_mux_enum);
274
275static const char * const pgab_mux_text[] = {
276 "AIN1B", "AIN2B", "AIN3B"};
277
278static const struct soc_enum pgab_mux_enum =
279 SOC_ENUM_SINGLE(CS42L56_PGAB_MUX_VOLUME, 0,
280 ARRAY_SIZE(pgab_mux_text),
281 pgab_mux_text);
282
283static const struct snd_kcontrol_new pgab_mux =
284 SOC_DAPM_ENUM("Route", pgab_mux_enum);
285
286static const char * const adca_mux_text[] = {
287 "PGAA", "AIN1A", "AIN2A", "AIN3A"};
288
289static const struct soc_enum adca_mux_enum =
290 SOC_ENUM_SINGLE(CS42L56_AIN_REFCFG_ADC_MUX, 0,
291 ARRAY_SIZE(adca_mux_text),
292 adca_mux_text);
293
294static const struct snd_kcontrol_new adca_mux =
295 SOC_DAPM_ENUM("Route", adca_mux_enum);
296
297static const char * const adcb_mux_text[] = {
298 "PGAB", "AIN1B", "AIN2B", "AIN3B"};
299
300static const struct soc_enum adcb_mux_enum =
301 SOC_ENUM_SINGLE(CS42L56_AIN_REFCFG_ADC_MUX, 2,
302 ARRAY_SIZE(adcb_mux_text),
303 adcb_mux_text);
304
305static const struct snd_kcontrol_new adcb_mux =
306 SOC_DAPM_ENUM("Route", adcb_mux_enum);
307
308static const char * const left_swap_text[] = {
309 "Left", "LR 2", "Right"};
310
311static const char * const right_swap_text[] = {
312 "Right", "LR 2", "Left"};
313
314static const unsigned int swap_values[] = { 0, 1, 3 };
315
316static const struct soc_enum adca_swap_enum =
317 SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 0, 3,
318 ARRAY_SIZE(left_swap_text),
319 left_swap_text,
320 swap_values);
321
322static const struct soc_enum pcma_swap_enum =
323 SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 4, 3,
324 ARRAY_SIZE(left_swap_text),
325 left_swap_text,
326 swap_values);
327
328static const struct soc_enum adcb_swap_enum =
329 SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 2, 3,
330 ARRAY_SIZE(right_swap_text),
331 right_swap_text,
332 swap_values);
333
334static const struct soc_enum pcmb_swap_enum =
335 SOC_VALUE_ENUM_SINGLE(CS42L56_CHAN_MIX_SWAP, 6, 3,
336 ARRAY_SIZE(right_swap_text),
337 right_swap_text,
338 swap_values);
339
340static const struct snd_kcontrol_new hpa_switch =
341 SOC_DAPM_SINGLE("Switch", CS42L56_PWRCTL_2, 6, 1, 1);
342
343static const struct snd_kcontrol_new hpb_switch =
344 SOC_DAPM_SINGLE("Switch", CS42L56_PWRCTL_2, 4, 1, 1);
345
346static const struct snd_kcontrol_new loa_switch =
347 SOC_DAPM_SINGLE("Switch", CS42L56_PWRCTL_2, 2, 1, 1);
348
349static const struct snd_kcontrol_new lob_switch =
350 SOC_DAPM_SINGLE("Switch", CS42L56_PWRCTL_2, 0, 1, 1);
351
352static const char * const hploa_input_text[] = {
353 "DACA", "PGAA"};
354
355static const struct soc_enum lineouta_input_enum =
356 SOC_ENUM_SINGLE(CS42L56_AMUTE_HPLO_MUX, 2,
357 ARRAY_SIZE(hploa_input_text),
358 hploa_input_text);
359
360static const struct snd_kcontrol_new lineouta_input =
361 SOC_DAPM_ENUM("Route", lineouta_input_enum);
362
363static const struct soc_enum hpa_input_enum =
364 SOC_ENUM_SINGLE(CS42L56_AMUTE_HPLO_MUX, 0,
365 ARRAY_SIZE(hploa_input_text),
366 hploa_input_text);
367
368static const struct snd_kcontrol_new hpa_input =
369 SOC_DAPM_ENUM("Route", hpa_input_enum);
370
371static const char * const hplob_input_text[] = {
372 "DACB", "PGAB"};
373
374static const struct soc_enum lineoutb_input_enum =
375 SOC_ENUM_SINGLE(CS42L56_AMUTE_HPLO_MUX, 3,
376 ARRAY_SIZE(hplob_input_text),
377 hplob_input_text);
378
379static const struct snd_kcontrol_new lineoutb_input =
380 SOC_DAPM_ENUM("Route", lineoutb_input_enum);
381
382static const struct soc_enum hpb_input_enum =
383 SOC_ENUM_SINGLE(CS42L56_AMUTE_HPLO_MUX, 1,
384 ARRAY_SIZE(hplob_input_text),
385 hplob_input_text);
386
387static const struct snd_kcontrol_new hpb_input =
388 SOC_DAPM_ENUM("Route", hpb_input_enum);
389
390static const char * const dig_mux_text[] = {
391 "ADC", "DSP"};
392
393static const struct soc_enum dig_mux_enum =
394 SOC_ENUM_SINGLE(CS42L56_MISC_CTL, 7,
395 ARRAY_SIZE(dig_mux_text),
396 dig_mux_text);
397
398static const struct snd_kcontrol_new dig_mux =
399 SOC_DAPM_ENUM("Route", dig_mux_enum);
400
401static const char * const hpf_freq_text[] = {
402 "1.8Hz", "119Hz", "236Hz", "464Hz"
403};
404
405static const struct soc_enum hpfa_freq_enum =
406 SOC_ENUM_SINGLE(CS42L56_HPF_CTL, 0,
407 ARRAY_SIZE(hpf_freq_text), hpf_freq_text);
408
409static const struct soc_enum hpfb_freq_enum =
410 SOC_ENUM_SINGLE(CS42L56_HPF_CTL, 2,
411 ARRAY_SIZE(hpf_freq_text), hpf_freq_text);
412
413static const char * const ng_delay_text[] = {
414 "50ms", "100ms", "150ms", "200ms"
415};
416
417static const struct soc_enum ng_delay_enum =
418 SOC_ENUM_SINGLE(CS42L56_NOISE_GATE_CTL, 0,
419 ARRAY_SIZE(ng_delay_text), ng_delay_text);
420
421static const struct snd_kcontrol_new cs42l56_snd_controls[] = {
422
423 SOC_DOUBLE_R_SX_TLV("Master Volume", CS42L56_MASTER_A_VOLUME,
424 CS42L56_MASTER_B_VOLUME, 0, 0x34, 0xfd, adv_tlv),
425 SOC_DOUBLE("Master Mute Switch", CS42L56_DSP_MUTE_CTL, 0, 1, 1, 1),
426
427 SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume", CS42L56_ADCA_MIX_VOLUME,
428 CS42L56_ADCB_MIX_VOLUME, 0, 0x88, 0xa9, hl_tlv),
429 SOC_DOUBLE("ADC Mixer Mute Switch", CS42L56_DSP_MUTE_CTL, 6, 7, 1, 1),
430
431 SOC_DOUBLE_R_SX_TLV("PCM Mixer Volume", CS42L56_PCMA_MIX_VOLUME,
432 CS42L56_PCMB_MIX_VOLUME, 0, 0x88, 0xa9, hl_tlv),
433 SOC_DOUBLE("PCM Mixer Mute Switch", CS42L56_DSP_MUTE_CTL, 4, 5, 1, 1),
434
435 SOC_SINGLE_TLV("Analog Advisory Volume",
436 CS42L56_ANAINPUT_ADV_VOLUME, 0, 0x00, 1, adv_tlv),
437 SOC_SINGLE_TLV("Digital Advisory Volume",
438 CS42L56_DIGINPUT_ADV_VOLUME, 0, 0x00, 1, adv_tlv),
439
440 SOC_DOUBLE_R_SX_TLV("PGA Volume", CS42L56_PGAA_MUX_VOLUME,
441 CS42L56_PGAB_MUX_VOLUME, 0, 0x34, 0xfd, pga_tlv),
442 SOC_DOUBLE_R_TLV("ADC Volume", CS42L56_ADCA_ATTENUATOR,
443 CS42L56_ADCB_ATTENUATOR, 0, 0x00, 1, adc_tlv),
444 SOC_DOUBLE("ADC Mute Switch", CS42L56_MISC_ADC_CTL, 2, 3, 1, 1),
445 SOC_DOUBLE("ADC Boost Switch", CS42L56_GAIN_BIAS_CTL, 3, 2, 1, 1),
446
447 SOC_DOUBLE_R_SX_TLV("Headphone Volume", CS42L56_HPA_VOLUME,
448 CS42L56_HPA_VOLUME, 0, 0x44, 0x55, hl_tlv),
449 SOC_DOUBLE_R_SX_TLV("LineOut Volume", CS42L56_LOA_VOLUME,
450 CS42L56_LOA_VOLUME, 0, 0x44, 0x55, hl_tlv),
451
452 SOC_SINGLE_TLV("Bass Shelving Volume", CS42L56_TONE_CTL,
453 0, 0x00, 1, tone_tlv),
454 SOC_SINGLE_TLV("Treble Shelving Volume", CS42L56_TONE_CTL,
455 4, 0x00, 1, tone_tlv),
456
457 SOC_DOUBLE_TLV("PGA Preamp Volume", CS42L56_GAIN_BIAS_CTL,
458 4, 6, 0x02, 1, preamp_tlv),
459
460 SOC_SINGLE("DSP Switch", CS42L56_PLAYBACK_CTL, 7, 1, 1),
461 SOC_SINGLE("Gang Playback Switch", CS42L56_PLAYBACK_CTL, 4, 1, 1),
462 SOC_SINGLE("Gang ADC Switch", CS42L56_MISC_ADC_CTL, 7, 1, 1),
463 SOC_SINGLE("Gang PGA Switch", CS42L56_MISC_ADC_CTL, 6, 1, 1),
464
465 SOC_SINGLE("PCMA Invert", CS42L56_PLAYBACK_CTL, 2, 1, 1),
466 SOC_SINGLE("PCMB Invert", CS42L56_PLAYBACK_CTL, 3, 1, 1),
467 SOC_SINGLE("ADCA Invert", CS42L56_MISC_ADC_CTL, 2, 1, 1),
468 SOC_SINGLE("ADCB Invert", CS42L56_MISC_ADC_CTL, 3, 1, 1),
469
470 SOC_ENUM("PCMA Swap", pcma_swap_enum),
471 SOC_ENUM("PCMB Swap", pcmb_swap_enum),
472 SOC_ENUM("ADCA Swap", adca_swap_enum),
473 SOC_ENUM("ADCB Swap", adcb_swap_enum),
474
475 SOC_DOUBLE("HPF Switch", CS42L56_HPF_CTL, 5, 7, 1, 1),
476 SOC_DOUBLE("HPF Freeze Switch", CS42L56_HPF_CTL, 4, 6, 1, 1),
477 SOC_ENUM("HPFA Corner Freq", hpfa_freq_enum),
478 SOC_ENUM("HPFB Corner Freq", hpfb_freq_enum),
479
480 SOC_SINGLE("Analog Soft Ramp", CS42L56_MISC_CTL, 4, 1, 1),
481 SOC_DOUBLE("Analog Soft Ramp Disable", CS42L56_ALC_LIM_SFT_ZC,
482 7, 5, 1, 1),
483 SOC_SINGLE("Analog Zero Cross", CS42L56_MISC_CTL, 3, 1, 1),
484 SOC_DOUBLE("Analog Zero Cross Disable", CS42L56_ALC_LIM_SFT_ZC,
485 6, 4, 1, 1),
486 SOC_SINGLE("Digital Soft Ramp", CS42L56_MISC_CTL, 2, 1, 1),
487 SOC_SINGLE("Digital Soft Ramp Disable", CS42L56_ALC_LIM_SFT_ZC,
488 3, 1, 1),
489
490 SOC_SINGLE("HL Deemphasis", CS42L56_PLAYBACK_CTL, 6, 1, 1),
491
492 SOC_SINGLE("ALC Switch", CS42L56_ALC_EN_ATTACK_RATE, 6, 1, 1),
493 SOC_SINGLE("ALC Limit All Switch", CS42L56_ALC_RELEASE_RATE, 7, 1, 1),
494 SOC_SINGLE_RANGE("ALC Attack", CS42L56_ALC_EN_ATTACK_RATE,
495 0, 0, 0x3f, 0),
496 SOC_SINGLE_RANGE("ALC Release", CS42L56_ALC_RELEASE_RATE,
497 0, 0x3f, 0, 0),
498 SOC_SINGLE_TLV("ALC MAX", CS42L56_ALC_THRESHOLD,
499 5, 0x07, 1, alc_tlv),
500 SOC_SINGLE_TLV("ALC MIN", CS42L56_ALC_THRESHOLD,
501 2, 0x07, 1, alc_tlv),
502
503 SOC_SINGLE("Limiter Switch", CS42L56_LIM_CTL_RELEASE_RATE, 7, 1, 1),
504 SOC_SINGLE("Limit All Switch", CS42L56_LIM_CTL_RELEASE_RATE, 6, 1, 1),
505 SOC_SINGLE_RANGE("Limiter Attack", CS42L56_LIM_ATTACK_RATE,
506 0, 0, 0x3f, 0),
507 SOC_SINGLE_RANGE("Limiter Release", CS42L56_LIM_CTL_RELEASE_RATE,
508 0, 0x3f, 0, 0),
509 SOC_SINGLE_TLV("Limiter MAX", CS42L56_LIM_THRESHOLD_CTL,
510 5, 0x07, 1, alc_tlv),
511 SOC_SINGLE_TLV("Limiter Cushion", CS42L56_ALC_THRESHOLD,
512 2, 0x07, 1, alc_tlv),
513
514 SOC_SINGLE("NG Switch", CS42L56_NOISE_GATE_CTL, 6, 1, 1),
515 SOC_SINGLE("NG All Switch", CS42L56_NOISE_GATE_CTL, 7, 1, 1),
516 SOC_SINGLE("NG Boost Switch", CS42L56_NOISE_GATE_CTL, 5, 1, 1),
517 SOC_SINGLE_TLV("NG Unboost Threshold", CS42L56_NOISE_GATE_CTL,
518 2, 0x07, 1, ngnb_tlv),
519 SOC_SINGLE_TLV("NG Boost Threshold", CS42L56_NOISE_GATE_CTL,
520 2, 0x07, 1, ngb_tlv),
521 SOC_ENUM("NG Delay", ng_delay_enum),
522
523 SOC_ENUM("Beep Config", beep_config_enum),
524 SOC_ENUM("Beep Pitch", beep_pitch_enum),
525 SOC_ENUM("Beep on Time", beep_ontime_enum),
526 SOC_ENUM("Beep off Time", beep_offtime_enum),
527 SOC_SINGLE_SX_TLV("Beep Volume", CS42L56_BEEP_FREQ_OFFTIME,
528 0, 0x07, 0x23, beep_tlv),
529 SOC_SINGLE("Beep Tone Ctl Switch", CS42L56_BEEP_TONE_CFG, 0, 1, 1),
530 SOC_ENUM("Beep Treble Corner Freq", beep_treble_enum),
531 SOC_ENUM("Beep Bass Corner Freq", beep_bass_enum),
532
533};
534
535static const struct snd_soc_dapm_widget cs42l56_dapm_widgets[] = {
536
537 SND_SOC_DAPM_SIGGEN("Beep"),
538 SND_SOC_DAPM_SUPPLY("VBUF", CS42L56_PWRCTL_1, 5, 1, NULL, 0),
539 SND_SOC_DAPM_MICBIAS("MIC1 Bias", CS42L56_PWRCTL_1, 4, 1),
540 SND_SOC_DAPM_SUPPLY("Charge Pump", CS42L56_PWRCTL_1, 3, 1, NULL, 0),
541
542 SND_SOC_DAPM_INPUT("AIN1A"),
543 SND_SOC_DAPM_INPUT("AIN2A"),
544 SND_SOC_DAPM_INPUT("AIN1B"),
545 SND_SOC_DAPM_INPUT("AIN2B"),
546 SND_SOC_DAPM_INPUT("AIN3A"),
547 SND_SOC_DAPM_INPUT("AIN3B"),
548
549 SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0,
550 SND_SOC_NOPM, 0, 0),
551
552 SND_SOC_DAPM_AIF_IN("SDIN", NULL, 0,
553 SND_SOC_NOPM, 0, 0),
554
555 SND_SOC_DAPM_MUX("Digital Output Mux", SND_SOC_NOPM,
556 0, 0, &dig_mux),
557
558 SND_SOC_DAPM_PGA("PGAA", SND_SOC_NOPM, 0, 0, NULL, 0),
559 SND_SOC_DAPM_PGA("PGAB", SND_SOC_NOPM, 0, 0, NULL, 0),
560 SND_SOC_DAPM_MUX("PGAA Input Mux",
561 SND_SOC_NOPM, 0, 0, &pgaa_mux),
562 SND_SOC_DAPM_MUX("PGAB Input Mux",
563 SND_SOC_NOPM, 0, 0, &pgab_mux),
564
565 SND_SOC_DAPM_MUX("ADCA Mux", SND_SOC_NOPM,
566 0, 0, &adca_mux),
567 SND_SOC_DAPM_MUX("ADCB Mux", SND_SOC_NOPM,
568 0, 0, &adcb_mux),
569
570 SND_SOC_DAPM_ADC("ADCA", NULL, CS42L56_PWRCTL_1, 1, 1),
571 SND_SOC_DAPM_ADC("ADCB", NULL, CS42L56_PWRCTL_1, 2, 1),
572
573 SND_SOC_DAPM_DAC("DACA", NULL, SND_SOC_NOPM, 0, 0),
574 SND_SOC_DAPM_DAC("DACB", NULL, SND_SOC_NOPM, 0, 0),
575
576 SND_SOC_DAPM_OUTPUT("HPA"),
577 SND_SOC_DAPM_OUTPUT("LOA"),
578 SND_SOC_DAPM_OUTPUT("HPB"),
579 SND_SOC_DAPM_OUTPUT("LOB"),
580
581 SND_SOC_DAPM_SWITCH("Headphone Right",
582 CS42L56_PWRCTL_2, 4, 1, &hpb_switch),
583 SND_SOC_DAPM_SWITCH("Headphone Left",
584 CS42L56_PWRCTL_2, 6, 1, &hpa_switch),
585
586 SND_SOC_DAPM_SWITCH("Lineout Right",
587 CS42L56_PWRCTL_2, 0, 1, &lob_switch),
588 SND_SOC_DAPM_SWITCH("Lineout Left",
589 CS42L56_PWRCTL_2, 2, 1, &loa_switch),
590
591 SND_SOC_DAPM_MUX("LINEOUTA Input Mux", SND_SOC_NOPM,
592 0, 0, &lineouta_input),
593 SND_SOC_DAPM_MUX("LINEOUTB Input Mux", SND_SOC_NOPM,
594 0, 0, &lineoutb_input),
595 SND_SOC_DAPM_MUX("HPA Input Mux", SND_SOC_NOPM,
596 0, 0, &hpa_input),
597 SND_SOC_DAPM_MUX("HPB Input Mux", SND_SOC_NOPM,
598 0, 0, &hpb_input),
599
600};
601
602static const struct snd_soc_dapm_route cs42l56_audio_map[] = {
603
604 {"HiFi Capture", "DSP", "Digital Output Mux"},
605 {"HiFi Capture", "ADC", "Digital Output Mux"},
606
607 {"Digital Output Mux", NULL, "ADCA"},
608 {"Digital Output Mux", NULL, "ADCB"},
609
610 {"ADCB", NULL, "ADCB Mux"},
611 {"ADCA", NULL, "ADCA Mux"},
612
613 {"ADCA Mux", NULL, "AIN3A"},
614 {"ADCA Mux", NULL, "AIN2A"},
615 {"ADCA Mux", NULL, "AIN1A"},
616 {"ADCA Mux", NULL, "PGAA"},
617 {"ADCB Mux", NULL, "AIN3B"},
618 {"ADCB Mux", NULL, "AIN2B"},
619 {"ADCB Mux", NULL, "AIN1B"},
620 {"ADCB Mux", NULL, "PGAB"},
621
622 {"PGAA", "AIN1A", "PGAA Input Mux"},
623 {"PGAA", "AIN2A", "PGAA Input Mux"},
624 {"PGAA", "AIN3A", "PGAA Input Mux"},
625 {"PGAB", "AIN1B", "PGAB Input Mux"},
626 {"PGAB", "AIN2B", "PGAB Input Mux"},
627 {"PGAB", "AIN3B", "PGAB Input Mux"},
628
629 {"PGAA Input Mux", NULL, "AIN1A"},
630 {"PGAA Input Mux", NULL, "AIN2A"},
631 {"PGAA Input Mux", NULL, "AIN3A"},
632 {"PGAB Input Mux", NULL, "AIN1B"},
633 {"PGAB Input Mux", NULL, "AIN2B"},
634 {"PGAB Input Mux", NULL, "AIN3B"},
635
636 {"LOB", NULL, "Lineout Right"},
637 {"LOA", NULL, "Lineout Left"},
638
639 {"Lineout Right", "Switch", "LINEOUTB Input Mux"},
640 {"Lineout Left", "Switch", "LINEOUTA Input Mux"},
641
642 {"LINEOUTA Input Mux", "PGAA", "PGAA"},
643 {"LINEOUTB Input Mux", "PGAB", "PGAB"},
644 {"LINEOUTA Input Mux", "DACA", "DACA"},
645 {"LINEOUTB Input Mux", "DACB", "DACB"},
646
647 {"HPA", NULL, "Headphone Left"},
648 {"HPB", NULL, "Headphone Right"},
649
650 {"Headphone Right", "Switch", "HPB Input Mux"},
651 {"Headphone Left", "Switch", "HPA Input Mux"},
652
653 {"HPA Input Mux", "PGAA", "PGAA"},
654 {"HPB Input Mux", "PGAB", "PGAB"},
655 {"HPA Input Mux", "DACA", "DACA"},
656 {"HPB Input Mux", "DACB", "DACB"},
657
658 {"DACB", NULL, "HiFi Playback"},
659 {"DACA", NULL, "HiFi Playback"},
660
661};
662
663struct cs42l56_clk_para {
664 u32 mclk;
665 u32 srate;
666 u8 ratio;
667};
668
669static const struct cs42l56_clk_para clk_ratio_table[] = {
670 /* 8k */
671 { 6000000, 8000, CS42L56_MCLK_LRCLK_768 },
672 { 6144000, 8000, CS42L56_MCLK_LRCLK_750 },
673 { 12000000, 8000, CS42L56_MCLK_LRCLK_768 },
674 { 12288000, 8000, CS42L56_MCLK_LRCLK_750 },
675 { 24000000, 8000, CS42L56_MCLK_LRCLK_768 },
676 { 24576000, 8000, CS42L56_MCLK_LRCLK_750 },
677 /* 11.025k */
678 { 5644800, 11025, CS42L56_MCLK_LRCLK_512},
679 { 11289600, 11025, CS42L56_MCLK_LRCLK_512},
680 { 22579200, 11025, CS42L56_MCLK_LRCLK_512 },
681 /* 11.0294k */
682 { 6000000, 110294, CS42L56_MCLK_LRCLK_544 },
683 { 12000000, 110294, CS42L56_MCLK_LRCLK_544 },
684 { 24000000, 110294, CS42L56_MCLK_LRCLK_544 },
685 /* 12k */
686 { 6000000, 12000, CS42L56_MCLK_LRCLK_500 },
687 { 6144000, 12000, CS42L56_MCLK_LRCLK_512 },
688 { 12000000, 12000, CS42L56_MCLK_LRCLK_500 },
689 { 12288000, 12000, CS42L56_MCLK_LRCLK_512 },
690 { 24000000, 12000, CS42L56_MCLK_LRCLK_500 },
691 { 24576000, 12000, CS42L56_MCLK_LRCLK_512 },
692 /* 16k */
693 { 6000000, 16000, CS42L56_MCLK_LRCLK_375 },
694 { 6144000, 16000, CS42L56_MCLK_LRCLK_384 },
695 { 12000000, 16000, CS42L56_MCLK_LRCLK_375 },
696 { 12288000, 16000, CS42L56_MCLK_LRCLK_384 },
697 { 24000000, 16000, CS42L56_MCLK_LRCLK_375 },
698 { 24576000, 16000, CS42L56_MCLK_LRCLK_384 },
699 /* 22.050k */
700 { 5644800, 22050, CS42L56_MCLK_LRCLK_256 },
701 { 11289600, 22050, CS42L56_MCLK_LRCLK_256 },
702 { 22579200, 22050, CS42L56_MCLK_LRCLK_256 },
703 /* 22.0588k */
704 { 6000000, 220588, CS42L56_MCLK_LRCLK_272 },
705 { 12000000, 220588, CS42L56_MCLK_LRCLK_272 },
706 { 24000000, 220588, CS42L56_MCLK_LRCLK_272 },
707 /* 24k */
708 { 6000000, 24000, CS42L56_MCLK_LRCLK_250 },
709 { 6144000, 24000, CS42L56_MCLK_LRCLK_256 },
710 { 12000000, 24000, CS42L56_MCLK_LRCLK_250 },
711 { 12288000, 24000, CS42L56_MCLK_LRCLK_256 },
712 { 24000000, 24000, CS42L56_MCLK_LRCLK_250 },
713 { 24576000, 24000, CS42L56_MCLK_LRCLK_256 },
714 /* 32k */
715 { 6000000, 32000, CS42L56_MCLK_LRCLK_187P5 },
716 { 6144000, 32000, CS42L56_MCLK_LRCLK_192 },
717 { 12000000, 32000, CS42L56_MCLK_LRCLK_187P5 },
718 { 12288000, 32000, CS42L56_MCLK_LRCLK_192 },
719 { 24000000, 32000, CS42L56_MCLK_LRCLK_187P5 },
720 { 24576000, 32000, CS42L56_MCLK_LRCLK_192 },
721 /* 44.118k */
722 { 6000000, 44118, CS42L56_MCLK_LRCLK_136 },
723 { 12000000, 44118, CS42L56_MCLK_LRCLK_136 },
724 { 24000000, 44118, CS42L56_MCLK_LRCLK_136 },
725 /* 44.1k */
726 { 5644800, 44100, CS42L56_MCLK_LRCLK_128 },
727 { 11289600, 44100, CS42L56_MCLK_LRCLK_128 },
728 { 22579200, 44100, CS42L56_MCLK_LRCLK_128 },
729 /* 48k */
730 { 6000000, 48000, CS42L56_MCLK_LRCLK_125 },
731 { 6144000, 48000, CS42L56_MCLK_LRCLK_128 },
732 { 12000000, 48000, CS42L56_MCLK_LRCLK_125 },
733 { 12288000, 48000, CS42L56_MCLK_LRCLK_128 },
734 { 24000000, 48000, CS42L56_MCLK_LRCLK_125 },
735 { 24576000, 48000, CS42L56_MCLK_LRCLK_128 },
736};
737
738static int cs42l56_get_mclk_ratio(int mclk, int rate)
739{
740 int i;
741
742 for (i = 0; i < ARRAY_SIZE(clk_ratio_table); i++) {
743 if (clk_ratio_table[i].mclk == mclk &&
744 clk_ratio_table[i].srate == rate)
745 return clk_ratio_table[i].ratio;
746 }
747 return -EINVAL;
748}
749
750static int cs42l56_set_sysclk(struct snd_soc_dai *codec_dai,
751 int clk_id, unsigned int freq, int dir)
752{
753 struct snd_soc_codec *codec = codec_dai->codec;
754 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
755
756 switch (freq) {
757 case CS42L56_MCLK_5P6448MHZ:
758 case CS42L56_MCLK_6MHZ:
759 case CS42L56_MCLK_6P144MHZ:
760 cs42l56->mclk_div2 = 0;
761 cs42l56->mclk_prediv = 0;
762 break;
763 case CS42L56_MCLK_11P2896MHZ:
764 case CS42L56_MCLK_12MHZ:
765 case CS42L56_MCLK_12P288MHZ:
766 cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
767 cs42l56->mclk_prediv = 0;
768 break;
769 case CS42L56_MCLK_22P5792MHZ:
770 case CS42L56_MCLK_24MHZ:
771 case CS42L56_MCLK_24P576MHZ:
772 cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
773 cs42l56->mclk_prediv = CS42L56_MCLK_PREDIV;
774 break;
775 default:
776 return -EINVAL;
777 }
778 cs42l56->mclk = freq;
779
780 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
781 CS42L56_MCLK_PREDIV_MASK,
782 cs42l56->mclk_prediv);
783 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
784 CS42L56_MCLK_DIV2_MASK,
785 cs42l56->mclk_div2);
786
787 return 0;
788}
789
790static int cs42l56_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
791{
792 struct snd_soc_codec *codec = codec_dai->codec;
793 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
794
795 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
796 case SND_SOC_DAIFMT_CBM_CFM:
797 cs42l56->iface = CS42L56_MASTER_MODE;
798 break;
799 case SND_SOC_DAIFMT_CBS_CFS:
800 cs42l56->iface = CS42L56_SLAVE_MODE;
801 break;
802 default:
803 return -EINVAL;
804 }
805
806 /* interface format */
807 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
808 case SND_SOC_DAIFMT_I2S:
809 cs42l56->iface_fmt = CS42L56_DIG_FMT_I2S;
810 break;
811 case SND_SOC_DAIFMT_LEFT_J:
812 cs42l56->iface_fmt = CS42L56_DIG_FMT_LEFT_J;
813 break;
814 default:
815 return -EINVAL;
816 }
817
818 /* sclk inversion */
819 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
820 case SND_SOC_DAIFMT_NB_NF:
821 cs42l56->iface_inv = 0;
822 break;
823 case SND_SOC_DAIFMT_IB_NF:
824 cs42l56->iface_inv = CS42L56_SCLK_INV;
825 break;
826 default:
827 return -EINVAL;
828 }
829
830 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
831 CS42L56_MS_MODE_MASK, cs42l56->iface);
832 snd_soc_update_bits(codec, CS42L56_SERIAL_FMT,
833 CS42L56_DIG_FMT_MASK, cs42l56->iface_fmt);
834 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
835 CS42L56_SCLK_INV_MASK, cs42l56->iface_inv);
836 return 0;
837}
838
839static int cs42l56_digital_mute(struct snd_soc_dai *dai, int mute)
840{
841 struct snd_soc_codec *codec = dai->codec;
842
843 if (mute) {
844 /* Hit the DSP Mixer first */
845 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
846 CS42L56_ADCAMIX_MUTE_MASK |
847 CS42L56_ADCBMIX_MUTE_MASK |
848 CS42L56_PCMAMIX_MUTE_MASK |
849 CS42L56_PCMBMIX_MUTE_MASK |
850 CS42L56_MSTB_MUTE_MASK |
851 CS42L56_MSTA_MUTE_MASK,
852 CS42L56_MUTE_ALL);
853 /* Mute ADC's */
854 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
855 CS42L56_ADCA_MUTE_MASK |
856 CS42L56_ADCB_MUTE_MASK,
857 CS42L56_MUTE_ALL);
858 /* HP And LO */
859 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
860 CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
861 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
862 CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
863 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
864 CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
865 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
866 CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
867 } else {
868 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
869 CS42L56_ADCAMIX_MUTE_MASK |
870 CS42L56_ADCBMIX_MUTE_MASK |
871 CS42L56_PCMAMIX_MUTE_MASK |
872 CS42L56_PCMBMIX_MUTE_MASK |
873 CS42L56_MSTB_MUTE_MASK |
874 CS42L56_MSTA_MUTE_MASK,
875 CS42L56_UNMUTE);
876
877 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
878 CS42L56_ADCA_MUTE_MASK |
879 CS42L56_ADCB_MUTE_MASK,
880 CS42L56_UNMUTE);
881
882 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
883 CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
884 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
885 CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
886 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
887 CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
888 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
889 CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
890 }
891 return 0;
892}
893
894static int cs42l56_pcm_hw_params(struct snd_pcm_substream *substream,
895 struct snd_pcm_hw_params *params,
896 struct snd_soc_dai *dai)
897{
898 struct snd_soc_codec *codec = dai->codec;
899 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
900 int ratio;
901
902 ratio = cs42l56_get_mclk_ratio(cs42l56->mclk, params_rate(params));
903 if (ratio >= 0) {
904 snd_soc_update_bits(codec, CS42L56_CLKCTL_2,
905 CS42L56_CLK_RATIO_MASK, ratio);
906 } else {
907 dev_err(codec->dev, "unsupported mclk/sclk/lrclk ratio\n");
908 return -EINVAL;
909 }
910
911 return 0;
912}
913
914static int cs42l56_set_bias_level(struct snd_soc_codec *codec,
915 enum snd_soc_bias_level level)
916{
917 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
918 int ret;
919
920 switch (level) {
921 case SND_SOC_BIAS_ON:
922 break;
923 case SND_SOC_BIAS_PREPARE:
924 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
925 CS42L56_MCLK_DIS_MASK, 0);
926 snd_soc_update_bits(codec, CS42L56_PWRCTL_1,
927 CS42L56_PDN_ALL_MASK, 0);
928 break;
929 case SND_SOC_BIAS_STANDBY:
930 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
931 regcache_cache_only(cs42l56->regmap, false);
932 regcache_sync(cs42l56->regmap);
933 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l56->supplies),
934 cs42l56->supplies);
935 if (ret != 0) {
936 dev_err(cs42l56->dev,
937 "Failed to enable regulators: %d\n",
938 ret);
939 return ret;
940 }
941 }
942 snd_soc_update_bits(codec, CS42L56_PWRCTL_1,
943 CS42L56_PDN_ALL_MASK, 1);
944 break;
945 case SND_SOC_BIAS_OFF:
946 snd_soc_update_bits(codec, CS42L56_PWRCTL_1,
947 CS42L56_PDN_ALL_MASK, 1);
948 snd_soc_update_bits(codec, CS42L56_CLKCTL_1,
949 CS42L56_MCLK_DIS_MASK, 1);
950 regcache_cache_only(cs42l56->regmap, true);
951 regulator_bulk_disable(ARRAY_SIZE(cs42l56->supplies),
952 cs42l56->supplies);
953 break;
954 }
955 codec->dapm.bias_level = level;
956
957 return 0;
958}
959
960#define CS42L56_RATES (SNDRV_PCM_RATE_8000_48000)
961
962#define CS42L56_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE | \
963 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE | \
964 SNDRV_PCM_FMTBIT_S32_LE)
965
966
967static struct snd_soc_dai_ops cs42l56_ops = {
968 .hw_params = cs42l56_pcm_hw_params,
969 .digital_mute = cs42l56_digital_mute,
970 .set_fmt = cs42l56_set_dai_fmt,
971 .set_sysclk = cs42l56_set_sysclk,
972};
973
974static struct snd_soc_dai_driver cs42l56_dai = {
975 .name = "cs42l56",
976 .playback = {
977 .stream_name = "HiFi Playback",
978 .channels_min = 1,
979 .channels_max = 2,
980 .rates = CS42L56_RATES,
981 .formats = CS42L56_FORMATS,
982 },
983 .capture = {
984 .stream_name = "HiFi Capture",
985 .channels_min = 1,
986 .channels_max = 2,
987 .rates = CS42L56_RATES,
988 .formats = CS42L56_FORMATS,
989 },
990 .ops = &cs42l56_ops,
991};
992
993static int cs42l56_suspend(struct snd_soc_codec *codec)
994{
995 cs42l56_set_bias_level(codec, SND_SOC_BIAS_OFF);
996
997 return 0;
998}
999
1000static int cs42l56_resume(struct snd_soc_codec *codec)
1001{
1002 cs42l56_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1003
1004 return 0;
1005}
1006
1007static int beep_freq[] = {
1008 261, 522, 585, 667, 706, 774, 889, 1000,
1009 1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182
1010};
1011
1012static void cs42l56_beep_work(struct work_struct *work)
1013{
1014 struct cs42l56_private *cs42l56 =
1015 container_of(work, struct cs42l56_private, beep_work);
1016 struct snd_soc_codec *codec = cs42l56->codec;
1017 struct snd_soc_dapm_context *dapm = &codec->dapm;
1018 int i;
1019 int val = 0;
1020 int best = 0;
1021
1022 if (cs42l56->beep_rate) {
1023 for (i = 0; i < ARRAY_SIZE(beep_freq); i++) {
1024 if (abs(cs42l56->beep_rate - beep_freq[i]) <
1025 abs(cs42l56->beep_rate - beep_freq[best]))
1026 best = i;
1027 }
1028
1029 dev_dbg(codec->dev, "Set beep rate %dHz for requested %dHz\n",
1030 beep_freq[best], cs42l56->beep_rate);
1031
1032 val = (best << CS42L56_BEEP_RATE_SHIFT);
1033
1034 snd_soc_dapm_enable_pin(dapm, "Beep");
1035 } else {
1036 dev_dbg(codec->dev, "Disabling beep\n");
1037 snd_soc_dapm_disable_pin(dapm, "Beep");
1038 }
1039
1040 snd_soc_update_bits(codec, CS42L56_BEEP_FREQ_ONTIME,
1041 CS42L56_BEEP_FREQ_MASK, val);
1042
1043 snd_soc_dapm_sync(dapm);
1044}
1045
1046/* For usability define a way of injecting beep events for the device -
1047 * many systems will not have a keyboard.
1048 */
1049static int cs42l56_beep_event(struct input_dev *dev, unsigned int type,
1050 unsigned int code, int hz)
1051{
1052 struct snd_soc_codec *codec = input_get_drvdata(dev);
1053 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
1054
1055 dev_dbg(codec->dev, "Beep event %x %x\n", code, hz);
1056
1057 switch (code) {
1058 case SND_BELL:
1059 if (hz)
1060 hz = 261;
1061 case SND_TONE:
1062 break;
1063 default:
1064 return -1;
1065 }
1066
1067 /* Kick the beep from a workqueue */
1068 cs42l56->beep_rate = hz;
1069 schedule_work(&cs42l56->beep_work);
1070 return 0;
1071}
1072
1073static ssize_t cs42l56_beep_set(struct device *dev,
1074 struct device_attribute *attr,
1075 const char *buf, size_t count)
1076{
1077 struct cs42l56_private *cs42l56 = dev_get_drvdata(dev);
1078 long int time;
1079 int ret;
1080
1081 ret = kstrtol(buf, 10, &time);
1082 if (ret != 0)
1083 return ret;
1084
1085 input_event(cs42l56->beep, EV_SND, SND_TONE, time);
1086
1087 return count;
1088}
1089
1090static DEVICE_ATTR(beep, 0200, NULL, cs42l56_beep_set);
1091
1092static void cs42l56_init_beep(struct snd_soc_codec *codec)
1093{
1094 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
1095 int ret;
1096
1097 cs42l56->beep = devm_input_allocate_device(codec->dev);
1098 if (!cs42l56->beep) {
1099 dev_err(codec->dev, "Failed to allocate beep device\n");
1100 return;
1101 }
1102
1103 INIT_WORK(&cs42l56->beep_work, cs42l56_beep_work);
1104 cs42l56->beep_rate = 0;
1105
1106 cs42l56->beep->name = "CS42L56 Beep Generator";
1107 cs42l56->beep->phys = dev_name(codec->dev);
1108 cs42l56->beep->id.bustype = BUS_I2C;
1109
1110 cs42l56->beep->evbit[0] = BIT_MASK(EV_SND);
1111 cs42l56->beep->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE);
1112 cs42l56->beep->event = cs42l56_beep_event;
1113 cs42l56->beep->dev.parent = codec->dev;
1114 input_set_drvdata(cs42l56->beep, codec);
1115
1116 ret = input_register_device(cs42l56->beep);
1117 if (ret != 0) {
1118 cs42l56->beep = NULL;
1119 dev_err(codec->dev, "Failed to register beep device\n");
1120 }
1121
1122 ret = device_create_file(codec->dev, &dev_attr_beep);
1123 if (ret != 0) {
1124 dev_err(codec->dev, "Failed to create keyclick file: %d\n",
1125 ret);
1126 }
1127}
1128
1129static void cs42l56_free_beep(struct snd_soc_codec *codec)
1130{
1131 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
1132
1133 device_remove_file(codec->dev, &dev_attr_beep);
1134 cancel_work_sync(&cs42l56->beep_work);
1135 cs42l56->beep = NULL;
1136
1137 snd_soc_update_bits(codec, CS42L56_BEEP_TONE_CFG,
1138 CS42L56_BEEP_EN_MASK, 0);
1139}
1140
1141static int cs42l56_probe(struct snd_soc_codec *codec)
1142{
1143 cs42l56_init_beep(codec);
1144
1145 cs42l56_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1146
1147 return 0;
1148}
1149
1150static int cs42l56_remove(struct snd_soc_codec *codec)
1151{
1152 struct cs42l56_private *cs42l56 = snd_soc_codec_get_drvdata(codec);
1153
1154 cs42l56_free_beep(codec);
1155 cs42l56_set_bias_level(codec, SND_SOC_BIAS_OFF);
1156 regulator_bulk_free(ARRAY_SIZE(cs42l56->supplies), cs42l56->supplies);
1157
1158 return 0;
1159}
1160
1161static struct snd_soc_codec_driver soc_codec_dev_cs42l56 = {
1162 .probe = cs42l56_probe,
1163 .remove = cs42l56_remove,
1164 .suspend = cs42l56_suspend,
1165 .resume = cs42l56_resume,
1166 .set_bias_level = cs42l56_set_bias_level,
1167
1168 .dapm_widgets = cs42l56_dapm_widgets,
1169 .num_dapm_widgets = ARRAY_SIZE(cs42l56_dapm_widgets),
1170 .dapm_routes = cs42l56_audio_map,
1171 .num_dapm_routes = ARRAY_SIZE(cs42l56_audio_map),
1172
1173 .controls = cs42l56_snd_controls,
1174 .num_controls = ARRAY_SIZE(cs42l56_snd_controls),
1175};
1176
1177static struct regmap_config cs42l56_regmap = {
1178 .reg_bits = 8,
1179 .val_bits = 8,
1180
1181 .max_register = CS42L56_MAX_REGISTER,
1182 .reg_defaults = cs42l56_reg_defaults,
1183 .num_reg_defaults = ARRAY_SIZE(cs42l56_reg_defaults),
1184 .readable_reg = cs42l56_readable_register,
1185 .volatile_reg = cs42l56_volatile_register,
1186 .cache_type = REGCACHE_RBTREE,
1187};
1188
1189static int cs42l56_handle_of_data(struct i2c_client *i2c_client,
1190 struct cs42l56_platform_data *pdata)
1191{
1192 struct device_node *np = i2c_client->dev.of_node;
1193 u32 val32;
1194
1195 if (of_property_read_bool(np, "cirrus,ain1a-reference-cfg"))
1196 pdata->ain1a_ref_cfg = true;
1197
1198 if (of_property_read_bool(np, "cirrus,ain2a-reference-cfg"))
1199 pdata->ain2a_ref_cfg = true;
1200
1201 if (of_property_read_bool(np, "cirrus,ain1b-reference-cfg"))
1202 pdata->ain1b_ref_cfg = true;
1203
1204 if (of_property_read_bool(np, "cirrus,ain2b-reference-cfg"))
1205 pdata->ain2b_ref_cfg = true;
1206
1207 if (of_property_read_u32(np, "cirrus,micbias-lvl", &val32) >= 0)
1208 pdata->micbias_lvl = val32;
1209
1210 if (of_property_read_u32(np, "cirrus,chgfreq-divisor", &val32) >= 0)
1211 pdata->chgfreq = val32;
1212
1213 if (of_property_read_u32(np, "cirrus,adaptive-pwr-cfg", &val32) >= 0)
1214 pdata->adaptive_pwr = val32;
1215
1216 if (of_property_read_u32(np, "cirrus,hpf-left-freq", &val32) >= 0)
1217 pdata->hpfa_freq = val32;
1218
1219 if (of_property_read_u32(np, "cirrus,hpf-left-freq", &val32) >= 0)
1220 pdata->hpfb_freq = val32;
1221
1222 pdata->gpio_nreset = of_get_named_gpio(np, "cirrus,gpio-nreset", 0);
1223
1224 return 0;
1225}
1226
1227static int cs42l56_i2c_probe(struct i2c_client *i2c_client,
1228 const struct i2c_device_id *id)
1229{
1230 struct cs42l56_private *cs42l56;
1231 struct cs42l56_platform_data *pdata =
1232 dev_get_platdata(&i2c_client->dev);
1233 int ret, i;
1234 unsigned int devid = 0;
1235 unsigned int alpha_rev, metal_rev;
1236 unsigned int reg;
1237
1238 cs42l56 = devm_kzalloc(&i2c_client->dev,
1239 sizeof(struct cs42l56_private),
1240 GFP_KERNEL);
1241 if (cs42l56 == NULL)
1242 return -ENOMEM;
1243 cs42l56->dev = &i2c_client->dev;
1244
1245 cs42l56->regmap = devm_regmap_init_i2c(i2c_client, &cs42l56_regmap);
1246 if (IS_ERR(cs42l56->regmap)) {
1247 ret = PTR_ERR(cs42l56->regmap);
1248 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
1249 return ret;
1250 }
1251
1252 if (pdata) {
1253 cs42l56->pdata = *pdata;
1254 } else {
1255 pdata = devm_kzalloc(&i2c_client->dev,
1256 sizeof(struct cs42l56_platform_data),
1257 GFP_KERNEL);
1258 if (!pdata) {
1259 dev_err(&i2c_client->dev,
1260 "could not allocate pdata\n");
1261 return -ENOMEM;
1262 }
1263 if (i2c_client->dev.of_node) {
1264 ret = cs42l56_handle_of_data(i2c_client,
1265 &cs42l56->pdata);
1266 if (ret != 0)
1267 return ret;
1268 }
1269 cs42l56->pdata = *pdata;
1270 }
1271
1272 if (cs42l56->pdata.gpio_nreset) {
1273 ret = gpio_request_one(cs42l56->pdata.gpio_nreset,
1274 GPIOF_OUT_INIT_HIGH, "CS42L56 /RST");
1275 if (ret < 0) {
1276 dev_err(&i2c_client->dev,
1277 "Failed to request /RST %d: %d\n",
1278 cs42l56->pdata.gpio_nreset, ret);
1279 return ret;
1280 }
1281 gpio_set_value_cansleep(cs42l56->pdata.gpio_nreset, 0);
1282 gpio_set_value_cansleep(cs42l56->pdata.gpio_nreset, 1);
1283 }
1284
1285
1286 i2c_set_clientdata(i2c_client, cs42l56);
1287
1288 for (i = 0; i < ARRAY_SIZE(cs42l56->supplies); i++)
1289 cs42l56->supplies[i].supply = cs42l56_supply_names[i];
1290
1291 ret = devm_regulator_bulk_get(&i2c_client->dev,
1292 ARRAY_SIZE(cs42l56->supplies),
1293 cs42l56->supplies);
1294 if (ret != 0) {
1295 dev_err(&i2c_client->dev,
1296 "Failed to request supplies: %d\n", ret);
1297 return ret;
1298 }
1299
1300 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l56->supplies),
1301 cs42l56->supplies);
1302 if (ret != 0) {
1303 dev_err(&i2c_client->dev,
1304 "Failed to enable supplies: %d\n", ret);
1305 return ret;
1306 }
1307
1308 regcache_cache_bypass(cs42l56->regmap, true);
1309
1310 ret = regmap_read(cs42l56->regmap, CS42L56_CHIP_ID_1, &reg);
1311 devid = reg & CS42L56_CHIP_ID_MASK;
1312 if (devid != CS42L56_DEVID) {
1313 dev_err(&i2c_client->dev,
1314 "CS42L56 Device ID (%X). Expected %X\n",
1315 devid, CS42L56_DEVID);
1316 goto err_enable;
1317 }
1318 alpha_rev = reg & CS42L56_AREV_MASK;
1319 metal_rev = reg & CS42L56_MTLREV_MASK;
1320
1321 dev_info(&i2c_client->dev, "Cirrus Logic CS42L56 ");
1322 dev_info(&i2c_client->dev, "Alpha Rev %X Metal Rev %X\n",
1323 alpha_rev, metal_rev);
1324
1325 regcache_cache_bypass(cs42l56->regmap, false);
1326
1327 if (cs42l56->pdata.ain1a_ref_cfg)
1328 regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
1329 CS42L56_AIN1A_REF_MASK, 1);
1330
1331 if (cs42l56->pdata.ain1b_ref_cfg)
1332 regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
1333 CS42L56_AIN1B_REF_MASK, 1);
1334
1335 if (cs42l56->pdata.ain2a_ref_cfg)
1336 regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
1337 CS42L56_AIN2A_REF_MASK, 1);
1338
1339 if (cs42l56->pdata.ain2b_ref_cfg)
1340 regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,
1341 CS42L56_AIN2B_REF_MASK, 1);
1342
1343 if (cs42l56->pdata.micbias_lvl)
1344 regmap_update_bits(cs42l56->regmap, CS42L56_GAIN_BIAS_CTL,
1345 CS42L56_MIC_BIAS_MASK,
1346 cs42l56->pdata.micbias_lvl);
1347
1348 if (cs42l56->pdata.chgfreq)
1349 regmap_update_bits(cs42l56->regmap, CS42L56_CLASSH_CTL,
1350 CS42L56_CHRG_FREQ_MASK,
1351 cs42l56->pdata.chgfreq);
1352
1353 if (cs42l56->pdata.hpfb_freq)
1354 regmap_update_bits(cs42l56->regmap, CS42L56_HPF_CTL,
1355 CS42L56_HPFB_FREQ_MASK,
1356 cs42l56->pdata.hpfb_freq);
1357
1358 if (cs42l56->pdata.hpfa_freq)
1359 regmap_update_bits(cs42l56->regmap, CS42L56_HPF_CTL,
1360 CS42L56_HPFA_FREQ_MASK,
1361 cs42l56->pdata.hpfa_freq);
1362
1363 if (cs42l56->pdata.adaptive_pwr)
1364 regmap_update_bits(cs42l56->regmap, CS42L56_CLASSH_CTL,
1365 CS42L56_ADAPT_PWR_MASK,
1366 cs42l56->pdata.adaptive_pwr);
1367
1368 ret = snd_soc_register_codec(&i2c_client->dev,
1369 &soc_codec_dev_cs42l56, &cs42l56_dai, 1);
1370 if (ret < 0)
1371 return ret;
1372
1373 return 0;
1374
1375err_enable:
1376 regulator_bulk_disable(ARRAY_SIZE(cs42l56->supplies),
1377 cs42l56->supplies);
1378 return ret;
1379}
1380
1381static int cs42l56_i2c_remove(struct i2c_client *client)
1382{
1383 struct cs42l56_private *cs42l56 = i2c_get_clientdata(client);
1384
1385 snd_soc_unregister_codec(&client->dev);
1386 regulator_bulk_disable(ARRAY_SIZE(cs42l56->supplies),
1387 cs42l56->supplies);
1388 return 0;
1389}
1390
1391static const struct of_device_id cs42l56_of_match[] = {
1392 { .compatible = "cirrus,cs42l56", },
1393 { }
1394};
1395MODULE_DEVICE_TABLE(of, cs42l56_of_match);
1396
1397
1398static const struct i2c_device_id cs42l56_id[] = {
1399 { "cs42l56", 0 },
1400 { }
1401};
1402MODULE_DEVICE_TABLE(i2c, cs42l56_id);
1403
1404static struct i2c_driver cs42l56_i2c_driver = {
1405 .driver = {
1406 .name = "cs42l56",
1407 .owner = THIS_MODULE,
1408 .of_match_table = cs42l56_of_match,
1409 },
1410 .id_table = cs42l56_id,
1411 .probe = cs42l56_i2c_probe,
1412 .remove = cs42l56_i2c_remove,
1413};
1414
1415module_i2c_driver(cs42l56_i2c_driver);
1416
1417MODULE_DESCRIPTION("ASoC CS42L56 driver");
1418MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
1419MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/cs42l56.h b/sound/soc/codecs/cs42l56.h
new file mode 100644
index 000000000000..5025ec9be9b2
--- /dev/null
+++ b/sound/soc/codecs/cs42l56.h
@@ -0,0 +1,177 @@
1/*
2 * cs42l52.h -- CS42L56 ALSA SoC audio driver
3 *
4 * Copyright 2014 CirrusLogic, Inc.
5 *
6 * Author: Brian Austin <brian.austin@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#ifndef __CS42L56_H__
15#define __CS42L56_H__
16
17#define CS42L56_CHIP_ID_1 0x01
18#define CS42L56_CHIP_ID_2 0x02
19#define CS42L56_PWRCTL_1 0x03
20#define CS42L56_PWRCTL_2 0x04
21#define CS42L56_CLKCTL_1 0x05
22#define CS42L56_CLKCTL_2 0x06
23#define CS42L56_SERIAL_FMT 0x07
24#define CS42L56_CLASSH_CTL 0x08
25#define CS42L56_MISC_CTL 0x09
26#define CS42L56_INT_STATUS 0x0a
27#define CS42L56_PLAYBACK_CTL 0x0b
28#define CS42L56_DSP_MUTE_CTL 0x0c
29#define CS42L56_ADCA_MIX_VOLUME 0x0d
30#define CS42L56_ADCB_MIX_VOLUME 0x0e
31#define CS42L56_PCMA_MIX_VOLUME 0x0f
32#define CS42L56_PCMB_MIX_VOLUME 0x10
33#define CS42L56_ANAINPUT_ADV_VOLUME 0x11
34#define CS42L56_DIGINPUT_ADV_VOLUME 0x12
35#define CS42L56_MASTER_A_VOLUME 0x13
36#define CS42L56_MASTER_B_VOLUME 0x14
37#define CS42L56_BEEP_FREQ_ONTIME 0x15
38#define CS42L56_BEEP_FREQ_OFFTIME 0x16
39#define CS42L56_BEEP_TONE_CFG 0x17
40#define CS42L56_TONE_CTL 0x18
41#define CS42L56_CHAN_MIX_SWAP 0x19
42#define CS42L56_AIN_REFCFG_ADC_MUX 0x1a
43#define CS42L56_HPF_CTL 0x1b
44#define CS42L56_MISC_ADC_CTL 0x1c
45#define CS42L56_GAIN_BIAS_CTL 0x1d
46#define CS42L56_PGAA_MUX_VOLUME 0x1e
47#define CS42L56_PGAB_MUX_VOLUME 0x1f
48#define CS42L56_ADCA_ATTENUATOR 0x20
49#define CS42L56_ADCB_ATTENUATOR 0x21
50#define CS42L56_ALC_EN_ATTACK_RATE 0x22
51#define CS42L56_ALC_RELEASE_RATE 0x23
52#define CS42L56_ALC_THRESHOLD 0x24
53#define CS42L56_NOISE_GATE_CTL 0x25
54#define CS42L56_ALC_LIM_SFT_ZC 0x26
55#define CS42L56_AMUTE_HPLO_MUX 0x27
56#define CS42L56_HPA_VOLUME 0x28
57#define CS42L56_HPB_VOLUME 0x29
58#define CS42L56_LOA_VOLUME 0x2a
59#define CS42L56_LOB_VOLUME 0x2b
60#define CS42L56_LIM_THRESHOLD_CTL 0x2c
61#define CS42L56_LIM_CTL_RELEASE_RATE 0x2d
62#define CS42L56_LIM_ATTACK_RATE 0x2e
63
64/* Device ID and Rev ID Masks */
65#define CS42L56_DEVID 0x56
66#define CS42L56_CHIP_ID_MASK 0xff
67#define CS42L56_AREV_MASK 0x1c
68#define CS42L56_MTLREV_MASK 0x03
69
70/* Power bit masks */
71#define CS42L56_PDN_ALL_MASK 0x01
72#define CS42L56_PDN_ADCA_MASK 0x02
73#define CS42L56_PDN_ADCB_MASK 0x04
74#define CS42L56_PDN_CHRG_MASK 0x08
75#define CS42L56_PDN_BIAS_MASK 0x10
76#define CS42L56_PDN_VBUF_MASK 0x20
77#define CS42L56_PDN_LOA_MASK 0x03
78#define CS42L56_PDN_LOB_MASK 0x0c
79#define CS42L56_PDN_HPA_MASK 0x30
80#define CS42L56_PDN_HPB_MASK 0xc0
81
82/* serial port and clk masks */
83#define CS42L56_MASTER_MODE 0x40
84#define CS42L56_SLAVE_MODE 0
85#define CS42L56_MS_MODE_MASK 0x40
86#define CS42L56_SCLK_INV 0x20
87#define CS42L56_SCLK_INV_MASK 0x20
88#define CS42L56_SCLK_MCLK_MASK 0x18
89#define CS42L56_MCLK_PREDIV 0x04
90#define CS42L56_MCLK_PREDIV_MASK 0x04
91#define CS42L56_MCLK_DIV2 0x02
92#define CS42L56_MCLK_DIV2_MASK 0x02
93#define CS42L56_MCLK_DIS_MASK 0x01
94#define CS42L56_CLK_AUTO_MASK 0x20
95#define CS42L56_CLK_RATIO_MASK 0x1f
96#define CS42L56_DIG_FMT_I2S 0
97#define CS42L56_DIG_FMT_LEFT_J 0x08
98#define CS42L56_DIG_FMT_MASK 0x08
99
100/* Class H and misc ctl masks */
101#define CS42L56_ADAPT_PWR_MASK 0xc0
102#define CS42L56_CHRG_FREQ_MASK 0x0f
103#define CS42L56_DIG_MUX_MASK 0x80
104#define CS42L56_ANLGSFT_MASK 0x10
105#define CS42L56_ANLGZC_MASK 0x08
106#define CS42L56_DIGSFT_MASK 0x04
107#define CS42L56_FREEZE_MASK 0x01
108#define CS42L56_MIC_BIAS_MASK 0x03
109#define CS42L56_HPFA_FREQ_MASK 0x03
110#define CS42L56_HPFB_FREQ_MASK 0xc0
111#define CS42L56_AIN1A_REF_MASK 0x10
112#define CS42L56_AIN2A_REF_MASK 0x40
113#define CS42L56_AIN1B_REF_MASK 0x20
114#define CS42L56_AIN2B_REF_MASK 0x80
115
116/* Playback Capture ctl masks */
117#define CS42L56_PDN_DSP_MASK 0x80
118#define CS42L56_DEEMPH_MASK 0x40
119#define CS42L56_PLYBCK_GANG_MASK 0x10
120#define CS42L56_PCM_INV_MASK 0x0c
121#define CS42L56_MUTE_ALL 0xff
122#define CS42L56_UNMUTE 0
123#define CS42L56_ADCAMIX_MUTE_MASK 0x40
124#define CS42L56_ADCBMIX_MUTE_MASK 0x80
125#define CS42L56_PCMAMIX_MUTE_MASK 0x10
126#define CS42L56_PCMBMIX_MUTE_MASK 0x20
127#define CS42L56_MSTB_MUTE_MASK 0x02
128#define CS42L56_MSTA_MUTE_MASK 0x01
129#define CS42L56_ADCA_MUTE_MASK 0x01
130#define CS42L56_ADCB_MUTE_MASK 0x02
131#define CS42L56_HP_MUTE_MASK 0x80
132#define CS42L56_LO_MUTE_MASK 0x80
133
134/* Beep masks */
135#define CS42L56_BEEP_FREQ_MASK 0xf0
136#define CS42L56_BEEP_ONTIME_MASK 0x0f
137#define CS42L56_BEEP_OFFTIME_MASK 0xe0
138#define CS42L56_BEEP_CFG_MASK 0xc0
139#define CS42L56_BEEP_TREBCF_MASK 0x18
140#define CS42L56_BEEP_BASSCF_MASK 0x06
141#define CS42L56_BEEP_TCEN_MASK 0x01
142#define CS42L56_BEEP_RATE_SHIFT 4
143#define CS42L56_BEEP_EN_MASK 0x3f
144
145
146/* Supported MCLKS */
147#define CS42L56_MCLK_5P6448MHZ 5644800
148#define CS42L56_MCLK_6MHZ 6000000
149#define CS42L56_MCLK_6P144MHZ 6144000
150#define CS42L56_MCLK_11P2896MHZ 11289600
151#define CS42L56_MCLK_12MHZ 12000000
152#define CS42L56_MCLK_12P288MHZ 12288000
153#define CS42L56_MCLK_22P5792MHZ 22579200
154#define CS42L56_MCLK_24MHZ 24000000
155#define CS42L56_MCLK_24P576MHZ 24576000
156
157/* Clock ratios */
158#define CS42L56_MCLK_LRCLK_128 0x08
159#define CS42L56_MCLK_LRCLK_125 0x09
160#define CS42L56_MCLK_LRCLK_136 0x0b
161#define CS42L56_MCLK_LRCLK_192 0x0c
162#define CS42L56_MCLK_LRCLK_187P5 0x0d
163#define CS42L56_MCLK_LRCLK_256 0x10
164#define CS42L56_MCLK_LRCLK_250 0x11
165#define CS42L56_MCLK_LRCLK_272 0x13
166#define CS42L56_MCLK_LRCLK_384 0x14
167#define CS42L56_MCLK_LRCLK_375 0x15
168#define CS42L56_MCLK_LRCLK_512 0x18
169#define CS42L56_MCLK_LRCLK_500 0x19
170#define CS42L56_MCLK_LRCLK_544 0x1b
171#define CS42L56_MCLK_LRCLK_750 0x1c
172#define CS42L56_MCLK_LRCLK_768 0x1d
173
174
175#define CS42L56_MAX_REGISTER 0x34
176
177#endif
diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c
index 0ee60a19a263..ae3717992d56 100644
--- a/sound/soc/codecs/cs42l73.c
+++ b/sound/soc/codecs/cs42l73.c
@@ -1443,8 +1443,10 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
1443 i2c_set_clientdata(i2c_client, cs42l73); 1443 i2c_set_clientdata(i2c_client, cs42l73);
1444 1444
1445 if (cs42l73->pdata.reset_gpio) { 1445 if (cs42l73->pdata.reset_gpio) {
1446 ret = gpio_request_one(cs42l73->pdata.reset_gpio, 1446 ret = devm_gpio_request_one(&i2c_client->dev,
1447 GPIOF_OUT_INIT_HIGH, "CS42L73 /RST"); 1447 cs42l73->pdata.reset_gpio,
1448 GPIOF_OUT_INIT_HIGH,
1449 "CS42L73 /RST");
1448 if (ret < 0) { 1450 if (ret < 0) {
1449 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", 1451 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
1450 cs42l73->pdata.reset_gpio, ret); 1452 cs42l73->pdata.reset_gpio, ret);
diff --git a/sound/soc/codecs/cs42xx8.c b/sound/soc/codecs/cs42xx8.c
index 85020322eee7..a25bc6061a30 100644
--- a/sound/soc/codecs/cs42xx8.c
+++ b/sound/soc/codecs/cs42xx8.c
@@ -248,8 +248,7 @@ static int cs42xx8_hw_params(struct snd_pcm_substream *substream,
248 struct snd_pcm_hw_params *params, 248 struct snd_pcm_hw_params *params,
249 struct snd_soc_dai *dai) 249 struct snd_soc_dai *dai)
250{ 250{
251 struct snd_soc_pcm_runtime *rtd = substream->private_data; 251 struct snd_soc_codec *codec = dai->codec;
252 struct snd_soc_codec *codec = rtd->codec;
253 struct cs42xx8_priv *cs42xx8 = snd_soc_codec_get_drvdata(codec); 252 struct cs42xx8_priv *cs42xx8 = snd_soc_codec_get_drvdata(codec);
254 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 253 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
255 u32 ratio = cs42xx8->sysclk / params_rate(params); 254 u32 ratio = cs42xx8->sysclk / params_rate(params);
diff --git a/sound/soc/codecs/da7210.c b/sound/soc/codecs/da7210.c
index 137e8ebc092c..21810e5f3321 100644
--- a/sound/soc/codecs/da7210.c
+++ b/sound/soc/codecs/da7210.c
@@ -335,7 +335,7 @@ static SOC_ENUM_SINGLE_DECL(da7210_hp_mode_sel,
335static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol, 335static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
336 struct snd_ctl_elem_value *ucontrol) 336 struct snd_ctl_elem_value *ucontrol)
337{ 337{
338 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 338 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
339 339
340 if (ucontrol->value.integer.value[0]) { 340 if (ucontrol->value.integer.value[0]) {
341 /* Check if noise suppression is enabled */ 341 /* Check if noise suppression is enabled */
@@ -358,7 +358,7 @@ static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
358static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol, 358static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,
359 struct snd_ctl_elem_value *ucontrol) 359 struct snd_ctl_elem_value *ucontrol)
360{ 360{
361 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 361 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
362 u8 val; 362 u8 val;
363 363
364 if (ucontrol->value.integer.value[0]) { 364 if (ucontrol->value.integer.value[0]) {
diff --git a/sound/soc/codecs/da7213.c b/sound/soc/codecs/da7213.c
index 738fa18a50d2..9ec577f0edb4 100644
--- a/sound/soc/codecs/da7213.c
+++ b/sound/soc/codecs/da7213.c
@@ -345,7 +345,7 @@ static void da7213_alc_calib(struct snd_soc_codec *codec)
345static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol, 345static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
346 struct snd_ctl_elem_value *ucontrol) 346 struct snd_ctl_elem_value *ucontrol)
347{ 347{
348 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 348 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
349 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec); 349 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
350 int ret; 350 int ret;
351 351
@@ -361,7 +361,7 @@ static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
361static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol, 361static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
362 struct snd_ctl_elem_value *ucontrol) 362 struct snd_ctl_elem_value *ucontrol)
363{ 363{
364 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 364 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
365 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec); 365 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
366 366
367 /* Force ALC offset calibration if enabling ALC */ 367 /* Force ALC offset calibration if enabling ALC */
diff --git a/sound/soc/codecs/da732x.c b/sound/soc/codecs/da732x.c
index 48f3fef68484..2fae31cb0067 100644
--- a/sound/soc/codecs/da732x.c
+++ b/sound/soc/codecs/da732x.c
@@ -332,7 +332,7 @@ static SOC_ENUM_SINGLE_DECL(da732x_adc2_voice_filter_enum,
332static int da732x_hpf_set(struct snd_kcontrol *kcontrol, 332static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
333 struct snd_ctl_elem_value *ucontrol) 333 struct snd_ctl_elem_value *ucontrol)
334{ 334{
335 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 335 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
336 struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value; 336 struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
337 unsigned int reg = enum_ctrl->reg; 337 unsigned int reg = enum_ctrl->reg;
338 unsigned int sel = ucontrol->value.integer.value[0]; 338 unsigned int sel = ucontrol->value.integer.value[0];
@@ -360,7 +360,7 @@ static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
360static int da732x_hpf_get(struct snd_kcontrol *kcontrol, 360static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
361 struct snd_ctl_elem_value *ucontrol) 361 struct snd_ctl_elem_value *ucontrol)
362{ 362{
363 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 363 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
364 struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value; 364 struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
365 unsigned int reg = enum_ctrl->reg; 365 unsigned int reg = enum_ctrl->reg;
366 int val; 366 int val;
diff --git a/sound/soc/codecs/da9055.c b/sound/soc/codecs/da9055.c
index 4ff06b50fbba..ad19cc56702b 100644
--- a/sound/soc/codecs/da9055.c
+++ b/sound/soc/codecs/da9055.c
@@ -484,7 +484,7 @@ static int da9055_get_alc_data(struct snd_soc_codec *codec, u8 reg_val)
484static int da9055_put_alc_sw(struct snd_kcontrol *kcontrol, 484static int da9055_put_alc_sw(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_value *ucontrol) 485 struct snd_ctl_elem_value *ucontrol)
486{ 486{
487 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 487 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
488 u8 reg_val, adc_left, adc_right, mic_left, mic_right; 488 u8 reg_val, adc_left, adc_right, mic_left, mic_right;
489 int avg_left_data, avg_right_data, offset_l, offset_r; 489 int avg_left_data, avg_right_data, offset_l, offset_r;
490 490
diff --git a/sound/soc/codecs/hdmi.c b/sound/soc/codecs/hdmi.c
index 9cb1c7d3e1dc..1087fd5f9917 100644
--- a/sound/soc/codecs/hdmi.c
+++ b/sound/soc/codecs/hdmi.c
@@ -20,6 +20,7 @@
20 */ 20 */
21#include <linux/module.h> 21#include <linux/module.h>
22#include <sound/soc.h> 22#include <sound/soc.h>
23#include <linux/of.h>
23#include <linux/of_device.h> 24#include <linux/of_device.h>
24 25
25#define DRV_NAME "hdmi-audio-codec" 26#define DRV_NAME "hdmi-audio-codec"
diff --git a/sound/soc/codecs/lm4857.c b/sound/soc/codecs/lm4857.c
index 4f048db9f55f..a924bb9d7886 100644
--- a/sound/soc/codecs/lm4857.c
+++ b/sound/soc/codecs/lm4857.c
@@ -49,7 +49,7 @@ static const struct reg_default lm4857_default_regs[] = {
49static int lm4857_get_mode(struct snd_kcontrol *kcontrol, 49static int lm4857_get_mode(struct snd_kcontrol *kcontrol,
50 struct snd_ctl_elem_value *ucontrol) 50 struct snd_ctl_elem_value *ucontrol)
51{ 51{
52 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 52 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
53 struct lm4857 *lm4857 = snd_soc_codec_get_drvdata(codec); 53 struct lm4857 *lm4857 = snd_soc_codec_get_drvdata(codec);
54 54
55 ucontrol->value.integer.value[0] = lm4857->mode; 55 ucontrol->value.integer.value[0] = lm4857->mode;
@@ -60,7 +60,7 @@ static int lm4857_get_mode(struct snd_kcontrol *kcontrol,
60static int lm4857_set_mode(struct snd_kcontrol *kcontrol, 60static int lm4857_set_mode(struct snd_kcontrol *kcontrol,
61 struct snd_ctl_elem_value *ucontrol) 61 struct snd_ctl_elem_value *ucontrol)
62{ 62{
63 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 63 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
64 struct lm4857 *lm4857 = snd_soc_codec_get_drvdata(codec); 64 struct lm4857 *lm4857 = snd_soc_codec_get_drvdata(codec);
65 uint8_t value = ucontrol->value.integer.value[0]; 65 uint8_t value = ucontrol->value.integer.value[0];
66 66
diff --git a/sound/soc/codecs/max9768.c b/sound/soc/codecs/max9768.c
index ec481fc428c7..e1c196a41930 100644
--- a/sound/soc/codecs/max9768.c
+++ b/sound/soc/codecs/max9768.c
@@ -43,7 +43,7 @@ static struct reg_default max9768_default_regs[] = {
43static int max9768_get_gpio(struct snd_kcontrol *kcontrol, 43static int max9768_get_gpio(struct snd_kcontrol *kcontrol,
44 struct snd_ctl_elem_value *ucontrol) 44 struct snd_ctl_elem_value *ucontrol)
45{ 45{
46 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 46 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
47 struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec); 47 struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec);
48 int val = gpio_get_value_cansleep(max9768->mute_gpio); 48 int val = gpio_get_value_cansleep(max9768->mute_gpio);
49 49
@@ -55,7 +55,7 @@ static int max9768_get_gpio(struct snd_kcontrol *kcontrol,
55static int max9768_set_gpio(struct snd_kcontrol *kcontrol, 55static int max9768_set_gpio(struct snd_kcontrol *kcontrol,
56 struct snd_ctl_elem_value *ucontrol) 56 struct snd_ctl_elem_value *ucontrol)
57{ 57{
58 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 58 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
59 struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec); 59 struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec);
60 60
61 gpio_set_value_cansleep(max9768->mute_gpio, !ucontrol->value.integer.value[0]); 61 gpio_set_value_cansleep(max9768->mute_gpio, !ucontrol->value.integer.value[0]);
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c
index ef7cf89f5623..9134982807b5 100644
--- a/sound/soc/codecs/max98088.c
+++ b/sound/soc/codecs/max98088.c
@@ -635,7 +635,7 @@ static SOC_ENUM_SINGLE_DECL(max98088_dai1_adc_filter_enum,
635static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol, 635static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_value *ucontrol) 636 struct snd_ctl_elem_value *ucontrol)
637{ 637{
638 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 638 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
639 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 639 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
640 unsigned int sel = ucontrol->value.integer.value[0]; 640 unsigned int sel = ucontrol->value.integer.value[0];
641 641
@@ -649,7 +649,7 @@ static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol,
649static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol, 649static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol,
650 struct snd_ctl_elem_value *ucontrol) 650 struct snd_ctl_elem_value *ucontrol)
651{ 651{
652 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 652 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
653 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 653 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
654 654
655 ucontrol->value.integer.value[0] = max98088->mic1pre; 655 ucontrol->value.integer.value[0] = max98088->mic1pre;
@@ -659,7 +659,7 @@ static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol,
659static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol, 659static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol,
660 struct snd_ctl_elem_value *ucontrol) 660 struct snd_ctl_elem_value *ucontrol)
661{ 661{
662 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 662 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
663 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 663 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
664 unsigned int sel = ucontrol->value.integer.value[0]; 664 unsigned int sel = ucontrol->value.integer.value[0];
665 665
@@ -673,7 +673,7 @@ static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol,
673static int max98088_mic2pre_get(struct snd_kcontrol *kcontrol, 673static int max98088_mic2pre_get(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol) 674 struct snd_ctl_elem_value *ucontrol)
675{ 675{
676 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 676 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
677 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 677 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
678 678
679 ucontrol->value.integer.value[0] = max98088->mic2pre; 679 ucontrol->value.integer.value[0] = max98088->mic2pre;
@@ -1750,7 +1750,7 @@ static void max98088_setup_eq2(struct snd_soc_codec *codec)
1750static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol, 1750static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol,
1751 struct snd_ctl_elem_value *ucontrol) 1751 struct snd_ctl_elem_value *ucontrol)
1752{ 1752{
1753 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1753 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1754 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 1754 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
1755 struct max98088_pdata *pdata = max98088->pdata; 1755 struct max98088_pdata *pdata = max98088->pdata;
1756 int channel = max98088_get_channel(codec, kcontrol->id.name); 1756 int channel = max98088_get_channel(codec, kcontrol->id.name);
@@ -1782,7 +1782,7 @@ static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol,
1782static int max98088_get_eq_enum(struct snd_kcontrol *kcontrol, 1782static int max98088_get_eq_enum(struct snd_kcontrol *kcontrol,
1783 struct snd_ctl_elem_value *ucontrol) 1783 struct snd_ctl_elem_value *ucontrol)
1784{ 1784{
1785 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1785 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1786 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 1786 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
1787 int channel = max98088_get_channel(codec, kcontrol->id.name); 1787 int channel = max98088_get_channel(codec, kcontrol->id.name);
1788 struct max98088_cdata *cdata; 1788 struct max98088_cdata *cdata;
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index f7b0b37aa858..f5fccc7a8e89 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -11,10 +11,13 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/i2c.h> 12#include <linux/i2c.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/of.h>
14#include <linux/pm.h> 15#include <linux/pm.h>
15#include <linux/pm_runtime.h> 16#include <linux/pm_runtime.h>
16#include <linux/regmap.h> 17#include <linux/regmap.h>
17#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/acpi.h>
20#include <linux/clk.h>
18#include <sound/jack.h> 21#include <sound/jack.h>
19#include <sound/pcm.h> 22#include <sound/pcm.h>
20#include <sound/pcm_params.h> 23#include <sound/pcm_params.h>
@@ -255,6 +258,7 @@ static struct reg_default max98090_reg[] = {
255static bool max98090_volatile_register(struct device *dev, unsigned int reg) 258static bool max98090_volatile_register(struct device *dev, unsigned int reg)
256{ 259{
257 switch (reg) { 260 switch (reg) {
261 case M98090_REG_SOFTWARE_RESET:
258 case M98090_REG_DEVICE_STATUS: 262 case M98090_REG_DEVICE_STATUS:
259 case M98090_REG_JACK_STATUS: 263 case M98090_REG_JACK_STATUS:
260 case M98090_REG_REVISION_ID: 264 case M98090_REG_REVISION_ID:
@@ -389,6 +393,7 @@ static const DECLARE_TLV_DB_SCALE(max98090_alc_tlv, -1500, 100, 0);
389static const DECLARE_TLV_DB_SCALE(max98090_alcmakeup_tlv, 0, 100, 0); 393static const DECLARE_TLV_DB_SCALE(max98090_alcmakeup_tlv, 0, 100, 0);
390static const DECLARE_TLV_DB_SCALE(max98090_alccomp_tlv, -3100, 100, 0); 394static const DECLARE_TLV_DB_SCALE(max98090_alccomp_tlv, -3100, 100, 0);
391static const DECLARE_TLV_DB_SCALE(max98090_drcexp_tlv, -6600, 100, 0); 395static const DECLARE_TLV_DB_SCALE(max98090_drcexp_tlv, -6600, 100, 0);
396static const DECLARE_TLV_DB_SCALE(max98090_sdg_tlv, 50, 200, 0);
392 397
393static const unsigned int max98090_mixout_tlv[] = { 398static const unsigned int max98090_mixout_tlv[] = {
394 TLV_DB_RANGE_HEAD(2), 399 TLV_DB_RANGE_HEAD(2),
@@ -426,7 +431,7 @@ static const unsigned int max98090_rcv_lout_tlv[] = {
426static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol, 431static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol) 432 struct snd_ctl_elem_value *ucontrol)
428{ 433{
429 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 434 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
430 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec); 435 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
431 struct soc_mixer_control *mc = 436 struct soc_mixer_control *mc =
432 (struct soc_mixer_control *)kcontrol->private_value; 437 (struct soc_mixer_control *)kcontrol->private_value;
@@ -466,7 +471,7 @@ static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol,
466static int max98090_put_enab_tlv(struct snd_kcontrol *kcontrol, 471static int max98090_put_enab_tlv(struct snd_kcontrol *kcontrol,
467 struct snd_ctl_elem_value *ucontrol) 472 struct snd_ctl_elem_value *ucontrol)
468{ 473{
469 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 474 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
470 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec); 475 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
471 struct soc_mixer_control *mc = 476 struct soc_mixer_control *mc =
472 (struct soc_mixer_control *)kcontrol->private_value; 477 (struct soc_mixer_control *)kcontrol->private_value;
@@ -665,7 +670,7 @@ static const struct snd_kcontrol_new max98090_snd_controls[] = {
665 SOC_SINGLE_EXT_TLV("Digital Sidetone Volume", 670 SOC_SINGLE_EXT_TLV("Digital Sidetone Volume",
666 M98090_REG_ADC_SIDETONE, M98090_DVST_SHIFT, 671 M98090_REG_ADC_SIDETONE, M98090_DVST_SHIFT,
667 M98090_DVST_NUM - 1, 1, max98090_get_enab_tlv, 672 M98090_DVST_NUM - 1, 1, max98090_get_enab_tlv,
668 max98090_put_enab_tlv, max98090_micboost_tlv), 673 max98090_put_enab_tlv, max98090_sdg_tlv),
669 SOC_SINGLE_TLV("Digital Coarse Volume", M98090_REG_DAI_PLAYBACK_LEVEL, 674 SOC_SINGLE_TLV("Digital Coarse Volume", M98090_REG_DAI_PLAYBACK_LEVEL,
670 M98090_DVG_SHIFT, M98090_DVG_NUM - 1, 0, 675 M98090_DVG_SHIFT, M98090_DVG_NUM - 1, 0,
671 max98090_dvg_tlv), 676 max98090_dvg_tlv),
@@ -875,7 +880,7 @@ static const char *dmic_mux_text[] = { "ADC", "DMIC" };
875static SOC_ENUM_SINGLE_VIRT_DECL(dmic_mux_enum, dmic_mux_text); 880static SOC_ENUM_SINGLE_VIRT_DECL(dmic_mux_enum, dmic_mux_text);
876 881
877static const struct snd_kcontrol_new max98090_dmic_mux = 882static const struct snd_kcontrol_new max98090_dmic_mux =
878 SOC_DAPM_ENUM_VIRT("DMIC Mux", dmic_mux_enum); 883 SOC_DAPM_ENUM("DMIC Mux", dmic_mux_enum);
879 884
880static const char *max98090_micpre_text[] = { "Off", "On" }; 885static const char *max98090_micpre_text[] = { "Off", "On" };
881 886
@@ -1175,8 +1180,7 @@ static const struct snd_soc_dapm_widget max98090_dapm_widgets[] = {
1175 SND_SOC_DAPM_MUX("MIC2 Mux", SND_SOC_NOPM, 1180 SND_SOC_DAPM_MUX("MIC2 Mux", SND_SOC_NOPM,
1176 0, 0, &max98090_mic2_mux), 1181 0, 0, &max98090_mic2_mux),
1177 1182
1178 SND_SOC_DAPM_VIRT_MUX("DMIC Mux", SND_SOC_NOPM, 1183 SND_SOC_DAPM_MUX("DMIC Mux", SND_SOC_NOPM, 0, 0, &max98090_dmic_mux),
1179 0, 0, &max98090_dmic_mux),
1180 1184
1181 SND_SOC_DAPM_PGA_E("MIC1 Input", M98090_REG_MIC1_INPUT_LEVEL, 1185 SND_SOC_DAPM_PGA_E("MIC1 Input", M98090_REG_MIC1_INPUT_LEVEL,
1182 M98090_MIC_PA1EN_SHIFT, 0, NULL, 0, max98090_micinput_event, 1186 M98090_MIC_PA1EN_SHIFT, 0, NULL, 0, max98090_micinput_event,
@@ -1544,19 +1548,19 @@ static const int lrclk_rates[] = {
1544}; 1548};
1545 1549
1546static const int user_pclk_rates[] = { 1550static const int user_pclk_rates[] = {
1547 13000000, 13000000 1551 13000000, 13000000, 19200000, 19200000,
1548}; 1552};
1549 1553
1550static const int user_lrclk_rates[] = { 1554static const int user_lrclk_rates[] = {
1551 44100, 48000 1555 44100, 48000, 44100, 48000,
1552}; 1556};
1553 1557
1554static const unsigned long long ni_value[] = { 1558static const unsigned long long ni_value[] = {
1555 3528, 768 1559 3528, 768, 441, 8
1556}; 1560};
1557 1561
1558static const unsigned long long mi_value[] = { 1562static const unsigned long long mi_value[] = {
1559 8125, 1625 1563 8125, 1625, 1500, 25
1560}; 1564};
1561 1565
1562static void max98090_configure_bclk(struct snd_soc_codec *codec) 1566static void max98090_configure_bclk(struct snd_soc_codec *codec)
@@ -1673,6 +1677,7 @@ static int max98090_dai_set_fmt(struct snd_soc_dai *codec_dai,
1673 M98090_REG_CLOCK_RATIO_NI_LSB, 0x00); 1677 M98090_REG_CLOCK_RATIO_NI_LSB, 0x00);
1674 snd_soc_update_bits(codec, M98090_REG_CLOCK_MODE, 1678 snd_soc_update_bits(codec, M98090_REG_CLOCK_MODE,
1675 M98090_USE_M1_MASK, 0); 1679 M98090_USE_M1_MASK, 0);
1680 max98090->master = false;
1676 break; 1681 break;
1677 case SND_SOC_DAIFMT_CBM_CFM: 1682 case SND_SOC_DAIFMT_CBM_CFM:
1678 /* Set to master mode */ 1683 /* Set to master mode */
@@ -1689,6 +1694,7 @@ static int max98090_dai_set_fmt(struct snd_soc_dai *codec_dai,
1689 regval |= M98090_MAS_MASK | 1694 regval |= M98090_MAS_MASK |
1690 M98090_BSEL_32; 1695 M98090_BSEL_32;
1691 } 1696 }
1697 max98090->master = true;
1692 break; 1698 break;
1693 case SND_SOC_DAIFMT_CBS_CFM: 1699 case SND_SOC_DAIFMT_CBS_CFM:
1694 case SND_SOC_DAIFMT_CBM_CFS: 1700 case SND_SOC_DAIFMT_CBM_CFS:
@@ -1792,16 +1798,22 @@ static int max98090_set_bias_level(struct snd_soc_codec *codec,
1792 1798
1793 switch (level) { 1799 switch (level) {
1794 case SND_SOC_BIAS_ON: 1800 case SND_SOC_BIAS_ON:
1795 if (max98090->jack_state == M98090_JACK_STATE_HEADSET) {
1796 /*
1797 * Set to normal bias level.
1798 */
1799 snd_soc_update_bits(codec, M98090_REG_MIC_BIAS_VOLTAGE,
1800 M98090_MBVSEL_MASK, M98090_MBVSEL_2V8);
1801 }
1802 break; 1801 break;
1803 1802
1804 case SND_SOC_BIAS_PREPARE: 1803 case SND_SOC_BIAS_PREPARE:
1804 /*
1805 * SND_SOC_BIAS_PREPARE is called while preparing for a
1806 * transition to ON or away from ON. If current bias_level
1807 * is SND_SOC_BIAS_ON, then it is preparing for a transition
1808 * away from ON. Disable the clock in that case, otherwise
1809 * enable it.
1810 */
1811 if (!IS_ERR(max98090->mclk)) {
1812 if (codec->dapm.bias_level == SND_SOC_BIAS_ON)
1813 clk_disable_unprepare(max98090->mclk);
1814 else
1815 clk_prepare_enable(max98090->mclk);
1816 }
1805 break; 1817 break;
1806 1818
1807 case SND_SOC_BIAS_STANDBY: 1819 case SND_SOC_BIAS_STANDBY:
@@ -1872,7 +1884,8 @@ static int max98090_dai_hw_params(struct snd_pcm_substream *substream,
1872 return -EINVAL; 1884 return -EINVAL;
1873 } 1885 }
1874 1886
1875 max98090_configure_bclk(codec); 1887 if (max98090->master)
1888 max98090_configure_bclk(codec);
1876 1889
1877 cdata->rate = max98090->lrclk; 1890 cdata->rate = max98090->lrclk;
1878 1891
@@ -1930,6 +1943,11 @@ static int max98090_dai_set_sysclk(struct snd_soc_dai *dai,
1930 if (freq == max98090->sysclk) 1943 if (freq == max98090->sysclk)
1931 return 0; 1944 return 0;
1932 1945
1946 if (!IS_ERR(max98090->mclk)) {
1947 freq = clk_round_rate(max98090->mclk, freq);
1948 clk_set_rate(max98090->mclk, freq);
1949 }
1950
1933 /* Setup clocks for slave mode, and using the PLL 1951 /* Setup clocks for slave mode, and using the PLL
1934 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz) 1952 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
1935 * 0x02 (when master clk is 20MHz to 40MHz).. 1953 * 0x02 (when master clk is 20MHz to 40MHz)..
@@ -1951,8 +1969,6 @@ static int max98090_dai_set_sysclk(struct snd_soc_dai *dai,
1951 1969
1952 max98090->sysclk = freq; 1970 max98090->sysclk = freq;
1953 1971
1954 max98090_configure_bclk(codec);
1955
1956 return 0; 1972 return 0;
1957} 1973}
1958 1974
@@ -2216,6 +2232,10 @@ static int max98090_probe(struct snd_soc_codec *codec)
2216 2232
2217 dev_dbg(codec->dev, "max98090_probe\n"); 2233 dev_dbg(codec->dev, "max98090_probe\n");
2218 2234
2235 max98090->mclk = devm_clk_get(codec->dev, "mclk");
2236 if (PTR_ERR(max98090->mclk) == -EPROBE_DEFER)
2237 return -EPROBE_DEFER;
2238
2219 max98090->codec = codec; 2239 max98090->codec = codec;
2220 2240
2221 /* Reset the codec, the DSP core, and disable all interrupts */ 2241 /* Reset the codec, the DSP core, and disable all interrupts */
@@ -2224,6 +2244,7 @@ static int max98090_probe(struct snd_soc_codec *codec)
2224 /* Initialize private data */ 2244 /* Initialize private data */
2225 2245
2226 max98090->sysclk = (unsigned)-1; 2246 max98090->sysclk = (unsigned)-1;
2247 max98090->master = false;
2227 2248
2228 cdata = &max98090->dai[0]; 2249 cdata = &max98090->dai[0];
2229 cdata->rate = (unsigned)-1; 2250 cdata->rate = (unsigned)-1;
@@ -2293,6 +2314,9 @@ static int max98090_probe(struct snd_soc_codec *codec)
2293 snd_soc_write(codec, M98090_REG_BIAS_CONTROL, 2314 snd_soc_write(codec, M98090_REG_BIAS_CONTROL,
2294 M98090_VCM_MODE_MASK); 2315 M98090_VCM_MODE_MASK);
2295 2316
2317 snd_soc_update_bits(codec, M98090_REG_MIC_BIAS_VOLTAGE,
2318 M98090_MBVSEL_MASK, M98090_MBVSEL_2V8);
2319
2296 max98090_handle_pdata(codec); 2320 max98090_handle_pdata(codec);
2297 2321
2298 max98090_add_widgets(codec); 2322 max98090_add_widgets(codec);
@@ -2329,9 +2353,11 @@ static const struct regmap_config max98090_regmap = {
2329}; 2353};
2330 2354
2331static int max98090_i2c_probe(struct i2c_client *i2c, 2355static int max98090_i2c_probe(struct i2c_client *i2c,
2332 const struct i2c_device_id *id) 2356 const struct i2c_device_id *i2c_id)
2333{ 2357{
2334 struct max98090_priv *max98090; 2358 struct max98090_priv *max98090;
2359 const struct acpi_device_id *acpi_id;
2360 kernel_ulong_t driver_data = 0;
2335 int ret; 2361 int ret;
2336 2362
2337 pr_debug("max98090_i2c_probe\n"); 2363 pr_debug("max98090_i2c_probe\n");
@@ -2341,7 +2367,19 @@ static int max98090_i2c_probe(struct i2c_client *i2c,
2341 if (max98090 == NULL) 2367 if (max98090 == NULL)
2342 return -ENOMEM; 2368 return -ENOMEM;
2343 2369
2344 max98090->devtype = id->driver_data; 2370 if (ACPI_HANDLE(&i2c->dev)) {
2371 acpi_id = acpi_match_device(i2c->dev.driver->acpi_match_table,
2372 &i2c->dev);
2373 if (!acpi_id) {
2374 dev_err(&i2c->dev, "No driver data\n");
2375 return -EINVAL;
2376 }
2377 driver_data = acpi_id->driver_data;
2378 } else if (i2c_id) {
2379 driver_data = i2c_id->driver_data;
2380 }
2381
2382 max98090->devtype = driver_data;
2345 i2c_set_clientdata(i2c, max98090); 2383 i2c_set_clientdata(i2c, max98090);
2346 max98090->pdata = i2c->dev.platform_data; 2384 max98090->pdata = i2c->dev.platform_data;
2347 max98090->irq = i2c->irq; 2385 max98090->irq = i2c->irq;
@@ -2373,6 +2411,8 @@ static int max98090_runtime_resume(struct device *dev)
2373 2411
2374 regcache_cache_only(max98090->regmap, false); 2412 regcache_cache_only(max98090->regmap, false);
2375 2413
2414 max98090_reset(max98090);
2415
2376 regcache_sync(max98090->regmap); 2416 regcache_sync(max98090->regmap);
2377 2417
2378 return 0; 2418 return 0;
@@ -2388,9 +2428,34 @@ static int max98090_runtime_suspend(struct device *dev)
2388} 2428}
2389#endif 2429#endif
2390 2430
2431#ifdef CONFIG_PM
2432static int max98090_resume(struct device *dev)
2433{
2434 struct max98090_priv *max98090 = dev_get_drvdata(dev);
2435 unsigned int status;
2436
2437 regcache_mark_dirty(max98090->regmap);
2438
2439 max98090_reset(max98090);
2440
2441 /* clear IRQ status */
2442 regmap_read(max98090->regmap, M98090_REG_DEVICE_STATUS, &status);
2443
2444 regcache_sync(max98090->regmap);
2445
2446 return 0;
2447}
2448
2449static int max98090_suspend(struct device *dev)
2450{
2451 return 0;
2452}
2453#endif
2454
2391static const struct dev_pm_ops max98090_pm = { 2455static const struct dev_pm_ops max98090_pm = {
2392 SET_RUNTIME_PM_OPS(max98090_runtime_suspend, 2456 SET_RUNTIME_PM_OPS(max98090_runtime_suspend,
2393 max98090_runtime_resume, NULL) 2457 max98090_runtime_resume, NULL)
2458 SET_SYSTEM_SLEEP_PM_OPS(max98090_suspend, max98090_resume)
2394}; 2459};
2395 2460
2396static const struct i2c_device_id max98090_i2c_id[] = { 2461static const struct i2c_device_id max98090_i2c_id[] = {
@@ -2405,12 +2470,21 @@ static const struct of_device_id max98090_of_match[] = {
2405}; 2470};
2406MODULE_DEVICE_TABLE(of, max98090_of_match); 2471MODULE_DEVICE_TABLE(of, max98090_of_match);
2407 2472
2473#ifdef CONFIG_ACPI
2474static struct acpi_device_id max98090_acpi_match[] = {
2475 { "193C9890", MAX98090 },
2476 { }
2477};
2478MODULE_DEVICE_TABLE(acpi, max98090_acpi_match);
2479#endif
2480
2408static struct i2c_driver max98090_i2c_driver = { 2481static struct i2c_driver max98090_i2c_driver = {
2409 .driver = { 2482 .driver = {
2410 .name = "max98090", 2483 .name = "max98090",
2411 .owner = THIS_MODULE, 2484 .owner = THIS_MODULE,
2412 .pm = &max98090_pm, 2485 .pm = &max98090_pm,
2413 .of_match_table = of_match_ptr(max98090_of_match), 2486 .of_match_table = of_match_ptr(max98090_of_match),
2487 .acpi_match_table = ACPI_PTR(max98090_acpi_match),
2414 }, 2488 },
2415 .probe = max98090_i2c_probe, 2489 .probe = max98090_i2c_probe,
2416 .remove = max98090_i2c_remove, 2490 .remove = max98090_i2c_remove,
diff --git a/sound/soc/codecs/max98090.h b/sound/soc/codecs/max98090.h
index 1a4e2334a7b2..cf1b6062ba8c 100644
--- a/sound/soc/codecs/max98090.h
+++ b/sound/soc/codecs/max98090.h
@@ -1524,6 +1524,7 @@ struct max98090_priv {
1524 struct snd_soc_codec *codec; 1524 struct snd_soc_codec *codec;
1525 enum max98090_type devtype; 1525 enum max98090_type devtype;
1526 struct max98090_pdata *pdata; 1526 struct max98090_pdata *pdata;
1527 struct clk *mclk;
1527 unsigned int sysclk; 1528 unsigned int sysclk;
1528 unsigned int bclk; 1529 unsigned int bclk;
1529 unsigned int lrclk; 1530 unsigned int lrclk;
@@ -1540,6 +1541,7 @@ struct max98090_priv {
1540 unsigned int pa2en; 1541 unsigned int pa2en;
1541 unsigned int extmic_mux; 1542 unsigned int extmic_mux;
1542 unsigned int sidetone; 1543 unsigned int sidetone;
1544 bool master;
1543}; 1545};
1544 1546
1545int max98090_mic_detect(struct snd_soc_codec *codec, 1547int max98090_mic_detect(struct snd_soc_codec *codec,
diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c
index 03f0536e6f61..89ec00424880 100644
--- a/sound/soc/codecs/max98095.c
+++ b/sound/soc/codecs/max98095.c
@@ -15,6 +15,7 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/pm.h> 16#include <linux/pm.h>
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/clk.h>
18#include <sound/core.h> 19#include <sound/core.h>
19#include <sound/pcm.h> 20#include <sound/pcm.h>
20#include <sound/pcm_params.h> 21#include <sound/pcm_params.h>
@@ -42,6 +43,7 @@ struct max98095_priv {
42 struct regmap *regmap; 43 struct regmap *regmap;
43 enum max98095_type devtype; 44 enum max98095_type devtype;
44 struct max98095_pdata *pdata; 45 struct max98095_pdata *pdata;
46 struct clk *mclk;
45 unsigned int sysclk; 47 unsigned int sysclk;
46 struct max98095_cdata dai[3]; 48 struct max98095_cdata dai[3];
47 const char **eq_texts; 49 const char **eq_texts;
@@ -612,7 +614,7 @@ static SOC_ENUM_SINGLE_DECL(max98095_dai3_dac_filter_enum,
612static int max98095_mic1pre_set(struct snd_kcontrol *kcontrol, 614static int max98095_mic1pre_set(struct snd_kcontrol *kcontrol,
613 struct snd_ctl_elem_value *ucontrol) 615 struct snd_ctl_elem_value *ucontrol)
614{ 616{
615 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 617 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
616 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 618 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
617 unsigned int sel = ucontrol->value.integer.value[0]; 619 unsigned int sel = ucontrol->value.integer.value[0];
618 620
@@ -626,7 +628,7 @@ static int max98095_mic1pre_set(struct snd_kcontrol *kcontrol,
626static int max98095_mic1pre_get(struct snd_kcontrol *kcontrol, 628static int max98095_mic1pre_get(struct snd_kcontrol *kcontrol,
627 struct snd_ctl_elem_value *ucontrol) 629 struct snd_ctl_elem_value *ucontrol)
628{ 630{
629 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 631 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
630 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 632 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
631 633
632 ucontrol->value.integer.value[0] = max98095->mic1pre; 634 ucontrol->value.integer.value[0] = max98095->mic1pre;
@@ -636,7 +638,7 @@ static int max98095_mic1pre_get(struct snd_kcontrol *kcontrol,
636static int max98095_mic2pre_set(struct snd_kcontrol *kcontrol, 638static int max98095_mic2pre_set(struct snd_kcontrol *kcontrol,
637 struct snd_ctl_elem_value *ucontrol) 639 struct snd_ctl_elem_value *ucontrol)
638{ 640{
639 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 641 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
640 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 642 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
641 unsigned int sel = ucontrol->value.integer.value[0]; 643 unsigned int sel = ucontrol->value.integer.value[0];
642 644
@@ -650,7 +652,7 @@ static int max98095_mic2pre_set(struct snd_kcontrol *kcontrol,
650static int max98095_mic2pre_get(struct snd_kcontrol *kcontrol, 652static int max98095_mic2pre_get(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol) 653 struct snd_ctl_elem_value *ucontrol)
652{ 654{
653 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 655 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
654 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 656 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
655 657
656 ucontrol->value.integer.value[0] = max98095->mic2pre; 658 ucontrol->value.integer.value[0] = max98095->mic2pre;
@@ -1395,6 +1397,11 @@ static int max98095_dai_set_sysclk(struct snd_soc_dai *dai,
1395 if (freq == max98095->sysclk) 1397 if (freq == max98095->sysclk)
1396 return 0; 1398 return 0;
1397 1399
1400 if (!IS_ERR(max98095->mclk)) {
1401 freq = clk_round_rate(max98095->mclk, freq);
1402 clk_set_rate(max98095->mclk, freq);
1403 }
1404
1398 /* Setup clocks for slave mode, and using the PLL 1405 /* Setup clocks for slave mode, and using the PLL
1399 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz) 1406 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
1400 * 0x02 (when master clk is 20MHz to 40MHz).. 1407 * 0x02 (when master clk is 20MHz to 40MHz)..
@@ -1634,6 +1641,19 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec,
1634 break; 1641 break;
1635 1642
1636 case SND_SOC_BIAS_PREPARE: 1643 case SND_SOC_BIAS_PREPARE:
1644 /*
1645 * SND_SOC_BIAS_PREPARE is called while preparing for a
1646 * transition to ON or away from ON. If current bias_level
1647 * is SND_SOC_BIAS_ON, then it is preparing for a transition
1648 * away from ON. Disable the clock in that case, otherwise
1649 * enable it.
1650 */
1651 if (!IS_ERR(max98095->mclk)) {
1652 if (codec->dapm.bias_level == SND_SOC_BIAS_ON)
1653 clk_disable_unprepare(max98095->mclk);
1654 else
1655 clk_prepare_enable(max98095->mclk);
1656 }
1637 break; 1657 break;
1638 1658
1639 case SND_SOC_BIAS_STANDBY: 1659 case SND_SOC_BIAS_STANDBY:
@@ -1737,7 +1757,7 @@ static int max98095_get_eq_channel(const char *name)
1737static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol, 1757static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol,
1738 struct snd_ctl_elem_value *ucontrol) 1758 struct snd_ctl_elem_value *ucontrol)
1739{ 1759{
1740 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1760 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1741 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 1761 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1742 struct max98095_pdata *pdata = max98095->pdata; 1762 struct max98095_pdata *pdata = max98095->pdata;
1743 int channel = max98095_get_eq_channel(kcontrol->id.name); 1763 int channel = max98095_get_eq_channel(kcontrol->id.name);
@@ -1801,7 +1821,7 @@ static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol,
1801static int max98095_get_eq_enum(struct snd_kcontrol *kcontrol, 1821static int max98095_get_eq_enum(struct snd_kcontrol *kcontrol,
1802 struct snd_ctl_elem_value *ucontrol) 1822 struct snd_ctl_elem_value *ucontrol)
1803{ 1823{
1804 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1824 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1805 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 1825 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1806 int channel = max98095_get_eq_channel(kcontrol->id.name); 1826 int channel = max98095_get_eq_channel(kcontrol->id.name);
1807 struct max98095_cdata *cdata; 1827 struct max98095_cdata *cdata;
@@ -1891,7 +1911,7 @@ static int max98095_get_bq_channel(struct snd_soc_codec *codec,
1891static int max98095_put_bq_enum(struct snd_kcontrol *kcontrol, 1911static int max98095_put_bq_enum(struct snd_kcontrol *kcontrol,
1892 struct snd_ctl_elem_value *ucontrol) 1912 struct snd_ctl_elem_value *ucontrol)
1893{ 1913{
1894 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1914 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1895 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 1915 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1896 struct max98095_pdata *pdata = max98095->pdata; 1916 struct max98095_pdata *pdata = max98095->pdata;
1897 int channel = max98095_get_bq_channel(codec, kcontrol->id.name); 1917 int channel = max98095_get_bq_channel(codec, kcontrol->id.name);
@@ -1952,7 +1972,7 @@ static int max98095_put_bq_enum(struct snd_kcontrol *kcontrol,
1952static int max98095_get_bq_enum(struct snd_kcontrol *kcontrol, 1972static int max98095_get_bq_enum(struct snd_kcontrol *kcontrol,
1953 struct snd_ctl_elem_value *ucontrol) 1973 struct snd_ctl_elem_value *ucontrol)
1954{ 1974{
1955 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1975 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1956 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 1976 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1957 int channel = max98095_get_bq_channel(codec, kcontrol->id.name); 1977 int channel = max98095_get_bq_channel(codec, kcontrol->id.name);
1958 struct max98095_cdata *cdata; 1978 struct max98095_cdata *cdata;
@@ -2238,6 +2258,10 @@ static int max98095_probe(struct snd_soc_codec *codec)
2238 struct i2c_client *client; 2258 struct i2c_client *client;
2239 int ret = 0; 2259 int ret = 0;
2240 2260
2261 max98095->mclk = devm_clk_get(codec->dev, "mclk");
2262 if (PTR_ERR(max98095->mclk) == -EPROBE_DEFER)
2263 return -EPROBE_DEFER;
2264
2241 /* reset the codec, the DSP core, and disable all interrupts */ 2265 /* reset the codec, the DSP core, and disable all interrupts */
2242 max98095_reset(codec); 2266 max98095_reset(codec);
2243 2267
@@ -2399,10 +2423,17 @@ static const struct i2c_device_id max98095_i2c_id[] = {
2399}; 2423};
2400MODULE_DEVICE_TABLE(i2c, max98095_i2c_id); 2424MODULE_DEVICE_TABLE(i2c, max98095_i2c_id);
2401 2425
2426static const struct of_device_id max98095_of_match[] = {
2427 { .compatible = "maxim,max98095", },
2428 { }
2429};
2430MODULE_DEVICE_TABLE(of, max98095_of_match);
2431
2402static struct i2c_driver max98095_i2c_driver = { 2432static struct i2c_driver max98095_i2c_driver = {
2403 .driver = { 2433 .driver = {
2404 .name = "max98095", 2434 .name = "max98095",
2405 .owner = THIS_MODULE, 2435 .owner = THIS_MODULE,
2436 .of_match_table = of_match_ptr(max98095_of_match),
2406 }, 2437 },
2407 .probe = max98095_i2c_probe, 2438 .probe = max98095_i2c_probe,
2408 .remove = max98095_i2c_remove, 2439 .remove = max98095_i2c_remove,
diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c
index 2c59b1fb69dc..9965277b595a 100644
--- a/sound/soc/codecs/mc13783.c
+++ b/sound/soc/codecs/mc13783.c
@@ -22,6 +22,7 @@
22 */ 22 */
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/of.h>
25#include <linux/mfd/mc13xxx.h> 26#include <linux/mfd/mc13xxx.h>
26#include <linux/slab.h> 27#include <linux/slab.h>
27#include <sound/core.h> 28#include <sound/core.h>
@@ -409,7 +410,7 @@ static const char * const adcl_enum_text[] = {
409static SOC_ENUM_SINGLE_VIRT_DECL(adcl_enum, adcl_enum_text); 410static SOC_ENUM_SINGLE_VIRT_DECL(adcl_enum, adcl_enum_text);
410 411
411static const struct snd_kcontrol_new left_input_mux = 412static const struct snd_kcontrol_new left_input_mux =
412 SOC_DAPM_ENUM_VIRT("Route", adcl_enum); 413 SOC_DAPM_ENUM("Route", adcl_enum);
413 414
414static const char * const adcr_enum_text[] = { 415static const char * const adcr_enum_text[] = {
415 "MC1R", "MC2", "RXINR", "TXIN", 416 "MC1R", "MC2", "RXINR", "TXIN",
@@ -418,7 +419,7 @@ static const char * const adcr_enum_text[] = {
418static SOC_ENUM_SINGLE_VIRT_DECL(adcr_enum, adcr_enum_text); 419static SOC_ENUM_SINGLE_VIRT_DECL(adcr_enum, adcr_enum_text);
419 420
420static const struct snd_kcontrol_new right_input_mux = 421static const struct snd_kcontrol_new right_input_mux =
421 SOC_DAPM_ENUM_VIRT("Route", adcr_enum); 422 SOC_DAPM_ENUM("Route", adcr_enum);
422 423
423static const struct snd_kcontrol_new samp_ctl = 424static const struct snd_kcontrol_new samp_ctl =
424 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0); 425 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
@@ -478,9 +479,9 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
478 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl), 479 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
479 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl), 480 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
480 481
481 SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0, 482 SND_SOC_DAPM_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
482 &left_input_mux), 483 &left_input_mux),
483 SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0, 484 SND_SOC_DAPM_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
484 &right_input_mux), 485 &right_input_mux),
485 486
486 SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0, 487 SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0,
@@ -608,14 +609,6 @@ static struct snd_kcontrol_new mc13783_control_list[] = {
608static int mc13783_probe(struct snd_soc_codec *codec) 609static int mc13783_probe(struct snd_soc_codec *codec)
609{ 610{
610 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); 611 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
611 int ret;
612
613 ret = snd_soc_codec_set_cache_io(codec,
614 dev_get_regmap(codec->dev->parent, NULL));
615 if (ret != 0) {
616 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
617 return ret;
618 }
619 612
620 /* these are the reset values */ 613 /* these are the reset values */
621 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893); 614 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
@@ -735,9 +728,15 @@ static struct snd_soc_dai_driver mc13783_dai_sync[] = {
735 } 728 }
736}; 729};
737 730
731static struct regmap *mc13783_get_regmap(struct device *dev)
732{
733 return dev_get_regmap(dev->parent, NULL);
734}
735
738static struct snd_soc_codec_driver soc_codec_dev_mc13783 = { 736static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
739 .probe = mc13783_probe, 737 .probe = mc13783_probe,
740 .remove = mc13783_remove, 738 .remove = mc13783_remove,
739 .get_regmap = mc13783_get_regmap,
741 .controls = mc13783_control_list, 740 .controls = mc13783_control_list,
742 .num_controls = ARRAY_SIZE(mc13783_control_list), 741 .num_controls = ARRAY_SIZE(mc13783_control_list),
743 .dapm_widgets = mc13783_dapm_widgets, 742 .dapm_widgets = mc13783_dapm_widgets,
@@ -750,6 +749,7 @@ static int __init mc13783_codec_probe(struct platform_device *pdev)
750{ 749{
751 struct mc13783_priv *priv; 750 struct mc13783_priv *priv;
752 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data; 751 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
752 struct device_node *np;
753 int ret; 753 int ret;
754 754
755 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 755 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
@@ -760,7 +760,17 @@ static int __init mc13783_codec_probe(struct platform_device *pdev)
760 priv->adc_ssi_port = pdata->adc_ssi_port; 760 priv->adc_ssi_port = pdata->adc_ssi_port;
761 priv->dac_ssi_port = pdata->dac_ssi_port; 761 priv->dac_ssi_port = pdata->dac_ssi_port;
762 } else { 762 } else {
763 return -ENOSYS; 763 np = of_get_child_by_name(pdev->dev.parent->of_node, "codec");
764 if (!np)
765 return -ENOSYS;
766
767 ret = of_property_read_u32(np, "adc-port", &priv->adc_ssi_port);
768 if (ret)
769 return ret;
770
771 ret = of_property_read_u32(np, "dac-port", &priv->dac_ssi_port);
772 if (ret)
773 return ret;
764 } 774 }
765 775
766 dev_set_drvdata(&pdev->dev, priv); 776 dev_set_drvdata(&pdev->dev, priv);
diff --git a/sound/soc/codecs/pcm1681.c b/sound/soc/codecs/pcm1681.c
index e427544183d7..a722a023c262 100644
--- a/sound/soc/codecs/pcm1681.c
+++ b/sound/soc/codecs/pcm1681.c
@@ -115,7 +115,7 @@ static int pcm1681_set_deemph(struct snd_soc_codec *codec)
115static int pcm1681_get_deemph(struct snd_kcontrol *kcontrol, 115static int pcm1681_get_deemph(struct snd_kcontrol *kcontrol,
116 struct snd_ctl_elem_value *ucontrol) 116 struct snd_ctl_elem_value *ucontrol)
117{ 117{
118 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 118 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
119 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec); 119 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec);
120 120
121 ucontrol->value.enumerated.item[0] = priv->deemph; 121 ucontrol->value.enumerated.item[0] = priv->deemph;
@@ -126,7 +126,7 @@ static int pcm1681_get_deemph(struct snd_kcontrol *kcontrol,
126static int pcm1681_put_deemph(struct snd_kcontrol *kcontrol, 126static int pcm1681_put_deemph(struct snd_kcontrol *kcontrol,
127 struct snd_ctl_elem_value *ucontrol) 127 struct snd_ctl_elem_value *ucontrol)
128{ 128{
129 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 129 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
130 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec); 130 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec);
131 131
132 priv->deemph = ucontrol->value.enumerated.item[0]; 132 priv->deemph = ucontrol->value.enumerated.item[0];
diff --git a/sound/soc/codecs/pcm512x.c b/sound/soc/codecs/pcm512x.c
index 4b4c0c7bb918..163ec3855fd4 100644
--- a/sound/soc/codecs/pcm512x.c
+++ b/sound/soc/codecs/pcm512x.c
@@ -269,7 +269,7 @@ SOC_DOUBLE("Playback Digital Switch", PCM512x_MUTE, PCM512x_RQML_SHIFT,
269 PCM512x_RQMR_SHIFT, 1, 1), 269 PCM512x_RQMR_SHIFT, 1, 1),
270 270
271SOC_SINGLE("Deemphasis Switch", PCM512x_DSP, PCM512x_DEMP_SHIFT, 1, 1), 271SOC_SINGLE("Deemphasis Switch", PCM512x_DSP, PCM512x_DEMP_SHIFT, 1, 1),
272SOC_VALUE_ENUM("DSP Program", pcm512x_dsp_program), 272SOC_ENUM("DSP Program", pcm512x_dsp_program),
273 273
274SOC_ENUM("Clock Missing Period", pcm512x_clk_missing), 274SOC_ENUM("Clock Missing Period", pcm512x_clk_missing),
275SOC_ENUM("Auto Mute Time Left", pcm512x_autom_l), 275SOC_ENUM("Auto Mute Time Left", pcm512x_autom_l),
@@ -517,6 +517,7 @@ void pcm512x_remove(struct device *dev)
517} 517}
518EXPORT_SYMBOL_GPL(pcm512x_remove); 518EXPORT_SYMBOL_GPL(pcm512x_remove);
519 519
520#ifdef CONFIG_PM_RUNTIME
520static int pcm512x_suspend(struct device *dev) 521static int pcm512x_suspend(struct device *dev)
521{ 522{
522 struct pcm512x_priv *pcm512x = dev_get_drvdata(dev); 523 struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
@@ -578,6 +579,7 @@ static int pcm512x_resume(struct device *dev)
578 579
579 return 0; 580 return 0;
580} 581}
582#endif
581 583
582const struct dev_pm_ops pcm512x_pm_ops = { 584const struct dev_pm_ops pcm512x_pm_ops = {
583 SET_RUNTIME_PM_OPS(pcm512x_suspend, pcm512x_resume, NULL) 585 SET_RUNTIME_PM_OPS(pcm512x_suspend, pcm512x_resume, NULL)
diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c
new file mode 100644
index 000000000000..7b82fbe0d14c
--- /dev/null
+++ b/sound/soc/codecs/rl6231.c
@@ -0,0 +1,152 @@
1/*
2 * rl6231.c - RL6231 class device shared support
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 *
6 * Author: Oder Chiou <oder_chiou@realtek.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
21#include <linux/of.h>
22#include <linux/of_gpio.h>
23#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
25#include <linux/acpi.h>
26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
34#include "rl6231.h"
35
36/**
37 * rl6231_calc_dmic_clk - Calculate the parameter of dmic.
38 *
39 * @rate: base clock rate.
40 *
41 * Choose dmic clock between 1MHz and 3MHz.
42 * It is better for clock to approximate 3MHz.
43 */
44int rl6231_calc_dmic_clk(int rate)
45{
46 int div[] = {2, 3, 4, 6, 8, 12}, idx = -EINVAL;
47 int i, red, bound, temp;
48
49 red = 3000000 * 12;
50 for (i = 0; i < ARRAY_SIZE(div); i++) {
51 bound = div[i] * 3000000;
52 if (rate > bound)
53 continue;
54 temp = bound - rate;
55 if (temp < red) {
56 red = temp;
57 idx = i;
58 }
59 }
60
61 return idx;
62}
63EXPORT_SYMBOL_GPL(rl6231_calc_dmic_clk);
64
65/**
66 * rl6231_pll_calc - Calcualte PLL M/N/K code.
67 * @freq_in: external clock provided to codec.
68 * @freq_out: target clock which codec works on.
69 * @pll_code: Pointer to structure with M, N, K and bypass flag.
70 *
71 * Calcualte M/N/K code to configure PLL for codec.
72 *
73 * Returns 0 for success or negative error code.
74 */
75int rl6231_pll_calc(const unsigned int freq_in,
76 const unsigned int freq_out, struct rl6231_pll_code *pll_code)
77{
78 int max_n = RL6231_PLL_N_MAX, max_m = RL6231_PLL_M_MAX;
79 int k, red, n_t, pll_out, in_t, out_t;
80 int n = 0, m = 0, m_t = 0;
81 int red_t = abs(freq_out - freq_in);
82 bool bypass = false;
83
84 if (RL6231_PLL_INP_MAX < freq_in || RL6231_PLL_INP_MIN > freq_in)
85 return -EINVAL;
86
87 k = 100000000 / freq_out - 2;
88 if (k > RL6231_PLL_K_MAX)
89 k = RL6231_PLL_K_MAX;
90 for (n_t = 0; n_t <= max_n; n_t++) {
91 in_t = freq_in / (k + 2);
92 pll_out = freq_out / (n_t + 2);
93 if (in_t < 0)
94 continue;
95 if (in_t == pll_out) {
96 bypass = true;
97 n = n_t;
98 goto code_find;
99 }
100 red = abs(in_t - pll_out);
101 if (red < red_t) {
102 bypass = true;
103 n = n_t;
104 m = m_t;
105 if (red == 0)
106 goto code_find;
107 red_t = red;
108 }
109 for (m_t = 0; m_t <= max_m; m_t++) {
110 out_t = in_t / (m_t + 2);
111 red = abs(out_t - pll_out);
112 if (red < red_t) {
113 bypass = false;
114 n = n_t;
115 m = m_t;
116 if (red == 0)
117 goto code_find;
118 red_t = red;
119 }
120 }
121 }
122 pr_debug("Only get approximation about PLL\n");
123
124code_find:
125
126 pll_code->m_bp = bypass;
127 pll_code->m_code = m;
128 pll_code->n_code = n;
129 pll_code->k_code = k;
130 return 0;
131}
132EXPORT_SYMBOL_GPL(rl6231_pll_calc);
133
134int rl6231_get_clk_info(int sclk, int rate)
135{
136 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
137
138 if (sclk <= 0 || rate <= 0)
139 return -EINVAL;
140
141 rate = rate << 8;
142 for (i = 0; i < ARRAY_SIZE(pd); i++)
143 if (sclk == rate * pd[i])
144 return i;
145
146 return -EINVAL;
147}
148EXPORT_SYMBOL_GPL(rl6231_get_clk_info);
149
150MODULE_DESCRIPTION("RL6231 class device shared support");
151MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
152MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rl6231.h b/sound/soc/codecs/rl6231.h
new file mode 100644
index 000000000000..0f7b057ed736
--- /dev/null
+++ b/sound/soc/codecs/rl6231.h
@@ -0,0 +1,34 @@
1/*
2 * rl6231.h - RL6231 class device shared support
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 *
6 * Author: Oder Chiou <oder_chiou@realtek.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __RL6231_H__
14#define __RL6231_H__
15
16#define RL6231_PLL_INP_MAX 40000000
17#define RL6231_PLL_INP_MIN 256000
18#define RL6231_PLL_N_MAX 0x1ff
19#define RL6231_PLL_K_MAX 0x1f
20#define RL6231_PLL_M_MAX 0xf
21
22struct rl6231_pll_code {
23 bool m_bp; /* Indicates bypass m code or not. */
24 int m_code;
25 int n_code;
26 int k_code;
27};
28
29int rl6231_calc_dmic_clk(int rate);
30int rl6231_pll_calc(const unsigned int freq_in,
31 const unsigned int freq_out, struct rl6231_pll_code *pll_code);
32int rl6231_get_clk_info(int sclk, int rate);
33
34#endif /* __RL6231_H__ */
diff --git a/sound/soc/codecs/rt5631.c b/sound/soc/codecs/rt5631.c
index d4c229f0233f..30e234708579 100644
--- a/sound/soc/codecs/rt5631.c
+++ b/sound/soc/codecs/rt5631.c
@@ -188,7 +188,7 @@ static unsigned int mic_bst_tlv[] = {
188static int rt5631_dmic_get(struct snd_kcontrol *kcontrol, 188static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol) 189 struct snd_ctl_elem_value *ucontrol)
190{ 190{
191 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 191 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
192 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); 192 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
193 193
194 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; 194 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
@@ -199,7 +199,7 @@ static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
199static int rt5631_dmic_put(struct snd_kcontrol *kcontrol, 199static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_value *ucontrol) 200 struct snd_ctl_elem_value *ucontrol)
201{ 201{
202 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 202 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
203 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); 203 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
204 204
205 rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; 205 rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c
index 68b4dd622b87..de80e89b5fd8 100644
--- a/sound/soc/codecs/rt5640.c
+++ b/sound/soc/codecs/rt5640.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver 2 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
3 * 3 *
4 * Copyright 2011 Realtek Semiconductor Corp. 4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com> 5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
@@ -18,6 +18,7 @@
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/regmap.h> 20#include <linux/regmap.h>
21#include <linux/of.h>
21#include <linux/of_gpio.h> 22#include <linux/of_gpio.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
@@ -30,6 +31,7 @@
30#include <sound/initval.h> 31#include <sound/initval.h>
31#include <sound/tlv.h> 32#include <sound/tlv.h>
32 33
34#include "rl6231.h"
33#include "rt5640.h" 35#include "rt5640.h"
34 36
35#define RT5640_DEVICE_ID 0x6231 37#define RT5640_DEVICE_ID 0x6231
@@ -59,7 +61,7 @@ static struct reg_default init_list[] = {
59}; 61};
60#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list) 62#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
61 63
62static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = { 64static const struct reg_default rt5640_reg[] = {
63 { 0x00, 0x000e }, 65 { 0x00, 0x000e },
64 { 0x01, 0xc8c8 }, 66 { 0x01, 0xc8c8 },
65 { 0x02, 0xc8c8 }, 67 { 0x02, 0xc8c8 },
@@ -398,18 +400,13 @@ static const struct snd_kcontrol_new rt5640_snd_controls[] = {
398 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1), 400 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT, 401 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv), 402 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
401 /* MONO Output Control */ 403
402 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
403 RT5640_L_MUTE_SFT, 1, 1),
404 /* DAC Digital Volume */ 404 /* DAC Digital Volume */
405 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL, 405 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
406 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1), 406 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
407 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL, 407 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
408 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 408 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
409 175, 0, dac_vol_tlv), 409 175, 0, dac_vol_tlv),
410 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
411 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
412 175, 0, dac_vol_tlv),
413 /* IN1/IN2 Control */ 410 /* IN1/IN2 Control */
414 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2, 411 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
415 RT5640_BST_SFT1, 8, 0, bst_tlv), 412 RT5640_BST_SFT1, 8, 0, bst_tlv),
@@ -441,6 +438,15 @@ static const struct snd_kcontrol_new rt5640_snd_controls[] = {
441 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum), 438 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
442}; 439};
443 440
441static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
442 /* MONO Output Control */
443 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
444 1, 1),
445
446 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
447 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
448};
449
444/** 450/**
445 * set_dmic_clk - Set parameter of dmic. 451 * set_dmic_clk - Set parameter of dmic.
446 * 452 *
@@ -448,30 +454,16 @@ static const struct snd_kcontrol_new rt5640_snd_controls[] = {
448 * @kcontrol: The kcontrol of this widget. 454 * @kcontrol: The kcontrol of this widget.
449 * @event: Event id. 455 * @event: Event id.
450 * 456 *
451 * Choose dmic clock between 1MHz and 3MHz.
452 * It is better for clock to approximate 3MHz.
453 */ 457 */
454static int set_dmic_clk(struct snd_soc_dapm_widget *w, 458static int set_dmic_clk(struct snd_soc_dapm_widget *w,
455 struct snd_kcontrol *kcontrol, int event) 459 struct snd_kcontrol *kcontrol, int event)
456{ 460{
457 struct snd_soc_codec *codec = w->codec; 461 struct snd_soc_codec *codec = w->codec;
458 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); 462 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
459 int div[] = {2, 3, 4, 6, 8, 12}; 463 int idx = -EINVAL;
460 int idx = -EINVAL, i; 464
461 int rate, red, bound, temp; 465 idx = rl6231_calc_dmic_clk(rt5640->sysclk);
462 466
463 rate = rt5640->sysclk;
464 red = 3000000 * 12;
465 for (i = 0; i < ARRAY_SIZE(div); i++) {
466 bound = div[i] * 3000000;
467 if (rate > bound)
468 continue;
469 temp = bound - rate;
470 if (temp < red) {
471 red = temp;
472 idx = i;
473 }
474 }
475 if (idx < 0) 467 if (idx < 0)
476 dev_err(codec->dev, "Failed to set DMIC clock\n"); 468 dev_err(codec->dev, "Failed to set DMIC clock\n");
477 else 469 else
@@ -480,14 +472,14 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
480 return idx; 472 return idx;
481} 473}
482 474
483static int check_sysclk1_source(struct snd_soc_dapm_widget *source, 475static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
484 struct snd_soc_dapm_widget *sink) 476 struct snd_soc_dapm_widget *sink)
485{ 477{
486 unsigned int val; 478 unsigned int val;
487 479
488 val = snd_soc_read(source->codec, RT5640_GLB_CLK); 480 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
489 val &= RT5640_SCLK_SRC_MASK; 481 val &= RT5640_SCLK_SRC_MASK;
490 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T) 482 if (val == RT5640_SCLK_SRC_PLL1)
491 return 1; 483 return 1;
492 else 484 else
493 return 0; 485 return 0;
@@ -554,6 +546,20 @@ static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
554 RT5640_M_ANC_DAC_R_SFT, 1, 1), 546 RT5640_M_ANC_DAC_R_SFT, 1, 1),
555}; 547};
556 548
549static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
550 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_DAC_L1_SFT, 1, 1),
552 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
553 RT5640_M_DAC_L2_SFT, 1, 1),
554};
555
556static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
557 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
558 RT5640_M_DAC_R1_SFT, 1, 1),
559 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
560 RT5640_M_DAC_R2_SFT, 1, 1),
561};
562
557static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = { 563static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
558 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER, 564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
559 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1), 565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
@@ -676,6 +682,30 @@ static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
676 RT5640_M_DAC_R1_OM_R_SFT, 1, 1), 682 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
677}; 683};
678 684
685static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
686 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
687 RT5640_M_BST1_OM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
689 RT5640_M_IN_L_OM_L_SFT, 1, 1),
690 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
691 RT5640_M_RM_L_OM_L_SFT, 1, 1),
692 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
693 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
694};
695
696static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
697 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
698 RT5640_M_BST4_OM_R_SFT, 1, 1),
699 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
700 RT5640_M_BST1_OM_R_SFT, 1, 1),
701 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
702 RT5640_M_IN_R_OM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
704 RT5640_M_RM_R_OM_R_SFT, 1, 1),
705 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
706 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
707};
708
679static const struct snd_kcontrol_new rt5640_spo_l_mix[] = { 709static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
680 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER, 710 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
681 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1), 711 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
@@ -707,6 +737,13 @@ static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
707 RT5640_M_HPVOL_HM_SFT, 1, 1), 737 RT5640_M_HPVOL_HM_SFT, 1, 1),
708}; 738};
709 739
740static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
741 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
742 RT5640_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
744 RT5640_M_HPVOL_HM_SFT, 1, 1),
745};
746
710static const struct snd_kcontrol_new rt5640_lout_mix[] = { 747static const struct snd_kcontrol_new rt5640_lout_mix[] = {
711 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER, 748 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
712 RT5640_M_DAC_L1_LM_SFT, 1, 1), 749 RT5640_M_DAC_L1_LM_SFT, 1, 1),
@@ -824,7 +861,7 @@ static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
824 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values); 861 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
825 862
826static const struct snd_kcontrol_new rt5640_dac_l2_mux = 863static const struct snd_kcontrol_new rt5640_dac_l2_mux =
827 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum); 864 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
828 865
829static const char * const rt5640_dac_r2_src[] = { 866static const char * const rt5640_dac_r2_src[] = {
830 "IF2", 867 "IF2",
@@ -859,7 +896,7 @@ static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
859 rt5640_dai_iis_map_values); 896 rt5640_dai_iis_map_values);
860 897
861static const struct snd_kcontrol_new rt5640_dai_mux = 898static const struct snd_kcontrol_new rt5640_dai_mux =
862 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum); 899 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
863 900
864/* SDI select */ 901/* SDI select */
865static const char * const rt5640_sdi_sel[] = { 902static const char * const rt5640_sdi_sel[] = {
@@ -872,54 +909,6 @@ static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
872static const struct snd_kcontrol_new rt5640_sdi_mux = 909static const struct snd_kcontrol_new rt5640_sdi_mux =
873 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum); 910 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
874 911
875static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
876 struct snd_kcontrol *kcontrol, int event)
877{
878 struct snd_soc_codec *codec = w->codec;
879
880 switch (event) {
881 case SND_SOC_DAPM_PRE_PMU:
882 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
883 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
884 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
885 snd_soc_update_bits(codec, RT5640_DMIC,
886 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
887 RT5640_DMIC_1_DP_MASK,
888 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
889 RT5640_DMIC_1_DP_IN1P);
890 break;
891
892 default:
893 return 0;
894 }
895
896 return 0;
897}
898
899static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
900 struct snd_kcontrol *kcontrol, int event)
901{
902 struct snd_soc_codec *codec = w->codec;
903
904 switch (event) {
905 case SND_SOC_DAPM_PRE_PMU:
906 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
907 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
908 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
909 snd_soc_update_bits(codec, RT5640_DMIC,
910 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
911 RT5640_DMIC_2_DP_MASK,
912 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
913 RT5640_DMIC_2_DP_IN1N);
914 break;
915
916 default:
917 return 0;
918 }
919
920 return 0;
921}
922
923static void hp_amp_power_on(struct snd_soc_codec *codec) 912static void hp_amp_power_on(struct snd_soc_codec *codec)
924{ 913{
925 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); 914 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
@@ -1054,12 +1043,10 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1054 1043
1055 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1044 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1056 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1045 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1057 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, 1046 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1058 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event, 1047 NULL, 0),
1059 SND_SOC_DAPM_PRE_PMU), 1048 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1060 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, 1049 NULL, 0),
1061 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
1062 SND_SOC_DAPM_PRE_PMU),
1063 /* Boost */ 1050 /* Boost */
1064 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2, 1051 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1065 RT5640_PWR_BST1_BIT, 0, NULL, 0), 1052 RT5640_PWR_BST1_BIT, 0, NULL, 0),
@@ -1146,26 +1133,15 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1146 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1133 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1147 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1134 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1148 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 1135 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1149 /* Audio DSP */ 1136
1150 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1151 /* ANC */
1152 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1153 /* Output Side */ 1137 /* Output Side */
1154 /* DAC mixer before sound effect */ 1138 /* DAC mixer before sound effect */
1155 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1139 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1156 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)), 1140 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1157 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1141 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1158 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)), 1142 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1159 /* DAC2 channel Mux */ 1143
1160 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1161 &rt5640_dac_l2_mux),
1162 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1163 &rt5640_dac_r2_mux),
1164 /* DAC Mixer */ 1144 /* DAC Mixer */
1165 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1166 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1167 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1168 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1169 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1145 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1170 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)), 1146 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1171 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1147 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
@@ -1177,21 +1153,14 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1177 /* DACs */ 1153 /* DACs */
1178 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1, 1154 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1179 RT5640_PWR_DAC_L1_BIT, 0), 1155 RT5640_PWR_DAC_L1_BIT, 0),
1180 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1181 RT5640_PWR_DAC_L2_BIT, 0),
1182 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1, 1156 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1183 RT5640_PWR_DAC_R1_BIT, 0), 1157 RT5640_PWR_DAC_R1_BIT, 0),
1184 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, 1158
1185 RT5640_PWR_DAC_R2_BIT, 0),
1186 /* SPK/OUT Mixer */ 1159 /* SPK/OUT Mixer */
1187 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT, 1160 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1188 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)), 1161 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1189 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT, 1162 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1190 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)), 1163 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1191 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1192 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1193 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1194 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1195 /* Ouput Volume */ 1164 /* Ouput Volume */
1196 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL, 1165 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1197 RT5640_PWR_SV_L_BIT, 0, NULL, 0), 1166 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
@@ -1210,16 +1179,8 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1210 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)), 1179 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1211 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 1180 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1212 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)), 1181 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1213 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1214 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1215 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1216 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1217 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0, 1182 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1218 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)), 1183 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1219 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1220 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1221 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1222 RT5640_PWR_MA_BIT, 0, NULL, 0),
1223 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 1184 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1224 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU), 1185 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1225 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1186 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
@@ -1251,10 +1212,69 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1251 SND_SOC_DAPM_OUTPUT("HPOR"), 1212 SND_SOC_DAPM_OUTPUT("HPOR"),
1252 SND_SOC_DAPM_OUTPUT("LOUTL"), 1213 SND_SOC_DAPM_OUTPUT("LOUTL"),
1253 SND_SOC_DAPM_OUTPUT("LOUTR"), 1214 SND_SOC_DAPM_OUTPUT("LOUTR"),
1215};
1216
1217static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1218 /* Audio DSP */
1219 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1220 /* ANC */
1221 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1222
1223 /* DAC2 channel Mux */
1224 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1225 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1226
1227 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1228 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1229 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1230 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1231
1232 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT,
1233 0),
1234 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT,
1235 0),
1236
1237 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1238 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1239 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1240 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1241
1242 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1243 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1244 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1245 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1246
1247 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1248 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1249 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1250 RT5640_PWR_MA_BIT, 0, NULL, 0),
1251
1254 SND_SOC_DAPM_OUTPUT("MONOP"), 1252 SND_SOC_DAPM_OUTPUT("MONOP"),
1255 SND_SOC_DAPM_OUTPUT("MONON"), 1253 SND_SOC_DAPM_OUTPUT("MONON"),
1256}; 1254};
1257 1255
1256static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1257 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1258 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1259 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1260 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1261
1262 SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1,
1263 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1264 SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1,
1265 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1266
1267 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1268 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1269 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1270 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1271
1272 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1273 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1274 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1275 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1276};
1277
1258static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { 1278static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1259 {"IN1P", NULL, "LDO2"}, 1279 {"IN1P", NULL, "LDO2"},
1260 {"IN2P", NULL, "LDO2"}, 1280 {"IN2P", NULL, "LDO2"},
@@ -1323,22 +1343,22 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1323 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"}, 1343 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1324 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"}, 1344 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1325 {"Stereo ADC MIXL", NULL, "Stereo Filter"}, 1345 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1326 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source}, 1346 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
1327 1347
1328 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"}, 1348 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1329 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"}, 1349 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1330 {"Stereo ADC MIXR", NULL, "Stereo Filter"}, 1350 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1331 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source}, 1351 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
1332 1352
1333 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"}, 1353 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1334 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"}, 1354 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1335 {"Mono ADC MIXL", NULL, "Mono Left Filter"}, 1355 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1336 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source}, 1356 {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
1337 1357
1338 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"}, 1358 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1339 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"}, 1359 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1340 {"Mono ADC MIXR", NULL, "Mono Right Filter"}, 1360 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1341 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source}, 1361 {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
1342 1362
1343 {"IF2 ADC L", NULL, "Mono ADC MIXL"}, 1363 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1344 {"IF2 ADC R", NULL, "Mono ADC MIXR"}, 1364 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
@@ -1396,71 +1416,38 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1396 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"}, 1416 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1397 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"}, 1417 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1398 1418
1399 {"ANC", NULL, "Stereo ADC MIXL"},
1400 {"ANC", NULL, "Stereo ADC MIXR"},
1401
1402 {"Audio DSP", NULL, "DAC MIXL"},
1403 {"Audio DSP", NULL, "DAC MIXR"},
1404
1405 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1406 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1407
1408 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1409
1410 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"}, 1419 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1411 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1412 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1413 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"}, 1420 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1414 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1415 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1416 1421
1417 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"}, 1422 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1418 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1419 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1420 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"}, 1423 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1421 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1422 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1423 1424
1424 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"}, 1425 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1425 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1426 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"}, 1426 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1427 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1428 1427
1429 {"DAC L1", NULL, "Stereo DAC MIXL"}, 1428 {"DAC L1", NULL, "Stereo DAC MIXL"},
1430 {"DAC L1", NULL, "PLL1", check_sysclk1_source}, 1429 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
1431 {"DAC R1", NULL, "Stereo DAC MIXR"}, 1430 {"DAC R1", NULL, "Stereo DAC MIXR"},
1432 {"DAC R1", NULL, "PLL1", check_sysclk1_source}, 1431 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
1433 {"DAC L2", NULL, "Mono DAC MIXL"},
1434 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1435 {"DAC R2", NULL, "Mono DAC MIXR"},
1436 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1437 1432
1438 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"}, 1433 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1439 {"SPK MIXL", "INL Switch", "INL VOL"}, 1434 {"SPK MIXL", "INL Switch", "INL VOL"},
1440 {"SPK MIXL", "DAC L1 Switch", "DAC L1"}, 1435 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1441 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1442 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"}, 1436 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1443 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"}, 1437 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1444 {"SPK MIXR", "INR Switch", "INR VOL"}, 1438 {"SPK MIXR", "INR Switch", "INR VOL"},
1445 {"SPK MIXR", "DAC R1 Switch", "DAC R1"}, 1439 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1446 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1447 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"}, 1440 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1448 1441
1449 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1450 {"OUT MIXL", "BST1 Switch", "BST1"}, 1442 {"OUT MIXL", "BST1 Switch", "BST1"},
1451 {"OUT MIXL", "INL Switch", "INL VOL"}, 1443 {"OUT MIXL", "INL Switch", "INL VOL"},
1452 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, 1444 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1453 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1454 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1455 {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, 1445 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1456 1446
1457 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1458 {"OUT MIXR", "BST2 Switch", "BST2"}, 1447 {"OUT MIXR", "BST2 Switch", "BST2"},
1459 {"OUT MIXR", "BST1 Switch", "BST1"}, 1448 {"OUT MIXR", "BST1 Switch", "BST1"},
1460 {"OUT MIXR", "INR Switch", "INR VOL"}, 1449 {"OUT MIXR", "INR Switch", "INR VOL"},
1461 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, 1450 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1462 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1463 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1464 {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, 1451 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1465 1452
1466 {"SPKVOL L", NULL, "SPK MIXL"}, 1453 {"SPKVOL L", NULL, "SPK MIXL"},
@@ -1479,11 +1466,9 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1479 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"}, 1466 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1480 {"SPOR MIX", "BST1 Switch", "BST1"}, 1467 {"SPOR MIX", "BST1 Switch", "BST1"},
1481 1468
1482 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1483 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"}, 1469 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1484 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"}, 1470 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1485 {"HPO MIX L", NULL, "HP L Amp"}, 1471 {"HPO MIX L", NULL, "HP L Amp"},
1486 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1487 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"}, 1472 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1488 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"}, 1473 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1489 {"HPO MIX R", NULL, "HP R Amp"}, 1474 {"HPO MIX R", NULL, "HP R Amp"},
@@ -1493,12 +1478,6 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1493 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, 1478 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1494 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, 1479 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1495 1480
1496 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1497 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1498 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1499 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1500 {"Mono MIX", "BST1 Switch", "BST1"},
1501
1502 {"HP Amp", NULL, "HPO MIX L"}, 1481 {"HP Amp", NULL, "HPO MIX L"},
1503 {"HP Amp", NULL, "HPO MIX R"}, 1482 {"HP Amp", NULL, "HPO MIX R"},
1504 1483
@@ -1523,11 +1502,82 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1523 {"HPOR", NULL, "HP R Playback"}, 1502 {"HPOR", NULL, "HP R Playback"},
1524 {"LOUTL", NULL, "LOUT MIX"}, 1503 {"LOUTL", NULL, "LOUT MIX"},
1525 {"LOUTR", NULL, "LOUT MIX"}, 1504 {"LOUTR", NULL, "LOUT MIX"},
1505};
1506
1507static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1508 {"ANC", NULL, "Stereo ADC MIXL"},
1509 {"ANC", NULL, "Stereo ADC MIXR"},
1510
1511 {"Audio DSP", NULL, "DAC MIXL"},
1512 {"Audio DSP", NULL, "DAC MIXR"},
1513
1514 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1515 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1516
1517 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1518
1519 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1520 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1521 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1522 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1523
1524 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1525 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1526
1527 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1528 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1529
1530 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1531 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1532
1533 {"DAC L2", NULL, "Mono DAC MIXL"},
1534 {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
1535 {"DAC R2", NULL, "Mono DAC MIXR"},
1536 {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
1537
1538 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1539 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1540
1541 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1542 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1543
1544 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1545 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1546
1547 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1548 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1549
1550 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1551 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1552
1553 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1554 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1555 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1556 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1557 {"Mono MIX", "BST1 Switch", "BST1"},
1558
1526 {"MONOP", NULL, "Mono MIX"}, 1559 {"MONOP", NULL, "Mono MIX"},
1527 {"MONON", NULL, "Mono MIX"}, 1560 {"MONON", NULL, "Mono MIX"},
1528 {"MONOP", NULL, "Improve MONO Amp Drv"}, 1561 {"MONOP", NULL, "Improve MONO Amp Drv"},
1529}; 1562};
1530 1563
1564static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1565 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1566 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1567
1568 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1569 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1570
1571 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1572 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1573
1574 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1575 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1576
1577 {"IF2 DAC L", NULL, "DAC L2 Filter"},
1578 {"IF2 DAC R", NULL, "DAC R2 Filter"},
1579};
1580
1531static int get_sdp_info(struct snd_soc_codec *codec, int dai_id) 1581static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1532{ 1582{
1533 int ret = 0, val; 1583 int ret = 0, val;
@@ -1576,21 +1626,6 @@ static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1576 return ret; 1626 return ret;
1577} 1627}
1578 1628
1579static int get_clk_info(int sclk, int rate)
1580{
1581 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1582
1583 if (sclk <= 0 || rate <= 0)
1584 return -EINVAL;
1585
1586 rate = rate << 8;
1587 for (i = 0; i < ARRAY_SIZE(pd); i++)
1588 if (sclk == rate * pd[i])
1589 return i;
1590
1591 return -EINVAL;
1592}
1593
1594static int rt5640_hw_params(struct snd_pcm_substream *substream, 1629static int rt5640_hw_params(struct snd_pcm_substream *substream,
1595 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 1630 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1596{ 1631{
@@ -1600,7 +1635,7 @@ static int rt5640_hw_params(struct snd_pcm_substream *substream,
1600 int dai_sel, pre_div, bclk_ms, frame_size; 1635 int dai_sel, pre_div, bclk_ms, frame_size;
1601 1636
1602 rt5640->lrck[dai->id] = params_rate(params); 1637 rt5640->lrck[dai->id] = params_rate(params);
1603 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]); 1638 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1604 if (pre_div < 0) { 1639 if (pre_div < 0) {
1605 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", 1640 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1606 rt5640->lrck[dai->id], dai->id); 1641 rt5640->lrck[dai->id], dai->id);
@@ -1622,16 +1657,16 @@ static int rt5640_hw_params(struct snd_pcm_substream *substream,
1622 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 1657 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1623 bclk_ms, pre_div, dai->id); 1658 bclk_ms, pre_div, dai->id);
1624 1659
1625 switch (params_format(params)) { 1660 switch (params_width(params)) {
1626 case SNDRV_PCM_FORMAT_S16_LE: 1661 case 16:
1627 break; 1662 break;
1628 case SNDRV_PCM_FORMAT_S20_3LE: 1663 case 20:
1629 val_len |= RT5640_I2S_DL_20; 1664 val_len |= RT5640_I2S_DL_20;
1630 break; 1665 break;
1631 case SNDRV_PCM_FORMAT_S24_LE: 1666 case 24:
1632 val_len |= RT5640_I2S_DL_24; 1667 val_len |= RT5640_I2S_DL_24;
1633 break; 1668 break;
1634 case SNDRV_PCM_FORMAT_S8: 1669 case 8:
1635 val_len |= RT5640_I2S_DL_8; 1670 val_len |= RT5640_I2S_DL_8;
1636 break; 1671 break;
1637 default: 1672 default:
@@ -1744,12 +1779,6 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1744 case RT5640_SCLK_S_PLL1: 1779 case RT5640_SCLK_S_PLL1:
1745 reg_val |= RT5640_SCLK_SRC_PLL1; 1780 reg_val |= RT5640_SCLK_SRC_PLL1;
1746 break; 1781 break;
1747 case RT5640_SCLK_S_PLL1_TK:
1748 reg_val |= RT5640_SCLK_SRC_PLL1T;
1749 break;
1750 case RT5640_SCLK_S_RCCLK:
1751 reg_val |= RT5640_SCLK_SRC_RCCLK;
1752 break;
1753 default: 1782 default:
1754 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 1783 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1755 return -EINVAL; 1784 return -EINVAL;
@@ -1763,65 +1792,12 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1763 return 0; 1792 return 0;
1764} 1793}
1765 1794
1766/**
1767 * rt5640_pll_calc - Calculate PLL M/N/K code.
1768 * @freq_in: external clock provided to codec.
1769 * @freq_out: target clock which codec works on.
1770 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1771 *
1772 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1773 * which make calculation more efficiently.
1774 *
1775 * Returns 0 for success or negative error code.
1776 */
1777static int rt5640_pll_calc(const unsigned int freq_in,
1778 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1779{
1780 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1781 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1782 int red_t = abs(freq_out - freq_in);
1783 bool bypass = false;
1784
1785 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1786 return -EINVAL;
1787
1788 for (n_t = 0; n_t <= max_n; n_t++) {
1789 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1790 if (in_t < 0)
1791 continue;
1792 if (in_t == freq_out) {
1793 bypass = true;
1794 n = n_t;
1795 goto code_find;
1796 }
1797 for (m_t = 0; m_t <= max_m; m_t++) {
1798 out_t = in_t / (m_t + 2);
1799 red = abs(out_t - freq_out);
1800 if (red < red_t) {
1801 n = n_t;
1802 m = m_t;
1803 if (red == 0)
1804 goto code_find;
1805 red_t = red;
1806 }
1807 }
1808 }
1809 pr_debug("Only get approximation about PLL\n");
1810
1811code_find:
1812 pll_code->m_bp = bypass;
1813 pll_code->m_code = m;
1814 pll_code->n_code = n;
1815 pll_code->k_code = 2;
1816 return 0;
1817}
1818
1819static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 1795static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1820 unsigned int freq_in, unsigned int freq_out) 1796 unsigned int freq_in, unsigned int freq_out)
1821{ 1797{
1822 struct snd_soc_codec *codec = dai->codec; 1798 struct snd_soc_codec *codec = dai->codec;
1823 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); 1799 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1824 struct rt5640_pll_code *pll_code = &rt5640->pll_code; 1800 struct rl6231_pll_code pll_code;
1825 int ret, dai_sel; 1801 int ret, dai_sel;
1826 1802
1827 if (source == rt5640->pll_src && freq_in == rt5640->pll_in && 1803 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
@@ -1865,20 +1841,21 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1865 return -EINVAL; 1841 return -EINVAL;
1866 } 1842 }
1867 1843
1868 ret = rt5640_pll_calc(freq_in, freq_out, pll_code); 1844 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1869 if (ret < 0) { 1845 if (ret < 0) {
1870 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 1846 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1871 return ret; 1847 return ret;
1872 } 1848 }
1873 1849
1874 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp, 1850 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1875 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code); 1851 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1852 pll_code.n_code, pll_code.k_code);
1876 1853
1877 snd_soc_write(codec, RT5640_PLL_CTRL1, 1854 snd_soc_write(codec, RT5640_PLL_CTRL1,
1878 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code); 1855 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
1879 snd_soc_write(codec, RT5640_PLL_CTRL2, 1856 snd_soc_write(codec, RT5640_PLL_CTRL2,
1880 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT | 1857 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1881 pll_code->m_bp << RT5640_PLL_M_BP_SFT); 1858 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
1882 1859
1883 rt5640->pll_in = freq_in; 1860 rt5640->pll_in = freq_in;
1884 rt5640->pll_out = freq_out; 1861 rt5640->pll_out = freq_out;
@@ -1890,11 +1867,9 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1890static int rt5640_set_bias_level(struct snd_soc_codec *codec, 1867static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1891 enum snd_soc_bias_level level) 1868 enum snd_soc_bias_level level)
1892{ 1869{
1893 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1894 switch (level) { 1870 switch (level) {
1895 case SND_SOC_BIAS_STANDBY: 1871 case SND_SOC_BIAS_STANDBY:
1896 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) { 1872 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1897 regcache_cache_only(rt5640->regmap, false);
1898 snd_soc_update_bits(codec, RT5640_PWR_ANLG1, 1873 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1899 RT5640_PWR_VREF1 | RT5640_PWR_MB | 1874 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1900 RT5640_PWR_BG | RT5640_PWR_VREF2, 1875 RT5640_PWR_BG | RT5640_PWR_VREF2,
@@ -1904,7 +1879,6 @@ static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1904 snd_soc_update_bits(codec, RT5640_PWR_ANLG1, 1879 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1905 RT5640_PWR_FV1 | RT5640_PWR_FV2, 1880 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1906 RT5640_PWR_FV1 | RT5640_PWR_FV2); 1881 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1907 regcache_sync(rt5640->regmap);
1908 snd_soc_update_bits(codec, RT5640_DUMMY1, 1882 snd_soc_update_bits(codec, RT5640_DUMMY1,
1909 0x0301, 0x0301); 1883 0x0301, 0x0301);
1910 snd_soc_update_bits(codec, RT5640_MICBIAS, 1884 snd_soc_update_bits(codec, RT5640_MICBIAS,
@@ -1938,13 +1912,39 @@ static int rt5640_probe(struct snd_soc_codec *codec)
1938 1912
1939 rt5640->codec = codec; 1913 rt5640->codec = codec;
1940 1914
1941 codec->dapm.idle_bias_off = 1;
1942 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF); 1915 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1943 1916
1944 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301); 1917 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1945 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030); 1918 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1946 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00); 1919 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1947 1920
1921 switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
1922 case RT5640_ID_5640:
1923 case RT5640_ID_5642:
1924 snd_soc_add_codec_controls(codec,
1925 rt5640_specific_snd_controls,
1926 ARRAY_SIZE(rt5640_specific_snd_controls));
1927 snd_soc_dapm_new_controls(&codec->dapm,
1928 rt5640_specific_dapm_widgets,
1929 ARRAY_SIZE(rt5640_specific_dapm_widgets));
1930 snd_soc_dapm_add_routes(&codec->dapm,
1931 rt5640_specific_dapm_routes,
1932 ARRAY_SIZE(rt5640_specific_dapm_routes));
1933 break;
1934 case RT5640_ID_5639:
1935 snd_soc_dapm_new_controls(&codec->dapm,
1936 rt5639_specific_dapm_widgets,
1937 ARRAY_SIZE(rt5639_specific_dapm_widgets));
1938 snd_soc_dapm_add_routes(&codec->dapm,
1939 rt5639_specific_dapm_routes,
1940 ARRAY_SIZE(rt5639_specific_dapm_routes));
1941 break;
1942 default:
1943 dev_err(codec->dev,
1944 "The driver is for RT5639 RT5640 or RT5642 only\n");
1945 return -ENODEV;
1946 }
1947
1948 return 0; 1948 return 0;
1949} 1949}
1950 1950
@@ -1979,6 +1979,9 @@ static int rt5640_resume(struct snd_soc_codec *codec)
1979 msleep(400); 1979 msleep(400);
1980 } 1980 }
1981 1981
1982 regcache_cache_only(rt5640->regmap, false);
1983 regcache_sync(rt5640->regmap);
1984
1982 return 0; 1985 return 0;
1983} 1986}
1984#else 1987#else
@@ -2044,6 +2047,7 @@ static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2044 .suspend = rt5640_suspend, 2047 .suspend = rt5640_suspend,
2045 .resume = rt5640_resume, 2048 .resume = rt5640_resume,
2046 .set_bias_level = rt5640_set_bias_level, 2049 .set_bias_level = rt5640_set_bias_level,
2050 .idle_bias_off = true,
2047 .controls = rt5640_snd_controls, 2051 .controls = rt5640_snd_controls,
2048 .num_controls = ARRAY_SIZE(rt5640_snd_controls), 2052 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2049 .dapm_widgets = rt5640_dapm_widgets, 2053 .dapm_widgets = rt5640_dapm_widgets,
@@ -2070,12 +2074,15 @@ static const struct regmap_config rt5640_regmap = {
2070 2074
2071static const struct i2c_device_id rt5640_i2c_id[] = { 2075static const struct i2c_device_id rt5640_i2c_id[] = {
2072 { "rt5640", 0 }, 2076 { "rt5640", 0 },
2077 { "rt5639", 0 },
2078 { "rt5642", 0 },
2073 { } 2079 { }
2074}; 2080};
2075MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id); 2081MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2076 2082
2077#if defined(CONFIG_OF) 2083#if defined(CONFIG_OF)
2078static const struct of_device_id rt5640_of_match[] = { 2084static const struct of_device_id rt5640_of_match[] = {
2085 { .compatible = "realtek,rt5639", },
2079 { .compatible = "realtek,rt5640", }, 2086 { .compatible = "realtek,rt5640", },
2080 {}, 2087 {},
2081}; 2088};
@@ -2166,7 +2173,7 @@ static int rt5640_i2c_probe(struct i2c_client *i2c,
2166 } 2173 }
2167 2174
2168 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val); 2175 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2169 if ((val != RT5640_DEVICE_ID)) { 2176 if (val != RT5640_DEVICE_ID) {
2170 dev_err(&i2c->dev, 2177 dev_err(&i2c->dev,
2171 "Device with ID register %x is not rt5640/39\n", val); 2178 "Device with ID register %x is not rt5640/39\n", val);
2172 return -ENODEV; 2179 return -ENODEV;
@@ -2187,6 +2194,25 @@ static int rt5640_i2c_probe(struct i2c_client *i2c,
2187 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4, 2194 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2188 RT5640_IN_DF2, RT5640_IN_DF2); 2195 RT5640_IN_DF2, RT5640_IN_DF2);
2189 2196
2197 if (rt5640->pdata.dmic_en) {
2198 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2199 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2200
2201 if (rt5640->pdata.dmic1_data_pin) {
2202 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2203 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
2204 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2205 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
2206 }
2207
2208 if (rt5640->pdata.dmic2_data_pin) {
2209 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2210 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
2211 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2212 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
2213 }
2214 }
2215
2190 rt5640->hp_mute = 1; 2216 rt5640->hp_mute = 1;
2191 2217
2192 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640, 2218 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
@@ -2219,6 +2245,6 @@ static struct i2c_driver rt5640_i2c_driver = {
2219}; 2245};
2220module_i2c_driver(rt5640_i2c_driver); 2246module_i2c_driver(rt5640_i2c_driver);
2221 2247
2222MODULE_DESCRIPTION("ASoC RT5640 driver"); 2248MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
2223MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>"); 2249MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2224MODULE_LICENSE("GPL v2"); 2250MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rt5640.h b/sound/soc/codecs/rt5640.h
index 5e8df25a13f3..58ebe96b86da 100644
--- a/sound/soc/codecs/rt5640.h
+++ b/sound/soc/codecs/rt5640.h
@@ -192,6 +192,13 @@
192#define RT5640_R_VOL_MASK (0x3f) 192#define RT5640_R_VOL_MASK (0x3f)
193#define RT5640_R_VOL_SFT 0 193#define RT5640_R_VOL_SFT 0
194 194
195/* SW Reset & Device ID (0x00) */
196#define RT5640_ID_MASK (0x3 << 1)
197#define RT5640_ID_5639 (0x0 << 1)
198#define RT5640_ID_5640 (0x2 << 1)
199#define RT5640_ID_5642 (0x3 << 1)
200
201
195/* IN1 and IN2 Control (0x0d) */ 202/* IN1 and IN2 Control (0x0d) */
196/* IN3 and IN4 Control (0x0e) */ 203/* IN3 and IN4 Control (0x0e) */
197#define RT5640_BST_SFT1 12 204#define RT5640_BST_SFT1 12
@@ -976,8 +983,6 @@
976#define RT5640_SCLK_SRC_SFT 14 983#define RT5640_SCLK_SRC_SFT 14
977#define RT5640_SCLK_SRC_MCLK (0x0 << 14) 984#define RT5640_SCLK_SRC_MCLK (0x0 << 14)
978#define RT5640_SCLK_SRC_PLL1 (0x1 << 14) 985#define RT5640_SCLK_SRC_PLL1 (0x1 << 14)
979#define RT5640_SCLK_SRC_PLL1T (0x2 << 14)
980#define RT5640_SCLK_SRC_RCCLK (0x3 << 14) /* 15MHz */
981#define RT5640_PLL1_SRC_MASK (0x3 << 12) 986#define RT5640_PLL1_SRC_MASK (0x3 << 12)
982#define RT5640_PLL1_SRC_SFT 12 987#define RT5640_PLL1_SRC_SFT 12
983#define RT5640_PLL1_SRC_MCLK (0x0 << 12) 988#define RT5640_PLL1_SRC_MCLK (0x0 << 12)
@@ -2074,13 +2079,6 @@ enum {
2074 RT5640_DMIC2, 2079 RT5640_DMIC2,
2075}; 2080};
2076 2081
2077struct rt5640_pll_code {
2078 bool m_bp; /* Indicates bypass m code or not. */
2079 int m_code;
2080 int n_code;
2081 int k_code;
2082};
2083
2084struct rt5640_priv { 2082struct rt5640_priv {
2085 struct snd_soc_codec *codec; 2083 struct snd_soc_codec *codec;
2086 struct rt5640_platform_data pdata; 2084 struct rt5640_platform_data pdata;
@@ -2092,12 +2090,10 @@ struct rt5640_priv {
2092 int bclk[RT5640_AIFS]; 2090 int bclk[RT5640_AIFS];
2093 int master[RT5640_AIFS]; 2091 int master[RT5640_AIFS];
2094 2092
2095 struct rt5640_pll_code pll_code;
2096 int pll_src; 2093 int pll_src;
2097 int pll_in; 2094 int pll_in;
2098 int pll_out; 2095 int pll_out;
2099 2096
2100 int dmic_en;
2101 bool hp_mute; 2097 bool hp_mute;
2102}; 2098};
2103 2099
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c
new file mode 100644
index 000000000000..02147be2b302
--- /dev/null
+++ b/sound/soc/codecs/rt5645.c
@@ -0,0 +1,2378 @@
1/*
2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/jack.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rl6231.h"
30#include "rt5645.h"
31
32#define RT5645_DEVICE_ID 0x6308
33
34#define RT5645_PR_RANGE_BASE (0xff + 1)
35#define RT5645_PR_SPACING 0x100
36
37#define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
38
39static const struct regmap_range_cfg rt5645_ranges[] = {
40 {
41 .name = "PR",
42 .range_min = RT5645_PR_BASE,
43 .range_max = RT5645_PR_BASE + 0xf8,
44 .selector_reg = RT5645_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5645_PRIV_DATA,
48 .window_len = 0x1,
49 },
50};
51
52static const struct reg_default init_list[] = {
53 {RT5645_PR_BASE + 0x3d, 0x3600},
54 {RT5645_PR_BASE + 0x1c, 0xfd20},
55 {RT5645_PR_BASE + 0x20, 0x611f},
56 {RT5645_PR_BASE + 0x21, 0x4040},
57 {RT5645_PR_BASE + 0x23, 0x0004},
58};
59#define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
60
61static const struct reg_default rt5645_reg[] = {
62 { 0x00, 0x0000 },
63 { 0x01, 0xc8c8 },
64 { 0x02, 0xc8c8 },
65 { 0x03, 0xc8c8 },
66 { 0x0a, 0x0002 },
67 { 0x0b, 0x2827 },
68 { 0x0c, 0xe000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x14, 0x3333 },
73 { 0x16, 0x4b00 },
74 { 0x18, 0x018b },
75 { 0x19, 0xafaf },
76 { 0x1a, 0xafaf },
77 { 0x1b, 0x0001 },
78 { 0x1c, 0x2f2f },
79 { 0x1d, 0x2f2f },
80 { 0x1e, 0x0000 },
81 { 0x20, 0x0000 },
82 { 0x27, 0x7060 },
83 { 0x28, 0x7070 },
84 { 0x29, 0x8080 },
85 { 0x2a, 0x5656 },
86 { 0x2b, 0x5454 },
87 { 0x2c, 0xaaa0 },
88 { 0x2f, 0x1002 },
89 { 0x31, 0x5000 },
90 { 0x32, 0x0000 },
91 { 0x33, 0x0000 },
92 { 0x34, 0x0000 },
93 { 0x35, 0x0000 },
94 { 0x3b, 0x0000 },
95 { 0x3c, 0x007f },
96 { 0x3d, 0x0000 },
97 { 0x3e, 0x007f },
98 { 0x3f, 0x0000 },
99 { 0x40, 0x001f },
100 { 0x41, 0x0000 },
101 { 0x42, 0x001f },
102 { 0x45, 0x6000 },
103 { 0x46, 0x003e },
104 { 0x47, 0x003e },
105 { 0x48, 0xf807 },
106 { 0x4a, 0x0004 },
107 { 0x4d, 0x0000 },
108 { 0x4e, 0x0000 },
109 { 0x4f, 0x01ff },
110 { 0x50, 0x0000 },
111 { 0x51, 0x0000 },
112 { 0x52, 0x01ff },
113 { 0x53, 0xf000 },
114 { 0x56, 0x0111 },
115 { 0x57, 0x0064 },
116 { 0x58, 0xef0e },
117 { 0x59, 0xf0f0 },
118 { 0x5a, 0xef0e },
119 { 0x5b, 0xf0f0 },
120 { 0x5c, 0xef0e },
121 { 0x5d, 0xf0f0 },
122 { 0x5e, 0xf000 },
123 { 0x5f, 0x0000 },
124 { 0x61, 0x0300 },
125 { 0x62, 0x0000 },
126 { 0x63, 0x00c2 },
127 { 0x64, 0x0000 },
128 { 0x65, 0x0000 },
129 { 0x66, 0x0000 },
130 { 0x6a, 0x0000 },
131 { 0x6c, 0x0aaa },
132 { 0x70, 0x8000 },
133 { 0x71, 0x8000 },
134 { 0x72, 0x8000 },
135 { 0x73, 0x7770 },
136 { 0x74, 0x3e00 },
137 { 0x75, 0x2409 },
138 { 0x76, 0x000a },
139 { 0x77, 0x0c00 },
140 { 0x78, 0x0000 },
141 { 0x80, 0x0000 },
142 { 0x81, 0x0000 },
143 { 0x82, 0x0000 },
144 { 0x83, 0x0000 },
145 { 0x84, 0x0000 },
146 { 0x85, 0x0000 },
147 { 0x8a, 0x0000 },
148 { 0x8e, 0x0004 },
149 { 0x8f, 0x1100 },
150 { 0x90, 0x0646 },
151 { 0x91, 0x0c06 },
152 { 0x93, 0x0000 },
153 { 0x94, 0x0200 },
154 { 0x95, 0x0000 },
155 { 0x9a, 0x2184 },
156 { 0x9b, 0x010a },
157 { 0x9c, 0x0aea },
158 { 0x9d, 0x000c },
159 { 0x9e, 0x0400 },
160 { 0xa0, 0xa0a8 },
161 { 0xa1, 0x0059 },
162 { 0xa2, 0x0001 },
163 { 0xae, 0x6000 },
164 { 0xaf, 0x0000 },
165 { 0xb0, 0x6000 },
166 { 0xb1, 0x0000 },
167 { 0xb2, 0x0000 },
168 { 0xb3, 0x001f },
169 { 0xb4, 0x020c },
170 { 0xb5, 0x1f00 },
171 { 0xb6, 0x0000 },
172 { 0xbb, 0x0000 },
173 { 0xbc, 0x0000 },
174 { 0xbd, 0x0000 },
175 { 0xbe, 0x0000 },
176 { 0xbf, 0x3100 },
177 { 0xc0, 0x0000 },
178 { 0xc1, 0x0000 },
179 { 0xc2, 0x0000 },
180 { 0xc3, 0x2000 },
181 { 0xcd, 0x0000 },
182 { 0xce, 0x0000 },
183 { 0xcf, 0x1813 },
184 { 0xd0, 0x0690 },
185 { 0xd1, 0x1c17 },
186 { 0xd3, 0xb320 },
187 { 0xd4, 0x0000 },
188 { 0xd6, 0x0400 },
189 { 0xd9, 0x0809 },
190 { 0xda, 0x0000 },
191 { 0xdb, 0x0003 },
192 { 0xdc, 0x0049 },
193 { 0xdd, 0x001b },
194 { 0xe6, 0x8000 },
195 { 0xe7, 0x0200 },
196 { 0xec, 0xb300 },
197 { 0xed, 0x0000 },
198 { 0xf0, 0x001f },
199 { 0xf1, 0x020c },
200 { 0xf2, 0x1f00 },
201 { 0xf3, 0x0000 },
202 { 0xf4, 0x4000 },
203 { 0xf8, 0x0000 },
204 { 0xf9, 0x0000 },
205 { 0xfa, 0x2060 },
206 { 0xfb, 0x4040 },
207 { 0xfc, 0x0000 },
208 { 0xfd, 0x0002 },
209 { 0xfe, 0x10ec },
210 { 0xff, 0x6308 },
211};
212
213static int rt5645_reset(struct snd_soc_codec *codec)
214{
215 return snd_soc_write(codec, RT5645_RESET, 0);
216}
217
218static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
219{
220 int i;
221
222 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
223 if (reg >= rt5645_ranges[i].range_min &&
224 reg <= rt5645_ranges[i].range_max) {
225 return true;
226 }
227 }
228
229 switch (reg) {
230 case RT5645_RESET:
231 case RT5645_PRIV_DATA:
232 case RT5645_IN1_CTRL1:
233 case RT5645_IN1_CTRL2:
234 case RT5645_IN1_CTRL3:
235 case RT5645_A_JD_CTRL1:
236 case RT5645_ADC_EQ_CTRL1:
237 case RT5645_EQ_CTRL1:
238 case RT5645_ALC_CTRL_1:
239 case RT5645_IRQ_CTRL2:
240 case RT5645_IRQ_CTRL3:
241 case RT5645_INT_IRQ_ST:
242 case RT5645_IL_CMD:
243 case RT5645_VENDOR_ID:
244 case RT5645_VENDOR_ID1:
245 case RT5645_VENDOR_ID2:
246 return true;
247 default:
248 return false;
249 }
250}
251
252static bool rt5645_readable_register(struct device *dev, unsigned int reg)
253{
254 int i;
255
256 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
257 if (reg >= rt5645_ranges[i].range_min &&
258 reg <= rt5645_ranges[i].range_max) {
259 return true;
260 }
261 }
262
263 switch (reg) {
264 case RT5645_RESET:
265 case RT5645_SPK_VOL:
266 case RT5645_HP_VOL:
267 case RT5645_LOUT1:
268 case RT5645_IN1_CTRL1:
269 case RT5645_IN1_CTRL2:
270 case RT5645_IN1_CTRL3:
271 case RT5645_IN2_CTRL:
272 case RT5645_INL1_INR1_VOL:
273 case RT5645_SPK_FUNC_LIM:
274 case RT5645_ADJ_HPF_CTRL:
275 case RT5645_DAC1_DIG_VOL:
276 case RT5645_DAC2_DIG_VOL:
277 case RT5645_DAC_CTRL:
278 case RT5645_STO1_ADC_DIG_VOL:
279 case RT5645_MONO_ADC_DIG_VOL:
280 case RT5645_ADC_BST_VOL1:
281 case RT5645_ADC_BST_VOL2:
282 case RT5645_STO1_ADC_MIXER:
283 case RT5645_MONO_ADC_MIXER:
284 case RT5645_AD_DA_MIXER:
285 case RT5645_STO_DAC_MIXER:
286 case RT5645_MONO_DAC_MIXER:
287 case RT5645_DIG_MIXER:
288 case RT5645_DIG_INF1_DATA:
289 case RT5645_PDM_OUT_CTRL:
290 case RT5645_REC_L1_MIXER:
291 case RT5645_REC_L2_MIXER:
292 case RT5645_REC_R1_MIXER:
293 case RT5645_REC_R2_MIXER:
294 case RT5645_HPMIXL_CTRL:
295 case RT5645_HPOMIXL_CTRL:
296 case RT5645_HPMIXR_CTRL:
297 case RT5645_HPOMIXR_CTRL:
298 case RT5645_HPO_MIXER:
299 case RT5645_SPK_L_MIXER:
300 case RT5645_SPK_R_MIXER:
301 case RT5645_SPO_MIXER:
302 case RT5645_SPO_CLSD_RATIO:
303 case RT5645_OUT_L1_MIXER:
304 case RT5645_OUT_R1_MIXER:
305 case RT5645_OUT_L_GAIN1:
306 case RT5645_OUT_L_GAIN2:
307 case RT5645_OUT_R_GAIN1:
308 case RT5645_OUT_R_GAIN2:
309 case RT5645_LOUT_MIXER:
310 case RT5645_HAPTIC_CTRL1:
311 case RT5645_HAPTIC_CTRL2:
312 case RT5645_HAPTIC_CTRL3:
313 case RT5645_HAPTIC_CTRL4:
314 case RT5645_HAPTIC_CTRL5:
315 case RT5645_HAPTIC_CTRL6:
316 case RT5645_HAPTIC_CTRL7:
317 case RT5645_HAPTIC_CTRL8:
318 case RT5645_HAPTIC_CTRL9:
319 case RT5645_HAPTIC_CTRL10:
320 case RT5645_PWR_DIG1:
321 case RT5645_PWR_DIG2:
322 case RT5645_PWR_ANLG1:
323 case RT5645_PWR_ANLG2:
324 case RT5645_PWR_MIXER:
325 case RT5645_PWR_VOL:
326 case RT5645_PRIV_INDEX:
327 case RT5645_PRIV_DATA:
328 case RT5645_I2S1_SDP:
329 case RT5645_I2S2_SDP:
330 case RT5645_ADDA_CLK1:
331 case RT5645_ADDA_CLK2:
332 case RT5645_DMIC_CTRL1:
333 case RT5645_DMIC_CTRL2:
334 case RT5645_TDM_CTRL_1:
335 case RT5645_TDM_CTRL_2:
336 case RT5645_GLB_CLK:
337 case RT5645_PLL_CTRL1:
338 case RT5645_PLL_CTRL2:
339 case RT5645_ASRC_1:
340 case RT5645_ASRC_2:
341 case RT5645_ASRC_3:
342 case RT5645_ASRC_4:
343 case RT5645_DEPOP_M1:
344 case RT5645_DEPOP_M2:
345 case RT5645_DEPOP_M3:
346 case RT5645_MICBIAS:
347 case RT5645_A_JD_CTRL1:
348 case RT5645_VAD_CTRL4:
349 case RT5645_CLSD_OUT_CTRL:
350 case RT5645_ADC_EQ_CTRL1:
351 case RT5645_ADC_EQ_CTRL2:
352 case RT5645_EQ_CTRL1:
353 case RT5645_EQ_CTRL2:
354 case RT5645_ALC_CTRL_1:
355 case RT5645_ALC_CTRL_2:
356 case RT5645_ALC_CTRL_3:
357 case RT5645_ALC_CTRL_4:
358 case RT5645_ALC_CTRL_5:
359 case RT5645_JD_CTRL:
360 case RT5645_IRQ_CTRL1:
361 case RT5645_IRQ_CTRL2:
362 case RT5645_IRQ_CTRL3:
363 case RT5645_INT_IRQ_ST:
364 case RT5645_GPIO_CTRL1:
365 case RT5645_GPIO_CTRL2:
366 case RT5645_GPIO_CTRL3:
367 case RT5645_BASS_BACK:
368 case RT5645_MP3_PLUS1:
369 case RT5645_MP3_PLUS2:
370 case RT5645_ADJ_HPF1:
371 case RT5645_ADJ_HPF2:
372 case RT5645_HP_CALIB_AMP_DET:
373 case RT5645_SV_ZCD1:
374 case RT5645_SV_ZCD2:
375 case RT5645_IL_CMD:
376 case RT5645_IL_CMD2:
377 case RT5645_IL_CMD3:
378 case RT5645_DRC1_HL_CTRL1:
379 case RT5645_DRC2_HL_CTRL1:
380 case RT5645_ADC_MONO_HP_CTRL1:
381 case RT5645_ADC_MONO_HP_CTRL2:
382 case RT5645_DRC2_CTRL1:
383 case RT5645_DRC2_CTRL2:
384 case RT5645_DRC2_CTRL3:
385 case RT5645_DRC2_CTRL4:
386 case RT5645_DRC2_CTRL5:
387 case RT5645_JD_CTRL3:
388 case RT5645_JD_CTRL4:
389 case RT5645_GEN_CTRL1:
390 case RT5645_GEN_CTRL2:
391 case RT5645_GEN_CTRL3:
392 case RT5645_VENDOR_ID:
393 case RT5645_VENDOR_ID1:
394 case RT5645_VENDOR_ID2:
395 return true;
396 default:
397 return false;
398 }
399}
400
401static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
402static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
403static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
404static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
405static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
406
407/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
408static unsigned int bst_tlv[] = {
409 TLV_DB_RANGE_HEAD(7),
410 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
411 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
412 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
413 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
414 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
415 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
416 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
417};
418
419static const char * const rt5645_tdm_data_swap_select[] = {
420 "L/R", "R/L", "L/L", "R/R"
421};
422
423static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
424 RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
425
426static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
427 RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
428
429static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
430 RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
431
432static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
433 RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
434
435static const char * const rt5645_tdm_adc_data_select[] = {
436 "1/2/R", "2/1/R", "R/1/2", "R/2/1"
437};
438
439static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
440 RT5645_TDM_CTRL_1, 8,
441 rt5645_tdm_adc_data_select);
442
443static const struct snd_kcontrol_new rt5645_snd_controls[] = {
444 /* Speaker Output Volume */
445 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
446 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
447 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
448 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
449
450 /* Headphone Output Volume */
451 SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
452 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
453 SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
454 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
455
456 /* OUTPUT Control */
457 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
458 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
459 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
460 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
461 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
462 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
463
464 /* DAC Digital Volume */
465 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
466 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
467 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
468 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
469 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
470 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
471
472 /* IN1/IN2 Control */
473 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
474 RT5645_BST_SFT1, 8, 0, bst_tlv),
475 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
476 RT5645_BST_SFT2, 8, 0, bst_tlv),
477
478 /* INL/INR Volume Control */
479 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
480 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
481
482 /* ADC Digital Volume Control */
483 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
484 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
485 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
486 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
487 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
488 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
489 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
490 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
491
492 /* ADC Boost Volume Control */
493 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
494 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
495 adc_bst_tlv),
496 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
497 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
498 adc_bst_tlv),
499
500 /* I2S2 function select */
501 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
502 1, 1),
503
504 /* TDM */
505 SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
506 SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
507 SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
508 SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
509 SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
510 SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
511 SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
512 SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
513 SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
514};
515
516/**
517 * set_dmic_clk - Set parameter of dmic.
518 *
519 * @w: DAPM widget.
520 * @kcontrol: The kcontrol of this widget.
521 * @event: Event id.
522 *
523 */
524static int set_dmic_clk(struct snd_soc_dapm_widget *w,
525 struct snd_kcontrol *kcontrol, int event)
526{
527 struct snd_soc_codec *codec = w->codec;
528 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
529 int idx = -EINVAL;
530
531 idx = rl6231_calc_dmic_clk(rt5645->sysclk);
532
533 if (idx < 0)
534 dev_err(codec->dev, "Failed to set DMIC clock\n");
535 else
536 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
537 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
538 return idx;
539}
540
541static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
542 struct snd_soc_dapm_widget *sink)
543{
544 unsigned int val;
545
546 val = snd_soc_read(source->codec, RT5645_GLB_CLK);
547 val &= RT5645_SCLK_SRC_MASK;
548 if (val == RT5645_SCLK_SRC_PLL1)
549 return 1;
550 else
551 return 0;
552}
553
554/* Digital Mixer */
555static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
556 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
557 RT5645_M_ADC_L1_SFT, 1, 1),
558 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
559 RT5645_M_ADC_L2_SFT, 1, 1),
560};
561
562static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
563 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
564 RT5645_M_ADC_R1_SFT, 1, 1),
565 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
566 RT5645_M_ADC_R2_SFT, 1, 1),
567};
568
569static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
570 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
571 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
572 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
573 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
574};
575
576static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
577 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
578 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
579 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
580 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
581};
582
583static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
584 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
585 RT5645_M_ADCMIX_L_SFT, 1, 1),
586 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
587 RT5645_M_DAC1_L_SFT, 1, 1),
588};
589
590static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
591 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
592 RT5645_M_ADCMIX_R_SFT, 1, 1),
593 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
594 RT5645_M_DAC1_R_SFT, 1, 1),
595};
596
597static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
598 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
599 RT5645_M_DAC_L1_SFT, 1, 1),
600 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
601 RT5645_M_DAC_L2_SFT, 1, 1),
602 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
603 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
604};
605
606static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
607 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
608 RT5645_M_DAC_R1_SFT, 1, 1),
609 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
610 RT5645_M_DAC_R2_SFT, 1, 1),
611 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
612 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
613};
614
615static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
616 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
617 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
618 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
619 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
620 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
621 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
622};
623
624static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
625 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
626 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
627 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
628 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
629 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
630 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
631};
632
633static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
634 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
635 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
636 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
637 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
638 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
639 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
640};
641
642static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
643 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
644 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
646 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
647 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
648 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
649};
650
651/* Analog Input Mixer */
652static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
653 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
654 RT5645_M_HP_L_RM_L_SFT, 1, 1),
655 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
656 RT5645_M_IN_L_RM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
658 RT5645_M_BST2_RM_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
660 RT5645_M_BST1_RM_L_SFT, 1, 1),
661 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
662 RT5645_M_OM_L_RM_L_SFT, 1, 1),
663};
664
665static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
666 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
667 RT5645_M_HP_R_RM_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
669 RT5645_M_IN_R_RM_R_SFT, 1, 1),
670 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
671 RT5645_M_BST2_RM_R_SFT, 1, 1),
672 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
673 RT5645_M_BST1_RM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
675 RT5645_M_OM_R_RM_R_SFT, 1, 1),
676};
677
678static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
679 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
680 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
682 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
683 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
684 RT5645_M_IN_L_SM_L_SFT, 1, 1),
685 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
686 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
687};
688
689static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
690 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
691 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
692 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
693 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
694 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
695 RT5645_M_IN_R_SM_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
697 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
698};
699
700static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
701 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
702 RT5645_M_BST1_OM_L_SFT, 1, 1),
703 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
704 RT5645_M_IN_L_OM_L_SFT, 1, 1),
705 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
706 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
707 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
708 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
709};
710
711static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
712 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
713 RT5645_M_BST2_OM_R_SFT, 1, 1),
714 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
715 RT5645_M_IN_R_OM_R_SFT, 1, 1),
716 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
717 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
718 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
719 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
720};
721
722static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
723 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
724 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
725 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
726 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
727 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
728 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
729 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
730 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
731};
732
733static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
734 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
735 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
736 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
737 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
738};
739
740static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
741 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
742 RT5645_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
744 RT5645_M_HPVOL_HM_SFT, 1, 1),
745};
746
747static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
748 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
749 RT5645_M_DAC1_HV_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
751 RT5645_M_DAC2_HV_SFT, 1, 1),
752 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
753 RT5645_M_IN_HV_SFT, 1, 1),
754 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
755 RT5645_M_BST1_HV_SFT, 1, 1),
756};
757
758static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
759 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
760 RT5645_M_DAC1_HV_SFT, 1, 1),
761 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
762 RT5645_M_DAC2_HV_SFT, 1, 1),
763 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
764 RT5645_M_IN_HV_SFT, 1, 1),
765 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
766 RT5645_M_BST2_HV_SFT, 1, 1),
767};
768
769static const struct snd_kcontrol_new rt5645_lout_mix[] = {
770 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
771 RT5645_M_DAC_L1_LM_SFT, 1, 1),
772 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
773 RT5645_M_DAC_R1_LM_SFT, 1, 1),
774 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
775 RT5645_M_OV_L_LM_SFT, 1, 1),
776 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
777 RT5645_M_OV_R_LM_SFT, 1, 1),
778};
779
780/*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
781static const char * const rt5645_dac1_src[] = {
782 "IF1 DAC", "IF2 DAC", "IF3 DAC"
783};
784
785static SOC_ENUM_SINGLE_DECL(
786 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
787 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
788
789static const struct snd_kcontrol_new rt5645_dac1l_mux =
790 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
791
792static SOC_ENUM_SINGLE_DECL(
793 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
794 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
795
796static const struct snd_kcontrol_new rt5645_dac1r_mux =
797 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
798
799/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
800static const char * const rt5645_dac12_src[] = {
801 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
802};
803
804static SOC_ENUM_SINGLE_DECL(
805 rt5645_dac2l_enum, RT5645_DAC_CTRL,
806 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
807
808static const struct snd_kcontrol_new rt5645_dac_l2_mux =
809 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
810
811static const char * const rt5645_dacr2_src[] = {
812 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
813};
814
815static SOC_ENUM_SINGLE_DECL(
816 rt5645_dac2r_enum, RT5645_DAC_CTRL,
817 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
818
819static const struct snd_kcontrol_new rt5645_dac_r2_mux =
820 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
821
822
823/* INL/R source */
824static const char * const rt5645_inl_src[] = {
825 "IN2P", "MonoP"
826};
827
828static SOC_ENUM_SINGLE_DECL(
829 rt5645_inl_enum, RT5645_INL1_INR1_VOL,
830 RT5645_INL_SEL_SFT, rt5645_inl_src);
831
832static const struct snd_kcontrol_new rt5645_inl_mux =
833 SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
834
835static const char * const rt5645_inr_src[] = {
836 "IN2N", "MonoN"
837};
838
839static SOC_ENUM_SINGLE_DECL(
840 rt5645_inr_enum, RT5645_INL1_INR1_VOL,
841 RT5645_INR_SEL_SFT, rt5645_inr_src);
842
843static const struct snd_kcontrol_new rt5645_inr_mux =
844 SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
845
846/* Stereo1 ADC source */
847/* MX-27 [12] */
848static const char * const rt5645_stereo_adc1_src[] = {
849 "DAC MIX", "ADC"
850};
851
852static SOC_ENUM_SINGLE_DECL(
853 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
854 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
855
856static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
857 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
858
859/* MX-27 [11] */
860static const char * const rt5645_stereo_adc2_src[] = {
861 "DAC MIX", "DMIC"
862};
863
864static SOC_ENUM_SINGLE_DECL(
865 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
866 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
867
868static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
869 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
870
871/* MX-27 [8] */
872static const char * const rt5645_stereo_dmic_src[] = {
873 "DMIC1", "DMIC2"
874};
875
876static SOC_ENUM_SINGLE_DECL(
877 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
878 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
879
880static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
881 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
882
883/* Mono ADC source */
884/* MX-28 [12] */
885static const char * const rt5645_mono_adc_l1_src[] = {
886 "Mono DAC MIXL", "ADC"
887};
888
889static SOC_ENUM_SINGLE_DECL(
890 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
891 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
892
893static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
894 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
895/* MX-28 [11] */
896static const char * const rt5645_mono_adc_l2_src[] = {
897 "Mono DAC MIXL", "DMIC"
898};
899
900static SOC_ENUM_SINGLE_DECL(
901 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
902 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
903
904static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
905 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
906
907/* MX-28 [8] */
908static const char * const rt5645_mono_dmic_src[] = {
909 "DMIC1", "DMIC2"
910};
911
912static SOC_ENUM_SINGLE_DECL(
913 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
914 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
915
916static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
917 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
918/* MX-28 [1:0] */
919static SOC_ENUM_SINGLE_DECL(
920 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
921 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
922
923static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
924 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
925/* MX-28 [4] */
926static const char * const rt5645_mono_adc_r1_src[] = {
927 "Mono DAC MIXR", "ADC"
928};
929
930static SOC_ENUM_SINGLE_DECL(
931 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
932 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
933
934static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
935 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
936/* MX-28 [3] */
937static const char * const rt5645_mono_adc_r2_src[] = {
938 "Mono DAC MIXR", "DMIC"
939};
940
941static SOC_ENUM_SINGLE_DECL(
942 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
943 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
944
945static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
946 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
947
948/* MX-77 [9:8] */
949static const char * const rt5645_if1_adc_in_src[] = {
950 "IF_ADC1", "IF_ADC2", "VAD_ADC"
951};
952
953static SOC_ENUM_SINGLE_DECL(
954 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
955 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
956
957static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
958 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
959
960/* MX-2F [13:12] */
961static const char * const rt5645_if2_adc_in_src[] = {
962 "IF_ADC1", "IF_ADC2", "VAD_ADC"
963};
964
965static SOC_ENUM_SINGLE_DECL(
966 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
967 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
968
969static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
970 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
971
972/* MX-2F [1:0] */
973static const char * const rt5645_if3_adc_in_src[] = {
974 "IF_ADC1", "IF_ADC2", "VAD_ADC"
975};
976
977static SOC_ENUM_SINGLE_DECL(
978 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
979 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
980
981static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
982 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
983
984/* MX-31 [15] [13] [11] [9] */
985static const char * const rt5645_pdm_src[] = {
986 "Mono DAC", "Stereo DAC"
987};
988
989static SOC_ENUM_SINGLE_DECL(
990 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
991 RT5645_PDM1_L_SFT, rt5645_pdm_src);
992
993static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
994 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
995
996static SOC_ENUM_SINGLE_DECL(
997 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
998 RT5645_PDM1_R_SFT, rt5645_pdm_src);
999
1000static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1001 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1002
1003/* MX-9D [9:8] */
1004static const char * const rt5645_vad_adc_src[] = {
1005 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1006};
1007
1008static SOC_ENUM_SINGLE_DECL(
1009 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1010 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1011
1012static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1013 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1014
1015static const struct snd_kcontrol_new spk_l_vol_control =
1016 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1017 RT5645_L_MUTE_SFT, 1, 1);
1018
1019static const struct snd_kcontrol_new spk_r_vol_control =
1020 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1021 RT5645_R_MUTE_SFT, 1, 1);
1022
1023static const struct snd_kcontrol_new hp_l_vol_control =
1024 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1025 RT5645_L_MUTE_SFT, 1, 1);
1026
1027static const struct snd_kcontrol_new hp_r_vol_control =
1028 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1029 RT5645_R_MUTE_SFT, 1, 1);
1030
1031static const struct snd_kcontrol_new pdm1_l_vol_control =
1032 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1033 RT5645_M_PDM1_L, 1, 1);
1034
1035static const struct snd_kcontrol_new pdm1_r_vol_control =
1036 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1037 RT5645_M_PDM1_R, 1, 1);
1038
1039static void hp_amp_power(struct snd_soc_codec *codec, int on)
1040{
1041 static int hp_amp_power_count;
1042 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1043
1044 if (on) {
1045 if (hp_amp_power_count <= 0) {
1046 /* depop parameters */
1047 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1048 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1049 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1050 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1051 RT5645_HP_DCC_INT1, 0x9f01);
1052 mdelay(150);
1053 /* headphone amp power on */
1054 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1055 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1056 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1057 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1058 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1059 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1060 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1061 RT5645_PWR_HA,
1062 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1063 RT5645_PWR_HA);
1064 mdelay(5);
1065 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1066 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1067 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1068
1069 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1070 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1071 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1072 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1073 0x14, 0x1aaa);
1074 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1075 0x24, 0x0430);
1076 }
1077 hp_amp_power_count++;
1078 } else {
1079 hp_amp_power_count--;
1080 if (hp_amp_power_count <= 0) {
1081 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1082 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1083 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1084 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1085 /* headphone amp power down */
1086 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1087 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1088 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1089 RT5645_PWR_HA, 0);
1090 }
1091 }
1092}
1093
1094static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1095 struct snd_kcontrol *kcontrol, int event)
1096{
1097 struct snd_soc_codec *codec = w->codec;
1098 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1099
1100 switch (event) {
1101 case SND_SOC_DAPM_POST_PMU:
1102 hp_amp_power(codec, 1);
1103 /* headphone unmute sequence */
1104 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1105 RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1106 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1107 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1108 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1109 regmap_write(rt5645->regmap,
1110 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1111 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1112 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1113 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1114 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1115 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1116 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1117 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1118 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1119 msleep(40);
1120 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1121 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1122 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1123 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1124 break;
1125
1126 case SND_SOC_DAPM_PRE_PMD:
1127 /* headphone mute sequence */
1128 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1129 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1130 RT5645_CP_FQ3_MASK,
1131 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1132 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1133 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1134 regmap_write(rt5645->regmap,
1135 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1136 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1137 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1138 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1139 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1140 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1141 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1142 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1143 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1144 msleep(30);
1145 hp_amp_power(codec, 0);
1146 break;
1147
1148 default:
1149 return 0;
1150 }
1151
1152 return 0;
1153}
1154
1155static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1156 struct snd_kcontrol *kcontrol, int event)
1157{
1158 struct snd_soc_codec *codec = w->codec;
1159
1160 switch (event) {
1161 case SND_SOC_DAPM_POST_PMU:
1162 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1163 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1164 RT5645_PWR_CLS_D_L,
1165 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1166 RT5645_PWR_CLS_D_L);
1167 break;
1168
1169 case SND_SOC_DAPM_PRE_PMD:
1170 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1171 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1172 RT5645_PWR_CLS_D_L, 0);
1173 break;
1174
1175 default:
1176 return 0;
1177 }
1178
1179 return 0;
1180}
1181
1182static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1183 struct snd_kcontrol *kcontrol, int event)
1184{
1185 struct snd_soc_codec *codec = w->codec;
1186
1187 switch (event) {
1188 case SND_SOC_DAPM_POST_PMU:
1189 hp_amp_power(codec, 1);
1190 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1191 RT5645_PWR_LM, RT5645_PWR_LM);
1192 snd_soc_update_bits(codec, RT5645_LOUT1,
1193 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1194 break;
1195
1196 case SND_SOC_DAPM_PRE_PMD:
1197 snd_soc_update_bits(codec, RT5645_LOUT1,
1198 RT5645_L_MUTE | RT5645_R_MUTE,
1199 RT5645_L_MUTE | RT5645_R_MUTE);
1200 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1201 RT5645_PWR_LM, 0);
1202 hp_amp_power(codec, 0);
1203 break;
1204
1205 default:
1206 return 0;
1207 }
1208
1209 return 0;
1210}
1211
1212static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1213 struct snd_kcontrol *kcontrol, int event)
1214{
1215 struct snd_soc_codec *codec = w->codec;
1216
1217 switch (event) {
1218 case SND_SOC_DAPM_POST_PMU:
1219 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1220 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1221 break;
1222
1223 case SND_SOC_DAPM_PRE_PMD:
1224 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1225 RT5645_PWR_BST2_P, 0);
1226 break;
1227
1228 default:
1229 return 0;
1230 }
1231
1232 return 0;
1233}
1234
1235static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1236 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1237 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1238 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1239 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1240
1241 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1242 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1243 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1244 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1245
1246 /* Input Side */
1247 /* micbias */
1248 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1249 RT5645_PWR_MB1_BIT, 0),
1250 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1251 RT5645_PWR_MB2_BIT, 0),
1252 /* Input Lines */
1253 SND_SOC_DAPM_INPUT("DMIC L1"),
1254 SND_SOC_DAPM_INPUT("DMIC R1"),
1255 SND_SOC_DAPM_INPUT("DMIC L2"),
1256 SND_SOC_DAPM_INPUT("DMIC R2"),
1257
1258 SND_SOC_DAPM_INPUT("IN1P"),
1259 SND_SOC_DAPM_INPUT("IN1N"),
1260 SND_SOC_DAPM_INPUT("IN2P"),
1261 SND_SOC_DAPM_INPUT("IN2N"),
1262
1263 SND_SOC_DAPM_INPUT("Haptic Generator"),
1264
1265 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1266 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1267 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1268 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1269 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1270 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1271 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1272 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1273 /* Boost */
1274 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1275 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1276 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1277 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1278 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1279 /* Input Volume */
1280 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1281 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1282 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1283 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1284 /* REC Mixer */
1285 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1286 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1287 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1288 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1289 /* ADCs */
1290 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1291 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1292
1293 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1294 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1295 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1296 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1297
1298 /* ADC Mux */
1299 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1300 &rt5645_sto1_dmic_mux),
1301 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1302 &rt5645_sto_adc2_mux),
1303 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1304 &rt5645_sto_adc2_mux),
1305 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1306 &rt5645_sto_adc1_mux),
1307 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1308 &rt5645_sto_adc1_mux),
1309 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1310 &rt5645_mono_dmic_l_mux),
1311 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1312 &rt5645_mono_dmic_r_mux),
1313 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1314 &rt5645_mono_adc_l2_mux),
1315 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1316 &rt5645_mono_adc_l1_mux),
1317 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1318 &rt5645_mono_adc_r1_mux),
1319 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1320 &rt5645_mono_adc_r2_mux),
1321 /* ADC Mixer */
1322
1323 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1324 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1325 SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1326 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1327 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1328 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1329 NULL, 0),
1330 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1331 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1332 NULL, 0),
1333 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1334 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1335 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1336 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1337 NULL, 0),
1338 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1339 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1340 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1341 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1342 NULL, 0),
1343
1344 /* ADC PGA */
1345 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1346 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1347 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1348 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1349 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1350 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1351 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1352 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1353 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1354 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1355
1356 /* IF1 2 Mux */
1357 SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1358 0, 0, &rt5645_if1_adc_in_mux),
1359 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1360 0, 0, &rt5645_if2_adc_in_mux),
1361
1362 /* Digital Interface */
1363 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1364 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1365 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1366 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1367 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1368 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1369 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1370 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1371 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1372 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1373 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1374 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1375 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1376 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1377 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1378 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1379 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1380
1381 /* Digital Interface Select */
1382 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1383 0, 0, &rt5645_vad_adc_mux),
1384
1385 /* Audio Interface */
1386 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1387 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1388 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1389 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1390
1391 /* Output Side */
1392 /* DAC mixer before sound effect */
1393 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1394 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1395 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1396 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1397
1398 /* DAC2 channel Mux */
1399 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1400 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1401 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1402 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1403 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1404 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1405
1406 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1407 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1408
1409 /* DAC Mixer */
1410 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1411 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1412 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1413 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1414 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1415 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1416 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1417 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1418 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1419 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1420 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1421 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1422 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1423 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1424 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1425 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1426 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1427 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1428
1429 /* DACs */
1430 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1431 0),
1432 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1433 0),
1434 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1435 0),
1436 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1437 0),
1438 /* OUT Mixer */
1439 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1440 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1441 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1442 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1443 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1444 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1445 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1446 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1447 /* Ouput Volume */
1448 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1449 &spk_l_vol_control),
1450 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1451 &spk_r_vol_control),
1452 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1453 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1454 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1455 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1456 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1457 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1458 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1459 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1460 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1461 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1462 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1463 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1464 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1465
1466 /* HPO/LOUT/Mono Mixer */
1467 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1468 ARRAY_SIZE(rt5645_spo_l_mix)),
1469 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1470 ARRAY_SIZE(rt5645_spo_r_mix)),
1471 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1472 ARRAY_SIZE(rt5645_hpo_mix)),
1473 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1474 ARRAY_SIZE(rt5645_lout_mix)),
1475
1476 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1477 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1478 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1479 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1480 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1481 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1482
1483 /* PDM */
1484 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1485 0, NULL, 0),
1486 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1487 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1488
1489 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1490 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1491
1492 /* Output Lines */
1493 SND_SOC_DAPM_OUTPUT("HPOL"),
1494 SND_SOC_DAPM_OUTPUT("HPOR"),
1495 SND_SOC_DAPM_OUTPUT("LOUTL"),
1496 SND_SOC_DAPM_OUTPUT("LOUTR"),
1497 SND_SOC_DAPM_OUTPUT("PDM1L"),
1498 SND_SOC_DAPM_OUTPUT("PDM1R"),
1499 SND_SOC_DAPM_OUTPUT("SPOL"),
1500 SND_SOC_DAPM_OUTPUT("SPOR"),
1501};
1502
1503static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1504 { "IN1P", NULL, "LDO2" },
1505 { "IN2P", NULL, "LDO2" },
1506
1507 { "DMIC1", NULL, "DMIC L1" },
1508 { "DMIC1", NULL, "DMIC R1" },
1509 { "DMIC2", NULL, "DMIC L2" },
1510 { "DMIC2", NULL, "DMIC R2" },
1511
1512 { "BST1", NULL, "IN1P" },
1513 { "BST1", NULL, "IN1N" },
1514 { "BST1", NULL, "JD Power" },
1515 { "BST1", NULL, "Mic Det Power" },
1516 { "BST2", NULL, "IN2P" },
1517 { "BST2", NULL, "IN2N" },
1518
1519 { "INL VOL", NULL, "IN2P" },
1520 { "INR VOL", NULL, "IN2N" },
1521
1522 { "RECMIXL", "HPOL Switch", "HPOL" },
1523 { "RECMIXL", "INL Switch", "INL VOL" },
1524 { "RECMIXL", "BST2 Switch", "BST2" },
1525 { "RECMIXL", "BST1 Switch", "BST1" },
1526 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1527
1528 { "RECMIXR", "HPOR Switch", "HPOR" },
1529 { "RECMIXR", "INR Switch", "INR VOL" },
1530 { "RECMIXR", "BST2 Switch", "BST2" },
1531 { "RECMIXR", "BST1 Switch", "BST1" },
1532 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1533
1534 { "ADC L", NULL, "RECMIXL" },
1535 { "ADC L", NULL, "ADC L power" },
1536 { "ADC R", NULL, "RECMIXR" },
1537 { "ADC R", NULL, "ADC R power" },
1538
1539 {"DMIC L1", NULL, "DMIC CLK"},
1540 {"DMIC L1", NULL, "DMIC1 Power"},
1541 {"DMIC R1", NULL, "DMIC CLK"},
1542 {"DMIC R1", NULL, "DMIC1 Power"},
1543 {"DMIC L2", NULL, "DMIC CLK"},
1544 {"DMIC L2", NULL, "DMIC2 Power"},
1545 {"DMIC R2", NULL, "DMIC CLK"},
1546 {"DMIC R2", NULL, "DMIC2 Power"},
1547
1548 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1549 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1550
1551 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1552 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1553
1554 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1555 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1556
1557 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1558 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1559 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1560 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1561
1562 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1563 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1564 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1565 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1566
1567 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1568 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1569 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1570 { "Mono ADC L1 Mux", "ADC", "ADC L" },
1571
1572 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1573 { "Mono ADC R1 Mux", "ADC", "ADC R" },
1574 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1575 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1576
1577 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1578 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1579 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1580 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1581
1582 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1583 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1584 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1585
1586 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1587 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1588 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1589
1590 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1591 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1592 { "Mono ADC MIXL", NULL, "adc mono left filter" },
1593 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1594
1595 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1596 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1597 { "Mono ADC MIXR", NULL, "adc mono right filter" },
1598 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1599
1600 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1601 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1602 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1603
1604 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1605 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1606 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1607 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1608 { "VAD_ADC", NULL, "VAD ADC Mux" },
1609
1610 { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1611 { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1612 { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1613
1614 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1615 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1616 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1617
1618 { "IF1 ADC", NULL, "I2S1" },
1619 { "IF1 ADC", NULL, "IF1 ADC Mux" },
1620 { "IF2 ADC", NULL, "I2S2" },
1621 { "IF2 ADC", NULL, "IF2 ADC Mux" },
1622
1623 { "AIF1TX", NULL, "IF1 ADC" },
1624 { "AIF1TX", NULL, "IF2 ADC" },
1625 { "AIF2TX", NULL, "IF2 ADC" },
1626
1627 { "IF1 DAC1", NULL, "AIF1RX" },
1628 { "IF1 DAC2", NULL, "AIF1RX" },
1629 { "IF2 DAC", NULL, "AIF2RX" },
1630
1631 { "IF1 DAC1", NULL, "I2S1" },
1632 { "IF1 DAC2", NULL, "I2S1" },
1633 { "IF2 DAC", NULL, "I2S2" },
1634
1635 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1636 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1637 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1638 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1639 { "IF2 DAC L", NULL, "IF2 DAC" },
1640 { "IF2 DAC R", NULL, "IF2 DAC" },
1641
1642 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1643 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1644
1645 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1646 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1647
1648 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1649 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1650 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1651 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1652 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1653 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1654
1655 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1656 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1657 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1658 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1659 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1660 { "DAC L2 Volume", NULL, "dac mono left filter" },
1661
1662 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1663 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1664 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1665 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1666 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1667 { "DAC R2 Volume", NULL, "dac mono right filter" },
1668
1669 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1670 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1671 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1672 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1673 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1674 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1675 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1676 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1677
1678 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1679 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1680 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1681 { "Mono DAC MIXL", NULL, "dac mono left filter" },
1682 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1683 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1684 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1685 { "Mono DAC MIXR", NULL, "dac mono right filter" },
1686
1687 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1688 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1689 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1690 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1691 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1692 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1693
1694 { "DAC L1", NULL, "Stereo DAC MIXL" },
1695 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1696 { "DAC R1", NULL, "Stereo DAC MIXR" },
1697 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1698 { "DAC L2", NULL, "Mono DAC MIXL" },
1699 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1700 { "DAC R2", NULL, "Mono DAC MIXR" },
1701 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1702
1703 { "SPK MIXL", "BST1 Switch", "BST1" },
1704 { "SPK MIXL", "INL Switch", "INL VOL" },
1705 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1706 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1707 { "SPK MIXR", "BST2 Switch", "BST2" },
1708 { "SPK MIXR", "INR Switch", "INR VOL" },
1709 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1710 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1711
1712 { "OUT MIXL", "BST1 Switch", "BST1" },
1713 { "OUT MIXL", "INL Switch", "INL VOL" },
1714 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1715 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1716
1717 { "OUT MIXR", "BST2 Switch", "BST2" },
1718 { "OUT MIXR", "INR Switch", "INR VOL" },
1719 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1720 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1721
1722 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1723 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1724 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1725 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1726 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1727 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1728 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1729 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1730 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1731 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1732
1733 { "DAC 2", NULL, "DAC L2" },
1734 { "DAC 2", NULL, "DAC R2" },
1735 { "DAC 1", NULL, "DAC L1" },
1736 { "DAC 1", NULL, "DAC R1" },
1737 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1738 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1739 { "HPOVOL", NULL, "HPOVOL L" },
1740 { "HPOVOL", NULL, "HPOVOL R" },
1741 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1742 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1743
1744 { "SPKVOL L", "Switch", "SPK MIXL" },
1745 { "SPKVOL R", "Switch", "SPK MIXR" },
1746
1747 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1748 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1749 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1750 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1751 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1752 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1753
1754 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1755 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1756 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1757 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1758
1759 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1760 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1761 { "PDM1 L Mux", NULL, "PDM1 Power" },
1762 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1763 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1764 { "PDM1 R Mux", NULL, "PDM1 Power" },
1765
1766 { "HP amp", NULL, "HPO MIX" },
1767 { "HP amp", NULL, "JD Power" },
1768 { "HP amp", NULL, "Mic Det Power" },
1769 { "HP amp", NULL, "LDO2" },
1770 { "HPOL", NULL, "HP amp" },
1771 { "HPOR", NULL, "HP amp" },
1772
1773 { "LOUT amp", NULL, "LOUT MIX" },
1774 { "LOUTL", NULL, "LOUT amp" },
1775 { "LOUTR", NULL, "LOUT amp" },
1776
1777 { "PDM1 L", "Switch", "PDM1 L Mux" },
1778 { "PDM1 R", "Switch", "PDM1 R Mux" },
1779
1780 { "PDM1L", NULL, "PDM1 L" },
1781 { "PDM1R", NULL, "PDM1 R" },
1782
1783 { "SPK amp", NULL, "SPOL MIX" },
1784 { "SPK amp", NULL, "SPOR MIX" },
1785 { "SPOL", NULL, "SPK amp" },
1786 { "SPOR", NULL, "SPK amp" },
1787};
1788
1789static int rt5645_hw_params(struct snd_pcm_substream *substream,
1790 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1791{
1792 struct snd_soc_codec *codec = dai->codec;
1793 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1794 unsigned int val_len = 0, val_clk, mask_clk;
1795 int pre_div, bclk_ms, frame_size;
1796
1797 rt5645->lrck[dai->id] = params_rate(params);
1798 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1799 if (pre_div < 0) {
1800 dev_err(codec->dev, "Unsupported clock setting\n");
1801 return -EINVAL;
1802 }
1803 frame_size = snd_soc_params_to_frame_size(params);
1804 if (frame_size < 0) {
1805 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1806 return -EINVAL;
1807 }
1808 bclk_ms = frame_size > 32;
1809 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1810
1811 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1812 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1813 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1814 bclk_ms, pre_div, dai->id);
1815
1816 switch (params_width(params)) {
1817 case 16:
1818 break;
1819 case 20:
1820 val_len |= RT5645_I2S_DL_20;
1821 break;
1822 case 24:
1823 val_len |= RT5645_I2S_DL_24;
1824 break;
1825 case 8:
1826 val_len |= RT5645_I2S_DL_8;
1827 break;
1828 default:
1829 return -EINVAL;
1830 }
1831
1832 switch (dai->id) {
1833 case RT5645_AIF1:
1834 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1835 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1836 pre_div << RT5645_I2S_PD1_SFT;
1837 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1838 RT5645_I2S_DL_MASK, val_len);
1839 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1840 break;
1841 case RT5645_AIF2:
1842 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1843 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1844 pre_div << RT5645_I2S_PD2_SFT;
1845 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1846 RT5645_I2S_DL_MASK, val_len);
1847 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1848 break;
1849 default:
1850 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1851 return -EINVAL;
1852 }
1853
1854 return 0;
1855}
1856
1857static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1858{
1859 struct snd_soc_codec *codec = dai->codec;
1860 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1861 unsigned int reg_val = 0;
1862
1863 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1864 case SND_SOC_DAIFMT_CBM_CFM:
1865 rt5645->master[dai->id] = 1;
1866 break;
1867 case SND_SOC_DAIFMT_CBS_CFS:
1868 reg_val |= RT5645_I2S_MS_S;
1869 rt5645->master[dai->id] = 0;
1870 break;
1871 default:
1872 return -EINVAL;
1873 }
1874
1875 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1876 case SND_SOC_DAIFMT_NB_NF:
1877 break;
1878 case SND_SOC_DAIFMT_IB_NF:
1879 reg_val |= RT5645_I2S_BP_INV;
1880 break;
1881 default:
1882 return -EINVAL;
1883 }
1884
1885 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1886 case SND_SOC_DAIFMT_I2S:
1887 break;
1888 case SND_SOC_DAIFMT_LEFT_J:
1889 reg_val |= RT5645_I2S_DF_LEFT;
1890 break;
1891 case SND_SOC_DAIFMT_DSP_A:
1892 reg_val |= RT5645_I2S_DF_PCM_A;
1893 break;
1894 case SND_SOC_DAIFMT_DSP_B:
1895 reg_val |= RT5645_I2S_DF_PCM_B;
1896 break;
1897 default:
1898 return -EINVAL;
1899 }
1900 switch (dai->id) {
1901 case RT5645_AIF1:
1902 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1903 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1904 RT5645_I2S_DF_MASK, reg_val);
1905 break;
1906 case RT5645_AIF2:
1907 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1908 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1909 RT5645_I2S_DF_MASK, reg_val);
1910 break;
1911 default:
1912 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1913 return -EINVAL;
1914 }
1915 return 0;
1916}
1917
1918static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1919 int clk_id, unsigned int freq, int dir)
1920{
1921 struct snd_soc_codec *codec = dai->codec;
1922 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1923 unsigned int reg_val = 0;
1924
1925 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1926 return 0;
1927
1928 switch (clk_id) {
1929 case RT5645_SCLK_S_MCLK:
1930 reg_val |= RT5645_SCLK_SRC_MCLK;
1931 break;
1932 case RT5645_SCLK_S_PLL1:
1933 reg_val |= RT5645_SCLK_SRC_PLL1;
1934 break;
1935 case RT5645_SCLK_S_RCCLK:
1936 reg_val |= RT5645_SCLK_SRC_RCCLK;
1937 break;
1938 default:
1939 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1940 return -EINVAL;
1941 }
1942 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1943 RT5645_SCLK_SRC_MASK, reg_val);
1944 rt5645->sysclk = freq;
1945 rt5645->sysclk_src = clk_id;
1946
1947 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1948
1949 return 0;
1950}
1951
1952static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1953 unsigned int freq_in, unsigned int freq_out)
1954{
1955 struct snd_soc_codec *codec = dai->codec;
1956 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1957 struct rl6231_pll_code pll_code;
1958 int ret;
1959
1960 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
1961 freq_out == rt5645->pll_out)
1962 return 0;
1963
1964 if (!freq_in || !freq_out) {
1965 dev_dbg(codec->dev, "PLL disabled\n");
1966
1967 rt5645->pll_in = 0;
1968 rt5645->pll_out = 0;
1969 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1970 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
1971 return 0;
1972 }
1973
1974 switch (source) {
1975 case RT5645_PLL1_S_MCLK:
1976 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1977 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
1978 break;
1979 case RT5645_PLL1_S_BCLK1:
1980 case RT5645_PLL1_S_BCLK2:
1981 switch (dai->id) {
1982 case RT5645_AIF1:
1983 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1984 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
1985 break;
1986 case RT5645_AIF2:
1987 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1988 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
1989 break;
1990 default:
1991 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1992 return -EINVAL;
1993 }
1994 break;
1995 default:
1996 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1997 return -EINVAL;
1998 }
1999
2000 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2001 if (ret < 0) {
2002 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2003 return ret;
2004 }
2005
2006 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2007 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2008 pll_code.n_code, pll_code.k_code);
2009
2010 snd_soc_write(codec, RT5645_PLL_CTRL1,
2011 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2012 snd_soc_write(codec, RT5645_PLL_CTRL2,
2013 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2014 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2015
2016 rt5645->pll_in = freq_in;
2017 rt5645->pll_out = freq_out;
2018 rt5645->pll_src = source;
2019
2020 return 0;
2021}
2022
2023static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2024 unsigned int rx_mask, int slots, int slot_width)
2025{
2026 struct snd_soc_codec *codec = dai->codec;
2027 unsigned int val = 0;
2028
2029 if (rx_mask || tx_mask)
2030 val |= (1 << 14);
2031
2032 switch (slots) {
2033 case 4:
2034 val |= (1 << 12);
2035 break;
2036 case 6:
2037 val |= (2 << 12);
2038 break;
2039 case 8:
2040 val |= (3 << 12);
2041 break;
2042 case 2:
2043 default:
2044 break;
2045 }
2046
2047 switch (slot_width) {
2048 case 20:
2049 val |= (1 << 10);
2050 break;
2051 case 24:
2052 val |= (2 << 10);
2053 break;
2054 case 32:
2055 val |= (3 << 10);
2056 break;
2057 case 16:
2058 default:
2059 break;
2060 }
2061
2062 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2063
2064 return 0;
2065}
2066
2067static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2068 enum snd_soc_bias_level level)
2069{
2070 switch (level) {
2071 case SND_SOC_BIAS_STANDBY:
2072 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2073 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2074 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2075 RT5645_PWR_BG | RT5645_PWR_VREF2,
2076 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2077 RT5645_PWR_BG | RT5645_PWR_VREF2);
2078 mdelay(10);
2079 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2080 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2081 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2082 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2083 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2084 }
2085 break;
2086
2087 case SND_SOC_BIAS_OFF:
2088 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2089 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2090 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2091 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2092 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2093 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2094 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2095 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2096 break;
2097
2098 default:
2099 break;
2100 }
2101 codec->dapm.bias_level = level;
2102
2103 return 0;
2104}
2105
2106static int rt5645_probe(struct snd_soc_codec *codec)
2107{
2108 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2109
2110 rt5645->codec = codec;
2111
2112 rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2113
2114 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2115
2116 return 0;
2117}
2118
2119static int rt5645_remove(struct snd_soc_codec *codec)
2120{
2121 rt5645_reset(codec);
2122 return 0;
2123}
2124
2125#ifdef CONFIG_PM
2126static int rt5645_suspend(struct snd_soc_codec *codec)
2127{
2128 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2129
2130 regcache_cache_only(rt5645->regmap, true);
2131 regcache_mark_dirty(rt5645->regmap);
2132
2133 return 0;
2134}
2135
2136static int rt5645_resume(struct snd_soc_codec *codec)
2137{
2138 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2139
2140 regcache_cache_only(rt5645->regmap, false);
2141 regcache_sync(rt5645->regmap);
2142
2143 return 0;
2144}
2145#else
2146#define rt5645_suspend NULL
2147#define rt5645_resume NULL
2148#endif
2149
2150#define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2151#define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2152 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2153
2154static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2155 .hw_params = rt5645_hw_params,
2156 .set_fmt = rt5645_set_dai_fmt,
2157 .set_sysclk = rt5645_set_dai_sysclk,
2158 .set_tdm_slot = rt5645_set_tdm_slot,
2159 .set_pll = rt5645_set_dai_pll,
2160};
2161
2162static struct snd_soc_dai_driver rt5645_dai[] = {
2163 {
2164 .name = "rt5645-aif1",
2165 .id = RT5645_AIF1,
2166 .playback = {
2167 .stream_name = "AIF1 Playback",
2168 .channels_min = 1,
2169 .channels_max = 2,
2170 .rates = RT5645_STEREO_RATES,
2171 .formats = RT5645_FORMATS,
2172 },
2173 .capture = {
2174 .stream_name = "AIF1 Capture",
2175 .channels_min = 1,
2176 .channels_max = 2,
2177 .rates = RT5645_STEREO_RATES,
2178 .formats = RT5645_FORMATS,
2179 },
2180 .ops = &rt5645_aif_dai_ops,
2181 },
2182 {
2183 .name = "rt5645-aif2",
2184 .id = RT5645_AIF2,
2185 .playback = {
2186 .stream_name = "AIF2 Playback",
2187 .channels_min = 1,
2188 .channels_max = 2,
2189 .rates = RT5645_STEREO_RATES,
2190 .formats = RT5645_FORMATS,
2191 },
2192 .capture = {
2193 .stream_name = "AIF2 Capture",
2194 .channels_min = 1,
2195 .channels_max = 2,
2196 .rates = RT5645_STEREO_RATES,
2197 .formats = RT5645_FORMATS,
2198 },
2199 .ops = &rt5645_aif_dai_ops,
2200 },
2201};
2202
2203static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2204 .probe = rt5645_probe,
2205 .remove = rt5645_remove,
2206 .suspend = rt5645_suspend,
2207 .resume = rt5645_resume,
2208 .set_bias_level = rt5645_set_bias_level,
2209 .idle_bias_off = true,
2210 .controls = rt5645_snd_controls,
2211 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2212 .dapm_widgets = rt5645_dapm_widgets,
2213 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2214 .dapm_routes = rt5645_dapm_routes,
2215 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2216};
2217
2218static const struct regmap_config rt5645_regmap = {
2219 .reg_bits = 8,
2220 .val_bits = 16,
2221
2222 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2223 RT5645_PR_SPACING),
2224 .volatile_reg = rt5645_volatile_register,
2225 .readable_reg = rt5645_readable_register,
2226
2227 .cache_type = REGCACHE_RBTREE,
2228 .reg_defaults = rt5645_reg,
2229 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2230 .ranges = rt5645_ranges,
2231 .num_ranges = ARRAY_SIZE(rt5645_ranges),
2232};
2233
2234static const struct i2c_device_id rt5645_i2c_id[] = {
2235 { "rt5645", 0 },
2236 { }
2237};
2238MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2239
2240static int rt5645_i2c_probe(struct i2c_client *i2c,
2241 const struct i2c_device_id *id)
2242{
2243 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2244 struct rt5645_priv *rt5645;
2245 int ret;
2246 unsigned int val;
2247
2248 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2249 GFP_KERNEL);
2250 if (rt5645 == NULL)
2251 return -ENOMEM;
2252
2253 i2c_set_clientdata(i2c, rt5645);
2254
2255 if (pdata)
2256 rt5645->pdata = *pdata;
2257
2258 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2259 if (IS_ERR(rt5645->regmap)) {
2260 ret = PTR_ERR(rt5645->regmap);
2261 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2262 ret);
2263 return ret;
2264 }
2265
2266 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2267 if (val != RT5645_DEVICE_ID) {
2268 dev_err(&i2c->dev,
2269 "Device with ID register %x is not rt5645\n", val);
2270 return -ENODEV;
2271 }
2272
2273 regmap_write(rt5645->regmap, RT5645_RESET, 0);
2274
2275 ret = regmap_register_patch(rt5645->regmap, init_list,
2276 ARRAY_SIZE(init_list));
2277 if (ret != 0)
2278 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2279
2280 if (rt5645->pdata.in2_diff)
2281 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2282 RT5645_IN_DF2, RT5645_IN_DF2);
2283
2284 if (rt5645->pdata.dmic_en) {
2285 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2286 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2287
2288 switch (rt5645->pdata.dmic1_data_pin) {
2289 case RT5645_DMIC_DATA_IN2N:
2290 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2291 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2292 break;
2293
2294 case RT5645_DMIC_DATA_GPIO5:
2295 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2296 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2297 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2298 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2299 break;
2300
2301 case RT5645_DMIC_DATA_GPIO11:
2302 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2303 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2304 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2305 RT5645_GP11_PIN_MASK,
2306 RT5645_GP11_PIN_DMIC1_SDA);
2307 break;
2308
2309 default:
2310 break;
2311 }
2312
2313 switch (rt5645->pdata.dmic2_data_pin) {
2314 case RT5645_DMIC_DATA_IN2P:
2315 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2316 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2317 break;
2318
2319 case RT5645_DMIC_DATA_GPIO6:
2320 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2321 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2322 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2323 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2324 break;
2325
2326 case RT5645_DMIC_DATA_GPIO10:
2327 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2328 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2329 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2330 RT5645_GP10_PIN_MASK,
2331 RT5645_GP10_PIN_DMIC2_SDA);
2332 break;
2333
2334 case RT5645_DMIC_DATA_GPIO12:
2335 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2336 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2337 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2338 RT5645_GP12_PIN_MASK,
2339 RT5645_GP12_PIN_DMIC2_SDA);
2340 break;
2341
2342 default:
2343 break;
2344 }
2345
2346 }
2347
2348 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2349 rt5645_dai, ARRAY_SIZE(rt5645_dai));
2350 if (ret < 0)
2351 goto err;
2352
2353 return 0;
2354err:
2355 return ret;
2356}
2357
2358static int rt5645_i2c_remove(struct i2c_client *i2c)
2359{
2360 snd_soc_unregister_codec(&i2c->dev);
2361
2362 return 0;
2363}
2364
2365static struct i2c_driver rt5645_i2c_driver = {
2366 .driver = {
2367 .name = "rt5645",
2368 .owner = THIS_MODULE,
2369 },
2370 .probe = rt5645_i2c_probe,
2371 .remove = rt5645_i2c_remove,
2372 .id_table = rt5645_i2c_id,
2373};
2374module_i2c_driver(rt5645_i2c_driver);
2375
2376MODULE_DESCRIPTION("ASoC RT5645 driver");
2377MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2378MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rt5645.h b/sound/soc/codecs/rt5645.h
new file mode 100644
index 000000000000..355b7e9eefab
--- /dev/null
+++ b/sound/soc/codecs/rt5645.h
@@ -0,0 +1,2181 @@
1/*
2 * rt5645.h -- RT5645 ALSA SoC audio driver
3 *
4 * Copyright 2013 Realtek Microelectronics
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __RT5645_H__
13#define __RT5645_H__
14
15#include <sound/rt5645.h>
16
17/* Info */
18#define RT5645_RESET 0x00
19#define RT5645_VENDOR_ID 0xfd
20#define RT5645_VENDOR_ID1 0xfe
21#define RT5645_VENDOR_ID2 0xff
22/* I/O - Output */
23#define RT5645_SPK_VOL 0x01
24#define RT5645_HP_VOL 0x02
25#define RT5645_LOUT1 0x03
26#define RT5645_LOUT_CTRL 0x05
27/* I/O - Input */
28#define RT5645_IN1_CTRL1 0x0a
29#define RT5645_IN1_CTRL2 0x0b
30#define RT5645_IN1_CTRL3 0x0c
31#define RT5645_IN2_CTRL 0x0d
32#define RT5645_INL1_INR1_VOL 0x0f
33#define RT5645_SPK_FUNC_LIM 0x14
34#define RT5645_ADJ_HPF_CTRL 0x16
35/* I/O - ADC/DAC/DMIC */
36#define RT5645_DAC1_DIG_VOL 0x19
37#define RT5645_DAC2_DIG_VOL 0x1a
38#define RT5645_DAC_CTRL 0x1b
39#define RT5645_STO1_ADC_DIG_VOL 0x1c
40#define RT5645_MONO_ADC_DIG_VOL 0x1d
41#define RT5645_ADC_BST_VOL1 0x1e
42/* Mixer - D-D */
43#define RT5645_ADC_BST_VOL2 0x20
44#define RT5645_STO1_ADC_MIXER 0x27
45#define RT5645_MONO_ADC_MIXER 0x28
46#define RT5645_AD_DA_MIXER 0x29
47#define RT5645_STO_DAC_MIXER 0x2a
48#define RT5645_MONO_DAC_MIXER 0x2b
49#define RT5645_DIG_MIXER 0x2c
50#define RT5645_DIG_INF1_DATA 0x2f
51/* Mixer - PDM */
52#define RT5645_PDM_OUT_CTRL 0x31
53/* Mixer - ADC */
54#define RT5645_REC_L1_MIXER 0x3b
55#define RT5645_REC_L2_MIXER 0x3c
56#define RT5645_REC_R1_MIXER 0x3d
57#define RT5645_REC_R2_MIXER 0x3e
58/* Mixer - DAC */
59#define RT5645_HPMIXL_CTRL 0x3f
60#define RT5645_HPOMIXL_CTRL 0x40
61#define RT5645_HPMIXR_CTRL 0x41
62#define RT5645_HPOMIXR_CTRL 0x42
63#define RT5645_HPO_MIXER 0x45
64#define RT5645_SPK_L_MIXER 0x46
65#define RT5645_SPK_R_MIXER 0x47
66#define RT5645_SPO_MIXER 0x48
67#define RT5645_SPO_CLSD_RATIO 0x4a
68#define RT5645_OUT_L_GAIN1 0x4d
69#define RT5645_OUT_L_GAIN2 0x4e
70#define RT5645_OUT_L1_MIXER 0x4f
71#define RT5645_OUT_R_GAIN1 0x50
72#define RT5645_OUT_R_GAIN2 0x51
73#define RT5645_OUT_R1_MIXER 0x52
74#define RT5645_LOUT_MIXER 0x53
75/* Haptic */
76#define RT5645_HAPTIC_CTRL1 0x56
77#define RT5645_HAPTIC_CTRL2 0x57
78#define RT5645_HAPTIC_CTRL3 0x58
79#define RT5645_HAPTIC_CTRL4 0x59
80#define RT5645_HAPTIC_CTRL5 0x5a
81#define RT5645_HAPTIC_CTRL6 0x5b
82#define RT5645_HAPTIC_CTRL7 0x5c
83#define RT5645_HAPTIC_CTRL8 0x5d
84#define RT5645_HAPTIC_CTRL9 0x5e
85#define RT5645_HAPTIC_CTRL10 0x5f
86/* Power */
87#define RT5645_PWR_DIG1 0x61
88#define RT5645_PWR_DIG2 0x62
89#define RT5645_PWR_ANLG1 0x63
90#define RT5645_PWR_ANLG2 0x64
91#define RT5645_PWR_MIXER 0x65
92#define RT5645_PWR_VOL 0x66
93/* Private Register Control */
94#define RT5645_PRIV_INDEX 0x6a
95#define RT5645_PRIV_DATA 0x6c
96/* Format - ADC/DAC */
97#define RT5645_I2S1_SDP 0x70
98#define RT5645_I2S2_SDP 0x71
99#define RT5645_ADDA_CLK1 0x73
100#define RT5645_ADDA_CLK2 0x74
101#define RT5645_DMIC_CTRL1 0x75
102#define RT5645_DMIC_CTRL2 0x76
103/* Format - TDM Control */
104#define RT5645_TDM_CTRL_1 0x77
105#define RT5645_TDM_CTRL_2 0x78
106#define RT5645_TDM_CTRL_3 0x79
107
108/* Function - Analog */
109#define RT5645_GLB_CLK 0x80
110#define RT5645_PLL_CTRL1 0x81
111#define RT5645_PLL_CTRL2 0x82
112#define RT5645_ASRC_1 0x83
113#define RT5645_ASRC_2 0x84
114#define RT5645_ASRC_3 0x85
115#define RT5645_ASRC_4 0x8a
116#define RT5645_DEPOP_M1 0x8e
117#define RT5645_DEPOP_M2 0x8f
118#define RT5645_DEPOP_M3 0x90
119#define RT5645_CHARGE_PUMP 0x91
120#define RT5645_MICBIAS 0x93
121#define RT5645_A_JD_CTRL1 0x94
122#define RT5645_VAD_CTRL4 0x9d
123#define RT5645_CLSD_OUT_CTRL 0xa0
124/* Function - Digital */
125#define RT5645_ADC_EQ_CTRL1 0xae
126#define RT5645_ADC_EQ_CTRL2 0xaf
127#define RT5645_EQ_CTRL1 0xb0
128#define RT5645_EQ_CTRL2 0xb1
129#define RT5645_ALC_CTRL_1 0xb3
130#define RT5645_ALC_CTRL_2 0xb4
131#define RT5645_ALC_CTRL_3 0xb5
132#define RT5645_ALC_CTRL_4 0xb6
133#define RT5645_ALC_CTRL_5 0xb7
134#define RT5645_JD_CTRL 0xbb
135#define RT5645_IRQ_CTRL1 0xbc
136#define RT5645_IRQ_CTRL2 0xbd
137#define RT5645_IRQ_CTRL3 0xbe
138#define RT5645_INT_IRQ_ST 0xbf
139#define RT5645_GPIO_CTRL1 0xc0
140#define RT5645_GPIO_CTRL2 0xc1
141#define RT5645_GPIO_CTRL3 0xc2
142#define RT5645_BASS_BACK 0xcf
143#define RT5645_MP3_PLUS1 0xd0
144#define RT5645_MP3_PLUS2 0xd1
145#define RT5645_ADJ_HPF1 0xd3
146#define RT5645_ADJ_HPF2 0xd4
147#define RT5645_HP_CALIB_AMP_DET 0xd6
148#define RT5645_SV_ZCD1 0xd9
149#define RT5645_SV_ZCD2 0xda
150#define RT5645_IL_CMD 0xdb
151#define RT5645_IL_CMD2 0xdc
152#define RT5645_IL_CMD3 0xdd
153#define RT5645_DRC1_HL_CTRL1 0xe7
154#define RT5645_DRC2_HL_CTRL1 0xe9
155#define RT5645_MUTI_DRC_CTRL1 0xea
156#define RT5645_ADC_MONO_HP_CTRL1 0xec
157#define RT5645_ADC_MONO_HP_CTRL2 0xed
158#define RT5645_DRC2_CTRL1 0xf0
159#define RT5645_DRC2_CTRL2 0xf1
160#define RT5645_DRC2_CTRL3 0xf2
161#define RT5645_DRC2_CTRL4 0xf3
162#define RT5645_DRC2_CTRL5 0xf4
163#define RT5645_JD_CTRL3 0xf8
164#define RT5645_JD_CTRL4 0xf9
165/* General Control */
166#define RT5645_GEN_CTRL1 0xfa
167#define RT5645_GEN_CTRL2 0xfb
168#define RT5645_GEN_CTRL3 0xfc
169
170
171/* Index of Codec Private Register definition */
172#define RT5645_DIG_VOL 0x00
173#define RT5645_PR_ALC_CTRL_1 0x01
174#define RT5645_PR_ALC_CTRL_2 0x02
175#define RT5645_PR_ALC_CTRL_3 0x03
176#define RT5645_PR_ALC_CTRL_4 0x04
177#define RT5645_PR_ALC_CTRL_5 0x05
178#define RT5645_PR_ALC_CTRL_6 0x06
179#define RT5645_BIAS_CUR1 0x12
180#define RT5645_BIAS_CUR3 0x14
181#define RT5645_CLSD_INT_REG1 0x1c
182#define RT5645_MAMP_INT_REG2 0x37
183#define RT5645_CHOP_DAC_ADC 0x3d
184#define RT5645_MIXER_INT_REG 0x3f
185#define RT5645_3D_SPK 0x63
186#define RT5645_WND_1 0x6c
187#define RT5645_WND_2 0x6d
188#define RT5645_WND_3 0x6e
189#define RT5645_WND_4 0x6f
190#define RT5645_WND_5 0x70
191#define RT5645_WND_8 0x73
192#define RT5645_DIP_SPK_INF 0x75
193#define RT5645_HP_DCC_INT1 0x77
194#define RT5645_EQ_BW_LOP 0xa0
195#define RT5645_EQ_GN_LOP 0xa1
196#define RT5645_EQ_FC_BP1 0xa2
197#define RT5645_EQ_BW_BP1 0xa3
198#define RT5645_EQ_GN_BP1 0xa4
199#define RT5645_EQ_FC_BP2 0xa5
200#define RT5645_EQ_BW_BP2 0xa6
201#define RT5645_EQ_GN_BP2 0xa7
202#define RT5645_EQ_FC_BP3 0xa8
203#define RT5645_EQ_BW_BP3 0xa9
204#define RT5645_EQ_GN_BP3 0xaa
205#define RT5645_EQ_FC_BP4 0xab
206#define RT5645_EQ_BW_BP4 0xac
207#define RT5645_EQ_GN_BP4 0xad
208#define RT5645_EQ_FC_HIP1 0xae
209#define RT5645_EQ_GN_HIP1 0xaf
210#define RT5645_EQ_FC_HIP2 0xb0
211#define RT5645_EQ_BW_HIP2 0xb1
212#define RT5645_EQ_GN_HIP2 0xb2
213#define RT5645_EQ_PRE_VOL 0xb3
214#define RT5645_EQ_PST_VOL 0xb4
215
216
217/* global definition */
218#define RT5645_L_MUTE (0x1 << 15)
219#define RT5645_L_MUTE_SFT 15
220#define RT5645_VOL_L_MUTE (0x1 << 14)
221#define RT5645_VOL_L_SFT 14
222#define RT5645_R_MUTE (0x1 << 7)
223#define RT5645_R_MUTE_SFT 7
224#define RT5645_VOL_R_MUTE (0x1 << 6)
225#define RT5645_VOL_R_SFT 6
226#define RT5645_L_VOL_MASK (0x3f << 8)
227#define RT5645_L_VOL_SFT 8
228#define RT5645_R_VOL_MASK (0x3f)
229#define RT5645_R_VOL_SFT 0
230
231/* IN1 Control 1 (0x0a) */
232#define RT5645_CBJ_BST1_MASK (0xf << 12)
233#define RT5645_CBJ_BST1_SFT (12)
234#define RT5645_CBJ_JD_HP_EN (0x1 << 9)
235#define RT5645_CBJ_JD_MIC_EN (0x1 << 8)
236#define RT5645_CBJ_JD_MIC_SW_EN (0x1 << 7)
237#define RT5645_CBJ_MIC_SEL_R (0x1 << 6)
238#define RT5645_CBJ_MIC_SEL_L (0x1 << 5)
239#define RT5645_CBJ_MIC_SW (0x1 << 4)
240#define RT5645_CBJ_BST1_EN (0x1 << 2)
241
242/* IN1 Control 2 (0x0b) */
243#define RT5645_CBJ_MN_JD (0x1 << 12)
244#define RT5645_CAPLESS_EN (0x1 << 11)
245#define RT5645_CBJ_DET_MODE (0x1 << 7)
246
247/* IN1 Control 3 (0x0c) */
248#define RT5645_CBJ_TIE_G_L (0x1 << 15)
249#define RT5645_CBJ_TIE_G_R (0x1 << 14)
250
251/* IN2 Control (0x0d) */
252#define RT5645_BST_MASK1 (0xf<<12)
253#define RT5645_BST_SFT1 12
254#define RT5645_BST_MASK2 (0xf<<8)
255#define RT5645_BST_SFT2 8
256#define RT5645_IN_DF2 (0x1 << 6)
257#define RT5645_IN_SFT2 6
258
259/* INL and INR Volume Control (0x0f) */
260#define RT5645_INL_SEL_MASK (0x1 << 15)
261#define RT5645_INL_SEL_SFT 15
262#define RT5645_INL_SEL_IN4P (0x0 << 15)
263#define RT5645_INL_SEL_MONOP (0x1 << 15)
264#define RT5645_INL_VOL_MASK (0x1f << 8)
265#define RT5645_INL_VOL_SFT 8
266#define RT5645_INR_SEL_MASK (0x1 << 7)
267#define RT5645_INR_SEL_SFT 7
268#define RT5645_INR_SEL_IN4N (0x0 << 7)
269#define RT5645_INR_SEL_MONON (0x1 << 7)
270#define RT5645_INR_VOL_MASK (0x1f)
271#define RT5645_INR_VOL_SFT 0
272
273/* DAC1 Digital Volume (0x19) */
274#define RT5645_DAC_L1_VOL_MASK (0xff << 8)
275#define RT5645_DAC_L1_VOL_SFT 8
276#define RT5645_DAC_R1_VOL_MASK (0xff)
277#define RT5645_DAC_R1_VOL_SFT 0
278
279/* DAC2 Digital Volume (0x1a) */
280#define RT5645_DAC_L2_VOL_MASK (0xff << 8)
281#define RT5645_DAC_L2_VOL_SFT 8
282#define RT5645_DAC_R2_VOL_MASK (0xff)
283#define RT5645_DAC_R2_VOL_SFT 0
284
285/* DAC2 Control (0x1b) */
286#define RT5645_M_DAC_L2_VOL (0x1 << 13)
287#define RT5645_M_DAC_L2_VOL_SFT 13
288#define RT5645_M_DAC_R2_VOL (0x1 << 12)
289#define RT5645_M_DAC_R2_VOL_SFT 12
290#define RT5645_DAC2_L_SEL_MASK (0x7 << 4)
291#define RT5645_DAC2_L_SEL_SFT 4
292#define RT5645_DAC2_R_SEL_MASK (0x7 << 0)
293#define RT5645_DAC2_R_SEL_SFT 0
294
295/* ADC Digital Volume Control (0x1c) */
296#define RT5645_ADC_L_VOL_MASK (0x7f << 8)
297#define RT5645_ADC_L_VOL_SFT 8
298#define RT5645_ADC_R_VOL_MASK (0x7f)
299#define RT5645_ADC_R_VOL_SFT 0
300
301/* Mono ADC Digital Volume Control (0x1d) */
302#define RT5645_MONO_ADC_L_VOL_MASK (0x7f << 8)
303#define RT5645_MONO_ADC_L_VOL_SFT 8
304#define RT5645_MONO_ADC_R_VOL_MASK (0x7f)
305#define RT5645_MONO_ADC_R_VOL_SFT 0
306
307/* ADC Boost Volume Control (0x1e) */
308#define RT5645_STO1_ADC_L_BST_MASK (0x3 << 14)
309#define RT5645_STO1_ADC_L_BST_SFT 14
310#define RT5645_STO1_ADC_R_BST_MASK (0x3 << 12)
311#define RT5645_STO1_ADC_R_BST_SFT 12
312#define RT5645_STO1_ADC_COMP_MASK (0x3 << 10)
313#define RT5645_STO1_ADC_COMP_SFT 10
314#define RT5645_STO2_ADC_L_BST_MASK (0x3 << 8)
315#define RT5645_STO2_ADC_L_BST_SFT 8
316#define RT5645_STO2_ADC_R_BST_MASK (0x3 << 6)
317#define RT5645_STO2_ADC_R_BST_SFT 6
318#define RT5645_STO2_ADC_COMP_MASK (0x3 << 4)
319#define RT5645_STO2_ADC_COMP_SFT 4
320
321/* Stereo2 ADC Mixer Control (0x26) */
322#define RT5645_STO2_ADC_SRC_MASK (0x1 << 15)
323#define RT5645_STO2_ADC_SRC_SFT 15
324
325/* Stereo ADC Mixer Control (0x27) */
326#define RT5645_M_ADC_L1 (0x1 << 14)
327#define RT5645_M_ADC_L1_SFT 14
328#define RT5645_M_ADC_L2 (0x1 << 13)
329#define RT5645_M_ADC_L2_SFT 13
330#define RT5645_ADC_1_SRC_MASK (0x1 << 12)
331#define RT5645_ADC_1_SRC_SFT 12
332#define RT5645_ADC_1_SRC_ADC (0x1 << 12)
333#define RT5645_ADC_1_SRC_DACMIX (0x0 << 12)
334#define RT5645_ADC_2_SRC_MASK (0x1 << 11)
335#define RT5645_ADC_2_SRC_SFT 11
336#define RT5645_DMIC_SRC_MASK (0x1 << 8)
337#define RT5645_DMIC_SRC_SFT 8
338#define RT5645_M_ADC_R1 (0x1 << 6)
339#define RT5645_M_ADC_R1_SFT 6
340#define RT5645_M_ADC_R2 (0x1 << 5)
341#define RT5645_M_ADC_R2_SFT 5
342#define RT5645_DMIC3_SRC_MASK (0x1 << 1)
343#define RT5645_DMIC3_SRC_SFT 0
344
345/* Mono ADC Mixer Control (0x28) */
346#define RT5645_M_MONO_ADC_L1 (0x1 << 14)
347#define RT5645_M_MONO_ADC_L1_SFT 14
348#define RT5645_M_MONO_ADC_L2 (0x1 << 13)
349#define RT5645_M_MONO_ADC_L2_SFT 13
350#define RT5645_MONO_ADC_L1_SRC_MASK (0x1 << 12)
351#define RT5645_MONO_ADC_L1_SRC_SFT 12
352#define RT5645_MONO_ADC_L1_SRC_DACMIXL (0x0 << 12)
353#define RT5645_MONO_ADC_L1_SRC_ADCL (0x1 << 12)
354#define RT5645_MONO_ADC_L2_SRC_MASK (0x1 << 11)
355#define RT5645_MONO_ADC_L2_SRC_SFT 11
356#define RT5645_MONO_DMIC_L_SRC_MASK (0x1 << 8)
357#define RT5645_MONO_DMIC_L_SRC_SFT 8
358#define RT5645_M_MONO_ADC_R1 (0x1 << 6)
359#define RT5645_M_MONO_ADC_R1_SFT 6
360#define RT5645_M_MONO_ADC_R2 (0x1 << 5)
361#define RT5645_M_MONO_ADC_R2_SFT 5
362#define RT5645_MONO_ADC_R1_SRC_MASK (0x1 << 4)
363#define RT5645_MONO_ADC_R1_SRC_SFT 4
364#define RT5645_MONO_ADC_R1_SRC_ADCR (0x1 << 4)
365#define RT5645_MONO_ADC_R1_SRC_DACMIXR (0x0 << 4)
366#define RT5645_MONO_ADC_R2_SRC_MASK (0x1 << 3)
367#define RT5645_MONO_ADC_R2_SRC_SFT 3
368#define RT5645_MONO_DMIC_R_SRC_MASK (0x3)
369#define RT5645_MONO_DMIC_R_SRC_SFT 0
370
371/* ADC Mixer to DAC Mixer Control (0x29) */
372#define RT5645_M_ADCMIX_L (0x1 << 15)
373#define RT5645_M_ADCMIX_L_SFT 15
374#define RT5645_M_DAC1_L (0x1 << 14)
375#define RT5645_M_DAC1_L_SFT 14
376#define RT5645_DAC1_R_SEL_MASK (0x3 << 10)
377#define RT5645_DAC1_R_SEL_SFT 10
378#define RT5645_DAC1_R_SEL_IF1 (0x0 << 10)
379#define RT5645_DAC1_R_SEL_IF2 (0x1 << 10)
380#define RT5645_DAC1_R_SEL_IF3 (0x2 << 10)
381#define RT5645_DAC1_R_SEL_IF4 (0x3 << 10)
382#define RT5645_DAC1_L_SEL_MASK (0x3 << 8)
383#define RT5645_DAC1_L_SEL_SFT 8
384#define RT5645_DAC1_L_SEL_IF1 (0x0 << 8)
385#define RT5645_DAC1_L_SEL_IF2 (0x1 << 8)
386#define RT5645_DAC1_L_SEL_IF3 (0x2 << 8)
387#define RT5645_DAC1_L_SEL_IF4 (0x3 << 8)
388#define RT5645_M_ADCMIX_R (0x1 << 7)
389#define RT5645_M_ADCMIX_R_SFT 7
390#define RT5645_M_DAC1_R (0x1 << 6)
391#define RT5645_M_DAC1_R_SFT 6
392
393/* Stereo DAC Mixer Control (0x2a) */
394#define RT5645_M_DAC_L1 (0x1 << 14)
395#define RT5645_M_DAC_L1_SFT 14
396#define RT5645_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
397#define RT5645_DAC_L1_STO_L_VOL_SFT 13
398#define RT5645_M_DAC_L2 (0x1 << 12)
399#define RT5645_M_DAC_L2_SFT 12
400#define RT5645_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
401#define RT5645_DAC_L2_STO_L_VOL_SFT 11
402#define RT5645_M_ANC_DAC_L (0x1 << 10)
403#define RT5645_M_ANC_DAC_L_SFT 10
404#define RT5645_M_DAC_R1_STO_L (0x1 << 9)
405#define RT5645_M_DAC_R1_STO_L_SFT 9
406#define RT5645_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
407#define RT5645_DAC_R1_STO_L_VOL_SFT 8
408#define RT5645_M_DAC_R1 (0x1 << 6)
409#define RT5645_M_DAC_R1_SFT 6
410#define RT5645_DAC_R1_STO_R_VOL_MASK (0x1 << 5)
411#define RT5645_DAC_R1_STO_R_VOL_SFT 5
412#define RT5645_M_DAC_R2 (0x1 << 4)
413#define RT5645_M_DAC_R2_SFT 4
414#define RT5645_DAC_R2_STO_R_VOL_MASK (0x1 << 3)
415#define RT5645_DAC_R2_STO_R_VOL_SFT 3
416#define RT5645_M_ANC_DAC_R (0x1 << 2)
417#define RT5645_M_ANC_DAC_R_SFT 2
418#define RT5645_M_DAC_L1_STO_R (0x1 << 1)
419#define RT5645_M_DAC_L1_STO_R_SFT 1
420#define RT5645_DAC_L1_STO_R_VOL_MASK (0x1)
421#define RT5645_DAC_L1_STO_R_VOL_SFT 0
422
423/* Mono DAC Mixer Control (0x2b) */
424#define RT5645_M_DAC_L1_MONO_L (0x1 << 14)
425#define RT5645_M_DAC_L1_MONO_L_SFT 14
426#define RT5645_DAC_L1_MONO_L_VOL_MASK (0x1 << 13)
427#define RT5645_DAC_L1_MONO_L_VOL_SFT 13
428#define RT5645_M_DAC_L2_MONO_L (0x1 << 12)
429#define RT5645_M_DAC_L2_MONO_L_SFT 12
430#define RT5645_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
431#define RT5645_DAC_L2_MONO_L_VOL_SFT 11
432#define RT5645_M_DAC_R2_MONO_L (0x1 << 10)
433#define RT5645_M_DAC_R2_MONO_L_SFT 10
434#define RT5645_DAC_R2_MONO_L_VOL_MASK (0x1 << 9)
435#define RT5645_DAC_R2_MONO_L_VOL_SFT 9
436#define RT5645_M_DAC_R1_MONO_R (0x1 << 6)
437#define RT5645_M_DAC_R1_MONO_R_SFT 6
438#define RT5645_DAC_R1_MONO_R_VOL_MASK (0x1 << 5)
439#define RT5645_DAC_R1_MONO_R_VOL_SFT 5
440#define RT5645_M_DAC_R2_MONO_R (0x1 << 4)
441#define RT5645_M_DAC_R2_MONO_R_SFT 4
442#define RT5645_DAC_R2_MONO_R_VOL_MASK (0x1 << 3)
443#define RT5645_DAC_R2_MONO_R_VOL_SFT 3
444#define RT5645_M_DAC_L2_MONO_R (0x1 << 2)
445#define RT5645_M_DAC_L2_MONO_R_SFT 2
446#define RT5645_DAC_L2_MONO_R_VOL_MASK (0x1 << 1)
447#define RT5645_DAC_L2_MONO_R_VOL_SFT 1
448
449/* Digital Mixer Control (0x2c) */
450#define RT5645_M_STO_L_DAC_L (0x1 << 15)
451#define RT5645_M_STO_L_DAC_L_SFT 15
452#define RT5645_STO_L_DAC_L_VOL_MASK (0x1 << 14)
453#define RT5645_STO_L_DAC_L_VOL_SFT 14
454#define RT5645_M_DAC_L2_DAC_L (0x1 << 13)
455#define RT5645_M_DAC_L2_DAC_L_SFT 13
456#define RT5645_DAC_L2_DAC_L_VOL_MASK (0x1 << 12)
457#define RT5645_DAC_L2_DAC_L_VOL_SFT 12
458#define RT5645_M_STO_R_DAC_R (0x1 << 11)
459#define RT5645_M_STO_R_DAC_R_SFT 11
460#define RT5645_STO_R_DAC_R_VOL_MASK (0x1 << 10)
461#define RT5645_STO_R_DAC_R_VOL_SFT 10
462#define RT5645_M_DAC_R2_DAC_R (0x1 << 9)
463#define RT5645_M_DAC_R2_DAC_R_SFT 9
464#define RT5645_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
465#define RT5645_DAC_R2_DAC_R_VOL_SFT 8
466#define RT5645_M_DAC_R2_DAC_L (0x1 << 7)
467#define RT5645_M_DAC_R2_DAC_L_SFT 7
468#define RT5645_DAC_R2_DAC_L_VOL_MASK (0x1 << 6)
469#define RT5645_DAC_R2_DAC_L_VOL_SFT 6
470#define RT5645_M_DAC_L2_DAC_R (0x1 << 5)
471#define RT5645_M_DAC_L2_DAC_R_SFT 5
472#define RT5645_DAC_L2_DAC_R_VOL_MASK (0x1 << 4)
473#define RT5645_DAC_L2_DAC_R_VOL_SFT 4
474
475/* Digital Interface Data Control (0x2f) */
476#define RT5645_IF1_ADC2_IN_SEL (0x1 << 15)
477#define RT5645_IF1_ADC2_IN_SFT 15
478#define RT5645_IF2_ADC_IN_MASK (0x7 << 12)
479#define RT5645_IF2_ADC_IN_SFT 12
480#define RT5645_IF2_DAC_SEL_MASK (0x3 << 10)
481#define RT5645_IF2_DAC_SEL_SFT 10
482#define RT5645_IF2_ADC_SEL_MASK (0x3 << 8)
483#define RT5645_IF2_ADC_SEL_SFT 8
484#define RT5645_IF3_DAC_SEL_MASK (0x3 << 6)
485#define RT5645_IF3_DAC_SEL_SFT 6
486#define RT5645_IF3_ADC_SEL_MASK (0x3 << 4)
487#define RT5645_IF3_ADC_SEL_SFT 4
488#define RT5645_IF3_ADC_IN_MASK (0x7)
489#define RT5645_IF3_ADC_IN_SFT 0
490
491/* PDM Output Control (0x31) */
492#define RT5645_PDM1_L_MASK (0x1 << 15)
493#define RT5645_PDM1_L_SFT 15
494#define RT5645_M_PDM1_L (0x1 << 14)
495#define RT5645_M_PDM1_L_SFT 14
496#define RT5645_PDM1_R_MASK (0x1 << 13)
497#define RT5645_PDM1_R_SFT 13
498#define RT5645_M_PDM1_R (0x1 << 12)
499#define RT5645_M_PDM1_R_SFT 12
500#define RT5645_PDM2_L_MASK (0x1 << 11)
501#define RT5645_PDM2_L_SFT 11
502#define RT5645_M_PDM2_L (0x1 << 10)
503#define RT5645_M_PDM2_L_SFT 10
504#define RT5645_PDM2_R_MASK (0x1 << 9)
505#define RT5645_PDM2_R_SFT 9
506#define RT5645_M_PDM2_R (0x1 << 8)
507#define RT5645_M_PDM2_R_SFT 8
508#define RT5645_PDM2_BUSY (0x1 << 7)
509#define RT5645_PDM1_BUSY (0x1 << 6)
510#define RT5645_PDM_PATTERN (0x1 << 5)
511#define RT5645_PDM_GAIN (0x1 << 4)
512#define RT5645_PDM_DIV_MASK (0x3)
513
514/* REC Left Mixer Control 1 (0x3b) */
515#define RT5645_G_HP_L_RM_L_MASK (0x7 << 13)
516#define RT5645_G_HP_L_RM_L_SFT 13
517#define RT5645_G_IN_L_RM_L_MASK (0x7 << 10)
518#define RT5645_G_IN_L_RM_L_SFT 10
519#define RT5645_G_BST4_RM_L_MASK (0x7 << 7)
520#define RT5645_G_BST4_RM_L_SFT 7
521#define RT5645_G_BST3_RM_L_MASK (0x7 << 4)
522#define RT5645_G_BST3_RM_L_SFT 4
523#define RT5645_G_BST2_RM_L_MASK (0x7 << 1)
524#define RT5645_G_BST2_RM_L_SFT 1
525
526/* REC Left Mixer Control 2 (0x3c) */
527#define RT5645_G_BST1_RM_L_MASK (0x7 << 13)
528#define RT5645_G_BST1_RM_L_SFT 13
529#define RT5645_G_OM_L_RM_L_MASK (0x7 << 10)
530#define RT5645_G_OM_L_RM_L_SFT 10
531#define RT5645_M_MM_L_RM_L (0x1 << 6)
532#define RT5645_M_MM_L_RM_L_SFT 6
533#define RT5645_M_IN_L_RM_L (0x1 << 5)
534#define RT5645_M_IN_L_RM_L_SFT 5
535#define RT5645_M_HP_L_RM_L (0x1 << 4)
536#define RT5645_M_HP_L_RM_L_SFT 4
537#define RT5645_M_BST3_RM_L (0x1 << 3)
538#define RT5645_M_BST3_RM_L_SFT 3
539#define RT5645_M_BST2_RM_L (0x1 << 2)
540#define RT5645_M_BST2_RM_L_SFT 2
541#define RT5645_M_BST1_RM_L (0x1 << 1)
542#define RT5645_M_BST1_RM_L_SFT 1
543#define RT5645_M_OM_L_RM_L (0x1)
544#define RT5645_M_OM_L_RM_L_SFT 0
545
546/* REC Right Mixer Control 1 (0x3d) */
547#define RT5645_G_HP_R_RM_R_MASK (0x7 << 13)
548#define RT5645_G_HP_R_RM_R_SFT 13
549#define RT5645_G_IN_R_RM_R_MASK (0x7 << 10)
550#define RT5645_G_IN_R_RM_R_SFT 10
551#define RT5645_G_BST4_RM_R_MASK (0x7 << 7)
552#define RT5645_G_BST4_RM_R_SFT 7
553#define RT5645_G_BST3_RM_R_MASK (0x7 << 4)
554#define RT5645_G_BST3_RM_R_SFT 4
555#define RT5645_G_BST2_RM_R_MASK (0x7 << 1)
556#define RT5645_G_BST2_RM_R_SFT 1
557
558/* REC Right Mixer Control 2 (0x3e) */
559#define RT5645_G_BST1_RM_R_MASK (0x7 << 13)
560#define RT5645_G_BST1_RM_R_SFT 13
561#define RT5645_G_OM_R_RM_R_MASK (0x7 << 10)
562#define RT5645_G_OM_R_RM_R_SFT 10
563#define RT5645_M_MM_R_RM_R (0x1 << 6)
564#define RT5645_M_MM_R_RM_R_SFT 6
565#define RT5645_M_IN_R_RM_R (0x1 << 5)
566#define RT5645_M_IN_R_RM_R_SFT 5
567#define RT5645_M_HP_R_RM_R (0x1 << 4)
568#define RT5645_M_HP_R_RM_R_SFT 4
569#define RT5645_M_BST3_RM_R (0x1 << 3)
570#define RT5645_M_BST3_RM_R_SFT 3
571#define RT5645_M_BST2_RM_R (0x1 << 2)
572#define RT5645_M_BST2_RM_R_SFT 2
573#define RT5645_M_BST1_RM_R (0x1 << 1)
574#define RT5645_M_BST1_RM_R_SFT 1
575#define RT5645_M_OM_R_RM_R (0x1)
576#define RT5645_M_OM_R_RM_R_SFT 0
577
578/* HPOMIX Control (0x40) (0x42) */
579#define RT5645_M_BST1_HV (0x1 << 4)
580#define RT5645_M_BST1_HV_SFT 4
581#define RT5645_M_BST2_HV (0x1 << 4)
582#define RT5645_M_BST2_HV_SFT 4
583#define RT5645_M_BST3_HV (0x1 << 3)
584#define RT5645_M_BST3_HV_SFT 3
585#define RT5645_M_IN_HV (0x1 << 2)
586#define RT5645_M_IN_HV_SFT 2
587#define RT5645_M_DAC2_HV (0x1 << 1)
588#define RT5645_M_DAC2_HV_SFT 1
589#define RT5645_M_DAC1_HV (0x1 << 0)
590#define RT5645_M_DAC1_HV_SFT 0
591
592/* HPMIX Control (0x45) */
593#define RT5645_M_DAC1_HM (0x1 << 14)
594#define RT5645_M_DAC1_HM_SFT 14
595#define RT5645_M_HPVOL_HM (0x1 << 13)
596#define RT5645_M_HPVOL_HM_SFT 13
597
598/* SPK Left Mixer Control (0x46) */
599#define RT5645_G_RM_L_SM_L_MASK (0x3 << 14)
600#define RT5645_G_RM_L_SM_L_SFT 14
601#define RT5645_G_IN_L_SM_L_MASK (0x3 << 12)
602#define RT5645_G_IN_L_SM_L_SFT 12
603#define RT5645_G_DAC_L1_SM_L_MASK (0x3 << 10)
604#define RT5645_G_DAC_L1_SM_L_SFT 10
605#define RT5645_G_DAC_L2_SM_L_MASK (0x3 << 8)
606#define RT5645_G_DAC_L2_SM_L_SFT 8
607#define RT5645_G_OM_L_SM_L_MASK (0x3 << 6)
608#define RT5645_G_OM_L_SM_L_SFT 6
609#define RT5645_M_BST1_L_SM_L (0x1 << 5)
610#define RT5645_M_BST1_L_SM_L_SFT 5
611#define RT5645_M_IN_L_SM_L (0x1 << 3)
612#define RT5645_M_IN_L_SM_L_SFT 3
613#define RT5645_M_DAC_L1_SM_L (0x1 << 1)
614#define RT5645_M_DAC_L1_SM_L_SFT 1
615#define RT5645_M_DAC_L2_SM_L (0x1 << 2)
616#define RT5645_M_DAC_L2_SM_L_SFT 2
617#define RT5645_M_BST3_L_SM_L (0x1 << 4)
618#define RT5645_M_BST3_L_SM_L_SFT 4
619
620/* SPK Right Mixer Control (0x47) */
621#define RT5645_G_RM_R_SM_R_MASK (0x3 << 14)
622#define RT5645_G_RM_R_SM_R_SFT 14
623#define RT5645_G_IN_R_SM_R_MASK (0x3 << 12)
624#define RT5645_G_IN_R_SM_R_SFT 12
625#define RT5645_G_DAC_R1_SM_R_MASK (0x3 << 10)
626#define RT5645_G_DAC_R1_SM_R_SFT 10
627#define RT5645_G_DAC_R2_SM_R_MASK (0x3 << 8)
628#define RT5645_G_DAC_R2_SM_R_SFT 8
629#define RT5645_G_OM_R_SM_R_MASK (0x3 << 6)
630#define RT5645_G_OM_R_SM_R_SFT 6
631#define RT5645_M_BST2_R_SM_R (0x1 << 5)
632#define RT5645_M_BST2_R_SM_R_SFT 5
633#define RT5645_M_IN_R_SM_R (0x1 << 3)
634#define RT5645_M_IN_R_SM_R_SFT 3
635#define RT5645_M_DAC_R1_SM_R (0x1 << 1)
636#define RT5645_M_DAC_R1_SM_R_SFT 1
637#define RT5645_M_DAC_R2_SM_R (0x1 << 2)
638#define RT5645_M_DAC_R2_SM_R_SFT 2
639#define RT5645_M_BST3_R_SM_R (0x1 << 4)
640#define RT5645_M_BST3_R_SM_R_SFT 4
641
642/* SPOLMIX Control (0x48) */
643#define RT5645_M_DAC_L1_SPM_L (0x1 << 15)
644#define RT5645_M_DAC_L1_SPM_L_SFT 15
645#define RT5645_M_DAC_R1_SPM_L (0x1 << 14)
646#define RT5645_M_DAC_R1_SPM_L_SFT 14
647#define RT5645_M_SV_L_SPM_L (0x1 << 13)
648#define RT5645_M_SV_L_SPM_L_SFT 13
649#define RT5645_M_SV_R_SPM_L (0x1 << 12)
650#define RT5645_M_SV_R_SPM_L_SFT 12
651#define RT5645_M_BST3_SPM_L (0x1 << 11)
652#define RT5645_M_BST3_SPM_L_SFT 11
653#define RT5645_M_DAC_R1_SPM_R (0x1 << 2)
654#define RT5645_M_DAC_R1_SPM_R_SFT 2
655#define RT5645_M_BST3_SPM_R (0x1 << 1)
656#define RT5645_M_BST3_SPM_R_SFT 1
657#define RT5645_M_SV_R_SPM_R (0x1 << 0)
658#define RT5645_M_SV_R_SPM_R_SFT 0
659
660/* Mono Output Mixer Control (0x4c) */
661#define RT5645_M_OV_L_MM (0x1 << 9)
662#define RT5645_M_OV_L_MM_SFT 9
663#define RT5645_M_DAC_L2_MA (0x1 << 8)
664#define RT5645_M_DAC_L2_MA_SFT 8
665#define RT5645_G_MONOMIX_MASK (0x1 << 10)
666#define RT5645_G_MONOMIX_SFT 10
667#define RT5645_M_BST2_MM (0x1 << 4)
668#define RT5645_M_BST2_MM_SFT 4
669#define RT5645_M_DAC_R1_MM (0x1 << 3)
670#define RT5645_M_DAC_R1_MM_SFT 3
671#define RT5645_M_DAC_R2_MM (0x1 << 2)
672#define RT5645_M_DAC_R2_MM_SFT 2
673#define RT5645_M_DAC_L2_MM (0x1 << 1)
674#define RT5645_M_DAC_L2_MM_SFT 1
675#define RT5645_M_BST3_MM (0x1 << 0)
676#define RT5645_M_BST3_MM_SFT 0
677
678/* Output Left Mixer Control 1 (0x4d) */
679#define RT5645_G_BST3_OM_L_MASK (0x7 << 13)
680#define RT5645_G_BST3_OM_L_SFT 13
681#define RT5645_G_BST2_OM_L_MASK (0x7 << 10)
682#define RT5645_G_BST2_OM_L_SFT 10
683#define RT5645_G_BST1_OM_L_MASK (0x7 << 7)
684#define RT5645_G_BST1_OM_L_SFT 7
685#define RT5645_G_IN_L_OM_L_MASK (0x7 << 4)
686#define RT5645_G_IN_L_OM_L_SFT 4
687#define RT5645_G_RM_L_OM_L_MASK (0x7 << 1)
688#define RT5645_G_RM_L_OM_L_SFT 1
689
690/* Output Left Mixer Control 2 (0x4e) */
691#define RT5645_G_DAC_R2_OM_L_MASK (0x7 << 13)
692#define RT5645_G_DAC_R2_OM_L_SFT 13
693#define RT5645_G_DAC_L2_OM_L_MASK (0x7 << 10)
694#define RT5645_G_DAC_L2_OM_L_SFT 10
695#define RT5645_G_DAC_L1_OM_L_MASK (0x7 << 7)
696#define RT5645_G_DAC_L1_OM_L_SFT 7
697
698/* Output Left Mixer Control 3 (0x4f) */
699#define RT5645_M_BST3_OM_L (0x1 << 4)
700#define RT5645_M_BST3_OM_L_SFT 4
701#define RT5645_M_BST1_OM_L (0x1 << 3)
702#define RT5645_M_BST1_OM_L_SFT 3
703#define RT5645_M_IN_L_OM_L (0x1 << 2)
704#define RT5645_M_IN_L_OM_L_SFT 2
705#define RT5645_M_DAC_L2_OM_L (0x1 << 1)
706#define RT5645_M_DAC_L2_OM_L_SFT 1
707#define RT5645_M_DAC_L1_OM_L (0x1)
708#define RT5645_M_DAC_L1_OM_L_SFT 0
709
710/* Output Right Mixer Control 1 (0x50) */
711#define RT5645_G_BST4_OM_R_MASK (0x7 << 13)
712#define RT5645_G_BST4_OM_R_SFT 13
713#define RT5645_G_BST2_OM_R_MASK (0x7 << 10)
714#define RT5645_G_BST2_OM_R_SFT 10
715#define RT5645_G_BST1_OM_R_MASK (0x7 << 7)
716#define RT5645_G_BST1_OM_R_SFT 7
717#define RT5645_G_IN_R_OM_R_MASK (0x7 << 4)
718#define RT5645_G_IN_R_OM_R_SFT 4
719#define RT5645_G_RM_R_OM_R_MASK (0x7 << 1)
720#define RT5645_G_RM_R_OM_R_SFT 1
721
722/* Output Right Mixer Control 2 (0x51) */
723#define RT5645_G_DAC_L2_OM_R_MASK (0x7 << 13)
724#define RT5645_G_DAC_L2_OM_R_SFT 13
725#define RT5645_G_DAC_R2_OM_R_MASK (0x7 << 10)
726#define RT5645_G_DAC_R2_OM_R_SFT 10
727#define RT5645_G_DAC_R1_OM_R_MASK (0x7 << 7)
728#define RT5645_G_DAC_R1_OM_R_SFT 7
729
730/* Output Right Mixer Control 3 (0x52) */
731#define RT5645_M_BST3_OM_R (0x1 << 4)
732#define RT5645_M_BST3_OM_R_SFT 4
733#define RT5645_M_BST2_OM_R (0x1 << 3)
734#define RT5645_M_BST2_OM_R_SFT 3
735#define RT5645_M_IN_R_OM_R (0x1 << 2)
736#define RT5645_M_IN_R_OM_R_SFT 2
737#define RT5645_M_DAC_R2_OM_R (0x1 << 1)
738#define RT5645_M_DAC_R2_OM_R_SFT 1
739#define RT5645_M_DAC_R1_OM_R (0x1)
740#define RT5645_M_DAC_R1_OM_R_SFT 0
741
742/* LOUT Mixer Control (0x53) */
743#define RT5645_M_DAC_L1_LM (0x1 << 15)
744#define RT5645_M_DAC_L1_LM_SFT 15
745#define RT5645_M_DAC_R1_LM (0x1 << 14)
746#define RT5645_M_DAC_R1_LM_SFT 14
747#define RT5645_M_OV_L_LM (0x1 << 13)
748#define RT5645_M_OV_L_LM_SFT 13
749#define RT5645_M_OV_R_LM (0x1 << 12)
750#define RT5645_M_OV_R_LM_SFT 12
751#define RT5645_G_LOUTMIX_MASK (0x1 << 11)
752#define RT5645_G_LOUTMIX_SFT 11
753
754/* Power Management for Digital 1 (0x61) */
755#define RT5645_PWR_I2S1 (0x1 << 15)
756#define RT5645_PWR_I2S1_BIT 15
757#define RT5645_PWR_I2S2 (0x1 << 14)
758#define RT5645_PWR_I2S2_BIT 14
759#define RT5645_PWR_I2S3 (0x1 << 13)
760#define RT5645_PWR_I2S3_BIT 13
761#define RT5645_PWR_DAC_L1 (0x1 << 12)
762#define RT5645_PWR_DAC_L1_BIT 12
763#define RT5645_PWR_DAC_R1 (0x1 << 11)
764#define RT5645_PWR_DAC_R1_BIT 11
765#define RT5645_PWR_CLS_D_R (0x1 << 9)
766#define RT5645_PWR_CLS_D_R_BIT 9
767#define RT5645_PWR_CLS_D_L (0x1 << 8)
768#define RT5645_PWR_CLS_D_L_BIT 8
769#define RT5645_PWR_ADC_R (0x1 << 1)
770#define RT5645_PWR_ADC_R_BIT 1
771#define RT5645_PWR_DAC_L2 (0x1 << 7)
772#define RT5645_PWR_DAC_L2_BIT 7
773#define RT5645_PWR_DAC_R2 (0x1 << 6)
774#define RT5645_PWR_DAC_R2_BIT 6
775#define RT5645_PWR_ADC_L (0x1 << 2)
776#define RT5645_PWR_ADC_L_BIT 2
777#define RT5645_PWR_ADC_R (0x1 << 1)
778#define RT5645_PWR_ADC_R_BIT 1
779#define RT5645_PWR_CLS_D (0x1)
780#define RT5645_PWR_CLS_D_BIT 0
781
782/* Power Management for Digital 2 (0x62) */
783#define RT5645_PWR_ADC_S1F (0x1 << 15)
784#define RT5645_PWR_ADC_S1F_BIT 15
785#define RT5645_PWR_ADC_MF_L (0x1 << 14)
786#define RT5645_PWR_ADC_MF_L_BIT 14
787#define RT5645_PWR_ADC_MF_R (0x1 << 13)
788#define RT5645_PWR_ADC_MF_R_BIT 13
789#define RT5645_PWR_I2S_DSP (0x1 << 12)
790#define RT5645_PWR_I2S_DSP_BIT 12
791#define RT5645_PWR_DAC_S1F (0x1 << 11)
792#define RT5645_PWR_DAC_S1F_BIT 11
793#define RT5645_PWR_DAC_MF_L (0x1 << 10)
794#define RT5645_PWR_DAC_MF_L_BIT 10
795#define RT5645_PWR_DAC_MF_R (0x1 << 9)
796#define RT5645_PWR_DAC_MF_R_BIT 9
797#define RT5645_PWR_ADC_S2F (0x1 << 8)
798#define RT5645_PWR_ADC_S2F_BIT 8
799#define RT5645_PWR_PDM1 (0x1 << 7)
800#define RT5645_PWR_PDM1_BIT 7
801#define RT5645_PWR_PDM2 (0x1 << 6)
802#define RT5645_PWR_PDM2_BIT 6
803#define RT5645_PWR_IPTV (0x1 << 1)
804#define RT5645_PWR_IPTV_BIT 1
805#define RT5645_PWR_PAD (0x1)
806#define RT5645_PWR_PAD_BIT 0
807
808/* Power Management for Analog 1 (0x63) */
809#define RT5645_PWR_VREF1 (0x1 << 15)
810#define RT5645_PWR_VREF1_BIT 15
811#define RT5645_PWR_FV1 (0x1 << 14)
812#define RT5645_PWR_FV1_BIT 14
813#define RT5645_PWR_MB (0x1 << 13)
814#define RT5645_PWR_MB_BIT 13
815#define RT5645_PWR_LM (0x1 << 12)
816#define RT5645_PWR_LM_BIT 12
817#define RT5645_PWR_BG (0x1 << 11)
818#define RT5645_PWR_BG_BIT 11
819#define RT5645_PWR_MA (0x1 << 10)
820#define RT5645_PWR_MA_BIT 10
821#define RT5645_PWR_HP_L (0x1 << 7)
822#define RT5645_PWR_HP_L_BIT 7
823#define RT5645_PWR_HP_R (0x1 << 6)
824#define RT5645_PWR_HP_R_BIT 6
825#define RT5645_PWR_HA (0x1 << 5)
826#define RT5645_PWR_HA_BIT 5
827#define RT5645_PWR_VREF2 (0x1 << 4)
828#define RT5645_PWR_VREF2_BIT 4
829#define RT5645_PWR_FV2 (0x1 << 3)
830#define RT5645_PWR_FV2_BIT 3
831#define RT5645_LDO_SEL_MASK (0x3)
832#define RT5645_LDO_SEL_SFT 0
833
834/* Power Management for Analog 2 (0x64) */
835#define RT5645_PWR_BST1 (0x1 << 15)
836#define RT5645_PWR_BST1_BIT 15
837#define RT5645_PWR_BST2 (0x1 << 14)
838#define RT5645_PWR_BST2_BIT 14
839#define RT5645_PWR_BST3 (0x1 << 13)
840#define RT5645_PWR_BST3_BIT 13
841#define RT5645_PWR_BST4 (0x1 << 12)
842#define RT5645_PWR_BST4_BIT 12
843#define RT5645_PWR_MB1 (0x1 << 11)
844#define RT5645_PWR_MB1_BIT 11
845#define RT5645_PWR_MB2 (0x1 << 10)
846#define RT5645_PWR_MB2_BIT 10
847#define RT5645_PWR_PLL (0x1 << 9)
848#define RT5645_PWR_PLL_BIT 9
849#define RT5645_PWR_BST2_P (0x1 << 5)
850#define RT5645_PWR_BST2_P_BIT 5
851#define RT5645_PWR_BST3_P (0x1 << 4)
852#define RT5645_PWR_BST3_P_BIT 4
853#define RT5645_PWR_BST4_P (0x1 << 3)
854#define RT5645_PWR_BST4_P_BIT 3
855#define RT5645_PWR_JD1 (0x1 << 2)
856#define RT5645_PWR_JD1_BIT 2
857#define RT5645_PWR_JD (0x1 << 1)
858#define RT5645_PWR_JD_BIT 1
859
860/* Power Management for Mixer (0x65) */
861#define RT5645_PWR_OM_L (0x1 << 15)
862#define RT5645_PWR_OM_L_BIT 15
863#define RT5645_PWR_OM_R (0x1 << 14)
864#define RT5645_PWR_OM_R_BIT 14
865#define RT5645_PWR_SM_L (0x1 << 13)
866#define RT5645_PWR_SM_L_BIT 13
867#define RT5645_PWR_SM_R (0x1 << 12)
868#define RT5645_PWR_SM_R_BIT 12
869#define RT5645_PWR_RM_L (0x1 << 11)
870#define RT5645_PWR_RM_L_BIT 11
871#define RT5645_PWR_RM_R (0x1 << 10)
872#define RT5645_PWR_RM_R_BIT 10
873#define RT5645_PWR_MM (0x1 << 8)
874#define RT5645_PWR_MM_BIT 8
875#define RT5645_PWR_HM_L (0x1 << 7)
876#define RT5645_PWR_HM_L_BIT 7
877#define RT5645_PWR_HM_R (0x1 << 6)
878#define RT5645_PWR_HM_R_BIT 6
879#define RT5645_PWR_LDO2 (0x1 << 1)
880#define RT5645_PWR_LDO2_BIT 1
881
882/* Power Management for Volume (0x66) */
883#define RT5645_PWR_SV_L (0x1 << 15)
884#define RT5645_PWR_SV_L_BIT 15
885#define RT5645_PWR_SV_R (0x1 << 14)
886#define RT5645_PWR_SV_R_BIT 14
887#define RT5645_PWR_HV_L (0x1 << 11)
888#define RT5645_PWR_HV_L_BIT 11
889#define RT5645_PWR_HV_R (0x1 << 10)
890#define RT5645_PWR_HV_R_BIT 10
891#define RT5645_PWR_IN_L (0x1 << 9)
892#define RT5645_PWR_IN_L_BIT 9
893#define RT5645_PWR_IN_R (0x1 << 8)
894#define RT5645_PWR_IN_R_BIT 8
895#define RT5645_PWR_MIC_DET (0x1 << 5)
896#define RT5645_PWR_MIC_DET_BIT 5
897
898/* I2S1/2 Audio Serial Data Port Control (0x70 0x71) */
899#define RT5645_I2S_MS_MASK (0x1 << 15)
900#define RT5645_I2S_MS_SFT 15
901#define RT5645_I2S_MS_M (0x0 << 15)
902#define RT5645_I2S_MS_S (0x1 << 15)
903#define RT5645_I2S_O_CP_MASK (0x3 << 10)
904#define RT5645_I2S_O_CP_SFT 10
905#define RT5645_I2S_O_CP_OFF (0x0 << 10)
906#define RT5645_I2S_O_CP_U_LAW (0x1 << 10)
907#define RT5645_I2S_O_CP_A_LAW (0x2 << 10)
908#define RT5645_I2S_I_CP_MASK (0x3 << 8)
909#define RT5645_I2S_I_CP_SFT 8
910#define RT5645_I2S_I_CP_OFF (0x0 << 8)
911#define RT5645_I2S_I_CP_U_LAW (0x1 << 8)
912#define RT5645_I2S_I_CP_A_LAW (0x2 << 8)
913#define RT5645_I2S_BP_MASK (0x1 << 7)
914#define RT5645_I2S_BP_SFT 7
915#define RT5645_I2S_BP_NOR (0x0 << 7)
916#define RT5645_I2S_BP_INV (0x1 << 7)
917#define RT5645_I2S_DL_MASK (0x3 << 2)
918#define RT5645_I2S_DL_SFT 2
919#define RT5645_I2S_DL_16 (0x0 << 2)
920#define RT5645_I2S_DL_20 (0x1 << 2)
921#define RT5645_I2S_DL_24 (0x2 << 2)
922#define RT5645_I2S_DL_8 (0x3 << 2)
923#define RT5645_I2S_DF_MASK (0x3)
924#define RT5645_I2S_DF_SFT 0
925#define RT5645_I2S_DF_I2S (0x0)
926#define RT5645_I2S_DF_LEFT (0x1)
927#define RT5645_I2S_DF_PCM_A (0x2)
928#define RT5645_I2S_DF_PCM_B (0x3)
929
930/* I2S2 Audio Serial Data Port Control (0x71) */
931#define RT5645_I2S2_SDI_MASK (0x1 << 6)
932#define RT5645_I2S2_SDI_SFT 6
933#define RT5645_I2S2_SDI_I2S1 (0x0 << 6)
934#define RT5645_I2S2_SDI_I2S2 (0x1 << 6)
935
936/* ADC/DAC Clock Control 1 (0x73) */
937#define RT5645_I2S_BCLK_MS1_MASK (0x1 << 15)
938#define RT5645_I2S_BCLK_MS1_SFT 15
939#define RT5645_I2S_BCLK_MS1_32 (0x0 << 15)
940#define RT5645_I2S_BCLK_MS1_64 (0x1 << 15)
941#define RT5645_I2S_PD1_MASK (0x7 << 12)
942#define RT5645_I2S_PD1_SFT 12
943#define RT5645_I2S_PD1_1 (0x0 << 12)
944#define RT5645_I2S_PD1_2 (0x1 << 12)
945#define RT5645_I2S_PD1_3 (0x2 << 12)
946#define RT5645_I2S_PD1_4 (0x3 << 12)
947#define RT5645_I2S_PD1_6 (0x4 << 12)
948#define RT5645_I2S_PD1_8 (0x5 << 12)
949#define RT5645_I2S_PD1_12 (0x6 << 12)
950#define RT5645_I2S_PD1_16 (0x7 << 12)
951#define RT5645_I2S_BCLK_MS2_MASK (0x1 << 11)
952#define RT5645_I2S_BCLK_MS2_SFT 11
953#define RT5645_I2S_BCLK_MS2_32 (0x0 << 11)
954#define RT5645_I2S_BCLK_MS2_64 (0x1 << 11)
955#define RT5645_I2S_PD2_MASK (0x7 << 8)
956#define RT5645_I2S_PD2_SFT 8
957#define RT5645_I2S_PD2_1 (0x0 << 8)
958#define RT5645_I2S_PD2_2 (0x1 << 8)
959#define RT5645_I2S_PD2_3 (0x2 << 8)
960#define RT5645_I2S_PD2_4 (0x3 << 8)
961#define RT5645_I2S_PD2_6 (0x4 << 8)
962#define RT5645_I2S_PD2_8 (0x5 << 8)
963#define RT5645_I2S_PD2_12 (0x6 << 8)
964#define RT5645_I2S_PD2_16 (0x7 << 8)
965#define RT5645_I2S_BCLK_MS3_MASK (0x1 << 7)
966#define RT5645_I2S_BCLK_MS3_SFT 7
967#define RT5645_I2S_BCLK_MS3_32 (0x0 << 7)
968#define RT5645_I2S_BCLK_MS3_64 (0x1 << 7)
969#define RT5645_I2S_PD3_MASK (0x7 << 4)
970#define RT5645_I2S_PD3_SFT 4
971#define RT5645_I2S_PD3_1 (0x0 << 4)
972#define RT5645_I2S_PD3_2 (0x1 << 4)
973#define RT5645_I2S_PD3_3 (0x2 << 4)
974#define RT5645_I2S_PD3_4 (0x3 << 4)
975#define RT5645_I2S_PD3_6 (0x4 << 4)
976#define RT5645_I2S_PD3_8 (0x5 << 4)
977#define RT5645_I2S_PD3_12 (0x6 << 4)
978#define RT5645_I2S_PD3_16 (0x7 << 4)
979#define RT5645_DAC_OSR_MASK (0x3 << 2)
980#define RT5645_DAC_OSR_SFT 2
981#define RT5645_DAC_OSR_128 (0x0 << 2)
982#define RT5645_DAC_OSR_64 (0x1 << 2)
983#define RT5645_DAC_OSR_32 (0x2 << 2)
984#define RT5645_DAC_OSR_16 (0x3 << 2)
985#define RT5645_ADC_OSR_MASK (0x3)
986#define RT5645_ADC_OSR_SFT 0
987#define RT5645_ADC_OSR_128 (0x0)
988#define RT5645_ADC_OSR_64 (0x1)
989#define RT5645_ADC_OSR_32 (0x2)
990#define RT5645_ADC_OSR_16 (0x3)
991
992/* ADC/DAC Clock Control 2 (0x74) */
993#define RT5645_DAC_L_OSR_MASK (0x3 << 14)
994#define RT5645_DAC_L_OSR_SFT 14
995#define RT5645_DAC_L_OSR_128 (0x0 << 14)
996#define RT5645_DAC_L_OSR_64 (0x1 << 14)
997#define RT5645_DAC_L_OSR_32 (0x2 << 14)
998#define RT5645_DAC_L_OSR_16 (0x3 << 14)
999#define RT5645_ADC_R_OSR_MASK (0x3 << 12)
1000#define RT5645_ADC_R_OSR_SFT 12
1001#define RT5645_ADC_R_OSR_128 (0x0 << 12)
1002#define RT5645_ADC_R_OSR_64 (0x1 << 12)
1003#define RT5645_ADC_R_OSR_32 (0x2 << 12)
1004#define RT5645_ADC_R_OSR_16 (0x3 << 12)
1005#define RT5645_DAHPF_EN (0x1 << 11)
1006#define RT5645_DAHPF_EN_SFT 11
1007#define RT5645_ADHPF_EN (0x1 << 10)
1008#define RT5645_ADHPF_EN_SFT 10
1009
1010/* Digital Microphone Control (0x75) */
1011#define RT5645_DMIC_1_EN_MASK (0x1 << 15)
1012#define RT5645_DMIC_1_EN_SFT 15
1013#define RT5645_DMIC_1_DIS (0x0 << 15)
1014#define RT5645_DMIC_1_EN (0x1 << 15)
1015#define RT5645_DMIC_2_EN_MASK (0x1 << 14)
1016#define RT5645_DMIC_2_EN_SFT 14
1017#define RT5645_DMIC_2_DIS (0x0 << 14)
1018#define RT5645_DMIC_2_EN (0x1 << 14)
1019#define RT5645_DMIC_1L_LH_MASK (0x1 << 13)
1020#define RT5645_DMIC_1L_LH_SFT 13
1021#define RT5645_DMIC_1L_LH_FALLING (0x0 << 13)
1022#define RT5645_DMIC_1L_LH_RISING (0x1 << 13)
1023#define RT5645_DMIC_1R_LH_MASK (0x1 << 12)
1024#define RT5645_DMIC_1R_LH_SFT 12
1025#define RT5645_DMIC_1R_LH_FALLING (0x0 << 12)
1026#define RT5645_DMIC_1R_LH_RISING (0x1 << 12)
1027#define RT5645_DMIC_2_DP_MASK (0x3 << 10)
1028#define RT5645_DMIC_2_DP_SFT 10
1029#define RT5645_DMIC_2_DP_GPIO6 (0x0 << 10)
1030#define RT5645_DMIC_2_DP_GPIO10 (0x1 << 10)
1031#define RT5645_DMIC_2_DP_GPIO12 (0x2 << 10)
1032#define RT5645_DMIC_2_DP_IN2P (0x3 << 10)
1033#define RT5645_DMIC_2L_LH_MASK (0x1 << 9)
1034#define RT5645_DMIC_2L_LH_SFT 9
1035#define RT5645_DMIC_2L_LH_FALLING (0x0 << 9)
1036#define RT5645_DMIC_2L_LH_RISING (0x1 << 9)
1037#define RT5645_DMIC_2R_LH_MASK (0x1 << 8)
1038#define RT5645_DMIC_2R_LH_SFT 8
1039#define RT5645_DMIC_2R_LH_FALLING (0x0 << 8)
1040#define RT5645_DMIC_2R_LH_RISING (0x1 << 8)
1041#define RT5645_DMIC_CLK_MASK (0x7 << 5)
1042#define RT5645_DMIC_CLK_SFT 5
1043#define RT5645_DMIC_3_EN_MASK (0x1 << 4)
1044#define RT5645_DMIC_3_EN_SFT 4
1045#define RT5645_DMIC_3_DIS (0x0 << 4)
1046#define RT5645_DMIC_3_EN (0x1 << 4)
1047#define RT5645_DMIC_1_DP_MASK (0x3 << 0)
1048#define RT5645_DMIC_1_DP_SFT 0
1049#define RT5645_DMIC_1_DP_GPIO5 (0x0 << 0)
1050#define RT5645_DMIC_1_DP_IN2N (0x1 << 0)
1051#define RT5645_DMIC_1_DP_GPIO11 (0x2 << 0)
1052
1053/* TDM Control 1 (0x77) */
1054#define RT5645_IF1_ADC_IN_MASK (0x3 << 8)
1055#define RT5645_IF1_ADC_IN_SFT 8
1056
1057/* Global Clock Control (0x80) */
1058#define RT5645_SCLK_SRC_MASK (0x3 << 14)
1059#define RT5645_SCLK_SRC_SFT 14
1060#define RT5645_SCLK_SRC_MCLK (0x0 << 14)
1061#define RT5645_SCLK_SRC_PLL1 (0x1 << 14)
1062#define RT5645_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
1063#define RT5645_PLL1_SRC_MASK (0x3 << 12)
1064#define RT5645_PLL1_SRC_SFT 12
1065#define RT5645_PLL1_SRC_MCLK (0x0 << 12)
1066#define RT5645_PLL1_SRC_BCLK1 (0x1 << 12)
1067#define RT5645_PLL1_SRC_BCLK2 (0x2 << 12)
1068#define RT5645_PLL1_SRC_BCLK3 (0x3 << 12)
1069#define RT5645_PLL1_PD_MASK (0x1 << 3)
1070#define RT5645_PLL1_PD_SFT 3
1071#define RT5645_PLL1_PD_1 (0x0 << 3)
1072#define RT5645_PLL1_PD_2 (0x1 << 3)
1073
1074#define RT5645_PLL_INP_MAX 40000000
1075#define RT5645_PLL_INP_MIN 256000
1076/* PLL M/N/K Code Control 1 (0x81) */
1077#define RT5645_PLL_N_MAX 0x1ff
1078#define RT5645_PLL_N_MASK (RT5645_PLL_N_MAX << 7)
1079#define RT5645_PLL_N_SFT 7
1080#define RT5645_PLL_K_MAX 0x1f
1081#define RT5645_PLL_K_MASK (RT5645_PLL_K_MAX)
1082#define RT5645_PLL_K_SFT 0
1083
1084/* PLL M/N/K Code Control 2 (0x82) */
1085#define RT5645_PLL_M_MAX 0xf
1086#define RT5645_PLL_M_MASK (RT5645_PLL_M_MAX << 12)
1087#define RT5645_PLL_M_SFT 12
1088#define RT5645_PLL_M_BP (0x1 << 11)
1089#define RT5645_PLL_M_BP_SFT 11
1090
1091/* ASRC Control 1 (0x83) */
1092#define RT5645_STO_T_MASK (0x1 << 15)
1093#define RT5645_STO_T_SFT 15
1094#define RT5645_STO_T_SCLK (0x0 << 15)
1095#define RT5645_STO_T_LRCK1 (0x1 << 15)
1096#define RT5645_M1_T_MASK (0x1 << 14)
1097#define RT5645_M1_T_SFT 14
1098#define RT5645_M1_T_I2S2 (0x0 << 14)
1099#define RT5645_M1_T_I2S2_D3 (0x1 << 14)
1100#define RT5645_I2S2_F_MASK (0x1 << 12)
1101#define RT5645_I2S2_F_SFT 12
1102#define RT5645_I2S2_F_I2S2_D2 (0x0 << 12)
1103#define RT5645_I2S2_F_I2S1_TCLK (0x1 << 12)
1104#define RT5645_DMIC_1_M_MASK (0x1 << 9)
1105#define RT5645_DMIC_1_M_SFT 9
1106#define RT5645_DMIC_1_M_NOR (0x0 << 9)
1107#define RT5645_DMIC_1_M_ASYN (0x1 << 9)
1108#define RT5645_DMIC_2_M_MASK (0x1 << 8)
1109#define RT5645_DMIC_2_M_SFT 8
1110#define RT5645_DMIC_2_M_NOR (0x0 << 8)
1111#define RT5645_DMIC_2_M_ASYN (0x1 << 8)
1112
1113/* ASRC Control 2 (0x84) */
1114#define RT5645_MDA_L_M_MASK (0x1 << 15)
1115#define RT5645_MDA_L_M_SFT 15
1116#define RT5645_MDA_L_M_NOR (0x0 << 15)
1117#define RT5645_MDA_L_M_ASYN (0x1 << 15)
1118#define RT5645_MDA_R_M_MASK (0x1 << 14)
1119#define RT5645_MDA_R_M_SFT 14
1120#define RT5645_MDA_R_M_NOR (0x0 << 14)
1121#define RT5645_MDA_R_M_ASYN (0x1 << 14)
1122#define RT5645_MAD_L_M_MASK (0x1 << 13)
1123#define RT5645_MAD_L_M_SFT 13
1124#define RT5645_MAD_L_M_NOR (0x0 << 13)
1125#define RT5645_MAD_L_M_ASYN (0x1 << 13)
1126#define RT5645_MAD_R_M_MASK (0x1 << 12)
1127#define RT5645_MAD_R_M_SFT 12
1128#define RT5645_MAD_R_M_NOR (0x0 << 12)
1129#define RT5645_MAD_R_M_ASYN (0x1 << 12)
1130#define RT5645_ADC_M_MASK (0x1 << 11)
1131#define RT5645_ADC_M_SFT 11
1132#define RT5645_ADC_M_NOR (0x0 << 11)
1133#define RT5645_ADC_M_ASYN (0x1 << 11)
1134#define RT5645_STO_DAC_M_MASK (0x1 << 5)
1135#define RT5645_STO_DAC_M_SFT 5
1136#define RT5645_STO_DAC_M_NOR (0x0 << 5)
1137#define RT5645_STO_DAC_M_ASYN (0x1 << 5)
1138#define RT5645_I2S1_R_D_MASK (0x1 << 4)
1139#define RT5645_I2S1_R_D_SFT 4
1140#define RT5645_I2S1_R_D_DIS (0x0 << 4)
1141#define RT5645_I2S1_R_D_EN (0x1 << 4)
1142#define RT5645_I2S2_R_D_MASK (0x1 << 3)
1143#define RT5645_I2S2_R_D_SFT 3
1144#define RT5645_I2S2_R_D_DIS (0x0 << 3)
1145#define RT5645_I2S2_R_D_EN (0x1 << 3)
1146#define RT5645_PRE_SCLK_MASK (0x3)
1147#define RT5645_PRE_SCLK_SFT 0
1148#define RT5645_PRE_SCLK_512 (0x0)
1149#define RT5645_PRE_SCLK_1024 (0x1)
1150#define RT5645_PRE_SCLK_2048 (0x2)
1151
1152/* ASRC Control 3 (0x85) */
1153#define RT5645_I2S1_RATE_MASK (0xf << 12)
1154#define RT5645_I2S1_RATE_SFT 12
1155#define RT5645_I2S2_RATE_MASK (0xf << 8)
1156#define RT5645_I2S2_RATE_SFT 8
1157
1158/* ASRC Control 4 (0x89) */
1159#define RT5645_I2S1_PD_MASK (0x7 << 12)
1160#define RT5645_I2S1_PD_SFT 12
1161#define RT5645_I2S2_PD_MASK (0x7 << 8)
1162#define RT5645_I2S2_PD_SFT 8
1163
1164/* HPOUT Over Current Detection (0x8b) */
1165#define RT5645_HP_OVCD_MASK (0x1 << 10)
1166#define RT5645_HP_OVCD_SFT 10
1167#define RT5645_HP_OVCD_DIS (0x0 << 10)
1168#define RT5645_HP_OVCD_EN (0x1 << 10)
1169#define RT5645_HP_OC_TH_MASK (0x3 << 8)
1170#define RT5645_HP_OC_TH_SFT 8
1171#define RT5645_HP_OC_TH_90 (0x0 << 8)
1172#define RT5645_HP_OC_TH_105 (0x1 << 8)
1173#define RT5645_HP_OC_TH_120 (0x2 << 8)
1174#define RT5645_HP_OC_TH_135 (0x3 << 8)
1175
1176/* Class D Over Current Control (0x8c) */
1177#define RT5645_CLSD_OC_MASK (0x1 << 9)
1178#define RT5645_CLSD_OC_SFT 9
1179#define RT5645_CLSD_OC_PU (0x0 << 9)
1180#define RT5645_CLSD_OC_PD (0x1 << 9)
1181#define RT5645_AUTO_PD_MASK (0x1 << 8)
1182#define RT5645_AUTO_PD_SFT 8
1183#define RT5645_AUTO_PD_DIS (0x0 << 8)
1184#define RT5645_AUTO_PD_EN (0x1 << 8)
1185#define RT5645_CLSD_OC_TH_MASK (0x3f)
1186#define RT5645_CLSD_OC_TH_SFT 0
1187
1188/* Class D Output Control (0x8d) */
1189#define RT5645_CLSD_RATIO_MASK (0xf << 12)
1190#define RT5645_CLSD_RATIO_SFT 12
1191#define RT5645_CLSD_OM_MASK (0x1 << 11)
1192#define RT5645_CLSD_OM_SFT 11
1193#define RT5645_CLSD_OM_MONO (0x0 << 11)
1194#define RT5645_CLSD_OM_STO (0x1 << 11)
1195#define RT5645_CLSD_SCH_MASK (0x1 << 10)
1196#define RT5645_CLSD_SCH_SFT 10
1197#define RT5645_CLSD_SCH_L (0x0 << 10)
1198#define RT5645_CLSD_SCH_S (0x1 << 10)
1199
1200/* Depop Mode Control 1 (0x8e) */
1201#define RT5645_SMT_TRIG_MASK (0x1 << 15)
1202#define RT5645_SMT_TRIG_SFT 15
1203#define RT5645_SMT_TRIG_DIS (0x0 << 15)
1204#define RT5645_SMT_TRIG_EN (0x1 << 15)
1205#define RT5645_HP_L_SMT_MASK (0x1 << 9)
1206#define RT5645_HP_L_SMT_SFT 9
1207#define RT5645_HP_L_SMT_DIS (0x0 << 9)
1208#define RT5645_HP_L_SMT_EN (0x1 << 9)
1209#define RT5645_HP_R_SMT_MASK (0x1 << 8)
1210#define RT5645_HP_R_SMT_SFT 8
1211#define RT5645_HP_R_SMT_DIS (0x0 << 8)
1212#define RT5645_HP_R_SMT_EN (0x1 << 8)
1213#define RT5645_HP_CD_PD_MASK (0x1 << 7)
1214#define RT5645_HP_CD_PD_SFT 7
1215#define RT5645_HP_CD_PD_DIS (0x0 << 7)
1216#define RT5645_HP_CD_PD_EN (0x1 << 7)
1217#define RT5645_RSTN_MASK (0x1 << 6)
1218#define RT5645_RSTN_SFT 6
1219#define RT5645_RSTN_DIS (0x0 << 6)
1220#define RT5645_RSTN_EN (0x1 << 6)
1221#define RT5645_RSTP_MASK (0x1 << 5)
1222#define RT5645_RSTP_SFT 5
1223#define RT5645_RSTP_DIS (0x0 << 5)
1224#define RT5645_RSTP_EN (0x1 << 5)
1225#define RT5645_HP_CO_MASK (0x1 << 4)
1226#define RT5645_HP_CO_SFT 4
1227#define RT5645_HP_CO_DIS (0x0 << 4)
1228#define RT5645_HP_CO_EN (0x1 << 4)
1229#define RT5645_HP_CP_MASK (0x1 << 3)
1230#define RT5645_HP_CP_SFT 3
1231#define RT5645_HP_CP_PD (0x0 << 3)
1232#define RT5645_HP_CP_PU (0x1 << 3)
1233#define RT5645_HP_SG_MASK (0x1 << 2)
1234#define RT5645_HP_SG_SFT 2
1235#define RT5645_HP_SG_DIS (0x0 << 2)
1236#define RT5645_HP_SG_EN (0x1 << 2)
1237#define RT5645_HP_DP_MASK (0x1 << 1)
1238#define RT5645_HP_DP_SFT 1
1239#define RT5645_HP_DP_PD (0x0 << 1)
1240#define RT5645_HP_DP_PU (0x1 << 1)
1241#define RT5645_HP_CB_MASK (0x1)
1242#define RT5645_HP_CB_SFT 0
1243#define RT5645_HP_CB_PD (0x0)
1244#define RT5645_HP_CB_PU (0x1)
1245
1246/* Depop Mode Control 2 (0x8f) */
1247#define RT5645_DEPOP_MASK (0x1 << 13)
1248#define RT5645_DEPOP_SFT 13
1249#define RT5645_DEPOP_AUTO (0x0 << 13)
1250#define RT5645_DEPOP_MAN (0x1 << 13)
1251#define RT5645_RAMP_MASK (0x1 << 12)
1252#define RT5645_RAMP_SFT 12
1253#define RT5645_RAMP_DIS (0x0 << 12)
1254#define RT5645_RAMP_EN (0x1 << 12)
1255#define RT5645_BPS_MASK (0x1 << 11)
1256#define RT5645_BPS_SFT 11
1257#define RT5645_BPS_DIS (0x0 << 11)
1258#define RT5645_BPS_EN (0x1 << 11)
1259#define RT5645_FAST_UPDN_MASK (0x1 << 10)
1260#define RT5645_FAST_UPDN_SFT 10
1261#define RT5645_FAST_UPDN_DIS (0x0 << 10)
1262#define RT5645_FAST_UPDN_EN (0x1 << 10)
1263#define RT5645_MRES_MASK (0x3 << 8)
1264#define RT5645_MRES_SFT 8
1265#define RT5645_MRES_15MO (0x0 << 8)
1266#define RT5645_MRES_25MO (0x1 << 8)
1267#define RT5645_MRES_35MO (0x2 << 8)
1268#define RT5645_MRES_45MO (0x3 << 8)
1269#define RT5645_VLO_MASK (0x1 << 7)
1270#define RT5645_VLO_SFT 7
1271#define RT5645_VLO_3V (0x0 << 7)
1272#define RT5645_VLO_32V (0x1 << 7)
1273#define RT5645_DIG_DP_MASK (0x1 << 6)
1274#define RT5645_DIG_DP_SFT 6
1275#define RT5645_DIG_DP_DIS (0x0 << 6)
1276#define RT5645_DIG_DP_EN (0x1 << 6)
1277#define RT5645_DP_TH_MASK (0x3 << 4)
1278#define RT5645_DP_TH_SFT 4
1279
1280/* Depop Mode Control 3 (0x90) */
1281#define RT5645_CP_SYS_MASK (0x7 << 12)
1282#define RT5645_CP_SYS_SFT 12
1283#define RT5645_CP_FQ1_MASK (0x7 << 8)
1284#define RT5645_CP_FQ1_SFT 8
1285#define RT5645_CP_FQ2_MASK (0x7 << 4)
1286#define RT5645_CP_FQ2_SFT 4
1287#define RT5645_CP_FQ3_MASK (0x7)
1288#define RT5645_CP_FQ3_SFT 0
1289#define RT5645_CP_FQ_1_5_KHZ 0
1290#define RT5645_CP_FQ_3_KHZ 1
1291#define RT5645_CP_FQ_6_KHZ 2
1292#define RT5645_CP_FQ_12_KHZ 3
1293#define RT5645_CP_FQ_24_KHZ 4
1294#define RT5645_CP_FQ_48_KHZ 5
1295#define RT5645_CP_FQ_96_KHZ 6
1296#define RT5645_CP_FQ_192_KHZ 7
1297
1298/* PV detection and SPK gain control (0x92) */
1299#define RT5645_PVDD_DET_MASK (0x1 << 15)
1300#define RT5645_PVDD_DET_SFT 15
1301#define RT5645_PVDD_DET_DIS (0x0 << 15)
1302#define RT5645_PVDD_DET_EN (0x1 << 15)
1303#define RT5645_SPK_AG_MASK (0x1 << 14)
1304#define RT5645_SPK_AG_SFT 14
1305#define RT5645_SPK_AG_DIS (0x0 << 14)
1306#define RT5645_SPK_AG_EN (0x1 << 14)
1307
1308/* Micbias Control (0x93) */
1309#define RT5645_MIC1_BS_MASK (0x1 << 15)
1310#define RT5645_MIC1_BS_SFT 15
1311#define RT5645_MIC1_BS_9AV (0x0 << 15)
1312#define RT5645_MIC1_BS_75AV (0x1 << 15)
1313#define RT5645_MIC2_BS_MASK (0x1 << 14)
1314#define RT5645_MIC2_BS_SFT 14
1315#define RT5645_MIC2_BS_9AV (0x0 << 14)
1316#define RT5645_MIC2_BS_75AV (0x1 << 14)
1317#define RT5645_MIC1_CLK_MASK (0x1 << 13)
1318#define RT5645_MIC1_CLK_SFT 13
1319#define RT5645_MIC1_CLK_DIS (0x0 << 13)
1320#define RT5645_MIC1_CLK_EN (0x1 << 13)
1321#define RT5645_MIC2_CLK_MASK (0x1 << 12)
1322#define RT5645_MIC2_CLK_SFT 12
1323#define RT5645_MIC2_CLK_DIS (0x0 << 12)
1324#define RT5645_MIC2_CLK_EN (0x1 << 12)
1325#define RT5645_MIC1_OVCD_MASK (0x1 << 11)
1326#define RT5645_MIC1_OVCD_SFT 11
1327#define RT5645_MIC1_OVCD_DIS (0x0 << 11)
1328#define RT5645_MIC1_OVCD_EN (0x1 << 11)
1329#define RT5645_MIC1_OVTH_MASK (0x3 << 9)
1330#define RT5645_MIC1_OVTH_SFT 9
1331#define RT5645_MIC1_OVTH_600UA (0x0 << 9)
1332#define RT5645_MIC1_OVTH_1500UA (0x1 << 9)
1333#define RT5645_MIC1_OVTH_2000UA (0x2 << 9)
1334#define RT5645_MIC2_OVCD_MASK (0x1 << 8)
1335#define RT5645_MIC2_OVCD_SFT 8
1336#define RT5645_MIC2_OVCD_DIS (0x0 << 8)
1337#define RT5645_MIC2_OVCD_EN (0x1 << 8)
1338#define RT5645_MIC2_OVTH_MASK (0x3 << 6)
1339#define RT5645_MIC2_OVTH_SFT 6
1340#define RT5645_MIC2_OVTH_600UA (0x0 << 6)
1341#define RT5645_MIC2_OVTH_1500UA (0x1 << 6)
1342#define RT5645_MIC2_OVTH_2000UA (0x2 << 6)
1343#define RT5645_PWR_MB_MASK (0x1 << 5)
1344#define RT5645_PWR_MB_SFT 5
1345#define RT5645_PWR_MB_PD (0x0 << 5)
1346#define RT5645_PWR_MB_PU (0x1 << 5)
1347#define RT5645_PWR_CLK25M_MASK (0x1 << 4)
1348#define RT5645_PWR_CLK25M_SFT 4
1349#define RT5645_PWR_CLK25M_PD (0x0 << 4)
1350#define RT5645_PWR_CLK25M_PU (0x1 << 4)
1351
1352/* VAD Control 4 (0x9d) */
1353#define RT5645_VAD_SEL_MASK (0x3 << 8)
1354#define RT5645_VAD_SEL_SFT 8
1355
1356/* EQ Control 1 (0xb0) */
1357#define RT5645_EQ_SRC_MASK (0x1 << 15)
1358#define RT5645_EQ_SRC_SFT 15
1359#define RT5645_EQ_SRC_DAC (0x0 << 15)
1360#define RT5645_EQ_SRC_ADC (0x1 << 15)
1361#define RT5645_EQ_UPD (0x1 << 14)
1362#define RT5645_EQ_UPD_BIT 14
1363#define RT5645_EQ_CD_MASK (0x1 << 13)
1364#define RT5645_EQ_CD_SFT 13
1365#define RT5645_EQ_CD_DIS (0x0 << 13)
1366#define RT5645_EQ_CD_EN (0x1 << 13)
1367#define RT5645_EQ_DITH_MASK (0x3 << 8)
1368#define RT5645_EQ_DITH_SFT 8
1369#define RT5645_EQ_DITH_NOR (0x0 << 8)
1370#define RT5645_EQ_DITH_LSB (0x1 << 8)
1371#define RT5645_EQ_DITH_LSB_1 (0x2 << 8)
1372#define RT5645_EQ_DITH_LSB_2 (0x3 << 8)
1373
1374/* EQ Control 2 (0xb1) */
1375#define RT5645_EQ_HPF1_M_MASK (0x1 << 8)
1376#define RT5645_EQ_HPF1_M_SFT 8
1377#define RT5645_EQ_HPF1_M_HI (0x0 << 8)
1378#define RT5645_EQ_HPF1_M_1ST (0x1 << 8)
1379#define RT5645_EQ_LPF1_M_MASK (0x1 << 7)
1380#define RT5645_EQ_LPF1_M_SFT 7
1381#define RT5645_EQ_LPF1_M_LO (0x0 << 7)
1382#define RT5645_EQ_LPF1_M_1ST (0x1 << 7)
1383#define RT5645_EQ_HPF2_MASK (0x1 << 6)
1384#define RT5645_EQ_HPF2_SFT 6
1385#define RT5645_EQ_HPF2_DIS (0x0 << 6)
1386#define RT5645_EQ_HPF2_EN (0x1 << 6)
1387#define RT5645_EQ_HPF1_MASK (0x1 << 5)
1388#define RT5645_EQ_HPF1_SFT 5
1389#define RT5645_EQ_HPF1_DIS (0x0 << 5)
1390#define RT5645_EQ_HPF1_EN (0x1 << 5)
1391#define RT5645_EQ_BPF4_MASK (0x1 << 4)
1392#define RT5645_EQ_BPF4_SFT 4
1393#define RT5645_EQ_BPF4_DIS (0x0 << 4)
1394#define RT5645_EQ_BPF4_EN (0x1 << 4)
1395#define RT5645_EQ_BPF3_MASK (0x1 << 3)
1396#define RT5645_EQ_BPF3_SFT 3
1397#define RT5645_EQ_BPF3_DIS (0x0 << 3)
1398#define RT5645_EQ_BPF3_EN (0x1 << 3)
1399#define RT5645_EQ_BPF2_MASK (0x1 << 2)
1400#define RT5645_EQ_BPF2_SFT 2
1401#define RT5645_EQ_BPF2_DIS (0x0 << 2)
1402#define RT5645_EQ_BPF2_EN (0x1 << 2)
1403#define RT5645_EQ_BPF1_MASK (0x1 << 1)
1404#define RT5645_EQ_BPF1_SFT 1
1405#define RT5645_EQ_BPF1_DIS (0x0 << 1)
1406#define RT5645_EQ_BPF1_EN (0x1 << 1)
1407#define RT5645_EQ_LPF_MASK (0x1)
1408#define RT5645_EQ_LPF_SFT 0
1409#define RT5645_EQ_LPF_DIS (0x0)
1410#define RT5645_EQ_LPF_EN (0x1)
1411#define RT5645_EQ_CTRL_MASK (0x7f)
1412
1413/* Memory Test (0xb2) */
1414#define RT5645_MT_MASK (0x1 << 15)
1415#define RT5645_MT_SFT 15
1416#define RT5645_MT_DIS (0x0 << 15)
1417#define RT5645_MT_EN (0x1 << 15)
1418
1419/* DRC/AGC Control 1 (0xb4) */
1420#define RT5645_DRC_AGC_P_MASK (0x1 << 15)
1421#define RT5645_DRC_AGC_P_SFT 15
1422#define RT5645_DRC_AGC_P_DAC (0x0 << 15)
1423#define RT5645_DRC_AGC_P_ADC (0x1 << 15)
1424#define RT5645_DRC_AGC_MASK (0x1 << 14)
1425#define RT5645_DRC_AGC_SFT 14
1426#define RT5645_DRC_AGC_DIS (0x0 << 14)
1427#define RT5645_DRC_AGC_EN (0x1 << 14)
1428#define RT5645_DRC_AGC_UPD (0x1 << 13)
1429#define RT5645_DRC_AGC_UPD_BIT 13
1430#define RT5645_DRC_AGC_AR_MASK (0x1f << 8)
1431#define RT5645_DRC_AGC_AR_SFT 8
1432#define RT5645_DRC_AGC_R_MASK (0x7 << 5)
1433#define RT5645_DRC_AGC_R_SFT 5
1434#define RT5645_DRC_AGC_R_48K (0x1 << 5)
1435#define RT5645_DRC_AGC_R_96K (0x2 << 5)
1436#define RT5645_DRC_AGC_R_192K (0x3 << 5)
1437#define RT5645_DRC_AGC_R_441K (0x5 << 5)
1438#define RT5645_DRC_AGC_R_882K (0x6 << 5)
1439#define RT5645_DRC_AGC_R_1764K (0x7 << 5)
1440#define RT5645_DRC_AGC_RC_MASK (0x1f)
1441#define RT5645_DRC_AGC_RC_SFT 0
1442
1443/* DRC/AGC Control 2 (0xb5) */
1444#define RT5645_DRC_AGC_POB_MASK (0x3f << 8)
1445#define RT5645_DRC_AGC_POB_SFT 8
1446#define RT5645_DRC_AGC_CP_MASK (0x1 << 7)
1447#define RT5645_DRC_AGC_CP_SFT 7
1448#define RT5645_DRC_AGC_CP_DIS (0x0 << 7)
1449#define RT5645_DRC_AGC_CP_EN (0x1 << 7)
1450#define RT5645_DRC_AGC_CPR_MASK (0x3 << 5)
1451#define RT5645_DRC_AGC_CPR_SFT 5
1452#define RT5645_DRC_AGC_CPR_1_1 (0x0 << 5)
1453#define RT5645_DRC_AGC_CPR_1_2 (0x1 << 5)
1454#define RT5645_DRC_AGC_CPR_1_3 (0x2 << 5)
1455#define RT5645_DRC_AGC_CPR_1_4 (0x3 << 5)
1456#define RT5645_DRC_AGC_PRB_MASK (0x1f)
1457#define RT5645_DRC_AGC_PRB_SFT 0
1458
1459/* DRC/AGC Control 3 (0xb6) */
1460#define RT5645_DRC_AGC_NGB_MASK (0xf << 12)
1461#define RT5645_DRC_AGC_NGB_SFT 12
1462#define RT5645_DRC_AGC_TAR_MASK (0x1f << 7)
1463#define RT5645_DRC_AGC_TAR_SFT 7
1464#define RT5645_DRC_AGC_NG_MASK (0x1 << 6)
1465#define RT5645_DRC_AGC_NG_SFT 6
1466#define RT5645_DRC_AGC_NG_DIS (0x0 << 6)
1467#define RT5645_DRC_AGC_NG_EN (0x1 << 6)
1468#define RT5645_DRC_AGC_NGH_MASK (0x1 << 5)
1469#define RT5645_DRC_AGC_NGH_SFT 5
1470#define RT5645_DRC_AGC_NGH_DIS (0x0 << 5)
1471#define RT5645_DRC_AGC_NGH_EN (0x1 << 5)
1472#define RT5645_DRC_AGC_NGT_MASK (0x1f)
1473#define RT5645_DRC_AGC_NGT_SFT 0
1474
1475/* ANC Control 1 (0xb8) */
1476#define RT5645_ANC_M_MASK (0x1 << 15)
1477#define RT5645_ANC_M_SFT 15
1478#define RT5645_ANC_M_NOR (0x0 << 15)
1479#define RT5645_ANC_M_REV (0x1 << 15)
1480#define RT5645_ANC_MASK (0x1 << 14)
1481#define RT5645_ANC_SFT 14
1482#define RT5645_ANC_DIS (0x0 << 14)
1483#define RT5645_ANC_EN (0x1 << 14)
1484#define RT5645_ANC_MD_MASK (0x3 << 12)
1485#define RT5645_ANC_MD_SFT 12
1486#define RT5645_ANC_MD_DIS (0x0 << 12)
1487#define RT5645_ANC_MD_67MS (0x1 << 12)
1488#define RT5645_ANC_MD_267MS (0x2 << 12)
1489#define RT5645_ANC_MD_1067MS (0x3 << 12)
1490#define RT5645_ANC_SN_MASK (0x1 << 11)
1491#define RT5645_ANC_SN_SFT 11
1492#define RT5645_ANC_SN_DIS (0x0 << 11)
1493#define RT5645_ANC_SN_EN (0x1 << 11)
1494#define RT5645_ANC_CLK_MASK (0x1 << 10)
1495#define RT5645_ANC_CLK_SFT 10
1496#define RT5645_ANC_CLK_ANC (0x0 << 10)
1497#define RT5645_ANC_CLK_REG (0x1 << 10)
1498#define RT5645_ANC_ZCD_MASK (0x3 << 8)
1499#define RT5645_ANC_ZCD_SFT 8
1500#define RT5645_ANC_ZCD_DIS (0x0 << 8)
1501#define RT5645_ANC_ZCD_T1 (0x1 << 8)
1502#define RT5645_ANC_ZCD_T2 (0x2 << 8)
1503#define RT5645_ANC_ZCD_WT (0x3 << 8)
1504#define RT5645_ANC_CS_MASK (0x1 << 7)
1505#define RT5645_ANC_CS_SFT 7
1506#define RT5645_ANC_CS_DIS (0x0 << 7)
1507#define RT5645_ANC_CS_EN (0x1 << 7)
1508#define RT5645_ANC_SW_MASK (0x1 << 6)
1509#define RT5645_ANC_SW_SFT 6
1510#define RT5645_ANC_SW_NOR (0x0 << 6)
1511#define RT5645_ANC_SW_AUTO (0x1 << 6)
1512#define RT5645_ANC_CO_L_MASK (0x3f)
1513#define RT5645_ANC_CO_L_SFT 0
1514
1515/* ANC Control 2 (0xb6) */
1516#define RT5645_ANC_FG_R_MASK (0xf << 12)
1517#define RT5645_ANC_FG_R_SFT 12
1518#define RT5645_ANC_FG_L_MASK (0xf << 8)
1519#define RT5645_ANC_FG_L_SFT 8
1520#define RT5645_ANC_CG_R_MASK (0xf << 4)
1521#define RT5645_ANC_CG_R_SFT 4
1522#define RT5645_ANC_CG_L_MASK (0xf)
1523#define RT5645_ANC_CG_L_SFT 0
1524
1525/* ANC Control 3 (0xb6) */
1526#define RT5645_ANC_CD_MASK (0x1 << 6)
1527#define RT5645_ANC_CD_SFT 6
1528#define RT5645_ANC_CD_BOTH (0x0 << 6)
1529#define RT5645_ANC_CD_IND (0x1 << 6)
1530#define RT5645_ANC_CO_R_MASK (0x3f)
1531#define RT5645_ANC_CO_R_SFT 0
1532
1533/* Jack Detect Control (0xbb) */
1534#define RT5645_JD_MASK (0x7 << 13)
1535#define RT5645_JD_SFT 13
1536#define RT5645_JD_DIS (0x0 << 13)
1537#define RT5645_JD_GPIO1 (0x1 << 13)
1538#define RT5645_JD_JD1_IN4P (0x2 << 13)
1539#define RT5645_JD_JD2_IN4N (0x3 << 13)
1540#define RT5645_JD_GPIO2 (0x4 << 13)
1541#define RT5645_JD_GPIO3 (0x5 << 13)
1542#define RT5645_JD_GPIO4 (0x6 << 13)
1543#define RT5645_JD_HP_MASK (0x1 << 11)
1544#define RT5645_JD_HP_SFT 11
1545#define RT5645_JD_HP_DIS (0x0 << 11)
1546#define RT5645_JD_HP_EN (0x1 << 11)
1547#define RT5645_JD_HP_TRG_MASK (0x1 << 10)
1548#define RT5645_JD_HP_TRG_SFT 10
1549#define RT5645_JD_HP_TRG_LO (0x0 << 10)
1550#define RT5645_JD_HP_TRG_HI (0x1 << 10)
1551#define RT5645_JD_SPL_MASK (0x1 << 9)
1552#define RT5645_JD_SPL_SFT 9
1553#define RT5645_JD_SPL_DIS (0x0 << 9)
1554#define RT5645_JD_SPL_EN (0x1 << 9)
1555#define RT5645_JD_SPL_TRG_MASK (0x1 << 8)
1556#define RT5645_JD_SPL_TRG_SFT 8
1557#define RT5645_JD_SPL_TRG_LO (0x0 << 8)
1558#define RT5645_JD_SPL_TRG_HI (0x1 << 8)
1559#define RT5645_JD_SPR_MASK (0x1 << 7)
1560#define RT5645_JD_SPR_SFT 7
1561#define RT5645_JD_SPR_DIS (0x0 << 7)
1562#define RT5645_JD_SPR_EN (0x1 << 7)
1563#define RT5645_JD_SPR_TRG_MASK (0x1 << 6)
1564#define RT5645_JD_SPR_TRG_SFT 6
1565#define RT5645_JD_SPR_TRG_LO (0x0 << 6)
1566#define RT5645_JD_SPR_TRG_HI (0x1 << 6)
1567#define RT5645_JD_MO_MASK (0x1 << 5)
1568#define RT5645_JD_MO_SFT 5
1569#define RT5645_JD_MO_DIS (0x0 << 5)
1570#define RT5645_JD_MO_EN (0x1 << 5)
1571#define RT5645_JD_MO_TRG_MASK (0x1 << 4)
1572#define RT5645_JD_MO_TRG_SFT 4
1573#define RT5645_JD_MO_TRG_LO (0x0 << 4)
1574#define RT5645_JD_MO_TRG_HI (0x1 << 4)
1575#define RT5645_JD_LO_MASK (0x1 << 3)
1576#define RT5645_JD_LO_SFT 3
1577#define RT5645_JD_LO_DIS (0x0 << 3)
1578#define RT5645_JD_LO_EN (0x1 << 3)
1579#define RT5645_JD_LO_TRG_MASK (0x1 << 2)
1580#define RT5645_JD_LO_TRG_SFT 2
1581#define RT5645_JD_LO_TRG_LO (0x0 << 2)
1582#define RT5645_JD_LO_TRG_HI (0x1 << 2)
1583#define RT5645_JD1_IN4P_MASK (0x1 << 1)
1584#define RT5645_JD1_IN4P_SFT 1
1585#define RT5645_JD1_IN4P_DIS (0x0 << 1)
1586#define RT5645_JD1_IN4P_EN (0x1 << 1)
1587#define RT5645_JD2_IN4N_MASK (0x1)
1588#define RT5645_JD2_IN4N_SFT 0
1589#define RT5645_JD2_IN4N_DIS (0x0)
1590#define RT5645_JD2_IN4N_EN (0x1)
1591
1592/* Jack detect for ANC (0xbc) */
1593#define RT5645_ANC_DET_MASK (0x3 << 4)
1594#define RT5645_ANC_DET_SFT 4
1595#define RT5645_ANC_DET_DIS (0x0 << 4)
1596#define RT5645_ANC_DET_MB1 (0x1 << 4)
1597#define RT5645_ANC_DET_MB2 (0x2 << 4)
1598#define RT5645_ANC_DET_JD (0x3 << 4)
1599#define RT5645_AD_TRG_MASK (0x1 << 3)
1600#define RT5645_AD_TRG_SFT 3
1601#define RT5645_AD_TRG_LO (0x0 << 3)
1602#define RT5645_AD_TRG_HI (0x1 << 3)
1603#define RT5645_ANCM_DET_MASK (0x3 << 4)
1604#define RT5645_ANCM_DET_SFT 4
1605#define RT5645_ANCM_DET_DIS (0x0 << 4)
1606#define RT5645_ANCM_DET_MB1 (0x1 << 4)
1607#define RT5645_ANCM_DET_MB2 (0x2 << 4)
1608#define RT5645_ANCM_DET_JD (0x3 << 4)
1609#define RT5645_AMD_TRG_MASK (0x1 << 3)
1610#define RT5645_AMD_TRG_SFT 3
1611#define RT5645_AMD_TRG_LO (0x0 << 3)
1612#define RT5645_AMD_TRG_HI (0x1 << 3)
1613
1614/* IRQ Control 1 (0xbd) */
1615#define RT5645_IRQ_JD_MASK (0x1 << 15)
1616#define RT5645_IRQ_JD_SFT 15
1617#define RT5645_IRQ_JD_BP (0x0 << 15)
1618#define RT5645_IRQ_JD_NOR (0x1 << 15)
1619#define RT5645_IRQ_OT_MASK (0x1 << 14)
1620#define RT5645_IRQ_OT_SFT 14
1621#define RT5645_IRQ_OT_BP (0x0 << 14)
1622#define RT5645_IRQ_OT_NOR (0x1 << 14)
1623#define RT5645_JD_STKY_MASK (0x1 << 13)
1624#define RT5645_JD_STKY_SFT 13
1625#define RT5645_JD_STKY_DIS (0x0 << 13)
1626#define RT5645_JD_STKY_EN (0x1 << 13)
1627#define RT5645_OT_STKY_MASK (0x1 << 12)
1628#define RT5645_OT_STKY_SFT 12
1629#define RT5645_OT_STKY_DIS (0x0 << 12)
1630#define RT5645_OT_STKY_EN (0x1 << 12)
1631#define RT5645_JD_P_MASK (0x1 << 11)
1632#define RT5645_JD_P_SFT 11
1633#define RT5645_JD_P_NOR (0x0 << 11)
1634#define RT5645_JD_P_INV (0x1 << 11)
1635#define RT5645_OT_P_MASK (0x1 << 10)
1636#define RT5645_OT_P_SFT 10
1637#define RT5645_OT_P_NOR (0x0 << 10)
1638#define RT5645_OT_P_INV (0x1 << 10)
1639
1640/* IRQ Control 2 (0xbe) */
1641#define RT5645_IRQ_MB1_OC_MASK (0x1 << 15)
1642#define RT5645_IRQ_MB1_OC_SFT 15
1643#define RT5645_IRQ_MB1_OC_BP (0x0 << 15)
1644#define RT5645_IRQ_MB1_OC_NOR (0x1 << 15)
1645#define RT5645_IRQ_MB2_OC_MASK (0x1 << 14)
1646#define RT5645_IRQ_MB2_OC_SFT 14
1647#define RT5645_IRQ_MB2_OC_BP (0x0 << 14)
1648#define RT5645_IRQ_MB2_OC_NOR (0x1 << 14)
1649#define RT5645_MB1_OC_STKY_MASK (0x1 << 13)
1650#define RT5645_MB1_OC_STKY_SFT 13
1651#define RT5645_MB1_OC_STKY_DIS (0x0 << 13)
1652#define RT5645_MB1_OC_STKY_EN (0x1 << 13)
1653#define RT5645_MB2_OC_STKY_MASK (0x1 << 12)
1654#define RT5645_MB2_OC_STKY_SFT 12
1655#define RT5645_MB2_OC_STKY_DIS (0x0 << 12)
1656#define RT5645_MB2_OC_STKY_EN (0x1 << 12)
1657#define RT5645_MB1_OC_P_MASK (0x1 << 7)
1658#define RT5645_MB1_OC_P_SFT 7
1659#define RT5645_MB1_OC_P_NOR (0x0 << 7)
1660#define RT5645_MB1_OC_P_INV (0x1 << 7)
1661#define RT5645_MB2_OC_P_MASK (0x1 << 6)
1662#define RT5645_MB2_OC_P_SFT 6
1663#define RT5645_MB2_OC_P_NOR (0x0 << 6)
1664#define RT5645_MB2_OC_P_INV (0x1 << 6)
1665#define RT5645_MB1_OC_CLR (0x1 << 3)
1666#define RT5645_MB1_OC_CLR_SFT 3
1667#define RT5645_MB2_OC_CLR (0x1 << 2)
1668#define RT5645_MB2_OC_CLR_SFT 2
1669
1670/* GPIO Control 1 (0xc0) */
1671#define RT5645_GP1_PIN_MASK (0x1 << 15)
1672#define RT5645_GP1_PIN_SFT 15
1673#define RT5645_GP1_PIN_GPIO1 (0x0 << 15)
1674#define RT5645_GP1_PIN_IRQ (0x1 << 15)
1675#define RT5645_GP2_PIN_MASK (0x1 << 14)
1676#define RT5645_GP2_PIN_SFT 14
1677#define RT5645_GP2_PIN_GPIO2 (0x0 << 14)
1678#define RT5645_GP2_PIN_DMIC1_SCL (0x1 << 14)
1679#define RT5645_GP3_PIN_MASK (0x3 << 12)
1680#define RT5645_GP3_PIN_SFT 12
1681#define RT5645_GP3_PIN_GPIO3 (0x0 << 12)
1682#define RT5645_GP3_PIN_DMIC1_SDA (0x1 << 12)
1683#define RT5645_GP3_PIN_IRQ (0x2 << 12)
1684#define RT5645_GP4_PIN_MASK (0x1 << 11)
1685#define RT5645_GP4_PIN_SFT 11
1686#define RT5645_GP4_PIN_GPIO4 (0x0 << 11)
1687#define RT5645_GP4_PIN_DMIC2_SDA (0x1 << 11)
1688#define RT5645_DP_SIG_MASK (0x1 << 10)
1689#define RT5645_DP_SIG_SFT 10
1690#define RT5645_DP_SIG_TEST (0x0 << 10)
1691#define RT5645_DP_SIG_AP (0x1 << 10)
1692#define RT5645_GPIO_M_MASK (0x1 << 9)
1693#define RT5645_GPIO_M_SFT 9
1694#define RT5645_GPIO_M_FLT (0x0 << 9)
1695#define RT5645_GPIO_M_PH (0x1 << 9)
1696#define RT5645_I2S2_SEL (0x1 << 8)
1697#define RT5645_I2S2_SEL_SFT 8
1698#define RT5645_GP5_PIN_MASK (0x1 << 7)
1699#define RT5645_GP5_PIN_SFT 7
1700#define RT5645_GP5_PIN_GPIO5 (0x0 << 7)
1701#define RT5645_GP5_PIN_DMIC1_SDA (0x1 << 7)
1702#define RT5645_GP6_PIN_MASK (0x1 << 6)
1703#define RT5645_GP6_PIN_SFT 6
1704#define RT5645_GP6_PIN_GPIO6 (0x0 << 6)
1705#define RT5645_GP6_PIN_DMIC2_SDA (0x1 << 6)
1706#define RT5645_GP8_PIN_MASK (0x1 << 3)
1707#define RT5645_GP8_PIN_SFT 3
1708#define RT5645_GP8_PIN_GPIO8 (0x0 << 3)
1709#define RT5645_GP8_PIN_DMIC2_SDA (0x1 << 3)
1710#define RT5645_GP12_PIN_MASK (0x1 << 2)
1711#define RT5645_GP12_PIN_SFT 2
1712#define RT5645_GP12_PIN_GPIO12 (0x0 << 2)
1713#define RT5645_GP12_PIN_DMIC2_SDA (0x1 << 2)
1714#define RT5645_GP11_PIN_MASK (0x1 << 1)
1715#define RT5645_GP11_PIN_SFT 1
1716#define RT5645_GP11_PIN_GPIO11 (0x0 << 1)
1717#define RT5645_GP11_PIN_DMIC1_SDA (0x1 << 1)
1718#define RT5645_GP10_PIN_MASK (0x1)
1719#define RT5645_GP10_PIN_SFT 0
1720#define RT5645_GP10_PIN_GPIO10 (0x0)
1721#define RT5645_GP10_PIN_DMIC2_SDA (0x1)
1722
1723/* GPIO Control 3 (0xc2) */
1724#define RT5645_GP4_PF_MASK (0x1 << 11)
1725#define RT5645_GP4_PF_SFT 11
1726#define RT5645_GP4_PF_IN (0x0 << 11)
1727#define RT5645_GP4_PF_OUT (0x1 << 11)
1728#define RT5645_GP4_OUT_MASK (0x1 << 10)
1729#define RT5645_GP4_OUT_SFT 10
1730#define RT5645_GP4_OUT_LO (0x0 << 10)
1731#define RT5645_GP4_OUT_HI (0x1 << 10)
1732#define RT5645_GP4_P_MASK (0x1 << 9)
1733#define RT5645_GP4_P_SFT 9
1734#define RT5645_GP4_P_NOR (0x0 << 9)
1735#define RT5645_GP4_P_INV (0x1 << 9)
1736#define RT5645_GP3_PF_MASK (0x1 << 8)
1737#define RT5645_GP3_PF_SFT 8
1738#define RT5645_GP3_PF_IN (0x0 << 8)
1739#define RT5645_GP3_PF_OUT (0x1 << 8)
1740#define RT5645_GP3_OUT_MASK (0x1 << 7)
1741#define RT5645_GP3_OUT_SFT 7
1742#define RT5645_GP3_OUT_LO (0x0 << 7)
1743#define RT5645_GP3_OUT_HI (0x1 << 7)
1744#define RT5645_GP3_P_MASK (0x1 << 6)
1745#define RT5645_GP3_P_SFT 6
1746#define RT5645_GP3_P_NOR (0x0 << 6)
1747#define RT5645_GP3_P_INV (0x1 << 6)
1748#define RT5645_GP2_PF_MASK (0x1 << 5)
1749#define RT5645_GP2_PF_SFT 5
1750#define RT5645_GP2_PF_IN (0x0 << 5)
1751#define RT5645_GP2_PF_OUT (0x1 << 5)
1752#define RT5645_GP2_OUT_MASK (0x1 << 4)
1753#define RT5645_GP2_OUT_SFT 4
1754#define RT5645_GP2_OUT_LO (0x0 << 4)
1755#define RT5645_GP2_OUT_HI (0x1 << 4)
1756#define RT5645_GP2_P_MASK (0x1 << 3)
1757#define RT5645_GP2_P_SFT 3
1758#define RT5645_GP2_P_NOR (0x0 << 3)
1759#define RT5645_GP2_P_INV (0x1 << 3)
1760#define RT5645_GP1_PF_MASK (0x1 << 2)
1761#define RT5645_GP1_PF_SFT 2
1762#define RT5645_GP1_PF_IN (0x0 << 2)
1763#define RT5645_GP1_PF_OUT (0x1 << 2)
1764#define RT5645_GP1_OUT_MASK (0x1 << 1)
1765#define RT5645_GP1_OUT_SFT 1
1766#define RT5645_GP1_OUT_LO (0x0 << 1)
1767#define RT5645_GP1_OUT_HI (0x1 << 1)
1768#define RT5645_GP1_P_MASK (0x1)
1769#define RT5645_GP1_P_SFT 0
1770#define RT5645_GP1_P_NOR (0x0)
1771#define RT5645_GP1_P_INV (0x1)
1772
1773/* Programmable Register Array Control 1 (0xc8) */
1774#define RT5645_REG_SEQ_MASK (0xf << 12)
1775#define RT5645_REG_SEQ_SFT 12
1776#define RT5645_SEQ1_ST_MASK (0x1 << 11) /*RO*/
1777#define RT5645_SEQ1_ST_SFT 11
1778#define RT5645_SEQ1_ST_RUN (0x0 << 11)
1779#define RT5645_SEQ1_ST_FIN (0x1 << 11)
1780#define RT5645_SEQ2_ST_MASK (0x1 << 10) /*RO*/
1781#define RT5645_SEQ2_ST_SFT 10
1782#define RT5645_SEQ2_ST_RUN (0x0 << 10)
1783#define RT5645_SEQ2_ST_FIN (0x1 << 10)
1784#define RT5645_REG_LV_MASK (0x1 << 9)
1785#define RT5645_REG_LV_SFT 9
1786#define RT5645_REG_LV_MX (0x0 << 9)
1787#define RT5645_REG_LV_PR (0x1 << 9)
1788#define RT5645_SEQ_2_PT_MASK (0x1 << 8)
1789#define RT5645_SEQ_2_PT_BIT 8
1790#define RT5645_REG_IDX_MASK (0xff)
1791#define RT5645_REG_IDX_SFT 0
1792
1793/* Programmable Register Array Control 2 (0xc9) */
1794#define RT5645_REG_DAT_MASK (0xffff)
1795#define RT5645_REG_DAT_SFT 0
1796
1797/* Programmable Register Array Control 3 (0xca) */
1798#define RT5645_SEQ_DLY_MASK (0xff << 8)
1799#define RT5645_SEQ_DLY_SFT 8
1800#define RT5645_PROG_MASK (0x1 << 7)
1801#define RT5645_PROG_SFT 7
1802#define RT5645_PROG_DIS (0x0 << 7)
1803#define RT5645_PROG_EN (0x1 << 7)
1804#define RT5645_SEQ1_PT_RUN (0x1 << 6)
1805#define RT5645_SEQ1_PT_RUN_BIT 6
1806#define RT5645_SEQ2_PT_RUN (0x1 << 5)
1807#define RT5645_SEQ2_PT_RUN_BIT 5
1808
1809/* Programmable Register Array Control 4 (0xcb) */
1810#define RT5645_SEQ1_START_MASK (0xf << 8)
1811#define RT5645_SEQ1_START_SFT 8
1812#define RT5645_SEQ1_END_MASK (0xf)
1813#define RT5645_SEQ1_END_SFT 0
1814
1815/* Programmable Register Array Control 5 (0xcc) */
1816#define RT5645_SEQ2_START_MASK (0xf << 8)
1817#define RT5645_SEQ2_START_SFT 8
1818#define RT5645_SEQ2_END_MASK (0xf)
1819#define RT5645_SEQ2_END_SFT 0
1820
1821/* Scramble Function (0xcd) */
1822#define RT5645_SCB_KEY_MASK (0xff)
1823#define RT5645_SCB_KEY_SFT 0
1824
1825/* Scramble Control (0xce) */
1826#define RT5645_SCB_SWAP_MASK (0x1 << 15)
1827#define RT5645_SCB_SWAP_SFT 15
1828#define RT5645_SCB_SWAP_DIS (0x0 << 15)
1829#define RT5645_SCB_SWAP_EN (0x1 << 15)
1830#define RT5645_SCB_MASK (0x1 << 14)
1831#define RT5645_SCB_SFT 14
1832#define RT5645_SCB_DIS (0x0 << 14)
1833#define RT5645_SCB_EN (0x1 << 14)
1834
1835/* Baseback Control (0xcf) */
1836#define RT5645_BB_MASK (0x1 << 15)
1837#define RT5645_BB_SFT 15
1838#define RT5645_BB_DIS (0x0 << 15)
1839#define RT5645_BB_EN (0x1 << 15)
1840#define RT5645_BB_CT_MASK (0x7 << 12)
1841#define RT5645_BB_CT_SFT 12
1842#define RT5645_BB_CT_A (0x0 << 12)
1843#define RT5645_BB_CT_B (0x1 << 12)
1844#define RT5645_BB_CT_C (0x2 << 12)
1845#define RT5645_BB_CT_D (0x3 << 12)
1846#define RT5645_M_BB_L_MASK (0x1 << 9)
1847#define RT5645_M_BB_L_SFT 9
1848#define RT5645_M_BB_R_MASK (0x1 << 8)
1849#define RT5645_M_BB_R_SFT 8
1850#define RT5645_M_BB_HPF_L_MASK (0x1 << 7)
1851#define RT5645_M_BB_HPF_L_SFT 7
1852#define RT5645_M_BB_HPF_R_MASK (0x1 << 6)
1853#define RT5645_M_BB_HPF_R_SFT 6
1854#define RT5645_G_BB_BST_MASK (0x3f)
1855#define RT5645_G_BB_BST_SFT 0
1856
1857/* MP3 Plus Control 1 (0xd0) */
1858#define RT5645_M_MP3_L_MASK (0x1 << 15)
1859#define RT5645_M_MP3_L_SFT 15
1860#define RT5645_M_MP3_R_MASK (0x1 << 14)
1861#define RT5645_M_MP3_R_SFT 14
1862#define RT5645_M_MP3_MASK (0x1 << 13)
1863#define RT5645_M_MP3_SFT 13
1864#define RT5645_M_MP3_DIS (0x0 << 13)
1865#define RT5645_M_MP3_EN (0x1 << 13)
1866#define RT5645_EG_MP3_MASK (0x1f << 8)
1867#define RT5645_EG_MP3_SFT 8
1868#define RT5645_MP3_HLP_MASK (0x1 << 7)
1869#define RT5645_MP3_HLP_SFT 7
1870#define RT5645_MP3_HLP_DIS (0x0 << 7)
1871#define RT5645_MP3_HLP_EN (0x1 << 7)
1872#define RT5645_M_MP3_ORG_L_MASK (0x1 << 6)
1873#define RT5645_M_MP3_ORG_L_SFT 6
1874#define RT5645_M_MP3_ORG_R_MASK (0x1 << 5)
1875#define RT5645_M_MP3_ORG_R_SFT 5
1876
1877/* MP3 Plus Control 2 (0xd1) */
1878#define RT5645_MP3_WT_MASK (0x1 << 13)
1879#define RT5645_MP3_WT_SFT 13
1880#define RT5645_MP3_WT_1_4 (0x0 << 13)
1881#define RT5645_MP3_WT_1_2 (0x1 << 13)
1882#define RT5645_OG_MP3_MASK (0x1f << 8)
1883#define RT5645_OG_MP3_SFT 8
1884#define RT5645_HG_MP3_MASK (0x3f)
1885#define RT5645_HG_MP3_SFT 0
1886
1887/* 3D HP Control 1 (0xd2) */
1888#define RT5645_3D_CF_MASK (0x1 << 15)
1889#define RT5645_3D_CF_SFT 15
1890#define RT5645_3D_CF_DIS (0x0 << 15)
1891#define RT5645_3D_CF_EN (0x1 << 15)
1892#define RT5645_3D_HP_MASK (0x1 << 14)
1893#define RT5645_3D_HP_SFT 14
1894#define RT5645_3D_HP_DIS (0x0 << 14)
1895#define RT5645_3D_HP_EN (0x1 << 14)
1896#define RT5645_3D_BT_MASK (0x1 << 13)
1897#define RT5645_3D_BT_SFT 13
1898#define RT5645_3D_BT_DIS (0x0 << 13)
1899#define RT5645_3D_BT_EN (0x1 << 13)
1900#define RT5645_3D_1F_MIX_MASK (0x3 << 11)
1901#define RT5645_3D_1F_MIX_SFT 11
1902#define RT5645_3D_HP_M_MASK (0x1 << 10)
1903#define RT5645_3D_HP_M_SFT 10
1904#define RT5645_3D_HP_M_SUR (0x0 << 10)
1905#define RT5645_3D_HP_M_FRO (0x1 << 10)
1906#define RT5645_M_3D_HRTF_MASK (0x1 << 9)
1907#define RT5645_M_3D_HRTF_SFT 9
1908#define RT5645_M_3D_D2H_MASK (0x1 << 8)
1909#define RT5645_M_3D_D2H_SFT 8
1910#define RT5645_M_3D_D2R_MASK (0x1 << 7)
1911#define RT5645_M_3D_D2R_SFT 7
1912#define RT5645_M_3D_REVB_MASK (0x1 << 6)
1913#define RT5645_M_3D_REVB_SFT 6
1914
1915/* Adjustable high pass filter control 1 (0xd3) */
1916#define RT5645_2ND_HPF_MASK (0x1 << 15)
1917#define RT5645_2ND_HPF_SFT 15
1918#define RT5645_2ND_HPF_DIS (0x0 << 15)
1919#define RT5645_2ND_HPF_EN (0x1 << 15)
1920#define RT5645_HPF_CF_L_MASK (0x7 << 12)
1921#define RT5645_HPF_CF_L_SFT 12
1922#define RT5645_1ST_HPF_MASK (0x1 << 11)
1923#define RT5645_1ST_HPF_SFT 11
1924#define RT5645_1ST_HPF_DIS (0x0 << 11)
1925#define RT5645_1ST_HPF_EN (0x1 << 11)
1926#define RT5645_HPF_CF_R_MASK (0x7 << 8)
1927#define RT5645_HPF_CF_R_SFT 8
1928#define RT5645_ZD_T_MASK (0x3 << 6)
1929#define RT5645_ZD_T_SFT 6
1930#define RT5645_ZD_F_MASK (0x3 << 4)
1931#define RT5645_ZD_F_SFT 4
1932#define RT5645_ZD_F_IM (0x0 << 4)
1933#define RT5645_ZD_F_ZC_IM (0x1 << 4)
1934#define RT5645_ZD_F_ZC_IOD (0x2 << 4)
1935#define RT5645_ZD_F_UN (0x3 << 4)
1936
1937/* HP calibration control and Amp detection (0xd6) */
1938#define RT5645_SI_DAC_MASK (0x1 << 11)
1939#define RT5645_SI_DAC_SFT 11
1940#define RT5645_SI_DAC_AUTO (0x0 << 11)
1941#define RT5645_SI_DAC_TEST (0x1 << 11)
1942#define RT5645_DC_CAL_M_MASK (0x1 << 10)
1943#define RT5645_DC_CAL_M_SFT 10
1944#define RT5645_DC_CAL_M_CAL (0x0 << 10)
1945#define RT5645_DC_CAL_M_NOR (0x1 << 10)
1946#define RT5645_DC_CAL_MASK (0x1 << 9)
1947#define RT5645_DC_CAL_SFT 9
1948#define RT5645_DC_CAL_DIS (0x0 << 9)
1949#define RT5645_DC_CAL_EN (0x1 << 9)
1950#define RT5645_HPD_RCV_MASK (0x7 << 6)
1951#define RT5645_HPD_RCV_SFT 6
1952#define RT5645_HPD_PS_MASK (0x1 << 5)
1953#define RT5645_HPD_PS_SFT 5
1954#define RT5645_HPD_PS_DIS (0x0 << 5)
1955#define RT5645_HPD_PS_EN (0x1 << 5)
1956#define RT5645_CAL_M_MASK (0x1 << 4)
1957#define RT5645_CAL_M_SFT 4
1958#define RT5645_CAL_M_DEP (0x0 << 4)
1959#define RT5645_CAL_M_CAL (0x1 << 4)
1960#define RT5645_CAL_MASK (0x1 << 3)
1961#define RT5645_CAL_SFT 3
1962#define RT5645_CAL_DIS (0x0 << 3)
1963#define RT5645_CAL_EN (0x1 << 3)
1964#define RT5645_CAL_TEST_MASK (0x1 << 2)
1965#define RT5645_CAL_TEST_SFT 2
1966#define RT5645_CAL_TEST_DIS (0x0 << 2)
1967#define RT5645_CAL_TEST_EN (0x1 << 2)
1968#define RT5645_CAL_P_MASK (0x3)
1969#define RT5645_CAL_P_SFT 0
1970#define RT5645_CAL_P_NONE (0x0)
1971#define RT5645_CAL_P_CAL (0x1)
1972#define RT5645_CAL_P_DAC_CAL (0x2)
1973
1974/* Soft volume and zero cross control 1 (0xd9) */
1975#define RT5645_SV_MASK (0x1 << 15)
1976#define RT5645_SV_SFT 15
1977#define RT5645_SV_DIS (0x0 << 15)
1978#define RT5645_SV_EN (0x1 << 15)
1979#define RT5645_SPO_SV_MASK (0x1 << 14)
1980#define RT5645_SPO_SV_SFT 14
1981#define RT5645_SPO_SV_DIS (0x0 << 14)
1982#define RT5645_SPO_SV_EN (0x1 << 14)
1983#define RT5645_OUT_SV_MASK (0x1 << 13)
1984#define RT5645_OUT_SV_SFT 13
1985#define RT5645_OUT_SV_DIS (0x0 << 13)
1986#define RT5645_OUT_SV_EN (0x1 << 13)
1987#define RT5645_HP_SV_MASK (0x1 << 12)
1988#define RT5645_HP_SV_SFT 12
1989#define RT5645_HP_SV_DIS (0x0 << 12)
1990#define RT5645_HP_SV_EN (0x1 << 12)
1991#define RT5645_ZCD_DIG_MASK (0x1 << 11)
1992#define RT5645_ZCD_DIG_SFT 11
1993#define RT5645_ZCD_DIG_DIS (0x0 << 11)
1994#define RT5645_ZCD_DIG_EN (0x1 << 11)
1995#define RT5645_ZCD_MASK (0x1 << 10)
1996#define RT5645_ZCD_SFT 10
1997#define RT5645_ZCD_PD (0x0 << 10)
1998#define RT5645_ZCD_PU (0x1 << 10)
1999#define RT5645_M_ZCD_MASK (0x3f << 4)
2000#define RT5645_M_ZCD_SFT 4
2001#define RT5645_M_ZCD_RM_L (0x1 << 9)
2002#define RT5645_M_ZCD_RM_R (0x1 << 8)
2003#define RT5645_M_ZCD_SM_L (0x1 << 7)
2004#define RT5645_M_ZCD_SM_R (0x1 << 6)
2005#define RT5645_M_ZCD_OM_L (0x1 << 5)
2006#define RT5645_M_ZCD_OM_R (0x1 << 4)
2007#define RT5645_SV_DLY_MASK (0xf)
2008#define RT5645_SV_DLY_SFT 0
2009
2010/* Soft volume and zero cross control 2 (0xda) */
2011#define RT5645_ZCD_HP_MASK (0x1 << 15)
2012#define RT5645_ZCD_HP_SFT 15
2013#define RT5645_ZCD_HP_DIS (0x0 << 15)
2014#define RT5645_ZCD_HP_EN (0x1 << 15)
2015
2016
2017/* Codec Private Register definition */
2018/* 3D Speaker Control (0x63) */
2019#define RT5645_3D_SPK_MASK (0x1 << 15)
2020#define RT5645_3D_SPK_SFT 15
2021#define RT5645_3D_SPK_DIS (0x0 << 15)
2022#define RT5645_3D_SPK_EN (0x1 << 15)
2023#define RT5645_3D_SPK_M_MASK (0x3 << 13)
2024#define RT5645_3D_SPK_M_SFT 13
2025#define RT5645_3D_SPK_CG_MASK (0x1f << 8)
2026#define RT5645_3D_SPK_CG_SFT 8
2027#define RT5645_3D_SPK_SG_MASK (0x1f)
2028#define RT5645_3D_SPK_SG_SFT 0
2029
2030/* Wind Noise Detection Control 1 (0x6c) */
2031#define RT5645_WND_MASK (0x1 << 15)
2032#define RT5645_WND_SFT 15
2033#define RT5645_WND_DIS (0x0 << 15)
2034#define RT5645_WND_EN (0x1 << 15)
2035
2036/* Wind Noise Detection Control 2 (0x6d) */
2037#define RT5645_WND_FC_NW_MASK (0x3f << 10)
2038#define RT5645_WND_FC_NW_SFT 10
2039#define RT5645_WND_FC_WK_MASK (0x3f << 4)
2040#define RT5645_WND_FC_WK_SFT 4
2041
2042/* Wind Noise Detection Control 3 (0x6e) */
2043#define RT5645_HPF_FC_MASK (0x3f << 6)
2044#define RT5645_HPF_FC_SFT 6
2045#define RT5645_WND_FC_ST_MASK (0x3f)
2046#define RT5645_WND_FC_ST_SFT 0
2047
2048/* Wind Noise Detection Control 4 (0x6f) */
2049#define RT5645_WND_TH_LO_MASK (0x3ff)
2050#define RT5645_WND_TH_LO_SFT 0
2051
2052/* Wind Noise Detection Control 5 (0x70) */
2053#define RT5645_WND_TH_HI_MASK (0x3ff)
2054#define RT5645_WND_TH_HI_SFT 0
2055
2056/* Wind Noise Detection Control 8 (0x73) */
2057#define RT5645_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2058#define RT5645_WND_WIND_SFT 13
2059#define RT5645_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
2060#define RT5645_WND_STRONG_SFT 12
2061enum {
2062 RT5645_NO_WIND,
2063 RT5645_BREEZE,
2064 RT5645_STORM,
2065};
2066
2067/* Dipole Speaker Interface (0x75) */
2068#define RT5645_DP_ATT_MASK (0x3 << 14)
2069#define RT5645_DP_ATT_SFT 14
2070#define RT5645_DP_SPK_MASK (0x1 << 10)
2071#define RT5645_DP_SPK_SFT 10
2072#define RT5645_DP_SPK_DIS (0x0 << 10)
2073#define RT5645_DP_SPK_EN (0x1 << 10)
2074
2075/* EQ Pre Volume Control (0xb3) */
2076#define RT5645_EQ_PRE_VOL_MASK (0xffff)
2077#define RT5645_EQ_PRE_VOL_SFT 0
2078
2079/* EQ Post Volume Control (0xb4) */
2080#define RT5645_EQ_PST_VOL_MASK (0xffff)
2081#define RT5645_EQ_PST_VOL_SFT 0
2082
2083/* Jack Detect Control 3 (0xf8) */
2084#define RT5645_CMP_MIC_IN_DET_MASK (0x7 << 12)
2085#define RT5645_JD_CBJ_EN (0x1 << 7)
2086#define RT5645_JD_CBJ_POL (0x1 << 6)
2087#define RT5645_JD_TRI_CBJ_SEL_MASK (0x7 << 3)
2088#define RT5645_JD_TRI_CBJ_SEL_SFT (3)
2089#define RT5645_JD_TRI_HPO_SEL_MASK (0x7)
2090#define RT5645_JD_TRI_HPO_SEL_SFT (0)
2091#define RT5645_JD_F_GPIO_JD1 (0x0)
2092#define RT5645_JD_F_JD1_1 (0x1)
2093#define RT5645_JD_F_JD1_2 (0x2)
2094#define RT5645_JD_F_JD2 (0x3)
2095#define RT5645_JD_F_JD3 (0x4)
2096#define RT5645_JD_F_GPIO_JD2 (0x5)
2097#define RT5645_JD_F_MX0B_12 (0x6)
2098
2099/* Digital Misc Control (0xfa) */
2100#define RT5645_RST_DSP (0x1 << 13)
2101#define RT5645_IF1_ADC1_IN1_SEL (0x1 << 12)
2102#define RT5645_IF1_ADC1_IN1_SFT 12
2103#define RT5645_IF1_ADC1_IN2_SEL (0x1 << 11)
2104#define RT5645_IF1_ADC1_IN2_SFT 11
2105#define RT5645_IF1_ADC2_IN1_SEL (0x1 << 10)
2106#define RT5645_IF1_ADC2_IN1_SFT 10
2107#define RT5645_DIG_GATE_CTRL 0x1
2108
2109/* General Control2 (0xfb) */
2110#define RT5645_RXDC_SRC_MASK (0x1 << 7)
2111#define RT5645_RXDC_SRC_STO (0x0 << 7)
2112#define RT5645_RXDC_SRC_MONO (0x1 << 7)
2113#define RT5645_RXDC_SRC_SFT (7)
2114#define RT5645_RXDP2_SEL_MASK (0x1 << 3)
2115#define RT5645_RXDP2_SEL_IF2 (0x0 << 3)
2116#define RT5645_RXDP2_SEL_ADC (0x1 << 3)
2117#define RT5645_RXDP2_SEL_SFT (3)
2118
2119
2120/* Vendor ID (0xfd) */
2121#define RT5645_VER_C 0x2
2122#define RT5645_VER_D 0x3
2123
2124
2125/* Volume Rescale */
2126#define RT5645_VOL_RSCL_MAX 0x27
2127#define RT5645_VOL_RSCL_RANGE 0x1F
2128/* Debug String Length */
2129#define RT5645_REG_DISP_LEN 23
2130
2131
2132/* System Clock Source */
2133enum {
2134 RT5645_SCLK_S_MCLK,
2135 RT5645_SCLK_S_PLL1,
2136 RT5645_SCLK_S_RCCLK,
2137};
2138
2139/* PLL1 Source */
2140enum {
2141 RT5645_PLL1_S_MCLK,
2142 RT5645_PLL1_S_BCLK1,
2143 RT5645_PLL1_S_BCLK2,
2144};
2145
2146enum {
2147 RT5645_AIF1,
2148 RT5645_AIF2,
2149 RT5645_AIFS,
2150};
2151
2152enum {
2153 RT5645_DMIC_DATA_IN2P,
2154 RT5645_DMIC_DATA_GPIO6,
2155 RT5645_DMIC_DATA_GPIO10,
2156 RT5645_DMIC_DATA_GPIO12,
2157};
2158
2159enum {
2160 RT5645_DMIC_DATA_IN2N,
2161 RT5645_DMIC_DATA_GPIO5,
2162 RT5645_DMIC_DATA_GPIO11,
2163};
2164
2165struct rt5645_priv {
2166 struct snd_soc_codec *codec;
2167 struct rt5645_platform_data pdata;
2168 struct regmap *regmap;
2169
2170 int sysclk;
2171 int sysclk_src;
2172 int lrck[RT5645_AIFS];
2173 int bclk[RT5645_AIFS];
2174 int master[RT5645_AIFS];
2175
2176 int pll_src;
2177 int pll_in;
2178 int pll_out;
2179};
2180
2181#endif /* __RT5645_H__ */
diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c
new file mode 100644
index 000000000000..ea4b1c652a26
--- /dev/null
+++ b/sound/soc/codecs/rt5651.c
@@ -0,0 +1,1818 @@
1/*
2 * rt5651.c -- RT5651 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/regmap.h>
19#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rl6231.h"
30#include "rt5651.h"
31
32#define RT5651_DEVICE_ID_VALUE 0x6281
33
34#define RT5651_PR_RANGE_BASE (0xff + 1)
35#define RT5651_PR_SPACING 0x100
36
37#define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING))
38
39static const struct regmap_range_cfg rt5651_ranges[] = {
40 { .name = "PR", .range_min = RT5651_PR_BASE,
41 .range_max = RT5651_PR_BASE + 0xb4,
42 .selector_reg = RT5651_PRIV_INDEX,
43 .selector_mask = 0xff,
44 .selector_shift = 0x0,
45 .window_start = RT5651_PRIV_DATA,
46 .window_len = 0x1, },
47};
48
49static struct reg_default init_list[] = {
50 {RT5651_PR_BASE + 0x3d, 0x3e00},
51};
52
53static const struct reg_default rt5651_reg[] = {
54 { 0x00, 0x0000 },
55 { 0x02, 0xc8c8 },
56 { 0x03, 0xc8c8 },
57 { 0x05, 0x0000 },
58 { 0x0d, 0x0000 },
59 { 0x0e, 0x0000 },
60 { 0x0f, 0x0808 },
61 { 0x10, 0x0808 },
62 { 0x19, 0xafaf },
63 { 0x1a, 0xafaf },
64 { 0x1b, 0x0c00 },
65 { 0x1c, 0x2f2f },
66 { 0x1d, 0x2f2f },
67 { 0x1e, 0x0000 },
68 { 0x27, 0x7860 },
69 { 0x28, 0x7070 },
70 { 0x29, 0x8080 },
71 { 0x2a, 0x5252 },
72 { 0x2b, 0x5454 },
73 { 0x2f, 0x0000 },
74 { 0x30, 0x5000 },
75 { 0x3b, 0x0000 },
76 { 0x3c, 0x006f },
77 { 0x3d, 0x0000 },
78 { 0x3e, 0x006f },
79 { 0x45, 0x6000 },
80 { 0x4d, 0x0000 },
81 { 0x4e, 0x0000 },
82 { 0x4f, 0x0279 },
83 { 0x50, 0x0000 },
84 { 0x51, 0x0000 },
85 { 0x52, 0x0279 },
86 { 0x53, 0xf000 },
87 { 0x61, 0x0000 },
88 { 0x62, 0x0000 },
89 { 0x63, 0x00c0 },
90 { 0x64, 0x0000 },
91 { 0x65, 0x0000 },
92 { 0x66, 0x0000 },
93 { 0x70, 0x8000 },
94 { 0x71, 0x8000 },
95 { 0x73, 0x1104 },
96 { 0x74, 0x0c00 },
97 { 0x75, 0x1400 },
98 { 0x77, 0x0c00 },
99 { 0x78, 0x4000 },
100 { 0x79, 0x0123 },
101 { 0x80, 0x0000 },
102 { 0x81, 0x0000 },
103 { 0x82, 0x0000 },
104 { 0x83, 0x0800 },
105 { 0x84, 0x0000 },
106 { 0x85, 0x0008 },
107 { 0x89, 0x0000 },
108 { 0x8e, 0x0004 },
109 { 0x8f, 0x1100 },
110 { 0x90, 0x0000 },
111 { 0x93, 0x2000 },
112 { 0x94, 0x0200 },
113 { 0xb0, 0x2080 },
114 { 0xb1, 0x0000 },
115 { 0xb4, 0x2206 },
116 { 0xb5, 0x1f00 },
117 { 0xb6, 0x0000 },
118 { 0xbb, 0x0000 },
119 { 0xbc, 0x0000 },
120 { 0xbd, 0x0000 },
121 { 0xbe, 0x0000 },
122 { 0xbf, 0x0000 },
123 { 0xc0, 0x0400 },
124 { 0xc1, 0x0000 },
125 { 0xc2, 0x0000 },
126 { 0xcf, 0x0013 },
127 { 0xd0, 0x0680 },
128 { 0xd1, 0x1c17 },
129 { 0xd3, 0xb320 },
130 { 0xd9, 0x0809 },
131 { 0xfa, 0x0010 },
132 { 0xfe, 0x10ec },
133 { 0xff, 0x6281 },
134};
135
136static bool rt5651_volatile_register(struct device *dev, unsigned int reg)
137{
138 int i;
139
140 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
141 if ((reg >= rt5651_ranges[i].window_start &&
142 reg <= rt5651_ranges[i].window_start +
143 rt5651_ranges[i].window_len) ||
144 (reg >= rt5651_ranges[i].range_min &&
145 reg <= rt5651_ranges[i].range_max)) {
146 return true;
147 }
148 }
149
150 switch (reg) {
151 case RT5651_RESET:
152 case RT5651_PRIV_DATA:
153 case RT5651_EQ_CTRL1:
154 case RT5651_ALC_1:
155 case RT5651_IRQ_CTRL2:
156 case RT5651_INT_IRQ_ST:
157 case RT5651_PGM_REG_ARR1:
158 case RT5651_PGM_REG_ARR3:
159 case RT5651_VENDOR_ID:
160 case RT5651_DEVICE_ID:
161 return true;
162 default:
163 return false;
164 }
165}
166
167static bool rt5651_readable_register(struct device *dev, unsigned int reg)
168{
169 int i;
170
171 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
172 if ((reg >= rt5651_ranges[i].window_start &&
173 reg <= rt5651_ranges[i].window_start +
174 rt5651_ranges[i].window_len) ||
175 (reg >= rt5651_ranges[i].range_min &&
176 reg <= rt5651_ranges[i].range_max)) {
177 return true;
178 }
179 }
180
181 switch (reg) {
182 case RT5651_RESET:
183 case RT5651_VERSION_ID:
184 case RT5651_VENDOR_ID:
185 case RT5651_DEVICE_ID:
186 case RT5651_HP_VOL:
187 case RT5651_LOUT_CTRL1:
188 case RT5651_LOUT_CTRL2:
189 case RT5651_IN1_IN2:
190 case RT5651_IN3:
191 case RT5651_INL1_INR1_VOL:
192 case RT5651_INL2_INR2_VOL:
193 case RT5651_DAC1_DIG_VOL:
194 case RT5651_DAC2_DIG_VOL:
195 case RT5651_DAC2_CTRL:
196 case RT5651_ADC_DIG_VOL:
197 case RT5651_ADC_DATA:
198 case RT5651_ADC_BST_VOL:
199 case RT5651_STO1_ADC_MIXER:
200 case RT5651_STO2_ADC_MIXER:
201 case RT5651_AD_DA_MIXER:
202 case RT5651_STO_DAC_MIXER:
203 case RT5651_DD_MIXER:
204 case RT5651_DIG_INF_DATA:
205 case RT5651_PDM_CTL:
206 case RT5651_REC_L1_MIXER:
207 case RT5651_REC_L2_MIXER:
208 case RT5651_REC_R1_MIXER:
209 case RT5651_REC_R2_MIXER:
210 case RT5651_HPO_MIXER:
211 case RT5651_OUT_L1_MIXER:
212 case RT5651_OUT_L2_MIXER:
213 case RT5651_OUT_L3_MIXER:
214 case RT5651_OUT_R1_MIXER:
215 case RT5651_OUT_R2_MIXER:
216 case RT5651_OUT_R3_MIXER:
217 case RT5651_LOUT_MIXER:
218 case RT5651_PWR_DIG1:
219 case RT5651_PWR_DIG2:
220 case RT5651_PWR_ANLG1:
221 case RT5651_PWR_ANLG2:
222 case RT5651_PWR_MIXER:
223 case RT5651_PWR_VOL:
224 case RT5651_PRIV_INDEX:
225 case RT5651_PRIV_DATA:
226 case RT5651_I2S1_SDP:
227 case RT5651_I2S2_SDP:
228 case RT5651_ADDA_CLK1:
229 case RT5651_ADDA_CLK2:
230 case RT5651_DMIC:
231 case RT5651_TDM_CTL_1:
232 case RT5651_TDM_CTL_2:
233 case RT5651_TDM_CTL_3:
234 case RT5651_GLB_CLK:
235 case RT5651_PLL_CTRL1:
236 case RT5651_PLL_CTRL2:
237 case RT5651_PLL_MODE_1:
238 case RT5651_PLL_MODE_2:
239 case RT5651_PLL_MODE_3:
240 case RT5651_PLL_MODE_4:
241 case RT5651_PLL_MODE_5:
242 case RT5651_PLL_MODE_6:
243 case RT5651_PLL_MODE_7:
244 case RT5651_DEPOP_M1:
245 case RT5651_DEPOP_M2:
246 case RT5651_DEPOP_M3:
247 case RT5651_CHARGE_PUMP:
248 case RT5651_MICBIAS:
249 case RT5651_A_JD_CTL1:
250 case RT5651_EQ_CTRL1:
251 case RT5651_EQ_CTRL2:
252 case RT5651_ALC_1:
253 case RT5651_ALC_2:
254 case RT5651_ALC_3:
255 case RT5651_JD_CTRL1:
256 case RT5651_JD_CTRL2:
257 case RT5651_IRQ_CTRL1:
258 case RT5651_IRQ_CTRL2:
259 case RT5651_INT_IRQ_ST:
260 case RT5651_GPIO_CTRL1:
261 case RT5651_GPIO_CTRL2:
262 case RT5651_GPIO_CTRL3:
263 case RT5651_PGM_REG_ARR1:
264 case RT5651_PGM_REG_ARR2:
265 case RT5651_PGM_REG_ARR3:
266 case RT5651_PGM_REG_ARR4:
267 case RT5651_PGM_REG_ARR5:
268 case RT5651_SCB_FUNC:
269 case RT5651_SCB_CTRL:
270 case RT5651_BASE_BACK:
271 case RT5651_MP3_PLUS1:
272 case RT5651_MP3_PLUS2:
273 case RT5651_ADJ_HPF_CTRL1:
274 case RT5651_ADJ_HPF_CTRL2:
275 case RT5651_HP_CALIB_AMP_DET:
276 case RT5651_HP_CALIB2:
277 case RT5651_SV_ZCD1:
278 case RT5651_SV_ZCD2:
279 case RT5651_D_MISC:
280 case RT5651_DUMMY2:
281 case RT5651_DUMMY3:
282 return true;
283 default:
284 return false;
285 }
286}
287
288static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
289static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
290static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
291static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
292static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
293
294/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
295static unsigned int bst_tlv[] = {
296 TLV_DB_RANGE_HEAD(7),
297 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
298 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
299 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
300 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
301 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
302 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
303 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
304};
305
306/* Interface data select */
307static const char * const rt5651_data_select[] = {
308 "Normal", "Swap", "left copy to right", "right copy to left"};
309
310static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA,
311 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select);
312
313static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA,
314 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select);
315
316static const struct snd_kcontrol_new rt5651_snd_controls[] = {
317 /* Headphone Output Volume */
318 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL,
319 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
320 /* OUTPUT Control */
321 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1,
322 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
323
324 /* DAC Digital Volume */
325 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL,
326 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1),
327 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL,
328 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
329 175, 0, dac_vol_tlv),
330 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL,
331 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
332 175, 0, dac_vol_tlv),
333 /* IN1/IN2 Control */
334 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2,
335 RT5651_BST_SFT1, 8, 0, bst_tlv),
336 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2,
337 RT5651_BST_SFT2, 8, 0, bst_tlv),
338 /* INL/INR Volume Control */
339 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL,
340 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT,
341 31, 1, in_vol_tlv),
342 /* ADC Digital Volume Control */
343 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL,
344 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1),
345 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL,
346 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
347 127, 0, adc_vol_tlv),
348 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA,
349 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
350 127, 0, adc_vol_tlv),
351 /* ADC Boost Volume Control */
352 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL,
353 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT,
354 3, 0, adc_bst_tlv),
355
356 /* ASRC */
357 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
358 RT5651_STO1_T_SFT, 1, 0),
359 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
360 RT5651_STO2_T_SFT, 1, 0),
361 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1,
362 RT5651_DMIC_1_M_SFT, 1, 0),
363
364 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum),
365 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum),
366};
367
368/**
369 * set_dmic_clk - Set parameter of dmic.
370 *
371 * @w: DAPM widget.
372 * @kcontrol: The kcontrol of this widget.
373 * @event: Event id.
374 *
375 */
376static int set_dmic_clk(struct snd_soc_dapm_widget *w,
377 struct snd_kcontrol *kcontrol, int event)
378{
379 struct snd_soc_codec *codec = w->codec;
380 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
381 int idx = -EINVAL;
382
383 idx = rl6231_calc_dmic_clk(rt5651->sysclk);
384
385 if (idx < 0)
386 dev_err(codec->dev, "Failed to set DMIC clock\n");
387 else
388 snd_soc_update_bits(codec, RT5651_DMIC, RT5651_DMIC_CLK_MASK,
389 idx << RT5651_DMIC_CLK_SFT);
390
391 return idx;
392}
393
394static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source,
395 struct snd_soc_dapm_widget *sink)
396{
397 unsigned int val;
398
399 val = snd_soc_read(source->codec, RT5651_GLB_CLK);
400 val &= RT5651_SCLK_SRC_MASK;
401 if (val == RT5651_SCLK_SRC_PLL1)
402 return 1;
403 else
404 return 0;
405}
406
407/* Digital Mixer */
408static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = {
409 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
410 RT5651_M_STO1_ADC_L1_SFT, 1, 1),
411 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
412 RT5651_M_STO1_ADC_L2_SFT, 1, 1),
413};
414
415static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = {
416 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
417 RT5651_M_STO1_ADC_R1_SFT, 1, 1),
418 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
419 RT5651_M_STO1_ADC_R2_SFT, 1, 1),
420};
421
422static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = {
423 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
424 RT5651_M_STO2_ADC_L1_SFT, 1, 1),
425 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
426 RT5651_M_STO2_ADC_L2_SFT, 1, 1),
427};
428
429static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = {
430 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
431 RT5651_M_STO2_ADC_R1_SFT, 1, 1),
432 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
433 RT5651_M_STO2_ADC_R2_SFT, 1, 1),
434};
435
436static const struct snd_kcontrol_new rt5651_dac_l_mix[] = {
437 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
438 RT5651_M_ADCMIX_L_SFT, 1, 1),
439 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
440 RT5651_M_IF1_DAC_L_SFT, 1, 1),
441};
442
443static const struct snd_kcontrol_new rt5651_dac_r_mix[] = {
444 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
445 RT5651_M_ADCMIX_R_SFT, 1, 1),
446 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
447 RT5651_M_IF1_DAC_R_SFT, 1, 1),
448};
449
450static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = {
451 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
452 RT5651_M_DAC_L1_MIXL_SFT, 1, 1),
453 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER,
454 RT5651_M_DAC_L2_MIXL_SFT, 1, 1),
455 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
456 RT5651_M_DAC_R1_MIXL_SFT, 1, 1),
457};
458
459static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = {
460 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
461 RT5651_M_DAC_R1_MIXR_SFT, 1, 1),
462 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER,
463 RT5651_M_DAC_R2_MIXR_SFT, 1, 1),
464 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
465 RT5651_M_DAC_L1_MIXR_SFT, 1, 1),
466};
467
468static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = {
469 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER,
470 RT5651_M_STO_DD_L1_SFT, 1, 1),
471 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
472 RT5651_M_STO_DD_L2_SFT, 1, 1),
473 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
474 RT5651_M_STO_DD_R2_L_SFT, 1, 1),
475};
476
477static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = {
478 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER,
479 RT5651_M_STO_DD_R1_SFT, 1, 1),
480 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
481 RT5651_M_STO_DD_R2_SFT, 1, 1),
482 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
483 RT5651_M_STO_DD_L2_R_SFT, 1, 1),
484};
485
486/* Analog Input Mixer */
487static const struct snd_kcontrol_new rt5651_rec_l_mix[] = {
488 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER,
489 RT5651_M_IN1_L_RM_L_SFT, 1, 1),
490 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER,
491 RT5651_M_BST3_RM_L_SFT, 1, 1),
492 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER,
493 RT5651_M_BST2_RM_L_SFT, 1, 1),
494 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER,
495 RT5651_M_BST1_RM_L_SFT, 1, 1),
496};
497
498static const struct snd_kcontrol_new rt5651_rec_r_mix[] = {
499 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER,
500 RT5651_M_IN1_R_RM_R_SFT, 1, 1),
501 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER,
502 RT5651_M_BST3_RM_R_SFT, 1, 1),
503 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER,
504 RT5651_M_BST2_RM_R_SFT, 1, 1),
505 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER,
506 RT5651_M_BST1_RM_R_SFT, 1, 1),
507};
508
509/* Analog Output Mixer */
510
511static const struct snd_kcontrol_new rt5651_out_l_mix[] = {
512 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER,
513 RT5651_M_BST1_OM_L_SFT, 1, 1),
514 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER,
515 RT5651_M_BST2_OM_L_SFT, 1, 1),
516 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER,
517 RT5651_M_IN1_L_OM_L_SFT, 1, 1),
518 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER,
519 RT5651_M_RM_L_OM_L_SFT, 1, 1),
520 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER,
521 RT5651_M_DAC_L1_OM_L_SFT, 1, 1),
522};
523
524static const struct snd_kcontrol_new rt5651_out_r_mix[] = {
525 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER,
526 RT5651_M_BST2_OM_R_SFT, 1, 1),
527 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER,
528 RT5651_M_BST1_OM_R_SFT, 1, 1),
529 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER,
530 RT5651_M_IN1_R_OM_R_SFT, 1, 1),
531 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER,
532 RT5651_M_RM_R_OM_R_SFT, 1, 1),
533 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER,
534 RT5651_M_DAC_R1_OM_R_SFT, 1, 1),
535};
536
537static const struct snd_kcontrol_new rt5651_hpo_mix[] = {
538 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER,
539 RT5651_M_DAC1_HM_SFT, 1, 1),
540 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER,
541 RT5651_M_HPVOL_HM_SFT, 1, 1),
542};
543
544static const struct snd_kcontrol_new rt5651_lout_mix[] = {
545 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER,
546 RT5651_M_DAC_L1_LM_SFT, 1, 1),
547 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER,
548 RT5651_M_DAC_R1_LM_SFT, 1, 1),
549 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER,
550 RT5651_M_OV_L_LM_SFT, 1, 1),
551 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER,
552 RT5651_M_OV_R_LM_SFT, 1, 1),
553};
554
555static const struct snd_kcontrol_new outvol_l_control =
556 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
557 RT5651_VOL_L_SFT, 1, 1);
558
559static const struct snd_kcontrol_new outvol_r_control =
560 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
561 RT5651_VOL_R_SFT, 1, 1);
562
563static const struct snd_kcontrol_new lout_l_mute_control =
564 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
565 RT5651_L_MUTE_SFT, 1, 1);
566
567static const struct snd_kcontrol_new lout_r_mute_control =
568 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
569 RT5651_R_MUTE_SFT, 1, 1);
570
571static const struct snd_kcontrol_new hpovol_l_control =
572 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
573 RT5651_VOL_L_SFT, 1, 1);
574
575static const struct snd_kcontrol_new hpovol_r_control =
576 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
577 RT5651_VOL_R_SFT, 1, 1);
578
579static const struct snd_kcontrol_new hpo_l_mute_control =
580 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
581 RT5651_L_MUTE_SFT, 1, 1);
582
583static const struct snd_kcontrol_new hpo_r_mute_control =
584 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
585 RT5651_R_MUTE_SFT, 1, 1);
586
587/* INL/R source */
588static const char * const rt5651_inl_src[] = {"IN2P", "HPOVOLLP"};
589
590static SOC_ENUM_SINGLE_DECL(
591 rt5651_inl_enum, RT5651_INL1_INR1_VOL,
592 RT5651_INL_SEL_SFT, rt5651_inl_src);
593
594static const struct snd_kcontrol_new rt5651_inl1_mux =
595 SOC_DAPM_ENUM("INL1 source", rt5651_inl_enum);
596
597static const char * const rt5651_inr1_src[] = {"IN2N", "HPOVOLRP"};
598
599static SOC_ENUM_SINGLE_DECL(
600 rt5651_inr1_enum, RT5651_INL1_INR1_VOL,
601 RT5651_INR_SEL_SFT, rt5651_inr1_src);
602
603static const struct snd_kcontrol_new rt5651_inr1_mux =
604 SOC_DAPM_ENUM("INR1 source", rt5651_inr1_enum);
605
606static const char * const rt5651_inl2_src[] = {"IN3P", "OUTVOLLP"};
607
608static SOC_ENUM_SINGLE_DECL(
609 rt5651_inl2_enum, RT5651_INL2_INR2_VOL,
610 RT5651_INL_SEL_SFT, rt5651_inl2_src);
611
612static const struct snd_kcontrol_new rt5651_inl2_mux =
613 SOC_DAPM_ENUM("INL2 source", rt5651_inl2_enum);
614
615static const char * const rt5651_inr2_src[] = {"IN3N", "OUTVOLRP"};
616
617static SOC_ENUM_SINGLE_DECL(
618 rt5651_inr2_enum, RT5651_INL2_INR2_VOL,
619 RT5651_INR_SEL_SFT, rt5651_inr2_src);
620
621static const struct snd_kcontrol_new rt5651_inr2_mux =
622 SOC_DAPM_ENUM("INR2 source", rt5651_inr2_enum);
623
624
625/* Stereo ADC source */
626static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"};
627
628static SOC_ENUM_SINGLE_DECL(
629 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER,
630 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src);
631
632static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux =
633 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum);
634
635static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux =
636 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum);
637
638static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"};
639
640static SOC_ENUM_SINGLE_DECL(
641 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER,
642 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src);
643
644static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux =
645 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum);
646
647static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux =
648 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum);
649
650/* Mono ADC source */
651static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"};
652
653static SOC_ENUM_SINGLE_DECL(
654 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER,
655 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src);
656
657static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux =
658 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum);
659
660static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"};
661
662static SOC_ENUM_SINGLE_DECL(
663 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER,
664 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src);
665
666static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux =
667 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum);
668
669static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"};
670
671static SOC_ENUM_SINGLE_DECL(
672 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER,
673 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src);
674
675static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux =
676 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum);
677
678static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"};
679
680static SOC_ENUM_SINGLE_DECL(
681 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER,
682 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src);
683
684static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux =
685 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum);
686
687/* DAC2 channel source */
688
689static const char * const rt5651_dac_src[] = {"IF1", "IF2"};
690
691static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL,
692 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src);
693
694static const struct snd_kcontrol_new rt5651_dac_l2_mux =
695 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum);
696
697static SOC_ENUM_SINGLE_DECL(
698 rt5651_dac_r2_enum, RT5651_DAC2_CTRL,
699 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src);
700
701static const struct snd_kcontrol_new rt5651_dac_r2_mux =
702 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum);
703
704/* IF2_ADC channel source */
705
706static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"};
707
708static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA,
709 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src);
710
711static const struct snd_kcontrol_new rt5651_if2_adc_src_mux =
712 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum);
713
714/* PDM select */
715static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"};
716
717static SOC_ENUM_SINGLE_DECL(
718 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL,
719 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel);
720
721static SOC_ENUM_SINGLE_DECL(
722 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL,
723 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel);
724
725static const struct snd_kcontrol_new rt5651_pdm_l_mux =
726 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum);
727
728static const struct snd_kcontrol_new rt5651_pdm_r_mux =
729 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum);
730
731static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w,
732 struct snd_kcontrol *kcontrol, int event)
733{
734 struct snd_soc_codec *codec = w->codec;
735 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
736
737 switch (event) {
738 case SND_SOC_DAPM_POST_PMU:
739 /* depop parameters */
740 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
741 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200);
742 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
743 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN);
744 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
745 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK |
746 RT5651_HP_CB_MASK, RT5651_HP_CP_PU |
747 RT5651_HP_SG_DIS | RT5651_HP_CB_PU);
748 regmap_write(rt5651->regmap, RT5651_PR_BASE +
749 RT5651_HP_DCC_INT1, 0x9f00);
750 /* headphone amp power on */
751 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
752 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0);
753 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
754 RT5651_PWR_HA,
755 RT5651_PWR_HA);
756 usleep_range(10000, 15000);
757 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
758 RT5651_PWR_FV1 | RT5651_PWR_FV2 ,
759 RT5651_PWR_FV1 | RT5651_PWR_FV2);
760 break;
761
762 default:
763 return 0;
764 }
765
766 return 0;
767}
768
769static int rt5651_hp_event(struct snd_soc_dapm_widget *w,
770 struct snd_kcontrol *kcontrol, int event)
771{
772 struct snd_soc_codec *codec = w->codec;
773 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
774
775 switch (event) {
776 case SND_SOC_DAPM_POST_PMU:
777 /* headphone unmute sequence */
778 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
779 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK,
780 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN);
781 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP,
782 RT5651_PM_HP_MASK, RT5651_PM_HP_HV);
783
784 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3,
785 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK |
786 RT5651_CP_FQ3_MASK,
787 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) |
788 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) |
789 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT));
790
791 regmap_write(rt5651->regmap, RT5651_PR_BASE +
792 RT5651_MAMP_INT_REG2, 0x1c00);
793 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
794 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK,
795 RT5651_HP_CP_PD | RT5651_HP_SG_EN);
796 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
797 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400);
798 rt5651->hp_mute = 0;
799 break;
800
801 case SND_SOC_DAPM_PRE_PMD:
802 rt5651->hp_mute = 1;
803 usleep_range(70000, 75000);
804 break;
805
806 default:
807 return 0;
808 }
809
810 return 0;
811}
812
813static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w,
814 struct snd_kcontrol *kcontrol, int event)
815{
816 struct snd_soc_codec *codec = w->codec;
817 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
818
819 switch (event) {
820 case SND_SOC_DAPM_POST_PMU:
821 if (!rt5651->hp_mute)
822 usleep_range(80000, 85000);
823
824 break;
825
826 default:
827 return 0;
828 }
829
830 return 0;
831}
832
833static int rt5651_bst1_event(struct snd_soc_dapm_widget *w,
834 struct snd_kcontrol *kcontrol, int event)
835{
836 struct snd_soc_codec *codec = w->codec;
837
838 switch (event) {
839 case SND_SOC_DAPM_POST_PMU:
840 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
841 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2);
842 break;
843
844 case SND_SOC_DAPM_PRE_PMD:
845 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
846 RT5651_PWR_BST1_OP2, 0);
847 break;
848
849 default:
850 return 0;
851 }
852
853 return 0;
854}
855
856static int rt5651_bst2_event(struct snd_soc_dapm_widget *w,
857 struct snd_kcontrol *kcontrol, int event)
858{
859 struct snd_soc_codec *codec = w->codec;
860
861 switch (event) {
862 case SND_SOC_DAPM_POST_PMU:
863 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
864 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2);
865 break;
866
867 case SND_SOC_DAPM_PRE_PMD:
868 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
869 RT5651_PWR_BST2_OP2, 0);
870 break;
871
872 default:
873 return 0;
874 }
875
876 return 0;
877}
878
879static int rt5651_bst3_event(struct snd_soc_dapm_widget *w,
880 struct snd_kcontrol *kcontrol, int event)
881{
882 struct snd_soc_codec *codec = w->codec;
883
884 switch (event) {
885 case SND_SOC_DAPM_POST_PMU:
886 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
887 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2);
888 break;
889
890 case SND_SOC_DAPM_PRE_PMD:
891 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
892 RT5651_PWR_BST3_OP2, 0);
893 break;
894
895 default:
896 return 0;
897 }
898
899 return 0;
900}
901
902static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = {
903 /* ASRC */
904 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2,
905 15, 0, NULL, 0),
906 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2,
907 14, 0, NULL, 0),
908 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2,
909 13, 0, NULL, 0),
910 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2,
911 12, 0, NULL, 0),
912 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2,
913 11, 0, NULL, 0),
914
915 SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2,
916 RT5651_PWR_PLL_BIT, 0, NULL, 0),
917 /* Input Side */
918 /* micbias */
919 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1,
920 RT5651_PWR_LDO_BIT, 0, NULL, 0),
921 SND_SOC_DAPM_MICBIAS("micbias1", RT5651_PWR_ANLG2,
922 RT5651_PWR_MB1_BIT, 0),
923 /* Input Lines */
924 SND_SOC_DAPM_INPUT("MIC1"),
925 SND_SOC_DAPM_INPUT("MIC2"),
926 SND_SOC_DAPM_INPUT("MIC3"),
927
928 SND_SOC_DAPM_INPUT("IN1P"),
929 SND_SOC_DAPM_INPUT("IN2P"),
930 SND_SOC_DAPM_INPUT("IN2N"),
931 SND_SOC_DAPM_INPUT("IN3P"),
932 SND_SOC_DAPM_INPUT("DMIC L1"),
933 SND_SOC_DAPM_INPUT("DMIC R1"),
934 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT,
935 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
936 /* Boost */
937 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2,
938 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event,
939 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
940 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2,
941 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event,
942 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
943 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2,
944 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event,
945 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
946 /* Input Volume */
947 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL,
948 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
949 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL,
950 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
951 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL,
952 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
953 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL,
954 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
955 /* IN Mux */
956 SND_SOC_DAPM_MUX("INL1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl1_mux),
957 SND_SOC_DAPM_MUX("INR1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr1_mux),
958 SND_SOC_DAPM_MUX("INL2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl2_mux),
959 SND_SOC_DAPM_MUX("INR2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr2_mux),
960 /* REC Mixer */
961 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0,
962 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)),
963 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0,
964 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)),
965 /* ADCs */
966 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
967 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
968 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1,
969 RT5651_PWR_ADC_L_BIT, 0, NULL, 0),
970 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1,
971 RT5651_PWR_ADC_R_BIT, 0, NULL, 0),
972 /* ADC Mux */
973 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
974 &rt5651_sto1_adc_l2_mux),
975 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
976 &rt5651_sto1_adc_r2_mux),
977 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
978 &rt5651_sto1_adc_l1_mux),
979 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
980 &rt5651_sto1_adc_r1_mux),
981 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
982 &rt5651_sto2_adc_l2_mux),
983 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
984 &rt5651_sto2_adc_l1_mux),
985 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
986 &rt5651_sto2_adc_r1_mux),
987 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
988 &rt5651_sto2_adc_r2_mux),
989 /* ADC Mixer */
990 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2,
991 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
992 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2,
993 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0),
994 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
995 rt5651_sto1_adc_l_mix,
996 ARRAY_SIZE(rt5651_sto1_adc_l_mix)),
997 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
998 rt5651_sto1_adc_r_mix,
999 ARRAY_SIZE(rt5651_sto1_adc_r_mix)),
1000 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1001 rt5651_sto2_adc_l_mix,
1002 ARRAY_SIZE(rt5651_sto2_adc_l_mix)),
1003 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1004 rt5651_sto2_adc_r_mix,
1005 ARRAY_SIZE(rt5651_sto2_adc_r_mix)),
1006
1007 /* Digital Interface */
1008 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1,
1009 RT5651_PWR_I2S1_BIT, 0, NULL, 0),
1010 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1011 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1012 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1013 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1014 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1015 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1016 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1017 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1,
1018 RT5651_PWR_I2S2_BIT, 0, NULL, 0),
1019 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1020 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1021 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1022 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0,
1023 &rt5651_if2_adc_src_mux),
1024
1025 /* Digital Interface Select */
1026
1027 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL,
1028 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux),
1029 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL,
1030 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux),
1031 /* Audio Interface */
1032 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1033 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1034 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1035 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1036
1037 /* Audio DSP */
1038 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1039
1040 /* Output Side */
1041 /* DAC mixer before sound effect */
1042 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1043 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)),
1044 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1045 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)),
1046
1047 /* DAC2 channel Mux */
1048 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux),
1049 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux),
1050 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
1051 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
1052
1053 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2,
1054 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
1055 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2,
1056 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0),
1057 /* DAC Mixer */
1058 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1059 rt5651_sto_dac_l_mix,
1060 ARRAY_SIZE(rt5651_sto_dac_l_mix)),
1061 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1062 rt5651_sto_dac_r_mix,
1063 ARRAY_SIZE(rt5651_sto_dac_r_mix)),
1064 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0,
1065 rt5651_dd_dac_l_mix,
1066 ARRAY_SIZE(rt5651_dd_dac_l_mix)),
1067 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0,
1068 rt5651_dd_dac_r_mix,
1069 ARRAY_SIZE(rt5651_dd_dac_r_mix)),
1070
1071 /* DACs */
1072 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1073 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1074 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1,
1075 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0),
1076 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1,
1077 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0),
1078 /* OUT Mixer */
1079 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT,
1080 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)),
1081 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT,
1082 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)),
1083 /* Ouput Volume */
1084 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL,
1085 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control),
1086 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL,
1087 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control),
1088 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL,
1089 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control),
1090 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL,
1091 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control),
1092 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL,
1093 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
1094 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL,
1095 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
1096 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL,
1097 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
1098 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL,
1099 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1100 /* HPO/LOUT/Mono Mixer */
1101 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1102 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1103 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1104 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1105 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1,
1106 RT5651_PWR_HP_L_BIT, 0, NULL, 0),
1107 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1,
1108 RT5651_PWR_HP_R_BIT, 0, NULL, 0),
1109 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0,
1110 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)),
1111
1112 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1,
1113 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event,
1114 SND_SOC_DAPM_POST_PMU),
1115 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event,
1116 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1117 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
1118 &hpo_l_mute_control),
1119 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
1120 &hpo_r_mute_control),
1121 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1122 &lout_l_mute_control),
1123 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1124 &lout_r_mute_control),
1125 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event),
1126
1127 /* Output Lines */
1128 SND_SOC_DAPM_OUTPUT("HPOL"),
1129 SND_SOC_DAPM_OUTPUT("HPOR"),
1130 SND_SOC_DAPM_OUTPUT("LOUTL"),
1131 SND_SOC_DAPM_OUTPUT("LOUTR"),
1132 SND_SOC_DAPM_OUTPUT("PDML"),
1133 SND_SOC_DAPM_OUTPUT("PDMR"),
1134};
1135
1136static const struct snd_soc_dapm_route rt5651_dapm_routes[] = {
1137 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"},
1138 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"},
1139 {"I2S1", NULL, "I2S1 ASRC"},
1140 {"I2S2", NULL, "I2S2 ASRC"},
1141
1142 {"IN1P", NULL, "LDO"},
1143 {"IN2P", NULL, "LDO"},
1144 {"IN3P", NULL, "LDO"},
1145
1146 {"IN1P", NULL, "MIC1"},
1147 {"IN2P", NULL, "MIC2"},
1148 {"IN2N", NULL, "MIC2"},
1149 {"IN3P", NULL, "MIC3"},
1150
1151 {"BST1", NULL, "IN1P"},
1152 {"BST2", NULL, "IN2P"},
1153 {"BST2", NULL, "IN2N"},
1154 {"BST3", NULL, "IN3P"},
1155
1156 {"INL1 VOL", NULL, "IN2P"},
1157 {"INR1 VOL", NULL, "IN2N"},
1158
1159 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
1160 {"RECMIXL", "BST3 Switch", "BST3"},
1161 {"RECMIXL", "BST2 Switch", "BST2"},
1162 {"RECMIXL", "BST1 Switch", "BST1"},
1163
1164 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
1165 {"RECMIXR", "BST3 Switch", "BST3"},
1166 {"RECMIXR", "BST2 Switch", "BST2"},
1167 {"RECMIXR", "BST1 Switch", "BST1"},
1168
1169 {"ADC L", NULL, "RECMIXL"},
1170 {"ADC L", NULL, "ADC L Power"},
1171 {"ADC R", NULL, "RECMIXR"},
1172 {"ADC R", NULL, "ADC R Power"},
1173
1174 {"DMIC L1", NULL, "DMIC CLK"},
1175 {"DMIC R1", NULL, "DMIC CLK"},
1176
1177 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1178 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"},
1179 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"},
1180 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"},
1181
1182 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"},
1183 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"},
1184 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1185 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"},
1186
1187 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"},
1188 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"},
1189 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"},
1190 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"},
1191
1192 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"},
1193 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"},
1194 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"},
1195 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"},
1196
1197 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1198 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1199 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"},
1200 {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll},
1201 {"Stereo1 Filter", NULL, "ADC ASRC"},
1202
1203 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1204 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1205 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"},
1206
1207 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
1208 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
1209 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"},
1210 {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll},
1211 {"Stereo2 Filter", NULL, "ADC ASRC"},
1212
1213 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
1214 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
1215 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"},
1216
1217 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"},
1218 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"},
1219 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
1220 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
1221
1222 {"IF1 ADC1", NULL, "I2S1"},
1223
1224 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"},
1225 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"},
1226 {"IF2 ADC", NULL, "I2S2"},
1227
1228 {"AIF1TX", NULL, "IF1 ADC1"},
1229 {"AIF1TX", NULL, "IF1 ADC2"},
1230 {"AIF2TX", NULL, "IF2 ADC"},
1231
1232 {"IF1 DAC", NULL, "AIF1RX"},
1233 {"IF1 DAC", NULL, "I2S1"},
1234 {"IF2 DAC", NULL, "AIF2RX"},
1235 {"IF2 DAC", NULL, "I2S2"},
1236
1237 {"IF1 DAC1 L", NULL, "IF1 DAC"},
1238 {"IF1 DAC1 R", NULL, "IF1 DAC"},
1239 {"IF1 DAC2 L", NULL, "IF1 DAC"},
1240 {"IF1 DAC2 R", NULL, "IF1 DAC"},
1241 {"IF2 DAC L", NULL, "IF2 DAC"},
1242 {"IF2 DAC R", NULL, "IF2 DAC"},
1243
1244 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1245 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
1246 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1247 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
1248
1249 {"Audio DSP", NULL, "DAC MIXL"},
1250 {"Audio DSP", NULL, "DAC MIXR"},
1251
1252 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"},
1253 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1254 {"DAC L2 Volume", NULL, "DAC L2 Mux"},
1255
1256 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"},
1257 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1258 {"DAC R2 Volume", NULL, "DAC R2 Mux"},
1259
1260 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
1261 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1262 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
1263 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
1264 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"},
1265 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
1266 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1267 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
1268 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
1269 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"},
1270
1271 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"},
1272 {"PDM L Mux", "DD MIX", "DAC MIXL"},
1273 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"},
1274 {"PDM R Mux", "DD MIX", "DAC MIXR"},
1275
1276 {"DAC L1", NULL, "Stereo DAC MIXL"},
1277 {"DAC L1", NULL, "PLL1", is_sysclk_from_pll},
1278 {"DAC L1", NULL, "DAC L1 Power"},
1279 {"DAC R1", NULL, "Stereo DAC MIXR"},
1280 {"DAC R1", NULL, "PLL1", is_sysclk_from_pll},
1281 {"DAC R1", NULL, "DAC R1 Power"},
1282
1283 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"},
1284 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1285 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"},
1286 {"DD MIXL", NULL, "Stero2 DAC Power"},
1287
1288 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"},
1289 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1290 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"},
1291 {"DD MIXR", NULL, "Stero2 DAC Power"},
1292
1293 {"OUT MIXL", "BST1 Switch", "BST1"},
1294 {"OUT MIXL", "BST2 Switch", "BST2"},
1295 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
1296 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1297 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1298
1299 {"OUT MIXR", "BST2 Switch", "BST2"},
1300 {"OUT MIXR", "BST1 Switch", "BST1"},
1301 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
1302 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1303 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1304
1305 {"HPOVOL L", "Switch", "OUT MIXL"},
1306 {"HPOVOL R", "Switch", "OUT MIXR"},
1307 {"OUTVOL L", "Switch", "OUT MIXL"},
1308 {"OUTVOL R", "Switch", "OUT MIXR"},
1309
1310 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"},
1311 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"},
1312 {"HPOL MIX", NULL, "HP L Amp"},
1313 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"},
1314 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"},
1315 {"HPOR MIX", NULL, "HP R Amp"},
1316
1317 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1318 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1319 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1320 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1321
1322 {"HP Amp", NULL, "HPOL MIX"},
1323 {"HP Amp", NULL, "HPOR MIX"},
1324 {"HP Amp", NULL, "Amp Power"},
1325 {"HPO L Playback", "Switch", "HP Amp"},
1326 {"HPO R Playback", "Switch", "HP Amp"},
1327 {"HPOL", NULL, "HPO L Playback"},
1328 {"HPOR", NULL, "HPO R Playback"},
1329
1330 {"LOUT L Playback", "Switch", "LOUT MIX"},
1331 {"LOUT R Playback", "Switch", "LOUT MIX"},
1332 {"LOUTL", NULL, "LOUT L Playback"},
1333 {"LOUTL", NULL, "Amp Power"},
1334 {"LOUTR", NULL, "LOUT R Playback"},
1335 {"LOUTR", NULL, "Amp Power"},
1336
1337 {"PDML", NULL, "PDM L Mux"},
1338 {"PDMR", NULL, "PDM R Mux"},
1339};
1340
1341static int rt5651_hw_params(struct snd_pcm_substream *substream,
1342 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1343{
1344 struct snd_soc_codec *codec = dai->codec;
1345 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1346 unsigned int val_len = 0, val_clk, mask_clk;
1347 int pre_div, bclk_ms, frame_size;
1348
1349 rt5651->lrck[dai->id] = params_rate(params);
1350 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]);
1351
1352 if (pre_div < 0) {
1353 dev_err(codec->dev, "Unsupported clock setting\n");
1354 return -EINVAL;
1355 }
1356 frame_size = snd_soc_params_to_frame_size(params);
1357 if (frame_size < 0) {
1358 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1359 return -EINVAL;
1360 }
1361 bclk_ms = frame_size > 32 ? 1 : 0;
1362 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms);
1363
1364 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1365 rt5651->bclk[dai->id], rt5651->lrck[dai->id]);
1366 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1367 bclk_ms, pre_div, dai->id);
1368
1369 switch (params_format(params)) {
1370 case SNDRV_PCM_FORMAT_S16_LE:
1371 break;
1372 case SNDRV_PCM_FORMAT_S20_3LE:
1373 val_len |= RT5651_I2S_DL_20;
1374 break;
1375 case SNDRV_PCM_FORMAT_S24_LE:
1376 val_len |= RT5651_I2S_DL_24;
1377 break;
1378 case SNDRV_PCM_FORMAT_S8:
1379 val_len |= RT5651_I2S_DL_8;
1380 break;
1381 default:
1382 return -EINVAL;
1383 }
1384
1385 switch (dai->id) {
1386 case RT5651_AIF1:
1387 mask_clk = RT5651_I2S_PD1_MASK;
1388 val_clk = pre_div << RT5651_I2S_PD1_SFT;
1389 snd_soc_update_bits(codec, RT5651_I2S1_SDP,
1390 RT5651_I2S_DL_MASK, val_len);
1391 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk);
1392 break;
1393 case RT5651_AIF2:
1394 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK;
1395 val_clk = pre_div << RT5651_I2S_PD2_SFT;
1396 snd_soc_update_bits(codec, RT5651_I2S2_SDP,
1397 RT5651_I2S_DL_MASK, val_len);
1398 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk);
1399 break;
1400 default:
1401 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id);
1402 return -EINVAL;
1403 }
1404
1405 return 0;
1406}
1407
1408static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1409{
1410 struct snd_soc_codec *codec = dai->codec;
1411 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1412 unsigned int reg_val = 0;
1413
1414 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1415 case SND_SOC_DAIFMT_CBM_CFM:
1416 rt5651->master[dai->id] = 1;
1417 break;
1418 case SND_SOC_DAIFMT_CBS_CFS:
1419 reg_val |= RT5651_I2S_MS_S;
1420 rt5651->master[dai->id] = 0;
1421 break;
1422 default:
1423 return -EINVAL;
1424 }
1425
1426 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1427 case SND_SOC_DAIFMT_NB_NF:
1428 break;
1429 case SND_SOC_DAIFMT_IB_NF:
1430 reg_val |= RT5651_I2S_BP_INV;
1431 break;
1432 default:
1433 return -EINVAL;
1434 }
1435
1436 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1437 case SND_SOC_DAIFMT_I2S:
1438 break;
1439 case SND_SOC_DAIFMT_LEFT_J:
1440 reg_val |= RT5651_I2S_DF_LEFT;
1441 break;
1442 case SND_SOC_DAIFMT_DSP_A:
1443 reg_val |= RT5651_I2S_DF_PCM_A;
1444 break;
1445 case SND_SOC_DAIFMT_DSP_B:
1446 reg_val |= RT5651_I2S_DF_PCM_B;
1447 break;
1448 default:
1449 return -EINVAL;
1450 }
1451
1452 switch (dai->id) {
1453 case RT5651_AIF1:
1454 snd_soc_update_bits(codec, RT5651_I2S1_SDP,
1455 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1456 RT5651_I2S_DF_MASK, reg_val);
1457 break;
1458 case RT5651_AIF2:
1459 snd_soc_update_bits(codec, RT5651_I2S2_SDP,
1460 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1461 RT5651_I2S_DF_MASK, reg_val);
1462 break;
1463 default:
1464 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id);
1465 return -EINVAL;
1466 }
1467 return 0;
1468}
1469
1470static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai,
1471 int clk_id, unsigned int freq, int dir)
1472{
1473 struct snd_soc_codec *codec = dai->codec;
1474 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1475 unsigned int reg_val = 0;
1476
1477 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src)
1478 return 0;
1479
1480 switch (clk_id) {
1481 case RT5651_SCLK_S_MCLK:
1482 reg_val |= RT5651_SCLK_SRC_MCLK;
1483 break;
1484 case RT5651_SCLK_S_PLL1:
1485 reg_val |= RT5651_SCLK_SRC_PLL1;
1486 break;
1487 case RT5651_SCLK_S_RCCLK:
1488 reg_val |= RT5651_SCLK_SRC_RCCLK;
1489 break;
1490 default:
1491 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1492 return -EINVAL;
1493 }
1494 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1495 RT5651_SCLK_SRC_MASK, reg_val);
1496 rt5651->sysclk = freq;
1497 rt5651->sysclk_src = clk_id;
1498
1499 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1500
1501 return 0;
1502}
1503
1504static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1505 unsigned int freq_in, unsigned int freq_out)
1506{
1507 struct snd_soc_codec *codec = dai->codec;
1508 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1509 struct rl6231_pll_code pll_code;
1510 int ret;
1511
1512 if (source == rt5651->pll_src && freq_in == rt5651->pll_in &&
1513 freq_out == rt5651->pll_out)
1514 return 0;
1515
1516 if (!freq_in || !freq_out) {
1517 dev_dbg(codec->dev, "PLL disabled\n");
1518
1519 rt5651->pll_in = 0;
1520 rt5651->pll_out = 0;
1521 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1522 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK);
1523 return 0;
1524 }
1525
1526 switch (source) {
1527 case RT5651_PLL1_S_MCLK:
1528 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1529 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK);
1530 break;
1531 case RT5651_PLL1_S_BCLK1:
1532 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1533 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1);
1534 break;
1535 case RT5651_PLL1_S_BCLK2:
1536 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1537 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2);
1538 break;
1539 default:
1540 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1541 return -EINVAL;
1542 }
1543
1544 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1545 if (ret < 0) {
1546 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1547 return ret;
1548 }
1549
1550 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1551 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1552 pll_code.n_code, pll_code.k_code);
1553
1554 snd_soc_write(codec, RT5651_PLL_CTRL1,
1555 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code);
1556 snd_soc_write(codec, RT5651_PLL_CTRL2,
1557 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT |
1558 pll_code.m_bp << RT5651_PLL_M_BP_SFT);
1559
1560 rt5651->pll_in = freq_in;
1561 rt5651->pll_out = freq_out;
1562 rt5651->pll_src = source;
1563
1564 return 0;
1565}
1566
1567static int rt5651_set_bias_level(struct snd_soc_codec *codec,
1568 enum snd_soc_bias_level level)
1569{
1570 switch (level) {
1571 case SND_SOC_BIAS_PREPARE:
1572 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
1573 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1574 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1575 RT5651_PWR_BG | RT5651_PWR_VREF2,
1576 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1577 RT5651_PWR_BG | RT5651_PWR_VREF2);
1578 usleep_range(10000, 15000);
1579 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1580 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1581 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1582 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1583 RT5651_PWR_LDO_DVO_MASK,
1584 RT5651_PWR_LDO_DVO_1_2V);
1585 snd_soc_update_bits(codec, RT5651_D_MISC, 0x1, 0x1);
1586 if (snd_soc_read(codec, RT5651_PLL_MODE_1) & 0x9200)
1587 snd_soc_update_bits(codec, RT5651_D_MISC,
1588 0xc00, 0xc00);
1589 }
1590 break;
1591
1592 case SND_SOC_BIAS_STANDBY:
1593 snd_soc_write(codec, RT5651_D_MISC, 0x0010);
1594 snd_soc_write(codec, RT5651_PWR_DIG1, 0x0000);
1595 snd_soc_write(codec, RT5651_PWR_DIG2, 0x0000);
1596 snd_soc_write(codec, RT5651_PWR_VOL, 0x0000);
1597 snd_soc_write(codec, RT5651_PWR_MIXER, 0x0000);
1598 snd_soc_write(codec, RT5651_PWR_ANLG1, 0x0000);
1599 snd_soc_write(codec, RT5651_PWR_ANLG2, 0x0000);
1600 break;
1601
1602 default:
1603 break;
1604 }
1605 codec->dapm.bias_level = level;
1606
1607 return 0;
1608}
1609
1610static int rt5651_probe(struct snd_soc_codec *codec)
1611{
1612 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1613
1614 rt5651->codec = codec;
1615
1616 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1617 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1618 RT5651_PWR_BG | RT5651_PWR_VREF2,
1619 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1620 RT5651_PWR_BG | RT5651_PWR_VREF2);
1621 usleep_range(10000, 15000);
1622 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1623 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1624 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1625
1626 rt5651_set_bias_level(codec, SND_SOC_BIAS_OFF);
1627
1628 return 0;
1629}
1630
1631#ifdef CONFIG_PM
1632static int rt5651_suspend(struct snd_soc_codec *codec)
1633{
1634 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1635
1636 regcache_cache_only(rt5651->regmap, true);
1637 regcache_mark_dirty(rt5651->regmap);
1638 return 0;
1639}
1640
1641static int rt5651_resume(struct snd_soc_codec *codec)
1642{
1643 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1644
1645 regcache_cache_only(rt5651->regmap, false);
1646 snd_soc_cache_sync(codec);
1647
1648 return 0;
1649}
1650#else
1651#define rt5651_suspend NULL
1652#define rt5651_resume NULL
1653#endif
1654
1655#define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1656#define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1657 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1658
1659static const struct snd_soc_dai_ops rt5651_aif_dai_ops = {
1660 .hw_params = rt5651_hw_params,
1661 .set_fmt = rt5651_set_dai_fmt,
1662 .set_sysclk = rt5651_set_dai_sysclk,
1663 .set_pll = rt5651_set_dai_pll,
1664};
1665
1666static struct snd_soc_dai_driver rt5651_dai[] = {
1667 {
1668 .name = "rt5651-aif1",
1669 .id = RT5651_AIF1,
1670 .playback = {
1671 .stream_name = "AIF1 Playback",
1672 .channels_min = 1,
1673 .channels_max = 2,
1674 .rates = RT5651_STEREO_RATES,
1675 .formats = RT5651_FORMATS,
1676 },
1677 .capture = {
1678 .stream_name = "AIF1 Capture",
1679 .channels_min = 1,
1680 .channels_max = 2,
1681 .rates = RT5651_STEREO_RATES,
1682 .formats = RT5651_FORMATS,
1683 },
1684 .ops = &rt5651_aif_dai_ops,
1685 },
1686 {
1687 .name = "rt5651-aif2",
1688 .id = RT5651_AIF2,
1689 .playback = {
1690 .stream_name = "AIF2 Playback",
1691 .channels_min = 1,
1692 .channels_max = 2,
1693 .rates = RT5651_STEREO_RATES,
1694 .formats = RT5651_FORMATS,
1695 },
1696 .capture = {
1697 .stream_name = "AIF2 Capture",
1698 .channels_min = 1,
1699 .channels_max = 2,
1700 .rates = RT5651_STEREO_RATES,
1701 .formats = RT5651_FORMATS,
1702 },
1703 .ops = &rt5651_aif_dai_ops,
1704 },
1705};
1706
1707static struct snd_soc_codec_driver soc_codec_dev_rt5651 = {
1708 .probe = rt5651_probe,
1709 .suspend = rt5651_suspend,
1710 .resume = rt5651_resume,
1711 .set_bias_level = rt5651_set_bias_level,
1712 .idle_bias_off = true,
1713 .controls = rt5651_snd_controls,
1714 .num_controls = ARRAY_SIZE(rt5651_snd_controls),
1715 .dapm_widgets = rt5651_dapm_widgets,
1716 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets),
1717 .dapm_routes = rt5651_dapm_routes,
1718 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes),
1719};
1720
1721static const struct regmap_config rt5651_regmap = {
1722 .reg_bits = 8,
1723 .val_bits = 16,
1724
1725 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) *
1726 RT5651_PR_SPACING),
1727 .volatile_reg = rt5651_volatile_register,
1728 .readable_reg = rt5651_readable_register,
1729
1730 .cache_type = REGCACHE_RBTREE,
1731 .reg_defaults = rt5651_reg,
1732 .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
1733 .ranges = rt5651_ranges,
1734 .num_ranges = ARRAY_SIZE(rt5651_ranges),
1735};
1736
1737static const struct i2c_device_id rt5651_i2c_id[] = {
1738 { "rt5651", 0 },
1739 { }
1740};
1741MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id);
1742
1743static int rt5651_i2c_probe(struct i2c_client *i2c,
1744 const struct i2c_device_id *id)
1745{
1746 struct rt5651_platform_data *pdata = dev_get_platdata(&i2c->dev);
1747 struct rt5651_priv *rt5651;
1748 int ret;
1749
1750 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651),
1751 GFP_KERNEL);
1752 if (NULL == rt5651)
1753 return -ENOMEM;
1754
1755 i2c_set_clientdata(i2c, rt5651);
1756
1757 if (pdata)
1758 rt5651->pdata = *pdata;
1759
1760 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap);
1761 if (IS_ERR(rt5651->regmap)) {
1762 ret = PTR_ERR(rt5651->regmap);
1763 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1764 ret);
1765 return ret;
1766 }
1767
1768 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret);
1769 if (ret != RT5651_DEVICE_ID_VALUE) {
1770 dev_err(&i2c->dev,
1771 "Device with ID register %x is not rt5651\n", ret);
1772 return -ENODEV;
1773 }
1774
1775 regmap_write(rt5651->regmap, RT5651_RESET, 0);
1776
1777 ret = regmap_register_patch(rt5651->regmap, init_list,
1778 ARRAY_SIZE(init_list));
1779 if (ret != 0)
1780 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1781
1782 if (rt5651->pdata.in2_diff)
1783 regmap_update_bits(rt5651->regmap, RT5651_IN1_IN2,
1784 RT5651_IN_DF2, RT5651_IN_DF2);
1785
1786 if (rt5651->pdata.dmic_en)
1787 regmap_update_bits(rt5651->regmap, RT5651_GPIO_CTRL1,
1788 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL);
1789
1790 rt5651->hp_mute = 1;
1791
1792 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5651,
1793 rt5651_dai, ARRAY_SIZE(rt5651_dai));
1794
1795 return ret;
1796}
1797
1798static int rt5651_i2c_remove(struct i2c_client *i2c)
1799{
1800 snd_soc_unregister_codec(&i2c->dev);
1801
1802 return 0;
1803}
1804
1805static struct i2c_driver rt5651_i2c_driver = {
1806 .driver = {
1807 .name = "rt5651",
1808 .owner = THIS_MODULE,
1809 },
1810 .probe = rt5651_i2c_probe,
1811 .remove = rt5651_i2c_remove,
1812 .id_table = rt5651_i2c_id,
1813};
1814module_i2c_driver(rt5651_i2c_driver);
1815
1816MODULE_DESCRIPTION("ASoC RT5651 driver");
1817MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1818MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rt5651.h b/sound/soc/codecs/rt5651.h
new file mode 100644
index 000000000000..1bd33cfa6411
--- /dev/null
+++ b/sound/soc/codecs/rt5651.h
@@ -0,0 +1,2080 @@
1/*
2 * rt5651.h -- RT5651 ALSA SoC audio driver
3 *
4 * Copyright 2011 Realtek Microelectronics
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __RT5651_H__
13#define __RT5651_H__
14
15#include <sound/rt5651.h>
16
17/* Info */
18#define RT5651_RESET 0x00
19#define RT5651_VERSION_ID 0xfd
20#define RT5651_VENDOR_ID 0xfe
21#define RT5651_DEVICE_ID 0xff
22/* I/O - Output */
23#define RT5651_HP_VOL 0x02
24#define RT5651_LOUT_CTRL1 0x03
25#define RT5651_LOUT_CTRL2 0x05
26/* I/O - Input */
27#define RT5651_IN1_IN2 0x0d
28#define RT5651_IN3 0x0e
29#define RT5651_INL1_INR1_VOL 0x0f
30#define RT5651_INL2_INR2_VOL 0x10
31/* I/O - ADC/DAC/DMIC */
32#define RT5651_DAC1_DIG_VOL 0x19
33#define RT5651_DAC2_DIG_VOL 0x1a
34#define RT5651_DAC2_CTRL 0x1b
35#define RT5651_ADC_DIG_VOL 0x1c
36#define RT5651_ADC_DATA 0x1d
37#define RT5651_ADC_BST_VOL 0x1e
38/* Mixer - D-D */
39#define RT5651_STO1_ADC_MIXER 0x27
40#define RT5651_STO2_ADC_MIXER 0x28
41#define RT5651_AD_DA_MIXER 0x29
42#define RT5651_STO_DAC_MIXER 0x2a
43#define RT5651_DD_MIXER 0x2b
44#define RT5651_DIG_INF_DATA 0x2f
45/* PDM */
46#define RT5651_PDM_CTL 0x30
47#define RT5651_PDM_I2C_CTL1 0x31
48#define RT5651_PDM_I2C_CTL2 0x32
49#define RT5651_PDM_I2C_DATA_W 0x33
50#define RT5651_PDM_I2C_DATA_R 0x34
51/* Mixer - ADC */
52#define RT5651_REC_L1_MIXER 0x3b
53#define RT5651_REC_L2_MIXER 0x3c
54#define RT5651_REC_R1_MIXER 0x3d
55#define RT5651_REC_R2_MIXER 0x3e
56/* Mixer - DAC */
57#define RT5651_HPO_MIXER 0x45
58#define RT5651_OUT_L1_MIXER 0x4d
59#define RT5651_OUT_L2_MIXER 0x4e
60#define RT5651_OUT_L3_MIXER 0x4f
61#define RT5651_OUT_R1_MIXER 0x50
62#define RT5651_OUT_R2_MIXER 0x51
63#define RT5651_OUT_R3_MIXER 0x52
64#define RT5651_LOUT_MIXER 0x53
65/* Power */
66#define RT5651_PWR_DIG1 0x61
67#define RT5651_PWR_DIG2 0x62
68#define RT5651_PWR_ANLG1 0x63
69#define RT5651_PWR_ANLG2 0x64
70#define RT5651_PWR_MIXER 0x65
71#define RT5651_PWR_VOL 0x66
72/* Private Register Control */
73#define RT5651_PRIV_INDEX 0x6a
74#define RT5651_PRIV_DATA 0x6c
75/* Format - ADC/DAC */
76#define RT5651_I2S1_SDP 0x70
77#define RT5651_I2S2_SDP 0x71
78#define RT5651_ADDA_CLK1 0x73
79#define RT5651_ADDA_CLK2 0x74
80#define RT5651_DMIC 0x75
81/* TDM Control */
82#define RT5651_TDM_CTL_1 0x77
83#define RT5651_TDM_CTL_2 0x78
84#define RT5651_TDM_CTL_3 0x79
85/* Function - Analog */
86#define RT5651_GLB_CLK 0x80
87#define RT5651_PLL_CTRL1 0x81
88#define RT5651_PLL_CTRL2 0x82
89#define RT5651_PLL_MODE_1 0x83
90#define RT5651_PLL_MODE_2 0x84
91#define RT5651_PLL_MODE_3 0x85
92#define RT5651_PLL_MODE_4 0x86
93#define RT5651_PLL_MODE_5 0x87
94#define RT5651_PLL_MODE_6 0x89
95#define RT5651_PLL_MODE_7 0x8a
96#define RT5651_DEPOP_M1 0x8e
97#define RT5651_DEPOP_M2 0x8f
98#define RT5651_DEPOP_M3 0x90
99#define RT5651_CHARGE_PUMP 0x91
100#define RT5651_MICBIAS 0x93
101#define RT5651_A_JD_CTL1 0x94
102/* Function - Digital */
103#define RT5651_EQ_CTRL1 0xb0
104#define RT5651_EQ_CTRL2 0xb1
105#define RT5651_ALC_1 0xb4
106#define RT5651_ALC_2 0xb5
107#define RT5651_ALC_3 0xb6
108#define RT5651_JD_CTRL1 0xbb
109#define RT5651_JD_CTRL2 0xbc
110#define RT5651_IRQ_CTRL1 0xbd
111#define RT5651_IRQ_CTRL2 0xbe
112#define RT5651_INT_IRQ_ST 0xbf
113#define RT5651_GPIO_CTRL1 0xc0
114#define RT5651_GPIO_CTRL2 0xc1
115#define RT5651_GPIO_CTRL3 0xc2
116#define RT5651_PGM_REG_ARR1 0xc8
117#define RT5651_PGM_REG_ARR2 0xc9
118#define RT5651_PGM_REG_ARR3 0xca
119#define RT5651_PGM_REG_ARR4 0xcb
120#define RT5651_PGM_REG_ARR5 0xcc
121#define RT5651_SCB_FUNC 0xcd
122#define RT5651_SCB_CTRL 0xce
123#define RT5651_BASE_BACK 0xcf
124#define RT5651_MP3_PLUS1 0xd0
125#define RT5651_MP3_PLUS2 0xd1
126#define RT5651_ADJ_HPF_CTRL1 0xd3
127#define RT5651_ADJ_HPF_CTRL2 0xd4
128#define RT5651_HP_CALIB_AMP_DET 0xd6
129#define RT5651_HP_CALIB2 0xd7
130#define RT5651_SV_ZCD1 0xd9
131#define RT5651_SV_ZCD2 0xda
132#define RT5651_D_MISC 0xfa
133/* Dummy Register */
134#define RT5651_DUMMY2 0xfb
135#define RT5651_DUMMY3 0xfc
136
137
138/* Index of Codec Private Register definition */
139#define RT5651_BIAS_CUR1 0x12
140#define RT5651_BIAS_CUR3 0x14
141#define RT5651_CLSD_INT_REG1 0x1c
142#define RT5651_CHPUMP_INT_REG1 0x24
143#define RT5651_MAMP_INT_REG2 0x37
144#define RT5651_CHOP_DAC_ADC 0x3d
145#define RT5651_3D_SPK 0x63
146#define RT5651_WND_1 0x6c
147#define RT5651_WND_2 0x6d
148#define RT5651_WND_3 0x6e
149#define RT5651_WND_4 0x6f
150#define RT5651_WND_5 0x70
151#define RT5651_WND_8 0x73
152#define RT5651_DIP_SPK_INF 0x75
153#define RT5651_HP_DCC_INT1 0x77
154#define RT5651_EQ_BW_LOP 0xa0
155#define RT5651_EQ_GN_LOP 0xa1
156#define RT5651_EQ_FC_BP1 0xa2
157#define RT5651_EQ_BW_BP1 0xa3
158#define RT5651_EQ_GN_BP1 0xa4
159#define RT5651_EQ_FC_BP2 0xa5
160#define RT5651_EQ_BW_BP2 0xa6
161#define RT5651_EQ_GN_BP2 0xa7
162#define RT5651_EQ_FC_BP3 0xa8
163#define RT5651_EQ_BW_BP3 0xa9
164#define RT5651_EQ_GN_BP3 0xaa
165#define RT5651_EQ_FC_BP4 0xab
166#define RT5651_EQ_BW_BP4 0xac
167#define RT5651_EQ_GN_BP4 0xad
168#define RT5651_EQ_FC_HIP1 0xae
169#define RT5651_EQ_GN_HIP1 0xaf
170#define RT5651_EQ_FC_HIP2 0xb0
171#define RT5651_EQ_BW_HIP2 0xb1
172#define RT5651_EQ_GN_HIP2 0xb2
173#define RT5651_EQ_PRE_VOL 0xb3
174#define RT5651_EQ_PST_VOL 0xb4
175
176
177/* global definition */
178#define RT5651_L_MUTE (0x1 << 15)
179#define RT5651_L_MUTE_SFT 15
180#define RT5651_VOL_L_MUTE (0x1 << 14)
181#define RT5651_VOL_L_SFT 14
182#define RT5651_R_MUTE (0x1 << 7)
183#define RT5651_R_MUTE_SFT 7
184#define RT5651_VOL_R_MUTE (0x1 << 6)
185#define RT5651_VOL_R_SFT 6
186#define RT5651_L_VOL_MASK (0x3f << 8)
187#define RT5651_L_VOL_SFT 8
188#define RT5651_R_VOL_MASK (0x3f)
189#define RT5651_R_VOL_SFT 0
190
191/* LOUT Control 2(0x05) */
192#define RT5651_EN_DFO (0x1 << 15)
193
194/* IN1 and IN2 Control (0x0d) */
195/* IN3 and IN4 Control (0x0e) */
196#define RT5651_BST_MASK1 (0xf<<12)
197#define RT5651_BST_SFT1 12
198#define RT5651_BST_MASK2 (0xf<<8)
199#define RT5651_BST_SFT2 8
200#define RT5651_IN_DF1 (0x1 << 7)
201#define RT5651_IN_SFT1 7
202#define RT5651_IN_DF2 (0x1 << 6)
203#define RT5651_IN_SFT2 6
204
205/* INL1 and INR1 Volume Control (0x0f) */
206/* INL2 and INR2 Volume Control (0x10) */
207#define RT5651_INL_SEL_MASK (0x1 << 15)
208#define RT5651_INL_SEL_SFT 15
209#define RT5651_INL_SEL_IN4P (0x0 << 15)
210#define RT5651_INL_SEL_MONOP (0x1 << 15)
211#define RT5651_INL_VOL_MASK (0x1f << 8)
212#define RT5651_INL_VOL_SFT 8
213#define RT5651_INR_SEL_MASK (0x1 << 7)
214#define RT5651_INR_SEL_SFT 7
215#define RT5651_INR_SEL_IN4N (0x0 << 7)
216#define RT5651_INR_SEL_MONON (0x1 << 7)
217#define RT5651_INR_VOL_MASK (0x1f)
218#define RT5651_INR_VOL_SFT 0
219
220/* DAC1 Digital Volume (0x19) */
221#define RT5651_DAC_L1_VOL_MASK (0xff << 8)
222#define RT5651_DAC_L1_VOL_SFT 8
223#define RT5651_DAC_R1_VOL_MASK (0xff)
224#define RT5651_DAC_R1_VOL_SFT 0
225
226/* DAC2 Digital Volume (0x1a) */
227#define RT5651_DAC_L2_VOL_MASK (0xff << 8)
228#define RT5651_DAC_L2_VOL_SFT 8
229#define RT5651_DAC_R2_VOL_MASK (0xff)
230#define RT5651_DAC_R2_VOL_SFT 0
231
232/* DAC2 Control (0x1b) */
233#define RT5651_M_DAC_L2_VOL (0x1 << 13)
234#define RT5651_M_DAC_L2_VOL_SFT 13
235#define RT5651_M_DAC_R2_VOL (0x1 << 12)
236#define RT5651_M_DAC_R2_VOL_SFT 12
237#define RT5651_SEL_DAC_L2 (0x1 << 11)
238#define RT5651_IF2_DAC_L2 (0x1 << 11)
239#define RT5651_IF1_DAC_L2 (0x0 << 11)
240#define RT5651_SEL_DAC_L2_SFT 11
241#define RT5651_SEL_DAC_R2 (0x1 << 10)
242#define RT5651_IF2_DAC_R2 (0x1 << 11)
243#define RT5651_IF1_DAC_R2 (0x0 << 11)
244#define RT5651_SEL_DAC_R2_SFT 10
245
246/* ADC Digital Volume Control (0x1c) */
247#define RT5651_ADC_L_VOL_MASK (0x7f << 8)
248#define RT5651_ADC_L_VOL_SFT 8
249#define RT5651_ADC_R_VOL_MASK (0x7f)
250#define RT5651_ADC_R_VOL_SFT 0
251
252/* Mono ADC Digital Volume Control (0x1d) */
253#define RT5651_M_MONO_ADC_L (0x1 << 15)
254#define RT5651_M_MONO_ADC_L_SFT 15
255#define RT5651_MONO_ADC_L_VOL_MASK (0x7f << 8)
256#define RT5651_MONO_ADC_L_VOL_SFT 8
257#define RT5651_M_MONO_ADC_R (0x1 << 7)
258#define RT5651_M_MONO_ADC_R_SFT 7
259#define RT5651_MONO_ADC_R_VOL_MASK (0x7f)
260#define RT5651_MONO_ADC_R_VOL_SFT 0
261
262/* ADC Boost Volume Control (0x1e) */
263#define RT5651_ADC_L_BST_MASK (0x3 << 14)
264#define RT5651_ADC_L_BST_SFT 14
265#define RT5651_ADC_R_BST_MASK (0x3 << 12)
266#define RT5651_ADC_R_BST_SFT 12
267#define RT5651_ADC_COMP_MASK (0x3 << 10)
268#define RT5651_ADC_COMP_SFT 10
269
270/* Stereo ADC1 Mixer Control (0x27) */
271#define RT5651_M_STO1_ADC_L1 (0x1 << 14)
272#define RT5651_M_STO1_ADC_L1_SFT 14
273#define RT5651_M_STO1_ADC_L2 (0x1 << 13)
274#define RT5651_M_STO1_ADC_L2_SFT 13
275#define RT5651_STO1_ADC_1_SRC_MASK (0x1 << 12)
276#define RT5651_STO1_ADC_1_SRC_SFT 12
277#define RT5651_STO1_ADC_1_SRC_ADC (0x1 << 12)
278#define RT5651_STO1_ADC_1_SRC_DACMIX (0x0 << 12)
279#define RT5651_STO1_ADC_2_SRC_MASK (0x1 << 11)
280#define RT5651_STO1_ADC_2_SRC_SFT 11
281#define RT5651_STO1_ADC_2_SRC_DMIC (0x0 << 11)
282#define RT5651_STO1_ADC_2_SRC_DACMIXR (0x1 << 11)
283#define RT5651_M_STO1_ADC_R1 (0x1 << 6)
284#define RT5651_M_STO1_ADC_R1_SFT 6
285#define RT5651_M_STO1_ADC_R2 (0x1 << 5)
286#define RT5651_M_STO1_ADC_R2_SFT 5
287
288/* Stereo ADC2 Mixer Control (0x28) */
289#define RT5651_M_STO2_ADC_L1 (0x1 << 14)
290#define RT5651_M_STO2_ADC_L1_SFT 14
291#define RT5651_M_STO2_ADC_L2 (0x1 << 13)
292#define RT5651_M_STO2_ADC_L2_SFT 13
293#define RT5651_STO2_ADC_L1_SRC_MASK (0x1 << 12)
294#define RT5651_STO2_ADC_L1_SRC_SFT 12
295#define RT5651_STO2_ADC_L1_SRC_DACMIXL (0x0 << 12)
296#define RT5651_STO2_ADC_L1_SRC_ADCL (0x1 << 12)
297#define RT5651_STO2_ADC_L2_SRC_MASK (0x1 << 11)
298#define RT5651_STO2_ADC_L2_SRC_SFT 11
299#define RT5651_STO2_ADC_L2_SRC_DMIC (0x0 << 11)
300#define RT5651_STO2_ADC_L2_SRC_DACMIXR (0x1 << 11)
301#define RT5651_M_STO2_ADC_R1 (0x1 << 6)
302#define RT5651_M_STO2_ADC_R1_SFT 6
303#define RT5651_M_STO2_ADC_R2 (0x1 << 5)
304#define RT5651_M_STO2_ADC_R2_SFT 5
305#define RT5651_STO2_ADC_R1_SRC_MASK (0x1 << 4)
306#define RT5651_STO2_ADC_R1_SRC_SFT 4
307#define RT5651_STO2_ADC_R1_SRC_ADCR (0x1 << 4)
308#define RT5651_STO2_ADC_R1_SRC_DACMIXR (0x0 << 4)
309#define RT5651_STO2_ADC_R2_SRC_MASK (0x1 << 3)
310#define RT5651_STO2_ADC_R2_SRC_SFT 3
311#define RT5651_STO2_ADC_R2_SRC_DMIC (0x0 << 3)
312#define RT5651_STO2_ADC_R2_SRC_DACMIXR (0x1 << 3)
313
314/* ADC Mixer to DAC Mixer Control (0x29) */
315#define RT5651_M_ADCMIX_L (0x1 << 15)
316#define RT5651_M_ADCMIX_L_SFT 15
317#define RT5651_M_IF1_DAC_L (0x1 << 14)
318#define RT5651_M_IF1_DAC_L_SFT 14
319#define RT5651_M_ADCMIX_R (0x1 << 7)
320#define RT5651_M_ADCMIX_R_SFT 7
321#define RT5651_M_IF1_DAC_R (0x1 << 6)
322#define RT5651_M_IF1_DAC_R_SFT 6
323
324/* Stereo DAC Mixer Control (0x2a) */
325#define RT5651_M_DAC_L1_MIXL (0x1 << 14)
326#define RT5651_M_DAC_L1_MIXL_SFT 14
327#define RT5651_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
328#define RT5651_DAC_L1_STO_L_VOL_SFT 13
329#define RT5651_M_DAC_L2_MIXL (0x1 << 12)
330#define RT5651_M_DAC_L2_MIXL_SFT 12
331#define RT5651_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
332#define RT5651_DAC_L2_STO_L_VOL_SFT 11
333#define RT5651_M_DAC_R1_MIXL (0x1 << 9)
334#define RT5651_M_DAC_R1_MIXL_SFT 9
335#define RT5651_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
336#define RT5651_DAC_R1_STO_L_VOL_SFT 8
337#define RT5651_M_DAC_R1_MIXR (0x1 << 6)
338#define RT5651_M_DAC_R1_MIXR_SFT 6
339#define RT5651_DAC_R1_STO_R_VOL_MASK (0x1 << 5)
340#define RT5651_DAC_R1_STO_R_VOL_SFT 5
341#define RT5651_M_DAC_R2_MIXR (0x1 << 4)
342#define RT5651_M_DAC_R2_MIXR_SFT 4
343#define RT5651_DAC_R2_STO_R_VOL_MASK (0x1 << 3)
344#define RT5651_DAC_R2_STO_R_VOL_SFT 3
345#define RT5651_M_DAC_L1_MIXR (0x1 << 1)
346#define RT5651_M_DAC_L1_MIXR_SFT 1
347#define RT5651_DAC_L1_STO_R_VOL_MASK (0x1)
348#define RT5651_DAC_L1_STO_R_VOL_SFT 0
349
350/* DD Mixer Control (0x2b) */
351#define RT5651_M_STO_DD_L1 (0x1 << 14)
352#define RT5651_M_STO_DD_L1_SFT 14
353#define RT5651_STO_DD_L1_VOL_MASK (0x1 << 13)
354#define RT5651_DAC_DD_L1_VOL_SFT 13
355#define RT5651_M_STO_DD_L2 (0x1 << 12)
356#define RT5651_M_STO_DD_L2_SFT 12
357#define RT5651_STO_DD_L2_VOL_MASK (0x1 << 11)
358#define RT5651_STO_DD_L2_VOL_SFT 11
359#define RT5651_M_STO_DD_R2_L (0x1 << 10)
360#define RT5651_M_STO_DD_R2_L_SFT 10
361#define RT5651_STO_DD_R2_L_VOL_MASK (0x1 << 9)
362#define RT5651_STO_DD_R2_L_VOL_SFT 9
363#define RT5651_M_STO_DD_R1 (0x1 << 6)
364#define RT5651_M_STO_DD_R1_SFT 6
365#define RT5651_STO_DD_R1_VOL_MASK (0x1 << 5)
366#define RT5651_STO_DD_R1_VOL_SFT 5
367#define RT5651_M_STO_DD_R2 (0x1 << 4)
368#define RT5651_M_STO_DD_R2_SFT 4
369#define RT5651_STO_DD_R2_VOL_MASK (0x1 << 3)
370#define RT5651_STO_DD_R2_VOL_SFT 3
371#define RT5651_M_STO_DD_L2_R (0x1 << 2)
372#define RT5651_M_STO_DD_L2_R_SFT 2
373#define RT5651_STO_DD_L2_R_VOL_MASK (0x1 << 1)
374#define RT5651_STO_DD_L2_R_VOL_SFT 1
375
376/* Digital Mixer Control (0x2c) */
377#define RT5651_M_STO_L_DAC_L (0x1 << 15)
378#define RT5651_M_STO_L_DAC_L_SFT 15
379#define RT5651_STO_L_DAC_L_VOL_MASK (0x1 << 14)
380#define RT5651_STO_L_DAC_L_VOL_SFT 14
381#define RT5651_M_DAC_L2_DAC_L (0x1 << 13)
382#define RT5651_M_DAC_L2_DAC_L_SFT 13
383#define RT5651_DAC_L2_DAC_L_VOL_MASK (0x1 << 12)
384#define RT5651_DAC_L2_DAC_L_VOL_SFT 12
385#define RT5651_M_STO_R_DAC_R (0x1 << 11)
386#define RT5651_M_STO_R_DAC_R_SFT 11
387#define RT5651_STO_R_DAC_R_VOL_MASK (0x1 << 10)
388#define RT5651_STO_R_DAC_R_VOL_SFT 10
389#define RT5651_M_DAC_R2_DAC_R (0x1 << 9)
390#define RT5651_M_DAC_R2_DAC_R_SFT 9
391#define RT5651_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
392#define RT5651_DAC_R2_DAC_R_VOL_SFT 8
393
394/* DSP Path Control 1 (0x2d) */
395#define RT5651_RXDP_SRC_MASK (0x1 << 15)
396#define RT5651_RXDP_SRC_SFT 15
397#define RT5651_RXDP_SRC_NOR (0x0 << 15)
398#define RT5651_RXDP_SRC_DIV3 (0x1 << 15)
399#define RT5651_TXDP_SRC_MASK (0x1 << 14)
400#define RT5651_TXDP_SRC_SFT 14
401#define RT5651_TXDP_SRC_NOR (0x0 << 14)
402#define RT5651_TXDP_SRC_DIV3 (0x1 << 14)
403
404/* DSP Path Control 2 (0x2e) */
405#define RT5651_DAC_L2_SEL_MASK (0x3 << 14)
406#define RT5651_DAC_L2_SEL_SFT 14
407#define RT5651_DAC_L2_SEL_IF2 (0x0 << 14)
408#define RT5651_DAC_L2_SEL_IF3 (0x1 << 14)
409#define RT5651_DAC_L2_SEL_TXDC (0x2 << 14)
410#define RT5651_DAC_L2_SEL_BASS (0x3 << 14)
411#define RT5651_DAC_R2_SEL_MASK (0x3 << 12)
412#define RT5651_DAC_R2_SEL_SFT 12
413#define RT5651_DAC_R2_SEL_IF2 (0x0 << 12)
414#define RT5651_DAC_R2_SEL_IF3 (0x1 << 12)
415#define RT5651_DAC_R2_SEL_TXDC (0x2 << 12)
416#define RT5651_IF2_ADC_L_SEL_MASK (0x1 << 11)
417#define RT5651_IF2_ADC_L_SEL_SFT 11
418#define RT5651_IF2_ADC_L_SEL_TXDP (0x0 << 11)
419#define RT5651_IF2_ADC_L_SEL_PASS (0x1 << 11)
420#define RT5651_IF2_ADC_R_SEL_MASK (0x1 << 10)
421#define RT5651_IF2_ADC_R_SEL_SFT 10
422#define RT5651_IF2_ADC_R_SEL_TXDP (0x0 << 10)
423#define RT5651_IF2_ADC_R_SEL_PASS (0x1 << 10)
424#define RT5651_RXDC_SEL_MASK (0x3 << 8)
425#define RT5651_RXDC_SEL_SFT 8
426#define RT5651_RXDC_SEL_NOR (0x0 << 8)
427#define RT5651_RXDC_SEL_L2R (0x1 << 8)
428#define RT5651_RXDC_SEL_R2L (0x2 << 8)
429#define RT5651_RXDC_SEL_SWAP (0x3 << 8)
430#define RT5651_RXDP_SEL_MASK (0x3 << 6)
431#define RT5651_RXDP_SEL_SFT 6
432#define RT5651_RXDP_SEL_NOR (0x0 << 6)
433#define RT5651_RXDP_SEL_L2R (0x1 << 6)
434#define RT5651_RXDP_SEL_R2L (0x2 << 6)
435#define RT5651_RXDP_SEL_SWAP (0x3 << 6)
436#define RT5651_TXDC_SEL_MASK (0x3 << 4)
437#define RT5651_TXDC_SEL_SFT 4
438#define RT5651_TXDC_SEL_NOR (0x0 << 4)
439#define RT5651_TXDC_SEL_L2R (0x1 << 4)
440#define RT5651_TXDC_SEL_R2L (0x2 << 4)
441#define RT5651_TXDC_SEL_SWAP (0x3 << 4)
442#define RT5651_TXDP_SEL_MASK (0x3 << 2)
443#define RT5651_TXDP_SEL_SFT 2
444#define RT5651_TXDP_SEL_NOR (0x0 << 2)
445#define RT5651_TXDP_SEL_L2R (0x1 << 2)
446#define RT5651_TXDP_SEL_R2L (0x2 << 2)
447#define RT5651_TRXDP_SEL_SWAP (0x3 << 2)
448
449/* Digital Interface Data Control (0x2f) */
450#define RT5651_IF2_DAC_SEL_MASK (0x3 << 10)
451#define RT5651_IF2_DAC_SEL_SFT 10
452#define RT5651_IF2_DAC_SEL_NOR (0x0 << 10)
453#define RT5651_IF2_DAC_SEL_SWAP (0x1 << 10)
454#define RT5651_IF2_DAC_SEL_L2R (0x2 << 10)
455#define RT5651_IF2_DAC_SEL_R2L (0x3 << 10)
456#define RT5651_IF2_ADC_SEL_MASK (0x3 << 8)
457#define RT5651_IF2_ADC_SEL_SFT 8
458#define RT5651_IF2_ADC_SEL_NOR (0x0 << 8)
459#define RT5651_IF2_ADC_SEL_SWAP (0x1 << 8)
460#define RT5651_IF2_ADC_SEL_L2R (0x2 << 8)
461#define RT5651_IF2_ADC_SEL_R2L (0x3 << 8)
462#define RT5651_IF2_ADC_SRC_MASK (0x1 << 7)
463#define RT5651_IF2_ADC_SRC_SFT 7
464#define RT5651_IF1_ADC1 (0x0 << 7)
465#define RT5651_IF1_ADC2 (0x1 << 7)
466
467/* PDM Output Control (0x30) */
468#define RT5651_PDM_L_SEL_MASK (0x1 << 15)
469#define RT5651_PDM_L_SEL_SFT 15
470#define RT5651_PDM_L_SEL_DD_L (0x0 << 15)
471#define RT5651_PDM_L_SEL_STO_L (0x1 << 15)
472#define RT5651_M_PDM_L (0x1 << 14)
473#define RT5651_M_PDM_L_SFT 14
474#define RT5651_PDM_R_SEL_MASK (0x1 << 13)
475#define RT5651_PDM_R_SEL_SFT 13
476#define RT5651_PDM_R_SEL_DD_L (0x0 << 13)
477#define RT5651_PDM_R_SEL_STO_L (0x1 << 13)
478#define RT5651_M_PDM_R (0x1 << 12)
479#define RT5651_M_PDM_R_SFT 12
480#define RT5651_PDM_BUSY (0x1 << 6)
481#define RT5651_PDM_BUSY_SFT 6
482#define RT5651_PDM_PATTERN_SEL_MASK (0x1 << 5)
483#define RT5651_PDM_PATTERN_SEL_64 (0x0 << 5)
484#define RT5651_PDM_PATTERN_SEL_128 (0x1 << 5)
485#define RT5651_PDM_VOL_MASK (0x1 << 4)
486#define RT5651_PDM_VOL_SFT 4
487#define RT5651_PDM_DIV_MASK (0x3)
488#define RT5651_PDM_DIV_SFT 0
489#define RT5651_PDM_DIV_1 0
490#define RT5651_PDM_DIV_2 1
491#define RT5651_PDM_DIV_3 2
492#define RT5651_PDM_DIV_4 3
493
494/* PDM I2C/Data Control 1 (0x31) */
495#define RT5651_PDM_I2C_ID_MASK (0xf << 12)
496#define PT5631_PDM_CMD_EXE (0x1 << 11)
497#define RT5651_PDM_I2C_CMD_MASK (0x1 << 10)
498#define RT5651_PDM_I2C_CMD_R (0x0 << 10)
499#define RT5651_PDM_I2C_CMD_W (0x1 << 10)
500#define RT5651_PDM_I2C_CMD_EXE (0x1 << 9)
501#define RT5651_PDM_I2C_NORMAL (0x0 << 8)
502#define RT5651_PDM_I2C_BUSY (0x1 << 8)
503
504/* PDM I2C/Data Control 2 (0x32) */
505#define RT5651_PDM_I2C_ADDR (0xff << 8)
506#define RT5651_PDM_I2C_CMD_PATTERN (0xff)
507
508
509/* REC Left Mixer Control 1 (0x3b) */
510#define RT5651_G_LN_L2_RM_L_MASK (0x7 << 13)
511#define RT5651_G_IN_L2_RM_L_SFT 13
512#define RT5651_G_LN_L1_RM_L_MASK (0x7 << 10)
513#define RT5651_G_IN_L1_RM_L_SFT 10
514#define RT5651_G_BST3_RM_L_MASK (0x7 << 4)
515#define RT5651_G_BST3_RM_L_SFT 4
516#define RT5651_G_BST2_RM_L_MASK (0x7 << 1)
517#define RT5651_G_BST2_RM_L_SFT 1
518
519/* REC Left Mixer Control 2 (0x3c) */
520#define RT5651_G_BST1_RM_L_MASK (0x7 << 13)
521#define RT5651_G_BST1_RM_L_SFT 13
522#define RT5651_G_OM_L_RM_L_MASK (0x7 << 10)
523#define RT5651_G_OM_L_RM_L_SFT 10
524#define RT5651_M_IN2_L_RM_L (0x1 << 6)
525#define RT5651_M_IN2_L_RM_L_SFT 6
526#define RT5651_M_IN1_L_RM_L (0x1 << 5)
527#define RT5651_M_IN1_L_RM_L_SFT 5
528#define RT5651_M_BST3_RM_L (0x1 << 3)
529#define RT5651_M_BST3_RM_L_SFT 3
530#define RT5651_M_BST2_RM_L (0x1 << 2)
531#define RT5651_M_BST2_RM_L_SFT 2
532#define RT5651_M_BST1_RM_L (0x1 << 1)
533#define RT5651_M_BST1_RM_L_SFT 1
534#define RT5651_M_OM_L_RM_L (0x1)
535#define RT5651_M_OM_L_RM_L_SFT 0
536
537/* REC Right Mixer Control 1 (0x3d) */
538#define RT5651_G_IN2_R_RM_R_MASK (0x7 << 13)
539#define RT5651_G_IN2_R_RM_R_SFT 13
540#define RT5651_G_IN1_R_RM_R_MASK (0x7 << 10)
541#define RT5651_G_IN1_R_RM_R_SFT 10
542#define RT5651_G_BST3_RM_R_MASK (0x7 << 4)
543#define RT5651_G_BST3_RM_R_SFT 4
544#define RT5651_G_BST2_RM_R_MASK (0x7 << 1)
545#define RT5651_G_BST2_RM_R_SFT 1
546
547/* REC Right Mixer Control 2 (0x3e) */
548#define RT5651_G_BST1_RM_R_MASK (0x7 << 13)
549#define RT5651_G_BST1_RM_R_SFT 13
550#define RT5651_G_OM_R_RM_R_MASK (0x7 << 10)
551#define RT5651_G_OM_R_RM_R_SFT 10
552#define RT5651_M_IN2_R_RM_R (0x1 << 6)
553#define RT5651_M_IN2_R_RM_R_SFT 6
554#define RT5651_M_IN1_R_RM_R (0x1 << 5)
555#define RT5651_M_IN1_R_RM_R_SFT 5
556#define RT5651_M_BST3_RM_R (0x1 << 3)
557#define RT5651_M_BST3_RM_R_SFT 3
558#define RT5651_M_BST2_RM_R (0x1 << 2)
559#define RT5651_M_BST2_RM_R_SFT 2
560#define RT5651_M_BST1_RM_R (0x1 << 1)
561#define RT5651_M_BST1_RM_R_SFT 1
562#define RT5651_M_OM_R_RM_R (0x1)
563#define RT5651_M_OM_R_RM_R_SFT 0
564
565/* HPMIX Control (0x45) */
566#define RT5651_M_DAC1_HM (0x1 << 14)
567#define RT5651_M_DAC1_HM_SFT 14
568#define RT5651_M_HPVOL_HM (0x1 << 13)
569#define RT5651_M_HPVOL_HM_SFT 13
570#define RT5651_G_HPOMIX_MASK (0x1 << 12)
571#define RT5651_G_HPOMIX_SFT 12
572
573/* SPK Left Mixer Control (0x46) */
574#define RT5651_G_RM_L_SM_L_MASK (0x3 << 14)
575#define RT5651_G_RM_L_SM_L_SFT 14
576#define RT5651_G_IN_L_SM_L_MASK (0x3 << 12)
577#define RT5651_G_IN_L_SM_L_SFT 12
578#define RT5651_G_DAC_L1_SM_L_MASK (0x3 << 10)
579#define RT5651_G_DAC_L1_SM_L_SFT 10
580#define RT5651_G_DAC_L2_SM_L_MASK (0x3 << 8)
581#define RT5651_G_DAC_L2_SM_L_SFT 8
582#define RT5651_G_OM_L_SM_L_MASK (0x3 << 6)
583#define RT5651_G_OM_L_SM_L_SFT 6
584#define RT5651_M_RM_L_SM_L (0x1 << 5)
585#define RT5651_M_RM_L_SM_L_SFT 5
586#define RT5651_M_IN_L_SM_L (0x1 << 4)
587#define RT5651_M_IN_L_SM_L_SFT 4
588#define RT5651_M_DAC_L1_SM_L (0x1 << 3)
589#define RT5651_M_DAC_L1_SM_L_SFT 3
590#define RT5651_M_DAC_L2_SM_L (0x1 << 2)
591#define RT5651_M_DAC_L2_SM_L_SFT 2
592#define RT5651_M_OM_L_SM_L (0x1 << 1)
593#define RT5651_M_OM_L_SM_L_SFT 1
594
595/* SPK Right Mixer Control (0x47) */
596#define RT5651_G_RM_R_SM_R_MASK (0x3 << 14)
597#define RT5651_G_RM_R_SM_R_SFT 14
598#define RT5651_G_IN_R_SM_R_MASK (0x3 << 12)
599#define RT5651_G_IN_R_SM_R_SFT 12
600#define RT5651_G_DAC_R1_SM_R_MASK (0x3 << 10)
601#define RT5651_G_DAC_R1_SM_R_SFT 10
602#define RT5651_G_DAC_R2_SM_R_MASK (0x3 << 8)
603#define RT5651_G_DAC_R2_SM_R_SFT 8
604#define RT5651_G_OM_R_SM_R_MASK (0x3 << 6)
605#define RT5651_G_OM_R_SM_R_SFT 6
606#define RT5651_M_RM_R_SM_R (0x1 << 5)
607#define RT5651_M_RM_R_SM_R_SFT 5
608#define RT5651_M_IN_R_SM_R (0x1 << 4)
609#define RT5651_M_IN_R_SM_R_SFT 4
610#define RT5651_M_DAC_R1_SM_R (0x1 << 3)
611#define RT5651_M_DAC_R1_SM_R_SFT 3
612#define RT5651_M_DAC_R2_SM_R (0x1 << 2)
613#define RT5651_M_DAC_R2_SM_R_SFT 2
614#define RT5651_M_OM_R_SM_R (0x1 << 1)
615#define RT5651_M_OM_R_SM_R_SFT 1
616
617/* SPOLMIX Control (0x48) */
618#define RT5651_M_DAC_R1_SPM_L (0x1 << 15)
619#define RT5651_M_DAC_R1_SPM_L_SFT 15
620#define RT5651_M_DAC_L1_SPM_L (0x1 << 14)
621#define RT5651_M_DAC_L1_SPM_L_SFT 14
622#define RT5651_M_SV_R_SPM_L (0x1 << 13)
623#define RT5651_M_SV_R_SPM_L_SFT 13
624#define RT5651_M_SV_L_SPM_L (0x1 << 12)
625#define RT5651_M_SV_L_SPM_L_SFT 12
626#define RT5651_M_BST1_SPM_L (0x1 << 11)
627#define RT5651_M_BST1_SPM_L_SFT 11
628
629/* SPORMIX Control (0x49) */
630#define RT5651_M_DAC_R1_SPM_R (0x1 << 13)
631#define RT5651_M_DAC_R1_SPM_R_SFT 13
632#define RT5651_M_SV_R_SPM_R (0x1 << 12)
633#define RT5651_M_SV_R_SPM_R_SFT 12
634#define RT5651_M_BST1_SPM_R (0x1 << 11)
635#define RT5651_M_BST1_SPM_R_SFT 11
636
637/* SPOLMIX / SPORMIX Ratio Control (0x4a) */
638#define RT5651_SPO_CLSD_RATIO_MASK (0x7)
639#define RT5651_SPO_CLSD_RATIO_SFT 0
640
641/* Mono Output Mixer Control (0x4c) */
642#define RT5651_M_DAC_R2_MM (0x1 << 15)
643#define RT5651_M_DAC_R2_MM_SFT 15
644#define RT5651_M_DAC_L2_MM (0x1 << 14)
645#define RT5651_M_DAC_L2_MM_SFT 14
646#define RT5651_M_OV_R_MM (0x1 << 13)
647#define RT5651_M_OV_R_MM_SFT 13
648#define RT5651_M_OV_L_MM (0x1 << 12)
649#define RT5651_M_OV_L_MM_SFT 12
650#define RT5651_M_BST1_MM (0x1 << 11)
651#define RT5651_M_BST1_MM_SFT 11
652#define RT5651_G_MONOMIX_MASK (0x1 << 10)
653#define RT5651_G_MONOMIX_SFT 10
654
655/* Output Left Mixer Control 1 (0x4d) */
656#define RT5651_G_BST2_OM_L_MASK (0x7 << 10)
657#define RT5651_G_BST2_OM_L_SFT 10
658#define RT5651_G_BST1_OM_L_MASK (0x7 << 7)
659#define RT5651_G_BST1_OM_L_SFT 7
660#define RT5651_G_IN1_L_OM_L_MASK (0x7 << 4)
661#define RT5651_G_IN1_L_OM_L_SFT 4
662#define RT5651_G_RM_L_OM_L_MASK (0x7 << 1)
663#define RT5651_G_RM_L_OM_L_SFT 1
664
665/* Output Left Mixer Control 2 (0x4e) */
666#define RT5651_G_DAC_L1_OM_L_MASK (0x7 << 7)
667#define RT5651_G_DAC_L1_OM_L_SFT 7
668#define RT5651_G_IN2_L_OM_L_MASK (0x7 << 4)
669#define RT5651_G_IN2_L_OM_L_SFT 4
670
671/* Output Left Mixer Control 3 (0x4f) */
672#define RT5651_M_IN2_L_OM_L (0x1 << 9)
673#define RT5651_M_IN2_L_OM_L_SFT 9
674#define RT5651_M_BST2_OM_L (0x1 << 6)
675#define RT5651_M_BST2_OM_L_SFT 6
676#define RT5651_M_BST1_OM_L (0x1 << 5)
677#define RT5651_M_BST1_OM_L_SFT 5
678#define RT5651_M_IN1_L_OM_L (0x1 << 4)
679#define RT5651_M_IN1_L_OM_L_SFT 4
680#define RT5651_M_RM_L_OM_L (0x1 << 3)
681#define RT5651_M_RM_L_OM_L_SFT 3
682#define RT5651_M_DAC_L1_OM_L (0x1)
683#define RT5651_M_DAC_L1_OM_L_SFT 0
684
685/* Output Right Mixer Control 1 (0x50) */
686#define RT5651_G_BST2_OM_R_MASK (0x7 << 10)
687#define RT5651_G_BST2_OM_R_SFT 10
688#define RT5651_G_BST1_OM_R_MASK (0x7 << 7)
689#define RT5651_G_BST1_OM_R_SFT 7
690#define RT5651_G_IN1_R_OM_R_MASK (0x7 << 4)
691#define RT5651_G_IN1_R_OM_R_SFT 4
692#define RT5651_G_RM_R_OM_R_MASK (0x7 << 1)
693#define RT5651_G_RM_R_OM_R_SFT 1
694
695/* Output Right Mixer Control 2 (0x51) */
696#define RT5651_G_DAC_R1_OM_R_MASK (0x7 << 7)
697#define RT5651_G_DAC_R1_OM_R_SFT 7
698#define RT5651_G_IN2_R_OM_R_MASK (0x7 << 4)
699#define RT5651_G_IN2_R_OM_R_SFT 4
700
701/* Output Right Mixer Control 3 (0x52) */
702#define RT5651_M_IN2_R_OM_R (0x1 << 9)
703#define RT5651_M_IN2_R_OM_R_SFT 9
704#define RT5651_M_BST2_OM_R (0x1 << 6)
705#define RT5651_M_BST2_OM_R_SFT 6
706#define RT5651_M_BST1_OM_R (0x1 << 5)
707#define RT5651_M_BST1_OM_R_SFT 5
708#define RT5651_M_IN1_R_OM_R (0x1 << 4)
709#define RT5651_M_IN1_R_OM_R_SFT 4
710#define RT5651_M_RM_R_OM_R (0x1 << 3)
711#define RT5651_M_RM_R_OM_R_SFT 3
712#define RT5651_M_DAC_R1_OM_R (0x1)
713#define RT5651_M_DAC_R1_OM_R_SFT 0
714
715/* LOUT Mixer Control (0x53) */
716#define RT5651_M_DAC_L1_LM (0x1 << 15)
717#define RT5651_M_DAC_L1_LM_SFT 15
718#define RT5651_M_DAC_R1_LM (0x1 << 14)
719#define RT5651_M_DAC_R1_LM_SFT 14
720#define RT5651_M_OV_L_LM (0x1 << 13)
721#define RT5651_M_OV_L_LM_SFT 13
722#define RT5651_M_OV_R_LM (0x1 << 12)
723#define RT5651_M_OV_R_LM_SFT 12
724#define RT5651_G_LOUTMIX_MASK (0x1 << 11)
725#define RT5651_G_LOUTMIX_SFT 11
726
727/* Power Management for Digital 1 (0x61) */
728#define RT5651_PWR_I2S1 (0x1 << 15)
729#define RT5651_PWR_I2S1_BIT 15
730#define RT5651_PWR_I2S2 (0x1 << 14)
731#define RT5651_PWR_I2S2_BIT 14
732#define RT5651_PWR_DAC_L1 (0x1 << 12)
733#define RT5651_PWR_DAC_L1_BIT 12
734#define RT5651_PWR_DAC_R1 (0x1 << 11)
735#define RT5651_PWR_DAC_R1_BIT 11
736#define RT5651_PWR_ADC_L (0x1 << 2)
737#define RT5651_PWR_ADC_L_BIT 2
738#define RT5651_PWR_ADC_R (0x1 << 1)
739#define RT5651_PWR_ADC_R_BIT 1
740
741/* Power Management for Digital 2 (0x62) */
742#define RT5651_PWR_ADC_STO1_F (0x1 << 15)
743#define RT5651_PWR_ADC_STO1_F_BIT 15
744#define RT5651_PWR_ADC_STO2_F (0x1 << 14)
745#define RT5651_PWR_ADC_STO2_F_BIT 14
746#define RT5651_PWR_DAC_STO1_F (0x1 << 11)
747#define RT5651_PWR_DAC_STO1_F_BIT 11
748#define RT5651_PWR_DAC_STO2_F (0x1 << 10)
749#define RT5651_PWR_DAC_STO2_F_BIT 10
750#define RT5651_PWR_PDM (0x1 << 9)
751#define RT5651_PWR_PDM_BIT 9
752
753/* Power Management for Analog 1 (0x63) */
754#define RT5651_PWR_VREF1 (0x1 << 15)
755#define RT5651_PWR_VREF1_BIT 15
756#define RT5651_PWR_FV1 (0x1 << 14)
757#define RT5651_PWR_FV1_BIT 14
758#define RT5651_PWR_MB (0x1 << 13)
759#define RT5651_PWR_MB_BIT 13
760#define RT5651_PWR_LM (0x1 << 12)
761#define RT5651_PWR_LM_BIT 12
762#define RT5651_PWR_BG (0x1 << 11)
763#define RT5651_PWR_BG_BIT 11
764#define RT5651_PWR_HP_L (0x1 << 7)
765#define RT5651_PWR_HP_L_BIT 7
766#define RT5651_PWR_HP_R (0x1 << 6)
767#define RT5651_PWR_HP_R_BIT 6
768#define RT5651_PWR_HA (0x1 << 5)
769#define RT5651_PWR_HA_BIT 5
770#define RT5651_PWR_VREF2 (0x1 << 4)
771#define RT5651_PWR_VREF2_BIT 4
772#define RT5651_PWR_FV2 (0x1 << 3)
773#define RT5651_PWR_FV2_BIT 3
774#define RT5651_PWR_LDO (0x1 << 2)
775#define RT5651_PWR_LDO_BIT 2
776#define RT5651_PWR_LDO_DVO_MASK (0x3)
777#define RT5651_PWR_LDO_DVO_1_0V 0
778#define RT5651_PWR_LDO_DVO_1_1V 1
779#define RT5651_PWR_LDO_DVO_1_2V 2
780#define RT5651_PWR_LDO_DVO_1_3V 3
781
782/* Power Management for Analog 2 (0x64) */
783#define RT5651_PWR_BST1 (0x1 << 15)
784#define RT5651_PWR_BST1_BIT 15
785#define RT5651_PWR_BST2 (0x1 << 14)
786#define RT5651_PWR_BST2_BIT 14
787#define RT5651_PWR_BST3 (0x1 << 13)
788#define RT5651_PWR_BST3_BIT 13
789#define RT5651_PWR_MB1 (0x1 << 11)
790#define RT5651_PWR_MB1_BIT 11
791#define RT5651_PWR_PLL (0x1 << 9)
792#define RT5651_PWR_PLL_BIT 9
793#define RT5651_PWR_BST1_OP2 (0x1 << 5)
794#define RT5651_PWR_BST1_OP2_BIT 5
795#define RT5651_PWR_BST2_OP2 (0x1 << 4)
796#define RT5651_PWR_BST2_OP2_BIT 4
797#define RT5651_PWR_BST3_OP2 (0x1 << 3)
798#define RT5651_PWR_BST3_OP2_BIT 3
799#define RT5651_PWR_JD_M (0x1 << 2)
800#define RT5651_PWM_JD_M_BIT 2
801#define RT5651_PWR_JD2 (0x1 << 1)
802#define RT5651_PWM_JD2_BIT 1
803#define RT5651_PWR_JD3 (0x1)
804#define RT5651_PWM_JD3_BIT 0
805
806/* Power Management for Mixer (0x65) */
807#define RT5651_PWR_OM_L (0x1 << 15)
808#define RT5651_PWR_OM_L_BIT 15
809#define RT5651_PWR_OM_R (0x1 << 14)
810#define RT5651_PWR_OM_R_BIT 14
811#define RT5651_PWR_RM_L (0x1 << 11)
812#define RT5651_PWR_RM_L_BIT 11
813#define RT5651_PWR_RM_R (0x1 << 10)
814#define RT5651_PWR_RM_R_BIT 10
815
816/* Power Management for Volume (0x66) */
817#define RT5651_PWR_OV_L (0x1 << 13)
818#define RT5651_PWR_OV_L_BIT 13
819#define RT5651_PWR_OV_R (0x1 << 12)
820#define RT5651_PWR_OV_R_BIT 12
821#define RT5651_PWR_HV_L (0x1 << 11)
822#define RT5651_PWR_HV_L_BIT 11
823#define RT5651_PWR_HV_R (0x1 << 10)
824#define RT5651_PWR_HV_R_BIT 10
825#define RT5651_PWR_IN1_L (0x1 << 9)
826#define RT5651_PWR_IN1_L_BIT 9
827#define RT5651_PWR_IN1_R (0x1 << 8)
828#define RT5651_PWR_IN1_R_BIT 8
829#define RT5651_PWR_IN2_L (0x1 << 7)
830#define RT5651_PWR_IN2_L_BIT 7
831#define RT5651_PWR_IN2_R (0x1 << 6)
832#define RT5651_PWR_IN2_R_BIT 6
833
834/* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71) */
835#define RT5651_I2S_MS_MASK (0x1 << 15)
836#define RT5651_I2S_MS_SFT 15
837#define RT5651_I2S_MS_M (0x0 << 15)
838#define RT5651_I2S_MS_S (0x1 << 15)
839#define RT5651_I2S_O_CP_MASK (0x3 << 10)
840#define RT5651_I2S_O_CP_SFT 10
841#define RT5651_I2S_O_CP_OFF (0x0 << 10)
842#define RT5651_I2S_O_CP_U_LAW (0x1 << 10)
843#define RT5651_I2S_O_CP_A_LAW (0x2 << 10)
844#define RT5651_I2S_I_CP_MASK (0x3 << 8)
845#define RT5651_I2S_I_CP_SFT 8
846#define RT5651_I2S_I_CP_OFF (0x0 << 8)
847#define RT5651_I2S_I_CP_U_LAW (0x1 << 8)
848#define RT5651_I2S_I_CP_A_LAW (0x2 << 8)
849#define RT5651_I2S_BP_MASK (0x1 << 7)
850#define RT5651_I2S_BP_SFT 7
851#define RT5651_I2S_BP_NOR (0x0 << 7)
852#define RT5651_I2S_BP_INV (0x1 << 7)
853#define RT5651_I2S_DL_MASK (0x3 << 2)
854#define RT5651_I2S_DL_SFT 2
855#define RT5651_I2S_DL_16 (0x0 << 2)
856#define RT5651_I2S_DL_20 (0x1 << 2)
857#define RT5651_I2S_DL_24 (0x2 << 2)
858#define RT5651_I2S_DL_8 (0x3 << 2)
859#define RT5651_I2S_DF_MASK (0x3)
860#define RT5651_I2S_DF_SFT 0
861#define RT5651_I2S_DF_I2S (0x0)
862#define RT5651_I2S_DF_LEFT (0x1)
863#define RT5651_I2S_DF_PCM_A (0x2)
864#define RT5651_I2S_DF_PCM_B (0x3)
865
866/* ADC/DAC Clock Control 1 (0x73) */
867#define RT5651_I2S_PD1_MASK (0x7 << 12)
868#define RT5651_I2S_PD1_SFT 12
869#define RT5651_I2S_PD1_1 (0x0 << 12)
870#define RT5651_I2S_PD1_2 (0x1 << 12)
871#define RT5651_I2S_PD1_3 (0x2 << 12)
872#define RT5651_I2S_PD1_4 (0x3 << 12)
873#define RT5651_I2S_PD1_6 (0x4 << 12)
874#define RT5651_I2S_PD1_8 (0x5 << 12)
875#define RT5651_I2S_PD1_12 (0x6 << 12)
876#define RT5651_I2S_PD1_16 (0x7 << 12)
877#define RT5651_I2S_BCLK_MS2_MASK (0x1 << 11)
878#define RT5651_I2S_BCLK_MS2_SFT 11
879#define RT5651_I2S_BCLK_MS2_32 (0x0 << 11)
880#define RT5651_I2S_BCLK_MS2_64 (0x1 << 11)
881#define RT5651_I2S_PD2_MASK (0x7 << 8)
882#define RT5651_I2S_PD2_SFT 8
883#define RT5651_I2S_PD2_1 (0x0 << 8)
884#define RT5651_I2S_PD2_2 (0x1 << 8)
885#define RT5651_I2S_PD2_3 (0x2 << 8)
886#define RT5651_I2S_PD2_4 (0x3 << 8)
887#define RT5651_I2S_PD2_6 (0x4 << 8)
888#define RT5651_I2S_PD2_8 (0x5 << 8)
889#define RT5651_I2S_PD2_12 (0x6 << 8)
890#define RT5651_I2S_PD2_16 (0x7 << 8)
891#define RT5651_DAC_OSR_MASK (0x3 << 2)
892#define RT5651_DAC_OSR_SFT 2
893#define RT5651_DAC_OSR_128 (0x0 << 2)
894#define RT5651_DAC_OSR_64 (0x1 << 2)
895#define RT5651_DAC_OSR_32 (0x2 << 2)
896#define RT5651_DAC_OSR_128_3 (0x3 << 2)
897#define RT5651_ADC_OSR_MASK (0x3)
898#define RT5651_ADC_OSR_SFT 0
899#define RT5651_ADC_OSR_128 (0x0)
900#define RT5651_ADC_OSR_64 (0x1)
901#define RT5651_ADC_OSR_32 (0x2)
902#define RT5651_ADC_OSR_128_3 (0x3)
903
904/* ADC/DAC Clock Control 2 (0x74) */
905#define RT5651_DAHPF_EN (0x1 << 11)
906#define RT5651_DAHPF_EN_SFT 11
907#define RT5651_ADHPF_EN (0x1 << 10)
908#define RT5651_ADHPF_EN_SFT 10
909
910/* Digital Microphone Control (0x75) */
911#define RT5651_DMIC_1_EN_MASK (0x1 << 15)
912#define RT5651_DMIC_1_EN_SFT 15
913#define RT5651_DMIC_1_DIS (0x0 << 15)
914#define RT5651_DMIC_1_EN (0x1 << 15)
915#define RT5651_DMIC_1L_LH_MASK (0x1 << 13)
916#define RT5651_DMIC_1L_LH_SFT 13
917#define RT5651_DMIC_1L_LH_FALLING (0x0 << 13)
918#define RT5651_DMIC_1L_LH_RISING (0x1 << 13)
919#define RT5651_DMIC_1R_LH_MASK (0x1 << 12)
920#define RT5651_DMIC_1R_LH_SFT 12
921#define RT5651_DMIC_1R_LH_FALLING (0x0 << 12)
922#define RT5651_DMIC_1R_LH_RISING (0x1 << 12)
923#define RT5651_DMIC_1_DP_MASK (0x3 << 10)
924#define RT5651_DMIC_1_DP_SFT 10
925#define RT5651_DMIC_1_DP_GPIO6 (0x0 << 10)
926#define RT5651_DMIC_1_DP_IN1P (0x1 << 10)
927#define RT5651_DMIC_2_DP_GPIO8 (0x2 << 10)
928#define RT5651_DMIC_CLK_MASK (0x7 << 5)
929#define RT5651_DMIC_CLK_SFT 5
930
931/* TDM Control 1 (0x77) */
932#define RT5651_TDM_INTEL_SEL_MASK (0x1 << 15)
933#define RT5651_TDM_INTEL_SEL_SFT 15
934#define RT5651_TDM_INTEL_SEL_64 (0x0 << 15)
935#define RT5651_TDM_INTEL_SEL_50 (0x1 << 15)
936#define RT5651_TDM_MODE_SEL_MASK (0x1 << 14)
937#define RT5651_TDM_MODE_SEL_SFT 14
938#define RT5651_TDM_MODE_SEL_NOR (0x0 << 14)
939#define RT5651_TDM_MODE_SEL_TDM (0x1 << 14)
940#define RT5651_TDM_CH_NUM_SEL_MASK (0x3 << 12)
941#define RT5651_TDM_CH_NUM_SEL_SFT 12
942#define RT5651_TDM_CH_NUM_SEL_2 (0x0 << 12)
943#define RT5651_TDM_CH_NUM_SEL_4 (0x1 << 12)
944#define RT5651_TDM_CH_NUM_SEL_6 (0x2 << 12)
945#define RT5651_TDM_CH_NUM_SEL_8 (0x3 << 12)
946#define RT5651_TDM_CH_LEN_SEL_MASK (0x3 << 10)
947#define RT5651_TDM_CH_LEN_SEL_SFT 10
948#define RT5651_TDM_CH_LEN_SEL_16 (0x0 << 10)
949#define RT5651_TDM_CH_LEN_SEL_20 (0x1 << 10)
950#define RT5651_TDM_CH_LEN_SEL_24 (0x2 << 10)
951#define RT5651_TDM_CH_LEN_SEL_32 (0x3 << 10)
952#define RT5651_TDM_ADC_SEL_MASK (0x1 << 9)
953#define RT5651_TDM_ADC_SEL_SFT 9
954#define RT5651_TDM_ADC_SEL_NOR (0x0 << 9)
955#define RT5651_TDM_ADC_SEL_SWAP (0x1 << 9)
956#define RT5651_TDM_ADC_START_SEL_MASK (0x1 << 8)
957#define RT5651_TDM_ADC_START_SEL_SFT 8
958#define RT5651_TDM_ADC_START_SEL_SL0 (0x0 << 8)
959#define RT5651_TDM_ADC_START_SEL_SL4 (0x1 << 8)
960#define RT5651_TDM_I2S_CH2_SEL_MASK (0x3 << 6)
961#define RT5651_TDM_I2S_CH2_SEL_SFT 6
962#define RT5651_TDM_I2S_CH2_SEL_LR (0x0 << 6)
963#define RT5651_TDM_I2S_CH2_SEL_RL (0x1 << 6)
964#define RT5651_TDM_I2S_CH2_SEL_LL (0x2 << 6)
965#define RT5651_TDM_I2S_CH2_SEL_RR (0x3 << 6)
966#define RT5651_TDM_I2S_CH4_SEL_MASK (0x3 << 4)
967#define RT5651_TDM_I2S_CH4_SEL_SFT 4
968#define RT5651_TDM_I2S_CH4_SEL_LR (0x0 << 4)
969#define RT5651_TDM_I2S_CH4_SEL_RL (0x1 << 4)
970#define RT5651_TDM_I2S_CH4_SEL_LL (0x2 << 4)
971#define RT5651_TDM_I2S_CH4_SEL_RR (0x3 << 4)
972#define RT5651_TDM_I2S_CH6_SEL_MASK (0x3 << 2)
973#define RT5651_TDM_I2S_CH6_SEL_SFT 2
974#define RT5651_TDM_I2S_CH6_SEL_LR (0x0 << 2)
975#define RT5651_TDM_I2S_CH6_SEL_RL (0x1 << 2)
976#define RT5651_TDM_I2S_CH6_SEL_LL (0x2 << 2)
977#define RT5651_TDM_I2S_CH6_SEL_RR (0x3 << 2)
978#define RT5651_TDM_I2S_CH8_SEL_MASK (0x3)
979#define RT5651_TDM_I2S_CH8_SEL_SFT 0
980#define RT5651_TDM_I2S_CH8_SEL_LR (0x0)
981#define RT5651_TDM_I2S_CH8_SEL_RL (0x1)
982#define RT5651_TDM_I2S_CH8_SEL_LL (0x2)
983#define RT5651_TDM_I2S_CH8_SEL_RR (0x3)
984
985/* TDM Control 2 (0x78) */
986#define RT5651_TDM_LRCK_POL_SEL_MASK (0x1 << 15)
987#define RT5651_TDM_LRCK_POL_SEL_SFT 15
988#define RT5651_TDM_LRCK_POL_SEL_NOR (0x0 << 15)
989#define RT5651_TDM_LRCK_POL_SEL_INV (0x1 << 15)
990#define RT5651_TDM_CH_VAL_SEL_MASK (0x1 << 14)
991#define RT5651_TDM_CH_VAL_SEL_SFT 14
992#define RT5651_TDM_CH_VAL_SEL_CH01 (0x0 << 14)
993#define RT5651_TDM_CH_VAL_SEL_CH0123 (0x1 << 14)
994#define RT5651_TDM_CH_VAL_EN (0x1 << 13)
995#define RT5651_TDM_CH_VAL_SFT 13
996#define RT5651_TDM_LPBK_EN (0x1 << 12)
997#define RT5651_TDM_LPBK_SFT 12
998#define RT5651_TDM_LRCK_PULSE_SEL_MASK (0x1 << 11)
999#define RT5651_TDM_LRCK_PULSE_SEL_SFT 11
1000#define RT5651_TDM_LRCK_PULSE_SEL_BCLK (0x0 << 11)
1001#define RT5651_TDM_LRCK_PULSE_SEL_CH (0x1 << 11)
1002#define RT5651_TDM_END_EDGE_SEL_MASK (0x1 << 10)
1003#define RT5651_TDM_END_EDGE_SEL_SFT 10
1004#define RT5651_TDM_END_EDGE_SEL_POS (0x0 << 10)
1005#define RT5651_TDM_END_EDGE_SEL_NEG (0x1 << 10)
1006#define RT5651_TDM_END_EDGE_EN (0x1 << 9)
1007#define RT5651_TDM_END_EDGE_EN_SFT 9
1008#define RT5651_TDM_TRAN_EDGE_SEL_MASK (0x1 << 8)
1009#define RT5651_TDM_TRAN_EDGE_SEL_SFT 8
1010#define RT5651_TDM_TRAN_EDGE_SEL_POS (0x0 << 8)
1011#define RT5651_TDM_TRAN_EDGE_SEL_NEG (0x1 << 8)
1012#define RT5651_M_TDM2_L (0x1 << 7)
1013#define RT5651_M_TDM2_L_SFT 7
1014#define RT5651_M_TDM2_R (0x1 << 6)
1015#define RT5651_M_TDM2_R_SFT 6
1016#define RT5651_M_TDM4_L (0x1 << 5)
1017#define RT5651_M_TDM4_L_SFT 5
1018#define RT5651_M_TDM4_R (0x1 << 4)
1019#define RT5651_M_TDM4_R_SFT 4
1020
1021/* TDM Control 3 (0x79) */
1022#define RT5651_CH2_L_SEL_MASK (0x7 << 12)
1023#define RT5651_CH2_L_SEL_SFT 12
1024#define RT5651_CH2_L_SEL_SL0 (0x0 << 12)
1025#define RT5651_CH2_L_SEL_SL1 (0x1 << 12)
1026#define RT5651_CH2_L_SEL_SL2 (0x2 << 12)
1027#define RT5651_CH2_L_SEL_SL3 (0x3 << 12)
1028#define RT5651_CH2_L_SEL_SL4 (0x4 << 12)
1029#define RT5651_CH2_L_SEL_SL5 (0x5 << 12)
1030#define RT5651_CH2_L_SEL_SL6 (0x6 << 12)
1031#define RT5651_CH2_L_SEL_SL7 (0x7 << 12)
1032#define RT5651_CH2_R_SEL_MASK (0x7 << 8)
1033#define RT5651_CH2_R_SEL_SFT 8
1034#define RT5651_CH2_R_SEL_SL0 (0x0 << 8)
1035#define RT5651_CH2_R_SEL_SL1 (0x1 << 8)
1036#define RT5651_CH2_R_SEL_SL2 (0x2 << 8)
1037#define RT5651_CH2_R_SEL_SL3 (0x3 << 8)
1038#define RT5651_CH2_R_SEL_SL4 (0x4 << 8)
1039#define RT5651_CH2_R_SEL_SL5 (0x5 << 8)
1040#define RT5651_CH2_R_SEL_SL6 (0x6 << 8)
1041#define RT5651_CH2_R_SEL_SL7 (0x7 << 8)
1042#define RT5651_CH4_L_SEL_MASK (0x7 << 4)
1043#define RT5651_CH4_L_SEL_SFT 4
1044#define RT5651_CH4_L_SEL_SL0 (0x0 << 4)
1045#define RT5651_CH4_L_SEL_SL1 (0x1 << 4)
1046#define RT5651_CH4_L_SEL_SL2 (0x2 << 4)
1047#define RT5651_CH4_L_SEL_SL3 (0x3 << 4)
1048#define RT5651_CH4_L_SEL_SL4 (0x4 << 4)
1049#define RT5651_CH4_L_SEL_SL5 (0x5 << 4)
1050#define RT5651_CH4_L_SEL_SL6 (0x6 << 4)
1051#define RT5651_CH4_L_SEL_SL7 (0x7 << 4)
1052#define RT5651_CH4_R_SEL_MASK (0x7)
1053#define RT5651_CH4_R_SEL_SFT 0
1054#define RT5651_CH4_R_SEL_SL0 (0x0)
1055#define RT5651_CH4_R_SEL_SL1 (0x1)
1056#define RT5651_CH4_R_SEL_SL2 (0x2)
1057#define RT5651_CH4_R_SEL_SL3 (0x3)
1058#define RT5651_CH4_R_SEL_SL4 (0x4)
1059#define RT5651_CH4_R_SEL_SL5 (0x5)
1060#define RT5651_CH4_R_SEL_SL6 (0x6)
1061#define RT5651_CH4_R_SEL_SL7 (0x7)
1062
1063/* Global Clock Control (0x80) */
1064#define RT5651_SCLK_SRC_MASK (0x3 << 14)
1065#define RT5651_SCLK_SRC_SFT 14
1066#define RT5651_SCLK_SRC_MCLK (0x0 << 14)
1067#define RT5651_SCLK_SRC_PLL1 (0x1 << 14)
1068#define RT5651_SCLK_SRC_RCCLK (0x2 << 14)
1069#define RT5651_PLL1_SRC_MASK (0x3 << 12)
1070#define RT5651_PLL1_SRC_SFT 12
1071#define RT5651_PLL1_SRC_MCLK (0x0 << 12)
1072#define RT5651_PLL1_SRC_BCLK1 (0x1 << 12)
1073#define RT5651_PLL1_SRC_BCLK2 (0x2 << 12)
1074#define RT5651_PLL1_PD_MASK (0x1 << 3)
1075#define RT5651_PLL1_PD_SFT 3
1076#define RT5651_PLL1_PD_1 (0x0 << 3)
1077#define RT5651_PLL1_PD_2 (0x1 << 3)
1078
1079#define RT5651_PLL_INP_MAX 40000000
1080#define RT5651_PLL_INP_MIN 256000
1081/* PLL M/N/K Code Control 1 (0x81) */
1082#define RT5651_PLL_N_MAX 0x1ff
1083#define RT5651_PLL_N_MASK (RT5651_PLL_N_MAX << 7)
1084#define RT5651_PLL_N_SFT 7
1085#define RT5651_PLL_K_MAX 0x1f
1086#define RT5651_PLL_K_MASK (RT5651_PLL_K_MAX)
1087#define RT5651_PLL_K_SFT 0
1088
1089/* PLL M/N/K Code Control 2 (0x82) */
1090#define RT5651_PLL_M_MAX 0xf
1091#define RT5651_PLL_M_MASK (RT5651_PLL_M_MAX << 12)
1092#define RT5651_PLL_M_SFT 12
1093#define RT5651_PLL_M_BP (0x1 << 11)
1094#define RT5651_PLL_M_BP_SFT 11
1095
1096/* PLL tracking mode 1 (0x83) */
1097#define RT5651_STO1_T_MASK (0x1 << 15)
1098#define RT5651_STO1_T_SFT 15
1099#define RT5651_STO1_T_SCLK (0x0 << 15)
1100#define RT5651_STO1_T_LRCK1 (0x1 << 15)
1101#define RT5651_STO2_T_MASK (0x1 << 12)
1102#define RT5651_STO2_T_SFT 12
1103#define RT5651_STO2_T_I2S2 (0x0 << 12)
1104#define RT5651_STO2_T_LRCK2 (0x1 << 12)
1105#define RT5651_ASRC2_REF_MASK (0x1 << 11)
1106#define RT5651_ASRC2_REF_SFT 11
1107#define RT5651_ASRC2_REF_LRCK2 (0x0 << 11)
1108#define RT5651_ASRC2_REF_LRCK1 (0x1 << 11)
1109#define RT5651_DMIC_1_M_MASK (0x1 << 9)
1110#define RT5651_DMIC_1_M_SFT 9
1111#define RT5651_DMIC_1_M_NOR (0x0 << 9)
1112#define RT5651_DMIC_1_M_ASYN (0x1 << 9)
1113
1114/* PLL tracking mode 2 (0x84) */
1115#define RT5651_STO1_ASRC_EN (0x1 << 15)
1116#define RT5651_STO1_ASRC_EN_SFT 15
1117#define RT5651_STO2_ASRC_EN (0x1 << 14)
1118#define RT5651_STO2_ASRC_EN_SFT 14
1119#define RT5651_STO1_DAC_M_MASK (0x1 << 13)
1120#define RT5651_STO1_DAC_M_SFT 13
1121#define RT5651_STO1_DAC_M_NOR (0x0 << 13)
1122#define RT5651_STO1_DAC_M_ASRC (0x1 << 13)
1123#define RT5651_STO2_DAC_M_MASK (0x1 << 12)
1124#define RT5651_STO2_DAC_M_SFT 12
1125#define RT5651_STO2_DAC_M_NOR (0x0 << 12)
1126#define RT5651_STO2_DAC_M_ASRC (0x1 << 12)
1127#define RT5651_ADC_M_MASK (0x1 << 11)
1128#define RT5651_ADC_M_SFT 11
1129#define RT5651_ADC_M_NOR (0x0 << 11)
1130#define RT5651_ADC_M_ASRC (0x1 << 11)
1131#define RT5651_I2S1_R_D_MASK (0x1 << 4)
1132#define RT5651_I2S1_R_D_SFT 4
1133#define RT5651_I2S1_R_D_DIS (0x0 << 4)
1134#define RT5651_I2S1_R_D_EN (0x1 << 4)
1135#define RT5651_I2S2_R_D_MASK (0x1 << 3)
1136#define RT5651_I2S2_R_D_SFT 3
1137#define RT5651_I2S2_R_D_DIS (0x0 << 3)
1138#define RT5651_I2S2_R_D_EN (0x1 << 3)
1139#define RT5651_PRE_SCLK_MASK (0x3)
1140#define RT5651_PRE_SCLK_SFT 0
1141#define RT5651_PRE_SCLK_512 (0x0)
1142#define RT5651_PRE_SCLK_1024 (0x1)
1143#define RT5651_PRE_SCLK_2048 (0x2)
1144
1145/* PLL tracking mode 3 (0x85) */
1146#define RT5651_I2S1_RATE_MASK (0xf << 12)
1147#define RT5651_I2S1_RATE_SFT 12
1148#define RT5651_I2S2_RATE_MASK (0xf << 8)
1149#define RT5651_I2S2_RATE_SFT 8
1150#define RT5651_G_ASRC_LP_MASK (0x1 << 3)
1151#define RT5651_G_ASRC_LP_SFT 3
1152#define RT5651_ASRC_LP_F_M (0x1 << 2)
1153#define RT5651_ASRC_LP_F_SFT 2
1154#define RT5651_ASRC_LP_F_NOR (0x0 << 2)
1155#define RT5651_ASRC_LP_F_SB (0x1 << 2)
1156#define RT5651_FTK_PH_DET_MASK (0x3)
1157#define RT5651_FTK_PH_DET_SFT 0
1158#define RT5651_FTK_PH_DET_DIV1 (0x0)
1159#define RT5651_FTK_PH_DET_DIV2 (0x1)
1160#define RT5651_FTK_PH_DET_DIV4 (0x2)
1161#define RT5651_FTK_PH_DET_DIV8 (0x3)
1162
1163/*PLL tracking mode 6 (0x89) */
1164#define RT5651_I2S1_PD_MASK (0x7 << 12)
1165#define RT5651_I2S1_PD_SFT 12
1166#define RT5651_I2S2_PD_MASK (0x7 << 8)
1167#define RT5651_I2S2_PD_SFT 8
1168
1169/*PLL tracking mode 7 (0x8a) */
1170#define RT5651_FSI1_RATE_MASK (0xf << 12)
1171#define RT5651_FSI1_RATE_SFT 12
1172#define RT5651_FSI2_RATE_MASK (0xf << 8)
1173#define RT5651_FSI2_RATE_SFT 8
1174
1175/* HPOUT Over Current Detection (0x8b) */
1176#define RT5651_HP_OVCD_MASK (0x1 << 10)
1177#define RT5651_HP_OVCD_SFT 10
1178#define RT5651_HP_OVCD_DIS (0x0 << 10)
1179#define RT5651_HP_OVCD_EN (0x1 << 10)
1180#define RT5651_HP_OC_TH_MASK (0x3 << 8)
1181#define RT5651_HP_OC_TH_SFT 8
1182#define RT5651_HP_OC_TH_90 (0x0 << 8)
1183#define RT5651_HP_OC_TH_105 (0x1 << 8)
1184#define RT5651_HP_OC_TH_120 (0x2 << 8)
1185#define RT5651_HP_OC_TH_135 (0x3 << 8)
1186
1187/* Depop Mode Control 1 (0x8e) */
1188#define RT5651_SMT_TRIG_MASK (0x1 << 15)
1189#define RT5651_SMT_TRIG_SFT 15
1190#define RT5651_SMT_TRIG_DIS (0x0 << 15)
1191#define RT5651_SMT_TRIG_EN (0x1 << 15)
1192#define RT5651_HP_L_SMT_MASK (0x1 << 9)
1193#define RT5651_HP_L_SMT_SFT 9
1194#define RT5651_HP_L_SMT_DIS (0x0 << 9)
1195#define RT5651_HP_L_SMT_EN (0x1 << 9)
1196#define RT5651_HP_R_SMT_MASK (0x1 << 8)
1197#define RT5651_HP_R_SMT_SFT 8
1198#define RT5651_HP_R_SMT_DIS (0x0 << 8)
1199#define RT5651_HP_R_SMT_EN (0x1 << 8)
1200#define RT5651_HP_CD_PD_MASK (0x1 << 7)
1201#define RT5651_HP_CD_PD_SFT 7
1202#define RT5651_HP_CD_PD_DIS (0x0 << 7)
1203#define RT5651_HP_CD_PD_EN (0x1 << 7)
1204#define RT5651_RSTN_MASK (0x1 << 6)
1205#define RT5651_RSTN_SFT 6
1206#define RT5651_RSTN_DIS (0x0 << 6)
1207#define RT5651_RSTN_EN (0x1 << 6)
1208#define RT5651_RSTP_MASK (0x1 << 5)
1209#define RT5651_RSTP_SFT 5
1210#define RT5651_RSTP_DIS (0x0 << 5)
1211#define RT5651_RSTP_EN (0x1 << 5)
1212#define RT5651_HP_CO_MASK (0x1 << 4)
1213#define RT5651_HP_CO_SFT 4
1214#define RT5651_HP_CO_DIS (0x0 << 4)
1215#define RT5651_HP_CO_EN (0x1 << 4)
1216#define RT5651_HP_CP_MASK (0x1 << 3)
1217#define RT5651_HP_CP_SFT 3
1218#define RT5651_HP_CP_PD (0x0 << 3)
1219#define RT5651_HP_CP_PU (0x1 << 3)
1220#define RT5651_HP_SG_MASK (0x1 << 2)
1221#define RT5651_HP_SG_SFT 2
1222#define RT5651_HP_SG_DIS (0x0 << 2)
1223#define RT5651_HP_SG_EN (0x1 << 2)
1224#define RT5651_HP_DP_MASK (0x1 << 1)
1225#define RT5651_HP_DP_SFT 1
1226#define RT5651_HP_DP_PD (0x0 << 1)
1227#define RT5651_HP_DP_PU (0x1 << 1)
1228#define RT5651_HP_CB_MASK (0x1)
1229#define RT5651_HP_CB_SFT 0
1230#define RT5651_HP_CB_PD (0x0)
1231#define RT5651_HP_CB_PU (0x1)
1232
1233/* Depop Mode Control 2 (0x8f) */
1234#define RT5651_DEPOP_MASK (0x1 << 13)
1235#define RT5651_DEPOP_SFT 13
1236#define RT5651_DEPOP_AUTO (0x0 << 13)
1237#define RT5651_DEPOP_MAN (0x1 << 13)
1238#define RT5651_RAMP_MASK (0x1 << 12)
1239#define RT5651_RAMP_SFT 12
1240#define RT5651_RAMP_DIS (0x0 << 12)
1241#define RT5651_RAMP_EN (0x1 << 12)
1242#define RT5651_BPS_MASK (0x1 << 11)
1243#define RT5651_BPS_SFT 11
1244#define RT5651_BPS_DIS (0x0 << 11)
1245#define RT5651_BPS_EN (0x1 << 11)
1246#define RT5651_FAST_UPDN_MASK (0x1 << 10)
1247#define RT5651_FAST_UPDN_SFT 10
1248#define RT5651_FAST_UPDN_DIS (0x0 << 10)
1249#define RT5651_FAST_UPDN_EN (0x1 << 10)
1250#define RT5651_MRES_MASK (0x3 << 8)
1251#define RT5651_MRES_SFT 8
1252#define RT5651_MRES_15MO (0x0 << 8)
1253#define RT5651_MRES_25MO (0x1 << 8)
1254#define RT5651_MRES_35MO (0x2 << 8)
1255#define RT5651_MRES_45MO (0x3 << 8)
1256#define RT5651_VLO_MASK (0x1 << 7)
1257#define RT5651_VLO_SFT 7
1258#define RT5651_VLO_3V (0x0 << 7)
1259#define RT5651_VLO_32V (0x1 << 7)
1260#define RT5651_DIG_DP_MASK (0x1 << 6)
1261#define RT5651_DIG_DP_SFT 6
1262#define RT5651_DIG_DP_DIS (0x0 << 6)
1263#define RT5651_DIG_DP_EN (0x1 << 6)
1264#define RT5651_DP_TH_MASK (0x3 << 4)
1265#define RT5651_DP_TH_SFT 4
1266
1267/* Depop Mode Control 3 (0x90) */
1268#define RT5651_CP_SYS_MASK (0x7 << 12)
1269#define RT5651_CP_SYS_SFT 12
1270#define RT5651_CP_FQ1_MASK (0x7 << 8)
1271#define RT5651_CP_FQ1_SFT 8
1272#define RT5651_CP_FQ2_MASK (0x7 << 4)
1273#define RT5651_CP_FQ2_SFT 4
1274#define RT5651_CP_FQ3_MASK (0x7)
1275#define RT5651_CP_FQ3_SFT 0
1276#define RT5651_CP_FQ_1_5_KHZ 0
1277#define RT5651_CP_FQ_3_KHZ 1
1278#define RT5651_CP_FQ_6_KHZ 2
1279#define RT5651_CP_FQ_12_KHZ 3
1280#define RT5651_CP_FQ_24_KHZ 4
1281#define RT5651_CP_FQ_48_KHZ 5
1282#define RT5651_CP_FQ_96_KHZ 6
1283#define RT5651_CP_FQ_192_KHZ 7
1284
1285/* HPOUT charge pump (0x91) */
1286#define RT5651_OSW_L_MASK (0x1 << 11)
1287#define RT5651_OSW_L_SFT 11
1288#define RT5651_OSW_L_DIS (0x0 << 11)
1289#define RT5651_OSW_L_EN (0x1 << 11)
1290#define RT5651_OSW_R_MASK (0x1 << 10)
1291#define RT5651_OSW_R_SFT 10
1292#define RT5651_OSW_R_DIS (0x0 << 10)
1293#define RT5651_OSW_R_EN (0x1 << 10)
1294#define RT5651_PM_HP_MASK (0x3 << 8)
1295#define RT5651_PM_HP_SFT 8
1296#define RT5651_PM_HP_LV (0x0 << 8)
1297#define RT5651_PM_HP_MV (0x1 << 8)
1298#define RT5651_PM_HP_HV (0x2 << 8)
1299#define RT5651_IB_HP_MASK (0x3 << 6)
1300#define RT5651_IB_HP_SFT 6
1301#define RT5651_IB_HP_125IL (0x0 << 6)
1302#define RT5651_IB_HP_25IL (0x1 << 6)
1303#define RT5651_IB_HP_5IL (0x2 << 6)
1304#define RT5651_IB_HP_1IL (0x3 << 6)
1305
1306/* Micbias Control (0x93) */
1307#define RT5651_MIC1_BS_MASK (0x1 << 15)
1308#define RT5651_MIC1_BS_SFT 15
1309#define RT5651_MIC1_BS_9AV (0x0 << 15)
1310#define RT5651_MIC1_BS_75AV (0x1 << 15)
1311#define RT5651_MIC1_CLK_MASK (0x1 << 13)
1312#define RT5651_MIC1_CLK_SFT 13
1313#define RT5651_MIC1_CLK_DIS (0x0 << 13)
1314#define RT5651_MIC1_CLK_EN (0x1 << 13)
1315#define RT5651_MIC1_OVCD_MASK (0x1 << 11)
1316#define RT5651_MIC1_OVCD_SFT 11
1317#define RT5651_MIC1_OVCD_DIS (0x0 << 11)
1318#define RT5651_MIC1_OVCD_EN (0x1 << 11)
1319#define RT5651_MIC1_OVTH_MASK (0x3 << 9)
1320#define RT5651_MIC1_OVTH_SFT 9
1321#define RT5651_MIC1_OVTH_600UA (0x0 << 9)
1322#define RT5651_MIC1_OVTH_1500UA (0x1 << 9)
1323#define RT5651_MIC1_OVTH_2000UA (0x2 << 9)
1324#define RT5651_PWR_MB_MASK (0x1 << 5)
1325#define RT5651_PWR_MB_SFT 5
1326#define RT5651_PWR_MB_PD (0x0 << 5)
1327#define RT5651_PWR_MB_PU (0x1 << 5)
1328#define RT5651_PWR_CLK12M_MASK (0x1 << 4)
1329#define RT5651_PWR_CLK12M_SFT 4
1330#define RT5651_PWR_CLK12M_PD (0x0 << 4)
1331#define RT5651_PWR_CLK12M_PU (0x1 << 4)
1332
1333/* Analog JD Control 1 (0x94) */
1334#define RT5651_JD2_CMP_MASK (0x7 << 12)
1335#define RT5651_JD2_CMP_SFT 12
1336#define RT5651_JD_PU (0x1 << 11)
1337#define RT5651_JD_PU_SFT 11
1338#define RT5651_JD_PD (0x1 << 10)
1339#define RT5651_JD_PD_SFT 10
1340#define RT5651_JD_MODE_SEL_MASK (0x3 << 8)
1341#define RT5651_JD_MODE_SEL_SFT 8
1342#define RT5651_JD_MODE_SEL_M0 (0x0 << 8)
1343#define RT5651_JD_MODE_SEL_M1 (0x1 << 8)
1344#define RT5651_JD_MODE_SEL_M2 (0x2 << 8)
1345#define RT5651_JD_M_CMP (0x7 << 4)
1346#define RT5651_JD_M_CMP_SFT 4
1347#define RT5651_JD_M_PU (0x1 << 3)
1348#define RT5651_JD_M_PU_SFT 3
1349#define RT5651_JD_M_PD (0x1 << 2)
1350#define RT5651_JD_M_PD_SFT 2
1351#define RT5651_JD_M_MODE_SEL_MASK (0x3)
1352#define RT5651_JD_M_MODE_SEL_SFT 0
1353#define RT5651_JD_M_MODE_SEL_M0 (0x0)
1354#define RT5651_JD_M_MODE_SEL_M1 (0x1)
1355#define RT5651_JD_M_MODE_SEL_M2 (0x2)
1356
1357/* Analog JD Control 2 (0x95) */
1358#define RT5651_JD3_CMP_MASK (0x7 << 12)
1359#define RT5651_JD3_CMP_SFT 12
1360
1361/* EQ Control 1 (0xb0) */
1362#define RT5651_EQ_SRC_MASK (0x1 << 15)
1363#define RT5651_EQ_SRC_SFT 15
1364#define RT5651_EQ_SRC_DAC (0x0 << 15)
1365#define RT5651_EQ_SRC_ADC (0x1 << 15)
1366#define RT5651_EQ_UPD (0x1 << 14)
1367#define RT5651_EQ_UPD_BIT 14
1368#define RT5651_EQ_CD_MASK (0x1 << 13)
1369#define RT5651_EQ_CD_SFT 13
1370#define RT5651_EQ_CD_DIS (0x0 << 13)
1371#define RT5651_EQ_CD_EN (0x1 << 13)
1372#define RT5651_EQ_DITH_MASK (0x3 << 8)
1373#define RT5651_EQ_DITH_SFT 8
1374#define RT5651_EQ_DITH_NOR (0x0 << 8)
1375#define RT5651_EQ_DITH_LSB (0x1 << 8)
1376#define RT5651_EQ_DITH_LSB_1 (0x2 << 8)
1377#define RT5651_EQ_DITH_LSB_2 (0x3 << 8)
1378#define RT5651_EQ_CD_F (0x1 << 7)
1379#define RT5651_EQ_CD_F_BIT 7
1380#define RT5651_EQ_STA_HP2 (0x1 << 6)
1381#define RT5651_EQ_STA_HP2_BIT 6
1382#define RT5651_EQ_STA_HP1 (0x1 << 5)
1383#define RT5651_EQ_STA_HP1_BIT 5
1384#define RT5651_EQ_STA_BP4 (0x1 << 4)
1385#define RT5651_EQ_STA_BP4_BIT 4
1386#define RT5651_EQ_STA_BP3 (0x1 << 3)
1387#define RT5651_EQ_STA_BP3_BIT 3
1388#define RT5651_EQ_STA_BP2 (0x1 << 2)
1389#define RT5651_EQ_STA_BP2_BIT 2
1390#define RT5651_EQ_STA_BP1 (0x1 << 1)
1391#define RT5651_EQ_STA_BP1_BIT 1
1392#define RT5651_EQ_STA_LP (0x1)
1393#define RT5651_EQ_STA_LP_BIT 0
1394
1395/* EQ Control 2 (0xb1) */
1396#define RT5651_EQ_HPF1_M_MASK (0x1 << 8)
1397#define RT5651_EQ_HPF1_M_SFT 8
1398#define RT5651_EQ_HPF1_M_HI (0x0 << 8)
1399#define RT5651_EQ_HPF1_M_1ST (0x1 << 8)
1400#define RT5651_EQ_LPF1_M_MASK (0x1 << 7)
1401#define RT5651_EQ_LPF1_M_SFT 7
1402#define RT5651_EQ_LPF1_M_LO (0x0 << 7)
1403#define RT5651_EQ_LPF1_M_1ST (0x1 << 7)
1404#define RT5651_EQ_HPF2_MASK (0x1 << 6)
1405#define RT5651_EQ_HPF2_SFT 6
1406#define RT5651_EQ_HPF2_DIS (0x0 << 6)
1407#define RT5651_EQ_HPF2_EN (0x1 << 6)
1408#define RT5651_EQ_HPF1_MASK (0x1 << 5)
1409#define RT5651_EQ_HPF1_SFT 5
1410#define RT5651_EQ_HPF1_DIS (0x0 << 5)
1411#define RT5651_EQ_HPF1_EN (0x1 << 5)
1412#define RT5651_EQ_BPF4_MASK (0x1 << 4)
1413#define RT5651_EQ_BPF4_SFT 4
1414#define RT5651_EQ_BPF4_DIS (0x0 << 4)
1415#define RT5651_EQ_BPF4_EN (0x1 << 4)
1416#define RT5651_EQ_BPF3_MASK (0x1 << 3)
1417#define RT5651_EQ_BPF3_SFT 3
1418#define RT5651_EQ_BPF3_DIS (0x0 << 3)
1419#define RT5651_EQ_BPF3_EN (0x1 << 3)
1420#define RT5651_EQ_BPF2_MASK (0x1 << 2)
1421#define RT5651_EQ_BPF2_SFT 2
1422#define RT5651_EQ_BPF2_DIS (0x0 << 2)
1423#define RT5651_EQ_BPF2_EN (0x1 << 2)
1424#define RT5651_EQ_BPF1_MASK (0x1 << 1)
1425#define RT5651_EQ_BPF1_SFT 1
1426#define RT5651_EQ_BPF1_DIS (0x0 << 1)
1427#define RT5651_EQ_BPF1_EN (0x1 << 1)
1428#define RT5651_EQ_LPF_MASK (0x1)
1429#define RT5651_EQ_LPF_SFT 0
1430#define RT5651_EQ_LPF_DIS (0x0)
1431#define RT5651_EQ_LPF_EN (0x1)
1432#define RT5651_EQ_CTRL_MASK (0x7f)
1433
1434/* Memory Test (0xb2) */
1435#define RT5651_MT_MASK (0x1 << 15)
1436#define RT5651_MT_SFT 15
1437#define RT5651_MT_DIS (0x0 << 15)
1438#define RT5651_MT_EN (0x1 << 15)
1439
1440/* ALC Control 1 (0xb4) */
1441#define RT5651_ALC_P_MASK (0x1 << 15)
1442#define RT5651_ALC_P_SFT 15
1443#define RT5651_ALC_P_DAC (0x0 << 15)
1444#define RT5651_ALC_P_ADC (0x1 << 15)
1445#define RT5651_ALC_MASK (0x1 << 14)
1446#define RT5651_ALC_SFT 14
1447#define RT5651_ALC_DIS (0x0 << 14)
1448#define RT5651_ALC_EN (0x1 << 14)
1449#define RT5651_ALC_UPD (0x1 << 13)
1450#define RT5651_ALC_UPD_BIT 13
1451#define RT5651_ALC_AR_MASK (0x1f << 8)
1452#define RT5651_ALC_AR_SFT 8
1453#define RT5651_ALC_R_MASK (0x7 << 5)
1454#define RT5651_ALC_R_SFT 5
1455#define RT5651_ALC_R_48K (0x1 << 5)
1456#define RT5651_ALC_R_96K (0x2 << 5)
1457#define RT5651_ALC_R_192K (0x3 << 5)
1458#define RT5651_ALC_R_441K (0x5 << 5)
1459#define RT5651_ALC_R_882K (0x6 << 5)
1460#define RT5651_ALC_R_1764K (0x7 << 5)
1461#define RT5651_ALC_RC_MASK (0x1f)
1462#define RT5651_ALC_RC_SFT 0
1463
1464/* ALC Control 2 (0xb5) */
1465#define RT5651_ALC_POB_MASK (0x3f << 8)
1466#define RT5651_ALC_POB_SFT 8
1467#define RT5651_ALC_DRC_MASK (0x1 << 7)
1468#define RT5651_ALC_DRC_SFT 7
1469#define RT5651_ALC_DRC_DIS (0x0 << 7)
1470#define RT5651_ALC_DRC_EN (0x1 << 7)
1471#define RT5651_ALC_CPR_MASK (0x3 << 5)
1472#define RT5651_ALC_CPR_SFT 5
1473#define RT5651_ALC_CPR_1_1 (0x0 << 5)
1474#define RT5651_ALC_CPR_1_2 (0x1 << 5)
1475#define RT5651_ALC_CPR_1_4 (0x2 << 5)
1476#define RT5651_ALC_CPR_1_8 (0x3 << 5)
1477#define RT5651_ALC_PRB_MASK (0x1f)
1478#define RT5651_ALC_PRB_SFT 0
1479
1480/* ALC Control 3 (0xb6) */
1481#define RT5651_ALC_NGB_MASK (0xf << 12)
1482#define RT5651_ALC_NGB_SFT 12
1483#define RT5651_ALC_TAR_MASK (0x1f << 7)
1484#define RT5651_ALC_TAR_SFT 7
1485#define RT5651_ALC_NG_MASK (0x1 << 6)
1486#define RT5651_ALC_NG_SFT 6
1487#define RT5651_ALC_NG_DIS (0x0 << 6)
1488#define RT5651_ALC_NG_EN (0x1 << 6)
1489#define RT5651_ALC_NGH_MASK (0x1 << 5)
1490#define RT5651_ALC_NGH_SFT 5
1491#define RT5651_ALC_NGH_DIS (0x0 << 5)
1492#define RT5651_ALC_NGH_EN (0x1 << 5)
1493#define RT5651_ALC_NGT_MASK (0x1f)
1494#define RT5651_ALC_NGT_SFT 0
1495
1496/* Jack Detect Control 1 (0xbb) */
1497#define RT5651_JD_MASK (0x7 << 13)
1498#define RT5651_JD_SFT 13
1499#define RT5651_JD_DIS (0x0 << 13)
1500#define RT5651_JD_GPIO1 (0x1 << 13)
1501#define RT5651_JD_GPIO2 (0x2 << 13)
1502#define RT5651_JD_GPIO3 (0x3 << 13)
1503#define RT5651_JD_GPIO4 (0x4 << 13)
1504#define RT5651_JD_GPIO5 (0x5 << 13)
1505#define RT5651_JD_GPIO6 (0x6 << 13)
1506#define RT5651_JD_HP_MASK (0x1 << 11)
1507#define RT5651_JD_HP_SFT 11
1508#define RT5651_JD_HP_DIS (0x0 << 11)
1509#define RT5651_JD_HP_EN (0x1 << 11)
1510#define RT5651_JD_HP_TRG_MASK (0x1 << 10)
1511#define RT5651_JD_HP_TRG_SFT 10
1512#define RT5651_JD_HP_TRG_LO (0x0 << 10)
1513#define RT5651_JD_HP_TRG_HI (0x1 << 10)
1514#define RT5651_JD_SPL_MASK (0x1 << 9)
1515#define RT5651_JD_SPL_SFT 9
1516#define RT5651_JD_SPL_DIS (0x0 << 9)
1517#define RT5651_JD_SPL_EN (0x1 << 9)
1518#define RT5651_JD_SPL_TRG_MASK (0x1 << 8)
1519#define RT5651_JD_SPL_TRG_SFT 8
1520#define RT5651_JD_SPL_TRG_LO (0x0 << 8)
1521#define RT5651_JD_SPL_TRG_HI (0x1 << 8)
1522#define RT5651_JD_SPR_MASK (0x1 << 7)
1523#define RT5651_JD_SPR_SFT 7
1524#define RT5651_JD_SPR_DIS (0x0 << 7)
1525#define RT5651_JD_SPR_EN (0x1 << 7)
1526#define RT5651_JD_SPR_TRG_MASK (0x1 << 6)
1527#define RT5651_JD_SPR_TRG_SFT 6
1528#define RT5651_JD_SPR_TRG_LO (0x0 << 6)
1529#define RT5651_JD_SPR_TRG_HI (0x1 << 6)
1530#define RT5651_JD_LO_MASK (0x1 << 3)
1531#define RT5651_JD_LO_SFT 3
1532#define RT5651_JD_LO_DIS (0x0 << 3)
1533#define RT5651_JD_LO_EN (0x1 << 3)
1534#define RT5651_JD_LO_TRG_MASK (0x1 << 2)
1535#define RT5651_JD_LO_TRG_SFT 2
1536#define RT5651_JD_LO_TRG_LO (0x0 << 2)
1537#define RT5651_JD_LO_TRG_HI (0x1 << 2)
1538
1539/* Jack Detect Control 2 (0xbc) */
1540#define RT5651_JD_TRG_SEL_MASK (0x7 << 9)
1541#define RT5651_JD_TRG_SEL_SFT 9
1542#define RT5651_JD_TRG_SEL_GPIO (0x0 << 9)
1543#define RT5651_JD_TRG_SEL_JD1_1 (0x1 << 9)
1544#define RT5651_JD_TRG_SEL_JD1_2 (0x2 << 9)
1545#define RT5651_JD_TRG_SEL_JD2 (0x3 << 9)
1546#define RT5651_JD_TRG_SEL_JD3 (0x4 << 9)
1547#define RT5651_JD3_IRQ_EN (0x1 << 8)
1548#define RT5651_JD3_IRQ_EN_SFT 8
1549#define RT5651_JD3_EN_STKY (0x1 << 7)
1550#define RT5651_JD3_EN_STKY_SFT 7
1551#define RT5651_JD3_INV (0x1 << 6)
1552#define RT5651_JD3_INV_SFT 6
1553
1554/* IRQ Control 1 (0xbd) */
1555#define RT5651_IRQ_JD_MASK (0x1 << 15)
1556#define RT5651_IRQ_JD_SFT 15
1557#define RT5651_IRQ_JD_BP (0x0 << 15)
1558#define RT5651_IRQ_JD_NOR (0x1 << 15)
1559#define RT5651_JD_STKY_MASK (0x1 << 13)
1560#define RT5651_JD_STKY_SFT 13
1561#define RT5651_JD_STKY_DIS (0x0 << 13)
1562#define RT5651_JD_STKY_EN (0x1 << 13)
1563#define RT5651_JD_P_MASK (0x1 << 11)
1564#define RT5651_JD_P_SFT 11
1565#define RT5651_JD_P_NOR (0x0 << 11)
1566#define RT5651_JD_P_INV (0x1 << 11)
1567#define RT5651_JD1_1_IRQ_EN (0x1 << 9)
1568#define RT5651_JD1_1_IRQ_EN_SFT 9
1569#define RT5651_JD1_1_EN_STKY (0x1 << 8)
1570#define RT5651_JD1_1_EN_STKY_SFT 8
1571#define RT5651_JD1_1_INV (0x1 << 7)
1572#define RT5651_JD1_1_INV_SFT 7
1573#define RT5651_JD1_2_IRQ_EN (0x1 << 6)
1574#define RT5651_JD1_2_IRQ_EN_SFT 6
1575#define RT5651_JD1_2_EN_STKY (0x1 << 5)
1576#define RT5651_JD1_2_EN_STKY_SFT 5
1577#define RT5651_JD1_2_INV (0x1 << 4)
1578#define RT5651_JD1_2_INV_SFT 4
1579#define RT5651_JD2_IRQ_EN (0x1 << 3)
1580#define RT5651_JD2_IRQ_EN_SFT 3
1581#define RT5651_JD2_EN_STKY (0x1 << 2)
1582#define RT5651_JD2_EN_STKY_SFT 2
1583#define RT5651_JD2_INV (0x1 << 1)
1584#define RT5651_JD2_INV_SFT 1
1585
1586/* IRQ Control 2 (0xbe) */
1587#define RT5651_IRQ_MB1_OC_MASK (0x1 << 15)
1588#define RT5651_IRQ_MB1_OC_SFT 15
1589#define RT5651_IRQ_MB1_OC_BP (0x0 << 15)
1590#define RT5651_IRQ_MB1_OC_NOR (0x1 << 15)
1591#define RT5651_MB1_OC_STKY_MASK (0x1 << 11)
1592#define RT5651_MB1_OC_STKY_SFT 11
1593#define RT5651_MB1_OC_STKY_DIS (0x0 << 11)
1594#define RT5651_MB1_OC_STKY_EN (0x1 << 11)
1595#define RT5651_MB1_OC_P_MASK (0x1 << 7)
1596#define RT5651_MB1_OC_P_SFT 7
1597#define RT5651_MB1_OC_P_NOR (0x0 << 7)
1598#define RT5651_MB1_OC_P_INV (0x1 << 7)
1599#define RT5651_MB2_OC_P_MASK (0x1 << 6)
1600#define RT5651_MB1_OC_CLR (0x1 << 3)
1601#define RT5651_MB1_OC_CLR_SFT 3
1602#define RT5651_STA_GPIO8 (0x1)
1603#define RT5651_STA_GPIO8_BIT 0
1604
1605/* Internal Status and GPIO status (0xbf) */
1606#define RT5651_STA_JD3 (0x1 << 15)
1607#define RT5651_STA_JD3_BIT 15
1608#define RT5651_STA_JD2 (0x1 << 14)
1609#define RT5651_STA_JD2_BIT 14
1610#define RT5651_STA_JD1_2 (0x1 << 13)
1611#define RT5651_STA_JD1_2_BIT 13
1612#define RT5651_STA_JD1_1 (0x1 << 12)
1613#define RT5651_STA_JD1_1_BIT 12
1614#define RT5651_STA_GP7 (0x1 << 11)
1615#define RT5651_STA_GP7_BIT 11
1616#define RT5651_STA_GP6 (0x1 << 10)
1617#define RT5651_STA_GP6_BIT 10
1618#define RT5651_STA_GP5 (0x1 << 9)
1619#define RT5651_STA_GP5_BIT 9
1620#define RT5651_STA_GP1 (0x1 << 8)
1621#define RT5651_STA_GP1_BIT 8
1622#define RT5651_STA_GP2 (0x1 << 7)
1623#define RT5651_STA_GP2_BIT 7
1624#define RT5651_STA_GP3 (0x1 << 6)
1625#define RT5651_STA_GP3_BIT 6
1626#define RT5651_STA_GP4 (0x1 << 5)
1627#define RT5651_STA_GP4_BIT 5
1628#define RT5651_STA_GP_JD (0x1 << 4)
1629#define RT5651_STA_GP_JD_BIT 4
1630
1631/* GPIO Control 1 (0xc0) */
1632#define RT5651_GP1_PIN_MASK (0x1 << 15)
1633#define RT5651_GP1_PIN_SFT 15
1634#define RT5651_GP1_PIN_GPIO1 (0x0 << 15)
1635#define RT5651_GP1_PIN_IRQ (0x1 << 15)
1636#define RT5651_GP2_PIN_MASK (0x1 << 14)
1637#define RT5651_GP2_PIN_SFT 14
1638#define RT5651_GP2_PIN_GPIO2 (0x0 << 14)
1639#define RT5651_GP2_PIN_DMIC1_SCL (0x1 << 14)
1640#define RT5651_GPIO_M_MASK (0x1 << 9)
1641#define RT5651_GPIO_M_SFT 9
1642#define RT5651_GPIO_M_FLT (0x0 << 9)
1643#define RT5651_GPIO_M_PH (0x1 << 9)
1644#define RT5651_I2S2_SEL_MASK (0x1 << 8)
1645#define RT5651_I2S2_SEL_SFT 8
1646#define RT5651_I2S2_SEL_I2S (0x0 << 8)
1647#define RT5651_I2S2_SEL_GPIO (0x1 << 8)
1648#define RT5651_GP5_PIN_MASK (0x1 << 7)
1649#define RT5651_GP5_PIN_SFT 7
1650#define RT5651_GP5_PIN_GPIO5 (0x0 << 7)
1651#define RT5651_GP5_PIN_IRQ (0x1 << 7)
1652#define RT5651_GP6_PIN_MASK (0x1 << 6)
1653#define RT5651_GP6_PIN_SFT 6
1654#define RT5651_GP6_PIN_GPIO6 (0x0 << 6)
1655#define RT5651_GP6_PIN_DMIC_SDA (0x1 << 6)
1656#define RT5651_GP7_PIN_MASK (0x1 << 5)
1657#define RT5651_GP7_PIN_SFT 5
1658#define RT5651_GP7_PIN_GPIO7 (0x0 << 5)
1659#define RT5651_GP7_PIN_IRQ (0x1 << 5)
1660#define RT5651_GP8_PIN_MASK (0x1 << 4)
1661#define RT5651_GP8_PIN_SFT 4
1662#define RT5651_GP8_PIN_GPIO8 (0x0 << 4)
1663#define RT5651_GP8_PIN_DMIC_SDA (0x1 << 4)
1664#define RT5651_GPIO_PDM_SEL_MASK (0x1 << 3)
1665#define RT5651_GPIO_PDM_SEL_SFT 3
1666#define RT5651_GPIO_PDM_SEL_GPIO (0x0 << 3)
1667#define RT5651_GPIO_PDM_SEL_PDM (0x1 << 3)
1668
1669/* GPIO Control 2 (0xc1) */
1670#define RT5651_GP5_DR_MASK (0x1 << 14)
1671#define RT5651_GP5_DR_SFT 14
1672#define RT5651_GP5_DR_IN (0x0 << 14)
1673#define RT5651_GP5_DR_OUT (0x1 << 14)
1674#define RT5651_GP5_OUT_MASK (0x1 << 13)
1675#define RT5651_GP5_OUT_SFT 13
1676#define RT5651_GP5_OUT_LO (0x0 << 13)
1677#define RT5651_GP5_OUT_HI (0x1 << 13)
1678#define RT5651_GP5_P_MASK (0x1 << 12)
1679#define RT5651_GP5_P_SFT 12
1680#define RT5651_GP5_P_NOR (0x0 << 12)
1681#define RT5651_GP5_P_INV (0x1 << 12)
1682#define RT5651_GP4_DR_MASK (0x1 << 11)
1683#define RT5651_GP4_DR_SFT 11
1684#define RT5651_GP4_DR_IN (0x0 << 11)
1685#define RT5651_GP4_DR_OUT (0x1 << 11)
1686#define RT5651_GP4_OUT_MASK (0x1 << 10)
1687#define RT5651_GP4_OUT_SFT 10
1688#define RT5651_GP4_OUT_LO (0x0 << 10)
1689#define RT5651_GP4_OUT_HI (0x1 << 10)
1690#define RT5651_GP4_P_MASK (0x1 << 9)
1691#define RT5651_GP4_P_SFT 9
1692#define RT5651_GP4_P_NOR (0x0 << 9)
1693#define RT5651_GP4_P_INV (0x1 << 9)
1694#define RT5651_GP3_DR_MASK (0x1 << 8)
1695#define RT5651_GP3_DR_SFT 8
1696#define RT5651_GP3_DR_IN (0x0 << 8)
1697#define RT5651_GP3_DR_OUT (0x1 << 8)
1698#define RT5651_GP3_OUT_MASK (0x1 << 7)
1699#define RT5651_GP3_OUT_SFT 7
1700#define RT5651_GP3_OUT_LO (0x0 << 7)
1701#define RT5651_GP3_OUT_HI (0x1 << 7)
1702#define RT5651_GP3_P_MASK (0x1 << 6)
1703#define RT5651_GP3_P_SFT 6
1704#define RT5651_GP3_P_NOR (0x0 << 6)
1705#define RT5651_GP3_P_INV (0x1 << 6)
1706#define RT5651_GP2_DR_MASK (0x1 << 5)
1707#define RT5651_GP2_DR_SFT 5
1708#define RT5651_GP2_DR_IN (0x0 << 5)
1709#define RT5651_GP2_DR_OUT (0x1 << 5)
1710#define RT5651_GP2_OUT_MASK (0x1 << 4)
1711#define RT5651_GP2_OUT_SFT 4
1712#define RT5651_GP2_OUT_LO (0x0 << 4)
1713#define RT5651_GP2_OUT_HI (0x1 << 4)
1714#define RT5651_GP2_P_MASK (0x1 << 3)
1715#define RT5651_GP2_P_SFT 3
1716#define RT5651_GP2_P_NOR (0x0 << 3)
1717#define RT5651_GP2_P_INV (0x1 << 3)
1718#define RT5651_GP1_DR_MASK (0x1 << 2)
1719#define RT5651_GP1_DR_SFT 2
1720#define RT5651_GP1_DR_IN (0x0 << 2)
1721#define RT5651_GP1_DR_OUT (0x1 << 2)
1722#define RT5651_GP1_OUT_MASK (0x1 << 1)
1723#define RT5651_GP1_OUT_SFT 1
1724#define RT5651_GP1_OUT_LO (0x0 << 1)
1725#define RT5651_GP1_OUT_HI (0x1 << 1)
1726#define RT5651_GP1_P_MASK (0x1)
1727#define RT5651_GP1_P_SFT 0
1728#define RT5651_GP1_P_NOR (0x0)
1729#define RT5651_GP1_P_INV (0x1)
1730
1731/* GPIO Control 3 (0xc2) */
1732#define RT5651_GP8_DR_MASK (0x1 << 8)
1733#define RT5651_GP8_DR_SFT 8
1734#define RT5651_GP8_DR_IN (0x0 << 8)
1735#define RT5651_GP8_DR_OUT (0x1 << 8)
1736#define RT5651_GP8_OUT_MASK (0x1 << 7)
1737#define RT5651_GP8_OUT_SFT 7
1738#define RT5651_GP8_OUT_LO (0x0 << 7)
1739#define RT5651_GP8_OUT_HI (0x1 << 7)
1740#define RT5651_GP8_P_MASK (0x1 << 6)
1741#define RT5651_GP8_P_SFT 6
1742#define RT5651_GP8_P_NOR (0x0 << 6)
1743#define RT5651_GP8_P_INV (0x1 << 6)
1744#define RT5651_GP7_DR_MASK (0x1 << 5)
1745#define RT5651_GP7_DR_SFT 5
1746#define RT5651_GP7_DR_IN (0x0 << 5)
1747#define RT5651_GP7_DR_OUT (0x1 << 5)
1748#define RT5651_GP7_OUT_MASK (0x1 << 4)
1749#define RT5651_GP7_OUT_SFT 4
1750#define RT5651_GP7_OUT_LO (0x0 << 4)
1751#define RT5651_GP7_OUT_HI (0x1 << 4)
1752#define RT5651_GP7_P_MASK (0x1 << 3)
1753#define RT5651_GP7_P_SFT 3
1754#define RT5651_GP7_P_NOR (0x0 << 3)
1755#define RT5651_GP7_P_INV (0x1 << 3)
1756#define RT5651_GP6_DR_MASK (0x1 << 2)
1757#define RT5651_GP6_DR_SFT 2
1758#define RT5651_GP6_DR_IN (0x0 << 2)
1759#define RT5651_GP6_DR_OUT (0x1 << 2)
1760#define RT5651_GP6_OUT_MASK (0x1 << 1)
1761#define RT5651_GP6_OUT_SFT 1
1762#define RT5651_GP6_OUT_LO (0x0 << 1)
1763#define RT5651_GP6_OUT_HI (0x1 << 1)
1764#define RT5651_GP6_P_MASK (0x1)
1765#define RT5651_GP6_P_SFT 0
1766#define RT5651_GP6_P_NOR (0x0)
1767#define RT5651_GP6_P_INV (0x1)
1768
1769/* Scramble Control (0xce) */
1770#define RT5651_SCB_SWAP_MASK (0x1 << 15)
1771#define RT5651_SCB_SWAP_SFT 15
1772#define RT5651_SCB_SWAP_DIS (0x0 << 15)
1773#define RT5651_SCB_SWAP_EN (0x1 << 15)
1774#define RT5651_SCB_MASK (0x1 << 14)
1775#define RT5651_SCB_SFT 14
1776#define RT5651_SCB_DIS (0x0 << 14)
1777#define RT5651_SCB_EN (0x1 << 14)
1778
1779/* Baseback Control (0xcf) */
1780#define RT5651_BB_MASK (0x1 << 15)
1781#define RT5651_BB_SFT 15
1782#define RT5651_BB_DIS (0x0 << 15)
1783#define RT5651_BB_EN (0x1 << 15)
1784#define RT5651_BB_CT_MASK (0x7 << 12)
1785#define RT5651_BB_CT_SFT 12
1786#define RT5651_BB_CT_A (0x0 << 12)
1787#define RT5651_BB_CT_B (0x1 << 12)
1788#define RT5651_BB_CT_C (0x2 << 12)
1789#define RT5651_BB_CT_D (0x3 << 12)
1790#define RT5651_M_BB_L_MASK (0x1 << 9)
1791#define RT5651_M_BB_L_SFT 9
1792#define RT5651_M_BB_R_MASK (0x1 << 8)
1793#define RT5651_M_BB_R_SFT 8
1794#define RT5651_M_BB_HPF_L_MASK (0x1 << 7)
1795#define RT5651_M_BB_HPF_L_SFT 7
1796#define RT5651_M_BB_HPF_R_MASK (0x1 << 6)
1797#define RT5651_M_BB_HPF_R_SFT 6
1798#define RT5651_G_BB_BST_MASK (0x3f)
1799#define RT5651_G_BB_BST_SFT 0
1800
1801/* MP3 Plus Control 1 (0xd0) */
1802#define RT5651_M_MP3_L_MASK (0x1 << 15)
1803#define RT5651_M_MP3_L_SFT 15
1804#define RT5651_M_MP3_R_MASK (0x1 << 14)
1805#define RT5651_M_MP3_R_SFT 14
1806#define RT5651_M_MP3_MASK (0x1 << 13)
1807#define RT5651_M_MP3_SFT 13
1808#define RT5651_M_MP3_DIS (0x0 << 13)
1809#define RT5651_M_MP3_EN (0x1 << 13)
1810#define RT5651_EG_MP3_MASK (0x1f << 8)
1811#define RT5651_EG_MP3_SFT 8
1812#define RT5651_MP3_HLP_MASK (0x1 << 7)
1813#define RT5651_MP3_HLP_SFT 7
1814#define RT5651_MP3_HLP_DIS (0x0 << 7)
1815#define RT5651_MP3_HLP_EN (0x1 << 7)
1816#define RT5651_M_MP3_ORG_L_MASK (0x1 << 6)
1817#define RT5651_M_MP3_ORG_L_SFT 6
1818#define RT5651_M_MP3_ORG_R_MASK (0x1 << 5)
1819#define RT5651_M_MP3_ORG_R_SFT 5
1820
1821/* MP3 Plus Control 2 (0xd1) */
1822#define RT5651_MP3_WT_MASK (0x1 << 13)
1823#define RT5651_MP3_WT_SFT 13
1824#define RT5651_MP3_WT_1_4 (0x0 << 13)
1825#define RT5651_MP3_WT_1_2 (0x1 << 13)
1826#define RT5651_OG_MP3_MASK (0x1f << 8)
1827#define RT5651_OG_MP3_SFT 8
1828#define RT5651_HG_MP3_MASK (0x3f)
1829#define RT5651_HG_MP3_SFT 0
1830
1831/* 3D HP Control 1 (0xd2) */
1832#define RT5651_3D_CF_MASK (0x1 << 15)
1833#define RT5651_3D_CF_SFT 15
1834#define RT5651_3D_CF_DIS (0x0 << 15)
1835#define RT5651_3D_CF_EN (0x1 << 15)
1836#define RT5651_3D_HP_MASK (0x1 << 14)
1837#define RT5651_3D_HP_SFT 14
1838#define RT5651_3D_HP_DIS (0x0 << 14)
1839#define RT5651_3D_HP_EN (0x1 << 14)
1840#define RT5651_3D_BT_MASK (0x1 << 13)
1841#define RT5651_3D_BT_SFT 13
1842#define RT5651_3D_BT_DIS (0x0 << 13)
1843#define RT5651_3D_BT_EN (0x1 << 13)
1844#define RT5651_3D_1F_MIX_MASK (0x3 << 11)
1845#define RT5651_3D_1F_MIX_SFT 11
1846#define RT5651_3D_HP_M_MASK (0x1 << 10)
1847#define RT5651_3D_HP_M_SFT 10
1848#define RT5651_3D_HP_M_SUR (0x0 << 10)
1849#define RT5651_3D_HP_M_FRO (0x1 << 10)
1850#define RT5651_M_3D_HRTF_MASK (0x1 << 9)
1851#define RT5651_M_3D_HRTF_SFT 9
1852#define RT5651_M_3D_D2H_MASK (0x1 << 8)
1853#define RT5651_M_3D_D2H_SFT 8
1854#define RT5651_M_3D_D2R_MASK (0x1 << 7)
1855#define RT5651_M_3D_D2R_SFT 7
1856#define RT5651_M_3D_REVB_MASK (0x1 << 6)
1857#define RT5651_M_3D_REVB_SFT 6
1858
1859/* Adjustable high pass filter control 1 (0xd3) */
1860#define RT5651_2ND_HPF_MASK (0x1 << 15)
1861#define RT5651_2ND_HPF_SFT 15
1862#define RT5651_2ND_HPF_DIS (0x0 << 15)
1863#define RT5651_2ND_HPF_EN (0x1 << 15)
1864#define RT5651_HPF_CF_L_MASK (0x7 << 12)
1865#define RT5651_HPF_CF_L_SFT 12
1866#define RT5651_HPF_CF_R_MASK (0x7 << 8)
1867#define RT5651_HPF_CF_R_SFT 8
1868#define RT5651_ZD_T_MASK (0x3 << 6)
1869#define RT5651_ZD_T_SFT 6
1870#define RT5651_ZD_F_MASK (0x3 << 4)
1871#define RT5651_ZD_F_SFT 4
1872#define RT5651_ZD_F_IM (0x0 << 4)
1873#define RT5651_ZD_F_ZC_IM (0x1 << 4)
1874#define RT5651_ZD_F_ZC_IOD (0x2 << 4)
1875#define RT5651_ZD_F_UN (0x3 << 4)
1876
1877/* Adjustable high pass filter control 2 (0xd4) */
1878#define RT5651_HPF_CF_L_NUM_MASK (0x3f << 8)
1879#define RT5651_HPF_CF_L_NUM_SFT 8
1880#define RT5651_HPF_CF_R_NUM_MASK (0x3f)
1881#define RT5651_HPF_CF_R_NUM_SFT 0
1882
1883/* HP calibration control and Amp detection (0xd6) */
1884#define RT5651_SI_DAC_MASK (0x1 << 11)
1885#define RT5651_SI_DAC_SFT 11
1886#define RT5651_SI_DAC_AUTO (0x0 << 11)
1887#define RT5651_SI_DAC_TEST (0x1 << 11)
1888#define RT5651_DC_CAL_M_MASK (0x1 << 10)
1889#define RT5651_DC_CAL_M_SFT 10
1890#define RT5651_DC_CAL_M_NOR (0x0 << 10)
1891#define RT5651_DC_CAL_M_CAL (0x1 << 10)
1892#define RT5651_DC_CAL_MASK (0x1 << 9)
1893#define RT5651_DC_CAL_SFT 9
1894#define RT5651_DC_CAL_DIS (0x0 << 9)
1895#define RT5651_DC_CAL_EN (0x1 << 9)
1896#define RT5651_HPD_RCV_MASK (0x7 << 6)
1897#define RT5651_HPD_RCV_SFT 6
1898#define RT5651_HPD_PS_MASK (0x1 << 5)
1899#define RT5651_HPD_PS_SFT 5
1900#define RT5651_HPD_PS_DIS (0x0 << 5)
1901#define RT5651_HPD_PS_EN (0x1 << 5)
1902#define RT5651_CAL_M_MASK (0x1 << 4)
1903#define RT5651_CAL_M_SFT 4
1904#define RT5651_CAL_M_DEP (0x0 << 4)
1905#define RT5651_CAL_M_CAL (0x1 << 4)
1906#define RT5651_CAL_MASK (0x1 << 3)
1907#define RT5651_CAL_SFT 3
1908#define RT5651_CAL_DIS (0x0 << 3)
1909#define RT5651_CAL_EN (0x1 << 3)
1910#define RT5651_CAL_TEST_MASK (0x1 << 2)
1911#define RT5651_CAL_TEST_SFT 2
1912#define RT5651_CAL_TEST_DIS (0x0 << 2)
1913#define RT5651_CAL_TEST_EN (0x1 << 2)
1914#define RT5651_CAL_P_MASK (0x3)
1915#define RT5651_CAL_P_SFT 0
1916#define RT5651_CAL_P_NONE (0x0)
1917#define RT5651_CAL_P_CAL (0x1)
1918#define RT5651_CAL_P_DAC_CAL (0x2)
1919
1920/* Soft volume and zero cross control 1 (0xd9) */
1921#define RT5651_SV_MASK (0x1 << 15)
1922#define RT5651_SV_SFT 15
1923#define RT5651_SV_DIS (0x0 << 15)
1924#define RT5651_SV_EN (0x1 << 15)
1925#define RT5651_OUT_SV_MASK (0x1 << 13)
1926#define RT5651_OUT_SV_SFT 13
1927#define RT5651_OUT_SV_DIS (0x0 << 13)
1928#define RT5651_OUT_SV_EN (0x1 << 13)
1929#define RT5651_HP_SV_MASK (0x1 << 12)
1930#define RT5651_HP_SV_SFT 12
1931#define RT5651_HP_SV_DIS (0x0 << 12)
1932#define RT5651_HP_SV_EN (0x1 << 12)
1933#define RT5651_ZCD_DIG_MASK (0x1 << 11)
1934#define RT5651_ZCD_DIG_SFT 11
1935#define RT5651_ZCD_DIG_DIS (0x0 << 11)
1936#define RT5651_ZCD_DIG_EN (0x1 << 11)
1937#define RT5651_ZCD_MASK (0x1 << 10)
1938#define RT5651_ZCD_SFT 10
1939#define RT5651_ZCD_PD (0x0 << 10)
1940#define RT5651_ZCD_PU (0x1 << 10)
1941#define RT5651_M_ZCD_MASK (0x3f << 4)
1942#define RT5651_M_ZCD_SFT 4
1943#define RT5651_M_ZCD_OM_L (0x1 << 7)
1944#define RT5651_M_ZCD_OM_R (0x1 << 6)
1945#define RT5651_M_ZCD_RM_L (0x1 << 5)
1946#define RT5651_M_ZCD_RM_R (0x1 << 4)
1947#define RT5651_SV_DLY_MASK (0xf)
1948#define RT5651_SV_DLY_SFT 0
1949
1950/* Soft volume and zero cross control 2 (0xda) */
1951#define RT5651_ZCD_HP_MASK (0x1 << 15)
1952#define RT5651_ZCD_HP_SFT 15
1953#define RT5651_ZCD_HP_DIS (0x0 << 15)
1954#define RT5651_ZCD_HP_EN (0x1 << 15)
1955
1956/* Digital Misc Control (0xfa) */
1957#define RT5651_I2S2_MS_SP_MASK (0x1 << 8)
1958#define RT5651_I2S2_MS_SP_SEL 8
1959#define RT5651_I2S2_MS_SP_64 (0x0 << 8)
1960#define RT5651_I2S2_MS_SP_50 (0x1 << 8)
1961#define RT5651_CLK_DET_EN (0x1 << 3)
1962#define RT5651_CLK_DET_EN_SFT 3
1963#define RT5651_AMP_DET_EN (0x1 << 1)
1964#define RT5651_AMP_DET_EN_SFT 1
1965#define RT5651_D_GATE_EN (0x1)
1966#define RT5651_D_GATE_EN_SFT 0
1967
1968/* Codec Private Register definition */
1969/* 3D Speaker Control (0x63) */
1970#define RT5651_3D_SPK_MASK (0x1 << 15)
1971#define RT5651_3D_SPK_SFT 15
1972#define RT5651_3D_SPK_DIS (0x0 << 15)
1973#define RT5651_3D_SPK_EN (0x1 << 15)
1974#define RT5651_3D_SPK_M_MASK (0x3 << 13)
1975#define RT5651_3D_SPK_M_SFT 13
1976#define RT5651_3D_SPK_CG_MASK (0x1f << 8)
1977#define RT5651_3D_SPK_CG_SFT 8
1978#define RT5651_3D_SPK_SG_MASK (0x1f)
1979#define RT5651_3D_SPK_SG_SFT 0
1980
1981/* Wind Noise Detection Control 1 (0x6c) */
1982#define RT5651_WND_MASK (0x1 << 15)
1983#define RT5651_WND_SFT 15
1984#define RT5651_WND_DIS (0x0 << 15)
1985#define RT5651_WND_EN (0x1 << 15)
1986
1987/* Wind Noise Detection Control 2 (0x6d) */
1988#define RT5651_WND_FC_NW_MASK (0x3f << 10)
1989#define RT5651_WND_FC_NW_SFT 10
1990#define RT5651_WND_FC_WK_MASK (0x3f << 4)
1991#define RT5651_WND_FC_WK_SFT 4
1992
1993/* Wind Noise Detection Control 3 (0x6e) */
1994#define RT5651_HPF_FC_MASK (0x3f << 6)
1995#define RT5651_HPF_FC_SFT 6
1996#define RT5651_WND_FC_ST_MASK (0x3f)
1997#define RT5651_WND_FC_ST_SFT 0
1998
1999/* Wind Noise Detection Control 4 (0x6f) */
2000#define RT5651_WND_TH_LO_MASK (0x3ff)
2001#define RT5651_WND_TH_LO_SFT 0
2002
2003/* Wind Noise Detection Control 5 (0x70) */
2004#define RT5651_WND_TH_HI_MASK (0x3ff)
2005#define RT5651_WND_TH_HI_SFT 0
2006
2007/* Wind Noise Detection Control 8 (0x73) */
2008#define RT5651_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2009#define RT5651_WND_WIND_SFT 13
2010#define RT5651_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
2011#define RT5651_WND_STRONG_SFT 12
2012enum {
2013 RT5651_NO_WIND,
2014 RT5651_BREEZE,
2015 RT5651_STORM,
2016};
2017
2018/* Dipole Speaker Interface (0x75) */
2019#define RT5651_DP_ATT_MASK (0x3 << 14)
2020#define RT5651_DP_ATT_SFT 14
2021#define RT5651_DP_SPK_MASK (0x1 << 10)
2022#define RT5651_DP_SPK_SFT 10
2023#define RT5651_DP_SPK_DIS (0x0 << 10)
2024#define RT5651_DP_SPK_EN (0x1 << 10)
2025
2026/* EQ Pre Volume Control (0xb3) */
2027#define RT5651_EQ_PRE_VOL_MASK (0xffff)
2028#define RT5651_EQ_PRE_VOL_SFT 0
2029
2030/* EQ Post Volume Control (0xb4) */
2031#define RT5651_EQ_PST_VOL_MASK (0xffff)
2032#define RT5651_EQ_PST_VOL_SFT 0
2033
2034/* System Clock Source */
2035enum {
2036 RT5651_SCLK_S_MCLK,
2037 RT5651_SCLK_S_PLL1,
2038 RT5651_SCLK_S_RCCLK,
2039};
2040
2041/* PLL1 Source */
2042enum {
2043 RT5651_PLL1_S_MCLK,
2044 RT5651_PLL1_S_BCLK1,
2045 RT5651_PLL1_S_BCLK2,
2046};
2047
2048enum {
2049 RT5651_AIF1,
2050 RT5651_AIF2,
2051 RT5651_AIFS,
2052};
2053
2054struct rt5651_pll_code {
2055 bool m_bp; /* Indicates bypass m code or not. */
2056 int m_code;
2057 int n_code;
2058 int k_code;
2059};
2060
2061struct rt5651_priv {
2062 struct snd_soc_codec *codec;
2063 struct rt5651_platform_data pdata;
2064 struct regmap *regmap;
2065
2066 int sysclk;
2067 int sysclk_src;
2068 int lrck[RT5651_AIFS];
2069 int bclk[RT5651_AIFS];
2070 int master[RT5651_AIFS];
2071
2072 int pll_src;
2073 int pll_in;
2074 int pll_out;
2075
2076 int dmic_en;
2077 bool hp_mute;
2078};
2079
2080#endif /* __RT5651_H__ */
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
new file mode 100644
index 000000000000..833231e27340
--- /dev/null
+++ b/sound/soc/codecs/rt5677.c
@@ -0,0 +1,3498 @@
1/*
2 * rt5677.c -- RT5677 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Oder Chiou <oder_chiou@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/fs.h>
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/regmap.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/spi/spi.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29
30#include "rt5677.h"
31
32#define RT5677_DEVICE_ID 0x6327
33
34#define RT5677_PR_RANGE_BASE (0xff + 1)
35#define RT5677_PR_SPACING 0x100
36
37#define RT5677_PR_BASE (RT5677_PR_RANGE_BASE + (0 * RT5677_PR_SPACING))
38
39static const struct regmap_range_cfg rt5677_ranges[] = {
40 {
41 .name = "PR",
42 .range_min = RT5677_PR_BASE,
43 .range_max = RT5677_PR_BASE + 0xfd,
44 .selector_reg = RT5677_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5677_PRIV_DATA,
48 .window_len = 0x1,
49 },
50};
51
52static const struct reg_default init_list[] = {
53 {RT5677_PR_BASE + 0x3d, 0x364d},
54 {RT5677_PR_BASE + 0x17, 0x4fc0},
55 {RT5677_PR_BASE + 0x13, 0x0312},
56 {RT5677_PR_BASE + 0x1e, 0x0000},
57 {RT5677_PR_BASE + 0x12, 0x0eaa},
58 {RT5677_PR_BASE + 0x14, 0x018a},
59};
60#define RT5677_INIT_REG_LEN ARRAY_SIZE(init_list)
61
62static const struct reg_default rt5677_reg[] = {
63 {RT5677_RESET , 0x0000},
64 {RT5677_LOUT1 , 0xa800},
65 {RT5677_IN1 , 0x0000},
66 {RT5677_MICBIAS , 0x0000},
67 {RT5677_SLIMBUS_PARAM , 0x0000},
68 {RT5677_SLIMBUS_RX , 0x0000},
69 {RT5677_SLIMBUS_CTRL , 0x0000},
70 {RT5677_SIDETONE_CTRL , 0x000b},
71 {RT5677_ANA_DAC1_2_3_SRC , 0x0000},
72 {RT5677_IF_DSP_DAC3_4_MIXER , 0x1111},
73 {RT5677_DAC4_DIG_VOL , 0xafaf},
74 {RT5677_DAC3_DIG_VOL , 0xafaf},
75 {RT5677_DAC1_DIG_VOL , 0xafaf},
76 {RT5677_DAC2_DIG_VOL , 0xafaf},
77 {RT5677_IF_DSP_DAC2_MIXER , 0x0011},
78 {RT5677_STO1_ADC_DIG_VOL , 0x2f2f},
79 {RT5677_MONO_ADC_DIG_VOL , 0x2f2f},
80 {RT5677_STO1_2_ADC_BST , 0x0000},
81 {RT5677_STO2_ADC_DIG_VOL , 0x2f2f},
82 {RT5677_ADC_BST_CTRL2 , 0x0000},
83 {RT5677_STO3_4_ADC_BST , 0x0000},
84 {RT5677_STO3_ADC_DIG_VOL , 0x2f2f},
85 {RT5677_STO4_ADC_DIG_VOL , 0x2f2f},
86 {RT5677_STO4_ADC_MIXER , 0xd4c0},
87 {RT5677_STO3_ADC_MIXER , 0xd4c0},
88 {RT5677_STO2_ADC_MIXER , 0xd4c0},
89 {RT5677_STO1_ADC_MIXER , 0xd4c0},
90 {RT5677_MONO_ADC_MIXER , 0xd4d1},
91 {RT5677_ADC_IF_DSP_DAC1_MIXER , 0x8080},
92 {RT5677_STO1_DAC_MIXER , 0xaaaa},
93 {RT5677_MONO_DAC_MIXER , 0xaaaa},
94 {RT5677_DD1_MIXER , 0xaaaa},
95 {RT5677_DD2_MIXER , 0xaaaa},
96 {RT5677_IF3_DATA , 0x0000},
97 {RT5677_IF4_DATA , 0x0000},
98 {RT5677_PDM_OUT_CTRL , 0x8888},
99 {RT5677_PDM_DATA_CTRL1 , 0x0000},
100 {RT5677_PDM_DATA_CTRL2 , 0x0000},
101 {RT5677_PDM1_DATA_CTRL2 , 0x0000},
102 {RT5677_PDM1_DATA_CTRL3 , 0x0000},
103 {RT5677_PDM1_DATA_CTRL4 , 0x0000},
104 {RT5677_PDM2_DATA_CTRL2 , 0x0000},
105 {RT5677_PDM2_DATA_CTRL3 , 0x0000},
106 {RT5677_PDM2_DATA_CTRL4 , 0x0000},
107 {RT5677_TDM1_CTRL1 , 0x0300},
108 {RT5677_TDM1_CTRL2 , 0x0000},
109 {RT5677_TDM1_CTRL3 , 0x4000},
110 {RT5677_TDM1_CTRL4 , 0x0123},
111 {RT5677_TDM1_CTRL5 , 0x4567},
112 {RT5677_TDM2_CTRL1 , 0x0300},
113 {RT5677_TDM2_CTRL2 , 0x0000},
114 {RT5677_TDM2_CTRL3 , 0x4000},
115 {RT5677_TDM2_CTRL4 , 0x0123},
116 {RT5677_TDM2_CTRL5 , 0x4567},
117 {RT5677_I2C_MASTER_CTRL1 , 0x0001},
118 {RT5677_I2C_MASTER_CTRL2 , 0x0000},
119 {RT5677_I2C_MASTER_CTRL3 , 0x0000},
120 {RT5677_I2C_MASTER_CTRL4 , 0x0000},
121 {RT5677_I2C_MASTER_CTRL5 , 0x0000},
122 {RT5677_I2C_MASTER_CTRL6 , 0x0000},
123 {RT5677_I2C_MASTER_CTRL7 , 0x0000},
124 {RT5677_I2C_MASTER_CTRL8 , 0x0000},
125 {RT5677_DMIC_CTRL1 , 0x1505},
126 {RT5677_DMIC_CTRL2 , 0x0055},
127 {RT5677_HAP_GENE_CTRL1 , 0x0111},
128 {RT5677_HAP_GENE_CTRL2 , 0x0064},
129 {RT5677_HAP_GENE_CTRL3 , 0xef0e},
130 {RT5677_HAP_GENE_CTRL4 , 0xf0f0},
131 {RT5677_HAP_GENE_CTRL5 , 0xef0e},
132 {RT5677_HAP_GENE_CTRL6 , 0xf0f0},
133 {RT5677_HAP_GENE_CTRL7 , 0xef0e},
134 {RT5677_HAP_GENE_CTRL8 , 0xf0f0},
135 {RT5677_HAP_GENE_CTRL9 , 0xf000},
136 {RT5677_HAP_GENE_CTRL10 , 0x0000},
137 {RT5677_PWR_DIG1 , 0x0000},
138 {RT5677_PWR_DIG2 , 0x0000},
139 {RT5677_PWR_ANLG1 , 0x0055},
140 {RT5677_PWR_ANLG2 , 0x0000},
141 {RT5677_PWR_DSP1 , 0x0001},
142 {RT5677_PWR_DSP_ST , 0x0000},
143 {RT5677_PWR_DSP2 , 0x0000},
144 {RT5677_ADC_DAC_HPF_CTRL1 , 0x0e00},
145 {RT5677_PRIV_INDEX , 0x0000},
146 {RT5677_PRIV_DATA , 0x0000},
147 {RT5677_I2S4_SDP , 0x8000},
148 {RT5677_I2S1_SDP , 0x8000},
149 {RT5677_I2S2_SDP , 0x8000},
150 {RT5677_I2S3_SDP , 0x8000},
151 {RT5677_CLK_TREE_CTRL1 , 0x1111},
152 {RT5677_CLK_TREE_CTRL2 , 0x1111},
153 {RT5677_CLK_TREE_CTRL3 , 0x0000},
154 {RT5677_PLL1_CTRL1 , 0x0000},
155 {RT5677_PLL1_CTRL2 , 0x0000},
156 {RT5677_PLL2_CTRL1 , 0x0c60},
157 {RT5677_PLL2_CTRL2 , 0x2000},
158 {RT5677_GLB_CLK1 , 0x0000},
159 {RT5677_GLB_CLK2 , 0x0000},
160 {RT5677_ASRC_1 , 0x0000},
161 {RT5677_ASRC_2 , 0x0000},
162 {RT5677_ASRC_3 , 0x0000},
163 {RT5677_ASRC_4 , 0x0000},
164 {RT5677_ASRC_5 , 0x0000},
165 {RT5677_ASRC_6 , 0x0000},
166 {RT5677_ASRC_7 , 0x0000},
167 {RT5677_ASRC_8 , 0x0000},
168 {RT5677_ASRC_9 , 0x0000},
169 {RT5677_ASRC_10 , 0x0000},
170 {RT5677_ASRC_11 , 0x0000},
171 {RT5677_ASRC_12 , 0x0008},
172 {RT5677_ASRC_13 , 0x0000},
173 {RT5677_ASRC_14 , 0x0000},
174 {RT5677_ASRC_15 , 0x0000},
175 {RT5677_ASRC_16 , 0x0000},
176 {RT5677_ASRC_17 , 0x0000},
177 {RT5677_ASRC_18 , 0x0000},
178 {RT5677_ASRC_19 , 0x0000},
179 {RT5677_ASRC_20 , 0x0000},
180 {RT5677_ASRC_21 , 0x000c},
181 {RT5677_ASRC_22 , 0x0000},
182 {RT5677_ASRC_23 , 0x0000},
183 {RT5677_VAD_CTRL1 , 0x2184},
184 {RT5677_VAD_CTRL2 , 0x010a},
185 {RT5677_VAD_CTRL3 , 0x0aea},
186 {RT5677_VAD_CTRL4 , 0x000c},
187 {RT5677_VAD_CTRL5 , 0x0000},
188 {RT5677_DSP_INB_CTRL1 , 0x0000},
189 {RT5677_DSP_INB_CTRL2 , 0x0000},
190 {RT5677_DSP_IN_OUTB_CTRL , 0x0000},
191 {RT5677_DSP_OUTB0_1_DIG_VOL , 0x2f2f},
192 {RT5677_DSP_OUTB2_3_DIG_VOL , 0x2f2f},
193 {RT5677_DSP_OUTB4_5_DIG_VOL , 0x2f2f},
194 {RT5677_DSP_OUTB6_7_DIG_VOL , 0x2f2f},
195 {RT5677_ADC_EQ_CTRL1 , 0x6000},
196 {RT5677_ADC_EQ_CTRL2 , 0x0000},
197 {RT5677_EQ_CTRL1 , 0xc000},
198 {RT5677_EQ_CTRL2 , 0x0000},
199 {RT5677_EQ_CTRL3 , 0x0000},
200 {RT5677_SOFT_VOL_ZERO_CROSS1 , 0x0009},
201 {RT5677_JD_CTRL1 , 0x0000},
202 {RT5677_JD_CTRL2 , 0x0000},
203 {RT5677_JD_CTRL3 , 0x0000},
204 {RT5677_IRQ_CTRL1 , 0x0000},
205 {RT5677_IRQ_CTRL2 , 0x0000},
206 {RT5677_GPIO_ST , 0x0000},
207 {RT5677_GPIO_CTRL1 , 0x0000},
208 {RT5677_GPIO_CTRL2 , 0x0000},
209 {RT5677_GPIO_CTRL3 , 0x0000},
210 {RT5677_STO1_ADC_HI_FILTER1 , 0xb320},
211 {RT5677_STO1_ADC_HI_FILTER2 , 0x0000},
212 {RT5677_MONO_ADC_HI_FILTER1 , 0xb300},
213 {RT5677_MONO_ADC_HI_FILTER2 , 0x0000},
214 {RT5677_STO2_ADC_HI_FILTER1 , 0xb300},
215 {RT5677_STO2_ADC_HI_FILTER2 , 0x0000},
216 {RT5677_STO3_ADC_HI_FILTER1 , 0xb300},
217 {RT5677_STO3_ADC_HI_FILTER2 , 0x0000},
218 {RT5677_STO4_ADC_HI_FILTER1 , 0xb300},
219 {RT5677_STO4_ADC_HI_FILTER2 , 0x0000},
220 {RT5677_MB_DRC_CTRL1 , 0x0f20},
221 {RT5677_DRC1_CTRL1 , 0x001f},
222 {RT5677_DRC1_CTRL2 , 0x020c},
223 {RT5677_DRC1_CTRL3 , 0x1f00},
224 {RT5677_DRC1_CTRL4 , 0x0000},
225 {RT5677_DRC1_CTRL5 , 0x0000},
226 {RT5677_DRC1_CTRL6 , 0x0029},
227 {RT5677_DRC2_CTRL1 , 0x001f},
228 {RT5677_DRC2_CTRL2 , 0x020c},
229 {RT5677_DRC2_CTRL3 , 0x1f00},
230 {RT5677_DRC2_CTRL4 , 0x0000},
231 {RT5677_DRC2_CTRL5 , 0x0000},
232 {RT5677_DRC2_CTRL6 , 0x0029},
233 {RT5677_DRC1_HL_CTRL1 , 0x8000},
234 {RT5677_DRC1_HL_CTRL2 , 0x0200},
235 {RT5677_DRC2_HL_CTRL1 , 0x8000},
236 {RT5677_DRC2_HL_CTRL2 , 0x0200},
237 {RT5677_DSP_INB1_SRC_CTRL1 , 0x5800},
238 {RT5677_DSP_INB1_SRC_CTRL2 , 0x0000},
239 {RT5677_DSP_INB1_SRC_CTRL3 , 0x0000},
240 {RT5677_DSP_INB1_SRC_CTRL4 , 0x0800},
241 {RT5677_DSP_INB2_SRC_CTRL1 , 0x5800},
242 {RT5677_DSP_INB2_SRC_CTRL2 , 0x0000},
243 {RT5677_DSP_INB2_SRC_CTRL3 , 0x0000},
244 {RT5677_DSP_INB2_SRC_CTRL4 , 0x0800},
245 {RT5677_DSP_INB3_SRC_CTRL1 , 0x5800},
246 {RT5677_DSP_INB3_SRC_CTRL2 , 0x0000},
247 {RT5677_DSP_INB3_SRC_CTRL3 , 0x0000},
248 {RT5677_DSP_INB3_SRC_CTRL4 , 0x0800},
249 {RT5677_DSP_OUTB1_SRC_CTRL1 , 0x5800},
250 {RT5677_DSP_OUTB1_SRC_CTRL2 , 0x0000},
251 {RT5677_DSP_OUTB1_SRC_CTRL3 , 0x0000},
252 {RT5677_DSP_OUTB1_SRC_CTRL4 , 0x0800},
253 {RT5677_DSP_OUTB2_SRC_CTRL1 , 0x5800},
254 {RT5677_DSP_OUTB2_SRC_CTRL2 , 0x0000},
255 {RT5677_DSP_OUTB2_SRC_CTRL3 , 0x0000},
256 {RT5677_DSP_OUTB2_SRC_CTRL4 , 0x0800},
257 {RT5677_DSP_OUTB_0123_MIXER_CTRL, 0xfefe},
258 {RT5677_DSP_OUTB_45_MIXER_CTRL , 0xfefe},
259 {RT5677_DSP_OUTB_67_MIXER_CTRL , 0xfefe},
260 {RT5677_DIG_MISC , 0x0000},
261 {RT5677_GEN_CTRL1 , 0x0000},
262 {RT5677_GEN_CTRL2 , 0x0000},
263 {RT5677_VENDOR_ID , 0x0000},
264 {RT5677_VENDOR_ID1 , 0x10ec},
265 {RT5677_VENDOR_ID2 , 0x6327},
266};
267
268static bool rt5677_volatile_register(struct device *dev, unsigned int reg)
269{
270 int i;
271
272 for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) {
273 if (reg >= rt5677_ranges[i].range_min &&
274 reg <= rt5677_ranges[i].range_max) {
275 return true;
276 }
277 }
278
279 switch (reg) {
280 case RT5677_RESET:
281 case RT5677_SLIMBUS_PARAM:
282 case RT5677_PDM_DATA_CTRL1:
283 case RT5677_PDM_DATA_CTRL2:
284 case RT5677_PDM1_DATA_CTRL4:
285 case RT5677_PDM2_DATA_CTRL4:
286 case RT5677_I2C_MASTER_CTRL1:
287 case RT5677_I2C_MASTER_CTRL7:
288 case RT5677_I2C_MASTER_CTRL8:
289 case RT5677_HAP_GENE_CTRL2:
290 case RT5677_PWR_DSP_ST:
291 case RT5677_PRIV_DATA:
292 case RT5677_PLL1_CTRL2:
293 case RT5677_PLL2_CTRL2:
294 case RT5677_ASRC_22:
295 case RT5677_ASRC_23:
296 case RT5677_VAD_CTRL5:
297 case RT5677_ADC_EQ_CTRL1:
298 case RT5677_EQ_CTRL1:
299 case RT5677_IRQ_CTRL1:
300 case RT5677_IRQ_CTRL2:
301 case RT5677_GPIO_ST:
302 case RT5677_DSP_INB1_SRC_CTRL4:
303 case RT5677_DSP_INB2_SRC_CTRL4:
304 case RT5677_DSP_INB3_SRC_CTRL4:
305 case RT5677_DSP_OUTB1_SRC_CTRL4:
306 case RT5677_DSP_OUTB2_SRC_CTRL4:
307 case RT5677_VENDOR_ID:
308 case RT5677_VENDOR_ID1:
309 case RT5677_VENDOR_ID2:
310 return true;
311 default:
312 return false;
313 }
314}
315
316static bool rt5677_readable_register(struct device *dev, unsigned int reg)
317{
318 int i;
319
320 for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) {
321 if (reg >= rt5677_ranges[i].range_min &&
322 reg <= rt5677_ranges[i].range_max) {
323 return true;
324 }
325 }
326
327 switch (reg) {
328 case RT5677_RESET:
329 case RT5677_LOUT1:
330 case RT5677_IN1:
331 case RT5677_MICBIAS:
332 case RT5677_SLIMBUS_PARAM:
333 case RT5677_SLIMBUS_RX:
334 case RT5677_SLIMBUS_CTRL:
335 case RT5677_SIDETONE_CTRL:
336 case RT5677_ANA_DAC1_2_3_SRC:
337 case RT5677_IF_DSP_DAC3_4_MIXER:
338 case RT5677_DAC4_DIG_VOL:
339 case RT5677_DAC3_DIG_VOL:
340 case RT5677_DAC1_DIG_VOL:
341 case RT5677_DAC2_DIG_VOL:
342 case RT5677_IF_DSP_DAC2_MIXER:
343 case RT5677_STO1_ADC_DIG_VOL:
344 case RT5677_MONO_ADC_DIG_VOL:
345 case RT5677_STO1_2_ADC_BST:
346 case RT5677_STO2_ADC_DIG_VOL:
347 case RT5677_ADC_BST_CTRL2:
348 case RT5677_STO3_4_ADC_BST:
349 case RT5677_STO3_ADC_DIG_VOL:
350 case RT5677_STO4_ADC_DIG_VOL:
351 case RT5677_STO4_ADC_MIXER:
352 case RT5677_STO3_ADC_MIXER:
353 case RT5677_STO2_ADC_MIXER:
354 case RT5677_STO1_ADC_MIXER:
355 case RT5677_MONO_ADC_MIXER:
356 case RT5677_ADC_IF_DSP_DAC1_MIXER:
357 case RT5677_STO1_DAC_MIXER:
358 case RT5677_MONO_DAC_MIXER:
359 case RT5677_DD1_MIXER:
360 case RT5677_DD2_MIXER:
361 case RT5677_IF3_DATA:
362 case RT5677_IF4_DATA:
363 case RT5677_PDM_OUT_CTRL:
364 case RT5677_PDM_DATA_CTRL1:
365 case RT5677_PDM_DATA_CTRL2:
366 case RT5677_PDM1_DATA_CTRL2:
367 case RT5677_PDM1_DATA_CTRL3:
368 case RT5677_PDM1_DATA_CTRL4:
369 case RT5677_PDM2_DATA_CTRL2:
370 case RT5677_PDM2_DATA_CTRL3:
371 case RT5677_PDM2_DATA_CTRL4:
372 case RT5677_TDM1_CTRL1:
373 case RT5677_TDM1_CTRL2:
374 case RT5677_TDM1_CTRL3:
375 case RT5677_TDM1_CTRL4:
376 case RT5677_TDM1_CTRL5:
377 case RT5677_TDM2_CTRL1:
378 case RT5677_TDM2_CTRL2:
379 case RT5677_TDM2_CTRL3:
380 case RT5677_TDM2_CTRL4:
381 case RT5677_TDM2_CTRL5:
382 case RT5677_I2C_MASTER_CTRL1:
383 case RT5677_I2C_MASTER_CTRL2:
384 case RT5677_I2C_MASTER_CTRL3:
385 case RT5677_I2C_MASTER_CTRL4:
386 case RT5677_I2C_MASTER_CTRL5:
387 case RT5677_I2C_MASTER_CTRL6:
388 case RT5677_I2C_MASTER_CTRL7:
389 case RT5677_I2C_MASTER_CTRL8:
390 case RT5677_DMIC_CTRL1:
391 case RT5677_DMIC_CTRL2:
392 case RT5677_HAP_GENE_CTRL1:
393 case RT5677_HAP_GENE_CTRL2:
394 case RT5677_HAP_GENE_CTRL3:
395 case RT5677_HAP_GENE_CTRL4:
396 case RT5677_HAP_GENE_CTRL5:
397 case RT5677_HAP_GENE_CTRL6:
398 case RT5677_HAP_GENE_CTRL7:
399 case RT5677_HAP_GENE_CTRL8:
400 case RT5677_HAP_GENE_CTRL9:
401 case RT5677_HAP_GENE_CTRL10:
402 case RT5677_PWR_DIG1:
403 case RT5677_PWR_DIG2:
404 case RT5677_PWR_ANLG1:
405 case RT5677_PWR_ANLG2:
406 case RT5677_PWR_DSP1:
407 case RT5677_PWR_DSP_ST:
408 case RT5677_PWR_DSP2:
409 case RT5677_ADC_DAC_HPF_CTRL1:
410 case RT5677_PRIV_INDEX:
411 case RT5677_PRIV_DATA:
412 case RT5677_I2S4_SDP:
413 case RT5677_I2S1_SDP:
414 case RT5677_I2S2_SDP:
415 case RT5677_I2S3_SDP:
416 case RT5677_CLK_TREE_CTRL1:
417 case RT5677_CLK_TREE_CTRL2:
418 case RT5677_CLK_TREE_CTRL3:
419 case RT5677_PLL1_CTRL1:
420 case RT5677_PLL1_CTRL2:
421 case RT5677_PLL2_CTRL1:
422 case RT5677_PLL2_CTRL2:
423 case RT5677_GLB_CLK1:
424 case RT5677_GLB_CLK2:
425 case RT5677_ASRC_1:
426 case RT5677_ASRC_2:
427 case RT5677_ASRC_3:
428 case RT5677_ASRC_4:
429 case RT5677_ASRC_5:
430 case RT5677_ASRC_6:
431 case RT5677_ASRC_7:
432 case RT5677_ASRC_8:
433 case RT5677_ASRC_9:
434 case RT5677_ASRC_10:
435 case RT5677_ASRC_11:
436 case RT5677_ASRC_12:
437 case RT5677_ASRC_13:
438 case RT5677_ASRC_14:
439 case RT5677_ASRC_15:
440 case RT5677_ASRC_16:
441 case RT5677_ASRC_17:
442 case RT5677_ASRC_18:
443 case RT5677_ASRC_19:
444 case RT5677_ASRC_20:
445 case RT5677_ASRC_21:
446 case RT5677_ASRC_22:
447 case RT5677_ASRC_23:
448 case RT5677_VAD_CTRL1:
449 case RT5677_VAD_CTRL2:
450 case RT5677_VAD_CTRL3:
451 case RT5677_VAD_CTRL4:
452 case RT5677_VAD_CTRL5:
453 case RT5677_DSP_INB_CTRL1:
454 case RT5677_DSP_INB_CTRL2:
455 case RT5677_DSP_IN_OUTB_CTRL:
456 case RT5677_DSP_OUTB0_1_DIG_VOL:
457 case RT5677_DSP_OUTB2_3_DIG_VOL:
458 case RT5677_DSP_OUTB4_5_DIG_VOL:
459 case RT5677_DSP_OUTB6_7_DIG_VOL:
460 case RT5677_ADC_EQ_CTRL1:
461 case RT5677_ADC_EQ_CTRL2:
462 case RT5677_EQ_CTRL1:
463 case RT5677_EQ_CTRL2:
464 case RT5677_EQ_CTRL3:
465 case RT5677_SOFT_VOL_ZERO_CROSS1:
466 case RT5677_JD_CTRL1:
467 case RT5677_JD_CTRL2:
468 case RT5677_JD_CTRL3:
469 case RT5677_IRQ_CTRL1:
470 case RT5677_IRQ_CTRL2:
471 case RT5677_GPIO_ST:
472 case RT5677_GPIO_CTRL1:
473 case RT5677_GPIO_CTRL2:
474 case RT5677_GPIO_CTRL3:
475 case RT5677_STO1_ADC_HI_FILTER1:
476 case RT5677_STO1_ADC_HI_FILTER2:
477 case RT5677_MONO_ADC_HI_FILTER1:
478 case RT5677_MONO_ADC_HI_FILTER2:
479 case RT5677_STO2_ADC_HI_FILTER1:
480 case RT5677_STO2_ADC_HI_FILTER2:
481 case RT5677_STO3_ADC_HI_FILTER1:
482 case RT5677_STO3_ADC_HI_FILTER2:
483 case RT5677_STO4_ADC_HI_FILTER1:
484 case RT5677_STO4_ADC_HI_FILTER2:
485 case RT5677_MB_DRC_CTRL1:
486 case RT5677_DRC1_CTRL1:
487 case RT5677_DRC1_CTRL2:
488 case RT5677_DRC1_CTRL3:
489 case RT5677_DRC1_CTRL4:
490 case RT5677_DRC1_CTRL5:
491 case RT5677_DRC1_CTRL6:
492 case RT5677_DRC2_CTRL1:
493 case RT5677_DRC2_CTRL2:
494 case RT5677_DRC2_CTRL3:
495 case RT5677_DRC2_CTRL4:
496 case RT5677_DRC2_CTRL5:
497 case RT5677_DRC2_CTRL6:
498 case RT5677_DRC1_HL_CTRL1:
499 case RT5677_DRC1_HL_CTRL2:
500 case RT5677_DRC2_HL_CTRL1:
501 case RT5677_DRC2_HL_CTRL2:
502 case RT5677_DSP_INB1_SRC_CTRL1:
503 case RT5677_DSP_INB1_SRC_CTRL2:
504 case RT5677_DSP_INB1_SRC_CTRL3:
505 case RT5677_DSP_INB1_SRC_CTRL4:
506 case RT5677_DSP_INB2_SRC_CTRL1:
507 case RT5677_DSP_INB2_SRC_CTRL2:
508 case RT5677_DSP_INB2_SRC_CTRL3:
509 case RT5677_DSP_INB2_SRC_CTRL4:
510 case RT5677_DSP_INB3_SRC_CTRL1:
511 case RT5677_DSP_INB3_SRC_CTRL2:
512 case RT5677_DSP_INB3_SRC_CTRL3:
513 case RT5677_DSP_INB3_SRC_CTRL4:
514 case RT5677_DSP_OUTB1_SRC_CTRL1:
515 case RT5677_DSP_OUTB1_SRC_CTRL2:
516 case RT5677_DSP_OUTB1_SRC_CTRL3:
517 case RT5677_DSP_OUTB1_SRC_CTRL4:
518 case RT5677_DSP_OUTB2_SRC_CTRL1:
519 case RT5677_DSP_OUTB2_SRC_CTRL2:
520 case RT5677_DSP_OUTB2_SRC_CTRL3:
521 case RT5677_DSP_OUTB2_SRC_CTRL4:
522 case RT5677_DSP_OUTB_0123_MIXER_CTRL:
523 case RT5677_DSP_OUTB_45_MIXER_CTRL:
524 case RT5677_DSP_OUTB_67_MIXER_CTRL:
525 case RT5677_DIG_MISC:
526 case RT5677_GEN_CTRL1:
527 case RT5677_GEN_CTRL2:
528 case RT5677_VENDOR_ID:
529 case RT5677_VENDOR_ID1:
530 case RT5677_VENDOR_ID2:
531 return true;
532 default:
533 return false;
534 }
535}
536
537static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
538static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
539static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
540static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
541static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
542
543/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
544static unsigned int bst_tlv[] = {
545 TLV_DB_RANGE_HEAD(7),
546 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
547 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
548 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
549 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
550 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
551 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
552 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
553};
554
555static const struct snd_kcontrol_new rt5677_snd_controls[] = {
556 /* OUTPUT Control */
557 SOC_SINGLE("OUT1 Playback Switch", RT5677_LOUT1,
558 RT5677_LOUT1_L_MUTE_SFT, 1, 1),
559 SOC_SINGLE("OUT2 Playback Switch", RT5677_LOUT1,
560 RT5677_LOUT2_L_MUTE_SFT, 1, 1),
561 SOC_SINGLE("OUT3 Playback Switch", RT5677_LOUT1,
562 RT5677_LOUT3_L_MUTE_SFT, 1, 1),
563
564 /* DAC Digital Volume */
565 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5677_DAC1_DIG_VOL,
566 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 175, 0, dac_vol_tlv),
567 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5677_DAC2_DIG_VOL,
568 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 175, 0, dac_vol_tlv),
569 SOC_DOUBLE_TLV("DAC3 Playback Volume", RT5677_DAC3_DIG_VOL,
570 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 175, 0, dac_vol_tlv),
571 SOC_DOUBLE_TLV("DAC4 Playback Volume", RT5677_DAC4_DIG_VOL,
572 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 175, 0, dac_vol_tlv),
573
574 /* IN1/IN2 Control */
575 SOC_SINGLE_TLV("IN1 Boost", RT5677_IN1, RT5677_BST_SFT1, 8, 0, bst_tlv),
576 SOC_SINGLE_TLV("IN2 Boost", RT5677_IN1, RT5677_BST_SFT2, 8, 0, bst_tlv),
577
578 /* ADC Digital Volume Control */
579 SOC_DOUBLE("ADC1 Capture Switch", RT5677_STO1_ADC_DIG_VOL,
580 RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
581 SOC_DOUBLE("ADC2 Capture Switch", RT5677_STO2_ADC_DIG_VOL,
582 RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
583 SOC_DOUBLE("ADC3 Capture Switch", RT5677_STO3_ADC_DIG_VOL,
584 RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
585 SOC_DOUBLE("ADC4 Capture Switch", RT5677_STO4_ADC_DIG_VOL,
586 RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
587 SOC_DOUBLE("Mono ADC Capture Switch", RT5677_MONO_ADC_DIG_VOL,
588 RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
589
590 SOC_DOUBLE_TLV("ADC1 Capture Volume", RT5677_STO1_ADC_DIG_VOL,
591 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 127, 0,
592 adc_vol_tlv),
593 SOC_DOUBLE_TLV("ADC2 Capture Volume", RT5677_STO2_ADC_DIG_VOL,
594 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 127, 0,
595 adc_vol_tlv),
596 SOC_DOUBLE_TLV("ADC3 Capture Volume", RT5677_STO3_ADC_DIG_VOL,
597 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 127, 0,
598 adc_vol_tlv),
599 SOC_DOUBLE_TLV("ADC4 Capture Volume", RT5677_STO4_ADC_DIG_VOL,
600 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 127, 0,
601 adc_vol_tlv),
602 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5677_MONO_ADC_DIG_VOL,
603 RT5677_MONO_ADC_L_VOL_SFT, RT5677_MONO_ADC_R_VOL_SFT, 127, 0,
604 adc_vol_tlv),
605
606 /* ADC Boost Volume Control */
607 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5677_STO1_2_ADC_BST,
608 RT5677_STO1_ADC_L_BST_SFT, RT5677_STO1_ADC_R_BST_SFT, 3, 0,
609 adc_bst_tlv),
610 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5677_STO1_2_ADC_BST,
611 RT5677_STO2_ADC_L_BST_SFT, RT5677_STO2_ADC_R_BST_SFT, 3, 0,
612 adc_bst_tlv),
613 SOC_DOUBLE_TLV("STO3 ADC Boost Gain", RT5677_STO3_4_ADC_BST,
614 RT5677_STO3_ADC_L_BST_SFT, RT5677_STO3_ADC_R_BST_SFT, 3, 0,
615 adc_bst_tlv),
616 SOC_DOUBLE_TLV("STO4 ADC Boost Gain", RT5677_STO3_4_ADC_BST,
617 RT5677_STO4_ADC_L_BST_SFT, RT5677_STO4_ADC_R_BST_SFT, 3, 0,
618 adc_bst_tlv),
619 SOC_DOUBLE_TLV("Mono ADC Boost Gain", RT5677_ADC_BST_CTRL2,
620 RT5677_MONO_ADC_L_BST_SFT, RT5677_MONO_ADC_R_BST_SFT, 3, 0,
621 adc_bst_tlv),
622};
623
624/**
625 * set_dmic_clk - Set parameter of dmic.
626 *
627 * @w: DAPM widget.
628 * @kcontrol: The kcontrol of this widget.
629 * @event: Event id.
630 *
631 * Choose dmic clock between 1MHz and 3MHz.
632 * It is better for clock to approximate 3MHz.
633 */
634static int set_dmic_clk(struct snd_soc_dapm_widget *w,
635 struct snd_kcontrol *kcontrol, int event)
636{
637 struct snd_soc_codec *codec = w->codec;
638 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
639 int div[] = {2, 3, 4, 6, 8, 12}, idx = -EINVAL, i;
640 int rate, red, bound, temp;
641
642 rate = rt5677->sysclk;
643 red = 3000000 * 12;
644 for (i = 0; i < ARRAY_SIZE(div); i++) {
645 bound = div[i] * 3000000;
646 if (rate > bound)
647 continue;
648 temp = bound - rate;
649 if (temp < red) {
650 red = temp;
651 idx = i;
652 }
653 }
654
655 if (idx < 0)
656 dev_err(codec->dev, "Failed to set DMIC clock\n");
657 else
658 regmap_update_bits(rt5677->regmap, RT5677_DMIC_CTRL1,
659 RT5677_DMIC_CLK_MASK, idx << RT5677_DMIC_CLK_SFT);
660 return idx;
661}
662
663static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
664 struct snd_soc_dapm_widget *sink)
665{
666 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(source->codec);
667 unsigned int val;
668
669 regmap_read(rt5677->regmap, RT5677_GLB_CLK1, &val);
670 val &= RT5677_SCLK_SRC_MASK;
671 if (val == RT5677_SCLK_SRC_PLL1)
672 return 1;
673 else
674 return 0;
675}
676
677/* Digital Mixer */
678static const struct snd_kcontrol_new rt5677_sto1_adc_l_mix[] = {
679 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO1_ADC_MIXER,
680 RT5677_M_STO1_ADC_L1_SFT, 1, 1),
681 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO1_ADC_MIXER,
682 RT5677_M_STO1_ADC_L2_SFT, 1, 1),
683};
684
685static const struct snd_kcontrol_new rt5677_sto1_adc_r_mix[] = {
686 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO1_ADC_MIXER,
687 RT5677_M_STO1_ADC_R1_SFT, 1, 1),
688 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO1_ADC_MIXER,
689 RT5677_M_STO1_ADC_R2_SFT, 1, 1),
690};
691
692static const struct snd_kcontrol_new rt5677_sto2_adc_l_mix[] = {
693 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO2_ADC_MIXER,
694 RT5677_M_STO2_ADC_L1_SFT, 1, 1),
695 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO2_ADC_MIXER,
696 RT5677_M_STO2_ADC_L2_SFT, 1, 1),
697};
698
699static const struct snd_kcontrol_new rt5677_sto2_adc_r_mix[] = {
700 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO2_ADC_MIXER,
701 RT5677_M_STO2_ADC_R1_SFT, 1, 1),
702 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO2_ADC_MIXER,
703 RT5677_M_STO2_ADC_R2_SFT, 1, 1),
704};
705
706static const struct snd_kcontrol_new rt5677_sto3_adc_l_mix[] = {
707 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO3_ADC_MIXER,
708 RT5677_M_STO3_ADC_L1_SFT, 1, 1),
709 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO3_ADC_MIXER,
710 RT5677_M_STO3_ADC_L2_SFT, 1, 1),
711};
712
713static const struct snd_kcontrol_new rt5677_sto3_adc_r_mix[] = {
714 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO3_ADC_MIXER,
715 RT5677_M_STO3_ADC_R1_SFT, 1, 1),
716 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO3_ADC_MIXER,
717 RT5677_M_STO3_ADC_R2_SFT, 1, 1),
718};
719
720static const struct snd_kcontrol_new rt5677_sto4_adc_l_mix[] = {
721 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO4_ADC_MIXER,
722 RT5677_M_STO4_ADC_L1_SFT, 1, 1),
723 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO4_ADC_MIXER,
724 RT5677_M_STO4_ADC_L2_SFT, 1, 1),
725};
726
727static const struct snd_kcontrol_new rt5677_sto4_adc_r_mix[] = {
728 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_STO4_ADC_MIXER,
729 RT5677_M_STO4_ADC_R1_SFT, 1, 1),
730 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_STO4_ADC_MIXER,
731 RT5677_M_STO4_ADC_R2_SFT, 1, 1),
732};
733
734static const struct snd_kcontrol_new rt5677_mono_adc_l_mix[] = {
735 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_MONO_ADC_MIXER,
736 RT5677_M_MONO_ADC_L1_SFT, 1, 1),
737 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_MONO_ADC_MIXER,
738 RT5677_M_MONO_ADC_L2_SFT, 1, 1),
739};
740
741static const struct snd_kcontrol_new rt5677_mono_adc_r_mix[] = {
742 SOC_DAPM_SINGLE("ADC1 Switch", RT5677_MONO_ADC_MIXER,
743 RT5677_M_MONO_ADC_R1_SFT, 1, 1),
744 SOC_DAPM_SINGLE("ADC2 Switch", RT5677_MONO_ADC_MIXER,
745 RT5677_M_MONO_ADC_R2_SFT, 1, 1),
746};
747
748static const struct snd_kcontrol_new rt5677_dac_l_mix[] = {
749 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5677_ADC_IF_DSP_DAC1_MIXER,
750 RT5677_M_ADDA_MIXER1_L_SFT, 1, 1),
751 SOC_DAPM_SINGLE("DAC1 Switch", RT5677_ADC_IF_DSP_DAC1_MIXER,
752 RT5677_M_DAC1_L_SFT, 1, 1),
753};
754
755static const struct snd_kcontrol_new rt5677_dac_r_mix[] = {
756 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5677_ADC_IF_DSP_DAC1_MIXER,
757 RT5677_M_ADDA_MIXER1_R_SFT, 1, 1),
758 SOC_DAPM_SINGLE("DAC1 Switch", RT5677_ADC_IF_DSP_DAC1_MIXER,
759 RT5677_M_DAC1_R_SFT, 1, 1),
760};
761
762static const struct snd_kcontrol_new rt5677_sto1_dac_l_mix[] = {
763 SOC_DAPM_SINGLE("ST L Switch", RT5677_STO1_DAC_MIXER,
764 RT5677_M_ST_DAC1_L_SFT, 1, 1),
765 SOC_DAPM_SINGLE("DAC1 L Switch", RT5677_STO1_DAC_MIXER,
766 RT5677_M_DAC1_L_STO_L_SFT, 1, 1),
767 SOC_DAPM_SINGLE("DAC2 L Switch", RT5677_STO1_DAC_MIXER,
768 RT5677_M_DAC2_L_STO_L_SFT, 1, 1),
769 SOC_DAPM_SINGLE("DAC1 R Switch", RT5677_STO1_DAC_MIXER,
770 RT5677_M_DAC1_R_STO_L_SFT, 1, 1),
771};
772
773static const struct snd_kcontrol_new rt5677_sto1_dac_r_mix[] = {
774 SOC_DAPM_SINGLE("ST R Switch", RT5677_STO1_DAC_MIXER,
775 RT5677_M_ST_DAC1_R_SFT, 1, 1),
776 SOC_DAPM_SINGLE("DAC1 R Switch", RT5677_STO1_DAC_MIXER,
777 RT5677_M_DAC1_R_STO_R_SFT, 1, 1),
778 SOC_DAPM_SINGLE("DAC2 R Switch", RT5677_STO1_DAC_MIXER,
779 RT5677_M_DAC2_R_STO_R_SFT, 1, 1),
780 SOC_DAPM_SINGLE("DAC1 L Switch", RT5677_STO1_DAC_MIXER,
781 RT5677_M_DAC1_L_STO_R_SFT, 1, 1),
782};
783
784static const struct snd_kcontrol_new rt5677_mono_dac_l_mix[] = {
785 SOC_DAPM_SINGLE("ST L Switch", RT5677_MONO_DAC_MIXER,
786 RT5677_M_ST_DAC2_L_SFT, 1, 1),
787 SOC_DAPM_SINGLE("DAC1 L Switch", RT5677_MONO_DAC_MIXER,
788 RT5677_M_DAC1_L_MONO_L_SFT, 1, 1),
789 SOC_DAPM_SINGLE("DAC2 L Switch", RT5677_MONO_DAC_MIXER,
790 RT5677_M_DAC2_L_MONO_L_SFT, 1, 1),
791 SOC_DAPM_SINGLE("DAC2 R Switch", RT5677_MONO_DAC_MIXER,
792 RT5677_M_DAC2_R_MONO_L_SFT, 1, 1),
793};
794
795static const struct snd_kcontrol_new rt5677_mono_dac_r_mix[] = {
796 SOC_DAPM_SINGLE("ST R Switch", RT5677_MONO_DAC_MIXER,
797 RT5677_M_ST_DAC2_R_SFT, 1, 1),
798 SOC_DAPM_SINGLE("DAC1 R Switch", RT5677_MONO_DAC_MIXER,
799 RT5677_M_DAC1_R_MONO_R_SFT, 1, 1),
800 SOC_DAPM_SINGLE("DAC2 R Switch", RT5677_MONO_DAC_MIXER,
801 RT5677_M_DAC2_R_MONO_R_SFT, 1, 1),
802 SOC_DAPM_SINGLE("DAC2 L Switch", RT5677_MONO_DAC_MIXER,
803 RT5677_M_DAC2_L_MONO_R_SFT, 1, 1),
804};
805
806static const struct snd_kcontrol_new rt5677_dd1_l_mix[] = {
807 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5677_DD1_MIXER,
808 RT5677_M_STO_L_DD1_L_SFT, 1, 1),
809 SOC_DAPM_SINGLE("Mono DAC Mix L Switch", RT5677_DD1_MIXER,
810 RT5677_M_MONO_L_DD1_L_SFT, 1, 1),
811 SOC_DAPM_SINGLE("DAC3 L Switch", RT5677_DD1_MIXER,
812 RT5677_M_DAC3_L_DD1_L_SFT, 1, 1),
813 SOC_DAPM_SINGLE("DAC3 R Switch", RT5677_DD1_MIXER,
814 RT5677_M_DAC3_R_DD1_L_SFT, 1, 1),
815};
816
817static const struct snd_kcontrol_new rt5677_dd1_r_mix[] = {
818 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5677_DD1_MIXER,
819 RT5677_M_STO_R_DD1_R_SFT, 1, 1),
820 SOC_DAPM_SINGLE("Mono DAC Mix R Switch", RT5677_DD1_MIXER,
821 RT5677_M_MONO_R_DD1_R_SFT, 1, 1),
822 SOC_DAPM_SINGLE("DAC3 R Switch", RT5677_DD1_MIXER,
823 RT5677_M_DAC3_R_DD1_R_SFT, 1, 1),
824 SOC_DAPM_SINGLE("DAC3 L Switch", RT5677_DD1_MIXER,
825 RT5677_M_DAC3_L_DD1_R_SFT, 1, 1),
826};
827
828static const struct snd_kcontrol_new rt5677_dd2_l_mix[] = {
829 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5677_DD2_MIXER,
830 RT5677_M_STO_L_DD2_L_SFT, 1, 1),
831 SOC_DAPM_SINGLE("Mono DAC Mix L Switch", RT5677_DD2_MIXER,
832 RT5677_M_MONO_L_DD2_L_SFT, 1, 1),
833 SOC_DAPM_SINGLE("DAC4 L Switch", RT5677_DD2_MIXER,
834 RT5677_M_DAC4_L_DD2_L_SFT, 1, 1),
835 SOC_DAPM_SINGLE("DAC4 R Switch", RT5677_DD2_MIXER,
836 RT5677_M_DAC4_R_DD2_L_SFT, 1, 1),
837};
838
839static const struct snd_kcontrol_new rt5677_dd2_r_mix[] = {
840 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5677_DD2_MIXER,
841 RT5677_M_STO_R_DD2_R_SFT, 1, 1),
842 SOC_DAPM_SINGLE("Mono DAC Mix R Switch", RT5677_DD2_MIXER,
843 RT5677_M_MONO_R_DD2_R_SFT, 1, 1),
844 SOC_DAPM_SINGLE("DAC4 R Switch", RT5677_DD2_MIXER,
845 RT5677_M_DAC4_R_DD2_R_SFT, 1, 1),
846 SOC_DAPM_SINGLE("DAC4 L Switch", RT5677_DD2_MIXER,
847 RT5677_M_DAC4_L_DD2_R_SFT, 1, 1),
848};
849
850static const struct snd_kcontrol_new rt5677_ob_01_mix[] = {
851 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
852 RT5677_DSP_IB_01_H_SFT, 1, 1),
853 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
854 RT5677_DSP_IB_23_H_SFT, 1, 1),
855 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
856 RT5677_DSP_IB_45_H_SFT, 1, 1),
857 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
858 RT5677_DSP_IB_6_H_SFT, 1, 1),
859 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
860 RT5677_DSP_IB_7_H_SFT, 1, 1),
861 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
862 RT5677_DSP_IB_8_H_SFT, 1, 1),
863 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
864 RT5677_DSP_IB_9_H_SFT, 1, 1),
865};
866
867static const struct snd_kcontrol_new rt5677_ob_23_mix[] = {
868 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
869 RT5677_DSP_IB_01_L_SFT, 1, 1),
870 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
871 RT5677_DSP_IB_23_L_SFT, 1, 1),
872 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
873 RT5677_DSP_IB_45_L_SFT, 1, 1),
874 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
875 RT5677_DSP_IB_6_L_SFT, 1, 1),
876 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
877 RT5677_DSP_IB_7_L_SFT, 1, 1),
878 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
879 RT5677_DSP_IB_8_L_SFT, 1, 1),
880 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_0123_MIXER_CTRL,
881 RT5677_DSP_IB_9_L_SFT, 1, 1),
882};
883
884static const struct snd_kcontrol_new rt5677_ob_4_mix[] = {
885 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
886 RT5677_DSP_IB_01_H_SFT, 1, 1),
887 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
888 RT5677_DSP_IB_23_H_SFT, 1, 1),
889 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
890 RT5677_DSP_IB_45_H_SFT, 1, 1),
891 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
892 RT5677_DSP_IB_6_H_SFT, 1, 1),
893 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
894 RT5677_DSP_IB_7_H_SFT, 1, 1),
895 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
896 RT5677_DSP_IB_8_H_SFT, 1, 1),
897 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
898 RT5677_DSP_IB_9_H_SFT, 1, 1),
899};
900
901static const struct snd_kcontrol_new rt5677_ob_5_mix[] = {
902 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
903 RT5677_DSP_IB_01_L_SFT, 1, 1),
904 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
905 RT5677_DSP_IB_23_L_SFT, 1, 1),
906 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
907 RT5677_DSP_IB_45_L_SFT, 1, 1),
908 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
909 RT5677_DSP_IB_6_L_SFT, 1, 1),
910 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
911 RT5677_DSP_IB_7_L_SFT, 1, 1),
912 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
913 RT5677_DSP_IB_8_L_SFT, 1, 1),
914 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_45_MIXER_CTRL,
915 RT5677_DSP_IB_9_L_SFT, 1, 1),
916};
917
918static const struct snd_kcontrol_new rt5677_ob_6_mix[] = {
919 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
920 RT5677_DSP_IB_01_H_SFT, 1, 1),
921 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
922 RT5677_DSP_IB_23_H_SFT, 1, 1),
923 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
924 RT5677_DSP_IB_45_H_SFT, 1, 1),
925 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
926 RT5677_DSP_IB_6_H_SFT, 1, 1),
927 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
928 RT5677_DSP_IB_7_H_SFT, 1, 1),
929 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
930 RT5677_DSP_IB_8_H_SFT, 1, 1),
931 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
932 RT5677_DSP_IB_9_H_SFT, 1, 1),
933};
934
935static const struct snd_kcontrol_new rt5677_ob_7_mix[] = {
936 SOC_DAPM_SINGLE("IB01 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
937 RT5677_DSP_IB_01_L_SFT, 1, 1),
938 SOC_DAPM_SINGLE("IB23 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
939 RT5677_DSP_IB_23_L_SFT, 1, 1),
940 SOC_DAPM_SINGLE("IB45 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
941 RT5677_DSP_IB_45_L_SFT, 1, 1),
942 SOC_DAPM_SINGLE("IB6 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
943 RT5677_DSP_IB_6_L_SFT, 1, 1),
944 SOC_DAPM_SINGLE("IB7 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
945 RT5677_DSP_IB_7_L_SFT, 1, 1),
946 SOC_DAPM_SINGLE("IB8 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
947 RT5677_DSP_IB_8_L_SFT, 1, 1),
948 SOC_DAPM_SINGLE("IB9 Switch", RT5677_DSP_OUTB_67_MIXER_CTRL,
949 RT5677_DSP_IB_9_L_SFT, 1, 1),
950};
951
952
953/* Mux */
954/* DAC1 L/R source */ /* MX-29 [10:8] */
955static const char * const rt5677_dac1_src[] = {
956 "IF1 DAC 01", "IF2 DAC 01", "IF3 DAC LR", "IF4 DAC LR", "SLB DAC 01",
957 "OB 01"
958};
959
960static SOC_ENUM_SINGLE_DECL(
961 rt5677_dac1_enum, RT5677_ADC_IF_DSP_DAC1_MIXER,
962 RT5677_DAC1_L_SEL_SFT, rt5677_dac1_src);
963
964static const struct snd_kcontrol_new rt5677_dac1_mux =
965 SOC_DAPM_ENUM("DAC1 source", rt5677_dac1_enum);
966
967/* ADDA1 L/R source */ /* MX-29 [1:0] */
968static const char * const rt5677_adda1_src[] = {
969 "STO1 ADC MIX", "STO2 ADC MIX", "OB 67",
970};
971
972static SOC_ENUM_SINGLE_DECL(
973 rt5677_adda1_enum, RT5677_ADC_IF_DSP_DAC1_MIXER,
974 RT5677_ADDA1_SEL_SFT, rt5677_adda1_src);
975
976static const struct snd_kcontrol_new rt5677_adda1_mux =
977 SOC_DAPM_ENUM("ADDA1 source", rt5677_adda1_enum);
978
979
980/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
981static const char * const rt5677_dac2l_src[] = {
982 "IF1 DAC 2", "IF2 DAC 2", "IF3 DAC L", "IF4 DAC L", "SLB DAC 2",
983 "OB 2",
984};
985
986static SOC_ENUM_SINGLE_DECL(
987 rt5677_dac2l_enum, RT5677_IF_DSP_DAC2_MIXER,
988 RT5677_SEL_DAC2_L_SRC_SFT, rt5677_dac2l_src);
989
990static const struct snd_kcontrol_new rt5677_dac2_l_mux =
991 SOC_DAPM_ENUM("DAC2 L source", rt5677_dac2l_enum);
992
993static const char * const rt5677_dac2r_src[] = {
994 "IF1 DAC 3", "IF2 DAC 3", "IF3 DAC R", "IF4 DAC R", "SLB DAC 3",
995 "OB 3", "Haptic Generator", "VAD ADC"
996};
997
998static SOC_ENUM_SINGLE_DECL(
999 rt5677_dac2r_enum, RT5677_IF_DSP_DAC2_MIXER,
1000 RT5677_SEL_DAC2_R_SRC_SFT, rt5677_dac2r_src);
1001
1002static const struct snd_kcontrol_new rt5677_dac2_r_mux =
1003 SOC_DAPM_ENUM("DAC2 R source", rt5677_dac2r_enum);
1004
1005/*DAC3 L/R source*/ /* MX-16 [6:4] [2:0] */
1006static const char * const rt5677_dac3l_src[] = {
1007 "IF1 DAC 4", "IF2 DAC 4", "IF3 DAC L", "IF4 DAC L",
1008 "SLB DAC 4", "OB 4"
1009};
1010
1011static SOC_ENUM_SINGLE_DECL(
1012 rt5677_dac3l_enum, RT5677_IF_DSP_DAC3_4_MIXER,
1013 RT5677_SEL_DAC3_L_SRC_SFT, rt5677_dac3l_src);
1014
1015static const struct snd_kcontrol_new rt5677_dac3_l_mux =
1016 SOC_DAPM_ENUM("DAC3 L source", rt5677_dac3l_enum);
1017
1018static const char * const rt5677_dac3r_src[] = {
1019 "IF1 DAC 5", "IF2 DAC 5", "IF3 DAC R", "IF4 DAC R",
1020 "SLB DAC 5", "OB 5"
1021};
1022
1023static SOC_ENUM_SINGLE_DECL(
1024 rt5677_dac3r_enum, RT5677_IF_DSP_DAC3_4_MIXER,
1025 RT5677_SEL_DAC3_R_SRC_SFT, rt5677_dac3r_src);
1026
1027static const struct snd_kcontrol_new rt5677_dac3_r_mux =
1028 SOC_DAPM_ENUM("DAC3 R source", rt5677_dac3r_enum);
1029
1030/*DAC4 L/R source*/ /* MX-16 [14:12] [10:8] */
1031static const char * const rt5677_dac4l_src[] = {
1032 "IF1 DAC 6", "IF2 DAC 6", "IF3 DAC L", "IF4 DAC L",
1033 "SLB DAC 6", "OB 6"
1034};
1035
1036static SOC_ENUM_SINGLE_DECL(
1037 rt5677_dac4l_enum, RT5677_IF_DSP_DAC3_4_MIXER,
1038 RT5677_SEL_DAC4_L_SRC_SFT, rt5677_dac4l_src);
1039
1040static const struct snd_kcontrol_new rt5677_dac4_l_mux =
1041 SOC_DAPM_ENUM("DAC4 L source", rt5677_dac4l_enum);
1042
1043static const char * const rt5677_dac4r_src[] = {
1044 "IF1 DAC 7", "IF2 DAC 7", "IF3 DAC R", "IF4 DAC R",
1045 "SLB DAC 7", "OB 7"
1046};
1047
1048static SOC_ENUM_SINGLE_DECL(
1049 rt5677_dac4r_enum, RT5677_IF_DSP_DAC3_4_MIXER,
1050 RT5677_SEL_DAC4_R_SRC_SFT, rt5677_dac4r_src);
1051
1052static const struct snd_kcontrol_new rt5677_dac4_r_mux =
1053 SOC_DAPM_ENUM("DAC4 R source", rt5677_dac4r_enum);
1054
1055/* In/OutBound Source Pass SRC */ /* MX-A5 [3] [4] [0] [1] [2] */
1056static const char * const rt5677_iob_bypass_src[] = {
1057 "Bypass", "Pass SRC"
1058};
1059
1060static SOC_ENUM_SINGLE_DECL(
1061 rt5677_ob01_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL,
1062 RT5677_SEL_SRC_OB01_SFT, rt5677_iob_bypass_src);
1063
1064static const struct snd_kcontrol_new rt5677_ob01_bypass_src_mux =
1065 SOC_DAPM_ENUM("OB01 Bypass source", rt5677_ob01_bypass_src_enum);
1066
1067static SOC_ENUM_SINGLE_DECL(
1068 rt5677_ob23_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL,
1069 RT5677_SEL_SRC_OB23_SFT, rt5677_iob_bypass_src);
1070
1071static const struct snd_kcontrol_new rt5677_ob23_bypass_src_mux =
1072 SOC_DAPM_ENUM("OB23 Bypass source", rt5677_ob23_bypass_src_enum);
1073
1074static SOC_ENUM_SINGLE_DECL(
1075 rt5677_ib01_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL,
1076 RT5677_SEL_SRC_IB01_SFT, rt5677_iob_bypass_src);
1077
1078static const struct snd_kcontrol_new rt5677_ib01_bypass_src_mux =
1079 SOC_DAPM_ENUM("IB01 Bypass source", rt5677_ib01_bypass_src_enum);
1080
1081static SOC_ENUM_SINGLE_DECL(
1082 rt5677_ib23_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL,
1083 RT5677_SEL_SRC_IB23_SFT, rt5677_iob_bypass_src);
1084
1085static const struct snd_kcontrol_new rt5677_ib23_bypass_src_mux =
1086 SOC_DAPM_ENUM("IB23 Bypass source", rt5677_ib23_bypass_src_enum);
1087
1088static SOC_ENUM_SINGLE_DECL(
1089 rt5677_ib45_bypass_src_enum, RT5677_DSP_IN_OUTB_CTRL,
1090 RT5677_SEL_SRC_IB45_SFT, rt5677_iob_bypass_src);
1091
1092static const struct snd_kcontrol_new rt5677_ib45_bypass_src_mux =
1093 SOC_DAPM_ENUM("IB45 Bypass source", rt5677_ib45_bypass_src_enum);
1094
1095/* Stereo ADC Source 2 */ /* MX-27 MX26 MX25 [11:10] */
1096static const char * const rt5677_stereo_adc2_src[] = {
1097 "DD MIX1", "DMIC", "Stereo DAC MIX"
1098};
1099
1100static SOC_ENUM_SINGLE_DECL(
1101 rt5677_stereo1_adc2_enum, RT5677_STO1_ADC_MIXER,
1102 RT5677_SEL_STO1_ADC2_SFT, rt5677_stereo_adc2_src);
1103
1104static const struct snd_kcontrol_new rt5677_sto1_adc2_mux =
1105 SOC_DAPM_ENUM("Stereo1 ADC2 source", rt5677_stereo1_adc2_enum);
1106
1107static SOC_ENUM_SINGLE_DECL(
1108 rt5677_stereo2_adc2_enum, RT5677_STO2_ADC_MIXER,
1109 RT5677_SEL_STO2_ADC2_SFT, rt5677_stereo_adc2_src);
1110
1111static const struct snd_kcontrol_new rt5677_sto2_adc2_mux =
1112 SOC_DAPM_ENUM("Stereo2 ADC2 source", rt5677_stereo2_adc2_enum);
1113
1114static SOC_ENUM_SINGLE_DECL(
1115 rt5677_stereo3_adc2_enum, RT5677_STO3_ADC_MIXER,
1116 RT5677_SEL_STO3_ADC2_SFT, rt5677_stereo_adc2_src);
1117
1118static const struct snd_kcontrol_new rt5677_sto3_adc2_mux =
1119 SOC_DAPM_ENUM("Stereo3 ADC2 source", rt5677_stereo3_adc2_enum);
1120
1121/* DMIC Source */ /* MX-28 [9:8][1:0] MX-27 MX-26 MX-25 MX-24 [9:8] */
1122static const char * const rt5677_dmic_src[] = {
1123 "DMIC1", "DMIC2", "DMIC3", "DMIC4"
1124};
1125
1126static SOC_ENUM_SINGLE_DECL(
1127 rt5677_mono_dmic_l_enum, RT5677_MONO_ADC_MIXER,
1128 RT5677_SEL_MONO_DMIC_L_SFT, rt5677_dmic_src);
1129
1130static const struct snd_kcontrol_new rt5677_mono_dmic_l_mux =
1131 SOC_DAPM_ENUM("Mono DMIC L source", rt5677_mono_dmic_l_enum);
1132
1133static SOC_ENUM_SINGLE_DECL(
1134 rt5677_mono_dmic_r_enum, RT5677_MONO_ADC_MIXER,
1135 RT5677_SEL_MONO_DMIC_R_SFT, rt5677_dmic_src);
1136
1137static const struct snd_kcontrol_new rt5677_mono_dmic_r_mux =
1138 SOC_DAPM_ENUM("Mono DMIC R source", rt5677_mono_dmic_r_enum);
1139
1140static SOC_ENUM_SINGLE_DECL(
1141 rt5677_stereo1_dmic_enum, RT5677_STO1_ADC_MIXER,
1142 RT5677_SEL_STO1_DMIC_SFT, rt5677_dmic_src);
1143
1144static const struct snd_kcontrol_new rt5677_sto1_dmic_mux =
1145 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5677_stereo1_dmic_enum);
1146
1147static SOC_ENUM_SINGLE_DECL(
1148 rt5677_stereo2_dmic_enum, RT5677_STO2_ADC_MIXER,
1149 RT5677_SEL_STO2_DMIC_SFT, rt5677_dmic_src);
1150
1151static const struct snd_kcontrol_new rt5677_sto2_dmic_mux =
1152 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5677_stereo2_dmic_enum);
1153
1154static SOC_ENUM_SINGLE_DECL(
1155 rt5677_stereo3_dmic_enum, RT5677_STO3_ADC_MIXER,
1156 RT5677_SEL_STO3_DMIC_SFT, rt5677_dmic_src);
1157
1158static const struct snd_kcontrol_new rt5677_sto3_dmic_mux =
1159 SOC_DAPM_ENUM("Stereo3 DMIC source", rt5677_stereo3_dmic_enum);
1160
1161static SOC_ENUM_SINGLE_DECL(
1162 rt5677_stereo4_dmic_enum, RT5677_STO4_ADC_MIXER,
1163 RT5677_SEL_STO4_DMIC_SFT, rt5677_dmic_src);
1164
1165static const struct snd_kcontrol_new rt5677_sto4_dmic_mux =
1166 SOC_DAPM_ENUM("Stereo4 DMIC source", rt5677_stereo4_dmic_enum);
1167
1168/* Stereo2 ADC source */ /* MX-26 [0] */
1169static const char * const rt5677_stereo2_adc_lr_src[] = {
1170 "L", "LR"
1171};
1172
1173static SOC_ENUM_SINGLE_DECL(
1174 rt5677_stereo2_adc_lr_enum, RT5677_STO2_ADC_MIXER,
1175 RT5677_SEL_STO2_LR_MIX_SFT, rt5677_stereo2_adc_lr_src);
1176
1177static const struct snd_kcontrol_new rt5677_sto2_adc_lr_mux =
1178 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5677_stereo2_adc_lr_enum);
1179
1180/* Stereo1 ADC Source 1 */ /* MX-27 MX26 MX25 [13:12] */
1181static const char * const rt5677_stereo_adc1_src[] = {
1182 "DD MIX1", "ADC1/2", "Stereo DAC MIX"
1183};
1184
1185static SOC_ENUM_SINGLE_DECL(
1186 rt5677_stereo1_adc1_enum, RT5677_STO1_ADC_MIXER,
1187 RT5677_SEL_STO1_ADC1_SFT, rt5677_stereo_adc1_src);
1188
1189static const struct snd_kcontrol_new rt5677_sto1_adc1_mux =
1190 SOC_DAPM_ENUM("Stereo1 ADC1 source", rt5677_stereo1_adc1_enum);
1191
1192static SOC_ENUM_SINGLE_DECL(
1193 rt5677_stereo2_adc1_enum, RT5677_STO2_ADC_MIXER,
1194 RT5677_SEL_STO2_ADC1_SFT, rt5677_stereo_adc1_src);
1195
1196static const struct snd_kcontrol_new rt5677_sto2_adc1_mux =
1197 SOC_DAPM_ENUM("Stereo2 ADC1 source", rt5677_stereo2_adc1_enum);
1198
1199static SOC_ENUM_SINGLE_DECL(
1200 rt5677_stereo3_adc1_enum, RT5677_STO3_ADC_MIXER,
1201 RT5677_SEL_STO3_ADC1_SFT, rt5677_stereo_adc1_src);
1202
1203static const struct snd_kcontrol_new rt5677_sto3_adc1_mux =
1204 SOC_DAPM_ENUM("Stereo3 ADC1 source", rt5677_stereo3_adc1_enum);
1205
1206/* Mono ADC Left source 2 */ /* MX-28 [11:10] */
1207static const char * const rt5677_mono_adc2_l_src[] = {
1208 "DD MIX1L", "DMIC", "MONO DAC MIXL"
1209};
1210
1211static SOC_ENUM_SINGLE_DECL(
1212 rt5677_mono_adc2_l_enum, RT5677_MONO_ADC_MIXER,
1213 RT5677_SEL_MONO_ADC_L2_SFT, rt5677_mono_adc2_l_src);
1214
1215static const struct snd_kcontrol_new rt5677_mono_adc2_l_mux =
1216 SOC_DAPM_ENUM("Mono ADC2 L source", rt5677_mono_adc2_l_enum);
1217
1218/* Mono ADC Left source 1 */ /* MX-28 [13:12] */
1219static const char * const rt5677_mono_adc1_l_src[] = {
1220 "DD MIX1L", "ADC1", "MONO DAC MIXL"
1221};
1222
1223static SOC_ENUM_SINGLE_DECL(
1224 rt5677_mono_adc1_l_enum, RT5677_MONO_ADC_MIXER,
1225 RT5677_SEL_MONO_ADC_L1_SFT, rt5677_mono_adc1_l_src);
1226
1227static const struct snd_kcontrol_new rt5677_mono_adc1_l_mux =
1228 SOC_DAPM_ENUM("Mono ADC1 L source", rt5677_mono_adc1_l_enum);
1229
1230/* Mono ADC Right source 2 */ /* MX-28 [3:2] */
1231static const char * const rt5677_mono_adc2_r_src[] = {
1232 "DD MIX1R", "DMIC", "MONO DAC MIXR"
1233};
1234
1235static SOC_ENUM_SINGLE_DECL(
1236 rt5677_mono_adc2_r_enum, RT5677_MONO_ADC_MIXER,
1237 RT5677_SEL_MONO_ADC_R2_SFT, rt5677_mono_adc2_r_src);
1238
1239static const struct snd_kcontrol_new rt5677_mono_adc2_r_mux =
1240 SOC_DAPM_ENUM("Mono ADC2 R source", rt5677_mono_adc2_r_enum);
1241
1242/* Mono ADC Right source 1 */ /* MX-28 [5:4] */
1243static const char * const rt5677_mono_adc1_r_src[] = {
1244 "DD MIX1R", "ADC2", "MONO DAC MIXR"
1245};
1246
1247static SOC_ENUM_SINGLE_DECL(
1248 rt5677_mono_adc1_r_enum, RT5677_MONO_ADC_MIXER,
1249 RT5677_SEL_MONO_ADC_R1_SFT, rt5677_mono_adc1_r_src);
1250
1251static const struct snd_kcontrol_new rt5677_mono_adc1_r_mux =
1252 SOC_DAPM_ENUM("Mono ADC1 R source", rt5677_mono_adc1_r_enum);
1253
1254/* Stereo4 ADC Source 2 */ /* MX-24 [11:10] */
1255static const char * const rt5677_stereo4_adc2_src[] = {
1256 "DD MIX1", "DMIC", "DD MIX2"
1257};
1258
1259static SOC_ENUM_SINGLE_DECL(
1260 rt5677_stereo4_adc2_enum, RT5677_STO4_ADC_MIXER,
1261 RT5677_SEL_STO4_ADC2_SFT, rt5677_stereo4_adc2_src);
1262
1263static const struct snd_kcontrol_new rt5677_sto4_adc2_mux =
1264 SOC_DAPM_ENUM("Stereo4 ADC2 source", rt5677_stereo4_adc2_enum);
1265
1266
1267/* Stereo4 ADC Source 1 */ /* MX-24 [13:12] */
1268static const char * const rt5677_stereo4_adc1_src[] = {
1269 "DD MIX1", "ADC1/2", "DD MIX2"
1270};
1271
1272static SOC_ENUM_SINGLE_DECL(
1273 rt5677_stereo4_adc1_enum, RT5677_STO4_ADC_MIXER,
1274 RT5677_SEL_STO4_ADC1_SFT, rt5677_stereo4_adc1_src);
1275
1276static const struct snd_kcontrol_new rt5677_sto4_adc1_mux =
1277 SOC_DAPM_ENUM("Stereo4 ADC1 source", rt5677_stereo4_adc1_enum);
1278
1279/* InBound0/1 Source */ /* MX-A3 [14:12] */
1280static const char * const rt5677_inbound01_src[] = {
1281 "IF1 DAC 01", "IF2 DAC 01", "SLB DAC 01", "STO1 ADC MIX",
1282 "VAD ADC/DAC1 FS"
1283};
1284
1285static SOC_ENUM_SINGLE_DECL(
1286 rt5677_inbound01_enum, RT5677_DSP_INB_CTRL1,
1287 RT5677_IB01_SRC_SFT, rt5677_inbound01_src);
1288
1289static const struct snd_kcontrol_new rt5677_ib01_src_mux =
1290 SOC_DAPM_ENUM("InBound0/1 Source", rt5677_inbound01_enum);
1291
1292/* InBound2/3 Source */ /* MX-A3 [10:8] */
1293static const char * const rt5677_inbound23_src[] = {
1294 "IF1 DAC 23", "IF2 DAC 23", "SLB DAC 23", "STO2 ADC MIX",
1295 "DAC1 FS", "IF4 DAC"
1296};
1297
1298static SOC_ENUM_SINGLE_DECL(
1299 rt5677_inbound23_enum, RT5677_DSP_INB_CTRL1,
1300 RT5677_IB23_SRC_SFT, rt5677_inbound23_src);
1301
1302static const struct snd_kcontrol_new rt5677_ib23_src_mux =
1303 SOC_DAPM_ENUM("InBound2/3 Source", rt5677_inbound23_enum);
1304
1305/* InBound4/5 Source */ /* MX-A3 [6:4] */
1306static const char * const rt5677_inbound45_src[] = {
1307 "IF1 DAC 45", "IF2 DAC 45", "SLB DAC 45", "STO3 ADC MIX",
1308 "IF3 DAC"
1309};
1310
1311static SOC_ENUM_SINGLE_DECL(
1312 rt5677_inbound45_enum, RT5677_DSP_INB_CTRL1,
1313 RT5677_IB45_SRC_SFT, rt5677_inbound45_src);
1314
1315static const struct snd_kcontrol_new rt5677_ib45_src_mux =
1316 SOC_DAPM_ENUM("InBound4/5 Source", rt5677_inbound45_enum);
1317
1318/* InBound6 Source */ /* MX-A3 [2:0] */
1319static const char * const rt5677_inbound6_src[] = {
1320 "IF1 DAC 6", "IF2 DAC 6", "SLB DAC 6", "STO4 ADC MIX L",
1321 "IF4 DAC L", "STO1 ADC MIX L", "STO2 ADC MIX L", "STO3 ADC MIX L"
1322};
1323
1324static SOC_ENUM_SINGLE_DECL(
1325 rt5677_inbound6_enum, RT5677_DSP_INB_CTRL1,
1326 RT5677_IB6_SRC_SFT, rt5677_inbound6_src);
1327
1328static const struct snd_kcontrol_new rt5677_ib6_src_mux =
1329 SOC_DAPM_ENUM("InBound6 Source", rt5677_inbound6_enum);
1330
1331/* InBound7 Source */ /* MX-A4 [14:12] */
1332static const char * const rt5677_inbound7_src[] = {
1333 "IF1 DAC 7", "IF2 DAC 7", "SLB DAC 7", "STO4 ADC MIX R",
1334 "IF4 DAC R", "STO1 ADC MIX R", "STO2 ADC MIX R", "STO3 ADC MIX R"
1335};
1336
1337static SOC_ENUM_SINGLE_DECL(
1338 rt5677_inbound7_enum, RT5677_DSP_INB_CTRL2,
1339 RT5677_IB7_SRC_SFT, rt5677_inbound7_src);
1340
1341static const struct snd_kcontrol_new rt5677_ib7_src_mux =
1342 SOC_DAPM_ENUM("InBound7 Source", rt5677_inbound7_enum);
1343
1344/* InBound8 Source */ /* MX-A4 [10:8] */
1345static const char * const rt5677_inbound8_src[] = {
1346 "STO1 ADC MIX L", "STO2 ADC MIX L", "STO3 ADC MIX L", "STO4 ADC MIX L",
1347 "MONO ADC MIX L", "DACL1 FS"
1348};
1349
1350static SOC_ENUM_SINGLE_DECL(
1351 rt5677_inbound8_enum, RT5677_DSP_INB_CTRL2,
1352 RT5677_IB8_SRC_SFT, rt5677_inbound8_src);
1353
1354static const struct snd_kcontrol_new rt5677_ib8_src_mux =
1355 SOC_DAPM_ENUM("InBound8 Source", rt5677_inbound8_enum);
1356
1357/* InBound9 Source */ /* MX-A4 [6:4] */
1358static const char * const rt5677_inbound9_src[] = {
1359 "STO1 ADC MIX R", "STO2 ADC MIX R", "STO3 ADC MIX R", "STO4 ADC MIX R",
1360 "MONO ADC MIX R", "DACR1 FS", "DAC1 FS"
1361};
1362
1363static SOC_ENUM_SINGLE_DECL(
1364 rt5677_inbound9_enum, RT5677_DSP_INB_CTRL2,
1365 RT5677_IB9_SRC_SFT, rt5677_inbound9_src);
1366
1367static const struct snd_kcontrol_new rt5677_ib9_src_mux =
1368 SOC_DAPM_ENUM("InBound9 Source", rt5677_inbound9_enum);
1369
1370/* VAD Source */ /* MX-9F [6:4] */
1371static const char * const rt5677_vad_src[] = {
1372 "STO1 ADC MIX L", "MONO ADC MIX L", "MONO ADC MIX R", "STO2 ADC MIX L",
1373 "STO3 ADC MIX L"
1374};
1375
1376static SOC_ENUM_SINGLE_DECL(
1377 rt5677_vad_enum, RT5677_VAD_CTRL4,
1378 RT5677_VAD_SRC_SFT, rt5677_vad_src);
1379
1380static const struct snd_kcontrol_new rt5677_vad_src_mux =
1381 SOC_DAPM_ENUM("VAD Source", rt5677_vad_enum);
1382
1383/* Sidetone Source */ /* MX-13 [11:9] */
1384static const char * const rt5677_sidetone_src[] = {
1385 "DMIC1 L", "DMIC2 L", "DMIC3 L", "DMIC4 L", "ADC1", "ADC2"
1386};
1387
1388static SOC_ENUM_SINGLE_DECL(
1389 rt5677_sidetone_enum, RT5677_SIDETONE_CTRL,
1390 RT5677_ST_SEL_SFT, rt5677_sidetone_src);
1391
1392static const struct snd_kcontrol_new rt5677_sidetone_mux =
1393 SOC_DAPM_ENUM("Sidetone Source", rt5677_sidetone_enum);
1394
1395/* DAC1/2 Source */ /* MX-15 [1:0] */
1396static const char * const rt5677_dac12_src[] = {
1397 "STO1 DAC MIX", "MONO DAC MIX", "DD MIX1", "DD MIX2"
1398};
1399
1400static SOC_ENUM_SINGLE_DECL(
1401 rt5677_dac12_enum, RT5677_ANA_DAC1_2_3_SRC,
1402 RT5677_ANA_DAC1_2_SRC_SEL_SFT, rt5677_dac12_src);
1403
1404static const struct snd_kcontrol_new rt5677_dac12_mux =
1405 SOC_DAPM_ENUM("Analog DAC1/2 Source", rt5677_dac12_enum);
1406
1407/* DAC3 Source */ /* MX-15 [5:4] */
1408static const char * const rt5677_dac3_src[] = {
1409 "MONO DAC MIXL", "MONO DAC MIXR", "DD MIX1L", "DD MIX2L"
1410};
1411
1412static SOC_ENUM_SINGLE_DECL(
1413 rt5677_dac3_enum, RT5677_ANA_DAC1_2_3_SRC,
1414 RT5677_ANA_DAC3_SRC_SEL_SFT, rt5677_dac3_src);
1415
1416static const struct snd_kcontrol_new rt5677_dac3_mux =
1417 SOC_DAPM_ENUM("Analog DAC3 Source", rt5677_dac3_enum);
1418
1419/* PDM channel source */ /* MX-31 [13:12][9:8][5:4][1:0] */
1420static const char * const rt5677_pdm_src[] = {
1421 "STO1 DAC MIX", "MONO DAC MIX", "DD MIX1", "DD MIX2"
1422};
1423
1424static SOC_ENUM_SINGLE_DECL(
1425 rt5677_pdm1_l_enum, RT5677_PDM_OUT_CTRL,
1426 RT5677_SEL_PDM1_L_SFT, rt5677_pdm_src);
1427
1428static const struct snd_kcontrol_new rt5677_pdm1_l_mux =
1429 SOC_DAPM_ENUM("PDM1 source", rt5677_pdm1_l_enum);
1430
1431static SOC_ENUM_SINGLE_DECL(
1432 rt5677_pdm2_l_enum, RT5677_PDM_OUT_CTRL,
1433 RT5677_SEL_PDM2_L_SFT, rt5677_pdm_src);
1434
1435static const struct snd_kcontrol_new rt5677_pdm2_l_mux =
1436 SOC_DAPM_ENUM("PDM2 source", rt5677_pdm2_l_enum);
1437
1438static SOC_ENUM_SINGLE_DECL(
1439 rt5677_pdm1_r_enum, RT5677_PDM_OUT_CTRL,
1440 RT5677_SEL_PDM1_R_SFT, rt5677_pdm_src);
1441
1442static const struct snd_kcontrol_new rt5677_pdm1_r_mux =
1443 SOC_DAPM_ENUM("PDM1 source", rt5677_pdm1_r_enum);
1444
1445static SOC_ENUM_SINGLE_DECL(
1446 rt5677_pdm2_r_enum, RT5677_PDM_OUT_CTRL,
1447 RT5677_SEL_PDM2_R_SFT, rt5677_pdm_src);
1448
1449static const struct snd_kcontrol_new rt5677_pdm2_r_mux =
1450 SOC_DAPM_ENUM("PDM2 source", rt5677_pdm2_r_enum);
1451
1452/* TDM IF1/2 SLB ADC1 Data Selection */ /* MX-3C MX-41 [5:4] MX-08 [1:0]*/
1453static const char * const rt5677_if12_adc1_src[] = {
1454 "STO1 ADC MIX", "OB01", "VAD ADC"
1455};
1456
1457static SOC_ENUM_SINGLE_DECL(
1458 rt5677_if1_adc1_enum, RT5677_TDM1_CTRL2,
1459 RT5677_IF1_ADC1_SFT, rt5677_if12_adc1_src);
1460
1461static const struct snd_kcontrol_new rt5677_if1_adc1_mux =
1462 SOC_DAPM_ENUM("IF1 ADC1 source", rt5677_if1_adc1_enum);
1463
1464static SOC_ENUM_SINGLE_DECL(
1465 rt5677_if2_adc1_enum, RT5677_TDM2_CTRL2,
1466 RT5677_IF2_ADC1_SFT, rt5677_if12_adc1_src);
1467
1468static const struct snd_kcontrol_new rt5677_if2_adc1_mux =
1469 SOC_DAPM_ENUM("IF2 ADC1 source", rt5677_if2_adc1_enum);
1470
1471static SOC_ENUM_SINGLE_DECL(
1472 rt5677_slb_adc1_enum, RT5677_SLIMBUS_RX,
1473 RT5677_SLB_ADC1_SFT, rt5677_if12_adc1_src);
1474
1475static const struct snd_kcontrol_new rt5677_slb_adc1_mux =
1476 SOC_DAPM_ENUM("SLB ADC1 source", rt5677_slb_adc1_enum);
1477
1478/* TDM IF1/2 SLB ADC2 Data Selection */ /* MX-3C MX-41 [7:6] MX-08 [3:2] */
1479static const char * const rt5677_if12_adc2_src[] = {
1480 "STO2 ADC MIX", "OB23"
1481};
1482
1483static SOC_ENUM_SINGLE_DECL(
1484 rt5677_if1_adc2_enum, RT5677_TDM1_CTRL2,
1485 RT5677_IF1_ADC2_SFT, rt5677_if12_adc2_src);
1486
1487static const struct snd_kcontrol_new rt5677_if1_adc2_mux =
1488 SOC_DAPM_ENUM("IF1 ADC2 source", rt5677_if1_adc2_enum);
1489
1490static SOC_ENUM_SINGLE_DECL(
1491 rt5677_if2_adc2_enum, RT5677_TDM2_CTRL2,
1492 RT5677_IF2_ADC2_SFT, rt5677_if12_adc2_src);
1493
1494static const struct snd_kcontrol_new rt5677_if2_adc2_mux =
1495 SOC_DAPM_ENUM("IF2 ADC2 source", rt5677_if2_adc2_enum);
1496
1497static SOC_ENUM_SINGLE_DECL(
1498 rt5677_slb_adc2_enum, RT5677_SLIMBUS_RX,
1499 RT5677_SLB_ADC2_SFT, rt5677_if12_adc2_src);
1500
1501static const struct snd_kcontrol_new rt5677_slb_adc2_mux =
1502 SOC_DAPM_ENUM("SLB ADC2 source", rt5677_slb_adc2_enum);
1503
1504/* TDM IF1/2 SLB ADC3 Data Selection */ /* MX-3C MX-41 [9:8] MX-08 [5:4] */
1505static const char * const rt5677_if12_adc3_src[] = {
1506 "STO3 ADC MIX", "MONO ADC MIX", "OB45"
1507};
1508
1509static SOC_ENUM_SINGLE_DECL(
1510 rt5677_if1_adc3_enum, RT5677_TDM1_CTRL2,
1511 RT5677_IF1_ADC3_SFT, rt5677_if12_adc3_src);
1512
1513static const struct snd_kcontrol_new rt5677_if1_adc3_mux =
1514 SOC_DAPM_ENUM("IF1 ADC3 source", rt5677_if1_adc3_enum);
1515
1516static SOC_ENUM_SINGLE_DECL(
1517 rt5677_if2_adc3_enum, RT5677_TDM2_CTRL2,
1518 RT5677_IF2_ADC3_SFT, rt5677_if12_adc3_src);
1519
1520static const struct snd_kcontrol_new rt5677_if2_adc3_mux =
1521 SOC_DAPM_ENUM("IF2 ADC3 source", rt5677_if2_adc3_enum);
1522
1523static SOC_ENUM_SINGLE_DECL(
1524 rt5677_slb_adc3_enum, RT5677_SLIMBUS_RX,
1525 RT5677_SLB_ADC3_SFT, rt5677_if12_adc3_src);
1526
1527static const struct snd_kcontrol_new rt5677_slb_adc3_mux =
1528 SOC_DAPM_ENUM("SLB ADC3 source", rt5677_slb_adc3_enum);
1529
1530/* TDM IF1/2 SLB ADC4 Data Selection */ /* MX-3C MX-41 [11:10] MX-08 [7:6] */
1531static const char * const rt5677_if12_adc4_src[] = {
1532 "STO4 ADC MIX", "OB67", "OB01"
1533};
1534
1535static SOC_ENUM_SINGLE_DECL(
1536 rt5677_if1_adc4_enum, RT5677_TDM1_CTRL2,
1537 RT5677_IF1_ADC4_SFT, rt5677_if12_adc4_src);
1538
1539static const struct snd_kcontrol_new rt5677_if1_adc4_mux =
1540 SOC_DAPM_ENUM("IF1 ADC4 source", rt5677_if1_adc4_enum);
1541
1542static SOC_ENUM_SINGLE_DECL(
1543 rt5677_if2_adc4_enum, RT5677_TDM2_CTRL2,
1544 RT5677_IF2_ADC4_SFT, rt5677_if12_adc4_src);
1545
1546static const struct snd_kcontrol_new rt5677_if2_adc4_mux =
1547 SOC_DAPM_ENUM("IF2 ADC4 source", rt5677_if2_adc4_enum);
1548
1549static SOC_ENUM_SINGLE_DECL(
1550 rt5677_slb_adc4_enum, RT5677_SLIMBUS_RX,
1551 RT5677_SLB_ADC4_SFT, rt5677_if12_adc4_src);
1552
1553static const struct snd_kcontrol_new rt5677_slb_adc4_mux =
1554 SOC_DAPM_ENUM("SLB ADC4 source", rt5677_slb_adc4_enum);
1555
1556/* Interface3/4 ADC Data Input */ /* MX-2F [3:0] MX-30 [7:4]*/
1557static const char * const rt5677_if34_adc_src[] = {
1558 "STO1 ADC MIX", "STO2 ADC MIX", "STO3 ADC MIX", "STO4 ADC MIX",
1559 "MONO ADC MIX", "OB01", "OB23", "VAD ADC"
1560};
1561
1562static SOC_ENUM_SINGLE_DECL(
1563 rt5677_if3_adc_enum, RT5677_IF3_DATA,
1564 RT5677_IF3_ADC_IN_SFT, rt5677_if34_adc_src);
1565
1566static const struct snd_kcontrol_new rt5677_if3_adc_mux =
1567 SOC_DAPM_ENUM("IF3 ADC source", rt5677_if3_adc_enum);
1568
1569static SOC_ENUM_SINGLE_DECL(
1570 rt5677_if4_adc_enum, RT5677_IF4_DATA,
1571 RT5677_IF4_ADC_IN_SFT, rt5677_if34_adc_src);
1572
1573static const struct snd_kcontrol_new rt5677_if4_adc_mux =
1574 SOC_DAPM_ENUM("IF4 ADC source", rt5677_if4_adc_enum);
1575
1576static int rt5677_bst1_event(struct snd_soc_dapm_widget *w,
1577 struct snd_kcontrol *kcontrol, int event)
1578{
1579 struct snd_soc_codec *codec = w->codec;
1580 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
1581
1582 switch (event) {
1583 case SND_SOC_DAPM_POST_PMU:
1584 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
1585 RT5677_PWR_BST1_P, RT5677_PWR_BST1_P);
1586 break;
1587
1588 case SND_SOC_DAPM_PRE_PMD:
1589 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
1590 RT5677_PWR_BST1_P, 0);
1591 break;
1592
1593 default:
1594 return 0;
1595 }
1596
1597 return 0;
1598}
1599
1600static int rt5677_bst2_event(struct snd_soc_dapm_widget *w,
1601 struct snd_kcontrol *kcontrol, int event)
1602{
1603 struct snd_soc_codec *codec = w->codec;
1604 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
1605
1606 switch (event) {
1607 case SND_SOC_DAPM_POST_PMU:
1608 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
1609 RT5677_PWR_BST2_P, RT5677_PWR_BST2_P);
1610 break;
1611
1612 case SND_SOC_DAPM_PRE_PMD:
1613 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
1614 RT5677_PWR_BST2_P, 0);
1615 break;
1616
1617 default:
1618 return 0;
1619 }
1620
1621 return 0;
1622}
1623
1624static int rt5677_set_pll1_event(struct snd_soc_dapm_widget *w,
1625 struct snd_kcontrol *kcontrol, int event)
1626{
1627 struct snd_soc_codec *codec = w->codec;
1628 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
1629
1630 switch (event) {
1631 case SND_SOC_DAPM_POST_PMU:
1632 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2);
1633 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0);
1634 break;
1635 default:
1636 return 0;
1637 }
1638
1639 return 0;
1640}
1641
1642static int rt5677_set_pll2_event(struct snd_soc_dapm_widget *w,
1643 struct snd_kcontrol *kcontrol, int event)
1644{
1645 struct snd_soc_codec *codec = w->codec;
1646 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
1647
1648 switch (event) {
1649 case SND_SOC_DAPM_POST_PMU:
1650 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2);
1651 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0);
1652 break;
1653 default:
1654 return 0;
1655 }
1656
1657 return 0;
1658}
1659
1660static int rt5677_set_micbias1_event(struct snd_soc_dapm_widget *w,
1661 struct snd_kcontrol *kcontrol, int event)
1662{
1663 struct snd_soc_codec *codec = w->codec;
1664 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
1665
1666 switch (event) {
1667 case SND_SOC_DAPM_POST_PMU:
1668 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
1669 RT5677_PWR_CLK_MB1 | RT5677_PWR_PP_MB1 |
1670 RT5677_PWR_CLK_MB, RT5677_PWR_CLK_MB1 |
1671 RT5677_PWR_PP_MB1 | RT5677_PWR_CLK_MB);
1672 break;
1673 default:
1674 return 0;
1675 }
1676
1677 return 0;
1678}
1679
1680static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = {
1681 SND_SOC_DAPM_SUPPLY("PLL1", RT5677_PWR_ANLG2, RT5677_PWR_PLL1_BIT,
1682 0, rt5677_set_pll1_event, SND_SOC_DAPM_POST_PMU),
1683 SND_SOC_DAPM_SUPPLY("PLL2", RT5677_PWR_ANLG2, RT5677_PWR_PLL2_BIT,
1684 0, rt5677_set_pll2_event, SND_SOC_DAPM_POST_PMU),
1685
1686 /* Input Side */
1687 /* micbias */
1688 SND_SOC_DAPM_SUPPLY("micbias1", RT5677_PWR_ANLG2, RT5677_PWR_MB1_BIT,
1689 0, rt5677_set_micbias1_event, SND_SOC_DAPM_POST_PMU),
1690
1691 /* Input Lines */
1692 SND_SOC_DAPM_INPUT("DMIC L1"),
1693 SND_SOC_DAPM_INPUT("DMIC R1"),
1694 SND_SOC_DAPM_INPUT("DMIC L2"),
1695 SND_SOC_DAPM_INPUT("DMIC R2"),
1696 SND_SOC_DAPM_INPUT("DMIC L3"),
1697 SND_SOC_DAPM_INPUT("DMIC R3"),
1698 SND_SOC_DAPM_INPUT("DMIC L4"),
1699 SND_SOC_DAPM_INPUT("DMIC R4"),
1700
1701 SND_SOC_DAPM_INPUT("IN1P"),
1702 SND_SOC_DAPM_INPUT("IN1N"),
1703 SND_SOC_DAPM_INPUT("IN2P"),
1704 SND_SOC_DAPM_INPUT("IN2N"),
1705
1706 SND_SOC_DAPM_INPUT("Haptic Generator"),
1707
1708 SND_SOC_DAPM_PGA("DMIC1", RT5677_DMIC_CTRL1, RT5677_DMIC_1_EN_SFT, 0,
1709 NULL, 0),
1710 SND_SOC_DAPM_PGA("DMIC2", RT5677_DMIC_CTRL1, RT5677_DMIC_2_EN_SFT, 0,
1711 NULL, 0),
1712 SND_SOC_DAPM_PGA("DMIC3", RT5677_DMIC_CTRL1, RT5677_DMIC_3_EN_SFT, 0,
1713 NULL, 0),
1714 SND_SOC_DAPM_PGA("DMIC4", RT5677_DMIC_CTRL2, RT5677_DMIC_4_EN_SFT, 0,
1715 NULL, 0),
1716
1717 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1718 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1719
1720 /* Boost */
1721 SND_SOC_DAPM_PGA_E("BST1", RT5677_PWR_ANLG2,
1722 RT5677_PWR_BST1_BIT, 0, NULL, 0, rt5677_bst1_event,
1723 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1724 SND_SOC_DAPM_PGA_E("BST2", RT5677_PWR_ANLG2,
1725 RT5677_PWR_BST2_BIT, 0, NULL, 0, rt5677_bst2_event,
1726 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1727
1728 /* ADCs */
1729 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM,
1730 0, 0),
1731 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM,
1732 0, 0),
1733 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1734
1735 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5677_PWR_DIG1,
1736 RT5677_PWR_ADC_L_BIT, 0, NULL, 0),
1737 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5677_PWR_DIG1,
1738 RT5677_PWR_ADC_R_BIT, 0, NULL, 0),
1739 SND_SOC_DAPM_SUPPLY("ADC1 clock", RT5677_PWR_DIG1,
1740 RT5677_PWR_ADCFED1_BIT, 0, NULL, 0),
1741 SND_SOC_DAPM_SUPPLY("ADC2 clock", RT5677_PWR_DIG1,
1742 RT5677_PWR_ADCFED2_BIT, 0, NULL, 0),
1743
1744 /* ADC Mux */
1745 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1746 &rt5677_sto1_dmic_mux),
1747 SND_SOC_DAPM_MUX("Stereo1 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1748 &rt5677_sto1_adc1_mux),
1749 SND_SOC_DAPM_MUX("Stereo1 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1750 &rt5677_sto1_adc2_mux),
1751 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1752 &rt5677_sto2_dmic_mux),
1753 SND_SOC_DAPM_MUX("Stereo2 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1754 &rt5677_sto2_adc1_mux),
1755 SND_SOC_DAPM_MUX("Stereo2 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1756 &rt5677_sto2_adc2_mux),
1757 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1758 &rt5677_sto2_adc_lr_mux),
1759 SND_SOC_DAPM_MUX("Stereo3 DMIC Mux", SND_SOC_NOPM, 0, 0,
1760 &rt5677_sto3_dmic_mux),
1761 SND_SOC_DAPM_MUX("Stereo3 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1762 &rt5677_sto3_adc1_mux),
1763 SND_SOC_DAPM_MUX("Stereo3 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1764 &rt5677_sto3_adc2_mux),
1765 SND_SOC_DAPM_MUX("Stereo4 DMIC Mux", SND_SOC_NOPM, 0, 0,
1766 &rt5677_sto4_dmic_mux),
1767 SND_SOC_DAPM_MUX("Stereo4 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1768 &rt5677_sto4_adc1_mux),
1769 SND_SOC_DAPM_MUX("Stereo4 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1770 &rt5677_sto4_adc2_mux),
1771 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1772 &rt5677_mono_dmic_l_mux),
1773 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1774 &rt5677_mono_dmic_r_mux),
1775 SND_SOC_DAPM_MUX("Mono ADC2 L Mux", SND_SOC_NOPM, 0, 0,
1776 &rt5677_mono_adc2_l_mux),
1777 SND_SOC_DAPM_MUX("Mono ADC1 L Mux", SND_SOC_NOPM, 0, 0,
1778 &rt5677_mono_adc1_l_mux),
1779 SND_SOC_DAPM_MUX("Mono ADC1 R Mux", SND_SOC_NOPM, 0, 0,
1780 &rt5677_mono_adc1_r_mux),
1781 SND_SOC_DAPM_MUX("Mono ADC2 R Mux", SND_SOC_NOPM, 0, 0,
1782 &rt5677_mono_adc2_r_mux),
1783
1784 /* ADC Mixer */
1785 SND_SOC_DAPM_SUPPLY("adc stereo1 filter", RT5677_PWR_DIG2,
1786 RT5677_PWR_ADC_S1F_BIT, 0, NULL, 0),
1787 SND_SOC_DAPM_SUPPLY("adc stereo2 filter", RT5677_PWR_DIG2,
1788 RT5677_PWR_ADC_S2F_BIT, 0, NULL, 0),
1789 SND_SOC_DAPM_SUPPLY("adc stereo3 filter", RT5677_PWR_DIG2,
1790 RT5677_PWR_ADC_S3F_BIT, 0, NULL, 0),
1791 SND_SOC_DAPM_SUPPLY("adc stereo4 filter", RT5677_PWR_DIG2,
1792 RT5677_PWR_ADC_S4F_BIT, 0, NULL, 0),
1793 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1794 rt5677_sto1_adc_l_mix, ARRAY_SIZE(rt5677_sto1_adc_l_mix)),
1795 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1796 rt5677_sto1_adc_r_mix, ARRAY_SIZE(rt5677_sto1_adc_r_mix)),
1797 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1798 rt5677_sto2_adc_l_mix, ARRAY_SIZE(rt5677_sto2_adc_l_mix)),
1799 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1800 rt5677_sto2_adc_r_mix, ARRAY_SIZE(rt5677_sto2_adc_r_mix)),
1801 SND_SOC_DAPM_MIXER("Sto3 ADC MIXL", SND_SOC_NOPM, 0, 0,
1802 rt5677_sto3_adc_l_mix, ARRAY_SIZE(rt5677_sto3_adc_l_mix)),
1803 SND_SOC_DAPM_MIXER("Sto3 ADC MIXR", SND_SOC_NOPM, 0, 0,
1804 rt5677_sto3_adc_r_mix, ARRAY_SIZE(rt5677_sto3_adc_r_mix)),
1805 SND_SOC_DAPM_MIXER("Sto4 ADC MIXL", SND_SOC_NOPM, 0, 0,
1806 rt5677_sto4_adc_l_mix, ARRAY_SIZE(rt5677_sto4_adc_l_mix)),
1807 SND_SOC_DAPM_MIXER("Sto4 ADC MIXR", SND_SOC_NOPM, 0, 0,
1808 rt5677_sto4_adc_r_mix, ARRAY_SIZE(rt5677_sto4_adc_r_mix)),
1809 SND_SOC_DAPM_SUPPLY("adc mono left filter", RT5677_PWR_DIG2,
1810 RT5677_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1811 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1812 rt5677_mono_adc_l_mix, ARRAY_SIZE(rt5677_mono_adc_l_mix)),
1813 SND_SOC_DAPM_SUPPLY("adc mono right filter", RT5677_PWR_DIG2,
1814 RT5677_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1815 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1816 rt5677_mono_adc_r_mix, ARRAY_SIZE(rt5677_mono_adc_r_mix)),
1817
1818 /* ADC PGA */
1819 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1820 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1821 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1822 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1823 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1824 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1825 SND_SOC_DAPM_PGA("Stereo3 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1826 SND_SOC_DAPM_PGA("Stereo3 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1827 SND_SOC_DAPM_PGA("Stereo3 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1828 SND_SOC_DAPM_PGA("Stereo4 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1829 SND_SOC_DAPM_PGA("Stereo4 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1830 SND_SOC_DAPM_PGA("Stereo4 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1831 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1832 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1833 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1834 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1835 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1836 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1837
1838 /* DSP */
1839 SND_SOC_DAPM_MUX("IB9 Mux", SND_SOC_NOPM, 0, 0,
1840 &rt5677_ib9_src_mux),
1841 SND_SOC_DAPM_MUX("IB8 Mux", SND_SOC_NOPM, 0, 0,
1842 &rt5677_ib8_src_mux),
1843 SND_SOC_DAPM_MUX("IB7 Mux", SND_SOC_NOPM, 0, 0,
1844 &rt5677_ib7_src_mux),
1845 SND_SOC_DAPM_MUX("IB6 Mux", SND_SOC_NOPM, 0, 0,
1846 &rt5677_ib6_src_mux),
1847 SND_SOC_DAPM_MUX("IB45 Mux", SND_SOC_NOPM, 0, 0,
1848 &rt5677_ib45_src_mux),
1849 SND_SOC_DAPM_MUX("IB23 Mux", SND_SOC_NOPM, 0, 0,
1850 &rt5677_ib23_src_mux),
1851 SND_SOC_DAPM_MUX("IB01 Mux", SND_SOC_NOPM, 0, 0,
1852 &rt5677_ib01_src_mux),
1853 SND_SOC_DAPM_MUX("IB45 Bypass Mux", SND_SOC_NOPM, 0, 0,
1854 &rt5677_ib45_bypass_src_mux),
1855 SND_SOC_DAPM_MUX("IB23 Bypass Mux", SND_SOC_NOPM, 0, 0,
1856 &rt5677_ib23_bypass_src_mux),
1857 SND_SOC_DAPM_MUX("IB01 Bypass Mux", SND_SOC_NOPM, 0, 0,
1858 &rt5677_ib01_bypass_src_mux),
1859 SND_SOC_DAPM_MUX("OB23 Bypass Mux", SND_SOC_NOPM, 0, 0,
1860 &rt5677_ob23_bypass_src_mux),
1861 SND_SOC_DAPM_MUX("OB01 Bypass Mux", SND_SOC_NOPM, 0, 0,
1862 &rt5677_ob01_bypass_src_mux),
1863
1864 SND_SOC_DAPM_PGA("OB45", SND_SOC_NOPM, 0, 0, NULL, 0),
1865 SND_SOC_DAPM_PGA("OB67", SND_SOC_NOPM, 0, 0, NULL, 0),
1866
1867 SND_SOC_DAPM_PGA("OutBound2", SND_SOC_NOPM, 0, 0, NULL, 0),
1868 SND_SOC_DAPM_PGA("OutBound3", SND_SOC_NOPM, 0, 0, NULL, 0),
1869 SND_SOC_DAPM_PGA("OutBound4", SND_SOC_NOPM, 0, 0, NULL, 0),
1870 SND_SOC_DAPM_PGA("OutBound5", SND_SOC_NOPM, 0, 0, NULL, 0),
1871 SND_SOC_DAPM_PGA("OutBound6", SND_SOC_NOPM, 0, 0, NULL, 0),
1872 SND_SOC_DAPM_PGA("OutBound7", SND_SOC_NOPM, 0, 0, NULL, 0),
1873
1874 /* Digital Interface */
1875 SND_SOC_DAPM_SUPPLY("I2S1", RT5677_PWR_DIG1,
1876 RT5677_PWR_I2S1_BIT, 0, NULL, 0),
1877 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1878 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1879 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1880 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1881 SND_SOC_DAPM_PGA("IF1 DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1882 SND_SOC_DAPM_PGA("IF1 DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
1883 SND_SOC_DAPM_PGA("IF1 DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
1884 SND_SOC_DAPM_PGA("IF1 DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
1885 SND_SOC_DAPM_PGA("IF1 DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
1886 SND_SOC_DAPM_PGA("IF1 DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
1887 SND_SOC_DAPM_PGA("IF1 DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
1888 SND_SOC_DAPM_PGA("IF1 DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
1889 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1890 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1891 SND_SOC_DAPM_PGA("IF1 ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1892 SND_SOC_DAPM_PGA("IF1 ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1893
1894 SND_SOC_DAPM_SUPPLY("I2S2", RT5677_PWR_DIG1,
1895 RT5677_PWR_I2S2_BIT, 0, NULL, 0),
1896 SND_SOC_DAPM_PGA("IF2 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1897 SND_SOC_DAPM_PGA("IF2 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1898 SND_SOC_DAPM_PGA("IF2 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1899 SND_SOC_DAPM_PGA("IF2 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1900 SND_SOC_DAPM_PGA("IF2 DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1901 SND_SOC_DAPM_PGA("IF2 DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
1902 SND_SOC_DAPM_PGA("IF2 DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
1903 SND_SOC_DAPM_PGA("IF2 DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
1904 SND_SOC_DAPM_PGA("IF2 DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
1905 SND_SOC_DAPM_PGA("IF2 DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
1906 SND_SOC_DAPM_PGA("IF2 DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
1907 SND_SOC_DAPM_PGA("IF2 DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
1908 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1909 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1910 SND_SOC_DAPM_PGA("IF2 ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1911 SND_SOC_DAPM_PGA("IF2 ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1912
1913 SND_SOC_DAPM_SUPPLY("I2S3", RT5677_PWR_DIG1,
1914 RT5677_PWR_I2S3_BIT, 0, NULL, 0),
1915 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1916 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1917 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1918 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1919 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1920 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1921
1922 SND_SOC_DAPM_SUPPLY("I2S4", RT5677_PWR_DIG1,
1923 RT5677_PWR_I2S4_BIT, 0, NULL, 0),
1924 SND_SOC_DAPM_PGA("IF4 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1925 SND_SOC_DAPM_PGA("IF4 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1926 SND_SOC_DAPM_PGA("IF4 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1927 SND_SOC_DAPM_PGA("IF4 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1928 SND_SOC_DAPM_PGA("IF4 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1929 SND_SOC_DAPM_PGA("IF4 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1930
1931 SND_SOC_DAPM_SUPPLY("SLB", RT5677_PWR_DIG1,
1932 RT5677_PWR_SLB_BIT, 0, NULL, 0),
1933 SND_SOC_DAPM_PGA("SLB DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1934 SND_SOC_DAPM_PGA("SLB DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1935 SND_SOC_DAPM_PGA("SLB DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1936 SND_SOC_DAPM_PGA("SLB DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1937 SND_SOC_DAPM_PGA("SLB DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1938 SND_SOC_DAPM_PGA("SLB DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
1939 SND_SOC_DAPM_PGA("SLB DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
1940 SND_SOC_DAPM_PGA("SLB DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
1941 SND_SOC_DAPM_PGA("SLB DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
1942 SND_SOC_DAPM_PGA("SLB DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
1943 SND_SOC_DAPM_PGA("SLB DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
1944 SND_SOC_DAPM_PGA("SLB DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
1945 SND_SOC_DAPM_PGA("SLB ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1946 SND_SOC_DAPM_PGA("SLB ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1947 SND_SOC_DAPM_PGA("SLB ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1948 SND_SOC_DAPM_PGA("SLB ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1949
1950 /* Digital Interface Select */
1951 SND_SOC_DAPM_MUX("IF1 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1952 &rt5677_if1_adc1_mux),
1953 SND_SOC_DAPM_MUX("IF1 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1954 &rt5677_if1_adc2_mux),
1955 SND_SOC_DAPM_MUX("IF1 ADC3 Mux", SND_SOC_NOPM, 0, 0,
1956 &rt5677_if1_adc3_mux),
1957 SND_SOC_DAPM_MUX("IF1 ADC4 Mux", SND_SOC_NOPM, 0, 0,
1958 &rt5677_if1_adc4_mux),
1959 SND_SOC_DAPM_MUX("IF2 ADC1 Mux", SND_SOC_NOPM, 0, 0,
1960 &rt5677_if2_adc1_mux),
1961 SND_SOC_DAPM_MUX("IF2 ADC2 Mux", SND_SOC_NOPM, 0, 0,
1962 &rt5677_if2_adc2_mux),
1963 SND_SOC_DAPM_MUX("IF2 ADC3 Mux", SND_SOC_NOPM, 0, 0,
1964 &rt5677_if2_adc3_mux),
1965 SND_SOC_DAPM_MUX("IF2 ADC4 Mux", SND_SOC_NOPM, 0, 0,
1966 &rt5677_if2_adc4_mux),
1967 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
1968 &rt5677_if3_adc_mux),
1969 SND_SOC_DAPM_MUX("IF4 ADC Mux", SND_SOC_NOPM, 0, 0,
1970 &rt5677_if4_adc_mux),
1971 SND_SOC_DAPM_MUX("SLB ADC1 Mux", SND_SOC_NOPM, 0, 0,
1972 &rt5677_slb_adc1_mux),
1973 SND_SOC_DAPM_MUX("SLB ADC2 Mux", SND_SOC_NOPM, 0, 0,
1974 &rt5677_slb_adc2_mux),
1975 SND_SOC_DAPM_MUX("SLB ADC3 Mux", SND_SOC_NOPM, 0, 0,
1976 &rt5677_slb_adc3_mux),
1977 SND_SOC_DAPM_MUX("SLB ADC4 Mux", SND_SOC_NOPM, 0, 0,
1978 &rt5677_slb_adc4_mux),
1979
1980 /* Audio Interface */
1981 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1982 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1983 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1984 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1985 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1986 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1987 SND_SOC_DAPM_AIF_IN("AIF4RX", "AIF4 Playback", 0, SND_SOC_NOPM, 0, 0),
1988 SND_SOC_DAPM_AIF_OUT("AIF4TX", "AIF4 Capture", 0, SND_SOC_NOPM, 0, 0),
1989 SND_SOC_DAPM_AIF_IN("SLBRX", "SLIMBus Playback", 0, SND_SOC_NOPM, 0, 0),
1990 SND_SOC_DAPM_AIF_OUT("SLBTX", "SLIMBus Capture", 0, SND_SOC_NOPM, 0, 0),
1991
1992 /* Sidetone Mux */
1993 SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
1994 &rt5677_sidetone_mux),
1995 /* VAD Mux*/
1996 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1997 &rt5677_vad_src_mux),
1998
1999 /* Tensilica DSP */
2000 SND_SOC_DAPM_PGA("Tensilica DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
2001 SND_SOC_DAPM_MIXER("OB01 MIX", SND_SOC_NOPM, 0, 0,
2002 rt5677_ob_01_mix, ARRAY_SIZE(rt5677_ob_01_mix)),
2003 SND_SOC_DAPM_MIXER("OB23 MIX", SND_SOC_NOPM, 0, 0,
2004 rt5677_ob_23_mix, ARRAY_SIZE(rt5677_ob_23_mix)),
2005 SND_SOC_DAPM_MIXER("OB4 MIX", SND_SOC_NOPM, 0, 0,
2006 rt5677_ob_4_mix, ARRAY_SIZE(rt5677_ob_4_mix)),
2007 SND_SOC_DAPM_MIXER("OB5 MIX", SND_SOC_NOPM, 0, 0,
2008 rt5677_ob_5_mix, ARRAY_SIZE(rt5677_ob_5_mix)),
2009 SND_SOC_DAPM_MIXER("OB6 MIX", SND_SOC_NOPM, 0, 0,
2010 rt5677_ob_6_mix, ARRAY_SIZE(rt5677_ob_6_mix)),
2011 SND_SOC_DAPM_MIXER("OB7 MIX", SND_SOC_NOPM, 0, 0,
2012 rt5677_ob_7_mix, ARRAY_SIZE(rt5677_ob_7_mix)),
2013
2014 /* Output Side */
2015 /* DAC mixer before sound effect */
2016 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2017 rt5677_dac_l_mix, ARRAY_SIZE(rt5677_dac_l_mix)),
2018 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2019 rt5677_dac_r_mix, ARRAY_SIZE(rt5677_dac_r_mix)),
2020 SND_SOC_DAPM_PGA("DAC1 FS", SND_SOC_NOPM, 0, 0, NULL, 0),
2021
2022 /* DAC Mux */
2023 SND_SOC_DAPM_MUX("DAC1 Mux", SND_SOC_NOPM, 0, 0,
2024 &rt5677_dac1_mux),
2025 SND_SOC_DAPM_MUX("ADDA1 Mux", SND_SOC_NOPM, 0, 0,
2026 &rt5677_adda1_mux),
2027 SND_SOC_DAPM_MUX("DAC12 SRC Mux", SND_SOC_NOPM, 0, 0,
2028 &rt5677_dac12_mux),
2029 SND_SOC_DAPM_MUX("DAC3 SRC Mux", SND_SOC_NOPM, 0, 0,
2030 &rt5677_dac3_mux),
2031
2032 /* DAC2 channel Mux */
2033 SND_SOC_DAPM_MUX("DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2034 &rt5677_dac2_l_mux),
2035 SND_SOC_DAPM_MUX("DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2036 &rt5677_dac2_r_mux),
2037
2038 /* DAC3 channel Mux */
2039 SND_SOC_DAPM_MUX("DAC3 L Mux", SND_SOC_NOPM, 0, 0,
2040 &rt5677_dac3_l_mux),
2041 SND_SOC_DAPM_MUX("DAC3 R Mux", SND_SOC_NOPM, 0, 0,
2042 &rt5677_dac3_r_mux),
2043
2044 /* DAC4 channel Mux */
2045 SND_SOC_DAPM_MUX("DAC4 L Mux", SND_SOC_NOPM, 0, 0,
2046 &rt5677_dac4_l_mux),
2047 SND_SOC_DAPM_MUX("DAC4 R Mux", SND_SOC_NOPM, 0, 0,
2048 &rt5677_dac4_r_mux),
2049
2050 /* DAC Mixer */
2051 SND_SOC_DAPM_SUPPLY("dac stereo1 filter", RT5677_PWR_DIG2,
2052 RT5677_PWR_DAC_S1F_BIT, 0, NULL, 0),
2053 SND_SOC_DAPM_SUPPLY("dac mono left filter", RT5677_PWR_DIG2,
2054 RT5677_PWR_DAC_M2F_L_BIT, 0, NULL, 0),
2055 SND_SOC_DAPM_SUPPLY("dac mono right filter", RT5677_PWR_DIG2,
2056 RT5677_PWR_DAC_M2F_R_BIT, 0, NULL, 0),
2057
2058 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2059 rt5677_sto1_dac_l_mix, ARRAY_SIZE(rt5677_sto1_dac_l_mix)),
2060 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2061 rt5677_sto1_dac_r_mix, ARRAY_SIZE(rt5677_sto1_dac_r_mix)),
2062 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2063 rt5677_mono_dac_l_mix, ARRAY_SIZE(rt5677_mono_dac_l_mix)),
2064 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2065 rt5677_mono_dac_r_mix, ARRAY_SIZE(rt5677_mono_dac_r_mix)),
2066 SND_SOC_DAPM_MIXER("DD1 MIXL", SND_SOC_NOPM, 0, 0,
2067 rt5677_dd1_l_mix, ARRAY_SIZE(rt5677_dd1_l_mix)),
2068 SND_SOC_DAPM_MIXER("DD1 MIXR", SND_SOC_NOPM, 0, 0,
2069 rt5677_dd1_r_mix, ARRAY_SIZE(rt5677_dd1_r_mix)),
2070 SND_SOC_DAPM_MIXER("DD2 MIXL", SND_SOC_NOPM, 0, 0,
2071 rt5677_dd2_l_mix, ARRAY_SIZE(rt5677_dd2_l_mix)),
2072 SND_SOC_DAPM_MIXER("DD2 MIXR", SND_SOC_NOPM, 0, 0,
2073 rt5677_dd2_r_mix, ARRAY_SIZE(rt5677_dd2_r_mix)),
2074 SND_SOC_DAPM_PGA("Stereo DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2075 SND_SOC_DAPM_PGA("Mono DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2076 SND_SOC_DAPM_PGA("DD1 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2077 SND_SOC_DAPM_PGA("DD2 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2078
2079 /* DACs */
2080 SND_SOC_DAPM_DAC("DAC 1", NULL, RT5677_PWR_DIG1,
2081 RT5677_PWR_DAC1_BIT, 0),
2082 SND_SOC_DAPM_DAC("DAC 2", NULL, RT5677_PWR_DIG1,
2083 RT5677_PWR_DAC2_BIT, 0),
2084 SND_SOC_DAPM_DAC("DAC 3", NULL, RT5677_PWR_DIG1,
2085 RT5677_PWR_DAC3_BIT, 0),
2086
2087 /* PDM */
2088 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5677_PWR_DIG2,
2089 RT5677_PWR_PDM1_BIT, 0, NULL, 0),
2090 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5677_PWR_DIG2,
2091 RT5677_PWR_PDM2_BIT, 0, NULL, 0),
2092
2093 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5677_PDM_OUT_CTRL, RT5677_M_PDM1_L_SFT,
2094 1, &rt5677_pdm1_l_mux),
2095 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5677_PDM_OUT_CTRL, RT5677_M_PDM1_R_SFT,
2096 1, &rt5677_pdm1_r_mux),
2097 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5677_PDM_OUT_CTRL, RT5677_M_PDM2_L_SFT,
2098 1, &rt5677_pdm2_l_mux),
2099 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5677_PDM_OUT_CTRL, RT5677_M_PDM2_R_SFT,
2100 1, &rt5677_pdm2_r_mux),
2101
2102 SND_SOC_DAPM_PGA_S("LOUT1 amp", 1, RT5677_PWR_ANLG1, RT5677_PWR_LO1_BIT,
2103 0, NULL, 0),
2104 SND_SOC_DAPM_PGA_S("LOUT2 amp", 1, RT5677_PWR_ANLG1, RT5677_PWR_LO2_BIT,
2105 0, NULL, 0),
2106 SND_SOC_DAPM_PGA_S("LOUT3 amp", 1, RT5677_PWR_ANLG1, RT5677_PWR_LO3_BIT,
2107 0, NULL, 0),
2108
2109 /* Output Lines */
2110 SND_SOC_DAPM_OUTPUT("LOUT1"),
2111 SND_SOC_DAPM_OUTPUT("LOUT2"),
2112 SND_SOC_DAPM_OUTPUT("LOUT3"),
2113 SND_SOC_DAPM_OUTPUT("PDM1L"),
2114 SND_SOC_DAPM_OUTPUT("PDM1R"),
2115 SND_SOC_DAPM_OUTPUT("PDM2L"),
2116 SND_SOC_DAPM_OUTPUT("PDM2R"),
2117};
2118
2119static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
2120 { "DMIC1", NULL, "DMIC L1" },
2121 { "DMIC1", NULL, "DMIC R1" },
2122 { "DMIC2", NULL, "DMIC L2" },
2123 { "DMIC2", NULL, "DMIC R2" },
2124 { "DMIC3", NULL, "DMIC L3" },
2125 { "DMIC3", NULL, "DMIC R3" },
2126 { "DMIC4", NULL, "DMIC L4" },
2127 { "DMIC4", NULL, "DMIC R4" },
2128
2129 { "DMIC L1", NULL, "DMIC CLK" },
2130 { "DMIC R1", NULL, "DMIC CLK" },
2131 { "DMIC L2", NULL, "DMIC CLK" },
2132 { "DMIC R2", NULL, "DMIC CLK" },
2133 { "DMIC L3", NULL, "DMIC CLK" },
2134 { "DMIC R3", NULL, "DMIC CLK" },
2135 { "DMIC L4", NULL, "DMIC CLK" },
2136 { "DMIC R4", NULL, "DMIC CLK" },
2137
2138 { "BST1", NULL, "IN1P" },
2139 { "BST1", NULL, "IN1N" },
2140 { "BST2", NULL, "IN2P" },
2141 { "BST2", NULL, "IN2N" },
2142
2143 { "IN1P", NULL, "micbias1" },
2144 { "IN1N", NULL, "micbias1" },
2145 { "IN2P", NULL, "micbias1" },
2146 { "IN2N", NULL, "micbias1" },
2147
2148 { "ADC 1", NULL, "BST1" },
2149 { "ADC 1", NULL, "ADC 1 power" },
2150 { "ADC 1", NULL, "ADC1 clock" },
2151 { "ADC 2", NULL, "BST2" },
2152 { "ADC 2", NULL, "ADC 2 power" },
2153 { "ADC 2", NULL, "ADC2 clock" },
2154
2155 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2156 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2157 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
2158 { "Stereo1 DMIC Mux", "DMIC4", "DMIC4" },
2159
2160 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
2161 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
2162 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
2163 { "Stereo2 DMIC Mux", "DMIC4", "DMIC4" },
2164
2165 { "Stereo3 DMIC Mux", "DMIC1", "DMIC1" },
2166 { "Stereo3 DMIC Mux", "DMIC2", "DMIC2" },
2167 { "Stereo3 DMIC Mux", "DMIC3", "DMIC3" },
2168 { "Stereo3 DMIC Mux", "DMIC4", "DMIC4" },
2169
2170 { "Stereo4 DMIC Mux", "DMIC1", "DMIC1" },
2171 { "Stereo4 DMIC Mux", "DMIC2", "DMIC2" },
2172 { "Stereo4 DMIC Mux", "DMIC3", "DMIC3" },
2173 { "Stereo4 DMIC Mux", "DMIC4", "DMIC4" },
2174
2175 { "Mono DMIC L Mux", "DMIC1", "DMIC1" },
2176 { "Mono DMIC L Mux", "DMIC2", "DMIC2" },
2177 { "Mono DMIC L Mux", "DMIC3", "DMIC3" },
2178 { "Mono DMIC L Mux", "DMIC4", "DMIC4" },
2179
2180 { "Mono DMIC R Mux", "DMIC1", "DMIC1" },
2181 { "Mono DMIC R Mux", "DMIC2", "DMIC2" },
2182 { "Mono DMIC R Mux", "DMIC3", "DMIC3" },
2183 { "Mono DMIC R Mux", "DMIC4", "DMIC4" },
2184
2185 { "ADC 1_2", NULL, "ADC 1" },
2186 { "ADC 1_2", NULL, "ADC 2" },
2187
2188 { "Stereo1 ADC1 Mux", "DD MIX1", "DD1 MIX" },
2189 { "Stereo1 ADC1 Mux", "ADC1/2", "ADC 1_2" },
2190 { "Stereo1 ADC1 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2191
2192 { "Stereo1 ADC2 Mux", "DD MIX1", "DD1 MIX" },
2193 { "Stereo1 ADC2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2194 { "Stereo1 ADC2 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2195
2196 { "Stereo2 ADC1 Mux", "DD MIX1", "DD1 MIX" },
2197 { "Stereo2 ADC1 Mux", "ADC1/2", "ADC 1_2" },
2198 { "Stereo2 ADC1 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2199
2200 { "Stereo2 ADC2 Mux", "DD MIX1", "DD1 MIX" },
2201 { "Stereo2 ADC2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2202 { "Stereo2 ADC2 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2203
2204 { "Stereo3 ADC1 Mux", "DD MIX1", "DD1 MIX" },
2205 { "Stereo3 ADC1 Mux", "ADC1/2", "ADC 1_2" },
2206 { "Stereo3 ADC1 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2207
2208 { "Stereo3 ADC2 Mux", "DD MIX1", "DD1 MIX" },
2209 { "Stereo3 ADC2 Mux", "DMIC", "Stereo3 DMIC Mux" },
2210 { "Stereo3 ADC2 Mux", "Stereo DAC MIX", "Stereo DAC MIX" },
2211
2212 { "Stereo4 ADC1 Mux", "DD MIX1", "DD1 MIX" },
2213 { "Stereo4 ADC1 Mux", "ADC1/2", "ADC 1_2" },
2214 { "Stereo4 ADC1 Mux", "DD MIX2", "DD2 MIX" },
2215
2216 { "Stereo4 ADC2 Mux", "DD MIX1", "DD1 MIX" },
2217 { "Stereo4 ADC2 Mux", "DMIC", "Stereo3 DMIC Mux" },
2218 { "Stereo4 ADC2 Mux", "DD MIX2", "DD2 MIX" },
2219
2220 { "Mono ADC2 L Mux", "DD MIX1L", "DD1 MIXL" },
2221 { "Mono ADC2 L Mux", "DMIC", "Mono DMIC L Mux" },
2222 { "Mono ADC2 L Mux", "MONO DAC MIXL", "Mono DAC MIXL" },
2223
2224 { "Mono ADC1 L Mux", "DD MIX1L", "DD1 MIXL" },
2225 { "Mono ADC1 L Mux", "ADC1", "ADC 1" },
2226 { "Mono ADC1 L Mux", "MONO DAC MIXL", "Mono DAC MIXL" },
2227
2228 { "Mono ADC1 R Mux", "DD MIX1R", "DD1 MIXR" },
2229 { "Mono ADC1 R Mux", "ADC2", "ADC 2" },
2230 { "Mono ADC1 R Mux", "MONO DAC MIXR", "Mono DAC MIXR" },
2231
2232 { "Mono ADC2 R Mux", "DD MIX1R", "DD1 MIXR" },
2233 { "Mono ADC2 R Mux", "DMIC", "Mono DMIC R Mux" },
2234 { "Mono ADC2 R Mux", "MONO DAC MIXR", "Mono DAC MIXR" },
2235
2236 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC1 Mux" },
2237 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC2 Mux" },
2238 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC1 Mux" },
2239 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC2 Mux" },
2240
2241 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2242 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2243 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2244
2245 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2246 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2247 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2248
2249 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2250 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2251
2252 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC1 Mux" },
2253 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC2 Mux" },
2254 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC1 Mux" },
2255 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC2 Mux" },
2256
2257 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2258 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2259
2260 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2261 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2262
2263 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2264 { "Stereo2 ADC MIXL", NULL, "adc stereo2 filter" },
2265 { "adc stereo2 filter", NULL, "PLL1", is_sys_clk_from_pll },
2266
2267 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2268 { "Stereo2 ADC MIXR", NULL, "adc stereo2 filter" },
2269 { "adc stereo2 filter", NULL, "PLL1", is_sys_clk_from_pll },
2270
2271 { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXL" },
2272 { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXR" },
2273
2274 { "Sto3 ADC MIXL", "ADC1 Switch", "Stereo3 ADC1 Mux" },
2275 { "Sto3 ADC MIXL", "ADC2 Switch", "Stereo3 ADC2 Mux" },
2276 { "Sto3 ADC MIXR", "ADC1 Switch", "Stereo3 ADC1 Mux" },
2277 { "Sto3 ADC MIXR", "ADC2 Switch", "Stereo3 ADC2 Mux" },
2278
2279 { "Stereo3 ADC MIXL", NULL, "Sto3 ADC MIXL" },
2280 { "Stereo3 ADC MIXL", NULL, "adc stereo3 filter" },
2281 { "adc stereo3 filter", NULL, "PLL1", is_sys_clk_from_pll },
2282
2283 { "Stereo3 ADC MIXR", NULL, "Sto3 ADC MIXR" },
2284 { "Stereo3 ADC MIXR", NULL, "adc stereo3 filter" },
2285 { "adc stereo3 filter", NULL, "PLL1", is_sys_clk_from_pll },
2286
2287 { "Stereo3 ADC MIX", NULL, "Stereo3 ADC MIXL" },
2288 { "Stereo3 ADC MIX", NULL, "Stereo3 ADC MIXR" },
2289
2290 { "Sto4 ADC MIXL", "ADC1 Switch", "Stereo4 ADC1 Mux" },
2291 { "Sto4 ADC MIXL", "ADC2 Switch", "Stereo4 ADC2 Mux" },
2292 { "Sto4 ADC MIXR", "ADC1 Switch", "Stereo4 ADC1 Mux" },
2293 { "Sto4 ADC MIXR", "ADC2 Switch", "Stereo4 ADC2 Mux" },
2294
2295 { "Stereo4 ADC MIXL", NULL, "Sto4 ADC MIXL" },
2296 { "Stereo4 ADC MIXL", NULL, "adc stereo4 filter" },
2297 { "adc stereo4 filter", NULL, "PLL1", is_sys_clk_from_pll },
2298
2299 { "Stereo4 ADC MIXR", NULL, "Sto4 ADC MIXR" },
2300 { "Stereo4 ADC MIXR", NULL, "adc stereo4 filter" },
2301 { "adc stereo4 filter", NULL, "PLL1", is_sys_clk_from_pll },
2302
2303 { "Stereo4 ADC MIX", NULL, "Stereo4 ADC MIXL" },
2304 { "Stereo4 ADC MIX", NULL, "Stereo4 ADC MIXR" },
2305
2306 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC1 L Mux" },
2307 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC2 L Mux" },
2308 { "Mono ADC MIXL", NULL, "adc mono left filter" },
2309 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2310
2311 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC1 R Mux" },
2312 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC2 R Mux" },
2313 { "Mono ADC MIXR", NULL, "adc mono right filter" },
2314 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2315
2316 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2317 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2318
2319 { "VAD ADC Mux", "STO1 ADC MIX L", "Stereo1 ADC MIXL" },
2320 { "VAD ADC Mux", "MONO ADC MIX L", "Mono ADC MIXL" },
2321 { "VAD ADC Mux", "MONO ADC MIX R", "Mono ADC MIXR" },
2322 { "VAD ADC Mux", "STO2 ADC MIX L", "Stereo2 ADC MIXL" },
2323 { "VAD ADC Mux", "STO3 ADC MIX L", "Stereo3 ADC MIXL" },
2324
2325 { "IF1 ADC1 Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2326 { "IF1 ADC1 Mux", "OB01", "OB01 Bypass Mux" },
2327 { "IF1 ADC1 Mux", "VAD ADC", "VAD ADC Mux" },
2328
2329 { "IF1 ADC2 Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2330 { "IF1 ADC2 Mux", "OB23", "OB23 Bypass Mux" },
2331
2332 { "IF1 ADC3 Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2333 { "IF1 ADC3 Mux", "MONO ADC MIX", "Mono ADC MIX" },
2334 { "IF1 ADC3 Mux", "OB45", "OB45" },
2335
2336 { "IF1 ADC4 Mux", "STO4 ADC MIX", "Stereo4 ADC MIX" },
2337 { "IF1 ADC4 Mux", "OB67", "OB67" },
2338 { "IF1 ADC4 Mux", "OB01", "OB01 Bypass Mux" },
2339
2340 { "AIF1TX", NULL, "I2S1" },
2341 { "AIF1TX", NULL, "IF1 ADC1 Mux" },
2342 { "AIF1TX", NULL, "IF1 ADC2 Mux" },
2343 { "AIF1TX", NULL, "IF1 ADC3 Mux" },
2344 { "AIF1TX", NULL, "IF1 ADC4 Mux" },
2345
2346 { "IF2 ADC1 Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2347 { "IF2 ADC1 Mux", "OB01", "OB01 Bypass Mux" },
2348 { "IF2 ADC1 Mux", "VAD ADC", "VAD ADC Mux" },
2349
2350 { "IF2 ADC2 Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2351 { "IF2 ADC2 Mux", "OB23", "OB23 Bypass Mux" },
2352
2353 { "IF2 ADC3 Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2354 { "IF2 ADC3 Mux", "MONO ADC MIX", "Mono ADC MIX" },
2355 { "IF2 ADC3 Mux", "OB45", "OB45" },
2356
2357 { "IF2 ADC4 Mux", "STO4 ADC MIX", "Stereo4 ADC MIX" },
2358 { "IF2 ADC4 Mux", "OB67", "OB67" },
2359 { "IF2 ADC4 Mux", "OB01", "OB01 Bypass Mux" },
2360
2361 { "AIF2TX", NULL, "I2S2" },
2362 { "AIF2TX", NULL, "IF2 ADC1 Mux" },
2363 { "AIF2TX", NULL, "IF2 ADC2 Mux" },
2364 { "AIF2TX", NULL, "IF2 ADC3 Mux" },
2365 { "AIF2TX", NULL, "IF2 ADC4 Mux" },
2366
2367 { "IF3 ADC Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2368 { "IF3 ADC Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2369 { "IF3 ADC Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2370 { "IF3 ADC Mux", "STO4 ADC MIX", "Stereo4 ADC MIX" },
2371 { "IF3 ADC Mux", "MONO ADC MIX", "Mono ADC MIX" },
2372 { "IF3 ADC Mux", "OB01", "OB01 Bypass Mux" },
2373 { "IF3 ADC Mux", "OB23", "OB23 Bypass Mux" },
2374 { "IF3 ADC Mux", "VAD ADC", "VAD ADC Mux" },
2375
2376 { "AIF3TX", NULL, "I2S3" },
2377 { "AIF3TX", NULL, "IF3 ADC Mux" },
2378
2379 { "IF4 ADC Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2380 { "IF4 ADC Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2381 { "IF4 ADC Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2382 { "IF4 ADC Mux", "STO4 ADC MIX", "Stereo4 ADC MIX" },
2383 { "IF4 ADC Mux", "MONO ADC MIX", "Mono ADC MIX" },
2384 { "IF4 ADC Mux", "OB01", "OB01 Bypass Mux" },
2385 { "IF4 ADC Mux", "OB23", "OB23 Bypass Mux" },
2386 { "IF4 ADC Mux", "VAD ADC", "VAD ADC Mux" },
2387
2388 { "AIF4TX", NULL, "I2S4" },
2389 { "AIF4TX", NULL, "IF4 ADC Mux" },
2390
2391 { "SLB ADC1 Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2392 { "SLB ADC1 Mux", "OB01", "OB01 Bypass Mux" },
2393 { "SLB ADC1 Mux", "VAD ADC", "VAD ADC Mux" },
2394
2395 { "SLB ADC2 Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2396 { "SLB ADC2 Mux", "OB23", "OB23 Bypass Mux" },
2397
2398 { "SLB ADC3 Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2399 { "SLB ADC3 Mux", "MONO ADC MIX", "Mono ADC MIX" },
2400 { "SLB ADC3 Mux", "OB45", "OB45" },
2401
2402 { "SLB ADC4 Mux", "STO4 ADC MIX", "Stereo4 ADC MIX" },
2403 { "SLB ADC4 Mux", "OB67", "OB67" },
2404 { "SLB ADC4 Mux", "OB01", "OB01 Bypass Mux" },
2405
2406 { "SLBTX", NULL, "SLB" },
2407 { "SLBTX", NULL, "SLB ADC1 Mux" },
2408 { "SLBTX", NULL, "SLB ADC2 Mux" },
2409 { "SLBTX", NULL, "SLB ADC3 Mux" },
2410 { "SLBTX", NULL, "SLB ADC4 Mux" },
2411
2412 { "IB01 Mux", "IF1 DAC 01", "IF1 DAC01" },
2413 { "IB01 Mux", "IF2 DAC 01", "IF2 DAC01" },
2414 { "IB01 Mux", "SLB DAC 01", "SLB DAC01" },
2415 { "IB01 Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2416 { "IB01 Mux", "VAD ADC/DAC1 FS", "DAC1 FS" },
2417
2418 { "IB01 Bypass Mux", "Bypass", "IB01 Mux" },
2419 { "IB01 Bypass Mux", "Pass SRC", "IB01 Mux" },
2420
2421 { "IB23 Mux", "IF1 DAC 23", "IF1 DAC23" },
2422 { "IB23 Mux", "IF2 DAC 23", "IF2 DAC23" },
2423 { "IB23 Mux", "SLB DAC 23", "SLB DAC23" },
2424 { "IB23 Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2425 { "IB23 Mux", "DAC1 FS", "DAC1 FS" },
2426 { "IB23 Mux", "IF4 DAC", "IF4 DAC" },
2427
2428 { "IB23 Bypass Mux", "Bypass", "IB23 Mux" },
2429 { "IB23 Bypass Mux", "Pass SRC", "IB23 Mux" },
2430
2431 { "IB45 Mux", "IF1 DAC 45", "IF1 DAC45" },
2432 { "IB45 Mux", "IF2 DAC 45", "IF2 DAC45" },
2433 { "IB45 Mux", "SLB DAC 45", "SLB DAC45" },
2434 { "IB45 Mux", "STO3 ADC MIX", "Stereo3 ADC MIX" },
2435 { "IB45 Mux", "IF3 DAC", "IF3 DAC" },
2436
2437 { "IB45 Bypass Mux", "Bypass", "IB45 Mux" },
2438 { "IB45 Bypass Mux", "Pass SRC", "IB45 Mux" },
2439
2440 { "IB6 Mux", "IF1 DAC 6", "IF1 DAC6" },
2441 { "IB6 Mux", "IF2 DAC 6", "IF2 DAC6" },
2442 { "IB6 Mux", "SLB DAC 6", "SLB DAC6" },
2443 { "IB6 Mux", "STO4 ADC MIX L", "Stereo4 ADC MIXL" },
2444 { "IB6 Mux", "IF4 DAC L", "IF4 DAC L" },
2445 { "IB6 Mux", "STO1 ADC MIX L", "Stereo1 ADC MIXL" },
2446 { "IB6 Mux", "STO2 ADC MIX L", "Stereo2 ADC MIXL" },
2447 { "IB6 Mux", "STO3 ADC MIX L", "Stereo3 ADC MIXL" },
2448
2449 { "IB7 Mux", "IF1 DAC 7", "IF1 DAC7" },
2450 { "IB7 Mux", "IF2 DAC 7", "IF2 DAC7" },
2451 { "IB7 Mux", "SLB DAC 7", "SLB DAC7" },
2452 { "IB7 Mux", "STO4 ADC MIX R", "Stereo4 ADC MIXR" },
2453 { "IB7 Mux", "IF4 DAC R", "IF4 DAC R" },
2454 { "IB7 Mux", "STO1 ADC MIX R", "Stereo1 ADC MIXR" },
2455 { "IB7 Mux", "STO2 ADC MIX R", "Stereo2 ADC MIXR" },
2456 { "IB7 Mux", "STO3 ADC MIX R", "Stereo3 ADC MIXR" },
2457
2458 { "IB8 Mux", "STO1 ADC MIX L", "Stereo1 ADC MIXL" },
2459 { "IB8 Mux", "STO2 ADC MIX L", "Stereo2 ADC MIXL" },
2460 { "IB8 Mux", "STO3 ADC MIX L", "Stereo3 ADC MIXL" },
2461 { "IB8 Mux", "STO4 ADC MIX L", "Stereo4 ADC MIXL" },
2462 { "IB8 Mux", "MONO ADC MIX L", "Mono ADC MIXL" },
2463 { "IB8 Mux", "DACL1 FS", "DAC1 MIXL" },
2464
2465 { "IB9 Mux", "STO1 ADC MIX R", "Stereo1 ADC MIXR" },
2466 { "IB9 Mux", "STO2 ADC MIX R", "Stereo2 ADC MIXR" },
2467 { "IB9 Mux", "STO3 ADC MIX R", "Stereo3 ADC MIXR" },
2468 { "IB9 Mux", "STO4 ADC MIX R", "Stereo4 ADC MIXR" },
2469 { "IB9 Mux", "MONO ADC MIX R", "Mono ADC MIXR" },
2470 { "IB9 Mux", "DACR1 FS", "DAC1 MIXR" },
2471 { "IB9 Mux", "DAC1 FS", "DAC1 FS" },
2472
2473 { "OB01 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2474 { "OB01 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2475 { "OB01 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2476 { "OB01 MIX", "IB6 Switch", "IB6 Mux" },
2477 { "OB01 MIX", "IB7 Switch", "IB7 Mux" },
2478 { "OB01 MIX", "IB8 Switch", "IB8 Mux" },
2479 { "OB01 MIX", "IB9 Switch", "IB9 Mux" },
2480
2481 { "OB23 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2482 { "OB23 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2483 { "OB23 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2484 { "OB23 MIX", "IB6 Switch", "IB6 Mux" },
2485 { "OB23 MIX", "IB7 Switch", "IB7 Mux" },
2486 { "OB23 MIX", "IB8 Switch", "IB8 Mux" },
2487 { "OB23 MIX", "IB9 Switch", "IB9 Mux" },
2488
2489 { "OB4 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2490 { "OB4 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2491 { "OB4 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2492 { "OB4 MIX", "IB6 Switch", "IB6 Mux" },
2493 { "OB4 MIX", "IB7 Switch", "IB7 Mux" },
2494 { "OB4 MIX", "IB8 Switch", "IB8 Mux" },
2495 { "OB4 MIX", "IB9 Switch", "IB9 Mux" },
2496
2497 { "OB5 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2498 { "OB5 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2499 { "OB5 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2500 { "OB5 MIX", "IB6 Switch", "IB6 Mux" },
2501 { "OB5 MIX", "IB7 Switch", "IB7 Mux" },
2502 { "OB5 MIX", "IB8 Switch", "IB8 Mux" },
2503 { "OB5 MIX", "IB9 Switch", "IB9 Mux" },
2504
2505 { "OB6 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2506 { "OB6 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2507 { "OB6 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2508 { "OB6 MIX", "IB6 Switch", "IB6 Mux" },
2509 { "OB6 MIX", "IB7 Switch", "IB7 Mux" },
2510 { "OB6 MIX", "IB8 Switch", "IB8 Mux" },
2511 { "OB6 MIX", "IB9 Switch", "IB9 Mux" },
2512
2513 { "OB7 MIX", "IB01 Switch", "IB01 Bypass Mux" },
2514 { "OB7 MIX", "IB23 Switch", "IB23 Bypass Mux" },
2515 { "OB7 MIX", "IB45 Switch", "IB45 Bypass Mux" },
2516 { "OB7 MIX", "IB6 Switch", "IB6 Mux" },
2517 { "OB7 MIX", "IB7 Switch", "IB7 Mux" },
2518 { "OB7 MIX", "IB8 Switch", "IB8 Mux" },
2519 { "OB7 MIX", "IB9 Switch", "IB9 Mux" },
2520
2521 { "OB01 Bypass Mux", "Bypass", "OB01 MIX" },
2522 { "OB01 Bypass Mux", "Pass SRC", "OB01 MIX" },
2523 { "OB23 Bypass Mux", "Bypass", "OB23 MIX" },
2524 { "OB23 Bypass Mux", "Pass SRC", "OB23 MIX" },
2525
2526 { "OutBound2", NULL, "OB23 Bypass Mux" },
2527 { "OutBound3", NULL, "OB23 Bypass Mux" },
2528 { "OutBound4", NULL, "OB4 MIX" },
2529 { "OutBound5", NULL, "OB5 MIX" },
2530 { "OutBound6", NULL, "OB6 MIX" },
2531 { "OutBound7", NULL, "OB7 MIX" },
2532
2533 { "OB45", NULL, "OutBound4" },
2534 { "OB45", NULL, "OutBound5" },
2535 { "OB67", NULL, "OutBound6" },
2536 { "OB67", NULL, "OutBound7" },
2537
2538 { "IF1 DAC0", NULL, "AIF1RX" },
2539 { "IF1 DAC1", NULL, "AIF1RX" },
2540 { "IF1 DAC2", NULL, "AIF1RX" },
2541 { "IF1 DAC3", NULL, "AIF1RX" },
2542 { "IF1 DAC4", NULL, "AIF1RX" },
2543 { "IF1 DAC5", NULL, "AIF1RX" },
2544 { "IF1 DAC6", NULL, "AIF1RX" },
2545 { "IF1 DAC7", NULL, "AIF1RX" },
2546 { "IF1 DAC0", NULL, "I2S1" },
2547 { "IF1 DAC1", NULL, "I2S1" },
2548 { "IF1 DAC2", NULL, "I2S1" },
2549 { "IF1 DAC3", NULL, "I2S1" },
2550 { "IF1 DAC4", NULL, "I2S1" },
2551 { "IF1 DAC5", NULL, "I2S1" },
2552 { "IF1 DAC6", NULL, "I2S1" },
2553 { "IF1 DAC7", NULL, "I2S1" },
2554
2555 { "IF1 DAC01", NULL, "IF1 DAC0" },
2556 { "IF1 DAC01", NULL, "IF1 DAC1" },
2557 { "IF1 DAC23", NULL, "IF1 DAC2" },
2558 { "IF1 DAC23", NULL, "IF1 DAC3" },
2559 { "IF1 DAC45", NULL, "IF1 DAC4" },
2560 { "IF1 DAC45", NULL, "IF1 DAC5" },
2561 { "IF1 DAC67", NULL, "IF1 DAC6" },
2562 { "IF1 DAC67", NULL, "IF1 DAC7" },
2563
2564 { "IF2 DAC0", NULL, "AIF2RX" },
2565 { "IF2 DAC1", NULL, "AIF2RX" },
2566 { "IF2 DAC2", NULL, "AIF2RX" },
2567 { "IF2 DAC3", NULL, "AIF2RX" },
2568 { "IF2 DAC4", NULL, "AIF2RX" },
2569 { "IF2 DAC5", NULL, "AIF2RX" },
2570 { "IF2 DAC6", NULL, "AIF2RX" },
2571 { "IF2 DAC7", NULL, "AIF2RX" },
2572 { "IF2 DAC0", NULL, "I2S2" },
2573 { "IF2 DAC1", NULL, "I2S2" },
2574 { "IF2 DAC2", NULL, "I2S2" },
2575 { "IF2 DAC3", NULL, "I2S2" },
2576 { "IF2 DAC4", NULL, "I2S2" },
2577 { "IF2 DAC5", NULL, "I2S2" },
2578 { "IF2 DAC6", NULL, "I2S2" },
2579 { "IF2 DAC7", NULL, "I2S2" },
2580
2581 { "IF2 DAC01", NULL, "IF2 DAC0" },
2582 { "IF2 DAC01", NULL, "IF2 DAC1" },
2583 { "IF2 DAC23", NULL, "IF2 DAC2" },
2584 { "IF2 DAC23", NULL, "IF2 DAC3" },
2585 { "IF2 DAC45", NULL, "IF2 DAC4" },
2586 { "IF2 DAC45", NULL, "IF2 DAC5" },
2587 { "IF2 DAC67", NULL, "IF2 DAC6" },
2588 { "IF2 DAC67", NULL, "IF2 DAC7" },
2589
2590 { "IF3 DAC", NULL, "AIF3RX" },
2591 { "IF3 DAC", NULL, "I2S3" },
2592
2593 { "IF4 DAC", NULL, "AIF4RX" },
2594 { "IF4 DAC", NULL, "I2S4" },
2595
2596 { "IF3 DAC L", NULL, "IF3 DAC" },
2597 { "IF3 DAC R", NULL, "IF3 DAC" },
2598
2599 { "IF4 DAC L", NULL, "IF4 DAC" },
2600 { "IF4 DAC R", NULL, "IF4 DAC" },
2601
2602 { "SLB DAC0", NULL, "SLBRX" },
2603 { "SLB DAC1", NULL, "SLBRX" },
2604 { "SLB DAC2", NULL, "SLBRX" },
2605 { "SLB DAC3", NULL, "SLBRX" },
2606 { "SLB DAC4", NULL, "SLBRX" },
2607 { "SLB DAC5", NULL, "SLBRX" },
2608 { "SLB DAC6", NULL, "SLBRX" },
2609 { "SLB DAC7", NULL, "SLBRX" },
2610 { "SLB DAC0", NULL, "SLB" },
2611 { "SLB DAC1", NULL, "SLB" },
2612 { "SLB DAC2", NULL, "SLB" },
2613 { "SLB DAC3", NULL, "SLB" },
2614 { "SLB DAC4", NULL, "SLB" },
2615 { "SLB DAC5", NULL, "SLB" },
2616 { "SLB DAC6", NULL, "SLB" },
2617 { "SLB DAC7", NULL, "SLB" },
2618
2619 { "SLB DAC01", NULL, "SLB DAC0" },
2620 { "SLB DAC01", NULL, "SLB DAC1" },
2621 { "SLB DAC23", NULL, "SLB DAC2" },
2622 { "SLB DAC23", NULL, "SLB DAC3" },
2623 { "SLB DAC45", NULL, "SLB DAC4" },
2624 { "SLB DAC45", NULL, "SLB DAC5" },
2625 { "SLB DAC67", NULL, "SLB DAC6" },
2626 { "SLB DAC67", NULL, "SLB DAC7" },
2627
2628 { "ADDA1 Mux", "STO1 ADC MIX", "Stereo1 ADC MIX" },
2629 { "ADDA1 Mux", "STO2 ADC MIX", "Stereo2 ADC MIX" },
2630 { "ADDA1 Mux", "OB 67", "OB67" },
2631
2632 { "DAC1 Mux", "IF1 DAC 01", "IF1 DAC01" },
2633 { "DAC1 Mux", "IF2 DAC 01", "IF2 DAC01" },
2634 { "DAC1 Mux", "IF3 DAC LR", "IF3 DAC" },
2635 { "DAC1 Mux", "IF4 DAC LR", "IF4 DAC" },
2636 { "DAC1 Mux", "SLB DAC 01", "SLB DAC01" },
2637 { "DAC1 Mux", "OB 01", "OB01 Bypass Mux" },
2638
2639 { "DAC1 MIXL", "Stereo ADC Switch", "ADDA1 Mux" },
2640 { "DAC1 MIXL", "DAC1 Switch", "DAC1 Mux" },
2641 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2642 { "DAC1 MIXR", "Stereo ADC Switch", "ADDA1 Mux" },
2643 { "DAC1 MIXR", "DAC1 Switch", "DAC1 Mux" },
2644 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2645
2646 { "DAC1 FS", NULL, "DAC1 MIXL" },
2647 { "DAC1 FS", NULL, "DAC1 MIXR" },
2648
2649 { "DAC2 L Mux", "IF1 DAC 2", "IF1 DAC2" },
2650 { "DAC2 L Mux", "IF2 DAC 2", "IF2 DAC2" },
2651 { "DAC2 L Mux", "IF3 DAC L", "IF3 DAC L" },
2652 { "DAC2 L Mux", "IF4 DAC L", "IF4 DAC L" },
2653 { "DAC2 L Mux", "SLB DAC 2", "SLB DAC2" },
2654 { "DAC2 L Mux", "OB 2", "OutBound2" },
2655
2656 { "DAC2 R Mux", "IF1 DAC 3", "IF1 DAC3" },
2657 { "DAC2 R Mux", "IF2 DAC 3", "IF2 DAC3" },
2658 { "DAC2 R Mux", "IF3 DAC R", "IF3 DAC R" },
2659 { "DAC2 R Mux", "IF4 DAC R", "IF4 DAC R" },
2660 { "DAC2 R Mux", "SLB DAC 3", "SLB DAC3" },
2661 { "DAC2 R Mux", "OB 3", "OutBound3" },
2662 { "DAC2 R Mux", "Haptic Generator", "Haptic Generator" },
2663 { "DAC2 R Mux", "VAD ADC", "VAD ADC Mux" },
2664
2665 { "DAC3 L Mux", "IF1 DAC 4", "IF1 DAC4" },
2666 { "DAC3 L Mux", "IF2 DAC 4", "IF2 DAC4" },
2667 { "DAC3 L Mux", "IF3 DAC L", "IF3 DAC L" },
2668 { "DAC3 L Mux", "IF4 DAC L", "IF4 DAC L" },
2669 { "DAC3 L Mux", "SLB DAC 4", "SLB DAC4" },
2670 { "DAC3 L Mux", "OB 4", "OutBound4" },
2671
2672 { "DAC3 R Mux", "IF1 DAC 5", "IF1 DAC4" },
2673 { "DAC3 R Mux", "IF2 DAC 5", "IF2 DAC4" },
2674 { "DAC3 R Mux", "IF3 DAC R", "IF3 DAC R" },
2675 { "DAC3 R Mux", "IF4 DAC R", "IF4 DAC R" },
2676 { "DAC3 R Mux", "SLB DAC 5", "SLB DAC5" },
2677 { "DAC3 R Mux", "OB 5", "OutBound5" },
2678
2679 { "DAC4 L Mux", "IF1 DAC 6", "IF1 DAC6" },
2680 { "DAC4 L Mux", "IF2 DAC 6", "IF2 DAC6" },
2681 { "DAC4 L Mux", "IF3 DAC L", "IF3 DAC L" },
2682 { "DAC4 L Mux", "IF4 DAC L", "IF4 DAC L" },
2683 { "DAC4 L Mux", "SLB DAC 6", "SLB DAC6" },
2684 { "DAC4 L Mux", "OB 6", "OutBound6" },
2685
2686 { "DAC4 R Mux", "IF1 DAC 7", "IF1 DAC7" },
2687 { "DAC4 R Mux", "IF2 DAC 7", "IF2 DAC7" },
2688 { "DAC4 R Mux", "IF3 DAC R", "IF3 DAC R" },
2689 { "DAC4 R Mux", "IF4 DAC R", "IF4 DAC R" },
2690 { "DAC4 R Mux", "SLB DAC 7", "SLB DAC7" },
2691 { "DAC4 R Mux", "OB 7", "OutBound7" },
2692
2693 { "Sidetone Mux", "DMIC1 L", "DMIC L1" },
2694 { "Sidetone Mux", "DMIC2 L", "DMIC L2" },
2695 { "Sidetone Mux", "DMIC3 L", "DMIC L3" },
2696 { "Sidetone Mux", "DMIC4 L", "DMIC L4" },
2697 { "Sidetone Mux", "ADC1", "ADC 1" },
2698 { "Sidetone Mux", "ADC2", "ADC 2" },
2699
2700 { "Stereo DAC MIXL", "ST L Switch", "Sidetone Mux" },
2701 { "Stereo DAC MIXL", "DAC1 L Switch", "DAC1 MIXL" },
2702 { "Stereo DAC MIXL", "DAC2 L Switch", "DAC2 L Mux" },
2703 { "Stereo DAC MIXL", "DAC1 R Switch", "DAC1 MIXR" },
2704 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2705 { "Stereo DAC MIXR", "ST R Switch", "Sidetone Mux" },
2706 { "Stereo DAC MIXR", "DAC1 R Switch", "DAC1 MIXR" },
2707 { "Stereo DAC MIXR", "DAC2 R Switch", "DAC2 R Mux" },
2708 { "Stereo DAC MIXR", "DAC1 L Switch", "DAC1 MIXL" },
2709 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2710
2711 { "Mono DAC MIXL", "ST L Switch", "Sidetone Mux" },
2712 { "Mono DAC MIXL", "DAC1 L Switch", "DAC1 MIXL" },
2713 { "Mono DAC MIXL", "DAC2 L Switch", "DAC2 L Mux" },
2714 { "Mono DAC MIXL", "DAC2 R Switch", "DAC2 R Mux" },
2715 { "Mono DAC MIXL", NULL, "dac mono left filter" },
2716 { "Mono DAC MIXR", "ST R Switch", "Sidetone Mux" },
2717 { "Mono DAC MIXR", "DAC1 R Switch", "DAC1 MIXR" },
2718 { "Mono DAC MIXR", "DAC2 R Switch", "DAC2 R Mux" },
2719 { "Mono DAC MIXR", "DAC2 L Switch", "DAC2 L Mux" },
2720 { "Mono DAC MIXR", NULL, "dac mono right filter" },
2721
2722 { "DD1 MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2723 { "DD1 MIXL", "Mono DAC Mix L Switch", "Mono DAC MIXL" },
2724 { "DD1 MIXL", "DAC3 L Switch", "DAC3 L Mux" },
2725 { "DD1 MIXL", "DAC3 R Switch", "DAC3 R Mux" },
2726 { "DD1 MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2727 { "DD1 MIXR", "Mono DAC Mix R Switch", "Mono DAC MIXR" },
2728 { "DD1 MIXR", "DAC3 L Switch", "DAC3 L Mux" },
2729 { "DD1 MIXR", "DAC3 R Switch", "DAC3 R Mux" },
2730
2731 { "DD2 MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2732 { "DD2 MIXL", "Mono DAC Mix L Switch", "Mono DAC MIXL" },
2733 { "DD2 MIXL", "DAC4 L Switch", "DAC4 L Mux" },
2734 { "DD2 MIXL", "DAC4 R Switch", "DAC4 R Mux" },
2735 { "DD2 MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2736 { "DD2 MIXR", "Mono DAC Mix R Switch", "Mono DAC MIXR" },
2737 { "DD2 MIXR", "DAC4 L Switch", "DAC4 L Mux" },
2738 { "DD2 MIXR", "DAC4 R Switch", "DAC4 R Mux" },
2739
2740 { "Stereo DAC MIX", NULL, "Stereo DAC MIXL" },
2741 { "Stereo DAC MIX", NULL, "Stereo DAC MIXR" },
2742 { "Mono DAC MIX", NULL, "Mono DAC MIXL" },
2743 { "Mono DAC MIX", NULL, "Mono DAC MIXR" },
2744 { "DD1 MIX", NULL, "DD1 MIXL" },
2745 { "DD1 MIX", NULL, "DD1 MIXR" },
2746 { "DD2 MIX", NULL, "DD2 MIXL" },
2747 { "DD2 MIX", NULL, "DD2 MIXR" },
2748
2749 { "DAC12 SRC Mux", "STO1 DAC MIX", "Stereo DAC MIX" },
2750 { "DAC12 SRC Mux", "MONO DAC MIX", "Mono DAC MIX" },
2751 { "DAC12 SRC Mux", "DD MIX1", "DD1 MIX" },
2752 { "DAC12 SRC Mux", "DD MIX2", "DD2 MIX" },
2753
2754 { "DAC3 SRC Mux", "MONO DAC MIXL", "Mono DAC MIXL" },
2755 { "DAC3 SRC Mux", "MONO DAC MIXR", "Mono DAC MIXR" },
2756 { "DAC3 SRC Mux", "DD MIX1L", "DD1 MIXL" },
2757 { "DAC3 SRC Mux", "DD MIX2L", "DD2 MIXL" },
2758
2759 { "DAC 1", NULL, "DAC12 SRC Mux" },
2760 { "DAC 1", NULL, "PLL1", is_sys_clk_from_pll },
2761 { "DAC 2", NULL, "DAC12 SRC Mux" },
2762 { "DAC 2", NULL, "PLL1", is_sys_clk_from_pll },
2763 { "DAC 3", NULL, "DAC3 SRC Mux" },
2764 { "DAC 3", NULL, "PLL1", is_sys_clk_from_pll },
2765
2766 { "PDM1 L Mux", "STO1 DAC MIX", "Stereo DAC MIXL" },
2767 { "PDM1 L Mux", "MONO DAC MIX", "Mono DAC MIXL" },
2768 { "PDM1 L Mux", "DD MIX1", "DD1 MIXL" },
2769 { "PDM1 L Mux", "DD MIX2", "DD2 MIXL" },
2770 { "PDM1 L Mux", NULL, "PDM1 Power" },
2771 { "PDM1 R Mux", "STO1 DAC MIX", "Stereo DAC MIXR" },
2772 { "PDM1 R Mux", "MONO DAC MIX", "Mono DAC MIXR" },
2773 { "PDM1 R Mux", "DD MIX1", "DD1 MIXR" },
2774 { "PDM1 R Mux", "DD MIX2", "DD2 MIXR" },
2775 { "PDM1 R Mux", NULL, "PDM1 Power" },
2776 { "PDM2 L Mux", "STO1 DAC MIX", "Stereo DAC MIXL" },
2777 { "PDM2 L Mux", "MONO DAC MIX", "Mono DAC MIXL" },
2778 { "PDM2 L Mux", "DD MIX1", "DD1 MIXL" },
2779 { "PDM2 L Mux", "DD MIX2", "DD2 MIXL" },
2780 { "PDM2 L Mux", NULL, "PDM2 Power" },
2781 { "PDM2 R Mux", "STO1 DAC MIX", "Stereo DAC MIXR" },
2782 { "PDM2 R Mux", "MONO DAC MIX", "Mono DAC MIXR" },
2783 { "PDM2 R Mux", "DD MIX1", "DD1 MIXR" },
2784 { "PDM2 R Mux", "DD MIX1", "DD2 MIXR" },
2785 { "PDM2 R Mux", NULL, "PDM2 Power" },
2786
2787 { "LOUT1 amp", NULL, "DAC 1" },
2788 { "LOUT2 amp", NULL, "DAC 2" },
2789 { "LOUT3 amp", NULL, "DAC 3" },
2790
2791 { "LOUT1", NULL, "LOUT1 amp" },
2792 { "LOUT2", NULL, "LOUT2 amp" },
2793 { "LOUT3", NULL, "LOUT3 amp" },
2794
2795 { "PDM1L", NULL, "PDM1 L Mux" },
2796 { "PDM1R", NULL, "PDM1 R Mux" },
2797 { "PDM2L", NULL, "PDM2 L Mux" },
2798 { "PDM2R", NULL, "PDM2 R Mux" },
2799};
2800
2801static int get_clk_info(int sclk, int rate)
2802{
2803 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
2804
2805 if (sclk <= 0 || rate <= 0)
2806 return -EINVAL;
2807
2808 rate = rate << 8;
2809 for (i = 0; i < ARRAY_SIZE(pd); i++)
2810 if (sclk == rate * pd[i])
2811 return i;
2812
2813 return -EINVAL;
2814}
2815
2816static int rt5677_hw_params(struct snd_pcm_substream *substream,
2817 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2818{
2819 struct snd_soc_codec *codec = dai->codec;
2820 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
2821 unsigned int val_len = 0, val_clk, mask_clk;
2822 int pre_div, bclk_ms, frame_size;
2823
2824 rt5677->lrck[dai->id] = params_rate(params);
2825 pre_div = get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]);
2826 if (pre_div < 0) {
2827 dev_err(codec->dev, "Unsupported clock setting\n");
2828 return -EINVAL;
2829 }
2830 frame_size = snd_soc_params_to_frame_size(params);
2831 if (frame_size < 0) {
2832 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2833 return -EINVAL;
2834 }
2835 bclk_ms = frame_size > 32;
2836 rt5677->bclk[dai->id] = rt5677->lrck[dai->id] * (32 << bclk_ms);
2837
2838 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2839 rt5677->bclk[dai->id], rt5677->lrck[dai->id]);
2840 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2841 bclk_ms, pre_div, dai->id);
2842
2843 switch (params_width(params)) {
2844 case 16:
2845 break;
2846 case 20:
2847 val_len |= RT5677_I2S_DL_20;
2848 break;
2849 case 24:
2850 val_len |= RT5677_I2S_DL_24;
2851 break;
2852 case 8:
2853 val_len |= RT5677_I2S_DL_8;
2854 break;
2855 default:
2856 return -EINVAL;
2857 }
2858
2859 switch (dai->id) {
2860 case RT5677_AIF1:
2861 mask_clk = RT5677_I2S_PD1_MASK;
2862 val_clk = pre_div << RT5677_I2S_PD1_SFT;
2863 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP,
2864 RT5677_I2S_DL_MASK, val_len);
2865 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,
2866 mask_clk, val_clk);
2867 break;
2868 case RT5677_AIF2:
2869 mask_clk = RT5677_I2S_PD2_MASK;
2870 val_clk = pre_div << RT5677_I2S_PD2_SFT;
2871 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP,
2872 RT5677_I2S_DL_MASK, val_len);
2873 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,
2874 mask_clk, val_clk);
2875 break;
2876 case RT5677_AIF3:
2877 mask_clk = RT5677_I2S_BCLK_MS3_MASK | RT5677_I2S_PD3_MASK;
2878 val_clk = bclk_ms << RT5677_I2S_BCLK_MS3_SFT |
2879 pre_div << RT5677_I2S_PD3_SFT;
2880 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP,
2881 RT5677_I2S_DL_MASK, val_len);
2882 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,
2883 mask_clk, val_clk);
2884 break;
2885 case RT5677_AIF4:
2886 mask_clk = RT5677_I2S_BCLK_MS4_MASK | RT5677_I2S_PD4_MASK;
2887 val_clk = bclk_ms << RT5677_I2S_BCLK_MS4_SFT |
2888 pre_div << RT5677_I2S_PD4_SFT;
2889 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP,
2890 RT5677_I2S_DL_MASK, val_len);
2891 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,
2892 mask_clk, val_clk);
2893 break;
2894 default:
2895 break;
2896 }
2897
2898 return 0;
2899}
2900
2901static int rt5677_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2902{
2903 struct snd_soc_codec *codec = dai->codec;
2904 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
2905 unsigned int reg_val = 0;
2906
2907 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2908 case SND_SOC_DAIFMT_CBM_CFM:
2909 rt5677->master[dai->id] = 1;
2910 break;
2911 case SND_SOC_DAIFMT_CBS_CFS:
2912 reg_val |= RT5677_I2S_MS_S;
2913 rt5677->master[dai->id] = 0;
2914 break;
2915 default:
2916 return -EINVAL;
2917 }
2918
2919 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2920 case SND_SOC_DAIFMT_NB_NF:
2921 break;
2922 case SND_SOC_DAIFMT_IB_NF:
2923 reg_val |= RT5677_I2S_BP_INV;
2924 break;
2925 default:
2926 return -EINVAL;
2927 }
2928
2929 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2930 case SND_SOC_DAIFMT_I2S:
2931 break;
2932 case SND_SOC_DAIFMT_LEFT_J:
2933 reg_val |= RT5677_I2S_DF_LEFT;
2934 break;
2935 case SND_SOC_DAIFMT_DSP_A:
2936 reg_val |= RT5677_I2S_DF_PCM_A;
2937 break;
2938 case SND_SOC_DAIFMT_DSP_B:
2939 reg_val |= RT5677_I2S_DF_PCM_B;
2940 break;
2941 default:
2942 return -EINVAL;
2943 }
2944
2945 switch (dai->id) {
2946 case RT5677_AIF1:
2947 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP,
2948 RT5677_I2S_MS_MASK | RT5677_I2S_BP_MASK |
2949 RT5677_I2S_DF_MASK, reg_val);
2950 break;
2951 case RT5677_AIF2:
2952 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP,
2953 RT5677_I2S_MS_MASK | RT5677_I2S_BP_MASK |
2954 RT5677_I2S_DF_MASK, reg_val);
2955 break;
2956 case RT5677_AIF3:
2957 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP,
2958 RT5677_I2S_MS_MASK | RT5677_I2S_BP_MASK |
2959 RT5677_I2S_DF_MASK, reg_val);
2960 break;
2961 case RT5677_AIF4:
2962 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP,
2963 RT5677_I2S_MS_MASK | RT5677_I2S_BP_MASK |
2964 RT5677_I2S_DF_MASK, reg_val);
2965 break;
2966 default:
2967 break;
2968 }
2969
2970
2971 return 0;
2972}
2973
2974static int rt5677_set_dai_sysclk(struct snd_soc_dai *dai,
2975 int clk_id, unsigned int freq, int dir)
2976{
2977 struct snd_soc_codec *codec = dai->codec;
2978 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
2979 unsigned int reg_val = 0;
2980
2981 if (freq == rt5677->sysclk && clk_id == rt5677->sysclk_src)
2982 return 0;
2983
2984 switch (clk_id) {
2985 case RT5677_SCLK_S_MCLK:
2986 reg_val |= RT5677_SCLK_SRC_MCLK;
2987 break;
2988 case RT5677_SCLK_S_PLL1:
2989 reg_val |= RT5677_SCLK_SRC_PLL1;
2990 break;
2991 case RT5677_SCLK_S_RCCLK:
2992 reg_val |= RT5677_SCLK_SRC_RCCLK;
2993 break;
2994 default:
2995 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2996 return -EINVAL;
2997 }
2998 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
2999 RT5677_SCLK_SRC_MASK, reg_val);
3000 rt5677->sysclk = freq;
3001 rt5677->sysclk_src = clk_id;
3002
3003 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
3004
3005 return 0;
3006}
3007
3008/**
3009 * rt5677_pll_calc - Calcualte PLL M/N/K code.
3010 * @freq_in: external clock provided to codec.
3011 * @freq_out: target clock which codec works on.
3012 * @pll_code: Pointer to structure with M, N, K, bypass K and bypass M flag.
3013 *
3014 * Calcualte M/N/K code and bypass K/M flag to configure PLL for codec.
3015 *
3016 * Returns 0 for success or negative error code.
3017 */
3018static int rt5677_pll_calc(const unsigned int freq_in,
3019 const unsigned int freq_out, struct rt5677_pll_code *pll_code)
3020{
3021 int max_n = RT5677_PLL_N_MAX, max_m = RT5677_PLL_M_MAX;
3022 int k, red, n_t, pll_out, in_t;
3023 int n = 0, m = 0, m_t = 0;
3024 int out_t, red_t = abs(freq_out - freq_in);
3025 bool m_bp = false, k_bp = false;
3026
3027 if (RT5677_PLL_INP_MAX < freq_in || RT5677_PLL_INP_MIN > freq_in)
3028 return -EINVAL;
3029
3030 k = 100000000 / freq_out - 2;
3031 if (k > RT5677_PLL_K_MAX)
3032 k = RT5677_PLL_K_MAX;
3033 for (n_t = 0; n_t <= max_n; n_t++) {
3034 in_t = freq_in / (k + 2);
3035 pll_out = freq_out / (n_t + 2);
3036 if (in_t < 0)
3037 continue;
3038 if (in_t == pll_out) {
3039 m_bp = true;
3040 n = n_t;
3041 goto code_find;
3042 }
3043 red = abs(in_t - pll_out);
3044 if (red < red_t) {
3045 m_bp = true;
3046 n = n_t;
3047 m = m_t;
3048 if (red == 0)
3049 goto code_find;
3050 red_t = red;
3051 }
3052 for (m_t = 0; m_t <= max_m; m_t++) {
3053 out_t = in_t / (m_t + 2);
3054 red = abs(out_t - pll_out);
3055 if (red < red_t) {
3056 m_bp = false;
3057 n = n_t;
3058 m = m_t;
3059 if (red == 0)
3060 goto code_find;
3061 red_t = red;
3062 }
3063 }
3064 }
3065 pr_debug("Only get approximation about PLL\n");
3066
3067code_find:
3068
3069 pll_code->m_bp = m_bp;
3070 pll_code->k_bp = k_bp;
3071 pll_code->m_code = m;
3072 pll_code->n_code = n;
3073 pll_code->k_code = k;
3074 return 0;
3075}
3076
3077static int rt5677_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
3078 unsigned int freq_in, unsigned int freq_out)
3079{
3080 struct snd_soc_codec *codec = dai->codec;
3081 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3082 struct rt5677_pll_code pll_code;
3083 int ret;
3084
3085 if (source == rt5677->pll_src && freq_in == rt5677->pll_in &&
3086 freq_out == rt5677->pll_out)
3087 return 0;
3088
3089 if (!freq_in || !freq_out) {
3090 dev_dbg(codec->dev, "PLL disabled\n");
3091
3092 rt5677->pll_in = 0;
3093 rt5677->pll_out = 0;
3094 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3095 RT5677_SCLK_SRC_MASK, RT5677_SCLK_SRC_MCLK);
3096 return 0;
3097 }
3098
3099 switch (source) {
3100 case RT5677_PLL1_S_MCLK:
3101 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3102 RT5677_PLL1_SRC_MASK, RT5677_PLL1_SRC_MCLK);
3103 break;
3104 case RT5677_PLL1_S_BCLK1:
3105 case RT5677_PLL1_S_BCLK2:
3106 case RT5677_PLL1_S_BCLK3:
3107 case RT5677_PLL1_S_BCLK4:
3108 switch (dai->id) {
3109 case RT5677_AIF1:
3110 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3111 RT5677_PLL1_SRC_MASK, RT5677_PLL1_SRC_BCLK1);
3112 break;
3113 case RT5677_AIF2:
3114 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3115 RT5677_PLL1_SRC_MASK, RT5677_PLL1_SRC_BCLK2);
3116 break;
3117 case RT5677_AIF3:
3118 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3119 RT5677_PLL1_SRC_MASK, RT5677_PLL1_SRC_BCLK3);
3120 break;
3121 case RT5677_AIF4:
3122 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
3123 RT5677_PLL1_SRC_MASK, RT5677_PLL1_SRC_BCLK4);
3124 break;
3125 default:
3126 break;
3127 }
3128 break;
3129 default:
3130 dev_err(codec->dev, "Unknown PLL source %d\n", source);
3131 return -EINVAL;
3132 }
3133
3134 ret = rt5677_pll_calc(freq_in, freq_out, &pll_code);
3135 if (ret < 0) {
3136 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
3137 return ret;
3138 }
3139
3140 dev_dbg(codec->dev, "m_bypass=%d k_bypass=%d m=%d n=%d k=%d\n",
3141 pll_code.m_bp, pll_code.k_bp,
3142 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code,
3143 (pll_code.k_bp ? 0 : pll_code.k_code));
3144
3145 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL1,
3146 pll_code.n_code << RT5677_PLL_N_SFT |
3147 pll_code.k_bp << RT5677_PLL_K_BP_SFT |
3148 (pll_code.k_bp ? 0 : pll_code.k_code));
3149 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL2,
3150 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5677_PLL_M_SFT |
3151 pll_code.m_bp << RT5677_PLL_M_BP_SFT);
3152
3153 rt5677->pll_in = freq_in;
3154 rt5677->pll_out = freq_out;
3155 rt5677->pll_src = source;
3156
3157 return 0;
3158}
3159
3160static int rt5677_set_bias_level(struct snd_soc_codec *codec,
3161 enum snd_soc_bias_level level)
3162{
3163 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3164
3165 switch (level) {
3166 case SND_SOC_BIAS_ON:
3167 break;
3168
3169 case SND_SOC_BIAS_PREPARE:
3170 if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
3171 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
3172 RT5677_LDO1_SEL_MASK | RT5677_LDO2_SEL_MASK,
3173 0x0055);
3174 regmap_update_bits(rt5677->regmap,
3175 RT5677_PR_BASE + RT5677_BIAS_CUR4,
3176 0x0f00, 0x0f00);
3177 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
3178 RT5677_PWR_VREF1 | RT5677_PWR_MB |
3179 RT5677_PWR_BG | RT5677_PWR_VREF2,
3180 RT5677_PWR_VREF1 | RT5677_PWR_MB |
3181 RT5677_PWR_BG | RT5677_PWR_VREF2);
3182 mdelay(20);
3183 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
3184 RT5677_PWR_FV1 | RT5677_PWR_FV2,
3185 RT5677_PWR_FV1 | RT5677_PWR_FV2);
3186 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
3187 RT5677_PWR_CORE, RT5677_PWR_CORE);
3188 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,
3189 0x1, 0x1);
3190 }
3191 break;
3192
3193 case SND_SOC_BIAS_STANDBY:
3194 break;
3195
3196 case SND_SOC_BIAS_OFF:
3197 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0);
3198 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000);
3199 regmap_write(rt5677->regmap, RT5677_PWR_DIG2, 0x0000);
3200 regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0000);
3201 regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000);
3202 regmap_update_bits(rt5677->regmap,
3203 RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0000);
3204 break;
3205
3206 default:
3207 break;
3208 }
3209 codec->dapm.bias_level = level;
3210
3211 return 0;
3212}
3213
3214static int rt5677_probe(struct snd_soc_codec *codec)
3215{
3216 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3217
3218 rt5677->codec = codec;
3219
3220 rt5677_set_bias_level(codec, SND_SOC_BIAS_OFF);
3221
3222 regmap_write(rt5677->regmap, RT5677_DIG_MISC, 0x0020);
3223 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00);
3224
3225 return 0;
3226}
3227
3228static int rt5677_remove(struct snd_soc_codec *codec)
3229{
3230 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3231
3232 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);
3233
3234 return 0;
3235}
3236
3237#ifdef CONFIG_PM
3238static int rt5677_suspend(struct snd_soc_codec *codec)
3239{
3240 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3241
3242 regcache_cache_only(rt5677->regmap, true);
3243 regcache_mark_dirty(rt5677->regmap);
3244
3245 return 0;
3246}
3247
3248static int rt5677_resume(struct snd_soc_codec *codec)
3249{
3250 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
3251
3252 regcache_cache_only(rt5677->regmap, false);
3253 regcache_sync(rt5677->regmap);
3254
3255 return 0;
3256}
3257#else
3258#define rt5677_suspend NULL
3259#define rt5677_resume NULL
3260#endif
3261
3262#define RT5677_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3263#define RT5677_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3264 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3265
3266static struct snd_soc_dai_ops rt5677_aif_dai_ops = {
3267 .hw_params = rt5677_hw_params,
3268 .set_fmt = rt5677_set_dai_fmt,
3269 .set_sysclk = rt5677_set_dai_sysclk,
3270 .set_pll = rt5677_set_dai_pll,
3271};
3272
3273static struct snd_soc_dai_driver rt5677_dai[] = {
3274 {
3275 .name = "rt5677-aif1",
3276 .id = RT5677_AIF1,
3277 .playback = {
3278 .stream_name = "AIF1 Playback",
3279 .channels_min = 1,
3280 .channels_max = 2,
3281 .rates = RT5677_STEREO_RATES,
3282 .formats = RT5677_FORMATS,
3283 },
3284 .capture = {
3285 .stream_name = "AIF1 Capture",
3286 .channels_min = 1,
3287 .channels_max = 2,
3288 .rates = RT5677_STEREO_RATES,
3289 .formats = RT5677_FORMATS,
3290 },
3291 .ops = &rt5677_aif_dai_ops,
3292 },
3293 {
3294 .name = "rt5677-aif2",
3295 .id = RT5677_AIF2,
3296 .playback = {
3297 .stream_name = "AIF2 Playback",
3298 .channels_min = 1,
3299 .channels_max = 2,
3300 .rates = RT5677_STEREO_RATES,
3301 .formats = RT5677_FORMATS,
3302 },
3303 .capture = {
3304 .stream_name = "AIF2 Capture",
3305 .channels_min = 1,
3306 .channels_max = 2,
3307 .rates = RT5677_STEREO_RATES,
3308 .formats = RT5677_FORMATS,
3309 },
3310 .ops = &rt5677_aif_dai_ops,
3311 },
3312 {
3313 .name = "rt5677-aif3",
3314 .id = RT5677_AIF3,
3315 .playback = {
3316 .stream_name = "AIF3 Playback",
3317 .channels_min = 1,
3318 .channels_max = 2,
3319 .rates = RT5677_STEREO_RATES,
3320 .formats = RT5677_FORMATS,
3321 },
3322 .capture = {
3323 .stream_name = "AIF3 Capture",
3324 .channels_min = 1,
3325 .channels_max = 2,
3326 .rates = RT5677_STEREO_RATES,
3327 .formats = RT5677_FORMATS,
3328 },
3329 .ops = &rt5677_aif_dai_ops,
3330 },
3331 {
3332 .name = "rt5677-aif4",
3333 .id = RT5677_AIF4,
3334 .playback = {
3335 .stream_name = "AIF4 Playback",
3336 .channels_min = 1,
3337 .channels_max = 2,
3338 .rates = RT5677_STEREO_RATES,
3339 .formats = RT5677_FORMATS,
3340 },
3341 .capture = {
3342 .stream_name = "AIF4 Capture",
3343 .channels_min = 1,
3344 .channels_max = 2,
3345 .rates = RT5677_STEREO_RATES,
3346 .formats = RT5677_FORMATS,
3347 },
3348 .ops = &rt5677_aif_dai_ops,
3349 },
3350 {
3351 .name = "rt5677-slimbus",
3352 .id = RT5677_AIF5,
3353 .playback = {
3354 .stream_name = "SLIMBus Playback",
3355 .channels_min = 1,
3356 .channels_max = 2,
3357 .rates = RT5677_STEREO_RATES,
3358 .formats = RT5677_FORMATS,
3359 },
3360 .capture = {
3361 .stream_name = "SLIMBus Capture",
3362 .channels_min = 1,
3363 .channels_max = 2,
3364 .rates = RT5677_STEREO_RATES,
3365 .formats = RT5677_FORMATS,
3366 },
3367 .ops = &rt5677_aif_dai_ops,
3368 },
3369};
3370
3371static struct snd_soc_codec_driver soc_codec_dev_rt5677 = {
3372 .probe = rt5677_probe,
3373 .remove = rt5677_remove,
3374 .suspend = rt5677_suspend,
3375 .resume = rt5677_resume,
3376 .set_bias_level = rt5677_set_bias_level,
3377 .idle_bias_off = true,
3378 .controls = rt5677_snd_controls,
3379 .num_controls = ARRAY_SIZE(rt5677_snd_controls),
3380 .dapm_widgets = rt5677_dapm_widgets,
3381 .num_dapm_widgets = ARRAY_SIZE(rt5677_dapm_widgets),
3382 .dapm_routes = rt5677_dapm_routes,
3383 .num_dapm_routes = ARRAY_SIZE(rt5677_dapm_routes),
3384};
3385
3386static const struct regmap_config rt5677_regmap = {
3387 .reg_bits = 8,
3388 .val_bits = 16,
3389
3390 .max_register = RT5677_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5677_ranges) *
3391 RT5677_PR_SPACING),
3392
3393 .volatile_reg = rt5677_volatile_register,
3394 .readable_reg = rt5677_readable_register,
3395
3396 .cache_type = REGCACHE_RBTREE,
3397 .reg_defaults = rt5677_reg,
3398 .num_reg_defaults = ARRAY_SIZE(rt5677_reg),
3399 .ranges = rt5677_ranges,
3400 .num_ranges = ARRAY_SIZE(rt5677_ranges),
3401};
3402
3403static const struct i2c_device_id rt5677_i2c_id[] = {
3404 { "rt5677", 0 },
3405 { }
3406};
3407MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
3408
3409static int rt5677_i2c_probe(struct i2c_client *i2c,
3410 const struct i2c_device_id *id)
3411{
3412 struct rt5677_platform_data *pdata = dev_get_platdata(&i2c->dev);
3413 struct rt5677_priv *rt5677;
3414 int ret;
3415 unsigned int val;
3416
3417 rt5677 = devm_kzalloc(&i2c->dev, sizeof(struct rt5677_priv),
3418 GFP_KERNEL);
3419 if (rt5677 == NULL)
3420 return -ENOMEM;
3421
3422 i2c_set_clientdata(i2c, rt5677);
3423
3424 if (pdata)
3425 rt5677->pdata = *pdata;
3426
3427 rt5677->regmap = devm_regmap_init_i2c(i2c, &rt5677_regmap);
3428 if (IS_ERR(rt5677->regmap)) {
3429 ret = PTR_ERR(rt5677->regmap);
3430 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3431 ret);
3432 return ret;
3433 }
3434
3435 regmap_read(rt5677->regmap, RT5677_VENDOR_ID2, &val);
3436 if (val != RT5677_DEVICE_ID) {
3437 dev_err(&i2c->dev,
3438 "Device with ID register %x is not rt5677\n", val);
3439 return -ENODEV;
3440 }
3441
3442 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);
3443
3444 ret = regmap_register_patch(rt5677->regmap, init_list,
3445 ARRAY_SIZE(init_list));
3446 if (ret != 0)
3447 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3448
3449 if (rt5677->pdata.in1_diff)
3450 regmap_update_bits(rt5677->regmap, RT5677_IN1,
3451 RT5677_IN_DF1, RT5677_IN_DF1);
3452
3453 if (rt5677->pdata.in2_diff)
3454 regmap_update_bits(rt5677->regmap, RT5677_IN1,
3455 RT5677_IN_DF2, RT5677_IN_DF2);
3456
3457 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5677,
3458 rt5677_dai, ARRAY_SIZE(rt5677_dai));
3459 if (ret < 0)
3460 goto err;
3461
3462 return 0;
3463err:
3464 return ret;
3465}
3466
3467static int rt5677_i2c_remove(struct i2c_client *i2c)
3468{
3469 snd_soc_unregister_codec(&i2c->dev);
3470
3471 return 0;
3472}
3473
3474static struct i2c_driver rt5677_i2c_driver = {
3475 .driver = {
3476 .name = "rt5677",
3477 .owner = THIS_MODULE,
3478 },
3479 .probe = rt5677_i2c_probe,
3480 .remove = rt5677_i2c_remove,
3481 .id_table = rt5677_i2c_id,
3482};
3483
3484static int __init rt5677_modinit(void)
3485{
3486 return i2c_add_driver(&rt5677_i2c_driver);
3487}
3488module_init(rt5677_modinit);
3489
3490static void __exit rt5677_modexit(void)
3491{
3492 i2c_del_driver(&rt5677_i2c_driver);
3493}
3494module_exit(rt5677_modexit);
3495
3496MODULE_DESCRIPTION("ASoC RT5677 driver");
3497MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
3498MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
new file mode 100644
index 000000000000..af4e9c797408
--- /dev/null
+++ b/sound/soc/codecs/rt5677.h
@@ -0,0 +1,1451 @@
1/*
2 * rt5677.h -- RT5677 ALSA SoC audio driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Oder Chiou <oder_chiou@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __RT5677_H__
13#define __RT5677_H__
14
15#include <sound/rt5677.h>
16
17/* Info */
18#define RT5677_RESET 0x00
19#define RT5677_VENDOR_ID 0xfd
20#define RT5677_VENDOR_ID1 0xfe
21#define RT5677_VENDOR_ID2 0xff
22/* I/O - Output */
23#define RT5677_LOUT1 0x01
24/* I/O - Input */
25#define RT5677_IN1 0x03
26#define RT5677_MICBIAS 0x04
27/* I/O - SLIMBus */
28#define RT5677_SLIMBUS_PARAM 0x07
29#define RT5677_SLIMBUS_RX 0x08
30#define RT5677_SLIMBUS_CTRL 0x09
31/* I/O */
32#define RT5677_SIDETONE_CTRL 0x13
33/* I/O - ADC/DAC */
34#define RT5677_ANA_DAC1_2_3_SRC 0x15
35#define RT5677_IF_DSP_DAC3_4_MIXER 0x16
36#define RT5677_DAC4_DIG_VOL 0x17
37#define RT5677_DAC3_DIG_VOL 0x18
38#define RT5677_DAC1_DIG_VOL 0x19
39#define RT5677_DAC2_DIG_VOL 0x1a
40#define RT5677_IF_DSP_DAC2_MIXER 0x1b
41#define RT5677_STO1_ADC_DIG_VOL 0x1c
42#define RT5677_MONO_ADC_DIG_VOL 0x1d
43#define RT5677_STO1_2_ADC_BST 0x1e
44#define RT5677_STO2_ADC_DIG_VOL 0x1f
45/* Mixer - D-D */
46#define RT5677_ADC_BST_CTRL2 0x20
47#define RT5677_STO3_4_ADC_BST 0x21
48#define RT5677_STO3_ADC_DIG_VOL 0x22
49#define RT5677_STO4_ADC_DIG_VOL 0x23
50#define RT5677_STO4_ADC_MIXER 0x24
51#define RT5677_STO3_ADC_MIXER 0x25
52#define RT5677_STO2_ADC_MIXER 0x26
53#define RT5677_STO1_ADC_MIXER 0x27
54#define RT5677_MONO_ADC_MIXER 0x28
55#define RT5677_ADC_IF_DSP_DAC1_MIXER 0x29
56#define RT5677_STO1_DAC_MIXER 0x2a
57#define RT5677_MONO_DAC_MIXER 0x2b
58#define RT5677_DD1_MIXER 0x2c
59#define RT5677_DD2_MIXER 0x2d
60#define RT5677_IF3_DATA 0x2f
61#define RT5677_IF4_DATA 0x30
62/* Mixer - PDM */
63#define RT5677_PDM_OUT_CTRL 0x31
64#define RT5677_PDM_DATA_CTRL1 0x32
65#define RT5677_PDM_DATA_CTRL2 0x33
66#define RT5677_PDM1_DATA_CTRL2 0x34
67#define RT5677_PDM1_DATA_CTRL3 0x35
68#define RT5677_PDM1_DATA_CTRL4 0x36
69#define RT5677_PDM2_DATA_CTRL2 0x37
70#define RT5677_PDM2_DATA_CTRL3 0x38
71#define RT5677_PDM2_DATA_CTRL4 0x39
72/* TDM */
73#define RT5677_TDM1_CTRL1 0x3b
74#define RT5677_TDM1_CTRL2 0x3c
75#define RT5677_TDM1_CTRL3 0x3d
76#define RT5677_TDM1_CTRL4 0x3e
77#define RT5677_TDM1_CTRL5 0x3f
78#define RT5677_TDM2_CTRL1 0x40
79#define RT5677_TDM2_CTRL2 0x41
80#define RT5677_TDM2_CTRL3 0x42
81#define RT5677_TDM2_CTRL4 0x43
82#define RT5677_TDM2_CTRL5 0x44
83/* I2C_MASTER_CTRL */
84#define RT5677_I2C_MASTER_CTRL1 0x47
85#define RT5677_I2C_MASTER_CTRL2 0x48
86#define RT5677_I2C_MASTER_CTRL3 0x49
87#define RT5677_I2C_MASTER_CTRL4 0x4a
88#define RT5677_I2C_MASTER_CTRL5 0x4b
89#define RT5677_I2C_MASTER_CTRL6 0x4c
90#define RT5677_I2C_MASTER_CTRL7 0x4d
91#define RT5677_I2C_MASTER_CTRL8 0x4e
92/* DMIC */
93#define RT5677_DMIC_CTRL1 0x50
94#define RT5677_DMIC_CTRL2 0x51
95/* Haptic Generator */
96#define RT5677_HAP_GENE_CTRL1 0x56
97#define RT5677_HAP_GENE_CTRL2 0x57
98#define RT5677_HAP_GENE_CTRL3 0x58
99#define RT5677_HAP_GENE_CTRL4 0x59
100#define RT5677_HAP_GENE_CTRL5 0x5a
101#define RT5677_HAP_GENE_CTRL6 0x5b
102#define RT5677_HAP_GENE_CTRL7 0x5c
103#define RT5677_HAP_GENE_CTRL8 0x5d
104#define RT5677_HAP_GENE_CTRL9 0x5e
105#define RT5677_HAP_GENE_CTRL10 0x5f
106/* Power */
107#define RT5677_PWR_DIG1 0x61
108#define RT5677_PWR_DIG2 0x62
109#define RT5677_PWR_ANLG1 0x63
110#define RT5677_PWR_ANLG2 0x64
111#define RT5677_PWR_DSP1 0x65
112#define RT5677_PWR_DSP_ST 0x66
113#define RT5677_PWR_DSP2 0x67
114#define RT5677_ADC_DAC_HPF_CTRL1 0x68
115/* Private Register Control */
116#define RT5677_PRIV_INDEX 0x6a
117#define RT5677_PRIV_DATA 0x6c
118/* Format - ADC/DAC */
119#define RT5677_I2S4_SDP 0x6f
120#define RT5677_I2S1_SDP 0x70
121#define RT5677_I2S2_SDP 0x71
122#define RT5677_I2S3_SDP 0x72
123#define RT5677_CLK_TREE_CTRL1 0x73
124#define RT5677_CLK_TREE_CTRL2 0x74
125#define RT5677_CLK_TREE_CTRL3 0x75
126/* Function - Analog */
127#define RT5677_PLL1_CTRL1 0x7a
128#define RT5677_PLL1_CTRL2 0x7b
129#define RT5677_PLL2_CTRL1 0x7c
130#define RT5677_PLL2_CTRL2 0x7d
131#define RT5677_GLB_CLK1 0x80
132#define RT5677_GLB_CLK2 0x81
133#define RT5677_ASRC_1 0x83
134#define RT5677_ASRC_2 0x84
135#define RT5677_ASRC_3 0x85
136#define RT5677_ASRC_4 0x86
137#define RT5677_ASRC_5 0x87
138#define RT5677_ASRC_6 0x88
139#define RT5677_ASRC_7 0x89
140#define RT5677_ASRC_8 0x8a
141#define RT5677_ASRC_9 0x8b
142#define RT5677_ASRC_10 0x8c
143#define RT5677_ASRC_11 0x8d
144#define RT5677_ASRC_12 0x8e
145#define RT5677_ASRC_13 0x8f
146#define RT5677_ASRC_14 0x90
147#define RT5677_ASRC_15 0x91
148#define RT5677_ASRC_16 0x92
149#define RT5677_ASRC_17 0x93
150#define RT5677_ASRC_18 0x94
151#define RT5677_ASRC_19 0x95
152#define RT5677_ASRC_20 0x97
153#define RT5677_ASRC_21 0x98
154#define RT5677_ASRC_22 0x99
155#define RT5677_ASRC_23 0x9a
156#define RT5677_VAD_CTRL1 0x9c
157#define RT5677_VAD_CTRL2 0x9d
158#define RT5677_VAD_CTRL3 0x9e
159#define RT5677_VAD_CTRL4 0x9f
160#define RT5677_VAD_CTRL5 0xa0
161/* Function - Digital */
162#define RT5677_DSP_INB_CTRL1 0xa3
163#define RT5677_DSP_INB_CTRL2 0xa4
164#define RT5677_DSP_IN_OUTB_CTRL 0xa5
165#define RT5677_DSP_OUTB0_1_DIG_VOL 0xa6
166#define RT5677_DSP_OUTB2_3_DIG_VOL 0xa7
167#define RT5677_DSP_OUTB4_5_DIG_VOL 0xa8
168#define RT5677_DSP_OUTB6_7_DIG_VOL 0xa9
169#define RT5677_ADC_EQ_CTRL1 0xae
170#define RT5677_ADC_EQ_CTRL2 0xaf
171#define RT5677_EQ_CTRL1 0xb0
172#define RT5677_EQ_CTRL2 0xb1
173#define RT5677_EQ_CTRL3 0xb2
174#define RT5677_SOFT_VOL_ZERO_CROSS1 0xb3
175#define RT5677_JD_CTRL1 0xb5
176#define RT5677_JD_CTRL2 0xb6
177#define RT5677_JD_CTRL3 0xb8
178#define RT5677_IRQ_CTRL1 0xbd
179#define RT5677_IRQ_CTRL2 0xbe
180#define RT5677_GPIO_ST 0xbf
181#define RT5677_GPIO_CTRL1 0xc0
182#define RT5677_GPIO_CTRL2 0xc1
183#define RT5677_GPIO_CTRL3 0xc2
184#define RT5677_STO1_ADC_HI_FILTER1 0xc5
185#define RT5677_STO1_ADC_HI_FILTER2 0xc6
186#define RT5677_MONO_ADC_HI_FILTER1 0xc7
187#define RT5677_MONO_ADC_HI_FILTER2 0xc8
188#define RT5677_STO2_ADC_HI_FILTER1 0xc9
189#define RT5677_STO2_ADC_HI_FILTER2 0xca
190#define RT5677_STO3_ADC_HI_FILTER1 0xcb
191#define RT5677_STO3_ADC_HI_FILTER2 0xcc
192#define RT5677_STO4_ADC_HI_FILTER1 0xcd
193#define RT5677_STO4_ADC_HI_FILTER2 0xce
194#define RT5677_MB_DRC_CTRL1 0xd0
195#define RT5677_DRC1_CTRL1 0xd2
196#define RT5677_DRC1_CTRL2 0xd3
197#define RT5677_DRC1_CTRL3 0xd4
198#define RT5677_DRC1_CTRL4 0xd5
199#define RT5677_DRC1_CTRL5 0xd6
200#define RT5677_DRC1_CTRL6 0xd7
201#define RT5677_DRC2_CTRL1 0xd8
202#define RT5677_DRC2_CTRL2 0xd9
203#define RT5677_DRC2_CTRL3 0xda
204#define RT5677_DRC2_CTRL4 0xdb
205#define RT5677_DRC2_CTRL5 0xdc
206#define RT5677_DRC2_CTRL6 0xdd
207#define RT5677_DRC1_HL_CTRL1 0xde
208#define RT5677_DRC1_HL_CTRL2 0xdf
209#define RT5677_DRC2_HL_CTRL1 0xe0
210#define RT5677_DRC2_HL_CTRL2 0xe1
211#define RT5677_DSP_INB1_SRC_CTRL1 0xe3
212#define RT5677_DSP_INB1_SRC_CTRL2 0xe4
213#define RT5677_DSP_INB1_SRC_CTRL3 0xe5
214#define RT5677_DSP_INB1_SRC_CTRL4 0xe6
215#define RT5677_DSP_INB2_SRC_CTRL1 0xe7
216#define RT5677_DSP_INB2_SRC_CTRL2 0xe8
217#define RT5677_DSP_INB2_SRC_CTRL3 0xe9
218#define RT5677_DSP_INB2_SRC_CTRL4 0xea
219#define RT5677_DSP_INB3_SRC_CTRL1 0xeb
220#define RT5677_DSP_INB3_SRC_CTRL2 0xec
221#define RT5677_DSP_INB3_SRC_CTRL3 0xed
222#define RT5677_DSP_INB3_SRC_CTRL4 0xee
223#define RT5677_DSP_OUTB1_SRC_CTRL1 0xef
224#define RT5677_DSP_OUTB1_SRC_CTRL2 0xf0
225#define RT5677_DSP_OUTB1_SRC_CTRL3 0xf1
226#define RT5677_DSP_OUTB1_SRC_CTRL4 0xf2
227#define RT5677_DSP_OUTB2_SRC_CTRL1 0xf3
228#define RT5677_DSP_OUTB2_SRC_CTRL2 0xf4
229#define RT5677_DSP_OUTB2_SRC_CTRL3 0xf5
230#define RT5677_DSP_OUTB2_SRC_CTRL4 0xf6
231
232/* Virtual DSP Mixer Control */
233#define RT5677_DSP_OUTB_0123_MIXER_CTRL 0xf7
234#define RT5677_DSP_OUTB_45_MIXER_CTRL 0xf8
235#define RT5677_DSP_OUTB_67_MIXER_CTRL 0xf9
236
237/* General Control */
238#define RT5677_DIG_MISC 0xfa
239#define RT5677_GEN_CTRL1 0xfb
240#define RT5677_GEN_CTRL2 0xfc
241
242/* DSP Mode I2C Control*/
243#define RT5677_DSP_I2C_OP_CODE 0x00
244#define RT5677_DSP_I2C_ADDR_LSB 0x01
245#define RT5677_DSP_I2C_ADDR_MSB 0x02
246#define RT5677_DSP_I2C_DATA_LSB 0x03
247#define RT5677_DSP_I2C_DATA_MSB 0x04
248
249/* Index of Codec Private Register definition */
250#define RT5677_PR_DRC1_CTRL_1 0x01
251#define RT5677_PR_DRC1_CTRL_2 0x02
252#define RT5677_PR_DRC1_CTRL_3 0x03
253#define RT5677_PR_DRC1_CTRL_4 0x04
254#define RT5677_PR_DRC1_CTRL_5 0x05
255#define RT5677_PR_DRC1_CTRL_6 0x06
256#define RT5677_PR_DRC1_CTRL_7 0x07
257#define RT5677_PR_DRC2_CTRL_1 0x08
258#define RT5677_PR_DRC2_CTRL_2 0x09
259#define RT5677_PR_DRC2_CTRL_3 0x0a
260#define RT5677_PR_DRC2_CTRL_4 0x0b
261#define RT5677_PR_DRC2_CTRL_5 0x0c
262#define RT5677_PR_DRC2_CTRL_6 0x0d
263#define RT5677_PR_DRC2_CTRL_7 0x0e
264#define RT5677_BIAS_CUR1 0x10
265#define RT5677_BIAS_CUR2 0x12
266#define RT5677_BIAS_CUR3 0x13
267#define RT5677_BIAS_CUR4 0x14
268#define RT5677_BIAS_CUR5 0x15
269#define RT5677_VREF_LOUT_CTRL 0x17
270#define RT5677_DIG_VOL_CTRL1 0x1a
271#define RT5677_DIG_VOL_CTRL2 0x1b
272#define RT5677_ANA_ADC_GAIN_CTRL 0x1e
273#define RT5677_VAD_SRAM_TEST1 0x20
274#define RT5677_VAD_SRAM_TEST2 0x21
275#define RT5677_VAD_SRAM_TEST3 0x22
276#define RT5677_VAD_SRAM_TEST4 0x23
277#define RT5677_PAD_DRV_CTRL 0x26
278#define RT5677_DIG_IN_PIN_ST_CTRL1 0x29
279#define RT5677_DIG_IN_PIN_ST_CTRL2 0x2a
280#define RT5677_DIG_IN_PIN_ST_CTRL3 0x2b
281#define RT5677_PLL1_INT 0x38
282#define RT5677_PLL2_INT 0x39
283#define RT5677_TEST_CTRL1 0x3a
284#define RT5677_TEST_CTRL2 0x3b
285#define RT5677_TEST_CTRL3 0x3c
286#define RT5677_CHOP_DAC_ADC 0x3d
287#define RT5677_SOFT_DEPOP_DAC_CLK_CTRL 0x3e
288#define RT5677_CROSS_OVER_FILTER1 0x90
289#define RT5677_CROSS_OVER_FILTER2 0x91
290#define RT5677_CROSS_OVER_FILTER3 0x92
291#define RT5677_CROSS_OVER_FILTER4 0x93
292#define RT5677_CROSS_OVER_FILTER5 0x94
293#define RT5677_CROSS_OVER_FILTER6 0x95
294#define RT5677_CROSS_OVER_FILTER7 0x96
295#define RT5677_CROSS_OVER_FILTER8 0x97
296#define RT5677_CROSS_OVER_FILTER9 0x98
297#define RT5677_CROSS_OVER_FILTER10 0x99
298
299/* global definition */
300#define RT5677_L_MUTE (0x1 << 15)
301#define RT5677_L_MUTE_SFT 15
302#define RT5677_VOL_L_MUTE (0x1 << 14)
303#define RT5677_VOL_L_SFT 14
304#define RT5677_R_MUTE (0x1 << 7)
305#define RT5677_R_MUTE_SFT 7
306#define RT5677_VOL_R_MUTE (0x1 << 6)
307#define RT5677_VOL_R_SFT 6
308#define RT5677_L_VOL_MASK (0x3f << 8)
309#define RT5677_L_VOL_SFT 8
310#define RT5677_R_VOL_MASK (0x3f)
311#define RT5677_R_VOL_SFT 0
312
313/* LOUT1 Control (0x01) */
314#define RT5677_LOUT1_L_MUTE (0x1 << 15)
315#define RT5677_LOUT1_L_MUTE_SFT (15)
316#define RT5677_LOUT1_L_DF (0x1 << 14)
317#define RT5677_LOUT1_L_DF_SFT (14)
318#define RT5677_LOUT2_L_MUTE (0x1 << 13)
319#define RT5677_LOUT2_L_MUTE_SFT (13)
320#define RT5677_LOUT2_L_DF (0x1 << 12)
321#define RT5677_LOUT2_L_DF_SFT (12)
322#define RT5677_LOUT3_L_MUTE (0x1 << 11)
323#define RT5677_LOUT3_L_MUTE_SFT (11)
324#define RT5677_LOUT3_L_DF (0x1 << 10)
325#define RT5677_LOUT3_L_DF_SFT (10)
326#define RT5677_LOUT1_ENH_DRV (0x1 << 9)
327#define RT5677_LOUT1_ENH_DRV_SFT (9)
328#define RT5677_LOUT2_ENH_DRV (0x1 << 8)
329#define RT5677_LOUT2_ENH_DRV_SFT (8)
330#define RT5677_LOUT3_ENH_DRV (0x1 << 7)
331#define RT5677_LOUT3_ENH_DRV_SFT (7)
332
333/* IN1 Control (0x03) */
334#define RT5677_BST_MASK1 (0xf << 12)
335#define RT5677_BST_SFT1 12
336#define RT5677_BST_MASK2 (0xf << 8)
337#define RT5677_BST_SFT2 8
338#define RT5677_IN_DF1 (0x1 << 7)
339#define RT5677_IN_DF1_SFT 7
340#define RT5677_IN_DF2 (0x1 << 6)
341#define RT5677_IN_DF2_SFT 6
342
343/* Micbias Control (0x04) */
344#define RT5677_MICBIAS1_OUTVOLT_MASK (0x1 << 15)
345#define RT5677_MICBIAS1_OUTVOLT_SFT (15)
346#define RT5677_MICBIAS1_OUTVOLT_2_7V (0x0 << 15)
347#define RT5677_MICBIAS1_OUTVOLT_2_25V (0x1 << 15)
348#define RT5677_MICBIAS1_CTRL_VDD_MASK (0x1 << 14)
349#define RT5677_MICBIAS1_CTRL_VDD_SFT (14)
350#define RT5677_MICBIAS1_CTRL_VDD_1_8V (0x0 << 14)
351#define RT5677_MICBIAS1_CTRL_VDD_3_3V (0x1 << 14)
352#define RT5677_MICBIAS1_OVCD_MASK (0x1 << 11)
353#define RT5677_MICBIAS1_OVCD_SHIFT (11)
354#define RT5677_MICBIAS1_OVCD_DIS (0x0 << 11)
355#define RT5677_MICBIAS1_OVCD_EN (0x1 << 11)
356#define RT5677_MICBIAS1_OVTH_MASK (0x3 << 9)
357#define RT5677_MICBIAS1_OVTH_SFT 9
358#define RT5677_MICBIAS1_OVTH_640UA (0x0 << 9)
359#define RT5677_MICBIAS1_OVTH_1280UA (0x1 << 9)
360#define RT5677_MICBIAS1_OVTH_1920UA (0x2 << 9)
361
362/* SLIMbus Parameter (0x07) */
363
364/* SLIMbus Rx (0x08) */
365#define RT5677_SLB_ADC4_MASK (0x3 << 6)
366#define RT5677_SLB_ADC4_SFT 6
367#define RT5677_SLB_ADC3_MASK (0x3 << 4)
368#define RT5677_SLB_ADC3_SFT 4
369#define RT5677_SLB_ADC2_MASK (0x3 << 2)
370#define RT5677_SLB_ADC2_SFT 2
371#define RT5677_SLB_ADC1_MASK (0x3 << 0)
372#define RT5677_SLB_ADC1_SFT 0
373
374/* SLIMBus control (0x09) */
375
376/* Sidetone Control (0x13) */
377#define RT5677_ST_HPF_SEL_MASK (0x7 << 13)
378#define RT5677_ST_HPF_SEL_SFT 13
379#define RT5677_ST_HPF_PATH (0x1 << 12)
380#define RT5677_ST_HPF_PATH_SFT 12
381#define RT5677_ST_SEL_MASK (0x7 << 9)
382#define RT5677_ST_SEL_SFT 9
383#define RT5677_ST_EN (0x1 << 6)
384#define RT5677_ST_EN_SFT 6
385
386/* Analog DAC1/2/3 Source Control (0x15) */
387#define RT5677_ANA_DAC3_SRC_SEL_MASK (0x3 << 4)
388#define RT5677_ANA_DAC3_SRC_SEL_SFT 4
389#define RT5677_ANA_DAC1_2_SRC_SEL_MASK (0x3 << 0)
390#define RT5677_ANA_DAC1_2_SRC_SEL_SFT 0
391
392/* IF/DSP to DAC3/4 Mixer Control (0x16) */
393#define RT5677_M_DAC4_L_VOL (0x1 << 15)
394#define RT5677_M_DAC4_L_VOL_SFT 15
395#define RT5677_SEL_DAC4_L_SRC_MASK (0x7 << 12)
396#define RT5677_SEL_DAC4_L_SRC_SFT 12
397#define RT5677_M_DAC4_R_VOL (0x1 << 11)
398#define RT5677_M_DAC4_R_VOL_SFT 11
399#define RT5677_SEL_DAC4_R_SRC_MASK (0x7 << 8)
400#define RT5677_SEL_DAC4_R_SRC_SFT 8
401#define RT5677_M_DAC3_L_VOL (0x1 << 7)
402#define RT5677_M_DAC3_L_VOL_SFT 7
403#define RT5677_SEL_DAC3_L_SRC_MASK (0x7 << 4)
404#define RT5677_SEL_DAC3_L_SRC_SFT 4
405#define RT5677_M_DAC3_R_VOL (0x1 << 3)
406#define RT5677_M_DAC3_R_VOL_SFT 3
407#define RT5677_SEL_DAC3_R_SRC_MASK (0x7 << 0)
408#define RT5677_SEL_DAC3_R_SRC_SFT 0
409
410/* DAC4 Digital Volume (0x17) */
411#define RT5677_DAC4_L_VOL_MASK (0xff << 8)
412#define RT5677_DAC4_L_VOL_SFT 8
413#define RT5677_DAC4_R_VOL_MASK (0xff)
414#define RT5677_DAC4_R_VOL_SFT 0
415
416/* DAC3 Digital Volume (0x18) */
417#define RT5677_DAC3_L_VOL_MASK (0xff << 8)
418#define RT5677_DAC3_L_VOL_SFT 8
419#define RT5677_DAC3_R_VOL_MASK (0xff)
420#define RT5677_DAC3_R_VOL_SFT 0
421
422/* DAC3 Digital Volume (0x19) */
423#define RT5677_DAC1_L_VOL_MASK (0xff << 8)
424#define RT5677_DAC1_L_VOL_SFT 8
425#define RT5677_DAC1_R_VOL_MASK (0xff)
426#define RT5677_DAC1_R_VOL_SFT 0
427
428/* DAC2 Digital Volume (0x1a) */
429#define RT5677_DAC2_L_VOL_MASK (0xff << 8)
430#define RT5677_DAC2_L_VOL_SFT 8
431#define RT5677_DAC2_R_VOL_MASK (0xff)
432#define RT5677_DAC2_R_VOL_SFT 0
433
434/* IF/DSP to DAC2 Mixer Control (0x1b) */
435#define RT5677_M_DAC2_L_VOL (0x1 << 7)
436#define RT5677_M_DAC2_L_VOL_SFT 7
437#define RT5677_SEL_DAC2_L_SRC_MASK (0x7 << 4)
438#define RT5677_SEL_DAC2_L_SRC_SFT 4
439#define RT5677_M_DAC2_R_VOL (0x1 << 3)
440#define RT5677_M_DAC2_R_VOL_SFT 3
441#define RT5677_SEL_DAC2_R_SRC_MASK (0x7 << 0)
442#define RT5677_SEL_DAC2_R_SRC_SFT 0
443
444/* Stereo1 ADC Digital Volume Control (0x1c) */
445#define RT5677_STO1_ADC_L_VOL_MASK (0x7f << 8)
446#define RT5677_STO1_ADC_L_VOL_SFT 8
447#define RT5677_STO1_ADC_R_VOL_MASK (0x7f)
448#define RT5677_STO1_ADC_R_VOL_SFT 0
449
450/* Mono ADC Digital Volume Control (0x1d) */
451#define RT5677_MONO_ADC_L_VOL_MASK (0x7f << 8)
452#define RT5677_MONO_ADC_L_VOL_SFT 8
453#define RT5677_MONO_ADC_R_VOL_MASK (0x7f)
454#define RT5677_MONO_ADC_R_VOL_SFT 0
455
456/* Stereo 1/2 ADC Boost Gain Control (0x1e) */
457#define RT5677_STO1_ADC_L_BST_MASK (0x3 << 14)
458#define RT5677_STO1_ADC_L_BST_SFT 14
459#define RT5677_STO1_ADC_R_BST_MASK (0x3 << 12)
460#define RT5677_STO1_ADC_R_BST_SFT 12
461#define RT5677_STO1_ADC_COMP_MASK (0x3 << 10)
462#define RT5677_STO1_ADC_COMP_SFT 10
463#define RT5677_STO2_ADC_L_BST_MASK (0x3 << 8)
464#define RT5677_STO2_ADC_L_BST_SFT 8
465#define RT5677_STO2_ADC_R_BST_MASK (0x3 << 6)
466#define RT5677_STO2_ADC_R_BST_SFT 6
467#define RT5677_STO2_ADC_COMP_MASK (0x3 << 4)
468#define RT5677_STO2_ADC_COMP_SFT 4
469
470/* Stereo2 ADC Digital Volume Control (0x1f) */
471#define RT5677_STO2_ADC_L_VOL_MASK (0x7f << 8)
472#define RT5677_STO2_ADC_L_VOL_SFT 8
473#define RT5677_STO2_ADC_R_VOL_MASK (0x7f)
474#define RT5677_STO2_ADC_R_VOL_SFT 0
475
476/* ADC Boost Gain Control 2 (0x20) */
477#define RT5677_MONO_ADC_L_BST_MASK (0x3 << 14)
478#define RT5677_MONO_ADC_L_BST_SFT 14
479#define RT5677_MONO_ADC_R_BST_MASK (0x3 << 12)
480#define RT5677_MONO_ADC_R_BST_SFT 12
481#define RT5677_MONO_ADC_COMP_MASK (0x3 << 10)
482#define RT5677_MONO_ADC_COMP_SFT 10
483
484/* Stereo 3/4 ADC Boost Gain Control (0x21) */
485#define RT5677_STO3_ADC_L_BST_MASK (0x3 << 14)
486#define RT5677_STO3_ADC_L_BST_SFT 14
487#define RT5677_STO3_ADC_R_BST_MASK (0x3 << 12)
488#define RT5677_STO3_ADC_R_BST_SFT 12
489#define RT5677_STO3_ADC_COMP_MASK (0x3 << 10)
490#define RT5677_STO3_ADC_COMP_SFT 10
491#define RT5677_STO4_ADC_L_BST_MASK (0x3 << 8)
492#define RT5677_STO4_ADC_L_BST_SFT 8
493#define RT5677_STO4_ADC_R_BST_MASK (0x3 << 6)
494#define RT5677_STO4_ADC_R_BST_SFT 6
495#define RT5677_STO4_ADC_COMP_MASK (0x3 << 4)
496#define RT5677_STO4_ADC_COMP_SFT 4
497
498/* Stereo3 ADC Digital Volume Control (0x22) */
499#define RT5677_STO3_ADC_L_VOL_MASK (0x7f << 8)
500#define RT5677_STO3_ADC_L_VOL_SFT 8
501#define RT5677_STO3_ADC_R_VOL_MASK (0x7f)
502#define RT5677_STO3_ADC_R_VOL_SFT 0
503
504/* Stereo4 ADC Digital Volume Control (0x23) */
505#define RT5677_STO4_ADC_L_VOL_MASK (0x7f << 8)
506#define RT5677_STO4_ADC_L_VOL_SFT 8
507#define RT5677_STO4_ADC_R_VOL_MASK (0x7f)
508#define RT5677_STO4_ADC_R_VOL_SFT 0
509
510/* Stereo4 ADC Mixer control (0x24) */
511#define RT5677_M_STO4_ADC_L2 (0x1 << 15)
512#define RT5677_M_STO4_ADC_L2_SFT 15
513#define RT5677_M_STO4_ADC_L1 (0x1 << 14)
514#define RT5677_M_STO4_ADC_L1_SFT 14
515#define RT5677_SEL_STO4_ADC1_MASK (0x3 << 12)
516#define RT5677_SEL_STO4_ADC1_SFT 12
517#define RT5677_SEL_STO4_ADC2_MASK (0x3 << 10)
518#define RT5677_SEL_STO4_ADC2_SFT 10
519#define RT5677_SEL_STO4_DMIC_MASK (0x3 << 8)
520#define RT5677_SEL_STO4_DMIC_SFT 8
521#define RT5677_M_STO4_ADC_R1 (0x1 << 7)
522#define RT5677_M_STO4_ADC_R1_SFT 7
523#define RT5677_M_STO4_ADC_R2 (0x1 << 6)
524#define RT5677_M_STO4_ADC_R2_SFT 6
525
526/* Stereo3 ADC Mixer control (0x25) */
527#define RT5677_M_STO3_ADC_L2 (0x1 << 15)
528#define RT5677_M_STO3_ADC_L2_SFT 15
529#define RT5677_M_STO3_ADC_L1 (0x1 << 14)
530#define RT5677_M_STO3_ADC_L1_SFT 14
531#define RT5677_SEL_STO3_ADC1_MASK (0x3 << 12)
532#define RT5677_SEL_STO3_ADC1_SFT 12
533#define RT5677_SEL_STO3_ADC2_MASK (0x3 << 10)
534#define RT5677_SEL_STO3_ADC2_SFT 10
535#define RT5677_SEL_STO3_DMIC_MASK (0x3 << 8)
536#define RT5677_SEL_STO3_DMIC_SFT 8
537#define RT5677_M_STO3_ADC_R1 (0x1 << 7)
538#define RT5677_M_STO3_ADC_R1_SFT 7
539#define RT5677_M_STO3_ADC_R2 (0x1 << 6)
540#define RT5677_M_STO3_ADC_R2_SFT 6
541
542/* Stereo2 ADC Mixer Control (0x26) */
543#define RT5677_M_STO2_ADC_L2 (0x1 << 15)
544#define RT5677_M_STO2_ADC_L2_SFT 15
545#define RT5677_M_STO2_ADC_L1 (0x1 << 14)
546#define RT5677_M_STO2_ADC_L1_SFT 14
547#define RT5677_SEL_STO2_ADC1_MASK (0x3 << 12)
548#define RT5677_SEL_STO2_ADC1_SFT 12
549#define RT5677_SEL_STO2_ADC2_MASK (0x3 << 10)
550#define RT5677_SEL_STO2_ADC2_SFT 10
551#define RT5677_SEL_STO2_DMIC_MASK (0x3 << 8)
552#define RT5677_SEL_STO2_DMIC_SFT 8
553#define RT5677_M_STO2_ADC_R1 (0x1 << 7)
554#define RT5677_M_STO2_ADC_R1_SFT 7
555#define RT5677_M_STO2_ADC_R2 (0x1 << 6)
556#define RT5677_M_STO2_ADC_R2_SFT 6
557#define RT5677_SEL_STO2_LR_MIX_MASK (0x1 << 0)
558#define RT5677_SEL_STO2_LR_MIX_SFT 0
559#define RT5677_SEL_STO2_LR_MIX_L (0x0 << 0)
560#define RT5677_SEL_STO2_LR_MIX_LR (0x1 << 0)
561
562/* Stereo1 ADC Mixer control (0x27) */
563#define RT5677_M_STO1_ADC_L2 (0x1 << 15)
564#define RT5677_M_STO1_ADC_L2_SFT 15
565#define RT5677_M_STO1_ADC_L1 (0x1 << 14)
566#define RT5677_M_STO1_ADC_L1_SFT 14
567#define RT5677_SEL_STO1_ADC1_MASK (0x3 << 12)
568#define RT5677_SEL_STO1_ADC1_SFT 12
569#define RT5677_SEL_STO1_ADC2_MASK (0x3 << 10)
570#define RT5677_SEL_STO1_ADC2_SFT 10
571#define RT5677_SEL_STO1_DMIC_MASK (0x3 << 8)
572#define RT5677_SEL_STO1_DMIC_SFT 8
573#define RT5677_M_STO1_ADC_R1 (0x1 << 7)
574#define RT5677_M_STO1_ADC_R1_SFT 7
575#define RT5677_M_STO1_ADC_R2 (0x1 << 6)
576#define RT5677_M_STO1_ADC_R2_SFT 6
577
578/* Mono ADC Mixer control (0x28) */
579#define RT5677_M_MONO_ADC_L2 (0x1 << 15)
580#define RT5677_M_MONO_ADC_L2_SFT 15
581#define RT5677_M_MONO_ADC_L1 (0x1 << 14)
582#define RT5677_M_MONO_ADC_L1_SFT 14
583#define RT5677_SEL_MONO_ADC_L1_MASK (0x3 << 12)
584#define RT5677_SEL_MONO_ADC_L1_SFT 12
585#define RT5677_SEL_MONO_ADC_L2_MASK (0x3 << 10)
586#define RT5677_SEL_MONO_ADC_L2_SFT 10
587#define RT5677_SEL_MONO_DMIC_L_MASK (0x3 << 8)
588#define RT5677_SEL_MONO_DMIC_L_SFT 8
589#define RT5677_M_MONO_ADC_R1 (0x1 << 7)
590#define RT5677_M_MONO_ADC_R1_SFT 7
591#define RT5677_M_MONO_ADC_R2 (0x1 << 6)
592#define RT5677_M_MONO_ADC_R2_SFT 6
593#define RT5677_SEL_MONO_ADC_R1_MASK (0x3 << 4)
594#define RT5677_SEL_MONO_ADC_R1_SFT 4
595#define RT5677_SEL_MONO_ADC_R2_MASK (0x3 << 2)
596#define RT5677_SEL_MONO_ADC_R2_SFT 2
597#define RT5677_SEL_MONO_DMIC_R_MASK (0x3 << 0)
598#define RT5677_SEL_MONO_DMIC_R_SFT 0
599
600/* ADC/IF/DSP to DAC1 Mixer control (0x29) */
601#define RT5677_M_ADDA_MIXER1_L (0x1 << 15)
602#define RT5677_M_ADDA_MIXER1_L_SFT 15
603#define RT5677_M_DAC1_L (0x1 << 14)
604#define RT5677_M_DAC1_L_SFT 14
605#define RT5677_DAC1_L_SEL_MASK (0x7 << 8)
606#define RT5677_DAC1_L_SEL_SFT 8
607#define RT5677_M_ADDA_MIXER1_R (0x1 << 7)
608#define RT5677_M_ADDA_MIXER1_R_SFT 7
609#define RT5677_M_DAC1_R (0x1 << 6)
610#define RT5677_M_DAC1_R_SFT 6
611#define RT5677_ADDA1_SEL_MASK (0x3 << 0)
612#define RT5677_ADDA1_SEL_SFT 0
613
614/* Stereo1 DAC Mixer L/R Control (0x2a) */
615#define RT5677_M_ST_DAC1_L (0x1 << 15)
616#define RT5677_M_ST_DAC1_L_SFT 15
617#define RT5677_M_DAC1_L_STO_L (0x1 << 13)
618#define RT5677_M_DAC1_L_STO_L_SFT 13
619#define RT5677_DAC1_L_STO_L_VOL_MASK (0x1 << 12)
620#define RT5677_DAC1_L_STO_L_VOL_SFT 12
621#define RT5677_M_DAC2_L_STO_L (0x1 << 11)
622#define RT5677_M_DAC2_L_STO_L_SFT 11
623#define RT5677_DAC2_L_STO_L_VOL_MASK (0x1 << 10)
624#define RT5677_DAC2_L_STO_L_VOL_SFT 10
625#define RT5677_M_DAC1_R_STO_L (0x1 << 9)
626#define RT5677_M_DAC1_R_STO_L_SFT 9
627#define RT5677_DAC1_R_STO_L_VOL_MASK (0x1 << 8)
628#define RT5677_DAC1_R_STO_L_VOL_SFT 8
629#define RT5677_M_ST_DAC1_R (0x1 << 7)
630#define RT5677_M_ST_DAC1_R_SFT 7
631#define RT5677_M_DAC1_R_STO_R (0x1 << 5)
632#define RT5677_M_DAC1_R_STO_R_SFT 5
633#define RT5677_DAC1_R_STO_R_VOL_MASK (0x1 << 4)
634#define RT5677_DAC1_R_STO_R_VOL_SFT 4
635#define RT5677_M_DAC2_R_STO_R (0x1 << 3)
636#define RT5677_M_DAC2_R_STO_R_SFT 3
637#define RT5677_DAC2_R_STO_R_VOL_MASK (0x1 << 2)
638#define RT5677_DAC2_R_STO_R_VOL_SFT 2
639#define RT5677_M_DAC1_L_STO_R (0x1 << 1)
640#define RT5677_M_DAC1_L_STO_R_SFT 1
641#define RT5677_DAC1_L_STO_R_VOL_MASK (0x1 << 0)
642#define RT5677_DAC1_L_STO_R_VOL_SFT 0
643
644/* Mono DAC Mixer L/R Control (0x2b) */
645#define RT5677_M_ST_DAC2_L (0x1 << 15)
646#define RT5677_M_ST_DAC2_L_SFT 15
647#define RT5677_M_DAC2_L_MONO_L (0x1 << 13)
648#define RT5677_M_DAC2_L_MONO_L_SFT 13
649#define RT5677_DAC2_L_MONO_L_VOL_MASK (0x1 << 12)
650#define RT5677_DAC2_L_MONO_L_VOL_SFT 12
651#define RT5677_M_DAC2_R_MONO_L (0x1 << 11)
652#define RT5677_M_DAC2_R_MONO_L_SFT 11
653#define RT5677_DAC2_R_MONO_L_VOL_MASK (0x1 << 10)
654#define RT5677_DAC2_R_MONO_L_VOL_SFT 10
655#define RT5677_M_DAC1_L_MONO_L (0x1 << 9)
656#define RT5677_M_DAC1_L_MONO_L_SFT 9
657#define RT5677_DAC1_L_MONO_L_VOL_MASK (0x1 << 8)
658#define RT5677_DAC1_L_MONO_L_VOL_SFT 8
659#define RT5677_M_ST_DAC2_R (0x1 << 7)
660#define RT5677_M_ST_DAC2_R_SFT 7
661#define RT5677_M_DAC2_R_MONO_R (0x1 << 5)
662#define RT5677_M_DAC2_R_MONO_R_SFT 5
663#define RT5677_DAC2_R_MONO_R_VOL_MASK (0x1 << 4)
664#define RT5677_DAC2_R_MONO_R_VOL_SFT 4
665#define RT5677_M_DAC1_R_MONO_R (0x1 << 3)
666#define RT5677_M_DAC1_R_MONO_R_SFT 3
667#define RT5677_DAC1_R_MONO_R_VOL_MASK (0x1 << 2)
668#define RT5677_DAC1_R_MONO_R_VOL_SFT 2
669#define RT5677_M_DAC2_L_MONO_R (0x1 << 1)
670#define RT5677_M_DAC2_L_MONO_R_SFT 1
671#define RT5677_DAC2_L_MONO_R_VOL_MASK (0x1 << 0)
672#define RT5677_DAC2_L_MONO_R_VOL_SFT 0
673
674/* DD Mixer 1 Control (0x2c) */
675#define RT5677_M_STO_L_DD1_L (0x1 << 15)
676#define RT5677_M_STO_L_DD1_L_SFT 15
677#define RT5677_STO_L_DD1_L_VOL_MASK (0x1 << 14)
678#define RT5677_STO_L_DD1_L_VOL_SFT 14
679#define RT5677_M_MONO_L_DD1_L (0x1 << 13)
680#define RT5677_M_MONO_L_DD1_L_SFT 13
681#define RT5677_MONO_L_DD1_L_VOL_MASK (0x1 << 12)
682#define RT5677_MONO_L_DD1_L_VOL_SFT 12
683#define RT5677_M_DAC3_L_DD1_L (0x1 << 11)
684#define RT5677_M_DAC3_L_DD1_L_SFT 11
685#define RT5677_DAC3_L_DD1_L_VOL_MASK (0x1 << 10)
686#define RT5677_DAC3_L_DD1_L_VOL_SFT 10
687#define RT5677_M_DAC3_R_DD1_L (0x1 << 9)
688#define RT5677_M_DAC3_R_DD1_L_SFT 9
689#define RT5677_DAC3_R_DD1_L_VOL_MASK (0x1 << 8)
690#define RT5677_DAC3_R_DD1_L_VOL_SFT 8
691#define RT5677_M_STO_R_DD1_R (0x1 << 7)
692#define RT5677_M_STO_R_DD1_R_SFT 7
693#define RT5677_STO_R_DD1_R_VOL_MASK (0x1 << 6)
694#define RT5677_STO_R_DD1_R_VOL_SFT 6
695#define RT5677_M_MONO_R_DD1_R (0x1 << 5)
696#define RT5677_M_MONO_R_DD1_R_SFT 5
697#define RT5677_MONO_R_DD1_R_VOL_MASK (0x1 << 4)
698#define RT5677_MONO_R_DD1_R_VOL_SFT 4
699#define RT5677_M_DAC3_R_DD1_R (0x1 << 3)
700#define RT5677_M_DAC3_R_DD1_R_SFT 3
701#define RT5677_DAC3_R_DD1_R_VOL_MASK (0x1 << 2)
702#define RT5677_DAC3_R_DD1_R_VOL_SFT 2
703#define RT5677_M_DAC3_L_DD1_R (0x1 << 1)
704#define RT5677_M_DAC3_L_DD1_R_SFT 1
705#define RT5677_DAC3_L_DD1_R_VOL_MASK (0x1 << 0)
706#define RT5677_DAC3_L_DD1_R_VOL_SFT 0
707
708/* DD Mixer 2 Control (0x2d) */
709#define RT5677_M_STO_L_DD2_L (0x1 << 15)
710#define RT5677_M_STO_L_DD2_L_SFT 15
711#define RT5677_STO_L_DD2_L_VOL_MASK (0x1 << 14)
712#define RT5677_STO_L_DD2_L_VOL_SFT 14
713#define RT5677_M_MONO_L_DD2_L (0x1 << 13)
714#define RT5677_M_MONO_L_DD2_L_SFT 13
715#define RT5677_MONO_L_DD2_L_VOL_MASK (0x1 << 12)
716#define RT5677_MONO_L_DD2_L_VOL_SFT 12
717#define RT5677_M_DAC4_L_DD2_L (0x1 << 11)
718#define RT5677_M_DAC4_L_DD2_L_SFT 11
719#define RT5677_DAC4_L_DD2_L_VOL_MASK (0x1 << 10)
720#define RT5677_DAC4_L_DD2_L_VOL_SFT 10
721#define RT5677_M_DAC4_R_DD2_L (0x1 << 9)
722#define RT5677_M_DAC4_R_DD2_L_SFT 9
723#define RT5677_DAC4_R_DD2_L_VOL_MASK (0x1 << 8)
724#define RT5677_DAC4_R_DD2_L_VOL_SFT 8
725#define RT5677_M_STO_R_DD2_R (0x1 << 7)
726#define RT5677_M_STO_R_DD2_R_SFT 7
727#define RT5677_STO_R_DD2_R_VOL_MASK (0x1 << 6)
728#define RT5677_STO_R_DD2_R_VOL_SFT 6
729#define RT5677_M_MONO_R_DD2_R (0x1 << 5)
730#define RT5677_M_MONO_R_DD2_R_SFT 5
731#define RT5677_MONO_R_DD2_R_VOL_MASK (0x1 << 4)
732#define RT5677_MONO_R_DD2_R_VOL_SFT 4
733#define RT5677_M_DAC4_R_DD2_R (0x1 << 3)
734#define RT5677_M_DAC4_R_DD2_R_SFT 3
735#define RT5677_DAC4_R_DD2_R_VOL_MASK (0x1 << 2)
736#define RT5677_DAC4_R_DD2_R_VOL_SFT 2
737#define RT5677_M_DAC4_L_DD2_R (0x1 << 1)
738#define RT5677_M_DAC4_L_DD2_R_SFT 1
739#define RT5677_DAC4_L_DD2_R_VOL_MASK (0x1 << 0)
740#define RT5677_DAC4_L_DD2_R_VOL_SFT 0
741
742/* IF3 data control (0x2f) */
743#define RT5677_IF3_DAC_SEL_MASK (0x3 << 6)
744#define RT5677_IF3_DAC_SEL_SFT 6
745#define RT5677_IF3_ADC_SEL_MASK (0x3 << 4)
746#define RT5677_IF3_ADC_SEL_SFT 4
747#define RT5677_IF3_ADC_IN_MASK (0xf << 0)
748#define RT5677_IF3_ADC_IN_SFT 0
749
750/* IF4 data control (0x30) */
751#define RT5677_IF4_ADC_IN_MASK (0xf << 4)
752#define RT5677_IF4_ADC_IN_SFT 4
753#define RT5677_IF4_DAC_SEL_MASK (0x3 << 2)
754#define RT5677_IF4_DAC_SEL_SFT 2
755#define RT5677_IF4_ADC_SEL_MASK (0x3 << 0)
756#define RT5677_IF4_ADC_SEL_SFT 0
757
758/* PDM Output Control (0x31) */
759#define RT5677_M_PDM1_L (0x1 << 15)
760#define RT5677_M_PDM1_L_SFT 15
761#define RT5677_SEL_PDM1_L_MASK (0x3 << 12)
762#define RT5677_SEL_PDM1_L_SFT 12
763#define RT5677_M_PDM1_R (0x1 << 11)
764#define RT5677_M_PDM1_R_SFT 11
765#define RT5677_SEL_PDM1_R_MASK (0x3 << 8)
766#define RT5677_SEL_PDM1_R_SFT 8
767#define RT5677_M_PDM2_L (0x1 << 7)
768#define RT5677_M_PDM2_L_SFT 7
769#define RT5677_SEL_PDM2_L_MASK (0x3 << 4)
770#define RT5677_SEL_PDM2_L_SFT 4
771#define RT5677_M_PDM2_R (0x1 << 3)
772#define RT5677_M_PDM2_R_SFT 3
773#define RT5677_SEL_PDM2_R_MASK (0x3 << 0)
774#define RT5677_SEL_PDM2_R_SFT 0
775
776/* PDM I2C / Data Control 1 (0x32) */
777#define RT5677_PDM2_PW_DOWN (0x1 << 7)
778#define RT5677_PDM1_PW_DOWN (0x1 << 6)
779#define RT5677_PDM2_BUSY (0x1 << 5)
780#define RT5677_PDM1_BUSY (0x1 << 4)
781#define RT5677_PDM_PATTERN (0x1 << 3)
782#define RT5677_PDM_GAIN (0x1 << 2)
783#define RT5677_PDM_DIV_MASK (0x3 << 0)
784
785/* PDM I2C / Data Control 2 (0x33) */
786#define RT5677_PDM1_I2C_ID (0xf << 12)
787#define RT5677_PDM1_EXE (0x1 << 11)
788#define RT5677_PDM1_I2C_CMD (0x1 << 10)
789#define RT5677_PDM1_I2C_EXE (0x1 << 9)
790#define RT5677_PDM1_I2C_BUSY (0x1 << 8)
791#define RT5677_PDM2_I2C_ID (0xf << 4)
792#define RT5677_PDM2_EXE (0x1 << 3)
793#define RT5677_PDM2_I2C_CMD (0x1 << 2)
794#define RT5677_PDM2_I2C_EXE (0x1 << 1)
795#define RT5677_PDM2_I2C_BUSY (0x1 << 0)
796
797/* MX3C TDM1 control 1 (0x3c) */
798#define RT5677_IF1_ADC4_MASK (0x3 << 10)
799#define RT5677_IF1_ADC4_SFT 10
800#define RT5677_IF1_ADC3_MASK (0x3 << 8)
801#define RT5677_IF1_ADC3_SFT 8
802#define RT5677_IF1_ADC2_MASK (0x3 << 6)
803#define RT5677_IF1_ADC2_SFT 6
804#define RT5677_IF1_ADC1_MASK (0x3 << 4)
805#define RT5677_IF1_ADC1_SFT 4
806
807/* MX41 TDM2 control 1 (0x41) */
808#define RT5677_IF2_ADC4_MASK (0x3 << 10)
809#define RT5677_IF2_ADC4_SFT 10
810#define RT5677_IF2_ADC3_MASK (0x3 << 8)
811#define RT5677_IF2_ADC3_SFT 8
812#define RT5677_IF2_ADC2_MASK (0x3 << 6)
813#define RT5677_IF2_ADC2_SFT 6
814#define RT5677_IF2_ADC1_MASK (0x3 << 4)
815#define RT5677_IF2_ADC1_SFT 4
816
817/* Digital Microphone Control 1 (0x50) */
818#define RT5677_DMIC_1_EN_MASK (0x1 << 15)
819#define RT5677_DMIC_1_EN_SFT 15
820#define RT5677_DMIC_1_DIS (0x0 << 15)
821#define RT5677_DMIC_1_EN (0x1 << 15)
822#define RT5677_DMIC_2_EN_MASK (0x1 << 14)
823#define RT5677_DMIC_2_EN_SFT 14
824#define RT5677_DMIC_2_DIS (0x0 << 14)
825#define RT5677_DMIC_2_EN (0x1 << 14)
826#define RT5677_DMIC_L_STO1_LH_MASK (0x1 << 13)
827#define RT5677_DMIC_L_STO1_LH_SFT 13
828#define RT5677_DMIC_L_STO1_LH_FALLING (0x0 << 13)
829#define RT5677_DMIC_L_STO1_LH_RISING (0x1 << 13)
830#define RT5677_DMIC_R_STO1_LH_MASK (0x1 << 12)
831#define RT5677_DMIC_R_STO1_LH_SFT 12
832#define RT5677_DMIC_R_STO1_LH_FALLING (0x0 << 12)
833#define RT5677_DMIC_R_STO1_LH_RISING (0x1 << 12)
834#define RT5677_DMIC_L_STO3_LH_MASK (0x1 << 11)
835#define RT5677_DMIC_L_STO3_LH_SFT 11
836#define RT5677_DMIC_L_STO3_LH_FALLING (0x0 << 11)
837#define RT5677_DMIC_L_STO3_LH_RISING (0x1 << 11)
838#define RT5677_DMIC_R_STO3_LH_MASK (0x1 << 10)
839#define RT5677_DMIC_R_STO3_LH_SFT 10
840#define RT5677_DMIC_R_STO3_LH_FALLING (0x0 << 10)
841#define RT5677_DMIC_R_STO3_LH_RISING (0x1 << 10)
842#define RT5677_DMIC_L_STO2_LH_MASK (0x1 << 9)
843#define RT5677_DMIC_L_STO2_LH_SFT 9
844#define RT5677_DMIC_L_STO2_LH_FALLING (0x0 << 9)
845#define RT5677_DMIC_L_STO2_LH_RISING (0x1 << 9)
846#define RT5677_DMIC_R_STO2_LH_MASK (0x1 << 8)
847#define RT5677_DMIC_R_STO2_LH_SFT 8
848#define RT5677_DMIC_R_STO2_LH_FALLING (0x0 << 8)
849#define RT5677_DMIC_R_STO2_LH_RISING (0x1 << 8)
850#define RT5677_DMIC_CLK_MASK (0x7 << 5)
851#define RT5677_DMIC_CLK_SFT 5
852#define RT5677_DMIC_3_EN_MASK (0x1 << 4)
853#define RT5677_DMIC_3_EN_SFT 4
854#define RT5677_DMIC_3_DIS (0x0 << 4)
855#define RT5677_DMIC_3_EN (0x1 << 4)
856#define RT5677_DMIC_R_MONO_LH_MASK (0x1 << 2)
857#define RT5677_DMIC_R_MONO_LH_SFT 2
858#define RT5677_DMIC_R_MONO_LH_FALLING (0x0 << 2)
859#define RT5677_DMIC_R_MONO_LH_RISING (0x1 << 2)
860#define RT5677_DMIC_L_STO4_LH_MASK (0x1 << 1)
861#define RT5677_DMIC_L_STO4_LH_SFT 1
862#define RT5677_DMIC_L_STO4_LH_FALLING (0x0 << 1)
863#define RT5677_DMIC_L_STO4_LH_RISING (0x1 << 1)
864#define RT5677_DMIC_R_STO4_LH_MASK (0x1 << 0)
865#define RT5677_DMIC_R_STO4_LH_SFT 0
866#define RT5677_DMIC_R_STO4_LH_FALLING (0x0 << 0)
867#define RT5677_DMIC_R_STO4_LH_RISING (0x1 << 0)
868
869/* Digital Microphone Control 2 (0x51) */
870#define RT5677_DMIC_4_EN_MASK (0x1 << 15)
871#define RT5677_DMIC_4_EN_SFT 15
872#define RT5677_DMIC_4_DIS (0x0 << 15)
873#define RT5677_DMIC_4_EN (0x1 << 15)
874#define RT5677_DMIC_4L_LH_MASK (0x1 << 7)
875#define RT5677_DMIC_4L_LH_SFT 7
876#define RT5677_DMIC_4L_LH_FALLING (0x0 << 7)
877#define RT5677_DMIC_4L_LH_RISING (0x1 << 7)
878#define RT5677_DMIC_4R_LH_MASK (0x1 << 6)
879#define RT5677_DMIC_4R_LH_SFT 6
880#define RT5677_DMIC_4R_LH_FALLING (0x0 << 6)
881#define RT5677_DMIC_4R_LH_RISING (0x1 << 6)
882#define RT5677_DMIC_3L_LH_MASK (0x1 << 5)
883#define RT5677_DMIC_3L_LH_SFT 5
884#define RT5677_DMIC_3L_LH_FALLING (0x0 << 5)
885#define RT5677_DMIC_3L_LH_RISING (0x1 << 5)
886#define RT5677_DMIC_3R_LH_MASK (0x1 << 4)
887#define RT5677_DMIC_3R_LH_SFT 4
888#define RT5677_DMIC_3R_LH_FALLING (0x0 << 4)
889#define RT5677_DMIC_3R_LH_RISING (0x1 << 4)
890#define RT5677_DMIC_2L_LH_MASK (0x1 << 3)
891#define RT5677_DMIC_2L_LH_SFT 3
892#define RT5677_DMIC_2L_LH_FALLING (0x0 << 3)
893#define RT5677_DMIC_2L_LH_RISING (0x1 << 3)
894#define RT5677_DMIC_2R_LH_MASK (0x1 << 2)
895#define RT5677_DMIC_2R_LH_SFT 2
896#define RT5677_DMIC_2R_LH_FALLING (0x0 << 2)
897#define RT5677_DMIC_2R_LH_RISING (0x1 << 2)
898#define RT5677_DMIC_1L_LH_MASK (0x1 << 1)
899#define RT5677_DMIC_1L_LH_SFT 1
900#define RT5677_DMIC_1L_LH_FALLING (0x0 << 1)
901#define RT5677_DMIC_1L_LH_RISING (0x1 << 1)
902#define RT5677_DMIC_1R_LH_MASK (0x1 << 0)
903#define RT5677_DMIC_1R_LH_SFT 0
904#define RT5677_DMIC_1R_LH_FALLING (0x0 << 0)
905#define RT5677_DMIC_1R_LH_RISING (0x1 << 0)
906
907/* Power Management for Digital 1 (0x61) */
908#define RT5677_PWR_I2S1 (0x1 << 15)
909#define RT5677_PWR_I2S1_BIT 15
910#define RT5677_PWR_I2S2 (0x1 << 14)
911#define RT5677_PWR_I2S2_BIT 14
912#define RT5677_PWR_I2S3 (0x1 << 13)
913#define RT5677_PWR_I2S3_BIT 13
914#define RT5677_PWR_DAC1 (0x1 << 12)
915#define RT5677_PWR_DAC1_BIT 12
916#define RT5677_PWR_DAC2 (0x1 << 11)
917#define RT5677_PWR_DAC2_BIT 11
918#define RT5677_PWR_I2S4 (0x1 << 10)
919#define RT5677_PWR_I2S4_BIT 10
920#define RT5677_PWR_SLB (0x1 << 9)
921#define RT5677_PWR_SLB_BIT 9
922#define RT5677_PWR_DAC3 (0x1 << 7)
923#define RT5677_PWR_DAC3_BIT 7
924#define RT5677_PWR_ADCFED2 (0x1 << 4)
925#define RT5677_PWR_ADCFED2_BIT 4
926#define RT5677_PWR_ADCFED1 (0x1 << 3)
927#define RT5677_PWR_ADCFED1_BIT 3
928#define RT5677_PWR_ADC_L (0x1 << 2)
929#define RT5677_PWR_ADC_L_BIT 2
930#define RT5677_PWR_ADC_R (0x1 << 1)
931#define RT5677_PWR_ADC_R_BIT 1
932#define RT5677_PWR_I2C_MASTER (0x1 << 0)
933#define RT5677_PWR_I2C_MASTER_BIT 0
934
935/* Power Management for Digital 2 (0x62) */
936#define RT5677_PWR_ADC_S1F (0x1 << 15)
937#define RT5677_PWR_ADC_S1F_BIT 15
938#define RT5677_PWR_ADC_MF_L (0x1 << 14)
939#define RT5677_PWR_ADC_MF_L_BIT 14
940#define RT5677_PWR_ADC_MF_R (0x1 << 13)
941#define RT5677_PWR_ADC_MF_R_BIT 13
942#define RT5677_PWR_DAC_S1F (0x1 << 12)
943#define RT5677_PWR_DAC_S1F_BIT 12
944#define RT5677_PWR_DAC_M2F_L (0x1 << 11)
945#define RT5677_PWR_DAC_M2F_L_BIT 11
946#define RT5677_PWR_DAC_M2F_R (0x1 << 10)
947#define RT5677_PWR_DAC_M2F_R_BIT 10
948#define RT5677_PWR_DAC_M3F_L (0x1 << 9)
949#define RT5677_PWR_DAC_M3F_L_BIT 9
950#define RT5677_PWR_DAC_M3F_R (0x1 << 8)
951#define RT5677_PWR_DAC_M3F_R_BIT 8
952#define RT5677_PWR_DAC_M4F_L (0x1 << 7)
953#define RT5677_PWR_DAC_M4F_L_BIT 7
954#define RT5677_PWR_DAC_M4F_R (0x1 << 6)
955#define RT5677_PWR_DAC_M4F_R_BIT 6
956#define RT5677_PWR_ADC_S2F (0x1 << 5)
957#define RT5677_PWR_ADC_S2F_BIT 5
958#define RT5677_PWR_ADC_S3F (0x1 << 4)
959#define RT5677_PWR_ADC_S3F_BIT 4
960#define RT5677_PWR_ADC_S4F (0x1 << 3)
961#define RT5677_PWR_ADC_S4F_BIT 3
962#define RT5677_PWR_PDM1 (0x1 << 2)
963#define RT5677_PWR_PDM1_BIT 2
964#define RT5677_PWR_PDM2 (0x1 << 1)
965#define RT5677_PWR_PDM2_BIT 1
966
967/* Power Management for Analog 1 (0x63) */
968#define RT5677_PWR_VREF1 (0x1 << 15)
969#define RT5677_PWR_VREF1_BIT 15
970#define RT5677_PWR_FV1 (0x1 << 14)
971#define RT5677_PWR_FV1_BIT 14
972#define RT5677_PWR_MB (0x1 << 13)
973#define RT5677_PWR_MB_BIT 13
974#define RT5677_PWR_LO1 (0x1 << 12)
975#define RT5677_PWR_LO1_BIT 12
976#define RT5677_PWR_BG (0x1 << 11)
977#define RT5677_PWR_BG_BIT 11
978#define RT5677_PWR_LO2 (0x1 << 10)
979#define RT5677_PWR_LO2_BIT 10
980#define RT5677_PWR_LO3 (0x1 << 9)
981#define RT5677_PWR_LO3_BIT 9
982#define RT5677_PWR_VREF2 (0x1 << 8)
983#define RT5677_PWR_VREF2_BIT 8
984#define RT5677_PWR_FV2 (0x1 << 7)
985#define RT5677_PWR_FV2_BIT 7
986#define RT5677_LDO2_SEL_MASK (0x7 << 4)
987#define RT5677_LDO2_SEL_SFT 4
988#define RT5677_LDO1_SEL_MASK (0x7 << 0)
989#define RT5677_LDO1_SEL_SFT 0
990
991/* Power Management for Analog 2 (0x64) */
992#define RT5677_PWR_BST1 (0x1 << 15)
993#define RT5677_PWR_BST1_BIT 15
994#define RT5677_PWR_BST2 (0x1 << 14)
995#define RT5677_PWR_BST2_BIT 14
996#define RT5677_PWR_CLK_MB1 (0x1 << 13)
997#define RT5677_PWR_CLK_MB1_BIT 13
998#define RT5677_PWR_SLIM (0x1 << 12)
999#define RT5677_PWR_SLIM_BIT 12
1000#define RT5677_PWR_MB1 (0x1 << 11)
1001#define RT5677_PWR_MB1_BIT 11
1002#define RT5677_PWR_PP_MB1 (0x1 << 10)
1003#define RT5677_PWR_PP_MB1_BIT 10
1004#define RT5677_PWR_PLL1 (0x1 << 9)
1005#define RT5677_PWR_PLL1_BIT 9
1006#define RT5677_PWR_PLL2 (0x1 << 8)
1007#define RT5677_PWR_PLL2_BIT 8
1008#define RT5677_PWR_CORE (0x1 << 7)
1009#define RT5677_PWR_CORE_BIT 7
1010#define RT5677_PWR_CLK_MB (0x1 << 6)
1011#define RT5677_PWR_CLK_MB_BIT 6
1012#define RT5677_PWR_BST1_P (0x1 << 5)
1013#define RT5677_PWR_BST1_P_BIT 5
1014#define RT5677_PWR_BST2_P (0x1 << 4)
1015#define RT5677_PWR_BST2_P_BIT 4
1016#define RT5677_PWR_IPTV (0x1 << 3)
1017#define RT5677_PWR_IPTV_BIT 3
1018#define RT5677_PWR_25M_CLK (0x1 << 1)
1019#define RT5677_PWR_25M_CLK_BIT 1
1020#define RT5677_PWR_LDO1 (0x1 << 0)
1021#define RT5677_PWR_LDO1_BIT 0
1022
1023/* Power Management for DSP (0x65) */
1024#define RT5677_PWR_SR7 (0x1 << 10)
1025#define RT5677_PWR_SR7_BIT 10
1026#define RT5677_PWR_SR6 (0x1 << 9)
1027#define RT5677_PWR_SR6_BIT 9
1028#define RT5677_PWR_SR5 (0x1 << 8)
1029#define RT5677_PWR_SR5_BIT 8
1030#define RT5677_PWR_SR4 (0x1 << 7)
1031#define RT5677_PWR_SR4_BIT 7
1032#define RT5677_PWR_SR3 (0x1 << 6)
1033#define RT5677_PWR_SR3_BIT 6
1034#define RT5677_PWR_SR2 (0x1 << 5)
1035#define RT5677_PWR_SR2_BIT 5
1036#define RT5677_PWR_SR1 (0x1 << 4)
1037#define RT5677_PWR_SR1_BIT 4
1038#define RT5677_PWR_SR0 (0x1 << 3)
1039#define RT5677_PWR_SR0_BIT 3
1040#define RT5677_PWR_MLT (0x1 << 2)
1041#define RT5677_PWR_MLT_BIT 2
1042#define RT5677_PWR_DSP (0x1 << 1)
1043#define RT5677_PWR_DSP_BIT 1
1044#define RT5677_PWR_DSP_CPU (0x1 << 0)
1045#define RT5677_PWR_DSP_CPU_BIT 0
1046
1047/* Power Status for DSP (0x66) */
1048#define RT5677_PWR_SR7_RDY (0x1 << 9)
1049#define RT5677_PWR_SR7_RDY_BIT 9
1050#define RT5677_PWR_SR6_RDY (0x1 << 8)
1051#define RT5677_PWR_SR6_RDY_BIT 8
1052#define RT5677_PWR_SR5_RDY (0x1 << 7)
1053#define RT5677_PWR_SR5_RDY_BIT 7
1054#define RT5677_PWR_SR4_RDY (0x1 << 6)
1055#define RT5677_PWR_SR4_RDY_BIT 6
1056#define RT5677_PWR_SR3_RDY (0x1 << 5)
1057#define RT5677_PWR_SR3_RDY_BIT 5
1058#define RT5677_PWR_SR2_RDY (0x1 << 4)
1059#define RT5677_PWR_SR2_RDY_BIT 4
1060#define RT5677_PWR_SR1_RDY (0x1 << 3)
1061#define RT5677_PWR_SR1_RDY_BIT 3
1062#define RT5677_PWR_SR0_RDY (0x1 << 2)
1063#define RT5677_PWR_SR0_RDY_BIT 2
1064#define RT5677_PWR_MLT_RDY (0x1 << 1)
1065#define RT5677_PWR_MLT_RDY_BIT 1
1066#define RT5677_PWR_DSP_RDY (0x1 << 0)
1067#define RT5677_PWR_DSP_RDY_BIT 0
1068
1069/* Power Management for DSP (0x67) */
1070#define RT5677_PWR_SLIM_ISO (0x1 << 11)
1071#define RT5677_PWR_SLIM_ISO_BIT 11
1072#define RT5677_PWR_CORE_ISO (0x1 << 10)
1073#define RT5677_PWR_CORE_ISO_BIT 10
1074#define RT5677_PWR_DSP_ISO (0x1 << 9)
1075#define RT5677_PWR_DSP_ISO_BIT 9
1076#define RT5677_PWR_SR7_ISO (0x1 << 8)
1077#define RT5677_PWR_SR7_ISO_BIT 8
1078#define RT5677_PWR_SR6_ISO (0x1 << 7)
1079#define RT5677_PWR_SR6_ISO_BIT 7
1080#define RT5677_PWR_SR5_ISO (0x1 << 6)
1081#define RT5677_PWR_SR5_ISO_BIT 6
1082#define RT5677_PWR_SR4_ISO (0x1 << 5)
1083#define RT5677_PWR_SR4_ISO_BIT 5
1084#define RT5677_PWR_SR3_ISO (0x1 << 4)
1085#define RT5677_PWR_SR3_ISO_BIT 4
1086#define RT5677_PWR_SR2_ISO (0x1 << 3)
1087#define RT5677_PWR_SR2_ISO_BIT 3
1088#define RT5677_PWR_SR1_ISO (0x1 << 2)
1089#define RT5677_PWR_SR1_ISO_BIT 2
1090#define RT5677_PWR_SR0_ISO (0x1 << 1)
1091#define RT5677_PWR_SR0_ISO_BIT 1
1092#define RT5677_PWR_MLT_ISO (0x1 << 0)
1093#define RT5677_PWR_MLT_ISO_BIT 0
1094
1095/* I2S1/2/3/4 Audio Serial Data Port Control (0x6f 0x70 0x71 0x72) */
1096#define RT5677_I2S_MS_MASK (0x1 << 15)
1097#define RT5677_I2S_MS_SFT 15
1098#define RT5677_I2S_MS_M (0x0 << 15)
1099#define RT5677_I2S_MS_S (0x1 << 15)
1100#define RT5677_I2S_O_CP_MASK (0x3 << 10)
1101#define RT5677_I2S_O_CP_SFT 10
1102#define RT5677_I2S_O_CP_OFF (0x0 << 10)
1103#define RT5677_I2S_O_CP_U_LAW (0x1 << 10)
1104#define RT5677_I2S_O_CP_A_LAW (0x2 << 10)
1105#define RT5677_I2S_I_CP_MASK (0x3 << 8)
1106#define RT5677_I2S_I_CP_SFT 8
1107#define RT5677_I2S_I_CP_OFF (0x0 << 8)
1108#define RT5677_I2S_I_CP_U_LAW (0x1 << 8)
1109#define RT5677_I2S_I_CP_A_LAW (0x2 << 8)
1110#define RT5677_I2S_BP_MASK (0x1 << 7)
1111#define RT5677_I2S_BP_SFT 7
1112#define RT5677_I2S_BP_NOR (0x0 << 7)
1113#define RT5677_I2S_BP_INV (0x1 << 7)
1114#define RT5677_I2S_DL_MASK (0x3 << 2)
1115#define RT5677_I2S_DL_SFT 2
1116#define RT5677_I2S_DL_16 (0x0 << 2)
1117#define RT5677_I2S_DL_20 (0x1 << 2)
1118#define RT5677_I2S_DL_24 (0x2 << 2)
1119#define RT5677_I2S_DL_8 (0x3 << 2)
1120#define RT5677_I2S_DF_MASK (0x3 << 0)
1121#define RT5677_I2S_DF_SFT 0
1122#define RT5677_I2S_DF_I2S (0x0 << 0)
1123#define RT5677_I2S_DF_LEFT (0x1 << 0)
1124#define RT5677_I2S_DF_PCM_A (0x2 << 0)
1125#define RT5677_I2S_DF_PCM_B (0x3 << 0)
1126
1127/* Clock Tree Control 1 (0x73) */
1128#define RT5677_I2S_PD1_MASK (0x7 << 12)
1129#define RT5677_I2S_PD1_SFT 12
1130#define RT5677_I2S_PD1_1 (0x0 << 12)
1131#define RT5677_I2S_PD1_2 (0x1 << 12)
1132#define RT5677_I2S_PD1_3 (0x2 << 12)
1133#define RT5677_I2S_PD1_4 (0x3 << 12)
1134#define RT5677_I2S_PD1_6 (0x4 << 12)
1135#define RT5677_I2S_PD1_8 (0x5 << 12)
1136#define RT5677_I2S_PD1_12 (0x6 << 12)
1137#define RT5677_I2S_PD1_16 (0x7 << 12)
1138#define RT5677_I2S_BCLK_MS2_MASK (0x1 << 11)
1139#define RT5677_I2S_BCLK_MS2_SFT 11
1140#define RT5677_I2S_BCLK_MS2_32 (0x0 << 11)
1141#define RT5677_I2S_BCLK_MS2_64 (0x1 << 11)
1142#define RT5677_I2S_PD2_MASK (0x7 << 8)
1143#define RT5677_I2S_PD2_SFT 8
1144#define RT5677_I2S_PD2_1 (0x0 << 8)
1145#define RT5677_I2S_PD2_2 (0x1 << 8)
1146#define RT5677_I2S_PD2_3 (0x2 << 8)
1147#define RT5677_I2S_PD2_4 (0x3 << 8)
1148#define RT5677_I2S_PD2_6 (0x4 << 8)
1149#define RT5677_I2S_PD2_8 (0x5 << 8)
1150#define RT5677_I2S_PD2_12 (0x6 << 8)
1151#define RT5677_I2S_PD2_16 (0x7 << 8)
1152#define RT5677_I2S_BCLK_MS3_MASK (0x1 << 7)
1153#define RT5677_I2S_BCLK_MS3_SFT 7
1154#define RT5677_I2S_BCLK_MS3_32 (0x0 << 7)
1155#define RT5677_I2S_BCLK_MS3_64 (0x1 << 7)
1156#define RT5677_I2S_PD3_MASK (0x7 << 4)
1157#define RT5677_I2S_PD3_SFT 4
1158#define RT5677_I2S_PD3_1 (0x0 << 4)
1159#define RT5677_I2S_PD3_2 (0x1 << 4)
1160#define RT5677_I2S_PD3_3 (0x2 << 4)
1161#define RT5677_I2S_PD3_4 (0x3 << 4)
1162#define RT5677_I2S_PD3_6 (0x4 << 4)
1163#define RT5677_I2S_PD3_8 (0x5 << 4)
1164#define RT5677_I2S_PD3_12 (0x6 << 4)
1165#define RT5677_I2S_PD3_16 (0x7 << 4)
1166#define RT5677_I2S_BCLK_MS4_MASK (0x1 << 3)
1167#define RT5677_I2S_BCLK_MS4_SFT 3
1168#define RT5677_I2S_BCLK_MS4_32 (0x0 << 3)
1169#define RT5677_I2S_BCLK_MS4_64 (0x1 << 3)
1170#define RT5677_I2S_PD4_MASK (0x7 << 0)
1171#define RT5677_I2S_PD4_SFT 0
1172#define RT5677_I2S_PD4_1 (0x0 << 0)
1173#define RT5677_I2S_PD4_2 (0x1 << 0)
1174#define RT5677_I2S_PD4_3 (0x2 << 0)
1175#define RT5677_I2S_PD4_4 (0x3 << 0)
1176#define RT5677_I2S_PD4_6 (0x4 << 0)
1177#define RT5677_I2S_PD4_8 (0x5 << 0)
1178#define RT5677_I2S_PD4_12 (0x6 << 0)
1179#define RT5677_I2S_PD4_16 (0x7 << 0)
1180
1181/* Clock Tree Control 2 (0x74) */
1182#define RT5677_I2S_PD5_MASK (0x7 << 12)
1183#define RT5677_I2S_PD5_SFT 12
1184#define RT5677_I2S_PD5_1 (0x0 << 12)
1185#define RT5677_I2S_PD5_2 (0x1 << 12)
1186#define RT5677_I2S_PD5_3 (0x2 << 12)
1187#define RT5677_I2S_PD5_4 (0x3 << 12)
1188#define RT5677_I2S_PD5_6 (0x4 << 12)
1189#define RT5677_I2S_PD5_8 (0x5 << 12)
1190#define RT5677_I2S_PD5_12 (0x6 << 12)
1191#define RT5677_I2S_PD5_16 (0x7 << 12)
1192#define RT5677_I2S_PD6_MASK (0x7 << 8)
1193#define RT5677_I2S_PD6_SFT 8
1194#define RT5677_I2S_PD6_1 (0x0 << 8)
1195#define RT5677_I2S_PD6_2 (0x1 << 8)
1196#define RT5677_I2S_PD6_3 (0x2 << 8)
1197#define RT5677_I2S_PD6_4 (0x3 << 8)
1198#define RT5677_I2S_PD6_6 (0x4 << 8)
1199#define RT5677_I2S_PD6_8 (0x5 << 8)
1200#define RT5677_I2S_PD6_12 (0x6 << 8)
1201#define RT5677_I2S_PD6_16 (0x7 << 8)
1202#define RT5677_I2S_PD7_MASK (0x7 << 4)
1203#define RT5677_I2S_PD7_SFT 4
1204#define RT5677_I2S_PD7_1 (0x0 << 4)
1205#define RT5677_I2S_PD7_2 (0x1 << 4)
1206#define RT5677_I2S_PD7_3 (0x2 << 4)
1207#define RT5677_I2S_PD7_4 (0x3 << 4)
1208#define RT5677_I2S_PD7_6 (0x4 << 4)
1209#define RT5677_I2S_PD7_8 (0x5 << 4)
1210#define RT5677_I2S_PD7_12 (0x6 << 4)
1211#define RT5677_I2S_PD7_16 (0x7 << 4)
1212#define RT5677_I2S_PD8_MASK (0x7 << 0)
1213#define RT5677_I2S_PD8_SFT 0
1214#define RT5677_I2S_PD8_1 (0x0 << 0)
1215#define RT5677_I2S_PD8_2 (0x1 << 0)
1216#define RT5677_I2S_PD8_3 (0x2 << 0)
1217#define RT5677_I2S_PD8_4 (0x3 << 0)
1218#define RT5677_I2S_PD8_6 (0x4 << 0)
1219#define RT5677_I2S_PD8_8 (0x5 << 0)
1220#define RT5677_I2S_PD8_12 (0x6 << 0)
1221#define RT5677_I2S_PD8_16 (0x7 << 0)
1222
1223/* Clock Tree Control 3 (0x75) */
1224#define RT5677_DSP_ASRC_O_MASK (0x3 << 6)
1225#define RT5677_DSP_ASRC_O_SFT 6
1226#define RT5677_DSP_ASRC_O_1_0 (0x0 << 6)
1227#define RT5677_DSP_ASRC_O_1_5 (0x1 << 6)
1228#define RT5677_DSP_ASRC_O_2_0 (0x2 << 6)
1229#define RT5677_DSP_ASRC_O_3_0 (0x3 << 6)
1230#define RT5677_DSP_ASRC_I_MASK (0x3 << 4)
1231#define RT5677_DSP_ASRC_I_SFT 4
1232#define RT5677_DSP_ASRC_I_1_0 (0x0 << 4)
1233#define RT5677_DSP_ASRC_I_1_5 (0x1 << 4)
1234#define RT5677_DSP_ASRC_I_2_0 (0x2 << 4)
1235#define RT5677_DSP_ASRC_I_3_0 (0x3 << 4)
1236#define RT5677_DSP_BUS_PD_MASK (0x7 << 0)
1237#define RT5677_DSP_BUS_PD_SFT 0
1238#define RT5677_DSP_BUS_PD_1 (0x0 << 0)
1239#define RT5677_DSP_BUS_PD_2 (0x1 << 0)
1240#define RT5677_DSP_BUS_PD_3 (0x2 << 0)
1241#define RT5677_DSP_BUS_PD_4 (0x3 << 0)
1242#define RT5677_DSP_BUS_PD_6 (0x4 << 0)
1243#define RT5677_DSP_BUS_PD_8 (0x5 << 0)
1244#define RT5677_DSP_BUS_PD_12 (0x6 << 0)
1245#define RT5677_DSP_BUS_PD_16 (0x7 << 0)
1246
1247#define RT5677_PLL_INP_MAX 40000000
1248#define RT5677_PLL_INP_MIN 2048000
1249/* PLL M/N/K Code Control 1 (0x7a 0x7c) */
1250#define RT5677_PLL_N_MAX 0x1ff
1251#define RT5677_PLL_N_MASK (RT5677_PLL_N_MAX << 7)
1252#define RT5677_PLL_N_SFT 7
1253#define RT5677_PLL_K_BP (0x1 << 5)
1254#define RT5677_PLL_K_BP_SFT 5
1255#define RT5677_PLL_K_MAX 0x1f
1256#define RT5677_PLL_K_MASK (RT5677_PLL_K_MAX)
1257#define RT5677_PLL_K_SFT 0
1258
1259/* PLL M/N/K Code Control 2 (0x7b 0x7d) */
1260#define RT5677_PLL_M_MAX 0xf
1261#define RT5677_PLL_M_MASK (RT5677_PLL_M_MAX << 12)
1262#define RT5677_PLL_M_SFT 12
1263#define RT5677_PLL_M_BP (0x1 << 11)
1264#define RT5677_PLL_M_BP_SFT 11
1265
1266/* Global Clock Control 1 (0x80) */
1267#define RT5677_SCLK_SRC_MASK (0x3 << 14)
1268#define RT5677_SCLK_SRC_SFT 14
1269#define RT5677_SCLK_SRC_MCLK (0x0 << 14)
1270#define RT5677_SCLK_SRC_PLL1 (0x1 << 14)
1271#define RT5677_SCLK_SRC_RCCLK (0x2 << 14) /* 25MHz */
1272#define RT5677_SCLK_SRC_SLIM (0x3 << 14)
1273#define RT5677_PLL1_SRC_MASK (0x7 << 11)
1274#define RT5677_PLL1_SRC_SFT 11
1275#define RT5677_PLL1_SRC_MCLK (0x0 << 11)
1276#define RT5677_PLL1_SRC_BCLK1 (0x1 << 11)
1277#define RT5677_PLL1_SRC_BCLK2 (0x2 << 11)
1278#define RT5677_PLL1_SRC_BCLK3 (0x3 << 11)
1279#define RT5677_PLL1_SRC_BCLK4 (0x4 << 11)
1280#define RT5677_PLL1_SRC_RCCLK (0x5 << 11)
1281#define RT5677_PLL1_SRC_SLIM (0x6 << 11)
1282#define RT5677_MCLK_SRC_MASK (0x1 << 10)
1283#define RT5677_MCLK_SRC_SFT 10
1284#define RT5677_MCLK1_SRC (0x0 << 10)
1285#define RT5677_MCLK2_SRC (0x1 << 10)
1286#define RT5677_PLL1_PD_MASK (0x1 << 8)
1287#define RT5677_PLL1_PD_SFT 8
1288#define RT5677_PLL1_PD_1 (0x0 << 8)
1289#define RT5677_PLL1_PD_2 (0x1 << 8)
1290#define RT5671_DAC_OSR_MASK (0x3 << 6)
1291#define RT5671_DAC_OSR_SFT 6
1292#define RT5671_DAC_OSR_128 (0x0 << 6)
1293#define RT5671_DAC_OSR_64 (0x1 << 6)
1294#define RT5671_DAC_OSR_32 (0x2 << 6)
1295#define RT5671_ADC_OSR_MASK (0x3 << 4)
1296#define RT5671_ADC_OSR_SFT 4
1297#define RT5671_ADC_OSR_128 (0x0 << 4)
1298#define RT5671_ADC_OSR_64 (0x1 << 4)
1299#define RT5671_ADC_OSR_32 (0x2 << 4)
1300
1301/* Global Clock Control 2 (0x81) */
1302#define RT5677_PLL2_PR_SRC_MASK (0x1 << 15)
1303#define RT5677_PLL2_PR_SRC_SFT 15
1304#define RT5677_PLL2_PR_SRC_MCLK1 (0x0 << 15)
1305#define RT5677_PLL2_PR_SRC_MCLK2 (0x1 << 15)
1306#define RT5677_PLL2_SRC_MASK (0x7 << 12)
1307#define RT5677_PLL2_SRC_SFT 12
1308#define RT5677_PLL2_SRC_MCLK (0x0 << 12)
1309#define RT5677_PLL2_SRC_BCLK1 (0x1 << 12)
1310#define RT5677_PLL2_SRC_BCLK2 (0x2 << 12)
1311#define RT5677_PLL2_SRC_BCLK3 (0x3 << 12)
1312#define RT5677_PLL2_SRC_BCLK4 (0x4 << 12)
1313#define RT5677_PLL2_SRC_RCCLK (0x5 << 12)
1314#define RT5677_PLL2_SRC_SLIM (0x6 << 12)
1315#define RT5671_DSP_ASRC_O_SRC (0x3 << 10)
1316#define RT5671_DSP_ASRC_O_SRC_SFT 10
1317#define RT5671_DSP_ASRC_O_MCLK (0x0 << 10)
1318#define RT5671_DSP_ASRC_O_PLL1 (0x1 << 10)
1319#define RT5671_DSP_ASRC_O_SLIM (0x2 << 10)
1320#define RT5671_DSP_ASRC_O_RCCLK (0x3 << 10)
1321#define RT5671_DSP_ASRC_I_SRC (0x3 << 8)
1322#define RT5671_DSP_ASRC_I_SRC_SFT 8
1323#define RT5671_DSP_ASRC_I_MCLK (0x0 << 8)
1324#define RT5671_DSP_ASRC_I_PLL1 (0x1 << 8)
1325#define RT5671_DSP_ASRC_I_SLIM (0x2 << 8)
1326#define RT5671_DSP_ASRC_I_RCCLK (0x3 << 8)
1327#define RT5677_DSP_CLK_SRC_MASK (0x1 << 7)
1328#define RT5677_DSP_CLK_SRC_SFT 7
1329#define RT5677_DSP_CLK_SRC_PLL2 (0x0 << 7)
1330#define RT5677_DSP_CLK_SRC_BYPASS (0x1 << 7)
1331
1332/* VAD Function Control 4 (0x9f) */
1333#define RT5677_VAD_SRC_MASK (0x7 << 8)
1334#define RT5677_VAD_SRC_SFT 8
1335
1336/* DSP InBound Control (0xa3) */
1337#define RT5677_IB01_SRC_MASK (0x7 << 12)
1338#define RT5677_IB01_SRC_SFT 12
1339#define RT5677_IB23_SRC_MASK (0x7 << 8)
1340#define RT5677_IB23_SRC_SFT 8
1341#define RT5677_IB45_SRC_MASK (0x7 << 4)
1342#define RT5677_IB45_SRC_SFT 4
1343#define RT5677_IB6_SRC_MASK (0x7 << 0)
1344#define RT5677_IB6_SRC_SFT 0
1345
1346/* DSP InBound Control (0xa4) */
1347#define RT5677_IB7_SRC_MASK (0x7 << 12)
1348#define RT5677_IB7_SRC_SFT 12
1349#define RT5677_IB8_SRC_MASK (0x7 << 8)
1350#define RT5677_IB8_SRC_SFT 8
1351#define RT5677_IB9_SRC_MASK (0x7 << 4)
1352#define RT5677_IB9_SRC_SFT 4
1353
1354/* DSP In/OutBound Control (0xa5) */
1355#define RT5677_SEL_SRC_OB23 (0x1 << 4)
1356#define RT5677_SEL_SRC_OB23_SFT 4
1357#define RT5677_SEL_SRC_OB01 (0x1 << 3)
1358#define RT5677_SEL_SRC_OB01_SFT 3
1359#define RT5677_SEL_SRC_IB45 (0x1 << 2)
1360#define RT5677_SEL_SRC_IB45_SFT 2
1361#define RT5677_SEL_SRC_IB23 (0x1 << 1)
1362#define RT5677_SEL_SRC_IB23_SFT 1
1363#define RT5677_SEL_SRC_IB01 (0x1 << 0)
1364#define RT5677_SEL_SRC_IB01_SFT 0
1365
1366/* Virtual DSP Mixer Control (0xf7 0xf8 0xf9) */
1367#define RT5677_DSP_IB_01_H (0x1 << 15)
1368#define RT5677_DSP_IB_01_H_SFT 15
1369#define RT5677_DSP_IB_23_H (0x1 << 14)
1370#define RT5677_DSP_IB_23_H_SFT 14
1371#define RT5677_DSP_IB_45_H (0x1 << 13)
1372#define RT5677_DSP_IB_45_H_SFT 13
1373#define RT5677_DSP_IB_6_H (0x1 << 12)
1374#define RT5677_DSP_IB_6_H_SFT 12
1375#define RT5677_DSP_IB_7_H (0x1 << 11)
1376#define RT5677_DSP_IB_7_H_SFT 11
1377#define RT5677_DSP_IB_8_H (0x1 << 10)
1378#define RT5677_DSP_IB_8_H_SFT 10
1379#define RT5677_DSP_IB_9_H (0x1 << 9)
1380#define RT5677_DSP_IB_9_H_SFT 9
1381#define RT5677_DSP_IB_01_L (0x1 << 7)
1382#define RT5677_DSP_IB_01_L_SFT 7
1383#define RT5677_DSP_IB_23_L (0x1 << 6)
1384#define RT5677_DSP_IB_23_L_SFT 6
1385#define RT5677_DSP_IB_45_L (0x1 << 5)
1386#define RT5677_DSP_IB_45_L_SFT 5
1387#define RT5677_DSP_IB_6_L (0x1 << 4)
1388#define RT5677_DSP_IB_6_L_SFT 4
1389#define RT5677_DSP_IB_7_L (0x1 << 3)
1390#define RT5677_DSP_IB_7_L_SFT 3
1391#define RT5677_DSP_IB_8_L (0x1 << 2)
1392#define RT5677_DSP_IB_8_L_SFT 2
1393#define RT5677_DSP_IB_9_L (0x1 << 1)
1394#define RT5677_DSP_IB_9_L_SFT 1
1395
1396/* Debug String Length */
1397#define RT5677_REG_DISP_LEN 23
1398
1399#define RT5677_NO_JACK BIT(0)
1400#define RT5677_HEADSET_DET BIT(1)
1401#define RT5677_HEADPHO_DET BIT(2)
1402
1403/* System Clock Source */
1404enum {
1405 RT5677_SCLK_S_MCLK,
1406 RT5677_SCLK_S_PLL1,
1407 RT5677_SCLK_S_RCCLK,
1408};
1409
1410/* PLL1 Source */
1411enum {
1412 RT5677_PLL1_S_MCLK,
1413 RT5677_PLL1_S_BCLK1,
1414 RT5677_PLL1_S_BCLK2,
1415 RT5677_PLL1_S_BCLK3,
1416 RT5677_PLL1_S_BCLK4,
1417};
1418
1419enum {
1420 RT5677_AIF1,
1421 RT5677_AIF2,
1422 RT5677_AIF3,
1423 RT5677_AIF4,
1424 RT5677_AIF5,
1425 RT5677_AIFS,
1426};
1427
1428struct rt5677_pll_code {
1429 bool m_bp; /* Indicates bypass m code or not. */
1430 bool k_bp; /* Indicates bypass k code or not. */
1431 int m_code;
1432 int n_code;
1433 int k_code;
1434};
1435
1436struct rt5677_priv {
1437 struct snd_soc_codec *codec;
1438 struct rt5677_platform_data pdata;
1439 struct regmap *regmap;
1440
1441 int sysclk;
1442 int sysclk_src;
1443 int lrck[RT5677_AIFS];
1444 int bclk[RT5677_AIFS];
1445 int master[RT5677_AIFS];
1446 int pll_src;
1447 int pll_in;
1448 int pll_out;
1449};
1450
1451#endif /* __RT5677_H__ */
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index d3ed1be5a186..3d39f0b5b4a8 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -36,18 +36,32 @@
36 36
37/* default value of sgtl5000 registers */ 37/* default value of sgtl5000 registers */
38static const struct reg_default sgtl5000_reg_defaults[] = { 38static const struct reg_default sgtl5000_reg_defaults[] = {
39 { SGTL5000_CHIP_DIG_POWER, 0x0000 },
39 { SGTL5000_CHIP_CLK_CTRL, 0x0008 }, 40 { SGTL5000_CHIP_CLK_CTRL, 0x0008 },
40 { SGTL5000_CHIP_I2S_CTRL, 0x0010 }, 41 { SGTL5000_CHIP_I2S_CTRL, 0x0010 },
41 { SGTL5000_CHIP_SSS_CTRL, 0x0010 }, 42 { SGTL5000_CHIP_SSS_CTRL, 0x0010 },
43 { SGTL5000_CHIP_ADCDAC_CTRL, 0x020c },
42 { SGTL5000_CHIP_DAC_VOL, 0x3c3c }, 44 { SGTL5000_CHIP_DAC_VOL, 0x3c3c },
43 { SGTL5000_CHIP_PAD_STRENGTH, 0x015f }, 45 { SGTL5000_CHIP_PAD_STRENGTH, 0x015f },
46 { SGTL5000_CHIP_ANA_ADC_CTRL, 0x0000 },
44 { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 }, 47 { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 },
45 { SGTL5000_CHIP_ANA_CTRL, 0x0111 }, 48 { SGTL5000_CHIP_ANA_CTRL, 0x0111 },
49 { SGTL5000_CHIP_LINREG_CTRL, 0x0000 },
50 { SGTL5000_CHIP_REF_CTRL, 0x0000 },
51 { SGTL5000_CHIP_MIC_CTRL, 0x0000 },
52 { SGTL5000_CHIP_LINE_OUT_CTRL, 0x0000 },
46 { SGTL5000_CHIP_LINE_OUT_VOL, 0x0404 }, 53 { SGTL5000_CHIP_LINE_OUT_VOL, 0x0404 },
47 { SGTL5000_CHIP_ANA_POWER, 0x7060 }, 54 { SGTL5000_CHIP_ANA_POWER, 0x7060 },
48 { SGTL5000_CHIP_PLL_CTRL, 0x5000 }, 55 { SGTL5000_CHIP_PLL_CTRL, 0x5000 },
56 { SGTL5000_CHIP_CLK_TOP_CTRL, 0x0000 },
57 { SGTL5000_CHIP_ANA_STATUS, 0x0000 },
58 { SGTL5000_CHIP_SHORT_CTRL, 0x0000 },
59 { SGTL5000_CHIP_ANA_TEST2, 0x0000 },
60 { SGTL5000_DAP_CTRL, 0x0000 },
61 { SGTL5000_DAP_PEQ, 0x0000 },
49 { SGTL5000_DAP_BASS_ENHANCE, 0x0040 }, 62 { SGTL5000_DAP_BASS_ENHANCE, 0x0040 },
50 { SGTL5000_DAP_BASS_ENHANCE_CTRL, 0x051f }, 63 { SGTL5000_DAP_BASS_ENHANCE_CTRL, 0x051f },
64 { SGTL5000_DAP_AUDIO_EQ, 0x0000 },
51 { SGTL5000_DAP_SURROUND, 0x0040 }, 65 { SGTL5000_DAP_SURROUND, 0x0040 },
52 { SGTL5000_DAP_EQ_BASS_BAND0, 0x002f }, 66 { SGTL5000_DAP_EQ_BASS_BAND0, 0x002f },
53 { SGTL5000_DAP_EQ_BASS_BAND1, 0x002f }, 67 { SGTL5000_DAP_EQ_BASS_BAND1, 0x002f },
@@ -55,6 +69,7 @@ static const struct reg_default sgtl5000_reg_defaults[] = {
55 { SGTL5000_DAP_EQ_BASS_BAND3, 0x002f }, 69 { SGTL5000_DAP_EQ_BASS_BAND3, 0x002f },
56 { SGTL5000_DAP_EQ_BASS_BAND4, 0x002f }, 70 { SGTL5000_DAP_EQ_BASS_BAND4, 0x002f },
57 { SGTL5000_DAP_MAIN_CHAN, 0x8000 }, 71 { SGTL5000_DAP_MAIN_CHAN, 0x8000 },
72 { SGTL5000_DAP_MIX_CHAN, 0x0000 },
58 { SGTL5000_DAP_AVC_CTRL, 0x0510 }, 73 { SGTL5000_DAP_AVC_CTRL, 0x0510 },
59 { SGTL5000_DAP_AVC_THRESHOLD, 0x1473 }, 74 { SGTL5000_DAP_AVC_THRESHOLD, 0x1473 },
60 { SGTL5000_DAP_AVC_ATTACK, 0x0028 }, 75 { SGTL5000_DAP_AVC_ATTACK, 0x0028 },
@@ -296,7 +311,7 @@ static int dac_info_volsw(struct snd_kcontrol *kcontrol,
296static int dac_get_volsw(struct snd_kcontrol *kcontrol, 311static int dac_get_volsw(struct snd_kcontrol *kcontrol,
297 struct snd_ctl_elem_value *ucontrol) 312 struct snd_ctl_elem_value *ucontrol)
298{ 313{
299 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 314 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
300 int reg; 315 int reg;
301 int l; 316 int l;
302 int r; 317 int r;
@@ -349,7 +364,7 @@ static int dac_get_volsw(struct snd_kcontrol *kcontrol,
349static int dac_put_volsw(struct snd_kcontrol *kcontrol, 364static int dac_put_volsw(struct snd_kcontrol *kcontrol,
350 struct snd_ctl_elem_value *ucontrol) 365 struct snd_ctl_elem_value *ucontrol)
351{ 366{
352 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 367 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
353 int reg; 368 int reg;
354 int l; 369 int l;
355 int r; 370 int r;
@@ -1068,71 +1083,11 @@ static int sgtl5000_suspend(struct snd_soc_codec *codec)
1068 return 0; 1083 return 0;
1069} 1084}
1070 1085
1071/*
1072 * restore all sgtl5000 registers,
1073 * since a big hole between dap and regular registers,
1074 * we will restore them respectively.
1075 */
1076static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
1077{
1078 u16 *cache = codec->reg_cache;
1079 u16 reg;
1080
1081 /* restore regular registers */
1082 for (reg = 0; reg <= SGTL5000_CHIP_SHORT_CTRL; reg += 2) {
1083
1084 /* These regs should restore in particular order */
1085 if (reg == SGTL5000_CHIP_ANA_POWER ||
1086 reg == SGTL5000_CHIP_CLK_CTRL ||
1087 reg == SGTL5000_CHIP_LINREG_CTRL ||
1088 reg == SGTL5000_CHIP_LINE_OUT_CTRL ||
1089 reg == SGTL5000_CHIP_REF_CTRL)
1090 continue;
1091
1092 snd_soc_write(codec, reg, cache[reg]);
1093 }
1094
1095 /* restore dap registers */
1096 for (reg = SGTL5000_DAP_REG_OFFSET; reg < SGTL5000_MAX_REG_OFFSET; reg += 2)
1097 snd_soc_write(codec, reg, cache[reg]);
1098
1099 /*
1100 * restore these regs according to the power setting sequence in
1101 * sgtl5000_set_power_regs() and clock setting sequence in
1102 * sgtl5000_set_clock().
1103 *
1104 * The order of restore is:
1105 * 1. SGTL5000_CHIP_CLK_CTRL MCLK_FREQ bits (1:0) should be restore after
1106 * SGTL5000_CHIP_ANA_POWER PLL bits set
1107 * 2. SGTL5000_CHIP_LINREG_CTRL should be set before
1108 * SGTL5000_CHIP_ANA_POWER LINREG_D restored
1109 * 3. SGTL5000_CHIP_REF_CTRL controls Analog Ground Voltage,
1110 * prefer to resotre it after SGTL5000_CHIP_ANA_POWER restored
1111 */
1112 snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
1113 cache[SGTL5000_CHIP_LINREG_CTRL]);
1114
1115 snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER,
1116 cache[SGTL5000_CHIP_ANA_POWER]);
1117
1118 snd_soc_write(codec, SGTL5000_CHIP_CLK_CTRL,
1119 cache[SGTL5000_CHIP_CLK_CTRL]);
1120
1121 snd_soc_write(codec, SGTL5000_CHIP_REF_CTRL,
1122 cache[SGTL5000_CHIP_REF_CTRL]);
1123
1124 snd_soc_write(codec, SGTL5000_CHIP_LINE_OUT_CTRL,
1125 cache[SGTL5000_CHIP_LINE_OUT_CTRL]);
1126 return 0;
1127}
1128
1129static int sgtl5000_resume(struct snd_soc_codec *codec) 1086static int sgtl5000_resume(struct snd_soc_codec *codec)
1130{ 1087{
1131 /* Bring the codec back up to standby to enable regulators */ 1088 /* Bring the codec back up to standby to enable regulators */
1132 sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1089 sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1133 1090
1134 /* Restore registers by cached in memory */
1135 sgtl5000_restore_regs(codec);
1136 return 0; 1091 return 0;
1137} 1092}
1138#else 1093#else
@@ -1322,7 +1277,7 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec)
1322 return ret; 1277 return ret;
1323 } 1278 }
1324 1279
1325 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), 1280 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies),
1326 sgtl5000->supplies); 1281 sgtl5000->supplies);
1327 if (ret) 1282 if (ret)
1328 goto err_ldo_remove; 1283 goto err_ldo_remove;
@@ -1330,16 +1285,13 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec)
1330 ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies), 1285 ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies),
1331 sgtl5000->supplies); 1286 sgtl5000->supplies);
1332 if (ret) 1287 if (ret)
1333 goto err_regulator_free; 1288 goto err_ldo_remove;
1334 1289
1335 /* wait for all power rails bring up */ 1290 /* wait for all power rails bring up */
1336 udelay(10); 1291 udelay(10);
1337 1292
1338 return 0; 1293 return 0;
1339 1294
1340err_regulator_free:
1341 regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
1342 sgtl5000->supplies);
1343err_ldo_remove: 1295err_ldo_remove:
1344 if (!external_vddd) 1296 if (!external_vddd)
1345 ldo_regulator_remove(codec); 1297 ldo_regulator_remove(codec);
@@ -1409,8 +1361,6 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
1409err: 1361err:
1410 regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), 1362 regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
1411 sgtl5000->supplies); 1363 sgtl5000->supplies);
1412 regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
1413 sgtl5000->supplies);
1414 ldo_regulator_remove(codec); 1364 ldo_regulator_remove(codec);
1415 1365
1416 return ret; 1366 return ret;
@@ -1424,8 +1374,6 @@ static int sgtl5000_remove(struct snd_soc_codec *codec)
1424 1374
1425 regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), 1375 regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
1426 sgtl5000->supplies); 1376 sgtl5000->supplies);
1427 regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
1428 sgtl5000->supplies);
1429 ldo_regulator_remove(codec); 1377 ldo_regulator_remove(codec);
1430 1378
1431 return 0; 1379 return 0;
diff --git a/sound/soc/codecs/si476x.c b/sound/soc/codecs/si476x.c
index 244c097cd905..f26befb0c297 100644
--- a/sound/soc/codecs/si476x.c
+++ b/sound/soc/codecs/si476x.c
@@ -208,13 +208,6 @@ out:
208 return err; 208 return err;
209} 209}
210 210
211static int si476x_codec_probe(struct snd_soc_codec *codec)
212{
213 struct regmap *regmap = dev_get_regmap(codec->dev->parent, NULL);
214
215 return snd_soc_codec_set_cache_io(codec, regmap);
216}
217
218static struct snd_soc_dai_ops si476x_dai_ops = { 211static struct snd_soc_dai_ops si476x_dai_ops = {
219 .hw_params = si476x_codec_hw_params, 212 .hw_params = si476x_codec_hw_params,
220 .set_fmt = si476x_codec_set_dai_fmt, 213 .set_fmt = si476x_codec_set_dai_fmt,
@@ -238,8 +231,13 @@ static struct snd_soc_dai_driver si476x_dai = {
238 .ops = &si476x_dai_ops, 231 .ops = &si476x_dai_ops,
239}; 232};
240 233
234static struct regmap *si476x_get_regmap(struct device *dev)
235{
236 return dev_get_regmap(dev->parent, NULL);
237}
238
241static struct snd_soc_codec_driver soc_codec_dev_si476x = { 239static struct snd_soc_codec_driver soc_codec_dev_si476x = {
242 .probe = si476x_codec_probe, 240 .get_regmap = si476x_get_regmap,
243 .dapm_widgets = si476x_dapm_widgets, 241 .dapm_widgets = si476x_dapm_widgets,
244 .num_dapm_widgets = ARRAY_SIZE(si476x_dapm_widgets), 242 .num_dapm_widgets = ARRAY_SIZE(si476x_dapm_widgets),
245 .dapm_routes = si476x_dapm_routes, 243 .dapm_routes = si476x_dapm_routes,
diff --git a/sound/soc/codecs/sirf-audio-codec.c b/sound/soc/codecs/sirf-audio-codec.c
index 58e7c1f23771..d90cb0fafcb2 100644
--- a/sound/soc/codecs/sirf-audio-codec.c
+++ b/sound/soc/codecs/sirf-audio-codec.c
@@ -109,7 +109,7 @@ static void enable_and_reset_codec(struct regmap *regmap,
109{ 109{
110 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, 110 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1,
111 codec_enable_bits | codec_reset_bits, 111 codec_enable_bits | codec_reset_bits,
112 codec_enable_bits | ~codec_reset_bits); 112 codec_enable_bits);
113 msleep(20); 113 msleep(20);
114 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, 114 regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1,
115 codec_reset_bits, codec_reset_bits); 115 codec_reset_bits, codec_reset_bits);
@@ -128,8 +128,7 @@ static int atlas6_codec_enable_and_reset_event(struct snd_soc_dapm_widget *w,
128 break; 128 break;
129 case SND_SOC_DAPM_POST_PMD: 129 case SND_SOC_DAPM_POST_PMD:
130 regmap_update_bits(sirf_audio_codec->regmap, 130 regmap_update_bits(sirf_audio_codec->regmap,
131 AUDIO_IC_CODEC_CTRL1, ATLAS6_CODEC_ENABLE_BITS, 131 AUDIO_IC_CODEC_CTRL1, ATLAS6_CODEC_ENABLE_BITS, 0);
132 ~ATLAS6_CODEC_ENABLE_BITS);
133 break; 132 break;
134 default: 133 default:
135 break; 134 break;
@@ -151,8 +150,7 @@ static int prima2_codec_enable_and_reset_event(struct snd_soc_dapm_widget *w,
151 break; 150 break;
152 case SND_SOC_DAPM_POST_PMD: 151 case SND_SOC_DAPM_POST_PMD:
153 regmap_update_bits(sirf_audio_codec->regmap, 152 regmap_update_bits(sirf_audio_codec->regmap,
154 AUDIO_IC_CODEC_CTRL1, PRIMA2_CODEC_ENABLE_BITS, 153 AUDIO_IC_CODEC_CTRL1, PRIMA2_CODEC_ENABLE_BITS, 0);
155 ~PRIMA2_CODEC_ENABLE_BITS);
156 break; 154 break;
157 default: 155 default:
158 break; 156 break;
@@ -279,13 +277,63 @@ static const struct snd_soc_dapm_route sirf_audio_codec_map[] = {
279 {"Mic input mode mux", "Differential", "MICIN1"}, 277 {"Mic input mode mux", "Differential", "MICIN1"},
280}; 278};
281 279
280static void sirf_audio_codec_tx_enable(struct sirf_audio_codec *sirf_audio_codec)
281{
282 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP,
283 AUDIO_FIFO_RESET, AUDIO_FIFO_RESET);
284 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP,
285 AUDIO_FIFO_RESET, ~AUDIO_FIFO_RESET);
286 regmap_write(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_INT_MSK, 0);
287 regmap_write(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0);
288 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP,
289 AUDIO_FIFO_START, AUDIO_FIFO_START);
290 regmap_update_bits(sirf_audio_codec->regmap,
291 AUDIO_PORT_IC_CODEC_TX_CTRL, IC_TX_ENABLE, IC_TX_ENABLE);
292}
293
294static void sirf_audio_codec_tx_disable(struct sirf_audio_codec *sirf_audio_codec)
295{
296 regmap_write(sirf_audio_codec->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0);
297 regmap_update_bits(sirf_audio_codec->regmap,
298 AUDIO_PORT_IC_CODEC_TX_CTRL, IC_TX_ENABLE, ~IC_TX_ENABLE);
299}
300
301static void sirf_audio_codec_rx_enable(struct sirf_audio_codec *sirf_audio_codec,
302 int channels)
303{
304 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_RXFIFO_OP,
305 AUDIO_FIFO_RESET, AUDIO_FIFO_RESET);
306 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_RXFIFO_OP,
307 AUDIO_FIFO_RESET, ~AUDIO_FIFO_RESET);
308 regmap_write(sirf_audio_codec->regmap,
309 AUDIO_PORT_IC_RXFIFO_INT_MSK, 0);
310 regmap_write(sirf_audio_codec->regmap, AUDIO_PORT_IC_RXFIFO_OP, 0);
311 regmap_update_bits(sirf_audio_codec->regmap, AUDIO_PORT_IC_RXFIFO_OP,
312 AUDIO_FIFO_START, AUDIO_FIFO_START);
313 if (channels == 1)
314 regmap_update_bits(sirf_audio_codec->regmap,
315 AUDIO_PORT_IC_CODEC_RX_CTRL,
316 IC_RX_ENABLE_MONO, IC_RX_ENABLE_MONO);
317 else
318 regmap_update_bits(sirf_audio_codec->regmap,
319 AUDIO_PORT_IC_CODEC_RX_CTRL,
320 IC_RX_ENABLE_STEREO, IC_RX_ENABLE_STEREO);
321}
322
323static void sirf_audio_codec_rx_disable(struct sirf_audio_codec *sirf_audio_codec)
324{
325 regmap_update_bits(sirf_audio_codec->regmap,
326 AUDIO_PORT_IC_CODEC_RX_CTRL,
327 IC_RX_ENABLE_STEREO, ~IC_RX_ENABLE_STEREO);
328}
329
282static int sirf_audio_codec_trigger(struct snd_pcm_substream *substream, 330static int sirf_audio_codec_trigger(struct snd_pcm_substream *substream,
283 int cmd, 331 int cmd,
284 struct snd_soc_dai *dai) 332 struct snd_soc_dai *dai)
285{ 333{
286 int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
287 struct snd_soc_codec *codec = dai->codec; 334 struct snd_soc_codec *codec = dai->codec;
288 u32 val = 0; 335 struct sirf_audio_codec *sirf_audio_codec = snd_soc_codec_get_drvdata(codec);
336 int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
289 337
290 /* 338 /*
291 * This is a workaround, When stop playback, 339 * This is a workaround, When stop playback,
@@ -295,20 +343,28 @@ static int sirf_audio_codec_trigger(struct snd_pcm_substream *substream,
295 case SNDRV_PCM_TRIGGER_STOP: 343 case SNDRV_PCM_TRIGGER_STOP:
296 case SNDRV_PCM_TRIGGER_SUSPEND: 344 case SNDRV_PCM_TRIGGER_SUSPEND:
297 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 345 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
346 if (playback) {
347 snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL0,
348 IC_HSLEN | IC_HSREN, 0);
349 sirf_audio_codec_tx_disable(sirf_audio_codec);
350 } else
351 sirf_audio_codec_rx_disable(sirf_audio_codec);
298 break; 352 break;
299 case SNDRV_PCM_TRIGGER_START: 353 case SNDRV_PCM_TRIGGER_START:
300 case SNDRV_PCM_TRIGGER_RESUME: 354 case SNDRV_PCM_TRIGGER_RESUME:
301 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 355 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
302 if (playback) 356 if (playback) {
303 val = IC_HSLEN | IC_HSREN; 357 sirf_audio_codec_tx_enable(sirf_audio_codec);
358 snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL0,
359 IC_HSLEN | IC_HSREN, IC_HSLEN | IC_HSREN);
360 } else
361 sirf_audio_codec_rx_enable(sirf_audio_codec,
362 substream->runtime->channels);
304 break; 363 break;
305 default: 364 default:
306 return -EINVAL; 365 return -EINVAL;
307 } 366 }
308 367
309 if (playback)
310 snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL0,
311 IC_HSLEN | IC_HSREN, val);
312 return 0; 368 return 0;
313} 369}
314 370
@@ -392,7 +448,7 @@ static const struct regmap_config sirf_audio_codec_regmap_config = {
392 .reg_bits = 32, 448 .reg_bits = 32,
393 .reg_stride = 4, 449 .reg_stride = 4,
394 .val_bits = 32, 450 .val_bits = 32,
395 .max_register = AUDIO_IC_CODEC_CTRL3, 451 .max_register = AUDIO_PORT_IC_RXFIFO_INT_MSK,
396 .cache_type = REGCACHE_NONE, 452 .cache_type = REGCACHE_NONE,
397}; 453};
398 454
diff --git a/sound/soc/codecs/sirf-audio-codec.h b/sound/soc/codecs/sirf-audio-codec.h
index d4c187b8e54a..ba1adc03839f 100644
--- a/sound/soc/codecs/sirf-audio-codec.h
+++ b/sound/soc/codecs/sirf-audio-codec.h
@@ -72,4 +72,54 @@
72#define IC_RXPGAR 0x7B 72#define IC_RXPGAR 0x7B
73#define IC_RXPGAL 0x7B 73#define IC_RXPGAL 0x7B
74 74
75#define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F
76#define AUDIO_PORT_TX_FIFO_SC_OFFSET 0
77#define AUDIO_PORT_TX_FIFO_LC_OFFSET 10
78#define AUDIO_PORT_TX_FIFO_HC_OFFSET 20
79
80#define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
81 << AUDIO_PORT_TX_FIFO_SC_OFFSET)
82#define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
83 << AUDIO_PORT_TX_FIFO_LC_OFFSET)
84#define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
85 << AUDIO_PORT_TX_FIFO_HC_OFFSET)
86
87#define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F
88#define AUDIO_PORT_RX_FIFO_SC_OFFSET 0
89#define AUDIO_PORT_RX_FIFO_LC_OFFSET 10
90#define AUDIO_PORT_RX_FIFO_HC_OFFSET 20
91
92#define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
93 << AUDIO_PORT_RX_FIFO_SC_OFFSET)
94#define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
95 << AUDIO_PORT_RX_FIFO_LC_OFFSET)
96#define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
97 << AUDIO_PORT_RX_FIFO_HC_OFFSET)
98#define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4)
99#define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8)
100
101#define AUDIO_PORT_IC_TXFIFO_OP (0x00FC)
102#define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100)
103#define AUDIO_PORT_IC_TXFIFO_STS (0x0104)
104#define AUDIO_PORT_IC_TXFIFO_INT (0x0108)
105#define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C)
106
107#define AUDIO_PORT_IC_RXFIFO_OP (0x0110)
108#define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114)
109#define AUDIO_PORT_IC_RXFIFO_STS (0x0118)
110#define AUDIO_PORT_IC_RXFIFO_INT (0x011C)
111#define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120)
112
113#define AUDIO_FIFO_START (1 << 0)
114#define AUDIO_FIFO_RESET (1 << 1)
115
116#define AUDIO_FIFO_FULL (1 << 0)
117#define AUDIO_FIFO_EMPTY (1 << 1)
118#define AUDIO_FIFO_OFLOW (1 << 2)
119#define AUDIO_FIFO_UFLOW (1 << 3)
120
121#define IC_TX_ENABLE (0x03)
122#define IC_RX_ENABLE_MONO (0x01)
123#define IC_RX_ENABLE_STEREO (0x03)
124
75#endif /*__SIRF_AUDIO_CODEC_H*/ 125#endif /*__SIRF_AUDIO_CODEC_H*/
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index 12577749b17b..0579d187135b 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -243,7 +243,7 @@ static int sta32x_coefficient_info(struct snd_kcontrol *kcontrol,
243static int sta32x_coefficient_get(struct snd_kcontrol *kcontrol, 243static int sta32x_coefficient_get(struct snd_kcontrol *kcontrol,
244 struct snd_ctl_elem_value *ucontrol) 244 struct snd_ctl_elem_value *ucontrol)
245{ 245{
246 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 246 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
247 int numcoef = kcontrol->private_value >> 16; 247 int numcoef = kcontrol->private_value >> 16;
248 int index = kcontrol->private_value & 0xffff; 248 int index = kcontrol->private_value & 0xffff;
249 unsigned int cfud; 249 unsigned int cfud;
@@ -272,7 +272,7 @@ static int sta32x_coefficient_get(struct snd_kcontrol *kcontrol,
272static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol, 272static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
273 struct snd_ctl_elem_value *ucontrol) 273 struct snd_ctl_elem_value *ucontrol)
274{ 274{
275 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 275 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
276 struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec); 276 struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
277 int numcoef = kcontrol->private_value >> 16; 277 int numcoef = kcontrol->private_value >> 16;
278 int index = kcontrol->private_value & 0xffff; 278 int index = kcontrol->private_value & 0xffff;
diff --git a/sound/soc/codecs/sta350.c b/sound/soc/codecs/sta350.c
new file mode 100644
index 000000000000..cc97dd52aa9c
--- /dev/null
+++ b/sound/soc/codecs/sta350.c
@@ -0,0 +1,1311 @@
1/*
2 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
3 *
4 * Copyright: 2014 Raumfeld GmbH
5 * Author: Sven Brandau <info@brandau.biz>
6 *
7 * based on code from:
8 * Raumfeld GmbH
9 * Johannes Stezenbach <js@sig21.net>
10 * Wolfson Microelectronics PLC.
11 * Mark Brown <broonie@opensource.wolfsonmicro.com>
12 * Freescale Semiconductor, Inc.
13 * Timur Tabi <timur@freescale.com>
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ":%s:%d: " fmt, __func__, __LINE__
22
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/pm.h>
28#include <linux/i2c.h>
29#include <linux/of_device.h>
30#include <linux/of_gpio.h>
31#include <linux/regmap.h>
32#include <linux/regulator/consumer.h>
33#include <linux/gpio/consumer.h>
34#include <linux/slab.h>
35#include <sound/core.h>
36#include <sound/pcm.h>
37#include <sound/pcm_params.h>
38#include <sound/soc.h>
39#include <sound/soc-dapm.h>
40#include <sound/initval.h>
41#include <sound/tlv.h>
42
43#include <sound/sta350.h>
44#include "sta350.h"
45
46#define STA350_RATES (SNDRV_PCM_RATE_32000 | \
47 SNDRV_PCM_RATE_44100 | \
48 SNDRV_PCM_RATE_48000 | \
49 SNDRV_PCM_RATE_88200 | \
50 SNDRV_PCM_RATE_96000 | \
51 SNDRV_PCM_RATE_176400 | \
52 SNDRV_PCM_RATE_192000)
53
54#define STA350_FORMATS \
55 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
56 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
57 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
58 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
59 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE | \
60 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
61
62/* Power-up register defaults */
63static const struct reg_default sta350_regs[] = {
64 { 0x0, 0x63 },
65 { 0x1, 0x80 },
66 { 0x2, 0xdf },
67 { 0x3, 0x40 },
68 { 0x4, 0xc2 },
69 { 0x5, 0x5c },
70 { 0x6, 0x00 },
71 { 0x7, 0xff },
72 { 0x8, 0x60 },
73 { 0x9, 0x60 },
74 { 0xa, 0x60 },
75 { 0xb, 0x00 },
76 { 0xc, 0x00 },
77 { 0xd, 0x00 },
78 { 0xe, 0x00 },
79 { 0xf, 0x40 },
80 { 0x10, 0x80 },
81 { 0x11, 0x77 },
82 { 0x12, 0x6a },
83 { 0x13, 0x69 },
84 { 0x14, 0x6a },
85 { 0x15, 0x69 },
86 { 0x16, 0x00 },
87 { 0x17, 0x00 },
88 { 0x18, 0x00 },
89 { 0x19, 0x00 },
90 { 0x1a, 0x00 },
91 { 0x1b, 0x00 },
92 { 0x1c, 0x00 },
93 { 0x1d, 0x00 },
94 { 0x1e, 0x00 },
95 { 0x1f, 0x00 },
96 { 0x20, 0x00 },
97 { 0x21, 0x00 },
98 { 0x22, 0x00 },
99 { 0x23, 0x00 },
100 { 0x24, 0x00 },
101 { 0x25, 0x00 },
102 { 0x26, 0x00 },
103 { 0x27, 0x2a },
104 { 0x28, 0xc0 },
105 { 0x29, 0xf3 },
106 { 0x2a, 0x33 },
107 { 0x2b, 0x00 },
108 { 0x2c, 0x0c },
109 { 0x31, 0x00 },
110 { 0x36, 0x00 },
111 { 0x37, 0x00 },
112 { 0x38, 0x00 },
113 { 0x39, 0x01 },
114 { 0x3a, 0xee },
115 { 0x3b, 0xff },
116 { 0x3c, 0x7e },
117 { 0x3d, 0xc0 },
118 { 0x3e, 0x26 },
119 { 0x3f, 0x00 },
120 { 0x48, 0x00 },
121 { 0x49, 0x00 },
122 { 0x4a, 0x00 },
123 { 0x4b, 0x04 },
124 { 0x4c, 0x00 },
125};
126
127static const struct regmap_range sta350_write_regs_range[] = {
128 regmap_reg_range(STA350_CONFA, STA350_AUTO2),
129 regmap_reg_range(STA350_C1CFG, STA350_FDRC2),
130 regmap_reg_range(STA350_EQCFG, STA350_EVOLRES),
131 regmap_reg_range(STA350_NSHAPE, STA350_MISC2),
132};
133
134static const struct regmap_range sta350_read_regs_range[] = {
135 regmap_reg_range(STA350_CONFA, STA350_AUTO2),
136 regmap_reg_range(STA350_C1CFG, STA350_STATUS),
137 regmap_reg_range(STA350_EQCFG, STA350_EVOLRES),
138 regmap_reg_range(STA350_NSHAPE, STA350_MISC2),
139};
140
141static const struct regmap_range sta350_volatile_regs_range[] = {
142 regmap_reg_range(STA350_CFADDR2, STA350_CFUD),
143 regmap_reg_range(STA350_STATUS, STA350_STATUS),
144};
145
146static const struct regmap_access_table sta350_write_regs = {
147 .yes_ranges = sta350_write_regs_range,
148 .n_yes_ranges = ARRAY_SIZE(sta350_write_regs_range),
149};
150
151static const struct regmap_access_table sta350_read_regs = {
152 .yes_ranges = sta350_read_regs_range,
153 .n_yes_ranges = ARRAY_SIZE(sta350_read_regs_range),
154};
155
156static const struct regmap_access_table sta350_volatile_regs = {
157 .yes_ranges = sta350_volatile_regs_range,
158 .n_yes_ranges = ARRAY_SIZE(sta350_volatile_regs_range),
159};
160
161/* regulator power supply names */
162static const char * const sta350_supply_names[] = {
163 "vdd-dig", /* digital supply, 3.3V */
164 "vdd-pll", /* pll supply, 3.3V */
165 "vcc" /* power amp supply, 5V - 26V */
166};
167
168/* codec private data */
169struct sta350_priv {
170 struct regmap *regmap;
171 struct regulator_bulk_data supplies[ARRAY_SIZE(sta350_supply_names)];
172 struct sta350_platform_data *pdata;
173
174 unsigned int mclk;
175 unsigned int format;
176
177 u32 coef_shadow[STA350_COEF_COUNT];
178 int shutdown;
179
180 struct gpio_desc *gpiod_nreset;
181 struct gpio_desc *gpiod_power_down;
182
183 struct mutex coeff_lock;
184};
185
186static const DECLARE_TLV_DB_SCALE(mvol_tlv, -12750, 50, 1);
187static const DECLARE_TLV_DB_SCALE(chvol_tlv, -7950, 50, 1);
188static const DECLARE_TLV_DB_SCALE(tone_tlv, -1200, 200, 0);
189
190static const char * const sta350_drc_ac[] = {
191 "Anti-Clipping", "Dynamic Range Compression"
192};
193static const char * const sta350_auto_gc_mode[] = {
194 "User", "AC no clipping", "AC limited clipping (10%)",
195 "DRC nighttime listening mode"
196};
197static const char * const sta350_auto_xo_mode[] = {
198 "User", "80Hz", "100Hz", "120Hz", "140Hz", "160Hz", "180Hz",
199 "200Hz", "220Hz", "240Hz", "260Hz", "280Hz", "300Hz", "320Hz",
200 "340Hz", "360Hz"
201};
202static const char * const sta350_binary_output[] = {
203 "FFX 3-state output - normal operation", "Binary output"
204};
205static const char * const sta350_limiter_select[] = {
206 "Limiter Disabled", "Limiter #1", "Limiter #2"
207};
208static const char * const sta350_limiter_attack_rate[] = {
209 "3.1584", "2.7072", "2.2560", "1.8048", "1.3536", "0.9024",
210 "0.4512", "0.2256", "0.1504", "0.1123", "0.0902", "0.0752",
211 "0.0645", "0.0564", "0.0501", "0.0451"
212};
213static const char * const sta350_limiter_release_rate[] = {
214 "0.5116", "0.1370", "0.0744", "0.0499", "0.0360", "0.0299",
215 "0.0264", "0.0208", "0.0198", "0.0172", "0.0147", "0.0137",
216 "0.0134", "0.0117", "0.0110", "0.0104"
217};
218static const char * const sta350_noise_shaper_type[] = {
219 "Third order", "Fourth order"
220};
221
222static DECLARE_TLV_DB_RANGE(sta350_limiter_ac_attack_tlv,
223 0, 7, TLV_DB_SCALE_ITEM(-1200, 200, 0),
224 8, 16, TLV_DB_SCALE_ITEM(300, 100, 0),
225);
226
227static DECLARE_TLV_DB_RANGE(sta350_limiter_ac_release_tlv,
228 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
229 1, 1, TLV_DB_SCALE_ITEM(-2900, 0, 0),
230 2, 2, TLV_DB_SCALE_ITEM(-2000, 0, 0),
231 3, 8, TLV_DB_SCALE_ITEM(-1400, 200, 0),
232 8, 16, TLV_DB_SCALE_ITEM(-700, 100, 0),
233);
234
235static DECLARE_TLV_DB_RANGE(sta350_limiter_drc_attack_tlv,
236 0, 7, TLV_DB_SCALE_ITEM(-3100, 200, 0),
237 8, 13, TLV_DB_SCALE_ITEM(-1600, 100, 0),
238 14, 16, TLV_DB_SCALE_ITEM(-1000, 300, 0),
239);
240
241static DECLARE_TLV_DB_RANGE(sta350_limiter_drc_release_tlv,
242 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
243 1, 2, TLV_DB_SCALE_ITEM(-3800, 200, 0),
244 3, 4, TLV_DB_SCALE_ITEM(-3300, 200, 0),
245 5, 12, TLV_DB_SCALE_ITEM(-3000, 200, 0),
246 13, 16, TLV_DB_SCALE_ITEM(-1500, 300, 0),
247);
248
249static SOC_ENUM_SINGLE_DECL(sta350_drc_ac_enum,
250 STA350_CONFD, STA350_CONFD_DRC_SHIFT,
251 sta350_drc_ac);
252static SOC_ENUM_SINGLE_DECL(sta350_noise_shaper_enum,
253 STA350_CONFE, STA350_CONFE_NSBW_SHIFT,
254 sta350_noise_shaper_type);
255static SOC_ENUM_SINGLE_DECL(sta350_auto_gc_enum,
256 STA350_AUTO1, STA350_AUTO1_AMGC_SHIFT,
257 sta350_auto_gc_mode);
258static SOC_ENUM_SINGLE_DECL(sta350_auto_xo_enum,
259 STA350_AUTO2, STA350_AUTO2_XO_SHIFT,
260 sta350_auto_xo_mode);
261static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch1_enum,
262 STA350_C1CFG, STA350_CxCFG_BO_SHIFT,
263 sta350_binary_output);
264static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch2_enum,
265 STA350_C2CFG, STA350_CxCFG_BO_SHIFT,
266 sta350_binary_output);
267static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch3_enum,
268 STA350_C3CFG, STA350_CxCFG_BO_SHIFT,
269 sta350_binary_output);
270static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch1_enum,
271 STA350_C1CFG, STA350_CxCFG_LS_SHIFT,
272 sta350_limiter_select);
273static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch2_enum,
274 STA350_C2CFG, STA350_CxCFG_LS_SHIFT,
275 sta350_limiter_select);
276static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch3_enum,
277 STA350_C3CFG, STA350_CxCFG_LS_SHIFT,
278 sta350_limiter_select);
279static SOC_ENUM_SINGLE_DECL(sta350_limiter1_attack_rate_enum,
280 STA350_L1AR, STA350_LxA_SHIFT,
281 sta350_limiter_attack_rate);
282static SOC_ENUM_SINGLE_DECL(sta350_limiter2_attack_rate_enum,
283 STA350_L2AR, STA350_LxA_SHIFT,
284 sta350_limiter_attack_rate);
285static SOC_ENUM_SINGLE_DECL(sta350_limiter1_release_rate_enum,
286 STA350_L1AR, STA350_LxR_SHIFT,
287 sta350_limiter_release_rate);
288static SOC_ENUM_SINGLE_DECL(sta350_limiter2_release_rate_enum,
289 STA350_L2AR, STA350_LxR_SHIFT,
290 sta350_limiter_release_rate);
291
292/*
293 * byte array controls for setting biquad, mixer, scaling coefficients;
294 * for biquads all five coefficients need to be set in one go,
295 * mixer and pre/postscale coefs can be set individually;
296 * each coef is 24bit, the bytes are ordered in the same way
297 * as given in the STA350 data sheet (big endian; b1, b2, a1, a2, b0)
298 */
299
300static int sta350_coefficient_info(struct snd_kcontrol *kcontrol,
301 struct snd_ctl_elem_info *uinfo)
302{
303 int numcoef = kcontrol->private_value >> 16;
304 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
305 uinfo->count = 3 * numcoef;
306 return 0;
307}
308
309static int sta350_coefficient_get(struct snd_kcontrol *kcontrol,
310 struct snd_ctl_elem_value *ucontrol)
311{
312 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
313 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
314 int numcoef = kcontrol->private_value >> 16;
315 int index = kcontrol->private_value & 0xffff;
316 unsigned int cfud, val;
317 int i, ret = 0;
318
319 mutex_lock(&sta350->coeff_lock);
320
321 /* preserve reserved bits in STA350_CFUD */
322 regmap_read(sta350->regmap, STA350_CFUD, &cfud);
323 cfud &= 0xf0;
324 /*
325 * chip documentation does not say if the bits are self clearing,
326 * so do it explicitly
327 */
328 regmap_write(sta350->regmap, STA350_CFUD, cfud);
329
330 regmap_write(sta350->regmap, STA350_CFADDR2, index);
331 if (numcoef == 1) {
332 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x04);
333 } else if (numcoef == 5) {
334 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x08);
335 } else {
336 ret = -EINVAL;
337 goto exit_unlock;
338 }
339
340 for (i = 0; i < 3 * numcoef; i++) {
341 regmap_read(sta350->regmap, STA350_B1CF1 + i, &val);
342 ucontrol->value.bytes.data[i] = val;
343 }
344
345exit_unlock:
346 mutex_unlock(&sta350->coeff_lock);
347
348 return ret;
349}
350
351static int sta350_coefficient_put(struct snd_kcontrol *kcontrol,
352 struct snd_ctl_elem_value *ucontrol)
353{
354 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
355 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
356 int numcoef = kcontrol->private_value >> 16;
357 int index = kcontrol->private_value & 0xffff;
358 unsigned int cfud;
359 int i;
360
361 /* preserve reserved bits in STA350_CFUD */
362 regmap_read(sta350->regmap, STA350_CFUD, &cfud);
363 cfud &= 0xf0;
364 /*
365 * chip documentation does not say if the bits are self clearing,
366 * so do it explicitly
367 */
368 regmap_write(sta350->regmap, STA350_CFUD, cfud);
369
370 regmap_write(sta350->regmap, STA350_CFADDR2, index);
371 for (i = 0; i < numcoef && (index + i < STA350_COEF_COUNT); i++)
372 sta350->coef_shadow[index + i] =
373 (ucontrol->value.bytes.data[3 * i] << 16)
374 | (ucontrol->value.bytes.data[3 * i + 1] << 8)
375 | (ucontrol->value.bytes.data[3 * i + 2]);
376 for (i = 0; i < 3 * numcoef; i++)
377 regmap_write(sta350->regmap, STA350_B1CF1 + i,
378 ucontrol->value.bytes.data[i]);
379 if (numcoef == 1)
380 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x01);
381 else if (numcoef == 5)
382 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x02);
383 else
384 return -EINVAL;
385
386 return 0;
387}
388
389static int sta350_sync_coef_shadow(struct snd_soc_codec *codec)
390{
391 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
392 unsigned int cfud;
393 int i;
394
395 /* preserve reserved bits in STA350_CFUD */
396 regmap_read(sta350->regmap, STA350_CFUD, &cfud);
397 cfud &= 0xf0;
398
399 for (i = 0; i < STA350_COEF_COUNT; i++) {
400 regmap_write(sta350->regmap, STA350_CFADDR2, i);
401 regmap_write(sta350->regmap, STA350_B1CF1,
402 (sta350->coef_shadow[i] >> 16) & 0xff);
403 regmap_write(sta350->regmap, STA350_B1CF2,
404 (sta350->coef_shadow[i] >> 8) & 0xff);
405 regmap_write(sta350->regmap, STA350_B1CF3,
406 (sta350->coef_shadow[i]) & 0xff);
407 /*
408 * chip documentation does not say if the bits are
409 * self-clearing, so do it explicitly
410 */
411 regmap_write(sta350->regmap, STA350_CFUD, cfud);
412 regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x01);
413 }
414 return 0;
415}
416
417static int sta350_cache_sync(struct snd_soc_codec *codec)
418{
419 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
420 unsigned int mute;
421 int rc;
422
423 /* mute during register sync */
424 regmap_read(sta350->regmap, STA350_CFUD, &mute);
425 regmap_write(sta350->regmap, STA350_MMUTE, mute | STA350_MMUTE_MMUTE);
426 sta350_sync_coef_shadow(codec);
427 rc = regcache_sync(sta350->regmap);
428 regmap_write(sta350->regmap, STA350_MMUTE, mute);
429 return rc;
430}
431
432#define SINGLE_COEF(xname, index) \
433{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
434 .info = sta350_coefficient_info, \
435 .get = sta350_coefficient_get,\
436 .put = sta350_coefficient_put, \
437 .private_value = index | (1 << 16) }
438
439#define BIQUAD_COEFS(xname, index) \
440{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
441 .info = sta350_coefficient_info, \
442 .get = sta350_coefficient_get,\
443 .put = sta350_coefficient_put, \
444 .private_value = index | (5 << 16) }
445
446static const struct snd_kcontrol_new sta350_snd_controls[] = {
447SOC_SINGLE_TLV("Master Volume", STA350_MVOL, 0, 0xff, 1, mvol_tlv),
448/* VOL */
449SOC_SINGLE_TLV("Ch1 Volume", STA350_C1VOL, 0, 0xff, 1, chvol_tlv),
450SOC_SINGLE_TLV("Ch2 Volume", STA350_C2VOL, 0, 0xff, 1, chvol_tlv),
451SOC_SINGLE_TLV("Ch3 Volume", STA350_C3VOL, 0, 0xff, 1, chvol_tlv),
452/* CONFD */
453SOC_SINGLE("High Pass Filter Bypass Switch",
454 STA350_CONFD, STA350_CONFD_HPB_SHIFT, 1, 1),
455SOC_SINGLE("De-emphasis Filter Switch",
456 STA350_CONFD, STA350_CONFD_DEMP_SHIFT, 1, 0),
457SOC_SINGLE("DSP Bypass Switch",
458 STA350_CONFD, STA350_CONFD_DSPB_SHIFT, 1, 0),
459SOC_SINGLE("Post-scale Link Switch",
460 STA350_CONFD, STA350_CONFD_PSL_SHIFT, 1, 0),
461SOC_SINGLE("Biquad Coefficient Link Switch",
462 STA350_CONFD, STA350_CONFD_BQL_SHIFT, 1, 0),
463SOC_ENUM("Compressor/Limiter Switch", sta350_drc_ac_enum),
464SOC_ENUM("Noise Shaper Bandwidth", sta350_noise_shaper_enum),
465SOC_SINGLE("Zero-detect Mute Enable Switch",
466 STA350_CONFD, STA350_CONFD_ZDE_SHIFT, 1, 0),
467SOC_SINGLE("Submix Mode Switch",
468 STA350_CONFD, STA350_CONFD_SME_SHIFT, 1, 0),
469/* CONFE */
470SOC_SINGLE("Zero Cross Switch", STA350_CONFE, STA350_CONFE_ZCE_SHIFT, 1, 0),
471SOC_SINGLE("Soft Ramp Switch", STA350_CONFE, STA350_CONFE_SVE_SHIFT, 1, 0),
472/* MUTE */
473SOC_SINGLE("Master Switch", STA350_MMUTE, STA350_MMUTE_MMUTE_SHIFT, 1, 1),
474SOC_SINGLE("Ch1 Switch", STA350_MMUTE, STA350_MMUTE_C1M_SHIFT, 1, 1),
475SOC_SINGLE("Ch2 Switch", STA350_MMUTE, STA350_MMUTE_C2M_SHIFT, 1, 1),
476SOC_SINGLE("Ch3 Switch", STA350_MMUTE, STA350_MMUTE_C3M_SHIFT, 1, 1),
477/* AUTOx */
478SOC_ENUM("Automode GC", sta350_auto_gc_enum),
479SOC_ENUM("Automode XO", sta350_auto_xo_enum),
480/* CxCFG */
481SOC_SINGLE("Ch1 Tone Control Bypass Switch",
482 STA350_C1CFG, STA350_CxCFG_TCB_SHIFT, 1, 0),
483SOC_SINGLE("Ch2 Tone Control Bypass Switch",
484 STA350_C2CFG, STA350_CxCFG_TCB_SHIFT, 1, 0),
485SOC_SINGLE("Ch1 EQ Bypass Switch",
486 STA350_C1CFG, STA350_CxCFG_EQBP_SHIFT, 1, 0),
487SOC_SINGLE("Ch2 EQ Bypass Switch",
488 STA350_C2CFG, STA350_CxCFG_EQBP_SHIFT, 1, 0),
489SOC_SINGLE("Ch1 Master Volume Bypass Switch",
490 STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
491SOC_SINGLE("Ch2 Master Volume Bypass Switch",
492 STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
493SOC_SINGLE("Ch3 Master Volume Bypass Switch",
494 STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
495SOC_ENUM("Ch1 Binary Output Select", sta350_binary_output_ch1_enum),
496SOC_ENUM("Ch2 Binary Output Select", sta350_binary_output_ch2_enum),
497SOC_ENUM("Ch3 Binary Output Select", sta350_binary_output_ch3_enum),
498SOC_ENUM("Ch1 Limiter Select", sta350_limiter_ch1_enum),
499SOC_ENUM("Ch2 Limiter Select", sta350_limiter_ch2_enum),
500SOC_ENUM("Ch3 Limiter Select", sta350_limiter_ch3_enum),
501/* TONE */
502SOC_SINGLE_RANGE_TLV("Bass Tone Control Volume",
503 STA350_TONE, STA350_TONE_BTC_SHIFT, 1, 13, 0, tone_tlv),
504SOC_SINGLE_RANGE_TLV("Treble Tone Control Volume",
505 STA350_TONE, STA350_TONE_TTC_SHIFT, 1, 13, 0, tone_tlv),
506SOC_ENUM("Limiter1 Attack Rate (dB/ms)", sta350_limiter1_attack_rate_enum),
507SOC_ENUM("Limiter2 Attack Rate (dB/ms)", sta350_limiter2_attack_rate_enum),
508SOC_ENUM("Limiter1 Release Rate (dB/ms)", sta350_limiter1_release_rate_enum),
509SOC_ENUM("Limiter2 Release Rate (dB/ms)", sta350_limiter2_release_rate_enum),
510
511/*
512 * depending on mode, the attack/release thresholds have
513 * two different enum definitions; provide both
514 */
515SOC_SINGLE_TLV("Limiter1 Attack Threshold (AC Mode)",
516 STA350_L1ATRT, STA350_LxA_SHIFT,
517 16, 0, sta350_limiter_ac_attack_tlv),
518SOC_SINGLE_TLV("Limiter2 Attack Threshold (AC Mode)",
519 STA350_L2ATRT, STA350_LxA_SHIFT,
520 16, 0, sta350_limiter_ac_attack_tlv),
521SOC_SINGLE_TLV("Limiter1 Release Threshold (AC Mode)",
522 STA350_L1ATRT, STA350_LxR_SHIFT,
523 16, 0, sta350_limiter_ac_release_tlv),
524SOC_SINGLE_TLV("Limiter2 Release Threshold (AC Mode)",
525 STA350_L2ATRT, STA350_LxR_SHIFT,
526 16, 0, sta350_limiter_ac_release_tlv),
527SOC_SINGLE_TLV("Limiter1 Attack Threshold (DRC Mode)",
528 STA350_L1ATRT, STA350_LxA_SHIFT,
529 16, 0, sta350_limiter_drc_attack_tlv),
530SOC_SINGLE_TLV("Limiter2 Attack Threshold (DRC Mode)",
531 STA350_L2ATRT, STA350_LxA_SHIFT,
532 16, 0, sta350_limiter_drc_attack_tlv),
533SOC_SINGLE_TLV("Limiter1 Release Threshold (DRC Mode)",
534 STA350_L1ATRT, STA350_LxR_SHIFT,
535 16, 0, sta350_limiter_drc_release_tlv),
536SOC_SINGLE_TLV("Limiter2 Release Threshold (DRC Mode)",
537 STA350_L2ATRT, STA350_LxR_SHIFT,
538 16, 0, sta350_limiter_drc_release_tlv),
539
540BIQUAD_COEFS("Ch1 - Biquad 1", 0),
541BIQUAD_COEFS("Ch1 - Biquad 2", 5),
542BIQUAD_COEFS("Ch1 - Biquad 3", 10),
543BIQUAD_COEFS("Ch1 - Biquad 4", 15),
544BIQUAD_COEFS("Ch2 - Biquad 1", 20),
545BIQUAD_COEFS("Ch2 - Biquad 2", 25),
546BIQUAD_COEFS("Ch2 - Biquad 3", 30),
547BIQUAD_COEFS("Ch2 - Biquad 4", 35),
548BIQUAD_COEFS("High-pass", 40),
549BIQUAD_COEFS("Low-pass", 45),
550SINGLE_COEF("Ch1 - Prescale", 50),
551SINGLE_COEF("Ch2 - Prescale", 51),
552SINGLE_COEF("Ch1 - Postscale", 52),
553SINGLE_COEF("Ch2 - Postscale", 53),
554SINGLE_COEF("Ch3 - Postscale", 54),
555SINGLE_COEF("Thermal warning - Postscale", 55),
556SINGLE_COEF("Ch1 - Mix 1", 56),
557SINGLE_COEF("Ch1 - Mix 2", 57),
558SINGLE_COEF("Ch2 - Mix 1", 58),
559SINGLE_COEF("Ch2 - Mix 2", 59),
560SINGLE_COEF("Ch3 - Mix 1", 60),
561SINGLE_COEF("Ch3 - Mix 2", 61),
562};
563
564static const struct snd_soc_dapm_widget sta350_dapm_widgets[] = {
565SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
566SND_SOC_DAPM_OUTPUT("LEFT"),
567SND_SOC_DAPM_OUTPUT("RIGHT"),
568SND_SOC_DAPM_OUTPUT("SUB"),
569};
570
571static const struct snd_soc_dapm_route sta350_dapm_routes[] = {
572 { "LEFT", NULL, "DAC" },
573 { "RIGHT", NULL, "DAC" },
574 { "SUB", NULL, "DAC" },
575 { "DAC", NULL, "Playback" },
576};
577
578/* MCLK interpolation ratio per fs */
579static struct {
580 int fs;
581 int ir;
582} interpolation_ratios[] = {
583 { 32000, 0 },
584 { 44100, 0 },
585 { 48000, 0 },
586 { 88200, 1 },
587 { 96000, 1 },
588 { 176400, 2 },
589 { 192000, 2 },
590};
591
592/* MCLK to fs clock ratios */
593static int mcs_ratio_table[3][6] = {
594 { 768, 512, 384, 256, 128, 576 },
595 { 384, 256, 192, 128, 64, 0 },
596 { 192, 128, 96, 64, 32, 0 },
597};
598
599/**
600 * sta350_set_dai_sysclk - configure MCLK
601 * @codec_dai: the codec DAI
602 * @clk_id: the clock ID (ignored)
603 * @freq: the MCLK input frequency
604 * @dir: the clock direction (ignored)
605 *
606 * The value of MCLK is used to determine which sample rates are supported
607 * by the STA350, based on the mcs_ratio_table.
608 *
609 * This function must be called by the machine driver's 'startup' function,
610 * otherwise the list of supported sample rates will not be available in
611 * time for ALSA.
612 */
613static int sta350_set_dai_sysclk(struct snd_soc_dai *codec_dai,
614 int clk_id, unsigned int freq, int dir)
615{
616 struct snd_soc_codec *codec = codec_dai->codec;
617 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
618
619 dev_dbg(codec->dev, "mclk=%u\n", freq);
620 sta350->mclk = freq;
621
622 return 0;
623}
624
625/**
626 * sta350_set_dai_fmt - configure the codec for the selected audio format
627 * @codec_dai: the codec DAI
628 * @fmt: a SND_SOC_DAIFMT_x value indicating the data format
629 *
630 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
631 * codec accordingly.
632 */
633static int sta350_set_dai_fmt(struct snd_soc_dai *codec_dai,
634 unsigned int fmt)
635{
636 struct snd_soc_codec *codec = codec_dai->codec;
637 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
638 unsigned int confb = 0;
639
640 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
641 case SND_SOC_DAIFMT_CBS_CFS:
642 break;
643 default:
644 return -EINVAL;
645 }
646
647 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
648 case SND_SOC_DAIFMT_I2S:
649 case SND_SOC_DAIFMT_RIGHT_J:
650 case SND_SOC_DAIFMT_LEFT_J:
651 sta350->format = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
652 break;
653 default:
654 return -EINVAL;
655 }
656
657 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
658 case SND_SOC_DAIFMT_NB_NF:
659 confb |= STA350_CONFB_C2IM;
660 break;
661 case SND_SOC_DAIFMT_NB_IF:
662 confb |= STA350_CONFB_C1IM;
663 break;
664 default:
665 return -EINVAL;
666 }
667
668 return regmap_update_bits(sta350->regmap, STA350_CONFB,
669 STA350_CONFB_C1IM | STA350_CONFB_C2IM, confb);
670}
671
672/**
673 * sta350_hw_params - program the STA350 with the given hardware parameters.
674 * @substream: the audio stream
675 * @params: the hardware parameters to set
676 * @dai: the SOC DAI (ignored)
677 *
678 * This function programs the hardware with the values provided.
679 * Specifically, the sample rate and the data format.
680 */
681static int sta350_hw_params(struct snd_pcm_substream *substream,
682 struct snd_pcm_hw_params *params,
683 struct snd_soc_dai *dai)
684{
685 struct snd_soc_codec *codec = dai->codec;
686 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
687 int i, mcs = -EINVAL, ir = -EINVAL;
688 unsigned int confa, confb;
689 unsigned int rate, ratio;
690 int ret;
691
692 if (!sta350->mclk) {
693 dev_err(codec->dev,
694 "sta350->mclk is unset. Unable to determine ratio\n");
695 return -EIO;
696 }
697
698 rate = params_rate(params);
699 ratio = sta350->mclk / rate;
700 dev_dbg(codec->dev, "rate: %u, ratio: %u\n", rate, ratio);
701
702 for (i = 0; i < ARRAY_SIZE(interpolation_ratios); i++) {
703 if (interpolation_ratios[i].fs == rate) {
704 ir = interpolation_ratios[i].ir;
705 break;
706 }
707 }
708
709 if (ir < 0) {
710 dev_err(codec->dev, "Unsupported samplerate: %u\n", rate);
711 return -EINVAL;
712 }
713
714 for (i = 0; i < 6; i++) {
715 if (mcs_ratio_table[ir][i] == ratio) {
716 mcs = i;
717 break;
718 }
719 }
720
721 if (mcs < 0) {
722 dev_err(codec->dev, "Unresolvable ratio: %u\n", ratio);
723 return -EINVAL;
724 }
725
726 confa = (ir << STA350_CONFA_IR_SHIFT) |
727 (mcs << STA350_CONFA_MCS_SHIFT);
728 confb = 0;
729
730 switch (params_width(params)) {
731 case 24:
732 dev_dbg(codec->dev, "24bit\n");
733 /* fall through */
734 case 32:
735 dev_dbg(codec->dev, "24bit or 32bit\n");
736 switch (sta350->format) {
737 case SND_SOC_DAIFMT_I2S:
738 confb |= 0x0;
739 break;
740 case SND_SOC_DAIFMT_LEFT_J:
741 confb |= 0x1;
742 break;
743 case SND_SOC_DAIFMT_RIGHT_J:
744 confb |= 0x2;
745 break;
746 }
747
748 break;
749 case 20:
750 dev_dbg(codec->dev, "20bit\n");
751 switch (sta350->format) {
752 case SND_SOC_DAIFMT_I2S:
753 confb |= 0x4;
754 break;
755 case SND_SOC_DAIFMT_LEFT_J:
756 confb |= 0x5;
757 break;
758 case SND_SOC_DAIFMT_RIGHT_J:
759 confb |= 0x6;
760 break;
761 }
762
763 break;
764 case 18:
765 dev_dbg(codec->dev, "18bit\n");
766 switch (sta350->format) {
767 case SND_SOC_DAIFMT_I2S:
768 confb |= 0x8;
769 break;
770 case SND_SOC_DAIFMT_LEFT_J:
771 confb |= 0x9;
772 break;
773 case SND_SOC_DAIFMT_RIGHT_J:
774 confb |= 0xa;
775 break;
776 }
777
778 break;
779 case 16:
780 dev_dbg(codec->dev, "16bit\n");
781 switch (sta350->format) {
782 case SND_SOC_DAIFMT_I2S:
783 confb |= 0x0;
784 break;
785 case SND_SOC_DAIFMT_LEFT_J:
786 confb |= 0xd;
787 break;
788 case SND_SOC_DAIFMT_RIGHT_J:
789 confb |= 0xe;
790 break;
791 }
792
793 break;
794 default:
795 return -EINVAL;
796 }
797
798 ret = regmap_update_bits(sta350->regmap, STA350_CONFA,
799 STA350_CONFA_MCS_MASK | STA350_CONFA_IR_MASK,
800 confa);
801 if (ret < 0)
802 return ret;
803
804 ret = regmap_update_bits(sta350->regmap, STA350_CONFB,
805 STA350_CONFB_SAI_MASK | STA350_CONFB_SAIFB,
806 confb);
807 if (ret < 0)
808 return ret;
809
810 return 0;
811}
812
813static int sta350_startup_sequence(struct sta350_priv *sta350)
814{
815 if (sta350->gpiod_power_down)
816 gpiod_set_value(sta350->gpiod_power_down, 1);
817
818 if (sta350->gpiod_nreset) {
819 gpiod_set_value(sta350->gpiod_nreset, 0);
820 mdelay(1);
821 gpiod_set_value(sta350->gpiod_nreset, 1);
822 mdelay(1);
823 }
824
825 return 0;
826}
827
828/**
829 * sta350_set_bias_level - DAPM callback
830 * @codec: the codec device
831 * @level: DAPM power level
832 *
833 * This is called by ALSA to put the codec into low power mode
834 * or to wake it up. If the codec is powered off completely
835 * all registers must be restored after power on.
836 */
837static int sta350_set_bias_level(struct snd_soc_codec *codec,
838 enum snd_soc_bias_level level)
839{
840 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
841 int ret;
842
843 dev_dbg(codec->dev, "level = %d\n", level);
844 switch (level) {
845 case SND_SOC_BIAS_ON:
846 break;
847
848 case SND_SOC_BIAS_PREPARE:
849 /* Full power on */
850 regmap_update_bits(sta350->regmap, STA350_CONFF,
851 STA350_CONFF_PWDN | STA350_CONFF_EAPD,
852 STA350_CONFF_PWDN | STA350_CONFF_EAPD);
853 break;
854
855 case SND_SOC_BIAS_STANDBY:
856 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
857 ret = regulator_bulk_enable(
858 ARRAY_SIZE(sta350->supplies),
859 sta350->supplies);
860 if (ret < 0) {
861 dev_err(codec->dev,
862 "Failed to enable supplies: %d\n",
863 ret);
864 return ret;
865 }
866 sta350_startup_sequence(sta350);
867 sta350_cache_sync(codec);
868 }
869
870 /* Power down */
871 regmap_update_bits(sta350->regmap, STA350_CONFF,
872 STA350_CONFF_PWDN | STA350_CONFF_EAPD,
873 0);
874
875 break;
876
877 case SND_SOC_BIAS_OFF:
878 /* The chip runs through the power down sequence for us */
879 regmap_update_bits(sta350->regmap, STA350_CONFF,
880 STA350_CONFF_PWDN | STA350_CONFF_EAPD, 0);
881
882 /* power down: low */
883 if (sta350->gpiod_power_down)
884 gpiod_set_value(sta350->gpiod_power_down, 0);
885
886 if (sta350->gpiod_nreset)
887 gpiod_set_value(sta350->gpiod_nreset, 0);
888
889 regulator_bulk_disable(ARRAY_SIZE(sta350->supplies),
890 sta350->supplies);
891 break;
892 }
893 codec->dapm.bias_level = level;
894 return 0;
895}
896
897static const struct snd_soc_dai_ops sta350_dai_ops = {
898 .hw_params = sta350_hw_params,
899 .set_sysclk = sta350_set_dai_sysclk,
900 .set_fmt = sta350_set_dai_fmt,
901};
902
903static struct snd_soc_dai_driver sta350_dai = {
904 .name = "sta350-hifi",
905 .playback = {
906 .stream_name = "Playback",
907 .channels_min = 2,
908 .channels_max = 2,
909 .rates = STA350_RATES,
910 .formats = STA350_FORMATS,
911 },
912 .ops = &sta350_dai_ops,
913};
914
915#ifdef CONFIG_PM
916static int sta350_suspend(struct snd_soc_codec *codec)
917{
918 sta350_set_bias_level(codec, SND_SOC_BIAS_OFF);
919 return 0;
920}
921
922static int sta350_resume(struct snd_soc_codec *codec)
923{
924 sta350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
925 return 0;
926}
927#else
928#define sta350_suspend NULL
929#define sta350_resume NULL
930#endif
931
932static int sta350_probe(struct snd_soc_codec *codec)
933{
934 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
935 struct sta350_platform_data *pdata = sta350->pdata;
936 int i, ret = 0, thermal = 0;
937
938 ret = regulator_bulk_enable(ARRAY_SIZE(sta350->supplies),
939 sta350->supplies);
940 if (ret < 0) {
941 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
942 return ret;
943 }
944
945 ret = sta350_startup_sequence(sta350);
946 if (ret < 0) {
947 dev_err(codec->dev, "Failed to startup device\n");
948 return ret;
949 }
950
951 /* CONFA */
952 if (!pdata->thermal_warning_recovery)
953 thermal |= STA350_CONFA_TWAB;
954 if (!pdata->thermal_warning_adjustment)
955 thermal |= STA350_CONFA_TWRB;
956 if (!pdata->fault_detect_recovery)
957 thermal |= STA350_CONFA_FDRB;
958 regmap_update_bits(sta350->regmap, STA350_CONFA,
959 STA350_CONFA_TWAB | STA350_CONFA_TWRB |
960 STA350_CONFA_FDRB,
961 thermal);
962
963 /* CONFC */
964 regmap_update_bits(sta350->regmap, STA350_CONFC,
965 STA350_CONFC_OM_MASK,
966 pdata->ffx_power_output_mode
967 << STA350_CONFC_OM_SHIFT);
968 regmap_update_bits(sta350->regmap, STA350_CONFC,
969 STA350_CONFC_CSZ_MASK,
970 pdata->drop_compensation_ns
971 << STA350_CONFC_CSZ_SHIFT);
972 regmap_update_bits(sta350->regmap,
973 STA350_CONFC,
974 STA350_CONFC_OCRB,
975 pdata->oc_warning_adjustment ?
976 STA350_CONFC_OCRB : 0);
977
978 /* CONFE */
979 regmap_update_bits(sta350->regmap, STA350_CONFE,
980 STA350_CONFE_MPCV,
981 pdata->max_power_use_mpcc ?
982 STA350_CONFE_MPCV : 0);
983 regmap_update_bits(sta350->regmap, STA350_CONFE,
984 STA350_CONFE_MPC,
985 pdata->max_power_correction ?
986 STA350_CONFE_MPC : 0);
987 regmap_update_bits(sta350->regmap, STA350_CONFE,
988 STA350_CONFE_AME,
989 pdata->am_reduction_mode ?
990 STA350_CONFE_AME : 0);
991 regmap_update_bits(sta350->regmap, STA350_CONFE,
992 STA350_CONFE_PWMS,
993 pdata->odd_pwm_speed_mode ?
994 STA350_CONFE_PWMS : 0);
995 regmap_update_bits(sta350->regmap, STA350_CONFE,
996 STA350_CONFE_DCCV,
997 pdata->distortion_compensation ?
998 STA350_CONFE_DCCV : 0);
999 /* CONFF */
1000 regmap_update_bits(sta350->regmap, STA350_CONFF,
1001 STA350_CONFF_IDE,
1002 pdata->invalid_input_detect_mute ?
1003 STA350_CONFF_IDE : 0);
1004 regmap_update_bits(sta350->regmap, STA350_CONFF,
1005 STA350_CONFF_OCFG_MASK,
1006 pdata->output_conf
1007 << STA350_CONFF_OCFG_SHIFT);
1008
1009 /* channel to output mapping */
1010 regmap_update_bits(sta350->regmap, STA350_C1CFG,
1011 STA350_CxCFG_OM_MASK,
1012 pdata->ch1_output_mapping
1013 << STA350_CxCFG_OM_SHIFT);
1014 regmap_update_bits(sta350->regmap, STA350_C2CFG,
1015 STA350_CxCFG_OM_MASK,
1016 pdata->ch2_output_mapping
1017 << STA350_CxCFG_OM_SHIFT);
1018 regmap_update_bits(sta350->regmap, STA350_C3CFG,
1019 STA350_CxCFG_OM_MASK,
1020 pdata->ch3_output_mapping
1021 << STA350_CxCFG_OM_SHIFT);
1022
1023 /* miscellaneous registers */
1024 regmap_update_bits(sta350->regmap, STA350_MISC1,
1025 STA350_MISC1_CPWMEN,
1026 pdata->activate_mute_output ?
1027 STA350_MISC1_CPWMEN : 0);
1028 regmap_update_bits(sta350->regmap, STA350_MISC1,
1029 STA350_MISC1_BRIDGOFF,
1030 pdata->bridge_immediate_off ?
1031 STA350_MISC1_BRIDGOFF : 0);
1032 regmap_update_bits(sta350->regmap, STA350_MISC1,
1033 STA350_MISC1_NSHHPEN,
1034 pdata->noise_shape_dc_cut ?
1035 STA350_MISC1_NSHHPEN : 0);
1036 regmap_update_bits(sta350->regmap, STA350_MISC1,
1037 STA350_MISC1_RPDNEN,
1038 pdata->powerdown_master_vol ?
1039 STA350_MISC1_RPDNEN: 0);
1040
1041 regmap_update_bits(sta350->regmap, STA350_MISC2,
1042 STA350_MISC2_PNDLSL_MASK,
1043 pdata->powerdown_delay_divider
1044 << STA350_MISC2_PNDLSL_SHIFT);
1045
1046 /* initialize coefficient shadow RAM with reset values */
1047 for (i = 4; i <= 49; i += 5)
1048 sta350->coef_shadow[i] = 0x400000;
1049 for (i = 50; i <= 54; i++)
1050 sta350->coef_shadow[i] = 0x7fffff;
1051 sta350->coef_shadow[55] = 0x5a9df7;
1052 sta350->coef_shadow[56] = 0x7fffff;
1053 sta350->coef_shadow[59] = 0x7fffff;
1054 sta350->coef_shadow[60] = 0x400000;
1055 sta350->coef_shadow[61] = 0x400000;
1056
1057 sta350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1058 /* Bias level configuration will have done an extra enable */
1059 regulator_bulk_disable(ARRAY_SIZE(sta350->supplies), sta350->supplies);
1060
1061 return 0;
1062}
1063
1064static int sta350_remove(struct snd_soc_codec *codec)
1065{
1066 struct sta350_priv *sta350 = snd_soc_codec_get_drvdata(codec);
1067
1068 sta350_set_bias_level(codec, SND_SOC_BIAS_OFF);
1069 regulator_bulk_disable(ARRAY_SIZE(sta350->supplies), sta350->supplies);
1070
1071 return 0;
1072}
1073
1074static const struct snd_soc_codec_driver sta350_codec = {
1075 .probe = sta350_probe,
1076 .remove = sta350_remove,
1077 .suspend = sta350_suspend,
1078 .resume = sta350_resume,
1079 .set_bias_level = sta350_set_bias_level,
1080 .controls = sta350_snd_controls,
1081 .num_controls = ARRAY_SIZE(sta350_snd_controls),
1082 .dapm_widgets = sta350_dapm_widgets,
1083 .num_dapm_widgets = ARRAY_SIZE(sta350_dapm_widgets),
1084 .dapm_routes = sta350_dapm_routes,
1085 .num_dapm_routes = ARRAY_SIZE(sta350_dapm_routes),
1086};
1087
1088static const struct regmap_config sta350_regmap = {
1089 .reg_bits = 8,
1090 .val_bits = 8,
1091 .max_register = STA350_MISC2,
1092 .reg_defaults = sta350_regs,
1093 .num_reg_defaults = ARRAY_SIZE(sta350_regs),
1094 .cache_type = REGCACHE_RBTREE,
1095 .wr_table = &sta350_write_regs,
1096 .rd_table = &sta350_read_regs,
1097 .volatile_table = &sta350_volatile_regs,
1098};
1099
1100#ifdef CONFIG_OF
1101static const struct of_device_id st350_dt_ids[] = {
1102 { .compatible = "st,sta350", },
1103 { }
1104};
1105MODULE_DEVICE_TABLE(of, st350_dt_ids);
1106
1107static const char * const sta350_ffx_modes[] = {
1108 [STA350_FFX_PM_DROP_COMP] = "drop-compensation",
1109 [STA350_FFX_PM_TAPERED_COMP] = "tapered-compensation",
1110 [STA350_FFX_PM_FULL_POWER] = "full-power-mode",
1111 [STA350_FFX_PM_VARIABLE_DROP_COMP] = "variable-drop-compensation",
1112};
1113
1114static int sta350_probe_dt(struct device *dev, struct sta350_priv *sta350)
1115{
1116 struct device_node *np = dev->of_node;
1117 struct sta350_platform_data *pdata;
1118 const char *ffx_power_mode;
1119 u16 tmp;
1120 u8 tmp8;
1121
1122 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1123 if (!pdata)
1124 return -ENOMEM;
1125
1126 of_property_read_u8(np, "st,output-conf",
1127 &pdata->output_conf);
1128 of_property_read_u8(np, "st,ch1-output-mapping",
1129 &pdata->ch1_output_mapping);
1130 of_property_read_u8(np, "st,ch2-output-mapping",
1131 &pdata->ch2_output_mapping);
1132 of_property_read_u8(np, "st,ch3-output-mapping",
1133 &pdata->ch3_output_mapping);
1134
1135 if (of_get_property(np, "st,thermal-warning-recovery", NULL))
1136 pdata->thermal_warning_recovery = 1;
1137 if (of_get_property(np, "st,thermal-warning-adjustment", NULL))
1138 pdata->thermal_warning_adjustment = 1;
1139 if (of_get_property(np, "st,fault-detect-recovery", NULL))
1140 pdata->fault_detect_recovery = 1;
1141
1142 pdata->ffx_power_output_mode = STA350_FFX_PM_VARIABLE_DROP_COMP;
1143 if (!of_property_read_string(np, "st,ffx-power-output-mode",
1144 &ffx_power_mode)) {
1145 int i, mode = -EINVAL;
1146
1147 for (i = 0; i < ARRAY_SIZE(sta350_ffx_modes); i++)
1148 if (!strcasecmp(ffx_power_mode, sta350_ffx_modes[i]))
1149 mode = i;
1150
1151 if (mode < 0)
1152 dev_warn(dev, "Unsupported ffx output mode: %s\n",
1153 ffx_power_mode);
1154 else
1155 pdata->ffx_power_output_mode = mode;
1156 }
1157
1158 tmp = 140;
1159 of_property_read_u16(np, "st,drop-compensation-ns", &tmp);
1160 pdata->drop_compensation_ns = clamp_t(u16, tmp, 0, 300) / 20;
1161
1162 if (of_get_property(np, "st,overcurrent-warning-adjustment", NULL))
1163 pdata->oc_warning_adjustment = 1;
1164
1165 /* CONFE */
1166 if (of_get_property(np, "st,max-power-use-mpcc", NULL))
1167 pdata->max_power_use_mpcc = 1;
1168
1169 if (of_get_property(np, "st,max-power-correction", NULL))
1170 pdata->max_power_correction = 1;
1171
1172 if (of_get_property(np, "st,am-reduction-mode", NULL))
1173 pdata->am_reduction_mode = 1;
1174
1175 if (of_get_property(np, "st,odd-pwm-speed-mode", NULL))
1176 pdata->odd_pwm_speed_mode = 1;
1177
1178 if (of_get_property(np, "st,distortion-compensation", NULL))
1179 pdata->distortion_compensation = 1;
1180
1181 /* CONFF */
1182 if (of_get_property(np, "st,invalid-input-detect-mute", NULL))
1183 pdata->invalid_input_detect_mute = 1;
1184
1185 /* MISC */
1186 if (of_get_property(np, "st,activate-mute-output", NULL))
1187 pdata->activate_mute_output = 1;
1188
1189 if (of_get_property(np, "st,bridge-immediate-off", NULL))
1190 pdata->bridge_immediate_off = 1;
1191
1192 if (of_get_property(np, "st,noise-shape-dc-cut", NULL))
1193 pdata->noise_shape_dc_cut = 1;
1194
1195 if (of_get_property(np, "st,powerdown-master-volume", NULL))
1196 pdata->powerdown_master_vol = 1;
1197
1198 if (!of_property_read_u8(np, "st,powerdown-delay-divider", &tmp8)) {
1199 if (is_power_of_2(tmp8) && tmp8 >= 1 && tmp8 <= 128)
1200 pdata->powerdown_delay_divider = ilog2(tmp8);
1201 else
1202 dev_warn(dev, "Unsupported powerdown delay divider %d\n",
1203 tmp8);
1204 }
1205
1206 sta350->pdata = pdata;
1207
1208 return 0;
1209}
1210#endif
1211
1212static int sta350_i2c_probe(struct i2c_client *i2c,
1213 const struct i2c_device_id *id)
1214{
1215 struct device *dev = &i2c->dev;
1216 struct sta350_priv *sta350;
1217 int ret, i;
1218
1219 sta350 = devm_kzalloc(dev, sizeof(struct sta350_priv), GFP_KERNEL);
1220 if (!sta350)
1221 return -ENOMEM;
1222
1223 mutex_init(&sta350->coeff_lock);
1224 sta350->pdata = dev_get_platdata(dev);
1225
1226#ifdef CONFIG_OF
1227 if (dev->of_node) {
1228 ret = sta350_probe_dt(dev, sta350);
1229 if (ret < 0)
1230 return ret;
1231 }
1232#endif
1233
1234 /* GPIOs */
1235 sta350->gpiod_nreset = devm_gpiod_get(dev, "reset");
1236 if (IS_ERR(sta350->gpiod_nreset)) {
1237 ret = PTR_ERR(sta350->gpiod_nreset);
1238 if (ret != -ENOENT && ret != -ENOSYS)
1239 return ret;
1240
1241 sta350->gpiod_nreset = NULL;
1242 } else {
1243 gpiod_direction_output(sta350->gpiod_nreset, 0);
1244 }
1245
1246 sta350->gpiod_power_down = devm_gpiod_get(dev, "power-down");
1247 if (IS_ERR(sta350->gpiod_power_down)) {
1248 ret = PTR_ERR(sta350->gpiod_power_down);
1249 if (ret != -ENOENT && ret != -ENOSYS)
1250 return ret;
1251
1252 sta350->gpiod_power_down = NULL;
1253 } else {
1254 gpiod_direction_output(sta350->gpiod_power_down, 0);
1255 }
1256
1257 /* regulators */
1258 for (i = 0; i < ARRAY_SIZE(sta350->supplies); i++)
1259 sta350->supplies[i].supply = sta350_supply_names[i];
1260
1261 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(sta350->supplies),
1262 sta350->supplies);
1263 if (ret < 0) {
1264 dev_err(dev, "Failed to request supplies: %d\n", ret);
1265 return ret;
1266 }
1267
1268 sta350->regmap = devm_regmap_init_i2c(i2c, &sta350_regmap);
1269 if (IS_ERR(sta350->regmap)) {
1270 ret = PTR_ERR(sta350->regmap);
1271 dev_err(dev, "Failed to init regmap: %d\n", ret);
1272 return ret;
1273 }
1274
1275 i2c_set_clientdata(i2c, sta350);
1276
1277 ret = snd_soc_register_codec(dev, &sta350_codec, &sta350_dai, 1);
1278 if (ret < 0)
1279 dev_err(dev, "Failed to register codec (%d)\n", ret);
1280
1281 return ret;
1282}
1283
1284static int sta350_i2c_remove(struct i2c_client *client)
1285{
1286 snd_soc_unregister_codec(&client->dev);
1287 return 0;
1288}
1289
1290static const struct i2c_device_id sta350_i2c_id[] = {
1291 { "sta350", 0 },
1292 { }
1293};
1294MODULE_DEVICE_TABLE(i2c, sta350_i2c_id);
1295
1296static struct i2c_driver sta350_i2c_driver = {
1297 .driver = {
1298 .name = "sta350",
1299 .owner = THIS_MODULE,
1300 .of_match_table = of_match_ptr(st350_dt_ids),
1301 },
1302 .probe = sta350_i2c_probe,
1303 .remove = sta350_i2c_remove,
1304 .id_table = sta350_i2c_id,
1305};
1306
1307module_i2c_driver(sta350_i2c_driver);
1308
1309MODULE_DESCRIPTION("ASoC STA350 driver");
1310MODULE_AUTHOR("Sven Brandau <info@brandau.biz>");
1311MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/sta350.h b/sound/soc/codecs/sta350.h
new file mode 100644
index 000000000000..fb7285290779
--- /dev/null
+++ b/sound/soc/codecs/sta350.h
@@ -0,0 +1,238 @@
1/*
2 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
3 *
4 * Copyright: 2011 Raumfeld GmbH
5 * Author: Sven Brandau <info@brandau.biz>
6 *
7 * based on code from:
8 * Raumfeld GmbH
9 * Johannes Stezenbach <js@sig21.net>
10 * Wolfson Microelectronics PLC.
11 * Mark Brown <broonie@opensource.wolfsonmicro.com>
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18#ifndef _ASOC_STA_350_H
19#define _ASOC_STA_350_H
20
21/* STA50 register addresses */
22
23#define STA350_REGISTER_COUNT 0x4D
24#define STA350_COEF_COUNT 62
25
26#define STA350_CONFA 0x00
27#define STA350_CONFB 0x01
28#define STA350_CONFC 0x02
29#define STA350_CONFD 0x03
30#define STA350_CONFE 0x04
31#define STA350_CONFF 0x05
32#define STA350_MMUTE 0x06
33#define STA350_MVOL 0x07
34#define STA350_C1VOL 0x08
35#define STA350_C2VOL 0x09
36#define STA350_C3VOL 0x0a
37#define STA350_AUTO1 0x0b
38#define STA350_AUTO2 0x0c
39#define STA350_AUTO3 0x0d
40#define STA350_C1CFG 0x0e
41#define STA350_C2CFG 0x0f
42#define STA350_C3CFG 0x10
43#define STA350_TONE 0x11
44#define STA350_L1AR 0x12
45#define STA350_L1ATRT 0x13
46#define STA350_L2AR 0x14
47#define STA350_L2ATRT 0x15
48#define STA350_CFADDR2 0x16
49#define STA350_B1CF1 0x17
50#define STA350_B1CF2 0x18
51#define STA350_B1CF3 0x19
52#define STA350_B2CF1 0x1a
53#define STA350_B2CF2 0x1b
54#define STA350_B2CF3 0x1c
55#define STA350_A1CF1 0x1d
56#define STA350_A1CF2 0x1e
57#define STA350_A1CF3 0x1f
58#define STA350_A2CF1 0x20
59#define STA350_A2CF2 0x21
60#define STA350_A2CF3 0x22
61#define STA350_B0CF1 0x23
62#define STA350_B0CF2 0x24
63#define STA350_B0CF3 0x25
64#define STA350_CFUD 0x26
65#define STA350_MPCC1 0x27
66#define STA350_MPCC2 0x28
67#define STA350_DCC1 0x29
68#define STA350_DCC2 0x2a
69#define STA350_FDRC1 0x2b
70#define STA350_FDRC2 0x2c
71#define STA350_STATUS 0x2d
72/* reserved: 0x2d - 0x30 */
73#define STA350_EQCFG 0x31
74#define STA350_EATH1 0x32
75#define STA350_ERTH1 0x33
76#define STA350_EATH2 0x34
77#define STA350_ERTH2 0x35
78#define STA350_CONFX 0x36
79#define STA350_SVCA 0x37
80#define STA350_SVCB 0x38
81#define STA350_RMS0A 0x39
82#define STA350_RMS0B 0x3a
83#define STA350_RMS0C 0x3b
84#define STA350_RMS1A 0x3c
85#define STA350_RMS1B 0x3d
86#define STA350_RMS1C 0x3e
87#define STA350_EVOLRES 0x3f
88/* reserved: 0x40 - 0x47 */
89#define STA350_NSHAPE 0x48
90#define STA350_CTXB4B1 0x49
91#define STA350_CTXB7B5 0x4a
92#define STA350_MISC1 0x4b
93#define STA350_MISC2 0x4c
94
95/* 0x00 CONFA */
96#define STA350_CONFA_MCS_MASK 0x03
97#define STA350_CONFA_MCS_SHIFT 0
98#define STA350_CONFA_IR_MASK 0x18
99#define STA350_CONFA_IR_SHIFT 3
100#define STA350_CONFA_TWRB BIT(5)
101#define STA350_CONFA_TWAB BIT(6)
102#define STA350_CONFA_FDRB BIT(7)
103
104/* 0x01 CONFB */
105#define STA350_CONFB_SAI_MASK 0x0f
106#define STA350_CONFB_SAI_SHIFT 0
107#define STA350_CONFB_SAIFB BIT(4)
108#define STA350_CONFB_DSCKE BIT(5)
109#define STA350_CONFB_C1IM BIT(6)
110#define STA350_CONFB_C2IM BIT(7)
111
112/* 0x02 CONFC */
113#define STA350_CONFC_OM_MASK 0x03
114#define STA350_CONFC_OM_SHIFT 0
115#define STA350_CONFC_CSZ_MASK 0x3c
116#define STA350_CONFC_CSZ_SHIFT 2
117#define STA350_CONFC_OCRB BIT(7)
118
119/* 0x03 CONFD */
120#define STA350_CONFD_HPB_SHIFT 0
121#define STA350_CONFD_DEMP_SHIFT 1
122#define STA350_CONFD_DSPB_SHIFT 2
123#define STA350_CONFD_PSL_SHIFT 3
124#define STA350_CONFD_BQL_SHIFT 4
125#define STA350_CONFD_DRC_SHIFT 5
126#define STA350_CONFD_ZDE_SHIFT 6
127#define STA350_CONFD_SME_SHIFT 7
128
129/* 0x04 CONFE */
130#define STA350_CONFE_MPCV BIT(0)
131#define STA350_CONFE_MPCV_SHIFT 0
132#define STA350_CONFE_MPC BIT(1)
133#define STA350_CONFE_MPC_SHIFT 1
134#define STA350_CONFE_NSBW BIT(2)
135#define STA350_CONFE_NSBW_SHIFT 2
136#define STA350_CONFE_AME BIT(3)
137#define STA350_CONFE_AME_SHIFT 3
138#define STA350_CONFE_PWMS BIT(4)
139#define STA350_CONFE_PWMS_SHIFT 4
140#define STA350_CONFE_DCCV BIT(5)
141#define STA350_CONFE_DCCV_SHIFT 5
142#define STA350_CONFE_ZCE BIT(6)
143#define STA350_CONFE_ZCE_SHIFT 6
144#define STA350_CONFE_SVE BIT(7)
145#define STA350_CONFE_SVE_SHIFT 7
146
147/* 0x05 CONFF */
148#define STA350_CONFF_OCFG_MASK 0x03
149#define STA350_CONFF_OCFG_SHIFT 0
150#define STA350_CONFF_IDE BIT(2)
151#define STA350_CONFF_BCLE BIT(3)
152#define STA350_CONFF_LDTE BIT(4)
153#define STA350_CONFF_ECLE BIT(5)
154#define STA350_CONFF_PWDN BIT(6)
155#define STA350_CONFF_EAPD BIT(7)
156
157/* 0x06 MMUTE */
158#define STA350_MMUTE_MMUTE 0x01
159#define STA350_MMUTE_MMUTE_SHIFT 0
160#define STA350_MMUTE_C1M 0x02
161#define STA350_MMUTE_C1M_SHIFT 1
162#define STA350_MMUTE_C2M 0x04
163#define STA350_MMUTE_C2M_SHIFT 2
164#define STA350_MMUTE_C3M 0x08
165#define STA350_MMUTE_C3M_SHIFT 3
166#define STA350_MMUTE_LOC_MASK 0xC0
167#define STA350_MMUTE_LOC_SHIFT 6
168
169/* 0x0b AUTO1 */
170#define STA350_AUTO1_AMGC_MASK 0x30
171#define STA350_AUTO1_AMGC_SHIFT 4
172
173/* 0x0c AUTO2 */
174#define STA350_AUTO2_AMAME 0x01
175#define STA350_AUTO2_AMAM_MASK 0x0e
176#define STA350_AUTO2_AMAM_SHIFT 1
177#define STA350_AUTO2_XO_MASK 0xf0
178#define STA350_AUTO2_XO_SHIFT 4
179
180/* 0x0d AUTO3 */
181#define STA350_AUTO3_PEQ_MASK 0x1f
182#define STA350_AUTO3_PEQ_SHIFT 0
183
184/* 0x0e 0x0f 0x10 CxCFG */
185#define STA350_CxCFG_TCB_SHIFT 0
186#define STA350_CxCFG_EQBP_SHIFT 1
187#define STA350_CxCFG_VBP_SHIFT 2
188#define STA350_CxCFG_BO_SHIFT 3
189#define STA350_CxCFG_LS_SHIFT 4
190#define STA350_CxCFG_OM_MASK 0xc0
191#define STA350_CxCFG_OM_SHIFT 6
192
193/* 0x11 TONE */
194#define STA350_TONE_BTC_SHIFT 0
195#define STA350_TONE_TTC_SHIFT 4
196
197/* 0x12 0x13 0x14 0x15 limiter attack/release */
198#define STA350_LxA_SHIFT 0
199#define STA350_LxR_SHIFT 4
200
201/* 0x26 CFUD */
202#define STA350_CFUD_W1 0x01
203#define STA350_CFUD_WA 0x02
204#define STA350_CFUD_R1 0x04
205#define STA350_CFUD_RA 0x08
206
207
208/* biquad filter coefficient table offsets */
209#define STA350_C1_BQ_BASE 0
210#define STA350_C2_BQ_BASE 20
211#define STA350_CH_BQ_NUM 4
212#define STA350_BQ_NUM_COEF 5
213#define STA350_XO_HP_BQ_BASE 40
214#define STA350_XO_LP_BQ_BASE 45
215#define STA350_C1_PRESCALE 50
216#define STA350_C2_PRESCALE 51
217#define STA350_C1_POSTSCALE 52
218#define STA350_C2_POSTSCALE 53
219#define STA350_C3_POSTSCALE 54
220#define STA350_TW_POSTSCALE 55
221#define STA350_C1_MIX1 56
222#define STA350_C1_MIX2 57
223#define STA350_C2_MIX1 58
224#define STA350_C2_MIX2 59
225#define STA350_C3_MIX1 60
226#define STA350_C3_MIX2 61
227
228/* miscellaneous register 1 */
229#define STA350_MISC1_CPWMEN BIT(2)
230#define STA350_MISC1_BRIDGOFF BIT(5)
231#define STA350_MISC1_NSHHPEN BIT(6)
232#define STA350_MISC1_RPDNEN BIT(7)
233
234/* miscellaneous register 2 */
235#define STA350_MISC2_PNDLSL_MASK 0x1c
236#define STA350_MISC2_PNDLSL_SHIFT 2
237
238#endif /* _ASOC_STA_350_H */
diff --git a/sound/soc/codecs/tas5086.c b/sound/soc/codecs/tas5086.c
index a895a5e4bdf2..d48491a4a19d 100644
--- a/sound/soc/codecs/tas5086.c
+++ b/sound/soc/codecs/tas5086.c
@@ -272,7 +272,7 @@ static int tas5086_set_deemph(struct snd_soc_codec *codec)
272static int tas5086_get_deemph(struct snd_kcontrol *kcontrol, 272static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
273 struct snd_ctl_elem_value *ucontrol) 273 struct snd_ctl_elem_value *ucontrol)
274{ 274{
275 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 275 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
276 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); 276 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
277 277
278 ucontrol->value.enumerated.item[0] = priv->deemph; 278 ucontrol->value.enumerated.item[0] = priv->deemph;
@@ -283,7 +283,7 @@ static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
283static int tas5086_put_deemph(struct snd_kcontrol *kcontrol, 283static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
284 struct snd_ctl_elem_value *ucontrol) 284 struct snd_ctl_elem_value *ucontrol)
285{ 285{
286 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 286 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
287 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); 287 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
288 288
289 priv->deemph = ucontrol->value.enumerated.item[0]; 289 priv->deemph = ucontrol->value.enumerated.item[0];
diff --git a/sound/soc/codecs/tlv320aic23-i2c.c b/sound/soc/codecs/tlv320aic23-i2c.c
index b73c94ebcc2a..f13701995482 100644
--- a/sound/soc/codecs/tlv320aic23-i2c.c
+++ b/sound/soc/codecs/tlv320aic23-i2c.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/i2c.h> 14#include <linux/i2c.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/of.h>
16#include <linux/regmap.h> 17#include <linux/regmap.h>
17#include <sound/soc.h> 18#include <sound/soc.h>
18 19
diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c
index 20864ee8793b..686b8b85b956 100644
--- a/sound/soc/codecs/tlv320aic23.c
+++ b/sound/soc/codecs/tlv320aic23.c
@@ -82,7 +82,7 @@ static const DECLARE_TLV_DB_SCALE(sidetone_vol_tlv, -1800, 300, 0);
82static int snd_soc_tlv320aic23_put_volsw(struct snd_kcontrol *kcontrol, 82static int snd_soc_tlv320aic23_put_volsw(struct snd_kcontrol *kcontrol,
83 struct snd_ctl_elem_value *ucontrol) 83 struct snd_ctl_elem_value *ucontrol)
84{ 84{
85 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 85 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
86 u16 val, reg; 86 u16 val, reg;
87 87
88 val = (ucontrol->value.integer.value[0] & 0x07); 88 val = (ucontrol->value.integer.value[0] & 0x07);
@@ -105,7 +105,7 @@ static int snd_soc_tlv320aic23_put_volsw(struct snd_kcontrol *kcontrol,
105static int snd_soc_tlv320aic23_get_volsw(struct snd_kcontrol *kcontrol, 105static int snd_soc_tlv320aic23_get_volsw(struct snd_kcontrol *kcontrol,
106 struct snd_ctl_elem_value *ucontrol) 106 struct snd_ctl_elem_value *ucontrol)
107{ 107{
108 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 108 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
109 u16 val; 109 u16 val;
110 110
111 val = snd_soc_read(codec, TLV320AIC23_ANLG) & (0x1C0); 111 val = snd_soc_read(codec, TLV320AIC23_ANLG) & (0x1C0);
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c
index fa158cfe9b32..23419109ecac 100644
--- a/sound/soc/codecs/tlv320aic31xx.c
+++ b/sound/soc/codecs/tlv320aic31xx.c
@@ -28,6 +28,7 @@
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/regulator/consumer.h> 30#include <linux/regulator/consumer.h>
31#include <linux/of.h>
31#include <linux/of_gpio.h> 32#include <linux/of_gpio.h>
32#include <linux/slab.h> 33#include <linux/slab.h>
33#include <sound/core.h> 34#include <sound/core.h>
@@ -376,7 +377,7 @@ static int aic31xx_dapm_power_event(struct snd_soc_dapm_widget *w,
376 reg = AIC31XX_ADCFLAG; 377 reg = AIC31XX_ADCFLAG;
377 break; 378 break;
378 default: 379 default:
379 dev_err(w->codec->dev, "Unknown widget '%s' calling %s/n", 380 dev_err(w->codec->dev, "Unknown widget '%s' calling %s\n",
380 w->name, __func__); 381 w->name, __func__);
381 return -EINVAL; 382 return -EINVAL;
382 } 383 }
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index b1835103e9b4..e12fafbb1e09 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -169,7 +169,7 @@ static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
169 mask <<= shift; 169 mask <<= shift;
170 val <<= shift; 170 val <<= shift;
171 171
172 change = snd_soc_test_bits(codec, val, mask, reg); 172 change = snd_soc_test_bits(codec, reg, mask, val);
173 if (change) { 173 if (change) {
174 update.kcontrol = kcontrol; 174 update.kcontrol = kcontrol;
175 update.reg = reg; 175 update.reg = reg;
@@ -1399,7 +1399,6 @@ static int aic3x_probe(struct snd_soc_codec *codec)
1399 } 1399 }
1400 1400
1401 aic3x_add_widgets(codec); 1401 aic3x_add_widgets(codec);
1402 list_add(&aic3x->list, &reset_list);
1403 1402
1404 return 0; 1403 return 0;
1405 1404
@@ -1569,7 +1568,13 @@ static int aic3x_i2c_probe(struct i2c_client *i2c,
1569 1568
1570 ret = snd_soc_register_codec(&i2c->dev, 1569 ret = snd_soc_register_codec(&i2c->dev,
1571 &soc_codec_dev_aic3x, &aic3x_dai, 1); 1570 &soc_codec_dev_aic3x, &aic3x_dai, 1);
1572 return ret; 1571
1572 if (ret != 0)
1573 goto err_gpio;
1574
1575 list_add(&aic3x->list, &reset_list);
1576
1577 return 0;
1573 1578
1574err_gpio: 1579err_gpio:
1575 if (gpio_is_valid(aic3x->gpio_reset) && 1580 if (gpio_is_valid(aic3x->gpio_reset) &&
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index 6bfc8a17331b..df3a7506c023 100644
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -442,7 +442,7 @@ static int dac33_playback_event(struct snd_soc_dapm_widget *w,
442static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, 442static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol) 443 struct snd_ctl_elem_value *ucontrol)
444{ 444{
445 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 445 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
446 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 446 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
447 447
448 ucontrol->value.integer.value[0] = dac33->fifo_mode; 448 ucontrol->value.integer.value[0] = dac33->fifo_mode;
@@ -453,7 +453,7 @@ static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
453static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol, 453static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
454 struct snd_ctl_elem_value *ucontrol) 454 struct snd_ctl_elem_value *ucontrol)
455{ 455{
456 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 456 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
457 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 457 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
458 int ret = 0; 458 int ret = 0;
459 459
@@ -1540,7 +1540,7 @@ static int dac33_i2c_probe(struct i2c_client *client,
1540 for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++) 1540 for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++)
1541 dac33->supplies[i].supply = dac33_supply_names[i]; 1541 dac33->supplies[i].supply = dac33_supply_names[i];
1542 1542
1543 ret = regulator_bulk_get(&client->dev, ARRAY_SIZE(dac33->supplies), 1543 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(dac33->supplies),
1544 dac33->supplies); 1544 dac33->supplies);
1545 1545
1546 if (ret != 0) { 1546 if (ret != 0) {
@@ -1551,11 +1551,9 @@ static int dac33_i2c_probe(struct i2c_client *client,
1551 ret = snd_soc_register_codec(&client->dev, 1551 ret = snd_soc_register_codec(&client->dev,
1552 &soc_codec_dev_tlv320dac33, &dac33_dai, 1); 1552 &soc_codec_dev_tlv320dac33, &dac33_dai, 1);
1553 if (ret < 0) 1553 if (ret < 0)
1554 goto err_register; 1554 goto err_get;
1555 1555
1556 return ret; 1556 return ret;
1557err_register:
1558 regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies);
1559err_get: 1557err_get:
1560 if (dac33->power_gpio >= 0) 1558 if (dac33->power_gpio >= 0)
1561 gpio_free(dac33->power_gpio); 1559 gpio_free(dac33->power_gpio);
@@ -1573,8 +1571,6 @@ static int dac33_i2c_remove(struct i2c_client *client)
1573 if (dac33->power_gpio >= 0) 1571 if (dac33->power_gpio >= 0)
1574 gpio_free(dac33->power_gpio); 1572 gpio_free(dac33->power_gpio);
1575 1573
1576 regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies);
1577
1578 snd_soc_unregister_codec(&client->dev); 1574 snd_soc_unregister_codec(&client->dev);
1579 return 0; 1575 return 0;
1580} 1576}
diff --git a/sound/soc/codecs/tpa6130a2.c b/sound/soc/codecs/tpa6130a2.c
index b27c396037d4..8fc5a647453b 100644
--- a/sound/soc/codecs/tpa6130a2.c
+++ b/sound/soc/codecs/tpa6130a2.c
@@ -30,6 +30,7 @@
30#include <sound/tpa6130a2-plat.h> 30#include <sound/tpa6130a2-plat.h>
31#include <sound/soc.h> 31#include <sound/soc.h>
32#include <sound/tlv.h> 32#include <sound/tlv.h>
33#include <linux/of.h>
33#include <linux/of_gpio.h> 34#include <linux/of_gpio.h>
34 35
35#include "tpa6130a2.h" 36#include "tpa6130a2.h"
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index 975e0f760ac1..69e12a311ba2 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -830,7 +830,7 @@ static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
830{ 830{
831 struct soc_mixer_control *mc = 831 struct soc_mixer_control *mc =
832 (struct soc_mixer_control *)kcontrol->private_value; 832 (struct soc_mixer_control *)kcontrol->private_value;
833 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 833 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
834 unsigned int reg = mc->reg; 834 unsigned int reg = mc->reg;
835 unsigned int shift = mc->shift; 835 unsigned int shift = mc->shift;
836 unsigned int rshift = mc->rshift; 836 unsigned int rshift = mc->rshift;
@@ -859,7 +859,7 @@ static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
859{ 859{
860 struct soc_mixer_control *mc = 860 struct soc_mixer_control *mc =
861 (struct soc_mixer_control *)kcontrol->private_value; 861 (struct soc_mixer_control *)kcontrol->private_value;
862 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 862 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
863 unsigned int reg = mc->reg; 863 unsigned int reg = mc->reg;
864 unsigned int shift = mc->shift; 864 unsigned int shift = mc->shift;
865 unsigned int rshift = mc->rshift; 865 unsigned int rshift = mc->rshift;
@@ -888,7 +888,7 @@ static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
888{ 888{
889 struct soc_mixer_control *mc = 889 struct soc_mixer_control *mc =
890 (struct soc_mixer_control *)kcontrol->private_value; 890 (struct soc_mixer_control *)kcontrol->private_value;
891 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 891 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
892 unsigned int reg = mc->reg; 892 unsigned int reg = mc->reg;
893 unsigned int reg2 = mc->rreg; 893 unsigned int reg2 = mc->rreg;
894 unsigned int shift = mc->shift; 894 unsigned int shift = mc->shift;
@@ -915,7 +915,7 @@ static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
915{ 915{
916 struct soc_mixer_control *mc = 916 struct soc_mixer_control *mc =
917 (struct soc_mixer_control *)kcontrol->private_value; 917 (struct soc_mixer_control *)kcontrol->private_value;
918 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 918 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
919 unsigned int reg = mc->reg; 919 unsigned int reg = mc->reg;
920 unsigned int reg2 = mc->rreg; 920 unsigned int reg2 = mc->rreg;
921 unsigned int shift = mc->shift; 921 unsigned int shift = mc->shift;
@@ -956,7 +956,7 @@ static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
956static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, 956static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol) 957 struct snd_ctl_elem_value *ucontrol)
958{ 958{
959 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 959 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
960 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 960 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
961 961
962 if (twl4030->configured) { 962 if (twl4030->configured) {
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c
index bd3a20647fdf..0f6067f04e29 100644
--- a/sound/soc/codecs/twl6040.c
+++ b/sound/soc/codecs/twl6040.c
@@ -484,7 +484,7 @@ static SOC_ENUM_SINGLE_EXT_DECL(twl6040_power_mode_enum,
484static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol, 484static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_value *ucontrol) 485 struct snd_ctl_elem_value *ucontrol)
486{ 486{
487 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 487 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
488 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); 488 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
489 489
490 ucontrol->value.enumerated.item[0] = priv->hs_power_mode; 490 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
@@ -495,7 +495,7 @@ static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
495static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol, 495static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
496 struct snd_ctl_elem_value *ucontrol) 496 struct snd_ctl_elem_value *ucontrol)
497{ 497{
498 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 498 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
499 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); 499 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
500 int high_perf = ucontrol->value.enumerated.item[0]; 500 int high_perf = ucontrol->value.enumerated.item[0];
501 int ret = 0; 501 int ret = 0;
@@ -512,7 +512,7 @@ static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
512static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol, 512static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
513 struct snd_ctl_elem_value *ucontrol) 513 struct snd_ctl_elem_value *ucontrol)
514{ 514{
515 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 515 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
516 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); 516 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
517 517
518 ucontrol->value.enumerated.item[0] = priv->pll_power_mode; 518 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
@@ -523,7 +523,7 @@ static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
523static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol, 523static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol) 524 struct snd_ctl_elem_value *ucontrol)
525{ 525{
526 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 526 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
527 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); 527 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
528 528
529 priv->pll_power_mode = ucontrol->value.enumerated.item[0]; 529 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c
index 6be5f80b65f1..4ead0dc02b87 100644
--- a/sound/soc/codecs/wl1273.c
+++ b/sound/soc/codecs/wl1273.c
@@ -172,7 +172,7 @@ out:
172static int snd_wl1273_get_audio_route(struct snd_kcontrol *kcontrol, 172static int snd_wl1273_get_audio_route(struct snd_kcontrol *kcontrol,
173 struct snd_ctl_elem_value *ucontrol) 173 struct snd_ctl_elem_value *ucontrol)
174{ 174{
175 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 175 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
176 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 176 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
177 177
178 ucontrol->value.integer.value[0] = wl1273->mode; 178 ucontrol->value.integer.value[0] = wl1273->mode;
@@ -190,7 +190,7 @@ static const char * const wl1273_audio_route[] = { "Bt", "FmRx", "FmTx" };
190static int snd_wl1273_set_audio_route(struct snd_kcontrol *kcontrol, 190static int snd_wl1273_set_audio_route(struct snd_kcontrol *kcontrol,
191 struct snd_ctl_elem_value *ucontrol) 191 struct snd_ctl_elem_value *ucontrol)
192{ 192{
193 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 193 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
194 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 194 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
195 195
196 if (wl1273->mode == ucontrol->value.integer.value[0]) 196 if (wl1273->mode == ucontrol->value.integer.value[0])
@@ -214,7 +214,7 @@ static SOC_ENUM_SINGLE_EXT_DECL(wl1273_enum, wl1273_audio_route);
214static int snd_wl1273_fm_audio_get(struct snd_kcontrol *kcontrol, 214static int snd_wl1273_fm_audio_get(struct snd_kcontrol *kcontrol,
215 struct snd_ctl_elem_value *ucontrol) 215 struct snd_ctl_elem_value *ucontrol)
216{ 216{
217 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 217 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
218 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 218 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
219 219
220 dev_dbg(codec->dev, "%s: enter.\n", __func__); 220 dev_dbg(codec->dev, "%s: enter.\n", __func__);
@@ -227,7 +227,7 @@ static int snd_wl1273_fm_audio_get(struct snd_kcontrol *kcontrol,
227static int snd_wl1273_fm_audio_put(struct snd_kcontrol *kcontrol, 227static int snd_wl1273_fm_audio_put(struct snd_kcontrol *kcontrol,
228 struct snd_ctl_elem_value *ucontrol) 228 struct snd_ctl_elem_value *ucontrol)
229{ 229{
230 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 230 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
231 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 231 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
232 int val, r = 0; 232 int val, r = 0;
233 233
@@ -251,7 +251,7 @@ static SOC_ENUM_SINGLE_EXT_DECL(wl1273_audio_enum, wl1273_audio_strings);
251static int snd_wl1273_fm_volume_get(struct snd_kcontrol *kcontrol, 251static int snd_wl1273_fm_volume_get(struct snd_kcontrol *kcontrol,
252 struct snd_ctl_elem_value *ucontrol) 252 struct snd_ctl_elem_value *ucontrol)
253{ 253{
254 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 254 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
255 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 255 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
256 256
257 dev_dbg(codec->dev, "%s: enter.\n", __func__); 257 dev_dbg(codec->dev, "%s: enter.\n", __func__);
@@ -264,7 +264,7 @@ static int snd_wl1273_fm_volume_get(struct snd_kcontrol *kcontrol,
264static int snd_wl1273_fm_volume_put(struct snd_kcontrol *kcontrol, 264static int snd_wl1273_fm_volume_put(struct snd_kcontrol *kcontrol,
265 struct snd_ctl_elem_value *ucontrol) 265 struct snd_ctl_elem_value *ucontrol)
266{ 266{
267 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 267 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
268 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); 268 struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec);
269 int r; 269 int r;
270 270
diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c
index 83a2c872925c..a4c352cc3464 100644
--- a/sound/soc/codecs/wm2000.c
+++ b/sound/soc/codecs/wm2000.c
@@ -607,7 +607,7 @@ static int wm2000_anc_set_mode(struct wm2000_priv *wm2000)
607static int wm2000_anc_mode_get(struct snd_kcontrol *kcontrol, 607static int wm2000_anc_mode_get(struct snd_kcontrol *kcontrol,
608 struct snd_ctl_elem_value *ucontrol) 608 struct snd_ctl_elem_value *ucontrol)
609{ 609{
610 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 610 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
611 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 611 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
612 612
613 ucontrol->value.enumerated.item[0] = wm2000->anc_active; 613 ucontrol->value.enumerated.item[0] = wm2000->anc_active;
@@ -618,7 +618,7 @@ static int wm2000_anc_mode_get(struct snd_kcontrol *kcontrol,
618static int wm2000_anc_mode_put(struct snd_kcontrol *kcontrol, 618static int wm2000_anc_mode_put(struct snd_kcontrol *kcontrol,
619 struct snd_ctl_elem_value *ucontrol) 619 struct snd_ctl_elem_value *ucontrol)
620{ 620{
621 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 621 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
622 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 622 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
623 int anc_active = ucontrol->value.enumerated.item[0]; 623 int anc_active = ucontrol->value.enumerated.item[0];
624 int ret; 624 int ret;
@@ -640,7 +640,7 @@ static int wm2000_anc_mode_put(struct snd_kcontrol *kcontrol,
640static int wm2000_speaker_get(struct snd_kcontrol *kcontrol, 640static int wm2000_speaker_get(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol) 641 struct snd_ctl_elem_value *ucontrol)
642{ 642{
643 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 643 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
644 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 644 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
645 645
646 ucontrol->value.enumerated.item[0] = wm2000->spk_ena; 646 ucontrol->value.enumerated.item[0] = wm2000->spk_ena;
@@ -651,7 +651,7 @@ static int wm2000_speaker_get(struct snd_kcontrol *kcontrol,
651static int wm2000_speaker_put(struct snd_kcontrol *kcontrol, 651static int wm2000_speaker_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol) 652 struct snd_ctl_elem_value *ucontrol)
653{ 653{
654 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 654 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
655 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 655 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
656 int val = ucontrol->value.enumerated.item[0]; 656 int val = ucontrol->value.enumerated.item[0];
657 int ret; 657 int ret;
diff --git a/sound/soc/codecs/wm2200.c b/sound/soc/codecs/wm2200.c
index 2e721e06671b..cdea9d9c1631 100644
--- a/sound/soc/codecs/wm2200.c
+++ b/sound/soc/codecs/wm2200.c
@@ -1083,7 +1083,7 @@ static int wm2200_mixer_values[] = {
1083 1083
1084#define WM2200_MUX_CTL_DECL(name) \ 1084#define WM2200_MUX_CTL_DECL(name) \
1085 const struct snd_kcontrol_new name##_mux = \ 1085 const struct snd_kcontrol_new name##_mux = \
1086 SOC_DAPM_VALUE_ENUM("Route", name##_enum) 1086 SOC_DAPM_ENUM("Route", name##_enum)
1087 1087
1088#define WM2200_MIXER_ENUMS(name, base_reg) \ 1088#define WM2200_MIXER_ENUMS(name, base_reg) \
1089 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \ 1089 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
@@ -1207,7 +1207,7 @@ WM2200_MIXER_ENUMS(LHPF1, WM2200_LHPF1MIX_INPUT_1_SOURCE);
1207WM2200_MIXER_ENUMS(LHPF2, WM2200_LHPF2MIX_INPUT_1_SOURCE); 1207WM2200_MIXER_ENUMS(LHPF2, WM2200_LHPF2MIX_INPUT_1_SOURCE);
1208 1208
1209#define WM2200_MUX(name, ctrl) \ 1209#define WM2200_MUX(name, ctrl) \
1210 SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) 1210 SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, 0, 0, ctrl)
1211 1211
1212#define WM2200_MIXER_WIDGETS(name, name_str) \ 1212#define WM2200_MIXER_WIDGETS(name, name_str) \
1213 WM2200_MUX(name_str " Input 1", &name##_in1_mux), \ 1213 WM2200_MUX(name_str " Input 1", &name##_in1_mux), \
diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c
index eca983fad891..91a9ea2a2056 100644
--- a/sound/soc/codecs/wm5100.c
+++ b/sound/soc/codecs/wm5100.c
@@ -390,7 +390,7 @@ static int wm5100_mixer_values[] = {
390 390
391#define WM5100_MUX_CTL_DECL(name) \ 391#define WM5100_MUX_CTL_DECL(name) \
392 const struct snd_kcontrol_new name##_mux = \ 392 const struct snd_kcontrol_new name##_mux = \
393 SOC_DAPM_VALUE_ENUM("Route", name##_enum) 393 SOC_DAPM_ENUM("Route", name##_enum)
394 394
395#define WM5100_MIXER_ENUMS(name, base_reg) \ 395#define WM5100_MIXER_ENUMS(name, base_reg) \
396 static WM5100_MUX_ENUM_DECL(name##_in1_enum, base_reg); \ 396 static WM5100_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
@@ -448,7 +448,7 @@ WM5100_MIXER_ENUMS(LHPF3, WM5100_HPLP3MIX_INPUT_1_SOURCE);
448WM5100_MIXER_ENUMS(LHPF4, WM5100_HPLP4MIX_INPUT_1_SOURCE); 448WM5100_MIXER_ENUMS(LHPF4, WM5100_HPLP4MIX_INPUT_1_SOURCE);
449 449
450#define WM5100_MUX(name, ctrl) \ 450#define WM5100_MUX(name, ctrl) \
451 SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) 451 SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, 0, 0, ctrl)
452 452
453#define WM5100_MIXER_WIDGETS(name, name_str) \ 453#define WM5100_MIXER_WIDGETS(name, name_str) \
454 WM5100_MUX(name_str " Input 1", &name##_in1_mux), \ 454 WM5100_MUX(name_str " Input 1", &name##_in1_mux), \
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c
index dcf1d12cfef8..289b64d89abd 100644
--- a/sound/soc/codecs/wm5102.c
+++ b/sound/soc/codecs/wm5102.c
@@ -764,8 +764,8 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode),
764SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), 764SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode),
765SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), 765SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode),
766 766
767SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), 767SOC_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]),
768SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), 768SOC_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]),
769 769
770ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), 770ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE),
771ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), 771ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE),
@@ -814,9 +814,9 @@ SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L,
814 ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, 814 ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT,
815 0xbf, 0, digital_tlv), 815 0xbf, 0, digital_tlv),
816 816
817SOC_VALUE_ENUM("HPOUT1 OSR", wm5102_hpout_osr[0]), 817SOC_ENUM("HPOUT1 OSR", wm5102_hpout_osr[0]),
818SOC_VALUE_ENUM("HPOUT2 OSR", wm5102_hpout_osr[1]), 818SOC_ENUM("HPOUT2 OSR", wm5102_hpout_osr[1]),
819SOC_VALUE_ENUM("EPOUT OSR", wm5102_hpout_osr[2]), 819SOC_ENUM("EPOUT OSR", wm5102_hpout_osr[2]),
820 820
821SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, 821SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE,
822 ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), 822 ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0),
@@ -970,7 +970,7 @@ static const struct soc_enum wm5102_aec_loopback =
970 wm5102_aec_loopback_values); 970 wm5102_aec_loopback_values);
971 971
972static const struct snd_kcontrol_new wm5102_aec_loopback_mux = 972static const struct snd_kcontrol_new wm5102_aec_loopback_mux =
973 SOC_DAPM_VALUE_ENUM("AEC Loopback", wm5102_aec_loopback); 973 SOC_DAPM_ENUM("AEC Loopback", wm5102_aec_loopback);
974 974
975static const struct snd_soc_dapm_widget wm5102_dapm_widgets[] = { 975static const struct snd_soc_dapm_widget wm5102_dapm_widgets[] = {
976SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 976SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
@@ -1204,7 +1204,7 @@ SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0,
1204 1204
1205ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), 1205ARIZONA_DSP_WIDGETS(DSP1, "DSP1"),
1206 1206
1207SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, 1207SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1,
1208 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, 1208 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0,
1209 &wm5102_aec_loopback_mux), 1209 &wm5102_aec_loopback_mux),
1210 1210
@@ -1760,10 +1760,6 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec)
1760 struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); 1760 struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec);
1761 int ret; 1761 int ret;
1762 1762
1763 ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
1764 if (ret != 0)
1765 return ret;
1766
1767 ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 2); 1763 ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 2);
1768 if (ret != 0) 1764 if (ret != 0)
1769 return ret; 1765 return ret;
@@ -1802,9 +1798,17 @@ static unsigned int wm5102_digital_vu[] = {
1802 ARIZONA_DAC_DIGITAL_VOLUME_5R, 1798 ARIZONA_DAC_DIGITAL_VOLUME_5R,
1803}; 1799};
1804 1800
1801static struct regmap *wm5102_get_regmap(struct device *dev)
1802{
1803 struct wm5102_priv *priv = dev_get_drvdata(dev);
1804
1805 return priv->core.arizona->regmap;
1806}
1807
1805static struct snd_soc_codec_driver soc_codec_dev_wm5102 = { 1808static struct snd_soc_codec_driver soc_codec_dev_wm5102 = {
1806 .probe = wm5102_codec_probe, 1809 .probe = wm5102_codec_probe,
1807 .remove = wm5102_codec_remove, 1810 .remove = wm5102_codec_remove,
1811 .get_regmap = wm5102_get_regmap,
1808 1812
1809 .idle_bias_off = true, 1813 .idle_bias_off = true,
1810 1814
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c
index df5a38dd8328..2e5fcb559e90 100644
--- a/sound/soc/codecs/wm5110.c
+++ b/sound/soc/codecs/wm5110.c
@@ -324,13 +324,13 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode),
324SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), 324SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode),
325SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), 325SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode),
326 326
327SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), 327SOC_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]),
328SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), 328SOC_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]),
329SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), 329SOC_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]),
330SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), 330SOC_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]),
331SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), 331SOC_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]),
332SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), 332SOC_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]),
333SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), 333SOC_ENUM("ASRC RATE 1", arizona_asrc_rate1),
334 334
335ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), 335ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE),
336ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), 336ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE),
@@ -367,6 +367,11 @@ SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL,
367SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, 367SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL,
368 ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), 368 ARIZONA_HP3_SC_ENA_SHIFT, 1, 0),
369 369
370SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L,
371 ARIZONA_OUT5_OSR_SHIFT, 1, 0),
372SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L,
373 ARIZONA_OUT6_OSR_SHIFT, 1, 0),
374
370SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, 375SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L,
371 ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), 376 ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1),
372SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, 377SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L,
@@ -592,7 +597,7 @@ static const struct soc_enum wm5110_aec_loopback =
592 wm5110_aec_loopback_values); 597 wm5110_aec_loopback_values);
593 598
594static const struct snd_kcontrol_new wm5110_aec_loopback_mux = 599static const struct snd_kcontrol_new wm5110_aec_loopback_mux =
595 SOC_DAPM_VALUE_ENUM("AEC Loopback", wm5110_aec_loopback); 600 SOC_DAPM_ENUM("AEC Loopback", wm5110_aec_loopback);
596 601
597static const struct snd_soc_dapm_widget wm5110_dapm_widgets[] = { 602static const struct snd_soc_dapm_widget wm5110_dapm_widgets[] = {
598SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 603SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
@@ -774,7 +779,7 @@ SND_SOC_DAPM_PGA("ISRC3DEC3", ARIZONA_ISRC_3_CTRL_3,
774SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, 779SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3,
775 ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0), 780 ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0),
776 781
777SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, 782SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1,
778 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, 783 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0,
779 &wm5110_aec_loopback_mux), 784 &wm5110_aec_loopback_mux),
780 785
@@ -1589,10 +1594,6 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec)
1589 1594
1590 priv->core.arizona->dapm = &codec->dapm; 1595 priv->core.arizona->dapm = &codec->dapm;
1591 1596
1592 ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
1593 if (ret != 0)
1594 return ret;
1595
1596 arizona_init_spk(codec); 1597 arizona_init_spk(codec);
1597 arizona_init_gpio(codec); 1598 arizona_init_gpio(codec);
1598 1599
@@ -1633,9 +1634,17 @@ static unsigned int wm5110_digital_vu[] = {
1633 ARIZONA_DAC_DIGITAL_VOLUME_6R, 1634 ARIZONA_DAC_DIGITAL_VOLUME_6R,
1634}; 1635};
1635 1636
1637static struct regmap *wm5110_get_regmap(struct device *dev)
1638{
1639 struct wm5110_priv *priv = dev_get_drvdata(dev);
1640
1641 return priv->core.arizona->regmap;
1642}
1643
1636static struct snd_soc_codec_driver soc_codec_dev_wm5110 = { 1644static struct snd_soc_codec_driver soc_codec_dev_wm5110 = {
1637 .probe = wm5110_codec_probe, 1645 .probe = wm5110_codec_probe,
1638 .remove = wm5110_codec_remove, 1646 .remove = wm5110_codec_remove,
1647 .get_regmap = wm5110_get_regmap,
1639 1648
1640 .idle_bias_off = true, 1649 .idle_bias_off = true,
1641 1650
diff --git a/sound/soc/codecs/wm8350.c b/sound/soc/codecs/wm8350.c
index 757256bf7672..392285edb595 100644
--- a/sound/soc/codecs/wm8350.c
+++ b/sound/soc/codecs/wm8350.c
@@ -302,7 +302,7 @@ static int pga_event(struct snd_soc_dapm_widget *w,
302static int wm8350_put_volsw_2r_vu(struct snd_kcontrol *kcontrol, 302static int wm8350_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
303 struct snd_ctl_elem_value *ucontrol) 303 struct snd_ctl_elem_value *ucontrol)
304{ 304{
305 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 305 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
306 struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec); 306 struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec);
307 struct wm8350_output *out = NULL; 307 struct wm8350_output *out = NULL;
308 struct soc_mixer_control *mc = 308 struct soc_mixer_control *mc =
@@ -345,7 +345,7 @@ static int wm8350_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
345static int wm8350_get_volsw_2r(struct snd_kcontrol *kcontrol, 345static int wm8350_get_volsw_2r(struct snd_kcontrol *kcontrol,
346 struct snd_ctl_elem_value *ucontrol) 346 struct snd_ctl_elem_value *ucontrol)
347{ 347{
348 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 348 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
349 struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec); 349 struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec);
350 struct wm8350_output *out1 = &wm8350_priv->out1; 350 struct wm8350_output *out1 = &wm8350_priv->out1;
351 struct wm8350_output *out2 = &wm8350_priv->out2; 351 struct wm8350_output *out2 = &wm8350_priv->out2;
@@ -1505,8 +1505,6 @@ static int wm8350_codec_probe(struct snd_soc_codec *codec)
1505 if (ret != 0) 1505 if (ret != 0)
1506 return ret; 1506 return ret;
1507 1507
1508 snd_soc_codec_set_cache_io(codec, wm8350->regmap);
1509
1510 /* Put the codec into reset if it wasn't already */ 1508 /* Put the codec into reset if it wasn't already */
1511 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA); 1509 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA);
1512 1510
@@ -1608,11 +1606,19 @@ static int wm8350_codec_remove(struct snd_soc_codec *codec)
1608 return 0; 1606 return 0;
1609} 1607}
1610 1608
1609static struct regmap *wm8350_get_regmap(struct device *dev)
1610{
1611 struct wm8350 *wm8350 = dev_get_platdata(dev);
1612
1613 return wm8350->regmap;
1614}
1615
1611static struct snd_soc_codec_driver soc_codec_dev_wm8350 = { 1616static struct snd_soc_codec_driver soc_codec_dev_wm8350 = {
1612 .probe = wm8350_codec_probe, 1617 .probe = wm8350_codec_probe,
1613 .remove = wm8350_codec_remove, 1618 .remove = wm8350_codec_remove,
1614 .suspend = wm8350_suspend, 1619 .suspend = wm8350_suspend,
1615 .resume = wm8350_resume, 1620 .resume = wm8350_resume,
1621 .get_regmap = wm8350_get_regmap,
1616 .set_bias_level = wm8350_set_bias_level, 1622 .set_bias_level = wm8350_set_bias_level,
1617 1623
1618 .controls = wm8350_snd_controls, 1624 .controls = wm8350_snd_controls,
diff --git a/sound/soc/codecs/wm8400.c b/sound/soc/codecs/wm8400.c
index 146564feaea0..06e913d3fea1 100644
--- a/sound/soc/codecs/wm8400.c
+++ b/sound/soc/codecs/wm8400.c
@@ -93,7 +93,7 @@ static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
93static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 93static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
94 struct snd_ctl_elem_value *ucontrol) 94 struct snd_ctl_elem_value *ucontrol)
95{ 95{
96 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 96 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
97 struct soc_mixer_control *mc = 97 struct soc_mixer_control *mc =
98 (struct soc_mixer_control *)kcontrol->private_value; 98 (struct soc_mixer_control *)kcontrol->private_value;
99 int reg = mc->reg; 99 int reg = mc->reg;
@@ -1318,8 +1318,6 @@ static int wm8400_codec_probe(struct snd_soc_codec *codec)
1318 priv->wm8400 = wm8400; 1318 priv->wm8400 = wm8400;
1319 priv->codec = codec; 1319 priv->codec = codec;
1320 1320
1321 snd_soc_codec_set_cache_io(codec, wm8400->regmap);
1322
1323 ret = devm_regulator_bulk_get(wm8400->dev, 1321 ret = devm_regulator_bulk_get(wm8400->dev,
1324 ARRAY_SIZE(power), &power[0]); 1322 ARRAY_SIZE(power), &power[0]);
1325 if (ret != 0) { 1323 if (ret != 0) {
@@ -1361,11 +1359,19 @@ static int wm8400_codec_remove(struct snd_soc_codec *codec)
1361 return 0; 1359 return 0;
1362} 1360}
1363 1361
1362static struct regmap *wm8400_get_regmap(struct device *dev)
1363{
1364 struct wm8400 *wm8400 = dev_get_platdata(dev);
1365
1366 return wm8400->regmap;
1367}
1368
1364static struct snd_soc_codec_driver soc_codec_dev_wm8400 = { 1369static struct snd_soc_codec_driver soc_codec_dev_wm8400 = {
1365 .probe = wm8400_codec_probe, 1370 .probe = wm8400_codec_probe,
1366 .remove = wm8400_codec_remove, 1371 .remove = wm8400_codec_remove,
1367 .suspend = wm8400_suspend, 1372 .suspend = wm8400_suspend,
1368 .resume = wm8400_resume, 1373 .resume = wm8400_resume,
1374 .get_regmap = wm8400_get_regmap,
1369 .set_bias_level = wm8400_set_bias_level, 1375 .set_bias_level = wm8400_set_bias_level,
1370 1376
1371 .controls = wm8400_snd_controls, 1377 .controls = wm8400_snd_controls,
diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c
index af7ed8b5d4e1..7665ff6aea6d 100644
--- a/sound/soc/codecs/wm8580.c
+++ b/sound/soc/codecs/wm8580.c
@@ -252,7 +252,7 @@ static int wm8580_out_vu(struct snd_kcontrol *kcontrol,
252{ 252{
253 struct soc_mixer_control *mc = 253 struct soc_mixer_control *mc =
254 (struct soc_mixer_control *)kcontrol->private_value; 254 (struct soc_mixer_control *)kcontrol->private_value;
255 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 255 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
256 struct wm8580_priv *wm8580 = snd_soc_codec_get_drvdata(codec); 256 struct wm8580_priv *wm8580 = snd_soc_codec_get_drvdata(codec);
257 unsigned int reg = mc->reg; 257 unsigned int reg = mc->reg;
258 unsigned int reg2 = mc->rreg; 258 unsigned int reg2 = mc->rreg;
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index d74f43975b90..5ada61611324 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -119,7 +119,7 @@ static int wm8731_set_deemph(struct snd_soc_codec *codec)
119static int wm8731_get_deemph(struct snd_kcontrol *kcontrol, 119static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
120 struct snd_ctl_elem_value *ucontrol) 120 struct snd_ctl_elem_value *ucontrol)
121{ 121{
122 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 122 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
123 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec); 123 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
124 124
125 ucontrol->value.enumerated.item[0] = wm8731->deemph; 125 ucontrol->value.enumerated.item[0] = wm8731->deemph;
@@ -130,7 +130,7 @@ static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
130static int wm8731_put_deemph(struct snd_kcontrol *kcontrol, 130static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
131 struct snd_ctl_elem_value *ucontrol) 131 struct snd_ctl_elem_value *ucontrol)
132{ 132{
133 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 133 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
134 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec); 134 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
135 int deemph = ucontrol->value.enumerated.item[0]; 135 int deemph = ucontrol->value.enumerated.item[0];
136 int ret = 0; 136 int ret = 0;
@@ -586,7 +586,7 @@ static int wm8731_probe(struct snd_soc_codec *codec)
586 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++) 586 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
587 wm8731->supplies[i].supply = wm8731_supply_names[i]; 587 wm8731->supplies[i].supply = wm8731_supply_names[i];
588 588
589 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8731->supplies), 589 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8731->supplies),
590 wm8731->supplies); 590 wm8731->supplies);
591 if (ret != 0) { 591 if (ret != 0) {
592 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 592 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
@@ -597,7 +597,7 @@ static int wm8731_probe(struct snd_soc_codec *codec)
597 wm8731->supplies); 597 wm8731->supplies);
598 if (ret != 0) { 598 if (ret != 0) {
599 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 599 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
600 goto err_regulator_get; 600 return ret;
601 } 601 }
602 602
603 ret = wm8731_reset(codec); 603 ret = wm8731_reset(codec);
@@ -624,8 +624,6 @@ static int wm8731_probe(struct snd_soc_codec *codec)
624 624
625err_regulator_enable: 625err_regulator_enable:
626 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies); 626 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
627err_regulator_get:
628 regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
629 627
630 return ret; 628 return ret;
631} 629}
@@ -638,7 +636,6 @@ static int wm8731_remove(struct snd_soc_codec *codec)
638 wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF); 636 wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
639 637
640 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies); 638 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
641 regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
642 639
643 return 0; 640 return 0;
644} 641}
diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c
index cbb8d55052a4..53e57b4049a8 100644
--- a/sound/soc/codecs/wm8753.c
+++ b/sound/soc/codecs/wm8753.c
@@ -234,7 +234,7 @@ SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
234static int wm8753_get_dai(struct snd_kcontrol *kcontrol, 234static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
235 struct snd_ctl_elem_value *ucontrol) 235 struct snd_ctl_elem_value *ucontrol)
236{ 236{
237 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 237 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
238 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 238 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
239 239
240 ucontrol->value.integer.value[0] = wm8753->dai_func; 240 ucontrol->value.integer.value[0] = wm8753->dai_func;
@@ -244,7 +244,7 @@ static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
244static int wm8753_set_dai(struct snd_kcontrol *kcontrol, 244static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
245 struct snd_ctl_elem_value *ucontrol) 245 struct snd_ctl_elem_value *ucontrol)
246{ 246{
247 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 247 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
248 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 248 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
249 u16 ioctl; 249 u16 ioctl;
250 250
diff --git a/sound/soc/codecs/wm8804.c b/sound/soc/codecs/wm8804.c
index ee76f0fb4299..bbcad9ff3c98 100644
--- a/sound/soc/codecs/wm8804.c
+++ b/sound/soc/codecs/wm8804.c
@@ -106,7 +106,7 @@ static int txsrc_get(struct snd_kcontrol *kcontrol,
106 struct snd_soc_codec *codec; 106 struct snd_soc_codec *codec;
107 unsigned int src; 107 unsigned int src;
108 108
109 codec = snd_kcontrol_chip(kcontrol); 109 codec = snd_soc_kcontrol_codec(kcontrol);
110 src = snd_soc_read(codec, WM8804_SPDTX4); 110 src = snd_soc_read(codec, WM8804_SPDTX4);
111 if (src & 0x40) 111 if (src & 0x40)
112 ucontrol->value.integer.value[0] = 1; 112 ucontrol->value.integer.value[0] = 1;
@@ -122,7 +122,7 @@ static int txsrc_put(struct snd_kcontrol *kcontrol,
122 struct snd_soc_codec *codec; 122 struct snd_soc_codec *codec;
123 unsigned int src, txpwr; 123 unsigned int src, txpwr;
124 124
125 codec = snd_kcontrol_chip(kcontrol); 125 codec = snd_soc_kcontrol_codec(kcontrol);
126 126
127 if (ucontrol->value.integer.value[0] != 0 127 if (ucontrol->value.integer.value[0] != 0
128 && ucontrol->value.integer.value[0] != 1) 128 && ucontrol->value.integer.value[0] != 1)
@@ -535,7 +535,6 @@ static int wm8804_remove(struct snd_soc_codec *codec)
535 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i) 535 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i)
536 regulator_unregister_notifier(wm8804->supplies[i].consumer, 536 regulator_unregister_notifier(wm8804->supplies[i].consumer,
537 &wm8804->disable_nb[i]); 537 &wm8804->disable_nb[i]);
538 regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
539 return 0; 538 return 0;
540} 539}
541 540
@@ -549,7 +548,7 @@ static int wm8804_probe(struct snd_soc_codec *codec)
549 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) 548 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
550 wm8804->supplies[i].supply = wm8804_supply_names[i]; 549 wm8804->supplies[i].supply = wm8804_supply_names[i];
551 550
552 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies), 551 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies),
553 wm8804->supplies); 552 wm8804->supplies);
554 if (ret) { 553 if (ret) {
555 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 554 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
@@ -574,7 +573,7 @@ static int wm8804_probe(struct snd_soc_codec *codec)
574 wm8804->supplies); 573 wm8804->supplies);
575 if (ret) { 574 if (ret) {
576 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 575 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
577 goto err_reg_get; 576 return ret;
578 } 577 }
579 578
580 id1 = snd_soc_read(codec, WM8804_RST_DEVID1); 579 id1 = snd_soc_read(codec, WM8804_RST_DEVID1);
@@ -619,8 +618,6 @@ static int wm8804_probe(struct snd_soc_codec *codec)
619 618
620err_reg_enable: 619err_reg_enable:
621 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies); 620 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
622err_reg_get:
623 regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
624 return ret; 621 return ret;
625} 622}
626 623
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index b0084a127d18..b84940c359a1 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -439,7 +439,7 @@ static int wm8903_set_deemph(struct snd_soc_codec *codec)
439static int wm8903_get_deemph(struct snd_kcontrol *kcontrol, 439static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
440 struct snd_ctl_elem_value *ucontrol) 440 struct snd_ctl_elem_value *ucontrol)
441{ 441{
442 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 442 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
443 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 443 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
444 444
445 ucontrol->value.enumerated.item[0] = wm8903->deemph; 445 ucontrol->value.enumerated.item[0] = wm8903->deemph;
@@ -450,7 +450,7 @@ static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
450static int wm8903_put_deemph(struct snd_kcontrol *kcontrol, 450static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol) 451 struct snd_ctl_elem_value *ucontrol)
452{ 452{
453 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 453 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
454 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 454 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
455 int deemph = ucontrol->value.enumerated.item[0]; 455 int deemph = ucontrol->value.enumerated.item[0];
456 int ret = 0; 456 int ret = 0;
diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 49c35c36935e..f7c549949c54 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -391,7 +391,7 @@ static void wm8904_set_drc(struct snd_soc_codec *codec)
391static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 391static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol,
392 struct snd_ctl_elem_value *ucontrol) 392 struct snd_ctl_elem_value *ucontrol)
393{ 393{
394 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 394 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
395 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 395 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
396 struct wm8904_pdata *pdata = wm8904->pdata; 396 struct wm8904_pdata *pdata = wm8904->pdata;
397 int value = ucontrol->value.integer.value[0]; 397 int value = ucontrol->value.integer.value[0];
@@ -409,7 +409,7 @@ static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol,
409static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 409static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol) 410 struct snd_ctl_elem_value *ucontrol)
411{ 411{
412 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 412 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
413 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 413 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
414 414
415 ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 415 ucontrol->value.enumerated.item[0] = wm8904->drc_cfg;
@@ -462,7 +462,7 @@ static void wm8904_set_retune_mobile(struct snd_soc_codec *codec)
462static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 462static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
463 struct snd_ctl_elem_value *ucontrol) 463 struct snd_ctl_elem_value *ucontrol)
464{ 464{
465 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 465 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
466 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 466 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
467 struct wm8904_pdata *pdata = wm8904->pdata; 467 struct wm8904_pdata *pdata = wm8904->pdata;
468 int value = ucontrol->value.integer.value[0]; 468 int value = ucontrol->value.integer.value[0];
@@ -480,7 +480,7 @@ static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
480static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 480static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
481 struct snd_ctl_elem_value *ucontrol) 481 struct snd_ctl_elem_value *ucontrol)
482{ 482{
483 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 483 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
484 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 484 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
485 485
486 ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 486 ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg;
@@ -520,7 +520,7 @@ static int wm8904_set_deemph(struct snd_soc_codec *codec)
520static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 520static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
521 struct snd_ctl_elem_value *ucontrol) 521 struct snd_ctl_elem_value *ucontrol)
522{ 522{
523 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 523 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
524 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 524 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
525 525
526 ucontrol->value.enumerated.item[0] = wm8904->deemph; 526 ucontrol->value.enumerated.item[0] = wm8904->deemph;
@@ -530,7 +530,7 @@ static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
530static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 530static int wm8904_put_deemph(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_value *ucontrol) 531 struct snd_ctl_elem_value *ucontrol)
532{ 532{
533 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 533 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
534 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 534 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
535 int deemph = ucontrol->value.enumerated.item[0]; 535 int deemph = ucontrol->value.enumerated.item[0];
536 536
@@ -570,7 +570,7 @@ static SOC_ENUM_SINGLE_DECL(hpf_mode, WM8904_ADC_DIGITAL_0, 5,
570static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol, 570static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol,
571 struct snd_ctl_elem_value *ucontrol) 571 struct snd_ctl_elem_value *ucontrol)
572{ 572{
573 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 573 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
574 unsigned int val; 574 unsigned int val;
575 int ret; 575 int ret;
576 576
diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c
index fecd4e4f4c57..2a35108f233d 100644
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -390,7 +390,7 @@ static int wm8955_set_deemph(struct snd_soc_codec *codec)
390static int wm8955_get_deemph(struct snd_kcontrol *kcontrol, 390static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
391 struct snd_ctl_elem_value *ucontrol) 391 struct snd_ctl_elem_value *ucontrol)
392{ 392{
393 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 393 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
394 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 394 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
395 395
396 ucontrol->value.enumerated.item[0] = wm8955->deemph; 396 ucontrol->value.enumerated.item[0] = wm8955->deemph;
@@ -400,7 +400,7 @@ static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
400static int wm8955_put_deemph(struct snd_kcontrol *kcontrol, 400static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
401 struct snd_ctl_elem_value *ucontrol) 401 struct snd_ctl_elem_value *ucontrol)
402{ 402{
403 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 403 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
404 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 404 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
405 int deemph = ucontrol->value.enumerated.item[0]; 405 int deemph = ucontrol->value.enumerated.item[0];
406 406
@@ -898,7 +898,7 @@ static int wm8955_probe(struct snd_soc_codec *codec)
898 for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++) 898 for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++)
899 wm8955->supplies[i].supply = wm8955_supply_names[i]; 899 wm8955->supplies[i].supply = wm8955_supply_names[i];
900 900
901 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8955->supplies), 901 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8955->supplies),
902 wm8955->supplies); 902 wm8955->supplies);
903 if (ret != 0) { 903 if (ret != 0) {
904 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 904 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
@@ -909,7 +909,7 @@ static int wm8955_probe(struct snd_soc_codec *codec)
909 wm8955->supplies); 909 wm8955->supplies);
910 if (ret != 0) { 910 if (ret != 0) {
911 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 911 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
912 goto err_get; 912 return ret;
913 } 913 }
914 914
915 ret = wm8955_reset(codec); 915 ret = wm8955_reset(codec);
@@ -961,17 +961,12 @@ static int wm8955_probe(struct snd_soc_codec *codec)
961 961
962err_enable: 962err_enable:
963 regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies); 963 regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
964err_get:
965 regulator_bulk_free(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
966 return ret; 964 return ret;
967} 965}
968 966
969static int wm8955_remove(struct snd_soc_codec *codec) 967static int wm8955_remove(struct snd_soc_codec *codec)
970{ 968{
971 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
972
973 wm8955_set_bias_level(codec, SND_SOC_BIAS_OFF); 969 wm8955_set_bias_level(codec, SND_SOC_BIAS_OFF);
974 regulator_bulk_free(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
975 return 0; 970 return 0;
976} 971}
977 972
diff --git a/sound/soc/codecs/wm8958-dsp2.c b/sound/soc/codecs/wm8958-dsp2.c
index 7ac2e511403c..b2ebb104d879 100644
--- a/sound/soc/codecs/wm8958-dsp2.c
+++ b/sound/soc/codecs/wm8958-dsp2.c
@@ -456,7 +456,7 @@ static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
456static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol, 456static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
457 struct snd_ctl_elem_value *ucontrol) 457 struct snd_ctl_elem_value *ucontrol)
458{ 458{
459 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 459 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
460 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 460 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
461 struct wm8994 *control = wm8994->wm8994; 461 struct wm8994 *control = wm8994->wm8994;
462 int value = ucontrol->value.integer.value[0]; 462 int value = ucontrol->value.integer.value[0];
@@ -478,7 +478,7 @@ static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
478static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol, 478static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
479 struct snd_ctl_elem_value *ucontrol) 479 struct snd_ctl_elem_value *ucontrol)
480{ 480{
481 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 481 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
482 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 482 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
483 483
484 ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg; 484 ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
@@ -500,7 +500,7 @@ static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_value *ucontrol) 500 struct snd_ctl_elem_value *ucontrol)
501{ 501{
502 int mbc = kcontrol->private_value; 502 int mbc = kcontrol->private_value;
503 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 503 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
504 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 504 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
505 505
506 ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc]; 506 ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
@@ -512,7 +512,7 @@ static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_value *ucontrol) 512 struct snd_ctl_elem_value *ucontrol)
513{ 513{
514 int mbc = kcontrol->private_value; 514 int mbc = kcontrol->private_value;
515 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 515 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
516 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 516 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
517 517
518 if (wm8994->mbc_ena[mbc] == ucontrol->value.integer.value[0]) 518 if (wm8994->mbc_ena[mbc] == ucontrol->value.integer.value[0])
@@ -546,7 +546,7 @@ static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
546static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol, 546static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol) 547 struct snd_ctl_elem_value *ucontrol)
548{ 548{
549 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 549 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
550 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 550 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
551 struct wm8994 *control = wm8994->wm8994; 551 struct wm8994 *control = wm8994->wm8994;
552 int value = ucontrol->value.integer.value[0]; 552 int value = ucontrol->value.integer.value[0];
@@ -568,7 +568,7 @@ static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol,
568static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol, 568static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol) 569 struct snd_ctl_elem_value *ucontrol)
570{ 570{
571 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 571 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
572 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 572 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
573 573
574 ucontrol->value.enumerated.item[0] = wm8994->vss_cfg; 574 ucontrol->value.enumerated.item[0] = wm8994->vss_cfg;
@@ -579,7 +579,7 @@ static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol,
579static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol, 579static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol) 580 struct snd_ctl_elem_value *ucontrol)
581{ 581{
582 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 582 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
583 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 583 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
584 struct wm8994 *control = wm8994->wm8994; 584 struct wm8994 *control = wm8994->wm8994;
585 int value = ucontrol->value.integer.value[0]; 585 int value = ucontrol->value.integer.value[0];
@@ -601,7 +601,7 @@ static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol,
601static int wm8958_get_vss_hpf_enum(struct snd_kcontrol *kcontrol, 601static int wm8958_get_vss_hpf_enum(struct snd_kcontrol *kcontrol,
602 struct snd_ctl_elem_value *ucontrol) 602 struct snd_ctl_elem_value *ucontrol)
603{ 603{
604 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 604 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
605 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 605 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
606 606
607 ucontrol->value.enumerated.item[0] = wm8994->vss_hpf_cfg; 607 ucontrol->value.enumerated.item[0] = wm8994->vss_hpf_cfg;
@@ -623,7 +623,7 @@ static int wm8958_vss_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol) 623 struct snd_ctl_elem_value *ucontrol)
624{ 624{
625 int vss = kcontrol->private_value; 625 int vss = kcontrol->private_value;
626 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 626 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
627 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 627 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
628 628
629 ucontrol->value.integer.value[0] = wm8994->vss_ena[vss]; 629 ucontrol->value.integer.value[0] = wm8994->vss_ena[vss];
@@ -635,7 +635,7 @@ static int wm8958_vss_put(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol) 635 struct snd_ctl_elem_value *ucontrol)
636{ 636{
637 int vss = kcontrol->private_value; 637 int vss = kcontrol->private_value;
638 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 638 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
639 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 639 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
640 640
641 if (wm8994->vss_ena[vss] == ucontrol->value.integer.value[0]) 641 if (wm8994->vss_ena[vss] == ucontrol->value.integer.value[0])
@@ -684,7 +684,7 @@ static int wm8958_hpf_get(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol) 684 struct snd_ctl_elem_value *ucontrol)
685{ 685{
686 int hpf = kcontrol->private_value; 686 int hpf = kcontrol->private_value;
687 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 687 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
688 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 688 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
689 689
690 if (hpf < 3) 690 if (hpf < 3)
@@ -699,7 +699,7 @@ static int wm8958_hpf_put(struct snd_kcontrol *kcontrol,
699 struct snd_ctl_elem_value *ucontrol) 699 struct snd_ctl_elem_value *ucontrol)
700{ 700{
701 int hpf = kcontrol->private_value; 701 int hpf = kcontrol->private_value;
702 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 702 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
703 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 703 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
704 704
705 if (hpf < 3) { 705 if (hpf < 3) {
@@ -746,7 +746,7 @@ static int wm8958_hpf_put(struct snd_kcontrol *kcontrol,
746static int wm8958_put_enh_eq_enum(struct snd_kcontrol *kcontrol, 746static int wm8958_put_enh_eq_enum(struct snd_kcontrol *kcontrol,
747 struct snd_ctl_elem_value *ucontrol) 747 struct snd_ctl_elem_value *ucontrol)
748{ 748{
749 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 749 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
750 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 750 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
751 struct wm8994 *control = wm8994->wm8994; 751 struct wm8994 *control = wm8994->wm8994;
752 int value = ucontrol->value.integer.value[0]; 752 int value = ucontrol->value.integer.value[0];
@@ -768,7 +768,7 @@ static int wm8958_put_enh_eq_enum(struct snd_kcontrol *kcontrol,
768static int wm8958_get_enh_eq_enum(struct snd_kcontrol *kcontrol, 768static int wm8958_get_enh_eq_enum(struct snd_kcontrol *kcontrol,
769 struct snd_ctl_elem_value *ucontrol) 769 struct snd_ctl_elem_value *ucontrol)
770{ 770{
771 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 771 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
772 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 772 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
773 773
774 ucontrol->value.enumerated.item[0] = wm8994->enh_eq_cfg; 774 ucontrol->value.enumerated.item[0] = wm8994->enh_eq_cfg;
@@ -790,7 +790,7 @@ static int wm8958_enh_eq_get(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol) 790 struct snd_ctl_elem_value *ucontrol)
791{ 791{
792 int eq = kcontrol->private_value; 792 int eq = kcontrol->private_value;
793 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 793 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
794 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 794 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
795 795
796 ucontrol->value.integer.value[0] = wm8994->enh_eq_ena[eq]; 796 ucontrol->value.integer.value[0] = wm8994->enh_eq_ena[eq];
@@ -802,7 +802,7 @@ static int wm8958_enh_eq_put(struct snd_kcontrol *kcontrol,
802 struct snd_ctl_elem_value *ucontrol) 802 struct snd_ctl_elem_value *ucontrol)
803{ 803{
804 int eq = kcontrol->private_value; 804 int eq = kcontrol->private_value;
805 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 805 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
806 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 806 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
807 807
808 if (wm8994->enh_eq_ena[eq] == ucontrol->value.integer.value[0]) 808 if (wm8994->enh_eq_ena[eq] == ucontrol->value.integer.value[0])
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index d04e9cad445c..a145d0431b63 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -178,7 +178,7 @@ static int wm8960_set_deemph(struct snd_soc_codec *codec)
178static int wm8960_get_deemph(struct snd_kcontrol *kcontrol, 178static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
179 struct snd_ctl_elem_value *ucontrol) 179 struct snd_ctl_elem_value *ucontrol)
180{ 180{
181 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 181 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
182 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 182 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
183 183
184 ucontrol->value.enumerated.item[0] = wm8960->deemph; 184 ucontrol->value.enumerated.item[0] = wm8960->deemph;
@@ -188,7 +188,7 @@ static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
188static int wm8960_put_deemph(struct snd_kcontrol *kcontrol, 188static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol) 189 struct snd_ctl_elem_value *ucontrol)
190{ 190{
191 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 191 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
192 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 192 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
193 int deemph = ucontrol->value.enumerated.item[0]; 193 int deemph = ucontrol->value.enumerated.item[0];
194 194
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 5522d2566c67..ca2fda9d72be 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -74,11 +74,9 @@ struct wm8962_priv {
74 struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES]; 74 struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES];
75 struct notifier_block disable_nb[WM8962_NUM_SUPPLIES]; 75 struct notifier_block disable_nb[WM8962_NUM_SUPPLIES];
76 76
77#if IS_ENABLED(CONFIG_INPUT)
78 struct input_dev *beep; 77 struct input_dev *beep;
79 struct work_struct beep_work; 78 struct work_struct beep_work;
80 int beep_rate; 79 int beep_rate;
81#endif
82 80
83#ifdef CONFIG_GPIOLIB 81#ifdef CONFIG_GPIOLIB
84 struct gpio_chip gpio_chip; 82 struct gpio_chip gpio_chip;
@@ -154,6 +152,7 @@ static struct reg_default wm8962_reg[] = {
154 { 40, 0x0000 }, /* R40 - SPKOUTL volume */ 152 { 40, 0x0000 }, /* R40 - SPKOUTL volume */
155 { 41, 0x0000 }, /* R41 - SPKOUTR volume */ 153 { 41, 0x0000 }, /* R41 - SPKOUTR volume */
156 154
155 { 49, 0x0010 }, /* R49 - Class D Control 1 */
157 { 51, 0x0003 }, /* R51 - Class D Control 2 */ 156 { 51, 0x0003 }, /* R51 - Class D Control 2 */
158 157
159 { 56, 0x0506 }, /* R56 - Clocking 4 */ 158 { 56, 0x0506 }, /* R56 - Clocking 4 */
@@ -795,7 +794,6 @@ static bool wm8962_volatile_register(struct device *dev, unsigned int reg)
795 case WM8962_ALC2: 794 case WM8962_ALC2:
796 case WM8962_THERMAL_SHUTDOWN_STATUS: 795 case WM8962_THERMAL_SHUTDOWN_STATUS:
797 case WM8962_ADDITIONAL_CONTROL_4: 796 case WM8962_ADDITIONAL_CONTROL_4:
798 case WM8962_CLASS_D_CONTROL_1:
799 case WM8962_DC_SERVO_6: 797 case WM8962_DC_SERVO_6:
800 case WM8962_INTERRUPT_STATUS_1: 798 case WM8962_INTERRUPT_STATUS_1:
801 case WM8962_INTERRUPT_STATUS_2: 799 case WM8962_INTERRUPT_STATUS_2:
@@ -1552,7 +1550,7 @@ static int wm8962_dsp2_ena_get(struct snd_kcontrol *kcontrol,
1552 struct snd_ctl_elem_value *ucontrol) 1550 struct snd_ctl_elem_value *ucontrol)
1553{ 1551{
1554 int shift = kcontrol->private_value; 1552 int shift = kcontrol->private_value;
1555 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1553 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1556 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 1554 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
1557 1555
1558 ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift); 1556 ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift);
@@ -1564,7 +1562,7 @@ static int wm8962_dsp2_ena_put(struct snd_kcontrol *kcontrol,
1564 struct snd_ctl_elem_value *ucontrol) 1562 struct snd_ctl_elem_value *ucontrol)
1565{ 1563{
1566 int shift = kcontrol->private_value; 1564 int shift = kcontrol->private_value;
1567 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1565 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1568 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 1566 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
1569 int old = wm8962->dsp2_ena; 1567 int old = wm8962->dsp2_ena;
1570 int ret = 0; 1568 int ret = 0;
@@ -1602,7 +1600,7 @@ out:
1602static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol, 1600static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
1603 struct snd_ctl_elem_value *ucontrol) 1601 struct snd_ctl_elem_value *ucontrol)
1604{ 1602{
1605 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1603 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1606 int ret; 1604 int ret;
1607 1605
1608 /* Apply the update (if any) */ 1606 /* Apply the update (if any) */
@@ -1632,7 +1630,7 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
1632static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol, 1630static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol,
1633 struct snd_ctl_elem_value *ucontrol) 1631 struct snd_ctl_elem_value *ucontrol)
1634{ 1632{
1635 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1633 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1636 int ret; 1634 int ret;
1637 1635
1638 /* Apply the update (if any) */ 1636 /* Apply the update (if any) */
@@ -2929,13 +2927,22 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
2929static int wm8962_mute(struct snd_soc_dai *dai, int mute) 2927static int wm8962_mute(struct snd_soc_dai *dai, int mute)
2930{ 2928{
2931 struct snd_soc_codec *codec = dai->codec; 2929 struct snd_soc_codec *codec = dai->codec;
2932 int val; 2930 int val, ret;
2933 2931
2934 if (mute) 2932 if (mute)
2935 val = WM8962_DAC_MUTE; 2933 val = WM8962_DAC_MUTE | WM8962_DAC_MUTE_ALT;
2936 else 2934 else
2937 val = 0; 2935 val = 0;
2938 2936
2937 /**
2938 * The DAC mute bit is mirrored in two registers, update both to keep
2939 * the register cache consistent.
2940 */
2941 ret = snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_1,
2942 WM8962_DAC_MUTE_ALT, val);
2943 if (ret < 0)
2944 return ret;
2945
2939 return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1, 2946 return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1,
2940 WM8962_DAC_MUTE, val); 2947 WM8962_DAC_MUTE, val);
2941} 2948}
@@ -3145,7 +3152,6 @@ int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
3145} 3152}
3146EXPORT_SYMBOL_GPL(wm8962_mic_detect); 3153EXPORT_SYMBOL_GPL(wm8962_mic_detect);
3147 3154
3148#if IS_ENABLED(CONFIG_INPUT)
3149static int beep_rates[] = { 3155static int beep_rates[] = {
3150 500, 1000, 2000, 4000, 3156 500, 1000, 2000, 4000,
3151}; 3157};
@@ -3277,15 +3283,6 @@ static void wm8962_free_beep(struct snd_soc_codec *codec)
3277 3283
3278 snd_soc_update_bits(codec, WM8962_BEEP_GENERATOR_1, WM8962_BEEP_ENA,0); 3284 snd_soc_update_bits(codec, WM8962_BEEP_GENERATOR_1, WM8962_BEEP_ENA,0);
3279} 3285}
3280#else
3281static void wm8962_init_beep(struct snd_soc_codec *codec)
3282{
3283}
3284
3285static void wm8962_free_beep(struct snd_soc_codec *codec)
3286{
3287}
3288#endif
3289 3286
3290static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio) 3287static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio)
3291{ 3288{
diff --git a/sound/soc/codecs/wm8962.h b/sound/soc/codecs/wm8962.h
index a1a5d5294c19..910aafd09d21 100644
--- a/sound/soc/codecs/wm8962.h
+++ b/sound/soc/codecs/wm8962.h
@@ -1954,6 +1954,10 @@
1954#define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */ 1954#define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */
1955#define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */ 1955#define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */
1956#define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */ 1956#define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */
1957#define WM8962_DAC_MUTE_ALT 0x0010 /* DAC_MUTE */
1958#define WM8962_DAC_MUTE_ALT_MASK 0x0010 /* DAC_MUTE */
1959#define WM8962_DAC_MUTE_ALT_SHIFT 4 /* DAC_MUTE */
1960#define WM8962_DAC_MUTE_ALT_WIDTH 1 /* DAC_MUTE */
1957#define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */ 1961#define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */
1958#define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */ 1962#define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */
1959#define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */ 1963#define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */
diff --git a/sound/soc/codecs/wm8983.c b/sound/soc/codecs/wm8983.c
index 2b9bfa53efbf..19d5baa38f5c 100644
--- a/sound/soc/codecs/wm8983.c
+++ b/sound/soc/codecs/wm8983.c
@@ -552,7 +552,7 @@ static const struct snd_soc_dapm_route wm8983_audio_map[] = {
552static int eqmode_get(struct snd_kcontrol *kcontrol, 552static int eqmode_get(struct snd_kcontrol *kcontrol,
553 struct snd_ctl_elem_value *ucontrol) 553 struct snd_ctl_elem_value *ucontrol)
554{ 554{
555 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 555 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
556 unsigned int reg; 556 unsigned int reg;
557 557
558 reg = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF); 558 reg = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF);
@@ -567,7 +567,7 @@ static int eqmode_get(struct snd_kcontrol *kcontrol,
567static int eqmode_put(struct snd_kcontrol *kcontrol, 567static int eqmode_put(struct snd_kcontrol *kcontrol,
568 struct snd_ctl_elem_value *ucontrol) 568 struct snd_ctl_elem_value *ucontrol)
569{ 569{
570 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 570 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
571 unsigned int regpwr2, regpwr3; 571 unsigned int regpwr2, regpwr3;
572 unsigned int reg_eq; 572 unsigned int reg_eq;
573 573
diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c
index 5473dc969585..0f5780c09f3a 100644
--- a/sound/soc/codecs/wm8985.c
+++ b/sound/soc/codecs/wm8985.c
@@ -526,7 +526,7 @@ static const struct snd_soc_dapm_route wm8985_dapm_routes[] = {
526static int eqmode_get(struct snd_kcontrol *kcontrol, 526static int eqmode_get(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_value *ucontrol) 527 struct snd_ctl_elem_value *ucontrol)
528{ 528{
529 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 529 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
530 unsigned int reg; 530 unsigned int reg;
531 531
532 reg = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF); 532 reg = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF);
@@ -541,7 +541,7 @@ static int eqmode_get(struct snd_kcontrol *kcontrol,
541static int eqmode_put(struct snd_kcontrol *kcontrol, 541static int eqmode_put(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol) 542 struct snd_ctl_elem_value *ucontrol)
543{ 543{
544 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 544 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
545 unsigned int regpwr2, regpwr3; 545 unsigned int regpwr2, regpwr3;
546 unsigned int reg_eq; 546 unsigned int reg_eq;
547 547
@@ -984,7 +984,6 @@ static int wm8985_remove(struct snd_soc_codec *codec)
984 984
985 wm8985 = snd_soc_codec_get_drvdata(codec); 985 wm8985 = snd_soc_codec_get_drvdata(codec);
986 wm8985_set_bias_level(codec, SND_SOC_BIAS_OFF); 986 wm8985_set_bias_level(codec, SND_SOC_BIAS_OFF);
987 regulator_bulk_free(ARRAY_SIZE(wm8985->supplies), wm8985->supplies);
988 return 0; 987 return 0;
989} 988}
990 989
@@ -999,7 +998,7 @@ static int wm8985_probe(struct snd_soc_codec *codec)
999 for (i = 0; i < ARRAY_SIZE(wm8985->supplies); i++) 998 for (i = 0; i < ARRAY_SIZE(wm8985->supplies); i++)
1000 wm8985->supplies[i].supply = wm8985_supply_names[i]; 999 wm8985->supplies[i].supply = wm8985_supply_names[i];
1001 1000
1002 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8985->supplies), 1001 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8985->supplies),
1003 wm8985->supplies); 1002 wm8985->supplies);
1004 if (ret) { 1003 if (ret) {
1005 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 1004 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
@@ -1010,7 +1009,7 @@ static int wm8985_probe(struct snd_soc_codec *codec)
1010 wm8985->supplies); 1009 wm8985->supplies);
1011 if (ret) { 1010 if (ret) {
1012 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 1011 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
1013 goto err_reg_get; 1012 return ret;
1014 } 1013 }
1015 1014
1016 ret = wm8985_reset(codec); 1015 ret = wm8985_reset(codec);
@@ -1032,8 +1031,6 @@ static int wm8985_probe(struct snd_soc_codec *codec)
1032 1031
1033err_reg_enable: 1032err_reg_enable:
1034 regulator_bulk_disable(ARRAY_SIZE(wm8985->supplies), wm8985->supplies); 1033 regulator_bulk_disable(ARRAY_SIZE(wm8985->supplies), wm8985->supplies);
1035err_reg_get:
1036 regulator_bulk_free(ARRAY_SIZE(wm8985->supplies), wm8985->supplies);
1037 return ret; 1034 return ret;
1038} 1035}
1039 1036
diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c
index 3a1ae4f5164d..d3fea46d58e8 100644
--- a/sound/soc/codecs/wm8988.c
+++ b/sound/soc/codecs/wm8988.c
@@ -268,7 +268,7 @@ static const struct soc_enum wm8988_lline_enum =
268 wm8988_line_texts, 268 wm8988_line_texts,
269 wm8988_line_values); 269 wm8988_line_values);
270static const struct snd_kcontrol_new wm8988_left_line_controls = 270static const struct snd_kcontrol_new wm8988_left_line_controls =
271 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 271 SOC_DAPM_ENUM("Route", wm8988_lline_enum);
272 272
273static const struct soc_enum wm8988_rline_enum = 273static const struct soc_enum wm8988_rline_enum =
274 SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7, 274 SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
@@ -276,7 +276,7 @@ static const struct soc_enum wm8988_rline_enum =
276 wm8988_line_texts, 276 wm8988_line_texts,
277 wm8988_line_values); 277 wm8988_line_values);
278static const struct snd_kcontrol_new wm8988_right_line_controls = 278static const struct snd_kcontrol_new wm8988_right_line_controls =
279 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 279 SOC_DAPM_ENUM("Route", wm8988_lline_enum);
280 280
281/* Left Mixer */ 281/* Left Mixer */
282static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = { 282static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
@@ -304,7 +304,7 @@ static const struct soc_enum wm8988_lpga_enum =
304 wm8988_pga_sel, 304 wm8988_pga_sel,
305 wm8988_pga_val); 305 wm8988_pga_val);
306static const struct snd_kcontrol_new wm8988_left_pga_controls = 306static const struct snd_kcontrol_new wm8988_left_pga_controls =
307 SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum); 307 SOC_DAPM_ENUM("Route", wm8988_lpga_enum);
308 308
309/* Right PGA Mux */ 309/* Right PGA Mux */
310static const struct soc_enum wm8988_rpga_enum = 310static const struct soc_enum wm8988_rpga_enum =
@@ -313,7 +313,7 @@ static const struct soc_enum wm8988_rpga_enum =
313 wm8988_pga_sel, 313 wm8988_pga_sel,
314 wm8988_pga_val); 314 wm8988_pga_val);
315static const struct snd_kcontrol_new wm8988_right_pga_controls = 315static const struct snd_kcontrol_new wm8988_right_pga_controls =
316 SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum); 316 SOC_DAPM_ENUM("Route", wm8988_rpga_enum);
317 317
318/* Differential Mux */ 318/* Differential Mux */
319static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"}; 319static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c
index c413c1991453..b5c1f0f07058 100644
--- a/sound/soc/codecs/wm8990.c
+++ b/sound/soc/codecs/wm8990.c
@@ -132,7 +132,7 @@ static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
132static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 132static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
133 struct snd_ctl_elem_value *ucontrol) 133 struct snd_ctl_elem_value *ucontrol)
134{ 134{
135 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 135 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
136 struct soc_mixer_control *mc = 136 struct soc_mixer_control *mc =
137 (struct soc_mixer_control *)kcontrol->private_value; 137 (struct soc_mixer_control *)kcontrol->private_value;
138 int reg = mc->reg; 138 int reg = mc->reg;
diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c
index 844cc4a60d66..b8fd284fc0c0 100644
--- a/sound/soc/codecs/wm8991.c
+++ b/sound/soc/codecs/wm8991.c
@@ -154,7 +154,7 @@ static const unsigned int out_sidetone_tlv[] = {
154static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 154static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
155 struct snd_ctl_elem_value *ucontrol) 155 struct snd_ctl_elem_value *ucontrol)
156{ 156{
157 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 157 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
158 int reg = kcontrol->private_value & 0xff; 158 int reg = kcontrol->private_value & 0xff;
159 int ret; 159 int ret;
160 u16 val; 160 u16 val;
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 6303537f54c6..247b39013fba 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -298,7 +298,7 @@ static int wm8994_put_drc_sw(struct snd_kcontrol *kcontrol,
298{ 298{
299 struct soc_mixer_control *mc = 299 struct soc_mixer_control *mc =
300 (struct soc_mixer_control *)kcontrol->private_value; 300 (struct soc_mixer_control *)kcontrol->private_value;
301 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 301 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
302 int mask, ret; 302 int mask, ret;
303 303
304 /* Can't enable both ADC and DAC paths simultaneously */ 304 /* Can't enable both ADC and DAC paths simultaneously */
@@ -355,7 +355,7 @@ static int wm8994_get_drc(const char *name)
355static int wm8994_put_drc_enum(struct snd_kcontrol *kcontrol, 355static int wm8994_put_drc_enum(struct snd_kcontrol *kcontrol,
356 struct snd_ctl_elem_value *ucontrol) 356 struct snd_ctl_elem_value *ucontrol)
357{ 357{
358 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 358 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
359 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 359 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
360 struct wm8994 *control = wm8994->wm8994; 360 struct wm8994 *control = wm8994->wm8994;
361 struct wm8994_pdata *pdata = &control->pdata; 361 struct wm8994_pdata *pdata = &control->pdata;
@@ -378,7 +378,7 @@ static int wm8994_put_drc_enum(struct snd_kcontrol *kcontrol,
378static int wm8994_get_drc_enum(struct snd_kcontrol *kcontrol, 378static int wm8994_get_drc_enum(struct snd_kcontrol *kcontrol,
379 struct snd_ctl_elem_value *ucontrol) 379 struct snd_ctl_elem_value *ucontrol)
380{ 380{
381 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 381 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
382 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 382 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
383 int drc = wm8994_get_drc(kcontrol->id.name); 383 int drc = wm8994_get_drc(kcontrol->id.name);
384 384
@@ -462,7 +462,7 @@ static int wm8994_get_retune_mobile_block(const char *name)
462static int wm8994_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 462static int wm8994_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
463 struct snd_ctl_elem_value *ucontrol) 463 struct snd_ctl_elem_value *ucontrol)
464{ 464{
465 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 465 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
466 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 466 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
467 struct wm8994 *control = wm8994->wm8994; 467 struct wm8994 *control = wm8994->wm8994;
468 struct wm8994_pdata *pdata = &control->pdata; 468 struct wm8994_pdata *pdata = &control->pdata;
@@ -485,7 +485,7 @@ static int wm8994_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
485static int wm8994_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 485static int wm8994_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
486 struct snd_ctl_elem_value *ucontrol) 486 struct snd_ctl_elem_value *ucontrol)
487{ 487{
488 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 488 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
489 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 489 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
490 int block = wm8994_get_retune_mobile_block(kcontrol->id.name); 490 int block = wm8994_get_retune_mobile_block(kcontrol->id.name);
491 491
@@ -1347,10 +1347,10 @@ static const char *adc_mux_text[] = {
1347static SOC_ENUM_SINGLE_VIRT_DECL(adc_enum, adc_mux_text); 1347static SOC_ENUM_SINGLE_VIRT_DECL(adc_enum, adc_mux_text);
1348 1348
1349static const struct snd_kcontrol_new adcl_mux = 1349static const struct snd_kcontrol_new adcl_mux =
1350 SOC_DAPM_ENUM_VIRT("ADCL Mux", adc_enum); 1350 SOC_DAPM_ENUM("ADCL Mux", adc_enum);
1351 1351
1352static const struct snd_kcontrol_new adcr_mux = 1352static const struct snd_kcontrol_new adcr_mux =
1353 SOC_DAPM_ENUM_VIRT("ADCR Mux", adc_enum); 1353 SOC_DAPM_ENUM("ADCR Mux", adc_enum);
1354 1354
1355static const struct snd_kcontrol_new left_speaker_mixer[] = { 1355static const struct snd_kcontrol_new left_speaker_mixer[] = {
1356SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 9, 1, 0), 1356SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 9, 1, 0),
@@ -1651,15 +1651,15 @@ SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0),
1651}; 1651};
1652 1652
1653static const struct snd_soc_dapm_widget wm8994_adc_revd_widgets[] = { 1653static const struct snd_soc_dapm_widget wm8994_adc_revd_widgets[] = {
1654SND_SOC_DAPM_VIRT_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux, 1654SND_SOC_DAPM_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux,
1655 adc_mux_ev, SND_SOC_DAPM_PRE_PMU), 1655 adc_mux_ev, SND_SOC_DAPM_PRE_PMU),
1656SND_SOC_DAPM_VIRT_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux, 1656SND_SOC_DAPM_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux,
1657 adc_mux_ev, SND_SOC_DAPM_PRE_PMU), 1657 adc_mux_ev, SND_SOC_DAPM_PRE_PMU),
1658}; 1658};
1659 1659
1660static const struct snd_soc_dapm_widget wm8994_adc_widgets[] = { 1660static const struct snd_soc_dapm_widget wm8994_adc_widgets[] = {
1661SND_SOC_DAPM_VIRT_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), 1661SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux),
1662SND_SOC_DAPM_VIRT_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), 1662SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux),
1663}; 1663};
1664 1664
1665static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { 1665static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = {
@@ -3999,8 +3999,6 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec)
3999 3999
4000 wm8994->hubs.codec = codec; 4000 wm8994->hubs.codec = codec;
4001 4001
4002 snd_soc_codec_set_cache_io(codec, control->regmap);
4003
4004 mutex_init(&wm8994->accdet_lock); 4002 mutex_init(&wm8994->accdet_lock);
4005 INIT_DELAYED_WORK(&wm8994->jackdet_bootstrap, 4003 INIT_DELAYED_WORK(&wm8994->jackdet_bootstrap,
4006 wm1811_jackdet_bootstrap); 4004 wm1811_jackdet_bootstrap);
@@ -4434,11 +4432,19 @@ static int wm8994_codec_remove(struct snd_soc_codec *codec)
4434 return 0; 4432 return 0;
4435} 4433}
4436 4434
4435static struct regmap *wm8994_get_regmap(struct device *dev)
4436{
4437 struct wm8994 *control = dev_get_drvdata(dev->parent);
4438
4439 return control->regmap;
4440}
4441
4437static struct snd_soc_codec_driver soc_codec_dev_wm8994 = { 4442static struct snd_soc_codec_driver soc_codec_dev_wm8994 = {
4438 .probe = wm8994_codec_probe, 4443 .probe = wm8994_codec_probe,
4439 .remove = wm8994_codec_remove, 4444 .remove = wm8994_codec_remove,
4440 .suspend = wm8994_codec_suspend, 4445 .suspend = wm8994_codec_suspend,
4441 .resume = wm8994_codec_resume, 4446 .resume = wm8994_codec_resume,
4447 .get_regmap = wm8994_get_regmap,
4442 .set_bias_level = wm8994_set_bias_level, 4448 .set_bias_level = wm8994_set_bias_level,
4443}; 4449};
4444 4450
diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c
index d3152cf5bd56..863a2c38bcb5 100644
--- a/sound/soc/codecs/wm8995.c
+++ b/sound/soc/codecs/wm8995.c
@@ -885,10 +885,10 @@ static const char *adc_mux_text[] = {
885static SOC_ENUM_SINGLE_VIRT_DECL(adc_enum, adc_mux_text); 885static SOC_ENUM_SINGLE_VIRT_DECL(adc_enum, adc_mux_text);
886 886
887static const struct snd_kcontrol_new adcl_mux = 887static const struct snd_kcontrol_new adcl_mux =
888 SOC_DAPM_ENUM_VIRT("ADCL Mux", adc_enum); 888 SOC_DAPM_ENUM("ADCL Mux", adc_enum);
889 889
890static const struct snd_kcontrol_new adcr_mux = 890static const struct snd_kcontrol_new adcr_mux =
891 SOC_DAPM_ENUM_VIRT("ADCR Mux", adc_enum); 891 SOC_DAPM_ENUM("ADCR Mux", adc_enum);
892 892
893static const char *spk_src_text[] = { 893static const char *spk_src_text[] = {
894 "DAC1L", "DAC1R", "DAC2L", "DAC2R" 894 "DAC1L", "DAC1R", "DAC2L", "DAC2R"
@@ -948,10 +948,8 @@ static const struct snd_soc_dapm_widget wm8995_dapm_widgets[] = {
948 SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture", 948 SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture",
949 0, WM8995_POWER_MANAGEMENT_3, 10, 0), 949 0, WM8995_POWER_MANAGEMENT_3, 10, 0),
950 950
951 SND_SOC_DAPM_VIRT_MUX("ADCL Mux", SND_SOC_NOPM, 1, 0, 951 SND_SOC_DAPM_MUX("ADCL Mux", SND_SOC_NOPM, 1, 0, &adcl_mux),
952 &adcl_mux), 952 SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0, &adcr_mux),
953 SND_SOC_DAPM_VIRT_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
954 &adcr_mux),
955 953
956 SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8995_POWER_MANAGEMENT_3, 5, 0), 954 SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8995_POWER_MANAGEMENT_3, 5, 0),
957 SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8995_POWER_MANAGEMENT_3, 4, 0), 955 SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8995_POWER_MANAGEMENT_3, 4, 0),
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c
index c6cbb3b8ace9..69266332760e 100644
--- a/sound/soc/codecs/wm8996.c
+++ b/sound/soc/codecs/wm8996.c
@@ -412,7 +412,7 @@ static int wm8996_get_retune_mobile_block(const char *name)
412static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 412static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
413 struct snd_ctl_elem_value *ucontrol) 413 struct snd_ctl_elem_value *ucontrol)
414{ 414{
415 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 415 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
416 struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 416 struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
417 struct wm8996_pdata *pdata = &wm8996->pdata; 417 struct wm8996_pdata *pdata = &wm8996->pdata;
418 int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 418 int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
@@ -434,7 +434,7 @@ static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
434static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 434static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
435 struct snd_ctl_elem_value *ucontrol) 435 struct snd_ctl_elem_value *ucontrol)
436{ 436{
437 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 437 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
438 struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 438 struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
439 int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 439 int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
440 440
diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c
index 004186b6bd48..bb9b47b956aa 100644
--- a/sound/soc/codecs/wm8997.c
+++ b/sound/soc/codecs/wm8997.c
@@ -245,8 +245,8 @@ SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1),
245SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), 245SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1),
246SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), 246SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1),
247 247
248SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), 248SOC_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]),
249SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), 249SOC_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]),
250 250
251ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), 251ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE),
252ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), 252ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE),
@@ -286,8 +286,8 @@ SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L,
286 ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, 286 ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT,
287 0xbf, 0, digital_tlv), 287 0xbf, 0, digital_tlv),
288 288
289SOC_VALUE_ENUM("HPOUT1 OSR", wm8997_hpout_osr[0]), 289SOC_ENUM("HPOUT1 OSR", wm8997_hpout_osr[0]),
290SOC_VALUE_ENUM("EPOUT OSR", wm8997_hpout_osr[1]), 290SOC_ENUM("EPOUT OSR", wm8997_hpout_osr[1]),
291 291
292SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), 292SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp),
293SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), 293SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp),
@@ -405,7 +405,7 @@ static const struct soc_enum wm8997_aec_loopback =
405 wm8997_aec_loopback_values); 405 wm8997_aec_loopback_values);
406 406
407static const struct snd_kcontrol_new wm8997_aec_loopback_mux = 407static const struct snd_kcontrol_new wm8997_aec_loopback_mux =
408 SOC_DAPM_VALUE_ENUM("AEC Loopback", wm8997_aec_loopback); 408 SOC_DAPM_ENUM("AEC Loopback", wm8997_aec_loopback);
409 409
410static const struct snd_soc_dapm_widget wm8997_dapm_widgets[] = { 410static const struct snd_soc_dapm_widget wm8997_dapm_widgets[] = {
411SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 411SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
@@ -604,7 +604,7 @@ SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0,
604 ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, 604 ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE,
605 ARIZONA_SLIMRX8_ENA_SHIFT, 0), 605 ARIZONA_SLIMRX8_ENA_SHIFT, 0),
606 606
607SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, 607SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1,
608 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, 608 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0,
609 &wm8997_aec_loopback_mux), 609 &wm8997_aec_loopback_mux),
610 610
@@ -1051,11 +1051,6 @@ static struct snd_soc_dai_driver wm8997_dai[] = {
1051static int wm8997_codec_probe(struct snd_soc_codec *codec) 1051static int wm8997_codec_probe(struct snd_soc_codec *codec)
1052{ 1052{
1053 struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec); 1053 struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec);
1054 int ret;
1055
1056 ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
1057 if (ret != 0)
1058 return ret;
1059 1054
1060 arizona_init_spk(codec); 1055 arizona_init_spk(codec);
1061 1056
@@ -1086,9 +1081,17 @@ static unsigned int wm8997_digital_vu[] = {
1086 ARIZONA_DAC_DIGITAL_VOLUME_5R, 1081 ARIZONA_DAC_DIGITAL_VOLUME_5R,
1087}; 1082};
1088 1083
1084static struct regmap *wm8997_get_regmap(struct device *dev)
1085{
1086 struct wm8997_priv *priv = dev_get_drvdata(dev);
1087
1088 return priv->core.arizona->regmap;
1089}
1090
1089static struct snd_soc_codec_driver soc_codec_dev_wm8997 = { 1091static struct snd_soc_codec_driver soc_codec_dev_wm8997 = {
1090 .probe = wm8997_codec_probe, 1092 .probe = wm8997_codec_probe,
1091 .remove = wm8997_codec_remove, 1093 .remove = wm8997_codec_remove,
1094 .get_regmap = wm8997_get_regmap,
1092 1095
1093 .idle_bias_off = true, 1096 .idle_bias_off = true,
1094 1097
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index d18eff31fbbc..185eb97769e7 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -340,7 +340,7 @@ static SOC_ENUM_SINGLE_DECL(speaker_mode, WM9081_ANALOGUE_SPEAKER_2, 6,
340static int speaker_mode_get(struct snd_kcontrol *kcontrol, 340static int speaker_mode_get(struct snd_kcontrol *kcontrol,
341 struct snd_ctl_elem_value *ucontrol) 341 struct snd_ctl_elem_value *ucontrol)
342{ 342{
343 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 343 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
344 unsigned int reg; 344 unsigned int reg;
345 345
346 reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); 346 reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2);
@@ -361,7 +361,7 @@ static int speaker_mode_get(struct snd_kcontrol *kcontrol,
361static int speaker_mode_put(struct snd_kcontrol *kcontrol, 361static int speaker_mode_put(struct snd_kcontrol *kcontrol,
362 struct snd_ctl_elem_value *ucontrol) 362 struct snd_ctl_elem_value *ucontrol)
363{ 363{
364 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 364 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
365 unsigned int reg_pwr = snd_soc_read(codec, WM9081_POWER_MANAGEMENT); 365 unsigned int reg_pwr = snd_soc_read(codec, WM9081_POWER_MANAGEMENT);
366 unsigned int reg2 = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); 366 unsigned int reg2 = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2);
367 367
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index bb5f7b4e3ebb..060027182dcb 100644
--- a/sound/soc/codecs/wm_adsp.c
+++ b/sound/soc/codecs/wm_adsp.c
@@ -242,7 +242,7 @@ struct wm_coeff_ctl {
242static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, 242static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
243 struct snd_ctl_elem_value *ucontrol) 243 struct snd_ctl_elem_value *ucontrol)
244{ 244{
245 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 245 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
246 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 246 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
247 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 247 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
248 248
@@ -254,7 +254,7 @@ static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
254static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, 254static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
255 struct snd_ctl_elem_value *ucontrol) 255 struct snd_ctl_elem_value *ucontrol)
256{ 256{
257 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 257 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
258 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 258 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
259 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 259 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
260 260
@@ -1543,16 +1543,16 @@ static void wm_adsp2_boot_work(struct work_struct *work)
1543 ret = regmap_read(dsp->regmap, 1543 ret = regmap_read(dsp->regmap,
1544 dsp->base + ADSP2_CLOCKING, &val); 1544 dsp->base + ADSP2_CLOCKING, &val);
1545 if (ret != 0) { 1545 if (ret != 0) {
1546 dev_err(dsp->dev, "Failed to read clocking: %d\n", ret); 1546 adsp_err(dsp, "Failed to read clocking: %d\n", ret);
1547 return; 1547 return;
1548 } 1548 }
1549 1549
1550 if ((val & ADSP2_CLK_SEL_MASK) >= 3) { 1550 if ((val & ADSP2_CLK_SEL_MASK) >= 3) {
1551 ret = regulator_enable(dsp->dvfs); 1551 ret = regulator_enable(dsp->dvfs);
1552 if (ret != 0) { 1552 if (ret != 0) {
1553 dev_err(dsp->dev, 1553 adsp_err(dsp,
1554 "Failed to enable supply: %d\n", 1554 "Failed to enable supply: %d\n",
1555 ret); 1555 ret);
1556 return; 1556 return;
1557 } 1557 }
1558 1558
@@ -1560,9 +1560,9 @@ static void wm_adsp2_boot_work(struct work_struct *work)
1560 1800000, 1560 1800000,
1561 1800000); 1561 1800000);
1562 if (ret != 0) { 1562 if (ret != 0) {
1563 dev_err(dsp->dev, 1563 adsp_err(dsp,
1564 "Failed to raise supply: %d\n", 1564 "Failed to raise supply: %d\n",
1565 ret); 1565 ret);
1566 return; 1566 return;
1567 } 1567 }
1568 } 1568 }
@@ -1625,7 +1625,7 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
1625 break; 1625 break;
1626 default: 1626 default:
1627 break; 1627 break;
1628 }; 1628 }
1629 1629
1630 return 0; 1630 return 0;
1631} 1631}
@@ -1672,15 +1672,15 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,
1672 ret = regulator_set_voltage(dsp->dvfs, 1200000, 1672 ret = regulator_set_voltage(dsp->dvfs, 1200000,
1673 1800000); 1673 1800000);
1674 if (ret != 0) 1674 if (ret != 0)
1675 dev_warn(dsp->dev, 1675 adsp_warn(dsp,
1676 "Failed to lower supply: %d\n", 1676 "Failed to lower supply: %d\n",
1677 ret); 1677 ret);
1678 1678
1679 ret = regulator_disable(dsp->dvfs); 1679 ret = regulator_disable(dsp->dvfs);
1680 if (ret != 0) 1680 if (ret != 0)
1681 dev_err(dsp->dev, 1681 adsp_err(dsp,
1682 "Failed to enable supply: %d\n", 1682 "Failed to enable supply: %d\n",
1683 ret); 1683 ret);
1684 } 1684 }
1685 1685
1686 list_for_each_entry(ctl, &dsp->ctl_list, list) 1686 list_for_each_entry(ctl, &dsp->ctl_list, list)
@@ -1732,28 +1732,25 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs)
1732 adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); 1732 adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD");
1733 if (IS_ERR(adsp->dvfs)) { 1733 if (IS_ERR(adsp->dvfs)) {
1734 ret = PTR_ERR(adsp->dvfs); 1734 ret = PTR_ERR(adsp->dvfs);
1735 dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); 1735 adsp_err(adsp, "Failed to get DCVDD: %d\n", ret);
1736 return ret; 1736 return ret;
1737 } 1737 }
1738 1738
1739 ret = regulator_enable(adsp->dvfs); 1739 ret = regulator_enable(adsp->dvfs);
1740 if (ret != 0) { 1740 if (ret != 0) {
1741 dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", 1741 adsp_err(adsp, "Failed to enable DCVDD: %d\n", ret);
1742 ret);
1743 return ret; 1742 return ret;
1744 } 1743 }
1745 1744
1746 ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); 1745 ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000);
1747 if (ret != 0) { 1746 if (ret != 0) {
1748 dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", 1747 adsp_err(adsp, "Failed to initialise DVFS: %d\n", ret);
1749 ret);
1750 return ret; 1748 return ret;
1751 } 1749 }
1752 1750
1753 ret = regulator_disable(adsp->dvfs); 1751 ret = regulator_disable(adsp->dvfs);
1754 if (ret != 0) { 1752 if (ret != 0) {
1755 dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", 1753 adsp_err(adsp, "Failed to disable DCVDD: %d\n", ret);
1756 ret);
1757 return ret; 1754 return ret;
1758 } 1755 }
1759 } 1756 }
diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c
index b6209662ab13..916817fe6632 100644
--- a/sound/soc/codecs/wm_hubs.c
+++ b/sound/soc/codecs/wm_hubs.c
@@ -337,7 +337,7 @@ static void enable_dc_servo(struct snd_soc_codec *codec)
337static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, 337static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
338 struct snd_ctl_elem_value *ucontrol) 338 struct snd_ctl_elem_value *ucontrol)
339{ 339{
340 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 340 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
341 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 341 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
342 int ret; 342 int ret;
343 343
diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig
index a8ec1fc3e4d0..50a098749b9e 100644
--- a/sound/soc/davinci/Kconfig
+++ b/sound/soc/davinci/Kconfig
@@ -18,7 +18,7 @@ config SND_DAVINCI_SOC_GENERIC_EVM
18 18
19config SND_AM33XX_SOC_EVM 19config SND_AM33XX_SOC_EVM
20 tristate "SoC Audio for the AM33XX chip based boards" 20 tristate "SoC Audio for the AM33XX chip based boards"
21 depends on SND_DAVINCI_SOC && SOC_AM33XX 21 depends on SND_DAVINCI_SOC && SOC_AM33XX && I2C
22 select SND_DAVINCI_SOC_GENERIC_EVM 22 select SND_DAVINCI_SOC_GENERIC_EVM
23 help 23 help
24 Say Y or M if you want to add support for SoC audio on AM33XX 24 Say Y or M if you want to add support for SoC audio on AM33XX
@@ -28,7 +28,7 @@ config SND_AM33XX_SOC_EVM
28 28
29config SND_DAVINCI_SOC_EVM 29config SND_DAVINCI_SOC_EVM
30 tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM" 30 tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM"
31 depends on SND_DAVINCI_SOC 31 depends on SND_DAVINCI_SOC && I2C
32 depends on MACH_DAVINCI_EVM || MACH_DAVINCI_DM355_EVM || MACH_DAVINCI_DM365_EVM 32 depends on MACH_DAVINCI_EVM || MACH_DAVINCI_DM355_EVM || MACH_DAVINCI_DM365_EVM
33 select SND_DAVINCI_SOC_GENERIC_EVM 33 select SND_DAVINCI_SOC_GENERIC_EVM
34 help 34 help
@@ -56,7 +56,7 @@ endchoice
56 56
57config SND_DM6467_SOC_EVM 57config SND_DM6467_SOC_EVM
58 tristate "SoC Audio support for DaVinci DM6467 EVM" 58 tristate "SoC Audio support for DaVinci DM6467 EVM"
59 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM 59 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM && I2C
60 select SND_DAVINCI_SOC_GENERIC_EVM 60 select SND_DAVINCI_SOC_GENERIC_EVM
61 select SND_SOC_SPDIF 61 select SND_SOC_SPDIF
62 62
@@ -65,7 +65,7 @@ config SND_DM6467_SOC_EVM
65 65
66config SND_DA830_SOC_EVM 66config SND_DA830_SOC_EVM
67 tristate "SoC Audio support for DA830/OMAP-L137 EVM" 67 tristate "SoC Audio support for DA830/OMAP-L137 EVM"
68 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA830_EVM 68 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA830_EVM && I2C
69 select SND_DAVINCI_SOC_GENERIC_EVM 69 select SND_DAVINCI_SOC_GENERIC_EVM
70 70
71 help 71 help
@@ -74,7 +74,7 @@ config SND_DA830_SOC_EVM
74 74
75config SND_DA850_SOC_EVM 75config SND_DA850_SOC_EVM
76 tristate "SoC Audio support for DA850/OMAP-L138 EVM" 76 tristate "SoC Audio support for DA850/OMAP-L138 EVM"
77 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM 77 depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM && I2C
78 select SND_DAVINCI_SOC_GENERIC_EVM 78 select SND_DAVINCI_SOC_GENERIC_EVM
79 help 79 help
80 Say Y if you want to add support for SoC audio on TI 80 Say Y if you want to add support for SoC audio on TI
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index cab98a580053..a50010e2891f 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -38,7 +38,7 @@ struct snd_soc_card_drvdata_davinci {
38static int evm_startup(struct snd_pcm_substream *substream) 38static int evm_startup(struct snd_pcm_substream *substream)
39{ 39{
40 struct snd_soc_pcm_runtime *rtd = substream->private_data; 40 struct snd_soc_pcm_runtime *rtd = substream->private_data;
41 struct snd_soc_card *soc_card = rtd->codec->card; 41 struct snd_soc_card *soc_card = rtd->card;
42 struct snd_soc_card_drvdata_davinci *drvdata = 42 struct snd_soc_card_drvdata_davinci *drvdata =
43 snd_soc_card_get_drvdata(soc_card); 43 snd_soc_card_get_drvdata(soc_card);
44 44
@@ -51,7 +51,7 @@ static int evm_startup(struct snd_pcm_substream *substream)
51static void evm_shutdown(struct snd_pcm_substream *substream) 51static void evm_shutdown(struct snd_pcm_substream *substream)
52{ 52{
53 struct snd_soc_pcm_runtime *rtd = substream->private_data; 53 struct snd_soc_pcm_runtime *rtd = substream->private_data;
54 struct snd_soc_card *soc_card = rtd->codec->card; 54 struct snd_soc_card *soc_card = rtd->card;
55 struct snd_soc_card_drvdata_davinci *drvdata = 55 struct snd_soc_card_drvdata_davinci *drvdata =
56 snd_soc_card_get_drvdata(soc_card); 56 snd_soc_card_get_drvdata(soc_card);
57 57
@@ -65,8 +65,7 @@ static int evm_hw_params(struct snd_pcm_substream *substream,
65 struct snd_soc_pcm_runtime *rtd = substream->private_data; 65 struct snd_soc_pcm_runtime *rtd = substream->private_data;
66 struct snd_soc_dai *codec_dai = rtd->codec_dai; 66 struct snd_soc_dai *codec_dai = rtd->codec_dai;
67 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 67 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
68 struct snd_soc_codec *codec = rtd->codec; 68 struct snd_soc_card *soc_card = rtd->card;
69 struct snd_soc_card *soc_card = codec->card;
70 int ret = 0; 69 int ret = 0;
71 unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) 70 unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
72 snd_soc_card_get_drvdata(soc_card))->sysclk; 71 snd_soc_card_get_drvdata(soc_card))->sysclk;
@@ -125,7 +124,7 @@ static int evm_aic3x_init(struct snd_soc_pcm_runtime *rtd)
125{ 124{
126 struct snd_soc_card *card = rtd->card; 125 struct snd_soc_card *card = rtd->card;
127 struct snd_soc_codec *codec = rtd->codec; 126 struct snd_soc_codec *codec = rtd->codec;
128 struct device_node *np = codec->card->dev->of_node; 127 struct device_node *np = card->dev->of_node;
129 int ret; 128 int ret;
130 129
131 /* Add davinci-evm specific widgets */ 130 /* Add davinci-evm specific widgets */
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index ebe82947bab3..7682af31d6e6 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -757,7 +757,6 @@ static int davinci_i2s_remove(struct platform_device *pdev)
757 struct davinci_mcbsp_dev *dev = dev_get_drvdata(&pdev->dev); 757 struct davinci_mcbsp_dev *dev = dev_get_drvdata(&pdev->dev);
758 758
759 snd_soc_unregister_component(&pdev->dev); 759 snd_soc_unregister_component(&pdev->dev);
760 davinci_soc_platform_unregister(&pdev->dev);
761 760
762 clk_disable(dev->clk); 761 clk_disable(dev->clk);
763 clk_put(dev->clk); 762 clk_put(dev->clk);
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 4f75cac462d1..9afb14629a17 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -33,10 +33,13 @@
33#include <sound/initval.h> 33#include <sound/initval.h>
34#include <sound/soc.h> 34#include <sound/soc.h>
35#include <sound/dmaengine_pcm.h> 35#include <sound/dmaengine_pcm.h>
36#include <sound/omap-pcm.h>
36 37
37#include "davinci-pcm.h" 38#include "davinci-pcm.h"
38#include "davinci-mcasp.h" 39#include "davinci-mcasp.h"
39 40
41#define MCASP_MAX_AFIFO_DEPTH 64
42
40struct davinci_mcasp_context { 43struct davinci_mcasp_context {
41 u32 txfmtctl; 44 u32 txfmtctl;
42 u32 rxfmtctl; 45 u32 rxfmtctl;
@@ -269,25 +272,51 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
269{ 272{
270 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); 273 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
271 int ret = 0; 274 int ret = 0;
275 u32 data_delay;
276 bool fs_pol_rising;
277 bool inv_fs = false;
272 278
273 pm_runtime_get_sync(mcasp->dev); 279 pm_runtime_get_sync(mcasp->dev);
274 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 280 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
281 case SND_SOC_DAIFMT_DSP_A:
282 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
283 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
284 /* 1st data bit occur one ACLK cycle after the frame sync */
285 data_delay = 1;
286 break;
275 case SND_SOC_DAIFMT_DSP_B: 287 case SND_SOC_DAIFMT_DSP_B:
276 case SND_SOC_DAIFMT_AC97: 288 case SND_SOC_DAIFMT_AC97:
277 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); 289 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
278 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); 290 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
291 /* No delay after FS */
292 data_delay = 0;
279 break; 293 break;
280 default: 294 case SND_SOC_DAIFMT_I2S:
281 /* configure a full-word SYNC pulse (LRCLK) */ 295 /* configure a full-word SYNC pulse (LRCLK) */
282 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); 296 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
283 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); 297 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
284 298 /* 1st data bit occur one ACLK cycle after the frame sync */
285 /* make 1st data bit occur one ACLK cycle after the frame sync */ 299 data_delay = 1;
286 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); 300 /* FS need to be inverted */
287 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); 301 inv_fs = true;
288 break; 302 break;
303 case SND_SOC_DAIFMT_LEFT_J:
304 /* configure a full-word SYNC pulse (LRCLK) */
305 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
306 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
307 /* No delay after FS */
308 data_delay = 0;
309 break;
310 default:
311 ret = -EINVAL;
312 goto out;
289 } 313 }
290 314
315 mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(data_delay),
316 FSXDLY(3));
317 mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(data_delay),
318 FSRDLY(3));
319
291 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 320 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
292 case SND_SOC_DAIFMT_CBS_CFS: 321 case SND_SOC_DAIFMT_CBS_CFS:
293 /* codec is clock and frame slave */ 322 /* codec is clock and frame slave */
@@ -325,7 +354,6 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
325 ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); 354 ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR);
326 mcasp->bclk_master = 0; 355 mcasp->bclk_master = 0;
327 break; 356 break;
328
329 default: 357 default:
330 ret = -EINVAL; 358 ret = -EINVAL;
331 goto out; 359 goto out;
@@ -334,39 +362,38 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
334 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 362 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
335 case SND_SOC_DAIFMT_IB_NF: 363 case SND_SOC_DAIFMT_IB_NF:
336 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); 364 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
337 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
338
339 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); 365 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
340 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); 366 fs_pol_rising = true;
341 break; 367 break;
342
343 case SND_SOC_DAIFMT_NB_IF: 368 case SND_SOC_DAIFMT_NB_IF:
344 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); 369 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
345 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
346
347 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); 370 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
348 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); 371 fs_pol_rising = false;
349 break; 372 break;
350
351 case SND_SOC_DAIFMT_IB_IF: 373 case SND_SOC_DAIFMT_IB_IF:
352 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); 374 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
353 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
354
355 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); 375 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
356 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); 376 fs_pol_rising = false;
357 break; 377 break;
358
359 case SND_SOC_DAIFMT_NB_NF: 378 case SND_SOC_DAIFMT_NB_NF:
360 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); 379 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
361 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
362
363 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); 380 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
364 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); 381 fs_pol_rising = true;
365 break; 382 break;
366
367 default: 383 default:
368 ret = -EINVAL; 384 ret = -EINVAL;
369 break; 385 goto out;
386 }
387
388 if (inv_fs)
389 fs_pol_rising = !fs_pol_rising;
390
391 if (fs_pol_rising) {
392 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
393 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
394 } else {
395 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
396 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
370 } 397 }
371out: 398out:
372 pm_runtime_put_sync(mcasp->dev); 399 pm_runtime_put_sync(mcasp->dev);
@@ -464,17 +491,19 @@ static int davinci_config_channel_size(struct davinci_mcasp *mcasp,
464} 491}
465 492
466static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, 493static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
467 int channels) 494 int period_words, int channels)
468{ 495{
496 struct davinci_pcm_dma_params *dma_params = &mcasp->dma_params[stream];
497 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream];
469 int i; 498 int i;
470 u8 tx_ser = 0; 499 u8 tx_ser = 0;
471 u8 rx_ser = 0; 500 u8 rx_ser = 0;
472 u8 ser;
473 u8 slots = mcasp->tdm_slots; 501 u8 slots = mcasp->tdm_slots;
474 u8 max_active_serializers = (channels + slots - 1) / slots; 502 u8 max_active_serializers = (channels + slots - 1) / slots;
503 int active_serializers, numevt, n;
475 u32 reg; 504 u32 reg;
476 /* Default configuration */ 505 /* Default configuration */
477 if (mcasp->version != MCASP_VERSION_4) 506 if (mcasp->version < MCASP_VERSION_3)
478 mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); 507 mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT);
479 508
480 /* All PINS as McASP */ 509 /* All PINS as McASP */
@@ -505,37 +534,71 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
505 } 534 }
506 } 535 }
507 536
508 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 537 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
509 ser = tx_ser; 538 active_serializers = tx_ser;
510 else 539 numevt = mcasp->txnumevt;
511 ser = rx_ser; 540 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
541 } else {
542 active_serializers = rx_ser;
543 numevt = mcasp->rxnumevt;
544 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
545 }
512 546
513 if (ser < max_active_serializers) { 547 if (active_serializers < max_active_serializers) {
514 dev_warn(mcasp->dev, "stream has more channels (%d) than are " 548 dev_warn(mcasp->dev, "stream has more channels (%d) than are "
515 "enabled in mcasp (%d)\n", channels, ser * slots); 549 "enabled in mcasp (%d)\n", channels,
550 active_serializers * slots);
516 return -EINVAL; 551 return -EINVAL;
517 } 552 }
518 553
519 if (mcasp->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { 554 /* AFIFO is not in use */
520 if (mcasp->txnumevt * tx_ser > 64) 555 if (!numevt) {
521 mcasp->txnumevt = 1; 556 /* Configure the burst size for platform drivers */
522 557 if (active_serializers > 1) {
523 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; 558 /*
524 mcasp_mod_bits(mcasp, reg, tx_ser, NUMDMA_MASK); 559 * If more than one serializers are in use we have one
525 mcasp_mod_bits(mcasp, reg, ((mcasp->txnumevt * tx_ser) << 8), 560 * DMA request to provide data for all serializers.
526 NUMEVT_MASK); 561 * For example if three serializers are enabled the DMA
562 * need to transfer three words per DMA request.
563 */
564 dma_params->fifo_level = active_serializers;
565 dma_data->maxburst = active_serializers;
566 } else {
567 dma_params->fifo_level = 0;
568 dma_data->maxburst = 0;
569 }
570 return 0;
527 } 571 }
528 572
529 if (mcasp->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { 573 if (period_words % active_serializers) {
530 if (mcasp->rxnumevt * rx_ser > 64) 574 dev_err(mcasp->dev, "Invalid combination of period words and "
531 mcasp->rxnumevt = 1; 575 "active serializers: %d, %d\n", period_words,
532 576 active_serializers);
533 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; 577 return -EINVAL;
534 mcasp_mod_bits(mcasp, reg, rx_ser, NUMDMA_MASK);
535 mcasp_mod_bits(mcasp, reg, ((mcasp->rxnumevt * rx_ser) << 8),
536 NUMEVT_MASK);
537 } 578 }
538 579
580 /*
581 * Calculate the optimal AFIFO depth for platform side:
582 * The number of words for numevt need to be in steps of active
583 * serializers.
584 */
585 n = numevt % active_serializers;
586 if (n)
587 numevt += (active_serializers - n);
588 while (period_words % numevt && numevt > 0)
589 numevt -= active_serializers;
590 if (numevt <= 0)
591 numevt = active_serializers;
592
593 mcasp_mod_bits(mcasp, reg, active_serializers, NUMDMA_MASK);
594 mcasp_mod_bits(mcasp, reg, NUMEVT(numevt), NUMEVT_MASK);
595
596 /* Configure the burst size for platform drivers */
597 if (numevt == 1)
598 numevt = 0;
599 dma_params->fifo_level = numevt;
600 dma_data->maxburst = numevt;
601
539 return 0; 602 return 0;
540} 603}
541 604
@@ -607,27 +670,24 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
607 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); 670 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
608 struct davinci_pcm_dma_params *dma_params = 671 struct davinci_pcm_dma_params *dma_params =
609 &mcasp->dma_params[substream->stream]; 672 &mcasp->dma_params[substream->stream];
610 struct snd_dmaengine_dai_dma_data *dma_data =
611 &mcasp->dma_data[substream->stream];
612 int word_length; 673 int word_length;
613 u8 fifo_level;
614 u8 slots = mcasp->tdm_slots;
615 u8 active_serializers;
616 int channels = params_channels(params); 674 int channels = params_channels(params);
675 int period_size = params_period_size(params);
617 int ret; 676 int ret;
618 677
619 /* If mcasp is BCLK master we need to set BCLK divider */ 678 /* If mcasp is BCLK master we need to set BCLK divider */
620 if (mcasp->bclk_master) { 679 if (mcasp->bclk_master) {
621 unsigned int bclk_freq = snd_soc_params_to_bclk(params); 680 unsigned int bclk_freq = snd_soc_params_to_bclk(params);
622 if (mcasp->sysclk_freq % bclk_freq != 0) { 681 if (mcasp->sysclk_freq % bclk_freq != 0) {
623 dev_err(mcasp->dev, "Can't produce requred BCLK\n"); 682 dev_err(mcasp->dev, "Can't produce required BCLK\n");
624 return -EINVAL; 683 return -EINVAL;
625 } 684 }
626 davinci_mcasp_set_clkdiv( 685 davinci_mcasp_set_clkdiv(
627 cpu_dai, 1, mcasp->sysclk_freq / bclk_freq); 686 cpu_dai, 1, mcasp->sysclk_freq / bclk_freq);
628 } 687 }
629 688
630 ret = mcasp_common_hw_param(mcasp, substream->stream, channels); 689 ret = mcasp_common_hw_param(mcasp, substream->stream,
690 period_size * channels, channels);
631 if (ret) 691 if (ret)
632 return ret; 692 return ret;
633 693
@@ -671,21 +731,11 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
671 return -EINVAL; 731 return -EINVAL;
672 } 732 }
673 733
674 /* Calculate FIFO level */ 734 if (mcasp->version == MCASP_VERSION_2 && !dma_params->fifo_level)
675 active_serializers = (channels + slots - 1) / slots;
676 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
677 fifo_level = mcasp->txnumevt * active_serializers;
678 else
679 fifo_level = mcasp->rxnumevt * active_serializers;
680
681 if (mcasp->version == MCASP_VERSION_2 && !fifo_level)
682 dma_params->acnt = 4; 735 dma_params->acnt = 4;
683 else 736 else
684 dma_params->acnt = dma_params->data_type; 737 dma_params->acnt = dma_params->data_type;
685 738
686 dma_params->fifo_level = fifo_level;
687 dma_data->maxburst = fifo_level;
688
689 davinci_config_channel_size(mcasp, word_length); 739 davinci_config_channel_size(mcasp, word_length);
690 740
691 return 0; 741 return 0;
@@ -716,22 +766,7 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream,
716 return ret; 766 return ret;
717} 767}
718 768
719static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
720 struct snd_soc_dai *dai)
721{
722 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
723
724 if (mcasp->version == MCASP_VERSION_4)
725 snd_soc_dai_set_dma_data(dai, substream,
726 &mcasp->dma_data[substream->stream]);
727 else
728 snd_soc_dai_set_dma_data(dai, substream, mcasp->dma_params);
729
730 return 0;
731}
732
733static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { 769static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = {
734 .startup = davinci_mcasp_startup,
735 .trigger = davinci_mcasp_trigger, 770 .trigger = davinci_mcasp_trigger,
736 .hw_params = davinci_mcasp_hw_params, 771 .hw_params = davinci_mcasp_hw_params,
737 .set_fmt = davinci_mcasp_set_dai_fmt, 772 .set_fmt = davinci_mcasp_set_dai_fmt,
@@ -739,6 +774,25 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = {
739 .set_sysclk = davinci_mcasp_set_sysclk, 774 .set_sysclk = davinci_mcasp_set_sysclk,
740}; 775};
741 776
777static int davinci_mcasp_dai_probe(struct snd_soc_dai *dai)
778{
779 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
780
781 if (mcasp->version == MCASP_VERSION_4) {
782 /* Using dmaengine PCM */
783 dai->playback_dma_data =
784 &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
785 dai->capture_dma_data =
786 &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
787 } else {
788 /* Using davinci-pcm */
789 dai->playback_dma_data = mcasp->dma_params;
790 dai->capture_dma_data = mcasp->dma_params;
791 }
792
793 return 0;
794}
795
742#ifdef CONFIG_PM_SLEEP 796#ifdef CONFIG_PM_SLEEP
743static int davinci_mcasp_suspend(struct snd_soc_dai *dai) 797static int davinci_mcasp_suspend(struct snd_soc_dai *dai)
744{ 798{
@@ -792,6 +846,7 @@ static int davinci_mcasp_resume(struct snd_soc_dai *dai)
792static struct snd_soc_dai_driver davinci_mcasp_dai[] = { 846static struct snd_soc_dai_driver davinci_mcasp_dai[] = {
793 { 847 {
794 .name = "davinci-mcasp.0", 848 .name = "davinci-mcasp.0",
849 .probe = davinci_mcasp_dai_probe,
795 .suspend = davinci_mcasp_suspend, 850 .suspend = davinci_mcasp_suspend,
796 .resume = davinci_mcasp_resume, 851 .resume = davinci_mcasp_resume,
797 .playback = { 852 .playback = {
@@ -811,6 +866,7 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = {
811 }, 866 },
812 { 867 {
813 .name = "davinci-mcasp.1", 868 .name = "davinci-mcasp.1",
869 .probe = davinci_mcasp_dai_probe,
814 .playback = { 870 .playback = {
815 .channels_min = 1, 871 .channels_min = 1,
816 .channels_max = 384, 872 .channels_max = 384,
@@ -1078,7 +1134,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1078 if (!mcasp->base) { 1134 if (!mcasp->base) {
1079 dev_err(&pdev->dev, "ioremap failed\n"); 1135 dev_err(&pdev->dev, "ioremap failed\n");
1080 ret = -ENOMEM; 1136 ret = -ENOMEM;
1081 goto err_release_clk; 1137 goto err;
1082 } 1138 }
1083 1139
1084 mcasp->op_mode = pdata->op_mode; 1140 mcasp->op_mode = pdata->op_mode;
@@ -1159,25 +1215,37 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1159 1215
1160 mcasp_reparent_fck(pdev); 1216 mcasp_reparent_fck(pdev);
1161 1217
1162 ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, 1218 ret = devm_snd_soc_register_component(&pdev->dev,
1163 &davinci_mcasp_dai[pdata->op_mode], 1); 1219 &davinci_mcasp_component,
1220 &davinci_mcasp_dai[pdata->op_mode], 1);
1164 1221
1165 if (ret != 0) 1222 if (ret != 0)
1166 goto err_release_clk; 1223 goto err;
1167 1224
1168 if (mcasp->version != MCASP_VERSION_4) { 1225 switch (mcasp->version) {
1226 case MCASP_VERSION_1:
1227 case MCASP_VERSION_2:
1228 case MCASP_VERSION_3:
1169 ret = davinci_soc_platform_register(&pdev->dev); 1229 ret = davinci_soc_platform_register(&pdev->dev);
1170 if (ret) { 1230 break;
1171 dev_err(&pdev->dev, "register PCM failed: %d\n", ret); 1231 case MCASP_VERSION_4:
1172 goto err_unregister_component; 1232 ret = omap_pcm_platform_register(&pdev->dev);
1173 } 1233 break;
1234 default:
1235 dev_err(&pdev->dev, "Invalid McASP version: %d\n",
1236 mcasp->version);
1237 ret = -EINVAL;
1238 break;
1239 }
1240
1241 if (ret) {
1242 dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
1243 goto err;
1174 } 1244 }
1175 1245
1176 return 0; 1246 return 0;
1177 1247
1178err_unregister_component: 1248err:
1179 snd_soc_unregister_component(&pdev->dev);
1180err_release_clk:
1181 pm_runtime_put_sync(&pdev->dev); 1249 pm_runtime_put_sync(&pdev->dev);
1182 pm_runtime_disable(&pdev->dev); 1250 pm_runtime_disable(&pdev->dev);
1183 return ret; 1251 return ret;
@@ -1185,12 +1253,6 @@ err_release_clk:
1185 1253
1186static int davinci_mcasp_remove(struct platform_device *pdev) 1254static int davinci_mcasp_remove(struct platform_device *pdev)
1187{ 1255{
1188 struct davinci_mcasp *mcasp = dev_get_drvdata(&pdev->dev);
1189
1190 snd_soc_unregister_component(&pdev->dev);
1191 if (mcasp->version != MCASP_VERSION_4)
1192 davinci_soc_platform_unregister(&pdev->dev);
1193
1194 pm_runtime_put_sync(&pdev->dev); 1256 pm_runtime_put_sync(&pdev->dev);
1195 pm_runtime_disable(&pdev->dev); 1257 pm_runtime_disable(&pdev->dev);
1196 1258
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h
index 8fed757d6087..98fbc451892a 100644
--- a/sound/soc/davinci/davinci-mcasp.h
+++ b/sound/soc/davinci/davinci-mcasp.h
@@ -283,6 +283,7 @@
283 */ 283 */
284#define FIFO_ENABLE BIT(16) 284#define FIFO_ENABLE BIT(16)
285#define NUMEVT_MASK (0xFF << 8) 285#define NUMEVT_MASK (0xFF << 8)
286#define NUMEVT(x) (((x) & 0xFF) << 8)
286#define NUMDMA_MASK (0xFF) 287#define NUMDMA_MASK (0xFF)
287 288
288#endif /* DAVINCI_MCASP_H */ 289#endif /* DAVINCI_MCASP_H */
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index 14145cdf8a11..7809e9d935fc 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -852,16 +852,10 @@ static struct snd_soc_platform_driver davinci_soc_platform = {
852 852
853int davinci_soc_platform_register(struct device *dev) 853int davinci_soc_platform_register(struct device *dev)
854{ 854{
855 return snd_soc_register_platform(dev, &davinci_soc_platform); 855 return devm_snd_soc_register_platform(dev, &davinci_soc_platform);
856} 856}
857EXPORT_SYMBOL_GPL(davinci_soc_platform_register); 857EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
858 858
859void davinci_soc_platform_unregister(struct device *dev)
860{
861 snd_soc_unregister_platform(dev);
862}
863EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
864
865MODULE_AUTHOR("Vladimir Barinov"); 859MODULE_AUTHOR("Vladimir Barinov");
866MODULE_DESCRIPTION("TI DAVINCI PCM DMA module"); 860MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
867MODULE_LICENSE("GPL"); 861MODULE_LICENSE("GPL");
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index fbb710c76c08..0fe2346a9aa2 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -29,7 +29,13 @@ struct davinci_pcm_dma_params {
29 unsigned int fifo_level; 29 unsigned int fifo_level;
30}; 30};
31 31
32#if IS_ENABLED(CONFIG_SND_DAVINCI_SOC)
32int davinci_soc_platform_register(struct device *dev); 33int davinci_soc_platform_register(struct device *dev);
33void davinci_soc_platform_unregister(struct device *dev); 34#else
35static inline int davinci_soc_platform_register(struct device *dev)
36{
37 return 0;
38}
39#endif /* CONFIG_SND_DAVINCI_SOC */
34 40
35#endif 41#endif
diff --git a/sound/soc/davinci/davinci-vcif.c b/sound/soc/davinci/davinci-vcif.c
index 30587c0cdbd2..77aef05588c3 100644
--- a/sound/soc/davinci/davinci-vcif.c
+++ b/sound/soc/davinci/davinci-vcif.c
@@ -258,7 +258,6 @@ static int davinci_vcif_probe(struct platform_device *pdev)
258static int davinci_vcif_remove(struct platform_device *pdev) 258static int davinci_vcif_remove(struct platform_device *pdev)
259{ 259{
260 snd_soc_unregister_component(&pdev->dev); 260 snd_soc_unregister_component(&pdev->dev);
261 davinci_soc_platform_unregister(&pdev->dev);
262 261
263 return 0; 262 return 0;
264} 263}
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
index 338a91642471..37933629cbed 100644
--- a/sound/soc/fsl/Kconfig
+++ b/sound/soc/fsl/Kconfig
@@ -1,30 +1,78 @@
1menu "SoC Audio for Freescale CPUs"
2
3comment "Common SoC Audio options for Freescale CPUs:"
4
1config SND_SOC_FSL_SAI 5config SND_SOC_FSL_SAI
2 tristate 6 tristate "Synchronous Audio Interface (SAI) module support"
3 select REGMAP_MMIO 7 select REGMAP_MMIO
4 select SND_SOC_GENERIC_DMAENGINE_PCM 8 select SND_SOC_GENERIC_DMAENGINE_PCM
9 help
10 Say Y if you want to add Synchronous Audio Interface (SAI)
11 support for the Freescale CPUs.
12 This option is only useful for out-of-tree drivers since
13 in-tree drivers select it automatically.
5 14
6config SND_SOC_FSL_SSI 15config SND_SOC_FSL_SSI
7 tristate 16 tristate "Synchronous Serial Interface module support"
17 select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
18 select SND_SOC_IMX_PCM_FIQ if SND_IMX_SOC != n && ARCH_MXC
19 select REGMAP_MMIO
20 help
21 Say Y if you want to add Synchronous Serial Interface (SSI)
22 support for the Freescale CPUs.
23 This option is only useful for out-of-tree drivers since
24 in-tree drivers select it automatically.
8 25
9config SND_SOC_FSL_SPDIF 26config SND_SOC_FSL_SPDIF
10 tristate 27 tristate "Sony/Philips Digital Interface module support"
11 select REGMAP_MMIO 28 select REGMAP_MMIO
29 select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
30 select SND_SOC_IMX_PCM_FIQ if SND_IMX_SOC != n && ARCH_MXC
31 help
32 Say Y if you want to add Sony/Philips Digital Interface (SPDIF)
33 support for the Freescale CPUs.
34 This option is only useful for out-of-tree drivers since
35 in-tree drivers select it automatically.
12 36
13config SND_SOC_FSL_ESAI 37config SND_SOC_FSL_ESAI
14 tristate 38 tristate "Enhanced Serial Audio Interface (ESAI) module support"
15 select REGMAP_MMIO 39 select REGMAP_MMIO
16 select SND_SOC_FSL_UTILS 40 select SND_SOC_FSL_UTILS
41 help
42 Say Y if you want to add Enhanced Synchronous Audio Interface
43 (ESAI) support for the Freescale CPUs.
44 This option is only useful for out-of-tree drivers since
45 in-tree drivers select it automatically.
17 46
18config SND_SOC_FSL_UTILS 47config SND_SOC_FSL_UTILS
19 tristate 48 tristate
20 49
21menuconfig SND_POWERPC_SOC 50config SND_SOC_IMX_PCM_DMA
51 tristate
52 select SND_SOC_GENERIC_DMAENGINE_PCM
53
54config SND_SOC_IMX_AUDMUX
55 tristate "Digital Audio Mux module support"
56 help
57 Say Y if you want to add Digital Audio Mux (AUDMUX) support
58 for the ARM i.MX CPUs.
59 This option is only useful for out-of-tree drivers since
60 in-tree drivers select it automatically.
61
62config SND_POWERPC_SOC
22 tristate "SoC Audio for Freescale PowerPC CPUs" 63 tristate "SoC Audio for Freescale PowerPC CPUs"
23 depends on FSL_SOC || PPC_MPC52xx 64 depends on FSL_SOC || PPC_MPC52xx
24 help 65 help
25 Say Y or M if you want to add support for codecs attached to 66 Say Y or M if you want to add support for codecs attached to
26 the PowerPC CPUs. 67 the PowerPC CPUs.
27 68
69config SND_IMX_SOC
70 tristate "SoC Audio for Freescale i.MX CPUs"
71 depends on ARCH_MXC || COMPILE_TEST
72 help
73 Say Y or M if you want to add support for codecs attached to
74 the i.MX CPUs.
75
28if SND_POWERPC_SOC 76if SND_POWERPC_SOC
29 77
30config SND_MPC52xx_DMA 78config SND_MPC52xx_DMA
@@ -33,6 +81,8 @@ config SND_MPC52xx_DMA
33config SND_SOC_POWERPC_DMA 81config SND_SOC_POWERPC_DMA
34 tristate 82 tristate
35 83
84comment "SoC Audio support for Freescale PPC boards:"
85
36config SND_SOC_MPC8610_HPCD 86config SND_SOC_MPC8610_HPCD
37 tristate "ALSA SoC support for the Freescale MPC8610 HPCD board" 87 tristate "ALSA SoC support for the Freescale MPC8610 HPCD board"
38 # I2C is necessary for the CS4270 driver 88 # I2C is necessary for the CS4270 driver
@@ -110,13 +160,6 @@ config SND_MPC52xx_SOC_EFIKA
110 160
111endif # SND_POWERPC_SOC 161endif # SND_POWERPC_SOC
112 162
113menuconfig SND_IMX_SOC
114 tristate "SoC Audio for Freescale i.MX CPUs"
115 depends on ARCH_MXC || COMPILE_TEST
116 help
117 Say Y or M if you want to add support for codecs attached to
118 the i.MX CPUs.
119
120if SND_IMX_SOC 163if SND_IMX_SOC
121 164
122config SND_SOC_IMX_SSI 165config SND_SOC_IMX_SSI
@@ -127,12 +170,7 @@ config SND_SOC_IMX_PCM_FIQ
127 tristate 170 tristate
128 select FIQ 171 select FIQ
129 172
130config SND_SOC_IMX_PCM_DMA 173comment "SoC Audio support for Freescale i.MX boards:"
131 tristate
132 select SND_SOC_GENERIC_DMAENGINE_PCM
133
134config SND_SOC_IMX_AUDMUX
135 tristate
136 174
137config SND_MXC_SOC_WM1133_EV1 175config SND_MXC_SOC_WM1133_EV1
138 tristate "Audio on the i.MX31ADS with WM1133-EV1 fitted" 176 tristate "Audio on the i.MX31ADS with WM1133-EV1 fitted"
@@ -170,12 +208,7 @@ config SND_SOC_PHYCORE_AC97
170 208
171config SND_SOC_EUKREA_TLV320 209config SND_SOC_EUKREA_TLV320
172 tristate "Eukrea TLV320" 210 tristate "Eukrea TLV320"
173 depends on MACH_EUKREA_MBIMX27_BASEBOARD \ 211 depends on ARCH_MXC && I2C
174 || MACH_EUKREA_MBIMXSD25_BASEBOARD \
175 || MACH_EUKREA_MBIMXSD35_BASEBOARD \
176 || MACH_EUKREA_MBIMXSD51_BASEBOARD \
177 || (OF && ARM)
178 depends on I2C
179 select SND_SOC_TLV320AIC23_I2C 212 select SND_SOC_TLV320AIC23_I2C
180 select SND_SOC_IMX_AUDMUX 213 select SND_SOC_IMX_AUDMUX
181 select SND_SOC_IMX_SSI 214 select SND_SOC_IMX_SSI
@@ -187,7 +220,7 @@ config SND_SOC_EUKREA_TLV320
187 220
188config SND_SOC_IMX_WM8962 221config SND_SOC_IMX_WM8962
189 tristate "SoC Audio support for i.MX boards with wm8962" 222 tristate "SoC Audio support for i.MX boards with wm8962"
190 depends on OF && I2C 223 depends on OF && I2C && INPUT
191 select SND_SOC_WM8962 224 select SND_SOC_WM8962
192 select SND_SOC_IMX_PCM_DMA 225 select SND_SOC_IMX_PCM_DMA
193 select SND_SOC_IMX_AUDMUX 226 select SND_SOC_IMX_AUDMUX
@@ -225,3 +258,5 @@ config SND_SOC_IMX_MC13783
225 select SND_SOC_IMX_PCM_DMA 258 select SND_SOC_IMX_PCM_DMA
226 259
227endif # SND_IMX_SOC 260endif # SND_IMX_SOC
261
262endmenu
diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile
index b12ad4b9b4da..db254e358c18 100644
--- a/sound/soc/fsl/Makefile
+++ b/sound/soc/fsl/Makefile
@@ -12,7 +12,8 @@ obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o
12 12
13# Freescale SSI/DMA/SAI/SPDIF Support 13# Freescale SSI/DMA/SAI/SPDIF Support
14snd-soc-fsl-sai-objs := fsl_sai.o 14snd-soc-fsl-sai-objs := fsl_sai.o
15snd-soc-fsl-ssi-objs := fsl_ssi.o 15snd-soc-fsl-ssi-y := fsl_ssi.o
16snd-soc-fsl-ssi-$(CONFIG_DEBUG_FS) += fsl_ssi_dbg.o
16snd-soc-fsl-spdif-objs := fsl_spdif.o 17snd-soc-fsl-spdif-objs := fsl_spdif.o
17snd-soc-fsl-esai-objs := fsl_esai.o 18snd-soc-fsl-esai-objs := fsl_esai.o
18snd-soc-fsl-utils-objs := fsl_utils.o 19snd-soc-fsl-utils-objs := fsl_utils.o
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index c8e5db1414d7..d719caf26dc2 100644
--- a/sound/soc/fsl/fsl_esai.c
+++ b/sound/soc/fsl/fsl_esai.c
@@ -39,6 +39,8 @@
39 * @fifo_depth: depth of tx/rx FIFO 39 * @fifo_depth: depth of tx/rx FIFO
40 * @slot_width: width of each DAI slot 40 * @slot_width: width of each DAI slot
41 * @hck_rate: clock rate of desired HCKx clock 41 * @hck_rate: clock rate of desired HCKx clock
42 * @sck_rate: clock rate of desired SCKx clock
43 * @hck_dir: the direction of HCKx pads
42 * @sck_div: if using PSR/PM dividers for SCKx clock 44 * @sck_div: if using PSR/PM dividers for SCKx clock
43 * @slave_mode: if fully using DAI slave mode 45 * @slave_mode: if fully using DAI slave mode
44 * @synchronous: if using tx/rx synchronous mode 46 * @synchronous: if using tx/rx synchronous mode
@@ -55,6 +57,8 @@ struct fsl_esai {
55 u32 fifo_depth; 57 u32 fifo_depth;
56 u32 slot_width; 58 u32 slot_width;
57 u32 hck_rate[2]; 59 u32 hck_rate[2];
60 u32 sck_rate[2];
61 bool hck_dir[2];
58 bool sck_div[2]; 62 bool sck_div[2];
59 bool slave_mode; 63 bool slave_mode;
60 bool synchronous; 64 bool synchronous;
@@ -209,8 +213,13 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
209 struct clk *clksrc = esai_priv->extalclk; 213 struct clk *clksrc = esai_priv->extalclk;
210 bool tx = clk_id <= ESAI_HCKT_EXTAL; 214 bool tx = clk_id <= ESAI_HCKT_EXTAL;
211 bool in = dir == SND_SOC_CLOCK_IN; 215 bool in = dir == SND_SOC_CLOCK_IN;
212 u32 ret, ratio, ecr = 0; 216 u32 ratio, ecr = 0;
213 unsigned long clk_rate; 217 unsigned long clk_rate;
218 int ret;
219
220 /* Bypass divider settings if the requirement doesn't change */
221 if (freq == esai_priv->hck_rate[tx] && dir == esai_priv->hck_dir[tx])
222 return 0;
214 223
215 /* sck_div can be only bypassed if ETO/ERO=0 and SNC_SOC_CLOCK_OUT */ 224 /* sck_div can be only bypassed if ETO/ERO=0 and SNC_SOC_CLOCK_OUT */
216 esai_priv->sck_div[tx] = true; 225 esai_priv->sck_div[tx] = true;
@@ -258,10 +267,16 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
258 return -EINVAL; 267 return -EINVAL;
259 } 268 }
260 269
261 if (ratio == 1) { 270 /* Only EXTAL source can be output directly without using PSR and PM */
271 if (ratio == 1 && clksrc == esai_priv->extalclk) {
262 /* Bypass all the dividers if not being needed */ 272 /* Bypass all the dividers if not being needed */
263 ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO; 273 ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO;
264 goto out; 274 goto out;
275 } else if (ratio < 2) {
276 /* The ratio should be no less than 2 if using other sources */
277 dev_err(dai->dev, "failed to derive required HCK%c rate\n",
278 tx ? 'T' : 'R');
279 return -EINVAL;
265 } 280 }
266 281
267 ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0); 282 ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0);
@@ -271,6 +286,7 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
271 esai_priv->sck_div[tx] = false; 286 esai_priv->sck_div[tx] = false;
272 287
273out: 288out:
289 esai_priv->hck_dir[tx] = dir;
274 esai_priv->hck_rate[tx] = freq; 290 esai_priv->hck_rate[tx] = freq;
275 291
276 regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR, 292 regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR,
@@ -288,9 +304,10 @@ static int fsl_esai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
288 struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); 304 struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);
289 u32 hck_rate = esai_priv->hck_rate[tx]; 305 u32 hck_rate = esai_priv->hck_rate[tx];
290 u32 sub, ratio = hck_rate / freq; 306 u32 sub, ratio = hck_rate / freq;
307 int ret;
291 308
292 /* Don't apply for fully slave mode*/ 309 /* Don't apply for fully slave mode or unchanged bclk */
293 if (esai_priv->slave_mode) 310 if (esai_priv->slave_mode || esai_priv->sck_rate[tx] == freq)
294 return 0; 311 return 0;
295 312
296 if (ratio * freq > hck_rate) 313 if (ratio * freq > hck_rate)
@@ -307,13 +324,21 @@ static int fsl_esai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
307 return -EINVAL; 324 return -EINVAL;
308 } 325 }
309 326
310 if (esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) { 327 /* The ratio should be contented by FP alone if bypassing PM and PSR */
328 if (!esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) {
311 dev_err(dai->dev, "the ratio is out of range (1 ~ 16)\n"); 329 dev_err(dai->dev, "the ratio is out of range (1 ~ 16)\n");
312 return -EINVAL; 330 return -EINVAL;
313 } 331 }
314 332
315 return fsl_esai_divisor_cal(dai, tx, ratio, true, 333 ret = fsl_esai_divisor_cal(dai, tx, ratio, true,
316 esai_priv->sck_div[tx] ? 0 : ratio); 334 esai_priv->sck_div[tx] ? 0 : ratio);
335 if (ret)
336 return ret;
337
338 /* Save current bclk rate */
339 esai_priv->sck_rate[tx] = freq;
340
341 return 0;
317} 342}
318 343
319static int fsl_esai_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask, 344static int fsl_esai_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask,
@@ -432,8 +457,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
432static int fsl_esai_startup(struct snd_pcm_substream *substream, 457static int fsl_esai_startup(struct snd_pcm_substream *substream,
433 struct snd_soc_dai *dai) 458 struct snd_soc_dai *dai)
434{ 459{
435 int ret;
436 struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); 460 struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);
461 int ret;
437 462
438 /* 463 /*
439 * Some platforms might use the same bit to gate all three or two of 464 * Some platforms might use the same bit to gate all three or two of
@@ -454,12 +479,6 @@ static int fsl_esai_startup(struct snd_pcm_substream *substream,
454 } 479 }
455 480
456 if (!dai->active) { 481 if (!dai->active) {
457 /* Reset Port C */
458 regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
459 ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
460 regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
461 ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
462
463 /* Set synchronous mode */ 482 /* Set synchronous mode */
464 regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR, 483 regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR,
465 ESAI_SAICR_SYNC, esai_priv->synchronous ? 484 ESAI_SAICR_SYNC, esai_priv->synchronous ?
@@ -491,7 +510,8 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream,
491 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 510 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
492 u32 width = snd_pcm_format_width(params_format(params)); 511 u32 width = snd_pcm_format_width(params_format(params));
493 u32 channels = params_channels(params); 512 u32 channels = params_channels(params);
494 u32 bclk, mask, val, ret; 513 u32 bclk, mask, val;
514 int ret;
495 515
496 bclk = params_rate(params) * esai_priv->slot_width * 2; 516 bclk = params_rate(params) * esai_priv->slot_width * 2;
497 517
@@ -519,6 +539,11 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream,
519 539
520 regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val); 540 regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val);
521 541
542 /* Remove ESAI personal reset by configuring ESAI_PCRC and ESAI_PRRC */
543 regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
544 ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
545 regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
546 ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
522 return 0; 547 return 0;
523} 548}
524 549
@@ -816,6 +841,7 @@ static int fsl_esai_probe(struct platform_device *pdev)
816 841
817static const struct of_device_id fsl_esai_dt_ids[] = { 842static const struct of_device_id fsl_esai_dt_ids[] = {
818 { .compatible = "fsl,imx35-esai", }, 843 { .compatible = "fsl,imx35-esai", },
844 { .compatible = "fsl,vf610-esai", },
819 {} 845 {}
820}; 846};
821MODULE_DEVICE_TABLE(of, fsl_esai_dt_ids); 847MODULE_DEVICE_TABLE(of, fsl_esai_dt_ids);
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 56da8c8c5960..c5a0e8af8226 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -22,6 +22,7 @@
22#include <sound/pcm_params.h> 22#include <sound/pcm_params.h>
23 23
24#include "fsl_sai.h" 24#include "fsl_sai.h"
25#include "imx-pcm.h"
25 26
26#define FSL_SAI_FLAGS (FSL_SAI_CSR_SEIE |\ 27#define FSL_SAI_FLAGS (FSL_SAI_CSR_SEIE |\
27 FSL_SAI_CSR_FEIE) 28 FSL_SAI_CSR_FEIE)
@@ -30,78 +31,96 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
30{ 31{
31 struct fsl_sai *sai = (struct fsl_sai *)devid; 32 struct fsl_sai *sai = (struct fsl_sai *)devid;
32 struct device *dev = &sai->pdev->dev; 33 struct device *dev = &sai->pdev->dev;
33 u32 xcsr, mask; 34 u32 flags, xcsr, mask;
35 bool irq_none = true;
34 36
35 /* Only handle those what we enabled */ 37 /*
38 * Both IRQ status bits and IRQ mask bits are in the xCSR but
39 * different shifts. And we here create a mask only for those
40 * IRQs that we activated.
41 */
36 mask = (FSL_SAI_FLAGS >> FSL_SAI_CSR_xIE_SHIFT) << FSL_SAI_CSR_xF_SHIFT; 42 mask = (FSL_SAI_FLAGS >> FSL_SAI_CSR_xIE_SHIFT) << FSL_SAI_CSR_xF_SHIFT;
37 43
38 /* Tx IRQ */ 44 /* Tx IRQ */
39 regmap_read(sai->regmap, FSL_SAI_TCSR, &xcsr); 45 regmap_read(sai->regmap, FSL_SAI_TCSR, &xcsr);
40 xcsr &= mask; 46 flags = xcsr & mask;
47
48 if (flags)
49 irq_none = false;
50 else
51 goto irq_rx;
41 52
42 if (xcsr & FSL_SAI_CSR_WSF) 53 if (flags & FSL_SAI_CSR_WSF)
43 dev_dbg(dev, "isr: Start of Tx word detected\n"); 54 dev_dbg(dev, "isr: Start of Tx word detected\n");
44 55
45 if (xcsr & FSL_SAI_CSR_SEF) 56 if (flags & FSL_SAI_CSR_SEF)
46 dev_warn(dev, "isr: Tx Frame sync error detected\n"); 57 dev_warn(dev, "isr: Tx Frame sync error detected\n");
47 58
48 if (xcsr & FSL_SAI_CSR_FEF) { 59 if (flags & FSL_SAI_CSR_FEF) {
49 dev_warn(dev, "isr: Transmit underrun detected\n"); 60 dev_warn(dev, "isr: Transmit underrun detected\n");
50 /* FIFO reset for safety */ 61 /* FIFO reset for safety */
51 xcsr |= FSL_SAI_CSR_FR; 62 xcsr |= FSL_SAI_CSR_FR;
52 } 63 }
53 64
54 if (xcsr & FSL_SAI_CSR_FWF) 65 if (flags & FSL_SAI_CSR_FWF)
55 dev_dbg(dev, "isr: Enabled transmit FIFO is empty\n"); 66 dev_dbg(dev, "isr: Enabled transmit FIFO is empty\n");
56 67
57 if (xcsr & FSL_SAI_CSR_FRF) 68 if (flags & FSL_SAI_CSR_FRF)
58 dev_dbg(dev, "isr: Transmit FIFO watermark has been reached\n"); 69 dev_dbg(dev, "isr: Transmit FIFO watermark has been reached\n");
59 70
60 regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 71 flags &= FSL_SAI_CSR_xF_W_MASK;
61 FSL_SAI_CSR_xF_W_MASK | FSL_SAI_CSR_FR, xcsr); 72 xcsr &= ~FSL_SAI_CSR_xF_MASK;
73
74 if (flags)
75 regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr);
62 76
77irq_rx:
63 /* Rx IRQ */ 78 /* Rx IRQ */
64 regmap_read(sai->regmap, FSL_SAI_RCSR, &xcsr); 79 regmap_read(sai->regmap, FSL_SAI_RCSR, &xcsr);
65 xcsr &= mask; 80 flags = xcsr & mask;
66 81
67 if (xcsr & FSL_SAI_CSR_WSF) 82 if (flags)
83 irq_none = false;
84 else
85 goto out;
86
87 if (flags & FSL_SAI_CSR_WSF)
68 dev_dbg(dev, "isr: Start of Rx word detected\n"); 88 dev_dbg(dev, "isr: Start of Rx word detected\n");
69 89
70 if (xcsr & FSL_SAI_CSR_SEF) 90 if (flags & FSL_SAI_CSR_SEF)
71 dev_warn(dev, "isr: Rx Frame sync error detected\n"); 91 dev_warn(dev, "isr: Rx Frame sync error detected\n");
72 92
73 if (xcsr & FSL_SAI_CSR_FEF) { 93 if (flags & FSL_SAI_CSR_FEF) {
74 dev_warn(dev, "isr: Receive overflow detected\n"); 94 dev_warn(dev, "isr: Receive overflow detected\n");
75 /* FIFO reset for safety */ 95 /* FIFO reset for safety */
76 xcsr |= FSL_SAI_CSR_FR; 96 xcsr |= FSL_SAI_CSR_FR;
77 } 97 }
78 98
79 if (xcsr & FSL_SAI_CSR_FWF) 99 if (flags & FSL_SAI_CSR_FWF)
80 dev_dbg(dev, "isr: Enabled receive FIFO is full\n"); 100 dev_dbg(dev, "isr: Enabled receive FIFO is full\n");
81 101
82 if (xcsr & FSL_SAI_CSR_FRF) 102 if (flags & FSL_SAI_CSR_FRF)
83 dev_dbg(dev, "isr: Receive FIFO watermark has been reached\n"); 103 dev_dbg(dev, "isr: Receive FIFO watermark has been reached\n");
84 104
85 regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 105 flags &= FSL_SAI_CSR_xF_W_MASK;
86 FSL_SAI_CSR_xF_W_MASK | FSL_SAI_CSR_FR, xcsr); 106 xcsr &= ~FSL_SAI_CSR_xF_MASK;
107
108 if (flags)
109 regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr);
87 110
88 return IRQ_HANDLED; 111out:
112 if (irq_none)
113 return IRQ_NONE;
114 else
115 return IRQ_HANDLED;
89} 116}
90 117
91static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai, 118static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
92 int clk_id, unsigned int freq, int fsl_dir) 119 int clk_id, unsigned int freq, int fsl_dir)
93{ 120{
94 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 121 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
95 u32 val_cr2, reg_cr2; 122 bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
96 123 u32 val_cr2 = 0;
97 if (fsl_dir == FSL_FMT_TRANSMITTER)
98 reg_cr2 = FSL_SAI_TCR2;
99 else
100 reg_cr2 = FSL_SAI_RCR2;
101
102 regmap_read(sai->regmap, reg_cr2, &val_cr2);
103
104 val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK;
105 124
106 switch (clk_id) { 125 switch (clk_id) {
107 case FSL_SAI_CLK_BUS: 126 case FSL_SAI_CLK_BUS:
@@ -120,7 +139,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
120 return -EINVAL; 139 return -EINVAL;
121 } 140 }
122 141
123 regmap_write(sai->regmap, reg_cr2, val_cr2); 142 regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
143 FSL_SAI_CR2_MSEL_MASK, val_cr2);
124 144
125 return 0; 145 return 0;
126} 146}
@@ -152,22 +172,10 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
152 unsigned int fmt, int fsl_dir) 172 unsigned int fmt, int fsl_dir)
153{ 173{
154 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 174 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
155 u32 val_cr2, val_cr4, reg_cr2, reg_cr4; 175 bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
156 176 u32 val_cr2 = 0, val_cr4 = 0;
157 if (fsl_dir == FSL_FMT_TRANSMITTER) {
158 reg_cr2 = FSL_SAI_TCR2;
159 reg_cr4 = FSL_SAI_TCR4;
160 } else {
161 reg_cr2 = FSL_SAI_RCR2;
162 reg_cr4 = FSL_SAI_RCR4;
163 }
164 177
165 regmap_read(sai->regmap, reg_cr2, &val_cr2); 178 if (!sai->big_endian_data)
166 regmap_read(sai->regmap, reg_cr4, &val_cr4);
167
168 if (sai->big_endian_data)
169 val_cr4 &= ~FSL_SAI_CR4_MF;
170 else
171 val_cr4 |= FSL_SAI_CR4_MF; 179 val_cr4 |= FSL_SAI_CR4_MF;
172 180
173 /* DAI mode */ 181 /* DAI mode */
@@ -188,7 +196,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
188 * frame sync asserts with the first bit of the frame. 196 * frame sync asserts with the first bit of the frame.
189 */ 197 */
190 val_cr2 |= FSL_SAI_CR2_BCP; 198 val_cr2 |= FSL_SAI_CR2_BCP;
191 val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
192 break; 199 break;
193 case SND_SOC_DAIFMT_DSP_A: 200 case SND_SOC_DAIFMT_DSP_A:
194 /* 201 /*
@@ -198,7 +205,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
198 * data word. 205 * data word.
199 */ 206 */
200 val_cr2 |= FSL_SAI_CR2_BCP; 207 val_cr2 |= FSL_SAI_CR2_BCP;
201 val_cr4 &= ~FSL_SAI_CR4_FSP;
202 val_cr4 |= FSL_SAI_CR4_FSE; 208 val_cr4 |= FSL_SAI_CR4_FSE;
203 sai->is_dsp_mode = true; 209 sai->is_dsp_mode = true;
204 break; 210 break;
@@ -208,7 +214,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
208 * frame sync asserts with the first bit of the frame. 214 * frame sync asserts with the first bit of the frame.
209 */ 215 */
210 val_cr2 |= FSL_SAI_CR2_BCP; 216 val_cr2 |= FSL_SAI_CR2_BCP;
211 val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
212 sai->is_dsp_mode = true; 217 sai->is_dsp_mode = true;
213 break; 218 break;
214 case SND_SOC_DAIFMT_RIGHT_J: 219 case SND_SOC_DAIFMT_RIGHT_J:
@@ -246,23 +251,22 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
246 val_cr4 |= FSL_SAI_CR4_FSD_MSTR; 251 val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
247 break; 252 break;
248 case SND_SOC_DAIFMT_CBM_CFM: 253 case SND_SOC_DAIFMT_CBM_CFM:
249 val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
250 val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
251 break; 254 break;
252 case SND_SOC_DAIFMT_CBS_CFM: 255 case SND_SOC_DAIFMT_CBS_CFM:
253 val_cr2 |= FSL_SAI_CR2_BCD_MSTR; 256 val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
254 val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
255 break; 257 break;
256 case SND_SOC_DAIFMT_CBM_CFS: 258 case SND_SOC_DAIFMT_CBM_CFS:
257 val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
258 val_cr4 |= FSL_SAI_CR4_FSD_MSTR; 259 val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
259 break; 260 break;
260 default: 261 default:
261 return -EINVAL; 262 return -EINVAL;
262 } 263 }
263 264
264 regmap_write(sai->regmap, reg_cr2, val_cr2); 265 regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
265 regmap_write(sai->regmap, reg_cr4, val_cr4); 266 FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR, val_cr2);
267 regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
268 FSL_SAI_CR4_MF | FSL_SAI_CR4_FSE |
269 FSL_SAI_CR4_FSP | FSL_SAI_CR4_FSD_MSTR, val_cr4);
266 270
267 return 0; 271 return 0;
268} 272}
@@ -289,29 +293,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
289 struct snd_soc_dai *cpu_dai) 293 struct snd_soc_dai *cpu_dai)
290{ 294{
291 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 295 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
292 u32 val_cr4, val_cr5, val_mr, reg_cr4, reg_cr5, reg_mr; 296 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
293 unsigned int channels = params_channels(params); 297 unsigned int channels = params_channels(params);
294 u32 word_width = snd_pcm_format_width(params_format(params)); 298 u32 word_width = snd_pcm_format_width(params_format(params));
295 299 u32 val_cr4 = 0, val_cr5 = 0;
296 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
297 reg_cr4 = FSL_SAI_TCR4;
298 reg_cr5 = FSL_SAI_TCR5;
299 reg_mr = FSL_SAI_TMR;
300 } else {
301 reg_cr4 = FSL_SAI_RCR4;
302 reg_cr5 = FSL_SAI_RCR5;
303 reg_mr = FSL_SAI_RMR;
304 }
305
306 regmap_read(sai->regmap, reg_cr4, &val_cr4);
307 regmap_read(sai->regmap, reg_cr4, &val_cr5);
308
309 val_cr4 &= ~FSL_SAI_CR4_SYWD_MASK;
310 val_cr4 &= ~FSL_SAI_CR4_FRSZ_MASK;
311
312 val_cr5 &= ~FSL_SAI_CR5_WNW_MASK;
313 val_cr5 &= ~FSL_SAI_CR5_W0W_MASK;
314 val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
315 300
316 if (!sai->is_dsp_mode) 301 if (!sai->is_dsp_mode)
317 val_cr4 |= FSL_SAI_CR4_SYWD(word_width); 302 val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
@@ -319,18 +304,20 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
319 val_cr5 |= FSL_SAI_CR5_WNW(word_width); 304 val_cr5 |= FSL_SAI_CR5_WNW(word_width);
320 val_cr5 |= FSL_SAI_CR5_W0W(word_width); 305 val_cr5 |= FSL_SAI_CR5_W0W(word_width);
321 306
322 val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
323 if (sai->big_endian_data) 307 if (sai->big_endian_data)
324 val_cr5 |= FSL_SAI_CR5_FBT(0); 308 val_cr5 |= FSL_SAI_CR5_FBT(0);
325 else 309 else
326 val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1); 310 val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
327 311
328 val_cr4 |= FSL_SAI_CR4_FRSZ(channels); 312 val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
329 val_mr = ~0UL - ((1 << channels) - 1);
330 313
331 regmap_write(sai->regmap, reg_cr4, val_cr4); 314 regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
332 regmap_write(sai->regmap, reg_cr5, val_cr5); 315 FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
333 regmap_write(sai->regmap, reg_mr, val_mr); 316 val_cr4);
317 regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx),
318 FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
319 FSL_SAI_CR5_FBT_MASK, val_cr5);
320 regmap_write(sai->regmap, FSL_SAI_xMR(tx), ~0UL - ((1 << channels) - 1));
334 321
335 return 0; 322 return 0;
336} 323}
@@ -339,6 +326,7 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
339 struct snd_soc_dai *cpu_dai) 326 struct snd_soc_dai *cpu_dai)
340{ 327{
341 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 328 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
329 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
342 u32 tcsr, rcsr; 330 u32 tcsr, rcsr;
343 331
344 /* 332 /*
@@ -353,14 +341,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
353 regmap_read(sai->regmap, FSL_SAI_TCSR, &tcsr); 341 regmap_read(sai->regmap, FSL_SAI_TCSR, &tcsr);
354 regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr); 342 regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr);
355 343
356 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
357 tcsr |= FSL_SAI_CSR_FRDE;
358 rcsr &= ~FSL_SAI_CSR_FRDE;
359 } else {
360 rcsr |= FSL_SAI_CSR_FRDE;
361 tcsr &= ~FSL_SAI_CSR_FRDE;
362 }
363
364 /* 344 /*
365 * It is recommended that the transmitter is the last enabled 345 * It is recommended that the transmitter is the last enabled
366 * and the first disabled. 346 * and the first disabled.
@@ -369,22 +349,33 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
369 case SNDRV_PCM_TRIGGER_START: 349 case SNDRV_PCM_TRIGGER_START:
370 case SNDRV_PCM_TRIGGER_RESUME: 350 case SNDRV_PCM_TRIGGER_RESUME:
371 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 351 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
372 tcsr |= FSL_SAI_CSR_TERE; 352 if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
373 rcsr |= FSL_SAI_CSR_TERE; 353 regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
354 FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
355 regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
356 FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
357 }
374 358
375 regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr); 359 regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
376 regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr); 360 FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
361 regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
362 FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
377 break; 363 break;
378 case SNDRV_PCM_TRIGGER_STOP: 364 case SNDRV_PCM_TRIGGER_STOP:
379 case SNDRV_PCM_TRIGGER_SUSPEND: 365 case SNDRV_PCM_TRIGGER_SUSPEND:
380 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 366 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
381 if (!(cpu_dai->playback_active || cpu_dai->capture_active)) { 367 regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
382 tcsr &= ~FSL_SAI_CSR_TERE; 368 FSL_SAI_CSR_FRDE, 0);
383 rcsr &= ~FSL_SAI_CSR_TERE; 369 regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
370 FSL_SAI_CSR_xIE_MASK, 0);
371
372 /* Check if the opposite FRDE is also disabled */
373 if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) {
374 regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
375 FSL_SAI_CSR_TERE, 0);
376 regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
377 FSL_SAI_CSR_TERE, 0);
384 } 378 }
385
386 regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
387 regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
388 break; 379 break;
389 default: 380 default:
390 return -EINVAL; 381 return -EINVAL;
@@ -397,14 +388,17 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
397 struct snd_soc_dai *cpu_dai) 388 struct snd_soc_dai *cpu_dai)
398{ 389{
399 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 390 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
400 u32 reg; 391 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
392 struct device *dev = &sai->pdev->dev;
393 int ret;
401 394
402 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 395 ret = clk_prepare_enable(sai->bus_clk);
403 reg = FSL_SAI_TCR3; 396 if (ret) {
404 else 397 dev_err(dev, "failed to enable bus clock: %d\n", ret);
405 reg = FSL_SAI_RCR3; 398 return ret;
399 }
406 400
407 regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE, 401 regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,
408 FSL_SAI_CR3_TRCE); 402 FSL_SAI_CR3_TRCE);
409 403
410 return 0; 404 return 0;
@@ -414,15 +408,11 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
414 struct snd_soc_dai *cpu_dai) 408 struct snd_soc_dai *cpu_dai)
415{ 409{
416 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); 410 struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
417 u32 reg; 411 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
418 412
419 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 413 regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);
420 reg = FSL_SAI_TCR3;
421 else
422 reg = FSL_SAI_RCR3;
423 414
424 regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE, 415 clk_disable_unprepare(sai->bus_clk);
425 ~FSL_SAI_CR3_TRCE);
426} 416}
427 417
428static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = { 418static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
@@ -438,8 +428,8 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
438{ 428{
439 struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev); 429 struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
440 430
441 regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS); 431 regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
442 regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS); 432 regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
443 regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK, 433 regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
444 FSL_SAI_MAXBURST_TX * 2); 434 FSL_SAI_MAXBURST_TX * 2);
445 regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK, 435 regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
@@ -555,7 +545,8 @@ static int fsl_sai_probe(struct platform_device *pdev)
555 struct fsl_sai *sai; 545 struct fsl_sai *sai;
556 struct resource *res; 546 struct resource *res;
557 void __iomem *base; 547 void __iomem *base;
558 int irq, ret; 548 char tmp[8];
549 int irq, ret, i;
559 550
560 sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); 551 sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
561 if (!sai) 552 if (!sai)
@@ -563,6 +554,9 @@ static int fsl_sai_probe(struct platform_device *pdev)
563 554
564 sai->pdev = pdev; 555 sai->pdev = pdev;
565 556
557 if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx6sx-sai"))
558 sai->sai_on_imx = true;
559
566 sai->big_endian_regs = of_property_read_bool(np, "big-endian-regs"); 560 sai->big_endian_regs = of_property_read_bool(np, "big-endian-regs");
567 if (sai->big_endian_regs) 561 if (sai->big_endian_regs)
568 fsl_sai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG; 562 fsl_sai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
@@ -575,12 +569,35 @@ static int fsl_sai_probe(struct platform_device *pdev)
575 return PTR_ERR(base); 569 return PTR_ERR(base);
576 570
577 sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev, 571 sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
578 "sai", base, &fsl_sai_regmap_config); 572 "bus", base, &fsl_sai_regmap_config);
573
574 /* Compatible with old DTB cases */
575 if (IS_ERR(sai->regmap))
576 sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
577 "sai", base, &fsl_sai_regmap_config);
579 if (IS_ERR(sai->regmap)) { 578 if (IS_ERR(sai->regmap)) {
580 dev_err(&pdev->dev, "regmap init failed\n"); 579 dev_err(&pdev->dev, "regmap init failed\n");
581 return PTR_ERR(sai->regmap); 580 return PTR_ERR(sai->regmap);
582 } 581 }
583 582
583 /* No error out for old DTB cases but only mark the clock NULL */
584 sai->bus_clk = devm_clk_get(&pdev->dev, "bus");
585 if (IS_ERR(sai->bus_clk)) {
586 dev_err(&pdev->dev, "failed to get bus clock: %ld\n",
587 PTR_ERR(sai->bus_clk));
588 sai->bus_clk = NULL;
589 }
590
591 for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
592 sprintf(tmp, "mclk%d", i + 1);
593 sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
594 if (IS_ERR(sai->mclk_clk[i])) {
595 dev_err(&pdev->dev, "failed to get mclk%d clock: %ld\n",
596 i + 1, PTR_ERR(sai->mclk_clk[i]));
597 sai->mclk_clk[i] = NULL;
598 }
599 }
600
584 irq = platform_get_irq(pdev, 0); 601 irq = platform_get_irq(pdev, 0);
585 if (irq < 0) { 602 if (irq < 0) {
586 dev_err(&pdev->dev, "no irq for node %s\n", np->full_name); 603 dev_err(&pdev->dev, "no irq for node %s\n", np->full_name);
@@ -605,12 +622,16 @@ static int fsl_sai_probe(struct platform_device *pdev)
605 if (ret) 622 if (ret)
606 return ret; 623 return ret;
607 624
608 return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 625 if (sai->sai_on_imx)
609 SND_DMAENGINE_PCM_FLAG_NO_RESIDUE); 626 return imx_pcm_dma_init(pdev);
627 else
628 return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
629 SND_DMAENGINE_PCM_FLAG_NO_RESIDUE);
610} 630}
611 631
612static const struct of_device_id fsl_sai_ids[] = { 632static const struct of_device_id fsl_sai_ids[] = {
613 { .compatible = "fsl,vf610-sai", }, 633 { .compatible = "fsl,vf610-sai", },
634 { .compatible = "fsl,imx6sx-sai", },
614 { /* sentinel */ } 635 { /* sentinel */ }
615}; 636};
616 637
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index a264185c7138..0e6c9f595d75 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -35,6 +35,16 @@
35#define FSL_SAI_RFR 0xc0 /* SAI Receive FIFO */ 35#define FSL_SAI_RFR 0xc0 /* SAI Receive FIFO */
36#define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */ 36#define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */
37 37
38#define FSL_SAI_xCSR(tx) (tx ? FSL_SAI_TCSR : FSL_SAI_RCSR)
39#define FSL_SAI_xCR1(tx) (tx ? FSL_SAI_TCR1 : FSL_SAI_RCR1)
40#define FSL_SAI_xCR2(tx) (tx ? FSL_SAI_TCR2 : FSL_SAI_RCR2)
41#define FSL_SAI_xCR3(tx) (tx ? FSL_SAI_TCR3 : FSL_SAI_RCR3)
42#define FSL_SAI_xCR4(tx) (tx ? FSL_SAI_TCR4 : FSL_SAI_RCR4)
43#define FSL_SAI_xCR5(tx) (tx ? FSL_SAI_TCR5 : FSL_SAI_RCR5)
44#define FSL_SAI_xDR(tx) (tx ? FSL_SAI_TDR : FSL_SAI_RDR)
45#define FSL_SAI_xFR(tx) (tx ? FSL_SAI_TFR : FSL_SAI_RFR)
46#define FSL_SAI_xMR(tx) (tx ? FSL_SAI_TMR : FSL_SAI_RMR)
47
38/* SAI Transmit/Recieve Control Register */ 48/* SAI Transmit/Recieve Control Register */
39#define FSL_SAI_CSR_TERE BIT(31) 49#define FSL_SAI_CSR_TERE BIT(31)
40#define FSL_SAI_CSR_FR BIT(25) 50#define FSL_SAI_CSR_FR BIT(25)
@@ -48,6 +58,7 @@
48#define FSL_SAI_CSR_FWF BIT(17) 58#define FSL_SAI_CSR_FWF BIT(17)
49#define FSL_SAI_CSR_FRF BIT(16) 59#define FSL_SAI_CSR_FRF BIT(16)
50#define FSL_SAI_CSR_xIE_SHIFT 8 60#define FSL_SAI_CSR_xIE_SHIFT 8
61#define FSL_SAI_CSR_xIE_MASK (0x1f << FSL_SAI_CSR_xIE_SHIFT)
51#define FSL_SAI_CSR_WSIE BIT(12) 62#define FSL_SAI_CSR_WSIE BIT(12)
52#define FSL_SAI_CSR_SEIE BIT(11) 63#define FSL_SAI_CSR_SEIE BIT(11)
53#define FSL_SAI_CSR_FEIE BIT(10) 64#define FSL_SAI_CSR_FEIE BIT(10)
@@ -108,6 +119,8 @@
108#define FSL_SAI_CLK_MAST2 2 119#define FSL_SAI_CLK_MAST2 2
109#define FSL_SAI_CLK_MAST3 3 120#define FSL_SAI_CLK_MAST3 3
110 121
122#define FSL_SAI_MCLK_MAX 3
123
111/* SAI data transfer numbers per DMA request */ 124/* SAI data transfer numbers per DMA request */
112#define FSL_SAI_MAXBURST_TX 6 125#define FSL_SAI_MAXBURST_TX 6
113#define FSL_SAI_MAXBURST_RX 6 126#define FSL_SAI_MAXBURST_RX 6
@@ -115,10 +128,13 @@
115struct fsl_sai { 128struct fsl_sai {
116 struct platform_device *pdev; 129 struct platform_device *pdev;
117 struct regmap *regmap; 130 struct regmap *regmap;
131 struct clk *bus_clk;
132 struct clk *mclk_clk[FSL_SAI_MCLK_MAX];
118 133
119 bool big_endian_regs; 134 bool big_endian_regs;
120 bool big_endian_data; 135 bool big_endian_data;
121 bool is_dsp_mode; 136 bool is_dsp_mode;
137 bool sai_on_imx;
122 138
123 struct snd_dmaengine_dai_dma_data dma_params_rx; 139 struct snd_dmaengine_dai_dma_data dma_params_rx;
124 struct snd_dmaengine_dai_dma_data dma_params_tx; 140 struct snd_dmaengine_dai_dma_data dma_params_tx;
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 6452ca83d889..b912d45a2a4c 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -13,18 +13,18 @@
13 * kind, whether express or implied. 13 * kind, whether express or implied.
14 */ 14 */
15 15
16#include <linux/module.h> 16#include <linux/bitrev.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/clk-private.h> 18#include <linux/clk-private.h>
19#include <linux/bitrev.h> 19#include <linux/module.h>
20#include <linux/regmap.h>
21#include <linux/of_address.h> 20#include <linux/of_address.h>
22#include <linux/of_device.h> 21#include <linux/of_device.h>
23#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/regmap.h>
24 24
25#include <sound/asoundef.h> 25#include <sound/asoundef.h>
26#include <sound/soc.h>
27#include <sound/dmaengine_pcm.h> 26#include <sound/dmaengine_pcm.h>
27#include <sound/soc.h>
28 28
29#include "fsl_spdif.h" 29#include "fsl_spdif.h"
30#include "imx-pcm.h" 30#include "imx-pcm.h"
@@ -69,17 +69,42 @@ struct spdif_mixer_control {
69 u32 ready_buf; 69 u32 ready_buf;
70}; 70};
71 71
72/**
73 * fsl_spdif_priv: Freescale SPDIF private data
74 *
75 * @fsl_spdif_control: SPDIF control data
76 * @cpu_dai_drv: cpu dai driver
77 * @pdev: platform device pointer
78 * @regmap: regmap handler
79 * @dpll_locked: dpll lock flag
80 * @txrate: the best rates for playback
81 * @txclk_df: STC_TXCLK_DF dividers value for playback
82 * @sysclk_df: STC_SYSCLK_DF dividers value for playback
83 * @txclk_src: STC_TXCLK_SRC values for playback
84 * @rxclk_src: SRPC_CLKSRC_SEL values for capture
85 * @txclk: tx clock sources for playback
86 * @rxclk: rx clock sources for capture
87 * @coreclk: core clock for register access via DMA
88 * @sysclk: system clock for rx clock rate measurement
89 * @dma_params_tx: DMA parameters for transmit channel
90 * @dma_params_rx: DMA parameters for receive channel
91 * @name: driver name
92 */
72struct fsl_spdif_priv { 93struct fsl_spdif_priv {
73 struct spdif_mixer_control fsl_spdif_control; 94 struct spdif_mixer_control fsl_spdif_control;
74 struct snd_soc_dai_driver cpu_dai_drv; 95 struct snd_soc_dai_driver cpu_dai_drv;
75 struct platform_device *pdev; 96 struct platform_device *pdev;
76 struct regmap *regmap; 97 struct regmap *regmap;
77 bool dpll_locked; 98 bool dpll_locked;
78 u8 txclk_div[SPDIF_TXRATE_MAX]; 99 u16 txrate[SPDIF_TXRATE_MAX];
100 u8 txclk_df[SPDIF_TXRATE_MAX];
101 u8 sysclk_df[SPDIF_TXRATE_MAX];
79 u8 txclk_src[SPDIF_TXRATE_MAX]; 102 u8 txclk_src[SPDIF_TXRATE_MAX];
80 u8 rxclk_src; 103 u8 rxclk_src;
81 struct clk *txclk[SPDIF_TXRATE_MAX]; 104 struct clk *txclk[SPDIF_TXRATE_MAX];
82 struct clk *rxclk; 105 struct clk *rxclk;
106 struct clk *coreclk;
107 struct clk *sysclk;
83 struct snd_dmaengine_dai_dma_data dma_params_tx; 108 struct snd_dmaengine_dai_dma_data dma_params_tx;
84 struct snd_dmaengine_dai_dma_data dma_params_rx; 109 struct snd_dmaengine_dai_dma_data dma_params_rx;
85 110
@@ -349,7 +374,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
349 struct platform_device *pdev = spdif_priv->pdev; 374 struct platform_device *pdev = spdif_priv->pdev;
350 unsigned long csfs = 0; 375 unsigned long csfs = 0;
351 u32 stc, mask, rate; 376 u32 stc, mask, rate;
352 u8 clk, div; 377 u8 clk, txclk_df, sysclk_df;
353 int ret; 378 int ret;
354 379
355 switch (sample_rate) { 380 switch (sample_rate) {
@@ -376,25 +401,31 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
376 return -EINVAL; 401 return -EINVAL;
377 } 402 }
378 403
379 div = spdif_priv->txclk_div[rate]; 404 txclk_df = spdif_priv->txclk_df[rate];
380 if (div == 0) { 405 if (txclk_df == 0) {
381 dev_err(&pdev->dev, "the divisor can't be zero\n"); 406 dev_err(&pdev->dev, "the txclk_df can't be zero\n");
382 return -EINVAL; 407 return -EINVAL;
383 } 408 }
384 409
410 sysclk_df = spdif_priv->sysclk_df[rate];
411
412 /* Don't mess up the clocks from other modules */
413 if (clk != STC_TXCLK_SPDIF_ROOT)
414 goto clk_set_bypass;
415
385 /* 416 /*
386 * The S/PDIF block needs a clock of 64 * fs * div. The S/PDIF block 417 * The S/PDIF block needs a clock of 64 * fs * txclk_df.
387 * will divide by (div). So request 64 * fs * (div+1) which will 418 * So request 64 * fs * (txclk_df + 1) to get rounded.
388 * get rounded.
389 */ 419 */
390 ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (div + 1)); 420 ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (txclk_df + 1));
391 if (ret) { 421 if (ret) {
392 dev_err(&pdev->dev, "failed to set tx clock rate\n"); 422 dev_err(&pdev->dev, "failed to set tx clock rate\n");
393 return ret; 423 return ret;
394 } 424 }
395 425
426clk_set_bypass:
396 dev_dbg(&pdev->dev, "expected clock rate = %d\n", 427 dev_dbg(&pdev->dev, "expected clock rate = %d\n",
397 (64 * sample_rate * div)); 428 (64 * sample_rate * txclk_df * sysclk_df));
398 dev_dbg(&pdev->dev, "actual clock rate = %ld\n", 429 dev_dbg(&pdev->dev, "actual clock rate = %ld\n",
399 clk_get_rate(spdif_priv->txclk[rate])); 430 clk_get_rate(spdif_priv->txclk[rate]));
400 431
@@ -402,11 +433,15 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
402 spdif_set_cstatus(ctrl, IEC958_AES3_CON_FS, csfs); 433 spdif_set_cstatus(ctrl, IEC958_AES3_CON_FS, csfs);
403 434
404 /* select clock source and divisor */ 435 /* select clock source and divisor */
405 stc = STC_TXCLK_ALL_EN | STC_TXCLK_SRC_SET(clk) | STC_TXCLK_DIV(div); 436 stc = STC_TXCLK_ALL_EN | STC_TXCLK_SRC_SET(clk) | STC_TXCLK_DF(txclk_df);
406 mask = STC_TXCLK_ALL_EN_MASK | STC_TXCLK_SRC_MASK | STC_TXCLK_DIV_MASK; 437 mask = STC_TXCLK_ALL_EN_MASK | STC_TXCLK_SRC_MASK | STC_TXCLK_DF_MASK;
407 regmap_update_bits(regmap, REG_SPDIF_STC, mask, stc); 438 regmap_update_bits(regmap, REG_SPDIF_STC, mask, stc);
408 439
409 dev_dbg(&pdev->dev, "set sample rate to %d\n", sample_rate); 440 regmap_update_bits(regmap, REG_SPDIF_STC,
441 STC_SYSCLK_DF_MASK, STC_SYSCLK_DF(sysclk_df));
442
443 dev_dbg(&pdev->dev, "set sample rate to %dHz for %dHz playback\n",
444 spdif_priv->txrate[rate], sample_rate);
410 445
411 return 0; 446 return 0;
412} 447}
@@ -423,10 +458,16 @@ static int fsl_spdif_startup(struct snd_pcm_substream *substream,
423 458
424 /* Reset module and interrupts only for first initialization */ 459 /* Reset module and interrupts only for first initialization */
425 if (!cpu_dai->active) { 460 if (!cpu_dai->active) {
461 ret = clk_prepare_enable(spdif_priv->coreclk);
462 if (ret) {
463 dev_err(&pdev->dev, "failed to enable core clock\n");
464 return ret;
465 }
466
426 ret = spdif_softreset(spdif_priv); 467 ret = spdif_softreset(spdif_priv);
427 if (ret) { 468 if (ret) {
428 dev_err(&pdev->dev, "failed to soft reset\n"); 469 dev_err(&pdev->dev, "failed to soft reset\n");
429 return ret; 470 goto err;
430 } 471 }
431 472
432 /* Disable all the interrupts */ 473 /* Disable all the interrupts */
@@ -454,6 +495,11 @@ static int fsl_spdif_startup(struct snd_pcm_substream *substream,
454 regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_LOW_POWER, 0); 495 regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_LOW_POWER, 0);
455 496
456 return 0; 497 return 0;
498
499err:
500 clk_disable_unprepare(spdif_priv->coreclk);
501
502 return ret;
457} 503}
458 504
459static void fsl_spdif_shutdown(struct snd_pcm_substream *substream, 505static void fsl_spdif_shutdown(struct snd_pcm_substream *substream,
@@ -484,6 +530,7 @@ static void fsl_spdif_shutdown(struct snd_pcm_substream *substream,
484 spdif_intr_status_clear(spdif_priv); 530 spdif_intr_status_clear(spdif_priv);
485 regmap_update_bits(regmap, REG_SPDIF_SCR, 531 regmap_update_bits(regmap, REG_SPDIF_SCR,
486 SCR_LOW_POWER, SCR_LOW_POWER); 532 SCR_LOW_POWER, SCR_LOW_POWER);
533 clk_disable_unprepare(spdif_priv->coreclk);
487 } 534 }
488} 535}
489 536
@@ -754,7 +801,7 @@ static int spdif_get_rxclk_rate(struct fsl_spdif_priv *spdif_priv,
754 clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf; 801 clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf;
755 if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED)) { 802 if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED)) {
756 /* Get bus clock from system */ 803 /* Get bus clock from system */
757 busclk_freq = clk_get_rate(spdif_priv->rxclk); 804 busclk_freq = clk_get_rate(spdif_priv->sysclk);
758 } 805 }
759 806
760 /* FreqMeas_CLK = (BUS_CLK * FreqMeas) / 2 ^ 10 / GAINSEL / 128 */ 807 /* FreqMeas_CLK = (BUS_CLK * FreqMeas) / 2 ^ 10 / GAINSEL / 128 */
@@ -997,43 +1044,61 @@ static struct regmap_config fsl_spdif_regmap_config = {
997 1044
998static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, 1045static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
999 struct clk *clk, u64 savesub, 1046 struct clk *clk, u64 savesub,
1000 enum spdif_txrate index) 1047 enum spdif_txrate index, bool round)
1001{ 1048{
1002 const u32 rate[] = { 32000, 44100, 48000 }; 1049 const u32 rate[] = { 32000, 44100, 48000 };
1050 bool is_sysclk = clk == spdif_priv->sysclk;
1003 u64 rate_ideal, rate_actual, sub; 1051 u64 rate_ideal, rate_actual, sub;
1004 u32 div, arate; 1052 u32 sysclk_dfmin, sysclk_dfmax;
1005 1053 u32 txclk_df, sysclk_df, arate;
1006 for (div = 1; div <= 128; div++) { 1054
1007 rate_ideal = rate[index] * (div + 1) * 64; 1055 /* The sysclk has an extra divisor [2, 512] */
1008 rate_actual = clk_round_rate(clk, rate_ideal); 1056 sysclk_dfmin = is_sysclk ? 2 : 1;
1009 1057 sysclk_dfmax = is_sysclk ? 512 : 1;
1010 arate = rate_actual / 64; 1058
1011 arate /= div; 1059 for (sysclk_df = sysclk_dfmin; sysclk_df <= sysclk_dfmax; sysclk_df++) {
1012 1060 for (txclk_df = 1; txclk_df <= 128; txclk_df++) {
1013 if (arate == rate[index]) { 1061 rate_ideal = rate[index] * (txclk_df + 1) * 64;
1014 /* We are lucky */ 1062 if (round)
1015 savesub = 0; 1063 rate_actual = clk_round_rate(clk, rate_ideal);
1016 spdif_priv->txclk_div[index] = div; 1064 else
1017 break; 1065 rate_actual = clk_get_rate(clk);
1018 } else if (arate / rate[index] == 1) { 1066
1019 /* A little bigger than expect */ 1067 arate = rate_actual / 64;
1020 sub = (arate - rate[index]) * 100000; 1068 arate /= txclk_df * sysclk_df;
1021 do_div(sub, rate[index]); 1069
1022 if (sub < savesub) { 1070 if (arate == rate[index]) {
1071 /* We are lucky */
1072 savesub = 0;
1073 spdif_priv->txclk_df[index] = txclk_df;
1074 spdif_priv->sysclk_df[index] = sysclk_df;
1075 spdif_priv->txrate[index] = arate;
1076 goto out;
1077 } else if (arate / rate[index] == 1) {
1078 /* A little bigger than expect */
1079 sub = (arate - rate[index]) * 100000;
1080 do_div(sub, rate[index]);
1081 if (sub >= savesub)
1082 continue;
1023 savesub = sub; 1083 savesub = sub;
1024 spdif_priv->txclk_div[index] = div; 1084 spdif_priv->txclk_df[index] = txclk_df;
1025 } 1085 spdif_priv->sysclk_df[index] = sysclk_df;
1026 } else if (rate[index] / arate == 1) { 1086 spdif_priv->txrate[index] = arate;
1027 /* A little smaller than expect */ 1087 } else if (rate[index] / arate == 1) {
1028 sub = (rate[index] - arate) * 100000; 1088 /* A little smaller than expect */
1029 do_div(sub, rate[index]); 1089 sub = (rate[index] - arate) * 100000;
1030 if (sub < savesub) { 1090 do_div(sub, rate[index]);
1091 if (sub >= savesub)
1092 continue;
1031 savesub = sub; 1093 savesub = sub;
1032 spdif_priv->txclk_div[index] = div; 1094 spdif_priv->txclk_df[index] = txclk_df;
1095 spdif_priv->sysclk_df[index] = sysclk_df;
1096 spdif_priv->txrate[index] = arate;
1033 } 1097 }
1034 } 1098 }
1035 } 1099 }
1036 1100
1101out:
1037 return savesub; 1102 return savesub;
1038} 1103}
1039 1104
@@ -1058,7 +1123,8 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
1058 if (!clk_get_rate(clk)) 1123 if (!clk_get_rate(clk))
1059 continue; 1124 continue;
1060 1125
1061 ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index); 1126 ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index,
1127 i == STC_TXCLK_SPDIF_ROOT);
1062 if (savesub == ret) 1128 if (savesub == ret)
1063 continue; 1129 continue;
1064 1130
@@ -1073,8 +1139,13 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
1073 1139
1074 dev_dbg(&pdev->dev, "use rxtx%d as tx clock source for %dHz sample rate\n", 1140 dev_dbg(&pdev->dev, "use rxtx%d as tx clock source for %dHz sample rate\n",
1075 spdif_priv->txclk_src[index], rate[index]); 1141 spdif_priv->txclk_src[index], rate[index]);
1076 dev_dbg(&pdev->dev, "use divisor %d for %dHz sample rate\n", 1142 dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n",
1077 spdif_priv->txclk_div[index], rate[index]); 1143 spdif_priv->txclk_df[index], rate[index]);
1144 if (spdif_priv->txclk[index] == spdif_priv->sysclk)
1145 dev_dbg(&pdev->dev, "use sysclk df %d for %dHz sample rate\n",
1146 spdif_priv->sysclk_df[index], rate[index]);
1147 dev_dbg(&pdev->dev, "the best rate for %dHz sample rate is %dHz\n",
1148 rate[index], spdif_priv->txrate[index]);
1078 1149
1079 return 0; 1150 return 0;
1080} 1151}
@@ -1134,6 +1205,20 @@ static int fsl_spdif_probe(struct platform_device *pdev)
1134 return ret; 1205 return ret;
1135 } 1206 }
1136 1207
1208 /* Get system clock for rx clock rate calculation */
1209 spdif_priv->sysclk = devm_clk_get(&pdev->dev, "rxtx5");
1210 if (IS_ERR(spdif_priv->sysclk)) {
1211 dev_err(&pdev->dev, "no sys clock (rxtx5) in devicetree\n");
1212 return PTR_ERR(spdif_priv->sysclk);
1213 }
1214
1215 /* Get core clock for data register access via DMA */
1216 spdif_priv->coreclk = devm_clk_get(&pdev->dev, "core");
1217 if (IS_ERR(spdif_priv->coreclk)) {
1218 dev_err(&pdev->dev, "no core clock in devicetree\n");
1219 return PTR_ERR(spdif_priv->coreclk);
1220 }
1221
1137 /* Select clock source for rx/tx clock */ 1222 /* Select clock source for rx/tx clock */
1138 spdif_priv->rxclk = devm_clk_get(&pdev->dev, "rxtx1"); 1223 spdif_priv->rxclk = devm_clk_get(&pdev->dev, "rxtx1");
1139 if (IS_ERR(spdif_priv->rxclk)) { 1224 if (IS_ERR(spdif_priv->rxclk)) {
@@ -1186,6 +1271,7 @@ static int fsl_spdif_probe(struct platform_device *pdev)
1186 1271
1187static const struct of_device_id fsl_spdif_dt_ids[] = { 1272static const struct of_device_id fsl_spdif_dt_ids[] = {
1188 { .compatible = "fsl,imx35-spdif", }, 1273 { .compatible = "fsl,imx35-spdif", },
1274 { .compatible = "fsl,vf610-spdif", },
1189 {} 1275 {}
1190}; 1276};
1191MODULE_DEVICE_TABLE(of, fsl_spdif_dt_ids); 1277MODULE_DEVICE_TABLE(of, fsl_spdif_dt_ids);
diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h
index b1266790d117..16fde4b927d3 100644
--- a/sound/soc/fsl/fsl_spdif.h
+++ b/sound/soc/fsl/fsl_spdif.h
@@ -143,20 +143,22 @@ enum spdif_gainsel {
143#define INT_RXFIFO_FUL (1 << 0) 143#define INT_RXFIFO_FUL (1 << 0)
144 144
145/* SPDIF Clock register */ 145/* SPDIF Clock register */
146#define STC_SYSCLK_DIV_OFFSET 11 146#define STC_SYSCLK_DF_OFFSET 11
147#define STC_SYSCLK_DIV_MASK (0x1ff << STC_TXCLK_SRC_OFFSET) 147#define STC_SYSCLK_DF_MASK (0x1ff << STC_SYSCLK_DF_OFFSET)
148#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK) 148#define STC_SYSCLK_DF(x) ((((x) - 1) << STC_SYSCLK_DF_OFFSET) & STC_SYSCLK_DF_MASK)
149#define STC_TXCLK_SRC_OFFSET 8 149#define STC_TXCLK_SRC_OFFSET 8
150#define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET) 150#define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET)
151#define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK) 151#define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)
152#define STC_TXCLK_ALL_EN_OFFSET 7 152#define STC_TXCLK_ALL_EN_OFFSET 7
153#define STC_TXCLK_ALL_EN_MASK (1 << STC_TXCLK_ALL_EN_OFFSET) 153#define STC_TXCLK_ALL_EN_MASK (1 << STC_TXCLK_ALL_EN_OFFSET)
154#define STC_TXCLK_ALL_EN (1 << STC_TXCLK_ALL_EN_OFFSET) 154#define STC_TXCLK_ALL_EN (1 << STC_TXCLK_ALL_EN_OFFSET)
155#define STC_TXCLK_DIV_OFFSET 0 155#define STC_TXCLK_DF_OFFSET 0
156#define STC_TXCLK_DIV_MASK (0x7ff << STC_TXCLK_DIV_OFFSET) 156#define STC_TXCLK_DF_MASK (0x7ff << STC_TXCLK_DF_OFFSET)
157#define STC_TXCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_TXCLK_DIV_MASK) 157#define STC_TXCLK_DF(x) ((((x) - 1) << STC_TXCLK_DF_OFFSET) & STC_TXCLK_DF_MASK)
158#define STC_TXCLK_SRC_MAX 8 158#define STC_TXCLK_SRC_MAX 8
159 159
160#define STC_TXCLK_SPDIF_ROOT 1
161
160/* SPDIF tx rate */ 162/* SPDIF tx rate */
161enum spdif_txrate { 163enum spdif_txrate {
162 SPDIF_TXRATE_32000 = 0, 164 SPDIF_TXRATE_32000 = 0,
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 5428a1fda260..9bfef55d77d1 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -35,11 +35,11 @@
35#include <linux/module.h> 35#include <linux/module.h>
36#include <linux/interrupt.h> 36#include <linux/interrupt.h>
37#include <linux/clk.h> 37#include <linux/clk.h>
38#include <linux/debugfs.h>
39#include <linux/device.h> 38#include <linux/device.h>
40#include <linux/delay.h> 39#include <linux/delay.h>
41#include <linux/slab.h> 40#include <linux/slab.h>
42#include <linux/spinlock.h> 41#include <linux/spinlock.h>
42#include <linux/of.h>
43#include <linux/of_address.h> 43#include <linux/of_address.h>
44#include <linux/of_irq.h> 44#include <linux/of_irq.h>
45#include <linux/of_platform.h> 45#include <linux/of_platform.h>
@@ -54,25 +54,6 @@
54#include "fsl_ssi.h" 54#include "fsl_ssi.h"
55#include "imx-pcm.h" 55#include "imx-pcm.h"
56 56
57#ifdef PPC
58#define read_ssi(addr) in_be32(addr)
59#define write_ssi(val, addr) out_be32(addr, val)
60#define write_ssi_mask(addr, clear, set) clrsetbits_be32(addr, clear, set)
61#else
62#define read_ssi(addr) readl(addr)
63#define write_ssi(val, addr) writel(val, addr)
64/*
65 * FIXME: Proper locking should be added at write_ssi_mask caller level
66 * to ensure this register read/modify/write sequence is race free.
67 */
68static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set)
69{
70 u32 val = readl(addr);
71 val = (val & ~clear) | set;
72 writel(val, addr);
73}
74#endif
75
76/** 57/**
77 * FSLSSI_I2S_RATES: sample rates supported by the I2S 58 * FSLSSI_I2S_RATES: sample rates supported by the I2S
78 * 59 *
@@ -113,8 +94,6 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set)
113#define FSLSSI_SIER_DBG_TX_FLAGS (CCSR_SSI_SIER_TFE0_EN | \ 94#define FSLSSI_SIER_DBG_TX_FLAGS (CCSR_SSI_SIER_TFE0_EN | \
114 CCSR_SSI_SIER_TLS_EN | CCSR_SSI_SIER_TFS_EN | \ 95 CCSR_SSI_SIER_TLS_EN | CCSR_SSI_SIER_TFS_EN | \
115 CCSR_SSI_SIER_TUE0_EN | CCSR_SSI_SIER_TFRC_EN) 96 CCSR_SSI_SIER_TUE0_EN | CCSR_SSI_SIER_TFRC_EN)
116#define FSLSSI_SISR_MASK (FSLSSI_SIER_DBG_RX_FLAGS | FSLSSI_SIER_DBG_TX_FLAGS)
117
118 97
119enum fsl_ssi_type { 98enum fsl_ssi_type {
120 FSL_SSI_MCP8610, 99 FSL_SSI_MCP8610,
@@ -134,87 +113,152 @@ struct fsl_ssi_rxtx_reg_val {
134 struct fsl_ssi_reg_val rx; 113 struct fsl_ssi_reg_val rx;
135 struct fsl_ssi_reg_val tx; 114 struct fsl_ssi_reg_val tx;
136}; 115};
116static const struct regmap_config fsl_ssi_regconfig = {
117 .max_register = CCSR_SSI_SACCDIS,
118 .reg_bits = 32,
119 .val_bits = 32,
120 .reg_stride = 4,
121 .val_format_endian = REGMAP_ENDIAN_NATIVE,
122};
123
124struct fsl_ssi_soc_data {
125 bool imx;
126 bool offline_config;
127 u32 sisr_write_mask;
128};
137 129
138/** 130/**
139 * fsl_ssi_private: per-SSI private data 131 * fsl_ssi_private: per-SSI private data
140 * 132 *
141 * @ssi: pointer to the SSI's registers 133 * @reg: Pointer to the regmap registers
142 * @ssi_phys: physical address of the SSI registers
143 * @irq: IRQ of this SSI 134 * @irq: IRQ of this SSI
144 * @playback: the number of playback streams opened 135 * @cpu_dai_drv: CPU DAI driver for this device
145 * @capture: the number of capture streams opened 136 *
146 * @cpu_dai: the CPU DAI for this device 137 * @dai_fmt: DAI configuration this device is currently used with
147 * @dev_attr: the sysfs device attribute structure 138 * @i2s_mode: i2s and network mode configuration of the device. Is used to
148 * @stats: SSI statistics 139 * switch between normal and i2s/network mode
149 * @name: name for this device 140 * mode depending on the number of channels
141 * @use_dma: DMA is used or FIQ with stream filter
142 * @use_dual_fifo: DMA with support for both FIFOs used
143 * @fifo_deph: Depth of the SSI FIFOs
144 * @rxtx_reg_val: Specific register settings for receive/transmit configuration
145 *
146 * @clk: SSI clock
147 * @baudclk: SSI baud clock for master mode
148 * @baudclk_streams: Active streams that are using baudclk
149 * @bitclk_freq: bitclock frequency set by .set_dai_sysclk
150 *
151 * @dma_params_tx: DMA transmit parameters
152 * @dma_params_rx: DMA receive parameters
153 * @ssi_phys: physical address of the SSI registers
154 *
155 * @fiq_params: FIQ stream filtering parameters
156 *
157 * @pdev: Pointer to pdev used for deprecated fsl-ssi sound card
158 *
159 * @dbg_stats: Debugging statistics
160 *
161 * @soc: SoC specifc data
150 */ 162 */
151struct fsl_ssi_private { 163struct fsl_ssi_private {
152 struct ccsr_ssi __iomem *ssi; 164 struct regmap *regs;
153 dma_addr_t ssi_phys;
154 unsigned int irq; 165 unsigned int irq;
155 unsigned int fifo_depth;
156 struct snd_soc_dai_driver cpu_dai_drv; 166 struct snd_soc_dai_driver cpu_dai_drv;
157 struct platform_device *pdev;
158 167
159 enum fsl_ssi_type hw_type; 168 unsigned int dai_fmt;
160 bool new_binding; 169 u8 i2s_mode;
161 bool ssi_on_imx;
162 bool imx_ac97;
163 bool use_dma; 170 bool use_dma;
164 bool baudclk_locked;
165 bool irq_stats;
166 bool offline_config;
167 bool use_dual_fifo; 171 bool use_dual_fifo;
168 u8 i2s_mode; 172 unsigned int fifo_depth;
169 spinlock_t baudclk_lock; 173 struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
170 struct clk *baudclk; 174
171 struct clk *clk; 175 struct clk *clk;
176 struct clk *baudclk;
177 unsigned int baudclk_streams;
178 unsigned int bitclk_freq;
179
180 /* DMA params */
172 struct snd_dmaengine_dai_dma_data dma_params_tx; 181 struct snd_dmaengine_dai_dma_data dma_params_tx;
173 struct snd_dmaengine_dai_dma_data dma_params_rx; 182 struct snd_dmaengine_dai_dma_data dma_params_rx;
174 struct imx_dma_data filter_data_tx; 183 dma_addr_t ssi_phys;
175 struct imx_dma_data filter_data_rx; 184
185 /* params for non-dma FIQ stream filtered mode */
176 struct imx_pcm_fiq_params fiq_params; 186 struct imx_pcm_fiq_params fiq_params;
177 /* Register values for rx/tx configuration */
178 struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
179 187
180 struct { 188 /* Used when using fsl-ssi as sound-card. This is only used by ppc and
181 unsigned int rfrc; 189 * should be replaced with simple-sound-card. */
182 unsigned int tfrc; 190 struct platform_device *pdev;
183 unsigned int cmdau; 191
184 unsigned int cmddu; 192 struct fsl_ssi_dbg dbg_stats;
185 unsigned int rxt; 193
186 unsigned int rdr1; 194 const struct fsl_ssi_soc_data *soc;
187 unsigned int rdr0; 195};
188 unsigned int tde1; 196
189 unsigned int tde0; 197/*
190 unsigned int roe1; 198 * imx51 and later SoCs have a slightly different IP that allows the
191 unsigned int roe0; 199 * SSI configuration while the SSI unit is running.
192 unsigned int tue1; 200 *
193 unsigned int tue0; 201 * More important, it is necessary on those SoCs to configure the
194 unsigned int tfs; 202 * sperate TX/RX DMA bits just before starting the stream
195 unsigned int rfs; 203 * (fsl_ssi_trigger). The SDMA unit has to be configured before fsl_ssi
196 unsigned int tls; 204 * sends any DMA requests to the SDMA unit, otherwise it is not defined
197 unsigned int rls; 205 * how the SDMA unit handles the DMA request.
198 unsigned int rff1; 206 *
199 unsigned int rff0; 207 * SDMA units are present on devices starting at imx35 but the imx35
200 unsigned int tfe1; 208 * reference manual states that the DMA bits should not be changed
201 unsigned int tfe0; 209 * while the SSI unit is running (SSIEN). So we support the necessary
202 } stats; 210 * online configuration of fsl-ssi starting at imx51.
203 struct dentry *dbg_dir; 211 */
204 struct dentry *dbg_stats; 212
205 213static struct fsl_ssi_soc_data fsl_ssi_mpc8610 = {
206 char name[1]; 214 .imx = false,
215 .offline_config = true,
216 .sisr_write_mask = CCSR_SSI_SISR_RFRC | CCSR_SSI_SISR_TFRC |
217 CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 |
218 CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1,
219};
220
221static struct fsl_ssi_soc_data fsl_ssi_imx21 = {
222 .imx = true,
223 .offline_config = true,
224 .sisr_write_mask = 0,
225};
226
227static struct fsl_ssi_soc_data fsl_ssi_imx35 = {
228 .imx = true,
229 .offline_config = true,
230 .sisr_write_mask = CCSR_SSI_SISR_RFRC | CCSR_SSI_SISR_TFRC |
231 CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 |
232 CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1,
233};
234
235static struct fsl_ssi_soc_data fsl_ssi_imx51 = {
236 .imx = true,
237 .offline_config = false,
238 .sisr_write_mask = CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 |
239 CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1,
207}; 240};
208 241
209static const struct of_device_id fsl_ssi_ids[] = { 242static const struct of_device_id fsl_ssi_ids[] = {
210 { .compatible = "fsl,mpc8610-ssi", .data = (void *) FSL_SSI_MCP8610}, 243 { .compatible = "fsl,mpc8610-ssi", .data = &fsl_ssi_mpc8610 },
211 { .compatible = "fsl,imx51-ssi", .data = (void *) FSL_SSI_MX51}, 244 { .compatible = "fsl,imx51-ssi", .data = &fsl_ssi_imx51 },
212 { .compatible = "fsl,imx35-ssi", .data = (void *) FSL_SSI_MX35}, 245 { .compatible = "fsl,imx35-ssi", .data = &fsl_ssi_imx35 },
213 { .compatible = "fsl,imx21-ssi", .data = (void *) FSL_SSI_MX21}, 246 { .compatible = "fsl,imx21-ssi", .data = &fsl_ssi_imx21 },
214 {} 247 {}
215}; 248};
216MODULE_DEVICE_TABLE(of, fsl_ssi_ids); 249MODULE_DEVICE_TABLE(of, fsl_ssi_ids);
217 250
251static bool fsl_ssi_is_ac97(struct fsl_ssi_private *ssi_private)
252{
253 return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97);
254}
255
256static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private)
257{
258 return (ssi_private->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) ==
259 SND_SOC_DAIFMT_CBS_CFS;
260}
261
218/** 262/**
219 * fsl_ssi_isr: SSI interrupt handler 263 * fsl_ssi_isr: SSI interrupt handler
220 * 264 *
@@ -230,278 +274,98 @@ MODULE_DEVICE_TABLE(of, fsl_ssi_ids);
230static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) 274static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
231{ 275{
232 struct fsl_ssi_private *ssi_private = dev_id; 276 struct fsl_ssi_private *ssi_private = dev_id;
233 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 277 struct regmap *regs = ssi_private->regs;
234 irqreturn_t ret = IRQ_NONE;
235 __be32 sisr; 278 __be32 sisr;
236 __be32 sisr2; 279 __be32 sisr2;
237 __be32 sisr_write_mask = 0;
238
239 switch (ssi_private->hw_type) {
240 case FSL_SSI_MX21:
241 sisr_write_mask = 0;
242 break;
243
244 case FSL_SSI_MCP8610:
245 case FSL_SSI_MX35:
246 sisr_write_mask = CCSR_SSI_SISR_RFRC | CCSR_SSI_SISR_TFRC |
247 CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 |
248 CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1;
249 break;
250
251 case FSL_SSI_MX51:
252 sisr_write_mask = CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 |
253 CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1;
254 break;
255 }
256 280
257 /* We got an interrupt, so read the status register to see what we 281 /* We got an interrupt, so read the status register to see what we
258 were interrupted for. We mask it with the Interrupt Enable register 282 were interrupted for. We mask it with the Interrupt Enable register
259 so that we only check for events that we're interested in. 283 so that we only check for events that we're interested in.
260 */ 284 */
261 sisr = read_ssi(&ssi->sisr) & FSLSSI_SISR_MASK; 285 regmap_read(regs, CCSR_SSI_SISR, &sisr);
262 286
263 if (sisr & CCSR_SSI_SISR_RFRC) { 287 sisr2 = sisr & ssi_private->soc->sisr_write_mask;
264 ssi_private->stats.rfrc++;
265 ret = IRQ_HANDLED;
266 }
267
268 if (sisr & CCSR_SSI_SISR_TFRC) {
269 ssi_private->stats.tfrc++;
270 ret = IRQ_HANDLED;
271 }
272
273 if (sisr & CCSR_SSI_SISR_CMDAU) {
274 ssi_private->stats.cmdau++;
275 ret = IRQ_HANDLED;
276 }
277
278 if (sisr & CCSR_SSI_SISR_CMDDU) {
279 ssi_private->stats.cmddu++;
280 ret = IRQ_HANDLED;
281 }
282
283 if (sisr & CCSR_SSI_SISR_RXT) {
284 ssi_private->stats.rxt++;
285 ret = IRQ_HANDLED;
286 }
287
288 if (sisr & CCSR_SSI_SISR_RDR1) {
289 ssi_private->stats.rdr1++;
290 ret = IRQ_HANDLED;
291 }
292
293 if (sisr & CCSR_SSI_SISR_RDR0) {
294 ssi_private->stats.rdr0++;
295 ret = IRQ_HANDLED;
296 }
297
298 if (sisr & CCSR_SSI_SISR_TDE1) {
299 ssi_private->stats.tde1++;
300 ret = IRQ_HANDLED;
301 }
302
303 if (sisr & CCSR_SSI_SISR_TDE0) {
304 ssi_private->stats.tde0++;
305 ret = IRQ_HANDLED;
306 }
307
308 if (sisr & CCSR_SSI_SISR_ROE1) {
309 ssi_private->stats.roe1++;
310 ret = IRQ_HANDLED;
311 }
312
313 if (sisr & CCSR_SSI_SISR_ROE0) {
314 ssi_private->stats.roe0++;
315 ret = IRQ_HANDLED;
316 }
317
318 if (sisr & CCSR_SSI_SISR_TUE1) {
319 ssi_private->stats.tue1++;
320 ret = IRQ_HANDLED;
321 }
322
323 if (sisr & CCSR_SSI_SISR_TUE0) {
324 ssi_private->stats.tue0++;
325 ret = IRQ_HANDLED;
326 }
327
328 if (sisr & CCSR_SSI_SISR_TFS) {
329 ssi_private->stats.tfs++;
330 ret = IRQ_HANDLED;
331 }
332
333 if (sisr & CCSR_SSI_SISR_RFS) {
334 ssi_private->stats.rfs++;
335 ret = IRQ_HANDLED;
336 }
337
338 if (sisr & CCSR_SSI_SISR_TLS) {
339 ssi_private->stats.tls++;
340 ret = IRQ_HANDLED;
341 }
342
343 if (sisr & CCSR_SSI_SISR_RLS) {
344 ssi_private->stats.rls++;
345 ret = IRQ_HANDLED;
346 }
347
348 if (sisr & CCSR_SSI_SISR_RFF1) {
349 ssi_private->stats.rff1++;
350 ret = IRQ_HANDLED;
351 }
352
353 if (sisr & CCSR_SSI_SISR_RFF0) {
354 ssi_private->stats.rff0++;
355 ret = IRQ_HANDLED;
356 }
357
358 if (sisr & CCSR_SSI_SISR_TFE1) {
359 ssi_private->stats.tfe1++;
360 ret = IRQ_HANDLED;
361 }
362
363 if (sisr & CCSR_SSI_SISR_TFE0) {
364 ssi_private->stats.tfe0++;
365 ret = IRQ_HANDLED;
366 }
367
368 sisr2 = sisr & sisr_write_mask;
369 /* Clear the bits that we set */ 288 /* Clear the bits that we set */
370 if (sisr2) 289 if (sisr2)
371 write_ssi(sisr2, &ssi->sisr); 290 regmap_write(regs, CCSR_SSI_SISR, sisr2);
372
373 return ret;
374}
375
376#if IS_ENABLED(CONFIG_DEBUG_FS)
377/* Show the statistics of a flag only if its interrupt is enabled. The
378 * compiler will optimze this code to a no-op if the interrupt is not
379 * enabled.
380 */
381#define SIER_SHOW(flag, name) \
382 do { \
383 if (FSLSSI_SISR_MASK & CCSR_SSI_SIER_##flag) \
384 seq_printf(s, #name "=%u\n", ssi_private->stats.name); \
385 } while (0)
386
387
388/**
389 * fsl_sysfs_ssi_show: display SSI statistics
390 *
391 * Display the statistics for the current SSI device. To avoid confusion,
392 * we only show those counts that are enabled.
393 */
394static int fsl_ssi_stats_show(struct seq_file *s, void *unused)
395{
396 struct fsl_ssi_private *ssi_private = s->private;
397
398 SIER_SHOW(RFRC_EN, rfrc);
399 SIER_SHOW(TFRC_EN, tfrc);
400 SIER_SHOW(CMDAU_EN, cmdau);
401 SIER_SHOW(CMDDU_EN, cmddu);
402 SIER_SHOW(RXT_EN, rxt);
403 SIER_SHOW(RDR1_EN, rdr1);
404 SIER_SHOW(RDR0_EN, rdr0);
405 SIER_SHOW(TDE1_EN, tde1);
406 SIER_SHOW(TDE0_EN, tde0);
407 SIER_SHOW(ROE1_EN, roe1);
408 SIER_SHOW(ROE0_EN, roe0);
409 SIER_SHOW(TUE1_EN, tue1);
410 SIER_SHOW(TUE0_EN, tue0);
411 SIER_SHOW(TFS_EN, tfs);
412 SIER_SHOW(RFS_EN, rfs);
413 SIER_SHOW(TLS_EN, tls);
414 SIER_SHOW(RLS_EN, rls);
415 SIER_SHOW(RFF1_EN, rff1);
416 SIER_SHOW(RFF0_EN, rff0);
417 SIER_SHOW(TFE1_EN, tfe1);
418 SIER_SHOW(TFE0_EN, tfe0);
419
420 return 0;
421}
422
423static int fsl_ssi_stats_open(struct inode *inode, struct file *file)
424{
425 return single_open(file, fsl_ssi_stats_show, inode->i_private);
426}
427
428static const struct file_operations fsl_ssi_stats_ops = {
429 .open = fsl_ssi_stats_open,
430 .read = seq_read,
431 .llseek = seq_lseek,
432 .release = single_release,
433};
434
435static int fsl_ssi_debugfs_create(struct fsl_ssi_private *ssi_private,
436 struct device *dev)
437{
438 ssi_private->dbg_dir = debugfs_create_dir(dev_name(dev), NULL);
439 if (!ssi_private->dbg_dir)
440 return -ENOMEM;
441
442 ssi_private->dbg_stats = debugfs_create_file("stats", S_IRUGO,
443 ssi_private->dbg_dir, ssi_private, &fsl_ssi_stats_ops);
444 if (!ssi_private->dbg_stats) {
445 debugfs_remove(ssi_private->dbg_dir);
446 return -ENOMEM;
447 }
448 291
449 return 0; 292 fsl_ssi_dbg_isr(&ssi_private->dbg_stats, sisr);
450}
451
452static void fsl_ssi_debugfs_remove(struct fsl_ssi_private *ssi_private)
453{
454 debugfs_remove(ssi_private->dbg_stats);
455 debugfs_remove(ssi_private->dbg_dir);
456}
457 293
458#else 294 return IRQ_HANDLED;
459
460static int fsl_ssi_debugfs_create(struct fsl_ssi_private *ssi_private,
461 struct device *dev)
462{
463 return 0;
464} 295}
465 296
466static void fsl_ssi_debugfs_remove(struct fsl_ssi_private *ssi_private)
467{
468}
469
470#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */
471
472/* 297/*
473 * Enable/Disable all rx/tx config flags at once. 298 * Enable/Disable all rx/tx config flags at once.
474 */ 299 */
475static void fsl_ssi_rxtx_config(struct fsl_ssi_private *ssi_private, 300static void fsl_ssi_rxtx_config(struct fsl_ssi_private *ssi_private,
476 bool enable) 301 bool enable)
477{ 302{
478 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 303 struct regmap *regs = ssi_private->regs;
479 struct fsl_ssi_rxtx_reg_val *vals = &ssi_private->rxtx_reg_val; 304 struct fsl_ssi_rxtx_reg_val *vals = &ssi_private->rxtx_reg_val;
480 305
481 if (enable) { 306 if (enable) {
482 write_ssi_mask(&ssi->sier, 0, vals->rx.sier | vals->tx.sier); 307 regmap_update_bits(regs, CCSR_SSI_SIER,
483 write_ssi_mask(&ssi->srcr, 0, vals->rx.srcr | vals->tx.srcr); 308 vals->rx.sier | vals->tx.sier,
484 write_ssi_mask(&ssi->stcr, 0, vals->rx.stcr | vals->tx.stcr); 309 vals->rx.sier | vals->tx.sier);
310 regmap_update_bits(regs, CCSR_SSI_SRCR,
311 vals->rx.srcr | vals->tx.srcr,
312 vals->rx.srcr | vals->tx.srcr);
313 regmap_update_bits(regs, CCSR_SSI_STCR,
314 vals->rx.stcr | vals->tx.stcr,
315 vals->rx.stcr | vals->tx.stcr);
485 } else { 316 } else {
486 write_ssi_mask(&ssi->srcr, vals->rx.srcr | vals->tx.srcr, 0); 317 regmap_update_bits(regs, CCSR_SSI_SRCR,
487 write_ssi_mask(&ssi->stcr, vals->rx.stcr | vals->tx.stcr, 0); 318 vals->rx.srcr | vals->tx.srcr, 0);
488 write_ssi_mask(&ssi->sier, vals->rx.sier | vals->tx.sier, 0); 319 regmap_update_bits(regs, CCSR_SSI_STCR,
320 vals->rx.stcr | vals->tx.stcr, 0);
321 regmap_update_bits(regs, CCSR_SSI_SIER,
322 vals->rx.sier | vals->tx.sier, 0);
489 } 323 }
490} 324}
491 325
492/* 326/*
327 * Calculate the bits that have to be disabled for the current stream that is
328 * getting disabled. This keeps the bits enabled that are necessary for the
329 * second stream to work if 'stream_active' is true.
330 *
331 * Detailed calculation:
332 * These are the values that need to be active after disabling. For non-active
333 * second stream, this is 0:
334 * vals_stream * !!stream_active
335 *
336 * The following computes the overall differences between the setup for the
337 * to-disable stream and the active stream, a simple XOR:
338 * vals_disable ^ (vals_stream * !!(stream_active))
339 *
340 * The full expression adds a mask on all values we care about
341 */
342#define fsl_ssi_disable_val(vals_disable, vals_stream, stream_active) \
343 ((vals_disable) & \
344 ((vals_disable) ^ ((vals_stream) * (u32)!!(stream_active))))
345
346/*
493 * Enable/Disable a ssi configuration. You have to pass either 347 * Enable/Disable a ssi configuration. You have to pass either
494 * ssi_private->rxtx_reg_val.rx or tx as vals parameter. 348 * ssi_private->rxtx_reg_val.rx or tx as vals parameter.
495 */ 349 */
496static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable, 350static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable,
497 struct fsl_ssi_reg_val *vals) 351 struct fsl_ssi_reg_val *vals)
498{ 352{
499 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 353 struct regmap *regs = ssi_private->regs;
500 struct fsl_ssi_reg_val *avals; 354 struct fsl_ssi_reg_val *avals;
501 u32 scr_val = read_ssi(&ssi->scr); 355 int nr_active_streams;
502 int nr_active_streams = !!(scr_val & CCSR_SSI_SCR_TE) + 356 u32 scr_val;
357 int keep_active;
358
359 regmap_read(regs, CCSR_SSI_SCR, &scr_val);
360
361 nr_active_streams = !!(scr_val & CCSR_SSI_SCR_TE) +
503 !!(scr_val & CCSR_SSI_SCR_RE); 362 !!(scr_val & CCSR_SSI_SCR_RE);
504 363
364 if (nr_active_streams - 1 > 0)
365 keep_active = 1;
366 else
367 keep_active = 0;
368
505 /* Find the other direction values rx or tx which we do not want to 369 /* Find the other direction values rx or tx which we do not want to
506 * modify */ 370 * modify */
507 if (&ssi_private->rxtx_reg_val.rx == vals) 371 if (&ssi_private->rxtx_reg_val.rx == vals)
@@ -511,8 +375,9 @@ static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable,
511 375
512 /* If vals should be disabled, start with disabling the unit */ 376 /* If vals should be disabled, start with disabling the unit */
513 if (!enable) { 377 if (!enable) {
514 u32 scr = vals->scr & (vals->scr ^ avals->scr); 378 u32 scr = fsl_ssi_disable_val(vals->scr, avals->scr,
515 write_ssi_mask(&ssi->scr, scr, 0); 379 keep_active);
380 regmap_update_bits(regs, CCSR_SSI_SCR, scr, 0);
516 } 381 }
517 382
518 /* 383 /*
@@ -520,9 +385,9 @@ static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable,
520 * reconfiguration, so we have to enable all necessary flags at once 385 * reconfiguration, so we have to enable all necessary flags at once
521 * even if we do not use them later (capture and playback configuration) 386 * even if we do not use them later (capture and playback configuration)
522 */ 387 */
523 if (ssi_private->offline_config) { 388 if (ssi_private->soc->offline_config) {
524 if ((enable && !nr_active_streams) || 389 if ((enable && !nr_active_streams) ||
525 (!enable && nr_active_streams == 1)) 390 (!enable && !keep_active))
526 fsl_ssi_rxtx_config(ssi_private, enable); 391 fsl_ssi_rxtx_config(ssi_private, enable);
527 392
528 goto config_done; 393 goto config_done;
@@ -533,9 +398,9 @@ static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable,
533 * (online configuration) 398 * (online configuration)
534 */ 399 */
535 if (enable) { 400 if (enable) {
536 write_ssi_mask(&ssi->sier, 0, vals->sier); 401 regmap_update_bits(regs, CCSR_SSI_SIER, vals->sier, vals->sier);
537 write_ssi_mask(&ssi->srcr, 0, vals->srcr); 402 regmap_update_bits(regs, CCSR_SSI_SRCR, vals->srcr, vals->srcr);
538 write_ssi_mask(&ssi->stcr, 0, vals->stcr); 403 regmap_update_bits(regs, CCSR_SSI_STCR, vals->stcr, vals->stcr);
539 } else { 404 } else {
540 u32 sier; 405 u32 sier;
541 u32 srcr; 406 u32 srcr;
@@ -551,19 +416,22 @@ static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable,
551 */ 416 */
552 417
553 /* These assignments are simply vals without bits set in avals*/ 418 /* These assignments are simply vals without bits set in avals*/
554 sier = vals->sier & (vals->sier ^ avals->sier); 419 sier = fsl_ssi_disable_val(vals->sier, avals->sier,
555 srcr = vals->srcr & (vals->srcr ^ avals->srcr); 420 keep_active);
556 stcr = vals->stcr & (vals->stcr ^ avals->stcr); 421 srcr = fsl_ssi_disable_val(vals->srcr, avals->srcr,
557 422 keep_active);
558 write_ssi_mask(&ssi->srcr, srcr, 0); 423 stcr = fsl_ssi_disable_val(vals->stcr, avals->stcr,
559 write_ssi_mask(&ssi->stcr, stcr, 0); 424 keep_active);
560 write_ssi_mask(&ssi->sier, sier, 0); 425
426 regmap_update_bits(regs, CCSR_SSI_SRCR, srcr, 0);
427 regmap_update_bits(regs, CCSR_SSI_STCR, stcr, 0);
428 regmap_update_bits(regs, CCSR_SSI_SIER, sier, 0);
561 } 429 }
562 430
563config_done: 431config_done:
564 /* Enabling of subunits is done after configuration */ 432 /* Enabling of subunits is done after configuration */
565 if (enable) 433 if (enable)
566 write_ssi_mask(&ssi->scr, 0, vals->scr); 434 regmap_update_bits(regs, CCSR_SSI_SCR, vals->scr, vals->scr);
567} 435}
568 436
569 437
@@ -593,7 +461,7 @@ static void fsl_ssi_setup_reg_vals(struct fsl_ssi_private *ssi_private)
593 reg->tx.stcr = CCSR_SSI_STCR_TFEN0; 461 reg->tx.stcr = CCSR_SSI_STCR_TFEN0;
594 reg->tx.scr = 0; 462 reg->tx.scr = 0;
595 463
596 if (!ssi_private->imx_ac97) { 464 if (!fsl_ssi_is_ac97(ssi_private)) {
597 reg->rx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE; 465 reg->rx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE;
598 reg->rx.sier |= CCSR_SSI_SIER_RFF0_EN; 466 reg->rx.sier |= CCSR_SSI_SIER_RFF0_EN;
599 reg->tx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE; 467 reg->tx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE;
@@ -614,124 +482,35 @@ static void fsl_ssi_setup_reg_vals(struct fsl_ssi_private *ssi_private)
614 482
615static void fsl_ssi_setup_ac97(struct fsl_ssi_private *ssi_private) 483static void fsl_ssi_setup_ac97(struct fsl_ssi_private *ssi_private)
616{ 484{
617 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 485 struct regmap *regs = ssi_private->regs;
618 486
619 /* 487 /*
620 * Setup the clock control register 488 * Setup the clock control register
621 */ 489 */
622 write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), 490 regmap_write(regs, CCSR_SSI_STCCR,
623 &ssi->stccr); 491 CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13));
624 write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), 492 regmap_write(regs, CCSR_SSI_SRCCR,
625 &ssi->srccr); 493 CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13));
626 494
627 /* 495 /*
628 * Enable AC97 mode and startup the SSI 496 * Enable AC97 mode and startup the SSI
629 */ 497 */
630 write_ssi(CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV, 498 regmap_write(regs, CCSR_SSI_SACNT,
631 &ssi->sacnt); 499 CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV);
632 write_ssi(0xff, &ssi->saccdis); 500 regmap_write(regs, CCSR_SSI_SACCDIS, 0xff);
633 write_ssi(0x300, &ssi->saccen); 501 regmap_write(regs, CCSR_SSI_SACCEN, 0x300);
634 502
635 /* 503 /*
636 * Enable SSI, Transmit and Receive. AC97 has to communicate with the 504 * Enable SSI, Transmit and Receive. AC97 has to communicate with the
637 * codec before a stream is started. 505 * codec before a stream is started.
638 */ 506 */
639 write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | 507 regmap_update_bits(regs, CCSR_SSI_SCR,
640 CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE); 508 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE,
509 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE);
641 510
642 write_ssi(CCSR_SSI_SOR_WAIT(3), &ssi->sor); 511 regmap_write(regs, CCSR_SSI_SOR, CCSR_SSI_SOR_WAIT(3));
643} 512}
644 513
645static int fsl_ssi_setup(struct fsl_ssi_private *ssi_private)
646{
647 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
648 u8 wm;
649 int synchronous = ssi_private->cpu_dai_drv.symmetric_rates;
650
651 fsl_ssi_setup_reg_vals(ssi_private);
652
653 if (ssi_private->imx_ac97)
654 ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_NORMAL | CCSR_SSI_SCR_NET;
655 else
656 ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_SLAVE;
657
658 /*
659 * Section 16.5 of the MPC8610 reference manual says that the SSI needs
660 * to be disabled before updating the registers we set here.
661 */
662 write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_SSIEN, 0);
663
664 /*
665 * Program the SSI into I2S Slave Non-Network Synchronous mode. Also
666 * enable the transmit and receive FIFO.
667 *
668 * FIXME: Little-endian samples require a different shift dir
669 */
670 write_ssi_mask(&ssi->scr,
671 CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN,
672 CCSR_SSI_SCR_TFR_CLK_DIS |
673 ssi_private->i2s_mode |
674 (synchronous ? CCSR_SSI_SCR_SYN : 0));
675
676 write_ssi(CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFSI |
677 CCSR_SSI_STCR_TEFS | CCSR_SSI_STCR_TSCKP, &ssi->stcr);
678
679 write_ssi(CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFSI |
680 CCSR_SSI_SRCR_REFS | CCSR_SSI_SRCR_RSCKP, &ssi->srcr);
681
682 /*
683 * The DC and PM bits are only used if the SSI is the clock master.
684 */
685
686 /*
687 * Set the watermark for transmit FIFI 0 and receive FIFO 0. We don't
688 * use FIFO 1. We program the transmit water to signal a DMA transfer
689 * if there are only two (or fewer) elements left in the FIFO. Two
690 * elements equals one frame (left channel, right channel). This value,
691 * however, depends on the depth of the transmit buffer.
692 *
693 * We set the watermark on the same level as the DMA burstsize. For
694 * fiq it is probably better to use the biggest possible watermark
695 * size.
696 */
697 if (ssi_private->use_dma)
698 wm = ssi_private->fifo_depth - 2;
699 else
700 wm = ssi_private->fifo_depth;
701
702 write_ssi(CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) |
703 CCSR_SSI_SFCSR_TFWM1(wm) | CCSR_SSI_SFCSR_RFWM1(wm),
704 &ssi->sfcsr);
705
706 /*
707 * For ac97 interrupts are enabled with the startup of the substream
708 * because it is also running without an active substream. Normally SSI
709 * is only enabled when there is a substream.
710 */
711 if (ssi_private->imx_ac97)
712 fsl_ssi_setup_ac97(ssi_private);
713
714 /*
715 * Set a default slot number so that there is no need for those common
716 * cases like I2S mode to call the extra set_tdm_slot() any more.
717 */
718 if (!ssi_private->imx_ac97) {
719 write_ssi_mask(&ssi->stccr, CCSR_SSI_SxCCR_DC_MASK,
720 CCSR_SSI_SxCCR_DC(2));
721 write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_DC_MASK,
722 CCSR_SSI_SxCCR_DC(2));
723 }
724
725 if (ssi_private->use_dual_fifo) {
726 write_ssi_mask(&ssi->srcr, 0, CCSR_SSI_SRCR_RFEN1);
727 write_ssi_mask(&ssi->stcr, 0, CCSR_SSI_STCR_TFEN1);
728 write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_TCH_EN);
729 }
730
731 return 0;
732}
733
734
735/** 514/**
736 * fsl_ssi_startup: create a new substream 515 * fsl_ssi_startup: create a new substream
737 * 516 *
@@ -746,18 +525,6 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
746 struct snd_soc_pcm_runtime *rtd = substream->private_data; 525 struct snd_soc_pcm_runtime *rtd = substream->private_data;
747 struct fsl_ssi_private *ssi_private = 526 struct fsl_ssi_private *ssi_private =
748 snd_soc_dai_get_drvdata(rtd->cpu_dai); 527 snd_soc_dai_get_drvdata(rtd->cpu_dai);
749 unsigned long flags;
750
751 /* First, we only do fsl_ssi_setup() when SSI is going to be active.
752 * Second, fsl_ssi_setup was already called by ac97_init earlier if
753 * the driver is in ac97 mode.
754 */
755 if (!dai->active && !ssi_private->imx_ac97) {
756 fsl_ssi_setup(ssi_private);
757 spin_lock_irqsave(&ssi_private->baudclk_lock, flags);
758 ssi_private->baudclk_locked = false;
759 spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags);
760 }
761 528
762 /* When using dual fifo mode, it is safer to ensure an even period 529 /* When using dual fifo mode, it is safer to ensure an even period
763 * size. If appearing to an odd number while DMA always starts its 530 * size. If appearing to an odd number while DMA always starts its
@@ -772,6 +539,122 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
772} 539}
773 540
774/** 541/**
542 * fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
543 *
544 * Note: This function can be only called when using SSI as DAI master
545 *
546 * Quick instruction for parameters:
547 * freq: Output BCLK frequency = samplerate * 32 (fixed) * channels
548 * dir: SND_SOC_CLOCK_OUT -> TxBCLK, SND_SOC_CLOCK_IN -> RxBCLK.
549 */
550static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
551 struct snd_soc_dai *cpu_dai,
552 struct snd_pcm_hw_params *hw_params)
553{
554 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
555 struct regmap *regs = ssi_private->regs;
556 int synchronous = ssi_private->cpu_dai_drv.symmetric_rates, ret;
557 u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i;
558 unsigned long clkrate, baudrate, tmprate;
559 u64 sub, savesub = 100000;
560 unsigned int freq;
561 bool baudclk_is_used;
562
563 /* Prefer the explicitly set bitclock frequency */
564 if (ssi_private->bitclk_freq)
565 freq = ssi_private->bitclk_freq;
566 else
567 freq = params_channels(hw_params) * 32 * params_rate(hw_params);
568
569 /* Don't apply it to any non-baudclk circumstance */
570 if (IS_ERR(ssi_private->baudclk))
571 return -EINVAL;
572
573 baudclk_is_used = ssi_private->baudclk_streams & ~(BIT(substream->stream));
574
575 /* It should be already enough to divide clock by setting pm alone */
576 psr = 0;
577 div2 = 0;
578
579 factor = (div2 + 1) * (7 * psr + 1) * 2;
580
581 for (i = 0; i < 255; i++) {
582 /* The bclk rate must be smaller than 1/5 sysclk rate */
583 if (factor * (i + 1) < 5)
584 continue;
585
586 tmprate = freq * factor * (i + 2);
587
588 if (baudclk_is_used)
589 clkrate = clk_get_rate(ssi_private->baudclk);
590 else
591 clkrate = clk_round_rate(ssi_private->baudclk, tmprate);
592
593 do_div(clkrate, factor);
594 afreq = (u32)clkrate / (i + 1);
595
596 if (freq == afreq)
597 sub = 0;
598 else if (freq / afreq == 1)
599 sub = freq - afreq;
600 else if (afreq / freq == 1)
601 sub = afreq - freq;
602 else
603 continue;
604
605 /* Calculate the fraction */
606 sub *= 100000;
607 do_div(sub, freq);
608
609 if (sub < savesub) {
610 baudrate = tmprate;
611 savesub = sub;
612 pm = i;
613 }
614
615 /* We are lucky */
616 if (savesub == 0)
617 break;
618 }
619
620 /* No proper pm found if it is still remaining the initial value */
621 if (pm == 999) {
622 dev_err(cpu_dai->dev, "failed to handle the required sysclk\n");
623 return -EINVAL;
624 }
625
626 stccr = CCSR_SSI_SxCCR_PM(pm + 1) | (div2 ? CCSR_SSI_SxCCR_DIV2 : 0) |
627 (psr ? CCSR_SSI_SxCCR_PSR : 0);
628 mask = CCSR_SSI_SxCCR_PM_MASK | CCSR_SSI_SxCCR_DIV2 |
629 CCSR_SSI_SxCCR_PSR;
630
631 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || synchronous)
632 regmap_update_bits(regs, CCSR_SSI_STCCR, mask, stccr);
633 else
634 regmap_update_bits(regs, CCSR_SSI_SRCCR, mask, stccr);
635
636 if (!baudclk_is_used) {
637 ret = clk_set_rate(ssi_private->baudclk, baudrate);
638 if (ret) {
639 dev_err(cpu_dai->dev, "failed to set baudclk rate\n");
640 return -EINVAL;
641 }
642 }
643
644 return 0;
645}
646
647static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
648 int clk_id, unsigned int freq, int dir)
649{
650 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
651
652 ssi_private->bitclk_freq = freq;
653
654 return 0;
655}
656
657/**
775 * fsl_ssi_hw_params - program the sample size 658 * fsl_ssi_hw_params - program the sample size
776 * 659 *
777 * Most of the SSI registers have been programmed in the startup function, 660 * Most of the SSI registers have been programmed in the startup function,
@@ -788,12 +671,17 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
788 struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai) 671 struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai)
789{ 672{
790 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); 673 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
791 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 674 struct regmap *regs = ssi_private->regs;
792 unsigned int channels = params_channels(hw_params); 675 unsigned int channels = params_channels(hw_params);
793 unsigned int sample_size = 676 unsigned int sample_size =
794 snd_pcm_format_width(params_format(hw_params)); 677 snd_pcm_format_width(params_format(hw_params));
795 u32 wl = CCSR_SSI_SxCCR_WL(sample_size); 678 u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
796 int enabled = read_ssi(&ssi->scr) & CCSR_SSI_SCR_SSIEN; 679 int ret;
680 u32 scr_val;
681 int enabled;
682
683 regmap_read(regs, CCSR_SSI_SCR, &scr_val);
684 enabled = scr_val & CCSR_SSI_SCR_SSIEN;
797 685
798 /* 686 /*
799 * If we're in synchronous mode, and the SSI is already enabled, 687 * If we're in synchronous mode, and the SSI is already enabled,
@@ -802,6 +690,21 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
802 if (enabled && ssi_private->cpu_dai_drv.symmetric_rates) 690 if (enabled && ssi_private->cpu_dai_drv.symmetric_rates)
803 return 0; 691 return 0;
804 692
693 if (fsl_ssi_is_i2s_master(ssi_private)) {
694 ret = fsl_ssi_set_bclk(substream, cpu_dai, hw_params);
695 if (ret)
696 return ret;
697
698 /* Do not enable the clock if it is already enabled */
699 if (!(ssi_private->baudclk_streams & BIT(substream->stream))) {
700 ret = clk_prepare_enable(ssi_private->baudclk);
701 if (ret)
702 return ret;
703
704 ssi_private->baudclk_streams |= BIT(substream->stream);
705 }
706 }
707
805 /* 708 /*
806 * FIXME: The documentation says that SxCCR[WL] should not be 709 * FIXME: The documentation says that SxCCR[WL] should not be
807 * modified while the SSI is enabled. The only time this can 710 * modified while the SSI is enabled. The only time this can
@@ -815,49 +718,83 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
815 /* In synchronous mode, the SSI uses STCCR for capture */ 718 /* In synchronous mode, the SSI uses STCCR for capture */
816 if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) || 719 if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ||
817 ssi_private->cpu_dai_drv.symmetric_rates) 720 ssi_private->cpu_dai_drv.symmetric_rates)
818 write_ssi_mask(&ssi->stccr, CCSR_SSI_SxCCR_WL_MASK, wl); 721 regmap_update_bits(regs, CCSR_SSI_STCCR, CCSR_SSI_SxCCR_WL_MASK,
722 wl);
819 else 723 else
820 write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_WL_MASK, wl); 724 regmap_update_bits(regs, CCSR_SSI_SRCCR, CCSR_SSI_SxCCR_WL_MASK,
725 wl);
821 726
822 if (!ssi_private->imx_ac97) 727 if (!fsl_ssi_is_ac97(ssi_private))
823 write_ssi_mask(&ssi->scr, 728 regmap_update_bits(regs, CCSR_SSI_SCR,
824 CCSR_SSI_SCR_NET | CCSR_SSI_SCR_I2S_MODE_MASK, 729 CCSR_SSI_SCR_NET | CCSR_SSI_SCR_I2S_MODE_MASK,
825 channels == 1 ? 0 : ssi_private->i2s_mode); 730 channels == 1 ? 0 : ssi_private->i2s_mode);
826 731
827 return 0; 732 return 0;
828} 733}
829 734
830/** 735static int fsl_ssi_hw_free(struct snd_pcm_substream *substream,
831 * fsl_ssi_set_dai_fmt - configure Digital Audio Interface Format. 736 struct snd_soc_dai *cpu_dai)
832 */
833static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
834{ 737{
835 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); 738 struct snd_soc_pcm_runtime *rtd = substream->private_data;
836 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 739 struct fsl_ssi_private *ssi_private =
740 snd_soc_dai_get_drvdata(rtd->cpu_dai);
741
742 if (fsl_ssi_is_i2s_master(ssi_private) &&
743 ssi_private->baudclk_streams & BIT(substream->stream)) {
744 clk_disable_unprepare(ssi_private->baudclk);
745 ssi_private->baudclk_streams &= ~BIT(substream->stream);
746 }
747
748 return 0;
749}
750
751static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
752 unsigned int fmt)
753{
754 struct regmap *regs = ssi_private->regs;
837 u32 strcr = 0, stcr, srcr, scr, mask; 755 u32 strcr = 0, stcr, srcr, scr, mask;
756 u8 wm;
838 757
839 scr = read_ssi(&ssi->scr) & ~(CCSR_SSI_SCR_SYN | CCSR_SSI_SCR_I2S_MODE_MASK); 758 ssi_private->dai_fmt = fmt;
840 scr |= CCSR_SSI_SCR_NET; 759
760 if (fsl_ssi_is_i2s_master(ssi_private) && IS_ERR(ssi_private->baudclk)) {
761 dev_err(&ssi_private->pdev->dev, "baudclk is missing which is necessary for master mode\n");
762 return -EINVAL;
763 }
764
765 fsl_ssi_setup_reg_vals(ssi_private);
766
767 regmap_read(regs, CCSR_SSI_SCR, &scr);
768 scr &= ~(CCSR_SSI_SCR_SYN | CCSR_SSI_SCR_I2S_MODE_MASK);
769 scr |= CCSR_SSI_SCR_SYNC_TX_FS;
841 770
842 mask = CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFDIR | CCSR_SSI_STCR_TXDIR | 771 mask = CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFDIR | CCSR_SSI_STCR_TXDIR |
843 CCSR_SSI_STCR_TSCKP | CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TFSL | 772 CCSR_SSI_STCR_TSCKP | CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TFSL |
844 CCSR_SSI_STCR_TEFS; 773 CCSR_SSI_STCR_TEFS;
845 stcr = read_ssi(&ssi->stcr) & ~mask; 774 regmap_read(regs, CCSR_SSI_STCR, &stcr);
846 srcr = read_ssi(&ssi->srcr) & ~mask; 775 regmap_read(regs, CCSR_SSI_SRCR, &srcr);
776 stcr &= ~mask;
777 srcr &= ~mask;
847 778
779 ssi_private->i2s_mode = CCSR_SSI_SCR_NET;
848 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 780 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
849 case SND_SOC_DAIFMT_I2S: 781 case SND_SOC_DAIFMT_I2S:
850 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 782 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
851 case SND_SOC_DAIFMT_CBS_CFS: 783 case SND_SOC_DAIFMT_CBS_CFS:
852 ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_MASTER; 784 ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_MASTER;
785 regmap_update_bits(regs, CCSR_SSI_STCCR,
786 CCSR_SSI_SxCCR_DC_MASK,
787 CCSR_SSI_SxCCR_DC(2));
788 regmap_update_bits(regs, CCSR_SSI_SRCCR,
789 CCSR_SSI_SxCCR_DC_MASK,
790 CCSR_SSI_SxCCR_DC(2));
853 break; 791 break;
854 case SND_SOC_DAIFMT_CBM_CFM: 792 case SND_SOC_DAIFMT_CBM_CFM:
855 ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_SLAVE; 793 ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_SLAVE;
856 break; 794 break;
857 default: 795 default:
858 return -EINVAL; 796 return -EINVAL;
859 } 797 }
860 scr |= ssi_private->i2s_mode;
861 798
862 /* Data on rising edge of bclk, frame low, 1clk before data */ 799 /* Data on rising edge of bclk, frame low, 1clk before data */
863 strcr |= CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TSCKP | 800 strcr |= CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TSCKP |
@@ -877,9 +814,13 @@ static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
877 strcr |= CCSR_SSI_STCR_TFSL | CCSR_SSI_STCR_TSCKP | 814 strcr |= CCSR_SSI_STCR_TFSL | CCSR_SSI_STCR_TSCKP |
878 CCSR_SSI_STCR_TXBIT0; 815 CCSR_SSI_STCR_TXBIT0;
879 break; 816 break;
817 case SND_SOC_DAIFMT_AC97:
818 ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_NORMAL;
819 break;
880 default: 820 default:
881 return -EINVAL; 821 return -EINVAL;
882 } 822 }
823 scr |= ssi_private->i2s_mode;
883 824
884 /* DAI clock inversion */ 825 /* DAI clock inversion */
885 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 826 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
@@ -925,105 +866,54 @@ static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
925 scr |= CCSR_SSI_SCR_SYN; 866 scr |= CCSR_SSI_SCR_SYN;
926 } 867 }
927 868
928 write_ssi(stcr, &ssi->stcr); 869 regmap_write(regs, CCSR_SSI_STCR, stcr);
929 write_ssi(srcr, &ssi->srcr); 870 regmap_write(regs, CCSR_SSI_SRCR, srcr);
930 write_ssi(scr, &ssi->scr); 871 regmap_write(regs, CCSR_SSI_SCR, scr);
931
932 return 0;
933}
934 872
935/** 873 /*
936 * fsl_ssi_set_dai_sysclk - configure Digital Audio Interface bit clock 874 * Set the watermark for transmit FIFI 0 and receive FIFO 0. We don't
937 * 875 * use FIFO 1. We program the transmit water to signal a DMA transfer
938 * Note: This function can be only called when using SSI as DAI master 876 * if there are only two (or fewer) elements left in the FIFO. Two
939 * 877 * elements equals one frame (left channel, right channel). This value,
940 * Quick instruction for parameters: 878 * however, depends on the depth of the transmit buffer.
941 * freq: Output BCLK frequency = samplerate * 32 (fixed) * channels 879 *
942 * dir: SND_SOC_CLOCK_OUT -> TxBCLK, SND_SOC_CLOCK_IN -> RxBCLK. 880 * We set the watermark on the same level as the DMA burstsize. For
943 */ 881 * fiq it is probably better to use the biggest possible watermark
944static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai, 882 * size.
945 int clk_id, unsigned int freq, int dir) 883 */
946{ 884 if (ssi_private->use_dma)
947 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); 885 wm = ssi_private->fifo_depth - 2;
948 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 886 else
949 int synchronous = ssi_private->cpu_dai_drv.symmetric_rates, ret; 887 wm = ssi_private->fifo_depth;
950 u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i;
951 unsigned long flags, clkrate, baudrate, tmprate;
952 u64 sub, savesub = 100000;
953
954 /* Don't apply it to any non-baudclk circumstance */
955 if (IS_ERR(ssi_private->baudclk))
956 return -EINVAL;
957
958 /* It should be already enough to divide clock by setting pm alone */
959 psr = 0;
960 div2 = 0;
961
962 factor = (div2 + 1) * (7 * psr + 1) * 2;
963
964 for (i = 0; i < 255; i++) {
965 /* The bclk rate must be smaller than 1/5 sysclk rate */
966 if (factor * (i + 1) < 5)
967 continue;
968
969 tmprate = freq * factor * (i + 2);
970 clkrate = clk_round_rate(ssi_private->baudclk, tmprate);
971
972 do_div(clkrate, factor);
973 afreq = (u32)clkrate / (i + 1);
974
975 if (freq == afreq)
976 sub = 0;
977 else if (freq / afreq == 1)
978 sub = freq - afreq;
979 else if (afreq / freq == 1)
980 sub = afreq - freq;
981 else
982 continue;
983
984 /* Calculate the fraction */
985 sub *= 100000;
986 do_div(sub, freq);
987 888
988 if (sub < savesub) { 889 regmap_write(regs, CCSR_SSI_SFCSR,
989 baudrate = tmprate; 890 CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) |
990 savesub = sub; 891 CCSR_SSI_SFCSR_TFWM1(wm) | CCSR_SSI_SFCSR_RFWM1(wm));
991 pm = i;
992 }
993 892
994 /* We are lucky */ 893 if (ssi_private->use_dual_fifo) {
995 if (savesub == 0) 894 regmap_update_bits(regs, CCSR_SSI_SRCR, CCSR_SSI_SRCR_RFEN1,
996 break; 895 CCSR_SSI_SRCR_RFEN1);
896 regmap_update_bits(regs, CCSR_SSI_STCR, CCSR_SSI_STCR_TFEN1,
897 CCSR_SSI_STCR_TFEN1);
898 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_TCH_EN,
899 CCSR_SSI_SCR_TCH_EN);
997 } 900 }
998 901
999 /* No proper pm found if it is still remaining the initial value */ 902 if (fmt & SND_SOC_DAIFMT_AC97)
1000 if (pm == 999) { 903 fsl_ssi_setup_ac97(ssi_private);
1001 dev_err(cpu_dai->dev, "failed to handle the required sysclk\n");
1002 return -EINVAL;
1003 }
1004 904
1005 stccr = CCSR_SSI_SxCCR_PM(pm + 1) | (div2 ? CCSR_SSI_SxCCR_DIV2 : 0) | 905 return 0;
1006 (psr ? CCSR_SSI_SxCCR_PSR : 0);
1007 mask = CCSR_SSI_SxCCR_PM_MASK | CCSR_SSI_SxCCR_DIV2 | CCSR_SSI_SxCCR_PSR;
1008 906
1009 if (dir == SND_SOC_CLOCK_OUT || synchronous) 907}
1010 write_ssi_mask(&ssi->stccr, mask, stccr);
1011 else
1012 write_ssi_mask(&ssi->srccr, mask, stccr);
1013 908
1014 spin_lock_irqsave(&ssi_private->baudclk_lock, flags); 909/**
1015 if (!ssi_private->baudclk_locked) { 910 * fsl_ssi_set_dai_fmt - configure Digital Audio Interface Format.
1016 ret = clk_set_rate(ssi_private->baudclk, baudrate); 911 */
1017 if (ret) { 912static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
1018 spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags); 913{
1019 dev_err(cpu_dai->dev, "failed to set baudclk rate\n"); 914 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
1020 return -EINVAL;
1021 }
1022 ssi_private->baudclk_locked = true;
1023 }
1024 spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags);
1025 915
1026 return 0; 916 return _fsl_ssi_set_dai_fmt(ssi_private, fmt);
1027} 917}
1028 918
1029/** 919/**
@@ -1035,31 +925,34 @@ static int fsl_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
1035 u32 rx_mask, int slots, int slot_width) 925 u32 rx_mask, int slots, int slot_width)
1036{ 926{
1037 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); 927 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
1038 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 928 struct regmap *regs = ssi_private->regs;
1039 u32 val; 929 u32 val;
1040 930
1041 /* The slot number should be >= 2 if using Network mode or I2S mode */ 931 /* The slot number should be >= 2 if using Network mode or I2S mode */
1042 val = read_ssi(&ssi->scr) & (CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_NET); 932 regmap_read(regs, CCSR_SSI_SCR, &val);
933 val &= CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_NET;
1043 if (val && slots < 2) { 934 if (val && slots < 2) {
1044 dev_err(cpu_dai->dev, "slot number should be >= 2 in I2S or NET\n"); 935 dev_err(cpu_dai->dev, "slot number should be >= 2 in I2S or NET\n");
1045 return -EINVAL; 936 return -EINVAL;
1046 } 937 }
1047 938
1048 write_ssi_mask(&ssi->stccr, CCSR_SSI_SxCCR_DC_MASK, 939 regmap_update_bits(regs, CCSR_SSI_STCCR, CCSR_SSI_SxCCR_DC_MASK,
1049 CCSR_SSI_SxCCR_DC(slots)); 940 CCSR_SSI_SxCCR_DC(slots));
1050 write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_DC_MASK, 941 regmap_update_bits(regs, CCSR_SSI_SRCCR, CCSR_SSI_SxCCR_DC_MASK,
1051 CCSR_SSI_SxCCR_DC(slots)); 942 CCSR_SSI_SxCCR_DC(slots));
1052 943
1053 /* The register SxMSKs needs SSI to provide essential clock due to 944 /* The register SxMSKs needs SSI to provide essential clock due to
1054 * hardware design. So we here temporarily enable SSI to set them. 945 * hardware design. So we here temporarily enable SSI to set them.
1055 */ 946 */
1056 val = read_ssi(&ssi->scr) & CCSR_SSI_SCR_SSIEN; 947 regmap_read(regs, CCSR_SSI_SCR, &val);
1057 write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN); 948 val &= CCSR_SSI_SCR_SSIEN;
949 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_SSIEN,
950 CCSR_SSI_SCR_SSIEN);
1058 951
1059 write_ssi(tx_mask, &ssi->stmsk); 952 regmap_write(regs, CCSR_SSI_STMSK, tx_mask);
1060 write_ssi(rx_mask, &ssi->srmsk); 953 regmap_write(regs, CCSR_SSI_SRMSK, rx_mask);
1061 954
1062 write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_SSIEN, val); 955 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_SSIEN, val);
1063 956
1064 return 0; 957 return 0;
1065} 958}
@@ -1078,11 +971,11 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
1078{ 971{
1079 struct snd_soc_pcm_runtime *rtd = substream->private_data; 972 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1080 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai); 973 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai);
1081 struct ccsr_ssi __iomem *ssi = ssi_private->ssi; 974 struct regmap *regs = ssi_private->regs;
1082 unsigned long flags;
1083 975
1084 switch (cmd) { 976 switch (cmd) {
1085 case SNDRV_PCM_TRIGGER_START: 977 case SNDRV_PCM_TRIGGER_START:
978 case SNDRV_PCM_TRIGGER_RESUME:
1086 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 979 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1087 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 980 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1088 fsl_ssi_tx_config(ssi_private, true); 981 fsl_ssi_tx_config(ssi_private, true);
@@ -1091,29 +984,23 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
1091 break; 984 break;
1092 985
1093 case SNDRV_PCM_TRIGGER_STOP: 986 case SNDRV_PCM_TRIGGER_STOP:
987 case SNDRV_PCM_TRIGGER_SUSPEND:
1094 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 988 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1095 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 989 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1096 fsl_ssi_tx_config(ssi_private, false); 990 fsl_ssi_tx_config(ssi_private, false);
1097 else 991 else
1098 fsl_ssi_rx_config(ssi_private, false); 992 fsl_ssi_rx_config(ssi_private, false);
1099
1100 if (!ssi_private->imx_ac97 && (read_ssi(&ssi->scr) &
1101 (CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE)) == 0) {
1102 spin_lock_irqsave(&ssi_private->baudclk_lock, flags);
1103 ssi_private->baudclk_locked = false;
1104 spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags);
1105 }
1106 break; 993 break;
1107 994
1108 default: 995 default:
1109 return -EINVAL; 996 return -EINVAL;
1110 } 997 }
1111 998
1112 if (ssi_private->imx_ac97) { 999 if (fsl_ssi_is_ac97(ssi_private)) {
1113 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1000 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1114 write_ssi(CCSR_SSI_SOR_TX_CLR, &ssi->sor); 1001 regmap_write(regs, CCSR_SSI_SOR, CCSR_SSI_SOR_TX_CLR);
1115 else 1002 else
1116 write_ssi(CCSR_SSI_SOR_RX_CLR, &ssi->sor); 1003 regmap_write(regs, CCSR_SSI_SOR, CCSR_SSI_SOR_RX_CLR);
1117 } 1004 }
1118 1005
1119 return 0; 1006 return 0;
@@ -1123,7 +1010,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
1123{ 1010{
1124 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(dai); 1011 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(dai);
1125 1012
1126 if (ssi_private->ssi_on_imx && ssi_private->use_dma) { 1013 if (ssi_private->soc->imx && ssi_private->use_dma) {
1127 dai->playback_dma_data = &ssi_private->dma_params_tx; 1014 dai->playback_dma_data = &ssi_private->dma_params_tx;
1128 dai->capture_dma_data = &ssi_private->dma_params_rx; 1015 dai->capture_dma_data = &ssi_private->dma_params_rx;
1129 } 1016 }
@@ -1134,6 +1021,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
1134static const struct snd_soc_dai_ops fsl_ssi_dai_ops = { 1021static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
1135 .startup = fsl_ssi_startup, 1022 .startup = fsl_ssi_startup,
1136 .hw_params = fsl_ssi_hw_params, 1023 .hw_params = fsl_ssi_hw_params,
1024 .hw_free = fsl_ssi_hw_free,
1137 .set_fmt = fsl_ssi_set_dai_fmt, 1025 .set_fmt = fsl_ssi_set_dai_fmt,
1138 .set_sysclk = fsl_ssi_set_dai_sysclk, 1026 .set_sysclk = fsl_ssi_set_dai_sysclk,
1139 .set_tdm_slot = fsl_ssi_set_dai_tdm_slot, 1027 .set_tdm_slot = fsl_ssi_set_dai_tdm_slot,
@@ -1184,15 +1072,10 @@ static struct snd_soc_dai_driver fsl_ssi_ac97_dai = {
1184 1072
1185static struct fsl_ssi_private *fsl_ac97_data; 1073static struct fsl_ssi_private *fsl_ac97_data;
1186 1074
1187static void fsl_ssi_ac97_init(void)
1188{
1189 fsl_ssi_setup(fsl_ac97_data);
1190}
1191
1192static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 1075static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
1193 unsigned short val) 1076 unsigned short val)
1194{ 1077{
1195 struct ccsr_ssi *ssi = fsl_ac97_data->ssi; 1078 struct regmap *regs = fsl_ac97_data->regs;
1196 unsigned int lreg; 1079 unsigned int lreg;
1197 unsigned int lval; 1080 unsigned int lval;
1198 1081
@@ -1201,12 +1084,12 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
1201 1084
1202 1085
1203 lreg = reg << 12; 1086 lreg = reg << 12;
1204 write_ssi(lreg, &ssi->sacadd); 1087 regmap_write(regs, CCSR_SSI_SACADD, lreg);
1205 1088
1206 lval = val << 4; 1089 lval = val << 4;
1207 write_ssi(lval , &ssi->sacdat); 1090 regmap_write(regs, CCSR_SSI_SACDAT, lval);
1208 1091
1209 write_ssi_mask(&ssi->sacnt, CCSR_SSI_SACNT_RDWR_MASK, 1092 regmap_update_bits(regs, CCSR_SSI_SACNT, CCSR_SSI_SACNT_RDWR_MASK,
1210 CCSR_SSI_SACNT_WR); 1093 CCSR_SSI_SACNT_WR);
1211 udelay(100); 1094 udelay(100);
1212} 1095}
@@ -1214,19 +1097,21 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
1214static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97, 1097static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97,
1215 unsigned short reg) 1098 unsigned short reg)
1216{ 1099{
1217 struct ccsr_ssi *ssi = fsl_ac97_data->ssi; 1100 struct regmap *regs = fsl_ac97_data->regs;
1218 1101
1219 unsigned short val = -1; 1102 unsigned short val = -1;
1103 u32 reg_val;
1220 unsigned int lreg; 1104 unsigned int lreg;
1221 1105
1222 lreg = (reg & 0x7f) << 12; 1106 lreg = (reg & 0x7f) << 12;
1223 write_ssi(lreg, &ssi->sacadd); 1107 regmap_write(regs, CCSR_SSI_SACADD, lreg);
1224 write_ssi_mask(&ssi->sacnt, CCSR_SSI_SACNT_RDWR_MASK, 1108 regmap_update_bits(regs, CCSR_SSI_SACNT, CCSR_SSI_SACNT_RDWR_MASK,
1225 CCSR_SSI_SACNT_RD); 1109 CCSR_SSI_SACNT_RD);
1226 1110
1227 udelay(100); 1111 udelay(100);
1228 1112
1229 val = (read_ssi(&ssi->sacdat) >> 4) & 0xffff; 1113 regmap_read(regs, CCSR_SSI_SACDAT, &reg_val);
1114 val = (reg_val >> 4) & 0xffff;
1230 1115
1231 return val; 1116 return val;
1232} 1117}
@@ -1251,20 +1136,105 @@ static void make_lowercase(char *s)
1251 } 1136 }
1252} 1137}
1253 1138
1139static int fsl_ssi_imx_probe(struct platform_device *pdev,
1140 struct fsl_ssi_private *ssi_private, void __iomem *iomem)
1141{
1142 struct device_node *np = pdev->dev.of_node;
1143 u32 dmas[4];
1144 int ret;
1145
1146 ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
1147 if (IS_ERR(ssi_private->clk)) {
1148 ret = PTR_ERR(ssi_private->clk);
1149 dev_err(&pdev->dev, "could not get clock: %d\n", ret);
1150 return ret;
1151 }
1152
1153 ret = clk_prepare_enable(ssi_private->clk);
1154 if (ret) {
1155 dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
1156 return ret;
1157 }
1158
1159 /* For those SLAVE implementations, we ingore non-baudclk cases
1160 * and, instead, abandon MASTER mode that needs baud clock.
1161 */
1162 ssi_private->baudclk = devm_clk_get(&pdev->dev, "baud");
1163 if (IS_ERR(ssi_private->baudclk))
1164 dev_dbg(&pdev->dev, "could not get baud clock: %ld\n",
1165 PTR_ERR(ssi_private->baudclk));
1166
1167 /*
1168 * We have burstsize be "fifo_depth - 2" to match the SSI
1169 * watermark setting in fsl_ssi_startup().
1170 */
1171 ssi_private->dma_params_tx.maxburst = ssi_private->fifo_depth - 2;
1172 ssi_private->dma_params_rx.maxburst = ssi_private->fifo_depth - 2;
1173 ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0;
1174 ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0;
1175
1176 ret = !of_property_read_u32_array(np, "dmas", dmas, 4);
1177 if (ssi_private->use_dma && !ret && dmas[2] == IMX_DMATYPE_SSI_DUAL) {
1178 ssi_private->use_dual_fifo = true;
1179 /* When using dual fifo mode, we need to keep watermark
1180 * as even numbers due to dma script limitation.
1181 */
1182 ssi_private->dma_params_tx.maxburst &= ~0x1;
1183 ssi_private->dma_params_rx.maxburst &= ~0x1;
1184 }
1185
1186 if (!ssi_private->use_dma) {
1187
1188 /*
1189 * Some boards use an incompatible codec. To get it
1190 * working, we are using imx-fiq-pcm-audio, that
1191 * can handle those codecs. DMA is not possible in this
1192 * situation.
1193 */
1194
1195 ssi_private->fiq_params.irq = ssi_private->irq;
1196 ssi_private->fiq_params.base = iomem;
1197 ssi_private->fiq_params.dma_params_rx =
1198 &ssi_private->dma_params_rx;
1199 ssi_private->fiq_params.dma_params_tx =
1200 &ssi_private->dma_params_tx;
1201
1202 ret = imx_pcm_fiq_init(pdev, &ssi_private->fiq_params);
1203 if (ret)
1204 goto error_pcm;
1205 } else {
1206 ret = imx_pcm_dma_init(pdev);
1207 if (ret)
1208 goto error_pcm;
1209 }
1210
1211 return 0;
1212
1213error_pcm:
1214 clk_disable_unprepare(ssi_private->clk);
1215
1216 return ret;
1217}
1218
1219static void fsl_ssi_imx_clean(struct platform_device *pdev,
1220 struct fsl_ssi_private *ssi_private)
1221{
1222 if (!ssi_private->use_dma)
1223 imx_pcm_fiq_exit(pdev);
1224 clk_disable_unprepare(ssi_private->clk);
1225}
1226
1254static int fsl_ssi_probe(struct platform_device *pdev) 1227static int fsl_ssi_probe(struct platform_device *pdev)
1255{ 1228{
1256 struct fsl_ssi_private *ssi_private; 1229 struct fsl_ssi_private *ssi_private;
1257 int ret = 0; 1230 int ret = 0;
1258 struct device_attribute *dev_attr = NULL;
1259 struct device_node *np = pdev->dev.of_node; 1231 struct device_node *np = pdev->dev.of_node;
1260 const struct of_device_id *of_id; 1232 const struct of_device_id *of_id;
1261 enum fsl_ssi_type hw_type;
1262 const char *p, *sprop; 1233 const char *p, *sprop;
1263 const uint32_t *iprop; 1234 const uint32_t *iprop;
1264 struct resource res; 1235 struct resource res;
1236 void __iomem *iomem;
1265 char name[64]; 1237 char name[64];
1266 bool shared;
1267 bool ac97 = false;
1268 1238
1269 /* SSIs that are not connected on the board should have a 1239 /* SSIs that are not connected on the board should have a
1270 * status = "disabled" 1240 * status = "disabled"
@@ -1274,39 +1244,35 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1274 return -ENODEV; 1244 return -ENODEV;
1275 1245
1276 of_id = of_match_device(fsl_ssi_ids, &pdev->dev); 1246 of_id = of_match_device(fsl_ssi_ids, &pdev->dev);
1277 if (!of_id) 1247 if (!of_id || !of_id->data)
1278 return -EINVAL; 1248 return -EINVAL;
1279 hw_type = (enum fsl_ssi_type) of_id->data;
1280 1249
1281 sprop = of_get_property(np, "fsl,mode", NULL); 1250 ssi_private = devm_kzalloc(&pdev->dev, sizeof(*ssi_private),
1282 if (!sprop) { 1251 GFP_KERNEL);
1283 dev_err(&pdev->dev, "fsl,mode property is necessary\n");
1284 return -EINVAL;
1285 }
1286 if (!strcmp(sprop, "ac97-slave"))
1287 ac97 = true;
1288
1289 /* The DAI name is the last part of the full name of the node. */
1290 p = strrchr(np->full_name, '/') + 1;
1291 ssi_private = devm_kzalloc(&pdev->dev, sizeof(*ssi_private) + strlen(p),
1292 GFP_KERNEL);
1293 if (!ssi_private) { 1252 if (!ssi_private) {
1294 dev_err(&pdev->dev, "could not allocate DAI object\n"); 1253 dev_err(&pdev->dev, "could not allocate DAI object\n");
1295 return -ENOMEM; 1254 return -ENOMEM;
1296 } 1255 }
1297 1256
1298 strcpy(ssi_private->name, p); 1257 ssi_private->soc = of_id->data;
1258
1259 sprop = of_get_property(np, "fsl,mode", NULL);
1260 if (sprop) {
1261 if (!strcmp(sprop, "ac97-slave"))
1262 ssi_private->dai_fmt = SND_SOC_DAIFMT_AC97;
1263 else if (!strcmp(sprop, "i2s-slave"))
1264 ssi_private->dai_fmt = SND_SOC_DAIFMT_I2S |
1265 SND_SOC_DAIFMT_CBM_CFM;
1266 }
1299 1267
1300 ssi_private->use_dma = !of_property_read_bool(np, 1268 ssi_private->use_dma = !of_property_read_bool(np,
1301 "fsl,fiq-stream-filter"); 1269 "fsl,fiq-stream-filter");
1302 ssi_private->hw_type = hw_type;
1303 1270
1304 if (ac97) { 1271 if (fsl_ssi_is_ac97(ssi_private)) {
1305 memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_ac97_dai, 1272 memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_ac97_dai,
1306 sizeof(fsl_ssi_ac97_dai)); 1273 sizeof(fsl_ssi_ac97_dai));
1307 1274
1308 fsl_ac97_data = ssi_private; 1275 fsl_ac97_data = ssi_private;
1309 ssi_private->imx_ac97 = true;
1310 1276
1311 snd_soc_set_ac97_ops_of_reset(&fsl_ssi_ac97_ops, pdev); 1277 snd_soc_set_ac97_ops_of_reset(&fsl_ssi_ac97_ops, pdev);
1312 } else { 1278 } else {
@@ -1314,7 +1280,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1314 memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_dai_template, 1280 memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_dai_template,
1315 sizeof(fsl_ssi_dai_template)); 1281 sizeof(fsl_ssi_dai_template));
1316 } 1282 }
1317 ssi_private->cpu_dai_drv.name = ssi_private->name; 1283 ssi_private->cpu_dai_drv.name = dev_name(&pdev->dev);
1318 1284
1319 /* Get the addresses and IRQ */ 1285 /* Get the addresses and IRQ */
1320 ret = of_address_to_resource(np, 0, &res); 1286 ret = of_address_to_resource(np, 0, &res);
@@ -1322,12 +1288,20 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1322 dev_err(&pdev->dev, "could not determine device resources\n"); 1288 dev_err(&pdev->dev, "could not determine device resources\n");
1323 return ret; 1289 return ret;
1324 } 1290 }
1325 ssi_private->ssi = of_iomap(np, 0); 1291 ssi_private->ssi_phys = res.start;
1326 if (!ssi_private->ssi) { 1292
1293 iomem = devm_ioremap(&pdev->dev, res.start, resource_size(&res));
1294 if (!iomem) {
1327 dev_err(&pdev->dev, "could not map device resources\n"); 1295 dev_err(&pdev->dev, "could not map device resources\n");
1328 return -ENOMEM; 1296 return -ENOMEM;
1329 } 1297 }
1330 ssi_private->ssi_phys = res.start; 1298
1299 ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
1300 &fsl_ssi_regconfig);
1301 if (IS_ERR(ssi_private->regs)) {
1302 dev_err(&pdev->dev, "Failed to init register map\n");
1303 return PTR_ERR(ssi_private->regs);
1304 }
1331 1305
1332 ssi_private->irq = irq_of_parse_and_map(np, 0); 1306 ssi_private->irq = irq_of_parse_and_map(np, 0);
1333 if (!ssi_private->irq) { 1307 if (!ssi_private->irq) {
@@ -1350,180 +1324,43 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1350 /* Older 8610 DTs didn't have the fifo-depth property */ 1324 /* Older 8610 DTs didn't have the fifo-depth property */
1351 ssi_private->fifo_depth = 8; 1325 ssi_private->fifo_depth = 8;
1352 1326
1353 ssi_private->baudclk_locked = false; 1327 dev_set_drvdata(&pdev->dev, ssi_private);
1354 spin_lock_init(&ssi_private->baudclk_lock);
1355
1356 /*
1357 * imx51 and later SoCs have a slightly different IP that allows the
1358 * SSI configuration while the SSI unit is running.
1359 *
1360 * More important, it is necessary on those SoCs to configure the
1361 * sperate TX/RX DMA bits just before starting the stream
1362 * (fsl_ssi_trigger). The SDMA unit has to be configured before fsl_ssi
1363 * sends any DMA requests to the SDMA unit, otherwise it is not defined
1364 * how the SDMA unit handles the DMA request.
1365 *
1366 * SDMA units are present on devices starting at imx35 but the imx35
1367 * reference manual states that the DMA bits should not be changed
1368 * while the SSI unit is running (SSIEN). So we support the necessary
1369 * online configuration of fsl-ssi starting at imx51.
1370 */
1371 switch (hw_type) {
1372 case FSL_SSI_MCP8610:
1373 case FSL_SSI_MX21:
1374 case FSL_SSI_MX35:
1375 ssi_private->offline_config = true;
1376 break;
1377 case FSL_SSI_MX51:
1378 ssi_private->offline_config = false;
1379 break;
1380 }
1381
1382 if (hw_type == FSL_SSI_MX21 || hw_type == FSL_SSI_MX51 ||
1383 hw_type == FSL_SSI_MX35) {
1384 u32 dma_events[2], dmas[4];
1385 ssi_private->ssi_on_imx = true;
1386 1328
1387 ssi_private->clk = devm_clk_get(&pdev->dev, NULL); 1329 if (ssi_private->soc->imx) {
1388 if (IS_ERR(ssi_private->clk)) { 1330 ret = fsl_ssi_imx_probe(pdev, ssi_private, iomem);
1389 ret = PTR_ERR(ssi_private->clk); 1331 if (ret)
1390 dev_err(&pdev->dev, "could not get clock: %d\n", ret);
1391 goto error_irqmap; 1332 goto error_irqmap;
1392 } 1333 }
1393 ret = clk_prepare_enable(ssi_private->clk);
1394 if (ret) {
1395 dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n",
1396 ret);
1397 goto error_irqmap;
1398 }
1399
1400 /* For those SLAVE implementations, we ingore non-baudclk cases
1401 * and, instead, abandon MASTER mode that needs baud clock.
1402 */
1403 ssi_private->baudclk = devm_clk_get(&pdev->dev, "baud");
1404 if (IS_ERR(ssi_private->baudclk))
1405 dev_dbg(&pdev->dev, "could not get baud clock: %ld\n",
1406 PTR_ERR(ssi_private->baudclk));
1407 else
1408 clk_prepare_enable(ssi_private->baudclk);
1409
1410 /*
1411 * We have burstsize be "fifo_depth - 2" to match the SSI
1412 * watermark setting in fsl_ssi_startup().
1413 */
1414 ssi_private->dma_params_tx.maxburst =
1415 ssi_private->fifo_depth - 2;
1416 ssi_private->dma_params_rx.maxburst =
1417 ssi_private->fifo_depth - 2;
1418 ssi_private->dma_params_tx.addr =
1419 ssi_private->ssi_phys + offsetof(struct ccsr_ssi, stx0);
1420 ssi_private->dma_params_rx.addr =
1421 ssi_private->ssi_phys + offsetof(struct ccsr_ssi, srx0);
1422 ssi_private->dma_params_tx.filter_data =
1423 &ssi_private->filter_data_tx;
1424 ssi_private->dma_params_rx.filter_data =
1425 &ssi_private->filter_data_rx;
1426 if (!of_property_read_bool(pdev->dev.of_node, "dmas") &&
1427 ssi_private->use_dma) {
1428 /*
1429 * FIXME: This is a temporary solution until all
1430 * necessary dma drivers support the generic dma
1431 * bindings.
1432 */
1433 ret = of_property_read_u32_array(pdev->dev.of_node,
1434 "fsl,ssi-dma-events", dma_events, 2);
1435 if (ret && ssi_private->use_dma) {
1436 dev_err(&pdev->dev, "could not get dma events but fsl-ssi is configured to use DMA\n");
1437 goto error_clk;
1438 }
1439 }
1440 /* Should this be merge with the above? */
1441 if (!of_property_read_u32_array(pdev->dev.of_node, "dmas", dmas, 4)
1442 && dmas[2] == IMX_DMATYPE_SSI_DUAL) {
1443 ssi_private->use_dual_fifo = true;
1444 /* When using dual fifo mode, we need to keep watermark
1445 * as even numbers due to dma script limitation.
1446 */
1447 ssi_private->dma_params_tx.maxburst &= ~0x1;
1448 ssi_private->dma_params_rx.maxburst &= ~0x1;
1449 }
1450
1451 shared = of_device_is_compatible(of_get_parent(np),
1452 "fsl,spba-bus");
1453 1334
1454 imx_pcm_dma_params_init_data(&ssi_private->filter_data_tx, 1335 ret = snd_soc_register_component(&pdev->dev, &fsl_ssi_component,
1455 dma_events[0], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); 1336 &ssi_private->cpu_dai_drv, 1);
1456 imx_pcm_dma_params_init_data(&ssi_private->filter_data_rx, 1337 if (ret) {
1457 dma_events[1], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); 1338 dev_err(&pdev->dev, "failed to register DAI: %d\n", ret);
1339 goto error_asoc_register;
1458 } 1340 }
1459 1341
1460 /*
1461 * Enable interrupts only for MCP8610 and MX51. The other MXs have
1462 * different writeable interrupt status registers.
1463 */
1464 if (ssi_private->use_dma) { 1342 if (ssi_private->use_dma) {
1465 /* The 'name' should not have any slashes in it. */
1466 ret = devm_request_irq(&pdev->dev, ssi_private->irq, 1343 ret = devm_request_irq(&pdev->dev, ssi_private->irq,
1467 fsl_ssi_isr, 0, ssi_private->name, 1344 fsl_ssi_isr, 0, dev_name(&pdev->dev),
1468 ssi_private); 1345 ssi_private);
1469 ssi_private->irq_stats = true;
1470 if (ret < 0) { 1346 if (ret < 0) {
1471 dev_err(&pdev->dev, "could not claim irq %u\n", 1347 dev_err(&pdev->dev, "could not claim irq %u\n",
1472 ssi_private->irq); 1348 ssi_private->irq);
1473 goto error_clk; 1349 goto error_irq;
1474 } 1350 }
1475 } 1351 }
1476 1352
1477 /* Register with ASoC */ 1353 ret = fsl_ssi_debugfs_create(&ssi_private->dbg_stats, &pdev->dev);
1478 dev_set_drvdata(&pdev->dev, ssi_private);
1479
1480 ret = snd_soc_register_component(&pdev->dev, &fsl_ssi_component,
1481 &ssi_private->cpu_dai_drv, 1);
1482 if (ret) {
1483 dev_err(&pdev->dev, "failed to register DAI: %d\n", ret);
1484 goto error_dev;
1485 }
1486
1487 ret = fsl_ssi_debugfs_create(ssi_private, &pdev->dev);
1488 if (ret) 1354 if (ret)
1489 goto error_dbgfs; 1355 goto error_asoc_register;
1490
1491 if (ssi_private->ssi_on_imx) {
1492 if (!ssi_private->use_dma) {
1493
1494 /*
1495 * Some boards use an incompatible codec. To get it
1496 * working, we are using imx-fiq-pcm-audio, that
1497 * can handle those codecs. DMA is not possible in this
1498 * situation.
1499 */
1500
1501 ssi_private->fiq_params.irq = ssi_private->irq;
1502 ssi_private->fiq_params.base = ssi_private->ssi;
1503 ssi_private->fiq_params.dma_params_rx =
1504 &ssi_private->dma_params_rx;
1505 ssi_private->fiq_params.dma_params_tx =
1506 &ssi_private->dma_params_tx;
1507
1508 ret = imx_pcm_fiq_init(pdev, &ssi_private->fiq_params);
1509 if (ret)
1510 goto error_pcm;
1511 } else {
1512 ret = imx_pcm_dma_init(pdev);
1513 if (ret)
1514 goto error_pcm;
1515 }
1516 }
1517 1356
1518 /* 1357 /*
1519 * If codec-handle property is missing from SSI node, we assume 1358 * If codec-handle property is missing from SSI node, we assume
1520 * that the machine driver uses new binding which does not require 1359 * that the machine driver uses new binding which does not require
1521 * SSI driver to trigger machine driver's probe. 1360 * SSI driver to trigger machine driver's probe.
1522 */ 1361 */
1523 if (!of_get_property(np, "codec-handle", NULL)) { 1362 if (!of_get_property(np, "codec-handle", NULL))
1524 ssi_private->new_binding = true;
1525 goto done; 1363 goto done;
1526 }
1527 1364
1528 /* Trigger the machine driver's probe function. The platform driver 1365 /* Trigger the machine driver's probe function. The platform driver
1529 * name of the machine driver is taken from /compatible property of the 1366 * name of the machine driver is taken from /compatible property of the
@@ -1543,37 +1380,27 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1543 if (IS_ERR(ssi_private->pdev)) { 1380 if (IS_ERR(ssi_private->pdev)) {
1544 ret = PTR_ERR(ssi_private->pdev); 1381 ret = PTR_ERR(ssi_private->pdev);
1545 dev_err(&pdev->dev, "failed to register platform: %d\n", ret); 1382 dev_err(&pdev->dev, "failed to register platform: %d\n", ret);
1546 goto error_dai; 1383 goto error_sound_card;
1547 } 1384 }
1548 1385
1549done: 1386done:
1550 if (ssi_private->imx_ac97) 1387 if (ssi_private->dai_fmt)
1551 fsl_ssi_ac97_init(); 1388 _fsl_ssi_set_dai_fmt(ssi_private, ssi_private->dai_fmt);
1552 1389
1553 return 0; 1390 return 0;
1554 1391
1555error_dai: 1392error_sound_card:
1556 if (ssi_private->ssi_on_imx && !ssi_private->use_dma) 1393 fsl_ssi_debugfs_remove(&ssi_private->dbg_stats);
1557 imx_pcm_fiq_exit(pdev);
1558
1559error_pcm:
1560 fsl_ssi_debugfs_remove(ssi_private);
1561 1394
1562error_dbgfs: 1395error_irq:
1563 snd_soc_unregister_component(&pdev->dev); 1396 snd_soc_unregister_component(&pdev->dev);
1564 1397
1565error_dev: 1398error_asoc_register:
1566 device_remove_file(&pdev->dev, dev_attr); 1399 if (ssi_private->soc->imx)
1567 1400 fsl_ssi_imx_clean(pdev, ssi_private);
1568error_clk:
1569 if (ssi_private->ssi_on_imx) {
1570 if (!IS_ERR(ssi_private->baudclk))
1571 clk_disable_unprepare(ssi_private->baudclk);
1572 clk_disable_unprepare(ssi_private->clk);
1573 }
1574 1401
1575error_irqmap: 1402error_irqmap:
1576 if (ssi_private->irq_stats) 1403 if (ssi_private->use_dma)
1577 irq_dispose_mapping(ssi_private->irq); 1404 irq_dispose_mapping(ssi_private->irq);
1578 1405
1579 return ret; 1406 return ret;
@@ -1583,17 +1410,16 @@ static int fsl_ssi_remove(struct platform_device *pdev)
1583{ 1410{
1584 struct fsl_ssi_private *ssi_private = dev_get_drvdata(&pdev->dev); 1411 struct fsl_ssi_private *ssi_private = dev_get_drvdata(&pdev->dev);
1585 1412
1586 fsl_ssi_debugfs_remove(ssi_private); 1413 fsl_ssi_debugfs_remove(&ssi_private->dbg_stats);
1587 1414
1588 if (!ssi_private->new_binding) 1415 if (ssi_private->pdev)
1589 platform_device_unregister(ssi_private->pdev); 1416 platform_device_unregister(ssi_private->pdev);
1590 snd_soc_unregister_component(&pdev->dev); 1417 snd_soc_unregister_component(&pdev->dev);
1591 if (ssi_private->ssi_on_imx) { 1418
1592 if (!IS_ERR(ssi_private->baudclk)) 1419 if (ssi_private->soc->imx)
1593 clk_disable_unprepare(ssi_private->baudclk); 1420 fsl_ssi_imx_clean(pdev, ssi_private);
1594 clk_disable_unprepare(ssi_private->clk); 1421
1595 } 1422 if (ssi_private->use_dma)
1596 if (ssi_private->irq_stats)
1597 irq_dispose_mapping(ssi_private->irq); 1423 irq_dispose_mapping(ssi_private->irq);
1598 1424
1599 return 0; 1425 return 0;
diff --git a/sound/soc/fsl/fsl_ssi.h b/sound/soc/fsl/fsl_ssi.h
index e6b63240a3d7..506510540d0a 100644
--- a/sound/soc/fsl/fsl_ssi.h
+++ b/sound/soc/fsl/fsl_ssi.h
@@ -12,33 +12,32 @@
12#ifndef _MPC8610_I2S_H 12#ifndef _MPC8610_I2S_H
13#define _MPC8610_I2S_H 13#define _MPC8610_I2S_H
14 14
15/* SSI Register Map */ 15/* SSI registers */
16struct ccsr_ssi { 16#define CCSR_SSI_STX0 0x00
17 __be32 stx0; /* 0x.0000 - SSI Transmit Data Register 0 */ 17#define CCSR_SSI_STX1 0x04
18 __be32 stx1; /* 0x.0004 - SSI Transmit Data Register 1 */ 18#define CCSR_SSI_SRX0 0x08
19 __be32 srx0; /* 0x.0008 - SSI Receive Data Register 0 */ 19#define CCSR_SSI_SRX1 0x0c
20 __be32 srx1; /* 0x.000C - SSI Receive Data Register 1 */ 20#define CCSR_SSI_SCR 0x10
21 __be32 scr; /* 0x.0010 - SSI Control Register */ 21#define CCSR_SSI_SISR 0x14
22 __be32 sisr; /* 0x.0014 - SSI Interrupt Status Register Mixed */ 22#define CCSR_SSI_SIER 0x18
23 __be32 sier; /* 0x.0018 - SSI Interrupt Enable Register */ 23#define CCSR_SSI_STCR 0x1c
24 __be32 stcr; /* 0x.001C - SSI Transmit Configuration Register */ 24#define CCSR_SSI_SRCR 0x20
25 __be32 srcr; /* 0x.0020 - SSI Receive Configuration Register */ 25#define CCSR_SSI_STCCR 0x24
26 __be32 stccr; /* 0x.0024 - SSI Transmit Clock Control Register */ 26#define CCSR_SSI_SRCCR 0x28
27 __be32 srccr; /* 0x.0028 - SSI Receive Clock Control Register */ 27#define CCSR_SSI_SFCSR 0x2c
28 __be32 sfcsr; /* 0x.002C - SSI FIFO Control/Status Register */ 28#define CCSR_SSI_STR 0x30
29 __be32 str; /* 0x.0030 - SSI Test Register */ 29#define CCSR_SSI_SOR 0x34
30 __be32 sor; /* 0x.0034 - SSI Option Register */ 30#define CCSR_SSI_SACNT 0x38
31 __be32 sacnt; /* 0x.0038 - SSI AC97 Control Register */ 31#define CCSR_SSI_SACADD 0x3c
32 __be32 sacadd; /* 0x.003C - SSI AC97 Command Address Register */ 32#define CCSR_SSI_SACDAT 0x40
33 __be32 sacdat; /* 0x.0040 - SSI AC97 Command Data Register */ 33#define CCSR_SSI_SATAG 0x44
34 __be32 satag; /* 0x.0044 - SSI AC97 Tag Register */ 34#define CCSR_SSI_STMSK 0x48
35 __be32 stmsk; /* 0x.0048 - SSI Transmit Time Slot Mask Register */ 35#define CCSR_SSI_SRMSK 0x4c
36 __be32 srmsk; /* 0x.004C - SSI Receive Time Slot Mask Register */ 36#define CCSR_SSI_SACCST 0x50
37 __be32 saccst; /* 0x.0050 - SSI AC97 Channel Status Register */ 37#define CCSR_SSI_SACCEN 0x54
38 __be32 saccen; /* 0x.0054 - SSI AC97 Channel Enable Register */ 38#define CCSR_SSI_SACCDIS 0x58
39 __be32 saccdis; /* 0x.0058 - SSI AC97 Channel Disable Register */
40};
41 39
40#define CCSR_SSI_SCR_SYNC_TX_FS 0x00001000
42#define CCSR_SSI_SCR_RFR_CLK_DIS 0x00000800 41#define CCSR_SSI_SCR_RFR_CLK_DIS 0x00000800
43#define CCSR_SSI_SCR_TFR_CLK_DIS 0x00000400 42#define CCSR_SSI_SCR_TFR_CLK_DIS 0x00000400
44#define CCSR_SSI_SCR_TCH_EN 0x00000100 43#define CCSR_SSI_SCR_TCH_EN 0x00000100
@@ -206,5 +205,64 @@ struct ccsr_ssi {
206#define CCSR_SSI_SACNT_FV 0x00000002 205#define CCSR_SSI_SACNT_FV 0x00000002
207#define CCSR_SSI_SACNT_AC97EN 0x00000001 206#define CCSR_SSI_SACNT_AC97EN 0x00000001
208 207
209#endif
210 208
209struct device;
210
211#if IS_ENABLED(CONFIG_DEBUG_FS)
212
213struct fsl_ssi_dbg {
214 struct dentry *dbg_dir;
215 struct dentry *dbg_stats;
216
217 struct {
218 unsigned int rfrc;
219 unsigned int tfrc;
220 unsigned int cmdau;
221 unsigned int cmddu;
222 unsigned int rxt;
223 unsigned int rdr1;
224 unsigned int rdr0;
225 unsigned int tde1;
226 unsigned int tde0;
227 unsigned int roe1;
228 unsigned int roe0;
229 unsigned int tue1;
230 unsigned int tue0;
231 unsigned int tfs;
232 unsigned int rfs;
233 unsigned int tls;
234 unsigned int rls;
235 unsigned int rff1;
236 unsigned int rff0;
237 unsigned int tfe1;
238 unsigned int tfe0;
239 } stats;
240};
241
242void fsl_ssi_dbg_isr(struct fsl_ssi_dbg *ssi_dbg, u32 sisr);
243
244int fsl_ssi_debugfs_create(struct fsl_ssi_dbg *ssi_dbg, struct device *dev);
245
246void fsl_ssi_debugfs_remove(struct fsl_ssi_dbg *ssi_dbg);
247
248#else
249
250struct fsl_ssi_dbg {
251};
252
253static inline void fsl_ssi_dbg_isr(struct fsl_ssi_dbg *stats, u32 sisr)
254{
255}
256
257static inline int fsl_ssi_debugfs_create(struct fsl_ssi_dbg *ssi_dbg,
258 struct device *dev)
259{
260 return 0;
261}
262
263static inline void fsl_ssi_debugfs_remove(struct fsl_ssi_dbg *ssi_dbg)
264{
265}
266#endif /* ! IS_ENABLED(CONFIG_DEBUG_FS) */
267
268#endif
diff --git a/sound/soc/fsl/fsl_ssi_dbg.c b/sound/soc/fsl/fsl_ssi_dbg.c
new file mode 100644
index 000000000000..5469ffbc0253
--- /dev/null
+++ b/sound/soc/fsl/fsl_ssi_dbg.c
@@ -0,0 +1,163 @@
1/*
2 * Freescale SSI ALSA SoC Digital Audio Interface (DAI) debugging functions
3 *
4 * Copyright 2014 Markus Pargmann <mpa@pengutronix.de>, Pengutronix
5 *
6 * Splitted from fsl_ssi.c
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/debugfs.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16
17#include "fsl_ssi.h"
18
19void fsl_ssi_dbg_isr(struct fsl_ssi_dbg *dbg, u32 sisr)
20{
21 if (sisr & CCSR_SSI_SISR_RFRC)
22 dbg->stats.rfrc++;
23
24 if (sisr & CCSR_SSI_SISR_TFRC)
25 dbg->stats.tfrc++;
26
27 if (sisr & CCSR_SSI_SISR_CMDAU)
28 dbg->stats.cmdau++;
29
30 if (sisr & CCSR_SSI_SISR_CMDDU)
31 dbg->stats.cmddu++;
32
33 if (sisr & CCSR_SSI_SISR_RXT)
34 dbg->stats.rxt++;
35
36 if (sisr & CCSR_SSI_SISR_RDR1)
37 dbg->stats.rdr1++;
38
39 if (sisr & CCSR_SSI_SISR_RDR0)
40 dbg->stats.rdr0++;
41
42 if (sisr & CCSR_SSI_SISR_TDE1)
43 dbg->stats.tde1++;
44
45 if (sisr & CCSR_SSI_SISR_TDE0)
46 dbg->stats.tde0++;
47
48 if (sisr & CCSR_SSI_SISR_ROE1)
49 dbg->stats.roe1++;
50
51 if (sisr & CCSR_SSI_SISR_ROE0)
52 dbg->stats.roe0++;
53
54 if (sisr & CCSR_SSI_SISR_TUE1)
55 dbg->stats.tue1++;
56
57 if (sisr & CCSR_SSI_SISR_TUE0)
58 dbg->stats.tue0++;
59
60 if (sisr & CCSR_SSI_SISR_TFS)
61 dbg->stats.tfs++;
62
63 if (sisr & CCSR_SSI_SISR_RFS)
64 dbg->stats.rfs++;
65
66 if (sisr & CCSR_SSI_SISR_TLS)
67 dbg->stats.tls++;
68
69 if (sisr & CCSR_SSI_SISR_RLS)
70 dbg->stats.rls++;
71
72 if (sisr & CCSR_SSI_SISR_RFF1)
73 dbg->stats.rff1++;
74
75 if (sisr & CCSR_SSI_SISR_RFF0)
76 dbg->stats.rff0++;
77
78 if (sisr & CCSR_SSI_SISR_TFE1)
79 dbg->stats.tfe1++;
80
81 if (sisr & CCSR_SSI_SISR_TFE0)
82 dbg->stats.tfe0++;
83}
84
85/* Show the statistics of a flag only if its interrupt is enabled. The
86 * compiler will optimze this code to a no-op if the interrupt is not
87 * enabled.
88 */
89#define SIER_SHOW(flag, name) \
90 do { \
91 if (CCSR_SSI_SIER_##flag) \
92 seq_printf(s, #name "=%u\n", ssi_dbg->stats.name); \
93 } while (0)
94
95
96/**
97 * fsl_sysfs_ssi_show: display SSI statistics
98 *
99 * Display the statistics for the current SSI device. To avoid confusion,
100 * we only show those counts that are enabled.
101 */
102static int fsl_ssi_stats_show(struct seq_file *s, void *unused)
103{
104 struct fsl_ssi_dbg *ssi_dbg = s->private;
105
106 SIER_SHOW(RFRC_EN, rfrc);
107 SIER_SHOW(TFRC_EN, tfrc);
108 SIER_SHOW(CMDAU_EN, cmdau);
109 SIER_SHOW(CMDDU_EN, cmddu);
110 SIER_SHOW(RXT_EN, rxt);
111 SIER_SHOW(RDR1_EN, rdr1);
112 SIER_SHOW(RDR0_EN, rdr0);
113 SIER_SHOW(TDE1_EN, tde1);
114 SIER_SHOW(TDE0_EN, tde0);
115 SIER_SHOW(ROE1_EN, roe1);
116 SIER_SHOW(ROE0_EN, roe0);
117 SIER_SHOW(TUE1_EN, tue1);
118 SIER_SHOW(TUE0_EN, tue0);
119 SIER_SHOW(TFS_EN, tfs);
120 SIER_SHOW(RFS_EN, rfs);
121 SIER_SHOW(TLS_EN, tls);
122 SIER_SHOW(RLS_EN, rls);
123 SIER_SHOW(RFF1_EN, rff1);
124 SIER_SHOW(RFF0_EN, rff0);
125 SIER_SHOW(TFE1_EN, tfe1);
126 SIER_SHOW(TFE0_EN, tfe0);
127
128 return 0;
129}
130
131static int fsl_ssi_stats_open(struct inode *inode, struct file *file)
132{
133 return single_open(file, fsl_ssi_stats_show, inode->i_private);
134}
135
136static const struct file_operations fsl_ssi_stats_ops = {
137 .open = fsl_ssi_stats_open,
138 .read = seq_read,
139 .llseek = seq_lseek,
140 .release = single_release,
141};
142
143int fsl_ssi_debugfs_create(struct fsl_ssi_dbg *ssi_dbg, struct device *dev)
144{
145 ssi_dbg->dbg_dir = debugfs_create_dir(dev_name(dev), NULL);
146 if (!ssi_dbg->dbg_dir)
147 return -ENOMEM;
148
149 ssi_dbg->dbg_stats = debugfs_create_file("stats", S_IRUGO,
150 ssi_dbg->dbg_dir, ssi_dbg, &fsl_ssi_stats_ops);
151 if (!ssi_dbg->dbg_stats) {
152 debugfs_remove(ssi_dbg->dbg_dir);
153 return -ENOMEM;
154 }
155
156 return 0;
157}
158
159void fsl_ssi_debugfs_remove(struct fsl_ssi_dbg *ssi_dbg)
160{
161 debugfs_remove(ssi_dbg->dbg_stats);
162 debugfs_remove(ssi_dbg->dbg_dir);
163}
diff --git a/sound/soc/fsl/imx-audmux.c b/sound/soc/fsl/imx-audmux.c
index ac869931d7f1..267717aa96c1 100644
--- a/sound/soc/fsl/imx-audmux.c
+++ b/sound/soc/fsl/imx-audmux.c
@@ -145,7 +145,7 @@ static const struct file_operations audmux_debugfs_fops = {
145 .llseek = default_llseek, 145 .llseek = default_llseek,
146}; 146};
147 147
148static void __init audmux_debugfs_init(void) 148static void audmux_debugfs_init(void)
149{ 149{
150 int i; 150 int i;
151 char buf[20]; 151 char buf[20];
diff --git a/sound/soc/fsl/imx-pcm-dma.c b/sound/soc/fsl/imx-pcm-dma.c
index 2585ae44e634..0849b7b83f0a 100644
--- a/sound/soc/fsl/imx-pcm-dma.c
+++ b/sound/soc/fsl/imx-pcm-dma.c
@@ -40,7 +40,6 @@ static const struct snd_pcm_hardware imx_pcm_hardware = {
40 SNDRV_PCM_INFO_MMAP_VALID | 40 SNDRV_PCM_INFO_MMAP_VALID |
41 SNDRV_PCM_INFO_PAUSE | 41 SNDRV_PCM_INFO_PAUSE |
42 SNDRV_PCM_INFO_RESUME, 42 SNDRV_PCM_INFO_RESUME,
43 .formats = SNDRV_PCM_FMTBIT_S16_LE,
44 .buffer_bytes_max = IMX_SSI_DMABUF_SIZE, 43 .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
45 .period_bytes_min = 128, 44 .period_bytes_min = 128,
46 .period_bytes_max = 65535, /* Limited by SDMA engine */ 45 .period_bytes_max = 65535, /* Limited by SDMA engine */
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 21f1ccbdf582..03a7fdcdf114 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -24,9 +24,32 @@ struct simple_card_data {
24 struct asoc_simple_dai cpu_dai; 24 struct asoc_simple_dai cpu_dai;
25 struct asoc_simple_dai codec_dai; 25 struct asoc_simple_dai codec_dai;
26 } *dai_props; 26 } *dai_props;
27 unsigned int mclk_fs;
27 struct snd_soc_dai_link dai_link[]; /* dynamically allocated */ 28 struct snd_soc_dai_link dai_link[]; /* dynamically allocated */
28}; 29};
29 30
31static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
32 struct snd_pcm_hw_params *params)
33{
34 struct snd_soc_pcm_runtime *rtd = substream->private_data;
35 struct snd_soc_dai *codec_dai = rtd->codec_dai;
36 struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
37 unsigned int mclk;
38 int ret = 0;
39
40 if (priv->mclk_fs) {
41 mclk = params_rate(params) * priv->mclk_fs;
42 ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
43 SND_SOC_CLOCK_IN);
44 }
45
46 return ret;
47}
48
49static struct snd_soc_ops asoc_simple_card_ops = {
50 .hw_params = asoc_simple_card_hw_params,
51};
52
30static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, 53static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai,
31 struct asoc_simple_dai *set) 54 struct asoc_simple_dai *set)
32{ 55{
@@ -66,8 +89,7 @@ err:
66 89
67static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd) 90static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
68{ 91{
69 struct simple_card_data *priv = 92 struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
70 snd_soc_card_get_drvdata(rtd->card);
71 struct snd_soc_dai *codec = rtd->codec_dai; 93 struct snd_soc_dai *codec = rtd->codec_dai;
72 struct snd_soc_dai *cpu = rtd->cpu_dai; 94 struct snd_soc_dai *cpu = rtd->cpu_dai;
73 struct simple_dai_props *dai_props; 95 struct simple_dai_props *dai_props;
@@ -88,7 +110,6 @@ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
88 110
89static int 111static int
90asoc_simple_card_sub_parse_of(struct device_node *np, 112asoc_simple_card_sub_parse_of(struct device_node *np,
91 unsigned int daifmt,
92 struct asoc_simple_dai *dai, 113 struct asoc_simple_dai *dai,
93 const struct device_node **p_node, 114 const struct device_node **p_node,
94 const char **name) 115 const char **name)
@@ -117,14 +138,6 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
117 return ret; 138 return ret;
118 139
119 /* 140 /*
120 * bitclock-inversion, frame-inversion
121 * bitclock-master, frame-master
122 * and specific "format" if it has
123 */
124 dai->fmt = snd_soc_of_parse_daifmt(np, NULL);
125 dai->fmt |= daifmt;
126
127 /*
128 * dai->sysclk come from 141 * dai->sysclk come from
129 * "clocks = <&xxx>" (if system has common clock) 142 * "clocks = <&xxx>" (if system has common clock)
130 * or "system-clock-frequency = <xxx>" 143 * or "system-clock-frequency = <xxx>"
@@ -151,37 +164,135 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
151 return 0; 164 return 0;
152} 165}
153 166
154static int simple_card_cpu_codec_of(struct device_node *node, 167static int simple_card_dai_link_of(struct device_node *node,
155 int daifmt, 168 struct device *dev,
156 struct snd_soc_dai_link *dai_link, 169 struct snd_soc_dai_link *dai_link,
157 struct simple_dai_props *dai_props) 170 struct simple_dai_props *dai_props,
171 bool is_top_level_node)
158{ 172{
159 struct device_node *np; 173 struct device_node *np = NULL;
174 struct device_node *bitclkmaster = NULL;
175 struct device_node *framemaster = NULL;
176 unsigned int daifmt;
177 char *name;
178 char prop[128];
179 char *prefix = "";
160 int ret; 180 int ret;
161 181
162 /* CPU sub-node */ 182 if (is_top_level_node)
163 ret = -EINVAL; 183 prefix = "simple-audio-card,";
164 np = of_get_child_by_name(node, "simple-audio-card,cpu"); 184
165 if (np) { 185 daifmt = snd_soc_of_parse_daifmt(node, prefix,
166 ret = asoc_simple_card_sub_parse_of(np, daifmt, 186 &bitclkmaster, &framemaster);
167 &dai_props->cpu_dai, 187 daifmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
168 &dai_link->cpu_of_node, 188
169 &dai_link->cpu_dai_name); 189 snprintf(prop, sizeof(prop), "%scpu", prefix);
170 of_node_put(np); 190 np = of_get_child_by_name(node, prop);
191 if (!np) {
192 ret = -EINVAL;
193 dev_err(dev, "%s: Can't find %s DT node\n", __func__, prop);
194 goto dai_link_of_err;
195 }
196
197 ret = asoc_simple_card_sub_parse_of(np, &dai_props->cpu_dai,
198 &dai_link->cpu_of_node,
199 &dai_link->cpu_dai_name);
200 if (ret < 0)
201 goto dai_link_of_err;
202
203 dai_props->cpu_dai.fmt = daifmt;
204 switch (((np == bitclkmaster) << 4) | (np == framemaster)) {
205 case 0x11:
206 dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBS_CFS;
207 break;
208 case 0x10:
209 dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBS_CFM;
210 break;
211 case 0x01:
212 dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBM_CFS;
213 break;
214 default:
215 dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBM_CFM;
216 break;
217 }
218
219 of_node_put(np);
220 snprintf(prop, sizeof(prop), "%scodec", prefix);
221 np = of_get_child_by_name(node, prop);
222 if (!np) {
223 ret = -EINVAL;
224 dev_err(dev, "%s: Can't find %s DT node\n", __func__, prop);
225 goto dai_link_of_err;
171 } 226 }
227
228 ret = asoc_simple_card_sub_parse_of(np, &dai_props->codec_dai,
229 &dai_link->codec_of_node,
230 &dai_link->codec_dai_name);
172 if (ret < 0) 231 if (ret < 0)
173 return ret; 232 goto dai_link_of_err;
233
234 if (strlen(prefix) && !bitclkmaster && !framemaster) {
235 /* No dai-link level and master setting was not found from
236 sound node level, revert back to legacy DT parsing and
237 take the settings from codec node. */
238 dev_dbg(dev, "%s: Revert to legacy daifmt parsing\n",
239 __func__);
240 dai_props->cpu_dai.fmt = dai_props->codec_dai.fmt =
241 snd_soc_of_parse_daifmt(np, NULL, NULL, NULL) |
242 (daifmt & ~SND_SOC_DAIFMT_CLOCK_MASK);
243 } else {
244 dai_props->codec_dai.fmt = daifmt;
245 switch (((np == bitclkmaster) << 4) | (np == framemaster)) {
246 case 0x11:
247 dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBM_CFM;
248 break;
249 case 0x10:
250 dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBM_CFS;
251 break;
252 case 0x01:
253 dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBS_CFM;
254 break;
255 default:
256 dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBS_CFS;
257 break;
258 }
259 }
174 260
175 /* CODEC sub-node */ 261 if (!dai_link->cpu_dai_name || !dai_link->codec_dai_name) {
176 ret = -EINVAL; 262 ret = -EINVAL;
177 np = of_get_child_by_name(node, "simple-audio-card,codec"); 263 goto dai_link_of_err;
178 if (np) {
179 ret = asoc_simple_card_sub_parse_of(np, daifmt,
180 &dai_props->codec_dai,
181 &dai_link->codec_of_node,
182 &dai_link->codec_dai_name);
183 of_node_put(np);
184 } 264 }
265
266 /* simple-card assumes platform == cpu */
267 dai_link->platform_of_node = dai_link->cpu_of_node;
268
269 /* Link name is created from CPU/CODEC dai name */
270 name = devm_kzalloc(dev,
271 strlen(dai_link->cpu_dai_name) +
272 strlen(dai_link->codec_dai_name) + 2,
273 GFP_KERNEL);
274 sprintf(name, "%s-%s", dai_link->cpu_dai_name,
275 dai_link->codec_dai_name);
276 dai_link->name = dai_link->stream_name = name;
277 dai_link->ops = &asoc_simple_card_ops;
278
279 dev_dbg(dev, "\tname : %s\n", dai_link->stream_name);
280 dev_dbg(dev, "\tcpu : %s / %04x / %d\n",
281 dai_link->cpu_dai_name,
282 dai_props->cpu_dai.fmt,
283 dai_props->cpu_dai.sysclk);
284 dev_dbg(dev, "\tcodec : %s / %04x / %d\n",
285 dai_link->codec_dai_name,
286 dai_props->codec_dai.fmt,
287 dai_props->codec_dai.sysclk);
288
289dai_link_of_err:
290 if (np)
291 of_node_put(np);
292 if (bitclkmaster)
293 of_node_put(bitclkmaster);
294 if (framemaster)
295 of_node_put(framemaster);
185 return ret; 296 return ret;
186} 297}
187 298
@@ -192,18 +303,11 @@ static int asoc_simple_card_parse_of(struct device_node *node,
192{ 303{
193 struct snd_soc_dai_link *dai_link = priv->snd_card.dai_link; 304 struct snd_soc_dai_link *dai_link = priv->snd_card.dai_link;
194 struct simple_dai_props *dai_props = priv->dai_props; 305 struct simple_dai_props *dai_props = priv->dai_props;
195 struct device_node *np;
196 char *name;
197 unsigned int daifmt;
198 int ret; 306 int ret;
199 307
200 /* parsing the card name from DT */ 308 /* parsing the card name from DT */
201 snd_soc_of_parse_card_name(&priv->snd_card, "simple-audio-card,name"); 309 snd_soc_of_parse_card_name(&priv->snd_card, "simple-audio-card,name");
202 310
203 /* get CPU/CODEC common format via simple-audio-card,format */
204 daifmt = snd_soc_of_parse_daifmt(node, "simple-audio-card,") &
205 (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_INV_MASK);
206
207 /* off-codec widgets */ 311 /* off-codec widgets */
208 if (of_property_read_bool(node, "simple-audio-card,widgets")) { 312 if (of_property_read_bool(node, "simple-audio-card,widgets")) {
209 ret = snd_soc_of_parse_audio_simple_widgets(&priv->snd_card, 313 ret = snd_soc_of_parse_audio_simple_widgets(&priv->snd_card,
@@ -220,71 +324,36 @@ static int asoc_simple_card_parse_of(struct device_node *node,
220 return ret; 324 return ret;
221 } 325 }
222 326
223 /* loop on the DAI links */ 327 /* Factor to mclk, used in hw_params() */
224 np = NULL; 328 of_property_read_u32(node, "simple-audio-card,mclk-fs",
225 for (;;) { 329 &priv->mclk_fs);
226 if (multi) { 330
227 np = of_get_next_child(node, np); 331 dev_dbg(dev, "New simple-card: %s\n", priv->snd_card.name ?
228 if (!np) 332 priv->snd_card.name : "");
229 break; 333
334 if (multi) {
335 struct device_node *np = NULL;
336 int i;
337 for (i = 0; (np = of_get_next_child(node, np)); i++) {
338 dev_dbg(dev, "\tlink %d:\n", i);
339 ret = simple_card_dai_link_of(np, dev, dai_link + i,
340 dai_props + i, false);
341 if (ret < 0) {
342 of_node_put(np);
343 return ret;
344 }
230 } 345 }
231 346 } else {
232 ret = simple_card_cpu_codec_of(multi ? np : node, 347 ret = simple_card_dai_link_of(node, dev, dai_link, dai_props,
233 daifmt, dai_link, dai_props); 348 true);
234 if (ret < 0) 349 if (ret < 0)
235 goto err; 350 return ret;
236
237 /*
238 * overwrite cpu_dai->fmt as its DAIFMT_MASTER bit is based on CODEC
239 * while the other bits should be identical unless buggy SW/HW design.
240 */
241 dai_props->cpu_dai.fmt = dai_props->codec_dai.fmt;
242
243 if (!dai_link->cpu_dai_name || !dai_link->codec_dai_name) {
244 ret = -EINVAL;
245 goto err;
246 }
247
248 /* simple-card assumes platform == cpu */
249 dai_link->platform_of_node = dai_link->cpu_of_node;
250
251 name = devm_kzalloc(dev,
252 strlen(dai_link->cpu_dai_name) +
253 strlen(dai_link->codec_dai_name) + 2,
254 GFP_KERNEL);
255 sprintf(name, "%s-%s", dai_link->cpu_dai_name,
256 dai_link->codec_dai_name);
257 dai_link->name = dai_link->stream_name = name;
258
259 if (!multi)
260 break;
261
262 dai_link++;
263 dai_props++;
264 } 351 }
265 352
266 /* card name is created from CPU/CODEC dai name */
267 dai_link = priv->snd_card.dai_link;
268 if (!priv->snd_card.name) 353 if (!priv->snd_card.name)
269 priv->snd_card.name = dai_link->name; 354 priv->snd_card.name = priv->snd_card.dai_link->name;
270
271 dev_dbg(dev, "card-name : %s\n", priv->snd_card.name);
272 dev_dbg(dev, "platform : %04x\n", daifmt);
273 dai_props = priv->dai_props;
274 dev_dbg(dev, "cpu : %s / %04x / %d\n",
275 dai_link->cpu_dai_name,
276 dai_props->cpu_dai.fmt,
277 dai_props->cpu_dai.sysclk);
278 dev_dbg(dev, "codec : %s / %04x / %d\n",
279 dai_link->codec_dai_name,
280 dai_props->codec_dai.fmt,
281 dai_props->codec_dai.sysclk);
282 355
283 return 0; 356 return 0;
284
285err:
286 of_node_put(np);
287 return ret;
288} 357}
289 358
290/* update the reference count of the devices nodes at end of probe */ 359/* update the reference count of the devices nodes at end of probe */
@@ -378,10 +447,10 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
378 return -EINVAL; 447 return -EINVAL;
379 } 448 }
380 449
381 if (!cinfo->name || 450 if (!cinfo->name ||
382 !cinfo->codec_dai.name || 451 !cinfo->codec_dai.name ||
383 !cinfo->codec || 452 !cinfo->codec ||
384 !cinfo->platform || 453 !cinfo->platform ||
385 !cinfo->cpu_dai.name) { 454 !cinfo->cpu_dai.name) {
386 dev_err(dev, "insufficient asoc_simple_card_info settings\n"); 455 dev_err(dev, "insufficient asoc_simple_card_info settings\n");
387 return -EINVAL; 456 return -EINVAL;
@@ -425,11 +494,11 @@ MODULE_DEVICE_TABLE(of, asoc_simple_of_match);
425 494
426static struct platform_driver asoc_simple_card = { 495static struct platform_driver asoc_simple_card = {
427 .driver = { 496 .driver = {
428 .name = "asoc-simple-card", 497 .name = "asoc-simple-card",
429 .owner = THIS_MODULE, 498 .owner = THIS_MODULE,
430 .of_match_table = asoc_simple_of_match, 499 .of_match_table = asoc_simple_of_match,
431 }, 500 },
432 .probe = asoc_simple_card_probe, 501 .probe = asoc_simple_card_probe,
433}; 502};
434 503
435module_platform_driver(asoc_simple_card); 504module_platform_driver(asoc_simple_card);
diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig
index 3c81b3891209..c30fedb3e149 100644
--- a/sound/soc/intel/Kconfig
+++ b/sound/soc/intel/Kconfig
@@ -49,3 +49,12 @@ config SND_SOC_INTEL_BYT_RT5640_MACH
49 help 49 help
50 This adds audio driver for Intel Baytrail platform based boards 50 This adds audio driver for Intel Baytrail platform based boards
51 with the RT5640 audio codec. 51 with the RT5640 audio codec.
52
53config SND_SOC_INTEL_BYT_MAX98090_MACH
54 tristate "ASoC Audio driver for Intel Baytrail with MAX98090 codec"
55 depends on SND_SOC_INTEL_SST && X86_INTEL_LPSS && I2C
56 select SND_SOC_INTEL_BAYTRAIL
57 select SND_SOC_MAX98090
58 help
59 This adds audio driver for Intel Baytrail platform based boards
60 with the MAX98090 audio codec.
diff --git a/sound/soc/intel/Makefile b/sound/soc/intel/Makefile
index edeb79ae3dff..4bfca79a42ba 100644
--- a/sound/soc/intel/Makefile
+++ b/sound/soc/intel/Makefile
@@ -2,7 +2,7 @@
2snd-soc-sst-dsp-objs := sst-dsp.o sst-firmware.o 2snd-soc-sst-dsp-objs := sst-dsp.o sst-firmware.o
3snd-soc-sst-acpi-objs := sst-acpi.o 3snd-soc-sst-acpi-objs := sst-acpi.o
4 4
5snd-soc-sst-mfld-platform-objs := sst-mfld-platform.o 5snd-soc-sst-mfld-platform-objs := sst-mfld-platform-pcm.o sst-mfld-platform-compress.o
6snd-soc-mfld-machine-objs := mfld_machine.o 6snd-soc-mfld-machine-objs := mfld_machine.o
7 7
8obj-$(CONFIG_SND_SST_MFLD_PLATFORM) += snd-soc-sst-mfld-platform.o 8obj-$(CONFIG_SND_SST_MFLD_PLATFORM) += snd-soc-sst-mfld-platform.o
@@ -23,6 +23,8 @@ obj-$(CONFIG_SND_SOC_INTEL_BAYTRAIL) += snd-soc-sst-baytrail-pcm.o
23# Machine support 23# Machine support
24snd-soc-sst-haswell-objs := haswell.o 24snd-soc-sst-haswell-objs := haswell.o
25snd-soc-sst-byt-rt5640-mach-objs := byt-rt5640.o 25snd-soc-sst-byt-rt5640-mach-objs := byt-rt5640.o
26snd-soc-sst-byt-max98090-mach-objs := byt-max98090.o
26 27
27obj-$(CONFIG_SND_SOC_INTEL_HASWELL_MACH) += snd-soc-sst-haswell.o 28obj-$(CONFIG_SND_SOC_INTEL_HASWELL_MACH) += snd-soc-sst-haswell.o
28obj-$(CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH) += snd-soc-sst-byt-rt5640-mach.o 29obj-$(CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH) += snd-soc-sst-byt-rt5640-mach.o
30obj-$(CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH) += snd-soc-sst-byt-max98090-mach.o
diff --git a/sound/soc/intel/byt-max98090.c b/sound/soc/intel/byt-max98090.c
new file mode 100644
index 000000000000..5fc98c64a3f4
--- /dev/null
+++ b/sound/soc/intel/byt-max98090.c
@@ -0,0 +1,203 @@
1/*
2 * Intel Baytrail SST MAX98090 machine driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/acpi.h>
19#include <linux/device.h>
20#include <linux/gpio.h>
21#include <linux/gpio/consumer.h>
22#include <linux/slab.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/jack.h>
27#include "../codecs/max98090.h"
28
29struct byt_max98090_private {
30 struct snd_soc_jack jack;
31};
32
33static const struct snd_soc_dapm_widget byt_max98090_widgets[] = {
34 SND_SOC_DAPM_HP("Headphone", NULL),
35 SND_SOC_DAPM_MIC("Headset Mic", NULL),
36 SND_SOC_DAPM_MIC("Int Mic", NULL),
37 SND_SOC_DAPM_SPK("Ext Spk", NULL),
38};
39
40static const struct snd_soc_dapm_route byt_max98090_audio_map[] = {
41 {"IN34", NULL, "Headset Mic"},
42 {"IN34", NULL, "MICBIAS"},
43 {"MICBIAS", NULL, "Headset Mic"},
44 {"DMICL", NULL, "Int Mic"},
45 {"Headphone", NULL, "HPL"},
46 {"Headphone", NULL, "HPR"},
47 {"Ext Spk", NULL, "SPKL"},
48 {"Ext Spk", NULL, "SPKR"},
49};
50
51static const struct snd_kcontrol_new byt_max98090_controls[] = {
52 SOC_DAPM_PIN_SWITCH("Headphone"),
53 SOC_DAPM_PIN_SWITCH("Headset Mic"),
54 SOC_DAPM_PIN_SWITCH("Int Mic"),
55 SOC_DAPM_PIN_SWITCH("Ext Spk"),
56};
57
58static struct snd_soc_jack_pin hs_jack_pins[] = {
59 {
60 .pin = "Headphone",
61 .mask = SND_JACK_HEADPHONE,
62 },
63 {
64 .pin = "Headset Mic",
65 .mask = SND_JACK_MICROPHONE,
66 },
67 {
68 .pin = "Ext Spk",
69 .mask = SND_JACK_LINEOUT,
70 },
71 {
72 .pin = "Int Mic",
73 .mask = SND_JACK_LINEIN,
74 },
75};
76
77static struct snd_soc_jack_gpio hs_jack_gpios[] = {
78 {
79 .name = "hp-gpio",
80 .idx = 0,
81 .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT,
82 .debounce_time = 200,
83 },
84 {
85 .name = "mic-gpio",
86 .idx = 1,
87 .report = SND_JACK_MICROPHONE | SND_JACK_LINEIN,
88 .debounce_time = 200,
89 },
90};
91
92static int byt_max98090_init(struct snd_soc_pcm_runtime *runtime)
93{
94 int ret;
95 struct snd_soc_codec *codec = runtime->codec;
96 struct snd_soc_card *card = runtime->card;
97 struct byt_max98090_private *drv = snd_soc_card_get_drvdata(card);
98 struct snd_soc_jack *jack = &drv->jack;
99
100 card->dapm.idle_bias_off = true;
101
102 ret = snd_soc_dai_set_sysclk(runtime->codec_dai,
103 M98090_REG_SYSTEM_CLOCK,
104 25000000, SND_SOC_CLOCK_IN);
105 if (ret < 0) {
106 dev_err(card->dev, "Can't set codec clock %d\n", ret);
107 return ret;
108 }
109
110 /* Enable jack detection */
111 ret = snd_soc_jack_new(codec, "Headphone", SND_JACK_HEADPHONE, jack);
112 if (ret)
113 return ret;
114
115 ret = snd_soc_jack_add_pins(jack, ARRAY_SIZE(hs_jack_pins),
116 hs_jack_pins);
117 if (ret)
118 return ret;
119
120 ret = snd_soc_jack_add_gpiods(card->dev->parent, jack,
121 ARRAY_SIZE(hs_jack_gpios),
122 hs_jack_gpios);
123 if (ret)
124 return ret;
125
126 return max98090_mic_detect(codec, jack);
127}
128
129static struct snd_soc_dai_link byt_max98090_dais[] = {
130 {
131 .name = "Baytrail Audio",
132 .stream_name = "Audio",
133 .cpu_dai_name = "baytrail-pcm-audio",
134 .codec_dai_name = "HiFi",
135 .codec_name = "i2c-193C9890:00",
136 .platform_name = "baytrail-pcm-audio",
137 .init = byt_max98090_init,
138 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
139 SND_SOC_DAIFMT_CBS_CFS,
140 },
141};
142
143static struct snd_soc_card byt_max98090_card = {
144 .name = "byt-max98090",
145 .dai_link = byt_max98090_dais,
146 .num_links = ARRAY_SIZE(byt_max98090_dais),
147 .dapm_widgets = byt_max98090_widgets,
148 .num_dapm_widgets = ARRAY_SIZE(byt_max98090_widgets),
149 .dapm_routes = byt_max98090_audio_map,
150 .num_dapm_routes = ARRAY_SIZE(byt_max98090_audio_map),
151 .controls = byt_max98090_controls,
152 .num_controls = ARRAY_SIZE(byt_max98090_controls),
153};
154
155static int byt_max98090_probe(struct platform_device *pdev)
156{
157 int ret_val = 0;
158 struct byt_max98090_private *priv;
159
160 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
161 if (!priv) {
162 dev_err(&pdev->dev, "allocation failed\n");
163 return -ENOMEM;
164 }
165
166 byt_max98090_card.dev = &pdev->dev;
167 snd_soc_card_set_drvdata(&byt_max98090_card, priv);
168 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_max98090_card);
169 if (ret_val) {
170 dev_err(&pdev->dev,
171 "snd_soc_register_card failed %d\n", ret_val);
172 return ret_val;
173 }
174
175 return ret_val;
176}
177
178static int byt_max98090_remove(struct platform_device *pdev)
179{
180 struct snd_soc_card *card = platform_get_drvdata(pdev);
181 struct byt_max98090_private *priv = snd_soc_card_get_drvdata(card);
182
183 snd_soc_jack_free_gpios(&priv->jack, ARRAY_SIZE(hs_jack_gpios),
184 hs_jack_gpios);
185
186 return 0;
187}
188
189static struct platform_driver byt_max98090_driver = {
190 .probe = byt_max98090_probe,
191 .remove = byt_max98090_remove,
192 .driver = {
193 .name = "byt-max98090",
194 .owner = THIS_MODULE,
195 .pm = &snd_soc_pm_ops,
196 },
197};
198module_platform_driver(byt_max98090_driver)
199
200MODULE_DESCRIPTION("ASoC Intel(R) Baytrail Machine driver");
201MODULE_AUTHOR("Omair Md Abdullah, Jarkko Nikula");
202MODULE_LICENSE("GPL v2");
203MODULE_ALIAS("platform:byt-max98090");
diff --git a/sound/soc/intel/byt-rt5640.c b/sound/soc/intel/byt-rt5640.c
index eff97c8e5218..53d160d39972 100644
--- a/sound/soc/intel/byt-rt5640.c
+++ b/sound/soc/intel/byt-rt5640.c
@@ -100,12 +100,6 @@ static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
100 snd_soc_dapm_ignore_suspend(dapm, "SPORP"); 100 snd_soc_dapm_ignore_suspend(dapm, "SPORP");
101 snd_soc_dapm_ignore_suspend(dapm, "SPORN"); 101 snd_soc_dapm_ignore_suspend(dapm, "SPORN");
102 102
103 snd_soc_dapm_enable_pin(dapm, "Headset Mic");
104 snd_soc_dapm_enable_pin(dapm, "Headphone");
105 snd_soc_dapm_enable_pin(dapm, "Speaker");
106 snd_soc_dapm_enable_pin(dapm, "Internal Mic");
107
108 snd_soc_dapm_sync(dapm);
109 return ret; 103 return ret;
110} 104}
111 105
@@ -117,27 +111,13 @@ static struct snd_soc_dai_link byt_rt5640_dais[] = {
117 { 111 {
118 .name = "Baytrail Audio", 112 .name = "Baytrail Audio",
119 .stream_name = "Audio", 113 .stream_name = "Audio",
120 .cpu_dai_name = "Front-cpu-dai", 114 .cpu_dai_name = "baytrail-pcm-audio",
121 .codec_dai_name = "rt5640-aif1", 115 .codec_dai_name = "rt5640-aif1",
122 .codec_name = "i2c-10EC5640:00", 116 .codec_name = "i2c-10EC5640:00",
123 .platform_name = "baytrail-pcm-audio", 117 .platform_name = "baytrail-pcm-audio",
124 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | 118 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
125 SND_SOC_DAIFMT_CBS_CFS, 119 SND_SOC_DAIFMT_CBS_CFS,
126 .init = byt_rt5640_init, 120 .init = byt_rt5640_init,
127 .ignore_suspend = 1,
128 .ops = &byt_rt5640_ops,
129 },
130 {
131 .name = "Baytrail Voice",
132 .stream_name = "Voice",
133 .cpu_dai_name = "Mic1-cpu-dai",
134 .codec_dai_name = "rt5640-aif1",
135 .codec_name = "i2c-10EC5640:00",
136 .platform_name = "baytrail-pcm-audio",
137 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
138 SND_SOC_DAIFMT_CBS_CFS,
139 .init = NULL,
140 .ignore_suspend = 1,
141 .ops = &byt_rt5640_ops, 121 .ops = &byt_rt5640_ops,
142 }, 122 },
143}; 123};
@@ -155,28 +135,17 @@ static struct snd_soc_card byt_rt5640_card = {
155static int byt_rt5640_probe(struct platform_device *pdev) 135static int byt_rt5640_probe(struct platform_device *pdev)
156{ 136{
157 struct snd_soc_card *card = &byt_rt5640_card; 137 struct snd_soc_card *card = &byt_rt5640_card;
158 struct device *dev = &pdev->dev;
159 138
160 card->dev = &pdev->dev; 139 card->dev = &pdev->dev;
161 dev_set_drvdata(dev, card); 140 return devm_snd_soc_register_card(&pdev->dev, card);
162 return snd_soc_register_card(card);
163}
164
165static int byt_rt5640_remove(struct platform_device *pdev)
166{
167 struct snd_soc_card *card = platform_get_drvdata(pdev);
168
169 snd_soc_unregister_card(card);
170
171 return 0;
172} 141}
173 142
174static struct platform_driver byt_rt5640_audio = { 143static struct platform_driver byt_rt5640_audio = {
175 .probe = byt_rt5640_probe, 144 .probe = byt_rt5640_probe,
176 .remove = byt_rt5640_remove,
177 .driver = { 145 .driver = {
178 .name = "byt-rt5640", 146 .name = "byt-rt5640",
179 .owner = THIS_MODULE, 147 .owner = THIS_MODULE,
148 .pm = &snd_soc_pm_ops,
180 }, 149 },
181}; 150};
182module_platform_driver(byt_rt5640_audio) 151module_platform_driver(byt_rt5640_audio)
diff --git a/sound/soc/intel/haswell.c b/sound/soc/intel/haswell.c
index 54345a2a7386..3981982674ac 100644
--- a/sound/soc/intel/haswell.c
+++ b/sound/soc/intel/haswell.c
@@ -89,8 +89,6 @@ static struct snd_soc_ops haswell_rt5640_ops = {
89 89
90static int haswell_rtd_init(struct snd_soc_pcm_runtime *rtd) 90static int haswell_rtd_init(struct snd_soc_pcm_runtime *rtd)
91{ 91{
92 struct snd_soc_codec *codec = rtd->codec;
93 struct snd_soc_dapm_context *dapm = &codec->dapm;
94 struct sst_pdata *pdata = dev_get_platdata(rtd->platform->dev); 92 struct sst_pdata *pdata = dev_get_platdata(rtd->platform->dev);
95 struct sst_hsw *haswell = pdata->dsp; 93 struct sst_hsw *haswell = pdata->dsp;
96 int ret; 94 int ret;
@@ -104,10 +102,6 @@ static int haswell_rtd_init(struct snd_soc_pcm_runtime *rtd)
104 return ret; 102 return ret;
105 } 103 }
106 104
107 /* always connected */
108 snd_soc_dapm_enable_pin(dapm, "Headphones");
109 snd_soc_dapm_enable_pin(dapm, "Mic");
110
111 return 0; 105 return 0;
112} 106}
113 107
@@ -208,18 +202,11 @@ static int haswell_audio_probe(struct platform_device *pdev)
208{ 202{
209 haswell_rt5640.dev = &pdev->dev; 203 haswell_rt5640.dev = &pdev->dev;
210 204
211 return snd_soc_register_card(&haswell_rt5640); 205 return devm_snd_soc_register_card(&pdev->dev, &haswell_rt5640);
212}
213
214static int haswell_audio_remove(struct platform_device *pdev)
215{
216 snd_soc_unregister_card(&haswell_rt5640);
217 return 0;
218} 206}
219 207
220static struct platform_driver haswell_audio = { 208static struct platform_driver haswell_audio = {
221 .probe = haswell_audio_probe, 209 .probe = haswell_audio_probe,
222 .remove = haswell_audio_remove,
223 .driver = { 210 .driver = {
224 .name = "haswell-audio", 211 .name = "haswell-audio",
225 .owner = THIS_MODULE, 212 .owner = THIS_MODULE,
diff --git a/sound/soc/intel/sst-acpi.c b/sound/soc/intel/sst-acpi.c
index 5d06eecb6198..42edc6f4fc4a 100644
--- a/sound/soc/intel/sst-acpi.c
+++ b/sound/soc/intel/sst-acpi.c
@@ -138,6 +138,7 @@ static int sst_acpi_probe(struct platform_device *pdev)
138 138
139 sst_pdata = &sst_acpi->sst_pdata; 139 sst_pdata = &sst_acpi->sst_pdata;
140 sst_pdata->id = desc->sst_id; 140 sst_pdata->id = desc->sst_id;
141 sst_pdata->dma_dev = dev;
141 sst_acpi->desc = desc; 142 sst_acpi->desc = desc;
142 sst_acpi->mach = mach; 143 sst_acpi->mach = mach;
143 144
@@ -246,6 +247,7 @@ static struct sst_acpi_desc sst_acpi_broadwell_desc = {
246 247
247static struct sst_acpi_mach baytrail_machines[] = { 248static struct sst_acpi_mach baytrail_machines[] = {
248 { "10EC5640", "byt-rt5640", "intel/fw_sst_0f28.bin-i2s_master" }, 249 { "10EC5640", "byt-rt5640", "intel/fw_sst_0f28.bin-i2s_master" },
250 { "193C9890", "byt-max98090", "intel/fw_sst_0f28.bin-i2s_master" },
249 {} 251 {}
250}; 252};
251 253
diff --git a/sound/soc/intel/sst-baytrail-dsp.c b/sound/soc/intel/sst-baytrail-dsp.c
index a50bf7fc0e3a..fc588764ffa3 100644
--- a/sound/soc/intel/sst-baytrail-dsp.c
+++ b/sound/soc/intel/sst-baytrail-dsp.c
@@ -214,6 +214,13 @@ static void sst_byt_boot(struct sst_dsp *sst)
214{ 214{
215 int tries = 10; 215 int tries = 10;
216 216
217 /*
218 * save the physical address of extended firmware block in the first
219 * 4 bytes of the mailbox
220 */
221 memcpy_toio(sst->addr.lpe + SST_BYT_MAILBOX_OFFSET,
222 &sst->pdata->fw_base, sizeof(u32));
223
217 /* release stall and wait to unstall */ 224 /* release stall and wait to unstall */
218 sst_dsp_shim_update_bits64(sst, SST_CSR, SST_BYT_CSR_STALL, 0x0); 225 sst_dsp_shim_update_bits64(sst, SST_CSR, SST_BYT_CSR_STALL, 0x0);
219 while (tries--) { 226 while (tries--) {
@@ -317,14 +324,7 @@ static int sst_byt_init(struct sst_dsp *sst, struct sst_pdata *pdata)
317 return ret; 324 return ret;
318 } 325 }
319 326
320 /* 327 ret = dma_coerce_mask_and_coherent(sst->dma_dev, DMA_BIT_MASK(32));
321 * save the physical address of extended firmware block in the first
322 * 4 bytes of the mailbox
323 */
324 memcpy_toio(sst->addr.lpe + SST_BYT_MAILBOX_OFFSET,
325 &pdata->fw_base, sizeof(u32));
326
327 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
328 if (ret) 328 if (ret)
329 return ret; 329 return ret;
330 330
diff --git a/sound/soc/intel/sst-baytrail-ipc.c b/sound/soc/intel/sst-baytrail-ipc.c
index d0eaeee21be4..d207b22ea330 100644
--- a/sound/soc/intel/sst-baytrail-ipc.c
+++ b/sound/soc/intel/sst-baytrail-ipc.c
@@ -22,7 +22,6 @@
22#include <linux/export.h> 22#include <linux/export.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/list.h>
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/kthread.h> 26#include <linux/kthread.h>
28#include <linux/firmware.h> 27#include <linux/firmware.h>
@@ -173,6 +172,7 @@ struct sst_byt {
173 /* boot */ 172 /* boot */
174 wait_queue_head_t boot_wait; 173 wait_queue_head_t boot_wait;
175 bool boot_complete; 174 bool boot_complete;
175 struct sst_fw *fw;
176 176
177 /* IPC messaging */ 177 /* IPC messaging */
178 struct list_head tx_list; 178 struct list_head tx_list;
@@ -299,6 +299,24 @@ static inline void sst_byt_tx_msg_reply_complete(struct sst_byt *byt,
299 wake_up(&msg->waitq); 299 wake_up(&msg->waitq);
300} 300}
301 301
302static void sst_byt_drop_all(struct sst_byt *byt)
303{
304 struct ipc_message *msg, *tmp;
305 unsigned long flags;
306
307 /* drop all TX and Rx messages before we stall + reset DSP */
308 spin_lock_irqsave(&byt->dsp->spinlock, flags);
309 list_for_each_entry_safe(msg, tmp, &byt->tx_list, list) {
310 list_move(&msg->list, &byt->empty_list);
311 }
312
313 list_for_each_entry_safe(msg, tmp, &byt->rx_list, list) {
314 list_move(&msg->list, &byt->empty_list);
315 }
316
317 spin_unlock_irqrestore(&byt->dsp->spinlock, flags);
318}
319
302static int sst_byt_tx_wait_done(struct sst_byt *byt, struct ipc_message *msg, 320static int sst_byt_tx_wait_done(struct sst_byt *byt, struct ipc_message *msg,
303 void *rx_data) 321 void *rx_data)
304{ 322{
@@ -542,16 +560,20 @@ struct sst_byt_stream *sst_byt_stream_new(struct sst_byt *byt, int id,
542 void *data) 560 void *data)
543{ 561{
544 struct sst_byt_stream *stream; 562 struct sst_byt_stream *stream;
563 struct sst_dsp *sst = byt->dsp;
564 unsigned long flags;
545 565
546 stream = kzalloc(sizeof(*stream), GFP_KERNEL); 566 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
547 if (stream == NULL) 567 if (stream == NULL)
548 return NULL; 568 return NULL;
549 569
570 spin_lock_irqsave(&sst->spinlock, flags);
550 list_add(&stream->node, &byt->stream_list); 571 list_add(&stream->node, &byt->stream_list);
551 stream->notify_position = notify_position; 572 stream->notify_position = notify_position;
552 stream->pdata = data; 573 stream->pdata = data;
553 stream->byt = byt; 574 stream->byt = byt;
554 stream->str_id = id; 575 stream->str_id = id;
576 spin_unlock_irqrestore(&sst->spinlock, flags);
555 577
556 return stream; 578 return stream;
557} 579}
@@ -630,6 +652,8 @@ int sst_byt_stream_free(struct sst_byt *byt, struct sst_byt_stream *stream)
630{ 652{
631 u64 header; 653 u64 header;
632 int ret = 0; 654 int ret = 0;
655 struct sst_dsp *sst = byt->dsp;
656 unsigned long flags;
633 657
634 if (!stream->commited) 658 if (!stream->commited)
635 goto out; 659 goto out;
@@ -644,8 +668,10 @@ int sst_byt_stream_free(struct sst_byt *byt, struct sst_byt_stream *stream)
644 668
645 stream->commited = false; 669 stream->commited = false;
646out: 670out:
671 spin_lock_irqsave(&sst->spinlock, flags);
647 list_del(&stream->node); 672 list_del(&stream->node);
648 kfree(stream); 673 kfree(stream);
674 spin_unlock_irqrestore(&sst->spinlock, flags);
649 675
650 return ret; 676 return ret;
651} 677}
@@ -653,36 +679,33 @@ out:
653static int sst_byt_stream_operations(struct sst_byt *byt, int type, 679static int sst_byt_stream_operations(struct sst_byt *byt, int type,
654 int stream_id, int wait) 680 int stream_id, int wait)
655{ 681{
656 struct sst_byt_start_stream_params start_stream;
657 u64 header; 682 u64 header;
658 void *tx_msg = NULL;
659 size_t size = 0;
660
661 if (type != IPC_IA_START_STREAM) {
662 header = sst_byt_header(type, 0, false, stream_id);
663 } else {
664 start_stream.byte_offset = 0;
665 header = sst_byt_header(IPC_IA_START_STREAM,
666 sizeof(start_stream) + sizeof(u32),
667 true, stream_id);
668 tx_msg = &start_stream;
669 size = sizeof(start_stream);
670 }
671 683
684 header = sst_byt_header(type, 0, false, stream_id);
672 if (wait) 685 if (wait)
673 return sst_byt_ipc_tx_msg_wait(byt, header, 686 return sst_byt_ipc_tx_msg_wait(byt, header, NULL, 0, NULL, 0);
674 tx_msg, size, NULL, 0);
675 else 687 else
676 return sst_byt_ipc_tx_msg_nowait(byt, header, tx_msg, size); 688 return sst_byt_ipc_tx_msg_nowait(byt, header, NULL, 0);
677} 689}
678 690
679/* stream ALSA trigger operations */ 691/* stream ALSA trigger operations */
680int sst_byt_stream_start(struct sst_byt *byt, struct sst_byt_stream *stream) 692int sst_byt_stream_start(struct sst_byt *byt, struct sst_byt_stream *stream,
693 u32 start_offset)
681{ 694{
695 struct sst_byt_start_stream_params start_stream;
696 void *tx_msg;
697 size_t size;
698 u64 header;
682 int ret; 699 int ret;
683 700
684 ret = sst_byt_stream_operations(byt, IPC_IA_START_STREAM, 701 start_stream.byte_offset = start_offset;
685 stream->str_id, 0); 702 header = sst_byt_header(IPC_IA_START_STREAM,
703 sizeof(start_stream) + sizeof(u32),
704 true, stream->str_id);
705 tx_msg = &start_stream;
706 size = sizeof(start_stream);
707
708 ret = sst_byt_ipc_tx_msg_nowait(byt, header, tx_msg, size);
686 if (ret < 0) 709 if (ret < 0)
687 dev_err(byt->dev, "ipc: error failed to start stream %d\n", 710 dev_err(byt->dev, "ipc: error failed to start stream %d\n",
688 stream->str_id); 711 stream->str_id);
@@ -774,6 +797,73 @@ static struct sst_dsp_device byt_dev = {
774 .ops = &sst_byt_ops, 797 .ops = &sst_byt_ops,
775}; 798};
776 799
800int sst_byt_dsp_suspend_noirq(struct device *dev, struct sst_pdata *pdata)
801{
802 struct sst_byt *byt = pdata->dsp;
803
804 dev_dbg(byt->dev, "dsp reset\n");
805 sst_dsp_reset(byt->dsp);
806 sst_byt_drop_all(byt);
807 dev_dbg(byt->dev, "dsp in reset\n");
808
809 return 0;
810}
811EXPORT_SYMBOL_GPL(sst_byt_dsp_suspend_noirq);
812
813int sst_byt_dsp_suspend_late(struct device *dev, struct sst_pdata *pdata)
814{
815 struct sst_byt *byt = pdata->dsp;
816
817 dev_dbg(byt->dev, "free all blocks and unload fw\n");
818 sst_fw_unload(byt->fw);
819
820 return 0;
821}
822EXPORT_SYMBOL_GPL(sst_byt_dsp_suspend_late);
823
824int sst_byt_dsp_boot(struct device *dev, struct sst_pdata *pdata)
825{
826 struct sst_byt *byt = pdata->dsp;
827 int ret;
828
829 dev_dbg(byt->dev, "reload dsp fw\n");
830
831 sst_dsp_reset(byt->dsp);
832
833 ret = sst_fw_reload(byt->fw);
834 if (ret < 0) {
835 dev_err(dev, "error: failed to reload firmware\n");
836 return ret;
837 }
838
839 /* wait for DSP boot completion */
840 byt->boot_complete = false;
841 sst_dsp_boot(byt->dsp);
842 dev_dbg(byt->dev, "dsp booting...\n");
843
844 return 0;
845}
846EXPORT_SYMBOL_GPL(sst_byt_dsp_boot);
847
848int sst_byt_dsp_wait_for_ready(struct device *dev, struct sst_pdata *pdata)
849{
850 struct sst_byt *byt = pdata->dsp;
851 int err;
852
853 dev_dbg(byt->dev, "wait for dsp reboot\n");
854
855 err = wait_event_timeout(byt->boot_wait, byt->boot_complete,
856 msecs_to_jiffies(IPC_BOOT_MSECS));
857 if (err == 0) {
858 dev_err(byt->dev, "ipc: error DSP boot timeout\n");
859 return -EIO;
860 }
861
862 dev_dbg(byt->dev, "dsp rebooted\n");
863 return 0;
864}
865EXPORT_SYMBOL_GPL(sst_byt_dsp_wait_for_ready);
866
777int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata) 867int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
778{ 868{
779 struct sst_byt *byt; 869 struct sst_byt *byt;
@@ -801,7 +891,7 @@ int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
801 /* start the IPC message thread */ 891 /* start the IPC message thread */
802 init_kthread_worker(&byt->kworker); 892 init_kthread_worker(&byt->kworker);
803 byt->tx_thread = kthread_run(kthread_worker_fn, 893 byt->tx_thread = kthread_run(kthread_worker_fn,
804 &byt->kworker, 894 &byt->kworker, "%s",
805 dev_name(byt->dev)); 895 dev_name(byt->dev));
806 if (IS_ERR(byt->tx_thread)) { 896 if (IS_ERR(byt->tx_thread)) {
807 err = PTR_ERR(byt->tx_thread); 897 err = PTR_ERR(byt->tx_thread);
@@ -816,7 +906,7 @@ int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
816 byt->dsp = sst_dsp_new(dev, &byt_dev, pdata); 906 byt->dsp = sst_dsp_new(dev, &byt_dev, pdata);
817 if (byt->dsp == NULL) { 907 if (byt->dsp == NULL) {
818 err = -ENODEV; 908 err = -ENODEV;
819 goto err_free_msg; 909 goto dsp_err;
820 } 910 }
821 911
822 /* keep the DSP in reset state for base FW loading */ 912 /* keep the DSP in reset state for base FW loading */
@@ -840,6 +930,7 @@ int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
840 } 930 }
841 931
842 pdata->dsp = byt; 932 pdata->dsp = byt;
933 byt->fw = byt_sst_fw;
843 934
844 return 0; 935 return 0;
845 936
@@ -848,6 +939,8 @@ boot_err:
848 sst_fw_free(byt_sst_fw); 939 sst_fw_free(byt_sst_fw);
849fw_err: 940fw_err:
850 sst_dsp_free(byt->dsp); 941 sst_dsp_free(byt->dsp);
942dsp_err:
943 kthread_stop(byt->tx_thread);
851err_free_msg: 944err_free_msg:
852 kfree(byt->msg); 945 kfree(byt->msg);
853 946
@@ -862,6 +955,7 @@ void sst_byt_dsp_free(struct device *dev, struct sst_pdata *pdata)
862 sst_dsp_reset(byt->dsp); 955 sst_dsp_reset(byt->dsp);
863 sst_fw_free_all(byt->dsp); 956 sst_fw_free_all(byt->dsp);
864 sst_dsp_free(byt->dsp); 957 sst_dsp_free(byt->dsp);
958 kthread_stop(byt->tx_thread);
865 kfree(byt->msg); 959 kfree(byt->msg);
866} 960}
867EXPORT_SYMBOL_GPL(sst_byt_dsp_free); 961EXPORT_SYMBOL_GPL(sst_byt_dsp_free);
diff --git a/sound/soc/intel/sst-baytrail-ipc.h b/sound/soc/intel/sst-baytrail-ipc.h
index f172b6440fa9..06a4d202689b 100644
--- a/sound/soc/intel/sst-baytrail-ipc.h
+++ b/sound/soc/intel/sst-baytrail-ipc.h
@@ -53,7 +53,8 @@ int sst_byt_stream_commit(struct sst_byt *byt, struct sst_byt_stream *stream);
53int sst_byt_stream_free(struct sst_byt *byt, struct sst_byt_stream *stream); 53int sst_byt_stream_free(struct sst_byt *byt, struct sst_byt_stream *stream);
54 54
55/* stream ALSA trigger operations */ 55/* stream ALSA trigger operations */
56int sst_byt_stream_start(struct sst_byt *byt, struct sst_byt_stream *stream); 56int sst_byt_stream_start(struct sst_byt *byt, struct sst_byt_stream *stream,
57 u32 start_offset);
57int sst_byt_stream_stop(struct sst_byt *byt, struct sst_byt_stream *stream); 58int sst_byt_stream_stop(struct sst_byt *byt, struct sst_byt_stream *stream);
58int sst_byt_stream_pause(struct sst_byt *byt, struct sst_byt_stream *stream); 59int sst_byt_stream_pause(struct sst_byt *byt, struct sst_byt_stream *stream);
59int sst_byt_stream_resume(struct sst_byt *byt, struct sst_byt_stream *stream); 60int sst_byt_stream_resume(struct sst_byt *byt, struct sst_byt_stream *stream);
@@ -65,5 +66,9 @@ int sst_byt_get_dsp_position(struct sst_byt *byt,
65int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata); 66int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata);
66void sst_byt_dsp_free(struct device *dev, struct sst_pdata *pdata); 67void sst_byt_dsp_free(struct device *dev, struct sst_pdata *pdata);
67struct sst_dsp *sst_byt_get_dsp(struct sst_byt *byt); 68struct sst_dsp *sst_byt_get_dsp(struct sst_byt *byt);
69int sst_byt_dsp_suspend_noirq(struct device *dev, struct sst_pdata *pdata);
70int sst_byt_dsp_suspend_late(struct device *dev, struct sst_pdata *pdata);
71int sst_byt_dsp_boot(struct device *dev, struct sst_pdata *pdata);
72int sst_byt_dsp_wait_for_ready(struct device *dev, struct sst_pdata *pdata);
68 73
69#endif 74#endif
diff --git a/sound/soc/intel/sst-baytrail-pcm.c b/sound/soc/intel/sst-baytrail-pcm.c
index 6d101f3813b4..8eab97368ea7 100644
--- a/sound/soc/intel/sst-baytrail-pcm.c
+++ b/sound/soc/intel/sst-baytrail-pcm.c
@@ -45,6 +45,11 @@ struct sst_byt_pcm_data {
45 struct sst_byt_stream *stream; 45 struct sst_byt_stream *stream;
46 struct snd_pcm_substream *substream; 46 struct snd_pcm_substream *substream;
47 struct mutex mutex; 47 struct mutex mutex;
48
49 /* latest DSP DMA hw pointer */
50 u32 hw_ptr;
51
52 struct work_struct work;
48}; 53};
49 54
50/* private data for the driver */ 55/* private data for the driver */
@@ -63,7 +68,7 @@ static int sst_byt_pcm_hw_params(struct snd_pcm_substream *substream,
63 struct snd_soc_pcm_runtime *rtd = substream->private_data; 68 struct snd_soc_pcm_runtime *rtd = substream->private_data;
64 struct sst_byt_priv_data *pdata = 69 struct sst_byt_priv_data *pdata =
65 snd_soc_platform_get_drvdata(rtd->platform); 70 snd_soc_platform_get_drvdata(rtd->platform);
66 struct sst_byt_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 71 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
67 struct sst_byt *byt = pdata->byt; 72 struct sst_byt *byt = pdata->byt;
68 u32 rate, bits; 73 u32 rate, bits;
69 u8 channels; 74 u8 channels;
@@ -130,21 +135,57 @@ static int sst_byt_pcm_hw_free(struct snd_pcm_substream *substream)
130 return 0; 135 return 0;
131} 136}
132 137
138static int sst_byt_pcm_restore_stream_context(struct snd_pcm_substream *substream)
139{
140 struct snd_soc_pcm_runtime *rtd = substream->private_data;
141 struct sst_byt_priv_data *pdata =
142 snd_soc_platform_get_drvdata(rtd->platform);
143 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
144 struct sst_byt *byt = pdata->byt;
145 int ret;
146
147 /* commit stream using existing stream params */
148 ret = sst_byt_stream_commit(byt, pcm_data->stream);
149 if (ret < 0) {
150 dev_err(rtd->dev, "PCM: failed stream commit %d\n", ret);
151 return ret;
152 }
153
154 sst_byt_stream_start(byt, pcm_data->stream, pcm_data->hw_ptr);
155
156 dev_dbg(rtd->dev, "stream context restored at offset %d\n",
157 pcm_data->hw_ptr);
158
159 return 0;
160}
161
162static void sst_byt_pcm_work(struct work_struct *work)
163{
164 struct sst_byt_pcm_data *pcm_data =
165 container_of(work, struct sst_byt_pcm_data, work);
166
167 if (snd_pcm_running(pcm_data->substream))
168 sst_byt_pcm_restore_stream_context(pcm_data->substream);
169}
170
133static int sst_byt_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 171static int sst_byt_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
134{ 172{
135 struct snd_soc_pcm_runtime *rtd = substream->private_data; 173 struct snd_soc_pcm_runtime *rtd = substream->private_data;
136 struct sst_byt_priv_data *pdata = 174 struct sst_byt_priv_data *pdata =
137 snd_soc_platform_get_drvdata(rtd->platform); 175 snd_soc_platform_get_drvdata(rtd->platform);
138 struct sst_byt_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 176 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
139 struct sst_byt *byt = pdata->byt; 177 struct sst_byt *byt = pdata->byt;
140 178
141 dev_dbg(rtd->dev, "PCM: trigger %d\n", cmd); 179 dev_dbg(rtd->dev, "PCM: trigger %d\n", cmd);
142 180
143 switch (cmd) { 181 switch (cmd) {
144 case SNDRV_PCM_TRIGGER_START: 182 case SNDRV_PCM_TRIGGER_START:
145 sst_byt_stream_start(byt, pcm_data->stream); 183 pcm_data->hw_ptr = 0;
184 sst_byt_stream_start(byt, pcm_data->stream, 0);
146 break; 185 break;
147 case SNDRV_PCM_TRIGGER_RESUME: 186 case SNDRV_PCM_TRIGGER_RESUME:
187 schedule_work(&pcm_data->work);
188 break;
148 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 189 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
149 sst_byt_stream_resume(byt, pcm_data->stream); 190 sst_byt_stream_resume(byt, pcm_data->stream);
150 break; 191 break;
@@ -168,13 +209,19 @@ static u32 byt_notify_pointer(struct sst_byt_stream *stream, void *data)
168 struct snd_pcm_substream *substream = pcm_data->substream; 209 struct snd_pcm_substream *substream = pcm_data->substream;
169 struct snd_pcm_runtime *runtime = substream->runtime; 210 struct snd_pcm_runtime *runtime = substream->runtime;
170 struct snd_soc_pcm_runtime *rtd = substream->private_data; 211 struct snd_soc_pcm_runtime *rtd = substream->private_data;
171 u32 pos; 212 struct sst_byt_priv_data *pdata =
213 snd_soc_platform_get_drvdata(rtd->platform);
214 struct sst_byt *byt = pdata->byt;
215 u32 pos, hw_pos;
172 216
217 hw_pos = sst_byt_get_dsp_position(byt, pcm_data->stream,
218 snd_pcm_lib_buffer_bytes(substream));
219 pcm_data->hw_ptr = hw_pos;
173 pos = frames_to_bytes(runtime, 220 pos = frames_to_bytes(runtime,
174 (runtime->control->appl_ptr % 221 (runtime->control->appl_ptr %
175 runtime->buffer_size)); 222 runtime->buffer_size));
176 223
177 dev_dbg(rtd->dev, "PCM: App pointer %d bytes\n", pos); 224 dev_dbg(rtd->dev, "PCM: App/DMA pointer %u/%u bytes\n", pos, hw_pos);
178 225
179 snd_pcm_period_elapsed(substream); 226 snd_pcm_period_elapsed(substream);
180 return pos; 227 return pos;
@@ -186,18 +233,11 @@ static snd_pcm_uframes_t sst_byt_pcm_pointer(struct snd_pcm_substream *substream
186 struct snd_pcm_runtime *runtime = substream->runtime; 233 struct snd_pcm_runtime *runtime = substream->runtime;
187 struct sst_byt_priv_data *pdata = 234 struct sst_byt_priv_data *pdata =
188 snd_soc_platform_get_drvdata(rtd->platform); 235 snd_soc_platform_get_drvdata(rtd->platform);
189 struct sst_byt_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 236 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
190 struct sst_byt *byt = pdata->byt;
191 snd_pcm_uframes_t offset;
192 int pos;
193 237
194 pos = sst_byt_get_dsp_position(byt, pcm_data->stream, 238 dev_dbg(rtd->dev, "PCM: DMA pointer %u bytes\n", pcm_data->hw_ptr);
195 snd_pcm_lib_buffer_bytes(substream));
196 offset = bytes_to_frames(runtime, pos);
197 239
198 dev_dbg(rtd->dev, "PCM: DMA pointer %zu bytes\n", 240 return bytes_to_frames(runtime, pcm_data->hw_ptr);
199 frames_to_bytes(runtime, (u32)offset));
200 return offset;
201} 241}
202 242
203static int sst_byt_pcm_open(struct snd_pcm_substream *substream) 243static int sst_byt_pcm_open(struct snd_pcm_substream *substream)
@@ -205,20 +245,18 @@ static int sst_byt_pcm_open(struct snd_pcm_substream *substream)
205 struct snd_soc_pcm_runtime *rtd = substream->private_data; 245 struct snd_soc_pcm_runtime *rtd = substream->private_data;
206 struct sst_byt_priv_data *pdata = 246 struct sst_byt_priv_data *pdata =
207 snd_soc_platform_get_drvdata(rtd->platform); 247 snd_soc_platform_get_drvdata(rtd->platform);
208 struct sst_byt_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 248 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
209 struct sst_byt *byt = pdata->byt; 249 struct sst_byt *byt = pdata->byt;
210 250
211 dev_dbg(rtd->dev, "PCM: open\n"); 251 dev_dbg(rtd->dev, "PCM: open\n");
212 252
213 pcm_data = &pdata->pcm[rtd->cpu_dai->id];
214 mutex_lock(&pcm_data->mutex); 253 mutex_lock(&pcm_data->mutex);
215 254
216 snd_soc_pcm_set_drvdata(rtd, pcm_data);
217 pcm_data->substream = substream; 255 pcm_data->substream = substream;
218 256
219 snd_soc_set_runtime_hwparams(substream, &sst_byt_pcm_hardware); 257 snd_soc_set_runtime_hwparams(substream, &sst_byt_pcm_hardware);
220 258
221 pcm_data->stream = sst_byt_stream_new(byt, rtd->cpu_dai->id + 1, 259 pcm_data->stream = sst_byt_stream_new(byt, substream->stream + 1,
222 byt_notify_pointer, pcm_data); 260 byt_notify_pointer, pcm_data);
223 if (pcm_data->stream == NULL) { 261 if (pcm_data->stream == NULL) {
224 dev_err(rtd->dev, "failed to create stream\n"); 262 dev_err(rtd->dev, "failed to create stream\n");
@@ -235,12 +273,13 @@ static int sst_byt_pcm_close(struct snd_pcm_substream *substream)
235 struct snd_soc_pcm_runtime *rtd = substream->private_data; 273 struct snd_soc_pcm_runtime *rtd = substream->private_data;
236 struct sst_byt_priv_data *pdata = 274 struct sst_byt_priv_data *pdata =
237 snd_soc_platform_get_drvdata(rtd->platform); 275 snd_soc_platform_get_drvdata(rtd->platform);
238 struct sst_byt_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 276 struct sst_byt_pcm_data *pcm_data = &pdata->pcm[substream->stream];
239 struct sst_byt *byt = pdata->byt; 277 struct sst_byt *byt = pdata->byt;
240 int ret; 278 int ret;
241 279
242 dev_dbg(rtd->dev, "PCM: close\n"); 280 dev_dbg(rtd->dev, "PCM: close\n");
243 281
282 cancel_work_sync(&pcm_data->work);
244 mutex_lock(&pcm_data->mutex); 283 mutex_lock(&pcm_data->mutex);
245 ret = sst_byt_stream_free(byt, pcm_data->stream); 284 ret = sst_byt_stream_free(byt, pcm_data->stream);
246 if (ret < 0) { 285 if (ret < 0) {
@@ -283,18 +322,16 @@ static int sst_byt_pcm_new(struct snd_soc_pcm_runtime *rtd)
283{ 322{
284 struct snd_pcm *pcm = rtd->pcm; 323 struct snd_pcm *pcm = rtd->pcm;
285 size_t size; 324 size_t size;
325 struct snd_soc_platform *platform = rtd->platform;
326 struct sst_pdata *pdata = dev_get_platdata(platform->dev);
286 int ret = 0; 327 int ret = 0;
287 328
288 ret = dma_coerce_mask_and_coherent(rtd->card->dev, DMA_BIT_MASK(32));
289 if (ret)
290 return ret;
291
292 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream || 329 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream ||
293 pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { 330 pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
294 size = sst_byt_pcm_hardware.buffer_bytes_max; 331 size = sst_byt_pcm_hardware.buffer_bytes_max;
295 ret = snd_pcm_lib_preallocate_pages_for_all(pcm, 332 ret = snd_pcm_lib_preallocate_pages_for_all(pcm,
296 SNDRV_DMA_TYPE_DEV, 333 SNDRV_DMA_TYPE_DEV,
297 rtd->card->dev, 334 pdata->dma_dev,
298 size, size); 335 size, size);
299 if (ret) { 336 if (ret) {
300 dev_err(rtd->dev, "dma buffer allocation failed %d\n", 337 dev_err(rtd->dev, "dma buffer allocation failed %d\n",
@@ -308,7 +345,7 @@ static int sst_byt_pcm_new(struct snd_soc_pcm_runtime *rtd)
308 345
309static struct snd_soc_dai_driver byt_dais[] = { 346static struct snd_soc_dai_driver byt_dais[] = {
310 { 347 {
311 .name = "Front-cpu-dai", 348 .name = "Baytrail PCM",
312 .playback = { 349 .playback = {
313 .stream_name = "System Playback", 350 .stream_name = "System Playback",
314 .channels_min = 2, 351 .channels_min = 2,
@@ -317,9 +354,6 @@ static struct snd_soc_dai_driver byt_dais[] = {
317 .formats = SNDRV_PCM_FMTBIT_S24_3LE | 354 .formats = SNDRV_PCM_FMTBIT_S24_3LE |
318 SNDRV_PCM_FMTBIT_S16_LE, 355 SNDRV_PCM_FMTBIT_S16_LE,
319 }, 356 },
320 },
321 {
322 .name = "Mic1-cpu-dai",
323 .capture = { 357 .capture = {
324 .stream_name = "Analog Capture", 358 .stream_name = "Analog Capture",
325 .channels_min = 2, 359 .channels_min = 2,
@@ -344,8 +378,10 @@ static int sst_byt_pcm_probe(struct snd_soc_platform *platform)
344 priv_data->byt = plat_data->dsp; 378 priv_data->byt = plat_data->dsp;
345 snd_soc_platform_set_drvdata(platform, priv_data); 379 snd_soc_platform_set_drvdata(platform, priv_data);
346 380
347 for (i = 0; i < ARRAY_SIZE(byt_dais); i++) 381 for (i = 0; i < BYT_PCM_COUNT; i++) {
348 mutex_init(&priv_data->pcm[i].mutex); 382 mutex_init(&priv_data->pcm[i].mutex);
383 INIT_WORK(&priv_data->pcm[i].work, sst_byt_pcm_work);
384 }
349 385
350 return 0; 386 return 0;
351} 387}
@@ -367,6 +403,72 @@ static const struct snd_soc_component_driver byt_dai_component = {
367 .name = "byt-dai", 403 .name = "byt-dai",
368}; 404};
369 405
406#ifdef CONFIG_PM
407static int sst_byt_pcm_dev_suspend_noirq(struct device *dev)
408{
409 struct sst_pdata *sst_pdata = dev_get_platdata(dev);
410 int ret;
411
412 dev_dbg(dev, "suspending noirq\n");
413
414 /* at this point all streams will be stopped and context saved */
415 ret = sst_byt_dsp_suspend_noirq(dev, sst_pdata);
416 if (ret < 0) {
417 dev_err(dev, "failed to suspend %d\n", ret);
418 return ret;
419 }
420
421 return ret;
422}
423
424static int sst_byt_pcm_dev_suspend_late(struct device *dev)
425{
426 struct sst_pdata *sst_pdata = dev_get_platdata(dev);
427 int ret;
428
429 dev_dbg(dev, "suspending late\n");
430
431 ret = sst_byt_dsp_suspend_late(dev, sst_pdata);
432 if (ret < 0) {
433 dev_err(dev, "failed to suspend %d\n", ret);
434 return ret;
435 }
436
437 return ret;
438}
439
440static int sst_byt_pcm_dev_resume_early(struct device *dev)
441{
442 struct sst_pdata *sst_pdata = dev_get_platdata(dev);
443
444 dev_dbg(dev, "resume early\n");
445
446 /* load fw and boot DSP */
447 return sst_byt_dsp_boot(dev, sst_pdata);
448}
449
450static int sst_byt_pcm_dev_resume(struct device *dev)
451{
452 struct sst_pdata *sst_pdata = dev_get_platdata(dev);
453
454 dev_dbg(dev, "resume\n");
455
456 /* wait for FW to finish booting */
457 return sst_byt_dsp_wait_for_ready(dev, sst_pdata);
458}
459
460static const struct dev_pm_ops sst_byt_pm_ops = {
461 .suspend_noirq = sst_byt_pcm_dev_suspend_noirq,
462 .suspend_late = sst_byt_pcm_dev_suspend_late,
463 .resume_early = sst_byt_pcm_dev_resume_early,
464 .resume = sst_byt_pcm_dev_resume,
465};
466
467#define SST_BYT_PM_OPS (&sst_byt_pm_ops)
468#else
469#define SST_BYT_PM_OPS NULL
470#endif
471
370static int sst_byt_pcm_dev_probe(struct platform_device *pdev) 472static int sst_byt_pcm_dev_probe(struct platform_device *pdev)
371{ 473{
372 struct sst_pdata *sst_pdata = dev_get_platdata(&pdev->dev); 474 struct sst_pdata *sst_pdata = dev_get_platdata(&pdev->dev);
@@ -409,6 +511,7 @@ static struct platform_driver sst_byt_pcm_driver = {
409 .driver = { 511 .driver = {
410 .name = "baytrail-pcm-audio", 512 .name = "baytrail-pcm-audio",
411 .owner = THIS_MODULE, 513 .owner = THIS_MODULE,
514 .pm = SST_BYT_PM_OPS,
412 }, 515 },
413 516
414 .probe = sst_byt_pcm_dev_probe, 517 .probe = sst_byt_pcm_dev_probe,
diff --git a/sound/soc/intel/sst-dsp-priv.h b/sound/soc/intel/sst-dsp-priv.h
index fe8e81aad646..ffb308bd81ce 100644
--- a/sound/soc/intel/sst-dsp-priv.h
+++ b/sound/soc/intel/sst-dsp-priv.h
@@ -136,7 +136,7 @@ struct sst_module_data {
136 enum sst_data_type data_type; /* type of module data */ 136 enum sst_data_type data_type; /* type of module data */
137 137
138 u32 size; /* size in bytes */ 138 u32 size; /* size in bytes */
139 u32 offset; /* offset in FW file */ 139 int32_t offset; /* offset in FW file */
140 u32 data_offset; /* offset in ADSP memory space */ 140 u32 data_offset; /* offset in ADSP memory space */
141 void *data; /* module data */ 141 void *data; /* module data */
142}; 142};
@@ -228,6 +228,7 @@ struct sst_dsp {
228 spinlock_t spinlock; /* IPC locking */ 228 spinlock_t spinlock; /* IPC locking */
229 struct mutex mutex; /* DSP FW lock */ 229 struct mutex mutex; /* DSP FW lock */
230 struct device *dev; 230 struct device *dev;
231 struct device *dma_dev;
231 void *thread_context; 232 void *thread_context;
232 int irq; 233 int irq;
233 u32 id; 234 u32 id;
@@ -283,6 +284,8 @@ struct sst_fw *sst_fw_new(struct sst_dsp *dsp,
283 const struct firmware *fw, void *private); 284 const struct firmware *fw, void *private);
284void sst_fw_free(struct sst_fw *sst_fw); 285void sst_fw_free(struct sst_fw *sst_fw);
285void sst_fw_free_all(struct sst_dsp *dsp); 286void sst_fw_free_all(struct sst_dsp *dsp);
287int sst_fw_reload(struct sst_fw *sst_fw);
288void sst_fw_unload(struct sst_fw *sst_fw);
286 289
287/* Create/Free firmware modules */ 290/* Create/Free firmware modules */
288struct sst_module *sst_module_new(struct sst_fw *sst_fw, 291struct sst_module *sst_module_new(struct sst_fw *sst_fw,
diff --git a/sound/soc/intel/sst-dsp.c b/sound/soc/intel/sst-dsp.c
index 0c129fd85ecf..0b715b20a2d7 100644
--- a/sound/soc/intel/sst-dsp.c
+++ b/sound/soc/intel/sst-dsp.c
@@ -337,6 +337,7 @@ struct sst_dsp *sst_dsp_new(struct device *dev,
337 spin_lock_init(&sst->spinlock); 337 spin_lock_init(&sst->spinlock);
338 mutex_init(&sst->mutex); 338 mutex_init(&sst->mutex);
339 sst->dev = dev; 339 sst->dev = dev;
340 sst->dma_dev = pdata->dma_dev;
340 sst->thread_context = sst_dev->thread_context; 341 sst->thread_context = sst_dev->thread_context;
341 sst->sst_dev = sst_dev; 342 sst->sst_dev = sst_dev;
342 sst->id = pdata->id; 343 sst->id = pdata->id;
diff --git a/sound/soc/intel/sst-dsp.h b/sound/soc/intel/sst-dsp.h
index 74052b59485c..e44423be66c4 100644
--- a/sound/soc/intel/sst-dsp.h
+++ b/sound/soc/intel/sst-dsp.h
@@ -169,6 +169,7 @@ struct sst_pdata {
169 u32 dma_base; 169 u32 dma_base;
170 u32 dma_size; 170 u32 dma_size;
171 int dma_engine; 171 int dma_engine;
172 struct device *dma_dev;
172 173
173 /* DSP */ 174 /* DSP */
174 u32 id; 175 u32 id;
diff --git a/sound/soc/intel/sst-firmware.c b/sound/soc/intel/sst-firmware.c
index f7687107cf7f..3bb43dac892d 100644
--- a/sound/soc/intel/sst-firmware.c
+++ b/sound/soc/intel/sst-firmware.c
@@ -30,6 +30,8 @@
30#include "sst-dsp.h" 30#include "sst-dsp.h"
31#include "sst-dsp-priv.h" 31#include "sst-dsp-priv.h"
32 32
33static void block_module_remove(struct sst_module *module);
34
33static void sst_memcpy32(volatile void __iomem *dest, void *src, u32 bytes) 35static void sst_memcpy32(volatile void __iomem *dest, void *src, u32 bytes)
34{ 36{
35 u32 i; 37 u32 i;
@@ -57,14 +59,8 @@ struct sst_fw *sst_fw_new(struct sst_dsp *dsp,
57 sst_fw->private = private; 59 sst_fw->private = private;
58 sst_fw->size = fw->size; 60 sst_fw->size = fw->size;
59 61
60 err = dma_coerce_mask_and_coherent(dsp->dev, DMA_BIT_MASK(32));
61 if (err < 0) {
62 kfree(sst_fw);
63 return NULL;
64 }
65
66 /* allocate DMA buffer to store FW data */ 62 /* allocate DMA buffer to store FW data */
67 sst_fw->dma_buf = dma_alloc_coherent(dsp->dev, sst_fw->size, 63 sst_fw->dma_buf = dma_alloc_coherent(dsp->dma_dev, sst_fw->size,
68 &sst_fw->dmable_fw_paddr, GFP_DMA | GFP_KERNEL); 64 &sst_fw->dmable_fw_paddr, GFP_DMA | GFP_KERNEL);
69 if (!sst_fw->dma_buf) { 65 if (!sst_fw->dma_buf) {
70 dev_err(dsp->dev, "error: DMA alloc failed\n"); 66 dev_err(dsp->dev, "error: DMA alloc failed\n");
@@ -97,6 +93,42 @@ parse_err:
97} 93}
98EXPORT_SYMBOL_GPL(sst_fw_new); 94EXPORT_SYMBOL_GPL(sst_fw_new);
99 95
96int sst_fw_reload(struct sst_fw *sst_fw)
97{
98 struct sst_dsp *dsp = sst_fw->dsp;
99 int ret;
100
101 dev_dbg(dsp->dev, "reloading firmware\n");
102
103 /* call core specific FW paser to load FW data into DSP */
104 ret = dsp->ops->parse_fw(sst_fw);
105 if (ret < 0)
106 dev_err(dsp->dev, "error: parse fw failed %d\n", ret);
107
108 return ret;
109}
110EXPORT_SYMBOL_GPL(sst_fw_reload);
111
112void sst_fw_unload(struct sst_fw *sst_fw)
113{
114 struct sst_dsp *dsp = sst_fw->dsp;
115 struct sst_module *module, *tmp;
116
117 dev_dbg(dsp->dev, "unloading firmware\n");
118
119 mutex_lock(&dsp->mutex);
120 list_for_each_entry_safe(module, tmp, &dsp->module_list, list) {
121 if (module->sst_fw == sst_fw) {
122 block_module_remove(module);
123 list_del(&module->list);
124 kfree(module);
125 }
126 }
127
128 mutex_unlock(&dsp->mutex);
129}
130EXPORT_SYMBOL_GPL(sst_fw_unload);
131
100/* free single firmware object */ 132/* free single firmware object */
101void sst_fw_free(struct sst_fw *sst_fw) 133void sst_fw_free(struct sst_fw *sst_fw)
102{ 134{
@@ -106,7 +138,7 @@ void sst_fw_free(struct sst_fw *sst_fw)
106 list_del(&sst_fw->list); 138 list_del(&sst_fw->list);
107 mutex_unlock(&dsp->mutex); 139 mutex_unlock(&dsp->mutex);
108 140
109 dma_free_coherent(dsp->dev, sst_fw->size, sst_fw->dma_buf, 141 dma_free_coherent(dsp->dma_dev, sst_fw->size, sst_fw->dma_buf,
110 sst_fw->dmable_fw_paddr); 142 sst_fw->dmable_fw_paddr);
111 kfree(sst_fw); 143 kfree(sst_fw);
112} 144}
@@ -202,6 +234,9 @@ static int block_alloc_contiguous(struct sst_module *module,
202 size -= block->size; 234 size -= block->size;
203 } 235 }
204 236
237 list_for_each_entry(block, &tmp, list)
238 list_add(&block->module_list, &module->block_list);
239
205 list_splice(&tmp, &dsp->used_block_list); 240 list_splice(&tmp, &dsp->used_block_list);
206 return 0; 241 return 0;
207} 242}
@@ -247,8 +282,7 @@ static int block_alloc(struct sst_module *module,
247 /* do we span > 1 blocks */ 282 /* do we span > 1 blocks */
248 if (data->size > block->size) { 283 if (data->size > block->size) {
249 ret = block_alloc_contiguous(module, data, 284 ret = block_alloc_contiguous(module, data,
250 block->offset + block->size, 285 block->offset, data->size);
251 data->size - block->size);
252 if (ret == 0) 286 if (ret == 0)
253 return ret; 287 return ret;
254 } 288 }
@@ -344,7 +378,7 @@ static int block_alloc_fixed(struct sst_module *module,
344 378
345 err = block_alloc_contiguous(module, data, 379 err = block_alloc_contiguous(module, data,
346 block->offset + block->size, 380 block->offset + block->size,
347 data->size - block->size + data->offset - block->offset); 381 data->size - block->size);
348 if (err < 0) 382 if (err < 0)
349 return -ENOMEM; 383 return -ENOMEM;
350 384
@@ -371,15 +405,10 @@ static int block_alloc_fixed(struct sst_module *module,
371 if (data->offset >= block->offset && data->offset < block_end) { 405 if (data->offset >= block->offset && data->offset < block_end) {
372 406
373 err = block_alloc_contiguous(module, data, 407 err = block_alloc_contiguous(module, data,
374 block->offset + block->size, 408 block->offset, data->size);
375 data->size - block->size);
376 if (err < 0) 409 if (err < 0)
377 return -ENOMEM; 410 return -ENOMEM;
378 411
379 /* add block */
380 block->data_type = data->data_type;
381 list_move(&block->list, &dsp->used_block_list);
382 list_add(&block->module_list, &module->block_list);
383 return 0; 412 return 0;
384 } 413 }
385 414
@@ -505,9 +534,7 @@ struct sst_module *sst_mem_block_alloc_scratch(struct sst_dsp *dsp)
505 534
506 /* calculate required scratch size */ 535 /* calculate required scratch size */
507 list_for_each_entry(sst_module, &dsp->module_list, list) { 536 list_for_each_entry(sst_module, &dsp->module_list, list) {
508 if (scratch->s.size > sst_module->s.size) 537 if (scratch->s.size < sst_module->s.size)
509 scratch->s.size = scratch->s.size;
510 else
511 scratch->s.size = sst_module->s.size; 538 scratch->s.size = sst_module->s.size;
512 } 539 }
513 540
diff --git a/sound/soc/intel/sst-haswell-dsp.c b/sound/soc/intel/sst-haswell-dsp.c
index f5ebf36af889..535f517629fd 100644
--- a/sound/soc/intel/sst-haswell-dsp.c
+++ b/sound/soc/intel/sst-haswell-dsp.c
@@ -433,7 +433,7 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata)
433 int ret = -ENODEV, i, j, region_count; 433 int ret = -ENODEV, i, j, region_count;
434 u32 offset, size; 434 u32 offset, size;
435 435
436 dev = sst->dev; 436 dev = sst->dma_dev;
437 437
438 switch (sst->id) { 438 switch (sst->id) {
439 case SST_DEV_ID_LYNX_POINT: 439 case SST_DEV_ID_LYNX_POINT:
@@ -466,7 +466,7 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata)
466 return ret; 466 return ret;
467 } 467 }
468 468
469 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); 469 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(31));
470 if (ret) 470 if (ret)
471 return ret; 471 return ret;
472 472
diff --git a/sound/soc/intel/sst-haswell-ipc.c b/sound/soc/intel/sst-haswell-ipc.c
index f46bb4ddde6f..434236343ddf 100644
--- a/sound/soc/intel/sst-haswell-ipc.c
+++ b/sound/soc/intel/sst-haswell-ipc.c
@@ -25,7 +25,6 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/list.h>
29#include <linux/platform_device.h> 28#include <linux/platform_device.h>
30#include <linux/kthread.h> 29#include <linux/kthread.h>
31#include <linux/firmware.h> 30#include <linux/firmware.h>
@@ -617,7 +616,7 @@ static void hsw_notification_work(struct work_struct *work)
617 case IPC_POSITION_CHANGED: 616 case IPC_POSITION_CHANGED:
618 trace_ipc_notification("DSP stream position changed for", 617 trace_ipc_notification("DSP stream position changed for",
619 stream->reply.stream_hw_id); 618 stream->reply.stream_hw_id);
620 sst_dsp_inbox_read(hsw->dsp, pos, sizeof(pos)); 619 sst_dsp_inbox_read(hsw->dsp, pos, sizeof(*pos));
621 620
622 if (stream->notify_position) 621 if (stream->notify_position)
623 stream->notify_position(stream, stream->pdata); 622 stream->notify_position(stream, stream->pdata);
@@ -991,7 +990,8 @@ int sst_hsw_stream_get_volume(struct sst_hsw *hsw, struct sst_hsw_stream *stream
991 return -EINVAL; 990 return -EINVAL;
992 991
993 sst_dsp_read(hsw->dsp, volume, 992 sst_dsp_read(hsw->dsp, volume,
994 stream->reply.volume_register_address[channel], sizeof(volume)); 993 stream->reply.volume_register_address[channel],
994 sizeof(*volume));
995 995
996 return 0; 996 return 0;
997} 997}
@@ -1158,11 +1158,14 @@ struct sst_hsw_stream *sst_hsw_stream_new(struct sst_hsw *hsw, int id,
1158 void *data) 1158 void *data)
1159{ 1159{
1160 struct sst_hsw_stream *stream; 1160 struct sst_hsw_stream *stream;
1161 struct sst_dsp *sst = hsw->dsp;
1162 unsigned long flags;
1161 1163
1162 stream = kzalloc(sizeof(*stream), GFP_KERNEL); 1164 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
1163 if (stream == NULL) 1165 if (stream == NULL)
1164 return NULL; 1166 return NULL;
1165 1167
1168 spin_lock_irqsave(&sst->spinlock, flags);
1166 list_add(&stream->node, &hsw->stream_list); 1169 list_add(&stream->node, &hsw->stream_list);
1167 stream->notify_position = notify_position; 1170 stream->notify_position = notify_position;
1168 stream->pdata = data; 1171 stream->pdata = data;
@@ -1171,6 +1174,7 @@ struct sst_hsw_stream *sst_hsw_stream_new(struct sst_hsw *hsw, int id,
1171 1174
1172 /* work to process notification messages */ 1175 /* work to process notification messages */
1173 INIT_WORK(&stream->notify_work, hsw_notification_work); 1176 INIT_WORK(&stream->notify_work, hsw_notification_work);
1177 spin_unlock_irqrestore(&sst->spinlock, flags);
1174 1178
1175 return stream; 1179 return stream;
1176} 1180}
@@ -1179,6 +1183,8 @@ int sst_hsw_stream_free(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1179{ 1183{
1180 u32 header; 1184 u32 header;
1181 int ret = 0; 1185 int ret = 0;
1186 struct sst_dsp *sst = hsw->dsp;
1187 unsigned long flags;
1182 1188
1183 /* dont free DSP streams that are not commited */ 1189 /* dont free DSP streams that are not commited */
1184 if (!stream->commited) 1190 if (!stream->commited)
@@ -1200,8 +1206,11 @@ int sst_hsw_stream_free(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1200 trace_hsw_stream_free_req(stream, &stream->free_req); 1206 trace_hsw_stream_free_req(stream, &stream->free_req);
1201 1207
1202out: 1208out:
1209 cancel_work_sync(&stream->notify_work);
1210 spin_lock_irqsave(&sst->spinlock, flags);
1203 list_del(&stream->node); 1211 list_del(&stream->node);
1204 kfree(stream); 1212 kfree(stream);
1213 spin_unlock_irqrestore(&sst->spinlock, flags);
1205 1214
1206 return ret; 1215 return ret;
1207} 1216}
@@ -1537,10 +1546,28 @@ int sst_hsw_stream_reset(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1537} 1546}
1538 1547
1539/* Stream pointer positions */ 1548/* Stream pointer positions */
1540int sst_hsw_get_dsp_position(struct sst_hsw *hsw, 1549u32 sst_hsw_get_dsp_position(struct sst_hsw *hsw,
1541 struct sst_hsw_stream *stream) 1550 struct sst_hsw_stream *stream)
1542{ 1551{
1543 return stream->rpos.position; 1552 u32 rpos;
1553
1554 sst_dsp_read(hsw->dsp, &rpos,
1555 stream->reply.read_position_register_address, sizeof(rpos));
1556
1557 return rpos;
1558}
1559
1560/* Stream presentation (monotonic) positions */
1561u64 sst_hsw_get_dsp_presentation_position(struct sst_hsw *hsw,
1562 struct sst_hsw_stream *stream)
1563{
1564 u64 ppos;
1565
1566 sst_dsp_read(hsw->dsp, &ppos,
1567 stream->reply.presentation_position_register_address,
1568 sizeof(ppos));
1569
1570 return ppos;
1544} 1571}
1545 1572
1546int sst_hsw_stream_set_write_position(struct sst_hsw *hsw, 1573int sst_hsw_stream_set_write_position(struct sst_hsw *hsw,
@@ -1609,7 +1636,7 @@ int sst_hsw_dx_set_state(struct sst_hsw *hsw,
1609 trace_ipc_request("PM enter Dx state", state); 1636 trace_ipc_request("PM enter Dx state", state);
1610 1637
1611 ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_), 1638 ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_),
1612 dx, sizeof(dx)); 1639 dx, sizeof(*dx));
1613 if (ret < 0) { 1640 if (ret < 0) {
1614 dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state); 1641 dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state);
1615 return ret; 1642 return ret;
@@ -1702,17 +1729,17 @@ int sst_hsw_dsp_init(struct device *dev, struct sst_pdata *pdata)
1702 1729
1703 ret = msg_empty_list_init(hsw); 1730 ret = msg_empty_list_init(hsw);
1704 if (ret < 0) 1731 if (ret < 0)
1705 goto list_err; 1732 return -ENOMEM;
1706 1733
1707 /* start the IPC message thread */ 1734 /* start the IPC message thread */
1708 init_kthread_worker(&hsw->kworker); 1735 init_kthread_worker(&hsw->kworker);
1709 hsw->tx_thread = kthread_run(kthread_worker_fn, 1736 hsw->tx_thread = kthread_run(kthread_worker_fn,
1710 &hsw->kworker, 1737 &hsw->kworker, "%s",
1711 dev_name(hsw->dev)); 1738 dev_name(hsw->dev));
1712 if (IS_ERR(hsw->tx_thread)) { 1739 if (IS_ERR(hsw->tx_thread)) {
1713 ret = PTR_ERR(hsw->tx_thread); 1740 ret = PTR_ERR(hsw->tx_thread);
1714 dev_err(hsw->dev, "error: failed to create message TX task\n"); 1741 dev_err(hsw->dev, "error: failed to create message TX task\n");
1715 goto list_err; 1742 goto err_free_msg;
1716 } 1743 }
1717 init_kthread_work(&hsw->kwork, ipc_tx_msgs); 1744 init_kthread_work(&hsw->kwork, ipc_tx_msgs);
1718 1745
@@ -1722,7 +1749,7 @@ int sst_hsw_dsp_init(struct device *dev, struct sst_pdata *pdata)
1722 hsw->dsp = sst_dsp_new(dev, &hsw_dev, pdata); 1749 hsw->dsp = sst_dsp_new(dev, &hsw_dev, pdata);
1723 if (hsw->dsp == NULL) { 1750 if (hsw->dsp == NULL) {
1724 ret = -ENODEV; 1751 ret = -ENODEV;
1725 goto list_err; 1752 goto dsp_err;
1726 } 1753 }
1727 1754
1728 /* keep the DSP in reset state for base FW loading */ 1755 /* keep the DSP in reset state for base FW loading */
@@ -1766,8 +1793,11 @@ boot_err:
1766 sst_fw_free(hsw_sst_fw); 1793 sst_fw_free(hsw_sst_fw);
1767fw_err: 1794fw_err:
1768 sst_dsp_free(hsw->dsp); 1795 sst_dsp_free(hsw->dsp);
1796dsp_err:
1797 kthread_stop(hsw->tx_thread);
1798err_free_msg:
1769 kfree(hsw->msg); 1799 kfree(hsw->msg);
1770list_err: 1800
1771 return ret; 1801 return ret;
1772} 1802}
1773EXPORT_SYMBOL_GPL(sst_hsw_dsp_init); 1803EXPORT_SYMBOL_GPL(sst_hsw_dsp_init);
@@ -1780,6 +1810,7 @@ void sst_hsw_dsp_free(struct device *dev, struct sst_pdata *pdata)
1780 sst_fw_free_all(hsw->dsp); 1810 sst_fw_free_all(hsw->dsp);
1781 sst_dsp_free(hsw->dsp); 1811 sst_dsp_free(hsw->dsp);
1782 kfree(hsw->scratch); 1812 kfree(hsw->scratch);
1813 kthread_stop(hsw->tx_thread);
1783 kfree(hsw->msg); 1814 kfree(hsw->msg);
1784} 1815}
1785EXPORT_SYMBOL_GPL(sst_hsw_dsp_free); 1816EXPORT_SYMBOL_GPL(sst_hsw_dsp_free);
diff --git a/sound/soc/intel/sst-haswell-ipc.h b/sound/soc/intel/sst-haswell-ipc.h
index d517929ccc38..2ac194a6d04b 100644
--- a/sound/soc/intel/sst-haswell-ipc.h
+++ b/sound/soc/intel/sst-haswell-ipc.h
@@ -464,7 +464,9 @@ int sst_hsw_stream_get_write_pos(struct sst_hsw *hsw,
464 struct sst_hsw_stream *stream, u32 *position); 464 struct sst_hsw_stream *stream, u32 *position);
465int sst_hsw_stream_set_write_position(struct sst_hsw *hsw, 465int sst_hsw_stream_set_write_position(struct sst_hsw *hsw,
466 struct sst_hsw_stream *stream, u32 stage_id, u32 position); 466 struct sst_hsw_stream *stream, u32 stage_id, u32 position);
467int sst_hsw_get_dsp_position(struct sst_hsw *hsw, 467u32 sst_hsw_get_dsp_position(struct sst_hsw *hsw,
468 struct sst_hsw_stream *stream);
469u64 sst_hsw_get_dsp_presentation_position(struct sst_hsw *hsw,
468 struct sst_hsw_stream *stream); 470 struct sst_hsw_stream *stream);
469 471
470/* HW port config */ 472/* HW port config */
diff --git a/sound/soc/intel/sst-haswell-pcm.c b/sound/soc/intel/sst-haswell-pcm.c
index 0a32dd13a23d..058efb17c568 100644
--- a/sound/soc/intel/sst-haswell-pcm.c
+++ b/sound/soc/intel/sst-haswell-pcm.c
@@ -17,7 +17,6 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/module.h>
21#include <linux/delay.h> 20#include <linux/delay.h>
22#include <asm/page.h> 21#include <asm/page.h>
23#include <asm/pgtable.h> 22#include <asm/pgtable.h>
@@ -99,6 +98,7 @@ struct hsw_pcm_data {
99 struct snd_compr_stream *cstream; 98 struct snd_compr_stream *cstream;
100 unsigned int wpos; 99 unsigned int wpos;
101 struct mutex mutex; 100 struct mutex mutex;
101 bool allocated;
102}; 102};
103 103
104/* private data for the driver */ 104/* private data for the driver */
@@ -107,12 +107,14 @@ struct hsw_priv_data {
107 struct sst_hsw *hsw; 107 struct sst_hsw *hsw;
108 108
109 /* page tables */ 109 /* page tables */
110 unsigned char *pcm_pg[HSW_PCM_COUNT][2]; 110 struct snd_dma_buffer dmab[HSW_PCM_COUNT][2];
111 111
112 /* DAI data */ 112 /* DAI data */
113 struct hsw_pcm_data pcm[HSW_PCM_COUNT]; 113 struct hsw_pcm_data pcm[HSW_PCM_COUNT];
114}; 114};
115 115
116static u32 hsw_notify_pointer(struct sst_hsw_stream *stream, void *data);
117
116static inline u32 hsw_mixer_to_ipc(unsigned int value) 118static inline u32 hsw_mixer_to_ipc(unsigned int value)
117{ 119{
118 if (value >= ARRAY_SIZE(volume_map)) 120 if (value >= ARRAY_SIZE(volume_map))
@@ -136,7 +138,7 @@ static inline unsigned int hsw_ipc_to_mixer(u32 value)
136static int hsw_stream_volume_put(struct snd_kcontrol *kcontrol, 138static int hsw_stream_volume_put(struct snd_kcontrol *kcontrol,
137 struct snd_ctl_elem_value *ucontrol) 139 struct snd_ctl_elem_value *ucontrol)
138{ 140{
139 struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); 141 struct snd_soc_platform *platform = snd_soc_kcontrol_platform(kcontrol);
140 struct soc_mixer_control *mc = 142 struct soc_mixer_control *mc =
141 (struct soc_mixer_control *)kcontrol->private_value; 143 (struct soc_mixer_control *)kcontrol->private_value;
142 struct hsw_priv_data *pdata = 144 struct hsw_priv_data *pdata =
@@ -174,7 +176,7 @@ static int hsw_stream_volume_put(struct snd_kcontrol *kcontrol,
174static int hsw_stream_volume_get(struct snd_kcontrol *kcontrol, 176static int hsw_stream_volume_get(struct snd_kcontrol *kcontrol,
175 struct snd_ctl_elem_value *ucontrol) 177 struct snd_ctl_elem_value *ucontrol)
176{ 178{
177 struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); 179 struct snd_soc_platform *platform = snd_soc_kcontrol_platform(kcontrol);
178 struct soc_mixer_control *mc = 180 struct soc_mixer_control *mc =
179 (struct soc_mixer_control *)kcontrol->private_value; 181 (struct soc_mixer_control *)kcontrol->private_value;
180 struct hsw_priv_data *pdata = 182 struct hsw_priv_data *pdata =
@@ -206,7 +208,7 @@ static int hsw_stream_volume_get(struct snd_kcontrol *kcontrol,
206static int hsw_volume_put(struct snd_kcontrol *kcontrol, 208static int hsw_volume_put(struct snd_kcontrol *kcontrol,
207 struct snd_ctl_elem_value *ucontrol) 209 struct snd_ctl_elem_value *ucontrol)
208{ 210{
209 struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); 211 struct snd_soc_platform *platform = snd_soc_kcontrol_platform(kcontrol);
210 struct hsw_priv_data *pdata = snd_soc_platform_get_drvdata(platform); 212 struct hsw_priv_data *pdata = snd_soc_platform_get_drvdata(platform);
211 struct sst_hsw *hsw = pdata->hsw; 213 struct sst_hsw *hsw = pdata->hsw;
212 u32 volume; 214 u32 volume;
@@ -231,7 +233,7 @@ static int hsw_volume_put(struct snd_kcontrol *kcontrol,
231static int hsw_volume_get(struct snd_kcontrol *kcontrol, 233static int hsw_volume_get(struct snd_kcontrol *kcontrol,
232 struct snd_ctl_elem_value *ucontrol) 234 struct snd_ctl_elem_value *ucontrol)
233{ 235{
234 struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); 236 struct snd_soc_platform *platform = snd_soc_kcontrol_platform(kcontrol);
235 struct hsw_priv_data *pdata = snd_soc_platform_get_drvdata(platform); 237 struct hsw_priv_data *pdata = snd_soc_platform_get_drvdata(platform);
236 struct sst_hsw *hsw = pdata->hsw; 238 struct sst_hsw *hsw = pdata->hsw;
237 unsigned int volume = 0; 239 unsigned int volume = 0;
@@ -273,28 +275,26 @@ static const struct snd_kcontrol_new hsw_volume_controls[] = {
273}; 275};
274 276
275/* Create DMA buffer page table for DSP */ 277/* Create DMA buffer page table for DSP */
276static int create_adsp_page_table(struct hsw_priv_data *pdata, 278static int create_adsp_page_table(struct snd_pcm_substream *substream,
277 struct snd_soc_pcm_runtime *rtd, 279 struct hsw_priv_data *pdata, struct snd_soc_pcm_runtime *rtd,
278 unsigned char *dma_area, size_t size, int pcm, int stream) 280 unsigned char *dma_area, size_t size, int pcm)
279{ 281{
280 int i, pages; 282 struct snd_dma_buffer *dmab = snd_pcm_get_dma_buf(substream);
283 int i, pages, stream = substream->stream;
281 284
282 if (size % PAGE_SIZE) 285 pages = snd_sgbuf_aligned_pages(size);
283 pages = (size / PAGE_SIZE) + 1;
284 else
285 pages = size / PAGE_SIZE;
286 286
287 dev_dbg(rtd->dev, "generating page table for %p size 0x%zu pages %d\n", 287 dev_dbg(rtd->dev, "generating page table for %p size 0x%zu pages %d\n",
288 dma_area, size, pages); 288 dma_area, size, pages);
289 289
290 for (i = 0; i < pages; i++) { 290 for (i = 0; i < pages; i++) {
291 u32 idx = (((i << 2) + i)) >> 1; 291 u32 idx = (((i << 2) + i)) >> 1;
292 u32 pfn = (virt_to_phys(dma_area + i * PAGE_SIZE)) >> PAGE_SHIFT; 292 u32 pfn = snd_sgbuf_get_addr(dmab, i * PAGE_SIZE) >> PAGE_SHIFT;
293 u32 *pg_table; 293 u32 *pg_table;
294 294
295 dev_dbg(rtd->dev, "pfn i %i idx %d pfn %x\n", i, idx, pfn); 295 dev_dbg(rtd->dev, "pfn i %i idx %d pfn %x\n", i, idx, pfn);
296 296
297 pg_table = (u32*)(pdata->pcm_pg[pcm][stream] + idx); 297 pg_table = (u32 *)(pdata->dmab[pcm][stream].area + idx);
298 298
299 if (i & 1) 299 if (i & 1)
300 *pg_table |= (pfn << 4); 300 *pg_table |= (pfn << 4);
@@ -317,12 +317,36 @@ static int hsw_pcm_hw_params(struct snd_pcm_substream *substream,
317 struct sst_hsw *hsw = pdata->hsw; 317 struct sst_hsw *hsw = pdata->hsw;
318 struct sst_module *module_data; 318 struct sst_module *module_data;
319 struct sst_dsp *dsp; 319 struct sst_dsp *dsp;
320 struct snd_dma_buffer *dmab;
320 enum sst_hsw_stream_type stream_type; 321 enum sst_hsw_stream_type stream_type;
321 enum sst_hsw_stream_path_id path_id; 322 enum sst_hsw_stream_path_id path_id;
322 u32 rate, bits, map, pages, module_id; 323 u32 rate, bits, map, pages, module_id;
323 u8 channels; 324 u8 channels;
324 int ret; 325 int ret;
325 326
327 /* check if we are being called a subsequent time */
328 if (pcm_data->allocated) {
329 ret = sst_hsw_stream_reset(hsw, pcm_data->stream);
330 if (ret < 0)
331 dev_dbg(rtd->dev, "error: reset stream failed %d\n",
332 ret);
333
334 ret = sst_hsw_stream_free(hsw, pcm_data->stream);
335 if (ret < 0) {
336 dev_dbg(rtd->dev, "error: free stream failed %d\n",
337 ret);
338 return ret;
339 }
340 pcm_data->allocated = false;
341
342 pcm_data->stream = sst_hsw_stream_new(hsw, rtd->cpu_dai->id,
343 hsw_notify_pointer, pcm_data);
344 if (pcm_data->stream == NULL) {
345 dev_err(rtd->dev, "error: failed to create stream\n");
346 return -EINVAL;
347 }
348 }
349
326 /* stream direction */ 350 /* stream direction */
327 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 351 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
328 path_id = SST_HSW_STREAM_PATH_SSP0_OUT; 352 path_id = SST_HSW_STREAM_PATH_SSP0_OUT;
@@ -416,8 +440,10 @@ static int hsw_pcm_hw_params(struct snd_pcm_substream *substream,
416 return ret; 440 return ret;
417 } 441 }
418 442
419 ret = create_adsp_page_table(pdata, rtd, runtime->dma_area, 443 dmab = snd_pcm_get_dma_buf(substream);
420 runtime->dma_bytes, rtd->cpu_dai->id, substream->stream); 444
445 ret = create_adsp_page_table(substream, pdata, rtd, runtime->dma_area,
446 runtime->dma_bytes, rtd->cpu_dai->id);
421 if (ret < 0) 447 if (ret < 0)
422 return ret; 448 return ret;
423 449
@@ -430,9 +456,9 @@ static int hsw_pcm_hw_params(struct snd_pcm_substream *substream,
430 pages = runtime->dma_bytes / PAGE_SIZE; 456 pages = runtime->dma_bytes / PAGE_SIZE;
431 457
432 ret = sst_hsw_stream_buffer(hsw, pcm_data->stream, 458 ret = sst_hsw_stream_buffer(hsw, pcm_data->stream,
433 virt_to_phys(pdata->pcm_pg[rtd->cpu_dai->id][substream->stream]), 459 pdata->dmab[rtd->cpu_dai->id][substream->stream].addr,
434 pages, runtime->dma_bytes, 0, 460 pages, runtime->dma_bytes, 0,
435 (u32)(virt_to_phys(runtime->dma_area) >> PAGE_SHIFT)); 461 snd_sgbuf_get_addr(dmab, 0) >> PAGE_SHIFT);
436 if (ret < 0) { 462 if (ret < 0) {
437 dev_err(rtd->dev, "error: failed to set DMA buffer %d\n", ret); 463 dev_err(rtd->dev, "error: failed to set DMA buffer %d\n", ret);
438 return ret; 464 return ret;
@@ -474,6 +500,7 @@ static int hsw_pcm_hw_params(struct snd_pcm_substream *substream,
474 dev_err(rtd->dev, "error: failed to commit stream %d\n", ret); 500 dev_err(rtd->dev, "error: failed to commit stream %d\n", ret);
475 return ret; 501 return ret;
476 } 502 }
503 pcm_data->allocated = true;
477 504
478 ret = sst_hsw_stream_pause(hsw, pcm_data->stream, 1); 505 ret = sst_hsw_stream_pause(hsw, pcm_data->stream, 1);
479 if (ret < 0) 506 if (ret < 0)
@@ -541,12 +568,14 @@ static snd_pcm_uframes_t hsw_pcm_pointer(struct snd_pcm_substream *substream)
541 struct hsw_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd); 568 struct hsw_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(rtd);
542 struct sst_hsw *hsw = pdata->hsw; 569 struct sst_hsw *hsw = pdata->hsw;
543 snd_pcm_uframes_t offset; 570 snd_pcm_uframes_t offset;
571 uint64_t ppos;
572 u32 position = sst_hsw_get_dsp_position(hsw, pcm_data->stream);
544 573
545 offset = bytes_to_frames(runtime, 574 offset = bytes_to_frames(runtime, position);
546 sst_hsw_get_dsp_position(hsw, pcm_data->stream)); 575 ppos = sst_hsw_get_dsp_presentation_position(hsw, pcm_data->stream);
547 576
548 dev_dbg(rtd->dev, "PCM: DMA pointer %zu bytes\n", 577 dev_dbg(rtd->dev, "PCM: DMA pointer %du bytes, pos %llu\n",
549 frames_to_bytes(runtime, (u32)offset)); 578 position, ppos);
550 return offset; 579 return offset;
551} 580}
552 581
@@ -606,6 +635,7 @@ static int hsw_pcm_close(struct snd_pcm_substream *substream)
606 dev_dbg(rtd->dev, "error: free stream failed %d\n", ret); 635 dev_dbg(rtd->dev, "error: free stream failed %d\n", ret);
607 goto out; 636 goto out;
608 } 637 }
638 pcm_data->allocated = 0;
609 pcm_data->stream = NULL; 639 pcm_data->stream = NULL;
610 640
611out: 641out:
@@ -621,7 +651,7 @@ static struct snd_pcm_ops hsw_pcm_ops = {
621 .hw_free = hsw_pcm_hw_free, 651 .hw_free = hsw_pcm_hw_free,
622 .trigger = hsw_pcm_trigger, 652 .trigger = hsw_pcm_trigger,
623 .pointer = hsw_pcm_pointer, 653 .pointer = hsw_pcm_pointer,
624 .mmap = snd_pcm_lib_default_mmap, 654 .page = snd_pcm_sgbuf_ops_page,
625}; 655};
626 656
627static void hsw_pcm_free(struct snd_pcm *pcm) 657static void hsw_pcm_free(struct snd_pcm *pcm)
@@ -632,17 +662,16 @@ static void hsw_pcm_free(struct snd_pcm *pcm)
632static int hsw_pcm_new(struct snd_soc_pcm_runtime *rtd) 662static int hsw_pcm_new(struct snd_soc_pcm_runtime *rtd)
633{ 663{
634 struct snd_pcm *pcm = rtd->pcm; 664 struct snd_pcm *pcm = rtd->pcm;
665 struct snd_soc_platform *platform = rtd->platform;
666 struct sst_pdata *pdata = dev_get_platdata(platform->dev);
667 struct device *dev = pdata->dma_dev;
635 int ret = 0; 668 int ret = 0;
636 669
637 ret = dma_coerce_mask_and_coherent(rtd->card->dev, DMA_BIT_MASK(32));
638 if (ret)
639 return ret;
640
641 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream || 670 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream ||
642 pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { 671 pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
643 ret = snd_pcm_lib_preallocate_pages_for_all(pcm, 672 ret = snd_pcm_lib_preallocate_pages_for_all(pcm,
644 SNDRV_DMA_TYPE_DEV, 673 SNDRV_DMA_TYPE_DEV_SG,
645 rtd->card->dev, 674 dev,
646 hsw_pcm_hardware.buffer_bytes_max, 675 hsw_pcm_hardware.buffer_bytes_max,
647 hsw_pcm_hardware.buffer_bytes_max); 676 hsw_pcm_hardware.buffer_bytes_max);
648 if (ret) { 677 if (ret) {
@@ -742,11 +771,14 @@ static int hsw_pcm_probe(struct snd_soc_platform *platform)
742{ 771{
743 struct sst_pdata *pdata = dev_get_platdata(platform->dev); 772 struct sst_pdata *pdata = dev_get_platdata(platform->dev);
744 struct hsw_priv_data *priv_data; 773 struct hsw_priv_data *priv_data;
745 int i; 774 struct device *dma_dev;
775 int i, ret = 0;
746 776
747 if (!pdata) 777 if (!pdata)
748 return -ENODEV; 778 return -ENODEV;
749 779
780 dma_dev = pdata->dma_dev;
781
750 priv_data = devm_kzalloc(platform->dev, sizeof(*priv_data), GFP_KERNEL); 782 priv_data = devm_kzalloc(platform->dev, sizeof(*priv_data), GFP_KERNEL);
751 priv_data->hsw = pdata->dsp; 783 priv_data->hsw = pdata->dsp;
752 snd_soc_platform_set_drvdata(platform, priv_data); 784 snd_soc_platform_set_drvdata(platform, priv_data);
@@ -758,15 +790,17 @@ static int hsw_pcm_probe(struct snd_soc_platform *platform)
758 790
759 /* playback */ 791 /* playback */
760 if (hsw_dais[i].playback.channels_min) { 792 if (hsw_dais[i].playback.channels_min) {
761 priv_data->pcm_pg[i][0] = kzalloc(PAGE_SIZE, GFP_DMA); 793 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dma_dev,
762 if (priv_data->pcm_pg[i][0] == NULL) 794 PAGE_SIZE, &priv_data->dmab[i][0]);
795 if (ret < 0)
763 goto err; 796 goto err;
764 } 797 }
765 798
766 /* capture */ 799 /* capture */
767 if (hsw_dais[i].capture.channels_min) { 800 if (hsw_dais[i].capture.channels_min) {
768 priv_data->pcm_pg[i][1] = kzalloc(PAGE_SIZE, GFP_DMA); 801 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dma_dev,
769 if (priv_data->pcm_pg[i][1] == NULL) 802 PAGE_SIZE, &priv_data->dmab[i][1]);
803 if (ret < 0)
770 goto err; 804 goto err;
771 } 805 }
772 } 806 }
@@ -776,11 +810,11 @@ static int hsw_pcm_probe(struct snd_soc_platform *platform)
776err: 810err:
777 for (;i >= 0; i--) { 811 for (;i >= 0; i--) {
778 if (hsw_dais[i].playback.channels_min) 812 if (hsw_dais[i].playback.channels_min)
779 kfree(priv_data->pcm_pg[i][0]); 813 snd_dma_free_pages(&priv_data->dmab[i][0]);
780 if (hsw_dais[i].capture.channels_min) 814 if (hsw_dais[i].capture.channels_min)
781 kfree(priv_data->pcm_pg[i][1]); 815 snd_dma_free_pages(&priv_data->dmab[i][1]);
782 } 816 }
783 return -ENOMEM; 817 return ret;
784} 818}
785 819
786static int hsw_pcm_remove(struct snd_soc_platform *platform) 820static int hsw_pcm_remove(struct snd_soc_platform *platform)
@@ -791,9 +825,9 @@ static int hsw_pcm_remove(struct snd_soc_platform *platform)
791 825
792 for (i = 0; i < ARRAY_SIZE(hsw_dais); i++) { 826 for (i = 0; i < ARRAY_SIZE(hsw_dais); i++) {
793 if (hsw_dais[i].playback.channels_min) 827 if (hsw_dais[i].playback.channels_min)
794 kfree(priv_data->pcm_pg[i][0]); 828 snd_dma_free_pages(&priv_data->dmab[i][0]);
795 if (hsw_dais[i].capture.channels_min) 829 if (hsw_dais[i].capture.channels_min)
796 kfree(priv_data->pcm_pg[i][1]); 830 snd_dma_free_pages(&priv_data->dmab[i][1]);
797 } 831 }
798 832
799 return 0; 833 return 0;
diff --git a/sound/soc/intel/sst-mfld-dsp.h b/sound/soc/intel/sst-mfld-dsp.h
index 3b63edc04b7f..8d482d76475a 100644
--- a/sound/soc/intel/sst-mfld-dsp.h
+++ b/sound/soc/intel/sst-mfld-dsp.h
@@ -16,10 +16,6 @@
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details. 17 * General Public License for more details.
18 * 18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */ 20 */
25 21
@@ -40,7 +36,6 @@ enum stream_type {
40}; 36};
41 37
42struct snd_pcm_params { 38struct snd_pcm_params {
43 u16 codec; /* codec type */
44 u8 num_chan; /* 1=Mono, 2=Stereo */ 39 u8 num_chan; /* 1=Mono, 2=Stereo */
45 u8 pcm_wd_sz; /* 16/24 - bit*/ 40 u8 pcm_wd_sz; /* 16/24 - bit*/
46 u32 reserved; /* Bitrate in bits per second */ 41 u32 reserved; /* Bitrate in bits per second */
@@ -53,7 +48,6 @@ struct snd_pcm_params {
53 48
54/* MP3 Music Parameters Message */ 49/* MP3 Music Parameters Message */
55struct snd_mp3_params { 50struct snd_mp3_params {
56 u16 codec;
57 u8 num_chan; /* 1=Mono, 2=Stereo */ 51 u8 num_chan; /* 1=Mono, 2=Stereo */
58 u8 pcm_wd_sz; /* 16/24 - bit*/ 52 u8 pcm_wd_sz; /* 16/24 - bit*/
59 u8 crc_check; /* crc_check - disable (0) or enable (1) */ 53 u8 crc_check; /* crc_check - disable (0) or enable (1) */
@@ -67,7 +61,6 @@ struct snd_mp3_params {
67 61
68/* AAC Music Parameters Message */ 62/* AAC Music Parameters Message */
69struct snd_aac_params { 63struct snd_aac_params {
70 u16 codec;
71 u8 num_chan; /* 1=Mono, 2=Stereo*/ 64 u8 num_chan; /* 1=Mono, 2=Stereo*/
72 u8 pcm_wd_sz; /* 16/24 - bit*/ 65 u8 pcm_wd_sz; /* 16/24 - bit*/
73 u8 bdownsample; /*SBR downsampling 0 - disable 1 -enabled AAC+ only */ 66 u8 bdownsample; /*SBR downsampling 0 - disable 1 -enabled AAC+ only */
@@ -81,7 +74,6 @@ struct snd_aac_params {
81 74
82/* WMA Music Parameters Message */ 75/* WMA Music Parameters Message */
83struct snd_wma_params { 76struct snd_wma_params {
84 u16 codec;
85 u8 num_chan; /* 1=Mono, 2=Stereo */ 77 u8 num_chan; /* 1=Mono, 2=Stereo */
86 u8 pcm_wd_sz; /* 16/24 - bit*/ 78 u8 pcm_wd_sz; /* 16/24 - bit*/
87 u32 brate; /* Use the hard coded value. */ 79 u32 brate; /* Use the hard coded value. */
diff --git a/sound/soc/intel/sst-mfld-platform-compress.c b/sound/soc/intel/sst-mfld-platform-compress.c
new file mode 100644
index 000000000000..02abd19fce1d
--- /dev/null
+++ b/sound/soc/intel/sst-mfld-platform-compress.c
@@ -0,0 +1,237 @@
1/*
2 * sst_mfld_platform.c - Intel MID Platform driver
3 *
4 * Copyright (C) 2010-2014 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21#include <linux/slab.h>
22#include <linux/io.h>
23#include <linux/module.h>
24#include <sound/core.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/compress_driver.h>
29#include "sst-mfld-platform.h"
30
31/* compress stream operations */
32static void sst_compr_fragment_elapsed(void *arg)
33{
34 struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg;
35
36 pr_debug("fragment elapsed by driver\n");
37 if (cstream)
38 snd_compr_fragment_elapsed(cstream);
39}
40
41static void sst_drain_notify(void *arg)
42{
43 struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg;
44
45 pr_debug("drain notify by driver\n");
46 if (cstream)
47 snd_compr_drain_notify(cstream);
48}
49
50static int sst_platform_compr_open(struct snd_compr_stream *cstream)
51{
52
53 int ret_val = 0;
54 struct snd_compr_runtime *runtime = cstream->runtime;
55 struct sst_runtime_stream *stream;
56
57 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
58 if (!stream)
59 return -ENOMEM;
60
61 spin_lock_init(&stream->status_lock);
62
63 /* get the sst ops */
64 if (!sst || !try_module_get(sst->dev->driver->owner)) {
65 pr_err("no device available to run\n");
66 ret_val = -ENODEV;
67 goto out_ops;
68 }
69 stream->compr_ops = sst->compr_ops;
70
71 stream->id = 0;
72 sst_set_stream_status(stream, SST_PLATFORM_INIT);
73 runtime->private_data = stream;
74 return 0;
75out_ops:
76 kfree(stream);
77 return ret_val;
78}
79
80static int sst_platform_compr_free(struct snd_compr_stream *cstream)
81{
82 struct sst_runtime_stream *stream;
83 int ret_val = 0, str_id;
84
85 stream = cstream->runtime->private_data;
86 /*need to check*/
87 str_id = stream->id;
88 if (str_id)
89 ret_val = stream->compr_ops->close(str_id);
90 module_put(sst->dev->driver->owner);
91 kfree(stream);
92 pr_debug("%s: %d\n", __func__, ret_val);
93 return 0;
94}
95
96static int sst_platform_compr_set_params(struct snd_compr_stream *cstream,
97 struct snd_compr_params *params)
98{
99 struct sst_runtime_stream *stream;
100 int retval;
101 struct snd_sst_params str_params;
102 struct sst_compress_cb cb;
103
104 stream = cstream->runtime->private_data;
105 /* construct fw structure for this*/
106 memset(&str_params, 0, sizeof(str_params));
107
108 str_params.ops = STREAM_OPS_PLAYBACK;
109 str_params.stream_type = SST_STREAM_TYPE_MUSIC;
110 str_params.device_type = SND_SST_DEVICE_COMPRESS;
111
112 switch (params->codec.id) {
113 case SND_AUDIOCODEC_MP3: {
114 str_params.codec = SST_CODEC_TYPE_MP3;
115 str_params.sparams.uc.mp3_params.num_chan = params->codec.ch_in;
116 str_params.sparams.uc.mp3_params.pcm_wd_sz = 16;
117 break;
118 }
119
120 case SND_AUDIOCODEC_AAC: {
121 str_params.codec = SST_CODEC_TYPE_AAC;
122 str_params.sparams.uc.aac_params.num_chan = params->codec.ch_in;
123 str_params.sparams.uc.aac_params.pcm_wd_sz = 16;
124 if (params->codec.format == SND_AUDIOSTREAMFORMAT_MP4ADTS)
125 str_params.sparams.uc.aac_params.bs_format =
126 AAC_BIT_STREAM_ADTS;
127 else if (params->codec.format == SND_AUDIOSTREAMFORMAT_RAW)
128 str_params.sparams.uc.aac_params.bs_format =
129 AAC_BIT_STREAM_RAW;
130 else {
131 pr_err("Undefined format%d\n", params->codec.format);
132 return -EINVAL;
133 }
134 str_params.sparams.uc.aac_params.externalsr =
135 params->codec.sample_rate;
136 break;
137 }
138
139 default:
140 pr_err("codec not supported, id =%d\n", params->codec.id);
141 return -EINVAL;
142 }
143
144 str_params.aparams.ring_buf_info[0].addr =
145 virt_to_phys(cstream->runtime->buffer);
146 str_params.aparams.ring_buf_info[0].size =
147 cstream->runtime->buffer_size;
148 str_params.aparams.sg_count = 1;
149 str_params.aparams.frag_size = cstream->runtime->fragment_size;
150
151 cb.param = cstream;
152 cb.compr_cb = sst_compr_fragment_elapsed;
153 cb.drain_cb_param = cstream;
154 cb.drain_notify = sst_drain_notify;
155
156 retval = stream->compr_ops->open(&str_params, &cb);
157 if (retval < 0) {
158 pr_err("stream allocation failed %d\n", retval);
159 return retval;
160 }
161
162 stream->id = retval;
163 return 0;
164}
165
166static int sst_platform_compr_trigger(struct snd_compr_stream *cstream, int cmd)
167{
168 struct sst_runtime_stream *stream =
169 cstream->runtime->private_data;
170
171 return stream->compr_ops->control(cmd, stream->id);
172}
173
174static int sst_platform_compr_pointer(struct snd_compr_stream *cstream,
175 struct snd_compr_tstamp *tstamp)
176{
177 struct sst_runtime_stream *stream;
178
179 stream = cstream->runtime->private_data;
180 stream->compr_ops->tstamp(stream->id, tstamp);
181 tstamp->byte_offset = tstamp->copied_total %
182 (u32)cstream->runtime->buffer_size;
183 pr_debug("calc bytes offset/copied bytes as %d\n", tstamp->byte_offset);
184 return 0;
185}
186
187static int sst_platform_compr_ack(struct snd_compr_stream *cstream,
188 size_t bytes)
189{
190 struct sst_runtime_stream *stream;
191
192 stream = cstream->runtime->private_data;
193 stream->compr_ops->ack(stream->id, (unsigned long)bytes);
194 stream->bytes_written += bytes;
195
196 return 0;
197}
198
199static int sst_platform_compr_get_caps(struct snd_compr_stream *cstream,
200 struct snd_compr_caps *caps)
201{
202 struct sst_runtime_stream *stream =
203 cstream->runtime->private_data;
204
205 return stream->compr_ops->get_caps(caps);
206}
207
208static int sst_platform_compr_get_codec_caps(struct snd_compr_stream *cstream,
209 struct snd_compr_codec_caps *codec)
210{
211 struct sst_runtime_stream *stream =
212 cstream->runtime->private_data;
213
214 return stream->compr_ops->get_codec_caps(codec);
215}
216
217static int sst_platform_compr_set_metadata(struct snd_compr_stream *cstream,
218 struct snd_compr_metadata *metadata)
219{
220 struct sst_runtime_stream *stream =
221 cstream->runtime->private_data;
222
223 return stream->compr_ops->set_metadata(stream->id, metadata);
224}
225
226struct snd_compr_ops sst_platform_compr_ops = {
227
228 .open = sst_platform_compr_open,
229 .free = sst_platform_compr_free,
230 .set_params = sst_platform_compr_set_params,
231 .set_metadata = sst_platform_compr_set_metadata,
232 .trigger = sst_platform_compr_trigger,
233 .pointer = sst_platform_compr_pointer,
234 .ack = sst_platform_compr_ack,
235 .get_caps = sst_platform_compr_get_caps,
236 .get_codec_caps = sst_platform_compr_get_codec_caps,
237};
diff --git a/sound/soc/intel/sst-mfld-platform.c b/sound/soc/intel/sst-mfld-platform-pcm.c
index 840306c2ef14..7c790f51d259 100644
--- a/sound/soc/intel/sst-mfld-platform.c
+++ b/sound/soc/intel/sst-mfld-platform-pcm.c
@@ -15,13 +15,7 @@
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details. 16 * General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */ 19 */
26#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 21
@@ -35,8 +29,9 @@
35#include <sound/compress_driver.h> 29#include <sound/compress_driver.h>
36#include "sst-mfld-platform.h" 30#include "sst-mfld-platform.h"
37 31
38static struct sst_device *sst; 32struct sst_device *sst;
39static DEFINE_MUTEX(sst_lock); 33static DEFINE_MUTEX(sst_lock);
34extern struct snd_compr_ops sst_platform_compr_ops;
40 35
41int sst_register_dsp(struct sst_device *dev) 36int sst_register_dsp(struct sst_device *dev)
42{ 37{
@@ -116,36 +111,6 @@ static struct snd_soc_dai_driver sst_platform_dai[] = {
116 }, 111 },
117}, 112},
118{ 113{
119 .name = "Speaker-cpu-dai",
120 .id = 1,
121 .playback = {
122 .channels_min = SST_MONO,
123 .channels_max = SST_STEREO,
124 .rates = SNDRV_PCM_RATE_48000,
125 .formats = SNDRV_PCM_FMTBIT_S24_LE,
126 },
127},
128{
129 .name = "Vibra1-cpu-dai",
130 .id = 2,
131 .playback = {
132 .channels_min = SST_MONO,
133 .channels_max = SST_MONO,
134 .rates = SNDRV_PCM_RATE_48000,
135 .formats = SNDRV_PCM_FMTBIT_S24_LE,
136 },
137},
138{
139 .name = "Vibra2-cpu-dai",
140 .id = 3,
141 .playback = {
142 .channels_min = SST_MONO,
143 .channels_max = SST_STEREO,
144 .rates = SNDRV_PCM_RATE_48000,
145 .formats = SNDRV_PCM_FMTBIT_S24_LE,
146 },
147},
148{
149 .name = "Compress-cpu-dai", 114 .name = "Compress-cpu-dai",
150 .compress_dai = 1, 115 .compress_dai = 1,
151 .playback = { 116 .playback = {
@@ -157,12 +122,8 @@ static struct snd_soc_dai_driver sst_platform_dai[] = {
157}, 122},
158}; 123};
159 124
160static const struct snd_soc_component_driver sst_component = {
161 .name = "sst",
162};
163
164/* helper functions */ 125/* helper functions */
165static inline void sst_set_stream_status(struct sst_runtime_stream *stream, 126void sst_set_stream_status(struct sst_runtime_stream *stream,
166 int state) 127 int state)
167{ 128{
168 unsigned long flags; 129 unsigned long flags;
@@ -186,7 +147,6 @@ static void sst_fill_pcm_params(struct snd_pcm_substream *substream,
186 struct sst_pcm_params *param) 147 struct sst_pcm_params *param)
187{ 148{
188 149
189 param->codec = SST_CODEC_TYPE_PCM;
190 param->num_chan = (u8) substream->runtime->channels; 150 param->num_chan = (u8) substream->runtime->channels;
191 param->pcm_wd_sz = substream->runtime->sample_bits; 151 param->pcm_wd_sz = substream->runtime->sample_bits;
192 param->reserved = 0; 152 param->reserved = 0;
@@ -471,205 +431,6 @@ static int sst_pcm_new(struct snd_soc_pcm_runtime *rtd)
471 return retval; 431 return retval;
472} 432}
473 433
474/* compress stream operations */
475static void sst_compr_fragment_elapsed(void *arg)
476{
477 struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg;
478
479 pr_debug("fragment elapsed by driver\n");
480 if (cstream)
481 snd_compr_fragment_elapsed(cstream);
482}
483
484static int sst_platform_compr_open(struct snd_compr_stream *cstream)
485{
486
487 int ret_val = 0;
488 struct snd_compr_runtime *runtime = cstream->runtime;
489 struct sst_runtime_stream *stream;
490
491 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
492 if (!stream)
493 return -ENOMEM;
494
495 spin_lock_init(&stream->status_lock);
496
497 /* get the sst ops */
498 if (!sst || !try_module_get(sst->dev->driver->owner)) {
499 pr_err("no device available to run\n");
500 ret_val = -ENODEV;
501 goto out_ops;
502 }
503 stream->compr_ops = sst->compr_ops;
504
505 stream->id = 0;
506 sst_set_stream_status(stream, SST_PLATFORM_INIT);
507 runtime->private_data = stream;
508 return 0;
509out_ops:
510 kfree(stream);
511 return ret_val;
512}
513
514static int sst_platform_compr_free(struct snd_compr_stream *cstream)
515{
516 struct sst_runtime_stream *stream;
517 int ret_val = 0, str_id;
518
519 stream = cstream->runtime->private_data;
520 /*need to check*/
521 str_id = stream->id;
522 if (str_id)
523 ret_val = stream->compr_ops->close(str_id);
524 module_put(sst->dev->driver->owner);
525 kfree(stream);
526 pr_debug("%s: %d\n", __func__, ret_val);
527 return 0;
528}
529
530static int sst_platform_compr_set_params(struct snd_compr_stream *cstream,
531 struct snd_compr_params *params)
532{
533 struct sst_runtime_stream *stream;
534 int retval;
535 struct snd_sst_params str_params;
536 struct sst_compress_cb cb;
537
538 stream = cstream->runtime->private_data;
539 /* construct fw structure for this*/
540 memset(&str_params, 0, sizeof(str_params));
541
542 str_params.ops = STREAM_OPS_PLAYBACK;
543 str_params.stream_type = SST_STREAM_TYPE_MUSIC;
544 str_params.device_type = SND_SST_DEVICE_COMPRESS;
545
546 switch (params->codec.id) {
547 case SND_AUDIOCODEC_MP3: {
548 str_params.codec = SST_CODEC_TYPE_MP3;
549 str_params.sparams.uc.mp3_params.codec = SST_CODEC_TYPE_MP3;
550 str_params.sparams.uc.mp3_params.num_chan = params->codec.ch_in;
551 str_params.sparams.uc.mp3_params.pcm_wd_sz = 16;
552 break;
553 }
554
555 case SND_AUDIOCODEC_AAC: {
556 str_params.codec = SST_CODEC_TYPE_AAC;
557 str_params.sparams.uc.aac_params.codec = SST_CODEC_TYPE_AAC;
558 str_params.sparams.uc.aac_params.num_chan = params->codec.ch_in;
559 str_params.sparams.uc.aac_params.pcm_wd_sz = 16;
560 if (params->codec.format == SND_AUDIOSTREAMFORMAT_MP4ADTS)
561 str_params.sparams.uc.aac_params.bs_format =
562 AAC_BIT_STREAM_ADTS;
563 else if (params->codec.format == SND_AUDIOSTREAMFORMAT_RAW)
564 str_params.sparams.uc.aac_params.bs_format =
565 AAC_BIT_STREAM_RAW;
566 else {
567 pr_err("Undefined format%d\n", params->codec.format);
568 return -EINVAL;
569 }
570 str_params.sparams.uc.aac_params.externalsr =
571 params->codec.sample_rate;
572 break;
573 }
574
575 default:
576 pr_err("codec not supported, id =%d\n", params->codec.id);
577 return -EINVAL;
578 }
579
580 str_params.aparams.ring_buf_info[0].addr =
581 virt_to_phys(cstream->runtime->buffer);
582 str_params.aparams.ring_buf_info[0].size =
583 cstream->runtime->buffer_size;
584 str_params.aparams.sg_count = 1;
585 str_params.aparams.frag_size = cstream->runtime->fragment_size;
586
587 cb.param = cstream;
588 cb.compr_cb = sst_compr_fragment_elapsed;
589
590 retval = stream->compr_ops->open(&str_params, &cb);
591 if (retval < 0) {
592 pr_err("stream allocation failed %d\n", retval);
593 return retval;
594 }
595
596 stream->id = retval;
597 return 0;
598}
599
600static int sst_platform_compr_trigger(struct snd_compr_stream *cstream, int cmd)
601{
602 struct sst_runtime_stream *stream =
603 cstream->runtime->private_data;
604
605 return stream->compr_ops->control(cmd, stream->id);
606}
607
608static int sst_platform_compr_pointer(struct snd_compr_stream *cstream,
609 struct snd_compr_tstamp *tstamp)
610{
611 struct sst_runtime_stream *stream;
612
613 stream = cstream->runtime->private_data;
614 stream->compr_ops->tstamp(stream->id, tstamp);
615 tstamp->byte_offset = tstamp->copied_total %
616 (u32)cstream->runtime->buffer_size;
617 pr_debug("calc bytes offset/copied bytes as %d\n", tstamp->byte_offset);
618 return 0;
619}
620
621static int sst_platform_compr_ack(struct snd_compr_stream *cstream,
622 size_t bytes)
623{
624 struct sst_runtime_stream *stream;
625
626 stream = cstream->runtime->private_data;
627 stream->compr_ops->ack(stream->id, (unsigned long)bytes);
628 stream->bytes_written += bytes;
629
630 return 0;
631}
632
633static int sst_platform_compr_get_caps(struct snd_compr_stream *cstream,
634 struct snd_compr_caps *caps)
635{
636 struct sst_runtime_stream *stream =
637 cstream->runtime->private_data;
638
639 return stream->compr_ops->get_caps(caps);
640}
641
642static int sst_platform_compr_get_codec_caps(struct snd_compr_stream *cstream,
643 struct snd_compr_codec_caps *codec)
644{
645 struct sst_runtime_stream *stream =
646 cstream->runtime->private_data;
647
648 return stream->compr_ops->get_codec_caps(codec);
649}
650
651static int sst_platform_compr_set_metadata(struct snd_compr_stream *cstream,
652 struct snd_compr_metadata *metadata)
653{
654 struct sst_runtime_stream *stream =
655 cstream->runtime->private_data;
656
657 return stream->compr_ops->set_metadata(stream->id, metadata);
658}
659
660static struct snd_compr_ops sst_platform_compr_ops = {
661
662 .open = sst_platform_compr_open,
663 .free = sst_platform_compr_free,
664 .set_params = sst_platform_compr_set_params,
665 .set_metadata = sst_platform_compr_set_metadata,
666 .trigger = sst_platform_compr_trigger,
667 .pointer = sst_platform_compr_pointer,
668 .ack = sst_platform_compr_ack,
669 .get_caps = sst_platform_compr_get_caps,
670 .get_codec_caps = sst_platform_compr_get_codec_caps,
671};
672
673static struct snd_soc_platform_driver sst_soc_platform_drv = { 434static struct snd_soc_platform_driver sst_soc_platform_drv = {
674 .ops = &sst_platform_ops, 435 .ops = &sst_platform_ops,
675 .compr_ops = &sst_platform_compr_ops, 436 .compr_ops = &sst_platform_compr_ops,
@@ -677,6 +438,11 @@ static struct snd_soc_platform_driver sst_soc_platform_drv = {
677 .pcm_free = sst_pcm_free, 438 .pcm_free = sst_pcm_free,
678}; 439};
679 440
441static const struct snd_soc_component_driver sst_component = {
442 .name = "sst",
443};
444
445
680static int sst_platform_probe(struct platform_device *pdev) 446static int sst_platform_probe(struct platform_device *pdev)
681{ 447{
682 int ret; 448 int ret;
diff --git a/sound/soc/intel/sst-mfld-platform.h b/sound/soc/intel/sst-mfld-platform.h
index 0c4e2ddcecb1..6c5e7dc49e3c 100644
--- a/sound/soc/intel/sst-mfld-platform.h
+++ b/sound/soc/intel/sst-mfld-platform.h
@@ -15,13 +15,7 @@
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details. 16 * General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */ 19 */
26 20
27#ifndef __SST_PLATFORMDRV_H__ 21#ifndef __SST_PLATFORMDRV_H__
@@ -29,6 +23,8 @@
29 23
30#include "sst-mfld-dsp.h" 24#include "sst-mfld-dsp.h"
31 25
26extern struct sst_device *sst;
27
32#define SST_MONO 1 28#define SST_MONO 1
33#define SST_STEREO 2 29#define SST_STEREO 2
34#define SST_MAX_CAP 5 30#define SST_MAX_CAP 5
@@ -108,6 +104,8 @@ struct sst_stream_params {
108struct sst_compress_cb { 104struct sst_compress_cb {
109 void *param; 105 void *param;
110 void (*compr_cb)(void *param); 106 void (*compr_cb)(void *param);
107 void *drain_cb_param;
108 void (*drain_notify)(void *param);
111}; 109};
112 110
113struct compress_sst_ops { 111struct compress_sst_ops {
@@ -148,6 +146,7 @@ struct sst_device {
148 struct compress_sst_ops *compr_ops; 146 struct compress_sst_ops *compr_ops;
149}; 147};
150 148
149void sst_set_stream_status(struct sst_runtime_stream *stream, int state);
151int sst_register_dsp(struct sst_device *sst); 150int sst_register_dsp(struct sst_device *sst);
152int sst_unregister_dsp(struct sst_device *sst); 151int sst_unregister_dsp(struct sst_device *sst);
153#endif 152#endif
diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
index 29f76af5d963..1a354a6b6e87 100644
--- a/sound/soc/jz4740/Kconfig
+++ b/sound/soc/jz4740/Kconfig
@@ -1,24 +1,29 @@
1config SND_JZ4740_SOC 1config SND_JZ4740_SOC
2 tristate "SoC Audio for Ingenic JZ4740 SoC" 2 tristate "SoC Audio for Ingenic JZ4740 SoC"
3 depends on MACH_JZ4740 && SND_SOC 3 depends on MACH_JZ4740 || COMPILE_TEST
4 select SND_SOC_GENERIC_DMAENGINE_PCM 4 select SND_SOC_GENERIC_DMAENGINE_PCM
5 help 5 help
6 Say Y or M if you want to add support for codecs attached to 6 Say Y or M if you want to add support for codecs attached to
7 the JZ4740 I2S interface. You will also need to select the audio 7 the JZ4740 I2S interface. You will also need to select the audio
8 interfaces to support below. 8 interfaces to support below.
9 9
10if SND_JZ4740_SOC
11
10config SND_JZ4740_SOC_I2S 12config SND_JZ4740_SOC_I2S
11 depends on SND_JZ4740_SOC
12 tristate "SoC Audio (I2S protocol) for Ingenic JZ4740 SoC" 13 tristate "SoC Audio (I2S protocol) for Ingenic JZ4740 SoC"
14 depends on HAS_IOMEM
13 help 15 help
14 Say Y if you want to use I2S protocol and I2S codec on Ingenic JZ4740 16 Say Y if you want to use I2S protocol and I2S codec on Ingenic JZ4740
15 based boards. 17 based boards.
16 18
17config SND_JZ4740_SOC_QI_LB60 19config SND_JZ4740_SOC_QI_LB60
18 tristate "SoC Audio support for Qi LB60" 20 tristate "SoC Audio support for Qi LB60"
19 depends on SND_JZ4740_SOC && JZ4740_QI_LB60 21 depends on HAS_IOMEM
22 depends on JZ4740_QI_LB60 || COMPILE_TEST
20 select SND_JZ4740_SOC_I2S 23 select SND_JZ4740_SOC_I2S
21 select SND_SOC_JZ4740_CODEC 24 select SND_SOC_JZ4740_CODEC
22 help 25 help
23 Say Y if you want to add support for ASoC audio on the Qi LB60 board 26 Say Y if you want to add support for ASoC audio on the Qi LB60 board
24 a.k.a Qi Ben NanoNote. 27 a.k.a Qi Ben NanoNote.
28
29endif
diff --git a/sound/soc/jz4740/Makefile b/sound/soc/jz4740/Makefile
index be873c1b0c20..d32c540555c4 100644
--- a/sound/soc/jz4740/Makefile
+++ b/sound/soc/jz4740/Makefile
@@ -1,10 +1,8 @@
1# 1#
2# Jz4740 Platform Support 2# Jz4740 Platform Support
3# 3#
4snd-soc-jz4740-objs := jz4740-pcm.o
5snd-soc-jz4740-i2s-objs := jz4740-i2s.o 4snd-soc-jz4740-i2s-objs := jz4740-i2s.o
6 5
7obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o
8obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o 6obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o
9 7
10# Jz4740 Machine Support 8# Jz4740 Machine Support
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index 8f220009e0f6..3f9c3a9ae36f 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -31,10 +31,11 @@
31#include <sound/initval.h> 31#include <sound/initval.h>
32#include <sound/dmaengine_pcm.h> 32#include <sound/dmaengine_pcm.h>
33 33
34#include <asm/mach-jz4740/dma.h>
35
36#include "jz4740-i2s.h" 34#include "jz4740-i2s.h"
37 35
36#define JZ4740_DMA_TYPE_AIC_TRANSMIT 24
37#define JZ4740_DMA_TYPE_AIC_RECEIVE 25
38
38#define JZ_REG_AIC_CONF 0x00 39#define JZ_REG_AIC_CONF 0x00
39#define JZ_REG_AIC_CTRL 0x04 40#define JZ_REG_AIC_CTRL 0x04
40#define JZ_REG_AIC_I2S_FMT 0x10 41#define JZ_REG_AIC_I2S_FMT 0x10
diff --git a/sound/soc/jz4740/qi_lb60.c b/sound/soc/jz4740/qi_lb60.c
index 82b5f37cd2c7..5cb91f9e8626 100644
--- a/sound/soc/jz4740/qi_lb60.c
+++ b/sound/soc/jz4740/qi_lb60.c
@@ -19,18 +19,21 @@
19#include <sound/core.h> 19#include <sound/core.h>
20#include <sound/pcm.h> 20#include <sound/pcm.h>
21#include <sound/soc.h> 21#include <sound/soc.h>
22#include <linux/gpio.h> 22#include <linux/gpio/consumer.h>
23 23
24#define QI_LB60_SND_GPIO JZ_GPIO_PORTB(29) 24struct qi_lb60 {
25#define QI_LB60_AMP_GPIO JZ_GPIO_PORTD(4) 25 struct gpio_desc *snd_gpio;
26 struct gpio_desc *amp_gpio;
27};
26 28
27static int qi_lb60_spk_event(struct snd_soc_dapm_widget *widget, 29static int qi_lb60_spk_event(struct snd_soc_dapm_widget *widget,
28 struct snd_kcontrol *ctrl, int event) 30 struct snd_kcontrol *ctrl, int event)
29{ 31{
32 struct qi_lb60 *qi_lb60 = snd_soc_card_get_drvdata(widget->dapm->card);
30 int on = !SND_SOC_DAPM_EVENT_OFF(event); 33 int on = !SND_SOC_DAPM_EVENT_OFF(event);
31 34
32 gpio_set_value(QI_LB60_SND_GPIO, on); 35 gpiod_set_value_cansleep(qi_lb60->snd_gpio, on);
33 gpio_set_value(QI_LB60_AMP_GPIO, on); 36 gpiod_set_value_cansleep(qi_lb60->amp_gpio, on);
34 37
35 return 0; 38 return 0;
36} 39}
@@ -46,29 +49,6 @@ static const struct snd_soc_dapm_route qi_lb60_routes[] = {
46 {"Speaker", NULL, "ROUT"}, 49 {"Speaker", NULL, "ROUT"},
47}; 50};
48 51
49#define QI_LB60_DAIFMT (SND_SOC_DAIFMT_I2S | \
50 SND_SOC_DAIFMT_NB_NF | \
51 SND_SOC_DAIFMT_CBM_CFM)
52
53static int qi_lb60_codec_init(struct snd_soc_pcm_runtime *rtd)
54{
55 struct snd_soc_codec *codec = rtd->codec;
56 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
57 struct snd_soc_dapm_context *dapm = &codec->dapm;
58 int ret;
59
60 snd_soc_dapm_nc_pin(dapm, "LIN");
61 snd_soc_dapm_nc_pin(dapm, "RIN");
62
63 ret = snd_soc_dai_set_fmt(cpu_dai, QI_LB60_DAIFMT);
64 if (ret < 0) {
65 dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret);
66 return ret;
67 }
68
69 return 0;
70}
71
72static struct snd_soc_dai_link qi_lb60_dai = { 52static struct snd_soc_dai_link qi_lb60_dai = {
73 .name = "jz4740", 53 .name = "jz4740",
74 .stream_name = "jz4740", 54 .stream_name = "jz4740",
@@ -76,10 +56,11 @@ static struct snd_soc_dai_link qi_lb60_dai = {
76 .platform_name = "jz4740-i2s", 56 .platform_name = "jz4740-i2s",
77 .codec_dai_name = "jz4740-hifi", 57 .codec_dai_name = "jz4740-hifi",
78 .codec_name = "jz4740-codec", 58 .codec_name = "jz4740-codec",
79 .init = qi_lb60_codec_init, 59 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
60 SND_SOC_DAIFMT_CBM_CFM,
80}; 61};
81 62
82static struct snd_soc_card qi_lb60 = { 63static struct snd_soc_card qi_lb60_card = {
83 .name = "QI LB60", 64 .name = "QI LB60",
84 .owner = THIS_MODULE, 65 .owner = THIS_MODULE,
85 .dai_link = &qi_lb60_dai, 66 .dai_link = &qi_lb60_dai,
@@ -89,40 +70,38 @@ static struct snd_soc_card qi_lb60 = {
89 .num_dapm_widgets = ARRAY_SIZE(qi_lb60_widgets), 70 .num_dapm_widgets = ARRAY_SIZE(qi_lb60_widgets),
90 .dapm_routes = qi_lb60_routes, 71 .dapm_routes = qi_lb60_routes,
91 .num_dapm_routes = ARRAY_SIZE(qi_lb60_routes), 72 .num_dapm_routes = ARRAY_SIZE(qi_lb60_routes),
92}; 73 .fully_routed = true,
93
94static const struct gpio qi_lb60_gpios[] = {
95 { QI_LB60_SND_GPIO, GPIOF_OUT_INIT_LOW, "SND" },
96 { QI_LB60_AMP_GPIO, GPIOF_OUT_INIT_LOW, "AMP" },
97}; 74};
98 75
99static int qi_lb60_probe(struct platform_device *pdev) 76static int qi_lb60_probe(struct platform_device *pdev)
100{ 77{
101 struct snd_soc_card *card = &qi_lb60; 78 struct qi_lb60 *qi_lb60;
79 struct snd_soc_card *card = &qi_lb60_card;
102 int ret; 80 int ret;
103 81
104 ret = gpio_request_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios)); 82 qi_lb60 = devm_kzalloc(&pdev->dev, sizeof(*qi_lb60), GFP_KERNEL);
83 if (!qi_lb60)
84 return -ENOMEM;
85
86 qi_lb60->snd_gpio = devm_gpiod_get(&pdev->dev, "snd");
87 if (IS_ERR(qi_lb60->snd_gpio))
88 return PTR_ERR(qi_lb60->snd_gpio);
89 ret = gpiod_direction_output(qi_lb60->snd_gpio, 0);
105 if (ret) 90 if (ret)
106 return ret; 91 return ret;
107 92
108 card->dev = &pdev->dev; 93 qi_lb60->amp_gpio = devm_gpiod_get(&pdev->dev, "amp");
94 if (IS_ERR(qi_lb60->amp_gpio))
95 return PTR_ERR(qi_lb60->amp_gpio);
96 ret = gpiod_direction_output(qi_lb60->amp_gpio, 0);
97 if (ret)
98 return ret;
109 99
110 ret = snd_soc_register_card(card); 100 card->dev = &pdev->dev;
111 if (ret) {
112 dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
113 ret);
114 gpio_free_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
115 }
116 return ret;
117}
118 101
119static int qi_lb60_remove(struct platform_device *pdev) 102 snd_soc_card_set_drvdata(card, qi_lb60);
120{
121 struct snd_soc_card *card = platform_get_drvdata(pdev);
122 103
123 snd_soc_unregister_card(card); 104 return devm_snd_soc_register_card(&pdev->dev, card);
124 gpio_free_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
125 return 0;
126} 105}
127 106
128static struct platform_driver qi_lb60_driver = { 107static struct platform_driver qi_lb60_driver = {
@@ -131,7 +110,6 @@ static struct platform_driver qi_lb60_driver = {
131 .owner = THIS_MODULE, 110 .owner = THIS_MODULE,
132 }, 111 },
133 .probe = qi_lb60_probe, 112 .probe = qi_lb60_probe,
134 .remove = qi_lb60_remove,
135}; 113};
136 114
137module_platform_driver(qi_lb60_driver); 115module_platform_driver(qi_lb60_driver);
diff --git a/sound/soc/kirkwood/kirkwood-t5325.c b/sound/soc/kirkwood/kirkwood-t5325.c
index d213832b0c72..844b8415a011 100644
--- a/sound/soc/kirkwood/kirkwood-t5325.c
+++ b/sound/soc/kirkwood/kirkwood-t5325.c
@@ -52,18 +52,6 @@ static const struct snd_soc_dapm_route t5325_route[] = {
52 { "MIC2", NULL, "Mic Jack" }, 52 { "MIC2", NULL, "Mic Jack" },
53}; 53};
54 54
55static int t5325_dai_init(struct snd_soc_pcm_runtime *rtd)
56{
57 struct snd_soc_codec *codec = rtd->codec;
58 struct snd_soc_dapm_context *dapm = &codec->dapm;
59
60 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
61 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
62 snd_soc_dapm_enable_pin(dapm, "Speaker");
63
64 return 0;
65}
66
67static struct snd_soc_dai_link t5325_dai[] = { 55static struct snd_soc_dai_link t5325_dai[] = {
68{ 56{
69 .name = "ALC5621", 57 .name = "ALC5621",
@@ -74,7 +62,6 @@ static struct snd_soc_dai_link t5325_dai[] = {
74 .codec_name = "alc562x-codec.0-001a", 62 .codec_name = "alc562x-codec.0-001a",
75 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS, 63 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS,
76 .ops = &t5325_ops, 64 .ops = &t5325_ops,
77 .init = t5325_dai_init,
78}, 65},
79}; 66};
80 67
diff --git a/sound/soc/nuc900/Kconfig b/sound/soc/nuc900/Kconfig
index a0ed1c618f60..7f0c954dff6f 100644
--- a/sound/soc/nuc900/Kconfig
+++ b/sound/soc/nuc900/Kconfig
@@ -4,6 +4,7 @@
4config SND_SOC_NUC900 4config SND_SOC_NUC900
5 tristate "SoC Audio for NUC900 series" 5 tristate "SoC Audio for NUC900 series"
6 depends on ARCH_W90X900 6 depends on ARCH_W90X900
7 select SND_SOC_NUC900_AC97
7 help 8 help
8 This option enables support for AC97 mode on the NUC900 SoC. 9 This option enables support for AC97 mode on the NUC900 SoC.
9 10
diff --git a/sound/soc/nuc900/nuc900-ac97.c b/sound/soc/nuc900/nuc900-ac97.c
index 8987bf987e58..f2f67942b229 100644
--- a/sound/soc/nuc900/nuc900-ac97.c
+++ b/sound/soc/nuc900/nuc900-ac97.c
@@ -28,6 +28,7 @@
28 28
29static DEFINE_MUTEX(ac97_mutex); 29static DEFINE_MUTEX(ac97_mutex);
30struct nuc900_audio *nuc900_ac97_data; 30struct nuc900_audio *nuc900_ac97_data;
31EXPORT_SYMBOL_GPL(nuc900_ac97_data);
31 32
32static int nuc900_checkready(void) 33static int nuc900_checkready(void)
33{ 34{
diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
index e00659351a4e..d44463a7b0fa 100644
--- a/sound/soc/omap/Kconfig
+++ b/sound/soc/omap/Kconfig
@@ -26,7 +26,7 @@ config SND_OMAP_SOC_N810
26 26
27config SND_OMAP_SOC_RX51 27config SND_OMAP_SOC_RX51
28 tristate "SoC Audio support for Nokia RX-51" 28 tristate "SoC Audio support for Nokia RX-51"
29 depends on SND_OMAP_SOC && ARM && (MACH_NOKIA_RX51 || COMPILE_TEST) 29 depends on SND_OMAP_SOC && ARM && (MACH_NOKIA_RX51 || COMPILE_TEST) && I2C
30 select SND_OMAP_SOC_MCBSP 30 select SND_OMAP_SOC_MCBSP
31 select SND_SOC_TLV320AIC3X 31 select SND_SOC_TLV320AIC3X
32 select SND_SOC_TPA6130A2 32 select SND_SOC_TPA6130A2
@@ -37,7 +37,7 @@ config SND_OMAP_SOC_RX51
37 37
38config SND_OMAP_SOC_AMS_DELTA 38config SND_OMAP_SOC_AMS_DELTA
39 tristate "SoC Audio support for Amstrad E3 (Delta) videophone" 39 tristate "SoC Audio support for Amstrad E3 (Delta) videophone"
40 depends on SND_OMAP_SOC && MACH_AMS_DELTA 40 depends on SND_OMAP_SOC && MACH_AMS_DELTA && TTY
41 select SND_OMAP_SOC_MCBSP 41 select SND_OMAP_SOC_MCBSP
42 select SND_SOC_CX20442 42 select SND_SOC_CX20442
43 help 43 help
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index 994dcf345975..25a33e9d417a 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -77,7 +77,7 @@ static struct snd_soc_dai_link am3517evm_dai = {
77 .stream_name = "AIC23", 77 .stream_name = "AIC23",
78 .cpu_dai_name = "omap-mcbsp.1", 78 .cpu_dai_name = "omap-mcbsp.1",
79 .codec_dai_name = "tlv320aic23-hifi", 79 .codec_dai_name = "tlv320aic23-hifi",
80 .platform_name = "omap-pcm-audio", 80 .platform_name = "omap-mcbsp.1",
81 .codec_name = "tlv320aic23-codec.2-001a", 81 .codec_name = "tlv320aic23-codec.2-001a",
82 .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | 82 .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF |
83 SND_SOC_DAIFMT_CBM_CFM, 83 SND_SOC_DAIFMT_CBM_CFM,
diff --git a/sound/soc/omap/ams-delta.c b/sound/soc/omap/ams-delta.c
index 56a5219c0a00..bb243c663e6b 100644
--- a/sound/soc/omap/ams-delta.c
+++ b/sound/soc/omap/ams-delta.c
@@ -38,7 +38,6 @@
38#include "omap-mcbsp.h" 38#include "omap-mcbsp.h"
39#include "../codecs/cx20442.h" 39#include "../codecs/cx20442.h"
40 40
41
42/* Board specific DAPM widgets */ 41/* Board specific DAPM widgets */
43static const struct snd_soc_dapm_widget ams_delta_dapm_widgets[] = { 42static const struct snd_soc_dapm_widget ams_delta_dapm_widgets[] = {
44 /* Handset */ 43 /* Handset */
@@ -90,17 +89,23 @@ static const unsigned short ams_delta_audio_mode_pins[] = {
90 89
91static unsigned short ams_delta_audio_agc; 90static unsigned short ams_delta_audio_agc;
92 91
92/*
93 * Used for passing a codec structure pointer
94 * from the board initialization code to the tty line discipline.
95 */
96static struct snd_soc_codec *cx20442_codec;
97
93static int ams_delta_set_audio_mode(struct snd_kcontrol *kcontrol, 98static int ams_delta_set_audio_mode(struct snd_kcontrol *kcontrol,
94 struct snd_ctl_elem_value *ucontrol) 99 struct snd_ctl_elem_value *ucontrol)
95{ 100{
96 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 101 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
97 struct snd_soc_dapm_context *dapm = &codec->dapm; 102 struct snd_soc_dapm_context *dapm = &card->dapm;
98 struct soc_enum *control = (struct soc_enum *)kcontrol->private_value; 103 struct soc_enum *control = (struct soc_enum *)kcontrol->private_value;
99 unsigned short pins; 104 unsigned short pins;
100 int pin, changed = 0; 105 int pin, changed = 0;
101 106
102 /* Refuse any mode changes if we are not able to control the codec. */ 107 /* Refuse any mode changes if we are not able to control the codec. */
103 if (!codec->hw_write) 108 if (!cx20442_codec->hw_write)
104 return -EUNATCH; 109 return -EUNATCH;
105 110
106 if (ucontrol->value.enumerated.item[0] >= control->items) 111 if (ucontrol->value.enumerated.item[0] >= control->items)
@@ -166,8 +171,8 @@ static int ams_delta_set_audio_mode(struct snd_kcontrol *kcontrol,
166static int ams_delta_get_audio_mode(struct snd_kcontrol *kcontrol, 171static int ams_delta_get_audio_mode(struct snd_kcontrol *kcontrol,
167 struct snd_ctl_elem_value *ucontrol) 172 struct snd_ctl_elem_value *ucontrol)
168{ 173{
169 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 174 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
170 struct snd_soc_dapm_context *dapm = &codec->dapm; 175 struct snd_soc_dapm_context *dapm = &card->dapm;
171 unsigned short pins, mode; 176 unsigned short pins, mode;
172 177
173 pins = ((snd_soc_dapm_get_pin_status(dapm, "Mouthpiece") << 178 pins = ((snd_soc_dapm_get_pin_status(dapm, "Mouthpiece") <<
@@ -270,12 +275,6 @@ static void cx81801_timeout(unsigned long data)
270 ams_delta_latch2_write(AMS_DELTA_LATCH2_MODEM_CODEC, 0); 275 ams_delta_latch2_write(AMS_DELTA_LATCH2_MODEM_CODEC, 0);
271} 276}
272 277
273/*
274 * Used for passing a codec structure pointer
275 * from the board initialization code to the tty line discipline.
276 */
277static struct snd_soc_codec *cx20442_codec;
278
279/* Line discipline .open() */ 278/* Line discipline .open() */
280static int cx81801_open(struct tty_struct *tty) 279static int cx81801_open(struct tty_struct *tty)
281{ 280{
@@ -302,7 +301,7 @@ static int cx81801_open(struct tty_struct *tty)
302static void cx81801_close(struct tty_struct *tty) 301static void cx81801_close(struct tty_struct *tty)
303{ 302{
304 struct snd_soc_codec *codec = tty->disc_data; 303 struct snd_soc_codec *codec = tty->disc_data;
305 struct snd_soc_dapm_context *dapm = &codec->dapm; 304 struct snd_soc_dapm_context *dapm = &codec->card->dapm;
306 305
307 del_timer_sync(&cx81801_timer); 306 del_timer_sync(&cx81801_timer);
308 307
@@ -475,15 +474,14 @@ static void ams_delta_shutdown(struct snd_pcm_substream *substream)
475 474
476static int ams_delta_cx20442_init(struct snd_soc_pcm_runtime *rtd) 475static int ams_delta_cx20442_init(struct snd_soc_pcm_runtime *rtd)
477{ 476{
478 struct snd_soc_codec *codec = rtd->codec;
479 struct snd_soc_dapm_context *dapm = &codec->dapm;
480 struct snd_soc_dai *codec_dai = rtd->codec_dai; 477 struct snd_soc_dai *codec_dai = rtd->codec_dai;
481 struct snd_soc_card *card = rtd->card; 478 struct snd_soc_card *card = rtd->card;
479 struct snd_soc_dapm_context *dapm = &card->dapm;
482 int ret; 480 int ret;
483 /* Codec is ready, now add/activate board specific controls */ 481 /* Codec is ready, now add/activate board specific controls */
484 482
485 /* Store a pointer to the codec structure for tty ldisc use */ 483 /* Store a pointer to the codec structure for tty ldisc use */
486 cx20442_codec = codec; 484 cx20442_codec = rtd->codec;
487 485
488 /* Set up digital mute if not provided by the codec */ 486 /* Set up digital mute if not provided by the codec */
489 if (!codec_dai->driver->ops) { 487 if (!codec_dai->driver->ops) {
@@ -520,41 +518,12 @@ static int ams_delta_cx20442_init(struct snd_soc_pcm_runtime *rtd)
520 return 0; 518 return 0;
521 } 519 }
522 520
523 /* Add board specific DAPM widgets and routes */
524 ret = snd_soc_dapm_new_controls(dapm, ams_delta_dapm_widgets,
525 ARRAY_SIZE(ams_delta_dapm_widgets));
526 if (ret) {
527 dev_warn(card->dev,
528 "Failed to register DAPM controls, "
529 "will continue without any.\n");
530 return 0;
531 }
532
533 ret = snd_soc_dapm_add_routes(dapm, ams_delta_audio_map,
534 ARRAY_SIZE(ams_delta_audio_map));
535 if (ret) {
536 dev_warn(card->dev,
537 "Failed to set up DAPM routes, "
538 "will continue with codec default map.\n");
539 return 0;
540 }
541
542 /* Set up initial pin constellation */ 521 /* Set up initial pin constellation */
543 snd_soc_dapm_disable_pin(dapm, "Mouthpiece"); 522 snd_soc_dapm_disable_pin(dapm, "Mouthpiece");
544 snd_soc_dapm_enable_pin(dapm, "Earpiece");
545 snd_soc_dapm_enable_pin(dapm, "Microphone");
546 snd_soc_dapm_disable_pin(dapm, "Speaker"); 523 snd_soc_dapm_disable_pin(dapm, "Speaker");
547 snd_soc_dapm_disable_pin(dapm, "AGCIN"); 524 snd_soc_dapm_disable_pin(dapm, "AGCIN");
548 snd_soc_dapm_disable_pin(dapm, "AGCOUT"); 525 snd_soc_dapm_disable_pin(dapm, "AGCOUT");
549 526
550 /* Add virtual switch */
551 ret = snd_soc_add_codec_controls(codec, ams_delta_audio_controls,
552 ARRAY_SIZE(ams_delta_audio_controls));
553 if (ret)
554 dev_warn(card->dev,
555 "Failed to register audio mode control, "
556 "will continue without it.\n");
557
558 return 0; 527 return 0;
559} 528}
560 529
@@ -565,7 +534,7 @@ static struct snd_soc_dai_link ams_delta_dai_link = {
565 .cpu_dai_name = "omap-mcbsp.1", 534 .cpu_dai_name = "omap-mcbsp.1",
566 .codec_dai_name = "cx20442-voice", 535 .codec_dai_name = "cx20442-voice",
567 .init = ams_delta_cx20442_init, 536 .init = ams_delta_cx20442_init,
568 .platform_name = "omap-pcm-audio", 537 .platform_name = "omap-mcbsp.1",
569 .codec_name = "cx20442-codec", 538 .codec_name = "cx20442-codec",
570 .ops = &ams_delta_ops, 539 .ops = &ams_delta_ops,
571}; 540};
@@ -576,6 +545,13 @@ static struct snd_soc_card ams_delta_audio_card = {
576 .owner = THIS_MODULE, 545 .owner = THIS_MODULE,
577 .dai_link = &ams_delta_dai_link, 546 .dai_link = &ams_delta_dai_link,
578 .num_links = 1, 547 .num_links = 1,
548
549 .controls = ams_delta_audio_controls,
550 .num_controls = ARRAY_SIZE(ams_delta_audio_controls),
551 .dapm_widgets = ams_delta_dapm_widgets,
552 .num_dapm_widgets = ARRAY_SIZE(ams_delta_dapm_widgets),
553 .dapm_routes = ams_delta_audio_map,
554 .num_dapm_routes = ARRAY_SIZE(ams_delta_audio_map),
579}; 555};
580 556
581/* Module init/exit */ 557/* Module init/exit */
diff --git a/sound/soc/omap/n810.c b/sound/soc/omap/n810.c
index fd4d9c809e50..5d7f9cebe041 100644
--- a/sound/soc/omap/n810.c
+++ b/sound/soc/omap/n810.c
@@ -278,7 +278,7 @@ static struct snd_soc_dai_link n810_dai = {
278 .name = "TLV320AIC33", 278 .name = "TLV320AIC33",
279 .stream_name = "AIC33", 279 .stream_name = "AIC33",
280 .cpu_dai_name = "omap-mcbsp.2", 280 .cpu_dai_name = "omap-mcbsp.2",
281 .platform_name = "omap-pcm-audio", 281 .platform_name = "omap-mcbsp.2",
282 .codec_name = "tlv320aic3x-codec.2-0018", 282 .codec_name = "tlv320aic3x-codec.2-0018",
283 .codec_dai_name = "tlv320aic3x-hifi", 283 .codec_dai_name = "tlv320aic3x-hifi",
284 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | 284 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
diff --git a/sound/soc/omap/omap-abe-twl6040.c b/sound/soc/omap/omap-abe-twl6040.c
index 024dafc3e298..cec836ed0c01 100644
--- a/sound/soc/omap/omap-abe-twl6040.c
+++ b/sound/soc/omap/omap-abe-twl6040.c
@@ -47,8 +47,7 @@ static int omap_abe_hw_params(struct snd_pcm_substream *substream,
47{ 47{
48 struct snd_soc_pcm_runtime *rtd = substream->private_data; 48 struct snd_soc_pcm_runtime *rtd = substream->private_data;
49 struct snd_soc_dai *codec_dai = rtd->codec_dai; 49 struct snd_soc_dai *codec_dai = rtd->codec_dai;
50 struct snd_soc_codec *codec = rtd->codec; 50 struct snd_soc_card *card = rtd->card;
51 struct snd_soc_card *card = codec->card;
52 struct abe_twl6040 *priv = snd_soc_card_get_drvdata(card); 51 struct abe_twl6040 *priv = snd_soc_card_get_drvdata(card);
53 int clk_id, freq; 52 int clk_id, freq;
54 int ret; 53 int ret;
@@ -168,7 +167,7 @@ static const struct snd_soc_dapm_route audio_map[] = {
168static int omap_abe_twl6040_init(struct snd_soc_pcm_runtime *rtd) 167static int omap_abe_twl6040_init(struct snd_soc_pcm_runtime *rtd)
169{ 168{
170 struct snd_soc_codec *codec = rtd->codec; 169 struct snd_soc_codec *codec = rtd->codec;
171 struct snd_soc_card *card = codec->card; 170 struct snd_soc_card *card = rtd->card;
172 struct abe_twl6040 *priv = snd_soc_card_get_drvdata(card); 171 struct abe_twl6040 *priv = snd_soc_card_get_drvdata(card);
173 int hs_trim; 172 int hs_trim;
174 int ret = 0; 173 int ret = 0;
@@ -214,9 +213,7 @@ static struct snd_soc_dai_link abe_twl6040_dai_links[] = {
214 { 213 {
215 .name = "TWL6040", 214 .name = "TWL6040",
216 .stream_name = "TWL6040", 215 .stream_name = "TWL6040",
217 .cpu_dai_name = "omap-mcpdm",
218 .codec_dai_name = "twl6040-legacy", 216 .codec_dai_name = "twl6040-legacy",
219 .platform_name = "omap-pcm-audio",
220 .codec_name = "twl6040-codec", 217 .codec_name = "twl6040-codec",
221 .init = omap_abe_twl6040_init, 218 .init = omap_abe_twl6040_init,
222 .ops = &omap_abe_ops, 219 .ops = &omap_abe_ops,
@@ -224,9 +221,7 @@ static struct snd_soc_dai_link abe_twl6040_dai_links[] = {
224 { 221 {
225 .name = "DMIC", 222 .name = "DMIC",
226 .stream_name = "DMIC Capture", 223 .stream_name = "DMIC Capture",
227 .cpu_dai_name = "omap-dmic",
228 .codec_dai_name = "dmic-hifi", 224 .codec_dai_name = "dmic-hifi",
229 .platform_name = "omap-pcm-audio",
230 .codec_name = "dmic-codec", 225 .codec_name = "dmic-codec",
231 .init = omap_abe_dmic_init, 226 .init = omap_abe_dmic_init,
232 .ops = &omap_abe_dmic_ops, 227 .ops = &omap_abe_dmic_ops,
@@ -281,14 +276,14 @@ static int omap_abe_probe(struct platform_device *pdev)
281 dev_err(&pdev->dev, "McPDM node is not provided\n"); 276 dev_err(&pdev->dev, "McPDM node is not provided\n");
282 return -EINVAL; 277 return -EINVAL;
283 } 278 }
284 abe_twl6040_dai_links[0].cpu_dai_name = NULL;
285 abe_twl6040_dai_links[0].cpu_of_node = dai_node; 279 abe_twl6040_dai_links[0].cpu_of_node = dai_node;
280 abe_twl6040_dai_links[0].platform_of_node = dai_node;
286 281
287 dai_node = of_parse_phandle(node, "ti,dmic", 0); 282 dai_node = of_parse_phandle(node, "ti,dmic", 0);
288 if (dai_node) { 283 if (dai_node) {
289 num_links = 2; 284 num_links = 2;
290 abe_twl6040_dai_links[1].cpu_dai_name = NULL;
291 abe_twl6040_dai_links[1].cpu_of_node = dai_node; 285 abe_twl6040_dai_links[1].cpu_of_node = dai_node;
286 abe_twl6040_dai_links[1].platform_of_node = dai_node;
292 287
293 priv->dmic_codec_dev = platform_device_register_simple( 288 priv->dmic_codec_dev = platform_device_register_simple(
294 "dmic-codec", -1, NULL, 0); 289 "dmic-codec", -1, NULL, 0);
diff --git a/sound/soc/omap/omap-dmic.c b/sound/soc/omap/omap-dmic.c
index 1bd531d718f9..6925d7141215 100644
--- a/sound/soc/omap/omap-dmic.c
+++ b/sound/soc/omap/omap-dmic.c
@@ -40,6 +40,7 @@
40#include <sound/initval.h> 40#include <sound/initval.h>
41#include <sound/soc.h> 41#include <sound/soc.h>
42#include <sound/dmaengine_pcm.h> 42#include <sound/dmaengine_pcm.h>
43#include <sound/omap-pcm.h>
43 44
44#include "omap-dmic.h" 45#include "omap-dmic.h"
45 46
@@ -113,7 +114,6 @@ static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
113 114
114 mutex_unlock(&dmic->mutex); 115 mutex_unlock(&dmic->mutex);
115 116
116 snd_soc_dai_set_dma_data(dai, substream, &dmic->dma_data);
117 return ret; 117 return ret;
118} 118}
119 119
@@ -417,6 +417,9 @@ static int omap_dmic_probe(struct snd_soc_dai *dai)
417 417
418 /* Configure DMIC threshold value */ 418 /* Configure DMIC threshold value */
419 dmic->threshold = OMAP_DMIC_THRES_MAX - 3; 419 dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
420
421 snd_soc_dai_init_dma_data(dai, NULL, &dmic->dma_data);
422
420 return 0; 423 return 0;
421} 424}
422 425
@@ -492,6 +495,10 @@ static int asoc_dmic_probe(struct platform_device *pdev)
492 if (ret) 495 if (ret)
493 goto err_put_clk; 496 goto err_put_clk;
494 497
498 ret = omap_pcm_platform_register(&pdev->dev);
499 if (ret)
500 goto err_put_clk;
501
495 return 0; 502 return 0;
496 503
497err_put_clk: 504err_put_clk:
diff --git a/sound/soc/omap/omap-hdmi-card.c b/sound/soc/omap/omap-hdmi-card.c
index 7e66e9cba5a8..f649fe84b629 100644
--- a/sound/soc/omap/omap-hdmi-card.c
+++ b/sound/soc/omap/omap-hdmi-card.c
@@ -33,7 +33,7 @@ static struct snd_soc_dai_link omap_hdmi_dai = {
33 .name = "HDMI", 33 .name = "HDMI",
34 .stream_name = "HDMI", 34 .stream_name = "HDMI",
35 .cpu_dai_name = "omap-hdmi-audio-dai", 35 .cpu_dai_name = "omap-hdmi-audio-dai",
36 .platform_name = "omap-pcm-audio", 36 .platform_name = "omap-hdmi-audio-dai",
37 .codec_name = "hdmi-audio-codec", 37 .codec_name = "hdmi-audio-codec",
38 .codec_dai_name = "hdmi-hifi", 38 .codec_dai_name = "hdmi-hifi",
39}; 39};
diff --git a/sound/soc/omap/omap-hdmi.c b/sound/soc/omap/omap-hdmi.c
index ced3b88b44d4..eb9c39299f81 100644
--- a/sound/soc/omap/omap-hdmi.c
+++ b/sound/soc/omap/omap-hdmi.c
@@ -34,6 +34,7 @@
34#include <sound/asoundef.h> 34#include <sound/asoundef.h>
35#include <sound/dmaengine_pcm.h> 35#include <sound/dmaengine_pcm.h>
36#include <video/omapdss.h> 36#include <video/omapdss.h>
37#include <sound/omap-pcm.h>
37 38
38#include "omap-hdmi.h" 39#include "omap-hdmi.h"
39 40
@@ -324,7 +325,10 @@ static int omap_hdmi_probe(struct platform_device *pdev)
324 ret = snd_soc_register_component(&pdev->dev, &omap_hdmi_component, 325 ret = snd_soc_register_component(&pdev->dev, &omap_hdmi_component,
325 &omap_hdmi_dai, 1); 326 &omap_hdmi_dai, 1);
326 327
327 return ret; 328 if (ret)
329 return ret;
330
331 return omap_pcm_platform_register(&pdev->dev);
328} 332}
329 333
330static int omap_hdmi_remove(struct platform_device *pdev) 334static int omap_hdmi_remove(struct platform_device *pdev)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 6c19bba23570..efe2cd699b77 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -34,6 +34,7 @@
34#include <sound/initval.h> 34#include <sound/initval.h>
35#include <sound/soc.h> 35#include <sound/soc.h>
36#include <sound/dmaengine_pcm.h> 36#include <sound/dmaengine_pcm.h>
37#include <sound/omap-pcm.h>
37 38
38#include <linux/platform_data/asoc-ti-mcbsp.h> 39#include <linux/platform_data/asoc-ti-mcbsp.h>
39#include "mcbsp.h" 40#include "mcbsp.h"
@@ -149,9 +150,6 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream,
149 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 2); 150 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 2);
150 } 151 }
151 152
152 snd_soc_dai_set_dma_data(cpu_dai, substream,
153 &mcbsp->dma_data[substream->stream]);
154
155 return err; 153 return err;
156} 154}
157 155
@@ -559,6 +557,10 @@ static int omap_mcbsp_probe(struct snd_soc_dai *dai)
559 557
560 pm_runtime_enable(mcbsp->dev); 558 pm_runtime_enable(mcbsp->dev);
561 559
560 snd_soc_dai_init_dma_data(dai,
561 &mcbsp->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
562 &mcbsp->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
563
562 return 0; 564 return 0;
563} 565}
564 566
@@ -691,7 +693,7 @@ OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 1 Volume", \
691OMAP_MCBSP_ST_CONTROLS(2); 693OMAP_MCBSP_ST_CONTROLS(2);
692OMAP_MCBSP_ST_CONTROLS(3); 694OMAP_MCBSP_ST_CONTROLS(3);
693 695
694int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd) 696int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id)
695{ 697{
696 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 698 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
697 struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); 699 struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
@@ -701,7 +703,7 @@ int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd)
701 return 0; 703 return 0;
702 } 704 }
703 705
704 switch (mcbsp->id) { 706 switch (port_id) {
705 case 2: /* McBSP 2 */ 707 case 2: /* McBSP 2 */
706 return snd_soc_add_dai_controls(cpu_dai, 708 return snd_soc_add_dai_controls(cpu_dai,
707 omap_mcbsp2_st_controls, 709 omap_mcbsp2_st_controls,
@@ -711,6 +713,7 @@ int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd)
711 omap_mcbsp3_st_controls, 713 omap_mcbsp3_st_controls,
712 ARRAY_SIZE(omap_mcbsp3_st_controls)); 714 ARRAY_SIZE(omap_mcbsp3_st_controls));
713 default: 715 default:
716 dev_err(mcbsp->dev, "Port %d not supported\n", port_id);
714 break; 717 break;
715 } 718 }
716 719
@@ -799,11 +802,15 @@ static int asoc_mcbsp_probe(struct platform_device *pdev)
799 platform_set_drvdata(pdev, mcbsp); 802 platform_set_drvdata(pdev, mcbsp);
800 803
801 ret = omap_mcbsp_init(pdev); 804 ret = omap_mcbsp_init(pdev);
802 if (!ret) 805 if (ret)
803 return snd_soc_register_component(&pdev->dev, &omap_mcbsp_component, 806 return ret;
804 &omap_mcbsp_dai, 1); 807
808 ret = snd_soc_register_component(&pdev->dev, &omap_mcbsp_component,
809 &omap_mcbsp_dai, 1);
810 if (ret)
811 return ret;
805 812
806 return ret; 813 return omap_pcm_platform_register(&pdev->dev);
807} 814}
808 815
809static int asoc_mcbsp_remove(struct platform_device *pdev) 816static int asoc_mcbsp_remove(struct platform_device *pdev)
diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h
index ba8386a0d8dc..2e3369c27be3 100644
--- a/sound/soc/omap/omap-mcbsp.h
+++ b/sound/soc/omap/omap-mcbsp.h
@@ -39,6 +39,6 @@ enum omap_mcbsp_div {
39 OMAP_MCBSP_CLKGDV, /* Sample rate generator divider */ 39 OMAP_MCBSP_CLKGDV, /* Sample rate generator divider */
40}; 40};
41 41
42int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd); 42int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id);
43 43
44#endif 44#endif
diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c
index 2f5b1536477e..f0e2ebeab02b 100644
--- a/sound/soc/omap/omap-mcpdm.c
+++ b/sound/soc/omap/omap-mcpdm.c
@@ -40,6 +40,7 @@
40#include <sound/pcm_params.h> 40#include <sound/pcm_params.h>
41#include <sound/soc.h> 41#include <sound/soc.h>
42#include <sound/dmaengine_pcm.h> 42#include <sound/dmaengine_pcm.h>
43#include <sound/omap-pcm.h>
43 44
44#include "omap-mcpdm.h" 45#include "omap-mcpdm.h"
45 46
@@ -265,9 +266,6 @@ static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
265 } 266 }
266 mutex_unlock(&mcpdm->mutex); 267 mutex_unlock(&mcpdm->mutex);
267 268
268 snd_soc_dai_set_dma_data(dai, substream,
269 &mcpdm->dma_data[substream->stream]);
270
271 return 0; 269 return 0;
272} 270}
273 271
@@ -406,6 +404,11 @@ static int omap_mcpdm_probe(struct snd_soc_dai *dai)
406 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2; 404 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
407 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold = 405 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
408 MCPDM_UP_THRES_MAX - 3; 406 MCPDM_UP_THRES_MAX - 3;
407
408 snd_soc_dai_init_dma_data(dai,
409 &mcpdm->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
410 &mcpdm->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
411
409 return ret; 412 return ret;
410} 413}
411 414
@@ -460,6 +463,7 @@ static int asoc_mcpdm_probe(struct platform_device *pdev)
460{ 463{
461 struct omap_mcpdm *mcpdm; 464 struct omap_mcpdm *mcpdm;
462 struct resource *res; 465 struct resource *res;
466 int ret;
463 467
464 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL); 468 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
465 if (!mcpdm) 469 if (!mcpdm)
@@ -490,9 +494,13 @@ static int asoc_mcpdm_probe(struct platform_device *pdev)
490 494
491 mcpdm->dev = &pdev->dev; 495 mcpdm->dev = &pdev->dev;
492 496
493 return devm_snd_soc_register_component(&pdev->dev, 497 ret = devm_snd_soc_register_component(&pdev->dev,
494 &omap_mcpdm_component, 498 &omap_mcpdm_component,
495 &omap_mcpdm_dai, 1); 499 &omap_mcpdm_dai, 1);
500 if (ret)
501 return ret;
502
503 return omap_pcm_platform_register(&pdev->dev);
496} 504}
497 505
498static const struct of_device_id omap_mcpdm_of_match[] = { 506static const struct of_device_id omap_mcpdm_of_match[] = {
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 07b8b7bc9d20..8d809f8509c8 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -232,31 +232,12 @@ static struct snd_soc_platform_driver omap_soc_platform = {
232 .pcm_free = omap_pcm_free_dma_buffers, 232 .pcm_free = omap_pcm_free_dma_buffers,
233}; 233};
234 234
235static int omap_pcm_probe(struct platform_device *pdev) 235int omap_pcm_platform_register(struct device *dev)
236{ 236{
237 return snd_soc_register_platform(&pdev->dev, 237 return devm_snd_soc_register_platform(dev, &omap_soc_platform);
238 &omap_soc_platform);
239} 238}
240 239EXPORT_SYMBOL_GPL(omap_pcm_platform_register);
241static int omap_pcm_remove(struct platform_device *pdev)
242{
243 snd_soc_unregister_platform(&pdev->dev);
244 return 0;
245}
246
247static struct platform_driver omap_pcm_driver = {
248 .driver = {
249 .name = "omap-pcm-audio",
250 .owner = THIS_MODULE,
251 },
252
253 .probe = omap_pcm_probe,
254 .remove = omap_pcm_remove,
255};
256
257module_platform_driver(omap_pcm_driver);
258 240
259MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>"); 241MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
260MODULE_DESCRIPTION("OMAP PCM DMA module"); 242MODULE_DESCRIPTION("OMAP PCM DMA module");
261MODULE_LICENSE("GPL"); 243MODULE_LICENSE("GPL");
262MODULE_ALIAS("platform:omap-pcm-audio");
diff --git a/sound/soc/omap/omap-twl4030.c b/sound/soc/omap/omap-twl4030.c
index 6a8d6b5f160d..64141db311b2 100644
--- a/sound/soc/omap/omap-twl4030.c
+++ b/sound/soc/omap/omap-twl4030.c
@@ -55,8 +55,7 @@ static int omap_twl4030_hw_params(struct snd_pcm_substream *substream,
55 struct snd_soc_pcm_runtime *rtd = substream->private_data; 55 struct snd_soc_pcm_runtime *rtd = substream->private_data;
56 struct snd_soc_dai *codec_dai = rtd->codec_dai; 56 struct snd_soc_dai *codec_dai = rtd->codec_dai;
57 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 57 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
58 struct snd_soc_codec *codec = rtd->codec; 58 struct snd_soc_card *card = rtd->card;
59 struct snd_soc_card *card = codec->card;
60 unsigned int fmt; 59 unsigned int fmt;
61 int ret; 60 int ret;
62 61
@@ -179,7 +178,7 @@ static inline void twl4030_disconnect_pin(struct snd_soc_dapm_context *dapm,
179static int omap_twl4030_init(struct snd_soc_pcm_runtime *rtd) 178static int omap_twl4030_init(struct snd_soc_pcm_runtime *rtd)
180{ 179{
181 struct snd_soc_codec *codec = rtd->codec; 180 struct snd_soc_codec *codec = rtd->codec;
182 struct snd_soc_card *card = codec->card; 181 struct snd_soc_card *card = rtd->card;
183 struct snd_soc_dapm_context *dapm = &codec->dapm; 182 struct snd_soc_dapm_context *dapm = &codec->dapm;
184 struct omap_tw4030_pdata *pdata = dev_get_platdata(card->dev); 183 struct omap_tw4030_pdata *pdata = dev_get_platdata(card->dev);
185 struct omap_twl4030 *priv = snd_soc_card_get_drvdata(card); 184 struct omap_twl4030 *priv = snd_soc_card_get_drvdata(card);
@@ -239,7 +238,7 @@ static struct snd_soc_dai_link omap_twl4030_dai_links[] = {
239 .stream_name = "TWL4030 HiFi", 238 .stream_name = "TWL4030 HiFi",
240 .cpu_dai_name = "omap-mcbsp.2", 239 .cpu_dai_name = "omap-mcbsp.2",
241 .codec_dai_name = "twl4030-hifi", 240 .codec_dai_name = "twl4030-hifi",
242 .platform_name = "omap-pcm-audio", 241 .platform_name = "omap-mcbsp.2",
243 .codec_name = "twl4030-codec", 242 .codec_name = "twl4030-codec",
244 .init = omap_twl4030_init, 243 .init = omap_twl4030_init,
245 .ops = &omap_twl4030_ops, 244 .ops = &omap_twl4030_ops,
@@ -249,7 +248,7 @@ static struct snd_soc_dai_link omap_twl4030_dai_links[] = {
249 .stream_name = "TWL4030 Voice", 248 .stream_name = "TWL4030 Voice",
250 .cpu_dai_name = "omap-mcbsp.3", 249 .cpu_dai_name = "omap-mcbsp.3",
251 .codec_dai_name = "twl4030-voice", 250 .codec_dai_name = "twl4030-voice",
252 .platform_name = "omap-pcm-audio", 251 .platform_name = "omap-mcbsp.2",
253 .codec_name = "twl4030-codec", 252 .codec_name = "twl4030-codec",
254 .dai_fmt = SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF | 253 .dai_fmt = SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF |
255 SND_SOC_DAIFMT_CBM_CFM, 254 SND_SOC_DAIFMT_CBM_CFM,
@@ -299,12 +298,18 @@ static int omap_twl4030_probe(struct platform_device *pdev)
299 omap_twl4030_dai_links[0].cpu_dai_name = NULL; 298 omap_twl4030_dai_links[0].cpu_dai_name = NULL;
300 omap_twl4030_dai_links[0].cpu_of_node = dai_node; 299 omap_twl4030_dai_links[0].cpu_of_node = dai_node;
301 300
301 omap_twl4030_dai_links[0].platform_name = NULL;
302 omap_twl4030_dai_links[0].platform_of_node = dai_node;
303
302 dai_node = of_parse_phandle(node, "ti,mcbsp-voice", 0); 304 dai_node = of_parse_phandle(node, "ti,mcbsp-voice", 0);
303 if (!dai_node) { 305 if (!dai_node) {
304 card->num_links = 1; 306 card->num_links = 1;
305 } else { 307 } else {
306 omap_twl4030_dai_links[1].cpu_dai_name = NULL; 308 omap_twl4030_dai_links[1].cpu_dai_name = NULL;
307 omap_twl4030_dai_links[1].cpu_of_node = dai_node; 309 omap_twl4030_dai_links[1].cpu_of_node = dai_node;
310
311 omap_twl4030_dai_links[1].platform_name = NULL;
312 omap_twl4030_dai_links[1].platform_of_node = dai_node;
308 } 313 }
309 314
310 priv->jack_detect = of_get_named_gpio(node, 315 priv->jack_detect = of_get_named_gpio(node,
diff --git a/sound/soc/omap/omap3pandora.c b/sound/soc/omap/omap3pandora.c
index cf604a2faa18..076bec606d78 100644
--- a/sound/soc/omap/omap3pandora.c
+++ b/sound/soc/omap/omap3pandora.c
@@ -121,7 +121,7 @@ static int omap3pandora_hp_event(struct snd_soc_dapm_widget *w,
121 * |A| <~~clk~~+ 121 * |A| <~~clk~~+
122 * |P| <--- TWL4030 <--------- Line In and MICs 122 * |P| <--- TWL4030 <--------- Line In and MICs
123 */ 123 */
124static const struct snd_soc_dapm_widget omap3pandora_out_dapm_widgets[] = { 124static const struct snd_soc_dapm_widget omap3pandora_dapm_widgets[] = {
125 SND_SOC_DAPM_DAC_E("PCM DAC", "HiFi Playback", SND_SOC_NOPM, 125 SND_SOC_DAPM_DAC_E("PCM DAC", "HiFi Playback", SND_SOC_NOPM,
126 0, 0, omap3pandora_dac_event, 126 0, 0, omap3pandora_dac_event,
127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
@@ -130,22 +130,18 @@ static const struct snd_soc_dapm_widget omap3pandora_out_dapm_widgets[] = {
130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
131 SND_SOC_DAPM_HP("Headphone Jack", NULL), 131 SND_SOC_DAPM_HP("Headphone Jack", NULL),
132 SND_SOC_DAPM_LINE("Line Out", NULL), 132 SND_SOC_DAPM_LINE("Line Out", NULL),
133};
134 133
135static const struct snd_soc_dapm_widget omap3pandora_in_dapm_widgets[] = {
136 SND_SOC_DAPM_MIC("Mic (internal)", NULL), 134 SND_SOC_DAPM_MIC("Mic (internal)", NULL),
137 SND_SOC_DAPM_MIC("Mic (external)", NULL), 135 SND_SOC_DAPM_MIC("Mic (external)", NULL),
138 SND_SOC_DAPM_LINE("Line In", NULL), 136 SND_SOC_DAPM_LINE("Line In", NULL),
139}; 137};
140 138
141static const struct snd_soc_dapm_route omap3pandora_out_map[] = { 139static const struct snd_soc_dapm_route omap3pandora_map[] = {
142 {"PCM DAC", NULL, "APLL Enable"}, 140 {"PCM DAC", NULL, "APLL Enable"},
143 {"Headphone Amplifier", NULL, "PCM DAC"}, 141 {"Headphone Amplifier", NULL, "PCM DAC"},
144 {"Line Out", NULL, "PCM DAC"}, 142 {"Line Out", NULL, "PCM DAC"},
145 {"Headphone Jack", NULL, "Headphone Amplifier"}, 143 {"Headphone Jack", NULL, "Headphone Amplifier"},
146};
147 144
148static const struct snd_soc_dapm_route omap3pandora_in_map[] = {
149 {"AUXL", NULL, "Line In"}, 145 {"AUXL", NULL, "Line In"},
150 {"AUXR", NULL, "Line In"}, 146 {"AUXR", NULL, "Line In"},
151 147
@@ -160,7 +156,6 @@ static int omap3pandora_out_init(struct snd_soc_pcm_runtime *rtd)
160{ 156{
161 struct snd_soc_codec *codec = rtd->codec; 157 struct snd_soc_codec *codec = rtd->codec;
162 struct snd_soc_dapm_context *dapm = &codec->dapm; 158 struct snd_soc_dapm_context *dapm = &codec->dapm;
163 int ret;
164 159
165 /* All TWL4030 output pins are floating */ 160 /* All TWL4030 output pins are floating */
166 snd_soc_dapm_nc_pin(dapm, "EARPIECE"); 161 snd_soc_dapm_nc_pin(dapm, "EARPIECE");
@@ -174,20 +169,13 @@ static int omap3pandora_out_init(struct snd_soc_pcm_runtime *rtd)
174 snd_soc_dapm_nc_pin(dapm, "HFR"); 169 snd_soc_dapm_nc_pin(dapm, "HFR");
175 snd_soc_dapm_nc_pin(dapm, "VIBRA"); 170 snd_soc_dapm_nc_pin(dapm, "VIBRA");
176 171
177 ret = snd_soc_dapm_new_controls(dapm, omap3pandora_out_dapm_widgets, 172 return 0;
178 ARRAY_SIZE(omap3pandora_out_dapm_widgets));
179 if (ret < 0)
180 return ret;
181
182 return snd_soc_dapm_add_routes(dapm, omap3pandora_out_map,
183 ARRAY_SIZE(omap3pandora_out_map));
184} 173}
185 174
186static int omap3pandora_in_init(struct snd_soc_pcm_runtime *rtd) 175static int omap3pandora_in_init(struct snd_soc_pcm_runtime *rtd)
187{ 176{
188 struct snd_soc_codec *codec = rtd->codec; 177 struct snd_soc_codec *codec = rtd->codec;
189 struct snd_soc_dapm_context *dapm = &codec->dapm; 178 struct snd_soc_dapm_context *dapm = &codec->dapm;
190 int ret;
191 179
192 /* Not comnnected */ 180 /* Not comnnected */
193 snd_soc_dapm_nc_pin(dapm, "HSMIC"); 181 snd_soc_dapm_nc_pin(dapm, "HSMIC");
@@ -195,13 +183,7 @@ static int omap3pandora_in_init(struct snd_soc_pcm_runtime *rtd)
195 snd_soc_dapm_nc_pin(dapm, "DIGIMIC0"); 183 snd_soc_dapm_nc_pin(dapm, "DIGIMIC0");
196 snd_soc_dapm_nc_pin(dapm, "DIGIMIC1"); 184 snd_soc_dapm_nc_pin(dapm, "DIGIMIC1");
197 185
198 ret = snd_soc_dapm_new_controls(dapm, omap3pandora_in_dapm_widgets, 186 return 0;
199 ARRAY_SIZE(omap3pandora_in_dapm_widgets));
200 if (ret < 0)
201 return ret;
202
203 return snd_soc_dapm_add_routes(dapm, omap3pandora_in_map,
204 ARRAY_SIZE(omap3pandora_in_map));
205} 187}
206 188
207static struct snd_soc_ops omap3pandora_ops = { 189static struct snd_soc_ops omap3pandora_ops = {
@@ -215,7 +197,7 @@ static struct snd_soc_dai_link omap3pandora_dai[] = {
215 .stream_name = "HiFi Out", 197 .stream_name = "HiFi Out",
216 .cpu_dai_name = "omap-mcbsp.2", 198 .cpu_dai_name = "omap-mcbsp.2",
217 .codec_dai_name = "twl4030-hifi", 199 .codec_dai_name = "twl4030-hifi",
218 .platform_name = "omap-pcm-audio", 200 .platform_name = "omap-mcbsp.2",
219 .codec_name = "twl4030-codec", 201 .codec_name = "twl4030-codec",
220 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | 202 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
221 SND_SOC_DAIFMT_CBS_CFS, 203 SND_SOC_DAIFMT_CBS_CFS,
@@ -226,7 +208,7 @@ static struct snd_soc_dai_link omap3pandora_dai[] = {
226 .stream_name = "Line/Mic In", 208 .stream_name = "Line/Mic In",
227 .cpu_dai_name = "omap-mcbsp.4", 209 .cpu_dai_name = "omap-mcbsp.4",
228 .codec_dai_name = "twl4030-hifi", 210 .codec_dai_name = "twl4030-hifi",
229 .platform_name = "omap-pcm-audio", 211 .platform_name = "omap-mcbsp.4",
230 .codec_name = "twl4030-codec", 212 .codec_name = "twl4030-codec",
231 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | 213 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
232 SND_SOC_DAIFMT_CBS_CFS, 214 SND_SOC_DAIFMT_CBS_CFS,
@@ -241,6 +223,11 @@ static struct snd_soc_card snd_soc_card_omap3pandora = {
241 .owner = THIS_MODULE, 223 .owner = THIS_MODULE,
242 .dai_link = omap3pandora_dai, 224 .dai_link = omap3pandora_dai,
243 .num_links = ARRAY_SIZE(omap3pandora_dai), 225 .num_links = ARRAY_SIZE(omap3pandora_dai),
226
227 .dapm_widgets = omap3pandora_dapm_widgets,
228 .num_dapm_widgets = ARRAY_SIZE(omap3pandora_dapm_widgets),
229 .dapm_routes = omap3pandora_map,
230 .num_dapm_routes = ARRAY_SIZE(omap3pandora_map),
244}; 231};
245 232
246static struct platform_device *omap3pandora_snd_device; 233static struct platform_device *omap3pandora_snd_device;
diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c
index d03e57da7708..aa4053bf6710 100644
--- a/sound/soc/omap/osk5912.c
+++ b/sound/soc/omap/osk5912.c
@@ -96,7 +96,7 @@ static struct snd_soc_dai_link osk_dai = {
96 .stream_name = "AIC23", 96 .stream_name = "AIC23",
97 .cpu_dai_name = "omap-mcbsp.1", 97 .cpu_dai_name = "omap-mcbsp.1",
98 .codec_dai_name = "tlv320aic23-hifi", 98 .codec_dai_name = "tlv320aic23-hifi",
99 .platform_name = "omap-pcm-audio", 99 .platform_name = "omap-mcbsp.1",
100 .codec_name = "tlv320aic23-codec", 100 .codec_name = "tlv320aic23-codec",
101 .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | 101 .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF |
102 SND_SOC_DAIFMT_CBM_CFM, 102 SND_SOC_DAIFMT_CBM_CFM,
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index 7fb3d4b10370..6951dc812055 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -26,6 +26,7 @@
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/gpio/consumer.h>
29#include <linux/module.h> 30#include <linux/module.h>
30#include <sound/core.h> 31#include <sound/core.h>
31#include <sound/jack.h> 32#include <sound/jack.h>
@@ -38,15 +39,6 @@
38 39
39#include "omap-mcbsp.h" 40#include "omap-mcbsp.h"
40 41
41#define RX51_TVOUT_SEL_GPIO 40
42#define RX51_JACK_DETECT_GPIO 177
43#define RX51_ECI_SW_GPIO 182
44/*
45 * REVISIT: TWL4030 GPIO base in RX-51. Now statically defined to 192. This
46 * gpio is reserved in arch/arm/mach-omap2/board-rx51-peripherals.c
47 */
48#define RX51_SPEAKER_AMP_TWL_GPIO (192 + 7)
49
50enum { 42enum {
51 RX51_JACK_DISABLED, 43 RX51_JACK_DISABLED,
52 RX51_JACK_TVOUT, /* tv-out with stereo output */ 44 RX51_JACK_TVOUT, /* tv-out with stereo output */
@@ -54,12 +46,21 @@ enum {
54 RX51_JACK_HS, /* headset: stereo output with mic */ 46 RX51_JACK_HS, /* headset: stereo output with mic */
55}; 47};
56 48
49struct rx51_audio_pdata {
50 struct gpio_desc *tvout_selection_gpio;
51 struct gpio_desc *jack_detection_gpio;
52 struct gpio_desc *eci_sw_gpio;
53 struct gpio_desc *speaker_amp_gpio;
54};
55
57static int rx51_spk_func; 56static int rx51_spk_func;
58static int rx51_dmic_func; 57static int rx51_dmic_func;
59static int rx51_jack_func; 58static int rx51_jack_func;
60 59
61static void rx51_ext_control(struct snd_soc_dapm_context *dapm) 60static void rx51_ext_control(struct snd_soc_dapm_context *dapm)
62{ 61{
62 struct snd_soc_card *card = dapm->card;
63 struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
63 int hp = 0, hs = 0, tvout = 0; 64 int hp = 0, hs = 0, tvout = 0;
64 65
65 switch (rx51_jack_func) { 66 switch (rx51_jack_func) {
@@ -93,7 +94,7 @@ static void rx51_ext_control(struct snd_soc_dapm_context *dapm)
93 else 94 else
94 snd_soc_dapm_disable_pin_unlocked(dapm, "HS Mic"); 95 snd_soc_dapm_disable_pin_unlocked(dapm, "HS Mic");
95 96
96 gpio_set_value(RX51_TVOUT_SEL_GPIO, tvout); 97 gpiod_set_value(pdata->tvout_selection_gpio, tvout);
97 98
98 snd_soc_dapm_sync_unlocked(dapm); 99 snd_soc_dapm_sync_unlocked(dapm);
99 100
@@ -154,10 +155,12 @@ static int rx51_set_spk(struct snd_kcontrol *kcontrol,
154static int rx51_spk_event(struct snd_soc_dapm_widget *w, 155static int rx51_spk_event(struct snd_soc_dapm_widget *w,
155 struct snd_kcontrol *k, int event) 156 struct snd_kcontrol *k, int event)
156{ 157{
157 if (SND_SOC_DAPM_EVENT_ON(event)) 158 struct snd_soc_dapm_context *dapm = w->dapm;
158 gpio_set_value_cansleep(RX51_SPEAKER_AMP_TWL_GPIO, 1); 159 struct snd_soc_card *card = dapm->card;
159 else 160 struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
160 gpio_set_value_cansleep(RX51_SPEAKER_AMP_TWL_GPIO, 0); 161
162 gpiod_set_raw_value_cansleep(pdata->speaker_amp_gpio,
163 !!SND_SOC_DAPM_EVENT_ON(event));
161 164
162 return 0; 165 return 0;
163} 166}
@@ -223,7 +226,6 @@ static struct snd_soc_jack rx51_av_jack;
223 226
224static struct snd_soc_jack_gpio rx51_av_jack_gpios[] = { 227static struct snd_soc_jack_gpio rx51_av_jack_gpios[] = {
225 { 228 {
226 .gpio = RX51_JACK_DETECT_GPIO,
227 .name = "avdet-gpio", 229 .name = "avdet-gpio",
228 .report = SND_JACK_HEADSET, 230 .report = SND_JACK_HEADSET,
229 .invert = 1, 231 .invert = 1,
@@ -237,9 +239,6 @@ static const struct snd_soc_dapm_widget aic34_dapm_widgets[] = {
237 SND_SOC_DAPM_HP("Headphone Jack", rx51_hp_event), 239 SND_SOC_DAPM_HP("Headphone Jack", rx51_hp_event),
238 SND_SOC_DAPM_MIC("HS Mic", NULL), 240 SND_SOC_DAPM_MIC("HS Mic", NULL),
239 SND_SOC_DAPM_LINE("FM Transmitter", NULL), 241 SND_SOC_DAPM_LINE("FM Transmitter", NULL),
240};
241
242static const struct snd_soc_dapm_widget aic34_dapm_widgetsb[] = {
243 SND_SOC_DAPM_SPK("Earphone", NULL), 242 SND_SOC_DAPM_SPK("Earphone", NULL),
244}; 243};
245 244
@@ -253,9 +252,7 @@ static const struct snd_soc_dapm_route audio_map[] = {
253 252
254 {"DMic Rate 64", NULL, "Mic Bias"}, 253 {"DMic Rate 64", NULL, "Mic Bias"},
255 {"Mic Bias", NULL, "DMic"}, 254 {"Mic Bias", NULL, "DMic"},
256};
257 255
258static const struct snd_soc_dapm_route audio_mapb[] = {
259 {"b LINE2R", NULL, "MONO_LOUT"}, 256 {"b LINE2R", NULL, "MONO_LOUT"},
260 {"Earphone", NULL, "b HPLOUT"}, 257 {"Earphone", NULL, "b HPLOUT"},
261 258
@@ -263,9 +260,11 @@ static const struct snd_soc_dapm_route audio_mapb[] = {
263 {"b Mic Bias", NULL, "HS Mic"} 260 {"b Mic Bias", NULL, "HS Mic"}
264}; 261};
265 262
266static const char *spk_function[] = {"Off", "On"}; 263static const char * const spk_function[] = {"Off", "On"};
267static const char *input_function[] = {"ADC", "Digital Mic"}; 264static const char * const input_function[] = {"ADC", "Digital Mic"};
268static const char *jack_function[] = {"Off", "TV-OUT", "Headphone", "Headset"}; 265static const char * const jack_function[] = {
266 "Off", "TV-OUT", "Headphone", "Headset"
267};
269 268
270static const struct soc_enum rx51_enum[] = { 269static const struct soc_enum rx51_enum[] = {
271 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(spk_function), spk_function), 270 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(spk_function), spk_function),
@@ -281,15 +280,15 @@ static const struct snd_kcontrol_new aic34_rx51_controls[] = {
281 SOC_ENUM_EXT("Jack Function", rx51_enum[2], 280 SOC_ENUM_EXT("Jack Function", rx51_enum[2],
282 rx51_get_jack, rx51_set_jack), 281 rx51_get_jack, rx51_set_jack),
283 SOC_DAPM_PIN_SWITCH("FM Transmitter"), 282 SOC_DAPM_PIN_SWITCH("FM Transmitter"),
284};
285
286static const struct snd_kcontrol_new aic34_rx51_controlsb[] = {
287 SOC_DAPM_PIN_SWITCH("Earphone"), 283 SOC_DAPM_PIN_SWITCH("Earphone"),
288}; 284};
289 285
290static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd) 286static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
291{ 287{
292 struct snd_soc_codec *codec = rtd->codec; 288 struct snd_soc_codec *codec = rtd->codec;
289 struct snd_soc_card *card = rtd->card;
290 struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
291
293 struct snd_soc_dapm_context *dapm = &codec->dapm; 292 struct snd_soc_dapm_context *dapm = &codec->dapm;
294 int err; 293 int err;
295 294
@@ -298,57 +297,41 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
298 snd_soc_dapm_nc_pin(dapm, "MIC3R"); 297 snd_soc_dapm_nc_pin(dapm, "MIC3R");
299 snd_soc_dapm_nc_pin(dapm, "LINE1R"); 298 snd_soc_dapm_nc_pin(dapm, "LINE1R");
300 299
301 /* Add RX-51 specific controls */
302 err = snd_soc_add_card_controls(rtd->card, aic34_rx51_controls,
303 ARRAY_SIZE(aic34_rx51_controls));
304 if (err < 0)
305 return err;
306
307 /* Add RX-51 specific widgets */
308 snd_soc_dapm_new_controls(dapm, aic34_dapm_widgets,
309 ARRAY_SIZE(aic34_dapm_widgets));
310
311 /* Set up RX-51 specific audio path audio_map */
312 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
313
314 err = tpa6130a2_add_controls(codec); 300 err = tpa6130a2_add_controls(codec);
315 if (err < 0) 301 if (err < 0) {
302 dev_err(card->dev, "Failed to add TPA6130A2 controls\n");
316 return err; 303 return err;
304 }
317 snd_soc_limit_volume(codec, "TPA6130A2 Headphone Playback Volume", 42); 305 snd_soc_limit_volume(codec, "TPA6130A2 Headphone Playback Volume", 42);
318 306
319 err = omap_mcbsp_st_add_controls(rtd); 307 err = omap_mcbsp_st_add_controls(rtd, 2);
320 if (err < 0) 308 if (err < 0) {
309 dev_err(card->dev, "Failed to add MCBSP controls\n");
321 return err; 310 return err;
311 }
322 312
323 /* AV jack detection */ 313 /* AV jack detection */
324 err = snd_soc_jack_new(codec, "AV Jack", 314 err = snd_soc_jack_new(codec, "AV Jack",
325 SND_JACK_HEADSET | SND_JACK_VIDEOOUT, 315 SND_JACK_HEADSET | SND_JACK_VIDEOOUT,
326 &rx51_av_jack); 316 &rx51_av_jack);
327 if (err) 317 if (err) {
318 dev_err(card->dev, "Failed to add AV Jack\n");
328 return err; 319 return err;
320 }
321
322 /* prepare gpio for snd_soc_jack_add_gpios */
323 rx51_av_jack_gpios[0].gpio = desc_to_gpio(pdata->jack_detection_gpio);
324 devm_gpiod_put(card->dev, pdata->jack_detection_gpio);
325
329 err = snd_soc_jack_add_gpios(&rx51_av_jack, 326 err = snd_soc_jack_add_gpios(&rx51_av_jack,
330 ARRAY_SIZE(rx51_av_jack_gpios), 327 ARRAY_SIZE(rx51_av_jack_gpios),
331 rx51_av_jack_gpios); 328 rx51_av_jack_gpios);
332 329 if (err) {
333 return err; 330 dev_err(card->dev, "Failed to add GPIOs\n");
334}
335
336static int rx51_aic34b_init(struct snd_soc_dapm_context *dapm)
337{
338 int err;
339
340 err = snd_soc_add_card_controls(dapm->card, aic34_rx51_controlsb,
341 ARRAY_SIZE(aic34_rx51_controlsb));
342 if (err < 0)
343 return err; 331 return err;
332 }
344 333
345 err = snd_soc_dapm_new_controls(dapm, aic34_dapm_widgetsb, 334 return err;
346 ARRAY_SIZE(aic34_dapm_widgetsb));
347 if (err < 0)
348 return 0;
349
350 return snd_soc_dapm_add_routes(dapm, audio_mapb,
351 ARRAY_SIZE(audio_mapb));
352} 335}
353 336
354/* Digital audio interface glue - connects codec <--> CPU */ 337/* Digital audio interface glue - connects codec <--> CPU */
@@ -358,7 +341,7 @@ static struct snd_soc_dai_link rx51_dai[] = {
358 .stream_name = "AIC34", 341 .stream_name = "AIC34",
359 .cpu_dai_name = "omap-mcbsp.2", 342 .cpu_dai_name = "omap-mcbsp.2",
360 .codec_dai_name = "tlv320aic3x-hifi", 343 .codec_dai_name = "tlv320aic3x-hifi",
361 .platform_name = "omap-pcm-audio", 344 .platform_name = "omap-mcbsp.2",
362 .codec_name = "tlv320aic3x-codec.2-0018", 345 .codec_name = "tlv320aic3x-codec.2-0018",
363 .dai_fmt = SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF | 346 .dai_fmt = SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF |
364 SND_SOC_DAIFMT_CBM_CFM, 347 SND_SOC_DAIFMT_CBM_CFM,
@@ -371,7 +354,6 @@ static struct snd_soc_aux_dev rx51_aux_dev[] = {
371 { 354 {
372 .name = "TLV320AIC34b", 355 .name = "TLV320AIC34b",
373 .codec_name = "tlv320aic3x-codec.2-0019", 356 .codec_name = "tlv320aic3x-codec.2-0019",
374 .init = rx51_aic34b_init,
375 }, 357 },
376}; 358};
377 359
@@ -392,63 +374,160 @@ static struct snd_soc_card rx51_sound_card = {
392 .num_aux_devs = ARRAY_SIZE(rx51_aux_dev), 374 .num_aux_devs = ARRAY_SIZE(rx51_aux_dev),
393 .codec_conf = rx51_codec_conf, 375 .codec_conf = rx51_codec_conf,
394 .num_configs = ARRAY_SIZE(rx51_codec_conf), 376 .num_configs = ARRAY_SIZE(rx51_codec_conf),
395};
396 377
397static struct platform_device *rx51_snd_device; 378 .controls = aic34_rx51_controls,
379 .num_controls = ARRAY_SIZE(aic34_rx51_controls),
380 .dapm_widgets = aic34_dapm_widgets,
381 .num_dapm_widgets = ARRAY_SIZE(aic34_dapm_widgets),
382 .dapm_routes = audio_map,
383 .num_dapm_routes = ARRAY_SIZE(audio_map),
384};
398 385
399static int __init rx51_soc_init(void) 386static int rx51_soc_probe(struct platform_device *pdev)
400{ 387{
388 struct rx51_audio_pdata *pdata;
389 struct device_node *np = pdev->dev.of_node;
390 struct snd_soc_card *card = &rx51_sound_card;
401 int err; 391 int err;
402 392
403 if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900")) 393 if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900"))
404 return -ENODEV; 394 return -ENODEV;
405 395
406 err = gpio_request_one(RX51_TVOUT_SEL_GPIO, 396 card->dev = &pdev->dev;
407 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "tvout_sel"); 397
408 if (err) 398 if (np) {
409 goto err_gpio_tvout_sel; 399 struct device_node *dai_node;
410 err = gpio_request_one(RX51_ECI_SW_GPIO, 400
411 GPIOF_DIR_OUT | GPIOF_INIT_HIGH, "eci_sw"); 401 dai_node = of_parse_phandle(np, "nokia,cpu-dai", 0);
412 if (err) 402 if (!dai_node) {
413 goto err_gpio_eci_sw; 403 dev_err(&pdev->dev, "McBSP node is not provided\n");
414 404 return -EINVAL;
415 rx51_snd_device = platform_device_alloc("soc-audio", -1); 405 }
416 if (!rx51_snd_device) { 406 rx51_dai[0].cpu_dai_name = NULL;
417 err = -ENOMEM; 407 rx51_dai[0].platform_name = NULL;
418 goto err1; 408 rx51_dai[0].cpu_of_node = dai_node;
409 rx51_dai[0].platform_of_node = dai_node;
410
411 dai_node = of_parse_phandle(np, "nokia,audio-codec", 0);
412 if (!dai_node) {
413 dev_err(&pdev->dev, "Codec node is not provided\n");
414 return -EINVAL;
415 }
416 rx51_dai[0].codec_name = NULL;
417 rx51_dai[0].codec_of_node = dai_node;
418
419 dai_node = of_parse_phandle(np, "nokia,audio-codec", 1);
420 if (!dai_node) {
421 dev_err(&pdev->dev, "Auxiliary Codec node is not provided\n");
422 return -EINVAL;
423 }
424 rx51_aux_dev[0].codec_name = NULL;
425 rx51_aux_dev[0].codec_of_node = dai_node;
426 rx51_codec_conf[0].dev_name = NULL;
427 rx51_codec_conf[0].of_node = dai_node;
428
429 dai_node = of_parse_phandle(np, "nokia,headphone-amplifier", 0);
430 if (!dai_node) {
431 dev_err(&pdev->dev, "Headphone amplifier node is not provided\n");
432 return -EINVAL;
433 }
434
435 /* TODO: tpa6130a2a driver supports only a single instance, so
436 * this driver ignores the headphone-amplifier node for now.
437 * It's already mandatory in the DT binding to be future proof.
438 */
419 } 439 }
420 440
421 platform_set_drvdata(rx51_snd_device, &rx51_sound_card); 441 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
442 if (pdata == NULL) {
443 dev_err(card->dev, "failed to create private data\n");
444 return -ENOMEM;
445 }
446 snd_soc_card_set_drvdata(card, pdata);
422 447
423 err = platform_device_add(rx51_snd_device); 448 pdata->tvout_selection_gpio = devm_gpiod_get(card->dev,
424 if (err) 449 "tvout-selection");
425 goto err2; 450 if (IS_ERR(pdata->tvout_selection_gpio)) {
451 dev_err(card->dev, "could not get tvout selection gpio\n");
452 return PTR_ERR(pdata->tvout_selection_gpio);
453 }
426 454
427 return 0; 455 err = gpiod_direction_output(pdata->tvout_selection_gpio, 0);
428err2: 456 if (err) {
429 platform_device_put(rx51_snd_device); 457 dev_err(card->dev, "could not setup tvout selection gpio\n");
430err1: 458 return err;
431 gpio_free(RX51_ECI_SW_GPIO); 459 }
432err_gpio_eci_sw:
433 gpio_free(RX51_TVOUT_SEL_GPIO);
434err_gpio_tvout_sel:
435 460
436 return err; 461 pdata->jack_detection_gpio = devm_gpiod_get(card->dev,
462 "jack-detection");
463 if (IS_ERR(pdata->jack_detection_gpio)) {
464 dev_err(card->dev, "could not get jack detection gpio\n");
465 return PTR_ERR(pdata->jack_detection_gpio);
466 }
467
468 pdata->eci_sw_gpio = devm_gpiod_get(card->dev, "eci-switch");
469 if (IS_ERR(pdata->eci_sw_gpio)) {
470 dev_err(card->dev, "could not get eci switch gpio\n");
471 return PTR_ERR(pdata->eci_sw_gpio);
472 }
473
474 err = gpiod_direction_output(pdata->eci_sw_gpio, 1);
475 if (err) {
476 dev_err(card->dev, "could not setup eci switch gpio\n");
477 return err;
478 }
479
480 pdata->speaker_amp_gpio = devm_gpiod_get(card->dev,
481 "speaker-amplifier");
482 if (IS_ERR(pdata->speaker_amp_gpio)) {
483 dev_err(card->dev, "could not get speaker enable gpio\n");
484 return PTR_ERR(pdata->speaker_amp_gpio);
485 }
486
487 err = gpiod_direction_output(pdata->speaker_amp_gpio, 0);
488 if (err) {
489 dev_err(card->dev, "could not setup speaker enable gpio\n");
490 return err;
491 }
492
493 err = devm_snd_soc_register_card(card->dev, card);
494 if (err) {
495 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", err);
496 return err;
497 }
498
499 return 0;
437} 500}
438 501
439static void __exit rx51_soc_exit(void) 502static int rx51_soc_remove(struct platform_device *pdev)
440{ 503{
441 snd_soc_jack_free_gpios(&rx51_av_jack, ARRAY_SIZE(rx51_av_jack_gpios), 504 snd_soc_jack_free_gpios(&rx51_av_jack, ARRAY_SIZE(rx51_av_jack_gpios),
442 rx51_av_jack_gpios); 505 rx51_av_jack_gpios);
443 506
444 platform_device_unregister(rx51_snd_device); 507 return 0;
445 gpio_free(RX51_ECI_SW_GPIO);
446 gpio_free(RX51_TVOUT_SEL_GPIO);
447} 508}
448 509
449module_init(rx51_soc_init); 510#if defined(CONFIG_OF)
450module_exit(rx51_soc_exit); 511static const struct of_device_id rx51_audio_of_match[] = {
512 { .compatible = "nokia,n900-audio", },
513 {},
514};
515MODULE_DEVICE_TABLE(of, rx51_audio_of_match);
516#endif
517
518static struct platform_driver rx51_soc_driver = {
519 .driver = {
520 .name = "rx51-audio",
521 .owner = THIS_MODULE,
522 .of_match_table = of_match_ptr(rx51_audio_of_match),
523 },
524 .probe = rx51_soc_probe,
525 .remove = rx51_soc_remove,
526};
527
528module_platform_driver(rx51_soc_driver);
451 529
452MODULE_AUTHOR("Nokia Corporation"); 530MODULE_AUTHOR("Nokia Corporation");
453MODULE_DESCRIPTION("ALSA SoC Nokia RX-51"); 531MODULE_DESCRIPTION("ALSA SoC Nokia RX-51");
454MODULE_LICENSE("GPL"); 532MODULE_LICENSE("GPL");
533MODULE_ALIAS("platform:rx51-audio");
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 6473052b6899..6acb225ec6fd 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -140,7 +140,7 @@ config SND_PXA910_SOC
140 140
141config SND_SOC_TTC_DKB 141config SND_SOC_TTC_DKB
142 bool "SoC Audio support for TTC DKB" 142 bool "SoC Audio support for TTC DKB"
143 depends on SND_PXA910_SOC && MACH_TTC_DKB 143 depends on SND_PXA910_SOC && MACH_TTC_DKB && I2C=y
144 select PXA_SSP 144 select PXA_SSP
145 select SND_PXA_SOC_SSP 145 select SND_PXA_SOC_SSP
146 select SND_MMP_SOC 146 select SND_MMP_SOC
diff --git a/sound/soc/pxa/brownstone.c b/sound/soc/pxa/brownstone.c
index 08acdc236bf8..c8dd53f9c35d 100644
--- a/sound/soc/pxa/brownstone.c
+++ b/sound/soc/pxa/brownstone.c
@@ -50,11 +50,6 @@ static int brownstone_wm8994_init(struct snd_soc_pcm_runtime *rtd)
50 struct snd_soc_codec *codec = rtd->codec; 50 struct snd_soc_codec *codec = rtd->codec;
51 struct snd_soc_dapm_context *dapm = &codec->dapm; 51 struct snd_soc_dapm_context *dapm = &codec->dapm;
52 52
53 snd_soc_dapm_enable_pin(dapm, "Ext Spk");
54 snd_soc_dapm_enable_pin(dapm, "Headset Stereophone");
55 snd_soc_dapm_enable_pin(dapm, "Headset Mic");
56 snd_soc_dapm_enable_pin(dapm, "Main Mic");
57
58 /* set endpoints to not connected */ 53 /* set endpoints to not connected */
59 snd_soc_dapm_nc_pin(dapm, "HPOUT2P"); 54 snd_soc_dapm_nc_pin(dapm, "HPOUT2P");
60 snd_soc_dapm_nc_pin(dapm, "HPOUT2N"); 55 snd_soc_dapm_nc_pin(dapm, "HPOUT2N");
@@ -70,8 +65,6 @@ static int brownstone_wm8994_init(struct snd_soc_pcm_runtime *rtd)
70 snd_soc_dapm_nc_pin(dapm, "IN2RP:VXRP"); 65 snd_soc_dapm_nc_pin(dapm, "IN2RP:VXRP");
71 snd_soc_dapm_nc_pin(dapm, "IN2LN"); 66 snd_soc_dapm_nc_pin(dapm, "IN2LN");
72 67
73 snd_soc_dapm_sync(dapm);
74
75 return 0; 68 return 0;
76} 69}
77 70
diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c
index 3284c4b901cb..17f9521ff6ea 100644
--- a/sound/soc/pxa/palm27x.c
+++ b/sound/soc/pxa/palm27x.c
@@ -79,14 +79,6 @@ static int palm27x_ac97_init(struct snd_soc_pcm_runtime *rtd)
79 struct snd_soc_dapm_context *dapm = &codec->dapm; 79 struct snd_soc_dapm_context *dapm = &codec->dapm;
80 int err; 80 int err;
81 81
82 /* connected pins */
83 if (machine_is_palmld())
84 snd_soc_dapm_enable_pin(dapm, "MIC1");
85 snd_soc_dapm_enable_pin(dapm, "HPOUTL");
86 snd_soc_dapm_enable_pin(dapm, "HPOUTR");
87 snd_soc_dapm_enable_pin(dapm, "LOUT2");
88 snd_soc_dapm_enable_pin(dapm, "ROUT2");
89
90 /* not connected pins */ 82 /* not connected pins */
91 snd_soc_dapm_nc_pin(dapm, "OUT3"); 83 snd_soc_dapm_nc_pin(dapm, "OUT3");
92 snd_soc_dapm_nc_pin(dapm, "MONOOUT"); 84 snd_soc_dapm_nc_pin(dapm, "MONOOUT");
diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c
index c6bdc6c0eff6..21f340065318 100644
--- a/sound/soc/pxa/poodle.c
+++ b/sound/soc/pxa/poodle.c
@@ -230,7 +230,6 @@ static int poodle_wm8731_init(struct snd_soc_pcm_runtime *rtd)
230 230
231 snd_soc_dapm_nc_pin(dapm, "LLINEIN"); 231 snd_soc_dapm_nc_pin(dapm, "LLINEIN");
232 snd_soc_dapm_nc_pin(dapm, "RLINEIN"); 232 snd_soc_dapm_nc_pin(dapm, "RLINEIN");
233 snd_soc_dapm_enable_pin(dapm, "MICIN");
234 233
235 return 0; 234 return 0;
236} 235}
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index a3119a00d8fa..199a8b377553 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -34,8 +34,6 @@
34#include <sound/pxa2xx-lib.h> 34#include <sound/pxa2xx-lib.h>
35#include <sound/dmaengine_pcm.h> 35#include <sound/dmaengine_pcm.h>
36 36
37#include <mach/hardware.h>
38
39#include "../../arm/pxa2xx-pcm.h" 37#include "../../arm/pxa2xx-pcm.h"
40#include "pxa-ssp.h" 38#include "pxa-ssp.h"
41 39
@@ -810,6 +808,7 @@ static const struct snd_soc_component_driver pxa_ssp_component = {
810#ifdef CONFIG_OF 808#ifdef CONFIG_OF
811static const struct of_device_id pxa_ssp_of_ids[] = { 809static const struct of_device_id pxa_ssp_of_ids[] = {
812 { .compatible = "mrvl,pxa-ssp-dai" }, 810 { .compatible = "mrvl,pxa-ssp-dai" },
811 {}
813}; 812};
814#endif 813#endif
815 814
diff --git a/sound/soc/pxa/pxa2xx-pcm.c b/sound/soc/pxa/pxa2xx-pcm.c
index d58b09f4f7a4..42f2f0175981 100644
--- a/sound/soc/pxa/pxa2xx-pcm.c
+++ b/sound/soc/pxa/pxa2xx-pcm.c
@@ -15,6 +15,8 @@
15#include <linux/dmaengine.h> 15#include <linux/dmaengine.h>
16#include <linux/of.h> 16#include <linux/of.h>
17 17
18#include <mach/dma.h>
19
18#include <sound/core.h> 20#include <sound/core.h>
19#include <sound/soc.h> 21#include <sound/soc.h>
20#include <sound/pxa2xx-lib.h> 22#include <sound/pxa2xx-lib.h>
diff --git a/sound/soc/pxa/ttc-dkb.c b/sound/soc/pxa/ttc-dkb.c
index 0b535b570622..9d7c5b7e9539 100644
--- a/sound/soc/pxa/ttc-dkb.c
+++ b/sound/soc/pxa/ttc-dkb.c
@@ -78,10 +78,6 @@ static int ttc_pm860x_init(struct snd_soc_pcm_runtime *rtd)
78 struct snd_soc_codec *codec = rtd->codec; 78 struct snd_soc_codec *codec = rtd->codec;
79 struct snd_soc_dapm_context *dapm = &codec->dapm; 79 struct snd_soc_dapm_context *dapm = &codec->dapm;
80 80
81 /* connected pins */
82 snd_soc_dapm_enable_pin(dapm, "Ext Speaker");
83 snd_soc_dapm_enable_pin(dapm, "Ext Mic 1");
84 snd_soc_dapm_enable_pin(dapm, "Ext Mic 3");
85 snd_soc_dapm_disable_pin(dapm, "Headset Mic 2"); 81 snd_soc_dapm_disable_pin(dapm, "Headset Mic 2");
86 snd_soc_dapm_disable_pin(dapm, "Headset Stereophone"); 82 snd_soc_dapm_disable_pin(dapm, "Headset Stereophone");
87 83
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index 68c13bd07041..753b8c93ab51 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -206,7 +206,7 @@ config SND_SOC_SPEYSIDE
206 206
207config SND_SOC_TOBERMORY 207config SND_SOC_TOBERMORY
208 tristate "Audio support for Wolfson Tobermory" 208 tristate "Audio support for Wolfson Tobermory"
209 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 209 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 && INPUT
210 select SND_SAMSUNG_I2S 210 select SND_SAMSUNG_I2S
211 select SND_SOC_WM8962 211 select SND_SOC_WM8962
212 212
diff --git a/sound/soc/samsung/h1940_uda1380.c b/sound/soc/samsung/h1940_uda1380.c
index 88b09e022503..9f2fb69dbaae 100644
--- a/sound/soc/samsung/h1940_uda1380.c
+++ b/sound/soc/samsung/h1940_uda1380.c
@@ -176,11 +176,6 @@ static struct platform_device *s3c24xx_snd_device;
176static int h1940_uda1380_init(struct snd_soc_pcm_runtime *rtd) 176static int h1940_uda1380_init(struct snd_soc_pcm_runtime *rtd)
177{ 177{
178 struct snd_soc_codec *codec = rtd->codec; 178 struct snd_soc_codec *codec = rtd->codec;
179 struct snd_soc_dapm_context *dapm = &codec->dapm;
180
181 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
182 snd_soc_dapm_enable_pin(dapm, "Speaker");
183 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
184 179
185 snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE, 180 snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE,
186 &hp_jack); 181 &hp_jack);
diff --git a/sound/soc/samsung/rx1950_uda1380.c b/sound/soc/samsung/rx1950_uda1380.c
index 2982d9e7f268..5b3e504d3a32 100644
--- a/sound/soc/samsung/rx1950_uda1380.c
+++ b/sound/soc/samsung/rx1950_uda1380.c
@@ -221,11 +221,6 @@ static int rx1950_hw_params(struct snd_pcm_substream *substream,
221static int rx1950_uda1380_init(struct snd_soc_pcm_runtime *rtd) 221static int rx1950_uda1380_init(struct snd_soc_pcm_runtime *rtd)
222{ 222{
223 struct snd_soc_codec *codec = rtd->codec; 223 struct snd_soc_codec *codec = rtd->codec;
224 struct snd_soc_dapm_context *dapm = &codec->dapm;
225
226 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
227 snd_soc_dapm_enable_pin(dapm, "Speaker");
228 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
229 224
230 snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE, 225 snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE,
231 &hp_jack); 226 &hp_jack);
diff --git a/sound/soc/samsung/s3c24xx_simtec_hermes.c b/sound/soc/samsung/s3c24xx_simtec_hermes.c
index d8a0543cae5e..2d30b7b6818a 100644
--- a/sound/soc/samsung/s3c24xx_simtec_hermes.c
+++ b/sound/soc/samsung/s3c24xx_simtec_hermes.c
@@ -63,14 +63,6 @@ static const struct snd_soc_dapm_route base_map[] = {
63*/ 63*/
64static int simtec_hermes_init(struct snd_soc_pcm_runtime *rtd) 64static int simtec_hermes_init(struct snd_soc_pcm_runtime *rtd)
65{ 65{
66 struct snd_soc_codec *codec = rtd->codec;
67 struct snd_soc_dapm_context *dapm = &codec->dapm;
68
69 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
70 snd_soc_dapm_enable_pin(dapm, "Line In");
71 snd_soc_dapm_enable_pin(dapm, "Line Out");
72 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
73
74 simtec_audio_init(rtd); 66 simtec_audio_init(rtd);
75 67
76 return 0; 68 return 0;
diff --git a/sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c b/sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c
index 1ac0d7a63a3a..83f6c7d49cd6 100644
--- a/sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c
+++ b/sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c
@@ -52,14 +52,6 @@ static const struct snd_soc_dapm_route base_map[] = {
52*/ 52*/
53static int simtec_tlv320aic23_init(struct snd_soc_pcm_runtime *rtd) 53static int simtec_tlv320aic23_init(struct snd_soc_pcm_runtime *rtd)
54{ 54{
55 struct snd_soc_codec *codec = rtd->codec;
56 struct snd_soc_dapm_context *dapm = &codec->dapm;
57
58 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
59 snd_soc_dapm_enable_pin(dapm, "Line In");
60 snd_soc_dapm_enable_pin(dapm, "Line Out");
61 snd_soc_dapm_enable_pin(dapm, "Mic Jack");
62
63 simtec_audio_init(rtd); 55 simtec_audio_init(rtd);
64 56
65 return 0; 57 return 0;
diff --git a/sound/soc/samsung/smartq_wm8987.c b/sound/soc/samsung/smartq_wm8987.c
index c3b2adafb7b5..df55db5d3554 100644
--- a/sound/soc/samsung/smartq_wm8987.c
+++ b/sound/soc/samsung/smartq_wm8987.c
@@ -162,8 +162,6 @@ static int smartq_wm8987_init(struct snd_soc_pcm_runtime *rtd)
162 snd_soc_dapm_nc_pin(dapm, "ROUT1"); 162 snd_soc_dapm_nc_pin(dapm, "ROUT1");
163 163
164 /* set endpoints to default off mode */ 164 /* set endpoints to default off mode */
165 snd_soc_dapm_enable_pin(dapm, "Internal Speaker");
166 snd_soc_dapm_enable_pin(dapm, "Internal Mic");
167 snd_soc_dapm_disable_pin(dapm, "Headphone Jack"); 165 snd_soc_dapm_disable_pin(dapm, "Headphone Jack");
168 166
169 /* Headphone jack detection */ 167 /* Headphone jack detection */
diff --git a/sound/soc/samsung/smdk_wm8994.c b/sound/soc/samsung/smdk_wm8994.c
index 5b544dcf18b4..3d6272a8cad2 100644
--- a/sound/soc/samsung/smdk_wm8994.c
+++ b/sound/soc/samsung/smdk_wm8994.c
@@ -89,18 +89,6 @@ static int smdk_wm8994_init_paiftx(struct snd_soc_pcm_runtime *rtd)
89 struct snd_soc_codec *codec = rtd->codec; 89 struct snd_soc_codec *codec = rtd->codec;
90 struct snd_soc_dapm_context *dapm = &codec->dapm; 90 struct snd_soc_dapm_context *dapm = &codec->dapm;
91 91
92 /* HeadPhone */
93 snd_soc_dapm_enable_pin(dapm, "HPOUT1R");
94 snd_soc_dapm_enable_pin(dapm, "HPOUT1L");
95
96 /* MicIn */
97 snd_soc_dapm_enable_pin(dapm, "IN1LN");
98 snd_soc_dapm_enable_pin(dapm, "IN1RN");
99
100 /* LineIn */
101 snd_soc_dapm_enable_pin(dapm, "IN2LN");
102 snd_soc_dapm_enable_pin(dapm, "IN2RN");
103
104 /* Other pins NC */ 92 /* Other pins NC */
105 snd_soc_dapm_nc_pin(dapm, "HPOUT2P"); 93 snd_soc_dapm_nc_pin(dapm, "HPOUT2P");
106 snd_soc_dapm_nc_pin(dapm, "HPOUT2N"); 94 snd_soc_dapm_nc_pin(dapm, "HPOUT2N");
diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
index ff60e11ecb56..b43fdf0d08af 100644
--- a/sound/soc/sh/Kconfig
+++ b/sound/soc/sh/Kconfig
@@ -56,7 +56,7 @@ config SND_SH7760_AC97
56 56
57config SND_SIU_MIGOR 57config SND_SIU_MIGOR
58 tristate "SIU sound support on Migo-R" 58 tristate "SIU sound support on Migo-R"
59 depends on SH_MIGOR 59 depends on SH_MIGOR && I2C
60 select SND_SOC_SH4_SIU 60 select SND_SOC_SH4_SIU
61 select SND_SOC_WM8978 61 select SND_SOC_WM8978
62 help 62 help
diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
index 7d0051ced838..9ac536429800 100644
--- a/sound/soc/sh/rcar/Makefile
+++ b/sound/soc/sh/rcar/Makefile
@@ -1,2 +1,2 @@
1snd-soc-rcar-objs := core.o gen.o src.o adg.o ssi.o 1snd-soc-rcar-objs := core.o gen.o src.o adg.o ssi.o dvc.o
2obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o \ No newline at end of file 2obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o \ No newline at end of file
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
index 69c44269ebdb..fc41a0e8b09f 100644
--- a/sound/soc/sh/rcar/adg.c
+++ b/sound/soc/sh/rcar/adg.c
@@ -57,6 +57,24 @@ static u32 rsnd_adg_ssi_ws_timing_gen2(struct rsnd_dai_stream *io)
57 return (0x6 + ws) << 8; 57 return (0x6 + ws) << 8;
58} 58}
59 59
60int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_dai *rdai,
61 struct rsnd_mod *mod,
62 struct rsnd_dai_stream *io)
63{
64 int id = rsnd_mod_id(mod);
65 int shift = (id % 2) ? 16 : 0;
66 u32 mask, val;
67
68 val = rsnd_adg_ssi_ws_timing_gen2(io);
69
70 val = val << shift;
71 mask = 0xffff << shift;
72
73 rsnd_mod_bset(mod, CMDOUT_TIMSEL, mask, val);
74
75 return 0;
76}
77
60static int rsnd_adg_set_src_timsel_gen2(struct rsnd_dai *rdai, 78static int rsnd_adg_set_src_timsel_gen2(struct rsnd_dai *rdai,
61 struct rsnd_mod *mod, 79 struct rsnd_mod *mod,
62 struct rsnd_dai_stream *io, 80 struct rsnd_dai_stream *io,
@@ -397,9 +415,8 @@ int rsnd_adg_probe(struct platform_device *pdev,
397{ 415{
398 struct rsnd_adg *adg; 416 struct rsnd_adg *adg;
399 struct device *dev = rsnd_priv_to_dev(priv); 417 struct device *dev = rsnd_priv_to_dev(priv);
400 struct clk *clk, *clk_orig; 418 struct clk *clk;
401 int i; 419 int i;
402 bool use_old_style = false;
403 420
404 adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL); 421 adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL);
405 if (!adg) { 422 if (!adg) {
@@ -407,45 +424,13 @@ int rsnd_adg_probe(struct platform_device *pdev,
407 return -ENOMEM; 424 return -ENOMEM;
408 } 425 }
409 426
410 clk_orig = devm_clk_get(dev, NULL);
411 adg->clk[CLKA] = devm_clk_get(dev, "clk_a"); 427 adg->clk[CLKA] = devm_clk_get(dev, "clk_a");
412 adg->clk[CLKB] = devm_clk_get(dev, "clk_b"); 428 adg->clk[CLKB] = devm_clk_get(dev, "clk_b");
413 adg->clk[CLKC] = devm_clk_get(dev, "clk_c"); 429 adg->clk[CLKC] = devm_clk_get(dev, "clk_c");
414 adg->clk[CLKI] = devm_clk_get(dev, "clk_i"); 430 adg->clk[CLKI] = devm_clk_get(dev, "clk_i");
415 431
416 /* 432 for_each_rsnd_clk(clk, adg, i)
417 * It request device dependent audio clock. 433 dev_dbg(dev, "clk %d : %p\n", i, clk);
418 * But above all clks will indicate rsnd module clock
419 * if platform doesn't it
420 */
421 for_each_rsnd_clk(clk, adg, i) {
422 if (clk_orig == clk) {
423 dev_warn(dev,
424 "doesn't have device dependent clock, use independent clock\n");
425 use_old_style = true;
426 break;
427 }
428 }
429
430 /*
431 * note:
432 * these exist in order to keep compatible with
433 * platform which has device independent audio clock,
434 * but will be removed soon
435 */
436 if (use_old_style) {
437 adg->clk[CLKA] = devm_clk_get(NULL, "audio_clk_a");
438 adg->clk[CLKB] = devm_clk_get(NULL, "audio_clk_b");
439 adg->clk[CLKC] = devm_clk_get(NULL, "audio_clk_c");
440 adg->clk[CLKI] = devm_clk_get(NULL, "audio_clk_internal");
441 }
442
443 for_each_rsnd_clk(clk, adg, i) {
444 if (IS_ERR(clk)) {
445 dev_err(dev, "Audio clock failed\n");
446 return -EIO;
447 }
448 }
449 434
450 rsnd_adg_ssi_clk_init(priv, adg); 435 rsnd_adg_ssi_clk_init(priv, adg);
451 436
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
index 215b668166be..91880156e1ae 100644
--- a/sound/soc/sh/rcar/core.c
+++ b/sound/soc/sh/rcar/core.c
@@ -197,13 +197,12 @@ static void rsnd_dma_complete(void *data)
197 * rsnd_dai_pointer_update() will be called twice, 197 * rsnd_dai_pointer_update() will be called twice,
198 * ant it will breaks io->byte_pos 198 * ant it will breaks io->byte_pos
199 */ 199 */
200
201 rsnd_dai_pointer_update(io, io->byte_per_period);
202
203 if (dma->submit_loop) 200 if (dma->submit_loop)
204 rsnd_dma_continue(dma); 201 rsnd_dma_continue(dma);
205 202
206 rsnd_unlock(priv, flags); 203 rsnd_unlock(priv, flags);
204
205 rsnd_dai_pointer_update(io, io->byte_per_period);
207} 206}
208 207
209static void __rsnd_dma_start(struct rsnd_dma *dma) 208static void __rsnd_dma_start(struct rsnd_dma *dma)
@@ -256,11 +255,81 @@ int rsnd_dma_available(struct rsnd_dma *dma)
256 return !!dma->chan; 255 return !!dma->chan;
257} 256}
258 257
258#define DMA_NAME_SIZE 16
259#define MOD_MAX 4 /* MEM/SSI/SRC/DVC */
260static int _rsnd_dma_of_name(char *dma_name, struct rsnd_mod *mod)
261{
262 if (mod)
263 return snprintf(dma_name, DMA_NAME_SIZE / 2, "%s%d",
264 rsnd_mod_name(mod), rsnd_mod_id(mod));
265 else
266 return snprintf(dma_name, DMA_NAME_SIZE / 2, "mem");
267
268}
269
270static void rsnd_dma_of_name(struct rsnd_dma *dma,
271 int is_play, char *dma_name)
272{
273 struct rsnd_mod *this = rsnd_dma_to_mod(dma);
274 struct rsnd_dai_stream *io = rsnd_mod_to_io(this);
275 struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io);
276 struct rsnd_mod *src = rsnd_io_to_mod_src(io);
277 struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io);
278 struct rsnd_mod *mod[MOD_MAX];
279 struct rsnd_mod *src_mod, *dst_mod;
280 int i, index;
281
282
283 for (i = 0; i < MOD_MAX; i++)
284 mod[i] = NULL;
285
286 /*
287 * in play case...
288 *
289 * src -> dst
290 *
291 * mem -> SSI
292 * mem -> SRC -> SSI
293 * mem -> SRC -> DVC -> SSI
294 */
295 mod[0] = NULL; /* for "mem" */
296 index = 1;
297 for (i = 1; i < MOD_MAX; i++) {
298 if (!src) {
299 mod[i] = ssi;
300 break;
301 } else if (!dvc) {
302 mod[i] = src;
303 src = NULL;
304 } else {
305 mod[i] = dvc;
306 dvc = NULL;
307 }
308
309 if (mod[i] == this)
310 index = i;
311 }
312
313 if (is_play) {
314 src_mod = mod[index - 1];
315 dst_mod = mod[index];
316 } else {
317 src_mod = mod[index];
318 dst_mod = mod[index + 1];
319 }
320
321 index = 0;
322 index = _rsnd_dma_of_name(dma_name + index, src_mod);
323 *(dma_name + index++) = '_';
324 index = _rsnd_dma_of_name(dma_name + index, dst_mod);
325}
326
259int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma, 327int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
260 int is_play, int id) 328 int is_play, int id)
261{ 329{
262 struct device *dev = rsnd_priv_to_dev(priv); 330 struct device *dev = rsnd_priv_to_dev(priv);
263 struct dma_slave_config cfg; 331 struct dma_slave_config cfg;
332 char dma_name[DMA_NAME_SIZE];
264 dma_cap_mask_t mask; 333 dma_cap_mask_t mask;
265 int ret; 334 int ret;
266 335
@@ -272,18 +341,23 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
272 dma_cap_zero(mask); 341 dma_cap_zero(mask);
273 dma_cap_set(DMA_SLAVE, mask); 342 dma_cap_set(DMA_SLAVE, mask);
274 343
344 if (dev->of_node)
345 rsnd_dma_of_name(dma, is_play, dma_name);
346 else
347 snprintf(dma_name, DMA_NAME_SIZE,
348 is_play ? "tx" : "rx");
349
350 dev_dbg(dev, "dma name : %s\n", dma_name);
351
275 dma->chan = dma_request_slave_channel_compat(mask, shdma_chan_filter, 352 dma->chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
276 (void *)id, dev, 353 (void *)id, dev,
277 is_play ? "tx" : "rx"); 354 dma_name);
278 if (!dma->chan) { 355 if (!dma->chan) {
279 dev_err(dev, "can't get dma channel\n"); 356 dev_err(dev, "can't get dma channel\n");
280 return -EIO; 357 return -EIO;
281 } 358 }
282 359
283 cfg.slave_id = id; 360 rsnd_gen_dma_addr(priv, dma, &cfg, is_play, id);
284 cfg.dst_addr = 0; /* use default addr when playback */
285 cfg.src_addr = 0; /* use default addr when capture */
286 cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
287 361
288 ret = dmaengine_slave_config(dma->chan, &cfg); 362 ret = dmaengine_slave_config(dma->chan, &cfg);
289 if (ret < 0) 363 if (ret < 0)
@@ -310,23 +384,49 @@ void rsnd_dma_quit(struct rsnd_priv *priv,
310} 384}
311 385
312/* 386/*
387 * settting function
388 */
389u32 rsnd_get_adinr(struct rsnd_mod *mod)
390{
391 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
392 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
393 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
394 struct device *dev = rsnd_priv_to_dev(priv);
395 u32 adinr = runtime->channels;
396
397 switch (runtime->sample_bits) {
398 case 16:
399 adinr |= (8 << 16);
400 break;
401 case 32:
402 adinr |= (0 << 16);
403 break;
404 default:
405 dev_warn(dev, "not supported sample bits\n");
406 return 0;
407 }
408
409 return adinr;
410}
411
412/*
313 * rsnd_dai functions 413 * rsnd_dai functions
314 */ 414 */
315#define __rsnd_mod_call(mod, func, rdai, io) \ 415#define __rsnd_mod_call(mod, func, rdai...) \
316({ \ 416({ \
317 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \ 417 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
318 struct device *dev = rsnd_priv_to_dev(priv); \ 418 struct device *dev = rsnd_priv_to_dev(priv); \
319 dev_dbg(dev, "%s [%d] %s\n", \ 419 dev_dbg(dev, "%s [%d] %s\n", \
320 rsnd_mod_name(mod), rsnd_mod_id(mod), #func); \ 420 rsnd_mod_name(mod), rsnd_mod_id(mod), #func); \
321 (mod)->ops->func(mod, rdai, io); \ 421 (mod)->ops->func(mod, rdai); \
322}) 422})
323 423
324#define rsnd_mod_call(mod, func, rdai, io) \ 424#define rsnd_mod_call(mod, func, rdai...) \
325 (!(mod) ? -ENODEV : \ 425 (!(mod) ? -ENODEV : \
326 !((mod)->ops->func) ? 0 : \ 426 !((mod)->ops->func) ? 0 : \
327 __rsnd_mod_call(mod, func, (rdai), (io))) 427 __rsnd_mod_call(mod, func, rdai))
328 428
329#define rsnd_dai_call(rdai, io, fn) \ 429#define rsnd_dai_call(fn, io, rdai...) \
330({ \ 430({ \
331 struct rsnd_mod *mod; \ 431 struct rsnd_mod *mod; \
332 int ret = 0, i; \ 432 int ret = 0, i; \
@@ -334,7 +434,7 @@ void rsnd_dma_quit(struct rsnd_priv *priv,
334 mod = (io)->mod[i]; \ 434 mod = (io)->mod[i]; \
335 if (!mod) \ 435 if (!mod) \
336 continue; \ 436 continue; \
337 ret = rsnd_mod_call(mod, fn, (rdai), (io)); \ 437 ret = rsnd_mod_call(mod, fn, rdai); \
338 if (ret < 0) \ 438 if (ret < 0) \
339 break; \ 439 break; \
340 } \ 440 } \
@@ -468,10 +568,7 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
468 struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai); 568 struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai);
469 struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai); 569 struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
470 struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream); 570 struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
471 struct rsnd_mod *mod = rsnd_ssi_mod_get_frm_dai(priv, 571 int ssi_id = rsnd_mod_id(rsnd_io_to_mod_ssi(io));
472 rsnd_dai_id(priv, rdai),
473 rsnd_dai_is_play(rdai, io));
474 int ssi_id = rsnd_mod_id(mod);
475 int ret; 572 int ret;
476 unsigned long flags; 573 unsigned long flags;
477 574
@@ -487,20 +584,20 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
487 if (ret < 0) 584 if (ret < 0)
488 goto dai_trigger_end; 585 goto dai_trigger_end;
489 586
490 ret = rsnd_dai_call(rdai, io, init); 587 ret = rsnd_dai_call(init, io, rdai);
491 if (ret < 0) 588 if (ret < 0)
492 goto dai_trigger_end; 589 goto dai_trigger_end;
493 590
494 ret = rsnd_dai_call(rdai, io, start); 591 ret = rsnd_dai_call(start, io, rdai);
495 if (ret < 0) 592 if (ret < 0)
496 goto dai_trigger_end; 593 goto dai_trigger_end;
497 break; 594 break;
498 case SNDRV_PCM_TRIGGER_STOP: 595 case SNDRV_PCM_TRIGGER_STOP:
499 ret = rsnd_dai_call(rdai, io, stop); 596 ret = rsnd_dai_call(stop, io, rdai);
500 if (ret < 0) 597 if (ret < 0)
501 goto dai_trigger_end; 598 goto dai_trigger_end;
502 599
503 ret = rsnd_dai_call(rdai, io, quit); 600 ret = rsnd_dai_call(quit, io, rdai);
504 if (ret < 0) 601 if (ret < 0)
505 goto dai_trigger_end; 602 goto dai_trigger_end;
506 603
@@ -579,15 +676,27 @@ static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
579 .set_fmt = rsnd_soc_dai_set_fmt, 676 .set_fmt = rsnd_soc_dai_set_fmt,
580}; 677};
581 678
679#define rsnd_path_parse(priv, io, type) \
680({ \
681 struct rsnd_mod *mod; \
682 int ret = 0; \
683 int id = -1; \
684 \
685 if (rsnd_is_enable_path(io, type)) { \
686 id = rsnd_info_id(priv, io, type); \
687 if (id >= 0) { \
688 mod = rsnd_##type##_mod_get(priv, id); \
689 ret = rsnd_dai_connect(mod, io); \
690 } \
691 } \
692 ret; \
693})
694
582static int rsnd_path_init(struct rsnd_priv *priv, 695static int rsnd_path_init(struct rsnd_priv *priv,
583 struct rsnd_dai *rdai, 696 struct rsnd_dai *rdai,
584 struct rsnd_dai_stream *io) 697 struct rsnd_dai_stream *io)
585{ 698{
586 struct rsnd_mod *mod;
587 struct rsnd_dai_platform_info *dai_info = rdai->info;
588 int ret; 699 int ret;
589 int ssi_id = -1;
590 int src_id = -1;
591 700
592 /* 701 /*
593 * Gen1 is created by SRU/SSI, and this SRU is base module of 702 * Gen1 is created by SRU/SSI, and this SRU is base module of
@@ -599,38 +708,21 @@ static int rsnd_path_init(struct rsnd_priv *priv,
599 * Gen2 SCU path is very flexible, but, Gen1 SRU (SCU parts) is 708 * Gen2 SCU path is very flexible, but, Gen1 SRU (SCU parts) is
600 * using fixed path. 709 * using fixed path.
601 */ 710 */
602 if (dai_info) {
603 if (rsnd_is_enable_path(io, ssi))
604 ssi_id = rsnd_info_id(priv, io, ssi);
605 if (rsnd_is_enable_path(io, src))
606 src_id = rsnd_info_id(priv, io, src);
607 } else {
608 /* get SSI's ID */
609 mod = rsnd_ssi_mod_get_frm_dai(priv,
610 rsnd_dai_id(priv, rdai),
611 rsnd_dai_is_play(rdai, io));
612 if (!mod)
613 return 0;
614 ssi_id = src_id = rsnd_mod_id(mod);
615 }
616
617 ret = 0;
618 711
619 /* SRC */ 712 /* SRC */
620 if (src_id >= 0) { 713 ret = rsnd_path_parse(priv, io, src);
621 mod = rsnd_src_mod_get(priv, src_id); 714 if (ret < 0)
622 ret = rsnd_dai_connect(mod, io); 715 return ret;
623 if (ret < 0)
624 return ret;
625 }
626 716
627 /* SSI */ 717 /* SSI */
628 if (ssi_id >= 0) { 718 ret = rsnd_path_parse(priv, io, ssi);
629 mod = rsnd_ssi_mod_get(priv, ssi_id); 719 if (ret < 0)
630 ret = rsnd_dai_connect(mod, io); 720 return ret;
631 if (ret < 0) 721
632 return ret; 722 /* DVC */
633 } 723 ret = rsnd_path_parse(priv, io, dvc);
724 if (ret < 0)
725 return ret;
634 726
635 return ret; 727 return ret;
636} 728}
@@ -726,30 +818,15 @@ static int rsnd_dai_probe(struct platform_device *pdev,
726 struct snd_soc_dai_driver *drv; 818 struct snd_soc_dai_driver *drv;
727 struct rcar_snd_info *info = rsnd_priv_to_info(priv); 819 struct rcar_snd_info *info = rsnd_priv_to_info(priv);
728 struct rsnd_dai *rdai; 820 struct rsnd_dai *rdai;
729 struct rsnd_mod *pmod, *cmod; 821 struct rsnd_ssi_platform_info *pmod, *cmod;
730 struct device *dev = rsnd_priv_to_dev(priv); 822 struct device *dev = rsnd_priv_to_dev(priv);
731 int dai_nr; 823 int dai_nr;
732 int i; 824 int i;
733 825
734 rsnd_of_parse_dai(pdev, of_data, priv); 826 rsnd_of_parse_dai(pdev, of_data, priv);
735 827
736 /*
737 * dai_nr should be set via dai_info_nr,
738 * but allow it to keeping compatible
739 */
740 dai_nr = info->dai_info_nr; 828 dai_nr = info->dai_info_nr;
741 if (!dai_nr) { 829 if (!dai_nr) {
742 /* get max dai nr */
743 for (dai_nr = 0; dai_nr < 32; dai_nr++) {
744 pmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 1);
745 cmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 0);
746
747 if (!pmod && !cmod)
748 break;
749 }
750 }
751
752 if (!dai_nr) {
753 dev_err(dev, "no dai\n"); 830 dev_err(dev, "no dai\n");
754 return -EIO; 831 return -EIO;
755 } 832 }
@@ -766,11 +843,10 @@ static int rsnd_dai_probe(struct platform_device *pdev,
766 priv->rdai = rdai; 843 priv->rdai = rdai;
767 844
768 for (i = 0; i < dai_nr; i++) { 845 for (i = 0; i < dai_nr; i++) {
769 if (info->dai_info) 846 rdai[i].info = &info->dai_info[i];
770 rdai[i].info = &info->dai_info[i];
771 847
772 pmod = rsnd_ssi_mod_get_frm_dai(priv, i, 1); 848 pmod = rdai[i].info->playback.ssi;
773 cmod = rsnd_ssi_mod_get_frm_dai(priv, i, 0); 849 cmod = rdai[i].info->capture.ssi;
774 850
775 /* 851 /*
776 * init rsnd_dai 852 * init rsnd_dai
@@ -788,8 +864,7 @@ static int rsnd_dai_probe(struct platform_device *pdev,
788 drv[i].playback.channels_min = 2; 864 drv[i].playback.channels_min = 2;
789 drv[i].playback.channels_max = 2; 865 drv[i].playback.channels_max = 2;
790 866
791 if (info->dai_info) 867 rdai[i].playback.info = &info->dai_info[i].playback;
792 rdai[i].playback.info = &info->dai_info[i].playback;
793 rsnd_path_init(priv, &rdai[i], &rdai[i].playback); 868 rsnd_path_init(priv, &rdai[i], &rdai[i].playback);
794 } 869 }
795 if (cmod) { 870 if (cmod) {
@@ -798,8 +873,7 @@ static int rsnd_dai_probe(struct platform_device *pdev,
798 drv[i].capture.channels_min = 2; 873 drv[i].capture.channels_min = 2;
799 drv[i].capture.channels_max = 2; 874 drv[i].capture.channels_max = 2;
800 875
801 if (info->dai_info) 876 rdai[i].capture.info = &info->dai_info[i].capture;
802 rdai[i].capture.info = &info->dai_info[i].capture;
803 rsnd_path_init(priv, &rdai[i], &rdai[i].capture); 877 rsnd_path_init(priv, &rdai[i], &rdai[i].capture);
804 } 878 }
805 879
@@ -874,6 +948,20 @@ static struct snd_pcm_ops rsnd_pcm_ops = {
874 948
875static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd) 949static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd)
876{ 950{
951 struct rsnd_priv *priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
952 struct rsnd_dai *rdai;
953 int i, ret;
954
955 for_each_rsnd_dai(rdai, priv, i) {
956 ret = rsnd_dai_call(pcm_new, &rdai->playback, rdai, rtd);
957 if (ret)
958 return ret;
959
960 ret = rsnd_dai_call(pcm_new, &rdai->capture, rdai, rtd);
961 if (ret)
962 return ret;
963 }
964
877 return snd_pcm_lib_preallocate_pages_for_all( 965 return snd_pcm_lib_preallocate_pages_for_all(
878 rtd->pcm, 966 rtd->pcm,
879 SNDRV_DMA_TYPE_DEV, 967 SNDRV_DMA_TYPE_DEV,
@@ -913,6 +1001,7 @@ static int rsnd_probe(struct platform_device *pdev)
913 rsnd_gen_probe, 1001 rsnd_gen_probe,
914 rsnd_ssi_probe, 1002 rsnd_ssi_probe,
915 rsnd_src_probe, 1003 rsnd_src_probe,
1004 rsnd_dvc_probe,
916 rsnd_adg_probe, 1005 rsnd_adg_probe,
917 rsnd_dai_probe, 1006 rsnd_dai_probe,
918 }; 1007 };
@@ -942,7 +1031,7 @@ static int rsnd_probe(struct platform_device *pdev)
942 return -ENODEV; 1031 return -ENODEV;
943 } 1032 }
944 1033
945 priv->dev = dev; 1034 priv->pdev = pdev;
946 priv->info = info; 1035 priv->info = info;
947 spin_lock_init(&priv->lock); 1036 spin_lock_init(&priv->lock);
948 1037
@@ -956,11 +1045,11 @@ static int rsnd_probe(struct platform_device *pdev)
956 } 1045 }
957 1046
958 for_each_rsnd_dai(rdai, priv, i) { 1047 for_each_rsnd_dai(rdai, priv, i) {
959 ret = rsnd_dai_call(rdai, &rdai->playback, probe); 1048 ret = rsnd_dai_call(probe, &rdai->playback, rdai);
960 if (ret) 1049 if (ret)
961 return ret; 1050 return ret;
962 1051
963 ret = rsnd_dai_call(rdai, &rdai->capture, probe); 1052 ret = rsnd_dai_call(probe, &rdai->capture, rdai);
964 if (ret) 1053 if (ret)
965 return ret; 1054 return ret;
966 } 1055 }
@@ -1003,11 +1092,11 @@ static int rsnd_remove(struct platform_device *pdev)
1003 pm_runtime_disable(&pdev->dev); 1092 pm_runtime_disable(&pdev->dev);
1004 1093
1005 for_each_rsnd_dai(rdai, priv, i) { 1094 for_each_rsnd_dai(rdai, priv, i) {
1006 ret = rsnd_dai_call(rdai, &rdai->playback, remove); 1095 ret = rsnd_dai_call(remove, &rdai->playback, rdai);
1007 if (ret) 1096 if (ret)
1008 return ret; 1097 return ret;
1009 1098
1010 ret = rsnd_dai_call(rdai, &rdai->capture, remove); 1099 ret = rsnd_dai_call(remove, &rdai->capture, rdai);
1011 if (ret) 1100 if (ret)
1012 return ret; 1101 return ret;
1013 } 1102 }
diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
new file mode 100644
index 000000000000..ed0007006899
--- /dev/null
+++ b/sound/soc/sh/rcar/dvc.c
@@ -0,0 +1,289 @@
1/*
2 * Renesas R-Car DVC support
3 *
4 * Copyright (C) 2014 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include "rsnd.h"
12
13#define RSND_DVC_NAME_SIZE 16
14#define RSND_DVC_VOLUME_MAX 100
15#define RSND_DVC_VOLUME_NUM 2
16
17#define DVC_NAME "dvc"
18
19struct rsnd_dvc {
20 struct rsnd_dvc_platform_info *info; /* rcar_snd.h */
21 struct rsnd_mod mod;
22 struct clk *clk;
23 long volume[RSND_DVC_VOLUME_NUM];
24};
25
26#define rsnd_mod_to_dvc(_mod) \
27 container_of((_mod), struct rsnd_dvc, mod)
28
29#define for_each_rsnd_dvc(pos, priv, i) \
30 for ((i) = 0; \
31 ((i) < rsnd_dvc_nr(priv)) && \
32 ((pos) = (struct rsnd_dvc *)(priv)->dvc + i); \
33 i++)
34
35static void rsnd_dvc_volume_update(struct rsnd_mod *mod)
36{
37 struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
38 u32 max = (0x00800000 - 1);
39 u32 vol[RSND_DVC_VOLUME_NUM];
40 int i;
41
42 for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
43 vol[i] = max / RSND_DVC_VOLUME_MAX * dvc->volume[i];
44
45 rsnd_mod_write(mod, DVC_VOL0R, vol[0]);
46 rsnd_mod_write(mod, DVC_VOL1R, vol[1]);
47}
48
49static int rsnd_dvc_probe_gen2(struct rsnd_mod *mod,
50 struct rsnd_dai *rdai)
51{
52 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
53 struct device *dev = rsnd_priv_to_dev(priv);
54
55 dev_dbg(dev, "%s (Gen2) is probed\n", rsnd_mod_name(mod));
56
57 return 0;
58}
59
60static int rsnd_dvc_init(struct rsnd_mod *dvc_mod,
61 struct rsnd_dai *rdai)
62{
63 struct rsnd_dvc *dvc = rsnd_mod_to_dvc(dvc_mod);
64 struct rsnd_dai_stream *io = rsnd_mod_to_io(dvc_mod);
65 struct rsnd_priv *priv = rsnd_mod_to_priv(dvc_mod);
66 struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
67 struct device *dev = rsnd_priv_to_dev(priv);
68 int dvc_id = rsnd_mod_id(dvc_mod);
69 int src_id = rsnd_mod_id(src_mod);
70 u32 route[] = {
71 [0] = 0x30000,
72 [1] = 0x30001,
73 [2] = 0x40000,
74 [3] = 0x10000,
75 [4] = 0x20000,
76 [5] = 0x40100
77 };
78
79 if (src_id >= ARRAY_SIZE(route)) {
80 dev_err(dev, "DVC%d isn't connected to SRC%d\n", dvc_id, src_id);
81 return -EINVAL;
82 }
83
84 clk_prepare_enable(dvc->clk);
85
86 /*
87 * fixme
88 * it doesn't support CTU/MIX
89 */
90 rsnd_mod_write(dvc_mod, CMD_ROUTE_SLCT, route[src_id]);
91
92 rsnd_mod_write(dvc_mod, DVC_SWRSR, 0);
93 rsnd_mod_write(dvc_mod, DVC_SWRSR, 1);
94
95 rsnd_mod_write(dvc_mod, DVC_DVUIR, 1);
96
97 rsnd_mod_write(dvc_mod, DVC_ADINR, rsnd_get_adinr(dvc_mod));
98
99 /* enable Volume */
100 rsnd_mod_write(dvc_mod, DVC_DVUCR, 0x100);
101
102 /* ch0/ch1 Volume */
103 rsnd_dvc_volume_update(dvc_mod);
104
105 rsnd_mod_write(dvc_mod, DVC_DVUIR, 0);
106
107 rsnd_mod_write(dvc_mod, DVC_DVUER, 1);
108
109 rsnd_adg_set_cmd_timsel_gen2(rdai, dvc_mod, io);
110
111 return 0;
112}
113
114static int rsnd_dvc_quit(struct rsnd_mod *mod,
115 struct rsnd_dai *rdai)
116{
117 struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
118
119 clk_disable_unprepare(dvc->clk);
120
121 return 0;
122}
123
124static int rsnd_dvc_start(struct rsnd_mod *mod,
125 struct rsnd_dai *rdai)
126{
127 rsnd_mod_write(mod, CMD_CTRL, 0x10);
128
129 return 0;
130}
131
132static int rsnd_dvc_stop(struct rsnd_mod *mod,
133 struct rsnd_dai *rdai)
134{
135 rsnd_mod_write(mod, CMD_CTRL, 0);
136
137 return 0;
138}
139
140static int rsnd_dvc_volume_info(struct snd_kcontrol *kctrl,
141 struct snd_ctl_elem_info *uinfo)
142{
143 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
144 uinfo->count = RSND_DVC_VOLUME_NUM;
145 uinfo->value.integer.min = 0;
146 uinfo->value.integer.max = RSND_DVC_VOLUME_MAX;
147
148 return 0;
149}
150
151static int rsnd_dvc_volume_get(struct snd_kcontrol *kctrl,
152 struct snd_ctl_elem_value *ucontrol)
153{
154 struct rsnd_mod *mod = snd_kcontrol_chip(kctrl);
155 struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
156 int i;
157
158 for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
159 ucontrol->value.integer.value[i] = dvc->volume[i];
160
161 return 0;
162}
163
164static int rsnd_dvc_volume_put(struct snd_kcontrol *kctrl,
165 struct snd_ctl_elem_value *ucontrol)
166{
167 struct rsnd_mod *mod = snd_kcontrol_chip(kctrl);
168 struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
169 int i, change = 0;
170
171 for (i = 0; i < RSND_DVC_VOLUME_NUM; i++) {
172 if (ucontrol->value.integer.value[i] < 0 ||
173 ucontrol->value.integer.value[i] > RSND_DVC_VOLUME_MAX)
174 return -EINVAL;
175
176 change |= (ucontrol->value.integer.value[i] != dvc->volume[i]);
177 }
178
179 if (change) {
180 for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
181 dvc->volume[i] = ucontrol->value.integer.value[i];
182
183 rsnd_dvc_volume_update(mod);
184 }
185
186 return change;
187}
188
189static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
190 struct rsnd_dai *rdai,
191 struct snd_soc_pcm_runtime *rtd)
192{
193 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
194 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
195 struct device *dev = rsnd_priv_to_dev(priv);
196 struct snd_card *card = rtd->card->snd_card;
197 struct snd_kcontrol *kctrl;
198 static struct snd_kcontrol_new knew = {
199 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
200 .name = "Playback Volume",
201 .info = rsnd_dvc_volume_info,
202 .get = rsnd_dvc_volume_get,
203 .put = rsnd_dvc_volume_put,
204 };
205 int ret;
206
207 if (!rsnd_dai_is_play(rdai, io)) {
208 dev_err(dev, "DVC%d is connected to Capture DAI\n",
209 rsnd_mod_id(mod));
210 return -EINVAL;
211 }
212
213 kctrl = snd_ctl_new1(&knew, mod);
214 if (!kctrl)
215 return -ENOMEM;
216
217 ret = snd_ctl_add(card, kctrl);
218 if (ret < 0)
219 return ret;
220
221 return 0;
222}
223
224static struct rsnd_mod_ops rsnd_dvc_ops = {
225 .name = DVC_NAME,
226 .probe = rsnd_dvc_probe_gen2,
227 .init = rsnd_dvc_init,
228 .quit = rsnd_dvc_quit,
229 .start = rsnd_dvc_start,
230 .stop = rsnd_dvc_stop,
231 .pcm_new = rsnd_dvc_pcm_new,
232};
233
234struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id)
235{
236 if (WARN_ON(id < 0 || id >= rsnd_dvc_nr(priv)))
237 id = 0;
238
239 return &((struct rsnd_dvc *)(priv->dvc) + id)->mod;
240}
241
242int rsnd_dvc_probe(struct platform_device *pdev,
243 const struct rsnd_of_data *of_data,
244 struct rsnd_priv *priv)
245{
246 struct rcar_snd_info *info = rsnd_priv_to_info(priv);
247 struct device *dev = rsnd_priv_to_dev(priv);
248 struct rsnd_dvc *dvc;
249 struct clk *clk;
250 char name[RSND_DVC_NAME_SIZE];
251 int i, nr;
252
253 nr = info->dvc_info_nr;
254 if (!nr)
255 return 0;
256
257 /* This driver doesn't support Gen1 at this point */
258 if (rsnd_is_gen1(priv)) {
259 dev_warn(dev, "CMD is not supported on Gen1\n");
260 return -EINVAL;
261 }
262
263 dvc = devm_kzalloc(dev, sizeof(*dvc) * nr, GFP_KERNEL);
264 if (!dvc) {
265 dev_err(dev, "CMD allocate failed\n");
266 return -ENOMEM;
267 }
268
269 priv->dvc_nr = nr;
270 priv->dvc = dvc;
271
272 for_each_rsnd_dvc(dvc, priv, i) {
273 snprintf(name, RSND_DVC_NAME_SIZE, "%s.%d",
274 DVC_NAME, i);
275
276 clk = devm_clk_get(dev, name);
277 if (IS_ERR(clk))
278 return PTR_ERR(clk);
279
280 dvc->info = &info->dvc_info[i];
281 dvc->clk = clk;
282
283 rsnd_mod_init(priv, &dvc->mod, &rsnd_dvc_ops, RSND_MOD_DVC, i);
284
285 dev_dbg(dev, "CMD%d probed\n", i);
286 }
287
288 return 0;
289}
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
index 50a1ef3eb1c6..1dd2b7d38c2c 100644
--- a/sound/soc/sh/rcar/gen.c
+++ b/sound/soc/sh/rcar/gen.c
@@ -156,6 +156,101 @@ static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
156} 156}
157 157
158/* 158/*
159 * DMA read/write register offset
160 *
161 * RSND_xxx_I_N for Audio DMAC input
162 * RSND_xxx_O_N for Audio DMAC output
163 * RSND_xxx_I_P for Audio DMAC peri peri input
164 * RSND_xxx_O_P for Audio DMAC peri peri output
165 *
166 * ex) R-Car H2 case
167 * mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out
168 * SSI : 0xec541000 / 0xec241008 / 0xec24100c / 0xec400000 / 0xec400000
169 * SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000
170 * CMD : 0xec500000 / 0xec008000 0xec308000
171 */
172#define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8)
173#define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc)
174
175#define RDMA_SSI_I_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
176#define RDMA_SSI_O_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
177
178#define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i))
179#define RDMA_SRC_O_N(addr, i) (addr ##_reg - 0x004fc000 + (0x400 * i))
180
181#define RDMA_SRC_I_P(addr, i) (addr ##_reg - 0x00200000 + (0x400 * i))
182#define RDMA_SRC_O_P(addr, i) (addr ##_reg - 0x001fc000 + (0x400 * i))
183
184#define RDMA_CMD_O_N(addr, i) (addr ##_reg - 0x004f8000 + (0x400 * i))
185#define RDMA_CMD_O_P(addr, i) (addr ##_reg - 0x001f8000 + (0x400 * i))
186
187void rsnd_gen_dma_addr(struct rsnd_priv *priv,
188 struct rsnd_dma *dma,
189 struct dma_slave_config *cfg,
190 int is_play, int slave_id)
191{
192 struct platform_device *pdev = rsnd_priv_to_pdev(priv);
193 struct device *dev = rsnd_priv_to_dev(priv);
194 struct rsnd_mod *mod = rsnd_dma_to_mod(dma);
195 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
196 dma_addr_t ssi_reg = platform_get_resource(pdev,
197 IORESOURCE_MEM, RSND_GEN2_SSI)->start;
198 dma_addr_t src_reg = platform_get_resource(pdev,
199 IORESOURCE_MEM, RSND_GEN2_SCU)->start;
200 int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod);
201 int use_src = !!rsnd_io_to_mod_src(io);
202 int use_dvc = !!rsnd_io_to_mod_dvc(io);
203 int id = rsnd_mod_id(mod);
204 struct dma_addr {
205 dma_addr_t src_addr;
206 dma_addr_t dst_addr;
207 } dma_addrs[2][2][3] = {
208 { /* SRC */
209 /* Capture */
210 {{ 0, 0 },
211 { RDMA_SRC_O_N(src, id), 0 },
212 { RDMA_CMD_O_N(src, id), 0 }},
213 /* Playback */
214 {{ 0, 0, },
215 { 0, RDMA_SRC_I_N(src, id) },
216 { 0, RDMA_SRC_I_N(src, id) }}
217 }, { /* SSI */
218 /* Capture */
219 {{ RDMA_SSI_O_N(ssi, id), 0 },
220 { RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) },
221 { RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) }},
222 /* Playback */
223 {{ 0, RDMA_SSI_I_N(ssi, id) },
224 { RDMA_SRC_O_P(src, id), RDMA_SSI_I_P(ssi, id) },
225 { RDMA_CMD_O_P(src, id), RDMA_SSI_I_P(ssi, id) }}
226 }
227 };
228
229 cfg->slave_id = slave_id;
230 cfg->src_addr = 0;
231 cfg->dst_addr = 0;
232 cfg->direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
233
234 /*
235 * gen1 uses default DMA addr
236 */
237 if (rsnd_is_gen1(priv))
238 return;
239
240 /* it shouldn't happen */
241 if (use_dvc & !use_src) {
242 dev_err(dev, "DVC is selected without SRC\n");
243 return;
244 }
245
246 cfg->src_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].src_addr;
247 cfg->dst_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].dst_addr;
248
249 dev_dbg(dev, "dma%d addr - src : %x / dst : %x\n",
250 id, cfg->src_addr, cfg->dst_addr);
251}
252
253/*
159 * Gen2 254 * Gen2
160 */ 255 */
161 256
@@ -181,6 +276,8 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
181 RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20), 276 RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
182 RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20), 277 RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
183 RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20), 278 RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
279 RSND_GEN2_M_REG(gen, SCU, CMD_ROUTE_SLCT, 0x18c, 0x20),
280 RSND_GEN2_M_REG(gen, SCU, CMD_CTRL, 0x190, 0x20),
184 RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40), 281 RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
185 RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40), 282 RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
186 RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40), 283 RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
@@ -189,6 +286,14 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
189 RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40), 286 RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
190 RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40), 287 RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
191 RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40), 288 RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
289 RSND_GEN2_M_REG(gen, SCU, DVC_SWRSR, 0xe00, 0x100),
290 RSND_GEN2_M_REG(gen, SCU, DVC_DVUIR, 0xe04, 0x100),
291 RSND_GEN2_M_REG(gen, SCU, DVC_ADINR, 0xe08, 0x100),
292 RSND_GEN2_M_REG(gen, SCU, DVC_DVUCR, 0xe10, 0x100),
293 RSND_GEN2_M_REG(gen, SCU, DVC_ZCMCR, 0xe14, 0x100),
294 RSND_GEN2_M_REG(gen, SCU, DVC_VOL0R, 0xe28, 0x100),
295 RSND_GEN2_M_REG(gen, SCU, DVC_VOL1R, 0xe2c, 0x100),
296 RSND_GEN2_M_REG(gen, SCU, DVC_DVUER, 0xe48, 0x100),
192 297
193 RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00), 298 RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
194 RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04), 299 RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
@@ -207,6 +312,7 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
207 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50), 312 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
208 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54), 313 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
209 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58), 314 RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
315 RSND_GEN2_S_REG(gen, ADG, CMDOUT_TIMSEL, 0x5c),
210 316
211 RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40), 317 RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
212 RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40), 318 RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
@@ -252,13 +358,13 @@ static int rsnd_gen2_probe(struct platform_device *pdev,
252 return ret; 358 return ret;
253 359
254 dev_dbg(dev, "Gen2 device probed\n"); 360 dev_dbg(dev, "Gen2 device probed\n");
255 dev_dbg(dev, "SCU : %08x => %p\n", scu_res->start, 361 dev_dbg(dev, "SCU : %pap => %p\n", &scu_res->start,
256 gen->base[RSND_GEN2_SCU]); 362 gen->base[RSND_GEN2_SCU]);
257 dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start, 363 dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
258 gen->base[RSND_GEN2_ADG]); 364 gen->base[RSND_GEN2_ADG]);
259 dev_dbg(dev, "SSIU : %08x => %p\n", ssiu_res->start, 365 dev_dbg(dev, "SSIU : %pap => %p\n", &ssiu_res->start,
260 gen->base[RSND_GEN2_SSIU]); 366 gen->base[RSND_GEN2_SSIU]);
261 dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start, 367 dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
262 gen->base[RSND_GEN2_SSI]); 368 gen->base[RSND_GEN2_SSI]);
263 369
264 return 0; 370 return 0;
@@ -345,11 +451,11 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
345 return ret; 451 return ret;
346 452
347 dev_dbg(dev, "Gen1 device probed\n"); 453 dev_dbg(dev, "Gen1 device probed\n");
348 dev_dbg(dev, "SRU : %08x => %p\n", sru_res->start, 454 dev_dbg(dev, "SRU : %pap => %p\n", &sru_res->start,
349 gen->base[RSND_GEN1_SRU]); 455 gen->base[RSND_GEN1_SRU]);
350 dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start, 456 dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
351 gen->base[RSND_GEN1_ADG]); 457 gen->base[RSND_GEN1_ADG]);
352 dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start, 458 dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
353 gen->base[RSND_GEN1_SSI]); 459 gen->base[RSND_GEN1_SSI]);
354 460
355 return 0; 461 return 0;
diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
index 619d198c7d2e..39d98af5ee05 100644
--- a/sound/soc/sh/rcar/rsnd.h
+++ b/sound/soc/sh/rcar/rsnd.h
@@ -44,6 +44,15 @@ enum rsnd_reg {
44 RSND_REG_SRC_IFSCR, 44 RSND_REG_SRC_IFSCR,
45 RSND_REG_SRC_IFSVR, 45 RSND_REG_SRC_IFSVR,
46 RSND_REG_SRC_SRCCR, 46 RSND_REG_SRC_SRCCR,
47 RSND_REG_CMD_ROUTE_SLCT,
48 RSND_REG_DVC_SWRSR,
49 RSND_REG_DVC_DVUIR,
50 RSND_REG_DVC_ADINR,
51 RSND_REG_DVC_DVUCR,
52 RSND_REG_DVC_ZCMCR,
53 RSND_REG_DVC_VOL0R,
54 RSND_REG_DVC_VOL1R,
55 RSND_REG_DVC_DVUER,
47 56
48 /* ADG */ 57 /* ADG */
49 RSND_REG_BRRA, 58 RSND_REG_BRRA,
@@ -79,6 +88,8 @@ enum rsnd_reg {
79 RSND_REG_SHARE17, 88 RSND_REG_SHARE17,
80 RSND_REG_SHARE18, 89 RSND_REG_SHARE18,
81 RSND_REG_SHARE19, 90 RSND_REG_SHARE19,
91 RSND_REG_SHARE20,
92 RSND_REG_SHARE21,
82 93
83 RSND_REG_MAX, 94 RSND_REG_MAX,
84}; 95};
@@ -114,6 +125,8 @@ enum rsnd_reg {
114#define RSND_REG_SRCOUT_TIMSEL3 RSND_REG_SHARE17 125#define RSND_REG_SRCOUT_TIMSEL3 RSND_REG_SHARE17
115#define RSND_REG_SRCOUT_TIMSEL4 RSND_REG_SHARE18 126#define RSND_REG_SRCOUT_TIMSEL4 RSND_REG_SHARE18
116#define RSND_REG_AUDIO_CLK_SEL2 RSND_REG_SHARE19 127#define RSND_REG_AUDIO_CLK_SEL2 RSND_REG_SHARE19
128#define RSND_REG_CMD_CTRL RSND_REG_SHARE20
129#define RSND_REG_CMDOUT_TIMSEL RSND_REG_SHARE21
117 130
118struct rsnd_of_data; 131struct rsnd_of_data;
119struct rsnd_priv; 132struct rsnd_priv;
@@ -136,6 +149,7 @@ void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod,
136 enum rsnd_reg reg, u32 data); 149 enum rsnd_reg reg, u32 data);
137void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg, 150void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
138 u32 mask, u32 data); 151 u32 mask, u32 data);
152u32 rsnd_get_adinr(struct rsnd_mod *mod);
139 153
140/* 154/*
141 * R-Car DMA 155 * R-Car DMA
@@ -165,29 +179,27 @@ void rsnd_dma_quit(struct rsnd_priv *priv,
165enum rsnd_mod_type { 179enum rsnd_mod_type {
166 RSND_MOD_SRC = 0, 180 RSND_MOD_SRC = 0,
167 RSND_MOD_SSI, 181 RSND_MOD_SSI,
182 RSND_MOD_DVC,
168 RSND_MOD_MAX, 183 RSND_MOD_MAX,
169}; 184};
170 185
171struct rsnd_mod_ops { 186struct rsnd_mod_ops {
172 char *name; 187 char *name;
173 int (*probe)(struct rsnd_mod *mod, 188 int (*probe)(struct rsnd_mod *mod,
174 struct rsnd_dai *rdai, 189 struct rsnd_dai *rdai);
175 struct rsnd_dai_stream *io);
176 int (*remove)(struct rsnd_mod *mod, 190 int (*remove)(struct rsnd_mod *mod,
177 struct rsnd_dai *rdai, 191 struct rsnd_dai *rdai);
178 struct rsnd_dai_stream *io);
179 int (*init)(struct rsnd_mod *mod, 192 int (*init)(struct rsnd_mod *mod,
180 struct rsnd_dai *rdai, 193 struct rsnd_dai *rdai);
181 struct rsnd_dai_stream *io);
182 int (*quit)(struct rsnd_mod *mod, 194 int (*quit)(struct rsnd_mod *mod,
183 struct rsnd_dai *rdai, 195 struct rsnd_dai *rdai);
184 struct rsnd_dai_stream *io);
185 int (*start)(struct rsnd_mod *mod, 196 int (*start)(struct rsnd_mod *mod,
186 struct rsnd_dai *rdai, 197 struct rsnd_dai *rdai);
187 struct rsnd_dai_stream *io);
188 int (*stop)(struct rsnd_mod *mod, 198 int (*stop)(struct rsnd_mod *mod,
189 struct rsnd_dai *rdai, 199 struct rsnd_dai *rdai);
190 struct rsnd_dai_stream *io); 200 int (*pcm_new)(struct rsnd_mod *mod,
201 struct rsnd_dai *rdai,
202 struct snd_soc_pcm_runtime *rtd);
191}; 203};
192 204
193struct rsnd_dai_stream; 205struct rsnd_dai_stream;
@@ -228,6 +240,7 @@ struct rsnd_dai_stream {
228}; 240};
229#define rsnd_io_to_mod_ssi(io) ((io)->mod[RSND_MOD_SSI]) 241#define rsnd_io_to_mod_ssi(io) ((io)->mod[RSND_MOD_SSI])
230#define rsnd_io_to_mod_src(io) ((io)->mod[RSND_MOD_SRC]) 242#define rsnd_io_to_mod_src(io) ((io)->mod[RSND_MOD_SRC])
243#define rsnd_io_to_mod_dvc(io) ((io)->mod[RSND_MOD_DVC])
231 244
232struct rsnd_dai { 245struct rsnd_dai {
233 char name[RSND_DAI_NAME_SIZE]; 246 char name[RSND_DAI_NAME_SIZE];
@@ -268,6 +281,11 @@ int rsnd_gen_probe(struct platform_device *pdev,
268void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv, 281void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
269 struct rsnd_mod *mod, 282 struct rsnd_mod *mod,
270 enum rsnd_reg reg); 283 enum rsnd_reg reg);
284void rsnd_gen_dma_addr(struct rsnd_priv *priv,
285 struct rsnd_dma *dma,
286 struct dma_slave_config *cfg,
287 int is_play, int slave_id);
288
271#define rsnd_is_gen1(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN1) 289#define rsnd_is_gen1(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN1)
272#define rsnd_is_gen2(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN2) 290#define rsnd_is_gen2(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN2)
273 291
@@ -291,6 +309,9 @@ int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *mod,
291int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod, 309int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod,
292 struct rsnd_dai *rdai, 310 struct rsnd_dai *rdai,
293 struct rsnd_dai_stream *io); 311 struct rsnd_dai_stream *io);
312int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_dai *rdai,
313 struct rsnd_mod *mod,
314 struct rsnd_dai_stream *io);
294 315
295/* 316/*
296 * R-Car sound priv 317 * R-Car sound priv
@@ -301,7 +322,7 @@ struct rsnd_of_data {
301 322
302struct rsnd_priv { 323struct rsnd_priv {
303 324
304 struct device *dev; 325 struct platform_device *pdev;
305 struct rcar_snd_info *info; 326 struct rcar_snd_info *info;
306 spinlock_t lock; 327 spinlock_t lock;
307 328
@@ -328,6 +349,12 @@ struct rsnd_priv {
328 int ssi_nr; 349 int ssi_nr;
329 350
330 /* 351 /*
352 * below value will be filled on rsnd_dvc_probe()
353 */
354 void *dvc;
355 int dvc_nr;
356
357 /*
331 * below value will be filled on rsnd_dai_probe() 358 * below value will be filled on rsnd_dai_probe()
332 */ 359 */
333 struct snd_soc_dai_driver *daidrv; 360 struct snd_soc_dai_driver *daidrv;
@@ -335,7 +362,8 @@ struct rsnd_priv {
335 int rdai_nr; 362 int rdai_nr;
336}; 363};
337 364
338#define rsnd_priv_to_dev(priv) ((priv)->dev) 365#define rsnd_priv_to_pdev(priv) ((priv)->pdev)
366#define rsnd_priv_to_dev(priv) (&(rsnd_priv_to_pdev(priv)->dev))
339#define rsnd_priv_to_info(priv) ((priv)->info) 367#define rsnd_priv_to_info(priv) ((priv)->info)
340#define rsnd_lock(priv, flags) spin_lock_irqsave(&priv->lock, flags) 368#define rsnd_lock(priv, flags) spin_lock_irqsave(&priv->lock, flags)
341#define rsnd_unlock(priv, flags) spin_unlock_irqrestore(&priv->lock, flags) 369#define rsnd_unlock(priv, flags) spin_unlock_irqrestore(&priv->lock, flags)
@@ -364,11 +392,9 @@ unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv,
364 struct rsnd_dai_stream *io, 392 struct rsnd_dai_stream *io,
365 struct snd_pcm_runtime *runtime); 393 struct snd_pcm_runtime *runtime);
366int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod, 394int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
367 struct rsnd_dai *rdai, 395 struct rsnd_dai *rdai);
368 struct rsnd_dai_stream *io);
369int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod, 396int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod,
370 struct rsnd_dai *rdai, 397 struct rsnd_dai *rdai);
371 struct rsnd_dai_stream *io);
372 398
373#define rsnd_src_nr(priv) ((priv)->src_nr) 399#define rsnd_src_nr(priv) ((priv)->src_nr)
374 400
@@ -379,9 +405,19 @@ int rsnd_ssi_probe(struct platform_device *pdev,
379 const struct rsnd_of_data *of_data, 405 const struct rsnd_of_data *of_data,
380 struct rsnd_priv *priv); 406 struct rsnd_priv *priv);
381struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id); 407struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
382struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
383 int dai_id, int is_play);
384int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod); 408int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
385int rsnd_ssi_is_play(struct rsnd_mod *mod); 409
410/*
411 * R-Car DVC
412 */
413int rsnd_dvc_probe(struct platform_device *pdev,
414 const struct rsnd_of_data *of_data,
415 struct rsnd_priv *priv);
416void rsnd_dvc_remove(struct platform_device *pdev,
417 struct rsnd_priv *priv);
418struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id);
419
420#define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
421
386 422
387#endif 423#endif
diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
index 6232b7d307aa..200eda019bc7 100644
--- a/sound/soc/sh/rcar/src.c
+++ b/sound/soc/sh/rcar/src.c
@@ -10,6 +10,8 @@
10 */ 10 */
11#include "rsnd.h" 11#include "rsnd.h"
12 12
13#define SRC_NAME "src"
14
13struct rsnd_src { 15struct rsnd_src {
14 struct rsnd_src_platform_info *info; /* rcar_snd.h */ 16 struct rsnd_src_platform_info *info; /* rcar_snd.h */
15 struct rsnd_mod mod; 17 struct rsnd_mod mod;
@@ -18,21 +20,9 @@ struct rsnd_src {
18 20
19#define RSND_SRC_NAME_SIZE 16 21#define RSND_SRC_NAME_SIZE 16
20 22
21/*
22 * ADINR
23 */
24#define OTBL_24 (0 << 16)
25#define OTBL_22 (2 << 16)
26#define OTBL_20 (4 << 16)
27#define OTBL_18 (6 << 16)
28#define OTBL_16 (8 << 16)
29
30#define rsnd_src_mode_flags(p) ((p)->info->flags)
31#define rsnd_src_convert_rate(p) ((p)->info->convert_rate) 23#define rsnd_src_convert_rate(p) ((p)->info->convert_rate)
32#define rsnd_mod_to_src(_mod) \ 24#define rsnd_mod_to_src(_mod) \
33 container_of((_mod), struct rsnd_src, mod) 25 container_of((_mod), struct rsnd_src, mod)
34#define rsnd_src_hpbif_is_enable(src) \
35 (rsnd_src_mode_flags(src) & RSND_SCU_USE_HPBIF)
36#define rsnd_src_dma_available(src) \ 26#define rsnd_src_dma_available(src) \
37 rsnd_dma_available(rsnd_mod_to_dma(&(src)->mod)) 27 rsnd_dma_available(rsnd_mod_to_dma(&(src)->mod))
38 28
@@ -80,34 +70,35 @@ struct rsnd_src {
80 * 70 *
81 * This driver request 71 * This driver request
82 * struct rsnd_src_platform_info { 72 * struct rsnd_src_platform_info {
83 * u32 flags;
84 * u32 convert_rate; 73 * u32 convert_rate;
74 * int dma_id;
85 * } 75 * }
86 * 76 *
87 * rsnd_src_hpbif_is_enable() will be true
88 * if flags had RSND_SRC_USE_HPBIF,
89 * and it controls whether SSIU is used or not.
90 *
91 * rsnd_src_convert_rate() indicates 77 * rsnd_src_convert_rate() indicates
92 * above convert_rate, and it controls 78 * above convert_rate, and it controls
93 * whether SRC is used or not. 79 * whether SRC is used or not.
94 * 80 *
95 * ex) doesn't use SRC 81 * ex) doesn't use SRC
96 * struct rsnd_src_platform_info info = { 82 * static struct rsnd_dai_platform_info rsnd_dai = {
97 * .flags = 0, 83 * .playback = { .ssi = &rsnd_ssi[0], },
98 * .convert_rate = 0,
99 * }; 84 * };
100 * 85 *
101 * ex) uses SRC 86 * ex) uses SRC
102 * struct rsnd_src_platform_info info = { 87 * static struct rsnd_src_platform_info rsnd_src[] = {
103 * .flags = RSND_SRC_USE_HPBIF, 88 * RSND_SCU(48000, 0),
104 * .convert_rate = 48000, 89 * ...
90 * };
91 * static struct rsnd_dai_platform_info rsnd_dai = {
92 * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] },
105 * }; 93 * };
106 * 94 *
107 * ex) uses SRC bypass mode 95 * ex) uses SRC bypass mode
108 * struct rsnd_src_platform_info info = { 96 * static struct rsnd_src_platform_info rsnd_src[] = {
109 * .flags = RSND_SRC_USE_HPBIF, 97 * RSND_SCU(0, 0),
110 * .convert_rate = 0, 98 * ...
99 * };
100 * static struct rsnd_dai_platform_info rsnd_dai = {
101 * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] },
111 * }; 102 * };
112 * 103 *
113 */ 104 */
@@ -116,27 +107,17 @@ struct rsnd_src {
116 * Gen1/Gen2 common functions 107 * Gen1/Gen2 common functions
117 */ 108 */
118int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod, 109int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
119 struct rsnd_dai *rdai, 110 struct rsnd_dai *rdai)
120 struct rsnd_dai_stream *io)
121{ 111{
122 struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); 112 struct rsnd_dai_stream *io = rsnd_mod_to_io(ssi_mod);
123 struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io); 113 struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
124 struct rcar_snd_info *info = rsnd_priv_to_info(priv);
125 int ssi_id = rsnd_mod_id(ssi_mod); 114 int ssi_id = rsnd_mod_id(ssi_mod);
126 int has_src = 0;
127 115
128 /* 116 /*
129 * SSI_MODE0 117 * SSI_MODE0
130 */ 118 */
131 if (info->dai_info) {
132 has_src = !!src_mod;
133 } else {
134 struct rsnd_src *src = rsnd_mod_to_src(src_mod);
135 has_src = rsnd_src_hpbif_is_enable(src);
136 }
137
138 rsnd_mod_bset(ssi_mod, SSI_MODE0, (1 << ssi_id), 119 rsnd_mod_bset(ssi_mod, SSI_MODE0, (1 << ssi_id),
139 has_src ? 0 : (1 << ssi_id)); 120 src_mod ? 0 : (1 << ssi_id));
140 121
141 /* 122 /*
142 * SSI_MODE1 123 * SSI_MODE1
@@ -166,8 +147,7 @@ int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
166} 147}
167 148
168int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod, 149int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod,
169 struct rsnd_dai *rdai, 150 struct rsnd_dai *rdai)
170 struct rsnd_dai_stream *io)
171{ 151{
172 struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); 152 struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
173 153
@@ -203,13 +183,12 @@ unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv,
203} 183}
204 184
205static int rsnd_src_set_convert_rate(struct rsnd_mod *mod, 185static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
206 struct rsnd_dai *rdai, 186 struct rsnd_dai *rdai)
207 struct rsnd_dai_stream *io)
208{ 187{
188 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
209 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 189 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
210 struct rsnd_src *src = rsnd_mod_to_src(mod); 190 struct rsnd_src *src = rsnd_mod_to_src(mod);
211 u32 convert_rate = rsnd_src_convert_rate(src); 191 u32 convert_rate = rsnd_src_convert_rate(src);
212 u32 adinr = runtime->channels;
213 u32 fsrate = 0; 192 u32 fsrate = 0;
214 193
215 if (convert_rate) 194 if (convert_rate)
@@ -226,17 +205,7 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
226 rsnd_mod_write(mod, SRC_SRCIR, 1); 205 rsnd_mod_write(mod, SRC_SRCIR, 1);
227 206
228 /* Set channel number and output bit length */ 207 /* Set channel number and output bit length */
229 switch (runtime->sample_bits) { 208 rsnd_mod_write(mod, SRC_ADINR, rsnd_get_adinr(mod));
230 case 16:
231 adinr |= OTBL_16;
232 break;
233 case 32:
234 adinr |= OTBL_24;
235 break;
236 default:
237 return -EIO;
238 }
239 rsnd_mod_write(mod, SRC_ADINR, adinr);
240 209
241 /* Enable the initial value of IFS */ 210 /* Enable the initial value of IFS */
242 if (fsrate) { 211 if (fsrate) {
@@ -253,30 +222,27 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
253} 222}
254 223
255static int rsnd_src_init(struct rsnd_mod *mod, 224static int rsnd_src_init(struct rsnd_mod *mod,
256 struct rsnd_dai *rdai, 225 struct rsnd_dai *rdai)
257 struct rsnd_dai_stream *io)
258{ 226{
259 struct rsnd_src *src = rsnd_mod_to_src(mod); 227 struct rsnd_src *src = rsnd_mod_to_src(mod);
260 228
261 clk_enable(src->clk); 229 clk_prepare_enable(src->clk);
262 230
263 return 0; 231 return 0;
264} 232}
265 233
266static int rsnd_src_quit(struct rsnd_mod *mod, 234static int rsnd_src_quit(struct rsnd_mod *mod,
267 struct rsnd_dai *rdai, 235 struct rsnd_dai *rdai)
268 struct rsnd_dai_stream *io)
269{ 236{
270 struct rsnd_src *src = rsnd_mod_to_src(mod); 237 struct rsnd_src *src = rsnd_mod_to_src(mod);
271 238
272 clk_disable(src->clk); 239 clk_disable_unprepare(src->clk);
273 240
274 return 0; 241 return 0;
275} 242}
276 243
277static int rsnd_src_start(struct rsnd_mod *mod, 244static int rsnd_src_start(struct rsnd_mod *mod,
278 struct rsnd_dai *rdai, 245 struct rsnd_dai *rdai)
279 struct rsnd_dai_stream *io)
280{ 246{
281 struct rsnd_src *src = rsnd_mod_to_src(mod); 247 struct rsnd_src *src = rsnd_mod_to_src(mod);
282 248
@@ -294,8 +260,7 @@ static int rsnd_src_start(struct rsnd_mod *mod,
294 260
295 261
296static int rsnd_src_stop(struct rsnd_mod *mod, 262static int rsnd_src_stop(struct rsnd_mod *mod,
297 struct rsnd_dai *rdai, 263 struct rsnd_dai *rdai)
298 struct rsnd_dai_stream *io)
299{ 264{
300 struct rsnd_src *src = rsnd_mod_to_src(mod); 265 struct rsnd_src *src = rsnd_mod_to_src(mod);
301 266
@@ -305,17 +270,13 @@ static int rsnd_src_stop(struct rsnd_mod *mod,
305 return 0; 270 return 0;
306} 271}
307 272
308static struct rsnd_mod_ops rsnd_src_non_ops = {
309 .name = "src (non)",
310};
311
312/* 273/*
313 * Gen1 functions 274 * Gen1 functions
314 */ 275 */
315static int rsnd_src_set_route_gen1(struct rsnd_mod *mod, 276static int rsnd_src_set_route_gen1(struct rsnd_mod *mod,
316 struct rsnd_dai *rdai, 277 struct rsnd_dai *rdai)
317 struct rsnd_dai_stream *io)
318{ 278{
279 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
319 struct src_route_config { 280 struct src_route_config {
320 u32 mask; 281 u32 mask;
321 int shift; 282 int shift;
@@ -351,9 +312,9 @@ static int rsnd_src_set_route_gen1(struct rsnd_mod *mod,
351} 312}
352 313
353static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod, 314static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod,
354 struct rsnd_dai *rdai, 315 struct rsnd_dai *rdai)
355 struct rsnd_dai_stream *io)
356{ 316{
317 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
357 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 318 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
358 struct rsnd_src *src = rsnd_mod_to_src(mod); 319 struct rsnd_src *src = rsnd_mod_to_src(mod);
359 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 320 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
@@ -410,12 +371,11 @@ static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod,
410} 371}
411 372
412static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod, 373static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod,
413 struct rsnd_dai *rdai, 374 struct rsnd_dai *rdai)
414 struct rsnd_dai_stream *io)
415{ 375{
416 int ret; 376 int ret;
417 377
418 ret = rsnd_src_set_convert_rate(mod, rdai, io); 378 ret = rsnd_src_set_convert_rate(mod, rdai);
419 if (ret < 0) 379 if (ret < 0)
420 return ret; 380 return ret;
421 381
@@ -431,25 +391,35 @@ static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod,
431 return 0; 391 return 0;
432} 392}
433 393
394static int rsnd_src_probe_gen1(struct rsnd_mod *mod,
395 struct rsnd_dai *rdai)
396{
397 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
398 struct device *dev = rsnd_priv_to_dev(priv);
399
400 dev_dbg(dev, "%s (Gen1) is probed\n", rsnd_mod_name(mod));
401
402 return 0;
403}
404
434static int rsnd_src_init_gen1(struct rsnd_mod *mod, 405static int rsnd_src_init_gen1(struct rsnd_mod *mod,
435 struct rsnd_dai *rdai, 406 struct rsnd_dai *rdai)
436 struct rsnd_dai_stream *io)
437{ 407{
438 int ret; 408 int ret;
439 409
440 ret = rsnd_src_init(mod, rdai, io); 410 ret = rsnd_src_init(mod, rdai);
441 if (ret < 0) 411 if (ret < 0)
442 return ret; 412 return ret;
443 413
444 ret = rsnd_src_set_route_gen1(mod, rdai, io); 414 ret = rsnd_src_set_route_gen1(mod, rdai);
445 if (ret < 0) 415 if (ret < 0)
446 return ret; 416 return ret;
447 417
448 ret = rsnd_src_set_convert_rate_gen1(mod, rdai, io); 418 ret = rsnd_src_set_convert_rate_gen1(mod, rdai);
449 if (ret < 0) 419 if (ret < 0)
450 return ret; 420 return ret;
451 421
452 ret = rsnd_src_set_convert_timing_gen1(mod, rdai, io); 422 ret = rsnd_src_set_convert_timing_gen1(mod, rdai);
453 if (ret < 0) 423 if (ret < 0)
454 return ret; 424 return ret;
455 425
@@ -457,29 +427,28 @@ static int rsnd_src_init_gen1(struct rsnd_mod *mod,
457} 427}
458 428
459static int rsnd_src_start_gen1(struct rsnd_mod *mod, 429static int rsnd_src_start_gen1(struct rsnd_mod *mod,
460 struct rsnd_dai *rdai, 430 struct rsnd_dai *rdai)
461 struct rsnd_dai_stream *io)
462{ 431{
463 int id = rsnd_mod_id(mod); 432 int id = rsnd_mod_id(mod);
464 433
465 rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), (1 << id)); 434 rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), (1 << id));
466 435
467 return rsnd_src_start(mod, rdai, io); 436 return rsnd_src_start(mod, rdai);
468} 437}
469 438
470static int rsnd_src_stop_gen1(struct rsnd_mod *mod, 439static int rsnd_src_stop_gen1(struct rsnd_mod *mod,
471 struct rsnd_dai *rdai, 440 struct rsnd_dai *rdai)
472 struct rsnd_dai_stream *io)
473{ 441{
474 int id = rsnd_mod_id(mod); 442 int id = rsnd_mod_id(mod);
475 443
476 rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), 0); 444 rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), 0);
477 445
478 return rsnd_src_stop(mod, rdai, io); 446 return rsnd_src_stop(mod, rdai);
479} 447}
480 448
481static struct rsnd_mod_ops rsnd_src_gen1_ops = { 449static struct rsnd_mod_ops rsnd_src_gen1_ops = {
482 .name = "sru (gen1)", 450 .name = SRC_NAME,
451 .probe = rsnd_src_probe_gen1,
483 .init = rsnd_src_init_gen1, 452 .init = rsnd_src_init_gen1,
484 .quit = rsnd_src_quit, 453 .quit = rsnd_src_quit,
485 .start = rsnd_src_start_gen1, 454 .start = rsnd_src_start_gen1,
@@ -490,17 +459,16 @@ static struct rsnd_mod_ops rsnd_src_gen1_ops = {
490 * Gen2 functions 459 * Gen2 functions
491 */ 460 */
492static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod, 461static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod,
493 struct rsnd_dai *rdai, 462 struct rsnd_dai *rdai)
494 struct rsnd_dai_stream *io)
495{ 463{
496 int ret; 464 int ret;
497 465
498 ret = rsnd_src_set_convert_rate(mod, rdai, io); 466 ret = rsnd_src_set_convert_rate(mod, rdai);
499 if (ret < 0) 467 if (ret < 0)
500 return ret; 468 return ret;
501 469
502 rsnd_mod_write(mod, SSI_BUSIF_ADINR, rsnd_mod_read(mod, SRC_ADINR)); 470 rsnd_mod_write(mod, SSI_BUSIF_ADINR, rsnd_get_adinr(mod));
503 rsnd_mod_write(mod, SSI_BUSIF_MODE, rsnd_mod_read(mod, SRC_BUSIF_MODE)); 471 rsnd_mod_write(mod, SSI_BUSIF_MODE, 1);
504 472
505 rsnd_mod_write(mod, SRC_SRCCR, 0x00011110); 473 rsnd_mod_write(mod, SRC_SRCCR, 0x00011110);
506 474
@@ -511,9 +479,9 @@ static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod,
511} 479}
512 480
513static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod, 481static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod,
514 struct rsnd_dai *rdai, 482 struct rsnd_dai *rdai)
515 struct rsnd_dai_stream *io)
516{ 483{
484 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
517 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 485 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
518 struct rsnd_src *src = rsnd_mod_to_src(mod); 486 struct rsnd_src *src = rsnd_mod_to_src(mod);
519 u32 convert_rate = rsnd_src_convert_rate(src); 487 u32 convert_rate = rsnd_src_convert_rate(src);
@@ -530,35 +498,27 @@ static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod,
530} 498}
531 499
532static int rsnd_src_probe_gen2(struct rsnd_mod *mod, 500static int rsnd_src_probe_gen2(struct rsnd_mod *mod,
533 struct rsnd_dai *rdai, 501 struct rsnd_dai *rdai)
534 struct rsnd_dai_stream *io)
535{ 502{
536 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 503 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
537 struct rcar_snd_info *info = rsnd_priv_to_info(priv);
538 struct rsnd_src *src = rsnd_mod_to_src(mod); 504 struct rsnd_src *src = rsnd_mod_to_src(mod);
539 struct rsnd_mod *ssi = rsnd_ssi_mod_get(priv, rsnd_mod_id(mod));
540 struct device *dev = rsnd_priv_to_dev(priv); 505 struct device *dev = rsnd_priv_to_dev(priv);
541 int ret; 506 int ret;
542 int is_play;
543
544 if (info->dai_info)
545 is_play = rsnd_info_is_playback(priv, src);
546 else
547 is_play = rsnd_ssi_is_play(ssi);
548 507
549 ret = rsnd_dma_init(priv, 508 ret = rsnd_dma_init(priv,
550 rsnd_mod_to_dma(mod), 509 rsnd_mod_to_dma(mod),
551 is_play, 510 rsnd_info_is_playback(priv, src),
552 src->info->dma_id); 511 src->info->dma_id);
553 if (ret < 0) 512 if (ret < 0)
554 dev_err(dev, "SRC DMA failed\n"); 513 dev_err(dev, "SRC DMA failed\n");
555 514
515 dev_dbg(dev, "%s (Gen2) is probed\n", rsnd_mod_name(mod));
516
556 return ret; 517 return ret;
557} 518}
558 519
559static int rsnd_src_remove_gen2(struct rsnd_mod *mod, 520static int rsnd_src_remove_gen2(struct rsnd_mod *mod,
560 struct rsnd_dai *rdai, 521 struct rsnd_dai *rdai)
561 struct rsnd_dai_stream *io)
562{ 522{
563 rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod)); 523 rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod));
564 524
@@ -566,20 +526,19 @@ static int rsnd_src_remove_gen2(struct rsnd_mod *mod,
566} 526}
567 527
568static int rsnd_src_init_gen2(struct rsnd_mod *mod, 528static int rsnd_src_init_gen2(struct rsnd_mod *mod,
569 struct rsnd_dai *rdai, 529 struct rsnd_dai *rdai)
570 struct rsnd_dai_stream *io)
571{ 530{
572 int ret; 531 int ret;
573 532
574 ret = rsnd_src_init(mod, rdai, io); 533 ret = rsnd_src_init(mod, rdai);
575 if (ret < 0) 534 if (ret < 0)
576 return ret; 535 return ret;
577 536
578 ret = rsnd_src_set_convert_rate_gen2(mod, rdai, io); 537 ret = rsnd_src_set_convert_rate_gen2(mod, rdai);
579 if (ret < 0) 538 if (ret < 0)
580 return ret; 539 return ret;
581 540
582 ret = rsnd_src_set_convert_timing_gen2(mod, rdai, io); 541 ret = rsnd_src_set_convert_timing_gen2(mod, rdai);
583 if (ret < 0) 542 if (ret < 0)
584 return ret; 543 return ret;
585 544
@@ -587,22 +546,22 @@ static int rsnd_src_init_gen2(struct rsnd_mod *mod,
587} 546}
588 547
589static int rsnd_src_start_gen2(struct rsnd_mod *mod, 548static int rsnd_src_start_gen2(struct rsnd_mod *mod,
590 struct rsnd_dai *rdai, 549 struct rsnd_dai *rdai)
591 struct rsnd_dai_stream *io)
592{ 550{
551 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
593 struct rsnd_src *src = rsnd_mod_to_src(mod); 552 struct rsnd_src *src = rsnd_mod_to_src(mod);
553 u32 val = rsnd_io_to_mod_dvc(io) ? 0x01 : 0x11;
594 554
595 rsnd_dma_start(rsnd_mod_to_dma(&src->mod)); 555 rsnd_dma_start(rsnd_mod_to_dma(&src->mod));
596 556
597 rsnd_mod_write(mod, SSI_CTRL, 0x1); 557 rsnd_mod_write(mod, SSI_CTRL, 0x1);
598 rsnd_mod_write(mod, SRC_CTRL, 0x11); 558 rsnd_mod_write(mod, SRC_CTRL, val);
599 559
600 return rsnd_src_start(mod, rdai, io); 560 return rsnd_src_start(mod, rdai);
601} 561}
602 562
603static int rsnd_src_stop_gen2(struct rsnd_mod *mod, 563static int rsnd_src_stop_gen2(struct rsnd_mod *mod,
604 struct rsnd_dai *rdai, 564 struct rsnd_dai *rdai)
605 struct rsnd_dai_stream *io)
606{ 565{
607 struct rsnd_src *src = rsnd_mod_to_src(mod); 566 struct rsnd_src *src = rsnd_mod_to_src(mod);
608 567
@@ -611,11 +570,11 @@ static int rsnd_src_stop_gen2(struct rsnd_mod *mod,
611 570
612 rsnd_dma_stop(rsnd_mod_to_dma(&src->mod)); 571 rsnd_dma_stop(rsnd_mod_to_dma(&src->mod));
613 572
614 return rsnd_src_stop(mod, rdai, io); 573 return rsnd_src_stop(mod, rdai);
615} 574}
616 575
617static struct rsnd_mod_ops rsnd_src_gen2_ops = { 576static struct rsnd_mod_ops rsnd_src_gen2_ops = {
618 .name = "src (gen2)", 577 .name = SRC_NAME,
619 .probe = rsnd_src_probe_gen2, 578 .probe = rsnd_src_probe_gen2,
620 .remove = rsnd_src_remove_gen2, 579 .remove = rsnd_src_remove_gen2,
621 .init = rsnd_src_init_gen2, 580 .init = rsnd_src_init_gen2,
@@ -651,18 +610,21 @@ static void rsnd_of_parse_src(struct platform_device *pdev,
651 610
652 nr = of_get_child_count(src_node); 611 nr = of_get_child_count(src_node);
653 if (!nr) 612 if (!nr)
654 return; 613 goto rsnd_of_parse_src_end;
655 614
656 src_info = devm_kzalloc(dev, 615 src_info = devm_kzalloc(dev,
657 sizeof(struct rsnd_src_platform_info) * nr, 616 sizeof(struct rsnd_src_platform_info) * nr,
658 GFP_KERNEL); 617 GFP_KERNEL);
659 if (!src_info) { 618 if (!src_info) {
660 dev_err(dev, "src info allocation error\n"); 619 dev_err(dev, "src info allocation error\n");
661 return; 620 goto rsnd_of_parse_src_end;
662 } 621 }
663 622
664 info->src_info = src_info; 623 info->src_info = src_info;
665 info->src_info_nr = nr; 624 info->src_info_nr = nr;
625
626rsnd_of_parse_src_end:
627 of_node_put(src_node);
666} 628}
667 629
668int rsnd_src_probe(struct platform_device *pdev, 630int rsnd_src_probe(struct platform_device *pdev,
@@ -677,6 +639,16 @@ int rsnd_src_probe(struct platform_device *pdev,
677 char name[RSND_SRC_NAME_SIZE]; 639 char name[RSND_SRC_NAME_SIZE];
678 int i, nr; 640 int i, nr;
679 641
642 ops = NULL;
643 if (rsnd_is_gen1(priv))
644 ops = &rsnd_src_gen1_ops;
645 if (rsnd_is_gen2(priv))
646 ops = &rsnd_src_gen2_ops;
647 if (!ops) {
648 dev_err(dev, "unknown Generation\n");
649 return -EIO;
650 }
651
680 rsnd_of_parse_src(pdev, of_data, priv); 652 rsnd_of_parse_src(pdev, of_data, priv);
681 653
682 /* 654 /*
@@ -696,28 +668,16 @@ int rsnd_src_probe(struct platform_device *pdev,
696 priv->src = src; 668 priv->src = src;
697 669
698 for_each_rsnd_src(src, priv, i) { 670 for_each_rsnd_src(src, priv, i) {
699 snprintf(name, RSND_SRC_NAME_SIZE, "src.%d", i); 671 snprintf(name, RSND_SRC_NAME_SIZE, "%s.%d",
672 SRC_NAME, i);
700 673
701 clk = devm_clk_get(dev, name); 674 clk = devm_clk_get(dev, name);
702 if (IS_ERR(clk)) {
703 snprintf(name, RSND_SRC_NAME_SIZE, "scu.%d", i);
704 clk = devm_clk_get(dev, name);
705 }
706
707 if (IS_ERR(clk)) 675 if (IS_ERR(clk))
708 return PTR_ERR(clk); 676 return PTR_ERR(clk);
709 677
710 src->info = &info->src_info[i]; 678 src->info = &info->src_info[i];
711 src->clk = clk; 679 src->clk = clk;
712 680
713 ops = &rsnd_src_non_ops;
714 if (rsnd_src_hpbif_is_enable(src)) {
715 if (rsnd_is_gen1(priv))
716 ops = &rsnd_src_gen1_ops;
717 if (rsnd_is_gen2(priv))
718 ops = &rsnd_src_gen2_ops;
719 }
720
721 rsnd_mod_init(priv, &src->mod, ops, RSND_MOD_SRC, i); 681 rsnd_mod_init(priv, &src->mod, ops, RSND_MOD_SRC, i);
722 682
723 dev_dbg(dev, "SRC%d probed\n", i); 683 dev_dbg(dev, "SRC%d probed\n", i);
diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
index 4b7e20603dd7..2df723df5d19 100644
--- a/sound/soc/sh/rcar/ssi.c
+++ b/sound/soc/sh/rcar/ssi.c
@@ -57,6 +57,8 @@
57 */ 57 */
58#define CONT (1 << 8) /* WS Continue Function */ 58#define CONT (1 << 8) /* WS Continue Function */
59 59
60#define SSI_NAME "ssi"
61
60struct rsnd_ssi { 62struct rsnd_ssi {
61 struct clk *clk; 63 struct clk *clk;
62 struct rsnd_ssi_platform_info *info; /* rcar_snd.h */ 64 struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
@@ -171,7 +173,7 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
171 u32 cr; 173 u32 cr;
172 174
173 if (0 == ssi->usrcnt) { 175 if (0 == ssi->usrcnt) {
174 clk_enable(ssi->clk); 176 clk_prepare_enable(ssi->clk);
175 177
176 if (rsnd_dai_is_clk_master(rdai)) { 178 if (rsnd_dai_is_clk_master(rdai)) {
177 if (rsnd_ssi_clk_from_parent(ssi)) 179 if (rsnd_ssi_clk_from_parent(ssi))
@@ -230,7 +232,7 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
230 rsnd_ssi_master_clk_stop(ssi); 232 rsnd_ssi_master_clk_stop(ssi);
231 } 233 }
232 234
233 clk_disable(ssi->clk); 235 clk_disable_unprepare(ssi->clk);
234 } 236 }
235 237
236 dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod)); 238 dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
@@ -240,10 +242,10 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
240 * SSI mod common functions 242 * SSI mod common functions
241 */ 243 */
242static int rsnd_ssi_init(struct rsnd_mod *mod, 244static int rsnd_ssi_init(struct rsnd_mod *mod,
243 struct rsnd_dai *rdai, 245 struct rsnd_dai *rdai)
244 struct rsnd_dai_stream *io)
245{ 246{
246 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 247 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
248 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
247 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 249 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
248 u32 cr; 250 u32 cr;
249 251
@@ -287,14 +289,13 @@ static int rsnd_ssi_init(struct rsnd_mod *mod,
287 ssi->cr_own = cr; 289 ssi->cr_own = cr;
288 ssi->err = -1; /* ignore 1st error */ 290 ssi->err = -1; /* ignore 1st error */
289 291
290 rsnd_src_ssi_mode_init(mod, rdai, io); 292 rsnd_src_ssi_mode_init(mod, rdai);
291 293
292 return 0; 294 return 0;
293} 295}
294 296
295static int rsnd_ssi_quit(struct rsnd_mod *mod, 297static int rsnd_ssi_quit(struct rsnd_mod *mod,
296 struct rsnd_dai *rdai, 298 struct rsnd_dai *rdai)
297 struct rsnd_dai_stream *io)
298{ 299{
299 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 300 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
300 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 301 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
@@ -359,8 +360,7 @@ static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
359} 360}
360 361
361static int rsnd_ssi_pio_probe(struct rsnd_mod *mod, 362static int rsnd_ssi_pio_probe(struct rsnd_mod *mod,
362 struct rsnd_dai *rdai, 363 struct rsnd_dai *rdai)
363 struct rsnd_dai_stream *io)
364{ 364{
365 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 365 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
366 struct device *dev = rsnd_priv_to_dev(priv); 366 struct device *dev = rsnd_priv_to_dev(priv);
@@ -375,19 +375,21 @@ static int rsnd_ssi_pio_probe(struct rsnd_mod *mod,
375 if (ret) 375 if (ret)
376 dev_err(dev, "SSI request interrupt failed\n"); 376 dev_err(dev, "SSI request interrupt failed\n");
377 377
378 dev_dbg(dev, "%s (PIO) is probed\n", rsnd_mod_name(mod));
379
378 return ret; 380 return ret;
379} 381}
380 382
381static int rsnd_ssi_pio_start(struct rsnd_mod *mod, 383static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
382 struct rsnd_dai *rdai, 384 struct rsnd_dai *rdai)
383 struct rsnd_dai_stream *io)
384{ 385{
385 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 386 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
387 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
386 388
387 /* enable PIO IRQ */ 389 /* enable PIO IRQ */
388 ssi->cr_etc = UIEN | OIEN | DIEN; 390 ssi->cr_etc = UIEN | OIEN | DIEN;
389 391
390 rsnd_src_enable_ssi_irq(mod, rdai, io); 392 rsnd_src_enable_ssi_irq(mod, rdai);
391 393
392 rsnd_ssi_hw_start(ssi, rdai, io); 394 rsnd_ssi_hw_start(ssi, rdai, io);
393 395
@@ -395,8 +397,7 @@ static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
395} 397}
396 398
397static int rsnd_ssi_pio_stop(struct rsnd_mod *mod, 399static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
398 struct rsnd_dai *rdai, 400 struct rsnd_dai *rdai)
399 struct rsnd_dai_stream *io)
400{ 401{
401 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 402 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
402 403
@@ -408,7 +409,7 @@ static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
408} 409}
409 410
410static struct rsnd_mod_ops rsnd_ssi_pio_ops = { 411static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
411 .name = "ssi (pio)", 412 .name = SSI_NAME,
412 .probe = rsnd_ssi_pio_probe, 413 .probe = rsnd_ssi_pio_probe,
413 .init = rsnd_ssi_init, 414 .init = rsnd_ssi_init,
414 .quit = rsnd_ssi_quit, 415 .quit = rsnd_ssi_quit,
@@ -417,36 +418,29 @@ static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
417}; 418};
418 419
419static int rsnd_ssi_dma_probe(struct rsnd_mod *mod, 420static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
420 struct rsnd_dai *rdai, 421 struct rsnd_dai *rdai)
421 struct rsnd_dai_stream *io)
422{ 422{
423 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 423 struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
424 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 424 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
425 struct rcar_snd_info *info = rsnd_priv_to_info(priv);
426 struct device *dev = rsnd_priv_to_dev(priv); 425 struct device *dev = rsnd_priv_to_dev(priv);
427 int dma_id = ssi->info->dma_id; 426 int dma_id = ssi->info->dma_id;
428 int is_play;
429 int ret; 427 int ret;
430 428
431 if (info->dai_info)
432 is_play = rsnd_info_is_playback(priv, ssi);
433 else
434 is_play = rsnd_ssi_is_play(&ssi->mod);
435
436 ret = rsnd_dma_init( 429 ret = rsnd_dma_init(
437 priv, rsnd_mod_to_dma(mod), 430 priv, rsnd_mod_to_dma(mod),
438 is_play, 431 rsnd_info_is_playback(priv, ssi),
439 dma_id); 432 dma_id);
440 433
441 if (ret < 0) 434 if (ret < 0)
442 dev_err(dev, "SSI DMA failed\n"); 435 dev_err(dev, "SSI DMA failed\n");
443 436
437 dev_dbg(dev, "%s (DMA) is probed\n", rsnd_mod_name(mod));
438
444 return ret; 439 return ret;
445} 440}
446 441
447static int rsnd_ssi_dma_remove(struct rsnd_mod *mod, 442static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
448 struct rsnd_dai *rdai, 443 struct rsnd_dai *rdai)
449 struct rsnd_dai_stream *io)
450{ 444{
451 rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod)); 445 rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod));
452 446
@@ -454,11 +448,11 @@ static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
454} 448}
455 449
456static int rsnd_ssi_dma_start(struct rsnd_mod *mod, 450static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
457 struct rsnd_dai *rdai, 451 struct rsnd_dai *rdai)
458 struct rsnd_dai_stream *io)
459{ 452{
460 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 453 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
461 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod); 454 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
455 struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
462 456
463 /* enable DMA transfer */ 457 /* enable DMA transfer */
464 ssi->cr_etc = DMEN; 458 ssi->cr_etc = DMEN;
@@ -475,8 +469,7 @@ static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
475} 469}
476 470
477static int rsnd_ssi_dma_stop(struct rsnd_mod *mod, 471static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
478 struct rsnd_dai *rdai, 472 struct rsnd_dai *rdai)
479 struct rsnd_dai_stream *io)
480{ 473{
481 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 474 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
482 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod); 475 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
@@ -493,7 +486,7 @@ static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
493} 486}
494 487
495static struct rsnd_mod_ops rsnd_ssi_dma_ops = { 488static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
496 .name = "ssi (dma)", 489 .name = SSI_NAME,
497 .probe = rsnd_ssi_dma_probe, 490 .probe = rsnd_ssi_dma_probe,
498 .remove = rsnd_ssi_dma_remove, 491 .remove = rsnd_ssi_dma_remove,
499 .init = rsnd_ssi_init, 492 .init = rsnd_ssi_init,
@@ -506,47 +499,12 @@ static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
506 * Non SSI 499 * Non SSI
507 */ 500 */
508static struct rsnd_mod_ops rsnd_ssi_non_ops = { 501static struct rsnd_mod_ops rsnd_ssi_non_ops = {
509 .name = "ssi (non)", 502 .name = SSI_NAME,
510}; 503};
511 504
512/* 505/*
513 * ssi mod function 506 * ssi mod function
514 */ 507 */
515struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
516 int dai_id, int is_play)
517{
518 struct rsnd_dai_platform_info *dai_info = NULL;
519 struct rsnd_dai_path_info *path_info = NULL;
520 struct rsnd_ssi_platform_info *target_info = NULL;
521 struct rsnd_ssi *ssi;
522 int i, has_play;
523
524 if (priv->rdai)
525 dai_info = priv->rdai[dai_id].info;
526 if (dai_info)
527 path_info = (is_play) ? &dai_info->playback : &dai_info->capture;
528 if (path_info)
529 target_info = path_info->ssi;
530
531 is_play = !!is_play;
532
533 for_each_rsnd_ssi(ssi, priv, i) {
534 if (target_info == ssi->info)
535 return &ssi->mod;
536
537 /* for compatible */
538 if (rsnd_ssi_dai_id(ssi) != dai_id)
539 continue;
540
541 has_play = rsnd_ssi_is_play(&ssi->mod);
542
543 if (is_play == has_play)
544 return &ssi->mod;
545 }
546
547 return NULL;
548}
549
550struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id) 508struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
551{ 509{
552 if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv))) 510 if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv)))
@@ -562,13 +520,6 @@ int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
562 return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE); 520 return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE);
563} 521}
564 522
565int rsnd_ssi_is_play(struct rsnd_mod *mod)
566{
567 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
568
569 return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
570}
571
572static void rsnd_ssi_parent_clk_setup(struct rsnd_priv *priv, struct rsnd_ssi *ssi) 523static void rsnd_ssi_parent_clk_setup(struct rsnd_priv *priv, struct rsnd_ssi *ssi)
573{ 524{
574 if (!rsnd_ssi_is_pin_sharing(&ssi->mod)) 525 if (!rsnd_ssi_is_pin_sharing(&ssi->mod))
@@ -609,14 +560,14 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
609 560
610 nr = of_get_child_count(node); 561 nr = of_get_child_count(node);
611 if (!nr) 562 if (!nr)
612 return; 563 goto rsnd_of_parse_ssi_end;
613 564
614 ssi_info = devm_kzalloc(dev, 565 ssi_info = devm_kzalloc(dev,
615 sizeof(struct rsnd_ssi_platform_info) * nr, 566 sizeof(struct rsnd_ssi_platform_info) * nr,
616 GFP_KERNEL); 567 GFP_KERNEL);
617 if (!ssi_info) { 568 if (!ssi_info) {
618 dev_err(dev, "ssi info allocation error\n"); 569 dev_err(dev, "ssi info allocation error\n");
619 return; 570 goto rsnd_of_parse_ssi_end;
620 } 571 }
621 572
622 info->ssi_info = ssi_info; 573 info->ssi_info = ssi_info;
@@ -638,7 +589,16 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
638 * irq 589 * irq
639 */ 590 */
640 ssi_info->pio_irq = irq_of_parse_and_map(np, 0); 591 ssi_info->pio_irq = irq_of_parse_and_map(np, 0);
592
593 /*
594 * DMA
595 */
596 ssi_info->dma_id = of_get_property(np, "pio-transfer", NULL) ?
597 0 : 1;
641 } 598 }
599
600rsnd_of_parse_ssi_end:
601 of_node_put(node);
642} 602}
643 603
644int rsnd_ssi_probe(struct platform_device *pdev, 604int rsnd_ssi_probe(struct platform_device *pdev,
@@ -672,7 +632,8 @@ int rsnd_ssi_probe(struct platform_device *pdev,
672 for_each_rsnd_ssi(ssi, priv, i) { 632 for_each_rsnd_ssi(ssi, priv, i) {
673 pinfo = &info->ssi_info[i]; 633 pinfo = &info->ssi_info[i];
674 634
675 snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i); 635 snprintf(name, RSND_SSI_NAME_SIZE, "%s.%d",
636 SSI_NAME, i);
676 637
677 clk = devm_clk_get(dev, name); 638 clk = devm_clk_get(dev, name);
678 if (IS_ERR(clk)) 639 if (IS_ERR(clk))
diff --git a/sound/soc/sirf/sirf-audio-port.c b/sound/soc/sirf/sirf-audio-port.c
index b04a53f2b4f6..b4afa31b2bc1 100644
--- a/sound/soc/sirf/sirf-audio-port.c
+++ b/sound/soc/sirf/sirf-audio-port.c
@@ -6,60 +6,15 @@
6 * Licensed under GPLv2 or later. 6 * Licensed under GPLv2 or later.
7 */ 7 */
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/io.h>
10#include <linux/regmap.h>
11#include <sound/soc.h> 9#include <sound/soc.h>
12#include <sound/dmaengine_pcm.h> 10#include <sound/dmaengine_pcm.h>
13 11
14#include "sirf-audio-port.h"
15
16struct sirf_audio_port { 12struct sirf_audio_port {
17 struct regmap *regmap; 13 struct regmap *regmap;
18 struct snd_dmaengine_dai_dma_data playback_dma_data; 14 struct snd_dmaengine_dai_dma_data playback_dma_data;
19 struct snd_dmaengine_dai_dma_data capture_dma_data; 15 struct snd_dmaengine_dai_dma_data capture_dma_data;
20}; 16};
21 17
22static void sirf_audio_port_tx_enable(struct sirf_audio_port *port)
23{
24 regmap_update_bits(port->regmap, AUDIO_PORT_IC_TXFIFO_OP,
25 AUDIO_FIFO_RESET, AUDIO_FIFO_RESET);
26 regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_INT_MSK, 0);
27 regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0);
28 regmap_update_bits(port->regmap, AUDIO_PORT_IC_TXFIFO_OP,
29 AUDIO_FIFO_START, AUDIO_FIFO_START);
30 regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_TX_CTRL,
31 IC_TX_ENABLE, IC_TX_ENABLE);
32}
33
34static void sirf_audio_port_tx_disable(struct sirf_audio_port *port)
35{
36 regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0);
37 regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_TX_CTRL,
38 IC_TX_ENABLE, ~IC_TX_ENABLE);
39}
40
41static void sirf_audio_port_rx_enable(struct sirf_audio_port *port,
42 int channels)
43{
44 regmap_update_bits(port->regmap, AUDIO_PORT_IC_RXFIFO_OP,
45 AUDIO_FIFO_RESET, AUDIO_FIFO_RESET);
46 regmap_write(port->regmap, AUDIO_PORT_IC_RXFIFO_INT_MSK, 0);
47 regmap_write(port->regmap, AUDIO_PORT_IC_RXFIFO_OP, 0);
48 regmap_update_bits(port->regmap, AUDIO_PORT_IC_RXFIFO_OP,
49 AUDIO_FIFO_START, AUDIO_FIFO_START);
50 if (channels == 1)
51 regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL,
52 IC_RX_ENABLE_MONO, IC_RX_ENABLE_MONO);
53 else
54 regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL,
55 IC_RX_ENABLE_STEREO, IC_RX_ENABLE_STEREO);
56}
57
58static void sirf_audio_port_rx_disable(struct sirf_audio_port *port)
59{
60 regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL,
61 IC_RX_ENABLE_STEREO, ~IC_RX_ENABLE_STEREO);
62}
63 18
64static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai) 19static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai)
65{ 20{
@@ -69,41 +24,6 @@ static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai)
69 return 0; 24 return 0;
70} 25}
71 26
72static int sirf_audio_port_trigger(struct snd_pcm_substream *substream, int cmd,
73 struct snd_soc_dai *dai)
74{
75 struct sirf_audio_port *port = snd_soc_dai_get_drvdata(dai);
76 int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
77
78 switch (cmd) {
79 case SNDRV_PCM_TRIGGER_STOP:
80 case SNDRV_PCM_TRIGGER_SUSPEND:
81 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
82 if (playback)
83 sirf_audio_port_tx_disable(port);
84 else
85 sirf_audio_port_rx_disable(port);
86 break;
87 case SNDRV_PCM_TRIGGER_START:
88 case SNDRV_PCM_TRIGGER_RESUME:
89 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
90 if (playback)
91 sirf_audio_port_tx_enable(port);
92 else
93 sirf_audio_port_rx_enable(port,
94 substream->runtime->channels);
95 break;
96 default:
97 return -EINVAL;
98 }
99
100 return 0;
101}
102
103static const struct snd_soc_dai_ops sirf_audio_port_dai_ops = {
104 .trigger = sirf_audio_port_trigger,
105};
106
107static struct snd_soc_dai_driver sirf_audio_port_dai = { 27static struct snd_soc_dai_driver sirf_audio_port_dai = {
108 .probe = sirf_audio_port_dai_probe, 28 .probe = sirf_audio_port_dai_probe,
109 .name = "sirf-audio-port", 29 .name = "sirf-audio-port",
@@ -120,49 +40,22 @@ static struct snd_soc_dai_driver sirf_audio_port_dai = {
120 .rates = SNDRV_PCM_RATE_48000, 40 .rates = SNDRV_PCM_RATE_48000,
121 .formats = SNDRV_PCM_FMTBIT_S16_LE, 41 .formats = SNDRV_PCM_FMTBIT_S16_LE,
122 }, 42 },
123 .ops = &sirf_audio_port_dai_ops,
124}; 43};
125 44
126static const struct snd_soc_component_driver sirf_audio_port_component = { 45static const struct snd_soc_component_driver sirf_audio_port_component = {
127 .name = "sirf-audio-port", 46 .name = "sirf-audio-port",
128}; 47};
129 48
130static const struct regmap_config sirf_audio_port_regmap_config = {
131 .reg_bits = 32,
132 .reg_stride = 4,
133 .val_bits = 32,
134 .max_register = AUDIO_PORT_IC_RXFIFO_INT_MSK,
135 .cache_type = REGCACHE_NONE,
136};
137
138static int sirf_audio_port_probe(struct platform_device *pdev) 49static int sirf_audio_port_probe(struct platform_device *pdev)
139{ 50{
140 int ret; 51 int ret;
141 struct sirf_audio_port *port; 52 struct sirf_audio_port *port;
142 void __iomem *base;
143 struct resource *mem_res;
144 53
145 port = devm_kzalloc(&pdev->dev, 54 port = devm_kzalloc(&pdev->dev,
146 sizeof(struct sirf_audio_port), GFP_KERNEL); 55 sizeof(struct sirf_audio_port), GFP_KERNEL);
147 if (!port) 56 if (!port)
148 return -ENOMEM; 57 return -ENOMEM;
149 58
150 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
151 if (!mem_res) {
152 dev_err(&pdev->dev, "no mem resource?\n");
153 return -ENODEV;
154 }
155
156 base = devm_ioremap(&pdev->dev, mem_res->start,
157 resource_size(mem_res));
158 if (base == NULL)
159 return -ENOMEM;
160
161 port->regmap = devm_regmap_init_mmio(&pdev->dev, base,
162 &sirf_audio_port_regmap_config);
163 if (IS_ERR(port->regmap))
164 return PTR_ERR(port->regmap);
165
166 ret = devm_snd_soc_register_component(&pdev->dev, 59 ret = devm_snd_soc_register_component(&pdev->dev,
167 &sirf_audio_port_component, &sirf_audio_port_dai, 1); 60 &sirf_audio_port_component, &sirf_audio_port_dai, 1);
168 if (ret) 61 if (ret)
diff --git a/sound/soc/sirf/sirf-audio-port.h b/sound/soc/sirf/sirf-audio-port.h
deleted file mode 100644
index f32dc54f4499..000000000000
--- a/sound/soc/sirf/sirf-audio-port.h
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * SiRF Audio port controllers define
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#ifndef _SIRF_AUDIO_PORT_H
10#define _SIRF_AUDIO_PORT_H
11
12#define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F
13#define AUDIO_PORT_TX_FIFO_SC_OFFSET 0
14#define AUDIO_PORT_TX_FIFO_LC_OFFSET 10
15#define AUDIO_PORT_TX_FIFO_HC_OFFSET 20
16
17#define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
18 << AUDIO_PORT_TX_FIFO_SC_OFFSET)
19#define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
20 << AUDIO_PORT_TX_FIFO_LC_OFFSET)
21#define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
22 << AUDIO_PORT_TX_FIFO_HC_OFFSET)
23
24#define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F
25#define AUDIO_PORT_RX_FIFO_SC_OFFSET 0
26#define AUDIO_PORT_RX_FIFO_LC_OFFSET 10
27#define AUDIO_PORT_RX_FIFO_HC_OFFSET 20
28
29#define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
30 << AUDIO_PORT_RX_FIFO_SC_OFFSET)
31#define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
32 << AUDIO_PORT_RX_FIFO_LC_OFFSET)
33#define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
34 << AUDIO_PORT_RX_FIFO_HC_OFFSET)
35#define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4)
36#define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8)
37
38#define AUDIO_PORT_IC_TXFIFO_OP (0x00FC)
39#define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100)
40#define AUDIO_PORT_IC_TXFIFO_STS (0x0104)
41#define AUDIO_PORT_IC_TXFIFO_INT (0x0108)
42#define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C)
43
44#define AUDIO_PORT_IC_RXFIFO_OP (0x0110)
45#define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114)
46#define AUDIO_PORT_IC_RXFIFO_STS (0x0118)
47#define AUDIO_PORT_IC_RXFIFO_INT (0x011C)
48#define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120)
49
50#define AUDIO_FIFO_START (1 << 0)
51#define AUDIO_FIFO_RESET (1 << 1)
52
53#define AUDIO_FIFO_FULL (1 << 0)
54#define AUDIO_FIFO_EMPTY (1 << 1)
55#define AUDIO_FIFO_OFLOW (1 << 2)
56#define AUDIO_FIFO_UFLOW (1 << 3)
57
58#define IC_TX_ENABLE (0x03)
59#define IC_RX_ENABLE_MONO (0x01)
60#define IC_RX_ENABLE_STEREO (0x03)
61
62#endif /*__SIRF_AUDIO_PORT_H*/
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c
index bfed3e4c45ff..00e70b6c7da2 100644
--- a/sound/soc/soc-cache.c
+++ b/sound/soc/soc-cache.c
@@ -72,6 +72,9 @@ int snd_soc_cache_init(struct snd_soc_codec *codec)
72 72
73 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size; 73 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
74 74
75 if (!reg_size)
76 return 0;
77
75 mutex_init(&codec->cache_rw_mutex); 78 mutex_init(&codec->cache_rw_mutex);
76 79
77 dev_dbg(codec->dev, "ASoC: Initializing cache for %s codec\n", 80 dev_dbg(codec->dev, "ASoC: Initializing cache for %s codec\n",
@@ -162,8 +165,6 @@ static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
162 i, codec_drv->reg_word_size) == val) 165 i, codec_drv->reg_word_size) == val)
163 continue; 166 continue;
164 167
165 WARN_ON(!snd_soc_codec_writable_register(codec, i));
166
167 ret = snd_soc_write(codec, i, val); 168 ret = snd_soc_write(codec, i, val);
168 if (ret) 169 if (ret)
169 return ret; 170 return ret;
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index 91083e6a6b38..10f7f1da2aca 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -203,7 +203,6 @@ static int soc_compr_free(struct snd_compr_stream *cstream)
203 203
204 if (platform->driver->compr_ops && platform->driver->compr_ops->free) 204 if (platform->driver->compr_ops && platform->driver->compr_ops->free)
205 platform->driver->compr_ops->free(cstream); 205 platform->driver->compr_ops->free(cstream);
206 cpu_dai->runtime = NULL;
207 206
208 if (cstream->direction == SND_COMPRESS_PLAYBACK) { 207 if (cstream->direction == SND_COMPRESS_PLAYBACK) {
209 if (snd_soc_runtime_ignore_pmdown_time(rtd)) { 208 if (snd_soc_runtime_ignore_pmdown_time(rtd)) {
@@ -317,8 +316,9 @@ static int soc_compr_trigger_fe(struct snd_compr_stream *cstream, int cmd)
317 cmd == SND_COMPR_TRIGGER_DRAIN) { 316 cmd == SND_COMPR_TRIGGER_DRAIN) {
318 317
319 if (platform->driver->compr_ops && 318 if (platform->driver->compr_ops &&
320 platform->driver->compr_ops->trigger) 319 platform->driver->compr_ops->trigger)
321 return platform->driver->compr_ops->trigger(cstream, cmd); 320 return platform->driver->compr_ops->trigger(cstream,
321 cmd);
322 } 322 }
323 323
324 if (cstream->direction == SND_COMPRESS_PLAYBACK) 324 if (cstream->direction == SND_COMPRESS_PLAYBACK)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 051c006281f5..b87d7d882e6d 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -154,22 +154,15 @@ static ssize_t soc_codec_reg_show(struct snd_soc_codec *codec, char *buf,
154 step = codec->driver->reg_cache_step; 154 step = codec->driver->reg_cache_step;
155 155
156 for (i = 0; i < codec->driver->reg_cache_size; i += step) { 156 for (i = 0; i < codec->driver->reg_cache_size; i += step) {
157 if (!snd_soc_codec_readable_register(codec, i)) 157 /* only support larger than PAGE_SIZE bytes debugfs
158 continue; 158 * entries for the default case */
159 if (codec->driver->display_register) { 159 if (p >= pos) {
160 count += codec->driver->display_register(codec, buf + count, 160 if (total + len >= count - 1)
161 PAGE_SIZE - count, i); 161 break;
162 } else { 162 format_register_str(codec, i, buf + total, len);
163 /* only support larger than PAGE_SIZE bytes debugfs 163 total += len;
164 * entries for the default case */
165 if (p >= pos) {
166 if (total + len >= count - 1)
167 break;
168 format_register_str(codec, i, buf + total, len);
169 total += len;
170 }
171 p += len;
172 } 164 }
165 p += len;
173 } 166 }
174 167
175 total = min(total, count - 1); 168 total = min(total, count - 1);
@@ -663,8 +656,8 @@ int snd_soc_suspend(struct device *dev)
663 codec->driver->suspend(codec); 656 codec->driver->suspend(codec);
664 codec->suspended = 1; 657 codec->suspended = 1;
665 codec->cache_sync = 1; 658 codec->cache_sync = 1;
666 if (codec->using_regmap) 659 if (codec->component.regmap)
667 regcache_mark_dirty(codec->control_data); 660 regcache_mark_dirty(codec->component.regmap);
668 /* deactivate pins to sleep state */ 661 /* deactivate pins to sleep state */
669 pinctrl_pm_select_sleep_state(codec->dev); 662 pinctrl_pm_select_sleep_state(codec->dev);
670 break; 663 break;
@@ -854,14 +847,47 @@ EXPORT_SYMBOL_GPL(snd_soc_resume);
854static const struct snd_soc_dai_ops null_dai_ops = { 847static const struct snd_soc_dai_ops null_dai_ops = {
855}; 848};
856 849
850static struct snd_soc_codec *soc_find_codec(const struct device_node *codec_of_node,
851 const char *codec_name)
852{
853 struct snd_soc_codec *codec;
854
855 list_for_each_entry(codec, &codec_list, list) {
856 if (codec_of_node) {
857 if (codec->dev->of_node != codec_of_node)
858 continue;
859 } else {
860 if (strcmp(codec->name, codec_name))
861 continue;
862 }
863
864 return codec;
865 }
866
867 return NULL;
868}
869
870static struct snd_soc_dai *soc_find_codec_dai(struct snd_soc_codec *codec,
871 const char *codec_dai_name)
872{
873 struct snd_soc_dai *codec_dai;
874
875 list_for_each_entry(codec_dai, &codec->component.dai_list, list) {
876 if (!strcmp(codec_dai->name, codec_dai_name)) {
877 return codec_dai;
878 }
879 }
880
881 return NULL;
882}
883
857static int soc_bind_dai_link(struct snd_soc_card *card, int num) 884static int soc_bind_dai_link(struct snd_soc_card *card, int num)
858{ 885{
859 struct snd_soc_dai_link *dai_link = &card->dai_link[num]; 886 struct snd_soc_dai_link *dai_link = &card->dai_link[num];
860 struct snd_soc_pcm_runtime *rtd = &card->rtd[num]; 887 struct snd_soc_pcm_runtime *rtd = &card->rtd[num];
861 struct snd_soc_component *component; 888 struct snd_soc_component *component;
862 struct snd_soc_codec *codec;
863 struct snd_soc_platform *platform; 889 struct snd_soc_platform *platform;
864 struct snd_soc_dai *codec_dai, *cpu_dai; 890 struct snd_soc_dai *cpu_dai;
865 const char *platform_name; 891 const char *platform_name;
866 892
867 dev_dbg(card->dev, "ASoC: binding %s at idx %d\n", dai_link->name, num); 893 dev_dbg(card->dev, "ASoC: binding %s at idx %d\n", dai_link->name, num);
@@ -889,42 +915,24 @@ static int soc_bind_dai_link(struct snd_soc_card *card, int num)
889 return -EPROBE_DEFER; 915 return -EPROBE_DEFER;
890 } 916 }
891 917
892 /* Find CODEC from registered CODECs */ 918 /* Find CODEC from registered list */
893 list_for_each_entry(codec, &codec_list, list) { 919 rtd->codec = soc_find_codec(dai_link->codec_of_node,
894 if (dai_link->codec_of_node) { 920 dai_link->codec_name);
895 if (codec->dev->of_node != dai_link->codec_of_node)
896 continue;
897 } else {
898 if (strcmp(codec->name, dai_link->codec_name))
899 continue;
900 }
901
902 rtd->codec = codec;
903
904 /*
905 * CODEC found, so find CODEC DAI from registered DAIs from
906 * this CODEC
907 */
908 list_for_each_entry(codec_dai, &codec->component.dai_list, list) {
909 if (!strcmp(codec_dai->name, dai_link->codec_dai_name)) {
910 rtd->codec_dai = codec_dai;
911 break;
912 }
913 }
914
915 if (!rtd->codec_dai) {
916 dev_err(card->dev, "ASoC: CODEC DAI %s not registered\n",
917 dai_link->codec_dai_name);
918 return -EPROBE_DEFER;
919 }
920 }
921
922 if (!rtd->codec) { 921 if (!rtd->codec) {
923 dev_err(card->dev, "ASoC: CODEC %s not registered\n", 922 dev_err(card->dev, "ASoC: CODEC %s not registered\n",
924 dai_link->codec_name); 923 dai_link->codec_name);
925 return -EPROBE_DEFER; 924 return -EPROBE_DEFER;
926 } 925 }
927 926
927 /* Find CODEC DAI from registered list */
928 rtd->codec_dai = soc_find_codec_dai(rtd->codec,
929 dai_link->codec_dai_name);
930 if (!rtd->codec_dai) {
931 dev_err(card->dev, "ASoC: CODEC DAI %s not registered\n",
932 dai_link->codec_dai_name);
933 return -EPROBE_DEFER;
934 }
935
928 /* if there's no platform we match on the empty platform */ 936 /* if there's no platform we match on the empty platform */
929 platform_name = dai_link->platform_name; 937 platform_name = dai_link->platform_name;
930 if (!platform_name && !dai_link->platform_of_node) 938 if (!platform_name && !dai_link->platform_of_node)
@@ -995,6 +1003,23 @@ static void soc_remove_codec(struct snd_soc_codec *codec)
995 module_put(codec->dev->driver->owner); 1003 module_put(codec->dev->driver->owner);
996} 1004}
997 1005
1006static void soc_remove_codec_dai(struct snd_soc_dai *codec_dai, int order)
1007{
1008 int err;
1009
1010 if (codec_dai && codec_dai->probed &&
1011 codec_dai->driver->remove_order == order) {
1012 if (codec_dai->driver->remove) {
1013 err = codec_dai->driver->remove(codec_dai);
1014 if (err < 0)
1015 dev_err(codec_dai->dev,
1016 "ASoC: failed to remove %s: %d\n",
1017 codec_dai->name, err);
1018 }
1019 codec_dai->probed = 0;
1020 }
1021}
1022
998static void soc_remove_link_dais(struct snd_soc_card *card, int num, int order) 1023static void soc_remove_link_dais(struct snd_soc_card *card, int num, int order)
999{ 1024{
1000 struct snd_soc_pcm_runtime *rtd = &card->rtd[num]; 1025 struct snd_soc_pcm_runtime *rtd = &card->rtd[num];
@@ -1010,18 +1035,7 @@ static void soc_remove_link_dais(struct snd_soc_card *card, int num, int order)
1010 } 1035 }
1011 1036
1012 /* remove the CODEC DAI */ 1037 /* remove the CODEC DAI */
1013 if (codec_dai && codec_dai->probed && 1038 soc_remove_codec_dai(codec_dai, order);
1014 codec_dai->driver->remove_order == order) {
1015 if (codec_dai->driver->remove) {
1016 err = codec_dai->driver->remove(codec_dai);
1017 if (err < 0)
1018 dev_err(codec_dai->dev,
1019 "ASoC: failed to remove %s: %d\n",
1020 codec_dai->name, err);
1021 }
1022 codec_dai->probed = 0;
1023 list_del(&codec_dai->card_list);
1024 }
1025 1039
1026 /* remove the cpu_dai */ 1040 /* remove the cpu_dai */
1027 if (cpu_dai && cpu_dai->probed && 1041 if (cpu_dai && cpu_dai->probed &&
@@ -1034,7 +1048,6 @@ static void soc_remove_link_dais(struct snd_soc_card *card, int num, int order)
1034 cpu_dai->name, err); 1048 cpu_dai->name, err);
1035 } 1049 }
1036 cpu_dai->probed = 0; 1050 cpu_dai->probed = 0;
1037 list_del(&cpu_dai->card_list);
1038 1051
1039 if (!cpu_dai->codec) { 1052 if (!cpu_dai->codec) {
1040 snd_soc_dapm_free(&cpu_dai->dapm); 1053 snd_soc_dapm_free(&cpu_dai->dapm);
@@ -1104,10 +1117,12 @@ static void soc_set_name_prefix(struct snd_soc_card *card,
1104 1117
1105 for (i = 0; i < card->num_configs; i++) { 1118 for (i = 0; i < card->num_configs; i++) {
1106 struct snd_soc_codec_conf *map = &card->codec_conf[i]; 1119 struct snd_soc_codec_conf *map = &card->codec_conf[i];
1107 if (map->dev_name && !strcmp(codec->name, map->dev_name)) { 1120 if (map->of_node && codec->dev->of_node != map->of_node)
1108 codec->name_prefix = map->name_prefix; 1121 continue;
1109 break; 1122 if (map->dev_name && strcmp(codec->name, map->dev_name))
1110 } 1123 continue;
1124 codec->name_prefix = map->name_prefix;
1125 break;
1111 } 1126 }
1112} 1127}
1113 1128
@@ -1127,26 +1142,31 @@ static int soc_probe_codec(struct snd_soc_card *card,
1127 1142
1128 soc_init_codec_debugfs(codec); 1143 soc_init_codec_debugfs(codec);
1129 1144
1130 if (driver->dapm_widgets) 1145 if (driver->dapm_widgets) {
1131 snd_soc_dapm_new_controls(&codec->dapm, driver->dapm_widgets, 1146 ret = snd_soc_dapm_new_controls(&codec->dapm,
1132 driver->num_dapm_widgets); 1147 driver->dapm_widgets,
1148 driver->num_dapm_widgets);
1133 1149
1134 /* Create DAPM widgets for each DAI stream */ 1150 if (ret != 0) {
1135 list_for_each_entry(dai, &codec->component.dai_list, list) 1151 dev_err(codec->dev,
1136 snd_soc_dapm_new_dai_widgets(&codec->dapm, dai); 1152 "Failed to create new controls %d\n", ret);
1153 goto err_probe;
1154 }
1155 }
1137 1156
1138 codec->dapm.idle_bias_off = driver->idle_bias_off; 1157 /* Create DAPM widgets for each DAI stream */
1158 list_for_each_entry(dai, &codec->component.dai_list, list) {
1159 ret = snd_soc_dapm_new_dai_widgets(&codec->dapm, dai);
1139 1160
1140 if (!codec->write && dev_get_regmap(codec->dev, NULL)) { 1161 if (ret != 0) {
1141 /* Set the default I/O up try regmap */
1142 ret = snd_soc_codec_set_cache_io(codec, NULL);
1143 if (ret < 0) {
1144 dev_err(codec->dev, 1162 dev_err(codec->dev,
1145 "Failed to set cache I/O: %d\n", ret); 1163 "Failed to create DAI widgets %d\n", ret);
1146 goto err_probe; 1164 goto err_probe;
1147 } 1165 }
1148 } 1166 }
1149 1167
1168 codec->dapm.idle_bias_off = driver->idle_bias_off;
1169
1150 if (driver->probe) { 1170 if (driver->probe) {
1151 ret = driver->probe(codec); 1171 ret = driver->probe(codec);
1152 if (ret < 0) { 1172 if (ret < 0) {
@@ -1246,6 +1266,50 @@ static void rtd_release(struct device *dev)
1246 kfree(dev); 1266 kfree(dev);
1247} 1267}
1248 1268
1269static int soc_aux_dev_init(struct snd_soc_card *card,
1270 struct snd_soc_codec *codec,
1271 int num)
1272{
1273 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num];
1274 struct snd_soc_pcm_runtime *rtd = &card->rtd_aux[num];
1275 int ret;
1276
1277 rtd->card = card;
1278
1279 /* do machine specific initialization */
1280 if (aux_dev->init) {
1281 ret = aux_dev->init(&codec->dapm);
1282 if (ret < 0)
1283 return ret;
1284 }
1285
1286 rtd->codec = codec;
1287
1288 return 0;
1289}
1290
1291static int soc_dai_link_init(struct snd_soc_card *card,
1292 struct snd_soc_codec *codec,
1293 int num)
1294{
1295 struct snd_soc_dai_link *dai_link = &card->dai_link[num];
1296 struct snd_soc_pcm_runtime *rtd = &card->rtd[num];
1297 int ret;
1298
1299 rtd->card = card;
1300
1301 /* do machine specific initialization */
1302 if (dai_link->init) {
1303 ret = dai_link->init(rtd);
1304 if (ret < 0)
1305 return ret;
1306 }
1307
1308 rtd->codec = codec;
1309
1310 return 0;
1311}
1312
1249static int soc_post_component_init(struct snd_soc_card *card, 1313static int soc_post_component_init(struct snd_soc_card *card,
1250 struct snd_soc_codec *codec, 1314 struct snd_soc_codec *codec,
1251 int num, int dailess) 1315 int num, int dailess)
@@ -1260,26 +1324,20 @@ static int soc_post_component_init(struct snd_soc_card *card,
1260 dai_link = &card->dai_link[num]; 1324 dai_link = &card->dai_link[num];
1261 rtd = &card->rtd[num]; 1325 rtd = &card->rtd[num];
1262 name = dai_link->name; 1326 name = dai_link->name;
1327 ret = soc_dai_link_init(card, codec, num);
1263 } else { 1328 } else {
1264 aux_dev = &card->aux_dev[num]; 1329 aux_dev = &card->aux_dev[num];
1265 rtd = &card->rtd_aux[num]; 1330 rtd = &card->rtd_aux[num];
1266 name = aux_dev->name; 1331 name = aux_dev->name;
1332 ret = soc_aux_dev_init(card, codec, num);
1267 } 1333 }
1268 rtd->card = card;
1269 1334
1270 /* do machine specific initialization */
1271 if (!dailess && dai_link->init)
1272 ret = dai_link->init(rtd);
1273 else if (dailess && aux_dev->init)
1274 ret = aux_dev->init(&codec->dapm);
1275 if (ret < 0) { 1335 if (ret < 0) {
1276 dev_err(card->dev, "ASoC: failed to init %s: %d\n", name, ret); 1336 dev_err(card->dev, "ASoC: failed to init %s: %d\n", name, ret);
1277 return ret; 1337 return ret;
1278 } 1338 }
1279 1339
1280 /* register the rtd device */ 1340 /* register the rtd device */
1281 rtd->codec = codec;
1282
1283 rtd->dev = kzalloc(sizeof(struct device), GFP_KERNEL); 1341 rtd->dev = kzalloc(sizeof(struct device), GFP_KERNEL);
1284 if (!rtd->dev) 1342 if (!rtd->dev)
1285 return -ENOMEM; 1343 return -ENOMEM;
@@ -1366,6 +1424,66 @@ static int soc_probe_link_components(struct snd_soc_card *card, int num,
1366 return 0; 1424 return 0;
1367} 1425}
1368 1426
1427static int soc_probe_codec_dai(struct snd_soc_card *card,
1428 struct snd_soc_dai *codec_dai,
1429 int order)
1430{
1431 int ret;
1432
1433 if (!codec_dai->probed && codec_dai->driver->probe_order == order) {
1434 if (codec_dai->driver->probe) {
1435 ret = codec_dai->driver->probe(codec_dai);
1436 if (ret < 0) {
1437 dev_err(codec_dai->dev,
1438 "ASoC: failed to probe CODEC DAI %s: %d\n",
1439 codec_dai->name, ret);
1440 return ret;
1441 }
1442 }
1443
1444 /* mark codec_dai as probed and add to card dai list */
1445 codec_dai->probed = 1;
1446 }
1447
1448 return 0;
1449}
1450
1451static int soc_link_dai_widgets(struct snd_soc_card *card,
1452 struct snd_soc_dai_link *dai_link,
1453 struct snd_soc_dai *cpu_dai,
1454 struct snd_soc_dai *codec_dai)
1455{
1456 struct snd_soc_dapm_widget *play_w, *capture_w;
1457 int ret;
1458
1459 /* link the DAI widgets */
1460 play_w = codec_dai->playback_widget;
1461 capture_w = cpu_dai->capture_widget;
1462 if (play_w && capture_w) {
1463 ret = snd_soc_dapm_new_pcm(card, dai_link->params,
1464 capture_w, play_w);
1465 if (ret != 0) {
1466 dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
1467 play_w->name, capture_w->name, ret);
1468 return ret;
1469 }
1470 }
1471
1472 play_w = cpu_dai->playback_widget;
1473 capture_w = codec_dai->capture_widget;
1474 if (play_w && capture_w) {
1475 ret = snd_soc_dapm_new_pcm(card, dai_link->params,
1476 capture_w, play_w);
1477 if (ret != 0) {
1478 dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
1479 play_w->name, capture_w->name, ret);
1480 return ret;
1481 }
1482 }
1483
1484 return 0;
1485}
1486
1369static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) 1487static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
1370{ 1488{
1371 struct snd_soc_dai_link *dai_link = &card->dai_link[num]; 1489 struct snd_soc_dai_link *dai_link = &card->dai_link[num];
@@ -1374,7 +1492,6 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
1374 struct snd_soc_platform *platform = rtd->platform; 1492 struct snd_soc_platform *platform = rtd->platform;
1375 struct snd_soc_dai *codec_dai = rtd->codec_dai; 1493 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1376 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 1494 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1377 struct snd_soc_dapm_widget *play_w, *capture_w;
1378 int ret; 1495 int ret;
1379 1496
1380 dev_dbg(card->dev, "ASoC: probe %s dai link %d late %d\n", 1497 dev_dbg(card->dev, "ASoC: probe %s dai link %d late %d\n",
@@ -1410,26 +1527,12 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
1410 } 1527 }
1411 } 1528 }
1412 cpu_dai->probed = 1; 1529 cpu_dai->probed = 1;
1413 /* mark cpu_dai as probed and add to card dai list */
1414 list_add(&cpu_dai->card_list, &card->dai_dev_list);
1415 } 1530 }
1416 1531
1417 /* probe the CODEC DAI */ 1532 /* probe the CODEC DAI */
1418 if (!codec_dai->probed && codec_dai->driver->probe_order == order) { 1533 ret = soc_probe_codec_dai(card, codec_dai, order);
1419 if (codec_dai->driver->probe) { 1534 if (ret)
1420 ret = codec_dai->driver->probe(codec_dai); 1535 return ret;
1421 if (ret < 0) {
1422 dev_err(codec_dai->dev,
1423 "ASoC: failed to probe CODEC DAI %s: %d\n",
1424 codec_dai->name, ret);
1425 return ret;
1426 }
1427 }
1428
1429 /* mark codec_dai as probed and add to card dai list */
1430 codec_dai->probed = 1;
1431 list_add(&codec_dai->card_list, &card->dai_dev_list);
1432 }
1433 1536
1434 /* complete DAI probe during last probe */ 1537 /* complete DAI probe during last probe */
1435 if (order != SND_SOC_COMP_ORDER_LAST) 1538 if (order != SND_SOC_COMP_ORDER_LAST)
@@ -1467,29 +1570,10 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
1467 codec2codec_close_delayed_work); 1570 codec2codec_close_delayed_work);
1468 1571
1469 /* link the DAI widgets */ 1572 /* link the DAI widgets */
1470 play_w = codec_dai->playback_widget; 1573 ret = soc_link_dai_widgets(card, dai_link,
1471 capture_w = cpu_dai->capture_widget; 1574 cpu_dai, codec_dai);
1472 if (play_w && capture_w) { 1575 if (ret)
1473 ret = snd_soc_dapm_new_pcm(card, dai_link->params, 1576 return ret;
1474 capture_w, play_w);
1475 if (ret != 0) {
1476 dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
1477 play_w->name, capture_w->name, ret);
1478 return ret;
1479 }
1480 }
1481
1482 play_w = cpu_dai->playback_widget;
1483 capture_w = codec_dai->capture_widget;
1484 if (play_w && capture_w) {
1485 ret = snd_soc_dapm_new_pcm(card, dai_link->params,
1486 capture_w, play_w);
1487 if (ret != 0) {
1488 dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
1489 play_w->name, capture_w->name, ret);
1490 return ret;
1491 }
1492 }
1493 } 1577 }
1494 } 1578 }
1495 1579
@@ -1501,14 +1585,15 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
1501} 1585}
1502 1586
1503#ifdef CONFIG_SND_SOC_AC97_BUS 1587#ifdef CONFIG_SND_SOC_AC97_BUS
1504static int soc_register_ac97_dai_link(struct snd_soc_pcm_runtime *rtd) 1588static int soc_register_ac97_codec(struct snd_soc_codec *codec,
1589 struct snd_soc_dai *codec_dai)
1505{ 1590{
1506 int ret; 1591 int ret;
1507 1592
1508 /* Only instantiate AC97 if not already done by the adaptor 1593 /* Only instantiate AC97 if not already done by the adaptor
1509 * for the generic AC97 subsystem. 1594 * for the generic AC97 subsystem.
1510 */ 1595 */
1511 if (rtd->codec_dai->driver->ac97_control && !rtd->codec->ac97_registered) { 1596 if (codec_dai->driver->ac97_control && !codec->ac97_registered) {
1512 /* 1597 /*
1513 * It is possible that the AC97 device is already registered to 1598 * It is possible that the AC97 device is already registered to
1514 * the device subsystem. This happens when the device is created 1599 * the device subsystem. This happens when the device is created
@@ -1517,76 +1602,101 @@ static int soc_register_ac97_dai_link(struct snd_soc_pcm_runtime *rtd)
1517 * 1602 *
1518 * In those cases we don't try to register the device again. 1603 * In those cases we don't try to register the device again.
1519 */ 1604 */
1520 if (!rtd->codec->ac97_created) 1605 if (!codec->ac97_created)
1521 return 0; 1606 return 0;
1522 1607
1523 ret = soc_ac97_dev_register(rtd->codec); 1608 ret = soc_ac97_dev_register(codec);
1524 if (ret < 0) { 1609 if (ret < 0) {
1525 dev_err(rtd->codec->dev, 1610 dev_err(codec->dev,
1526 "ASoC: AC97 device register failed: %d\n", ret); 1611 "ASoC: AC97 device register failed: %d\n", ret);
1527 return ret; 1612 return ret;
1528 } 1613 }
1529 1614
1530 rtd->codec->ac97_registered = 1; 1615 codec->ac97_registered = 1;
1531 } 1616 }
1532 return 0; 1617 return 0;
1533} 1618}
1534 1619
1535static void soc_unregister_ac97_dai_link(struct snd_soc_codec *codec) 1620static int soc_register_ac97_dai_link(struct snd_soc_pcm_runtime *rtd)
1621{
1622 return soc_register_ac97_codec(rtd->codec, rtd->codec_dai);
1623}
1624
1625static void soc_unregister_ac97_codec(struct snd_soc_codec *codec)
1536{ 1626{
1537 if (codec->ac97_registered) { 1627 if (codec->ac97_registered) {
1538 soc_ac97_dev_unregister(codec); 1628 soc_ac97_dev_unregister(codec);
1539 codec->ac97_registered = 0; 1629 codec->ac97_registered = 0;
1540 } 1630 }
1541} 1631}
1632
1633static void soc_unregister_ac97_dai_link(struct snd_soc_pcm_runtime *rtd)
1634{
1635 soc_unregister_ac97_codec(rtd->codec);
1636}
1542#endif 1637#endif
1543 1638
1544static int soc_check_aux_dev(struct snd_soc_card *card, int num) 1639static struct snd_soc_codec *soc_find_matching_codec(struct snd_soc_card *card,
1640 int num)
1545{ 1641{
1546 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num]; 1642 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num];
1547 struct snd_soc_codec *codec; 1643 struct snd_soc_codec *codec;
1548 1644
1549 /* find CODEC from registered CODECs*/ 1645 /* find CODEC from registered CODECs */
1550 list_for_each_entry(codec, &codec_list, list) { 1646 list_for_each_entry(codec, &codec_list, list) {
1551 if (!strcmp(codec->name, aux_dev->codec_name)) 1647 if (aux_dev->codec_of_node &&
1552 return 0; 1648 (codec->dev->of_node != aux_dev->codec_of_node))
1649 continue;
1650 if (aux_dev->codec_name && strcmp(codec->name, aux_dev->codec_name))
1651 continue;
1652 return codec;
1553 } 1653 }
1554 1654
1555 dev_err(card->dev, "ASoC: %s not registered\n", aux_dev->codec_name); 1655 return NULL;
1656}
1556 1657
1658static int soc_check_aux_dev(struct snd_soc_card *card, int num)
1659{
1660 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num];
1661 const char *codecname = aux_dev->codec_name;
1662 struct snd_soc_codec *codec = soc_find_matching_codec(card, num);
1663
1664 if (codec)
1665 return 0;
1666 if (aux_dev->codec_of_node)
1667 codecname = of_node_full_name(aux_dev->codec_of_node);
1668
1669 dev_err(card->dev, "ASoC: %s not registered\n", codecname);
1557 return -EPROBE_DEFER; 1670 return -EPROBE_DEFER;
1558} 1671}
1559 1672
1560static int soc_probe_aux_dev(struct snd_soc_card *card, int num) 1673static int soc_probe_aux_dev(struct snd_soc_card *card, int num)
1561{ 1674{
1562 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num]; 1675 struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num];
1563 struct snd_soc_codec *codec; 1676 const char *codecname = aux_dev->codec_name;
1564 int ret = -ENODEV; 1677 int ret = -ENODEV;
1678 struct snd_soc_codec *codec = soc_find_matching_codec(card, num);
1565 1679
1566 /* find CODEC from registered CODECs*/ 1680 if (!codec) {
1567 list_for_each_entry(codec, &codec_list, list) { 1681 if (aux_dev->codec_of_node)
1568 if (!strcmp(codec->name, aux_dev->codec_name)) { 1682 codecname = of_node_full_name(aux_dev->codec_of_node);
1569 if (codec->probed) { 1683
1570 dev_err(codec->dev, 1684 /* codec not found */
1571 "ASoC: codec already probed"); 1685 dev_err(card->dev, "ASoC: codec %s not found", codecname);
1572 ret = -EBUSY; 1686 return -EPROBE_DEFER;
1573 goto out; 1687 }
1574 } 1688
1575 goto found; 1689 if (codec->probed) {
1576 } 1690 dev_err(codec->dev, "ASoC: codec already probed");
1691 return -EBUSY;
1577 } 1692 }
1578 /* codec not found */
1579 dev_err(card->dev, "ASoC: codec %s not found", aux_dev->codec_name);
1580 return -EPROBE_DEFER;
1581 1693
1582found:
1583 ret = soc_probe_codec(card, codec); 1694 ret = soc_probe_codec(card, codec);
1584 if (ret < 0) 1695 if (ret < 0)
1585 return ret; 1696 return ret;
1586 1697
1587 ret = soc_post_component_init(card, codec, num, 1); 1698 ret = soc_post_component_init(card, codec, num, 1);
1588 1699
1589out:
1590 return ret; 1700 return ret;
1591} 1701}
1592 1702
@@ -1837,7 +1947,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card)
1837 dev_err(card->dev, 1947 dev_err(card->dev,
1838 "ASoC: failed to register AC97: %d\n", ret); 1948 "ASoC: failed to register AC97: %d\n", ret);
1839 while (--i >= 0) 1949 while (--i >= 0)
1840 soc_unregister_ac97_dai_link(card->rtd[i].codec); 1950 soc_unregister_ac97_dai_link(&card->rtd[i]);
1841 goto probe_aux_dev_err; 1951 goto probe_aux_dev_err;
1842 } 1952 }
1843 } 1953 }
@@ -1980,92 +2090,6 @@ static struct platform_driver soc_driver = {
1980}; 2090};
1981 2091
1982/** 2092/**
1983 * snd_soc_codec_volatile_register: Report if a register is volatile.
1984 *
1985 * @codec: CODEC to query.
1986 * @reg: Register to query.
1987 *
1988 * Boolean function indiciating if a CODEC register is volatile.
1989 */
1990int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
1991 unsigned int reg)
1992{
1993 if (codec->volatile_register)
1994 return codec->volatile_register(codec, reg);
1995 else
1996 return 0;
1997}
1998EXPORT_SYMBOL_GPL(snd_soc_codec_volatile_register);
1999
2000/**
2001 * snd_soc_codec_readable_register: Report if a register is readable.
2002 *
2003 * @codec: CODEC to query.
2004 * @reg: Register to query.
2005 *
2006 * Boolean function indicating if a CODEC register is readable.
2007 */
2008int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
2009 unsigned int reg)
2010{
2011 if (codec->readable_register)
2012 return codec->readable_register(codec, reg);
2013 else
2014 return 1;
2015}
2016EXPORT_SYMBOL_GPL(snd_soc_codec_readable_register);
2017
2018/**
2019 * snd_soc_codec_writable_register: Report if a register is writable.
2020 *
2021 * @codec: CODEC to query.
2022 * @reg: Register to query.
2023 *
2024 * Boolean function indicating if a CODEC register is writable.
2025 */
2026int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
2027 unsigned int reg)
2028{
2029 if (codec->writable_register)
2030 return codec->writable_register(codec, reg);
2031 else
2032 return 1;
2033}
2034EXPORT_SYMBOL_GPL(snd_soc_codec_writable_register);
2035
2036int snd_soc_platform_read(struct snd_soc_platform *platform,
2037 unsigned int reg)
2038{
2039 unsigned int ret;
2040
2041 if (!platform->driver->read) {
2042 dev_err(platform->dev, "ASoC: platform has no read back\n");
2043 return -1;
2044 }
2045
2046 ret = platform->driver->read(platform, reg);
2047 dev_dbg(platform->dev, "read %x => %x\n", reg, ret);
2048 trace_snd_soc_preg_read(platform, reg, ret);
2049
2050 return ret;
2051}
2052EXPORT_SYMBOL_GPL(snd_soc_platform_read);
2053
2054int snd_soc_platform_write(struct snd_soc_platform *platform,
2055 unsigned int reg, unsigned int val)
2056{
2057 if (!platform->driver->write) {
2058 dev_err(platform->dev, "ASoC: platform has no write back\n");
2059 return -1;
2060 }
2061
2062 dev_dbg(platform->dev, "write %x = %x\n", reg, val);
2063 trace_snd_soc_preg_write(platform, reg, val);
2064 return platform->driver->write(platform, reg, val);
2065}
2066EXPORT_SYMBOL_GPL(snd_soc_platform_write);
2067
2068/**
2069 * snd_soc_new_ac97_codec - initailise AC97 device 2093 * snd_soc_new_ac97_codec - initailise AC97 device
2070 * @codec: audio codec 2094 * @codec: audio codec
2071 * @ops: AC97 bus operations 2095 * @ops: AC97 bus operations
@@ -2153,28 +2177,28 @@ static int snd_soc_ac97_parse_pinctl(struct device *dev,
2153 p = devm_pinctrl_get(dev); 2177 p = devm_pinctrl_get(dev);
2154 if (IS_ERR(p)) { 2178 if (IS_ERR(p)) {
2155 dev_err(dev, "Failed to get pinctrl\n"); 2179 dev_err(dev, "Failed to get pinctrl\n");
2156 return PTR_RET(p); 2180 return PTR_ERR(p);
2157 } 2181 }
2158 cfg->pctl = p; 2182 cfg->pctl = p;
2159 2183
2160 state = pinctrl_lookup_state(p, "ac97-reset"); 2184 state = pinctrl_lookup_state(p, "ac97-reset");
2161 if (IS_ERR(state)) { 2185 if (IS_ERR(state)) {
2162 dev_err(dev, "Can't find pinctrl state ac97-reset\n"); 2186 dev_err(dev, "Can't find pinctrl state ac97-reset\n");
2163 return PTR_RET(state); 2187 return PTR_ERR(state);
2164 } 2188 }
2165 cfg->pstate_reset = state; 2189 cfg->pstate_reset = state;
2166 2190
2167 state = pinctrl_lookup_state(p, "ac97-warm-reset"); 2191 state = pinctrl_lookup_state(p, "ac97-warm-reset");
2168 if (IS_ERR(state)) { 2192 if (IS_ERR(state)) {
2169 dev_err(dev, "Can't find pinctrl state ac97-warm-reset\n"); 2193 dev_err(dev, "Can't find pinctrl state ac97-warm-reset\n");
2170 return PTR_RET(state); 2194 return PTR_ERR(state);
2171 } 2195 }
2172 cfg->pstate_warm_reset = state; 2196 cfg->pstate_warm_reset = state;
2173 2197
2174 state = pinctrl_lookup_state(p, "ac97-running"); 2198 state = pinctrl_lookup_state(p, "ac97-running");
2175 if (IS_ERR(state)) { 2199 if (IS_ERR(state)) {
2176 dev_err(dev, "Can't find pinctrl state ac97-running\n"); 2200 dev_err(dev, "Can't find pinctrl state ac97-running\n");
2177 return PTR_RET(state); 2201 return PTR_ERR(state);
2178 } 2202 }
2179 cfg->pstate_run = state; 2203 cfg->pstate_run = state;
2180 2204
@@ -2273,7 +2297,7 @@ void snd_soc_free_ac97_codec(struct snd_soc_codec *codec)
2273{ 2297{
2274 mutex_lock(&codec->mutex); 2298 mutex_lock(&codec->mutex);
2275#ifdef CONFIG_SND_SOC_AC97_BUS 2299#ifdef CONFIG_SND_SOC_AC97_BUS
2276 soc_unregister_ac97_dai_link(codec); 2300 soc_unregister_ac97_codec(codec);
2277#endif 2301#endif
2278 kfree(codec->ac97->bus); 2302 kfree(codec->ac97->bus);
2279 kfree(codec->ac97); 2303 kfree(codec->ac97);
@@ -2283,118 +2307,6 @@ void snd_soc_free_ac97_codec(struct snd_soc_codec *codec)
2283} 2307}
2284EXPORT_SYMBOL_GPL(snd_soc_free_ac97_codec); 2308EXPORT_SYMBOL_GPL(snd_soc_free_ac97_codec);
2285 2309
2286unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg)
2287{
2288 unsigned int ret;
2289
2290 ret = codec->read(codec, reg);
2291 dev_dbg(codec->dev, "read %x => %x\n", reg, ret);
2292 trace_snd_soc_reg_read(codec, reg, ret);
2293
2294 return ret;
2295}
2296EXPORT_SYMBOL_GPL(snd_soc_read);
2297
2298unsigned int snd_soc_write(struct snd_soc_codec *codec,
2299 unsigned int reg, unsigned int val)
2300{
2301 dev_dbg(codec->dev, "write %x = %x\n", reg, val);
2302 trace_snd_soc_reg_write(codec, reg, val);
2303 return codec->write(codec, reg, val);
2304}
2305EXPORT_SYMBOL_GPL(snd_soc_write);
2306
2307/**
2308 * snd_soc_update_bits - update codec register bits
2309 * @codec: audio codec
2310 * @reg: codec register
2311 * @mask: register mask
2312 * @value: new value
2313 *
2314 * Writes new register value.
2315 *
2316 * Returns 1 for change, 0 for no change, or negative error code.
2317 */
2318int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
2319 unsigned int mask, unsigned int value)
2320{
2321 bool change;
2322 unsigned int old, new;
2323 int ret;
2324
2325 if (codec->using_regmap) {
2326 ret = regmap_update_bits_check(codec->control_data, reg,
2327 mask, value, &change);
2328 } else {
2329 ret = snd_soc_read(codec, reg);
2330 if (ret < 0)
2331 return ret;
2332
2333 old = ret;
2334 new = (old & ~mask) | (value & mask);
2335 change = old != new;
2336 if (change)
2337 ret = snd_soc_write(codec, reg, new);
2338 }
2339
2340 if (ret < 0)
2341 return ret;
2342
2343 return change;
2344}
2345EXPORT_SYMBOL_GPL(snd_soc_update_bits);
2346
2347/**
2348 * snd_soc_update_bits_locked - update codec register bits
2349 * @codec: audio codec
2350 * @reg: codec register
2351 * @mask: register mask
2352 * @value: new value
2353 *
2354 * Writes new register value, and takes the codec mutex.
2355 *
2356 * Returns 1 for change else 0.
2357 */
2358int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
2359 unsigned short reg, unsigned int mask,
2360 unsigned int value)
2361{
2362 int change;
2363
2364 mutex_lock(&codec->mutex);
2365 change = snd_soc_update_bits(codec, reg, mask, value);
2366 mutex_unlock(&codec->mutex);
2367
2368 return change;
2369}
2370EXPORT_SYMBOL_GPL(snd_soc_update_bits_locked);
2371
2372/**
2373 * snd_soc_test_bits - test register for change
2374 * @codec: audio codec
2375 * @reg: codec register
2376 * @mask: register mask
2377 * @value: new value
2378 *
2379 * Tests a register with a new value and checks if the new value is
2380 * different from the old value.
2381 *
2382 * Returns 1 for change else 0.
2383 */
2384int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
2385 unsigned int mask, unsigned int value)
2386{
2387 int change;
2388 unsigned int old, new;
2389
2390 old = snd_soc_read(codec, reg);
2391 new = (old & ~mask) | value;
2392 change = old != new;
2393
2394 return change;
2395}
2396EXPORT_SYMBOL_GPL(snd_soc_test_bits);
2397
2398/** 2310/**
2399 * snd_soc_cnew - create new control 2311 * snd_soc_cnew - create new control
2400 * @_template: control template 2312 * @_template: control template
@@ -2491,7 +2403,7 @@ int snd_soc_add_codec_controls(struct snd_soc_codec *codec,
2491 struct snd_card *card = codec->card->snd_card; 2403 struct snd_card *card = codec->card->snd_card;
2492 2404
2493 return snd_soc_add_controls(card, codec->dev, controls, num_controls, 2405 return snd_soc_add_controls(card, codec->dev, controls, num_controls,
2494 codec->name_prefix, codec); 2406 codec->name_prefix, &codec->component);
2495} 2407}
2496EXPORT_SYMBOL_GPL(snd_soc_add_codec_controls); 2408EXPORT_SYMBOL_GPL(snd_soc_add_codec_controls);
2497 2409
@@ -2511,7 +2423,7 @@ int snd_soc_add_platform_controls(struct snd_soc_platform *platform,
2511 struct snd_card *card = platform->card->snd_card; 2423 struct snd_card *card = platform->card->snd_card;
2512 2424
2513 return snd_soc_add_controls(card, platform->dev, controls, num_controls, 2425 return snd_soc_add_controls(card, platform->dev, controls, num_controls,
2514 NULL, platform); 2426 NULL, &platform->component);
2515} 2427}
2516EXPORT_SYMBOL_GPL(snd_soc_add_platform_controls); 2428EXPORT_SYMBOL_GPL(snd_soc_add_platform_controls);
2517 2429
@@ -2595,12 +2507,15 @@ EXPORT_SYMBOL_GPL(snd_soc_info_enum_double);
2595int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, 2507int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol) 2508 struct snd_ctl_elem_value *ucontrol)
2597{ 2509{
2598 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2510 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2599 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2511 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
2600 unsigned int val, item; 2512 unsigned int val, item;
2601 unsigned int reg_val; 2513 unsigned int reg_val;
2514 int ret;
2602 2515
2603 reg_val = snd_soc_read(codec, e->reg); 2516 ret = snd_soc_component_read(component, e->reg, &reg_val);
2517 if (ret)
2518 return ret;
2604 val = (reg_val >> e->shift_l) & e->mask; 2519 val = (reg_val >> e->shift_l) & e->mask;
2605 item = snd_soc_enum_val_to_item(e, val); 2520 item = snd_soc_enum_val_to_item(e, val);
2606 ucontrol->value.enumerated.item[0] = item; 2521 ucontrol->value.enumerated.item[0] = item;
@@ -2626,7 +2541,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_enum_double);
2626int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, 2541int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
2627 struct snd_ctl_elem_value *ucontrol) 2542 struct snd_ctl_elem_value *ucontrol)
2628{ 2543{
2629 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2544 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2630 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2545 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
2631 unsigned int *item = ucontrol->value.enumerated.item; 2546 unsigned int *item = ucontrol->value.enumerated.item;
2632 unsigned int val; 2547 unsigned int val;
@@ -2643,38 +2558,48 @@ int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
2643 mask |= e->mask << e->shift_r; 2558 mask |= e->mask << e->shift_r;
2644 } 2559 }
2645 2560
2646 return snd_soc_update_bits_locked(codec, e->reg, mask, val); 2561 return snd_soc_component_update_bits(component, e->reg, mask, val);
2647} 2562}
2648EXPORT_SYMBOL_GPL(snd_soc_put_enum_double); 2563EXPORT_SYMBOL_GPL(snd_soc_put_enum_double);
2649 2564
2650/** 2565/**
2651 * snd_soc_read_signed - Read a codec register and interprete as signed value 2566 * snd_soc_read_signed - Read a codec register and interprete as signed value
2652 * @codec: codec 2567 * @component: component
2653 * @reg: Register to read 2568 * @reg: Register to read
2654 * @mask: Mask to use after shifting the register value 2569 * @mask: Mask to use after shifting the register value
2655 * @shift: Right shift of register value 2570 * @shift: Right shift of register value
2656 * @sign_bit: Bit that describes if a number is negative or not. 2571 * @sign_bit: Bit that describes if a number is negative or not.
2572 * @signed_val: Pointer to where the read value should be stored
2657 * 2573 *
2658 * This functions reads a codec register. The register value is shifted right 2574 * This functions reads a codec register. The register value is shifted right
2659 * by 'shift' bits and masked with the given 'mask'. Afterwards it translates 2575 * by 'shift' bits and masked with the given 'mask'. Afterwards it translates
2660 * the given registervalue into a signed integer if sign_bit is non-zero. 2576 * the given registervalue into a signed integer if sign_bit is non-zero.
2661 * 2577 *
2662 * Returns the register value as signed int. 2578 * Returns 0 on sucess, otherwise an error value
2663 */ 2579 */
2664static int snd_soc_read_signed(struct snd_soc_codec *codec, unsigned int reg, 2580static int snd_soc_read_signed(struct snd_soc_component *component,
2665 unsigned int mask, unsigned int shift, unsigned int sign_bit) 2581 unsigned int reg, unsigned int mask, unsigned int shift,
2582 unsigned int sign_bit, int *signed_val)
2666{ 2583{
2667 int ret; 2584 int ret;
2668 unsigned int val; 2585 unsigned int val;
2669 2586
2670 val = (snd_soc_read(codec, reg) >> shift) & mask; 2587 ret = snd_soc_component_read(component, reg, &val);
2588 if (ret < 0)
2589 return ret;
2671 2590
2672 if (!sign_bit) 2591 val = (val >> shift) & mask;
2673 return val; 2592
2593 if (!sign_bit) {
2594 *signed_val = val;
2595 return 0;
2596 }
2674 2597
2675 /* non-negative number */ 2598 /* non-negative number */
2676 if (!(val & BIT(sign_bit))) 2599 if (!(val & BIT(sign_bit))) {
2677 return val; 2600 *signed_val = val;
2601 return 0;
2602 }
2678 2603
2679 ret = val; 2604 ret = val;
2680 2605
@@ -2686,7 +2611,9 @@ static int snd_soc_read_signed(struct snd_soc_codec *codec, unsigned int reg,
2686 */ 2611 */
2687 ret |= ~((int)(BIT(sign_bit) - 1)); 2612 ret |= ~((int)(BIT(sign_bit) - 1));
2688 2613
2689 return ret; 2614 *signed_val = ret;
2615
2616 return 0;
2690} 2617}
2691 2618
2692/** 2619/**
@@ -2735,9 +2662,9 @@ EXPORT_SYMBOL_GPL(snd_soc_info_volsw);
2735int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, 2662int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
2736 struct snd_ctl_elem_value *ucontrol) 2663 struct snd_ctl_elem_value *ucontrol)
2737{ 2664{
2665 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2738 struct soc_mixer_control *mc = 2666 struct soc_mixer_control *mc =
2739 (struct soc_mixer_control *)kcontrol->private_value; 2667 (struct soc_mixer_control *)kcontrol->private_value;
2740 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2741 unsigned int reg = mc->reg; 2668 unsigned int reg = mc->reg;
2742 unsigned int reg2 = mc->rreg; 2669 unsigned int reg2 = mc->rreg;
2743 unsigned int shift = mc->shift; 2670 unsigned int shift = mc->shift;
@@ -2747,25 +2674,32 @@ int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
2747 int sign_bit = mc->sign_bit; 2674 int sign_bit = mc->sign_bit;
2748 unsigned int mask = (1 << fls(max)) - 1; 2675 unsigned int mask = (1 << fls(max)) - 1;
2749 unsigned int invert = mc->invert; 2676 unsigned int invert = mc->invert;
2677 int val;
2678 int ret;
2750 2679
2751 if (sign_bit) 2680 if (sign_bit)
2752 mask = BIT(sign_bit + 1) - 1; 2681 mask = BIT(sign_bit + 1) - 1;
2753 2682
2754 ucontrol->value.integer.value[0] = snd_soc_read_signed(codec, reg, mask, 2683 ret = snd_soc_read_signed(component, reg, mask, shift, sign_bit, &val);
2755 shift, sign_bit) - min; 2684 if (ret)
2685 return ret;
2686
2687 ucontrol->value.integer.value[0] = val - min;
2756 if (invert) 2688 if (invert)
2757 ucontrol->value.integer.value[0] = 2689 ucontrol->value.integer.value[0] =
2758 max - ucontrol->value.integer.value[0]; 2690 max - ucontrol->value.integer.value[0];
2759 2691
2760 if (snd_soc_volsw_is_stereo(mc)) { 2692 if (snd_soc_volsw_is_stereo(mc)) {
2761 if (reg == reg2) 2693 if (reg == reg2)
2762 ucontrol->value.integer.value[1] = 2694 ret = snd_soc_read_signed(component, reg, mask, rshift,
2763 snd_soc_read_signed(codec, reg, mask, rshift, 2695 sign_bit, &val);
2764 sign_bit) - min;
2765 else 2696 else
2766 ucontrol->value.integer.value[1] = 2697 ret = snd_soc_read_signed(component, reg2, mask, shift,
2767 snd_soc_read_signed(codec, reg2, mask, shift, 2698 sign_bit, &val);
2768 sign_bit) - min; 2699 if (ret)
2700 return ret;
2701
2702 ucontrol->value.integer.value[1] = val - min;
2769 if (invert) 2703 if (invert)
2770 ucontrol->value.integer.value[1] = 2704 ucontrol->value.integer.value[1] =
2771 max - ucontrol->value.integer.value[1]; 2705 max - ucontrol->value.integer.value[1];
@@ -2788,9 +2722,9 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw);
2788int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, 2722int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
2789 struct snd_ctl_elem_value *ucontrol) 2723 struct snd_ctl_elem_value *ucontrol)
2790{ 2724{
2725 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2791 struct soc_mixer_control *mc = 2726 struct soc_mixer_control *mc =
2792 (struct soc_mixer_control *)kcontrol->private_value; 2727 (struct soc_mixer_control *)kcontrol->private_value;
2793 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2794 unsigned int reg = mc->reg; 2728 unsigned int reg = mc->reg;
2795 unsigned int reg2 = mc->rreg; 2729 unsigned int reg2 = mc->rreg;
2796 unsigned int shift = mc->shift; 2730 unsigned int shift = mc->shift;
@@ -2825,12 +2759,13 @@ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
2825 type_2r = true; 2759 type_2r = true;
2826 } 2760 }
2827 } 2761 }
2828 err = snd_soc_update_bits_locked(codec, reg, val_mask, val); 2762 err = snd_soc_component_update_bits(component, reg, val_mask, val);
2829 if (err < 0) 2763 if (err < 0)
2830 return err; 2764 return err;
2831 2765
2832 if (type_2r) 2766 if (type_2r)
2833 err = snd_soc_update_bits_locked(codec, reg2, val_mask, val2); 2767 err = snd_soc_component_update_bits(component, reg2, val_mask,
2768 val2);
2834 2769
2835 return err; 2770 return err;
2836} 2771}
@@ -2849,10 +2784,9 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw);
2849int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, 2784int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
2850 struct snd_ctl_elem_value *ucontrol) 2785 struct snd_ctl_elem_value *ucontrol)
2851{ 2786{
2852 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2787 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2853 struct soc_mixer_control *mc = 2788 struct soc_mixer_control *mc =
2854 (struct soc_mixer_control *)kcontrol->private_value; 2789 (struct soc_mixer_control *)kcontrol->private_value;
2855
2856 unsigned int reg = mc->reg; 2790 unsigned int reg = mc->reg;
2857 unsigned int reg2 = mc->rreg; 2791 unsigned int reg2 = mc->rreg;
2858 unsigned int shift = mc->shift; 2792 unsigned int shift = mc->shift;
@@ -2860,13 +2794,23 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
2860 int max = mc->max; 2794 int max = mc->max;
2861 int min = mc->min; 2795 int min = mc->min;
2862 int mask = (1 << (fls(min + max) - 1)) - 1; 2796 int mask = (1 << (fls(min + max) - 1)) - 1;
2797 unsigned int val;
2798 int ret;
2863 2799
2864 ucontrol->value.integer.value[0] = 2800 ret = snd_soc_component_read(component, reg, &val);
2865 ((snd_soc_read(codec, reg) >> shift) - min) & mask; 2801 if (ret < 0)
2802 return ret;
2866 2803
2867 if (snd_soc_volsw_is_stereo(mc)) 2804 ucontrol->value.integer.value[0] = ((val >> shift) - min) & mask;
2868 ucontrol->value.integer.value[1] = 2805
2869 ((snd_soc_read(codec, reg2) >> rshift) - min) & mask; 2806 if (snd_soc_volsw_is_stereo(mc)) {
2807 ret = snd_soc_component_read(component, reg2, &val);
2808 if (ret < 0)
2809 return ret;
2810
2811 val = ((val >> rshift) - min) & mask;
2812 ucontrol->value.integer.value[1] = val;
2813 }
2870 2814
2871 return 0; 2815 return 0;
2872} 2816}
@@ -2884,7 +2828,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw_sx);
2884int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, 2828int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
2885 struct snd_ctl_elem_value *ucontrol) 2829 struct snd_ctl_elem_value *ucontrol)
2886{ 2830{
2887 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2831 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2888 struct soc_mixer_control *mc = 2832 struct soc_mixer_control *mc =
2889 (struct soc_mixer_control *)kcontrol->private_value; 2833 (struct soc_mixer_control *)kcontrol->private_value;
2890 2834
@@ -2896,13 +2840,13 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
2896 int min = mc->min; 2840 int min = mc->min;
2897 int mask = (1 << (fls(min + max) - 1)) - 1; 2841 int mask = (1 << (fls(min + max) - 1)) - 1;
2898 int err = 0; 2842 int err = 0;
2899 unsigned short val, val_mask, val2 = 0; 2843 unsigned int val, val_mask, val2 = 0;
2900 2844
2901 val_mask = mask << shift; 2845 val_mask = mask << shift;
2902 val = (ucontrol->value.integer.value[0] + min) & mask; 2846 val = (ucontrol->value.integer.value[0] + min) & mask;
2903 val = val << shift; 2847 val = val << shift;
2904 2848
2905 err = snd_soc_update_bits_locked(codec, reg, val_mask, val); 2849 err = snd_soc_component_update_bits(component, reg, val_mask, val);
2906 if (err < 0) 2850 if (err < 0)
2907 return err; 2851 return err;
2908 2852
@@ -2911,10 +2855,10 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
2911 val2 = (ucontrol->value.integer.value[1] + min) & mask; 2855 val2 = (ucontrol->value.integer.value[1] + min) & mask;
2912 val2 = val2 << rshift; 2856 val2 = val2 << rshift;
2913 2857
2914 if (snd_soc_update_bits_locked(codec, reg2, val_mask, val2)) 2858 err = snd_soc_component_update_bits(component, reg2, val_mask,
2915 return err; 2859 val2);
2916 } 2860 }
2917 return 0; 2861 return err;
2918} 2862}
2919EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); 2863EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx);
2920 2864
@@ -2961,10 +2905,15 @@ int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
2961{ 2905{
2962 struct soc_mixer_control *mc = 2906 struct soc_mixer_control *mc =
2963 (struct soc_mixer_control *)kcontrol->private_value; 2907 (struct soc_mixer_control *)kcontrol->private_value;
2964 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2908 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2965 unsigned int reg = mc->reg; 2909 unsigned int reg = mc->reg;
2910 unsigned int val;
2966 int min = mc->min; 2911 int min = mc->min;
2967 int val = snd_soc_read(codec, reg); 2912 int ret;
2913
2914 ret = snd_soc_component_read(component, reg, &val);
2915 if (ret)
2916 return ret;
2968 2917
2969 ucontrol->value.integer.value[0] = 2918 ucontrol->value.integer.value[0] =
2970 ((signed char)(val & 0xff))-min; 2919 ((signed char)(val & 0xff))-min;
@@ -2988,7 +2937,7 @@ int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
2988{ 2937{
2989 struct soc_mixer_control *mc = 2938 struct soc_mixer_control *mc =
2990 (struct soc_mixer_control *)kcontrol->private_value; 2939 (struct soc_mixer_control *)kcontrol->private_value;
2991 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2940 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
2992 unsigned int reg = mc->reg; 2941 unsigned int reg = mc->reg;
2993 int min = mc->min; 2942 int min = mc->min;
2994 unsigned int val; 2943 unsigned int val;
@@ -2996,7 +2945,7 @@ int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
2996 val = (ucontrol->value.integer.value[0]+min) & 0xff; 2945 val = (ucontrol->value.integer.value[0]+min) & 0xff;
2997 val |= ((ucontrol->value.integer.value[1]+min) & 0xff) << 8; 2946 val |= ((ucontrol->value.integer.value[1]+min) & 0xff) << 8;
2998 2947
2999 return snd_soc_update_bits_locked(codec, reg, 0xffff, val); 2948 return snd_soc_component_update_bits(component, reg, 0xffff, val);
3000} 2949}
3001EXPORT_SYMBOL_GPL(snd_soc_put_volsw_s8); 2950EXPORT_SYMBOL_GPL(snd_soc_put_volsw_s8);
3002 2951
@@ -3045,7 +2994,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
3045{ 2994{
3046 struct soc_mixer_control *mc = 2995 struct soc_mixer_control *mc =
3047 (struct soc_mixer_control *)kcontrol->private_value; 2996 (struct soc_mixer_control *)kcontrol->private_value;
3048 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2997 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3049 unsigned int reg = mc->reg; 2998 unsigned int reg = mc->reg;
3050 unsigned int rreg = mc->rreg; 2999 unsigned int rreg = mc->rreg;
3051 unsigned int shift = mc->shift; 3000 unsigned int shift = mc->shift;
@@ -3062,7 +3011,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
3062 val_mask = mask << shift; 3011 val_mask = mask << shift;
3063 val = val << shift; 3012 val = val << shift;
3064 3013
3065 ret = snd_soc_update_bits_locked(codec, reg, val_mask, val); 3014 ret = snd_soc_component_update_bits(component, reg, val_mask, val);
3066 if (ret < 0) 3015 if (ret < 0)
3067 return ret; 3016 return ret;
3068 3017
@@ -3073,7 +3022,8 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
3073 val_mask = mask << shift; 3022 val_mask = mask << shift;
3074 val = val << shift; 3023 val = val << shift;
3075 3024
3076 ret = snd_soc_update_bits_locked(codec, rreg, val_mask, val); 3025 ret = snd_soc_component_update_bits(component, rreg, val_mask,
3026 val);
3077 } 3027 }
3078 3028
3079 return ret; 3029 return ret;
@@ -3092,9 +3042,9 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw_range);
3092int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol, 3042int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
3093 struct snd_ctl_elem_value *ucontrol) 3043 struct snd_ctl_elem_value *ucontrol)
3094{ 3044{
3045 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3095 struct soc_mixer_control *mc = 3046 struct soc_mixer_control *mc =
3096 (struct soc_mixer_control *)kcontrol->private_value; 3047 (struct soc_mixer_control *)kcontrol->private_value;
3097 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3098 unsigned int reg = mc->reg; 3048 unsigned int reg = mc->reg;
3099 unsigned int rreg = mc->rreg; 3049 unsigned int rreg = mc->rreg;
3100 unsigned int shift = mc->shift; 3050 unsigned int shift = mc->shift;
@@ -3102,9 +3052,14 @@ int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
3102 int max = mc->max; 3052 int max = mc->max;
3103 unsigned int mask = (1 << fls(max)) - 1; 3053 unsigned int mask = (1 << fls(max)) - 1;
3104 unsigned int invert = mc->invert; 3054 unsigned int invert = mc->invert;
3055 unsigned int val;
3056 int ret;
3105 3057
3106 ucontrol->value.integer.value[0] = 3058 ret = snd_soc_component_read(component, reg, &val);
3107 (snd_soc_read(codec, reg) >> shift) & mask; 3059 if (ret)
3060 return ret;
3061
3062 ucontrol->value.integer.value[0] = (val >> shift) & mask;
3108 if (invert) 3063 if (invert)
3109 ucontrol->value.integer.value[0] = 3064 ucontrol->value.integer.value[0] =
3110 max - ucontrol->value.integer.value[0]; 3065 max - ucontrol->value.integer.value[0];
@@ -3112,8 +3067,11 @@ int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
3112 ucontrol->value.integer.value[0] - min; 3067 ucontrol->value.integer.value[0] - min;
3113 3068
3114 if (snd_soc_volsw_is_stereo(mc)) { 3069 if (snd_soc_volsw_is_stereo(mc)) {
3115 ucontrol->value.integer.value[1] = 3070 ret = snd_soc_component_read(component, rreg, &val);
3116 (snd_soc_read(codec, rreg) >> shift) & mask; 3071 if (ret)
3072 return ret;
3073
3074 ucontrol->value.integer.value[1] = (val >> shift) & mask;
3117 if (invert) 3075 if (invert)
3118 ucontrol->value.integer.value[1] = 3076 ucontrol->value.integer.value[1] =
3119 max - ucontrol->value.integer.value[1]; 3077 max - ucontrol->value.integer.value[1];
@@ -3167,11 +3125,11 @@ EXPORT_SYMBOL_GPL(snd_soc_limit_volume);
3167int snd_soc_bytes_info(struct snd_kcontrol *kcontrol, 3125int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
3168 struct snd_ctl_elem_info *uinfo) 3126 struct snd_ctl_elem_info *uinfo)
3169{ 3127{
3170 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 3128 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3171 struct soc_bytes *params = (void *)kcontrol->private_value; 3129 struct soc_bytes *params = (void *)kcontrol->private_value;
3172 3130
3173 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 3131 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
3174 uinfo->count = params->num_regs * codec->val_bytes; 3132 uinfo->count = params->num_regs * component->val_bytes;
3175 3133
3176 return 0; 3134 return 0;
3177} 3135}
@@ -3180,20 +3138,20 @@ EXPORT_SYMBOL_GPL(snd_soc_bytes_info);
3180int snd_soc_bytes_get(struct snd_kcontrol *kcontrol, 3138int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
3181 struct snd_ctl_elem_value *ucontrol) 3139 struct snd_ctl_elem_value *ucontrol)
3182{ 3140{
3141 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3183 struct soc_bytes *params = (void *)kcontrol->private_value; 3142 struct soc_bytes *params = (void *)kcontrol->private_value;
3184 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3185 int ret; 3143 int ret;
3186 3144
3187 if (codec->using_regmap) 3145 if (component->regmap)
3188 ret = regmap_raw_read(codec->control_data, params->base, 3146 ret = regmap_raw_read(component->regmap, params->base,
3189 ucontrol->value.bytes.data, 3147 ucontrol->value.bytes.data,
3190 params->num_regs * codec->val_bytes); 3148 params->num_regs * component->val_bytes);
3191 else 3149 else
3192 ret = -EINVAL; 3150 ret = -EINVAL;
3193 3151
3194 /* Hide any masked bytes to ensure consistent data reporting */ 3152 /* Hide any masked bytes to ensure consistent data reporting */
3195 if (ret == 0 && params->mask) { 3153 if (ret == 0 && params->mask) {
3196 switch (codec->val_bytes) { 3154 switch (component->val_bytes) {
3197 case 1: 3155 case 1:
3198 ucontrol->value.bytes.data[0] &= ~params->mask; 3156 ucontrol->value.bytes.data[0] &= ~params->mask;
3199 break; 3157 break;
@@ -3217,16 +3175,16 @@ EXPORT_SYMBOL_GPL(snd_soc_bytes_get);
3217int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, 3175int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
3218 struct snd_ctl_elem_value *ucontrol) 3176 struct snd_ctl_elem_value *ucontrol)
3219{ 3177{
3178 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3220 struct soc_bytes *params = (void *)kcontrol->private_value; 3179 struct soc_bytes *params = (void *)kcontrol->private_value;
3221 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3222 int ret, len; 3180 int ret, len;
3223 unsigned int val, mask; 3181 unsigned int val, mask;
3224 void *data; 3182 void *data;
3225 3183
3226 if (!codec->using_regmap) 3184 if (!component->regmap)
3227 return -EINVAL; 3185 return -EINVAL;
3228 3186
3229 len = params->num_regs * codec->val_bytes; 3187 len = params->num_regs * component->val_bytes;
3230 3188
3231 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); 3189 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA);
3232 if (!data) 3190 if (!data)
@@ -3238,27 +3196,27 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
3238 * copy. 3196 * copy.
3239 */ 3197 */
3240 if (params->mask) { 3198 if (params->mask) {
3241 ret = regmap_read(codec->control_data, params->base, &val); 3199 ret = regmap_read(component->regmap, params->base, &val);
3242 if (ret != 0) 3200 if (ret != 0)
3243 goto out; 3201 goto out;
3244 3202
3245 val &= params->mask; 3203 val &= params->mask;
3246 3204
3247 switch (codec->val_bytes) { 3205 switch (component->val_bytes) {
3248 case 1: 3206 case 1:
3249 ((u8 *)data)[0] &= ~params->mask; 3207 ((u8 *)data)[0] &= ~params->mask;
3250 ((u8 *)data)[0] |= val; 3208 ((u8 *)data)[0] |= val;
3251 break; 3209 break;
3252 case 2: 3210 case 2:
3253 mask = ~params->mask; 3211 mask = ~params->mask;
3254 ret = regmap_parse_val(codec->control_data, 3212 ret = regmap_parse_val(component->regmap,
3255 &mask, &mask); 3213 &mask, &mask);
3256 if (ret != 0) 3214 if (ret != 0)
3257 goto out; 3215 goto out;
3258 3216
3259 ((u16 *)data)[0] &= mask; 3217 ((u16 *)data)[0] &= mask;
3260 3218
3261 ret = regmap_parse_val(codec->control_data, 3219 ret = regmap_parse_val(component->regmap,
3262 &val, &val); 3220 &val, &val);
3263 if (ret != 0) 3221 if (ret != 0)
3264 goto out; 3222 goto out;
@@ -3267,14 +3225,14 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
3267 break; 3225 break;
3268 case 4: 3226 case 4:
3269 mask = ~params->mask; 3227 mask = ~params->mask;
3270 ret = regmap_parse_val(codec->control_data, 3228 ret = regmap_parse_val(component->regmap,
3271 &mask, &mask); 3229 &mask, &mask);
3272 if (ret != 0) 3230 if (ret != 0)
3273 goto out; 3231 goto out;
3274 3232
3275 ((u32 *)data)[0] &= mask; 3233 ((u32 *)data)[0] &= mask;
3276 3234
3277 ret = regmap_parse_val(codec->control_data, 3235 ret = regmap_parse_val(component->regmap,
3278 &val, &val); 3236 &val, &val);
3279 if (ret != 0) 3237 if (ret != 0)
3280 goto out; 3238 goto out;
@@ -3287,7 +3245,7 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
3287 } 3245 }
3288 } 3246 }
3289 3247
3290 ret = regmap_raw_write(codec->control_data, params->base, 3248 ret = regmap_raw_write(component->regmap, params->base,
3291 data, len); 3249 data, len);
3292 3250
3293out: 3251out:
@@ -3297,6 +3255,18 @@ out:
3297} 3255}
3298EXPORT_SYMBOL_GPL(snd_soc_bytes_put); 3256EXPORT_SYMBOL_GPL(snd_soc_bytes_put);
3299 3257
3258int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol,
3259 struct snd_ctl_elem_info *ucontrol)
3260{
3261 struct soc_bytes_ext *params = (void *)kcontrol->private_value;
3262
3263 ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES;
3264 ucontrol->count = params->max;
3265
3266 return 0;
3267}
3268EXPORT_SYMBOL_GPL(snd_soc_bytes_info_ext);
3269
3300/** 3270/**
3301 * snd_soc_info_xr_sx - signed multi register info callback 3271 * snd_soc_info_xr_sx - signed multi register info callback
3302 * @kcontrol: mreg control 3272 * @kcontrol: mreg control
@@ -3338,24 +3308,27 @@ EXPORT_SYMBOL_GPL(snd_soc_info_xr_sx);
3338int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, 3308int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
3339 struct snd_ctl_elem_value *ucontrol) 3309 struct snd_ctl_elem_value *ucontrol)
3340{ 3310{
3311 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3341 struct soc_mreg_control *mc = 3312 struct soc_mreg_control *mc =
3342 (struct soc_mreg_control *)kcontrol->private_value; 3313 (struct soc_mreg_control *)kcontrol->private_value;
3343 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3344 unsigned int regbase = mc->regbase; 3314 unsigned int regbase = mc->regbase;
3345 unsigned int regcount = mc->regcount; 3315 unsigned int regcount = mc->regcount;
3346 unsigned int regwshift = codec->driver->reg_word_size * BITS_PER_BYTE; 3316 unsigned int regwshift = component->val_bytes * BITS_PER_BYTE;
3347 unsigned int regwmask = (1<<regwshift)-1; 3317 unsigned int regwmask = (1<<regwshift)-1;
3348 unsigned int invert = mc->invert; 3318 unsigned int invert = mc->invert;
3349 unsigned long mask = (1UL<<mc->nbits)-1; 3319 unsigned long mask = (1UL<<mc->nbits)-1;
3350 long min = mc->min; 3320 long min = mc->min;
3351 long max = mc->max; 3321 long max = mc->max;
3352 long val = 0; 3322 long val = 0;
3353 unsigned long regval; 3323 unsigned int regval;
3354 unsigned int i; 3324 unsigned int i;
3325 int ret;
3355 3326
3356 for (i = 0; i < regcount; i++) { 3327 for (i = 0; i < regcount; i++) {
3357 regval = snd_soc_read(codec, regbase+i) & regwmask; 3328 ret = snd_soc_component_read(component, regbase+i, &regval);
3358 val |= regval << (regwshift*(regcount-i-1)); 3329 if (ret)
3330 return ret;
3331 val |= (regval & regwmask) << (regwshift*(regcount-i-1));
3359 } 3332 }
3360 val &= mask; 3333 val &= mask;
3361 if (min < 0 && val > max) 3334 if (min < 0 && val > max)
@@ -3384,12 +3357,12 @@ EXPORT_SYMBOL_GPL(snd_soc_get_xr_sx);
3384int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, 3357int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
3385 struct snd_ctl_elem_value *ucontrol) 3358 struct snd_ctl_elem_value *ucontrol)
3386{ 3359{
3360 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3387 struct soc_mreg_control *mc = 3361 struct soc_mreg_control *mc =
3388 (struct soc_mreg_control *)kcontrol->private_value; 3362 (struct soc_mreg_control *)kcontrol->private_value;
3389 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3390 unsigned int regbase = mc->regbase; 3363 unsigned int regbase = mc->regbase;
3391 unsigned int regcount = mc->regcount; 3364 unsigned int regcount = mc->regcount;
3392 unsigned int regwshift = codec->driver->reg_word_size * BITS_PER_BYTE; 3365 unsigned int regwshift = component->val_bytes * BITS_PER_BYTE;
3393 unsigned int regwmask = (1<<regwshift)-1; 3366 unsigned int regwmask = (1<<regwshift)-1;
3394 unsigned int invert = mc->invert; 3367 unsigned int invert = mc->invert;
3395 unsigned long mask = (1UL<<mc->nbits)-1; 3368 unsigned long mask = (1UL<<mc->nbits)-1;
@@ -3404,7 +3377,7 @@ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
3404 for (i = 0; i < regcount; i++) { 3377 for (i = 0; i < regcount; i++) {
3405 regval = (val >> (regwshift*(regcount-i-1))) & regwmask; 3378 regval = (val >> (regwshift*(regcount-i-1))) & regwmask;
3406 regmask = (mask >> (regwshift*(regcount-i-1))) & regwmask; 3379 regmask = (mask >> (regwshift*(regcount-i-1))) & regwmask;
3407 err = snd_soc_update_bits_locked(codec, regbase+i, 3380 err = snd_soc_component_update_bits(component, regbase+i,
3408 regmask, regval); 3381 regmask, regval);
3409 if (err < 0) 3382 if (err < 0)
3410 return err; 3383 return err;
@@ -3426,14 +3399,21 @@ EXPORT_SYMBOL_GPL(snd_soc_put_xr_sx);
3426int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, 3399int snd_soc_get_strobe(struct snd_kcontrol *kcontrol,
3427 struct snd_ctl_elem_value *ucontrol) 3400 struct snd_ctl_elem_value *ucontrol)
3428{ 3401{
3402 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3429 struct soc_mixer_control *mc = 3403 struct soc_mixer_control *mc =
3430 (struct soc_mixer_control *)kcontrol->private_value; 3404 (struct soc_mixer_control *)kcontrol->private_value;
3431 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3432 unsigned int reg = mc->reg; 3405 unsigned int reg = mc->reg;
3433 unsigned int shift = mc->shift; 3406 unsigned int shift = mc->shift;
3434 unsigned int mask = 1 << shift; 3407 unsigned int mask = 1 << shift;
3435 unsigned int invert = mc->invert != 0; 3408 unsigned int invert = mc->invert != 0;
3436 unsigned int val = snd_soc_read(codec, reg) & mask; 3409 unsigned int val;
3410 int ret;
3411
3412 ret = snd_soc_component_read(component, reg, &val);
3413 if (ret)
3414 return ret;
3415
3416 val &= mask;
3437 3417
3438 if (shift != 0 && val != 0) 3418 if (shift != 0 && val != 0)
3439 val = val >> shift; 3419 val = val >> shift;
@@ -3456,9 +3436,9 @@ EXPORT_SYMBOL_GPL(snd_soc_get_strobe);
3456int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, 3436int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
3457 struct snd_ctl_elem_value *ucontrol) 3437 struct snd_ctl_elem_value *ucontrol)
3458{ 3438{
3439 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
3459 struct soc_mixer_control *mc = 3440 struct soc_mixer_control *mc =
3460 (struct soc_mixer_control *)kcontrol->private_value; 3441 (struct soc_mixer_control *)kcontrol->private_value;
3461 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
3462 unsigned int reg = mc->reg; 3442 unsigned int reg = mc->reg;
3463 unsigned int shift = mc->shift; 3443 unsigned int shift = mc->shift;
3464 unsigned int mask = 1 << shift; 3444 unsigned int mask = 1 << shift;
@@ -3468,12 +3448,11 @@ int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
3468 unsigned int val2 = (strobe ^ invert) ? 0 : mask; 3448 unsigned int val2 = (strobe ^ invert) ? 0 : mask;
3469 int err; 3449 int err;
3470 3450
3471 err = snd_soc_update_bits_locked(codec, reg, mask, val1); 3451 err = snd_soc_component_update_bits(component, reg, mask, val1);
3472 if (err < 0) 3452 if (err < 0)
3473 return err; 3453 return err;
3474 3454
3475 err = snd_soc_update_bits_locked(codec, reg, mask, val2); 3455 return snd_soc_component_update_bits(component, reg, mask, val2);
3476 return err;
3477} 3456}
3478EXPORT_SYMBOL_GPL(snd_soc_put_strobe); 3457EXPORT_SYMBOL_GPL(snd_soc_put_strobe);
3479 3458
@@ -3821,7 +3800,6 @@ int snd_soc_register_card(struct snd_soc_card *card)
3821 for (i = 0; i < card->num_links; i++) 3800 for (i = 0; i < card->num_links; i++)
3822 card->rtd[i].dai_link = &card->dai_link[i]; 3801 card->rtd[i].dai_link = &card->dai_link[i];
3823 3802
3824 INIT_LIST_HEAD(&card->list);
3825 INIT_LIST_HEAD(&card->dapm_dirty); 3803 INIT_LIST_HEAD(&card->dapm_dirty);
3826 card->instantiated = 0; 3804 card->instantiated = 0;
3827 mutex_init(&card->mutex); 3805 mutex_init(&card->mutex);
@@ -4037,6 +4015,8 @@ __snd_soc_register_component(struct device *dev,
4037 return -ENOMEM; 4015 return -ENOMEM;
4038 } 4016 }
4039 4017
4018 mutex_init(&cmpnt->io_mutex);
4019
4040 cmpnt->name = fmt_single_name(dev, &cmpnt->id); 4020 cmpnt->name = fmt_single_name(dev, &cmpnt->id);
4041 if (!cmpnt->name) { 4021 if (!cmpnt->name) {
4042 dev_err(dev, "ASoC: Failed to simplifying name\n"); 4022 dev_err(dev, "ASoC: Failed to simplifying name\n");
@@ -4084,12 +4064,25 @@ int snd_soc_register_component(struct device *dev,
4084 } 4064 }
4085 4065
4086 cmpnt->ignore_pmdown_time = true; 4066 cmpnt->ignore_pmdown_time = true;
4067 cmpnt->registered_as_component = true;
4087 4068
4088 return __snd_soc_register_component(dev, cmpnt, cmpnt_drv, NULL, 4069 return __snd_soc_register_component(dev, cmpnt, cmpnt_drv, NULL,
4089 dai_drv, num_dai, true); 4070 dai_drv, num_dai, true);
4090} 4071}
4091EXPORT_SYMBOL_GPL(snd_soc_register_component); 4072EXPORT_SYMBOL_GPL(snd_soc_register_component);
4092 4073
4074static void __snd_soc_unregister_component(struct snd_soc_component *cmpnt)
4075{
4076 snd_soc_unregister_dais(cmpnt);
4077
4078 mutex_lock(&client_mutex);
4079 list_del(&cmpnt->list);
4080 mutex_unlock(&client_mutex);
4081
4082 dev_dbg(cmpnt->dev, "ASoC: Unregistered component '%s'\n", cmpnt->name);
4083 kfree(cmpnt->name);
4084}
4085
4093/** 4086/**
4094 * snd_soc_unregister_component - Unregister a component from the ASoC core 4087 * snd_soc_unregister_component - Unregister a component from the ASoC core
4095 * 4088 *
@@ -4099,22 +4092,33 @@ void snd_soc_unregister_component(struct device *dev)
4099 struct snd_soc_component *cmpnt; 4092 struct snd_soc_component *cmpnt;
4100 4093
4101 list_for_each_entry(cmpnt, &component_list, list) { 4094 list_for_each_entry(cmpnt, &component_list, list) {
4102 if (dev == cmpnt->dev) 4095 if (dev == cmpnt->dev && cmpnt->registered_as_component)
4103 goto found; 4096 goto found;
4104 } 4097 }
4105 return; 4098 return;
4106 4099
4107found: 4100found:
4108 snd_soc_unregister_dais(cmpnt); 4101 __snd_soc_unregister_component(cmpnt);
4102}
4103EXPORT_SYMBOL_GPL(snd_soc_unregister_component);
4109 4104
4110 mutex_lock(&client_mutex); 4105static int snd_soc_platform_drv_write(struct snd_soc_component *component,
4111 list_del(&cmpnt->list); 4106 unsigned int reg, unsigned int val)
4112 mutex_unlock(&client_mutex); 4107{
4108 struct snd_soc_platform *platform = snd_soc_component_to_platform(component);
4113 4109
4114 dev_dbg(dev, "ASoC: Unregistered component '%s'\n", cmpnt->name); 4110 return platform->driver->write(platform, reg, val);
4115 kfree(cmpnt->name); 4111}
4112
4113static int snd_soc_platform_drv_read(struct snd_soc_component *component,
4114 unsigned int reg, unsigned int *val)
4115{
4116 struct snd_soc_platform *platform = snd_soc_component_to_platform(component);
4117
4118 *val = platform->driver->read(platform, reg);
4119
4120 return 0;
4116} 4121}
4117EXPORT_SYMBOL_GPL(snd_soc_unregister_component);
4118 4122
4119/** 4123/**
4120 * snd_soc_add_platform - Add a platform to the ASoC core 4124 * snd_soc_add_platform - Add a platform to the ASoC core
@@ -4125,6 +4129,8 @@ EXPORT_SYMBOL_GPL(snd_soc_unregister_component);
4125int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform, 4129int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
4126 const struct snd_soc_platform_driver *platform_drv) 4130 const struct snd_soc_platform_driver *platform_drv)
4127{ 4131{
4132 int ret;
4133
4128 /* create platform component name */ 4134 /* create platform component name */
4129 platform->name = fmt_single_name(dev, &platform->id); 4135 platform->name = fmt_single_name(dev, &platform->id);
4130 if (platform->name == NULL) 4136 if (platform->name == NULL)
@@ -4134,8 +4140,22 @@ int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
4134 platform->driver = platform_drv; 4140 platform->driver = platform_drv;
4135 platform->dapm.dev = dev; 4141 platform->dapm.dev = dev;
4136 platform->dapm.platform = platform; 4142 platform->dapm.platform = platform;
4143 platform->dapm.component = &platform->component;
4137 platform->dapm.stream_event = platform_drv->stream_event; 4144 platform->dapm.stream_event = platform_drv->stream_event;
4138 mutex_init(&platform->mutex); 4145 if (platform_drv->write)
4146 platform->component.write = snd_soc_platform_drv_write;
4147 if (platform_drv->read)
4148 platform->component.read = snd_soc_platform_drv_read;
4149
4150 /* register component */
4151 ret = __snd_soc_register_component(dev, &platform->component,
4152 &platform_drv->component_driver,
4153 NULL, NULL, 0, false);
4154 if (ret < 0) {
4155 dev_err(platform->component.dev,
4156 "ASoC: Failed to register component: %d\n", ret);
4157 return ret;
4158 }
4139 4159
4140 mutex_lock(&client_mutex); 4160 mutex_lock(&client_mutex);
4141 list_add(&platform->list, &platform_list); 4161 list_add(&platform->list, &platform_list);
@@ -4178,6 +4198,8 @@ EXPORT_SYMBOL_GPL(snd_soc_register_platform);
4178 */ 4198 */
4179void snd_soc_remove_platform(struct snd_soc_platform *platform) 4199void snd_soc_remove_platform(struct snd_soc_platform *platform)
4180{ 4200{
4201 __snd_soc_unregister_component(&platform->component);
4202
4181 mutex_lock(&client_mutex); 4203 mutex_lock(&client_mutex);
4182 list_del(&platform->list); 4204 list_del(&platform->list);
4183 mutex_unlock(&client_mutex); 4205 mutex_unlock(&client_mutex);
@@ -4252,6 +4274,24 @@ static void fixup_codec_formats(struct snd_soc_pcm_stream *stream)
4252 stream->formats |= codec_format_map[i]; 4274 stream->formats |= codec_format_map[i];
4253} 4275}
4254 4276
4277static int snd_soc_codec_drv_write(struct snd_soc_component *component,
4278 unsigned int reg, unsigned int val)
4279{
4280 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
4281
4282 return codec->driver->write(codec, reg, val);
4283}
4284
4285static int snd_soc_codec_drv_read(struct snd_soc_component *component,
4286 unsigned int reg, unsigned int *val)
4287{
4288 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
4289
4290 *val = codec->driver->read(codec, reg);
4291
4292 return 0;
4293}
4294
4255/** 4295/**
4256 * snd_soc_register_codec - Register a codec with the ASoC core 4296 * snd_soc_register_codec - Register a codec with the ASoC core
4257 * 4297 *
@@ -4263,6 +4303,7 @@ int snd_soc_register_codec(struct device *dev,
4263 int num_dai) 4303 int num_dai)
4264{ 4304{
4265 struct snd_soc_codec *codec; 4305 struct snd_soc_codec *codec;
4306 struct regmap *regmap;
4266 int ret, i; 4307 int ret, i;
4267 4308
4268 dev_dbg(dev, "codec register %s\n", dev_name(dev)); 4309 dev_dbg(dev, "codec register %s\n", dev_name(dev));
@@ -4278,22 +4319,40 @@ int snd_soc_register_codec(struct device *dev,
4278 goto fail_codec; 4319 goto fail_codec;
4279 } 4320 }
4280 4321
4281 codec->write = codec_drv->write; 4322 if (codec_drv->write)
4282 codec->read = codec_drv->read; 4323 codec->component.write = snd_soc_codec_drv_write;
4283 codec->volatile_register = codec_drv->volatile_register; 4324 if (codec_drv->read)
4284 codec->readable_register = codec_drv->readable_register; 4325 codec->component.read = snd_soc_codec_drv_read;
4285 codec->writable_register = codec_drv->writable_register;
4286 codec->component.ignore_pmdown_time = codec_drv->ignore_pmdown_time; 4326 codec->component.ignore_pmdown_time = codec_drv->ignore_pmdown_time;
4287 codec->dapm.bias_level = SND_SOC_BIAS_OFF; 4327 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
4288 codec->dapm.dev = dev; 4328 codec->dapm.dev = dev;
4289 codec->dapm.codec = codec; 4329 codec->dapm.codec = codec;
4330 codec->dapm.component = &codec->component;
4290 codec->dapm.seq_notifier = codec_drv->seq_notifier; 4331 codec->dapm.seq_notifier = codec_drv->seq_notifier;
4291 codec->dapm.stream_event = codec_drv->stream_event; 4332 codec->dapm.stream_event = codec_drv->stream_event;
4292 codec->dev = dev; 4333 codec->dev = dev;
4293 codec->driver = codec_drv; 4334 codec->driver = codec_drv;
4294 codec->num_dai = num_dai; 4335 codec->component.val_bytes = codec_drv->reg_word_size;
4295 mutex_init(&codec->mutex); 4336 mutex_init(&codec->mutex);
4296 4337
4338 if (!codec->component.write) {
4339 if (codec_drv->get_regmap)
4340 regmap = codec_drv->get_regmap(dev);
4341 else
4342 regmap = dev_get_regmap(dev, NULL);
4343
4344 if (regmap) {
4345 ret = snd_soc_component_init_io(&codec->component,
4346 regmap);
4347 if (ret) {
4348 dev_err(codec->dev,
4349 "Failed to set cache I/O:%d\n",
4350 ret);
4351 return ret;
4352 }
4353 }
4354 }
4355
4297 for (i = 0; i < num_dai; i++) { 4356 for (i = 0; i < num_dai; i++) {
4298 fixup_codec_formats(&dai_drv[i].playback); 4357 fixup_codec_formats(&dai_drv[i].playback);
4299 fixup_codec_formats(&dai_drv[i].capture); 4358 fixup_codec_formats(&dai_drv[i].capture);
@@ -4343,7 +4402,7 @@ void snd_soc_unregister_codec(struct device *dev)
4343 return; 4402 return;
4344 4403
4345found: 4404found:
4346 snd_soc_unregister_component(dev); 4405 __snd_soc_unregister_component(&codec->component);
4347 4406
4348 mutex_lock(&client_mutex); 4407 mutex_lock(&client_mutex);
4349 list_del(&codec->list); 4408 list_del(&codec->list);
@@ -4554,7 +4613,9 @@ int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
4554EXPORT_SYMBOL_GPL(snd_soc_of_parse_audio_routing); 4613EXPORT_SYMBOL_GPL(snd_soc_of_parse_audio_routing);
4555 4614
4556unsigned int snd_soc_of_parse_daifmt(struct device_node *np, 4615unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
4557 const char *prefix) 4616 const char *prefix,
4617 struct device_node **bitclkmaster,
4618 struct device_node **framemaster)
4558{ 4619{
4559 int ret, i; 4620 int ret, i;
4560 char prop[128]; 4621 char prop[128];
@@ -4637,9 +4698,13 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
4637 */ 4698 */
4638 snprintf(prop, sizeof(prop), "%sbitclock-master", prefix); 4699 snprintf(prop, sizeof(prop), "%sbitclock-master", prefix);
4639 bit = !!of_get_property(np, prop, NULL); 4700 bit = !!of_get_property(np, prop, NULL);
4701 if (bit && bitclkmaster)
4702 *bitclkmaster = of_parse_phandle(np, prop, 0);
4640 4703
4641 snprintf(prop, sizeof(prop), "%sframe-master", prefix); 4704 snprintf(prop, sizeof(prop), "%sframe-master", prefix);
4642 frame = !!of_get_property(np, prop, NULL); 4705 frame = !!of_get_property(np, prop, NULL);
4706 if (frame && framemaster)
4707 *framemaster = of_parse_phandle(np, prop, 0);
4643 4708
4644 switch ((bit << 4) + frame) { 4709 switch ((bit << 4) + frame) {
4645 case 0x11: 4710 case 0x11:
@@ -4698,7 +4763,7 @@ int snd_soc_of_get_dai_name(struct device_node *of_node,
4698 4763
4699 if (id < 0 || id >= pos->num_dai) { 4764 if (id < 0 || id >= pos->num_dai) {
4700 ret = -EINVAL; 4765 ret = -EINVAL;
4701 break; 4766 continue;
4702 } 4767 }
4703 4768
4704 ret = 0; 4769 ret = 0;
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index c8a780d0d057..a74b9bf23d9f 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -254,7 +254,6 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
254static void dapm_kcontrol_free(struct snd_kcontrol *kctl) 254static void dapm_kcontrol_free(struct snd_kcontrol *kctl)
255{ 255{
256 struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl); 256 struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl);
257 kfree(data->widget);
258 kfree(data->wlist); 257 kfree(data->wlist);
259 kfree(data); 258 kfree(data);
260} 259}
@@ -379,86 +378,24 @@ static void dapm_reset(struct snd_soc_card *card)
379static int soc_widget_read(struct snd_soc_dapm_widget *w, int reg, 378static int soc_widget_read(struct snd_soc_dapm_widget *w, int reg,
380 unsigned int *value) 379 unsigned int *value)
381{ 380{
382 if (w->codec) { 381 if (!w->dapm->component)
383 *value = snd_soc_read(w->codec, reg); 382 return -EIO;
384 return 0; 383 return snd_soc_component_read(w->dapm->component, reg, value);
385 } else if (w->platform) {
386 *value = snd_soc_platform_read(w->platform, reg);
387 return 0;
388 }
389
390 dev_err(w->dapm->dev, "ASoC: no valid widget read method\n");
391 return -1;
392}
393
394static int soc_widget_write(struct snd_soc_dapm_widget *w, int reg,
395 unsigned int val)
396{
397 if (w->codec)
398 return snd_soc_write(w->codec, reg, val);
399 else if (w->platform)
400 return snd_soc_platform_write(w->platform, reg, val);
401
402 dev_err(w->dapm->dev, "ASoC: no valid widget write method\n");
403 return -1;
404}
405
406static inline void soc_widget_lock(struct snd_soc_dapm_widget *w)
407{
408 if (w->codec && !w->codec->using_regmap)
409 mutex_lock(&w->codec->mutex);
410 else if (w->platform)
411 mutex_lock(&w->platform->mutex);
412} 384}
413 385
414static inline void soc_widget_unlock(struct snd_soc_dapm_widget *w) 386static int soc_widget_update_bits(struct snd_soc_dapm_widget *w,
387 int reg, unsigned int mask, unsigned int value)
415{ 388{
416 if (w->codec && !w->codec->using_regmap) 389 if (!w->dapm->component)
417 mutex_unlock(&w->codec->mutex); 390 return -EIO;
418 else if (w->platform) 391 return snd_soc_component_update_bits_async(w->dapm->component, reg,
419 mutex_unlock(&w->platform->mutex); 392 mask, value);
420} 393}
421 394
422static void soc_dapm_async_complete(struct snd_soc_dapm_context *dapm) 395static void soc_dapm_async_complete(struct snd_soc_dapm_context *dapm)
423{ 396{
424 if (dapm->codec && dapm->codec->using_regmap) 397 if (dapm->component)
425 regmap_async_complete(dapm->codec->control_data); 398 snd_soc_component_async_complete(dapm->component);
426}
427
428static int soc_widget_update_bits_locked(struct snd_soc_dapm_widget *w,
429 unsigned short reg, unsigned int mask, unsigned int value)
430{
431 bool change;
432 unsigned int old, new;
433 int ret;
434
435 if (w->codec && w->codec->using_regmap) {
436 ret = regmap_update_bits_check_async(w->codec->control_data,
437 reg, mask, value,
438 &change);
439 if (ret != 0)
440 return ret;
441 } else {
442 soc_widget_lock(w);
443 ret = soc_widget_read(w, reg, &old);
444 if (ret < 0) {
445 soc_widget_unlock(w);
446 return ret;
447 }
448
449 new = (old & ~mask) | (value & mask);
450 change = old != new;
451 if (change) {
452 ret = soc_widget_write(w, reg, new);
453 if (ret < 0) {
454 soc_widget_unlock(w);
455 return ret;
456 }
457 }
458 soc_widget_unlock(w);
459 }
460
461 return change;
462} 399}
463 400
464/** 401/**
@@ -1121,26 +1058,6 @@ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream,
1121} 1058}
1122 1059
1123/* 1060/*
1124 * Handler for generic register modifier widget.
1125 */
1126int dapm_reg_event(struct snd_soc_dapm_widget *w,
1127 struct snd_kcontrol *kcontrol, int event)
1128{
1129 unsigned int val;
1130
1131 if (SND_SOC_DAPM_EVENT_ON(event))
1132 val = w->on_val;
1133 else
1134 val = w->off_val;
1135
1136 soc_widget_update_bits_locked(w, -(w->reg + 1),
1137 w->mask << w->shift, val << w->shift);
1138
1139 return 0;
1140}
1141EXPORT_SYMBOL_GPL(dapm_reg_event);
1142
1143/*
1144 * Handler for regulator supply widget. 1061 * Handler for regulator supply widget.
1145 */ 1062 */
1146int dapm_regulator_event(struct snd_soc_dapm_widget *w, 1063int dapm_regulator_event(struct snd_soc_dapm_widget *w,
@@ -1429,7 +1346,7 @@ static void dapm_seq_run_coalesced(struct snd_soc_card *card,
1429 "pop test : Applying 0x%x/0x%x to %x in %dms\n", 1346 "pop test : Applying 0x%x/0x%x to %x in %dms\n",
1430 value, mask, reg, card->pop_time); 1347 value, mask, reg, card->pop_time);
1431 pop_wait(card->pop_time); 1348 pop_wait(card->pop_time);
1432 soc_widget_update_bits_locked(w, reg, mask, value); 1349 soc_widget_update_bits(w, reg, mask, value);
1433 } 1350 }
1434 1351
1435 list_for_each_entry(w, pending, power_list) { 1352 list_for_each_entry(w, pending, power_list) {
@@ -1575,8 +1492,7 @@ static void dapm_widget_update(struct snd_soc_card *card)
1575 if (!w) 1492 if (!w)
1576 return; 1493 return;
1577 1494
1578 ret = soc_widget_update_bits_locked(w, update->reg, update->mask, 1495 ret = soc_widget_update_bits(w, update->reg, update->mask, update->val);
1579 update->val);
1580 if (ret < 0) 1496 if (ret < 0)
1581 dev_err(w->dapm->dev, "ASoC: %s DAPM update failed: %d\n", 1497 dev_err(w->dapm->dev, "ASoC: %s DAPM update failed: %d\n",
1582 w->name, ret); 1498 w->name, ret);
@@ -1613,8 +1529,11 @@ static void dapm_pre_sequence_async(void *data, async_cookie_t cookie)
1613 "ASoC: Failed to turn on bias: %d\n", ret); 1529 "ASoC: Failed to turn on bias: %d\n", ret);
1614 } 1530 }
1615 1531
1616 /* Prepare for a STADDBY->ON or ON->STANDBY transition */ 1532 /* Prepare for a transition to ON or away from ON */
1617 if (d->bias_level != d->target_bias_level) { 1533 if ((d->target_bias_level == SND_SOC_BIAS_ON &&
1534 d->bias_level != SND_SOC_BIAS_ON) ||
1535 (d->target_bias_level != SND_SOC_BIAS_ON &&
1536 d->bias_level == SND_SOC_BIAS_ON)) {
1618 ret = snd_soc_dapm_set_bias_level(d, SND_SOC_BIAS_PREPARE); 1537 ret = snd_soc_dapm_set_bias_level(d, SND_SOC_BIAS_PREPARE);
1619 if (ret != 0) 1538 if (ret != 0)
1620 dev_err(d->dev, 1539 dev_err(d->dev,
@@ -2444,8 +2363,7 @@ err:
2444} 2363}
2445 2364
2446static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, 2365static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm,
2447 const struct snd_soc_dapm_route *route, 2366 const struct snd_soc_dapm_route *route)
2448 unsigned int is_prefixed)
2449{ 2367{
2450 struct snd_soc_dapm_widget *wsource = NULL, *wsink = NULL, *w; 2368 struct snd_soc_dapm_widget *wsource = NULL, *wsink = NULL, *w;
2451 struct snd_soc_dapm_widget *wtsource = NULL, *wtsink = NULL; 2369 struct snd_soc_dapm_widget *wtsource = NULL, *wtsink = NULL;
@@ -2455,7 +2373,7 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm,
2455 char prefixed_source[80]; 2373 char prefixed_source[80];
2456 int ret; 2374 int ret;
2457 2375
2458 if (dapm->codec && dapm->codec->name_prefix && !is_prefixed) { 2376 if (dapm->codec && dapm->codec->name_prefix) {
2459 snprintf(prefixed_sink, sizeof(prefixed_sink), "%s %s", 2377 snprintf(prefixed_sink, sizeof(prefixed_sink), "%s %s",
2460 dapm->codec->name_prefix, route->sink); 2378 dapm->codec->name_prefix, route->sink);
2461 sink = prefixed_sink; 2379 sink = prefixed_sink;
@@ -2583,7 +2501,7 @@ int snd_soc_dapm_add_routes(struct snd_soc_dapm_context *dapm,
2583 2501
2584 mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); 2502 mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT);
2585 for (i = 0; i < num; i++) { 2503 for (i = 0; i < num; i++) {
2586 r = snd_soc_dapm_add_route(dapm, route, false); 2504 r = snd_soc_dapm_add_route(dapm, route);
2587 if (r < 0) { 2505 if (r < 0) {
2588 dev_err(dapm->dev, "ASoC: Failed to add route %s -> %s -> %s\n", 2506 dev_err(dapm->dev, "ASoC: Failed to add route %s -> %s -> %s\n",
2589 route->source, 2507 route->source,
@@ -2855,22 +2773,19 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol,
2855 mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); 2773 mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
2856 2774
2857 change = dapm_kcontrol_set_value(kcontrol, val); 2775 change = dapm_kcontrol_set_value(kcontrol, val);
2858
2859 if (reg != SND_SOC_NOPM) {
2860 mask = mask << shift;
2861 val = val << shift;
2862
2863 change = snd_soc_test_bits(codec, reg, mask, val);
2864 }
2865
2866 if (change) { 2776 if (change) {
2867 if (reg != SND_SOC_NOPM) { 2777 if (reg != SND_SOC_NOPM) {
2868 update.kcontrol = kcontrol; 2778 mask = mask << shift;
2869 update.reg = reg; 2779 val = val << shift;
2870 update.mask = mask; 2780
2871 update.val = val; 2781 if (snd_soc_test_bits(codec, reg, mask, val)) {
2782 update.kcontrol = kcontrol;
2783 update.reg = reg;
2784 update.mask = mask;
2785 update.val = val;
2786 card->update = &update;
2787 }
2872 2788
2873 card->update = &update;
2874 } 2789 }
2875 2790
2876 ret = soc_dapm_mixer_update_power(card, kcontrol, connect); 2791 ret = soc_dapm_mixer_update_power(card, kcontrol, connect);
@@ -3309,11 +3224,11 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
3309 struct snd_soc_dapm_widget *source, 3224 struct snd_soc_dapm_widget *source,
3310 struct snd_soc_dapm_widget *sink) 3225 struct snd_soc_dapm_widget *sink)
3311{ 3226{
3312 struct snd_soc_dapm_route routes[2];
3313 struct snd_soc_dapm_widget template; 3227 struct snd_soc_dapm_widget template;
3314 struct snd_soc_dapm_widget *w; 3228 struct snd_soc_dapm_widget *w;
3315 size_t len; 3229 size_t len;
3316 char *link_name; 3230 char *link_name;
3231 int ret;
3317 3232
3318 len = strlen(source->name) + strlen(sink->name) + 2; 3233 len = strlen(source->name) + strlen(sink->name) + 2;
3319 link_name = devm_kzalloc(card->dev, len, GFP_KERNEL); 3234 link_name = devm_kzalloc(card->dev, len, GFP_KERNEL);
@@ -3340,15 +3255,10 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
3340 3255
3341 w->params = params; 3256 w->params = params;
3342 3257
3343 memset(&routes, 0, sizeof(routes)); 3258 ret = snd_soc_dapm_add_path(&card->dapm, source, w, NULL, NULL);
3344 3259 if (ret)
3345 routes[0].source = source->name; 3260 return ret;
3346 routes[0].sink = link_name; 3261 return snd_soc_dapm_add_path(&card->dapm, w, sink, NULL, NULL);
3347 routes[1].source = link_name;
3348 routes[1].sink = sink->name;
3349
3350 return snd_soc_dapm_add_routes(&card->dapm, routes,
3351 ARRAY_SIZE(routes));
3352} 3262}
3353 3263
3354int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, 3264int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
@@ -3406,6 +3316,7 @@ int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
3406int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card) 3316int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card)
3407{ 3317{
3408 struct snd_soc_dapm_widget *dai_w, *w; 3318 struct snd_soc_dapm_widget *dai_w, *w;
3319 struct snd_soc_dapm_widget *src, *sink;
3409 struct snd_soc_dai *dai; 3320 struct snd_soc_dai *dai;
3410 3321
3411 /* For each DAI widget... */ 3322 /* For each DAI widget... */
@@ -3436,25 +3347,15 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card)
3436 if (!w->sname || !strstr(w->sname, dai_w->name)) 3347 if (!w->sname || !strstr(w->sname, dai_w->name))
3437 continue; 3348 continue;
3438 3349
3439 if (dai->driver->playback.stream_name && 3350 if (dai_w->id == snd_soc_dapm_dai_in) {
3440 strstr(w->sname, 3351 src = dai_w;
3441 dai->driver->playback.stream_name)) { 3352 sink = w;
3442 dev_dbg(dai->dev, "%s -> %s\n", 3353 } else {
3443 dai->playback_widget->name, w->name); 3354 src = w;
3444 3355 sink = dai_w;
3445 snd_soc_dapm_add_path(w->dapm,
3446 dai->playback_widget, w, NULL, NULL);
3447 }
3448
3449 if (dai->driver->capture.stream_name &&
3450 strstr(w->sname,
3451 dai->driver->capture.stream_name)) {
3452 dev_dbg(dai->dev, "%s -> %s\n",
3453 w->name, dai->capture_widget->name);
3454
3455 snd_soc_dapm_add_path(w->dapm, w,
3456 dai->capture_widget, NULL, NULL);
3457 } 3356 }
3357 dev_dbg(dai->dev, "%s -> %s\n", src->name, sink->name);
3358 snd_soc_dapm_add_path(w->dapm, src, sink, NULL, NULL);
3458 } 3359 }
3459 } 3360 }
3460 3361
@@ -3464,20 +3365,21 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card)
3464void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card) 3365void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card)
3465{ 3366{
3466 struct snd_soc_pcm_runtime *rtd = card->rtd; 3367 struct snd_soc_pcm_runtime *rtd = card->rtd;
3368 struct snd_soc_dapm_widget *sink, *source;
3467 struct snd_soc_dai *cpu_dai, *codec_dai; 3369 struct snd_soc_dai *cpu_dai, *codec_dai;
3468 struct snd_soc_dapm_route r;
3469 int i; 3370 int i;
3470 3371
3471 memset(&r, 0, sizeof(r));
3472
3473 /* for each BE DAI link... */ 3372 /* for each BE DAI link... */
3474 for (i = 0; i < card->num_rtd; i++) { 3373 for (i = 0; i < card->num_rtd; i++) {
3475 rtd = &card->rtd[i]; 3374 rtd = &card->rtd[i];
3476 cpu_dai = rtd->cpu_dai; 3375 cpu_dai = rtd->cpu_dai;
3477 codec_dai = rtd->codec_dai; 3376 codec_dai = rtd->codec_dai;
3478 3377
3479 /* dynamic FE links have no fixed DAI mapping */ 3378 /*
3480 if (rtd->dai_link->dynamic) 3379 * dynamic FE links have no fixed DAI mapping.
3380 * CODEC<->CODEC links have no direct connection.
3381 */
3382 if (rtd->dai_link->dynamic || rtd->dai_link->params)
3481 continue; 3383 continue;
3482 3384
3483 /* there is no point in connecting BE DAI links with dummies */ 3385 /* there is no point in connecting BE DAI links with dummies */
@@ -3487,55 +3389,49 @@ void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card)
3487 3389
3488 /* connect BE DAI playback if widgets are valid */ 3390 /* connect BE DAI playback if widgets are valid */
3489 if (codec_dai->playback_widget && cpu_dai->playback_widget) { 3391 if (codec_dai->playback_widget && cpu_dai->playback_widget) {
3490 r.source = cpu_dai->playback_widget->name; 3392 source = cpu_dai->playback_widget;
3491 r.sink = codec_dai->playback_widget->name; 3393 sink = codec_dai->playback_widget;
3492 dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n", 3394 dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n",
3493 cpu_dai->codec->name, r.source, 3395 cpu_dai->codec->name, source->name,
3494 codec_dai->platform->name, r.sink); 3396 codec_dai->platform->name, sink->name);
3495 3397
3496 snd_soc_dapm_add_route(&card->dapm, &r, true); 3398 snd_soc_dapm_add_path(&card->dapm, source, sink,
3399 NULL, NULL);
3497 } 3400 }
3498 3401
3499 /* connect BE DAI capture if widgets are valid */ 3402 /* connect BE DAI capture if widgets are valid */
3500 if (codec_dai->capture_widget && cpu_dai->capture_widget) { 3403 if (codec_dai->capture_widget && cpu_dai->capture_widget) {
3501 r.source = codec_dai->capture_widget->name; 3404 source = codec_dai->capture_widget;
3502 r.sink = cpu_dai->capture_widget->name; 3405 sink = cpu_dai->capture_widget;
3503 dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n", 3406 dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n",
3504 codec_dai->codec->name, r.source, 3407 codec_dai->codec->name, source->name,
3505 cpu_dai->platform->name, r.sink); 3408 cpu_dai->platform->name, sink->name);
3506 3409
3507 snd_soc_dapm_add_route(&card->dapm, &r, true); 3410 snd_soc_dapm_add_path(&card->dapm, source, sink,
3411 NULL, NULL);
3508 } 3412 }
3509
3510 } 3413 }
3511} 3414}
3512 3415
3513static void soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, 3416static void soc_dapm_dai_stream_event(struct snd_soc_dai *dai, int stream,
3514 int event) 3417 int event)
3515{ 3418{
3419 struct snd_soc_dapm_widget *w;
3516 3420
3517 struct snd_soc_dapm_widget *w_cpu, *w_codec; 3421 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
3518 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 3422 w = dai->playback_widget;
3519 struct snd_soc_dai *codec_dai = rtd->codec_dai; 3423 else
3520 3424 w = dai->capture_widget;
3521 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
3522 w_cpu = cpu_dai->playback_widget;
3523 w_codec = codec_dai->playback_widget;
3524 } else {
3525 w_cpu = cpu_dai->capture_widget;
3526 w_codec = codec_dai->capture_widget;
3527 }
3528
3529 if (w_cpu) {
3530 3425
3531 dapm_mark_dirty(w_cpu, "stream event"); 3426 if (w) {
3427 dapm_mark_dirty(w, "stream event");
3532 3428
3533 switch (event) { 3429 switch (event) {
3534 case SND_SOC_DAPM_STREAM_START: 3430 case SND_SOC_DAPM_STREAM_START:
3535 w_cpu->active = 1; 3431 w->active = 1;
3536 break; 3432 break;
3537 case SND_SOC_DAPM_STREAM_STOP: 3433 case SND_SOC_DAPM_STREAM_STOP:
3538 w_cpu->active = 0; 3434 w->active = 0;
3539 break; 3435 break;
3540 case SND_SOC_DAPM_STREAM_SUSPEND: 3436 case SND_SOC_DAPM_STREAM_SUSPEND:
3541 case SND_SOC_DAPM_STREAM_RESUME: 3437 case SND_SOC_DAPM_STREAM_RESUME:
@@ -3544,25 +3440,13 @@ static void soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream,
3544 break; 3440 break;
3545 } 3441 }
3546 } 3442 }
3443}
3547 3444
3548 if (w_codec) { 3445static void soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream,
3549 3446 int event)
3550 dapm_mark_dirty(w_codec, "stream event"); 3447{
3551 3448 soc_dapm_dai_stream_event(rtd->cpu_dai, stream, event);
3552 switch (event) { 3449 soc_dapm_dai_stream_event(rtd->codec_dai, stream, event);
3553 case SND_SOC_DAPM_STREAM_START:
3554 w_codec->active = 1;
3555 break;
3556 case SND_SOC_DAPM_STREAM_STOP:
3557 w_codec->active = 0;
3558 break;
3559 case SND_SOC_DAPM_STREAM_SUSPEND:
3560 case SND_SOC_DAPM_STREAM_RESUME:
3561 case SND_SOC_DAPM_STREAM_PAUSE_PUSH:
3562 case SND_SOC_DAPM_STREAM_PAUSE_RELEASE:
3563 break;
3564 }
3565 }
3566 3450
3567 dapm_power_widgets(rtd->card, event); 3451 dapm_power_widgets(rtd->card, event);
3568} 3452}
diff --git a/sound/soc/soc-devres.c b/sound/soc/soc-devres.c
index 7ac745df1412..057e5ef7dcce 100644
--- a/sound/soc/soc-devres.c
+++ b/sound/soc/soc-devres.c
@@ -52,6 +52,41 @@ int devm_snd_soc_register_component(struct device *dev,
52} 52}
53EXPORT_SYMBOL_GPL(devm_snd_soc_register_component); 53EXPORT_SYMBOL_GPL(devm_snd_soc_register_component);
54 54
55static void devm_platform_release(struct device *dev, void *res)
56{
57 snd_soc_unregister_platform(*(struct device **)res);
58}
59
60/**
61 * devm_snd_soc_register_platform - resource managed platform registration
62 * @dev: Device used to manage platform
63 * @platform: platform to register
64 *
65 * Register a platform driver with automatic unregistration when the device is
66 * unregistered.
67 */
68int devm_snd_soc_register_platform(struct device *dev,
69 const struct snd_soc_platform_driver *platform_drv)
70{
71 struct device **ptr;
72 int ret;
73
74 ptr = devres_alloc(devm_platform_release, sizeof(*ptr), GFP_KERNEL);
75 if (!ptr)
76 return -ENOMEM;
77
78 ret = snd_soc_register_platform(dev, platform_drv);
79 if (ret == 0) {
80 *ptr = dev;
81 devres_add(dev, ptr);
82 } else {
83 devres_free(ptr);
84 }
85
86 return ret;
87}
88EXPORT_SYMBOL_GPL(devm_snd_soc_register_platform);
89
55static void devm_card_release(struct device *dev, void *res) 90static void devm_card_release(struct device *dev, void *res)
56{ 91{
57 snd_soc_unregister_card(*(struct snd_soc_card **)res); 92 snd_soc_unregister_card(*(struct snd_soc_card **)res);
diff --git a/sound/soc/soc-io.c b/sound/soc/soc-io.c
index 260efc8466fc..7767fbd73eb7 100644
--- a/sound/soc/soc-io.c
+++ b/sound/soc/soc-io.c
@@ -17,77 +17,285 @@
17#include <linux/export.h> 17#include <linux/export.h>
18#include <sound/soc.h> 18#include <sound/soc.h>
19 19
20#include <trace/events/asoc.h> 20/**
21 * snd_soc_component_read() - Read register value
22 * @component: Component to read from
23 * @reg: Register to read
24 * @val: Pointer to where the read value is stored
25 *
26 * Return: 0 on success, a negative error code otherwise.
27 */
28int snd_soc_component_read(struct snd_soc_component *component,
29 unsigned int reg, unsigned int *val)
30{
31 int ret;
32
33 if (component->regmap)
34 ret = regmap_read(component->regmap, reg, val);
35 else if (component->read)
36 ret = component->read(component, reg, val);
37 else
38 ret = -EIO;
39
40 return ret;
41}
42EXPORT_SYMBOL_GPL(snd_soc_component_read);
21 43
22#ifdef CONFIG_REGMAP 44/**
23static int hw_write(struct snd_soc_codec *codec, unsigned int reg, 45 * snd_soc_component_write() - Write register value
24 unsigned int value) 46 * @component: Component to write to
47 * @reg: Register to write
48 * @val: Value to write to the register
49 *
50 * Return: 0 on success, a negative error code otherwise.
51 */
52int snd_soc_component_write(struct snd_soc_component *component,
53 unsigned int reg, unsigned int val)
25{ 54{
26 return regmap_write(codec->control_data, reg, value); 55 if (component->regmap)
56 return regmap_write(component->regmap, reg, val);
57 else if (component->write)
58 return component->write(component, reg, val);
59 else
60 return -EIO;
27} 61}
62EXPORT_SYMBOL_GPL(snd_soc_component_write);
28 63
29static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg) 64static int snd_soc_component_update_bits_legacy(
65 struct snd_soc_component *component, unsigned int reg,
66 unsigned int mask, unsigned int val, bool *change)
30{ 67{
68 unsigned int old, new;
31 int ret; 69 int ret;
32 unsigned int val;
33 70
34 ret = regmap_read(codec->control_data, reg, &val); 71 if (!component->read || !component->write)
35 if (ret == 0) 72 return -EIO;
36 return val; 73
74 mutex_lock(&component->io_mutex);
75
76 ret = component->read(component, reg, &old);
77 if (ret < 0)
78 goto out_unlock;
79
80 new = (old & ~mask) | (val & mask);
81 *change = old != new;
82 if (*change)
83 ret = component->write(component, reg, new);
84out_unlock:
85 mutex_unlock(&component->io_mutex);
86
87 return ret;
88}
89
90/**
91 * snd_soc_component_update_bits() - Perform read/modify/write cycle
92 * @component: Component to update
93 * @reg: Register to update
94 * @mask: Mask that specifies which bits to update
95 * @val: New value for the bits specified by mask
96 *
97 * Return: 1 if the operation was successful and the value of the register
98 * changed, 0 if the operation was successful, but the value did not change.
99 * Returns a negative error code otherwise.
100 */
101int snd_soc_component_update_bits(struct snd_soc_component *component,
102 unsigned int reg, unsigned int mask, unsigned int val)
103{
104 bool change;
105 int ret;
106
107 if (component->regmap)
108 ret = regmap_update_bits_check(component->regmap, reg, mask,
109 val, &change);
110 else
111 ret = snd_soc_component_update_bits_legacy(component, reg,
112 mask, val, &change);
113
114 if (ret < 0)
115 return ret;
116 return change;
117}
118EXPORT_SYMBOL_GPL(snd_soc_component_update_bits);
119
120/**
121 * snd_soc_component_update_bits_async() - Perform asynchronous
122 * read/modify/write cycle
123 * @component: Component to update
124 * @reg: Register to update
125 * @mask: Mask that specifies which bits to update
126 * @val: New value for the bits specified by mask
127 *
128 * This function is similar to snd_soc_component_update_bits(), but the update
129 * operation is scheduled asynchronously. This means it may not be completed
130 * when the function returns. To make sure that all scheduled updates have been
131 * completed snd_soc_component_async_complete() must be called.
132 *
133 * Return: 1 if the operation was successful and the value of the register
134 * changed, 0 if the operation was successful, but the value did not change.
135 * Returns a negative error code otherwise.
136 */
137int snd_soc_component_update_bits_async(struct snd_soc_component *component,
138 unsigned int reg, unsigned int mask, unsigned int val)
139{
140 bool change;
141 int ret;
142
143 if (component->regmap)
144 ret = regmap_update_bits_check_async(component->regmap, reg,
145 mask, val, &change);
37 else 146 else
147 ret = snd_soc_component_update_bits_legacy(component, reg,
148 mask, val, &change);
149
150 if (ret < 0)
151 return ret;
152 return change;
153}
154EXPORT_SYMBOL_GPL(snd_soc_component_update_bits_async);
155
156/**
157 * snd_soc_component_async_complete() - Ensure asynchronous I/O has completed
158 * @component: Component for which to wait
159 *
160 * This function blocks until all asynchronous I/O which has previously been
161 * scheduled using snd_soc_component_update_bits_async() has completed.
162 */
163void snd_soc_component_async_complete(struct snd_soc_component *component)
164{
165 if (component->regmap)
166 regmap_async_complete(component->regmap);
167}
168EXPORT_SYMBOL_GPL(snd_soc_component_async_complete);
169
170/**
171 * snd_soc_component_test_bits - Test register for change
172 * @component: component
173 * @reg: Register to test
174 * @mask: Mask that specifies which bits to test
175 * @value: Value to test against
176 *
177 * Tests a register with a new value and checks if the new value is
178 * different from the old value.
179 *
180 * Return: 1 for change, otherwise 0.
181 */
182int snd_soc_component_test_bits(struct snd_soc_component *component,
183 unsigned int reg, unsigned int mask, unsigned int value)
184{
185 unsigned int old, new;
186 int ret;
187
188 ret = snd_soc_component_read(component, reg, &old);
189 if (ret < 0)
190 return ret;
191 new = (old & ~mask) | value;
192 return old != new;
193}
194EXPORT_SYMBOL_GPL(snd_soc_component_test_bits);
195
196unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg)
197{
198 unsigned int val;
199 int ret;
200
201 ret = snd_soc_component_read(&codec->component, reg, &val);
202 if (ret < 0)
38 return -1; 203 return -1;
204
205 return val;
39} 206}
207EXPORT_SYMBOL_GPL(snd_soc_read);
208
209int snd_soc_write(struct snd_soc_codec *codec, unsigned int reg,
210 unsigned int val)
211{
212 return snd_soc_component_write(&codec->component, reg, val);
213}
214EXPORT_SYMBOL_GPL(snd_soc_write);
40 215
41/** 216/**
42 * snd_soc_codec_set_cache_io: Set up standard I/O functions. 217 * snd_soc_update_bits - update codec register bits
218 * @codec: audio codec
219 * @reg: codec register
220 * @mask: register mask
221 * @value: new value
43 * 222 *
44 * @codec: CODEC to configure. 223 * Writes new register value.
45 * @map: Register map to write to
46 * 224 *
47 * Register formats are frequently shared between many I2C and SPI 225 * Returns 1 for change, 0 for no change, or negative error code.
48 * devices. In order to promote code reuse the ASoC core provides 226 */
49 * some standard implementations of CODEC read and write operations 227int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg,
50 * which can be set up using this function. 228 unsigned int mask, unsigned int value)
229{
230 return snd_soc_component_update_bits(&codec->component, reg, mask,
231 value);
232}
233EXPORT_SYMBOL_GPL(snd_soc_update_bits);
234
235/**
236 * snd_soc_test_bits - test register for change
237 * @codec: audio codec
238 * @reg: codec register
239 * @mask: register mask
240 * @value: new value
51 * 241 *
52 * The caller is responsible for allocating and initialising the 242 * Tests a register with a new value and checks if the new value is
53 * actual cache. 243 * different from the old value.
54 * 244 *
55 * Note that at present this code cannot be used by CODECs with 245 * Returns 1 for change else 0.
56 * volatile registers.
57 */ 246 */
58int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, 247int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg,
59 struct regmap *regmap) 248 unsigned int mask, unsigned int value)
249{
250 return snd_soc_component_test_bits(&codec->component, reg, mask, value);
251}
252EXPORT_SYMBOL_GPL(snd_soc_test_bits);
253
254int snd_soc_platform_read(struct snd_soc_platform *platform,
255 unsigned int reg)
60{ 256{
257 unsigned int val;
61 int ret; 258 int ret;
62 259
63 /* Device has made its own regmap arrangements */ 260 ret = snd_soc_component_read(&platform->component, reg, &val);
64 if (!regmap) 261 if (ret < 0)
65 codec->control_data = dev_get_regmap(codec->dev, NULL); 262 return -1;
66 else 263
67 codec->control_data = regmap; 264 return val;
265}
266EXPORT_SYMBOL_GPL(snd_soc_platform_read);
267
268int snd_soc_platform_write(struct snd_soc_platform *platform,
269 unsigned int reg, unsigned int val)
270{
271 return snd_soc_component_write(&platform->component, reg, val);
272}
273EXPORT_SYMBOL_GPL(snd_soc_platform_write);
68 274
69 if (IS_ERR(codec->control_data)) 275/**
70 return PTR_ERR(codec->control_data); 276 * snd_soc_component_init_io() - Initialize regmap IO
277 *
278 * @component: component to initialize
279 * @regmap: regmap instance to use for IO operations
280 *
281 * Return: 0 on success, a negative error code otherwise
282 */
283int snd_soc_component_init_io(struct snd_soc_component *component,
284 struct regmap *regmap)
285{
286 int ret;
71 287
72 codec->write = hw_write; 288 if (!regmap)
73 codec->read = hw_read; 289 return -EINVAL;
74 290
75 ret = regmap_get_val_bytes(codec->control_data); 291 ret = regmap_get_val_bytes(regmap);
76 /* Errors are legitimate for non-integer byte 292 /* Errors are legitimate for non-integer byte
77 * multiples */ 293 * multiples */
78 if (ret > 0) 294 if (ret > 0)
79 codec->val_bytes = ret; 295 component->val_bytes = ret;
80 296
81 codec->using_regmap = true; 297 component->regmap = regmap;
82 298
83 return 0; 299 return 0;
84} 300}
85EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io); 301EXPORT_SYMBOL_GPL(snd_soc_component_init_io);
86#else
87int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
88 struct regmap *regmap)
89{
90 return -ENOTSUPP;
91}
92EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
93#endif
diff --git a/sound/soc/soc-jack.c b/sound/soc/soc-jack.c
index b903f822d1b2..d0d98810af91 100644
--- a/sound/soc/soc-jack.c
+++ b/sound/soc/soc-jack.c
@@ -14,6 +14,7 @@
14#include <sound/jack.h> 14#include <sound/jack.h>
15#include <sound/soc.h> 15#include <sound/soc.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/gpio/consumer.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/workqueue.h> 19#include <linux/workqueue.h>
19#include <linux/delay.h> 20#include <linux/delay.h>
@@ -240,7 +241,7 @@ static void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio)
240 int enable; 241 int enable;
241 int report; 242 int report;
242 243
243 enable = gpio_get_value_cansleep(gpio->gpio); 244 enable = gpiod_get_value_cansleep(gpio->desc);
244 if (gpio->invert) 245 if (gpio->invert)
245 enable = !enable; 246 enable = !enable;
246 247
@@ -297,31 +298,50 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
297 int i, ret; 298 int i, ret;
298 299
299 for (i = 0; i < count; i++) { 300 for (i = 0; i < count; i++) {
300 if (!gpio_is_valid(gpios[i].gpio)) {
301 dev_err(jack->codec->dev, "ASoC: Invalid gpio %d\n",
302 gpios[i].gpio);
303 ret = -EINVAL;
304 goto undo;
305 }
306 if (!gpios[i].name) { 301 if (!gpios[i].name) {
307 dev_err(jack->codec->dev, "ASoC: No name for gpio %d\n", 302 dev_err(jack->codec->dev,
308 gpios[i].gpio); 303 "ASoC: No name for gpio at index %d\n", i);
309 ret = -EINVAL; 304 ret = -EINVAL;
310 goto undo; 305 goto undo;
311 } 306 }
312 307
313 ret = gpio_request(gpios[i].gpio, gpios[i].name); 308 if (gpios[i].gpiod_dev) {
314 if (ret) 309 /* GPIO descriptor */
315 goto undo; 310 gpios[i].desc = gpiod_get_index(gpios[i].gpiod_dev,
311 gpios[i].name,
312 gpios[i].idx);
313 if (IS_ERR(gpios[i].desc)) {
314 ret = PTR_ERR(gpios[i].desc);
315 dev_err(gpios[i].gpiod_dev,
316 "ASoC: Cannot get gpio at index %d: %d",
317 i, ret);
318 goto undo;
319 }
320 } else {
321 /* legacy GPIO number */
322 if (!gpio_is_valid(gpios[i].gpio)) {
323 dev_err(jack->codec->dev,
324 "ASoC: Invalid gpio %d\n",
325 gpios[i].gpio);
326 ret = -EINVAL;
327 goto undo;
328 }
329
330 ret = gpio_request(gpios[i].gpio, gpios[i].name);
331 if (ret)
332 goto undo;
333
334 gpios[i].desc = gpio_to_desc(gpios[i].gpio);
335 }
316 336
317 ret = gpio_direction_input(gpios[i].gpio); 337 ret = gpiod_direction_input(gpios[i].desc);
318 if (ret) 338 if (ret)
319 goto err; 339 goto err;
320 340
321 INIT_DELAYED_WORK(&gpios[i].work, gpio_work); 341 INIT_DELAYED_WORK(&gpios[i].work, gpio_work);
322 gpios[i].jack = jack; 342 gpios[i].jack = jack;
323 343
324 ret = request_any_context_irq(gpio_to_irq(gpios[i].gpio), 344 ret = request_any_context_irq(gpiod_to_irq(gpios[i].desc),
325 gpio_handler, 345 gpio_handler,
326 IRQF_TRIGGER_RISING | 346 IRQF_TRIGGER_RISING |
327 IRQF_TRIGGER_FALLING, 347 IRQF_TRIGGER_FALLING,
@@ -331,15 +351,15 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
331 goto err; 351 goto err;
332 352
333 if (gpios[i].wake) { 353 if (gpios[i].wake) {
334 ret = irq_set_irq_wake(gpio_to_irq(gpios[i].gpio), 1); 354 ret = irq_set_irq_wake(gpiod_to_irq(gpios[i].desc), 1);
335 if (ret != 0) 355 if (ret != 0)
336 dev_err(jack->codec->dev, "ASoC: " 356 dev_err(jack->codec->dev,
337 "Failed to mark GPIO %d as wake source: %d\n", 357 "ASoC: Failed to mark GPIO at index %d as wake source: %d\n",
338 gpios[i].gpio, ret); 358 i, ret);
339 } 359 }
340 360
341 /* Expose GPIO value over sysfs for diagnostic purposes */ 361 /* Expose GPIO value over sysfs for diagnostic purposes */
342 gpio_export(gpios[i].gpio, false); 362 gpiod_export(gpios[i].desc, false);
343 363
344 /* Update initial jack status */ 364 /* Update initial jack status */
345 schedule_delayed_work(&gpios[i].work, 365 schedule_delayed_work(&gpios[i].work,
@@ -358,6 +378,30 @@ undo:
358EXPORT_SYMBOL_GPL(snd_soc_jack_add_gpios); 378EXPORT_SYMBOL_GPL(snd_soc_jack_add_gpios);
359 379
360/** 380/**
381 * snd_soc_jack_add_gpiods - Associate GPIO descriptor pins with an ASoC jack
382 *
383 * @gpiod_dev: GPIO consumer device
384 * @jack: ASoC jack
385 * @count: number of pins
386 * @gpios: array of gpio pins
387 *
388 * This function will request gpio, set data direction and request irq
389 * for each gpio in the array.
390 */
391int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
392 struct snd_soc_jack *jack,
393 int count, struct snd_soc_jack_gpio *gpios)
394{
395 int i;
396
397 for (i = 0; i < count; i++)
398 gpios[i].gpiod_dev = gpiod_dev;
399
400 return snd_soc_jack_add_gpios(jack, count, gpios);
401}
402EXPORT_SYMBOL_GPL(snd_soc_jack_add_gpiods);
403
404/**
361 * snd_soc_jack_free_gpios - Release GPIO pins' resources of an ASoC jack 405 * snd_soc_jack_free_gpios - Release GPIO pins' resources of an ASoC jack
362 * 406 *
363 * @jack: ASoC jack 407 * @jack: ASoC jack
@@ -372,10 +416,10 @@ void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
372 int i; 416 int i;
373 417
374 for (i = 0; i < count; i++) { 418 for (i = 0; i < count; i++) {
375 gpio_unexport(gpios[i].gpio); 419 gpiod_unexport(gpios[i].desc);
376 free_irq(gpio_to_irq(gpios[i].gpio), &gpios[i]); 420 free_irq(gpiod_to_irq(gpios[i].desc), &gpios[i]);
377 cancel_delayed_work_sync(&gpios[i].work); 421 cancel_delayed_work_sync(&gpios[i].work);
378 gpio_free(gpios[i].gpio); 422 gpiod_put(gpios[i].desc);
379 gpios[i].jack = NULL; 423 gpios[i].jack = NULL;
380 } 424 }
381} 425}
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index 2cedf09f6d96..54d18f22a33e 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -555,7 +555,6 @@ static int soc_pcm_close(struct snd_pcm_substream *substream)
555 555
556 if (platform->driver->ops && platform->driver->ops->close) 556 if (platform->driver->ops && platform->driver->ops->close)
557 platform->driver->ops->close(substream); 557 platform->driver->ops->close(substream);
558 cpu_dai->runtime = NULL;
559 558
560 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 559 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
561 if (snd_soc_runtime_ignore_pmdown_time(rtd)) { 560 if (snd_soc_runtime_ignore_pmdown_time(rtd)) {
@@ -819,6 +818,13 @@ static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
819 if (ret < 0) 818 if (ret < 0)
820 return ret; 819 return ret;
821 } 820 }
821
822 if (rtd->dai_link->ops && rtd->dai_link->ops->trigger) {
823 ret = rtd->dai_link->ops->trigger(substream, cmd);
824 if (ret < 0)
825 return ret;
826 }
827
822 return 0; 828 return 0;
823} 829}
824 830
@@ -1012,21 +1018,12 @@ static struct snd_soc_pcm_runtime *dpcm_get_be(struct snd_soc_card *card,
1012} 1018}
1013 1019
1014static inline struct snd_soc_dapm_widget * 1020static inline struct snd_soc_dapm_widget *
1015 rtd_get_cpu_widget(struct snd_soc_pcm_runtime *rtd, int stream) 1021 dai_get_widget(struct snd_soc_dai *dai, int stream)
1016{
1017 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
1018 return rtd->cpu_dai->playback_widget;
1019 else
1020 return rtd->cpu_dai->capture_widget;
1021}
1022
1023static inline struct snd_soc_dapm_widget *
1024 rtd_get_codec_widget(struct snd_soc_pcm_runtime *rtd, int stream)
1025{ 1022{
1026 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 1023 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
1027 return rtd->codec_dai->playback_widget; 1024 return dai->playback_widget;
1028 else 1025 else
1029 return rtd->codec_dai->capture_widget; 1026 return dai->capture_widget;
1030} 1027}
1031 1028
1032static int widget_in_list(struct snd_soc_dapm_widget_list *list, 1029static int widget_in_list(struct snd_soc_dapm_widget_list *list,
@@ -1076,14 +1073,14 @@ static int dpcm_prune_paths(struct snd_soc_pcm_runtime *fe, int stream,
1076 list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) { 1073 list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) {
1077 1074
1078 /* is there a valid CPU DAI widget for this BE */ 1075 /* is there a valid CPU DAI widget for this BE */
1079 widget = rtd_get_cpu_widget(dpcm->be, stream); 1076 widget = dai_get_widget(dpcm->be->cpu_dai, stream);
1080 1077
1081 /* prune the BE if it's no longer in our active list */ 1078 /* prune the BE if it's no longer in our active list */
1082 if (widget && widget_in_list(list, widget)) 1079 if (widget && widget_in_list(list, widget))
1083 continue; 1080 continue;
1084 1081
1085 /* is there a valid CODEC DAI widget for this BE */ 1082 /* is there a valid CODEC DAI widget for this BE */
1086 widget = rtd_get_codec_widget(dpcm->be, stream); 1083 widget = dai_get_widget(dpcm->be->codec_dai, stream);
1087 1084
1088 /* prune the BE if it's no longer in our active list */ 1085 /* prune the BE if it's no longer in our active list */
1089 if (widget && widget_in_list(list, widget)) 1086 if (widget && widget_in_list(list, widget))
@@ -1675,7 +1672,7 @@ int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream,
1675 be->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP; 1672 be->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP;
1676 break; 1673 break;
1677 case SNDRV_PCM_TRIGGER_SUSPEND: 1674 case SNDRV_PCM_TRIGGER_SUSPEND:
1678 if (be->dpcm[stream].state != SND_SOC_DPCM_STATE_STOP) 1675 if (be->dpcm[stream].state != SND_SOC_DPCM_STATE_START)
1679 continue; 1676 continue;
1680 1677
1681 if (!snd_soc_dpcm_can_be_free_stop(fe, be, stream)) 1678 if (!snd_soc_dpcm_can_be_free_stop(fe, be, stream))
diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c
index 25a7f8211ecf..de087ee3458a 100644
--- a/sound/soc/tegra/tegra_wm9712.c
+++ b/sound/soc/tegra/tegra_wm9712.c
@@ -50,9 +50,7 @@ static int tegra_wm9712_init(struct snd_soc_pcm_runtime *rtd)
50 struct snd_soc_codec *codec = codec_dai->codec; 50 struct snd_soc_codec *codec = codec_dai->codec;
51 struct snd_soc_dapm_context *dapm = &codec->dapm; 51 struct snd_soc_dapm_context *dapm = &codec->dapm;
52 52
53 snd_soc_dapm_force_enable_pin(dapm, "Mic Bias"); 53 return snd_soc_dapm_force_enable_pin(dapm, "Mic Bias");
54
55 return snd_soc_dapm_sync(dapm);
56} 54}
57 55
58static struct snd_soc_dai_link tegra_wm9712_dai = { 56static struct snd_soc_dai_link tegra_wm9712_dai = {
diff --git a/sound/soc/ux500/mop500_ab8500.c b/sound/soc/ux500/mop500_ab8500.c
index 7e923ecf8901..be4f1ac7cd5e 100644
--- a/sound/soc/ux500/mop500_ab8500.c
+++ b/sound/soc/ux500/mop500_ab8500.c
@@ -411,7 +411,7 @@ int mop500_ab8500_machine_init(struct snd_soc_pcm_runtime *rtd)
411 drvdata->mclk_sel = MCLK_ULPCLK; 411 drvdata->mclk_sel = MCLK_ULPCLK;
412 412
413 /* Add controls */ 413 /* Add controls */
414 ret = snd_soc_add_card_controls(codec->card, mop500_ab8500_ctrls, 414 ret = snd_soc_add_card_controls(rtd->card, mop500_ab8500_ctrls,
415 ARRAY_SIZE(mop500_ab8500_ctrls)); 415 ARRAY_SIZE(mop500_ab8500_ctrls));
416 if (ret < 0) { 416 if (ret < 0) {
417 pr_err("%s: Failed to add machine-controls (%d)!\n", 417 pr_err("%s: Failed to add machine-controls (%d)!\n",
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 893d5a1afc3c..c3b5b7dca1c3 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -651,7 +651,7 @@ int snd_usb_autoresume(struct snd_usb_audio *chip)
651 int err = -ENODEV; 651 int err = -ENODEV;
652 652
653 down_read(&chip->shutdown_rwsem); 653 down_read(&chip->shutdown_rwsem);
654 if (chip->probing) 654 if (chip->probing && chip->in_pm)
655 err = 0; 655 err = 0;
656 else if (!chip->shutdown) 656 else if (!chip->shutdown)
657 err = usb_autopm_get_interface(chip->pm_intf); 657 err = usb_autopm_get_interface(chip->pm_intf);
@@ -663,7 +663,7 @@ int snd_usb_autoresume(struct snd_usb_audio *chip)
663void snd_usb_autosuspend(struct snd_usb_audio *chip) 663void snd_usb_autosuspend(struct snd_usb_audio *chip)
664{ 664{
665 down_read(&chip->shutdown_rwsem); 665 down_read(&chip->shutdown_rwsem);
666 if (!chip->shutdown && !chip->probing) 666 if (!chip->shutdown && !chip->probing && !chip->in_pm)
667 usb_autopm_put_interface(chip->pm_intf); 667 usb_autopm_put_interface(chip->pm_intf);
668 up_read(&chip->shutdown_rwsem); 668 up_read(&chip->shutdown_rwsem);
669} 669}
@@ -695,8 +695,9 @@ static int usb_audio_suspend(struct usb_interface *intf, pm_message_t message)
695 chip->autosuspended = 1; 695 chip->autosuspended = 1;
696 } 696 }
697 697
698 list_for_each_entry(mixer, &chip->mixer_list, list) 698 if (chip->num_suspended_intf == 1)
699 snd_usb_mixer_suspend(mixer); 699 list_for_each_entry(mixer, &chip->mixer_list, list)
700 snd_usb_mixer_suspend(mixer);
700 701
701 return 0; 702 return 0;
702} 703}
@@ -711,6 +712,8 @@ static int __usb_audio_resume(struct usb_interface *intf, bool reset_resume)
711 return 0; 712 return 0;
712 if (--chip->num_suspended_intf) 713 if (--chip->num_suspended_intf)
713 return 0; 714 return 0;
715
716 chip->in_pm = 1;
714 /* 717 /*
715 * ALSA leaves material resumption to user space 718 * ALSA leaves material resumption to user space
716 * we just notify and restart the mixers 719 * we just notify and restart the mixers
@@ -726,6 +729,7 @@ static int __usb_audio_resume(struct usb_interface *intf, bool reset_resume)
726 chip->autosuspended = 0; 729 chip->autosuspended = 0;
727 730
728err_out: 731err_out:
732 chip->in_pm = 0;
729 return err; 733 return err;
730} 734}
731 735
diff --git a/sound/usb/card.h b/sound/usb/card.h
index 9867ab866857..97acb906acc2 100644
--- a/sound/usb/card.h
+++ b/sound/usb/card.h
@@ -92,6 +92,7 @@ struct snd_usb_endpoint {
92 unsigned int curframesize; /* current packet size in frames (for capture) */ 92 unsigned int curframesize; /* current packet size in frames (for capture) */
93 unsigned int syncmaxsize; /* sync endpoint packet size */ 93 unsigned int syncmaxsize; /* sync endpoint packet size */
94 unsigned int fill_max:1; /* fill max packet size always */ 94 unsigned int fill_max:1; /* fill max packet size always */
95 unsigned int udh01_fb_quirk:1; /* corrupted feedback data */
95 unsigned int datainterval; /* log_2 of data packet interval */ 96 unsigned int datainterval; /* log_2 of data packet interval */
96 unsigned int syncinterval; /* P for adaptive mode, 0 otherwise */ 97 unsigned int syncinterval; /* P for adaptive mode, 0 otherwise */
97 unsigned char silence_value; 98 unsigned char silence_value;
diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c
index e70a87e0d9fe..289f582c9130 100644
--- a/sound/usb/endpoint.c
+++ b/sound/usb/endpoint.c
@@ -471,6 +471,10 @@ struct snd_usb_endpoint *snd_usb_add_endpoint(struct snd_usb_audio *chip,
471 ep->syncinterval = 3; 471 ep->syncinterval = 3;
472 472
473 ep->syncmaxsize = le16_to_cpu(get_endpoint(alts, 1)->wMaxPacketSize); 473 ep->syncmaxsize = le16_to_cpu(get_endpoint(alts, 1)->wMaxPacketSize);
474
475 if (chip->usb_id == USB_ID(0x0644, 0x8038) /* TEAC UD-H01 */ &&
476 ep->syncmaxsize == 4)
477 ep->udh01_fb_quirk = 1;
474 } 478 }
475 479
476 list_add_tail(&ep->list, &chip->ep_list); 480 list_add_tail(&ep->list, &chip->ep_list);
@@ -1105,7 +1109,16 @@ void snd_usb_handle_sync_urb(struct snd_usb_endpoint *ep,
1105 if (f == 0) 1109 if (f == 0)
1106 return; 1110 return;
1107 1111
1108 if (unlikely(ep->freqshift == INT_MIN)) { 1112 if (unlikely(sender->udh01_fb_quirk)) {
1113 /*
1114 * The TEAC UD-H01 firmware sometimes changes the feedback value
1115 * by +/- 0x1.0000.
1116 */
1117 if (f < ep->freqn - 0x8000)
1118 f += 0x10000;
1119 else if (f > ep->freqn + 0x8000)
1120 f -= 0x10000;
1121 } else if (unlikely(ep->freqshift == INT_MIN)) {
1109 /* 1122 /*
1110 * The first time we see a feedback value, determine its format 1123 * The first time we see a feedback value, determine its format
1111 * by shifting it left or right until it matches the nominal 1124 * by shifting it left or right until it matches the nominal
diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c
index 131336d40492..c62a1659106d 100644
--- a/sound/usb/pcm.c
+++ b/sound/usb/pcm.c
@@ -1501,9 +1501,8 @@ static void retire_playback_urb(struct snd_usb_substream *subs,
1501 * The error should be lower than 2ms since the estimate relies 1501 * The error should be lower than 2ms since the estimate relies
1502 * on two reads of a counter updated every ms. 1502 * on two reads of a counter updated every ms.
1503 */ 1503 */
1504 if (printk_ratelimit() && 1504 if (abs(est_delay - subs->last_delay) * 1000 > runtime->rate * 2)
1505 abs(est_delay - subs->last_delay) * 1000 > runtime->rate * 2) 1505 dev_dbg_ratelimited(&subs->dev->dev,
1506 dev_dbg(&subs->dev->dev,
1507 "delay: estimated %d, actual %d\n", 1506 "delay: estimated %d, actual %d\n",
1508 est_delay, subs->last_delay); 1507 est_delay, subs->last_delay);
1509 1508
diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h
index 25c4c7e217de..91d0380431b4 100644
--- a/sound/usb/usbaudio.h
+++ b/sound/usb/usbaudio.h
@@ -40,6 +40,7 @@ struct snd_usb_audio {
40 struct rw_semaphore shutdown_rwsem; 40 struct rw_semaphore shutdown_rwsem;
41 unsigned int shutdown:1; 41 unsigned int shutdown:1;
42 unsigned int probing:1; 42 unsigned int probing:1;
43 unsigned int in_pm:1;
43 unsigned int autosuspended:1; 44 unsigned int autosuspended:1;
44 unsigned int txfr_quirk:1; /* Subframe boundaries on transfers */ 45 unsigned int txfr_quirk:1; /* Subframe boundaries on transfers */
45 46
diff --git a/tools/hv/hv_fcopy_daemon.c b/tools/hv/hv_fcopy_daemon.c
index 4ecc4fd0bc1b..fba1c75aa484 100644
--- a/tools/hv/hv_fcopy_daemon.c
+++ b/tools/hv/hv_fcopy_daemon.c
@@ -82,8 +82,10 @@ static int hv_start_fcopy(struct hv_start_fcopy *smsg)
82 82
83 if (!access(target_fname, F_OK)) { 83 if (!access(target_fname, F_OK)) {
84 syslog(LOG_INFO, "File: %s exists", target_fname); 84 syslog(LOG_INFO, "File: %s exists", target_fname);
85 if (!smsg->copy_flags & OVER_WRITE) 85 if (!(smsg->copy_flags & OVER_WRITE)) {
86 error = HV_ERROR_ALREADY_EXISTS;
86 goto done; 87 goto done;
88 }
87 } 89 }
88 90
89 target_fd = open(target_fname, O_RDWR | O_CREAT | O_CLOEXEC, 0744); 91 target_fd = open(target_fname, O_RDWR | O_CREAT | O_CLOEXEC, 0744);
diff --git a/tools/lib/api/fs/debugfs.c b/tools/lib/api/fs/debugfs.c
index 7c4347962353..a74fba6d7743 100644
--- a/tools/lib/api/fs/debugfs.c
+++ b/tools/lib/api/fs/debugfs.c
@@ -12,8 +12,8 @@
12char debugfs_mountpoint[PATH_MAX + 1] = "/sys/kernel/debug"; 12char debugfs_mountpoint[PATH_MAX + 1] = "/sys/kernel/debug";
13 13
14static const char * const debugfs_known_mountpoints[] = { 14static const char * const debugfs_known_mountpoints[] = {
15 "/sys/kernel/debug/", 15 "/sys/kernel/debug",
16 "/debug/", 16 "/debug",
17 0, 17 0,
18}; 18};
19 19
diff --git a/tools/lib/lockdep/Makefile b/tools/lib/lockdep/Makefile
index 07b0b7542511..cb09d3ff8f58 100644
--- a/tools/lib/lockdep/Makefile
+++ b/tools/lib/lockdep/Makefile
@@ -1,13 +1,8 @@
1# liblockdep version
2LL_VERSION = 0
3LL_PATCHLEVEL = 0
4LL_EXTRAVERSION = 1
5
6# file format version 1# file format version
7FILE_VERSION = 1 2FILE_VERSION = 1
8 3
9MAKEFLAGS += --no-print-directory 4MAKEFLAGS += --no-print-directory
10 5LIBLOCKDEP_VERSION=$(shell make -sC ../../.. kernelversion)
11 6
12# Makefiles suck: This macro sets a default value of $(2) for the 7# Makefiles suck: This macro sets a default value of $(2) for the
13# variable named by $(1), unless the variable has been set by 8# variable named by $(1), unless the variable has been set by
@@ -98,7 +93,7 @@ export prefix libdir bindir src obj
98libdir_SQ = $(subst ','\'',$(libdir)) 93libdir_SQ = $(subst ','\'',$(libdir))
99bindir_SQ = $(subst ','\'',$(bindir)) 94bindir_SQ = $(subst ','\'',$(bindir))
100 95
101LIB_FILE = liblockdep.a liblockdep.so 96LIB_FILE = liblockdep.a liblockdep.so.$(LIBLOCKDEP_VERSION)
102BIN_FILE = lockdep 97BIN_FILE = lockdep
103 98
104CONFIG_INCLUDES = 99CONFIG_INCLUDES =
@@ -110,8 +105,6 @@ N =
110 105
111export Q VERBOSE 106export Q VERBOSE
112 107
113LIBLOCKDEP_VERSION = $(LL_VERSION).$(LL_PATCHLEVEL).$(LL_EXTRAVERSION)
114
115INCLUDES = -I. -I/usr/local/include -I./uinclude -I./include $(CONFIG_INCLUDES) 108INCLUDES = -I. -I/usr/local/include -I./uinclude -I./include $(CONFIG_INCLUDES)
116 109
117# Set compile option CFLAGS if not set elsewhere 110# Set compile option CFLAGS if not set elsewhere
@@ -146,7 +139,7 @@ do_app_build = \
146 139
147do_compile_shared_library = \ 140do_compile_shared_library = \
148 ($(print_shared_lib_compile) \ 141 ($(print_shared_lib_compile) \
149 $(CC) --shared $^ -o $@ -lpthread -ldl) 142 $(CC) --shared $^ -o $@ -lpthread -ldl -Wl,-soname='"$@"';$(shell ln -s $@ liblockdep.so))
150 143
151do_build_static_lib = \ 144do_build_static_lib = \
152 ($(print_static_lib_build) \ 145 ($(print_static_lib_build) \
@@ -177,7 +170,7 @@ all: all_cmd
177 170
178all_cmd: $(CMD_TARGETS) 171all_cmd: $(CMD_TARGETS)
179 172
180liblockdep.so: $(PEVENT_LIB_OBJS) 173liblockdep.so.$(LIBLOCKDEP_VERSION): $(PEVENT_LIB_OBJS)
181 $(Q)$(do_compile_shared_library) 174 $(Q)$(do_compile_shared_library)
182 175
183liblockdep.a: $(PEVENT_LIB_OBJS) 176liblockdep.a: $(PEVENT_LIB_OBJS)
diff --git a/tools/lib/lockdep/uinclude/linux/lockdep.h b/tools/lib/lockdep/uinclude/linux/lockdep.h
index d0f5d6e50214..c1552c28507e 100644
--- a/tools/lib/lockdep/uinclude/linux/lockdep.h
+++ b/tools/lib/lockdep/uinclude/linux/lockdep.h
@@ -10,6 +10,9 @@
10 10
11#define MAX_LOCK_DEPTH 2000UL 11#define MAX_LOCK_DEPTH 2000UL
12 12
13#define asmlinkage
14#define __visible
15
13#include "../../../include/linux/lockdep.h" 16#include "../../../include/linux/lockdep.h"
14 17
15struct task_struct { 18struct task_struct {
diff --git a/tools/lib/traceevent/event-parse.c b/tools/lib/traceevent/event-parse.c
index 1587ea392ad6..b83184f2d484 100644
--- a/tools/lib/traceevent/event-parse.c
+++ b/tools/lib/traceevent/event-parse.c
@@ -50,6 +50,18 @@ static int show_warning = 1;
50 warning(fmt, ##__VA_ARGS__); \ 50 warning(fmt, ##__VA_ARGS__); \
51 } while (0) 51 } while (0)
52 52
53#define do_warning_event(event, fmt, ...) \
54 do { \
55 if (!show_warning) \
56 continue; \
57 \
58 if (event) \
59 warning("[%s:%s] " fmt, event->system, \
60 event->name, ##__VA_ARGS__); \
61 else \
62 warning(fmt, ##__VA_ARGS__); \
63 } while (0)
64
53static void init_input_buf(const char *buf, unsigned long long size) 65static void init_input_buf(const char *buf, unsigned long long size)
54{ 66{
55 input_buf = buf; 67 input_buf = buf;
@@ -1355,7 +1367,7 @@ static int event_read_fields(struct event_format *event, struct format_field **f
1355 } 1367 }
1356 1368
1357 if (!field->type) { 1369 if (!field->type) {
1358 do_warning("%s: no type found", __func__); 1370 do_warning_event(event, "%s: no type found", __func__);
1359 goto fail; 1371 goto fail;
1360 } 1372 }
1361 field->name = last_token; 1373 field->name = last_token;
@@ -1402,7 +1414,7 @@ static int event_read_fields(struct event_format *event, struct format_field **f
1402 free_token(token); 1414 free_token(token);
1403 type = read_token(&token); 1415 type = read_token(&token);
1404 if (type == EVENT_NONE) { 1416 if (type == EVENT_NONE) {
1405 do_warning("failed to find token"); 1417 do_warning_event(event, "failed to find token");
1406 goto fail; 1418 goto fail;
1407 } 1419 }
1408 } 1420 }
@@ -1636,7 +1648,7 @@ process_cond(struct event_format *event, struct print_arg *top, char **tok)
1636 right = alloc_arg(); 1648 right = alloc_arg();
1637 1649
1638 if (!arg || !left || !right) { 1650 if (!arg || !left || !right) {
1639 do_warning("%s: not enough memory!", __func__); 1651 do_warning_event(event, "%s: not enough memory!", __func__);
1640 /* arg will be freed at out_free */ 1652 /* arg will be freed at out_free */
1641 free_arg(left); 1653 free_arg(left);
1642 free_arg(right); 1654 free_arg(right);
@@ -1686,7 +1698,7 @@ process_array(struct event_format *event, struct print_arg *top, char **tok)
1686 1698
1687 arg = alloc_arg(); 1699 arg = alloc_arg();
1688 if (!arg) { 1700 if (!arg) {
1689 do_warning("%s: not enough memory!", __func__); 1701 do_warning_event(event, "%s: not enough memory!", __func__);
1690 /* '*tok' is set to top->op.op. No need to free. */ 1702 /* '*tok' is set to top->op.op. No need to free. */
1691 *tok = NULL; 1703 *tok = NULL;
1692 return EVENT_ERROR; 1704 return EVENT_ERROR;
@@ -1792,7 +1804,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
1792 if (arg->type == PRINT_OP && !arg->op.left) { 1804 if (arg->type == PRINT_OP && !arg->op.left) {
1793 /* handle single op */ 1805 /* handle single op */
1794 if (token[1]) { 1806 if (token[1]) {
1795 do_warning("bad op token %s", token); 1807 do_warning_event(event, "bad op token %s", token);
1796 goto out_free; 1808 goto out_free;
1797 } 1809 }
1798 switch (token[0]) { 1810 switch (token[0]) {
@@ -1802,7 +1814,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
1802 case '-': 1814 case '-':
1803 break; 1815 break;
1804 default: 1816 default:
1805 do_warning("bad op token %s", token); 1817 do_warning_event(event, "bad op token %s", token);
1806 goto out_free; 1818 goto out_free;
1807 1819
1808 } 1820 }
@@ -1888,7 +1900,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
1888 char *new_atom; 1900 char *new_atom;
1889 1901
1890 if (left->type != PRINT_ATOM) { 1902 if (left->type != PRINT_ATOM) {
1891 do_warning("bad pointer type"); 1903 do_warning_event(event, "bad pointer type");
1892 goto out_free; 1904 goto out_free;
1893 } 1905 }
1894 new_atom = realloc(left->atom.atom, 1906 new_atom = realloc(left->atom.atom,
@@ -1930,7 +1942,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
1930 type = process_array(event, arg, tok); 1942 type = process_array(event, arg, tok);
1931 1943
1932 } else { 1944 } else {
1933 do_warning("unknown op '%s'", token); 1945 do_warning_event(event, "unknown op '%s'", token);
1934 event->flags |= EVENT_FL_FAILED; 1946 event->flags |= EVENT_FL_FAILED;
1935 /* the arg is now the left side */ 1947 /* the arg is now the left side */
1936 goto out_free; 1948 goto out_free;
@@ -1951,7 +1963,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
1951 return type; 1963 return type;
1952 1964
1953out_warn_free: 1965out_warn_free:
1954 do_warning("%s: not enough memory!", __func__); 1966 do_warning_event(event, "%s: not enough memory!", __func__);
1955out_free: 1967out_free:
1956 free_token(token); 1968 free_token(token);
1957 *tok = NULL; 1969 *tok = NULL;
@@ -2385,7 +2397,7 @@ process_flags(struct event_format *event, struct print_arg *arg, char **tok)
2385 2397
2386 field = alloc_arg(); 2398 field = alloc_arg();
2387 if (!field) { 2399 if (!field) {
2388 do_warning("%s: not enough memory!", __func__); 2400 do_warning_event(event, "%s: not enough memory!", __func__);
2389 goto out_free; 2401 goto out_free;
2390 } 2402 }
2391 2403
@@ -2438,7 +2450,7 @@ process_symbols(struct event_format *event, struct print_arg *arg, char **tok)
2438 2450
2439 field = alloc_arg(); 2451 field = alloc_arg();
2440 if (!field) { 2452 if (!field) {
2441 do_warning("%s: not enough memory!", __func__); 2453 do_warning_event(event, "%s: not enough memory!", __func__);
2442 goto out_free; 2454 goto out_free;
2443 } 2455 }
2444 2456
@@ -2477,7 +2489,7 @@ process_hex(struct event_format *event, struct print_arg *arg, char **tok)
2477 2489
2478 field = alloc_arg(); 2490 field = alloc_arg();
2479 if (!field) { 2491 if (!field) {
2480 do_warning("%s: not enough memory!", __func__); 2492 do_warning_event(event, "%s: not enough memory!", __func__);
2481 goto out_free; 2493 goto out_free;
2482 } 2494 }
2483 2495
@@ -2492,7 +2504,7 @@ process_hex(struct event_format *event, struct print_arg *arg, char **tok)
2492 2504
2493 field = alloc_arg(); 2505 field = alloc_arg();
2494 if (!field) { 2506 if (!field) {
2495 do_warning("%s: not enough memory!", __func__); 2507 do_warning_event(event, "%s: not enough memory!", __func__);
2496 *tok = NULL; 2508 *tok = NULL;
2497 return EVENT_ERROR; 2509 return EVENT_ERROR;
2498 } 2510 }
@@ -2555,7 +2567,7 @@ process_dynamic_array(struct event_format *event, struct print_arg *arg, char **
2555 free_token(token); 2567 free_token(token);
2556 arg = alloc_arg(); 2568 arg = alloc_arg();
2557 if (!arg) { 2569 if (!arg) {
2558 do_warning("%s: not enough memory!", __func__); 2570 do_warning_event(event, "%s: not enough memory!", __func__);
2559 *tok = NULL; 2571 *tok = NULL;
2560 return EVENT_ERROR; 2572 return EVENT_ERROR;
2561 } 2573 }
@@ -2614,13 +2626,14 @@ process_paren(struct event_format *event, struct print_arg *arg, char **tok)
2614 2626
2615 /* prevous must be an atom */ 2627 /* prevous must be an atom */
2616 if (arg->type != PRINT_ATOM) { 2628 if (arg->type != PRINT_ATOM) {
2617 do_warning("previous needed to be PRINT_ATOM"); 2629 do_warning_event(event, "previous needed to be PRINT_ATOM");
2618 goto out_free; 2630 goto out_free;
2619 } 2631 }
2620 2632
2621 item_arg = alloc_arg(); 2633 item_arg = alloc_arg();
2622 if (!item_arg) { 2634 if (!item_arg) {
2623 do_warning("%s: not enough memory!", __func__); 2635 do_warning_event(event, "%s: not enough memory!",
2636 __func__);
2624 goto out_free; 2637 goto out_free;
2625 } 2638 }
2626 2639
@@ -2721,21 +2734,24 @@ process_func_handler(struct event_format *event, struct pevent_function_handler
2721 for (i = 0; i < func->nr_args; i++) { 2734 for (i = 0; i < func->nr_args; i++) {
2722 farg = alloc_arg(); 2735 farg = alloc_arg();
2723 if (!farg) { 2736 if (!farg) {
2724 do_warning("%s: not enough memory!", __func__); 2737 do_warning_event(event, "%s: not enough memory!",
2738 __func__);
2725 return EVENT_ERROR; 2739 return EVENT_ERROR;
2726 } 2740 }
2727 2741
2728 type = process_arg(event, farg, &token); 2742 type = process_arg(event, farg, &token);
2729 if (i < (func->nr_args - 1)) { 2743 if (i < (func->nr_args - 1)) {
2730 if (type != EVENT_DELIM || strcmp(token, ",") != 0) { 2744 if (type != EVENT_DELIM || strcmp(token, ",") != 0) {
2731 warning("Error: function '%s()' expects %d arguments but event %s only uses %d", 2745 do_warning_event(event,
2746 "Error: function '%s()' expects %d arguments but event %s only uses %d",
2732 func->name, func->nr_args, 2747 func->name, func->nr_args,
2733 event->name, i + 1); 2748 event->name, i + 1);
2734 goto err; 2749 goto err;
2735 } 2750 }
2736 } else { 2751 } else {
2737 if (type != EVENT_DELIM || strcmp(token, ")") != 0) { 2752 if (type != EVENT_DELIM || strcmp(token, ")") != 0) {
2738 warning("Error: function '%s()' only expects %d arguments but event %s has more", 2753 do_warning_event(event,
2754 "Error: function '%s()' only expects %d arguments but event %s has more",
2739 func->name, func->nr_args, event->name); 2755 func->name, func->nr_args, event->name);
2740 goto err; 2756 goto err;
2741 } 2757 }
@@ -2792,7 +2808,7 @@ process_function(struct event_format *event, struct print_arg *arg,
2792 return process_func_handler(event, func, arg, tok); 2808 return process_func_handler(event, func, arg, tok);
2793 } 2809 }
2794 2810
2795 do_warning("function %s not defined", token); 2811 do_warning_event(event, "function %s not defined", token);
2796 free_token(token); 2812 free_token(token);
2797 return EVENT_ERROR; 2813 return EVENT_ERROR;
2798} 2814}
@@ -2878,7 +2894,7 @@ process_arg_token(struct event_format *event, struct print_arg *arg,
2878 2894
2879 case EVENT_ERROR ... EVENT_NEWLINE: 2895 case EVENT_ERROR ... EVENT_NEWLINE:
2880 default: 2896 default:
2881 do_warning("unexpected type %d", type); 2897 do_warning_event(event, "unexpected type %d", type);
2882 return EVENT_ERROR; 2898 return EVENT_ERROR;
2883 } 2899 }
2884 *tok = token; 2900 *tok = token;
@@ -2901,7 +2917,8 @@ static int event_read_print_args(struct event_format *event, struct print_arg **
2901 2917
2902 arg = alloc_arg(); 2918 arg = alloc_arg();
2903 if (!arg) { 2919 if (!arg) {
2904 do_warning("%s: not enough memory!", __func__); 2920 do_warning_event(event, "%s: not enough memory!",
2921 __func__);
2905 return -1; 2922 return -1;
2906 } 2923 }
2907 2924
@@ -3481,11 +3498,12 @@ eval_num_arg(void *data, int size, struct event_format *event, struct print_arg
3481 return val; 3498 return val;
3482 3499
3483out_warning_op: 3500out_warning_op:
3484 do_warning("%s: unknown op '%s'", __func__, arg->op.op); 3501 do_warning_event(event, "%s: unknown op '%s'", __func__, arg->op.op);
3485 return 0; 3502 return 0;
3486 3503
3487out_warning_field: 3504out_warning_field:
3488 do_warning("%s: field %s not found", __func__, arg->field.name); 3505 do_warning_event(event, "%s: field %s not found",
3506 __func__, arg->field.name);
3489 return 0; 3507 return 0;
3490} 3508}
3491 3509
@@ -3591,7 +3609,8 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
3591 } 3609 }
3592 str = malloc(len + 1); 3610 str = malloc(len + 1);
3593 if (!str) { 3611 if (!str) {
3594 do_warning("%s: not enough memory!", __func__); 3612 do_warning_event(event, "%s: not enough memory!",
3613 __func__);
3595 return; 3614 return;
3596 } 3615 }
3597 memcpy(str, data + field->offset, len); 3616 memcpy(str, data + field->offset, len);
@@ -3697,7 +3716,8 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
3697 return; 3716 return;
3698 3717
3699out_warning_field: 3718out_warning_field:
3700 do_warning("%s: field %s not found", __func__, arg->field.name); 3719 do_warning_event(event, "%s: field %s not found",
3720 __func__, arg->field.name);
3701} 3721}
3702 3722
3703static unsigned long long 3723static unsigned long long
@@ -3742,14 +3762,16 @@ process_defined_func(struct trace_seq *s, void *data, int size,
3742 trace_seq_terminate(&str); 3762 trace_seq_terminate(&str);
3743 string = malloc(sizeof(*string)); 3763 string = malloc(sizeof(*string));
3744 if (!string) { 3764 if (!string) {
3745 do_warning("%s(%d): malloc str", __func__, __LINE__); 3765 do_warning_event(event, "%s(%d): malloc str",
3766 __func__, __LINE__);
3746 goto out_free; 3767 goto out_free;
3747 } 3768 }
3748 string->next = strings; 3769 string->next = strings;
3749 string->str = strdup(str.buffer); 3770 string->str = strdup(str.buffer);
3750 if (!string->str) { 3771 if (!string->str) {
3751 free(string); 3772 free(string);
3752 do_warning("%s(%d): malloc str", __func__, __LINE__); 3773 do_warning_event(event, "%s(%d): malloc str",
3774 __func__, __LINE__);
3753 goto out_free; 3775 goto out_free;
3754 } 3776 }
3755 args[i] = (uintptr_t)string->str; 3777 args[i] = (uintptr_t)string->str;
@@ -3761,7 +3783,7 @@ process_defined_func(struct trace_seq *s, void *data, int size,
3761 * Something went totally wrong, this is not 3783 * Something went totally wrong, this is not
3762 * an input error, something in this code broke. 3784 * an input error, something in this code broke.
3763 */ 3785 */
3764 do_warning("Unexpected end of arguments\n"); 3786 do_warning_event(event, "Unexpected end of arguments\n");
3765 goto out_free; 3787 goto out_free;
3766 } 3788 }
3767 farg = farg->next; 3789 farg = farg->next;
@@ -3811,12 +3833,12 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
3811 if (!field) { 3833 if (!field) {
3812 field = pevent_find_field(event, "buf"); 3834 field = pevent_find_field(event, "buf");
3813 if (!field) { 3835 if (!field) {
3814 do_warning("can't find buffer field for binary printk"); 3836 do_warning_event(event, "can't find buffer field for binary printk");
3815 return NULL; 3837 return NULL;
3816 } 3838 }
3817 ip_field = pevent_find_field(event, "ip"); 3839 ip_field = pevent_find_field(event, "ip");
3818 if (!ip_field) { 3840 if (!ip_field) {
3819 do_warning("can't find ip field for binary printk"); 3841 do_warning_event(event, "can't find ip field for binary printk");
3820 return NULL; 3842 return NULL;
3821 } 3843 }
3822 pevent->bprint_buf_field = field; 3844 pevent->bprint_buf_field = field;
@@ -3830,7 +3852,8 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
3830 */ 3852 */
3831 args = alloc_arg(); 3853 args = alloc_arg();
3832 if (!args) { 3854 if (!args) {
3833 do_warning("%s(%d): not enough memory!", __func__, __LINE__); 3855 do_warning_event(event, "%s(%d): not enough memory!",
3856 __func__, __LINE__);
3834 return NULL; 3857 return NULL;
3835 } 3858 }
3836 arg = args; 3859 arg = args;
@@ -3896,7 +3919,7 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
3896 bptr += vsize; 3919 bptr += vsize;
3897 arg = alloc_arg(); 3920 arg = alloc_arg();
3898 if (!arg) { 3921 if (!arg) {
3899 do_warning("%s(%d): not enough memory!", 3922 do_warning_event(event, "%s(%d): not enough memory!",
3900 __func__, __LINE__); 3923 __func__, __LINE__);
3901 goto out_free; 3924 goto out_free;
3902 } 3925 }
@@ -3919,7 +3942,7 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
3919 case 's': 3942 case 's':
3920 arg = alloc_arg(); 3943 arg = alloc_arg();
3921 if (!arg) { 3944 if (!arg) {
3922 do_warning("%s(%d): not enough memory!", 3945 do_warning_event(event, "%s(%d): not enough memory!",
3923 __func__, __LINE__); 3946 __func__, __LINE__);
3924 goto out_free; 3947 goto out_free;
3925 } 3948 }
@@ -3959,7 +3982,7 @@ get_bprint_format(void *data, int size __maybe_unused,
3959 if (!field) { 3982 if (!field) {
3960 field = pevent_find_field(event, "fmt"); 3983 field = pevent_find_field(event, "fmt");
3961 if (!field) { 3984 if (!field) {
3962 do_warning("can't find format field for binary printk"); 3985 do_warning_event(event, "can't find format field for binary printk");
3963 return NULL; 3986 return NULL;
3964 } 3987 }
3965 pevent->bprint_fmt_field = field; 3988 pevent->bprint_fmt_field = field;
@@ -4003,8 +4026,8 @@ static void print_mac_arg(struct trace_seq *s, int mac, void *data, int size,
4003 arg->field.field = 4026 arg->field.field =
4004 pevent_find_any_field(event, arg->field.name); 4027 pevent_find_any_field(event, arg->field.name);
4005 if (!arg->field.field) { 4028 if (!arg->field.field) {
4006 do_warning("%s: field %s not found", 4029 do_warning_event(event, "%s: field %s not found",
4007 __func__, arg->field.name); 4030 __func__, arg->field.name);
4008 return; 4031 return;
4009 } 4032 }
4010 } 4033 }
@@ -4176,7 +4199,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4176 case '*': 4199 case '*':
4177 /* The argument is the length. */ 4200 /* The argument is the length. */
4178 if (!arg) { 4201 if (!arg) {
4179 do_warning("no argument match"); 4202 do_warning_event(event, "no argument match");
4180 event->flags |= EVENT_FL_FAILED; 4203 event->flags |= EVENT_FL_FAILED;
4181 goto out_failed; 4204 goto out_failed;
4182 } 4205 }
@@ -4213,7 +4236,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4213 case 'X': 4236 case 'X':
4214 case 'u': 4237 case 'u':
4215 if (!arg) { 4238 if (!arg) {
4216 do_warning("no argument match"); 4239 do_warning_event(event, "no argument match");
4217 event->flags |= EVENT_FL_FAILED; 4240 event->flags |= EVENT_FL_FAILED;
4218 goto out_failed; 4241 goto out_failed;
4219 } 4242 }
@@ -4223,7 +4246,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4223 4246
4224 /* should never happen */ 4247 /* should never happen */
4225 if (len > 31) { 4248 if (len > 31) {
4226 do_warning("bad format!"); 4249 do_warning_event(event, "bad format!");
4227 event->flags |= EVENT_FL_FAILED; 4250 event->flags |= EVENT_FL_FAILED;
4228 len = 31; 4251 len = 31;
4229 } 4252 }
@@ -4290,13 +4313,13 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4290 trace_seq_printf(s, format, (long long)val); 4313 trace_seq_printf(s, format, (long long)val);
4291 break; 4314 break;
4292 default: 4315 default:
4293 do_warning("bad count (%d)", ls); 4316 do_warning_event(event, "bad count (%d)", ls);
4294 event->flags |= EVENT_FL_FAILED; 4317 event->flags |= EVENT_FL_FAILED;
4295 } 4318 }
4296 break; 4319 break;
4297 case 's': 4320 case 's':
4298 if (!arg) { 4321 if (!arg) {
4299 do_warning("no matching argument"); 4322 do_warning_event(event, "no matching argument");
4300 event->flags |= EVENT_FL_FAILED; 4323 event->flags |= EVENT_FL_FAILED;
4301 goto out_failed; 4324 goto out_failed;
4302 } 4325 }
@@ -4306,7 +4329,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4306 4329
4307 /* should never happen */ 4330 /* should never happen */
4308 if (len > 31) { 4331 if (len > 31) {
4309 do_warning("bad format!"); 4332 do_warning_event(event, "bad format!");
4310 event->flags |= EVENT_FL_FAILED; 4333 event->flags |= EVENT_FL_FAILED;
4311 len = 31; 4334 len = 31;
4312 } 4335 }
@@ -4321,6 +4344,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
4321 format, len_arg, arg); 4344 format, len_arg, arg);
4322 trace_seq_terminate(&p); 4345 trace_seq_terminate(&p);
4323 trace_seq_puts(s, p.buffer); 4346 trace_seq_puts(s, p.buffer);
4347 trace_seq_destroy(&p);
4324 arg = arg->next; 4348 arg = arg->next;
4325 break; 4349 break;
4326 default: 4350 default:
diff --git a/tools/lib/traceevent/event-parse.h b/tools/lib/traceevent/event-parse.h
index 791c539374c7..feab94281634 100644
--- a/tools/lib/traceevent/event-parse.h
+++ b/tools/lib/traceevent/event-parse.h
@@ -876,8 +876,8 @@ struct event_filter {
876struct event_filter *pevent_filter_alloc(struct pevent *pevent); 876struct event_filter *pevent_filter_alloc(struct pevent *pevent);
877 877
878/* for backward compatibility */ 878/* for backward compatibility */
879#define FILTER_NONE PEVENT_ERRNO__FILTER_NOT_FOUND 879#define FILTER_NONE PEVENT_ERRNO__NO_FILTER
880#define FILTER_NOEXIST PEVENT_ERRNO__NO_FILTER 880#define FILTER_NOEXIST PEVENT_ERRNO__FILTER_NOT_FOUND
881#define FILTER_MISS PEVENT_ERRNO__FILTER_MISS 881#define FILTER_MISS PEVENT_ERRNO__FILTER_MISS
882#define FILTER_MATCH PEVENT_ERRNO__FILTER_MATCH 882#define FILTER_MATCH PEVENT_ERRNO__FILTER_MATCH
883 883
diff --git a/tools/net/bpf_dbg.c b/tools/net/bpf_dbg.c
index bb31813e43dd..9a287bec695a 100644
--- a/tools/net/bpf_dbg.c
+++ b/tools/net/bpf_dbg.c
@@ -820,7 +820,7 @@ do_div:
820 r->A &= r->X; 820 r->A &= r->X;
821 break; 821 break;
822 case BPF_ALU_AND | BPF_K: 822 case BPF_ALU_AND | BPF_K:
823 r->A &= r->X; 823 r->A &= K;
824 break; 824 break;
825 case BPF_ALU_OR | BPF_X: 825 case BPF_ALU_OR | BPF_X:
826 r->A |= r->X; 826 r->A |= r->X;
diff --git a/tools/perf/Documentation/perf-bench.txt b/tools/perf/Documentation/perf-bench.txt
index 7065cd6fbdfc..4464ad770d51 100644
--- a/tools/perf/Documentation/perf-bench.txt
+++ b/tools/perf/Documentation/perf-bench.txt
@@ -48,6 +48,12 @@ SUBSYSTEM
48'mem':: 48'mem'::
49 Memory access performance. 49 Memory access performance.
50 50
51'numa'::
52 NUMA scheduling and MM benchmarks.
53
54'futex'::
55 Futex stressing benchmarks.
56
51'all':: 57'all'::
52 All benchmark subsystems. 58 All benchmark subsystems.
53 59
@@ -187,6 +193,22 @@ Show only the result with page faults before memset.
187--no-prefault:: 193--no-prefault::
188Show only the result without page faults before memset. 194Show only the result without page faults before memset.
189 195
196SUITES FOR 'numa'
197~~~~~~~~~~~~~~~~~
198*mem*::
199Suite for evaluating NUMA workloads.
200
201SUITES FOR 'futex'
202~~~~~~~~~~~~~~~~~~
203*hash*::
204Suite for evaluating hash tables.
205
206*wake*::
207Suite for evaluating wake calls.
208
209*requeue*::
210Suite for evaluating requeue calls.
211
190SEE ALSO 212SEE ALSO
191-------- 213--------
192linkperf:perf[1] 214linkperf:perf[1]
diff --git a/tools/perf/Documentation/perf-top.txt b/tools/perf/Documentation/perf-top.txt
index cdd8d4946dba..976b00c6cdb1 100644
--- a/tools/perf/Documentation/perf-top.txt
+++ b/tools/perf/Documentation/perf-top.txt
@@ -87,7 +87,6 @@ Default is to monitor all CPUS.
87--realtime=<priority>:: 87--realtime=<priority>::
88 Collect data with this RT SCHED_FIFO priority. 88 Collect data with this RT SCHED_FIFO priority.
89 89
90-s <symbol>::
91--sym-annotate=<symbol>:: 90--sym-annotate=<symbol>::
92 Annotate this symbol. 91 Annotate this symbol.
93 92
diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
index 50d875d970c4..895edd32930c 100644
--- a/tools/perf/Makefile.perf
+++ b/tools/perf/Makefile.perf
@@ -192,13 +192,13 @@ endif
192export PERL_PATH 192export PERL_PATH
193 193
194$(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(OUTPUT)util/parse-events-bison.c 194$(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(OUTPUT)util/parse-events-bison.c
195 $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) -t util/parse-events.l > $(OUTPUT)util/parse-events-flex.c 195 $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) util/parse-events.l
196 196
197$(OUTPUT)util/parse-events-bison.c: util/parse-events.y 197$(OUTPUT)util/parse-events-bison.c: util/parse-events.y
198 $(QUIET_BISON)$(BISON) -v util/parse-events.y -d $(PARSER_DEBUG_BISON) -o $(OUTPUT)util/parse-events-bison.c -p parse_events_ 198 $(QUIET_BISON)$(BISON) -v util/parse-events.y -d $(PARSER_DEBUG_BISON) -o $(OUTPUT)util/parse-events-bison.c -p parse_events_
199 199
200$(OUTPUT)util/pmu-flex.c: util/pmu.l $(OUTPUT)util/pmu-bison.c 200$(OUTPUT)util/pmu-flex.c: util/pmu.l $(OUTPUT)util/pmu-bison.c
201 $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/pmu-flex.h -t util/pmu.l > $(OUTPUT)util/pmu-flex.c 201 $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/pmu-flex.h util/pmu.l
202 202
203$(OUTPUT)util/pmu-bison.c: util/pmu.y 203$(OUTPUT)util/pmu-bison.c: util/pmu.y
204 $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c -p perf_pmu_ 204 $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c -p perf_pmu_
@@ -589,7 +589,7 @@ $(GTK_OBJS): $(OUTPUT)%.o: %.c $(LIB_H)
589 $(QUIET_CC)$(CC) -o $@ -c -fPIC $(CFLAGS) $(GTK_CFLAGS) $< 589 $(QUIET_CC)$(CC) -o $@ -c -fPIC $(CFLAGS) $(GTK_CFLAGS) $<
590 590
591$(OUTPUT)libperf-gtk.so: $(GTK_OBJS) $(PERFLIBS) 591$(OUTPUT)libperf-gtk.so: $(GTK_OBJS) $(PERFLIBS)
592 $(QUIET_LINK)$(CC) -o $@ -shared $(ALL_LDFLAGS) $(filter %.o,$^) $(GTK_LIBS) 592 $(QUIET_LINK)$(CC) -o $@ -shared $(LDFLAGS) $(filter %.o,$^) $(GTK_LIBS)
593 593
594$(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS 594$(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
595 $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \ 595 $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
diff --git a/tools/perf/arch/x86/tests/dwarf-unwind.c b/tools/perf/arch/x86/tests/dwarf-unwind.c
index b602ad93ce63..83bc2385e6d3 100644
--- a/tools/perf/arch/x86/tests/dwarf-unwind.c
+++ b/tools/perf/arch/x86/tests/dwarf-unwind.c
@@ -23,9 +23,10 @@ static int sample_ustack(struct perf_sample *sample,
23 23
24 sp = (unsigned long) regs[PERF_REG_X86_SP]; 24 sp = (unsigned long) regs[PERF_REG_X86_SP];
25 25
26 map = map_groups__find(&thread->mg, MAP__FUNCTION, (u64) sp); 26 map = map_groups__find(&thread->mg, MAP__VARIABLE, (u64) sp);
27 if (!map) { 27 if (!map) {
28 pr_debug("failed to get stack map\n"); 28 pr_debug("failed to get stack map\n");
29 free(buf);
29 return -1; 30 return -1;
30 } 31 }
31 32
diff --git a/tools/perf/arch/x86/tests/regs_load.S b/tools/perf/arch/x86/tests/regs_load.S
index 99167bf644ea..60875d5c556c 100644
--- a/tools/perf/arch/x86/tests/regs_load.S
+++ b/tools/perf/arch/x86/tests/regs_load.S
@@ -1,4 +1,3 @@
1
2#include <linux/linkage.h> 1#include <linux/linkage.h>
3 2
4#define AX 0 3#define AX 0
@@ -90,3 +89,10 @@ ENTRY(perf_regs_load)
90 ret 89 ret
91ENDPROC(perf_regs_load) 90ENDPROC(perf_regs_load)
92#endif 91#endif
92
93/*
94 * We need to provide note.GNU-stack section, saying that we want
95 * NOT executable stack. Otherwise the final linking will assume that
96 * the ELF stack should not be restricted at all and set it RWX.
97 */
98.section .note.GNU-stack,"",@progbits
diff --git a/tools/perf/bench/numa.c b/tools/perf/bench/numa.c
index 97d86d828190..ebfa163b80b5 100644
--- a/tools/perf/bench/numa.c
+++ b/tools/perf/bench/numa.c
@@ -1593,6 +1593,10 @@ static void init_params(struct params *p, const char *name, int argc, const char
1593 p->data_rand_walk = true; 1593 p->data_rand_walk = true;
1594 p->nr_loops = -1; 1594 p->nr_loops = -1;
1595 p->init_random = true; 1595 p->init_random = true;
1596 p->mb_global_str = "1";
1597 p->nr_proc = 1;
1598 p->nr_threads = 1;
1599 p->nr_secs = 5;
1596 p->run_all = argc == 1; 1600 p->run_all = argc == 1;
1597} 1601}
1598 1602
diff --git a/tools/perf/builtin-kvm.c b/tools/perf/builtin-kvm.c
index 21c164b8f9db..0f1e5a2f6ad7 100644
--- a/tools/perf/builtin-kvm.c
+++ b/tools/perf/builtin-kvm.c
@@ -404,6 +404,7 @@ static struct kvm_event *kvm_alloc_init_event(struct event_key *key)
404 } 404 }
405 405
406 event->key = *key; 406 event->key = *key;
407 init_stats(&event->total.stats);
407 return event; 408 return event;
408} 409}
409 410
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index eb524f91bffe..8ce62ef7f6c3 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -374,7 +374,7 @@ static int __cmd_record(struct record *rec, int argc, const char **argv)
374 374
375 session = perf_session__new(file, false, NULL); 375 session = perf_session__new(file, false, NULL);
376 if (session == NULL) { 376 if (session == NULL) {
377 pr_err("Not enough memory for reading perf file header\n"); 377 pr_err("Perf session creation failed.\n");
378 return -1; 378 return -1;
379 } 379 }
380 380
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 8b0e1c9234d9..65a151e36067 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -174,13 +174,20 @@ static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel)
174 174
175static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel) 175static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel)
176{ 176{
177 memset(evsel->priv, 0, sizeof(struct perf_stat)); 177 int i;
178 struct perf_stat *ps = evsel->priv;
179
180 for (i = 0; i < 3; i++)
181 init_stats(&ps->res_stats[i]);
178} 182}
179 183
180static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel) 184static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel)
181{ 185{
182 evsel->priv = zalloc(sizeof(struct perf_stat)); 186 evsel->priv = zalloc(sizeof(struct perf_stat));
183 return evsel->priv == NULL ? -ENOMEM : 0; 187 if (evsel == NULL)
188 return -ENOMEM;
189 perf_evsel__reset_stat_priv(evsel);
190 return 0;
184} 191}
185 192
186static void perf_evsel__free_stat_priv(struct perf_evsel *evsel) 193static void perf_evsel__free_stat_priv(struct perf_evsel *evsel)
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index c23418225c2c..802cf544202b 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -34,6 +34,14 @@ ifeq ($(ARCH),arm)
34 LIBUNWIND_LIBS = -lunwind -lunwind-arm 34 LIBUNWIND_LIBS = -lunwind -lunwind-arm
35endif 35endif
36 36
37# So far there's only x86 libdw unwind support merged in perf.
38# Disable it on all other architectures in case libdw unwind
39# support is detected in system. Add supported architectures
40# to the check.
41ifneq ($(ARCH),x86)
42 NO_LIBDW_DWARF_UNWIND := 1
43endif
44
37ifeq ($(LIBUNWIND_LIBS),) 45ifeq ($(LIBUNWIND_LIBS),)
38 NO_LIBUNWIND := 1 46 NO_LIBUNWIND := 1
39else 47else
@@ -65,10 +73,9 @@ ifndef NO_LIBELF
65 ifdef LIBDW_DIR 73 ifdef LIBDW_DIR
66 LIBDW_CFLAGS := -I$(LIBDW_DIR)/include 74 LIBDW_CFLAGS := -I$(LIBDW_DIR)/include
67 LIBDW_LDFLAGS := -L$(LIBDW_DIR)/lib 75 LIBDW_LDFLAGS := -L$(LIBDW_DIR)/lib
68
69 FEATURE_CHECK_CFLAGS-libdw-dwarf-unwind := $(LIBDW_CFLAGS)
70 FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind := $(LIBDW_LDFLAGS) -ldw
71 endif 76 endif
77 FEATURE_CHECK_CFLAGS-libdw-dwarf-unwind := $(LIBDW_CFLAGS)
78 FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind := $(LIBDW_LDFLAGS) -ldw
72endif 79endif
73 80
74# include ARCH specific config 81# include ARCH specific config
@@ -110,6 +117,10 @@ CFLAGS += -Wall
110CFLAGS += -Wextra 117CFLAGS += -Wextra
111CFLAGS += -std=gnu99 118CFLAGS += -std=gnu99
112 119
120# Enforce a non-executable stack, as we may regress (again) in the future by
121# adding assembler files missing the .GNU-stack linker note.
122LDFLAGS += -Wl,-z,noexecstack
123
113EXTLIBS = -lelf -lpthread -lrt -lm -ldl 124EXTLIBS = -lelf -lpthread -lrt -lm -ldl
114 125
115ifneq ($(OUTPUT),) 126ifneq ($(OUTPUT),)
@@ -187,7 +198,10 @@ VF_FEATURE_TESTS = \
187 stackprotector-all \ 198 stackprotector-all \
188 timerfd \ 199 timerfd \
189 libunwind-debug-frame \ 200 libunwind-debug-frame \
190 bionic 201 bionic \
202 liberty \
203 liberty-z \
204 cplus-demangle
191 205
192# Set FEATURE_CHECK_(C|LD)FLAGS-all for all CORE_FEATURE_TESTS features. 206# Set FEATURE_CHECK_(C|LD)FLAGS-all for all CORE_FEATURE_TESTS features.
193# If in the future we need per-feature checks/flags for features not 207# If in the future we need per-feature checks/flags for features not
@@ -278,6 +292,8 @@ else
278 NO_LIBELF := 1 292 NO_LIBELF := 1
279 NO_DWARF := 1 293 NO_DWARF := 1
280 NO_DEMANGLE := 1 294 NO_DEMANGLE := 1
295 NO_LIBUNWIND := 1
296 NO_LIBDW_DWARF_UNWIND := 1
281 else 297 else
282 msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static); 298 msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static);
283 endif 299 endif
@@ -503,7 +519,21 @@ else
503endif 519endif
504 520
505ifeq ($(feature-libbfd), 1) 521ifeq ($(feature-libbfd), 1)
506 EXTLIBS += -lbfd -lz -liberty 522 EXTLIBS += -lbfd
523
524 # call all detections now so we get correct
525 # status in VF output
526 $(call feature_check,liberty)
527 $(call feature_check,liberty-z)
528 $(call feature_check,cplus-demangle)
529
530 ifeq ($(feature-liberty), 1)
531 EXTLIBS += -liberty
532 else
533 ifeq ($(feature-liberty-z), 1)
534 EXTLIBS += -liberty -lz
535 endif
536 endif
507endif 537endif
508 538
509ifdef NO_DEMANGLE 539ifdef NO_DEMANGLE
@@ -514,15 +544,10 @@ else
514 CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT 544 CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT
515 else 545 else
516 ifneq ($(feature-libbfd), 1) 546 ifneq ($(feature-libbfd), 1)
517 $(call feature_check,liberty) 547 ifneq ($(feature-liberty), 1)
518 ifeq ($(feature-liberty), 1) 548 ifneq ($(feature-liberty-z), 1)
519 EXTLIBS += -lbfd -liberty 549 # we dont have neither HAVE_CPLUS_DEMANGLE_SUPPORT
520 else 550 # or any of 'bfd iberty z' trinity
521 $(call feature_check,liberty-z)
522 ifeq ($(feature-liberty-z), 1)
523 EXTLIBS += -lbfd -liberty -lz
524 else
525 $(call feature_check,cplus-demangle)
526 ifeq ($(feature-cplus-demangle), 1) 551 ifeq ($(feature-cplus-demangle), 1)
527 EXTLIBS += -liberty 552 EXTLIBS += -liberty
528 CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT 553 CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT
diff --git a/tools/perf/tests/code-reading.c b/tools/perf/tests/code-reading.c
index 653a8fe2db95..bfb186900ac0 100644
--- a/tools/perf/tests/code-reading.c
+++ b/tools/perf/tests/code-reading.c
@@ -504,6 +504,7 @@ static int do_test_code_reading(bool try_kcore)
504 if (ret < 0) { 504 if (ret < 0) {
505 if (!excl_kernel) { 505 if (!excl_kernel) {
506 excl_kernel = true; 506 excl_kernel = true;
507 perf_evlist__set_maps(evlist, NULL, NULL);
507 perf_evlist__delete(evlist); 508 perf_evlist__delete(evlist);
508 evlist = NULL; 509 evlist = NULL;
509 continue; 510 continue;
diff --git a/tools/perf/tests/make b/tools/perf/tests/make
index 5daeae1cb4c0..2f92d6e7ee00 100644
--- a/tools/perf/tests/make
+++ b/tools/perf/tests/make
@@ -46,6 +46,7 @@ make_install_man := install-man
46make_install_html := install-html 46make_install_html := install-html
47make_install_info := install-info 47make_install_info := install-info
48make_install_pdf := install-pdf 48make_install_pdf := install-pdf
49make_static := LDFLAGS=-static
49 50
50# all the NO_* variable combined 51# all the NO_* variable combined
51make_minimal := NO_LIBPERL=1 NO_LIBPYTHON=1 NO_NEWT=1 NO_GTK2=1 52make_minimal := NO_LIBPERL=1 NO_LIBPYTHON=1 NO_NEWT=1 NO_GTK2=1
@@ -87,6 +88,7 @@ run += make_install_bin
87# run += make_install_info 88# run += make_install_info
88# run += make_install_pdf 89# run += make_install_pdf
89run += make_minimal 90run += make_minimal
91run += make_static
90 92
91ifneq ($(call has,ctags),) 93ifneq ($(call has,ctags),)
92run += make_tags 94run += make_tags
diff --git a/tools/perf/util/data.c b/tools/perf/util/data.c
index 1fbcd8bdc11b..55de44ecebef 100644
--- a/tools/perf/util/data.c
+++ b/tools/perf/util/data.c
@@ -86,10 +86,17 @@ static int open_file_read(struct perf_data_file *file)
86 86
87static int open_file_write(struct perf_data_file *file) 87static int open_file_write(struct perf_data_file *file)
88{ 88{
89 int fd;
90
89 if (check_backup(file)) 91 if (check_backup(file))
90 return -1; 92 return -1;
91 93
92 return open(file->path, O_CREAT|O_RDWR|O_TRUNC, S_IRUSR|S_IWUSR); 94 fd = open(file->path, O_CREAT|O_RDWR|O_TRUNC, S_IRUSR|S_IWUSR);
95
96 if (fd < 0)
97 pr_err("failed to open %s : %s\n", file->path, strerror(errno));
98
99 return fd;
93} 100}
94 101
95static int open_file(struct perf_data_file *file) 102static int open_file(struct perf_data_file *file)
diff --git a/tools/perf/util/machine.c b/tools/perf/util/machine.c
index a53cd0b8c151..27c2a5efe450 100644
--- a/tools/perf/util/machine.c
+++ b/tools/perf/util/machine.c
@@ -717,7 +717,7 @@ static char *get_kernel_version(const char *root_dir)
717} 717}
718 718
719static int map_groups__set_modules_path_dir(struct map_groups *mg, 719static int map_groups__set_modules_path_dir(struct map_groups *mg,
720 const char *dir_name) 720 const char *dir_name, int depth)
721{ 721{
722 struct dirent *dent; 722 struct dirent *dent;
723 DIR *dir = opendir(dir_name); 723 DIR *dir = opendir(dir_name);
@@ -742,7 +742,15 @@ static int map_groups__set_modules_path_dir(struct map_groups *mg,
742 !strcmp(dent->d_name, "..")) 742 !strcmp(dent->d_name, ".."))
743 continue; 743 continue;
744 744
745 ret = map_groups__set_modules_path_dir(mg, path); 745 /* Do not follow top-level source and build symlinks */
746 if (depth == 0) {
747 if (!strcmp(dent->d_name, "source") ||
748 !strcmp(dent->d_name, "build"))
749 continue;
750 }
751
752 ret = map_groups__set_modules_path_dir(mg, path,
753 depth + 1);
746 if (ret < 0) 754 if (ret < 0)
747 goto out; 755 goto out;
748 } else { 756 } else {
@@ -786,11 +794,11 @@ static int machine__set_modules_path(struct machine *machine)
786 if (!version) 794 if (!version)
787 return -1; 795 return -1;
788 796
789 snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s/kernel", 797 snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s",
790 machine->root_dir, version); 798 machine->root_dir, version);
791 free(version); 799 free(version);
792 800
793 return map_groups__set_modules_path_dir(&machine->kmaps, modules_path); 801 return map_groups__set_modules_path_dir(&machine->kmaps, modules_path, 0);
794} 802}
795 803
796static int machine__create_module(void *arg, const char *name, u64 start) 804static int machine__create_module(void *arg, const char *name, u64 start)
diff --git a/tools/perf/util/probe-finder.c b/tools/perf/util/probe-finder.c
index df0238654698..562762117639 100644
--- a/tools/perf/util/probe-finder.c
+++ b/tools/perf/util/probe-finder.c
@@ -985,7 +985,7 @@ static int debuginfo__find_probes(struct debuginfo *dbg,
985 985
986#if _ELFUTILS_PREREQ(0, 142) 986#if _ELFUTILS_PREREQ(0, 142)
987 /* Get the call frame information from this dwarf */ 987 /* Get the call frame information from this dwarf */
988 pf->cfi = dwarf_getcfi(dbg->dbg); 988 pf->cfi = dwarf_getcfi_elf(dwarf_getelf(dbg->dbg));
989#endif 989#endif
990 990
991 off = 0; 991 off = 0;
@@ -1441,13 +1441,15 @@ static int line_range_walk_cb(const char *fname, int lineno,
1441 void *data) 1441 void *data)
1442{ 1442{
1443 struct line_finder *lf = data; 1443 struct line_finder *lf = data;
1444 int err;
1444 1445
1445 if ((strtailcmp(fname, lf->fname) != 0) || 1446 if ((strtailcmp(fname, lf->fname) != 0) ||
1446 (lf->lno_s > lineno || lf->lno_e < lineno)) 1447 (lf->lno_s > lineno || lf->lno_e < lineno))
1447 return 0; 1448 return 0;
1448 1449
1449 if (line_range_add_line(fname, lineno, lf->lr) < 0) 1450 err = line_range_add_line(fname, lineno, lf->lr);
1450 return -EINVAL; 1451 if (err < 0 && err != -EEXIST)
1452 return err;
1451 1453
1452 return 0; 1454 return 0;
1453} 1455}
@@ -1473,14 +1475,15 @@ static int find_line_range_by_line(Dwarf_Die *sp_die, struct line_finder *lf)
1473 1475
1474static int line_range_inline_cb(Dwarf_Die *in_die, void *data) 1476static int line_range_inline_cb(Dwarf_Die *in_die, void *data)
1475{ 1477{
1476 find_line_range_by_line(in_die, data); 1478 int ret = find_line_range_by_line(in_die, data);
1477 1479
1478 /* 1480 /*
1479 * We have to check all instances of inlined function, because 1481 * We have to check all instances of inlined function, because
1480 * some execution paths can be optimized out depends on the 1482 * some execution paths can be optimized out depends on the
1481 * function argument of instances 1483 * function argument of instances. However, if an error occurs,
1484 * it should be handled by the caller.
1482 */ 1485 */
1483 return 0; 1486 return ret < 0 ? ret : 0;
1484} 1487}
1485 1488
1486/* Search function definition from function name */ 1489/* Search function definition from function name */
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index 3b7dbf51d4a9..6864661a79dd 100644
--- a/tools/perf/util/symbol-elf.c
+++ b/tools/perf/util/symbol-elf.c
@@ -6,6 +6,7 @@
6#include <inttypes.h> 6#include <inttypes.h>
7 7
8#include "symbol.h" 8#include "symbol.h"
9#include "vdso.h"
9#include <symbol/kallsyms.h> 10#include <symbol/kallsyms.h>
10#include "debug.h" 11#include "debug.h"
11 12
@@ -618,6 +619,7 @@ int symsrc__init(struct symsrc *ss, struct dso *dso, const char *name,
618 GElf_Shdr shdr; 619 GElf_Shdr shdr;
619 ss->adjust_symbols = (ehdr.e_type == ET_EXEC || 620 ss->adjust_symbols = (ehdr.e_type == ET_EXEC ||
620 ehdr.e_type == ET_REL || 621 ehdr.e_type == ET_REL ||
622 is_vdso_map(dso->short_name) ||
621 elf_section_by_name(elf, &ehdr, &shdr, 623 elf_section_by_name(elf, &ehdr, &shdr,
622 ".gnu.prelink_undo", 624 ".gnu.prelink_undo",
623 NULL) != NULL); 625 NULL) != NULL);
diff --git a/tools/power/acpi/Makefile b/tools/power/acpi/Makefile
index d9186a2fdf06..c2c0f20067a5 100644
--- a/tools/power/acpi/Makefile
+++ b/tools/power/acpi/Makefile
@@ -89,15 +89,6 @@ else
89 STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment 89 STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment
90endif 90endif
91 91
92# if DEBUG is enabled, then we do not strip or optimize
93ifeq ($(strip $(DEBUG)),true)
94 CFLAGS += -O1 -g -DDEBUG
95 STRIPCMD = /bin/true -Since_we_are_debugging
96else
97 CFLAGS += $(OPTIMIZATION) -fomit-frame-pointer
98 STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment
99endif
100
101# --- ACPIDUMP BEGIN --- 92# --- ACPIDUMP BEGIN ---
102 93
103vpath %.c \ 94vpath %.c \
@@ -128,7 +119,7 @@ clean:
128 -rm -f $(OUTPUT)acpidump 119 -rm -f $(OUTPUT)acpidump
129 120
130install-tools: 121install-tools:
131 $(INSTALL) -d $(DESTDIR)${bindir} 122 $(INSTALL) -d $(DESTDIR)${sbindir}
132 $(INSTALL_PROGRAM) $(OUTPUT)acpidump $(DESTDIR)${sbindir} 123 $(INSTALL_PROGRAM) $(OUTPUT)acpidump $(DESTDIR)${sbindir}
133 124
134install-man: 125install-man:
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 47b29834a6b6..56ff9bebb577 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -548,11 +548,10 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu,
548 u32 val; 548 u32 val;
549 u32 *reg; 549 u32 *reg;
550 550
551 offset >>= 1;
552 reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_cfg, 551 reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_cfg,
553 vcpu->vcpu_id, offset); 552 vcpu->vcpu_id, offset >> 1);
554 553
555 if (offset & 2) 554 if (offset & 4)
556 val = *reg >> 16; 555 val = *reg >> 16;
557 else 556 else
558 val = *reg & 0xffff; 557 val = *reg & 0xffff;
@@ -561,13 +560,13 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu,
561 vgic_reg_access(mmio, &val, offset, 560 vgic_reg_access(mmio, &val, offset,
562 ACCESS_READ_VALUE | ACCESS_WRITE_VALUE); 561 ACCESS_READ_VALUE | ACCESS_WRITE_VALUE);
563 if (mmio->is_write) { 562 if (mmio->is_write) {
564 if (offset < 4) { 563 if (offset < 8) {
565 *reg = ~0U; /* Force PPIs/SGIs to 1 */ 564 *reg = ~0U; /* Force PPIs/SGIs to 1 */
566 return false; 565 return false;
567 } 566 }
568 567
569 val = vgic_cfg_compress(val); 568 val = vgic_cfg_compress(val);
570 if (offset & 2) { 569 if (offset & 4) {
571 *reg &= 0xffff; 570 *reg &= 0xffff;
572 *reg |= val << 16; 571 *reg |= val << 16;
573 } else { 572 } else {
@@ -916,6 +915,7 @@ static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg)
916 case 0: 915 case 0:
917 if (!target_cpus) 916 if (!target_cpus)
918 return; 917 return;
918 break;
919 919
920 case 1: 920 case 1:
921 target_cpus = ((1 << nrcpus) - 1) & ~(1 << vcpu_id) & 0xff; 921 target_cpus = ((1 << nrcpus) - 1) & ~(1 << vcpu_id) & 0xff;
@@ -1667,10 +1667,11 @@ static int vgic_ioaddr_assign(struct kvm *kvm, phys_addr_t *ioaddr,
1667 if (addr + size < addr) 1667 if (addr + size < addr)
1668 return -EINVAL; 1668 return -EINVAL;
1669 1669
1670 *ioaddr = addr;
1670 ret = vgic_ioaddr_overlap(kvm); 1671 ret = vgic_ioaddr_overlap(kvm);
1671 if (ret) 1672 if (ret)
1672 return ret; 1673 *ioaddr = VGIC_ADDR_UNDEF;
1673 *ioaddr = addr; 1674
1674 return ret; 1675 return ret;
1675} 1676}
1676 1677
diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c
index 8db43701016f..bf06577fea51 100644
--- a/virt/kvm/assigned-dev.c
+++ b/virt/kvm/assigned-dev.c
@@ -395,7 +395,8 @@ static int assigned_device_enable_host_msix(struct kvm *kvm,
395 if (dev->entries_nr == 0) 395 if (dev->entries_nr == 0)
396 return r; 396 return r;
397 397
398 r = pci_enable_msix(dev->dev, dev->host_msix_entries, dev->entries_nr); 398 r = pci_enable_msix_exact(dev->dev,
399 dev->host_msix_entries, dev->entries_nr);
399 if (r) 400 if (r)
400 return r; 401 return r;
401 402
diff --git a/virt/kvm/async_pf.c b/virt/kvm/async_pf.c
index 10df100c4514..06e6401d6ef4 100644
--- a/virt/kvm/async_pf.c
+++ b/virt/kvm/async_pf.c
@@ -101,7 +101,7 @@ static void async_pf_execute(struct work_struct *work)
101 if (waitqueue_active(&vcpu->wq)) 101 if (waitqueue_active(&vcpu->wq))
102 wake_up_interruptible(&vcpu->wq); 102 wake_up_interruptible(&vcpu->wq);
103 103
104 mmdrop(mm); 104 mmput(mm);
105 kvm_put_kvm(vcpu->kvm); 105 kvm_put_kvm(vcpu->kvm);
106} 106}
107 107
@@ -118,7 +118,7 @@ void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu)
118 flush_work(&work->work); 118 flush_work(&work->work);
119#else 119#else
120 if (cancel_work_sync(&work->work)) { 120 if (cancel_work_sync(&work->work)) {
121 mmdrop(work->mm); 121 mmput(work->mm);
122 kvm_put_kvm(vcpu->kvm); /* == work->vcpu->kvm */ 122 kvm_put_kvm(vcpu->kvm); /* == work->vcpu->kvm */
123 kmem_cache_free(async_pf_cache, work); 123 kmem_cache_free(async_pf_cache, work);
124 } 124 }
@@ -183,7 +183,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva,
183 work->addr = hva; 183 work->addr = hva;
184 work->arch = *arch; 184 work->arch = *arch;
185 work->mm = current->mm; 185 work->mm = current->mm;
186 atomic_inc(&work->mm->mm_count); 186 atomic_inc(&work->mm->mm_users);
187 kvm_get_kvm(work->vcpu->kvm); 187 kvm_get_kvm(work->vcpu->kvm);
188 188
189 /* this can't really happen otherwise gfn_to_pfn_async 189 /* this can't really happen otherwise gfn_to_pfn_async
@@ -201,7 +201,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva,
201 return 1; 201 return 1;
202retry_sync: 202retry_sync:
203 kvm_put_kvm(work->vcpu->kvm); 203 kvm_put_kvm(work->vcpu->kvm);
204 mmdrop(work->mm); 204 mmput(work->mm);
205 kmem_cache_free(async_pf_cache, work); 205 kmem_cache_free(async_pf_cache, work);
206 return 0; 206 return 0;
207} 207}
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index d4b601547f1f..2458a1dc2ba9 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -97,6 +97,14 @@ static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
97 bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS); 97 bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
98} 98}
99 99
100static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
101
102static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
103{
104 if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105 kvm_rtc_eoi_tracking_restore_all(ioapic);
106}
107
100static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu) 108static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
101{ 109{
102 bool new_val, old_val; 110 bool new_val, old_val;
@@ -120,9 +128,8 @@ static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
120 } else { 128 } else {
121 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map); 129 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
122 ioapic->rtc_status.pending_eoi--; 130 ioapic->rtc_status.pending_eoi--;
131 rtc_status_pending_eoi_check_valid(ioapic);
123 } 132 }
124
125 WARN_ON(ioapic->rtc_status.pending_eoi < 0);
126} 133}
127 134
128void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu) 135void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
@@ -149,10 +156,10 @@ static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
149 156
150static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu) 157static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
151{ 158{
152 if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) 159 if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
153 --ioapic->rtc_status.pending_eoi; 160 --ioapic->rtc_status.pending_eoi;
154 161 rtc_status_pending_eoi_check_valid(ioapic);
155 WARN_ON(ioapic->rtc_status.pending_eoi < 0); 162 }
156} 163}
157 164
158static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic) 165static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
@@ -353,10 +360,16 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
353 ioapic->irr &= ~(1 << irq); 360 ioapic->irr &= ~(1 << irq);
354 361
355 if (irq == RTC_GSI && line_status) { 362 if (irq == RTC_GSI && line_status) {
363 /*
364 * pending_eoi cannot ever become negative (see
365 * rtc_status_pending_eoi_check_valid) and the caller
366 * ensures that it is only called if it is >= zero, namely
367 * if rtc_irq_check_coalesced returns false).
368 */
356 BUG_ON(ioapic->rtc_status.pending_eoi != 0); 369 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
357 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, 370 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
358 ioapic->rtc_status.dest_map); 371 ioapic->rtc_status.dest_map);
359 ioapic->rtc_status.pending_eoi = ret; 372 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
360 } else 373 } else
361 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL); 374 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
362 375