diff options
-rw-r--r-- | Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 17 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_vt.dts | 11 |
5 files changed, 3 insertions, 70 deletions
diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt deleted file mode 100644 index 4897bea7e3f8..000000000000 --- a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | * Altera SOCFPGA specific extensions to the Synopsys Designware Mobile | ||
2 | Storage Host Controller | ||
3 | |||
4 | The Synopsys designware mobile storage host controller is used to interface | ||
5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | ||
6 | differences between the core Synopsys dw mshc controller properties described | ||
7 | by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific | ||
8 | extensions to the Synopsys Designware Mobile Storage Host Controller. | ||
9 | |||
10 | Required Properties: | ||
11 | |||
12 | * compatible: should be | ||
13 | - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform | ||
14 | |||
15 | Example: | ||
16 | |||
17 | mmc: dwmmc0@ff704000 { | ||
18 | compatible = "altr,socfpga-dw-mshc"; | ||
19 | reg = <0xff704000 0x1000>; | ||
20 | interrupts = <0 129 4>; | ||
21 | #address-cells = <1>; | ||
22 | #size-cells = <0>; | ||
23 | }; | ||
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 5f582467fccc..537f1a5c07f5 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi | |||
@@ -473,17 +473,6 @@ | |||
473 | arm,data-latency = <2 1 1>; | 473 | arm,data-latency = <2 1 1>; |
474 | }; | 474 | }; |
475 | 475 | ||
476 | mmc: dwmmc0@ff704000 { | ||
477 | compatible = "altr,socfpga-dw-mshc"; | ||
478 | reg = <0xff704000 0x1000>; | ||
479 | interrupts = <0 139 4>; | ||
480 | fifo-depth = <0x400>; | ||
481 | #address-cells = <1>; | ||
482 | #size-cells = <0>; | ||
483 | clocks = <&l4_mp_clk>, <&sdmmc_clk>; | ||
484 | clock-names = "biu", "ciu"; | ||
485 | }; | ||
486 | |||
487 | /* Local timer */ | 476 | /* Local timer */ |
488 | timer@fffec600 { | 477 | timer@fffec600 { |
489 | compatible = "arm,cortex-a9-twd-timer"; | 478 | compatible = "arm,cortex-a9-twd-timer"; |
@@ -538,8 +527,8 @@ | |||
538 | }; | 527 | }; |
539 | 528 | ||
540 | sysmgr@ffd08000 { | 529 | sysmgr@ffd08000 { |
541 | compatible = "altr,sys-mgr", "syscon"; | 530 | compatible = "altr,sys-mgr"; |
542 | reg = <0xffd08000 0x4000>; | 531 | reg = <0xffd08000 0x4000>; |
543 | }; | 532 | }; |
544 | }; | 533 | }; |
545 | }; | 534 | }; |
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 6c87b7070ca7..a85b4043f888 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi | |||
@@ -27,17 +27,6 @@ | |||
27 | }; | 27 | }; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | dwmmc0@ff704000 { | ||
31 | num-slots = <1>; | ||
32 | supports-highspeed; | ||
33 | broken-cd; | ||
34 | |||
35 | slot@0 { | ||
36 | reg = <0>; | ||
37 | bus-width = <4>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | serial0@ffc02000 { | 30 | serial0@ffc02000 { |
42 | clock-frequency = <100000000>; | 31 | clock-frequency = <100000000>; |
43 | }; | 32 | }; |
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index ca41b0ebf461..a8716f6dbe2e 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi | |||
@@ -28,17 +28,6 @@ | |||
28 | }; | 28 | }; |
29 | }; | 29 | }; |
30 | 30 | ||
31 | dwmmc0@ff704000 { | ||
32 | num-slots = <1>; | ||
33 | supports-highspeed; | ||
34 | broken-cd; | ||
35 | |||
36 | slot@0 { | ||
37 | reg = <0>; | ||
38 | bus-width = <4>; | ||
39 | }; | ||
40 | }; | ||
41 | |||
42 | ethernet@ff702000 { | 31 | ethernet@ff702000 { |
43 | phy-mode = "rgmii"; | 32 | phy-mode = "rgmii"; |
44 | phy-addr = <0xffffffff>; /* probe for phy addr */ | 33 | phy-addr = <0xffffffff>; /* probe for phy addr */ |
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index 222313f5420b..d1ec0cab2dee 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts | |||
@@ -41,17 +41,6 @@ | |||
41 | }; | 41 | }; |
42 | }; | 42 | }; |
43 | 43 | ||
44 | dwmmc0@ff704000 { | ||
45 | num-slots = <1>; | ||
46 | supports-highspeed; | ||
47 | broken-cd; | ||
48 | |||
49 | slot@0 { | ||
50 | reg = <0>; | ||
51 | bus-width = <4>; | ||
52 | }; | ||
53 | }; | ||
54 | |||
55 | ethernet@ff700000 { | 44 | ethernet@ff700000 { |
56 | phy-mode = "gmii"; | 45 | phy-mode = "gmii"; |
57 | status = "okay"; | 46 | status = "okay"; |