aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--sound/soc/codecs/max98088.c10
-rw-r--r--sound/soc/codecs/wm8523.c9
-rw-r--r--sound/soc/codecs/wm8741.c10
-rw-r--r--sound/soc/codecs/wm8753.c226
-rw-r--r--sound/soc/codecs/wm8904.c37
-rw-r--r--sound/soc/codecs/wm8940.c1
-rw-r--r--sound/soc/codecs/wm8955.c31
-rw-r--r--sound/soc/codecs/wm8960.c1
-rw-r--r--sound/soc/codecs/wm8962.c45
-rw-r--r--sound/soc/codecs/wm8971.c1
-rw-r--r--sound/soc/codecs/wm9081.c1
-rw-r--r--sound/soc/codecs/wm9090.c18
12 files changed, 164 insertions, 226 deletions
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c
index 335a002aaf0e..37133c40e762 100644
--- a/sound/soc/codecs/max98088.c
+++ b/sound/soc/codecs/max98088.c
@@ -39,7 +39,6 @@ struct max98088_cdata {
39}; 39};
40 40
41struct max98088_priv { 41struct max98088_priv {
42 u8 reg_cache[M98088_REG_CNT];
43 enum max98088_type devtype; 42 enum max98088_type devtype;
44 void *control_data; 43 void *control_data;
45 struct max98088_pdata *pdata; 44 struct max98088_pdata *pdata;
@@ -1589,7 +1588,7 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai,
1589 1588
1590static void max98088_sync_cache(struct snd_soc_codec *codec) 1589static void max98088_sync_cache(struct snd_soc_codec *codec)
1591{ 1590{
1592 struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); 1591 u16 *reg_cache = codec->reg_cache;
1593 int i; 1592 int i;
1594 1593
1595 if (!codec->cache_sync) 1594 if (!codec->cache_sync)
@@ -1600,14 +1599,14 @@ static void max98088_sync_cache(struct snd_soc_codec *codec)
1600 /* write back cached values if they're writeable and 1599 /* write back cached values if they're writeable and
1601 * different from the hardware default. 1600 * different from the hardware default.
1602 */ 1601 */
1603 for (i = 1; i < ARRAY_SIZE(max98088->reg_cache); i++) { 1602 for (i = 1; i < codec->driver->reg_cache_size; i++) {
1604 if (!max98088_access[i].writable) 1603 if (!max98088_access[i].writable)
1605 continue; 1604 continue;
1606 1605
1607 if (max98088->reg_cache[i] == max98088_reg[i]) 1606 if (reg_cache[i] == max98088_reg[i])
1608 continue; 1607 continue;
1609 1608
1610 snd_soc_write(codec, i, max98088->reg_cache[i]); 1609 snd_soc_write(codec, i, reg_cache[i]);
1611 } 1610 }
1612 1611
1613 codec->cache_sync = 0; 1612 codec->cache_sync = 0;
@@ -1952,7 +1951,6 @@ static int max98088_probe(struct snd_soc_codec *codec)
1952 int ret = 0; 1951 int ret = 0;
1953 1952
1954 codec->cache_sync = 1; 1953 codec->cache_sync = 1;
1955 memcpy(codec->reg_cache, max98088_reg, sizeof(max98088_reg));
1956 1954
1957 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); 1955 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
1958 if (ret != 0) { 1956 if (ret != 0) {
diff --git a/sound/soc/codecs/wm8523.c b/sound/soc/codecs/wm8523.c
index 08f3189f4b3f..5eb2f501ce32 100644
--- a/sound/soc/codecs/wm8523.c
+++ b/sound/soc/codecs/wm8523.c
@@ -40,7 +40,6 @@ static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
40/* codec private data */ 40/* codec private data */
41struct wm8523_priv { 41struct wm8523_priv {
42 enum snd_soc_control_type control_type; 42 enum snd_soc_control_type control_type;
43 u16 reg_cache[WM8523_REGISTER_COUNT];
44 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES]; 43 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
45 unsigned int sysclk; 44 unsigned int sysclk;
46 unsigned int rate_constraint_list[WM8523_NUM_RATES]; 45 unsigned int rate_constraint_list[WM8523_NUM_RATES];
@@ -314,6 +313,7 @@ static int wm8523_set_bias_level(struct snd_soc_codec *codec,
314 enum snd_soc_bias_level level) 313 enum snd_soc_bias_level level)
315{ 314{
316 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 315 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
316 u16 *reg_cache = codec->reg_cache;
317 int ret, i; 317 int ret, i;
318 318
319 switch (level) { 319 switch (level) {
@@ -344,7 +344,7 @@ static int wm8523_set_bias_level(struct snd_soc_codec *codec,
344 /* Sync back default/cached values */ 344 /* Sync back default/cached values */
345 for (i = WM8523_AIF_CTRL1; 345 for (i = WM8523_AIF_CTRL1;
346 i < WM8523_MAX_REGISTER; i++) 346 i < WM8523_MAX_REGISTER; i++)
347 snd_soc_write(codec, i, wm8523->reg_cache[i]); 347 snd_soc_write(codec, i, reg_cache[i]);
348 348
349 349
350 msleep(100); 350 msleep(100);
@@ -414,6 +414,7 @@ static int wm8523_resume(struct snd_soc_codec *codec)
414static int wm8523_probe(struct snd_soc_codec *codec) 414static int wm8523_probe(struct snd_soc_codec *codec)
415{ 415{
416 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 416 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
417 u16 *reg_cache = codec->reg_cache;
417 int ret, i; 418 int ret, i;
418 419
419 codec->hw_write = (hw_write_t)i2c_master_send; 420 codec->hw_write = (hw_write_t)i2c_master_send;
@@ -470,8 +471,8 @@ static int wm8523_probe(struct snd_soc_codec *codec)
470 } 471 }
471 472
472 /* Change some default settings - latch VU and enable ZC */ 473 /* Change some default settings - latch VU and enable ZC */
473 wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU; 474 reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
474 wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC; 475 reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
475 476
476 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 477 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
477 478
diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c
index 35789b7dcacf..494f2d31d75b 100644
--- a/sound/soc/codecs/wm8741.c
+++ b/sound/soc/codecs/wm8741.c
@@ -40,7 +40,6 @@ static const char *wm8741_supply_names[WM8741_NUM_SUPPLIES] = {
40/* codec private data */ 40/* codec private data */
41struct wm8741_priv { 41struct wm8741_priv {
42 enum snd_soc_control_type control_type; 42 enum snd_soc_control_type control_type;
43 u16 reg_cache[WM8741_REGISTER_COUNT];
44 struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES]; 43 struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
45 unsigned int sysclk; 44 unsigned int sysclk;
46 struct snd_pcm_hw_constraint_list *sysclk_constraints; 45 struct snd_pcm_hw_constraint_list *sysclk_constraints;
@@ -422,6 +421,7 @@ static int wm8741_resume(struct snd_soc_codec *codec)
422static int wm8741_probe(struct snd_soc_codec *codec) 421static int wm8741_probe(struct snd_soc_codec *codec)
423{ 422{
424 struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec); 423 struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
424 u16 *reg_cache = codec->reg_cache;
425 int ret = 0; 425 int ret = 0;
426 426
427 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8741->control_type); 427 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8741->control_type);
@@ -437,10 +437,10 @@ static int wm8741_probe(struct snd_soc_codec *codec)
437 } 437 }
438 438
439 /* Change some default settings - latch VU */ 439 /* Change some default settings - latch VU */
440 wm8741->reg_cache[WM8741_DACLLSB_ATTENUATION] |= WM8741_UPDATELL; 440 reg_cache[WM8741_DACLLSB_ATTENUATION] |= WM8741_UPDATELL;
441 wm8741->reg_cache[WM8741_DACLMSB_ATTENUATION] |= WM8741_UPDATELM; 441 reg_cache[WM8741_DACLMSB_ATTENUATION] |= WM8741_UPDATELM;
442 wm8741->reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERL; 442 reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERL;
443 wm8741->reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERM; 443 reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERM;
444 444
445 snd_soc_add_controls(codec, wm8741_snd_controls, 445 snd_soc_add_controls(codec, wm8741_snd_controls,
446 ARRAY_SIZE(wm8741_snd_controls)); 446 ARRAY_SIZE(wm8741_snd_controls));
diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c
index 73507e71cb79..79b02ae125c5 100644
--- a/sound/soc/codecs/wm8753.c
+++ b/sound/soc/codecs/wm8753.c
@@ -64,22 +64,22 @@ static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
64 * are using 2 wire for device control, so we cache them instead. 64 * are using 2 wire for device control, so we cache them instead.
65 */ 65 */
66static const u16 wm8753_reg[] = { 66static const u16 wm8753_reg[] = {
67 0x0008, 0x0000, 0x000a, 0x000a, 67 0x0000, 0x0008, 0x0000, 0x000a,
68 0x0033, 0x0000, 0x0007, 0x00ff, 68 0x000a, 0x0033, 0x0000, 0x0007,
69 0x00ff, 0x000f, 0x000f, 0x007b, 69 0x00ff, 0x00ff, 0x000f, 0x000f,
70 0x0000, 0x0032, 0x0000, 0x00c3, 70 0x007b, 0x0000, 0x0032, 0x0000,
71 0x00c3, 0x00c0, 0x0000, 0x0000, 71 0x00c3, 0x00c3, 0x00c0, 0x0000,
72 0x0000, 0x0000, 0x0000, 0x0000, 72 0x0000, 0x0000, 0x0000, 0x0000,
73 0x0000, 0x0000, 0x0000, 0x0000, 73 0x0000, 0x0000, 0x0000, 0x0000,
74 0x0000, 0x0000, 0x0000, 0x0055,
75 0x0005, 0x0050, 0x0055, 0x0050,
76 0x0055, 0x0050, 0x0055, 0x0079,
77 0x0079, 0x0079, 0x0079, 0x0079,
78 0x0000, 0x0000, 0x0000, 0x0000, 74 0x0000, 0x0000, 0x0000, 0x0000,
79 0x0097, 0x0097, 0x0000, 0x0004, 75 0x0055, 0x0005, 0x0050, 0x0055,
80 0x0000, 0x0083, 0x0024, 0x01ba, 76 0x0050, 0x0055, 0x0050, 0x0055,
81 0x0000, 0x0083, 0x0024, 0x01ba, 77 0x0079, 0x0079, 0x0079, 0x0079,
82 0x0000, 0x0000, 0x0000 78 0x0079, 0x0000, 0x0000, 0x0000,
79 0x0000, 0x0097, 0x0097, 0x0000,
80 0x0004, 0x0000, 0x0083, 0x0024,
81 0x01ba, 0x0000, 0x0083, 0x0024,
82 0x01ba, 0x0000, 0x0000, 0x0000
83}; 83};
84 84
85/* codec private data */ 85/* codec private data */
@@ -87,57 +87,10 @@ struct wm8753_priv {
87 enum snd_soc_control_type control_type; 87 enum snd_soc_control_type control_type;
88 unsigned int sysclk; 88 unsigned int sysclk;
89 unsigned int pcmclk; 89 unsigned int pcmclk;
90 u16 reg_cache[ARRAY_SIZE(wm8753_reg)];
91 int dai_func; 90 int dai_func;
92}; 91};
93 92
94/* 93#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
95 * read wm8753 register cache
96 */
97static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
98 unsigned int reg)
99{
100 u16 *cache = codec->reg_cache;
101 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
102 return -1;
103 return cache[reg - 1];
104}
105
106/*
107 * write wm8753 register cache
108 */
109static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
110 unsigned int reg, unsigned int value)
111{
112 u16 *cache = codec->reg_cache;
113 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
114 return;
115 cache[reg - 1] = value;
116}
117
118/*
119 * write to the WM8753 register space
120 */
121static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
122 unsigned int value)
123{
124 u8 data[2];
125
126 /* data is
127 * D15..D9 WM8753 register offset
128 * D8...D0 register data
129 */
130 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
131 data[1] = value & 0x00ff;
132
133 wm8753_write_reg_cache(codec, reg, value);
134 if (codec->hw_write(codec->control_data, data, 2) == 2)
135 return 0;
136 else
137 return -EIO;
138}
139
140#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
141 94
142/* 95/*
143 * WM8753 Controls 96 * WM8753 Controls
@@ -217,7 +170,7 @@ static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
217 struct snd_ctl_elem_value *ucontrol) 170 struct snd_ctl_elem_value *ucontrol)
218{ 171{
219 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 172 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
220 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL); 173 int mode = snd_soc_read(codec, WM8753_IOCTL);
221 174
222 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2; 175 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
223 return 0; 176 return 0;
@@ -227,7 +180,7 @@ static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
227 struct snd_ctl_elem_value *ucontrol) 180 struct snd_ctl_elem_value *ucontrol)
228{ 181{
229 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 182 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
230 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL); 183 int mode = snd_soc_read(codec, WM8753_IOCTL);
231 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 184 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
232 185
233 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0]) 186 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
@@ -738,17 +691,17 @@ static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
738 if (pll_id == WM8753_PLL1) { 691 if (pll_id == WM8753_PLL1) {
739 offset = 0; 692 offset = 0;
740 enable = 0x10; 693 enable = 0x10;
741 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef; 694 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
742 } else { 695 } else {
743 offset = 4; 696 offset = 4;
744 enable = 0x8; 697 enable = 0x8;
745 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7; 698 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
746 } 699 }
747 700
748 if (!freq_in || !freq_out) { 701 if (!freq_in || !freq_out) {
749 /* disable PLL */ 702 /* disable PLL */
750 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026); 703 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
751 wm8753_write(codec, WM8753_CLOCK, reg); 704 snd_soc_write(codec, WM8753_CLOCK, reg);
752 return 0; 705 return 0;
753 } else { 706 } else {
754 u16 value = 0; 707 u16 value = 0;
@@ -759,20 +712,20 @@ static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
759 /* set up N and K PLL divisor ratios */ 712 /* set up N and K PLL divisor ratios */
760 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ 713 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
761 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18); 714 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
762 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value); 715 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
763 716
764 /* bits 8:0 = PLL_K[17:9] */ 717 /* bits 8:0 = PLL_K[17:9] */
765 value = (pll_div.k & 0x03fe00) >> 9; 718 value = (pll_div.k & 0x03fe00) >> 9;
766 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value); 719 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
767 720
768 /* bits 8:0 = PLL_K[8:0] */ 721 /* bits 8:0 = PLL_K[8:0] */
769 value = pll_div.k & 0x0001ff; 722 value = pll_div.k & 0x0001ff;
770 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value); 723 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
771 724
772 /* set PLL as input and enable */ 725 /* set PLL as input and enable */
773 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 | 726 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
774 (pll_div.div2 << 3)); 727 (pll_div.div2 << 3));
775 wm8753_write(codec, WM8753_CLOCK, reg | enable); 728 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
776 } 729 }
777 return 0; 730 return 0;
778} 731}
@@ -879,7 +832,7 @@ static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
879 unsigned int fmt) 832 unsigned int fmt)
880{ 833{
881 struct snd_soc_codec *codec = codec_dai->codec; 834 struct snd_soc_codec *codec = codec_dai->codec;
882 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec; 835 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
883 836
884 /* interface format */ 837 /* interface format */
885 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 838 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
@@ -901,7 +854,7 @@ static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
901 return -EINVAL; 854 return -EINVAL;
902 } 855 }
903 856
904 wm8753_write(codec, WM8753_PCM, voice); 857 snd_soc_write(codec, WM8753_PCM, voice);
905 return 0; 858 return 0;
906} 859}
907 860
@@ -922,8 +875,8 @@ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
922 struct snd_soc_pcm_runtime *rtd = substream->private_data; 875 struct snd_soc_pcm_runtime *rtd = substream->private_data;
923 struct snd_soc_codec *codec = rtd->codec; 876 struct snd_soc_codec *codec = rtd->codec;
924 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 877 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
925 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3; 878 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
926 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f; 879 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
927 880
928 /* bit size */ 881 /* bit size */
929 switch (params_format(params)) { 882 switch (params_format(params)) {
@@ -943,9 +896,9 @@ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
943 /* sample rate */ 896 /* sample rate */
944 if (params_rate(params) * 384 == wm8753->pcmclk) 897 if (params_rate(params) * 384 == wm8753->pcmclk)
945 srate |= 0x80; 898 srate |= 0x80;
946 wm8753_write(codec, WM8753_SRATE1, srate); 899 snd_soc_write(codec, WM8753_SRATE1, srate);
947 900
948 wm8753_write(codec, WM8753_PCM, voice); 901 snd_soc_write(codec, WM8753_PCM, voice);
949 return 0; 902 return 0;
950} 903}
951 904
@@ -958,8 +911,8 @@ static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
958 struct snd_soc_codec *codec = codec_dai->codec; 911 struct snd_soc_codec *codec = codec_dai->codec;
959 u16 voice, ioctl; 912 u16 voice, ioctl;
960 913
961 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f; 914 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
962 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d; 915 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
963 916
964 /* set master/slave audio interface */ 917 /* set master/slave audio interface */
965 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 918 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1013,8 +966,8 @@ static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1013 return -EINVAL; 966 return -EINVAL;
1014 } 967 }
1015 968
1016 wm8753_write(codec, WM8753_PCM, voice); 969 snd_soc_write(codec, WM8753_PCM, voice);
1017 wm8753_write(codec, WM8753_IOCTL, ioctl); 970 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1018 return 0; 971 return 0;
1019} 972}
1020 973
@@ -1026,16 +979,16 @@ static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1026 979
1027 switch (div_id) { 980 switch (div_id) {
1028 case WM8753_PCMDIV: 981 case WM8753_PCMDIV:
1029 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f; 982 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
1030 wm8753_write(codec, WM8753_CLOCK, reg | div); 983 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1031 break; 984 break;
1032 case WM8753_BCLKDIV: 985 case WM8753_BCLKDIV:
1033 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7; 986 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
1034 wm8753_write(codec, WM8753_SRATE2, reg | div); 987 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1035 break; 988 break;
1036 case WM8753_VXCLKDIV: 989 case WM8753_VXCLKDIV:
1037 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f; 990 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
1038 wm8753_write(codec, WM8753_SRATE2, reg | div); 991 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1039 break; 992 break;
1040 default: 993 default:
1041 return -EINVAL; 994 return -EINVAL;
@@ -1050,7 +1003,7 @@ static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1050 unsigned int fmt) 1003 unsigned int fmt)
1051{ 1004{
1052 struct snd_soc_codec *codec = codec_dai->codec; 1005 struct snd_soc_codec *codec = codec_dai->codec;
1053 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0; 1006 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1054 1007
1055 /* interface format */ 1008 /* interface format */
1056 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1009 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
@@ -1072,7 +1025,7 @@ static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1072 return -EINVAL; 1025 return -EINVAL;
1073 } 1026 }
1074 1027
1075 wm8753_write(codec, WM8753_HIFI, hifi); 1028 snd_soc_write(codec, WM8753_HIFI, hifi);
1076 return 0; 1029 return 0;
1077} 1030}
1078 1031
@@ -1085,8 +1038,8 @@ static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1085 struct snd_soc_codec *codec = codec_dai->codec; 1038 struct snd_soc_codec *codec = codec_dai->codec;
1086 u16 ioctl, hifi; 1039 u16 ioctl, hifi;
1087 1040
1088 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f; 1041 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1089 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae; 1042 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1090 1043
1091 /* set master/slave audio interface */ 1044 /* set master/slave audio interface */
1092 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1045 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1140,8 +1093,8 @@ static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1140 return -EINVAL; 1093 return -EINVAL;
1141 } 1094 }
1142 1095
1143 wm8753_write(codec, WM8753_HIFI, hifi); 1096 snd_soc_write(codec, WM8753_HIFI, hifi);
1144 wm8753_write(codec, WM8753_IOCTL, ioctl); 1097 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1145 return 0; 1098 return 0;
1146} 1099}
1147 1100
@@ -1162,8 +1115,8 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1162 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1115 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1163 struct snd_soc_codec *codec = rtd->codec; 1116 struct snd_soc_codec *codec = rtd->codec;
1164 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 1117 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1165 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0; 1118 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1166 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3; 1119 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1167 int coeff; 1120 int coeff;
1168 1121
1169 /* is digital filter coefficient valid ? */ 1122 /* is digital filter coefficient valid ? */
@@ -1172,7 +1125,7 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1172 printk(KERN_ERR "wm8753 invalid MCLK or rate\n"); 1125 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1173 return coeff; 1126 return coeff;
1174 } 1127 }
1175 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) | 1128 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1176 coeff_div[coeff].usb); 1129 coeff_div[coeff].usb);
1177 1130
1178 /* bit size */ 1131 /* bit size */
@@ -1190,7 +1143,7 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1190 break; 1143 break;
1191 } 1144 }
1192 1145
1193 wm8753_write(codec, WM8753_HIFI, hifi); 1146 snd_soc_write(codec, WM8753_HIFI, hifi);
1194 return 0; 1147 return 0;
1195} 1148}
1196 1149
@@ -1201,8 +1154,8 @@ static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1201 u16 clock; 1154 u16 clock;
1202 1155
1203 /* set clk source as pcmclk */ 1156 /* set clk source as pcmclk */
1204 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; 1157 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1205 wm8753_write(codec, WM8753_CLOCK, clock); 1158 snd_soc_write(codec, WM8753_CLOCK, clock);
1206 1159
1207 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0) 1160 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1208 return -EINVAL; 1161 return -EINVAL;
@@ -1224,8 +1177,8 @@ static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1224 u16 clock; 1177 u16 clock;
1225 1178
1226 /* set clk source as pcmclk */ 1179 /* set clk source as pcmclk */
1227 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; 1180 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1228 wm8753_write(codec, WM8753_CLOCK, clock); 1181 snd_soc_write(codec, WM8753_CLOCK, clock);
1229 1182
1230 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0) 1183 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1231 return -EINVAL; 1184 return -EINVAL;
@@ -1239,8 +1192,8 @@ static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1239 u16 clock; 1192 u16 clock;
1240 1193
1241 /* set clk source as mclk */ 1194 /* set clk source as mclk */
1242 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; 1195 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1243 wm8753_write(codec, WM8753_CLOCK, clock | 0x4); 1196 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1244 1197
1245 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0) 1198 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1246 return -EINVAL; 1199 return -EINVAL;
@@ -1252,19 +1205,19 @@ static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1252static int wm8753_mute(struct snd_soc_dai *dai, int mute) 1205static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1253{ 1206{
1254 struct snd_soc_codec *codec = dai->codec; 1207 struct snd_soc_codec *codec = dai->codec;
1255 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7; 1208 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
1256 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 1209 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1257 1210
1258 /* the digital mute covers the HiFi and Voice DAC's on the WM8753. 1211 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1259 * make sure we check if they are not both active when we mute */ 1212 * make sure we check if they are not both active when we mute */
1260 if (mute && wm8753->dai_func == 1) { 1213 if (mute && wm8753->dai_func == 1) {
1261 if (!codec->active) 1214 if (!codec->active)
1262 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8); 1215 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1263 } else { 1216 } else {
1264 if (mute) 1217 if (mute)
1265 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8); 1218 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1266 else 1219 else
1267 wm8753_write(codec, WM8753_DAC, mute_reg); 1220 snd_soc_write(codec, WM8753_DAC, mute_reg);
1268 } 1221 }
1269 1222
1270 return 0; 1223 return 0;
@@ -1273,23 +1226,23 @@ static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1273static int wm8753_set_bias_level(struct snd_soc_codec *codec, 1226static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1274 enum snd_soc_bias_level level) 1227 enum snd_soc_bias_level level)
1275{ 1228{
1276 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e; 1229 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1277 1230
1278 switch (level) { 1231 switch (level) {
1279 case SND_SOC_BIAS_ON: 1232 case SND_SOC_BIAS_ON:
1280 /* set vmid to 50k and unmute dac */ 1233 /* set vmid to 50k and unmute dac */
1281 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0); 1234 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1282 break; 1235 break;
1283 case SND_SOC_BIAS_PREPARE: 1236 case SND_SOC_BIAS_PREPARE:
1284 /* set vmid to 5k for quick power up */ 1237 /* set vmid to 5k for quick power up */
1285 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1); 1238 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1286 break; 1239 break;
1287 case SND_SOC_BIAS_STANDBY: 1240 case SND_SOC_BIAS_STANDBY:
1288 /* mute dac and set vmid to 500k, enable VREF */ 1241 /* mute dac and set vmid to 500k, enable VREF */
1289 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141); 1242 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1290 break; 1243 break;
1291 case SND_SOC_BIAS_OFF: 1244 case SND_SOC_BIAS_OFF:
1292 wm8753_write(codec, WM8753_PWR1, 0x0001); 1245 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1293 break; 1246 break;
1294 } 1247 }
1295 codec->dapm.bias_level = level; 1248 codec->dapm.bias_level = level;
@@ -1477,7 +1430,7 @@ static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
1477 else 1430 else
1478 dai->driver = &wm8753_all_dai[(wm8753->dai_func << 1) + 1]; 1431 dai->driver = &wm8753_all_dai[(wm8753->dai_func << 1) + 1];
1479 } 1432 }
1480 wm8753_write(codec, WM8753_IOCTL, wm8753->dai_func); 1433 snd_soc_write(codec, WM8753_IOCTL, wm8753->dai_func);
1481} 1434}
1482 1435
1483static void wm8753_work(struct work_struct *work) 1436static void wm8753_work(struct work_struct *work)
@@ -1497,22 +1450,19 @@ static int wm8753_suspend(struct snd_soc_codec *codec, pm_message_t state)
1497 1450
1498static int wm8753_resume(struct snd_soc_codec *codec) 1451static int wm8753_resume(struct snd_soc_codec *codec)
1499{ 1452{
1453 u16 *reg_cache = codec->reg_cache;
1500 int i; 1454 int i;
1501 u8 data[2];
1502 u16 *cache = codec->reg_cache;
1503 1455
1504 /* Sync reg_cache with the hardware */ 1456 /* Sync reg_cache with the hardware */
1505 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) { 1457 for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
1506 if (i + 1 == WM8753_RESET) 1458 if (i == WM8753_RESET)
1507 continue; 1459 continue;
1508 1460
1509 /* No point in writing hardware default values back */ 1461 /* No point in writing hardware default values back */
1510 if (cache[i] == wm8753_reg[i]) 1462 if (reg_cache[i] == wm8753_reg[i])
1511 continue; 1463 continue;
1512 1464
1513 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); 1465 snd_soc_write(codec, i, reg_cache[i]);
1514 data[1] = cache[i] & 0x00ff;
1515 codec->hw_write(codec->control_data, data, 2);
1516 } 1466 }
1517 1467
1518 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1468 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
@@ -1531,7 +1481,7 @@ static int wm8753_resume(struct snd_soc_codec *codec)
1531static int wm8753_probe(struct snd_soc_codec *codec) 1481static int wm8753_probe(struct snd_soc_codec *codec)
1532{ 1482{
1533 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 1483 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1534 int ret = 0, reg; 1484 int ret;
1535 1485
1536 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work); 1486 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
1537 1487
@@ -1556,26 +1506,16 @@ static int wm8753_probe(struct snd_soc_codec *codec)
1556 msecs_to_jiffies(caps_charge)); 1506 msecs_to_jiffies(caps_charge));
1557 1507
1558 /* set the update bits */ 1508 /* set the update bits */
1559 reg = wm8753_read_reg_cache(codec, WM8753_LDAC); 1509 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1560 wm8753_write(codec, WM8753_LDAC, reg | 0x0100); 1510 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
1561 reg = wm8753_read_reg_cache(codec, WM8753_RDAC); 1511 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1562 wm8753_write(codec, WM8753_RDAC, reg | 0x0100); 1512 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
1563 reg = wm8753_read_reg_cache(codec, WM8753_LADC); 1513 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1564 wm8753_write(codec, WM8753_LADC, reg | 0x0100); 1514 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1565 reg = wm8753_read_reg_cache(codec, WM8753_RADC); 1515 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1566 wm8753_write(codec, WM8753_RADC, reg | 0x0100); 1516 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1567 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V); 1517 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1568 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100); 1518 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
1569 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1570 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1571 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1572 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1573 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1574 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1575 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1576 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1577 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1578 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1579 1519
1580 snd_soc_add_controls(codec, wm8753_snd_controls, 1520 snd_soc_add_controls(codec, wm8753_snd_controls,
1581 ARRAY_SIZE(wm8753_snd_controls)); 1521 ARRAY_SIZE(wm8753_snd_controls));
diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 8ba142abd8e6..9de44a4c05c0 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -49,8 +49,6 @@ static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = {
49/* codec private data */ 49/* codec private data */
50struct wm8904_priv { 50struct wm8904_priv {
51 51
52 u16 reg_cache[WM8904_MAX_REGISTER + 1];
53
54 enum wm8904_type devtype; 52 enum wm8904_type devtype;
55 void *control_data; 53 void *control_data;
56 54
@@ -2094,7 +2092,7 @@ static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
2094 2092
2095static void wm8904_sync_cache(struct snd_soc_codec *codec) 2093static void wm8904_sync_cache(struct snd_soc_codec *codec)
2096{ 2094{
2097 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2095 u16 *reg_cache = codec->reg_cache;
2098 int i; 2096 int i;
2099 2097
2100 if (!codec->cache_sync) 2098 if (!codec->cache_sync)
@@ -2105,14 +2103,14 @@ static void wm8904_sync_cache(struct snd_soc_codec *codec)
2105 /* Sync back cached values if they're different from the 2103 /* Sync back cached values if they're different from the
2106 * hardware default. 2104 * hardware default.
2107 */ 2105 */
2108 for (i = 1; i < ARRAY_SIZE(wm8904->reg_cache); i++) { 2106 for (i = 1; i < codec->driver->reg_cache_size; i++) {
2109 if (!wm8904_access[i].writable) 2107 if (!wm8904_access[i].writable)
2110 continue; 2108 continue;
2111 2109
2112 if (wm8904->reg_cache[i] == wm8904_reg[i]) 2110 if (reg_cache[i] == wm8904_reg[i])
2113 continue; 2111 continue;
2114 2112
2115 snd_soc_write(codec, i, wm8904->reg_cache[i]); 2113 snd_soc_write(codec, i, reg_cache[i]);
2116 } 2114 }
2117 2115
2118 codec->cache_sync = 0; 2116 codec->cache_sync = 0;
@@ -2371,6 +2369,7 @@ static int wm8904_probe(struct snd_soc_codec *codec)
2371{ 2369{
2372 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2370 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
2373 struct wm8904_pdata *pdata = wm8904->pdata; 2371 struct wm8904_pdata *pdata = wm8904->pdata;
2372 u16 *reg_cache = codec->reg_cache;
2374 int ret, i; 2373 int ret, i;
2375 2374
2376 codec->cache_sync = 1; 2375 codec->cache_sync = 1;
@@ -2437,19 +2436,19 @@ static int wm8904_probe(struct snd_soc_codec *codec)
2437 } 2436 }
2438 2437
2439 /* Change some default settings - latch VU and enable ZC */ 2438 /* Change some default settings - latch VU and enable ZC */
2440 wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU; 2439 reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU;
2441 wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU; 2440 reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU;
2442 wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU; 2441 reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU;
2443 wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU; 2442 reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU;
2444 wm8904->reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU | 2443 reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU |
2445 WM8904_HPOUTLZC; 2444 WM8904_HPOUTLZC;
2446 wm8904->reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU | 2445 reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU |
2447 WM8904_HPOUTRZC; 2446 WM8904_HPOUTRZC;
2448 wm8904->reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU | 2447 reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU |
2449 WM8904_LINEOUTLZC; 2448 WM8904_LINEOUTLZC;
2450 wm8904->reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU | 2449 reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU |
2451 WM8904_LINEOUTRZC; 2450 WM8904_LINEOUTRZC;
2452 wm8904->reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE; 2451 reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE;
2453 2452
2454 /* Apply configuration from the platform data. */ 2453 /* Apply configuration from the platform data. */
2455 if (wm8904->pdata) { 2454 if (wm8904->pdata) {
@@ -2457,23 +2456,23 @@ static int wm8904_probe(struct snd_soc_codec *codec)
2457 if (!pdata->gpio_cfg[i]) 2456 if (!pdata->gpio_cfg[i])
2458 continue; 2457 continue;
2459 2458
2460 wm8904->reg_cache[WM8904_GPIO_CONTROL_1 + i] 2459 reg_cache[WM8904_GPIO_CONTROL_1 + i]
2461 = pdata->gpio_cfg[i] & 0xffff; 2460 = pdata->gpio_cfg[i] & 0xffff;
2462 } 2461 }
2463 2462
2464 /* Zero is the default value for these anyway */ 2463 /* Zero is the default value for these anyway */
2465 for (i = 0; i < WM8904_MIC_REGS; i++) 2464 for (i = 0; i < WM8904_MIC_REGS; i++)
2466 wm8904->reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i] 2465 reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i]
2467 = pdata->mic_cfg[i]; 2466 = pdata->mic_cfg[i];
2468 } 2467 }
2469 2468
2470 /* Set Class W by default - this will be managed by the Class 2469 /* Set Class W by default - this will be managed by the Class
2471 * G widget at runtime where bypass paths are available. 2470 * G widget at runtime where bypass paths are available.
2472 */ 2471 */
2473 wm8904->reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR; 2472 reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR;
2474 2473
2475 /* Use normal bias source */ 2474 /* Use normal bias source */
2476 wm8904->reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL; 2475 reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL;
2477 2476
2478 wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2477 wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2479 2478
diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c
index fc7761fa8bd3..25580e3ee7c4 100644
--- a/sound/soc/codecs/wm8940.c
+++ b/sound/soc/codecs/wm8940.c
@@ -766,6 +766,7 @@ static __devinit int wm8940_i2c_probe(struct i2c_client *i2c,
766 766
767 i2c_set_clientdata(i2c, wm8940); 767 i2c_set_clientdata(i2c, wm8940);
768 wm8940->control_data = i2c; 768 wm8940->control_data = i2c;
769 wm8940->control_type = SND_SOC_I2C;
769 770
770 ret = snd_soc_register_codec(&i2c->dev, 771 ret = snd_soc_register_codec(&i2c->dev,
771 &soc_codec_dev_wm8940, &wm8940_dai, 1); 772 &soc_codec_dev_wm8940, &wm8940_dai, 1);
diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c
index ca0265f008d2..7167dfc96aa7 100644
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -41,8 +41,6 @@ static const char *wm8955_supply_names[WM8955_NUM_SUPPLIES] = {
41struct wm8955_priv { 41struct wm8955_priv {
42 enum snd_soc_control_type control_type; 42 enum snd_soc_control_type control_type;
43 43
44 u16 reg_cache[WM8955_MAX_REGISTER + 1];
45
46 unsigned int mclk_rate; 44 unsigned int mclk_rate;
47 45
48 int deemph; 46 int deemph;
@@ -768,6 +766,7 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
768 enum snd_soc_bias_level level) 766 enum snd_soc_bias_level level)
769{ 767{
770 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 768 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
769 u16 *reg_cache = codec->reg_cache;
771 int ret, i; 770 int ret, i;
772 771
773 switch (level) { 772 switch (level) {
@@ -800,14 +799,14 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
800 /* Sync back cached values if they're 799 /* Sync back cached values if they're
801 * different from the hardware default. 800 * different from the hardware default.
802 */ 801 */
803 for (i = 0; i < ARRAY_SIZE(wm8955->reg_cache); i++) { 802 for (i = 0; i < codec->driver->reg_cache_size; i++) {
804 if (i == WM8955_RESET) 803 if (i == WM8955_RESET)
805 continue; 804 continue;
806 805
807 if (wm8955->reg_cache[i] == wm8955_reg[i]) 806 if (reg_cache[i] == wm8955_reg[i])
808 continue; 807 continue;
809 808
810 snd_soc_write(codec, i, wm8955->reg_cache[i]); 809 snd_soc_write(codec, i, reg_cache[i]);
811 } 810 }
812 811
813 /* Enable VREF and VMID */ 812 /* Enable VREF and VMID */
@@ -902,6 +901,7 @@ static int wm8955_probe(struct snd_soc_codec *codec)
902{ 901{
903 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 902 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
904 struct wm8955_pdata *pdata = dev_get_platdata(codec->dev); 903 struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
904 u16 *reg_cache = codec->reg_cache;
905 int ret, i; 905 int ret, i;
906 906
907 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8955->control_type); 907 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8955->control_type);
@@ -934,25 +934,25 @@ static int wm8955_probe(struct snd_soc_codec *codec)
934 } 934 }
935 935
936 /* Change some default settings - latch VU and enable ZC */ 936 /* Change some default settings - latch VU and enable ZC */
937 wm8955->reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU; 937 reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU;
938 wm8955->reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU; 938 reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU;
939 wm8955->reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC; 939 reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC;
940 wm8955->reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC; 940 reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC;
941 wm8955->reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC; 941 reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC;
942 wm8955->reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC; 942 reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC;
943 wm8955->reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC; 943 reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC;
944 944
945 /* Also enable adaptive bass boost by default */ 945 /* Also enable adaptive bass boost by default */
946 wm8955->reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB; 946 reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB;
947 947
948 /* Set platform data values */ 948 /* Set platform data values */
949 if (pdata) { 949 if (pdata) {
950 if (pdata->out2_speaker) 950 if (pdata->out2_speaker)
951 wm8955->reg_cache[WM8955_ADDITIONAL_CONTROL_2] 951 reg_cache[WM8955_ADDITIONAL_CONTROL_2]
952 |= WM8955_ROUT2INV; 952 |= WM8955_ROUT2INV;
953 953
954 if (pdata->monoin_diff) 954 if (pdata->monoin_diff)
955 wm8955->reg_cache[WM8955_MONO_OUT_MIX_1] 955 reg_cache[WM8955_MONO_OUT_MIX_1]
956 |= WM8955_DMEN; 956 |= WM8955_DMEN;
957 } 957 }
958 958
@@ -1003,6 +1003,7 @@ static __devinit int wm8955_i2c_probe(struct i2c_client *i2c,
1003 return -ENOMEM; 1003 return -ENOMEM;
1004 1004
1005 i2c_set_clientdata(i2c, wm8955); 1005 i2c_set_clientdata(i2c, wm8955);
1006 wm8955->control_type = SND_SOC_I2C;
1006 1007
1007 ret = snd_soc_register_codec(&i2c->dev, 1008 ret = snd_soc_register_codec(&i2c->dev,
1008 &soc_codec_dev_wm8955, &wm8955_dai, 1); 1009 &soc_codec_dev_wm8955, &wm8955_dai, 1);
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 2bb856156eda..4393394b7bc1 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -1014,6 +1014,7 @@ static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
1014 return -ENOMEM; 1014 return -ENOMEM;
1015 1015
1016 i2c_set_clientdata(i2c, wm8960); 1016 i2c_set_clientdata(i2c, wm8960);
1017 wm8960->control_type = SND_SOC_I2C;
1017 wm8960->control_data = i2c; 1018 wm8960->control_data = i2c;
1018 1019
1019 ret = snd_soc_register_codec(&i2c->dev, 1020 ret = snd_soc_register_codec(&i2c->dev,
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index aa1192f6aa9c..b9cb1fcf8c92 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -52,8 +52,6 @@ static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = {
52struct wm8962_priv { 52struct wm8962_priv {
53 struct snd_soc_codec *codec; 53 struct snd_soc_codec *codec;
54 54
55 u16 reg_cache[WM8962_MAX_REGISTER + 1];
56
57 int sysclk; 55 int sysclk;
58 int sysclk_rate; 56 int sysclk_rate;
59 57
@@ -1991,8 +1989,7 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
1991 struct snd_ctl_elem_value *ucontrol) 1989 struct snd_ctl_elem_value *ucontrol)
1992{ 1990{
1993 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1991 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1994 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 1992 u16 *reg_cache = codec->reg_cache;
1995 u16 *reg_cache = wm8962->reg_cache;
1996 int ret; 1993 int ret;
1997 1994
1998 /* Apply the update (if any) */ 1995 /* Apply the update (if any) */
@@ -2020,8 +2017,7 @@ static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol,
2020 struct snd_ctl_elem_value *ucontrol) 2017 struct snd_ctl_elem_value *ucontrol)
2021{ 2018{
2022 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2019 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2023 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 2020 u16 *reg_cache = codec->reg_cache;
2024 u16 *reg_cache = wm8962->reg_cache;
2025 int ret; 2021 int ret;
2026 2022
2027 /* Apply the update (if any) */ 2023 /* Apply the update (if any) */
@@ -2329,8 +2325,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
2329 struct snd_kcontrol *kcontrol, int event) 2325 struct snd_kcontrol *kcontrol, int event)
2330{ 2326{
2331 struct snd_soc_codec *codec = w->codec; 2327 struct snd_soc_codec *codec = w->codec;
2332 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 2328 u16 *reg_cache = codec->reg_cache;
2333 u16 *reg_cache = wm8962->reg_cache;
2334 int reg; 2329 int reg;
2335 2330
2336 switch (w->shift) { 2331 switch (w->shift) {
@@ -2720,7 +2715,7 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec)
2720 2715
2721static void wm8962_sync_cache(struct snd_soc_codec *codec) 2716static void wm8962_sync_cache(struct snd_soc_codec *codec)
2722{ 2717{
2723 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); 2718 u16 *reg_cache = codec->reg_cache;
2724 int i; 2719 int i;
2725 2720
2726 if (!codec->cache_sync) 2721 if (!codec->cache_sync)
@@ -2733,13 +2728,13 @@ static void wm8962_sync_cache(struct snd_soc_codec *codec)
2733 /* Sync back cached values if they're different from the 2728 /* Sync back cached values if they're different from the
2734 * hardware default. 2729 * hardware default.
2735 */ 2730 */
2736 for (i = 1; i < ARRAY_SIZE(wm8962->reg_cache); i++) { 2731 for (i = 1; i < codec->driver->reg_cache_size; i++) {
2737 if (i == WM8962_SOFTWARE_RESET) 2732 if (i == WM8962_SOFTWARE_RESET)
2738 continue; 2733 continue;
2739 if (wm8962->reg_cache[i] == wm8962_reg[i]) 2734 if (reg_cache[i] == wm8962_reg[i])
2740 continue; 2735 continue;
2741 2736
2742 snd_soc_write(codec, i, wm8962->reg_cache[i]); 2737 snd_soc_write(codec, i, reg_cache[i]);
2743 } 2738 }
2744 2739
2745 codec->cache_sync = 0; 2740 codec->cache_sync = 0;
@@ -3413,12 +3408,11 @@ EXPORT_SYMBOL_GPL(wm8962_mic_detect);
3413#ifdef CONFIG_PM 3408#ifdef CONFIG_PM
3414static int wm8962_resume(struct snd_soc_codec *codec) 3409static int wm8962_resume(struct snd_soc_codec *codec)
3415{ 3410{
3416 struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3417 u16 *reg_cache = codec->reg_cache; 3411 u16 *reg_cache = codec->reg_cache;
3418 int i; 3412 int i;
3419 3413
3420 /* Restore the registers */ 3414 /* Restore the registers */
3421 for (i = 1; i < ARRAY_SIZE(wm8962->reg_cache); i++) { 3415 for (i = 1; i < codec->driver->reg_cache_size; i++) {
3422 switch (i) { 3416 switch (i) {
3423 case WM8962_SOFTWARE_RESET: 3417 case WM8962_SOFTWARE_RESET:
3424 continue; 3418 continue;
@@ -3713,6 +3707,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
3713 struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); 3707 struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
3714 struct i2c_client *i2c = container_of(codec->dev, struct i2c_client, 3708 struct i2c_client *i2c = container_of(codec->dev, struct i2c_client,
3715 dev); 3709 dev);
3710 u16 *reg_cache = codec->reg_cache;
3716 int i, trigger, irq_pol; 3711 int i, trigger, irq_pol;
3717 3712
3718 wm8962->codec = codec; 3713 wm8962->codec = codec;
@@ -3812,7 +3807,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
3812 3807
3813 /* Put the speakers into mono mode? */ 3808 /* Put the speakers into mono mode? */
3814 if (pdata->spk_mono) 3809 if (pdata->spk_mono)
3815 wm8962->reg_cache[WM8962_CLASS_D_CONTROL_2] 3810 reg_cache[WM8962_CLASS_D_CONTROL_2]
3816 |= WM8962_SPK_MONO; 3811 |= WM8962_SPK_MONO;
3817 3812
3818 /* Micbias setup, detection enable and detection 3813 /* Micbias setup, detection enable and detection
@@ -3827,16 +3822,16 @@ static int wm8962_probe(struct snd_soc_codec *codec)
3827 } 3822 }
3828 3823
3829 /* Latch volume update bits */ 3824 /* Latch volume update bits */
3830 wm8962->reg_cache[WM8962_LEFT_INPUT_VOLUME] |= WM8962_IN_VU; 3825 reg_cache[WM8962_LEFT_INPUT_VOLUME] |= WM8962_IN_VU;
3831 wm8962->reg_cache[WM8962_RIGHT_INPUT_VOLUME] |= WM8962_IN_VU; 3826 reg_cache[WM8962_RIGHT_INPUT_VOLUME] |= WM8962_IN_VU;
3832 wm8962->reg_cache[WM8962_LEFT_ADC_VOLUME] |= WM8962_ADC_VU; 3827 reg_cache[WM8962_LEFT_ADC_VOLUME] |= WM8962_ADC_VU;
3833 wm8962->reg_cache[WM8962_RIGHT_ADC_VOLUME] |= WM8962_ADC_VU; 3828 reg_cache[WM8962_RIGHT_ADC_VOLUME] |= WM8962_ADC_VU;
3834 wm8962->reg_cache[WM8962_LEFT_DAC_VOLUME] |= WM8962_DAC_VU; 3829 reg_cache[WM8962_LEFT_DAC_VOLUME] |= WM8962_DAC_VU;
3835 wm8962->reg_cache[WM8962_RIGHT_DAC_VOLUME] |= WM8962_DAC_VU; 3830 reg_cache[WM8962_RIGHT_DAC_VOLUME] |= WM8962_DAC_VU;
3836 wm8962->reg_cache[WM8962_SPKOUTL_VOLUME] |= WM8962_SPKOUT_VU; 3831 reg_cache[WM8962_SPKOUTL_VOLUME] |= WM8962_SPKOUT_VU;
3837 wm8962->reg_cache[WM8962_SPKOUTR_VOLUME] |= WM8962_SPKOUT_VU; 3832 reg_cache[WM8962_SPKOUTR_VOLUME] |= WM8962_SPKOUT_VU;
3838 wm8962->reg_cache[WM8962_HPOUTL_VOLUME] |= WM8962_HPOUT_VU; 3833 reg_cache[WM8962_HPOUTL_VOLUME] |= WM8962_HPOUT_VU;
3839 wm8962->reg_cache[WM8962_HPOUTR_VOLUME] |= WM8962_HPOUT_VU; 3834 reg_cache[WM8962_HPOUTR_VOLUME] |= WM8962_HPOUT_VU;
3840 3835
3841 wm8962_add_widgets(codec); 3836 wm8962_add_widgets(codec);
3842 3837
diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c
index 8805636bda53..572bb80627a4 100644
--- a/sound/soc/codecs/wm8971.c
+++ b/sound/soc/codecs/wm8971.c
@@ -720,6 +720,7 @@ static __devinit int wm8971_i2c_probe(struct i2c_client *i2c,
720 if (wm8971 == NULL) 720 if (wm8971 == NULL)
721 return -ENOMEM; 721 return -ENOMEM;
722 722
723 wm8971->control_type = SND_SOC_I2C;
723 i2c_set_clientdata(i2c, wm8971); 724 i2c_set_clientdata(i2c, wm8971);
724 725
725 ret = snd_soc_register_codec(&i2c->dev, 726 ret = snd_soc_register_codec(&i2c->dev,
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index 702db6937d4f..43825b2102a5 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -1338,6 +1338,7 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c,
1338 return -ENOMEM; 1338 return -ENOMEM;
1339 1339
1340 i2c_set_clientdata(i2c, wm9081); 1340 i2c_set_clientdata(i2c, wm9081);
1341 wm9081->control_type = SND_SOC_I2C;
1341 wm9081->control_data = i2c; 1342 wm9081->control_data = i2c;
1342 1343
1343 ret = snd_soc_register_codec(&i2c->dev, 1344 ret = snd_soc_register_codec(&i2c->dev,
diff --git a/sound/soc/codecs/wm9090.c b/sound/soc/codecs/wm9090.c
index 7ba5807cac36..a788c4297046 100644
--- a/sound/soc/codecs/wm9090.c
+++ b/sound/soc/codecs/wm9090.c
@@ -140,7 +140,6 @@ static const u16 wm9090_reg_defaults[] = {
140/* This struct is used to save the context */ 140/* This struct is used to save the context */
141struct wm9090_priv { 141struct wm9090_priv {
142 struct mutex mutex; 142 struct mutex mutex;
143 u16 reg_cache[WM9090_MAX_REGISTER + 1];
144 struct wm9090_platform_data pdata; 143 struct wm9090_platform_data pdata;
145 void *control_data; 144 void *control_data;
146}; 145};
@@ -552,6 +551,7 @@ static int wm9090_set_bias_level(struct snd_soc_codec *codec,
552static int wm9090_probe(struct snd_soc_codec *codec) 551static int wm9090_probe(struct snd_soc_codec *codec)
553{ 552{
554 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec); 553 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
554 u16 *reg_cache = codec->reg_cache;
555 int ret; 555 int ret;
556 556
557 codec->control_data = wm9090->control_data; 557 codec->control_data = wm9090->control_data;
@@ -576,22 +576,22 @@ static int wm9090_probe(struct snd_soc_codec *codec)
576 /* Configure some defaults; they will be written out when we 576 /* Configure some defaults; they will be written out when we
577 * bring the bias up. 577 * bring the bias up.
578 */ 578 */
579 wm9090->reg_cache[WM9090_IN1_LINE_INPUT_A_VOLUME] |= WM9090_IN1_VU 579 reg_cache[WM9090_IN1_LINE_INPUT_A_VOLUME] |= WM9090_IN1_VU
580 | WM9090_IN1A_ZC; 580 | WM9090_IN1A_ZC;
581 wm9090->reg_cache[WM9090_IN1_LINE_INPUT_B_VOLUME] |= WM9090_IN1_VU 581 reg_cache[WM9090_IN1_LINE_INPUT_B_VOLUME] |= WM9090_IN1_VU
582 | WM9090_IN1B_ZC; 582 | WM9090_IN1B_ZC;
583 wm9090->reg_cache[WM9090_IN2_LINE_INPUT_A_VOLUME] |= WM9090_IN2_VU 583 reg_cache[WM9090_IN2_LINE_INPUT_A_VOLUME] |= WM9090_IN2_VU
584 | WM9090_IN2A_ZC; 584 | WM9090_IN2A_ZC;
585 wm9090->reg_cache[WM9090_IN2_LINE_INPUT_B_VOLUME] |= WM9090_IN2_VU 585 reg_cache[WM9090_IN2_LINE_INPUT_B_VOLUME] |= WM9090_IN2_VU
586 | WM9090_IN2B_ZC; 586 | WM9090_IN2B_ZC;
587 wm9090->reg_cache[WM9090_SPEAKER_VOLUME_LEFT] |= 587 reg_cache[WM9090_SPEAKER_VOLUME_LEFT] |=
588 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC; 588 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC;
589 wm9090->reg_cache[WM9090_LEFT_OUTPUT_VOLUME] |= 589 reg_cache[WM9090_LEFT_OUTPUT_VOLUME] |=
590 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC; 590 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC;
591 wm9090->reg_cache[WM9090_RIGHT_OUTPUT_VOLUME] |= 591 reg_cache[WM9090_RIGHT_OUTPUT_VOLUME] |=
592 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC; 592 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC;
593 593
594 wm9090->reg_cache[WM9090_CLOCKING_1] |= WM9090_TOCLK_ENA; 594 reg_cache[WM9090_CLOCKING_1] |= WM9090_TOCLK_ENA;
595 595
596 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 596 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
597 597