diff options
67 files changed, 709 insertions, 418 deletions
diff --git a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt new file mode 100644 index 000000000000..df70318a617f --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt | |||
@@ -0,0 +1,19 @@ | |||
1 | * EETI eGalax Multiple Touch Controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: must be "eeti,egalax_ts" | ||
5 | - reg: i2c slave address | ||
6 | - interrupt-parent: the phandle for the interrupt controller | ||
7 | - interrupts: touch controller interrupt | ||
8 | - wakeup-gpios: the gpio pin to be used for waking up the controller | ||
9 | as well as uased as irq pin | ||
10 | |||
11 | Example: | ||
12 | |||
13 | egalax_ts@04 { | ||
14 | compatible = "eeti,egalax_ts"; | ||
15 | reg = <0x04>; | ||
16 | interrupt-parent = <&gpio1>; | ||
17 | interrupts = <9 2>; | ||
18 | wakeup-gpios = <&gpio1 9 0>; | ||
19 | }; | ||
diff --git a/MAINTAINERS b/MAINTAINERS index 28eeaece87c0..59203e77ce9e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2507,6 +2507,7 @@ M: Joonyoung Shim <jy0922.shim@samsung.com> | |||
2507 | M: Seung-Woo Kim <sw0312.kim@samsung.com> | 2507 | M: Seung-Woo Kim <sw0312.kim@samsung.com> |
2508 | M: Kyungmin Park <kyungmin.park@samsung.com> | 2508 | M: Kyungmin Park <kyungmin.park@samsung.com> |
2509 | L: dri-devel@lists.freedesktop.org | 2509 | L: dri-devel@lists.freedesktop.org |
2510 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git | ||
2510 | S: Supported | 2511 | S: Supported |
2511 | F: drivers/gpu/drm/exynos | 2512 | F: drivers/gpu/drm/exynos |
2512 | F: include/drm/exynos* | 2513 | F: include/drm/exynos* |
diff --git a/drivers/cpufreq/powernow-k8.c b/drivers/cpufreq/powernow-k8.c index c16a3a593ba4..e3ebb4fa2c3e 100644 --- a/drivers/cpufreq/powernow-k8.c +++ b/drivers/cpufreq/powernow-k8.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * http://www.gnu.org/licenses/gpl.html | 5 | * http://www.gnu.org/licenses/gpl.html |
6 | * | 6 | * |
7 | * Maintainer: | 7 | * Maintainer: |
8 | * Andreas Herrmann <andreas.herrmann3@amd.com> | 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
9 | * | 9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | 10 | * Based on the powernow-k7.c module written by Dave Jones. |
11 | * (C) 2003 Dave Jones on behalf of SuSE Labs | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index 59a26e577b57..fc345d4ebb03 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config DRM_EXYNOS | 1 | config DRM_EXYNOS |
2 | tristate "DRM Support for Samsung SoC EXYNOS Series" | 2 | tristate "DRM Support for Samsung SoC EXYNOS Series" |
3 | depends on DRM && PLAT_SAMSUNG | 3 | depends on DRM && (PLAT_SAMSUNG || ARCH_MULTIPLATFORM) |
4 | select DRM_KMS_HELPER | 4 | select DRM_KMS_HELPER |
5 | select FB_CFB_FILLRECT | 5 | select FB_CFB_FILLRECT |
6 | select FB_CFB_COPYAREA | 6 | select FB_CFB_COPYAREA |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c index 18c271862ca8..0f68a2872673 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_connector.c +++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c | |||
@@ -374,6 +374,7 @@ struct drm_connector *exynos_drm_connector_create(struct drm_device *dev, | |||
374 | exynos_connector->encoder_id = encoder->base.id; | 374 | exynos_connector->encoder_id = encoder->base.id; |
375 | exynos_connector->manager = manager; | 375 | exynos_connector->manager = manager; |
376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; | 376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; |
377 | connector->dpms = DRM_MODE_DPMS_OFF; | ||
377 | connector->encoder = encoder; | 378 | connector->encoder = encoder; |
378 | 379 | ||
379 | err = drm_mode_connector_attach_encoder(connector, encoder); | 380 | err = drm_mode_connector_attach_encoder(connector, encoder); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c index e51503fbaf2b..241ad1eeec64 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c +++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c | |||
@@ -43,12 +43,14 @@ | |||
43 | * @manager: specific encoder has its own manager to control a hardware | 43 | * @manager: specific encoder has its own manager to control a hardware |
44 | * appropriately and we can access a hardware drawing on this manager. | 44 | * appropriately and we can access a hardware drawing on this manager. |
45 | * @dpms: store the encoder dpms value. | 45 | * @dpms: store the encoder dpms value. |
46 | * @updated: indicate whether overlay data updating is needed or not. | ||
46 | */ | 47 | */ |
47 | struct exynos_drm_encoder { | 48 | struct exynos_drm_encoder { |
48 | struct drm_crtc *old_crtc; | 49 | struct drm_crtc *old_crtc; |
49 | struct drm_encoder drm_encoder; | 50 | struct drm_encoder drm_encoder; |
50 | struct exynos_drm_manager *manager; | 51 | struct exynos_drm_manager *manager; |
51 | int dpms; | 52 | int dpms; |
53 | bool updated; | ||
52 | }; | 54 | }; |
53 | 55 | ||
54 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) | 56 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) |
@@ -85,7 +87,9 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
85 | switch (mode) { | 87 | switch (mode) { |
86 | case DRM_MODE_DPMS_ON: | 88 | case DRM_MODE_DPMS_ON: |
87 | if (manager_ops && manager_ops->apply) | 89 | if (manager_ops && manager_ops->apply) |
88 | manager_ops->apply(manager->dev); | 90 | if (!exynos_encoder->updated) |
91 | manager_ops->apply(manager->dev); | ||
92 | |||
89 | exynos_drm_connector_power(encoder, mode); | 93 | exynos_drm_connector_power(encoder, mode); |
90 | exynos_encoder->dpms = mode; | 94 | exynos_encoder->dpms = mode; |
91 | break; | 95 | break; |
@@ -94,6 +98,7 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
94 | case DRM_MODE_DPMS_OFF: | 98 | case DRM_MODE_DPMS_OFF: |
95 | exynos_drm_connector_power(encoder, mode); | 99 | exynos_drm_connector_power(encoder, mode); |
96 | exynos_encoder->dpms = mode; | 100 | exynos_encoder->dpms = mode; |
101 | exynos_encoder->updated = false; | ||
97 | break; | 102 | break; |
98 | default: | 103 | default: |
99 | DRM_ERROR("unspecified mode %d\n", mode); | 104 | DRM_ERROR("unspecified mode %d\n", mode); |
@@ -205,13 +210,22 @@ static void exynos_drm_encoder_prepare(struct drm_encoder *encoder) | |||
205 | 210 | ||
206 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) | 211 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) |
207 | { | 212 | { |
208 | struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder); | 213 | struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder); |
214 | struct exynos_drm_manager *manager = exynos_encoder->manager; | ||
209 | struct exynos_drm_manager_ops *manager_ops = manager->ops; | 215 | struct exynos_drm_manager_ops *manager_ops = manager->ops; |
210 | 216 | ||
211 | DRM_DEBUG_KMS("%s\n", __FILE__); | 217 | DRM_DEBUG_KMS("%s\n", __FILE__); |
212 | 218 | ||
213 | if (manager_ops && manager_ops->commit) | 219 | if (manager_ops && manager_ops->commit) |
214 | manager_ops->commit(manager->dev); | 220 | manager_ops->commit(manager->dev); |
221 | |||
222 | /* | ||
223 | * this will avoid one issue that overlay data is updated to | ||
224 | * real hardware two times. | ||
225 | * And this variable will be used to check if the data was | ||
226 | * already updated or not by exynos_drm_encoder_dpms function. | ||
227 | */ | ||
228 | exynos_encoder->updated = true; | ||
215 | } | 229 | } |
216 | 230 | ||
217 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) | 231 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) |
@@ -401,19 +415,6 @@ void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data) | |||
401 | manager_ops->dpms(manager->dev, mode); | 415 | manager_ops->dpms(manager->dev, mode); |
402 | 416 | ||
403 | /* | 417 | /* |
404 | * set current mode to new one so that data aren't updated into | ||
405 | * registers by drm_helper_connector_dpms two times. | ||
406 | * | ||
407 | * in case that drm_crtc_helper_set_mode() is called, | ||
408 | * overlay_ops->commit() and manager_ops->commit() callbacks | ||
409 | * can be called two times, first at drm_crtc_helper_set_mode() | ||
410 | * and second at drm_helper_connector_dpms(). | ||
411 | * so with this setting, when drm_helper_connector_dpms() is called | ||
412 | * encoder->funcs->dpms() will be ignored. | ||
413 | */ | ||
414 | exynos_encoder->dpms = mode; | ||
415 | |||
416 | /* | ||
417 | * if this condition is ok then it means that the crtc is already | 418 | * if this condition is ok then it means that the crtc is already |
418 | * detached from encoder and last function for detaching is properly | 419 | * detached from encoder and last function for detaching is properly |
419 | * done, so clear pipe from manager to prevent repeated call. | 420 | * done, so clear pipe from manager to prevent repeated call. |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 614b2e9ac462..e7fbb823fd8e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -1142,7 +1142,7 @@ static int __devinit mixer_probe(struct platform_device *pdev) | |||
1142 | const struct of_device_id *match; | 1142 | const struct of_device_id *match; |
1143 | match = of_match_node(of_match_ptr(mixer_match_types), | 1143 | match = of_match_node(of_match_ptr(mixer_match_types), |
1144 | pdev->dev.of_node); | 1144 | pdev->dev.of_node); |
1145 | drv = match->data; | 1145 | drv = (struct mixer_drv_data *)match->data; |
1146 | } else { | 1146 | } else { |
1147 | drv = (struct mixer_drv_data *) | 1147 | drv = (struct mixer_drv_data *) |
1148 | platform_get_device_id(pdev)->driver_data; | 1148 | platform_get_device_id(pdev)->driver_data; |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c9bfd83dde64..61ae104dca8c 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1505,7 +1505,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1505 | goto put_gmch; | 1505 | goto put_gmch; |
1506 | } | 1506 | } |
1507 | 1507 | ||
1508 | i915_kick_out_firmware_fb(dev_priv); | 1508 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
1509 | i915_kick_out_firmware_fb(dev_priv); | ||
1509 | 1510 | ||
1510 | pci_set_master(dev->pdev); | 1511 | pci_set_master(dev->pdev); |
1511 | 1512 | ||
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index f78061af7045..b726b478a4f5 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -729,7 +729,7 @@ void intel_crt_init(struct drm_device *dev) | |||
729 | 729 | ||
730 | crt->base.type = INTEL_OUTPUT_ANALOG; | 730 | crt->base.type = INTEL_OUTPUT_ANALOG; |
731 | crt->base.cloneable = true; | 731 | crt->base.cloneable = true; |
732 | if (IS_HASWELL(dev)) | 732 | if (IS_HASWELL(dev) || IS_I830(dev)) |
733 | crt->base.crtc_mask = (1 << 0); | 733 | crt->base.crtc_mask = (1 << 0); |
734 | else | 734 | else |
735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); | 735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 495625914e4a..d7bc817f51a0 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -341,9 +341,17 @@ static int intel_overlay_off(struct intel_overlay *overlay) | |||
341 | intel_ring_emit(ring, flip_addr); | 341 | intel_ring_emit(ring, flip_addr); |
342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); |
343 | /* turn overlay off */ | 343 | /* turn overlay off */ |
344 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | 344 | if (IS_I830(dev)) { |
345 | intel_ring_emit(ring, flip_addr); | 345 | /* Workaround: Don't disable the overlay fully, since otherwise |
346 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 346 | * it dies on the next OVERLAY_ON cmd. */ |
347 | intel_ring_emit(ring, MI_NOOP); | ||
348 | intel_ring_emit(ring, MI_NOOP); | ||
349 | intel_ring_emit(ring, MI_NOOP); | ||
350 | } else { | ||
351 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | ||
352 | intel_ring_emit(ring, flip_addr); | ||
353 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | ||
354 | } | ||
347 | intel_ring_advance(ring); | 355 | intel_ring_advance(ring); |
348 | 356 | ||
349 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); | 357 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index e019b2369861..e2aacd329545 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -435,7 +435,7 @@ int intel_panel_setup_backlight(struct drm_device *dev) | |||
435 | props.type = BACKLIGHT_RAW; | 435 | props.type = BACKLIGHT_RAW; |
436 | props.max_brightness = _intel_panel_get_max_backlight(dev); | 436 | props.max_brightness = _intel_panel_get_max_backlight(dev); |
437 | if (props.max_brightness == 0) { | 437 | if (props.max_brightness == 0) { |
438 | DRM_ERROR("Failed to get maximum backlight value\n"); | 438 | DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n"); |
439 | return -ENODEV; | 439 | return -ENODEV; |
440 | } | 440 | } |
441 | dev_priv->backlight = | 441 | dev_priv->backlight = |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index c01d97db0061..79d308da29ff 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -894,6 +894,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) | |||
894 | } | 894 | } |
895 | #endif | 895 | #endif |
896 | 896 | ||
897 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, | ||
898 | unsigned if_index, uint8_t tx_rate, | ||
899 | uint8_t *data, unsigned length) | ||
900 | { | ||
901 | uint8_t set_buf_index[2] = { if_index, 0 }; | ||
902 | uint8_t hbuf_size, tmp[8]; | ||
903 | int i; | ||
904 | |||
905 | if (!intel_sdvo_set_value(intel_sdvo, | ||
906 | SDVO_CMD_SET_HBUF_INDEX, | ||
907 | set_buf_index, 2)) | ||
908 | return false; | ||
909 | |||
910 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, | ||
911 | &hbuf_size, 1)) | ||
912 | return false; | ||
913 | |||
914 | /* Buffer size is 0 based, hooray! */ | ||
915 | hbuf_size++; | ||
916 | |||
917 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", | ||
918 | if_index, length, hbuf_size); | ||
919 | |||
920 | for (i = 0; i < hbuf_size; i += 8) { | ||
921 | memset(tmp, 0, 8); | ||
922 | if (i < length) | ||
923 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); | ||
924 | |||
925 | if (!intel_sdvo_set_value(intel_sdvo, | ||
926 | SDVO_CMD_SET_HBUF_DATA, | ||
927 | tmp, 8)) | ||
928 | return false; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | ||
935 | |||
897 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | 936 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
898 | { | 937 | { |
899 | struct dip_infoframe avi_if = { | 938 | struct dip_infoframe avi_if = { |
@@ -901,11 +940,7 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
901 | .ver = DIP_VERSION_AVI, | 940 | .ver = DIP_VERSION_AVI, |
902 | .len = DIP_LEN_AVI, | 941 | .len = DIP_LEN_AVI, |
903 | }; | 942 | }; |
904 | uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; | ||
905 | uint8_t set_buf_index[2] = { 1, 0 }; | ||
906 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; | 943 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
907 | uint64_t *data = (uint64_t *)sdvo_data; | ||
908 | unsigned i; | ||
909 | 944 | ||
910 | intel_dip_infoframe_csum(&avi_if); | 945 | intel_dip_infoframe_csum(&avi_if); |
911 | 946 | ||
@@ -915,22 +950,9 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
915 | sdvo_data[3] = avi_if.checksum; | 950 | sdvo_data[3] = avi_if.checksum; |
916 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); | 951 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
917 | 952 | ||
918 | if (!intel_sdvo_set_value(intel_sdvo, | 953 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
919 | SDVO_CMD_SET_HBUF_INDEX, | 954 | SDVO_HBUF_TX_VSYNC, |
920 | set_buf_index, 2)) | 955 | sdvo_data, sizeof(sdvo_data)); |
921 | return false; | ||
922 | |||
923 | for (i = 0; i < sizeof(sdvo_data); i += 8) { | ||
924 | if (!intel_sdvo_set_value(intel_sdvo, | ||
925 | SDVO_CMD_SET_HBUF_DATA, | ||
926 | data, 8)) | ||
927 | return false; | ||
928 | data++; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | 956 | } |
935 | 957 | ||
936 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) | 958 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h index 9d030142ee43..770bdd6ecd9f 100644 --- a/drivers/gpu/drm/i915/intel_sdvo_regs.h +++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h | |||
@@ -708,6 +708,8 @@ struct intel_sdvo_enhancements_arg { | |||
708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 | 708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 |
709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 | 709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 |
710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 | 710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 |
711 | #define SDVO_HBUF_INDEX_ELD 0 | ||
712 | #define SDVO_HBUF_INDEX_AVI_IF 1 | ||
711 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 | 713 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 |
712 | #define SDVO_CMD_GET_HBUF_INFO 0x95 | 714 | #define SDVO_CMD_GET_HBUF_INFO 0x95 |
713 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 | 715 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 |
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 30271b641913..95e6318b6268 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
@@ -264,7 +264,7 @@ static int evergreen_surface_check_2d(struct radeon_cs_parser *p, | |||
264 | /* macro tile width & height */ | 264 | /* macro tile width & height */ |
265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; | 265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; |
266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; | 266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; |
267 | mtileb = (palign / 8) * (halign / 8) * tileb;; | 267 | mtileb = (palign / 8) * (halign / 8) * tileb; |
268 | mtile_pr = surf->nbx / palign; | 268 | mtile_pr = surf->nbx / palign; |
269 | mtile_ps = (mtile_pr * surf->nby) / halign; | 269 | mtile_ps = (mtile_pr * surf->nby) / halign; |
270 | surf->layer_size = mtile_ps * mtileb * slice_pt; | 270 | surf->layer_size = mtile_ps * mtileb * slice_pt; |
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 37f6a907aea4..15f5ded65e0c 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c | |||
@@ -352,9 +352,9 @@ static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) | |||
352 | } | 352 | } |
353 | 353 | ||
354 | /** | 354 | /** |
355 | * radeon_atpx_switchto - switch to the requested GPU | 355 | * radeon_atpx_power_state - power down/up the requested GPU |
356 | * | 356 | * |
357 | * @id: GPU to switch to | 357 | * @id: GPU to power down/up |
358 | * @state: requested power state (0 = off, 1 = on) | 358 | * @state: requested power state (0 = off, 1 = on) |
359 | * | 359 | * |
360 | * Execute the necessary ATPX function to power down/up the discrete GPU | 360 | * Execute the necessary ATPX function to power down/up the discrete GPU |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 67cfc1795ecd..b884c362a8c2 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -941,7 +941,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
941 | struct drm_mode_object *obj; | 941 | struct drm_mode_object *obj; |
942 | int i; | 942 | int i; |
943 | enum drm_connector_status ret = connector_status_disconnected; | 943 | enum drm_connector_status ret = connector_status_disconnected; |
944 | bool dret = false; | 944 | bool dret = false, broken_edid = false; |
945 | 945 | ||
946 | if (!force && radeon_check_hpd_status_unchanged(connector)) | 946 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
947 | return connector->status; | 947 | return connector->status; |
@@ -965,6 +965,9 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
965 | ret = connector_status_disconnected; | 965 | ret = connector_status_disconnected; |
966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | 966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); |
967 | radeon_connector->ddc_bus = NULL; | 967 | radeon_connector->ddc_bus = NULL; |
968 | } else { | ||
969 | ret = connector_status_connected; | ||
970 | broken_edid = true; /* defer use_digital to later */ | ||
968 | } | 971 | } |
969 | } else { | 972 | } else { |
970 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 973 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
@@ -1047,13 +1050,24 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
1047 | 1050 | ||
1048 | encoder_funcs = encoder->helper_private; | 1051 | encoder_funcs = encoder->helper_private; |
1049 | if (encoder_funcs->detect) { | 1052 | if (encoder_funcs->detect) { |
1050 | if (ret != connector_status_connected) { | 1053 | if (!broken_edid) { |
1051 | ret = encoder_funcs->detect(encoder, connector); | 1054 | if (ret != connector_status_connected) { |
1052 | if (ret == connector_status_connected) { | 1055 | /* deal with analog monitors without DDC */ |
1053 | radeon_connector->use_digital = false; | 1056 | ret = encoder_funcs->detect(encoder, connector); |
1057 | if (ret == connector_status_connected) { | ||
1058 | radeon_connector->use_digital = false; | ||
1059 | } | ||
1060 | if (ret != connector_status_disconnected) | ||
1061 | radeon_connector->detected_by_load = true; | ||
1054 | } | 1062 | } |
1055 | if (ret != connector_status_disconnected) | 1063 | } else { |
1056 | radeon_connector->detected_by_load = true; | 1064 | enum drm_connector_status lret; |
1065 | /* assume digital unless load detected otherwise */ | ||
1066 | radeon_connector->use_digital = true; | ||
1067 | lret = encoder_funcs->detect(encoder, connector); | ||
1068 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | ||
1069 | if (lret == connector_status_connected) | ||
1070 | radeon_connector->use_digital = false; | ||
1057 | } | 1071 | } |
1058 | break; | 1072 | break; |
1059 | } | 1073 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 5677a424b585..6857cb4efb76 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -295,6 +295,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
296 | struct drm_device *dev = crtc->dev; | 296 | struct drm_device *dev = crtc->dev; |
297 | struct radeon_device *rdev = dev->dev_private; | 297 | struct radeon_device *rdev = dev->dev_private; |
298 | uint32_t crtc_ext_cntl = 0; | ||
298 | uint32_t mask; | 299 | uint32_t mask; |
299 | 300 | ||
300 | if (radeon_crtc->crtc_id) | 301 | if (radeon_crtc->crtc_id) |
@@ -307,6 +308,16 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
307 | RADEON_CRTC_VSYNC_DIS | | 308 | RADEON_CRTC_VSYNC_DIS | |
308 | RADEON_CRTC_HSYNC_DIS); | 309 | RADEON_CRTC_HSYNC_DIS); |
309 | 310 | ||
311 | /* | ||
312 | * On all dual CRTC GPUs this bit controls the CRTC of the primary DAC. | ||
313 | * Therefore it is set in the DAC DMPS function. | ||
314 | * This is different for GPU's with a single CRTC but a primary and a | ||
315 | * TV DAC: here it controls the single CRTC no matter where it is | ||
316 | * routed. Therefore we set it here. | ||
317 | */ | ||
318 | if (rdev->flags & RADEON_SINGLE_CRTC) | ||
319 | crtc_ext_cntl = RADEON_CRTC_CRT_ON; | ||
320 | |||
310 | switch (mode) { | 321 | switch (mode) { |
311 | case DRM_MODE_DPMS_ON: | 322 | case DRM_MODE_DPMS_ON: |
312 | radeon_crtc->enabled = true; | 323 | radeon_crtc->enabled = true; |
@@ -317,7 +328,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
317 | else { | 328 | else { |
318 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | | 329 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | |
319 | RADEON_CRTC_DISP_REQ_EN_B)); | 330 | RADEON_CRTC_DISP_REQ_EN_B)); |
320 | WREG32_P(RADEON_CRTC_EXT_CNTL, 0, ~mask); | 331 | WREG32_P(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl, ~(mask | crtc_ext_cntl)); |
321 | } | 332 | } |
322 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); | 333 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); |
323 | radeon_crtc_load_lut(crtc); | 334 | radeon_crtc_load_lut(crtc); |
@@ -331,7 +342,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
331 | else { | 342 | else { |
332 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | | 343 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | |
333 | RADEON_CRTC_DISP_REQ_EN_B)); | 344 | RADEON_CRTC_DISP_REQ_EN_B)); |
334 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~mask); | 345 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~(mask | crtc_ext_cntl)); |
335 | } | 346 | } |
336 | radeon_crtc->enabled = false; | 347 | radeon_crtc->enabled = false; |
337 | /* adjust pm to dpms changes AFTER disabling crtcs */ | 348 | /* adjust pm to dpms changes AFTER disabling crtcs */ |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 0063df9d166d..f5ba2241dacc 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -537,7 +537,9 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode | |||
537 | break; | 537 | break; |
538 | } | 538 | } |
539 | 539 | ||
540 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | 540 | /* handled in radeon_crtc_dpms() */ |
541 | if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
542 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | ||
541 | WREG32(RADEON_DAC_CNTL, dac_cntl); | 543 | WREG32(RADEON_DAC_CNTL, dac_cntl); |
542 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); | 544 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); |
543 | 545 | ||
@@ -662,6 +664,8 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
662 | 664 | ||
663 | if (ASIC_IS_R300(rdev)) | 665 | if (ASIC_IS_R300(rdev)) |
664 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); | 666 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | else if (ASIC_IS_RV100(rdev)) | ||
668 | tmp |= (0x1ac << RADEON_DAC_FORCE_DATA_SHIFT); | ||
665 | else | 669 | else |
666 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); | 670 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | 671 | ||
@@ -671,6 +675,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
671 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; | 675 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; |
672 | WREG32(RADEON_DAC_CNTL, tmp); | 676 | WREG32(RADEON_DAC_CNTL, tmp); |
673 | 677 | ||
678 | tmp = dac_macro_cntl; | ||
674 | tmp &= ~(RADEON_DAC_PDWN_R | | 679 | tmp &= ~(RADEON_DAC_PDWN_R | |
675 | RADEON_DAC_PDWN_G | | 680 | RADEON_DAC_PDWN_G | |
676 | RADEON_DAC_PDWN_B); | 681 | RADEON_DAC_PDWN_B); |
@@ -1092,7 +1097,8 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) | |||
1092 | } else { | 1097 | } else { |
1093 | if (is_tv) | 1098 | if (is_tv) |
1094 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); | 1099 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); |
1095 | else | 1100 | /* handled in radeon_crtc_dpms() */ |
1101 | else if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
1096 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | 1102 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1097 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1103 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1098 | } | 1104 | } |
@@ -1416,13 +1422,104 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, | |||
1416 | return found; | 1422 | return found; |
1417 | } | 1423 | } |
1418 | 1424 | ||
1425 | static bool radeon_legacy_ext_dac_detect(struct drm_encoder *encoder, | ||
1426 | struct drm_connector *connector) | ||
1427 | { | ||
1428 | struct drm_device *dev = encoder->dev; | ||
1429 | struct radeon_device *rdev = dev->dev_private; | ||
1430 | uint32_t gpio_monid, fp2_gen_cntl, disp_output_cntl, crtc2_gen_cntl; | ||
1431 | uint32_t disp_lin_trans_grph_a, disp_lin_trans_grph_b, disp_lin_trans_grph_c; | ||
1432 | uint32_t disp_lin_trans_grph_d, disp_lin_trans_grph_e, disp_lin_trans_grph_f; | ||
1433 | uint32_t tmp, crtc2_h_total_disp, crtc2_v_total_disp; | ||
1434 | uint32_t crtc2_h_sync_strt_wid, crtc2_v_sync_strt_wid; | ||
1435 | bool found = false; | ||
1436 | int i; | ||
1437 | |||
1438 | /* save the regs we need */ | ||
1439 | gpio_monid = RREG32(RADEON_GPIO_MONID); | ||
1440 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | ||
1441 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1442 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1443 | disp_lin_trans_grph_a = RREG32(RADEON_DISP_LIN_TRANS_GRPH_A); | ||
1444 | disp_lin_trans_grph_b = RREG32(RADEON_DISP_LIN_TRANS_GRPH_B); | ||
1445 | disp_lin_trans_grph_c = RREG32(RADEON_DISP_LIN_TRANS_GRPH_C); | ||
1446 | disp_lin_trans_grph_d = RREG32(RADEON_DISP_LIN_TRANS_GRPH_D); | ||
1447 | disp_lin_trans_grph_e = RREG32(RADEON_DISP_LIN_TRANS_GRPH_E); | ||
1448 | disp_lin_trans_grph_f = RREG32(RADEON_DISP_LIN_TRANS_GRPH_F); | ||
1449 | crtc2_h_total_disp = RREG32(RADEON_CRTC2_H_TOTAL_DISP); | ||
1450 | crtc2_v_total_disp = RREG32(RADEON_CRTC2_V_TOTAL_DISP); | ||
1451 | crtc2_h_sync_strt_wid = RREG32(RADEON_CRTC2_H_SYNC_STRT_WID); | ||
1452 | crtc2_v_sync_strt_wid = RREG32(RADEON_CRTC2_V_SYNC_STRT_WID); | ||
1453 | |||
1454 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1455 | tmp &= ~RADEON_GPIO_A_0; | ||
1456 | WREG32(RADEON_GPIO_MONID, tmp); | ||
1457 | |||
1458 | WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON | | ||
1459 | RADEON_FP2_PANEL_FORMAT | | ||
1460 | R200_FP2_SOURCE_SEL_TRANS_UNIT | | ||
1461 | RADEON_FP2_DVO_EN | | ||
1462 | R200_FP2_DVO_RATE_SEL_SDR)); | ||
1463 | |||
1464 | WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX | | ||
1465 | RADEON_DISP_TRANS_MATRIX_GRAPHICS)); | ||
1466 | |||
1467 | WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN | | ||
1468 | RADEON_CRTC2_DISP_REQ_EN_B)); | ||
1469 | |||
1470 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000); | ||
1471 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0); | ||
1472 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000); | ||
1473 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0); | ||
1474 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000); | ||
1475 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0); | ||
1476 | |||
1477 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008); | ||
1478 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800); | ||
1479 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001); | ||
1480 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080); | ||
1481 | |||
1482 | for (i = 0; i < 200; i++) { | ||
1483 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1484 | if (tmp & RADEON_GPIO_Y_0) | ||
1485 | found = true; | ||
1486 | |||
1487 | if (found) | ||
1488 | break; | ||
1489 | |||
1490 | if (!drm_can_sleep()) | ||
1491 | mdelay(1); | ||
1492 | else | ||
1493 | msleep(1); | ||
1494 | } | ||
1495 | |||
1496 | /* restore the regs we used */ | ||
1497 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a); | ||
1498 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b); | ||
1499 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c); | ||
1500 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d); | ||
1501 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e); | ||
1502 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f); | ||
1503 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp); | ||
1504 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp); | ||
1505 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid); | ||
1506 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid); | ||
1507 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1508 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1509 | WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); | ||
1510 | WREG32(RADEON_GPIO_MONID, gpio_monid); | ||
1511 | |||
1512 | return found; | ||
1513 | } | ||
1514 | |||
1419 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, | 1515 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, |
1420 | struct drm_connector *connector) | 1516 | struct drm_connector *connector) |
1421 | { | 1517 | { |
1422 | struct drm_device *dev = encoder->dev; | 1518 | struct drm_device *dev = encoder->dev; |
1423 | struct radeon_device *rdev = dev->dev_private; | 1519 | struct radeon_device *rdev = dev->dev_private; |
1424 | uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl; | 1520 | uint32_t crtc2_gen_cntl = 0, tv_dac_cntl, dac_cntl2, dac_ext_cntl; |
1425 | uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; | 1521 | uint32_t gpiopad_a = 0, pixclks_cntl, tmp; |
1522 | uint32_t disp_output_cntl = 0, disp_hw_debug = 0, crtc_ext_cntl = 0; | ||
1426 | enum drm_connector_status found = connector_status_disconnected; | 1523 | enum drm_connector_status found = connector_status_disconnected; |
1427 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1524 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1428 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; | 1525 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
@@ -1459,12 +1556,27 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1459 | return connector_status_disconnected; | 1556 | return connector_status_disconnected; |
1460 | } | 1557 | } |
1461 | 1558 | ||
1559 | /* R200 uses an external DAC for secondary DAC */ | ||
1560 | if (rdev->family == CHIP_R200) { | ||
1561 | if (radeon_legacy_ext_dac_detect(encoder, connector)) | ||
1562 | found = connector_status_connected; | ||
1563 | return found; | ||
1564 | } | ||
1565 | |||
1462 | /* save the regs we need */ | 1566 | /* save the regs we need */ |
1463 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); | 1567 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); |
1464 | gpiopad_a = ASIC_IS_R300(rdev) ? RREG32(RADEON_GPIOPAD_A) : 0; | 1568 | |
1465 | disp_output_cntl = ASIC_IS_R300(rdev) ? RREG32(RADEON_DISP_OUTPUT_CNTL) : 0; | 1569 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1466 | disp_hw_debug = ASIC_IS_R300(rdev) ? 0 : RREG32(RADEON_DISP_HW_DEBUG); | 1570 | crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
1467 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | 1571 | } else { |
1572 | if (ASIC_IS_R300(rdev)) { | ||
1573 | gpiopad_a = RREG32(RADEON_GPIOPAD_A); | ||
1574 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1575 | } else { | ||
1576 | disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG); | ||
1577 | } | ||
1578 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1579 | } | ||
1468 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); | 1580 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); |
1469 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); | 1581 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); |
1470 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); | 1582 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); |
@@ -1473,22 +1585,24 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1473 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); | 1585 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); |
1474 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); | 1586 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); |
1475 | 1587 | ||
1476 | if (ASIC_IS_R300(rdev)) | 1588 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1477 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | 1589 | tmp = crtc_ext_cntl | RADEON_CRTC_CRT_ON; |
1478 | 1590 | WREG32(RADEON_CRTC_EXT_CNTL, tmp); | |
1479 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; | ||
1480 | tmp |= RADEON_CRTC2_CRT2_ON | | ||
1481 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1482 | |||
1483 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1484 | |||
1485 | if (ASIC_IS_R300(rdev)) { | ||
1486 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1487 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1488 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1489 | } else { | 1591 | } else { |
1490 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | 1592 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; |
1491 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | 1593 | tmp |= RADEON_CRTC2_CRT2_ON | |
1594 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1595 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1596 | |||
1597 | if (ASIC_IS_R300(rdev)) { | ||
1598 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | ||
1599 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1600 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1601 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1602 | } else { | ||
1603 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | ||
1604 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | ||
1605 | } | ||
1492 | } | 1606 | } |
1493 | 1607 | ||
1494 | tmp = RADEON_TV_DAC_NBLANK | | 1608 | tmp = RADEON_TV_DAC_NBLANK | |
@@ -1530,14 +1644,19 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1530 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); | 1644 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); |
1531 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); | 1645 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); |
1532 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1646 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1533 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1534 | 1647 | ||
1535 | if (ASIC_IS_R300(rdev)) { | 1648 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1536 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | 1649 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); |
1537 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1538 | } else { | 1650 | } else { |
1539 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | 1651 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1652 | if (ASIC_IS_R300(rdev)) { | ||
1653 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1654 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1655 | } else { | ||
1656 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | ||
1657 | } | ||
1540 | } | 1658 | } |
1659 | |||
1541 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); | 1660 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |
1542 | 1661 | ||
1543 | return found; | 1662 | return found; |
diff --git a/drivers/gpu/drm/udl/udl_drv.h b/drivers/gpu/drm/udl/udl_drv.h index fccd361f7b50..87aa5f5d3c88 100644 --- a/drivers/gpu/drm/udl/udl_drv.h +++ b/drivers/gpu/drm/udl/udl_drv.h | |||
@@ -104,7 +104,7 @@ udl_fb_user_fb_create(struct drm_device *dev, | |||
104 | 104 | ||
105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
106 | const char *front, char **urb_buf_ptr, | 106 | const char *front, char **urb_buf_ptr, |
107 | u32 byte_offset, u32 byte_width, | 107 | u32 byte_offset, u32 device_byte_offset, u32 byte_width, |
108 | int *ident_ptr, int *sent_ptr); | 108 | int *ident_ptr, int *sent_ptr); |
109 | 109 | ||
110 | int udl_dumb_create(struct drm_file *file_priv, | 110 | int udl_dumb_create(struct drm_file *file_priv, |
diff --git a/drivers/gpu/drm/udl/udl_fb.c b/drivers/gpu/drm/udl/udl_fb.c index 69a2b16f42a6..d4ab3beaada0 100644 --- a/drivers/gpu/drm/udl/udl_fb.c +++ b/drivers/gpu/drm/udl/udl_fb.c | |||
@@ -114,9 +114,10 @@ static void udlfb_dpy_deferred_io(struct fb_info *info, | |||
114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { | 114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { |
115 | 115 | ||
116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), | 116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), |
117 | &urb, (char *) info->fix.smem_start, | 117 | &urb, (char *) info->fix.smem_start, |
118 | &cmd, cur->index << PAGE_SHIFT, | 118 | &cmd, cur->index << PAGE_SHIFT, |
119 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | 119 | cur->index << PAGE_SHIFT, |
120 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | ||
120 | goto error; | 121 | goto error; |
121 | bytes_rendered += PAGE_SIZE; | 122 | bytes_rendered += PAGE_SIZE; |
122 | } | 123 | } |
@@ -187,10 +188,11 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, | |||
187 | for (i = y; i < y + height ; i++) { | 188 | for (i = y; i < y + height ; i++) { |
188 | const int line_offset = fb->base.pitches[0] * i; | 189 | const int line_offset = fb->base.pitches[0] * i; |
189 | const int byte_offset = line_offset + (x * bpp); | 190 | const int byte_offset = line_offset + (x * bpp); |
190 | 191 | const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp); | |
191 | if (udl_render_hline(dev, bpp, &urb, | 192 | if (udl_render_hline(dev, bpp, &urb, |
192 | (char *) fb->obj->vmapping, | 193 | (char *) fb->obj->vmapping, |
193 | &cmd, byte_offset, width * bpp, | 194 | &cmd, byte_offset, dev_byte_offset, |
195 | width * bpp, | ||
194 | &bytes_identical, &bytes_sent)) | 196 | &bytes_identical, &bytes_sent)) |
195 | goto error; | 197 | goto error; |
196 | } | 198 | } |
diff --git a/drivers/gpu/drm/udl/udl_transfer.c b/drivers/gpu/drm/udl/udl_transfer.c index dc095526ffb7..142fee5f983f 100644 --- a/drivers/gpu/drm/udl/udl_transfer.c +++ b/drivers/gpu/drm/udl/udl_transfer.c | |||
@@ -213,11 +213,12 @@ static void udl_compress_hline16( | |||
213 | */ | 213 | */ |
214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
215 | const char *front, char **urb_buf_ptr, | 215 | const char *front, char **urb_buf_ptr, |
216 | u32 byte_offset, u32 byte_width, | 216 | u32 byte_offset, u32 device_byte_offset, |
217 | u32 byte_width, | ||
217 | int *ident_ptr, int *sent_ptr) | 218 | int *ident_ptr, int *sent_ptr) |
218 | { | 219 | { |
219 | const u8 *line_start, *line_end, *next_pixel; | 220 | const u8 *line_start, *line_end, *next_pixel; |
220 | u32 base16 = 0 + (byte_offset / bpp) * 2; | 221 | u32 base16 = 0 + (device_byte_offset / bpp) * 2; |
221 | struct urb *urb = *urb_ptr; | 222 | struct urb *urb = *urb_ptr; |
222 | u8 *cmd = *urb_buf_ptr; | 223 | u8 *cmd = *urb_buf_ptr; |
223 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; | 224 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; |
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 1f58197062cf..286ca1917820 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale MXS I2C bus driver | 2 | * Freescale MXS I2C bus driver |
3 | * | 3 | * |
4 | * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. | 4 | * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K. |
5 | * | 5 | * |
6 | * based on a (non-working) driver which was: | 6 | * based on a (non-working) driver which was: |
7 | * | 7 | * |
@@ -35,10 +35,6 @@ | |||
35 | 35 | ||
36 | #define DRIVER_NAME "mxs-i2c" | 36 | #define DRIVER_NAME "mxs-i2c" |
37 | 37 | ||
38 | static bool use_pioqueue; | ||
39 | module_param(use_pioqueue, bool, 0); | ||
40 | MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | ||
41 | |||
42 | #define MXS_I2C_CTRL0 (0x00) | 38 | #define MXS_I2C_CTRL0 (0x00) |
43 | #define MXS_I2C_CTRL0_SET (0x04) | 39 | #define MXS_I2C_CTRL0_SET (0x04) |
44 | 40 | ||
@@ -75,23 +71,6 @@ MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | |||
75 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ | 71 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ |
76 | MXS_I2C_CTRL1_SLAVE_IRQ) | 72 | MXS_I2C_CTRL1_SLAVE_IRQ) |
77 | 73 | ||
78 | #define MXS_I2C_QUEUECTRL (0x60) | ||
79 | #define MXS_I2C_QUEUECTRL_SET (0x64) | ||
80 | #define MXS_I2C_QUEUECTRL_CLR (0x68) | ||
81 | |||
82 | #define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20 | ||
83 | #define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04 | ||
84 | |||
85 | #define MXS_I2C_QUEUESTAT (0x70) | ||
86 | #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000 | ||
87 | #define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F | ||
88 | |||
89 | #define MXS_I2C_QUEUECMD (0x80) | ||
90 | |||
91 | #define MXS_I2C_QUEUEDATA (0x90) | ||
92 | |||
93 | #define MXS_I2C_DATA (0xa0) | ||
94 | |||
95 | 74 | ||
96 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ | 75 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ |
97 | MXS_I2C_CTRL0_PRE_SEND_START | \ | 76 | MXS_I2C_CTRL0_PRE_SEND_START | \ |
@@ -153,7 +132,6 @@ struct mxs_i2c_dev { | |||
153 | const struct mxs_i2c_speed_config *speed; | 132 | const struct mxs_i2c_speed_config *speed; |
154 | 133 | ||
155 | /* DMA support components */ | 134 | /* DMA support components */ |
156 | bool dma_mode; | ||
157 | int dma_channel; | 135 | int dma_channel; |
158 | struct dma_chan *dmach; | 136 | struct dma_chan *dmach; |
159 | struct mxs_dma_data dma_data; | 137 | struct mxs_dma_data dma_data; |
@@ -172,99 +150,6 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) | |||
172 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); | 150 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); |
173 | 151 | ||
174 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); | 152 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); |
175 | if (i2c->dma_mode) | ||
176 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
177 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
178 | else | ||
179 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
180 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
181 | } | ||
182 | |||
183 | static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len, | ||
184 | int flags) | ||
185 | { | ||
186 | u32 data; | ||
187 | |||
188 | writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD); | ||
189 | |||
190 | data = (addr << 1) | I2C_SMBUS_READ; | ||
191 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
192 | |||
193 | data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags; | ||
194 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
195 | } | ||
196 | |||
197 | static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c, | ||
198 | u8 addr, u8 *buf, int len, int flags) | ||
199 | { | ||
200 | u32 data; | ||
201 | int i, shifts_left; | ||
202 | |||
203 | data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags; | ||
204 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
205 | |||
206 | /* | ||
207 | * We have to copy the slave address (u8) and buffer (arbitrary number | ||
208 | * of u8) into the data register (u32). To achieve that, the u8 are put | ||
209 | * into the MSBs of 'data' which is then shifted for the next u8. When | ||
210 | * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32 | ||
211 | * looks like this: | ||
212 | * | ||
213 | * 3 2 1 0 | ||
214 | * 10987654|32109876|54321098|76543210 | ||
215 | * --------+--------+--------+-------- | ||
216 | * buffer+2|buffer+1|buffer+0|slave_addr | ||
217 | */ | ||
218 | |||
219 | data = ((addr << 1) | I2C_SMBUS_WRITE) << 24; | ||
220 | |||
221 | for (i = 0; i < len; i++) { | ||
222 | data >>= 8; | ||
223 | data |= buf[i] << 24; | ||
224 | if ((i & 3) == 2) | ||
225 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
226 | } | ||
227 | |||
228 | /* Write out the remaining bytes if any */ | ||
229 | shifts_left = 24 - (i & 3) * 8; | ||
230 | if (shifts_left) | ||
231 | writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA); | ||
232 | } | ||
233 | |||
234 | /* | ||
235 | * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the | ||
236 | * rd_threshold to 1). Couldn't get this to work, though. | ||
237 | */ | ||
238 | static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c) | ||
239 | { | ||
240 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | ||
241 | |||
242 | while (readl(i2c->regs + MXS_I2C_QUEUESTAT) | ||
243 | & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) { | ||
244 | if (time_after(jiffies, timeout)) | ||
245 | return -ETIMEDOUT; | ||
246 | cond_resched(); | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len) | ||
253 | { | ||
254 | u32 uninitialized_var(data); | ||
255 | int i; | ||
256 | |||
257 | for (i = 0; i < len; i++) { | ||
258 | if ((i & 3) == 0) { | ||
259 | if (mxs_i2c_wait_for_data(i2c)) | ||
260 | return -ETIMEDOUT; | ||
261 | data = readl(i2c->regs + MXS_I2C_QUEUEDATA); | ||
262 | } | ||
263 | buf[i] = data & 0xff; | ||
264 | data >>= 8; | ||
265 | } | ||
266 | |||
267 | return 0; | ||
268 | } | 153 | } |
269 | 154 | ||
270 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) | 155 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) |
@@ -432,39 +317,17 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
432 | init_completion(&i2c->cmd_complete); | 317 | init_completion(&i2c->cmd_complete); |
433 | i2c->cmd_err = 0; | 318 | i2c->cmd_err = 0; |
434 | 319 | ||
435 | if (i2c->dma_mode) { | 320 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); |
436 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); | 321 | if (ret) |
437 | if (ret) | 322 | return ret; |
438 | return ret; | ||
439 | } else { | ||
440 | if (msg->flags & I2C_M_RD) { | ||
441 | mxs_i2c_pioq_setup_read(i2c, msg->addr, | ||
442 | msg->len, flags); | ||
443 | } else { | ||
444 | mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, | ||
445 | msg->len, flags); | ||
446 | } | ||
447 | |||
448 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
449 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
450 | } | ||
451 | 323 | ||
452 | ret = wait_for_completion_timeout(&i2c->cmd_complete, | 324 | ret = wait_for_completion_timeout(&i2c->cmd_complete, |
453 | msecs_to_jiffies(1000)); | 325 | msecs_to_jiffies(1000)); |
454 | if (ret == 0) | 326 | if (ret == 0) |
455 | goto timeout; | 327 | goto timeout; |
456 | 328 | ||
457 | if (!i2c->dma_mode && !i2c->cmd_err && (msg->flags & I2C_M_RD)) { | ||
458 | ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len); | ||
459 | if (ret) | ||
460 | goto timeout; | ||
461 | } | ||
462 | |||
463 | if (i2c->cmd_err == -ENXIO) | 329 | if (i2c->cmd_err == -ENXIO) |
464 | mxs_i2c_reset(i2c); | 330 | mxs_i2c_reset(i2c); |
465 | else | ||
466 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
467 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
468 | 331 | ||
469 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); | 332 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); |
470 | 333 | ||
@@ -472,8 +335,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
472 | 335 | ||
473 | timeout: | 336 | timeout: |
474 | dev_dbg(i2c->dev, "Timeout!\n"); | 337 | dev_dbg(i2c->dev, "Timeout!\n"); |
475 | if (i2c->dma_mode) | 338 | mxs_i2c_dma_finish(i2c); |
476 | mxs_i2c_dma_finish(i2c); | ||
477 | mxs_i2c_reset(i2c); | 339 | mxs_i2c_reset(i2c); |
478 | return -ETIMEDOUT; | 340 | return -ETIMEDOUT; |
479 | } | 341 | } |
@@ -502,7 +364,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
502 | { | 364 | { |
503 | struct mxs_i2c_dev *i2c = dev_id; | 365 | struct mxs_i2c_dev *i2c = dev_id; |
504 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; | 366 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; |
505 | bool is_last_cmd; | ||
506 | 367 | ||
507 | if (!stat) | 368 | if (!stat) |
508 | return IRQ_NONE; | 369 | return IRQ_NONE; |
@@ -515,14 +376,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
515 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ | 376 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ |
516 | i2c->cmd_err = -EIO; | 377 | i2c->cmd_err = -EIO; |
517 | 378 | ||
518 | if (!i2c->dma_mode) { | ||
519 | is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) & | ||
520 | MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0; | ||
521 | |||
522 | if (is_last_cmd || i2c->cmd_err) | ||
523 | complete(&i2c->cmd_complete); | ||
524 | } | ||
525 | |||
526 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); | 379 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); |
527 | 380 | ||
528 | return IRQ_HANDLED; | 381 | return IRQ_HANDLED; |
@@ -556,23 +409,14 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) | |||
556 | int ret; | 409 | int ret; |
557 | 410 | ||
558 | /* | 411 | /* |
559 | * The MXS I2C DMA mode is prefered and enabled by default. | ||
560 | * The PIO mode is still supported, but should be used only | ||
561 | * for debuging purposes etc. | ||
562 | */ | ||
563 | i2c->dma_mode = !use_pioqueue; | ||
564 | if (!i2c->dma_mode) | ||
565 | dev_info(dev, "Using PIOQUEUE mode for I2C transfers!\n"); | ||
566 | |||
567 | /* | ||
568 | * TODO: This is a temporary solution and should be changed | 412 | * TODO: This is a temporary solution and should be changed |
569 | * to use generic DMA binding later when the helpers get in. | 413 | * to use generic DMA binding later when the helpers get in. |
570 | */ | 414 | */ |
571 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", | 415 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", |
572 | &i2c->dma_channel); | 416 | &i2c->dma_channel); |
573 | if (ret) { | 417 | if (ret) { |
574 | dev_warn(dev, "Failed to get DMA channel, using PIOQUEUE!\n"); | 418 | dev_err(dev, "Failed to get DMA channel!\n"); |
575 | i2c->dma_mode = 0; | 419 | return -ENODEV; |
576 | } | 420 | } |
577 | 421 | ||
578 | ret = of_property_read_u32(node, "clock-frequency", &speed); | 422 | ret = of_property_read_u32(node, "clock-frequency", &speed); |
@@ -634,15 +478,13 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) | |||
634 | } | 478 | } |
635 | 479 | ||
636 | /* Setup the DMA */ | 480 | /* Setup the DMA */ |
637 | if (i2c->dma_mode) { | 481 | dma_cap_zero(mask); |
638 | dma_cap_zero(mask); | 482 | dma_cap_set(DMA_SLAVE, mask); |
639 | dma_cap_set(DMA_SLAVE, mask); | 483 | i2c->dma_data.chan_irq = dmairq; |
640 | i2c->dma_data.chan_irq = dmairq; | 484 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); |
641 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); | 485 | if (!i2c->dmach) { |
642 | if (!i2c->dmach) { | 486 | dev_err(dev, "Failed to request dma\n"); |
643 | dev_err(dev, "Failed to request dma\n"); | 487 | return -ENODEV; |
644 | return -ENODEV; | ||
645 | } | ||
646 | } | 488 | } |
647 | 489 | ||
648 | platform_set_drvdata(pdev, i2c); | 490 | platform_set_drvdata(pdev, i2c); |
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 698d7acb0f08..02c3115a2dfa 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c | |||
@@ -644,7 +644,11 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
644 | 644 | ||
645 | pm_runtime_get_sync(&dev->adev->dev); | 645 | pm_runtime_get_sync(&dev->adev->dev); |
646 | 646 | ||
647 | clk_enable(dev->clk); | 647 | status = clk_prepare_enable(dev->clk); |
648 | if (status) { | ||
649 | dev_err(&dev->adev->dev, "can't prepare_enable clock\n"); | ||
650 | goto out_clk; | ||
651 | } | ||
648 | 652 | ||
649 | status = init_hw(dev); | 653 | status = init_hw(dev); |
650 | if (status) | 654 | if (status) |
@@ -671,7 +675,8 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
671 | } | 675 | } |
672 | 676 | ||
673 | out: | 677 | out: |
674 | clk_disable(dev->clk); | 678 | clk_disable_unprepare(dev->clk); |
679 | out_clk: | ||
675 | pm_runtime_put_sync(&dev->adev->dev); | 680 | pm_runtime_put_sync(&dev->adev->dev); |
676 | 681 | ||
677 | dev->busy = false; | 682 | dev->busy = false; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index f981ac4e6783..dcea77bf6f50 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -742,7 +742,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) | |||
742 | } | 742 | } |
743 | 743 | ||
744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, | 744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, |
745 | tegra_i2c_isr, 0, pdev->name, i2c_dev); | 745 | tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); |
746 | if (ret) { | 746 | if (ret) { |
747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); | 747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); |
748 | return ret; | 748 | return ret; |
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index b4b65af8612a..de0874054e9f 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig | |||
@@ -335,6 +335,7 @@ config KEYBOARD_LOCOMO | |||
335 | config KEYBOARD_LPC32XX | 335 | config KEYBOARD_LPC32XX |
336 | tristate "LPC32XX matrix key scanner support" | 336 | tristate "LPC32XX matrix key scanner support" |
337 | depends on ARCH_LPC32XX && OF | 337 | depends on ARCH_LPC32XX && OF |
338 | select INPUT_MATRIXKMAP | ||
338 | help | 339 | help |
339 | Say Y here if you want to use NXP LPC32XX SoC key scanner interface, | 340 | Say Y here if you want to use NXP LPC32XX SoC key scanner interface, |
340 | connected to a key matrix. | 341 | connected to a key matrix. |
diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c index 803ff6fe021e..cad9d5dd5973 100644 --- a/drivers/input/keyboard/pxa27x_keypad.c +++ b/drivers/input/keyboard/pxa27x_keypad.c | |||
@@ -368,6 +368,9 @@ static void pxa27x_keypad_config(struct pxa27x_keypad *keypad) | |||
368 | unsigned int mask = 0, direct_key_num = 0; | 368 | unsigned int mask = 0, direct_key_num = 0; |
369 | unsigned long kpc = 0; | 369 | unsigned long kpc = 0; |
370 | 370 | ||
371 | /* clear pending interrupt bit */ | ||
372 | keypad_readl(KPC); | ||
373 | |||
371 | /* enable matrix keys with automatic scan */ | 374 | /* enable matrix keys with automatic scan */ |
372 | if (pdata->matrix_key_rows && pdata->matrix_key_cols) { | 375 | if (pdata->matrix_key_rows && pdata->matrix_key_cols) { |
373 | kpc |= KPC_ASACT | KPC_MIE | KPC_ME | KPC_MS_ALL; | 376 | kpc |= KPC_ASACT | KPC_MIE | KPC_ME | KPC_MS_ALL; |
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index 2c1e12bf2ab4..858ad446de91 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
@@ -391,7 +391,7 @@ static int wacom_parse_hid(struct usb_interface *intf, | |||
391 | features->pktlen = WACOM_PKGLEN_TPC2FG; | 391 | features->pktlen = WACOM_PKGLEN_TPC2FG; |
392 | } | 392 | } |
393 | 393 | ||
394 | if (features->type == MTSCREEN || WACOM_24HDT) | 394 | if (features->type == MTSCREEN || features->type == WACOM_24HDT) |
395 | features->pktlen = WACOM_PKGLEN_MTOUCH; | 395 | features->pktlen = WACOM_PKGLEN_MTOUCH; |
396 | 396 | ||
397 | if (features->type == BAMBOO_PT) { | 397 | if (features->type == BAMBOO_PT) { |
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index aa6010131179..0a67031ffc13 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
@@ -1518,6 +1518,9 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
1518 | 1518 | ||
1519 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); | 1519 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); |
1520 | input_set_abs_params(input_dev, ABS_THROTTLE, 0, 71, 0, 0); | 1520 | input_set_abs_params(input_dev, ABS_THROTTLE, 0, 71, 0, 0); |
1521 | |||
1522 | __set_bit(INPUT_PROP_DIRECT, input_dev->propbit); | ||
1523 | |||
1521 | wacom_setup_cintiq(wacom_wac); | 1524 | wacom_setup_cintiq(wacom_wac); |
1522 | break; | 1525 | break; |
1523 | 1526 | ||
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 1ba232cbc09d..f7668b24c378 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig | |||
@@ -239,7 +239,7 @@ config TOUCHSCREEN_EETI | |||
239 | 239 | ||
240 | config TOUCHSCREEN_EGALAX | 240 | config TOUCHSCREEN_EGALAX |
241 | tristate "EETI eGalax multi-touch panel support" | 241 | tristate "EETI eGalax multi-touch panel support" |
242 | depends on I2C | 242 | depends on I2C && OF |
243 | help | 243 | help |
244 | Say Y here to enable support for I2C connected EETI | 244 | Say Y here to enable support for I2C connected EETI |
245 | eGalax multi-touch panels. | 245 | eGalax multi-touch panels. |
diff --git a/drivers/input/touchscreen/egalax_ts.c b/drivers/input/touchscreen/egalax_ts.c index c1e3460f1195..13fa62fdfb0b 100644 --- a/drivers/input/touchscreen/egalax_ts.c +++ b/drivers/input/touchscreen/egalax_ts.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
30 | #include <linux/input/mt.h> | 30 | #include <linux/input/mt.h> |
31 | #include <linux/of_gpio.h> | ||
31 | 32 | ||
32 | /* | 33 | /* |
33 | * Mouse Mode: some panel may configure the controller to mouse mode, | 34 | * Mouse Mode: some panel may configure the controller to mouse mode, |
@@ -122,9 +123,17 @@ static irqreturn_t egalax_ts_interrupt(int irq, void *dev_id) | |||
122 | /* wake up controller by an falling edge of interrupt gpio. */ | 123 | /* wake up controller by an falling edge of interrupt gpio. */ |
123 | static int egalax_wake_up_device(struct i2c_client *client) | 124 | static int egalax_wake_up_device(struct i2c_client *client) |
124 | { | 125 | { |
125 | int gpio = irq_to_gpio(client->irq); | 126 | struct device_node *np = client->dev.of_node; |
127 | int gpio; | ||
126 | int ret; | 128 | int ret; |
127 | 129 | ||
130 | if (!np) | ||
131 | return -ENODEV; | ||
132 | |||
133 | gpio = of_get_named_gpio(np, "wakeup-gpios", 0); | ||
134 | if (!gpio_is_valid(gpio)) | ||
135 | return -ENODEV; | ||
136 | |||
128 | ret = gpio_request(gpio, "egalax_irq"); | 137 | ret = gpio_request(gpio, "egalax_irq"); |
129 | if (ret < 0) { | 138 | if (ret < 0) { |
130 | dev_err(&client->dev, | 139 | dev_err(&client->dev, |
@@ -181,7 +190,11 @@ static int __devinit egalax_ts_probe(struct i2c_client *client, | |||
181 | ts->input_dev = input_dev; | 190 | ts->input_dev = input_dev; |
182 | 191 | ||
183 | /* controller may be in sleep, wake it up. */ | 192 | /* controller may be in sleep, wake it up. */ |
184 | egalax_wake_up_device(client); | 193 | error = egalax_wake_up_device(client); |
194 | if (error) { | ||
195 | dev_err(&client->dev, "Failed to wake up the controller\n"); | ||
196 | goto err_free_dev; | ||
197 | } | ||
185 | 198 | ||
186 | ret = egalax_firmware_version(client); | 199 | ret = egalax_firmware_version(client); |
187 | if (ret < 0) { | 200 | if (ret < 0) { |
@@ -274,11 +287,17 @@ static int egalax_ts_resume(struct device *dev) | |||
274 | 287 | ||
275 | static SIMPLE_DEV_PM_OPS(egalax_ts_pm_ops, egalax_ts_suspend, egalax_ts_resume); | 288 | static SIMPLE_DEV_PM_OPS(egalax_ts_pm_ops, egalax_ts_suspend, egalax_ts_resume); |
276 | 289 | ||
290 | static struct of_device_id egalax_ts_dt_ids[] = { | ||
291 | { .compatible = "eeti,egalax_ts" }, | ||
292 | { /* sentinel */ } | ||
293 | }; | ||
294 | |||
277 | static struct i2c_driver egalax_ts_driver = { | 295 | static struct i2c_driver egalax_ts_driver = { |
278 | .driver = { | 296 | .driver = { |
279 | .name = "egalax_ts", | 297 | .name = "egalax_ts", |
280 | .owner = THIS_MODULE, | 298 | .owner = THIS_MODULE, |
281 | .pm = &egalax_ts_pm_ops, | 299 | .pm = &egalax_ts_pm_ops, |
300 | .of_match_table = of_match_ptr(egalax_ts_dt_ids), | ||
282 | }, | 301 | }, |
283 | .id_table = egalax_ts_id, | 302 | .id_table = egalax_ts_id, |
284 | .probe = egalax_ts_probe, | 303 | .probe = egalax_ts_probe, |
diff --git a/drivers/input/touchscreen/tsc40.c b/drivers/input/touchscreen/tsc40.c index 63209aaa55f0..eb96f168fb9d 100644 --- a/drivers/input/touchscreen/tsc40.c +++ b/drivers/input/touchscreen/tsc40.c | |||
@@ -107,7 +107,6 @@ static int tsc_connect(struct serio *serio, struct serio_driver *drv) | |||
107 | __set_bit(BTN_TOUCH, input_dev->keybit); | 107 | __set_bit(BTN_TOUCH, input_dev->keybit); |
108 | input_set_abs_params(ptsc->dev, ABS_X, 0, 0x3ff, 0, 0); | 108 | input_set_abs_params(ptsc->dev, ABS_X, 0, 0x3ff, 0, 0); |
109 | input_set_abs_params(ptsc->dev, ABS_Y, 0, 0x3ff, 0, 0); | 109 | input_set_abs_params(ptsc->dev, ABS_Y, 0, 0x3ff, 0, 0); |
110 | input_set_abs_params(ptsc->dev, ABS_PRESSURE, 0, 0, 0, 0); | ||
111 | 110 | ||
112 | serio_set_drvdata(serio, ptsc); | 111 | serio_set_drvdata(serio, ptsc); |
113 | 112 | ||
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index dc15d248443f..ef8d2a080d17 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c | |||
@@ -1060,7 +1060,7 @@ static ssize_t bonding_store_primary(struct device *d, | |||
1060 | goto out; | 1060 | goto out; |
1061 | } | 1061 | } |
1062 | 1062 | ||
1063 | sscanf(buf, "%16s", ifname); /* IFNAMSIZ */ | 1063 | sscanf(buf, "%15s", ifname); /* IFNAMSIZ */ |
1064 | 1064 | ||
1065 | /* check to see if we are clearing primary */ | 1065 | /* check to see if we are clearing primary */ |
1066 | if (!strlen(ifname) || buf[0] == '\n') { | 1066 | if (!strlen(ifname) || buf[0] == '\n') { |
@@ -1237,7 +1237,7 @@ static ssize_t bonding_store_active_slave(struct device *d, | |||
1237 | goto out; | 1237 | goto out; |
1238 | } | 1238 | } |
1239 | 1239 | ||
1240 | sscanf(buf, "%16s", ifname); /* IFNAMSIZ */ | 1240 | sscanf(buf, "%15s", ifname); /* IFNAMSIZ */ |
1241 | 1241 | ||
1242 | /* check to see if we are clearing active */ | 1242 | /* check to see if we are clearing active */ |
1243 | if (!strlen(ifname) || buf[0] == '\n') { | 1243 | if (!strlen(ifname) || buf[0] == '\n') { |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index e2e45ee5df33..6dd0dd076cc5 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | |||
@@ -137,7 +137,16 @@ | |||
137 | #define LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD | 137 | #define LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD |
138 | #define LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD | 138 | #define LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD |
139 | 139 | ||
140 | 140 | #define LINK_UPDATE_MASK \ | |
141 | (LINK_STATUS_SPEED_AND_DUPLEX_MASK | \ | ||
142 | LINK_STATUS_LINK_UP | \ | ||
143 | LINK_STATUS_PHYSICAL_LINK_FLAG | \ | ||
144 | LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | \ | ||
145 | LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | \ | ||
146 | LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | \ | ||
147 | LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | \ | ||
148 | LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | \ | ||
149 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE) | ||
141 | 150 | ||
142 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 | 151 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 |
143 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 | 152 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 |
@@ -3295,6 +3304,21 @@ static void bnx2x_serdes_deassert(struct bnx2x *bp, u8 port) | |||
3295 | DEFAULT_PHY_DEV_ADDR); | 3304 | DEFAULT_PHY_DEV_ADDR); |
3296 | } | 3305 | } |
3297 | 3306 | ||
3307 | static void bnx2x_xgxs_specific_func(struct bnx2x_phy *phy, | ||
3308 | struct link_params *params, | ||
3309 | u32 action) | ||
3310 | { | ||
3311 | struct bnx2x *bp = params->bp; | ||
3312 | switch (action) { | ||
3313 | case PHY_INIT: | ||
3314 | /* Set correct devad */ | ||
3315 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0); | ||
3316 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, | ||
3317 | phy->def_md_devad); | ||
3318 | break; | ||
3319 | } | ||
3320 | } | ||
3321 | |||
3298 | static void bnx2x_xgxs_deassert(struct link_params *params) | 3322 | static void bnx2x_xgxs_deassert(struct link_params *params) |
3299 | { | 3323 | { |
3300 | struct bnx2x *bp = params->bp; | 3324 | struct bnx2x *bp = params->bp; |
@@ -3309,10 +3333,8 @@ static void bnx2x_xgxs_deassert(struct link_params *params) | |||
3309 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); | 3333 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); |
3310 | udelay(500); | 3334 | udelay(500); |
3311 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); | 3335 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); |
3312 | 3336 | bnx2x_xgxs_specific_func(¶ms->phy[INT_PHY], params, | |
3313 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + port*0x18, 0); | 3337 | PHY_INIT); |
3314 | REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, | ||
3315 | params->phy[INT_PHY].def_md_devad); | ||
3316 | } | 3338 | } |
3317 | 3339 | ||
3318 | static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, | 3340 | static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, |
@@ -3545,14 +3567,11 @@ static void bnx2x_warpcore_set_lpi_passthrough(struct bnx2x_phy *phy, | |||
3545 | static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | 3567 | static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, |
3546 | struct link_params *params, | 3568 | struct link_params *params, |
3547 | struct link_vars *vars) { | 3569 | struct link_vars *vars) { |
3548 | u16 val16 = 0, lane, i; | 3570 | u16 lane, i, cl72_ctrl, an_adv = 0; |
3571 | u16 ucode_ver; | ||
3549 | struct bnx2x *bp = params->bp; | 3572 | struct bnx2x *bp = params->bp; |
3550 | static struct bnx2x_reg_set reg_set[] = { | 3573 | static struct bnx2x_reg_set reg_set[] = { |
3551 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, | 3574 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, |
3552 | {MDIO_AN_DEVAD, MDIO_WC_REG_PAR_DET_10G_CTRL, 0}, | ||
3553 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, 0}, | ||
3554 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0xff}, | ||
3555 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0x5555}, | ||
3556 | {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0}, | 3575 | {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0}, |
3557 | {MDIO_WC_DEVAD, MDIO_WC_REG_RX66_CONTROL, 0x7415}, | 3576 | {MDIO_WC_DEVAD, MDIO_WC_REG_RX66_CONTROL, 0x7415}, |
3558 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x6190}, | 3577 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x6190}, |
@@ -3565,12 +3584,19 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3565 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | 3584 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, |
3566 | reg_set[i].val); | 3585 | reg_set[i].val); |
3567 | 3586 | ||
3587 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3588 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, &cl72_ctrl); | ||
3589 | cl72_ctrl &= 0xf8ff; | ||
3590 | cl72_ctrl |= 0x3800; | ||
3591 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3592 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, cl72_ctrl); | ||
3593 | |||
3568 | /* Check adding advertisement for 1G KX */ | 3594 | /* Check adding advertisement for 1G KX */ |
3569 | if (((vars->line_speed == SPEED_AUTO_NEG) && | 3595 | if (((vars->line_speed == SPEED_AUTO_NEG) && |
3570 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || | 3596 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || |
3571 | (vars->line_speed == SPEED_1000)) { | 3597 | (vars->line_speed == SPEED_1000)) { |
3572 | u32 addr = MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2; | 3598 | u32 addr = MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2; |
3573 | val16 |= (1<<5); | 3599 | an_adv |= (1<<5); |
3574 | 3600 | ||
3575 | /* Enable CL37 1G Parallel Detect */ | 3601 | /* Enable CL37 1G Parallel Detect */ |
3576 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, addr, 0x1); | 3602 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, addr, 0x1); |
@@ -3580,11 +3606,14 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3580 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || | 3606 | (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || |
3581 | (vars->line_speed == SPEED_10000)) { | 3607 | (vars->line_speed == SPEED_10000)) { |
3582 | /* Check adding advertisement for 10G KR */ | 3608 | /* Check adding advertisement for 10G KR */ |
3583 | val16 |= (1<<7); | 3609 | an_adv |= (1<<7); |
3584 | /* Enable 10G Parallel Detect */ | 3610 | /* Enable 10G Parallel Detect */ |
3611 | CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, | ||
3612 | MDIO_AER_BLOCK_AER_REG, 0); | ||
3613 | |||
3585 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3614 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
3586 | MDIO_WC_REG_PAR_DET_10G_CTRL, 1); | 3615 | MDIO_WC_REG_PAR_DET_10G_CTRL, 1); |
3587 | 3616 | bnx2x_set_aer_mmd(params, phy); | |
3588 | DP(NETIF_MSG_LINK, "Advertize 10G\n"); | 3617 | DP(NETIF_MSG_LINK, "Advertize 10G\n"); |
3589 | } | 3618 | } |
3590 | 3619 | ||
@@ -3604,7 +3633,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3604 | 3633 | ||
3605 | /* Advertised speeds */ | 3634 | /* Advertised speeds */ |
3606 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3635 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
3607 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); | 3636 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, an_adv); |
3608 | 3637 | ||
3609 | /* Advertised and set FEC (Forward Error Correction) */ | 3638 | /* Advertised and set FEC (Forward Error Correction) */ |
3610 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3639 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
@@ -3628,9 +3657,10 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3628 | /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 | 3657 | /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 |
3629 | */ | 3658 | */ |
3630 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | 3659 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, |
3631 | MDIO_WC_REG_UC_INFO_B1_VERSION, &val16); | 3660 | MDIO_WC_REG_UC_INFO_B1_VERSION, &ucode_ver); |
3632 | if (val16 < 0xd108) { | 3661 | if (ucode_ver < 0xd108) { |
3633 | DP(NETIF_MSG_LINK, "Enable AN KR work-around\n"); | 3662 | DP(NETIF_MSG_LINK, "Enable AN KR work-around. WC ver:0x%x\n", |
3663 | ucode_ver); | ||
3634 | vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; | 3664 | vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; |
3635 | } | 3665 | } |
3636 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, | 3666 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, |
@@ -3651,21 +3681,16 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy, | |||
3651 | struct link_vars *vars) | 3681 | struct link_vars *vars) |
3652 | { | 3682 | { |
3653 | struct bnx2x *bp = params->bp; | 3683 | struct bnx2x *bp = params->bp; |
3654 | u16 i; | 3684 | u16 val16, i, lane; |
3655 | static struct bnx2x_reg_set reg_set[] = { | 3685 | static struct bnx2x_reg_set reg_set[] = { |
3656 | /* Disable Autoneg */ | 3686 | /* Disable Autoneg */ |
3657 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, | 3687 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, |
3658 | {MDIO_AN_DEVAD, MDIO_WC_REG_PAR_DET_10G_CTRL, 0}, | ||
3659 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, | 3688 | {MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, |
3660 | 0x3f00}, | 3689 | 0x3f00}, |
3661 | {MDIO_AN_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0}, | 3690 | {MDIO_AN_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0}, |
3662 | {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, | 3691 | {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, |
3663 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL3_UP1, 0x1}, | 3692 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL3_UP1, 0x1}, |
3664 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC7, 0xa}, | 3693 | {MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC7, 0xa}, |
3665 | /* Disable CL36 PCS Tx */ | ||
3666 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0x0}, | ||
3667 | /* Double Wide Single Data Rate @ pll rate */ | ||
3668 | {MDIO_WC_DEVAD, MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0xFFFF}, | ||
3669 | /* Leave cl72 training enable, needed for KR */ | 3694 | /* Leave cl72 training enable, needed for KR */ |
3670 | {MDIO_PMA_DEVAD, | 3695 | {MDIO_PMA_DEVAD, |
3671 | MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150, | 3696 | MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150, |
@@ -3676,11 +3701,24 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy, | |||
3676 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | 3701 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, |
3677 | reg_set[i].val); | 3702 | reg_set[i].val); |
3678 | 3703 | ||
3679 | /* Leave CL72 enabled */ | 3704 | lane = bnx2x_get_warpcore_lane(phy, params); |
3680 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, | 3705 | /* Global registers */ |
3681 | MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, | 3706 | CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, |
3682 | 0x3800); | 3707 | MDIO_AER_BLOCK_AER_REG, 0); |
3708 | /* Disable CL36 PCS Tx */ | ||
3709 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3710 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16); | ||
3711 | val16 &= ~(0x0011 << lane); | ||
3712 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3713 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16); | ||
3683 | 3714 | ||
3715 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
3716 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16); | ||
3717 | val16 |= (0x0303 << (lane << 1)); | ||
3718 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
3719 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16); | ||
3720 | /* Restore AER */ | ||
3721 | bnx2x_set_aer_mmd(params, phy); | ||
3684 | /* Set speed via PMA/PMD register */ | 3722 | /* Set speed via PMA/PMD register */ |
3685 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, | 3723 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, |
3686 | MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); | 3724 | MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); |
@@ -4303,7 +4341,7 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy, | |||
4303 | struct link_params *params) | 4341 | struct link_params *params) |
4304 | { | 4342 | { |
4305 | struct bnx2x *bp = params->bp; | 4343 | struct bnx2x *bp = params->bp; |
4306 | u16 val16; | 4344 | u16 val16, lane; |
4307 | bnx2x_sfp_e3_set_transmitter(params, phy, 0); | 4345 | bnx2x_sfp_e3_set_transmitter(params, phy, 0); |
4308 | bnx2x_set_mdio_clk(bp, params->chip_id, params->port); | 4346 | bnx2x_set_mdio_clk(bp, params->chip_id, params->port); |
4309 | bnx2x_set_aer_mmd(params, phy); | 4347 | bnx2x_set_aer_mmd(params, phy); |
@@ -4340,6 +4378,30 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy, | |||
4340 | MDIO_WC_REG_XGXSBLK1_LANECTRL2, | 4378 | MDIO_WC_REG_XGXSBLK1_LANECTRL2, |
4341 | val16 & 0xff00); | 4379 | val16 & 0xff00); |
4342 | 4380 | ||
4381 | lane = bnx2x_get_warpcore_lane(phy, params); | ||
4382 | /* Disable CL36 PCS Tx */ | ||
4383 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
4384 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, &val16); | ||
4385 | val16 |= (0x11 << lane); | ||
4386 | if (phy->flags & FLAGS_WC_DUAL_MODE) | ||
4387 | val16 |= (0x22 << lane); | ||
4388 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
4389 | MDIO_WC_REG_XGXSBLK1_LANECTRL0, val16); | ||
4390 | |||
4391 | bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
4392 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, &val16); | ||
4393 | val16 &= ~(0x0303 << (lane << 1)); | ||
4394 | val16 |= (0x0101 << (lane << 1)); | ||
4395 | if (phy->flags & FLAGS_WC_DUAL_MODE) { | ||
4396 | val16 &= ~(0x0c0c << (lane << 1)); | ||
4397 | val16 |= (0x0404 << (lane << 1)); | ||
4398 | } | ||
4399 | |||
4400 | bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
4401 | MDIO_WC_REG_XGXSBLK1_LANECTRL1, val16); | ||
4402 | /* Restore AER */ | ||
4403 | bnx2x_set_aer_mmd(params, phy); | ||
4404 | |||
4343 | } | 4405 | } |
4344 | 4406 | ||
4345 | static void bnx2x_set_warpcore_loopback(struct bnx2x_phy *phy, | 4407 | static void bnx2x_set_warpcore_loopback(struct bnx2x_phy *phy, |
@@ -6296,15 +6358,7 @@ static int bnx2x_update_link_down(struct link_params *params, | |||
6296 | vars->mac_type = MAC_TYPE_NONE; | 6358 | vars->mac_type = MAC_TYPE_NONE; |
6297 | 6359 | ||
6298 | /* Update shared memory */ | 6360 | /* Update shared memory */ |
6299 | vars->link_status &= ~(LINK_STATUS_SPEED_AND_DUPLEX_MASK | | 6361 | vars->link_status &= ~LINK_UPDATE_MASK; |
6300 | LINK_STATUS_LINK_UP | | ||
6301 | LINK_STATUS_PHYSICAL_LINK_FLAG | | ||
6302 | LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | | ||
6303 | LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | | ||
6304 | LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | | ||
6305 | LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | | ||
6306 | LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | | ||
6307 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE); | ||
6308 | vars->line_speed = 0; | 6362 | vars->line_speed = 0; |
6309 | bnx2x_update_mng(params, vars->link_status); | 6363 | bnx2x_update_mng(params, vars->link_status); |
6310 | 6364 | ||
@@ -6452,6 +6506,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars) | |||
6452 | u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed; | 6506 | u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed; |
6453 | u8 active_external_phy = INT_PHY; | 6507 | u8 active_external_phy = INT_PHY; |
6454 | vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; | 6508 | vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; |
6509 | vars->link_status &= ~LINK_UPDATE_MASK; | ||
6455 | for (phy_index = INT_PHY; phy_index < params->num_phys; | 6510 | for (phy_index = INT_PHY; phy_index < params->num_phys; |
6456 | phy_index++) { | 6511 | phy_index++) { |
6457 | phy_vars[phy_index].flow_ctrl = 0; | 6512 | phy_vars[phy_index].flow_ctrl = 0; |
@@ -7579,7 +7634,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params, | |||
7579 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | 7634 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, |
7580 | struct link_params *params, | 7635 | struct link_params *params, |
7581 | u16 addr, u8 byte_cnt, | 7636 | u16 addr, u8 byte_cnt, |
7582 | u8 *o_buf) | 7637 | u8 *o_buf, u8 is_init) |
7583 | { | 7638 | { |
7584 | int rc = 0; | 7639 | int rc = 0; |
7585 | u8 i, j = 0, cnt = 0; | 7640 | u8 i, j = 0, cnt = 0; |
@@ -7596,10 +7651,10 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7596 | /* 4 byte aligned address */ | 7651 | /* 4 byte aligned address */ |
7597 | addr32 = addr & (~0x3); | 7652 | addr32 = addr & (~0x3); |
7598 | do { | 7653 | do { |
7599 | if (cnt == I2C_WA_PWR_ITER) { | 7654 | if ((!is_init) && (cnt == I2C_WA_PWR_ITER)) { |
7600 | bnx2x_warpcore_power_module(params, phy, 0); | 7655 | bnx2x_warpcore_power_module(params, phy, 0); |
7601 | /* Note that 100us are not enough here */ | 7656 | /* Note that 100us are not enough here */ |
7602 | usleep_range(1000,1000); | 7657 | usleep_range(1000, 2000); |
7603 | bnx2x_warpcore_power_module(params, phy, 1); | 7658 | bnx2x_warpcore_power_module(params, phy, 1); |
7604 | } | 7659 | } |
7605 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, | 7660 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, |
@@ -7719,7 +7774,7 @@ int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7719 | break; | 7774 | break; |
7720 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: | 7775 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: |
7721 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr, | 7776 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr, |
7722 | byte_cnt, o_buf); | 7777 | byte_cnt, o_buf, 0); |
7723 | break; | 7778 | break; |
7724 | } | 7779 | } |
7725 | return rc; | 7780 | return rc; |
@@ -7923,6 +7978,7 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7923 | 7978 | ||
7924 | { | 7979 | { |
7925 | u8 val; | 7980 | u8 val; |
7981 | int rc; | ||
7926 | struct bnx2x *bp = params->bp; | 7982 | struct bnx2x *bp = params->bp; |
7927 | u16 timeout; | 7983 | u16 timeout; |
7928 | /* Initialization time after hot-plug may take up to 300ms for | 7984 | /* Initialization time after hot-plug may take up to 300ms for |
@@ -7930,8 +7986,14 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7930 | */ | 7986 | */ |
7931 | 7987 | ||
7932 | for (timeout = 0; timeout < 60; timeout++) { | 7988 | for (timeout = 0; timeout < 60; timeout++) { |
7933 | if (bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val) | 7989 | if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) |
7934 | == 0) { | 7990 | rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, |
7991 | params, 1, | ||
7992 | 1, &val, 1); | ||
7993 | else | ||
7994 | rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, | ||
7995 | &val); | ||
7996 | if (rc == 0) { | ||
7935 | DP(NETIF_MSG_LINK, | 7997 | DP(NETIF_MSG_LINK, |
7936 | "SFP+ module initialization took %d ms\n", | 7998 | "SFP+ module initialization took %d ms\n", |
7937 | timeout * 5); | 7999 | timeout * 5); |
@@ -7939,7 +8001,8 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, | |||
7939 | } | 8001 | } |
7940 | usleep_range(5000, 10000); | 8002 | usleep_range(5000, 10000); |
7941 | } | 8003 | } |
7942 | return -EINVAL; | 8004 | rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val); |
8005 | return rc; | ||
7943 | } | 8006 | } |
7944 | 8007 | ||
7945 | static void bnx2x_8727_power_module(struct bnx2x *bp, | 8008 | static void bnx2x_8727_power_module(struct bnx2x *bp, |
@@ -10993,7 +11056,7 @@ static struct bnx2x_phy phy_xgxs = { | |||
10993 | .format_fw_ver = (format_fw_ver_t)NULL, | 11056 | .format_fw_ver = (format_fw_ver_t)NULL, |
10994 | .hw_reset = (hw_reset_t)NULL, | 11057 | .hw_reset = (hw_reset_t)NULL, |
10995 | .set_link_led = (set_link_led_t)NULL, | 11058 | .set_link_led = (set_link_led_t)NULL, |
10996 | .phy_specific_func = (phy_specific_func_t)NULL | 11059 | .phy_specific_func = (phy_specific_func_t)bnx2x_xgxs_specific_func |
10997 | }; | 11060 | }; |
10998 | static struct bnx2x_phy phy_warpcore = { | 11061 | static struct bnx2x_phy phy_warpcore = { |
10999 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, | 11062 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, |
@@ -11465,6 +11528,11 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, | |||
11465 | phy->media_type = ETH_PHY_BASE_T; | 11528 | phy->media_type = ETH_PHY_BASE_T; |
11466 | break; | 11529 | break; |
11467 | case PORT_HW_CFG_NET_SERDES_IF_XFI: | 11530 | case PORT_HW_CFG_NET_SERDES_IF_XFI: |
11531 | phy->supported &= (SUPPORTED_1000baseT_Full | | ||
11532 | SUPPORTED_10000baseT_Full | | ||
11533 | SUPPORTED_FIBRE | | ||
11534 | SUPPORTED_Pause | | ||
11535 | SUPPORTED_Asym_Pause); | ||
11468 | phy->media_type = ETH_PHY_XFP_FIBER; | 11536 | phy->media_type = ETH_PHY_XFP_FIBER; |
11469 | break; | 11537 | break; |
11470 | case PORT_HW_CFG_NET_SERDES_IF_SFI: | 11538 | case PORT_HW_CFG_NET_SERDES_IF_SFI: |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index d5648fc666bd..bd1fd3d87c24 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -6794,8 +6794,9 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
6794 | 6794 | ||
6795 | bnx2x_init_block(bp, BLOCK_DORQ, init_phase); | 6795 | bnx2x_init_block(bp, BLOCK_DORQ, init_phase); |
6796 | 6796 | ||
6797 | bnx2x_init_block(bp, BLOCK_BRB1, init_phase); | ||
6798 | |||
6797 | if (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) { | 6799 | if (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) { |
6798 | bnx2x_init_block(bp, BLOCK_BRB1, init_phase); | ||
6799 | 6800 | ||
6800 | if (IS_MF(bp)) | 6801 | if (IS_MF(bp)) |
6801 | low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); | 6802 | low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); |
@@ -11902,7 +11903,15 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
11902 | /* disable FCOE L2 queue for E1x */ | 11903 | /* disable FCOE L2 queue for E1x */ |
11903 | if (CHIP_IS_E1x(bp)) | 11904 | if (CHIP_IS_E1x(bp)) |
11904 | bp->flags |= NO_FCOE_FLAG; | 11905 | bp->flags |= NO_FCOE_FLAG; |
11905 | 11906 | /* disable FCOE for 57840 device, until FW supports it */ | |
11907 | switch (ent->driver_data) { | ||
11908 | case BCM57840_O: | ||
11909 | case BCM57840_4_10: | ||
11910 | case BCM57840_2_20: | ||
11911 | case BCM57840_MFO: | ||
11912 | case BCM57840_MF: | ||
11913 | bp->flags |= NO_FCOE_FLAG; | ||
11914 | } | ||
11906 | #endif | 11915 | #endif |
11907 | 11916 | ||
11908 | 11917 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index c1cde11b0c6d..0df1284df497 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -3416,16 +3416,6 @@ static int adap_init0_config(struct adapter *adapter, int reset) | |||
3416 | finicsum, cfcsum); | 3416 | finicsum, cfcsum); |
3417 | 3417 | ||
3418 | /* | 3418 | /* |
3419 | * If we're a pure NIC driver then disable all offloading facilities. | ||
3420 | * This will allow the firmware to optimize aspects of the hardware | ||
3421 | * configuration which will result in improved performance. | ||
3422 | */ | ||
3423 | caps_cmd.ofldcaps = 0; | ||
3424 | caps_cmd.iscsicaps = 0; | ||
3425 | caps_cmd.rdmacaps = 0; | ||
3426 | caps_cmd.fcoecaps = 0; | ||
3427 | |||
3428 | /* | ||
3429 | * And now tell the firmware to use the configuration we just loaded. | 3419 | * And now tell the firmware to use the configuration we just loaded. |
3430 | */ | 3420 | */ |
3431 | caps_cmd.op_to_write = | 3421 | caps_cmd.op_to_write = |
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c index 56b20d17d0e4..116f0e901bee 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | |||
@@ -2673,6 +2673,9 @@ static int ixgbe_get_ts_info(struct net_device *dev, | |||
2673 | case ixgbe_mac_X540: | 2673 | case ixgbe_mac_X540: |
2674 | case ixgbe_mac_82599EB: | 2674 | case ixgbe_mac_82599EB: |
2675 | info->so_timestamping = | 2675 | info->so_timestamping = |
2676 | SOF_TIMESTAMPING_TX_SOFTWARE | | ||
2677 | SOF_TIMESTAMPING_RX_SOFTWARE | | ||
2678 | SOF_TIMESTAMPING_SOFTWARE | | ||
2676 | SOF_TIMESTAMPING_TX_HARDWARE | | 2679 | SOF_TIMESTAMPING_TX_HARDWARE | |
2677 | SOF_TIMESTAMPING_RX_HARDWARE | | 2680 | SOF_TIMESTAMPING_RX_HARDWARE | |
2678 | SOF_TIMESTAMPING_RAW_HARDWARE; | 2681 | SOF_TIMESTAMPING_RAW_HARDWARE; |
diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c index 53743f7a2ca9..af8b4142088c 100644 --- a/drivers/net/ethernet/nxp/lpc_eth.c +++ b/drivers/net/ethernet/nxp/lpc_eth.c | |||
@@ -1524,6 +1524,7 @@ static int lpc_eth_drv_remove(struct platform_device *pdev) | |||
1524 | pldat->dma_buff_base_p); | 1524 | pldat->dma_buff_base_p); |
1525 | free_irq(ndev->irq, ndev); | 1525 | free_irq(ndev->irq, ndev); |
1526 | iounmap(pldat->net_base); | 1526 | iounmap(pldat->net_base); |
1527 | mdiobus_unregister(pldat->mii_bus); | ||
1527 | mdiobus_free(pldat->mii_bus); | 1528 | mdiobus_free(pldat->mii_bus); |
1528 | clk_disable(pldat->clk); | 1529 | clk_disable(pldat->clk); |
1529 | clk_put(pldat->clk); | 1530 | clk_put(pldat->clk); |
diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c index daec9b05d168..6428fcbbdd4b 100644 --- a/drivers/net/phy/mdio-bitbang.c +++ b/drivers/net/phy/mdio-bitbang.c | |||
@@ -234,6 +234,7 @@ void free_mdio_bitbang(struct mii_bus *bus) | |||
234 | struct mdiobb_ctrl *ctrl = bus->priv; | 234 | struct mdiobb_ctrl *ctrl = bus->priv; |
235 | 235 | ||
236 | module_put(ctrl->ops->owner); | 236 | module_put(ctrl->ops->owner); |
237 | mdiobus_unregister(bus); | ||
237 | mdiobus_free(bus); | 238 | mdiobus_free(bus); |
238 | } | 239 | } |
239 | EXPORT_SYMBOL(free_mdio_bitbang); | 240 | EXPORT_SYMBOL(free_mdio_bitbang); |
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c index ce9d4f2c9776..0ae1bcc6da73 100644 --- a/drivers/net/vmxnet3/vmxnet3_drv.c +++ b/drivers/net/vmxnet3/vmxnet3_drv.c | |||
@@ -744,28 +744,43 @@ vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, | |||
744 | 744 | ||
745 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 745 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
746 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | 746 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; |
747 | u32 buf_size; | ||
747 | 748 | ||
748 | tbi = tq->buf_info + tq->tx_ring.next2fill; | 749 | buf_offset = 0; |
749 | tbi->map_type = VMXNET3_MAP_PAGE; | 750 | len = skb_frag_size(frag); |
750 | tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag, | 751 | while (len) { |
751 | 0, skb_frag_size(frag), | 752 | tbi = tq->buf_info + tq->tx_ring.next2fill; |
752 | DMA_TO_DEVICE); | 753 | if (len < VMXNET3_MAX_TX_BUF_SIZE) { |
754 | buf_size = len; | ||
755 | dw2 |= len; | ||
756 | } else { | ||
757 | buf_size = VMXNET3_MAX_TX_BUF_SIZE; | ||
758 | /* spec says that for TxDesc.len, 0 == 2^14 */ | ||
759 | } | ||
760 | tbi->map_type = VMXNET3_MAP_PAGE; | ||
761 | tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag, | ||
762 | buf_offset, buf_size, | ||
763 | DMA_TO_DEVICE); | ||
753 | 764 | ||
754 | tbi->len = skb_frag_size(frag); | 765 | tbi->len = buf_size; |
755 | 766 | ||
756 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; | 767 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; |
757 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); | 768 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); |
758 | 769 | ||
759 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); | 770 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); |
760 | gdesc->dword[2] = cpu_to_le32(dw2 | skb_frag_size(frag)); | 771 | gdesc->dword[2] = cpu_to_le32(dw2); |
761 | gdesc->dword[3] = 0; | 772 | gdesc->dword[3] = 0; |
762 | 773 | ||
763 | dev_dbg(&adapter->netdev->dev, | 774 | dev_dbg(&adapter->netdev->dev, |
764 | "txd[%u]: 0x%llu %u %u\n", | 775 | "txd[%u]: 0x%llu %u %u\n", |
765 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), | 776 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), |
766 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); | 777 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); |
767 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); | 778 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); |
768 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; | 779 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; |
780 | |||
781 | len -= buf_size; | ||
782 | buf_offset += buf_size; | ||
783 | } | ||
769 | } | 784 | } |
770 | 785 | ||
771 | ctx->eop_txd = gdesc; | 786 | ctx->eop_txd = gdesc; |
@@ -886,6 +901,18 @@ vmxnet3_prepare_tso(struct sk_buff *skb, | |||
886 | } | 901 | } |
887 | } | 902 | } |
888 | 903 | ||
904 | static int txd_estimate(const struct sk_buff *skb) | ||
905 | { | ||
906 | int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; | ||
907 | int i; | ||
908 | |||
909 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | ||
910 | const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | ||
911 | |||
912 | count += VMXNET3_TXD_NEEDED(skb_frag_size(frag)); | ||
913 | } | ||
914 | return count; | ||
915 | } | ||
889 | 916 | ||
890 | /* | 917 | /* |
891 | * Transmits a pkt thru a given tq | 918 | * Transmits a pkt thru a given tq |
@@ -914,9 +941,7 @@ vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, | |||
914 | union Vmxnet3_GenericDesc tempTxDesc; | 941 | union Vmxnet3_GenericDesc tempTxDesc; |
915 | #endif | 942 | #endif |
916 | 943 | ||
917 | /* conservatively estimate # of descriptors to use */ | 944 | count = txd_estimate(skb); |
918 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + | ||
919 | skb_shinfo(skb)->nr_frags + 1; | ||
920 | 945 | ||
921 | ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP)); | 946 | ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP)); |
922 | 947 | ||
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c index 607976c00162..7b4adde93c01 100644 --- a/drivers/net/vxlan.c +++ b/drivers/net/vxlan.c | |||
@@ -816,7 +816,7 @@ static void vxlan_cleanup(unsigned long arg) | |||
816 | = container_of(p, struct vxlan_fdb, hlist); | 816 | = container_of(p, struct vxlan_fdb, hlist); |
817 | unsigned long timeout; | 817 | unsigned long timeout; |
818 | 818 | ||
819 | if (f->state == NUD_PERMANENT) | 819 | if (f->state & NUD_PERMANENT) |
820 | continue; | 820 | continue; |
821 | 821 | ||
822 | timeout = f->used + vxlan->age_interval * HZ; | 822 | timeout = f->used + vxlan->age_interval * HZ; |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 378bd70256b2..741918a2027b 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -312,6 +312,7 @@ static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc) | |||
312 | } | 312 | } |
313 | 313 | ||
314 | bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); | 314 | bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); |
315 | bf->bf_next = NULL; | ||
315 | list_del(&bf->list); | 316 | list_del(&bf->list); |
316 | 317 | ||
317 | spin_unlock_bh(&sc->tx.txbuflock); | 318 | spin_unlock_bh(&sc->tx.txbuflock); |
@@ -393,7 +394,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
393 | u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; | 394 | u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; |
394 | u32 ba[WME_BA_BMP_SIZE >> 5]; | 395 | u32 ba[WME_BA_BMP_SIZE >> 5]; |
395 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; | 396 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; |
396 | bool rc_update = true; | 397 | bool rc_update = true, isba; |
397 | struct ieee80211_tx_rate rates[4]; | 398 | struct ieee80211_tx_rate rates[4]; |
398 | struct ath_frame_info *fi; | 399 | struct ath_frame_info *fi; |
399 | int nframes; | 400 | int nframes; |
@@ -437,13 +438,17 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
437 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; | 438 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; |
438 | tid = ATH_AN_2_TID(an, tidno); | 439 | tid = ATH_AN_2_TID(an, tidno); |
439 | seq_first = tid->seq_start; | 440 | seq_first = tid->seq_start; |
441 | isba = ts->ts_flags & ATH9K_TX_BA; | ||
440 | 442 | ||
441 | /* | 443 | /* |
442 | * The hardware occasionally sends a tx status for the wrong TID. | 444 | * The hardware occasionally sends a tx status for the wrong TID. |
443 | * In this case, the BA status cannot be considered valid and all | 445 | * In this case, the BA status cannot be considered valid and all |
444 | * subframes need to be retransmitted | 446 | * subframes need to be retransmitted |
447 | * | ||
448 | * Only BlockAcks have a TID and therefore normal Acks cannot be | ||
449 | * checked | ||
445 | */ | 450 | */ |
446 | if (tidno != ts->tid) | 451 | if (isba && tidno != ts->tid) |
447 | txok = false; | 452 | txok = false; |
448 | 453 | ||
449 | isaggr = bf_isaggr(bf); | 454 | isaggr = bf_isaggr(bf); |
@@ -1774,6 +1779,7 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, | |||
1774 | list_add_tail(&bf->list, &bf_head); | 1779 | list_add_tail(&bf->list, &bf_head); |
1775 | bf->bf_state.bf_type = 0; | 1780 | bf->bf_state.bf_type = 0; |
1776 | 1781 | ||
1782 | bf->bf_next = NULL; | ||
1777 | bf->bf_lastbf = bf; | 1783 | bf->bf_lastbf = bf; |
1778 | ath_tx_fill_desc(sc, bf, txq, fi->framelen); | 1784 | ath_tx_fill_desc(sc, bf, txq, fi->framelen); |
1779 | ath_tx_txqaddbuf(sc, txq, &bf_head, false); | 1785 | ath_tx_txqaddbuf(sc, txq, &bf_head, false); |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 01dc8891070c..59474ae0aec0 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -2449,7 +2449,7 @@ static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev) | |||
2449 | /* | 2449 | /* |
2450 | * Check if temperature compensation is supported. | 2450 | * Check if temperature compensation is supported. |
2451 | */ | 2451 | */ |
2452 | if (tssi_bounds[4] == 0xff) | 2452 | if (tssi_bounds[4] == 0xff || step == 0xff) |
2453 | return 0; | 2453 | return 0; |
2454 | 2454 | ||
2455 | /* | 2455 | /* |
diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c index d6ce2182e672..035c2c762537 100644 --- a/drivers/target/iscsi/iscsi_target.c +++ b/drivers/target/iscsi/iscsi_target.c | |||
@@ -3719,7 +3719,9 @@ restart: | |||
3719 | */ | 3719 | */ |
3720 | iscsit_thread_check_cpumask(conn, current, 1); | 3720 | iscsit_thread_check_cpumask(conn, current, 1); |
3721 | 3721 | ||
3722 | schedule_timeout_interruptible(MAX_SCHEDULE_TIMEOUT); | 3722 | wait_event_interruptible(conn->queues_wq, |
3723 | !iscsit_conn_all_queues_empty(conn) || | ||
3724 | ts->status == ISCSI_THREAD_SET_RESET); | ||
3723 | 3725 | ||
3724 | if ((ts->status == ISCSI_THREAD_SET_RESET) || | 3726 | if ((ts->status == ISCSI_THREAD_SET_RESET) || |
3725 | signal_pending(current)) | 3727 | signal_pending(current)) |
diff --git a/drivers/target/iscsi/iscsi_target_core.h b/drivers/target/iscsi/iscsi_target_core.h index 2ba9f9b9435c..21048dbf7d13 100644 --- a/drivers/target/iscsi/iscsi_target_core.h +++ b/drivers/target/iscsi/iscsi_target_core.h | |||
@@ -486,6 +486,7 @@ struct iscsi_tmr_req { | |||
486 | }; | 486 | }; |
487 | 487 | ||
488 | struct iscsi_conn { | 488 | struct iscsi_conn { |
489 | wait_queue_head_t queues_wq; | ||
489 | /* Authentication Successful for this connection */ | 490 | /* Authentication Successful for this connection */ |
490 | u8 auth_complete; | 491 | u8 auth_complete; |
491 | /* State connection is currently in */ | 492 | /* State connection is currently in */ |
diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c index cdc8a10939c3..f8dbec05d5e5 100644 --- a/drivers/target/iscsi/iscsi_target_login.c +++ b/drivers/target/iscsi/iscsi_target_login.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | static int iscsi_login_init_conn(struct iscsi_conn *conn) | 42 | static int iscsi_login_init_conn(struct iscsi_conn *conn) |
43 | { | 43 | { |
44 | init_waitqueue_head(&conn->queues_wq); | ||
44 | INIT_LIST_HEAD(&conn->conn_list); | 45 | INIT_LIST_HEAD(&conn->conn_list); |
45 | INIT_LIST_HEAD(&conn->conn_cmd_list); | 46 | INIT_LIST_HEAD(&conn->conn_cmd_list); |
46 | INIT_LIST_HEAD(&conn->immed_queue_list); | 47 | INIT_LIST_HEAD(&conn->immed_queue_list); |
diff --git a/drivers/target/iscsi/iscsi_target_util.c b/drivers/target/iscsi/iscsi_target_util.c index afd98ccd40ae..1a91195ab619 100644 --- a/drivers/target/iscsi/iscsi_target_util.c +++ b/drivers/target/iscsi/iscsi_target_util.c | |||
@@ -488,7 +488,7 @@ void iscsit_add_cmd_to_immediate_queue( | |||
488 | atomic_set(&conn->check_immediate_queue, 1); | 488 | atomic_set(&conn->check_immediate_queue, 1); |
489 | spin_unlock_bh(&conn->immed_queue_lock); | 489 | spin_unlock_bh(&conn->immed_queue_lock); |
490 | 490 | ||
491 | wake_up_process(conn->thread_set->tx_thread); | 491 | wake_up(&conn->queues_wq); |
492 | } | 492 | } |
493 | 493 | ||
494 | struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_conn *conn) | 494 | struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_conn *conn) |
@@ -562,7 +562,7 @@ void iscsit_add_cmd_to_response_queue( | |||
562 | atomic_inc(&cmd->response_queue_count); | 562 | atomic_inc(&cmd->response_queue_count); |
563 | spin_unlock_bh(&conn->response_queue_lock); | 563 | spin_unlock_bh(&conn->response_queue_lock); |
564 | 564 | ||
565 | wake_up_process(conn->thread_set->tx_thread); | 565 | wake_up(&conn->queues_wq); |
566 | } | 566 | } |
567 | 567 | ||
568 | struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *conn) | 568 | struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *conn) |
@@ -616,6 +616,24 @@ static void iscsit_remove_cmd_from_response_queue( | |||
616 | } | 616 | } |
617 | } | 617 | } |
618 | 618 | ||
619 | bool iscsit_conn_all_queues_empty(struct iscsi_conn *conn) | ||
620 | { | ||
621 | bool empty; | ||
622 | |||
623 | spin_lock_bh(&conn->immed_queue_lock); | ||
624 | empty = list_empty(&conn->immed_queue_list); | ||
625 | spin_unlock_bh(&conn->immed_queue_lock); | ||
626 | |||
627 | if (!empty) | ||
628 | return empty; | ||
629 | |||
630 | spin_lock_bh(&conn->response_queue_lock); | ||
631 | empty = list_empty(&conn->response_queue_list); | ||
632 | spin_unlock_bh(&conn->response_queue_lock); | ||
633 | |||
634 | return empty; | ||
635 | } | ||
636 | |||
619 | void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *conn) | 637 | void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *conn) |
620 | { | 638 | { |
621 | struct iscsi_queue_req *qr, *qr_tmp; | 639 | struct iscsi_queue_req *qr, *qr_tmp; |
diff --git a/drivers/target/iscsi/iscsi_target_util.h b/drivers/target/iscsi/iscsi_target_util.h index 44054bd35437..894d0f837924 100644 --- a/drivers/target/iscsi/iscsi_target_util.h +++ b/drivers/target/iscsi/iscsi_target_util.h | |||
@@ -25,6 +25,7 @@ extern struct iscsi_queue_req *iscsit_get_cmd_from_immediate_queue(struct iscsi_ | |||
25 | extern void iscsit_add_cmd_to_response_queue(struct iscsi_cmd *, struct iscsi_conn *, u8); | 25 | extern void iscsit_add_cmd_to_response_queue(struct iscsi_cmd *, struct iscsi_conn *, u8); |
26 | extern struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *); | 26 | extern struct iscsi_queue_req *iscsit_get_cmd_from_response_queue(struct iscsi_conn *); |
27 | extern void iscsit_remove_cmd_from_tx_queues(struct iscsi_cmd *, struct iscsi_conn *); | 27 | extern void iscsit_remove_cmd_from_tx_queues(struct iscsi_cmd *, struct iscsi_conn *); |
28 | extern bool iscsit_conn_all_queues_empty(struct iscsi_conn *); | ||
28 | extern void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *); | 29 | extern void iscsit_free_queue_reqs_for_conn(struct iscsi_conn *); |
29 | extern void iscsit_release_cmd(struct iscsi_cmd *); | 30 | extern void iscsit_release_cmd(struct iscsi_cmd *); |
30 | extern void iscsit_free_cmd(struct iscsi_cmd *); | 31 | extern void iscsit_free_cmd(struct iscsi_cmd *); |
diff --git a/drivers/target/target_core_configfs.c b/drivers/target/target_core_configfs.c index 015f5be27bf6..c123327499a3 100644 --- a/drivers/target/target_core_configfs.c +++ b/drivers/target/target_core_configfs.c | |||
@@ -3206,7 +3206,8 @@ static int __init target_core_init_configfs(void) | |||
3206 | if (ret < 0) | 3206 | if (ret < 0) |
3207 | goto out; | 3207 | goto out; |
3208 | 3208 | ||
3209 | if (core_dev_setup_virtual_lun0() < 0) | 3209 | ret = core_dev_setup_virtual_lun0(); |
3210 | if (ret < 0) | ||
3210 | goto out; | 3211 | goto out; |
3211 | 3212 | ||
3212 | return 0; | 3213 | return 0; |
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c index 8d774da16320..9abef9f8eb76 100644 --- a/drivers/target/target_core_device.c +++ b/drivers/target/target_core_device.c | |||
@@ -850,20 +850,20 @@ int se_dev_check_shutdown(struct se_device *dev) | |||
850 | 850 | ||
851 | static u32 se_dev_align_max_sectors(u32 max_sectors, u32 block_size) | 851 | static u32 se_dev_align_max_sectors(u32 max_sectors, u32 block_size) |
852 | { | 852 | { |
853 | u32 tmp, aligned_max_sectors; | 853 | u32 aligned_max_sectors; |
854 | u32 alignment; | ||
854 | /* | 855 | /* |
855 | * Limit max_sectors to a PAGE_SIZE aligned value for modern | 856 | * Limit max_sectors to a PAGE_SIZE aligned value for modern |
856 | * transport_allocate_data_tasks() operation. | 857 | * transport_allocate_data_tasks() operation. |
857 | */ | 858 | */ |
858 | tmp = rounddown((max_sectors * block_size), PAGE_SIZE); | 859 | alignment = max(1ul, PAGE_SIZE / block_size); |
859 | aligned_max_sectors = (tmp / block_size); | 860 | aligned_max_sectors = rounddown(max_sectors, alignment); |
860 | if (max_sectors != aligned_max_sectors) { | 861 | |
861 | printk(KERN_INFO "Rounding down aligned max_sectors from %u" | 862 | if (max_sectors != aligned_max_sectors) |
862 | " to %u\n", max_sectors, aligned_max_sectors); | 863 | pr_info("Rounding down aligned max_sectors from %u to %u\n", |
863 | return aligned_max_sectors; | 864 | max_sectors, aligned_max_sectors); |
864 | } | ||
865 | 865 | ||
866 | return max_sectors; | 866 | return aligned_max_sectors; |
867 | } | 867 | } |
868 | 868 | ||
869 | void se_dev_set_default_attribs( | 869 | void se_dev_set_default_attribs( |
diff --git a/drivers/target/target_core_spc.c b/drivers/target/target_core_spc.c index 9229bd9ad61b..6fd434d3d7e4 100644 --- a/drivers/target/target_core_spc.c +++ b/drivers/target/target_core_spc.c | |||
@@ -605,6 +605,8 @@ static int spc_emulate_inquiry(struct se_cmd *cmd) | |||
605 | unsigned char buf[SE_INQUIRY_BUF]; | 605 | unsigned char buf[SE_INQUIRY_BUF]; |
606 | int p, ret; | 606 | int p, ret; |
607 | 607 | ||
608 | memset(buf, 0, SE_INQUIRY_BUF); | ||
609 | |||
608 | if (dev == tpg->tpg_virt_lun0.lun_se_dev) | 610 | if (dev == tpg->tpg_virt_lun0.lun_se_dev) |
609 | buf[0] = 0x3f; /* Not connected */ | 611 | buf[0] = 0x3f; /* Not connected */ |
610 | else | 612 | else |
diff --git a/drivers/target/target_core_tmr.c b/drivers/target/target_core_tmr.c index 1c59a3c23b2c..be75c4331a92 100644 --- a/drivers/target/target_core_tmr.c +++ b/drivers/target/target_core_tmr.c | |||
@@ -140,15 +140,15 @@ void core_tmr_abort_task( | |||
140 | printk("ABORT_TASK: Found referenced %s task_tag: %u\n", | 140 | printk("ABORT_TASK: Found referenced %s task_tag: %u\n", |
141 | se_cmd->se_tfo->get_fabric_name(), ref_tag); | 141 | se_cmd->se_tfo->get_fabric_name(), ref_tag); |
142 | 142 | ||
143 | spin_lock_irq(&se_cmd->t_state_lock); | 143 | spin_lock(&se_cmd->t_state_lock); |
144 | if (se_cmd->transport_state & CMD_T_COMPLETE) { | 144 | if (se_cmd->transport_state & CMD_T_COMPLETE) { |
145 | printk("ABORT_TASK: ref_tag: %u already complete, skipping\n", ref_tag); | 145 | printk("ABORT_TASK: ref_tag: %u already complete, skipping\n", ref_tag); |
146 | spin_unlock_irq(&se_cmd->t_state_lock); | 146 | spin_unlock(&se_cmd->t_state_lock); |
147 | spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); | 147 | spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); |
148 | goto out; | 148 | goto out; |
149 | } | 149 | } |
150 | se_cmd->transport_state |= CMD_T_ABORTED; | 150 | se_cmd->transport_state |= CMD_T_ABORTED; |
151 | spin_unlock_irq(&se_cmd->t_state_lock); | 151 | spin_unlock(&se_cmd->t_state_lock); |
152 | 152 | ||
153 | list_del_init(&se_cmd->se_cmd_list); | 153 | list_del_init(&se_cmd->se_cmd_list); |
154 | kref_get(&se_cmd->cmd_kref); | 154 | kref_get(&se_cmd->cmd_kref); |
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index f8cd4cf3fad8..7d5b6000378b 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h | |||
@@ -2652,6 +2652,15 @@ unsigned int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb); | |||
2652 | unsigned int __attribute_const__ ieee80211_hdrlen(__le16 fc); | 2652 | unsigned int __attribute_const__ ieee80211_hdrlen(__le16 fc); |
2653 | 2653 | ||
2654 | /** | 2654 | /** |
2655 | * ieee80211_get_mesh_hdrlen - get mesh extension header length | ||
2656 | * @meshhdr: the mesh extension header, only the flags field | ||
2657 | * (first byte) will be accessed | ||
2658 | * Returns the length of the extension header, which is always at | ||
2659 | * least 6 bytes and at most 18 if address 5 and 6 are present. | ||
2660 | */ | ||
2661 | unsigned int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr); | ||
2662 | |||
2663 | /** | ||
2655 | * DOC: Data path helpers | 2664 | * DOC: Data path helpers |
2656 | * | 2665 | * |
2657 | * In addition to generic utilities, cfg80211 also offers | 2666 | * In addition to generic utilities, cfg80211 also offers |
diff --git a/net/ipv4/netfilter/iptable_nat.c b/net/ipv4/netfilter/iptable_nat.c index 9e0ffaf1d942..a82047282dbb 100644 --- a/net/ipv4/netfilter/iptable_nat.c +++ b/net/ipv4/netfilter/iptable_nat.c | |||
@@ -184,7 +184,8 @@ nf_nat_ipv4_out(unsigned int hooknum, | |||
184 | 184 | ||
185 | if ((ct->tuplehash[dir].tuple.src.u3.ip != | 185 | if ((ct->tuplehash[dir].tuple.src.u3.ip != |
186 | ct->tuplehash[!dir].tuple.dst.u3.ip) || | 186 | ct->tuplehash[!dir].tuple.dst.u3.ip) || |
187 | (ct->tuplehash[dir].tuple.src.u.all != | 187 | (ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMP && |
188 | ct->tuplehash[dir].tuple.src.u.all != | ||
188 | ct->tuplehash[!dir].tuple.dst.u.all)) | 189 | ct->tuplehash[!dir].tuple.dst.u.all)) |
189 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) | 190 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) |
190 | ret = NF_DROP; | 191 | ret = NF_DROP; |
@@ -221,6 +222,7 @@ nf_nat_ipv4_local_fn(unsigned int hooknum, | |||
221 | } | 222 | } |
222 | #ifdef CONFIG_XFRM | 223 | #ifdef CONFIG_XFRM |
223 | else if (!(IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED) && | 224 | else if (!(IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED) && |
225 | ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMP && | ||
224 | ct->tuplehash[dir].tuple.dst.u.all != | 226 | ct->tuplehash[dir].tuple.dst.u.all != |
225 | ct->tuplehash[!dir].tuple.src.u.all) | 227 | ct->tuplehash[!dir].tuple.src.u.all) |
226 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) | 228 | if (nf_xfrm_me_harder(skb, AF_INET) < 0) |
diff --git a/net/ipv4/tcp_illinois.c b/net/ipv4/tcp_illinois.c index 813b43a76fec..834857f3c871 100644 --- a/net/ipv4/tcp_illinois.c +++ b/net/ipv4/tcp_illinois.c | |||
@@ -313,11 +313,13 @@ static void tcp_illinois_info(struct sock *sk, u32 ext, | |||
313 | .tcpv_rttcnt = ca->cnt_rtt, | 313 | .tcpv_rttcnt = ca->cnt_rtt, |
314 | .tcpv_minrtt = ca->base_rtt, | 314 | .tcpv_minrtt = ca->base_rtt, |
315 | }; | 315 | }; |
316 | u64 t = ca->sum_rtt; | ||
317 | 316 | ||
318 | do_div(t, ca->cnt_rtt); | 317 | if (info.tcpv_rttcnt > 0) { |
319 | info.tcpv_rtt = t; | 318 | u64 t = ca->sum_rtt; |
320 | 319 | ||
320 | do_div(t, info.tcpv_rttcnt); | ||
321 | info.tcpv_rtt = t; | ||
322 | } | ||
321 | nla_put(skb, INET_DIAG_VEGASINFO, sizeof(info), &info); | 323 | nla_put(skb, INET_DIAG_VEGASINFO, sizeof(info), &info); |
322 | } | 324 | } |
323 | } | 325 | } |
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index 1db663983587..2c2b13a999ea 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c | |||
@@ -4529,6 +4529,9 @@ int tcp_send_rcvq(struct sock *sk, struct msghdr *msg, size_t size) | |||
4529 | struct tcphdr *th; | 4529 | struct tcphdr *th; |
4530 | bool fragstolen; | 4530 | bool fragstolen; |
4531 | 4531 | ||
4532 | if (size == 0) | ||
4533 | return 0; | ||
4534 | |||
4532 | skb = alloc_skb(size + sizeof(*th), sk->sk_allocation); | 4535 | skb = alloc_skb(size + sizeof(*th), sk->sk_allocation); |
4533 | if (!skb) | 4536 | if (!skb) |
4534 | goto err; | 4537 | goto err; |
diff --git a/net/ipv4/tcp_metrics.c b/net/ipv4/tcp_metrics.c index 4c752a6e0bcd..53bc5847bfa8 100644 --- a/net/ipv4/tcp_metrics.c +++ b/net/ipv4/tcp_metrics.c | |||
@@ -864,7 +864,7 @@ static int parse_nl_addr(struct genl_info *info, struct inetpeer_addr *addr, | |||
864 | } | 864 | } |
865 | a = info->attrs[TCP_METRICS_ATTR_ADDR_IPV6]; | 865 | a = info->attrs[TCP_METRICS_ATTR_ADDR_IPV6]; |
866 | if (a) { | 866 | if (a) { |
867 | if (nla_len(a) != sizeof(sizeof(struct in6_addr))) | 867 | if (nla_len(a) != sizeof(struct in6_addr)) |
868 | return -EINVAL; | 868 | return -EINVAL; |
869 | addr->family = AF_INET6; | 869 | addr->family = AF_INET6; |
870 | memcpy(addr->addr.a6, nla_data(a), sizeof(addr->addr.a6)); | 870 | memcpy(addr->addr.a6, nla_data(a), sizeof(addr->addr.a6)); |
diff --git a/net/ipv6/netfilter/ip6table_nat.c b/net/ipv6/netfilter/ip6table_nat.c index e418bd6350a4..d57dab17a182 100644 --- a/net/ipv6/netfilter/ip6table_nat.c +++ b/net/ipv6/netfilter/ip6table_nat.c | |||
@@ -186,7 +186,8 @@ nf_nat_ipv6_out(unsigned int hooknum, | |||
186 | 186 | ||
187 | if (!nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, | 187 | if (!nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, |
188 | &ct->tuplehash[!dir].tuple.dst.u3) || | 188 | &ct->tuplehash[!dir].tuple.dst.u3) || |
189 | (ct->tuplehash[dir].tuple.src.u.all != | 189 | (ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMPV6 && |
190 | ct->tuplehash[dir].tuple.src.u.all != | ||
190 | ct->tuplehash[!dir].tuple.dst.u.all)) | 191 | ct->tuplehash[!dir].tuple.dst.u.all)) |
191 | if (nf_xfrm_me_harder(skb, AF_INET6) < 0) | 192 | if (nf_xfrm_me_harder(skb, AF_INET6) < 0) |
192 | ret = NF_DROP; | 193 | ret = NF_DROP; |
@@ -222,6 +223,7 @@ nf_nat_ipv6_local_fn(unsigned int hooknum, | |||
222 | } | 223 | } |
223 | #ifdef CONFIG_XFRM | 224 | #ifdef CONFIG_XFRM |
224 | else if (!(IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) && | 225 | else if (!(IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) && |
226 | ct->tuplehash[dir].tuple.dst.protonum != IPPROTO_ICMPV6 && | ||
225 | ct->tuplehash[dir].tuple.dst.u.all != | 227 | ct->tuplehash[dir].tuple.dst.u.all != |
226 | ct->tuplehash[!dir].tuple.src.u.all) | 228 | ct->tuplehash[!dir].tuple.src.u.all) |
227 | if (nf_xfrm_me_harder(skb, AF_INET6)) | 229 | if (nf_xfrm_me_harder(skb, AF_INET6)) |
diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c index 18bd9bbbd1c6..22c8ea951185 100644 --- a/net/ipv6/netfilter/nf_conntrack_reasm.c +++ b/net/ipv6/netfilter/nf_conntrack_reasm.c | |||
@@ -85,7 +85,7 @@ static struct ctl_table nf_ct_frag6_sysctl_table[] = { | |||
85 | { } | 85 | { } |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static int __net_init nf_ct_frag6_sysctl_register(struct net *net) | 88 | static int nf_ct_frag6_sysctl_register(struct net *net) |
89 | { | 89 | { |
90 | struct ctl_table *table; | 90 | struct ctl_table *table; |
91 | struct ctl_table_header *hdr; | 91 | struct ctl_table_header *hdr; |
@@ -127,7 +127,7 @@ static void __net_exit nf_ct_frags6_sysctl_unregister(struct net *net) | |||
127 | } | 127 | } |
128 | 128 | ||
129 | #else | 129 | #else |
130 | static int __net_init nf_ct_frag6_sysctl_register(struct net *net) | 130 | static int nf_ct_frag6_sysctl_register(struct net *net) |
131 | { | 131 | { |
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
diff --git a/net/l2tp/l2tp_eth.c b/net/l2tp/l2tp_eth.c index 37b8b8ba31f7..76125c57ee6d 100644 --- a/net/l2tp/l2tp_eth.c +++ b/net/l2tp/l2tp_eth.c | |||
@@ -291,6 +291,7 @@ static int l2tp_eth_create(struct net *net, u32 tunnel_id, u32 session_id, u32 p | |||
291 | 291 | ||
292 | out_del_dev: | 292 | out_del_dev: |
293 | free_netdev(dev); | 293 | free_netdev(dev); |
294 | spriv->dev = NULL; | ||
294 | out_del_session: | 295 | out_del_session: |
295 | l2tp_session_delete(session); | 296 | l2tp_session_delete(session); |
296 | out: | 297 | out: |
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c index 5f3620f0bc0a..bf87c70ac6c5 100644 --- a/net/mac80211/ibss.c +++ b/net/mac80211/ibss.c | |||
@@ -1108,7 +1108,7 @@ int ieee80211_ibss_join(struct ieee80211_sub_if_data *sdata, | |||
1108 | sdata->u.ibss.state = IEEE80211_IBSS_MLME_SEARCH; | 1108 | sdata->u.ibss.state = IEEE80211_IBSS_MLME_SEARCH; |
1109 | sdata->u.ibss.ibss_join_req = jiffies; | 1109 | sdata->u.ibss.ibss_join_req = jiffies; |
1110 | 1110 | ||
1111 | memcpy(sdata->u.ibss.ssid, params->ssid, IEEE80211_MAX_SSID_LEN); | 1111 | memcpy(sdata->u.ibss.ssid, params->ssid, params->ssid_len); |
1112 | sdata->u.ibss.ssid_len = params->ssid_len; | 1112 | sdata->u.ibss.ssid_len = params->ssid_len; |
1113 | 1113 | ||
1114 | mutex_unlock(&sdata->u.ibss.mtx); | 1114 | mutex_unlock(&sdata->u.ibss.mtx); |
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c index 61c621e9273f..00ade7feb2e3 100644 --- a/net/mac80211/rx.c +++ b/net/mac80211/rx.c | |||
@@ -531,6 +531,11 @@ ieee80211_rx_mesh_check(struct ieee80211_rx_data *rx) | |||
531 | 531 | ||
532 | if (ieee80211_is_action(hdr->frame_control)) { | 532 | if (ieee80211_is_action(hdr->frame_control)) { |
533 | u8 category; | 533 | u8 category; |
534 | |||
535 | /* make sure category field is present */ | ||
536 | if (rx->skb->len < IEEE80211_MIN_ACTION_SIZE) | ||
537 | return RX_DROP_MONITOR; | ||
538 | |||
534 | mgmt = (struct ieee80211_mgmt *)hdr; | 539 | mgmt = (struct ieee80211_mgmt *)hdr; |
535 | category = mgmt->u.action.category; | 540 | category = mgmt->u.action.category; |
536 | if (category != WLAN_CATEGORY_MESH_ACTION && | 541 | if (category != WLAN_CATEGORY_MESH_ACTION && |
@@ -883,14 +888,16 @@ ieee80211_rx_h_check(struct ieee80211_rx_data *rx) | |||
883 | */ | 888 | */ |
884 | if (rx->sta && rx->sdata->vif.type == NL80211_IFTYPE_STATION && | 889 | if (rx->sta && rx->sdata->vif.type == NL80211_IFTYPE_STATION && |
885 | ieee80211_is_data_present(hdr->frame_control)) { | 890 | ieee80211_is_data_present(hdr->frame_control)) { |
886 | u16 ethertype; | 891 | unsigned int hdrlen; |
887 | u8 *payload; | 892 | __be16 ethertype; |
888 | 893 | ||
889 | payload = rx->skb->data + | 894 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
890 | ieee80211_hdrlen(hdr->frame_control); | 895 | |
891 | ethertype = (payload[6] << 8) | payload[7]; | 896 | if (rx->skb->len < hdrlen + 8) |
892 | if (cpu_to_be16(ethertype) == | 897 | return RX_DROP_MONITOR; |
893 | rx->sdata->control_port_protocol) | 898 | |
899 | skb_copy_bits(rx->skb, hdrlen + 6, ðertype, 2); | ||
900 | if (ethertype == rx->sdata->control_port_protocol) | ||
894 | return RX_CONTINUE; | 901 | return RX_CONTINUE; |
895 | } | 902 | } |
896 | 903 | ||
@@ -1462,11 +1469,14 @@ ieee80211_rx_h_defragment(struct ieee80211_rx_data *rx) | |||
1462 | 1469 | ||
1463 | hdr = (struct ieee80211_hdr *)rx->skb->data; | 1470 | hdr = (struct ieee80211_hdr *)rx->skb->data; |
1464 | fc = hdr->frame_control; | 1471 | fc = hdr->frame_control; |
1472 | |||
1473 | if (ieee80211_is_ctl(fc)) | ||
1474 | return RX_CONTINUE; | ||
1475 | |||
1465 | sc = le16_to_cpu(hdr->seq_ctrl); | 1476 | sc = le16_to_cpu(hdr->seq_ctrl); |
1466 | frag = sc & IEEE80211_SCTL_FRAG; | 1477 | frag = sc & IEEE80211_SCTL_FRAG; |
1467 | 1478 | ||
1468 | if (likely((!ieee80211_has_morefrags(fc) && frag == 0) || | 1479 | if (likely((!ieee80211_has_morefrags(fc) && frag == 0) || |
1469 | (rx->skb)->len < 24 || | ||
1470 | is_multicast_ether_addr(hdr->addr1))) { | 1480 | is_multicast_ether_addr(hdr->addr1))) { |
1471 | /* not fragmented */ | 1481 | /* not fragmented */ |
1472 | goto out; | 1482 | goto out; |
@@ -1889,6 +1899,20 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1889 | 1899 | ||
1890 | hdr = (struct ieee80211_hdr *) skb->data; | 1900 | hdr = (struct ieee80211_hdr *) skb->data; |
1891 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | 1901 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
1902 | |||
1903 | /* make sure fixed part of mesh header is there, also checks skb len */ | ||
1904 | if (!pskb_may_pull(rx->skb, hdrlen + 6)) | ||
1905 | return RX_DROP_MONITOR; | ||
1906 | |||
1907 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); | ||
1908 | |||
1909 | /* make sure full mesh header is there, also checks skb len */ | ||
1910 | if (!pskb_may_pull(rx->skb, | ||
1911 | hdrlen + ieee80211_get_mesh_hdrlen(mesh_hdr))) | ||
1912 | return RX_DROP_MONITOR; | ||
1913 | |||
1914 | /* reload pointers */ | ||
1915 | hdr = (struct ieee80211_hdr *) skb->data; | ||
1892 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); | 1916 | mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); |
1893 | 1917 | ||
1894 | /* frame is in RMC, don't forward */ | 1918 | /* frame is in RMC, don't forward */ |
@@ -1897,7 +1921,8 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1897 | mesh_rmc_check(hdr->addr3, mesh_hdr, rx->sdata)) | 1921 | mesh_rmc_check(hdr->addr3, mesh_hdr, rx->sdata)) |
1898 | return RX_DROP_MONITOR; | 1922 | return RX_DROP_MONITOR; |
1899 | 1923 | ||
1900 | if (!ieee80211_is_data(hdr->frame_control)) | 1924 | if (!ieee80211_is_data(hdr->frame_control) || |
1925 | !(status->rx_flags & IEEE80211_RX_RA_MATCH)) | ||
1901 | return RX_CONTINUE; | 1926 | return RX_CONTINUE; |
1902 | 1927 | ||
1903 | if (!mesh_hdr->ttl) | 1928 | if (!mesh_hdr->ttl) |
@@ -1911,9 +1936,12 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1911 | if (is_multicast_ether_addr(hdr->addr1)) { | 1936 | if (is_multicast_ether_addr(hdr->addr1)) { |
1912 | mpp_addr = hdr->addr3; | 1937 | mpp_addr = hdr->addr3; |
1913 | proxied_addr = mesh_hdr->eaddr1; | 1938 | proxied_addr = mesh_hdr->eaddr1; |
1914 | } else { | 1939 | } else if (mesh_hdr->flags & MESH_FLAGS_AE_A5_A6) { |
1940 | /* has_a4 already checked in ieee80211_rx_mesh_check */ | ||
1915 | mpp_addr = hdr->addr4; | 1941 | mpp_addr = hdr->addr4; |
1916 | proxied_addr = mesh_hdr->eaddr2; | 1942 | proxied_addr = mesh_hdr->eaddr2; |
1943 | } else { | ||
1944 | return RX_DROP_MONITOR; | ||
1917 | } | 1945 | } |
1918 | 1946 | ||
1919 | rcu_read_lock(); | 1947 | rcu_read_lock(); |
@@ -1941,12 +1969,9 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) | |||
1941 | } | 1969 | } |
1942 | skb_set_queue_mapping(skb, q); | 1970 | skb_set_queue_mapping(skb, q); |
1943 | 1971 | ||
1944 | if (!(status->rx_flags & IEEE80211_RX_RA_MATCH)) | ||
1945 | goto out; | ||
1946 | |||
1947 | if (!--mesh_hdr->ttl) { | 1972 | if (!--mesh_hdr->ttl) { |
1948 | IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl); | 1973 | IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl); |
1949 | return RX_DROP_MONITOR; | 1974 | goto out; |
1950 | } | 1975 | } |
1951 | 1976 | ||
1952 | if (!ifmsh->mshcfg.dot11MeshForwarding) | 1977 | if (!ifmsh->mshcfg.dot11MeshForwarding) |
@@ -2353,6 +2378,10 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx) | |||
2353 | } | 2378 | } |
2354 | break; | 2379 | break; |
2355 | case WLAN_CATEGORY_SELF_PROTECTED: | 2380 | case WLAN_CATEGORY_SELF_PROTECTED: |
2381 | if (len < (IEEE80211_MIN_ACTION_SIZE + | ||
2382 | sizeof(mgmt->u.action.u.self_prot.action_code))) | ||
2383 | break; | ||
2384 | |||
2356 | switch (mgmt->u.action.u.self_prot.action_code) { | 2385 | switch (mgmt->u.action.u.self_prot.action_code) { |
2357 | case WLAN_SP_MESH_PEERING_OPEN: | 2386 | case WLAN_SP_MESH_PEERING_OPEN: |
2358 | case WLAN_SP_MESH_PEERING_CLOSE: | 2387 | case WLAN_SP_MESH_PEERING_CLOSE: |
@@ -2371,6 +2400,10 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx) | |||
2371 | } | 2400 | } |
2372 | break; | 2401 | break; |
2373 | case WLAN_CATEGORY_MESH_ACTION: | 2402 | case WLAN_CATEGORY_MESH_ACTION: |
2403 | if (len < (IEEE80211_MIN_ACTION_SIZE + | ||
2404 | sizeof(mgmt->u.action.u.mesh_action.action_code))) | ||
2405 | break; | ||
2406 | |||
2374 | if (!ieee80211_vif_is_mesh(&sdata->vif)) | 2407 | if (!ieee80211_vif_is_mesh(&sdata->vif)) |
2375 | break; | 2408 | break; |
2376 | if (mesh_action_is_path_sel(mgmt) && | 2409 | if (mesh_action_is_path_sel(mgmt) && |
@@ -2913,10 +2946,15 @@ static void __ieee80211_rx_handle_packet(struct ieee80211_hw *hw, | |||
2913 | if (ieee80211_is_data(fc) || ieee80211_is_mgmt(fc)) | 2946 | if (ieee80211_is_data(fc) || ieee80211_is_mgmt(fc)) |
2914 | local->dot11ReceivedFragmentCount++; | 2947 | local->dot11ReceivedFragmentCount++; |
2915 | 2948 | ||
2916 | if (ieee80211_is_mgmt(fc)) | 2949 | if (ieee80211_is_mgmt(fc)) { |
2917 | err = skb_linearize(skb); | 2950 | /* drop frame if too short for header */ |
2918 | else | 2951 | if (skb->len < ieee80211_hdrlen(fc)) |
2952 | err = -ENOBUFS; | ||
2953 | else | ||
2954 | err = skb_linearize(skb); | ||
2955 | } else { | ||
2919 | err = !pskb_may_pull(skb, ieee80211_hdrlen(fc)); | 2956 | err = !pskb_may_pull(skb, ieee80211_hdrlen(fc)); |
2957 | } | ||
2920 | 2958 | ||
2921 | if (err) { | 2959 | if (err) { |
2922 | dev_kfree_skb(skb); | 2960 | dev_kfree_skb(skb); |
diff --git a/net/mac80211/util.c b/net/mac80211/util.c index 94e586873979..239391807ca9 100644 --- a/net/mac80211/util.c +++ b/net/mac80211/util.c | |||
@@ -643,13 +643,41 @@ u32 ieee802_11_parse_elems_crc(u8 *start, size_t len, | |||
643 | break; | 643 | break; |
644 | } | 644 | } |
645 | 645 | ||
646 | if (id != WLAN_EID_VENDOR_SPECIFIC && | 646 | switch (id) { |
647 | id != WLAN_EID_QUIET && | 647 | case WLAN_EID_SSID: |
648 | test_bit(id, seen_elems)) { | 648 | case WLAN_EID_SUPP_RATES: |
649 | elems->parse_error = true; | 649 | case WLAN_EID_FH_PARAMS: |
650 | left -= elen; | 650 | case WLAN_EID_DS_PARAMS: |
651 | pos += elen; | 651 | case WLAN_EID_CF_PARAMS: |
652 | continue; | 652 | case WLAN_EID_TIM: |
653 | case WLAN_EID_IBSS_PARAMS: | ||
654 | case WLAN_EID_CHALLENGE: | ||
655 | case WLAN_EID_RSN: | ||
656 | case WLAN_EID_ERP_INFO: | ||
657 | case WLAN_EID_EXT_SUPP_RATES: | ||
658 | case WLAN_EID_HT_CAPABILITY: | ||
659 | case WLAN_EID_HT_OPERATION: | ||
660 | case WLAN_EID_VHT_CAPABILITY: | ||
661 | case WLAN_EID_VHT_OPERATION: | ||
662 | case WLAN_EID_MESH_ID: | ||
663 | case WLAN_EID_MESH_CONFIG: | ||
664 | case WLAN_EID_PEER_MGMT: | ||
665 | case WLAN_EID_PREQ: | ||
666 | case WLAN_EID_PREP: | ||
667 | case WLAN_EID_PERR: | ||
668 | case WLAN_EID_RANN: | ||
669 | case WLAN_EID_CHANNEL_SWITCH: | ||
670 | case WLAN_EID_EXT_CHANSWITCH_ANN: | ||
671 | case WLAN_EID_COUNTRY: | ||
672 | case WLAN_EID_PWR_CONSTRAINT: | ||
673 | case WLAN_EID_TIMEOUT_INTERVAL: | ||
674 | if (test_bit(id, seen_elems)) { | ||
675 | elems->parse_error = true; | ||
676 | left -= elen; | ||
677 | pos += elen; | ||
678 | continue; | ||
679 | } | ||
680 | break; | ||
653 | } | 681 | } |
654 | 682 | ||
655 | if (calc_crc && id < 64 && (filter & (1ULL << id))) | 683 | if (calc_crc && id < 64 && (filter & (1ULL << id))) |
diff --git a/net/netfilter/nf_conntrack_h323_main.c b/net/netfilter/nf_conntrack_h323_main.c index 1b30b0dee708..962795e839ab 100644 --- a/net/netfilter/nf_conntrack_h323_main.c +++ b/net/netfilter/nf_conntrack_h323_main.c | |||
@@ -753,7 +753,8 @@ static int callforward_do_filter(const union nf_inet_addr *src, | |||
753 | flowi4_to_flowi(&fl1), false)) { | 753 | flowi4_to_flowi(&fl1), false)) { |
754 | if (!afinfo->route(&init_net, (struct dst_entry **)&rt2, | 754 | if (!afinfo->route(&init_net, (struct dst_entry **)&rt2, |
755 | flowi4_to_flowi(&fl2), false)) { | 755 | flowi4_to_flowi(&fl2), false)) { |
756 | if (rt1->rt_gateway == rt2->rt_gateway && | 756 | if (rt_nexthop(rt1, fl1.daddr) == |
757 | rt_nexthop(rt2, fl2.daddr) && | ||
757 | rt1->dst.dev == rt2->dst.dev) | 758 | rt1->dst.dev == rt2->dst.dev) |
758 | ret = 1; | 759 | ret = 1; |
759 | dst_release(&rt2->dst); | 760 | dst_release(&rt2->dst); |
diff --git a/net/sctp/socket.c b/net/sctp/socket.c index 59d16ea927f0..a60d1f8b41c5 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c | |||
@@ -974,7 +974,7 @@ SCTP_STATIC int sctp_setsockopt_bindx(struct sock* sk, | |||
974 | void *addr_buf; | 974 | void *addr_buf; |
975 | struct sctp_af *af; | 975 | struct sctp_af *af; |
976 | 976 | ||
977 | SCTP_DEBUG_PRINTK("sctp_setsocktopt_bindx: sk %p addrs %p" | 977 | SCTP_DEBUG_PRINTK("sctp_setsockopt_bindx: sk %p addrs %p" |
978 | " addrs_size %d opt %d\n", sk, addrs, addrs_size, op); | 978 | " addrs_size %d opt %d\n", sk, addrs, addrs_size, op); |
979 | 979 | ||
980 | if (unlikely(addrs_size <= 0)) | 980 | if (unlikely(addrs_size <= 0)) |
diff --git a/net/wireless/core.c b/net/wireless/core.c index 443d4d7deea2..3f7253052088 100644 --- a/net/wireless/core.c +++ b/net/wireless/core.c | |||
@@ -526,8 +526,7 @@ int wiphy_register(struct wiphy *wiphy) | |||
526 | for (i = 0; i < sband->n_channels; i++) { | 526 | for (i = 0; i < sband->n_channels; i++) { |
527 | sband->channels[i].orig_flags = | 527 | sband->channels[i].orig_flags = |
528 | sband->channels[i].flags; | 528 | sband->channels[i].flags; |
529 | sband->channels[i].orig_mag = | 529 | sband->channels[i].orig_mag = INT_MAX; |
530 | sband->channels[i].max_antenna_gain; | ||
531 | sband->channels[i].orig_mpwr = | 530 | sband->channels[i].orig_mpwr = |
532 | sband->channels[i].max_power; | 531 | sband->channels[i].max_power; |
533 | sband->channels[i].band = band; | 532 | sband->channels[i].band = band; |
diff --git a/net/wireless/reg.c b/net/wireless/reg.c index 3b8cbbc214db..bcc7d7ee5a51 100644 --- a/net/wireless/reg.c +++ b/net/wireless/reg.c | |||
@@ -908,7 +908,7 @@ static void handle_channel(struct wiphy *wiphy, | |||
908 | map_regdom_flags(reg_rule->flags) | bw_flags; | 908 | map_regdom_flags(reg_rule->flags) | bw_flags; |
909 | chan->max_antenna_gain = chan->orig_mag = | 909 | chan->max_antenna_gain = chan->orig_mag = |
910 | (int) MBI_TO_DBI(power_rule->max_antenna_gain); | 910 | (int) MBI_TO_DBI(power_rule->max_antenna_gain); |
911 | chan->max_power = chan->orig_mpwr = | 911 | chan->max_reg_power = chan->max_power = chan->orig_mpwr = |
912 | (int) MBM_TO_DBM(power_rule->max_eirp); | 912 | (int) MBM_TO_DBM(power_rule->max_eirp); |
913 | return; | 913 | return; |
914 | } | 914 | } |
@@ -1331,7 +1331,8 @@ static void handle_channel_custom(struct wiphy *wiphy, | |||
1331 | 1331 | ||
1332 | chan->flags |= map_regdom_flags(reg_rule->flags) | bw_flags; | 1332 | chan->flags |= map_regdom_flags(reg_rule->flags) | bw_flags; |
1333 | chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain); | 1333 | chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain); |
1334 | chan->max_power = (int) MBM_TO_DBM(power_rule->max_eirp); | 1334 | chan->max_reg_power = chan->max_power = |
1335 | (int) MBM_TO_DBM(power_rule->max_eirp); | ||
1335 | } | 1336 | } |
1336 | 1337 | ||
1337 | static void handle_band_custom(struct wiphy *wiphy, enum ieee80211_band band, | 1338 | static void handle_band_custom(struct wiphy *wiphy, enum ieee80211_band band, |
diff --git a/net/wireless/util.c b/net/wireless/util.c index ef35f4ef2aa6..2762e8329986 100644 --- a/net/wireless/util.c +++ b/net/wireless/util.c | |||
@@ -309,23 +309,21 @@ unsigned int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb) | |||
309 | } | 309 | } |
310 | EXPORT_SYMBOL(ieee80211_get_hdrlen_from_skb); | 310 | EXPORT_SYMBOL(ieee80211_get_hdrlen_from_skb); |
311 | 311 | ||
312 | static int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr) | 312 | unsigned int ieee80211_get_mesh_hdrlen(struct ieee80211s_hdr *meshhdr) |
313 | { | 313 | { |
314 | int ae = meshhdr->flags & MESH_FLAGS_AE; | 314 | int ae = meshhdr->flags & MESH_FLAGS_AE; |
315 | /* 7.1.3.5a.2 */ | 315 | /* 802.11-2012, 8.2.4.7.3 */ |
316 | switch (ae) { | 316 | switch (ae) { |
317 | default: | ||
317 | case 0: | 318 | case 0: |
318 | return 6; | 319 | return 6; |
319 | case MESH_FLAGS_AE_A4: | 320 | case MESH_FLAGS_AE_A4: |
320 | return 12; | 321 | return 12; |
321 | case MESH_FLAGS_AE_A5_A6: | 322 | case MESH_FLAGS_AE_A5_A6: |
322 | return 18; | 323 | return 18; |
323 | case (MESH_FLAGS_AE_A4 | MESH_FLAGS_AE_A5_A6): | ||
324 | return 24; | ||
325 | default: | ||
326 | return 6; | ||
327 | } | 324 | } |
328 | } | 325 | } |
326 | EXPORT_SYMBOL(ieee80211_get_mesh_hdrlen); | ||
329 | 327 | ||
330 | int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | 328 | int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, |
331 | enum nl80211_iftype iftype) | 329 | enum nl80211_iftype iftype) |
@@ -373,6 +371,8 @@ int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | |||
373 | /* make sure meshdr->flags is on the linear part */ | 371 | /* make sure meshdr->flags is on the linear part */ |
374 | if (!pskb_may_pull(skb, hdrlen + 1)) | 372 | if (!pskb_may_pull(skb, hdrlen + 1)) |
375 | return -1; | 373 | return -1; |
374 | if (meshdr->flags & MESH_FLAGS_AE_A4) | ||
375 | return -1; | ||
376 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) { | 376 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) { |
377 | skb_copy_bits(skb, hdrlen + | 377 | skb_copy_bits(skb, hdrlen + |
378 | offsetof(struct ieee80211s_hdr, eaddr1), | 378 | offsetof(struct ieee80211s_hdr, eaddr1), |
@@ -397,6 +397,8 @@ int ieee80211_data_to_8023(struct sk_buff *skb, const u8 *addr, | |||
397 | /* make sure meshdr->flags is on the linear part */ | 397 | /* make sure meshdr->flags is on the linear part */ |
398 | if (!pskb_may_pull(skb, hdrlen + 1)) | 398 | if (!pskb_may_pull(skb, hdrlen + 1)) |
399 | return -1; | 399 | return -1; |
400 | if (meshdr->flags & MESH_FLAGS_AE_A5_A6) | ||
401 | return -1; | ||
400 | if (meshdr->flags & MESH_FLAGS_AE_A4) | 402 | if (meshdr->flags & MESH_FLAGS_AE_A4) |
401 | skb_copy_bits(skb, hdrlen + | 403 | skb_copy_bits(skb, hdrlen + |
402 | offsetof(struct ieee80211s_hdr, eaddr1), | 404 | offsetof(struct ieee80211s_hdr, eaddr1), |