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-rw-r--r--Documentation/powerpc/booting-without-of.txt14
-rw-r--r--arch/powerpc/kernel/setup_64.c19
2 files changed, 19 insertions, 14 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index a96e85397eb7..2233e3d5e5f3 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -851,12 +851,18 @@ address which can extend beyond that limit.
851 /cpus/PowerPC,970FX@0 851 /cpus/PowerPC,970FX@0
852 /cpus/PowerPC,970FX@1 852 /cpus/PowerPC,970FX@1
853 (unit addresses do not require leading zeroes) 853 (unit addresses do not require leading zeroes)
854 - d-cache-line-size : one cell, L1 data cache line size in bytes 854 - d-cache-block-size : one cell, L1 data cache block size in bytes (*)
855 - i-cache-line-size : one cell, L1 instruction cache line size in 855 - i-cache-block-size : one cell, L1 instruction cache block size in
856 bytes 856 bytes
857 - d-cache-size : one cell, size of L1 data cache in bytes 857 - d-cache-size : one cell, size of L1 data cache in bytes
858 - i-cache-size : one cell, size of L1 instruction cache in bytes 858 - i-cache-size : one cell, size of L1 instruction cache in bytes
859 859
860(*) The cache "block" size is the size on which the cache management
861instructions operate. Historically, this document used the cache
862"line" size here which is incorrect. The kernel will prefer the cache
863block size and will fallback to cache line size for backward
864compatibility.
865
860 Recommended properties: 866 Recommended properties:
861 867
862 - timebase-frequency : a cell indicating the frequency of the 868 - timebase-frequency : a cell indicating the frequency of the
@@ -870,6 +876,10 @@ address which can extend beyond that limit.
870 for the above, the common code doesn't use that property, but 876 for the above, the common code doesn't use that property, but
871 you are welcome to re-use the pSeries or Maple one. A future 877 you are welcome to re-use the pSeries or Maple one. A future
872 kernel version might provide a common function for this. 878 kernel version might provide a common function for this.
879 - d-cache-line-size : one cell, L1 data cache line size in bytes
880 if different from the block size
881 - i-cache-line-size : one cell, L1 instruction cache line size in
882 bytes if different from the block size
873 883
874 You are welcome to add any property you find relevant to your board, 884 You are welcome to add any property you find relevant to your board,
875 like some information about the mechanism used to soft-reset the 885 like some information about the mechanism used to soft-reset the
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index ede77dbbd4df..3b1529c103ef 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -291,23 +291,16 @@ static void __init initialize_cache_info(void)
291 if ( num_cpus == 1 ) { 291 if ( num_cpus == 1 ) {
292 const u32 *sizep, *lsizep; 292 const u32 *sizep, *lsizep;
293 u32 size, lsize; 293 u32 size, lsize;
294 const char *dc, *ic;
295
296 /* Then read cache informations */
297 if (machine_is(powermac)) {
298 dc = "d-cache-block-size";
299 ic = "i-cache-block-size";
300 } else {
301 dc = "d-cache-line-size";
302 ic = "i-cache-line-size";
303 }
304 294
305 size = 0; 295 size = 0;
306 lsize = cur_cpu_spec->dcache_bsize; 296 lsize = cur_cpu_spec->dcache_bsize;
307 sizep = of_get_property(np, "d-cache-size", NULL); 297 sizep = of_get_property(np, "d-cache-size", NULL);
308 if (sizep != NULL) 298 if (sizep != NULL)
309 size = *sizep; 299 size = *sizep;
310 lsizep = of_get_property(np, dc, NULL); 300 lsizep = of_get_property(np, "d-cache-block-size", NULL);
301 /* fallback if block size missing */
302 if (lsizep == NULL)
303 lsizep = of_get_property(np, "d-cache-line-size", NULL);
311 if (lsizep != NULL) 304 if (lsizep != NULL)
312 lsize = *lsizep; 305 lsize = *lsizep;
313 if (sizep == 0 || lsizep == 0) 306 if (sizep == 0 || lsizep == 0)
@@ -324,7 +317,9 @@ static void __init initialize_cache_info(void)
324 sizep = of_get_property(np, "i-cache-size", NULL); 317 sizep = of_get_property(np, "i-cache-size", NULL);
325 if (sizep != NULL) 318 if (sizep != NULL)
326 size = *sizep; 319 size = *sizep;
327 lsizep = of_get_property(np, ic, NULL); 320 lsizep = of_get_property(np, "i-cache-block-size", NULL);
321 if (lsizep == NULL)
322 lsizep = of_get_property(np, "i-cache-line-size", NULL);
328 if (lsizep != NULL) 323 if (lsizep != NULL)
329 lsize = *lsizep; 324 lsize = *lsizep;
330 if (sizep == 0 || lsizep == 0) 325 if (sizep == 0 || lsizep == 0)