2 files changed, 51 insertions, 54 deletions

diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 3e2ae4807ae2..1c8afd98e14e 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -153,8 +153,8 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
         write_zsreg(uap, R10, regs[R10]);
 
         /* Set TX/RX controls sans the enable bits.  */
-        write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
-        write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
+        write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
+        write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
 
         /* now set R7 "prime" on ESCC */
         write_zsreg(uap, R15, regs[R15] | EN85C30);
@@ -205,7 +205,7 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
  */
 static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
 {
-        if (!ZS_REGS_HELD(uap)) {
+        if (!ZS_REGS_HELD(uap)) {
                 if (ZS_TX_ACTIVE(uap)) {
                         uap->flags |= PMACZILOG_FLAG_REGS_HELD;
                 } else {
@@ -281,7 +281,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
                         spin_lock(&uap->port.lock);
                         if (swallow)
                                 goto next_char;
-                }
+                }
 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
 
                 /* A real serial line, record the character and status.  */
@@ -317,7 +317,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
 
                 if (uap->port.ignore_status_mask == 0xff ||
                     (r1 & uap->port.ignore_status_mask) == 0) {
-                        tty_insert_flip_char(tty, ch, flag);
+                        tty_insert_flip_char(tty, ch, flag);
                 }
                 if (r1 & Rx_OVR)
                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
@@ -470,47 +470,47 @@ static irqreturn_t pmz_interrupt(int irq, void *dev_id)
 
         uap_a = pmz_get_port_A(uap);
         uap_b = uap_a->mate;
-       
-        spin_lock(&uap_a->port.lock);
+
+        spin_lock(&uap_a->port.lock);
         r3 = read_zsreg(uap_a, R3);
 
 #ifdef DEBUG_HARD
         pmz_debug("irq, r3: %x\n", r3);
 #endif
-        /* Channel A */
+        /* Channel A */
         tty = NULL;
-        if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
+        if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
                 write_zsreg(uap_a, R0, RES_H_IUS);
                 zssync(uap_a);          
-                if (r3 & CHAEXT)
-                        pmz_status_handle(uap_a);
+                if (r3 & CHAEXT)
+                        pmz_status_handle(uap_a);
                 if (r3 & CHARxIP)
                         tty = pmz_receive_chars(uap_a);
-                if (r3 & CHATxIP)
-                        pmz_transmit_chars(uap_a);
-                rc = IRQ_HANDLED;
-        }
-        spin_unlock(&uap_a->port.lock);
+                if (r3 & CHATxIP)
+                        pmz_transmit_chars(uap_a);
+                rc = IRQ_HANDLED;
+        }
+        spin_unlock(&uap_a->port.lock);
         if (tty != NULL)
                 tty_flip_buffer_push(tty);
 
         if (uap_b->node == NULL)
                 goto out;
 
-        spin_lock(&uap_b->port.lock);
+        spin_lock(&uap_b->port.lock);
         tty = NULL;
         if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
                 write_zsreg(uap_b, R0, RES_H_IUS);
                 zssync(uap_b);
-                if (r3 & CHBEXT)
-                        pmz_status_handle(uap_b);
-                if (r3 & CHBRxIP)
-                        tty = pmz_receive_chars(uap_b);
-                if (r3 & CHBTxIP)
-                        pmz_transmit_chars(uap_b);
-                rc = IRQ_HANDLED;
-        }
-        spin_unlock(&uap_b->port.lock);
+                if (r3 & CHBEXT)
+                        pmz_status_handle(uap_b);
+                if (r3 & CHBRxIP)
+                        tty = pmz_receive_chars(uap_b);
+                if (r3 & CHBTxIP)
+                        pmz_transmit_chars(uap_b);
+                rc = IRQ_HANDLED;
+        }
+        spin_unlock(&uap_b->port.lock);
         if (tty != NULL)
                 tty_flip_buffer_push(tty);
 
@@ -718,7 +718,7 @@ static void pmz_enable_ms(struct uart_port *port)
 
                 if (ZS_IS_ASLEEP(uap))
                         return;
-                /* NOTE: Not subject to 'transmitter active' rule.  */ 
+                /* NOTE: Not subject to 'transmitter active' rule. */
                 write_zsreg(uap, R15, uap->curregs[R15]);
         }
 }
@@ -748,7 +748,7 @@ static void pmz_break_ctl(struct uart_port *port, int break_state)
         if (new_reg != uap->curregs[R5]) {
                 uap->curregs[R5] = new_reg;
 
-                /* NOTE: Not subject to 'transmitter active' rule.  */ 
+                /* NOTE: Not subject to 'transmitter active' rule. */
                 if (ZS_IS_ASLEEP(uap))
                         return;
                 write_zsreg(uap, R5, uap->curregs[R5]);
@@ -908,7 +908,6 @@ static int __pmz_startup(struct uart_pmac_port *uap)
         /* Remember status for DCD/CTS changes */
         uap->prev_status = read_zsreg(uap, R0);
 
-
         return pwr_delay;
 }
 
@@ -983,7 +982,7 @@ static int pmz_startup(struct uart_port *port)
         if (!ZS_IS_EXTCLK(uap))
                 uap->curregs[R1] |= EXT_INT_ENAB;
         write_zsreg(uap, R1, uap->curregs[R1]);
-        spin_unlock_irqrestore(&port->lock, flags);
+        spin_unlock_irqrestore(&port->lock, flags);
 
         pmz_debug("pmz: startup() done.\n");
 
@@ -1003,7 +1002,7 @@ static void pmz_shutdown(struct uart_port *port)
         mutex_lock(&pmz_irq_mutex);
 
         /* Release interrupt handler */
-        free_irq(uap->port.irq, uap);
+        free_irq(uap->port.irq, uap);
 
         spin_lock_irqsave(&port->lock, flags);
 
@@ -1051,7 +1050,6 @@ static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
 {
         int brg;
 
-
         /* Switch to external clocking for IrDA high clock rates. That
          * code could be re-used for Midi interfaces with different
          * multipliers
@@ -1223,12 +1221,12 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
         uap->curregs[R5] |= DTR;
         write_zsreg(uap, R5, uap->curregs[R5]);
         zssync(uap);
-        mdelay(1);
+        mdelay(1);
 
         /* Switch SCC to 19200 */
         pmz_convert_to_zs(uap, CS8, 0, 19200);          
         pmz_load_zsregs(uap, uap->curregs);
-        mdelay(1);
+        mdelay(1);
 
         /* Write get_version command byte */
         write_zsdata(uap, 1);
@@ -1463,7 +1461,7 @@ static int __init pmz_init_port(struct uart_pmac_port *uap)
                 return -ENODEV;
         uap->port.mapbase = r_ports.start;
         uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
-      
+
         uap->control_reg = uap->port.membase;
         uap->data_reg = uap->control_reg + 0x10;
         
@@ -1590,7 +1588,7 @@ static void pmz_dispose_port(struct uart_pmac_port *uap)
 }
 
 /*
- * Called upon match with an escc node in the devive-tree.
+ * Called upon match with an escc node in the device-tree.
  */
 static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
 {
@@ -1812,7 +1810,7 @@ static int __init pmz_probe(void)
                 pmz_ports[count].node           = node_a;
                 pmz_ports[count+1].node         = node_b;
                 pmz_ports[count].port.line      = count;
-                pmz_ports[count+1].port.line    = count+1;
+                pmz_ports[count+1].port.line    = count+1;
 
                 /*
                  * Setup the ports for real
@@ -1899,23 +1897,22 @@ err_out:
 static struct of_device_id pmz_match[] = 
 {
         {
-        .name           = "ch-a",
+        .name           = "ch-a",
         },
         {
-        .name           = "ch-b",
+        .name           = "ch-b",
         },
         {},
 };
 MODULE_DEVICE_TABLE (of, pmz_match);
 
-static struct macio_driver pmz_driver = 
-{
+static struct macio_driver pmz_driver = {
         .name           = "pmac_zilog",
         .match_table    = pmz_match,
         .probe          = pmz_attach,
         .remove         = pmz_detach,
         .suspend        = pmz_suspend,
-        .resume         = pmz_resume,
+        .resume         = pmz_resume,
 };
 
 static int __init init_pmz(void)
@@ -1952,7 +1949,7 @@ static int __init init_pmz(void)
                         pmz_dispose_port(&pmz_ports[i]);
                 return rc;
         }
-        
+
         /*
          * Then we register the macio driver itself
          */
@@ -2034,7 +2031,7 @@ static int __init pmz_console_setup(struct console *co, char *options)
         if (of_machine_is_compatible("RackMac1,1")
             || of_machine_is_compatible("RackMac1,2")
             || of_machine_is_compatible("MacRISC4"))
-                baud = 57600;
+                baud = 57600;
 
         /*
          * Check whether an invalid uart number has been specified, and
diff --git a/drivers/serial/pmac_zilog.h b/drivers/serial/pmac_zilog.h
index f6e77f12acd5..f18c426324a4 100644
--- a/drivers/serial/pmac_zilog.h
+++ b/drivers/serial/pmac_zilog.h
@@ -1,7 +1,7 @@
 #ifndef __PMAC_ZILOG_H__
 #define __PMAC_ZILOG_H__
 
-#define pmz_debug(fmt,arg...)   dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg)
+#define pmz_debug(fmt, arg...)  dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg)
 
 /*
  * At most 2 ESCCs with 2 ports each
@@ -113,7 +113,7 @@ static inline void zssync(struct uart_pmac_port *port)
 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
 
-#define ZS_CLOCK         3686400        /* Z8530 RTxC input clock rate */
+#define ZS_CLOCK         3686400        /* Z8530 RTxC input clock rate */
 
 /* The Zilog register set */
 
@@ -171,7 +171,7 @@ static inline void zssync(struct uart_pmac_port *port)
 
 /* Write Register 3 */
 
-#define RxENABLE        0x1     /* Rx Enable */
+#define RxENABLE        0x1     /* Rx Enable */
 #define SYNC_L_INH      0x2     /* Sync Character Load Inhibit */
 #define ADD_SM          0x4     /* Address Search Mode (SDLC) */
 #define RxCRC_ENAB      0x8     /* Rx CRC Enable */
@@ -185,7 +185,7 @@ static inline void zssync(struct uart_pmac_port *port)
 
 /* Write Register 4 */
 
-#define PAR_ENAB        0x1     /* Parity Enable */
+#define PAR_ENAB        0x1     /* Parity Enable */
 #define PAR_EVEN        0x2     /* Parity Even/Odd* */
 
 #define SYNC_ENAB       0       /* Sync Modes Enable */
@@ -210,7 +210,7 @@ static inline void zssync(struct uart_pmac_port *port)
 #define TxCRC_ENAB      0x1     /* Tx CRC Enable */
 #define RTS             0x2     /* RTS */
 #define SDLC_CRC        0x4     /* SDLC/CRC-16 */
-#define TxENABLE        0x8     /* Tx Enable */
+#define TxENABLE        0x8     /* Tx Enable */
 #define SND_BRK         0x10    /* Send Break */
 #define Tx5             0x0     /* Tx 5 bits (or less)/character */
 #define Tx7             0x20    /* Tx 7 bits/character */
@@ -372,11 +372,11 @@ static inline void zssync(struct uart_pmac_port *port)
 #define ZS_TX_ACTIVE(UP)                ((UP)->flags & PMACZILOG_FLAG_TX_ACTIVE)
 #define ZS_WANTS_MODEM_STATUS(UP)       ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS)
 #define ZS_IS_IRDA(UP)                  ((UP)->flags & PMACZILOG_FLAG_IS_IRDA)
-#define ZS_IS_INTMODEM(UP)              ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
+#define ZS_IS_INTMODEM(UP)              ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
 #define ZS_HAS_DMA(UP)                  ((UP)->flags & PMACZILOG_FLAG_HAS_DMA)
-#define ZS_IS_ASLEEP(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP)
-#define ZS_IS_OPEN(UP)                  ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
-#define ZS_IS_IRQ_ON(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON)
-#define ZS_IS_EXTCLK(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)
+#define ZS_IS_ASLEEP(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP)
+#define ZS_IS_OPEN(UP)                  ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
+#define ZS_IS_IRQ_ON(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON)
+#define ZS_IS_EXTCLK(UP)                ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)
 
 #endif /* __PMAC_ZILOG_H__ */