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-rw-r--r--sound/soc/codecs/Kconfig1
-rw-r--r--sound/soc/codecs/jz4740.c142
2 files changed, 60 insertions, 83 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 80799639814e..ef03c7ab46a6 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -236,6 +236,7 @@ config SND_SOC_CX20442
236 tristate 236 tristate
237 237
238config SND_SOC_JZ4740_CODEC 238config SND_SOC_JZ4740_CODEC
239 select REGMAP_MMIO
239 tristate 240 tristate
240 241
241config SND_SOC_L3 242config SND_SOC_L3
diff --git a/sound/soc/codecs/jz4740.c b/sound/soc/codecs/jz4740.c
index 85d9cabe6d55..9ad1da36887e 100644
--- a/sound/soc/codecs/jz4740.c
+++ b/sound/soc/codecs/jz4740.c
@@ -16,6 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/regmap.h>
19 20
20#include <linux/delay.h> 21#include <linux/delay.h>
21 22
@@ -24,9 +25,10 @@
24#include <sound/pcm_params.h> 25#include <sound/pcm_params.h>
25#include <sound/initval.h> 26#include <sound/initval.h>
26#include <sound/soc.h> 27#include <sound/soc.h>
28#include <sound/tlv.h>
27 29
28#define JZ4740_REG_CODEC_1 0x0 30#define JZ4740_REG_CODEC_1 0x0
29#define JZ4740_REG_CODEC_2 0x1 31#define JZ4740_REG_CODEC_2 0x4
30 32
31#define JZ4740_CODEC_1_LINE_ENABLE BIT(29) 33#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
32#define JZ4740_CODEC_1_MIC_ENABLE BIT(28) 34#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
@@ -67,43 +69,36 @@
67#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4 69#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
68#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0 70#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
69 71
70static const uint32_t jz4740_codec_regs[] = { 72static const struct reg_default jz4740_codec_reg_defaults[] = {
71 0x021b2302, 0x00170803, 73 { JZ4740_REG_CODEC_1, 0x021b2302 },
74 { JZ4740_REG_CODEC_2, 0x00170803 },
72}; 75};
73 76
74struct jz4740_codec { 77struct jz4740_codec {
75 void __iomem *base; 78 struct regmap *regmap;
76 struct resource *mem;
77}; 79};
78 80
79static unsigned int jz4740_codec_read(struct snd_soc_codec *codec, 81static const unsigned int jz4740_mic_tlv[] = {
80 unsigned int reg) 82 TLV_DB_RANGE_HEAD(2),
81{ 83 0, 2, TLV_DB_SCALE_ITEM(0, 600, 0),
82 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec); 84 3, 3, TLV_DB_SCALE_ITEM(2000, 0, 0),
83 return readl(jz4740_codec->base + (reg << 2)); 85};
84}
85
86static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
87 unsigned int val)
88{
89 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
90 u32 *cache = codec->reg_cache;
91
92 cache[reg] = val;
93 writel(val, jz4740_codec->base + (reg << 2));
94 86
95 return 0; 87static const DECLARE_TLV_DB_SCALE(jz4740_out_tlv, 0, 200, 0);
96} 88static const DECLARE_TLV_DB_SCALE(jz4740_in_tlv, -3450, 150, 0);
97 89
98static const struct snd_kcontrol_new jz4740_codec_controls[] = { 90static const struct snd_kcontrol_new jz4740_codec_controls[] = {
99 SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2, 91 SOC_SINGLE_TLV("Master Playback Volume", JZ4740_REG_CODEC_2,
100 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0), 92 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0,
101 SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2, 93 jz4740_out_tlv),
102 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0), 94 SOC_SINGLE_TLV("Master Capture Volume", JZ4740_REG_CODEC_2,
95 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0,
96 jz4740_in_tlv),
103 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1, 97 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
104 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1), 98 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
105 SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2, 99 SOC_SINGLE_TLV("Mic Capture Volume", JZ4740_REG_CODEC_2,
106 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0), 100 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0,
101 jz4740_mic_tlv),
107}; 102};
108 103
109static const struct snd_kcontrol_new jz4740_codec_output_controls[] = { 104static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
@@ -163,8 +158,8 @@ static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
163static int jz4740_codec_hw_params(struct snd_pcm_substream *substream, 158static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
164 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 159 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
165{ 160{
161 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(dai->codec);
166 uint32_t val; 162 uint32_t val;
167 struct snd_soc_codec *codec = dai->codec;
168 163
169 switch (params_rate(params)) { 164 switch (params_rate(params)) {
170 case 8000: 165 case 8000:
@@ -200,7 +195,7 @@ static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
200 195
201 val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET; 196 val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
202 197
203 snd_soc_update_bits(codec, JZ4740_REG_CODEC_2, 198 regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_2,
204 JZ4740_CODEC_2_SAMPLE_RATE_MASK, val); 199 JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
205 200
206 return 0; 201 return 0;
@@ -230,25 +225,23 @@ static struct snd_soc_dai_driver jz4740_codec_dai = {
230 .symmetric_rates = 1, 225 .symmetric_rates = 1,
231}; 226};
232 227
233static void jz4740_codec_wakeup(struct snd_soc_codec *codec) 228static void jz4740_codec_wakeup(struct regmap *regmap)
234{ 229{
235 int i; 230 regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
236 uint32_t *cache = codec->reg_cache;
237
238 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
239 JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET); 231 JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
240 udelay(2); 232 udelay(2);
241 233
242 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, 234 regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
243 JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0); 235 JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
244 236
245 for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i) 237 regcache_sync(regmap);
246 jz4740_codec_write(codec, i, cache[i]);
247} 238}
248 239
249static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec, 240static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
250 enum snd_soc_bias_level level) 241 enum snd_soc_bias_level level)
251{ 242{
243 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
244 struct regmap *regmap = jz4740_codec->regmap;
252 unsigned int mask; 245 unsigned int mask;
253 unsigned int value; 246 unsigned int value;
254 247
@@ -261,12 +254,12 @@ static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
261 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; 254 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
262 value = 0; 255 value = 0;
263 256
264 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 257 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
265 break; 258 break;
266 case SND_SOC_BIAS_STANDBY: 259 case SND_SOC_BIAS_STANDBY:
267 /* The only way to clear the suspend flag is to reset the codec */ 260 /* The only way to clear the suspend flag is to reset the codec */
268 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) 261 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
269 jz4740_codec_wakeup(codec); 262 jz4740_codec_wakeup(regmap);
270 263
271 mask = JZ4740_CODEC_1_VREF_DISABLE | 264 mask = JZ4740_CODEC_1_VREF_DISABLE |
272 JZ4740_CODEC_1_VREF_AMP_DISABLE | 265 JZ4740_CODEC_1_VREF_AMP_DISABLE |
@@ -275,13 +268,14 @@ static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
275 JZ4740_CODEC_1_VREF_AMP_DISABLE | 268 JZ4740_CODEC_1_VREF_AMP_DISABLE |
276 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; 269 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
277 270
278 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 271 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
279 break; 272 break;
280 case SND_SOC_BIAS_OFF: 273 case SND_SOC_BIAS_OFF:
281 mask = JZ4740_CODEC_1_SUSPEND; 274 mask = JZ4740_CODEC_1_SUSPEND;
282 value = JZ4740_CODEC_1_SUSPEND; 275 value = JZ4740_CODEC_1_SUSPEND;
283 276
284 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 277 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
278 regcache_mark_dirty(regmap);
285 break; 279 break;
286 default: 280 default:
287 break; 281 break;
@@ -294,7 +288,9 @@ static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
294 288
295static int jz4740_codec_dev_probe(struct snd_soc_codec *codec) 289static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
296{ 290{
297 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, 291 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
292
293 regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_1,
298 JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE); 294 JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
299 295
300 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 296 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
@@ -331,12 +327,7 @@ static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
331 .remove = jz4740_codec_dev_remove, 327 .remove = jz4740_codec_dev_remove,
332 .suspend = jz4740_codec_suspend, 328 .suspend = jz4740_codec_suspend,
333 .resume = jz4740_codec_resume, 329 .resume = jz4740_codec_resume,
334 .read = jz4740_codec_read,
335 .write = jz4740_codec_write,
336 .set_bias_level = jz4740_codec_set_bias_level, 330 .set_bias_level = jz4740_codec_set_bias_level,
337 .reg_cache_default = jz4740_codec_regs,
338 .reg_word_size = sizeof(u32),
339 .reg_cache_size = 2,
340 331
341 .controls = jz4740_codec_controls, 332 .controls = jz4740_codec_controls,
342 .num_controls = ARRAY_SIZE(jz4740_codec_controls), 333 .num_controls = ARRAY_SIZE(jz4740_codec_controls),
@@ -346,11 +337,23 @@ static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
346 .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes), 337 .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
347}; 338};
348 339
340static const struct regmap_config jz4740_codec_regmap_config = {
341 .reg_bits = 32,
342 .reg_stride = 4,
343 .val_bits = 32,
344 .max_register = JZ4740_REG_CODEC_2,
345
346 .reg_defaults = jz4740_codec_reg_defaults,
347 .num_reg_defaults = ARRAY_SIZE(jz4740_codec_reg_defaults),
348 .cache_type = REGCACHE_RBTREE,
349};
350
349static int __devinit jz4740_codec_probe(struct platform_device *pdev) 351static int __devinit jz4740_codec_probe(struct platform_device *pdev)
350{ 352{
351 int ret; 353 int ret;
352 struct jz4740_codec *jz4740_codec; 354 struct jz4740_codec *jz4740_codec;
353 struct resource *mem; 355 struct resource *mem;
356 void __iomem *base;
354 357
355 jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec), 358 jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec),
356 GFP_KERNEL); 359 GFP_KERNEL);
@@ -358,56 +361,29 @@ static int __devinit jz4740_codec_probe(struct platform_device *pdev)
358 return -ENOMEM; 361 return -ENOMEM;
359 362
360 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 363 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
361 if (!mem) { 364 base = devm_request_and_ioremap(&pdev->dev, mem);
362 dev_err(&pdev->dev, "Failed to get mmio memory resource\n"); 365 if (!base)
363 ret = -ENOENT; 366 return -EBUSY;
364 goto err_out;
365 }
366
367 mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
368 if (!mem) {
369 dev_err(&pdev->dev, "Failed to request mmio memory region\n");
370 ret = -EBUSY;
371 goto err_out;
372 }
373 367
374 jz4740_codec->base = ioremap(mem->start, resource_size(mem)); 368 jz4740_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
375 if (!jz4740_codec->base) { 369 &jz4740_codec_regmap_config);
376 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); 370 if (IS_ERR(jz4740_codec->regmap))
377 ret = -EBUSY; 371 return PTR_ERR(jz4740_codec->regmap);
378 goto err_release_mem_region;
379 }
380 jz4740_codec->mem = mem;
381 372
382 platform_set_drvdata(pdev, jz4740_codec); 373 platform_set_drvdata(pdev, jz4740_codec);
383 374
384 ret = snd_soc_register_codec(&pdev->dev, 375 ret = snd_soc_register_codec(&pdev->dev,
385 &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1); 376 &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
386 if (ret) { 377 if (ret)
387 dev_err(&pdev->dev, "Failed to register codec\n"); 378 dev_err(&pdev->dev, "Failed to register codec\n");
388 goto err_iounmap;
389 }
390 379
391 return 0;
392
393err_iounmap:
394 iounmap(jz4740_codec->base);
395err_release_mem_region:
396 release_mem_region(mem->start, resource_size(mem));
397err_out:
398 return ret; 380 return ret;
399} 381}
400 382
401static int __devexit jz4740_codec_remove(struct platform_device *pdev) 383static int __devexit jz4740_codec_remove(struct platform_device *pdev)
402{ 384{
403 struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev);
404 struct resource *mem = jz4740_codec->mem;
405
406 snd_soc_unregister_codec(&pdev->dev); 385 snd_soc_unregister_codec(&pdev->dev);
407 386
408 iounmap(jz4740_codec->base);
409 release_mem_region(mem->start, resource_size(mem));
410
411 platform_set_drvdata(pdev, NULL); 387 platform_set_drvdata(pdev, NULL);
412 388
413 return 0; 389 return 0;