diff options
| -rw-r--r-- | arch/x86/boot/compressed/eboot.c | 2 | ||||
| -rw-r--r-- | arch/x86/kernel/early-quirks.c | 14 | ||||
| -rw-r--r-- | arch/x86/kernel/i387.c | 2 | ||||
| -rw-r--r-- | arch/x86/kernel/microcode_amd.c | 9 |
4 files changed, 19 insertions, 8 deletions
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c index d606463aa6d6..b7388a425f09 100644 --- a/arch/x86/boot/compressed/eboot.c +++ b/arch/x86/boot/compressed/eboot.c | |||
| @@ -225,7 +225,7 @@ static void low_free(unsigned long size, unsigned long addr) | |||
| 225 | unsigned long nr_pages; | 225 | unsigned long nr_pages; |
| 226 | 226 | ||
| 227 | nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE; | 227 | nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE; |
| 228 | efi_call_phys2(sys_table->boottime->free_pages, addr, size); | 228 | efi_call_phys2(sys_table->boottime->free_pages, addr, nr_pages); |
| 229 | } | 229 | } |
| 230 | 230 | ||
| 231 | static void find_bits(unsigned long mask, u8 *pos, u8 *size) | 231 | static void find_bits(unsigned long mask, u8 *pos, u8 *size) |
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 94ab6b90dd3f..63bdb29b2549 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
| @@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func) | |||
| 196 | static void __init intel_remapping_check(int num, int slot, int func) | 196 | static void __init intel_remapping_check(int num, int slot, int func) |
| 197 | { | 197 | { |
| 198 | u8 revision; | 198 | u8 revision; |
| 199 | u16 device; | ||
| 199 | 200 | ||
| 201 | device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID); | ||
| 200 | revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID); | 202 | revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID); |
| 201 | 203 | ||
| 202 | /* | 204 | /* |
| 203 | * Revision 0x13 of this chipset supports irq remapping | 205 | * Revision 13 of all triggering devices id in this quirk have |
| 204 | * but has an erratum that breaks its behavior, flag it as such | 206 | * a problem draining interrupts when irq remapping is enabled, |
| 207 | * and should be flagged as broken. Additionally revisions 0x12 | ||
| 208 | * and 0x22 of device id 0x3405 has this problem. | ||
| 205 | */ | 209 | */ |
| 206 | if (revision == 0x13) | 210 | if (revision == 0x13) |
| 207 | set_irq_remapping_broken(); | 211 | set_irq_remapping_broken(); |
| 212 | else if ((device == 0x3405) && | ||
| 213 | ((revision == 0x12) || | ||
| 214 | (revision == 0x22))) | ||
| 215 | set_irq_remapping_broken(); | ||
| 208 | 216 | ||
| 209 | } | 217 | } |
| 210 | 218 | ||
| @@ -239,6 +247,8 @@ static struct chipset early_qrk[] __initdata = { | |||
| 239 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd }, | 247 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd }, |
| 240 | { PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST, | 248 | { PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST, |
| 241 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, | 249 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, |
| 250 | { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST, | ||
| 251 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, | ||
| 242 | { PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST, | 252 | { PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST, |
| 243 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, | 253 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, |
| 244 | {} | 254 | {} |
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c index 202d24f0f7e7..5d576ab34403 100644 --- a/arch/x86/kernel/i387.c +++ b/arch/x86/kernel/i387.c | |||
| @@ -116,7 +116,7 @@ static void mxcsr_feature_mask_init(void) | |||
| 116 | 116 | ||
| 117 | if (cpu_has_fxsr) { | 117 | if (cpu_has_fxsr) { |
| 118 | memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct)); | 118 | memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct)); |
| 119 | asm volatile("fxsave %0" : : "m" (fx_scratch)); | 119 | asm volatile("fxsave %0" : "+m" (fx_scratch)); |
| 120 | mask = fx_scratch.mxcsr_mask; | 120 | mask = fx_scratch.mxcsr_mask; |
| 121 | if (mask == 0) | 121 | if (mask == 0) |
| 122 | mask = 0x0000ffbf; | 122 | mask = 0x0000ffbf; |
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index 47ebb1dbfbcb..7a0adb7ee433 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
| @@ -220,12 +220,13 @@ int apply_microcode_amd(int cpu) | |||
| 220 | return 0; | 220 | return 0; |
| 221 | } | 221 | } |
| 222 | 222 | ||
| 223 | if (__apply_microcode_amd(mc_amd)) | 223 | if (__apply_microcode_amd(mc_amd)) { |
| 224 | pr_err("CPU%d: update failed for patch_level=0x%08x\n", | 224 | pr_err("CPU%d: update failed for patch_level=0x%08x\n", |
| 225 | cpu, mc_amd->hdr.patch_id); | 225 | cpu, mc_amd->hdr.patch_id); |
| 226 | else | 226 | return -1; |
| 227 | pr_info("CPU%d: new patch_level=0x%08x\n", cpu, | 227 | } |
| 228 | mc_amd->hdr.patch_id); | 228 | pr_info("CPU%d: new patch_level=0x%08x\n", cpu, |
| 229 | mc_amd->hdr.patch_id); | ||
| 229 | 230 | ||
| 230 | uci->cpu_sig.rev = mc_amd->hdr.patch_id; | 231 | uci->cpu_sig.rev = mc_amd->hdr.patch_id; |
| 231 | c->microcode = mc_amd->hdr.patch_id; | 232 | c->microcode = mc_amd->hdr.patch_id; |
