diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen_cs.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 3 |
4 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index c16554122ccd..f2e5c545c973 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
| @@ -961,13 +961,15 @@ static int evergreen_cs_track_check(struct radeon_cs_parser *p) | |||
| 961 | 961 | ||
| 962 | if (track->db_dirty) { | 962 | if (track->db_dirty) { |
| 963 | /* Check stencil buffer */ | 963 | /* Check stencil buffer */ |
| 964 | if (G_028800_STENCIL_ENABLE(track->db_depth_control)) { | 964 | if (G_028044_FORMAT(track->db_s_info) != V_028044_STENCIL_INVALID && |
| 965 | G_028800_STENCIL_ENABLE(track->db_depth_control)) { | ||
| 965 | r = evergreen_cs_track_validate_stencil(p); | 966 | r = evergreen_cs_track_validate_stencil(p); |
| 966 | if (r) | 967 | if (r) |
| 967 | return r; | 968 | return r; |
| 968 | } | 969 | } |
| 969 | /* Check depth buffer */ | 970 | /* Check depth buffer */ |
| 970 | if (G_028800_Z_ENABLE(track->db_depth_control)) { | 971 | if (G_028040_FORMAT(track->db_z_info) != V_028040_Z_INVALID && |
| 972 | G_028800_Z_ENABLE(track->db_depth_control)) { | ||
| 971 | r = evergreen_cs_track_validate_depth(p); | 973 | r = evergreen_cs_track_validate_depth(p); |
| 972 | if (r) | 974 | if (r) |
| 973 | return r; | 975 | return r; |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index d3bd098e4e19..79347855d9bf 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
| @@ -1277,6 +1277,8 @@ | |||
| 1277 | #define S_028044_FORMAT(x) (((x) & 0x1) << 0) | 1277 | #define S_028044_FORMAT(x) (((x) & 0x1) << 0) |
| 1278 | #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) | 1278 | #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) |
| 1279 | #define C_028044_FORMAT 0xFFFFFFFE | 1279 | #define C_028044_FORMAT 0xFFFFFFFE |
| 1280 | #define V_028044_STENCIL_INVALID 0 | ||
| 1281 | #define V_028044_STENCIL_8 1 | ||
| 1280 | #define G_028044_TILE_SPLIT(x) (((x) >> 8) & 0x7) | 1282 | #define G_028044_TILE_SPLIT(x) (((x) >> 8) & 0x7) |
| 1281 | #define DB_Z_READ_BASE 0x28048 | 1283 | #define DB_Z_READ_BASE 0x28048 |
| 1282 | #define DB_STENCIL_READ_BASE 0x2804c | 1284 | #define DB_STENCIL_READ_BASE 0x2804c |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index ca87f7afaf23..1119e31e5c2f 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
| @@ -764,8 +764,10 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) | |||
| 764 | } | 764 | } |
| 765 | 765 | ||
| 766 | /* Check depth buffer */ | 766 | /* Check depth buffer */ |
| 767 | if (track->db_dirty && (G_028800_STENCIL_ENABLE(track->db_depth_control) || | 767 | if (track->db_dirty && |
| 768 | G_028800_Z_ENABLE(track->db_depth_control))) { | 768 | G_028010_FORMAT(track->db_depth_info) != V_028010_DEPTH_INVALID && |
| 769 | (G_028800_STENCIL_ENABLE(track->db_depth_control) || | ||
| 770 | G_028800_Z_ENABLE(track->db_depth_control))) { | ||
| 769 | r = r600_cs_track_validate_db(p); | 771 | r = r600_cs_track_validate_db(p); |
| 770 | if (r) | 772 | if (r) |
| 771 | return r; | 773 | return r; |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index dcea6f01ae4e..4b736ecb0aa5 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
| @@ -59,9 +59,10 @@ | |||
| 59 | * 2.15.0 - add max_pipes query | 59 | * 2.15.0 - add max_pipes query |
| 60 | * 2.16.0 - fix evergreen 2D tiled surface calculation | 60 | * 2.16.0 - fix evergreen 2D tiled surface calculation |
| 61 | * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx | 61 | * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx |
| 62 | * 2.18.0 - r600-eg: allow "invalid" DB formats | ||
| 62 | */ | 63 | */ |
| 63 | #define KMS_DRIVER_MAJOR 2 | 64 | #define KMS_DRIVER_MAJOR 2 |
| 64 | #define KMS_DRIVER_MINOR 17 | 65 | #define KMS_DRIVER_MINOR 18 |
| 65 | #define KMS_DRIVER_PATCHLEVEL 0 | 66 | #define KMS_DRIVER_PATCHLEVEL 0 |
| 66 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 67 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
| 67 | int radeon_driver_unload_kms(struct drm_device *dev); | 68 | int radeon_driver_unload_kms(struct drm_device *dev); |
