diff options
| -rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-omap.txt | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/bcm2835.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/cros5250-common.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap-zoom-common.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap2.dtsi | 96 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap2420.dtsi | 23 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap2430.dtsi | 49 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/common.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/display.c | 78 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/gpmc.c | 58 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap-secure.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 57 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prm44xx_54xx.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-vexpress/spc.c | 40 | ||||
| -rw-r--r-- | arch/arm/mach-vexpress/spc.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-vexpress/tc2_pm.c | 66 | ||||
| -rw-r--r-- | drivers/gpio/gpio-twl4030.c | 13 | ||||
| -rw-r--r-- | drivers/i2c/busses/i2c-omap.c | 22 | ||||
| -rw-r--r-- | include/linux/tegra-powergate.h | 27 |
22 files changed, 379 insertions, 192 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt index 56564aa4b444..7e49839d4124 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-omap.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-omap.txt | |||
| @@ -1,7 +1,8 @@ | |||
| 1 | I2C for OMAP platforms | 1 | I2C for OMAP platforms |
| 2 | 2 | ||
| 3 | Required properties : | 3 | Required properties : |
| 4 | - compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c" | 4 | - compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c" |
| 5 | or "ti,omap4-i2c" | ||
| 5 | - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based) | 6 | - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based) |
| 6 | - #address-cells = <1>; | 7 | - #address-cells = <1>; |
| 7 | - #size-cells = <0>; | 8 | - #size-cells = <0>; |
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 1e12aeff403b..aa537ed13f0a 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi | |||
| @@ -85,6 +85,8 @@ | |||
| 85 | reg = <0x7e205000 0x1000>; | 85 | reg = <0x7e205000 0x1000>; |
| 86 | interrupts = <2 21>; | 86 | interrupts = <2 21>; |
| 87 | clocks = <&clk_i2c>; | 87 | clocks = <&clk_i2c>; |
| 88 | #address-cells = <1>; | ||
| 89 | #size-cells = <0>; | ||
| 88 | status = "disabled"; | 90 | status = "disabled"; |
| 89 | }; | 91 | }; |
| 90 | 92 | ||
| @@ -93,6 +95,8 @@ | |||
| 93 | reg = <0x7e804000 0x1000>; | 95 | reg = <0x7e804000 0x1000>; |
| 94 | interrupts = <2 21>; | 96 | interrupts = <2 21>; |
| 95 | clocks = <&clk_i2c>; | 97 | clocks = <&clk_i2c>; |
| 98 | #address-cells = <1>; | ||
| 99 | #size-cells = <0>; | ||
| 96 | status = "disabled"; | 100 | status = "disabled"; |
| 97 | }; | 101 | }; |
| 98 | 102 | ||
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index dc259e8b8a73..9b186ac06c8b 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi | |||
| @@ -27,6 +27,13 @@ | |||
| 27 | i2c2_bus: i2c2-bus { | 27 | i2c2_bus: i2c2-bus { |
| 28 | samsung,pin-pud = <0>; | 28 | samsung,pin-pud = <0>; |
| 29 | }; | 29 | }; |
| 30 | |||
| 31 | max77686_irq: max77686-irq { | ||
| 32 | samsung,pins = "gpx3-2"; | ||
| 33 | samsung,pin-function = <0>; | ||
| 34 | samsung,pin-pud = <0>; | ||
| 35 | samsung,pin-drv = <0>; | ||
| 36 | }; | ||
| 30 | }; | 37 | }; |
| 31 | 38 | ||
| 32 | i2c@12C60000 { | 39 | i2c@12C60000 { |
| @@ -35,6 +42,11 @@ | |||
| 35 | 42 | ||
| 36 | max77686@09 { | 43 | max77686@09 { |
| 37 | compatible = "maxim,max77686"; | 44 | compatible = "maxim,max77686"; |
| 45 | interrupt-parent = <&gpx3>; | ||
| 46 | interrupts = <2 0>; | ||
| 47 | pinctrl-names = "default"; | ||
| 48 | pinctrl-0 = <&max77686_irq>; | ||
| 49 | wakeup-source; | ||
| 38 | reg = <0x09>; | 50 | reg = <0x09>; |
| 39 | 51 | ||
| 40 | voltage-regulators { | 52 | voltage-regulators { |
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 59154dc15fe4..fb28b2ecb1db 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi | |||
| @@ -161,7 +161,7 @@ | |||
| 161 | clocks = <&clks 197>, <&clks 3>, | 161 | clocks = <&clks 197>, <&clks 3>, |
| 162 | <&clks 197>, <&clks 107>, | 162 | <&clks 197>, <&clks 107>, |
| 163 | <&clks 0>, <&clks 118>, | 163 | <&clks 0>, <&clks 118>, |
| 164 | <&clks 62>, <&clks 139>, | 164 | <&clks 0>, <&clks 139>, |
| 165 | <&clks 0>; | 165 | <&clks 0>; |
| 166 | clock-names = "core", "rxtx0", | 166 | clock-names = "core", "rxtx0", |
| 167 | "rxtx1", "rxtx2", | 167 | "rxtx1", "rxtx2", |
diff --git a/arch/arm/boot/dts/omap-zoom-common.dtsi b/arch/arm/boot/dts/omap-zoom-common.dtsi index b0ee342598f0..68221fab978d 100644 --- a/arch/arm/boot/dts/omap-zoom-common.dtsi +++ b/arch/arm/boot/dts/omap-zoom-common.dtsi | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | * they probably share the same GPIO IRQ | 13 | * they probably share the same GPIO IRQ |
| 14 | * REVISIT: Add timing support from slls644g.pdf | 14 | * REVISIT: Add timing support from slls644g.pdf |
| 15 | */ | 15 | */ |
| 16 | 8250@3,0 { | 16 | uart@3,0 { |
| 17 | compatible = "ns16550a"; | 17 | compatible = "ns16550a"; |
| 18 | reg = <3 0 0x100>; | 18 | reg = <3 0 0x100>; |
| 19 | bank-width = <2>; | 19 | bank-width = <2>; |
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index a2bfcde858a6..d0c5b37e248c 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | #include <dt-bindings/gpio/gpio.h> | 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | #include <dt-bindings/interrupt-controller/irq.h> | ||
| 12 | #include <dt-bindings/pinctrl/omap.h> | 13 | #include <dt-bindings/pinctrl/omap.h> |
| 13 | 14 | ||
| 14 | #include "skeleton.dtsi" | 15 | #include "skeleton.dtsi" |
| @@ -21,6 +22,8 @@ | |||
| 21 | serial0 = &uart1; | 22 | serial0 = &uart1; |
| 22 | serial1 = &uart2; | 23 | serial1 = &uart2; |
| 23 | serial2 = &uart3; | 24 | serial2 = &uart3; |
| 25 | i2c0 = &i2c1; | ||
| 26 | i2c1 = &i2c2; | ||
| 24 | }; | 27 | }; |
| 25 | 28 | ||
| 26 | cpus { | 29 | cpus { |
| @@ -53,6 +56,28 @@ | |||
| 53 | ranges; | 56 | ranges; |
| 54 | ti,hwmods = "l3_main"; | 57 | ti,hwmods = "l3_main"; |
| 55 | 58 | ||
| 59 | aes: aes@480a6000 { | ||
| 60 | compatible = "ti,omap2-aes"; | ||
| 61 | ti,hwmods = "aes"; | ||
| 62 | reg = <0x480a6000 0x50>; | ||
| 63 | dmas = <&sdma 9 &sdma 10>; | ||
| 64 | dma-names = "tx", "rx"; | ||
| 65 | }; | ||
| 66 | |||
| 67 | hdq1w: 1w@480b2000 { | ||
| 68 | compatible = "ti,omap2420-1w"; | ||
| 69 | ti,hwmods = "hdq1w"; | ||
| 70 | reg = <0x480b2000 0x1000>; | ||
| 71 | interrupts = <58>; | ||
| 72 | }; | ||
| 73 | |||
| 74 | mailbox: mailbox@48094000 { | ||
| 75 | compatible = "ti,omap2-mailbox"; | ||
| 76 | ti,hwmods = "mailbox"; | ||
| 77 | reg = <0x48094000 0x200>; | ||
| 78 | interrupts = <26>; | ||
| 79 | }; | ||
| 80 | |||
| 56 | intc: interrupt-controller@1 { | 81 | intc: interrupt-controller@1 { |
| 57 | compatible = "ti,omap2-intc"; | 82 | compatible = "ti,omap2-intc"; |
| 58 | interrupt-controller; | 83 | interrupt-controller; |
| @@ -63,6 +88,7 @@ | |||
| 63 | 88 | ||
| 64 | sdma: dma-controller@48056000 { | 89 | sdma: dma-controller@48056000 { |
| 65 | compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; | 90 | compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; |
| 91 | ti,hwmods = "dma"; | ||
| 66 | reg = <0x48056000 0x1000>; | 92 | reg = <0x48056000 0x1000>; |
| 67 | interrupts = <12>, | 93 | interrupts = <12>, |
| 68 | <13>, | 94 | <13>, |
| @@ -73,21 +99,91 @@ | |||
| 73 | #dma-requests = <64>; | 99 | #dma-requests = <64>; |
| 74 | }; | 100 | }; |
| 75 | 101 | ||
| 102 | i2c1: i2c@48070000 { | ||
| 103 | compatible = "ti,omap2-i2c"; | ||
| 104 | ti,hwmods = "i2c1"; | ||
| 105 | reg = <0x48070000 0x80>; | ||
| 106 | #address-cells = <1>; | ||
| 107 | #size-cells = <0>; | ||
| 108 | interrupts = <56>; | ||
| 109 | dmas = <&sdma 27 &sdma 28>; | ||
| 110 | dma-names = "tx", "rx"; | ||
| 111 | }; | ||
| 112 | |||
| 113 | i2c2: i2c@48072000 { | ||
| 114 | compatible = "ti,omap2-i2c"; | ||
| 115 | ti,hwmods = "i2c2"; | ||
| 116 | reg = <0x48072000 0x80>; | ||
| 117 | #address-cells = <1>; | ||
| 118 | #size-cells = <0>; | ||
| 119 | interrupts = <57>; | ||
| 120 | dmas = <&sdma 29 &sdma 30>; | ||
| 121 | dma-names = "tx", "rx"; | ||
| 122 | }; | ||
| 123 | |||
| 124 | mcspi1: mcspi@48098000 { | ||
| 125 | compatible = "ti,omap2-mcspi"; | ||
| 126 | ti,hwmods = "mcspi1"; | ||
| 127 | reg = <0x48098000 0x100>; | ||
| 128 | interrupts = <65>; | ||
| 129 | dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38 | ||
| 130 | &sdma 39 &sdma 40 &sdma 41 &sdma 42>; | ||
| 131 | dma-names = "tx0", "rx0", "tx1", "rx1", | ||
| 132 | "tx2", "rx2", "tx3", "rx3"; | ||
| 133 | }; | ||
| 134 | |||
| 135 | mcspi2: mcspi@4809a000 { | ||
| 136 | compatible = "ti,omap2-mcspi"; | ||
| 137 | ti,hwmods = "mcspi2"; | ||
| 138 | reg = <0x4809a000 0x100>; | ||
| 139 | interrupts = <66>; | ||
| 140 | dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>; | ||
| 141 | dma-names = "tx0", "rx0", "tx1", "rx1"; | ||
| 142 | }; | ||
| 143 | |||
| 144 | rng: rng@480a0000 { | ||
| 145 | compatible = "ti,omap2-rng"; | ||
| 146 | ti,hwmods = "rng"; | ||
| 147 | reg = <0x480a0000 0x50>; | ||
| 148 | interrupts = <36>; | ||
| 149 | }; | ||
| 150 | |||
| 151 | sham: sham@480a4000 { | ||
| 152 | compatible = "ti,omap2-sham"; | ||
| 153 | ti,hwmods = "sham"; | ||
| 154 | reg = <0x480a4000 0x64>; | ||
| 155 | interrupts = <51>; | ||
| 156 | dmas = <&sdma 13>; | ||
| 157 | dma-names = "rx"; | ||
| 158 | }; | ||
| 159 | |||
| 76 | uart1: serial@4806a000 { | 160 | uart1: serial@4806a000 { |
| 77 | compatible = "ti,omap2-uart"; | 161 | compatible = "ti,omap2-uart"; |
| 78 | ti,hwmods = "uart1"; | 162 | ti,hwmods = "uart1"; |
| 163 | reg = <0x4806a000 0x2000>; | ||
| 164 | interrupts = <72>; | ||
| 165 | dmas = <&sdma 49 &sdma 50>; | ||
| 166 | dma-names = "tx", "rx"; | ||
| 79 | clock-frequency = <48000000>; | 167 | clock-frequency = <48000000>; |
| 80 | }; | 168 | }; |
| 81 | 169 | ||
| 82 | uart2: serial@4806c000 { | 170 | uart2: serial@4806c000 { |
| 83 | compatible = "ti,omap2-uart"; | 171 | compatible = "ti,omap2-uart"; |
| 84 | ti,hwmods = "uart2"; | 172 | ti,hwmods = "uart2"; |
| 173 | reg = <0x4806c000 0x400>; | ||
| 174 | interrupts = <73>; | ||
| 175 | dmas = <&sdma 51 &sdma 52>; | ||
| 176 | dma-names = "tx", "rx"; | ||
| 85 | clock-frequency = <48000000>; | 177 | clock-frequency = <48000000>; |
| 86 | }; | 178 | }; |
| 87 | 179 | ||
| 88 | uart3: serial@4806e000 { | 180 | uart3: serial@4806e000 { |
| 89 | compatible = "ti,omap2-uart"; | 181 | compatible = "ti,omap2-uart"; |
| 90 | ti,hwmods = "uart3"; | 182 | ti,hwmods = "uart3"; |
| 183 | reg = <0x4806e000 0x400>; | ||
| 184 | interrupts = <74>; | ||
| 185 | dmas = <&sdma 53 &sdma 54>; | ||
| 186 | dma-names = "tx", "rx"; | ||
| 91 | clock-frequency = <48000000>; | 187 | clock-frequency = <48000000>; |
| 92 | }; | 188 | }; |
| 93 | 189 | ||
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index c8f9c55169ea..60c605de22dd 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi | |||
| @@ -114,6 +114,15 @@ | |||
| 114 | dma-names = "tx", "rx"; | 114 | dma-names = "tx", "rx"; |
| 115 | }; | 115 | }; |
| 116 | 116 | ||
| 117 | msdi1: mmc@4809c000 { | ||
| 118 | compatible = "ti,omap2420-mmc"; | ||
| 119 | ti,hwmods = "msdi1"; | ||
| 120 | reg = <0x4809c000 0x80>; | ||
| 121 | interrupts = <83>; | ||
| 122 | dmas = <&sdma 61 &sdma 62>; | ||
| 123 | dma-names = "tx", "rx"; | ||
| 124 | }; | ||
| 125 | |||
| 117 | timer1: timer@48028000 { | 126 | timer1: timer@48028000 { |
| 118 | compatible = "ti,omap2420-timer"; | 127 | compatible = "ti,omap2420-timer"; |
| 119 | reg = <0x48028000 0x400>; | 128 | reg = <0x48028000 0x400>; |
| @@ -121,5 +130,19 @@ | |||
| 121 | ti,hwmods = "timer1"; | 130 | ti,hwmods = "timer1"; |
| 122 | ti,timer-alwon; | 131 | ti,timer-alwon; |
| 123 | }; | 132 | }; |
| 133 | |||
| 134 | wd_timer2: wdt@48022000 { | ||
| 135 | compatible = "ti,omap2-wdt"; | ||
| 136 | ti,hwmods = "wd_timer2"; | ||
| 137 | reg = <0x48022000 0x80>; | ||
| 138 | }; | ||
| 124 | }; | 139 | }; |
| 125 | }; | 140 | }; |
| 141 | |||
| 142 | &i2c1 { | ||
| 143 | compatible = "ti,omap2420-i2c"; | ||
| 144 | }; | ||
| 145 | |||
| 146 | &i2c2 { | ||
| 147 | compatible = "ti,omap2420-i2c"; | ||
| 148 | }; | ||
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index c535a5a2b27f..d624345666f5 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi | |||
| @@ -175,6 +175,25 @@ | |||
| 175 | dma-names = "tx", "rx"; | 175 | dma-names = "tx", "rx"; |
| 176 | }; | 176 | }; |
| 177 | 177 | ||
| 178 | mmc1: mmc@4809c000 { | ||
| 179 | compatible = "ti,omap2-hsmmc"; | ||
| 180 | reg = <0x4809c000 0x200>; | ||
| 181 | interrupts = <83>; | ||
| 182 | ti,hwmods = "mmc1"; | ||
| 183 | ti,dual-volt; | ||
| 184 | dmas = <&sdma 61>, <&sdma 62>; | ||
| 185 | dma-names = "tx", "rx"; | ||
| 186 | }; | ||
| 187 | |||
| 188 | mmc2: mmc@480b4000 { | ||
| 189 | compatible = "ti,omap2-hsmmc"; | ||
| 190 | reg = <0x480b4000 0x200>; | ||
| 191 | interrupts = <86>; | ||
| 192 | ti,hwmods = "mmc2"; | ||
| 193 | dmas = <&sdma 47>, <&sdma 48>; | ||
| 194 | dma-names = "tx", "rx"; | ||
| 195 | }; | ||
| 196 | |||
| 178 | timer1: timer@49018000 { | 197 | timer1: timer@49018000 { |
| 179 | compatible = "ti,omap2420-timer"; | 198 | compatible = "ti,omap2420-timer"; |
| 180 | reg = <0x49018000 0x400>; | 199 | reg = <0x49018000 0x400>; |
| @@ -182,5 +201,35 @@ | |||
| 182 | ti,hwmods = "timer1"; | 201 | ti,hwmods = "timer1"; |
| 183 | ti,timer-alwon; | 202 | ti,timer-alwon; |
| 184 | }; | 203 | }; |
| 204 | |||
| 205 | mcspi3: mcspi@480b8000 { | ||
| 206 | compatible = "ti,omap2-mcspi"; | ||
| 207 | ti,hwmods = "mcspi3"; | ||
| 208 | reg = <0x480b8000 0x100>; | ||
| 209 | interrupts = <91>; | ||
| 210 | dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; | ||
| 211 | dma-names = "tx0", "rx0", "tx1", "rx1"; | ||
| 212 | }; | ||
| 213 | |||
| 214 | usb_otg_hs: usb_otg_hs@480ac000 { | ||
| 215 | compatible = "ti,omap2-musb"; | ||
| 216 | ti,hwmods = "usb_otg_hs"; | ||
| 217 | reg = <0x480ac000 0x1000>; | ||
| 218 | interrupts = <93>; | ||
| 219 | }; | ||
| 220 | |||
| 221 | wd_timer2: wdt@49016000 { | ||
| 222 | compatible = "ti,omap2-wdt"; | ||
| 223 | ti,hwmods = "wd_timer2"; | ||
| 224 | reg = <0x49016000 0x80>; | ||
| 225 | }; | ||
| 185 | }; | 226 | }; |
| 186 | }; | 227 | }; |
| 228 | |||
| 229 | &i2c1 { | ||
| 230 | compatible = "ti,omap2430-i2c"; | ||
| 231 | }; | ||
| 232 | |||
| 233 | &i2c2 { | ||
| 234 | compatible = "ti,omap2430-i2c"; | ||
| 235 | }; | ||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 1f25f3e99c05..adcef406ff0a 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -19,11 +19,11 @@ secure-common = omap-smc.o omap-secure.o | |||
| 19 | 19 | ||
| 20 | obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) | 20 | obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) |
| 21 | obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) | 21 | obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) |
| 22 | obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) | 22 | obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) |
| 23 | obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) | 23 | obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) |
| 24 | obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) | 24 | obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common) |
| 25 | obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) | 25 | obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) |
| 26 | obj-$(CONFIG_SOC_DRA7XX) += prm44xx.o $(hwmod-common) $(secure-common) | 26 | obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common) |
| 27 | 27 | ||
| 28 | ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) | 28 | ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) |
| 29 | obj-y += mcbsp.o | 29 | obj-y += mcbsp.o |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index f7644febee81..e30ef6797c63 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
| @@ -299,7 +299,6 @@ struct omap_sdrc_params; | |||
| 299 | extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | 299 | extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, |
| 300 | struct omap_sdrc_params *sdrc_cs1); | 300 | struct omap_sdrc_params *sdrc_cs1); |
| 301 | struct omap2_hsmmc_info; | 301 | struct omap2_hsmmc_info; |
| 302 | extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); | ||
| 303 | extern void omap_reserve(void); | 302 | extern void omap_reserve(void); |
| 304 | 303 | ||
| 305 | struct omap_hwmod; | 304 | struct omap_hwmod; |
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index a4e536b11ec9..58347bb874a0 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | 32 | ||
| 33 | #include "soc.h" | 33 | #include "soc.h" |
| 34 | #include "iomap.h" | 34 | #include "iomap.h" |
| 35 | #include "mux.h" | ||
| 36 | #include "control.h" | 35 | #include "control.h" |
| 37 | #include "display.h" | 36 | #include "display.h" |
| 38 | #include "prm.h" | 37 | #include "prm.h" |
| @@ -102,90 +101,13 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = { | |||
| 102 | { "dss_hdmi", "omapdss_hdmi", -1 }, | 101 | { "dss_hdmi", "omapdss_hdmi", -1 }, |
| 103 | }; | 102 | }; |
| 104 | 103 | ||
| 105 | static void __init omap4_tpd12s015_mux_pads(void) | ||
| 106 | { | ||
| 107 | omap_mux_init_signal("hdmi_cec", | ||
| 108 | OMAP_PIN_INPUT_PULLUP); | ||
| 109 | omap_mux_init_signal("hdmi_ddc_scl", | ||
| 110 | OMAP_PIN_INPUT_PULLUP); | ||
| 111 | omap_mux_init_signal("hdmi_ddc_sda", | ||
| 112 | OMAP_PIN_INPUT_PULLUP); | ||
| 113 | } | ||
| 114 | |||
| 115 | static void __init omap4_hdmi_mux_pads(enum omap_hdmi_flags flags) | ||
| 116 | { | ||
| 117 | u32 reg; | ||
| 118 | u16 control_i2c_1; | ||
| 119 | |||
| 120 | /* | ||
| 121 | * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and | ||
| 122 | * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable | ||
| 123 | * internal pull up resistor. | ||
| 124 | */ | ||
| 125 | if (flags & OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP) { | ||
| 126 | control_i2c_1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1; | ||
| 127 | reg = omap4_ctrl_pad_readl(control_i2c_1); | ||
| 128 | reg |= (OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK | | ||
| 129 | OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK); | ||
| 130 | omap4_ctrl_pad_writel(reg, control_i2c_1); | ||
| 131 | } | ||
| 132 | } | ||
| 133 | |||
| 134 | static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) | ||
| 135 | { | ||
| 136 | u32 enable_mask, enable_shift; | ||
| 137 | u32 pipd_mask, pipd_shift; | ||
| 138 | u32 reg; | ||
| 139 | |||
| 140 | if (dsi_id == 0) { | ||
| 141 | enable_mask = OMAP4_DSI1_LANEENABLE_MASK; | ||
| 142 | enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT; | ||
| 143 | pipd_mask = OMAP4_DSI1_PIPD_MASK; | ||
| 144 | pipd_shift = OMAP4_DSI1_PIPD_SHIFT; | ||
| 145 | } else if (dsi_id == 1) { | ||
| 146 | enable_mask = OMAP4_DSI2_LANEENABLE_MASK; | ||
| 147 | enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT; | ||
| 148 | pipd_mask = OMAP4_DSI2_PIPD_MASK; | ||
| 149 | pipd_shift = OMAP4_DSI2_PIPD_SHIFT; | ||
| 150 | } else { | ||
| 151 | return -ENODEV; | ||
| 152 | } | ||
| 153 | |||
| 154 | reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); | ||
| 155 | |||
| 156 | reg &= ~enable_mask; | ||
| 157 | reg &= ~pipd_mask; | ||
| 158 | |||
| 159 | reg |= (lanes << enable_shift) & enable_mask; | ||
| 160 | reg |= (lanes << pipd_shift) & pipd_mask; | ||
| 161 | |||
| 162 | omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); | ||
| 163 | |||
| 164 | return 0; | ||
| 165 | } | ||
| 166 | |||
| 167 | int __init omap_hdmi_init(enum omap_hdmi_flags flags) | ||
| 168 | { | ||
| 169 | if (cpu_is_omap44xx()) { | ||
| 170 | omap4_hdmi_mux_pads(flags); | ||
| 171 | omap4_tpd12s015_mux_pads(); | ||
| 172 | } | ||
| 173 | |||
| 174 | return 0; | ||
| 175 | } | ||
| 176 | |||
| 177 | static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) | 104 | static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) |
| 178 | { | 105 | { |
| 179 | if (cpu_is_omap44xx()) | ||
| 180 | return omap4_dsi_mux_pads(dsi_id, lane_mask); | ||
| 181 | |||
| 182 | return 0; | 106 | return 0; |
| 183 | } | 107 | } |
| 184 | 108 | ||
| 185 | static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) | 109 | static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) |
| 186 | { | 110 | { |
| 187 | if (cpu_is_omap44xx()) | ||
| 188 | omap4_dsi_mux_pads(dsi_id, 0); | ||
| 189 | } | 111 | } |
| 190 | 112 | ||
| 191 | static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput) | 113 | static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput) |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 81de56251955..d24926e6340f 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
| @@ -1502,6 +1502,22 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, | |||
| 1502 | } | 1502 | } |
| 1503 | 1503 | ||
| 1504 | /* | 1504 | /* |
| 1505 | * For some GPMC devices we still need to rely on the bootloader | ||
| 1506 | * timings because the devices can be connected via FPGA. So far | ||
| 1507 | * the list is smc91x on the omap2 SDP boards, and 8250 on zooms. | ||
| 1508 | * REVISIT: Add timing support from slls644g.pdf and from the | ||
| 1509 | * lan91c96 manual. | ||
| 1510 | */ | ||
| 1511 | if (of_device_is_compatible(child, "ns16550a") || | ||
| 1512 | of_device_is_compatible(child, "smsc,lan91c94") || | ||
| 1513 | of_device_is_compatible(child, "smsc,lan91c111")) { | ||
| 1514 | dev_warn(&pdev->dev, | ||
| 1515 | "%s using bootloader timings on CS%d\n", | ||
| 1516 | child->name, cs); | ||
| 1517 | goto no_timings; | ||
| 1518 | } | ||
| 1519 | |||
| 1520 | /* | ||
| 1505 | * FIXME: gpmc_cs_request() will map the CS to an arbitary | 1521 | * FIXME: gpmc_cs_request() will map the CS to an arbitary |
| 1506 | * location in the gpmc address space. When booting with | 1522 | * location in the gpmc address space. When booting with |
| 1507 | * device-tree we want the NOR flash to be mapped to the | 1523 | * device-tree we want the NOR flash to be mapped to the |
| @@ -1529,6 +1545,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, | |||
| 1529 | gpmc_read_timings_dt(child, &gpmc_t); | 1545 | gpmc_read_timings_dt(child, &gpmc_t); |
| 1530 | gpmc_cs_set_timings(cs, &gpmc_t); | 1546 | gpmc_cs_set_timings(cs, &gpmc_t); |
| 1531 | 1547 | ||
| 1548 | no_timings: | ||
| 1532 | if (of_platform_device_create(child, NULL, &pdev->dev)) | 1549 | if (of_platform_device_create(child, NULL, &pdev->dev)) |
| 1533 | return 0; | 1550 | return 0; |
| 1534 | 1551 | ||
| @@ -1541,42 +1558,6 @@ err: | |||
| 1541 | return ret; | 1558 | return ret; |
| 1542 | } | 1559 | } |
| 1543 | 1560 | ||
| 1544 | /* | ||
| 1545 | * REVISIT: Add timing support from slls644g.pdf | ||
| 1546 | */ | ||
| 1547 | static int gpmc_probe_8250(struct platform_device *pdev, | ||
| 1548 | struct device_node *child) | ||
| 1549 | { | ||
| 1550 | struct resource res; | ||
| 1551 | unsigned long base; | ||
| 1552 | int ret, cs; | ||
| 1553 | |||
| 1554 | if (of_property_read_u32(child, "reg", &cs) < 0) { | ||
| 1555 | dev_err(&pdev->dev, "%s has no 'reg' property\n", | ||
| 1556 | child->full_name); | ||
| 1557 | return -ENODEV; | ||
| 1558 | } | ||
| 1559 | |||
| 1560 | if (of_address_to_resource(child, 0, &res) < 0) { | ||
| 1561 | dev_err(&pdev->dev, "%s has malformed 'reg' property\n", | ||
| 1562 | child->full_name); | ||
| 1563 | return -ENODEV; | ||
| 1564 | } | ||
| 1565 | |||
| 1566 | ret = gpmc_cs_request(cs, resource_size(&res), &base); | ||
| 1567 | if (ret < 0) { | ||
| 1568 | dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); | ||
| 1569 | return ret; | ||
| 1570 | } | ||
| 1571 | |||
| 1572 | if (of_platform_device_create(child, NULL, &pdev->dev)) | ||
| 1573 | return 0; | ||
| 1574 | |||
| 1575 | dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); | ||
| 1576 | |||
| 1577 | return -ENODEV; | ||
| 1578 | } | ||
| 1579 | |||
| 1580 | static int gpmc_probe_dt(struct platform_device *pdev) | 1561 | static int gpmc_probe_dt(struct platform_device *pdev) |
| 1581 | { | 1562 | { |
| 1582 | int ret; | 1563 | int ret; |
| @@ -1618,10 +1599,9 @@ static int gpmc_probe_dt(struct platform_device *pdev) | |||
| 1618 | else if (of_node_cmp(child->name, "onenand") == 0) | 1599 | else if (of_node_cmp(child->name, "onenand") == 0) |
| 1619 | ret = gpmc_probe_onenand_child(pdev, child); | 1600 | ret = gpmc_probe_onenand_child(pdev, child); |
| 1620 | else if (of_node_cmp(child->name, "ethernet") == 0 || | 1601 | else if (of_node_cmp(child->name, "ethernet") == 0 || |
| 1621 | of_node_cmp(child->name, "nor") == 0) | 1602 | of_node_cmp(child->name, "nor") == 0 || |
| 1603 | of_node_cmp(child->name, "uart") == 0) | ||
| 1622 | ret = gpmc_probe_generic_child(pdev, child); | 1604 | ret = gpmc_probe_generic_child(pdev, child); |
| 1623 | else if (of_node_cmp(child->name, "8250") == 0) | ||
| 1624 | ret = gpmc_probe_8250(pdev, child); | ||
| 1625 | 1605 | ||
| 1626 | if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", | 1606 | if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", |
| 1627 | __func__, child->full_name)) | 1607 | __func__, child->full_name)) |
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index 8cc7d331437d..3e97c6c8ecf1 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h | |||
| @@ -76,6 +76,13 @@ static inline void omap_barrier_reserve_memblock(void) | |||
| 76 | { } | 76 | { } |
| 77 | #endif | 77 | #endif |
| 78 | 78 | ||
| 79 | #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER | ||
| 79 | void set_cntfreq(void); | 80 | void set_cntfreq(void); |
| 81 | #else | ||
| 82 | static inline void set_cntfreq(void) | ||
| 83 | { | ||
| 84 | } | ||
| 85 | #endif | ||
| 86 | |||
| 80 | #endif /* __ASSEMBLER__ */ | 87 | #endif /* __ASSEMBLER__ */ |
| 81 | #endif /* OMAP_ARCH_OMAP_SECURE_H */ | 88 | #endif /* OMAP_ARCH_OMAP_SECURE_H */ |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 57911430324e..b39efd46abf9 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | #include "iomap.h" | 35 | #include "iomap.h" |
| 36 | #include "common.h" | 36 | #include "common.h" |
| 37 | #include "mmc.h" | 37 | #include "mmc.h" |
| 38 | #include "hsmmc.h" | ||
| 39 | #include "prminst44xx.h" | 38 | #include "prminst44xx.h" |
| 40 | #include "prcm_mpu44xx.h" | 39 | #include "prcm_mpu44xx.h" |
| 41 | #include "omap4-sar-layout.h" | 40 | #include "omap4-sar-layout.h" |
| @@ -284,59 +283,3 @@ skip_errata_init: | |||
| 284 | omap_wakeupgen_init(); | 283 | omap_wakeupgen_init(); |
| 285 | irqchip_init(); | 284 | irqchip_init(); |
| 286 | } | 285 | } |
| 287 | |||
| 288 | #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | ||
| 289 | static int omap4_twl6030_hsmmc_late_init(struct device *dev) | ||
| 290 | { | ||
| 291 | int irq = 0; | ||
| 292 | struct platform_device *pdev = container_of(dev, | ||
| 293 | struct platform_device, dev); | ||
| 294 | struct omap_mmc_platform_data *pdata = dev->platform_data; | ||
| 295 | |||
| 296 | /* Setting MMC1 Card detect Irq */ | ||
| 297 | if (pdev->id == 0) { | ||
| 298 | irq = twl6030_mmc_card_detect_config(); | ||
| 299 | if (irq < 0) { | ||
| 300 | dev_err(dev, "%s: Error card detect config(%d)\n", | ||
| 301 | __func__, irq); | ||
| 302 | return irq; | ||
| 303 | } | ||
| 304 | pdata->slots[0].card_detect_irq = irq; | ||
| 305 | pdata->slots[0].card_detect = twl6030_mmc_card_detect; | ||
| 306 | } | ||
| 307 | return 0; | ||
| 308 | } | ||
| 309 | |||
| 310 | static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev) | ||
| 311 | { | ||
| 312 | struct omap_mmc_platform_data *pdata; | ||
| 313 | |||
| 314 | /* dev can be null if CONFIG_MMC_OMAP_HS is not set */ | ||
| 315 | if (!dev) { | ||
| 316 | pr_err("Failed %s\n", __func__); | ||
| 317 | return; | ||
| 318 | } | ||
| 319 | pdata = dev->platform_data; | ||
| 320 | pdata->init = omap4_twl6030_hsmmc_late_init; | ||
| 321 | } | ||
| 322 | |||
| 323 | int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | ||
| 324 | { | ||
| 325 | struct omap2_hsmmc_info *c; | ||
| 326 | |||
| 327 | omap_hsmmc_init(controllers); | ||
| 328 | for (c = controllers; c->mmc; c++) { | ||
| 329 | /* pdev can be null if CONFIG_MMC_OMAP_HS is not set */ | ||
| 330 | if (!c->pdev) | ||
| 331 | continue; | ||
| 332 | omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev); | ||
| 333 | } | ||
| 334 | |||
| 335 | return 0; | ||
| 336 | } | ||
| 337 | #else | ||
| 338 | int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | ||
| 339 | { | ||
| 340 | return 0; | ||
| 341 | } | ||
| 342 | #endif | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 93b80e5da8d4..1f3770a8a728 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
| @@ -120,7 +120,7 @@ static void omap3_save_secure_ram_context(void) | |||
| 120 | * will hang the system. | 120 | * will hang the system. |
| 121 | */ | 121 | */ |
| 122 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); | 122 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); |
| 123 | ret = _omap_save_secure_sram((u32 *) | 123 | ret = _omap_save_secure_sram((u32 *)(unsigned long) |
| 124 | __pa(omap3_secure_ram_storage)); | 124 | __pa(omap3_secure_ram_storage)); |
| 125 | pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); | 125 | pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); |
| 126 | /* Following is for error tracking, it should not happen */ | 126 | /* Following is for error tracking, it should not happen */ |
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index 7a976065e138..8d95aa543ef5 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h | |||
| @@ -43,7 +43,7 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset); | |||
| 43 | extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); | 43 | extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); |
| 44 | 44 | ||
| 45 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ | 45 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ |
| 46 | defined(CONFIG_SOC_DRA7XX) | 46 | defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) |
| 47 | void omap44xx_prm_reconfigure_io_chain(void); | 47 | void omap44xx_prm_reconfigure_io_chain(void); |
| 48 | #else | 48 | #else |
| 49 | static inline void omap44xx_prm_reconfigure_io_chain(void) | 49 | static inline void omap44xx_prm_reconfigure_io_chain(void) |
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c index 033d34dcbd3f..c26ef5b92ca7 100644 --- a/arch/arm/mach-vexpress/spc.c +++ b/arch/arm/mach-vexpress/spc.c | |||
| @@ -53,6 +53,11 @@ | |||
| 53 | #define A15_BX_ADDR0 0x68 | 53 | #define A15_BX_ADDR0 0x68 |
| 54 | #define A7_BX_ADDR0 0x78 | 54 | #define A7_BX_ADDR0 0x78 |
| 55 | 55 | ||
| 56 | /* SPC CPU/cluster reset statue */ | ||
| 57 | #define STANDBYWFI_STAT 0x3c | ||
| 58 | #define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu)) | ||
| 59 | #define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu))) | ||
| 60 | |||
| 56 | /* SPC system config interface registers */ | 61 | /* SPC system config interface registers */ |
| 57 | #define SYSCFG_WDATA 0x70 | 62 | #define SYSCFG_WDATA 0x70 |
| 58 | #define SYSCFG_RDATA 0x74 | 63 | #define SYSCFG_RDATA 0x74 |
| @@ -213,6 +218,41 @@ void ve_spc_powerdown(u32 cluster, bool enable) | |||
| 213 | writel_relaxed(enable, info->baseaddr + pwdrn_reg); | 218 | writel_relaxed(enable, info->baseaddr + pwdrn_reg); |
| 214 | } | 219 | } |
| 215 | 220 | ||
| 221 | static u32 standbywfi_cpu_mask(u32 cpu, u32 cluster) | ||
| 222 | { | ||
| 223 | return cluster_is_a15(cluster) ? | ||
| 224 | STANDBYWFI_STAT_A15_CPU_MASK(cpu) | ||
| 225 | : STANDBYWFI_STAT_A7_CPU_MASK(cpu); | ||
| 226 | } | ||
| 227 | |||
| 228 | /** | ||
| 229 | * ve_spc_cpu_in_wfi(u32 cpu, u32 cluster) | ||
| 230 | * | ||
| 231 | * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster | ||
| 232 | * @cluster: mpidr[15:8] bitfield describing cluster affinity level | ||
| 233 | * | ||
| 234 | * @return: non-zero if and only if the specified CPU is in WFI | ||
| 235 | * | ||
| 236 | * Take care when interpreting the result of this function: a CPU might | ||
| 237 | * be in WFI temporarily due to idle, and is not necessarily safely | ||
| 238 | * parked. | ||
| 239 | */ | ||
| 240 | int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster) | ||
| 241 | { | ||
| 242 | int ret; | ||
| 243 | u32 mask = standbywfi_cpu_mask(cpu, cluster); | ||
| 244 | |||
| 245 | if (cluster >= MAX_CLUSTERS) | ||
| 246 | return 1; | ||
| 247 | |||
| 248 | ret = readl_relaxed(info->baseaddr + STANDBYWFI_STAT); | ||
| 249 | |||
| 250 | pr_debug("%s: PCFGREG[0x%X] = 0x%08X, mask = 0x%X\n", | ||
| 251 | __func__, STANDBYWFI_STAT, ret, mask); | ||
| 252 | |||
| 253 | return ret & mask; | ||
| 254 | } | ||
| 255 | |||
| 216 | static int ve_spc_get_performance(int cluster, u32 *freq) | 256 | static int ve_spc_get_performance(int cluster, u32 *freq) |
| 217 | { | 257 | { |
| 218 | struct ve_spc_opp *opps = info->opps[cluster]; | 258 | struct ve_spc_opp *opps = info->opps[cluster]; |
diff --git a/arch/arm/mach-vexpress/spc.h b/arch/arm/mach-vexpress/spc.h index dbd44c3720f9..793d065243b9 100644 --- a/arch/arm/mach-vexpress/spc.h +++ b/arch/arm/mach-vexpress/spc.h | |||
| @@ -20,5 +20,6 @@ void ve_spc_global_wakeup_irq(bool set); | |||
| 20 | void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set); | 20 | void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set); |
| 21 | void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr); | 21 | void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr); |
| 22 | void ve_spc_powerdown(u32 cluster, bool enable); | 22 | void ve_spc_powerdown(u32 cluster, bool enable); |
| 23 | int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster); | ||
| 23 | 24 | ||
| 24 | #endif | 25 | #endif |
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c index 05a364c5077a..29e7785a54bc 100644 --- a/arch/arm/mach-vexpress/tc2_pm.c +++ b/arch/arm/mach-vexpress/tc2_pm.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | #include <linux/delay.h> | ||
| 15 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 16 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 17 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
| @@ -32,11 +33,17 @@ | |||
| 32 | #include "spc.h" | 33 | #include "spc.h" |
| 33 | 34 | ||
| 34 | /* SCC conf registers */ | 35 | /* SCC conf registers */ |
| 36 | #define RESET_CTRL 0x018 | ||
| 37 | #define RESET_A15_NCORERESET(cpu) (1 << (2 + (cpu))) | ||
| 38 | #define RESET_A7_NCORERESET(cpu) (1 << (16 + (cpu))) | ||
| 39 | |||
| 35 | #define A15_CONF 0x400 | 40 | #define A15_CONF 0x400 |
| 36 | #define A7_CONF 0x500 | 41 | #define A7_CONF 0x500 |
| 37 | #define SYS_INFO 0x700 | 42 | #define SYS_INFO 0x700 |
| 38 | #define SPC_BASE 0xb00 | 43 | #define SPC_BASE 0xb00 |
| 39 | 44 | ||
| 45 | static void __iomem *scc; | ||
| 46 | |||
| 40 | /* | 47 | /* |
| 41 | * We can't use regular spinlocks. In the switcher case, it is possible | 48 | * We can't use regular spinlocks. In the switcher case, it is possible |
| 42 | * for an outbound CPU to call power_down() after its inbound counterpart | 49 | * for an outbound CPU to call power_down() after its inbound counterpart |
| @@ -190,6 +197,55 @@ static void tc2_pm_power_down(void) | |||
| 190 | tc2_pm_down(0); | 197 | tc2_pm_down(0); |
| 191 | } | 198 | } |
| 192 | 199 | ||
| 200 | static int tc2_core_in_reset(unsigned int cpu, unsigned int cluster) | ||
| 201 | { | ||
| 202 | u32 mask = cluster ? | ||
| 203 | RESET_A7_NCORERESET(cpu) | ||
| 204 | : RESET_A15_NCORERESET(cpu); | ||
| 205 | |||
| 206 | return !(readl_relaxed(scc + RESET_CTRL) & mask); | ||
| 207 | } | ||
| 208 | |||
| 209 | #define POLL_MSEC 10 | ||
| 210 | #define TIMEOUT_MSEC 1000 | ||
| 211 | |||
| 212 | static int tc2_pm_power_down_finish(unsigned int cpu, unsigned int cluster) | ||
| 213 | { | ||
| 214 | unsigned tries; | ||
| 215 | |||
| 216 | pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); | ||
| 217 | BUG_ON(cluster >= TC2_CLUSTERS || cpu >= TC2_MAX_CPUS_PER_CLUSTER); | ||
| 218 | |||
| 219 | for (tries = 0; tries < TIMEOUT_MSEC / POLL_MSEC; ++tries) { | ||
| 220 | /* | ||
| 221 | * Only examine the hardware state if the target CPU has | ||
| 222 | * caught up at least as far as tc2_pm_down(): | ||
| 223 | */ | ||
| 224 | if (ACCESS_ONCE(tc2_pm_use_count[cpu][cluster]) == 0) { | ||
| 225 | pr_debug("%s(cpu=%u, cluster=%u): RESET_CTRL = 0x%08X\n", | ||
| 226 | __func__, cpu, cluster, | ||
| 227 | readl_relaxed(scc + RESET_CTRL)); | ||
| 228 | |||
| 229 | /* | ||
| 230 | * We need the CPU to reach WFI, but the power | ||
| 231 | * controller may put the cluster in reset and | ||
| 232 | * power it off as soon as that happens, before | ||
| 233 | * we have a chance to see STANDBYWFI. | ||
| 234 | * | ||
| 235 | * So we need to check for both conditions: | ||
| 236 | */ | ||
| 237 | if (tc2_core_in_reset(cpu, cluster) || | ||
| 238 | ve_spc_cpu_in_wfi(cpu, cluster)) | ||
| 239 | return 0; /* success: the CPU is halted */ | ||
| 240 | } | ||
| 241 | |||
| 242 | /* Otherwise, wait and retry: */ | ||
| 243 | msleep(POLL_MSEC); | ||
| 244 | } | ||
| 245 | |||
| 246 | return -ETIMEDOUT; /* timeout */ | ||
| 247 | } | ||
| 248 | |||
| 193 | static void tc2_pm_suspend(u64 residency) | 249 | static void tc2_pm_suspend(u64 residency) |
| 194 | { | 250 | { |
| 195 | unsigned int mpidr, cpu, cluster; | 251 | unsigned int mpidr, cpu, cluster; |
| @@ -232,10 +288,11 @@ static void tc2_pm_powered_up(void) | |||
| 232 | } | 288 | } |
| 233 | 289 | ||
| 234 | static const struct mcpm_platform_ops tc2_pm_power_ops = { | 290 | static const struct mcpm_platform_ops tc2_pm_power_ops = { |
| 235 | .power_up = tc2_pm_power_up, | 291 | .power_up = tc2_pm_power_up, |
| 236 | .power_down = tc2_pm_power_down, | 292 | .power_down = tc2_pm_power_down, |
| 237 | .suspend = tc2_pm_suspend, | 293 | .power_down_finish = tc2_pm_power_down_finish, |
| 238 | .powered_up = tc2_pm_powered_up, | 294 | .suspend = tc2_pm_suspend, |
| 295 | .powered_up = tc2_pm_powered_up, | ||
| 239 | }; | 296 | }; |
| 240 | 297 | ||
| 241 | static bool __init tc2_pm_usage_count_init(void) | 298 | static bool __init tc2_pm_usage_count_init(void) |
| @@ -269,7 +326,6 @@ static void __naked tc2_pm_power_up_setup(unsigned int affinity_level) | |||
| 269 | static int __init tc2_pm_init(void) | 326 | static int __init tc2_pm_init(void) |
| 270 | { | 327 | { |
| 271 | int ret, irq; | 328 | int ret, irq; |
| 272 | void __iomem *scc; | ||
| 273 | u32 a15_cluster_id, a7_cluster_id, sys_info; | 329 | u32 a15_cluster_id, a7_cluster_id, sys_info; |
| 274 | struct device_node *np; | 330 | struct device_node *np; |
| 275 | 331 | ||
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c index 0c7e891c8651..b97d6a6577b9 100644 --- a/drivers/gpio/gpio-twl4030.c +++ b/drivers/gpio/gpio-twl4030.c | |||
| @@ -354,17 +354,18 @@ static void twl_set(struct gpio_chip *chip, unsigned offset, int value) | |||
| 354 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) | 354 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) |
| 355 | { | 355 | { |
| 356 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 356 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); |
| 357 | int ret = -EINVAL; | ||
| 357 | 358 | ||
| 358 | mutex_lock(&priv->mutex); | 359 | mutex_lock(&priv->mutex); |
| 359 | if (offset < TWL4030_GPIO_MAX) | 360 | if (offset < TWL4030_GPIO_MAX) |
| 360 | twl4030_set_gpio_dataout(offset, value); | 361 | ret = twl4030_set_gpio_direction(offset, 0); |
| 361 | 362 | ||
| 362 | priv->direction |= BIT(offset); | 363 | priv->direction |= BIT(offset); |
| 363 | mutex_unlock(&priv->mutex); | 364 | mutex_unlock(&priv->mutex); |
| 364 | 365 | ||
| 365 | twl_set(chip, offset, value); | 366 | twl_set(chip, offset, value); |
| 366 | 367 | ||
| 367 | return 0; | 368 | return ret; |
| 368 | } | 369 | } |
| 369 | 370 | ||
| 370 | static int twl_to_irq(struct gpio_chip *chip, unsigned offset) | 371 | static int twl_to_irq(struct gpio_chip *chip, unsigned offset) |
| @@ -435,7 +436,8 @@ static int gpio_twl4030_debounce(u32 debounce, u8 mmc_cd) | |||
| 435 | 436 | ||
| 436 | static int gpio_twl4030_remove(struct platform_device *pdev); | 437 | static int gpio_twl4030_remove(struct platform_device *pdev); |
| 437 | 438 | ||
| 438 | static struct twl4030_gpio_platform_data *of_gpio_twl4030(struct device *dev) | 439 | static struct twl4030_gpio_platform_data *of_gpio_twl4030(struct device *dev, |
| 440 | struct twl4030_gpio_platform_data *pdata) | ||
| 439 | { | 441 | { |
| 440 | struct twl4030_gpio_platform_data *omap_twl_info; | 442 | struct twl4030_gpio_platform_data *omap_twl_info; |
| 441 | 443 | ||
| @@ -443,6 +445,9 @@ static struct twl4030_gpio_platform_data *of_gpio_twl4030(struct device *dev) | |||
| 443 | if (!omap_twl_info) | 445 | if (!omap_twl_info) |
| 444 | return NULL; | 446 | return NULL; |
| 445 | 447 | ||
| 448 | if (pdata) | ||
| 449 | *omap_twl_info = *pdata; | ||
| 450 | |||
| 446 | omap_twl_info->use_leds = of_property_read_bool(dev->of_node, | 451 | omap_twl_info->use_leds = of_property_read_bool(dev->of_node, |
| 447 | "ti,use-leds"); | 452 | "ti,use-leds"); |
| 448 | 453 | ||
| @@ -500,7 +505,7 @@ no_irqs: | |||
| 500 | mutex_init(&priv->mutex); | 505 | mutex_init(&priv->mutex); |
| 501 | 506 | ||
| 502 | if (node) | 507 | if (node) |
| 503 | pdata = of_gpio_twl4030(&pdev->dev); | 508 | pdata = of_gpio_twl4030(&pdev->dev, pdata); |
| 504 | 509 | ||
| 505 | if (pdata == NULL) { | 510 | if (pdata == NULL) { |
| 506 | dev_err(&pdev->dev, "Platform data is missing\n"); | 511 | dev_err(&pdev->dev, "Platform data is missing\n"); |
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index a6a891d7970d..d76228d81d5f 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c | |||
| @@ -1037,6 +1037,20 @@ static const struct i2c_algorithm omap_i2c_algo = { | |||
| 1037 | }; | 1037 | }; |
| 1038 | 1038 | ||
| 1039 | #ifdef CONFIG_OF | 1039 | #ifdef CONFIG_OF |
| 1040 | static struct omap_i2c_bus_platform_data omap2420_pdata = { | ||
| 1041 | .rev = OMAP_I2C_IP_VERSION_1, | ||
| 1042 | .flags = OMAP_I2C_FLAG_NO_FIFO | | ||
| 1043 | OMAP_I2C_FLAG_SIMPLE_CLOCK | | ||
| 1044 | OMAP_I2C_FLAG_16BIT_DATA_REG | | ||
| 1045 | OMAP_I2C_FLAG_BUS_SHIFT_2, | ||
| 1046 | }; | ||
| 1047 | |||
| 1048 | static struct omap_i2c_bus_platform_data omap2430_pdata = { | ||
| 1049 | .rev = OMAP_I2C_IP_VERSION_1, | ||
| 1050 | .flags = OMAP_I2C_FLAG_BUS_SHIFT_2 | | ||
| 1051 | OMAP_I2C_FLAG_FORCE_19200_INT_CLK, | ||
| 1052 | }; | ||
| 1053 | |||
| 1040 | static struct omap_i2c_bus_platform_data omap3_pdata = { | 1054 | static struct omap_i2c_bus_platform_data omap3_pdata = { |
| 1041 | .rev = OMAP_I2C_IP_VERSION_1, | 1055 | .rev = OMAP_I2C_IP_VERSION_1, |
| 1042 | .flags = OMAP_I2C_FLAG_BUS_SHIFT_2, | 1056 | .flags = OMAP_I2C_FLAG_BUS_SHIFT_2, |
| @@ -1055,6 +1069,14 @@ static const struct of_device_id omap_i2c_of_match[] = { | |||
| 1055 | .compatible = "ti,omap3-i2c", | 1069 | .compatible = "ti,omap3-i2c", |
| 1056 | .data = &omap3_pdata, | 1070 | .data = &omap3_pdata, |
| 1057 | }, | 1071 | }, |
| 1072 | { | ||
| 1073 | .compatible = "ti,omap2430-i2c", | ||
| 1074 | .data = &omap2430_pdata, | ||
| 1075 | }, | ||
| 1076 | { | ||
| 1077 | .compatible = "ti,omap2420-i2c", | ||
| 1078 | .data = &omap2420_pdata, | ||
| 1079 | }, | ||
| 1058 | { }, | 1080 | { }, |
| 1059 | }; | 1081 | }; |
| 1060 | MODULE_DEVICE_TABLE(of, omap_i2c_of_match); | 1082 | MODULE_DEVICE_TABLE(of, omap_i2c_of_match); |
diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h index c98cfa406952..fd4498329c7c 100644 --- a/include/linux/tegra-powergate.h +++ b/include/linux/tegra-powergate.h | |||
| @@ -45,6 +45,7 @@ struct clk; | |||
| 45 | 45 | ||
| 46 | #define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D | 46 | #define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D |
| 47 | 47 | ||
| 48 | #ifdef CONFIG_ARCH_TEGRA | ||
| 48 | int tegra_powergate_is_powered(int id); | 49 | int tegra_powergate_is_powered(int id); |
| 49 | int tegra_powergate_power_on(int id); | 50 | int tegra_powergate_power_on(int id); |
| 50 | int tegra_powergate_power_off(int id); | 51 | int tegra_powergate_power_off(int id); |
| @@ -52,5 +53,31 @@ int tegra_powergate_remove_clamping(int id); | |||
| 52 | 53 | ||
| 53 | /* Must be called with clk disabled, and returns with clk enabled */ | 54 | /* Must be called with clk disabled, and returns with clk enabled */ |
| 54 | int tegra_powergate_sequence_power_up(int id, struct clk *clk); | 55 | int tegra_powergate_sequence_power_up(int id, struct clk *clk); |
| 56 | #else | ||
| 57 | static inline int tegra_powergate_is_powered(int id) | ||
| 58 | { | ||
| 59 | return -ENOSYS; | ||
| 60 | } | ||
| 61 | |||
| 62 | static inline int tegra_powergate_power_on(int id) | ||
| 63 | { | ||
| 64 | return -ENOSYS; | ||
| 65 | } | ||
| 66 | |||
| 67 | static inline int tegra_powergate_power_off(int id) | ||
| 68 | { | ||
| 69 | return -ENOSYS; | ||
| 70 | } | ||
| 71 | |||
| 72 | static inline int tegra_powergate_remove_clamping(int id) | ||
| 73 | { | ||
| 74 | return -ENOSYS; | ||
| 75 | } | ||
| 76 | |||
| 77 | static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk) | ||
| 78 | { | ||
| 79 | return -ENOSYS; | ||
| 80 | } | ||
| 81 | #endif | ||
| 55 | 82 | ||
| 56 | #endif /* _MACH_TEGRA_POWERGATE_H_ */ | 83 | #endif /* _MACH_TEGRA_POWERGATE_H_ */ |
