diff options
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_hdmi.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 12 |
2 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 65bb9841317b..83bd496ca6a3 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c | |||
@@ -1111,9 +1111,9 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) | |||
1111 | hdmi_regs_dump(hdata, "timing apply"); | 1111 | hdmi_regs_dump(hdata, "timing apply"); |
1112 | } | 1112 | } |
1113 | 1113 | ||
1114 | clk_disable(hdata->res.sclk_hdmi); | 1114 | clk_disable_unprepare(hdata->res.sclk_hdmi); |
1115 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); | 1115 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); |
1116 | clk_enable(hdata->res.sclk_hdmi); | 1116 | clk_prepare_enable(hdata->res.sclk_hdmi); |
1117 | 1117 | ||
1118 | /* enable HDMI and timing generator */ | 1118 | /* enable HDMI and timing generator */ |
1119 | hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); | 1119 | hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); |
@@ -1278,9 +1278,9 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) | |||
1278 | hdmi_regs_dump(hdata, "timing apply"); | 1278 | hdmi_regs_dump(hdata, "timing apply"); |
1279 | } | 1279 | } |
1280 | 1280 | ||
1281 | clk_disable(hdata->res.sclk_hdmi); | 1281 | clk_disable_unprepare(hdata->res.sclk_hdmi); |
1282 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); | 1282 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); |
1283 | clk_enable(hdata->res.sclk_hdmi); | 1283 | clk_prepare_enable(hdata->res.sclk_hdmi); |
1284 | 1284 | ||
1285 | /* enable HDMI and timing generator */ | 1285 | /* enable HDMI and timing generator */ |
1286 | hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); | 1286 | hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); |
@@ -1304,9 +1304,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) | |||
1304 | u8 buffer[2]; | 1304 | u8 buffer[2]; |
1305 | u32 reg; | 1305 | u32 reg; |
1306 | 1306 | ||
1307 | clk_disable(hdata->res.sclk_hdmi); | 1307 | clk_disable_unprepare(hdata->res.sclk_hdmi); |
1308 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel); | 1308 | clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel); |
1309 | clk_enable(hdata->res.sclk_hdmi); | 1309 | clk_prepare_enable(hdata->res.sclk_hdmi); |
1310 | 1310 | ||
1311 | /* operation mode */ | 1311 | /* operation mode */ |
1312 | buffer[0] = 0x1f; | 1312 | buffer[0] = 0x1f; |
@@ -1683,9 +1683,9 @@ static void hdmi_poweron(struct hdmi_context *hdata) | |||
1683 | if (regulator_bulk_enable(res->regul_count, res->regul_bulk)) | 1683 | if (regulator_bulk_enable(res->regul_count, res->regul_bulk)) |
1684 | DRM_DEBUG_KMS("failed to enable regulator bulk\n"); | 1684 | DRM_DEBUG_KMS("failed to enable regulator bulk\n"); |
1685 | 1685 | ||
1686 | clk_enable(res->hdmiphy); | 1686 | clk_prepare_enable(res->hdmiphy); |
1687 | clk_enable(res->hdmi); | 1687 | clk_prepare_enable(res->hdmi); |
1688 | clk_enable(res->sclk_hdmi); | 1688 | clk_prepare_enable(res->sclk_hdmi); |
1689 | 1689 | ||
1690 | hdmiphy_poweron(hdata); | 1690 | hdmiphy_poweron(hdata); |
1691 | } | 1691 | } |
@@ -1706,9 +1706,9 @@ static void hdmi_poweroff(struct hdmi_context *hdata) | |||
1706 | hdmiphy_conf_reset(hdata); | 1706 | hdmiphy_conf_reset(hdata); |
1707 | hdmiphy_poweroff(hdata); | 1707 | hdmiphy_poweroff(hdata); |
1708 | 1708 | ||
1709 | clk_disable(res->sclk_hdmi); | 1709 | clk_disable_unprepare(res->sclk_hdmi); |
1710 | clk_disable(res->hdmi); | 1710 | clk_disable_unprepare(res->hdmi); |
1711 | clk_disable(res->hdmiphy); | 1711 | clk_disable_unprepare(res->hdmiphy); |
1712 | regulator_bulk_disable(res->regul_count, res->regul_bulk); | 1712 | regulator_bulk_disable(res->regul_count, res->regul_bulk); |
1713 | 1713 | ||
1714 | mutex_lock(&hdata->hdmi_mutex); | 1714 | mutex_lock(&hdata->hdmi_mutex); |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 1f4cec12e326..f36f878f1e3a 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -892,10 +892,10 @@ static void mixer_poweron(struct mixer_context *ctx) | |||
892 | ctx->powered = true; | 892 | ctx->powered = true; |
893 | mutex_unlock(&ctx->mixer_mutex); | 893 | mutex_unlock(&ctx->mixer_mutex); |
894 | 894 | ||
895 | clk_enable(res->mixer); | 895 | clk_prepare_enable(res->mixer); |
896 | if (ctx->vp_enabled) { | 896 | if (ctx->vp_enabled) { |
897 | clk_enable(res->vp); | 897 | clk_prepare_enable(res->vp); |
898 | clk_enable(res->sclk_mixer); | 898 | clk_prepare_enable(res->sclk_mixer); |
899 | } | 899 | } |
900 | 900 | ||
901 | mixer_reg_write(res, MXR_INT_EN, ctx->int_en); | 901 | mixer_reg_write(res, MXR_INT_EN, ctx->int_en); |
@@ -917,10 +917,10 @@ static void mixer_poweroff(struct mixer_context *ctx) | |||
917 | 917 | ||
918 | ctx->int_en = mixer_reg_read(res, MXR_INT_EN); | 918 | ctx->int_en = mixer_reg_read(res, MXR_INT_EN); |
919 | 919 | ||
920 | clk_disable(res->mixer); | 920 | clk_disable_unprepare(res->mixer); |
921 | if (ctx->vp_enabled) { | 921 | if (ctx->vp_enabled) { |
922 | clk_disable(res->vp); | 922 | clk_disable_unprepare(res->vp); |
923 | clk_disable(res->sclk_mixer); | 923 | clk_disable_unprepare(res->sclk_mixer); |
924 | } | 924 | } |
925 | 925 | ||
926 | mutex_lock(&ctx->mixer_mutex); | 926 | mutex_lock(&ctx->mixer_mutex); |