diff options
| -rw-r--r-- | arch/x86/kernel/early-quirks.c | 18 | ||||
| -rw-r--r-- | arch/x86/kernel/quirks.c | 5 |
2 files changed, 18 insertions, 5 deletions
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index ebdb85cf2686..e5cc7e82e60d 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <asm/apic.h> | 18 | #include <asm/apic.h> |
| 19 | #include <asm/iommu.h> | 19 | #include <asm/iommu.h> |
| 20 | #include <asm/gart.h> | 20 | #include <asm/gart.h> |
| 21 | #include <asm/hpet.h> | ||
| 21 | 22 | ||
| 22 | static void __init fix_hypertransport_config(int num, int slot, int func) | 23 | static void __init fix_hypertransport_config(int num, int slot, int func) |
| 23 | { | 24 | { |
| @@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int num, int slot, int func) | |||
| 191 | } | 192 | } |
| 192 | #endif | 193 | #endif |
| 193 | 194 | ||
| 195 | /* | ||
| 196 | * Force the read back of the CMP register in hpet_next_event() | ||
| 197 | * to work around the problem that the CMP register write seems to be | ||
| 198 | * delayed. See hpet_next_event() for details. | ||
| 199 | * | ||
| 200 | * We do this on all SMBUS incarnations for now until we have more | ||
| 201 | * information about the affected chipsets. | ||
| 202 | */ | ||
| 203 | static void __init ati_hpet_bugs(int num, int slot, int func) | ||
| 204 | { | ||
| 205 | #ifdef CONFIG_HPET_TIMER | ||
| 206 | hpet_readback_cmp = 1; | ||
| 207 | #endif | ||
| 208 | } | ||
| 209 | |||
| 194 | #define QFLAG_APPLY_ONCE 0x1 | 210 | #define QFLAG_APPLY_ONCE 0x1 |
| 195 | #define QFLAG_APPLIED 0x2 | 211 | #define QFLAG_APPLIED 0x2 |
| 196 | #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) | 212 | #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) |
| @@ -220,6 +236,8 @@ static struct chipset early_qrk[] __initdata = { | |||
| 220 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs }, | 236 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs }, |
| 221 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, | 237 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, |
| 222 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd }, | 238 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd }, |
| 239 | { PCI_VENDOR_ID_ATI, PCI_ANY_ID, | ||
| 240 | PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs }, | ||
| 223 | {} | 241 | {} |
| 224 | }; | 242 | }; |
| 225 | 243 | ||
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index e72d3fc6547d..939b9e98245f 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
| @@ -498,15 +498,10 @@ void force_hpet_resume(void) | |||
| 498 | * See erratum #27 (Misinterpreted MSI Requests May Result in | 498 | * See erratum #27 (Misinterpreted MSI Requests May Result in |
| 499 | * Corrupted LPC DMA Data) in AMD Publication #46837, | 499 | * Corrupted LPC DMA Data) in AMD Publication #46837, |
| 500 | * "SB700 Family Product Errata", Rev. 1.0, March 2010. | 500 | * "SB700 Family Product Errata", Rev. 1.0, March 2010. |
| 501 | * | ||
| 502 | * Also force the read back of the CMP register in hpet_next_event() | ||
| 503 | * to work around the problem that the CMP register write seems to be | ||
| 504 | * delayed. See hpet_next_event() for details. | ||
| 505 | */ | 501 | */ |
| 506 | static void force_disable_hpet_msi(struct pci_dev *unused) | 502 | static void force_disable_hpet_msi(struct pci_dev *unused) |
| 507 | { | 503 | { |
| 508 | hpet_msi_disable = 1; | 504 | hpet_msi_disable = 1; |
| 509 | hpet_readback_cmp = 1; | ||
| 510 | } | 505 | } |
| 511 | 506 | ||
| 512 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, | 507 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, |
