diff options
-rw-r--r-- | drivers/pci/hotplug/pciehp_ctrl.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 0e0947601526..898f6da6f0de 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c | |||
@@ -2526,7 +2526,6 @@ configure_new_function(struct controller *ctrl, struct pci_func *func, | |||
2526 | int cloop; | 2526 | int cloop; |
2527 | u8 temp_byte; | 2527 | u8 temp_byte; |
2528 | u8 class_code; | 2528 | u8 class_code; |
2529 | u16 temp_word; | ||
2530 | u32 rc; | 2529 | u32 rc; |
2531 | u32 temp_register; | 2530 | u32 temp_register; |
2532 | u32 base; | 2531 | u32 base; |
@@ -2682,8 +2681,7 @@ configure_new_function(struct controller *ctrl, struct pci_func *func, | |||
2682 | } /* End of base register loop */ | 2681 | } /* End of base register loop */ |
2683 | 2682 | ||
2684 | /* disable ROM base Address */ | 2683 | /* disable ROM base Address */ |
2685 | temp_word = 0x00L; | 2684 | rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00); |
2686 | rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word); | ||
2687 | 2685 | ||
2688 | /* Set HP parameters (Cache Line Size, Latency Timer) */ | 2686 | /* Set HP parameters (Cache Line Size, Latency Timer) */ |
2689 | rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL); | 2687 | rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL); |