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-rw-r--r--drivers/pci/intel-iommu.c12
-rw-r--r--include/linux/dma_remapping.h1
-rw-r--r--include/linux/iommu.h1
3 files changed, 13 insertions, 1 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 3778ab149baf..a0ba568b831c 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -164,7 +164,8 @@ static inline void context_clear_entry(struct context_entry *context)
164 * 1: writable 164 * 1: writable
165 * 2-6: reserved 165 * 2-6: reserved
166 * 7: super page 166 * 7: super page
167 * 8-11: available 167 * 8-10: available
168 * 11: snoop behavior
168 * 12-63: Host physcial address 169 * 12-63: Host physcial address
169 */ 170 */
170struct dma_pte { 171struct dma_pte {
@@ -186,6 +187,11 @@ static inline void dma_set_pte_writable(struct dma_pte *pte)
186 pte->val |= DMA_PTE_WRITE; 187 pte->val |= DMA_PTE_WRITE;
187} 188}
188 189
190static inline void dma_set_pte_snp(struct dma_pte *pte)
191{
192 pte->val |= DMA_PTE_SNP;
193}
194
189static inline void dma_set_pte_prot(struct dma_pte *pte, unsigned long prot) 195static inline void dma_set_pte_prot(struct dma_pte *pte, unsigned long prot)
190{ 196{
191 pte->val = (pte->val & ~3) | (prot & 3); 197 pte->val = (pte->val & ~3) | (prot & 3);
@@ -1685,6 +1691,8 @@ domain_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
1685 BUG_ON(dma_pte_addr(pte)); 1691 BUG_ON(dma_pte_addr(pte));
1686 dma_set_pte_addr(pte, start_pfn << VTD_PAGE_SHIFT); 1692 dma_set_pte_addr(pte, start_pfn << VTD_PAGE_SHIFT);
1687 dma_set_pte_prot(pte, prot); 1693 dma_set_pte_prot(pte, prot);
1694 if (prot & DMA_PTE_SNP)
1695 dma_set_pte_snp(pte);
1688 domain_flush_cache(domain, pte, sizeof(*pte)); 1696 domain_flush_cache(domain, pte, sizeof(*pte));
1689 start_pfn++; 1697 start_pfn++;
1690 index++; 1698 index++;
@@ -3105,6 +3113,8 @@ static int intel_iommu_map_range(struct iommu_domain *domain,
3105 prot |= DMA_PTE_READ; 3113 prot |= DMA_PTE_READ;
3106 if (iommu_prot & IOMMU_WRITE) 3114 if (iommu_prot & IOMMU_WRITE)
3107 prot |= DMA_PTE_WRITE; 3115 prot |= DMA_PTE_WRITE;
3116 if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping)
3117 prot |= DMA_PTE_SNP;
3108 3118
3109 max_addr = (iova & VTD_PAGE_MASK) + VTD_PAGE_ALIGN(size); 3119 max_addr = (iova & VTD_PAGE_MASK) + VTD_PAGE_ALIGN(size);
3110 if (dmar_domain->max_addr < max_addr) { 3120 if (dmar_domain->max_addr < max_addr) {
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
index af1dab41674b..1a455f1f86d7 100644
--- a/include/linux/dma_remapping.h
+++ b/include/linux/dma_remapping.h
@@ -11,6 +11,7 @@
11 11
12#define DMA_PTE_READ (1) 12#define DMA_PTE_READ (1)
13#define DMA_PTE_WRITE (2) 13#define DMA_PTE_WRITE (2)
14#define DMA_PTE_SNP (1 << 11)
14 15
15struct intel_iommu; 16struct intel_iommu;
16struct dmar_domain; 17struct dmar_domain;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 0cf3a4e43f23..3af4ffd591b9 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -21,6 +21,7 @@
21 21
22#define IOMMU_READ (1) 22#define IOMMU_READ (1)
23#define IOMMU_WRITE (2) 23#define IOMMU_WRITE (2)
24#define IOMMU_CACHE (4) /* DMA cache coherency */
24 25
25struct device; 26struct device;
26 27