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-rw-r--r--arch/cris/include/asm/sync_serial.h27
1 files changed, 26 insertions, 1 deletions
diff --git a/arch/cris/include/asm/sync_serial.h b/arch/cris/include/asm/sync_serial.h
index d87c24df2b38..7f827fea30e7 100644
--- a/arch/cris/include/asm/sync_serial.h
+++ b/arch/cris/include/asm/sync_serial.h
@@ -19,6 +19,7 @@
19#define SSP_OPOLARITY _IOR('S', 4, unsigned int) 19#define SSP_OPOLARITY _IOR('S', 4, unsigned int)
20#define SSP_SPI _IOR('S', 5, unsigned int) 20#define SSP_SPI _IOR('S', 5, unsigned int)
21#define SSP_INBUFCHUNK _IOR('S', 6, unsigned int) 21#define SSP_INBUFCHUNK _IOR('S', 6, unsigned int)
22#define SSP_INPUT _IOR('S', 7, unsigned int)
22 23
23/* Values for SSP_SPEED */ 24/* Values for SSP_SPEED */
24#define SSP150 0 25#define SSP150 0
@@ -37,6 +38,7 @@
37#define SSP921600 13 38#define SSP921600 13
38#define SSP3125000 14 39#define SSP3125000 14
39#define CODEC 15 40#define CODEC 15
41#define CODEC_f32768 16
40 42
41#define FREQ_4MHz 0 43#define FREQ_4MHz 0
42#define FREQ_2MHz 1 44#define FREQ_2MHz 1
@@ -46,9 +48,14 @@
46#define FREQ_128kHz 5 48#define FREQ_128kHz 5
47#define FREQ_64kHz 6 49#define FREQ_64kHz 6
48#define FREQ_32kHz 7 50#define FREQ_32kHz 7
51/* FREQ_* with values where bit (value & 0x10) is set are */
52/* used for CODEC_f32768 */
53#define FREQ_4096kHz 16 /* CODEC_f32768 */
49 54
50/* Used by application to set CODEC divider, word rate and frame rate */ 55/* Used by application to set CODEC divider, word rate and frame rate */
51#define CODEC_VAL(freq, clk_per_sync, sync_per_frame) (CODEC | (freq << 8) | (clk_per_sync << 16) | (sync_per_frame << 28)) 56#define CODEC_VAL(freq, clk_per_sync, sync_per_frame) \
57 ((CODEC + ((freq & 0x10) >> 4)) | (freq << 8) | \
58 (clk_per_sync << 16) | (sync_per_frame << 28))
52 59
53/* Used by driver to extract speed */ 60/* Used by driver to extract speed */
54#define GET_SPEED(x) (x & 0xff) 61#define GET_SPEED(x) (x & 0xff)
@@ -68,6 +75,7 @@
68#define NORMAL_SYNC 1 75#define NORMAL_SYNC 1
69#define EARLY_SYNC 2 76#define EARLY_SYNC 2
70#define SECOND_WORD_SYNC 0x40000 77#define SECOND_WORD_SYNC 0x40000
78#define LATE_SYNC 0x80000
71 79
72#define BIT_SYNC 4 80#define BIT_SYNC 4
73#define WORD_SYNC 8 81#define WORD_SYNC 8
@@ -104,4 +112,21 @@
104/* Values for SSP_INBUFCHUNK */ 112/* Values for SSP_INBUFCHUNK */
105/* plain integer with the size of DMA chunks */ 113/* plain integer with the size of DMA chunks */
106 114
115/* To ensure that the timestamps are aligned with the data being read
116 * the read length MUST be a multiple of the length of the DMA buffers.
117 *
118 * Use a multiple of SSP_INPUT_CHUNK_SIZE defined below.
119 */
120#define SSP_INPUT_CHUNK_SIZE 256
121
122/* Request struct to pass through the ioctl interface to read
123 * data with timestamps.
124 */
125struct ssp_request {
126 char __user *buf; /* Where to put the data. */
127 size_t len; /* Size of buf. MUST be a multiple of */
128 /* SSP_INPUT_CHUNK_SIZE! */
129 struct timespec ts; /* The time the data was sampled. */
130};
131
107#endif 132#endif