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-rw-r--r--sound/soc/pxa/pxa-ssp.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index c4f480d67a50..8dfbcda956ff 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -462,9 +462,7 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
462{ 462{
463 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai); 463 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
464 struct ssp_device *ssp = priv->ssp; 464 struct ssp_device *ssp = priv->ssp;
465 u32 sscr0; 465 u32 sscr0, sscr1, sspsp, scfr;
466 u32 sscr1;
467 u32 sspsp;
468 466
469 /* check if we need to change anything at all */ 467 /* check if we need to change anything at all */
470 if (priv->dai_fmt == fmt) 468 if (priv->dai_fmt == fmt)
@@ -479,16 +477,16 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
479 477
480 /* reset port settings */ 478 /* reset port settings */
481 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & 479 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
482 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); 480 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
483 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7); 481 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
484 sspsp = 0; 482 sspsp = 0;
485 483
486 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 484 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
487 case SND_SOC_DAIFMT_CBM_CFM: 485 case SND_SOC_DAIFMT_CBM_CFM:
488 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR; 486 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR;
489 break; 487 break;
490 case SND_SOC_DAIFMT_CBM_CFS: 488 case SND_SOC_DAIFMT_CBM_CFS:
491 sscr1 |= SSCR1_SCLKDIR; 489 sscr1 |= SSCR1_SCLKDIR | SSCR1_SCFR;
492 break; 490 break;
493 case SND_SOC_DAIFMT_CBS_CFS: 491 case SND_SOC_DAIFMT_CBS_CFS:
494 break; 492 break;
@@ -534,6 +532,17 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
534 pxa_ssp_write_reg(ssp, SSCR1, sscr1); 532 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
535 pxa_ssp_write_reg(ssp, SSPSP, sspsp); 533 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
536 534
535 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
536 case SND_SOC_DAIFMT_CBM_CFM:
537 case SND_SOC_DAIFMT_CBM_CFS:
538 scfr = pxa_ssp_read_reg(ssp, SSCR1) | SSCR1_SCFR;
539 pxa_ssp_write_reg(ssp, SSCR1, scfr);
540
541 while (pxa_ssp_read_reg(ssp, SSSR) & SSSR_BSY)
542 cpu_relax();
543 break;
544 }
545
537 dump_registers(ssp); 546 dump_registers(ssp);
538 547
539 /* Since we are configuring the timings for the format by hand 548 /* Since we are configuring the timings for the format by hand
@@ -583,10 +592,8 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
583 592
584 /* clear selected SSP bits */ 593 /* clear selected SSP bits */
585 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS); 594 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
586 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
587 595
588 /* bit size */ 596 /* bit size */
589 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
590 switch (params_format(params)) { 597 switch (params_format(params)) {
591 case SNDRV_PCM_FORMAT_S16_LE: 598 case SNDRV_PCM_FORMAT_S16_LE:
592#ifdef CONFIG_PXA3xx 599#ifdef CONFIG_PXA3xx