diff options
-rw-r--r-- | drivers/net/forcedeth.c | 133 |
1 files changed, 0 insertions, 133 deletions
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 60edf0185b13..c2945d669b4f 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -1136,22 +1136,14 @@ static int mii_rw(struct net_device *dev, int addr, int miireg, int value) | |||
1136 | 1136 | ||
1137 | if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0, | 1137 | if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0, |
1138 | NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX)) { | 1138 | NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX)) { |
1139 | netdev_dbg(dev, "mii_rw of reg %d at PHY %d timed out\n", | ||
1140 | miireg, addr); | ||
1141 | retval = -1; | 1139 | retval = -1; |
1142 | } else if (value != MII_READ) { | 1140 | } else if (value != MII_READ) { |
1143 | /* it was a write operation - fewer failures are detectable */ | 1141 | /* it was a write operation - fewer failures are detectable */ |
1144 | netdev_dbg(dev, "mii_rw wrote 0x%x to reg %d at PHY %d\n", | ||
1145 | value, miireg, addr); | ||
1146 | retval = 0; | 1142 | retval = 0; |
1147 | } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { | 1143 | } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { |
1148 | netdev_dbg(dev, "mii_rw of reg %d at PHY %d failed\n", | ||
1149 | miireg, addr); | ||
1150 | retval = -1; | 1144 | retval = -1; |
1151 | } else { | 1145 | } else { |
1152 | retval = readl(base + NvRegMIIData); | 1146 | retval = readl(base + NvRegMIIData); |
1153 | netdev_dbg(dev, "mii_rw read from reg %d at PHY %d: 0x%x\n", | ||
1154 | miireg, addr, retval); | ||
1155 | } | 1147 | } |
1156 | 1148 | ||
1157 | return retval; | 1149 | return retval; |
@@ -1516,7 +1508,6 @@ static void nv_start_rx(struct net_device *dev) | |||
1516 | u8 __iomem *base = get_hwbase(dev); | 1508 | u8 __iomem *base = get_hwbase(dev); |
1517 | u32 rx_ctrl = readl(base + NvRegReceiverControl); | 1509 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
1518 | 1510 | ||
1519 | netdev_dbg(dev, "%s\n", __func__); | ||
1520 | /* Already running? Stop it. */ | 1511 | /* Already running? Stop it. */ |
1521 | if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) { | 1512 | if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) { |
1522 | rx_ctrl &= ~NVREG_RCVCTL_START; | 1513 | rx_ctrl &= ~NVREG_RCVCTL_START; |
@@ -1529,8 +1520,6 @@ static void nv_start_rx(struct net_device *dev) | |||
1529 | if (np->mac_in_use) | 1520 | if (np->mac_in_use) |
1530 | rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN; | 1521 | rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN; |
1531 | writel(rx_ctrl, base + NvRegReceiverControl); | 1522 | writel(rx_ctrl, base + NvRegReceiverControl); |
1532 | netdev_dbg(dev, "%s: duplex %d, speed 0x%08x\n", | ||
1533 | __func__, np->duplex, np->linkspeed); | ||
1534 | pci_push(base); | 1523 | pci_push(base); |
1535 | } | 1524 | } |
1536 | 1525 | ||
@@ -1540,7 +1529,6 @@ static void nv_stop_rx(struct net_device *dev) | |||
1540 | u8 __iomem *base = get_hwbase(dev); | 1529 | u8 __iomem *base = get_hwbase(dev); |
1541 | u32 rx_ctrl = readl(base + NvRegReceiverControl); | 1530 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
1542 | 1531 | ||
1543 | netdev_dbg(dev, "%s\n", __func__); | ||
1544 | if (!np->mac_in_use) | 1532 | if (!np->mac_in_use) |
1545 | rx_ctrl &= ~NVREG_RCVCTL_START; | 1533 | rx_ctrl &= ~NVREG_RCVCTL_START; |
1546 | else | 1534 | else |
@@ -1562,7 +1550,6 @@ static void nv_start_tx(struct net_device *dev) | |||
1562 | u8 __iomem *base = get_hwbase(dev); | 1550 | u8 __iomem *base = get_hwbase(dev); |
1563 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); | 1551 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
1564 | 1552 | ||
1565 | netdev_dbg(dev, "%s\n", __func__); | ||
1566 | tx_ctrl |= NVREG_XMITCTL_START; | 1553 | tx_ctrl |= NVREG_XMITCTL_START; |
1567 | if (np->mac_in_use) | 1554 | if (np->mac_in_use) |
1568 | tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN; | 1555 | tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN; |
@@ -1576,7 +1563,6 @@ static void nv_stop_tx(struct net_device *dev) | |||
1576 | u8 __iomem *base = get_hwbase(dev); | 1563 | u8 __iomem *base = get_hwbase(dev); |
1577 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); | 1564 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
1578 | 1565 | ||
1579 | netdev_dbg(dev, "%s\n", __func__); | ||
1580 | if (!np->mac_in_use) | 1566 | if (!np->mac_in_use) |
1581 | tx_ctrl &= ~NVREG_XMITCTL_START; | 1567 | tx_ctrl &= ~NVREG_XMITCTL_START; |
1582 | else | 1568 | else |
@@ -1610,7 +1596,6 @@ static void nv_txrx_reset(struct net_device *dev) | |||
1610 | struct fe_priv *np = netdev_priv(dev); | 1596 | struct fe_priv *np = netdev_priv(dev); |
1611 | u8 __iomem *base = get_hwbase(dev); | 1597 | u8 __iomem *base = get_hwbase(dev); |
1612 | 1598 | ||
1613 | netdev_dbg(dev, "%s\n", __func__); | ||
1614 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); | 1599 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
1615 | pci_push(base); | 1600 | pci_push(base); |
1616 | udelay(NV_TXRX_RESET_DELAY); | 1601 | udelay(NV_TXRX_RESET_DELAY); |
@@ -1624,8 +1609,6 @@ static void nv_mac_reset(struct net_device *dev) | |||
1624 | u8 __iomem *base = get_hwbase(dev); | 1609 | u8 __iomem *base = get_hwbase(dev); |
1625 | u32 temp1, temp2, temp3; | 1610 | u32 temp1, temp2, temp3; |
1626 | 1611 | ||
1627 | netdev_dbg(dev, "%s\n", __func__); | ||
1628 | |||
1629 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); | 1612 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
1630 | pci_push(base); | 1613 | pci_push(base); |
1631 | 1614 | ||
@@ -2202,13 +2185,6 @@ static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2202 | 2185 | ||
2203 | spin_unlock_irqrestore(&np->lock, flags); | 2186 | spin_unlock_irqrestore(&np->lock, flags); |
2204 | 2187 | ||
2205 | netdev_dbg(dev, "%s: entries %d queued for transmission. tx_flags_extra: %x\n", | ||
2206 | __func__, entries, tx_flags_extra); | ||
2207 | #ifdef DEBUG | ||
2208 | print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, | ||
2209 | skb->data, 64, true); | ||
2210 | #endif | ||
2211 | |||
2212 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | 2188 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
2213 | return NETDEV_TX_OK; | 2189 | return NETDEV_TX_OK; |
2214 | } | 2190 | } |
@@ -2348,13 +2324,6 @@ static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb, | |||
2348 | 2324 | ||
2349 | spin_unlock_irqrestore(&np->lock, flags); | 2325 | spin_unlock_irqrestore(&np->lock, flags); |
2350 | 2326 | ||
2351 | netdev_dbg(dev, "%s: entries %d queued for transmission. tx_flags_extra: %x\n", | ||
2352 | __func__, entries, tx_flags_extra); | ||
2353 | #ifdef DEBUG | ||
2354 | print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, | ||
2355 | skb->data, 64, true); | ||
2356 | #endif | ||
2357 | |||
2358 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | 2327 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
2359 | return NETDEV_TX_OK; | 2328 | return NETDEV_TX_OK; |
2360 | } | 2329 | } |
@@ -2393,8 +2362,6 @@ static int nv_tx_done(struct net_device *dev, int limit) | |||
2393 | !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) && | 2362 | !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) && |
2394 | (tx_work < limit)) { | 2363 | (tx_work < limit)) { |
2395 | 2364 | ||
2396 | netdev_dbg(dev, "%s: flags 0x%x\n", __func__, flags); | ||
2397 | |||
2398 | nv_unmap_txskb(np, np->get_tx_ctx); | 2365 | nv_unmap_txskb(np, np->get_tx_ctx); |
2399 | 2366 | ||
2400 | if (np->desc_ver == DESC_VER_1) { | 2367 | if (np->desc_ver == DESC_VER_1) { |
@@ -2457,8 +2424,6 @@ static int nv_tx_done_optimized(struct net_device *dev, int limit) | |||
2457 | !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX2_VALID) && | 2424 | !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX2_VALID) && |
2458 | (tx_work < limit)) { | 2425 | (tx_work < limit)) { |
2459 | 2426 | ||
2460 | netdev_dbg(dev, "%s: flags 0x%x\n", __func__, flags); | ||
2461 | |||
2462 | nv_unmap_txskb(np, np->get_tx_ctx); | 2427 | nv_unmap_txskb(np, np->get_tx_ctx); |
2463 | 2428 | ||
2464 | if (flags & NV_TX2_LASTPACKET) { | 2429 | if (flags & NV_TX2_LASTPACKET) { |
@@ -2607,8 +2572,6 @@ static int nv_getlen(struct net_device *dev, void *packet, int datalen) | |||
2607 | protolen = ntohs(((struct ethhdr *)packet)->h_proto); | 2572 | protolen = ntohs(((struct ethhdr *)packet)->h_proto); |
2608 | hdrlen = ETH_HLEN; | 2573 | hdrlen = ETH_HLEN; |
2609 | } | 2574 | } |
2610 | netdev_dbg(dev, "%s: datalen %d, protolen %d, hdrlen %d\n", | ||
2611 | __func__, datalen, protolen, hdrlen); | ||
2612 | if (protolen > ETH_DATA_LEN) | 2575 | if (protolen > ETH_DATA_LEN) |
2613 | return datalen; /* Value in proto field not a len, no checks possible */ | 2576 | return datalen; /* Value in proto field not a len, no checks possible */ |
2614 | 2577 | ||
@@ -2619,25 +2582,18 @@ static int nv_getlen(struct net_device *dev, void *packet, int datalen) | |||
2619 | /* more data on wire than in 802 header, trim of | 2582 | /* more data on wire than in 802 header, trim of |
2620 | * additional data. | 2583 | * additional data. |
2621 | */ | 2584 | */ |
2622 | netdev_dbg(dev, "%s: accepting %d bytes\n", | ||
2623 | __func__, protolen); | ||
2624 | return protolen; | 2585 | return protolen; |
2625 | } else { | 2586 | } else { |
2626 | /* less data on wire than mentioned in header. | 2587 | /* less data on wire than mentioned in header. |
2627 | * Discard the packet. | 2588 | * Discard the packet. |
2628 | */ | 2589 | */ |
2629 | netdev_dbg(dev, "%s: discarding long packet\n", | ||
2630 | __func__); | ||
2631 | return -1; | 2590 | return -1; |
2632 | } | 2591 | } |
2633 | } else { | 2592 | } else { |
2634 | /* short packet. Accept only if 802 values are also short */ | 2593 | /* short packet. Accept only if 802 values are also short */ |
2635 | if (protolen > ETH_ZLEN) { | 2594 | if (protolen > ETH_ZLEN) { |
2636 | netdev_dbg(dev, "%s: discarding short packet\n", | ||
2637 | __func__); | ||
2638 | return -1; | 2595 | return -1; |
2639 | } | 2596 | } |
2640 | netdev_dbg(dev, "%s: accepting %d bytes\n", __func__, datalen); | ||
2641 | return datalen; | 2597 | return datalen; |
2642 | } | 2598 | } |
2643 | } | 2599 | } |
@@ -2654,8 +2610,6 @@ static int nv_rx_process(struct net_device *dev, int limit) | |||
2654 | !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) && | 2610 | !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) && |
2655 | (rx_work < limit)) { | 2611 | (rx_work < limit)) { |
2656 | 2612 | ||
2657 | netdev_dbg(dev, "%s: flags 0x%x\n", __func__, flags); | ||
2658 | |||
2659 | /* | 2613 | /* |
2660 | * the packet is for us - immediately tear down the pci mapping. | 2614 | * the packet is for us - immediately tear down the pci mapping. |
2661 | * TODO: check if a prefetch of the first cacheline improves | 2615 | * TODO: check if a prefetch of the first cacheline improves |
@@ -2667,11 +2621,6 @@ static int nv_rx_process(struct net_device *dev, int limit) | |||
2667 | skb = np->get_rx_ctx->skb; | 2621 | skb = np->get_rx_ctx->skb; |
2668 | np->get_rx_ctx->skb = NULL; | 2622 | np->get_rx_ctx->skb = NULL; |
2669 | 2623 | ||
2670 | netdev_dbg(dev, "Dumping packet (flags 0x%x)\n", flags); | ||
2671 | #ifdef DEBUG | ||
2672 | print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, | ||
2673 | 16, 1, skb->data, 64, true); | ||
2674 | #endif | ||
2675 | /* look at what we actually got: */ | 2624 | /* look at what we actually got: */ |
2676 | if (np->desc_ver == DESC_VER_1) { | 2625 | if (np->desc_ver == DESC_VER_1) { |
2677 | if (likely(flags & NV_RX_DESCRIPTORVALID)) { | 2626 | if (likely(flags & NV_RX_DESCRIPTORVALID)) { |
@@ -2746,8 +2695,6 @@ static int nv_rx_process(struct net_device *dev, int limit) | |||
2746 | /* got a valid packet - forward it to the network core */ | 2695 | /* got a valid packet - forward it to the network core */ |
2747 | skb_put(skb, len); | 2696 | skb_put(skb, len); |
2748 | skb->protocol = eth_type_trans(skb, dev); | 2697 | skb->protocol = eth_type_trans(skb, dev); |
2749 | netdev_dbg(dev, "%s: %d bytes, proto %d accepted\n", | ||
2750 | __func__, len, skb->protocol); | ||
2751 | napi_gro_receive(&np->napi, skb); | 2698 | napi_gro_receive(&np->napi, skb); |
2752 | dev->stats.rx_packets++; | 2699 | dev->stats.rx_packets++; |
2753 | dev->stats.rx_bytes += len; | 2700 | dev->stats.rx_bytes += len; |
@@ -2776,8 +2723,6 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit) | |||
2776 | !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) && | 2723 | !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) && |
2777 | (rx_work < limit)) { | 2724 | (rx_work < limit)) { |
2778 | 2725 | ||
2779 | netdev_dbg(dev, "%s: flags 0x%x\n", __func__, flags); | ||
2780 | |||
2781 | /* | 2726 | /* |
2782 | * the packet is for us - immediately tear down the pci mapping. | 2727 | * the packet is for us - immediately tear down the pci mapping. |
2783 | * TODO: check if a prefetch of the first cacheline improves | 2728 | * TODO: check if a prefetch of the first cacheline improves |
@@ -2789,11 +2734,6 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit) | |||
2789 | skb = np->get_rx_ctx->skb; | 2734 | skb = np->get_rx_ctx->skb; |
2790 | np->get_rx_ctx->skb = NULL; | 2735 | np->get_rx_ctx->skb = NULL; |
2791 | 2736 | ||
2792 | netdev_dbg(dev, "Dumping packet (flags 0x%x)\n", flags); | ||
2793 | #ifdef DEBUG | ||
2794 | print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, | ||
2795 | skb->data, 64, true); | ||
2796 | #endif | ||
2797 | /* look at what we actually got: */ | 2737 | /* look at what we actually got: */ |
2798 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { | 2738 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
2799 | len = flags & LEN_MASK_V2; | 2739 | len = flags & LEN_MASK_V2; |
@@ -2826,9 +2766,6 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit) | |||
2826 | skb->protocol = eth_type_trans(skb, dev); | 2766 | skb->protocol = eth_type_trans(skb, dev); |
2827 | prefetch(skb->data); | 2767 | prefetch(skb->data); |
2828 | 2768 | ||
2829 | netdev_dbg(dev, "%s: %d bytes, proto %d accepted\n", | ||
2830 | __func__, len, skb->protocol); | ||
2831 | |||
2832 | if (likely(!np->vlangrp)) { | 2769 | if (likely(!np->vlangrp)) { |
2833 | napi_gro_receive(&np->napi, skb); | 2770 | napi_gro_receive(&np->napi, skb); |
2834 | } else { | 2771 | } else { |
@@ -3044,7 +2981,6 @@ static void nv_set_multicast(struct net_device *dev) | |||
3044 | writel(mask[0], base + NvRegMulticastMaskA); | 2981 | writel(mask[0], base + NvRegMulticastMaskA); |
3045 | writel(mask[1], base + NvRegMulticastMaskB); | 2982 | writel(mask[1], base + NvRegMulticastMaskB); |
3046 | writel(pff, base + NvRegPacketFilterFlags); | 2983 | writel(pff, base + NvRegPacketFilterFlags); |
3047 | netdev_dbg(dev, "reconfiguration for multicast lists\n"); | ||
3048 | nv_start_rx(dev); | 2984 | nv_start_rx(dev); |
3049 | spin_unlock_irq(&np->lock); | 2985 | spin_unlock_irq(&np->lock); |
3050 | } | 2986 | } |
@@ -3119,8 +3055,6 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
3119 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); | 3055 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
3120 | 3056 | ||
3121 | if (!(mii_status & BMSR_LSTATUS)) { | 3057 | if (!(mii_status & BMSR_LSTATUS)) { |
3122 | netdev_dbg(dev, | ||
3123 | "no link detected by phy - falling back to 10HD\n"); | ||
3124 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 3058 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
3125 | newdup = 0; | 3059 | newdup = 0; |
3126 | retval = 0; | 3060 | retval = 0; |
@@ -3128,8 +3062,6 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
3128 | } | 3062 | } |
3129 | 3063 | ||
3130 | if (np->autoneg == 0) { | 3064 | if (np->autoneg == 0) { |
3131 | netdev_dbg(dev, "%s: autoneg off, PHY set to 0x%04x\n", | ||
3132 | __func__, np->fixed_mode); | ||
3133 | if (np->fixed_mode & LPA_100FULL) { | 3065 | if (np->fixed_mode & LPA_100FULL) { |
3134 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; | 3066 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
3135 | newdup = 1; | 3067 | newdup = 1; |
@@ -3152,15 +3084,11 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
3152 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 3084 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
3153 | newdup = 0; | 3085 | newdup = 0; |
3154 | retval = 0; | 3086 | retval = 0; |
3155 | netdev_dbg(dev, | ||
3156 | "autoneg not completed - falling back to 10HD\n"); | ||
3157 | goto set_speed; | 3087 | goto set_speed; |
3158 | } | 3088 | } |
3159 | 3089 | ||
3160 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | 3090 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
3161 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); | 3091 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); |
3162 | netdev_dbg(dev, "%s: PHY advertises 0x%04x, lpa 0x%04x\n", | ||
3163 | __func__, adv, lpa); | ||
3164 | 3092 | ||
3165 | retval = 1; | 3093 | retval = 1; |
3166 | if (np->gigabit == PHY_GIGABIT) { | 3094 | if (np->gigabit == PHY_GIGABIT) { |
@@ -3169,8 +3097,6 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
3169 | 3097 | ||
3170 | if ((control_1000 & ADVERTISE_1000FULL) && | 3098 | if ((control_1000 & ADVERTISE_1000FULL) && |
3171 | (status_1000 & LPA_1000FULL)) { | 3099 | (status_1000 & LPA_1000FULL)) { |
3172 | netdev_dbg(dev, "%s: GBit ethernet detected\n", | ||
3173 | __func__); | ||
3174 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000; | 3100 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000; |
3175 | newdup = 1; | 3101 | newdup = 1; |
3176 | goto set_speed; | 3102 | goto set_speed; |
@@ -3192,8 +3118,6 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
3192 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 3118 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
3193 | newdup = 0; | 3119 | newdup = 0; |
3194 | } else { | 3120 | } else { |
3195 | netdev_dbg(dev, "bad ability %04x - falling back to 10HD\n", | ||
3196 | adv_lpa); | ||
3197 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 3121 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
3198 | newdup = 0; | 3122 | newdup = 0; |
3199 | } | 3123 | } |
@@ -3202,9 +3126,6 @@ set_speed: | |||
3202 | if (np->duplex == newdup && np->linkspeed == newls) | 3126 | if (np->duplex == newdup && np->linkspeed == newls) |
3203 | return retval; | 3127 | return retval; |
3204 | 3128 | ||
3205 | netdev_dbg(dev, "changing link setting from %d/%d to %d/%d\n", | ||
3206 | np->linkspeed, np->duplex, newls, newdup); | ||
3207 | |||
3208 | np->duplex = newdup; | 3129 | np->duplex = newdup; |
3209 | np->linkspeed = newls; | 3130 | np->linkspeed = newls; |
3210 | 3131 | ||
@@ -3346,11 +3267,9 @@ static void nv_link_irq(struct net_device *dev) | |||
3346 | 3267 | ||
3347 | miistat = readl(base + NvRegMIIStatus); | 3268 | miistat = readl(base + NvRegMIIStatus); |
3348 | writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus); | 3269 | writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus); |
3349 | netdev_dbg(dev, "link change irq, status 0x%x\n", miistat); | ||
3350 | 3270 | ||
3351 | if (miistat & (NVREG_MIISTAT_LINKCHANGE)) | 3271 | if (miistat & (NVREG_MIISTAT_LINKCHANGE)) |
3352 | nv_linkchange(dev); | 3272 | nv_linkchange(dev); |
3353 | netdev_dbg(dev, "link change notification done\n"); | ||
3354 | } | 3273 | } |
3355 | 3274 | ||
3356 | static void nv_msi_workaround(struct fe_priv *np) | 3275 | static void nv_msi_workaround(struct fe_priv *np) |
@@ -3401,8 +3320,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data) | |||
3401 | struct fe_priv *np = netdev_priv(dev); | 3320 | struct fe_priv *np = netdev_priv(dev); |
3402 | u8 __iomem *base = get_hwbase(dev); | 3321 | u8 __iomem *base = get_hwbase(dev); |
3403 | 3322 | ||
3404 | netdev_dbg(dev, "%s\n", __func__); | ||
3405 | |||
3406 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { | 3323 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
3407 | np->events = readl(base + NvRegIrqStatus); | 3324 | np->events = readl(base + NvRegIrqStatus); |
3408 | writel(np->events, base + NvRegIrqStatus); | 3325 | writel(np->events, base + NvRegIrqStatus); |
@@ -3410,7 +3327,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data) | |||
3410 | np->events = readl(base + NvRegMSIXIrqStatus); | 3327 | np->events = readl(base + NvRegMSIXIrqStatus); |
3411 | writel(np->events, base + NvRegMSIXIrqStatus); | 3328 | writel(np->events, base + NvRegMSIXIrqStatus); |
3412 | } | 3329 | } |
3413 | netdev_dbg(dev, "irq: %08x\n", np->events); | ||
3414 | if (!(np->events & np->irqmask)) | 3330 | if (!(np->events & np->irqmask)) |
3415 | return IRQ_NONE; | 3331 | return IRQ_NONE; |
3416 | 3332 | ||
@@ -3424,8 +3340,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data) | |||
3424 | __napi_schedule(&np->napi); | 3340 | __napi_schedule(&np->napi); |
3425 | } | 3341 | } |
3426 | 3342 | ||
3427 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3428 | |||
3429 | return IRQ_HANDLED; | 3343 | return IRQ_HANDLED; |
3430 | } | 3344 | } |
3431 | 3345 | ||
@@ -3440,8 +3354,6 @@ static irqreturn_t nv_nic_irq_optimized(int foo, void *data) | |||
3440 | struct fe_priv *np = netdev_priv(dev); | 3354 | struct fe_priv *np = netdev_priv(dev); |
3441 | u8 __iomem *base = get_hwbase(dev); | 3355 | u8 __iomem *base = get_hwbase(dev); |
3442 | 3356 | ||
3443 | netdev_dbg(dev, "%s\n", __func__); | ||
3444 | |||
3445 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { | 3357 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
3446 | np->events = readl(base + NvRegIrqStatus); | 3358 | np->events = readl(base + NvRegIrqStatus); |
3447 | writel(np->events, base + NvRegIrqStatus); | 3359 | writel(np->events, base + NvRegIrqStatus); |
@@ -3449,7 +3361,6 @@ static irqreturn_t nv_nic_irq_optimized(int foo, void *data) | |||
3449 | np->events = readl(base + NvRegMSIXIrqStatus); | 3361 | np->events = readl(base + NvRegMSIXIrqStatus); |
3450 | writel(np->events, base + NvRegMSIXIrqStatus); | 3362 | writel(np->events, base + NvRegMSIXIrqStatus); |
3451 | } | 3363 | } |
3452 | netdev_dbg(dev, "irq: %08x\n", np->events); | ||
3453 | if (!(np->events & np->irqmask)) | 3364 | if (!(np->events & np->irqmask)) |
3454 | return IRQ_NONE; | 3365 | return IRQ_NONE; |
3455 | 3366 | ||
@@ -3462,7 +3373,6 @@ static irqreturn_t nv_nic_irq_optimized(int foo, void *data) | |||
3462 | writel(0, base + NvRegIrqMask); | 3373 | writel(0, base + NvRegIrqMask); |
3463 | __napi_schedule(&np->napi); | 3374 | __napi_schedule(&np->napi); |
3464 | } | 3375 | } |
3465 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3466 | 3376 | ||
3467 | return IRQ_HANDLED; | 3377 | return IRQ_HANDLED; |
3468 | } | 3378 | } |
@@ -3476,12 +3386,9 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data) | |||
3476 | int i; | 3386 | int i; |
3477 | unsigned long flags; | 3387 | unsigned long flags; |
3478 | 3388 | ||
3479 | netdev_dbg(dev, "%s\n", __func__); | ||
3480 | |||
3481 | for (i = 0;; i++) { | 3389 | for (i = 0;; i++) { |
3482 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL; | 3390 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL; |
3483 | writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus); | 3391 | writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus); |
3484 | netdev_dbg(dev, "tx irq: %08x\n", events); | ||
3485 | if (!(events & np->irqmask)) | 3392 | if (!(events & np->irqmask)) |
3486 | break; | 3393 | break; |
3487 | 3394 | ||
@@ -3505,7 +3412,6 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data) | |||
3505 | } | 3412 | } |
3506 | 3413 | ||
3507 | } | 3414 | } |
3508 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3509 | 3415 | ||
3510 | return IRQ_RETVAL(i); | 3416 | return IRQ_RETVAL(i); |
3511 | } | 3417 | } |
@@ -3590,12 +3496,9 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data) | |||
3590 | int i; | 3496 | int i; |
3591 | unsigned long flags; | 3497 | unsigned long flags; |
3592 | 3498 | ||
3593 | netdev_dbg(dev, "%s\n", __func__); | ||
3594 | |||
3595 | for (i = 0;; i++) { | 3499 | for (i = 0;; i++) { |
3596 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; | 3500 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; |
3597 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); | 3501 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); |
3598 | netdev_dbg(dev, "rx irq: %08x\n", events); | ||
3599 | if (!(events & np->irqmask)) | 3502 | if (!(events & np->irqmask)) |
3600 | break; | 3503 | break; |
3601 | 3504 | ||
@@ -3623,7 +3526,6 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data) | |||
3623 | break; | 3526 | break; |
3624 | } | 3527 | } |
3625 | } | 3528 | } |
3626 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3627 | 3529 | ||
3628 | return IRQ_RETVAL(i); | 3530 | return IRQ_RETVAL(i); |
3629 | } | 3531 | } |
@@ -3637,12 +3539,9 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
3637 | int i; | 3539 | int i; |
3638 | unsigned long flags; | 3540 | unsigned long flags; |
3639 | 3541 | ||
3640 | netdev_dbg(dev, "%s\n", __func__); | ||
3641 | |||
3642 | for (i = 0;; i++) { | 3542 | for (i = 0;; i++) { |
3643 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER; | 3543 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER; |
3644 | writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus); | 3544 | writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus); |
3645 | netdev_dbg(dev, "irq: %08x\n", events); | ||
3646 | if (!(events & np->irqmask)) | 3545 | if (!(events & np->irqmask)) |
3647 | break; | 3546 | break; |
3648 | 3547 | ||
@@ -3692,7 +3591,6 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
3692 | } | 3591 | } |
3693 | 3592 | ||
3694 | } | 3593 | } |
3695 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3696 | 3594 | ||
3697 | return IRQ_RETVAL(i); | 3595 | return IRQ_RETVAL(i); |
3698 | } | 3596 | } |
@@ -3704,8 +3602,6 @@ static irqreturn_t nv_nic_irq_test(int foo, void *data) | |||
3704 | u8 __iomem *base = get_hwbase(dev); | 3602 | u8 __iomem *base = get_hwbase(dev); |
3705 | u32 events; | 3603 | u32 events; |
3706 | 3604 | ||
3707 | netdev_dbg(dev, "%s\n", __func__); | ||
3708 | |||
3709 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { | 3605 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
3710 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; | 3606 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
3711 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); | 3607 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); |
@@ -3714,7 +3610,6 @@ static irqreturn_t nv_nic_irq_test(int foo, void *data) | |||
3714 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); | 3610 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); |
3715 | } | 3611 | } |
3716 | pci_push(base); | 3612 | pci_push(base); |
3717 | netdev_dbg(dev, "irq: %08x\n", events); | ||
3718 | if (!(events & NVREG_IRQ_TIMER)) | 3613 | if (!(events & NVREG_IRQ_TIMER)) |
3719 | return IRQ_RETVAL(0); | 3614 | return IRQ_RETVAL(0); |
3720 | 3615 | ||
@@ -3724,8 +3619,6 @@ static irqreturn_t nv_nic_irq_test(int foo, void *data) | |||
3724 | np->intr_test = 1; | 3619 | np->intr_test = 1; |
3725 | spin_unlock(&np->lock); | 3620 | spin_unlock(&np->lock); |
3726 | 3621 | ||
3727 | netdev_dbg(dev, "%s: completed\n", __func__); | ||
3728 | |||
3729 | return IRQ_RETVAL(1); | 3622 | return IRQ_RETVAL(1); |
3730 | } | 3623 | } |
3731 | 3624 | ||
@@ -4868,21 +4761,15 @@ static int nv_loopback_test(struct net_device *dev) | |||
4868 | if (ret) { | 4761 | if (ret) { |
4869 | if (len != pkt_len) { | 4762 | if (len != pkt_len) { |
4870 | ret = 0; | 4763 | ret = 0; |
4871 | netdev_dbg(dev, "loopback len mismatch %d vs %d\n", | ||
4872 | len, pkt_len); | ||
4873 | } else { | 4764 | } else { |
4874 | rx_skb = np->rx_skb[0].skb; | 4765 | rx_skb = np->rx_skb[0].skb; |
4875 | for (i = 0; i < pkt_len; i++) { | 4766 | for (i = 0; i < pkt_len; i++) { |
4876 | if (rx_skb->data[i] != (u8)(i & 0xff)) { | 4767 | if (rx_skb->data[i] != (u8)(i & 0xff)) { |
4877 | ret = 0; | 4768 | ret = 0; |
4878 | netdev_dbg(dev, "loopback pattern check failed on byte %d\n", | ||
4879 | i); | ||
4880 | break; | 4769 | break; |
4881 | } | 4770 | } |
4882 | } | 4771 | } |
4883 | } | 4772 | } |
4884 | } else { | ||
4885 | netdev_dbg(dev, "loopback - did not receive test packet\n"); | ||
4886 | } | 4773 | } |
4887 | 4774 | ||
4888 | pci_unmap_single(np->pci_dev, test_dma_addr, | 4775 | pci_unmap_single(np->pci_dev, test_dma_addr, |
@@ -5132,8 +5019,6 @@ static int nv_open(struct net_device *dev) | |||
5132 | int oom, i; | 5019 | int oom, i; |
5133 | u32 low; | 5020 | u32 low; |
5134 | 5021 | ||
5135 | netdev_dbg(dev, "%s\n", __func__); | ||
5136 | |||
5137 | /* power up phy */ | 5022 | /* power up phy */ |
5138 | mii_rw(dev, np->phyaddr, MII_BMCR, | 5023 | mii_rw(dev, np->phyaddr, MII_BMCR, |
5139 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); | 5024 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); |
@@ -5261,7 +5146,6 @@ static int nv_open(struct net_device *dev) | |||
5261 | u32 miistat; | 5146 | u32 miistat; |
5262 | miistat = readl(base + NvRegMIIStatus); | 5147 | miistat = readl(base + NvRegMIIStatus); |
5263 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); | 5148 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
5264 | netdev_dbg(dev, "startup: got 0x%08x\n", miistat); | ||
5265 | } | 5149 | } |
5266 | /* set linkspeed to invalid value, thus force nv_update_linkspeed | 5150 | /* set linkspeed to invalid value, thus force nv_update_linkspeed |
5267 | * to init hw */ | 5151 | * to init hw */ |
@@ -5317,7 +5201,6 @@ static int nv_close(struct net_device *dev) | |||
5317 | base = get_hwbase(dev); | 5201 | base = get_hwbase(dev); |
5318 | nv_disable_hw_interrupts(dev, np->irqmask); | 5202 | nv_disable_hw_interrupts(dev, np->irqmask); |
5319 | pci_push(base); | 5203 | pci_push(base); |
5320 | netdev_dbg(dev, "Irqmask is zero again\n"); | ||
5321 | 5204 | ||
5322 | spin_unlock_irq(&np->lock); | 5205 | spin_unlock_irq(&np->lock); |
5323 | 5206 | ||
@@ -5430,11 +5313,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5430 | err = -EINVAL; | 5313 | err = -EINVAL; |
5431 | addr = 0; | 5314 | addr = 0; |
5432 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | 5315 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
5433 | netdev_dbg(dev, "%s: resource %d start %p len %lld flags 0x%08lx\n", | ||
5434 | pci_name(pci_dev), i, | ||
5435 | (void *)(unsigned long)pci_resource_start(pci_dev, i), | ||
5436 | (long long)pci_resource_len(pci_dev, i), | ||
5437 | pci_resource_flags(pci_dev, i)); | ||
5438 | if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && | 5316 | if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && |
5439 | pci_resource_len(pci_dev, i) >= np->register_size) { | 5317 | pci_resource_len(pci_dev, i) >= np->register_size) { |
5440 | addr = pci_resource_start(pci_dev, i); | 5318 | addr = pci_resource_start(pci_dev, i); |
@@ -5602,9 +5480,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5602 | random_ether_addr(dev->dev_addr); | 5480 | random_ether_addr(dev->dev_addr); |
5603 | } | 5481 | } |
5604 | 5482 | ||
5605 | netdev_dbg(dev, "%s: MAC Address %pM\n", | ||
5606 | pci_name(pci_dev), dev->dev_addr); | ||
5607 | |||
5608 | /* set mac address */ | 5483 | /* set mac address */ |
5609 | nv_copy_mac_to_hw(dev); | 5484 | nv_copy_mac_to_hw(dev); |
5610 | 5485 | ||
@@ -5666,11 +5541,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5666 | if (id->driver_data & DEV_NEED_TIMERIRQ) | 5541 | if (id->driver_data & DEV_NEED_TIMERIRQ) |
5667 | np->irqmask |= NVREG_IRQ_TIMER; | 5542 | np->irqmask |= NVREG_IRQ_TIMER; |
5668 | if (id->driver_data & DEV_NEED_LINKTIMER) { | 5543 | if (id->driver_data & DEV_NEED_LINKTIMER) { |
5669 | netdev_dbg(dev, "%s: link timer on\n", pci_name(pci_dev)); | ||
5670 | np->need_linktimer = 1; | 5544 | np->need_linktimer = 1; |
5671 | np->link_timeout = jiffies + LINK_TIMEOUT; | 5545 | np->link_timeout = jiffies + LINK_TIMEOUT; |
5672 | } else { | 5546 | } else { |
5673 | netdev_dbg(dev, "%s: link timer off\n", pci_name(pci_dev)); | ||
5674 | np->need_linktimer = 0; | 5547 | np->need_linktimer = 0; |
5675 | } | 5548 | } |
5676 | 5549 | ||
@@ -5701,16 +5574,12 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5701 | np->mac_in_use = 1; | 5574 | np->mac_in_use = 1; |
5702 | if (np->mgmt_version > 0) | 5575 | if (np->mgmt_version > 0) |
5703 | np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE; | 5576 | np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE; |
5704 | netdev_dbg(dev, "%s: mgmt unit is running. mac in use %x\n", | ||
5705 | pci_name(pci_dev), np->mac_in_use); | ||
5706 | /* management unit setup the phy already? */ | 5577 | /* management unit setup the phy already? */ |
5707 | if (np->mac_in_use && | 5578 | if (np->mac_in_use && |
5708 | ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == | 5579 | ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == |
5709 | NVREG_XMITCTL_SYNC_PHY_INIT)) { | 5580 | NVREG_XMITCTL_SYNC_PHY_INIT)) { |
5710 | /* phy is inited by mgmt unit */ | 5581 | /* phy is inited by mgmt unit */ |
5711 | phyinitialized = 1; | 5582 | phyinitialized = 1; |
5712 | netdev_dbg(dev, "%s: Phy already initialized by mgmt unit\n", | ||
5713 | pci_name(pci_dev)); | ||
5714 | } else { | 5583 | } else { |
5715 | /* we need to init the phy */ | 5584 | /* we need to init the phy */ |
5716 | } | 5585 | } |
@@ -5736,8 +5605,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5736 | np->phy_model = id2 & PHYID2_MODEL_MASK; | 5605 | np->phy_model = id2 & PHYID2_MODEL_MASK; |
5737 | id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT; | 5606 | id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT; |
5738 | id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT; | 5607 | id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT; |
5739 | netdev_dbg(dev, "%s: %s: Found PHY %04x:%04x at address %d\n", | ||
5740 | pci_name(pci_dev), __func__, id1, id2, phyaddr); | ||
5741 | np->phyaddr = phyaddr; | 5608 | np->phyaddr = phyaddr; |
5742 | np->phy_oui = id1 | id2; | 5609 | np->phy_oui = id1 | id2; |
5743 | 5610 | ||