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-rw-r--r--arch/x86/kernel/apic_32.c8
-rw-r--r--arch/x86/kernel/apic_64.c5
2 files changed, 11 insertions, 2 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 447dd8c5c0e9..01708f128eee 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -172,11 +172,15 @@ u32 safe_apic_wait_icr_idle(void)
172 */ 172 */
173void __cpuinit enable_NMI_through_LVT0(void) 173void __cpuinit enable_NMI_through_LVT0(void)
174{ 174{
175 unsigned int v = APIC_DM_NMI; 175 unsigned int v;
176
177 /* unmask and set to NMI */
178 v = APIC_DM_NMI;
176 179
177 /* Level triggered for 82489DX */ 180 /* Level triggered for 82489DX (32bit mode) */
178 if (!lapic_is_integrated()) 181 if (!lapic_is_integrated())
179 v |= APIC_LVT_LEVEL_TRIGGER; 182 v |= APIC_LVT_LEVEL_TRIGGER;
183
180 apic_write(APIC_LVT0, v); 184 apic_write(APIC_LVT0, v);
181} 185}
182 186
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 4fa2a8620c26..7615b4b9c3f3 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -150,6 +150,11 @@ void __cpuinit enable_NMI_through_LVT0(void)
150 150
151 /* unmask and set to NMI */ 151 /* unmask and set to NMI */
152 v = APIC_DM_NMI; 152 v = APIC_DM_NMI;
153
154 /* Level triggered for 82489DX (32bit mode) */
155 if (!lapic_is_integrated())
156 v |= APIC_LVT_LEVEL_TRIGGER;
157
153 apic_write(APIC_LVT0, v); 158 apic_write(APIC_LVT0, v);
154} 159}
155 160