diff options
-rw-r--r-- | drivers/scsi/aic7xxx/aic79xx.reg | 185 | ||||
-rw-r--r-- | drivers/scsi/aic7xxx/aic7xxx.reg | 124 |
2 files changed, 309 insertions, 0 deletions
diff --git a/drivers/scsi/aic7xxx/aic79xx.reg b/drivers/scsi/aic7xxx/aic79xx.reg index cca16fc5b4ad..0666c22ab55b 100644 --- a/drivers/scsi/aic7xxx/aic79xx.reg +++ b/drivers/scsi/aic7xxx/aic79xx.reg | |||
@@ -80,6 +80,17 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $" | |||
80 | } | 80 | } |
81 | 81 | ||
82 | /* | 82 | /* |
83 | * Registers marked "dont_generate_debug_code" are not (yet) referenced | ||
84 | * from the driver code, and this keyword inhibit generation | ||
85 | * of debug code for them. | ||
86 | * | ||
87 | * REG_PRETTY_PRINT config will complain if dont_generate_debug_code | ||
88 | * is added to the register which is referenced in the driver. | ||
89 | * Unreferenced register with no dont_generate_debug_code will result | ||
90 | * in dead code. No warning is issued. | ||
91 | */ | ||
92 | |||
93 | /* | ||
83 | * Mode Pointer | 94 | * Mode Pointer |
84 | * Controls which of the 5, 512byte, address spaces should be used | 95 | * Controls which of the 5, 512byte, address spaces should be used |
85 | * as the source and destination of any register accesses in our | 96 | * as the source and destination of any register accesses in our |
@@ -91,6 +102,7 @@ register MODE_PTR { | |||
91 | field DST_MODE 0x70 | 102 | field DST_MODE 0x70 |
92 | field SRC_MODE 0x07 | 103 | field SRC_MODE 0x07 |
93 | mode_pointer | 104 | mode_pointer |
105 | dont_generate_debug_code | ||
94 | } | 106 | } |
95 | 107 | ||
96 | const SRC_MODE_SHIFT 0 | 108 | const SRC_MODE_SHIFT 0 |
@@ -190,6 +202,7 @@ register SEQINTCODE { | |||
190 | SAW_HWERR, | 202 | SAW_HWERR, |
191 | BAD_SCB_STATUS | 203 | BAD_SCB_STATUS |
192 | } | 204 | } |
205 | dont_generate_debug_code | ||
193 | } | 206 | } |
194 | 207 | ||
195 | /* | 208 | /* |
@@ -207,6 +220,7 @@ register CLRINT { | |||
207 | field CLRSEQINT 0x04 | 220 | field CLRSEQINT 0x04 |
208 | field CLRCMDINT 0x02 | 221 | field CLRCMDINT 0x02 |
209 | field CLRSPLTINT 0x01 | 222 | field CLRSPLTINT 0x01 |
223 | dont_generate_debug_code | ||
210 | } | 224 | } |
211 | 225 | ||
212 | /* | 226 | /* |
@@ -222,6 +236,7 @@ register ERROR { | |||
222 | field SQPARERR 0x08 | 236 | field SQPARERR 0x08 |
223 | field ILLOPCODE 0x04 | 237 | field ILLOPCODE 0x04 |
224 | field DSCTMOUT 0x02 | 238 | field DSCTMOUT 0x02 |
239 | dont_generate_debug_code | ||
225 | } | 240 | } |
226 | 241 | ||
227 | /* | 242 | /* |
@@ -255,6 +270,7 @@ register HCNTRL { | |||
255 | field INTEN 0x02 | 270 | field INTEN 0x02 |
256 | field CHIPRST 0x01 | 271 | field CHIPRST 0x01 |
257 | field CHIPRSTACK 0x01 | 272 | field CHIPRSTACK 0x01 |
273 | dont_generate_debug_code | ||
258 | } | 274 | } |
259 | 275 | ||
260 | /* | 276 | /* |
@@ -265,6 +281,7 @@ register HNSCB_QOFF { | |||
265 | access_mode RW | 281 | access_mode RW |
266 | size 2 | 282 | size 2 |
267 | count 2 | 283 | count 2 |
284 | dont_generate_debug_code | ||
268 | } | 285 | } |
269 | 286 | ||
270 | /* | 287 | /* |
@@ -274,6 +291,7 @@ register HESCB_QOFF { | |||
274 | address 0x008 | 291 | address 0x008 |
275 | access_mode RW | 292 | access_mode RW |
276 | count 2 | 293 | count 2 |
294 | dont_generate_debug_code | ||
277 | } | 295 | } |
278 | 296 | ||
279 | /* | 297 | /* |
@@ -311,6 +329,7 @@ register CLRSEQINTSTAT { | |||
311 | field CLRSEQ_SCSIINT 0x04 | 329 | field CLRSEQ_SCSIINT 0x04 |
312 | field CLRSEQ_PCIINT 0x02 | 330 | field CLRSEQ_PCIINT 0x02 |
313 | field CLRSEQ_SPLTINT 0x01 | 331 | field CLRSEQ_SPLTINT 0x01 |
332 | dont_generate_debug_code | ||
314 | } | 333 | } |
315 | 334 | ||
316 | /* | 335 | /* |
@@ -320,6 +339,7 @@ register SWTIMER { | |||
320 | address 0x00E | 339 | address 0x00E |
321 | access_mode RW | 340 | access_mode RW |
322 | size 2 | 341 | size 2 |
342 | dont_generate_debug_code | ||
323 | } | 343 | } |
324 | 344 | ||
325 | /* | 345 | /* |
@@ -330,6 +350,7 @@ register SNSCB_QOFF { | |||
330 | access_mode RW | 350 | access_mode RW |
331 | size 2 | 351 | size 2 |
332 | modes M_CCHAN | 352 | modes M_CCHAN |
353 | dont_generate_debug_code | ||
333 | } | 354 | } |
334 | 355 | ||
335 | /* | 356 | /* |
@@ -340,6 +361,7 @@ register SESCB_QOFF { | |||
340 | count 2 | 361 | count 2 |
341 | access_mode RW | 362 | access_mode RW |
342 | modes M_CCHAN | 363 | modes M_CCHAN |
364 | dont_generate_debug_code | ||
343 | } | 365 | } |
344 | 366 | ||
345 | /* | 367 | /* |
@@ -350,6 +372,7 @@ register SDSCB_QOFF { | |||
350 | access_mode RW | 372 | access_mode RW |
351 | modes M_CCHAN | 373 | modes M_CCHAN |
352 | size 2 | 374 | size 2 |
375 | dont_generate_debug_code | ||
353 | } | 376 | } |
354 | 377 | ||
355 | /* | 378 | /* |
@@ -378,6 +401,7 @@ register QOFF_CTLSTA { | |||
378 | SCB_QSIZE_8192, | 401 | SCB_QSIZE_8192, |
379 | SCB_QSIZE_16384 | 402 | SCB_QSIZE_16384 |
380 | } | 403 | } |
404 | dont_generate_debug_code | ||
381 | } | 405 | } |
382 | 406 | ||
383 | /* | 407 | /* |
@@ -431,6 +455,7 @@ register DSCOMMAND0 { | |||
431 | field EXTREQLCK 0x10 /* External Request Lock */ | 455 | field EXTREQLCK 0x10 /* External Request Lock */ |
432 | field DISABLE_TWATE 0x02 /* Rev B or greater */ | 456 | field DISABLE_TWATE 0x02 /* Rev B or greater */ |
433 | field CIOPARCKEN 0x01 /* Internal bus parity error enable */ | 457 | field CIOPARCKEN 0x01 /* Internal bus parity error enable */ |
458 | dont_generate_debug_code | ||
434 | } | 459 | } |
435 | 460 | ||
436 | /* | 461 | /* |
@@ -459,6 +484,7 @@ register SG_CACHE_PRE { | |||
459 | field SG_ADDR_MASK 0xf8 | 484 | field SG_ADDR_MASK 0xf8 |
460 | field ODD_SEG 0x04 | 485 | field ODD_SEG 0x04 |
461 | field LAST_SEG 0x02 | 486 | field LAST_SEG 0x02 |
487 | dont_generate_debug_code | ||
462 | } | 488 | } |
463 | 489 | ||
464 | register SG_CACHE_SHADOW { | 490 | register SG_CACHE_SHADOW { |
@@ -491,6 +517,7 @@ register HADDR { | |||
491 | access_mode RW | 517 | access_mode RW |
492 | size 8 | 518 | size 8 |
493 | modes M_DFF0, M_DFF1 | 519 | modes M_DFF0, M_DFF1 |
520 | dont_generate_debug_code | ||
494 | } | 521 | } |
495 | 522 | ||
496 | /* | 523 | /* |
@@ -522,6 +549,7 @@ register HCNT { | |||
522 | access_mode RW | 549 | access_mode RW |
523 | size 3 | 550 | size 3 |
524 | modes M_DFF0, M_DFF1 | 551 | modes M_DFF0, M_DFF1 |
552 | dont_generate_debug_code | ||
525 | } | 553 | } |
526 | 554 | ||
527 | /* | 555 | /* |
@@ -551,6 +579,7 @@ register SGHADDR { | |||
551 | access_mode RW | 579 | access_mode RW |
552 | size 8 | 580 | size 8 |
553 | modes M_DFF0, M_DFF1 | 581 | modes M_DFF0, M_DFF1 |
582 | dont_generate_debug_code | ||
554 | } | 583 | } |
555 | 584 | ||
556 | /* | 585 | /* |
@@ -561,6 +590,7 @@ register SCBHADDR { | |||
561 | access_mode RW | 590 | access_mode RW |
562 | size 8 | 591 | size 8 |
563 | modes M_CCHAN | 592 | modes M_CCHAN |
593 | dont_generate_debug_code | ||
564 | } | 594 | } |
565 | 595 | ||
566 | /* | 596 | /* |
@@ -570,6 +600,7 @@ register SGHCNT { | |||
570 | address 0x084 | 600 | address 0x084 |
571 | access_mode RW | 601 | access_mode RW |
572 | modes M_DFF0, M_DFF1 | 602 | modes M_DFF0, M_DFF1 |
603 | dont_generate_debug_code | ||
573 | } | 604 | } |
574 | 605 | ||
575 | /* | 606 | /* |
@@ -579,6 +610,7 @@ register SCBHCNT { | |||
579 | address 0x084 | 610 | address 0x084 |
580 | access_mode RW | 611 | access_mode RW |
581 | modes M_CCHAN | 612 | modes M_CCHAN |
613 | dont_generate_debug_code | ||
582 | } | 614 | } |
583 | 615 | ||
584 | /* | 616 | /* |
@@ -609,6 +641,7 @@ register DFF_THRSH { | |||
609 | RD_DFTHRSH_90, | 641 | RD_DFTHRSH_90, |
610 | RD_DFTHRSH_MAX | 642 | RD_DFTHRSH_MAX |
611 | } | 643 | } |
644 | dont_generate_debug_code | ||
612 | } | 645 | } |
613 | 646 | ||
614 | /* | 647 | /* |
@@ -817,6 +850,7 @@ register PCIXCTL { | |||
817 | field SRSPDPEEN 0x04 | 850 | field SRSPDPEEN 0x04 |
818 | field TSCSERREN 0x02 | 851 | field TSCSERREN 0x02 |
819 | field CMPABCDIS 0x01 | 852 | field CMPABCDIS 0x01 |
853 | dont_generate_debug_code | ||
820 | } | 854 | } |
821 | 855 | ||
822 | /* | 856 | /* |
@@ -863,6 +897,7 @@ register DCHSPLTSTAT0 { | |||
863 | field RXOVRUN 0x04 | 897 | field RXOVRUN 0x04 |
864 | field RXSCEMSG 0x02 | 898 | field RXSCEMSG 0x02 |
865 | field RXSPLTRSP 0x01 | 899 | field RXSPLTRSP 0x01 |
900 | dont_generate_debug_code | ||
866 | } | 901 | } |
867 | 902 | ||
868 | /* | 903 | /* |
@@ -908,6 +943,7 @@ register DCHSPLTSTAT1 { | |||
908 | modes M_DFF0, M_DFF1 | 943 | modes M_DFF0, M_DFF1 |
909 | count 2 | 944 | count 2 |
910 | field RXDATABUCKET 0x01 | 945 | field RXDATABUCKET 0x01 |
946 | dont_generate_debug_code | ||
911 | } | 947 | } |
912 | 948 | ||
913 | /* | 949 | /* |
@@ -1069,6 +1105,7 @@ register SGSPLTSTAT0 { | |||
1069 | field RXOVRUN 0x04 | 1105 | field RXOVRUN 0x04 |
1070 | field RXSCEMSG 0x02 | 1106 | field RXSCEMSG 0x02 |
1071 | field RXSPLTRSP 0x01 | 1107 | field RXSPLTRSP 0x01 |
1108 | dont_generate_debug_code | ||
1072 | } | 1109 | } |
1073 | 1110 | ||
1074 | /* | 1111 | /* |
@@ -1080,6 +1117,7 @@ register SGSPLTSTAT1 { | |||
1080 | modes M_DFF0, M_DFF1 | 1117 | modes M_DFF0, M_DFF1 |
1081 | count 2 | 1118 | count 2 |
1082 | field RXDATABUCKET 0x01 | 1119 | field RXDATABUCKET 0x01 |
1120 | dont_generate_debug_code | ||
1083 | } | 1121 | } |
1084 | 1122 | ||
1085 | /* | 1123 | /* |
@@ -1091,6 +1129,7 @@ register SFUNCT { | |||
1091 | modes M_CFG | 1129 | modes M_CFG |
1092 | field TEST_GROUP 0xF0 | 1130 | field TEST_GROUP 0xF0 |
1093 | field TEST_NUM 0x0F | 1131 | field TEST_NUM 0x0F |
1132 | dont_generate_debug_code | ||
1094 | } | 1133 | } |
1095 | 1134 | ||
1096 | /* | 1135 | /* |
@@ -1109,6 +1148,7 @@ register DF0PCISTAT { | |||
1109 | field RDPERR 0x04 | 1148 | field RDPERR 0x04 |
1110 | field TWATERR 0x02 | 1149 | field TWATERR 0x02 |
1111 | field DPR 0x01 | 1150 | field DPR 0x01 |
1151 | dont_generate_debug_code | ||
1112 | } | 1152 | } |
1113 | 1153 | ||
1114 | /* | 1154 | /* |
@@ -1204,6 +1244,7 @@ register TARGPCISTAT { | |||
1204 | field SSE 0x40 | 1244 | field SSE 0x40 |
1205 | field STA 0x08 | 1245 | field STA 0x08 |
1206 | field TWATERR 0x02 | 1246 | field TWATERR 0x02 |
1247 | dont_generate_debug_code | ||
1207 | } | 1248 | } |
1208 | 1249 | ||
1209 | /* | 1250 | /* |
@@ -1216,6 +1257,7 @@ register LQIN { | |||
1216 | size 20 | 1257 | size 20 |
1217 | count 2 | 1258 | count 2 |
1218 | modes M_DFF0, M_DFF1, M_SCSI | 1259 | modes M_DFF0, M_DFF1, M_SCSI |
1260 | dont_generate_debug_code | ||
1219 | } | 1261 | } |
1220 | 1262 | ||
1221 | /* | 1263 | /* |
@@ -1247,6 +1289,7 @@ register LUNPTR { | |||
1247 | access_mode RW | 1289 | access_mode RW |
1248 | modes M_CFG | 1290 | modes M_CFG |
1249 | count 2 | 1291 | count 2 |
1292 | dont_generate_debug_code | ||
1250 | } | 1293 | } |
1251 | 1294 | ||
1252 | /* | 1295 | /* |
@@ -1278,6 +1321,7 @@ register CMDLENPTR { | |||
1278 | access_mode RW | 1321 | access_mode RW |
1279 | modes M_CFG | 1322 | modes M_CFG |
1280 | count 1 | 1323 | count 1 |
1324 | dont_generate_debug_code | ||
1281 | } | 1325 | } |
1282 | 1326 | ||
1283 | /* | 1327 | /* |
@@ -1290,6 +1334,7 @@ register ATTRPTR { | |||
1290 | access_mode RW | 1334 | access_mode RW |
1291 | modes M_CFG | 1335 | modes M_CFG |
1292 | count 1 | 1336 | count 1 |
1337 | dont_generate_debug_code | ||
1293 | } | 1338 | } |
1294 | 1339 | ||
1295 | /* | 1340 | /* |
@@ -1302,6 +1347,7 @@ register FLAGPTR { | |||
1302 | access_mode RW | 1347 | access_mode RW |
1303 | modes M_CFG | 1348 | modes M_CFG |
1304 | count 1 | 1349 | count 1 |
1350 | dont_generate_debug_code | ||
1305 | } | 1351 | } |
1306 | 1352 | ||
1307 | /* | 1353 | /* |
@@ -1313,6 +1359,7 @@ register CMDPTR { | |||
1313 | access_mode RW | 1359 | access_mode RW |
1314 | modes M_CFG | 1360 | modes M_CFG |
1315 | count 1 | 1361 | count 1 |
1362 | dont_generate_debug_code | ||
1316 | } | 1363 | } |
1317 | 1364 | ||
1318 | /* | 1365 | /* |
@@ -1324,6 +1371,7 @@ register QNEXTPTR { | |||
1324 | access_mode RW | 1371 | access_mode RW |
1325 | modes M_CFG | 1372 | modes M_CFG |
1326 | count 1 | 1373 | count 1 |
1374 | dont_generate_debug_code | ||
1327 | } | 1375 | } |
1328 | 1376 | ||
1329 | /* | 1377 | /* |
@@ -1347,6 +1395,7 @@ register ABRTBYTEPTR { | |||
1347 | access_mode RW | 1395 | access_mode RW |
1348 | modes M_CFG | 1396 | modes M_CFG |
1349 | count 1 | 1397 | count 1 |
1398 | dont_generate_debug_code | ||
1350 | } | 1399 | } |
1351 | 1400 | ||
1352 | /* | 1401 | /* |
@@ -1358,6 +1407,7 @@ register ABRTBITPTR { | |||
1358 | access_mode RW | 1407 | access_mode RW |
1359 | modes M_CFG | 1408 | modes M_CFG |
1360 | count 1 | 1409 | count 1 |
1410 | dont_generate_debug_code | ||
1361 | } | 1411 | } |
1362 | 1412 | ||
1363 | /* | 1413 | /* |
@@ -1398,6 +1448,7 @@ register LUNLEN { | |||
1398 | count 2 | 1448 | count 2 |
1399 | mask ILUNLEN 0x0F | 1449 | mask ILUNLEN 0x0F |
1400 | mask TLUNLEN 0xF0 | 1450 | mask TLUNLEN 0xF0 |
1451 | dont_generate_debug_code | ||
1401 | } | 1452 | } |
1402 | const LUNLEN_SINGLE_LEVEL_LUN 0xF | 1453 | const LUNLEN_SINGLE_LEVEL_LUN 0xF |
1403 | 1454 | ||
@@ -1410,6 +1461,7 @@ register CDBLIMIT { | |||
1410 | access_mode RW | 1461 | access_mode RW |
1411 | modes M_CFG | 1462 | modes M_CFG |
1412 | count 1 | 1463 | count 1 |
1464 | dont_generate_debug_code | ||
1413 | } | 1465 | } |
1414 | 1466 | ||
1415 | /* | 1467 | /* |
@@ -1422,6 +1474,7 @@ register MAXCMD { | |||
1422 | access_mode RW | 1474 | access_mode RW |
1423 | modes M_CFG | 1475 | modes M_CFG |
1424 | count 9 | 1476 | count 9 |
1477 | dont_generate_debug_code | ||
1425 | } | 1478 | } |
1426 | 1479 | ||
1427 | /* | 1480 | /* |
@@ -1432,6 +1485,7 @@ register MAXCMDCNT { | |||
1432 | address 0x033 | 1485 | address 0x033 |
1433 | access_mode RW | 1486 | access_mode RW |
1434 | modes M_CFG | 1487 | modes M_CFG |
1488 | dont_generate_debug_code | ||
1435 | } | 1489 | } |
1436 | 1490 | ||
1437 | /* | 1491 | /* |
@@ -1490,6 +1544,7 @@ register LQCTL1 { | |||
1490 | field PCI2PCI 0x04 | 1544 | field PCI2PCI 0x04 |
1491 | field SINGLECMD 0x02 | 1545 | field SINGLECMD 0x02 |
1492 | field ABORTPENDING 0x01 | 1546 | field ABORTPENDING 0x01 |
1547 | dont_generate_debug_code | ||
1493 | } | 1548 | } |
1494 | 1549 | ||
1495 | /* | 1550 | /* |
@@ -1508,6 +1563,7 @@ register LQCTL2 { | |||
1508 | field LQOCONTINUE 0x04 | 1563 | field LQOCONTINUE 0x04 |
1509 | field LQOTOIDLE 0x02 | 1564 | field LQOTOIDLE 0x02 |
1510 | field LQOPAUSE 0x01 | 1565 | field LQOPAUSE 0x01 |
1566 | dont_generate_debug_code | ||
1511 | } | 1567 | } |
1512 | 1568 | ||
1513 | /* | 1569 | /* |
@@ -1578,6 +1634,7 @@ register SXFRCTL0 { | |||
1578 | field DFPEXP 0x40 | 1634 | field DFPEXP 0x40 |
1579 | field BIOSCANCELEN 0x10 | 1635 | field BIOSCANCELEN 0x10 |
1580 | field SPIOEN 0x08 | 1636 | field SPIOEN 0x08 |
1637 | dont_generate_debug_code | ||
1581 | } | 1638 | } |
1582 | 1639 | ||
1583 | /* | 1640 | /* |
@@ -1594,6 +1651,7 @@ register SXFRCTL1 { | |||
1594 | field ENSTIMER 0x04 | 1651 | field ENSTIMER 0x04 |
1595 | field ACTNEGEN 0x02 | 1652 | field ACTNEGEN 0x02 |
1596 | field STPWEN 0x01 | 1653 | field STPWEN 0x01 |
1654 | dont_generate_debug_code | ||
1597 | } | 1655 | } |
1598 | 1656 | ||
1599 | /* | 1657 | /* |
@@ -1696,6 +1754,7 @@ register SCSISIGO { | |||
1696 | P_STATUS CDO|IOO, | 1754 | P_STATUS CDO|IOO, |
1697 | P_MESGIN CDO|IOO|MSGO | 1755 | P_MESGIN CDO|IOO|MSGO |
1698 | } | 1756 | } |
1757 | dont_generate_debug_code | ||
1699 | } | 1758 | } |
1700 | 1759 | ||
1701 | /* | 1760 | /* |
@@ -1738,6 +1797,7 @@ register MULTARGID { | |||
1738 | modes M_CFG | 1797 | modes M_CFG |
1739 | size 2 | 1798 | size 2 |
1740 | count 2 | 1799 | count 2 |
1800 | dont_generate_debug_code | ||
1741 | } | 1801 | } |
1742 | 1802 | ||
1743 | /* | 1803 | /* |
@@ -1774,6 +1834,7 @@ register SCSIDAT { | |||
1774 | access_mode RW | 1834 | access_mode RW |
1775 | modes M_DFF0, M_DFF1, M_SCSI | 1835 | modes M_DFF0, M_DFF1, M_SCSI |
1776 | size 2 | 1836 | size 2 |
1837 | dont_generate_debug_code | ||
1777 | } | 1838 | } |
1778 | 1839 | ||
1779 | /* | 1840 | /* |
@@ -1796,6 +1857,7 @@ register TARGIDIN { | |||
1796 | count 2 | 1857 | count 2 |
1797 | field CLKOUT 0x80 | 1858 | field CLKOUT 0x80 |
1798 | field TARGID 0x0F | 1859 | field TARGID 0x0F |
1860 | dont_generate_debug_code | ||
1799 | } | 1861 | } |
1800 | 1862 | ||
1801 | /* | 1863 | /* |
@@ -1825,6 +1887,7 @@ register SBLKCTL { | |||
1825 | field ENAB40 0x08 /* LVD transceiver active */ | 1887 | field ENAB40 0x08 /* LVD transceiver active */ |
1826 | field ENAB20 0x04 /* SE/HVD transceiver active */ | 1888 | field ENAB20 0x04 /* SE/HVD transceiver active */ |
1827 | field SELWIDE 0x02 | 1889 | field SELWIDE 0x02 |
1890 | dont_generate_debug_code | ||
1828 | } | 1891 | } |
1829 | 1892 | ||
1830 | /* | 1893 | /* |
@@ -1842,6 +1905,7 @@ register OPTIONMODE { | |||
1842 | field ENDGFORMCHK 0x04 | 1905 | field ENDGFORMCHK 0x04 |
1843 | field AUTO_MSGOUT_DE 0x02 | 1906 | field AUTO_MSGOUT_DE 0x02 |
1844 | mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE | 1907 | mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE |
1908 | dont_generate_debug_code | ||
1845 | } | 1909 | } |
1846 | 1910 | ||
1847 | /* | 1911 | /* |
@@ -1876,6 +1940,7 @@ register CLRSINT0 { | |||
1876 | field CLROVERRUN 0x04 | 1940 | field CLROVERRUN 0x04 |
1877 | field CLRSPIORDY 0x02 | 1941 | field CLRSPIORDY 0x02 |
1878 | field CLRARBDO 0x01 | 1942 | field CLRARBDO 0x01 |
1943 | dont_generate_debug_code | ||
1879 | } | 1944 | } |
1880 | 1945 | ||
1881 | /* | 1946 | /* |
@@ -1929,6 +1994,7 @@ register CLRSINT1 { | |||
1929 | field CLRSCSIPERR 0x04 | 1994 | field CLRSCSIPERR 0x04 |
1930 | field CLRSTRB2FAST 0x02 | 1995 | field CLRSTRB2FAST 0x02 |
1931 | field CLRREQINIT 0x01 | 1996 | field CLRREQINIT 0x01 |
1997 | dont_generate_debug_code | ||
1932 | } | 1998 | } |
1933 | 1999 | ||
1934 | /* | 2000 | /* |
@@ -1962,6 +2028,7 @@ register CLRSINT2 { | |||
1962 | field CLRWIDE_RES 0x04 /* Modes 0 and 1 only */ | 2028 | field CLRWIDE_RES 0x04 /* Modes 0 and 1 only */ |
1963 | field CLRSDONE 0x02 /* Modes 0 and 1 only */ | 2029 | field CLRSDONE 0x02 /* Modes 0 and 1 only */ |
1964 | field CLRDMADONE 0x01 /* Modes 0 and 1 only */ | 2030 | field CLRDMADONE 0x01 /* Modes 0 and 1 only */ |
2031 | dont_generate_debug_code | ||
1965 | } | 2032 | } |
1966 | 2033 | ||
1967 | /* | 2034 | /* |
@@ -2002,6 +2069,7 @@ register LQISTATE { | |||
2002 | access_mode RO | 2069 | access_mode RO |
2003 | modes M_CFG | 2070 | modes M_CFG |
2004 | count 6 | 2071 | count 6 |
2072 | dont_generate_debug_code | ||
2005 | } | 2073 | } |
2006 | 2074 | ||
2007 | /* | 2075 | /* |
@@ -2022,6 +2090,7 @@ register LQOSTATE { | |||
2022 | access_mode RO | 2090 | access_mode RO |
2023 | modes M_CFG | 2091 | modes M_CFG |
2024 | count 2 | 2092 | count 2 |
2093 | dont_generate_debug_code | ||
2025 | } | 2094 | } |
2026 | 2095 | ||
2027 | /* | 2096 | /* |
@@ -2054,6 +2123,7 @@ register CLRLQIINT0 { | |||
2054 | field CLRLQIBADLQT 0x04 | 2123 | field CLRLQIBADLQT 0x04 |
2055 | field CLRLQIATNLQ 0x02 | 2124 | field CLRLQIATNLQ 0x02 |
2056 | field CLRLQIATNCMD 0x01 | 2125 | field CLRLQIATNCMD 0x01 |
2126 | dont_generate_debug_code | ||
2057 | } | 2127 | } |
2058 | 2128 | ||
2059 | /* | 2129 | /* |
@@ -2070,6 +2140,7 @@ register LQIMODE0 { | |||
2070 | field ENLQIBADLQT 0x04 | 2140 | field ENLQIBADLQT 0x04 |
2071 | field ENLQIATNLQ 0x02 | 2141 | field ENLQIATNLQ 0x02 |
2072 | field ENLQIATNCMD 0x01 | 2142 | field ENLQIATNCMD 0x01 |
2143 | dont_generate_debug_code | ||
2073 | } | 2144 | } |
2074 | 2145 | ||
2075 | /* | 2146 | /* |
@@ -2106,6 +2177,7 @@ register CLRLQIINT1 { | |||
2106 | field CLRLQIBADLQI 0x04 | 2177 | field CLRLQIBADLQI 0x04 |
2107 | field CLRLQIOVERI_LQ 0x02 | 2178 | field CLRLQIOVERI_LQ 0x02 |
2108 | field CLRLQIOVERI_NLQ 0x01 | 2179 | field CLRLQIOVERI_NLQ 0x01 |
2180 | dont_generate_debug_code | ||
2109 | } | 2181 | } |
2110 | 2182 | ||
2111 | /* | 2183 | /* |
@@ -2124,6 +2196,7 @@ register LQIMODE1 { | |||
2124 | field ENLQIBADLQI 0x04 | 2196 | field ENLQIBADLQI 0x04 |
2125 | field ENLQIOVERI_LQ 0x02 /* LQIOVERI1 */ | 2197 | field ENLQIOVERI_LQ 0x02 /* LQIOVERI1 */ |
2126 | field ENLQIOVERI_NLQ 0x01 /* LQIOVERI2 */ | 2198 | field ENLQIOVERI_NLQ 0x01 /* LQIOVERI2 */ |
2199 | dont_generate_debug_code | ||
2127 | } | 2200 | } |
2128 | 2201 | ||
2129 | /* | 2202 | /* |
@@ -2165,6 +2238,7 @@ register CLRSINT3 { | |||
2165 | count 3 | 2238 | count 3 |
2166 | field CLRNTRAMPERR 0x02 | 2239 | field CLRNTRAMPERR 0x02 |
2167 | field CLROSRAMPERR 0x01 | 2240 | field CLROSRAMPERR 0x01 |
2241 | dont_generate_debug_code | ||
2168 | } | 2242 | } |
2169 | 2243 | ||
2170 | /* | 2244 | /* |
@@ -2177,6 +2251,7 @@ register SIMODE3 { | |||
2177 | count 4 | 2251 | count 4 |
2178 | field ENNTRAMPERR 0x02 | 2252 | field ENNTRAMPERR 0x02 |
2179 | field ENOSRAMPERR 0x01 | 2253 | field ENOSRAMPERR 0x01 |
2254 | dont_generate_debug_code | ||
2180 | } | 2255 | } |
2181 | 2256 | ||
2182 | /* | 2257 | /* |
@@ -2207,6 +2282,7 @@ register CLRLQOINT0 { | |||
2207 | field CLRLQOATNLQ 0x04 | 2282 | field CLRLQOATNLQ 0x04 |
2208 | field CLRLQOATNPKT 0x02 | 2283 | field CLRLQOATNPKT 0x02 |
2209 | field CLRLQOTCRC 0x01 | 2284 | field CLRLQOTCRC 0x01 |
2285 | dont_generate_debug_code | ||
2210 | } | 2286 | } |
2211 | 2287 | ||
2212 | /* | 2288 | /* |
@@ -2222,6 +2298,7 @@ register LQOMODE0 { | |||
2222 | field ENLQOATNLQ 0x04 | 2298 | field ENLQOATNLQ 0x04 |
2223 | field ENLQOATNPKT 0x02 | 2299 | field ENLQOATNPKT 0x02 |
2224 | field ENLQOTCRC 0x01 | 2300 | field ENLQOTCRC 0x01 |
2301 | dont_generate_debug_code | ||
2225 | } | 2302 | } |
2226 | 2303 | ||
2227 | /* | 2304 | /* |
@@ -2251,6 +2328,7 @@ register CLRLQOINT1 { | |||
2251 | field CLRLQOBADQAS 0x04 | 2328 | field CLRLQOBADQAS 0x04 |
2252 | field CLRLQOBUSFREE 0x02 | 2329 | field CLRLQOBUSFREE 0x02 |
2253 | field CLRLQOPHACHGINPKT 0x01 | 2330 | field CLRLQOPHACHGINPKT 0x01 |
2331 | dont_generate_debug_code | ||
2254 | } | 2332 | } |
2255 | 2333 | ||
2256 | /* | 2334 | /* |
@@ -2266,6 +2344,7 @@ register LQOMODE1 { | |||
2266 | field ENLQOBADQAS 0x04 | 2344 | field ENLQOBADQAS 0x04 |
2267 | field ENLQOBUSFREE 0x02 | 2345 | field ENLQOBUSFREE 0x02 |
2268 | field ENLQOPHACHGINPKT 0x01 | 2346 | field ENLQOPHACHGINPKT 0x01 |
2347 | dont_generate_debug_code | ||
2269 | } | 2348 | } |
2270 | 2349 | ||
2271 | /* | 2350 | /* |
@@ -2289,6 +2368,7 @@ register OS_SPACE_CNT { | |||
2289 | access_mode RO | 2368 | access_mode RO |
2290 | modes M_CFG | 2369 | modes M_CFG |
2291 | count 2 | 2370 | count 2 |
2371 | dont_generate_debug_code | ||
2292 | } | 2372 | } |
2293 | 2373 | ||
2294 | /* | 2374 | /* |
@@ -2318,6 +2398,7 @@ register GSFIFO { | |||
2318 | access_mode RO | 2398 | access_mode RO |
2319 | size 2 | 2399 | size 2 |
2320 | modes M_DFF0, M_DFF1, M_SCSI | 2400 | modes M_DFF0, M_DFF1, M_SCSI |
2401 | dont_generate_debug_code | ||
2321 | } | 2402 | } |
2322 | 2403 | ||
2323 | /* | 2404 | /* |
@@ -2341,6 +2422,7 @@ register NEXTSCB { | |||
2341 | access_mode RW | 2422 | access_mode RW |
2342 | size 2 | 2423 | size 2 |
2343 | modes M_SCSI | 2424 | modes M_SCSI |
2425 | dont_generate_debug_code | ||
2344 | } | 2426 | } |
2345 | 2427 | ||
2346 | /* | 2428 | /* |
@@ -2357,6 +2439,7 @@ register LQOSCSCTL { | |||
2357 | field LQOBUSETDLY 0x40 | 2439 | field LQOBUSETDLY 0x40 |
2358 | field LQONOHOLDLACK 0x02 | 2440 | field LQONOHOLDLACK 0x02 |
2359 | field LQONOCHKOVER 0x01 | 2441 | field LQONOCHKOVER 0x01 |
2442 | dont_generate_debug_code | ||
2360 | } | 2443 | } |
2361 | 2444 | ||
2362 | /* | 2445 | /* |
@@ -2389,6 +2472,7 @@ register CLRSEQINTSRC { | |||
2389 | field CLRCFG4TSTAT 0x04 | 2472 | field CLRCFG4TSTAT 0x04 |
2390 | field CLRCFG4ICMD 0x02 | 2473 | field CLRCFG4ICMD 0x02 |
2391 | field CLRCFG4TCMD 0x01 | 2474 | field CLRCFG4TCMD 0x01 |
2475 | dont_generate_debug_code | ||
2392 | } | 2476 | } |
2393 | 2477 | ||
2394 | /* | 2478 | /* |
@@ -2415,6 +2499,7 @@ register CURRSCB { | |||
2415 | access_mode RW | 2499 | access_mode RW |
2416 | size 2 | 2500 | size 2 |
2417 | modes M_SCSI | 2501 | modes M_SCSI |
2502 | dont_generate_debug_code | ||
2418 | } | 2503 | } |
2419 | 2504 | ||
2420 | /* | 2505 | /* |
@@ -2472,6 +2557,7 @@ register LASTSCB { | |||
2472 | access_mode RW | 2557 | access_mode RW |
2473 | size 2 | 2558 | size 2 |
2474 | modes M_SCSI | 2559 | modes M_SCSI |
2560 | dont_generate_debug_code | ||
2475 | } | 2561 | } |
2476 | 2562 | ||
2477 | /* | 2563 | /* |
@@ -2494,6 +2580,7 @@ register SHADDR { | |||
2494 | access_mode RO | 2580 | access_mode RO |
2495 | size 8 | 2581 | size 8 |
2496 | modes M_DFF0, M_DFF1 | 2582 | modes M_DFF0, M_DFF1 |
2583 | dont_generate_debug_code | ||
2497 | } | 2584 | } |
2498 | 2585 | ||
2499 | /* | 2586 | /* |
@@ -2513,6 +2600,7 @@ register NEGOADDR { | |||
2513 | address 0x060 | 2600 | address 0x060 |
2514 | access_mode RW | 2601 | access_mode RW |
2515 | modes M_SCSI | 2602 | modes M_SCSI |
2603 | dont_generate_debug_code | ||
2516 | } | 2604 | } |
2517 | 2605 | ||
2518 | /* | 2606 | /* |
@@ -2523,6 +2611,7 @@ register NEGPERIOD { | |||
2523 | access_mode RW | 2611 | access_mode RW |
2524 | modes M_SCSI | 2612 | modes M_SCSI |
2525 | count 1 | 2613 | count 1 |
2614 | dont_generate_debug_code | ||
2526 | } | 2615 | } |
2527 | 2616 | ||
2528 | /* | 2617 | /* |
@@ -2543,6 +2632,7 @@ register NEGOFFSET { | |||
2543 | access_mode RW | 2632 | access_mode RW |
2544 | modes M_SCSI | 2633 | modes M_SCSI |
2545 | count 1 | 2634 | count 1 |
2635 | dont_generate_debug_code | ||
2546 | } | 2636 | } |
2547 | 2637 | ||
2548 | /* | 2638 | /* |
@@ -2557,6 +2647,7 @@ register NEGPPROPTS { | |||
2557 | field PPROPT_QAS 0x04 | 2647 | field PPROPT_QAS 0x04 |
2558 | field PPROPT_DT 0x02 | 2648 | field PPROPT_DT 0x02 |
2559 | field PPROPT_IUT 0x01 | 2649 | field PPROPT_IUT 0x01 |
2650 | dont_generate_debug_code | ||
2560 | } | 2651 | } |
2561 | 2652 | ||
2562 | /* | 2653 | /* |
@@ -2573,6 +2664,7 @@ register NEGCONOPTS { | |||
2573 | field ENAUTOATNI 0x04 | 2664 | field ENAUTOATNI 0x04 |
2574 | field ENAUTOATNO 0x02 | 2665 | field ENAUTOATNO 0x02 |
2575 | field WIDEXFER 0x01 | 2666 | field WIDEXFER 0x01 |
2667 | dont_generate_debug_code | ||
2576 | } | 2668 | } |
2577 | 2669 | ||
2578 | /* | 2670 | /* |
@@ -2583,6 +2675,7 @@ register ANNEXCOL { | |||
2583 | access_mode RW | 2675 | access_mode RW |
2584 | modes M_SCSI | 2676 | modes M_SCSI |
2585 | count 7 | 2677 | count 7 |
2678 | dont_generate_debug_code | ||
2586 | } | 2679 | } |
2587 | 2680 | ||
2588 | /* | 2681 | /* |
@@ -2602,6 +2695,7 @@ register SCSCHKN { | |||
2602 | field DFFACTCLR 0x04 | 2695 | field DFFACTCLR 0x04 |
2603 | field SHVALIDSTDIS 0x02 | 2696 | field SHVALIDSTDIS 0x02 |
2604 | field LSTSGCLRDIS 0x01 | 2697 | field LSTSGCLRDIS 0x01 |
2698 | dont_generate_debug_code | ||
2605 | } | 2699 | } |
2606 | 2700 | ||
2607 | const AHD_ANNEXCOL_PER_DEV0 4 | 2701 | const AHD_ANNEXCOL_PER_DEV0 4 |
@@ -2635,6 +2729,7 @@ register ANNEXDAT { | |||
2635 | access_mode RW | 2729 | access_mode RW |
2636 | modes M_SCSI | 2730 | modes M_SCSI |
2637 | count 3 | 2731 | count 3 |
2732 | dont_generate_debug_code | ||
2638 | } | 2733 | } |
2639 | 2734 | ||
2640 | /* | 2735 | /* |
@@ -2645,6 +2740,7 @@ register IOWNID { | |||
2645 | address 0x067 | 2740 | address 0x067 |
2646 | access_mode RW | 2741 | access_mode RW |
2647 | modes M_SCSI | 2742 | modes M_SCSI |
2743 | dont_generate_debug_code | ||
2648 | } | 2744 | } |
2649 | 2745 | ||
2650 | /* | 2746 | /* |
@@ -2671,6 +2767,7 @@ register TOWNID { | |||
2671 | access_mode RW | 2767 | access_mode RW |
2672 | modes M_SCSI | 2768 | modes M_SCSI |
2673 | count 2 | 2769 | count 2 |
2770 | dont_generate_debug_code | ||
2674 | } | 2771 | } |
2675 | 2772 | ||
2676 | /* | 2773 | /* |
@@ -2702,6 +2799,7 @@ register SHCNT { | |||
2702 | access_mode RW | 2799 | access_mode RW |
2703 | size 3 | 2800 | size 3 |
2704 | modes M_DFF0, M_DFF1 | 2801 | modes M_DFF0, M_DFF1 |
2802 | dont_generate_debug_code | ||
2705 | } | 2803 | } |
2706 | 2804 | ||
2707 | /* | 2805 | /* |
@@ -2789,6 +2887,7 @@ register SCBPTR { | |||
2789 | access_mode RW | 2887 | access_mode RW |
2790 | size 2 | 2888 | size 2 |
2791 | modes M_DFF0, M_DFF1, M_CCHAN, M_SCSI | 2889 | modes M_DFF0, M_DFF1, M_CCHAN, M_SCSI |
2890 | dont_generate_debug_code | ||
2792 | } | 2891 | } |
2793 | 2892 | ||
2794 | /* | 2893 | /* |
@@ -2816,6 +2915,7 @@ register SCBAUTOPTR { | |||
2816 | field AUSCBPTR_EN 0x80 | 2915 | field AUSCBPTR_EN 0x80 |
2817 | field SCBPTR_ADDR 0x38 | 2916 | field SCBPTR_ADDR 0x38 |
2818 | field SCBPTR_OFF 0x07 | 2917 | field SCBPTR_OFF 0x07 |
2918 | dont_generate_debug_code | ||
2819 | } | 2919 | } |
2820 | 2920 | ||
2821 | /* | 2921 | /* |
@@ -2825,6 +2925,7 @@ register CCSGADDR { | |||
2825 | address 0x0AC | 2925 | address 0x0AC |
2826 | access_mode RW | 2926 | access_mode RW |
2827 | modes M_DFF0, M_DFF1 | 2927 | modes M_DFF0, M_DFF1 |
2928 | dont_generate_debug_code | ||
2828 | } | 2929 | } |
2829 | 2930 | ||
2830 | /* | 2931 | /* |
@@ -2834,6 +2935,7 @@ register CCSCBADDR { | |||
2834 | address 0x0AC | 2935 | address 0x0AC |
2835 | access_mode RW | 2936 | access_mode RW |
2836 | modes M_CCHAN | 2937 | modes M_CCHAN |
2938 | dont_generate_debug_code | ||
2837 | } | 2939 | } |
2838 | 2940 | ||
2839 | /* | 2941 | /* |
@@ -2899,6 +3001,7 @@ register CCSGRAM { | |||
2899 | address 0x0B0 | 3001 | address 0x0B0 |
2900 | access_mode RW | 3002 | access_mode RW |
2901 | modes M_DFF0, M_DFF1 | 3003 | modes M_DFF0, M_DFF1 |
3004 | dont_generate_debug_code | ||
2902 | } | 3005 | } |
2903 | 3006 | ||
2904 | /* | 3007 | /* |
@@ -2908,6 +3011,7 @@ register CCSCBRAM { | |||
2908 | address 0x0B0 | 3011 | address 0x0B0 |
2909 | access_mode RW | 3012 | access_mode RW |
2910 | modes M_CCHAN | 3013 | modes M_CCHAN |
3014 | dont_generate_debug_code | ||
2911 | } | 3015 | } |
2912 | 3016 | ||
2913 | /* | 3017 | /* |
@@ -2958,6 +3062,7 @@ register BRDDAT { | |||
2958 | access_mode RW | 3062 | access_mode RW |
2959 | modes M_SCSI | 3063 | modes M_SCSI |
2960 | count 2 | 3064 | count 2 |
3065 | dont_generate_debug_code | ||
2961 | } | 3066 | } |
2962 | 3067 | ||
2963 | /* | 3068 | /* |
@@ -2974,6 +3079,7 @@ register BRDCTL { | |||
2974 | field BRDEN 0x04 | 3079 | field BRDEN 0x04 |
2975 | field BRDRW 0x02 | 3080 | field BRDRW 0x02 |
2976 | field BRDSTB 0x01 | 3081 | field BRDSTB 0x01 |
3082 | dont_generate_debug_code | ||
2977 | } | 3083 | } |
2978 | 3084 | ||
2979 | /* | 3085 | /* |
@@ -2984,6 +3090,7 @@ register SEEADR { | |||
2984 | access_mode RW | 3090 | access_mode RW |
2985 | modes M_SCSI | 3091 | modes M_SCSI |
2986 | count 4 | 3092 | count 4 |
3093 | dont_generate_debug_code | ||
2987 | } | 3094 | } |
2988 | 3095 | ||
2989 | /* | 3096 | /* |
@@ -2995,6 +3102,7 @@ register SEEDAT { | |||
2995 | size 2 | 3102 | size 2 |
2996 | modes M_SCSI | 3103 | modes M_SCSI |
2997 | count 4 | 3104 | count 4 |
3105 | dont_generate_debug_code | ||
2998 | } | 3106 | } |
2999 | 3107 | ||
3000 | /* | 3108 | /* |
@@ -3011,6 +3119,7 @@ register SEESTAT { | |||
3011 | field SEEARBACK 0x04 | 3119 | field SEEARBACK 0x04 |
3012 | field SEEBUSY 0x02 | 3120 | field SEEBUSY 0x02 |
3013 | field SEESTART 0x01 | 3121 | field SEESTART 0x01 |
3122 | dont_generate_debug_code | ||
3014 | } | 3123 | } |
3015 | 3124 | ||
3016 | /* | 3125 | /* |
@@ -3036,6 +3145,7 @@ register SEECTL { | |||
3036 | mask SEEOP_EWDS 0x40 | 3145 | mask SEEOP_EWDS 0x40 |
3037 | field SEERST 0x02 | 3146 | field SEERST 0x02 |
3038 | field SEESTART 0x01 | 3147 | field SEESTART 0x01 |
3148 | dont_generate_debug_code | ||
3039 | } | 3149 | } |
3040 | 3150 | ||
3041 | const SEEOP_ERAL_ADDR 0x80 | 3151 | const SEEOP_ERAL_ADDR 0x80 |
@@ -3050,6 +3160,7 @@ register SCBCNT { | |||
3050 | address 0x0BF | 3160 | address 0x0BF |
3051 | access_mode RW | 3161 | access_mode RW |
3052 | modes M_SCSI | 3162 | modes M_SCSI |
3163 | dont_generate_debug_code | ||
3053 | } | 3164 | } |
3054 | 3165 | ||
3055 | /* | 3166 | /* |
@@ -3061,6 +3172,7 @@ register DFWADDR { | |||
3061 | access_mode RW | 3172 | access_mode RW |
3062 | size 2 | 3173 | size 2 |
3063 | modes M_DFF0, M_DFF1 | 3174 | modes M_DFF0, M_DFF1 |
3175 | dont_generate_debug_code | ||
3064 | } | 3176 | } |
3065 | 3177 | ||
3066 | /* | 3178 | /* |
@@ -3087,6 +3199,7 @@ register DSPDATACTL { | |||
3087 | field DESQDIS 0x10 | 3199 | field DESQDIS 0x10 |
3088 | field RCVROFFSTDIS 0x04 | 3200 | field RCVROFFSTDIS 0x04 |
3089 | field XMITOFFSTDIS 0x02 | 3201 | field XMITOFFSTDIS 0x02 |
3202 | dont_generate_debug_code | ||
3090 | } | 3203 | } |
3091 | 3204 | ||
3092 | /* | 3205 | /* |
@@ -3132,6 +3245,7 @@ register DFDAT { | |||
3132 | address 0x0C4 | 3245 | address 0x0C4 |
3133 | access_mode RW | 3246 | access_mode RW |
3134 | modes M_DFF0, M_DFF1 | 3247 | modes M_DFF0, M_DFF1 |
3248 | dont_generate_debug_code | ||
3135 | } | 3249 | } |
3136 | 3250 | ||
3137 | /* | 3251 | /* |
@@ -3144,6 +3258,7 @@ register DSPSELECT { | |||
3144 | count 1 | 3258 | count 1 |
3145 | field AUTOINCEN 0x80 | 3259 | field AUTOINCEN 0x80 |
3146 | field DSPSEL 0x1F | 3260 | field DSPSEL 0x1F |
3261 | dont_generate_debug_code | ||
3147 | } | 3262 | } |
3148 | 3263 | ||
3149 | const NUMDSPS 0x14 | 3264 | const NUMDSPS 0x14 |
@@ -3158,6 +3273,7 @@ register WRTBIASCTL { | |||
3158 | count 3 | 3273 | count 3 |
3159 | field AUTOXBCDIS 0x80 | 3274 | field AUTOXBCDIS 0x80 |
3160 | field XMITMANVAL 0x3F | 3275 | field XMITMANVAL 0x3F |
3276 | dont_generate_debug_code | ||
3161 | } | 3277 | } |
3162 | 3278 | ||
3163 | /* | 3279 | /* |
@@ -3316,6 +3432,7 @@ register FLAGS { | |||
3316 | count 23 | 3432 | count 23 |
3317 | field ZERO 0x02 | 3433 | field ZERO 0x02 |
3318 | field CARRY 0x01 | 3434 | field CARRY 0x01 |
3435 | dont_generate_debug_code | ||
3319 | } | 3436 | } |
3320 | 3437 | ||
3321 | /* | 3438 | /* |
@@ -3344,6 +3461,7 @@ register SEQRAM { | |||
3344 | address 0x0DA | 3461 | address 0x0DA |
3345 | access_mode RW | 3462 | access_mode RW |
3346 | count 2 | 3463 | count 2 |
3464 | dont_generate_debug_code | ||
3347 | } | 3465 | } |
3348 | 3466 | ||
3349 | /* | 3467 | /* |
@@ -3355,6 +3473,7 @@ register PRGMCNT { | |||
3355 | access_mode RW | 3473 | access_mode RW |
3356 | size 2 | 3474 | size 2 |
3357 | count 5 | 3475 | count 5 |
3476 | dont_generate_debug_code | ||
3358 | } | 3477 | } |
3359 | 3478 | ||
3360 | /* | 3479 | /* |
@@ -3364,6 +3483,7 @@ register ACCUM { | |||
3364 | address 0x0E0 | 3483 | address 0x0E0 |
3365 | access_mode RW | 3484 | access_mode RW |
3366 | accumulator | 3485 | accumulator |
3486 | dont_generate_debug_code | ||
3367 | } | 3487 | } |
3368 | 3488 | ||
3369 | /* | 3489 | /* |
@@ -3380,6 +3500,7 @@ register SINDEX { | |||
3380 | access_mode RW | 3500 | access_mode RW |
3381 | size 2 | 3501 | size 2 |
3382 | sindex | 3502 | sindex |
3503 | dont_generate_debug_code | ||
3383 | } | 3504 | } |
3384 | 3505 | ||
3385 | /* | 3506 | /* |
@@ -3390,6 +3511,7 @@ register DINDEX { | |||
3390 | address 0x0E4 | 3511 | address 0x0E4 |
3391 | access_mode RW | 3512 | access_mode RW |
3392 | size 2 | 3513 | size 2 |
3514 | dont_generate_debug_code | ||
3393 | } | 3515 | } |
3394 | 3516 | ||
3395 | /* | 3517 | /* |
@@ -3415,6 +3537,7 @@ register ALLONES { | |||
3415 | address 0x0E8 | 3537 | address 0x0E8 |
3416 | access_mode RO | 3538 | access_mode RO |
3417 | allones | 3539 | allones |
3540 | dont_generate_debug_code | ||
3418 | } | 3541 | } |
3419 | 3542 | ||
3420 | /* | 3543 | /* |
@@ -3425,6 +3548,7 @@ register ALLZEROS { | |||
3425 | address 0x0EA | 3548 | address 0x0EA |
3426 | access_mode RO | 3549 | access_mode RO |
3427 | allzeros | 3550 | allzeros |
3551 | dont_generate_debug_code | ||
3428 | } | 3552 | } |
3429 | 3553 | ||
3430 | /* | 3554 | /* |
@@ -3435,6 +3559,7 @@ register NONE { | |||
3435 | address 0x0EA | 3559 | address 0x0EA |
3436 | access_mode WO | 3560 | access_mode WO |
3437 | none | 3561 | none |
3562 | dont_generate_debug_code | ||
3438 | } | 3563 | } |
3439 | 3564 | ||
3440 | /* | 3565 | /* |
@@ -3445,6 +3570,7 @@ register NONE { | |||
3445 | register SINDIR { | 3570 | register SINDIR { |
3446 | address 0x0EC | 3571 | address 0x0EC |
3447 | access_mode RO | 3572 | access_mode RO |
3573 | dont_generate_debug_code | ||
3448 | } | 3574 | } |
3449 | 3575 | ||
3450 | /* | 3576 | /* |
@@ -3455,6 +3581,7 @@ register SINDIR { | |||
3455 | register DINDIR { | 3581 | register DINDIR { |
3456 | address 0x0ED | 3582 | address 0x0ED |
3457 | access_mode WO | 3583 | access_mode WO |
3584 | dont_generate_debug_code | ||
3458 | } | 3585 | } |
3459 | 3586 | ||
3460 | /* | 3587 | /* |
@@ -3479,6 +3606,7 @@ register FUNCTION1 { | |||
3479 | register STACK { | 3606 | register STACK { |
3480 | address 0x0F2 | 3607 | address 0x0F2 |
3481 | access_mode RW | 3608 | access_mode RW |
3609 | dont_generate_debug_code | ||
3482 | } | 3610 | } |
3483 | 3611 | ||
3484 | /* | 3612 | /* |
@@ -3491,6 +3619,7 @@ register INTVEC1_ADDR { | |||
3491 | size 2 | 3619 | size 2 |
3492 | modes M_CFG | 3620 | modes M_CFG |
3493 | count 1 | 3621 | count 1 |
3622 | dont_generate_debug_code | ||
3494 | } | 3623 | } |
3495 | 3624 | ||
3496 | /* | 3625 | /* |
@@ -3503,6 +3632,7 @@ register CURADDR { | |||
3503 | size 2 | 3632 | size 2 |
3504 | modes M_SCSI | 3633 | modes M_SCSI |
3505 | count 2 | 3634 | count 2 |
3635 | dont_generate_debug_code | ||
3506 | } | 3636 | } |
3507 | 3637 | ||
3508 | /* | 3638 | /* |
@@ -3515,6 +3645,7 @@ register INTVEC2_ADDR { | |||
3515 | size 2 | 3645 | size 2 |
3516 | modes M_CFG | 3646 | modes M_CFG |
3517 | count 1 | 3647 | count 1 |
3648 | dont_generate_debug_code | ||
3518 | } | 3649 | } |
3519 | 3650 | ||
3520 | /* | 3651 | /* |
@@ -3543,12 +3674,14 @@ scratch_ram { | |||
3543 | modes 0, 1, 2, 3 | 3674 | modes 0, 1, 2, 3 |
3544 | REG0 { | 3675 | REG0 { |
3545 | size 2 | 3676 | size 2 |
3677 | dont_generate_debug_code | ||
3546 | } | 3678 | } |
3547 | REG1 { | 3679 | REG1 { |
3548 | size 2 | 3680 | size 2 |
3549 | } | 3681 | } |
3550 | REG_ISR { | 3682 | REG_ISR { |
3551 | size 2 | 3683 | size 2 |
3684 | dont_generate_debug_code | ||
3552 | } | 3685 | } |
3553 | SG_STATE { | 3686 | SG_STATE { |
3554 | size 1 | 3687 | size 1 |
@@ -3572,9 +3705,11 @@ scratch_ram { | |||
3572 | modes 0, 1, 2, 3 | 3705 | modes 0, 1, 2, 3 |
3573 | LONGJMP_ADDR { | 3706 | LONGJMP_ADDR { |
3574 | size 2 | 3707 | size 2 |
3708 | dont_generate_debug_code | ||
3575 | } | 3709 | } |
3576 | ACCUM_SAVE { | 3710 | ACCUM_SAVE { |
3577 | size 1 | 3711 | size 1 |
3712 | dont_generate_debug_code | ||
3578 | } | 3713 | } |
3579 | } | 3714 | } |
3580 | 3715 | ||
@@ -3591,18 +3726,22 @@ scratch_ram { | |||
3591 | */ | 3726 | */ |
3592 | WAITING_SCB_TAILS { | 3727 | WAITING_SCB_TAILS { |
3593 | size 32 | 3728 | size 32 |
3729 | dont_generate_debug_code | ||
3594 | } | 3730 | } |
3595 | WAITING_TID_HEAD { | 3731 | WAITING_TID_HEAD { |
3596 | size 2 | 3732 | size 2 |
3733 | dont_generate_debug_code | ||
3597 | } | 3734 | } |
3598 | WAITING_TID_TAIL { | 3735 | WAITING_TID_TAIL { |
3599 | size 2 | 3736 | size 2 |
3737 | dont_generate_debug_code | ||
3600 | } | 3738 | } |
3601 | /* | 3739 | /* |
3602 | * SCBID of the next SCB in the new SCB queue. | 3740 | * SCBID of the next SCB in the new SCB queue. |
3603 | */ | 3741 | */ |
3604 | NEXT_QUEUED_SCB_ADDR { | 3742 | NEXT_QUEUED_SCB_ADDR { |
3605 | size 4 | 3743 | size 4 |
3744 | dont_generate_debug_code | ||
3606 | } | 3745 | } |
3607 | /* | 3746 | /* |
3608 | * head of list of SCBs that have | 3747 | * head of list of SCBs that have |
@@ -3611,6 +3750,7 @@ scratch_ram { | |||
3611 | */ | 3750 | */ |
3612 | COMPLETE_SCB_HEAD { | 3751 | COMPLETE_SCB_HEAD { |
3613 | size 2 | 3752 | size 2 |
3753 | dont_generate_debug_code | ||
3614 | } | 3754 | } |
3615 | /* | 3755 | /* |
3616 | * The list of completed SCBs in | 3756 | * The list of completed SCBs in |
@@ -3618,6 +3758,7 @@ scratch_ram { | |||
3618 | */ | 3758 | */ |
3619 | COMPLETE_SCB_DMAINPROG_HEAD { | 3759 | COMPLETE_SCB_DMAINPROG_HEAD { |
3620 | size 2 | 3760 | size 2 |
3761 | dont_generate_debug_code | ||
3621 | } | 3762 | } |
3622 | /* | 3763 | /* |
3623 | * head of list of SCBs that have | 3764 | * head of list of SCBs that have |
@@ -3626,6 +3767,7 @@ scratch_ram { | |||
3626 | */ | 3767 | */ |
3627 | COMPLETE_DMA_SCB_HEAD { | 3768 | COMPLETE_DMA_SCB_HEAD { |
3628 | size 2 | 3769 | size 2 |
3770 | dont_generate_debug_code | ||
3629 | } | 3771 | } |
3630 | /* | 3772 | /* |
3631 | * tail of list of SCBs that have | 3773 | * tail of list of SCBs that have |
@@ -3634,6 +3776,7 @@ scratch_ram { | |||
3634 | */ | 3776 | */ |
3635 | COMPLETE_DMA_SCB_TAIL { | 3777 | COMPLETE_DMA_SCB_TAIL { |
3636 | size 2 | 3778 | size 2 |
3779 | dont_generate_debug_code | ||
3637 | } | 3780 | } |
3638 | /* | 3781 | /* |
3639 | * head of list of SCBs that have | 3782 | * head of list of SCBs that have |
@@ -3643,6 +3786,7 @@ scratch_ram { | |||
3643 | */ | 3786 | */ |
3644 | COMPLETE_ON_QFREEZE_HEAD { | 3787 | COMPLETE_ON_QFREEZE_HEAD { |
3645 | size 2 | 3788 | size 2 |
3789 | dont_generate_debug_code | ||
3646 | } | 3790 | } |
3647 | /* | 3791 | /* |
3648 | * Counting semaphore to prevent new select-outs | 3792 | * Counting semaphore to prevent new select-outs |
@@ -3667,6 +3811,7 @@ scratch_ram { | |||
3667 | */ | 3811 | */ |
3668 | MSG_OUT { | 3812 | MSG_OUT { |
3669 | size 1 | 3813 | size 1 |
3814 | dont_generate_debug_code | ||
3670 | } | 3815 | } |
3671 | /* Parameters for DMA Logic */ | 3816 | /* Parameters for DMA Logic */ |
3672 | DMAPARAMS { | 3817 | DMAPARAMS { |
@@ -3682,6 +3827,7 @@ scratch_ram { | |||
3682 | field DIRECTION 0x04 /* Set indicates PCI->SCSI */ | 3827 | field DIRECTION 0x04 /* Set indicates PCI->SCSI */ |
3683 | field FIFOFLUSH 0x02 | 3828 | field FIFOFLUSH 0x02 |
3684 | field FIFORESET 0x01 | 3829 | field FIFORESET 0x01 |
3830 | dont_generate_debug_code | ||
3685 | } | 3831 | } |
3686 | SEQ_FLAGS { | 3832 | SEQ_FLAGS { |
3687 | size 1 | 3833 | size 1 |
@@ -3703,9 +3849,11 @@ scratch_ram { | |||
3703 | */ | 3849 | */ |
3704 | SAVED_SCSIID { | 3850 | SAVED_SCSIID { |
3705 | size 1 | 3851 | size 1 |
3852 | dont_generate_debug_code | ||
3706 | } | 3853 | } |
3707 | SAVED_LUN { | 3854 | SAVED_LUN { |
3708 | size 1 | 3855 | size 1 |
3856 | dont_generate_debug_code | ||
3709 | } | 3857 | } |
3710 | /* | 3858 | /* |
3711 | * The last bus phase as seen by the sequencer. | 3859 | * The last bus phase as seen by the sequencer. |
@@ -3733,6 +3881,7 @@ scratch_ram { | |||
3733 | */ | 3881 | */ |
3734 | QOUTFIFO_ENTRY_VALID_TAG { | 3882 | QOUTFIFO_ENTRY_VALID_TAG { |
3735 | size 1 | 3883 | size 1 |
3884 | dont_generate_debug_code | ||
3736 | } | 3885 | } |
3737 | /* | 3886 | /* |
3738 | * Kernel and sequencer offsets into the queue of | 3887 | * Kernel and sequencer offsets into the queue of |
@@ -3742,10 +3891,12 @@ scratch_ram { | |||
3742 | KERNEL_TQINPOS { | 3891 | KERNEL_TQINPOS { |
3743 | size 1 | 3892 | size 1 |
3744 | count 1 | 3893 | count 1 |
3894 | dont_generate_debug_code | ||
3745 | } | 3895 | } |
3746 | TQINPOS { | 3896 | TQINPOS { |
3747 | size 1 | 3897 | size 1 |
3748 | count 8 | 3898 | count 8 |
3899 | dont_generate_debug_code | ||
3749 | } | 3900 | } |
3750 | /* | 3901 | /* |
3751 | * Base address of our shared data with the kernel driver in host | 3902 | * Base address of our shared data with the kernel driver in host |
@@ -3754,6 +3905,7 @@ scratch_ram { | |||
3754 | */ | 3905 | */ |
3755 | SHARED_DATA_ADDR { | 3906 | SHARED_DATA_ADDR { |
3756 | size 4 | 3907 | size 4 |
3908 | dont_generate_debug_code | ||
3757 | } | 3909 | } |
3758 | /* | 3910 | /* |
3759 | * Pointer to location in host memory for next | 3911 | * Pointer to location in host memory for next |
@@ -3761,6 +3913,7 @@ scratch_ram { | |||
3761 | */ | 3913 | */ |
3762 | QOUTFIFO_NEXT_ADDR { | 3914 | QOUTFIFO_NEXT_ADDR { |
3763 | size 4 | 3915 | size 4 |
3916 | dont_generate_debug_code | ||
3764 | } | 3917 | } |
3765 | ARG_1 { | 3918 | ARG_1 { |
3766 | size 1 | 3919 | size 1 |
@@ -3773,11 +3926,13 @@ scratch_ram { | |||
3773 | mask CONT_MSG_LOOP_READ 0x03 | 3926 | mask CONT_MSG_LOOP_READ 0x03 |
3774 | mask CONT_MSG_LOOP_TARG 0x02 | 3927 | mask CONT_MSG_LOOP_TARG 0x02 |
3775 | alias RETURN_1 | 3928 | alias RETURN_1 |
3929 | dont_generate_debug_code | ||
3776 | } | 3930 | } |
3777 | ARG_2 { | 3931 | ARG_2 { |
3778 | size 1 | 3932 | size 1 |
3779 | count 1 | 3933 | count 1 |
3780 | alias RETURN_2 | 3934 | alias RETURN_2 |
3935 | dont_generate_debug_code | ||
3781 | } | 3936 | } |
3782 | 3937 | ||
3783 | /* | 3938 | /* |
@@ -3785,6 +3940,7 @@ scratch_ram { | |||
3785 | */ | 3940 | */ |
3786 | LAST_MSG { | 3941 | LAST_MSG { |
3787 | size 1 | 3942 | size 1 |
3943 | dont_generate_debug_code | ||
3788 | } | 3944 | } |
3789 | 3945 | ||
3790 | /* | 3946 | /* |
@@ -3801,6 +3957,7 @@ scratch_ram { | |||
3801 | field MANUALP 0x0C | 3957 | field MANUALP 0x0C |
3802 | field ENAUTOATNP 0x02 | 3958 | field ENAUTOATNP 0x02 |
3803 | field ALTSTIM 0x01 | 3959 | field ALTSTIM 0x01 |
3960 | dont_generate_debug_code | ||
3804 | } | 3961 | } |
3805 | 3962 | ||
3806 | /* | 3963 | /* |
@@ -3809,6 +3966,7 @@ scratch_ram { | |||
3809 | INITIATOR_TAG { | 3966 | INITIATOR_TAG { |
3810 | size 1 | 3967 | size 1 |
3811 | count 1 | 3968 | count 1 |
3969 | dont_generate_debug_code | ||
3812 | } | 3970 | } |
3813 | 3971 | ||
3814 | SEQ_FLAGS2 { | 3972 | SEQ_FLAGS2 { |
@@ -3820,6 +3978,7 @@ scratch_ram { | |||
3820 | 3978 | ||
3821 | ALLOCFIFO_SCBPTR { | 3979 | ALLOCFIFO_SCBPTR { |
3822 | size 2 | 3980 | size 2 |
3981 | dont_generate_debug_code | ||
3823 | } | 3982 | } |
3824 | 3983 | ||
3825 | /* | 3984 | /* |
@@ -3829,6 +3988,7 @@ scratch_ram { | |||
3829 | */ | 3988 | */ |
3830 | INT_COALESCING_TIMER { | 3989 | INT_COALESCING_TIMER { |
3831 | size 2 | 3990 | size 2 |
3991 | dont_generate_debug_code | ||
3832 | } | 3992 | } |
3833 | 3993 | ||
3834 | /* | 3994 | /* |
@@ -3838,6 +3998,7 @@ scratch_ram { | |||
3838 | */ | 3998 | */ |
3839 | INT_COALESCING_MAXCMDS { | 3999 | INT_COALESCING_MAXCMDS { |
3840 | size 1 | 4000 | size 1 |
4001 | dont_generate_debug_code | ||
3841 | } | 4002 | } |
3842 | 4003 | ||
3843 | /* | 4004 | /* |
@@ -3846,6 +4007,7 @@ scratch_ram { | |||
3846 | */ | 4007 | */ |
3847 | INT_COALESCING_MINCMDS { | 4008 | INT_COALESCING_MINCMDS { |
3848 | size 1 | 4009 | size 1 |
4010 | dont_generate_debug_code | ||
3849 | } | 4011 | } |
3850 | 4012 | ||
3851 | /* | 4013 | /* |
@@ -3853,6 +4015,7 @@ scratch_ram { | |||
3853 | */ | 4015 | */ |
3854 | CMDS_PENDING { | 4016 | CMDS_PENDING { |
3855 | size 2 | 4017 | size 2 |
4018 | dont_generate_debug_code | ||
3856 | } | 4019 | } |
3857 | 4020 | ||
3858 | /* | 4021 | /* |
@@ -3860,6 +4023,7 @@ scratch_ram { | |||
3860 | */ | 4023 | */ |
3861 | INT_COALESCING_CMDCOUNT { | 4024 | INT_COALESCING_CMDCOUNT { |
3862 | size 1 | 4025 | size 1 |
4026 | dont_generate_debug_code | ||
3863 | } | 4027 | } |
3864 | 4028 | ||
3865 | /* | 4029 | /* |
@@ -3868,6 +4032,7 @@ scratch_ram { | |||
3868 | */ | 4032 | */ |
3869 | LOCAL_HS_MAILBOX { | 4033 | LOCAL_HS_MAILBOX { |
3870 | size 1 | 4034 | size 1 |
4035 | dont_generate_debug_code | ||
3871 | } | 4036 | } |
3872 | /* | 4037 | /* |
3873 | * Target-mode CDB type to CDB length table used | 4038 | * Target-mode CDB type to CDB length table used |
@@ -3876,6 +4041,7 @@ scratch_ram { | |||
3876 | CMDSIZE_TABLE { | 4041 | CMDSIZE_TABLE { |
3877 | size 8 | 4042 | size 8 |
3878 | count 8 | 4043 | count 8 |
4044 | dont_generate_debug_code | ||
3879 | } | 4045 | } |
3880 | /* | 4046 | /* |
3881 | * When an SCB with the MK_MESSAGE flag is | 4047 | * When an SCB with the MK_MESSAGE flag is |
@@ -3908,25 +4074,31 @@ scb { | |||
3908 | size 4 | 4074 | size 4 |
3909 | alias SCB_CDB_STORE | 4075 | alias SCB_CDB_STORE |
3910 | alias SCB_HOST_CDB_PTR | 4076 | alias SCB_HOST_CDB_PTR |
4077 | dont_generate_debug_code | ||
3911 | } | 4078 | } |
3912 | SCB_RESIDUAL_SGPTR { | 4079 | SCB_RESIDUAL_SGPTR { |
3913 | size 4 | 4080 | size 4 |
3914 | field SG_ADDR_MASK 0xf8 /* In the last byte */ | 4081 | field SG_ADDR_MASK 0xf8 /* In the last byte */ |
3915 | field SG_OVERRUN_RESID 0x02 /* In the first byte */ | 4082 | field SG_OVERRUN_RESID 0x02 /* In the first byte */ |
3916 | field SG_LIST_NULL 0x01 /* In the first byte */ | 4083 | field SG_LIST_NULL 0x01 /* In the first byte */ |
4084 | dont_generate_debug_code | ||
3917 | } | 4085 | } |
3918 | SCB_SCSI_STATUS { | 4086 | SCB_SCSI_STATUS { |
3919 | size 1 | 4087 | size 1 |
3920 | alias SCB_HOST_CDB_LEN | 4088 | alias SCB_HOST_CDB_LEN |
4089 | dont_generate_debug_code | ||
3921 | } | 4090 | } |
3922 | SCB_TARGET_PHASES { | 4091 | SCB_TARGET_PHASES { |
3923 | size 1 | 4092 | size 1 |
4093 | dont_generate_debug_code | ||
3924 | } | 4094 | } |
3925 | SCB_TARGET_DATA_DIR { | 4095 | SCB_TARGET_DATA_DIR { |
3926 | size 1 | 4096 | size 1 |
4097 | dont_generate_debug_code | ||
3927 | } | 4098 | } |
3928 | SCB_TARGET_ITAG { | 4099 | SCB_TARGET_ITAG { |
3929 | size 1 | 4100 | size 1 |
4101 | dont_generate_debug_code | ||
3930 | } | 4102 | } |
3931 | SCB_SENSE_BUSADDR { | 4103 | SCB_SENSE_BUSADDR { |
3932 | /* | 4104 | /* |
@@ -3936,10 +4108,12 @@ scb { | |||
3936 | */ | 4108 | */ |
3937 | size 4 | 4109 | size 4 |
3938 | alias SCB_NEXT_COMPLETE | 4110 | alias SCB_NEXT_COMPLETE |
4111 | dont_generate_debug_code | ||
3939 | } | 4112 | } |
3940 | SCB_TAG { | 4113 | SCB_TAG { |
3941 | alias SCB_FIFO_USE_COUNT | 4114 | alias SCB_FIFO_USE_COUNT |
3942 | size 2 | 4115 | size 2 |
4116 | dont_generate_debug_code | ||
3943 | } | 4117 | } |
3944 | SCB_CONTROL { | 4118 | SCB_CONTROL { |
3945 | size 1 | 4119 | size 1 |
@@ -3959,6 +4133,7 @@ scb { | |||
3959 | SCB_LUN { | 4133 | SCB_LUN { |
3960 | size 1 | 4134 | size 1 |
3961 | field LID 0xff | 4135 | field LID 0xff |
4136 | dont_generate_debug_code | ||
3962 | } | 4137 | } |
3963 | SCB_TASK_ATTRIBUTE { | 4138 | SCB_TASK_ATTRIBUTE { |
3964 | size 1 | 4139 | size 1 |
@@ -3967,16 +4142,20 @@ scb { | |||
3967 | * ignore wide residue message handling. | 4142 | * ignore wide residue message handling. |
3968 | */ | 4143 | */ |
3969 | field SCB_XFERLEN_ODD 0x01 | 4144 | field SCB_XFERLEN_ODD 0x01 |
4145 | dont_generate_debug_code | ||
3970 | } | 4146 | } |
3971 | SCB_CDB_LEN { | 4147 | SCB_CDB_LEN { |
3972 | size 1 | 4148 | size 1 |
3973 | field SCB_CDB_LEN_PTR 0x80 /* CDB in host memory */ | 4149 | field SCB_CDB_LEN_PTR 0x80 /* CDB in host memory */ |
4150 | dont_generate_debug_code | ||
3974 | } | 4151 | } |
3975 | SCB_TASK_MANAGEMENT { | 4152 | SCB_TASK_MANAGEMENT { |
3976 | size 1 | 4153 | size 1 |
4154 | dont_generate_debug_code | ||
3977 | } | 4155 | } |
3978 | SCB_DATAPTR { | 4156 | SCB_DATAPTR { |
3979 | size 8 | 4157 | size 8 |
4158 | dont_generate_debug_code | ||
3980 | } | 4159 | } |
3981 | SCB_DATACNT { | 4160 | SCB_DATACNT { |
3982 | /* | 4161 | /* |
@@ -3986,22 +4165,27 @@ scb { | |||
3986 | size 4 | 4165 | size 4 |
3987 | field SG_LAST_SEG 0x80 /* In the fourth byte */ | 4166 | field SG_LAST_SEG 0x80 /* In the fourth byte */ |
3988 | field SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ | 4167 | field SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ |
4168 | dont_generate_debug_code | ||
3989 | } | 4169 | } |
3990 | SCB_SGPTR { | 4170 | SCB_SGPTR { |
3991 | size 4 | 4171 | size 4 |
3992 | field SG_STATUS_VALID 0x04 /* In the first byte */ | 4172 | field SG_STATUS_VALID 0x04 /* In the first byte */ |
3993 | field SG_FULL_RESID 0x02 /* In the first byte */ | 4173 | field SG_FULL_RESID 0x02 /* In the first byte */ |
3994 | field SG_LIST_NULL 0x01 /* In the first byte */ | 4174 | field SG_LIST_NULL 0x01 /* In the first byte */ |
4175 | dont_generate_debug_code | ||
3995 | } | 4176 | } |
3996 | SCB_BUSADDR { | 4177 | SCB_BUSADDR { |
3997 | size 4 | 4178 | size 4 |
4179 | dont_generate_debug_code | ||
3998 | } | 4180 | } |
3999 | SCB_NEXT { | 4181 | SCB_NEXT { |
4000 | alias SCB_NEXT_SCB_BUSADDR | 4182 | alias SCB_NEXT_SCB_BUSADDR |
4001 | size 2 | 4183 | size 2 |
4184 | dont_generate_debug_code | ||
4002 | } | 4185 | } |
4003 | SCB_NEXT2 { | 4186 | SCB_NEXT2 { |
4004 | size 2 | 4187 | size 2 |
4188 | dont_generate_debug_code | ||
4005 | } | 4189 | } |
4006 | SCB_SPARE { | 4190 | SCB_SPARE { |
4007 | size 8 | 4191 | size 8 |
@@ -4009,6 +4193,7 @@ scb { | |||
4009 | } | 4193 | } |
4010 | SCB_DISCONNECTED_LISTS { | 4194 | SCB_DISCONNECTED_LISTS { |
4011 | size 8 | 4195 | size 8 |
4196 | dont_generate_debug_code | ||
4012 | } | 4197 | } |
4013 | } | 4198 | } |
4014 | 4199 | ||
diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg index 0d2f763c3427..9a96e55da39a 100644 --- a/drivers/scsi/aic7xxx/aic7xxx.reg +++ b/drivers/scsi/aic7xxx/aic7xxx.reg | |||
@@ -51,6 +51,17 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $" | |||
51 | */ | 51 | */ |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Registers marked "dont_generate_debug_code" are not (yet) referenced | ||
55 | * from the driver code, and this keyword inhibit generation | ||
56 | * of debug code for them. | ||
57 | * | ||
58 | * REG_PRETTY_PRINT config will complain if dont_generate_debug_code | ||
59 | * is added to the register which is referenced in the driver. | ||
60 | * Unreferenced register with no dont_generate_debug_code will result | ||
61 | * in dead code. No warning is issued. | ||
62 | */ | ||
63 | |||
64 | /* | ||
54 | * SCSI Sequence Control (p. 3-11). | 65 | * SCSI Sequence Control (p. 3-11). |
55 | * Each bit, when set starts a specific SCSI sequence on the bus | 66 | * Each bit, when set starts a specific SCSI sequence on the bus |
56 | */ | 67 | */ |
@@ -97,6 +108,7 @@ register SXFRCTL1 { | |||
97 | field ENSTIMER 0x04 | 108 | field ENSTIMER 0x04 |
98 | field ACTNEGEN 0x02 | 109 | field ACTNEGEN 0x02 |
99 | field STPWEN 0x01 /* Powered Termination */ | 110 | field STPWEN 0x01 /* Powered Termination */ |
111 | dont_generate_debug_code | ||
100 | } | 112 | } |
101 | 113 | ||
102 | /* | 114 | /* |
@@ -155,6 +167,7 @@ register SCSISIGO { | |||
155 | mask P_MESGOUT CDI|MSGI | 167 | mask P_MESGOUT CDI|MSGI |
156 | mask P_STATUS CDI|IOI | 168 | mask P_STATUS CDI|IOI |
157 | mask P_MESGIN CDI|IOI|MSGI | 169 | mask P_MESGIN CDI|IOI|MSGI |
170 | dont_generate_debug_code | ||
158 | } | 171 | } |
159 | 172 | ||
160 | /* | 173 | /* |
@@ -194,6 +207,7 @@ register SCSIID { | |||
194 | */ | 207 | */ |
195 | alias SCSIOFFSET | 208 | alias SCSIOFFSET |
196 | mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ | 209 | mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ |
210 | dont_generate_debug_code | ||
197 | } | 211 | } |
198 | 212 | ||
199 | /* | 213 | /* |
@@ -205,6 +219,7 @@ register SCSIID { | |||
205 | register SCSIDATL { | 219 | register SCSIDATL { |
206 | address 0x006 | 220 | address 0x006 |
207 | access_mode RW | 221 | access_mode RW |
222 | dont_generate_debug_code | ||
208 | } | 223 | } |
209 | 224 | ||
210 | register SCSIDATH { | 225 | register SCSIDATH { |
@@ -223,6 +238,7 @@ register STCNT { | |||
223 | address 0x008 | 238 | address 0x008 |
224 | size 3 | 239 | size 3 |
225 | access_mode RW | 240 | access_mode RW |
241 | dont_generate_debug_code | ||
226 | } | 242 | } |
227 | 243 | ||
228 | /* ALT_MODE registers (Ultra2 and Ultra160 chips) */ | 244 | /* ALT_MODE registers (Ultra2 and Ultra160 chips) */ |
@@ -248,6 +264,7 @@ register OPTIONMODE { | |||
248 | field AUTO_MSGOUT_DE 0x02 | 264 | field AUTO_MSGOUT_DE 0x02 |
249 | field DIS_MSGIN_DUALEDGE 0x01 | 265 | field DIS_MSGIN_DUALEDGE 0x01 |
250 | mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE | 266 | mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE |
267 | dont_generate_debug_code | ||
251 | } | 268 | } |
252 | 269 | ||
253 | /* ALT_MODE register on Ultra160 chips */ | 270 | /* ALT_MODE register on Ultra160 chips */ |
@@ -256,6 +273,7 @@ register TARGCRCCNT { | |||
256 | size 2 | 273 | size 2 |
257 | access_mode RW | 274 | access_mode RW |
258 | count 2 | 275 | count 2 |
276 | dont_generate_debug_code | ||
259 | } | 277 | } |
260 | 278 | ||
261 | /* | 279 | /* |
@@ -271,6 +289,7 @@ register CLRSINT0 { | |||
271 | field CLRSWRAP 0x08 | 289 | field CLRSWRAP 0x08 |
272 | field CLRIOERR 0x08 /* Ultra2 Only */ | 290 | field CLRIOERR 0x08 /* Ultra2 Only */ |
273 | field CLRSPIORDY 0x02 | 291 | field CLRSPIORDY 0x02 |
292 | dont_generate_debug_code | ||
274 | } | 293 | } |
275 | 294 | ||
276 | /* | 295 | /* |
@@ -306,6 +325,7 @@ register CLRSINT1 { | |||
306 | field CLRSCSIPERR 0x04 | 325 | field CLRSCSIPERR 0x04 |
307 | field CLRPHASECHG 0x02 | 326 | field CLRPHASECHG 0x02 |
308 | field CLRREQINIT 0x01 | 327 | field CLRREQINIT 0x01 |
328 | dont_generate_debug_code | ||
309 | } | 329 | } |
310 | 330 | ||
311 | /* | 331 | /* |
@@ -360,6 +380,7 @@ register SCSIID_ULTRA2 { | |||
360 | access_mode RW | 380 | access_mode RW |
361 | mask TID 0xf0 /* Target ID mask */ | 381 | mask TID 0xf0 /* Target ID mask */ |
362 | mask OID 0x0f /* Our ID mask */ | 382 | mask OID 0x0f /* Our ID mask */ |
383 | dont_generate_debug_code | ||
363 | } | 384 | } |
364 | 385 | ||
365 | /* | 386 | /* |
@@ -425,6 +446,7 @@ register SHADDR { | |||
425 | address 0x014 | 446 | address 0x014 |
426 | size 4 | 447 | size 4 |
427 | access_mode RO | 448 | access_mode RO |
449 | dont_generate_debug_code | ||
428 | } | 450 | } |
429 | 451 | ||
430 | /* | 452 | /* |
@@ -441,6 +463,7 @@ register SELTIMER { | |||
441 | field STAGE2 0x02 | 463 | field STAGE2 0x02 |
442 | field STAGE1 0x01 | 464 | field STAGE1 0x01 |
443 | alias TARGIDIN | 465 | alias TARGIDIN |
466 | dont_generate_debug_code | ||
444 | } | 467 | } |
445 | 468 | ||
446 | /* | 469 | /* |
@@ -453,6 +476,7 @@ register SELID { | |||
453 | access_mode RW | 476 | access_mode RW |
454 | mask SELID_MASK 0xf0 | 477 | mask SELID_MASK 0xf0 |
455 | field ONEBIT 0x08 | 478 | field ONEBIT 0x08 |
479 | dont_generate_debug_code | ||
456 | } | 480 | } |
457 | 481 | ||
458 | register SCAMCTL { | 482 | register SCAMCTL { |
@@ -473,6 +497,7 @@ register TARGID { | |||
473 | size 2 | 497 | size 2 |
474 | access_mode RW | 498 | access_mode RW |
475 | count 14 | 499 | count 14 |
500 | dont_generate_debug_code | ||
476 | } | 501 | } |
477 | 502 | ||
478 | /* | 503 | /* |
@@ -495,6 +520,7 @@ register SPIOCAP { | |||
495 | field EEPROM 0x04 /* Writable external BIOS ROM */ | 520 | field EEPROM 0x04 /* Writable external BIOS ROM */ |
496 | field ROM 0x02 /* Logic for accessing external ROM */ | 521 | field ROM 0x02 /* Logic for accessing external ROM */ |
497 | field SSPIOCPS 0x01 /* Termination and cable detection */ | 522 | field SSPIOCPS 0x01 /* Termination and cable detection */ |
523 | dont_generate_debug_code | ||
498 | } | 524 | } |
499 | 525 | ||
500 | register BRDCTL { | 526 | register BRDCTL { |
@@ -514,6 +540,7 @@ register BRDCTL { | |||
514 | field BRDDAT2 0x04 | 540 | field BRDDAT2 0x04 |
515 | field BRDRW_ULTRA2 0x02 | 541 | field BRDRW_ULTRA2 0x02 |
516 | field BRDSTB_ULTRA2 0x01 | 542 | field BRDSTB_ULTRA2 0x01 |
543 | dont_generate_debug_code | ||
517 | } | 544 | } |
518 | 545 | ||
519 | /* | 546 | /* |
@@ -551,6 +578,7 @@ register SEECTL { | |||
551 | field SEECK 0x04 | 578 | field SEECK 0x04 |
552 | field SEEDO 0x02 | 579 | field SEEDO 0x02 |
553 | field SEEDI 0x01 | 580 | field SEEDI 0x01 |
581 | dont_generate_debug_code | ||
554 | } | 582 | } |
555 | /* | 583 | /* |
556 | * SCSI Block Control (p. 3-32) | 584 | * SCSI Block Control (p. 3-32) |
@@ -601,6 +629,7 @@ register SEQRAM { | |||
601 | address 0x061 | 629 | address 0x061 |
602 | access_mode RW | 630 | access_mode RW |
603 | count 2 | 631 | count 2 |
632 | dont_generate_debug_code | ||
604 | } | 633 | } |
605 | 634 | ||
606 | /* | 635 | /* |
@@ -610,6 +639,7 @@ register SEQRAM { | |||
610 | register SEQADDR0 { | 639 | register SEQADDR0 { |
611 | address 0x062 | 640 | address 0x062 |
612 | access_mode RW | 641 | access_mode RW |
642 | dont_generate_debug_code | ||
613 | } | 643 | } |
614 | 644 | ||
615 | register SEQADDR1 { | 645 | register SEQADDR1 { |
@@ -617,6 +647,7 @@ register SEQADDR1 { | |||
617 | access_mode RW | 647 | access_mode RW |
618 | count 8 | 648 | count 8 |
619 | mask SEQADDR1_MASK 0x01 | 649 | mask SEQADDR1_MASK 0x01 |
650 | dont_generate_debug_code | ||
620 | } | 651 | } |
621 | 652 | ||
622 | /* | 653 | /* |
@@ -627,35 +658,41 @@ register ACCUM { | |||
627 | address 0x064 | 658 | address 0x064 |
628 | access_mode RW | 659 | access_mode RW |
629 | accumulator | 660 | accumulator |
661 | dont_generate_debug_code | ||
630 | } | 662 | } |
631 | 663 | ||
632 | register SINDEX { | 664 | register SINDEX { |
633 | address 0x065 | 665 | address 0x065 |
634 | access_mode RW | 666 | access_mode RW |
635 | sindex | 667 | sindex |
668 | dont_generate_debug_code | ||
636 | } | 669 | } |
637 | 670 | ||
638 | register DINDEX { | 671 | register DINDEX { |
639 | address 0x066 | 672 | address 0x066 |
640 | access_mode RW | 673 | access_mode RW |
674 | dont_generate_debug_code | ||
641 | } | 675 | } |
642 | 676 | ||
643 | register ALLONES { | 677 | register ALLONES { |
644 | address 0x069 | 678 | address 0x069 |
645 | access_mode RO | 679 | access_mode RO |
646 | allones | 680 | allones |
681 | dont_generate_debug_code | ||
647 | } | 682 | } |
648 | 683 | ||
649 | register ALLZEROS { | 684 | register ALLZEROS { |
650 | address 0x06a | 685 | address 0x06a |
651 | access_mode RO | 686 | access_mode RO |
652 | allzeros | 687 | allzeros |
688 | dont_generate_debug_code | ||
653 | } | 689 | } |
654 | 690 | ||
655 | register NONE { | 691 | register NONE { |
656 | address 0x06a | 692 | address 0x06a |
657 | access_mode WO | 693 | access_mode WO |
658 | none | 694 | none |
695 | dont_generate_debug_code | ||
659 | } | 696 | } |
660 | 697 | ||
661 | register FLAGS { | 698 | register FLAGS { |
@@ -664,16 +701,19 @@ register FLAGS { | |||
664 | count 18 | 701 | count 18 |
665 | field ZERO 0x02 | 702 | field ZERO 0x02 |
666 | field CARRY 0x01 | 703 | field CARRY 0x01 |
704 | dont_generate_debug_code | ||
667 | } | 705 | } |
668 | 706 | ||
669 | register SINDIR { | 707 | register SINDIR { |
670 | address 0x06c | 708 | address 0x06c |
671 | access_mode RO | 709 | access_mode RO |
710 | dont_generate_debug_code | ||
672 | } | 711 | } |
673 | 712 | ||
674 | register DINDIR { | 713 | register DINDIR { |
675 | address 0x06d | 714 | address 0x06d |
676 | access_mode WO | 715 | access_mode WO |
716 | dont_generate_debug_code | ||
677 | } | 717 | } |
678 | 718 | ||
679 | register FUNCTION1 { | 719 | register FUNCTION1 { |
@@ -685,6 +725,7 @@ register STACK { | |||
685 | address 0x06f | 725 | address 0x06f |
686 | access_mode RO | 726 | access_mode RO |
687 | count 5 | 727 | count 5 |
728 | dont_generate_debug_code | ||
688 | } | 729 | } |
689 | 730 | ||
690 | const STACK_SIZE 4 | 731 | const STACK_SIZE 4 |
@@ -716,6 +757,7 @@ register DSCOMMAND0 { | |||
716 | field RAMPS 0x04 /* External SCB RAM Present */ | 757 | field RAMPS 0x04 /* External SCB RAM Present */ |
717 | field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */ | 758 | field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */ |
718 | field CIOPARCKEN 0x01 /* Internal bus parity error enable */ | 759 | field CIOPARCKEN 0x01 /* Internal bus parity error enable */ |
760 | dont_generate_debug_code | ||
719 | } | 761 | } |
720 | 762 | ||
721 | register DSCOMMAND1 { | 763 | register DSCOMMAND1 { |
@@ -724,6 +766,7 @@ register DSCOMMAND1 { | |||
724 | mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */ | 766 | mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */ |
725 | field HADDLDSEL1 0x02 /* Host Address Load Select Bits */ | 767 | field HADDLDSEL1 0x02 /* Host Address Load Select Bits */ |
726 | field HADDLDSEL0 0x01 | 768 | field HADDLDSEL0 0x01 |
769 | dont_generate_debug_code | ||
727 | } | 770 | } |
728 | 771 | ||
729 | /* | 772 | /* |
@@ -735,6 +778,7 @@ register BUSTIME { | |||
735 | count 2 | 778 | count 2 |
736 | mask BOFF 0xf0 | 779 | mask BOFF 0xf0 |
737 | mask BON 0x0f | 780 | mask BON 0x0f |
781 | dont_generate_debug_code | ||
738 | } | 782 | } |
739 | 783 | ||
740 | /* | 784 | /* |
@@ -749,6 +793,7 @@ register BUSSPD { | |||
749 | mask STBON 0x07 | 793 | mask STBON 0x07 |
750 | mask DFTHRSH_100 0xc0 | 794 | mask DFTHRSH_100 0xc0 |
751 | mask DFTHRSH_75 0x80 | 795 | mask DFTHRSH_75 0x80 |
796 | dont_generate_debug_code | ||
752 | } | 797 | } |
753 | 798 | ||
754 | /* aic7850/55/60/70/80/95 only */ | 799 | /* aic7850/55/60/70/80/95 only */ |
@@ -756,6 +801,7 @@ register DSPCISTATUS { | |||
756 | address 0x086 | 801 | address 0x086 |
757 | count 4 | 802 | count 4 |
758 | mask DFTHRSH_100 0xc0 | 803 | mask DFTHRSH_100 0xc0 |
804 | dont_generate_debug_code | ||
759 | } | 805 | } |
760 | 806 | ||
761 | /* aic7890/91/96/97 only */ | 807 | /* aic7890/91/96/97 only */ |
@@ -764,6 +810,7 @@ register HS_MAILBOX { | |||
764 | mask HOST_MAILBOX 0xF0 | 810 | mask HOST_MAILBOX 0xF0 |
765 | mask SEQ_MAILBOX 0x0F | 811 | mask SEQ_MAILBOX 0x0F |
766 | mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */ | 812 | mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */ |
813 | dont_generate_debug_code | ||
767 | } | 814 | } |
768 | 815 | ||
769 | const HOST_MAILBOX_SHIFT 4 | 816 | const HOST_MAILBOX_SHIFT 4 |
@@ -784,6 +831,7 @@ register HCNTRL { | |||
784 | field INTEN 0x02 | 831 | field INTEN 0x02 |
785 | field CHIPRST 0x01 | 832 | field CHIPRST 0x01 |
786 | field CHIPRSTACK 0x01 | 833 | field CHIPRSTACK 0x01 |
834 | dont_generate_debug_code | ||
787 | } | 835 | } |
788 | 836 | ||
789 | /* | 837 | /* |
@@ -795,12 +843,14 @@ register HADDR { | |||
795 | address 0x088 | 843 | address 0x088 |
796 | size 4 | 844 | size 4 |
797 | access_mode RW | 845 | access_mode RW |
846 | dont_generate_debug_code | ||
798 | } | 847 | } |
799 | 848 | ||
800 | register HCNT { | 849 | register HCNT { |
801 | address 0x08c | 850 | address 0x08c |
802 | size 3 | 851 | size 3 |
803 | access_mode RW | 852 | access_mode RW |
853 | dont_generate_debug_code | ||
804 | } | 854 | } |
805 | 855 | ||
806 | /* | 856 | /* |
@@ -810,6 +860,7 @@ register HCNT { | |||
810 | register SCBPTR { | 860 | register SCBPTR { |
811 | address 0x090 | 861 | address 0x090 |
812 | access_mode RW | 862 | access_mode RW |
863 | dont_generate_debug_code | ||
813 | } | 864 | } |
814 | 865 | ||
815 | /* | 866 | /* |
@@ -878,6 +929,7 @@ register INTSTAT { | |||
878 | 929 | ||
879 | mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ | 930 | mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ |
880 | mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) | 931 | mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) |
932 | dont_generate_debug_code | ||
881 | } | 933 | } |
882 | 934 | ||
883 | /* | 935 | /* |
@@ -911,6 +963,7 @@ register CLRINT { | |||
911 | field CLRSCSIINT 0x04 | 963 | field CLRSCSIINT 0x04 |
912 | field CLRCMDINT 0x02 | 964 | field CLRCMDINT 0x02 |
913 | field CLRSEQINT 0x01 | 965 | field CLRSEQINT 0x01 |
966 | dont_generate_debug_code | ||
914 | } | 967 | } |
915 | 968 | ||
916 | register DFCNTRL { | 969 | register DFCNTRL { |
@@ -944,6 +997,7 @@ register DFSTATUS { | |||
944 | register DFWADDR { | 997 | register DFWADDR { |
945 | address 0x95 | 998 | address 0x95 |
946 | access_mode RW | 999 | access_mode RW |
1000 | dont_generate_debug_code | ||
947 | } | 1001 | } |
948 | 1002 | ||
949 | register DFRADDR { | 1003 | register DFRADDR { |
@@ -954,6 +1008,7 @@ register DFRADDR { | |||
954 | register DFDAT { | 1008 | register DFDAT { |
955 | address 0x099 | 1009 | address 0x099 |
956 | access_mode RW | 1010 | access_mode RW |
1011 | dont_generate_debug_code | ||
957 | } | 1012 | } |
958 | 1013 | ||
959 | /* | 1014 | /* |
@@ -967,6 +1022,7 @@ register SCBCNT { | |||
967 | count 1 | 1022 | count 1 |
968 | field SCBAUTO 0x80 | 1023 | field SCBAUTO 0x80 |
969 | mask SCBCNT_MASK 0x1f | 1024 | mask SCBCNT_MASK 0x1f |
1025 | dont_generate_debug_code | ||
970 | } | 1026 | } |
971 | 1027 | ||
972 | /* | 1028 | /* |
@@ -977,6 +1033,7 @@ register QINFIFO { | |||
977 | address 0x09b | 1033 | address 0x09b |
978 | access_mode RW | 1034 | access_mode RW |
979 | count 12 | 1035 | count 12 |
1036 | dont_generate_debug_code | ||
980 | } | 1037 | } |
981 | 1038 | ||
982 | /* | 1039 | /* |
@@ -996,6 +1053,7 @@ register QOUTFIFO { | |||
996 | address 0x09d | 1053 | address 0x09d |
997 | access_mode WO | 1054 | access_mode WO |
998 | count 7 | 1055 | count 7 |
1056 | dont_generate_debug_code | ||
999 | } | 1057 | } |
1000 | 1058 | ||
1001 | register CRCCONTROL1 { | 1059 | register CRCCONTROL1 { |
@@ -1008,6 +1066,7 @@ register CRCCONTROL1 { | |||
1008 | field CRCREQCHKEN 0x10 | 1066 | field CRCREQCHKEN 0x10 |
1009 | field TARGCRCENDEN 0x08 | 1067 | field TARGCRCENDEN 0x08 |
1010 | field TARGCRCCNTEN 0x04 | 1068 | field TARGCRCCNTEN 0x04 |
1069 | dont_generate_debug_code | ||
1011 | } | 1070 | } |
1012 | 1071 | ||
1013 | 1072 | ||
@@ -1040,6 +1099,7 @@ register SFUNCT { | |||
1040 | access_mode RW | 1099 | access_mode RW |
1041 | count 4 | 1100 | count 4 |
1042 | field ALT_MODE 0x80 | 1101 | field ALT_MODE 0x80 |
1102 | dont_generate_debug_code | ||
1043 | } | 1103 | } |
1044 | 1104 | ||
1045 | /* | 1105 | /* |
@@ -1053,24 +1113,31 @@ scb { | |||
1053 | size 4 | 1113 | size 4 |
1054 | alias SCB_RESIDUAL_DATACNT | 1114 | alias SCB_RESIDUAL_DATACNT |
1055 | alias SCB_CDB_STORE | 1115 | alias SCB_CDB_STORE |
1116 | dont_generate_debug_code | ||
1056 | } | 1117 | } |
1057 | SCB_RESIDUAL_SGPTR { | 1118 | SCB_RESIDUAL_SGPTR { |
1058 | size 4 | 1119 | size 4 |
1120 | dont_generate_debug_code | ||
1059 | } | 1121 | } |
1060 | SCB_SCSI_STATUS { | 1122 | SCB_SCSI_STATUS { |
1061 | size 1 | 1123 | size 1 |
1124 | dont_generate_debug_code | ||
1062 | } | 1125 | } |
1063 | SCB_TARGET_PHASES { | 1126 | SCB_TARGET_PHASES { |
1064 | size 1 | 1127 | size 1 |
1128 | dont_generate_debug_code | ||
1065 | } | 1129 | } |
1066 | SCB_TARGET_DATA_DIR { | 1130 | SCB_TARGET_DATA_DIR { |
1067 | size 1 | 1131 | size 1 |
1132 | dont_generate_debug_code | ||
1068 | } | 1133 | } |
1069 | SCB_TARGET_ITAG { | 1134 | SCB_TARGET_ITAG { |
1070 | size 1 | 1135 | size 1 |
1136 | dont_generate_debug_code | ||
1071 | } | 1137 | } |
1072 | SCB_DATAPTR { | 1138 | SCB_DATAPTR { |
1073 | size 4 | 1139 | size 4 |
1140 | dont_generate_debug_code | ||
1074 | } | 1141 | } |
1075 | SCB_DATACNT { | 1142 | SCB_DATACNT { |
1076 | /* | 1143 | /* |
@@ -1080,12 +1147,14 @@ scb { | |||
1080 | size 4 | 1147 | size 4 |
1081 | field SG_LAST_SEG 0x80 /* In the fourth byte */ | 1148 | field SG_LAST_SEG 0x80 /* In the fourth byte */ |
1082 | mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ | 1149 | mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ |
1150 | dont_generate_debug_code | ||
1083 | } | 1151 | } |
1084 | SCB_SGPTR { | 1152 | SCB_SGPTR { |
1085 | size 4 | 1153 | size 4 |
1086 | field SG_RESID_VALID 0x04 /* In the first byte */ | 1154 | field SG_RESID_VALID 0x04 /* In the first byte */ |
1087 | field SG_FULL_RESID 0x02 /* In the first byte */ | 1155 | field SG_FULL_RESID 0x02 /* In the first byte */ |
1088 | field SG_LIST_NULL 0x01 /* In the first byte */ | 1156 | field SG_LIST_NULL 0x01 /* In the first byte */ |
1157 | dont_generate_debug_code | ||
1089 | } | 1158 | } |
1090 | SCB_CONTROL { | 1159 | SCB_CONTROL { |
1091 | size 1 | 1160 | size 1 |
@@ -1115,22 +1184,27 @@ scb { | |||
1115 | } | 1184 | } |
1116 | SCB_CDB_LEN { | 1185 | SCB_CDB_LEN { |
1117 | size 1 | 1186 | size 1 |
1187 | dont_generate_debug_code | ||
1118 | } | 1188 | } |
1119 | SCB_SCSIRATE { | 1189 | SCB_SCSIRATE { |
1120 | size 1 | 1190 | size 1 |
1191 | dont_generate_debug_code | ||
1121 | } | 1192 | } |
1122 | SCB_SCSIOFFSET { | 1193 | SCB_SCSIOFFSET { |
1123 | size 1 | 1194 | size 1 |
1124 | count 1 | 1195 | count 1 |
1196 | dont_generate_debug_code | ||
1125 | } | 1197 | } |
1126 | SCB_NEXT { | 1198 | SCB_NEXT { |
1127 | size 1 | 1199 | size 1 |
1200 | dont_generate_debug_code | ||
1128 | } | 1201 | } |
1129 | SCB_64_SPARE { | 1202 | SCB_64_SPARE { |
1130 | size 16 | 1203 | size 16 |
1131 | } | 1204 | } |
1132 | SCB_64_BTT { | 1205 | SCB_64_BTT { |
1133 | size 16 | 1206 | size 16 |
1207 | dont_generate_debug_code | ||
1134 | } | 1208 | } |
1135 | } | 1209 | } |
1136 | 1210 | ||
@@ -1149,6 +1223,7 @@ register SEECTL_2840 { | |||
1149 | field CS_2840 0x04 | 1223 | field CS_2840 0x04 |
1150 | field CK_2840 0x02 | 1224 | field CK_2840 0x02 |
1151 | field DO_2840 0x01 | 1225 | field DO_2840 0x01 |
1226 | dont_generate_debug_code | ||
1152 | } | 1227 | } |
1153 | 1228 | ||
1154 | register STATUS_2840 { | 1229 | register STATUS_2840 { |
@@ -1159,6 +1234,7 @@ register STATUS_2840 { | |||
1159 | mask BIOS_SEL 0x60 | 1234 | mask BIOS_SEL 0x60 |
1160 | mask ADSEL 0x1e | 1235 | mask ADSEL 0x1e |
1161 | field DI_2840 0x01 | 1236 | field DI_2840 0x01 |
1237 | dont_generate_debug_code | ||
1162 | } | 1238 | } |
1163 | 1239 | ||
1164 | /* --------------------- AIC-7870-only definitions -------------------- */ | 1240 | /* --------------------- AIC-7870-only definitions -------------------- */ |
@@ -1166,18 +1242,22 @@ register STATUS_2840 { | |||
1166 | register CCHADDR { | 1242 | register CCHADDR { |
1167 | address 0x0E0 | 1243 | address 0x0E0 |
1168 | size 8 | 1244 | size 8 |
1245 | dont_generate_debug_code | ||
1169 | } | 1246 | } |
1170 | 1247 | ||
1171 | register CCHCNT { | 1248 | register CCHCNT { |
1172 | address 0x0E8 | 1249 | address 0x0E8 |
1250 | dont_generate_debug_code | ||
1173 | } | 1251 | } |
1174 | 1252 | ||
1175 | register CCSGRAM { | 1253 | register CCSGRAM { |
1176 | address 0x0E9 | 1254 | address 0x0E9 |
1255 | dont_generate_debug_code | ||
1177 | } | 1256 | } |
1178 | 1257 | ||
1179 | register CCSGADDR { | 1258 | register CCSGADDR { |
1180 | address 0x0EA | 1259 | address 0x0EA |
1260 | dont_generate_debug_code | ||
1181 | } | 1261 | } |
1182 | 1262 | ||
1183 | register CCSGCTL { | 1263 | register CCSGCTL { |
@@ -1186,11 +1266,13 @@ register CCSGCTL { | |||
1186 | field CCSGEN 0x08 | 1266 | field CCSGEN 0x08 |
1187 | field SG_FETCH_NEEDED 0x02 /* Bit used for software state */ | 1267 | field SG_FETCH_NEEDED 0x02 /* Bit used for software state */ |
1188 | field CCSGRESET 0x01 | 1268 | field CCSGRESET 0x01 |
1269 | dont_generate_debug_code | ||
1189 | } | 1270 | } |
1190 | 1271 | ||
1191 | register CCSCBCNT { | 1272 | register CCSCBCNT { |
1192 | address 0xEF | 1273 | address 0xEF |
1193 | count 1 | 1274 | count 1 |
1275 | dont_generate_debug_code | ||
1194 | } | 1276 | } |
1195 | 1277 | ||
1196 | register CCSCBCTL { | 1278 | register CCSCBCTL { |
@@ -1201,14 +1283,17 @@ register CCSCBCTL { | |||
1201 | field CCSCBEN 0x08 | 1283 | field CCSCBEN 0x08 |
1202 | field CCSCBDIR 0x04 | 1284 | field CCSCBDIR 0x04 |
1203 | field CCSCBRESET 0x01 | 1285 | field CCSCBRESET 0x01 |
1286 | dont_generate_debug_code | ||
1204 | } | 1287 | } |
1205 | 1288 | ||
1206 | register CCSCBADDR { | 1289 | register CCSCBADDR { |
1207 | address 0x0ED | 1290 | address 0x0ED |
1291 | dont_generate_debug_code | ||
1208 | } | 1292 | } |
1209 | 1293 | ||
1210 | register CCSCBRAM { | 1294 | register CCSCBRAM { |
1211 | address 0xEC | 1295 | address 0xEC |
1296 | dont_generate_debug_code | ||
1212 | } | 1297 | } |
1213 | 1298 | ||
1214 | /* | 1299 | /* |
@@ -1218,23 +1303,28 @@ register SCBBADDR { | |||
1218 | address 0x0F0 | 1303 | address 0x0F0 |
1219 | access_mode RW | 1304 | access_mode RW |
1220 | count 3 | 1305 | count 3 |
1306 | dont_generate_debug_code | ||
1221 | } | 1307 | } |
1222 | 1308 | ||
1223 | register CCSCBPTR { | 1309 | register CCSCBPTR { |
1224 | address 0x0F1 | 1310 | address 0x0F1 |
1311 | dont_generate_debug_code | ||
1225 | } | 1312 | } |
1226 | 1313 | ||
1227 | register HNSCB_QOFF { | 1314 | register HNSCB_QOFF { |
1228 | address 0x0F4 | 1315 | address 0x0F4 |
1229 | count 4 | 1316 | count 4 |
1317 | dont_generate_debug_code | ||
1230 | } | 1318 | } |
1231 | 1319 | ||
1232 | register SNSCB_QOFF { | 1320 | register SNSCB_QOFF { |
1233 | address 0x0F6 | 1321 | address 0x0F6 |
1322 | dont_generate_debug_code | ||
1234 | } | 1323 | } |
1235 | 1324 | ||
1236 | register SDSCB_QOFF { | 1325 | register SDSCB_QOFF { |
1237 | address 0x0F8 | 1326 | address 0x0F8 |
1327 | dont_generate_debug_code | ||
1238 | } | 1328 | } |
1239 | 1329 | ||
1240 | register QOFF_CTLSTA { | 1330 | register QOFF_CTLSTA { |
@@ -1244,6 +1334,7 @@ register QOFF_CTLSTA { | |||
1244 | field SDSCB_ROLLOVER 0x10 | 1334 | field SDSCB_ROLLOVER 0x10 |
1245 | mask SCB_QSIZE 0x07 | 1335 | mask SCB_QSIZE 0x07 |
1246 | mask SCB_QSIZE_256 0x06 | 1336 | mask SCB_QSIZE_256 0x06 |
1337 | dont_generate_debug_code | ||
1247 | } | 1338 | } |
1248 | 1339 | ||
1249 | register DFF_THRSH { | 1340 | register DFF_THRSH { |
@@ -1267,6 +1358,7 @@ register DFF_THRSH { | |||
1267 | mask WR_DFTHRSH_90 0x60 | 1358 | mask WR_DFTHRSH_90 0x60 |
1268 | mask WR_DFTHRSH_MAX 0x70 | 1359 | mask WR_DFTHRSH_MAX 0x70 |
1269 | count 4 | 1360 | count 4 |
1361 | dont_generate_debug_code | ||
1270 | } | 1362 | } |
1271 | 1363 | ||
1272 | register SG_CACHE_PRE { | 1364 | register SG_CACHE_PRE { |
@@ -1275,6 +1367,7 @@ register SG_CACHE_PRE { | |||
1275 | mask SG_ADDR_MASK 0xf8 | 1367 | mask SG_ADDR_MASK 0xf8 |
1276 | field LAST_SEG 0x02 | 1368 | field LAST_SEG 0x02 |
1277 | field LAST_SEG_DONE 0x01 | 1369 | field LAST_SEG_DONE 0x01 |
1370 | dont_generate_debug_code | ||
1278 | } | 1371 | } |
1279 | 1372 | ||
1280 | register SG_CACHE_SHADOW { | 1373 | register SG_CACHE_SHADOW { |
@@ -1283,6 +1376,7 @@ register SG_CACHE_SHADOW { | |||
1283 | mask SG_ADDR_MASK 0xf8 | 1376 | mask SG_ADDR_MASK 0xf8 |
1284 | field LAST_SEG 0x02 | 1377 | field LAST_SEG 0x02 |
1285 | field LAST_SEG_DONE 0x01 | 1378 | field LAST_SEG_DONE 0x01 |
1379 | dont_generate_debug_code | ||
1286 | } | 1380 | } |
1287 | /* ---------------------- Scratch RAM Offsets ------------------------- */ | 1381 | /* ---------------------- Scratch RAM Offsets ------------------------- */ |
1288 | /* These offsets are either to values that are initialized by the board's | 1382 | /* These offsets are either to values that are initialized by the board's |
@@ -1309,6 +1403,7 @@ scratch_ram { | |||
1309 | BUSY_TARGETS { | 1403 | BUSY_TARGETS { |
1310 | alias TARG_SCSIRATE | 1404 | alias TARG_SCSIRATE |
1311 | size 16 | 1405 | size 16 |
1406 | dont_generate_debug_code | ||
1312 | } | 1407 | } |
1313 | /* | 1408 | /* |
1314 | * Bit vector of targets that have ULTRA enabled as set by | 1409 | * Bit vector of targets that have ULTRA enabled as set by |
@@ -1321,6 +1416,7 @@ scratch_ram { | |||
1321 | alias CMDSIZE_TABLE | 1416 | alias CMDSIZE_TABLE |
1322 | size 2 | 1417 | size 2 |
1323 | count 2 | 1418 | count 2 |
1419 | dont_generate_debug_code | ||
1324 | } | 1420 | } |
1325 | /* | 1421 | /* |
1326 | * Bit vector of targets that have disconnection disabled as set by | 1422 | * Bit vector of targets that have disconnection disabled as set by |
@@ -1331,6 +1427,7 @@ scratch_ram { | |||
1331 | DISC_DSB { | 1427 | DISC_DSB { |
1332 | size 2 | 1428 | size 2 |
1333 | count 6 | 1429 | count 6 |
1430 | dont_generate_debug_code | ||
1334 | } | 1431 | } |
1335 | CMDSIZE_TABLE_TAIL { | 1432 | CMDSIZE_TABLE_TAIL { |
1336 | size 4 | 1433 | size 4 |
@@ -1341,12 +1438,14 @@ scratch_ram { | |||
1341 | */ | 1438 | */ |
1342 | MWI_RESIDUAL { | 1439 | MWI_RESIDUAL { |
1343 | size 1 | 1440 | size 1 |
1441 | dont_generate_debug_code | ||
1344 | } | 1442 | } |
1345 | /* | 1443 | /* |
1346 | * SCBID of the next SCB to be started by the controller. | 1444 | * SCBID of the next SCB to be started by the controller. |
1347 | */ | 1445 | */ |
1348 | NEXT_QUEUED_SCB { | 1446 | NEXT_QUEUED_SCB { |
1349 | size 1 | 1447 | size 1 |
1448 | dont_generate_debug_code | ||
1350 | } | 1449 | } |
1351 | /* | 1450 | /* |
1352 | * Single byte buffer used to designate the type or message | 1451 | * Single byte buffer used to designate the type or message |
@@ -1354,6 +1453,7 @@ scratch_ram { | |||
1354 | */ | 1453 | */ |
1355 | MSG_OUT { | 1454 | MSG_OUT { |
1356 | size 1 | 1455 | size 1 |
1456 | dont_generate_debug_code | ||
1357 | } | 1457 | } |
1358 | /* Parameters for DMA Logic */ | 1458 | /* Parameters for DMA Logic */ |
1359 | DMAPARAMS { | 1459 | DMAPARAMS { |
@@ -1369,6 +1469,7 @@ scratch_ram { | |||
1369 | field DIRECTION 0x04 /* Set indicates PCI->SCSI */ | 1469 | field DIRECTION 0x04 /* Set indicates PCI->SCSI */ |
1370 | field FIFOFLUSH 0x02 | 1470 | field FIFOFLUSH 0x02 |
1371 | field FIFORESET 0x01 | 1471 | field FIFORESET 0x01 |
1472 | dont_generate_debug_code | ||
1372 | } | 1473 | } |
1373 | SEQ_FLAGS { | 1474 | SEQ_FLAGS { |
1374 | size 1 | 1475 | size 1 |
@@ -1390,9 +1491,11 @@ scratch_ram { | |||
1390 | */ | 1491 | */ |
1391 | SAVED_SCSIID { | 1492 | SAVED_SCSIID { |
1392 | size 1 | 1493 | size 1 |
1494 | dont_generate_debug_code | ||
1393 | } | 1495 | } |
1394 | SAVED_LUN { | 1496 | SAVED_LUN { |
1395 | size 1 | 1497 | size 1 |
1498 | dont_generate_debug_code | ||
1396 | } | 1499 | } |
1397 | /* | 1500 | /* |
1398 | * The last bus phase as seen by the sequencer. | 1501 | * The last bus phase as seen by the sequencer. |
@@ -1417,6 +1520,7 @@ scratch_ram { | |||
1417 | */ | 1520 | */ |
1418 | WAITING_SCBH { | 1521 | WAITING_SCBH { |
1419 | size 1 | 1522 | size 1 |
1523 | dont_generate_debug_code | ||
1420 | } | 1524 | } |
1421 | /* | 1525 | /* |
1422 | * head of list of SCBs that are | 1526 | * head of list of SCBs that are |
@@ -1425,6 +1529,7 @@ scratch_ram { | |||
1425 | */ | 1529 | */ |
1426 | DISCONNECTED_SCBH { | 1530 | DISCONNECTED_SCBH { |
1427 | size 1 | 1531 | size 1 |
1532 | dont_generate_debug_code | ||
1428 | } | 1533 | } |
1429 | /* | 1534 | /* |
1430 | * head of list of SCBs that are | 1535 | * head of list of SCBs that are |
@@ -1432,6 +1537,7 @@ scratch_ram { | |||
1432 | */ | 1537 | */ |
1433 | FREE_SCBH { | 1538 | FREE_SCBH { |
1434 | size 1 | 1539 | size 1 |
1540 | dont_generate_debug_code | ||
1435 | } | 1541 | } |
1436 | /* | 1542 | /* |
1437 | * head of list of SCBs that have | 1543 | * head of list of SCBs that have |
@@ -1446,6 +1552,7 @@ scratch_ram { | |||
1446 | */ | 1552 | */ |
1447 | HSCB_ADDR { | 1553 | HSCB_ADDR { |
1448 | size 4 | 1554 | size 4 |
1555 | dont_generate_debug_code | ||
1449 | } | 1556 | } |
1450 | /* | 1557 | /* |
1451 | * Base address of our shared data with the kernel driver in host | 1558 | * Base address of our shared data with the kernel driver in host |
@@ -1454,15 +1561,19 @@ scratch_ram { | |||
1454 | */ | 1561 | */ |
1455 | SHARED_DATA_ADDR { | 1562 | SHARED_DATA_ADDR { |
1456 | size 4 | 1563 | size 4 |
1564 | dont_generate_debug_code | ||
1457 | } | 1565 | } |
1458 | KERNEL_QINPOS { | 1566 | KERNEL_QINPOS { |
1459 | size 1 | 1567 | size 1 |
1568 | dont_generate_debug_code | ||
1460 | } | 1569 | } |
1461 | QINPOS { | 1570 | QINPOS { |
1462 | size 1 | 1571 | size 1 |
1572 | dont_generate_debug_code | ||
1463 | } | 1573 | } |
1464 | QOUTPOS { | 1574 | QOUTPOS { |
1465 | size 1 | 1575 | size 1 |
1576 | dont_generate_debug_code | ||
1466 | } | 1577 | } |
1467 | /* | 1578 | /* |
1468 | * Kernel and sequencer offsets into the queue of | 1579 | * Kernel and sequencer offsets into the queue of |
@@ -1471,9 +1582,11 @@ scratch_ram { | |||
1471 | */ | 1582 | */ |
1472 | KERNEL_TQINPOS { | 1583 | KERNEL_TQINPOS { |
1473 | size 1 | 1584 | size 1 |
1585 | dont_generate_debug_code | ||
1474 | } | 1586 | } |
1475 | TQINPOS { | 1587 | TQINPOS { |
1476 | size 1 | 1588 | size 1 |
1589 | dont_generate_debug_code | ||
1477 | } | 1590 | } |
1478 | ARG_1 { | 1591 | ARG_1 { |
1479 | size 1 | 1592 | size 1 |
@@ -1486,10 +1599,12 @@ scratch_ram { | |||
1486 | mask CONT_MSG_LOOP 0x04 | 1599 | mask CONT_MSG_LOOP 0x04 |
1487 | mask CONT_TARG_SESSION 0x02 | 1600 | mask CONT_TARG_SESSION 0x02 |
1488 | alias RETURN_1 | 1601 | alias RETURN_1 |
1602 | dont_generate_debug_code | ||
1489 | } | 1603 | } |
1490 | ARG_2 { | 1604 | ARG_2 { |
1491 | size 1 | 1605 | size 1 |
1492 | alias RETURN_2 | 1606 | alias RETURN_2 |
1607 | dont_generate_debug_code | ||
1493 | } | 1608 | } |
1494 | 1609 | ||
1495 | /* | 1610 | /* |
@@ -1498,6 +1613,7 @@ scratch_ram { | |||
1498 | LAST_MSG { | 1613 | LAST_MSG { |
1499 | size 1 | 1614 | size 1 |
1500 | alias TARG_IMMEDIATE_SCB | 1615 | alias TARG_IMMEDIATE_SCB |
1616 | dont_generate_debug_code | ||
1501 | } | 1617 | } |
1502 | 1618 | ||
1503 | /* | 1619 | /* |
@@ -1513,6 +1629,7 @@ scratch_ram { | |||
1513 | field ENAUTOATNO 0x08 | 1629 | field ENAUTOATNO 0x08 |
1514 | field ENAUTOATNI 0x04 | 1630 | field ENAUTOATNI 0x04 |
1515 | field ENAUTOATNP 0x02 | 1631 | field ENAUTOATNP 0x02 |
1632 | dont_generate_debug_code | ||
1516 | } | 1633 | } |
1517 | } | 1634 | } |
1518 | 1635 | ||
@@ -1533,12 +1650,14 @@ scratch_ram { | |||
1533 | field HA_274_EXTENDED_TRANS 0x01 | 1650 | field HA_274_EXTENDED_TRANS 0x01 |
1534 | alias INITIATOR_TAG | 1651 | alias INITIATOR_TAG |
1535 | count 1 | 1652 | count 1 |
1653 | dont_generate_debug_code | ||
1536 | } | 1654 | } |
1537 | 1655 | ||
1538 | SEQ_FLAGS2 { | 1656 | SEQ_FLAGS2 { |
1539 | size 1 | 1657 | size 1 |
1540 | field SCB_DMA 0x01 | 1658 | field SCB_DMA 0x01 |
1541 | field TARGET_MSG_PENDING 0x02 | 1659 | field TARGET_MSG_PENDING 0x02 |
1660 | dont_generate_debug_code | ||
1542 | } | 1661 | } |
1543 | } | 1662 | } |
1544 | 1663 | ||
@@ -1562,6 +1681,7 @@ scratch_ram { | |||
1562 | field ENSPCHK 0x20 | 1681 | field ENSPCHK 0x20 |
1563 | mask HSCSIID 0x07 /* our SCSI ID */ | 1682 | mask HSCSIID 0x07 /* our SCSI ID */ |
1564 | mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */ | 1683 | mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */ |
1684 | dont_generate_debug_code | ||
1565 | } | 1685 | } |
1566 | INTDEF { | 1686 | INTDEF { |
1567 | address 0x05c | 1687 | address 0x05c |
@@ -1569,11 +1689,13 @@ scratch_ram { | |||
1569 | count 1 | 1689 | count 1 |
1570 | field EDGE_TRIG 0x80 | 1690 | field EDGE_TRIG 0x80 |
1571 | mask VECTOR 0x0f | 1691 | mask VECTOR 0x0f |
1692 | dont_generate_debug_code | ||
1572 | } | 1693 | } |
1573 | HOSTCONF { | 1694 | HOSTCONF { |
1574 | address 0x05d | 1695 | address 0x05d |
1575 | size 1 | 1696 | size 1 |
1576 | count 1 | 1697 | count 1 |
1698 | dont_generate_debug_code | ||
1577 | } | 1699 | } |
1578 | HA_274_BIOSCTRL { | 1700 | HA_274_BIOSCTRL { |
1579 | address 0x05f | 1701 | address 0x05f |
@@ -1582,6 +1704,7 @@ scratch_ram { | |||
1582 | mask BIOSMODE 0x30 | 1704 | mask BIOSMODE 0x30 |
1583 | mask BIOSDISABLED 0x30 | 1705 | mask BIOSDISABLED 0x30 |
1584 | field CHANNEL_B_PRIMARY 0x08 | 1706 | field CHANNEL_B_PRIMARY 0x08 |
1707 | dont_generate_debug_code | ||
1585 | } | 1708 | } |
1586 | } | 1709 | } |
1587 | 1710 | ||
@@ -1595,6 +1718,7 @@ scratch_ram { | |||
1595 | TARG_OFFSET { | 1718 | TARG_OFFSET { |
1596 | size 16 | 1719 | size 16 |
1597 | count 1 | 1720 | count 1 |
1721 | dont_generate_debug_code | ||
1598 | } | 1722 | } |
1599 | } | 1723 | } |
1600 | 1724 | ||