diff options
80 files changed, 1128 insertions, 841 deletions
diff --git a/.gitignore b/.gitignore index 8faa6c02b39e..5d56a3fd0de6 100644 --- a/.gitignore +++ b/.gitignore | |||
@@ -28,6 +28,7 @@ modules.builtin | |||
28 | *.gz | 28 | *.gz |
29 | *.bz2 | 29 | *.bz2 |
30 | *.lzma | 30 | *.lzma |
31 | *.xz | ||
31 | *.lzo | 32 | *.lzo |
32 | *.patch | 33 | *.patch |
33 | *.gcno | 34 | *.gcno |
diff --git a/Documentation/DocBook/filesystems.tmpl b/Documentation/DocBook/filesystems.tmpl index 5e87ad58c0b5..f51f28531b8d 100644 --- a/Documentation/DocBook/filesystems.tmpl +++ b/Documentation/DocBook/filesystems.tmpl | |||
@@ -82,6 +82,11 @@ | |||
82 | </sect1> | 82 | </sect1> |
83 | </chapter> | 83 | </chapter> |
84 | 84 | ||
85 | <chapter id="fs_events"> | ||
86 | <title>Events based on file descriptors</title> | ||
87 | !Efs/eventfd.c | ||
88 | </chapter> | ||
89 | |||
85 | <chapter id="sysfs"> | 90 | <chapter id="sysfs"> |
86 | <title>The Filesystem for Exporting Kernel Objects</title> | 91 | <title>The Filesystem for Exporting Kernel Objects</title> |
87 | !Efs/sysfs/file.c | 92 | !Efs/sysfs/file.c |
diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42 index 0e76ef12e4c6..a22ecf48f255 100644 --- a/Documentation/hwmon/jc42 +++ b/Documentation/hwmon/jc42 | |||
@@ -51,7 +51,8 @@ Supported chips: | |||
51 | * JEDEC JC 42.4 compliant temperature sensor chips | 51 | * JEDEC JC 42.4 compliant temperature sensor chips |
52 | Prefix: 'jc42' | 52 | Prefix: 'jc42' |
53 | Addresses scanned: I2C 0x18 - 0x1f | 53 | Addresses scanned: I2C 0x18 - 0x1f |
54 | Datasheet: - | 54 | Datasheet: |
55 | http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf | ||
55 | 56 | ||
56 | Author: | 57 | Author: |
57 | Guenter Roeck <guenter.roeck@ericsson.com> | 58 | Guenter Roeck <guenter.roeck@ericsson.com> |
@@ -60,7 +61,11 @@ Author: | |||
60 | Description | 61 | Description |
61 | ----------- | 62 | ----------- |
62 | 63 | ||
63 | This driver implements support for JEDEC JC 42.4 compliant temperature sensors. | 64 | This driver implements support for JEDEC JC 42.4 compliant temperature sensors, |
65 | which are used on many DDR3 memory modules for mobile devices and servers. Some | ||
66 | systems use the sensor to prevent memory overheating by automatically throttling | ||
67 | the memory controller. | ||
68 | |||
64 | The driver auto-detects the chips listed above, but can be manually instantiated | 69 | The driver auto-detects the chips listed above, but can be manually instantiated |
65 | to support other JC 42.4 compliant chips. | 70 | to support other JC 42.4 compliant chips. |
66 | 71 | ||
@@ -81,15 +86,19 @@ limits. The chip supports only a single register to configure the hysteresis, | |||
81 | which applies to all limits. This register can be written by writing into | 86 | which applies to all limits. This register can be written by writing into |
82 | temp1_crit_hyst. Other hysteresis attributes are read-only. | 87 | temp1_crit_hyst. Other hysteresis attributes are read-only. |
83 | 88 | ||
89 | If the BIOS has configured the sensor for automatic temperature management, it | ||
90 | is likely that it has locked the registers, i.e., that the temperature limits | ||
91 | cannot be changed. | ||
92 | |||
84 | Sysfs entries | 93 | Sysfs entries |
85 | ------------- | 94 | ------------- |
86 | 95 | ||
87 | temp1_input Temperature (RO) | 96 | temp1_input Temperature (RO) |
88 | temp1_min Minimum temperature (RW) | 97 | temp1_min Minimum temperature (RO or RW) |
89 | temp1_max Maximum temperature (RW) | 98 | temp1_max Maximum temperature (RO or RW) |
90 | temp1_crit Critical high temperature (RW) | 99 | temp1_crit Critical high temperature (RO or RW) |
91 | 100 | ||
92 | temp1_crit_hyst Critical hysteresis temperature (RW) | 101 | temp1_crit_hyst Critical hysteresis temperature (RO or RW) |
93 | temp1_max_hyst Maximum hysteresis temperature (RO) | 102 | temp1_max_hyst Maximum hysteresis temperature (RO) |
94 | 103 | ||
95 | temp1_min_alarm Temperature low alarm | 104 | temp1_min_alarm Temperature low alarm |
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp index 6526eee525a6..d2b56a4fd1f5 100644 --- a/Documentation/hwmon/k10temp +++ b/Documentation/hwmon/k10temp | |||
@@ -9,6 +9,8 @@ Supported chips: | |||
9 | Socket S1G3: Athlon II, Sempron, Turion II | 9 | Socket S1G3: Athlon II, Sempron, Turion II |
10 | * AMD Family 11h processors: | 10 | * AMD Family 11h processors: |
11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) | 11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) |
12 | * AMD Family 12h processors: "Llano" | ||
13 | * AMD Family 14h processors: "Brazos" (C/E/G-Series) | ||
12 | 14 | ||
13 | Prefix: 'k10temp' | 15 | Prefix: 'k10temp' |
14 | Addresses scanned: PCI space | 16 | Addresses scanned: PCI space |
@@ -17,10 +19,14 @@ Supported chips: | |||
17 | http://support.amd.com/us/Processor_TechDocs/31116.pdf | 19 | http://support.amd.com/us/Processor_TechDocs/31116.pdf |
18 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: | 20 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: |
19 | http://support.amd.com/us/Processor_TechDocs/41256.pdf | 21 | http://support.amd.com/us/Processor_TechDocs/41256.pdf |
22 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors: | ||
23 | http://support.amd.com/us/Processor_TechDocs/43170.pdf | ||
20 | Revision Guide for AMD Family 10h Processors: | 24 | Revision Guide for AMD Family 10h Processors: |
21 | http://support.amd.com/us/Processor_TechDocs/41322.pdf | 25 | http://support.amd.com/us/Processor_TechDocs/41322.pdf |
22 | Revision Guide for AMD Family 11h Processors: | 26 | Revision Guide for AMD Family 11h Processors: |
23 | http://support.amd.com/us/Processor_TechDocs/41788.pdf | 27 | http://support.amd.com/us/Processor_TechDocs/41788.pdf |
28 | Revision Guide for AMD Family 14h Models 00h-0Fh Processors: | ||
29 | http://support.amd.com/us/Processor_TechDocs/47534.pdf | ||
24 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: | 30 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: |
25 | http://support.amd.com/us/Processor_TechDocs/43373.pdf | 31 | http://support.amd.com/us/Processor_TechDocs/43373.pdf |
26 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: | 32 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: |
@@ -34,7 +40,7 @@ Description | |||
34 | ----------- | 40 | ----------- |
35 | 41 | ||
36 | This driver permits reading of the internal temperature sensor of AMD | 42 | This driver permits reading of the internal temperature sensor of AMD |
37 | Family 10h and 11h processors. | 43 | Family 10h/11h/12h/14h processors. |
38 | 44 | ||
39 | All these processors have a sensor, but on those for Socket F or AM2+, | 45 | All these processors have a sensor, but on those for Socket F or AM2+, |
40 | the sensor may return inconsistent values (erratum 319). The driver | 46 | the sensor may return inconsistent values (erratum 319). The driver |
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 89835a4766a6..f4a04c0c7edc 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt | |||
@@ -144,6 +144,11 @@ a fixed number of characters. This limit depends on the architecture | |||
144 | and is between 256 and 4096 characters. It is defined in the file | 144 | and is between 256 and 4096 characters. It is defined in the file |
145 | ./include/asm/setup.h as COMMAND_LINE_SIZE. | 145 | ./include/asm/setup.h as COMMAND_LINE_SIZE. |
146 | 146 | ||
147 | Finally, the [KMG] suffix is commonly described after a number of kernel | ||
148 | parameter values. These 'K', 'M', and 'G' letters represent the _binary_ | ||
149 | multipliers 'Kilo', 'Mega', and 'Giga', equalling 2^10, 2^20, and 2^30 | ||
150 | bytes respectively. Such letter suffixes can also be entirely omitted. | ||
151 | |||
147 | 152 | ||
148 | acpi= [HW,ACPI,X86] | 153 | acpi= [HW,ACPI,X86] |
149 | Advanced Configuration and Power Interface | 154 | Advanced Configuration and Power Interface |
@@ -545,16 +550,20 @@ and is between 256 and 4096 characters. It is defined in the file | |||
545 | Format: | 550 | Format: |
546 | <first_slot>,<last_slot>,<port>,<enum_bit>[,<debug>] | 551 | <first_slot>,<last_slot>,<port>,<enum_bit>[,<debug>] |
547 | 552 | ||
548 | crashkernel=nn[KMG]@ss[KMG] | 553 | crashkernel=size[KMG][@offset[KMG]] |
549 | [KNL] Reserve a chunk of physical memory to | 554 | [KNL] Using kexec, Linux can switch to a 'crash kernel' |
550 | hold a kernel to switch to with kexec on panic. | 555 | upon panic. This parameter reserves the physical |
556 | memory region [offset, offset + size] for that kernel | ||
557 | image. If '@offset' is omitted, then a suitable offset | ||
558 | is selected automatically. Check | ||
559 | Documentation/kdump/kdump.txt for further details. | ||
551 | 560 | ||
552 | crashkernel=range1:size1[,range2:size2,...][@offset] | 561 | crashkernel=range1:size1[,range2:size2,...][@offset] |
553 | [KNL] Same as above, but depends on the memory | 562 | [KNL] Same as above, but depends on the memory |
554 | in the running system. The syntax of range is | 563 | in the running system. The syntax of range is |
555 | start-[end] where start and end are both | 564 | start-[end] where start and end are both |
556 | a memory unit (amount[KMG]). See also | 565 | a memory unit (amount[KMG]). See also |
557 | Documentation/kdump/kdump.txt for a example. | 566 | Documentation/kdump/kdump.txt for an example. |
558 | 567 | ||
559 | cs89x0_dma= [HW,NET] | 568 | cs89x0_dma= [HW,NET] |
560 | Format: <dma> | 569 | Format: <dma> |
@@ -1262,10 +1271,9 @@ and is between 256 and 4096 characters. It is defined in the file | |||
1262 | 6 (KERN_INFO) informational | 1271 | 6 (KERN_INFO) informational |
1263 | 7 (KERN_DEBUG) debug-level messages | 1272 | 7 (KERN_DEBUG) debug-level messages |
1264 | 1273 | ||
1265 | log_buf_len=n Sets the size of the printk ring buffer, in bytes. | 1274 | log_buf_len=n[KMG] Sets the size of the printk ring buffer, |
1266 | Format: { n | nk | nM } | 1275 | in bytes. n must be a power of two. The default |
1267 | n must be a power of two. The default size | 1276 | size is set in the kernel config file. |
1268 | is set in the kernel config file. | ||
1269 | 1277 | ||
1270 | logo.nologo [FB] Disables display of the built-in Linux logo. | 1278 | logo.nologo [FB] Disables display of the built-in Linux logo. |
1271 | This may be used to provide more screen space for | 1279 | This may be used to provide more screen space for |
diff --git a/MAINTAINERS b/MAINTAINERS index 5dd6c751e6a6..6f99e1260db8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -885,7 +885,7 @@ S: Supported | |||
885 | 885 | ||
886 | ARM/QUALCOMM MSM MACHINE SUPPORT | 886 | ARM/QUALCOMM MSM MACHINE SUPPORT |
887 | M: David Brown <davidb@codeaurora.org> | 887 | M: David Brown <davidb@codeaurora.org> |
888 | M: Daniel Walker <dwalker@codeaurora.org> | 888 | M: Daniel Walker <dwalker@fifo99.com> |
889 | M: Bryan Huntsman <bryanh@codeaurora.org> | 889 | M: Bryan Huntsman <bryanh@codeaurora.org> |
890 | L: linux-arm-msm@vger.kernel.org | 890 | L: linux-arm-msm@vger.kernel.org |
891 | F: arch/arm/mach-msm/ | 891 | F: arch/arm/mach-msm/ |
@@ -2873,7 +2873,6 @@ M: Guenter Roeck <guenter.roeck@ericsson.com> | |||
2873 | L: lm-sensors@lm-sensors.org | 2873 | L: lm-sensors@lm-sensors.org |
2874 | W: http://www.lm-sensors.org/ | 2874 | W: http://www.lm-sensors.org/ |
2875 | T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/ | 2875 | T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/ |
2876 | T: quilt kernel.org/pub/linux/kernel/people/groeck/linux-staging/ | ||
2877 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git | 2876 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git |
2878 | S: Maintained | 2877 | S: Maintained |
2879 | F: Documentation/hwmon/ | 2878 | F: Documentation/hwmon/ |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 38 | 3 | SUBLEVEL = 38 |
4 | EXTRAVERSION = -rc5 | 4 | EXTRAVERSION = -rc6 |
5 | NAME = Flesh-Eating Bats with Fangs | 5 | NAME = Flesh-Eating Bats with Fangs |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 26d45e5b636b..166efa2a19cd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1177,6 +1177,31 @@ config ARM_ERRATA_743622 | |||
1177 | visible impact on the overall performance or power consumption of the | 1177 | visible impact on the overall performance or power consumption of the |
1178 | processor. | 1178 | processor. |
1179 | 1179 | ||
1180 | config ARM_ERRATA_751472 | ||
1181 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | ||
1182 | depends on CPU_V7 && SMP | ||
1183 | help | ||
1184 | This option enables the workaround for the 751472 Cortex-A9 (prior | ||
1185 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | ||
1186 | completion of a following broadcasted operation if the second | ||
1187 | operation is received by a CPU before the ICIALLUIS has completed, | ||
1188 | potentially leading to corrupted entries in the cache or TLB. | ||
1189 | |||
1190 | config ARM_ERRATA_753970 | ||
1191 | bool "ARM errata: cache sync operation may be faulty" | ||
1192 | depends on CACHE_PL310 | ||
1193 | help | ||
1194 | This option enables the workaround for the 753970 PL310 (r3p0) erratum. | ||
1195 | |||
1196 | Under some condition the effect of cache sync operation on | ||
1197 | the store buffer still remains when the operation completes. | ||
1198 | This means that the store buffer is always asked to drain and | ||
1199 | this prevents it from merging any further writes. The workaround | ||
1200 | is to replace the normal offset of cache sync operation (0x730) | ||
1201 | by another offset targeting an unmapped PL310 register 0x740. | ||
1202 | This has the same effect as the cache sync operation: store buffer | ||
1203 | drain and waiting for all buffers empty. | ||
1204 | |||
1180 | endmenu | 1205 | endmenu |
1181 | 1206 | ||
1182 | source "arch/arm/common/Kconfig" | 1207 | source "arch/arm/common/Kconfig" |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c22c1adfedd6..6f7b29294c80 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -15,7 +15,7 @@ ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) | |||
15 | LDFLAGS_vmlinux += --be8 | 15 | LDFLAGS_vmlinux += --be8 |
16 | endif | 16 | endif |
17 | 17 | ||
18 | OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S | 18 | OBJCOPYFLAGS :=-O binary -R .comment -S |
19 | GZFLAGS :=-9 | 19 | GZFLAGS :=-9 |
20 | #KBUILD_CFLAGS +=-pipe | 20 | #KBUILD_CFLAGS +=-pipe |
21 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: | 21 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: |
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore index ab204db594d3..c6028967d336 100644 --- a/arch/arm/boot/compressed/.gitignore +++ b/arch/arm/boot/compressed/.gitignore | |||
@@ -1,3 +1,7 @@ | |||
1 | font.c | 1 | font.c |
2 | piggy.gz | 2 | lib1funcs.S |
3 | piggy.gzip | ||
4 | piggy.lzo | ||
5 | piggy.lzma | ||
6 | vmlinux | ||
3 | vmlinux.lds | 7 | vmlinux.lds |
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 5aeec1e1735c..16bd48031583 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h | |||
@@ -36,6 +36,7 @@ | |||
36 | #define L2X0_RAW_INTR_STAT 0x21C | 36 | #define L2X0_RAW_INTR_STAT 0x21C |
37 | #define L2X0_INTR_CLEAR 0x220 | 37 | #define L2X0_INTR_CLEAR 0x220 |
38 | #define L2X0_CACHE_SYNC 0x730 | 38 | #define L2X0_CACHE_SYNC 0x730 |
39 | #define L2X0_DUMMY_REG 0x740 | ||
39 | #define L2X0_INV_LINE_PA 0x770 | 40 | #define L2X0_INV_LINE_PA 0x770 |
40 | #define L2X0_INV_WAY 0x77C | 41 | #define L2X0_INV_WAY 0x77C |
41 | #define L2X0_CLEAN_LINE_PA 0x7B0 | 42 | #define L2X0_CLEAN_LINE_PA 0x7B0 |
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h index 721847dc68ab..e0d1c0cfa548 100644 --- a/arch/arm/include/asm/hardware/sp810.h +++ b/arch/arm/include/asm/hardware/sp810.h | |||
@@ -58,6 +58,9 @@ | |||
58 | 58 | ||
59 | static inline void sysctl_soft_reset(void __iomem *base) | 59 | static inline void sysctl_soft_reset(void __iomem *base) |
60 | { | 60 | { |
61 | /* switch to slow mode */ | ||
62 | writel(0x2, base + SCCTRL); | ||
63 | |||
61 | /* writing any value to SCSYSSTAT reg will reset system */ | 64 | /* writing any value to SCSYSSTAT reg will reset system */ |
62 | writel(0, base + SCSYSSTAT); | 65 | writel(0, base + SCSYSSTAT); |
63 | } | 66 | } |
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index f41a6f57cd12..82dfe5d0c41e 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h | |||
@@ -18,16 +18,34 @@ | |||
18 | #define __ASMARM_TLB_H | 18 | #define __ASMARM_TLB_H |
19 | 19 | ||
20 | #include <asm/cacheflush.h> | 20 | #include <asm/cacheflush.h> |
21 | #include <asm/tlbflush.h> | ||
22 | 21 | ||
23 | #ifndef CONFIG_MMU | 22 | #ifndef CONFIG_MMU |
24 | 23 | ||
25 | #include <linux/pagemap.h> | 24 | #include <linux/pagemap.h> |
25 | |||
26 | #define tlb_flush(tlb) ((void) tlb) | ||
27 | |||
26 | #include <asm-generic/tlb.h> | 28 | #include <asm-generic/tlb.h> |
27 | 29 | ||
28 | #else /* !CONFIG_MMU */ | 30 | #else /* !CONFIG_MMU */ |
29 | 31 | ||
32 | #include <linux/swap.h> | ||
30 | #include <asm/pgalloc.h> | 33 | #include <asm/pgalloc.h> |
34 | #include <asm/tlbflush.h> | ||
35 | |||
36 | /* | ||
37 | * We need to delay page freeing for SMP as other CPUs can access pages | ||
38 | * which have been removed but not yet had their TLB entries invalidated. | ||
39 | * Also, as ARMv7 speculative prefetch can drag new entries into the TLB, | ||
40 | * we need to apply this same delaying tactic to ensure correct operation. | ||
41 | */ | ||
42 | #if defined(CONFIG_SMP) || defined(CONFIG_CPU_32v7) | ||
43 | #define tlb_fast_mode(tlb) 0 | ||
44 | #define FREE_PTE_NR 500 | ||
45 | #else | ||
46 | #define tlb_fast_mode(tlb) 1 | ||
47 | #define FREE_PTE_NR 0 | ||
48 | #endif | ||
31 | 49 | ||
32 | /* | 50 | /* |
33 | * TLB handling. This allows us to remove pages from the page | 51 | * TLB handling. This allows us to remove pages from the page |
@@ -36,12 +54,58 @@ | |||
36 | struct mmu_gather { | 54 | struct mmu_gather { |
37 | struct mm_struct *mm; | 55 | struct mm_struct *mm; |
38 | unsigned int fullmm; | 56 | unsigned int fullmm; |
57 | struct vm_area_struct *vma; | ||
39 | unsigned long range_start; | 58 | unsigned long range_start; |
40 | unsigned long range_end; | 59 | unsigned long range_end; |
60 | unsigned int nr; | ||
61 | struct page *pages[FREE_PTE_NR]; | ||
41 | }; | 62 | }; |
42 | 63 | ||
43 | DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); | 64 | DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); |
44 | 65 | ||
66 | /* | ||
67 | * This is unnecessarily complex. There's three ways the TLB shootdown | ||
68 | * code is used: | ||
69 | * 1. Unmapping a range of vmas. See zap_page_range(), unmap_region(). | ||
70 | * tlb->fullmm = 0, and tlb_start_vma/tlb_end_vma will be called. | ||
71 | * tlb->vma will be non-NULL. | ||
72 | * 2. Unmapping all vmas. See exit_mmap(). | ||
73 | * tlb->fullmm = 1, and tlb_start_vma/tlb_end_vma will be called. | ||
74 | * tlb->vma will be non-NULL. Additionally, page tables will be freed. | ||
75 | * 3. Unmapping argument pages. See shift_arg_pages(). | ||
76 | * tlb->fullmm = 0, but tlb_start_vma/tlb_end_vma will not be called. | ||
77 | * tlb->vma will be NULL. | ||
78 | */ | ||
79 | static inline void tlb_flush(struct mmu_gather *tlb) | ||
80 | { | ||
81 | if (tlb->fullmm || !tlb->vma) | ||
82 | flush_tlb_mm(tlb->mm); | ||
83 | else if (tlb->range_end > 0) { | ||
84 | flush_tlb_range(tlb->vma, tlb->range_start, tlb->range_end); | ||
85 | tlb->range_start = TASK_SIZE; | ||
86 | tlb->range_end = 0; | ||
87 | } | ||
88 | } | ||
89 | |||
90 | static inline void tlb_add_flush(struct mmu_gather *tlb, unsigned long addr) | ||
91 | { | ||
92 | if (!tlb->fullmm) { | ||
93 | if (addr < tlb->range_start) | ||
94 | tlb->range_start = addr; | ||
95 | if (addr + PAGE_SIZE > tlb->range_end) | ||
96 | tlb->range_end = addr + PAGE_SIZE; | ||
97 | } | ||
98 | } | ||
99 | |||
100 | static inline void tlb_flush_mmu(struct mmu_gather *tlb) | ||
101 | { | ||
102 | tlb_flush(tlb); | ||
103 | if (!tlb_fast_mode(tlb)) { | ||
104 | free_pages_and_swap_cache(tlb->pages, tlb->nr); | ||
105 | tlb->nr = 0; | ||
106 | } | ||
107 | } | ||
108 | |||
45 | static inline struct mmu_gather * | 109 | static inline struct mmu_gather * |
46 | tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | 110 | tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) |
47 | { | 111 | { |
@@ -49,6 +113,8 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | |||
49 | 113 | ||
50 | tlb->mm = mm; | 114 | tlb->mm = mm; |
51 | tlb->fullmm = full_mm_flush; | 115 | tlb->fullmm = full_mm_flush; |
116 | tlb->vma = NULL; | ||
117 | tlb->nr = 0; | ||
52 | 118 | ||
53 | return tlb; | 119 | return tlb; |
54 | } | 120 | } |
@@ -56,8 +122,7 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | |||
56 | static inline void | 122 | static inline void |
57 | tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) | 123 | tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) |
58 | { | 124 | { |
59 | if (tlb->fullmm) | 125 | tlb_flush_mmu(tlb); |
60 | flush_tlb_mm(tlb->mm); | ||
61 | 126 | ||
62 | /* keep the page table cache within bounds */ | 127 | /* keep the page table cache within bounds */ |
63 | check_pgt_cache(); | 128 | check_pgt_cache(); |
@@ -71,12 +136,7 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) | |||
71 | static inline void | 136 | static inline void |
72 | tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr) | 137 | tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr) |
73 | { | 138 | { |
74 | if (!tlb->fullmm) { | 139 | tlb_add_flush(tlb, addr); |
75 | if (addr < tlb->range_start) | ||
76 | tlb->range_start = addr; | ||
77 | if (addr + PAGE_SIZE > tlb->range_end) | ||
78 | tlb->range_end = addr + PAGE_SIZE; | ||
79 | } | ||
80 | } | 140 | } |
81 | 141 | ||
82 | /* | 142 | /* |
@@ -89,6 +149,7 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | |||
89 | { | 149 | { |
90 | if (!tlb->fullmm) { | 150 | if (!tlb->fullmm) { |
91 | flush_cache_range(vma, vma->vm_start, vma->vm_end); | 151 | flush_cache_range(vma, vma->vm_start, vma->vm_end); |
152 | tlb->vma = vma; | ||
92 | tlb->range_start = TASK_SIZE; | 153 | tlb->range_start = TASK_SIZE; |
93 | tlb->range_end = 0; | 154 | tlb->range_end = 0; |
94 | } | 155 | } |
@@ -97,12 +158,30 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | |||
97 | static inline void | 158 | static inline void |
98 | tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) | 159 | tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) |
99 | { | 160 | { |
100 | if (!tlb->fullmm && tlb->range_end > 0) | 161 | if (!tlb->fullmm) |
101 | flush_tlb_range(vma, tlb->range_start, tlb->range_end); | 162 | tlb_flush(tlb); |
163 | } | ||
164 | |||
165 | static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) | ||
166 | { | ||
167 | if (tlb_fast_mode(tlb)) { | ||
168 | free_page_and_swap_cache(page); | ||
169 | } else { | ||
170 | tlb->pages[tlb->nr++] = page; | ||
171 | if (tlb->nr >= FREE_PTE_NR) | ||
172 | tlb_flush_mmu(tlb); | ||
173 | } | ||
174 | } | ||
175 | |||
176 | static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, | ||
177 | unsigned long addr) | ||
178 | { | ||
179 | pgtable_page_dtor(pte); | ||
180 | tlb_add_flush(tlb, addr); | ||
181 | tlb_remove_page(tlb, pte); | ||
102 | } | 182 | } |
103 | 183 | ||
104 | #define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) | 184 | #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) |
105 | #define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep) | ||
106 | #define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) | 185 | #define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) |
107 | 186 | ||
108 | #define tlb_migrate_finish(mm) do { } while (0) | 187 | #define tlb_migrate_finish(mm) do { } while (0) |
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index ce7378ea15a2..d2005de383b8 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h | |||
@@ -10,12 +10,7 @@ | |||
10 | #ifndef _ASMARM_TLBFLUSH_H | 10 | #ifndef _ASMARM_TLBFLUSH_H |
11 | #define _ASMARM_TLBFLUSH_H | 11 | #define _ASMARM_TLBFLUSH_H |
12 | 12 | ||
13 | 13 | #ifdef CONFIG_MMU | |
14 | #ifndef CONFIG_MMU | ||
15 | |||
16 | #define tlb_flush(tlb) ((void) tlb) | ||
17 | |||
18 | #else /* CONFIG_MMU */ | ||
19 | 14 | ||
20 | #include <asm/glue.h> | 15 | #include <asm/glue.h> |
21 | 16 | ||
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c index 2c1f0050c9c4..8f6ed43861f1 100644 --- a/arch/arm/kernel/kprobes-decode.c +++ b/arch/arm/kernel/kprobes-decode.c | |||
@@ -1437,7 +1437,7 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
1437 | 1437 | ||
1438 | return space_cccc_1100_010x(insn, asi); | 1438 | return space_cccc_1100_010x(insn, asi); |
1439 | 1439 | ||
1440 | } else if ((insn & 0x0e000000) == 0x0c400000) { | 1440 | } else if ((insn & 0x0e000000) == 0x0c000000) { |
1441 | 1441 | ||
1442 | return space_cccc_110x(insn, asi); | 1442 | return space_cccc_110x(insn, asi); |
1443 | 1443 | ||
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c index b8af96ea62e6..2c79eec19262 100644 --- a/arch/arm/kernel/pmu.c +++ b/arch/arm/kernel/pmu.c | |||
@@ -97,28 +97,34 @@ set_irq_affinity(int irq, | |||
97 | irq, cpu); | 97 | irq, cpu); |
98 | return err; | 98 | return err; |
99 | #else | 99 | #else |
100 | return 0; | 100 | return -EINVAL; |
101 | #endif | 101 | #endif |
102 | } | 102 | } |
103 | 103 | ||
104 | static int | 104 | static int |
105 | init_cpu_pmu(void) | 105 | init_cpu_pmu(void) |
106 | { | 106 | { |
107 | int i, err = 0; | 107 | int i, irqs, err = 0; |
108 | struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU]; | 108 | struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU]; |
109 | 109 | ||
110 | if (!pdev) { | 110 | if (!pdev) |
111 | err = -ENODEV; | 111 | return -ENODEV; |
112 | goto out; | 112 | |
113 | } | 113 | irqs = pdev->num_resources; |
114 | |||
115 | /* | ||
116 | * If we have a single PMU interrupt that we can't shift, assume that | ||
117 | * we're running on a uniprocessor machine and continue. | ||
118 | */ | ||
119 | if (irqs == 1 && !irq_can_set_affinity(platform_get_irq(pdev, 0))) | ||
120 | return 0; | ||
114 | 121 | ||
115 | for (i = 0; i < pdev->num_resources; ++i) { | 122 | for (i = 0; i < irqs; ++i) { |
116 | err = set_irq_affinity(platform_get_irq(pdev, i), i); | 123 | err = set_irq_affinity(platform_get_irq(pdev, i), i); |
117 | if (err) | 124 | if (err) |
118 | break; | 125 | break; |
119 | } | 126 | } |
120 | 127 | ||
121 | out: | ||
122 | return err; | 128 | return err; |
123 | } | 129 | } |
124 | 130 | ||
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 420b8d6485d6..5ea4fb718b97 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -226,8 +226,8 @@ int cpu_architecture(void) | |||
226 | * Register 0 and check for VMSAv7 or PMSAv7 */ | 226 | * Register 0 and check for VMSAv7 or PMSAv7 */ |
227 | asm("mrc p15, 0, %0, c0, c1, 4" | 227 | asm("mrc p15, 0, %0, c0, c1, 4" |
228 | : "=r" (mmfr0)); | 228 | : "=r" (mmfr0)); |
229 | if ((mmfr0 & 0x0000000f) == 0x00000003 || | 229 | if ((mmfr0 & 0x0000000f) >= 0x00000003 || |
230 | (mmfr0 & 0x000000f0) == 0x00000030) | 230 | (mmfr0 & 0x000000f0) >= 0x00000030) |
231 | cpu_arch = CPU_ARCH_ARMv7; | 231 | cpu_arch = CPU_ARCH_ARMv7; |
232 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || | 232 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || |
233 | (mmfr0 & 0x000000f0) == 0x00000020) | 233 | (mmfr0 & 0x000000f0) == 0x00000020) |
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 907d5a620bca..abaf8445ce25 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -474,7 +474,9 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka, | |||
474 | unsigned long handler = (unsigned long)ka->sa.sa_handler; | 474 | unsigned long handler = (unsigned long)ka->sa.sa_handler; |
475 | unsigned long retcode; | 475 | unsigned long retcode; |
476 | int thumb = 0; | 476 | int thumb = 0; |
477 | unsigned long cpsr = regs->ARM_cpsr & ~PSR_f; | 477 | unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); |
478 | |||
479 | cpsr |= PSR_ENDSTATE; | ||
478 | 480 | ||
479 | /* | 481 | /* |
480 | * Maybe we need to deliver a 32-bit signal to a 26-bit task. | 482 | * Maybe we need to deliver a 32-bit signal to a 26-bit task. |
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 86b66f3f2031..61462790757f 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
@@ -21,6 +21,12 @@ | |||
21 | #define ARM_CPU_KEEP(x) | 21 | #define ARM_CPU_KEEP(x) |
22 | #endif | 22 | #endif |
23 | 23 | ||
24 | #if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK) | ||
25 | #define ARM_EXIT_KEEP(x) x | ||
26 | #else | ||
27 | #define ARM_EXIT_KEEP(x) | ||
28 | #endif | ||
29 | |||
24 | OUTPUT_ARCH(arm) | 30 | OUTPUT_ARCH(arm) |
25 | ENTRY(stext) | 31 | ENTRY(stext) |
26 | 32 | ||
@@ -43,6 +49,7 @@ SECTIONS | |||
43 | _sinittext = .; | 49 | _sinittext = .; |
44 | HEAD_TEXT | 50 | HEAD_TEXT |
45 | INIT_TEXT | 51 | INIT_TEXT |
52 | ARM_EXIT_KEEP(EXIT_TEXT) | ||
46 | _einittext = .; | 53 | _einittext = .; |
47 | ARM_CPU_DISCARD(PROC_INFO) | 54 | ARM_CPU_DISCARD(PROC_INFO) |
48 | __arch_info_begin = .; | 55 | __arch_info_begin = .; |
@@ -67,6 +74,7 @@ SECTIONS | |||
67 | #ifndef CONFIG_XIP_KERNEL | 74 | #ifndef CONFIG_XIP_KERNEL |
68 | __init_begin = _stext; | 75 | __init_begin = _stext; |
69 | INIT_DATA | 76 | INIT_DATA |
77 | ARM_EXIT_KEEP(EXIT_DATA) | ||
70 | #endif | 78 | #endif |
71 | } | 79 | } |
72 | 80 | ||
@@ -162,6 +170,7 @@ SECTIONS | |||
162 | . = ALIGN(PAGE_SIZE); | 170 | . = ALIGN(PAGE_SIZE); |
163 | __init_begin = .; | 171 | __init_begin = .; |
164 | INIT_DATA | 172 | INIT_DATA |
173 | ARM_EXIT_KEEP(EXIT_DATA) | ||
165 | . = ALIGN(PAGE_SIZE); | 174 | . = ALIGN(PAGE_SIZE); |
166 | __init_end = .; | 175 | __init_end = .; |
167 | #endif | 176 | #endif |
@@ -247,6 +256,8 @@ SECTIONS | |||
247 | } | 256 | } |
248 | #endif | 257 | #endif |
249 | 258 | ||
259 | NOTES | ||
260 | |||
250 | BSS_SECTION(0, 0, 0) | 261 | BSS_SECTION(0, 0, 0) |
251 | _end = .; | 262 | _end = .; |
252 | 263 | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 203dd5a18bd5..058dab4482a1 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5P6442 - Memory map definitions | 6 | * S5P6442 - Memory map definitions |
@@ -16,56 +16,61 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5P6442_PA_CHIPID (0xE0000000) | 19 | #define S5P6442_PA_SDRAM 0x20000000 |
20 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
21 | 20 | ||
22 | #define S5P6442_PA_SYSCON (0xE0100000) | 21 | #define S5P6442_PA_I2S0 0xC0B00000 |
23 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | 22 | #define S5P6442_PA_I2S1 0xF2200000 |
24 | 23 | ||
25 | #define S5P6442_PA_GPIO (0xE0200000) | 24 | #define S5P6442_PA_CHIPID 0xE0000000 |
26 | 25 | ||
27 | #define S5P6442_PA_VIC0 (0xE4000000) | 26 | #define S5P6442_PA_SYSCON 0xE0100000 |
28 | #define S5P6442_PA_VIC1 (0xE4100000) | ||
29 | #define S5P6442_PA_VIC2 (0xE4200000) | ||
30 | 27 | ||
31 | #define S5P6442_PA_SROMC (0xE7000000) | 28 | #define S5P6442_PA_GPIO 0xE0200000 |
32 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
33 | 29 | ||
34 | #define S5P6442_PA_MDMA 0xE8000000 | 30 | #define S5P6442_PA_VIC0 0xE4000000 |
35 | #define S5P6442_PA_PDMA 0xE9000000 | 31 | #define S5P6442_PA_VIC1 0xE4100000 |
32 | #define S5P6442_PA_VIC2 0xE4200000 | ||
36 | 33 | ||
37 | #define S5P6442_PA_TIMER (0xEA000000) | 34 | #define S5P6442_PA_SROMC 0xE7000000 |
38 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
39 | 35 | ||
40 | #define S5P6442_PA_SYSTIMER (0xEA100000) | 36 | #define S5P6442_PA_MDMA 0xE8000000 |
37 | #define S5P6442_PA_PDMA 0xE9000000 | ||
41 | 38 | ||
42 | #define S5P6442_PA_WATCHDOG (0xEA200000) | 39 | #define S5P6442_PA_TIMER 0xEA000000 |
43 | 40 | ||
44 | #define S5P6442_PA_UART (0xEC000000) | 41 | #define S5P6442_PA_SYSTIMER 0xEA100000 |
45 | 42 | ||
46 | #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) | 43 | #define S5P6442_PA_WATCHDOG 0xEA200000 |
47 | #define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) | ||
48 | #define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) | ||
49 | #define S5P_SZ_UART SZ_256 | ||
50 | 44 | ||
51 | #define S5P6442_PA_IIC0 (0xEC100000) | 45 | #define S5P6442_PA_UART 0xEC000000 |
52 | 46 | ||
53 | #define S5P6442_PA_SDRAM (0x20000000) | 47 | #define S5P6442_PA_IIC0 0xEC100000 |
54 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
55 | 48 | ||
56 | #define S5P6442_PA_SPI 0xEC300000 | 49 | #define S5P6442_PA_SPI 0xEC300000 |
57 | 50 | ||
58 | /* I2S */ | ||
59 | #define S5P6442_PA_I2S0 0xC0B00000 | ||
60 | #define S5P6442_PA_I2S1 0xF2200000 | ||
61 | |||
62 | /* PCM */ | ||
63 | #define S5P6442_PA_PCM0 0xF2400000 | 51 | #define S5P6442_PA_PCM0 0xF2400000 |
64 | #define S5P6442_PA_PCM1 0xF2500000 | 52 | #define S5P6442_PA_PCM1 0xF2500000 |
65 | 53 | ||
66 | /* compatibiltiy defines. */ | 54 | /* Compatibiltiy Defines */ |
55 | |||
56 | #define S3C_PA_IIC S5P6442_PA_IIC0 | ||
67 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | 57 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG |
58 | |||
59 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
60 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
61 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
62 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | ||
63 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
64 | |||
65 | /* UART */ | ||
66 | |||
68 | #define S3C_PA_UART S5P6442_PA_UART | 67 | #define S3C_PA_UART S5P6442_PA_UART |
69 | #define S3C_PA_IIC S5P6442_PA_IIC0 | 68 | |
69 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
70 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
71 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
72 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
73 | |||
74 | #define S5P_SZ_UART SZ_256 | ||
70 | 75 | ||
71 | #endif /* __ASM_ARCH_MAP_H */ | 76 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index a9365e5ba614..95c91257c7ca 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * S5P64X0 - Memory map definitions | 6 | * S5P64X0 - Memory map definitions |
@@ -16,64 +16,46 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5P64X0_PA_SDRAM (0x20000000) | 19 | #define S5P64X0_PA_SDRAM 0x20000000 |
20 | 20 | ||
21 | #define S5P64X0_PA_CHIPID (0xE0000000) | 21 | #define S5P64X0_PA_CHIPID 0xE0000000 |
22 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
23 | |||
24 | #define S5P64X0_PA_SYSCON (0xE0100000) | ||
25 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
26 | |||
27 | #define S5P64X0_PA_GPIO (0xE0308000) | ||
28 | |||
29 | #define S5P64X0_PA_VIC0 (0xE4000000) | ||
30 | #define S5P64X0_PA_VIC1 (0xE4100000) | ||
31 | 22 | ||
32 | #define S5P64X0_PA_SROMC (0xE7000000) | 23 | #define S5P64X0_PA_SYSCON 0xE0100000 |
33 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
34 | |||
35 | #define S5P64X0_PA_PDMA (0xE9000000) | ||
36 | |||
37 | #define S5P64X0_PA_TIMER (0xEA000000) | ||
38 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
39 | 24 | ||
40 | #define S5P64X0_PA_RTC (0xEA100000) | 25 | #define S5P64X0_PA_GPIO 0xE0308000 |
41 | 26 | ||
42 | #define S5P64X0_PA_WDT (0xEA200000) | 27 | #define S5P64X0_PA_VIC0 0xE4000000 |
28 | #define S5P64X0_PA_VIC1 0xE4100000 | ||
43 | 29 | ||
44 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | 30 | #define S5P64X0_PA_SROMC 0xE7000000 |
45 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
46 | 31 | ||
47 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | 32 | #define S5P64X0_PA_PDMA 0xE9000000 |
48 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
49 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
50 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
51 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
52 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
53 | 33 | ||
54 | #define S5P_SZ_UART SZ_256 | 34 | #define S5P64X0_PA_TIMER 0xEA000000 |
35 | #define S5P64X0_PA_RTC 0xEA100000 | ||
36 | #define S5P64X0_PA_WDT 0xEA200000 | ||
55 | 37 | ||
56 | #define S5P6440_PA_IIC0 (0xEC104000) | 38 | #define S5P6440_PA_IIC0 0xEC104000 |
57 | #define S5P6440_PA_IIC1 (0xEC20F000) | 39 | #define S5P6440_PA_IIC1 0xEC20F000 |
58 | #define S5P6450_PA_IIC0 (0xEC100000) | 40 | #define S5P6450_PA_IIC0 0xEC100000 |
59 | #define S5P6450_PA_IIC1 (0xEC200000) | 41 | #define S5P6450_PA_IIC1 0xEC200000 |
60 | 42 | ||
61 | #define S5P64X0_PA_SPI0 (0xEC400000) | 43 | #define S5P64X0_PA_SPI0 0xEC400000 |
62 | #define S5P64X0_PA_SPI1 (0xEC500000) | 44 | #define S5P64X0_PA_SPI1 0xEC500000 |
63 | 45 | ||
64 | #define S5P64X0_PA_HSOTG (0xED100000) | 46 | #define S5P64X0_PA_HSOTG 0xED100000 |
65 | 47 | ||
66 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
67 | 49 | ||
68 | #define S5P64X0_PA_I2S (0xF2000000) | 50 | #define S5P64X0_PA_I2S 0xF2000000 |
69 | #define S5P6450_PA_I2S1 0xF2800000 | 51 | #define S5P6450_PA_I2S1 0xF2800000 |
70 | #define S5P6450_PA_I2S2 0xF2900000 | 52 | #define S5P6450_PA_I2S2 0xF2900000 |
71 | 53 | ||
72 | #define S5P64X0_PA_PCM (0xF2100000) | 54 | #define S5P64X0_PA_PCM 0xF2100000 |
73 | 55 | ||
74 | #define S5P64X0_PA_ADC (0xF3000000) | 56 | #define S5P64X0_PA_ADC 0xF3000000 |
75 | 57 | ||
76 | /* compatibiltiy defines. */ | 58 | /* Compatibiltiy Defines */ |
77 | 59 | ||
78 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | 60 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) |
79 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | 61 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) |
@@ -83,6 +65,25 @@ | |||
83 | #define S3C_PA_RTC S5P64X0_PA_RTC | 65 | #define S3C_PA_RTC S5P64X0_PA_RTC |
84 | #define S3C_PA_WDT S5P64X0_PA_WDT | 66 | #define S3C_PA_WDT S5P64X0_PA_WDT |
85 | 67 | ||
68 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
69 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
70 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
71 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
72 | |||
86 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC | 73 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC |
87 | 74 | ||
75 | /* UART */ | ||
76 | |||
77 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | ||
78 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
79 | |||
80 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | ||
81 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
82 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
83 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
84 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
85 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
86 | |||
87 | #define S5P_SZ_UART SZ_256 | ||
88 | |||
88 | #endif /* __ASM_ARCH_MAP_H */ | 89 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 328467b346aa..ccbe6b767f7d 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -1,5 +1,8 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pc100/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | 6 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 7 | * Byungho Min <bhmin@samsung.com> |
5 | * | 8 | * |
@@ -16,145 +19,115 @@ | |||
16 | #include <plat/map-base.h> | 19 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 20 | #include <plat/map-s5p.h> |
18 | 21 | ||
19 | /* | 22 | #define S5PC100_PA_SDRAM 0x20000000 |
20 | * map-base.h has already defined virtual memory address | 23 | |
21 | * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) | 24 | #define S5PC100_PA_ONENAND 0xE7100000 |
22 | * S3C_VA_SYS S3C_ADDR(0x00100000) system control | 25 | #define S5PC100_PA_ONENAND_BUF 0xB0000000 |
23 | * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) | 26 | |
24 | * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block | 27 | #define S5PC100_PA_CHIPID 0xE0000000 |
25 | * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog | ||
26 | * S3C_VA_UART S3C_ADDR(0x01000000) UART | ||
27 | * | ||
28 | * S5PC100 specific virtual memory address can be defined here | ||
29 | * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO | ||
30 | * | ||
31 | */ | ||
32 | 28 | ||
33 | #define S5PC100_PA_ONENAND_BUF (0xB0000000) | 29 | #define S5PC100_PA_SYSCON 0xE0100000 |
34 | #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) | ||
35 | 30 | ||
36 | /* Chip ID */ | 31 | #define S5PC100_PA_OTHERS 0xE0200000 |
37 | 32 | ||
38 | #define S5PC100_PA_CHIPID (0xE0000000) | 33 | #define S5PC100_PA_GPIO 0xE0300000 |
39 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID | ||
40 | 34 | ||
41 | #define S5PC100_PA_SYSCON (0xE0100000) | 35 | #define S5PC100_PA_VIC0 0xE4000000 |
42 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON | 36 | #define S5PC100_PA_VIC1 0xE4100000 |
37 | #define S5PC100_PA_VIC2 0xE4200000 | ||
43 | 38 | ||
44 | #define S5PC100_PA_OTHERS (0xE0200000) | 39 | #define S5PC100_PA_SROMC 0xE7000000 |
45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) | ||
46 | 40 | ||
47 | #define S5PC100_PA_GPIO (0xE0300000) | 41 | #define S5PC100_PA_CFCON 0xE7800000 |
48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | ||
49 | 42 | ||
50 | /* Interrupt */ | 43 | #define S5PC100_PA_MDMA 0xE8100000 |
51 | #define S5PC100_PA_VIC0 (0xE4000000) | 44 | #define S5PC100_PA_PDMA0 0xE9000000 |
52 | #define S5PC100_PA_VIC1 (0xE4100000) | 45 | #define S5PC100_PA_PDMA1 0xE9200000 |
53 | #define S5PC100_PA_VIC2 (0xE4200000) | ||
54 | #define S5PC100_VA_VIC S3C_VA_IRQ | ||
55 | #define S5PC100_VA_VIC_OFFSET 0x10000 | ||
56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | ||
57 | 46 | ||
58 | #define S5PC100_PA_SROMC (0xE7000000) | 47 | #define S5PC100_PA_TIMER 0xEA000000 |
59 | #define S5P_PA_SROMC S5PC100_PA_SROMC | 48 | #define S5PC100_PA_SYSTIMER 0xEA100000 |
49 | #define S5PC100_PA_WATCHDOG 0xEA200000 | ||
50 | #define S5PC100_PA_RTC 0xEA300000 | ||
60 | 51 | ||
61 | #define S5PC100_PA_ONENAND (0xE7100000) | 52 | #define S5PC100_PA_UART 0xEC000000 |
62 | 53 | ||
63 | #define S5PC100_PA_CFCON (0xE7800000) | 54 | #define S5PC100_PA_IIC0 0xEC100000 |
55 | #define S5PC100_PA_IIC1 0xEC200000 | ||
64 | 56 | ||
65 | /* DMA */ | 57 | #define S5PC100_PA_SPI0 0xEC300000 |
66 | #define S5PC100_PA_MDMA (0xE8100000) | 58 | #define S5PC100_PA_SPI1 0xEC400000 |
67 | #define S5PC100_PA_PDMA0 (0xE9000000) | 59 | #define S5PC100_PA_SPI2 0xEC500000 |
68 | #define S5PC100_PA_PDMA1 (0xE9200000) | ||
69 | 60 | ||
70 | /* Timer */ | 61 | #define S5PC100_PA_USB_HSOTG 0xED200000 |
71 | #define S5PC100_PA_TIMER (0xEA000000) | 62 | #define S5PC100_PA_USB_HSPHY 0xED300000 |
72 | #define S5P_PA_TIMER S5PC100_PA_TIMER | ||
73 | 63 | ||
74 | #define S5PC100_PA_SYSTIMER (0xEA100000) | 64 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
75 | 65 | ||
76 | #define S5PC100_PA_WATCHDOG (0xEA200000) | 66 | #define S5PC100_PA_FB 0xEE000000 |
77 | #define S5PC100_PA_RTC (0xEA300000) | ||
78 | 67 | ||
79 | #define S5PC100_PA_UART (0xEC000000) | 68 | #define S5PC100_PA_FIMC0 0xEE200000 |
69 | #define S5PC100_PA_FIMC1 0xEE300000 | ||
70 | #define S5PC100_PA_FIMC2 0xEE400000 | ||
80 | 71 | ||
81 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) | 72 | #define S5PC100_PA_I2S0 0xF2000000 |
82 | #define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) | 73 | #define S5PC100_PA_I2S1 0xF2100000 |
83 | #define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) | 74 | #define S5PC100_PA_I2S2 0xF2200000 |
84 | #define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
85 | #define S5P_SZ_UART SZ_256 | ||
86 | 75 | ||
87 | #define S5PC100_PA_IIC0 (0xEC100000) | 76 | #define S5PC100_PA_AC97 0xF2300000 |
88 | #define S5PC100_PA_IIC1 (0xEC200000) | ||
89 | 77 | ||
90 | /* SPI */ | 78 | #define S5PC100_PA_PCM0 0xF2400000 |
91 | #define S5PC100_PA_SPI0 0xEC300000 | 79 | #define S5PC100_PA_PCM1 0xF2500000 |
92 | #define S5PC100_PA_SPI1 0xEC400000 | ||
93 | #define S5PC100_PA_SPI2 0xEC500000 | ||
94 | 80 | ||
95 | /* USB HS OTG */ | 81 | #define S5PC100_PA_SPDIF 0xF2600000 |
96 | #define S5PC100_PA_USB_HSOTG (0xED200000) | ||
97 | #define S5PC100_PA_USB_HSPHY (0xED300000) | ||
98 | 82 | ||
99 | #define S5PC100_PA_FB (0xEE000000) | 83 | #define S5PC100_PA_TSADC 0xF3000000 |
100 | 84 | ||
101 | #define S5PC100_PA_FIMC0 (0xEE200000) | 85 | #define S5PC100_PA_KEYPAD 0xF3100000 |
102 | #define S5PC100_PA_FIMC1 (0xEE300000) | ||
103 | #define S5PC100_PA_FIMC2 (0xEE400000) | ||
104 | 86 | ||
105 | #define S5PC100_PA_I2S0 (0xF2000000) | 87 | /* Compatibiltiy Defines */ |
106 | #define S5PC100_PA_I2S1 (0xF2100000) | ||
107 | #define S5PC100_PA_I2S2 (0xF2200000) | ||
108 | 88 | ||
109 | #define S5PC100_PA_AC97 0xF2300000 | 89 | #define S3C_PA_FB S5PC100_PA_FB |
90 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
91 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
92 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
93 | #define S3C_PA_IIC S5PC100_PA_IIC0 | ||
94 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 | ||
95 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
96 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
97 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
98 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
99 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
100 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
101 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
102 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | ||
110 | 103 | ||
111 | /* PCM */ | 104 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
112 | #define S5PC100_PA_PCM0 0xF2400000 | 105 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 |
113 | #define S5PC100_PA_PCM1 0xF2500000 | 106 | #define S5P_PA_FIMC1 S5PC100_PA_FIMC1 |
107 | #define S5P_PA_FIMC2 S5PC100_PA_FIMC2 | ||
108 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM | ||
109 | #define S5P_PA_SROMC S5PC100_PA_SROMC | ||
110 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON | ||
111 | #define S5P_PA_TIMER S5PC100_PA_TIMER | ||
114 | 112 | ||
115 | #define S5PC100_PA_SPDIF 0xF2600000 | 113 | #define SAMSUNG_PA_ADC S5PC100_PA_TSADC |
114 | #define SAMSUNG_PA_CFCON S5PC100_PA_CFCON | ||
115 | #define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD | ||
116 | 116 | ||
117 | #define S5PC100_PA_TSADC (0xF3000000) | 117 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
118 | 118 | ||
119 | /* KEYPAD */ | 119 | #define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M) |
120 | #define S5PC100_PA_KEYPAD (0xF3100000) | ||
121 | 120 | ||
122 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 121 | /* UART */ |
123 | 122 | ||
124 | #define S5PC100_PA_SDRAM (0x20000000) | 123 | #define S3C_PA_UART S5PC100_PA_UART |
125 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM | ||
126 | 124 | ||
127 | /* compatibiltiy defines. */ | 125 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
128 | #define S3C_PA_UART S5PC100_PA_UART | 126 | #define S5P_PA_UART0 S5P_PA_UART(0) |
129 | #define S3C_PA_IIC S5PC100_PA_IIC0 | 127 | #define S5P_PA_UART1 S5P_PA_UART(1) |
130 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 | 128 | #define S5P_PA_UART2 S5P_PA_UART(2) |
131 | #define S3C_PA_FB S5PC100_PA_FB | 129 | #define S5P_PA_UART3 S5P_PA_UART(3) |
132 | #define S3C_PA_G2D S5PC100_PA_G2D | ||
133 | #define S3C_PA_G3D S5PC100_PA_G3D | ||
134 | #define S3C_PA_JPEG S5PC100_PA_JPEG | ||
135 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | ||
136 | #define S5P_VA_VIC0 S5PC1XX_VA_VIC(0) | ||
137 | #define S5P_VA_VIC1 S5PC1XX_VA_VIC(1) | ||
138 | #define S5P_VA_VIC2 S5PC1XX_VA_VIC(2) | ||
139 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
140 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
141 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
142 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
143 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
144 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
145 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | ||
146 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
147 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
148 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
149 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | ||
150 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
151 | |||
152 | #define SAMSUNG_PA_ADC S5PC100_PA_TSADC | ||
153 | #define SAMSUNG_PA_CFCON S5PC100_PA_CFCON | ||
154 | #define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD | ||
155 | 130 | ||
156 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 | 131 | #define S5P_SZ_UART SZ_256 |
157 | #define S5P_PA_FIMC1 S5PC100_PA_FIMC1 | ||
158 | #define S5P_PA_FIMC2 S5PC100_PA_FIMC2 | ||
159 | 132 | ||
160 | #endif /* __ASM_ARCH_C100_MAP_H */ | 133 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 3611492ad681..1dd58836fd4f 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5PV210 - Memory map definitions | 6 | * S5PV210 - Memory map definitions |
@@ -16,122 +16,120 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5PV210_PA_SROM_BANK5 (0xA8000000) | 19 | #define S5PV210_PA_SDRAM 0x20000000 |
20 | 20 | ||
21 | #define S5PC110_PA_ONENAND (0xB0000000) | 21 | #define S5PV210_PA_SROM_BANK5 0xA8000000 |
22 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
23 | 22 | ||
24 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | 23 | #define S5PC110_PA_ONENAND 0xB0000000 |
25 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | 24 | #define S5PC110_PA_ONENAND_DMA 0xB0600000 |
26 | 25 | ||
27 | #define S5PV210_PA_CHIPID (0xE0000000) | 26 | #define S5PV210_PA_CHIPID 0xE0000000 |
28 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | ||
29 | 27 | ||
30 | #define S5PV210_PA_SYSCON (0xE0100000) | 28 | #define S5PV210_PA_SYSCON 0xE0100000 |
31 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
32 | 29 | ||
33 | #define S5PV210_PA_GPIO (0xE0200000) | 30 | #define S5PV210_PA_GPIO 0xE0200000 |
34 | 31 | ||
35 | /* SPI */ | 32 | #define S5PV210_PA_SPDIF 0xE1100000 |
36 | #define S5PV210_PA_SPI0 0xE1300000 | ||
37 | #define S5PV210_PA_SPI1 0xE1400000 | ||
38 | 33 | ||
39 | #define S5PV210_PA_KEYPAD (0xE1600000) | 34 | #define S5PV210_PA_SPI0 0xE1300000 |
35 | #define S5PV210_PA_SPI1 0xE1400000 | ||
40 | 36 | ||
41 | #define S5PV210_PA_IIC0 (0xE1800000) | 37 | #define S5PV210_PA_KEYPAD 0xE1600000 |
42 | #define S5PV210_PA_IIC1 (0xFAB00000) | ||
43 | #define S5PV210_PA_IIC2 (0xE1A00000) | ||
44 | 38 | ||
45 | #define S5PV210_PA_TIMER (0xE2500000) | 39 | #define S5PV210_PA_ADC 0xE1700000 |
46 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
47 | 40 | ||
48 | #define S5PV210_PA_SYSTIMER (0xE2600000) | 41 | #define S5PV210_PA_IIC0 0xE1800000 |
42 | #define S5PV210_PA_IIC1 0xFAB00000 | ||
43 | #define S5PV210_PA_IIC2 0xE1A00000 | ||
49 | 44 | ||
50 | #define S5PV210_PA_WATCHDOG (0xE2700000) | 45 | #define S5PV210_PA_AC97 0xE2200000 |
51 | 46 | ||
52 | #define S5PV210_PA_RTC (0xE2800000) | 47 | #define S5PV210_PA_PCM0 0xE2300000 |
53 | #define S5PV210_PA_UART (0xE2900000) | 48 | #define S5PV210_PA_PCM1 0xE1200000 |
49 | #define S5PV210_PA_PCM2 0xE2B00000 | ||
54 | 50 | ||
55 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 51 | #define S5PV210_PA_TIMER 0xE2500000 |
56 | #define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) | 52 | #define S5PV210_PA_SYSTIMER 0xE2600000 |
57 | #define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) | 53 | #define S5PV210_PA_WATCHDOG 0xE2700000 |
58 | #define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) | 54 | #define S5PV210_PA_RTC 0xE2800000 |
59 | 55 | ||
60 | #define S5P_SZ_UART SZ_256 | 56 | #define S5PV210_PA_UART 0xE2900000 |
61 | 57 | ||
62 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | 58 | #define S5PV210_PA_SROMC 0xE8000000 |
63 | 59 | ||
64 | #define S5PV210_PA_SROMC (0xE8000000) | 60 | #define S5PV210_PA_CFCON 0xE8200000 |
65 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
66 | 61 | ||
67 | #define S5PV210_PA_CFCON (0xE8200000) | 62 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
68 | 63 | ||
69 | #define S5PV210_PA_MDMA 0xFA200000 | 64 | #define S5PV210_PA_HSOTG 0xEC000000 |
70 | #define S5PV210_PA_PDMA0 0xE0900000 | 65 | #define S5PV210_PA_HSPHY 0xEC100000 |
71 | #define S5PV210_PA_PDMA1 0xE0A00000 | ||
72 | 66 | ||
73 | #define S5PV210_PA_FB (0xF8000000) | 67 | #define S5PV210_PA_IIS0 0xEEE30000 |
68 | #define S5PV210_PA_IIS1 0xE2100000 | ||
69 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
74 | 70 | ||
75 | #define S5PV210_PA_FIMC0 (0xFB200000) | 71 | #define S5PV210_PA_DMC0 0xF0000000 |
76 | #define S5PV210_PA_FIMC1 (0xFB300000) | 72 | #define S5PV210_PA_DMC1 0xF1400000 |
77 | #define S5PV210_PA_FIMC2 (0xFB400000) | ||
78 | 73 | ||
79 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | 74 | #define S5PV210_PA_VIC0 0xF2000000 |
75 | #define S5PV210_PA_VIC1 0xF2100000 | ||
76 | #define S5PV210_PA_VIC2 0xF2200000 | ||
77 | #define S5PV210_PA_VIC3 0xF2300000 | ||
80 | 78 | ||
81 | #define S5PV210_PA_HSOTG (0xEC000000) | 79 | #define S5PV210_PA_FB 0xF8000000 |
82 | #define S5PV210_PA_HSPHY (0xEC100000) | ||
83 | 80 | ||
84 | #define S5PV210_PA_VIC0 (0xF2000000) | 81 | #define S5PV210_PA_MDMA 0xFA200000 |
85 | #define S5PV210_PA_VIC1 (0xF2100000) | 82 | #define S5PV210_PA_PDMA0 0xE0900000 |
86 | #define S5PV210_PA_VIC2 (0xF2200000) | 83 | #define S5PV210_PA_PDMA1 0xE0A00000 |
87 | #define S5PV210_PA_VIC3 (0xF2300000) | ||
88 | 84 | ||
89 | #define S5PV210_PA_SDRAM (0x20000000) | 85 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 |
90 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
91 | 86 | ||
92 | /* S/PDIF */ | 87 | #define S5PV210_PA_FIMC0 0xFB200000 |
93 | #define S5PV210_PA_SPDIF 0xE1100000 | 88 | #define S5PV210_PA_FIMC1 0xFB300000 |
89 | #define S5PV210_PA_FIMC2 0xFB400000 | ||
94 | 90 | ||
95 | /* I2S */ | 91 | /* Compatibiltiy Defines */ |
96 | #define S5PV210_PA_IIS0 0xEEE30000 | ||
97 | #define S5PV210_PA_IIS1 0xE2100000 | ||
98 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
99 | 92 | ||
100 | /* PCM */ | 93 | #define S3C_PA_FB S5PV210_PA_FB |
101 | #define S5PV210_PA_PCM0 0xE2300000 | 94 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
102 | #define S5PV210_PA_PCM1 0xE1200000 | 95 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) |
103 | #define S5PV210_PA_PCM2 0xE2B00000 | 96 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) |
97 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
98 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
99 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
100 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
101 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
102 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
103 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
104 | 104 | ||
105 | /* AC97 */ | 105 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
106 | #define S5PV210_PA_AC97 0xE2200000 | 106 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
107 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
108 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
109 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
110 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
111 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | ||
112 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
113 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
114 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
115 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
107 | 116 | ||
108 | #define S5PV210_PA_ADC (0xE1700000) | 117 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
118 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | ||
119 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | ||
109 | 120 | ||
110 | #define S5PV210_PA_DMC0 (0xF0000000) | 121 | /* UART */ |
111 | #define S5PV210_PA_DMC1 (0xF1400000) | ||
112 | 122 | ||
113 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 | 123 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) |
114 | 124 | ||
115 | /* compatibiltiy defines. */ | 125 | #define S3C_PA_UART S5PV210_PA_UART |
116 | #define S3C_PA_UART S5PV210_PA_UART | ||
117 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | ||
118 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | ||
119 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | ||
120 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
121 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
122 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
123 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
124 | #define S3C_PA_FB S5PV210_PA_FB | ||
125 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
126 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
127 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
128 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | ||
129 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
130 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
131 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
132 | 126 | ||
133 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | 127 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
134 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | 128 | #define S5P_PA_UART0 S5P_PA_UART(0) |
135 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | 129 | #define S5P_PA_UART1 S5P_PA_UART(1) |
130 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
131 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
132 | |||
133 | #define S5P_SZ_UART SZ_256 | ||
136 | 134 | ||
137 | #endif /* __ASM_ARCH_MAP_H */ | 135 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 461aa035afc0..557add4fc56c 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -149,7 +149,7 @@ static struct regulator_init_data aquila_ldo2_data = { | |||
149 | 149 | ||
150 | static struct regulator_init_data aquila_ldo3_data = { | 150 | static struct regulator_init_data aquila_ldo3_data = { |
151 | .constraints = { | 151 | .constraints = { |
152 | .name = "VUSB/MIPI_1.1V", | 152 | .name = "VUSB+MIPI_1.1V", |
153 | .min_uV = 1100000, | 153 | .min_uV = 1100000, |
154 | .max_uV = 1100000, | 154 | .max_uV = 1100000, |
155 | .apply_uV = 1, | 155 | .apply_uV = 1, |
@@ -197,7 +197,7 @@ static struct regulator_init_data aquila_ldo7_data = { | |||
197 | 197 | ||
198 | static struct regulator_init_data aquila_ldo8_data = { | 198 | static struct regulator_init_data aquila_ldo8_data = { |
199 | .constraints = { | 199 | .constraints = { |
200 | .name = "VUSB/VADC_3.3V", | 200 | .name = "VUSB+VADC_3.3V", |
201 | .min_uV = 3300000, | 201 | .min_uV = 3300000, |
202 | .max_uV = 3300000, | 202 | .max_uV = 3300000, |
203 | .apply_uV = 1, | 203 | .apply_uV = 1, |
@@ -207,7 +207,7 @@ static struct regulator_init_data aquila_ldo8_data = { | |||
207 | 207 | ||
208 | static struct regulator_init_data aquila_ldo9_data = { | 208 | static struct regulator_init_data aquila_ldo9_data = { |
209 | .constraints = { | 209 | .constraints = { |
210 | .name = "VCC/VCAM_2.8V", | 210 | .name = "VCC+VCAM_2.8V", |
211 | .min_uV = 2800000, | 211 | .min_uV = 2800000, |
212 | .max_uV = 2800000, | 212 | .max_uV = 2800000, |
213 | .apply_uV = 1, | 213 | .apply_uV = 1, |
@@ -381,9 +381,12 @@ static struct max8998_platform_data aquila_max8998_pdata = { | |||
381 | .buck1_set1 = S5PV210_GPH0(3), | 381 | .buck1_set1 = S5PV210_GPH0(3), |
382 | .buck1_set2 = S5PV210_GPH0(4), | 382 | .buck1_set2 = S5PV210_GPH0(4), |
383 | .buck2_set3 = S5PV210_GPH0(5), | 383 | .buck2_set3 = S5PV210_GPH0(5), |
384 | .buck1_max_voltage1 = 1200000, | 384 | .buck1_voltage1 = 1200000, |
385 | .buck1_max_voltage2 = 1200000, | 385 | .buck1_voltage2 = 1200000, |
386 | .buck2_max_voltage = 1200000, | 386 | .buck1_voltage3 = 1200000, |
387 | .buck1_voltage4 = 1200000, | ||
388 | .buck2_voltage1 = 1200000, | ||
389 | .buck2_voltage2 = 1200000, | ||
387 | }; | 390 | }; |
388 | #endif | 391 | #endif |
389 | 392 | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index e22d5112fd44..056f5c769b0a 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -288,7 +288,7 @@ static struct regulator_init_data goni_ldo2_data = { | |||
288 | 288 | ||
289 | static struct regulator_init_data goni_ldo3_data = { | 289 | static struct regulator_init_data goni_ldo3_data = { |
290 | .constraints = { | 290 | .constraints = { |
291 | .name = "VUSB/MIPI_1.1V", | 291 | .name = "VUSB+MIPI_1.1V", |
292 | .min_uV = 1100000, | 292 | .min_uV = 1100000, |
293 | .max_uV = 1100000, | 293 | .max_uV = 1100000, |
294 | .apply_uV = 1, | 294 | .apply_uV = 1, |
@@ -337,7 +337,7 @@ static struct regulator_init_data goni_ldo7_data = { | |||
337 | 337 | ||
338 | static struct regulator_init_data goni_ldo8_data = { | 338 | static struct regulator_init_data goni_ldo8_data = { |
339 | .constraints = { | 339 | .constraints = { |
340 | .name = "VUSB/VADC_3.3V", | 340 | .name = "VUSB+VADC_3.3V", |
341 | .min_uV = 3300000, | 341 | .min_uV = 3300000, |
342 | .max_uV = 3300000, | 342 | .max_uV = 3300000, |
343 | .apply_uV = 1, | 343 | .apply_uV = 1, |
@@ -347,7 +347,7 @@ static struct regulator_init_data goni_ldo8_data = { | |||
347 | 347 | ||
348 | static struct regulator_init_data goni_ldo9_data = { | 348 | static struct regulator_init_data goni_ldo9_data = { |
349 | .constraints = { | 349 | .constraints = { |
350 | .name = "VCC/VCAM_2.8V", | 350 | .name = "VCC+VCAM_2.8V", |
351 | .min_uV = 2800000, | 351 | .min_uV = 2800000, |
352 | .max_uV = 2800000, | 352 | .max_uV = 2800000, |
353 | .apply_uV = 1, | 353 | .apply_uV = 1, |
@@ -521,9 +521,12 @@ static struct max8998_platform_data goni_max8998_pdata = { | |||
521 | .buck1_set1 = S5PV210_GPH0(3), | 521 | .buck1_set1 = S5PV210_GPH0(3), |
522 | .buck1_set2 = S5PV210_GPH0(4), | 522 | .buck1_set2 = S5PV210_GPH0(4), |
523 | .buck2_set3 = S5PV210_GPH0(5), | 523 | .buck2_set3 = S5PV210_GPH0(5), |
524 | .buck1_max_voltage1 = 1200000, | 524 | .buck1_voltage1 = 1200000, |
525 | .buck1_max_voltage2 = 1200000, | 525 | .buck1_voltage2 = 1200000, |
526 | .buck2_max_voltage = 1200000, | 526 | .buck1_voltage3 = 1200000, |
527 | .buck1_voltage4 = 1200000, | ||
528 | .buck2_voltage1 = 1200000, | ||
529 | .buck2_voltage2 = 1200000, | ||
527 | }; | 530 | }; |
528 | #endif | 531 | #endif |
529 | 532 | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 3060f78e12ab..901657fa7a12 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5PV310 - Memory map definitions | 6 | * S5PV310 - Memory map definitions |
@@ -23,90 +23,43 @@ | |||
23 | 23 | ||
24 | #include <plat/map-s5p.h> | 24 | #include <plat/map-s5p.h> |
25 | 25 | ||
26 | #define S5PV310_PA_SYSRAM (0x02025000) | 26 | #define S5PV310_PA_SYSRAM 0x02025000 |
27 | 27 | ||
28 | #define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) | 28 | #define S5PV310_PA_I2S0 0x03830000 |
29 | 29 | #define S5PV310_PA_I2S1 0xE3100000 | |
30 | #define S5PC210_PA_ONENAND (0x0C000000) | 30 | #define S5PV310_PA_I2S2 0xE2A00000 |
31 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | ||
32 | |||
33 | #define S5PC210_PA_ONENAND_DMA (0x0C600000) | ||
34 | #define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA | ||
35 | |||
36 | #define S5PV310_PA_CHIPID (0x10000000) | ||
37 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | ||
38 | |||
39 | #define S5PV310_PA_SYSCON (0x10010000) | ||
40 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | ||
41 | 31 | ||
42 | #define S5PV310_PA_PMU (0x10020000) | 32 | #define S5PV310_PA_PCM0 0x03840000 |
33 | #define S5PV310_PA_PCM1 0x13980000 | ||
34 | #define S5PV310_PA_PCM2 0x13990000 | ||
43 | 35 | ||
44 | #define S5PV310_PA_CMU (0x10030000) | 36 | #define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) |
45 | |||
46 | #define S5PV310_PA_WATCHDOG (0x10060000) | ||
47 | #define S5PV310_PA_RTC (0x10070000) | ||
48 | |||
49 | #define S5PV310_PA_DMC0 (0x10400000) | ||
50 | |||
51 | #define S5PV310_PA_COMBINER (0x10448000) | ||
52 | |||
53 | #define S5PV310_PA_COREPERI (0x10500000) | ||
54 | #define S5PV310_PA_GIC_CPU (0x10500100) | ||
55 | #define S5PV310_PA_TWD (0x10500600) | ||
56 | #define S5PV310_PA_GIC_DIST (0x10501000) | ||
57 | #define S5PV310_PA_L2CC (0x10502000) | ||
58 | |||
59 | /* DMA */ | ||
60 | #define S5PV310_PA_MDMA 0x10810000 | ||
61 | #define S5PV310_PA_PDMA0 0x12680000 | ||
62 | #define S5PV310_PA_PDMA1 0x12690000 | ||
63 | |||
64 | #define S5PV310_PA_GPIO1 (0x11400000) | ||
65 | #define S5PV310_PA_GPIO2 (0x11000000) | ||
66 | #define S5PV310_PA_GPIO3 (0x03860000) | ||
67 | |||
68 | #define S5PV310_PA_MIPI_CSIS0 0x11880000 | ||
69 | #define S5PV310_PA_MIPI_CSIS1 0x11890000 | ||
70 | 37 | ||
71 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | 38 | #define S5PC210_PA_ONENAND 0x0C000000 |
39 | #define S5PC210_PA_ONENAND_DMA 0x0C600000 | ||
72 | 40 | ||
73 | #define S5PV310_PA_SROMC (0x12570000) | 41 | #define S5PV310_PA_CHIPID 0x10000000 |
74 | #define S5P_PA_SROMC S5PV310_PA_SROMC | ||
75 | 42 | ||
76 | /* S/PDIF */ | 43 | #define S5PV310_PA_SYSCON 0x10010000 |
77 | #define S5PV310_PA_SPDIF 0xE1100000 | 44 | #define S5PV310_PA_PMU 0x10020000 |
45 | #define S5PV310_PA_CMU 0x10030000 | ||
78 | 46 | ||
79 | /* I2S */ | 47 | #define S5PV310_PA_WATCHDOG 0x10060000 |
80 | #define S5PV310_PA_I2S0 0x03830000 | 48 | #define S5PV310_PA_RTC 0x10070000 |
81 | #define S5PV310_PA_I2S1 0xE3100000 | ||
82 | #define S5PV310_PA_I2S2 0xE2A00000 | ||
83 | 49 | ||
84 | /* PCM */ | 50 | #define S5PV310_PA_DMC0 0x10400000 |
85 | #define S5PV310_PA_PCM0 0x03840000 | ||
86 | #define S5PV310_PA_PCM1 0x13980000 | ||
87 | #define S5PV310_PA_PCM2 0x13990000 | ||
88 | 51 | ||
89 | /* AC97 */ | 52 | #define S5PV310_PA_COMBINER 0x10448000 |
90 | #define S5PV310_PA_AC97 0x139A0000 | ||
91 | 53 | ||
92 | #define S5PV310_PA_UART (0x13800000) | 54 | #define S5PV310_PA_COREPERI 0x10500000 |
55 | #define S5PV310_PA_GIC_CPU 0x10500100 | ||
56 | #define S5PV310_PA_TWD 0x10500600 | ||
57 | #define S5PV310_PA_GIC_DIST 0x10501000 | ||
58 | #define S5PV310_PA_L2CC 0x10502000 | ||
93 | 59 | ||
94 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) | 60 | #define S5PV310_PA_MDMA 0x10810000 |
95 | #define S5P_PA_UART0 S5P_PA_UART(0) | 61 | #define S5PV310_PA_PDMA0 0x12680000 |
96 | #define S5P_PA_UART1 S5P_PA_UART(1) | 62 | #define S5PV310_PA_PDMA1 0x12690000 |
97 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
98 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
99 | #define S5P_PA_UART4 S5P_PA_UART(4) | ||
100 | |||
101 | #define S5P_SZ_UART SZ_256 | ||
102 | |||
103 | #define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) | ||
104 | |||
105 | #define S5PV310_PA_TIMER (0x139D0000) | ||
106 | #define S5P_PA_TIMER S5PV310_PA_TIMER | ||
107 | |||
108 | #define S5PV310_PA_SDRAM (0x40000000) | ||
109 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | ||
110 | 63 | ||
111 | #define S5PV310_PA_SYSMMU_MDMA 0x10A40000 | 64 | #define S5PV310_PA_SYSMMU_MDMA 0x10A40000 |
112 | #define S5PV310_PA_SYSMMU_SSS 0x10A50000 | 65 | #define S5PV310_PA_SYSMMU_SSS 0x10A50000 |
@@ -125,8 +78,31 @@ | |||
125 | #define S5PV310_PA_SYSMMU_MFC_L 0x13620000 | 78 | #define S5PV310_PA_SYSMMU_MFC_L 0x13620000 |
126 | #define S5PV310_PA_SYSMMU_MFC_R 0x13630000 | 79 | #define S5PV310_PA_SYSMMU_MFC_R 0x13630000 |
127 | 80 | ||
128 | /* compatibiltiy defines. */ | 81 | #define S5PV310_PA_GPIO1 0x11400000 |
129 | #define S3C_PA_UART S5PV310_PA_UART | 82 | #define S5PV310_PA_GPIO2 0x11000000 |
83 | #define S5PV310_PA_GPIO3 0x03860000 | ||
84 | |||
85 | #define S5PV310_PA_MIPI_CSIS0 0x11880000 | ||
86 | #define S5PV310_PA_MIPI_CSIS1 0x11890000 | ||
87 | |||
88 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | ||
89 | |||
90 | #define S5PV310_PA_SROMC 0x12570000 | ||
91 | |||
92 | #define S5PV310_PA_UART 0x13800000 | ||
93 | |||
94 | #define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) | ||
95 | |||
96 | #define S5PV310_PA_AC97 0x139A0000 | ||
97 | |||
98 | #define S5PV310_PA_TIMER 0x139D0000 | ||
99 | |||
100 | #define S5PV310_PA_SDRAM 0x40000000 | ||
101 | |||
102 | #define S5PV310_PA_SPDIF 0xE1100000 | ||
103 | |||
104 | /* Compatibiltiy Defines */ | ||
105 | |||
130 | #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) | 106 | #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) |
131 | #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) | 107 | #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) |
132 | #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) | 108 | #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) |
@@ -141,7 +117,28 @@ | |||
141 | #define S3C_PA_IIC7 S5PV310_PA_IIC(7) | 117 | #define S3C_PA_IIC7 S5PV310_PA_IIC(7) |
142 | #define S3C_PA_RTC S5PV310_PA_RTC | 118 | #define S3C_PA_RTC S5PV310_PA_RTC |
143 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG | 119 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG |
120 | |||
121 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | ||
144 | #define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 | 122 | #define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 |
145 | #define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 | 123 | #define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 |
124 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | ||
125 | #define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA | ||
126 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | ||
127 | #define S5P_PA_SROMC S5PV310_PA_SROMC | ||
128 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | ||
129 | #define S5P_PA_TIMER S5PV310_PA_TIMER | ||
130 | |||
131 | /* UART */ | ||
132 | |||
133 | #define S3C_PA_UART S5PV310_PA_UART | ||
134 | |||
135 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
136 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
137 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
138 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
139 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
140 | #define S5P_PA_UART4 S5P_PA_UART(4) | ||
141 | |||
142 | #define S5P_SZ_UART SZ_256 | ||
146 | 143 | ||
147 | #endif /* __ASM_ARCH_MAP_H */ | 144 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h index cacf17a958cd..53677e464d4b 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear320.h +++ b/arch/arm/mach-spear3xx/include/mach/spear320.h | |||
@@ -62,7 +62,7 @@ | |||
62 | #define SPEAR320_SMII1_BASE 0xAB000000 | 62 | #define SPEAR320_SMII1_BASE 0xAB000000 |
63 | #define SPEAR320_SMII1_SIZE 0x01000000 | 63 | #define SPEAR320_SMII1_SIZE 0x01000000 |
64 | 64 | ||
65 | #define SPEAR320_SOC_CONFIG_BASE 0xB4000000 | 65 | #define SPEAR320_SOC_CONFIG_BASE 0xB3000000 |
66 | #define SPEAR320_SOC_CONFIG_SIZE 0x00000070 | 66 | #define SPEAR320_SOC_CONFIG_SIZE 0x00000070 |
67 | /* Interrupt registers offsets and masks */ | 67 | /* Interrupt registers offsets and masks */ |
68 | #define INT_STS_MASK_REG 0x04 | 68 | #define INT_STS_MASK_REG 0x04 |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 170c9bb95866..f2ce38e085d2 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -49,7 +49,13 @@ static inline void cache_wait(void __iomem *reg, unsigned long mask) | |||
49 | static inline void cache_sync(void) | 49 | static inline void cache_sync(void) |
50 | { | 50 | { |
51 | void __iomem *base = l2x0_base; | 51 | void __iomem *base = l2x0_base; |
52 | |||
53 | #ifdef CONFIG_ARM_ERRATA_753970 | ||
54 | /* write to an unmmapped register */ | ||
55 | writel_relaxed(0, base + L2X0_DUMMY_REG); | ||
56 | #else | ||
52 | writel_relaxed(0, base + L2X0_CACHE_SYNC); | 57 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
58 | #endif | ||
53 | cache_wait(base + L2X0_CACHE_SYNC, 1); | 59 | cache_wait(base + L2X0_CACHE_SYNC, 1); |
54 | } | 60 | } |
55 | 61 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0c1172b56b4e..8e3356239136 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -264,6 +264,12 @@ __v7_setup: | |||
264 | orreq r10, r10, #1 << 6 @ set bit #6 | 264 | orreq r10, r10, #1 << 6 @ set bit #6 |
265 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 265 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
266 | #endif | 266 | #endif |
267 | #ifdef CONFIG_ARM_ERRATA_751472 | ||
268 | cmp r6, #0x30 @ present prior to r3p0 | ||
269 | mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register | ||
270 | orrlt r10, r10, #1 << 11 @ set bit #11 | ||
271 | mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register | ||
272 | #endif | ||
267 | 273 | ||
268 | 3: mov r10, #0 | 274 | 3: mov r10, #0 |
269 | #ifdef HARVARD_CACHE | 275 | #ifdef HARVARD_CACHE |
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c index 6a7342886171..afaf87fdb93e 100644 --- a/arch/arm/plat-s5p/dev-uart.c +++ b/arch/arm/plat-s5p/dev-uart.c | |||
@@ -28,7 +28,7 @@ | |||
28 | static struct resource s5p_uart0_resource[] = { | 28 | static struct resource s5p_uart0_resource[] = { |
29 | [0] = { | 29 | [0] = { |
30 | .start = S5P_PA_UART0, | 30 | .start = S5P_PA_UART0, |
31 | .end = S5P_PA_UART0 + S5P_SZ_UART, | 31 | .end = S5P_PA_UART0 + S5P_SZ_UART - 1, |
32 | .flags = IORESOURCE_MEM, | 32 | .flags = IORESOURCE_MEM, |
33 | }, | 33 | }, |
34 | [1] = { | 34 | [1] = { |
@@ -51,7 +51,7 @@ static struct resource s5p_uart0_resource[] = { | |||
51 | static struct resource s5p_uart1_resource[] = { | 51 | static struct resource s5p_uart1_resource[] = { |
52 | [0] = { | 52 | [0] = { |
53 | .start = S5P_PA_UART1, | 53 | .start = S5P_PA_UART1, |
54 | .end = S5P_PA_UART1 + S5P_SZ_UART, | 54 | .end = S5P_PA_UART1 + S5P_SZ_UART - 1, |
55 | .flags = IORESOURCE_MEM, | 55 | .flags = IORESOURCE_MEM, |
56 | }, | 56 | }, |
57 | [1] = { | 57 | [1] = { |
@@ -74,7 +74,7 @@ static struct resource s5p_uart1_resource[] = { | |||
74 | static struct resource s5p_uart2_resource[] = { | 74 | static struct resource s5p_uart2_resource[] = { |
75 | [0] = { | 75 | [0] = { |
76 | .start = S5P_PA_UART2, | 76 | .start = S5P_PA_UART2, |
77 | .end = S5P_PA_UART2 + S5P_SZ_UART, | 77 | .end = S5P_PA_UART2 + S5P_SZ_UART - 1, |
78 | .flags = IORESOURCE_MEM, | 78 | .flags = IORESOURCE_MEM, |
79 | }, | 79 | }, |
80 | [1] = { | 80 | [1] = { |
@@ -98,7 +98,7 @@ static struct resource s5p_uart3_resource[] = { | |||
98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 | 98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 |
99 | [0] = { | 99 | [0] = { |
100 | .start = S5P_PA_UART3, | 100 | .start = S5P_PA_UART3, |
101 | .end = S5P_PA_UART3 + S5P_SZ_UART, | 101 | .end = S5P_PA_UART3 + S5P_SZ_UART - 1, |
102 | .flags = IORESOURCE_MEM, | 102 | .flags = IORESOURCE_MEM, |
103 | }, | 103 | }, |
104 | [1] = { | 104 | [1] = { |
@@ -123,7 +123,7 @@ static struct resource s5p_uart4_resource[] = { | |||
123 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | 123 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 |
124 | [0] = { | 124 | [0] = { |
125 | .start = S5P_PA_UART4, | 125 | .start = S5P_PA_UART4, |
126 | .end = S5P_PA_UART4 + S5P_SZ_UART, | 126 | .end = S5P_PA_UART4 + S5P_SZ_UART - 1, |
127 | .flags = IORESOURCE_MEM, | 127 | .flags = IORESOURCE_MEM, |
128 | }, | 128 | }, |
129 | [1] = { | 129 | [1] = { |
@@ -148,7 +148,7 @@ static struct resource s5p_uart5_resource[] = { | |||
148 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | 148 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 |
149 | [0] = { | 149 | [0] = { |
150 | .start = S5P_PA_UART5, | 150 | .start = S5P_PA_UART5, |
151 | .end = S5P_PA_UART5 + S5P_SZ_UART, | 151 | .end = S5P_PA_UART5 + S5P_SZ_UART - 1, |
152 | .flags = IORESOURCE_MEM, | 152 | .flags = IORESOURCE_MEM, |
153 | }, | 153 | }, |
154 | [1] = { | 154 | [1] = { |
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c index 236ef8427d7d..3e4bd8147bf4 100644 --- a/arch/arm/plat-samsung/dev-ts.c +++ b/arch/arm/plat-samsung/dev-ts.c | |||
@@ -58,4 +58,3 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |||
58 | 58 | ||
59 | s3c_device_ts.dev.platform_data = npd; | 59 | s3c_device_ts.dev.platform_data = npd; |
60 | } | 60 | } |
61 | EXPORT_SYMBOL(s3c24xx_ts_set_platdata); | ||
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h index 99ba6789cc97..6dd455bafdfd 100644 --- a/arch/arm/plat-spear/include/plat/uncompress.h +++ b/arch/arm/plat-spear/include/plat/uncompress.h | |||
@@ -24,10 +24,10 @@ static inline void putc(int c) | |||
24 | { | 24 | { |
25 | void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; | 25 | void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; |
26 | 26 | ||
27 | while (readl(base + UART01x_FR) & UART01x_FR_TXFF) | 27 | while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF) |
28 | barrier(); | 28 | barrier(); |
29 | 29 | ||
30 | writel(c, base + UART01x_DR); | 30 | writel_relaxed(c, base + UART01x_DR); |
31 | } | 31 | } |
32 | 32 | ||
33 | static inline void flush(void) | 33 | static inline void flush(void) |
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h index 09e9372aea21..8c8b24d07046 100644 --- a/arch/arm/plat-spear/include/plat/vmalloc.h +++ b/arch/arm/plat-spear/include/plat/vmalloc.h | |||
@@ -14,6 +14,6 @@ | |||
14 | #ifndef __PLAT_VMALLOC_H | 14 | #ifndef __PLAT_VMALLOC_H |
15 | #define __PLAT_VMALLOC_H | 15 | #define __PLAT_VMALLOC_H |
16 | 16 | ||
17 | #define VMALLOC_END 0xF0000000 | 17 | #define VMALLOC_END 0xF0000000UL |
18 | 18 | ||
19 | #endif /* __PLAT_VMALLOC_H */ | 19 | #endif /* __PLAT_VMALLOC_H */ |
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c index 0851eb1e919e..2751b3a8a66f 100644 --- a/arch/s390/boot/compressed/misc.c +++ b/arch/s390/boot/compressed/misc.c | |||
@@ -133,11 +133,12 @@ unsigned long decompress_kernel(void) | |||
133 | unsigned long output_addr; | 133 | unsigned long output_addr; |
134 | unsigned char *output; | 134 | unsigned char *output; |
135 | 135 | ||
136 | check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start); | 136 | output_addr = ((unsigned long) &_end + HEAP_SIZE + 4095UL) & -4096UL; |
137 | check_ipl_parmblock((void *) 0, output_addr + SZ__bss_start); | ||
137 | memset(&_bss, 0, &_ebss - &_bss); | 138 | memset(&_bss, 0, &_ebss - &_bss); |
138 | free_mem_ptr = (unsigned long)&_end; | 139 | free_mem_ptr = (unsigned long)&_end; |
139 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; | 140 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; |
140 | output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL); | 141 | output = (unsigned char *) output_addr; |
141 | 142 | ||
142 | #ifdef CONFIG_BLK_DEV_INITRD | 143 | #ifdef CONFIG_BLK_DEV_INITRD |
143 | /* | 144 | /* |
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 76daea117181..5c5ba10384c2 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h | |||
@@ -36,14 +36,19 @@ | |||
36 | 36 | ||
37 | static inline int atomic_read(const atomic_t *v) | 37 | static inline int atomic_read(const atomic_t *v) |
38 | { | 38 | { |
39 | barrier(); | 39 | int c; |
40 | return v->counter; | 40 | |
41 | asm volatile( | ||
42 | " l %0,%1\n" | ||
43 | : "=d" (c) : "Q" (v->counter)); | ||
44 | return c; | ||
41 | } | 45 | } |
42 | 46 | ||
43 | static inline void atomic_set(atomic_t *v, int i) | 47 | static inline void atomic_set(atomic_t *v, int i) |
44 | { | 48 | { |
45 | v->counter = i; | 49 | asm volatile( |
46 | barrier(); | 50 | " st %1,%0\n" |
51 | : "=Q" (v->counter) : "d" (i)); | ||
47 | } | 52 | } |
48 | 53 | ||
49 | static inline int atomic_add_return(int i, atomic_t *v) | 54 | static inline int atomic_add_return(int i, atomic_t *v) |
@@ -128,14 +133,19 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) | |||
128 | 133 | ||
129 | static inline long long atomic64_read(const atomic64_t *v) | 134 | static inline long long atomic64_read(const atomic64_t *v) |
130 | { | 135 | { |
131 | barrier(); | 136 | long long c; |
132 | return v->counter; | 137 | |
138 | asm volatile( | ||
139 | " lg %0,%1\n" | ||
140 | : "=d" (c) : "Q" (v->counter)); | ||
141 | return c; | ||
133 | } | 142 | } |
134 | 143 | ||
135 | static inline void atomic64_set(atomic64_t *v, long long i) | 144 | static inline void atomic64_set(atomic64_t *v, long long i) |
136 | { | 145 | { |
137 | v->counter = i; | 146 | asm volatile( |
138 | barrier(); | 147 | " stg %1,%0\n" |
148 | : "=Q" (v->counter) : "d" (i)); | ||
139 | } | 149 | } |
140 | 150 | ||
141 | static inline long long atomic64_add_return(long long i, atomic64_t *v) | 151 | static inline long long atomic64_add_return(long long i, atomic64_t *v) |
diff --git a/arch/s390/include/asm/cache.h b/arch/s390/include/asm/cache.h index 24aafa68b643..2a30d5ac0667 100644 --- a/arch/s390/include/asm/cache.h +++ b/arch/s390/include/asm/cache.h | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #define L1_CACHE_BYTES 256 | 14 | #define L1_CACHE_BYTES 256 |
15 | #define L1_CACHE_SHIFT 8 | 15 | #define L1_CACHE_SHIFT 8 |
16 | #define NET_SKB_PAD 32 | ||
16 | 17 | ||
17 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) | 18 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
18 | 19 | ||
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index e2f6a99f14ab..cc29086e30cd 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #define ARCH_P4_CNTRVAL_BITS (40) | 23 | #define ARCH_P4_CNTRVAL_BITS (40) |
24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) | 24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) |
25 | #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1)) | ||
25 | 26 | ||
26 | #define P4_ESCR_EVENT_MASK 0x7e000000U | 27 | #define P4_ESCR_EVENT_MASK 0x7e000000U |
27 | #define P4_ESCR_EVENT_SHIFT 25 | 28 | #define P4_ESCR_EVENT_SHIFT 25 |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index f7a0993c1e7c..ff751a9f182b 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | |||
770 | return 1; | 770 | return 1; |
771 | } | 771 | } |
772 | 772 | ||
773 | /* it might be unflagged overflow */ | 773 | /* |
774 | rdmsrl(hwc->event_base + hwc->idx, v); | 774 | * In some circumstances the overflow might issue an NMI but did |
775 | if (!(v & ARCH_P4_CNTRVAL_MASK)) | 775 | * not set P4_CCCR_OVF bit. Because a counter holds a negative value |
776 | * we simply check for high bit being set, if it's cleared it means | ||
777 | * the counter has reached zero value and continued counting before | ||
778 | * real NMI signal was received: | ||
779 | */ | ||
780 | if (!(v & ARCH_P4_UNFLAGGED_BIT)) | ||
776 | return 1; | 781 | return 1; |
777 | 782 | ||
778 | return 0; | 783 | return 0; |
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index faf5a2c65926..36e0fa161c2b 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c | |||
@@ -577,11 +577,9 @@ duration: | |||
577 | if (rc) | 577 | if (rc) |
578 | return; | 578 | return; |
579 | 579 | ||
580 | if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 || | 580 | if (be32_to_cpu(tpm_cmd.header.out.return_code) |
581 | be32_to_cpu(tpm_cmd.header.out.length) | 581 | != 3 * sizeof(u32)) |
582 | != sizeof(tpm_cmd.header.out) + sizeof(u32) + 3 * sizeof(u32)) | ||
583 | return; | 582 | return; |
584 | |||
585 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; | 583 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; |
586 | chip->vendor.duration[TPM_SHORT] = | 584 | chip->vendor.duration[TPM_SHORT] = |
587 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); | 585 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); |
@@ -941,18 +939,6 @@ ssize_t tpm_show_caps_1_2(struct device * dev, | |||
941 | } | 939 | } |
942 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); | 940 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); |
943 | 941 | ||
944 | ssize_t tpm_show_timeouts(struct device *dev, struct device_attribute *attr, | ||
945 | char *buf) | ||
946 | { | ||
947 | struct tpm_chip *chip = dev_get_drvdata(dev); | ||
948 | |||
949 | return sprintf(buf, "%d %d %d\n", | ||
950 | jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]), | ||
951 | jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]), | ||
952 | jiffies_to_usecs(chip->vendor.duration[TPM_LONG])); | ||
953 | } | ||
954 | EXPORT_SYMBOL_GPL(tpm_show_timeouts); | ||
955 | |||
956 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, | 942 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, |
957 | const char *buf, size_t count) | 943 | const char *buf, size_t count) |
958 | { | 944 | { |
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index d84ff772c26f..72ddb031b69a 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h | |||
@@ -56,8 +56,6 @@ extern ssize_t tpm_show_owned(struct device *, struct device_attribute *attr, | |||
56 | char *); | 56 | char *); |
57 | extern ssize_t tpm_show_temp_deactivated(struct device *, | 57 | extern ssize_t tpm_show_temp_deactivated(struct device *, |
58 | struct device_attribute *attr, char *); | 58 | struct device_attribute *attr, char *); |
59 | extern ssize_t tpm_show_timeouts(struct device *, | ||
60 | struct device_attribute *attr, char *); | ||
61 | 59 | ||
62 | struct tpm_chip; | 60 | struct tpm_chip; |
63 | 61 | ||
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index 0d1d38e5f266..dd21df55689d 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c | |||
@@ -376,7 +376,6 @@ static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, | |||
376 | NULL); | 376 | NULL); |
377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); | 377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); |
378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); | 378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); |
379 | static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); | ||
380 | 379 | ||
381 | static struct attribute *tis_attrs[] = { | 380 | static struct attribute *tis_attrs[] = { |
382 | &dev_attr_pubek.attr, | 381 | &dev_attr_pubek.attr, |
@@ -386,8 +385,7 @@ static struct attribute *tis_attrs[] = { | |||
386 | &dev_attr_owned.attr, | 385 | &dev_attr_owned.attr, |
387 | &dev_attr_temp_deactivated.attr, | 386 | &dev_attr_temp_deactivated.attr, |
388 | &dev_attr_caps.attr, | 387 | &dev_attr_caps.attr, |
389 | &dev_attr_cancel.attr, | 388 | &dev_attr_cancel.attr, NULL, |
390 | &dev_attr_timeouts.attr, NULL, | ||
391 | }; | 389 | }; |
392 | 390 | ||
393 | static struct attribute_group tis_attr_grp = { | 391 | static struct attribute_group tis_attr_grp = { |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 15d94c63918c..729d4233b763 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -1553,17 +1553,7 @@ | |||
1553 | 1553 | ||
1554 | /* Backlight control */ | 1554 | /* Backlight control */ |
1555 | #define BLC_PWM_CTL 0x61254 | 1555 | #define BLC_PWM_CTL 0x61254 |
1556 | #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) | ||
1557 | #define BLC_PWM_CTL2 0x61250 /* 965+ only */ | 1556 | #define BLC_PWM_CTL2 0x61250 /* 965+ only */ |
1558 | #define BLM_COMBINATION_MODE (1 << 30) | ||
1559 | /* | ||
1560 | * This is the most significant 15 bits of the number of backlight cycles in a | ||
1561 | * complete cycle of the modulated backlight control. | ||
1562 | * | ||
1563 | * The actual value is this field multiplied by two. | ||
1564 | */ | ||
1565 | #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) | ||
1566 | #define BLM_LEGACY_MODE (1 << 16) | ||
1567 | /* | 1557 | /* |
1568 | * This is the number of cycles out of the backlight modulation cycle for which | 1558 | * This is the number of cycles out of the backlight modulation cycle for which |
1569 | * the backlight is on. | 1559 | * the backlight is on. |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index c65992df458d..d860abeda70f 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -30,8 +30,6 @@ | |||
30 | 30 | ||
31 | #include "intel_drv.h" | 31 | #include "intel_drv.h" |
32 | 32 | ||
33 | #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ | ||
34 | |||
35 | void | 33 | void |
36 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, | 34 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
37 | struct drm_display_mode *adjusted_mode) | 35 | struct drm_display_mode *adjusted_mode) |
@@ -112,19 +110,6 @@ done: | |||
112 | dev_priv->pch_pf_size = (width << 16) | height; | 110 | dev_priv->pch_pf_size = (width << 16) | height; |
113 | } | 111 | } |
114 | 112 | ||
115 | static int is_backlight_combination_mode(struct drm_device *dev) | ||
116 | { | ||
117 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
118 | |||
119 | if (INTEL_INFO(dev)->gen >= 4) | ||
120 | return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; | ||
121 | |||
122 | if (IS_GEN2(dev)) | ||
123 | return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; | ||
124 | |||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) | 113 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) |
129 | { | 114 | { |
130 | u32 val; | 115 | u32 val; |
@@ -181,9 +166,6 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev) | |||
181 | if (INTEL_INFO(dev)->gen < 4) | 166 | if (INTEL_INFO(dev)->gen < 4) |
182 | max &= ~1; | 167 | max &= ~1; |
183 | } | 168 | } |
184 | |||
185 | if (is_backlight_combination_mode(dev)) | ||
186 | max *= 0xff; | ||
187 | } | 169 | } |
188 | 170 | ||
189 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); | 171 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); |
@@ -201,15 +183,6 @@ u32 intel_panel_get_backlight(struct drm_device *dev) | |||
201 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | 183 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
202 | if (IS_PINEVIEW(dev)) | 184 | if (IS_PINEVIEW(dev)) |
203 | val >>= 1; | 185 | val >>= 1; |
204 | |||
205 | if (is_backlight_combination_mode(dev)){ | ||
206 | u8 lbpc; | ||
207 | |||
208 | val &= ~1; | ||
209 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); | ||
210 | val *= lbpc; | ||
211 | val >>= 1; | ||
212 | } | ||
213 | } | 186 | } |
214 | 187 | ||
215 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); | 188 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
@@ -232,16 +205,6 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level) | |||
232 | 205 | ||
233 | if (HAS_PCH_SPLIT(dev)) | 206 | if (HAS_PCH_SPLIT(dev)) |
234 | return intel_pch_panel_set_backlight(dev, level); | 207 | return intel_pch_panel_set_backlight(dev, level); |
235 | |||
236 | if (is_backlight_combination_mode(dev)){ | ||
237 | u32 max = intel_panel_get_max_backlight(dev); | ||
238 | u8 lpbc; | ||
239 | |||
240 | lpbc = level * 0xfe / max + 1; | ||
241 | level /= lpbc; | ||
242 | pci_write_config_byte(dev->pdev, PCI_LBPC, lpbc); | ||
243 | } | ||
244 | |||
245 | tmp = I915_READ(BLC_PWM_CTL); | 208 | tmp = I915_READ(BLC_PWM_CTL); |
246 | if (IS_PINEVIEW(dev)) { | 209 | if (IS_PINEVIEW(dev)) { |
247 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); | 210 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); |
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 773e484f1646..297bc9a7d6e6 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
@@ -238,13 +238,13 @@ config SENSORS_K8TEMP | |||
238 | will be called k8temp. | 238 | will be called k8temp. |
239 | 239 | ||
240 | config SENSORS_K10TEMP | 240 | config SENSORS_K10TEMP |
241 | tristate "AMD Phenom/Sempron/Turion/Opteron temperature sensor" | 241 | tristate "AMD Family 10h/11h/12h/14h temperature sensor" |
242 | depends on X86 && PCI | 242 | depends on X86 && PCI |
243 | help | 243 | help |
244 | If you say yes here you get support for the temperature | 244 | If you say yes here you get support for the temperature |
245 | sensor(s) inside your CPU. Supported are later revisions of | 245 | sensor(s) inside your CPU. Supported are later revisions of |
246 | the AMD Family 10h and all revisions of the AMD Family 11h | 246 | the AMD Family 10h and all revisions of the AMD Family 11h, |
247 | microarchitectures. | 247 | 12h (Llano), and 14h (Brazos) microarchitectures. |
248 | 248 | ||
249 | This driver can also be built as a module. If so, the module | 249 | This driver can also be built as a module. If so, the module |
250 | will be called k10temp. | 250 | will be called k10temp. |
@@ -455,13 +455,14 @@ config SENSORS_JZ4740 | |||
455 | called jz4740-hwmon. | 455 | called jz4740-hwmon. |
456 | 456 | ||
457 | config SENSORS_JC42 | 457 | config SENSORS_JC42 |
458 | tristate "JEDEC JC42.4 compliant temperature sensors" | 458 | tristate "JEDEC JC42.4 compliant memory module temperature sensors" |
459 | depends on I2C | 459 | depends on I2C |
460 | help | 460 | help |
461 | If you say yes here you get support for Jedec JC42.4 compliant | 461 | If you say yes here, you get support for JEDEC JC42.4 compliant |
462 | temperature sensors. Support will include, but not be limited to, | 462 | temperature sensors, which are used on many DDR3 memory modules for |
463 | ADT7408, CAT34TS02,, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243, | 463 | mobile devices and servers. Support will include, but not be limited |
464 | MCP9843, SE97, SE98, STTS424, TSE2002B3, and TS3000B3. | 464 | to, ADT7408, CAT34TS02, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243, |
465 | MCP9843, SE97, SE98, STTS424(E), TSE2002B3, and TS3000B3. | ||
465 | 466 | ||
466 | This driver can also be built as a module. If so, the module | 467 | This driver can also be built as a module. If so, the module |
467 | will be called jc42. | 468 | will be called jc42. |
@@ -574,7 +575,7 @@ config SENSORS_LM85 | |||
574 | help | 575 | help |
575 | If you say yes here you get support for National Semiconductor LM85 | 576 | If you say yes here you get support for National Semiconductor LM85 |
576 | sensor chips and clones: ADM1027, ADT7463, ADT7468, EMC6D100, | 577 | sensor chips and clones: ADM1027, ADT7463, ADT7468, EMC6D100, |
577 | EMC6D101 and EMC6D102. | 578 | EMC6D101, EMC6D102, and EMC6D103. |
578 | 579 | ||
579 | This driver can also be built as a module. If so, the module | 580 | This driver can also be built as a module. If so, the module |
580 | will be called lm85. | 581 | will be called lm85. |
diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 340fc78c8dde..934991237061 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c | |||
@@ -53,6 +53,8 @@ static const unsigned short normal_i2c[] = { | |||
53 | 53 | ||
54 | /* Configuration register defines */ | 54 | /* Configuration register defines */ |
55 | #define JC42_CFG_CRIT_ONLY (1 << 2) | 55 | #define JC42_CFG_CRIT_ONLY (1 << 2) |
56 | #define JC42_CFG_TCRIT_LOCK (1 << 6) | ||
57 | #define JC42_CFG_EVENT_LOCK (1 << 7) | ||
56 | #define JC42_CFG_SHUTDOWN (1 << 8) | 58 | #define JC42_CFG_SHUTDOWN (1 << 8) |
57 | #define JC42_CFG_HYST_SHIFT 9 | 59 | #define JC42_CFG_HYST_SHIFT 9 |
58 | #define JC42_CFG_HYST_MASK 0x03 | 60 | #define JC42_CFG_HYST_MASK 0x03 |
@@ -332,7 +334,7 @@ static ssize_t set_temp_crit_hyst(struct device *dev, | |||
332 | { | 334 | { |
333 | struct i2c_client *client = to_i2c_client(dev); | 335 | struct i2c_client *client = to_i2c_client(dev); |
334 | struct jc42_data *data = i2c_get_clientdata(client); | 336 | struct jc42_data *data = i2c_get_clientdata(client); |
335 | long val; | 337 | unsigned long val; |
336 | int diff, hyst; | 338 | int diff, hyst; |
337 | int err; | 339 | int err; |
338 | int ret = count; | 340 | int ret = count; |
@@ -380,14 +382,14 @@ static ssize_t show_alarm(struct device *dev, | |||
380 | 382 | ||
381 | static DEVICE_ATTR(temp1_input, S_IRUGO, | 383 | static DEVICE_ATTR(temp1_input, S_IRUGO, |
382 | show_temp_input, NULL); | 384 | show_temp_input, NULL); |
383 | static DEVICE_ATTR(temp1_crit, S_IWUSR | S_IRUGO, | 385 | static DEVICE_ATTR(temp1_crit, S_IRUGO, |
384 | show_temp_crit, set_temp_crit); | 386 | show_temp_crit, set_temp_crit); |
385 | static DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO, | 387 | static DEVICE_ATTR(temp1_min, S_IRUGO, |
386 | show_temp_min, set_temp_min); | 388 | show_temp_min, set_temp_min); |
387 | static DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, | 389 | static DEVICE_ATTR(temp1_max, S_IRUGO, |
388 | show_temp_max, set_temp_max); | 390 | show_temp_max, set_temp_max); |
389 | 391 | ||
390 | static DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, | 392 | static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, |
391 | show_temp_crit_hyst, set_temp_crit_hyst); | 393 | show_temp_crit_hyst, set_temp_crit_hyst); |
392 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, | 394 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, |
393 | show_temp_max_hyst, NULL); | 395 | show_temp_max_hyst, NULL); |
@@ -412,8 +414,31 @@ static struct attribute *jc42_attributes[] = { | |||
412 | NULL | 414 | NULL |
413 | }; | 415 | }; |
414 | 416 | ||
417 | static mode_t jc42_attribute_mode(struct kobject *kobj, | ||
418 | struct attribute *attr, int index) | ||
419 | { | ||
420 | struct device *dev = container_of(kobj, struct device, kobj); | ||
421 | struct i2c_client *client = to_i2c_client(dev); | ||
422 | struct jc42_data *data = i2c_get_clientdata(client); | ||
423 | unsigned int config = data->config; | ||
424 | bool readonly; | ||
425 | |||
426 | if (attr == &dev_attr_temp1_crit.attr) | ||
427 | readonly = config & JC42_CFG_TCRIT_LOCK; | ||
428 | else if (attr == &dev_attr_temp1_min.attr || | ||
429 | attr == &dev_attr_temp1_max.attr) | ||
430 | readonly = config & JC42_CFG_EVENT_LOCK; | ||
431 | else if (attr == &dev_attr_temp1_crit_hyst.attr) | ||
432 | readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK); | ||
433 | else | ||
434 | readonly = true; | ||
435 | |||
436 | return S_IRUGO | (readonly ? 0 : S_IWUSR); | ||
437 | } | ||
438 | |||
415 | static const struct attribute_group jc42_group = { | 439 | static const struct attribute_group jc42_group = { |
416 | .attrs = jc42_attributes, | 440 | .attrs = jc42_attributes, |
441 | .is_visible = jc42_attribute_mode, | ||
417 | }; | 442 | }; |
418 | 443 | ||
419 | /* Return 0 if detection is successful, -ENODEV otherwise */ | 444 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index da5a2404cd3e..82bf65aa2968 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * k10temp.c - AMD Family 10h/11h processor hardware monitoring | 2 | * k10temp.c - AMD Family 10h/11h/12h/14h processor hardware monitoring |
3 | * | 3 | * |
4 | * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> | 4 | * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> |
5 | * | 5 | * |
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <asm/processor.h> | 26 | #include <asm/processor.h> |
27 | 27 | ||
28 | MODULE_DESCRIPTION("AMD Family 10h/11h CPU core temperature monitor"); | 28 | MODULE_DESCRIPTION("AMD Family 10h/11h/12h/14h CPU core temperature monitor"); |
29 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | 29 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); |
30 | MODULE_LICENSE("GPL"); | 30 | MODULE_LICENSE("GPL"); |
31 | 31 | ||
@@ -208,6 +208,7 @@ static void __devexit k10temp_remove(struct pci_dev *pdev) | |||
208 | static const struct pci_device_id k10temp_id_table[] = { | 208 | static const struct pci_device_id k10temp_id_table[] = { |
209 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, | 209 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, |
210 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, | 210 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, |
211 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, | ||
211 | {} | 212 | {} |
212 | }; | 213 | }; |
213 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); | 214 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); |
diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c index 1e229847f37a..d2cc28660816 100644 --- a/drivers/hwmon/lm85.c +++ b/drivers/hwmon/lm85.c | |||
@@ -41,7 +41,7 @@ static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END }; | |||
41 | enum chips { | 41 | enum chips { |
42 | any_chip, lm85b, lm85c, | 42 | any_chip, lm85b, lm85c, |
43 | adm1027, adt7463, adt7468, | 43 | adm1027, adt7463, adt7468, |
44 | emc6d100, emc6d102 | 44 | emc6d100, emc6d102, emc6d103 |
45 | }; | 45 | }; |
46 | 46 | ||
47 | /* The LM85 registers */ | 47 | /* The LM85 registers */ |
@@ -90,6 +90,9 @@ enum chips { | |||
90 | #define LM85_VERSTEP_EMC6D100_A0 0x60 | 90 | #define LM85_VERSTEP_EMC6D100_A0 0x60 |
91 | #define LM85_VERSTEP_EMC6D100_A1 0x61 | 91 | #define LM85_VERSTEP_EMC6D100_A1 0x61 |
92 | #define LM85_VERSTEP_EMC6D102 0x65 | 92 | #define LM85_VERSTEP_EMC6D102 0x65 |
93 | #define LM85_VERSTEP_EMC6D103_A0 0x68 | ||
94 | #define LM85_VERSTEP_EMC6D103_A1 0x69 | ||
95 | #define LM85_VERSTEP_EMC6D103S 0x6A /* Also known as EMC6D103:A2 */ | ||
93 | 96 | ||
94 | #define LM85_REG_CONFIG 0x40 | 97 | #define LM85_REG_CONFIG 0x40 |
95 | 98 | ||
@@ -348,6 +351,7 @@ static const struct i2c_device_id lm85_id[] = { | |||
348 | { "emc6d100", emc6d100 }, | 351 | { "emc6d100", emc6d100 }, |
349 | { "emc6d101", emc6d100 }, | 352 | { "emc6d101", emc6d100 }, |
350 | { "emc6d102", emc6d102 }, | 353 | { "emc6d102", emc6d102 }, |
354 | { "emc6d103", emc6d103 }, | ||
351 | { } | 355 | { } |
352 | }; | 356 | }; |
353 | MODULE_DEVICE_TABLE(i2c, lm85_id); | 357 | MODULE_DEVICE_TABLE(i2c, lm85_id); |
@@ -1250,6 +1254,20 @@ static int lm85_detect(struct i2c_client *client, struct i2c_board_info *info) | |||
1250 | case LM85_VERSTEP_EMC6D102: | 1254 | case LM85_VERSTEP_EMC6D102: |
1251 | type_name = "emc6d102"; | 1255 | type_name = "emc6d102"; |
1252 | break; | 1256 | break; |
1257 | case LM85_VERSTEP_EMC6D103_A0: | ||
1258 | case LM85_VERSTEP_EMC6D103_A1: | ||
1259 | type_name = "emc6d103"; | ||
1260 | break; | ||
1261 | /* | ||
1262 | * Registers apparently missing in EMC6D103S/EMC6D103:A2 | ||
1263 | * compared to EMC6D103:A0, EMC6D103:A1, and EMC6D102 | ||
1264 | * (according to the data sheets), but used unconditionally | ||
1265 | * in the driver: 62[5:7], 6D[0:7], and 6E[0:7]. | ||
1266 | * So skip EMC6D103S for now. | ||
1267 | case LM85_VERSTEP_EMC6D103S: | ||
1268 | type_name = "emc6d103s"; | ||
1269 | break; | ||
1270 | */ | ||
1253 | } | 1271 | } |
1254 | } else { | 1272 | } else { |
1255 | dev_dbg(&adapter->dev, | 1273 | dev_dbg(&adapter->dev, |
@@ -1283,6 +1301,7 @@ static int lm85_probe(struct i2c_client *client, | |||
1283 | case adt7468: | 1301 | case adt7468: |
1284 | case emc6d100: | 1302 | case emc6d100: |
1285 | case emc6d102: | 1303 | case emc6d102: |
1304 | case emc6d103: | ||
1286 | data->freq_map = adm1027_freq_map; | 1305 | data->freq_map = adm1027_freq_map; |
1287 | break; | 1306 | break; |
1288 | default: | 1307 | default: |
@@ -1468,7 +1487,7 @@ static struct lm85_data *lm85_update_device(struct device *dev) | |||
1468 | /* More alarm bits */ | 1487 | /* More alarm bits */ |
1469 | data->alarms |= lm85_read_value(client, | 1488 | data->alarms |= lm85_read_value(client, |
1470 | EMC6D100_REG_ALARM3) << 16; | 1489 | EMC6D100_REG_ALARM3) << 16; |
1471 | } else if (data->type == emc6d102) { | 1490 | } else if (data->type == emc6d102 || data->type == emc6d103) { |
1472 | /* Have to read LSB bits after the MSB ones because | 1491 | /* Have to read LSB bits after the MSB ones because |
1473 | the reading of the MSB bits has frozen the | 1492 | the reading of the MSB bits has frozen the |
1474 | LSBs (backward from the ADM1027). | 1493 | LSBs (backward from the ADM1027). |
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index d163bc2e2b9e..a59af5b24f0a 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig | |||
@@ -227,7 +227,7 @@ config SONYPI_COMPAT | |||
227 | config IDEAPAD_LAPTOP | 227 | config IDEAPAD_LAPTOP |
228 | tristate "Lenovo IdeaPad Laptop Extras" | 228 | tristate "Lenovo IdeaPad Laptop Extras" |
229 | depends on ACPI | 229 | depends on ACPI |
230 | depends on RFKILL | 230 | depends on RFKILL && INPUT |
231 | select INPUT_SPARSEKMAP | 231 | select INPUT_SPARSEKMAP |
232 | help | 232 | help |
233 | This is a driver for the rfkill switches on Lenovo IdeaPad netbooks. | 233 | This is a driver for the rfkill switches on Lenovo IdeaPad netbooks. |
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c index c5c4b8c32eb8..38b34a73866a 100644 --- a/drivers/platform/x86/acer-wmi.c +++ b/drivers/platform/x86/acer-wmi.c | |||
@@ -84,7 +84,7 @@ MODULE_LICENSE("GPL"); | |||
84 | */ | 84 | */ |
85 | #define AMW0_GUID1 "67C3371D-95A3-4C37-BB61-DD47B491DAAB" | 85 | #define AMW0_GUID1 "67C3371D-95A3-4C37-BB61-DD47B491DAAB" |
86 | #define AMW0_GUID2 "431F16ED-0C2B-444C-B267-27DEB140CF9C" | 86 | #define AMW0_GUID2 "431F16ED-0C2B-444C-B267-27DEB140CF9C" |
87 | #define WMID_GUID1 "6AF4F258-B401-42fd-BE91-3D4AC2D7C0D3" | 87 | #define WMID_GUID1 "6AF4F258-B401-42FD-BE91-3D4AC2D7C0D3" |
88 | #define WMID_GUID2 "95764E09-FB56-4e83-B31A-37761F60994A" | 88 | #define WMID_GUID2 "95764E09-FB56-4e83-B31A-37761F60994A" |
89 | #define WMID_GUID3 "61EF69EA-865C-4BC3-A502-A0DEBA0CB531" | 89 | #define WMID_GUID3 "61EF69EA-865C-4BC3-A502-A0DEBA0CB531" |
90 | 90 | ||
@@ -1280,7 +1280,7 @@ static ssize_t set_bool_threeg(struct device *dev, | |||
1280 | return -EINVAL; | 1280 | return -EINVAL; |
1281 | return count; | 1281 | return count; |
1282 | } | 1282 | } |
1283 | static DEVICE_ATTR(threeg, S_IWUGO | S_IRUGO | S_IWUSR, show_bool_threeg, | 1283 | static DEVICE_ATTR(threeg, S_IRUGO | S_IWUSR, show_bool_threeg, |
1284 | set_bool_threeg); | 1284 | set_bool_threeg); |
1285 | 1285 | ||
1286 | static ssize_t show_interface(struct device *dev, struct device_attribute *attr, | 1286 | static ssize_t show_interface(struct device *dev, struct device_attribute *attr, |
diff --git a/drivers/platform/x86/asus_acpi.c b/drivers/platform/x86/asus_acpi.c index 4633fd8532cc..fe495939c307 100644 --- a/drivers/platform/x86/asus_acpi.c +++ b/drivers/platform/x86/asus_acpi.c | |||
@@ -1081,14 +1081,8 @@ static int asus_hotk_add_fs(struct acpi_device *device) | |||
1081 | struct proc_dir_entry *proc; | 1081 | struct proc_dir_entry *proc; |
1082 | mode_t mode; | 1082 | mode_t mode; |
1083 | 1083 | ||
1084 | /* | ||
1085 | * If parameter uid or gid is not changed, keep the default setting for | ||
1086 | * our proc entries (-rw-rw-rw-) else, it means we care about security, | ||
1087 | * and then set to -rw-rw---- | ||
1088 | */ | ||
1089 | |||
1090 | if ((asus_uid == 0) && (asus_gid == 0)) { | 1084 | if ((asus_uid == 0) && (asus_gid == 0)) { |
1091 | mode = S_IFREG | S_IRUGO | S_IWUGO; | 1085 | mode = S_IFREG | S_IRUGO | S_IWUSR | S_IWGRP; |
1092 | } else { | 1086 | } else { |
1093 | mode = S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP; | 1087 | mode = S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP; |
1094 | printk(KERN_WARNING " asus_uid and asus_gid parameters are " | 1088 | printk(KERN_WARNING " asus_uid and asus_gid parameters are " |
diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c index 34657f96b5a5..ad24ef36f9f7 100644 --- a/drivers/platform/x86/dell-laptop.c +++ b/drivers/platform/x86/dell-laptop.c | |||
@@ -290,9 +290,12 @@ static int dell_rfkill_set(void *data, bool blocked) | |||
290 | dell_send_request(buffer, 17, 11); | 290 | dell_send_request(buffer, 17, 11); |
291 | 291 | ||
292 | /* If the hardware switch controls this radio, and the hardware | 292 | /* If the hardware switch controls this radio, and the hardware |
293 | switch is disabled, don't allow changing the software state */ | 293 | switch is disabled, don't allow changing the software state. |
294 | If the hardware switch is reported as not supported, always | ||
295 | fire the SMI to toggle the killswitch. */ | ||
294 | if ((hwswitch_state & BIT(hwswitch_bit)) && | 296 | if ((hwswitch_state & BIT(hwswitch_bit)) && |
295 | !(buffer->output[1] & BIT(16))) { | 297 | !(buffer->output[1] & BIT(16)) && |
298 | (buffer->output[1] & BIT(0))) { | ||
296 | ret = -EINVAL; | 299 | ret = -EINVAL; |
297 | goto out; | 300 | goto out; |
298 | } | 301 | } |
@@ -398,6 +401,23 @@ static const struct file_operations dell_debugfs_fops = { | |||
398 | 401 | ||
399 | static void dell_update_rfkill(struct work_struct *ignored) | 402 | static void dell_update_rfkill(struct work_struct *ignored) |
400 | { | 403 | { |
404 | int status; | ||
405 | |||
406 | get_buffer(); | ||
407 | dell_send_request(buffer, 17, 11); | ||
408 | status = buffer->output[1]; | ||
409 | release_buffer(); | ||
410 | |||
411 | /* if hardware rfkill is not supported, set it explicitly */ | ||
412 | if (!(status & BIT(0))) { | ||
413 | if (wifi_rfkill) | ||
414 | dell_rfkill_set((void *)1, !((status & BIT(17)) >> 17)); | ||
415 | if (bluetooth_rfkill) | ||
416 | dell_rfkill_set((void *)2, !((status & BIT(18)) >> 18)); | ||
417 | if (wwan_rfkill) | ||
418 | dell_rfkill_set((void *)3, !((status & BIT(19)) >> 19)); | ||
419 | } | ||
420 | |||
401 | if (wifi_rfkill) | 421 | if (wifi_rfkill) |
402 | dell_rfkill_query(wifi_rfkill, (void *)1); | 422 | dell_rfkill_query(wifi_rfkill, (void *)1); |
403 | if (bluetooth_rfkill) | 423 | if (bluetooth_rfkill) |
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 930e62762365..61433d492862 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c | |||
@@ -60,69 +60,20 @@ enum pmic_gpio_register { | |||
60 | #define GPOSW_DOU 0x08 | 60 | #define GPOSW_DOU 0x08 |
61 | #define GPOSW_RDRV 0x30 | 61 | #define GPOSW_RDRV 0x30 |
62 | 62 | ||
63 | #define GPIO_UPDATE_TYPE 0x80000000 | ||
63 | 64 | ||
64 | #define NUM_GPIO 24 | 65 | #define NUM_GPIO 24 |
65 | 66 | ||
66 | struct pmic_gpio_irq { | ||
67 | spinlock_t lock; | ||
68 | u32 trigger[NUM_GPIO]; | ||
69 | u32 dirty; | ||
70 | struct work_struct work; | ||
71 | }; | ||
72 | |||
73 | |||
74 | struct pmic_gpio { | 67 | struct pmic_gpio { |
68 | struct mutex buslock; | ||
75 | struct gpio_chip chip; | 69 | struct gpio_chip chip; |
76 | struct pmic_gpio_irq irqtypes; | ||
77 | void *gpiointr; | 70 | void *gpiointr; |
78 | int irq; | 71 | int irq; |
79 | unsigned irq_base; | 72 | unsigned irq_base; |
73 | unsigned int update_type; | ||
74 | u32 trigger_type; | ||
80 | }; | 75 | }; |
81 | 76 | ||
82 | static void pmic_program_irqtype(int gpio, int type) | ||
83 | { | ||
84 | if (type & IRQ_TYPE_EDGE_RISING) | ||
85 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x20, 0x20); | ||
86 | else | ||
87 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x20); | ||
88 | |||
89 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
90 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x10, 0x10); | ||
91 | else | ||
92 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x10); | ||
93 | }; | ||
94 | |||
95 | static void pmic_irqtype_work(struct work_struct *work) | ||
96 | { | ||
97 | struct pmic_gpio_irq *t = | ||
98 | container_of(work, struct pmic_gpio_irq, work); | ||
99 | unsigned long flags; | ||
100 | int i; | ||
101 | u16 type; | ||
102 | |||
103 | spin_lock_irqsave(&t->lock, flags); | ||
104 | /* As we drop the lock, we may need multiple scans if we race the | ||
105 | pmic_irq_type function */ | ||
106 | while (t->dirty) { | ||
107 | /* | ||
108 | * For each pin that has the dirty bit set send an IPC | ||
109 | * message to configure the hardware via the PMIC | ||
110 | */ | ||
111 | for (i = 0; i < NUM_GPIO; i++) { | ||
112 | if (!(t->dirty & (1 << i))) | ||
113 | continue; | ||
114 | t->dirty &= ~(1 << i); | ||
115 | /* We can't trust the array entry or dirty | ||
116 | once the lock is dropped */ | ||
117 | type = t->trigger[i]; | ||
118 | spin_unlock_irqrestore(&t->lock, flags); | ||
119 | pmic_program_irqtype(i, type); | ||
120 | spin_lock_irqsave(&t->lock, flags); | ||
121 | } | ||
122 | } | ||
123 | spin_unlock_irqrestore(&t->lock, flags); | ||
124 | } | ||
125 | |||
126 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 77 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
127 | { | 78 | { |
128 | if (offset > 8) { | 79 | if (offset > 8) { |
@@ -190,25 +141,24 @@ static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
190 | 1 << (offset - 16)); | 141 | 1 << (offset - 16)); |
191 | } | 142 | } |
192 | 143 | ||
193 | static int pmic_irq_type(unsigned irq, unsigned type) | 144 | /* |
145 | * This is called from genirq with pg->buslock locked and | ||
146 | * irq_desc->lock held. We can not access the scu bus here, so we | ||
147 | * store the change and update in the bus_sync_unlock() function below | ||
148 | */ | ||
149 | static int pmic_irq_type(struct irq_data *data, unsigned type) | ||
194 | { | 150 | { |
195 | struct pmic_gpio *pg = get_irq_chip_data(irq); | 151 | struct pmic_gpio *pg = irq_data_get_irq_chip_data(data); |
196 | u32 gpio = irq - pg->irq_base; | 152 | u32 gpio = data->irq - pg->irq_base; |
197 | unsigned long flags; | ||
198 | 153 | ||
199 | if (gpio >= pg->chip.ngpio) | 154 | if (gpio >= pg->chip.ngpio) |
200 | return -EINVAL; | 155 | return -EINVAL; |
201 | 156 | ||
202 | spin_lock_irqsave(&pg->irqtypes.lock, flags); | 157 | pg->trigger_type = type; |
203 | pg->irqtypes.trigger[gpio] = type; | 158 | pg->update_type = gpio | GPIO_UPDATE_TYPE; |
204 | pg->irqtypes.dirty |= (1 << gpio); | ||
205 | spin_unlock_irqrestore(&pg->irqtypes.lock, flags); | ||
206 | schedule_work(&pg->irqtypes.work); | ||
207 | return 0; | 159 | return 0; |
208 | } | 160 | } |
209 | 161 | ||
210 | |||
211 | |||
212 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 162 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
213 | { | 163 | { |
214 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); | 164 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); |
@@ -217,38 +167,32 @@ static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
217 | } | 167 | } |
218 | 168 | ||
219 | /* the gpiointr register is read-clear, so just do nothing. */ | 169 | /* the gpiointr register is read-clear, so just do nothing. */ |
220 | static void pmic_irq_unmask(unsigned irq) | 170 | static void pmic_irq_unmask(struct irq_data *data) { } |
221 | { | ||
222 | }; | ||
223 | 171 | ||
224 | static void pmic_irq_mask(unsigned irq) | 172 | static void pmic_irq_mask(struct irq_data *data) { } |
225 | { | ||
226 | }; | ||
227 | 173 | ||
228 | static struct irq_chip pmic_irqchip = { | 174 | static struct irq_chip pmic_irqchip = { |
229 | .name = "PMIC-GPIO", | 175 | .name = "PMIC-GPIO", |
230 | .mask = pmic_irq_mask, | 176 | .irq_mask = pmic_irq_mask, |
231 | .unmask = pmic_irq_unmask, | 177 | .irq_unmask = pmic_irq_unmask, |
232 | .set_type = pmic_irq_type, | 178 | .irq_set_type = pmic_irq_type, |
233 | }; | 179 | }; |
234 | 180 | ||
235 | static void pmic_irq_handler(unsigned irq, struct irq_desc *desc) | 181 | static irqreturn_t pmic_irq_handler(int irq, void *data) |
236 | { | 182 | { |
237 | struct pmic_gpio *pg = (struct pmic_gpio *)get_irq_data(irq); | 183 | struct pmic_gpio *pg = data; |
238 | u8 intsts = *((u8 *)pg->gpiointr + 4); | 184 | u8 intsts = *((u8 *)pg->gpiointr + 4); |
239 | int gpio; | 185 | int gpio; |
186 | irqreturn_t ret = IRQ_NONE; | ||
240 | 187 | ||
241 | for (gpio = 0; gpio < 8; gpio++) { | 188 | for (gpio = 0; gpio < 8; gpio++) { |
242 | if (intsts & (1 << gpio)) { | 189 | if (intsts & (1 << gpio)) { |
243 | pr_debug("pmic pin %d triggered\n", gpio); | 190 | pr_debug("pmic pin %d triggered\n", gpio); |
244 | generic_handle_irq(pg->irq_base + gpio); | 191 | generic_handle_irq(pg->irq_base + gpio); |
192 | ret = IRQ_HANDLED; | ||
245 | } | 193 | } |
246 | } | 194 | } |
247 | 195 | return ret; | |
248 | if (desc->chip->irq_eoi) | ||
249 | desc->chip->irq_eoi(irq_get_irq_data(irq)); | ||
250 | else | ||
251 | dev_warn(pg->chip.dev, "missing EOI handler for irq %d\n", irq); | ||
252 | } | 196 | } |
253 | 197 | ||
254 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | 198 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) |
@@ -297,8 +241,7 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
297 | pg->chip.can_sleep = 1; | 241 | pg->chip.can_sleep = 1; |
298 | pg->chip.dev = dev; | 242 | pg->chip.dev = dev; |
299 | 243 | ||
300 | INIT_WORK(&pg->irqtypes.work, pmic_irqtype_work); | 244 | mutex_init(&pg->buslock); |
301 | spin_lock_init(&pg->irqtypes.lock); | ||
302 | 245 | ||
303 | pg->chip.dev = dev; | 246 | pg->chip.dev = dev; |
304 | retval = gpiochip_add(&pg->chip); | 247 | retval = gpiochip_add(&pg->chip); |
@@ -306,8 +249,13 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
306 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); | 249 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); |
307 | goto err; | 250 | goto err; |
308 | } | 251 | } |
309 | set_irq_data(pg->irq, pg); | 252 | |
310 | set_irq_chained_handler(pg->irq, pmic_irq_handler); | 253 | retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg); |
254 | if (retval) { | ||
255 | printk(KERN_WARNING "pmic: Interrupt request failed\n"); | ||
256 | goto err; | ||
257 | } | ||
258 | |||
311 | for (i = 0; i < 8; i++) { | 259 | for (i = 0; i < 8; i++) { |
312 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, | 260 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, |
313 | handle_simple_irq, "demux"); | 261 | handle_simple_irq, "demux"); |
diff --git a/drivers/platform/x86/tc1100-wmi.c b/drivers/platform/x86/tc1100-wmi.c index 1fe0f1feff71..865ef78d6f1a 100644 --- a/drivers/platform/x86/tc1100-wmi.c +++ b/drivers/platform/x86/tc1100-wmi.c | |||
@@ -162,7 +162,7 @@ set_bool_##value(struct device *dev, struct device_attribute *attr, \ | |||
162 | return -EINVAL; \ | 162 | return -EINVAL; \ |
163 | return count; \ | 163 | return count; \ |
164 | } \ | 164 | } \ |
165 | static DEVICE_ATTR(value, S_IWUGO | S_IRUGO | S_IWUSR, \ | 165 | static DEVICE_ATTR(value, S_IRUGO | S_IWUSR, \ |
166 | show_bool_##value, set_bool_##value); | 166 | show_bool_##value, set_bool_##value); |
167 | 167 | ||
168 | show_set_bool(wireless, TC1100_INSTANCE_WIRELESS); | 168 | show_set_bool(wireless, TC1100_INSTANCE_WIRELESS); |
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c index dd599585c6a9..eb9922385ef8 100644 --- a/drivers/platform/x86/thinkpad_acpi.c +++ b/drivers/platform/x86/thinkpad_acpi.c | |||
@@ -2275,16 +2275,12 @@ static void tpacpi_input_send_key(const unsigned int scancode) | |||
2275 | if (keycode != KEY_RESERVED) { | 2275 | if (keycode != KEY_RESERVED) { |
2276 | mutex_lock(&tpacpi_inputdev_send_mutex); | 2276 | mutex_lock(&tpacpi_inputdev_send_mutex); |
2277 | 2277 | ||
2278 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, scancode); | ||
2278 | input_report_key(tpacpi_inputdev, keycode, 1); | 2279 | input_report_key(tpacpi_inputdev, keycode, 1); |
2279 | if (keycode == KEY_UNKNOWN) | ||
2280 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, | ||
2281 | scancode); | ||
2282 | input_sync(tpacpi_inputdev); | 2280 | input_sync(tpacpi_inputdev); |
2283 | 2281 | ||
2282 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, scancode); | ||
2284 | input_report_key(tpacpi_inputdev, keycode, 0); | 2283 | input_report_key(tpacpi_inputdev, keycode, 0); |
2285 | if (keycode == KEY_UNKNOWN) | ||
2286 | input_event(tpacpi_inputdev, EV_MSC, MSC_SCAN, | ||
2287 | scancode); | ||
2288 | input_sync(tpacpi_inputdev); | 2284 | input_sync(tpacpi_inputdev); |
2289 | 2285 | ||
2290 | mutex_unlock(&tpacpi_inputdev_send_mutex); | 2286 | mutex_unlock(&tpacpi_inputdev_send_mutex); |
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c index 318672d05563..a9fe23d5bd0f 100644 --- a/drivers/s390/block/dasd_eckd.c +++ b/drivers/s390/block/dasd_eckd.c | |||
@@ -72,7 +72,7 @@ static struct dasd_discipline dasd_eckd_discipline; | |||
72 | static struct ccw_device_id dasd_eckd_ids[] = { | 72 | static struct ccw_device_id dasd_eckd_ids[] = { |
73 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3390, 0), .driver_info = 0x1}, | 73 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3390, 0), .driver_info = 0x1}, |
74 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3390, 0), .driver_info = 0x2}, | 74 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3390, 0), .driver_info = 0x2}, |
75 | { CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3390, 0), .driver_info = 0x3}, | 75 | { CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3380, 0), .driver_info = 0x3}, |
76 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3380, 0), .driver_info = 0x4}, | 76 | { CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3380, 0), .driver_info = 0x4}, |
77 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3380, 0), .driver_info = 0x5}, | 77 | { CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3380, 0), .driver_info = 0x5}, |
78 | { CCW_DEVICE_DEVTYPE (0x9343, 0, 0x9345, 0), .driver_info = 0x6}, | 78 | { CCW_DEVICE_DEVTYPE (0x9343, 0, 0x9345, 0), .driver_info = 0x6}, |
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 0bc68de8edd7..f0aef787a102 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c | |||
@@ -60,6 +60,7 @@ int ceph_init_dentry(struct dentry *dentry) | |||
60 | } | 60 | } |
61 | di->dentry = dentry; | 61 | di->dentry = dentry; |
62 | di->lease_session = NULL; | 62 | di->lease_session = NULL; |
63 | di->parent_inode = igrab(dentry->d_parent->d_inode); | ||
63 | dentry->d_fsdata = di; | 64 | dentry->d_fsdata = di; |
64 | dentry->d_time = jiffies; | 65 | dentry->d_time = jiffies; |
65 | ceph_dentry_lru_add(dentry); | 66 | ceph_dentry_lru_add(dentry); |
@@ -1033,7 +1034,7 @@ static void ceph_dentry_release(struct dentry *dentry) | |||
1033 | u64 snapid = CEPH_NOSNAP; | 1034 | u64 snapid = CEPH_NOSNAP; |
1034 | 1035 | ||
1035 | if (!IS_ROOT(dentry)) { | 1036 | if (!IS_ROOT(dentry)) { |
1036 | parent_inode = dentry->d_parent->d_inode; | 1037 | parent_inode = di->parent_inode; |
1037 | if (parent_inode) | 1038 | if (parent_inode) |
1038 | snapid = ceph_snap(parent_inode); | 1039 | snapid = ceph_snap(parent_inode); |
1039 | } | 1040 | } |
@@ -1058,6 +1059,8 @@ static void ceph_dentry_release(struct dentry *dentry) | |||
1058 | kmem_cache_free(ceph_dentry_cachep, di); | 1059 | kmem_cache_free(ceph_dentry_cachep, di); |
1059 | dentry->d_fsdata = NULL; | 1060 | dentry->d_fsdata = NULL; |
1060 | } | 1061 | } |
1062 | if (parent_inode) | ||
1063 | iput(parent_inode); | ||
1061 | } | 1064 | } |
1062 | 1065 | ||
1063 | static int ceph_snapdir_d_revalidate(struct dentry *dentry, | 1066 | static int ceph_snapdir_d_revalidate(struct dentry *dentry, |
diff --git a/fs/ceph/snap.c b/fs/ceph/snap.c index 39c243acd062..f40b9139e437 100644 --- a/fs/ceph/snap.c +++ b/fs/ceph/snap.c | |||
@@ -584,10 +584,14 @@ static void queue_realm_cap_snaps(struct ceph_snap_realm *realm) | |||
584 | if (lastinode) | 584 | if (lastinode) |
585 | iput(lastinode); | 585 | iput(lastinode); |
586 | 586 | ||
587 | dout("queue_realm_cap_snaps %p %llx children\n", realm, realm->ino); | 587 | list_for_each_entry(child, &realm->children, child_item) { |
588 | list_for_each_entry(child, &realm->children, child_item) | 588 | dout("queue_realm_cap_snaps %p %llx queue child %p %llx\n", |
589 | queue_realm_cap_snaps(child); | 589 | realm, realm->ino, child, child->ino); |
590 | list_del_init(&child->dirty_item); | ||
591 | list_add(&child->dirty_item, &realm->dirty_item); | ||
592 | } | ||
590 | 593 | ||
594 | list_del_init(&realm->dirty_item); | ||
591 | dout("queue_realm_cap_snaps %p %llx done\n", realm, realm->ino); | 595 | dout("queue_realm_cap_snaps %p %llx done\n", realm, realm->ino); |
592 | } | 596 | } |
593 | 597 | ||
@@ -683,7 +687,9 @@ more: | |||
683 | * queue cap snaps _after_ we've built the new snap contexts, | 687 | * queue cap snaps _after_ we've built the new snap contexts, |
684 | * so that i_head_snapc can be set appropriately. | 688 | * so that i_head_snapc can be set appropriately. |
685 | */ | 689 | */ |
686 | list_for_each_entry(realm, &dirty_realms, dirty_item) { | 690 | while (!list_empty(&dirty_realms)) { |
691 | realm = list_first_entry(&dirty_realms, struct ceph_snap_realm, | ||
692 | dirty_item); | ||
687 | queue_realm_cap_snaps(realm); | 693 | queue_realm_cap_snaps(realm); |
688 | } | 694 | } |
689 | 695 | ||
diff --git a/fs/ceph/super.h b/fs/ceph/super.h index 20b907d76ae2..88fcaa21b801 100644 --- a/fs/ceph/super.h +++ b/fs/ceph/super.h | |||
@@ -207,6 +207,7 @@ struct ceph_dentry_info { | |||
207 | struct dentry *dentry; | 207 | struct dentry *dentry; |
208 | u64 time; | 208 | u64 time; |
209 | u64 offset; | 209 | u64 offset; |
210 | struct inode *parent_inode; | ||
210 | }; | 211 | }; |
211 | 212 | ||
212 | struct ceph_inode_xattrs_info { | 213 | struct ceph_inode_xattrs_info { |
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h index 4a3330235d55..a9371b6578c0 100644 --- a/fs/cifs/cifsfs.h +++ b/fs/cifs/cifsfs.h | |||
@@ -127,5 +127,5 @@ extern long cifs_ioctl(struct file *filep, unsigned int cmd, unsigned long arg); | |||
127 | extern const struct export_operations cifs_export_ops; | 127 | extern const struct export_operations cifs_export_ops; |
128 | #endif /* EXPERIMENTAL */ | 128 | #endif /* EXPERIMENTAL */ |
129 | 129 | ||
130 | #define CIFS_VERSION "1.70" | 130 | #define CIFS_VERSION "1.71" |
131 | #endif /* _CIFSFS_H */ | 131 | #endif /* _CIFSFS_H */ |
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c index 8d9189f64477..79f641eeda30 100644 --- a/fs/cifs/netmisc.c +++ b/fs/cifs/netmisc.c | |||
@@ -170,7 +170,7 @@ cifs_convert_address(struct sockaddr *dst, const char *src, int len) | |||
170 | { | 170 | { |
171 | int rc, alen, slen; | 171 | int rc, alen, slen; |
172 | const char *pct; | 172 | const char *pct; |
173 | char *endp, scope_id[13]; | 173 | char scope_id[13]; |
174 | struct sockaddr_in *s4 = (struct sockaddr_in *) dst; | 174 | struct sockaddr_in *s4 = (struct sockaddr_in *) dst; |
175 | struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst; | 175 | struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst; |
176 | 176 | ||
@@ -197,9 +197,9 @@ cifs_convert_address(struct sockaddr *dst, const char *src, int len) | |||
197 | memcpy(scope_id, pct + 1, slen); | 197 | memcpy(scope_id, pct + 1, slen); |
198 | scope_id[slen] = '\0'; | 198 | scope_id[slen] = '\0'; |
199 | 199 | ||
200 | s6->sin6_scope_id = (u32) simple_strtoul(pct, &endp, 0); | 200 | rc = strict_strtoul(scope_id, 0, |
201 | if (endp != scope_id + slen) | 201 | (unsigned long *)&s6->sin6_scope_id); |
202 | return 0; | 202 | rc = (rc == 0) ? 1 : 0; |
203 | } | 203 | } |
204 | 204 | ||
205 | return rc; | 205 | return rc; |
diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c index 1adc9625a344..16765703131b 100644 --- a/fs/cifs/sess.c +++ b/fs/cifs/sess.c | |||
@@ -656,13 +656,13 @@ ssetup_ntlmssp_authenticate: | |||
656 | 656 | ||
657 | if (type == LANMAN) { | 657 | if (type == LANMAN) { |
658 | #ifdef CONFIG_CIFS_WEAK_PW_HASH | 658 | #ifdef CONFIG_CIFS_WEAK_PW_HASH |
659 | char lnm_session_key[CIFS_SESS_KEY_SIZE]; | 659 | char lnm_session_key[CIFS_AUTH_RESP_SIZE]; |
660 | 660 | ||
661 | pSMB->req.hdr.Flags2 &= ~SMBFLG2_UNICODE; | 661 | pSMB->req.hdr.Flags2 &= ~SMBFLG2_UNICODE; |
662 | 662 | ||
663 | /* no capabilities flags in old lanman negotiation */ | 663 | /* no capabilities flags in old lanman negotiation */ |
664 | 664 | ||
665 | pSMB->old_req.PasswordLength = cpu_to_le16(CIFS_SESS_KEY_SIZE); | 665 | pSMB->old_req.PasswordLength = cpu_to_le16(CIFS_AUTH_RESP_SIZE); |
666 | 666 | ||
667 | /* Calculate hash with password and copy into bcc_ptr. | 667 | /* Calculate hash with password and copy into bcc_ptr. |
668 | * Encryption Key (stored as in cryptkey) gets used if the | 668 | * Encryption Key (stored as in cryptkey) gets used if the |
@@ -675,8 +675,8 @@ ssetup_ntlmssp_authenticate: | |||
675 | true : false, lnm_session_key); | 675 | true : false, lnm_session_key); |
676 | 676 | ||
677 | ses->flags |= CIFS_SES_LANMAN; | 677 | ses->flags |= CIFS_SES_LANMAN; |
678 | memcpy(bcc_ptr, (char *)lnm_session_key, CIFS_SESS_KEY_SIZE); | 678 | memcpy(bcc_ptr, (char *)lnm_session_key, CIFS_AUTH_RESP_SIZE); |
679 | bcc_ptr += CIFS_SESS_KEY_SIZE; | 679 | bcc_ptr += CIFS_AUTH_RESP_SIZE; |
680 | 680 | ||
681 | /* can not sign if LANMAN negotiated so no need | 681 | /* can not sign if LANMAN negotiated so no need |
682 | to calculate signing key? but what if server | 682 | to calculate signing key? but what if server |
diff --git a/fs/ecryptfs/dentry.c b/fs/ecryptfs/dentry.c index 6fc4f319b550..534c1d46e69e 100644 --- a/fs/ecryptfs/dentry.c +++ b/fs/ecryptfs/dentry.c | |||
@@ -46,24 +46,28 @@ static int ecryptfs_d_revalidate(struct dentry *dentry, struct nameidata *nd) | |||
46 | { | 46 | { |
47 | struct dentry *lower_dentry; | 47 | struct dentry *lower_dentry; |
48 | struct vfsmount *lower_mnt; | 48 | struct vfsmount *lower_mnt; |
49 | struct dentry *dentry_save; | 49 | struct dentry *dentry_save = NULL; |
50 | struct vfsmount *vfsmount_save; | 50 | struct vfsmount *vfsmount_save = NULL; |
51 | int rc = 1; | 51 | int rc = 1; |
52 | 52 | ||
53 | if (nd->flags & LOOKUP_RCU) | 53 | if (nd && nd->flags & LOOKUP_RCU) |
54 | return -ECHILD; | 54 | return -ECHILD; |
55 | 55 | ||
56 | lower_dentry = ecryptfs_dentry_to_lower(dentry); | 56 | lower_dentry = ecryptfs_dentry_to_lower(dentry); |
57 | lower_mnt = ecryptfs_dentry_to_lower_mnt(dentry); | 57 | lower_mnt = ecryptfs_dentry_to_lower_mnt(dentry); |
58 | if (!lower_dentry->d_op || !lower_dentry->d_op->d_revalidate) | 58 | if (!lower_dentry->d_op || !lower_dentry->d_op->d_revalidate) |
59 | goto out; | 59 | goto out; |
60 | dentry_save = nd->path.dentry; | 60 | if (nd) { |
61 | vfsmount_save = nd->path.mnt; | 61 | dentry_save = nd->path.dentry; |
62 | nd->path.dentry = lower_dentry; | 62 | vfsmount_save = nd->path.mnt; |
63 | nd->path.mnt = lower_mnt; | 63 | nd->path.dentry = lower_dentry; |
64 | nd->path.mnt = lower_mnt; | ||
65 | } | ||
64 | rc = lower_dentry->d_op->d_revalidate(lower_dentry, nd); | 66 | rc = lower_dentry->d_op->d_revalidate(lower_dentry, nd); |
65 | nd->path.dentry = dentry_save; | 67 | if (nd) { |
66 | nd->path.mnt = vfsmount_save; | 68 | nd->path.dentry = dentry_save; |
69 | nd->path.mnt = vfsmount_save; | ||
70 | } | ||
67 | if (dentry->d_inode) { | 71 | if (dentry->d_inode) { |
68 | struct inode *lower_inode = | 72 | struct inode *lower_inode = |
69 | ecryptfs_inode_to_lower(dentry->d_inode); | 73 | ecryptfs_inode_to_lower(dentry->d_inode); |
diff --git a/fs/ecryptfs/ecryptfs_kernel.h b/fs/ecryptfs/ecryptfs_kernel.h index dbc84ed96336..e00753496e3e 100644 --- a/fs/ecryptfs/ecryptfs_kernel.h +++ b/fs/ecryptfs/ecryptfs_kernel.h | |||
@@ -632,8 +632,7 @@ int ecryptfs_interpose(struct dentry *hidden_dentry, | |||
632 | u32 flags); | 632 | u32 flags); |
633 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | 633 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, |
634 | struct dentry *lower_dentry, | 634 | struct dentry *lower_dentry, |
635 | struct inode *ecryptfs_dir_inode, | 635 | struct inode *ecryptfs_dir_inode); |
636 | struct nameidata *ecryptfs_nd); | ||
637 | int ecryptfs_decode_and_decrypt_filename(char **decrypted_name, | 636 | int ecryptfs_decode_and_decrypt_filename(char **decrypted_name, |
638 | size_t *decrypted_name_size, | 637 | size_t *decrypted_name_size, |
639 | struct dentry *ecryptfs_dentry, | 638 | struct dentry *ecryptfs_dentry, |
diff --git a/fs/ecryptfs/file.c b/fs/ecryptfs/file.c index 81e10e6a9443..7d1050e254f9 100644 --- a/fs/ecryptfs/file.c +++ b/fs/ecryptfs/file.c | |||
@@ -317,6 +317,7 @@ ecryptfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
317 | 317 | ||
318 | const struct file_operations ecryptfs_dir_fops = { | 318 | const struct file_operations ecryptfs_dir_fops = { |
319 | .readdir = ecryptfs_readdir, | 319 | .readdir = ecryptfs_readdir, |
320 | .read = generic_read_dir, | ||
320 | .unlocked_ioctl = ecryptfs_unlocked_ioctl, | 321 | .unlocked_ioctl = ecryptfs_unlocked_ioctl, |
321 | #ifdef CONFIG_COMPAT | 322 | #ifdef CONFIG_COMPAT |
322 | .compat_ioctl = ecryptfs_compat_ioctl, | 323 | .compat_ioctl = ecryptfs_compat_ioctl, |
diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c index bd33f87a1907..b592938a84bc 100644 --- a/fs/ecryptfs/inode.c +++ b/fs/ecryptfs/inode.c | |||
@@ -74,16 +74,20 @@ ecryptfs_create_underlying_file(struct inode *lower_dir_inode, | |||
74 | unsigned int flags_save; | 74 | unsigned int flags_save; |
75 | int rc; | 75 | int rc; |
76 | 76 | ||
77 | dentry_save = nd->path.dentry; | 77 | if (nd) { |
78 | vfsmount_save = nd->path.mnt; | 78 | dentry_save = nd->path.dentry; |
79 | flags_save = nd->flags; | 79 | vfsmount_save = nd->path.mnt; |
80 | nd->path.dentry = lower_dentry; | 80 | flags_save = nd->flags; |
81 | nd->path.mnt = lower_mnt; | 81 | nd->path.dentry = lower_dentry; |
82 | nd->flags &= ~LOOKUP_OPEN; | 82 | nd->path.mnt = lower_mnt; |
83 | nd->flags &= ~LOOKUP_OPEN; | ||
84 | } | ||
83 | rc = vfs_create(lower_dir_inode, lower_dentry, mode, nd); | 85 | rc = vfs_create(lower_dir_inode, lower_dentry, mode, nd); |
84 | nd->path.dentry = dentry_save; | 86 | if (nd) { |
85 | nd->path.mnt = vfsmount_save; | 87 | nd->path.dentry = dentry_save; |
86 | nd->flags = flags_save; | 88 | nd->path.mnt = vfsmount_save; |
89 | nd->flags = flags_save; | ||
90 | } | ||
87 | return rc; | 91 | return rc; |
88 | } | 92 | } |
89 | 93 | ||
@@ -241,8 +245,7 @@ out: | |||
241 | */ | 245 | */ |
242 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | 246 | int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, |
243 | struct dentry *lower_dentry, | 247 | struct dentry *lower_dentry, |
244 | struct inode *ecryptfs_dir_inode, | 248 | struct inode *ecryptfs_dir_inode) |
245 | struct nameidata *ecryptfs_nd) | ||
246 | { | 249 | { |
247 | struct dentry *lower_dir_dentry; | 250 | struct dentry *lower_dir_dentry; |
248 | struct vfsmount *lower_mnt; | 251 | struct vfsmount *lower_mnt; |
@@ -290,8 +293,6 @@ int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, | |||
290 | goto out; | 293 | goto out; |
291 | if (special_file(lower_inode->i_mode)) | 294 | if (special_file(lower_inode->i_mode)) |
292 | goto out; | 295 | goto out; |
293 | if (!ecryptfs_nd) | ||
294 | goto out; | ||
295 | /* Released in this function */ | 296 | /* Released in this function */ |
296 | page_virt = kmem_cache_zalloc(ecryptfs_header_cache_2, GFP_USER); | 297 | page_virt = kmem_cache_zalloc(ecryptfs_header_cache_2, GFP_USER); |
297 | if (!page_virt) { | 298 | if (!page_virt) { |
@@ -349,75 +350,6 @@ out: | |||
349 | } | 350 | } |
350 | 351 | ||
351 | /** | 352 | /** |
352 | * ecryptfs_new_lower_dentry | ||
353 | * @name: The name of the new dentry. | ||
354 | * @lower_dir_dentry: Parent directory of the new dentry. | ||
355 | * @nd: nameidata from last lookup. | ||
356 | * | ||
357 | * Create a new dentry or get it from lower parent dir. | ||
358 | */ | ||
359 | static struct dentry * | ||
360 | ecryptfs_new_lower_dentry(struct qstr *name, struct dentry *lower_dir_dentry, | ||
361 | struct nameidata *nd) | ||
362 | { | ||
363 | struct dentry *new_dentry; | ||
364 | struct dentry *tmp; | ||
365 | struct inode *lower_dir_inode; | ||
366 | |||
367 | lower_dir_inode = lower_dir_dentry->d_inode; | ||
368 | |||
369 | tmp = d_alloc(lower_dir_dentry, name); | ||
370 | if (!tmp) | ||
371 | return ERR_PTR(-ENOMEM); | ||
372 | |||
373 | mutex_lock(&lower_dir_inode->i_mutex); | ||
374 | new_dentry = lower_dir_inode->i_op->lookup(lower_dir_inode, tmp, nd); | ||
375 | mutex_unlock(&lower_dir_inode->i_mutex); | ||
376 | |||
377 | if (!new_dentry) | ||
378 | new_dentry = tmp; | ||
379 | else | ||
380 | dput(tmp); | ||
381 | |||
382 | return new_dentry; | ||
383 | } | ||
384 | |||
385 | |||
386 | /** | ||
387 | * ecryptfs_lookup_one_lower | ||
388 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up | ||
389 | * @lower_dir_dentry: lower parent directory | ||
390 | * @name: lower file name | ||
391 | * | ||
392 | * Get the lower dentry from vfs. If lower dentry does not exist yet, | ||
393 | * create it. | ||
394 | */ | ||
395 | static struct dentry * | ||
396 | ecryptfs_lookup_one_lower(struct dentry *ecryptfs_dentry, | ||
397 | struct dentry *lower_dir_dentry, struct qstr *name) | ||
398 | { | ||
399 | struct nameidata nd; | ||
400 | struct vfsmount *lower_mnt; | ||
401 | int err; | ||
402 | |||
403 | lower_mnt = mntget(ecryptfs_dentry_to_lower_mnt( | ||
404 | ecryptfs_dentry->d_parent)); | ||
405 | err = vfs_path_lookup(lower_dir_dentry, lower_mnt, name->name , 0, &nd); | ||
406 | mntput(lower_mnt); | ||
407 | |||
408 | if (!err) { | ||
409 | /* we dont need the mount */ | ||
410 | mntput(nd.path.mnt); | ||
411 | return nd.path.dentry; | ||
412 | } | ||
413 | if (err != -ENOENT) | ||
414 | return ERR_PTR(err); | ||
415 | |||
416 | /* create a new lower dentry */ | ||
417 | return ecryptfs_new_lower_dentry(name, lower_dir_dentry, &nd); | ||
418 | } | ||
419 | |||
420 | /** | ||
421 | * ecryptfs_lookup | 353 | * ecryptfs_lookup |
422 | * @ecryptfs_dir_inode: The eCryptfs directory inode | 354 | * @ecryptfs_dir_inode: The eCryptfs directory inode |
423 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up | 355 | * @ecryptfs_dentry: The eCryptfs dentry that we are looking up |
@@ -434,7 +366,6 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
434 | size_t encrypted_and_encoded_name_size; | 366 | size_t encrypted_and_encoded_name_size; |
435 | struct ecryptfs_mount_crypt_stat *mount_crypt_stat = NULL; | 367 | struct ecryptfs_mount_crypt_stat *mount_crypt_stat = NULL; |
436 | struct dentry *lower_dir_dentry, *lower_dentry; | 368 | struct dentry *lower_dir_dentry, *lower_dentry; |
437 | struct qstr lower_name; | ||
438 | int rc = 0; | 369 | int rc = 0; |
439 | 370 | ||
440 | if ((ecryptfs_dentry->d_name.len == 1 | 371 | if ((ecryptfs_dentry->d_name.len == 1 |
@@ -444,20 +375,14 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
444 | goto out_d_drop; | 375 | goto out_d_drop; |
445 | } | 376 | } |
446 | lower_dir_dentry = ecryptfs_dentry_to_lower(ecryptfs_dentry->d_parent); | 377 | lower_dir_dentry = ecryptfs_dentry_to_lower(ecryptfs_dentry->d_parent); |
447 | lower_name.name = ecryptfs_dentry->d_name.name; | 378 | mutex_lock(&lower_dir_dentry->d_inode->i_mutex); |
448 | lower_name.len = ecryptfs_dentry->d_name.len; | 379 | lower_dentry = lookup_one_len(ecryptfs_dentry->d_name.name, |
449 | lower_name.hash = ecryptfs_dentry->d_name.hash; | 380 | lower_dir_dentry, |
450 | if (lower_dir_dentry->d_op && lower_dir_dentry->d_op->d_hash) { | 381 | ecryptfs_dentry->d_name.len); |
451 | rc = lower_dir_dentry->d_op->d_hash(lower_dir_dentry, | 382 | mutex_unlock(&lower_dir_dentry->d_inode->i_mutex); |
452 | lower_dir_dentry->d_inode, &lower_name); | ||
453 | if (rc < 0) | ||
454 | goto out_d_drop; | ||
455 | } | ||
456 | lower_dentry = ecryptfs_lookup_one_lower(ecryptfs_dentry, | ||
457 | lower_dir_dentry, &lower_name); | ||
458 | if (IS_ERR(lower_dentry)) { | 383 | if (IS_ERR(lower_dentry)) { |
459 | rc = PTR_ERR(lower_dentry); | 384 | rc = PTR_ERR(lower_dentry); |
460 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_lower() returned " | 385 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_len() returned " |
461 | "[%d] on lower_dentry = [%s]\n", __func__, rc, | 386 | "[%d] on lower_dentry = [%s]\n", __func__, rc, |
462 | encrypted_and_encoded_name); | 387 | encrypted_and_encoded_name); |
463 | goto out_d_drop; | 388 | goto out_d_drop; |
@@ -479,28 +404,21 @@ static struct dentry *ecryptfs_lookup(struct inode *ecryptfs_dir_inode, | |||
479 | "filename; rc = [%d]\n", __func__, rc); | 404 | "filename; rc = [%d]\n", __func__, rc); |
480 | goto out_d_drop; | 405 | goto out_d_drop; |
481 | } | 406 | } |
482 | lower_name.name = encrypted_and_encoded_name; | 407 | mutex_lock(&lower_dir_dentry->d_inode->i_mutex); |
483 | lower_name.len = encrypted_and_encoded_name_size; | 408 | lower_dentry = lookup_one_len(encrypted_and_encoded_name, |
484 | lower_name.hash = full_name_hash(lower_name.name, lower_name.len); | 409 | lower_dir_dentry, |
485 | if (lower_dir_dentry->d_op && lower_dir_dentry->d_op->d_hash) { | 410 | encrypted_and_encoded_name_size); |
486 | rc = lower_dir_dentry->d_op->d_hash(lower_dir_dentry, | 411 | mutex_unlock(&lower_dir_dentry->d_inode->i_mutex); |
487 | lower_dir_dentry->d_inode, &lower_name); | ||
488 | if (rc < 0) | ||
489 | goto out_d_drop; | ||
490 | } | ||
491 | lower_dentry = ecryptfs_lookup_one_lower(ecryptfs_dentry, | ||
492 | lower_dir_dentry, &lower_name); | ||
493 | if (IS_ERR(lower_dentry)) { | 412 | if (IS_ERR(lower_dentry)) { |
494 | rc = PTR_ERR(lower_dentry); | 413 | rc = PTR_ERR(lower_dentry); |
495 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_lower() returned " | 414 | ecryptfs_printk(KERN_DEBUG, "%s: lookup_one_len() returned " |
496 | "[%d] on lower_dentry = [%s]\n", __func__, rc, | 415 | "[%d] on lower_dentry = [%s]\n", __func__, rc, |
497 | encrypted_and_encoded_name); | 416 | encrypted_and_encoded_name); |
498 | goto out_d_drop; | 417 | goto out_d_drop; |
499 | } | 418 | } |
500 | lookup_and_interpose: | 419 | lookup_and_interpose: |
501 | rc = ecryptfs_lookup_and_interpose_lower(ecryptfs_dentry, lower_dentry, | 420 | rc = ecryptfs_lookup_and_interpose_lower(ecryptfs_dentry, lower_dentry, |
502 | ecryptfs_dir_inode, | 421 | ecryptfs_dir_inode); |
503 | ecryptfs_nd); | ||
504 | goto out; | 422 | goto out; |
505 | out_d_drop: | 423 | out_d_drop: |
506 | d_drop(ecryptfs_dentry); | 424 | d_drop(ecryptfs_dentry); |
@@ -1092,6 +1010,8 @@ int ecryptfs_getattr(struct vfsmount *mnt, struct dentry *dentry, | |||
1092 | rc = vfs_getattr(ecryptfs_dentry_to_lower_mnt(dentry), | 1010 | rc = vfs_getattr(ecryptfs_dentry_to_lower_mnt(dentry), |
1093 | ecryptfs_dentry_to_lower(dentry), &lower_stat); | 1011 | ecryptfs_dentry_to_lower(dentry), &lower_stat); |
1094 | if (!rc) { | 1012 | if (!rc) { |
1013 | fsstack_copy_attr_all(dentry->d_inode, | ||
1014 | ecryptfs_inode_to_lower(dentry->d_inode)); | ||
1095 | generic_fillattr(dentry->d_inode, stat); | 1015 | generic_fillattr(dentry->d_inode, stat); |
1096 | stat->blocks = lower_stat.blocks; | 1016 | stat->blocks = lower_stat.blocks; |
1097 | } | 1017 | } |
diff --git a/fs/eventfd.c b/fs/eventfd.c index e0194b3e14d6..d9a591773919 100644 --- a/fs/eventfd.c +++ b/fs/eventfd.c | |||
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(eventfd_ctx_get); | |||
99 | * @ctx: [in] Pointer to eventfd context. | 99 | * @ctx: [in] Pointer to eventfd context. |
100 | * | 100 | * |
101 | * The eventfd context reference must have been previously acquired either | 101 | * The eventfd context reference must have been previously acquired either |
102 | * with eventfd_ctx_get() or eventfd_ctx_fdget()). | 102 | * with eventfd_ctx_get() or eventfd_ctx_fdget(). |
103 | */ | 103 | */ |
104 | void eventfd_ctx_put(struct eventfd_ctx *ctx) | 104 | void eventfd_ctx_put(struct eventfd_ctx *ctx) |
105 | { | 105 | { |
@@ -146,9 +146,9 @@ static void eventfd_ctx_do_read(struct eventfd_ctx *ctx, __u64 *cnt) | |||
146 | * eventfd_ctx_remove_wait_queue - Read the current counter and removes wait queue. | 146 | * eventfd_ctx_remove_wait_queue - Read the current counter and removes wait queue. |
147 | * @ctx: [in] Pointer to eventfd context. | 147 | * @ctx: [in] Pointer to eventfd context. |
148 | * @wait: [in] Wait queue to be removed. | 148 | * @wait: [in] Wait queue to be removed. |
149 | * @cnt: [out] Pointer to the 64bit conter value. | 149 | * @cnt: [out] Pointer to the 64-bit counter value. |
150 | * | 150 | * |
151 | * Returns zero if successful, or the following error codes: | 151 | * Returns %0 if successful, or the following error codes: |
152 | * | 152 | * |
153 | * -EAGAIN : The operation would have blocked. | 153 | * -EAGAIN : The operation would have blocked. |
154 | * | 154 | * |
@@ -175,11 +175,11 @@ EXPORT_SYMBOL_GPL(eventfd_ctx_remove_wait_queue); | |||
175 | * eventfd_ctx_read - Reads the eventfd counter or wait if it is zero. | 175 | * eventfd_ctx_read - Reads the eventfd counter or wait if it is zero. |
176 | * @ctx: [in] Pointer to eventfd context. | 176 | * @ctx: [in] Pointer to eventfd context. |
177 | * @no_wait: [in] Different from zero if the operation should not block. | 177 | * @no_wait: [in] Different from zero if the operation should not block. |
178 | * @cnt: [out] Pointer to the 64bit conter value. | 178 | * @cnt: [out] Pointer to the 64-bit counter value. |
179 | * | 179 | * |
180 | * Returns zero if successful, or the following error codes: | 180 | * Returns %0 if successful, or the following error codes: |
181 | * | 181 | * |
182 | * -EAGAIN : The operation would have blocked but @no_wait was nonzero. | 182 | * -EAGAIN : The operation would have blocked but @no_wait was non-zero. |
183 | * -ERESTARTSYS : A signal interrupted the wait operation. | 183 | * -ERESTARTSYS : A signal interrupted the wait operation. |
184 | * | 184 | * |
185 | * If @no_wait is zero, the function might sleep until the eventfd internal | 185 | * If @no_wait is zero, the function might sleep until the eventfd internal |
diff --git a/include/linux/module.h b/include/linux/module.h index 9bdf27c7615b..5de42043dff0 100644 --- a/include/linux/module.h +++ b/include/linux/module.h | |||
@@ -62,7 +62,7 @@ struct module_version_attribute { | |||
62 | struct module_attribute mattr; | 62 | struct module_attribute mattr; |
63 | const char *module_name; | 63 | const char *module_name; |
64 | const char *version; | 64 | const char *version; |
65 | }; | 65 | } __attribute__ ((__aligned__(sizeof(void *)))); |
66 | 66 | ||
67 | struct module_kobject | 67 | struct module_kobject |
68 | { | 68 | { |
diff --git a/include/sound/wm8903.h b/include/sound/wm8903.h index b4a0db2307ef..1eeebd534f7e 100644 --- a/include/sound/wm8903.h +++ b/include/sound/wm8903.h | |||
@@ -17,13 +17,9 @@ | |||
17 | /* | 17 | /* |
18 | * R6 (0x06) - Mic Bias Control 0 | 18 | * R6 (0x06) - Mic Bias Control 0 |
19 | */ | 19 | */ |
20 | #define WM8903_MICDET_HYST_ENA 0x0080 /* MICDET_HYST_ENA */ | 20 | #define WM8903_MICDET_THR_MASK 0x0030 /* MICDET_THR - [5:4] */ |
21 | #define WM8903_MICDET_HYST_ENA_MASK 0x0080 /* MICDET_HYST_ENA */ | 21 | #define WM8903_MICDET_THR_SHIFT 4 /* MICDET_THR - [5:4] */ |
22 | #define WM8903_MICDET_HYST_ENA_SHIFT 7 /* MICDET_HYST_ENA */ | 22 | #define WM8903_MICDET_THR_WIDTH 2 /* MICDET_THR - [5:4] */ |
23 | #define WM8903_MICDET_HYST_ENA_WIDTH 1 /* MICDET_HYST_ENA */ | ||
24 | #define WM8903_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */ | ||
25 | #define WM8903_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */ | ||
26 | #define WM8903_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */ | ||
27 | #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ | 23 | #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ |
28 | #define WM8903_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ | 24 | #define WM8903_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ |
29 | #define WM8903_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ | 25 | #define WM8903_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ |
diff --git a/kernel/perf_event.c b/kernel/perf_event.c index 999835b6112b..656222fcf767 100644 --- a/kernel/perf_event.c +++ b/kernel/perf_event.c | |||
@@ -782,6 +782,10 @@ retry: | |||
782 | raw_spin_unlock_irq(&ctx->lock); | 782 | raw_spin_unlock_irq(&ctx->lock); |
783 | } | 783 | } |
784 | 784 | ||
785 | #define MAX_INTERRUPTS (~0ULL) | ||
786 | |||
787 | static void perf_log_throttle(struct perf_event *event, int enable); | ||
788 | |||
785 | static int | 789 | static int |
786 | event_sched_in(struct perf_event *event, | 790 | event_sched_in(struct perf_event *event, |
787 | struct perf_cpu_context *cpuctx, | 791 | struct perf_cpu_context *cpuctx, |
@@ -794,6 +798,17 @@ event_sched_in(struct perf_event *event, | |||
794 | 798 | ||
795 | event->state = PERF_EVENT_STATE_ACTIVE; | 799 | event->state = PERF_EVENT_STATE_ACTIVE; |
796 | event->oncpu = smp_processor_id(); | 800 | event->oncpu = smp_processor_id(); |
801 | |||
802 | /* | ||
803 | * Unthrottle events, since we scheduled we might have missed several | ||
804 | * ticks already, also for a heavily scheduling task there is little | ||
805 | * guarantee it'll get a tick in a timely manner. | ||
806 | */ | ||
807 | if (unlikely(event->hw.interrupts == MAX_INTERRUPTS)) { | ||
808 | perf_log_throttle(event, 1); | ||
809 | event->hw.interrupts = 0; | ||
810 | } | ||
811 | |||
797 | /* | 812 | /* |
798 | * The new state must be visible before we turn it on in the hardware: | 813 | * The new state must be visible before we turn it on in the hardware: |
799 | */ | 814 | */ |
@@ -1596,10 +1611,6 @@ void __perf_event_task_sched_in(struct task_struct *task) | |||
1596 | } | 1611 | } |
1597 | } | 1612 | } |
1598 | 1613 | ||
1599 | #define MAX_INTERRUPTS (~0ULL) | ||
1600 | |||
1601 | static void perf_log_throttle(struct perf_event *event, int enable); | ||
1602 | |||
1603 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) | 1614 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) |
1604 | { | 1615 | { |
1605 | u64 frequency = event->attr.sample_freq; | 1616 | u64 frequency = event->attr.sample_freq; |
diff --git a/net/ceph/messenger.c b/net/ceph/messenger.c index dff633d62e5b..35b36b86d762 100644 --- a/net/ceph/messenger.c +++ b/net/ceph/messenger.c | |||
@@ -252,8 +252,12 @@ static int ceph_tcp_recvmsg(struct socket *sock, void *buf, size_t len) | |||
252 | { | 252 | { |
253 | struct kvec iov = {buf, len}; | 253 | struct kvec iov = {buf, len}; |
254 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; | 254 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; |
255 | int r; | ||
255 | 256 | ||
256 | return kernel_recvmsg(sock, &msg, &iov, 1, len, msg.msg_flags); | 257 | r = kernel_recvmsg(sock, &msg, &iov, 1, len, msg.msg_flags); |
258 | if (r == -EAGAIN) | ||
259 | r = 0; | ||
260 | return r; | ||
257 | } | 261 | } |
258 | 262 | ||
259 | /* | 263 | /* |
@@ -264,13 +268,17 @@ static int ceph_tcp_sendmsg(struct socket *sock, struct kvec *iov, | |||
264 | size_t kvlen, size_t len, int more) | 268 | size_t kvlen, size_t len, int more) |
265 | { | 269 | { |
266 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; | 270 | struct msghdr msg = { .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL }; |
271 | int r; | ||
267 | 272 | ||
268 | if (more) | 273 | if (more) |
269 | msg.msg_flags |= MSG_MORE; | 274 | msg.msg_flags |= MSG_MORE; |
270 | else | 275 | else |
271 | msg.msg_flags |= MSG_EOR; /* superfluous, but what the hell */ | 276 | msg.msg_flags |= MSG_EOR; /* superfluous, but what the hell */ |
272 | 277 | ||
273 | return kernel_sendmsg(sock, &msg, iov, kvlen, len); | 278 | r = kernel_sendmsg(sock, &msg, iov, kvlen, len); |
279 | if (r == -EAGAIN) | ||
280 | r = 0; | ||
281 | return r; | ||
274 | } | 282 | } |
275 | 283 | ||
276 | 284 | ||
@@ -847,6 +855,8 @@ static int write_partial_msg_pages(struct ceph_connection *con) | |||
847 | (msg->pages || msg->pagelist || msg->bio || in_trail)) | 855 | (msg->pages || msg->pagelist || msg->bio || in_trail)) |
848 | kunmap(page); | 856 | kunmap(page); |
849 | 857 | ||
858 | if (ret == -EAGAIN) | ||
859 | ret = 0; | ||
850 | if (ret <= 0) | 860 | if (ret <= 0) |
851 | goto out; | 861 | goto out; |
852 | 862 | ||
@@ -1737,16 +1747,12 @@ more_kvec: | |||
1737 | if (con->out_skip) { | 1747 | if (con->out_skip) { |
1738 | ret = write_partial_skip(con); | 1748 | ret = write_partial_skip(con); |
1739 | if (ret <= 0) | 1749 | if (ret <= 0) |
1740 | goto done; | 1750 | goto out; |
1741 | if (ret < 0) { | ||
1742 | dout("try_write write_partial_skip err %d\n", ret); | ||
1743 | goto done; | ||
1744 | } | ||
1745 | } | 1751 | } |
1746 | if (con->out_kvec_left) { | 1752 | if (con->out_kvec_left) { |
1747 | ret = write_partial_kvec(con); | 1753 | ret = write_partial_kvec(con); |
1748 | if (ret <= 0) | 1754 | if (ret <= 0) |
1749 | goto done; | 1755 | goto out; |
1750 | } | 1756 | } |
1751 | 1757 | ||
1752 | /* msg pages? */ | 1758 | /* msg pages? */ |
@@ -1761,11 +1767,11 @@ more_kvec: | |||
1761 | if (ret == 1) | 1767 | if (ret == 1) |
1762 | goto more_kvec; /* we need to send the footer, too! */ | 1768 | goto more_kvec; /* we need to send the footer, too! */ |
1763 | if (ret == 0) | 1769 | if (ret == 0) |
1764 | goto done; | 1770 | goto out; |
1765 | if (ret < 0) { | 1771 | if (ret < 0) { |
1766 | dout("try_write write_partial_msg_pages err %d\n", | 1772 | dout("try_write write_partial_msg_pages err %d\n", |
1767 | ret); | 1773 | ret); |
1768 | goto done; | 1774 | goto out; |
1769 | } | 1775 | } |
1770 | } | 1776 | } |
1771 | 1777 | ||
@@ -1789,10 +1795,9 @@ do_next: | |||
1789 | /* Nothing to do! */ | 1795 | /* Nothing to do! */ |
1790 | clear_bit(WRITE_PENDING, &con->state); | 1796 | clear_bit(WRITE_PENDING, &con->state); |
1791 | dout("try_write nothing else to write.\n"); | 1797 | dout("try_write nothing else to write.\n"); |
1792 | done: | ||
1793 | ret = 0; | 1798 | ret = 0; |
1794 | out: | 1799 | out: |
1795 | dout("try_write done on %p\n", con); | 1800 | dout("try_write done on %p ret %d\n", con, ret); |
1796 | return ret; | 1801 | return ret; |
1797 | } | 1802 | } |
1798 | 1803 | ||
@@ -1821,19 +1826,17 @@ more: | |||
1821 | dout("try_read connecting\n"); | 1826 | dout("try_read connecting\n"); |
1822 | ret = read_partial_banner(con); | 1827 | ret = read_partial_banner(con); |
1823 | if (ret <= 0) | 1828 | if (ret <= 0) |
1824 | goto done; | ||
1825 | if (process_banner(con) < 0) { | ||
1826 | ret = -1; | ||
1827 | goto out; | 1829 | goto out; |
1828 | } | 1830 | ret = process_banner(con); |
1831 | if (ret < 0) | ||
1832 | goto out; | ||
1829 | } | 1833 | } |
1830 | ret = read_partial_connect(con); | 1834 | ret = read_partial_connect(con); |
1831 | if (ret <= 0) | 1835 | if (ret <= 0) |
1832 | goto done; | ||
1833 | if (process_connect(con) < 0) { | ||
1834 | ret = -1; | ||
1835 | goto out; | 1836 | goto out; |
1836 | } | 1837 | ret = process_connect(con); |
1838 | if (ret < 0) | ||
1839 | goto out; | ||
1837 | goto more; | 1840 | goto more; |
1838 | } | 1841 | } |
1839 | 1842 | ||
@@ -1848,7 +1851,7 @@ more: | |||
1848 | dout("skipping %d / %d bytes\n", skip, -con->in_base_pos); | 1851 | dout("skipping %d / %d bytes\n", skip, -con->in_base_pos); |
1849 | ret = ceph_tcp_recvmsg(con->sock, buf, skip); | 1852 | ret = ceph_tcp_recvmsg(con->sock, buf, skip); |
1850 | if (ret <= 0) | 1853 | if (ret <= 0) |
1851 | goto done; | 1854 | goto out; |
1852 | con->in_base_pos += ret; | 1855 | con->in_base_pos += ret; |
1853 | if (con->in_base_pos) | 1856 | if (con->in_base_pos) |
1854 | goto more; | 1857 | goto more; |
@@ -1859,7 +1862,7 @@ more: | |||
1859 | */ | 1862 | */ |
1860 | ret = ceph_tcp_recvmsg(con->sock, &con->in_tag, 1); | 1863 | ret = ceph_tcp_recvmsg(con->sock, &con->in_tag, 1); |
1861 | if (ret <= 0) | 1864 | if (ret <= 0) |
1862 | goto done; | 1865 | goto out; |
1863 | dout("try_read got tag %d\n", (int)con->in_tag); | 1866 | dout("try_read got tag %d\n", (int)con->in_tag); |
1864 | switch (con->in_tag) { | 1867 | switch (con->in_tag) { |
1865 | case CEPH_MSGR_TAG_MSG: | 1868 | case CEPH_MSGR_TAG_MSG: |
@@ -1870,7 +1873,7 @@ more: | |||
1870 | break; | 1873 | break; |
1871 | case CEPH_MSGR_TAG_CLOSE: | 1874 | case CEPH_MSGR_TAG_CLOSE: |
1872 | set_bit(CLOSED, &con->state); /* fixme */ | 1875 | set_bit(CLOSED, &con->state); /* fixme */ |
1873 | goto done; | 1876 | goto out; |
1874 | default: | 1877 | default: |
1875 | goto bad_tag; | 1878 | goto bad_tag; |
1876 | } | 1879 | } |
@@ -1882,13 +1885,12 @@ more: | |||
1882 | case -EBADMSG: | 1885 | case -EBADMSG: |
1883 | con->error_msg = "bad crc"; | 1886 | con->error_msg = "bad crc"; |
1884 | ret = -EIO; | 1887 | ret = -EIO; |
1885 | goto out; | 1888 | break; |
1886 | case -EIO: | 1889 | case -EIO: |
1887 | con->error_msg = "io error"; | 1890 | con->error_msg = "io error"; |
1888 | goto out; | 1891 | break; |
1889 | default: | ||
1890 | goto done; | ||
1891 | } | 1892 | } |
1893 | goto out; | ||
1892 | } | 1894 | } |
1893 | if (con->in_tag == CEPH_MSGR_TAG_READY) | 1895 | if (con->in_tag == CEPH_MSGR_TAG_READY) |
1894 | goto more; | 1896 | goto more; |
@@ -1898,15 +1900,13 @@ more: | |||
1898 | if (con->in_tag == CEPH_MSGR_TAG_ACK) { | 1900 | if (con->in_tag == CEPH_MSGR_TAG_ACK) { |
1899 | ret = read_partial_ack(con); | 1901 | ret = read_partial_ack(con); |
1900 | if (ret <= 0) | 1902 | if (ret <= 0) |
1901 | goto done; | 1903 | goto out; |
1902 | process_ack(con); | 1904 | process_ack(con); |
1903 | goto more; | 1905 | goto more; |
1904 | } | 1906 | } |
1905 | 1907 | ||
1906 | done: | ||
1907 | ret = 0; | ||
1908 | out: | 1908 | out: |
1909 | dout("try_read done on %p\n", con); | 1909 | dout("try_read done on %p ret %d\n", con, ret); |
1910 | return ret; | 1910 | return ret; |
1911 | 1911 | ||
1912 | bad_tag: | 1912 | bad_tag: |
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index c9a16abacab4..6c94c6ce2925 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c | |||
@@ -315,6 +315,7 @@ static void parse_dep_file(void *map, size_t len) | |||
315 | char *end = m + len; | 315 | char *end = m + len; |
316 | char *p; | 316 | char *p; |
317 | char s[PATH_MAX]; | 317 | char s[PATH_MAX]; |
318 | int first; | ||
318 | 319 | ||
319 | p = strchr(m, ':'); | 320 | p = strchr(m, ':'); |
320 | if (!p) { | 321 | if (!p) { |
@@ -327,6 +328,7 @@ static void parse_dep_file(void *map, size_t len) | |||
327 | 328 | ||
328 | clear_config(); | 329 | clear_config(); |
329 | 330 | ||
331 | first = 1; | ||
330 | while (m < end) { | 332 | while (m < end) { |
331 | while (m < end && (*m == ' ' || *m == '\\' || *m == '\n')) | 333 | while (m < end && (*m == ' ' || *m == '\\' || *m == '\n')) |
332 | m++; | 334 | m++; |
@@ -340,9 +342,17 @@ static void parse_dep_file(void *map, size_t len) | |||
340 | if (strrcmp(s, "include/generated/autoconf.h") && | 342 | if (strrcmp(s, "include/generated/autoconf.h") && |
341 | strrcmp(s, "arch/um/include/uml-config.h") && | 343 | strrcmp(s, "arch/um/include/uml-config.h") && |
342 | strrcmp(s, ".ver")) { | 344 | strrcmp(s, ".ver")) { |
343 | printf(" %s \\\n", s); | 345 | /* |
346 | * Do not output the first dependency (the | ||
347 | * source file), so that kbuild is not confused | ||
348 | * if a .c file is rewritten into .S or vice | ||
349 | * versa. | ||
350 | */ | ||
351 | if (!first) | ||
352 | printf(" %s \\\n", s); | ||
344 | do_config_file(s); | 353 | do_config_file(s); |
345 | } | 354 | } |
355 | first = 0; | ||
346 | m = p + 1; | 356 | m = p + 1; |
347 | } | 357 | } |
348 | printf("\n%s: $(deps_%s)\n\n", target, target); | 358 | printf("\n%s: $(deps_%s)\n\n", target, target); |
diff --git a/sound/pci/au88x0/au88x0_core.c b/sound/pci/au88x0/au88x0_core.c index 23f49f356e0f..16c0bdfbb164 100644 --- a/sound/pci/au88x0/au88x0_core.c +++ b/sound/pci/au88x0/au88x0_core.c | |||
@@ -1252,11 +1252,19 @@ static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma) { | |||
1252 | static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma) | 1252 | static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma) |
1253 | { | 1253 | { |
1254 | stream_t *dma = &vortex->dma_adb[adbdma]; | 1254 | stream_t *dma = &vortex->dma_adb[adbdma]; |
1255 | int temp; | 1255 | int temp, page, delta; |
1256 | 1256 | ||
1257 | temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)); | 1257 | temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)); |
1258 | temp = (dma->period_virt * dma->period_bytes) + (temp & (dma->period_bytes - 1)); | 1258 | page = (temp & ADB_SUBBUF_MASK) >> ADB_SUBBUF_SHIFT; |
1259 | return temp; | 1259 | if (dma->nr_periods >= 4) |
1260 | delta = (page - dma->period_real) & 3; | ||
1261 | else { | ||
1262 | delta = (page - dma->period_real); | ||
1263 | if (delta < 0) | ||
1264 | delta += dma->nr_periods; | ||
1265 | } | ||
1266 | return (dma->period_virt + delta) * dma->period_bytes | ||
1267 | + (temp & (dma->period_bytes - 1)); | ||
1260 | } | 1268 | } |
1261 | 1269 | ||
1262 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma) | 1270 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma) |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 0baffcdee8f9..fcedad9a5fef 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -2308,6 +2308,7 @@ static struct snd_pci_quirk position_fix_list[] __devinitdata = { | |||
2308 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), | 2308 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), |
2309 | SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB), | 2309 | SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB), |
2310 | SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB), | 2310 | SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB), |
2311 | SND_PCI_QUIRK(0x1043, 0x8410, "ASUS", POS_FIX_LPIB), | ||
2311 | SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB), | 2312 | SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB), |
2312 | SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), | 2313 | SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), |
2313 | SND_PCI_QUIRK(0x1179, 0xff10, "Toshiba A100-259", POS_FIX_LPIB), | 2314 | SND_PCI_QUIRK(0x1179, 0xff10, "Toshiba A100-259", POS_FIX_LPIB), |
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index fbe97d32140d..dd7c5c12225d 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c | |||
@@ -3410,7 +3410,7 @@ static void cx_auto_parse_output(struct hda_codec *codec) | |||
3410 | } | 3410 | } |
3411 | } | 3411 | } |
3412 | spec->multiout.dac_nids = spec->private_dac_nids; | 3412 | spec->multiout.dac_nids = spec->private_dac_nids; |
3413 | spec->multiout.max_channels = nums * 2; | 3413 | spec->multiout.max_channels = spec->multiout.num_dacs * 2; |
3414 | 3414 | ||
3415 | if (cfg->hp_outs > 0) | 3415 | if (cfg->hp_outs > 0) |
3416 | spec->auto_mute = 1; | 3416 | spec->auto_mute = 1; |
@@ -3729,9 +3729,9 @@ static int cx_auto_init(struct hda_codec *codec) | |||
3729 | return 0; | 3729 | return 0; |
3730 | } | 3730 | } |
3731 | 3731 | ||
3732 | static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | 3732 | static int cx_auto_add_volume_idx(struct hda_codec *codec, const char *basename, |
3733 | const char *dir, int cidx, | 3733 | const char *dir, int cidx, |
3734 | hda_nid_t nid, int hda_dir) | 3734 | hda_nid_t nid, int hda_dir, int amp_idx) |
3735 | { | 3735 | { |
3736 | static char name[32]; | 3736 | static char name[32]; |
3737 | static struct snd_kcontrol_new knew[] = { | 3737 | static struct snd_kcontrol_new knew[] = { |
@@ -3743,7 +3743,8 @@ static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | |||
3743 | 3743 | ||
3744 | for (i = 0; i < 2; i++) { | 3744 | for (i = 0; i < 2; i++) { |
3745 | struct snd_kcontrol *kctl; | 3745 | struct snd_kcontrol *kctl; |
3746 | knew[i].private_value = HDA_COMPOSE_AMP_VAL(nid, 3, 0, hda_dir); | 3746 | knew[i].private_value = HDA_COMPOSE_AMP_VAL(nid, 3, amp_idx, |
3747 | hda_dir); | ||
3747 | knew[i].subdevice = HDA_SUBDEV_AMP_FLAG; | 3748 | knew[i].subdevice = HDA_SUBDEV_AMP_FLAG; |
3748 | knew[i].index = cidx; | 3749 | knew[i].index = cidx; |
3749 | snprintf(name, sizeof(name), "%s%s %s", basename, dir, sfx[i]); | 3750 | snprintf(name, sizeof(name), "%s%s %s", basename, dir, sfx[i]); |
@@ -3759,6 +3760,9 @@ static int cx_auto_add_volume(struct hda_codec *codec, const char *basename, | |||
3759 | return 0; | 3760 | return 0; |
3760 | } | 3761 | } |
3761 | 3762 | ||
3763 | #define cx_auto_add_volume(codec, str, dir, cidx, nid, hda_dir) \ | ||
3764 | cx_auto_add_volume_idx(codec, str, dir, cidx, nid, hda_dir, 0) | ||
3765 | |||
3762 | #define cx_auto_add_pb_volume(codec, nid, str, idx) \ | 3766 | #define cx_auto_add_pb_volume(codec, nid, str, idx) \ |
3763 | cx_auto_add_volume(codec, str, " Playback", idx, nid, HDA_OUTPUT) | 3767 | cx_auto_add_volume(codec, str, " Playback", idx, nid, HDA_OUTPUT) |
3764 | 3768 | ||
@@ -3808,29 +3812,60 @@ static int cx_auto_build_input_controls(struct hda_codec *codec) | |||
3808 | struct conexant_spec *spec = codec->spec; | 3812 | struct conexant_spec *spec = codec->spec; |
3809 | struct auto_pin_cfg *cfg = &spec->autocfg; | 3813 | struct auto_pin_cfg *cfg = &spec->autocfg; |
3810 | static const char *prev_label; | 3814 | static const char *prev_label; |
3811 | int i, err, cidx; | 3815 | int i, err, cidx, conn_len; |
3816 | hda_nid_t conn[HDA_MAX_CONNECTIONS]; | ||
3817 | |||
3818 | int multi_adc_volume = 0; /* If the ADC nid has several input volumes */ | ||
3819 | int adc_nid = spec->adc_nids[0]; | ||
3820 | |||
3821 | conn_len = snd_hda_get_connections(codec, adc_nid, conn, | ||
3822 | HDA_MAX_CONNECTIONS); | ||
3823 | if (conn_len < 0) | ||
3824 | return conn_len; | ||
3825 | |||
3826 | multi_adc_volume = cfg->num_inputs > 1 && conn_len > 1; | ||
3827 | if (!multi_adc_volume) { | ||
3828 | err = cx_auto_add_volume(codec, "Capture", "", 0, adc_nid, | ||
3829 | HDA_INPUT); | ||
3830 | if (err < 0) | ||
3831 | return err; | ||
3832 | } | ||
3812 | 3833 | ||
3813 | err = cx_auto_add_volume(codec, "Capture", "", 0, spec->adc_nids[0], | ||
3814 | HDA_INPUT); | ||
3815 | if (err < 0) | ||
3816 | return err; | ||
3817 | prev_label = NULL; | 3834 | prev_label = NULL; |
3818 | cidx = 0; | 3835 | cidx = 0; |
3819 | for (i = 0; i < cfg->num_inputs; i++) { | 3836 | for (i = 0; i < cfg->num_inputs; i++) { |
3820 | hda_nid_t nid = cfg->inputs[i].pin; | 3837 | hda_nid_t nid = cfg->inputs[i].pin; |
3821 | const char *label; | 3838 | const char *label; |
3822 | if (!(get_wcaps(codec, nid) & AC_WCAP_IN_AMP)) | 3839 | int j; |
3840 | int pin_amp = get_wcaps(codec, nid) & AC_WCAP_IN_AMP; | ||
3841 | if (!pin_amp && !multi_adc_volume) | ||
3823 | continue; | 3842 | continue; |
3843 | |||
3824 | label = hda_get_autocfg_input_label(codec, cfg, i); | 3844 | label = hda_get_autocfg_input_label(codec, cfg, i); |
3825 | if (label == prev_label) | 3845 | if (label == prev_label) |
3826 | cidx++; | 3846 | cidx++; |
3827 | else | 3847 | else |
3828 | cidx = 0; | 3848 | cidx = 0; |
3829 | prev_label = label; | 3849 | prev_label = label; |
3830 | err = cx_auto_add_volume(codec, label, " Capture", cidx, | 3850 | |
3831 | nid, HDA_INPUT); | 3851 | if (pin_amp) { |
3832 | if (err < 0) | 3852 | err = cx_auto_add_volume(codec, label, " Boost", cidx, |
3833 | return err; | 3853 | nid, HDA_INPUT); |
3854 | if (err < 0) | ||
3855 | return err; | ||
3856 | } | ||
3857 | |||
3858 | if (!multi_adc_volume) | ||
3859 | continue; | ||
3860 | for (j = 0; j < conn_len; j++) { | ||
3861 | if (conn[j] == nid) { | ||
3862 | err = cx_auto_add_volume_idx(codec, label, | ||
3863 | " Capture", cidx, adc_nid, HDA_INPUT, j); | ||
3864 | if (err < 0) | ||
3865 | return err; | ||
3866 | break; | ||
3867 | } | ||
3868 | } | ||
3834 | } | 3869 | } |
3835 | return 0; | 3870 | return 0; |
3836 | } | 3871 | } |
diff --git a/sound/soc/codecs/cx20442.c b/sound/soc/codecs/cx20442.c index bb4bf65b9e7e..0bb424af956f 100644 --- a/sound/soc/codecs/cx20442.c +++ b/sound/soc/codecs/cx20442.c | |||
@@ -367,7 +367,7 @@ static int cx20442_codec_remove(struct snd_soc_codec *codec) | |||
367 | return 0; | 367 | return 0; |
368 | } | 368 | } |
369 | 369 | ||
370 | static const u8 cx20442_reg = CX20442_TELOUT | CX20442_MIC; | 370 | static const u8 cx20442_reg; |
371 | 371 | ||
372 | static struct snd_soc_codec_driver cx20442_codec_dev = { | 372 | static struct snd_soc_codec_driver cx20442_codec_dev = { |
373 | .probe = cx20442_codec_probe, | 373 | .probe = cx20442_codec_probe, |
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 987476a5895f..017d99ceb42e 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c | |||
@@ -1482,7 +1482,7 @@ int wm8903_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, | |||
1482 | WM8903_MICDET_EINT | WM8903_MICSHRT_EINT, | 1482 | WM8903_MICDET_EINT | WM8903_MICSHRT_EINT, |
1483 | irq_mask); | 1483 | irq_mask); |
1484 | 1484 | ||
1485 | if (det && shrt) { | 1485 | if (det || shrt) { |
1486 | /* Enable mic detection, this may not have been set through | 1486 | /* Enable mic detection, this may not have been set through |
1487 | * platform data (eg, if the defaults are OK). */ | 1487 | * platform data (eg, if the defaults are OK). */ |
1488 | snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0, | 1488 | snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0, |
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 37b8aa8a680f..a60b5dbf0154 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c | |||
@@ -107,6 +107,9 @@ struct wm8994_priv { | |||
107 | 107 | ||
108 | int revision; | 108 | int revision; |
109 | struct wm8994_pdata *pdata; | 109 | struct wm8994_pdata *pdata; |
110 | |||
111 | unsigned int aif1clk_enable:1; | ||
112 | unsigned int aif2clk_enable:1; | ||
110 | }; | 113 | }; |
111 | 114 | ||
112 | static int wm8994_readable(unsigned int reg) | 115 | static int wm8994_readable(unsigned int reg) |
@@ -1004,6 +1007,93 @@ static void wm8994_update_class_w(struct snd_soc_codec *codec) | |||
1004 | } | 1007 | } |
1005 | } | 1008 | } |
1006 | 1009 | ||
1010 | static int late_enable_ev(struct snd_soc_dapm_widget *w, | ||
1011 | struct snd_kcontrol *kcontrol, int event) | ||
1012 | { | ||
1013 | struct snd_soc_codec *codec = w->codec; | ||
1014 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1015 | |||
1016 | switch (event) { | ||
1017 | case SND_SOC_DAPM_PRE_PMU: | ||
1018 | if (wm8994->aif1clk_enable) | ||
1019 | snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | ||
1020 | WM8994_AIF1CLK_ENA_MASK, | ||
1021 | WM8994_AIF1CLK_ENA); | ||
1022 | if (wm8994->aif2clk_enable) | ||
1023 | snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | ||
1024 | WM8994_AIF2CLK_ENA_MASK, | ||
1025 | WM8994_AIF2CLK_ENA); | ||
1026 | break; | ||
1027 | } | ||
1028 | |||
1029 | return 0; | ||
1030 | } | ||
1031 | |||
1032 | static int late_disable_ev(struct snd_soc_dapm_widget *w, | ||
1033 | struct snd_kcontrol *kcontrol, int event) | ||
1034 | { | ||
1035 | struct snd_soc_codec *codec = w->codec; | ||
1036 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1037 | |||
1038 | switch (event) { | ||
1039 | case SND_SOC_DAPM_POST_PMD: | ||
1040 | if (wm8994->aif1clk_enable) { | ||
1041 | snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | ||
1042 | WM8994_AIF1CLK_ENA_MASK, 0); | ||
1043 | wm8994->aif1clk_enable = 0; | ||
1044 | } | ||
1045 | if (wm8994->aif2clk_enable) { | ||
1046 | snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | ||
1047 | WM8994_AIF2CLK_ENA_MASK, 0); | ||
1048 | wm8994->aif2clk_enable = 0; | ||
1049 | } | ||
1050 | break; | ||
1051 | } | ||
1052 | |||
1053 | return 0; | ||
1054 | } | ||
1055 | |||
1056 | static int aif1clk_ev(struct snd_soc_dapm_widget *w, | ||
1057 | struct snd_kcontrol *kcontrol, int event) | ||
1058 | { | ||
1059 | struct snd_soc_codec *codec = w->codec; | ||
1060 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1061 | |||
1062 | switch (event) { | ||
1063 | case SND_SOC_DAPM_PRE_PMU: | ||
1064 | wm8994->aif1clk_enable = 1; | ||
1065 | break; | ||
1066 | } | ||
1067 | |||
1068 | return 0; | ||
1069 | } | ||
1070 | |||
1071 | static int aif2clk_ev(struct snd_soc_dapm_widget *w, | ||
1072 | struct snd_kcontrol *kcontrol, int event) | ||
1073 | { | ||
1074 | struct snd_soc_codec *codec = w->codec; | ||
1075 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | ||
1076 | |||
1077 | switch (event) { | ||
1078 | case SND_SOC_DAPM_PRE_PMU: | ||
1079 | wm8994->aif2clk_enable = 1; | ||
1080 | break; | ||
1081 | } | ||
1082 | |||
1083 | return 0; | ||
1084 | } | ||
1085 | |||
1086 | static int dac_ev(struct snd_soc_dapm_widget *w, | ||
1087 | struct snd_kcontrol *kcontrol, int event) | ||
1088 | { | ||
1089 | struct snd_soc_codec *codec = w->codec; | ||
1090 | unsigned int mask = 1 << w->shift; | ||
1091 | |||
1092 | snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, | ||
1093 | mask, mask); | ||
1094 | return 0; | ||
1095 | } | ||
1096 | |||
1007 | static const char *hp_mux_text[] = { | 1097 | static const char *hp_mux_text[] = { |
1008 | "Mixer", | 1098 | "Mixer", |
1009 | "DAC", | 1099 | "DAC", |
@@ -1272,6 +1362,47 @@ static const struct soc_enum aif2dacr_src_enum = | |||
1272 | static const struct snd_kcontrol_new aif2dacr_src_mux = | 1362 | static const struct snd_kcontrol_new aif2dacr_src_mux = |
1273 | SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum); | 1363 | SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum); |
1274 | 1364 | ||
1365 | static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = { | ||
1366 | SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_ev, | ||
1367 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
1368 | SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_ev, | ||
1369 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
1370 | |||
1371 | SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1372 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1373 | SND_SOC_DAPM_PGA_E("Late DAC1R Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1374 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1375 | SND_SOC_DAPM_PGA_E("Late DAC2L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1376 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1377 | SND_SOC_DAPM_PGA_E("Late DAC2R Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
1378 | late_enable_ev, SND_SOC_DAPM_PRE_PMU), | ||
1379 | |||
1380 | SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev) | ||
1381 | }; | ||
1382 | |||
1383 | static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = { | ||
1384 | SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), | ||
1385 | SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0) | ||
1386 | }; | ||
1387 | |||
1388 | static const struct snd_soc_dapm_widget wm8994_dac_revd_widgets[] = { | ||
1389 | SND_SOC_DAPM_DAC_E("DAC2L", NULL, SND_SOC_NOPM, 3, 0, | ||
1390 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1391 | SND_SOC_DAPM_DAC_E("DAC2R", NULL, SND_SOC_NOPM, 2, 0, | ||
1392 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1393 | SND_SOC_DAPM_DAC_E("DAC1L", NULL, SND_SOC_NOPM, 1, 0, | ||
1394 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1395 | SND_SOC_DAPM_DAC_E("DAC1R", NULL, SND_SOC_NOPM, 0, 0, | ||
1396 | dac_ev, SND_SOC_DAPM_PRE_PMU), | ||
1397 | }; | ||
1398 | |||
1399 | static const struct snd_soc_dapm_widget wm8994_dac_widgets[] = { | ||
1400 | SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0), | ||
1401 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0), | ||
1402 | SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0), | ||
1403 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), | ||
1404 | }; | ||
1405 | |||
1275 | static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { | 1406 | static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { |
1276 | SND_SOC_DAPM_INPUT("DMIC1DAT"), | 1407 | SND_SOC_DAPM_INPUT("DMIC1DAT"), |
1277 | SND_SOC_DAPM_INPUT("DMIC2DAT"), | 1408 | SND_SOC_DAPM_INPUT("DMIC2DAT"), |
@@ -1284,9 +1415,6 @@ SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0), | |||
1284 | SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), | 1415 | SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), |
1285 | SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), | 1416 | SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), |
1286 | 1417 | ||
1287 | SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), | ||
1288 | SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0), | ||
1289 | |||
1290 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL, | 1418 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL, |
1291 | 0, WM8994_POWER_MANAGEMENT_4, 9, 0), | 1419 | 0, WM8994_POWER_MANAGEMENT_4, 9, 0), |
1292 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL, | 1420 | SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL, |
@@ -1372,11 +1500,6 @@ SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), | |||
1372 | SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), | 1500 | SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), |
1373 | SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), | 1501 | SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), |
1374 | 1502 | ||
1375 | SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0), | ||
1376 | SND_SOC_DAPM_DAC("DAC2R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0), | ||
1377 | SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0), | ||
1378 | SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), | ||
1379 | |||
1380 | SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), | 1503 | SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), |
1381 | SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), | 1504 | SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), |
1382 | 1505 | ||
@@ -1516,14 +1639,12 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1516 | { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" }, | 1639 | { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" }, |
1517 | 1640 | ||
1518 | /* DAC1 inputs */ | 1641 | /* DAC1 inputs */ |
1519 | { "DAC1L", NULL, "DAC1L Mixer" }, | ||
1520 | { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" }, | 1642 | { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" }, |
1521 | { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | 1643 | { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, |
1522 | { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | 1644 | { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, |
1523 | { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, | 1645 | { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, |
1524 | { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | 1646 | { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, |
1525 | 1647 | ||
1526 | { "DAC1R", NULL, "DAC1R Mixer" }, | ||
1527 | { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" }, | 1648 | { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" }, |
1528 | { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | 1649 | { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, |
1529 | { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | 1650 | { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, |
@@ -1532,7 +1653,6 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1532 | 1653 | ||
1533 | /* DAC2/AIF2 outputs */ | 1654 | /* DAC2/AIF2 outputs */ |
1534 | { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" }, | 1655 | { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" }, |
1535 | { "DAC2L", NULL, "AIF2DAC2L Mixer" }, | ||
1536 | { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" }, | 1656 | { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" }, |
1537 | { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | 1657 | { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, |
1538 | { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | 1658 | { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, |
@@ -1540,7 +1660,6 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1540 | { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | 1660 | { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, |
1541 | 1661 | ||
1542 | { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" }, | 1662 | { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" }, |
1543 | { "DAC2R", NULL, "AIF2DAC2R Mixer" }, | ||
1544 | { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" }, | 1663 | { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" }, |
1545 | { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | 1664 | { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, |
1546 | { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | 1665 | { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, |
@@ -1584,6 +1703,24 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
1584 | { "Right Headphone Mux", "DAC", "DAC1R" }, | 1703 | { "Right Headphone Mux", "DAC", "DAC1R" }, |
1585 | }; | 1704 | }; |
1586 | 1705 | ||
1706 | static const struct snd_soc_dapm_route wm8994_lateclk_revd_intercon[] = { | ||
1707 | { "DAC1L", NULL, "Late DAC1L Enable PGA" }, | ||
1708 | { "Late DAC1L Enable PGA", NULL, "DAC1L Mixer" }, | ||
1709 | { "DAC1R", NULL, "Late DAC1R Enable PGA" }, | ||
1710 | { "Late DAC1R Enable PGA", NULL, "DAC1R Mixer" }, | ||
1711 | { "DAC2L", NULL, "Late DAC2L Enable PGA" }, | ||
1712 | { "Late DAC2L Enable PGA", NULL, "AIF2DAC2L Mixer" }, | ||
1713 | { "DAC2R", NULL, "Late DAC2R Enable PGA" }, | ||
1714 | { "Late DAC2R Enable PGA", NULL, "AIF2DAC2R Mixer" } | ||
1715 | }; | ||
1716 | |||
1717 | static const struct snd_soc_dapm_route wm8994_lateclk_intercon[] = { | ||
1718 | { "DAC1L", NULL, "DAC1L Mixer" }, | ||
1719 | { "DAC1R", NULL, "DAC1R Mixer" }, | ||
1720 | { "DAC2L", NULL, "AIF2DAC2L Mixer" }, | ||
1721 | { "DAC2R", NULL, "AIF2DAC2R Mixer" }, | ||
1722 | }; | ||
1723 | |||
1587 | static const struct snd_soc_dapm_route wm8994_revd_intercon[] = { | 1724 | static const struct snd_soc_dapm_route wm8994_revd_intercon[] = { |
1588 | { "AIF1DACDAT", NULL, "AIF2DACDAT" }, | 1725 | { "AIF1DACDAT", NULL, "AIF2DACDAT" }, |
1589 | { "AIF2DACDAT", NULL, "AIF1DACDAT" }, | 1726 | { "AIF2DACDAT", NULL, "AIF1DACDAT" }, |
@@ -2514,6 +2651,22 @@ static int wm8994_resume(struct snd_soc_codec *codec) | |||
2514 | { | 2651 | { |
2515 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | 2652 | struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); |
2516 | int i, ret; | 2653 | int i, ret; |
2654 | unsigned int val, mask; | ||
2655 | |||
2656 | if (wm8994->revision < 4) { | ||
2657 | /* force a HW read */ | ||
2658 | val = wm8994_reg_read(codec->control_data, | ||
2659 | WM8994_POWER_MANAGEMENT_5); | ||
2660 | |||
2661 | /* modify the cache only */ | ||
2662 | codec->cache_only = 1; | ||
2663 | mask = WM8994_DAC1R_ENA | WM8994_DAC1L_ENA | | ||
2664 | WM8994_DAC2R_ENA | WM8994_DAC2L_ENA; | ||
2665 | val &= mask; | ||
2666 | snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, | ||
2667 | mask, val); | ||
2668 | codec->cache_only = 0; | ||
2669 | } | ||
2517 | 2670 | ||
2518 | /* Restore the registers */ | 2671 | /* Restore the registers */ |
2519 | ret = snd_soc_cache_sync(codec); | 2672 | ret = snd_soc_cache_sync(codec); |
@@ -3125,6 +3278,17 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
3125 | case WM8994: | 3278 | case WM8994: |
3126 | snd_soc_dapm_new_controls(dapm, wm8994_specific_dapm_widgets, | 3279 | snd_soc_dapm_new_controls(dapm, wm8994_specific_dapm_widgets, |
3127 | ARRAY_SIZE(wm8994_specific_dapm_widgets)); | 3280 | ARRAY_SIZE(wm8994_specific_dapm_widgets)); |
3281 | if (wm8994->revision < 4) { | ||
3282 | snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets, | ||
3283 | ARRAY_SIZE(wm8994_lateclk_revd_widgets)); | ||
3284 | snd_soc_dapm_new_controls(dapm, wm8994_dac_revd_widgets, | ||
3285 | ARRAY_SIZE(wm8994_dac_revd_widgets)); | ||
3286 | } else { | ||
3287 | snd_soc_dapm_new_controls(dapm, wm8994_lateclk_widgets, | ||
3288 | ARRAY_SIZE(wm8994_lateclk_widgets)); | ||
3289 | snd_soc_dapm_new_controls(dapm, wm8994_dac_widgets, | ||
3290 | ARRAY_SIZE(wm8994_dac_widgets)); | ||
3291 | } | ||
3128 | break; | 3292 | break; |
3129 | case WM8958: | 3293 | case WM8958: |
3130 | snd_soc_add_controls(codec, wm8958_snd_controls, | 3294 | snd_soc_add_controls(codec, wm8958_snd_controls, |
@@ -3143,10 +3307,15 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
3143 | snd_soc_dapm_add_routes(dapm, wm8994_intercon, | 3307 | snd_soc_dapm_add_routes(dapm, wm8994_intercon, |
3144 | ARRAY_SIZE(wm8994_intercon)); | 3308 | ARRAY_SIZE(wm8994_intercon)); |
3145 | 3309 | ||
3146 | if (wm8994->revision < 4) | 3310 | if (wm8994->revision < 4) { |
3147 | snd_soc_dapm_add_routes(dapm, wm8994_revd_intercon, | 3311 | snd_soc_dapm_add_routes(dapm, wm8994_revd_intercon, |
3148 | ARRAY_SIZE(wm8994_revd_intercon)); | 3312 | ARRAY_SIZE(wm8994_revd_intercon)); |
3149 | 3313 | snd_soc_dapm_add_routes(dapm, wm8994_lateclk_revd_intercon, | |
3314 | ARRAY_SIZE(wm8994_lateclk_revd_intercon)); | ||
3315 | } else { | ||
3316 | snd_soc_dapm_add_routes(dapm, wm8994_lateclk_intercon, | ||
3317 | ARRAY_SIZE(wm8994_lateclk_intercon)); | ||
3318 | } | ||
3150 | break; | 3319 | break; |
3151 | case WM8958: | 3320 | case WM8958: |
3152 | snd_soc_dapm_add_routes(dapm, wm8958_intercon, | 3321 | snd_soc_dapm_add_routes(dapm, wm8958_intercon, |
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 8194f150bab7..25e54230cc6a 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c | |||
@@ -712,7 +712,15 @@ static int dapm_supply_check_power(struct snd_soc_dapm_widget *w) | |||
712 | !path->connected(path->source, path->sink)) | 712 | !path->connected(path->source, path->sink)) |
713 | continue; | 713 | continue; |
714 | 714 | ||
715 | if (path->sink && path->sink->power_check && | 715 | if (!path->sink) |
716 | continue; | ||
717 | |||
718 | if (path->sink->force) { | ||
719 | power = 1; | ||
720 | break; | ||
721 | } | ||
722 | |||
723 | if (path->sink->power_check && | ||
716 | path->sink->power_check(path->sink)) { | 724 | path->sink->power_check(path->sink)) { |
717 | power = 1; | 725 | power = 1; |
718 | break; | 726 | break; |
@@ -1627,6 +1635,7 @@ EXPORT_SYMBOL_GPL(snd_soc_dapm_add_routes); | |||
1627 | int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) | 1635 | int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) |
1628 | { | 1636 | { |
1629 | struct snd_soc_dapm_widget *w; | 1637 | struct snd_soc_dapm_widget *w; |
1638 | unsigned int val; | ||
1630 | 1639 | ||
1631 | list_for_each_entry(w, &dapm->card->widgets, list) | 1640 | list_for_each_entry(w, &dapm->card->widgets, list) |
1632 | { | 1641 | { |
@@ -1675,6 +1684,18 @@ int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) | |||
1675 | case snd_soc_dapm_post: | 1684 | case snd_soc_dapm_post: |
1676 | break; | 1685 | break; |
1677 | } | 1686 | } |
1687 | |||
1688 | /* Read the initial power state from the device */ | ||
1689 | if (w->reg >= 0) { | ||
1690 | val = snd_soc_read(w->codec, w->reg); | ||
1691 | val &= 1 << w->shift; | ||
1692 | if (w->invert) | ||
1693 | val = !val; | ||
1694 | |||
1695 | if (val) | ||
1696 | w->power = 1; | ||
1697 | } | ||
1698 | |||
1678 | w->new = 1; | 1699 | w->new = 1; |
1679 | } | 1700 | } |
1680 | 1701 | ||
diff --git a/sound/usb/caiaq/audio.c b/sound/usb/caiaq/audio.c index 68b97477577b..66eabafb1c24 100644 --- a/sound/usb/caiaq/audio.c +++ b/sound/usb/caiaq/audio.c | |||
@@ -785,7 +785,7 @@ int snd_usb_caiaq_audio_init(struct snd_usb_caiaqdev *dev) | |||
785 | } | 785 | } |
786 | 786 | ||
787 | dev->pcm->private_data = dev; | 787 | dev->pcm->private_data = dev; |
788 | strcpy(dev->pcm->name, dev->product_name); | 788 | strlcpy(dev->pcm->name, dev->product_name, sizeof(dev->pcm->name)); |
789 | 789 | ||
790 | memset(dev->sub_playback, 0, sizeof(dev->sub_playback)); | 790 | memset(dev->sub_playback, 0, sizeof(dev->sub_playback)); |
791 | memset(dev->sub_capture, 0, sizeof(dev->sub_capture)); | 791 | memset(dev->sub_capture, 0, sizeof(dev->sub_capture)); |
diff --git a/sound/usb/caiaq/midi.c b/sound/usb/caiaq/midi.c index 2f218c77fff2..a1a47088fd0c 100644 --- a/sound/usb/caiaq/midi.c +++ b/sound/usb/caiaq/midi.c | |||
@@ -136,7 +136,7 @@ int snd_usb_caiaq_midi_init(struct snd_usb_caiaqdev *device) | |||
136 | if (ret < 0) | 136 | if (ret < 0) |
137 | return ret; | 137 | return ret; |
138 | 138 | ||
139 | strcpy(rmidi->name, device->product_name); | 139 | strlcpy(rmidi->name, device->product_name, sizeof(rmidi->name)); |
140 | 140 | ||
141 | rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX; | 141 | rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX; |
142 | rmidi->private_data = device; | 142 | rmidi->private_data = device; |