diff options
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-4965.c | 33 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl4965-base.c | 31 |
2 files changed, 31 insertions, 33 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 9ae8525b9b60..c0ba28fa6724 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -341,39 +341,6 @@ err: | |||
341 | return -EINVAL; | 341 | return -EINVAL; |
342 | 342 | ||
343 | } | 343 | } |
344 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) | ||
345 | { | ||
346 | int ret; | ||
347 | unsigned long flags; | ||
348 | |||
349 | spin_lock_irqsave(&priv->lock, flags); | ||
350 | ret = iwl_grab_nic_access(priv); | ||
351 | if (ret) { | ||
352 | spin_unlock_irqrestore(&priv->lock, flags); | ||
353 | return ret; | ||
354 | } | ||
355 | |||
356 | if (src == IWL_PWR_SRC_VAUX) { | ||
357 | u32 val; | ||
358 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, | ||
359 | &val); | ||
360 | |||
361 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) { | ||
362 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
363 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | ||
364 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
365 | } | ||
366 | } else { | ||
367 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
368 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | ||
369 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
370 | } | ||
371 | |||
372 | iwl_release_nic_access(priv); | ||
373 | spin_unlock_irqrestore(&priv->lock, flags); | ||
374 | |||
375 | return ret; | ||
376 | } | ||
377 | 344 | ||
378 | /* | 345 | /* |
379 | * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask | 346 | * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask |
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl4965-base.c index 94ce026ba602..ac02342d2281 100644 --- a/drivers/net/wireless/iwlwifi/iwl4965-base.c +++ b/drivers/net/wireless/iwlwifi/iwl4965-base.c | |||
@@ -1262,6 +1262,37 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, | |||
1262 | wake_up_interruptible(&priv->wait_command_queue); | 1262 | wake_up_interruptible(&priv->wait_command_queue); |
1263 | } | 1263 | } |
1264 | 1264 | ||
1265 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) | ||
1266 | { | ||
1267 | int ret; | ||
1268 | unsigned long flags; | ||
1269 | |||
1270 | spin_lock_irqsave(&priv->lock, flags); | ||
1271 | ret = iwl_grab_nic_access(priv); | ||
1272 | if (ret) | ||
1273 | goto err; | ||
1274 | |||
1275 | if (src == IWL_PWR_SRC_VAUX) { | ||
1276 | u32 val; | ||
1277 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, | ||
1278 | &val); | ||
1279 | |||
1280 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | ||
1281 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
1282 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | ||
1283 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
1284 | } else { | ||
1285 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
1286 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | ||
1287 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
1288 | } | ||
1289 | |||
1290 | iwl_release_nic_access(priv); | ||
1291 | err: | ||
1292 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1293 | return ret; | ||
1294 | } | ||
1295 | |||
1265 | /** | 1296 | /** |
1266 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks | 1297 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
1267 | * | 1298 | * |