diff options
-rw-r--r-- | arch/arm/mach-ep93xx/core.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 94bba0b87e36..829aed696d98 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -152,7 +152,8 @@ struct sys_timer ep93xx_timer = { | |||
152 | /************************************************************************* | 152 | /************************************************************************* |
153 | * GPIO handling for EP93xx | 153 | * GPIO handling for EP93xx |
154 | *************************************************************************/ | 154 | *************************************************************************/ |
155 | static unsigned char gpio_int_enable[3]; | 155 | static unsigned char gpio_int_unmasked[3]; |
156 | static unsigned char gpio_int_enabled[3]; | ||
156 | static unsigned char gpio_int_type1[3]; | 157 | static unsigned char gpio_int_type1[3]; |
157 | static unsigned char gpio_int_type2[3]; | 158 | static unsigned char gpio_int_type2[3]; |
158 | 159 | ||
@@ -162,17 +163,17 @@ static void update_gpio_int_params(int abf) | |||
162 | __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); | 163 | __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); |
163 | __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); | 164 | __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); |
164 | __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); | 165 | __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); |
165 | __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE); | 166 | __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE); |
166 | } else if (abf == 1) { | 167 | } else if (abf == 1) { |
167 | __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); | 168 | __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); |
168 | __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); | 169 | __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); |
169 | __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); | 170 | __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); |
170 | __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE); | 171 | __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE); |
171 | } else if (abf == 2) { | 172 | } else if (abf == 2) { |
172 | __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE); | 173 | __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE); |
173 | __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2); | 174 | __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2); |
174 | __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1); | 175 | __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1); |
175 | __raw_writeb(gpio_int_enable[2], EP93XX_GPIO_F_INT_ENABLE); | 176 | __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE); |
176 | } else { | 177 | } else { |
177 | BUG(); | 178 | BUG(); |
178 | } | 179 | } |
@@ -200,11 +201,11 @@ void gpio_line_config(int line, int direction) | |||
200 | if (direction == GPIO_OUT) { | 201 | if (direction == GPIO_OUT) { |
201 | if (line >= 0 && line < 16) { | 202 | if (line >= 0 && line < 16) { |
202 | /* Port A/B. */ | 203 | /* Port A/B. */ |
203 | gpio_int_enable[line >> 3] &= ~(1 << (line & 7)); | 204 | gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); |
204 | update_gpio_int_params(line >> 3); | 205 | update_gpio_int_params(line >> 3); |
205 | } else if (line >= 40 && line < 48) { | 206 | } else if (line >= 40 && line < 48) { |
206 | /* Port F. */ | 207 | /* Port F. */ |
207 | gpio_int_enable[2] &= ~(1 << (line & 7)); | 208 | gpio_int_unmasked[2] &= ~(1 << (line & 7)); |
208 | update_gpio_int_params(2); | 209 | update_gpio_int_params(2); |
209 | } | 210 | } |
210 | 211 | ||
@@ -290,7 +291,7 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq) | |||
290 | int line = irq - IRQ_EP93XX_GPIO(0); | 291 | int line = irq - IRQ_EP93XX_GPIO(0); |
291 | int port = line >> 3; | 292 | int port = line >> 3; |
292 | 293 | ||
293 | gpio_int_enable[port] &= ~(1 << (line & 7)); | 294 | gpio_int_unmasked[port] &= ~(1 << (line & 7)); |
294 | update_gpio_int_params(port); | 295 | update_gpio_int_params(port); |
295 | 296 | ||
296 | if (port == 0) { | 297 | if (port == 0) { |
@@ -307,7 +308,7 @@ static void ep93xx_gpio_irq_mask(unsigned int irq) | |||
307 | int line = irq - IRQ_EP93XX_GPIO(0); | 308 | int line = irq - IRQ_EP93XX_GPIO(0); |
308 | int port = line >> 3; | 309 | int port = line >> 3; |
309 | 310 | ||
310 | gpio_int_enable[port] &= ~(1 << (line & 7)); | 311 | gpio_int_unmasked[port] &= ~(1 << (line & 7)); |
311 | update_gpio_int_params(port); | 312 | update_gpio_int_params(port); |
312 | } | 313 | } |
313 | 314 | ||
@@ -316,7 +317,7 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq) | |||
316 | int line = irq - IRQ_EP93XX_GPIO(0); | 317 | int line = irq - IRQ_EP93XX_GPIO(0); |
317 | int port = line >> 3; | 318 | int port = line >> 3; |
318 | 319 | ||
319 | gpio_int_enable[port] |= 1 << (line & 7); | 320 | gpio_int_unmasked[port] |= 1 << (line & 7); |
320 | update_gpio_int_params(port); | 321 | update_gpio_int_params(port); |
321 | } | 322 | } |
322 | 323 | ||
@@ -342,17 +343,23 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) | |||
342 | line &= 7; | 343 | line &= 7; |
343 | 344 | ||
344 | if (type & IRQT_RISING) { | 345 | if (type & IRQT_RISING) { |
346 | gpio_int_enabled[port] |= 1 << line; | ||
345 | gpio_int_type1[port] |= 1 << line; | 347 | gpio_int_type1[port] |= 1 << line; |
346 | gpio_int_type2[port] |= 1 << line; | 348 | gpio_int_type2[port] |= 1 << line; |
347 | } else if (type & IRQT_FALLING) { | 349 | } else if (type & IRQT_FALLING) { |
350 | gpio_int_enabled[port] |= 1 << line; | ||
348 | gpio_int_type1[port] |= 1 << line; | 351 | gpio_int_type1[port] |= 1 << line; |
349 | gpio_int_type2[port] &= ~(1 << line); | 352 | gpio_int_type2[port] &= ~(1 << line); |
350 | } else if (type & IRQT_HIGH) { | 353 | } else if (type & IRQT_HIGH) { |
354 | gpio_int_enabled[port] |= 1 << line; | ||
351 | gpio_int_type1[port] &= ~(1 << line); | 355 | gpio_int_type1[port] &= ~(1 << line); |
352 | gpio_int_type2[port] |= 1 << line; | 356 | gpio_int_type2[port] |= 1 << line; |
353 | } else if (type & IRQT_LOW) { | 357 | } else if (type & IRQT_LOW) { |
358 | gpio_int_enabled[port] |= 1 << line; | ||
354 | gpio_int_type1[port] &= ~(1 << line); | 359 | gpio_int_type1[port] &= ~(1 << line); |
355 | gpio_int_type2[port] &= ~(1 << line); | 360 | gpio_int_type2[port] &= ~(1 << line); |
361 | } else { | ||
362 | gpio_int_enabled[port] &= ~(1 << line); | ||
356 | } | 363 | } |
357 | update_gpio_int_params(port); | 364 | update_gpio_int_params(port); |
358 | 365 | ||