diff options
59 files changed, 591 insertions, 1425 deletions
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index 42002b742deb..bcdf5ad0f035 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c | |||
| @@ -896,13 +896,6 @@ static inline unsigned long get_irqmask(int irq_nr) | |||
| 896 | return 1 << irq_nr; | 896 | return 1 << irq_nr; |
| 897 | } | 897 | } |
| 898 | 898 | ||
| 899 | static inline char *pcic_irq_itoa(unsigned int irq) | ||
| 900 | { | ||
| 901 | static char buff[16]; | ||
| 902 | sprintf(buff, "%d", irq); | ||
| 903 | return buff; | ||
| 904 | } | ||
| 905 | |||
| 906 | static void pcic_disable_irq(unsigned int irq_nr) | 899 | static void pcic_disable_irq(unsigned int irq_nr) |
| 907 | { | 900 | { |
| 908 | unsigned long mask, flags; | 901 | unsigned long mask, flags; |
| @@ -955,7 +948,6 @@ void __init sun4m_pci_init_IRQ(void) | |||
| 955 | BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); | 948 | BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); |
| 956 | BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM); | 949 | BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM); |
| 957 | BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); | 950 | BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); |
| 958 | BTFIXUPSET_CALL(__irq_itoa, pcic_irq_itoa, BTFIXUPCALL_NORM); | ||
| 959 | } | 951 | } |
| 960 | 952 | ||
| 961 | int pcibios_assign_resource(struct pci_dev *pdev, int resource) | 953 | int pcibios_assign_resource(struct pci_dev *pdev, int resource) |
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index 3509e4305532..2cbf282f0d00 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <linux/console.h> | 31 | #include <linux/console.h> |
| 32 | #include <linux/spinlock.h> | 32 | #include <linux/spinlock.h> |
| 33 | #include <linux/root_dev.h> | 33 | #include <linux/root_dev.h> |
| 34 | #include <linux/cpu.h> | ||
| 34 | 35 | ||
| 35 | #include <asm/system.h> | 36 | #include <asm/system.h> |
| 36 | #include <asm/io.h> | 37 | #include <asm/io.h> |
| @@ -348,6 +349,8 @@ void __init setup_arch(char **cmdline_p) | |||
| 348 | init_mm.context = (unsigned long) NO_CONTEXT; | 349 | init_mm.context = (unsigned long) NO_CONTEXT; |
| 349 | init_task.thread.kregs = &fake_swapper_regs; | 350 | init_task.thread.kregs = &fake_swapper_regs; |
| 350 | 351 | ||
| 352 | smp_setup_cpu_possible_map(); | ||
| 353 | |||
| 351 | paging_init(); | 354 | paging_init(); |
| 352 | } | 355 | } |
| 353 | 356 | ||
| @@ -389,6 +392,8 @@ console_initcall(set_preferred_console); | |||
| 389 | extern char *sparc_cpu_type; | 392 | extern char *sparc_cpu_type; |
| 390 | extern char *sparc_fpu_type; | 393 | extern char *sparc_fpu_type; |
| 391 | 394 | ||
| 395 | static int ncpus_probed; | ||
| 396 | |||
| 392 | static int show_cpuinfo(struct seq_file *m, void *__unused) | 397 | static int show_cpuinfo(struct seq_file *m, void *__unused) |
| 393 | { | 398 | { |
| 394 | seq_printf(m, | 399 | seq_printf(m, |
| @@ -411,7 +416,7 @@ static int show_cpuinfo(struct seq_file *m, void *__unused) | |||
| 411 | romvec->pv_printrev >> 16, | 416 | romvec->pv_printrev >> 16, |
| 412 | romvec->pv_printrev & 0xffff, | 417 | romvec->pv_printrev & 0xffff, |
| 413 | &cputypval, | 418 | &cputypval, |
| 414 | num_possible_cpus(), | 419 | ncpus_probed, |
| 415 | num_online_cpus() | 420 | num_online_cpus() |
| 416 | #ifndef CONFIG_SMP | 421 | #ifndef CONFIG_SMP |
| 417 | , cpu_data(0).udelay_val/(500000/HZ), | 422 | , cpu_data(0).udelay_val/(500000/HZ), |
| @@ -471,3 +476,30 @@ void sun_do_break(void) | |||
| 471 | 476 | ||
| 472 | int serial_console = -1; | 477 | int serial_console = -1; |
| 473 | int stop_a_enabled = 1; | 478 | int stop_a_enabled = 1; |
| 479 | |||
| 480 | static int __init topology_init(void) | ||
| 481 | { | ||
| 482 | int i, ncpus, err; | ||
| 483 | |||
| 484 | /* Count the number of physically present processors in | ||
| 485 | * the machine, even on uniprocessor, so that /proc/cpuinfo | ||
| 486 | * output is consistent with 2.4.x | ||
| 487 | */ | ||
| 488 | ncpus = 0; | ||
| 489 | while (!cpu_find_by_instance(ncpus, NULL, NULL)) | ||
| 490 | ncpus++; | ||
| 491 | ncpus_probed = ncpus; | ||
| 492 | |||
| 493 | err = 0; | ||
| 494 | for_each_online_cpu(i) { | ||
| 495 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); | ||
| 496 | if (!p) | ||
| 497 | err = -ENOMEM; | ||
| 498 | else | ||
| 499 | register_cpu(p, i, NULL); | ||
| 500 | } | ||
| 501 | |||
| 502 | return err; | ||
| 503 | } | ||
| 504 | |||
| 505 | subsys_initcall(topology_init); | ||
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c index 40b42c88e6a7..6135d4faeeeb 100644 --- a/arch/sparc/kernel/smp.c +++ b/arch/sparc/kernel/smp.c | |||
| @@ -58,7 +58,7 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE; | |||
| 58 | /* Used to make bitops atomic */ | 58 | /* Used to make bitops atomic */ |
| 59 | unsigned char bitops_spinlock = 0; | 59 | unsigned char bitops_spinlock = 0; |
| 60 | 60 | ||
| 61 | void __init smp_store_cpu_info(int id) | 61 | void __cpuinit smp_store_cpu_info(int id) |
| 62 | { | 62 | { |
| 63 | int cpu_node; | 63 | int cpu_node; |
| 64 | 64 | ||
| @@ -267,22 +267,18 @@ int setup_profiling_timer(unsigned int multiplier) | |||
| 267 | void __init smp_prepare_cpus(unsigned int max_cpus) | 267 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 268 | { | 268 | { |
| 269 | extern void smp4m_boot_cpus(void); | 269 | extern void smp4m_boot_cpus(void); |
| 270 | int i, cpuid, ncpus, extra; | 270 | int i, cpuid, extra; |
| 271 | 271 | ||
| 272 | BUG_ON(sparc_cpu_model != sun4m); | 272 | BUG_ON(sparc_cpu_model != sun4m); |
| 273 | printk("Entering SMP Mode...\n"); | 273 | printk("Entering SMP Mode...\n"); |
| 274 | 274 | ||
| 275 | ncpus = 1; | ||
| 276 | extra = 0; | 275 | extra = 0; |
| 277 | for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) { | 276 | for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) { |
| 278 | if (cpuid == boot_cpu_id) | 277 | if (cpuid >= NR_CPUS) |
| 279 | continue; | ||
| 280 | if (cpuid < NR_CPUS && ncpus++ < max_cpus) | ||
| 281 | cpu_set(cpuid, phys_cpu_present_map); | ||
| 282 | else | ||
| 283 | extra++; | 278 | extra++; |
| 284 | } | 279 | } |
| 285 | if (max_cpus >= NR_CPUS && extra) | 280 | /* i = number of cpus */ |
| 281 | if (extra && max_cpus > i - extra) | ||
| 286 | printk("Warning: NR_CPUS is too low to start all cpus\n"); | 282 | printk("Warning: NR_CPUS is too low to start all cpus\n"); |
| 287 | 283 | ||
| 288 | smp_store_cpu_info(boot_cpu_id); | 284 | smp_store_cpu_info(boot_cpu_id); |
| @@ -290,7 +286,25 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
| 290 | smp4m_boot_cpus(); | 286 | smp4m_boot_cpus(); |
| 291 | } | 287 | } |
| 292 | 288 | ||
| 293 | void __devinit smp_prepare_boot_cpu(void) | 289 | /* Set this up early so that things like the scheduler can init |
| 290 | * properly. We use the same cpu mask for both the present and | ||
| 291 | * possible cpu map. | ||
| 292 | */ | ||
| 293 | void __init smp_setup_cpu_possible_map(void) | ||
| 294 | { | ||
| 295 | int instance, mid; | ||
| 296 | |||
| 297 | instance = 0; | ||
| 298 | while (!cpu_find_by_instance(instance, NULL, &mid)) { | ||
| 299 | if (mid < NR_CPUS) { | ||
| 300 | cpu_set(mid, phys_cpu_present_map); | ||
| 301 | cpu_set(mid, cpu_present_map); | ||
| 302 | } | ||
| 303 | instance++; | ||
| 304 | } | ||
| 305 | } | ||
| 306 | |||
| 307 | void __init smp_prepare_boot_cpu(void) | ||
| 294 | { | 308 | { |
| 295 | int cpuid = hard_smp_processor_id(); | 309 | int cpuid = hard_smp_processor_id(); |
| 296 | 310 | ||
| @@ -306,7 +320,7 @@ void __devinit smp_prepare_boot_cpu(void) | |||
| 306 | cpu_set(cpuid, phys_cpu_present_map); | 320 | cpu_set(cpuid, phys_cpu_present_map); |
| 307 | } | 321 | } |
| 308 | 322 | ||
| 309 | int __devinit __cpu_up(unsigned int cpu) | 323 | int __cpuinit __cpu_up(unsigned int cpu) |
| 310 | { | 324 | { |
| 311 | extern int smp4m_boot_one_cpu(int); | 325 | extern int smp4m_boot_one_cpu(int); |
| 312 | int ret; | 326 | int ret; |
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c index 4b376fae752c..fd7deabf9982 100644 --- a/arch/sparc/kernel/sparc_ksyms.c +++ b/arch/sparc/kernel/sparc_ksyms.c | |||
| @@ -163,7 +163,6 @@ EXPORT_SYMBOL(BTFIXUP_CALL(__hard_smp_processor_id)); | |||
| 163 | #endif | 163 | #endif |
| 164 | EXPORT_SYMBOL(BTFIXUP_CALL(enable_irq)); | 164 | EXPORT_SYMBOL(BTFIXUP_CALL(enable_irq)); |
| 165 | EXPORT_SYMBOL(BTFIXUP_CALL(disable_irq)); | 165 | EXPORT_SYMBOL(BTFIXUP_CALL(disable_irq)); |
| 166 | EXPORT_SYMBOL(BTFIXUP_CALL(__irq_itoa)); | ||
| 167 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea)); | 166 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea)); |
| 168 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_lockarea)); | 167 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_lockarea)); |
| 169 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_sgl)); | 168 | EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_sgl)); |
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index 3d6a99073c42..0f2d8d9cbdba 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c | |||
| @@ -198,8 +198,6 @@ static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *, stru | |||
| 198 | static void sun4c_nop(void) {} | 198 | static void sun4c_nop(void) {} |
| 199 | #endif | 199 | #endif |
| 200 | 200 | ||
| 201 | extern char *sun4m_irq_itoa(unsigned int irq); | ||
| 202 | |||
| 203 | void __init sun4c_init_IRQ(void) | 201 | void __init sun4c_init_IRQ(void) |
| 204 | { | 202 | { |
| 205 | struct linux_prom_registers int_regs[2]; | 203 | struct linux_prom_registers int_regs[2]; |
| @@ -238,7 +236,6 @@ void __init sun4c_init_IRQ(void) | |||
| 238 | BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM); | 236 | BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM); |
| 239 | BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP); | 237 | BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP); |
| 240 | BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP); | 238 | BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP); |
| 241 | BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM); | ||
| 242 | sparc_init_timers = sun4c_init_timers; | 239 | sparc_init_timers = sun4c_init_timers; |
| 243 | #ifdef CONFIG_SMP | 240 | #ifdef CONFIG_SMP |
| 244 | BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP); | 241 | BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP); |
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index ca656d9bd6fd..9c30e35c88f7 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c | |||
| @@ -560,17 +560,6 @@ void __init sun4d_init_sbi_irq(void) | |||
| 560 | } | 560 | } |
| 561 | } | 561 | } |
| 562 | 562 | ||
| 563 | static char *sun4d_irq_itoa(unsigned int irq) | ||
| 564 | { | ||
| 565 | static char buff[16]; | ||
| 566 | |||
| 567 | if (irq < (1 << 5)) | ||
| 568 | sprintf(buff, "%d", irq); | ||
| 569 | else | ||
| 570 | sprintf(buff, "%d,%x", sbus_to_pil[(irq >> 2) & 7], irq); | ||
| 571 | return buff; | ||
| 572 | } | ||
| 573 | |||
| 574 | void __init sun4d_init_IRQ(void) | 563 | void __init sun4d_init_IRQ(void) |
| 575 | { | 564 | { |
| 576 | local_irq_disable(); | 565 | local_irq_disable(); |
| @@ -581,7 +570,6 @@ void __init sun4d_init_IRQ(void) | |||
| 581 | BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM); | 570 | BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM); |
| 582 | BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM); | 571 | BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM); |
| 583 | BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM); | 572 | BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM); |
| 584 | BTFIXUPSET_CALL(__irq_itoa, sun4d_irq_itoa, BTFIXUPCALL_NORM); | ||
| 585 | sparc_init_timers = sun4d_init_timers; | 573 | sparc_init_timers = sun4d_init_timers; |
| 586 | #ifdef CONFIG_SMP | 574 | #ifdef CONFIG_SMP |
| 587 | BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM); | 575 | BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM); |
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 39d712c3c809..a296c13ac18f 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c | |||
| @@ -229,13 +229,6 @@ static void sun4m_load_profile_irq(int cpu, unsigned int limit) | |||
| 229 | sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit; | 229 | sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit; |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | char *sun4m_irq_itoa(unsigned int irq) | ||
| 233 | { | ||
| 234 | static char buff[16]; | ||
| 235 | sprintf(buff, "%d", irq); | ||
| 236 | return buff; | ||
| 237 | } | ||
| 238 | |||
| 239 | static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *)) | 232 | static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *)) |
| 240 | { | 233 | { |
| 241 | int reg_count, irq, cpu; | 234 | int reg_count, irq, cpu; |
| @@ -388,7 +381,6 @@ void __init sun4m_init_IRQ(void) | |||
| 388 | BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM); | 381 | BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM); |
| 389 | BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM); | 382 | BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM); |
| 390 | BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM); | 383 | BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM); |
| 391 | BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM); | ||
| 392 | sparc_init_timers = sun4m_init_timers; | 384 | sparc_init_timers = sun4m_init_timers; |
| 393 | #ifdef CONFIG_SMP | 385 | #ifdef CONFIG_SMP |
| 394 | BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM); | 386 | BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM); |
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index 70b375a4c2c2..3b32096134aa 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c | |||
| @@ -66,7 +66,7 @@ static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val) | |||
| 66 | static void smp_setup_percpu_timer(void); | 66 | static void smp_setup_percpu_timer(void); |
| 67 | extern void cpu_probe(void); | 67 | extern void cpu_probe(void); |
| 68 | 68 | ||
| 69 | void __init smp4m_callin(void) | 69 | void __cpuinit smp4m_callin(void) |
| 70 | { | 70 | { |
| 71 | int cpuid = hard_smp_processor_id(); | 71 | int cpuid = hard_smp_processor_id(); |
| 72 | 72 | ||
| @@ -112,13 +112,8 @@ void __init smp4m_callin(void) | |||
| 112 | local_irq_enable(); | 112 | local_irq_enable(); |
| 113 | 113 | ||
| 114 | cpu_set(cpuid, cpu_online_map); | 114 | cpu_set(cpuid, cpu_online_map); |
| 115 | /* last one in gets all the interrupts (for testing) */ | ||
| 116 | set_irq_udt(boot_cpu_id); | ||
| 117 | } | 115 | } |
| 118 | 116 | ||
| 119 | extern void init_IRQ(void); | ||
| 120 | extern void cpu_panic(void); | ||
| 121 | |||
| 122 | /* | 117 | /* |
| 123 | * Cycle through the processors asking the PROM to start each one. | 118 | * Cycle through the processors asking the PROM to start each one. |
| 124 | */ | 119 | */ |
| @@ -134,7 +129,7 @@ void __init smp4m_boot_cpus(void) | |||
| 134 | local_flush_cache_all(); | 129 | local_flush_cache_all(); |
| 135 | } | 130 | } |
| 136 | 131 | ||
| 137 | int smp4m_boot_one_cpu(int i) | 132 | int __cpuinit smp4m_boot_one_cpu(int i) |
| 138 | { | 133 | { |
| 139 | extern unsigned long sun4m_cpu_startup; | 134 | extern unsigned long sun4m_cpu_startup; |
| 140 | unsigned long *entry = &sun4m_cpu_startup; | 135 | unsigned long *entry = &sun4m_cpu_startup; |
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c index 77840c804786..7215849db392 100644 --- a/arch/sparc/mm/iommu.c +++ b/arch/sparc/mm/iommu.c | |||
| @@ -144,8 +144,9 @@ static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte) | |||
| 144 | unsigned long start; | 144 | unsigned long start; |
| 145 | unsigned long end; | 145 | unsigned long end; |
| 146 | 146 | ||
| 147 | start = (unsigned long)iopte & PAGE_MASK; | 147 | start = (unsigned long)iopte; |
| 148 | end = PAGE_ALIGN(start + niopte*sizeof(iopte_t)); | 148 | end = PAGE_ALIGN(start + niopte*sizeof(iopte_t)); |
| 149 | start &= PAGE_MASK; | ||
| 149 | if (viking_mxcc_present) { | 150 | if (viking_mxcc_present) { |
| 150 | while(start < end) { | 151 | while(start < end) { |
| 151 | viking_mxcc_flush_page(start); | 152 | viking_mxcc_flush_page(start); |
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig index 43a66f5407f4..a7a111db25b2 100644 --- a/arch/sparc64/Kconfig +++ b/arch/sparc64/Kconfig | |||
| @@ -87,6 +87,10 @@ config SYSVIPC_COMPAT | |||
| 87 | depends on COMPAT && SYSVIPC | 87 | depends on COMPAT && SYSVIPC |
| 88 | default y | 88 | default y |
| 89 | 89 | ||
| 90 | config GENERIC_HARDIRQS | ||
| 91 | bool | ||
| 92 | default y | ||
| 93 | |||
| 90 | menu "General machine setup" | 94 | menu "General machine setup" |
| 91 | 95 | ||
| 92 | config SMP | 96 | config SMP |
diff --git a/arch/sparc64/defconfig b/arch/sparc64/defconfig index f09a70b8aabd..9da75f89fe2c 100644 --- a/arch/sparc64/defconfig +++ b/arch/sparc64/defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.17-rc3 | 3 | # Linux kernel version: 2.6.17 |
| 4 | # Fri May 12 12:43:49 2006 | 4 | # Tue Jun 20 01:26:43 2006 |
| 5 | # | 5 | # |
| 6 | CONFIG_SPARC=y | 6 | CONFIG_SPARC=y |
| 7 | CONFIG_SPARC64=y | 7 | CONFIG_SPARC64=y |
| @@ -87,6 +87,7 @@ CONFIG_DEFAULT_AS=y | |||
| 87 | # CONFIG_DEFAULT_NOOP is not set | 87 | # CONFIG_DEFAULT_NOOP is not set |
| 88 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 88 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
| 89 | CONFIG_SYSVIPC_COMPAT=y | 89 | CONFIG_SYSVIPC_COMPAT=y |
| 90 | CONFIG_GENERIC_HARDIRQS=y | ||
| 90 | 91 | ||
| 91 | # | 92 | # |
| 92 | # General machine setup | 93 | # General machine setup |
| @@ -183,6 +184,8 @@ CONFIG_INET_ESP=y | |||
| 183 | CONFIG_INET_IPCOMP=y | 184 | CONFIG_INET_IPCOMP=y |
| 184 | CONFIG_INET_XFRM_TUNNEL=y | 185 | CONFIG_INET_XFRM_TUNNEL=y |
| 185 | CONFIG_INET_TUNNEL=y | 186 | CONFIG_INET_TUNNEL=y |
| 187 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 188 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 186 | CONFIG_INET_DIAG=y | 189 | CONFIG_INET_DIAG=y |
| 187 | CONFIG_INET_TCP_DIAG=y | 190 | CONFIG_INET_TCP_DIAG=y |
| 188 | CONFIG_TCP_CONG_ADVANCED=y | 191 | CONFIG_TCP_CONG_ADVANCED=y |
| @@ -198,6 +201,9 @@ CONFIG_TCP_CONG_HSTCP=m | |||
| 198 | CONFIG_TCP_CONG_HYBLA=m | 201 | CONFIG_TCP_CONG_HYBLA=m |
| 199 | CONFIG_TCP_CONG_VEGAS=m | 202 | CONFIG_TCP_CONG_VEGAS=m |
| 200 | CONFIG_TCP_CONG_SCALABLE=m | 203 | CONFIG_TCP_CONG_SCALABLE=m |
| 204 | CONFIG_TCP_CONG_LP=m | ||
| 205 | CONFIG_TCP_CONG_VENO=m | ||
| 206 | CONFIG_TCP_CONG_COMPOUND=m | ||
| 201 | CONFIG_IPV6=m | 207 | CONFIG_IPV6=m |
| 202 | CONFIG_IPV6_PRIVACY=y | 208 | CONFIG_IPV6_PRIVACY=y |
| 203 | CONFIG_IPV6_ROUTER_PREF=y | 209 | CONFIG_IPV6_ROUTER_PREF=y |
| @@ -207,7 +213,10 @@ CONFIG_INET6_ESP=m | |||
| 207 | CONFIG_INET6_IPCOMP=m | 213 | CONFIG_INET6_IPCOMP=m |
| 208 | CONFIG_INET6_XFRM_TUNNEL=m | 214 | CONFIG_INET6_XFRM_TUNNEL=m |
| 209 | CONFIG_INET6_TUNNEL=m | 215 | CONFIG_INET6_TUNNEL=m |
| 216 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 217 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 210 | CONFIG_IPV6_TUNNEL=m | 218 | CONFIG_IPV6_TUNNEL=m |
| 219 | # CONFIG_NETWORK_SECMARK is not set | ||
| 211 | # CONFIG_NETFILTER is not set | 220 | # CONFIG_NETFILTER is not set |
| 212 | 221 | ||
| 213 | # | 222 | # |
| @@ -260,6 +269,7 @@ CONFIG_VLAN_8021Q=m | |||
| 260 | # Network testing | 269 | # Network testing |
| 261 | # | 270 | # |
| 262 | CONFIG_NET_PKTGEN=m | 271 | CONFIG_NET_PKTGEN=m |
| 272 | CONFIG_NET_TCPPROBE=m | ||
| 263 | # CONFIG_HAMRADIO is not set | 273 | # CONFIG_HAMRADIO is not set |
| 264 | # CONFIG_IRDA is not set | 274 | # CONFIG_IRDA is not set |
| 265 | # CONFIG_BT is not set | 275 | # CONFIG_BT is not set |
| @@ -562,6 +572,7 @@ CONFIG_BNX2=m | |||
| 562 | # CONFIG_CHELSIO_T1 is not set | 572 | # CONFIG_CHELSIO_T1 is not set |
| 563 | # CONFIG_IXGB is not set | 573 | # CONFIG_IXGB is not set |
| 564 | # CONFIG_S2IO is not set | 574 | # CONFIG_S2IO is not set |
| 575 | # CONFIG_MYRI10GE is not set | ||
| 565 | 576 | ||
| 566 | # | 577 | # |
| 567 | # Token Ring devices | 578 | # Token Ring devices |
| @@ -811,6 +822,7 @@ CONFIG_HWMON=y | |||
| 811 | # Multimedia devices | 822 | # Multimedia devices |
| 812 | # | 823 | # |
| 813 | # CONFIG_VIDEO_DEV is not set | 824 | # CONFIG_VIDEO_DEV is not set |
| 825 | CONFIG_VIDEO_V4L2=y | ||
| 814 | 826 | ||
| 815 | # | 827 | # |
| 816 | # Digital Video Broadcasting Devices | 828 | # Digital Video Broadcasting Devices |
| @@ -1135,6 +1147,19 @@ CONFIG_USB_HIDDEV=y | |||
| 1135 | # CONFIG_RTC_CLASS is not set | 1147 | # CONFIG_RTC_CLASS is not set |
| 1136 | 1148 | ||
| 1137 | # | 1149 | # |
| 1150 | # DMA Engine support | ||
| 1151 | # | ||
| 1152 | # CONFIG_DMA_ENGINE is not set | ||
| 1153 | |||
| 1154 | # | ||
| 1155 | # DMA Clients | ||
| 1156 | # | ||
| 1157 | |||
| 1158 | # | ||
| 1159 | # DMA Devices | ||
| 1160 | # | ||
| 1161 | |||
| 1162 | # | ||
| 1138 | # Misc Linux/SPARC drivers | 1163 | # Misc Linux/SPARC drivers |
| 1139 | # | 1164 | # |
| 1140 | CONFIG_SUN_OPENPROMIO=m | 1165 | CONFIG_SUN_OPENPROMIO=m |
diff --git a/arch/sparc64/kernel/devices.c b/arch/sparc64/kernel/devices.c index 007e8922cd16..0dd95ae50e12 100644 --- a/arch/sparc64/kernel/devices.c +++ b/arch/sparc64/kernel/devices.c | |||
| @@ -157,7 +157,7 @@ unsigned int sun4v_vdev_device_interrupt(unsigned int dev_node) | |||
| 157 | return 0; | 157 | return 0; |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | return sun4v_build_irq(sun4v_vdev_devhandle, irq, 5, 0); | 160 | return sun4v_build_irq(sun4v_vdev_devhandle, irq); |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | static const char *cpu_mid_prop(void) | 163 | static const char *cpu_mid_prop(void) |
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S index 6d0b3ed77a02..be85ce2a4ad9 100644 --- a/arch/sparc64/kernel/entry.S +++ b/arch/sparc64/kernel/entry.S | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <asm/estate.h> | 22 | #include <asm/estate.h> |
| 23 | #include <asm/auxio.h> | 23 | #include <asm/auxio.h> |
| 24 | #include <asm/sfafsr.h> | 24 | #include <asm/sfafsr.h> |
| 25 | #include <asm/pil.h> | ||
| 25 | 26 | ||
| 26 | #define curptr g6 | 27 | #define curptr g6 |
| 27 | 28 | ||
| @@ -431,20 +432,16 @@ do_ivec: | |||
| 431 | membar #Sync | 432 | membar #Sync |
| 432 | 433 | ||
| 433 | sethi %hi(ivector_table), %g2 | 434 | sethi %hi(ivector_table), %g2 |
| 434 | sllx %g3, 5, %g3 | 435 | sllx %g3, 3, %g3 |
| 435 | or %g2, %lo(ivector_table), %g2 | 436 | or %g2, %lo(ivector_table), %g2 |
| 436 | add %g2, %g3, %g3 | 437 | add %g2, %g3, %g3 |
| 437 | ldub [%g3 + 0x04], %g4 /* pil */ | ||
| 438 | mov 1, %g2 | ||
| 439 | sllx %g2, %g4, %g2 | ||
| 440 | sllx %g4, 2, %g4 | ||
| 441 | 438 | ||
| 442 | TRAP_LOAD_IRQ_WORK(%g6, %g1) | 439 | TRAP_LOAD_IRQ_WORK(%g6, %g1) |
| 443 | 440 | ||
| 444 | lduw [%g6 + %g4], %g5 /* g5 = irq_work(cpu, pil) */ | 441 | lduw [%g6], %g5 /* g5 = irq_work(cpu) */ |
| 445 | stw %g5, [%g3 + 0x00] /* bucket->irq_chain = g5 */ | 442 | stw %g5, [%g3 + 0x00] /* bucket->irq_chain = g5 */ |
| 446 | stw %g3, [%g6 + %g4] /* irq_work(cpu, pil) = bucket */ | 443 | stw %g3, [%g6] /* irq_work(cpu) = bucket */ |
| 447 | wr %g2, 0x0, %set_softint | 444 | wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint |
| 448 | retry | 445 | retry |
| 449 | do_ivec_xcall: | 446 | do_ivec_xcall: |
| 450 | mov 0x50, %g1 | 447 | mov 0x50, %g1 |
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index 11e645c9ec50..a8c9dc8d1958 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/proc_fs.h> | 22 | #include <linux/proc_fs.h> |
| 23 | #include <linux/seq_file.h> | 23 | #include <linux/seq_file.h> |
| 24 | #include <linux/bootmem.h> | 24 | #include <linux/bootmem.h> |
| 25 | #include <linux/irq.h> | ||
| 25 | 26 | ||
| 26 | #include <asm/ptrace.h> | 27 | #include <asm/ptrace.h> |
| 27 | #include <asm/processor.h> | 28 | #include <asm/processor.h> |
| @@ -42,10 +43,6 @@ | |||
| 42 | #include <asm/auxio.h> | 43 | #include <asm/auxio.h> |
| 43 | #include <asm/head.h> | 44 | #include <asm/head.h> |
| 44 | 45 | ||
| 45 | #ifdef CONFIG_SMP | ||
| 46 | static void distribute_irqs(void); | ||
| 47 | #endif | ||
| 48 | |||
| 49 | /* UPA nodes send interrupt packet to UltraSparc with first data reg | 46 | /* UPA nodes send interrupt packet to UltraSparc with first data reg |
| 50 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being | 47 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being |
| 51 | * delivered. We must translate this into a non-vector IRQ so we can | 48 | * delivered. We must translate this into a non-vector IRQ so we can |
| @@ -57,10 +54,29 @@ static void distribute_irqs(void); | |||
| 57 | * The IVEC handler does not need to act atomically, the PIL dispatch | 54 | * The IVEC handler does not need to act atomically, the PIL dispatch |
| 58 | * code uses CAS to get an atomic snapshot of the list and clear it | 55 | * code uses CAS to get an atomic snapshot of the list and clear it |
| 59 | * at the same time. | 56 | * at the same time. |
| 57 | * | ||
| 58 | * If you make changes to ino_bucket, please update hand coded assembler | ||
| 59 | * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S | ||
| 60 | */ | 60 | */ |
| 61 | struct ino_bucket { | ||
| 62 | /* Next handler in per-CPU IRQ worklist. We know that | ||
| 63 | * bucket pointers have the high 32-bits clear, so to | ||
| 64 | * save space we only store the bits we need. | ||
| 65 | */ | ||
| 66 | /*0x00*/unsigned int irq_chain; | ||
| 61 | 67 | ||
| 68 | /* Virtual interrupt number assigned to this INO. */ | ||
| 69 | /*0x04*/unsigned int virt_irq; | ||
| 70 | }; | ||
| 71 | |||
| 72 | #define NUM_IVECS (IMAP_INR + 1) | ||
| 62 | struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES))); | 73 | struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES))); |
| 63 | 74 | ||
| 75 | #define __irq_ino(irq) \ | ||
| 76 | (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0]) | ||
| 77 | #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq)) | ||
| 78 | #define __irq(bucket) ((unsigned int)(unsigned long)(bucket)) | ||
| 79 | |||
| 64 | /* This has to be in the main kernel image, it cannot be | 80 | /* This has to be in the main kernel image, it cannot be |
| 65 | * turned into per-cpu data. The reason is that the main | 81 | * turned into per-cpu data. The reason is that the main |
| 66 | * kernel image is locked into the TLB and this structure | 82 | * kernel image is locked into the TLB and this structure |
| @@ -68,71 +84,82 @@ struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BY | |||
| 68 | * access to this structure takes a TLB miss it could cause | 84 | * access to this structure takes a TLB miss it could cause |
| 69 | * the 5-level sparc v9 trap stack to overflow. | 85 | * the 5-level sparc v9 trap stack to overflow. |
| 70 | */ | 86 | */ |
| 71 | struct irq_work_struct { | 87 | #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist) |
| 72 | unsigned int irq_worklists[16]; | ||
| 73 | }; | ||
| 74 | struct irq_work_struct __irq_work[NR_CPUS]; | ||
| 75 | #define irq_work(__cpu, __pil) &(__irq_work[(__cpu)].irq_worklists[(__pil)]) | ||
| 76 | 88 | ||
| 77 | static struct irqaction *irq_action[NR_IRQS+1]; | 89 | static unsigned int virt_to_real_irq_table[NR_IRQS]; |
| 90 | static unsigned char virt_irq_cur = 1; | ||
| 78 | 91 | ||
| 79 | /* This only synchronizes entities which modify IRQ handler | 92 | static unsigned char virt_irq_alloc(unsigned int real_irq) |
| 80 | * state and some selected user-level spots that want to | 93 | { |
| 81 | * read things in the table. IRQ handler processing orders | 94 | unsigned char ent; |
| 82 | * its' accesses such that no locking is needed. | 95 | |
| 83 | */ | 96 | BUILD_BUG_ON(NR_IRQS >= 256); |
| 84 | static DEFINE_SPINLOCK(irq_action_lock); | 97 | |
| 98 | ent = virt_irq_cur; | ||
| 99 | if (ent >= NR_IRQS) { | ||
| 100 | printk(KERN_ERR "IRQ: Out of virtual IRQs.\n"); | ||
| 101 | return 0; | ||
| 102 | } | ||
| 103 | |||
| 104 | virt_irq_cur = ent + 1; | ||
| 105 | virt_to_real_irq_table[ent] = real_irq; | ||
| 106 | |||
| 107 | return ent; | ||
| 108 | } | ||
| 109 | |||
| 110 | #if 0 /* Currently unused. */ | ||
| 111 | static unsigned char real_to_virt_irq(unsigned int real_irq) | ||
| 112 | { | ||
| 113 | struct ino_bucket *bucket = __bucket(real_irq); | ||
| 85 | 114 | ||
| 86 | static void register_irq_proc (unsigned int irq); | 115 | return bucket->virt_irq; |
| 116 | } | ||
| 117 | #endif | ||
| 118 | |||
| 119 | static unsigned int virt_to_real_irq(unsigned char virt_irq) | ||
| 120 | { | ||
| 121 | return virt_to_real_irq_table[virt_irq]; | ||
| 122 | } | ||
| 87 | 123 | ||
| 88 | /* | 124 | /* |
| 89 | * Upper 2b of irqaction->flags holds the ino. | 125 | * /proc/interrupts printing: |
| 90 | * irqaction->mask holds the smp affinity information. | ||
| 91 | */ | 126 | */ |
| 92 | #define put_ino_in_irqaction(action, irq) \ | ||
| 93 | action->flags &= 0xffffffffffffUL; \ | ||
| 94 | if (__bucket(irq) == &pil0_dummy_bucket) \ | ||
| 95 | action->flags |= 0xdeadUL << 48; \ | ||
| 96 | else \ | ||
| 97 | action->flags |= __irq_ino(irq) << 48; | ||
| 98 | #define get_ino_in_irqaction(action) (action->flags >> 48) | ||
| 99 | |||
| 100 | #define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff) | ||
| 101 | #define get_smpaff_in_irqaction(action) ((action)->mask) | ||
| 102 | 127 | ||
| 103 | int show_interrupts(struct seq_file *p, void *v) | 128 | int show_interrupts(struct seq_file *p, void *v) |
| 104 | { | 129 | { |
| 130 | int i = *(loff_t *) v, j; | ||
| 131 | struct irqaction * action; | ||
| 105 | unsigned long flags; | 132 | unsigned long flags; |
| 106 | int i = *(loff_t *) v; | ||
| 107 | struct irqaction *action; | ||
| 108 | #ifdef CONFIG_SMP | ||
| 109 | int j; | ||
| 110 | #endif | ||
| 111 | 133 | ||
| 112 | spin_lock_irqsave(&irq_action_lock, flags); | 134 | if (i == 0) { |
| 113 | if (i <= NR_IRQS) { | 135 | seq_printf(p, " "); |
| 114 | if (!(action = *(i + irq_action))) | 136 | for_each_online_cpu(j) |
| 115 | goto out_unlock; | 137 | seq_printf(p, "CPU%d ",j); |
| 116 | seq_printf(p, "%3d: ", i); | 138 | seq_putc(p, '\n'); |
| 139 | } | ||
| 140 | |||
| 141 | if (i < NR_IRQS) { | ||
| 142 | spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
| 143 | action = irq_desc[i].action; | ||
| 144 | if (!action) | ||
| 145 | goto skip; | ||
| 146 | seq_printf(p, "%3d: ",i); | ||
| 117 | #ifndef CONFIG_SMP | 147 | #ifndef CONFIG_SMP |
| 118 | seq_printf(p, "%10u ", kstat_irqs(i)); | 148 | seq_printf(p, "%10u ", kstat_irqs(i)); |
| 119 | #else | 149 | #else |
| 120 | for_each_online_cpu(j) { | 150 | for_each_online_cpu(j) |
| 121 | seq_printf(p, "%10u ", | 151 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
| 122 | kstat_cpu(j).irqs[i]); | ||
| 123 | } | ||
| 124 | #endif | 152 | #endif |
| 125 | seq_printf(p, " %s:%lx", action->name, | 153 | seq_printf(p, " %9s", irq_desc[i].handler->typename); |
| 126 | get_ino_in_irqaction(action)); | 154 | seq_printf(p, " %s", action->name); |
| 127 | for (action = action->next; action; action = action->next) { | 155 | |
| 128 | seq_printf(p, ", %s:%lx", action->name, | 156 | for (action=action->next; action; action = action->next) |
| 129 | get_ino_in_irqaction(action)); | 157 | seq_printf(p, ", %s", action->name); |
| 130 | } | 158 | |
| 131 | seq_putc(p, '\n'); | 159 | seq_putc(p, '\n'); |
| 160 | skip: | ||
| 161 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
| 132 | } | 162 | } |
| 133 | out_unlock: | ||
| 134 | spin_unlock_irqrestore(&irq_action_lock, flags); | ||
| 135 | |||
| 136 | return 0; | 163 | return 0; |
| 137 | } | 164 | } |
| 138 | 165 | ||
| @@ -173,556 +200,365 @@ static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid) | |||
| 173 | return tid; | 200 | return tid; |
| 174 | } | 201 | } |
| 175 | 202 | ||
| 176 | /* Now these are always passed a true fully specified sun4u INO. */ | 203 | struct irq_handler_data { |
| 177 | void enable_irq(unsigned int irq) | 204 | unsigned long iclr; |
| 178 | { | 205 | unsigned long imap; |
| 179 | struct ino_bucket *bucket = __bucket(irq); | ||
| 180 | unsigned long imap, cpuid; | ||
| 181 | |||
| 182 | imap = bucket->imap; | ||
| 183 | if (imap == 0UL) | ||
| 184 | return; | ||
| 185 | |||
| 186 | preempt_disable(); | ||
| 187 | |||
| 188 | /* This gets the physical processor ID, even on uniprocessor, | ||
| 189 | * so we can always program the interrupt target correctly. | ||
| 190 | */ | ||
| 191 | cpuid = real_hard_smp_processor_id(); | ||
| 192 | |||
| 193 | if (tlb_type == hypervisor) { | ||
| 194 | unsigned int ino = __irq_ino(irq); | ||
| 195 | int err; | ||
| 196 | 206 | ||
| 197 | err = sun4v_intr_settarget(ino, cpuid); | 207 | void (*pre_handler)(unsigned int, void *, void *); |
| 198 | if (err != HV_EOK) | 208 | void *pre_handler_arg1; |
| 199 | printk("sun4v_intr_settarget(%x,%lu): err(%d)\n", | 209 | void *pre_handler_arg2; |
| 200 | ino, cpuid, err); | 210 | }; |
| 201 | err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED); | ||
| 202 | if (err != HV_EOK) | ||
| 203 | printk("sun4v_intr_setenabled(%x): err(%d)\n", | ||
| 204 | ino, err); | ||
| 205 | } else { | ||
| 206 | unsigned int tid = sun4u_compute_tid(imap, cpuid); | ||
| 207 | |||
| 208 | /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product | ||
| 209 | * of this SYSIO's preconfigured IGN in the SYSIO Control | ||
| 210 | * Register, the hardware just mirrors that value here. | ||
| 211 | * However for Graphics and UPA Slave devices the full | ||
| 212 | * IMAP_INR field can be set by the programmer here. | ||
| 213 | * | ||
| 214 | * Things like FFB can now be handled via the new IRQ | ||
| 215 | * mechanism. | ||
| 216 | */ | ||
| 217 | upa_writel(tid | IMAP_VALID, imap); | ||
| 218 | } | ||
| 219 | |||
| 220 | preempt_enable(); | ||
| 221 | } | ||
| 222 | 211 | ||
| 223 | /* This now gets passed true ino's as well. */ | 212 | static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq) |
| 224 | void disable_irq(unsigned int irq) | ||
| 225 | { | 213 | { |
| 226 | struct ino_bucket *bucket = __bucket(irq); | 214 | unsigned int real_irq = virt_to_real_irq(virt_irq); |
| 227 | unsigned long imap; | 215 | struct ino_bucket *bucket = NULL; |
| 228 | |||
| 229 | imap = bucket->imap; | ||
| 230 | if (imap != 0UL) { | ||
| 231 | if (tlb_type == hypervisor) { | ||
| 232 | unsigned int ino = __irq_ino(irq); | ||
| 233 | int err; | ||
| 234 | |||
| 235 | err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED); | ||
| 236 | if (err != HV_EOK) | ||
| 237 | printk("sun4v_intr_setenabled(%x): " | ||
| 238 | "err(%d)\n", ino, err); | ||
| 239 | } else { | ||
| 240 | u32 tmp; | ||
| 241 | |||
| 242 | /* NOTE: We do not want to futz with the IRQ clear registers | ||
| 243 | * and move the state to IDLE, the SCSI code does call | ||
| 244 | * disable_irq() to assure atomicity in the queue cmd | ||
| 245 | * SCSI adapter driver code. Thus we'd lose interrupts. | ||
| 246 | */ | ||
| 247 | tmp = upa_readl(imap); | ||
| 248 | tmp &= ~IMAP_VALID; | ||
| 249 | upa_writel(tmp, imap); | ||
| 250 | } | ||
| 251 | } | ||
| 252 | } | ||
| 253 | 216 | ||
| 254 | /* The timer is the one "weird" interrupt which is generated by | 217 | if (likely(real_irq)) |
| 255 | * the CPU %tick register and not by some normal vectored interrupt | 218 | bucket = __bucket(real_irq); |
| 256 | * source. To handle this special case, we use this dummy INO bucket. | ||
| 257 | */ | ||
| 258 | static struct irq_desc pil0_dummy_desc; | ||
| 259 | static struct ino_bucket pil0_dummy_bucket = { | ||
| 260 | .irq_info = &pil0_dummy_desc, | ||
| 261 | }; | ||
| 262 | 219 | ||
| 263 | static void build_irq_error(const char *msg, unsigned int ino, int pil, int inofixup, | 220 | return bucket; |
| 264 | unsigned long iclr, unsigned long imap, | ||
| 265 | struct ino_bucket *bucket) | ||
| 266 | { | ||
| 267 | prom_printf("IRQ: INO %04x (%d:%016lx:%016lx) --> " | ||
| 268 | "(%d:%d:%016lx:%016lx), halting...\n", | ||
| 269 | ino, bucket->pil, bucket->iclr, bucket->imap, | ||
| 270 | pil, inofixup, iclr, imap); | ||
| 271 | prom_halt(); | ||
| 272 | } | 221 | } |
| 273 | 222 | ||
| 274 | unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap) | 223 | #ifdef CONFIG_SMP |
| 224 | static int irq_choose_cpu(unsigned int virt_irq) | ||
| 275 | { | 225 | { |
| 276 | struct ino_bucket *bucket; | 226 | cpumask_t mask = irq_affinity[virt_irq]; |
| 277 | int ino; | 227 | int cpuid; |
| 278 | 228 | ||
| 279 | if (pil == 0) { | 229 | if (cpus_equal(mask, CPU_MASK_ALL)) { |
| 280 | if (iclr != 0UL || imap != 0UL) { | 230 | static int irq_rover; |
| 281 | prom_printf("Invalid dummy bucket for PIL0 (%lx:%lx)\n", | 231 | static DEFINE_SPINLOCK(irq_rover_lock); |
| 282 | iclr, imap); | 232 | unsigned long flags; |
| 283 | prom_halt(); | ||
| 284 | } | ||
| 285 | return __irq(&pil0_dummy_bucket); | ||
| 286 | } | ||
| 287 | 233 | ||
| 288 | BUG_ON(tlb_type == hypervisor); | 234 | /* Round-robin distribution... */ |
| 235 | do_round_robin: | ||
| 236 | spin_lock_irqsave(&irq_rover_lock, flags); | ||
| 289 | 237 | ||
| 290 | /* RULE: Both must be specified in all other cases. */ | 238 | while (!cpu_online(irq_rover)) { |
| 291 | if (iclr == 0UL || imap == 0UL) { | 239 | if (++irq_rover >= NR_CPUS) |
| 292 | prom_printf("Invalid build_irq %d %d %016lx %016lx\n", | 240 | irq_rover = 0; |
| 293 | pil, inofixup, iclr, imap); | 241 | } |
| 294 | prom_halt(); | 242 | cpuid = irq_rover; |
| 295 | } | 243 | do { |
| 296 | 244 | if (++irq_rover >= NR_CPUS) | |
| 297 | ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup; | 245 | irq_rover = 0; |
| 298 | if (ino > NUM_IVECS) { | 246 | } while (!cpu_online(irq_rover)); |
| 299 | prom_printf("Invalid INO %04x (%d:%d:%016lx:%016lx)\n", | ||
| 300 | ino, pil, inofixup, iclr, imap); | ||
| 301 | prom_halt(); | ||
| 302 | } | ||
| 303 | 247 | ||
| 304 | bucket = &ivector_table[ino]; | 248 | spin_unlock_irqrestore(&irq_rover_lock, flags); |
| 305 | if (bucket->flags & IBF_ACTIVE) | 249 | } else { |
| 306 | build_irq_error("IRQ: Trying to build active INO bucket.\n", | 250 | cpumask_t tmp; |
| 307 | ino, pil, inofixup, iclr, imap, bucket); | ||
| 308 | 251 | ||
| 309 | if (bucket->irq_info) { | 252 | cpus_and(tmp, cpu_online_map, mask); |
| 310 | if (bucket->imap != imap || bucket->iclr != iclr) | ||
| 311 | build_irq_error("IRQ: Trying to reinit INO bucket.\n", | ||
| 312 | ino, pil, inofixup, iclr, imap, bucket); | ||
| 313 | 253 | ||
| 314 | goto out; | 254 | if (cpus_empty(tmp)) |
| 315 | } | 255 | goto do_round_robin; |
| 316 | 256 | ||
| 317 | bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC); | 257 | cpuid = first_cpu(tmp); |
| 318 | if (!bucket->irq_info) { | ||
| 319 | prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n"); | ||
| 320 | prom_halt(); | ||
| 321 | } | 258 | } |
| 322 | 259 | ||
| 323 | /* Ok, looks good, set it up. Don't touch the irq_chain or | 260 | return cpuid; |
| 324 | * the pending flag. | ||
| 325 | */ | ||
| 326 | bucket->imap = imap; | ||
| 327 | bucket->iclr = iclr; | ||
| 328 | bucket->pil = pil; | ||
| 329 | bucket->flags = 0; | ||
| 330 | |||
| 331 | out: | ||
| 332 | return __irq(bucket); | ||
| 333 | } | 261 | } |
| 334 | 262 | #else | |
| 335 | unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags) | 263 | static int irq_choose_cpu(unsigned int virt_irq) |
| 336 | { | 264 | { |
| 337 | struct ino_bucket *bucket; | 265 | return real_hard_smp_processor_id(); |
| 338 | unsigned long sysino; | 266 | } |
| 267 | #endif | ||
| 339 | 268 | ||
| 340 | sysino = sun4v_devino_to_sysino(devhandle, devino); | 269 | static void sun4u_irq_enable(unsigned int virt_irq) |
| 270 | { | ||
| 271 | irq_desc_t *desc = irq_desc + virt_irq; | ||
| 272 | struct irq_handler_data *data = desc->handler_data; | ||
| 341 | 273 | ||
| 342 | bucket = &ivector_table[sysino]; | 274 | if (likely(data)) { |
| 275 | unsigned long cpuid, imap; | ||
| 276 | unsigned int tid; | ||
| 343 | 277 | ||
| 344 | /* Catch accidental accesses to these things. IMAP/ICLR handling | 278 | cpuid = irq_choose_cpu(virt_irq); |
| 345 | * is done by hypervisor calls on sun4v platforms, not by direct | 279 | imap = data->imap; |
| 346 | * register accesses. | ||
| 347 | * | ||
| 348 | * But we need to make them look unique for the disable_irq() logic | ||
| 349 | * in free_irq(). | ||
| 350 | */ | ||
| 351 | bucket->imap = ~0UL - sysino; | ||
| 352 | bucket->iclr = ~0UL - sysino; | ||
| 353 | 280 | ||
| 354 | bucket->pil = pil; | 281 | tid = sun4u_compute_tid(imap, cpuid); |
| 355 | bucket->flags = flags; | ||
| 356 | 282 | ||
| 357 | bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC); | 283 | upa_writel(tid | IMAP_VALID, imap); |
| 358 | if (!bucket->irq_info) { | ||
| 359 | prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n"); | ||
| 360 | prom_halt(); | ||
| 361 | } | 284 | } |
| 362 | |||
| 363 | return __irq(bucket); | ||
| 364 | } | 285 | } |
| 365 | 286 | ||
| 366 | static void atomic_bucket_insert(struct ino_bucket *bucket) | 287 | static void sun4u_irq_disable(unsigned int virt_irq) |
| 367 | { | 288 | { |
| 368 | unsigned long pstate; | 289 | irq_desc_t *desc = irq_desc + virt_irq; |
| 369 | unsigned int *ent; | 290 | struct irq_handler_data *data = desc->handler_data; |
| 370 | 291 | ||
| 371 | __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); | 292 | if (likely(data)) { |
| 372 | __asm__ __volatile__("wrpr %0, %1, %%pstate" | 293 | unsigned long imap = data->imap; |
| 373 | : : "r" (pstate), "i" (PSTATE_IE)); | 294 | u32 tmp = upa_readl(imap); |
| 374 | ent = irq_work(smp_processor_id(), bucket->pil); | ||
| 375 | bucket->irq_chain = *ent; | ||
| 376 | *ent = __irq(bucket); | ||
| 377 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate)); | ||
| 378 | } | ||
| 379 | 295 | ||
| 380 | static int check_irq_sharing(int pil, unsigned long irqflags) | 296 | tmp &= ~IMAP_VALID; |
| 381 | { | 297 | upa_writel(tmp, imap); |
| 382 | struct irqaction *action, *tmp; | ||
| 383 | |||
| 384 | action = *(irq_action + pil); | ||
| 385 | if (action) { | ||
| 386 | if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) { | ||
| 387 | for (tmp = action; tmp->next; tmp = tmp->next) | ||
| 388 | ; | ||
| 389 | } else { | ||
| 390 | return -EBUSY; | ||
| 391 | } | ||
| 392 | } | 298 | } |
| 393 | return 0; | ||
| 394 | } | 299 | } |
| 395 | 300 | ||
| 396 | static void append_irq_action(int pil, struct irqaction *action) | 301 | static void sun4u_irq_end(unsigned int virt_irq) |
| 397 | { | 302 | { |
| 398 | struct irqaction **pp = irq_action + pil; | 303 | irq_desc_t *desc = irq_desc + virt_irq; |
| 304 | struct irq_handler_data *data = desc->handler_data; | ||
| 399 | 305 | ||
| 400 | while (*pp) | 306 | if (likely(data)) |
| 401 | pp = &((*pp)->next); | 307 | upa_writel(ICLR_IDLE, data->iclr); |
| 402 | *pp = action; | ||
| 403 | } | 308 | } |
| 404 | 309 | ||
| 405 | static struct irqaction *get_action_slot(struct ino_bucket *bucket) | 310 | static void sun4v_irq_enable(unsigned int virt_irq) |
| 406 | { | 311 | { |
| 407 | struct irq_desc *desc = bucket->irq_info; | 312 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 408 | int max_irq, i; | 313 | unsigned int ino = bucket - &ivector_table[0]; |
| 409 | 314 | ||
| 410 | max_irq = 1; | 315 | if (likely(bucket)) { |
| 411 | if (bucket->flags & IBF_PCI) | 316 | unsigned long cpuid; |
| 412 | max_irq = MAX_IRQ_DESC_ACTION; | 317 | int err; |
| 413 | for (i = 0; i < max_irq; i++) { | ||
| 414 | struct irqaction *p = &desc->action[i]; | ||
| 415 | u32 mask = (1 << i); | ||
| 416 | 318 | ||
| 417 | if (desc->action_active_mask & mask) | 319 | cpuid = irq_choose_cpu(virt_irq); |
| 418 | continue; | ||
| 419 | 320 | ||
| 420 | desc->action_active_mask |= mask; | 321 | err = sun4v_intr_settarget(ino, cpuid); |
| 421 | return p; | 322 | if (err != HV_EOK) |
| 323 | printk("sun4v_intr_settarget(%x,%lu): err(%d)\n", | ||
| 324 | ino, cpuid, err); | ||
| 325 | err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED); | ||
| 326 | if (err != HV_EOK) | ||
| 327 | printk("sun4v_intr_setenabled(%x): err(%d)\n", | ||
| 328 | ino, err); | ||
| 422 | } | 329 | } |
| 423 | return NULL; | ||
| 424 | } | 330 | } |
| 425 | 331 | ||
| 426 | int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), | 332 | static void sun4v_irq_disable(unsigned int virt_irq) |
| 427 | unsigned long irqflags, const char *name, void *dev_id) | ||
| 428 | { | 333 | { |
| 429 | struct irqaction *action; | 334 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 430 | struct ino_bucket *bucket = __bucket(irq); | 335 | unsigned int ino = bucket - &ivector_table[0]; |
| 431 | unsigned long flags; | ||
| 432 | int pending = 0; | ||
| 433 | |||
| 434 | if (unlikely(!handler)) | ||
| 435 | return -EINVAL; | ||
| 436 | |||
| 437 | if (unlikely(!bucket->irq_info)) | ||
| 438 | return -ENODEV; | ||
| 439 | |||
| 440 | if ((bucket != &pil0_dummy_bucket) && (irqflags & SA_SAMPLE_RANDOM)) { | ||
| 441 | /* | ||
| 442 | * This function might sleep, we want to call it first, | ||
| 443 | * outside of the atomic block. In SA_STATIC_ALLOC case, | ||
| 444 | * random driver's kmalloc will fail, but it is safe. | ||
| 445 | * If already initialized, random driver will not reinit. | ||
| 446 | * Yes, this might clear the entropy pool if the wrong | ||
| 447 | * driver is attempted to be loaded, without actually | ||
| 448 | * installing a new handler, but is this really a problem, | ||
| 449 | * only the sysadmin is able to do this. | ||
| 450 | */ | ||
| 451 | rand_initialize_irq(irq); | ||
| 452 | } | ||
| 453 | |||
| 454 | spin_lock_irqsave(&irq_action_lock, flags); | ||
| 455 | |||
| 456 | if (check_irq_sharing(bucket->pil, irqflags)) { | ||
| 457 | spin_unlock_irqrestore(&irq_action_lock, flags); | ||
| 458 | return -EBUSY; | ||
| 459 | } | ||
| 460 | 336 | ||
| 461 | action = get_action_slot(bucket); | 337 | if (likely(bucket)) { |
| 462 | if (!action) { | 338 | int err; |
| 463 | spin_unlock_irqrestore(&irq_action_lock, flags); | ||
| 464 | return -ENOMEM; | ||
| 465 | } | ||
| 466 | 339 | ||
| 467 | bucket->flags |= IBF_ACTIVE; | 340 | err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED); |
| 468 | pending = 0; | 341 | if (err != HV_EOK) |
| 469 | if (bucket != &pil0_dummy_bucket) { | 342 | printk("sun4v_intr_setenabled(%x): " |
| 470 | pending = bucket->pending; | 343 | "err(%d)\n", ino, err); |
| 471 | if (pending) | ||
| 472 | bucket->pending = 0; | ||
| 473 | } | 344 | } |
| 345 | } | ||
| 474 | 346 | ||
| 475 | action->handler = handler; | 347 | static void sun4v_irq_end(unsigned int virt_irq) |
| 476 | action->flags = irqflags; | 348 | { |
| 477 | action->name = name; | 349 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 478 | action->next = NULL; | 350 | unsigned int ino = bucket - &ivector_table[0]; |
| 479 | action->dev_id = dev_id; | ||
| 480 | put_ino_in_irqaction(action, irq); | ||
| 481 | put_smpaff_in_irqaction(action, CPU_MASK_NONE); | ||
| 482 | |||
| 483 | append_irq_action(bucket->pil, action); | ||
| 484 | 351 | ||
| 485 | enable_irq(irq); | 352 | if (likely(bucket)) { |
| 353 | int err; | ||
| 486 | 354 | ||
| 487 | /* We ate the IVEC already, this makes sure it does not get lost. */ | 355 | err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE); |
| 488 | if (pending) { | 356 | if (err != HV_EOK) |
| 489 | atomic_bucket_insert(bucket); | 357 | printk("sun4v_intr_setstate(%x): " |
| 490 | set_softint(1 << bucket->pil); | 358 | "err(%d)\n", ino, err); |
| 491 | } | 359 | } |
| 360 | } | ||
| 492 | 361 | ||
| 493 | spin_unlock_irqrestore(&irq_action_lock, flags); | 362 | static void run_pre_handler(unsigned int virt_irq) |
| 494 | 363 | { | |
| 495 | if (bucket != &pil0_dummy_bucket) | 364 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 496 | register_irq_proc(__irq_ino(irq)); | 365 | irq_desc_t *desc = irq_desc + virt_irq; |
| 366 | struct irq_handler_data *data = desc->handler_data; | ||
| 497 | 367 | ||
| 498 | #ifdef CONFIG_SMP | 368 | if (likely(data->pre_handler)) { |
| 499 | distribute_irqs(); | 369 | data->pre_handler(__irq_ino(__irq(bucket)), |
| 500 | #endif | 370 | data->pre_handler_arg1, |
| 501 | return 0; | 371 | data->pre_handler_arg2); |
| 372 | } | ||
| 502 | } | 373 | } |
| 503 | 374 | ||
| 504 | EXPORT_SYMBOL(request_irq); | 375 | static struct hw_interrupt_type sun4u_irq = { |
| 376 | .typename = "sun4u", | ||
| 377 | .enable = sun4u_irq_enable, | ||
| 378 | .disable = sun4u_irq_disable, | ||
| 379 | .end = sun4u_irq_end, | ||
| 380 | }; | ||
| 505 | 381 | ||
| 506 | static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id) | 382 | static struct hw_interrupt_type sun4u_irq_ack = { |
| 507 | { | 383 | .typename = "sun4u+ack", |
| 508 | struct ino_bucket *bucket = __bucket(irq); | 384 | .enable = sun4u_irq_enable, |
| 509 | struct irqaction *action, **pp; | 385 | .disable = sun4u_irq_disable, |
| 386 | .ack = run_pre_handler, | ||
| 387 | .end = sun4u_irq_end, | ||
| 388 | }; | ||
| 510 | 389 | ||
| 511 | pp = irq_action + bucket->pil; | 390 | static struct hw_interrupt_type sun4v_irq = { |
| 512 | action = *pp; | 391 | .typename = "sun4v", |
| 513 | if (unlikely(!action)) | 392 | .enable = sun4v_irq_enable, |
| 514 | return NULL; | 393 | .disable = sun4v_irq_disable, |
| 394 | .end = sun4v_irq_end, | ||
| 395 | }; | ||
| 515 | 396 | ||
| 516 | if (unlikely(!action->handler)) { | 397 | static struct hw_interrupt_type sun4v_irq_ack = { |
| 517 | printk("Freeing free IRQ %d\n", bucket->pil); | 398 | .typename = "sun4v+ack", |
| 518 | return NULL; | 399 | .enable = sun4v_irq_enable, |
| 519 | } | 400 | .disable = sun4v_irq_disable, |
| 401 | .ack = run_pre_handler, | ||
| 402 | .end = sun4v_irq_end, | ||
| 403 | }; | ||
| 520 | 404 | ||
| 521 | while (action && action->dev_id != dev_id) { | 405 | void irq_install_pre_handler(int virt_irq, |
| 522 | pp = &action->next; | 406 | void (*func)(unsigned int, void *, void *), |
| 523 | action = *pp; | 407 | void *arg1, void *arg2) |
| 524 | } | 408 | { |
| 409 | irq_desc_t *desc = irq_desc + virt_irq; | ||
| 410 | struct irq_handler_data *data = desc->handler_data; | ||
| 525 | 411 | ||
| 526 | if (likely(action)) | 412 | data->pre_handler = func; |
| 527 | *pp = action->next; | 413 | data->pre_handler_arg1 = arg1; |
| 414 | data->pre_handler_arg2 = arg2; | ||
| 528 | 415 | ||
| 529 | return action; | 416 | desc->handler = (desc->handler == &sun4u_irq ? |
| 417 | &sun4u_irq_ack : &sun4v_irq_ack); | ||
| 530 | } | 418 | } |
| 531 | 419 | ||
| 532 | void free_irq(unsigned int irq, void *dev_id) | 420 | unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) |
| 533 | { | 421 | { |
| 534 | struct irqaction *action; | ||
| 535 | struct ino_bucket *bucket; | 422 | struct ino_bucket *bucket; |
| 536 | unsigned long flags; | 423 | struct irq_handler_data *data; |
| 424 | irq_desc_t *desc; | ||
| 425 | int ino; | ||
| 537 | 426 | ||
| 538 | spin_lock_irqsave(&irq_action_lock, flags); | 427 | BUG_ON(tlb_type == hypervisor); |
| 539 | 428 | ||
| 540 | action = unlink_irq_action(irq, dev_id); | 429 | ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup; |
| 430 | bucket = &ivector_table[ino]; | ||
| 431 | if (!bucket->virt_irq) { | ||
| 432 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); | ||
| 433 | irq_desc[bucket->virt_irq].handler = &sun4u_irq; | ||
| 434 | } | ||
| 541 | 435 | ||
| 542 | spin_unlock_irqrestore(&irq_action_lock, flags); | 436 | desc = irq_desc + bucket->virt_irq; |
| 437 | if (unlikely(desc->handler_data)) | ||
| 438 | goto out; | ||
| 543 | 439 | ||
| 544 | if (unlikely(!action)) | 440 | data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC); |
| 545 | return; | 441 | if (unlikely(!data)) { |
| 442 | prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); | ||
| 443 | prom_halt(); | ||
| 444 | } | ||
| 445 | desc->handler_data = data; | ||
| 546 | 446 | ||
| 547 | synchronize_irq(irq); | 447 | data->imap = imap; |
| 448 | data->iclr = iclr; | ||
| 548 | 449 | ||
| 549 | spin_lock_irqsave(&irq_action_lock, flags); | 450 | out: |
| 451 | return bucket->virt_irq; | ||
| 452 | } | ||
| 550 | 453 | ||
| 551 | bucket = __bucket(irq); | 454 | unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) |
| 552 | if (bucket != &pil0_dummy_bucket) { | 455 | { |
| 553 | struct irq_desc *desc = bucket->irq_info; | 456 | struct ino_bucket *bucket; |
| 554 | int ent, i; | 457 | struct irq_handler_data *data; |
| 458 | unsigned long sysino; | ||
| 459 | irq_desc_t *desc; | ||
| 555 | 460 | ||
| 556 | for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) { | 461 | BUG_ON(tlb_type != hypervisor); |
| 557 | struct irqaction *p = &desc->action[i]; | ||
| 558 | 462 | ||
| 559 | if (p == action) { | 463 | sysino = sun4v_devino_to_sysino(devhandle, devino); |
| 560 | desc->action_active_mask &= ~(1 << i); | 464 | bucket = &ivector_table[sysino]; |
| 561 | break; | 465 | if (!bucket->virt_irq) { |
| 562 | } | 466 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); |
| 563 | } | 467 | irq_desc[bucket->virt_irq].handler = &sun4v_irq; |
| 468 | } | ||
| 564 | 469 | ||
| 565 | if (!desc->action_active_mask) { | 470 | desc = irq_desc + bucket->virt_irq; |
| 566 | unsigned long imap = bucket->imap; | 471 | if (unlikely(desc->handler_data)) |
| 567 | 472 | goto out; | |
| 568 | /* This unique interrupt source is now inactive. */ | ||
| 569 | bucket->flags &= ~IBF_ACTIVE; | ||
| 570 | |||
| 571 | /* See if any other buckets share this bucket's IMAP | ||
| 572 | * and are still active. | ||
| 573 | */ | ||
| 574 | for (ent = 0; ent < NUM_IVECS; ent++) { | ||
| 575 | struct ino_bucket *bp = &ivector_table[ent]; | ||
| 576 | if (bp != bucket && | ||
| 577 | bp->imap == imap && | ||
| 578 | (bp->flags & IBF_ACTIVE) != 0) | ||
| 579 | break; | ||
| 580 | } | ||
| 581 | 473 | ||
| 582 | /* Only disable when no other sub-irq levels of | 474 | data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC); |
| 583 | * the same IMAP are active. | 475 | if (unlikely(!data)) { |
| 584 | */ | 476 | prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); |
| 585 | if (ent == NUM_IVECS) | 477 | prom_halt(); |
| 586 | disable_irq(irq); | ||
| 587 | } | ||
| 588 | } | 478 | } |
| 479 | desc->handler_data = data; | ||
| 589 | 480 | ||
| 590 | spin_unlock_irqrestore(&irq_action_lock, flags); | 481 | /* Catch accidental accesses to these things. IMAP/ICLR handling |
| 591 | } | 482 | * is done by hypervisor calls on sun4v platforms, not by direct |
| 483 | * register accesses. | ||
| 484 | */ | ||
| 485 | data->imap = ~0UL; | ||
| 486 | data->iclr = ~0UL; | ||
| 592 | 487 | ||
| 593 | EXPORT_SYMBOL(free_irq); | 488 | out: |
| 489 | return bucket->virt_irq; | ||
| 490 | } | ||
| 594 | 491 | ||
| 595 | #ifdef CONFIG_SMP | 492 | void hw_resend_irq(struct hw_interrupt_type *handler, unsigned int virt_irq) |
| 596 | void synchronize_irq(unsigned int irq) | ||
| 597 | { | 493 | { |
| 598 | struct ino_bucket *bucket = __bucket(irq); | 494 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 599 | 495 | unsigned long pstate; | |
| 600 | #if 0 | 496 | unsigned int *ent; |
| 601 | /* The following is how I wish I could implement this. | 497 | |
| 602 | * Unfortunately the ICLR registers are read-only, you can | 498 | __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); |
| 603 | * only write ICLR_foo values to them. To get the current | 499 | __asm__ __volatile__("wrpr %0, %1, %%pstate" |
| 604 | * IRQ status you would need to get at the IRQ diag registers | 500 | : : "r" (pstate), "i" (PSTATE_IE)); |
| 605 | * in the PCI/SBUS controller and the layout of those vary | 501 | ent = irq_work(smp_processor_id()); |
| 606 | * from one controller to the next, sigh... -DaveM | 502 | bucket->irq_chain = *ent; |
| 607 | */ | 503 | *ent = __irq(bucket); |
| 608 | unsigned long iclr = bucket->iclr; | 504 | set_softint(1 << PIL_DEVICE_IRQ); |
| 609 | 505 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate)); | |
| 610 | while (1) { | ||
| 611 | u32 tmp = upa_readl(iclr); | ||
| 612 | |||
| 613 | if (tmp == ICLR_TRANSMIT || | ||
| 614 | tmp == ICLR_PENDING) { | ||
| 615 | cpu_relax(); | ||
| 616 | continue; | ||
| 617 | } | ||
| 618 | break; | ||
| 619 | } | ||
| 620 | #else | ||
| 621 | /* So we have to do this with a INPROGRESS bit just like x86. */ | ||
| 622 | while (bucket->flags & IBF_INPROGRESS) | ||
| 623 | cpu_relax(); | ||
| 624 | #endif | ||
| 625 | } | 506 | } |
| 626 | #endif /* CONFIG_SMP */ | ||
| 627 | 507 | ||
| 628 | static void process_bucket(int irq, struct ino_bucket *bp, struct pt_regs *regs) | 508 | void ack_bad_irq(unsigned int virt_irq) |
| 629 | { | 509 | { |
| 630 | struct irq_desc *desc = bp->irq_info; | 510 | struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); |
| 631 | unsigned char flags = bp->flags; | 511 | unsigned int ino = 0xdeadbeef; |
| 632 | u32 action_mask, i; | ||
| 633 | int random; | ||
| 634 | 512 | ||
| 635 | bp->flags |= IBF_INPROGRESS; | 513 | if (bucket) |
| 514 | ino = bucket - &ivector_table[0]; | ||
| 636 | 515 | ||
| 637 | if (unlikely(!(flags & IBF_ACTIVE))) { | 516 | printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n", |
| 638 | bp->pending = 1; | 517 | ino, virt_irq); |
| 639 | goto out; | 518 | } |
| 640 | } | ||
| 641 | |||
| 642 | if (desc->pre_handler) | ||
| 643 | desc->pre_handler(bp, | ||
| 644 | desc->pre_handler_arg1, | ||
| 645 | desc->pre_handler_arg2); | ||
| 646 | 519 | ||
| 647 | action_mask = desc->action_active_mask; | 520 | #ifndef CONFIG_SMP |
| 648 | random = 0; | 521 | extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *); |
| 649 | for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) { | ||
| 650 | struct irqaction *p = &desc->action[i]; | ||
| 651 | u32 mask = (1 << i); | ||
| 652 | 522 | ||
| 653 | if (!(action_mask & mask)) | 523 | void timer_irq(int irq, struct pt_regs *regs) |
| 654 | continue; | 524 | { |
| 525 | unsigned long clr_mask = 1 << irq; | ||
| 526 | unsigned long tick_mask = tick_ops->softint_mask; | ||
| 655 | 527 | ||
| 656 | action_mask &= ~mask; | 528 | if (get_softint() & tick_mask) { |
| 529 | irq = 0; | ||
| 530 | clr_mask = tick_mask; | ||
| 531 | } | ||
| 532 | clear_softint(clr_mask); | ||
| 657 | 533 | ||
| 658 | if (p->handler(__irq(bp), p->dev_id, regs) == IRQ_HANDLED) | 534 | irq_enter(); |
| 659 | random |= p->flags; | ||
| 660 | 535 | ||
| 661 | if (!action_mask) | 536 | kstat_this_cpu.irqs[0]++; |
| 662 | break; | 537 | timer_interrupt(irq, NULL, regs); |
| 663 | } | ||
| 664 | if (bp->pil != 0) { | ||
| 665 | if (tlb_type == hypervisor) { | ||
| 666 | unsigned int ino = __irq_ino(bp); | ||
| 667 | int err; | ||
| 668 | |||
| 669 | err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE); | ||
| 670 | if (err != HV_EOK) | ||
| 671 | printk("sun4v_intr_setstate(%x): " | ||
| 672 | "err(%d)\n", ino, err); | ||
| 673 | } else { | ||
| 674 | upa_writel(ICLR_IDLE, bp->iclr); | ||
| 675 | } | ||
| 676 | 538 | ||
| 677 | /* Test and add entropy */ | 539 | irq_exit(); |
| 678 | if (random & SA_SAMPLE_RANDOM) | ||
| 679 | add_interrupt_randomness(irq); | ||
| 680 | } | ||
| 681 | out: | ||
| 682 | bp->flags &= ~IBF_INPROGRESS; | ||
| 683 | } | 540 | } |
| 541 | #endif | ||
| 684 | 542 | ||
| 685 | void handler_irq(int irq, struct pt_regs *regs) | 543 | void handler_irq(int irq, struct pt_regs *regs) |
| 686 | { | 544 | { |
| 687 | struct ino_bucket *bp; | 545 | struct ino_bucket *bucket; |
| 688 | int cpu = smp_processor_id(); | ||
| 689 | |||
| 690 | #ifndef CONFIG_SMP | ||
| 691 | /* | ||
| 692 | * Check for TICK_INT on level 14 softint. | ||
| 693 | */ | ||
| 694 | { | ||
| 695 | unsigned long clr_mask = 1 << irq; | ||
| 696 | unsigned long tick_mask = tick_ops->softint_mask; | ||
| 697 | 546 | ||
| 698 | if ((irq == 14) && (get_softint() & tick_mask)) { | ||
| 699 | irq = 0; | ||
| 700 | clr_mask = tick_mask; | ||
| 701 | } | ||
| 702 | clear_softint(clr_mask); | ||
| 703 | } | ||
| 704 | #else | ||
| 705 | clear_softint(1 << irq); | 547 | clear_softint(1 << irq); |
| 706 | #endif | ||
| 707 | 548 | ||
| 708 | irq_enter(); | 549 | irq_enter(); |
| 709 | kstat_this_cpu.irqs[irq]++; | ||
| 710 | 550 | ||
| 711 | /* Sliiiick... */ | 551 | /* Sliiiick... */ |
| 712 | #ifndef CONFIG_SMP | 552 | bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0)); |
| 713 | bp = ((irq != 0) ? | 553 | while (bucket) { |
| 714 | __bucket(xchg32(irq_work(cpu, irq), 0)) : | 554 | struct ino_bucket *next = __bucket(bucket->irq_chain); |
| 715 | &pil0_dummy_bucket); | ||
| 716 | #else | ||
| 717 | bp = __bucket(xchg32(irq_work(cpu, irq), 0)); | ||
| 718 | #endif | ||
| 719 | while (bp) { | ||
| 720 | struct ino_bucket *nbp = __bucket(bp->irq_chain); | ||
| 721 | 555 | ||
| 722 | bp->irq_chain = 0; | 556 | bucket->irq_chain = 0; |
| 723 | process_bucket(irq, bp, regs); | 557 | __do_IRQ(bucket->virt_irq, regs); |
| 724 | bp = nbp; | 558 | |
| 559 | bucket = next; | ||
| 725 | } | 560 | } |
| 561 | |||
| 726 | irq_exit(); | 562 | irq_exit(); |
| 727 | } | 563 | } |
| 728 | 564 | ||
| @@ -787,81 +623,6 @@ main_interrupt: | |||
| 787 | EXPORT_SYMBOL(sparc_floppy_irq); | 623 | EXPORT_SYMBOL(sparc_floppy_irq); |
| 788 | #endif | 624 | #endif |
| 789 | 625 | ||
| 790 | /* We really don't need these at all on the Sparc. We only have | ||
| 791 | * stubs here because they are exported to modules. | ||
| 792 | */ | ||
| 793 | unsigned long probe_irq_on(void) | ||
| 794 | { | ||
| 795 | return 0; | ||
| 796 | } | ||
| 797 | |||
| 798 | EXPORT_SYMBOL(probe_irq_on); | ||
| 799 | |||
| 800 | int probe_irq_off(unsigned long mask) | ||
| 801 | { | ||
| 802 | return 0; | ||
| 803 | } | ||
| 804 | |||
| 805 | EXPORT_SYMBOL(probe_irq_off); | ||
| 806 | |||
| 807 | #ifdef CONFIG_SMP | ||
| 808 | static int retarget_one_irq(struct irqaction *p, int goal_cpu) | ||
| 809 | { | ||
| 810 | struct ino_bucket *bucket = get_ino_in_irqaction(p) + ivector_table; | ||
| 811 | |||
| 812 | while (!cpu_online(goal_cpu)) { | ||
| 813 | if (++goal_cpu >= NR_CPUS) | ||
| 814 | goal_cpu = 0; | ||
| 815 | } | ||
| 816 | |||
| 817 | if (tlb_type == hypervisor) { | ||
| 818 | unsigned int ino = __irq_ino(bucket); | ||
| 819 | |||
| 820 | sun4v_intr_settarget(ino, goal_cpu); | ||
| 821 | sun4v_intr_setenabled(ino, HV_INTR_ENABLED); | ||
| 822 | } else { | ||
| 823 | unsigned long imap = bucket->imap; | ||
| 824 | unsigned int tid = sun4u_compute_tid(imap, goal_cpu); | ||
| 825 | |||
| 826 | upa_writel(tid | IMAP_VALID, imap); | ||
| 827 | } | ||
| 828 | |||
| 829 | do { | ||
| 830 | if (++goal_cpu >= NR_CPUS) | ||
| 831 | goal_cpu = 0; | ||
| 832 | } while (!cpu_online(goal_cpu)); | ||
| 833 | |||
| 834 | return goal_cpu; | ||
| 835 | } | ||
| 836 | |||
| 837 | /* Called from request_irq. */ | ||
| 838 | static void distribute_irqs(void) | ||
| 839 | { | ||
| 840 | unsigned long flags; | ||
| 841 | int cpu, level; | ||
| 842 | |||
| 843 | spin_lock_irqsave(&irq_action_lock, flags); | ||
| 844 | cpu = 0; | ||
| 845 | |||
| 846 | /* | ||
| 847 | * Skip the timer at [0], and very rare error/power intrs at [15]. | ||
| 848 | * Also level [12], it causes problems on Ex000 systems. | ||
| 849 | */ | ||
| 850 | for (level = 1; level < NR_IRQS; level++) { | ||
| 851 | struct irqaction *p = irq_action[level]; | ||
| 852 | |||
| 853 | if (level == 12) | ||
| 854 | continue; | ||
| 855 | |||
| 856 | while(p) { | ||
| 857 | cpu = retarget_one_irq(p, cpu); | ||
| 858 | p = p->next; | ||
| 859 | } | ||
| 860 | } | ||
| 861 | spin_unlock_irqrestore(&irq_action_lock, flags); | ||
| 862 | } | ||
| 863 | #endif | ||
| 864 | |||
| 865 | struct sun5_timer { | 626 | struct sun5_timer { |
| 866 | u64 count0; | 627 | u64 count0; |
| 867 | u64 limit0; | 628 | u64 limit0; |
| @@ -929,7 +690,7 @@ void init_irqwork_curcpu(void) | |||
| 929 | { | 690 | { |
| 930 | int cpu = hard_smp_processor_id(); | 691 | int cpu = hard_smp_processor_id(); |
| 931 | 692 | ||
| 932 | memset(__irq_work + cpu, 0, sizeof(struct irq_work_struct)); | 693 | trap_block[cpu].irq_worklist = 0; |
| 933 | } | 694 | } |
| 934 | 695 | ||
| 935 | static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type) | 696 | static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type) |
| @@ -1037,6 +798,10 @@ void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int | |||
| 1037 | } | 798 | } |
| 1038 | } | 799 | } |
| 1039 | 800 | ||
| 801 | static struct irqaction timer_irq_action = { | ||
| 802 | .name = "timer", | ||
| 803 | }; | ||
| 804 | |||
| 1040 | /* Only invoked on boot processor. */ | 805 | /* Only invoked on boot processor. */ |
| 1041 | void __init init_IRQ(void) | 806 | void __init init_IRQ(void) |
| 1042 | { | 807 | { |
| @@ -1064,109 +829,6 @@ void __init init_IRQ(void) | |||
| 1064 | : /* No outputs */ | 829 | : /* No outputs */ |
| 1065 | : "i" (PSTATE_IE) | 830 | : "i" (PSTATE_IE) |
| 1066 | : "g1"); | 831 | : "g1"); |
| 1067 | } | ||
| 1068 | 832 | ||
| 1069 | static struct proc_dir_entry * root_irq_dir; | 833 | irq_desc[0].action = &timer_irq_action; |
| 1070 | static struct proc_dir_entry * irq_dir [NUM_IVECS]; | ||
| 1071 | |||
| 1072 | #ifdef CONFIG_SMP | ||
| 1073 | |||
| 1074 | static int irq_affinity_read_proc (char *page, char **start, off_t off, | ||
| 1075 | int count, int *eof, void *data) | ||
| 1076 | { | ||
| 1077 | struct ino_bucket *bp = ivector_table + (long)data; | ||
| 1078 | struct irq_desc *desc = bp->irq_info; | ||
| 1079 | struct irqaction *ap = desc->action; | ||
| 1080 | cpumask_t mask; | ||
| 1081 | int len; | ||
| 1082 | |||
| 1083 | mask = get_smpaff_in_irqaction(ap); | ||
| 1084 | if (cpus_empty(mask)) | ||
| 1085 | mask = cpu_online_map; | ||
| 1086 | |||
| 1087 | len = cpumask_scnprintf(page, count, mask); | ||
| 1088 | if (count - len < 2) | ||
| 1089 | return -EINVAL; | ||
| 1090 | len += sprintf(page + len, "\n"); | ||
| 1091 | return len; | ||
| 1092 | } | ||
| 1093 | |||
| 1094 | static inline void set_intr_affinity(int irq, cpumask_t hw_aff) | ||
| 1095 | { | ||
| 1096 | struct ino_bucket *bp = ivector_table + irq; | ||
| 1097 | struct irq_desc *desc = bp->irq_info; | ||
| 1098 | struct irqaction *ap = desc->action; | ||
| 1099 | |||
| 1100 | /* Users specify affinity in terms of hw cpu ids. | ||
| 1101 | * As soon as we do this, handler_irq() might see and take action. | ||
| 1102 | */ | ||
| 1103 | put_smpaff_in_irqaction(ap, hw_aff); | ||
| 1104 | |||
| 1105 | /* Migration is simply done by the next cpu to service this | ||
| 1106 | * interrupt. | ||
| 1107 | */ | ||
| 1108 | } | ||
| 1109 | |||
| 1110 | static int irq_affinity_write_proc (struct file *file, const char __user *buffer, | ||
| 1111 | unsigned long count, void *data) | ||
| 1112 | { | ||
| 1113 | int irq = (long) data, full_count = count, err; | ||
| 1114 | cpumask_t new_value; | ||
| 1115 | |||
| 1116 | err = cpumask_parse(buffer, count, new_value); | ||
| 1117 | |||
| 1118 | /* | ||
| 1119 | * Do not allow disabling IRQs completely - it's a too easy | ||
| 1120 | * way to make the system unusable accidentally :-) At least | ||
| 1121 | * one online CPU still has to be targeted. | ||
| 1122 | */ | ||
| 1123 | cpus_and(new_value, new_value, cpu_online_map); | ||
| 1124 | if (cpus_empty(new_value)) | ||
| 1125 | return -EINVAL; | ||
| 1126 | |||
| 1127 | set_intr_affinity(irq, new_value); | ||
| 1128 | |||
| 1129 | return full_count; | ||
| 1130 | } | 834 | } |
| 1131 | |||
| 1132 | #endif | ||
| 1133 | |||
| 1134 | #define MAX_NAMELEN 10 | ||
| 1135 | |||
| 1136 | static void register_irq_proc (unsigned int irq) | ||
| 1137 | { | ||
| 1138 | char name [MAX_NAMELEN]; | ||
| 1139 | |||
| 1140 | if (!root_irq_dir || irq_dir[irq]) | ||
| 1141 | return; | ||
| 1142 | |||
| 1143 | memset(name, 0, MAX_NAMELEN); | ||
| 1144 | sprintf(name, "%x", irq); | ||
| 1145 | |||
| 1146 | /* create /proc/irq/1234 */ | ||
| 1147 | irq_dir[irq] = proc_mkdir(name, root_irq_dir); | ||
| 1148 | |||
| 1149 | #ifdef CONFIG_SMP | ||
| 1150 | /* XXX SMP affinity not supported on starfire yet. */ | ||
| 1151 | if (this_is_starfire == 0) { | ||
| 1152 | struct proc_dir_entry *entry; | ||
| 1153 | |||
| 1154 | /* create /proc/irq/1234/smp_affinity */ | ||
| 1155 | entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]); | ||
| 1156 | |||
| 1157 | if (entry) { | ||
| 1158 | entry->nlink = 1; | ||
| 1159 | entry->data = (void *)(long)irq; | ||
| 1160 | entry->read_proc = irq_affinity_read_proc; | ||
| 1161 | entry->write_proc = irq_affinity_write_proc; | ||
| 1162 | } | ||
| 1163 | } | ||
| 1164 | #endif | ||
| 1165 | } | ||
| 1166 | |||
| 1167 | void init_irq_proc (void) | ||
| 1168 | { | ||
| 1169 | /* create /proc/irq */ | ||
| 1170 | root_irq_dir = proc_mkdir("irq", NULL); | ||
| 1171 | } | ||
| 1172 | |||
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index f97ddeb105ac..9472580a4319 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
| @@ -47,12 +47,6 @@ struct pci_controller_info *pci_controller_root = NULL; | |||
| 47 | /* Each PCI controller found gets a unique index. */ | 47 | /* Each PCI controller found gets a unique index. */ |
| 48 | int pci_num_controllers = 0; | 48 | int pci_num_controllers = 0; |
| 49 | 49 | ||
| 50 | /* At boot time the user can give the kernel a command | ||
| 51 | * line option which controls if and how PCI devices | ||
| 52 | * are reordered at PCI bus probing time. | ||
| 53 | */ | ||
| 54 | int pci_device_reorder = 0; | ||
| 55 | |||
| 56 | volatile int pci_poke_in_progress; | 50 | volatile int pci_poke_in_progress; |
| 57 | volatile int pci_poke_cpu = -1; | 51 | volatile int pci_poke_cpu = -1; |
| 58 | volatile int pci_poke_faulted; | 52 | volatile int pci_poke_faulted; |
| @@ -316,27 +310,6 @@ static void __init pci_scan_each_controller_bus(void) | |||
| 316 | p->scan_bus(p); | 310 | p->scan_bus(p); |
| 317 | } | 311 | } |
| 318 | 312 | ||
| 319 | /* Reorder the pci_dev chain, so that onboard devices come first | ||
| 320 | * and then come the pluggable cards. | ||
| 321 | */ | ||
| 322 | static void __init pci_reorder_devs(void) | ||
| 323 | { | ||
| 324 | struct list_head *pci_onboard = &pci_devices; | ||
| 325 | struct list_head *walk = pci_onboard->next; | ||
| 326 | |||
| 327 | while (walk != pci_onboard) { | ||
| 328 | struct pci_dev *pdev = pci_dev_g(walk); | ||
| 329 | struct list_head *walk_next = walk->next; | ||
| 330 | |||
| 331 | if (pdev->irq && (__irq_ino(pdev->irq) & 0x20)) { | ||
| 332 | list_del(walk); | ||
| 333 | list_add(walk, pci_onboard); | ||
| 334 | } | ||
| 335 | |||
| 336 | walk = walk_next; | ||
| 337 | } | ||
| 338 | } | ||
| 339 | |||
| 340 | extern void clock_probe(void); | 313 | extern void clock_probe(void); |
| 341 | extern void power_init(void); | 314 | extern void power_init(void); |
| 342 | 315 | ||
| @@ -348,9 +321,6 @@ static int __init pcibios_init(void) | |||
| 348 | 321 | ||
| 349 | pci_scan_each_controller_bus(); | 322 | pci_scan_each_controller_bus(); |
| 350 | 323 | ||
| 351 | if (pci_device_reorder) | ||
| 352 | pci_reorder_devs(); | ||
| 353 | |||
| 354 | isa_init(); | 324 | isa_init(); |
| 355 | ebus_init(); | 325 | ebus_init(); |
| 356 | clock_probe(); | 326 | clock_probe(); |
| @@ -441,14 +411,6 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
| 441 | 411 | ||
| 442 | char * __init pcibios_setup(char *str) | 412 | char * __init pcibios_setup(char *str) |
| 443 | { | 413 | { |
| 444 | if (!strcmp(str, "onboardfirst")) { | ||
| 445 | pci_device_reorder = 1; | ||
| 446 | return NULL; | ||
| 447 | } | ||
| 448 | if (!strcmp(str, "noreorder")) { | ||
| 449 | pci_device_reorder = 0; | ||
| 450 | return NULL; | ||
| 451 | } | ||
| 452 | return str; | 414 | return str; |
| 453 | } | 415 | } |
| 454 | 416 | ||
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c index d17878b145c2..24db22aa9728 100644 --- a/arch/sparc64/kernel/pci_psycho.c +++ b/arch/sparc64/kernel/pci_psycho.c | |||
| @@ -276,82 +276,13 @@ static unsigned long __onboard_imap_off[] = { | |||
| 276 | ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | 276 | ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ |
| 277 | (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | 277 | (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) |
| 278 | 278 | ||
| 279 | /* PCI PSYCHO INO number to Sparc PIL level. */ | ||
| 280 | static unsigned char psycho_pil_table[] = { | ||
| 281 | /*0x00*/0, 0, 0, 0, /* PCI A slot 0 Int A, B, C, D */ | ||
| 282 | /*0x04*/0, 0, 0, 0, /* PCI A slot 1 Int A, B, C, D */ | ||
| 283 | /*0x08*/0, 0, 0, 0, /* PCI A slot 2 Int A, B, C, D */ | ||
| 284 | /*0x0c*/0, 0, 0, 0, /* PCI A slot 3 Int A, B, C, D */ | ||
| 285 | /*0x10*/0, 0, 0, 0, /* PCI B slot 0 Int A, B, C, D */ | ||
| 286 | /*0x14*/0, 0, 0, 0, /* PCI B slot 1 Int A, B, C, D */ | ||
| 287 | /*0x18*/0, 0, 0, 0, /* PCI B slot 2 Int A, B, C, D */ | ||
| 288 | /*0x1c*/0, 0, 0, 0, /* PCI B slot 3 Int A, B, C, D */ | ||
| 289 | /*0x20*/5, /* SCSI */ | ||
| 290 | /*0x21*/5, /* Ethernet */ | ||
| 291 | /*0x22*/8, /* Parallel Port */ | ||
| 292 | /*0x23*/13, /* Audio Record */ | ||
| 293 | /*0x24*/14, /* Audio Playback */ | ||
| 294 | /*0x25*/15, /* PowerFail */ | ||
| 295 | /*0x26*/5, /* second SCSI */ | ||
| 296 | /*0x27*/11, /* Floppy */ | ||
| 297 | /*0x28*/5, /* Spare Hardware */ | ||
| 298 | /*0x29*/9, /* Keyboard */ | ||
| 299 | /*0x2a*/5, /* Mouse */ | ||
| 300 | /*0x2b*/12, /* Serial */ | ||
| 301 | /*0x2c*/10, /* Timer 0 */ | ||
| 302 | /*0x2d*/11, /* Timer 1 */ | ||
| 303 | /*0x2e*/15, /* Uncorrectable ECC */ | ||
| 304 | /*0x2f*/15, /* Correctable ECC */ | ||
| 305 | /*0x30*/15, /* PCI Bus A Error */ | ||
| 306 | /*0x31*/15, /* PCI Bus B Error */ | ||
| 307 | /*0x32*/15, /* Power Management */ | ||
| 308 | }; | ||
| 309 | |||
| 310 | static int psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino) | ||
| 311 | { | ||
| 312 | int ret; | ||
| 313 | |||
| 314 | ret = psycho_pil_table[ino]; | ||
| 315 | if (ret == 0 && pdev == NULL) { | ||
| 316 | ret = 5; | ||
| 317 | } else if (ret == 0) { | ||
| 318 | switch ((pdev->class >> 16) & 0xff) { | ||
| 319 | case PCI_BASE_CLASS_STORAGE: | ||
| 320 | ret = 5; | ||
| 321 | break; | ||
| 322 | |||
| 323 | case PCI_BASE_CLASS_NETWORK: | ||
| 324 | ret = 6; | ||
| 325 | break; | ||
| 326 | |||
| 327 | case PCI_BASE_CLASS_DISPLAY: | ||
| 328 | ret = 9; | ||
| 329 | break; | ||
| 330 | |||
| 331 | case PCI_BASE_CLASS_MULTIMEDIA: | ||
| 332 | case PCI_BASE_CLASS_MEMORY: | ||
| 333 | case PCI_BASE_CLASS_BRIDGE: | ||
| 334 | case PCI_BASE_CLASS_SERIAL: | ||
| 335 | ret = 10; | ||
| 336 | break; | ||
| 337 | |||
| 338 | default: | ||
| 339 | ret = 5; | ||
| 340 | break; | ||
| 341 | }; | ||
| 342 | } | ||
| 343 | |||
| 344 | return ret; | ||
| 345 | } | ||
| 346 | |||
| 347 | static unsigned int psycho_irq_build(struct pci_pbm_info *pbm, | 279 | static unsigned int psycho_irq_build(struct pci_pbm_info *pbm, |
| 348 | struct pci_dev *pdev, | 280 | struct pci_dev *pdev, |
| 349 | unsigned int ino) | 281 | unsigned int ino) |
| 350 | { | 282 | { |
| 351 | struct ino_bucket *bucket; | ||
| 352 | unsigned long imap, iclr; | 283 | unsigned long imap, iclr; |
| 353 | unsigned long imap_off, iclr_off; | 284 | unsigned long imap_off, iclr_off; |
| 354 | int pil, inofixup = 0; | 285 | int inofixup = 0; |
| 355 | 286 | ||
| 356 | ino &= PCI_IRQ_INO; | 287 | ino &= PCI_IRQ_INO; |
| 357 | if (ino < PSYCHO_ONBOARD_IRQ_BASE) { | 288 | if (ino < PSYCHO_ONBOARD_IRQ_BASE) { |
| @@ -367,11 +298,6 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm, | |||
| 367 | } | 298 | } |
| 368 | 299 | ||
| 369 | /* Now build the IRQ bucket. */ | 300 | /* Now build the IRQ bucket. */ |
| 370 | pil = psycho_ino_to_pil(pdev, ino); | ||
| 371 | |||
| 372 | if (PIL_RESERVED(pil)) | ||
| 373 | BUG(); | ||
| 374 | |||
| 375 | imap = pbm->controller_regs + imap_off; | 301 | imap = pbm->controller_regs + imap_off; |
| 376 | imap += 4; | 302 | imap += 4; |
| 377 | 303 | ||
| @@ -382,10 +308,7 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm, | |||
| 382 | if ((ino & 0x20) == 0) | 308 | if ((ino & 0x20) == 0) |
| 383 | inofixup = ino & 0x03; | 309 | inofixup = ino & 0x03; |
| 384 | 310 | ||
| 385 | bucket = __bucket(build_irq(pil, inofixup, iclr, imap)); | 311 | return build_irq(inofixup, iclr, imap); |
| 386 | bucket->flags |= IBF_PCI; | ||
| 387 | |||
| 388 | return __irq(bucket); | ||
| 389 | } | 312 | } |
| 390 | 313 | ||
| 391 | /* PSYCHO error handling support. */ | 314 | /* PSYCHO error handling support. */ |
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c index f67bb7f078cf..b7d997b55f0a 100644 --- a/arch/sparc64/kernel/pci_sabre.c +++ b/arch/sparc64/kernel/pci_sabre.c | |||
| @@ -523,78 +523,6 @@ static unsigned long __onboard_imap_off[] = { | |||
| 523 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | 523 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ |
| 524 | (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | 524 | (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) |
| 525 | 525 | ||
| 526 | /* PCI SABRE INO number to Sparc PIL level. */ | ||
| 527 | static unsigned char sabre_pil_table[] = { | ||
| 528 | /*0x00*/0, 0, 0, 0, /* PCI A slot 0 Int A, B, C, D */ | ||
| 529 | /*0x04*/0, 0, 0, 0, /* PCI A slot 1 Int A, B, C, D */ | ||
| 530 | /*0x08*/0, 0, 0, 0, /* PCI A slot 2 Int A, B, C, D */ | ||
| 531 | /*0x0c*/0, 0, 0, 0, /* PCI A slot 3 Int A, B, C, D */ | ||
| 532 | /*0x10*/0, 0, 0, 0, /* PCI B slot 0 Int A, B, C, D */ | ||
| 533 | /*0x14*/0, 0, 0, 0, /* PCI B slot 1 Int A, B, C, D */ | ||
| 534 | /*0x18*/0, 0, 0, 0, /* PCI B slot 2 Int A, B, C, D */ | ||
| 535 | /*0x1c*/0, 0, 0, 0, /* PCI B slot 3 Int A, B, C, D */ | ||
| 536 | /*0x20*/5, /* SCSI */ | ||
| 537 | /*0x21*/5, /* Ethernet */ | ||
| 538 | /*0x22*/8, /* Parallel Port */ | ||
| 539 | /*0x23*/13, /* Audio Record */ | ||
| 540 | /*0x24*/14, /* Audio Playback */ | ||
| 541 | /*0x25*/15, /* PowerFail */ | ||
| 542 | /*0x26*/5, /* second SCSI */ | ||
| 543 | /*0x27*/11, /* Floppy */ | ||
| 544 | /*0x28*/5, /* Spare Hardware */ | ||
| 545 | /*0x29*/9, /* Keyboard */ | ||
| 546 | /*0x2a*/5, /* Mouse */ | ||
| 547 | /*0x2b*/12, /* Serial */ | ||
| 548 | /*0x2c*/10, /* Timer 0 */ | ||
| 549 | /*0x2d*/11, /* Timer 1 */ | ||
| 550 | /*0x2e*/15, /* Uncorrectable ECC */ | ||
| 551 | /*0x2f*/15, /* Correctable ECC */ | ||
| 552 | /*0x30*/15, /* PCI Bus A Error */ | ||
| 553 | /*0x31*/15, /* PCI Bus B Error */ | ||
| 554 | /*0x32*/15, /* Power Management */ | ||
| 555 | }; | ||
| 556 | |||
| 557 | static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) | ||
| 558 | { | ||
| 559 | int ret; | ||
| 560 | |||
| 561 | if (pdev && | ||
| 562 | pdev->vendor == PCI_VENDOR_ID_SUN && | ||
| 563 | pdev->device == PCI_DEVICE_ID_SUN_RIO_USB) | ||
| 564 | return 9; | ||
| 565 | |||
| 566 | ret = sabre_pil_table[ino]; | ||
| 567 | if (ret == 0 && pdev == NULL) { | ||
| 568 | ret = 5; | ||
| 569 | } else if (ret == 0) { | ||
| 570 | switch ((pdev->class >> 16) & 0xff) { | ||
| 571 | case PCI_BASE_CLASS_STORAGE: | ||
| 572 | ret = 5; | ||
| 573 | break; | ||
| 574 | |||
| 575 | case PCI_BASE_CLASS_NETWORK: | ||
| 576 | ret = 6; | ||
| 577 | break; | ||
| 578 | |||
| 579 | case PCI_BASE_CLASS_DISPLAY: | ||
| 580 | ret = 9; | ||
| 581 | break; | ||
| 582 | |||
| 583 | case PCI_BASE_CLASS_MULTIMEDIA: | ||
| 584 | case PCI_BASE_CLASS_MEMORY: | ||
| 585 | case PCI_BASE_CLASS_BRIDGE: | ||
| 586 | case PCI_BASE_CLASS_SERIAL: | ||
| 587 | ret = 10; | ||
| 588 | break; | ||
| 589 | |||
| 590 | default: | ||
| 591 | ret = 5; | ||
| 592 | break; | ||
| 593 | }; | ||
| 594 | } | ||
| 595 | return ret; | ||
| 596 | } | ||
| 597 | |||
| 598 | /* When a device lives behind a bridge deeper in the PCI bus topology | 526 | /* When a device lives behind a bridge deeper in the PCI bus topology |
| 599 | * than APB, a special sequence must run to make sure all pending DMA | 527 | * than APB, a special sequence must run to make sure all pending DMA |
| 600 | * transfers at the time of IRQ delivery are visible in the coherency | 528 | * transfers at the time of IRQ delivery are visible in the coherency |
| @@ -602,7 +530,7 @@ static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) | |||
| 602 | * side of the non-APB bridge, then perform a read of Sabre's DMA | 530 | * side of the non-APB bridge, then perform a read of Sabre's DMA |
| 603 | * write-sync register. | 531 | * write-sync register. |
| 604 | */ | 532 | */ |
| 605 | static void sabre_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_arg2) | 533 | static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) |
| 606 | { | 534 | { |
| 607 | struct pci_dev *pdev = _arg1; | 535 | struct pci_dev *pdev = _arg1; |
| 608 | unsigned long sync_reg = (unsigned long) _arg2; | 536 | unsigned long sync_reg = (unsigned long) _arg2; |
| @@ -616,10 +544,10 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm, | |||
| 616 | struct pci_dev *pdev, | 544 | struct pci_dev *pdev, |
| 617 | unsigned int ino) | 545 | unsigned int ino) |
| 618 | { | 546 | { |
| 619 | struct ino_bucket *bucket; | ||
| 620 | unsigned long imap, iclr; | 547 | unsigned long imap, iclr; |
| 621 | unsigned long imap_off, iclr_off; | 548 | unsigned long imap_off, iclr_off; |
| 622 | int pil, inofixup = 0; | 549 | int inofixup = 0; |
| 550 | int virt_irq; | ||
| 623 | 551 | ||
| 624 | ino &= PCI_IRQ_INO; | 552 | ino &= PCI_IRQ_INO; |
| 625 | if (ino < SABRE_ONBOARD_IRQ_BASE) { | 553 | if (ino < SABRE_ONBOARD_IRQ_BASE) { |
| @@ -635,11 +563,6 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm, | |||
| 635 | } | 563 | } |
| 636 | 564 | ||
| 637 | /* Now build the IRQ bucket. */ | 565 | /* Now build the IRQ bucket. */ |
| 638 | pil = sabre_ino_to_pil(pdev, ino); | ||
| 639 | |||
| 640 | if (PIL_RESERVED(pil)) | ||
| 641 | BUG(); | ||
| 642 | |||
| 643 | imap = pbm->controller_regs + imap_off; | 566 | imap = pbm->controller_regs + imap_off; |
| 644 | imap += 4; | 567 | imap += 4; |
| 645 | 568 | ||
| @@ -650,23 +573,23 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm, | |||
| 650 | if ((ino & 0x20) == 0) | 573 | if ((ino & 0x20) == 0) |
| 651 | inofixup = ino & 0x03; | 574 | inofixup = ino & 0x03; |
| 652 | 575 | ||
| 653 | bucket = __bucket(build_irq(pil, inofixup, iclr, imap)); | 576 | virt_irq = build_irq(inofixup, iclr, imap); |
| 654 | bucket->flags |= IBF_PCI; | ||
| 655 | 577 | ||
| 656 | if (pdev) { | 578 | if (pdev) { |
| 657 | struct pcidev_cookie *pcp = pdev->sysdata; | 579 | struct pcidev_cookie *pcp = pdev->sysdata; |
| 658 | 580 | ||
| 659 | if (pdev->bus->number != pcp->pbm->pci_first_busno) { | 581 | if (pdev->bus->number != pcp->pbm->pci_first_busno) { |
| 660 | struct pci_controller_info *p = pcp->pbm->parent; | 582 | struct pci_controller_info *p = pcp->pbm->parent; |
| 661 | struct irq_desc *d = bucket->irq_info; | ||
| 662 | 583 | ||
| 663 | d->pre_handler = sabre_wsync_handler; | 584 | irq_install_pre_handler(virt_irq, |
| 664 | d->pre_handler_arg1 = pdev; | 585 | sabre_wsync_handler, |
| 665 | d->pre_handler_arg2 = (void *) | 586 | pdev, |
| 666 | p->pbm_A.controller_regs + SABRE_WRSYNC; | 587 | (void *) |
| 588 | p->pbm_A.controller_regs + | ||
| 589 | SABRE_WRSYNC); | ||
| 667 | } | 590 | } |
| 668 | } | 591 | } |
| 669 | return __irq(bucket); | 592 | return virt_irq; |
| 670 | } | 593 | } |
| 671 | 594 | ||
| 672 | /* SABRE error handling support. */ | 595 | /* SABRE error handling support. */ |
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c index 7fe4de03ac2e..cc662e915d32 100644 --- a/arch/sparc64/kernel/pci_schizo.c +++ b/arch/sparc64/kernel/pci_schizo.c | |||
| @@ -232,105 +232,10 @@ static unsigned long schizo_iclr_offset(unsigned long ino) | |||
| 232 | return SCHIZO_ICLR_BASE + (ino * 8UL); | 232 | return SCHIZO_ICLR_BASE + (ino * 8UL); |
| 233 | } | 233 | } |
| 234 | 234 | ||
| 235 | /* PCI SCHIZO INO number to Sparc PIL level. This table only matters for | 235 | static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) |
| 236 | * INOs which will not have an associated PCI device struct, ie. onboard | ||
| 237 | * EBUS devices and PCI controller internal error interrupts. | ||
| 238 | */ | ||
| 239 | static unsigned char schizo_pil_table[] = { | ||
| 240 | /*0x00*/0, 0, 0, 0, /* PCI slot 0 Int A, B, C, D */ | ||
| 241 | /*0x04*/0, 0, 0, 0, /* PCI slot 1 Int A, B, C, D */ | ||
| 242 | /*0x08*/0, 0, 0, 0, /* PCI slot 2 Int A, B, C, D */ | ||
| 243 | /*0x0c*/0, 0, 0, 0, /* PCI slot 3 Int A, B, C, D */ | ||
| 244 | /*0x10*/0, 0, 0, 0, /* PCI slot 4 Int A, B, C, D */ | ||
| 245 | /*0x14*/0, 0, 0, 0, /* PCI slot 5 Int A, B, C, D */ | ||
| 246 | /*0x18*/5, /* SCSI */ | ||
| 247 | /*0x19*/5, /* second SCSI */ | ||
| 248 | /*0x1a*/0, /* UNKNOWN */ | ||
| 249 | /*0x1b*/0, /* UNKNOWN */ | ||
| 250 | /*0x1c*/8, /* Parallel */ | ||
| 251 | /*0x1d*/5, /* Ethernet */ | ||
| 252 | /*0x1e*/8, /* Firewire-1394 */ | ||
| 253 | /*0x1f*/9, /* USB */ | ||
| 254 | /*0x20*/13, /* Audio Record */ | ||
| 255 | /*0x21*/14, /* Audio Playback */ | ||
| 256 | /*0x22*/12, /* Serial */ | ||
| 257 | /*0x23*/5, /* EBUS I2C */ | ||
| 258 | /*0x24*/10, /* RTC Clock */ | ||
| 259 | /*0x25*/11, /* Floppy */ | ||
| 260 | /*0x26*/0, /* UNKNOWN */ | ||
| 261 | /*0x27*/0, /* UNKNOWN */ | ||
| 262 | /*0x28*/0, /* UNKNOWN */ | ||
| 263 | /*0x29*/0, /* UNKNOWN */ | ||
| 264 | /*0x2a*/10, /* UPA 1 */ | ||
| 265 | /*0x2b*/10, /* UPA 2 */ | ||
| 266 | /*0x2c*/0, /* UNKNOWN */ | ||
| 267 | /*0x2d*/0, /* UNKNOWN */ | ||
| 268 | /*0x2e*/0, /* UNKNOWN */ | ||
| 269 | /*0x2f*/0, /* UNKNOWN */ | ||
| 270 | /*0x30*/15, /* Uncorrectable ECC */ | ||
| 271 | /*0x31*/15, /* Correctable ECC */ | ||
| 272 | /*0x32*/15, /* PCI Bus A Error */ | ||
| 273 | /*0x33*/15, /* PCI Bus B Error */ | ||
| 274 | /*0x34*/15, /* Safari Bus Error */ | ||
| 275 | /*0x35*/0, /* Reserved */ | ||
| 276 | /*0x36*/0, /* Reserved */ | ||
| 277 | /*0x37*/0, /* Reserved */ | ||
| 278 | /*0x38*/0, /* Reserved for NewLink */ | ||
| 279 | /*0x39*/0, /* Reserved for NewLink */ | ||
| 280 | /*0x3a*/0, /* Reserved for NewLink */ | ||
| 281 | /*0x3b*/0, /* Reserved for NewLink */ | ||
| 282 | /*0x3c*/0, /* Reserved for NewLink */ | ||
| 283 | /*0x3d*/0, /* Reserved for NewLink */ | ||
| 284 | /*0x3e*/0, /* Reserved for NewLink */ | ||
| 285 | /*0x3f*/0, /* Reserved for NewLink */ | ||
| 286 | }; | ||
| 287 | |||
| 288 | static int schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino) | ||
| 289 | { | ||
| 290 | int ret; | ||
| 291 | |||
| 292 | if (pdev && | ||
| 293 | pdev->vendor == PCI_VENDOR_ID_SUN && | ||
| 294 | pdev->device == PCI_DEVICE_ID_SUN_RIO_USB) | ||
| 295 | return 9; | ||
| 296 | |||
| 297 | ret = schizo_pil_table[ino]; | ||
| 298 | if (ret == 0 && pdev == NULL) { | ||
| 299 | ret = 5; | ||
| 300 | } else if (ret == 0) { | ||
| 301 | switch ((pdev->class >> 16) & 0xff) { | ||
| 302 | case PCI_BASE_CLASS_STORAGE: | ||
| 303 | ret = 5; | ||
| 304 | break; | ||
| 305 | |||
| 306 | case PCI_BASE_CLASS_NETWORK: | ||
| 307 | ret = 6; | ||
| 308 | break; | ||
| 309 | |||
| 310 | case PCI_BASE_CLASS_DISPLAY: | ||
| 311 | ret = 9; | ||
| 312 | break; | ||
| 313 | |||
| 314 | case PCI_BASE_CLASS_MULTIMEDIA: | ||
| 315 | case PCI_BASE_CLASS_MEMORY: | ||
| 316 | case PCI_BASE_CLASS_BRIDGE: | ||
| 317 | case PCI_BASE_CLASS_SERIAL: | ||
| 318 | ret = 10; | ||
| 319 | break; | ||
| 320 | |||
| 321 | default: | ||
| 322 | ret = 5; | ||
| 323 | break; | ||
| 324 | }; | ||
| 325 | } | ||
| 326 | |||
| 327 | return ret; | ||
| 328 | } | ||
| 329 | |||
| 330 | static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_arg2) | ||
| 331 | { | 236 | { |
| 332 | unsigned long sync_reg = (unsigned long) _arg2; | 237 | unsigned long sync_reg = (unsigned long) _arg2; |
| 333 | u64 mask = 1UL << (__irq_ino(__irq(bucket)) & IMAP_INO); | 238 | u64 mask = 1UL << (ino & IMAP_INO); |
| 334 | u64 val; | 239 | u64 val; |
| 335 | int limit; | 240 | int limit; |
| 336 | 241 | ||
| @@ -365,30 +270,33 @@ static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void | |||
| 365 | } | 270 | } |
| 366 | } | 271 | } |
| 367 | 272 | ||
| 273 | static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm, | ||
| 274 | unsigned int ino) | ||
| 275 | { | ||
| 276 | ino &= PCI_IRQ_INO; | ||
| 277 | return pbm->pbm_regs + schizo_iclr_offset(ino) + 4; | ||
| 278 | } | ||
| 279 | |||
| 280 | static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm, | ||
| 281 | unsigned int ino) | ||
| 282 | { | ||
| 283 | ino &= PCI_IRQ_INO; | ||
| 284 | return pbm->pbm_regs + schizo_imap_offset(ino) + 4; | ||
| 285 | } | ||
| 286 | |||
| 368 | static unsigned int schizo_irq_build(struct pci_pbm_info *pbm, | 287 | static unsigned int schizo_irq_build(struct pci_pbm_info *pbm, |
| 369 | struct pci_dev *pdev, | 288 | struct pci_dev *pdev, |
| 370 | unsigned int ino) | 289 | unsigned int ino) |
| 371 | { | 290 | { |
| 372 | struct ino_bucket *bucket; | ||
| 373 | unsigned long imap, iclr; | 291 | unsigned long imap, iclr; |
| 374 | unsigned long imap_off, iclr_off; | 292 | int ign_fixup; |
| 375 | int pil, ign_fixup; | 293 | int virt_irq; |
| 376 | 294 | ||
| 377 | ino &= PCI_IRQ_INO; | 295 | ino &= PCI_IRQ_INO; |
| 378 | imap_off = schizo_imap_offset(ino); | ||
| 379 | 296 | ||
| 380 | /* Now build the IRQ bucket. */ | 297 | /* Now build the IRQ bucket. */ |
| 381 | pil = schizo_ino_to_pil(pdev, ino); | 298 | imap = schizo_ino_to_imap(pbm, ino); |
| 382 | 299 | iclr = schizo_ino_to_iclr(pbm, ino); | |
| 383 | if (PIL_RESERVED(pil)) | ||
| 384 | BUG(); | ||
| 385 | |||
| 386 | imap = pbm->pbm_regs + imap_off; | ||
| 387 | imap += 4; | ||
| 388 | |||
| 389 | iclr_off = schizo_iclr_offset(ino); | ||
| 390 | iclr = pbm->pbm_regs + iclr_off; | ||
| 391 | iclr += 4; | ||
| 392 | 300 | ||
| 393 | /* On Schizo, no inofixup occurs. This is because each | 301 | /* On Schizo, no inofixup occurs. This is because each |
| 394 | * INO has it's own IMAP register. On Psycho and Sabre | 302 | * INO has it's own IMAP register. On Psycho and Sabre |
| @@ -405,19 +313,17 @@ static unsigned int schizo_irq_build(struct pci_pbm_info *pbm, | |||
| 405 | ign_fixup = (1 << 6); | 313 | ign_fixup = (1 << 6); |
| 406 | } | 314 | } |
| 407 | 315 | ||
| 408 | bucket = __bucket(build_irq(pil, ign_fixup, iclr, imap)); | 316 | virt_irq = build_irq(ign_fixup, iclr, imap); |
| 409 | bucket->flags |= IBF_PCI; | ||
| 410 | 317 | ||
| 411 | if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) { | 318 | if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) { |
| 412 | struct irq_desc *p = bucket->irq_info; | 319 | irq_install_pre_handler(virt_irq, |
| 413 | 320 | tomatillo_wsync_handler, | |
| 414 | p->pre_handler = tomatillo_wsync_handler; | 321 | ((pbm->chip_version <= 4) ? |
| 415 | p->pre_handler_arg1 = ((pbm->chip_version <= 4) ? | 322 | (void *) 1 : (void *) 0), |
| 416 | (void *) 1 : (void *) 0); | 323 | (void *) pbm->sync_reg); |
| 417 | p->pre_handler_arg2 = (void *) pbm->sync_reg; | ||
| 418 | } | 324 | } |
| 419 | 325 | ||
| 420 | return __irq(bucket); | 326 | return virt_irq; |
| 421 | } | 327 | } |
| 422 | 328 | ||
| 423 | /* SCHIZO error handling support. */ | 329 | /* SCHIZO error handling support. */ |
| @@ -458,7 +364,6 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino) | |||
| 458 | static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq) | 364 | static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq) |
| 459 | { | 365 | { |
| 460 | struct pci_pbm_info *pbm; | 366 | struct pci_pbm_info *pbm; |
| 461 | struct ino_bucket *bucket; | ||
| 462 | unsigned long iclr; | 367 | unsigned long iclr; |
| 463 | 368 | ||
| 464 | /* Do not clear the interrupt for the other PCI bus. | 369 | /* Do not clear the interrupt for the other PCI bus. |
| @@ -476,11 +381,11 @@ static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq) | |||
| 476 | else | 381 | else |
| 477 | pbm = &p->pbm_A; | 382 | pbm = &p->pbm_A; |
| 478 | 383 | ||
| 479 | irq = schizo_irq_build(pbm, NULL, | 384 | schizo_irq_build(pbm, NULL, |
| 480 | (pbm->portid << 6) | (irq & IMAP_INO)); | 385 | (pbm->portid << 6) | (irq & IMAP_INO)); |
| 481 | bucket = __bucket(irq); | ||
| 482 | iclr = bucket->iclr; | ||
| 483 | 386 | ||
| 387 | iclr = schizo_ino_to_iclr(pbm, | ||
| 388 | (pbm->portid << 6) | (irq & IMAP_INO)); | ||
| 484 | upa_writel(ICLR_IDLE, iclr); | 389 | upa_writel(ICLR_IDLE, iclr); |
| 485 | } | 390 | } |
| 486 | 391 | ||
| @@ -1225,7 +1130,6 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1225 | { | 1130 | { |
| 1226 | struct pci_pbm_info *pbm; | 1131 | struct pci_pbm_info *pbm; |
| 1227 | unsigned int irq; | 1132 | unsigned int irq; |
| 1228 | struct ino_bucket *bucket; | ||
| 1229 | u64 tmp, err_mask, err_no_mask; | 1133 | u64 tmp, err_mask, err_no_mask; |
| 1230 | 1134 | ||
| 1231 | /* Build IRQs and register handlers. */ | 1135 | /* Build IRQs and register handlers. */ |
| @@ -1237,8 +1141,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1237 | pbm->name); | 1141 | pbm->name); |
| 1238 | prom_halt(); | 1142 | prom_halt(); |
| 1239 | } | 1143 | } |
| 1240 | bucket = __bucket(irq); | 1144 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO)); |
| 1241 | tmp = upa_readl(bucket->imap); | ||
| 1242 | upa_writel(tmp, (pbm->pbm_regs + | 1145 | upa_writel(tmp, (pbm->pbm_regs + |
| 1243 | schizo_imap_offset(SCHIZO_UE_INO) + 4)); | 1146 | schizo_imap_offset(SCHIZO_UE_INO) + 4)); |
| 1244 | 1147 | ||
| @@ -1250,8 +1153,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1250 | pbm->name); | 1153 | pbm->name); |
| 1251 | prom_halt(); | 1154 | prom_halt(); |
| 1252 | } | 1155 | } |
| 1253 | bucket = __bucket(irq); | 1156 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO)); |
| 1254 | tmp = upa_readl(bucket->imap); | ||
| 1255 | upa_writel(tmp, (pbm->pbm_regs + | 1157 | upa_writel(tmp, (pbm->pbm_regs + |
| 1256 | schizo_imap_offset(SCHIZO_CE_INO) + 4)); | 1158 | schizo_imap_offset(SCHIZO_CE_INO) + 4)); |
| 1257 | 1159 | ||
| @@ -1264,8 +1166,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1264 | pbm->name); | 1166 | pbm->name); |
| 1265 | prom_halt(); | 1167 | prom_halt(); |
| 1266 | } | 1168 | } |
| 1267 | bucket = __bucket(irq); | 1169 | tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) | |
| 1268 | tmp = upa_readl(bucket->imap); | 1170 | SCHIZO_PCIERR_A_INO))); |
| 1269 | upa_writel(tmp, (pbm->pbm_regs + | 1171 | upa_writel(tmp, (pbm->pbm_regs + |
| 1270 | schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4)); | 1172 | schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4)); |
| 1271 | 1173 | ||
| @@ -1278,8 +1180,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1278 | pbm->name); | 1180 | pbm->name); |
| 1279 | prom_halt(); | 1181 | prom_halt(); |
| 1280 | } | 1182 | } |
| 1281 | bucket = __bucket(irq); | 1183 | tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) | |
| 1282 | tmp = upa_readl(bucket->imap); | 1184 | SCHIZO_PCIERR_B_INO))); |
| 1283 | upa_writel(tmp, (pbm->pbm_regs + | 1185 | upa_writel(tmp, (pbm->pbm_regs + |
| 1284 | schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4)); | 1186 | schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4)); |
| 1285 | 1187 | ||
| @@ -1291,8 +1193,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p) | |||
| 1291 | pbm->name); | 1193 | pbm->name); |
| 1292 | prom_halt(); | 1194 | prom_halt(); |
| 1293 | } | 1195 | } |
| 1294 | bucket = __bucket(irq); | 1196 | tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) | |
| 1295 | tmp = upa_readl(bucket->imap); | 1197 | SCHIZO_SERR_INO))); |
| 1296 | upa_writel(tmp, (pbm->pbm_regs + | 1198 | upa_writel(tmp, (pbm->pbm_regs + |
| 1297 | schizo_imap_offset(SCHIZO_SERR_INO) + 4)); | 1199 | schizo_imap_offset(SCHIZO_SERR_INO) + 4)); |
| 1298 | 1200 | ||
| @@ -1363,7 +1265,6 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1363 | { | 1265 | { |
| 1364 | struct pci_pbm_info *pbm; | 1266 | struct pci_pbm_info *pbm; |
| 1365 | unsigned int irq; | 1267 | unsigned int irq; |
| 1366 | struct ino_bucket *bucket; | ||
| 1367 | u64 tmp, err_mask, err_no_mask; | 1268 | u64 tmp, err_mask, err_no_mask; |
| 1368 | 1269 | ||
| 1369 | /* Build IRQs and register handlers. */ | 1270 | /* Build IRQs and register handlers. */ |
| @@ -1375,8 +1276,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1375 | pbm->name); | 1276 | pbm->name); |
| 1376 | prom_halt(); | 1277 | prom_halt(); |
| 1377 | } | 1278 | } |
| 1378 | bucket = __bucket(irq); | 1279 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO)); |
| 1379 | tmp = upa_readl(bucket->imap); | ||
| 1380 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4)); | 1280 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4)); |
| 1381 | 1281 | ||
| 1382 | pbm = pbm_for_ino(p, SCHIZO_CE_INO); | 1282 | pbm = pbm_for_ino(p, SCHIZO_CE_INO); |
| @@ -1387,8 +1287,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1387 | pbm->name); | 1287 | pbm->name); |
| 1388 | prom_halt(); | 1288 | prom_halt(); |
| 1389 | } | 1289 | } |
| 1390 | bucket = __bucket(irq); | 1290 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO)); |
| 1391 | tmp = upa_readl(bucket->imap); | ||
| 1392 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4)); | 1291 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4)); |
| 1393 | 1292 | ||
| 1394 | pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); | 1293 | pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); |
| @@ -1399,8 +1298,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1399 | pbm->name); | 1298 | pbm->name); |
| 1400 | prom_halt(); | 1299 | prom_halt(); |
| 1401 | } | 1300 | } |
| 1402 | bucket = __bucket(irq); | 1301 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO)); |
| 1403 | tmp = upa_readl(bucket->imap); | ||
| 1404 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4)); | 1302 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4)); |
| 1405 | 1303 | ||
| 1406 | pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); | 1304 | pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); |
| @@ -1411,8 +1309,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1411 | pbm->name); | 1309 | pbm->name); |
| 1412 | prom_halt(); | 1310 | prom_halt(); |
| 1413 | } | 1311 | } |
| 1414 | bucket = __bucket(irq); | 1312 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO)); |
| 1415 | tmp = upa_readl(bucket->imap); | ||
| 1416 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4)); | 1313 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4)); |
| 1417 | 1314 | ||
| 1418 | pbm = pbm_for_ino(p, SCHIZO_SERR_INO); | 1315 | pbm = pbm_for_ino(p, SCHIZO_SERR_INO); |
| @@ -1423,8 +1320,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p) | |||
| 1423 | pbm->name); | 1320 | pbm->name); |
| 1424 | prom_halt(); | 1321 | prom_halt(); |
| 1425 | } | 1322 | } |
| 1426 | bucket = __bucket(irq); | 1323 | tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO)); |
| 1427 | tmp = upa_readl(bucket->imap); | ||
| 1428 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4)); | 1324 | upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4)); |
| 1429 | 1325 | ||
| 1430 | /* Enable UE and CE interrupts for controller. */ | 1326 | /* Enable UE and CE interrupts for controller. */ |
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index 0c0895202970..5419480edf41 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c | |||
| @@ -843,38 +843,8 @@ static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm, | |||
| 843 | unsigned int devino) | 843 | unsigned int devino) |
| 844 | { | 844 | { |
| 845 | u32 devhandle = pbm->devhandle; | 845 | u32 devhandle = pbm->devhandle; |
| 846 | int pil; | ||
| 847 | 846 | ||
| 848 | pil = 5; | 847 | return sun4v_build_irq(devhandle, devino); |
| 849 | if (pdev) { | ||
| 850 | switch ((pdev->class >> 16) & 0xff) { | ||
| 851 | case PCI_BASE_CLASS_STORAGE: | ||
| 852 | pil = 5; | ||
| 853 | break; | ||
| 854 | |||
| 855 | case PCI_BASE_CLASS_NETWORK: | ||
| 856 | pil = 6; | ||
| 857 | break; | ||
| 858 | |||
| 859 | case PCI_BASE_CLASS_DISPLAY: | ||
| 860 | pil = 9; | ||
| 861 | break; | ||
| 862 | |||
| 863 | case PCI_BASE_CLASS_MULTIMEDIA: | ||
| 864 | case PCI_BASE_CLASS_MEMORY: | ||
| 865 | case PCI_BASE_CLASS_BRIDGE: | ||
| 866 | case PCI_BASE_CLASS_SERIAL: | ||
| 867 | pil = 10; | ||
| 868 | break; | ||
| 869 | |||
| 870 | default: | ||
| 871 | pil = 5; | ||
| 872 | break; | ||
| 873 | }; | ||
| 874 | } | ||
| 875 | BUG_ON(PIL_RESERVED(pil)); | ||
| 876 | |||
| 877 | return sun4v_build_irq(devhandle, devino, pil, IBF_PCI); | ||
| 878 | } | 848 | } |
| 879 | 849 | ||
| 880 | static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) | 850 | static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) |
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c index 1d6ffdeabd4c..8812417247d4 100644 --- a/arch/sparc64/kernel/sbus.c +++ b/arch/sparc64/kernel/sbus.c | |||
| @@ -691,36 +691,6 @@ void sbus_set_sbus64(struct sbus_dev *sdev, int bursts) | |||
| 691 | upa_writeq(val, cfg_reg); | 691 | upa_writeq(val, cfg_reg); |
| 692 | } | 692 | } |
| 693 | 693 | ||
| 694 | /* SBUS SYSIO INO number to Sparc PIL level. */ | ||
| 695 | static unsigned char sysio_ino_to_pil[] = { | ||
| 696 | 0, 5, 5, 7, 5, 7, 8, 9, /* SBUS slot 0 */ | ||
| 697 | 0, 5, 5, 7, 5, 7, 8, 9, /* SBUS slot 1 */ | ||
| 698 | 0, 5, 5, 7, 5, 7, 8, 9, /* SBUS slot 2 */ | ||
| 699 | 0, 5, 5, 7, 5, 7, 8, 9, /* SBUS slot 3 */ | ||
| 700 | 5, /* Onboard SCSI */ | ||
| 701 | 5, /* Onboard Ethernet */ | ||
| 702 | /*XXX*/ 8, /* Onboard BPP */ | ||
| 703 | 0, /* Bogon */ | ||
| 704 | 13, /* Audio */ | ||
| 705 | /*XXX*/15, /* PowerFail */ | ||
| 706 | 0, /* Bogon */ | ||
| 707 | 0, /* Bogon */ | ||
| 708 | 12, /* Zilog Serial Channels (incl. Keyboard/Mouse lines) */ | ||
| 709 | 11, /* Floppy */ | ||
| 710 | 0, /* Spare Hardware (bogon for now) */ | ||
| 711 | 0, /* Keyboard (bogon for now) */ | ||
| 712 | 0, /* Mouse (bogon for now) */ | ||
| 713 | 0, /* Serial (bogon for now) */ | ||
| 714 | 0, 0, /* Bogon, Bogon */ | ||
| 715 | 10, /* Timer 0 */ | ||
| 716 | 11, /* Timer 1 */ | ||
| 717 | 0, 0, /* Bogon, Bogon */ | ||
| 718 | 15, /* Uncorrectable SBUS Error */ | ||
| 719 | 15, /* Correctable SBUS Error */ | ||
| 720 | 15, /* SBUS Error */ | ||
| 721 | /*XXX*/ 0, /* Power Management (bogon for now) */ | ||
| 722 | }; | ||
| 723 | |||
| 724 | /* INO number to IMAP register offset for SYSIO external IRQ's. | 694 | /* INO number to IMAP register offset for SYSIO external IRQ's. |
| 725 | * This should conform to both Sunfire/Wildfire server and Fusion | 695 | * This should conform to both Sunfire/Wildfire server and Fusion |
| 726 | * desktop designs. | 696 | * desktop designs. |
| @@ -812,21 +782,12 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino) | |||
| 812 | struct sbus_iommu *iommu = sbus->iommu; | 782 | struct sbus_iommu *iommu = sbus->iommu; |
| 813 | unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; | 783 | unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; |
| 814 | unsigned long imap, iclr; | 784 | unsigned long imap, iclr; |
| 815 | int pil, sbus_level = 0; | 785 | int sbus_level = 0; |
| 816 | |||
| 817 | pil = sysio_ino_to_pil[ino]; | ||
| 818 | if (!pil) { | ||
| 819 | printk("sbus_irq_build: Bad SYSIO INO[%x]\n", ino); | ||
| 820 | panic("Bad SYSIO IRQ translations..."); | ||
| 821 | } | ||
| 822 | |||
| 823 | if (PIL_RESERVED(pil)) | ||
| 824 | BUG(); | ||
| 825 | 786 | ||
| 826 | imap = sysio_irq_offsets[ino]; | 787 | imap = sysio_irq_offsets[ino]; |
| 827 | if (imap == ((unsigned long)-1)) { | 788 | if (imap == ((unsigned long)-1)) { |
| 828 | prom_printf("get_irq_translations: Bad SYSIO INO[%x] cpu[%d]\n", | 789 | prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n", |
| 829 | ino, pil); | 790 | ino); |
| 830 | prom_halt(); | 791 | prom_halt(); |
| 831 | } | 792 | } |
| 832 | imap += reg_base; | 793 | imap += reg_base; |
| @@ -860,7 +821,7 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino) | |||
| 860 | 821 | ||
| 861 | iclr += ((unsigned long)sbus_level - 1UL) * 8UL; | 822 | iclr += ((unsigned long)sbus_level - 1UL) * 8UL; |
| 862 | } | 823 | } |
| 863 | return build_irq(pil, sbus_level, iclr, imap); | 824 | return build_irq(sbus_level, iclr, imap); |
| 864 | } | 825 | } |
| 865 | 826 | ||
| 866 | /* Error interrupt handling. */ | 827 | /* Error interrupt handling. */ |
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c index 38e569f786dd..4ac35dd2088b 100644 --- a/arch/sparc64/kernel/sparc64_ksyms.c +++ b/arch/sparc64/kernel/sparc64_ksyms.c | |||
| @@ -125,9 +125,6 @@ EXPORT_SYMBOL(__write_lock); | |||
| 125 | EXPORT_SYMBOL(__write_unlock); | 125 | EXPORT_SYMBOL(__write_unlock); |
| 126 | EXPORT_SYMBOL(__write_trylock); | 126 | EXPORT_SYMBOL(__write_trylock); |
| 127 | 127 | ||
| 128 | /* Hard IRQ locking */ | ||
| 129 | EXPORT_SYMBOL(synchronize_irq); | ||
| 130 | |||
| 131 | #if defined(CONFIG_MCOUNT) | 128 | #if defined(CONFIG_MCOUNT) |
| 132 | extern void _mcount(void); | 129 | extern void _mcount(void); |
| 133 | EXPORT_SYMBOL(_mcount); | 130 | EXPORT_SYMBOL(_mcount); |
| @@ -175,10 +172,6 @@ EXPORT_SYMBOL(set_bit); | |||
| 175 | EXPORT_SYMBOL(clear_bit); | 172 | EXPORT_SYMBOL(clear_bit); |
| 176 | EXPORT_SYMBOL(change_bit); | 173 | EXPORT_SYMBOL(change_bit); |
| 177 | 174 | ||
| 178 | EXPORT_SYMBOL(ivector_table); | ||
| 179 | EXPORT_SYMBOL(enable_irq); | ||
| 180 | EXPORT_SYMBOL(disable_irq); | ||
| 181 | |||
| 182 | EXPORT_SYMBOL(__flushw_user); | 175 | EXPORT_SYMBOL(__flushw_user); |
| 183 | 176 | ||
| 184 | EXPORT_SYMBOL(tlb_type); | 177 | EXPORT_SYMBOL(tlb_type); |
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S index b49a68bdda43..49703c3c5769 100644 --- a/arch/sparc64/kernel/sun4v_ivec.S +++ b/arch/sparc64/kernel/sun4v_ivec.S | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | 5 | ||
| 6 | #include <asm/cpudata.h> | 6 | #include <asm/cpudata.h> |
| 7 | #include <asm/intr_queue.h> | 7 | #include <asm/intr_queue.h> |
| 8 | #include <asm/pil.h> | ||
| 8 | 9 | ||
| 9 | .text | 10 | .text |
| 10 | .align 32 | 11 | .align 32 |
| @@ -102,23 +103,17 @@ sun4v_dev_mondo: | |||
| 102 | 103 | ||
| 103 | /* Get &ivector_table[IVEC] into %g4. */ | 104 | /* Get &ivector_table[IVEC] into %g4. */ |
| 104 | sethi %hi(ivector_table), %g4 | 105 | sethi %hi(ivector_table), %g4 |
| 105 | sllx %g3, 5, %g3 | 106 | sllx %g3, 3, %g3 |
| 106 | or %g4, %lo(ivector_table), %g4 | 107 | or %g4, %lo(ivector_table), %g4 |
| 107 | add %g4, %g3, %g4 | 108 | add %g4, %g3, %g4 |
| 108 | 109 | ||
| 109 | /* Load IRQ %pil into %g5. */ | ||
| 110 | ldub [%g4 + 0x04], %g5 | ||
| 111 | |||
| 112 | /* Insert ivector_table[] entry into __irq_work[] queue. */ | 110 | /* Insert ivector_table[] entry into __irq_work[] queue. */ |
| 113 | sllx %g5, 2, %g3 | 111 | lduw [%g1], %g2 /* g2 = irq_work(cpu) */ |
| 114 | lduw [%g1 + %g3], %g2 /* g2 = irq_work(cpu, pil) */ | ||
| 115 | stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */ | 112 | stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */ |
| 116 | stw %g4, [%g1 + %g3] /* irq_work(cpu, pil) = bucket */ | 113 | stw %g4, [%g1] /* irq_work(cpu) = bucket */ |
| 117 | 114 | ||
| 118 | /* Signal the interrupt by setting (1 << pil) in %softint. */ | 115 | /* Signal the interrupt by setting (1 << pil) in %softint. */ |
| 119 | mov 1, %g2 | 116 | wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint |
| 120 | sllx %g2, %g5, %g2 | ||
| 121 | wr %g2, 0x0, %set_softint | ||
| 122 | 117 | ||
| 123 | sun4v_dev_mondo_queue_empty: | 118 | sun4v_dev_mondo_queue_empty: |
| 124 | retry | 119 | retry |
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c index e55b5c6ece02..0f00a99927e9 100644 --- a/arch/sparc64/kernel/time.c +++ b/arch/sparc64/kernel/time.c | |||
| @@ -457,7 +457,7 @@ static inline void timer_check_rtc(void) | |||
| 457 | } | 457 | } |
| 458 | } | 458 | } |
| 459 | 459 | ||
| 460 | static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) | 460 | irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) |
| 461 | { | 461 | { |
| 462 | unsigned long ticks, compare, pstate; | 462 | unsigned long ticks, compare, pstate; |
| 463 | 463 | ||
| @@ -1020,19 +1020,9 @@ static unsigned long sparc64_init_timers(void) | |||
| 1020 | return clock; | 1020 | return clock; |
| 1021 | } | 1021 | } |
| 1022 | 1022 | ||
| 1023 | static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *)) | 1023 | static void sparc64_start_timers(void) |
| 1024 | { | 1024 | { |
| 1025 | unsigned long pstate; | 1025 | unsigned long pstate; |
| 1026 | int err; | ||
| 1027 | |||
| 1028 | /* Register IRQ handler. */ | ||
| 1029 | err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0, | ||
| 1030 | "timer", NULL); | ||
| 1031 | |||
| 1032 | if (err) { | ||
| 1033 | prom_printf("Serious problem, cannot register TICK_INT\n"); | ||
| 1034 | prom_halt(); | ||
| 1035 | } | ||
| 1036 | 1026 | ||
| 1037 | /* Guarantee that the following sequences execute | 1027 | /* Guarantee that the following sequences execute |
| 1038 | * uninterrupted. | 1028 | * uninterrupted. |
| @@ -1116,7 +1106,7 @@ void __init time_init(void) | |||
| 1116 | /* Now that the interpolator is registered, it is | 1106 | /* Now that the interpolator is registered, it is |
| 1117 | * safe to start the timer ticking. | 1107 | * safe to start the timer ticking. |
| 1118 | */ | 1108 | */ |
| 1119 | sparc64_start_timers(timer_interrupt); | 1109 | sparc64_start_timers(); |
| 1120 | 1110 | ||
| 1121 | timer_ticks_per_nsec_quotient = | 1111 | timer_ticks_per_nsec_quotient = |
| 1122 | (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) + | 1112 | (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) + |
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c index 563db528e031..5059cbd4feee 100644 --- a/arch/sparc64/kernel/traps.c +++ b/arch/sparc64/kernel/traps.c | |||
| @@ -2544,7 +2544,9 @@ void __init trap_init(void) | |||
| 2544 | (TRAP_PER_CPU_TSB_HUGE != | 2544 | (TRAP_PER_CPU_TSB_HUGE != |
| 2545 | offsetof(struct trap_per_cpu, tsb_huge)) || | 2545 | offsetof(struct trap_per_cpu, tsb_huge)) || |
| 2546 | (TRAP_PER_CPU_TSB_HUGE_TEMP != | 2546 | (TRAP_PER_CPU_TSB_HUGE_TEMP != |
| 2547 | offsetof(struct trap_per_cpu, tsb_huge_temp))) | 2547 | offsetof(struct trap_per_cpu, tsb_huge_temp)) || |
| 2548 | (TRAP_PER_CPU_IRQ_WORKLIST != | ||
| 2549 | offsetof(struct trap_per_cpu, irq_worklist))) | ||
| 2548 | trap_per_cpu_offsets_are_bolixed_dave(); | 2550 | trap_per_cpu_offsets_are_bolixed_dave(); |
| 2549 | 2551 | ||
| 2550 | if ((TSB_CONFIG_TSB != | 2552 | if ((TSB_CONFIG_TSB != |
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S index 5d901519db55..ee45ca2d7a04 100644 --- a/arch/sparc64/kernel/ttable.S +++ b/arch/sparc64/kernel/ttable.S | |||
| @@ -58,13 +58,11 @@ tl0_irq2: BTRAP(0x42) | |||
| 58 | tl0_irq3: BTRAP(0x43) | 58 | tl0_irq3: BTRAP(0x43) |
| 59 | tl0_irq4: BTRAP(0x44) | 59 | tl0_irq4: BTRAP(0x44) |
| 60 | #endif | 60 | #endif |
| 61 | tl0_irq5: TRAP_IRQ(handler_irq, 5) TRAP_IRQ(handler_irq, 6) | 61 | tl0_irq5: TRAP_IRQ(handler_irq, 5) |
| 62 | tl0_irq7: TRAP_IRQ(handler_irq, 7) TRAP_IRQ(handler_irq, 8) | 62 | tl0_irq6: BTRAP(0x46) BTRAP(0x47) BTRAP(0x48) BTRAP(0x49) |
| 63 | tl0_irq9: TRAP_IRQ(handler_irq, 9) TRAP_IRQ(handler_irq, 10) | 63 | tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d) |
| 64 | tl0_irq11: TRAP_IRQ(handler_irq, 11) TRAP_IRQ(handler_irq, 12) | ||
| 65 | tl0_irq13: TRAP_IRQ(handler_irq, 13) | ||
| 66 | #ifndef CONFIG_SMP | 64 | #ifndef CONFIG_SMP |
| 67 | tl0_irq14: TRAP_IRQ(handler_irq, 14) | 65 | tl0_irq14: TRAP_IRQ(timer_irq, 14) |
| 68 | #else | 66 | #else |
| 69 | tl0_irq14: TICK_SMP_IRQ | 67 | tl0_irq14: TICK_SMP_IRQ |
| 70 | #endif | 68 | #endif |
diff --git a/drivers/atm/fore200e.c b/drivers/atm/fore200e.c index 05983a312d50..92923bf27233 100644 --- a/drivers/atm/fore200e.c +++ b/drivers/atm/fore200e.c | |||
| @@ -167,13 +167,9 @@ fore200e_atm2fore_aal(int aal) | |||
| 167 | static char* | 167 | static char* |
| 168 | fore200e_irq_itoa(int irq) | 168 | fore200e_irq_itoa(int irq) |
| 169 | { | 169 | { |
| 170 | #if defined(__sparc_v9__) | ||
| 171 | return __irq_itoa(irq); | ||
| 172 | #else | ||
| 173 | static char str[8]; | 170 | static char str[8]; |
| 174 | sprintf(str, "%d", irq); | 171 | sprintf(str, "%d", irq); |
| 175 | return str; | 172 | return str; |
| 176 | #endif | ||
| 177 | } | 173 | } |
| 178 | 174 | ||
| 179 | 175 | ||
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c index 7cac6d05d723..f6686fcce809 100644 --- a/drivers/char/rtc.c +++ b/drivers/char/rtc.c | |||
| @@ -960,10 +960,6 @@ found: | |||
| 960 | * PCI Slot 2 INTA# (and some INTx# in Slot 1). | 960 | * PCI Slot 2 INTA# (and some INTx# in Slot 1). |
| 961 | */ | 961 | */ |
| 962 | if (request_irq(rtc_irq, rtc_interrupt, SA_SHIRQ, "rtc", (void *)&rtc_port)) { | 962 | if (request_irq(rtc_irq, rtc_interrupt, SA_SHIRQ, "rtc", (void *)&rtc_port)) { |
| 963 | /* | ||
| 964 | * Standard way for sparc to print irq's is to use | ||
| 965 | * __irq_itoa(). I think for EBus it's ok to use %d. | ||
| 966 | */ | ||
| 967 | printk(KERN_ERR "rtc: cannot register IRQ %d\n", rtc_irq); | 963 | printk(KERN_ERR "rtc: cannot register IRQ %d\n", rtc_irq); |
| 968 | return -EIO; | 964 | return -EIO; |
| 969 | } | 965 | } |
diff --git a/drivers/fc4/soc.c b/drivers/fc4/soc.c index ec1f94738c59..cf8768b8d1f1 100644 --- a/drivers/fc4/soc.c +++ b/drivers/fc4/soc.c | |||
| @@ -643,7 +643,7 @@ static inline void soc_init(struct sbus_dev *sdev, int no) | |||
| 643 | return; | 643 | return; |
| 644 | } | 644 | } |
| 645 | 645 | ||
| 646 | SOD(("SOC uses IRQ%s\n", __irq_itoa(irq))) | 646 | SOD(("SOC uses IRQ %d\n", irq)) |
| 647 | 647 | ||
| 648 | s->port[0].fc.irq = irq; | 648 | s->port[0].fc.irq = irq; |
| 649 | s->port[1].fc.irq = irq; | 649 | s->port[1].fc.irq = irq; |
diff --git a/drivers/fc4/socal.c b/drivers/fc4/socal.c index 922e9613b2cf..f52d1e5bd5a5 100644 --- a/drivers/fc4/socal.c +++ b/drivers/fc4/socal.c | |||
| @@ -767,7 +767,7 @@ static inline void socal_init(struct sbus_dev *sdev, int no) | |||
| 767 | return; | 767 | return; |
| 768 | } | 768 | } |
| 769 | 769 | ||
| 770 | SOD(("SOCAL uses IRQ %s\n", __irq_itoa(irq))) | 770 | SOD(("SOCAL uses IRQ %d\n", irq)) |
| 771 | 771 | ||
| 772 | s->port[0].fc.irq = irq; | 772 | s->port[0].fc.irq = irq; |
| 773 | s->port[1].fc.irq = irq; | 773 | s->port[1].fc.irq = irq; |
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 1b7b4c531bc2..9ebf8ae2a5e3 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c | |||
| @@ -1138,16 +1138,11 @@ static int init_irq (ide_hwif_t *hwif) | |||
| 1138 | spin_unlock_irq(&ide_lock); | 1138 | spin_unlock_irq(&ide_lock); |
| 1139 | } | 1139 | } |
| 1140 | 1140 | ||
| 1141 | #if !defined(__mc68000__) && !defined(CONFIG_APUS) && !defined(__sparc__) | 1141 | #if !defined(__mc68000__) && !defined(CONFIG_APUS) |
| 1142 | printk("%s at 0x%03lx-0x%03lx,0x%03lx on irq %d", hwif->name, | 1142 | printk("%s at 0x%03lx-0x%03lx,0x%03lx on irq %d", hwif->name, |
| 1143 | hwif->io_ports[IDE_DATA_OFFSET], | 1143 | hwif->io_ports[IDE_DATA_OFFSET], |
| 1144 | hwif->io_ports[IDE_DATA_OFFSET]+7, | 1144 | hwif->io_ports[IDE_DATA_OFFSET]+7, |
| 1145 | hwif->io_ports[IDE_CONTROL_OFFSET], hwif->irq); | 1145 | hwif->io_ports[IDE_CONTROL_OFFSET], hwif->irq); |
| 1146 | #elif defined(__sparc__) | ||
| 1147 | printk("%s at 0x%03lx-0x%03lx,0x%03lx on irq %s", hwif->name, | ||
| 1148 | hwif->io_ports[IDE_DATA_OFFSET], | ||
| 1149 | hwif->io_ports[IDE_DATA_OFFSET]+7, | ||
| 1150 | hwif->io_ports[IDE_CONTROL_OFFSET], __irq_itoa(hwif->irq)); | ||
| 1151 | #else | 1146 | #else |
| 1152 | printk("%s at 0x%08lx on irq %d", hwif->name, | 1147 | printk("%s at 0x%08lx on irq %d", hwif->name, |
| 1153 | hwif->io_ports[IDE_DATA_OFFSET], hwif->irq); | 1148 | hwif->io_ports[IDE_DATA_OFFSET], hwif->irq); |
diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c index 462ed3006c30..c11e3b2e67a6 100644 --- a/drivers/ide/setup-pci.c +++ b/drivers/ide/setup-pci.c | |||
| @@ -694,13 +694,8 @@ static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d, | |||
| 694 | goto out; | 694 | goto out; |
| 695 | } | 695 | } |
| 696 | if (noisy) | 696 | if (noisy) |
| 697 | #ifdef __sparc__ | ||
| 698 | printk(KERN_INFO "%s: 100%% native mode on irq %s\n", | ||
| 699 | d->name, __irq_itoa(pciirq)); | ||
| 700 | #else | ||
| 701 | printk(KERN_INFO "%s: 100%% native mode on irq %d\n", | 697 | printk(KERN_INFO "%s: 100%% native mode on irq %d\n", |
| 702 | d->name, pciirq); | 698 | d->name, pciirq); |
| 703 | #endif | ||
| 704 | } | 699 | } |
| 705 | 700 | ||
| 706 | /* FIXME: silent failure can happen */ | 701 | /* FIXME: silent failure can happen */ |
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c index 11f13778f139..c031650a1c74 100644 --- a/drivers/ieee1394/ohci1394.c +++ b/drivers/ieee1394/ohci1394.c | |||
| @@ -586,11 +586,7 @@ static void ohci_initialize(struct ti_ohci *ohci) | |||
| 586 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable); | 586 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable); |
| 587 | 587 | ||
| 588 | buf = reg_read(ohci, OHCI1394_Version); | 588 | buf = reg_read(ohci, OHCI1394_Version); |
| 589 | #ifndef __sparc__ | ||
| 590 | sprintf (irq_buf, "%d", ohci->dev->irq); | 589 | sprintf (irq_buf, "%d", ohci->dev->irq); |
| 591 | #else | ||
| 592 | sprintf (irq_buf, "%s", __irq_itoa(ohci->dev->irq)); | ||
| 593 | #endif | ||
| 594 | PRINT(KERN_INFO, "OHCI-1394 %d.%d (PCI): IRQ=[%s] " | 590 | PRINT(KERN_INFO, "OHCI-1394 %d.%d (PCI): IRQ=[%s] " |
| 595 | "MMIO=[%lx-%lx] Max Packet=[%d] IR/IT contexts=[%d/%d]", | 591 | "MMIO=[%lx-%lx] Max Packet=[%d] IR/IT contexts=[%d/%d]", |
| 596 | ((((buf) >> 16) & 0xf) + (((buf) >> 20) & 0xf) * 10), | 592 | ((((buf) >> 16) & 0xf) + (((buf) >> 20) & 0xf) * 10), |
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c index e2edc41e1b6f..e29dfd280bee 100644 --- a/drivers/ieee1394/pcilynx.c +++ b/drivers/ieee1394/pcilynx.c | |||
| @@ -1252,11 +1252,7 @@ static int __devinit add_card(struct pci_dev *dev, | |||
| 1252 | /* Fix buggy cards with autoboot pin not tied low: */ | 1252 | /* Fix buggy cards with autoboot pin not tied low: */ |
| 1253 | reg_write(lynx, DMA0_CHAN_CTRL, 0); | 1253 | reg_write(lynx, DMA0_CHAN_CTRL, 0); |
| 1254 | 1254 | ||
| 1255 | #ifndef __sparc__ | ||
| 1256 | sprintf (irq_buf, "%d", dev->irq); | 1255 | sprintf (irq_buf, "%d", dev->irq); |
| 1257 | #else | ||
| 1258 | sprintf (irq_buf, "%s", __irq_itoa(dev->irq)); | ||
| 1259 | #endif | ||
| 1260 | 1256 | ||
| 1261 | if (!request_irq(dev->irq, lynx_irq_handler, SA_SHIRQ, | 1257 | if (!request_irq(dev->irq, lynx_irq_handler, SA_SHIRQ, |
| 1262 | PCILYNX_DRIVER_NAME, lynx)) { | 1258 | PCILYNX_DRIVER_NAME, lynx)) { |
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c index a30084076ac8..59690cbabfca 100644 --- a/drivers/message/fusion/mptbase.c +++ b/drivers/message/fusion/mptbase.c | |||
| @@ -63,9 +63,6 @@ | |||
| 63 | #ifdef CONFIG_MTRR | 63 | #ifdef CONFIG_MTRR |
| 64 | #include <asm/mtrr.h> | 64 | #include <asm/mtrr.h> |
| 65 | #endif | 65 | #endif |
| 66 | #ifdef __sparc__ | ||
| 67 | #include <asm/irq.h> /* needed for __irq_itoa() proto */ | ||
| 68 | #endif | ||
| 69 | 66 | ||
| 70 | #include "mptbase.h" | 67 | #include "mptbase.h" |
| 71 | 68 | ||
| @@ -1394,13 +1391,8 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 1394 | r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc); | 1391 | r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc); |
| 1395 | 1392 | ||
| 1396 | if (r < 0) { | 1393 | if (r < 0) { |
| 1397 | #ifndef __sparc__ | ||
| 1398 | printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %d!\n", | 1394 | printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %d!\n", |
| 1399 | ioc->name, pdev->irq); | 1395 | ioc->name, pdev->irq); |
| 1400 | #else | ||
| 1401 | printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %s!\n", | ||
| 1402 | ioc->name, __irq_itoa(pdev->irq)); | ||
| 1403 | #endif | ||
| 1404 | list_del(&ioc->list); | 1396 | list_del(&ioc->list); |
| 1405 | iounmap(mem); | 1397 | iounmap(mem); |
| 1406 | kfree(ioc); | 1398 | kfree(ioc); |
| @@ -1412,11 +1404,7 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 1412 | pci_set_master(pdev); /* ?? */ | 1404 | pci_set_master(pdev); /* ?? */ |
| 1413 | pci_set_drvdata(pdev, ioc); | 1405 | pci_set_drvdata(pdev, ioc); |
| 1414 | 1406 | ||
| 1415 | #ifndef __sparc__ | ||
| 1416 | dprintk((KERN_INFO MYNAM ": %s installed at interrupt %d\n", ioc->name, pdev->irq)); | 1407 | dprintk((KERN_INFO MYNAM ": %s installed at interrupt %d\n", ioc->name, pdev->irq)); |
| 1417 | #else | ||
| 1418 | dprintk((KERN_INFO MYNAM ": %s installed at interrupt %s\n", ioc->name, __irq_itoa(pdev->irq))); | ||
| 1419 | #endif | ||
| 1420 | } | 1408 | } |
| 1421 | 1409 | ||
| 1422 | /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets. | 1410 | /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets. |
| @@ -5647,11 +5635,7 @@ mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int sh | |||
| 5647 | a[5], a[4], a[3], a[2], a[1], a[0]); | 5635 | a[5], a[4], a[3], a[2], a[1], a[0]); |
| 5648 | } | 5636 | } |
| 5649 | 5637 | ||
| 5650 | #ifndef __sparc__ | ||
| 5651 | y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq); | 5638 | y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq); |
| 5652 | #else | ||
| 5653 | y += sprintf(buffer+len+y, ", IRQ=%s", __irq_itoa(ioc->pci_irq)); | ||
| 5654 | #endif | ||
| 5655 | 5639 | ||
| 5656 | if (!ioc->active) | 5640 | if (!ioc->active) |
| 5657 | y += sprintf(buffer+len+y, " (disabled)"); | 5641 | y += sprintf(buffer+len+y, " (disabled)"); |
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c index 274b0138d442..e27778926eba 100644 --- a/drivers/net/3c59x.c +++ b/drivers/net/3c59x.c | |||
| @@ -1382,17 +1382,12 @@ static int __devinit vortex_probe1(struct device *gendev, | |||
| 1382 | for (i = 0; i < 6; i++) | 1382 | for (i = 0; i < 6; i++) |
| 1383 | iowrite8(dev->dev_addr[i], ioaddr + i); | 1383 | iowrite8(dev->dev_addr[i], ioaddr + i); |
| 1384 | 1384 | ||
| 1385 | #ifdef __sparc__ | ||
| 1386 | if (print_info) | ||
| 1387 | printk(", IRQ %s\n", __irq_itoa(dev->irq)); | ||
| 1388 | #else | ||
| 1389 | if (print_info) | 1385 | if (print_info) |
| 1390 | printk(", IRQ %d\n", dev->irq); | 1386 | printk(", IRQ %d\n", dev->irq); |
| 1391 | /* Tell them about an invalid IRQ. */ | 1387 | /* Tell them about an invalid IRQ. */ |
| 1392 | if (dev->irq <= 0 || dev->irq >= NR_IRQS) | 1388 | if (dev->irq <= 0 || dev->irq >= NR_IRQS) |
| 1393 | printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n", | 1389 | printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n", |
| 1394 | dev->irq); | 1390 | dev->irq); |
| 1395 | #endif | ||
| 1396 | 1391 | ||
| 1397 | EL3WINDOW(4); | 1392 | EL3WINDOW(4); |
| 1398 | step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1; | 1393 | step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1; |
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c index b508812e97ac..23ff22ba5d31 100644 --- a/drivers/net/acenic.c +++ b/drivers/net/acenic.c | |||
| @@ -579,11 +579,7 @@ static int __devinit acenic_probe_one(struct pci_dev *pdev, | |||
| 579 | } | 579 | } |
| 580 | 580 | ||
| 581 | printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr); | 581 | printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr); |
| 582 | #ifdef __sparc__ | 582 | printk("irq %d\n", pdev->irq); |
| 583 | printk("irq %s\n", __irq_itoa(pdev->irq)); | ||
| 584 | #else | ||
| 585 | printk("irq %i\n", pdev->irq); | ||
| 586 | #endif | ||
| 587 | 583 | ||
| 588 | #ifdef CONFIG_ACENIC_OMIT_TIGON_I | 584 | #ifdef CONFIG_ACENIC_OMIT_TIGON_I |
| 589 | if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { | 585 | if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { |
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c index 9f046cae2f71..bd5d2668a362 100644 --- a/drivers/net/sunhme.c +++ b/drivers/net/sunhme.c | |||
| @@ -2221,13 +2221,8 @@ static int happy_meal_open(struct net_device *dev) | |||
| 2221 | if (request_irq(dev->irq, &happy_meal_interrupt, | 2221 | if (request_irq(dev->irq, &happy_meal_interrupt, |
| 2222 | SA_SHIRQ, dev->name, (void *)dev)) { | 2222 | SA_SHIRQ, dev->name, (void *)dev)) { |
| 2223 | HMD(("EAGAIN\n")); | 2223 | HMD(("EAGAIN\n")); |
| 2224 | #ifdef __sparc__ | ||
| 2225 | printk(KERN_ERR "happy_meal(SBUS): Can't order irq %s to go.\n", | ||
| 2226 | __irq_itoa(dev->irq)); | ||
| 2227 | #else | ||
| 2228 | printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n", | 2224 | printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n", |
| 2229 | dev->irq); | 2225 | dev->irq); |
| 2230 | #endif | ||
| 2231 | 2226 | ||
| 2232 | return -EAGAIN; | 2227 | return -EAGAIN; |
| 2233 | } | 2228 | } |
diff --git a/drivers/net/sunlance.c b/drivers/net/sunlance.c index b7d87d4690b4..6381243d8d00 100644 --- a/drivers/net/sunlance.c +++ b/drivers/net/sunlance.c | |||
| @@ -936,7 +936,7 @@ static int lance_open(struct net_device *dev) | |||
| 936 | 936 | ||
| 937 | if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ, | 937 | if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ, |
| 938 | lancestr, (void *) dev)) { | 938 | lancestr, (void *) dev)) { |
| 939 | printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq)); | 939 | printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); |
| 940 | return -EAGAIN; | 940 | return -EAGAIN; |
| 941 | } | 941 | } |
| 942 | 942 | ||
diff --git a/drivers/sbus/char/cpwatchdog.c b/drivers/sbus/char/cpwatchdog.c index fd2cc7782f76..5bf3dd901b65 100644 --- a/drivers/sbus/char/cpwatchdog.c +++ b/drivers/sbus/char/cpwatchdog.c | |||
| @@ -304,8 +304,8 @@ static int wd_open(struct inode *inode, struct file *f) | |||
| 304 | SA_SHIRQ, | 304 | SA_SHIRQ, |
| 305 | WD_OBPNAME, | 305 | WD_OBPNAME, |
| 306 | (void *)wd_dev.regs)) { | 306 | (void *)wd_dev.regs)) { |
| 307 | printk("%s: Cannot register IRQ %s\n", | 307 | printk("%s: Cannot register IRQ %d\n", |
| 308 | WD_OBPNAME, __irq_itoa(wd_dev.irq)); | 308 | WD_OBPNAME, wd_dev.irq); |
| 309 | return(-EBUSY); | 309 | return(-EBUSY); |
| 310 | } | 310 | } |
| 311 | wd_dev.initialized = 1; | 311 | wd_dev.initialized = 1; |
diff --git a/drivers/sbus/char/uctrl.c b/drivers/sbus/char/uctrl.c index e2d9a7c85427..575b1f7ed410 100644 --- a/drivers/sbus/char/uctrl.c +++ b/drivers/sbus/char/uctrl.c | |||
| @@ -400,7 +400,7 @@ static int __init ts102_uctrl_init(void) | |||
| 400 | } | 400 | } |
| 401 | 401 | ||
| 402 | driver->regs->uctrl_intr = UCTRL_INTR_RXNE_REQ|UCTRL_INTR_RXNE_MSK; | 402 | driver->regs->uctrl_intr = UCTRL_INTR_RXNE_REQ|UCTRL_INTR_RXNE_MSK; |
| 403 | printk("uctrl: 0x%x (irq %s)\n", driver->regs, __irq_itoa(driver->irq)); | 403 | printk("uctrl: 0x%x (irq %d)\n", driver->regs, driver->irq); |
| 404 | uctrl_get_event_status(); | 404 | uctrl_get_event_status(); |
| 405 | uctrl_get_external_status(); | 405 | uctrl_get_external_status(); |
| 406 | return 0; | 406 | return 0; |
diff --git a/drivers/scsi/esp.c b/drivers/scsi/esp.c index 87a8c3d2072c..0a3e45d7a972 100644 --- a/drivers/scsi/esp.c +++ b/drivers/scsi/esp.c | |||
| @@ -821,8 +821,8 @@ static int __init esp_register_irq(struct esp *esp) | |||
| 821 | return -1; | 821 | return -1; |
| 822 | } | 822 | } |
| 823 | 823 | ||
| 824 | printk("esp%d: IRQ %s ", esp->esp_id, | 824 | printk("esp%d: IRQ %d ", esp->esp_id, |
| 825 | __irq_itoa(esp->ehost->irq)); | 825 | esp->ehost->irq); |
| 826 | 826 | ||
| 827 | return 0; | 827 | return 0; |
| 828 | } | 828 | } |
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c index c7e78dcf09df..7c27ecc6fb5d 100644 --- a/drivers/scsi/qlogicpti.c +++ b/drivers/scsi/qlogicpti.c | |||
| @@ -725,7 +725,7 @@ static int __init qpti_register_irq(struct qlogicpti *qpti) | |||
| 725 | SA_SHIRQ, "Qlogic/PTI", qpti)) | 725 | SA_SHIRQ, "Qlogic/PTI", qpti)) |
| 726 | goto fail; | 726 | goto fail; |
| 727 | 727 | ||
| 728 | printk("qpti%d: IRQ %s ", qpti->qpti_id, __irq_itoa(qpti->irq)); | 728 | printk("qpti%d: IRQ %d ", qpti->qpti_id, qpti->irq); |
| 729 | 729 | ||
| 730 | return 0; | 730 | return 0; |
| 731 | 731 | ||
| @@ -988,8 +988,8 @@ const char *qlogicpti_info(struct Scsi_Host *host) | |||
| 988 | static char buf[80]; | 988 | static char buf[80]; |
| 989 | struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata; | 989 | struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata; |
| 990 | 990 | ||
| 991 | sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %s regs at %p", | 991 | sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %d regs at %p", |
| 992 | __irq_itoa(qpti->qhost->irq), qpti->qregs); | 992 | qpti->qhost->irq, qpti->qregs); |
| 993 | return buf; | 993 | return buf; |
| 994 | } | 994 | } |
| 995 | 995 | ||
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c index 9c83b4d39a26..7677fba2ceb5 100644 --- a/drivers/scsi/sym53c8xx_2/sym_glue.c +++ b/drivers/scsi/sym53c8xx_2/sym_glue.c | |||
| @@ -54,14 +54,8 @@ | |||
| 54 | #define NAME53C "sym53c" | 54 | #define NAME53C "sym53c" |
| 55 | #define NAME53C8XX "sym53c8xx" | 55 | #define NAME53C8XX "sym53c8xx" |
| 56 | 56 | ||
| 57 | /* SPARC just has to be different ... */ | ||
| 58 | #ifdef __sparc__ | ||
| 59 | #define IRQ_FMT "%s" | ||
| 60 | #define IRQ_PRM(x) __irq_itoa(x) | ||
| 61 | #else | ||
| 62 | #define IRQ_FMT "%d" | 57 | #define IRQ_FMT "%d" |
| 63 | #define IRQ_PRM(x) (x) | 58 | #define IRQ_PRM(x) (x) |
| 64 | #endif | ||
| 65 | 59 | ||
| 66 | struct sym_driver_setup sym_driver_setup = SYM_LINUX_DRIVER_SETUP; | 60 | struct sym_driver_setup sym_driver_setup = SYM_LINUX_DRIVER_SETUP; |
| 67 | unsigned int sym_debug_flags = 0; | 61 | unsigned int sym_debug_flags = 0; |
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index 2b4f96541b8e..4cdb610cdd37 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c | |||
| @@ -1295,9 +1295,9 @@ static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel) | |||
| 1295 | if (up->port.type == PORT_UNKNOWN) | 1295 | if (up->port.type == PORT_UNKNOWN) |
| 1296 | return -1; | 1296 | return -1; |
| 1297 | 1297 | ||
| 1298 | printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n", | 1298 | printk(KERN_INFO "su%d at 0x%p (irq = %d) is a %s\n", |
| 1299 | channel, | 1299 | channel, |
| 1300 | up->port.membase, __irq_itoa(up->port.irq), | 1300 | up->port.membase, up->port.irq, |
| 1301 | sunsu_type(&up->port)); | 1301 | sunsu_type(&up->port)); |
| 1302 | 1302 | ||
| 1303 | #ifdef CONFIG_SERIO | 1303 | #ifdef CONFIG_SERIO |
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c index cd49ebbf4a45..5b6569728a9c 100644 --- a/drivers/serial/sunzilog.c +++ b/drivers/serial/sunzilog.c | |||
| @@ -1540,8 +1540,8 @@ static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channe | |||
| 1540 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; | 1540 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; |
| 1541 | baud = 4800; | 1541 | baud = 4800; |
| 1542 | } | 1542 | } |
| 1543 | printk(KERN_INFO "zs%d at 0x%p (irq = %s) is a SunZilog\n", | 1543 | printk(KERN_INFO "zs%d at 0x%p (irq = %d) is a SunZilog\n", |
| 1544 | channel, up->port.membase, __irq_itoa(zilog_irq)); | 1544 | channel, up->port.membase, zilog_irq); |
| 1545 | 1545 | ||
| 1546 | up->curregs[R15] = BRKIE; | 1546 | up->curregs[R15] = BRKIE; |
| 1547 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | 1547 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); |
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index e2e00ba4e1e6..4bf914d00a14 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c | |||
| @@ -1826,24 +1826,16 @@ int usb_add_hcd(struct usb_hcd *hcd, | |||
| 1826 | 1826 | ||
| 1827 | /* enable irqs just before we start the controller */ | 1827 | /* enable irqs just before we start the controller */ |
| 1828 | if (hcd->driver->irq) { | 1828 | if (hcd->driver->irq) { |
| 1829 | char buf[8], *bufp = buf; | ||
| 1830 | |||
| 1831 | #ifdef __sparc__ | ||
| 1832 | bufp = __irq_itoa(irqnum); | ||
| 1833 | #else | ||
| 1834 | sprintf(buf, "%d", irqnum); | ||
| 1835 | #endif | ||
| 1836 | |||
| 1837 | snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", | 1829 | snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", |
| 1838 | hcd->driver->description, hcd->self.busnum); | 1830 | hcd->driver->description, hcd->self.busnum); |
| 1839 | if ((retval = request_irq(irqnum, &usb_hcd_irq, irqflags, | 1831 | if ((retval = request_irq(irqnum, &usb_hcd_irq, irqflags, |
| 1840 | hcd->irq_descr, hcd)) != 0) { | 1832 | hcd->irq_descr, hcd)) != 0) { |
| 1841 | dev_err(hcd->self.controller, | 1833 | dev_err(hcd->self.controller, |
| 1842 | "request interrupt %s failed\n", bufp); | 1834 | "request interrupt %d failed\n", irqnum); |
| 1843 | goto err_request_irq; | 1835 | goto err_request_irq; |
| 1844 | } | 1836 | } |
| 1845 | hcd->irq = irqnum; | 1837 | hcd->irq = irqnum; |
| 1846 | dev_info(hcd->self.controller, "irq %s, %s 0x%08llx\n", bufp, | 1838 | dev_info(hcd->self.controller, "irq %d, %s 0x%08llx\n", irqnum, |
| 1847 | (hcd->driver->flags & HCD_MEMORY) ? | 1839 | (hcd->driver->flags & HCD_MEMORY) ? |
| 1848 | "io mem" : "io base", | 1840 | "io mem" : "io base", |
| 1849 | (unsigned long long)hcd->rsrc_start); | 1841 | (unsigned long long)hcd->rsrc_start); |
diff --git a/drivers/usb/gadget/goku_udc.c b/drivers/usb/gadget/goku_udc.c index 66b81bbf6bee..5378c1757292 100644 --- a/drivers/usb/gadget/goku_udc.c +++ b/drivers/usb/gadget/goku_udc.c | |||
| @@ -1850,7 +1850,6 @@ static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 1850 | unsigned long resource, len; | 1850 | unsigned long resource, len; |
| 1851 | void __iomem *base = NULL; | 1851 | void __iomem *base = NULL; |
| 1852 | int retval; | 1852 | int retval; |
| 1853 | char buf [8], *bufp; | ||
| 1854 | 1853 | ||
| 1855 | /* if you want to support more than one controller in a system, | 1854 | /* if you want to support more than one controller in a system, |
| 1856 | * usb_gadget_driver_{register,unregister}() must change. | 1855 | * usb_gadget_driver_{register,unregister}() must change. |
| @@ -1913,20 +1912,14 @@ static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 1913 | pci_set_drvdata(pdev, dev); | 1912 | pci_set_drvdata(pdev, dev); |
| 1914 | INFO(dev, "%s\n", driver_desc); | 1913 | INFO(dev, "%s\n", driver_desc); |
| 1915 | INFO(dev, "version: " DRIVER_VERSION " %s\n", dmastr()); | 1914 | INFO(dev, "version: " DRIVER_VERSION " %s\n", dmastr()); |
| 1916 | #ifndef __sparc__ | 1915 | INFO(dev, "irq %d, pci mem %p\n", pdev->irq, base); |
| 1917 | scnprintf(buf, sizeof buf, "%d", pdev->irq); | ||
| 1918 | bufp = buf; | ||
| 1919 | #else | ||
| 1920 | bufp = __irq_itoa(pdev->irq); | ||
| 1921 | #endif | ||
| 1922 | INFO(dev, "irq %s, pci mem %p\n", bufp, base); | ||
| 1923 | 1916 | ||
| 1924 | /* init to known state, then setup irqs */ | 1917 | /* init to known state, then setup irqs */ |
| 1925 | udc_reset(dev); | 1918 | udc_reset(dev); |
| 1926 | udc_reinit (dev); | 1919 | udc_reinit (dev); |
| 1927 | if (request_irq(pdev->irq, goku_irq, SA_SHIRQ/*|SA_SAMPLE_RANDOM*/, | 1920 | if (request_irq(pdev->irq, goku_irq, SA_SHIRQ/*|SA_SAMPLE_RANDOM*/, |
| 1928 | driver_name, dev) != 0) { | 1921 | driver_name, dev) != 0) { |
| 1929 | DBG(dev, "request interrupt %s failed\n", bufp); | 1922 | DBG(dev, "request interrupt %d failed\n", pdev->irq); |
| 1930 | retval = -EBUSY; | 1923 | retval = -EBUSY; |
| 1931 | goto done; | 1924 | goto done; |
| 1932 | } | 1925 | } |
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c index 0b9293493957..020d3c42b1af 100644 --- a/drivers/usb/gadget/net2280.c +++ b/drivers/usb/gadget/net2280.c | |||
| @@ -2822,7 +2822,6 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 2822 | unsigned long resource, len; | 2822 | unsigned long resource, len; |
| 2823 | void __iomem *base = NULL; | 2823 | void __iomem *base = NULL; |
| 2824 | int retval, i; | 2824 | int retval, i; |
| 2825 | char buf [8], *bufp; | ||
| 2826 | 2825 | ||
| 2827 | /* if you want to support more than one controller in a system, | 2826 | /* if you want to support more than one controller in a system, |
| 2828 | * usb_gadget_driver_{register,unregister}() must change. | 2827 | * usb_gadget_driver_{register,unregister}() must change. |
| @@ -2896,15 +2895,10 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 2896 | retval = -ENODEV; | 2895 | retval = -ENODEV; |
| 2897 | goto done; | 2896 | goto done; |
| 2898 | } | 2897 | } |
| 2899 | #ifndef __sparc__ | 2898 | |
| 2900 | scnprintf (buf, sizeof buf, "%d", pdev->irq); | ||
| 2901 | bufp = buf; | ||
| 2902 | #else | ||
| 2903 | bufp = __irq_itoa(pdev->irq); | ||
| 2904 | #endif | ||
| 2905 | if (request_irq (pdev->irq, net2280_irq, SA_SHIRQ, driver_name, dev) | 2899 | if (request_irq (pdev->irq, net2280_irq, SA_SHIRQ, driver_name, dev) |
| 2906 | != 0) { | 2900 | != 0) { |
| 2907 | ERROR (dev, "request interrupt %s failed\n", bufp); | 2901 | ERROR (dev, "request interrupt %d failed\n", pdev->irq); |
| 2908 | retval = -EBUSY; | 2902 | retval = -EBUSY; |
| 2909 | goto done; | 2903 | goto done; |
| 2910 | } | 2904 | } |
| @@ -2953,8 +2947,8 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 2953 | 2947 | ||
| 2954 | /* done */ | 2948 | /* done */ |
| 2955 | INFO (dev, "%s\n", driver_desc); | 2949 | INFO (dev, "%s\n", driver_desc); |
| 2956 | INFO (dev, "irq %s, pci mem %p, chip rev %04x\n", | 2950 | INFO (dev, "irq %d, pci mem %p, chip rev %04x\n", |
| 2957 | bufp, base, dev->chiprev); | 2951 | pdev->irq, base, dev->chiprev); |
| 2958 | INFO (dev, "version: " DRIVER_VERSION "; dma %s\n", | 2952 | INFO (dev, "version: " DRIVER_VERSION "; dma %s\n", |
| 2959 | use_dma | 2953 | use_dma |
| 2960 | ? (use_dma_chaining ? "chaining" : "enabled") | 2954 | ? (use_dma_chaining ? "chaining" : "enabled") |
diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h index dbc687403208..f2d64537e29d 100644 --- a/include/asm-sparc/irq.h +++ b/include/asm-sparc/irq.h | |||
| @@ -16,8 +16,6 @@ | |||
| 16 | 16 | ||
| 17 | #define __irq_ino(irq) irq | 17 | #define __irq_ino(irq) irq |
| 18 | #define __irq_pil(irq) irq | 18 | #define __irq_pil(irq) irq |
| 19 | BTFIXUPDEF_CALL(char *, __irq_itoa, unsigned int) | ||
| 20 | #define __irq_itoa(irq) BTFIXUP_CALL(__irq_itoa)(irq) | ||
| 21 | 19 | ||
| 22 | #define NR_IRQS 16 | 20 | #define NR_IRQS 16 |
| 23 | 21 | ||
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index 5a1b7e4e7cc9..b9da9a600e35 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h | |||
| @@ -145,6 +145,8 @@ static inline int hard_smp_processor_id(void) | |||
| 145 | #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier | 145 | #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier |
| 146 | #define prof_counter(__cpu) cpu_data(__cpu).counter | 146 | #define prof_counter(__cpu) cpu_data(__cpu).counter |
| 147 | 147 | ||
| 148 | void smp_setup_cpu_possible_map(void); | ||
| 149 | |||
| 148 | #endif /* !(__ASSEMBLY__) */ | 150 | #endif /* !(__ASSEMBLY__) */ |
| 149 | 151 | ||
| 150 | /* Sparc specific messages. */ | 152 | /* Sparc specific messages. */ |
| @@ -161,7 +163,11 @@ static inline int hard_smp_processor_id(void) | |||
| 161 | #define MBOX_IDLECPU2 0xFD | 163 | #define MBOX_IDLECPU2 0xFD |
| 162 | #define MBOX_STOPCPU2 0xFE | 164 | #define MBOX_STOPCPU2 0xFE |
| 163 | 165 | ||
| 164 | #endif /* SMP */ | 166 | #else /* SMP */ |
| 167 | |||
| 168 | #define smp_setup_cpu_possible_map() do { } while (0) | ||
| 169 | |||
| 170 | #endif /* !(SMP) */ | ||
| 165 | 171 | ||
| 166 | #define NO_PROC_ID 0xFF | 172 | #define NO_PROC_ID 0xFF |
| 167 | 173 | ||
diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h index 3350c90c7869..1c75474ba1df 100644 --- a/include/asm-sparc/spinlock.h +++ b/include/asm-sparc/spinlock.h | |||
| @@ -154,6 +154,9 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) | |||
| 154 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | 154 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) |
| 155 | #define __raw_read_trylock(lock) generic__raw_read_trylock(lock) | 155 | #define __raw_read_trylock(lock) generic__raw_read_trylock(lock) |
| 156 | 156 | ||
| 157 | #define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) | ||
| 158 | #define __raw_write_can_lock(rw) (!(rw)->lock) | ||
| 159 | |||
| 157 | #endif /* !(__ASSEMBLY__) */ | 160 | #endif /* !(__ASSEMBLY__) */ |
| 158 | 161 | ||
| 159 | #endif /* __SPARC_SPINLOCK_H */ | 162 | #endif /* __SPARC_SPINLOCK_H */ |
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 9d6a6dbaf126..f2cc9411b4c7 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h | |||
| @@ -74,8 +74,10 @@ struct trap_per_cpu { | |||
| 74 | unsigned long tsb_huge; | 74 | unsigned long tsb_huge; |
| 75 | unsigned long tsb_huge_temp; | 75 | unsigned long tsb_huge_temp; |
| 76 | 76 | ||
| 77 | /* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */ | 77 | /* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ |
| 78 | unsigned long __pad2[4]; | 78 | unsigned int irq_worklist; |
| 79 | unsigned int __pad1; | ||
| 80 | unsigned long __pad2[3]; | ||
| 79 | } __attribute__((aligned(64))); | 81 | } __attribute__((aligned(64))); |
| 80 | extern struct trap_per_cpu trap_block[NR_CPUS]; | 82 | extern struct trap_per_cpu trap_block[NR_CPUS]; |
| 81 | extern void init_cur_cpu_trap(struct thread_info *); | 83 | extern void init_cur_cpu_trap(struct thread_info *); |
| @@ -119,6 +121,7 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
| 119 | #define TRAP_PER_CPU_CPU_LIST_PA 0xc8 | 121 | #define TRAP_PER_CPU_CPU_LIST_PA 0xc8 |
| 120 | #define TRAP_PER_CPU_TSB_HUGE 0xd0 | 122 | #define TRAP_PER_CPU_TSB_HUGE 0xd0 |
| 121 | #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 | 123 | #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 |
| 124 | #define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 | ||
| 122 | 125 | ||
| 123 | #define TRAP_BLOCK_SZ_SHIFT 8 | 126 | #define TRAP_BLOCK_SZ_SHIFT 8 |
| 124 | 127 | ||
| @@ -171,11 +174,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
| 171 | 174 | ||
| 172 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ | 175 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ |
| 173 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ | 176 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ |
| 174 | __GET_CPUID(TMP) \ | 177 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
| 175 | sethi %hi(__irq_work), DEST; \ | 178 | add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST; |
| 176 | sllx TMP, 6, TMP; \ | ||
| 177 | or DEST, %lo(__irq_work), DEST; \ | ||
| 178 | add DEST, TMP, DEST; | ||
| 179 | 179 | ||
| 180 | /* Clobbers TMP, loads DEST with current thread info pointer. */ | 180 | /* Clobbers TMP, loads DEST with current thread info pointer. */ |
| 181 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ | 181 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
| @@ -211,9 +211,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
| 211 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ | 211 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
| 212 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; | 212 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; |
| 213 | 213 | ||
| 214 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ | ||
| 214 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ | 215 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ |
| 215 | sethi %hi(__irq_work), DEST; \ | 216 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
| 216 | or DEST, %lo(__irq_work), DEST; | 217 | add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST; |
| 217 | 218 | ||
| 218 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ | 219 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
| 219 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ | 220 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h index f0cf71376ec5..7c29fd1a87aa 100644 --- a/include/asm-sparc64/hardirq.h +++ b/include/asm-sparc64/hardirq.h | |||
| @@ -12,6 +12,8 @@ | |||
| 12 | #define local_softirq_pending() \ | 12 | #define local_softirq_pending() \ |
| 13 | (local_cpu_data().__softirq_pending) | 13 | (local_cpu_data().__softirq_pending) |
| 14 | 14 | ||
| 15 | void ack_bad_irq(unsigned int irq); | ||
| 16 | |||
| 15 | #define HARDIRQ_BITS 8 | 17 | #define HARDIRQ_BITS 8 |
| 16 | 18 | ||
| 17 | #endif /* !(__SPARC64_HARDIRQ_H) */ | 19 | #endif /* !(__SPARC64_HARDIRQ_H) */ |
diff --git a/include/asm-sparc64/hw_irq.h b/include/asm-sparc64/hw_irq.h index 153cae2ddaee..599b3b073450 100644 --- a/include/asm-sparc64/hw_irq.h +++ b/include/asm-sparc64/hw_irq.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | #ifndef __ASM_SPARC64_HW_IRQ_H | 1 | #ifndef __ASM_SPARC64_HW_IRQ_H |
| 2 | #define __ASM_SPARC64_HW_IRQ_H | 2 | #define __ASM_SPARC64_HW_IRQ_H |
| 3 | 3 | ||
| 4 | /* Dummy include. */ | 4 | extern void hw_resend_irq(struct hw_interrupt_type *handler, unsigned int virt_irq); |
| 5 | 5 | ||
| 6 | #endif | 6 | #endif |
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index fa164d37ee3f..905e59b4a737 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h | |||
| @@ -15,58 +15,6 @@ | |||
| 15 | #include <asm/pil.h> | 15 | #include <asm/pil.h> |
| 16 | #include <asm/ptrace.h> | 16 | #include <asm/ptrace.h> |
| 17 | 17 | ||
| 18 | struct ino_bucket; | ||
| 19 | |||
| 20 | #define MAX_IRQ_DESC_ACTION 4 | ||
| 21 | |||
| 22 | struct irq_desc { | ||
| 23 | void (*pre_handler)(struct ino_bucket *, void *, void *); | ||
| 24 | void *pre_handler_arg1; | ||
| 25 | void *pre_handler_arg2; | ||
| 26 | u32 action_active_mask; | ||
| 27 | struct irqaction action[MAX_IRQ_DESC_ACTION]; | ||
| 28 | }; | ||
| 29 | |||
| 30 | /* You should not mess with this directly. That's the job of irq.c. | ||
| 31 | * | ||
| 32 | * If you make changes here, please update hand coded assembler of | ||
| 33 | * the vectored interrupt trap handler in entry.S -DaveM | ||
| 34 | * | ||
| 35 | * This is currently one DCACHE line, two buckets per L2 cache | ||
| 36 | * line. Keep this in mind please. | ||
| 37 | */ | ||
| 38 | struct ino_bucket { | ||
| 39 | /* Next handler in per-CPU PIL worklist. We know that | ||
| 40 | * bucket pointers have the high 32-bits clear, so to | ||
| 41 | * save space we only store the bits we need. | ||
| 42 | */ | ||
| 43 | /*0x00*/unsigned int irq_chain; | ||
| 44 | |||
| 45 | /* PIL to schedule this IVEC at. */ | ||
| 46 | /*0x04*/unsigned char pil; | ||
| 47 | |||
| 48 | /* If an IVEC arrives while irq_info is NULL, we | ||
| 49 | * set this to notify request_irq() about the event. | ||
| 50 | */ | ||
| 51 | /*0x05*/unsigned char pending; | ||
| 52 | |||
| 53 | /* Miscellaneous flags. */ | ||
| 54 | /*0x06*/unsigned char flags; | ||
| 55 | |||
| 56 | /* Currently unused. */ | ||
| 57 | /*0x07*/unsigned char __pad; | ||
| 58 | |||
| 59 | /* Reference to IRQ descriptor for this bucket. */ | ||
| 60 | /*0x08*/struct irq_desc *irq_info; | ||
| 61 | |||
| 62 | /* Sun5 Interrupt Clear Register. */ | ||
| 63 | /*0x10*/unsigned long iclr; | ||
| 64 | |||
| 65 | /* Sun5 Interrupt Mapping Register. */ | ||
| 66 | /*0x18*/unsigned long imap; | ||
| 67 | |||
| 68 | }; | ||
| 69 | |||
| 70 | /* IMAP/ICLR register defines */ | 18 | /* IMAP/ICLR register defines */ |
| 71 | #define IMAP_VALID 0x80000000 /* IRQ Enabled */ | 19 | #define IMAP_VALID 0x80000000 /* IRQ Enabled */ |
| 72 | #define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ | 20 | #define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ |
| @@ -84,36 +32,20 @@ struct ino_bucket { | |||
| 84 | #define ICLR_TRANSMIT 0x00000001 /* Transmit state */ | 32 | #define ICLR_TRANSMIT 0x00000001 /* Transmit state */ |
| 85 | #define ICLR_PENDING 0x00000003 /* Pending state */ | 33 | #define ICLR_PENDING 0x00000003 /* Pending state */ |
| 86 | 34 | ||
| 87 | /* Only 8-bits are available, be careful. -DaveM */ | 35 | /* The largest number of unique interrupt sources we support. |
| 88 | #define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */ | 36 | * If this needs to ever be larger than 255, you need to change |
| 89 | #define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/ | 37 | * the type of ino_bucket->virt_irq as appropriate. |
| 90 | #define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */ | 38 | * |
| 91 | 39 | * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq(). | |
| 92 | #define NUM_IVECS (IMAP_INR + 1) | 40 | */ |
| 93 | extern struct ino_bucket ivector_table[NUM_IVECS]; | 41 | #define NR_IRQS 255 |
| 94 | |||
| 95 | #define __irq_ino(irq) \ | ||
| 96 | (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0]) | ||
| 97 | #define __irq_pil(irq) ((struct ino_bucket *)(unsigned long)(irq))->pil | ||
| 98 | #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq)) | ||
| 99 | #define __irq(bucket) ((unsigned int)(unsigned long)(bucket)) | ||
| 100 | |||
| 101 | static __inline__ char *__irq_itoa(unsigned int irq) | ||
| 102 | { | ||
| 103 | static char buff[16]; | ||
| 104 | |||
| 105 | sprintf(buff, "%d,%x", __irq_pil(irq), (unsigned int)__irq_ino(irq)); | ||
| 106 | return buff; | ||
| 107 | } | ||
| 108 | |||
| 109 | #define NR_IRQS 16 | ||
| 110 | 42 | ||
| 43 | extern void irq_install_pre_handler(int virt_irq, | ||
| 44 | void (*func)(unsigned int, void *, void *), | ||
| 45 | void *arg1, void *arg2); | ||
| 111 | #define irq_canonicalize(irq) (irq) | 46 | #define irq_canonicalize(irq) (irq) |
| 112 | extern void disable_irq(unsigned int); | 47 | extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); |
| 113 | #define disable_irq_nosync disable_irq | 48 | extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); |
| 114 | extern void enable_irq(unsigned int); | ||
| 115 | extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap); | ||
| 116 | extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags); | ||
| 117 | extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); | 49 | extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); |
| 118 | 50 | ||
| 119 | static __inline__ void set_softint(unsigned long bits) | 51 | static __inline__ void set_softint(unsigned long bits) |
| @@ -139,8 +71,4 @@ static __inline__ unsigned long get_softint(void) | |||
| 139 | return retval; | 71 | return retval; |
| 140 | } | 72 | } |
| 141 | 73 | ||
| 142 | struct irqaction; | ||
| 143 | struct pt_regs; | ||
| 144 | int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); | ||
| 145 | |||
| 146 | #endif | 74 | #endif |
diff --git a/include/asm-sparc64/pil.h b/include/asm-sparc64/pil.h index 79f827eb3f5d..72927749aebf 100644 --- a/include/asm-sparc64/pil.h +++ b/include/asm-sparc64/pil.h | |||
| @@ -5,9 +5,9 @@ | |||
| 5 | /* To avoid some locking problems, we hard allocate certain PILs | 5 | /* To avoid some locking problems, we hard allocate certain PILs |
| 6 | * for SMP cross call messages that must do a etrap/rtrap. | 6 | * for SMP cross call messages that must do a etrap/rtrap. |
| 7 | * | 7 | * |
| 8 | * A cli() does not block the cross call delivery, so when SMP | 8 | * A local_irq_disable() does not block the cross call delivery, so |
| 9 | * locking is an issue we reschedule the event into a PIL interrupt | 9 | * when SMP locking is an issue we reschedule the event into a PIL |
| 10 | * which is blocked by cli(). | 10 | * interrupt which is blocked by local_irq_disable(). |
| 11 | * | 11 | * |
| 12 | * In fact any XCALL which has to etrap/rtrap has a problem because | 12 | * In fact any XCALL which has to etrap/rtrap has a problem because |
| 13 | * it is difficult to prevent rtrap from running BH's, and that would | 13 | * it is difficult to prevent rtrap from running BH's, and that would |
| @@ -17,6 +17,7 @@ | |||
| 17 | #define PIL_SMP_RECEIVE_SIGNAL 2 | 17 | #define PIL_SMP_RECEIVE_SIGNAL 2 |
| 18 | #define PIL_SMP_CAPTURE 3 | 18 | #define PIL_SMP_CAPTURE 3 |
| 19 | #define PIL_SMP_CTX_NEW_VERSION 4 | 19 | #define PIL_SMP_CTX_NEW_VERSION 4 |
| 20 | #define PIL_DEVICE_IRQ 5 | ||
| 20 | 21 | ||
| 21 | #ifndef __ASSEMBLY__ | 22 | #ifndef __ASSEMBLY__ |
| 22 | #define PIL_RESERVED(PIL) ((PIL) == PIL_SMP_CALL_FUNC || \ | 23 | #define PIL_RESERVED(PIL) ((PIL) == PIL_SMP_CALL_FUNC || \ |
diff --git a/sound/sparc/amd7930.c b/sound/sparc/amd7930.c index 55493340f467..dfe9bac7fa32 100644 --- a/sound/sparc/amd7930.c +++ b/sound/sparc/amd7930.c | |||
| @@ -977,9 +977,9 @@ static int __init snd_amd7930_create(struct snd_card *card, | |||
| 977 | 977 | ||
| 978 | if (request_irq(irq_prop->pri, snd_amd7930_interrupt, | 978 | if (request_irq(irq_prop->pri, snd_amd7930_interrupt, |
| 979 | SA_INTERRUPT | SA_SHIRQ, "amd7930", amd)) { | 979 | SA_INTERRUPT | SA_SHIRQ, "amd7930", amd)) { |
| 980 | snd_printk("amd7930-%d: Unable to grab IRQ %s\n", | 980 | snd_printk("amd7930-%d: Unable to grab IRQ %d\n", |
| 981 | dev, | 981 | dev, |
| 982 | __irq_itoa(irq_prop->pri)); | 982 | irq_prop->pri); |
| 983 | snd_amd7930_free(amd); | 983 | snd_amd7930_free(amd); |
| 984 | return -EBUSY; | 984 | return -EBUSY; |
| 985 | } | 985 | } |
| @@ -1063,11 +1063,11 @@ static int __init amd7930_attach(int prom_node, struct sbus_dev *sdev) | |||
| 1063 | 1063 | ||
| 1064 | strcpy(card->driver, "AMD7930"); | 1064 | strcpy(card->driver, "AMD7930"); |
| 1065 | strcpy(card->shortname, "Sun AMD7930"); | 1065 | strcpy(card->shortname, "Sun AMD7930"); |
| 1066 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s", | 1066 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %d", |
| 1067 | card->shortname, | 1067 | card->shortname, |
| 1068 | rp->flags & 0xffL, | 1068 | rp->flags & 0xffL, |
| 1069 | rp->start, | 1069 | rp->start, |
| 1070 | __irq_itoa(irq_prop.pri)); | 1070 | irq_prop.pri); |
| 1071 | 1071 | ||
| 1072 | if ((err = snd_amd7930_create(card, sdev, rp, reg_prop.reg_size, | 1072 | if ((err = snd_amd7930_create(card, sdev, rp, reg_prop.reg_size, |
| 1073 | &irq_prop, dev, &amd)) < 0) | 1073 | &irq_prop, dev, &amd)) < 0) |
diff --git a/sound/sparc/cs4231.c b/sound/sparc/cs4231.c index 8804f26ddb3a..b3efc9aa2916 100644 --- a/sound/sparc/cs4231.c +++ b/sound/sparc/cs4231.c | |||
| @@ -2003,9 +2003,8 @@ static int __init snd_cs4231_sbus_create(struct snd_card *card, | |||
| 2003 | 2003 | ||
| 2004 | if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt, | 2004 | if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt, |
| 2005 | SA_SHIRQ, "cs4231", chip)) { | 2005 | SA_SHIRQ, "cs4231", chip)) { |
| 2006 | snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %s\n", | 2006 | snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", |
| 2007 | dev, | 2007 | dev, sdev->irqs[0]); |
| 2008 | __irq_itoa(sdev->irqs[0])); | ||
| 2009 | snd_cs4231_sbus_free(chip); | 2008 | snd_cs4231_sbus_free(chip); |
| 2010 | return -EBUSY; | 2009 | return -EBUSY; |
| 2011 | } | 2010 | } |
| @@ -2038,11 +2037,11 @@ static int __init cs4231_sbus_attach(struct sbus_dev *sdev) | |||
| 2038 | if (err) | 2037 | if (err) |
| 2039 | return err; | 2038 | return err; |
| 2040 | 2039 | ||
| 2041 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s", | 2040 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %d", |
| 2042 | card->shortname, | 2041 | card->shortname, |
| 2043 | rp->flags & 0xffL, | 2042 | rp->flags & 0xffL, |
| 2044 | rp->start, | 2043 | rp->start, |
| 2045 | __irq_itoa(sdev->irqs[0])); | 2044 | sdev->irqs[0]); |
| 2046 | 2045 | ||
| 2047 | if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) { | 2046 | if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) { |
| 2048 | snd_card_free(card); | 2047 | snd_card_free(card); |
| @@ -2244,10 +2243,10 @@ static int __init cs4231_ebus_attach(struct linux_ebus_device *edev) | |||
| 2244 | if (err) | 2243 | if (err) |
| 2245 | return err; | 2244 | return err; |
| 2246 | 2245 | ||
| 2247 | sprintf(card->longname, "%s at 0x%lx, irq %s", | 2246 | sprintf(card->longname, "%s at 0x%lx, irq %d", |
| 2248 | card->shortname, | 2247 | card->shortname, |
| 2249 | edev->resource[0].start, | 2248 | edev->resource[0].start, |
| 2250 | __irq_itoa(edev->irqs[0])); | 2249 | edev->irqs[0]); |
| 2251 | 2250 | ||
| 2252 | if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) { | 2251 | if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) { |
| 2253 | snd_card_free(card); | 2252 | snd_card_free(card); |
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c index 2164b7d290c7..e622d08215c9 100644 --- a/sound/sparc/dbri.c +++ b/sound/sparc/dbri.c | |||
| @@ -2645,9 +2645,9 @@ static int __init dbri_attach(int prom_node, struct sbus_dev *sdev) | |||
| 2645 | strcpy(card->driver, "DBRI"); | 2645 | strcpy(card->driver, "DBRI"); |
| 2646 | strcpy(card->shortname, "Sun DBRI"); | 2646 | strcpy(card->shortname, "Sun DBRI"); |
| 2647 | rp = &sdev->resource[0]; | 2647 | rp = &sdev->resource[0]; |
| 2648 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s", | 2648 | sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %d", |
| 2649 | card->shortname, | 2649 | card->shortname, |
| 2650 | rp->flags & 0xffL, rp->start, __irq_itoa(irq.pri)); | 2650 | rp->flags & 0xffL, rp->start, irq.pri); |
| 2651 | 2651 | ||
| 2652 | if ((err = snd_dbri_create(card, sdev, &irq, dev)) < 0) { | 2652 | if ((err = snd_dbri_create(card, sdev, &irq, dev)) < 0) { |
| 2653 | snd_card_free(card); | 2653 | snd_card_free(card); |
