diff options
-rw-r--r-- | arch/x86/include/asm/irq_vectors.h | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h index 3ab43df089cd..dbc81acb7e93 100644 --- a/arch/x86/include/asm/irq_vectors.h +++ b/arch/x86/include/asm/irq_vectors.h | |||
@@ -30,26 +30,38 @@ | |||
30 | /* | 30 | /* |
31 | * IDT vectors usable for external interrupt sources start | 31 | * IDT vectors usable for external interrupt sources start |
32 | * at 0x20: | 32 | * at 0x20: |
33 | * hpa said we can start from 0x1f. | ||
34 | * 0x1f is documented as reserved. However, the ability for the APIC | ||
35 | * to generate vectors starting at 0x10 is documented, as is the | ||
36 | * ability for the CPU to receive any vector number as an interrupt. | ||
37 | * 0x1f is used for IRQ_MOVE_CLEANUP_VECTOR since that vector needs | ||
38 | * an entire privilege level (16 vectors) all by itself at a higher | ||
39 | * priority than any actual device vector. Thus, by placing it in the | ||
40 | * otherwise-unusable 0x10 privilege level, we avoid wasting a full | ||
41 | * 16-vector block. | ||
33 | */ | 42 | */ |
34 | #define FIRST_EXTERNAL_VECTOR 0x20 | 43 | #define FIRST_EXTERNAL_VECTOR 0x1f |
35 | 44 | ||
45 | #define IA32_SYSCALL_VECTOR 0x80 | ||
36 | #ifdef CONFIG_X86_32 | 46 | #ifdef CONFIG_X86_32 |
37 | # define SYSCALL_VECTOR 0x80 | 47 | # define SYSCALL_VECTOR 0x80 |
38 | # define IA32_SYSCALL_VECTOR 0x80 | ||
39 | #else | ||
40 | # define IA32_SYSCALL_VECTOR 0x80 | ||
41 | #endif | 48 | #endif |
42 | 49 | ||
43 | /* | 50 | /* |
44 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering | 51 | * Reserve the lowest usable priority level 0x10 - 0x1f for triggering |
45 | * cleanup after irq migration. | 52 | * cleanup after irq migration. |
53 | * this overlaps with the reserved range for cpu exceptions so this | ||
54 | * will need to be changed to 0x20 - 0x2f if the last cpu exception is | ||
55 | * ever allocated. | ||
46 | */ | 56 | */ |
57 | |||
47 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | 58 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR |
48 | 59 | ||
49 | /* | 60 | /* |
50 | * Vectors 0x30-0x3f are used for ISA interrupts. | 61 | * Vectors 0x20-0x2f are used for ISA interrupts. |
62 | * round up to the next 16-vector boundary | ||
51 | */ | 63 | */ |
52 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | 64 | #define IRQ0_VECTOR ((FIRST_EXTERNAL_VECTOR + 16) & ~15) |
53 | 65 | ||
54 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | 66 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) |
55 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | 67 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) |
@@ -122,7 +134,7 @@ | |||
122 | 134 | ||
123 | /* | 135 | /* |
124 | * First APIC vector available to drivers: (vectors 0x30-0xee) we | 136 | * First APIC vector available to drivers: (vectors 0x30-0xee) we |
125 | * start at 0x31(0x41) to spread out vectors evenly between priority | 137 | * start at 0x31 to spread out vectors evenly between priority |
126 | * levels. (0x80 is the syscall vector) | 138 | * levels. (0x80 is the syscall vector) |
127 | */ | 139 | */ |
128 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) | 140 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) |