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-rw-r--r--arch/cris/arch-v10/lib/memset.c397
-rw-r--r--arch/cris/arch-v32/lib/memset.c398
2 files changed, 404 insertions, 391 deletions
diff --git a/arch/cris/arch-v10/lib/memset.c b/arch/cris/arch-v10/lib/memset.c
index 42c1101043a3..c94ea9b3ec29 100644
--- a/arch/cris/arch-v10/lib/memset.c
+++ b/arch/cris/arch-v10/lib/memset.c
@@ -1,252 +1,259 @@
1/*#************************************************************************#*/ 1/* A memset for CRIS.
2/*#-------------------------------------------------------------------------*/ 2 Copyright (C) 1999-2005 Axis Communications.
3/*# */ 3 All rights reserved.
4/*# FUNCTION NAME: memset() */ 4
5/*# */ 5 Redistribution and use in source and binary forms, with or without
6/*# PARAMETERS: void* dst; Destination address. */ 6 modification, are permitted provided that the following conditions
7/*# int c; Value of byte to write. */ 7 are met:
8/*# int len; Number of bytes to write. */ 8
9/*# */ 9 1. Redistributions of source code must retain the above copyright
10/*# RETURNS: dst. */ 10 notice, this list of conditions and the following disclaimer.
11/*# */ 11
12/*# DESCRIPTION: Sets the memory dst of length len bytes to c, as standard. */ 12 2. Neither the name of Axis Communications nor the names of its
13/*# Framework taken from memcpy. This routine is */ 13 contributors may be used to endorse or promote products derived
14/*# very sensitive to compiler changes in register allocation. */ 14 from this software without specific prior written permission.
15/*# Should really be rewritten to avoid this problem. */ 15
16/*# */ 16 THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
17/*#-------------------------------------------------------------------------*/ 17 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18/*# */ 18 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19/*# HISTORY */ 19 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
20/*# */ 20 COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
21/*# DATE NAME CHANGES */ 21 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22/*# ---- ---- ------- */ 22 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23/*# 990713 HP Tired of watching this function (or */ 23 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24/*# really, the nonoptimized generic */ 24 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25/*# implementation) take up 90% of simulator */ 25 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
26/*# output. Measurements needed. */ 26 IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27/*# */ 27 POSSIBILITY OF SUCH DAMAGE. */
28/*#-------------------------------------------------------------------------*/ 28
29 29/* FIXME: This file should really only be used for reference, as the
30#include <linux/types.h> 30 result is somewhat depending on gcc generating what we expect rather
31 31 than what we describe. An assembly file should be used instead. */
32/* No, there's no macro saying 12*4, since it is "hard" to get it into 32
33 the asm in a good way. Thus better to expose the problem everywhere. 33/* Note the multiple occurrence of the expression "12*4", including the
34 */ 34 asm. It is hard to get it into the asm in a good way. Thus better to
35 35 expose the problem everywhere: no macro. */
36/* Assuming 1 cycle per dword written or read (ok, not really true), and 36
37 one per instruction, then 43+3*(n/48-1) <= 24+24*(n/48-1) 37/* Assuming one cycle per dword written or read (ok, not really true; the
38 so n >= 45.7; n >= 0.9; we win on the first full 48-byte block to set. */ 38 world is not ideal), and one cycle per instruction, then 43+3*(n/48-1)
39 39 <= 24+24*(n/48-1) so n >= 45.7; n >= 0.9; we win on the first full
40#define ZERO_BLOCK_SIZE (1*12*4) 40 48-byte block to set. */
41 41
42void *memset(void *pdst, 42#define MEMSET_BY_BLOCK_THRESHOLD (1 * 48)
43 int c, 43
44 size_t plen) 44/* No name ambiguities in this file. */
45__asm__ (".syntax no_register_prefix");
46
47void *memset(void *pdst, int c, unsigned int plen)
45{ 48{
46 /* Ok. Now we want the parameters put in special registers. 49 /* Now we want the parameters in special registers. Make sure the
47 Make sure the compiler is able to make something useful of this. */ 50 compiler does something usable with this. */
48 51
49 register char *return_dst __asm__ ("r10") = pdst; 52 register char *return_dst __asm__ ("r10") = pdst;
50 register int n __asm__ ("r12") = plen; 53 register int n __asm__ ("r12") = plen;
51 register int lc __asm__ ("r11") = c; 54 register int lc __asm__ ("r11") = c;
52 55
53 /* Most apps use memset sanely. Only those memsetting about 3..4 56 /* Most apps use memset sanely. Memsetting about 3..4 bytes or less get
54 bytes or less get penalized compared to the generic implementation 57 penalized here compared to the generic implementation. */
55 - and that's not really sane use. */
56 58
57 /* Ugh. This is fragile at best. Check with newer GCC releases, if 59 /* This is fragile performancewise at best. Check with newer GCC
58 they compile cascaded "x |= x << 8" sanely! */ 60 releases, if they compile cascaded "x |= x << 8" to sane code. */
59 __asm__("movu.b %0,$r13\n\t" 61 __asm__("movu.b %0,r13 \n\
60 "lslq 8,$r13\n\t" 62 lslq 8,r13 \n\
61 "move.b %0,$r13\n\t" 63 move.b %0,r13 \n\
62 "move.d $r13,%0\n\t" 64 move.d r13,%0 \n\
63 "lslq 16,$r13\n\t" 65 lslq 16,r13 \n\
64 "or.d $r13,%0" 66 or.d r13,%0"
65 : "=r" (lc) : "0" (lc) : "r13"); 67 : "=r" (lc) /* Inputs. */
68 : "0" (lc) /* Outputs. */
69 : "r13"); /* Trash. */
66 70
67 { 71 {
68 register char *dst __asm__ ("r13") = pdst; 72 register char *dst __asm__ ("r13") = pdst;
69 73
70 /* This is NONPORTABLE, but since this whole routine is */ 74 if (((unsigned long) pdst & 3) != 0
71 /* grossly nonportable that doesn't matter. */ 75 /* Oops! n = 0 must be a valid call, regardless of alignment. */
76 && n >= 3)
77 {
78 if ((unsigned long) dst & 1)
79 {
80 *dst = (char) lc;
81 n--;
82 dst++;
83 }
72 84
73 if (((unsigned long) pdst & 3) != 0 85 if ((unsigned long) dst & 2)
74 /* Oops! n=0 must be a legal call, regardless of alignment. */ 86 {
75 && n >= 3) 87 *(short *) dst = lc;
76 { 88 n -= 2;
77 if ((unsigned long)dst & 1) 89 dst += 2;
78 { 90 }
79 *dst = (char) lc; 91 }
80 n--;
81 dst++;
82 }
83
84 if ((unsigned long)dst & 2)
85 {
86 *(short *)dst = lc;
87 n -= 2;
88 dst += 2;
89 }
90 }
91 92
92 /* Now the fun part. For the threshold value of this, check the equation 93 /* Decide which setting method to use. */
93 above. */ 94 if (n >= MEMSET_BY_BLOCK_THRESHOLD)
94 /* Decide which copying method to use. */ 95 {
95 if (n >= ZERO_BLOCK_SIZE) 96 /* It is not optimal to tell the compiler about clobbering any
96 { 97 registers; that will move the saving/restoring of those registers
97 /* For large copies we use 'movem' */ 98 to the function prologue/epilogue, and make non-block sizes
98 99 suboptimal. */
99 /* It is not optimal to tell the compiler about clobbering any 100 __asm__ volatile
100 registers; that will move the saving/restoring of those registers 101 ("\
101 to the function prologue/epilogue, and make non-movem sizes 102 ;; GCC does promise correct register allocations, but let's \n\
102 suboptimal. 103 ;; make sure it keeps its promises. \n\
103 104 .ifnc %0-%1-%4,$r13-$r12-$r11 \n\
104 This method is not foolproof; it assumes that the "asm reg" 105 .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\" \n\
105 declarations at the beginning of the function really are used 106 .endif \n\
106 here (beware: they may be moved to temporary registers). 107 \n\
107 This way, we do not have to save/move the registers around into 108 ;; Save the registers we'll clobber in the movem process \n\
108 temporaries; we can safely use them straight away. 109 ;; on the stack. Don't mention them to gcc, it will only be \n\
109 110 ;; upset. \n\
110 If you want to check that the allocation was right; then 111 subq 11*4,sp \n\
111 check the equalities in the first comment. It should say 112 movem r10,[sp] \n\
112 "r13=r13, r12=r12, r11=r11" */
113 __asm__ volatile ("\n\