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-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/mach-s3c2410/Kconfig8
-rw-r--r--arch/arm/mach-s3c2410/Makefile.boot10
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c9
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c76
-rw-r--r--arch/arm/mach-s3c2410/pm.c15
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c6
-rw-r--r--arch/arm/mach-s3c2440/Kconfig13
-rw-r--r--arch/arm/mach-s3c2440/Makefile1
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c582
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2443/mach-smdk2443.c2
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c2
-rw-r--r--arch/arm/mach-s5p6440/cpu.c2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/pwm-clock.h24
-rw-r--r--arch/arm/mach-s5p6442/cpu.c2
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h21
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/cpu.c2
-rw-r--r--arch/arm/mach-s5pv210/gpiolib.c261
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h18
-rw-r--r--arch/arm/mach-s5pv210/include/mach/pwm-clock.h21
-rw-r--r--arch/arm/mm/mmu.c5
-rw-r--r--arch/arm/plat-s3c24xx/devs.c19
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s5p/clock.c5
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-clock.h1
-rw-r--r--arch/arm/plat-samsung/Kconfig5
-rw-r--r--arch/arm/plat-samsung/Makefile1
-rw-r--r--arch/arm/plat-samsung/dev-hwmon.c42
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h3
-rw-r--r--arch/arm/plat-samsung/include/plat/dma.h4
-rw-r--r--arch/arm/plat-samsung/include/plat/hwmon.h10
39 files changed, 1110 insertions, 80 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ed820e737a8a..eddcbba87c67 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -110,6 +110,8 @@ CHECKFLAGS += -D__arm__
110head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o 110head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o
111textofs-y := 0x00008000 111textofs-y := 0x00008000
112textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000 112textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
113# We don't want the htc bootloader to corrupt kernel during resume
114textofs-$(CONFIG_PM_H1940) := 0x00108000
113# SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory 115# SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory
114ifeq ($(CONFIG_ARCH_SA1100),y) 116ifeq ($(CONFIG_ARCH_SA1100),y)
115textofs-$(CONFIG_SA1111) := 0x00208000 117textofs-$(CONFIG_SA1111) := 0x00208000
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 9e5e96f12d86..a4c0b3fcdbba 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -96,12 +96,19 @@ config PM_H1940
96config MACH_N30 96config MACH_N30
97 bool "Acer N30 family" 97 bool "Acer N30 family"
98 select CPU_S3C2410 98 select CPU_S3C2410
99 select MACH_N35
99 select S3C_DEV_USB_HOST 100 select S3C_DEV_USB_HOST
100 select S3C_DEV_NAND 101 select S3C_DEV_NAND
101 help 102 help
102 Say Y here if you want suppt for the Acer N30, Acer N35, 103 Say Y here if you want suppt for the Acer N30, Acer N35,
103 Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. 104 Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
104 105
106config MACH_N35
107 bool
108 help
109 Internal node in order to enable support for Acer N35 if Acer N30 is
110 selected.
111
105config ARCH_BAST 112config ARCH_BAST
106 bool "Simtec Electronics BAST (EB2410ITX)" 113 bool "Simtec Electronics BAST (EB2410ITX)"
107 select CPU_S3C2410 114 select CPU_S3C2410
@@ -111,6 +118,7 @@ config ARCH_BAST
111 select MACH_BAST_IDE 118 select MACH_BAST_IDE
112 select S3C24XX_DCLK 119 select S3C24XX_DCLK
113 select ISA 120 select ISA
121 select S3C_DEV_HWMON
114 select S3C_DEV_USB_HOST 122 select S3C_DEV_USB_HOST
115 select S3C_DEV_NAND 123 select S3C_DEV_NAND
116 help 124 help
diff --git a/arch/arm/mach-s3c2410/Makefile.boot b/arch/arm/mach-s3c2410/Makefile.boot
index 7dab2a0325b5..58c1dd7f8e1d 100644
--- a/arch/arm/mach-s3c2410/Makefile.boot
+++ b/arch/arm/mach-s3c2410/Makefile.boot
@@ -1,3 +1,7 @@
1 zreladdr-y := 0x30008000 1ifeq ($(CONFIG_PM_H1940),y)
2params_phys-y := 0x30000100 2 zreladdr-y := 0x30108000
3 3 params_phys-y := 0x30100100
4else
5 zreladdr-y := 0x30008000
6 params_phys-y := 0x30000100
7endif
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index b061ddcf3067..c1f90f6fab42 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -633,7 +633,7 @@ static void __init bast_map_io(void)
633 633
634 s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); 634 s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
635 635
636 s3c_device_hwmon.dev.platform_data = &bast_hwmon_info; 636 s3c_hwmon_set_platdata(&bast_hwmon_info);
637 637
638 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); 638 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
639 s3c24xx_init_clocks(0); 639 s3c24xx_init_clocks(0);
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 9531b4c41deb..d2a2fad7db97 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -163,8 +163,8 @@ static struct s3c2410fb_display h1940_lcd __initdata = {
163 .xres = 240, 163 .xres = 240,
164 .yres = 320, 164 .yres = 320,
165 .bpp = 16, 165 .bpp = 16,
166 .left_margin = 20, 166 .left_margin = 8,
167 .right_margin = 8, 167 .right_margin = 20,
168 .hsync_len = 4, 168 .hsync_len = 4,
169 .upper_margin = 8, 169 .upper_margin = 8,
170 .lower_margin = 7, 170 .lower_margin = 7,
@@ -272,7 +272,6 @@ static struct platform_device h1940_lcd_powerdev = {
272}; 272};
273 273
274static struct platform_device *h1940_devices[] __initdata = { 274static struct platform_device *h1940_devices[] __initdata = {
275 &s3c_device_ts,
276 &s3c_device_ohci, 275 &s3c_device_ohci,
277 &s3c_device_lcd, 276 &s3c_device_lcd,
278 &s3c_device_wdt, 277 &s3c_device_wdt,
@@ -286,6 +285,8 @@ static struct platform_device *h1940_devices[] __initdata = {
286 &s3c_device_timer[0], 285 &s3c_device_timer[0],
287 &h1940_backlight, 286 &h1940_backlight,
288 &h1940_lcd_powerdev, 287 &h1940_lcd_powerdev,
288 &s3c_device_adc,
289 &s3c_device_ts,
289}; 290};
290 291
291static void __init h1940_map_io(void) 292static void __init h1940_map_io(void)
@@ -339,7 +340,7 @@ static void __init h1940_init(void)
339} 340}
340 341
341MACHINE_START(H1940, "IPAQ-H1940") 342MACHINE_START(H1940, "IPAQ-H1940")
342 /* Maintainer: Ben Dooks <ben@fluff.org> */ 343 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
343 .phys_io = S3C2410_PA_UART, 344 .phys_io = S3C2410_PA_UART,
344 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 345 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
345 .boot_params = S3C2410_SDRAM_PA + 0x100, 346 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 75a9fd37a467..41f299d983eb 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -26,6 +26,7 @@
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/timer.h> 27#include <linux/timer.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/mmc/host.h>
29 30
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
@@ -46,6 +47,7 @@
46#include <plat/clock.h> 47#include <plat/clock.h>
47#include <plat/cpu.h> 48#include <plat/cpu.h>
48#include <plat/devs.h> 49#include <plat/devs.h>
50#include <plat/mci.h>
49#include <plat/s3c2410.h> 51#include <plat/s3c2410.h>
50#include <plat/udc.h> 52#include <plat/udc.h>
51 53
@@ -172,8 +174,10 @@ static struct gpio_keys_button n35_buttons[] = {
172 { 174 {
173 .gpio = S3C2410_GPF(0), 175 .gpio = S3C2410_GPF(0),
174 .code = KEY_POWER, 176 .code = KEY_POWER,
177 .type = EV_PWR,
175 .desc = "Power", 178 .desc = "Power",
176 .active_low = 0, 179 .active_low = 0,
180 .wakeup = 1,
177 }, 181 },
178 { 182 {
179 .gpio = S3C2410_GPG(9), 183 .gpio = S3C2410_GPG(9),
@@ -264,6 +268,14 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = {
264 .def_trigger = "", 268 .def_trigger = "",
265}; 269};
266 270
271/* This is the blue LED on the device. Originaly used to indicate GPS activity
272 * by flashing. */
273static struct s3c24xx_led_platdata n35_blue_led_pdata = {
274 .name = "blue_led",
275 .gpio = S3C2410_GPD(8),
276 .def_trigger = "",
277};
278
267/* This LED is driven by the battery microcontroller, and is blinking 279/* This LED is driven by the battery microcontroller, and is blinking
268 * red, blinking green or solid green when the battery is low, 280 * red, blinking green or solid green when the battery is low,
269 * charging or full respectively. By driving GPD9 low, it's possible 281 * charging or full respectively. By driving GPD9 low, it's possible
@@ -275,6 +287,13 @@ static struct s3c24xx_led_platdata n30_warning_led_pdata = {
275 .def_trigger = "", 287 .def_trigger = "",
276}; 288};
277 289
290static struct s3c24xx_led_platdata n35_warning_led_pdata = {
291 .name = "warning_led",
292 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
293 .gpio = S3C2410_GPD(9),
294 .def_trigger = "",
295};
296
278static struct platform_device n30_blue_led = { 297static struct platform_device n30_blue_led = {
279 .name = "s3c24xx_led", 298 .name = "s3c24xx_led",
280 .id = 1, 299 .id = 1,
@@ -283,6 +302,14 @@ static struct platform_device n30_blue_led = {
283 }, 302 },
284}; 303};
285 304
305static struct platform_device n35_blue_led = {
306 .name = "s3c24xx_led",
307 .id = 1,
308 .dev = {
309 .platform_data = &n35_blue_led_pdata,
310 },
311};
312
286static struct platform_device n30_warning_led = { 313static struct platform_device n30_warning_led = {
287 .name = "s3c24xx_led", 314 .name = "s3c24xx_led",
288 .id = 2, 315 .id = 2,
@@ -291,6 +318,14 @@ static struct platform_device n30_warning_led = {
291 }, 318 },
292}; 319};
293 320
321static struct platform_device n35_warning_led = {
322 .name = "s3c24xx_led",
323 .id = 2,
324 .dev = {
325 .platform_data = &n35_warning_led_pdata,
326 },
327};
328
294static struct s3c2410fb_display n30_display __initdata = { 329static struct s3c2410fb_display n30_display __initdata = {
295 .type = S3C2410_LCDCON1_TFT, 330 .type = S3C2410_LCDCON1_TFT,
296 .width = 240, 331 .width = 240,
@@ -317,13 +352,36 @@ static struct s3c2410fb_mach_info n30_fb_info __initdata = {
317 .lpcsel = 0x06, 352 .lpcsel = 0x06,
318}; 353};
319 354
355static void n30_sdi_set_power(unsigned char power_mode, unsigned short vdd)
356{
357 switch (power_mode) {
358 case MMC_POWER_ON:
359 case MMC_POWER_UP:
360 gpio_set_value(S3C2410_GPG(4), 1);
361 break;
362 case MMC_POWER_OFF:
363 default:
364 gpio_set_value(S3C2410_GPG(4), 0);
365 break;
366 }
367}
368
369static struct s3c24xx_mci_pdata n30_mci_cfg __initdata = {
370 .gpio_detect = S3C2410_GPF(1),
371 .gpio_wprotect = S3C2410_GPG(10),
372 .ocr_avail = MMC_VDD_32_33,
373 .set_power = n30_sdi_set_power,
374};
375
320static struct platform_device *n30_devices[] __initdata = { 376static struct platform_device *n30_devices[] __initdata = {
321 &s3c_device_lcd, 377 &s3c_device_lcd,
322 &s3c_device_wdt, 378 &s3c_device_wdt,
323 &s3c_device_i2c0, 379 &s3c_device_i2c0,
324 &s3c_device_iis, 380 &s3c_device_iis,
325 &s3c_device_ohci, 381 &s3c_device_ohci,
382 &s3c_device_rtc,
326 &s3c_device_usbgadget, 383 &s3c_device_usbgadget,
384 &s3c_device_sdi,
327 &n30_button_device, 385 &n30_button_device,
328 &n30_blue_led, 386 &n30_blue_led,
329 &n30_warning_led, 387 &n30_warning_led,
@@ -334,8 +392,12 @@ static struct platform_device *n35_devices[] __initdata = {
334 &s3c_device_wdt, 392 &s3c_device_wdt,
335 &s3c_device_i2c0, 393 &s3c_device_i2c0,
336 &s3c_device_iis, 394 &s3c_device_iis,
395 &s3c_device_rtc,
337 &s3c_device_usbgadget, 396 &s3c_device_usbgadget,
397 &s3c_device_sdi,
338 &n35_button_device, 398 &n35_button_device,
399 &n35_blue_led,
400 &n35_warning_led,
339}; 401};
340 402
341static struct s3c2410_platform_i2c __initdata n30_i2ccfg = { 403static struct s3c2410_platform_i2c __initdata n30_i2ccfg = {
@@ -490,17 +552,15 @@ static void __init n30_map_io(void)
490 s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); 552 s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs));
491} 553}
492 554
493static void __init n30_init_irq(void)
494{
495 s3c24xx_init_irq();
496}
497
498/* GPB3 is the line that controls the pull-up for the USB D+ line */ 555/* GPB3 is the line that controls the pull-up for the USB D+ line */
499 556
500static void __init n30_init(void) 557static void __init n30_init(void)
501{ 558{
559 WARN_ON(gpio_request(S3C2410_GPG(4), "mmc power"));
560
502 s3c24xx_fb_set_platdata(&n30_fb_info); 561 s3c24xx_fb_set_platdata(&n30_fb_info);
503 s3c24xx_udc_set_platdata(&n30_udc_cfg); 562 s3c24xx_udc_set_platdata(&n30_udc_cfg);
563 s3c24xx_mci_set_platdata(&n30_mci_cfg);
504 s3c_i2c0_set_platdata(&n30_i2ccfg); 564 s3c_i2c0_set_platdata(&n30_i2ccfg);
505 565
506 /* Turn off suspend on both USB ports, and switch the 566 /* Turn off suspend on both USB ports, and switch the
@@ -532,7 +592,7 @@ static void __init n30_init(void)
532 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | 592 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
533 S3C2410_MISCCR_USBSUSPND0 | 593 S3C2410_MISCCR_USBSUSPND0 |
534 S3C2410_MISCCR_USBSUSPND1, 594 S3C2410_MISCCR_USBSUSPND1,
535 S3C2410_MISCCR_USBSUSPND1); 595 S3C2410_MISCCR_USBSUSPND0);
536 596
537 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); 597 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices));
538 } 598 }
@@ -550,7 +610,7 @@ MACHINE_START(N30, "Acer-N30")
550 .boot_params = S3C2410_SDRAM_PA + 0x100, 610 .boot_params = S3C2410_SDRAM_PA + 0x100,
551 .timer = &s3c24xx_timer, 611 .timer = &s3c24xx_timer,
552 .init_machine = n30_init, 612 .init_machine = n30_init,
553 .init_irq = n30_init_irq, 613 .init_irq = s3c24xx_init_irq,
554 .map_io = n30_map_io, 614 .map_io = n30_map_io,
555MACHINE_END 615MACHINE_END
556 616
@@ -562,6 +622,6 @@ MACHINE_START(N35, "Acer-N35")
562 .boot_params = S3C2410_SDRAM_PA + 0x100, 622 .boot_params = S3C2410_SDRAM_PA + 0x100,
563 .timer = &s3c24xx_timer, 623 .timer = &s3c24xx_timer,
564 .init_machine = n30_init, 624 .init_machine = n30_init,
565 .init_irq = n30_init_irq, 625 .init_irq = s3c24xx_init_irq,
566 .map_io = n30_map_io, 626 .map_io = n30_map_io,
567MACHINE_END 627MACHINE_END
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 966119c8efee..725636fc4dc3 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -60,10 +60,10 @@ static void s3c2410_pm_prepare(void)
60 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); 60 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
61 } 61 }
62 62
63 /* the RX3715 uses similar code and the same H1940 and the 63 /* RX3715 and RX1950 use similar to H1940 code and the
64 * same offsets for resume and checksum pointers */ 64 * same offsets for resume and checksum pointers */
65 65
66 if (machine_is_rx3715()) { 66 if (machine_is_rx3715() || machine_is_rx1950()) {
67 void *base = phys_to_virt(H1940_SUSPEND_CHECK); 67 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
68 unsigned long ptr; 68 unsigned long ptr;
69 unsigned long calc = 0; 69 unsigned long calc = 0;
@@ -79,6 +79,17 @@ static void s3c2410_pm_prepare(void)
79 if ( machine_is_aml_m5900() ) 79 if ( machine_is_aml_m5900() )
80 s3c2410_gpio_setpin(S3C2410_GPF(2), 1); 80 s3c2410_gpio_setpin(S3C2410_GPF(2), 1);
81 81
82 if (machine_is_rx1950()) {
83 /* According to S3C2442 user's manual, page 7-17,
84 * when the system is operating in NAND boot mode,
85 * the hardware pin configuration - EINT[23:21] –
86 * must be set as input for starting up after
87 * wakeup from sleep mode
88 */
89 s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
90 s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
91 s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
92 }
82} 93}
83 94
84static int s3c2410_pm_resume(struct sys_device *dev) 95static int s3c2410_pm_resume(struct sys_device *dev)
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 43160183571a..478f4b4606c2 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -674,7 +674,7 @@ static void __init jive_machine_init(void)
674} 674}
675 675
676MACHINE_START(JIVE, "JIVE") 676MACHINE_START(JIVE, "JIVE")
677 /* Maintainer: Ben Dooks <ben@fluff.org> */ 677 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
678 .phys_io = S3C2410_PA_UART, 678 .phys_io = S3C2410_PA_UART,
679 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 679 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
680 .boot_params = S3C2410_SDRAM_PA + 0x100, 680 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index faddb36ed23b..ba93a356a839 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -150,7 +150,7 @@ static void __init smdk2413_machine_init(void)
150} 150}
151 151
152MACHINE_START(S3C2413, "S3C2413") 152MACHINE_START(S3C2413, "S3C2413")
153 /* Maintainer: Ben Dooks <ben@fluff.org> */ 153 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
154 .phys_io = S3C2410_PA_UART, 154 .phys_io = S3C2410_PA_UART,
155 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 155 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
156 .boot_params = S3C2410_SDRAM_PA + 0x100, 156 .boot_params = S3C2410_SDRAM_PA + 0x100,
@@ -163,7 +163,7 @@ MACHINE_START(S3C2413, "S3C2413")
163MACHINE_END 163MACHINE_END
164 164
165MACHINE_START(SMDK2412, "SMDK2412") 165MACHINE_START(SMDK2412, "SMDK2412")
166 /* Maintainer: Ben Dooks <ben@fluff.org> */ 166 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
167 .phys_io = S3C2410_PA_UART, 167 .phys_io = S3C2410_PA_UART,
168 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 168 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
169 .boot_params = S3C2410_SDRAM_PA + 0x100, 169 .boot_params = S3C2410_SDRAM_PA + 0x100,
@@ -176,7 +176,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
176MACHINE_END 176MACHINE_END
177 177
178MACHINE_START(SMDK2413, "SMDK2413") 178MACHINE_START(SMDK2413, "SMDK2413")
179 /* Maintainer: Ben Dooks <ben@fluff.org> */ 179 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
180 .phys_io = S3C2410_PA_UART, 180 .phys_io = S3C2410_PA_UART,
181 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 181 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
182 .boot_params = S3C2410_SDRAM_PA + 0x100, 182 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 9d102b912091..cd8e7de388f0 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -188,4 +188,17 @@ config MACH_MINI2440
188 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board 188 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
189 available via various sources. It can come with a 3.5" or 7" touch LCD. 189 available via various sources. It can come with a 3.5" or 7" touch LCD.
190 190
191config MACH_RX1950
192 bool "HP iPAQ rx1950"
193 select CPU_S3C2442
194 select S3C24XX_DCLK
195 select PM_H1940 if PM
196 select I2C
197 select S3C2410_PWM
198 select S3C_DEV_NAND
199 select S3C2410_IOTIMING if S3C2440_CPUFREQ
200 select S3C2440_XTAL_16934400
201 help
202 Say Y here if you're using HP iPAQ rx1950
203
191endmenu 204endmenu
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index c85ba32d8956..d5440fa34b04 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o 34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o 35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o 36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
37obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o
37 38
38# extra machine support 39# extra machine support
39 40
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
new file mode 100644
index 000000000000..8603b577a24b
--- /dev/null
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -0,0 +1,582 @@
1/* linux/arch/arm/mach-s3c2440/mach-rx1950.c
2 *
3 * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
4 * Copyright (c) 2007-2010 Vasily Khoruzhick
5 *
6 * based on smdk2440 written by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/delay.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/platform_device.h>
23#include <linux/serial_core.h>
24#include <linux/input.h>
25#include <linux/gpio_keys.h>
26#include <linux/sysdev.h>
27#include <linux/pwm_backlight.h>
28#include <linux/pwm.h>
29
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32
33#include <linux/mmc/host.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach-types.h>
38
39#include <mach/regs-gpio.h>
40#include <mach/regs-gpioj.h>
41#include <mach/h1940.h>
42#include <mach/fb.h>
43
44#include <plat/clock.h>
45#include <plat/regs-serial.h>
46#include <plat/regs-iic.h>
47#include <plat/mci.h>
48#include <plat/udc.h>
49#include <plat/nand.h>
50#include <plat/iic.h>
51#include <plat/devs.h>
52#include <plat/cpu.h>
53#include <plat/pm.h>
54#include <plat/irq.h>
55#include <plat/ts.h>
56
57#define LCD_PWM_PERIOD 192960
58#define LCD_PWM_DUTY 127353
59
60static struct map_desc rx1950_iodesc[] __initdata = {
61};
62
63static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
64 [0] = {
65 .name = "fclk",
66 .divisor = 0x0a,
67 .min_baud = 0,
68 .max_baud = 0,
69 },
70};
71
72static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
73 [0] = {
74 .hwport = 0,
75 .flags = 0,
76 .ucon = 0x3c5,
77 .ulcon = 0x03,
78 .ufcon = 0x51,
79 .clocks = rx1950_serial_clocks,
80 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
81 },
82 [1] = {
83 .hwport = 1,
84 .flags = 0,
85 .ucon = 0x3c5,
86 .ulcon = 0x03,
87 .ufcon = 0x51,
88 .clocks = rx1950_serial_clocks,
89 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
90 },
91 /* IR port */
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = 0x3c5,
96 .ulcon = 0x43,
97 .ufcon = 0xf1,
98 .clocks = rx1950_serial_clocks,
99 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
100 },
101};
102
103static struct s3c2410fb_display rx1950_display = {
104 .type = S3C2410_LCDCON1_TFT,
105 .width = 240,
106 .height = 320,
107 .xres = 240,
108 .yres = 320,
109 .bpp = 16,
110
111 .pixclock = 260000,
112 .left_margin = 10,
113 .right_margin = 20,
114 .hsync_len = 10,
115 .upper_margin = 2,
116 .lower_margin = 2,
117 .vsync_len = 2,
118
119 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
120 S3C2410_LCDCON5_INVVCLK |
121 S3C2410_LCDCON5_INVVLINE |
122 S3C2410_LCDCON5_INVVFRAME |
123 S3C2410_LCDCON5_HWSWP |
124 (0x02 << 13) |
125 (0x02 << 15),
126
127};
128
129static struct s3c2410fb_mach_info rx1950_lcd_cfg = {
130 .displays = &rx1950_display,
131 .num_displays = 1,
132 .default_display = 0,
133
134 .lpcsel = 0x02,
135 .gpccon = 0xaa9556a9,
136 .gpccon_mask = 0xffc003fc,
137 .gpcup = 0x0000ffff,
138 .gpcup_mask = 0xffffffff,
139
140 .gpdcon = 0xaa90aaa1,
141 .gpdcon_mask = 0xffc0fff0,
142 .gpdup = 0x0000fcfd,
143 .gpdup_mask = 0xffffffff,
144
145};
146
147static struct pwm_device *lcd_pwm;
148
149void rx1950_lcd_power(int enable)
150{
151 int i;
152 static int enabled;
153 if (enabled == enable)
154 return;
155 if (!enable) {
156
157 /* GPC11-GPC15->OUTPUT */
158 for (i = 11; i < 16; i++)
159 gpio_direction_output(S3C2410_GPC(i), 1);
160
161 /* Wait a bit here... */
162 mdelay(100);
163
164 /* GPD2-GPD7->OUTPUT */
165 /* GPD11-GPD15->OUTPUT */
166 /* GPD2-GPD7->1, GPD11-GPD15->1 */
167 for (i = 2; i < 8; i++)
168 gpio_direction_output(S3C2410_GPD(i), 1);
169 for (i = 11; i < 16; i++)
170 gpio_direction_output(S3C2410_GPD(i), 1);
171
172 /* Wait a bit here...*/
173 mdelay(100);
174
175 /* GPB0->OUTPUT, GPB0->0 */
176 gpio_direction_output(S3C2410_GPB(0), 0);
177
178 /* GPC1-GPC4->OUTPUT, GPC1-4->0 */
179 for (i = 1; i < 5; i++)
180 gpio_direction_output(S3C2410_GPC(i), 0);
181
182 /* GPC15-GPC11->0 */
183 for (i = 11; i < 16; i++)
184 gpio_direction_output(S3C2410_GPC(i), 0);
185
186 /* GPD15-GPD11->0, GPD2->GPD7->0 */
187 for (i = 11; i < 16; i++)
188 gpio_direction_output(S3C2410_GPD(i), 0);
189
190 for (i = 2; i < 8; i++)
191 gpio_direction_output(S3C2410_GPD(i), 0);
192
193 /* GPC6->0, GPC7->0, GPC5->0 */
194 gpio_direction_output(S3C2410_GPC(6), 0);
195 gpio_direction_output(S3C2410_GPC(7), 0);
196 gpio_direction_output(S3C2410_GPC(5), 0);
197
198 /* GPB1->OUTPUT, GPB1->0 */
199 gpio_direction_output(S3C2410_GPB(1), 0);
200 pwm_config(lcd_pwm, 0, LCD_PWM_PERIOD);
201 pwm_disable(lcd_pwm);
202
203 /* GPC0->0, GPC10->0 */
204 gpio_direction_output(S3C2410_GPC(0), 0);
205 gpio_direction_output(S3C2410_GPC(10), 0);
206 } else {
207 pwm_config(lcd_pwm, LCD_PWM_DUTY, LCD_PWM_PERIOD);
208 pwm_enable(lcd_pwm);
209
210 gpio_direction_output(S3C2410_GPC(0), 1);
211 gpio_direction_output(S3C2410_GPC(5), 1);
212
213 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPB1_TOUT1);
214 gpio_direction_output(S3C2410_GPC(7), 1);
215
216 for (i = 1; i < 5; i++)
217 s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
218
219 for (i = 11; i < 16; i++)
220 s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
221
222 for (i = 2; i < 8; i++)
223 s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
224
225 for (i = 11; i < 16; i++)
226 s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
227
228 gpio_direction_output(S3C2410_GPC(10), 1);
229 gpio_direction_output(S3C2410_GPC(6), 1);
230 }
231 enabled = enable;
232}
233
234static void rx1950_bl_power(int enable)
235{
236 static int enabled;
237 if (enabled == enable)
238 return;
239 if (!enable) {
240 gpio_direction_output(S3C2410_GPB(0), 0);
241 } else {
242 /* LED driver need a "push" to power on */
243 gpio_direction_output(S3C2410_GPB(0), 1);
244 /* Warm up backlight for one period of PWM.
245 * Without this trick its almost impossible to
246 * enable backlight with low brightness value
247 */
248 ndelay(48000);
249 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
250 }
251 enabled = enable;
252}
253
254static int rx1950_backlight_init(struct device *dev)
255{
256 WARN_ON(gpio_request(S3C2410_GPB(0), "Backlight"));
257 lcd_pwm = pwm_request(1, "RX1950 LCD");
258 if (IS_ERR(lcd_pwm)) {
259 dev_err(dev, "Unable to request PWM for LCD power!\n");
260 return PTR_ERR(lcd_pwm);
261 }
262
263 rx1950_lcd_power(1);
264 rx1950_bl_power(1);
265
266 return 0;
267}
268
269static void rx1950_backlight_exit(struct device *dev)
270{
271 rx1950_bl_power(0);
272 rx1950_lcd_power(0);
273
274 pwm_free(lcd_pwm);
275 gpio_free(S3C2410_GPB(0));
276}
277
278
279static int rx1950_backlight_notify(struct device *dev, int brightness)
280{
281 if (!brightness) {
282 rx1950_bl_power(0);
283 rx1950_lcd_power(0);
284 } else {
285 rx1950_lcd_power(1);
286 rx1950_bl_power(1);
287 }
288 return brightness;
289}
290
291static struct platform_pwm_backlight_data rx1950_backlight_data = {
292 .pwm_id = 0,
293 .max_brightness = 24,
294 .dft_brightness = 4,
295 .pwm_period_ns = 48000,
296 .init = rx1950_backlight_init,
297 .notify = rx1950_backlight_notify,
298 .exit = rx1950_backlight_exit,
299};
300
301static struct platform_device rx1950_backlight = {
302 .name = "pwm-backlight",
303 .dev = {
304 .parent = &s3c_device_timer[0].dev,
305 .platform_data = &rx1950_backlight_data,
306 },
307};
308
309static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd)
310{
311 switch (power_mode) {
312 case MMC_POWER_OFF:
313 gpio_direction_output(S3C2410_GPJ(1), 0);
314 break;
315 case MMC_POWER_UP:
316 case MMC_POWER_ON:
317 gpio_direction_output(S3C2410_GPJ(1), 1);
318 break;
319 default:
320 break;
321 }
322}
323
324static struct s3c24xx_mci_pdata rx1950_mmc_cfg __initdata = {
325 .gpio_detect = S3C2410_GPF(5),
326 .gpio_wprotect = S3C2410_GPH(8),
327 .set_power = rx1950_set_mmc_power,
328 .ocr_avail = MMC_VDD_32_33,
329};
330
331static struct mtd_partition rx1950_nand_part[] = {
332 [0] = {
333 .name = "Boot0",
334 .offset = 0,
335 .size = 0x4000,
336 .mask_flags = MTD_WRITEABLE,
337 },
338 [1] = {
339 .name = "Boot1",
340 .offset = MTDPART_OFS_APPEND,
341 .size = 0x40000,
342 .mask_flags = MTD_WRITEABLE,
343 },
344 [2] = {
345 .name = "Kernel",
346 .offset = MTDPART_OFS_APPEND,
347 .size = 0x300000,
348 .mask_flags = 0,
349 },
350 [3] = {
351 .name = "Filesystem",
352 .offset = MTDPART_OFS_APPEND,
353 .size = MTDPART_SIZ_FULL,
354 .mask_flags = 0,
355 },
356};
357
358static struct s3c2410_nand_set rx1950_nand_sets[] = {
359 [0] = {
360 .name = "Internal",
361 .nr_chips = 1,
362 .nr_partitions = ARRAY_SIZE(rx1950_nand_part),
363 .partitions = rx1950_nand_part,
364 },
365};
366
367static struct s3c2410_platform_nand rx1950_nand_info = {
368 .tacls = 25,
369 .twrph0 = 50,
370 .twrph1 = 15,
371 .nr_sets = ARRAY_SIZE(rx1950_nand_sets),
372 .sets = rx1950_nand_sets,
373};
374
375static void rx1950_udc_pullup(enum s3c2410_udc_cmd_e cmd)
376{
377 switch (cmd) {
378 case S3C2410_UDC_P_ENABLE:
379 gpio_direction_output(S3C2410_GPJ(5), 1);
380 break;
381 case S3C2410_UDC_P_DISABLE:
382 gpio_direction_output(S3C2410_GPJ(5), 0);
383 break;
384 case S3C2410_UDC_P_RESET:
385 break;
386 default:
387 break;
388 }
389}
390
391static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
392 .udc_command = rx1950_udc_pullup,
393 .vbus_pin = S3C2410_GPG(5),
394 .vbus_pin_inverted = 1,
395};
396
397static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = {
398 .delay = 10000,
399 .presc = 49,
400 .oversampling_shift = 3,
401};
402
403static struct gpio_keys_button rx1950_gpio_keys_table[] = {
404 {
405 .code = KEY_POWER,
406 .gpio = S3C2410_GPF(0),
407 .active_low = 1,
408 .desc = "Power button",
409 .wakeup = 1,
410 },
411 {
412 .code = KEY_F5,
413 .gpio = S3C2410_GPF(7),
414 .active_low = 1,
415 .desc = "Record button",
416 },
417 {
418 .code = KEY_F1,
419 .gpio = S3C2410_GPG(0),
420 .active_low = 1,
421 .desc = "Calendar button",
422 },
423 {
424 .code = KEY_F2,
425 .gpio = S3C2410_GPG(2),
426 .active_low = 1,
427 .desc = "Contacts button",
428 },
429 {
430 .code = KEY_F3,
431 .gpio = S3C2410_GPG(3),
432 .active_low = 1,
433 .desc = "Mail button",
434 },
435 {
436 .code = KEY_F4,
437 .gpio = S3C2410_GPG(7),
438 .active_low = 1,
439 .desc = "WLAN button",
440 },
441 {
442 .code = KEY_LEFT,
443 .gpio = S3C2410_GPG(10),
444 .active_low = 1,
445 .desc = "Left button",
446 },
447 {
448 .code = KEY_RIGHT,
449 .gpio = S3C2410_GPG(11),
450 .active_low = 1,
451 .desc = "Right button",
452 },
453 {
454 .code = KEY_UP,
455 .gpio = S3C2410_GPG(4),
456 .active_low = 1,
457 .desc = "Up button",
458 },
459 {
460 .code = KEY_DOWN,
461 .gpio = S3C2410_GPG(6),
462 .active_low = 1,
463 .desc = "Down button",
464 },
465 {
466 .code = KEY_ENTER,
467 .gpio = S3C2410_GPG(9),
468 .active_low = 1,
469 .desc = "Ok button"
470 },
471};
472
473static struct gpio_keys_platform_data rx1950_gpio_keys_data = {
474 .buttons = rx1950_gpio_keys_table,
475 .nbuttons = ARRAY_SIZE(rx1950_gpio_keys_table),
476};
477
478static struct platform_device rx1950_device_gpiokeys = {
479 .name = "gpio-keys",
480 .dev.platform_data = &rx1950_gpio_keys_data,
481};
482
483static struct s3c2410_platform_i2c rx1950_i2c_data = {
484 .flags = 0,
485 .slave_addr = 0x42,
486 .frequency = 400 * 1000,
487 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
488};
489
490static struct platform_device *rx1950_devices[] __initdata = {
491 &s3c_device_lcd,
492 &s3c_device_wdt,
493 &s3c_device_i2c0,
494 &s3c_device_iis,
495 &s3c_device_usbgadget,
496 &s3c_device_rtc,
497 &s3c_device_nand,
498 &s3c_device_sdi,
499 &s3c_device_adc,
500 &s3c_device_ts,
501 &s3c_device_timer[0],
502 &s3c_device_timer[1],
503 &rx1950_backlight,
504 &rx1950_device_gpiokeys,
505};
506
507static struct clk *rx1950_clocks[] __initdata = {
508 &s3c24xx_clkout0,
509 &s3c24xx_clkout1,
510};
511
512static void __init rx1950_map_io(void)
513{
514 s3c24xx_clkout0.parent = &clk_h;
515 s3c24xx_clkout1.parent = &clk_f;
516
517 s3c24xx_register_clocks(rx1950_clocks, ARRAY_SIZE(rx1950_clocks));
518
519 s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc));
520 s3c24xx_init_clocks(16934000);
521 s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs));
522
523 /* setup PM */
524
525#ifdef CONFIG_PM_H1940
526 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 8);
527#endif
528
529 s3c_pm_init();
530}
531
532static void __init rx1950_init_machine(void)
533{
534 int i;
535
536 s3c24xx_fb_set_platdata(&rx1950_lcd_cfg);
537 s3c24xx_udc_set_platdata(&rx1950_udc_cfg);
538 s3c24xx_ts_set_platdata(&rx1950_ts_cfg);
539 s3c24xx_mci_set_platdata(&rx1950_mmc_cfg);
540 s3c_i2c0_set_platdata(&rx1950_i2c_data);
541 s3c_nand_set_platdata(&rx1950_nand_info);
542
543 /* Turn off suspend on both USB ports, and switch the
544 * selectable USB port to USB device mode. */
545 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
546 S3C2410_MISCCR_USBSUSPND0 |
547 S3C2410_MISCCR_USBSUSPND1, 0x0);
548
549 WARN_ON(gpio_request(S3C2410_GPJ(5), "UDC pullup"));
550 gpio_direction_output(S3C2410_GPJ(5), 0);
551
552 /* mmc power is disabled by default */
553 WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power"));
554 gpio_direction_output(S3C2410_GPJ(1), 0);
555
556 for (i = 0; i < 8; i++)
557 WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
558
559 for (i = 10; i < 16; i++)
560 WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
561
562 for (i = 2; i < 8; i++)
563 WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
564
565 for (i = 11; i < 16; i++)
566 WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
567
568 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power"));
569
570 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices));
571}
572
573MACHINE_START(RX1950, "HP iPAQ RX1950")
574 /* Maintainers: Vasily Khoruzhick */
575 .phys_io = S3C2410_PA_UART,
576 .io_pg_offst = (((u32) S3C24XX_VA_UART) >> 18) & 0xfffc,
577 .boot_params = S3C2410_SDRAM_PA + 0x100,
578 .map_io = rx1950_map_io,
579 .init_irq = s3c24xx_init_irq,
580 .init_machine = rx1950_init_machine,
581 .timer = &s3c24xx_timer,
582MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 1e836e506f8b..d2946de3f365 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -209,7 +209,7 @@ static void __init rx3715_init_machine(void)
209} 209}
210 210
211MACHINE_START(RX3715, "IPAQ-RX3715") 211MACHINE_START(RX3715, "IPAQ-RX3715")
212 /* Maintainer: Ben Dooks <ben@fluff.org> */ 212 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
213 .phys_io = S3C2410_PA_UART, 213 .phys_io = S3C2410_PA_UART,
214 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 214 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
215 .boot_params = S3C2410_SDRAM_PA + 0x100, 215 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 3ac3d636d615..df83276d85ae 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -174,7 +174,7 @@ static void __init smdk2440_machine_init(void)
174} 174}
175 175
176MACHINE_START(S3C2440, "SMDK2440") 176MACHINE_START(S3C2440, "SMDK2440")
177 /* Maintainer: Ben Dooks <ben@fluff.org> */ 177 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
178 .phys_io = S3C2410_PA_UART, 178 .phys_io = S3C2410_PA_UART,
179 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 179 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
180 .boot_params = S3C2410_SDRAM_PA + 0x100, 180 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index e2e362bda9b7..4c863d3a52f4 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -131,7 +131,7 @@ static void __init smdk2443_machine_init(void)
131} 131}
132 132
133MACHINE_START(SMDK2443, "SMDK2443") 133MACHINE_START(SMDK2443, "SMDK2443")
134 /* Maintainer: Ben Dooks <ben@fluff.org> */ 134 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
135 .phys_io = S3C2410_PA_UART, 135 .phys_io = S3C2410_PA_UART,
136 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 136 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
137 .boot_params = S3C2410_SDRAM_PA + 0x100, 137 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 33ccf7bf766a..5567e037b0d1 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -414,7 +414,7 @@ err_buff:
414EXPORT_SYMBOL(s3c2410_dma_enqueue); 414EXPORT_SYMBOL(s3c2410_dma_enqueue);
415 415
416 416
417int s3c2410_dma_devconfig(int channel, 417int s3c2410_dma_devconfig(unsigned int channel,
418 enum s3c2410_dmasrc source, 418 enum s3c2410_dmasrc source,
419 unsigned long devaddr) 419 unsigned long devaddr)
420{ 420{
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index f7b18983950c..59916676d8d2 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -84,7 +84,7 @@ static void __init smdk6400_machine_init(void)
84} 84}
85 85
86MACHINE_START(SMDK6400, "SMDK6400") 86MACHINE_START(SMDK6400, "SMDK6400")
87 /* Maintainer: Ben Dooks <ben@fluff.org> */ 87 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
88 .phys_io = S3C_PA_UART & 0xfff00000, 88 .phys_io = S3C_PA_UART & 0xfff00000,
89 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, 89 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
90 .boot_params = S3C64XX_PA_SDRAM + 0x100, 90 .boot_params = S3C64XX_PA_SDRAM + 0x100,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 2d5afd221d77..9d51455feb31 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -656,7 +656,7 @@ static void __init smdk6410_machine_init(void)
656} 656}
657 657
658MACHINE_START(SMDK6410, "SMDK6410") 658MACHINE_START(SMDK6410, "SMDK6410")
659 /* Maintainer: Ben Dooks <ben@fluff.org> */ 659 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
660 .phys_io = S3C_PA_UART & 0xfff00000, 660 .phys_io = S3C_PA_UART & 0xfff00000,
661 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, 661 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
662 .boot_params = S3C64XX_PA_SDRAM + 0x100, 662 .boot_params = S3C64XX_PA_SDRAM + 0x100,
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index 1794131aeacb..ca3b3206e6f8 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -88,7 +88,7 @@ void __init s5p6440_init_irq(void)
88 s5p_init_irq(vic, ARRAY_SIZE(vic)); 88 s5p_init_irq(vic, ARRAY_SIZE(vic));
89} 89}
90 90
91static struct sysdev_class s5p6440_sysclass = { 91struct sysdev_class s5p6440_sysclass = {
92 .name = "s5p6440-core", 92 .name = "s5p6440-core",
93}; 93};
94 94
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
index c4bb7c555477..6a2a02fdf12a 100644
--- a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
@@ -1,11 +1,14 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2009 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 * 12 *
10 * S5P6440 - pwm clock and timer support 13 * S5P6440 - pwm clock and timer support
11 * 14 *
@@ -14,16 +17,19 @@
14 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
15*/ 18*/
16 19
20#ifndef __ASM_ARCH_PWMCLK_H
21#define __ASM_ARCH_PWMCLK_H __FILE__
22
17/** 23/**
18 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
19 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
20 * 26 *
21 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
22 * any of the TDIV clocks. 28 * any of the TDIV clocks.
23 */ 29 */
24static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
25{ 31{
26 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return 0;
27} 33}
28 34
29/** 35/**
@@ -35,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
35 */ 41 */
36static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
37{ 43{
38 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
39} 45}
40 46
41/** 47/**
@@ -45,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
45 */ 51 */
46static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
47{ 53{
48 return 0; 54 return 1;
49} 55}
50 56
51/** 57/**
@@ -56,7 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
56 */ 62 */
57static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
58{ 64{
59 return ilog2(div) - 1; 65 return ilog2(div);
60} 66}
61 67
62#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK 0
69
70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index bc2524df89b3..a48fb553fd01 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -95,7 +95,7 @@ void __init s5p6442_init_irq(void)
95 s5p_init_irq(vic, ARRAY_SIZE(vic)); 95 s5p_init_irq(vic, ARRAY_SIZE(vic));
96} 96}
97 97
98static struct sysdev_class s5p6442_sysclass = { 98struct sysdev_class s5p6442_sysclass = {
99 .name = "s5p6442-core", 99 .name = "s5p6442-core",
100}; 100};
101 101
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
index 15e8525da0f1..2724b37def31 100644
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2010 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5P6442 - pwm clock and timer support 13 * S5P6442 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 8ebf51c52a01..0acbdb34b560 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -12,7 +12,7 @@ obj- :=
12 12
13# Core support for S5PV210 system 13# Core support for S5PV210 system
14 14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o 15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o gpiolib.o
16 16
17# machine support 17# machine support
18 18
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 0e0f8fde2aa6..2b776eb5d150 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -100,7 +100,7 @@ void __init s5pv210_init_irq(void)
100 s5p_init_irq(vic, ARRAY_SIZE(vic)); 100 s5p_init_irq(vic, ARRAY_SIZE(vic));
101} 101}
102 102
103static struct sysdev_class s5pv210_sysclass = { 103struct sysdev_class s5pv210_sysclass = {
104 .name = "s5pv210-core", 104 .name = "s5pv210-core",
105}; 105};
106 106
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
new file mode 100644
index 000000000000..9ea8972e023d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -0,0 +1,261 @@
1/* linux/arch/arm/mach-s5pv210/gpiolib.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - GPIOlib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/gpio.h>
17#include <plat/gpio-core.h>
18#include <plat/gpio-cfg.h>
19#include <plat/gpio-cfg-helpers.h>
20#include <mach/map.h>
21
22static struct s3c_gpio_cfg gpio_cfg = {
23 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
24 .set_pull = s3c_gpio_setpull_updown,
25 .get_pull = s3c_gpio_getpull_updown,
26};
27
28static struct s3c_gpio_cfg gpio_cfg_noint = {
29 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
30 .set_pull = s3c_gpio_setpull_updown,
31 .get_pull = s3c_gpio_getpull_updown,
32};
33
34/* GPIO bank's base address given the index of the bank in the
35 * list of all gpio banks.
36 */
37#define S5PV210_BANK_BASE(bank_nr) (S5P_VA_GPIO + ((bank_nr) * 0x20))
38
39/*
40 * Following are the gpio banks in v210.
41 *
42 * The 'config' member when left to NULL, is initialized to the default
43 * structure gpio_cfg in the init function below.
44 *
45 * The 'base' member is also initialized in the init function below.
46 * Note: The initialization of 'base' member of s3c_gpio_chip structure
47 * uses the above macro and depends on the banks being listed in order here.
48 */
49static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
50 {
51 .chip = {
52 .base = S5PV210_GPA0(0),
53 .ngpio = S5PV210_GPIO_A0_NR,
54 .label = "GPA0",
55 },
56 }, {
57 .chip = {
58 .base = S5PV210_GPA1(0),
59 .ngpio = S5PV210_GPIO_A1_NR,
60 .label = "GPA1",
61 },
62 }, {
63 .chip = {
64 .base = S5PV210_GPB(0),
65 .ngpio = S5PV210_GPIO_B_NR,
66 .label = "GPB",
67 },
68 }, {
69 .chip = {
70 .base = S5PV210_GPC0(0),
71 .ngpio = S5PV210_GPIO_C0_NR,
72 .label = "GPC0",
73 },
74 }, {
75 .chip = {
76 .base = S5PV210_GPC1(0),
77 .ngpio = S5PV210_GPIO_C1_NR,
78 .label = "GPC1",
79 },
80 }, {
81 .chip = {
82 .base = S5PV210_GPD0(0),
83 .ngpio = S5PV210_GPIO_D0_NR,
84 .label = "GPD0",
85 },
86 }, {
87 .chip = {
88 .base = S5PV210_GPD1(0),
89 .ngpio = S5PV210_GPIO_D1_NR,
90 .label = "GPD1",
91 },
92 }, {
93 .chip = {
94 .base = S5PV210_GPE0(0),
95 .ngpio = S5PV210_GPIO_E0_NR,
96 .label = "GPE0",
97 },
98 }, {
99 .chip = {
100 .base = S5PV210_GPE1(0),
101 .ngpio = S5PV210_GPIO_E1_NR,
102 .label = "GPE1",
103 },
104 }, {
105 .chip = {
106 .base = S5PV210_GPF0(0),
107 .ngpio = S5PV210_GPIO_F0_NR,
108 .label = "GPF0",
109 },
110 }, {
111 .chip = {
112 .base = S5PV210_GPF1(0),
113 .ngpio = S5PV210_GPIO_F1_NR,
114 .label = "GPF1",
115 },
116 }, {
117 .chip = {
118 .base = S5PV210_GPF2(0),
119 .ngpio = S5PV210_GPIO_F2_NR,
120 .label = "GPF2",
121 },
122 }, {
123 .chip = {
124 .base = S5PV210_GPF3(0),
125 .ngpio = S5PV210_GPIO_F3_NR,
126 .label = "GPF3",
127 },
128 }, {
129 .chip = {
130 .base = S5PV210_GPG0(0),
131 .ngpio = S5PV210_GPIO_G0_NR,
132 .label = "GPG0",
133 },
134 }, {
135 .chip = {
136 .base = S5PV210_GPG1(0),
137 .ngpio = S5PV210_GPIO_G1_NR,
138 .label = "GPG1",
139 },
140 }, {
141 .chip = {
142 .base = S5PV210_GPG2(0),
143 .ngpio = S5PV210_GPIO_G2_NR,
144 .label = "GPG2",
145 },
146 }, {
147 .chip = {
148 .base = S5PV210_GPG3(0),
149 .ngpio = S5PV210_GPIO_G3_NR,
150 .label = "GPG3",
151 },
152 }, {
153 .chip = {
154 .base = S5PV210_GPI(0),
155 .ngpio = S5PV210_GPIO_I_NR,
156 .label = "GPI",
157 },
158 }, {
159 .chip = {
160 .base = S5PV210_GPJ0(0),
161 .ngpio = S5PV210_GPIO_J0_NR,
162 .label = "GPJ0",
163 },
164 }, {
165 .chip = {
166 .base = S5PV210_GPJ1(0),
167 .ngpio = S5PV210_GPIO_J1_NR,
168 .label = "GPJ1",
169 },
170 }, {
171 .chip = {
172 .base = S5PV210_GPJ2(0),
173 .ngpio = S5PV210_GPIO_J2_NR,
174 .label = "GPJ2",
175 },
176 }, {
177 .chip = {
178 .base = S5PV210_GPJ3(0),
179 .ngpio = S5PV210_GPIO_J3_NR,
180 .label = "GPJ3",
181 },
182 }, {
183 .chip = {
184 .base = S5PV210_GPJ4(0),
185 .ngpio = S5PV210_GPIO_J4_NR,
186 .label = "GPJ4",
187 },
188 }, {
189 .config = &gpio_cfg_noint,
190 .chip = {
191 .base = S5PV210_MP01(0),
192 .ngpio = S5PV210_GPIO_MP01_NR,
193 .label = "MP01",
194 },
195 }, {
196 .config = &gpio_cfg_noint,
197 .chip = {
198 .base = S5PV210_MP02(0),
199 .ngpio = S5PV210_GPIO_MP02_NR,
200 .label = "MP02",
201 },
202 }, {
203 .config = &gpio_cfg_noint,
204 .chip = {
205 .base = S5PV210_MP03(0),
206 .ngpio = S5PV210_GPIO_MP03_NR,
207 .label = "MP03",
208 },
209 }, {
210 .base = (S5P_VA_GPIO + 0xC00),
211 .config = &gpio_cfg_noint,
212 .chip = {
213 .base = S5PV210_GPH0(0),
214 .ngpio = S5PV210_GPIO_H0_NR,
215 .label = "GPH0",
216 },
217 }, {
218 .base = (S5P_VA_GPIO + 0xC20),
219 .config = &gpio_cfg_noint,
220 .chip = {
221 .base = S5PV210_GPH1(0),
222 .ngpio = S5PV210_GPIO_H1_NR,
223 .label = "GPH1",
224 },
225 }, {
226 .base = (S5P_VA_GPIO + 0xC40),
227 .config = &gpio_cfg_noint,
228 .chip = {
229 .base = S5PV210_GPH2(0),
230 .ngpio = S5PV210_GPIO_H2_NR,
231 .label = "GPH2",
232 },
233 }, {
234 .base = (S5P_VA_GPIO + 0xC60),
235 .config = &gpio_cfg_noint,
236 .chip = {
237 .base = S5PV210_GPH3(0),
238 .ngpio = S5PV210_GPIO_H3_NR,
239 .label = "GPH3",
240 },
241 },
242};
243
244static __init int s5pv210_gpiolib_init(void)
245{
246 struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
247 int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
248 int i = 0;
249
250 for (i = 0; i < nr_chips; i++, chip++) {
251 if (chip->config == NULL)
252 chip->config = &gpio_cfg;
253 if (chip->base == NULL)
254 chip->base = S5PV210_BANK_BASE(i);
255 }
256
257 samsung_gpiolib_add_4bit_chips(s5pv210_gpio_4bit, nr_chips);
258
259 return 0;
260}
261core_initcall(s5pv210_gpiolib_init);
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index 533b020e21e9..d6461ba2b71d 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -18,6 +18,8 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto MP03 are the configurable gpio banks */
22
21/* GPIO bank sizes */ 23/* GPIO bank sizes */
22#define S5PV210_GPIO_A0_NR (8) 24#define S5PV210_GPIO_A0_NR (8)
23#define S5PV210_GPIO_A1_NR (4) 25#define S5PV210_GPIO_A1_NR (4)
@@ -47,6 +49,10 @@
47#define S5PV210_GPIO_J3_NR (8) 49#define S5PV210_GPIO_J3_NR (8)
48#define S5PV210_GPIO_J4_NR (5) 50#define S5PV210_GPIO_J4_NR (5)
49 51
52#define S5PV210_GPIO_MP01_NR (8)
53#define S5PV210_GPIO_MP02_NR (4)
54#define S5PV210_GPIO_MP03_NR (8)
55
50/* GPIO bank numbers */ 56/* GPIO bank numbers */
51 57
52/* CONFIG_S3C_GPIO_SPACE allows the user to select extra 58/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
@@ -85,6 +91,9 @@ enum s5p_gpio_number {
85 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), 91 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
86 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), 92 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
87 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), 93 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
94 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
95 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
96 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
88}; 97};
89 98
90/* S5PV210 GPIO number definitions */ 99/* S5PV210 GPIO number definitions */
@@ -115,13 +124,16 @@ enum s5p_gpio_number {
115#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) 124#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
116#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) 125#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
117#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) 126#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
127#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
128#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
129#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
118 130
119/* the end of the S5PV210 specific gpios */ 131/* the end of the S5PV210 specific gpios */
120#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1) 132#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1)
121#define S3C_GPIO_END S5PV210_GPIO_END 133#define S3C_GPIO_END S5PV210_GPIO_END
122 134
123/* define the number of gpios we need to the one after the GPJ4() range */ 135/* define the number of gpios we need to the one after the MP03() range */
124#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \ 136#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \
125 CONFIG_SAMSUNG_GPIO_EXTRA + 1) 137 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
126 138
127#include <asm-generic/gpio.h> 139#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
index 69027fea987a..f8a9f1b330e0 100644
--- a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5PV210 - pwm clock and timer support 13 * S5PV210 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 241c24a1c18f..45a1bc275f0a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -869,9 +869,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
869 if (machine_is_p720t()) 869 if (machine_is_p720t())
870 res_size = 0x00014000; 870 res_size = 0x00014000;
871 871
872 /* H1940 and RX3715 need to reserve this for suspend */ 872 /* H1940, RX3715 and RX1950 need to reserve this for suspend */
873 873
874 if (machine_is_h1940() || machine_is_rx3715()) { 874 if (machine_is_h1940() || machine_is_rx3715()
875 || machine_is_rx1950()) {
875 reserve_bootmem_node(pgdat, 0x30003000, 0x1000, 876 reserve_bootmem_node(pgdat, 0x30003000, 0x1000,
876 BOOTMEM_DEFAULT); 877 BOOTMEM_DEFAULT);
877 reserve_bootmem_node(pgdat, 0x30081000, 0x1000, 878 reserve_bootmem_node(pgdat, 0x30081000, 0x1000,
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 9265f09bfa58..cd5b41d0b5a4 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/string.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -149,10 +150,14 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
149{ 150{
150 struct s3c2410fb_mach_info *npd; 151 struct s3c2410fb_mach_info *npd;
151 152
152 npd = kmalloc(sizeof(*npd), GFP_KERNEL); 153 npd = kmemdup(pd, sizeof(*npd), GFP_KERNEL);
153 if (npd) { 154 if (npd) {
154 memcpy(npd, pd, sizeof(*npd));
155 s3c_device_lcd.dev.platform_data = npd; 155 s3c_device_lcd.dev.platform_data = npd;
156 npd->displays = kmemdup(pd->displays,
157 sizeof(struct s3c2410fb_display) * npd->num_displays,
158 GFP_KERNEL);
159 if (!npd->displays)
160 printk(KERN_ERR "no memory for LCD display data\n");
156 } else { 161 } else {
157 printk(KERN_ERR "no memory for LCD platform data\n"); 162 printk(KERN_ERR "no memory for LCD platform data\n");
158 } 163 }
@@ -338,14 +343,6 @@ struct platform_device s3c_device_adc = {
338 .resource = s3c_adc_resource, 343 .resource = s3c_adc_resource,
339}; 344};
340 345
341/* HWMON */
342
343struct platform_device s3c_device_hwmon = {
344 .name = "s3c-hwmon",
345 .id = -1,
346 .dev.parent = &s3c_device_adc.dev,
347};
348
349/* SDI */ 346/* SDI */
350 347
351static struct resource s3c_sdi_resource[] = { 348static struct resource s3c_sdi_resource[] = {
@@ -371,7 +368,7 @@ struct platform_device s3c_device_sdi = {
371 368
372EXPORT_SYMBOL(s3c_device_sdi); 369EXPORT_SYMBOL(s3c_device_sdi);
373 370
374void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) 371void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
375{ 372{
376 struct s3c24xx_mci_pdata *npd; 373 struct s3c24xx_mci_pdata *npd;
377 374
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 93827b3d4e84..6ad274e7593d 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1104,7 +1104,7 @@ EXPORT_SYMBOL(s3c2410_dma_config);
1104 * devaddr: physical address of the source 1104 * devaddr: physical address of the source
1105*/ 1105*/
1106 1106
1107int s3c2410_dma_devconfig(int channel, 1107int s3c2410_dma_devconfig(unsigned int channel,
1108 enum s3c2410_dmasrc source, 1108 enum s3c2410_dmasrc source,
1109 unsigned long devaddr) 1109 unsigned long devaddr)
1110{ 1110{
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index aa96e335073b..3fef951445dc 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,6 +33,11 @@ struct clk clk_ext_xtal_mux = {
33 .id = -1, 33 .id = -1,
34}; 34};
35 35
36struct clk clk_xusbxti = {
37 .name = "xusbxti",
38 .id = -1,
39};
40
36static struct clk s5p_clk_27m = { 41static struct clk s5p_clk_27m = {
37 .name = "clk_27m", 42 .name = "clk_27m",
38 .id = -1, 43 .id = -1,
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 42e757f2e40c..9ff3d718be39 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -79,7 +79,7 @@
79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) 79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) 80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
81 81
82#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) 82#define S5P_TIMER_IRQ(x) (11 + (x))
83 83
84#define IRQ_TIMER0 S5P_TIMER_IRQ(0) 84#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
85#define IRQ_TIMER1 S5P_TIMER_IRQ(1) 85#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index 56fb8b414d41..a476a9f14697 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -23,6 +23,7 @@
23#define clk_fin_vpll clk_ext_xtal_mux 23#define clk_fin_vpll clk_ext_xtal_mux
24 24
25extern struct clk clk_ext_xtal_mux; 25extern struct clk clk_ext_xtal_mux;
26extern struct clk clk_xusbxti;
26extern struct clk clk_48m; 27extern struct clk clk_48m;
27extern struct clk clk_fout_apll; 28extern struct clk clk_fout_apll;
28extern struct clk clk_fout_mpll; 29extern struct clk clk_fout_mpll;
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65fa1b0..7a36cf85e138 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2
160 help 160 help
161 Compile in platform device definitions for HSMMC channel 2 161 Compile in platform device definitions for HSMMC channel 2
162 162
163config S3C_DEV_HWMON
164 bool
165 help
166 Compile in platform device definitions for HWMON
167
163config S3C_DEV_I2C1 168config S3C_DEV_I2C1
164 bool 169 bool
165 help 170 help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 22c89d08f6e5..0ad820acc385 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o 35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
36obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o
36obj-y += dev-i2c0.o 37obj-y += dev-i2c0.o
37obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 38obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 39obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
diff --git a/arch/arm/plat-samsung/dev-hwmon.c b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000000000000..b3ffb9587250
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,42 @@
1/* linux/arch/arm/plat-samsung/dev-hwmon.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Adapted for HWMON by Maurus Cuelenaere
8 *
9 * Samsung series device definition for HWMON
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <plat/devs.h>
20#include <plat/hwmon.h>
21
22struct platform_device s3c_device_hwmon = {
23 .name = "s3c-hwmon",
24 .id = -1,
25 .dev.parent = &s3c_device_adc.dev,
26};
27
28void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
29{
30 struct s3c_hwmon_pdata *npd;
31
32 if (!pd) {
33 printk(KERN_ERR "%s: no platform data\n", __func__);
34 return;
35 }
36
37 npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
38 if (!npd)
39 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
40
41 s3c_device_hwmon.dev.platform_data = npd;
42}
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d316b4a579f4..c54f318991b6 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -78,6 +78,9 @@ extern struct sysdev_class s3c2442_sysclass;
78extern struct sysdev_class s3c2443_sysclass; 78extern struct sysdev_class s3c2443_sysclass;
79extern struct sysdev_class s3c6410_sysclass; 79extern struct sysdev_class s3c6410_sysclass;
80extern struct sysdev_class s3c64xx_sysclass; 80extern struct sysdev_class s3c64xx_sysclass;
81extern struct sysdev_class s5p6440_sysclass;
82extern struct sysdev_class s5p6442_sysclass;
83extern struct sysdev_class s5pv210_sysclass;
81 84
82extern void (*s5pc1xx_idle)(void); 85extern void (*s5pc1xx_idle)(void);
83 86
diff --git a/arch/arm/plat-samsung/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index 7584d751ed51..2e8f8c6560d7 100644
--- a/arch/arm/plat-samsung/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -110,8 +110,8 @@ extern int s3c2410_dma_config(unsigned int channel, int xferunit);
110 * configure the device we're talking to 110 * configure the device we're talking to
111*/ 111*/
112 112
113extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, 113extern int s3c2410_dma_devconfig(unsigned int channel,
114 unsigned long devaddr); 114 enum s3c2410_dmasrc source, unsigned long devaddr);
115 115
116/* s3c2410_dma_getposition 116/* s3c2410_dma_getposition
117 * 117 *
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa31..c167e4429bc7 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,15 @@ struct s3c_hwmon_pdata {
37 struct s3c_hwmon_chcfg *in[8]; 37 struct s3c_hwmon_chcfg *in[8];
38}; 38};
39 39
40/**
41 * s3c_hwmon_set_platdata - Set platform data for S3C HWMON device
42 * @pd: Platform data to register to device.
43 *
44 * Register the given platform data for use with the S3C HWMON device.
45 * The call will copy the platform data, so the board definitions can
46 * make the structure itself __initdata.
47 */
48extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
49
40#endif /* __ASM_ARCH_ADC_HWMON_H */ 50#endif /* __ASM_ARCH_ADC_HWMON_H */
41 51
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 09:25:31 -0500