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-rw-r--r--arch/arm/mach-realview/core.c3
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h105
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb1176.h78
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h101
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h77
-rw-r--r--arch/arm/mach-realview/include/mach/board-pbx.h95
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-eb.h129
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h99
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb11mp.h122
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pba8.h98
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pbx.h115
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h10
-rw-r--r--arch/arm/oprofile/op_model_mpcore.c1
13 files changed, 572 insertions, 461 deletions
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 346cbf0cd13e..9ea9c05093cd 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -48,6 +48,9 @@
48 48
49#include <asm/hardware/gic.h> 49#include <asm/hardware/gic.h>
50 50
51#include <mach/platform.h>
52#include <mach/irqs.h>
53
51#include "core.h" 54#include "core.h"
52#include "clock.h" 55#include "clock.h"
53 56
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 268d7701fa9b..794a8d91a6a6 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -62,111 +62,6 @@
62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63#endif 63#endif
64 64
65#define IRQ_EB_GIC_START 32
66
67/*
68 * RealView EB interrupt sources
69 */
70#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
71#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
72#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
73#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
74#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
75#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
76#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
77#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
78#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
79 /* 9 reserved */
80#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
81#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
82#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
83#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
84#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
85#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
86#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
87#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
88#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
89#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
90#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
91#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
92#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
93#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
94#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
95#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
96#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
97#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
98#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
99#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
100#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
101#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
102
103/*
104 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
105 */
106#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
107#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
108#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
109#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
110#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
111#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
112#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
113#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
114#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
115#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
116#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
117#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
118#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
119#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
120#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
121#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
122
123#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
124#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
125#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
126#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
127#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
128#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
129#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
130#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
131#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
132#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
133#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
134#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
135
136#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
137#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
138#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
139
140#define IRQ_EB11MP_UART2 -1
141#define IRQ_EB11MP_UART3 -1
142#define IRQ_EB11MP_CLCD -1
143#define IRQ_EB11MP_DMA -1
144#define IRQ_EB11MP_WDOG -1
145#define IRQ_EB11MP_GPIO0 -1
146#define IRQ_EB11MP_GPIO1 -1
147#define IRQ_EB11MP_GPIO2 -1
148#define IRQ_EB11MP_SCI -1
149#define IRQ_EB11MP_SSP -1
150
151#define NR_GIC_EB11MP 2
152
153/*
154 * Only define NR_IRQS if less than NR_IRQS_EB
155 */
156#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
157
158#if defined(CONFIG_MACH_REALVIEW_EB) \
159 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
160#undef NR_IRQS
161#define NR_IRQS NR_IRQS_EB
162#endif
163
164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
166#undef MAX_GIC_NR
167#define MAX_GIC_NR NR_GIC_EB11MP
168#endif
169
170/* 65/*
171 * Core tile identification (REALVIEW_SYS_PROCID) 66 * Core tile identification (REALVIEW_SYS_PROCID)
172 */ 67 */
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h
index e4d0e8046ea5..98f8e7eeacc2 100644
--- a/arch/arm/mach-realview/include/mach/board-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/board-pb1176.h
@@ -73,82 +73,4 @@
73#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ 73#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
74#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ 74#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
75 75
76/*
77 * Irqs
78 */
79#define IRQ_DC1176_GIC_START 32
80#define IRQ_PB1176_GIC_START 64
81
82/*
83 * ARM1176 DevChip interrupt sources (primary GIC)
84 */
85#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
86#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
87#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
88#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
89#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
90#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
91#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
92#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
93#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
94#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
95#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
96#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
97#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
98#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
99#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
100#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
101
102#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
103#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
104
105/*
106 * RealView PB1176 interrupt sources (secondary GIC)
107 */
108#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
109#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
110#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
111#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
112#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
113#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
114#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
115#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
116#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
117#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
118#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
119
120#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
121
122#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
123
124#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
125#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
126#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
127#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
128
129#define IRQ_PB1176_GPIO0 -1
130#define IRQ_PB1176_SSP -1
131#define IRQ_PB1176_SCTL -1
132
133#define NR_GIC_PB1176 2
134
135/*
136 * Only define NR_IRQS if less than NR_IRQS_PB1176
137 */
138#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
139
140#if defined(CONFIG_MACH_REALVIEW_PB1176)
141
142#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
143#undef NR_IRQS
144#define NR_IRQS NR_IRQS_PB1176
145#endif
146
147#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
148#undef MAX_GIC_NR
149#define MAX_GIC_NR NR_GIC_PB1176
150#endif
151
152#endif /* CONFIG_MACH_REALVIEW_PB1176 */
153
154#endif /* __ASM_ARCH_BOARD_PB1176_H */ 76#endif /* __ASM_ARCH_BOARD_PB1176_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index 53ea0e7a1267..f0d68e0fea01 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -81,105 +81,4 @@
81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
83 83
84/*
85 * Irqs
86 */
87#define IRQ_TC11MP_GIC_START 32
88#define IRQ_PB11MP_GIC_START 64
89
90/*
91 * ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
92 */
93#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
94#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
95#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
96#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
97#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
98#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
99#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
100#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
101#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
102#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
103#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
104#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
105#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
106#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
107#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
108#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
109
110#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
111#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
112#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
113#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
114#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
115#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
116#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
117#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
118#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
119#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
120#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
121#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
122
123#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
124#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
125#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
126
127/*
128 * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
129 */
130#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
131#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
132#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
133#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
134#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
135#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
136#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
137 /* 9 reserved */
138#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
139#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
140#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
141#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
142#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
143#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
144#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
145#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
146#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
147#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
148#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
149#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
150#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
151#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
152#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
153#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
154#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
155#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
156#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
157#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
158#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
159#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
160
161#define IRQ_PB11MP_SMC -1
162#define IRQ_PB11MP_SCTL -1
163
164#define NR_GIC_PB11MP 2
165
166/*
167 * Only define NR_IRQS if less than NR_IRQS_PB11MP
168 */
169#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
170
171#if defined(CONFIG_MACH_REALVIEW_PB11MP)
172
173#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
174#undef NR_IRQS
175#define NR_IRQS NR_IRQS_PB11MP
176#endif
177
178#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
179#undef MAX_GIC_NR
180#define MAX_GIC_NR NR_GIC_PB11MP
181#endif
182
183#endif /* CONFIG_MACH_REALVIEW_PB11MP */
184
185#endif /* __ASM_ARCH_BOARD_PB11MP_H */ 84#endif /* __ASM_ARCH_BOARD_PB11MP_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
index 307f97b16e5b..4dfc67a4f45f 100644
--- a/arch/arm/mach-realview/include/mach/board-pba8.h
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -70,81 +70,4 @@
70#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */ 70#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
71#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */ 71#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
72 72
73/*
74 * Irqs
75 */
76#define IRQ_PBA8_GIC_START 32
77
78/* L220
79#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
80#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
81#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
82*/
83
84/*
85 * PB-A8 on-board gic irq sources
86 */
87#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
88#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
89#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
90#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
91#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
92#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
93#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
94#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
95#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
96 /* 9 reserved */
97#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
98#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
99#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
100#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
101#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
102#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
103#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
104#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
105#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
106#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
107#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
108#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
109#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
110#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
111#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
112#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
113#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
114#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
115#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
116#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
117#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
118#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
119
120/* ... */
121#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
122#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
123#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
124#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
125
126#define IRQ_PBA8_SMC -1
127#define IRQ_PBA8_SCTL -1
128
129#define NR_GIC_PBA8 1
130
131/*
132 * Only define NR_IRQS if less than NR_IRQS_PBA8
133 */
134#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
135
136#if defined(CONFIG_MACH_REALVIEW_PBA8)
137
138#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
139#undef NR_IRQS
140#define NR_IRQS NR_IRQS_PBA8
141#endif
142
143#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
144#undef MAX_GIC_NR
145#define MAX_GIC_NR NR_GIC_PBA8
146#endif
147
148#endif /* CONFIG_MACH_REALVIEW_PBA8 */
149
150#endif /* __ASM_ARCH_BOARD_PBA8_H */ 73#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pbx.h b/arch/arm/mach-realview/include/mach/board-pbx.h
index c26509388828..848bfff6d8f1 100644
--- a/arch/arm/mach-realview/include/mach/board-pbx.h
+++ b/arch/arm/mach-realview/include/mach/board-pbx.h
@@ -81,101 +81,6 @@
81#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */ 81#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */
82 82
83/* 83/*
84 * Irqs
85 */
86#define IRQ_PBX_GIC_START 32
87
88/* L220
89#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
90#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
91#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
92*/
93
94/*
95 * PB-X on-board gic irq sources
96 */
97#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
98#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
99#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
100#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
101#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
102#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
103#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
104#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
105#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
106 /* 9 reserved */
107#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
108#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
109#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
110#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
111#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
112#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
113#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
114#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
115#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
116#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
117#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
118#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
119#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
120#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
121#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
122#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
123#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
124#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
125#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
126#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
127#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
128#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
129
130#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
131#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
132#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
133#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
134#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
135#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
136#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
137#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
138
139#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
140#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
141#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
142/* ... */
143#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
144#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
145#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
146#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
147
148/* ... */
149#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
150#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
151#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
152#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
153
154#define IRQ_PBX_SMC -1
155#define IRQ_PBX_SCTL -1
156
157#define NR_GIC_PBX 1
158
159/*
160 * Only define NR_IRQS if less than NR_IRQS_PBX
161 */
162#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
163
164#if defined(CONFIG_MACH_REALVIEW_PBX)
165
166#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
167#undef NR_IRQS
168#define NR_IRQS NR_IRQS_PBX
169#endif
170
171#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
172#undef MAX_GIC_NR
173#define MAX_GIC_NR NR_GIC_PBX
174#endif
175
176#endif /* CONFIG_MACH_REALVIEW_PBX */
177
178/*
179 * Core tile identification (REALVIEW_SYS_PROCID) 84 * Core tile identification (REALVIEW_SYS_PROCID)
180 */ 85 */
181#define REALVIEW_PBX_PROC_MASK 0xFF000000 86#define REALVIEW_PBX_PROC_MASK 0xFF000000
diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h
new file mode 100644
index 000000000000..204d5378f309
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-eb.h
@@ -0,0 +1,129 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-eb.h
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_EB_H
22#define __MACH_IRQS_EB_H
23
24#define IRQ_EB_GIC_START 32
25
26/*
27 * RealView EB interrupt sources
28 */
29#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
30#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
31#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
32#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
33#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
34#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
35#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
36#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
37#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
38 /* 9 reserved */
39#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
40#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
41#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
42#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
43#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
44#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
45#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
46#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
47#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
48#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
49#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
50#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
51#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
52#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
53#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
54#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
55#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
56#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
57#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
58#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
59#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
60#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
61
62/*
63 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
64 */
65#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
66#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
67#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
68#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
69#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
70#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
71#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
72#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
73#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
74#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
75#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
76#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
77#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
78#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
79#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
80#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
81
82#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
83#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
84#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
85#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
86#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
87#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
88#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
89#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
90#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
91#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
92#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
93#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
94
95#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
96#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
97#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
98
99#define IRQ_EB11MP_UART2 -1
100#define IRQ_EB11MP_UART3 -1
101#define IRQ_EB11MP_CLCD -1
102#define IRQ_EB11MP_DMA -1
103#define IRQ_EB11MP_WDOG -1
104#define IRQ_EB11MP_GPIO0 -1
105#define IRQ_EB11MP_GPIO1 -1
106#define IRQ_EB11MP_GPIO2 -1
107#define IRQ_EB11MP_SCI -1
108#define IRQ_EB11MP_SSP -1
109
110#define NR_GIC_EB11MP 2
111
112/*
113 * Only define NR_IRQS if less than NR_IRQS_EB
114 */
115#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
116
117#if defined(CONFIG_MACH_REALVIEW_EB) \
118 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
119#undef NR_IRQS
120#define NR_IRQS NR_IRQS_EB
121#endif
122
123#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
124 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
125#undef MAX_GIC_NR
126#define MAX_GIC_NR NR_GIC_EB11MP
127#endif
128
129#endif /* __MACH_IRQS_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
new file mode 100644
index 000000000000..2410d4f8ddd3
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -0,0 +1,99 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pb1176.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PB1176_H
22#define __MACH_IRQS_PB1176_H
23
24#define IRQ_DC1176_GIC_START 32
25#define IRQ_PB1176_GIC_START 64
26
27/*
28 * ARM1176 DevChip interrupt sources (primary GIC)
29 */
30#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
31#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
32#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
33#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
34#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
35#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
36#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
37#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
38#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
39#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
40#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
41#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
42#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
43#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
44#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
45#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
46
47#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
48#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
49
50/*
51 * RealView PB1176 interrupt sources (secondary GIC)
52 */
53#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
54#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
55#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
56#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
57#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
58#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
59#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
60#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
61#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
62#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
63#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
64
65#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
66
67#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
68
69#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
70#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
71#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
72#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
73
74#define IRQ_PB1176_GPIO0 -1
75#define IRQ_PB1176_SSP -1
76#define IRQ_PB1176_SCTL -1
77
78#define NR_GIC_PB1176 2
79
80/*
81 * Only define NR_IRQS if less than NR_IRQS_PB1176
82 */
83#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
84
85#if defined(CONFIG_MACH_REALVIEW_PB1176)
86
87#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
88#undef NR_IRQS
89#define NR_IRQS NR_IRQS_PB1176
90#endif
91
92#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
93#undef MAX_GIC_NR
94#define MAX_GIC_NR NR_GIC_PB1176
95#endif
96
97#endif /* CONFIG_MACH_REALVIEW_PB1176 */
98
99#endif /* __MACH_IRQS_PB1176_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb11mp.h b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h
new file mode 100644
index 000000000000..34e255add21e
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h
@@ -0,0 +1,122 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pb11mp.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PB11MP_H
22#define __MACH_IRQS_PB11MP_H
23
24#define IRQ_TC11MP_GIC_START 32
25#define IRQ_PB11MP_GIC_START 64
26
27/*
28 * ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
29 */
30#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
31#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
32#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
33#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
34#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
35#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
36#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
37#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
38#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
39#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
40#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
41#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
42#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
43#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
44#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
45#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
46
47#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
48#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
49#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
50#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
51#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
52#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
53#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
54#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
55#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
56#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
57#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
58#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
59
60#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
61#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
62#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
63
64/*
65 * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
66 */
67#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
68#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
69#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
70#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
71#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
72#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
73#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
74 /* 9 reserved */
75#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
76#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
77#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
78#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
79#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
80#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
81#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
82#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
83#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
84#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
85#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
86#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
87#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
88#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
89#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
90#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
91#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
92#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
93#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
94#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
95#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
96#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
97
98#define IRQ_PB11MP_SMC -1
99#define IRQ_PB11MP_SCTL -1
100
101#define NR_GIC_PB11MP 2
102
103/*
104 * Only define NR_IRQS if less than NR_IRQS_PB11MP
105 */
106#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
107
108#if defined(CONFIG_MACH_REALVIEW_PB11MP)
109
110#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
111#undef NR_IRQS
112#define NR_IRQS NR_IRQS_PB11MP
113#endif
114
115#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
116#undef MAX_GIC_NR
117#define MAX_GIC_NR NR_GIC_PB11MP
118#endif
119
120#endif /* CONFIG_MACH_REALVIEW_PB11MP */
121
122#endif /* __MACH_IRQS_PB11MP_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pba8.h b/arch/arm/mach-realview/include/mach/irqs-pba8.h
new file mode 100644
index 000000000000..86792a9f2ab6
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pba8.h
@@ -0,0 +1,98 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PBA8_H
22#define __MACH_IRQS_PBA8_H
23
24#define IRQ_PBA8_GIC_START 32
25
26/* L220
27#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
28#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
29#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
30*/
31
32/*
33 * PB-A8 on-board gic irq sources
34 */
35#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
36#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
37#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
38#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
39#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
40#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
41#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
42#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
43#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
44 /* 9 reserved */
45#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
46#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
47#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
48#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
49#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
50#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
51#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
52#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
53#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
54#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
55#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
56#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
57#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
58#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
59#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
60#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
61#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
62#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
63#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
64#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
65#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
66#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
67
68/* ... */
69#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
70#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
71#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
72#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
73
74#define IRQ_PBA8_SMC -1
75#define IRQ_PBA8_SCTL -1
76
77#define NR_GIC_PBA8 1
78
79/*
80 * Only define NR_IRQS if less than NR_IRQS_PBA8
81 */
82#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
83
84#if defined(CONFIG_MACH_REALVIEW_PBA8)
85
86#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
87#undef NR_IRQS
88#define NR_IRQS NR_IRQS_PBA8
89#endif
90
91#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
92#undef MAX_GIC_NR
93#define MAX_GIC_NR NR_GIC_PBA8
94#endif
95
96#endif /* CONFIG_MACH_REALVIEW_PBA8 */
97
98#endif /* __MACH_IRQS_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pbx.h b/arch/arm/mach-realview/include/mach/irqs-pbx.h
new file mode 100644
index 000000000000..deaad4302b17
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pbx.h
@@ -0,0 +1,115 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pbx.h
3 *
4 * Copyright (C) 2009 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef __MACH_IRQS_PBX_H
21#define __MACH_IRQS_PBX_H
22
23#define IRQ_PBX_GIC_START 32
24
25/* L220
26#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
27#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
28#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
29*/
30
31/*
32 * PBX on-board gic irq sources
33 */
34#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
35#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
36#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
37#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
38#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
39#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
40#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
41#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
42#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
43 /* 9 reserved */
44#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
45#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
46#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
47#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
48#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
49#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
50#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
51#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
52#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
53#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
54#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
55#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
56#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
57#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
58#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
59#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
60#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
61#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
62#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
63#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
64#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
65#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
66
67#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
68#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
69#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
70#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
71#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
72#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
73#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
74#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
75
76#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
77#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
78#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
79/* ... */
80#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
81#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
82#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
83#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
84
85/* ... */
86#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
87#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
88#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
89#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
90
91#define IRQ_PBX_SMC -1
92#define IRQ_PBX_SCTL -1
93
94#define NR_GIC_PBX 1
95
96/*
97 * Only define NR_IRQS if less than NR_IRQS_PBX
98 */
99#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
100
101#if defined(CONFIG_MACH_REALVIEW_PBX)
102
103#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
104#undef NR_IRQS
105#define NR_IRQS NR_IRQS_PBX
106#endif
107
108#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
109#undef MAX_GIC_NR
110#define MAX_GIC_NR NR_GIC_PBX
111#endif
112
113#endif /* CONFIG_MACH_REALVIEW_PBX */
114
115#endif /* __MACH_IRQS_PBX_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index e9e38264671e..78854f2fa323 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -22,11 +22,11 @@
22#ifndef __ASM_ARCH_IRQS_H 22#ifndef __ASM_ARCH_IRQS_H
23#define __ASM_ARCH_IRQS_H 23#define __ASM_ARCH_IRQS_H
24 24
25#include <mach/board-eb.h> 25#include <mach/irqs-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/irqs-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/irqs-pb1176.h>
28#include <mach/board-pba8.h> 28#include <mach/irqs-pba8.h>
29#include <mach/board-pbx.h> 29#include <mach/irqs-pbx.h>
30 30
31#define IRQ_LOCALTIMER 29 31#define IRQ_LOCALTIMER 29
32#define IRQ_LOCALWDOG 30 32#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 853d42bb8682..4ce0f9801e2e 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -41,6 +41,7 @@
41#include <asm/irq.h> 41#include <asm/irq.h>
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43#include <mach/hardware.h> 43#include <mach/hardware.h>
44#include <mach/board-eb.h>
44#include <asm/system.h> 45#include <asm/system.h>
45 46
46#include "op_counter.h" 47#include "op_counter.h"
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 09:29:27 -0500