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-rw-r--r--sound/pci/Kconfig1
-rw-r--r--sound/pci/ice1712/ice1712.h9
-rw-r--r--sound/pci/ice1712/ice1724.c313
-rw-r--r--sound/pci/ice1712/juli.c471
4 files changed, 599 insertions, 195 deletions
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig
index 868183bef243..b5903eed6ef5 100644
--- a/sound/pci/Kconfig
+++ b/sound/pci/Kconfig
@@ -697,6 +697,7 @@ config SND_ICE1724
697 depends on SND 697 depends on SND
698 select SND_MPU401_UART 698 select SND_MPU401_UART
699 select SND_AC97_CODEC 699 select SND_AC97_CODEC
700 select SND_VMASTER
700 help 701 help
701 Say Y here to include support for soundcards based on 702 Say Y here to include support for soundcards based on
702 ICE/VT1724/1720 (Envy24HT/PT) chips. 703 ICE/VT1724/1720 (Envy24HT/PT) chips.
diff --git a/sound/pci/ice1712/ice1712.h b/sound/pci/ice1712/ice1712.h
index 303cffe08bd8..a3bea2247c7f 100644
--- a/sound/pci/ice1712/ice1712.h
+++ b/sound/pci/ice1712/ice1712.h
@@ -367,6 +367,15 @@ struct snd_ice1712 {
367 367
368 /* other board-specific data */ 368 /* other board-specific data */
369 void *spec; 369 void *spec;
370
371 /* VT172x specific */
372 int pro_rate_default;
373 int (*is_spdif_master)(struct snd_ice1712 *ice);
374 unsigned int (*get_rate)(struct snd_ice1712 *ice);
375 void (*set_rate)(struct snd_ice1712 *ice, unsigned int rate);
376 unsigned char (*set_mclk)(struct snd_ice1712 *ice, unsigned int rate);
377 void (*set_spdif_clock)(struct snd_ice1712 *ice);
378
370}; 379};
371 380
372 381
diff --git a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c
index 3bfd70577d7a..ceac87056263 100644
--- a/sound/pci/ice1712/ice1724.c
+++ b/sound/pci/ice1712/ice1724.c
@@ -106,15 +106,19 @@ static unsigned int PRO_RATE_DEFAULT = 44100;
106 * Basic I/O 106 * Basic I/O
107 */ 107 */
108 108
109/*
110 * default rates, default clock routines
111 */
112
109/* check whether the clock mode is spdif-in */ 113/* check whether the clock mode is spdif-in */
110static inline int is_spdif_master(struct snd_ice1712 *ice) 114static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
111{ 115{
112 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 116 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
113} 117}
114 118
115static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 119static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
116{ 120{
117 return is_spdif_master(ice) || PRO_RATE_LOCKED; 121 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
118} 122}
119 123
120/* 124/*
@@ -391,51 +395,61 @@ static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
391#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 395#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
392 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 396 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
393 397
394static int get_max_rate(struct snd_ice1712 *ice) 398static const unsigned int stdclock_rate_list[16] = {
399 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
400 22050, 11025, 88200, 176400, 0, 192000, 64000
401};
402
403static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
395{ 404{
405 unsigned int rate;
406 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
407 return rate;
408}
409
410static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
411{
412 int i;
413 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
414 if (stdclock_rate_list[i] == rate) {
415 outb(i, ICEMT1724(ice, RATE));
416 return;
417 }
418 }
419}
420
421static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
422 unsigned int rate)
423{
424 unsigned char val, old;
425 /* check MT02 */
396 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 426 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
397 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 427 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
398 return 192000; 428 if (rate > 96000)
429 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
399 else 430 else
400 return 96000; 431 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
401 } else 432 if (val != old) {
402 return 48000; 433 outb(val, ICEMT1724(ice, I2S_FORMAT));
434 /* master clock changed */
435 return 1;
436 }
437 }
438 /* no change in master clock */
439 return 0;
403} 440}
404 441
405static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 442static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
406 int force) 443 int force)
407{ 444{
408 unsigned long flags; 445 unsigned long flags;
409 unsigned char val, old; 446 unsigned char mclk_change;
410 unsigned int i, mclk_change; 447 unsigned int i, old_rate;
411 448
412 if (rate > get_max_rate(ice)) 449 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
413 return; 450 return;
414
415 switch (rate) {
416 case 8000: val = 6; break;
417 case 9600: val = 3; break;
418 case 11025: val = 10; break;
419 case 12000: val = 2; break;
420 case 16000: val = 5; break;
421 case 22050: val = 9; break;
422 case 24000: val = 1; break;
423 case 32000: val = 4; break;
424 case 44100: val = 8; break;
425 case 48000: val = 0; break;
426 case 64000: val = 15; break;
427 case 88200: val = 11; break;
428 case 96000: val = 7; break;
429 case 176400: val = 12; break;
430 case 192000: val = 14; break;
431 default:
432 snd_BUG();
433 val = 0;
434 break;
435 }
436
437 spin_lock_irqsave(&ice->reg_lock, flags); 451 spin_lock_irqsave(&ice->reg_lock, flags);
438 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 452 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
439 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 453 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
440 /* running? we cannot change the rate now... */ 454 /* running? we cannot change the rate now... */
441 spin_unlock_irqrestore(&ice->reg_lock, flags); 455 spin_unlock_irqrestore(&ice->reg_lock, flags);
@@ -446,9 +460,9 @@ static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
446 return; 460 return;
447 } 461 }
448 462
449 old = inb(ICEMT1724(ice, RATE)); 463 old_rate = ice->get_rate(ice);
450 if (force || old != val) 464 if (force || (old_rate != rate))
451 outb(val, ICEMT1724(ice, RATE)); 465 ice->set_rate(ice, rate);
452 else if (rate == ice->cur_rate) { 466 else if (rate == ice->cur_rate) {
453 spin_unlock_irqrestore(&ice->reg_lock, flags); 467 spin_unlock_irqrestore(&ice->reg_lock, flags);
454 return; 468 return;
@@ -456,19 +470,9 @@ static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
456 470
457 ice->cur_rate = rate; 471 ice->cur_rate = rate;
458 472
459 /* check MT02 */ 473 /* setting master clock */
460 mclk_change = 0; 474 mclk_change = ice->set_mclk(ice, rate);
461 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 475
462 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
463 if (rate > 96000)
464 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
465 else
466 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
467 if (val != old) {
468 outb(val, ICEMT1724(ice, I2S_FORMAT));
469 mclk_change = 1;
470 }
471 }
472 spin_unlock_irqrestore(&ice->reg_lock, flags); 476 spin_unlock_irqrestore(&ice->reg_lock, flags);
473 477
474 if (mclk_change && ice->gpio.i2s_mclk_changed) 478 if (mclk_change && ice->gpio.i2s_mclk_changed)
@@ -727,43 +731,32 @@ static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
727/* 731/*
728 * set rate constraints 732 * set rate constraints
729 */ 733 */
730static int set_rate_constraints(struct snd_ice1712 *ice, 734static void set_std_hw_rates(struct snd_ice1712 *ice)
731 struct snd_pcm_substream *substream)
732{ 735{
733 struct snd_pcm_runtime *runtime = substream->runtime;
734 if (ice->hw_rates) {
735 /* hardware specific */
736 runtime->hw.rate_min = ice->hw_rates->list[0];
737 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
738 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
739 return snd_pcm_hw_constraint_list(runtime, 0,
740 SNDRV_PCM_HW_PARAM_RATE,
741 ice->hw_rates);
742 }
743 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 736 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
744 /* I2S */ 737 /* I2S */
745 /* VT1720 doesn't support more than 96kHz */ 738 /* VT1720 doesn't support more than 96kHz */
746 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 739 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
747 return snd_pcm_hw_constraint_list(runtime, 0, 740 ice->hw_rates = &hw_constraints_rates_192;
748 SNDRV_PCM_HW_PARAM_RATE, 741 else
749 &hw_constraints_rates_192); 742 ice->hw_rates = &hw_constraints_rates_96;
750 else { 743 } else {
751 runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
752 SNDRV_PCM_RATE_8000_96000;
753 runtime->hw.rate_max = 96000;
754 return snd_pcm_hw_constraint_list(runtime, 0,
755 SNDRV_PCM_HW_PARAM_RATE,
756 &hw_constraints_rates_96);
757 }
758 } else if (ice->ac97) {
759 /* ACLINK */ 744 /* ACLINK */
760 runtime->hw.rate_max = 48000; 745 ice->hw_rates = &hw_constraints_rates_48;
761 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
762 return snd_pcm_hw_constraint_list(runtime, 0,
763 SNDRV_PCM_HW_PARAM_RATE,
764 &hw_constraints_rates_48);
765 } 746 }
766 return 0; 747}
748
749static int set_rate_constraints(struct snd_ice1712 *ice,
750 struct snd_pcm_substream *substream)
751{
752 struct snd_pcm_runtime *runtime = substream->runtime;
753
754 runtime->hw.rate_min = ice->hw_rates->list[0];
755 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
756 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
757 return snd_pcm_hw_constraint_list(runtime, 0,
758 SNDRV_PCM_HW_PARAM_RATE,
759 ice->hw_rates);
767} 760}
768 761
769/* multi-channel playback needs alignment 8x32bit regardless of the channels 762/* multi-channel playback needs alignment 8x32bit regardless of the channels
@@ -824,7 +817,7 @@ static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
824 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
825 818
826 if (PRO_RATE_RESET) 819 if (PRO_RATE_RESET)
827 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 820 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
828 ice->playback_pro_substream = NULL; 821 ice->playback_pro_substream = NULL;
829 822
830 return 0; 823 return 0;
@@ -835,7 +828,7 @@ static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
835 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 828 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
836 829
837 if (PRO_RATE_RESET) 830 if (PRO_RATE_RESET)
838 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 831 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
839 ice->capture_pro_substream = NULL; 832 ice->capture_pro_substream = NULL;
840 return 0; 833 return 0;
841} 834}
@@ -980,7 +973,7 @@ static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
980 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 973 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
981 974
982 if (PRO_RATE_RESET) 975 if (PRO_RATE_RESET)
983 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 976 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
984 ice->playback_con_substream = NULL; 977 ice->playback_con_substream = NULL;
985 if (ice->spdif.ops.close) 978 if (ice->spdif.ops.close)
986 ice->spdif.ops.close(ice, substream); 979 ice->spdif.ops.close(ice, substream);
@@ -1016,7 +1009,7 @@ static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1016 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1009 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1017 1010
1018 if (PRO_RATE_RESET) 1011 if (PRO_RATE_RESET)
1019 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1012 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1020 ice->capture_con_substream = NULL; 1013 ice->capture_con_substream = NULL;
1021 if (ice->spdif.ops.close) 1014 if (ice->spdif.ops.close)
1022 ice->spdif.ops.close(ice, substream); 1015 ice->spdif.ops.close(ice, substream);
@@ -1162,7 +1155,7 @@ static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1162 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1155 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1163 1156
1164 if (PRO_RATE_RESET) 1157 if (PRO_RATE_RESET)
1165 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1158 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1166 ice->playback_con_substream_ds[substream->number] = NULL; 1159 ice->playback_con_substream_ds[substream->number] = NULL;
1167 ice->pcm_reserved[substream->number] = NULL; 1160 ice->pcm_reserved[substream->number] = NULL;
1168 1161
@@ -1580,50 +1573,18 @@ int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1580static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1573static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1581 struct snd_ctl_elem_info *uinfo) 1574 struct snd_ctl_elem_info *uinfo)
1582{ 1575{
1583 static const char * const texts_1724[] = {
1584 "8000", /* 0: 6 */
1585 "9600", /* 1: 3 */
1586 "11025", /* 2: 10 */
1587 "12000", /* 3: 2 */
1588 "16000", /* 4: 5 */
1589 "22050", /* 5: 9 */
1590 "24000", /* 6: 1 */
1591 "32000", /* 7: 4 */
1592 "44100", /* 8: 8 */
1593 "48000", /* 9: 0 */
1594 "64000", /* 10: 15 */
1595 "88200", /* 11: 11 */
1596 "96000", /* 12: 7 */
1597 "176400", /* 13: 12 */
1598 "192000", /* 14: 14 */
1599 "IEC958 Input", /* 15: -- */
1600 };
1601 static const char * const texts_1720[] = {
1602 "8000", /* 0: 6 */
1603 "9600", /* 1: 3 */
1604 "11025", /* 2: 10 */
1605 "12000", /* 3: 2 */
1606 "16000", /* 4: 5 */
1607 "22050", /* 5: 9 */
1608 "24000", /* 6: 1 */
1609 "32000", /* 7: 4 */
1610 "44100", /* 8: 8 */
1611 "48000", /* 9: 0 */
1612 "64000", /* 10: 15 */
1613 "88200", /* 11: 11 */
1614 "96000", /* 12: 7 */
1615 "IEC958 Input", /* 13: -- */
1616 };
1617 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1576 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1618 1577
1619 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1578 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1620 uinfo->count = 1; 1579 uinfo->count = 1;
1621 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16; 1580 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1622 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1581 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1623 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1582 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1624 strcpy(uinfo->value.enumerated.name, 1583 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1625 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] : 1584 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1626 texts_1724[uinfo->value.enumerated.item]); 1585 else
1586 sprintf(uinfo->value.enumerated.name, "%d",
1587 ice->hw_rates->list[uinfo->value.enumerated.item]);
1627 return 0; 1588 return 0;
1628} 1589}
1629 1590
@@ -1631,68 +1592,79 @@ static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol) 1592 struct snd_ctl_elem_value *ucontrol)
1632{ 1593{
1633 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1594 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1634 static const unsigned char xlate[16] = { 1595 unsigned int i, rate;
1635 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1636 };
1637 unsigned char val;
1638 1596
1639 spin_lock_irq(&ice->reg_lock); 1597 spin_lock_irq(&ice->reg_lock);
1640 if (is_spdif_master(ice)) { 1598 if (ice->is_spdif_master(ice)) {
1641 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15; 1599 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1642 } else { 1600 } else {
1643 val = xlate[inb(ICEMT1724(ice, RATE)) & 15]; 1601 rate = ice->get_rate(ice);
1644 if (val == 255) { 1602 ucontrol->value.enumerated.item[0] = 0;
1645 snd_BUG(); 1603 for (i = 0; i < ice->hw_rates->count; i++) {
1646 val = 0; 1604 if (ice->hw_rates->list[i] == rate) {
1605 ucontrol->value.enumerated.item[0] = i;
1606 break;
1607 }
1647 } 1608 }
1648 ucontrol->value.enumerated.item[0] = val;
1649 } 1609 }
1650 spin_unlock_irq(&ice->reg_lock); 1610 spin_unlock_irq(&ice->reg_lock);
1651 return 0; 1611 return 0;
1652} 1612}
1653 1613
1614/* setting clock to external - SPDIF */
1615static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1616{
1617 unsigned char oval;
1618 unsigned char i2s_oval;
1619 oval = inb(ICEMT1724(ice, RATE));
1620 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1621 /* setting 256fs */
1622 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1623 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1624}
1625
1654static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1626static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1655 struct snd_ctl_elem_value *ucontrol) 1627 struct snd_ctl_elem_value *ucontrol)
1656{ 1628{
1657 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1629 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1658 unsigned char oval; 1630 unsigned int old_rate, new_rate;
1659 int rate; 1631 unsigned int item = ucontrol->value.enumerated.item[0];
1660 int change = 0; 1632 unsigned int spdif = ice->hw_rates->count;
1661 int spdif = ice->vt1720 ? 13 : 15; 1633
1634 if (item > spdif)
1635 return -EINVAL;
1662 1636
1663 spin_lock_irq(&ice->reg_lock); 1637 spin_lock_irq(&ice->reg_lock);
1664 oval = inb(ICEMT1724(ice, RATE)); 1638 if (ice->is_spdif_master(ice))
1665 if (ucontrol->value.enumerated.item[0] == spdif) { 1639 old_rate = 0;
1666 unsigned char i2s_oval; 1640 else
1667 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1641 old_rate = ice->get_rate(ice);
1668 /* setting 256fs */ 1642 if (item == spdif) {
1669 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1643 /* switching to external clock via SPDIF */
1670 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, 1644 ice->set_spdif_clock(ice);
1671 ICEMT1724(ice, I2S_FORMAT)); 1645 new_rate = 0;
1672 } else { 1646 } else {
1673 rate = rates[ucontrol->value.integer.value[0] % 15]; 1647 /* internal on-card clock */
1674 if (rate <= get_max_rate(ice)) { 1648 new_rate = ice->hw_rates->list[item];
1675 PRO_RATE_DEFAULT = rate; 1649 ice->pro_rate_default = new_rate;
1676 spin_unlock_irq(&ice->reg_lock); 1650 spin_unlock_irq(&ice->reg_lock);
1677 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1651 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1678 spin_lock_irq(&ice->reg_lock); 1652 spin_lock_irq(&ice->reg_lock);
1679 }
1680 } 1653 }
1681 change = inb(ICEMT1724(ice, RATE)) != oval;
1682 spin_unlock_irq(&ice->reg_lock); 1654 spin_unlock_irq(&ice->reg_lock);
1683 1655
1684 if ((oval & VT1724_SPDIF_MASTER) != 1656 /* the first reset to the SPDIF master mode? */
1685 (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) { 1657 if (old_rate != new_rate && !new_rate) {
1686 /* notify akm chips as well */ 1658 /* notify akm chips as well */
1687 if (is_spdif_master(ice)) { 1659 unsigned int i;
1688 unsigned int i; 1660 if (ice->gpio.set_pro_rate)
1689 for (i = 0; i < ice->akm_codecs; i++) { 1661 ice->gpio.set_pro_rate(ice, 0);
1690 if (ice->akm[i].ops.set_rate_val) 1662 for (i = 0; i < ice->akm_codecs; i++) {
1691 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1663 if (ice->akm[i].ops.set_rate_val)
1692 } 1664 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1693 } 1665 }
1694 } 1666 }
1695 return change; 1667 return old_rate != new_rate;
1696} 1668}
1697 1669
1698static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { 1670static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
@@ -2343,6 +2315,19 @@ static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2343 * was called so in ice1712 driver, and vt1724 driver is derived from 2315 * was called so in ice1712 driver, and vt1724 driver is derived from
2344 * ice1712 driver. 2316 * ice1712 driver.
2345 */ 2317 */
2318 ice->pro_rate_default = PRO_RATE_DEFAULT;
2319 if (!ice->is_spdif_master)
2320 ice->is_spdif_master = stdclock_is_spdif_master;
2321 if (!ice->get_rate)
2322 ice->get_rate = stdclock_get_rate;
2323 if (!ice->set_rate)
2324 ice->set_rate = stdclock_set_rate;
2325 if (!ice->set_mclk)
2326 ice->set_mclk = stdclock_set_mclk;
2327 if (!ice->set_spdif_clock)
2328 ice->set_spdif_clock = stdclock_set_spdif_clock;
2329 if (!ice->hw_rates)
2330 set_std_hw_rates(ice);
2346 2331
2347 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) { 2332 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2348 snd_card_free(card); 2333 snd_card_free(card);
diff --git a/sound/pci/ice1712/juli.c b/sound/pci/ice1712/juli.c
index 4550609b4d47..b4e0c16852a6 100644
--- a/sound/pci/ice1712/juli.c
+++ b/sound/pci/ice1712/juli.c
@@ -4,6 +4,8 @@
4 * Lowlevel functions for ESI Juli@ cards 4 * Lowlevel functions for ESI Juli@ cards
5 * 5 *
6 * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz> 6 * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
7 * 2008 Pavel Hofman <dustin@seznam.cz>
8 *
7 * 9 *
8 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
@@ -27,11 +29,11 @@
27#include <linux/init.h> 29#include <linux/init.h>
28#include <linux/slab.h> 30#include <linux/slab.h>
29#include <sound/core.h> 31#include <sound/core.h>
32#include <sound/tlv.h>
30 33
31#include "ice1712.h" 34#include "ice1712.h"
32#include "envy24ht.h" 35#include "envy24ht.h"
33#include "juli.h" 36#include "juli.h"
34
35struct juli_spec { 37struct juli_spec {
36 struct ak4114 *ak4114; 38 struct ak4114 *ak4114;
37 unsigned int analog: 1; 39 unsigned int analog: 1;
@@ -44,6 +46,32 @@ struct juli_spec {
44#define AK4358_ADDR 0x22 /* DAC */ 46#define AK4358_ADDR 0x22 /* DAC */
45 47
46/* 48/*
49 * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
50 * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
51 * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
52 *
53 * The clock circuitry is supplied by the two ice1724 crystals. This
54 * arrangement allows to generate independent clock signal for AK4114's input
55 * rate detection circuit. As a result, Juli, unlike most other
56 * ice1724+ak4114-based cards, detects spdif input rate correctly.
57 * This fact is applied in the driver, allowing to modify PCM stream rate
58 * parameter according to the actual input rate.
59 *
60 * Juli uses the remaining three stereo-channels of its DAC to optionally
61 * monitor analog input, digital input, and digital output. The corresponding
62 * I2S signals are routed by Xilinx, controlled by GPIOs.
63 *
64 * The master mute is implemented using output muting transistors (GPIO) in
65 * combination with smuting the DAC.
66 *
67 * The card itself has no HW master volume control, implemented using the
68 * vmaster control.
69 *
70 * TODO:
71 * researching and fixing the input monitors
72 */
73
74/*
47 * GPIO pins 75 * GPIO pins
48 */ 76 */
49#define GPIO_FREQ_MASK (3<<0) 77#define GPIO_FREQ_MASK (3<<0)
@@ -55,17 +83,82 @@ struct juli_spec {
55#define GPIO_MULTI_2X (1<<2) 83#define GPIO_MULTI_2X (1<<2)
56#define GPIO_MULTI_1X (2<<2) /* also external */ 84#define GPIO_MULTI_1X (2<<2) /* also external */
57#define GPIO_MULTI_HALF (3<<2) 85#define GPIO_MULTI_HALF (3<<2)
58#define GPIO_INTERNAL_CLOCK (1<<4) 86#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
87#define GPIO_CLOCK_MASK (1<<4)
59#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */ 88#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
60#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */ 89#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
61#define GPIO_AK5385A_CKS0 (1<<8) 90#define GPIO_AK5385A_CKS0 (1<<8)
62#define GPIO_AK5385A_DFS0 (1<<9) /* swapped with DFS1 according doc? */ 91#define GPIO_AK5385A_DFS1 (1<<9)
63#define GPIO_AK5385A_DFS1 (1<<10) 92#define GPIO_AK5385A_DFS0 (1<<10)
64#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */ 93#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
65#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */ 94#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
66#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */ 95#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
67#define GPIO_AK5385A_MCLK (1<<14) /* must be 0 */ 96#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
68#define GPIO_MUTE_CONTROL (1<<15) /* 0 = off, 1 = on */ 97#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
98
99#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
100 GPIO_CLOCK_MASK)
101#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
102 GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
103
104#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
105 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
106 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
107 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
108 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
109
110#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
111 GPIO_INTERNAL_CLOCK)
112#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
113 GPIO_INTERNAL_CLOCK)
114#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
115 GPIO_INTERNAL_CLOCK)
116#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
117 GPIO_INTERNAL_CLOCK)
118#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
119 GPIO_INTERNAL_CLOCK)
120#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
121 GPIO_INTERNAL_CLOCK)
122#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
123 GPIO_INTERNAL_CLOCK)
124#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
125 GPIO_INTERNAL_CLOCK)
126#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
127 GPIO_INTERNAL_CLOCK)
128#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
129 GPIO_INTERNAL_CLOCK)
130#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
131 GPIO_INTERNAL_CLOCK)
132
133/*
134 * Initial setup of the conversion array GPIO <-> rate
135 */
136static unsigned int juli_rates[] = {
137 16000, 22050, 24000, 32000,
138 44100, 48000, 64000, 88200,
139 96000, 176400, 192000,
140};
141
142static unsigned int gpio_vals[] = {
143 GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
144 GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
145 GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
146};
147
148static struct snd_pcm_hw_constraint_list juli_rates_info = {
149 .count = ARRAY_SIZE(juli_rates),
150 .list = juli_rates,
151 .mask = 0,
152};
153
154static int get_gpio_val(int rate)
155{
156 int i;
157 for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
158 if (juli_rates[i] == rate)
159 return gpio_vals[i];
160 return 0;
161}
69 162
70static void juli_ak4114_write(void *private_data, unsigned char reg, unsigned char val) 163static void juli_ak4114_write(void *private_data, unsigned char reg, unsigned char val)
71{ 164{
@@ -77,6 +170,10 @@ static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
77 return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, reg); 170 return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, reg);
78} 171}
79 172
173/*
174 * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
175 * to the external rate
176 */
80static void juli_spdif_in_open(struct snd_ice1712 *ice, 177static void juli_spdif_in_open(struct snd_ice1712 *ice,
81 struct snd_pcm_substream *substream) 178 struct snd_pcm_substream *substream)
82{ 179{
@@ -84,7 +181,8 @@ static void juli_spdif_in_open(struct snd_ice1712 *ice,
84 struct snd_pcm_runtime *runtime = substream->runtime; 181 struct snd_pcm_runtime *runtime = substream->runtime;
85 int rate; 182 int rate;
86 183
87 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 184 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
185 !ice->is_spdif_master(ice))
88 return; 186 return;
89 rate = snd_ak4114_external_rate(spec->ak4114); 187 rate = snd_ak4114_external_rate(spec->ak4114);
90 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) { 188 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
@@ -115,57 +213,285 @@ static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
115} 213}
116 214
117/* 215/*
118 * change the rate of envy24HT, AK4358 216 * change the rate of envy24HT, AK4358, AK5385
119 */ 217 */
120static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 218static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
121{ 219{
122 unsigned char old, tmp, dfs; 220 unsigned char old, tmp, ak4358_dfs;
221 unsigned int ak5385_pins, old_gpio, new_gpio;
222 struct snd_ice1712 *ice = ak->private_data[0];
223 struct juli_spec *spec = ice->spec;
123 224
124 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 225 if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
226 input rate undetected, simply return */
125 return; 227 return;
126 228
127 /* adjust DFS on codecs */ 229 /* adjust DFS on codecs */
128 if (rate > 96000) 230 if (rate > 96000) {
129 dfs = 2; 231 ak4358_dfs = 2;
130 else if (rate > 48000) 232 ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
131 dfs = 1; 233 } else if (rate > 48000) {
132 else 234 ak4358_dfs = 1;
133 dfs = 0; 235 ak5385_pins = GPIO_AK5385A_DFS0;
134 236 } else {
237 ak4358_dfs = 0;
238 ak5385_pins = 0;
239 }
240 /* AK5385 first, since it requires cold reset affecting both codecs */
241 old_gpio = ice->gpio.get_data(ice);
242 new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
243 /* printk(KERN_DEBUG "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
244 new_gpio); */
245 ice->gpio.set_data(ice, new_gpio);
246
247 /* cold reset */
248 old = inb(ICEMT1724(ice, AC97_CMD));
249 outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
250 udelay(1);
251 outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
252
253 /* AK4358 */
254 /* set new value, reset DFS */
135 tmp = snd_akm4xxx_get(ak, 0, 2); 255 tmp = snd_akm4xxx_get(ak, 0, 2);
136 old = (tmp >> 4) & 0x03;
137 if (old == dfs)
138 return;
139 /* reset DFS */
140 snd_akm4xxx_reset(ak, 1); 256 snd_akm4xxx_reset(ak, 1);
141 tmp = snd_akm4xxx_get(ak, 0, 2); 257 tmp = snd_akm4xxx_get(ak, 0, 2);
142 tmp &= ~(0x03 << 4); 258 tmp &= ~(0x03 << 4);
143 tmp |= dfs << 4; 259 tmp |= ak4358_dfs << 4;
144 snd_akm4xxx_set(ak, 0, 2, tmp); 260 snd_akm4xxx_set(ak, 0, 2, tmp);
145 snd_akm4xxx_reset(ak, 0); 261 snd_akm4xxx_reset(ak, 0);
262
263 /* reinit ak4114 */
264 snd_ak4114_reinit(spec->ak4114);
146} 265}
147 266
267#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
268#define PCM_VOLUME "PCM Playback Volume"
269#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
270#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
271#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
272
273static const struct snd_akm4xxx_dac_channel juli_dac[] = {
274 AK_DAC(PCM_VOLUME, 2),
275 AK_DAC(MONITOR_AN_IN_VOLUME, 2),
276 AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
277 AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
278};
279
280
148static struct snd_akm4xxx akm_juli_dac __devinitdata = { 281static struct snd_akm4xxx akm_juli_dac __devinitdata = {
149 .type = SND_AK4358, 282 .type = SND_AK4358,
150 .num_dacs = 2, 283 .num_dacs = 8, /* DAC1 - analog out
284 DAC2 - analog in monitor
285 DAC3 - digital out monitor
286 DAC4 - digital in monitor
287 */
151 .ops = { 288 .ops = {
152 .lock = juli_akm_lock, 289 .lock = juli_akm_lock,
153 .unlock = juli_akm_unlock, 290 .unlock = juli_akm_unlock,
154 .write = juli_akm_write, 291 .write = juli_akm_write,
155 .set_rate_val = juli_akm_set_rate_val 292 .set_rate_val = juli_akm_set_rate_val
293 },
294 .dac_info = juli_dac,
295};
296
297#define juli_mute_info snd_ctl_boolean_mono_info
298
299static int juli_mute_get(struct snd_kcontrol *kcontrol,
300 struct snd_ctl_elem_value *ucontrol)
301{
302 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
303 unsigned int val;
304 val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
305 if (kcontrol->private_value == GPIO_MUTE_CONTROL)
306 /* val 0 = signal on */
307 ucontrol->value.integer.value[0] = (val) ? 0 : 1;
308 else
309 /* val 1 = signal on */
310 ucontrol->value.integer.value[0] = (val) ? 1 : 0;
311 return 0;
312}
313
314static int juli_mute_put(struct snd_kcontrol *kcontrol,
315 struct snd_ctl_elem_value *ucontrol)
316{
317 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
318 unsigned int old_gpio, new_gpio;
319 old_gpio = ice->gpio.get_data(ice);
320 if (ucontrol->value.integer.value[0]) {
321 /* unmute */
322 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
323 /* 0 = signal on */
324 new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
325 /* un-smuting DAC */
326 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
327 } else
328 /* 1 = signal on */
329 new_gpio = old_gpio |
330 (unsigned int) kcontrol->private_value;
331 } else {
332 /* mute */
333 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
334 /* 1 = signal off */
335 new_gpio = old_gpio | GPIO_MUTE_CONTROL;
336 /* smuting DAC */
337 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
338 } else
339 /* 0 = signal off */
340 new_gpio = old_gpio &
341 ~((unsigned int) kcontrol->private_value);
342 }
343 /* printk("JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, \
344 new_gpio 0x%x\n",
345 (unsigned int)ucontrol->value.integer.value[0], old_gpio,
346 new_gpio); */
347 if (old_gpio != new_gpio) {
348 ice->gpio.set_data(ice, new_gpio);
349 return 1;
350 }
351 /* no change */
352 return 0;
353}
354
355static struct snd_kcontrol_new juli_mute_controls[] __devinitdata = {
356 {
357 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
358 .name = "Master Playback Switch",
359 .info = juli_mute_info,
360 .get = juli_mute_get,
361 .put = juli_mute_put,
362 .private_value = GPIO_MUTE_CONTROL,
363 },
364 /* Although the following functionality respects the succint NDA'd
365 * documentation from the card manufacturer, and the same way of
366 * operation is coded in OSS Juli driver, only Digital Out monitor
367 * seems to work. Surprisingly, Analog input monitor outputs Digital
368 * output data. The two are independent, as enabling both doubles
369 * volume of the monitor sound.
370 *
371 * Checking traces on the board suggests the functionality described
372 * by the manufacturer is correct - I2S from ADC and AK4114
373 * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
374 * inputs) are fed from Xilinx.
375 *
376 * I even checked traces on board and coded a support in driver for
377 * an alternative possiblity - the unused I2S ICE output channels
378 * switched to HW-IN/SPDIF-IN and providing the monitoring signal to
379 * the DAC - to no avail. The I2S outputs seem to be unconnected.
380 *
381 * The windows driver supports the monitoring correctly.
382 */
383 {
384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
385 .name = "Monitor Analog In Switch",
386 .info = juli_mute_info,
387 .get = juli_mute_get,
388 .put = juli_mute_put,
389 .private_value = GPIO_ANAIN_MONITOR,
390 },
391 {
392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
393 .name = "Monitor Digital Out Switch",
394 .info = juli_mute_info,
395 .get = juli_mute_get,
396 .put = juli_mute_put,
397 .private_value = GPIO_DIGOUT_MONITOR,
398 },
399 {
400 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
401 .name = "Monitor Digital In Switch",
402 .info = juli_mute_info,
403 .get = juli_mute_get,
404 .put = juli_mute_put,
405 .private_value = GPIO_DIGIN_MONITOR,
406 },
407};
408
409
410static void ak4358_proc_regs_read(struct snd_info_entry *entry,
411 struct snd_info_buffer *buffer)
412{
413 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
414 int reg, val;
415 for (reg = 0; reg <= 0xf; reg++) {
416 val = snd_akm4xxx_get(ice->akm, 0, reg);
417 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
156 } 418 }
419}
420
421static void ak4358_proc_init(struct snd_ice1712 *ice)
422{
423 struct snd_info_entry *entry;
424 if (!snd_card_proc_new(ice->card, "ak4358_codec", &entry))
425 snd_info_set_text_ops(entry, ice, ak4358_proc_regs_read);
426}
427
428static char *slave_vols[] __devinitdata = {
429 PCM_VOLUME,
430 MONITOR_AN_IN_VOLUME,
431 MONITOR_DIG_IN_VOLUME,
432 MONITOR_DIG_OUT_VOLUME,
433 NULL
157}; 434};
158 435
436static __devinitdata
437DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
438
439static struct snd_kcontrol __devinit *ctl_find(struct snd_card *card,
440 const char *name)
441{
442 struct snd_ctl_elem_id sid;
443 memset(&sid, 0, sizeof(sid));
444 /* FIXME: strcpy is bad. */
445 strcpy(sid.name, name);
446 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
447 return snd_ctl_find_id(card, &sid);
448}
449
450static void __devinit add_slaves(struct snd_card *card,
451 struct snd_kcontrol *master, char **list)
452{
453 for (; *list; list++) {
454 struct snd_kcontrol *slave = ctl_find(card, *list);
455 /* printk(KERN_DEBUG "add_slaves - %s\n", *list); */
456 if (slave) {
457 /* printk(KERN_DEBUG "slave %s found\n", *list); */
458 snd_ctl_add_slave(master, slave);
459 }
460 }
461}
462
159static int __devinit juli_add_controls(struct snd_ice1712 *ice) 463static int __devinit juli_add_controls(struct snd_ice1712 *ice)
160{ 464{
161 struct juli_spec *spec = ice->spec; 465 struct juli_spec *spec = ice->spec;
162 int err; 466 int err;
467 unsigned int i;
468 struct snd_kcontrol *vmaster;
469
163 err = snd_ice1712_akm4xxx_build_controls(ice); 470 err = snd_ice1712_akm4xxx_build_controls(ice);
164 if (err < 0) 471 if (err < 0)
165 return err; 472 return err;
473
474 for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
475 err = snd_ctl_add(ice->card,
476 snd_ctl_new1(&juli_mute_controls[i], ice));
477 if (err < 0)
478 return err;
479 }
480 /* Create virtual master control */
481 vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
482 juli_master_db_scale);
483 if (!vmaster)
484 return -ENOMEM;
485 add_slaves(ice->card, vmaster, slave_vols);
486 err = snd_ctl_add(ice->card, vmaster);
487 if (err < 0)
488 return err;
489
166 /* only capture SPDIF over AK4114 */ 490 /* only capture SPDIF over AK4114 */
167 err = snd_ak4114_build(spec->ak4114, NULL, 491 err = snd_ak4114_build(spec->ak4114, NULL,
168 ice->pcm_pro->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 492 ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
493
494 ak4358_proc_init(ice);
169 if (err < 0) 495 if (err < 0)
170 return err; 496 return err;
171 return 0; 497 return 0;
@@ -174,6 +500,74 @@ static int __devinit juli_add_controls(struct snd_ice1712 *ice)
174/* 500/*
175 * initialize the chip 501 * initialize the chip
176 */ 502 */
503
504static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
505{
506 return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
507}
508
509static unsigned int juli_get_rate(struct snd_ice1712 *ice)
510{
511 int i;
512 unsigned char result;
513
514 result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
515 for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
516 if (gpio_vals[i] == result)
517 return juli_rates[i];
518 return 0;
519}
520
521/* setting new rate */
522static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
523{
524 unsigned int old, new;
525 unsigned char val;
526
527 old = ice->gpio.get_data(ice);
528 new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
529 /* printk(KERN_DEBUG "JULI - set_rate: old %x, new %x\n",
530 old & GPIO_RATE_MASK,
531 new & GPIO_RATE_MASK); */
532
533 ice->gpio.set_data(ice, new);
534 /* switching to external clock - supplied by external circuits */
535 val = inb(ICEMT1724(ice, RATE));
536 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
537}
538
539static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
540 unsigned int rate)
541{
542 /* no change in master clock */
543 return 0;
544}
545
546/* setting clock to external - SPDIF */
547static void juli_set_spdif_clock(struct snd_ice1712 *ice)
548{
549 unsigned int old;
550 old = ice->gpio.get_data(ice);
551 /* external clock (= 0), multiply 1x, 48kHz */
552 ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
553 GPIO_FREQ_48KHZ);
554}
555
556/* Called when ak4114 detects change in the input SPDIF stream */
557static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
558 unsigned char c1)
559{
560 struct snd_ice1712 *ice = ak4114->change_callback_private;
561 int rate;
562 if (ice->is_spdif_master(ice) && c1) {
563 /* only for SPDIF master mode, rate was changed */
564 rate = snd_ak4114_external_rate(ak4114);
565 /* printk(KERN_DEBUG "ak4114 - input rate changed to %d\n",
566 rate); */
567 juli_akm_set_rate_val(ice->akm, rate);
568 }
569}
570
177static int __devinit juli_init(struct snd_ice1712 *ice) 571static int __devinit juli_init(struct snd_ice1712 *ice)
178{ 572{
179 static const unsigned char ak4114_init_vals[] = { 573 static const unsigned char ak4114_init_vals[] = {
@@ -203,6 +597,11 @@ static int __devinit juli_init(struct snd_ice1712 *ice)
203 ice, &spec->ak4114); 597 ice, &spec->ak4114);
204 if (err < 0) 598 if (err < 0)
205 return err; 599 return err;
600 /* callback for codecs rate setting */
601 spec->ak4114->change_callback = juli_ak4114_change;
602 spec->ak4114->change_callback_private = ice;
603 /* AK4114 in Juli can detect external rate correctly */
604 spec->ak4114->check_flags = 0;
206 605
207#if 0 606#if 0
208 /* it seems that the analog doughter board detection does not work 607 /* it seems that the analog doughter board detection does not work
@@ -226,6 +625,14 @@ static int __devinit juli_init(struct snd_ice1712 *ice)
226 return err; 625 return err;
227 } 626 }
228 627
628 /* juli is clocked by Xilinx array */
629 ice->hw_rates = &juli_rates_info;
630 ice->is_spdif_master = juli_is_spdif_master;
631 ice->get_rate = juli_get_rate;
632 ice->set_rate = juli_set_rate;
633 ice->set_mclk = juli_set_mclk;
634 ice->set_spdif_clock = juli_set_spdif_clock;
635
229 ice->spdif.ops.open = juli_spdif_in_open; 636 ice->spdif.ops.open = juli_spdif_in_open;
230 return 0; 637 return 0;
231} 638}
@@ -237,18 +644,20 @@ static int __devinit juli_init(struct snd_ice1712 *ice)
237 */ 644 */
238 645
239static unsigned char juli_eeprom[] __devinitdata = { 646static unsigned char juli_eeprom[] __devinitdata = {
240 [ICE_EEP2_SYSCONF] = 0x20, /* clock 512, mpu401, 1xADC, 1xDACs */ 647 [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
648 SPDIF in */
241 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 649 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
242 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */ 650 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
243 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */ 651 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
244 [ICE_EEP2_GPIO_DIR] = 0x9f, 652 [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
245 [ICE_EEP2_GPIO_DIR1] = 0xff, 653 [ICE_EEP2_GPIO_DIR1] = 0xff,
246 [ICE_EEP2_GPIO_DIR2] = 0x7f, 654 [ICE_EEP2_GPIO_DIR2] = 0x7f,
247 [ICE_EEP2_GPIO_MASK] = 0x9f, 655 [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
248 [ICE_EEP2_GPIO_MASK1] = 0xff, 656 [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
249 [ICE_EEP2_GPIO_MASK2] = 0x7f, 657 [ICE_EEP2_GPIO_MASK2] = 0x7f,
250 [ICE_EEP2_GPIO_STATE] = 0x16, /* internal clock, multiple 1x, 48kHz */ 658 [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
251 [ICE_EEP2_GPIO_STATE1] = 0x80, /* mute */ 659 GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
660 [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
252 [ICE_EEP2_GPIO_STATE2] = 0x00, 661 [ICE_EEP2_GPIO_STATE2] = 0x00,
253}; 662};
254 663
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 20:37:38 -0500