diff options
-rw-r--r-- | drivers/net/e1000e/82571.c | 12 | ||||
-rw-r--r-- | drivers/net/e1000e/defines.h | 1 |
2 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index 0890162953e9..25f6bc94e69b 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -980,6 +980,18 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
980 | reg |= E1000_PBA_ECC_CORR_EN; | 980 | reg |= E1000_PBA_ECC_CORR_EN; |
981 | ew32(PBA_ECC, reg); | 981 | ew32(PBA_ECC, reg); |
982 | } | 982 | } |
983 | /* | ||
984 | * Workaround for hardware errata. | ||
985 | * Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572 | ||
986 | */ | ||
987 | |||
988 | if ((hw->mac.type == e1000_82571) || | ||
989 | (hw->mac.type == e1000_82572)) { | ||
990 | reg = er32(CTRL_EXT); | ||
991 | reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN; | ||
992 | ew32(CTRL_EXT, reg); | ||
993 | } | ||
994 | |||
983 | 995 | ||
984 | /* PCI-Ex Control Registers */ | 996 | /* PCI-Ex Control Registers */ |
985 | if (hw->mac.type == e1000_82574) { | 997 | if (hw->mac.type == e1000_82574) { |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index e6caf29d4252..243aa499fe90 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -69,6 +69,7 @@ | |||
69 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ | 69 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ |
70 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ | 70 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ |
71 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ | 71 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ |
72 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ | ||
72 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 73 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
73 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 | 74 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 |
74 | #define E1000_CTRL_EXT_EIAME 0x01000000 | 75 | #define E1000_CTRL_EXT_EIAME 0x01000000 |