aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/mach-s3c64xx/clock.c50
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/s3c6400.h3
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c5
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h1
5 files changed, 23 insertions, 40 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 9b587e267422..7f5e1aa99ce1 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -748,19 +748,29 @@ static struct clk *clks1[] __initdata = {
748 &clk_arm, 748 &clk_arm,
749}; 749};
750 750
751static struct clk *clks[] __initdata = {
752 &clk_ext,
753 &clk_epll,
754 &clk_27m,
755 &clk_48m,
756 &clk_h2,
757};
758
751/** 759/**
752 * s3c6400_register_clocks - register clocks for s3c6400 and above 760 * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
753 * @armclk_divlimit: Divisor mask for ARMCLK 761 * @xtal: The rate for the clock crystal feeding the PLLs.
762 * @armclk_divlimit: Divisor mask for ARMCLK.
754 * 763 *
755 * Register the clocks for the S3C6400 and above SoC range, such 764 * Register the clocks for the S3C6400 and S3C6410 SoC range, such
756 * as ARMCLK and the clocks which have divider chains attached. 765 * as ARMCLK as well as the necessary parent clocks.
757 * 766 *
758 * This call does not setup the clocks, which is left to the 767 * This call does not setup the clocks, which is left to the
759 * s3c6400_setup_clocks() call which may be needed by the cpufreq 768 * s3c6400_setup_clocks() call which may be needed by the cpufreq
760 * or resume code to re-set the clocks if the bootloader has changed 769 * or resume code to re-set the clocks if the bootloader has changed
761 * them. 770 * them.
762 */ 771 */
763void __init s3c6400_register_clocks(unsigned armclk_divlimit) 772void __init s3c64xx_register_clocks(unsigned long xtal,
773 unsigned armclk_divlimit)
764{ 774{
765 struct clk *clkp; 775 struct clk *clkp;
766 int ret; 776 int ret;
@@ -768,33 +778,9 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit)
768 778
769 armclk_mask = armclk_divlimit; 779 armclk_mask = armclk_divlimit;
770 780
771 for (ptr = 0; ptr < ARRAY_SIZE(clks1); ptr++) { 781 s3c24xx_register_baseclocks(xtal);
772 clkp = clks1[ptr];
773 ret = s3c24xx_register_clock(clkp);
774 if (ret < 0) {
775 printk(KERN_ERR "Failed to register clock %s (%d)\n",
776 clkp->name, ret);
777 }
778 }
779
780 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
781}
782
783static struct clk *clks[] __initdata = {
784 &clk_ext,
785 &clk_epll,
786 &clk_27m,
787 &clk_48m,
788 &clk_h2,
789};
790
791void __init s3c64xx_register_clocks(void)
792{
793 struct clk *clkp;
794 int ret;
795 int ptr;
796
797 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); 782 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
783
798 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 784 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
799 785
800 clkp = init_clocks_disable; 786 clkp = init_clocks_disable;
@@ -809,5 +795,7 @@ void __init s3c64xx_register_clocks(void)
809 (clkp->enable)(clkp, 0); 795 (clkp->enable)(clkp, 0);
810 } 796 }
811 797
798 s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
799 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
812 s3c_pwmclk_init(); 800 s3c_pwmclk_init();
813} 801}
diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
index 2bc7c07a928f..f86958d05352 100644
--- a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
@@ -15,9 +15,10 @@
15/* Common init code for S3C6400 related SoCs */ 15/* Common init code for S3C6400 related SoCs */
16 16
17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); 17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18extern void s3c6400_register_clocks(unsigned armclk_divlimit);
19extern void s3c6400_setup_clocks(void); 18extern void s3c6400_setup_clocks(void);
20 19
20extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
21
21#ifdef CONFIG_CPU_S3C6400 22#ifdef CONFIG_CPU_S3C6400
22 23
23extern int s3c6400_init(void); 24extern int s3c6400_init(void);
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 720d0d1f3bfc..707e34e3afd1 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -55,10 +55,7 @@ void __init s3c6400_map_io(void)
55 55
56void __init s3c6400_init_clocks(int xtal) 56void __init s3c6400_init_clocks(int xtal)
57{ 57{
58 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 58 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
59 s3c24xx_register_baseclocks(xtal);
60 s3c64xx_register_clocks();
61 s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
62 s3c6400_setup_clocks(); 59 s3c6400_setup_clocks();
63} 60}
64 61
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index fd457cc3ab87..59635d19466a 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -58,9 +58,7 @@ void __init s3c6410_map_io(void)
58void __init s3c6410_init_clocks(int xtal) 58void __init s3c6410_init_clocks(int xtal)
59{ 59{
60 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 60 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
61 s3c24xx_register_baseclocks(xtal); 61 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
62 s3c64xx_register_clocks();
63 s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK);
64 s3c6400_setup_clocks(); 62 s3c6400_setup_clocks();
65} 63}
66 64
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index ba9a1cdd3a28..60b62692ac7a 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -94,7 +94,6 @@ extern void s3c_register_clocks(struct clk *clk, int nr_clks);
94 94
95extern int s3c24xx_register_baseclocks(unsigned long xtal); 95extern int s3c24xx_register_baseclocks(unsigned long xtal);
96 96
97extern void s3c64xx_register_clocks(void);
98extern void s5p_register_clocks(unsigned long xtal_freq); 97extern void s5p_register_clocks(unsigned long xtal_freq);
99 98
100extern void s3c24xx_setup_clocks(unsigned long fclk, 99extern void s3c24xx_setup_clocks(unsigned long fclk,