177 files changed, 27469 insertions, 3045 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index f5630a5b3f49..52d5d9739a08 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5062,6 +5062,16 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.g
 S:      Maintained
 F:      drivers/net/wireless/rtl818x/rtl8187*
 
+RTL8192CE WIRELESS DRIVER
+M:      Larry Finger <Larry.Finger@lwfinger.net>
+M:      Chaoming Li <chaoming_li@realsil.com.cn>
+L:      linux-wireless@vger.kernel.org
+W:      http://linuxwireless.org/
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
+S:      Maintained
+F:      drivers/net/wireless/rtlwifi/
+F:      drivers/net/wireless/rtlwifi/rtl8192ce/
+
 S3 SAVAGE FRAMEBUFFER DRIVER
 M:      Antonino Daplas <adaplas@gmail.com>
 L:      linux-fbdev@vger.kernel.org
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 4de4410cd38e..b4338f389394 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -279,6 +279,7 @@ source "drivers/net/wireless/libertas/Kconfig"
 source "drivers/net/wireless/orinoco/Kconfig"
 source "drivers/net/wireless/p54/Kconfig"
 source "drivers/net/wireless/rt2x00/Kconfig"
+source "drivers/net/wireless/rtlwifi/Kconfig"
 source "drivers/net/wireless/wl1251/Kconfig"
 source "drivers/net/wireless/wl12xx/Kconfig"
 source "drivers/net/wireless/zd1211rw/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 06f8ca26c5c1..9760561a27a5 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_B43LEGACY)		+= b43legacy/
 obj-$(CONFIG_ZD1211RW)          += zd1211rw/
 obj-$(CONFIG_RTL8180)           += rtl818x/
 obj-$(CONFIG_RTL8187)           += rtl818x/
+obj-$(CONFIG_RTL8192CE)         += rtlwifi/
 
 # 16-bit wireless PCMCIA client drivers
 obj-$(CONFIG_PCMCIA_RAYCS)      += ray_cs.o
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 4e3b97c3d7c2..e4ec40c63396 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -2351,6 +2351,10 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
                 BIT(NL80211_IFTYPE_ADHOC) |
                 BIT(NL80211_IFTYPE_MESH_POINT);
 
+        /* both antennas can be configured as RX or TX */
+        hw->wiphy->available_antennas_tx = 0x3;
+        hw->wiphy->available_antennas_rx = 0x3;
+
         hw->extra_tx_headroom = 2;
         hw->channel_change_time = 5000;
 
@@ -2654,6 +2658,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
                                                         bool skip_pcu)
 {
         struct ath5k_hw *ah = sc->ah;
+        struct ath_common *common = ath5k_hw_common(ah);
         int ret, ani_mode;
 
         ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n");
@@ -2696,6 +2701,14 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
         ah->ah_cal_next_nf = jiffies;
         ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8);
 
+        /* clear survey data and cycle counters */
+        memset(&sc->survey, 0, sizeof(sc->survey));
+        spin_lock(&common->cc_lock);
+        ath_hw_cycle_counters_update(common);
+        memset(&common->cc_survey, 0, sizeof(common->cc_survey));
+        memset(&common->cc_ani, 0, sizeof(common->cc_ani));
+        spin_unlock(&common->cc_lock);
+
         /*
          * Change channels and update the h/w rate map if we're switching;
          * e.g. 11a to 11b/g.
@@ -3362,25 +3375,27 @@ static int ath5k_get_survey(struct ieee80211_hw *hw, int idx,
         if (idx != 0)
                 return -ENOENT;
 
-        survey->channel = conf->channel;
-        survey->filled = SURVEY_INFO_NOISE_DBM;
-        survey->noise = sc->ah->ah_noise_floor;
-
         spin_lock_bh(&common->cc_lock);
         ath_hw_cycle_counters_update(common);
         if (cc->cycles > 0) {
-                survey->filled |= SURVEY_INFO_CHANNEL_TIME |
-                        SURVEY_INFO_CHANNEL_TIME_BUSY |
-                        SURVEY_INFO_CHANNEL_TIME_RX |
-                        SURVEY_INFO_CHANNEL_TIME_TX;
-                survey->channel_time += cc->cycles / div;
-                survey->channel_time_busy += cc->rx_busy / div;
-                survey->channel_time_rx += cc->rx_frame / div;
-                survey->channel_time_tx += cc->tx_frame / div;
+                sc->survey.channel_time += cc->cycles / div;
+                sc->survey.channel_time_busy += cc->rx_busy / div;
+                sc->survey.channel_time_rx += cc->rx_frame / div;
+                sc->survey.channel_time_tx += cc->tx_frame / div;
         }
         memset(cc, 0, sizeof(*cc));
         spin_unlock_bh(&common->cc_lock);
 
+        memcpy(survey, &sc->survey, sizeof(*survey));
+
+        survey->channel = conf->channel;
+        survey->noise = sc->ah->ah_noise_floor;
+        survey->filled = SURVEY_INFO_NOISE_DBM |
+                        SURVEY_INFO_CHANNEL_TIME |
+                        SURVEY_INFO_CHANNEL_TIME_BUSY |
+                        SURVEY_INFO_CHANNEL_TIME_RX |
+                        SURVEY_INFO_CHANNEL_TIME_TX;
+
         return 0;
 }
 
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index aa6c32aafb59..6d511476e4d2 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -258,6 +258,8 @@ struct ath5k_softc {
         struct tasklet_struct   ani_tasklet;    /* ANI calibration */
 
         struct delayed_work     tx_complete_work;
+
+        struct survey_info      survey;         /* collected survey info */
 };
 
 #define ath5k_hw_hasbssidmask(_ah) \
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 059330aac645..ffcf44a4058b 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -961,18 +961,6 @@ static void ar5008_hw_rfbus_done(struct ath_hw *ah)
         REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
 }
 
-static void ar5008_hw_enable_rfkill(struct ath_hw *ah)
-{
-        REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
-                    AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
-
-        REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
-                    AR_GPIO_INPUT_MUX2_RFSILENT);
-
-        ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
-        REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
-}
-
 static void ar5008_restore_chainmask(struct ath_hw *ah)
 {
         int rx_chainmask = ah->rxchainmask;
@@ -1629,7 +1617,6 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
         priv_ops->set_delta_slope = ar5008_hw_set_delta_slope;
         priv_ops->rfbus_req = ar5008_hw_rfbus_req;
         priv_ops->rfbus_done = ar5008_hw_rfbus_done;
-        priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
         priv_ops->restore_chainmask = ar5008_restore_chainmask;
         priv_ops->set_diversity = ar5008_set_diversity;
         priv_ops->do_getnf = ar5008_hw_do_getnf;
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index 7d5cb204f938..fdb5a835fdcf 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -26,24 +26,6 @@ MODULE_PARM_DESC(nohwcrypt, "Force new ANI for AR5008, AR9001, AR9002");
 
 /* General hardware code for the A5008/AR9001/AR9002 hadware families */
 
-static bool ar9002_hw_macversion_supported(u32 macversion)
-{
-        switch (macversion) {
-        case AR_SREV_VERSION_5416_PCI:
-        case AR_SREV_VERSION_5416_PCIE:
-        case AR_SREV_VERSION_9160:
-        case AR_SREV_VERSION_9100:
-        case AR_SREV_VERSION_9280:
-        case AR_SREV_VERSION_9285:
-        case AR_SREV_VERSION_9287:
-        case AR_SREV_VERSION_9271:
-                return true;
-        default:
-                break;
-        }
-        return false;
-}
-
 static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
 {
         if (AR_SREV_9271(ah)) {
@@ -565,7 +547,6 @@ void ar9002_hw_attach_ops(struct ath_hw *ah)
 
         priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
         priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
-        priv_ops->macversion_supported = ar9002_hw_macversion_supported;
 
         ops->config_pci_powersave = ar9002_hw_configpcipowersave;
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_mac.c b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
index f3f9c589158e..399ab3bb299b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
@@ -283,7 +283,6 @@ static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
 {
         struct ar5416_desc *ads = AR5416DESC(ds);
 
-        txPower += ah->txpower_indexoffset;
         if (txPower > 63)
                 txPower = 63;
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index a14a5e43cf56..81f9cf294dec 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -34,9 +34,9 @@ static const u32 ar9300_2p2_radio_postamble[][5] = {
 
 static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
-        {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800},
-        {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000},
-        {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000},
+        {0x0000a2dc, 0x00033800, 0x00033800, 0x00637800, 0x00637800},
+        {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03838000, 0x03838000},
+        {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03fc0000, 0x03fc0000},
         {0x0000a2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
         {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -56,21 +56,21 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
         {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
         {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
         {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-        {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
-        {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
-        {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83},
-        {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84},
-        {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3},
-        {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5},
-        {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9},
-        {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb},
-        {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
-        {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec},
+        {0x0000a544, 0x52022470, 0x52022470, 0x3f001861, 0x3f001861},
+        {0x0000a548, 0x55022490, 0x55022490, 0x43001a81, 0x43001a81},
+        {0x0000a54c, 0x59022492, 0x59022492, 0x47001a83, 0x47001a83},
+        {0x0000a550, 0x5d022692, 0x5d022692, 0x4a001c84, 0x4a001c84},
+        {0x0000a554, 0x61022892, 0x61022892, 0x4e001ce3, 0x4e001ce3},
+        {0x0000a558, 0x65024890, 0x65024890, 0x52001ce5, 0x52001ce5},
+        {0x0000a55c, 0x69024892, 0x69024892, 0x56001ce9, 0x56001ce9},
+        {0x0000a560, 0x6e024c92, 0x6e024c92, 0x5a001ceb, 0x5a001ceb},
+        {0x0000a564, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a568, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a56c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a570, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a574, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a578, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+        {0x0000a57c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
         {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
         {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
         {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
@@ -88,44 +88,44 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
         {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24},
         {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640},
         {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660},
-        {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861},
-        {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81},
-        {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83},
-        {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84},
-        {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3},
-        {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5},
-        {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9},
-        {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb},
-        {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
-        {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec},
+        {0x0000a5c4, 0x52822470, 0x52822470, 0x3f801861, 0x3f801861},
+        {0x0000a5c8, 0x55822490, 0x55822490, 0x43801a81, 0x43801a81},
+        {0x0000a5cc, 0x59822492, 0x59822492, 0x47801a83, 0x47801a83},
+        {0x0000a5d0, 0x5d822692, 0x5d822692, 0x4a801c84, 0x4a801c84},
+        {0x0000a5d4, 0x61822892, 0x61822892, 0x4e801ce3, 0x4e801ce3},
+        {0x0000a5d8, 0x65824890, 0x65824890, 0x52801ce5, 0x52801ce5},
+        {0x0000a5dc, 0x69824892, 0x69824892, 0x56801ce9, 0x56801ce9},
+        {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x5a801ceb, 0x5a801ceb},
+        {0x0000a5e4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5e8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5ec, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5f0, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5f4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5f8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+        {0x0000a5fc, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
         {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-        {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
-        {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
-        {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
-        {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
-        {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-        {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
-        {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
-        {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-        {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-        {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-        {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-        {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800},
-        {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000},
-        {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000},
+        {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
+        {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
+        {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
+        {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
+        {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
+        {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
+        {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000b2dc, 0x00033800, 0x00033800, 0x00637800, 0x00637800},
+        {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03838000, 0x03838000},
+        {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03fc0000, 0x03fc0000},
         {0x0000b2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-        {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800},
-        {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000},
-        {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000},
+        {0x0000c2dc, 0x00033800, 0x00033800, 0x00637800, 0x00637800},
+        {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03838000, 0x03838000},
+        {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03fc0000, 0x03fc0000},
         {0x0000c2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
         {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
@@ -638,6 +638,7 @@ static const u32 ar9300_2p2_baseband_postamble[][5] = {
         {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
         {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0},
         {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+        {0x0000a22c, 0x01026a2f, 0x01026a2f, 0x01026a2f, 0x01026a2f},
         {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
         {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
         {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
@@ -680,7 +681,7 @@ static const u32 ar9300_2p2_baseband_core[][2] = {
         {0x0000981c, 0x00020028},
         {0x00009834, 0x6400a290},
         {0x00009838, 0x0108ecff},
-        {0x0000983c, 0x14750600},
+        {0x0000983c, 0x0d000600},
         {0x00009880, 0x201fff00},
         {0x00009884, 0x00001042},
         {0x000098a4, 0x00200400},
@@ -722,7 +723,6 @@ static const u32 ar9300_2p2_baseband_core[][2] = {
         {0x0000a220, 0x00000000},
         {0x0000a224, 0x00000000},
         {0x0000a228, 0x10002310},
-        {0x0000a22c, 0x01036a27},
         {0x0000a23c, 0x00000000},
         {0x0000a244, 0x0c000000},
         {0x0000a2a0, 0x00000001},
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 7c3334bd396e..4a4cd88429c0 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -608,120 +608,6 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
         return true;
 }
 
-static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
-{
-        struct ath_common *common = ath9k_hw_common(ah);
-        static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
-                AR_PHY_TX_IQCAL_STATUS_B0,
-                AR_PHY_TX_IQCAL_STATUS_B1,
-                AR_PHY_TX_IQCAL_STATUS_B2,
-        };
-        static const u32 rx_corr[AR9300_MAX_CHAINS] = {
-                AR_PHY_RX_IQCAL_CORR_B0,
-                AR_PHY_RX_IQCAL_CORR_B1,
-                AR_PHY_RX_IQCAL_CORR_B2,
-        };
-        static const u_int32_t chan_info_tab[] = {
-                AR_PHY_CHAN_INFO_TAB_0,
-                AR_PHY_CHAN_INFO_TAB_1,
-                AR_PHY_CHAN_INFO_TAB_2,
-        };
-        u32 tx_corr_coeff[AR9300_MAX_CHAINS];
-        s32 iq_res[6];
-        s32 iqc_coeff[2];
-        s32 i, j;
-        u32 num_chains = 0;
-
-        tx_corr_coeff[0] = AR_PHY_TX_IQCAL_CORR_COEFF_B0(0);
-        tx_corr_coeff[1] = AR_PHY_TX_IQCAL_CORR_COEFF_B1(0);
-        tx_corr_coeff[2] = AR_PHY_TX_IQCAL_CORR_COEFF_B2(0);
-
-        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-                if (ah->txchainmask & (1 << i))
-                        num_chains++;
-        }
-
-        REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
-                      AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
-                      DELPT);
-        REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
-                      AR_PHY_TX_IQCAL_START_DO_CAL,
-                      AR_PHY_TX_IQCAL_START_DO_CAL);
-
-        if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
-                           AR_PHY_TX_IQCAL_START_DO_CAL,
-                           0, AH_WAIT_TIMEOUT)) {
-                ath_dbg(common, ATH_DBG_CALIBRATE,
-                        "Tx IQ Cal not complete.\n");
-                goto TX_IQ_CAL_FAILED;
-        }
-
-        for (i = 0; i < num_chains; i++) {
-                ath_dbg(common, ATH_DBG_CALIBRATE,
-                        "Doing Tx IQ Cal for chain %d.\n", i);
-
-                if (REG_READ(ah, txiqcal_status[i]) &
-                             AR_PHY_TX_IQCAL_STATUS_FAILED) {
-                        ath_dbg(common, ATH_DBG_CALIBRATE,
-                                "Tx IQ Cal failed for chain %d.\n", i);
-                        goto TX_IQ_CAL_FAILED;
-                }
-
-                for (j = 0; j < 3; j++) {
-                        u_int8_t idx = 2 * j,
-                        offset = 4 * j;
-
-                        REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
-                                      AR_PHY_CHAN_INFO_TAB_S2_READ, 0);
-
-                        /* 32 bits */
-                        iq_res[idx] = REG_READ(ah, chan_info_tab[i] + offset);
-
-                        REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
-                                      AR_PHY_CHAN_INFO_TAB_S2_READ, 1);
-
-                        /* 16 bits */
-                        iq_res[idx+1] = 0xffff & REG_READ(ah,
-                                                          chan_info_tab[i] +
-                                                          offset);
-
-                        ath_dbg(common, ATH_DBG_CALIBRATE,
-                                "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
-                                idx, iq_res[idx], idx+1, iq_res[idx+1]);
-                }
-
-                if (!ar9003_hw_calc_iq_corr(ah, i, iq_res, iqc_coeff)) {
-                        ath_dbg(common, ATH_DBG_CALIBRATE,
-                                "Failed in calculation of IQ correction.\n");
-                        goto TX_IQ_CAL_FAILED;
-                }
-
-                ath_dbg(common, ATH_DBG_CALIBRATE,
-                        "IQ_COEFF[0] = 0x%x IQ_COEFF[1] = 0x%x\n",
-                        iqc_coeff[0], iqc_coeff[1]);
-
-                REG_RMW_FIELD(ah, tx_corr_coeff[i],
-                              AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
-                              iqc_coeff[0]);
-                REG_RMW_FIELD(ah, rx_corr[i],
-                              AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_Q_COFF,
-                              iqc_coeff[1] >> 7);
-                REG_RMW_FIELD(ah, rx_corr[i],
-                              AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_I_COFF,
-                              iqc_coeff[1]);
-        }
-
-        REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
-                      AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
-        REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
-                      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
-
-        return;
-
-TX_IQ_CAL_FAILED:
-        ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
-}
-
 static bool ar9003_hw_compute_closest_pass_and_avg(int *mp_coeff, int *mp_avg)
 {
         int diff[MPASS];
@@ -730,9 +616,9 @@ static bool ar9003_hw_compute_closest_pass_and_avg(int *mp_coeff, int *mp_avg)
         diff[1] = abs(mp_coeff[1] - mp_coeff[2]);
         diff[2] = abs(mp_coeff[2] - mp_coeff[0]);
 
-        if (diff[0] > MAX_MEASUREMENT &&
-            diff[1] > MAX_MEASUREMENT &&
-            diff[2] > MAX_MEASUREMENT)
+        if (diff[0] > MAX_DIFFERENCE &&
+            diff[1] > MAX_DIFFERENCE &&
+            diff[2] > MAX_DIFFERENCE)
                 return false;
 
         if (diff[0] <= diff[1] && diff[0] <= diff[2])
@@ -830,6 +716,111 @@ disable_txiqcal:
         ath_dbg(common, ATH_DBG_CALIBRATE, "TX IQ Cal disabled\n");
 }
 
+static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
+{
+        struct ath_common *common = ath9k_hw_common(ah);
+        static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
+                AR_PHY_TX_IQCAL_STATUS_B0,
+                AR_PHY_TX_IQCAL_STATUS_B1,
+                AR_PHY_TX_IQCAL_STATUS_B2,
+        };
+        static const u32 chan_info_tab[] = {
+                AR_PHY_CHAN_INFO_TAB_0,
+                AR_PHY_CHAN_INFO_TAB_1,
+                AR_PHY_CHAN_INFO_TAB_2,
+        };
+        struct coeff coeff;
+        s32 iq_res[6];
+        s32 i, j, ip, im, nmeasurement;
+        u8 nchains = get_streams(common->tx_chainmask);
+
+        for (ip = 0; ip < MPASS; ip++) {
+                REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
+                              AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
+                              DELPT);
+                REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
+                              AR_PHY_TX_IQCAL_START_DO_CAL,
+                              AR_PHY_TX_IQCAL_START_DO_CAL);
+
+                if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
+                                   AR_PHY_TX_IQCAL_START_DO_CAL,
+                                   0, AH_WAIT_TIMEOUT)) {
+                        ath_dbg(common, ATH_DBG_CALIBRATE,
+                                "Tx IQ Cal not complete.\n");
+                        goto TX_IQ_CAL_FAILED;
+                }
+
+                nmeasurement = REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_STATUS_B0,
+                                              AR_PHY_CALIBRATED_GAINS_0);
+                        if (nmeasurement > MAX_MEASUREMENT)
+                                nmeasurement = MAX_MEASUREMENT;
+
+                for (i = 0; i < nchains; i++) {
+                        ath_dbg(common, ATH_DBG_CALIBRATE,
+                                "Doing Tx IQ Cal for chain %d.\n", i);
+                        for (im = 0; im < nmeasurement; im++) {
+                                if (REG_READ(ah, txiqcal_status[i]) &
+                                             AR_PHY_TX_IQCAL_STATUS_FAILED) {
+                                        ath_dbg(common, ATH_DBG_CALIBRATE,
+                                                "Tx IQ Cal failed for chain %d.\n", i);
+                                        goto TX_IQ_CAL_FAILED;
+                                }
+
+                                for (j = 0; j < 3; j++) {
+                                        u8 idx = 2 * j,
+                                           offset = 4 * (3 * im + j);
+
+                                        REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
+                                                      AR_PHY_CHAN_INFO_TAB_S2_READ,
+                                                      0);
+
+                                        /* 32 bits */
+                                        iq_res[idx] = REG_READ(ah,
+                                                        chan_info_tab[i] +
+                                                        offset);
+
+                                        REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
+                                                      AR_PHY_CHAN_INFO_TAB_S2_READ,
+                                                      1);
+
+                                        /* 16 bits */
+                                        iq_res[idx+1] = 0xffff & REG_READ(ah,
+                                                                chan_info_tab[i] +
+                                                                offset);
+
+                                        ath_dbg(common, ATH_DBG_CALIBRATE,
+                                                "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
+                                                idx, iq_res[idx], idx+1, iq_res[idx+1]);
+                                }
+
+                                if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
+                                                            coeff.iqc_coeff)) {
+                                        ath_dbg(common, ATH_DBG_CALIBRATE,
+                                                "Failed in calculation of IQ correction.\n");
+                                        goto TX_IQ_CAL_FAILED;
+                                }
+                                coeff.mag_coeff[i][im][ip] =
+                                                coeff.iqc_coeff[0] & 0x7f;
+                                coeff.phs_coeff[i][im][ip] =
+                                                (coeff.iqc_coeff[0] >> 7) & 0x7f;
+
+                                if (coeff.mag_coeff[i][im][ip] > 63)
+                                        coeff.mag_coeff[i][im][ip] -= 128;
+                                if (coeff.phs_coeff[i][im][ip] > 63)
+                                        coeff.phs_coeff[i][im][ip] -= 128;
+
+                        }
+                }
+        }
+
+        ar9003_hw_tx_iqcal_load_avg_2_passes(ah, nchains, &coeff);
+
+        return;
+
+TX_IQ_CAL_FAILED:
+        ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
+}
+
 static void ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
 {
         u8 tx_gain_forced;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index a16b3dae5b34..466d2bf02eab 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -73,7 +73,7 @@ static const struct ar9300_eeprom ar9300_default = {
                 .regDmn = { LE16(0), LE16(0x1f) },
                 .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
                 .opCapFlags = {
-                        .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
+                        .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
                         .eepMisc = 0,
                 },
                 .rfSilent = 0,
@@ -650,7 +650,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
                 .regDmn = { LE16(0), LE16(0x1f) },
                 .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
                 .opCapFlags = {
-                        .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
+                        .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
                         .eepMisc = 0,
                 },
                 .rfSilent = 0,
@@ -1228,7 +1228,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
                 .regDmn = { LE16(0), LE16(0x1f) },
                 .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
                 .opCapFlags = {
-                        .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
+                        .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
                         .eepMisc = 0,
                 },
                 .rfSilent = 0,
@@ -1806,7 +1806,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
                 .regDmn = { LE16(0), LE16(0x1f) },
                 .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
                 .opCapFlags = {
-                        .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
+                        .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
                         .eepMisc = 0,
                 },
                 .rfSilent = 0,
@@ -2383,7 +2383,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
                 .regDmn = { LE16(0), LE16(0x1f) },
                 .txrxMask =  0x33, /* 4 bits tx and 4 bits rx */
                 .opCapFlags = {
-                        .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
+                        .opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
                         .eepMisc = 0,
                 },
                 .rfSilent = 0,
@@ -2975,7 +2975,7 @@ static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id)
 
 static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
 {
-        if (fbin == AR9300_BCHAN_UNUSED)
+        if (fbin == AR5416_BCHAN_UNUSED)
                 return fbin;
 
         return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
@@ -3428,18 +3428,6 @@ static int ath9k_hw_ar9300_get_eeprom_rev(struct ath_hw *ah)
         return 0;
 }
 
-static u8 ath9k_hw_ar9300_get_num_ant_config(struct ath_hw *ah,
-                                             enum ath9k_hal_freq_band freq_band)
-{
-        return 1;
-}
-
-static u32 ath9k_hw_ar9300_get_eeprom_antenna_cfg(struct ath_hw *ah,
-                                                  struct ath9k_channel *chan)
-{
-        return -EINVAL;
-}
-
 static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
 {
         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
@@ -4486,7 +4474,7 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
                         return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
         }
 
-        return AR9300_MAX_RATE_POWER;
+        return MAX_RATE_POWER;
 }
 
 /*
@@ -4495,7 +4483,7 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
 static u16 ar9003_hw_get_max_edge_power(struct ar9300_eeprom *eep,
                                         u16 freq, int idx, bool is2GHz)
 {
-        u16 twiceMaxEdgePower = AR9300_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         u8 *ctl_freqbin = is2GHz ?
                 &eep->ctl_freqbin_2G[idx][0] :
                 &eep->ctl_freqbin_5G[idx][0];
@@ -4505,7 +4493,7 @@ static u16 ar9003_hw_get_max_edge_power(struct ar9300_eeprom *eep,
 
         /* Get the edge power */
         for (edge = 0;
-             (edge < num_edges) && (ctl_freqbin[edge] != AR9300_BCHAN_UNUSED);
+             (edge < num_edges) && (ctl_freqbin[edge] != AR5416_BCHAN_UNUSED);
              edge++) {
                 /*
                  * If there's an exact channel match or an inband flag set
@@ -4543,9 +4531,9 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
         struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
         struct ath_common *common = ath9k_hw_common(ah);
         struct ar9300_eeprom *pEepData = &ah->eeprom.ar9300_eep;
-        u16 twiceMaxEdgePower = AR9300_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         static const u16 tpScaleReductionTable[5] = {
-                0, 3, 6, 9, AR9300_MAX_RATE_POWER
+                0, 3, 6, 9, MAX_RATE_POWER
         };
         int i;
         int16_t  twiceLargestAntenna;
@@ -4756,6 +4744,16 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
         } /* end ctl mode checking */
 }
 
+static inline u8 mcsidx_to_tgtpwridx(unsigned int mcs_idx, u8 base_pwridx)
+{
+        u8 mod_idx = mcs_idx % 8;
+
+        if (mod_idx <= 3)
+                return mod_idx ? (base_pwridx + 1) : base_pwridx;
+        else
+                return base_pwridx + 4 * (mcs_idx / 8) + mod_idx - 2;
+}
+
 static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
                                         struct ath9k_channel *chan, u16 cfgCtl,
                                         u8 twiceAntennaReduction,
@@ -4764,16 +4762,70 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
 {
         struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
         struct ath_common *common = ath9k_hw_common(ah);
+        struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+        struct ar9300_modal_eep_header *modal_hdr;
         u8 targetPowerValT2[ar9300RateSize];
-        unsigned int i = 0;
+        u8 target_power_val_t2_eep[ar9300RateSize];
+        unsigned int i = 0, paprd_scale_factor = 0;
+        u8 pwr_idx, min_pwridx = 0;
 
         ar9003_hw_set_target_power_eeprom(ah, chan->channel, targetPowerValT2);
+
+        if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) {
+                if (IS_CHAN_2GHZ(chan))
+                        modal_hdr = &eep->modalHeader2G;
+                else
+                        modal_hdr = &eep->modalHeader5G;
+
+                ah->paprd_ratemask =
+                        le32_to_cpu(modal_hdr->papdRateMaskHt20) &
+                        AR9300_PAPRD_RATE_MASK;
+
+                ah->paprd_ratemask_ht40 =
+                        le32_to_cpu(modal_hdr->papdRateMaskHt40) &
+                        AR9300_PAPRD_RATE_MASK;
+
+                paprd_scale_factor = ar9003_get_paprd_scale_factor(ah, chan);
+                min_pwridx = IS_CHAN_HT40(chan) ? ALL_TARGET_HT40_0_8_16 :
+                                                  ALL_TARGET_HT20_0_8_16;
+
+                if (!ah->paprd_table_write_done) {
+                        memcpy(target_power_val_t2_eep, targetPowerValT2,
+                               sizeof(targetPowerValT2));
+                        for (i = 0; i < 24; i++) {
+                                pwr_idx = mcsidx_to_tgtpwridx(i, min_pwridx);
+                                if (ah->paprd_ratemask & (1 << i)) {
+                                        if (targetPowerValT2[pwr_idx] &&
+                                            targetPowerValT2[pwr_idx] ==
+                                            target_power_val_t2_eep[pwr_idx])
+                                                targetPowerValT2[pwr_idx] -=
+                                                        paprd_scale_factor;
+                                }
+                        }
+                }
+                memcpy(target_power_val_t2_eep, targetPowerValT2,
+                       sizeof(targetPowerValT2));
+        }
+
         ar9003_hw_set_power_per_rate_table(ah, chan,
                                            targetPowerValT2, cfgCtl,
                                            twiceAntennaReduction,
                                            twiceMaxRegulatoryPower,
                                            powerLimit);
 
+        if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) {
+                for (i = 0; i < ar9300RateSize; i++) {
+                        if ((ah->paprd_ratemask & (1 << i)) &&
+                            (abs(targetPowerValT2[i] -
+                                target_power_val_t2_eep[i]) >
+                            paprd_scale_factor)) {
+                                ah->paprd_ratemask &= ~(1 << i);
+                                ath_dbg(common, ATH_DBG_EEPROM,
+                                        "paprd disabled for mcs %d\n", i);
+                        }
+                }
+        }
+
         regulatory->max_power_level = 0;
         for (i = 0; i < ar9300RateSize; i++) {
                 if (targetPowerValT2[i] > regulatory->max_power_level)
@@ -4811,6 +4863,19 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
         /* Write target power array to registers */
         ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
         ar9003_hw_calibration_apply(ah, chan->channel);
+
+        if (IS_CHAN_2GHZ(chan)) {
+                if (IS_CHAN_HT40(chan))
+                        i = ALL_TARGET_HT40_0_8_16;
+                else
+                        i = ALL_TARGET_HT20_0_8_16;
+        } else {
+                if (IS_CHAN_HT40(chan))
+                        i = ALL_TARGET_HT40_7;
+                else
+                        i = ALL_TARGET_HT20_7;
+        }
+        ah->paprd_target_power = targetPowerValT2[i];
 }
 
 static u16 ath9k_hw_ar9300_get_spur_channel(struct ath_hw *ah,
@@ -4843,14 +4908,33 @@ u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
                 return eep->modalHeader5G.spurChans;
 }
 
+unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
+                                           struct ath9k_channel *chan)
+{
+        struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+
+        if (IS_CHAN_2GHZ(chan))
+                return MS(le32_to_cpu(eep->modalHeader2G.papdRateMaskHt20),
+                          AR9300_PAPRD_SCALE_1);
+        else {
+                if (chan->channel >= 5700)
+                return MS(le32_to_cpu(eep->modalHeader5G.papdRateMaskHt20),
+                          AR9300_PAPRD_SCALE_1);
+                else if (chan->channel >= 5400)
+                        return MS(le32_to_cpu(eep->modalHeader5G.papdRateMaskHt40),
+                                   AR9300_PAPRD_SCALE_2);
+                else
+                        return MS(le32_to_cpu(eep->modalHeader5G.papdRateMaskHt40),
+                                  AR9300_PAPRD_SCALE_1);
+        }
+}
+
 const struct eeprom_ops eep_ar9300_ops = {
         .check_eeprom = ath9k_hw_ar9300_check_eeprom,
         .get_eeprom = ath9k_hw_ar9300_get_eeprom,
         .fill_eeprom = ath9k_hw_ar9300_fill_eeprom,
         .get_eeprom_ver = ath9k_hw_ar9300_get_eeprom_ver,
         .get_eeprom_rev = ath9k_hw_ar9300_get_eeprom_rev,
-        .get_num_ant_config = ath9k_hw_ar9300_get_num_ant_config,
-        .get_eeprom_antenna_cfg = ath9k_hw_ar9300_get_eeprom_antenna_cfg,
         .set_board_values = ath9k_hw_ar9300_set_board_values,
         .set_addac = ath9k_hw_ar9300_set_addac,
         .set_txpower = ath9k_hw_ar9300_set_txpower,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
index 33503217dab3..afb0b5ee1865 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
@@ -20,47 +20,22 @@
 /* #define AR9300_NUM_CTLS              21 */
 #define AR9300_NUM_CTLS_5G           9
 #define AR9300_NUM_CTLS_2G           12
-#define AR9300_CTL_MODE_M            0xF
 #define AR9300_NUM_BAND_EDGES_5G     8
 #define AR9300_NUM_BAND_EDGES_2G     4
-#define AR9300_NUM_PD_GAINS          4
-#define AR9300_PD_GAINS_IN_MASK      4
-#define AR9300_PD_GAIN_ICEPTS        5
-#define AR9300_EEPROM_MODAL_SPURS    5
-#define AR9300_MAX_RATE_POWER        63
-#define AR9300_NUM_PDADC_VALUES      128
-#define AR9300_NUM_RATES             16
-#define AR9300_BCHAN_UNUSED          0xFF
-#define AR9300_MAX_PWR_RANGE_IN_HALF_DB 64
-#define AR9300_OPFLAGS_11A           0x01
-#define AR9300_OPFLAGS_11G           0x02
-#define AR9300_OPFLAGS_5G_HT40       0x04
-#define AR9300_OPFLAGS_2G_HT40       0x08
-#define AR9300_OPFLAGS_5G_HT20       0x10
-#define AR9300_OPFLAGS_2G_HT20       0x20
 #define AR9300_EEPMISC_BIG_ENDIAN    0x01
 #define AR9300_EEPMISC_WOW           0x02
 #define AR9300_CUSTOMER_DATA_SIZE    20
 
-#define FREQ2FBIN(x, y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
 #define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x))
 #define AR9300_MAX_CHAINS            3
 #define AR9300_ANT_16S               25
 #define AR9300_FUTURE_MODAL_SZ       6
 
-#define AR9300_NUM_ANT_CHAIN_FIELDS     7
-#define AR9300_NUM_ANT_COMMON_FIELDS    4
-#define AR9300_SIZE_ANT_CHAIN_FIELD     3
-#define AR9300_SIZE_ANT_COMMON_FIELD    4
-#define AR9300_ANT_CHAIN_MASK           0x7
-#define AR9300_ANT_COMMON_MASK          0xf
-#define AR9300_CHAIN_0_IDX              0
-#define AR9300_CHAIN_1_IDX              1
-#define AR9300_CHAIN_2_IDX              2
-
-#define AR928X_NUM_ANT_CHAIN_FIELDS     6
-#define AR928X_SIZE_ANT_CHAIN_FIELD     2
-#define AR928X_ANT_CHAIN_MASK           0x3
+#define AR9300_PAPRD_RATE_MASK          0x01ffffff
+#define AR9300_PAPRD_SCALE_1            0x0e000000
+#define AR9300_PAPRD_SCALE_1_S          25
+#define AR9300_PAPRD_SCALE_2            0x70000000
+#define AR9300_PAPRD_SCALE_2_S          28
 
 /* Delta from which to start power to pdadc table */
 /* This offset is used in both open loop and closed loop power control
@@ -71,12 +46,8 @@
  */
 #define AR9300_PWR_TABLE_OFFSET  0
 
-/* enable flags for voltage and temp compensation */
-#define ENABLE_TEMP_COMPENSATION 0x01
-#define ENABLE_VOLT_COMPENSATION 0x02
 /* byte addressable */
 #define AR9300_EEPROM_SIZE (16*1024)
-#define FIXED_CCA_THRESHOLD 15
 
 #define AR9300_BASE_ADDR_4K 0xfff
 #define AR9300_BASE_ADDR 0x3ff
@@ -226,7 +197,7 @@ struct ar9300_modal_eep_header {
         int8_t tempSlope;
         int8_t voltSlope;
         /* spur channels in usual fbin coding format */
-        u8 spurChans[AR9300_EEPROM_MODAL_SPURS];
+        u8 spurChans[AR_EEPROM_MODAL_SPURS];
         /* 3  Check if the register is per chain */
         int8_t noiseFloorThreshCh[AR9300_MAX_CHAINS];
         u8 ob[AR9300_MAX_CHAINS];
@@ -344,4 +315,7 @@ s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah);
 s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah);
 
 u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz);
+
+unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
+                                           struct ath9k_channel *chan);
 #endif
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 21a5bfe354a0..6137634e46ca 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -21,18 +21,6 @@
 
 /* General hardware code for the AR9003 hadware family */
 
-static bool ar9003_hw_macversion_supported(u32 macversion)
-{
-        switch (macversion) {
-        case AR_SREV_VERSION_9300:
-        case AR_SREV_VERSION_9485:
-                return true;
-        default:
-                break;
-        }
-        return false;
-}
-
 /*
  * The AR9003 family uses a new INI format (pre, core, post
  * arrays per subsystem). This provides support for the
@@ -322,7 +310,6 @@ void ar9003_hw_attach_ops(struct ath_hw *ah)
 
         priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
         priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
-        priv_ops->macversion_supported = ar9003_hw_macversion_supported;
 
         ops->config_pci_powersave = ar9003_hw_configpcipowersave;
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
index bfba6a2b741d..b6e4ee48ef78 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
@@ -322,7 +322,6 @@ static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
         if (txpower > ah->txpower_limit)
                 txpower = ah->txpower_limit;
 
-        txpower += ah->txpower_indexoffset;
         if (txpower > 63)
                 txpower = 63;
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
index 74cff4365c43..356d2fd78822 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
@@ -19,6 +19,20 @@
 
 void ar9003_paprd_enable(struct ath_hw *ah, bool val)
 {
+        struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+        struct ath9k_channel *chan = ah->curchan;
+
+        if (val) {
+                ah->paprd_table_write_done = true;
+
+                ah->eep_ops->set_txpower(ah, chan,
+                                ath9k_regd_get_ctl(regulatory, chan),
+                                chan->chan->max_antenna_gain * 2,
+                                chan->chan->max_power * 2,
+                                min((u32) MAX_RATE_POWER,
+                                (u32) regulatory->power_limit), false);
+        }
+
         REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
                       AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
         if (ah->caps.tx_chainmask & BIT(1))
@@ -30,10 +44,63 @@ void ar9003_paprd_enable(struct ath_hw *ah, bool val)
 }
 EXPORT_SYMBOL(ar9003_paprd_enable);
 
-static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
+static int ar9003_get_training_power_2g(struct ath_hw *ah)
+{
+        struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+        struct ar9300_modal_eep_header *hdr = &eep->modalHeader2G;
+        unsigned int power, scale, delta;
+
+        scale = MS(le32_to_cpu(hdr->papdRateMaskHt20), AR9300_PAPRD_SCALE_1);
+        power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE5,
+                               AR_PHY_POWERTX_RATE5_POWERTXHT20_0);
+
+        delta = abs((int) ah->paprd_target_power - (int) power);
+        if (delta > scale)
+                return -1;
+
+        if (delta < 4)
+                power -= 4 - delta;
+
+        return power;
+}
+
+static int ar9003_get_training_power_5g(struct ath_hw *ah)
 {
+        struct ath_common *common = ath9k_hw_common(ah);
         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-        struct ar9300_modal_eep_header *hdr;
+        struct ar9300_modal_eep_header *hdr = &eep->modalHeader5G;
+        struct ath9k_channel *chan = ah->curchan;
+        unsigned int power, scale, delta;
+
+        if (chan->channel >= 5700)
+                scale = MS(le32_to_cpu(hdr->papdRateMaskHt20),
+                           AR9300_PAPRD_SCALE_1);
+        else if (chan->channel >= 5400)
+                scale = MS(le32_to_cpu(hdr->papdRateMaskHt40),
+                           AR9300_PAPRD_SCALE_2);
+        else
+                scale = MS(le32_to_cpu(hdr->papdRateMaskHt40),
+                           AR9300_PAPRD_SCALE_1);
+
+        if (IS_CHAN_HT40(chan))
+                power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE8,
+                        AR_PHY_POWERTX_RATE8_POWERTXHT40_5);
+        else
+                power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE6,
+                        AR_PHY_POWERTX_RATE6_POWERTXHT20_5);
+
+        power += scale;
+        delta = abs((int) ah->paprd_target_power - (int) power);
+        if (delta > scale)
+                return -1;
+
+        power += 2 * get_streams(common->tx_chainmask);
+        return power;
+}
+
+static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
+{
+        struct ath_common *common = ath9k_hw_common(ah);
         static const u32 ctrl0[3] = {
                 AR_PHY_PAPRD_CTRL0_B0,
                 AR_PHY_PAPRD_CTRL0_B1,
@@ -44,21 +111,30 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
                 AR_PHY_PAPRD_CTRL1_B1,
                 AR_PHY_PAPRD_CTRL1_B2
         };
-        u32 am_mask, ht40_mask;
+        int training_power;
         int i;
 
-        if (ah->curchan && IS_CHAN_5GHZ(ah->curchan))
-                hdr = &eep->modalHeader5G;
+        if (IS_CHAN_2GHZ(ah->curchan))
+                training_power = ar9003_get_training_power_2g(ah);
         else
-                hdr = &eep->modalHeader2G;
-
-        am_mask = le32_to_cpu(hdr->papdRateMaskHt20);
-        ht40_mask = le32_to_cpu(hdr->papdRateMaskHt40);
-
-        REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2AM, AR_PHY_PAPRD_AM2AM_MASK, am_mask);
-        REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, am_mask);
-        REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, ht40_mask);
+                training_power = ar9003_get_training_power_5g(ah);
 
+        if (training_power < 0) {
+                ath_dbg(common, ATH_DBG_CALIBRATE,
+                        "PAPRD target power delta out of range");
+                return -ERANGE;
+        }
+        ah->paprd_training_power = training_power;
+        ath_dbg(common, ATH_DBG_CALIBRATE,
+                "Training power: %d, Target power: %d\n",
+                ah->paprd_training_power, ah->paprd_target_power);
+
+        REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2AM, AR_PHY_PAPRD_AM2AM_MASK,
+                      ah->paprd_ratemask);
+        REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK,
+                      ah->paprd_ratemask);
+        REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK,
+                      ah->paprd_ratemask_ht40);
 
         for (i = 0; i < ah->caps.max_txchains; i++) {
                 REG_RMW_FIELD(ah, ctrl0[i],
@@ -141,6 +217,7 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
                       AR_PHY_PAPRD_PRE_POST_SCALING, 185706);
         REG_RMW_FIELD(ah, AR_PHY_PAPRD_PRE_POST_SCALE_7_B0,
                       AR_PHY_PAPRD_PRE_POST_SCALING, 175487);
+        return 0;
 }
 
 static void ar9003_paprd_get_gain_table(struct ath_hw *ah)
@@ -595,15 +672,10 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
 {
         u32 *paprd_table_val = caldata->pa_table[chain];
         u32 small_signal_gain = caldata->small_signal_gain[chain];
-        u32 training_power;
+        u32 training_power = ah->paprd_training_power;
         u32 reg = 0;
         int i;
 
-        training_power =
-            REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE5,
-                           AR_PHY_POWERTX_RATE5_POWERTXHT20_0);
-        training_power -= 4;
-
         if (chain == 0)
                 reg = AR_PHY_PAPRD_MEM_TAB_B0;
         else if (chain == 1)
@@ -643,14 +715,8 @@ EXPORT_SYMBOL(ar9003_paprd_populate_single_table);
 
 int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain)
 {
-
         unsigned int i, desired_gain, gain_index;
-        unsigned int train_power;
-
-        train_power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE5,
-                                     AR_PHY_POWERTX_RATE5_POWERTXHT20_0);
-
-        train_power = train_power - 4;
+        unsigned int train_power = ah->paprd_training_power;
 
         desired_gain = ar9003_get_desired_gain(ah, chain, train_power);
 
@@ -716,7 +782,12 @@ EXPORT_SYMBOL(ar9003_paprd_create_curve);
 
 int ar9003_paprd_init_table(struct ath_hw *ah)
 {
-        ar9003_paprd_setup_single_table(ah);
+        int ret;
+
+        ret = ar9003_paprd_setup_single_table(ah);
+        if (ret < 0)
+            return ret;
+
         ar9003_paprd_get_gain_table(ah);
         return 0;
 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index da4a571304da..8d60f4f09acc 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -578,10 +578,7 @@ static void ar9003_hw_prog_ini(struct ath_hw *ah,
                 u32 reg = INI_RA(iniArr, i, 0);
                 u32 val = INI_RA(iniArr, i, column);
 
-                if (reg >= 0x16000 && reg < 0x17000)
-                        ath9k_hw_analog_shift_regwrite(ah, reg, val);
-                else
-                        REG_WRITE(ah, reg, val);
+                REG_WRITE(ah, reg, val);
 
                 DO_DELAY(regWrites);
         }
@@ -748,28 +745,6 @@ static void ar9003_hw_rfbus_done(struct ath_hw *ah)
         REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
 }
 
-/*
- * Set the interrupt and GPIO values so the ISR can disable RF
- * on a switch signal.  Assumes GPIO port and interrupt polarity
- * are set prior to call.
- */
-static void ar9003_hw_enable_rfkill(struct ath_hw *ah)
-{
-        /* Connect rfsilent_bb_l to baseband */
-        REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
-                    AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
-        /* Set input mux for rfsilent_bb_l to GPIO #0 */
-        REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
-                    AR_GPIO_INPUT_MUX2_RFSILENT);
-
-        /*
-         * Configure the desired GPIO port for input and
-         * enable baseband rf silence.
-         */
-        ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
-        REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
-}
-
 static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
 {
         u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
@@ -1206,7 +1181,6 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
         priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
         priv_ops->rfbus_req = ar9003_hw_rfbus_req;
         priv_ops->rfbus_done = ar9003_hw_rfbus_done;
-        priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
         priv_ops->set_diversity = ar9003_hw_set_diversity;
         priv_ops->ani_control = ar9003_hw_ani_control;
         priv_ops->do_getnf = ar9003_hw_do_getnf;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 6f811c7ada05..59bab6bd8a74 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -1090,6 +1090,14 @@
 #define AR_PHY_POWERTX_RATE5_POWERTXHT20_0      0x3F
 #define AR_PHY_POWERTX_RATE5_POWERTXHT20_0_S    0
 
+#define AR_PHY_POWERTX_RATE6                    (AR_SM_BASE + 0x1d4)
+#define AR_PHY_POWERTX_RATE6_POWERTXHT20_5      0x3F00
+#define AR_PHY_POWERTX_RATE6_POWERTXHT20_5_S    8
+
+#define AR_PHY_POWERTX_RATE8                    (AR_SM_BASE + 0x1dc)
+#define AR_PHY_POWERTX_RATE8_POWERTXHT40_5      0x3F00
+#define AR_PHY_POWERTX_RATE8_POWERTXHT40_5_S    8
+
 void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
 
 #endif  /* AR9003_PHY_H */
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 9b5501f90010..2c31f5142eda 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -57,6 +57,8 @@ struct ath_node;
 
 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
 
+#define ATH9K_PM_QOS_DEFAULT_VALUE      55
+
 #define TSF_TO_TU(_h,_l) \
         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
 
@@ -187,6 +189,7 @@ struct ath_txq {
         struct list_head axq_q;
         spinlock_t axq_lock;
         u32 axq_depth;
+        u32 axq_ampdu_depth;
         bool stopped;
         bool axq_tx_inprogress;
         struct list_head axq_acq;
@@ -663,6 +666,7 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 extern struct ieee80211_ops ath9k_ops;
 extern int modparam_nohwcrypt;
 extern int led_blink;
+extern int ath9k_pm_qos_value;
 
 irqreturn_t ath_isr(int irq, void *dev);
 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
@@ -671,7 +675,6 @@ void ath9k_deinit_device(struct ath_softc *sc);
 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
                            struct ath9k_channel *ichan);
-void ath_update_chainmask(struct ath_softc *sc, int is_ht);
 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
                     struct ath9k_channel *hchan);
 
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index fda533cfd881..d05163159572 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -234,7 +234,7 @@ void ath9k_hw_get_target_powers(struct ath_hw *ah,
 u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
                                 bool is2GHz, int num_band_edges)
 {
-        u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         int i;
 
         for (i = 0; (i < num_band_edges) &&
@@ -279,6 +279,219 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
         }
 }
 
+void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
+                                struct ath9k_channel *chan,
+                                void *pRawDataSet,
+                                u8 *bChans, u16 availPiers,
+                                u16 tPdGainOverlap,
+                                u16 *pPdGainBoundaries, u8 *pPDADCValues,
+                                u16 numXpdGains)
+{
+        int i, j, k;
+        int16_t ss;
+        u16 idxL = 0, idxR = 0, numPiers;
+        static u8 vpdTableL[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+        static u8 vpdTableR[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+        static u8 vpdTableI[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+
+        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
+        u8 minPwrT4[AR5416_NUM_PD_GAINS];
+        u8 maxPwrT4[AR5416_NUM_PD_GAINS];
+        int16_t vpdStep;
+        int16_t tmpVal;
+        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
+        bool match;
+        int16_t minDelta = 0;
+        struct chan_centers centers;
+        int pdgain_boundary_default;
+        struct cal_data_per_freq *data_def = pRawDataSet;
+        struct cal_data_per_freq_4k *data_4k = pRawDataSet;
+        struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
+        bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
+        int intercepts;
+
+        if (AR_SREV_9287(ah))
+                intercepts = AR9287_PD_GAIN_ICEPTS;
+        else
+                intercepts = AR5416_PD_GAIN_ICEPTS;
+
+        memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+
+        for (numPiers = 0; numPiers < availPiers; numPiers++) {
+                if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
+                        break;
+        }
+
+        match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
+                                                             IS_CHAN_2GHZ(chan)),
+                                               bChans, numPiers, &idxL, &idxR);
+
+        if (match) {
+                if (AR_SREV_9287(ah)) {
+                        /* FIXME: array overrun? */
+                        for (i = 0; i < numXpdGains; i++) {
+                                minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
+                                maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4];
+                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                data_9287[idxL].pwrPdg[i],
+                                                data_9287[idxL].vpdPdg[i],
+                                                intercepts,
+                                                vpdTableI[i]);
+                        }
+                } else if (eeprom_4k) {
+                        for (i = 0; i < numXpdGains; i++) {
+                                minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
+                                maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4];
+                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                data_4k[idxL].pwrPdg[i],
+                                                data_4k[idxL].vpdPdg[i],
+                                                intercepts,
+                                                vpdTableI[i]);
+                        }
+                } else {
+                        for (i = 0; i < numXpdGains; i++) {
+                                minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
+                                maxPwrT4[i] = data_def[idxL].pwrPdg[i][4];
+                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                data_def[idxL].pwrPdg[i],
+                                                data_def[idxL].vpdPdg[i],
+                                                intercepts,
+                                                vpdTableI[i]);
+                        }
+                }
+        } else {
+                for (i = 0; i < numXpdGains; i++) {
+                        if (AR_SREV_9287(ah)) {
+                                pVpdL = data_9287[idxL].vpdPdg[i];
+                                pPwrL = data_9287[idxL].pwrPdg[i];
+                                pVpdR = data_9287[idxR].vpdPdg[i];
+                                pPwrR = data_9287[idxR].pwrPdg[i];
+                        } else if (eeprom_4k) {
+                                pVpdL = data_4k[idxL].vpdPdg[i];
+                                pPwrL = data_4k[idxL].pwrPdg[i];
+                                pVpdR = data_4k[idxR].vpdPdg[i];
+                                pPwrR = data_4k[idxR].pwrPdg[i];
+                        } else {
+                                pVpdL = data_def[idxL].vpdPdg[i];
+                                pPwrL = data_def[idxL].pwrPdg[i];
+                                pVpdR = data_def[idxR].vpdPdg[i];
+                                pPwrR = data_def[idxR].pwrPdg[i];
+                        }
+
+                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
+
+                        maxPwrT4[i] =
+                                min(pPwrL[intercepts - 1],
+                                    pPwrR[intercepts - 1]);
+
+
+                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                pPwrL, pVpdL,
+                                                intercepts,
+                                                vpdTableL[i]);
+                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                pPwrR, pVpdR,
+                                                intercepts,
+                                                vpdTableR[i]);
+
+                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
+                                vpdTableI[i][j] =
+                                        (u8)(ath9k_hw_interpolate((u16)
+                                             FREQ2FBIN(centers.
+                                                       synth_center,
+                                                       IS_CHAN_2GHZ
+                                                       (chan)),
+                                             bChans[idxL], bChans[idxR],
+                                             vpdTableL[i][j], vpdTableR[i][j]));
+                        }
+                }
+        }
+
+        k = 0;
+
+        for (i = 0; i < numXpdGains; i++) {
+                if (i == (numXpdGains - 1))
+                        pPdGainBoundaries[i] =
+                                (u16)(maxPwrT4[i] / 2);
+                else
+                        pPdGainBoundaries[i] =
+                                (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
+
+                pPdGainBoundaries[i] =
+                        min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
+
+                if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
+                        minDelta = pPdGainBoundaries[0] - 23;
+                        pPdGainBoundaries[0] = 23;
+                } else {
+                        minDelta = 0;
+                }
+
+                if (i == 0) {
+                        if (AR_SREV_9280_20_OR_LATER(ah))
+                                ss = (int16_t)(0 - (minPwrT4[i] / 2));
+                        else
+                                ss = 0;
+                } else {
+                        ss = (int16_t)((pPdGainBoundaries[i - 1] -
+                                        (minPwrT4[i] / 2)) -
+                                       tPdGainOverlap + 1 + minDelta);
+                }
+                vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
+                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
+
+                while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                        tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
+                        pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
+                        ss++;
+                }
+
+                sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
+                tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
+                                (minPwrT4[i] / 2));
+                maxIndex = (tgtIndex < sizeCurrVpdTable) ?
+                        tgtIndex : sizeCurrVpdTable;
+
+                while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                        pPDADCValues[k++] = vpdTableI[i][ss++];
+                }
+
+                vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
+                                    vpdTableI[i][sizeCurrVpdTable - 2]);
+                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
+
+                if (tgtIndex >= maxIndex) {
+                        while ((ss <= tgtIndex) &&
+                               (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                                tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
+                                                    (ss - maxIndex + 1) * vpdStep));
+                                pPDADCValues[k++] = (u8)((tmpVal > 255) ?
+                                                         255 : tmpVal);
+                                ss++;
+                        }
+                }
+        }
+
+        if (eeprom_4k)
+                pdgain_boundary_default = 58;
+        else
+                pdgain_boundary_default = pPdGainBoundaries[i - 1];
+
+        while (i < AR5416_PD_GAINS_IN_MASK) {
+                pPdGainBoundaries[i] = pdgain_boundary_default;
+                i++;
+        }
+
+        while (k < AR5416_NUM_PDADC_VALUES) {
+                pPDADCValues[k] = pPDADCValues[k - 1];
+                k++;
+        }
+}
+
 int ath9k_hw_eeprom_init(struct ath_hw *ah)
 {
         int status;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index 8b9885b5243f..f6f09d1378f4 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -17,6 +17,8 @@
 #ifndef EEPROM_H
 #define EEPROM_H
 
+#define AR_EEPROM_MODAL_SPURS   5
+
 #include "../ath.h"
 #include <net/cfg80211.h>
 #include "ar9003_eeprom.h"
@@ -149,8 +151,6 @@
 #define AR5416_NUM_PD_GAINS             4
 #define AR5416_PD_GAINS_IN_MASK         4
 #define AR5416_PD_GAIN_ICEPTS           5
-#define AR5416_EEPROM_MODAL_SPURS       5
-#define AR5416_MAX_RATE_POWER           63
 #define AR5416_NUM_PDADC_VALUES         128
 #define AR5416_BCHAN_UNUSED             0xFF
 #define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
@@ -175,8 +175,6 @@
 #define AR5416_EEP4K_NUM_CTLS                 12
 #define AR5416_EEP4K_NUM_BAND_EDGES           4
 #define AR5416_EEP4K_NUM_PD_GAINS             2
-#define AR5416_EEP4K_PD_GAINS_IN_MASK         4
-#define AR5416_EEP4K_PD_GAIN_ICEPTS           5
 #define AR5416_EEP4K_MAX_CHAINS               1
 
 #define AR9280_TX_GAIN_TABLE_SIZE 22
@@ -198,35 +196,12 @@
 #define AR9287_NUM_2G_40_TARGET_POWERS  3
 #define AR9287_NUM_CTLS                 12
 #define AR9287_NUM_BAND_EDGES           4
-#define AR9287_NUM_PD_GAINS             4
-#define AR9287_PD_GAINS_IN_MASK         4
 #define AR9287_PD_GAIN_ICEPTS           1
-#define AR9287_EEPROM_MODAL_SPURS       5
-#define AR9287_MAX_RATE_POWER           63
-#define AR9287_NUM_PDADC_VALUES         128
-#define AR9287_NUM_RATES                16
-#define AR9287_BCHAN_UNUSED             0xFF
-#define AR9287_MAX_PWR_RANGE_IN_HALF_DB 64
-#define AR9287_OPFLAGS_11A              0x01
-#define AR9287_OPFLAGS_11G              0x02
-#define AR9287_OPFLAGS_2G_HT40          0x08
-#define AR9287_OPFLAGS_2G_HT20          0x20
-#define AR9287_OPFLAGS_5G_HT40          0x04
-#define AR9287_OPFLAGS_5G_HT20          0x10
 #define AR9287_EEPMISC_BIG_ENDIAN       0x01
 #define AR9287_EEPMISC_WOW              0x02
 #define AR9287_MAX_CHAINS               2
 #define AR9287_ANT_16S                  32
-#define AR9287_custdatasize             20
-
-#define AR9287_NUM_ANT_CHAIN_FIELDS     6
-#define AR9287_NUM_ANT_COMMON_FIELDS    4
-#define AR9287_SIZE_ANT_CHAIN_FIELD     2
-#define AR9287_SIZE_ANT_COMMON_FIELD    4
-#define AR9287_ANT_CHAIN_MASK           0x3
-#define AR9287_ANT_COMMON_MASK          0xf
-#define AR9287_CHAIN_0_IDX              0
-#define AR9287_CHAIN_1_IDX              1
+
 #define AR9287_DATA_SZ                  32
 
 #define AR9287_PWR_TABLE_OFFSET_DB  -5
@@ -396,7 +371,7 @@ struct modal_eep_header {
         u16 xpaBiasLvlFreq[3];
         u8 futureModal[6];
 
-        struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
+        struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
 } __packed;
 
 struct calDataPerFreqOpLoop {
@@ -464,7 +439,7 @@ struct modal_eep_4k_header {
         u8 db2_4:4, reserved:4;
 #endif
         u8 futureModal[4];
-        struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
+        struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
 } __packed;
 
 struct base_eep_ar9287_header {
@@ -522,7 +497,7 @@ struct modal_eep_ar9287_header {
         u8 ob_qam;
         u8 ob_pal_off;
         u8 futureModal[30];
-        struct spur_chan spurChans[AR9287_EEPROM_MODAL_SPURS];
+        struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
 } __packed;
 
 struct cal_data_per_freq {
@@ -531,8 +506,8 @@ struct cal_data_per_freq {
 } __packed;
 
 struct cal_data_per_freq_4k {
-        u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_EEP4K_PD_GAIN_ICEPTS];
-        u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_EEP4K_PD_GAIN_ICEPTS];
+        u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
+        u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
 } __packed;
 
 struct cal_target_power_leg {
@@ -558,8 +533,8 @@ struct cal_data_op_loop_ar9287 {
 } __packed;
 
 struct cal_data_per_freq_ar9287 {
-        u8 pwrPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
-        u8 vpdPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
+        u8 pwrPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
+        u8 vpdPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
 } __packed;
 
 union cal_data_per_freq_ar9287_u {
@@ -674,10 +649,6 @@ struct eeprom_ops {
         bool (*fill_eeprom)(struct ath_hw *hw);
         int (*get_eeprom_ver)(struct ath_hw *hw);
         int (*get_eeprom_rev)(struct ath_hw *hw);
-        u8 (*get_num_ant_config)(struct ath_hw *hw,
-                                 enum ath9k_hal_freq_band band);
-        u32 (*get_eeprom_antenna_cfg)(struct ath_hw *hw,
-                                      struct ath9k_channel *chan);
         void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
         void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
         void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
@@ -716,6 +687,14 @@ u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
 void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah);
 int ath9k_hw_eeprom_init(struct ath_hw *ah);
 
+void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
+                                struct ath9k_channel *chan,
+                                void *pRawDataSet,
+                                u8 *bChans, u16 availPiers,
+                                u16 tPdGainOverlap,
+                                u16 *pPdGainBoundaries, u8 *pPDADCValues,
+                                u16 numXpdGains);
+
 #define ar5416_get_ntxchains(_txchainmask)                      \
         (((_txchainmask >> 2) & 1) +                            \
          ((_txchainmask >> 1) & 1) + (_txchainmask & 1))
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 939fc7af86f8..fbdff7e47952 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -153,7 +153,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
                         eep->modalHeader.antCtrlChain[i] = integer;
                 }
 
-                for (i = 0; i < AR5416_EEPROM_MODAL_SPURS; i++) {
+                for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
                         word = swab16(eep->modalHeader.spurChans[i].spurChan);
                         eep->modalHeader.spurChans[i].spurChan = word;
                 }
@@ -227,173 +227,6 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
         }
 }
 
-static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah,
-                                struct ath9k_channel *chan,
-                                struct cal_data_per_freq_4k *pRawDataSet,
-                                u8 *bChans, u16 availPiers,
-                                u16 tPdGainOverlap,
-                                u16 *pPdGainBoundaries, u8 *pPDADCValues,
-                                u16 numXpdGains)
-{
-#define TMP_VAL_VPD_TABLE \
-        ((vpdTableI[i][sizeCurrVpdTable - 1] + (ss - maxIndex + 1) * vpdStep));
-        int i, j, k;
-        int16_t ss;
-        u16 idxL = 0, idxR = 0, numPiers;
-        static u8 vpdTableL[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableR[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableI[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-
-        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
-        u8 minPwrT4[AR5416_EEP4K_NUM_PD_GAINS];
-        u8 maxPwrT4[AR5416_EEP4K_NUM_PD_GAINS];
-        int16_t vpdStep;
-        int16_t tmpVal;
-        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
-        bool match;
-        int16_t minDelta = 0;
-        struct chan_centers centers;
-#define PD_GAIN_BOUNDARY_DEFAULT 58;
-
-        memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS);
-        ath9k_hw_get_channel_centers(ah, chan, &centers);
-
-        for (numPiers = 0; numPiers < availPiers; numPiers++) {
-                if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
-                        break;
-        }
-
-        match = ath9k_hw_get_lower_upper_index(
-                                        (u8)FREQ2FBIN(centers.synth_center,
-                                        IS_CHAN_2GHZ(chan)), bChans, numPiers,
-                                        &idxL, &idxR);
-
-        if (match) {
-                for (i = 0; i < numXpdGains; i++) {
-                        minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0];
-                        maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4];
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                        pRawDataSet[idxL].pwrPdg[i],
-                                        pRawDataSet[idxL].vpdPdg[i],
-                                        AR5416_EEP4K_PD_GAIN_ICEPTS,
-                                        vpdTableI[i]);
-                }
-        } else {
-                for (i = 0; i < numXpdGains; i++) {
-                        pVpdL = pRawDataSet[idxL].vpdPdg[i];
-                        pPwrL = pRawDataSet[idxL].pwrPdg[i];
-                        pVpdR = pRawDataSet[idxR].vpdPdg[i];
-                        pPwrR = pRawDataSet[idxR].pwrPdg[i];
-
-                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
-
-                        maxPwrT4[i] =
-                                min(pPwrL[AR5416_EEP4K_PD_GAIN_ICEPTS - 1],
-                                    pPwrR[AR5416_EEP4K_PD_GAIN_ICEPTS - 1]);
-
-
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrL, pVpdL,
-                                                AR5416_EEP4K_PD_GAIN_ICEPTS,
-                                                vpdTableL[i]);
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrR, pVpdR,
-                                                AR5416_EEP4K_PD_GAIN_ICEPTS,
-                                                vpdTableR[i]);
-
-                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
-                                vpdTableI[i][j] =
-                                        (u8)(ath9k_hw_interpolate((u16)
-                                             FREQ2FBIN(centers.
-                                                       synth_center,
-                                                       IS_CHAN_2GHZ
-                                                       (chan)),
-                                             bChans[idxL], bChans[idxR],
-                                             vpdTableL[i][j], vpdTableR[i][j]));
-                        }
-                }
-        }
-
-        k = 0;
-
-        for (i = 0; i < numXpdGains; i++) {
-                if (i == (numXpdGains - 1))
-                        pPdGainBoundaries[i] =
-                                (u16)(maxPwrT4[i] / 2);
-                else
-                        pPdGainBoundaries[i] =
-                                (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
-
-                pPdGainBoundaries[i] =
-                        min((u16)AR5416_MAX_RATE_POWER, pPdGainBoundaries[i]);
-
-                if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
-                        minDelta = pPdGainBoundaries[0] - 23;
-                        pPdGainBoundaries[0] = 23;
-                } else {
-                        minDelta = 0;
-                }
-
-                if (i == 0) {
-                        if (AR_SREV_9280_20_OR_LATER(ah))
-                                ss = (int16_t)(0 - (minPwrT4[i] / 2));
-                        else
-                                ss = 0;
-                } else {
-                        ss = (int16_t)((pPdGainBoundaries[i - 1] -
-                                        (minPwrT4[i] / 2)) -
-                                       tPdGainOverlap + 1 + minDelta);
-                }
-                vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
-                        tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
-                        pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
-                        ss++;
-                }
-
-                sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
-                tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
-                                (minPwrT4[i] / 2));
-                maxIndex = (tgtIndex < sizeCurrVpdTable) ?
-                        tgtIndex : sizeCurrVpdTable;
-
-                while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1)))
-                        pPDADCValues[k++] = vpdTableI[i][ss++];
-
-                vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
-                                    vpdTableI[i][sizeCurrVpdTable - 2]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                if (tgtIndex >= maxIndex) {
-                        while ((ss <= tgtIndex) &&
-                               (k < (AR5416_NUM_PDADC_VALUES - 1))) {
-                                tmpVal = (int16_t) TMP_VAL_VPD_TABLE;
-                                pPDADCValues[k++] = (u8)((tmpVal > 255) ?
-                                                         255 : tmpVal);
-                                ss++;
-                        }
-                }
-        }
-
-        while (i < AR5416_EEP4K_PD_GAINS_IN_MASK) {
-                pPdGainBoundaries[i] = PD_GAIN_BOUNDARY_DEFAULT;
-                i++;
-        }
-
-        while (k < AR5416_NUM_PDADC_VALUES) {
-                pPDADCValues[k] = pPDADCValues[k - 1];
-                k++;
-        }
-
-        return;
-#undef TMP_VAL_VPD_TABLE
-}
-
 static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
                                   struct ath9k_channel *chan,
                                   int16_t *pTxPowerIndexOffset)
@@ -404,7 +237,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
         u8 *pCalBChans = NULL;
         u16 pdGainOverlap_t2;
         static u8 pdadcValues[AR5416_NUM_PDADC_VALUES];
-        u16 gainBoundaries[AR5416_EEP4K_PD_GAINS_IN_MASK];
+        u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK];
         u16 numPiers, i, j;
         u16 numXpdGain, xpdMask;
         u16 xpdGainValues[AR5416_EEP4K_NUM_PD_GAINS] = { 0, 0 };
@@ -426,12 +259,12 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
 
         numXpdGain = 0;
 
-        for (i = 1; i <= AR5416_EEP4K_PD_GAINS_IN_MASK; i++) {
-                if ((xpdMask >> (AR5416_EEP4K_PD_GAINS_IN_MASK - i)) & 1) {
+        for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) {
+                if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) {
                         if (numXpdGain >= AR5416_EEP4K_NUM_PD_GAINS)
                                 break;
                         xpdGainValues[numXpdGain] =
-                                (u16)(AR5416_EEP4K_PD_GAINS_IN_MASK - i);
+                                (u16)(AR5416_PD_GAINS_IN_MASK - i);
                         numXpdGain++;
                 }
         }
@@ -455,7 +288,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
                 if (pEepData->baseEepHeader.txMask & (1 << i)) {
                         pRawDataset = pEepData->calPierData2G[i];
 
-                        ath9k_hw_get_4k_gain_boundaries_pdadcs(ah, chan,
+                        ath9k_hw_get_gain_boundaries_pdadcs(ah, chan,
                                             pRawDataset, pCalBChans,
                                             numPiers, pdGainOverlap_t2,
                                             gainBoundaries,
@@ -528,7 +361,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
         int i;
         int16_t twiceLargestAntenna;
         u16 twiceMinEdgePower;
-        u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
         u16 numCtlModes;
         const u16 *pCtlMode;
@@ -537,7 +370,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
         struct cal_ctl_data_4k *rep;
         struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
         static const u16 tpScaleReductionTable[5] =
-                { 0, 3, 6, 9, AR5416_MAX_RATE_POWER };
+                { 0, 3, 6, 9, MAX_RATE_POWER };
         struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
                 0, { 0, 0, 0, 0}
         };
@@ -613,7 +446,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
 
                 if (ah->eep_ops->get_eeprom_ver(ah) == 14 &&
                     ah->eep_ops->get_eeprom_rev(ah) <= 2)
-                        twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+                        twiceMaxEdgePower = MAX_RATE_POWER;
 
                 for (i = 0; (i < AR5416_EEP4K_NUM_CTLS) &&
                              pEepData->ctlIndex[i]; i++) {
@@ -752,8 +585,8 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
         regulatory->max_power_level = 0;
         for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
                 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
-                if (ratesArray[i] > AR5416_MAX_RATE_POWER)
-                        ratesArray[i] = AR5416_MAX_RATE_POWER;
+                if (ratesArray[i] > MAX_RATE_POWER)
+                        ratesArray[i] = MAX_RATE_POWER;
 
                 if (ratesArray[i] > regulatory->max_power_level)
                         regulatory->max_power_level = ratesArray[i];
@@ -937,8 +770,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
         pModal = &eep->modalHeader;
         txRxAttenLocal = 23;
 
-        REG_WRITE(ah, AR_PHY_SWITCH_COM,
-                  ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
+        REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
 
         /* Single chain for 4K EEPROM*/
         ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
@@ -1154,21 +986,6 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
         }
 }
 
-static u32 ath9k_hw_4k_get_eeprom_antenna_cfg(struct ath_hw *ah,
-                                              struct ath9k_channel *chan)
-{
-        struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
-        struct modal_eep_4k_header *pModal = &eep->modalHeader;
-
-        return pModal->antCtrlCommon;
-}
-
-static u8 ath9k_hw_4k_get_num_ant_config(struct ath_hw *ah,
-                                         enum ath9k_hal_freq_band freq_band)
-{
-        return 1;
-}
-
 static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
 {
 #define EEP_MAP4K_SPURCHAN \
@@ -1205,8 +1022,6 @@ const struct eeprom_ops eep_4k_ops = {
         .fill_eeprom            = ath9k_hw_4k_fill_eeprom,
         .get_eeprom_ver         = ath9k_hw_4k_get_eeprom_ver,
         .get_eeprom_rev         = ath9k_hw_4k_get_eeprom_rev,
-        .get_num_ant_config     = ath9k_hw_4k_get_num_ant_config,
-        .get_eeprom_antenna_cfg = ath9k_hw_4k_get_eeprom_antenna_cfg,
         .set_board_values       = ath9k_hw_4k_set_board_values,
         .set_addac              = ath9k_hw_4k_set_addac,
         .set_txpower            = ath9k_hw_4k_set_txpower,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index 065402f2e402..9b6bc8a953bc 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -150,7 +150,7 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
                         eep->modalHeader.antCtrlChain[i] = integer;
                 }
 
-                for (i = 0; i < AR9287_EEPROM_MODAL_SPURS; i++) {
+                for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
                         word = swab16(eep->modalHeader.spurChans[i].spurChan);
                         eep->modalHeader.spurChans[i].spurChan = word;
                 }
@@ -220,163 +220,6 @@ static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah,
         }
 }
 
-static void ath9k_hw_get_ar9287_gain_boundaries_pdadcs(struct ath_hw *ah,
-                               struct ath9k_channel *chan,
-                               struct cal_data_per_freq_ar9287 *pRawDataSet,
-                               u8 *bChans, u16 availPiers,
-                               u16 tPdGainOverlap,
-                               u16 *pPdGainBoundaries,
-                               u8 *pPDADCValues,
-                               u16 numXpdGains)
-{
-#define TMP_VAL_VPD_TABLE                                               \
-        ((vpdTableI[i][sizeCurrVpdTable - 1] + (ss - maxIndex + 1) * vpdStep));
-
-        int i, j, k;
-        int16_t ss;
-        u16 idxL = 0, idxR = 0, numPiers;
-        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
-        u8 minPwrT4[AR9287_NUM_PD_GAINS];
-        u8 maxPwrT4[AR9287_NUM_PD_GAINS];
-        int16_t vpdStep;
-        int16_t tmpVal;
-        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
-        bool match;
-        int16_t minDelta = 0;
-        struct chan_centers centers;
-        static u8 vpdTableL[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableR[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableI[AR5416_EEP4K_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-
-        memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS);
-        ath9k_hw_get_channel_centers(ah, chan, &centers);
-
-        for (numPiers = 0; numPiers < availPiers; numPiers++) {
-                if (bChans[numPiers] == AR9287_BCHAN_UNUSED)
-                        break;
-        }
-
-        match = ath9k_hw_get_lower_upper_index(
-                (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)),
-                bChans, numPiers, &idxL, &idxR);
-
-        if (match) {
-                for (i = 0; i < numXpdGains; i++) {
-                        minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0];
-                        maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4];
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pRawDataSet[idxL].pwrPdg[i],
-                                                pRawDataSet[idxL].vpdPdg[i],
-                                                AR9287_PD_GAIN_ICEPTS,
-                                                vpdTableI[i]);
-                }
-        } else {
-                for (i = 0; i < numXpdGains; i++) {
-                        pVpdL = pRawDataSet[idxL].vpdPdg[i];
-                        pPwrL = pRawDataSet[idxL].pwrPdg[i];
-                        pVpdR = pRawDataSet[idxR].vpdPdg[i];
-                        pPwrR = pRawDataSet[idxR].pwrPdg[i];
-
-                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
-
-                        maxPwrT4[i] = min(pPwrL[AR9287_PD_GAIN_ICEPTS - 1],
-                                          pPwrR[AR9287_PD_GAIN_ICEPTS - 1]);
-
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrL, pVpdL,
-                                                AR9287_PD_GAIN_ICEPTS,
-                                                vpdTableL[i]);
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrR, pVpdR,
-                                                AR9287_PD_GAIN_ICEPTS,
-                                                vpdTableR[i]);
-
-                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
-                                vpdTableI[i][j] = (u8)(ath9k_hw_interpolate(
-                                       (u16)FREQ2FBIN(centers. synth_center,
-                                                      IS_CHAN_2GHZ(chan)),
-                                       bChans[idxL], bChans[idxR],
-                                       vpdTableL[i][j], vpdTableR[i][j]));
-                        }
-                }
-        }
-
-        k = 0;
-
-        for (i = 0; i < numXpdGains; i++) {
-                if (i == (numXpdGains - 1))
-                        pPdGainBoundaries[i] =
-                                (u16)(maxPwrT4[i] / 2);
-                else
-                        pPdGainBoundaries[i] =
-                                (u16)((maxPwrT4[i] + minPwrT4[i+1]) / 4);
-
-                pPdGainBoundaries[i] = min((u16)AR5416_MAX_RATE_POWER,
-                                           pPdGainBoundaries[i]);
-
-
-                minDelta = 0;
-
-                if (i == 0) {
-                        if (AR_SREV_9280_20_OR_LATER(ah))
-                                ss = (int16_t)(0 - (minPwrT4[i] / 2));
-                        else
-                                ss = 0;
-                } else {
-                        ss = (int16_t)((pPdGainBoundaries[i-1] -
-                                        (minPwrT4[i] / 2)) -
-                                       tPdGainOverlap + 1 + minDelta);
-                }
-
-                vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                while ((ss < 0) && (k < (AR9287_NUM_PDADC_VALUES - 1))) {
-                        tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
-                        pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
-                        ss++;
-                }
-
-                sizeCurrVpdTable = (u8)((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
-                tgtIndex = (u8)(pPdGainBoundaries[i] +
-                                tPdGainOverlap - (minPwrT4[i] / 2));
-                maxIndex = (tgtIndex < sizeCurrVpdTable) ?
-                            tgtIndex : sizeCurrVpdTable;
-
-                while ((ss < maxIndex) && (k < (AR9287_NUM_PDADC_VALUES - 1)))
-                        pPDADCValues[k++] = vpdTableI[i][ss++];
-
-                vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
-                                    vpdTableI[i][sizeCurrVpdTable - 2]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                if (tgtIndex > maxIndex) {
-                        while ((ss <= tgtIndex) &&
-                                (k < (AR9287_NUM_PDADC_VALUES - 1))) {
-                                tmpVal = (int16_t) TMP_VAL_VPD_TABLE;
-                                pPDADCValues[k++] =
-                                        (u8)((tmpVal > 255) ? 255 : tmpVal);
-                                ss++;
-                        }
-                }
-        }
-
-        while (i < AR9287_PD_GAINS_IN_MASK) {
-                pPdGainBoundaries[i] = pPdGainBoundaries[i-1];
-                i++;
-        }
-
-        while (k < AR9287_NUM_PDADC_VALUES) {
-                pPDADCValues[k] = pPDADCValues[k-1];
-                k++;
-        }
-
-#undef TMP_VAL_VPD_TABLE
-}
-
 static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah,
                             struct ath9k_channel *chan,
                             struct cal_data_op_loop_ar9287 *pRawDatasetOpLoop,
@@ -389,7 +232,7 @@ static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah,
         ath9k_hw_get_channel_centers(ah, chan, &centers);
 
         for (numPiers = 0; numPiers < availPiers; numPiers++) {
-                if (pCalChans[numPiers] == AR9287_BCHAN_UNUSED)
+                if (pCalChans[numPiers] == AR5416_BCHAN_UNUSED)
                         break;
         }
 
@@ -455,11 +298,11 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
         struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop;
         u8 *pCalBChans = NULL;
         u16 pdGainOverlap_t2;
-        u8 pdadcValues[AR9287_NUM_PDADC_VALUES];
-        u16 gainBoundaries[AR9287_PD_GAINS_IN_MASK];
+        u8 pdadcValues[AR5416_NUM_PDADC_VALUES];
+        u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK];
         u16 numPiers = 0, i, j;
         u16 numXpdGain, xpdMask;
-        u16 xpdGainValues[AR9287_NUM_PD_GAINS] = {0, 0, 0, 0};
+        u16 xpdGainValues[AR5416_NUM_PD_GAINS] = {0, 0, 0, 0};
         u32 reg32, regOffset, regChainOffset, regval;
         int16_t modalIdx, diff = 0;
         struct ar9287_eeprom *pEepData = &ah->eeprom.map9287;
@@ -487,12 +330,12 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
         numXpdGain = 0;
 
         /* Calculate the value of xpdgains from the xpdGain Mask */
-        for (i = 1; i <= AR9287_PD_GAINS_IN_MASK; i++) {
-                if ((xpdMask >> (AR9287_PD_GAINS_IN_MASK - i)) & 1) {
-                        if (numXpdGain >= AR9287_NUM_PD_GAINS)
+        for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) {
+                if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) {
+                        if (numXpdGain >= AR5416_NUM_PD_GAINS)
                                 break;
                         xpdGainValues[numXpdGain] =
-                                (u16)(AR9287_PD_GAINS_IN_MASK-i);
+                                (u16)(AR5416_PD_GAINS_IN_MASK-i);
                         numXpdGain++;
                 }
         }
@@ -525,7 +368,7 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
                                         (struct cal_data_per_freq_ar9287 *)
                                         pEepData->calPierData2G[i];
 
-                                ath9k_hw_get_ar9287_gain_boundaries_pdadcs(ah, chan,
+                                ath9k_hw_get_gain_boundaries_pdadcs(ah, chan,
                                                            pRawDataset,
                                                            pCalBChans, numPiers,
                                                            pdGainOverlap_t2,
@@ -561,13 +404,13 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
                                              (int32_t)AR9287_PWR_TABLE_OFFSET_DB);
                                 diff *= 2;
 
-                                for (j = 0; j < ((u16)AR9287_NUM_PDADC_VALUES-diff); j++)
+                                for (j = 0; j < ((u16)AR5416_NUM_PDADC_VALUES-diff); j++)
                                         pdadcValues[j] = pdadcValues[j+diff];
 
-                                for (j = (u16)(AR9287_NUM_PDADC_VALUES-diff);
-                                     j < AR9287_NUM_PDADC_VALUES; j++)
+                                for (j = (u16)(AR5416_NUM_PDADC_VALUES-diff);
+                                     j < AR5416_NUM_PDADC_VALUES; j++)
                                         pdadcValues[j] =
-                                          pdadcValues[AR9287_NUM_PDADC_VALUES-diff];
+                                          pdadcValues[AR5416_NUM_PDADC_VALUES-diff];
                         }
 
                         if (!ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) {
@@ -610,9 +453,9 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,
 #define REDUCE_SCALED_POWER_BY_THREE_CHAIN   10
 
         struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-        u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         static const u16 tpScaleReductionTable[5] =
-                { 0, 3, 6, 9, AR5416_MAX_RATE_POWER };
+                { 0, 3, 6, 9, MAX_RATE_POWER };
         int i;
         int16_t twiceLargestAntenna;
         struct cal_ctl_data_ar9287 *rep;
@@ -877,8 +720,8 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
         regulatory->max_power_level = 0;
         for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
                 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
-                if (ratesArray[i] > AR9287_MAX_RATE_POWER)
-                        ratesArray[i] = AR9287_MAX_RATE_POWER;
+                if (ratesArray[i] > MAX_RATE_POWER)
+                        ratesArray[i] = MAX_RATE_POWER;
 
                 if (ratesArray[i] > regulatory->max_power_level)
                         regulatory->max_power_level = ratesArray[i];
@@ -1023,8 +866,7 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
                 antWrites[j++] = (u16)(pModal->antCtrlChain[i] & 0x3);
         }
 
-        REG_WRITE(ah, AR_PHY_SWITCH_COM,
-                  ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
+        REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
 
         for (i = 0; i < AR9287_MAX_CHAINS; i++) {
                 regChainOffset = i * 0x1000;
@@ -1125,21 +967,6 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
                                   pModal->xpaBiasLvl);
 }
 
-static u8 ath9k_hw_ar9287_get_num_ant_config(struct ath_hw *ah,
-                                             enum ath9k_hal_freq_band freq_band)
-{
-        return 1;
-}
-
-static u32 ath9k_hw_ar9287_get_eeprom_antenna_cfg(struct ath_hw *ah,
-                                                  struct ath9k_channel *chan)
-{
-        struct ar9287_eeprom *eep = &ah->eeprom.map9287;
-        struct modal_eep_ar9287_header *pModal = &eep->modalHeader;
-
-        return pModal->antCtrlCommon;
-}
-
 static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
                                             u16 i, bool is2GHz)
 {
@@ -1177,8 +1004,6 @@ const struct eeprom_ops eep_ar9287_ops = {
         .fill_eeprom            = ath9k_hw_ar9287_fill_eeprom,
         .get_eeprom_ver         = ath9k_hw_ar9287_get_eeprom_ver,
         .get_eeprom_rev         = ath9k_hw_ar9287_get_eeprom_rev,
-        .get_num_ant_config     = ath9k_hw_ar9287_get_num_ant_config,
-        .get_eeprom_antenna_cfg = ath9k_hw_ar9287_get_eeprom_antenna_cfg,
         .set_board_values       = ath9k_hw_ar9287_set_board_values,
         .set_addac              = ath9k_hw_ar9287_set_addac,
         .set_txpower            = ath9k_hw_ar9287_set_txpower,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index 5bfa031545f4..088f141f2006 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -206,7 +206,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
                                 pModal->antCtrlChain[i] = integer;
                         }
 
-                        for (i = 0; i < AR5416_EEPROM_MODAL_SPURS; i++) {
+                        for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
                                 word = swab16(pModal->spurChans[i].spurChan);
                                 pModal->spurChans[i].spurChan = word;
                         }
@@ -374,8 +374,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
         pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
         txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
 
-        REG_WRITE(ah, AR_PHY_SWITCH_COM,
-                  ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
+        REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff);
 
         for (i = 0; i < AR5416_MAX_CHAINS; i++) {
                 if (AR_SREV_9280(ah)) {
@@ -588,168 +587,6 @@ static void ath9k_hw_def_set_addac(struct ath_hw *ah,
 #undef XPA_LVL_FREQ
 }
 
-static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah,
-                                struct ath9k_channel *chan,
-                                struct cal_data_per_freq *pRawDataSet,
-                                u8 *bChans, u16 availPiers,
-                                u16 tPdGainOverlap,
-                                u16 *pPdGainBoundaries, u8 *pPDADCValues,
-                                u16 numXpdGains)
-{
-        int i, j, k;
-        int16_t ss;
-        u16 idxL = 0, idxR = 0, numPiers;
-        static u8 vpdTableL[AR5416_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableR[AR5416_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-        static u8 vpdTableI[AR5416_NUM_PD_GAINS]
-                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
-
-        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
-        u8 minPwrT4[AR5416_NUM_PD_GAINS];
-        u8 maxPwrT4[AR5416_NUM_PD_GAINS];
-        int16_t vpdStep;
-        int16_t tmpVal;
-        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
-        bool match;
-        int16_t minDelta = 0;
-        struct chan_centers centers;
-
-        memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS);
-        ath9k_hw_get_channel_centers(ah, chan, &centers);
-
-        for (numPiers = 0; numPiers < availPiers; numPiers++) {
-                if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
-                        break;
-        }
-
-        match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
-                                                             IS_CHAN_2GHZ(chan)),
-                                               bChans, numPiers, &idxL, &idxR);
-
-        if (match) {
-                for (i = 0; i < numXpdGains; i++) {
-                        minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0];
-                        maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4];
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                        pRawDataSet[idxL].pwrPdg[i],
-                                        pRawDataSet[idxL].vpdPdg[i],
-                                        AR5416_PD_GAIN_ICEPTS,
-                                        vpdTableI[i]);
-                }
-        } else {
-                for (i = 0; i < numXpdGains; i++) {
-                        pVpdL = pRawDataSet[idxL].vpdPdg[i];
-                        pPwrL = pRawDataSet[idxL].pwrPdg[i];
-                        pVpdR = pRawDataSet[idxR].vpdPdg[i];
-                        pPwrR = pRawDataSet[idxR].pwrPdg[i];
-
-                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
-
-                        maxPwrT4[i] =
-                                min(pPwrL[AR5416_PD_GAIN_ICEPTS - 1],
-                                    pPwrR[AR5416_PD_GAIN_ICEPTS - 1]);
-
-
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrL, pVpdL,
-                                                AR5416_PD_GAIN_ICEPTS,
-                                                vpdTableL[i]);
-                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
-                                                pPwrR, pVpdR,
-                                                AR5416_PD_GAIN_ICEPTS,
-                                                vpdTableR[i]);
-
-                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
-                                vpdTableI[i][j] =
-                                        (u8)(ath9k_hw_interpolate((u16)
-                                             FREQ2FBIN(centers.
-                                                       synth_center,
-                                                       IS_CHAN_2GHZ
-                                                       (chan)),
-                                             bChans[idxL], bChans[idxR],
-                                             vpdTableL[i][j], vpdTableR[i][j]));
-                        }
-                }
-        }
-
-        k = 0;
-
-        for (i = 0; i < numXpdGains; i++) {
-                if (i == (numXpdGains - 1))
-                        pPdGainBoundaries[i] =
-                                (u16)(maxPwrT4[i] / 2);
-                else
-                        pPdGainBoundaries[i] =
-                                (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
-
-                pPdGainBoundaries[i] =
-                        min((u16)AR5416_MAX_RATE_POWER, pPdGainBoundaries[i]);
-
-                if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
-                        minDelta = pPdGainBoundaries[0] - 23;
-                        pPdGainBoundaries[0] = 23;
-                } else {
-                        minDelta = 0;
-                }
-
-                if (i == 0) {
-                        if (AR_SREV_9280_20_OR_LATER(ah))
-                                ss = (int16_t)(0 - (minPwrT4[i] / 2));
-                        else
-                                ss = 0;
-                } else {
-                        ss = (int16_t)((pPdGainBoundaries[i - 1] -
-                                        (minPwrT4[i] / 2)) -
-                                       tPdGainOverlap + 1 + minDelta);
-                }
-                vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
-                        tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
-                        pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
-                        ss++;
-                }
-
-                sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
-                tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
-                                (minPwrT4[i] / 2));
-                maxIndex = (tgtIndex < sizeCurrVpdTable) ?
-                        tgtIndex : sizeCurrVpdTable;
-
-                while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
-                        pPDADCValues[k++] = vpdTableI[i][ss++];
-                }
-
-                vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
-                                    vpdTableI[i][sizeCurrVpdTable - 2]);
-                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
-
-                if (tgtIndex >= maxIndex) {
-                        while ((ss <= tgtIndex) &&
-                               (k < (AR5416_NUM_PDADC_VALUES - 1))) {
-                                tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
-                                                    (ss - maxIndex + 1) * vpdStep));
-                                pPDADCValues[k++] = (u8)((tmpVal > 255) ?
-                                                         255 : tmpVal);
-                                ss++;
-                        }
-                }
-        }
-
-        while (i < AR5416_PD_GAINS_IN_MASK) {
-                pPdGainBoundaries[i] = pPdGainBoundaries[i - 1];
-                i++;
-        }
-
-        while (k < AR5416_NUM_PDADC_VALUES) {
-                pPDADCValues[k] = pPDADCValues[k - 1];
-                k++;
-        }
-}
-
 static int16_t ath9k_change_gain_boundary_setting(struct ath_hw *ah,
                                 u16 *gb,
                                 u16 numXpdGain,
@@ -782,7 +619,7 @@ static int16_t ath9k_change_gain_boundary_setting(struct ath_hw *ah,
                 /* Because of a hardware limitation, ensure the gain boundary
                  * is not larger than (63 - overlap)
                  */
-                gb_limit = (u16)(AR5416_MAX_RATE_POWER - pdGainOverlap_t2);
+                gb_limit = (u16)(MAX_RATE_POWER - pdGainOverlap_t2);
 
                 for (k = 0; k < numXpdGain; k++)
                         gb[k] = (u16)min(gb_limit, gb[k]);
@@ -916,7 +753,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
                                 ath9k_olc_get_pdadcs(ah, pcdacIdx,
                                                      txPower/2, pdadcValues);
                         } else {
-                                ath9k_hw_get_def_gain_boundaries_pdadcs(ah,
+                                ath9k_hw_get_gain_boundaries_pdadcs(ah,
                                                         chan, pRawDataset,
                                                         pCalBChans, numPiers,
                                                         pdGainOverlap_t2,
@@ -1001,9 +838,9 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
 
         struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
         struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
-        u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        u16 twiceMaxEdgePower = MAX_RATE_POWER;
         static const u16 tpScaleReductionTable[5] =
-                { 0, 3, 6, 9, AR5416_MAX_RATE_POWER };
+                { 0, 3, 6, 9, MAX_RATE_POWER };
 
         int i;
         int16_t twiceLargestAntenna;
@@ -1148,7 +985,7 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
 
                 if (ah->eep_ops->get_eeprom_ver(ah) == 14 &&
                     ah->eep_ops->get_eeprom_rev(ah) <= 2)
-                        twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+                        twiceMaxEdgePower = MAX_RATE_POWER;
 
                 for (i = 0; (i < AR5416_NUM_CTLS) && pEepData->ctlIndex[i]; i++) {
                         if ((((cfgCtl & ~CTL_MODE_M) |
@@ -1293,8 +1130,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
         regulatory->max_power_level = 0;
         for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
                 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
-                if (ratesArray[i] > AR5416_MAX_RATE_POWER)
-                        ratesArray[i] = AR5416_MAX_RATE_POWER;
+                if (ratesArray[i] > MAX_RATE_POWER)
+                        ratesArray[i] = MAX_RATE_POWER;
                 if (ratesArray[i] > regulatory->max_power_level)
                         regulatory->max_power_level = ratesArray[i];
         }
@@ -1426,34 +1263,6 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
                   | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0));
 }
 
-static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah,
-                                          enum ath9k_hal_freq_band freq_band)
-{
-        struct ar5416_eeprom_def *eep = &ah->eeprom.def;
-        struct modal_eep_header *pModal =
-                &(eep->modalHeader[freq_band]);
-        struct base_eep_header *pBase = &eep->baseEepHeader;
-        u8 num_ant_config;
-
-        num_ant_config = 1;
-
-        if (pBase->version >= 0x0E0D &&
-            (pModal->lna_ctl & LNA_CTL_USE_ANT1))
-                num_ant_config += 1;
-
-        return num_ant_config;
-}
-
-static u32 ath9k_hw_def_get_eeprom_antenna_cfg(struct ath_hw *ah,
-                                               struct ath9k_channel *chan)
-{
-        struct ar5416_eeprom_def *eep = &ah->eeprom.def;
-        struct modal_eep_header *pModal =
-                &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
-
-        return pModal->antCtrlCommon;
-}
-
 static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
 {
 #define EEP_DEF_SPURCHAN \
@@ -1490,8 +1299,6 @@ const struct eeprom_ops eep_def_ops = {
         .fill_eeprom            = ath9k_hw_def_fill_eeprom,
         .get_eeprom_ver         = ath9k_hw_def_get_eeprom_ver,
         .get_eeprom_rev         = ath9k_hw_def_get_eeprom_rev,
-        .get_num_ant_config     = ath9k_hw_def_get_num_ant_config,
-        .get_eeprom_antenna_cfg = ath9k_hw_def_get_eeprom_antenna_cfg,
         .set_board_values       = ath9k_hw_def_set_board_values,
         .set_addac              = ath9k_hw_def_set_addac,
         .set_txpower            = ath9k_hw_def_set_txpower,
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
index d0918bd23b8e..22b68b3c8566 100644
--- a/drivers/net/wireless/ath/ath9k/hif_usb.c
+++ b/drivers/net/wireless/ath/ath9k/hif_usb.c
@@ -38,6 +38,7 @@ static struct usb_device_id ath9k_hif_usb_ids[] = {
         { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */
         { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */
         { USB_DEVICE(0x040D, 0x3801) }, /* VIA */
+        { USB_DEVICE(0x0cf3, 0xb003) }, /* Ubiquiti WifiStation Ext */
 
         { USB_DEVICE(0x0cf3, 0x7015),
           .driver_info = AR9287_USB },  /* Atheros */
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 20ea75a44e52..dd17909bd903 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1170,9 +1170,6 @@ static int ath9k_htc_start(struct ieee80211_hw *hw)
         /* setup initial channel */
         init_channel = ath9k_cmn_get_curchannel(hw, ah);
 
-        /* Reset SERDES registers */
-        ath9k_hw_configpcipowersave(ah, 0, 0);
-
         ath9k_hw_htc_resetinit(ah);
         ret = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
         if (ret) {
@@ -1258,7 +1255,6 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw)
 
         ath9k_hw_phy_disable(ah);
         ath9k_hw_disable(ah);
-        ath9k_hw_configpcipowersave(ah, 1, 1);
         ath9k_htc_ps_restore(priv);
         ath9k_htc_setpower(priv, ATH9K_PM_FULL_SLEEP);
 
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
index 31fad82239b3..33f36029fa4f 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
@@ -251,7 +251,7 @@ void ath9k_tx_tasklet(unsigned long data)
                                 ista = (struct ath9k_htc_sta *)sta->drv_priv;
 
                                 if (ath9k_htc_check_tx_aggr(priv, ista, tid)) {
-                                        ieee80211_start_tx_ba_session(sta, tid);
+                                        ieee80211_start_tx_ba_session(sta, tid, 0);
                                         spin_lock_bh(&priv->tx_lock);
                                         ista->tid_state[tid] = AGGR_PROGRESS;
                                         spin_unlock_bh(&priv->tx_lock);
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index 0a4ad348b699..c8f254fe0f0b 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -223,11 +223,6 @@ static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
         return ath9k_hw_private_ops(ah)->rfbus_done(ah);
 }
 
-static inline void ath9k_enable_rfkill(struct ath_hw *ah)
-{
-        return ath9k_hw_private_ops(ah)->enable_rfkill(ah);
-}
-
 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
 {
         if (!ath9k_hw_private_ops(ah)->restore_chainmask)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 516227fa668e..4b51ed47fe69 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -54,13 +54,6 @@ static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
         ath9k_hw_private_ops(ah)->init_mode_regs(ah);
 }
 
-static bool ath9k_hw_macversion_supported(struct ath_hw *ah)
-{
-        struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
-
-        return priv_ops->macversion_supported(ah->hw_version.macVersion);
-}
-
 static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
                                         struct ath9k_channel *chan)
 {
@@ -284,11 +277,9 @@ static void ath9k_hw_read_revisions(struct ath_hw *ah)
 
 static void ath9k_hw_disablepcie(struct ath_hw *ah)
 {
-        if (AR_SREV_9100(ah))
+        if (!AR_SREV_5416(ah))
                 return;
 
-        ENABLE_REGWRITE_BUFFER(ah);
-
         REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
         REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
         REG_WRITE(ah, AR_PCIE_SERDES, 0x28000029);
@@ -300,8 +291,6 @@ static void ath9k_hw_disablepcie(struct ath_hw *ah)
         REG_WRITE(ah, AR_PCIE_SERDES, 0x000e1007);
 
         REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
-
-        REGWRITE_BUFFER_FLUSH(ah);
 }
 
 /* This should work for all families including legacy */
@@ -418,9 +407,8 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
         ah->sta_id1_defaults =
                 AR_STA_ID1_CRPT_MIC_ENABLE |
                 AR_STA_ID1_MCAST_KSRCH;
-        ah->beacon_interval = 100;
         ah->enable_32kHz_clock = DONT_USE_32KHZ;
-        ah->slottime = (u32) -1;
+        ah->slottime = 20;
         ah->globaltxtimeout = (u32) -1;
         ah->power_mode = ATH9K_PM_UNDEFINED;
 }
@@ -538,7 +526,19 @@ static int __ath9k_hw_init(struct ath_hw *ah)
         else
                 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
 
-        if (!ath9k_hw_macversion_supported(ah)) {
+        switch (ah->hw_version.macVersion) {
+        case AR_SREV_VERSION_5416_PCI:
+        case AR_SREV_VERSION_5416_PCIE:
+        case AR_SREV_VERSION_9160:
+        case AR_SREV_VERSION_9100:
+        case AR_SREV_VERSION_9280:
+        case AR_SREV_VERSION_9285:
+        case AR_SREV_VERSION_9287:
+        case AR_SREV_VERSION_9271:
+        case AR_SREV_VERSION_9300:
+        case AR_SREV_VERSION_9485:
+                break;
+        default:
                 ath_err(common,
                         "Mac Chip Rev 0x%02x.%x is not supported by this driver\n",
                         ah->hw_version.macVersion, ah->hw_version.macRev);
@@ -808,7 +808,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
         if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
                 acktimeout += 64 - sifstime - ah->slottime;
 
-        ath9k_hw_setslottime(ah, slottime);
+        ath9k_hw_setslottime(ah, ah->slottime);
         ath9k_hw_set_ack_timeout(ah, acktimeout);
         ath9k_hw_set_cts_timeout(ah, acktimeout);
         if (ah->globaltxtimeout != (u32) -1)
@@ -1272,6 +1272,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
 
         ath9k_hw_mark_phy_inactive(ah);
 
+        ah->paprd_table_write_done = false;
+
         /* Only required on the first reset */
         if (AR_SREV_9271(ah) && ah->htc_reset_init) {
                 REG_WRITE(ah,
@@ -1383,7 +1385,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
         ath9k_hw_init_qos(ah);
 
         if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
-                ath9k_enable_rfkill(ah);
+                ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
 
         ath9k_hw_init_global_settings(ah);
 
@@ -1627,17 +1629,9 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
 {
         int flags = 0;
 
-        ah->beacon_interval = beacon_period;
-
         ENABLE_REGWRITE_BUFFER(ah);
 
         switch (ah->opmode) {
-        case NL80211_IFTYPE_STATION:
-                REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
-                REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
-                REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
-                flags |= AR_TBTT_TIMER_EN;
-                break;
         case NL80211_IFTYPE_ADHOC:
         case NL80211_IFTYPE_MESH_POINT:
                 REG_SET_BIT(ah, AR_TXCFG,
@@ -1661,14 +1655,6 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
                         AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
                 break;
         default:
-                if (ah->is_monitoring) {
-                        REG_WRITE(ah, AR_NEXT_TBTT_TIMER,
-                                        TU_TO_USEC(next_beacon));
-                        REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
-                        REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
-                        flags |= AR_TBTT_TIMER_EN;
-                        break;
-                }
                 ath_dbg(ath9k_hw_common(ah), ATH_DBG_BEACON,
                         "%s: unsupported opmode: %d\n",
                         __func__, ah->opmode);
@@ -1920,11 +1906,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
             AR_SREV_5416(ah))
                 pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND;
 
-        pCap->num_antcfg_5ghz =
-                ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_5GHZ);
-        pCap->num_antcfg_2ghz =
-                ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ);
-
         if (AR_SREV_9280_20_OR_LATER(ah) && common->btcoex_enabled) {
                 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO;
                 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO;
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index d83cc3b4685b..b8ffaa5dc650 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -204,8 +204,6 @@ struct ath9k_hw_capabilities {
         u16 tx_triglevel_max;
         u16 reg_cap;
         u8 num_gpio_pins;
-        u8 num_antcfg_2ghz;
-        u8 num_antcfg_5ghz;
         u8 rx_hp_qdepth;
         u8 rx_lp_qdepth;
         u8 rx_status_len;
@@ -238,7 +236,6 @@ struct ath9k_ops_config {
 #define SPUR_DISABLE            0
 #define SPUR_ENABLE_IOCTL       1
 #define SPUR_ENABLE_EEPROM      2
-#define AR_EEPROM_MODAL_SPURS   5
 #define AR_SPUR_5413_1          1640
 #define AR_SPUR_5413_2          1200
 #define AR_NO_SPUR              0x8000
@@ -535,7 +532,6 @@ struct ath_hw_radar_conf {
  *
  * @init_mode_regs: Initializes mode registers
  * @init_mode_gain_regs: Initialize TX/RX gain registers
- * @macversion_supported: If this specific mac revision is supported
  *
  * @rf_set_freq: change frequency
  * @spur_mitigate_freq: spur mitigation
@@ -557,7 +553,6 @@ struct ath_hw_private_ops {
 
         void (*init_mode_regs)(struct ath_hw *ah);
         void (*init_mode_gain_regs)(struct ath_hw *ah);
-        bool (*macversion_supported)(u32 macversion);
         void (*setup_calibration)(struct ath_hw *ah,
                                   struct ath9k_cal_list *currCal);
 
@@ -581,7 +576,6 @@ struct ath_hw_private_ops {
         void (*set_delta_slope)(struct ath_hw *ah, struct ath9k_channel *chan);
         bool (*rfbus_req)(struct ath_hw *ah);
         void (*rfbus_done)(struct ath_hw *ah);
-        void (*enable_rfkill)(struct ath_hw *ah);
         void (*restore_chainmask)(struct ath_hw *ah);
         void (*set_diversity)(struct ath_hw *ah, bool value);
         u32 (*compute_pll_control)(struct ath_hw *ah,
@@ -767,9 +761,7 @@ struct ath_hw {
         u32 *bank6Temp;
 
         u8 txpower_limit;
-        int16_t txpower_indexoffset;
         int coverage_class;
-        u32 beacon_interval;
         u32 slottime;
         u32 globaltxtimeout;
 
@@ -840,6 +832,11 @@ struct ath_hw {
         u32 bb_watchdog_last_status;
         u32 bb_watchdog_timeout_ms; /* in ms, 0 to disable */
 
+        unsigned int paprd_target_power;
+        unsigned int paprd_training_power;
+        unsigned int paprd_ratemask;
+        unsigned int paprd_ratemask_ht40;
+        bool paprd_table_write_done;
         u32 paprd_gain_table_entries[PAPRD_GAIN_TABLE_ENTRIES];
         u8 paprd_gain_table_index[PAPRD_GAIN_TABLE_ENTRIES];
         /*
@@ -873,6 +870,11 @@ static inline struct ath_hw_ops *ath9k_hw_ops(struct ath_hw *ah)
         return &ah->ops;
 }
 
+static inline u8 get_streams(int mask)
+{
+        return !!(mask & BIT(0)) + !!(mask & BIT(1)) + !!(mask & BIT(2));
+}
+
 /* Initialization, Detach, Reset */
 const char *ath9k_hw_probe(u16 vendorid, u16 devid);
 void ath9k_hw_deinit(struct ath_hw *ah);
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index b2983ce19dfb..b0e5e716b167 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -41,9 +41,14 @@ static int ath9k_btcoex_enable;
 module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444);
 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
 
+int ath9k_pm_qos_value = ATH9K_PM_QOS_DEFAULT_VALUE;
+module_param_named(pmqos, ath9k_pm_qos_value, int, S_IRUSR | S_IRGRP | S_IROTH);
+MODULE_PARM_DESC(pmqos, "User specified PM-QOS value");
+
 /* We use the hw_value as an index into our private channel structure */
 
 #define CHAN2G(_freq, _idx)  { \
+        .band = IEEE80211_BAND_2GHZ, \
         .center_freq = (_freq), \
         .hw_value = (_idx), \
         .max_power = 20, \
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index daa3c9feca66..8a1691db166d 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -320,6 +320,42 @@ static void ath_paprd_activate(struct ath_softc *sc)
         ath9k_ps_restore(sc);
 }
 
+static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ath_tx_control txctl;
+        int time_left;
+
+        memset(&txctl, 0, sizeof(txctl));
+        txctl.txq = sc->tx.txq_map[WME_AC_BE];
+
+        memset(tx_info, 0, sizeof(*tx_info));
+        tx_info->band = hw->conf.channel->band;
+        tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
+        tx_info->control.rates[0].idx = 0;
+        tx_info->control.rates[0].count = 1;
+        tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
+        tx_info->control.rates[1].idx = -1;
+
+        init_completion(&sc->paprd_complete);
+        sc->paprd_pending = true;
+        txctl.paprd = BIT(chain);
+        if (ath_tx_start(hw, skb, &txctl) != 0)
+                return false;
+
+        time_left = wait_for_completion_timeout(&sc->paprd_complete,
+                        msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
+        sc->paprd_pending = false;
+
+        if (!time_left)
+                ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
+                        "Timeout waiting for paprd training on TX chain %d\n",
+                        chain);
+
+        return !!time_left;
+}
+
 void ath_paprd_calibrate(struct work_struct *work)
 {
         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
@@ -327,28 +363,23 @@ void ath_paprd_calibrate(struct work_struct *work)
         struct ath_hw *ah = sc->sc_ah;
         struct ieee80211_hdr *hdr;
         struct sk_buff *skb = NULL;
-        struct ieee80211_tx_info *tx_info;
-        int band = hw->conf.channel->band;
-        struct ieee80211_supported_band *sband = &sc->sbands[band];
-        struct ath_tx_control txctl;
         struct ath9k_hw_cal_data *caldata = ah->caldata;
         struct ath_common *common = ath9k_hw_common(ah);
         int ftype;
         int chain_ok = 0;
         int chain;
         int len = 1800;
-        int time_left;
-        int i;
 
         if (!caldata)
                 return;
 
+        if (ar9003_paprd_init_table(ah) < 0)
+                return;
+
         skb = alloc_skb(len, GFP_KERNEL);
         if (!skb)
                 return;
 
-        tx_info = IEEE80211_SKB_CB(skb);
-
         skb_put(skb, len);
         memset(skb->data, 0, len);
         hdr = (struct ieee80211_hdr *)skb->data;
@@ -359,40 +390,25 @@ void ath_paprd_calibrate(struct work_struct *work)
         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 
-        memset(&txctl, 0, sizeof(txctl));
-        txctl.txq = sc->tx.txq_map[WME_AC_BE];
-
         ath9k_ps_wakeup(sc);
-        ar9003_paprd_init_table(ah);
         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
                 if (!(common->tx_chainmask & BIT(chain)))
                         continue;
 
                 chain_ok = 0;
-                memset(tx_info, 0, sizeof(*tx_info));
-                tx_info->band = band;
 
-                for (i = 0; i < 4; i++) {
-                        tx_info->control.rates[i].idx = sband->n_bitrates - 1;
-                        tx_info->control.rates[i].count = 6;
-                }
+                ath_dbg(common, ATH_DBG_CALIBRATE,
+                        "Sending PAPRD frame for thermal measurement "
+                        "on chain %d\n", chain);
+                if (!ath_paprd_send_frame(sc, skb, chain))
+                        goto fail_paprd;
 
-                init_completion(&sc->paprd_complete);
-                sc->paprd_pending = true;
                 ar9003_paprd_setup_gain_table(ah, chain);
-                txctl.paprd = BIT(chain);
-                if (ath_tx_start(hw, skb, &txctl) != 0)
-                        break;
 
-                time_left = wait_for_completion_timeout(&sc->paprd_complete,
-                                msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
-                sc->paprd_pending = false;
-                if (!time_left) {
-                        ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
-                                "Timeout waiting for paprd training on TX chain %d\n",
-                                chain);
+                ath_dbg(common, ATH_DBG_CALIBRATE,
+                        "Sending PAPRD training frame on chain %d\n", chain);
+                if (!ath_paprd_send_frame(sc, skb, chain))
                         goto fail_paprd;
-                }
 
                 if (!ar9003_paprd_is_done(ah))
                         break;
@@ -517,37 +533,11 @@ set_timer:
         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
                 if (!ah->caldata->paprd_done)
                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
-                else
+                else if (!ah->paprd_table_write_done)
                         ath_paprd_activate(sc);
         }
 }
 
-/*
- * Update tx/rx chainmask. For legacy association,
- * hard code chainmask to 1x1, for 11n association, use
- * the chainmask configuration, for bt coexistence, use
- * the chainmask configuration even in legacy mode.
- */
-void ath_update_chainmask(struct ath_softc *sc, int is_ht)
-{
-        struct ath_hw *ah = sc->sc_ah;
-        struct ath_common *common = ath9k_hw_common(ah);
-
-        if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
-            (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
-                common->tx_chainmask = ah->caps.tx_chainmask;
-                common->rx_chainmask = ah->caps.rx_chainmask;
-        } else {
-                common->tx_chainmask = 1;
-                common->rx_chainmask = 1;
-        }
-
-        ath_dbg(common, ATH_DBG_CONFIG,
-                "tx chmask: %d, rx chmask: %d\n",
-                common->tx_chainmask,
-                common->rx_chainmask);
-}
-
 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 {
         struct ath_node *an;
@@ -900,8 +890,7 @@ void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
         ath_update_txpow(sc);
         if (ath_startrecv(sc) != 0) {
                 ath_err(common, "Unable to restart recv logic\n");
-                spin_unlock_bh(&sc->sc_pcu_lock);
-                return;
+                goto out;
         }
         if (sc->sc_flags & SC_OP_BEACONS)
                 ath_beacon_config(sc, NULL);    /* restart beacons */
@@ -915,6 +904,7 @@ void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 
         ieee80211_wake_queues(hw);
+out:
         spin_unlock_bh(&sc->sc_pcu_lock);
 
         ath9k_ps_restore(sc);
@@ -1180,7 +1170,11 @@ static int ath9k_start(struct ieee80211_hw *hw)
                         ath9k_btcoex_timer_resume(sc);
         }
 
-        pm_qos_update_request(&sc->pm_qos_req, 55);
+        /* User has the option to provide pm-qos value as a module
+         * parameter rather than using the default value of
+         * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
+         */
+        pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
 
         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
                 common->bus_ops->extn_synch_en(common);
@@ -1333,8 +1327,8 @@ static void ath9k_stop(struct ieee80211_hw *hw)
 
         ath9k_ps_restore(sc);
 
-        /* Finally, put the chip in FULL SLEEP mode */
-        ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
+        sc->ps_idle = true;
+        ath_radio_disable(sc, hw);
 
         sc->sc_flags |= SC_OP_INVALID;
 
@@ -1428,13 +1422,78 @@ out:
         return ret;
 }
 
+static void ath9k_reclaim_beacon(struct ath_softc *sc,
+                                 struct ieee80211_vif *vif)
+{
+        struct ath_vif *avp = (void *)vif->drv_priv;
+
+        /* Disable SWBA interrupt */
+        sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
+        ath9k_ps_wakeup(sc);
+        ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
+        ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
+        tasklet_kill(&sc->bcon_tasklet);
+        ath9k_ps_restore(sc);
+
+        ath_beacon_return(sc, avp);
+        sc->sc_flags &= ~SC_OP_BEACONS;
+
+        if (sc->nbcnvifs > 0) {
+                /* Re-enable beaconing */
+                sc->sc_ah->imask |= ATH9K_INT_SWBA;
+                ath9k_ps_wakeup(sc);
+                ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
+                ath9k_ps_restore(sc);
+        }
+}
+
+static int ath9k_change_interface(struct ieee80211_hw *hw,
+                                  struct ieee80211_vif *vif,
+                                  enum nl80211_iftype new_type,
+                                  bool p2p)
+{
+        struct ath_wiphy *aphy = hw->priv;
+        struct ath_softc *sc = aphy->sc;
+        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+
+        ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
+        mutex_lock(&sc->mutex);
+
+        switch (new_type) {
+        case NL80211_IFTYPE_AP:
+        case NL80211_IFTYPE_ADHOC:
+                if (sc->nbcnvifs >= ATH_BCBUF) {
+                        ath_err(common, "No beacon slot available\n");
+                        return -ENOBUFS;
+                }
+                break;
+        case NL80211_IFTYPE_STATION:
+                /* Stop ANI */
+                sc->sc_flags &= ~SC_OP_ANI_RUN;
+                del_timer_sync(&common->ani.timer);
+                if ((vif->type == NL80211_IFTYPE_AP) ||
+                    (vif->type == NL80211_IFTYPE_ADHOC))
+                        ath9k_reclaim_beacon(sc, vif);
+                break;
+        default:
+                ath_err(common, "Interface type %d not yet supported\n",
+                                vif->type);
+                mutex_unlock(&sc->mutex);
+                return -ENOTSUPP;
+        }
+        vif->type = new_type;
+        vif->p2p = p2p;
+
+        mutex_unlock(&sc->mutex);
+        return 0;
+}
+
 static void ath9k_remove_interface(struct ieee80211_hw *hw,
                                    struct ieee80211_vif *vif)
 {
         struct ath_wiphy *aphy = hw->priv;
         struct ath_softc *sc = aphy->sc;
         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-        struct ath_vif *avp = (void *)vif->drv_priv;
 
         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
 
@@ -1447,26 +1506,8 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
         /* Reclaim beacon resources */
         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
-            (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
-                /* Disable SWBA interrupt */
-                sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
-                ath9k_ps_wakeup(sc);
-                ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
-                ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
-                ath9k_ps_restore(sc);
-                tasklet_kill(&sc->bcon_tasklet);
-        }
-
-        ath_beacon_return(sc, avp);
-        sc->sc_flags &= ~SC_OP_BEACONS;
-
-        if (sc->nbcnvifs) {
-                /* Re-enable SWBA interrupt */
-                sc->sc_ah->imask |= ATH9K_INT_SWBA;
-                ath9k_ps_wakeup(sc);
-                ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
-                ath9k_ps_restore(sc);
-        }
+            (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
+                ath9k_reclaim_beacon(sc, vif);
 
         sc->nvifs--;
 
@@ -1612,8 +1653,6 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
                 /* XXX: remove me eventualy */
                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
 
-                ath_update_chainmask(sc, conf_is_ht(conf));
-
                 /* update survey stats for the old channel before switching */
                 spin_lock_irqsave(&common->cc_lock, flags);
                 ath_update_survey_stats(sc);
@@ -1845,10 +1884,6 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
                 /* Set aggregation protection mode parameters */
                 sc->config.ath_aggr_prot = 0;
 
-                /* Only legacy IBSS for now */
-                if (vif->type == NL80211_IFTYPE_ADHOC)
-                        ath_update_chainmask(sc, 0);
-
                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
                         common->curbssid, common->curaid);
 
@@ -1940,7 +1975,9 @@ static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
         struct ath_softc *sc = aphy->sc;
 
         mutex_lock(&sc->mutex);
+        ath9k_ps_wakeup(sc);
         tsf = ath9k_hw_gettsf64(sc->sc_ah);
+        ath9k_ps_restore(sc);
         mutex_unlock(&sc->mutex);
 
         return tsf;
@@ -1952,7 +1989,9 @@ static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
         struct ath_softc *sc = aphy->sc;
 
         mutex_lock(&sc->mutex);
+        ath9k_ps_wakeup(sc);
         ath9k_hw_settsf64(sc->sc_ah, tsf);
+        ath9k_ps_restore(sc);
         mutex_unlock(&sc->mutex);
 }
 
@@ -2111,6 +2150,7 @@ struct ieee80211_ops ath9k_ops = {
         .start              = ath9k_start,
         .stop               = ath9k_stop,
         .add_interface      = ath9k_add_interface,
+        .change_interface   = ath9k_change_interface,
         .remove_interface   = ath9k_remove_interface,
         .config             = ath9k_config,
         .configure_filter   = ath9k_configure_filter,
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 747b2871e48f..7ca8499249ec 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -309,6 +309,9 @@ static int ath_pci_resume(struct device *device)
                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
         ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
 
+        sc->ps_idle = true;
+        ath_radio_disable(sc, hw);
+
         return 0;
 }
 
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 2061a755a026..896d12986b1e 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -1373,7 +1373,7 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
                         an = (struct ath_node *)sta->drv_priv;
 
                         if(ath_tx_aggr_check(sc, an, tid))
-                                ieee80211_start_tx_ba_session(sta, tid);
+                                ieee80211_start_tx_ba_session(sta, tid, 0);
                 }
         }
 
diff --git a/drivers/net/wireless/ath/ath9k/virtual.c b/drivers/net/wireless/ath/ath9k/virtual.c
index fbfbc8239971..2dc7095e56d1 100644
--- a/drivers/net/wireless/ath/ath9k/virtual.c
+++ b/drivers/net/wireless/ath/ath9k/virtual.c
@@ -288,7 +288,6 @@ void ath9k_wiphy_chan_work(struct work_struct *work)
         /* sync hw configuration for hw code */
         common->hw = aphy->hw;
 
-        ath_update_chainmask(sc, sc->chan_is_ht);
         if (ath_set_channel(sc, aphy->hw,
                             &sc->sc_ah->channels[sc->chan_idx]) < 0) {
                 printk(KERN_DEBUG "ath9k: Failed to set channel for new "
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 43c0109f202c..332d1feb5c18 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -838,7 +838,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
                 ath_tx_txqaddbuf(sc, txq, &bf_q);
                 TX_STAT_INC(txq->axq_qnum, a_aggr);
 
-        } while (txq->axq_depth < ATH_AGGR_MIN_QDEPTH &&
+        } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
                  status != ATH_AGGR_BAW_CLOSED);
 }
 
@@ -999,6 +999,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
                 INIT_LIST_HEAD(&txq->axq_acq);
                 spin_lock_init(&txq->axq_lock);
                 txq->axq_depth = 0;
+                txq->axq_ampdu_depth = 0;
                 txq->axq_tx_inprogress = false;
                 sc->tx.txqsetup |= 1<<qnum;
 
@@ -1068,6 +1069,12 @@ int ath_cabq_update(struct ath_softc *sc)
         return 0;
 }
 
+static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
+    return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
+}
+
 /*
  * Drain a given TX queue (could be Beacon or Data)
  *
@@ -1126,7 +1133,8 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
                 }
 
                 txq->axq_depth--;
-
+                if (bf_is_ampdu_not_probing(bf))
+                        txq->axq_ampdu_depth--;
                 spin_unlock_bh(&txq->axq_lock);
 
                 if (bf_isampdu(bf))
@@ -1316,6 +1324,8 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
                 ath9k_hw_txstart(ah, txq->axq_qnum);
         }
         txq->axq_depth++;
+        if (bf_is_ampdu_not_probing(bf))
+                txq->axq_ampdu_depth++;
 }
 
 static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
@@ -1336,7 +1346,7 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
          */
         if (!list_empty(&tid->buf_q) || tid->paused ||
             !BAW_WITHIN(tid->seq_start, tid->baw_size, fi->seqno) ||
-            txctl->txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) {
+            txctl->txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) {
                 /*
                  * Add this frame to software queue for scheduling later
                  * for aggregation.
@@ -1685,17 +1695,20 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
         struct list_head bf_head;
-        struct ath_atx_tid *tid;
+        struct ath_atx_tid *tid = NULL;
         u8 tidno;
 
         spin_lock_bh(&txctl->txq->axq_lock);
 
-        if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && txctl->an) {
+        if (ieee80211_is_data_qos(hdr->frame_control) && txctl->an) {
                 tidno = ieee80211_get_qos_ctl(hdr)[0] &
                         IEEE80211_QOS_CTL_TID_MASK;
                 tid = ATH_AN_2_TID(txctl->an, tidno);
 
                 WARN_ON(tid->ac->txq != txctl->txq);
+        }
+
+        if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && tid) {
                 /*
                  * Try aggregation if it's a unicast data frame
                  * and the destination is HT capable.
@@ -1712,7 +1725,7 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
                         ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc,
                                                    bf->bf_state.bfs_paprd);
 
-                ath_tx_send_normal(sc, txctl->txq, NULL, &bf_head);
+                ath_tx_send_normal(sc, txctl->txq, tid, &bf_head);
         }
 
         spin_unlock_bh(&txctl->txq->axq_lock);
@@ -2037,6 +2050,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
                 txq->axq_tx_inprogress = false;
                 if (bf_held)
                         list_del(&bf_held->list);
+
+                if (bf_is_ampdu_not_probing(bf))
+                        txq->axq_ampdu_depth--;
                 spin_unlock_bh(&txq->axq_lock);
 
                 if (bf_held)
@@ -2165,6 +2181,8 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
                 INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
                 txq->axq_depth--;
                 txq->axq_tx_inprogress = false;
+                if (bf_is_ampdu_not_probing(bf))
+                        txq->axq_ampdu_depth--;
                 spin_unlock_bh(&txq->axq_lock);
 
                 txok = !(txs.ts_status & ATH9K_TXERR_MASK);
diff --git a/drivers/net/wireless/ath/key.c b/drivers/net/wireless/ath/key.c
index 29a2961af5fc..5d465e5fcf24 100644
--- a/drivers/net/wireless/ath/key.c
+++ b/drivers/net/wireless/ath/key.c
@@ -58,6 +58,8 @@ bool ath_hw_keyreset(struct ath_common *common, u16 entry)
                 REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
                 REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
                 REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
+                if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)
+                        REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
 
         }
 
diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c
index 3f4244f56ce5..2b14775e6bc6 100644
--- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c
@@ -342,6 +342,14 @@ int ath_reg_notifier_apply(struct wiphy *wiphy,
         /* We always apply this */
         ath_reg_apply_radar_flags(wiphy);
 
+        /*
+         * This would happen when we have sent a custom regulatory request
+         * a world regulatory domain and the scheduler hasn't yet processed
+         * any pending requests in the queue.
+         */
+        if (!request)
+                return 0;
+
         switch (request->initiator) {
         case NL80211_REGDOM_SET_BY_DRIVER:
         case NL80211_REGDOM_SET_BY_CORE:
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 9aad2ca3c112..bd4cb75b6ca3 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -416,10 +416,10 @@ enum {
 
 /* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
 #define B43_TMSLOW_GMODE                0x20000000      /* G Mode Enable */
-#define B43_TMSLOW_PHYCLKSPEED          0x00C00000      /* PHY clock speed mask (N-PHY only) */
-#define  B43_TMSLOW_PHYCLKSPEED_40MHZ   0x00000000      /* 40 MHz PHY */
-#define  B43_TMSLOW_PHYCLKSPEED_80MHZ   0x00400000      /* 80 MHz PHY */
-#define  B43_TMSLOW_PHYCLKSPEED_160MHZ  0x00800000      /* 160 MHz PHY */
+#define B43_TMSLOW_PHY_BANDWIDTH        0x00C00000      /* PHY band width and clock speed mask (N-PHY only) */
+#define  B43_TMSLOW_PHY_BANDWIDTH_10MHZ 0x00000000      /* 10 MHz bandwidth, 40 MHz PHY */
+#define  B43_TMSLOW_PHY_BANDWIDTH_20MHZ 0x00400000      /* 20 MHz bandwidth, 80 MHz PHY */
+#define  B43_TMSLOW_PHY_BANDWIDTH_40MHZ 0x00800000      /* 40 MHz bandwidth, 160 MHz PHY */
 #define B43_TMSLOW_PLLREFSEL            0x00200000      /* PLL Frequency Reference Select (rev >= 5) */
 #define B43_TMSLOW_MACPHYCLKEN          0x00100000      /* MAC PHY Clock Control Enable (rev >= 5) */
 #define B43_TMSLOW_PHYRESET             0x00080000      /* PHY Reset */
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 9ae3f619e98d..1aec160e3d2f 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1150,12 +1150,8 @@ void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
 
         flags |= B43_TMSLOW_PHYCLKEN;
         flags |= B43_TMSLOW_PHYRESET;
-        if (dev->phy.type == B43_PHYTYPE_N) {
-                if (b43_channel_type_is_40mhz(dev->phy.channel_type))
-                        flags |= B43_TMSLOW_PHYCLKSPEED_160MHZ;
-                else
-                        flags |= B43_TMSLOW_PHYCLKSPEED_80MHZ;
-        }
+        if (dev->phy.type == B43_PHYTYPE_N)
+                flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
         ssb_device_enable(dev->dev, flags);
         msleep(2);              /* Wait for the PLL to turn on. */
 
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 61875c888278..a1aa5700b631 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -1209,29 +1209,18 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
                         b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
                 }
 
-                /* TODO: convert to b43_ntab_write? */
-                b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
-                b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
-                b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
-                b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
-                b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
-                b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
-                b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
-                b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
+                b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0x000A);
+                b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0x000A);
+                b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA);
+                b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA);
 
                 if (dev->phy.rev < 2) {
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
-                        b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
-                        b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0x0000);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0x0000);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x0800);
+                        b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x0800);
                 }
 
                 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
@@ -3278,9 +3267,9 @@ static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
 {
         u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
         if (on)
-                tmslow |= SSB_TMSLOW_PHYCLK;
+                tmslow |= B43_TMSLOW_MACPHYCLKEN;
         else
-                tmslow &= ~SSB_TMSLOW_PHYCLK;
+                tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 }
 
diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c
index df61c1610e39..dc8ef09a8552 100644
--- a/drivers/net/wireless/b43/tables_nphy.c
+++ b/drivers/net/wireless/b43/tables_nphy.c
@@ -1835,12 +1835,12 @@ void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev)
         /* Volatile tables */
         ntab_upload(dev, B43_NTAB_BDI, b43_ntab_bdi);
         ntab_upload(dev, B43_NTAB_PILOTLT, b43_ntab_pilotlt);
+        ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0);
+        ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1);
         ntab_upload(dev, B43_NTAB_C0_ESTPLT, b43_ntab_estimatepowerlt0);
         ntab_upload(dev, B43_NTAB_C1_ESTPLT, b43_ntab_estimatepowerlt1);
         ntab_upload(dev, B43_NTAB_C0_ADJPLT, b43_ntab_adjustpower0);
         ntab_upload(dev, B43_NTAB_C1_ADJPLT, b43_ntab_adjustpower1);
-        ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0);
-        ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1);
         ntab_upload(dev, B43_NTAB_C0_IQLT, b43_ntab_iqlt0);
         ntab_upload(dev, B43_NTAB_C1_IQLT, b43_ntab_iqlt1);
         ntab_upload(dev, B43_NTAB_C0_LOFEEDTH, b43_ntab_loftlt0);
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index af85458401a4..ba78bc8a259f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -147,7 +147,11 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 
         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
-        priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
+        if (priv->cfg->rx_with_siso_diversity)
+                priv->hw_params.rx_chains_num = 1;
+        else
+                priv->hw_params.rx_chains_num =
+                        num_of_ant(priv->cfg->valid_rx_ant);
         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 
@@ -272,60 +276,49 @@ static struct iwl_ht_params iwl1000_ht_params = {
         .use_rts_for_aggregation = true, /* use rts/cts protection */
 };
 
+#define IWL_DEVICE_1000                                         \
+        .fw_name_pre = IWL1000_FW_PRE,                          \
+        .ucode_api_max = IWL1000_UCODE_API_MAX,                 \
+        .ucode_api_min = IWL1000_UCODE_API_MIN,                 \
+        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,       \
+        .ops = &iwl1000_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl1000_base_params,                    \
+        .led_mode = IWL_LED_BLINK
+
 struct iwl_cfg iwl1000_bgn_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN",
-        .fw_name_pre = IWL1000_FW_PRE,
-        .ucode_api_max = IWL1000_UCODE_API_MAX,
-        .ucode_api_min = IWL1000_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
-        .ops = &iwl1000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl1000_base_params,
+        IWL_DEVICE_1000,
         .ht_params = &iwl1000_ht_params,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl1000_bg_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 1000 BG",
-        .fw_name_pre = IWL1000_FW_PRE,
-        .ucode_api_max = IWL1000_UCODE_API_MAX,
-        .ucode_api_min = IWL1000_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
-        .ops = &iwl1000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl1000_base_params,
-        .led_mode = IWL_LED_BLINK,
+        IWL_DEVICE_1000,
 };
 
+#define IWL_DEVICE_100                                          \
+        .fw_name_pre = IWL100_FW_PRE,                           \
+        .ucode_api_max = IWL100_UCODE_API_MAX,                  \
+        .ucode_api_min = IWL100_UCODE_API_MIN,                  \
+        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,       \
+        .ops = &iwl1000_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl1000_base_params,                    \
+        .led_mode = IWL_LED_RF_STATE,                           \
+        .rx_with_siso_diversity = true
+
 struct iwl_cfg iwl100_bgn_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 100 BGN",
-        .fw_name_pre = IWL100_FW_PRE,
-        .ucode_api_max = IWL100_UCODE_API_MAX,
-        .ucode_api_min = IWL100_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
-        .ops = &iwl1000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl1000_base_params,
+        IWL_DEVICE_100,
         .ht_params = &iwl1000_ht_params,
-        .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
 };
 
 struct iwl_cfg iwl100_bg_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 100 BG",
-        .fw_name_pre = IWL100_FW_PRE,
-        .ucode_api_max = IWL100_UCODE_API_MAX,
-        .ucode_api_min = IWL100_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
-        .ops = &iwl1000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl1000_base_params,
-        .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
+        IWL_DEVICE_100,
 };
 
 MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 8435e5a4e69d..79ab0a6b1386 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -520,65 +520,44 @@ static struct iwl_ht_params iwl5000_ht_params = {
         .use_rts_for_aggregation = true, /* use rts/cts protection */
 };
 
+#define IWL_DEVICE_5000                                         \
+        .fw_name_pre = IWL5000_FW_PRE,                          \
+        .ucode_api_max = IWL5000_UCODE_API_MAX,                 \
+        .ucode_api_min = IWL5000_UCODE_API_MIN,                 \
+        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,       \
+        .ops = &iwl5000_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl5000_base_params,                    \
+        .led_mode = IWL_LED_BLINK
+
 struct iwl_cfg iwl5300_agn_cfg = {
         .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
-        .fw_name_pre = IWL5000_FW_PRE,
-        .ucode_api_max = IWL5000_UCODE_API_MAX,
-        .ucode_api_min = IWL5000_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
-        .ops = &iwl5000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
+        IWL_DEVICE_5000,
         .ht_params = &iwl5000_ht_params,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl5100_bgn_cfg = {
         .name = "Intel(R) WiFi Link 5100 BGN",
-        .fw_name_pre = IWL5000_FW_PRE,
-        .ucode_api_max = IWL5000_UCODE_API_MAX,
-        .ucode_api_min = IWL5000_UCODE_API_MIN,
+        IWL_DEVICE_5000,
         .valid_tx_ant = ANT_B,          /* .cfg overwrite */
         .valid_rx_ant = ANT_AB,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
-        .ops = &iwl5000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
         .ht_params = &iwl5000_ht_params,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl5100_abg_cfg = {
         .name = "Intel(R) WiFi Link 5100 ABG",
-        .fw_name_pre = IWL5000_FW_PRE,
-        .ucode_api_max = IWL5000_UCODE_API_MAX,
-        .ucode_api_min = IWL5000_UCODE_API_MIN,
+        IWL_DEVICE_5000,
         .valid_tx_ant = ANT_B,          /* .cfg overwrite */
         .valid_rx_ant = ANT_AB,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
-        .ops = &iwl5000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl5100_agn_cfg = {
         .name = "Intel(R) WiFi Link 5100 AGN",
-        .fw_name_pre = IWL5000_FW_PRE,
-        .ucode_api_max = IWL5000_UCODE_API_MAX,
-        .ucode_api_min = IWL5000_UCODE_API_MIN,
+        IWL_DEVICE_5000,
         .valid_tx_ant = ANT_B,          /* .cfg overwrite */
         .valid_rx_ant = ANT_AB,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
-        .ops = &iwl5000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
         .ht_params = &iwl5000_ht_params,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl5350_agn_cfg = {
@@ -593,35 +572,32 @@ struct iwl_cfg iwl5350_agn_cfg = {
         .base_params = &iwl5000_base_params,
         .ht_params = &iwl5000_ht_params,
         .led_mode = IWL_LED_BLINK,
+        .internal_wimax_coex = true,
 };
 
+#define IWL_DEVICE_5150                                         \
+        .fw_name_pre = IWL5150_FW_PRE,                          \
+        .ucode_api_max = IWL5150_UCODE_API_MAX,                 \
+        .ucode_api_min = IWL5150_UCODE_API_MIN,                 \
+        .eeprom_ver = EEPROM_5050_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,       \
+        .ops = &iwl5150_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl5000_base_params,                    \
+        .need_dc_calib = true,                                  \
+        .led_mode = IWL_LED_BLINK,                              \
+        .internal_wimax_coex = true
+
 struct iwl_cfg iwl5150_agn_cfg = {
         .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
-        .fw_name_pre = IWL5150_FW_PRE,
-        .ucode_api_max = IWL5150_UCODE_API_MAX,
-        .ucode_api_min = IWL5150_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
-        .ops = &iwl5150_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
+        IWL_DEVICE_5150,
         .ht_params = &iwl5000_ht_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_BLINK,
+
 };
 
 struct iwl_cfg iwl5150_abg_cfg = {
         .name = "Intel(R) WiMAX/WiFi Link 5150 ABG",
-        .fw_name_pre = IWL5150_FW_PRE,
-        .ucode_api_max = IWL5150_UCODE_API_MAX,
-        .ucode_api_min = IWL5150_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
-        .ops = &iwl5150_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl5000_base_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_BLINK,
+        IWL_DEVICE_5150,
 };
 
 MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index a848ca06dc6f..f4bec3201ef9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -182,7 +182,11 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 
         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
-        priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
+        if (priv->cfg->rx_with_siso_diversity)
+                priv->hw_params.rx_chains_num = 1;
+        else
+                priv->hw_params.rx_chains_num =
+                        num_of_ant(priv->cfg->valid_rx_ant);
         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 
@@ -511,7 +515,7 @@ static struct iwl_base_params iwl6050_base_params = {
         .chain_noise_calib_by_driver = true,
         .shadow_reg_enable = true,
 };
-static struct iwl_base_params iwl6000_coex_base_params = {
+static struct iwl_base_params iwl6000_g2_base_params = {
         .eeprom_size = OTP_LOW_IMAGE_SIZE,
         .num_of_queues = IWLAGN_NUM_QUEUES,
         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
@@ -520,7 +524,7 @@ static struct iwl_base_params iwl6000_coex_base_params = {
         .use_bsm = false,
         .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
         .shadow_ram_support = true,
-        .led_compensation = 51,
+        .led_compensation = 57,
         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
         .supports_idle = true,
         .adv_thermal_throttle = true,
@@ -550,243 +554,156 @@ static struct iwl_bt_params iwl6000_bt_params = {
         .bt_sco_disable = true,
 };
 
+#define IWL_DEVICE_6005                                         \
+        .fw_name_pre = IWL6000G2A_FW_PRE,                       \
+        .ucode_api_max = IWL6000G2_UCODE_API_MAX,               \
+        .ucode_api_min = IWL6000G2_UCODE_API_MIN,               \
+        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,             \
+        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,     \
+        .ops = &iwl6000_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl6000_g2_base_params,                 \
+        .need_dc_calib = true,                                  \
+        .need_temp_offset_calib = true,                         \
+        .led_mode = IWL_LED_RF_STATE
+
 struct iwl_cfg iwl6005_2agn_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6205 AGN",
-        .fw_name_pre = IWL6000G2A_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
+        IWL_DEVICE_6005,
         .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
 };
 
 struct iwl_cfg iwl6005_2abg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6205 ABG",
-        .fw_name_pre = IWL6000G2A_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
+        IWL_DEVICE_6005,
 };
 
 struct iwl_cfg iwl6005_2bg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6205 BG",
-        .fw_name_pre = IWL6000G2A_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
-};
+        IWL_DEVICE_6005,
+};
+
+#define IWL_DEVICE_6030                                         \
+        .fw_name_pre = IWL6000G2B_FW_PRE,                       \
+        .ucode_api_max = IWL6000G2_UCODE_API_MAX,               \
+        .ucode_api_min = IWL6000G2_UCODE_API_MIN,               \
+        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,             \
+        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,     \
+        .ops = &iwl6000g2b_ops,                                 \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl6000_g2_base_params,                 \
+        .bt_params = &iwl6000_bt_params,                        \
+        .need_dc_calib = true,                                  \
+        .need_temp_offset_calib = true,                         \
+        .led_mode = IWL_LED_RF_STATE,                           \
+        .adv_pm = true,                                         \
+        /*                                                      \
+         *Due to bluetooth, we transmit 2.4 GHz probes          \
+         * only on antenna A                                    \
+         */                                                     \
+        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A
 
 struct iwl_cfg iwl6030_2agn_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6230 AGN",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
+        IWL_DEVICE_6030,
         .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
 };
 
 struct iwl_cfg iwl6030_2abg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6230 ABG",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
+        IWL_DEVICE_6030,
 };
 
 struct iwl_cfg iwl6030_2bgn_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6230 BGN",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
+        IWL_DEVICE_6030,
         .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
 };
 
 struct iwl_cfg iwl6030_2bg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6230 BG",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
+        IWL_DEVICE_6030,
 };
 
 struct iwl_cfg iwl1030_bgn_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
+        IWL_DEVICE_6030,
         .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
 };
 
 struct iwl_cfg iwl1030_bg_cfg = {
         .name = "Intel(R) Centrino(R) Wireless-N 1030 BG",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
-        .need_dc_calib = true,
-        .need_temp_offset_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
+        IWL_DEVICE_6030,
+};
+
+struct iwl_cfg iwl130_bgn_cfg = {
+        .name = "Intel(R) Centrino(R) Wireless-N 130 BGN",
+        IWL_DEVICE_6030,
+        .ht_params = &iwl6000_ht_params,
+        .rx_with_siso_diversity = true,
+};
+
+struct iwl_cfg iwl130_bg_cfg = {
+        .name = "Intel(R) Centrino(R) Wireless-N 130 BG",
+        IWL_DEVICE_6030,
+        .rx_with_siso_diversity = true,
 };
 
 /*
  * "i": Internal configuration, use internal Power Amplifier
  */
+#define IWL_DEVICE_6000i                                        \
+        .fw_name_pre = IWL6000_FW_PRE,                          \
+        .ucode_api_max = IWL6000_UCODE_API_MAX,                 \
+        .ucode_api_min = IWL6000_UCODE_API_MIN,                 \
+        .valid_tx_ant = ANT_BC,         /* .cfg overwrite */    \
+        .valid_rx_ant = ANT_BC,         /* .cfg overwrite */    \
+        .eeprom_ver = EEPROM_6000_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,       \
+        .ops = &iwl6000_ops,                                    \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl6000_base_params,                    \
+        .pa_type = IWL_PA_INTERNAL,                             \
+        .led_mode = IWL_LED_BLINK
+
 struct iwl_cfg iwl6000i_2agn_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6200 AGN",
-        .fw_name_pre = IWL6000_FW_PRE,
-        .ucode_api_max = IWL6000_UCODE_API_MAX,
-        .ucode_api_min = IWL6000_UCODE_API_MIN,
-        .valid_tx_ant = ANT_BC,         /* .cfg overwrite */
-        .valid_rx_ant = ANT_BC,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
+        IWL_DEVICE_6000i,
         .ht_params = &iwl6000_ht_params,
-        .pa_type = IWL_PA_INTERNAL,
-        .led_mode = IWL_LED_BLINK,
 };
 
 struct iwl_cfg iwl6000i_2abg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6200 ABG",
-        .fw_name_pre = IWL6000_FW_PRE,
-        .ucode_api_max = IWL6000_UCODE_API_MAX,
-        .ucode_api_min = IWL6000_UCODE_API_MIN,
-        .valid_tx_ant = ANT_BC,         /* .cfg overwrite */
-        .valid_rx_ant = ANT_BC,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
-        .pa_type = IWL_PA_INTERNAL,
-        .led_mode = IWL_LED_BLINK,
+        IWL_DEVICE_6000i,
 };
 
 struct iwl_cfg iwl6000i_2bg_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N 6200 BG",
-        .fw_name_pre = IWL6000_FW_PRE,
-        .ucode_api_max = IWL6000_UCODE_API_MAX,
-        .ucode_api_min = IWL6000_UCODE_API_MIN,
-        .valid_tx_ant = ANT_BC,         /* .cfg overwrite */
-        .valid_rx_ant = ANT_BC,         /* .cfg overwrite */
-        .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,
-        .ops = &iwl6000_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_base_params,
-        .pa_type = IWL_PA_INTERNAL,
-        .led_mode = IWL_LED_BLINK,
-};
+        IWL_DEVICE_6000i,
+};
+
+#define IWL_DEVICE_6050                                         \
+        .fw_name_pre = IWL6050_FW_PRE,                          \
+        .ucode_api_max = IWL6050_UCODE_API_MAX,                 \
+        .ucode_api_min = IWL6050_UCODE_API_MIN,                 \
+        .ops = &iwl6050_ops,                                    \
+        .eeprom_ver = EEPROM_6050_EEPROM_VERSION,               \
+        .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION,       \
+        .mod_params = &iwlagn_mod_params,                       \
+        .base_params = &iwl6050_base_params,                    \
+        .need_dc_calib = true,                                  \
+        .led_mode = IWL_LED_BLINK,                              \
+        .internal_wimax_coex = true
 
 struct iwl_cfg iwl6050_2agn_cfg = {
         .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN",
-        .fw_name_pre = IWL6050_FW_PRE,
-        .ucode_api_max = IWL6050_UCODE_API_MAX,
-        .ucode_api_min = IWL6050_UCODE_API_MIN,
-        .ops = &iwl6050_ops,
-        .eeprom_ver = EEPROM_6050_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6050_base_params,
+        IWL_DEVICE_6050,
         .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_BLINK,
+};
+
+struct iwl_cfg iwl6050_2abg_cfg = {
+        .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 ABG",
+        IWL_DEVICE_6050,
 };
 
 struct iwl_cfg iwl6150_bgn_cfg = {
@@ -802,21 +719,7 @@ struct iwl_cfg iwl6150_bgn_cfg = {
         .ht_params = &iwl6000_ht_params,
         .need_dc_calib = true,
         .led_mode = IWL_LED_RF_STATE,
-        .use_new_eeprom_reading = true,
-};
-
-struct iwl_cfg iwl6050_2abg_cfg = {
-        .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 ABG",
-        .fw_name_pre = IWL6050_FW_PRE,
-        .ucode_api_max = IWL6050_UCODE_API_MAX,
-        .ucode_api_min = IWL6050_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6050_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION,
-        .ops = &iwl6050_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6050_base_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_BLINK,
+        .internal_wimax_coex = true,
 };
 
 struct iwl_cfg iwl6000_3agn_cfg = {
@@ -834,45 +737,6 @@ struct iwl_cfg iwl6000_3agn_cfg = {
         .led_mode = IWL_LED_BLINK,
 };
 
-struct iwl_cfg iwl130_bgn_cfg = {
-        .name = "Intel(R) Centrino(R) Wireless-N 130 BGN",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
-        .ht_params = &iwl6000_ht_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
-};
-
-struct iwl_cfg iwl130_bg_cfg = {
-        .name = "Intel(R) Centrino(R) Wireless-N 130 BG",
-        .fw_name_pre = IWL6000G2B_FW_PRE,
-        .ucode_api_max = IWL6000G2_UCODE_API_MAX,
-        .ucode_api_min = IWL6000G2_UCODE_API_MIN,
-        .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
-        .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION,
-        .ops = &iwl6000g2b_ops,
-        .mod_params = &iwlagn_mod_params,
-        .base_params = &iwl6000_coex_base_params,
-        .bt_params = &iwl6000_bt_params,
-        .need_dc_calib = true,
-        .led_mode = IWL_LED_RF_STATE,
-        .adv_pm = true,
-        /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
-        .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
-        .use_new_eeprom_reading = true,
-};
-
 MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL6000G2A_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c
index a358d4334a1a..a6dbd8983dac 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c
@@ -856,6 +856,9 @@ ssize_t iwl_ucode_bt_stats_read(struct file *file,
         if (!iwl_is_alive(priv))
                 return -EAGAIN;
 
+        if (!priv->bt_enable_flag)
+                return -EINVAL;
+
         /* make request to uCode to retrieve statistics information */
         mutex_lock(&priv->mutex);
         ret = iwl_send_statistics_request(priv, CMD_SYNC, false);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
index cf9194baadac..97906dd442e6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
@@ -75,109 +75,6 @@
 #include "iwl-agn.h"
 #include "iwl-io.h"
 
-/************************** EEPROM BANDS ****************************
- *
- * The iwl_eeprom_band definitions below provide the mapping from the
- * EEPROM contents to the specific channel number supported for each
- * band.
- *
- * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
- * definition below maps to physical channel 42 in the 5.2GHz spectrum.
- * The specific geography and calibration information for that channel
- * is contained in the eeprom map itself.
- *
- * During init, we copy the eeprom information and channel map
- * information into priv->channel_info_24/52 and priv->channel_map_24/52
- *
- * channel_map_24/52 provides the index in the channel_info array for a
- * given channel.  We have to have two separate maps as there is channel
- * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
- * band_2
- *
- * A value of 0xff stored in the channel_map indicates that the channel
- * is not supported by the hardware at all.
- *
- * A value of 0xfe in the channel_map indicates that the channel is not
- * valid for Tx with the current hardware.  This means that
- * while the system can tune and receive on a given channel, it may not
- * be able to associate or transmit any frames on that
- * channel.  There is no corresponding channel information for that
- * entry.
- *
- *********************************************************************/
-
-/**
- * struct iwl_txpwr_section: eeprom section information
- * @offset: indirect address into eeprom image
- * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
- * @band: band type for the section
- * @is_common - true: common section, false: channel section
- * @is_cck - true: cck section, false: not cck section
- * @is_ht_40 - true: all channel in the section are HT40 channel,
- *             false: legacy or HT 20 MHz
- *             ignore if it is common section
- * @iwl_eeprom_section_channel: channel array in the section,
- *             ignore if common section
- */
-struct iwl_txpwr_section {
-        u32 offset;
-        u8 count;
-        enum ieee80211_band band;
-        bool is_common;
-        bool is_cck;
-        bool is_ht40;
-        u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
-};
-
-/**
- * section 1 - 3 are regulatory tx power apply to all channels based on
- *    modulation: CCK, OFDM
- *    Band: 2.4GHz, 5.2GHz
- * section 4 - 10 are regulatory tx power apply to specified channels
- *    For example:
- *      1L - Channel 1 Legacy
- *      1HT - Channel 1 HT
- *      (1,+1) - Channel 1 HT40 "_above_"
- *
- * Section 1: all CCK channels
- * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
- * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
- * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
- * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
- * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
- * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
- * Section 8: 2.4 GHz channel: 13L, 13HT
- * Section 9: 2.4 GHz channel: 140L, 140HT
- * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
- *
- */
-static const struct iwl_txpwr_section enhinfo[] = {
-        { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
-        { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
-        { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
-        { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
-                false, false, false,
-                {1, 1, 2, 2, 10, 10, 11, 11 } },
-        { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
-                false, false, true,
-                { 1, 2, 6, 7, 9 } },
-        { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
-                false, false, false,
-                { 36, 64, 100, 36, 64, 100 } },
-        { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
-                false, false, true,
-                { 36, 60, 100 } },
-        { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
-                false, false, false,
-                { 13, 13 } },
-        { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
-                false, false, false,
-                { 140, 140 } },
-        { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
-                false, false, true,
-                { 132, 44 } },
-};
-
 /******************************************************************************
  *
  * EEPROM related functions
@@ -306,15 +203,6 @@ static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 {
         s8 max_txpower_avg = 0; /* (dBm) */
 
-        IWL_DEBUG_INFO(priv, "%d - "
-                        "chain_a: %d dB chain_b: %d dB "
-                        "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
-                        element,
-                        enhanced_txpower[element].chain_a_max >> 1,
-                        enhanced_txpower[element].chain_b_max >> 1,
-                        enhanced_txpower[element].chain_c_max >> 1,
-                        enhanced_txpower[element].mimo2_max >> 1,
-                        enhanced_txpower[element].mimo3_max >> 1);
         /* Take the highest tx power from any valid chains */
         if ((priv->cfg->valid_tx_ant & ANT_A) &&
             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
@@ -344,157 +232,6 @@ static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
         return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
 }
 
-/**
- * iwl_update_common_txpower: update channel tx power
- *     update tx power per band based on EEPROM enhanced tx power info.
- */
-static s8 iwl_update_common_txpower(struct iwl_priv *priv,
-                struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
-                int section, int element, s8 *max_txpower_in_half_dbm)
-{
-        struct iwl_channel_info *ch_info;
-        int ch;
-        bool is_ht40 = false;
-        s8 max_txpower_avg; /* (dBm) */
-
-        /* it is common section, contain all type (Legacy, HT and HT40)
-         * based on the element in the section to determine
-         * is it HT 40 or not
-         */
-        if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
-                is_ht40 = true;
-        max_txpower_avg =
-                iwl_get_max_txpower_avg(priv, enhanced_txpower,
-                                        element, max_txpower_in_half_dbm);
-
-        ch_info = priv->channel_info;
-
-        for (ch = 0; ch < priv->channel_count; ch++) {
-                /* find matching band and update tx power if needed */
-                if ((ch_info->band == enhinfo[section].band) &&
-                    (ch_info->max_power_avg < max_txpower_avg) &&
-                    (!is_ht40)) {
-                        /* Update regulatory-based run-time data */
-                        ch_info->max_power_avg = ch_info->curr_txpow =
-                                max_txpower_avg;
-                        ch_info->scan_power = max_txpower_avg;
-                }
-                if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
-                    (ch_info->ht40_max_power_avg < max_txpower_avg)) {
-                        /* Update regulatory-based run-time data */
-                        ch_info->ht40_max_power_avg = max_txpower_avg;
-                }
-                ch_info++;
-        }
-        return max_txpower_avg;
-}
-
-/**
- * iwl_update_channel_txpower: update channel tx power
- *      update channel tx power based on EEPROM enhanced tx power info.
- */
-static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
-                struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
-                int section, int element, s8 *max_txpower_in_half_dbm)
-{
-        struct iwl_channel_info *ch_info;
-        int ch;
-        u8 channel;
-        s8 max_txpower_avg; /* (dBm) */
-
-        channel = enhinfo[section].iwl_eeprom_section_channel[element];
-        max_txpower_avg =
-                iwl_get_max_txpower_avg(priv, enhanced_txpower,
-                                        element, max_txpower_in_half_dbm);
-
-        ch_info = priv->channel_info;
-        for (ch = 0; ch < priv->channel_count; ch++) {
-                /* find matching channel and update tx power if needed */
-                if (ch_info->channel == channel) {
-                        if ((ch_info->max_power_avg < max_txpower_avg) &&
-                            (!enhinfo[section].is_ht40)) {
-                                /* Update regulatory-based run-time data */
-                                ch_info->max_power_avg = max_txpower_avg;
-                                ch_info->curr_txpow = max_txpower_avg;
-                                ch_info->scan_power = max_txpower_avg;
-                        }
-                        if ((enhinfo[section].is_ht40) &&
-                            (ch_info->ht40_max_power_avg < max_txpower_avg)) {
-                                /* Update regulatory-based run-time data */
-                                ch_info->ht40_max_power_avg = max_txpower_avg;
-                        }
-                        break;
-                }
-                ch_info++;
-        }
-        return max_txpower_avg;
-}
-
-/**
- * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
- */
-static void iwlcore_eeprom_enhanced_txpower_old(struct iwl_priv *priv)
-{
-        int eeprom_section_count = 0;
-        int section, element;
-        struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
-        u32 offset;
-        s8 max_txpower_avg; /* (dBm) */
-        s8 max_txpower_in_half_dbm; /* (half-dBm) */
-
-        /* Loop through all the sections
-         * adjust bands and channel's max tx power
-         * Set the tx_power_user_lmt to the highest power
-         * supported by any channels and chains
-         */
-        for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
-                eeprom_section_count = enhinfo[section].count;
-                offset = enhinfo[section].offset;
-                enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
-                                iwl_eeprom_query_addr(priv, offset);
-
-                /*
-                 * check for valid entry -
-                 * different version of EEPROM might contain different set
-                 * of enhanced tx power table
-                 * always check for valid entry before process
-                 * the information
-                 */
-                if (!(enhanced_txpower->flags || enhanced_txpower->channel) ||
-                    enhanced_txpower->delta_20_in_40)
-                        continue;
-
-                for (element = 0; element < eeprom_section_count; element++) {
-                        if (enhinfo[section].is_common)
-                                max_txpower_avg =
-                                        iwl_update_common_txpower(priv,
-                                                enhanced_txpower, section,
-                                                element,
-                                                &max_txpower_in_half_dbm);
-                        else
-                                max_txpower_avg =
-                                        iwl_update_channel_txpower(priv,
-                                                enhanced_txpower, section,
-                                                element,
-                                                &max_txpower_in_half_dbm);
-
-                        /* Update the tx_power_user_lmt to the highest power
-                         * supported by any channel */
-                        if (max_txpower_avg > priv->tx_power_user_lmt)
-                                priv->tx_power_user_lmt = max_txpower_avg;
-
-                        /*
-                         * Update the tx_power_lmt_in_half_dbm to
-                         * the highest power supported by any channel
-                         */
-                        if (max_txpower_in_half_dbm >
-                            priv->tx_power_lmt_in_half_dbm)
-                                priv->tx_power_lmt_in_half_dbm =
-                                        max_txpower_in_half_dbm;
-                }
-        }
-}
-
 static void
 iwlcore_eeprom_enh_txp_read_element(struct iwl_priv *priv,
                                     struct iwl_eeprom_enhanced_txpwr *txp,
@@ -533,7 +270,10 @@ iwlcore_eeprom_enh_txp_read_element(struct iwl_priv *priv,
 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
 
-static void iwlcore_eeprom_enhanced_txpower_new(struct iwl_priv *priv)
+#define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
+                            ? # x " " : "")
+
+void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
 {
         struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
         int idx, entries;
@@ -547,13 +287,39 @@ static void iwlcore_eeprom_enhanced_txpower_new(struct iwl_priv *priv)
         entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
 
         txp_array = (void *) iwlagn_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
+
         for (idx = 0; idx < entries; idx++) {
                 txp = &txp_array[idx];
-
                 /* skip invalid entries */
                 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
                         continue;
 
+                IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
+                                 (txp->channel && (txp->flags &
+                                        IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
+                                        "Common " : (txp->channel) ?
+                                        "Channel" : "Common",
+                                 (txp->channel),
+                                 TXP_CHECK_AND_PRINT(VALID),
+                                 TXP_CHECK_AND_PRINT(BAND_52G),
+                                 TXP_CHECK_AND_PRINT(OFDM),
+                                 TXP_CHECK_AND_PRINT(40MHZ),
+                                 TXP_CHECK_AND_PRINT(HT_AP),
+                                 TXP_CHECK_AND_PRINT(RES1),
+                                 TXP_CHECK_AND_PRINT(RES2),
+                                 TXP_CHECK_AND_PRINT(COMMON_TYPE),
+                                 txp->flags);
+                IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
+                                 "chain_B: 0X%02x chain_C: 0X%02x\n",
+                                 txp->chain_a_max, txp->chain_b_max,
+                                 txp->chain_c_max);
+                IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
+                                 "MIMO3: 0x%02x High 20_on_40: 0x%02x "
+                                 "Low 20_on_40: 0x%02x\n",
+                                 txp->mimo2_max, txp->mimo3_max,
+                                 ((txp->delta_20_in_40 & 0xf0) >> 4),
+                                 (txp->delta_20_in_40 & 0x0f));
+
                 max_txp_avg = iwl_get_max_txpower_avg(priv, txp_array, idx,
                                                       &max_txp_avg_halfdbm);
 
@@ -569,11 +335,3 @@ static void iwlcore_eeprom_enhanced_txpower_new(struct iwl_priv *priv)
                 iwlcore_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
         }
 }
-
-void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
-{
-        if (priv->cfg->use_new_eeprom_reading)
-                iwlcore_eeprom_enhanced_txpower_new(priv);
-        else
-                iwlcore_eeprom_enhanced_txpower_old(priv);
-}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
index 7c8010f7ce56..4bc82fcf1652 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
@@ -1845,6 +1845,7 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
                         bt_cmd.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION;
                 IWL_DEBUG_INFO(priv, "BT coex flag: 0X%x\n", bt_cmd.flags);
         }
+        priv->bt_enable_flag = bt_cmd.flags;
         if (priv->bt_full_concurrent)
                 memcpy(bt_cmd.bt3_lookup_table, iwlagn_concurrent_lookup,
                         sizeof(iwlagn_concurrent_lookup));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index f450adc72361..75fcd30a7c13 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -387,7 +387,7 @@ static int rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv,
         if (load > IWL_AGG_LOAD_THRESHOLD) {
                 IWL_DEBUG_HT(priv, "Starting Tx agg: STA: %pM tid: %d\n",
                                 sta->addr, tid);
-                ret = ieee80211_start_tx_ba_session(sta, tid);
+                ret = ieee80211_start_tx_ba_session(sta, tid, 5000);
                 if (ret == -EAGAIN) {
                         /*
                          * driver and mac80211 is out of sync
@@ -2873,6 +2873,10 @@ void iwl_rs_rate_init(struct iwl_priv *priv, struct ieee80211_sta *sta, u8 sta_i
                 lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE;
         lq_sta->is_agg = 0;
 
+#ifdef CONFIG_MAC80211_DEBUGFS
+        lq_sta->dbg_fixed_rate = 0;
+#endif
+
         rs_initialize_lq(priv, conf, sta, lq_sta);
 }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
index 4865b82355d7..6d140bd53291 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
@@ -518,7 +518,14 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
 
         mutex_lock(&priv->mutex);
 
-        if (WARN_ON(!ctx->vif)) {
+        if (unlikely(!iwl_is_ready(priv))) {
+                IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
+                mutex_unlock(&priv->mutex);
+                return;
+        }
+
+        if (unlikely(!ctx->vif)) {
+                IWL_DEBUG_MAC80211(priv, "leave - vif is NULL\n");
                 mutex_unlock(&priv->mutex);
                 return;
         }
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
index 72b1f262796c..24a11b8f73bc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
@@ -1237,7 +1237,6 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
         int i, sh, ack;
         u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
         u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
-        u64 bitmap, sent_bitmap;
         int successes = 0;
         struct ieee80211_tx_info *info;
 
@@ -1278,6 +1277,8 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
                 IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",
                                 ba_resp->txed, ba_resp->txed_2_done);
         } else {
+                u64 bitmap, sent_bitmap;
+
                 /* don't use 64-bit values for now */
                 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
 
@@ -1298,7 +1299,11 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
                         sent_bitmap >>= 1;
                         ++i;
                 }
+
+                IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n",
+                                   (unsigned long long)bitmap);
         }
+
         info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb);
         memset(&info->status, 0, sizeof(info->status));
         info->flags |= IEEE80211_TX_STAT_ACK;
@@ -1313,8 +1318,6 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
         }
         iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
 
-        IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap);
-
         return 0;
 }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index d62b92518417..efbde1f1a8bf 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -957,6 +957,22 @@ void iwl_irq_handle_error(struct iwl_priv *priv)
         /* Cancel currently queued command. */
         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 
+        /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
+        if (priv->cfg->internal_wimax_coex &&
+            (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
+                        APMS_CLK_VAL_MRB_FUNC_MODE) ||
+             (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
+                        APMG_PS_CTRL_VAL_RESET_REQ))) {
+                wake_up_interruptible(&priv->wait_command_queue);
+                /*
+                 *Keep the restart process from trying to send host
+                 * commands by clearing the INIT status bit
+                 */
+                clear_bit(STATUS_READY, &priv->status);
+                IWL_ERR(priv, "RF is used by WiMAX\n");
+                return;
+        }
+
         IWL_ERR(priv, "Loaded firmware version: %s\n",
                 priv->hw->wiphy->fw_version);
 
@@ -1207,6 +1223,7 @@ void iwl_send_bt_config(struct iwl_priv *priv)
         else
                 bt_cmd.flags = BT_COEX_ENABLE;
 
+        priv->bt_enable_flag = bt_cmd.flags;
         IWL_DEBUG_INFO(priv, "BT coex %s\n",
                 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 9df33d6af8bb..f80685ad2674 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -364,6 +364,8 @@ struct iwl_ht_params {
  * @scan_antennas: available antenna for scan operation
  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
  * @adv_pm: advance power management
+ * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
+ * @internal_wimax_coex: internal wifi/wimax combo device
  *
  * We enable the driver to be backward compatible wrt API version. The
  * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -412,7 +414,8 @@ struct iwl_cfg {
         u8 scan_tx_antennas[IEEE80211_NUM_BANDS];
         enum iwl_led_mode led_mode;
         const bool adv_pm;
-        const bool use_new_eeprom_reading; /* temporary, remove later */
+        const bool rx_with_siso_diversity;
+        const bool internal_wimax_coex;
 };
 
 /***************************
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h
index 0b961a353ff6..ebdea3be3ef9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debug.h
+++ b/drivers/net/wireless/iwlwifi/iwl-debug.h
@@ -120,6 +120,7 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)
 /* 0x000000F0 - 0x00000010 */
 #define IWL_DL_MACDUMP          (1 << 4)
 #define IWL_DL_HCMD_DUMP        (1 << 5)
+#define IWL_DL_EEPROM           (1 << 6)
 #define IWL_DL_RADIO            (1 << 7)
 /* 0x00000F00 - 0x00000100 */
 #define IWL_DL_POWER            (1 << 8)
@@ -164,6 +165,7 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)
 #define IWL_DEBUG_WEP(p, f, a...)       IWL_DEBUG(p, IWL_DL_WEP, f, ## a)
 #define IWL_DEBUG_HC(p, f, a...)        IWL_DEBUG(p, IWL_DL_HCMD, f, ## a)
 #define IWL_DEBUG_HC_DUMP(p, f, a...)   IWL_DEBUG(p, IWL_DL_HCMD_DUMP, f, ## a)
+#define IWL_DEBUG_EEPROM(p, f, a...)    IWL_DEBUG(p, IWL_DL_EEPROM, f, ## a)
 #define IWL_DEBUG_CALIB(p, f, a...)     IWL_DEBUG(p, IWL_DL_CALIB, f, ## a)
 #define IWL_DEBUG_FW(p, f, a...)        IWL_DEBUG(p, IWL_DL_FW, f, ## a)
 #define IWL_DEBUG_RF_KILL(p, f, a...)   IWL_DEBUG(p, IWL_DL_RF_KILL, f, ## a)
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index d36836376e6b..6fe80b5e7a15 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -1567,6 +1567,13 @@ static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file,
         const size_t bufsz = sizeof(buf);
         ssize_t ret;
 
+        if (!priv->bt_enable_flag) {
+                pos += scnprintf(buf + pos, bufsz - pos, "BT coex disabled\n");
+                ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
+                return ret;
+        }
+        pos += scnprintf(buf + pos, bufsz - pos, "BT enable flag: 0x%x\n",
+                priv->bt_enable_flag);
         pos += scnprintf(buf + pos, bufsz - pos, "BT in %s mode\n",
                 priv->bt_full_concurrent ? "full concurrency" : "3-wire");
         pos += scnprintf(buf + pos, bufsz - pos, "BT status: %s, "
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index 836f1816b110..8dda67850af4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -1468,6 +1468,7 @@ struct iwl_priv {
         };
 
         /* bt coex */
+        u8 bt_enable_flag;
         u8 bt_status;
         u8 bt_traffic_load, last_bt_traffic_load;
         bool bt_ch_announce;
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 87cd10ff285d..358cfd7e5af1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -147,7 +147,7 @@ static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
         u32 gp = iwl_read32(priv, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
         int ret = 0;
 
-        IWL_DEBUG_INFO(priv, "EEPROM signature=0x%08x\n", gp);
+        IWL_DEBUG_EEPROM(priv, "EEPROM signature=0x%08x\n", gp);
         switch (gp) {
         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
@@ -354,7 +354,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
                  */
                 valid_addr = next_link_addr;
                 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
-                IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
+                IWL_DEBUG_EEPROM(priv, "OTP blocks %d addr 0x%x\n",
                                usedblocks, next_link_addr);
                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
                         return -EINVAL;
@@ -374,7 +374,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
         } while (usedblocks <= priv->cfg->base_params->max_ll_items);
 
         /* OTP has no valid blocks */
-        IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
+        IWL_DEBUG_EEPROM(priv, "OTP has no valid blocks\n");
         return -EINVAL;
 }
 
@@ -414,7 +414,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
                 return -ENOENT;
         /* allocate eeprom */
         sz = priv->cfg->base_params->eeprom_size;
-        IWL_DEBUG_INFO(priv, "NVM size = %d\n", sz);
+        IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);
         priv->eeprom = kzalloc(sz, GFP_KERNEL);
         if (!priv->eeprom) {
                 ret = -ENOMEM;
@@ -492,7 +492,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
                 }
         }
 
-        IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
+        IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",
                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
                        ? "OTP" : "EEPROM",
                        iwl_eeprom_query16(priv, EEPROM_VERSION));
@@ -594,7 +594,7 @@ static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
         if (!is_channel_valid(ch_info))
                 return -1;
 
-        IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
+        IWL_DEBUG_EEPROM(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
                         " Ad-Hoc %ssupported\n",
                         ch_info->channel,
                         is_channel_a_band(ch_info) ?
@@ -634,11 +634,11 @@ int iwl_init_channel_map(struct iwl_priv *priv)
         struct iwl_channel_info *ch_info;
 
         if (priv->channel_count) {
-                IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
+                IWL_DEBUG_EEPROM(priv, "Channel map already initialized.\n");
                 return 0;
         }
 
-        IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
+        IWL_DEBUG_EEPROM(priv, "Initializing regulatory info from EEPROM\n");
 
         priv->channel_count =
             ARRAY_SIZE(iwl_eeprom_band_1) +
@@ -647,7 +647,8 @@ int iwl_init_channel_map(struct iwl_priv *priv)
             ARRAY_SIZE(iwl_eeprom_band_4) +
             ARRAY_SIZE(iwl_eeprom_band_5);
 
-        IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
+        IWL_DEBUG_EEPROM(priv, "Parsing data for %d channels.\n",
+                        priv->channel_count);
 
         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
                                      priv->channel_count, GFP_KERNEL);
@@ -686,7 +687,8 @@ int iwl_init_channel_map(struct iwl_priv *priv)
                                         IEEE80211_CHAN_NO_HT40;
 
                         if (!(is_channel_valid(ch_info))) {
-                                IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
+                                IWL_DEBUG_EEPROM(priv,
+                                               "Ch. %d Flags %x [%sGHz] - "
                                                "No traffic\n",
                                                ch_info->channel,
                                                ch_info->flags,
@@ -702,7 +704,8 @@ int iwl_init_channel_map(struct iwl_priv *priv)
                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
                         ch_info->min_power = 0;
 
-                        IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
+                        IWL_DEBUG_EEPROM(priv, "Ch. %d [%sGHz] "
+                                       "%s%s%s%s%s%s(0x%02x %ddBm):"
                                        " Ad-Hoc %ssupported\n",
                                        ch_info->channel,
                                        is_channel_a_band(ch_info) ?
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index 8994b5b23593..9e6f31355eee 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -231,59 +231,6 @@ struct iwl_eeprom_enhanced_txpwr {
 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS  ((0x80)\
                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 14  bytes */
 
-/* 6000 and up regulatory tx power - indirect access */
-/* max. elements per section */
-#define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS     (8)
-#define EEPROM_TXPOWER_COMMON_HT40_INDEX        (2)
-
-/**
- * Partition the enhanced tx power portion of eeprom image into
- * 10 sections based on band, modulation, frequency and channel
- *
- * Section 1: all CCK channels
- * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40 ) channels
- * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
- * Section 4: 2.4 GHz 20MHz channels: 1, 2, 10, 11. Both Legacy and HT
- * Section 5: 2.4 GHz 40MHz channels: 1, 2, 6, 7, 9, (_above_)
- * Section 6: 5.2 GHz 20MHz channels: 36, 64, 100, both Legacy and HT
- * Section 7: 5.2 GHz 40MHz channels: 36, 60, 100 (_above_)
- * Section 8: 2.4 GHz channel 13, Both Legacy and HT
- * Section 9: 2.4 GHz channel 140, Both Legacy and HT
- * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_)
- */
-/* 2.4 GHz band: CCK */
-#define EEPROM_LB_CCK_20_COMMON       ((0xA8)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 8 bytes */
-/* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
-#define EEPROM_LB_OFDM_COMMON       ((0xB0)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 24 bytes */
-/* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
-#define EEPROM_HB_OFDM_COMMON       ((0xC8)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 24 bytes */
-/* 2.4GHz band channels:
- *      1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */
-#define EEPROM_LB_OFDM_20_BAND       ((0xE0)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 64 bytes */
-/* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */
-#define EEPROM_LB_OFDM_HT40_BAND       ((0x120)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 40 bytes */
-/* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */
-#define EEPROM_HB_OFDM_20_BAND       ((0x148)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 48 bytes */
-/* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */
-#define EEPROM_HB_OFDM_HT40_BAND       ((0x178)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 24 bytes */
-/* 2.4 GHz band, channnel 13: Legacy, HT */
-#define EEPROM_LB_OFDM_20_CHANNEL_13       ((0x190)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 16 bytes */
-/* 5.2 GHz band, channnel 140: Legacy, HT */
-#define EEPROM_HB_OFDM_20_CHANNEL_140       ((0x1A0)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 16 bytes */
-/* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */
-#define EEPROM_HB_OFDM_HT40_BAND_1       ((0x1B0)\
-                | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 16 bytes */
-
-
 /* 5050 Specific */
 #define EEPROM_5050_TX_POWER_VERSION    (4)
 #define EEPROM_5050_EEPROM_VERSION      (0x21E)
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h
index 5469655646ae..86f5123bccda 100644
--- a/drivers/net/wireless/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/iwlwifi/iwl-prph.h
@@ -83,10 +83,10 @@
 #define APMG_DIGITAL_SVR_REG            (APMG_BASE + 0x0058)
 #define APMG_ANALOG_SVR_REG             (APMG_BASE + 0x006C)
 
+#define APMS_CLK_VAL_MRB_FUNC_MODE      (0x00000001)
 #define APMG_CLK_VAL_DMA_CLK_RQT        (0x00000200)
 #define APMG_CLK_VAL_BSM_CLK_RQT        (0x00000800)
 
-
 #define APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS    (0x00400000)
 #define APMG_PS_CTRL_VAL_RESET_REQ              (0x04000000)
 #define APMG_PS_CTRL_MSK_PWR_SRC                (0x03000000)
diff --git a/drivers/net/wireless/iwmc3200wifi/cfg80211.c b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
index c6c0eff9b5ed..5a4982271e96 100644
--- a/drivers/net/wireless/iwmc3200wifi/cfg80211.c
+++ b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
@@ -225,7 +225,8 @@ static int iwm_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
 
 static int iwm_cfg80211_set_default_key(struct wiphy *wiphy,
                                         struct net_device *ndev,
-                                        u8 key_index)
+                                        u8 key_index, bool unicast,
+                                        bool multicast)
 {
         struct iwm_priv *iwm = ndev_to_iwm(ndev);
 
diff --git a/drivers/net/wireless/libertas/cfg.c b/drivers/net/wireless/libertas/cfg.c
index 632c9211e634..698a1f7694ed 100644
--- a/drivers/net/wireless/libertas/cfg.c
+++ b/drivers/net/wireless/libertas/cfg.c
@@ -1422,7 +1422,8 @@ static int lbs_cfg_disconnect(struct wiphy *wiphy, struct net_device *dev,
 
 static int lbs_cfg_set_default_key(struct wiphy *wiphy,
                                    struct net_device *netdev,
-                                   u8 key_index)
+                                   u8 key_index, bool unicast,
+                                   bool multicast)
 {
         struct lbs_private *priv = wiphy_priv(wiphy);
 
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c
index 19f3d568f700..4a4f00591447 100644
--- a/drivers/net/wireless/rndis_wlan.c
+++ b/drivers/net/wireless/rndis_wlan.c
@@ -554,7 +554,7 @@ static int rndis_del_key(struct wiphy *wiphy, struct net_device *netdev,
                          u8 key_index, bool pairwise, const u8 *mac_addr);
 
 static int rndis_set_default_key(struct wiphy *wiphy, struct net_device *netdev,
-                                                                u8 key_index);
+                                 u8 key_index, bool unicast, bool multicast);
 
 static int rndis_get_station(struct wiphy *wiphy, struct net_device *dev,
                                         u8 *mac, struct station_info *sinfo);
@@ -2381,7 +2381,7 @@ static int rndis_del_key(struct wiphy *wiphy, struct net_device *netdev,
 }
 
 static int rndis_set_default_key(struct wiphy *wiphy, struct net_device *netdev,
-                                                                u8 key_index)
+                                 u8 key_index, bool unicast, bool multicast)
 {
         struct rndis_wlan_private *priv = wiphy_priv(wiphy);
         struct usbnet *usbdev = priv->usbdev;
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 9ec6691adf0d..54ca49ad3472 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -633,6 +633,88 @@ static void rt2400pci_link_tuner(struct rt2x00_dev *rt2x00dev,
 }
 
 /*
+ * Queue handlers.
+ */
+static void rt2400pci_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
+                rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX, 0);
+                rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
+                rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
+                rt2x00_set_field32(&reg, CSR14_TBCN, 1);
+                rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
+                rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2400pci_kick_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_AC_VI:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_TX, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_ATIM:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_ATIM, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2400pci_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_ATIM:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_ABORT, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
+                rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX, 1);
+                rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
+                rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 0);
+                rt2x00_set_field32(&reg, CSR14_TBCN, 0);
+                rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 0);
+                rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Initialization functions.
  */
 static bool rt2400pci_get_entry_state(struct queue_entry *entry)
@@ -878,17 +960,6 @@ static int rt2400pci_init_bbp(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt2400pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                                enum dev_state state)
-{
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
-        rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX,
-                           (state == STATE_RADIO_RX_OFF));
-        rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
-}
-
 static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
                                  enum dev_state state)
 {
@@ -987,10 +1058,6 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev,
         case STATE_RADIO_OFF:
                 rt2400pci_disable_radio(rt2x00dev);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt2400pci_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -1122,32 +1189,6 @@ static void rt2400pci_write_beacon(struct queue_entry *entry,
         rt2x00pci_register_write(rt2x00dev, CSR14, reg);
 }
 
-static void rt2400pci_kick_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
-        rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, (queue->qid == QID_AC_BE));
-        rt2x00_set_field32(&reg, TXCSR0_KICK_TX, (queue->qid == QID_AC_BK));
-        rt2x00_set_field32(&reg, TXCSR0_KICK_ATIM, (queue->qid == QID_ATIM));
-        rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
-}
-
-static void rt2400pci_kill_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        if (queue->qid == QID_BEACON) {
-                rt2x00pci_register_write(rt2x00dev, CSR14, 0);
-        } else {
-                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
-                rt2x00_set_field32(&reg, TXCSR0_ABORT, 1);
-                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
-        }
-}
-
 /*
  * RX control handlers
  */
@@ -1281,13 +1322,13 @@ static irqreturn_t rt2400pci_interrupt_thread(int irq, void *dev_instance)
          * 4 - Priority ring transmit done interrupt.
          */
         if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING))
-                rt2400pci_txdone(rt2x00dev, QID_AC_BE);
+                rt2400pci_txdone(rt2x00dev, QID_AC_VO);
 
         /*
          * 5 - Tx ring transmit done interrupt.
          */
         if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING))
-                rt2400pci_txdone(rt2x00dev, QID_AC_BK);
+                rt2400pci_txdone(rt2x00dev, QID_AC_VI);
 
         /* Enable interrupts again. */
         rt2x00dev->ops->lib->set_device_state(rt2x00dev,
@@ -1625,10 +1666,11 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
         .link_stats             = rt2400pci_link_stats,
         .reset_tuner            = rt2400pci_reset_tuner,
         .link_tuner             = rt2400pci_link_tuner,
+        .start_queue            = rt2400pci_start_queue,
+        .kick_queue             = rt2400pci_kick_queue,
+        .stop_queue             = rt2400pci_stop_queue,
         .write_tx_desc          = rt2400pci_write_tx_desc,
         .write_beacon           = rt2400pci_write_beacon,
-        .kick_tx_queue          = rt2400pci_kick_tx_queue,
-        .kill_tx_queue          = rt2400pci_kill_tx_queue,
         .fill_rxdone            = rt2400pci_fill_rxdone,
         .config_filter          = rt2400pci_config_filter,
         .config_intf            = rt2400pci_config_intf,
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 3e7f20346243..a9ff26a27724 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -723,6 +723,88 @@ dynamic_cca_tune:
 }
 
 /*
+ * Queue handlers.
+ */
+static void rt2500pci_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
+                rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX, 0);
+                rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
+                rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
+                rt2x00_set_field32(&reg, CSR14_TBCN, 1);
+                rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
+                rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2500pci_kick_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_AC_VI:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_TX, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_ATIM:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_KICK_ATIM, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2500pci_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_ATIM:
+                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
+                rt2x00_set_field32(&reg, TXCSR0_ABORT, 1);
+                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
+                break;
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
+                rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX, 1);
+                rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
+                rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 0);
+                rt2x00_set_field32(&reg, CSR14_TBCN, 0);
+                rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 0);
+                rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Initialization functions.
  */
 static bool rt2500pci_get_entry_state(struct queue_entry *entry)
@@ -1033,17 +1115,6 @@ static int rt2500pci_init_bbp(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt2500pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                                enum dev_state state)
-{
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, RXCSR0, &reg);
-        rt2x00_set_field32(&reg, RXCSR0_DISABLE_RX,
-                           (state == STATE_RADIO_RX_OFF));
-        rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
-}
-
 static void rt2500pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
                                  enum dev_state state)
 {
@@ -1142,10 +1213,6 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev,
         case STATE_RADIO_OFF:
                 rt2500pci_disable_radio(rt2x00dev);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt2500pci_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -1276,32 +1343,6 @@ static void rt2500pci_write_beacon(struct queue_entry *entry,
         rt2x00pci_register_write(rt2x00dev, CSR14, reg);
 }
 
-static void rt2500pci_kick_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
-        rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, (queue->qid == QID_AC_BE));
-        rt2x00_set_field32(&reg, TXCSR0_KICK_TX, (queue->qid == QID_AC_BK));
-        rt2x00_set_field32(&reg, TXCSR0_KICK_ATIM, (queue->qid == QID_ATIM));
-        rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
-}
-
-static void rt2500pci_kill_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        if (queue->qid == QID_BEACON) {
-                rt2x00pci_register_write(rt2x00dev, CSR14, 0);
-        } else {
-                rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
-                rt2x00_set_field32(&reg, TXCSR0_ABORT, 1);
-                rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
-        }
-}
-
 /*
  * RX control handlers
  */
@@ -1414,13 +1455,13 @@ static irqreturn_t rt2500pci_interrupt_thread(int irq, void *dev_instance)
          * 4 - Priority ring transmit done interrupt.
          */
         if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING))
-                rt2500pci_txdone(rt2x00dev, QID_AC_BE);
+                rt2500pci_txdone(rt2x00dev, QID_AC_VO);
 
         /*
          * 5 - Tx ring transmit done interrupt.
          */
         if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING))
-                rt2500pci_txdone(rt2x00dev, QID_AC_BK);
+                rt2500pci_txdone(rt2x00dev, QID_AC_VI);
 
         /* Enable interrupts again. */
         rt2x00dev->ops->lib->set_device_state(rt2x00dev,
@@ -1922,10 +1963,11 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = {
         .link_stats             = rt2500pci_link_stats,
         .reset_tuner            = rt2500pci_reset_tuner,
         .link_tuner             = rt2500pci_link_tuner,
+        .start_queue            = rt2500pci_start_queue,
+        .kick_queue             = rt2500pci_kick_queue,
+        .stop_queue             = rt2500pci_stop_queue,
         .write_tx_desc          = rt2500pci_write_tx_desc,
         .write_beacon           = rt2500pci_write_beacon,
-        .kick_tx_queue          = rt2500pci_kick_tx_queue,
-        .kill_tx_queue          = rt2500pci_kill_tx_queue,
         .fill_rxdone            = rt2500pci_fill_rxdone,
         .config_filter          = rt2500pci_config_filter,
         .config_intf            = rt2500pci_config_intf,
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index 8152fec31753..6b3b1de46792 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -739,6 +739,55 @@ static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
 }
 
 /*
+ * Queue handlers.
+ */
+static void rt2500usb_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u16 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
+                rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
+                rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
+                break;
+        case QID_BEACON:
+                rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
+                rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
+                rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
+                rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
+                rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2500usb_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u16 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
+                rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
+                rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
+                break;
+        case QID_BEACON:
+                rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
+                rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
+                rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
+                rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
+                rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Initialization functions.
  */
 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
@@ -931,17 +980,6 @@ static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                                enum dev_state state)
-{
-        u16 reg;
-
-        rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
-        rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
-                           (state == STATE_RADIO_RX_OFF));
-        rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
-}
-
 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
 {
         /*
@@ -1017,10 +1055,6 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
         case STATE_RADIO_OFF:
                 rt2500usb_disable_radio(rt2x00dev);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt2500usb_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -1203,14 +1237,6 @@ static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
         return length;
 }
 
-static void rt2500usb_kill_tx_queue(struct data_queue *queue)
-{
-        if (queue->qid == QID_BEACON)
-                rt2500usb_register_write(queue->rt2x00dev, TXRX_CSR19, 0);
-
-        rt2x00usb_kill_tx_queue(queue);
-}
-
 /*
  * RX control handlers
  */
@@ -1811,11 +1837,13 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
         .link_stats             = rt2500usb_link_stats,
         .reset_tuner            = rt2500usb_reset_tuner,
         .watchdog               = rt2x00usb_watchdog,
+        .start_queue            = rt2500usb_start_queue,
+        .kick_queue             = rt2x00usb_kick_queue,
+        .stop_queue             = rt2500usb_stop_queue,
+        .flush_queue            = rt2x00usb_flush_queue,
         .write_tx_desc          = rt2500usb_write_tx_desc,
         .write_beacon           = rt2500usb_write_beacon,
         .get_tx_data_len        = rt2500usb_get_tx_data_len,
-        .kick_tx_queue          = rt2x00usb_kick_tx_queue,
-        .kill_tx_queue          = rt2500usb_kill_tx_queue,
         .fill_rxdone            = rt2500usb_fill_rxdone,
         .config_shared_key      = rt2500usb_config_key,
         .config_pairwise_key    = rt2500usb_config_key,
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index a81c4371835b..4c55e8525cad 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -46,8 +46,11 @@
  * RF2020 2.4G B/G
  * RF3021 2.4G 1T2R
  * RF3022 2.4G 2T2R
- * RF3052 2.4G 2T2R
- * RF3320 2.4G 1T1R
+ * RF3052 2.4G/5G 2T2R
+ * RF2853 2.4G/5G 3T3R
+ * RF3320 2.4G 1T1R(RT3350/RT3370/RT3390)
+ * RF3322 2.4G 2T2R(RT3352/RT3371/RT3372/RT3391/RT3392)
+ * RF3853 2.4G/5G 3T3R(RT3883/RT3563/RT3573/RT3593/RT3662)
  */
 #define RF2820                          0x0001
 #define RF2850                          0x0002
@@ -58,7 +61,10 @@
 #define RF3021                          0x0007
 #define RF3022                          0x0008
 #define RF3052                          0x0009
+#define RF2853                          0x000a
 #define RF3320                          0x000b
+#define RF3322                          0x000c
+#define RF3853                          0x000d
 
 /*
  * Chipset revisions.
@@ -207,10 +213,10 @@
 
 /*
  * WMM_AIFSN_CFG: Aifsn for each EDCA AC
- * AIFSN0: AC_BE
- * AIFSN1: AC_BK
- * AIFSN2: AC_VI
- * AIFSN3: AC_VO
+ * AIFSN0: AC_VO
+ * AIFSN1: AC_VI
+ * AIFSN2: AC_BE
+ * AIFSN3: AC_BK
  */
 #define WMM_AIFSN_CFG                   0x0214
 #define WMM_AIFSN_CFG_AIFSN0            FIELD32(0x0000000f)
@@ -220,10 +226,10 @@
 
 /*
  * WMM_CWMIN_CSR: CWmin for each EDCA AC
- * CWMIN0: AC_BE
- * CWMIN1: AC_BK
- * CWMIN2: AC_VI
- * CWMIN3: AC_VO
+ * CWMIN0: AC_VO
+ * CWMIN1: AC_VI
+ * CWMIN2: AC_BE
+ * CWMIN3: AC_BK
  */
 #define WMM_CWMIN_CFG                   0x0218
 #define WMM_CWMIN_CFG_CWMIN0            FIELD32(0x0000000f)
@@ -233,10 +239,10 @@
 
 /*
  * WMM_CWMAX_CSR: CWmax for each EDCA AC
- * CWMAX0: AC_BE
- * CWMAX1: AC_BK
- * CWMAX2: AC_VI
- * CWMAX3: AC_VO
+ * CWMAX0: AC_VO
+ * CWMAX1: AC_VI
+ * CWMAX2: AC_BE
+ * CWMAX3: AC_BK
  */
 #define WMM_CWMAX_CFG                   0x021c
 #define WMM_CWMAX_CFG_CWMAX0            FIELD32(0x0000000f)
@@ -245,18 +251,18 @@
 #define WMM_CWMAX_CFG_CWMAX3            FIELD32(0x0000f000)
 
 /*
- * AC_TXOP0: AC_BK/AC_BE TXOP register
- * AC0TXOP: AC_BK in unit of 32us
- * AC1TXOP: AC_BE in unit of 32us
+ * AC_TXOP0: AC_VO/AC_VI TXOP register
+ * AC0TXOP: AC_VO in unit of 32us
+ * AC1TXOP: AC_VI in unit of 32us
  */
 #define WMM_TXOP0_CFG                   0x0220
 #define WMM_TXOP0_CFG_AC0TXOP           FIELD32(0x0000ffff)
 #define WMM_TXOP0_CFG_AC1TXOP           FIELD32(0xffff0000)
 
 /*
- * AC_TXOP1: AC_VO/AC_VI TXOP register
- * AC2TXOP: AC_VI in unit of 32us
- * AC3TXOP: AC_VO in unit of 32us
+ * AC_TXOP1: AC_BE/AC_BK TXOP register
+ * AC2TXOP: AC_BE in unit of 32us
+ * AC3TXOP: AC_BK in unit of 32us
  */
 #define WMM_TXOP1_CFG                   0x0224
 #define WMM_TXOP1_CFG_AC2TXOP           FIELD32(0x0000ffff)
@@ -282,7 +288,7 @@
 #define MCU_CMD_CFG                     0x022c
 
 /*
- * AC_BK register offsets
+ * AC_VO register offsets
  */
 #define TX_BASE_PTR0                    0x0230
 #define TX_MAX_CNT0                     0x0234
@@ -290,7 +296,7 @@
 #define TX_DTX_IDX0                     0x023c
 
 /*
- * AC_BE register offsets
+ * AC_VI register offsets
  */
 #define TX_BASE_PTR1                    0x0240
 #define TX_MAX_CNT1                     0x0244
@@ -298,7 +304,7 @@
 #define TX_DTX_IDX1                     0x024c
 
 /*
- * AC_VI register offsets
+ * AC_BE register offsets
  */
 #define TX_BASE_PTR2                    0x0250
 #define TX_MAX_CNT2                     0x0254
@@ -306,7 +312,7 @@
 #define TX_DTX_IDX2                     0x025c
 
 /*
- * AC_VO register offsets
+ * AC_BK register offsets
  */
 #define TX_BASE_PTR3                    0x0260
 #define TX_MAX_CNT3                     0x0264
@@ -699,8 +705,18 @@
 
 /*
  * CH_TIME_CFG: count as channel busy
+ * EIFS_BUSY: Count EIFS as channel busy
+ * NAV_BUSY: Count NAS as channel busy
+ * RX_BUSY: Count RX as channel busy
+ * TX_BUSY: Count TX as channel busy
+ * TMR_EN: Enable channel statistics timer
  */
 #define CH_TIME_CFG                     0x110c
+#define CH_TIME_CFG_EIFS_BUSY           FIELD32(0x00000010)
+#define CH_TIME_CFG_NAV_BUSY            FIELD32(0x00000008)
+#define CH_TIME_CFG_RX_BUSY             FIELD32(0x00000004)
+#define CH_TIME_CFG_TX_BUSY             FIELD32(0x00000002)
+#define CH_TIME_CFG_TMR_EN              FIELD32(0x00000001)
 
 /*
  * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
@@ -1841,32 +1857,51 @@ struct mac_iveiv_entry {
 #define EEPROM_MAC_ADDR_BYTE5           FIELD16(0xff00)
 
 /*
- * EEPROM ANTENNA config
+ * EEPROM NIC Configuration 0
  * RXPATH: 1: 1R, 2: 2R, 3: 3R
- * TXPATH: 1: 1T, 2: 2T
- */
-#define EEPROM_ANTENNA                  0x001a
-#define EEPROM_ANTENNA_RXPATH           FIELD16(0x000f)
-#define EEPROM_ANTENNA_TXPATH           FIELD16(0x00f0)
-#define EEPROM_ANTENNA_RF_TYPE          FIELD16(0x0f00)
-
-/*
- * EEPROM NIC config
- * CARDBUS_ACCEL: 0 - enable, 1 - disable
- */
-#define EEPROM_NIC                      0x001b
-#define EEPROM_NIC_HW_RADIO             FIELD16(0x0001)
-#define EEPROM_NIC_DYNAMIC_TX_AGC       FIELD16(0x0002)
-#define EEPROM_NIC_EXTERNAL_LNA_BG      FIELD16(0x0004)
-#define EEPROM_NIC_EXTERNAL_LNA_A       FIELD16(0x0008)
-#define EEPROM_NIC_CARDBUS_ACCEL        FIELD16(0x0010)
-#define EEPROM_NIC_BW40M_SB_BG          FIELD16(0x0020)
-#define EEPROM_NIC_BW40M_SB_A           FIELD16(0x0040)
-#define EEPROM_NIC_WPS_PBC              FIELD16(0x0080)
-#define EEPROM_NIC_BW40M_BG             FIELD16(0x0100)
-#define EEPROM_NIC_BW40M_A              FIELD16(0x0200)
-#define EEPROM_NIC_ANT_DIVERSITY        FIELD16(0x0800)
-#define EEPROM_NIC_DAC_TEST             FIELD16(0x8000)
+ * TXPATH: 1: 1T, 2: 2T, 3: 3T
+ * RF_TYPE: RFIC type
+ */
+#define EEPROM_NIC_CONF0                0x001a
+#define EEPROM_NIC_CONF0_RXPATH         FIELD16(0x000f)
+#define EEPROM_NIC_CONF0_TXPATH         FIELD16(0x00f0)
+#define EEPROM_NIC_CONF0_RF_TYPE                FIELD16(0x0f00)
+
+/*
+ * EEPROM NIC Configuration 1
+ * HW_RADIO: 0: disable, 1: enable
+ * EXTERNAL_TX_ALC: 0: disable, 1: enable
+ * EXTERNAL_LNA_2G: 0: disable, 1: enable
+ * EXTERNAL_LNA_5G: 0: disable, 1: enable
+ * CARDBUS_ACCEL: 0: enable, 1: disable
+ * BW40M_SB_2G: 0: disable, 1: enable
+ * BW40M_SB_5G: 0: disable, 1: enable
+ * WPS_PBC: 0: disable, 1: enable
+ * BW40M_2G: 0: enable, 1: disable
+ * BW40M_5G: 0: enable, 1: disable
+ * BROADBAND_EXT_LNA: 0: disable, 1: enable
+ * ANT_DIVERSITY: 00: Disable, 01: Diversity,
+ *                                10: Main antenna, 11: Aux antenna
+ * INTERNAL_TX_ALC: 0: disable, 1: enable
+ * BT_COEXIST: 0: disable, 1: enable
+ * DAC_TEST: 0: disable, 1: enable
+ */
+#define EEPROM_NIC_CONF1                0x001b
+#define EEPROM_NIC_CONF1_HW_RADIO               FIELD16(0x0001)
+#define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC                FIELD16(0x0002)
+#define EEPROM_NIC_CONF1_EXTERNAL_LNA_2G                FIELD16(0x0004)
+#define EEPROM_NIC_CONF1_EXTERNAL_LNA_5G                FIELD16(0x0008)
+#define EEPROM_NIC_CONF1_CARDBUS_ACCEL          FIELD16(0x0010)
+#define EEPROM_NIC_CONF1_BW40M_SB_2G            FIELD16(0x0020)
+#define EEPROM_NIC_CONF1_BW40M_SB_5G            FIELD16(0x0040)
+#define EEPROM_NIC_CONF1_WPS_PBC                FIELD16(0x0080)
+#define EEPROM_NIC_CONF1_BW40M_2G               FIELD16(0x0100)
+#define EEPROM_NIC_CONF1_BW40M_5G               FIELD16(0x0200)
+#define EEPROM_NIC_CONF1_BROADBAND_EXT_LNA              FIELD16(0x400)
+#define EEPROM_NIC_CONF1_ANT_DIVERSITY          FIELD16(0x1800)
+#define EEPROM_NIC_CONF1_INTERNAL_TX_ALC                FIELD16(0x2000)
+#define EEPROM_NIC_CONF1_BT_COEXIST             FIELD16(0x4000)
+#define EEPROM_NIC_CONF1_DAC_TEST               FIELD16(0x8000)
 
 /*
  * EEPROM frequency
@@ -1888,9 +1923,9 @@ struct mac_iveiv_entry {
  * POLARITY_GPIO_4: Polarity GPIO4 setting.
  * LED_MODE: Led mode.
  */
-#define EEPROM_LED1                     0x001e
-#define EEPROM_LED2                     0x001f
-#define EEPROM_LED3                     0x0020
+#define EEPROM_LED_AG_CONF              0x001e
+#define EEPROM_LED_ACT_CONF             0x001f
+#define EEPROM_LED_POLARITY             0x0020
 #define EEPROM_LED_POLARITY_RDY_BG      FIELD16(0x0001)
 #define EEPROM_LED_POLARITY_RDY_A       FIELD16(0x0002)
 #define EEPROM_LED_POLARITY_ACT         FIELD16(0x0004)
@@ -1902,6 +1937,17 @@ struct mac_iveiv_entry {
 #define EEPROM_LED_LED_MODE             FIELD16(0x1f00)
 
 /*
+ * EEPROM NIC Configuration 2
+ * RX_STREAM: 0: Reserved, 1: 1 Stream, 2: 2 Stream
+ * TX_STREAM: 0: Reserved, 1: 1 Stream, 2: 2 Stream
+ * CRYSTAL: 00: Reserved, 01: One crystal, 10: Two crystal, 11: Reserved
+ */
+#define EEPROM_NIC_CONF2                0x0021
+#define EEPROM_NIC_CONF2_RX_STREAM              FIELD16(0x000f)
+#define EEPROM_NIC_CONF2_TX_STREAM              FIELD16(0x00f0)
+#define EEPROM_NIC_CONF2_CRYSTAL                FIELD16(0x0600)
+
+/*
  * EEPROM LNA
  */
 #define EEPROM_LNA                      0x0022
@@ -1951,7 +1997,7 @@ struct mac_iveiv_entry {
 
 /*
  * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
- *      This is delta in 40MHZ.
+ * This is delta in 40MHZ.
  * VALUE: Tx Power dalta value (MAX=4)
  * TYPE: 1: Plus the delta value, 0: minus the delta value
  * TXPOWER: Enable:
@@ -2007,9 +2053,9 @@ struct mac_iveiv_entry {
 #define MCU_CURRENT                     0x36
 #define MCU_LED                         0x50
 #define MCU_LED_STRENGTH                0x51
-#define MCU_LED_1                       0x52
-#define MCU_LED_2                       0x53
-#define MCU_LED_3                       0x54
+#define MCU_LED_AG_CONF         0x52
+#define MCU_LED_ACT_CONF                0x53
+#define MCU_LED_LED_POLARITY            0x54
 #define MCU_RADAR                       0x60
 #define MCU_BOOT_SIGNAL                 0x72
 #define MCU_BBP_SIGNAL                  0x80
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 75631614aba3..54917a281398 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -772,6 +772,7 @@ void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc)
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
         unsigned int beacon_base;
+        unsigned int padding_len;
         u32 reg;
 
         /*
@@ -806,11 +807,13 @@ void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc)
         rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
 
         /*
-         * Write entire beacon with TXWI to register.
+         * Write entire beacon with TXWI and padding to register.
          */
+        padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
+        skb_pad(entry->skb, padding_len);
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
-        rt2800_register_multiwrite(rt2x00dev, beacon_base,
-                                   entry->skb->data, entry->skb->len);
+        rt2800_register_multiwrite(rt2x00dev, beacon_base, entry->skb->data,
+                                   entry->skb->len + padding_len);
 
         /*
          * Enable beaconing again.
@@ -1625,6 +1628,13 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
         }
 
         msleep(1);
+
+        /*
+         * Clear channel statistic counters
+         */
+        rt2800_register_read(rt2x00dev, CH_IDLE_STA, &reg);
+        rt2800_register_read(rt2x00dev, CH_BUSY_STA, &reg);
+        rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &reg);
 }
 
 static void rt2800_config_txpower(struct rt2x00_dev *rt2x00dev,
@@ -1930,8 +1940,8 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
                 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
                     rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) ||
                     rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) {
-                        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
-                        if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
+                        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+                        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
                                 rt2800_register_write(rt2x00dev, TX_SW_CFG2,
                                                       0x0000002c);
                         else
@@ -2259,6 +2269,17 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2x00_set_field32(&reg, INT_TIMER_CFG_PRE_TBTT_TIMER, 6 << 4);
         rt2800_register_write(rt2x00dev, INT_TIMER_CFG, reg);
 
+        /*
+         * Set up channel statistics timer
+         */
+        rt2800_register_read(rt2x00dev, CH_TIME_CFG, &reg);
+        rt2x00_set_field32(&reg, CH_TIME_CFG_EIFS_BUSY, 1);
+        rt2x00_set_field32(&reg, CH_TIME_CFG_NAV_BUSY, 1);
+        rt2x00_set_field32(&reg, CH_TIME_CFG_RX_BUSY, 1);
+        rt2x00_set_field32(&reg, CH_TIME_CFG_TX_BUSY, 1);
+        rt2x00_set_field32(&reg, CH_TIME_CFG_TMR_EN, 1);
+        rt2800_register_write(rt2x00dev, CH_TIME_CFG, reg);
+
         return 0;
 }
 
@@ -2376,10 +2397,10 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
             rt2x00_rt(rt2x00dev, RT3390)) {
                 rt2800_bbp_read(rt2x00dev, 138, &value);
 
-                rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
-                if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1)
+                rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
+                if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1)
                         value |= 0x20;
-                if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1)
+                if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
                         value &= ~0x02;
 
                 rt2800_bbp_write(rt2x00dev, 138, value);
@@ -2591,8 +2612,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
                 rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
                 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
                     rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E)) {
-                        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
-                        if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
+                        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+                        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
                                 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
                         else
                                 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 0);
@@ -2665,10 +2686,10 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
         if (rt2x00_rt(rt2x00dev, RT3090)) {
                 rt2800_bbp_read(rt2x00dev, 138, &bbp);
 
-                rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
-                if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1)
+                rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
+                if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
                         rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0);
-                if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1)
+                if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1)
                         rt2x00_set_field8(&bbp, BBP138_TX_DAC1, 1);
 
                 rt2800_bbp_write(rt2x00dev, 138, bbp);
@@ -2767,16 +2788,16 @@ int rt2800_enable_radio(struct rt2x00_dev *rt2x00dev)
         /*
          * Initialize LED control
          */
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
-        rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_AG_CONF, &word);
+        rt2800_mcu_request(rt2x00dev, MCU_LED_AG_CONF, 0xff,
                            word & 0xff, (word >> 8) & 0xff);
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
-        rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_ACT_CONF, &word);
+        rt2800_mcu_request(rt2x00dev, MCU_LED_ACT_CONF, 0xff,
                            word & 0xff, (word >> 8) & 0xff);
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
-        rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_POLARITY, &word);
+        rt2800_mcu_request(rt2x00dev, MCU_LED_LED_POLARITY, 0xff,
                            word & 0xff, (word >> 8) & 0xff);
 
         return 0;
@@ -2870,38 +2891,41 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
                 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
         }
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &word);
         if (word == 0xffff) {
-                rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
-                rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1);
-                rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 2);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
         } else if (rt2x00_rt(rt2x00dev, RT2860) ||
                    rt2x00_rt(rt2x00dev, RT2872)) {
                 /*
                  * There is a max of 2 RX streams for RT28x0 series
                  */
-                if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2)
-                        rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
+                if (rt2x00_get_field16(word, EEPROM_NIC_CONF0_RXPATH) > 2)
+                        rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 2);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
         }
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &word);
         if (word == 0xffff) {
-                rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_ANT_DIVERSITY, 0);
-                rt2x00_set_field16(&word, EEPROM_NIC_DAC_TEST, 0);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_HW_RADIO, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_TX_ALC, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_LNA_2G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_LNA_5G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_CARDBUS_ACCEL, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_SB_2G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_SB_5G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_WPS_PBC, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_2G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_5G, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BROADBAND_EXT_LNA, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_ANT_DIVERSITY, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_INTERNAL_TX_ALC, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BT_COEXIST, 0);
+                rt2x00_set_field16(&word, EEPROM_NIC_CONF1_DAC_TEST, 0);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF1, word);
                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
         }
 
@@ -2916,9 +2940,9 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
                                    LED_MODE_TXRX_ACTIVITY);
                 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221);
-                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_AG_CONF, 0x5555);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_ACT_CONF, 0x2221);
+                rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_POLARITY, 0xa9f8);
                 EEPROM(rt2x00dev, "Led Mode: 0x%04x\n", word);
         }
 
@@ -2982,12 +3006,12 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
         /*
          * Read EEPROM word for configuration.
          */
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
 
         /*
          * Identify RF chipset.
          */
-        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
+        value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
         rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
 
         rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
@@ -3023,9 +3047,9 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
          * Identify default antenna configuration.
          */
         rt2x00dev->default_ant.tx =
-            rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH);
+            rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH);
         rt2x00dev->default_ant.rx =
-            rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH);
+            rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH);
 
         /*
          * Read frequency offset and RF programming sequence.
@@ -3036,17 +3060,17 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
         /*
          * Read external LNA informations.
          */
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
 
-        if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
+        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_LNA_5G))
                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
-        if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
+        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_LNA_2G))
                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 
         /*
          * Detect if this device has an hardware controlled radio.
          */
-        if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO))
+        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_HW_RADIO))
                 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
 
         /*
@@ -3258,7 +3282,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
         rt2x00dev->hw->max_report_rates = 7;
         rt2x00dev->hw->max_rate_tries = 1;
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
 
         /*
          * Initialize hw_mode information.
@@ -3302,11 +3326,11 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
             IEEE80211_HT_CAP_SGI_20 |
             IEEE80211_HT_CAP_SGI_40;
 
-        if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) >= 2)
+        if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) >= 2)
                 spec->ht.cap |= IEEE80211_HT_CAP_TX_STBC;
 
         spec->ht.cap |=
-            rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) <<
+            rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) <<
                 IEEE80211_HT_CAP_RX_STBC_SHIFT;
 
         spec->ht.ampdu_factor = 3;
@@ -3314,10 +3338,10 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
         spec->ht.mcs.tx_params =
             IEEE80211_HT_MCS_TX_DEFINED |
             IEEE80211_HT_MCS_TX_RX_DIFF |
-            ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
+            ((rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) - 1) <<
                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 
-        switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
+        switch (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH)) {
         case 3:
                 spec->ht.mcs.rx_mask[2] = 0xff;
         case 2:
@@ -3536,6 +3560,37 @@ int rt2800_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
 }
 EXPORT_SYMBOL_GPL(rt2800_ampdu_action);
 
+int rt2800_get_survey(struct ieee80211_hw *hw, int idx,
+                      struct survey_info *survey)
+{
+        struct rt2x00_dev *rt2x00dev = hw->priv;
+        struct ieee80211_conf *conf = &hw->conf;
+        u32 idle, busy, busy_ext;
+
+        if (idx != 0)
+                return -ENOENT;
+
+        survey->channel = conf->channel;
+
+        rt2800_register_read(rt2x00dev, CH_IDLE_STA, &idle);
+        rt2800_register_read(rt2x00dev, CH_BUSY_STA, &busy);
+        rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &busy_ext);
+
+        if (idle || busy) {
+                survey->filled = SURVEY_INFO_CHANNEL_TIME |
+                                 SURVEY_INFO_CHANNEL_TIME_BUSY |
+                                 SURVEY_INFO_CHANNEL_TIME_EXT_BUSY;
+
+                survey->channel_time = (idle + busy) / 1000;
+                survey->channel_time_busy = busy / 1000;
+                survey->channel_time_ext_busy = busy_ext / 1000;
+        }
+
+        return 0;
+
+}
+EXPORT_SYMBOL_GPL(rt2800_get_survey);
+
 MODULE_AUTHOR(DRV_PROJECT ", Bartlomiej Zolnierkiewicz");
 MODULE_VERSION(DRV_VERSION);
 MODULE_DESCRIPTION("Ralink RT2800 library");
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h
index 81cbc92e7857..e3c995a9dec4 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.h
+++ b/drivers/net/wireless/rt2x00/rt2800lib.h
@@ -199,5 +199,7 @@ u64 rt2800_get_tsf(struct ieee80211_hw *hw);
 int rt2800_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
                         enum ieee80211_ampdu_mlme_action action,
                         struct ieee80211_sta *sta, u16 tid, u16 *ssn);
+int rt2800_get_survey(struct ieee80211_hw *hw, int idx,
+                      struct survey_info *survey);
 
 #endif /* RT2800LIB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index b989b0d3ed49..baa1468a56a8 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -186,6 +186,77 @@ static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
 #endif /* CONFIG_PCI */
 
 /*
+ * Queue handlers.
+ */
+static void rt2800pci_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+                rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
+                rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+                break;
+        case QID_BEACON:
+                rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
+                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+                break;
+        default:
+                break;
+        };
+}
+
+static void rt2800pci_kick_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        struct queue_entry *entry;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_AC_BE:
+        case QID_AC_BK:
+                entry = rt2x00queue_get_entry(queue, Q_INDEX);
+                rt2800_register_write(rt2x00dev, TX_CTX_IDX(queue->qid), entry->entry_idx);
+                break;
+        case QID_MGMT:
+                entry = rt2x00queue_get_entry(queue, Q_INDEX);
+                rt2800_register_write(rt2x00dev, TX_CTX_IDX(5), entry->entry_idx);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2800pci_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+                rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);
+                rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+                break;
+        case QID_BEACON:
+                rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
+                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Firmware functions
  */
 static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -323,17 +394,6 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt2800pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                                enum dev_state state)
-{
-        u32 reg;
-
-        rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
-        rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
-                           (state == STATE_RADIO_RX_ON));
-        rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
-}
-
 static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
                                  enum dev_state state)
 {
@@ -477,10 +537,6 @@ static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
                 rt2800pci_disable_radio(rt2x00dev);
                 rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt2800pci_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -566,41 +622,6 @@ static void rt2800pci_write_tx_desc(struct queue_entry *entry,
 }
 
 /*
- * TX data initialization
- */
-static void rt2800pci_kick_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
-        unsigned int qidx;
-
-        if (queue->qid == QID_MGMT)
-                qidx = 5;
-        else
-                qidx = queue->qid;
-
-        rt2800_register_write(rt2x00dev, TX_CTX_IDX(qidx), entry->entry_idx);
-}
-
-static void rt2800pci_kill_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        if (queue->qid == QID_BEACON) {
-                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, 0);
-                return;
-        }
-
-        rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
-        rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, (queue->qid == QID_AC_BE));
-        rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, (queue->qid == QID_AC_BK));
-        rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, (queue->qid == QID_AC_VI));
-        rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, (queue->qid == QID_AC_VO));
-        rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
-}
-
-/*
  * RX control handlers
  */
 static void rt2800pci_fill_rxdone(struct queue_entry *entry,
@@ -682,7 +703,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
                          * this tx status.
                          */
                         WARNING(rt2x00dev, "Got TX status report with "
-                                           "unexpected pid %u, dropping", qid);
+                                           "unexpected pid %u, dropping\n", qid);
                         break;
                 }
 
@@ -693,7 +714,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
                          * processing here and drop the tx status
                          */
                         WARNING(rt2x00dev, "Got TX status for an unavailable "
-                                           "queue %u, dropping", qid);
+                                           "queue %u, dropping\n", qid);
                         break;
                 }
 
@@ -703,7 +724,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
                          * and drop the tx status.
                          */
                         WARNING(rt2x00dev, "Got TX status for an empty "
-                                           "queue %u, dropping", qid);
+                                           "queue %u, dropping\n", qid);
                         break;
                 }
 
@@ -944,6 +965,7 @@ static const struct ieee80211_ops rt2800pci_mac80211_ops = {
         .rfkill_poll            = rt2x00mac_rfkill_poll,
         .ampdu_action           = rt2800_ampdu_action,
         .flush                  = rt2x00mac_flush,
+        .get_survey             = rt2800_get_survey,
 };
 
 static const struct rt2800_ops rt2800pci_rt2800_ops = {
@@ -976,11 +998,12 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
         .link_stats             = rt2800_link_stats,
         .reset_tuner            = rt2800_reset_tuner,
         .link_tuner             = rt2800_link_tuner,
+        .start_queue            = rt2800pci_start_queue,
+        .kick_queue             = rt2800pci_kick_queue,
+        .stop_queue             = rt2800pci_stop_queue,
         .write_tx_desc          = rt2800pci_write_tx_desc,
         .write_tx_data          = rt2800_write_tx_data,
         .write_beacon           = rt2800_write_beacon,
-        .kick_tx_queue          = rt2800pci_kick_tx_queue,
-        .kill_tx_queue          = rt2800pci_kill_tx_queue,
         .fill_rxdone            = rt2800pci_fill_rxdone,
         .config_shared_key      = rt2800_config_shared_key,
         .config_pairwise_key    = rt2800_config_pairwise_key,
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 935b76d3ce4f..3e0205ddf7b4 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -50,6 +50,55 @@ module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
 
 /*
+ * Queue handlers.
+ */
+static void rt2800usb_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+                rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
+                rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+                break;
+        case QID_BEACON:
+                rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
+                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt2800usb_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+                rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);
+                rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+                break;
+        case QID_BEACON:
+                rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
+                rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
+                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Firmware functions
  */
 static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -107,17 +156,6 @@ static int rt2800usb_write_firmware(struct rt2x00_dev *rt2x00dev,
 /*
  * Device state switch handlers.
  */
-static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                                enum dev_state state)
-{
-        u32 reg;
-
-        rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
-        rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
-                           (state == STATE_RADIO_RX_ON));
-        rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
-}
-
 static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
 {
         u32 reg;
@@ -214,10 +252,6 @@ static int rt2800usb_set_device_state(struct rt2x00_dev *rt2x00dev,
                 rt2800usb_disable_radio(rt2x00dev);
                 rt2800usb_set_state(rt2x00dev, STATE_SLEEP);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt2800usb_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -253,7 +287,7 @@ static void rt2800usb_watchdog(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, TXRXQ_PCNT, &reg);
         if (rt2x00_get_field32(reg, TXRXQ_PCNT_TX0Q)) {
                 WARNING(rt2x00dev, "TX HW queue 0 timed out,"
-                        " invoke forced kick");
+                        " invoke forced kick\n");
 
                 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40012);
 
@@ -269,7 +303,7 @@ static void rt2800usb_watchdog(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, TXRXQ_PCNT, &reg);
         if (rt2x00_get_field32(reg, TXRXQ_PCNT_TX1Q)) {
                 WARNING(rt2x00dev, "TX HW queue 1 timed out,"
-                        " invoke forced kick");
+                        " invoke forced kick\n");
 
                 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf4000a);
 
@@ -389,14 +423,6 @@ static void rt2800usb_work_txdone(struct work_struct *work)
         }
 }
 
-static void rt2800usb_kill_tx_queue(struct data_queue *queue)
-{
-        if (queue->qid == QID_BEACON)
-                rt2x00usb_register_write(queue->rt2x00dev, BCN_TIME_CFG, 0);
-
-        rt2x00usb_kill_tx_queue(queue);
-}
-
 /*
  * RX control handlers
  */
@@ -562,6 +588,7 @@ static const struct ieee80211_ops rt2800usb_mac80211_ops = {
         .rfkill_poll            = rt2x00mac_rfkill_poll,
         .ampdu_action           = rt2800_ampdu_action,
         .flush                  = rt2x00mac_flush,
+        .get_survey             = rt2800_get_survey,
 };
 
 static const struct rt2800_ops rt2800usb_rt2800_ops = {
@@ -591,12 +618,14 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
         .reset_tuner            = rt2800_reset_tuner,
         .link_tuner             = rt2800_link_tuner,
         .watchdog               = rt2800usb_watchdog,
+        .start_queue            = rt2800usb_start_queue,
+        .kick_queue             = rt2x00usb_kick_queue,
+        .stop_queue             = rt2800usb_stop_queue,
+        .flush_queue            = rt2x00usb_flush_queue,
         .write_tx_desc          = rt2800usb_write_tx_desc,
         .write_tx_data          = rt2800usb_write_tx_data,
         .write_beacon           = rt2800_write_beacon,
         .get_tx_data_len        = rt2800usb_get_tx_data_len,
-        .kick_tx_queue          = rt2x00usb_kick_tx_queue,
-        .kill_tx_queue          = rt2800usb_kill_tx_queue,
         .fill_rxdone            = rt2800usb_fill_rxdone,
         .config_shared_key      = rt2800_config_shared_key,
         .config_pairwise_key    = rt2800_config_pairwise_key,
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index e72117f3fdf5..c254d5a62c7d 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -66,7 +66,7 @@
 
 #ifdef CONFIG_RT2X00_DEBUG
 #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \
-        DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args);
+        DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args)
 #else
 #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \
         do { } while (0)
@@ -567,7 +567,15 @@ struct rt2x00lib_ops {
                              struct link_qual *qual);
         void (*link_tuner) (struct rt2x00_dev *rt2x00dev,
                             struct link_qual *qual, const u32 count);
+
+        /*
+         * Data queue handlers.
+         */
         void (*watchdog) (struct rt2x00_dev *rt2x00dev);
+        void (*start_queue) (struct data_queue *queue);
+        void (*kick_queue) (struct data_queue *queue);
+        void (*stop_queue) (struct data_queue *queue);
+        void (*flush_queue) (struct data_queue *queue);
 
         /*
          * TX control handlers
@@ -579,8 +587,6 @@ struct rt2x00lib_ops {
         void (*write_beacon) (struct queue_entry *entry,
                               struct txentry_desc *txdesc);
         int (*get_tx_data_len) (struct queue_entry *entry);
-        void (*kick_tx_queue) (struct data_queue *queue);
-        void (*kill_tx_queue) (struct data_queue *queue);
 
         /*
          * RX control handlers
@@ -1068,6 +1074,78 @@ struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
                                           enum queue_index index);
 
+/**
+ * rt2x00queue_pause_queue - Pause a data queue
+ * @queue: Pointer to &struct data_queue.
+ *
+ * This function will pause the data queue locally, preventing
+ * new frames to be added to the queue (while the hardware is
+ * still allowed to run).
+ */
+void rt2x00queue_pause_queue(struct data_queue *queue);
+
+/**
+ * rt2x00queue_unpause_queue - unpause a data queue
+ * @queue: Pointer to &struct data_queue.
+ *
+ * This function will unpause the data queue locally, allowing
+ * new frames to be added to the queue again.
+ */
+void rt2x00queue_unpause_queue(struct data_queue *queue);
+
+/**
+ * rt2x00queue_start_queue - Start a data queue
+ * @queue: Pointer to &struct data_queue.
+ *
+ * This function will start handling all pending frames in the queue.
+ */
+void rt2x00queue_start_queue(struct data_queue *queue);
+
+/**
+ * rt2x00queue_stop_queue - Halt a data queue
+ * @queue: Pointer to &struct data_queue.
+ *
+ * This function will stop all pending frames in the queue.
+ */
+void rt2x00queue_stop_queue(struct data_queue *queue);
+
+/**
+ * rt2x00queue_flush_queue - Flush a data queue
+ * @queue: Pointer to &struct data_queue.
+ * @drop: True to drop all pending frames.
+ *
+ * This function will flush the queue. After this call
+ * the queue is guarenteed to be empty.
+ */
+void rt2x00queue_flush_queue(struct data_queue *queue, bool drop);
+
+/**
+ * rt2x00queue_start_queues - Start all data queues
+ * @rt2x00dev: Pointer to &struct rt2x00_dev.
+ *
+ * This function will loop through all available queues to start them
+ */
+void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev);
+
+/**
+ * rt2x00queue_stop_queues - Halt all data queues
+ * @rt2x00dev: Pointer to &struct rt2x00_dev.
+ *
+ * This function will loop through all available queues to stop
+ * any pending frames.
+ */
+void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev);
+
+/**
+ * rt2x00queue_flush_queues - Flush all data queues
+ * @rt2x00dev: Pointer to &struct rt2x00_dev.
+ * @drop: True to drop all pending frames.
+ *
+ * This function will loop through all available queues to flush
+ * any pending frames.
+ */
+void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop);
+
 /*
  * Debugfs handlers.
  */
@@ -1093,6 +1171,7 @@ static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
  */
 void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev);
 void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev);
+void rt2x00lib_dmastart(struct queue_entry *entry);
 void rt2x00lib_dmadone(struct queue_entry *entry);
 void rt2x00lib_txdone(struct queue_entry *entry,
                       struct txdone_entry_desc *txdesc);
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index a238e908c854..70ca9379833b 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -146,8 +146,7 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
          * else the changes will be ignored by the device.
          */
         if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
-                rt2x00dev->ops->lib->set_device_state(rt2x00dev,
-                                                      STATE_RADIO_RX_OFF);
+                rt2x00queue_stop_queue(rt2x00dev->rx);
 
         /*
          * Write new antenna setup to device and reset the link tuner.
@@ -161,8 +160,7 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
         memcpy(active, &config, sizeof(config));
 
         if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
-                rt2x00dev->ops->lib->set_device_state(rt2x00dev,
-                                                      STATE_RADIO_RX_ON);
+                rt2x00queue_start_queue(rt2x00dev->rx);
 }
 
 void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c
index 64dfb1f6823e..c92db3264741 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.c
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.c
@@ -339,12 +339,13 @@ static ssize_t rt2x00debug_read_queue_stats(struct file *file,
                 return -ENOMEM;
 
         temp = data +
-            sprintf(data, "qid\tcount\tlimit\tlength\tindex\tdma done\tdone\n");
+            sprintf(data, "qid\tflags\t\tcount\tlimit\tlength\tindex\tdma done\tdone\n");
 
         queue_for_each(intf->rt2x00dev, queue) {
                 spin_lock_irqsave(&queue->index_lock, irqflags);
 
-                temp += sprintf(temp, "%d\t%d\t%d\t%d\t%d\t%d\t%d\n", queue->qid,
+                temp += sprintf(temp, "%d\t0x%.8x\t%d\t%d\t%d\t%d\t%d\t\t%d\n",
+                                queue->qid, (unsigned int)queue->flags,
                                 queue->count, queue->limit, queue->length,
                                 queue->index[Q_INDEX],
                                 queue->index[Q_INDEX_DMA_DONE],
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index bd3afc92f434..fa74acdd271f 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -66,9 +66,9 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev)
         set_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags);
 
         /*
-         * Enable RX.
+         * Enable queues.
          */
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_RX_ON);
+        rt2x00queue_start_queues(rt2x00dev);
         rt2x00link_start_tuner(rt2x00dev);
 
         /*
@@ -76,11 +76,6 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev)
          */
         rt2x00link_start_watchdog(rt2x00dev);
 
-        /*
-         * Start the TX queues.
-         */
-        ieee80211_wake_queues(rt2x00dev->hw);
-
         return 0;
 }
 
@@ -90,21 +85,16 @@ void rt2x00lib_disable_radio(struct rt2x00_dev *rt2x00dev)
                 return;
 
         /*
-         * Stop the TX queues in mac80211.
-         */
-        ieee80211_stop_queues(rt2x00dev->hw);
-        rt2x00queue_stop_queues(rt2x00dev);
-
-        /*
          * Stop watchdog monitoring.
          */
         rt2x00link_stop_watchdog(rt2x00dev);
 
         /*
-         * Disable RX.
+         * Stop all queues
          */
         rt2x00link_stop_tuner(rt2x00dev);
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_RX_OFF);
+        rt2x00queue_stop_queues(rt2x00dev);
+        rt2x00queue_flush_queues(rt2x00dev, true);
 
         /*
          * Disable radio.
@@ -236,8 +226,16 @@ void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev)
 }
 EXPORT_SYMBOL_GPL(rt2x00lib_pretbtt);
 
+void rt2x00lib_dmastart(struct queue_entry *entry)
+{
+        set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
+        rt2x00queue_index_inc(entry->queue, Q_INDEX);
+}
+EXPORT_SYMBOL_GPL(rt2x00lib_dmastart);
+
 void rt2x00lib_dmadone(struct queue_entry *entry)
 {
+        set_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags);
         clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
         rt2x00queue_index_inc(entry->queue, Q_INDEX_DMA_DONE);
 }
@@ -249,7 +247,6 @@ void rt2x00lib_txdone(struct queue_entry *entry,
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
-        enum data_queue_qid qid = skb_get_queue_mapping(entry->skb);
         unsigned int header_length, i;
         u8 rate_idx, rate_flags, retry_rates;
         u8 skbdesc_flags = skbdesc->flags;
@@ -403,7 +400,7 @@ void rt2x00lib_txdone(struct queue_entry *entry,
          * is reenabled when the txdone handler has finished.
          */
         if (!rt2x00queue_threshold(entry->queue))
-                ieee80211_wake_queue(rt2x00dev->hw, qid);
+                rt2x00queue_unpause_queue(entry->queue);
 }
 EXPORT_SYMBOL_GPL(rt2x00lib_txdone);
 
@@ -566,10 +563,8 @@ submit_entry:
         entry->flags = 0;
         rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE);
         if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) &&
-            test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) {
+            test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
                 rt2x00dev->ops->lib->clear_entry(entry);
-                rt2x00queue_index_inc(entry->queue, Q_INDEX);
-        }
 }
 EXPORT_SYMBOL_GPL(rt2x00lib_rxdone);
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index 2cf68f82674b..a105c500627b 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -178,15 +178,6 @@ int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
 void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index);
 
 /**
- * rt2x00queue_stop_queues - Halt all data queues
- * @rt2x00dev: Pointer to &struct rt2x00_dev.
- *
- * This function will loop through all available queues to stop
- * any pending outgoing frames.
- */
-void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev);
-
-/**
  * rt2x00queue_init_queues - Initialize all data queues
  * @rt2x00dev: Pointer to &struct rt2x00_dev.
  *
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index 829bf4be9bc3..4cac7ad60f47 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -104,7 +104,7 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
         struct rt2x00_dev *rt2x00dev = hw->priv;
         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
         enum data_queue_qid qid = skb_get_queue_mapping(skb);
-        struct data_queue *queue;
+        struct data_queue *queue = NULL;
 
         /*
          * Mac80211 might be calling this function while we are trying
@@ -153,7 +153,7 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
                 goto exit_fail;
 
         if (rt2x00queue_threshold(queue))
-                ieee80211_stop_queue(rt2x00dev->hw, qid);
+                rt2x00queue_pause_queue(queue);
 
         return NETDEV_TX_OK;
 
@@ -352,7 +352,7 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
          * if for any reason the link tuner must be reset, this will be
          * handled by rt2x00lib_config().
          */
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_RX_OFF);
+        rt2x00queue_stop_queue(rt2x00dev->rx);
 
         /*
          * When we've just turned on the radio, we want to reprogram
@@ -370,7 +370,7 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
         rt2x00lib_config_antenna(rt2x00dev, rt2x00dev->default_ant);
 
         /* Turn RX back on */
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_RX_ON);
+        rt2x00queue_start_queue(rt2x00dev->rx);
 
         return 0;
 }
@@ -718,36 +718,8 @@ void rt2x00mac_flush(struct ieee80211_hw *hw, bool drop)
 {
         struct rt2x00_dev *rt2x00dev = hw->priv;
         struct data_queue *queue;
-        unsigned int i = 0;
-
-        ieee80211_stop_queues(hw);
-
-        /*
-         * Run over all queues to kick them, this will force
-         * any pending frames to be transmitted.
-         */
-        tx_queue_for_each(rt2x00dev, queue) {
-                rt2x00dev->ops->lib->kick_tx_queue(queue);
-        }
-
-        /**
-         * All queues have been kicked, now wait for each queue
-         * to become empty. With a bit of luck, we only have to wait
-         * for the first queue to become empty, because while waiting
-         * for the that queue, the other queues will have transmitted
-         * all their frames as well (since they were already kicked).
-         */
-        tx_queue_for_each(rt2x00dev, queue) {
-                for (i = 0; i < 10; i++) {
-                        if (rt2x00queue_empty(queue))
-                                break;
-                        msleep(100);
-                }
-
-                if (!rt2x00queue_empty(queue))
-                        WARNING(rt2x00dev, "Failed to flush queue %d", queue->qid);
-        }
 
-        ieee80211_wake_queues(hw);
+        tx_queue_for_each(rt2x00dev, queue)
+                rt2x00queue_flush_queue(queue, drop);
 }
 EXPORT_SYMBOL_GPL(rt2x00mac_flush);
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c
index 868ca19b13ea..28e6ff1a6694 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.c
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.c
@@ -82,6 +82,13 @@ void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
                 skbdesc->desc_len = entry->queue->desc_size;
 
                 /*
+                 * DMA is already done, notify rt2x00lib that
+                 * it finished successfully.
+                 */
+                rt2x00lib_dmastart(entry);
+                rt2x00lib_dmadone(entry);
+
+                /*
                  * Send the frame to rt2x00lib for further processing.
                  */
                 rt2x00lib_rxdone(entry);
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h
index b854d62ff99b..746ce8fe8cf4 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.h
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.h
@@ -64,7 +64,7 @@ static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
                                                  const void *value,
                                                  const u32 length)
 {
-        memcpy_toio(rt2x00dev->csr.base + offset, value, length);
+        __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
 }
 
 /**
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index a3d79c7a21c6..ca82b3a91697 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -199,15 +199,18 @@ void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
 
 void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
 {
-        unsigned int l2pad = L2PAD_SIZE(header_length);
+        /*
+         * L2 padding is only present if the skb contains more than just the
+         * IEEE 802.11 header.
+         */
+        unsigned int l2pad = (skb->len > header_length) ?
+                                L2PAD_SIZE(header_length) : 0;
 
         if (!l2pad)
                 return;
 
-        memmove(skb->data + header_length, skb->data + header_length + l2pad,
-                                skb->len - header_length - l2pad);
-
-        skb_trim(skb, skb->len - l2pad);
+        memmove(skb->data + l2pad, skb->data, header_length);
+        skb_pull(skb, l2pad);
 }
 
 static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
@@ -468,7 +471,7 @@ static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
          */
         if (rt2x00queue_threshold(queue) ||
             !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
-                queue->rt2x00dev->ops->lib->kick_tx_queue(queue);
+                queue->rt2x00dev->ops->lib->kick_queue(queue);
 }
 
 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
@@ -582,7 +585,7 @@ int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
         rt2x00queue_free_skb(intf->beacon);
 
         if (!enable_beacon) {
-                rt2x00dev->ops->lib->kill_tx_queue(intf->beacon->queue);
+                rt2x00queue_stop_queue(intf->beacon->queue);
                 mutex_unlock(&intf->beacon_skb_mutex);
                 return 0;
         }
@@ -735,6 +738,210 @@ void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
         spin_unlock_irqrestore(&queue->index_lock, irqflags);
 }
 
+void rt2x00queue_pause_queue(struct data_queue *queue)
+{
+        if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
+            !test_bit(QUEUE_STARTED, &queue->flags) ||
+            test_and_set_bit(QUEUE_PAUSED, &queue->flags))
+                return;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_AC_BE:
+        case QID_AC_BK:
+                /*
+                 * For TX queues, we have to disable the queue
+                 * inside mac80211.
+                 */
+                ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
+                break;
+        default:
+                break;
+        }
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
+
+void rt2x00queue_unpause_queue(struct data_queue *queue)
+{
+        if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
+            !test_bit(QUEUE_STARTED, &queue->flags) ||
+            !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
+                return;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_AC_BE:
+        case QID_AC_BK:
+                /*
+                 * For TX queues, we have to enable the queue
+                 * inside mac80211.
+                 */
+                ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
+                break;
+        case QID_RX:
+                /*
+                 * For RX we need to kick the queue now in order to
+                 * receive frames.
+                 */
+                queue->rt2x00dev->ops->lib->kick_queue(queue);
+        default:
+                break;
+        }
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
+
+void rt2x00queue_start_queue(struct data_queue *queue)
+{
+        mutex_lock(&queue->status_lock);
+
+        if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
+            test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
+                mutex_unlock(&queue->status_lock);
+                return;
+        }
+
+        set_bit(QUEUE_PAUSED, &queue->flags);
+
+        queue->rt2x00dev->ops->lib->start_queue(queue);
+
+        rt2x00queue_unpause_queue(queue);
+
+        mutex_unlock(&queue->status_lock);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
+
+void rt2x00queue_stop_queue(struct data_queue *queue)
+{
+        mutex_lock(&queue->status_lock);
+
+        if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
+                mutex_unlock(&queue->status_lock);
+                return;
+        }
+
+        rt2x00queue_pause_queue(queue);
+
+        queue->rt2x00dev->ops->lib->stop_queue(queue);
+
+        mutex_unlock(&queue->status_lock);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
+
+void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
+{
+        unsigned int i;
+        bool started;
+        bool tx_queue =
+                (queue->qid == QID_AC_VO) ||
+                (queue->qid == QID_AC_VI) ||
+                (queue->qid == QID_AC_BE) ||
+                (queue->qid == QID_AC_BK);
+
+        mutex_lock(&queue->status_lock);
+
+        /*
+         * If the queue has been started, we must stop it temporarily
+         * to prevent any new frames to be queued on the device. If
+         * we are not dropping the pending frames, the queue must
+         * only be stopped in the software and not the hardware,
+         * otherwise the queue will never become empty on its own.
+         */
+        started = test_bit(QUEUE_STARTED, &queue->flags);
+        if (started) {
+                /*
+                 * Pause the queue
+                 */
+                rt2x00queue_pause_queue(queue);
+
+                /*
+                 * If we are not supposed to drop any pending
+                 * frames, this means we must force a start (=kick)
+                 * to the queue to make sure the hardware will
+                 * start transmitting.
+                 */
+                if (!drop && tx_queue)
+                        queue->rt2x00dev->ops->lib->kick_queue(queue);
+        }
+
+        /*
+         * Check if driver supports flushing, we can only guarentee
+         * full support for flushing if the driver is able
+         * to cancel all pending frames (drop = true).
+         */
+        if (drop && queue->rt2x00dev->ops->lib->flush_queue)
+                queue->rt2x00dev->ops->lib->flush_queue(queue);
+
+        /*
+         * When we don't want to drop any frames, or when
+         * the driver doesn't fully flush the queue correcly,
+         * we must wait for the queue to become empty.
+         */
+        for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
+                msleep(10);
+
+        /*
+         * The queue flush has failed...
+         */
+        if (unlikely(!rt2x00queue_empty(queue)))
+                WARNING(queue->rt2x00dev, "Queue %d failed to flush", queue->qid);
+
+        /*
+         * Restore the queue to the previous status
+         */
+        if (started)
+                rt2x00queue_unpause_queue(queue);
+
+        mutex_unlock(&queue->status_lock);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
+
+void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
+{
+        struct data_queue *queue;
+
+        /*
+         * rt2x00queue_start_queue will call ieee80211_wake_queue
+         * for each queue after is has been properly initialized.
+         */
+        tx_queue_for_each(rt2x00dev, queue)
+                rt2x00queue_start_queue(queue);
+
+        rt2x00queue_start_queue(rt2x00dev->rx);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
+
+void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
+{
+        struct data_queue *queue;
+
+        /*
+         * rt2x00queue_stop_queue will call ieee80211_stop_queue
+         * as well, but we are completely shutting doing everything
+         * now, so it is much safer to stop all TX queues at once,
+         * and use rt2x00queue_stop_queue for cleaning up.
+         */
+        ieee80211_stop_queues(rt2x00dev->hw);
+
+        tx_queue_for_each(rt2x00dev, queue)
+                rt2x00queue_stop_queue(queue);
+
+        rt2x00queue_stop_queue(rt2x00dev->rx);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
+
+void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
+{
+        struct data_queue *queue;
+
+        tx_queue_for_each(rt2x00dev, queue)
+                rt2x00queue_flush_queue(queue, drop);
+
+        rt2x00queue_flush_queue(rt2x00dev->rx, drop);
+}
+EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
+
 static void rt2x00queue_reset(struct data_queue *queue)
 {
         unsigned long irqflags;
@@ -753,14 +960,6 @@ static void rt2x00queue_reset(struct data_queue *queue)
         spin_unlock_irqrestore(&queue->index_lock, irqflags);
 }
 
-void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
-{
-        struct data_queue *queue;
-
-        txall_queue_for_each(rt2x00dev, queue)
-                rt2x00dev->ops->lib->kill_tx_queue(queue);
-}
-
 void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
 {
         struct data_queue *queue;
@@ -769,11 +968,8 @@ void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
         queue_for_each(rt2x00dev, queue) {
                 rt2x00queue_reset(queue);
 
-                for (i = 0; i < queue->limit; i++) {
+                for (i = 0; i < queue->limit; i++)
                         rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
-                        if (queue->qid == QID_RX)
-                                rt2x00queue_index_inc(queue, Q_INDEX);
-                }
         }
 }
 
@@ -902,6 +1098,7 @@ void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
                              struct data_queue *queue, enum data_queue_qid qid)
 {
+        mutex_init(&queue->status_lock);
         spin_lock_init(&queue->index_lock);
 
         queue->rt2x00dev = rt2x00dev;
@@ -944,7 +1141,7 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
         /*
          * Initialize queue parameters.
          * RX: qid = QID_RX
-         * TX: qid = QID_AC_BE + index
+         * TX: qid = QID_AC_VO + index
          * TX: cw_min: 2^5 = 32.
          * TX: cw_max: 2^10 = 1024.
          * BCN: qid = QID_BEACON
@@ -952,7 +1149,7 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
          */
         rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
 
-        qid = QID_AC_BE;
+        qid = QID_AC_VO;
         tx_queue_for_each(rt2x00dev, queue)
                 rt2x00queue_init(rt2x00dev, queue, qid++);
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h
index 29b051ac6401..fab8e2687f29 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
@@ -45,10 +45,10 @@
 /**
  * enum data_queue_qid: Queue identification
  *
+ * @QID_AC_VO: AC VO queue
+ * @QID_AC_VI: AC VI queue
  * @QID_AC_BE: AC BE queue
  * @QID_AC_BK: AC BK queue
- * @QID_AC_VI: AC VI queue
- * @QID_AC_VO: AC VO queue
  * @QID_HCCA: HCCA queue
  * @QID_MGMT: MGMT queue (prio queue)
  * @QID_RX: RX queue
@@ -57,10 +57,10 @@
  * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  */
 enum data_queue_qid {
-        QID_AC_BE = 0,
-        QID_AC_BK = 1,
-        QID_AC_VI = 2,
-        QID_AC_VO = 3,
+        QID_AC_VO = 0,
+        QID_AC_VI = 1,
+        QID_AC_BE = 2,
+        QID_AC_BK = 3,
         QID_HCCA = 4,
         QID_MGMT = 13,
         QID_RX = 14,
@@ -340,12 +340,16 @@ struct txentry_desc {
  * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occured
  *      while transfering the data to the hardware. No TX status report will
  *      be expected from the hardware.
+ * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and
+ *      returned. It is now waiting for the status reporting before the
+ *      entry can be reused again.
  */
 enum queue_entry_flags {
         ENTRY_BCN_ASSIGNED,
         ENTRY_OWNER_DEVICE_DATA,
         ENTRY_DATA_PENDING,
-        ENTRY_DATA_IO_FAILED
+        ENTRY_DATA_IO_FAILED,
+        ENTRY_DATA_STATUS_PENDING,
 };
 
 /**
@@ -392,12 +396,32 @@ enum queue_index {
 };
 
 /**
+ * enum data_queue_flags: Status flags for data queues
+ *
+ * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the
+ *      device might be DMA'ing skbuffers. TX queues will accept skbuffers to
+ *      be transmitted and beacon queues will start beaconing the configured
+ *      beacons.
+ * @QUEUE_PAUSED: The queue has been started but is currently paused.
+ *      When this bit is set, the queue has been stopped in mac80211,
+ *      preventing new frames to be enqueued. However, a few frames
+ *      might still appear shortly after the pausing...
+ */
+enum data_queue_flags {
+        QUEUE_STARTED,
+        QUEUE_PAUSED,
+};
+
+/**
  * struct data_queue: Data queue
  *
  * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  * @entries: Base address of the &struct queue_entry which are
  *      part of this queue.
  * @qid: The queue identification, see &enum data_queue_qid.
+ * @flags: Entry flags, see &enum queue_entry_flags.
+ * @status_lock: The mutex for protecting the start/stop/flush
+ *      handling on this queue.
  * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or
  *      @index_crypt needs to be changed this lock should be grabbed to prevent
  *      index corruption due to concurrency.
@@ -421,8 +445,11 @@ struct data_queue {
         struct queue_entry *entries;
 
         enum data_queue_qid qid;
+        unsigned long flags;
 
+        struct mutex status_lock;
         spinlock_t index_lock;
+
         unsigned int count;
         unsigned short limit;
         unsigned short threshold;
diff --git a/drivers/net/wireless/rt2x00/rt2x00reg.h b/drivers/net/wireless/rt2x00/rt2x00reg.h
index ed71be95136d..e8259ae48ced 100644
--- a/drivers/net/wireless/rt2x00/rt2x00reg.h
+++ b/drivers/net/wireless/rt2x00/rt2x00reg.h
@@ -83,8 +83,6 @@ enum dev_state {
  */
         STATE_RADIO_ON,
         STATE_RADIO_OFF,
-        STATE_RADIO_RX_ON,
-        STATE_RADIO_RX_OFF,
         STATE_RADIO_IRQ_ON,
         STATE_RADIO_IRQ_OFF,
         STATE_RADIO_IRQ_ON_ISR,
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index 9ac14598e2a0..1a9937d5aff6 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -195,7 +195,8 @@ static void rt2x00usb_work_txdone(struct work_struct *work)
                 while (!rt2x00queue_empty(queue)) {
                         entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
 
-                        if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
+                        if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags) ||
+                            !test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
                                 break;
 
                         rt2x00usb_work_txdone_entry(entry);
@@ -235,8 +236,10 @@ static void rt2x00usb_kick_tx_entry(struct queue_entry *entry)
         struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
         struct queue_entry_priv_usb *entry_priv = entry->priv_data;
         u32 length;
+        int status;
 
-        if (!test_and_clear_bit(ENTRY_DATA_PENDING, &entry->flags))
+        if (!test_and_clear_bit(ENTRY_DATA_PENDING, &entry->flags) ||
+            test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
                 return;
 
         /*
@@ -251,106 +254,15 @@ static void rt2x00usb_kick_tx_entry(struct queue_entry *entry)
                           entry->skb->data, length,
                           rt2x00usb_interrupt_txdone, entry);
 
-        if (usb_submit_urb(entry_priv->urb, GFP_ATOMIC)) {
+        status = usb_submit_urb(entry_priv->urb, GFP_ATOMIC);
+        if (status) {
+                if (status == -ENODEV)
+                        clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
                 set_bit(ENTRY_DATA_IO_FAILED, &entry->flags);
                 rt2x00lib_dmadone(entry);
         }
 }
 
-void rt2x00usb_kick_tx_queue(struct data_queue *queue)
-{
-        rt2x00queue_for_each_entry(queue, Q_INDEX_DONE, Q_INDEX,
-                                   rt2x00usb_kick_tx_entry);
-}
-EXPORT_SYMBOL_GPL(rt2x00usb_kick_tx_queue);
-
-static void rt2x00usb_kill_tx_entry(struct queue_entry *entry)
-{
-        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
-        struct queue_entry_priv_usb *entry_priv = entry->priv_data;
-        struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
-
-        if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
-                return;
-
-        usb_kill_urb(entry_priv->urb);
-
-        /*
-         * Kill guardian urb (if required by driver).
-         */
-        if ((entry->queue->qid == QID_BEACON) &&
-            (test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags)))
-                usb_kill_urb(bcn_priv->guardian_urb);
-}
-
-void rt2x00usb_kill_tx_queue(struct data_queue *queue)
-{
-        rt2x00queue_for_each_entry(queue, Q_INDEX_DONE, Q_INDEX,
-                                   rt2x00usb_kill_tx_entry);
-}
-EXPORT_SYMBOL_GPL(rt2x00usb_kill_tx_queue);
-
-static void rt2x00usb_watchdog_tx_dma(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        unsigned short threshold = queue->threshold;
-
-        WARNING(queue->rt2x00dev, "TX queue %d DMA timed out,"
-                " invoke forced forced reset", queue->qid);
-
-        /*
-         * Temporarily disable the TX queue, this will force mac80211
-         * to use the other queues until this queue has been restored.
-         *
-         * Set the queue threshold to the queue limit. This prevents the
-         * queue from being enabled during the txdone handler.
-         */
-        queue->threshold = queue->limit;
-        ieee80211_stop_queue(rt2x00dev->hw, queue->qid);
-
-        /*
-         * Kill all entries in the queue, afterwards we need to
-         * wait a bit for all URBs to be cancelled.
-         */
-        rt2x00usb_kill_tx_queue(queue);
-
-        /*
-         * In case that a driver has overriden the txdone_work
-         * function, we invoke the TX done through there.
-         */
-        rt2x00dev->txdone_work.func(&rt2x00dev->txdone_work);
-
-        /*
-         * The queue has been reset, and mac80211 is allowed to use the
-         * queue again.
-         */
-        queue->threshold = threshold;
-        ieee80211_wake_queue(rt2x00dev->hw, queue->qid);
-}
-
-static void rt2x00usb_watchdog_tx_status(struct data_queue *queue)
-{
-        WARNING(queue->rt2x00dev, "TX queue %d status timed out,"
-                " invoke forced tx handler", queue->qid);
-
-        ieee80211_queue_work(queue->rt2x00dev->hw, &queue->rt2x00dev->txdone_work);
-}
-
-void rt2x00usb_watchdog(struct rt2x00_dev *rt2x00dev)
-{
-        struct data_queue *queue;
-
-        tx_queue_for_each(rt2x00dev, queue) {
-                if (!rt2x00queue_empty(queue)) {
-                        if (rt2x00queue_dma_timeout(queue))
-                                rt2x00usb_watchdog_tx_dma(queue);
-                        if (rt2x00queue_status_timeout(queue))
-                                rt2x00usb_watchdog_tx_status(queue);
-                }
-        }
-}
-EXPORT_SYMBOL_GPL(rt2x00usb_watchdog);
-
 /*
  * RX data handlers.
  */
@@ -365,7 +277,8 @@ static void rt2x00usb_work_rxdone(struct work_struct *work)
         while (!rt2x00queue_empty(rt2x00dev->rx)) {
                 entry = rt2x00queue_get_entry(rt2x00dev->rx, Q_INDEX_DONE);
 
-                if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
+                if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags) ||
+                    !test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
                         break;
 
                 /*
@@ -410,6 +323,154 @@ static void rt2x00usb_interrupt_rxdone(struct urb *urb)
         ieee80211_queue_work(rt2x00dev->hw, &rt2x00dev->rxdone_work);
 }
 
+static void rt2x00usb_kick_rx_entry(struct queue_entry *entry)
+{
+        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+        struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
+        struct queue_entry_priv_usb *entry_priv = entry->priv_data;
+        int status;
+
+        if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags) ||
+            test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
+                return;
+
+        rt2x00lib_dmastart(entry);
+
+        usb_fill_bulk_urb(entry_priv->urb, usb_dev,
+                          usb_rcvbulkpipe(usb_dev, entry->queue->usb_endpoint),
+                          entry->skb->data, entry->skb->len,
+                          rt2x00usb_interrupt_rxdone, entry);
+
+        status = usb_submit_urb(entry_priv->urb, GFP_ATOMIC);
+        if (status) {
+                if (status == -ENODEV)
+                        clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
+                set_bit(ENTRY_DATA_IO_FAILED, &entry->flags);
+                rt2x00lib_dmadone(entry);
+        }
+}
+
+void rt2x00usb_kick_queue(struct data_queue *queue)
+{
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_AC_BE:
+        case QID_AC_BK:
+                if (!rt2x00queue_empty(queue))
+                        rt2x00queue_for_each_entry(queue, Q_INDEX_DONE, Q_INDEX,
+                                                   rt2x00usb_kick_tx_entry);
+                break;
+        case QID_RX:
+                if (!rt2x00queue_full(queue))
+                        rt2x00queue_for_each_entry(queue, Q_INDEX_DONE, Q_INDEX,
+                                                   rt2x00usb_kick_rx_entry);
+                break;
+        default:
+                break;
+        }
+}
+EXPORT_SYMBOL_GPL(rt2x00usb_kick_queue);
+
+static void rt2x00usb_flush_entry(struct queue_entry *entry)
+{
+        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+        struct queue_entry_priv_usb *entry_priv = entry->priv_data;
+        struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
+
+        if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
+                return;
+
+        usb_kill_urb(entry_priv->urb);
+
+        /*
+         * Kill guardian urb (if required by driver).
+         */
+        if ((entry->queue->qid == QID_BEACON) &&
+            (test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags)))
+                usb_kill_urb(bcn_priv->guardian_urb);
+}
+
+void rt2x00usb_flush_queue(struct data_queue *queue)
+{
+        struct work_struct *completion;
+        unsigned int i;
+
+        rt2x00queue_for_each_entry(queue, Q_INDEX_DONE, Q_INDEX,
+                                   rt2x00usb_flush_entry);
+
+        /*
+         * Obtain the queue completion handler
+         */
+        switch (queue->qid) {
+        case QID_AC_VO:
+        case QID_AC_VI:
+        case QID_AC_BE:
+        case QID_AC_BK:
+                completion = &queue->rt2x00dev->txdone_work;
+                break;
+        case QID_RX:
+                completion = &queue->rt2x00dev->rxdone_work;
+                break;
+        default:
+                return;
+        }
+
+        for (i = 0; i < 20; i++) {
+                /*
+                 * Check if the driver is already done, otherwise we
+                 * have to sleep a little while to give the driver/hw
+                 * the oppurtunity to complete interrupt process itself.
+                 */
+                if (rt2x00queue_empty(queue))
+                        break;
+
+                /*
+                 * Schedule the completion handler manually, when this
+                 * worker function runs, it should cleanup the queue.
+                 */
+                ieee80211_queue_work(queue->rt2x00dev->hw, completion);
+
+                /*
+                 * Wait for a little while to give the driver
+                 * the oppurtunity to recover itself.
+                 */
+                msleep(10);
+        }
+}
+EXPORT_SYMBOL_GPL(rt2x00usb_flush_queue);
+
+static void rt2x00usb_watchdog_tx_dma(struct data_queue *queue)
+{
+        WARNING(queue->rt2x00dev, "TX queue %d DMA timed out,"
+                " invoke forced forced reset\n", queue->qid);
+
+        rt2x00queue_flush_queue(queue, true);
+}
+
+static void rt2x00usb_watchdog_tx_status(struct data_queue *queue)
+{
+        WARNING(queue->rt2x00dev, "TX queue %d status timed out,"
+                " invoke forced tx handler\n", queue->qid);
+
+        ieee80211_queue_work(queue->rt2x00dev->hw, &queue->rt2x00dev->txdone_work);
+}
+
+void rt2x00usb_watchdog(struct rt2x00_dev *rt2x00dev)
+{
+        struct data_queue *queue;
+
+        tx_queue_for_each(rt2x00dev, queue) {
+                if (!rt2x00queue_empty(queue)) {
+                        if (rt2x00queue_dma_timeout(queue))
+                                rt2x00usb_watchdog_tx_dma(queue);
+                        if (rt2x00queue_status_timeout(queue))
+                                rt2x00usb_watchdog_tx_status(queue);
+                }
+        }
+}
+EXPORT_SYMBOL_GPL(rt2x00usb_watchdog);
+
 /*
  * Radio handlers
  */
@@ -417,12 +478,6 @@ void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev)
 {
         rt2x00usb_vendor_request_sw(rt2x00dev, USB_RX_CONTROL, 0, 0,
                                     REGISTER_TIMEOUT);
-
-        /*
-         * The USB version of kill_tx_queue also works
-         * on the RX queue.
-         */
-        rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev->rx);
 }
 EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio);
 
@@ -431,25 +486,10 @@ EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio);
  */
 void rt2x00usb_clear_entry(struct queue_entry *entry)
 {
-        struct usb_device *usb_dev =
-            to_usb_device_intf(entry->queue->rt2x00dev->dev);
-        struct queue_entry_priv_usb *entry_priv = entry->priv_data;
-        int pipe;
-
         entry->flags = 0;
 
-        if (entry->queue->qid == QID_RX) {
-                pipe = usb_rcvbulkpipe(usb_dev, entry->queue->usb_endpoint);
-                usb_fill_bulk_urb(entry_priv->urb, usb_dev, pipe,
-                                entry->skb->data, entry->skb->len,
-                                rt2x00usb_interrupt_rxdone, entry);
-
-                set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
-                if (usb_submit_urb(entry_priv->urb, GFP_ATOMIC)) {
-                        set_bit(ENTRY_DATA_IO_FAILED, &entry->flags);
-                        rt2x00lib_dmadone(entry);
-                }
-        }
+        if (entry->queue->qid == QID_RX)
+                rt2x00usb_kick_rx_entry(entry);
 }
 EXPORT_SYMBOL_GPL(rt2x00usb_clear_entry);
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h
index c2d997f67b3e..6aaf51fc7ad8 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.h
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.h
@@ -378,22 +378,22 @@ struct queue_entry_priv_usb_bcn {
 };
 
 /**
- * rt2x00usb_kick_tx_queue - Kick data queue
+ * rt2x00usb_kick_queue - Kick data queue
  * @queue: Data queue to kick
  *
  * This will walk through all entries of the queue and push all pending
  * frames to the hardware as a single burst.
  */
-void rt2x00usb_kick_tx_queue(struct data_queue *queue);
+void rt2x00usb_kick_queue(struct data_queue *queue);
 
 /**
- * rt2x00usb_kill_tx_queue - Kill data queue
- * @queue: Data queue to kill
+ * rt2x00usb_flush_queue - Flush data queue
+ * @queue: Data queue to stop
  *
  * This will walk through all entries of the queue and kill all
- * previously kicked frames before they can be send.
+ * URB's which were send to the device.
  */
-void rt2x00usb_kill_tx_queue(struct data_queue *queue);
+void rt2x00usb_flush_queue(struct data_queue *queue);
 
 /**
  * rt2x00usb_watchdog - Watchdog for USB communication
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 6b09b01f634f..8de44dd401e0 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1140,6 +1140,106 @@ dynamic_cca_tune:
 }
 
 /*
+ * Queue handlers.
+ */
+static void rt61pci_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
+                rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt61pci_kick_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_VI:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_BE:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC2, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_BK:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC3, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt61pci_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_AC_VO:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC0, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_VI:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC1, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_BE:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC2, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_AC_BK:
+                rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
+                rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC3, 1);
+                rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
+                break;
+        case QID_RX:
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 1);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
+                rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Firmware functions
  */
 static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -1616,17 +1716,6 @@ static int rt61pci_init_bbp(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt61pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                              enum dev_state state)
-{
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
-        rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
-                           (state == STATE_RADIO_RX_OFF));
-        rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
-}
-
 static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
                                enum dev_state state)
 {
@@ -1743,10 +1832,6 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev,
         case STATE_RADIO_OFF:
                 rt61pci_disable_radio(rt2x00dev);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt61pci_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -1876,6 +1961,7 @@ static void rt61pci_write_beacon(struct queue_entry *entry,
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
         unsigned int beacon_base;
+        unsigned int padding_len;
         u32 reg;
 
         /*
@@ -1897,13 +1983,16 @@ static void rt61pci_write_beacon(struct queue_entry *entry,
         rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
 
         /*
-         * Write entire beacon with descriptor to register.
+         * Write entire beacon with descriptor and padding to register.
          */
+        padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
+        skb_pad(entry->skb, padding_len);
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
         rt2x00pci_register_multiwrite(rt2x00dev, beacon_base,
                                       entry_priv->desc, TXINFO_SIZE);
         rt2x00pci_register_multiwrite(rt2x00dev, beacon_base + TXINFO_SIZE,
-                                      entry->skb->data, entry->skb->len);
+                                      entry->skb->data,
+                                      entry->skb->len + padding_len);
 
         /*
          * Enable beaconing again.
@@ -1925,37 +2014,6 @@ static void rt61pci_write_beacon(struct queue_entry *entry,
         entry->skb = NULL;
 }
 
-static void rt61pci_kick_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, (queue->qid == QID_AC_BE));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, (queue->qid == QID_AC_BK));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC2, (queue->qid == QID_AC_VI));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC3, (queue->qid == QID_AC_VO));
-        rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
-}
-
-static void rt61pci_kill_tx_queue(struct data_queue *queue)
-{
-        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
-        u32 reg;
-
-        if (queue->qid == QID_BEACON) {
-                rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, 0);
-                return;
-        }
-
-        rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC0, (queue->qid == QID_AC_BE));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC1, (queue->qid == QID_AC_BK));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC2, (queue->qid == QID_AC_VI));
-        rt2x00_set_field32(&reg, TX_CNTL_CSR_ABORT_TX_AC3, (queue->qid == QID_AC_VO));
-        rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg);
-}
-
 /*
  * RX control handlers
  */
@@ -2840,10 +2898,11 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = {
         .link_stats             = rt61pci_link_stats,
         .reset_tuner            = rt61pci_reset_tuner,
         .link_tuner             = rt61pci_link_tuner,
+        .start_queue            = rt61pci_start_queue,
+        .kick_queue             = rt61pci_kick_queue,
+        .stop_queue             = rt61pci_stop_queue,
         .write_tx_desc          = rt61pci_write_tx_desc,
         .write_beacon           = rt61pci_write_beacon,
-        .kick_tx_queue          = rt61pci_kick_tx_queue,
-        .kill_tx_queue          = rt61pci_kill_tx_queue,
         .fill_rxdone            = rt61pci_fill_rxdone,
         .config_shared_key      = rt61pci_config_shared_key,
         .config_pairwise_key    = rt61pci_config_pairwise_key,
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index afc803b7959f..e3cd6db76b0e 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -784,25 +784,25 @@ struct hw_pairwise_ta_entry {
  */
 
 /*
- * AC0_BASE_CSR: AC_BK base address.
+ * AC0_BASE_CSR: AC_VO base address.
  */
 #define AC0_BASE_CSR                    0x3400
 #define AC0_BASE_CSR_RING_REGISTER      FIELD32(0xffffffff)
 
 /*
- * AC1_BASE_CSR: AC_BE base address.
+ * AC1_BASE_CSR: AC_VI base address.
  */
 #define AC1_BASE_CSR                    0x3404
 #define AC1_BASE_CSR_RING_REGISTER      FIELD32(0xffffffff)
 
 /*
- * AC2_BASE_CSR: AC_VI base address.
+ * AC2_BASE_CSR: AC_BE base address.
  */
 #define AC2_BASE_CSR                    0x3408
 #define AC2_BASE_CSR_RING_REGISTER      FIELD32(0xffffffff)
 
 /*
- * AC3_BASE_CSR: AC_VO base address.
+ * AC3_BASE_CSR: AC_BK base address.
  */
 #define AC3_BASE_CSR                    0x340c
 #define AC3_BASE_CSR_RING_REGISTER      FIELD32(0xffffffff)
@@ -814,7 +814,7 @@ struct hw_pairwise_ta_entry {
 #define MGMT_BASE_CSR_RING_REGISTER     FIELD32(0xffffffff)
 
 /*
- * TX_RING_CSR0: TX Ring size for AC_BK, AC_BE, AC_VI, AC_VO.
+ * TX_RING_CSR0: TX Ring size for AC_VO, AC_VI, AC_BE, AC_BK.
  */
 #define TX_RING_CSR0                    0x3418
 #define TX_RING_CSR0_AC0_RING_SIZE      FIELD32(0x000000ff)
@@ -833,10 +833,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * AIFSN_CSR: AIFSN for each EDCA AC.
- * AIFSN0: For AC_BK.
- * AIFSN1: For AC_BE.
- * AIFSN2: For AC_VI.
- * AIFSN3: For AC_VO.
+ * AIFSN0: For AC_VO.
+ * AIFSN1: For AC_VI.
+ * AIFSN2: For AC_BE.
+ * AIFSN3: For AC_BK.
  */
 #define AIFSN_CSR                       0x3420
 #define AIFSN_CSR_AIFSN0                FIELD32(0x0000000f)
@@ -846,10 +846,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * CWMIN_CSR: CWmin for each EDCA AC.
- * CWMIN0: For AC_BK.
- * CWMIN1: For AC_BE.
- * CWMIN2: For AC_VI.
- * CWMIN3: For AC_VO.
+ * CWMIN0: For AC_VO.
+ * CWMIN1: For AC_VI.
+ * CWMIN2: For AC_BE.
+ * CWMIN3: For AC_BK.
  */
 #define CWMIN_CSR                       0x3424
 #define CWMIN_CSR_CWMIN0                FIELD32(0x0000000f)
@@ -859,10 +859,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * CWMAX_CSR: CWmax for each EDCA AC.
- * CWMAX0: For AC_BK.
- * CWMAX1: For AC_BE.
- * CWMAX2: For AC_VI.
- * CWMAX3: For AC_VO.
+ * CWMAX0: For AC_VO.
+ * CWMAX1: For AC_VI.
+ * CWMAX2: For AC_BE.
+ * CWMAX3: For AC_BK.
  */
 #define CWMAX_CSR                       0x3428
 #define CWMAX_CSR_CWMAX0                FIELD32(0x0000000f)
@@ -883,14 +883,14 @@ struct hw_pairwise_ta_entry {
 
 /*
  * TX_CNTL_CSR: KICK/Abort TX.
- * KICK_TX_AC0: For AC_BK.
- * KICK_TX_AC1: For AC_BE.
- * KICK_TX_AC2: For AC_VI.
- * KICK_TX_AC3: For AC_VO.
- * ABORT_TX_AC0: For AC_BK.
- * ABORT_TX_AC1: For AC_BE.
- * ABORT_TX_AC2: For AC_VI.
- * ABORT_TX_AC3: For AC_VO.
+ * KICK_TX_AC0: For AC_VO.
+ * KICK_TX_AC1: For AC_VI.
+ * KICK_TX_AC2: For AC_BE.
+ * KICK_TX_AC3: For AC_BK.
+ * ABORT_TX_AC0: For AC_VO.
+ * ABORT_TX_AC1: For AC_VI.
+ * ABORT_TX_AC2: For AC_BE.
+ * ABORT_TX_AC3: For AC_BK.
  */
 #define TX_CNTL_CSR                     0x3430
 #define TX_CNTL_CSR_KICK_TX_AC0         FIELD32(0x00000001)
@@ -1010,18 +1010,18 @@ struct hw_pairwise_ta_entry {
 #define E2PROM_CSR_LOAD_STATUS          FIELD32(0x00000040)
 
 /*
- * AC_TXOP_CSR0: AC_BK/AC_BE TXOP register.
- * AC0_TX_OP: For AC_BK, in unit of 32us.
- * AC1_TX_OP: For AC_BE, in unit of 32us.
+ * AC_TXOP_CSR0: AC_VO/AC_VI TXOP register.
+ * AC0_TX_OP: For AC_VO, in unit of 32us.
+ * AC1_TX_OP: For AC_VI, in unit of 32us.
  */
 #define AC_TXOP_CSR0                    0x3474
 #define AC_TXOP_CSR0_AC0_TX_OP          FIELD32(0x0000ffff)
 #define AC_TXOP_CSR0_AC1_TX_OP          FIELD32(0xffff0000)
 
 /*
- * AC_TXOP_CSR1: AC_VO/AC_VI TXOP register.
- * AC2_TX_OP: For AC_VI, in unit of 32us.
- * AC3_TX_OP: For AC_VO, in unit of 32us.
+ * AC_TXOP_CSR1: AC_BE/AC_BK TXOP register.
+ * AC2_TX_OP: For AC_BE, in unit of 32us.
+ * AC3_TX_OP: For AC_BK, in unit of 32us.
  */
 #define AC_TXOP_CSR1                    0x3478
 #define AC_TXOP_CSR1_AC2_TX_OP          FIELD32(0x0000ffff)
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 6f04552f5819..0b4e8590cbb7 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -1031,6 +1031,55 @@ dynamic_cca_tune:
 }
 
 /*
+ * Queue handlers.
+ */
+static void rt73usb_start_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
+                rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
+                rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
+                rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+static void rt73usb_stop_queue(struct data_queue *queue)
+{
+        struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+        u32 reg;
+
+        switch (queue->qid) {
+        case QID_RX:
+                rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 1);
+                rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
+                break;
+        case QID_BEACON:
+                rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
+                rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
+                rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
+                rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
+                break;
+        default:
+                break;
+        }
+}
+
+/*
  * Firmware functions
  */
 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -1324,17 +1373,6 @@ static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
 /*
  * Device state switch handlers.
  */
-static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
-                              enum dev_state state)
-{
-        u32 reg;
-
-        rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
-        rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
-                           (state == STATE_RADIO_RX_OFF));
-        rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
-}
-
 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
 {
         /*
@@ -1401,10 +1439,6 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
         case STATE_RADIO_OFF:
                 rt73usb_disable_radio(rt2x00dev);
                 break;
-        case STATE_RADIO_RX_ON:
-        case STATE_RADIO_RX_OFF:
-                rt73usb_toggle_rx(rt2x00dev, state);
-                break;
         case STATE_RADIO_IRQ_ON:
         case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
@@ -1512,6 +1546,7 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
 {
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         unsigned int beacon_base;
+        unsigned int padding_len;
         u32 reg;
 
         /*
@@ -1539,11 +1574,13 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
         rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
 
         /*
-         * Write entire beacon with descriptor to register.
+         * Write entire beacon with descriptor and padding to register.
          */
+        padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
+        skb_pad(entry->skb, padding_len);
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
-        rt2x00usb_register_multiwrite(rt2x00dev, beacon_base,
-                                      entry->skb->data, entry->skb->len);
+        rt2x00usb_register_multiwrite(rt2x00dev, beacon_base, entry->skb->data,
+                                      entry->skb->len + padding_len);
 
         /*
          * Enable beaconing again.
@@ -1579,14 +1616,6 @@ static int rt73usb_get_tx_data_len(struct queue_entry *entry)
         return length;
 }
 
-static void rt73usb_kill_tx_queue(struct data_queue *queue)
-{
-        if (queue->qid == QID_BEACON)
-                rt2x00usb_register_write(queue->rt2x00dev, TXRX_CSR9, 0);
-
-        rt2x00usb_kill_tx_queue(queue);
-}
-
 /*
  * RX control handlers
  */
@@ -2278,11 +2307,13 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
         .reset_tuner            = rt73usb_reset_tuner,
         .link_tuner             = rt73usb_link_tuner,
         .watchdog               = rt2x00usb_watchdog,
+        .start_queue            = rt73usb_start_queue,
+        .kick_queue             = rt2x00usb_kick_queue,
+        .stop_queue             = rt73usb_stop_queue,
+        .flush_queue            = rt2x00usb_flush_queue,
         .write_tx_desc          = rt73usb_write_tx_desc,
         .write_beacon           = rt73usb_write_beacon,
         .get_tx_data_len        = rt73usb_get_tx_data_len,
-        .kick_tx_queue          = rt2x00usb_kick_tx_queue,
-        .kill_tx_queue          = rt73usb_kill_tx_queue,
         .fill_rxdone            = rt73usb_fill_rxdone,
         .config_shared_key      = rt73usb_config_shared_key,
         .config_pairwise_key    = rt73usb_config_pairwise_key,
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h
index 1315ce5c992f..9f6b470414d3 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.h
+++ b/drivers/net/wireless/rt2x00/rt73usb.h
@@ -689,10 +689,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * AIFSN_CSR: AIFSN for each EDCA AC.
- * AIFSN0: For AC_BK.
- * AIFSN1: For AC_BE.
- * AIFSN2: For AC_VI.
- * AIFSN3: For AC_VO.
+ * AIFSN0: For AC_VO.
+ * AIFSN1: For AC_VI.
+ * AIFSN2: For AC_BE.
+ * AIFSN3: For AC_BK.
  */
 #define AIFSN_CSR                       0x0400
 #define AIFSN_CSR_AIFSN0                FIELD32(0x0000000f)
@@ -702,10 +702,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * CWMIN_CSR: CWmin for each EDCA AC.
- * CWMIN0: For AC_BK.
- * CWMIN1: For AC_BE.
- * CWMIN2: For AC_VI.
- * CWMIN3: For AC_VO.
+ * CWMIN0: For AC_VO.
+ * CWMIN1: For AC_VI.
+ * CWMIN2: For AC_BE.
+ * CWMIN3: For AC_BK.
  */
 #define CWMIN_CSR                       0x0404
 #define CWMIN_CSR_CWMIN0                FIELD32(0x0000000f)
@@ -715,10 +715,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * CWMAX_CSR: CWmax for each EDCA AC.
- * CWMAX0: For AC_BK.
- * CWMAX1: For AC_BE.
- * CWMAX2: For AC_VI.
- * CWMAX3: For AC_VO.
+ * CWMAX0: For AC_VO.
+ * CWMAX1: For AC_VI.
+ * CWMAX2: For AC_BE.
+ * CWMAX3: For AC_BK.
  */
 #define CWMAX_CSR                       0x0408
 #define CWMAX_CSR_CWMAX0                FIELD32(0x0000000f)
@@ -727,18 +727,18 @@ struct hw_pairwise_ta_entry {
 #define CWMAX_CSR_CWMAX3                FIELD32(0x0000f000)
 
 /*
- * AC_TXOP_CSR0: AC_BK/AC_BE TXOP register.
- * AC0_TX_OP: For AC_BK, in unit of 32us.
- * AC1_TX_OP: For AC_BE, in unit of 32us.
+ * AC_TXOP_CSR0: AC_VO/AC_VI TXOP register.
+ * AC0_TX_OP: For AC_VO, in unit of 32us.
+ * AC1_TX_OP: For AC_VI, in unit of 32us.
  */
 #define AC_TXOP_CSR0                    0x040c
 #define AC_TXOP_CSR0_AC0_TX_OP          FIELD32(0x0000ffff)
 #define AC_TXOP_CSR0_AC1_TX_OP          FIELD32(0xffff0000)
 
 /*
- * AC_TXOP_CSR1: AC_VO/AC_VI TXOP register.
- * AC2_TX_OP: For AC_VI, in unit of 32us.
- * AC3_TX_OP: For AC_VO, in unit of 32us.
+ * AC_TXOP_CSR1: AC_BE/AC_BK TXOP register.
+ * AC2_TX_OP: For AC_BE, in unit of 32us.
+ * AC3_TX_OP: For AC_BK, in unit of 32us.
  */
 #define AC_TXOP_CSR1                    0x0410
 #define AC_TXOP_CSR1_AC2_TX_OP          FIELD32(0x0000ffff)
diff --git a/drivers/net/wireless/rtlwifi/Kconfig b/drivers/net/wireless/rtlwifi/Kconfig
new file mode 100644
index 000000000000..7f6573f7f470
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/Kconfig
@@ -0,0 +1,15 @@
+config RTL8192CE
+        tristate "Realtek RTL8192CE/RTL8188SE Wireless Network Adapter"
+        depends on MAC80211 && EXPERIMENTAL
+        select FW_LOADER
+        select RTLWIFI
+        ---help---
+        This is the driver for Realtek RTL8192CE/RTL8188CE 802.11n PCIe
+        wireless network adapters.
+
+        If you choose to build it as a module, it will be called rtl8192ce
+
+config RTLWIFI
+        tristate
+        depends on RTL8192CE
+        default m
diff --git a/drivers/net/wireless/rtlwifi/Makefile b/drivers/net/wireless/rtlwifi/Makefile
new file mode 100644
index 000000000000..2a7a4384f8ee
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/Makefile
@@ -0,0 +1,13 @@
+obj-$(CONFIG_RTLWIFI)           += rtlwifi.o
+rtlwifi-objs    :=              \
+                base.o          \
+                cam.o           \
+                core.o          \
+                debug.o         \
+                efuse.o         \
+                pci.o           \
+                ps.o            \
+                rc.o            \
+                regd.o
+
+obj-$(CONFIG_RTL8192CE)         += rtl8192ce/
diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c
new file mode 100644
index 000000000000..f6cc07369d75
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/base.c
@@ -0,0 +1,958 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include <linux/ip.h>
+#include "wifi.h"
+#include "rc.h"
+#include "base.h"
+#include "efuse.h"
+#include "cam.h"
+#include "ps.h"
+#include "regd.h"
+
+/*
+ *NOTICE!!!: This file will be very big, we hsould
+ *keep it clear under follwing roles:
+ *
+ *This file include follwing part, so, if you add new
+ *functions into this file, please check which part it
+ *should includes. or check if you should add new part
+ *for this file:
+ *
+ *1) mac80211 init functions
+ *2) tx information functions
+ *3) functions called by core.c
+ *4) wq & timer callback functions
+ *5) frame process functions
+ *6) sysfs functions
+ *7) ...
+ */
+
+/*********************************************************
+ *
+ * mac80211 init functions
+ *
+ *********************************************************/
+static struct ieee80211_channel rtl_channeltable[] = {
+        {.center_freq = 2412, .hw_value = 1,},
+        {.center_freq = 2417, .hw_value = 2,},
+        {.center_freq = 2422, .hw_value = 3,},
+        {.center_freq = 2427, .hw_value = 4,},
+        {.center_freq = 2432, .hw_value = 5,},
+        {.center_freq = 2437, .hw_value = 6,},
+        {.center_freq = 2442, .hw_value = 7,},
+        {.center_freq = 2447, .hw_value = 8,},
+        {.center_freq = 2452, .hw_value = 9,},
+        {.center_freq = 2457, .hw_value = 10,},
+        {.center_freq = 2462, .hw_value = 11,},
+        {.center_freq = 2467, .hw_value = 12,},
+        {.center_freq = 2472, .hw_value = 13,},
+        {.center_freq = 2484, .hw_value = 14,},
+};
+
+static struct ieee80211_rate rtl_ratetable[] = {
+        {.bitrate = 10, .hw_value = 0x00,},
+        {.bitrate = 20, .hw_value = 0x01,},
+        {.bitrate = 55, .hw_value = 0x02,},
+        {.bitrate = 110, .hw_value = 0x03,},
+        {.bitrate = 60, .hw_value = 0x04,},
+        {.bitrate = 90, .hw_value = 0x05,},
+        {.bitrate = 120, .hw_value = 0x06,},
+        {.bitrate = 180, .hw_value = 0x07,},
+        {.bitrate = 240, .hw_value = 0x08,},
+        {.bitrate = 360, .hw_value = 0x09,},
+        {.bitrate = 480, .hw_value = 0x0a,},
+        {.bitrate = 540, .hw_value = 0x0b,},
+};
+
+static const struct ieee80211_supported_band rtl_band_2ghz = {
+        .band = IEEE80211_BAND_2GHZ,
+
+        .channels = rtl_channeltable,
+        .n_channels = ARRAY_SIZE(rtl_channeltable),
+
+        .bitrates = rtl_ratetable,
+        .n_bitrates = ARRAY_SIZE(rtl_ratetable),
+
+        .ht_cap = {0},
+};
+
+static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
+                                  struct ieee80211_sta_ht_cap *ht_cap)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        ht_cap->ht_supported = true;
+        ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
+            IEEE80211_HT_CAP_SGI_40 |
+            IEEE80211_HT_CAP_SGI_20 |
+            IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU;
+
+        /*
+         *Maximum length of AMPDU that the STA can receive.
+         *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets)
+         */
+        ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
+
+        /*Minimum MPDU start spacing , */
+        ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
+
+        ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
+
+        /*
+         *hw->wiphy->bands[IEEE80211_BAND_2GHZ]
+         *base on ant_num
+         *rx_mask: RX mask
+         *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7
+         *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15
+         *if rx_ant >=3 rx_mask[2]=0xff;
+         *if BW_40 rx_mask[4]=0x01;
+         *highest supported RX rate
+         */
+        if (get_rf_type(rtlphy) == RF_1T2R || get_rf_type(rtlphy) == RF_2T2R) {
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("1T2R or 2T2R\n"));
+
+                ht_cap->mcs.rx_mask[0] = 0xFF;
+                ht_cap->mcs.rx_mask[1] = 0xFF;
+                ht_cap->mcs.rx_mask[4] = 0x01;
+
+                ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15;
+        } else if (get_rf_type(rtlphy) == RF_1T1R) {
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("1T1R\n"));
+
+                ht_cap->mcs.rx_mask[0] = 0xFF;
+                ht_cap->mcs.rx_mask[1] = 0x00;
+                ht_cap->mcs.rx_mask[4] = 0x01;
+
+                ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7;
+        }
+}
+
+static void _rtl_init_mac80211(struct ieee80211_hw *hw)
+{
+        struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct ieee80211_supported_band *sband;
+
+        /* <1> use  mac->bands as mem for hw->wiphy->bands */
+        sband = &(rtlmac->bands[IEEE80211_BAND_2GHZ]);
+
+        /*
+         * <2> set hw->wiphy->bands[IEEE80211_BAND_2GHZ]
+         * to default value(1T1R)
+         */
+        memcpy(&(rtlmac->bands[IEEE80211_BAND_2GHZ]), &rtl_band_2ghz,
+               sizeof(struct ieee80211_supported_band));
+
+        /* <3> init ht cap base on ant_num */
+        _rtl_init_hw_ht_capab(hw, &sband->ht_cap);
+
+        /* <4> set mac->sband to wiphy->sband */
+        hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
+
+        /* <5> set hw caps */
+        hw->flags = IEEE80211_HW_SIGNAL_DBM |
+            IEEE80211_HW_RX_INCLUDES_FCS |
+            IEEE80211_HW_BEACON_FILTER | IEEE80211_HW_AMPDU_AGGREGATION | /*PS*/
+            /*IEEE80211_HW_SUPPORTS_PS | */
+            /*IEEE80211_HW_PS_NULLFUNC_STACK | */
+            /*IEEE80211_HW_SUPPORTS_DYNAMIC_PS | */
+            IEEE80211_HW_REPORTS_TX_ACK_STATUS | 0;
+
+        hw->wiphy->interface_modes =
+            BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
+
+        hw->wiphy->rts_threshold = 2347;
+
+        hw->queues = AC_MAX;
+        hw->extra_tx_headroom = RTL_TX_HEADER_SIZE;
+
+        /* TODO: Correct this value for our hw */
+        /* TODO: define these hard code value */
+        hw->channel_change_time = 100;
+        hw->max_listen_interval = 5;
+        hw->max_rate_tries = 4;
+        /* hw->max_rates = 1; */
+
+        /* <6> mac address */
+        if (is_valid_ether_addr(rtlefuse->dev_addr)) {
+                SET_IEEE80211_PERM_ADDR(hw, rtlefuse->dev_addr);
+        } else {
+                u8 rtlmac[] = { 0x00, 0xe0, 0x4c, 0x81, 0x92, 0x00 };
+                get_random_bytes((rtlmac + (ETH_ALEN - 1)), 1);
+                SET_IEEE80211_PERM_ADDR(hw, rtlmac);
+        }
+
+}
+
+static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /* <1> timer */
+        init_timer(&rtlpriv->works.watchdog_timer);
+        setup_timer(&rtlpriv->works.watchdog_timer,
+                    rtl_watch_dog_timer_callback, (unsigned long)hw);
+
+        /* <2> work queue */
+        rtlpriv->works.hw = hw;
+        rtlpriv->works.rtl_wq = alloc_workqueue(rtlpriv->cfg->name, 0, 0);
+        INIT_DELAYED_WORK(&rtlpriv->works.watchdog_wq,
+                          (void *)rtl_watchdog_wq_callback);
+        INIT_DELAYED_WORK(&rtlpriv->works.ips_nic_off_wq,
+                          (void *)rtl_ips_nic_off_wq_callback);
+
+}
+
+void rtl_deinit_deferred_work(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        del_timer_sync(&rtlpriv->works.watchdog_timer);
+
+        cancel_delayed_work(&rtlpriv->works.watchdog_wq);
+        cancel_delayed_work(&rtlpriv->works.ips_nic_off_wq);
+}
+
+void rtl_init_rfkill(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        bool radio_state;
+        bool blocked;
+        u8 valid = 0;
+
+        /*set init state to rf on */
+        rtlpriv->rfkill.rfkill_state = 1;
+
+        radio_state = rtlpriv->cfg->ops->radio_onoff_checking(hw, &valid);
+
+        if (valid) {
+                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                         (KERN_INFO "wireless switch is %s\n",
+                          rtlpriv->rfkill.rfkill_state ? "on" : "off"));
+
+                rtlpriv->rfkill.rfkill_state = radio_state;
+
+                blocked = (rtlpriv->rfkill.rfkill_state == 1) ? 0 : 1;
+                wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
+        }
+
+        wiphy_rfkill_start_polling(hw->wiphy);
+}
+
+void rtl_deinit_rfkill(struct ieee80211_hw *hw)
+{
+        wiphy_rfkill_stop_polling(hw->wiphy);
+}
+
+int rtl_init_core(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
+
+        /* <1> init mac80211 */
+        _rtl_init_mac80211(hw);
+        rtlmac->hw = hw;
+
+        /* <2> rate control register */
+        if (rtl_rate_control_register()) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("rtl: Unable to register rtl_rc,"
+                          "use default RC !!\n"));
+        } else {
+                hw->rate_control_algorithm = "rtl_rc";
+        }
+
+        /*
+         * <3> init CRDA must come after init
+         * mac80211 hw  in _rtl_init_mac80211.
+         */
+        if (rtl_regd_init(hw, rtl_reg_notifier)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("REGD init failed\n"));
+                return 1;
+        } else {
+                /* CRDA regd hint must after init CRDA */
+                if (regulatory_hint(hw->wiphy, rtlpriv->regd.alpha2)) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                 ("regulatory_hint fail\n"));
+                }
+        }
+
+        /* <4> locks */
+        mutex_init(&rtlpriv->locks.conf_mutex);
+        spin_lock_init(&rtlpriv->locks.ips_lock);
+        spin_lock_init(&rtlpriv->locks.irq_th_lock);
+        spin_lock_init(&rtlpriv->locks.h2c_lock);
+        spin_lock_init(&rtlpriv->locks.rf_ps_lock);
+        spin_lock_init(&rtlpriv->locks.rf_lock);
+        spin_lock_init(&rtlpriv->locks.lps_lock);
+
+        rtlmac->link_state = MAC80211_NOLINK;
+
+        /* <5> init deferred work */
+        _rtl_init_deferred_work(hw);
+
+        return 0;
+}
+
+void rtl_deinit_core(struct ieee80211_hw *hw)
+{
+         /*RC*/
+        rtl_rate_control_unregister();
+}
+
+void rtl_init_rx_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *) (&mac->rx_conf));
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_MGT_FILTER,
+                                      (u8 *) (&mac->rx_mgt_filter));
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_CTRL_FILTER,
+                                      (u8 *) (&mac->rx_ctrl_filter));
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_DATA_FILTER,
+                                      (u8 *) (&mac->rx_data_filter));
+}
+
+/*********************************************************
+ *
+ * tx information functions
+ *
+ *********************************************************/
+static void _rtl_qurey_shortpreamble_mode(struct ieee80211_hw *hw,
+                                          struct rtl_tcb_desc *tcb_desc,
+                                          struct ieee80211_tx_info *info)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 rate_flag = info->control.rates[0].flags;
+
+        tcb_desc->use_shortpreamble = false;
+
+        /* 1M can only use Long Preamble. 11B spec */
+        if (tcb_desc->hw_rate == rtlpriv->cfg->maps[RTL_RC_CCK_RATE1M])
+                return;
+        else if (rate_flag & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
+                tcb_desc->use_shortpreamble = true;
+
+        return;
+}
+
+static void _rtl_query_shortgi(struct ieee80211_hw *hw,
+                               struct rtl_tcb_desc *tcb_desc,
+                               struct ieee80211_tx_info *info)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u8 rate_flag = info->control.rates[0].flags;
+
+        tcb_desc->use_shortgi = false;
+
+        if (!mac->ht_enable)
+                return;
+
+        if (!mac->sgi_40 && !mac->sgi_20)
+                return;
+
+        if ((mac->bw_40 == true) && mac->sgi_40)
+                tcb_desc->use_shortgi = true;
+        else if ((mac->bw_40 == false) && mac->sgi_20)
+                tcb_desc->use_shortgi = true;
+
+        if (!(rate_flag & IEEE80211_TX_RC_SHORT_GI))
+                tcb_desc->use_shortgi = false;
+
+}
+
+static void _rtl_query_protection_mode(struct ieee80211_hw *hw,
+                                       struct rtl_tcb_desc *tcb_desc,
+                                       struct ieee80211_tx_info *info)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 rate_flag = info->control.rates[0].flags;
+
+        /* Common Settings */
+        tcb_desc->b_rts_stbc = false;
+        tcb_desc->b_cts_enable = false;
+        tcb_desc->rts_sc = 0;
+        tcb_desc->b_rts_bw = false;
+        tcb_desc->b_rts_use_shortpreamble = false;
+        tcb_desc->b_rts_use_shortgi = false;
+
+        if (rate_flag & IEEE80211_TX_RC_USE_CTS_PROTECT) {
+                /* Use CTS-to-SELF in protection mode. */
+                tcb_desc->b_rts_enable = true;
+                tcb_desc->b_cts_enable = true;
+                tcb_desc->rts_rate = rtlpriv->cfg->maps[RTL_RC_OFDM_RATE24M];
+        } else if (rate_flag & IEEE80211_TX_RC_USE_RTS_CTS) {
+                /* Use RTS-CTS in protection mode. */
+                tcb_desc->b_rts_enable = true;
+                tcb_desc->rts_rate = rtlpriv->cfg->maps[RTL_RC_OFDM_RATE24M];
+        }
+
+}
+
+static void _rtl_txrate_selectmode(struct ieee80211_hw *hw,
+                                   struct rtl_tcb_desc *tcb_desc)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        if (!tcb_desc->disable_ratefallback || !tcb_desc->use_driver_rate) {
+                if (mac->opmode == NL80211_IFTYPE_STATION)
+                        tcb_desc->ratr_index = 0;
+                else if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                        if (tcb_desc->b_multicast || tcb_desc->b_broadcast) {
+                                tcb_desc->hw_rate =
+                                    rtlpriv->cfg->maps[RTL_RC_CCK_RATE2M];
+                                tcb_desc->use_driver_rate = 1;
+                        } else {
+                                /* TODO */
+                        }
+                }
+        }
+
+        if (rtlpriv->dm.b_useramask) {
+                /* TODO we will differentiate adhoc and station futrue  */
+                tcb_desc->mac_id = 0;
+
+                if ((mac->mode == WIRELESS_MODE_N_24G) ||
+                    (mac->mode == WIRELESS_MODE_N_5G)) {
+                        tcb_desc->ratr_index = RATR_INX_WIRELESS_NGB;
+                } else if (mac->mode & WIRELESS_MODE_G) {
+                        tcb_desc->ratr_index = RATR_INX_WIRELESS_GB;
+                } else if (mac->mode & WIRELESS_MODE_B) {
+                        tcb_desc->ratr_index = RATR_INX_WIRELESS_B;
+                }
+        }
+
+}
+
+static void _rtl_query_bandwidth_mode(struct ieee80211_hw *hw,
+                                      struct rtl_tcb_desc *tcb_desc)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        tcb_desc->b_packet_bw = false;
+
+        if (!mac->bw_40 || !mac->ht_enable)
+                return;
+
+        if (tcb_desc->b_multicast || tcb_desc->b_broadcast)
+                return;
+
+        /*use legency rate, shall use 20MHz */
+        if (tcb_desc->hw_rate <= rtlpriv->cfg->maps[RTL_RC_OFDM_RATE54M])
+                return;
+
+        tcb_desc->b_packet_bw = true;
+}
+
+static u8 _rtl_get_highest_n_rate(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u8 hw_rate;
+
+        if (get_rf_type(rtlphy) == RF_2T2R)
+                hw_rate = rtlpriv->cfg->maps[RTL_RC_HT_RATEMCS15];
+        else
+                hw_rate = rtlpriv->cfg->maps[RTL_RC_HT_RATEMCS7];
+
+        return hw_rate;
+}
+
+void rtl_get_tcb_desc(struct ieee80211_hw *hw,
+                      struct ieee80211_tx_info *info,
+                      struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        struct ieee80211_rate *txrate;
+        u16 fc = le16_to_cpu(hdr->frame_control);
+
+        memset(tcb_desc, 0, sizeof(struct rtl_tcb_desc));
+
+        if (ieee80211_is_data(fc)) {
+                txrate = ieee80211_get_tx_rate(hw, info);
+                tcb_desc->hw_rate = txrate->hw_value;
+
+                /*
+                 *we set data rate RTL_RC_CCK_RATE1M
+                 *in rtl_rc.c   if skb is special data or
+                 *mgt which need low data rate.
+                 */
+
+                /*
+                 *So tcb_desc->hw_rate is just used for
+                 *special data and mgt frames
+                 */
+                if (tcb_desc->hw_rate < rtlpriv->cfg->maps[RTL_RC_CCK_RATE11M]) {
+                        tcb_desc->use_driver_rate = true;
+                        tcb_desc->ratr_index = 7;
+
+                        tcb_desc->hw_rate =
+                            rtlpriv->cfg->maps[RTL_RC_CCK_RATE1M];
+                        tcb_desc->disable_ratefallback = 1;
+                } else {
+                        /*
+                         *because hw will nerver use hw_rate
+                         *when tcb_desc->use_driver_rate = false
+                         *so we never set highest N rate here,
+                         *and N rate will all be controled by FW
+                         *when tcb_desc->use_driver_rate = false
+                         */
+                        if (rtlmac->ht_enable) {
+                                tcb_desc->hw_rate = _rtl_get_highest_n_rate(hw);
+                        } else {
+                                if (rtlmac->mode == WIRELESS_MODE_B) {
+                                        tcb_desc->hw_rate =
+                                           rtlpriv->cfg->maps[RTL_RC_CCK_RATE11M];
+                                } else {
+                                        tcb_desc->hw_rate =
+                                           rtlpriv->cfg->maps[RTL_RC_OFDM_RATE54M];
+                                }
+                        }
+                }
+
+                if (is_multicast_ether_addr(ieee80211_get_DA(hdr)))
+                        tcb_desc->b_multicast = 1;
+                else if (is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
+                        tcb_desc->b_broadcast = 1;
+
+                _rtl_txrate_selectmode(hw, tcb_desc);
+                _rtl_query_bandwidth_mode(hw, tcb_desc);
+                _rtl_qurey_shortpreamble_mode(hw, tcb_desc, info);
+                _rtl_query_shortgi(hw, tcb_desc, info);
+                _rtl_query_protection_mode(hw, tcb_desc, info);
+        } else {
+                tcb_desc->use_driver_rate = true;
+                tcb_desc->ratr_index = 7;
+                tcb_desc->disable_ratefallback = 1;
+                tcb_desc->mac_id = 0;
+
+                tcb_desc->hw_rate = rtlpriv->cfg->maps[RTL_RC_CCK_RATE1M];
+        }
+}
+EXPORT_SYMBOL(rtl_get_tcb_desc);
+
+bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        u16 fc = le16_to_cpu(hdr->frame_control);
+
+        if (ieee80211_is_auth(fc)) {
+                RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
+                rtl_ips_nic_on(hw);
+
+                mac->link_state = MAC80211_LINKING;
+        }
+
+        return true;
+}
+
+bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 fc = le16_to_cpu(hdr->frame_control);
+        u8 *act = (u8 *) (((u8 *) skb->data + MAC80211_3ADDR_LEN));
+        u8 category;
+
+        if (!ieee80211_is_action(fc))
+                return true;
+
+        category = *act;
+        act++;
+        switch (category) {
+        case ACT_CAT_BA:
+                switch (*act) {
+                case ACT_ADDBAREQ:
+                        if (mac->act_scanning)
+                                return false;
+
+                        RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
+                                 ("%s ACT_ADDBAREQ From :" MAC_FMT "\n",
+                                  is_tx ? "Tx" : "Rx", MAC_ARG(hdr->addr2)));
+                        break;
+                case ACT_ADDBARSP:
+                        RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
+                                 ("%s ACT_ADDBARSP From :" MAC_FMT "\n",
+                                  is_tx ? "Tx" : "Rx", MAC_ARG(hdr->addr2)));
+                        break;
+                case ACT_DELBA:
+                        RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
+                                 ("ACT_ADDBADEL From :" MAC_FMT "\n",
+                                  MAC_ARG(hdr->addr2)));
+                        break;
+                }
+                break;
+        default:
+                break;
+        }
+
+        return true;
+}
+
+/*should call before software enc*/
+u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        u16 fc = le16_to_cpu(hdr->frame_control);
+        u16 ether_type;
+        u8 mac_hdr_len = ieee80211_get_hdrlen_from_skb(skb);
+        const struct iphdr *ip;
+
+        if (!ieee80211_is_data(fc))
+                goto end;
+
+        if (ieee80211_is_nullfunc(fc))
+                return true;
+
+        ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
+                              SNAP_SIZE + PROTOC_TYPE_SIZE);
+        ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
+        ether_type = ntohs(ether_type);
+
+        if (ETH_P_IP == ether_type) {
+                if (IPPROTO_UDP == ip->protocol) {
+                        struct udphdr *udp = (struct udphdr *)((u8 *) ip +
+                                                               (ip->ihl << 2));
+                        if (((((u8 *) udp)[1] == 68) &&
+                             (((u8 *) udp)[3] == 67)) ||
+                            ((((u8 *) udp)[1] == 67) &&
+                             (((u8 *) udp)[3] == 68))) {
+                                /*
+                                 * 68 : UDP BOOTP client
+                                 * 67 : UDP BOOTP server
+                                 */
+                                RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV),
+                                         DBG_DMESG, ("dhcp %s !!\n",
+                                                     (is_tx) ? "Tx" : "Rx"));
+
+                                if (is_tx) {
+                                        rtl_lps_leave(hw);
+                                        ppsc->last_delaylps_stamp_jiffies =
+                                            jiffies;
+                                }
+
+                                return true;
+                        }
+                }
+        } else if (ETH_P_ARP == ether_type) {
+                if (is_tx) {
+                        rtl_lps_leave(hw);
+                        ppsc->last_delaylps_stamp_jiffies = jiffies;
+                }
+
+                return true;
+        } else if (ETH_P_PAE == ether_type) {
+                RT_TRACE(rtlpriv, (COMP_SEND | COMP_RECV), DBG_DMESG,
+                         ("802.1X %s EAPOL pkt!!\n", (is_tx) ? "Tx" : "Rx"));
+
+                if (is_tx) {
+                        rtl_lps_leave(hw);
+                        ppsc->last_delaylps_stamp_jiffies = jiffies;
+                }
+
+                return true;
+        } else if (0x86DD == ether_type) {
+                return true;
+        }
+
+end:
+        return false;
+}
+
+/*********************************************************
+ *
+ * functions called by core.c
+ *
+ *********************************************************/
+int rtl_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra, u16 tid, u16 *ssn)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_tid_data *tid_data;
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG,
+                 ("on ra = %pM tid = %d\n", ra, tid));
+
+        if (unlikely(tid >= MAX_TID_COUNT))
+                return -EINVAL;
+
+        if (mac->tids[tid].agg.agg_state != RTL_AGG_OFF) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Start AGG when state is not RTL_AGG_OFF !\n"));
+                return -ENXIO;
+        }
+
+        tid_data = &mac->tids[tid];
+        *ssn = SEQ_TO_SN(tid_data->seq_number);
+
+        RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG,
+                 ("HW queue is empty tid:%d\n", tid));
+        tid_data->agg.agg_state = RTL_AGG_ON;
+
+        ieee80211_start_tx_ba_cb_irqsafe(mac->vif, ra, tid);
+
+        return 0;
+}
+
+int rtl_tx_agg_stop(struct ieee80211_hw *hw, const u8 * ra, u16 tid)
+{
+        int ssn = -1;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_tid_data *tid_data;
+
+        if (!ra) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("ra = NULL\n"));
+                return -EINVAL;
+        }
+
+        if (unlikely(tid >= MAX_TID_COUNT))
+                return -EINVAL;
+
+        if (mac->tids[tid].agg.agg_state != RTL_AGG_ON)
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Stopping AGG while state not ON or starting\n"));
+
+        tid_data = &mac->tids[tid];
+        ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
+
+        mac->tids[tid].agg.agg_state = RTL_AGG_OFF;
+
+        ieee80211_stop_tx_ba_cb_irqsafe(mac->vif, ra, tid);
+
+        return 0;
+}
+
+/*********************************************************
+ *
+ * wq & timer callback functions
+ *
+ *********************************************************/
+void rtl_watchdog_wq_callback(void *data)
+{
+        struct rtl_works *rtlworks = container_of_dwork_rtl(data,
+                                                            struct rtl_works,
+                                                            watchdog_wq);
+        struct ieee80211_hw *hw = rtlworks->hw;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        bool b_busytraffic = false;
+        bool b_higher_busytraffic = false;
+        bool b_higher_busyrxtraffic = false;
+        bool b_higher_busytxtraffic = false;
+
+        u8 idx = 0;
+        u32 rx_cnt_inp4eriod = 0;
+        u32 tx_cnt_inp4eriod = 0;
+        u32 aver_rx_cnt_inperiod = 0;
+        u32 aver_tx_cnt_inperiod = 0;
+
+        bool benter_ps = false;
+
+        if (is_hal_stop(rtlhal))
+                return;
+
+        /* <1> Determine if action frame is allowed */
+        if (mac->link_state > MAC80211_NOLINK) {
+                if (mac->cnt_after_linked < 20)
+                        mac->cnt_after_linked++;
+        } else {
+                mac->cnt_after_linked = 0;
+        }
+
+        /* <2> DM */
+        rtlpriv->cfg->ops->dm_watchdog(hw);
+
+        /*
+         *<3> to check if traffic busy, if
+         * busytraffic we don't change channel
+         */
+        if (mac->link_state >= MAC80211_LINKED) {
+
+                /* (1) get aver_rx_cnt_inperiod & aver_tx_cnt_inperiod */
+                for (idx = 0; idx <= 2; idx++) {
+                        rtlpriv->link_info.num_rx_in4period[idx] =
+                            rtlpriv->link_info.num_rx_in4period[idx + 1];
+                        rtlpriv->link_info.num_tx_in4period[idx] =
+                            rtlpriv->link_info.num_tx_in4period[idx + 1];
+                }
+                rtlpriv->link_info.num_rx_in4period[3] =
+                    rtlpriv->link_info.num_rx_inperiod;
+                rtlpriv->link_info.num_tx_in4period[3] =
+                    rtlpriv->link_info.num_tx_inperiod;
+                for (idx = 0; idx <= 3; idx++) {
+                        rx_cnt_inp4eriod +=
+                            rtlpriv->link_info.num_rx_in4period[idx];
+                        tx_cnt_inp4eriod +=
+                            rtlpriv->link_info.num_tx_in4period[idx];
+                }
+                aver_rx_cnt_inperiod = rx_cnt_inp4eriod / 4;
+                aver_tx_cnt_inperiod = tx_cnt_inp4eriod / 4;
+
+                /* (2) check traffic busy */
+                if (aver_rx_cnt_inperiod > 100 || aver_tx_cnt_inperiod > 100)
+                        b_busytraffic = true;
+
+                /* Higher Tx/Rx data. */
+                if (aver_rx_cnt_inperiod > 4000 ||
+                    aver_tx_cnt_inperiod > 4000) {
+                        b_higher_busytraffic = true;
+
+                        /* Extremely high Rx data. */
+                        if (aver_rx_cnt_inperiod > 5000)
+                                b_higher_busyrxtraffic = true;
+                        else
+                                b_higher_busytxtraffic = false;
+                }
+
+                if (((rtlpriv->link_info.num_rx_inperiod +
+                      rtlpriv->link_info.num_tx_inperiod) > 8) ||
+                    (rtlpriv->link_info.num_rx_inperiod > 2))
+                        benter_ps = false;
+                else
+                        benter_ps = true;
+
+                /* LeisurePS only work in infra mode. */
+                if (benter_ps)
+                        rtl_lps_enter(hw);
+                else
+                        rtl_lps_leave(hw);
+        }
+
+        rtlpriv->link_info.num_rx_inperiod = 0;
+        rtlpriv->link_info.num_tx_inperiod = 0;
+
+        rtlpriv->link_info.b_busytraffic = b_busytraffic;
+        rtlpriv->link_info.b_higher_busytraffic = b_higher_busytraffic;
+        rtlpriv->link_info.b_higher_busyrxtraffic = b_higher_busyrxtraffic;
+
+}
+
+void rtl_watch_dog_timer_callback(unsigned long data)
+{
+        struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        queue_delayed_work(rtlpriv->works.rtl_wq,
+                           &rtlpriv->works.watchdog_wq, 0);
+
+        mod_timer(&rtlpriv->works.watchdog_timer,
+                  jiffies + MSECS(RTL_WATCH_DOG_TIME));
+}
+
+/*********************************************************
+ *
+ * sysfs functions
+ *
+ *********************************************************/
+static ssize_t rtl_show_debug_level(struct device *d,
+                                    struct device_attribute *attr, char *buf)
+{
+        struct ieee80211_hw *hw = dev_get_drvdata(d);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        return sprintf(buf, "0x%08X\n", rtlpriv->dbg.global_debuglevel);
+}
+
+static ssize_t rtl_store_debug_level(struct device *d,
+                                     struct device_attribute *attr,
+                                     const char *buf, size_t count)
+{
+        struct ieee80211_hw *hw = dev_get_drvdata(d);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        unsigned long val;
+        int ret;
+
+        ret = strict_strtoul(buf, 0, &val);
+        if (ret) {
+                printk(KERN_DEBUG "%s is not in hex or decimal form.\n", buf);
+        } else {
+                rtlpriv->dbg.global_debuglevel = val;
+                printk(KERN_DEBUG "debuglevel:%x\n",
+                       rtlpriv->dbg.global_debuglevel);
+        }
+
+        return strnlen(buf, count);
+}
+
+static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
+                   rtl_show_debug_level, rtl_store_debug_level);
+
+static struct attribute *rtl_sysfs_entries[] = {
+
+        &dev_attr_debug_level.attr,
+
+        NULL
+};
+
+/*
+ * "name" is folder name witch will be
+ * put in device directory like :
+ * sys/devices/pci0000:00/0000:00:1c.4/
+ * 0000:06:00.0/rtl_sysfs
+ */
+struct attribute_group rtl_attribute_group = {
+        .name = "rtlsysfs",
+        .attrs = rtl_sysfs_entries,
+};
+
+MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
+MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
+MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Realtek 802.11n PCI wireless core");
+
+static int __init rtl_core_module_init(void)
+{
+        return 0;
+}
+
+static void __exit rtl_core_module_exit(void)
+{
+}
+
+module_init(rtl_core_module_init);
+module_exit(rtl_core_module_exit);
diff --git a/drivers/net/wireless/rtlwifi/base.h b/drivers/net/wireless/rtlwifi/base.h
new file mode 100644
index 000000000000..3de5a14745f1
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/base.h
@@ -0,0 +1,120 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *****************************************************************************/
+
+#ifndef __RTL_BASE_H__
+#define __RTL_BASE_H__
+
+#define RTL_DUMMY_OFFSET        0
+#define RTL_DUMMY_UNIT          8
+#define RTL_TX_DUMMY_SIZE       (RTL_DUMMY_OFFSET * RTL_DUMMY_UNIT)
+#define RTL_TX_DESC_SIZE        32
+#define RTL_TX_HEADER_SIZE      (RTL_TX_DESC_SIZE + RTL_TX_DUMMY_SIZE)
+
+#define HT_AMSDU_SIZE_4K        3839
+#define HT_AMSDU_SIZE_8K        7935
+
+#define MAX_BIT_RATE_40MHZ_MCS15        300     /* Mbps */
+#define MAX_BIT_RATE_40MHZ_MCS7         150     /* Mbps */
+
+#define RTL_RATE_COUNT_LEGACY           12
+#define RTL_CHANNEL_COUNT               14
+
+#define FRAME_OFFSET_FRAME_CONTROL      0
+#define FRAME_OFFSET_DURATION           2
+#define FRAME_OFFSET_ADDRESS1           4
+#define FRAME_OFFSET_ADDRESS2           10
+#define FRAME_OFFSET_ADDRESS3           16
+#define FRAME_OFFSET_SEQUENCE           22
+#define FRAME_OFFSET_ADDRESS4           24
+
+#define SET_80211_HDR_FRAME_CONTROL(_hdr, _val)         \
+        WRITEEF2BYTE(_hdr, _val)
+#define SET_80211_HDR_TYPE_AND_SUBTYPE(_hdr, _val)      \
+        WRITEEF1BYTE(_hdr, _val)
+#define SET_80211_HDR_PWR_MGNT(_hdr, _val)              \
+        SET_BITS_TO_LE_2BYTE(_hdr, 12, 1, _val)
+#define SET_80211_HDR_TO_DS(_hdr, _val)                 \
+        SET_BITS_TO_LE_2BYTE(_hdr, 8, 1, _val)
+
+#define SET_80211_PS_POLL_AID(_hdr, _val)               \
+        WRITEEF2BYTE(((u8 *)(_hdr)) + 2, _val)
+#define SET_80211_PS_POLL_BSSID(_hdr, _val)             \
+        CP_MACADDR(((u8 *)(_hdr)) + 4, (u8 *)(_val))
+#define SET_80211_PS_POLL_TA(_hdr, _val)                \
+        CP_MACADDR(((u8 *)(_hdr)) + 10, (u8 *)(_val))
+
+#define SET_80211_HDR_DURATION(_hdr, _val)      \
+        WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_DURATION, _val)
+#define SET_80211_HDR_ADDRESS1(_hdr, _val)      \
+        CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8*)(_val))
+#define SET_80211_HDR_ADDRESS2(_hdr, _val)      \
+        CP_MACADDR((u8 *)(_hdr) + FRAME_OFFSET_ADDRESS2, (u8 *)(_val))
+#define SET_80211_HDR_ADDRESS3(_hdr, _val)      \
+        CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8 *)(_val))
+#define SET_80211_HDR_FRAGMENT_SEQUENCE(_hdr, _val)  \
+        WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_SEQUENCE, _val)
+
+#define SET_BEACON_PROBE_RSP_TIME_STAMP_LOW(__phdr, __val)      \
+        WRITEEF4BYTE(((u8 *)(__phdr)) + 24, __val)
+#define SET_BEACON_PROBE_RSP_TIME_STAMP_HIGH(__phdr, __val) \
+        WRITEEF4BYTE(((u8 *)(__phdr)) + 28, __val)
+#define SET_BEACON_PROBE_RSP_BEACON_INTERVAL(__phdr, __val) \
+        WRITEEF2BYTE(((u8 *)(__phdr)) + 32, __val)
+#define GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr)    \
+        READEF2BYTE(((u8 *)(__phdr)) + 34)
+#define SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
+        WRITEEF2BYTE(((u8 *)(__phdr)) + 34, __val)
+#define MASK_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
+        SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, \
+        (GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr) & (~(__val))))
+
+int rtl_init_core(struct ieee80211_hw *hw);
+void rtl_deinit_core(struct ieee80211_hw *hw);
+void rtl_init_rx_config(struct ieee80211_hw *hw);
+void rtl_init_rfkill(struct ieee80211_hw *hw);
+void rtl_deinit_rfkill(struct ieee80211_hw *hw);
+
+void rtl_watch_dog_timer_callback(unsigned long data);
+void rtl_deinit_deferred_work(struct ieee80211_hw *hw);
+
+bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx);
+bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb);
+u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx);
+
+void rtl_watch_dog_timer_callback(unsigned long data);
+int rtl_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
+                     u16 tid, u16 *ssn);
+int rtl_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid);
+void rtl_watchdog_wq_callback(void *data);
+
+void rtl_get_tcb_desc(struct ieee80211_hw *hw,
+                      struct ieee80211_tx_info *info,
+                      struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc);
+
+extern struct attribute_group rtl_attribute_group;
+#endif
diff --git a/drivers/net/wireless/rtlwifi/cam.c b/drivers/net/wireless/rtlwifi/cam.c
new file mode 100644
index 000000000000..52c9c1367cac
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/cam.c
@@ -0,0 +1,291 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "cam.h"
+
+void rtl_cam_reset_sec_info(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->sec.use_defaultkey = false;
+        rtlpriv->sec.pairwise_enc_algorithm = NO_ENCRYPTION;
+        rtlpriv->sec.group_enc_algorithm = NO_ENCRYPTION;
+        memset(rtlpriv->sec.key_buf, 0, KEY_BUF_SIZE * MAX_KEY_LEN);
+        memset(rtlpriv->sec.key_len, 0, KEY_BUF_SIZE);
+        rtlpriv->sec.pairwise_key = NULL;
+}
+
+static void rtl_cam_program_entry(struct ieee80211_hw *hw, u32 entry_no,
+                           u8 *mac_addr, u8 *key_cont_128, u16 us_config)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        u32 target_command;
+        u32 target_content = 0;
+        u8 entry_i;
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("key_cont_128:\n %x:%x:%x:%x:%x:%x\n",
+                  key_cont_128[0], key_cont_128[1],
+                  key_cont_128[2], key_cont_128[3],
+                  key_cont_128[4], key_cont_128[5]));
+
+        for (entry_i = 0; entry_i < CAM_CONTENT_COUNT; entry_i++) {
+                target_command = entry_i + CAM_CONTENT_COUNT * entry_no;
+                target_command = target_command | BIT(31) | BIT(16);
+
+                if (entry_i == 0) {
+                        target_content = (u32) (*(mac_addr + 0)) << 16 |
+                            (u32) (*(mac_addr + 1)) << 24 | (u32) us_config;
+
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI],
+                                        target_content);
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM],
+                                        target_command);
+
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): "
+                                  "WRITE %x: %x\n",
+                                  rtlpriv->cfg->maps[WCAMI], target_content));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("The Key ID is %d\n", entry_no));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): "
+                                  "WRITE %x: %x\n",
+                                  rtlpriv->cfg->maps[RWCAM], target_command));
+
+                } else if (entry_i == 1) {
+
+                        target_content = (u32) (*(mac_addr + 5)) << 24 |
+                            (u32) (*(mac_addr + 4)) << 16 |
+                            (u32) (*(mac_addr + 3)) << 8 |
+                            (u32) (*(mac_addr + 2));
+
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI],
+                                        target_content);
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM],
+                                        target_command);
+
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): WRITE A4: %x\n",
+                                  target_content));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): WRITE A0: %x\n",
+                                  target_command));
+
+                } else {
+
+                        target_content =
+                            (u32) (*(key_cont_128 + (entry_i * 4 - 8) + 3)) <<
+                            24 | (u32) (*(key_cont_128 + (entry_i * 4 - 8) + 2))
+                            << 16 |
+                            (u32) (*(key_cont_128 + (entry_i * 4 - 8) + 1)) << 8
+                            | (u32) (*(key_cont_128 + (entry_i * 4 - 8) + 0));
+
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI],
+                                        target_content);
+                        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM],
+                                        target_command);
+                        udelay(100);
+
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): WRITE A4: %x\n",
+                                  target_content));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("rtl_cam_program_entry(): WRITE A0: %x\n",
+                                  target_command));
+                }
+        }
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("after set key, usconfig:%x\n", us_config));
+}
+
+u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
+                         u32 ul_key_id, u32 ul_entry_idx, u32 ul_enc_alg,
+                         u32 ul_default_key, u8 *key_content)
+{
+        u32 us_config;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("EntryNo:%x, ulKeyId=%x, ulEncAlg=%x, "
+                  "ulUseDK=%x MacAddr" MAC_FMT "\n",
+                  ul_entry_idx, ul_key_id, ul_enc_alg,
+                  ul_default_key, MAC_ARG(mac_addr)));
+
+        if (ul_key_id == TOTAL_CAM_ENTRY) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("<=== ulKeyId exceed!\n"));
+                return 0;
+        }
+
+        if (ul_default_key == 1) {
+                us_config = CFG_VALID | ((u16) (ul_enc_alg) << 2);
+        } else {
+                us_config = CFG_VALID | ((ul_enc_alg) << 2) | ul_key_id;
+        }
+
+        rtl_cam_program_entry(hw, ul_entry_idx, mac_addr,
+                              (u8 *) key_content, us_config);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("<===\n"));
+
+        return 1;
+
+}
+EXPORT_SYMBOL(rtl_cam_add_one_entry);
+
+int rtl_cam_delete_one_entry(struct ieee80211_hw *hw,
+                             u8 *mac_addr, u32 ul_key_id)
+{
+        u32 ul_command;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("key_idx:%d\n", ul_key_id));
+
+        ul_command = ul_key_id * CAM_CONTENT_COUNT;
+        ul_command = ul_command | BIT(31) | BIT(16);
+
+        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], 0);
+        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("rtl_cam_delete_one_entry(): WRITE A4: %x\n", 0));
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("rtl_cam_delete_one_entry(): WRITE A0: %x\n", ul_command));
+
+        return 0;
+
+}
+EXPORT_SYMBOL(rtl_cam_delete_one_entry);
+
+void rtl_cam_reset_all_entry(struct ieee80211_hw *hw)
+{
+        u32 ul_command;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        ul_command = BIT(31) | BIT(30);
+        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command);
+}
+EXPORT_SYMBOL(rtl_cam_reset_all_entry);
+
+void rtl_cam_mark_invalid(struct ieee80211_hw *hw, u8 uc_index)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        u32 ul_command;
+        u32 ul_content;
+        u32 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES];
+
+        switch (rtlpriv->sec.pairwise_enc_algorithm) {
+        case WEP40_ENCRYPTION:
+                ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_WEP40];
+                break;
+        case WEP104_ENCRYPTION:
+                ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_WEP104];
+                break;
+        case TKIP_ENCRYPTION:
+                ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_TKIP];
+                break;
+        case AESCCMP_ENCRYPTION:
+                ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES];
+                break;
+        default:
+                ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES];
+        }
+
+        ul_content = (uc_index & 3) | ((u16) (ul_enc_algo) << 2);
+
+        ul_content |= BIT(15);
+        ul_command = CAM_CONTENT_COUNT * uc_index;
+        ul_command = ul_command | BIT(31) | BIT(16);
+
+        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], ul_content);
+        rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("rtl_cam_mark_invalid(): WRITE A4: %x\n", ul_content));
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("rtl_cam_mark_invalid(): WRITE A0: %x\n", ul_command));
+}
+EXPORT_SYMBOL(rtl_cam_mark_invalid);
+
+void rtl_cam_empty_entry(struct ieee80211_hw *hw, u8 uc_index)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        u32 ul_command;
+        u32 ul_content;
+        u32 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES];
+        u8 entry_i;
+
+        switch (rtlpriv->sec.pairwise_enc_algorithm) {
+        case WEP40_ENCRYPTION:
+                ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_WEP40];
+                break;
+        case WEP104_ENCRYPTION:
+                ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_WEP104];
+                break;
+        case TKIP_ENCRYPTION:
+                ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_TKIP];
+                break;
+        case AESCCMP_ENCRYPTION:
+                ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES];
+                break;
+        default:
+                ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES];
+        }
+
+        for (entry_i = 0; entry_i < CAM_CONTENT_COUNT; entry_i++) {
+
+                if (entry_i == 0) {
+                        ul_content =
+                            (uc_index & 0x03) | ((u16) (ul_encalgo) << 2);
+                        ul_content |= BIT(15);
+
+                } else {
+                        ul_content = 0;
+                }
+
+                ul_command = CAM_CONTENT_COUNT * uc_index + entry_i;
+                ul_command = ul_command | BIT(31) | BIT(16);
+
+                rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], ul_content);
+                rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command);
+
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                         ("rtl_cam_empty_entry(): WRITE A4: %x\n",
+                          ul_content));
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                         ("rtl_cam_empty_entry(): WRITE A0: %x\n",
+                          ul_command));
+        }
+
+}
+EXPORT_SYMBOL(rtl_cam_empty_entry);
diff --git a/drivers/net/wireless/rtlwifi/cam.h b/drivers/net/wireless/rtlwifi/cam.h
new file mode 100644
index 000000000000..dd82f057d53d
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/cam.h
@@ -0,0 +1,53 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_CAM_H_
+#define __RTL_CAM_H_
+
+#define TOTAL_CAM_ENTRY                                 32
+#define CAM_CONTENT_COUNT                               8
+
+#define CFG_DEFAULT_KEY                                 BIT(5)
+#define CFG_VALID                                       BIT(15)
+
+#define PAIRWISE_KEYIDX                                 0
+#define CAM_PAIRWISE_KEY_POSITION               4
+
+#define CAM_CONFIG_USEDK                                1
+#define CAM_CONFIG_NO_USEDK                             0
+
+extern void rtl_cam_reset_all_entry(struct ieee80211_hw *hw);
+extern u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
+                        u32 ul_key_id, u32 ul_entry_idx, u32 ul_enc_alg,
+                        u32 ul_default_key, u8 *key_content);
+int rtl_cam_delete_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
+                        u32 ul_key_id);
+void rtl_cam_mark_invalid(struct ieee80211_hw *hw, u8 uc_index);
+void rtl_cam_empty_entry(struct ieee80211_hw *hw, u8 uc_index);
+void rtl_cam_reset_sec_info(struct ieee80211_hw *hw);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c
new file mode 100644
index 000000000000..d6a924a05654
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/core.c
@@ -0,0 +1,1029 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "core.h"
+#include "cam.h"
+#include "base.h"
+#include "ps.h"
+
+/*mutex for start & stop is must here. */
+static int rtl_op_start(struct ieee80211_hw *hw)
+{
+        int err = 0;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (!is_hal_stop(rtlhal))
+                return 0;
+        if (!test_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status))
+                return 0;
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+        err = rtlpriv->intf_ops->adapter_start(hw);
+        if (err)
+                goto out;
+        rtl_watch_dog_timer_callback((unsigned long)hw);
+out:
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+        return err;
+}
+
+static void rtl_op_stop(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        if (is_hal_stop(rtlhal))
+                return;
+
+        if (unlikely(ppsc->rfpwr_state == ERFOFF)) {
+                rtl_ips_nic_on(hw);
+                mdelay(1);
+        }
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+
+        mac->link_state = MAC80211_NOLINK;
+        memset(mac->bssid, 0, 6);
+
+        /*reset sec info */
+        rtl_cam_reset_sec_info(hw);
+
+        rtl_deinit_deferred_work(hw);
+        rtlpriv->intf_ops->adapter_stop(hw);
+
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+}
+
+static int rtl_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        if (unlikely(is_hal_stop(rtlhal) || ppsc->rfpwr_state != ERFON))
+                goto err_free;
+
+        if (!test_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status))
+                goto err_free;
+
+
+        rtlpriv->intf_ops->adapter_tx(hw, skb);
+
+        return NETDEV_TX_OK;
+
+err_free:
+        dev_kfree_skb_any(skb);
+        return NETDEV_TX_OK;
+}
+
+static int rtl_op_add_interface(struct ieee80211_hw *hw,
+                struct ieee80211_vif *vif)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        int err = 0;
+
+        if (mac->vif) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("vif has been set!! mac->vif = 0x%p\n", mac->vif));
+                return -EOPNOTSUPP;
+        }
+
+        rtl_ips_nic_on(hw);
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+        switch (vif->type) {
+        case NL80211_IFTYPE_STATION:
+                if (mac->beacon_enabled == 1) {
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("NL80211_IFTYPE_STATION\n"));
+                        mac->beacon_enabled = 0;
+                        rtlpriv->cfg->ops->update_interrupt_mask(hw, 0,
+                                        rtlpriv->cfg->maps
+                                        [RTL_IBSS_INT_MASKS]);
+                }
+                break;
+        case NL80211_IFTYPE_ADHOC:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                         ("NL80211_IFTYPE_ADHOC\n"));
+
+                mac->link_state = MAC80211_LINKED;
+                rtlpriv->cfg->ops->set_bcn_reg(hw);
+                break;
+        case NL80211_IFTYPE_AP:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                         ("NL80211_IFTYPE_AP\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("operation mode %d is not support!\n", vif->type));
+                err = -EOPNOTSUPP;
+                goto out;
+        }
+
+        mac->vif = vif;
+        mac->opmode = vif->type;
+        rtlpriv->cfg->ops->set_network_type(hw, vif->type);
+        memcpy(mac->mac_addr, vif->addr, ETH_ALEN);
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr);
+
+out:
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+        return err;
+}
+
+static void rtl_op_remove_interface(struct ieee80211_hw *hw,
+                struct ieee80211_vif *vif)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+
+        /* Free beacon resources */
+        if ((mac->opmode == NL80211_IFTYPE_AP) ||
+            (mac->opmode == NL80211_IFTYPE_ADHOC) ||
+            (mac->opmode == NL80211_IFTYPE_MESH_POINT)) {
+                if (mac->beacon_enabled == 1) {
+                        mac->beacon_enabled = 0;
+                        rtlpriv->cfg->ops->update_interrupt_mask(hw, 0,
+                                        rtlpriv->cfg->maps
+                                        [RTL_IBSS_INT_MASKS]);
+                }
+        }
+
+        /*
+         *Note: We assume NL80211_IFTYPE_UNSPECIFIED as
+         *NO LINK for our hardware.
+         */
+        mac->vif = NULL;
+        mac->link_state = MAC80211_NOLINK;
+        memset(mac->bssid, 0, 6);
+        mac->opmode = NL80211_IFTYPE_UNSPECIFIED;
+        rtlpriv->cfg->ops->set_network_type(hw, mac->opmode);
+
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+}
+
+
+static int rtl_op_config(struct ieee80211_hw *hw, u32 changed)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct ieee80211_conf *conf = &hw->conf;
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+        if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) {  /*BIT(2)*/
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                         ("IEEE80211_CONF_CHANGE_LISTEN_INTERVAL\n"));
+        }
+
+        /*For IPS */
+        if (changed & IEEE80211_CONF_CHANGE_IDLE) {
+                if (hw->conf.flags & IEEE80211_CONF_IDLE)
+                        rtl_ips_nic_off(hw);
+                else
+                        rtl_ips_nic_on(hw);
+        } else {
+                /*
+                 *although rfoff may not cause by ips, but we will
+                 *check the reason in set_rf_power_state function
+                 */
+                if (unlikely(ppsc->rfpwr_state == ERFOFF))
+                        rtl_ips_nic_on(hw);
+        }
+
+        /*For LPS */
+        if (changed & IEEE80211_CONF_CHANGE_PS) {
+                if (conf->flags & IEEE80211_CONF_PS)
+                        rtl_lps_enter(hw);
+                else
+                        rtl_lps_leave(hw);
+        }
+
+        if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) {
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                         ("IEEE80211_CONF_CHANGE_RETRY_LIMITS %x\n",
+                          hw->conf.long_frame_max_tx_count));
+                mac->retry_long = hw->conf.long_frame_max_tx_count;
+                mac->retry_short = hw->conf.long_frame_max_tx_count;
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
+                                              (u8 *) (&hw->conf.
+                                                      long_frame_max_tx_count));
+        }
+
+        if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
+                struct ieee80211_channel *channel = hw->conf.channel;
+                u8 wide_chan = (u8) channel->hw_value;
+
+                /*
+                 *because we should back channel to
+                 *current_network.chan in in scanning,
+                 *So if set_chan == current_network.chan
+                 *we should set it.
+                 *because mac80211 tell us wrong bw40
+                 *info for cisco1253 bw20, so we modify
+                 *it here based on UPPER & LOWER
+                 */
+                switch (hw->conf.channel_type) {
+                case NL80211_CHAN_HT20:
+                case NL80211_CHAN_NO_HT:
+                        /* SC */
+                        mac->cur_40_prime_sc =
+                            PRIME_CHNL_OFFSET_DONT_CARE;
+                        rtlphy->current_chan_bw = HT_CHANNEL_WIDTH_20;
+                        mac->bw_40 = false;
+                        break;
+                case NL80211_CHAN_HT40MINUS:
+                        /* SC */
+                        mac->cur_40_prime_sc = PRIME_CHNL_OFFSET_UPPER;
+                        rtlphy->current_chan_bw =
+                            HT_CHANNEL_WIDTH_20_40;
+                        mac->bw_40 = true;
+
+                        /*wide channel */
+                        wide_chan -= 2;
+
+                        break;
+                case NL80211_CHAN_HT40PLUS:
+                        /* SC */
+                        mac->cur_40_prime_sc = PRIME_CHNL_OFFSET_LOWER;
+                        rtlphy->current_chan_bw =
+                            HT_CHANNEL_WIDTH_20_40;
+                        mac->bw_40 = true;
+
+                        /*wide channel */
+                        wide_chan += 2;
+
+                        break;
+                default:
+                        mac->bw_40 = false;
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not processed\n"));
+                        break;
+                }
+
+                if (wide_chan <= 0)
+                        wide_chan = 1;
+                rtlphy->current_channel = wide_chan;
+
+                rtlpriv->cfg->ops->set_channel_access(hw);
+                rtlpriv->cfg->ops->switch_channel(hw);
+                rtlpriv->cfg->ops->set_bw_mode(hw,
+                                               hw->conf.channel_type);
+        }
+
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+
+        return 0;
+}
+
+static void rtl_op_configure_filter(struct ieee80211_hw *hw,
+                             unsigned int changed_flags,
+                             unsigned int *new_flags, u64 multicast)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        *new_flags &= RTL_SUPPORTED_FILTERS;
+        if (!changed_flags)
+                return;
+
+        /*TODO: we disable broadcase now, so enable here */
+        if (changed_flags & FIF_ALLMULTI) {
+                if (*new_flags & FIF_ALLMULTI) {
+                        mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_AM] |
+                            rtlpriv->cfg->maps[MAC_RCR_AB];
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Enable receive multicast frame.\n"));
+                } else {
+                        mac->rx_conf &= ~(rtlpriv->cfg->maps[MAC_RCR_AM] |
+                                          rtlpriv->cfg->maps[MAC_RCR_AB]);
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Disable receive multicast frame.\n"));
+                }
+        }
+
+        if (changed_flags & FIF_FCSFAIL) {
+                if (*new_flags & FIF_FCSFAIL) {
+                        mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_ACRC32];
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Enable receive FCS error frame.\n"));
+                } else {
+                        mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_ACRC32];
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Disable receive FCS error frame.\n"));
+                }
+        }
+
+        if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
+                /*
+                 *TODO: BIT(5) is probe response BIT(8) is beacon
+                 *TODO: Use define for BIT(5) and BIT(8)
+                 */
+                if (*new_flags & FIF_BCN_PRBRESP_PROMISC)
+                        mac->rx_mgt_filter |= (BIT(5) | BIT(8));
+                else
+                        mac->rx_mgt_filter &= ~(BIT(5) | BIT(8));
+        }
+
+        if (changed_flags & FIF_CONTROL) {
+                if (*new_flags & FIF_CONTROL) {
+                        mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_ACF];
+                        mac->rx_ctrl_filter |= RTL_SUPPORTED_CTRL_FILTER;
+
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Enable receive control frame.\n"));
+                } else {
+                        mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_ACF];
+                        mac->rx_ctrl_filter &= ~RTL_SUPPORTED_CTRL_FILTER;
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Disable receive control frame.\n"));
+                }
+        }
+
+        if (changed_flags & FIF_OTHER_BSS) {
+                if (*new_flags & FIF_OTHER_BSS) {
+                        mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_AAP];
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Enable receive other BSS's frame.\n"));
+                } else {
+                        mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_AAP];
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                 ("Disable receive other BSS's frame.\n"));
+                }
+        }
+
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *) (&mac->rx_conf));
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_MGT_FILTER,
+                                      (u8 *) (&mac->rx_mgt_filter));
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CTRL_FILTER,
+                                      (u8 *) (&mac->rx_ctrl_filter));
+}
+
+static int _rtl_get_hal_qnum(u16 queue)
+{
+        int qnum;
+
+        switch (queue) {
+        case 0:
+                qnum = AC3_VO;
+                break;
+        case 1:
+                qnum = AC2_VI;
+                break;
+        case 2:
+                qnum = AC0_BE;
+                break;
+        case 3:
+                qnum = AC1_BK;
+                break;
+        default:
+                qnum = AC0_BE;
+                break;
+        }
+        return qnum;
+}
+
+/*
+ *for mac80211 VO=0, VI=1, BE=2, BK=3
+ *for rtl819x  BE=0, BK=1, VI=2, VO=3
+ */
+static int rtl_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
+                   const struct ieee80211_tx_queue_params *param)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        int aci;
+
+        if (queue >= AC_MAX) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("queue number %d is incorrect!\n", queue));
+                return -EINVAL;
+        }
+
+        aci = _rtl_get_hal_qnum(queue);
+        mac->ac[aci].aifs = param->aifs;
+        mac->ac[aci].cw_min = param->cw_min;
+        mac->ac[aci].cw_max = param->cw_max;
+        mac->ac[aci].tx_op = param->txop;
+        memcpy(&mac->edca_param[aci], param, sizeof(*param));
+        rtlpriv->cfg->ops->set_qos(hw, aci);
+        return 0;
+}
+
+static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
+                             struct ieee80211_vif *vif,
+                             struct ieee80211_bss_conf *bss_conf, u32 changed)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+
+        if ((vif->type == NL80211_IFTYPE_ADHOC) ||
+            (vif->type == NL80211_IFTYPE_AP) ||
+            (vif->type == NL80211_IFTYPE_MESH_POINT)) {
+
+                if ((changed & BSS_CHANGED_BEACON) ||
+                    (changed & BSS_CHANGED_BEACON_ENABLED &&
+                     bss_conf->enable_beacon)) {
+
+                        if (mac->beacon_enabled == 0) {
+                                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
+                                         ("BSS_CHANGED_BEACON_ENABLED\n"));
+
+                                /*start hw beacon interrupt. */
+                                /*rtlpriv->cfg->ops->set_bcn_reg(hw); */
+                                mac->beacon_enabled = 1;
+                                rtlpriv->cfg->ops->update_interrupt_mask(hw,
+                                                rtlpriv->cfg->maps
+                                                [RTL_IBSS_INT_MASKS],
+                                                0);
+                        }
+                } else {
+                        if (mac->beacon_enabled == 1) {
+                                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
+                                         ("ADHOC DISABLE BEACON\n"));
+
+                                mac->beacon_enabled = 0;
+                                rtlpriv->cfg->ops->update_interrupt_mask(hw, 0,
+                                                rtlpriv->cfg->maps
+                                                [RTL_IBSS_INT_MASKS]);
+                        }
+                }
+
+                if (changed & BSS_CHANGED_BEACON_INT) {
+                        RT_TRACE(rtlpriv, COMP_BEACON, DBG_TRACE,
+                                 ("BSS_CHANGED_BEACON_INT\n"));
+                        mac->beacon_interval = bss_conf->beacon_int;
+                        rtlpriv->cfg->ops->set_bcn_intv(hw);
+                }
+        }
+
+        /*TODO: reference to enum ieee80211_bss_change */
+        if (changed & BSS_CHANGED_ASSOC) {
+                if (bss_conf->assoc) {
+                        mac->link_state = MAC80211_LINKED;
+                        mac->cnt_after_linked = 0;
+                        mac->assoc_id = bss_conf->aid;
+                        memcpy(mac->bssid, bss_conf->bssid, 6);
+
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
+                                 ("BSS_CHANGED_ASSOC\n"));
+                } else {
+                        if (mac->link_state == MAC80211_LINKED)
+                                rtl_lps_leave(hw);
+
+                        mac->link_state = MAC80211_NOLINK;
+                        memset(mac->bssid, 0, 6);
+
+                        /* reset sec info */
+                        rtl_cam_reset_sec_info(hw);
+
+                        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
+                                 ("BSS_CHANGED_UN_ASSOC\n"));
+                }
+        }
+
+        if (changed & BSS_CHANGED_ERP_CTS_PROT) {
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("BSS_CHANGED_ERP_CTS_PROT\n"));
+                mac->use_cts_protect = bss_conf->use_cts_prot;
+        }
+
+        if (changed & BSS_CHANGED_ERP_PREAMBLE) {
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                         ("BSS_CHANGED_ERP_PREAMBLE use short preamble:%x\n",
+                          bss_conf->use_short_preamble));
+
+                mac->short_preamble = bss_conf->use_short_preamble;
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACK_PREAMBLE,
+                                              (u8 *) (&mac->short_preamble));
+        }
+
+        if (changed & BSS_CHANGED_ERP_SLOT) {
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("BSS_CHANGED_ERP_SLOT\n"));
+
+                if (bss_conf->use_short_slot)
+                        mac->slot_time = RTL_SLOT_TIME_9;
+                else
+                        mac->slot_time = RTL_SLOT_TIME_20;
+
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
+                                              (u8 *) (&mac->slot_time));
+        }
+
+        if (changed & BSS_CHANGED_HT) {
+                struct ieee80211_sta *sta = NULL;
+
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("BSS_CHANGED_HT\n"));
+
+                sta = ieee80211_find_sta(mac->vif, mac->bssid);
+
+                if (sta) {
+                        if (sta->ht_cap.ampdu_density >
+                            mac->current_ampdu_density)
+                                mac->current_ampdu_density =
+                                    sta->ht_cap.ampdu_density;
+                        if (sta->ht_cap.ampdu_factor <
+                            mac->current_ampdu_factor)
+                                mac->current_ampdu_factor =
+                                    sta->ht_cap.ampdu_factor;
+                }
+
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SHORTGI_DENSITY,
+                                              (u8 *) (&mac->max_mss_density));
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_FACTOR,
+                                              &mac->current_ampdu_factor);
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_MIN_SPACE,
+                                              &mac->current_ampdu_density);
+        }
+
+        if (changed & BSS_CHANGED_BSSID) {
+                struct ieee80211_sta *sta = NULL;
+                u32 basic_rates;
+                u8 i;
+
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BSSID,
+                                              (u8 *) bss_conf->bssid);
+
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
+                         (MAC_FMT "\n", MAC_ARG(bss_conf->bssid)));
+
+                memcpy(mac->bssid, bss_conf->bssid, 6);
+                if (is_valid_ether_addr(bss_conf->bssid)) {
+                        switch (vif->type) {
+                        case NL80211_IFTYPE_UNSPECIFIED:
+                                break;
+                        case NL80211_IFTYPE_ADHOC:
+                                break;
+                        case NL80211_IFTYPE_STATION:
+                                break;
+                        case NL80211_IFTYPE_AP:
+                                break;
+                        default:
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                         ("switch case not process\n"));
+                                break;
+                        }
+                        rtlpriv->cfg->ops->set_network_type(hw, vif->type);
+                } else
+                        rtlpriv->cfg->ops->set_network_type(hw,
+                                        NL80211_IFTYPE_UNSPECIFIED);
+
+                memset(mac->mcs, 0, 16);
+                mac->ht_enable = false;
+                mac->sgi_40 = false;
+                mac->sgi_20 = false;
+
+                if (!bss_conf->use_short_slot)
+                        mac->mode = WIRELESS_MODE_B;
+                else
+                        mac->mode = WIRELESS_MODE_G;
+
+                sta = ieee80211_find_sta(mac->vif, mac->bssid);
+
+                if (sta) {
+                        if (sta->ht_cap.ht_supported) {
+                                mac->mode = WIRELESS_MODE_N_24G;
+                                mac->ht_enable = true;
+                        }
+
+                        if (mac->ht_enable) {
+                                u16 ht_cap = sta->ht_cap.cap;
+                                memcpy(mac->mcs, (u8 *) (&sta->ht_cap.mcs), 16);
+
+                                for (i = 0; i < 16; i++)
+                                        RT_TRACE(rtlpriv, COMP_MAC80211,
+                                                 DBG_LOUD, ("%x ",
+                                                            mac->mcs[i]));
+                                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD,
+                                         ("\n"));
+
+                                if (ht_cap & IEEE80211_HT_CAP_SGI_40)
+                                        mac->sgi_40 = true;
+
+                                if (ht_cap & IEEE80211_HT_CAP_SGI_20)
+                                        mac->sgi_20 = true;
+
+                                /*
+                                 * for cisco 1252 bw20 it's wrong
+                                 * if (ht_cap &
+                                 *     IEEE80211_HT_CAP_SUP_WIDTH_20_40) {
+                                 *      mac->bw_40 = true;
+                                 * }
+                                 */
+                        }
+                }
+
+                /*mac80211 just give us CCK rates any time
+                 *So we add G rate in basic rates when
+                 not in B mode*/
+                if (changed & BSS_CHANGED_BASIC_RATES) {
+                        if (mac->mode == WIRELESS_MODE_B)
+                                basic_rates = bss_conf->basic_rates | 0x00f;
+                        else
+                                basic_rates = bss_conf->basic_rates | 0xff0;
+
+                        if (!vif)
+                                goto out;
+
+                        mac->basic_rates = basic_rates;
+                        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE,
+                                        (u8 *) (&basic_rates));
+
+                        if (rtlpriv->dm.b_useramask)
+                                rtlpriv->cfg->ops->update_rate_mask(hw, 0);
+                        else
+                                rtlpriv->cfg->ops->update_rate_table(hw);
+
+                }
+        }
+
+        /*
+         * For FW LPS:
+         * To tell firmware we have connected
+         * to an AP. For 92SE/CE power save v2.
+         */
+        if (changed & BSS_CHANGED_ASSOC) {
+                if (bss_conf->assoc) {
+                        if (ppsc->b_fwctrl_lps) {
+                                u8 mstatus = RT_MEDIA_CONNECT;
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_H2C_FW_JOINBSSRPT,
+                                                      (u8 *) (&mstatus));
+                                ppsc->report_linked = true;
+                        }
+                } else {
+                        if (ppsc->b_fwctrl_lps) {
+                                u8 mstatus = RT_MEDIA_DISCONNECT;
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_H2C_FW_JOINBSSRPT,
+                                                      (u8 *)(&mstatus));
+                                ppsc->report_linked = false;
+                        }
+                }
+        }
+
+out:
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+}
+
+static u64 rtl_op_get_tsf(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u64 tsf;
+
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_CORRECT_TSF, (u8 *) (&tsf));
+        return tsf;
+}
+
+static void rtl_op_set_tsf(struct ieee80211_hw *hw, u64 tsf)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u8 bibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? 1 : 0;;
+
+        mac->tsf = tsf;
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CORRECT_TSF, (u8 *) (&bibss));
+}
+
+static void rtl_op_reset_tsf(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tmp = 0;
+
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_DUAL_TSF_RST, (u8 *) (&tmp));
+}
+
+static void rtl_op_sta_notify(struct ieee80211_hw *hw,
+                              struct ieee80211_vif *vif,
+                              enum sta_notify_cmd cmd,
+                              struct ieee80211_sta *sta)
+{
+        switch (cmd) {
+        case STA_NOTIFY_SLEEP:
+                break;
+        case STA_NOTIFY_AWAKE:
+                break;
+        default:
+                break;
+        }
+}
+
+static int rtl_op_ampdu_action(struct ieee80211_hw *hw,
+                               struct ieee80211_vif *vif,
+                               enum ieee80211_ampdu_mlme_action action,
+                               struct ieee80211_sta *sta, u16 tid, u16 * ssn)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        switch (action) {
+        case IEEE80211_AMPDU_TX_START:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("IEEE80211_AMPDU_TX_START: TID:%d\n", tid));
+                return rtl_tx_agg_start(hw, sta->addr, tid, ssn);
+                break;
+        case IEEE80211_AMPDU_TX_STOP:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("IEEE80211_AMPDU_TX_STOP: TID:%d\n", tid));
+                return rtl_tx_agg_stop(hw, sta->addr, tid);
+                break;
+        case IEEE80211_AMPDU_TX_OPERATIONAL:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("IEEE80211_AMPDU_TX_OPERATIONAL:TID:%d\n", tid));
+                break;
+        case IEEE80211_AMPDU_RX_START:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("IEEE80211_AMPDU_RX_START:TID:%d\n", tid));
+                break;
+        case IEEE80211_AMPDU_RX_STOP:
+                RT_TRACE(rtlpriv, COMP_MAC80211, DBG_TRACE,
+                         ("IEEE80211_AMPDU_RX_STOP:TID:%d\n", tid));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("IEEE80211_AMPDU_ERR!!!!:\n"));
+                return -EOPNOTSUPP;
+        }
+        return 0;
+}
+
+static void rtl_op_sw_scan_start(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        mac->act_scanning = true;
+
+        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD, ("\n"));
+
+        if (mac->link_state == MAC80211_LINKED) {
+                rtl_lps_leave(hw);
+                mac->link_state = MAC80211_LINKED_SCANNING;
+        } else
+                rtl_ips_nic_on(hw);
+
+        rtlpriv->cfg->ops->led_control(hw, LED_CTL_SITE_SURVEY);
+        rtlpriv->cfg->ops->scan_operation_backup(hw, SCAN_OPT_BACKUP);
+}
+
+static void rtl_op_sw_scan_complete(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        RT_TRACE(rtlpriv, COMP_MAC80211, DBG_LOUD, ("\n"));
+
+        rtlpriv->cfg->ops->scan_operation_backup(hw, SCAN_OPT_RESTORE);
+        mac->act_scanning = false;
+        if (mac->link_state == MAC80211_LINKED_SCANNING) {
+                mac->link_state = MAC80211_LINKED;
+
+                /* fix fwlps issue */
+                rtlpriv->cfg->ops->set_network_type(hw, mac->opmode);
+
+                if (rtlpriv->dm.b_useramask)
+                        rtlpriv->cfg->ops->update_rate_mask(hw, 0);
+                else
+                        rtlpriv->cfg->ops->update_rate_table(hw);
+
+        }
+
+}
+
+static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
+                          struct ieee80211_vif *vif, struct ieee80211_sta *sta,
+                          struct ieee80211_key_conf *key)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u8 key_type = NO_ENCRYPTION;
+        u8 key_idx;
+        bool group_key = false;
+        bool wep_only = false;
+        int err = 0;
+        u8 mac_addr[ETH_ALEN];
+        u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+        u8 zero_addr[ETH_ALEN] = { 0 };
+
+        if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("not open hw encryption\n"));
+                return -ENOSPC; /*User disabled HW-crypto */
+        }
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                 ("%s hardware based encryption for keyidx: %d, mac: %pM\n",
+                  cmd == SET_KEY ? "Using" : "Disabling", key->keyidx,
+                  sta ? sta->addr : bcast_addr));
+        rtlpriv->sec.being_setkey = true;
+        rtl_ips_nic_on(hw);
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+        /* <1> get encryption alg */
+        switch (key->cipher) {
+        case WLAN_CIPHER_SUITE_WEP40:
+                key_type = WEP40_ENCRYPTION;
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("alg:WEP40\n"));
+                rtlpriv->sec.use_defaultkey = true;
+                break;
+        case WLAN_CIPHER_SUITE_WEP104:
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                         ("alg:WEP104\n"));
+                key_type = WEP104_ENCRYPTION;
+                rtlpriv->sec.use_defaultkey = true;
+                break;
+        case WLAN_CIPHER_SUITE_TKIP:
+                key_type = TKIP_ENCRYPTION;
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("alg:TKIP\n"));
+                if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                        rtlpriv->sec.use_defaultkey = true;
+                break;
+        case WLAN_CIPHER_SUITE_CCMP:
+                key_type = AESCCMP_ENCRYPTION;
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("alg:CCMP\n"));
+                if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                        rtlpriv->sec.use_defaultkey = true;
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("alg_err:%x!!!!:\n", key->cipher));
+                goto out_unlock;
+        }
+        /* <2> get key_idx */
+        key_idx = (u8) (key->keyidx);
+        if (key_idx > 3)
+                goto out_unlock;
+        /* <3> if pairwise key enable_hw_sec */
+        group_key = !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
+        if ((!group_key) || (mac->opmode == NL80211_IFTYPE_ADHOC) ||
+            rtlpriv->sec.pairwise_enc_algorithm == NO_ENCRYPTION) {
+                if (rtlpriv->sec.pairwise_enc_algorithm == NO_ENCRYPTION &&
+                    (key_type == WEP40_ENCRYPTION ||
+                     key_type == WEP104_ENCRYPTION))
+                        wep_only = true;
+                rtlpriv->sec.pairwise_enc_algorithm = key_type;
+                rtlpriv->cfg->ops->enable_hw_sec(hw);
+        }
+        /* <4> set key based on cmd */
+        switch (cmd) {
+        case SET_KEY:
+                if (wep_only) {
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("set WEP(group/pairwise) key\n"));
+                        /* Pairwise key with an assigned MAC address. */
+                        rtlpriv->sec.pairwise_enc_algorithm = key_type;
+                        rtlpriv->sec.group_enc_algorithm = key_type;
+                        /*set local buf about wep key. */
+                        memcpy(rtlpriv->sec.key_buf[key_idx],
+                               key->key, key->keylen);
+                        rtlpriv->sec.key_len[key_idx] = key->keylen;
+                        memcpy(mac_addr, zero_addr, ETH_ALEN);
+                } else if (group_key) { /* group key */
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("set group key\n"));
+                        /* group key */
+                        rtlpriv->sec.group_enc_algorithm = key_type;
+                        /*set local buf about group key. */
+                        memcpy(rtlpriv->sec.key_buf[key_idx],
+                               key->key, key->keylen);
+                        rtlpriv->sec.key_len[key_idx] = key->keylen;
+                        memcpy(mac_addr, bcast_addr, ETH_ALEN);
+                } else {        /* pairwise key */
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("set pairwise key\n"));
+                        if (!sta) {
+                                RT_ASSERT(false, ("pairwise key withnot"
+                                                  "mac_addr\n"));
+                                err = -EOPNOTSUPP;
+                                goto out_unlock;
+                        }
+                        /* Pairwise key with an assigned MAC address. */
+                        rtlpriv->sec.pairwise_enc_algorithm = key_type;
+                        /*set local buf about pairwise key. */
+                        memcpy(rtlpriv->sec.key_buf[PAIRWISE_KEYIDX],
+                               key->key, key->keylen);
+                        rtlpriv->sec.key_len[PAIRWISE_KEYIDX] = key->keylen;
+                        rtlpriv->sec.pairwise_key =
+                            rtlpriv->sec.key_buf[PAIRWISE_KEYIDX];
+                        memcpy(mac_addr, sta->addr, ETH_ALEN);
+                }
+                rtlpriv->cfg->ops->set_key(hw, key_idx, mac_addr,
+                                           group_key, key_type, wep_only,
+                                           false);
+                /* <5> tell mac80211 do something: */
+                /*must use sw generate IV, or can not work !!!!. */
+                key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+                key->hw_key_idx = key_idx;
+                if (key_type == TKIP_ENCRYPTION)
+                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
+                break;
+        case DISABLE_KEY:
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                         ("disable key delete one entry\n"));
+                /*set local buf about wep key. */
+                memset(rtlpriv->sec.key_buf[key_idx], 0, key->keylen);
+                rtlpriv->sec.key_len[key_idx] = 0;
+                memcpy(mac_addr, zero_addr, ETH_ALEN);
+                /*
+                 *mac80211 will delete entrys one by one,
+                 *so don't use rtl_cam_reset_all_entry
+                 *or clear all entry here.
+                 */
+                rtl_cam_delete_one_entry(hw, mac_addr, key_idx);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("cmd_err:%x!!!!:\n", cmd));
+        }
+out_unlock:
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+        rtlpriv->sec.being_setkey = false;
+        return err;
+}
+
+static void rtl_op_rfkill_poll(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        bool radio_state;
+        bool blocked;
+        u8 valid = 0;
+
+        if (!test_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status))
+                return;
+
+        mutex_lock(&rtlpriv->locks.conf_mutex);
+
+        /*if Radio On return true here */
+        radio_state = rtlpriv->cfg->ops->radio_onoff_checking(hw, &valid);
+
+        if (valid) {
+                if (unlikely(radio_state != rtlpriv->rfkill.rfkill_state)) {
+                        rtlpriv->rfkill.rfkill_state = radio_state;
+
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                 (KERN_INFO "wireless radio switch turned %s\n",
+                                  radio_state ? "on" : "off"));
+
+                        blocked = (rtlpriv->rfkill.rfkill_state == 1) ? 0 : 1;
+                        wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
+                }
+        }
+
+        mutex_unlock(&rtlpriv->locks.conf_mutex);
+}
+
+const struct ieee80211_ops rtl_ops = {
+        .start = rtl_op_start,
+        .stop = rtl_op_stop,
+        .tx = rtl_op_tx,
+        .add_interface = rtl_op_add_interface,
+        .remove_interface = rtl_op_remove_interface,
+        .config = rtl_op_config,
+        .configure_filter = rtl_op_configure_filter,
+        .set_key = rtl_op_set_key,
+        .conf_tx = rtl_op_conf_tx,
+        .bss_info_changed = rtl_op_bss_info_changed,
+        .get_tsf = rtl_op_get_tsf,
+        .set_tsf = rtl_op_set_tsf,
+        .reset_tsf = rtl_op_reset_tsf,
+        .sta_notify = rtl_op_sta_notify,
+        .ampdu_action = rtl_op_ampdu_action,
+        .sw_scan_start = rtl_op_sw_scan_start,
+        .sw_scan_complete = rtl_op_sw_scan_complete,
+        .rfkill_poll = rtl_op_rfkill_poll,
+};
diff --git a/drivers/net/wireless/rtlwifi/core.h b/drivers/net/wireless/rtlwifi/core.h
new file mode 100644
index 000000000000..0ef31c3c6196
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/core.h
@@ -0,0 +1,42 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * Tmis program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * Tmis program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * tmis program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * Tme full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *****************************************************************************/
+
+#ifndef __RTL_CORE_H__
+#define __RTL_CORE_H__
+
+#define RTL_SUPPORTED_FILTERS           \
+        (FIF_PROMISC_IN_BSS | \
+        FIF_ALLMULTI | FIF_CONTROL | \
+        FIF_OTHER_BSS | \
+        FIF_FCSFAIL | \
+        FIF_BCN_PRBRESP_PROMISC)
+
+#define RTL_SUPPORTED_CTRL_FILTER       0xFF
+
+extern const struct ieee80211_ops rtl_ops;
+#endif
diff --git a/drivers/net/wireless/rtlwifi/debug.c b/drivers/net/wireless/rtlwifi/debug.c
new file mode 100644
index 000000000000..5fa73852cb66
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/debug.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * Tmis program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * Tmis program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * tmis program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * Tme full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *****************************************************************************/
+
+#include "wifi.h"
+
+void rtl_dbgp_flag_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 i;
+
+        rtlpriv->dbg.global_debuglevel = DBG_EMERG;
+
+        rtlpriv->dbg.global_debugcomponents =
+            COMP_ERR | COMP_FW | COMP_INIT | COMP_RECV | COMP_SEND |
+            COMP_MLME | COMP_SCAN | COMP_INTR | COMP_LED | COMP_SEC |
+            COMP_BEACON | COMP_RATE | COMP_RXDESC | COMP_DIG | COMP_TXAGC |
+            COMP_POWER | COMP_POWER_TRACKING | COMP_BB_POWERSAVING | COMP_SWAS |
+            COMP_RF | COMP_TURBO | COMP_RATR | COMP_CMD |
+            COMP_EFUSE | COMP_QOS | COMP_MAC80211 | COMP_REGD | COMP_CHAN;
+
+        for (i = 0; i < DBGP_TYPE_MAX; i++)
+                rtlpriv->dbg.dbgp_type[i] = 0;
+
+        /*Init Debug flag enable condition */
+}
diff --git a/drivers/net/wireless/rtlwifi/debug.h b/drivers/net/wireless/rtlwifi/debug.h
new file mode 100644
index 000000000000..08bdec2ceda4
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/debug.h
@@ -0,0 +1,212 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * Tmis program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * Tmis program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * tmis program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * Tme full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *****************************************************************************/
+
+#ifndef __RTL_DEBUG_H__
+#define __RTL_DEBUG_H__
+
+/*--------------------------------------------------------------
+                        Debug level
+--------------------------------------------------------------*/
+/*
+ *Fatal bug.
+ *For example, Tx/Rx/IO locked up,
+ *memory access violation,
+ *resource allocation failed,
+ *unexpected HW behavior, HW BUG
+ *and so on.
+ */
+#define DBG_EMERG                       0
+
+/*
+ *Abnormal, rare, or unexpeted cases.
+ *For example, Packet/IO Ctl canceled,
+ *device suprisely unremoved and so on.
+ */
+#define DBG_WARNING                     2
+
+/*
+ *Normal case driver developer should
+ *open, we can see link status like
+ *assoc/AddBA/DHCP/adapter start and
+ *so on basic and useful infromations.
+ */
+#define DBG_DMESG                       3
+
+/*
+ *Normal case with useful information
+ *about current SW or HW state.
+ *For example, Tx/Rx descriptor to fill,
+ *Tx/Rx descriptor completed status,
+ *SW protocol state change, dynamic
+ *mechanism state change and so on.
+ */
+#define DBG_LOUD                        4
+
+/*
+ *Normal case with detail execution
+ *flow or information.
+ */
+#define DBG_TRACE                       5
+
+/*--------------------------------------------------------------
+                Define the rt_trace components
+--------------------------------------------------------------*/
+#define COMP_ERR                        BIT(0)
+#define COMP_FW                         BIT(1)
+#define COMP_INIT                       BIT(2)  /*For init/deinit */
+#define COMP_RECV                       BIT(3)  /*For Rx. */
+#define COMP_SEND                       BIT(4)  /*For Tx. */
+#define COMP_MLME                       BIT(5)  /*For MLME. */
+#define COMP_SCAN                       BIT(6)  /*For Scan. */
+#define COMP_INTR                       BIT(7)  /*For interrupt Related. */
+#define COMP_LED                        BIT(8)  /*For LED. */
+#define COMP_SEC                        BIT(9)  /*For sec. */
+#define COMP_BEACON                     BIT(10) /*For beacon. */
+#define COMP_RATE                       BIT(11) /*For rate. */
+#define COMP_RXDESC                     BIT(12) /*For rx desc. */
+#define COMP_DIG                        BIT(13) /*For DIG */
+#define COMP_TXAGC                      BIT(14) /*For Tx power */
+#define COMP_HIPWR                      BIT(15) /*For High Power Mechanism */
+#define COMP_POWER                      BIT(16) /*For lps/ips/aspm. */
+#define COMP_POWER_TRACKING     BIT(17) /*For TX POWER TRACKING */
+#define COMP_BB_POWERSAVING     BIT(18)
+#define COMP_SWAS                       BIT(19) /*For SW Antenna Switch */
+#define COMP_RF                         BIT(20) /*For RF. */
+#define COMP_TURBO                      BIT(21) /*For EDCA TURBO. */
+#define COMP_RATR                       BIT(22)
+#define COMP_CMD                        BIT(23)
+#define COMP_EFUSE                      BIT(24)
+#define COMP_QOS                        BIT(25)
+#define COMP_MAC80211           BIT(26)
+#define COMP_REGD                       BIT(27)
+#define COMP_CHAN                       BIT(28)
+
+/*--------------------------------------------------------------
+                Define the rt_print components
+--------------------------------------------------------------*/
+/* Define EEPROM and EFUSE  check module bit*/
+#define EEPROM_W                        BIT(0)
+#define EFUSE_PG                        BIT(1)
+#define EFUSE_READ_ALL          BIT(2)
+
+/* Define init check for module bit*/
+#define INIT_EEPROM                     BIT(0)
+#define INIT_TxPower            BIT(1)
+#define INIT_IQK                        BIT(2)
+#define INIT_RF                         BIT(3)
+
+/* Define PHY-BB/RF/MAC check module bit */
+#define PHY_BBR                         BIT(0)
+#define PHY_BBW                         BIT(1)
+#define PHY_RFR                         BIT(2)
+#define PHY_RFW                         BIT(3)
+#define PHY_MACR                        BIT(4)
+#define PHY_MACW                        BIT(5)
+#define PHY_ALLR                        BIT(6)
+#define PHY_ALLW                        BIT(7)
+#define PHY_TXPWR                       BIT(8)
+#define PHY_PWRDIFF                     BIT(9)
+
+enum dbgp_flag_e {
+        FQOS = 0,
+        FTX = 1,
+        FRX = 2,
+        FSEC = 3,
+        FMGNT = 4,
+        FMLME = 5,
+        FRESOURCE = 6,
+        FBEACON = 7,
+        FISR = 8,
+        FPHY = 9,
+        FMP = 10,
+        FEEPROM = 11,
+        FPWR = 12,
+        FDM = 13,
+        FDBGCtrl = 14,
+        FC2H = 15,
+        FBT = 16,
+        FINIT = 17,
+        FIOCTL = 18,
+        DBGP_TYPE_MAX
+};
+
+#define RT_ASSERT(_exp, fmt)                            \
+        do {                                            \
+                if (!(_exp)) {                  \
+                        printk(KERN_DEBUG "%s:%s(): ", KBUILD_MODNAME, \
+                        __func__);                      \
+                        printk fmt;                     \
+                } \
+        } while (0);
+
+#define RT_TRACE(rtlpriv, comp, level, fmt)\
+        do { \
+                if (unlikely(((comp) & rtlpriv->dbg.global_debugcomponents) && \
+                        ((level) <= rtlpriv->dbg.global_debuglevel))) {\
+                        printk(KERN_DEBUG "%s:%s():<%lx-%x> ", KBUILD_MODNAME, \
+                        __func__, in_interrupt(), in_atomic()); \
+                        printk fmt;                             \
+                } \
+        } while (0);
+
+#define RTPRINT(rtlpriv, dbgtype, dbgflag, printstr)    \
+        do {                                            \
+                if (unlikely(rtlpriv->dbg.dbgp_type[dbgtype] & dbgflag)) { \
+                        printk(KERN_DEBUG "%s: ", KBUILD_MODNAME);      \
+                        printk printstr;                \
+                }                                       \
+        } while (0);
+
+#define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata, \
+                _hexdatalen) \
+        do {\
+                if (unlikely(((_comp) & rtlpriv->dbg.global_debugcomponents) &&\
+                        (_level <= rtlpriv->dbg.global_debuglevel)))    { \
+                        int __i;                                        \
+                        u8*     ptr = (u8 *)_hexdata;                   \
+                        printk(KERN_DEBUG "%s: ", KBUILD_MODNAME);      \
+                        printk("In process \"%s\" (pid %i):", current->comm,\
+                                        current->pid); \
+                        printk(_titlestring);           \
+                        for (__i = 0; __i < (int)_hexdatalen; __i++) {  \
+                                printk("%02X%s", ptr[__i], (((__i + 1) % 4)\
+                                                        == 0) ? "  " : " ");\
+                                if (((__i + 1) % 16) == 0)              \
+                                        printk("\n");                   \
+                        }                               \
+                        printk(KERN_DEBUG "\n");                        \
+                } \
+        } while (0);
+
+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_ARG(x) \
+        ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2],\
+        ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5]
+
+void rtl_dbgp_flag_init(struct ieee80211_hw *hw);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/efuse.c b/drivers/net/wireless/rtlwifi/efuse.c
new file mode 100644
index 000000000000..b8433f3a9bc2
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/efuse.c
@@ -0,0 +1,1189 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * Tmis program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * Tmis program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * tmis program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * Tme full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "efuse.h"
+
+static const u8 MAX_PGPKT_SIZE = 9;
+static const u8 PGPKT_DATA_SIZE = 8;
+static const int EFUSE_MAX_SIZE = 512;
+
+static const u8 EFUSE_OOB_PROTECT_BYTES = 15;
+
+static const struct efuse_map RTL8712_SDIO_EFUSE_TABLE[] = {
+        {0, 0, 0, 2},
+        {0, 1, 0, 2},
+        {0, 2, 0, 2},
+        {1, 0, 0, 1},
+        {1, 0, 1, 1},
+        {1, 1, 0, 1},
+        {1, 1, 1, 3},
+        {1, 3, 0, 17},
+        {3, 3, 1, 48},
+        {10, 0, 0, 6},
+        {10, 3, 0, 1},
+        {10, 3, 1, 1},
+        {11, 0, 0, 28}
+};
+
+static void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset,
+                                        u8 *pbuf);
+static void efuse_shadow_read_1byte(struct ieee80211_hw *hw, u16 offset,
+                                    u8 *value);
+static void efuse_shadow_read_2byte(struct ieee80211_hw *hw, u16 offset,
+                                    u16 *value);
+static void efuse_shadow_read_4byte(struct ieee80211_hw *hw, u16 offset,
+                                    u32 *value);
+static void efuse_shadow_write_1byte(struct ieee80211_hw *hw, u16 offset,
+                                     u8 value);
+static void efuse_shadow_write_2byte(struct ieee80211_hw *hw, u16 offset,
+                                     u16 value);
+static void efuse_shadow_write_4byte(struct ieee80211_hw *hw, u16 offset,
+                                     u32 value);
+static int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr,
+                                        u8 *data);
+static int efuse_one_byte_write(struct ieee80211_hw *hw, u16 addr,
+                                        u8 data);
+static void efuse_read_all_map(struct ieee80211_hw *hw, u8 *efuse);
+static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset,
+                                        u8 *data);
+static int efuse_pg_packet_write(struct ieee80211_hw *hw, u8 offset,
+                                 u8 word_en, u8 *data);
+static void efuse_word_enable_data_read(u8 word_en, u8 *sourdata,
+                                        u8 *targetdata);
+static u8 efuse_word_enable_data_write(struct ieee80211_hw *hw,
+                                       u16 efuse_addr, u8 word_en, u8 *data);
+static void efuse_power_switch(struct ieee80211_hw *hw, u8 bwrite,
+                                        u8 pwrstate);
+static u16 efuse_get_current_size(struct ieee80211_hw *hw);
+static u8 efuse_calculate_word_cnts(u8 word_en);
+
+void efuse_initialize(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 bytetemp;
+        u8 temp;
+
+        bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1);
+        temp = bytetemp | 0x20;
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1, temp);
+
+        bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1);
+        temp = bytetemp & 0xFE;
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1, temp);
+
+        bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3);
+        temp = bytetemp | 0x80;
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3, temp);
+
+        rtl_write_byte(rtlpriv, 0x2F8, 0x3);
+
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72);
+
+}
+
+u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 data;
+        u8 bytetemp;
+        u8 temp;
+        u32 k = 0;
+
+        if (address < EFUSE_REAL_CONTENT_LEN) {
+                temp = address & 0xFF;
+                rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
+                               temp);
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
+                temp = ((address >> 8) & 0x03) | (bytetemp & 0xFC);
+                rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
+                               temp);
+
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
+                temp = bytetemp & 0x7F;
+                rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3,
+                               temp);
+
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
+                while (!(bytetemp & 0x80)) {
+                        bytetemp = rtl_read_byte(rtlpriv,
+                                                 rtlpriv->cfg->
+                                                 maps[EFUSE_CTRL] + 3);
+                        k++;
+                        if (k == 1000) {
+                                k = 0;
+                                break;
+                        }
+                }
+                data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
+                return data;
+        } else
+                return 0xFF;
+
+}
+EXPORT_SYMBOL(efuse_read_1byte);
+
+void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 bytetemp;
+        u8 temp;
+        u32 k = 0;
+
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                 ("Addr=%x Data =%x\n", address, value));
+
+        if (address < EFUSE_REAL_CONTENT_LEN) {
+                rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], value);
+
+                temp = address & 0xFF;
+                rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
+                               temp);
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
+
+                temp = ((address >> 8) & 0x03) | (bytetemp & 0xFC);
+                rtl_write_byte(rtlpriv,
+                               rtlpriv->cfg->maps[EFUSE_CTRL] + 2, temp);
+
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
+                temp = bytetemp | 0x80;
+                rtl_write_byte(rtlpriv,
+                               rtlpriv->cfg->maps[EFUSE_CTRL] + 3, temp);
+
+                bytetemp = rtl_read_byte(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
+
+                while (bytetemp & 0x80) {
+                        bytetemp = rtl_read_byte(rtlpriv,
+                                                 rtlpriv->cfg->
+                                                 maps[EFUSE_CTRL] + 3);
+                        k++;
+                        if (k == 100) {
+                                k = 0;
+                                break;
+                        }
+                }
+        }
+
+}
+
+static void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 value32;
+        u8 readbyte;
+        u16 retry;
+
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
+                       (_offset & 0xff));
+        readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2);
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
+                       ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
+
+        readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3);
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3,
+                       (readbyte & 0x7f));
+
+        retry = 0;
+        value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
+        while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) {
+                value32 = rtl_read_dword(rtlpriv,
+                                         rtlpriv->cfg->maps[EFUSE_CTRL]);
+                retry++;
+        }
+
+        udelay(50);
+        value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
+
+        *pbuf = (u8) (value32 & 0xff);
+}
+
+void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 efuse_tbl[EFUSE_MAP_LEN];
+        u8 rtemp8[1];
+        u16 efuse_addr = 0;
+        u8 offset, wren;
+        u16 i;
+        u16 j;
+        u16 efuse_word[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT];
+        u16 efuse_utilized = 0;
+        u8 efuse_usage;
+
+        if ((_offset + _size_byte) > EFUSE_MAP_LEN) {
+                RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                         ("read_efuse(): Invalid offset(%#x) with read "
+                          "bytes(%#x)!!\n", _offset, _size_byte));
+                return;
+        }
+
+        for (i = 0; i < EFUSE_MAX_SECTION; i++)
+                for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+                        efuse_word[i][j] = 0xFFFF;
+
+        read_efuse_byte(hw, efuse_addr, rtemp8);
+        if (*rtemp8 != 0xFF) {
+                efuse_utilized++;
+                RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
+                        ("Addr=%d\n", efuse_addr));
+                efuse_addr++;
+        }
+
+        while ((*rtemp8 != 0xFF) && (efuse_addr < EFUSE_REAL_CONTENT_LEN)) {
+                offset = ((*rtemp8 >> 4) & 0x0f);
+
+                if (offset < EFUSE_MAX_SECTION) {
+                        wren = (*rtemp8 & 0x0f);
+                        RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
+                                ("offset-%d Worden=%x\n", offset, wren));
+
+                        for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
+                                if (!(wren & 0x01)) {
+                                        RTPRINT(rtlpriv, FEEPROM,
+                                                EFUSE_READ_ALL, ("Addr=%d\n",
+                                                                 efuse_addr));
+
+                                        read_efuse_byte(hw, efuse_addr, rtemp8);
+                                        efuse_addr++;
+                                        efuse_utilized++;
+                                        efuse_word[offset][i] = (*rtemp8 & 0xff);
+
+                                        if (efuse_addr >= EFUSE_REAL_CONTENT_LEN)
+                                                break;
+
+                                        RTPRINT(rtlpriv, FEEPROM,
+                                                EFUSE_READ_ALL, ("Addr=%d\n",
+                                                                 efuse_addr));
+
+                                        read_efuse_byte(hw, efuse_addr, rtemp8);
+                                        efuse_addr++;
+                                        efuse_utilized++;
+                                        efuse_word[offset][i] |=
+                                            (((u16)*rtemp8 << 8) & 0xff00);
+
+                                        if (efuse_addr >= EFUSE_REAL_CONTENT_LEN)
+                                                break;
+                                }
+
+                                wren >>= 1;
+                        }
+                }
+
+                RTPRINT(rtlpriv, FEEPROM, EFUSE_READ_ALL,
+                        ("Addr=%d\n", efuse_addr));
+                read_efuse_byte(hw, efuse_addr, rtemp8);
+                if (*rtemp8 != 0xFF && (efuse_addr < 512)) {
+                        efuse_utilized++;
+                        efuse_addr++;
+                }
+        }
+
+        for (i = 0; i < EFUSE_MAX_SECTION; i++) {
+                for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
+                        efuse_tbl[(i * 8) + (j * 2)] =
+                            (efuse_word[i][j] & 0xff);
+                        efuse_tbl[(i * 8) + ((j * 2) + 1)] =
+                            ((efuse_word[i][j] >> 8) & 0xff);
+                }
+        }
+
+        for (i = 0; i < _size_byte; i++)
+                pbuf[i] = efuse_tbl[_offset + i];
+
+        rtlefuse->efuse_usedbytes = efuse_utilized;
+        efuse_usage = (u8)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN);
+        rtlefuse->efuse_usedpercentage = efuse_usage;
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_BYTES,
+                                      (u8 *)&efuse_utilized);
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_USAGE,
+                                      (u8 *)&efuse_usage);
+}
+
+bool efuse_shadow_update_chk(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 section_idx, i, Base;
+        u16 words_need = 0, hdr_num = 0, totalbytes, efuse_used;
+        bool bwordchanged, bresult = true;
+
+        for (section_idx = 0; section_idx < 16; section_idx++) {
+                Base = section_idx * 8;
+                bwordchanged = false;
+
+                for (i = 0; i < 8; i = i + 2) {
+                        if ((rtlefuse->efuse_map[EFUSE_INIT_MAP][Base + i] !=
+                             rtlefuse->efuse_map[EFUSE_MODIFY_MAP][Base + i]) ||
+                            (rtlefuse->efuse_map[EFUSE_INIT_MAP][Base + i + 1] !=
+                             rtlefuse->efuse_map[EFUSE_MODIFY_MAP][Base + i +
+                                                                   1])) {
+                                words_need++;
+                                bwordchanged = true;
+                        }
+                }
+
+                if (bwordchanged == true)
+                        hdr_num++;
+        }
+
+        totalbytes = hdr_num + words_need * 2;
+        efuse_used = rtlefuse->efuse_usedbytes;
+
+        if ((totalbytes + efuse_used) >=
+            (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES))
+                bresult = false;
+
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                 ("efuse_shadow_update_chk(): totalbytes(%#x), "
+                  "hdr_num(%#x), words_need(%#x), efuse_used(%d)\n",
+                  totalbytes, hdr_num, words_need, efuse_used));
+
+        return bresult;
+}
+
+void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
+                       u16 offset, u32 *value)
+{
+        if (type == 1)
+                efuse_shadow_read_1byte(hw, offset, (u8 *) value);
+        else if (type == 2)
+                efuse_shadow_read_2byte(hw, offset, (u16 *) value);
+        else if (type == 4)
+                efuse_shadow_read_4byte(hw, offset, (u32 *) value);
+
+}
+
+void efuse_shadow_write(struct ieee80211_hw *hw, u8 type, u16 offset,
+                                u32 value)
+{
+        if (type == 1)
+                efuse_shadow_write_1byte(hw, offset, (u8) value);
+        else if (type == 2)
+                efuse_shadow_write_2byte(hw, offset, (u16) value);
+        else if (type == 4)
+                efuse_shadow_write_4byte(hw, offset, (u32) value);
+
+}
+
+bool efuse_shadow_update(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u16 i, offset, base;
+        u8 word_en = 0x0F;
+        u8 first_pg = false;
+
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD, ("--->\n"));
+
+        if (!efuse_shadow_update_chk(hw)) {
+                efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
+                memcpy((void *)&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
+                       (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
+                       rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
+
+                RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                         ("<---efuse out of capacity!!\n"));
+                return false;
+        }
+        efuse_power_switch(hw, true, true);
+
+        for (offset = 0; offset < 16; offset++) {
+
+                word_en = 0x0F;
+                base = offset * 8;
+
+                for (i = 0; i < 8; i++) {
+                        if (first_pg == true) {
+
+                                word_en &= ~(BIT(i / 2));
+
+                                rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] =
+                                    rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i];
+                        } else {
+
+                                if (rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] !=
+                                    rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i]) {
+                                        word_en &= ~(BIT(i / 2));
+
+                                        rtlefuse->efuse_map[EFUSE_INIT_MAP][base + i] =
+                                            rtlefuse->efuse_map[EFUSE_MODIFY_MAP][base + i];
+                                }
+                        }
+                }
+
+                if (word_en != 0x0F) {
+                        u8 tmpdata[8];
+                        memcpy((void *)tmpdata,
+                               (void *)(&rtlefuse->
+                                        efuse_map[EFUSE_MODIFY_MAP][base]), 8);
+                        RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD,
+                                      ("U-efuse\n"), tmpdata, 8);
+
+                        if (!efuse_pg_packet_write(hw, (u8) offset, word_en,
+                                                   tmpdata)) {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                         ("PG section(%#x) fail!!\n", offset));
+                                break;
+                        }
+                }
+
+        }
+
+        efuse_power_switch(hw, true, false);
+        efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
+
+        memcpy((void *)&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
+               (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
+               rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
+
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD, ("<---\n"));
+        return true;
+}
+
+void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        if (rtlefuse->autoload_failflag == true) {
+                memset((void *)(&rtlefuse->efuse_map[EFUSE_INIT_MAP][0]), 128,
+                       0xFF);
+        } else
+                efuse_read_all_map(hw, &rtlefuse->efuse_map[EFUSE_INIT_MAP][0]);
+
+        memcpy((void *)&rtlefuse->efuse_map[EFUSE_MODIFY_MAP][0],
+               (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
+               rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]);
+
+}
+EXPORT_SYMBOL(rtl_efuse_shadow_map_update);
+
+void efuse_force_write_vendor_Id(struct ieee80211_hw *hw)
+{
+        u8 tmpdata[8] = { 0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF };
+
+        efuse_power_switch(hw, true, true);
+
+        efuse_pg_packet_write(hw, 1, 0xD, tmpdata);
+
+        efuse_power_switch(hw, true, false);
+
+}
+
+void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx)
+{
+}
+
+static void efuse_shadow_read_1byte(struct ieee80211_hw *hw,
+                                    u16 offset, u8 *value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
+}
+
+static void efuse_shadow_read_2byte(struct ieee80211_hw *hw,
+                                    u16 offset, u16 *value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
+        *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] << 8;
+
+}
+
+static void efuse_shadow_read_4byte(struct ieee80211_hw *hw,
+                                    u16 offset, u32 *value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        *value = rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset];
+        *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] << 8;
+        *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 2] << 16;
+        *value |= rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 3] << 24;
+}
+
+static void efuse_shadow_write_1byte(struct ieee80211_hw *hw,
+                                     u16 offset, u8 value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] = value;
+}
+
+static void efuse_shadow_write_2byte(struct ieee80211_hw *hw,
+                                     u16 offset, u16 value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] = value & 0x00FF;
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] = value >> 8;
+
+}
+
+static void efuse_shadow_write_4byte(struct ieee80211_hw *hw,
+                                     u16 offset, u32 value)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset] =
+            (u8) (value & 0x000000FF);
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 1] =
+            (u8) ((value >> 8) & 0x0000FF);
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 2] =
+            (u8) ((value >> 16) & 0x00FF);
+        rtlefuse->efuse_map[EFUSE_MODIFY_MAP][offset + 3] =
+            (u8) ((value >> 24) & 0xFF);
+
+}
+
+static int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tmpidx = 0;
+        int bresult;
+
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1,
+                       (u8) (addr & 0xff));
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
+                       ((u8) ((addr >> 8) & 0x03)) |
+                       (rtl_read_byte(rtlpriv,
+                                      rtlpriv->cfg->maps[EFUSE_CTRL] + 2) &
+                        0xFC));
+
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72);
+
+        while (!(0x80 & rtl_read_byte(rtlpriv,
+                                      rtlpriv->cfg->maps[EFUSE_CTRL] + 3))
+               && (tmpidx < 100)) {
+                tmpidx++;
+        }
+
+        if (tmpidx < 100) {
+                *data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]);
+                bresult = true;
+        } else {
+                *data = 0xff;
+                bresult = false;
+        }
+        return bresult;
+}
+
+static int efuse_one_byte_write(struct ieee80211_hw *hw, u16 addr, u8 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tmpidx = 0;
+        bool bresult;
+
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                 ("Addr = %x Data=%x\n", addr, data));
+
+        rtl_write_byte(rtlpriv,
+                       rtlpriv->cfg->maps[EFUSE_CTRL] + 1, (u8) (addr & 0xff));
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2,
+                       (rtl_read_byte(rtlpriv,
+                         rtlpriv->cfg->maps[EFUSE_CTRL] +
+                         2) & 0xFC) | (u8) ((addr >> 8) & 0x03));
+
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], data);
+        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0xF2);
+
+        while ((0x80 & rtl_read_byte(rtlpriv,
+                                     rtlpriv->cfg->maps[EFUSE_CTRL] + 3))
+               && (tmpidx < 100)) {
+                tmpidx++;
+        }
+
+        if (tmpidx < 100)
+                bresult = true;
+        else
+                bresult = false;
+
+        return bresult;
+}
+
+static void efuse_read_all_map(struct ieee80211_hw *hw, u8 * efuse)
+{
+        efuse_power_switch(hw, false, true);
+        read_efuse(hw, 0, 128, efuse);
+        efuse_power_switch(hw, false, false);
+}
+
+static void efuse_read_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
+                                u8 efuse_data, u8 offset, u8 *tmpdata,
+                                u8 *readstate)
+{
+        bool bdataempty = true;
+        u8 hoffset;
+        u8 tmpidx;
+        u8 hworden;
+        u8 word_cnts;
+
+        hoffset = (efuse_data >> 4) & 0x0F;
+        hworden = efuse_data & 0x0F;
+        word_cnts = efuse_calculate_word_cnts(hworden);
+
+        if (hoffset == offset) {
+                for (tmpidx = 0; tmpidx < word_cnts * 2; tmpidx++) {
+                        if (efuse_one_byte_read(hw, *efuse_addr + 1 + tmpidx,
+                            &efuse_data)) {
+                                tmpdata[tmpidx] = efuse_data;
+                                if (efuse_data != 0xff)
+                                        bdataempty = true;
+                        }
+                }
+
+                if (bdataempty == true)
+                        *readstate = PG_STATE_DATA;
+                else {
+                        *efuse_addr = *efuse_addr + (word_cnts * 2) + 1;
+                        *readstate = PG_STATE_HEADER;
+                }
+
+        } else {
+                *efuse_addr = *efuse_addr + (word_cnts * 2) + 1;
+                *readstate = PG_STATE_HEADER;
+        }
+}
+
+static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset, u8 *data)
+{
+        u8 readstate = PG_STATE_HEADER;
+
+        bool bcontinual = true;
+
+        u8 efuse_data, word_cnts = 0;
+        u16 efuse_addr = 0;
+        u8 hworden;
+        u8 tmpdata[8];
+
+        if (data == NULL)
+                return false;
+        if (offset > 15)
+                return false;
+
+        memset((void *)data, PGPKT_DATA_SIZE * sizeof(u8), 0xff);
+        memset((void *)tmpdata, PGPKT_DATA_SIZE * sizeof(u8), 0xff);
+
+        while (bcontinual && (efuse_addr < EFUSE_MAX_SIZE)) {
+                if (readstate & PG_STATE_HEADER) {
+                        if (efuse_one_byte_read(hw, efuse_addr, &efuse_data)
+                            && (efuse_data != 0xFF))
+                                efuse_read_data_case1(hw, &efuse_addr,
+                                                      efuse_data,
+                                                      offset, tmpdata,
+                                                      &readstate);
+                        else
+                                bcontinual = false;
+                } else if (readstate & PG_STATE_DATA) {
+                        efuse_word_enable_data_read(hworden, tmpdata, data);
+                        efuse_addr = efuse_addr + (word_cnts * 2) + 1;
+                        readstate = PG_STATE_HEADER;
+                }
+
+        }
+
+        if ((data[0] == 0xff) && (data[1] == 0xff) &&
+            (data[2] == 0xff) && (data[3] == 0xff) &&
+            (data[4] == 0xff) && (data[5] == 0xff) &&
+            (data[6] == 0xff) && (data[7] == 0xff))
+                return false;
+        else
+                return true;
+
+}
+
+static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
+                                u8 efuse_data, u8 offset, int *bcontinual,
+                                u8 *write_state, struct pgpkt_struct target_pkt,
+                                int *repeat_times, int *bresult, u8 word_en)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct pgpkt_struct tmp_pkt;
+        int bdataempty = true;
+        u8 originaldata[8 * sizeof(u8)];
+        u8 badworden = 0x0F;
+        u8 match_word_en, tmp_word_en;
+        u8 tmpindex;
+        u8 tmp_header = efuse_data;
+        u8 tmp_word_cnts;
+
+        tmp_pkt.offset = (tmp_header >> 4) & 0x0F;
+        tmp_pkt.word_en = tmp_header & 0x0F;
+        tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en);
+
+        if (tmp_pkt.offset != target_pkt.offset) {
+                efuse_addr = efuse_addr + (tmp_word_cnts * 2) + 1;
+                *write_state = PG_STATE_HEADER;
+        } else {
+                for (tmpindex = 0; tmpindex < (tmp_word_cnts * 2); tmpindex++) {
+                        u16 address = *efuse_addr + 1 + tmpindex;
+                        if (efuse_one_byte_read(hw, address,
+                             &efuse_data) && (efuse_data != 0xFF))
+                                bdataempty = false;
+                }
+
+                if (bdataempty == false) {
+                        efuse_addr = efuse_addr + (tmp_word_cnts * 2) + 1;
+                        *write_state = PG_STATE_HEADER;
+                } else {
+                        match_word_en = 0x0F;
+                        if (!((target_pkt.word_en & BIT(0)) |
+                             (tmp_pkt.word_en & BIT(0))))
+                                match_word_en &= (~BIT(0));
+
+                        if (!((target_pkt.word_en & BIT(1)) |
+                             (tmp_pkt.word_en & BIT(1))))
+                                match_word_en &= (~BIT(1));
+
+                        if (!((target_pkt.word_en & BIT(2)) |
+                             (tmp_pkt.word_en & BIT(2))))
+                                match_word_en &= (~BIT(2));
+
+                        if (!((target_pkt.word_en & BIT(3)) |
+                             (tmp_pkt.word_en & BIT(3))))
+                                match_word_en &= (~BIT(3));
+
+                        if ((match_word_en & 0x0F) != 0x0F) {
+                                badworden = efuse_word_enable_data_write(
+                                                            hw, *efuse_addr + 1,
+                                                            tmp_pkt.word_en,
+                                                            target_pkt.data);
+
+                                if (0x0F != (badworden & 0x0F)) {
+                                        u8 reorg_offset = offset;
+                                        u8 reorg_worden = badworden;
+                                        efuse_pg_packet_write(hw, reorg_offset,
+                                                               reorg_worden,
+                                                               originaldata);
+                                }
+
+                                tmp_word_en = 0x0F;
+                                if ((target_pkt.word_en & BIT(0)) ^
+                                    (match_word_en & BIT(0)))
+                                        tmp_word_en &= (~BIT(0));
+
+                                if ((target_pkt.word_en & BIT(1)) ^
+                                    (match_word_en & BIT(1)))
+                                        tmp_word_en &= (~BIT(1));
+
+                                if ((target_pkt.word_en & BIT(2)) ^
+                                        (match_word_en & BIT(2)))
+                                        tmp_word_en &= (~BIT(2));
+
+                                if ((target_pkt.word_en & BIT(3)) ^
+                                    (match_word_en & BIT(3)))
+                                        tmp_word_en &= (~BIT(3));
+
+                                if ((tmp_word_en & 0x0F) != 0x0F) {
+                                        *efuse_addr = efuse_get_current_size(hw);
+                                        target_pkt.offset = offset;
+                                        target_pkt.word_en = tmp_word_en;
+                                } else
+                                        *bcontinual = false;
+                                *write_state = PG_STATE_HEADER;
+                                *repeat_times += 1;
+                                if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
+                                        *bcontinual = false;
+                                        *bresult = false;
+                                }
+                        } else {
+                                *efuse_addr += (2 * tmp_word_cnts) + 1;
+                                target_pkt.offset = offset;
+                                target_pkt.word_en = word_en;
+                                *write_state = PG_STATE_HEADER;
+                        }
+                }
+        }
+        RTPRINT(rtlpriv, FEEPROM, EFUSE_PG, ("efuse PG_STATE_HEADER-1\n"));
+}
+
+static void efuse_write_data_case2(struct ieee80211_hw *hw, u16 *efuse_addr,
+                                   int *bcontinual, u8 *write_state,
+                                   struct pgpkt_struct target_pkt,
+                                   int *repeat_times, int *bresult)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct pgpkt_struct tmp_pkt;
+        u8 pg_header;
+        u8 tmp_header;
+        u8 originaldata[8 * sizeof(u8)];
+        u8 tmp_word_cnts;
+        u8 badworden = 0x0F;
+
+        pg_header = ((target_pkt.offset << 4) & 0xf0) | target_pkt.word_en;
+        efuse_one_byte_write(hw, *efuse_addr, pg_header);
+        efuse_one_byte_read(hw, *efuse_addr, &tmp_header);
+
+        if (tmp_header == pg_header)
+                *write_state = PG_STATE_DATA;
+        else if (tmp_header == 0xFF) {
+                *write_state = PG_STATE_HEADER;
+                *repeat_times += 1;
+                if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
+                        *bcontinual = false;
+                        *bresult = false;
+                }
+        } else {
+                tmp_pkt.offset = (tmp_header >> 4) & 0x0F;
+                tmp_pkt.word_en = tmp_header & 0x0F;
+
+                tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en);
+
+                memset((void *)originaldata, 8 * sizeof(u8), 0xff);
+
+                if (efuse_pg_packet_read(hw, tmp_pkt.offset, originaldata)) {
+                        badworden = efuse_word_enable_data_write(hw,
+                                    *efuse_addr + 1, tmp_pkt.word_en,
+                                    originaldata);
+
+                        if (0x0F != (badworden & 0x0F)) {
+                                u8 reorg_offset = tmp_pkt.offset;
+                                u8 reorg_worden = badworden;
+                                efuse_pg_packet_write(hw, reorg_offset,
+                                                      reorg_worden,
+                                                      originaldata);
+                                *efuse_addr = efuse_get_current_size(hw);
+                         } else
+                                *efuse_addr = *efuse_addr + (tmp_word_cnts * 2)
+                                              + 1;
+                } else
+                        *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
+
+                *write_state = PG_STATE_HEADER;
+                *repeat_times += 1;
+                if (*repeat_times > EFUSE_REPEAT_THRESHOLD_) {
+                        *bcontinual = false;
+                        *bresult = false;
+                }
+
+                RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
+                        ("efuse PG_STATE_HEADER-2\n"));
+        }
+}
+
+static int efuse_pg_packet_write(struct ieee80211_hw *hw,
+                                 u8 offset, u8 word_en, u8 *data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct pgpkt_struct target_pkt;
+        u8 write_state = PG_STATE_HEADER;
+        int bcontinual = true, bdataempty = true, bresult = true;
+        u16 efuse_addr = 0;
+        u8 efuse_data;
+        u8 target_word_cnts = 0;
+        u8 badworden = 0x0F;
+        static int repeat_times;
+
+        if (efuse_get_current_size(hw) >=
+            (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES)) {
+                RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
+                        ("efuse_pg_packet_write error\n"));
+                return false;
+        }
+
+        target_pkt.offset = offset;
+        target_pkt.word_en = word_en;
+
+        memset((void *)target_pkt.data, 8 * sizeof(u8), 0xFF);
+
+        efuse_word_enable_data_read(word_en, data, target_pkt.data);
+        target_word_cnts = efuse_calculate_word_cnts(target_pkt.word_en);
+
+        RTPRINT(rtlpriv, FEEPROM, EFUSE_PG, ("efuse Power ON\n"));
+
+        while (bcontinual && (efuse_addr <
+               (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES))) {
+
+                if (write_state == PG_STATE_HEADER) {
+                        bdataempty = true;
+                        badworden = 0x0F;
+                        RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
+                                ("efuse PG_STATE_HEADER\n"));
+
+                        if (efuse_one_byte_read(hw, efuse_addr, &efuse_data) &&
+                            (efuse_data != 0xFF))
+                                efuse_write_data_case1(hw, &efuse_addr,
+                                                       efuse_data, offset,
+                                                       &bcontinual,
+                                                       &write_state, target_pkt,
+                                                       &repeat_times, &bresult,
+                                                       word_en);
+                        else
+                                efuse_write_data_case2(hw, &efuse_addr,
+                                                       &bcontinual,
+                                                       &write_state,
+                                                       target_pkt,
+                                                       &repeat_times,
+                                                       &bresult);
+
+                } else if (write_state == PG_STATE_DATA) {
+                        RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
+                                ("efuse PG_STATE_DATA\n"));
+                        badworden = 0x0f;
+                        badworden =
+                            efuse_word_enable_data_write(hw, efuse_addr + 1,
+                                                         target_pkt.word_en,
+                                                         target_pkt.data);
+
+                        if ((badworden & 0x0F) == 0x0F) {
+                                bcontinual = false;
+                        } else {
+                                efuse_addr =
+                                    efuse_addr + (2 * target_word_cnts) + 1;
+
+                                target_pkt.offset = offset;
+                                target_pkt.word_en = badworden;
+                                target_word_cnts =
+                                    efuse_calculate_word_cnts(target_pkt.
+                                                              word_en);
+                                write_state = PG_STATE_HEADER;
+                                repeat_times++;
+                                if (repeat_times > EFUSE_REPEAT_THRESHOLD_) {
+                                        bcontinual = false;
+                                        bresult = false;
+                                }
+                                RTPRINT(rtlpriv, FEEPROM, EFUSE_PG,
+                                        ("efuse PG_STATE_HEADER-3\n"));
+                        }
+                }
+        }
+
+        if (efuse_addr >= (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES)) {
+                RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                         ("efuse_addr(%#x) Out of size!!\n", efuse_addr));
+        }
+
+        return true;
+}
+
+static void efuse_word_enable_data_read(u8 word_en,
+                                        u8 *sourdata, u8 *targetdata)
+{
+        if (!(word_en & BIT(0))) {
+                targetdata[0] = sourdata[0];
+                targetdata[1] = sourdata[1];
+        }
+
+        if (!(word_en & BIT(1))) {
+                targetdata[2] = sourdata[2];
+                targetdata[3] = sourdata[3];
+        }
+
+        if (!(word_en & BIT(2))) {
+                targetdata[4] = sourdata[4];
+                targetdata[5] = sourdata[5];
+        }
+
+        if (!(word_en & BIT(3))) {
+                targetdata[6] = sourdata[6];
+                targetdata[7] = sourdata[7];
+        }
+}
+
+static u8 efuse_word_enable_data_write(struct ieee80211_hw *hw,
+                                       u16 efuse_addr, u8 word_en, u8 *data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 tmpaddr;
+        u16 start_addr = efuse_addr;
+        u8 badworden = 0x0F;
+        u8 tmpdata[8];
+
+        memset((void *)tmpdata, PGPKT_DATA_SIZE, 0xff);
+        RT_TRACE(rtlpriv, COMP_EFUSE, DBG_LOUD,
+                 ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr));
+
+        if (!(word_en & BIT(0))) {
+                tmpaddr = start_addr;
+                efuse_one_byte_write(hw, start_addr++, data[0]);
+                efuse_one_byte_write(hw, start_addr++, data[1]);
+
+                efuse_one_byte_read(hw, tmpaddr, &tmpdata[0]);
+                efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[1]);
+                if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
+                        badworden &= (~BIT(0));
+        }
+
+        if (!(word_en & BIT(1))) {
+                tmpaddr = start_addr;
+                efuse_one_byte_write(hw, start_addr++, data[2]);
+                efuse_one_byte_write(hw, start_addr++, data[3]);
+
+                efuse_one_byte_read(hw, tmpaddr, &tmpdata[2]);
+                efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[3]);
+                if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
+                        badworden &= (~BIT(1));
+        }
+
+        if (!(word_en & BIT(2))) {
+                tmpaddr = start_addr;
+                efuse_one_byte_write(hw, start_addr++, data[4]);
+                efuse_one_byte_write(hw, start_addr++, data[5]);
+
+                efuse_one_byte_read(hw, tmpaddr, &tmpdata[4]);
+                efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[5]);
+                if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
+                        badworden &= (~BIT(2));
+        }
+
+        if (!(word_en & BIT(3))) {
+                tmpaddr = start_addr;
+                efuse_one_byte_write(hw, start_addr++, data[6]);
+                efuse_one_byte_write(hw, start_addr++, data[7]);
+
+                efuse_one_byte_read(hw, tmpaddr, &tmpdata[6]);
+                efuse_one_byte_read(hw, tmpaddr + 1, &tmpdata[7]);
+                if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
+                        badworden &= (~BIT(3));
+        }
+
+        return badworden;
+}
+
+static void efuse_power_switch(struct ieee80211_hw *hw, u8 bwrite, u8 pwrstate)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tempval;
+        u16 tmpV16;
+
+        if (pwrstate == true) {
+                tmpV16 = rtl_read_word(rtlpriv,
+                                       rtlpriv->cfg->maps[SYS_ISO_CTRL]);
+                if (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_PWC_EV12V])) {
+                        tmpV16 |= rtlpriv->cfg->maps[EFUSE_PWC_EV12V];
+                        rtl_write_word(rtlpriv,
+                                       rtlpriv->cfg->maps[SYS_ISO_CTRL],
+                                       tmpV16);
+                }
+
+                tmpV16 = rtl_read_word(rtlpriv,
+                                       rtlpriv->cfg->maps[SYS_FUNC_EN]);
+                if (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_FEN_ELDR])) {
+                        tmpV16 |= rtlpriv->cfg->maps[EFUSE_FEN_ELDR];
+                        rtl_write_word(rtlpriv,
+                                       rtlpriv->cfg->maps[SYS_FUNC_EN], tmpV16);
+                }
+
+                tmpV16 = rtl_read_word(rtlpriv, rtlpriv->cfg->maps[SYS_CLK]);
+                if ((!(tmpV16 & rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN])) ||
+                    (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_ANA8M]))) {
+                        tmpV16 |= (rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN] |
+                                   rtlpriv->cfg->maps[EFUSE_ANA8M]);
+                        rtl_write_word(rtlpriv,
+                                       rtlpriv->cfg->maps[SYS_CLK], tmpV16);
+                }
+        }
+
+        if (pwrstate == true) {
+                if (bwrite == true) {
+                        tempval = rtl_read_byte(rtlpriv,
+                                                rtlpriv->cfg->maps[EFUSE_TEST] +
+                                                3);
+                        tempval &= 0x0F;
+                        tempval |= (VOLTAGE_V25 << 4);
+                        rtl_write_byte(rtlpriv,
+                                       rtlpriv->cfg->maps[EFUSE_TEST] + 3,
+                                       (tempval | 0x80));
+                }
+
+        } else {
+                if (bwrite == true) {
+                        tempval = rtl_read_byte(rtlpriv,
+                                                rtlpriv->cfg->maps[EFUSE_TEST] +
+                                                3);
+                        rtl_write_byte(rtlpriv,
+                                       rtlpriv->cfg->maps[EFUSE_TEST] + 3,
+                                       (tempval & 0x7F));
+                }
+
+        }
+
+}
+
+static u16 efuse_get_current_size(struct ieee80211_hw *hw)
+{
+        int bcontinual = true;
+        u16 efuse_addr = 0;
+        u8 hoffset, hworden;
+        u8 efuse_data, word_cnts;
+
+        while (bcontinual && efuse_one_byte_read(hw, efuse_addr, &efuse_data)
+               && (efuse_addr < EFUSE_MAX_SIZE)) {
+                if (efuse_data != 0xFF) {
+                        hoffset = (efuse_data >> 4) & 0x0F;
+                        hworden = efuse_data & 0x0F;
+                        word_cnts = efuse_calculate_word_cnts(hworden);
+                        efuse_addr = efuse_addr + (word_cnts * 2) + 1;
+                } else {
+                        bcontinual = false;
+                }
+        }
+
+        return efuse_addr;
+}
+
+static u8 efuse_calculate_word_cnts(u8 word_en)
+{
+        u8 word_cnts = 0;
+        if (!(word_en & BIT(0)))
+                word_cnts++;
+        if (!(word_en & BIT(1)))
+                word_cnts++;
+        if (!(word_en & BIT(2)))
+                word_cnts++;
+        if (!(word_en & BIT(3)))
+                word_cnts++;
+        return word_cnts;
+}
+
+void efuse_reset_loader(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 tmp_u2b;
+
+        tmp_u2b = rtl_read_word(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN]);
+        rtl_write_word(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN],
+                       (tmp_u2b & ~(BIT(12))));
+        udelay(10000);
+        rtl_write_word(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN],
+                       (tmp_u2b | BIT(12)));
+        udelay(10000);
+}
+
+bool efuse_program_map(struct ieee80211_hw *hw, char *p_filename, u8 tabletype)
+{
+        return true;
+}
diff --git a/drivers/net/wireless/rtlwifi/efuse.h b/drivers/net/wireless/rtlwifi/efuse.h
new file mode 100644
index 000000000000..2d39a4df181b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/efuse.h
@@ -0,0 +1,124 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_EFUSE_H_
+#define __RTL_EFUSE_H_
+
+#define EFUSE_REAL_CONTENT_LEN          512
+#define EFUSE_MAP_LEN                   128
+#define EFUSE_MAX_SECTION               16
+#define EFUSE_MAX_WORD_UNIT             4
+
+#define EFUSE_INIT_MAP                  0
+#define EFUSE_MODIFY_MAP                1
+
+#define PG_STATE_HEADER                 0x01
+#define PG_STATE_WORD_0                 0x02
+#define PG_STATE_WORD_1                 0x04
+#define PG_STATE_WORD_2                 0x08
+#define PG_STATE_WORD_3                 0x10
+#define PG_STATE_DATA                   0x20
+
+#define PG_SWBYTE_H                     0x01
+#define PG_SWBYTE_L                     0x02
+
+#define _POWERON_DELAY_
+#define _PRE_EXECUTE_READ_CMD_
+
+#define EFUSE_REPEAT_THRESHOLD_         3
+
+struct efuse_map {
+        u8 offset;
+        u8 word_start;
+        u8 byte_start;
+        u8 byte_cnts;
+};
+
+struct pgpkt_struct {
+        u8 offset;
+        u8 word_en;
+        u8 data[8];
+};
+
+enum efuse_data_item {
+        EFUSE_CHIP_ID = 0,
+        EFUSE_LDO_SETTING,
+        EFUSE_CLK_SETTING,
+        EFUSE_SDIO_SETTING,
+        EFUSE_CCCR,
+        EFUSE_SDIO_MODE,
+        EFUSE_OCR,
+        EFUSE_F0CIS,
+        EFUSE_F1CIS,
+        EFUSE_MAC_ADDR,
+        EFUSE_EEPROM_VER,
+        EFUSE_CHAN_PLAN,
+        EFUSE_TXPW_TAB
+};
+
+enum {
+        VOLTAGE_V25 = 0x03,
+        LDOE25_SHIFT = 28,
+};
+
+struct efuse_priv {
+        u8 id[2];
+        u8 ldo_setting[2];
+        u8 clk_setting[2];
+        u8 cccr;
+        u8 sdio_mode;
+        u8 ocr[3];
+        u8 cis0[17];
+        u8 cis1[48];
+        u8 mac_addr[6];
+        u8 eeprom_verno;
+        u8 channel_plan;
+        u8 tx_power_b[14];
+        u8 tx_power_g[14];
+};
+
+extern void efuse_initialize(struct ieee80211_hw *hw);
+extern u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
+extern void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
+extern void read_efuse(struct ieee80211_hw *hw, u16 _offset,
+                       u16 _size_byte, u8 *pbuf);
+extern void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
+                              u16 offset, u32 *value);
+extern void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
+                               u16 offset, u32 value);
+extern bool efuse_shadow_update(struct ieee80211_hw *hw);
+extern bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
+extern void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
+extern void efuse_force_write_vendor_Id(struct ieee80211_hw *hw);
+extern void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
+extern bool efuse_program_map(struct ieee80211_hw *hw,
+                              char *p_filename, u8 tabletype);
+extern void efuse_reset_loader(struct ieee80211_hw *hw);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
new file mode 100644
index 000000000000..bf3b5748ee19
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -0,0 +1,1933 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "core.h"
+#include "wifi.h"
+#include "pci.h"
+#include "base.h"
+#include "ps.h"
+
+static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
+        INTEL_VENDOR_ID,
+        ATI_VENDOR_ID,
+        AMD_VENDOR_ID,
+        SIS_VENDOR_ID
+};
+
+/* Update PCI dependent default settings*/
+static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
+
+        ppsc->reg_rfps_level = 0;
+        ppsc->b_support_aspm = 0;
+
+        /*Update PCI ASPM setting */
+        ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
+        switch (rtlpci->const_pci_aspm) {
+        case 0:
+                /*No ASPM */
+                break;
+
+        case 1:
+                /*ASPM dynamically enabled/disable. */
+                ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
+                break;
+
+        case 2:
+                /*ASPM with Clock Req dynamically enabled/disable. */
+                ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
+                                         RT_RF_OFF_LEVL_CLK_REQ);
+                break;
+
+        case 3:
+                /*
+                 * Always enable ASPM and Clock Req
+                 * from initialization to halt.
+                 * */
+                ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
+                ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
+                                         RT_RF_OFF_LEVL_CLK_REQ);
+                break;
+
+        case 4:
+                /*
+                 * Always enable ASPM without Clock Req
+                 * from initialization to halt.
+                 * */
+                ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
+                                          RT_RF_OFF_LEVL_CLK_REQ);
+                ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
+                break;
+        }
+
+        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
+
+        /*Update Radio OFF setting */
+        switch (rtlpci->const_hwsw_rfoff_d3) {
+        case 1:
+                if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
+                        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
+                break;
+
+        case 2:
+                if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
+                        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
+                ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
+                break;
+
+        case 3:
+                ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
+                break;
+        }
+
+        /*Set HW definition to determine if it supports ASPM. */
+        switch (rtlpci->const_support_pciaspm) {
+        case 0:{
+                        /*Not support ASPM. */
+                        bool b_support_aspm = false;
+                        ppsc->b_support_aspm = b_support_aspm;
+                        break;
+                }
+        case 1:{
+                        /*Support ASPM. */
+                        bool b_support_aspm = true;
+                        bool b_support_backdoor = true;
+                        ppsc->b_support_aspm = b_support_aspm;
+
+                        /*if(priv->oem_id == RT_CID_TOSHIBA &&
+                           !priv->ndis_adapter.amd_l1_patch)
+                           b_support_backdoor = false; */
+
+                        ppsc->b_support_backdoor = b_support_backdoor;
+
+                        break;
+                }
+        case 2:
+                /*ASPM value set by chipset. */
+                if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
+                        bool b_support_aspm = true;
+                        ppsc->b_support_aspm = b_support_aspm;
+                }
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+}
+
+static bool _rtl_pci_platform_switch_device_pci_aspm(
+                        struct ieee80211_hw *hw,
+                        u8 value)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        bool bresult = false;
+
+        value |= 0x40;
+
+        pci_write_config_byte(rtlpci->pdev, 0x80, value);
+
+        return bresult;
+}
+
+/*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
+static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 buffer;
+        bool bresult = false;
+
+        buffer = value;
+
+        pci_write_config_byte(rtlpci->pdev, 0x81, value);
+        bresult = true;
+
+        return bresult;
+}
+
+/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
+static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
+        u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
+        u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
+        /*Retrieve original configuration settings. */
+        u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
+        u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
+                                pcibridge_linkctrlreg;
+        u16 aspmlevel = 0;
+
+        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("PCI(Bridge) UNKNOWN.\n"));
+
+                return;
+        }
+
+        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
+                _rtl_pci_switch_clk_req(hw, 0x0);
+        }
+
+        if (1) {
+                /*for promising device will in L0 state after an I/O. */
+                u8 tmp_u1b;
+                pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
+        }
+
+        /*Set corresponding value. */
+        aspmlevel |= BIT(0) | BIT(1);
+        linkctrl_reg &= ~aspmlevel;
+        pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
+
+        _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
+        udelay(50);
+
+        /*4 Disable Pci Bridge ASPM */
+        rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                                     pcicfg_addrport + (num4bytes << 2));
+        rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
+
+        udelay(50);
+
+}
+
+/*
+ *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
+ *power saving We should follow the sequence to enable
+ *RTL8192SE first then enable Pci Bridge ASPM
+ *or the system will show bluescreen.
+ */
+static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
+        u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
+        u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
+        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
+        u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
+        u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
+        u16 aspmlevel;
+        u8 u_pcibridge_aspmsetting;
+        u8 u_device_aspmsetting;
+
+        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("PCI(Bridge) UNKNOWN.\n"));
+                return;
+        }
+
+        /*4 Enable Pci Bridge ASPM */
+        rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                                     pcicfg_addrport + (num4bytes << 2));
+
+        u_pcibridge_aspmsetting =
+            pcipriv->ndis_adapter.pcibridge_linkctrlreg |
+            rtlpci->const_hostpci_aspm_setting;
+
+        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
+                u_pcibridge_aspmsetting &= ~BIT(0);
+
+        rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("PlatformEnableASPM():PciBridge busnumber[%x], "
+                  "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
+                  pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
+                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
+                  u_pcibridge_aspmsetting));
+
+        udelay(50);
+
+        /*Get ASPM level (with/without Clock Req) */
+        aspmlevel = rtlpci->const_devicepci_aspm_setting;
+        u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
+
+        /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
+        /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
+
+        u_device_aspmsetting |= aspmlevel;
+
+        _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
+
+        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+                _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
+                                             RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
+                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
+        }
+        udelay(200);
+}
+
+static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
+{
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
+
+        bool status = false;
+        u8 offset_e0;
+        unsigned offset_e4;
+
+        rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                        pcicfg_addrport + 0xE0);
+        rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0);
+
+        rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                        pcicfg_addrport + 0xE0);
+        rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0);
+
+        if (offset_e0 == 0xA0) {
+                rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                                             pcicfg_addrport + 0xE4);
+                rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4);
+                if (offset_e4 & BIT(23))
+                        status = true;
+        }
+
+        return status;
+}
+
+static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
+{
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
+        u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
+        u8 linkctrl_reg;
+        u8 num4bBytes;
+
+        num4bBytes = (capabilityoffset + 0x10) / 4;
+
+        /*Read  Link Control Register */
+        rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
+                                     pcicfg_addrport + (num4bBytes << 2));
+        rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
+
+        pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
+}
+
+static void rtl_pci_parse_configuration(struct pci_dev *pdev,
+                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+
+        u8 tmp;
+        int pos;
+        u8 linkctrl_reg;
+
+        /*Link Control Register */
+        pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+        pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
+        pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Link Control Register =%x\n",
+                  pcipriv->ndis_adapter.linkctrl_reg));
+
+        pci_read_config_byte(pdev, 0x98, &tmp);
+        tmp |= BIT(4);
+        pci_write_config_byte(pdev, 0x98, tmp);
+
+        tmp = 0x17;
+        pci_write_config_byte(pdev, 0x70f, tmp);
+}
+
+static void _rtl_pci_initialize_adapter_common(struct ieee80211_hw *hw)
+{
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        _rtl_pci_update_default_setting(hw);
+
+        if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
+                /*Always enable ASPM & Clock Req. */
+                rtl_pci_enable_aspm(hw);
+                RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
+        }
+
+}
+
+static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        /*close ASPM for AMD defaultly */
+        rtlpci->const_amdpci_aspm = 0;
+
+        /*
+         * ASPM PS mode.
+         * 0 - Disable ASPM,
+         * 1 - Enable ASPM without Clock Req,
+         * 2 - Enable ASPM with Clock Req,
+         * 3 - Alwyas Enable ASPM with Clock Req,
+         * 4 - Always Enable ASPM without Clock Req.
+         * set defult to RTL8192CE:3 RTL8192E:2
+         * */
+        rtlpci->const_pci_aspm = 3;
+
+        /*Setting for PCI-E device */
+        rtlpci->const_devicepci_aspm_setting = 0x03;
+
+        /*Setting for PCI-E bridge */
+        rtlpci->const_hostpci_aspm_setting = 0x02;
+
+        /*
+         * In Hw/Sw Radio Off situation.
+         * 0 - Default,
+         * 1 - From ASPM setting without low Mac Pwr,
+         * 2 - From ASPM setting with low Mac Pwr,
+         * 3 - Bus D3
+         * set default to RTL8192CE:0 RTL8192SE:2
+         */
+        rtlpci->const_hwsw_rfoff_d3 = 0;
+
+        /*
+         * This setting works for those device with
+         * backdoor ASPM setting such as EPHY setting.
+         * 0 - Not support ASPM,
+         * 1 - Support ASPM,
+         * 2 - According to chipset.
+         */
+        rtlpci->const_support_pciaspm = 1;
+
+        _rtl_pci_initialize_adapter_common(hw);
+}
+
+static void _rtl_pci_io_handler_init(struct device *dev,
+                                     struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->io.dev = dev;
+
+        rtlpriv->io.write8_async = pci_write8_async;
+        rtlpriv->io.write16_async = pci_write16_async;
+        rtlpriv->io.write32_async = pci_write32_async;
+
+        rtlpriv->io.read8_sync = pci_read8_sync;
+        rtlpriv->io.read16_sync = pci_read16_sync;
+        rtlpriv->io.read32_sync = pci_read32_sync;
+
+}
+
+static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
+{
+}
+
+static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
+
+        while (skb_queue_len(&ring->queue)) {
+                struct rtl_tx_desc *entry = &ring->desc[ring->idx];
+                struct sk_buff *skb;
+                struct ieee80211_tx_info *info;
+
+                u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
+                                                          HW_DESC_OWN);
+
+                /*
+                 *beacon packet will only use the first
+                 *descriptor defautly,and the own may not
+                 *be cleared by the hardware
+                 */
+                if (own)
+                        return;
+                ring->idx = (ring->idx + 1) % ring->entries;
+
+                skb = __skb_dequeue(&ring->queue);
+                pci_unmap_single(rtlpci->pdev,
+                                 le32_to_cpu(rtlpriv->cfg->ops->
+                                             get_desc((u8 *) entry, true,
+                                                      HW_DESC_TXBUFF_ADDR)),
+                                 skb->len, PCI_DMA_TODEVICE);
+
+                RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
+                         ("new ring->idx:%d, "
+                          "free: skb_queue_len:%d, free: seq:%x\n",
+                          ring->idx,
+                          skb_queue_len(&ring->queue),
+                          *(u16 *) (skb->data + 22)));
+
+                info = IEEE80211_SKB_CB(skb);
+                ieee80211_tx_info_clear_status(info);
+
+                info->flags |= IEEE80211_TX_STAT_ACK;
+                /*info->status.rates[0].count = 1; */
+
+                ieee80211_tx_status_irqsafe(hw, skb);
+
+                if ((ring->entries - skb_queue_len(&ring->queue))
+                                == 2) {
+
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
+                                        ("more desc left, wake"
+                                         "skb_queue@%d,ring->idx = %d,"
+                                         "skb_queue_len = 0x%d\n",
+                                         prio, ring->idx,
+                                         skb_queue_len(&ring->queue)));
+
+                        ieee80211_wake_queue(hw,
+                                        skb_get_queue_mapping
+                                        (skb));
+                }
+
+                skb = NULL;
+        }
+
+        if (((rtlpriv->link_info.num_rx_inperiod +
+                rtlpriv->link_info.num_tx_inperiod) > 8) ||
+                (rtlpriv->link_info.num_rx_inperiod > 2)) {
+                rtl_lps_leave(hw);
+        }
+}
+
+static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
+
+        struct ieee80211_rx_status rx_status = { 0 };
+        unsigned int count = rtlpci->rxringcount;
+        u8 own;
+        u8 tmp_one;
+        u32 bufferaddress;
+        bool unicast = false;
+
+        struct rtl_stats stats = {
+                .signal = 0,
+                .noise = -98,
+                .rate = 0,
+        };
+
+        /*RX NORMAL PKT */
+        while (count--) {
+                /*rx descriptor */
+                struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
+                                rtlpci->rx_ring[rx_queue_idx].idx];
+                /*rx pkt */
+                struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
+                                rtlpci->rx_ring[rx_queue_idx].idx];
+
+                own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
+                                                       false, HW_DESC_OWN);
+
+                if (own) {
+                        /*wait data to be filled by hardware */
+                        return;
+                } else {
+                        struct ieee80211_hdr *hdr;
+                        u16 fc;
+                        struct sk_buff *new_skb = NULL;
+
+                        rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
+                                                         &rx_status,
+                                                         (u8 *) pdesc, skb);
+
+                        pci_unmap_single(rtlpci->pdev,
+                                         *((dma_addr_t *) skb->cb),
+                                         rtlpci->rxbuffersize,
+                                         PCI_DMA_FROMDEVICE);
+
+                        skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
+                                                         false,
+                                                         HW_DESC_RXPKT_LEN));
+                        skb_reserve(skb,
+                                    stats.rx_drvinfo_size + stats.rx_bufshift);
+
+                        /*
+                         *NOTICE This can not be use for mac80211,
+                         *this is done in mac80211 code,
+                         *if you done here sec DHCP will fail
+                         *skb_trim(skb, skb->len - 4);
+                         */
+
+                        hdr = (struct ieee80211_hdr *)(skb->data);
+                        fc = le16_to_cpu(hdr->frame_control);
+
+                        if (!stats.b_crc) {
+                                memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
+                                       sizeof(rx_status));
+
+                                if (is_broadcast_ether_addr(hdr->addr1))
+                                        ;/*TODO*/
+                                else {
+                                        if (is_multicast_ether_addr(hdr->addr1))
+                                                ;/*TODO*/
+                                        else {
+                                                unicast = true;
+                                                rtlpriv->stats.rxbytesunicast +=
+                                                    skb->len;
+                                        }
+                                }
+
+                                rtl_is_special_data(hw, skb, false);
+
+                                if (ieee80211_is_data(fc)) {
+                                        rtlpriv->cfg->ops->led_control(hw,
+                                                               LED_CTL_RX);
+
+                                        if (unicast)
+                                                rtlpriv->link_info.
+                                                    num_rx_inperiod++;
+                                }
+
+                                if (unlikely(!rtl_action_proc(hw, skb, false)))
+                                        dev_kfree_skb_any(skb);
+                                else
+                                        ieee80211_rx_irqsafe(hw, skb);
+                        } else {
+                                dev_kfree_skb_any(skb);
+                        }
+
+                        if (((rtlpriv->link_info.num_rx_inperiod +
+                                rtlpriv->link_info.num_tx_inperiod) > 8) ||
+                                (rtlpriv->link_info.num_rx_inperiod > 2)) {
+                                rtl_lps_leave(hw);
+                        }
+
+                        new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
+                        if (unlikely(!new_skb)) {
+                                RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
+                                         DBG_DMESG,
+                                         ("can't alloc skb for rx\n"));
+                                goto done;
+                        }
+                        skb = new_skb;
+                        /*skb->dev = dev; */
+
+                        rtlpci->rx_ring[rx_queue_idx].rx_buf[rtlpci->
+                                                             rx_ring
+                                                             [rx_queue_idx].
+                                                             idx] = skb;
+                        *((dma_addr_t *) skb->cb) =
+                            pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
+                                           rtlpci->rxbuffersize,
+                                           PCI_DMA_FROMDEVICE);
+
+                }
+done:
+                bufferaddress = cpu_to_le32(*((dma_addr_t *) skb->cb));
+                tmp_one = 1;
+                rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
+                                            HW_DESC_RXBUFF_ADDR,
+                                            (u8 *)&bufferaddress);
+                rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
+                                            (u8 *)&tmp_one);
+                rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
+                                            HW_DESC_RXPKT_LEN,
+                                            (u8 *)&rtlpci->rxbuffersize);
+
+                if (rtlpci->rx_ring[rx_queue_idx].idx ==
+                    rtlpci->rxringcount - 1)
+                        rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
+                                                    HW_DESC_RXERO,
+                                                    (u8 *)&tmp_one);
+
+                rtlpci->rx_ring[rx_queue_idx].idx =
+                    (rtlpci->rx_ring[rx_queue_idx].idx + 1) %
+                    rtlpci->rxringcount;
+        }
+
+}
+
+void _rtl_pci_tx_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        int prio;
+
+        for (prio = 0; prio < RTL_PCI_MAX_TX_QUEUE_COUNT; prio++) {
+                struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
+
+                while (skb_queue_len(&ring->queue)) {
+                        struct rtl_tx_desc *entry = &ring->desc[ring->idx];
+                        struct sk_buff *skb;
+                        struct ieee80211_tx_info *info;
+                        u8 own;
+
+                        /*
+                         *beacon packet will only use the first
+                         *descriptor defautly, and the own may not
+                         *be cleared by the hardware, and
+                         *beacon will free in prepare beacon
+                         */
+                        if (prio == BEACON_QUEUE || prio == TXCMD_QUEUE ||
+                            prio == HCCA_QUEUE)
+                                break;
+
+                        own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)entry,
+                                                               true,
+                                                               HW_DESC_OWN);
+
+                        if (own)
+                                break;
+
+                        skb = __skb_dequeue(&ring->queue);
+                        pci_unmap_single(rtlpci->pdev,
+                                         le32_to_cpu(rtlpriv->cfg->ops->
+                                                     get_desc((u8 *) entry,
+                                                     true,
+                                                     HW_DESC_TXBUFF_ADDR)),
+                                         skb->len, PCI_DMA_TODEVICE);
+
+                        ring->idx = (ring->idx + 1) % ring->entries;
+
+                        info = IEEE80211_SKB_CB(skb);
+                        ieee80211_tx_info_clear_status(info);
+
+                        info->flags |= IEEE80211_TX_STAT_ACK;
+                        /*info->status.rates[0].count = 1; */
+
+                        ieee80211_tx_status_irqsafe(hw, skb);
+
+                        if ((ring->entries - skb_queue_len(&ring->queue))
+                            == 2 && prio != BEACON_QUEUE) {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                         ("more desc left, wake "
+                                          "skb_queue@%d,ring->idx = %d,"
+                                          "skb_queue_len = 0x%d\n",
+                                          prio, ring->idx,
+                                          skb_queue_len(&ring->queue)));
+
+                                ieee80211_wake_queue(hw,
+                                                     skb_get_queue_mapping
+                                                     (skb));
+                        }
+
+                        skb = NULL;
+                }
+        }
+}
+
+static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
+{
+        struct ieee80211_hw *hw = dev_id;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        unsigned long flags;
+        u32 inta = 0;
+        u32 intb = 0;
+
+        if (rtlpci->irq_enabled == 0)
+                return IRQ_HANDLED;
+
+        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
+
+        /*read ISR: 4/8bytes */
+        rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
+
+        /*Shared IRQ or HW disappared */
+        if (!inta || inta == 0xffff)
+                goto done;
+
+        /*<1> beacon related */
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("beacon ok interrupt!\n"));
+        }
+
+        if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("beacon err interrupt!\n"));
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("beacon interrupt!\n"));
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("prepare beacon for interrupt!\n"));
+                tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
+        }
+
+        /*<3> Tx related */
+        if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("Manage ok interrupt!\n"));
+                _rtl_pci_tx_isr(hw, MGNT_QUEUE);
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("HIGH_QUEUE ok interrupt!\n"));
+                _rtl_pci_tx_isr(hw, HIGH_QUEUE);
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
+                rtlpriv->link_info.num_tx_inperiod++;
+
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("BK Tx OK interrupt!\n"));
+                _rtl_pci_tx_isr(hw, BK_QUEUE);
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
+                rtlpriv->link_info.num_tx_inperiod++;
+
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("BE TX OK interrupt!\n"));
+                _rtl_pci_tx_isr(hw, BE_QUEUE);
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
+                rtlpriv->link_info.num_tx_inperiod++;
+
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("VI TX OK interrupt!\n"));
+                _rtl_pci_tx_isr(hw, VI_QUEUE);
+        }
+
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
+                rtlpriv->link_info.num_tx_inperiod++;
+
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
+                         ("Vo TX OK interrupt!\n"));
+                _rtl_pci_tx_isr(hw, VO_QUEUE);
+        }
+
+        /*<2> Rx related */
+        if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
+                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
+                tasklet_schedule(&rtlpriv->works.irq_tasklet);
+        }
+
+        if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("rx descriptor unavailable!\n"));
+                tasklet_schedule(&rtlpriv->works.irq_tasklet);
+        }
+
+        if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
+                tasklet_schedule(&rtlpriv->works.irq_tasklet);
+        }
+
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+        return IRQ_HANDLED;
+
+done:
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+        return IRQ_HANDLED;
+}
+
+static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
+{
+        _rtl_pci_rx_interrupt(hw);
+}
+
+static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[BEACON_QUEUE];
+        struct ieee80211_hdr *hdr = NULL;
+        struct ieee80211_tx_info *info = NULL;
+        struct sk_buff *pskb = NULL;
+        struct rtl_tx_desc *pdesc = NULL;
+        unsigned int queue_index;
+        u8 temp_one = 1;
+
+        ring = &rtlpci->tx_ring[BEACON_QUEUE];
+        pskb = __skb_dequeue(&ring->queue);
+        if (pskb)
+                kfree_skb(pskb);
+
+        /*NB: the beacon data buffer must be 32-bit aligned. */
+        pskb = ieee80211_beacon_get(hw, mac->vif);
+        if (pskb == NULL)
+                return;
+        hdr = (struct ieee80211_hdr *)(pskb->data);
+        info = IEEE80211_SKB_CB(pskb);
+
+        queue_index = BEACON_QUEUE;
+
+        pdesc = &ring->desc[0];
+        rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
+                                        info, pskb, queue_index);
+
+        __skb_queue_tail(&ring->queue, pskb);
+
+        rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
+                                    (u8 *)&temp_one);
+
+        return;
+}
+
+static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 i;
+
+        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
+                rtlpci->txringcount[i] = RT_TXDESC_NUM;
+
+        /*
+         *we just alloc 2 desc for beacon queue,
+         *because we just need first desc in hw beacon.
+         */
+        rtlpci->txringcount[BEACON_QUEUE] = 2;
+
+        /*
+         *BE queue need more descriptor for performance
+         *consideration or, No more tx desc will happen,
+         *and may cause mac80211 mem leakage.
+         */
+        rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
+
+        rtlpci->rxbuffersize = 9100;    /*2048/1024; */
+        rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
+}
+
+static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
+                struct pci_dev *pdev)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        rtlpci->up_first_time = true;
+        rtlpci->being_init_adapter = false;
+
+        rtlhal->hw = hw;
+        rtlpci->pdev = pdev;
+
+        ppsc->b_inactiveps = false;
+        ppsc->b_leisure_ps = true;
+        ppsc->b_fwctrl_lps = true;
+        ppsc->b_reg_fwctrl_lps = 3;
+        ppsc->reg_max_lps_awakeintvl = 5;
+
+        if (ppsc->b_reg_fwctrl_lps == 1)
+                ppsc->fwctrl_psmode = FW_PS_MIN_MODE;
+        else if (ppsc->b_reg_fwctrl_lps == 2)
+                ppsc->fwctrl_psmode = FW_PS_MAX_MODE;
+        else if (ppsc->b_reg_fwctrl_lps == 3)
+                ppsc->fwctrl_psmode = FW_PS_DTIM_MODE;
+
+        /*Tx/Rx related var */
+        _rtl_pci_init_trx_var(hw);
+
+         /*IBSS*/ mac->beacon_interval = 100;
+
+         /*AMPDU*/ mac->min_space_cfg = 0;
+        mac->max_mss_density = 0;
+        /*set sane AMPDU defaults */
+        mac->current_ampdu_density = 7;
+        mac->current_ampdu_factor = 3;
+
+         /*QOS*/ rtlpci->acm_method = eAcmWay2_SW;
+
+        /*task */
+        tasklet_init(&rtlpriv->works.irq_tasklet,
+                     (void (*)(unsigned long))_rtl_pci_irq_tasklet,
+                     (unsigned long)hw);
+        tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
+                     (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
+                     (unsigned long)hw);
+}
+
+static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
+                                 unsigned int prio, unsigned int entries)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_tx_desc *ring;
+        dma_addr_t dma;
+        u32 nextdescaddress;
+        int i;
+
+        ring = pci_alloc_consistent(rtlpci->pdev,
+                                    sizeof(*ring) * entries, &dma);
+
+        if (!ring || (unsigned long)ring & 0xFF) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Cannot allocate TX ring (prio = %d)\n", prio));
+                return -ENOMEM;
+        }
+
+        memset(ring, 0, sizeof(*ring) * entries);
+        rtlpci->tx_ring[prio].desc = ring;
+        rtlpci->tx_ring[prio].dma = dma;
+        rtlpci->tx_ring[prio].idx = 0;
+        rtlpci->tx_ring[prio].entries = entries;
+        skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("queue:%d, ring_addr:%p\n", prio, ring));
+
+        for (i = 0; i < entries; i++) {
+                nextdescaddress = cpu_to_le32((u32) dma +
+                                              ((i + 1) % entries) *
+                                              sizeof(*ring));
+
+                rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
+                                            true, HW_DESC_TX_NEXTDESC_ADDR,
+                                            (u8 *)&nextdescaddress);
+        }
+
+        return 0;
+}
+
+static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_rx_desc *entry = NULL;
+        int i, rx_queue_idx;
+        u8 tmp_one = 1;
+
+        /*
+         *rx_queue_idx 0:RX_MPDU_QUEUE
+         *rx_queue_idx 1:RX_CMD_QUEUE
+         */
+        for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
+             rx_queue_idx++) {
+                rtlpci->rx_ring[rx_queue_idx].desc =
+                    pci_alloc_consistent(rtlpci->pdev,
+                                         sizeof(*rtlpci->rx_ring[rx_queue_idx].
+                                                desc) * rtlpci->rxringcount,
+                                         &rtlpci->rx_ring[rx_queue_idx].dma);
+
+                if (!rtlpci->rx_ring[rx_queue_idx].desc ||
+                    (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Cannot allocate RX ring\n"));
+                        return -ENOMEM;
+                }
+
+                memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
+                       sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
+                       rtlpci->rxringcount);
+
+                rtlpci->rx_ring[rx_queue_idx].idx = 0;
+
+                for (i = 0; i < rtlpci->rxringcount; i++) {
+                        struct sk_buff *skb =
+                            dev_alloc_skb(rtlpci->rxbuffersize);
+                        u32 bufferaddress;
+                        entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
+                        if (!skb)
+                                return 0;
+
+                        /*skb->dev = dev; */
+
+                        rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
+
+                        /*
+                         *just set skb->cb to mapping addr
+                         *for pci_unmap_single use
+                         */
+                        *((dma_addr_t *) skb->cb) =
+                            pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
+                                           rtlpci->rxbuffersize,
+                                           PCI_DMA_FROMDEVICE);
+
+                        bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
+                        rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
+                                                    HW_DESC_RXBUFF_ADDR,
+                                                    (u8 *)&bufferaddress);
+                        rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
+                                                    HW_DESC_RXPKT_LEN,
+                                                    (u8 *)&rtlpci->
+                                                    rxbuffersize);
+                        rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
+                                                    HW_DESC_RXOWN,
+                                                    (u8 *)&tmp_one);
+                }
+
+                rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
+                                            HW_DESC_RXERO, (u8 *)&tmp_one);
+        }
+        return 0;
+}
+
+static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
+                unsigned int prio)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
+
+        while (skb_queue_len(&ring->queue)) {
+                struct rtl_tx_desc *entry = &ring->desc[ring->idx];
+                struct sk_buff *skb = __skb_dequeue(&ring->queue);
+
+                pci_unmap_single(rtlpci->pdev,
+                                 le32_to_cpu(rtlpriv->cfg->
+                                             ops->get_desc((u8 *) entry, true,
+                                                   HW_DESC_TXBUFF_ADDR)),
+                                 skb->len, PCI_DMA_TODEVICE);
+                kfree_skb(skb);
+                ring->idx = (ring->idx + 1) % ring->entries;
+        }
+
+        pci_free_consistent(rtlpci->pdev,
+                            sizeof(*ring->desc) * ring->entries,
+                            ring->desc, ring->dma);
+        ring->desc = NULL;
+}
+
+static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
+{
+        int i, rx_queue_idx;
+
+        /*rx_queue_idx 0:RX_MPDU_QUEUE */
+        /*rx_queue_idx 1:RX_CMD_QUEUE */
+        for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
+             rx_queue_idx++) {
+                for (i = 0; i < rtlpci->rxringcount; i++) {
+                        struct sk_buff *skb =
+                            rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
+                        if (!skb)
+                                continue;
+
+                        pci_unmap_single(rtlpci->pdev,
+                                         *((dma_addr_t *) skb->cb),
+                                         rtlpci->rxbuffersize,
+                                         PCI_DMA_FROMDEVICE);
+                        kfree_skb(skb);
+                }
+
+                pci_free_consistent(rtlpci->pdev,
+                                    sizeof(*rtlpci->rx_ring[rx_queue_idx].
+                                           desc) * rtlpci->rxringcount,
+                                    rtlpci->rx_ring[rx_queue_idx].desc,
+                                    rtlpci->rx_ring[rx_queue_idx].dma);
+                rtlpci->rx_ring[rx_queue_idx].desc = NULL;
+        }
+}
+
+static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        int ret;
+        int i;
+
+        ret = _rtl_pci_init_rx_ring(hw);
+        if (ret)
+                return ret;
+
+        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
+                ret = _rtl_pci_init_tx_ring(hw, i,
+                                 rtlpci->txringcount[i]);
+                if (ret)
+                        goto err_free_rings;
+        }
+
+        return 0;
+
+err_free_rings:
+        _rtl_pci_free_rx_ring(rtlpci);
+
+        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
+                if (rtlpci->tx_ring[i].desc)
+                        _rtl_pci_free_tx_ring(hw, i);
+
+        return 1;
+}
+
+static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u32 i;
+
+        /*free rx rings */
+        _rtl_pci_free_rx_ring(rtlpci);
+
+        /*free tx rings */
+        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
+                _rtl_pci_free_tx_ring(hw, i);
+
+        return 0;
+}
+
+int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        int i, rx_queue_idx;
+        unsigned long flags;
+        u8 tmp_one = 1;
+
+        /*rx_queue_idx 0:RX_MPDU_QUEUE */
+        /*rx_queue_idx 1:RX_CMD_QUEUE */
+        for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
+             rx_queue_idx++) {
+                /*
+                 *force the rx_ring[RX_MPDU_QUEUE/
+                 *RX_CMD_QUEUE].idx to the first one
+                 */
+                if (rtlpci->rx_ring[rx_queue_idx].desc) {
+                        struct rtl_rx_desc *entry = NULL;
+
+                        for (i = 0; i < rtlpci->rxringcount; i++) {
+                                entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
+                                rtlpriv->cfg->ops->set_desc((u8 *) entry,
+                                                            false,
+                                                            HW_DESC_RXOWN,
+                                                            (u8 *)&tmp_one);
+                        }
+                        rtlpci->rx_ring[rx_queue_idx].idx = 0;
+                }
+        }
+
+        /*
+         *after reset, release previous pending packet,
+         *and force the  tx idx to the first one
+         */
+        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
+        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
+                if (rtlpci->tx_ring[i].desc) {
+                        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
+
+                        while (skb_queue_len(&ring->queue)) {
+                                struct rtl_tx_desc *entry =
+                                    &ring->desc[ring->idx];
+                                struct sk_buff *skb =
+                                    __skb_dequeue(&ring->queue);
+
+                                pci_unmap_single(rtlpci->pdev,
+                                                 le32_to_cpu(rtlpriv->cfg->ops->
+                                                         get_desc((u8 *)
+                                                         entry,
+                                                         true,
+                                                         HW_DESC_TXBUFF_ADDR)),
+                                                 skb->len, PCI_DMA_TODEVICE);
+                                kfree_skb(skb);
+                                ring->idx = (ring->idx + 1) % ring->entries;
+                        }
+                        ring->idx = 0;
+                }
+        }
+
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+
+        return 0;
+}
+
+unsigned int _rtl_mac_to_hwqueue(u16 fc,
+                unsigned int mac80211_queue_index)
+{
+        unsigned int hw_queue_index;
+
+        if (unlikely(ieee80211_is_beacon(fc))) {
+                hw_queue_index = BEACON_QUEUE;
+                goto out;
+        }
+
+        if (ieee80211_is_mgmt(fc)) {
+                hw_queue_index = MGNT_QUEUE;
+                goto out;
+        }
+
+        switch (mac80211_queue_index) {
+        case 0:
+                hw_queue_index = VO_QUEUE;
+                break;
+        case 1:
+                hw_queue_index = VI_QUEUE;
+                break;
+        case 2:
+                hw_queue_index = BE_QUEUE;;
+                break;
+        case 3:
+                hw_queue_index = BK_QUEUE;
+                break;
+        default:
+                hw_queue_index = BE_QUEUE;
+                RT_ASSERT(false, ("QSLT_BE queue, skb_queue:%d\n",
+                                  mac80211_queue_index));
+                break;
+        }
+
+out:
+        return hw_queue_index;
+}
+
+int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        struct rtl8192_tx_ring *ring;
+        struct rtl_tx_desc *pdesc;
+        u8 idx;
+        unsigned int queue_index, hw_queue;
+        unsigned long flags;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        u16 fc = le16_to_cpu(hdr->frame_control);
+        u8 *pda_addr = hdr->addr1;
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        /*ssn */
+        u8 *qc = NULL;
+        u8 tid = 0;
+        u16 seq_number = 0;
+        u8 own;
+        u8 temp_one = 1;
+
+        if (ieee80211_is_mgmt(fc))
+                rtl_tx_mgmt_proc(hw, skb);
+        rtl_action_proc(hw, skb, true);
+
+        queue_index = skb_get_queue_mapping(skb);
+        hw_queue = _rtl_mac_to_hwqueue(fc, queue_index);
+
+        if (is_multicast_ether_addr(pda_addr))
+                rtlpriv->stats.txbytesmulticast += skb->len;
+        else if (is_broadcast_ether_addr(pda_addr))
+                rtlpriv->stats.txbytesbroadcast += skb->len;
+        else
+                rtlpriv->stats.txbytesunicast += skb->len;
+
+        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
+
+        ring = &rtlpci->tx_ring[hw_queue];
+        if (hw_queue != BEACON_QUEUE)
+                idx = (ring->idx + skb_queue_len(&ring->queue)) %
+                                ring->entries;
+        else
+                idx = 0;
+
+        pdesc = &ring->desc[idx];
+        own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
+                        true, HW_DESC_OWN);
+
+        if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("No more TX desc@%d, ring->idx = %d,"
+                          "idx = %d, skb_queue_len = 0x%d\n",
+                          hw_queue, ring->idx, idx,
+                          skb_queue_len(&ring->queue)));
+
+                spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+                return skb->len;
+        }
+
+        /*
+         *if(ieee80211_is_nullfunc(fc)) {
+         *      spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+         *      return 1;
+         *}
+         */
+
+        if (ieee80211_is_data_qos(fc)) {
+                qc = ieee80211_get_qos_ctl(hdr);
+                tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
+
+                seq_number = mac->tids[tid].seq_number;
+                seq_number &= IEEE80211_SCTL_SEQ;
+                /*
+                 *hdr->seq_ctrl = hdr->seq_ctrl &
+                 *cpu_to_le16(IEEE80211_SCTL_FRAG);
+                 *hdr->seq_ctrl |= cpu_to_le16(seq_number);
+                 */
+
+                seq_number += 1;
+        }
+
+        if (ieee80211_is_data(fc))
+                rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
+
+        rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
+                                        info, skb, hw_queue);
+
+        __skb_queue_tail(&ring->queue, skb);
+
+        rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true,
+                                    HW_DESC_OWN, (u8 *)&temp_one);
+
+        if (!ieee80211_has_morefrags(hdr->frame_control)) {
+                if (qc)
+                        mac->tids[tid].seq_number = seq_number;
+        }
+
+        if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
+            hw_queue != BEACON_QUEUE) {
+
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
+                         ("less desc left, stop skb_queue@%d, "
+                          "ring->idx = %d,"
+                          "idx = %d, skb_queue_len = 0x%d\n",
+                          hw_queue, ring->idx, idx,
+                          skb_queue_len(&ring->queue)));
+
+                ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
+        }
+
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+
+        rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
+
+        return 0;
+}
+
+void rtl_pci_deinit(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        _rtl_pci_deinit_trx_ring(hw);
+
+        synchronize_irq(rtlpci->pdev->irq);
+        tasklet_kill(&rtlpriv->works.irq_tasklet);
+
+        flush_workqueue(rtlpriv->works.rtl_wq);
+        destroy_workqueue(rtlpriv->works.rtl_wq);
+
+}
+
+int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int err;
+
+        _rtl_pci_init_struct(hw, pdev);
+
+        err = _rtl_pci_init_trx_ring(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("tx ring initialization failed"));
+                return err;
+        }
+
+        return 1;
+}
+
+int rtl_pci_start(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        int err;
+
+        rtl_pci_reset_trx_ring(hw);
+
+        rtlpci->driver_is_goingto_unload = false;
+        err = rtlpriv->cfg->ops->hw_init(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("Failed to config hardware!\n"));
+                return err;
+        }
+
+        rtlpriv->cfg->ops->enable_interrupt(hw);
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
+
+        rtl_init_rx_config(hw);
+
+        /*should after adapter start and interrupt enable. */
+        set_hal_start(rtlhal);
+
+        RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+
+        rtlpci->up_first_time = false;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
+        return 0;
+}
+
+void rtl_pci_stop(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        unsigned long flags;
+        u8 RFInProgressTimeOut = 0;
+
+        /*
+         *should before disable interrrupt&adapter
+         *and will do it immediately.
+         */
+        set_hal_stop(rtlhal);
+
+        rtlpriv->cfg->ops->disable_interrupt(hw);
+
+        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
+        while (ppsc->rfchange_inprogress) {
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
+                if (RFInProgressTimeOut > 100) {
+                        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
+                        break;
+                }
+                mdelay(1);
+                RFInProgressTimeOut++;
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
+        }
+        ppsc->rfchange_inprogress = true;
+        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
+
+        rtlpci->driver_is_goingto_unload = true;
+        rtlpriv->cfg->ops->hw_disable(hw);
+        rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
+
+        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
+        ppsc->rfchange_inprogress = false;
+        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
+
+        rtl_pci_enable_aspm(hw);
+}
+
+static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
+                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct pci_dev *bridge_pdev = pdev->bus->self;
+        u16 venderid;
+        u16 deviceid;
+        u8 revisionid;
+        u16 irqline;
+        u8 tmp;
+
+        venderid = pdev->vendor;
+        deviceid = pdev->device;
+        pci_read_config_byte(pdev, 0x8, &revisionid);
+        pci_read_config_word(pdev, 0x3C, &irqline);
+
+        if (deviceid == RTL_PCI_8192_DID ||
+            deviceid == RTL_PCI_0044_DID ||
+            deviceid == RTL_PCI_0047_DID ||
+            deviceid == RTL_PCI_8192SE_DID ||
+            deviceid == RTL_PCI_8174_DID ||
+            deviceid == RTL_PCI_8173_DID ||
+            deviceid == RTL_PCI_8172_DID ||
+            deviceid == RTL_PCI_8171_DID) {
+                switch (revisionid) {
+                case RTL_PCI_REVISION_ID_8192PCIE:
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                                 ("8192 PCI-E is found - "
+                                  "vid/did=%x/%x\n", venderid, deviceid));
+                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
+                        break;
+                case RTL_PCI_REVISION_ID_8192SE:
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                                 ("8192SE is found - "
+                                  "vid/did=%x/%x\n", venderid, deviceid));
+                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                 ("Err: Unknown device - "
+                                  "vid/did=%x/%x\n", venderid, deviceid));
+                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
+                        break;
+
+                }
+        } else if (deviceid == RTL_PCI_8192CET_DID ||
+                   deviceid == RTL_PCI_8192CE_DID ||
+                   deviceid == RTL_PCI_8191CE_DID ||
+                   deviceid == RTL_PCI_8188CE_DID) {
+                rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("8192C PCI-E is found - "
+                          "vid/did=%x/%x\n", venderid, deviceid));
+        } else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Err: Unknown device -"
+                          " vid/did=%x/%x\n", venderid, deviceid));
+
+                rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
+        }
+
+        /*find bus info */
+        pcipriv->ndis_adapter.busnumber = pdev->bus->number;
+        pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
+        pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
+
+        /*find bridge info */
+        pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
+        for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
+                if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
+                        pcipriv->ndis_adapter.pcibridge_vendor = tmp;
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                                 ("Pci Bridge Vendor is found index: %d\n",
+                                  tmp));
+                        break;
+                }
+        }
+
+        if (pcipriv->ndis_adapter.pcibridge_vendor !=
+                PCI_BRIDGE_VENDOR_UNKNOWN) {
+                pcipriv->ndis_adapter.pcibridge_busnum =
+                    bridge_pdev->bus->number;
+                pcipriv->ndis_adapter.pcibridge_devnum =
+                    PCI_SLOT(bridge_pdev->devfn);
+                pcipriv->ndis_adapter.pcibridge_funcnum =
+                    PCI_FUNC(bridge_pdev->devfn);
+                pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
+                    bridge_pdev->pcie_cap;
+                pcipriv->ndis_adapter.pcicfg_addrport =
+                    (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
+                    (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
+                    (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
+                pcipriv->ndis_adapter.num4bytes =
+                    (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
+
+                rtl_pci_get_linkcontrol_field(hw);
+
+                if (pcipriv->ndis_adapter.pcibridge_vendor ==
+                    PCI_BRIDGE_VENDOR_AMD) {
+                        pcipriv->ndis_adapter.amd_l1_patch =
+                            rtl_pci_get_amd_l1_patch(hw);
+                }
+        }
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("pcidev busnumber:devnumber:funcnumber:"
+                  "vendor:link_ctl %d:%d:%d:%x:%x\n",
+                  pcipriv->ndis_adapter.busnumber,
+                  pcipriv->ndis_adapter.devnumber,
+                  pcipriv->ndis_adapter.funcnumber,
+                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
+                  "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
+                  pcipriv->ndis_adapter.pcibridge_busnum,
+                  pcipriv->ndis_adapter.pcibridge_devnum,
+                  pcipriv->ndis_adapter.pcibridge_funcnum,
+                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
+                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
+                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
+                  pcipriv->ndis_adapter.amd_l1_patch));
+
+        rtl_pci_parse_configuration(pdev, hw);
+
+        return true;
+}
+
+int __devinit rtl_pci_probe(struct pci_dev *pdev,
+                            const struct pci_device_id *id)
+{
+        struct ieee80211_hw *hw = NULL;
+
+        struct rtl_priv *rtlpriv = NULL;
+        struct rtl_pci_priv *pcipriv = NULL;
+        struct rtl_pci *rtlpci;
+        unsigned long pmem_start, pmem_len, pmem_flags;
+        int err;
+
+        err = pci_enable_device(pdev);
+        if (err) {
+                RT_ASSERT(false,
+                          ("%s : Cannot enable new PCI device\n",
+                           pci_name(pdev)));
+                return err;
+        }
+
+        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+                if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
+                        RT_ASSERT(false, ("Unable to obtain 32bit DMA "
+                                          "for consistent allocations\n"));
+                        pci_disable_device(pdev);
+                        return -ENOMEM;
+                }
+        }
+
+        pci_set_master(pdev);
+
+        hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
+                                sizeof(struct rtl_priv), &rtl_ops);
+        if (!hw) {
+                RT_ASSERT(false,
+                          ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
+                err = -ENOMEM;
+                goto fail1;
+        }
+
+        SET_IEEE80211_DEV(hw, &pdev->dev);
+        pci_set_drvdata(pdev, hw);
+
+        rtlpriv = hw->priv;
+        pcipriv = (void *)rtlpriv->priv;
+        pcipriv->dev.pdev = pdev;
+
+        /*
+         *init dbgp flags before all
+         *other functions, because we will
+         *use it in other funtions like
+         *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
+         *you can not use these macro
+         *before this
+         */
+        rtl_dbgp_flag_init(hw);
+
+        /* MEM map */
+        err = pci_request_regions(pdev, KBUILD_MODNAME);
+        if (err) {
+                RT_ASSERT(false, ("Can't obtain PCI resources\n"));
+                return err;
+        }
+
+        pmem_start = pci_resource_start(pdev, 2);
+        pmem_len = pci_resource_len(pdev, 2);
+        pmem_flags = pci_resource_flags(pdev, 2);
+
+        /*shared mem start */
+        rtlpriv->io.pci_mem_start =
+                        (unsigned long)pci_iomap(pdev, 2, pmem_len);
+        if (rtlpriv->io.pci_mem_start == 0) {
+                RT_ASSERT(false, ("Can't map PCI mem\n"));
+                goto fail2;
+        }
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("mem mapped space: start: 0x%08lx len:%08lx "
+                  "flags:%08lx, after map:0x%08lx\n",
+                  pmem_start, pmem_len, pmem_flags,
+                  rtlpriv->io.pci_mem_start));
+
+        /* Disable Clk Request */
+        pci_write_config_byte(pdev, 0x81, 0);
+        /* leave D3 mode */
+        pci_write_config_byte(pdev, 0x44, 0);
+        pci_write_config_byte(pdev, 0x04, 0x06);
+        pci_write_config_byte(pdev, 0x04, 0x07);
+
+        /* init cfg & intf_ops */
+        rtlpriv->rtlhal.interface = INTF_PCI;
+        rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
+        rtlpriv->intf_ops = &rtl_pci_ops;
+
+        /* find adapter */
+        _rtl_pci_find_adapter(pdev, hw);
+
+        /* Init IO handler */
+        _rtl_pci_io_handler_init(&pdev->dev, hw);
+
+        /*like read eeprom and so on */
+        rtlpriv->cfg->ops->read_eeprom_info(hw);
+
+        if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't init_sw_vars.\n"));
+                goto fail3;
+        }
+
+        rtlpriv->cfg->ops->init_sw_leds(hw);
+
+        /*aspm */
+        rtl_pci_init_aspm(hw);
+
+        /* Init mac80211 sw */
+        err = rtl_init_core(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't allocate sw for mac80211.\n"));
+                goto fail3;
+        }
+
+        /* Init PCI sw */
+        err = !rtl_pci_init(hw, pdev);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Failed to init PCI.\n"));
+                goto fail3;
+        }
+
+        err = ieee80211_register_hw(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't register mac80211 hw.\n"));
+                goto fail3;
+        } else {
+                rtlpriv->mac80211.mac80211_registered = 1;
+        }
+
+        err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("failed to create sysfs device attributes\n"));
+                goto fail3;
+        }
+
+        /*init rfkill */
+        rtl_init_rfkill(hw);
+
+        rtlpci = rtl_pcidev(pcipriv);
+        err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
+                          IRQF_SHARED, KBUILD_MODNAME, hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("%s: failed to register IRQ handler\n",
+                          wiphy_name(hw->wiphy)));
+                goto fail3;
+        } else {
+                rtlpci->irq_alloc = 1;
+        }
+
+        set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
+        return 0;
+
+fail3:
+        pci_set_drvdata(pdev, NULL);
+        rtl_deinit_core(hw);
+        _rtl_pci_io_handler_release(hw);
+        ieee80211_free_hw(hw);
+
+        if (rtlpriv->io.pci_mem_start != 0)
+                pci_iounmap(pdev, (void *)rtlpriv->io.pci_mem_start);
+
+fail2:
+        pci_release_regions(pdev);
+
+fail1:
+
+        pci_disable_device(pdev);
+
+        return -ENODEV;
+
+}
+EXPORT_SYMBOL(rtl_pci_probe);
+
+void rtl_pci_disconnect(struct pci_dev *pdev)
+{
+        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
+        struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
+
+        clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
+
+        sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
+
+        /*ieee80211_unregister_hw will call ops_stop */
+        if (rtlmac->mac80211_registered == 1) {
+                ieee80211_unregister_hw(hw);
+                rtlmac->mac80211_registered = 0;
+        } else {
+                rtl_deinit_deferred_work(hw);
+                rtlpriv->intf_ops->adapter_stop(hw);
+        }
+
+        /*deinit rfkill */
+        rtl_deinit_rfkill(hw);
+
+        rtl_pci_deinit(hw);
+        rtl_deinit_core(hw);
+        rtlpriv->cfg->ops->deinit_sw_leds(hw);
+        _rtl_pci_io_handler_release(hw);
+        rtlpriv->cfg->ops->deinit_sw_vars(hw);
+
+        if (rtlpci->irq_alloc) {
+                free_irq(rtlpci->pdev->irq, hw);
+                rtlpci->irq_alloc = 0;
+        }
+
+        if (rtlpriv->io.pci_mem_start != 0) {
+                pci_iounmap(pdev, (void *)rtlpriv->io.pci_mem_start);
+                pci_release_regions(pdev);
+        }
+
+        pci_disable_device(pdev);
+        pci_set_drvdata(pdev, NULL);
+
+        ieee80211_free_hw(hw);
+}
+EXPORT_SYMBOL(rtl_pci_disconnect);
+
+/***************************************
+kernel pci power state define:
+PCI_D0         ((pci_power_t __force) 0)
+PCI_D1         ((pci_power_t __force) 1)
+PCI_D2         ((pci_power_t __force) 2)
+PCI_D3hot      ((pci_power_t __force) 3)
+PCI_D3cold     ((pci_power_t __force) 4)
+PCI_UNKNOWN    ((pci_power_t __force) 5)
+
+This function is called when system
+goes into suspend state mac80211 will
+call rtl_mac_stop() from the mac80211
+suspend function first, So there is
+no need to call hw_disable here.
+****************************************/
+int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        pci_save_state(pdev);
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, PCI_D3hot);
+
+        return 0;
+}
+EXPORT_SYMBOL(rtl_pci_suspend);
+
+int rtl_pci_resume(struct pci_dev *pdev)
+{
+        int ret;
+
+        pci_set_power_state(pdev, PCI_D0);
+        ret = pci_enable_device(pdev);
+        if (ret) {
+                RT_ASSERT(false, ("ERR: <======\n"));
+                return ret;
+        }
+
+        pci_restore_state(pdev);
+
+        return 0;
+}
+EXPORT_SYMBOL(rtl_pci_resume);
+
+struct rtl_intf_ops rtl_pci_ops = {
+        .adapter_start = rtl_pci_start,
+        .adapter_stop = rtl_pci_stop,
+        .adapter_tx = rtl_pci_tx,
+        .reset_trx_ring = rtl_pci_reset_trx_ring,
+
+        .disable_aspm = rtl_pci_disable_aspm,
+        .enable_aspm = rtl_pci_enable_aspm,
+};
diff --git a/drivers/net/wireless/rtlwifi/pci.h b/drivers/net/wireless/rtlwifi/pci.h
new file mode 100644
index 000000000000..d36a66939958
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/pci.h
@@ -0,0 +1,302 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_PCI_H__
+#define __RTL_PCI_H__
+
+#include <linux/pci.h>
+/*
+1: MSDU packet queue,
+2: Rx Command Queue
+*/
+#define RTL_PCI_RX_MPDU_QUEUE                   0
+#define RTL_PCI_RX_CMD_QUEUE                    1
+#define RTL_PCI_MAX_RX_QUEUE                    2
+
+#define RTL_PCI_MAX_RX_COUNT                    64
+#define RTL_PCI_MAX_TX_QUEUE_COUNT              9
+
+#define RT_TXDESC_NUM                           128
+#define RT_TXDESC_NUM_BE_QUEUE                  256
+
+#define BK_QUEUE                                0
+#define BE_QUEUE                                1
+#define VI_QUEUE                                2
+#define VO_QUEUE                                3
+#define BEACON_QUEUE                            4
+#define TXCMD_QUEUE                             5
+#define MGNT_QUEUE                              6
+#define HIGH_QUEUE                              7
+#define HCCA_QUEUE                              8
+
+#define RTL_PCI_DEVICE(vend, dev, cfg)  \
+        .vendor = (vend), \
+        .device = (dev), \
+        .subvendor = PCI_ANY_ID, \
+        .subdevice = PCI_ANY_ID,\
+        .driver_data = (kernel_ulong_t)&(cfg)
+
+#define INTEL_VENDOR_ID                         0x8086
+#define SIS_VENDOR_ID                           0x1039
+#define ATI_VENDOR_ID                           0x1002
+#define ATI_DEVICE_ID                           0x7914
+#define AMD_VENDOR_ID                           0x1022
+
+#define PCI_MAX_BRIDGE_NUMBER                   255
+#define PCI_MAX_DEVICES                         32
+#define PCI_MAX_FUNCTION                        8
+
+#define PCI_CONF_ADDRESS        0x0CF8  /*PCI Configuration Space Address */
+#define PCI_CONF_DATA           0x0CFC  /*PCI Configuration Space Data */
+
+#define PCI_CLASS_BRIDGE_DEV            0x06
+#define PCI_SUBCLASS_BR_PCI_TO_PCI      0x04
+#define PCI_CAPABILITY_ID_PCI_EXPRESS   0x10
+#define PCI_CAP_ID_EXP                  0x10
+
+#define U1DONTCARE                      0xFF
+#define U2DONTCARE                      0xFFFF
+#define U4DONTCARE                      0xFFFFFFFF
+
+#define RTL_PCI_8192_DID        0x8192  /*8192 PCI-E */
+#define RTL_PCI_8192SE_DID      0x8192  /*8192 SE */
+#define RTL_PCI_8174_DID        0x8174  /*8192 SE */
+#define RTL_PCI_8173_DID        0x8173  /*8191 SE Crab */
+#define RTL_PCI_8172_DID        0x8172  /*8191 SE RE */
+#define RTL_PCI_8171_DID        0x8171  /*8191 SE Unicron */
+#define RTL_PCI_0045_DID        0x0045  /*8190 PCI for Ceraga */
+#define RTL_PCI_0046_DID        0x0046  /*8190 Cardbus for Ceraga */
+#define RTL_PCI_0044_DID        0x0044  /*8192e PCIE for Ceraga */
+#define RTL_PCI_0047_DID        0x0047  /*8192e Express Card for Ceraga */
+#define RTL_PCI_700F_DID        0x700F
+#define RTL_PCI_701F_DID        0x701F
+#define RTL_PCI_DLINK_DID       0x3304
+#define RTL_PCI_8192CET_DID     0x8191  /*8192ce */
+#define RTL_PCI_8192CE_DID      0x8178  /*8192ce */
+#define RTL_PCI_8191CE_DID      0x8177  /*8192ce */
+#define RTL_PCI_8188CE_DID      0x8176  /*8192ce */
+#define RTL_PCI_8192CU_DID      0x8191  /*8192ce */
+#define RTL_PCI_8192DE_DID      0x092D  /*8192ce */
+#define RTL_PCI_8192DU_DID      0x092D  /*8192ce */
+
+/*8192 support 16 pages of IO registers*/
+#define RTL_MEM_MAPPED_IO_RANGE_8190PCI         0x1000
+#define RTL_MEM_MAPPED_IO_RANGE_8192PCIE        0x4000
+#define RTL_MEM_MAPPED_IO_RANGE_8192SE          0x4000
+#define RTL_MEM_MAPPED_IO_RANGE_8192CE          0x4000
+#define RTL_MEM_MAPPED_IO_RANGE_8192DE          0x4000
+
+#define RTL_PCI_REVISION_ID_8190PCI             0x00
+#define RTL_PCI_REVISION_ID_8192PCIE            0x01
+#define RTL_PCI_REVISION_ID_8192SE              0x10
+#define RTL_PCI_REVISION_ID_8192CE              0x1
+#define RTL_PCI_REVISION_ID_8192DE              0x0
+
+#define RTL_DEFAULT_HARDWARE_TYPE       HARDWARE_TYPE_RTL8192CE
+
+enum pci_bridge_vendor {
+        PCI_BRIDGE_VENDOR_INTEL = 0x0,  /*0b'0000,0001 */
+        PCI_BRIDGE_VENDOR_ATI,          /*0b'0000,0010*/
+        PCI_BRIDGE_VENDOR_AMD,          /*0b'0000,0100*/
+        PCI_BRIDGE_VENDOR_SIS,          /*0b'0000,1000*/
+        PCI_BRIDGE_VENDOR_UNKNOWN,      /*0b'0100,0000*/
+        PCI_BRIDGE_VENDOR_MAX,
+};
+
+struct rtl_rx_desc {
+        u32 dword[8];
+} __packed;
+
+struct rtl_tx_desc {
+        u32 dword[16];
+} __packed;
+
+struct rtl_tx_cmd_desc {
+        u32 dword[16];
+} __packed;
+
+struct rtl8192_tx_ring {
+        struct rtl_tx_desc *desc;
+        dma_addr_t dma;
+        unsigned int idx;
+        unsigned int entries;
+        struct sk_buff_head queue;
+};
+
+struct rtl8192_rx_ring {
+        struct rtl_rx_desc *desc;
+        dma_addr_t dma;
+        unsigned int idx;
+        struct sk_buff *rx_buf[RTL_PCI_MAX_RX_COUNT];
+};
+
+struct rtl_pci {
+        struct pci_dev *pdev;
+
+        bool driver_is_goingto_unload;
+        bool up_first_time;
+        bool being_init_adapter;
+        bool irq_enabled;
+
+        /*Tx */
+        struct rtl8192_tx_ring tx_ring[RTL_PCI_MAX_TX_QUEUE_COUNT];
+        int txringcount[RTL_PCI_MAX_TX_QUEUE_COUNT];
+        u32 transmit_config;
+
+        /*Rx */
+        struct rtl8192_rx_ring rx_ring[RTL_PCI_MAX_RX_QUEUE];
+        int rxringcount;
+        u16 rxbuffersize;
+        u32 receive_config;
+
+        /*irq */
+        u8 irq_alloc;
+        u32 irq_mask[2];
+
+        /*Bcn control register setting */
+        u32 reg_bcn_ctrl_val;
+
+         /*ASPM*/ u8 const_pci_aspm;
+        u8 const_amdpci_aspm;
+        u8 const_hwsw_rfoff_d3;
+        u8 const_support_pciaspm;
+        /*pci-e bridge */
+        u8 const_hostpci_aspm_setting;
+        /*pci-e device */
+        u8 const_devicepci_aspm_setting;
+        /*If it supports ASPM, Offset[560h] = 0x40,
+           otherwise Offset[560h] = 0x00. */
+        bool b_support_aspm;
+        bool b_support_backdoor;
+
+        /*QOS & EDCA */
+        enum acm_method acm_method;
+};
+
+struct mp_adapter {
+        u8 linkctrl_reg;
+
+        u8 busnumber;
+        u8 devnumber;
+        u8 funcnumber;
+
+        u8 pcibridge_busnum;
+        u8 pcibridge_devnum;
+        u8 pcibridge_funcnum;
+
+        u8 pcibridge_vendor;
+        u16 pcibridge_vendorid;
+        u16 pcibridge_deviceid;
+
+        u32 pcicfg_addrport;
+        u8 num4bytes;
+
+        u8 pcibridge_pciehdr_offset;
+        u8 pcibridge_linkctrlreg;
+
+        bool amd_l1_patch;
+};
+
+struct rtl_pci_priv {
+        struct rtl_pci dev;
+        struct mp_adapter ndis_adapter;
+        struct rtl_led_ctl ledctl;
+};
+
+#define rtl_pcipriv(hw)         (((struct rtl_pci_priv *)(rtl_priv(hw))->priv))
+#define rtl_pcidev(pcipriv)     (&((pcipriv)->dev))
+
+int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw);
+
+extern struct rtl_intf_ops rtl_pci_ops;
+
+int __devinit rtl_pci_probe(struct pci_dev *pdev,
+                            const struct pci_device_id *id);
+void rtl_pci_disconnect(struct pci_dev *pdev);
+int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state);
+int rtl_pci_resume(struct pci_dev *pdev);
+
+static inline u8 pci_read8_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return 0xff & readb((u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline u16 pci_read16_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return readw((u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline u32 pci_read32_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return readl((u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline void pci_write8_async(struct rtl_priv *rtlpriv, u32 addr, u8 val)
+{
+        writeb(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline void pci_write16_async(struct rtl_priv *rtlpriv,
+                                     u32 addr, u16 val)
+{
+        writew(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline void pci_write32_async(struct rtl_priv *rtlpriv,
+                                     u32 addr, u32 val)
+{
+        writel(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+}
+
+static inline void rtl_pci_raw_write_port_ulong(u32 port, u32 val)
+{
+        outl(val, port);
+}
+
+static inline void rtl_pci_raw_write_port_uchar(u32 port, u8 val)
+{
+        outb(val, port);
+}
+
+static inline void rtl_pci_raw_read_port_uchar(u32 port, u8 *pval)
+{
+        *pval = inb(port);
+}
+
+static inline void rtl_pci_raw_read_port_ushort(u32 port, u16 *pval)
+{
+        *pval = inw(port);
+}
+
+static inline void rtl_pci_raw_read_port_ulong(u32 port, u32 *pval)
+{
+        *pval = inl(port);
+}
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/ps.c b/drivers/net/wireless/rtlwifi/ps.c
new file mode 100644
index 000000000000..d2326c13449e
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/ps.c
@@ -0,0 +1,493 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "base.h"
+#include "ps.h"
+
+bool rtl_ps_enable_nic(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool init_status = true;
+
+        /*<1> reset trx ring */
+        if (rtlhal->interface == INTF_PCI)
+                rtlpriv->intf_ops->reset_trx_ring(hw);
+
+        if (is_hal_stop(rtlhal))
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Driver is already down!\n"));
+
+        /*<2> Enable Adapter */
+        rtlpriv->cfg->ops->hw_init(hw);
+        RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+        /*init_status = false; */
+
+        /*<3> Enable Interrupt */
+        rtlpriv->cfg->ops->enable_interrupt(hw);
+
+        /*<enable timer> */
+        rtl_watch_dog_timer_callback((unsigned long)hw);
+
+        return init_status;
+}
+EXPORT_SYMBOL(rtl_ps_enable_nic);
+
+bool rtl_ps_disable_nic(struct ieee80211_hw *hw)
+{
+        bool status = true;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /*<1> Stop all timer */
+        rtl_deinit_deferred_work(hw);
+
+        /*<2> Disable Interrupt */
+        rtlpriv->cfg->ops->disable_interrupt(hw);
+
+        /*<3> Disable Adapter */
+        rtlpriv->cfg->ops->hw_disable(hw);
+
+        return status;
+}
+EXPORT_SYMBOL(rtl_ps_disable_nic);
+
+bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
+                         enum rf_pwrstate state_toset,
+                         u32 changesource, bool protect_or_not)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        enum rf_pwrstate rtstate;
+        bool b_actionallowed = false;
+        u16 rfwait_cnt = 0;
+        unsigned long flag;
+
+        /*protect_or_not = true; */
+
+        if (protect_or_not)
+                goto no_protect;
+
+        /*
+         *Only one thread can change
+         *the RF state at one time, and others
+         *should wait to be executed.
+         */
+        while (true) {
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                if (ppsc->rfchange_inprogress) {
+                        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock,
+                                               flag);
+
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                 ("RF Change in progress!"
+                                  "Wait to set..state_toset(%d).\n",
+                                  state_toset));
+
+                        /* Set RF after the previous action is done.  */
+                        while (ppsc->rfchange_inprogress) {
+                                rfwait_cnt++;
+                                mdelay(1);
+
+                                /*
+                                 *Wait too long, return false to avoid
+                                 *to be stuck here.
+                                 */
+                                if (rfwait_cnt > 100)
+                                        return false;
+                        }
+                } else {
+                        ppsc->rfchange_inprogress = true;
+                        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock,
+                                               flag);
+                        break;
+                }
+        }
+
+no_protect:
+        rtstate = ppsc->rfpwr_state;
+
+        switch (state_toset) {
+        case ERFON:
+                ppsc->rfoff_reason &= (~changesource);
+
+                if ((changesource == RF_CHANGE_BY_HW) &&
+                    (ppsc->b_hwradiooff == true)) {
+                        ppsc->b_hwradiooff = false;
+                }
+
+                if (!ppsc->rfoff_reason) {
+                        ppsc->rfoff_reason = 0;
+                        b_actionallowed = true;
+                }
+
+                break;
+
+        case ERFOFF:
+
+                if ((changesource == RF_CHANGE_BY_HW)
+                    && (ppsc->b_hwradiooff == false)) {
+                        ppsc->b_hwradiooff = true;
+                }
+
+                ppsc->rfoff_reason |= changesource;
+                b_actionallowed = true;
+                break;
+
+        case ERFSLEEP:
+                ppsc->rfoff_reason |= changesource;
+                b_actionallowed = true;
+                break;
+
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+
+        if (b_actionallowed)
+                rtlpriv->cfg->ops->set_rf_power_state(hw, state_toset);
+
+        if (!protect_or_not) {
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        }
+
+        return b_actionallowed;
+}
+EXPORT_SYMBOL(rtl_ps_set_rf_state);
+
+static void _rtl_ps_inactive_ps(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        ppsc->b_swrf_processing = true;
+
+        if (ppsc->inactive_pwrstate == ERFON && rtlhal->interface == INTF_PCI) {
+                if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) &&
+                    RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM) &&
+                    rtlhal->interface == INTF_PCI) {
+                        rtlpriv->intf_ops->disable_aspm(hw);
+                        RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                }
+        }
+
+        rtl_ps_set_rf_state(hw, ppsc->inactive_pwrstate,
+                            RF_CHANGE_BY_IPS, false);
+
+        if (ppsc->inactive_pwrstate == ERFOFF &&
+            rtlhal->interface == INTF_PCI) {
+                if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) {
+                        rtlpriv->intf_ops->enable_aspm(hw);
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                }
+        }
+
+        ppsc->b_swrf_processing = false;
+}
+
+void rtl_ips_nic_off_wq_callback(void *data)
+{
+        struct rtl_works *rtlworks =
+            container_of_dwork_rtl(data, struct rtl_works, ips_nic_off_wq);
+        struct ieee80211_hw *hw = rtlworks->hw;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        enum rf_pwrstate rtstate;
+
+        if (mac->opmode != NL80211_IFTYPE_STATION) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("not station return\n"));
+                return;
+        }
+
+        if (is_hal_stop(rtlhal))
+                return;
+
+        if (rtlpriv->sec.being_setkey)
+                return;
+
+        if (ppsc->b_inactiveps) {
+                rtstate = ppsc->rfpwr_state;
+
+                /*
+                 *Do not enter IPS in the following conditions:
+                 *(1) RF is already OFF or Sleep
+                 *(2) b_swrf_processing (indicates the IPS is still under going)
+                 *(3) Connectted (only disconnected can trigger IPS)
+                 *(4) IBSS (send Beacon)
+                 *(5) AP mode (send Beacon)
+                 *(6) monitor mode (rcv packet)
+                 */
+
+                if (rtstate == ERFON &&
+                    !ppsc->b_swrf_processing &&
+                    (mac->link_state == MAC80211_NOLINK) &&
+                    !mac->act_scanning) {
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
+                                 ("IPSEnter(): Turn off RF.\n"));
+
+                        ppsc->inactive_pwrstate = ERFOFF;
+                        ppsc->b_in_powersavemode = true;
+
+                        /*rtl_pci_reset_trx_ring(hw); */
+                        _rtl_ps_inactive_ps(hw);
+                }
+        }
+}
+
+void rtl_ips_nic_off(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /*
+         *because when link with ap, mac80211 will ask us
+         *to disable nic quickly after scan before linking,
+         *this will cause link failed, so we delay 100ms here
+         */
+        queue_delayed_work(rtlpriv->works.rtl_wq,
+                           &rtlpriv->works.ips_nic_off_wq, MSECS(100));
+}
+
+void rtl_ips_nic_on(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        enum rf_pwrstate rtstate;
+        unsigned long flags;
+
+        spin_lock_irqsave(&rtlpriv->locks.ips_lock, flags);
+
+        if (ppsc->b_inactiveps) {
+                rtstate = ppsc->rfpwr_state;
+
+                if (rtstate != ERFON &&
+                    !ppsc->b_swrf_processing &&
+                    ppsc->rfoff_reason <= RF_CHANGE_BY_IPS) {
+
+                        ppsc->inactive_pwrstate = ERFON;
+                        ppsc->b_in_powersavemode = false;
+
+                        _rtl_ps_inactive_ps(hw);
+                }
+        }
+
+        spin_unlock_irqrestore(&rtlpriv->locks.ips_lock, flags);
+}
+
+/*for FW LPS*/
+
+/*
+ *Determine if we can set Fw into PS mode
+ *in current condition.Return TRUE if it
+ *can enter PS mode.
+ */
+static bool rtl_get_fwlps_doze(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        u32 ps_timediff;
+
+        ps_timediff = jiffies_to_msecs(jiffies -
+                                       ppsc->last_delaylps_stamp_jiffies);
+
+        if (ps_timediff < 2000) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("Delay enter Fw LPS for DHCP, ARP,"
+                          " or EAPOL exchanging state.\n"));
+                return false;
+        }
+
+        if (mac->link_state != MAC80211_LINKED)
+                return false;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                return false;
+
+        return true;
+}
+
+/* Change current and default preamble mode.*/
+static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        u8 rpwm_val, fw_pwrmode;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                return;
+
+        if (mac->link_state != MAC80211_LINKED)
+                return;
+
+        if (ppsc->dot11_psmode == rt_psmode)
+                return;
+
+        /* Update power save mode configured. */
+        ppsc->dot11_psmode = rt_psmode;
+
+        /*
+         *<FW control LPS>
+         *1. Enter PS mode
+         *   Set RPWM to Fw to turn RF off and send H2C fw_pwrmode
+         *   cmd to set Fw into PS mode.
+         *2. Leave PS mode
+         *   Send H2C fw_pwrmode cmd to Fw to set Fw into Active
+         *   mode and set RPWM to turn RF on.
+         */
+
+        if ((ppsc->b_fwctrl_lps) && (ppsc->b_leisure_ps) &&
+             ppsc->report_linked) {
+                bool b_fw_current_inps;
+                if (ppsc->dot11_psmode == EACTIVE) {
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                 ("FW LPS leave ps_mode:%x\n",
+                                  FW_PS_ACTIVE_MODE));
+
+                        rpwm_val = 0x0C;        /* RF on */
+                        fw_pwrmode = FW_PS_ACTIVE_MODE;
+                        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM,
+                                        (u8 *) (&rpwm_val));
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                        HW_VAR_H2C_FW_PWRMODE,
+                                        (u8 *) (&fw_pwrmode));
+                        b_fw_current_inps = false;
+
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                        HW_VAR_FW_PSMODE_STATUS,
+                                        (u8 *) (&b_fw_current_inps));
+
+                } else {
+                        if (rtl_get_fwlps_doze(hw)) {
+                                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                                ("FW LPS enter ps_mode:%x\n",
+                                                 ppsc->fwctrl_psmode));
+
+                                rpwm_val = 0x02;        /* RF off */
+                                b_fw_current_inps = true;
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                HW_VAR_FW_PSMODE_STATUS,
+                                                (u8 *) (&b_fw_current_inps));
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                HW_VAR_H2C_FW_PWRMODE,
+                                                (u8 *) (&ppsc->fwctrl_psmode));
+
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                HW_VAR_SET_RPWM,
+                                                (u8 *) (&rpwm_val));
+                        } else {
+                                /* Reset the power save related parameters. */
+                                ppsc->dot11_psmode = EACTIVE;
+                        }
+                }
+        }
+}
+
+/*Enter the leisure power save mode.*/
+void rtl_lps_enter(struct ieee80211_hw *hw)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        unsigned long flag;
+
+        if (!(ppsc->b_fwctrl_lps && ppsc->b_leisure_ps))
+                return;
+
+        if (rtlpriv->sec.being_setkey)
+                return;
+
+        if (rtlpriv->link_info.b_busytraffic)
+                return;
+
+        /*sleep after linked 10s, to let DHCP and 4-way handshake ok enough!! */
+        if (mac->cnt_after_linked < 5)
+                return;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                return;
+
+        if (mac->link_state != MAC80211_LINKED)
+                return;
+
+        spin_lock_irqsave(&rtlpriv->locks.lps_lock, flag);
+
+        if (ppsc->b_leisure_ps) {
+                /* Idle for a while if we connect to AP a while ago. */
+                if (mac->cnt_after_linked >= 2) {
+                        if (ppsc->dot11_psmode == EACTIVE) {
+                                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                        ("Enter 802.11 power save mode...\n"));
+
+                                rtl_lps_set_psmode(hw, EAUTOPS);
+                        }
+                }
+        }
+        spin_unlock_irqrestore(&rtlpriv->locks.lps_lock, flag);
+}
+
+/*Leave the leisure power save mode.*/
+void rtl_lps_leave(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        unsigned long flag;
+
+        spin_lock_irqsave(&rtlpriv->locks.lps_lock, flag);
+
+        if (ppsc->b_fwctrl_lps && ppsc->b_leisure_ps) {
+                if (ppsc->dot11_psmode != EACTIVE) {
+
+                        /*FIX ME */
+                        rtlpriv->cfg->ops->enable_interrupt(hw);
+
+                        if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM &&
+                            RT_IN_PS_LEVEL(ppsc, RT_RF_LPS_LEVEL_ASPM) &&
+                            rtlhal->interface == INTF_PCI) {
+                                rtlpriv->intf_ops->disable_aspm(hw);
+                                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_LPS_LEVEL_ASPM);
+                        }
+
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                 ("Busy Traffic,Leave 802.11 power save..\n"));
+
+                        rtl_lps_set_psmode(hw, EACTIVE);
+                }
+        }
+        spin_unlock_irqrestore(&rtlpriv->locks.lps_lock, flag);
+}
diff --git a/drivers/net/wireless/rtlwifi/ps.h b/drivers/net/wireless/rtlwifi/ps.h
new file mode 100644
index 000000000000..ae56da801a23
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/ps.h
@@ -0,0 +1,43 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __REALTEK_RTL_PCI_PS_H__
+#define __REALTEK_RTL_PCI_PS_H__
+
+bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
+                         enum rf_pwrstate state_toset, u32 changesource,
+                         bool protect_or_not);
+bool rtl_ps_enable_nic(struct ieee80211_hw *hw);
+bool rtl_ps_disable_nic(struct ieee80211_hw *hw);
+void rtl_ips_nic_off(struct ieee80211_hw *hw);
+void rtl_ips_nic_on(struct ieee80211_hw *hw);
+void rtl_ips_nic_off_wq_callback(void *data);
+void rtl_lps_enter(struct ieee80211_hw *hw);
+void rtl_lps_leave(struct ieee80211_hw *hw);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rc.c b/drivers/net/wireless/rtlwifi/rc.c
new file mode 100644
index 000000000000..91634107434a
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rc.c
@@ -0,0 +1,329 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "base.h"
+#include "rc.h"
+
+/*
+ *Finds the highest rate index we can use
+ *if skb is special data like DHCP/EAPOL, we set should
+ *it to lowest rate CCK_1M, otherwise we set rate to
+ *CCK11M or OFDM_54M based on wireless mode.
+ */
+static u8 _rtl_rc_get_highest_rix(struct rtl_priv *rtlpriv,
+                                  struct sk_buff *skb, bool not_data)
+{
+        struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
+
+        /*
+         *mgt use 1M, although we have check it
+         *before this function use rate_control_send_low,
+         *we still check it here
+         */
+        if (not_data)
+                return rtlpriv->cfg->maps[RTL_RC_CCK_RATE1M];
+
+        /*
+         *this rate is no use for true rate, firmware
+         *will control rate at all it just used for
+         *1.show in iwconfig in B/G mode
+         *2.in rtl_get_tcb_desc when we check rate is
+         *      1M we will not use FW rate but user rate.
+         */
+        if (rtl_is_special_data(rtlpriv->mac80211.hw, skb, true)) {
+                return rtlpriv->cfg->maps[RTL_RC_CCK_RATE1M];
+        } else {
+                if (rtlmac->mode == WIRELESS_MODE_B)
+                        return rtlpriv->cfg->maps[RTL_RC_CCK_RATE11M];
+                else
+                        return rtlpriv->cfg->maps[RTL_RC_OFDM_RATE54M];
+        }
+}
+
+static void _rtl_rc_rate_set_series(struct rtl_priv *rtlpriv,
+                                    struct ieee80211_tx_rate *rate,
+                                    struct ieee80211_tx_rate_control *txrc,
+                                    u8 tries, u8 rix, int rtsctsenable,
+                                    bool not_data)
+{
+        struct rtl_mac *mac = rtl_mac(rtlpriv);
+
+        rate->count = tries;
+        rate->idx = (rix > 0x2) ? rix : 0x2;
+
+        if (!not_data) {
+                if (txrc->short_preamble)
+                        rate->flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
+                if (mac->bw_40)
+                        rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
+                if (mac->sgi_20 || mac->sgi_40)
+                        rate->flags |= IEEE80211_TX_RC_SHORT_GI;
+                if (mac->ht_enable)
+                        rate->flags |= IEEE80211_TX_RC_MCS;
+        }
+}
+
+static void rtl_get_rate(void *ppriv, struct ieee80211_sta *sta,
+                         void *priv_sta, struct ieee80211_tx_rate_control *txrc)
+{
+        struct rtl_priv *rtlpriv = ppriv;
+        struct sk_buff *skb = txrc->skb;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ieee80211_tx_rate *rates = tx_info->control.rates;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+        __le16 fc = hdr->frame_control;
+        u8 try_per_rate, i, rix;
+        bool not_data = !ieee80211_is_data(fc);
+
+        if (rate_control_send_low(sta, priv_sta, txrc))
+                return;
+
+        rix = _rtl_rc_get_highest_rix(rtlpriv, skb, not_data);
+
+        try_per_rate = 1;
+        _rtl_rc_rate_set_series(rtlpriv, &rates[0], txrc,
+                                try_per_rate, rix, 1, not_data);
+
+        if (!not_data) {
+                for (i = 1; i < 4; i++)
+                        _rtl_rc_rate_set_series(rtlpriv, &rates[i],
+                                                txrc, i, (rix - i), 1,
+                                                not_data);
+        }
+}
+
+static bool _rtl_tx_aggr_check(struct rtl_priv *rtlpriv, u16 tid)
+{
+        struct rtl_mac *mac = rtl_mac(rtlpriv);
+
+        if (mac->act_scanning)
+                return false;
+
+        if (mac->cnt_after_linked < 3)
+                return false;
+
+        if (mac->tids[tid].agg.agg_state == RTL_AGG_OFF)
+                return true;
+
+        return false;
+}
+
+/*mac80211 Rate Control callbacks*/
+static void rtl_tx_status(void *ppriv,
+                          struct ieee80211_supported_band *sband,
+                          struct ieee80211_sta *sta, void *priv_sta,
+                          struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = ppriv;
+        struct rtl_mac *mac = rtl_mac(rtlpriv);
+        struct ieee80211_hdr *hdr;
+        __le16 fc;
+
+        hdr = (struct ieee80211_hdr *)skb->data;
+        fc = hdr->frame_control;
+
+        if (!priv_sta || !ieee80211_is_data(fc))
+                return;
+
+        if (rtl_is_special_data(mac->hw, skb, true))
+                return;
+
+        if (is_multicast_ether_addr(ieee80211_get_DA(hdr))
+            || is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
+                return;
+
+        /* Check if aggregation has to be enabled for this tid */
+        if (conf_is_ht(&mac->hw->conf) &&
+            !(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
+                if (ieee80211_is_data_qos(fc)) {
+                        u8 *qc, tid;
+
+                        qc = ieee80211_get_qos_ctl(hdr);
+                        tid = qc[0] & 0xf;
+
+                        if (_rtl_tx_aggr_check(rtlpriv, tid))
+                                ieee80211_start_tx_ba_session(sta, tid, 5000);
+                }
+        }
+}
+
+static void rtl_rate_init(void *ppriv,
+                          struct ieee80211_supported_band *sband,
+                          struct ieee80211_sta *sta, void *priv_sta)
+{
+        struct rtl_priv *rtlpriv = ppriv;
+        struct rtl_mac *mac = rtl_mac(rtlpriv);
+        u8 is_ht = conf_is_ht(&mac->hw->conf);
+
+        if ((mac->opmode == NL80211_IFTYPE_STATION) ||
+            (mac->opmode == NL80211_IFTYPE_MESH_POINT) ||
+            (mac->opmode == NL80211_IFTYPE_ADHOC)) {
+
+                switch (sband->band) {
+                case IEEE80211_BAND_2GHZ:
+                        rtlpriv->rate_priv->cur_ratetab_idx =
+                            RATR_INX_WIRELESS_G;
+                        if (is_ht)
+                                rtlpriv->rate_priv->cur_ratetab_idx =
+                                    RATR_INX_WIRELESS_NGB;
+                        break;
+                case IEEE80211_BAND_5GHZ:
+                        rtlpriv->rate_priv->cur_ratetab_idx =
+                            RATR_INX_WIRELESS_A;
+                        if (is_ht)
+                                rtlpriv->rate_priv->cur_ratetab_idx =
+                                    RATR_INX_WIRELESS_NGB;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                 ("Invalid band\n"));
+                        rtlpriv->rate_priv->cur_ratetab_idx =
+                            RATR_INX_WIRELESS_NGB;
+                        break;
+                }
+
+                RT_TRACE(rtlpriv, COMP_RATE, DBG_DMESG,
+                         ("Choosing rate table index: %d\n",
+                          rtlpriv->rate_priv->cur_ratetab_idx));
+
+        }
+
+}
+
+static void rtl_rate_update(void *ppriv,
+                            struct ieee80211_supported_band *sband,
+                            struct ieee80211_sta *sta, void *priv_sta,
+                            u32 changed,
+                            enum nl80211_channel_type oper_chan_type)
+{
+        struct rtl_priv *rtlpriv = ppriv;
+        struct rtl_mac *mac = rtl_mac(rtlpriv);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        bool oper_cw40 = false, oper_sgi40;
+        bool local_cw40 = mac->bw_40;
+        bool local_sgi40 = mac->sgi_40;
+        u8 is_ht = conf_is_ht(&mac->hw->conf);
+
+        if (changed & IEEE80211_RC_HT_CHANGED) {
+                if (mac->opmode != NL80211_IFTYPE_STATION)
+                        return;
+
+                if (rtlhal->hw->conf.channel_type == NL80211_CHAN_HT40MINUS ||
+                    rtlhal->hw->conf.channel_type == NL80211_CHAN_HT40PLUS)
+                        oper_cw40 = true;
+
+                oper_sgi40 = mac->sgi_40;
+
+                if ((local_cw40 != oper_cw40) || (local_sgi40 != oper_sgi40)) {
+                        switch (sband->band) {
+                        case IEEE80211_BAND_2GHZ:
+                                rtlpriv->rate_priv->cur_ratetab_idx =
+                                    RATR_INX_WIRELESS_G;
+                                if (is_ht)
+                                        rtlpriv->rate_priv->cur_ratetab_idx =
+                                            RATR_INX_WIRELESS_NGB;
+                                break;
+                        case IEEE80211_BAND_5GHZ:
+                                rtlpriv->rate_priv->cur_ratetab_idx =
+                                    RATR_INX_WIRELESS_A;
+                                if (is_ht)
+                                        rtlpriv->rate_priv->cur_ratetab_idx =
+                                            RATR_INX_WIRELESS_NGB;
+                                break;
+                        default:
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                         ("Invalid band\n"));
+                                rtlpriv->rate_priv->cur_ratetab_idx =
+                                    RATR_INX_WIRELESS_NGB;
+                                break;
+                        }
+                }
+        }
+}
+
+static void *rtl_rate_alloc(struct ieee80211_hw *hw,
+                struct dentry *debugfsdir)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        return rtlpriv;
+}
+
+static void rtl_rate_free(void *rtlpriv)
+{
+        return;
+}
+
+static void *rtl_rate_alloc_sta(void *ppriv,
+                                struct ieee80211_sta *sta, gfp_t gfp)
+{
+        struct rtl_priv *rtlpriv = ppriv;
+        struct rtl_rate_priv *rate_priv;
+
+        rate_priv = kzalloc(sizeof(struct rtl_rate_priv), gfp);
+        if (!rate_priv) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Unable to allocate private rc structure\n"));
+                return NULL;
+        }
+
+        rtlpriv->rate_priv = rate_priv;
+
+        return rate_priv;
+}
+
+static void rtl_rate_free_sta(void *rtlpriv,
+                              struct ieee80211_sta *sta, void *priv_sta)
+{
+        struct rtl_rate_priv *rate_priv = priv_sta;
+        kfree(rate_priv);
+}
+
+static struct rate_control_ops rtl_rate_ops = {
+        .module = NULL,
+        .name = "rtl_rc",
+        .alloc = rtl_rate_alloc,
+        .free = rtl_rate_free,
+        .alloc_sta = rtl_rate_alloc_sta,
+        .free_sta = rtl_rate_free_sta,
+        .rate_init = rtl_rate_init,
+        .rate_update = rtl_rate_update,
+        .tx_status = rtl_tx_status,
+        .get_rate = rtl_get_rate,
+};
+
+int rtl_rate_control_register(void)
+{
+        return ieee80211_rate_control_register(&rtl_rate_ops);
+}
+
+void rtl_rate_control_unregister(void)
+{
+        ieee80211_rate_control_unregister(&rtl_rate_ops);
+}
diff --git a/drivers/net/wireless/rtlwifi/rc.h b/drivers/net/wireless/rtlwifi/rc.h
new file mode 100644
index 000000000000..b4667c035f0b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rc.h
@@ -0,0 +1,40 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_RC_H__
+#define __RTL_RC_H__
+
+struct rtl_rate_priv {
+        u8 cur_ratetab_idx;
+        u8 ht_cap;
+};
+
+int rtl_rate_control_register(void);
+void rtl_rate_control_unregister(void);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/regd.c b/drivers/net/wireless/rtlwifi/regd.c
new file mode 100644
index 000000000000..3336ca999dfd
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/regd.c
@@ -0,0 +1,400 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "wifi.h"
+#include "regd.h"
+
+static struct country_code_to_enum_rd allCountries[] = {
+        {COUNTRY_CODE_FCC, "US"},
+        {COUNTRY_CODE_IC, "US"},
+        {COUNTRY_CODE_ETSI, "EC"},
+        {COUNTRY_CODE_SPAIN, "EC"},
+        {COUNTRY_CODE_FRANCE, "EC"},
+        {COUNTRY_CODE_MKK, "JP"},
+        {COUNTRY_CODE_MKK1, "JP"},
+        {COUNTRY_CODE_ISRAEL, "EC"},
+        {COUNTRY_CODE_TELEC, "JP"},
+        {COUNTRY_CODE_MIC, "JP"},
+        {COUNTRY_CODE_GLOBAL_DOMAIN, "JP"},
+        {COUNTRY_CODE_WORLD_WIDE_13, "EC"},
+        {COUNTRY_CODE_TELEC_NETGEAR, "EC"},
+};
+
+/*
+ *Only these channels all allow active
+ *scan on all world regulatory domains
+ */
+#define RTL819x_2GHZ_CH01_11    \
+        REG_RULE(2412-10, 2462+10, 40, 0, 20, 0)
+
+/*
+ *We enable active scan on these a case
+ *by case basis by regulatory domain
+ */
+#define RTL819x_2GHZ_CH12_13    \
+        REG_RULE(2467-10, 2472+10, 40, 0, 20,\
+        NL80211_RRF_PASSIVE_SCAN)
+
+#define RTL819x_2GHZ_CH14       \
+        REG_RULE(2484-10, 2484+10, 40, 0, 20, \
+        NL80211_RRF_PASSIVE_SCAN | \
+        NL80211_RRF_NO_OFDM)
+
+static const struct ieee80211_regdomain rtl_regdom_11 = {
+        .n_reg_rules = 1,
+        .alpha2 = "99",
+        .reg_rules = {
+                      RTL819x_2GHZ_CH01_11,
+        }
+};
+
+static const struct ieee80211_regdomain rtl_regdom_global = {
+        .n_reg_rules = 3,
+        .alpha2 = "99",
+        .reg_rules = {
+                      RTL819x_2GHZ_CH01_11,
+                      RTL819x_2GHZ_CH12_13,
+                      RTL819x_2GHZ_CH14,
+        }
+};
+
+static const struct ieee80211_regdomain rtl_regdom_world = {
+        .n_reg_rules = 2,
+        .alpha2 = "99",
+        .reg_rules = {
+                      RTL819x_2GHZ_CH01_11,
+                      RTL819x_2GHZ_CH12_13,
+        }
+};
+
+static bool _rtl_is_radar_freq(u16 center_freq)
+{
+        return (center_freq >= 5260 && center_freq <= 5700);
+}
+
+static void _rtl_reg_apply_beaconing_flags(struct wiphy *wiphy,
+                                           enum nl80211_reg_initiator initiator)
+{
+        enum ieee80211_band band;
+        struct ieee80211_supported_band *sband;
+        const struct ieee80211_reg_rule *reg_rule;
+        struct ieee80211_channel *ch;
+        unsigned int i;
+        u32 bandwidth = 0;
+        int r;
+
+        for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
+
+                if (!wiphy->bands[band])
+                        continue;
+
+                sband = wiphy->bands[band];
+
+                for (i = 0; i < sband->n_channels; i++) {
+                        ch = &sband->channels[i];
+                        if (_rtl_is_radar_freq(ch->center_freq) ||
+                            (ch->flags & IEEE80211_CHAN_RADAR))
+                                continue;
+                        if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) {
+                                r = freq_reg_info(wiphy, ch->center_freq,
+                                                  bandwidth, &reg_rule);
+                                if (r)
+                                        continue;
+
+                                /*
+                                 *If 11d had a rule for this channel ensure
+                                 *we enable adhoc/beaconing if it allows us to
+                                 *use it. Note that we would have disabled it
+                                 *by applying our static world regdomain by
+                                 *default during init, prior to calling our
+                                 *regulatory_hint().
+                                 */
+
+                                if (!(reg_rule->flags & NL80211_RRF_NO_IBSS))
+                                        ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
+                                if (!(reg_rule->
+                                     flags & NL80211_RRF_PASSIVE_SCAN))
+                                        ch->flags &=
+                                            ~IEEE80211_CHAN_PASSIVE_SCAN;
+                        } else {
+                                if (ch->beacon_found)
+                                        ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
+                                                  IEEE80211_CHAN_PASSIVE_SCAN);
+                        }
+                }
+        }
+}
+
+/* Allows active scan scan on Ch 12 and 13 */
+static void _rtl_reg_apply_active_scan_flags(struct wiphy *wiphy,
+                                             enum nl80211_reg_initiator
+                                             initiator)
+{
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_channel *ch;
+        const struct ieee80211_reg_rule *reg_rule;
+        u32 bandwidth = 0;
+        int r;
+
+        sband = wiphy->bands[IEEE80211_BAND_2GHZ];
+
+        /*
+         *If no country IE has been received always enable active scan
+         *on these channels. This is only done for specific regulatory SKUs
+         */
+        if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
+                ch = &sband->channels[11];      /* CH 12 */
+                if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+                        ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
+                ch = &sband->channels[12];      /* CH 13 */
+                if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+                        ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
+                return;
+        }
+
+        /*
+         *If a country IE has been recieved check its rule for this
+         *channel first before enabling active scan. The passive scan
+         *would have been enforced by the initial processing of our
+         *custom regulatory domain.
+         */
+
+        ch = &sband->channels[11];      /* CH 12 */
+        r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule);
+        if (!r) {
+                if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+                        if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+                                ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
+        }
+
+        ch = &sband->channels[12];      /* CH 13 */
+        r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule);
+        if (!r) {
+                if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
+                        if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
+                                ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
+        }
+}
+
+/*
+ *Always apply Radar/DFS rules on
+ *freq range 5260 MHz - 5700 MHz
+ */
+static void _rtl_reg_apply_radar_flags(struct wiphy *wiphy)
+{
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_channel *ch;
+        unsigned int i;
+
+        if (!wiphy->bands[IEEE80211_BAND_5GHZ])
+                return;
+
+        sband = wiphy->bands[IEEE80211_BAND_5GHZ];
+
+        for (i = 0; i < sband->n_channels; i++) {
+                ch = &sband->channels[i];
+                if (!_rtl_is_radar_freq(ch->center_freq))
+                        continue;
+
+                /*
+                 *We always enable radar detection/DFS on this
+                 *frequency range. Additionally we also apply on
+                 *this frequency range:
+                 *- If STA mode does not yet have DFS supports disable
+                 * active scanning
+                 *- If adhoc mode does not support DFS yet then disable
+                 * adhoc in the frequency.
+                 *- If AP mode does not yet support radar detection/DFS
+                 *do not allow AP mode
+                 */
+                if (!(ch->flags & IEEE80211_CHAN_DISABLED))
+                        ch->flags |= IEEE80211_CHAN_RADAR |
+                            IEEE80211_CHAN_NO_IBSS |
+                            IEEE80211_CHAN_PASSIVE_SCAN;
+        }
+}
+
+static void _rtl_reg_apply_world_flags(struct wiphy *wiphy,
+                                       enum nl80211_reg_initiator initiator,
+                                       struct rtl_regulatory *reg)
+{
+        _rtl_reg_apply_beaconing_flags(wiphy, initiator);
+        _rtl_reg_apply_active_scan_flags(wiphy, initiator);
+        return;
+}
+
+static void _rtl_dump_channel_map(struct wiphy *wiphy)
+{
+        enum ieee80211_band band;
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_channel *ch;
+        unsigned int i;
+
+        for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
+                if (!wiphy->bands[band])
+                        continue;
+                sband = wiphy->bands[band];
+                for (i = 0; i < sband->n_channels; i++)
+                        ch = &sband->channels[i];
+        }
+}
+
+static int _rtl_reg_notifier_apply(struct wiphy *wiphy,
+                                   struct regulatory_request *request,
+                                   struct rtl_regulatory *reg)
+{
+        /* We always apply this */
+        _rtl_reg_apply_radar_flags(wiphy);
+
+        switch (request->initiator) {
+        case NL80211_REGDOM_SET_BY_DRIVER:
+        case NL80211_REGDOM_SET_BY_CORE:
+        case NL80211_REGDOM_SET_BY_USER:
+                break;
+        case NL80211_REGDOM_SET_BY_COUNTRY_IE:
+                _rtl_reg_apply_world_flags(wiphy, request->initiator, reg);
+                break;
+        }
+
+        _rtl_dump_channel_map(wiphy);
+
+        return 0;
+}
+
+static const struct ieee80211_regdomain *_rtl_regdomain_select(
+                                               struct rtl_regulatory *reg)
+{
+        switch (reg->country_code) {
+        case COUNTRY_CODE_FCC:
+        case COUNTRY_CODE_IC:
+                return &rtl_regdom_11;
+        case COUNTRY_CODE_ETSI:
+        case COUNTRY_CODE_SPAIN:
+        case COUNTRY_CODE_FRANCE:
+        case COUNTRY_CODE_ISRAEL:
+        case COUNTRY_CODE_TELEC_NETGEAR:
+                return &rtl_regdom_world;
+        case COUNTRY_CODE_MKK:
+        case COUNTRY_CODE_MKK1:
+        case COUNTRY_CODE_TELEC:
+        case COUNTRY_CODE_MIC:
+                return &rtl_regdom_global;
+        case COUNTRY_CODE_GLOBAL_DOMAIN:
+                return &rtl_regdom_global;
+        case COUNTRY_CODE_WORLD_WIDE_13:
+                return &rtl_regdom_world;
+        default:
+                return &rtl_regdom_world;
+        }
+}
+
+static int _rtl_regd_init_wiphy(struct rtl_regulatory *reg,
+                                struct wiphy *wiphy,
+                                int (*reg_notifier) (struct wiphy *wiphy,
+                                                     struct regulatory_request *
+                                                     request))
+{
+        const struct ieee80211_regdomain *regd;
+
+        wiphy->reg_notifier = reg_notifier;
+        wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
+        wiphy->flags &= ~WIPHY_FLAG_STRICT_REGULATORY;
+        wiphy->flags &= ~WIPHY_FLAG_DISABLE_BEACON_HINTS;
+        regd = _rtl_regdomain_select(reg);
+        wiphy_apply_custom_regulatory(wiphy, regd);
+        _rtl_reg_apply_radar_flags(wiphy);
+        _rtl_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg);
+        return 0;
+}
+
+static struct country_code_to_enum_rd *_rtl_regd_find_country(u16 countrycode)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
+                if (allCountries[i].countrycode == countrycode)
+                        return &allCountries[i];
+        }
+        return NULL;
+}
+
+int rtl_regd_init(struct ieee80211_hw *hw,
+                  int (*reg_notifier) (struct wiphy *wiphy,
+                                       struct regulatory_request *request))
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct wiphy *wiphy = hw->wiphy;
+        struct country_code_to_enum_rd *country = NULL;
+
+        if (wiphy == NULL || &rtlpriv->regd == NULL)
+                return -EINVAL;
+
+        /* force the channel plan to world wide 13 */
+        rtlpriv->regd.country_code = COUNTRY_CODE_WORLD_WIDE_13;
+
+        RT_TRACE(rtlpriv, COMP_REGD, DBG_TRACE,
+                 (KERN_DEBUG "rtl: EEPROM regdomain: 0x%0x\n",
+                  rtlpriv->regd.country_code));
+
+        if (rtlpriv->regd.country_code >= COUNTRY_CODE_MAX) {
+                RT_TRACE(rtlpriv, COMP_REGD, DBG_DMESG,
+                         (KERN_DEBUG "rtl: EEPROM indicates invalid contry code"
+                          "world wide 13 should be used\n"));
+
+                rtlpriv->regd.country_code = COUNTRY_CODE_WORLD_WIDE_13;
+        }
+
+        country = _rtl_regd_find_country(rtlpriv->regd.country_code);
+
+        if (country) {
+                rtlpriv->regd.alpha2[0] = country->isoName[0];
+                rtlpriv->regd.alpha2[1] = country->isoName[1];
+        } else {
+                rtlpriv->regd.alpha2[0] = '0';
+                rtlpriv->regd.alpha2[1] = '0';
+        }
+
+        RT_TRACE(rtlpriv, COMP_REGD, DBG_TRACE,
+                 (KERN_DEBUG "rtl: Country alpha2 being used: %c%c\n",
+                  rtlpriv->regd.alpha2[0], rtlpriv->regd.alpha2[1]));
+
+        _rtl_regd_init_wiphy(&rtlpriv->regd, wiphy, reg_notifier);
+
+        return 0;
+}
+
+int rtl_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
+{
+        struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_REGD, DBG_LOUD, ("\n"));
+
+        return _rtl_reg_notifier_apply(wiphy, request, &rtlpriv->regd);
+}
diff --git a/drivers/net/wireless/rtlwifi/regd.h b/drivers/net/wireless/rtlwifi/regd.h
new file mode 100644
index 000000000000..4cdbc4ae76d4
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/regd.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_REGD_H__
+#define __RTL_REGD_H__
+
+struct country_code_to_enum_rd {
+        u16 countrycode;
+        const char *isoName;
+};
+
+enum country_code_type_t {
+        COUNTRY_CODE_FCC = 0,
+        COUNTRY_CODE_IC = 1,
+        COUNTRY_CODE_ETSI = 2,
+        COUNTRY_CODE_SPAIN = 3,
+        COUNTRY_CODE_FRANCE = 4,
+        COUNTRY_CODE_MKK = 5,
+        COUNTRY_CODE_MKK1 = 6,
+        COUNTRY_CODE_ISRAEL = 7,
+        COUNTRY_CODE_TELEC = 8,
+        COUNTRY_CODE_MIC = 9,
+        COUNTRY_CODE_GLOBAL_DOMAIN = 10,
+        COUNTRY_CODE_WORLD_WIDE_13 = 11,
+        COUNTRY_CODE_TELEC_NETGEAR = 12,
+
+        /*add new channel plan above this line */
+        COUNTRY_CODE_MAX
+};
+
+int rtl_regd_init(struct ieee80211_hw *hw,
+                  int (*reg_notifier) (struct wiphy *wiphy,
+                                       struct regulatory_request *request));
+int rtl_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile b/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile
new file mode 100644
index 000000000000..0f0be7c763b8
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile
@@ -0,0 +1,12 @@
+rtl8192ce-objs :=               \
+                dm.o            \
+                fw.o            \
+                hw.o            \
+                led.o           \
+                phy.o           \
+                rf.o            \
+                sw.o            \
+                table.o         \
+                trx.o
+
+obj-$(CONFIG_RTL8192CE) += rtl8192ce.o
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/def.h b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h
new file mode 100644
index 000000000000..83cd64895292
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h
@@ -0,0 +1,257 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_DEF_H__
+#define __RTL92C_DEF_H__
+
+#define HAL_RETRY_LIMIT_INFRA                           48
+#define HAL_RETRY_LIMIT_AP_ADHOC                        7
+
+#define PHY_RSSI_SLID_WIN_MAX                           100
+#define PHY_LINKQUALITY_SLID_WIN_MAX                    20
+#define PHY_BEACON_RSSI_SLID_WIN_MAX                    10
+
+#define RESET_DELAY_8185                                20
+
+#define RT_IBSS_INT_MASKS       (IMR_BCNINT | IMR_TBDOK | IMR_TBDER)
+#define RT_AC_INT_MASKS         (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK)
+
+#define NUM_OF_FIRMWARE_QUEUE                           10
+#define NUM_OF_PAGES_IN_FW                              0x100
+#define NUM_OF_PAGE_IN_FW_QUEUE_BK                      0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_BE                      0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_VI                      0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_VO                      0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA                    0x0
+#define NUM_OF_PAGE_IN_FW_QUEUE_CMD                     0x0
+#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT                    0x02
+#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH                    0x02
+#define NUM_OF_PAGE_IN_FW_QUEUE_BCN                     0x2
+#define NUM_OF_PAGE_IN_FW_QUEUE_PUB                     0xA1
+
+#define NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM                  0x026
+#define NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM                  0x048
+#define NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM                  0x048
+#define NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM                  0x026
+#define NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM                 0x00
+
+#define MAX_LINES_HWCONFIG_TXT                          1000
+#define MAX_BYTES_LINE_HWCONFIG_TXT                     256
+
+#define SW_THREE_WIRE                                   0
+#define HW_THREE_WIRE                                   2
+
+#define BT_DEMO_BOARD                                   0
+#define BT_QA_BOARD                                     1
+#define BT_FPGA                                         2
+
+#define RX_SMOOTH_FACTOR                                20
+
+#define HAL_PRIME_CHNL_OFFSET_DONT_CARE                 0
+#define HAL_PRIME_CHNL_OFFSET_LOWER                     1
+#define HAL_PRIME_CHNL_OFFSET_UPPER                     2
+
+#define MAX_H2C_QUEUE_NUM                               10
+
+#define RX_MPDU_QUEUE                                   0
+#define RX_CMD_QUEUE                                    1
+#define RX_MAX_QUEUE                                    2
+#define AC2QUEUEID(_AC)                                 (_AC)
+
+#define C2H_RX_CMD_HDR_LEN                              8
+#define GET_C2H_CMD_CMD_LEN(__prxhdr)           \
+        LE_BITS_TO_4BYTE((__prxhdr), 0, 16)
+#define GET_C2H_CMD_ELEMENT_ID(__prxhdr)        \
+        LE_BITS_TO_4BYTE((__prxhdr), 16, 8)
+#define GET_C2H_CMD_CMD_SEQ(__prxhdr)           \
+        LE_BITS_TO_4BYTE((__prxhdr), 24, 7)
+#define GET_C2H_CMD_CONTINUE(__prxhdr)          \
+        LE_BITS_TO_4BYTE((__prxhdr), 31, 1)
+#define GET_C2H_CMD_CONTENT(__prxhdr)           \
+        ((u8 *)(__prxhdr) + C2H_RX_CMD_HDR_LEN)
+
+#define GET_C2H_CMD_FEEDBACK_ELEMENT_ID(__pcmdfbhdr)    \
+        LE_BITS_TO_4BYTE((__pcmdfbhdr), 0, 8)
+#define GET_C2H_CMD_FEEDBACK_CCX_LEN(__pcmdfbhdr)       \
+        LE_BITS_TO_4BYTE((__pcmdfbhdr), 8, 8)
+#define GET_C2H_CMD_FEEDBACK_CCX_CMD_CNT(__pcmdfbhdr)   \
+        LE_BITS_TO_4BYTE((__pcmdfbhdr), 16, 16)
+#define GET_C2H_CMD_FEEDBACK_CCX_MAC_ID(__pcmdfbhdr)    \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 0, 5)
+#define GET_C2H_CMD_FEEDBACK_CCX_VALID(__pcmdfbhdr)     \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 7, 1)
+#define GET_C2H_CMD_FEEDBACK_CCX_RETRY_CNT(__pcmdfbhdr) \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 8, 5)
+#define GET_C2H_CMD_FEEDBACK_CCX_TOK(__pcmdfbhdr)       \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 15, 1)
+#define GET_C2H_CMD_FEEDBACK_CCX_QSEL(__pcmdfbhdr)      \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 16, 4)
+#define GET_C2H_CMD_FEEDBACK_CCX_SEQ(__pcmdfbhdr)       \
+        LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 20, 12)
+
+#define CHIP_VER_B                      BIT(4)
+#define CHIP_92C_BITMASK                BIT(0)
+#define CHIP_92C_1T2R                   0x03
+#define CHIP_92C                        0x01
+#define CHIP_88C                        0x00
+
+enum version_8192c {
+        VERSION_A_CHIP_92C = 0x01,
+        VERSION_A_CHIP_88C = 0x00,
+        VERSION_B_CHIP_92C = 0x11,
+        VERSION_B_CHIP_88C = 0x10,
+        VERSION_UNKNOWN = 0x88,
+};
+
+#define IS_CHIP_VER_B(version)  ((version & CHIP_VER_B) ? true : false)
+#define IS_92C_SERIAL(version)  ((version & CHIP_92C_BITMASK) ? true : false)
+
+enum rtl819x_loopback_e {
+        RTL819X_NO_LOOPBACK = 0,
+        RTL819X_MAC_LOOPBACK = 1,
+        RTL819X_DMA_LOOPBACK = 2,
+        RTL819X_CCK_LOOPBACK = 3,
+};
+
+enum rf_optype {
+        RF_OP_BY_SW_3WIRE = 0,
+        RF_OP_BY_FW,
+        RF_OP_MAX
+};
+
+enum rf_power_state {
+        RF_ON,
+        RF_OFF,
+        RF_SLEEP,
+        RF_SHUT_DOWN,
+};
+
+enum power_save_mode {
+        POWER_SAVE_MODE_ACTIVE,
+        POWER_SAVE_MODE_SAVE,
+};
+
+enum power_polocy_config {
+        POWERCFG_MAX_POWER_SAVINGS,
+        POWERCFG_GLOBAL_POWER_SAVINGS,
+        POWERCFG_LOCAL_POWER_SAVINGS,
+        POWERCFG_LENOVO,
+};
+
+enum interface_select_pci {
+        INTF_SEL1_MINICARD = 0,
+        INTF_SEL0_PCIE = 1,
+        INTF_SEL2_RSV = 2,
+        INTF_SEL3_RSV = 3,
+};
+
+enum hal_fw_c2h_cmd_id {
+        HAL_FW_C2H_CMD_Read_MACREG = 0,
+        HAL_FW_C2H_CMD_Read_BBREG = 1,
+        HAL_FW_C2H_CMD_Read_RFREG = 2,
+        HAL_FW_C2H_CMD_Read_EEPROM = 3,
+        HAL_FW_C2H_CMD_Read_EFUSE = 4,
+        HAL_FW_C2H_CMD_Read_CAM = 5,
+        HAL_FW_C2H_CMD_Get_BasicRate = 6,
+        HAL_FW_C2H_CMD_Get_DataRate = 7,
+        HAL_FW_C2H_CMD_Survey = 8,
+        HAL_FW_C2H_CMD_SurveyDone = 9,
+        HAL_FW_C2H_CMD_JoinBss = 10,
+        HAL_FW_C2H_CMD_AddSTA = 11,
+        HAL_FW_C2H_CMD_DelSTA = 12,
+        HAL_FW_C2H_CMD_AtimDone = 13,
+        HAL_FW_C2H_CMD_TX_Report = 14,
+        HAL_FW_C2H_CMD_CCX_Report = 15,
+        HAL_FW_C2H_CMD_DTM_Report = 16,
+        HAL_FW_C2H_CMD_TX_Rate_Statistics = 17,
+        HAL_FW_C2H_CMD_C2HLBK = 18,
+        HAL_FW_C2H_CMD_C2HDBG = 19,
+        HAL_FW_C2H_CMD_C2HFEEDBACK = 20,
+        HAL_FW_C2H_CMD_MAX
+};
+
+enum rtl_desc_qsel {
+        QSLT_BK = 0x2,
+        QSLT_BE = 0x0,
+        QSLT_VI = 0x5,
+        QSLT_VO = 0x7,
+        QSLT_BEACON = 0x10,
+        QSLT_HIGH = 0x11,
+        QSLT_MGNT = 0x12,
+        QSLT_CMD = 0x13,
+};
+
+enum rtl_desc92c_rate {
+        DESC92C_RATE1M = 0x00,
+        DESC92C_RATE2M = 0x01,
+        DESC92C_RATE5_5M = 0x02,
+        DESC92C_RATE11M = 0x03,
+
+        DESC92C_RATE6M = 0x04,
+        DESC92C_RATE9M = 0x05,
+        DESC92C_RATE12M = 0x06,
+        DESC92C_RATE18M = 0x07,
+        DESC92C_RATE24M = 0x08,
+        DESC92C_RATE36M = 0x09,
+        DESC92C_RATE48M = 0x0a,
+        DESC92C_RATE54M = 0x0b,
+
+        DESC92C_RATEMCS0 = 0x0c,
+        DESC92C_RATEMCS1 = 0x0d,
+        DESC92C_RATEMCS2 = 0x0e,
+        DESC92C_RATEMCS3 = 0x0f,
+        DESC92C_RATEMCS4 = 0x10,
+        DESC92C_RATEMCS5 = 0x11,
+        DESC92C_RATEMCS6 = 0x12,
+        DESC92C_RATEMCS7 = 0x13,
+        DESC92C_RATEMCS8 = 0x14,
+        DESC92C_RATEMCS9 = 0x15,
+        DESC92C_RATEMCS10 = 0x16,
+        DESC92C_RATEMCS11 = 0x17,
+        DESC92C_RATEMCS12 = 0x18,
+        DESC92C_RATEMCS13 = 0x19,
+        DESC92C_RATEMCS14 = 0x1a,
+        DESC92C_RATEMCS15 = 0x1b,
+        DESC92C_RATEMCS15_SG = 0x1c,
+        DESC92C_RATEMCS32 = 0x20,
+};
+
+struct phy_sts_cck_8192s_t {
+        u8 adc_pwdb_X[4];
+        u8 sq_rpt;
+        u8 cck_agc_rpt;
+};
+
+struct h2c_cmd_8192c {
+        u8 element_id;
+        u32 cmd_len;
+        u8 *p_cmdbuffer;
+};
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c
new file mode 100644
index 000000000000..62e7c64e087b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c
@@ -0,0 +1,1473 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../base.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "dm.h"
+#include "fw.h"
+
+struct dig_t dm_digtable;
+static struct ps_t dm_pstable;
+
+static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
+        0x7f8001fe,
+        0x788001e2,
+        0x71c001c7,
+        0x6b8001ae,
+        0x65400195,
+        0x5fc0017f,
+        0x5a400169,
+        0x55400155,
+        0x50800142,
+        0x4c000130,
+        0x47c0011f,
+        0x43c0010f,
+        0x40000100,
+        0x3c8000f2,
+        0x390000e4,
+        0x35c000d7,
+        0x32c000cb,
+        0x300000c0,
+        0x2d4000b5,
+        0x2ac000ab,
+        0x288000a2,
+        0x26000098,
+        0x24000090,
+        0x22000088,
+        0x20000080,
+        0x1e400079,
+        0x1c800072,
+        0x1b00006c,
+        0x19800066,
+        0x18000060,
+        0x16c0005b,
+        0x15800056,
+        0x14400051,
+        0x1300004c,
+        0x12000048,
+        0x11000044,
+        0x10000040,
+};
+
+static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
+        {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
+        {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
+        {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
+        {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
+        {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
+        {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
+        {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
+        {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
+        {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
+        {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
+        {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
+        {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
+        {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
+        {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
+        {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
+        {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
+        {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
+        {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
+        {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
+        {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
+        {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
+        {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
+        {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
+        {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
+        {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
+        {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
+        {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
+        {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
+        {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
+        {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
+        {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
+        {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
+        {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
+};
+
+static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
+        {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
+        {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
+        {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
+        {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
+        {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
+        {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
+        {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
+        {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
+        {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
+        {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
+        {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
+        {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
+        {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
+        {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
+        {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
+        {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
+        {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
+        {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
+        {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
+        {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
+        {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
+        {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
+        {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
+        {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
+        {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
+        {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
+};
+
+static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
+{
+        dm_digtable.dig_enable_flag = true;
+        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+        dm_digtable.cur_igvalue = 0x20;
+        dm_digtable.pre_igvalue = 0x0;
+        dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
+        dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
+        dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
+        dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
+        dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
+        dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
+        dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
+        dm_digtable.rx_gain_range_max = DM_DIG_MAX;
+        dm_digtable.rx_gain_range_min = DM_DIG_MIN;
+        dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
+        dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
+        dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
+        dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
+        dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
+}
+
+static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        long rssi_val_min = 0;
+
+        if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
+            (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
+                if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
+                        rssi_val_min =
+                            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
+                             rtlpriv->dm.undecorated_smoothed_pwdb) ?
+                            rtlpriv->dm.undecorated_smoothed_pwdb :
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                else
+                        rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
+        } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
+                   dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
+                rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
+        } else if (dm_digtable.curmultista_connectstate ==
+                   DIG_MULTISTA_CONNECT) {
+                rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+        }
+
+        return (u8) rssi_val_min;
+}
+
+static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
+{
+        u32 ret_value;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
+        falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
+        falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
+        falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
+        falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
+        falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
+            falsealm_cnt->cnt_rate_illegal +
+            falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
+
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
+        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
+        falsealm_cnt->cnt_cck_fail = ret_value;
+
+        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
+        falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
+        falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
+                                 falsealm_cnt->cnt_rate_illegal +
+                                 falsealm_cnt->cnt_crc8_fail +
+                                 falsealm_cnt->cnt_mcs_fail +
+                                 falsealm_cnt->cnt_cck_fail);
+
+        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
+        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
+                  "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
+                  falsealm_cnt->cnt_parity_fail,
+                  falsealm_cnt->cnt_rate_illegal,
+                  falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
+                  falsealm_cnt->cnt_ofdm_fail,
+                  falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
+}
+
+static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 value_igi = dm_digtable.cur_igvalue;
+
+        if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
+                value_igi--;
+        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
+                value_igi += 0;
+        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
+                value_igi++;
+        else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
+                value_igi += 2;
+        if (value_igi > DM_DIG_FA_UPPER)
+                value_igi = DM_DIG_FA_UPPER;
+        else if (value_igi < DM_DIG_FA_LOWER)
+                value_igi = DM_DIG_FA_LOWER;
+        if (rtlpriv->falsealm_cnt.cnt_all > 10000)
+                value_igi = 0x32;
+
+        dm_digtable.cur_igvalue = value_igi;
+        rtl92c_dm_write_dig(hw);
+}
+
+static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
+                if ((dm_digtable.backoff_val - 2) <
+                    dm_digtable.backoff_val_range_min)
+                        dm_digtable.backoff_val =
+                            dm_digtable.backoff_val_range_min;
+                else
+                        dm_digtable.backoff_val -= 2;
+        } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
+                if ((dm_digtable.backoff_val + 2) >
+                    dm_digtable.backoff_val_range_max)
+                        dm_digtable.backoff_val =
+                            dm_digtable.backoff_val_range_max;
+                else
+                        dm_digtable.backoff_val += 2;
+        }
+
+        if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
+            dm_digtable.rx_gain_range_max)
+                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
+        else if ((dm_digtable.rssi_val_min + 10 -
+                  dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
+                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
+        else
+                dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
+                    dm_digtable.backoff_val;
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("rssi_val_min = %x backoff_val %x\n",
+                  dm_digtable.rssi_val_min, dm_digtable.backoff_val));
+
+        rtl92c_dm_write_dig(hw);
+}
+
+static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
+{
+        static u8 binitialized; /* initialized to false */
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+        bool b_multi_sta = false;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                b_multi_sta = true;
+
+        if ((b_multi_sta == false) || (dm_digtable.cursta_connectctate !=
+                                       DIG_STA_DISCONNECT)) {
+                binitialized = false;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+                return;
+        } else if (binitialized == false) {
+                binitialized = true;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
+                dm_digtable.cur_igvalue = 0x20;
+                rtl92c_dm_write_dig(hw);
+        }
+
+        if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
+                if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
+                    (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
+
+                        if (dm_digtable.dig_ext_port_stage ==
+                            DIG_EXT_PORT_STAGE_2) {
+                                dm_digtable.cur_igvalue = 0x20;
+                                rtl92c_dm_write_dig(hw);
+                        }
+
+                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
+                } else if (rssi_strength > dm_digtable.rssi_highthresh) {
+                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
+                        rtl92c_dm_ctrl_initgain_by_fa(hw);
+                }
+        } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
+                dm_digtable.cur_igvalue = 0x20;
+                rtl92c_dm_write_dig(hw);
+        }
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("curmultista_connectstate = "
+                  "%x dig_ext_port_stage %x\n",
+                  dm_digtable.curmultista_connectstate,
+                  dm_digtable.dig_ext_port_stage));
+}
+
+static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("presta_connectstate = %x,"
+                  " cursta_connectctate = %x\n",
+                  dm_digtable.presta_connectstate,
+                  dm_digtable.cursta_connectctate));
+
+        if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
+            || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
+            || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
+
+                if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
+                        dm_digtable.rssi_val_min =
+                            rtl92c_dm_initial_gain_min_pwdb(hw);
+                        rtl92c_dm_ctrl_initgain_by_rssi(hw);
+                }
+        } else {
+                dm_digtable.rssi_val_min = 0;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+                dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
+                dm_digtable.cur_igvalue = 0x20;
+                dm_digtable.pre_igvalue = 0;
+                rtl92c_dm_write_dig(hw);
+        }
+}
+
+static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
+                dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
+
+                if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
+                        if (dm_digtable.rssi_val_min <= 25)
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_LowRssi;
+                        else
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_HighRssi;
+                } else {
+                        if (dm_digtable.rssi_val_min <= 20)
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_LowRssi;
+                        else
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_HighRssi;
+                }
+        } else {
+                dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
+        }
+
+        if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
+                if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
+                        if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
+                                dm_digtable.cur_cck_fa_state =
+                                    CCK_FA_STAGE_High;
+                        else
+                                dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
+
+                        if (dm_digtable.pre_cck_fa_state !=
+                            dm_digtable.cur_cck_fa_state) {
+                                if (dm_digtable.cur_cck_fa_state ==
+                                    CCK_FA_STAGE_Low)
+                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
+                                                      0x83);
+                                else
+                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
+                                                      0xcd);
+
+                                dm_digtable.pre_cck_fa_state =
+                                    dm_digtable.cur_cck_fa_state;
+                        }
+
+                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
+
+                        if (IS_92C_SERIAL(rtlhal->version))
+                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
+                                              MASKBYTE2, 0xd7);
+                } else {
+                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
+                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
+
+                        if (IS_92C_SERIAL(rtlhal->version))
+                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
+                                              MASKBYTE2, 0xd3);
+                }
+                dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
+        }
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
+}
+
+static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        if (mac->act_scanning == true)
+                return;
+
+        if ((mac->link_state > MAC80211_NOLINK) &&
+            (mac->link_state < MAC80211_LINKED))
+                dm_digtable.cursta_connectctate = DIG_STA_BEFORE_CONNECT;
+        else if (mac->link_state >= MAC80211_LINKED)
+                dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
+        else
+                dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
+
+        rtl92c_dm_initial_gain_sta(hw);
+        rtl92c_dm_initial_gain_multi_sta(hw);
+        rtl92c_dm_cck_packet_detection_thresh(hw);
+
+        dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
+
+}
+
+static void rtl92c_dm_dig(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->dm.b_dm_initialgain_enable == false)
+                return;
+        if (dm_digtable.dig_enable_flag == false)
+                return;
+
+        rtl92c_dm_ctrl_initgain_by_twoport(hw);
+
+}
+
+static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.bdynamic_txpower_enable = false;
+
+        rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
+        rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+}
+
+static void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long undecorated_smoothed_pwdb;
+
+        if (!rtlpriv->dm.bdynamic_txpower_enable)
+                return;
+
+        if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+                return;
+        }
+
+        if ((mac->link_state < MAC80211_LINKED) &&
+            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("Not connected to any\n"));
+
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+
+                rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
+                return;
+        }
+
+        if (mac->link_state >= MAC80211_LINKED) {
+                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                        undecorated_smoothed_pwdb =
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                 ("AP Client PWDB = 0x%lx\n",
+                                  undecorated_smoothed_pwdb));
+                } else {
+                        undecorated_smoothed_pwdb =
+                            rtlpriv->dm.undecorated_smoothed_pwdb;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                 ("STA Default Port PWDB = 0x%lx\n",
+                                  undecorated_smoothed_pwdb));
+                }
+        } else {
+                undecorated_smoothed_pwdb =
+                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("AP Ext Port PWDB = 0x%lx\n",
+                          undecorated_smoothed_pwdb));
+        }
+
+        if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
+        } else if ((undecorated_smoothed_pwdb <
+                    (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
+                   (undecorated_smoothed_pwdb >=
+                    TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
+
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
+        } else if (undecorated_smoothed_pwdb <
+                   (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_NORMAL\n"));
+        }
+
+        if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
+                          rtlphy->current_channel));
+                rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+        }
+
+        rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
+}
+
+void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
+                 ("cur_igvalue = 0x%x, "
+                  "pre_igvalue = 0x%x, backoff_val = %d\n",
+                  dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
+                  dm_digtable.backoff_val));
+
+        if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
+                rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
+                              dm_digtable.cur_igvalue);
+                rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
+                              dm_digtable.cur_igvalue);
+
+                dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
+        }
+}
+
+static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
+
+        u8 h2c_parameter[3] = { 0 };
+
+        return;
+
+        if (tmpentry_max_pwdb != 0) {
+                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
+                    tmpentry_max_pwdb;
+        } else {
+                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
+        }
+
+        if (tmpentry_min_pwdb != 0xff) {
+                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
+                    tmpentry_min_pwdb;
+        } else {
+                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
+        }
+
+        h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
+        h2c_parameter[0] = 0;
+
+        rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
+}
+
+void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        rtlpriv->dm.bcurrent_turbo_edca = false;
+        rtlpriv->dm.bis_any_nonbepkts = false;
+        rtlpriv->dm.bis_cur_rdlstate = false;
+}
+
+static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        static u64 last_txok_cnt;
+        static u64 last_rxok_cnt;
+        u64 cur_txok_cnt;
+        u64 cur_rxok_cnt;
+        u32 edca_be_ul = 0x5ea42b;
+        u32 edca_be_dl = 0x5ea42b;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                goto dm_checkedcaturbo_exit;
+
+        if (mac->link_state != MAC80211_LINKED) {
+                rtlpriv->dm.bcurrent_turbo_edca = false;
+                return;
+        }
+
+        if (!mac->ht_enable) {  /*FIX MERGE */
+                if (!(edca_be_ul & 0xffff0000))
+                        edca_be_ul |= 0x005e0000;
+
+                if (!(edca_be_dl & 0xffff0000))
+                        edca_be_dl |= 0x005e0000;
+        }
+
+        if ((!rtlpriv->dm.bis_any_nonbepkts) &&
+            (!rtlpriv->dm.b_disable_framebursting)) {
+                cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
+                cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
+                if (cur_rxok_cnt > 4 * cur_txok_cnt) {
+                        if (!rtlpriv->dm.bis_cur_rdlstate ||
+                            !rtlpriv->dm.bcurrent_turbo_edca) {
+                                rtl_write_dword(rtlpriv,
+                                                REG_EDCA_BE_PARAM,
+                                                edca_be_dl);
+                                rtlpriv->dm.bis_cur_rdlstate = true;
+                        }
+                } else {
+                        if (rtlpriv->dm.bis_cur_rdlstate ||
+                            !rtlpriv->dm.bcurrent_turbo_edca) {
+                                rtl_write_dword(rtlpriv,
+                                                REG_EDCA_BE_PARAM,
+                                                edca_be_ul);
+                                rtlpriv->dm.bis_cur_rdlstate = false;
+                        }
+                }
+                rtlpriv->dm.bcurrent_turbo_edca = true;
+        } else {
+                if (rtlpriv->dm.bcurrent_turbo_edca) {
+                        u8 tmp = AC0_BE;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_AC_PARAM,
+                                                      (u8 *) (&tmp));
+                        rtlpriv->dm.bcurrent_turbo_edca = false;
+                }
+        }
+
+dm_checkedcaturbo_exit:
+        rtlpriv->dm.bis_any_nonbepkts = false;
+        last_txok_cnt = rtlpriv->stats.txbytesunicast;
+        last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
+}
+
+static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
+                                                             *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 thermalvalue, delta, delta_lck, delta_iqk;
+        long ele_a, ele_d, temp_cck, val_x, value32;
+        long val_y, ele_c;
+        u8 ofdm_index[2], cck_index, ofdm_index_old[2], cck_index_old;
+        int i;
+        bool is2t = IS_92C_SERIAL(rtlhal->version);
+        u8 txpwr_level[2] = {0, 0};
+        u8 ofdm_min_index = 6, rf;
+
+        rtlpriv->dm.btxpower_trackingInit = true;
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
+
+        thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
+                  "eeprom_thermalmeter 0x%x\n",
+                  thermalvalue, rtlpriv->dm.thermalvalue,
+                  rtlefuse->eeprom_thermalmeter));
+
+        rtl92c_phy_ap_calibrate(hw, (thermalvalue -
+                                     rtlefuse->eeprom_thermalmeter));
+        if (is2t)
+                rf = 2;
+        else
+                rf = 1;
+
+        if (thermalvalue) {
+                ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                      MASKDWORD) & MASKOFDM_D;
+
+                for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
+                        if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
+                                ofdm_index_old[0] = (u8) i;
+
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                        ("Initial pathA ele_d reg0x%x = 0x%lx, "
+                                         "ofdm_index=0x%x\n",
+                                         ROFDM0_XATXIQIMBALANCE,
+                                         ele_d, ofdm_index_old[0]));
+                                break;
+                        }
+                }
+
+                if (is2t) {
+                        ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
+                                              MASKDWORD) & MASKOFDM_D;
+
+                        for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
+                                if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
+                                        ofdm_index_old[1] = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                           DBG_LOUD,
+                                           ("Initial pathB ele_d reg0x%x = "
+                                           "0x%lx, ofdm_index=0x%x\n",
+                                           ROFDM0_XBTXIQIMBALANCE, ele_d,
+                                           ofdm_index_old[1]));
+                                        break;
+                                }
+                        }
+                }
+
+                temp_cck =
+                    rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
+
+                for (i = 0; i < CCK_TABLE_LENGTH; i++) {
+                        if (rtlpriv->dm.b_cck_inch14) {
+                                if (memcmp((void *)&temp_cck,
+                                           (void *)&cckswing_table_ch14[i][2],
+                                           4) == 0) {
+                                        cck_index_old = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                                 DBG_LOUD,
+                                                 ("Initial reg0x%x = 0x%lx, "
+                                                  "cck_index=0x%x, ch 14 %d\n",
+                                                  RCCK0_TXFILTER2, temp_cck,
+                                                  cck_index_old,
+                                                  rtlpriv->dm.b_cck_inch14));
+                                        break;
+                                }
+                        } else {
+                                if (memcmp((void *)&temp_cck,
+                                           (void *)
+                                           &cckswing_table_ch1ch13[i][2],
+                                           4) == 0) {
+                                        cck_index_old = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                                 DBG_LOUD,
+                                                 ("Initial reg0x%x = 0x%lx, "
+                                                  "cck_index=0x%x, ch14 %d\n",
+                                                  RCCK0_TXFILTER2, temp_cck,
+                                                  cck_index_old,
+                                                  rtlpriv->dm.b_cck_inch14));
+                                        break;
+                                }
+                        }
+                }
+
+                if (!rtlpriv->dm.thermalvalue) {
+                        rtlpriv->dm.thermalvalue =
+                            rtlefuse->eeprom_thermalmeter;
+                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
+                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
+                        for (i = 0; i < rf; i++)
+                                rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
+                        rtlpriv->dm.cck_index = cck_index_old;
+                }
+
+                delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue) :
+                    (rtlpriv->dm.thermalvalue - thermalvalue);
+
+                delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
+                    (rtlpriv->dm.thermalvalue_lck - thermalvalue);
+
+                delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
+                    (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
+
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                        ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
+                         "eeprom_thermalmeter 0x%x delta 0x%x "
+                         "delta_lck 0x%x delta_iqk 0x%x\n",
+                         thermalvalue, rtlpriv->dm.thermalvalue,
+                         rtlefuse->eeprom_thermalmeter, delta, delta_lck,
+                         delta_iqk));
+
+                if (delta_lck > 1) {
+                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
+                        rtl92c_phy_lc_calibrate(hw);
+                }
+
+                if (delta > 0 && rtlpriv->dm.txpower_track_control) {
+                        if (thermalvalue > rtlpriv->dm.thermalvalue) {
+                                for (i = 0; i < rf; i++)
+                                        rtlpriv->dm.ofdm_index[i] -= delta;
+                                rtlpriv->dm.cck_index -= delta;
+                        } else {
+                                for (i = 0; i < rf; i++)
+                                        rtlpriv->dm.ofdm_index[i] += delta;
+                                rtlpriv->dm.cck_index += delta;
+                        }
+
+                        if (is2t) {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("temp OFDM_A_index=0x%x, "
+                                          "OFDM_B_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          rtlpriv->dm.ofdm_index[0],
+                                          rtlpriv->dm.ofdm_index[1],
+                                          rtlpriv->dm.cck_index));
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("temp OFDM_A_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          rtlpriv->dm.ofdm_index[0],
+                                          rtlpriv->dm.cck_index));
+                        }
+
+                        if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
+                                for (i = 0; i < rf; i++)
+                                        ofdm_index[i] =
+                                            rtlpriv->dm.ofdm_index[i]
+                                            + 1;
+                                cck_index = rtlpriv->dm.cck_index + 1;
+                        } else {
+                                for (i = 0; i < rf; i++)
+                                        ofdm_index[i] =
+                                            rtlpriv->dm.ofdm_index[i];
+                                cck_index = rtlpriv->dm.cck_index;
+                        }
+
+                        for (i = 0; i < rf; i++) {
+                                if (txpwr_level[i] >= 0 &&
+                                    txpwr_level[i] <= 26) {
+                                        if (thermalvalue >
+                                            rtlefuse->eeprom_thermalmeter) {
+                                                if (delta < 5)
+                                                        ofdm_index[i] -= 1;
+
+                                                else
+                                                        ofdm_index[i] -= 2;
+                                        } else if (delta > 5 && thermalvalue <
+                                                   rtlefuse->
+                                                   eeprom_thermalmeter) {
+                                                ofdm_index[i] += 1;
+                                        }
+                                } else if (txpwr_level[i] >= 27 &&
+                                           txpwr_level[i] <= 32
+                                           && thermalvalue >
+                                           rtlefuse->eeprom_thermalmeter) {
+                                        if (delta < 5)
+                                                ofdm_index[i] -= 1;
+
+                                        else
+                                                ofdm_index[i] -= 2;
+                                } else if (txpwr_level[i] >= 32 &&
+                                           txpwr_level[i] <= 38 &&
+                                           thermalvalue >
+                                           rtlefuse->eeprom_thermalmeter
+                                           && delta > 5) {
+                                        ofdm_index[i] -= 1;
+                                }
+                        }
+
+                        if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
+                                if (thermalvalue >
+                                    rtlefuse->eeprom_thermalmeter) {
+                                        if (delta < 5)
+                                                cck_index -= 1;
+
+                                        else
+                                                cck_index -= 2;
+                                } else if (delta > 5 && thermalvalue <
+                                           rtlefuse->eeprom_thermalmeter) {
+                                        cck_index += 1;
+                                }
+                        } else if (txpwr_level[i] >= 27 &&
+                                   txpwr_level[i] <= 32 &&
+                                   thermalvalue >
+                                   rtlefuse->eeprom_thermalmeter) {
+                                if (delta < 5)
+                                        cck_index -= 1;
+
+                                else
+                                        cck_index -= 2;
+                        } else if (txpwr_level[i] >= 32 &&
+                                   txpwr_level[i] <= 38 &&
+                                   thermalvalue > rtlefuse->eeprom_thermalmeter
+                                   && delta > 5) {
+                                cck_index -= 1;
+                        }
+
+                        for (i = 0; i < rf; i++) {
+                                if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
+                                        ofdm_index[i] = OFDM_TABLE_SIZE - 1;
+
+                                else if (ofdm_index[i] < ofdm_min_index)
+                                        ofdm_index[i] = ofdm_min_index;
+                        }
+
+                        if (cck_index > CCK_TABLE_SIZE - 1)
+                                cck_index = CCK_TABLE_SIZE - 1;
+                        else if (cck_index < 0)
+                                cck_index = 0;
+
+                        if (is2t) {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("new OFDM_A_index=0x%x, "
+                                          "OFDM_B_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          ofdm_index[0], ofdm_index[1],
+                                          cck_index));
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("new OFDM_A_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          ofdm_index[0], cck_index));
+                        }
+                }
+
+                if (rtlpriv->dm.txpower_track_control && delta != 0) {
+                        ele_d =
+                            (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
+                        val_x = rtlphy->reg_e94;
+                        val_y = rtlphy->reg_e9c;
+
+                        if (val_x != 0) {
+                                if ((val_x & 0x00000200) != 0)
+                                        val_x = val_x | 0xFFFFFC00;
+                                ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
+
+                                if ((val_y & 0x00000200) != 0)
+                                        val_y = val_y | 0xFFFFFC00;
+                                ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
+
+                                value32 = (ele_d << 22) |
+                                    ((ele_c & 0x3F) << 16) | ele_a;
+
+                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                              MASKDWORD, value32);
+
+                                value32 = (ele_c & 0x000003C0) >> 6;
+                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
+                                              value32);
+
+                                value32 = ((val_x * ele_d) >> 7) & 0x01;
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(31), value32);
+
+                                value32 = ((val_y * ele_d) >> 7) & 0x01;
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(29), value32);
+                        } else {
+                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                              MASKDWORD,
+                                              ofdmswing_table[ofdm_index[0]]);
+
+                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
+                                              0x00);
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(31) | BIT(29), 0x00);
+                        }
+
+                        if (!rtlpriv->dm.b_cck_inch14) {
+                                rtl_write_byte(rtlpriv, 0xa22,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [0]);
+                                rtl_write_byte(rtlpriv, 0xa23,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [1]);
+                                rtl_write_byte(rtlpriv, 0xa24,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [2]);
+                                rtl_write_byte(rtlpriv, 0xa25,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [3]);
+                                rtl_write_byte(rtlpriv, 0xa26,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [4]);
+                                rtl_write_byte(rtlpriv, 0xa27,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [5]);
+                                rtl_write_byte(rtlpriv, 0xa28,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [6]);
+                                rtl_write_byte(rtlpriv, 0xa29,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [7]);
+                        } else {
+                                rtl_write_byte(rtlpriv, 0xa22,
+                                               cckswing_table_ch14[cck_index]
+                                               [0]);
+                                rtl_write_byte(rtlpriv, 0xa23,
+                                               cckswing_table_ch14[cck_index]
+                                               [1]);
+                                rtl_write_byte(rtlpriv, 0xa24,
+                                               cckswing_table_ch14[cck_index]
+                                               [2]);
+                                rtl_write_byte(rtlpriv, 0xa25,
+                                               cckswing_table_ch14[cck_index]
+                                               [3]);
+                                rtl_write_byte(rtlpriv, 0xa26,
+                                               cckswing_table_ch14[cck_index]
+                                               [4]);
+                                rtl_write_byte(rtlpriv, 0xa27,
+                                               cckswing_table_ch14[cck_index]
+                                               [5]);
+                                rtl_write_byte(rtlpriv, 0xa28,
+                                               cckswing_table_ch14[cck_index]
+                                               [6]);
+                                rtl_write_byte(rtlpriv, 0xa29,
+                                               cckswing_table_ch14[cck_index]
+                                               [7]);
+                        }
+
+                        if (is2t) {
+                                ele_d = (ofdmswing_table[ofdm_index[1]] &
+                                         0xFFC00000) >> 22;
+
+                                val_x = rtlphy->reg_eb4;
+                                val_y = rtlphy->reg_ebc;
+
+                                if (val_x != 0) {
+                                        if ((val_x & 0x00000200) != 0)
+                                                val_x = val_x | 0xFFFFFC00;
+                                        ele_a = ((val_x * ele_d) >> 8) &
+                                            0x000003FF;
+
+                                        if ((val_y & 0x00000200) != 0)
+                                                val_y = val_y | 0xFFFFFC00;
+                                        ele_c = ((val_y * ele_d) >> 8) &
+                                            0x00003FF;
+
+                                        value32 = (ele_d << 22) |
+                                            ((ele_c & 0x3F) << 16) | ele_a;
+                                        rtl_set_bbreg(hw,
+                                                      ROFDM0_XBTXIQIMBALANCE,
+                                                      MASKDWORD, value32);
+
+                                        value32 = (ele_c & 0x000003C0) >> 6;
+                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
+                                                      MASKH4BITS, value32);
+
+                                        value32 = ((val_x * ele_d) >> 7) & 0x01;
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(27), value32);
+
+                                        value32 = ((val_y * ele_d) >> 7) & 0x01;
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(25), value32);
+                                } else {
+                                        rtl_set_bbreg(hw,
+                                                      ROFDM0_XBTXIQIMBALANCE,
+                                                      MASKDWORD,
+                                                      ofdmswing_table[ofdm_index
+                                                                      [1]]);
+                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
+                                                      MASKH4BITS, 0x00);
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(27) | BIT(25), 0x00);
+                                }
+
+                        }
+                }
+
+                if (delta_iqk > 3) {
+                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
+                        rtl92c_phy_iq_calibrate(hw, false);
+                }
+
+                if (rtlpriv->dm.txpower_track_control)
+                        rtlpriv->dm.thermalvalue = thermalvalue;
+        }
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
+
+}
+
+static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
+                                                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.btxpower_tracking = true;
+        rtlpriv->dm.btxpower_trackingInit = false;
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("pMgntInfo->btxpower_tracking = %d\n",
+                  rtlpriv->dm.btxpower_tracking));
+}
+
+static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
+}
+
+static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
+}
+
+static void rtl92c_dm_check_txpower_tracking_thermal_meter(
+                                                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        static u8 tm_trigger;
+
+        if (!rtlpriv->dm.btxpower_tracking)
+                return;
+
+        if (!tm_trigger) {
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
+                              0x60);
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                         ("Trigger 92S Thermal Meter!!\n"));
+                tm_trigger = 1;
+                return;
+        } else {
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                         ("Schedule TxPowerTracking direct call!!\n"));
+                rtl92c_dm_txpower_tracking_directcall(hw);
+                tm_trigger = 0;
+        }
+}
+
+void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
+}
+
+void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rate_adaptive *p_ra = &(rtlpriv->ra);
+
+        p_ra->ratr_state = DM_RATR_STA_INIT;
+        p_ra->pre_ratr_state = DM_RATR_STA_INIT;
+
+        if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
+                rtlpriv->dm.b_useramask = true;
+        else
+                rtlpriv->dm.b_useramask = false;
+
+}
+
+static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rate_adaptive *p_ra = &(rtlpriv->ra);
+        u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
+
+        if (is_hal_stop(rtlhal)) {
+                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                         ("<---- driver is going to unload\n"));
+                return;
+        }
+
+        if (!rtlpriv->dm.b_useramask) {
+                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                        ("<---- driver does not control rate adaptive mask\n"));
+                return;
+        }
+
+        if (mac->link_state == MAC80211_LINKED) {
+
+                switch (p_ra->pre_ratr_state) {
+                case DM_RATR_STA_HIGH:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                case DM_RATR_STA_MIDDLE:
+                        high_rssithresh_for_ra = 55;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                case DM_RATR_STA_LOW:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 25;
+                        break;
+                default:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                }
+
+                if (rtlpriv->dm.undecorated_smoothed_pwdb >
+                    (long)high_rssithresh_for_ra)
+                        p_ra->ratr_state = DM_RATR_STA_HIGH;
+                else if (rtlpriv->dm.undecorated_smoothed_pwdb >
+                         (long)low_rssithresh_for_ra)
+                        p_ra->ratr_state = DM_RATR_STA_MIDDLE;
+                else
+                        p_ra->ratr_state = DM_RATR_STA_LOW;
+
+                if (p_ra->pre_ratr_state != p_ra->ratr_state) {
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("RSSI = %ld\n",
+                                  rtlpriv->dm.undecorated_smoothed_pwdb));
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("PreState = %d, CurState = %d\n",
+                                  p_ra->pre_ratr_state, p_ra->ratr_state));
+
+                        rtlpriv->cfg->ops->update_rate_mask(hw,
+                                        p_ra->ratr_state);
+
+                        p_ra->pre_ratr_state = p_ra->ratr_state;
+                }
+        }
+}
+
+static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
+{
+        dm_pstable.pre_ccastate = CCA_MAX;
+        dm_pstable.cur_ccasate = CCA_MAX;
+        dm_pstable.pre_rfstate = RF_MAX;
+        dm_pstable.cur_rfstate = RF_MAX;
+        dm_pstable.rssi_val_min = 0;
+}
+
+static void rtl92c_dm_1r_cca(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (dm_pstable.rssi_val_min != 0) {
+                if (dm_pstable.pre_ccastate == CCA_2R) {
+                        if (dm_pstable.rssi_val_min >= 35)
+                                dm_pstable.cur_ccasate = CCA_1R;
+                        else
+                                dm_pstable.cur_ccasate = CCA_2R;
+                } else {
+                        if (dm_pstable.rssi_val_min <= 30)
+                                dm_pstable.cur_ccasate = CCA_2R;
+                        else
+                                dm_pstable.cur_ccasate = CCA_1R;
+                }
+        } else {
+                dm_pstable.cur_ccasate = CCA_MAX;
+        }
+
+        if (dm_pstable.pre_ccastate != dm_pstable.cur_ccasate) {
+                if (dm_pstable.cur_ccasate == CCA_1R) {
+                        if (get_rf_type(rtlphy) == RF_2T2R) {
+                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
+                                              MASKBYTE0, 0x13);
+                                rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x20);
+                        } else {
+                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
+                                              MASKBYTE0, 0x23);
+                                rtl_set_bbreg(hw, 0xe70, 0x7fc00000, 0x10c);
+                        }
+                } else {
+                        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0,
+                                      0x33);
+                        rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x63);
+                }
+                dm_pstable.pre_ccastate = dm_pstable.cur_ccasate;
+        }
+
+        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, ("CCAStage = %s\n",
+                                               (dm_pstable.cur_ccasate ==
+                                                0) ? "1RCCA" : "2RCCA"));
+}
+
+void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
+{
+        static u8 initialize;
+        static u32 reg_874, reg_c70, reg_85c, reg_a74;
+
+        if (initialize == 0) {
+                reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                         MASKDWORD) & 0x1CC000) >> 14;
+
+                reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
+                                         MASKDWORD) & BIT(3)) >> 3;
+
+                reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
+                                         MASKDWORD) & 0xFF000000) >> 24;
+
+                reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
+
+                initialize = 1;
+        }
+
+        if (!bforce_in_normal) {
+                if (dm_pstable.rssi_val_min != 0) {
+                        if (dm_pstable.pre_rfstate == RF_NORMAL) {
+                                if (dm_pstable.rssi_val_min >= 30)
+                                        dm_pstable.cur_rfstate = RF_SAVE;
+                                else
+                                        dm_pstable.cur_rfstate = RF_NORMAL;
+                        } else {
+                                if (dm_pstable.rssi_val_min <= 25)
+                                        dm_pstable.cur_rfstate = RF_NORMAL;
+                                else
+                                        dm_pstable.cur_rfstate = RF_SAVE;
+                        }
+                } else {
+                        dm_pstable.cur_rfstate = RF_MAX;
+                }
+        } else {
+                dm_pstable.cur_rfstate = RF_NORMAL;
+        }
+
+        if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
+                if (dm_pstable.cur_rfstate == RF_SAVE) {
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0x1C0000, 0x2);
+                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
+                                      0xFF000000, 0x63);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0xC000, 0x2);
+                        rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
+                } else {
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0x1CC000, reg_874);
+                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
+                                      reg_c70);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
+                                      reg_85c);
+                        rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
+                }
+
+                dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
+        }
+}
+
+static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (((mac->link_state == MAC80211_NOLINK)) &&
+            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
+                dm_pstable.rssi_val_min = 0;
+                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                         ("Not connected to any\n"));
+        }
+
+        if (mac->link_state == MAC80211_LINKED) {
+                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                        dm_pstable.rssi_val_min =
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                                 ("AP Client PWDB = 0x%lx\n",
+                                  dm_pstable.rssi_val_min));
+                } else {
+                        dm_pstable.rssi_val_min =
+                            rtlpriv->dm.undecorated_smoothed_pwdb;
+                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                                 ("STA Default Port PWDB = 0x%lx\n",
+                                  dm_pstable.rssi_val_min));
+                }
+        } else {
+                dm_pstable.rssi_val_min =
+                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+
+                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                         ("AP Ext Port PWDB = 0x%lx\n",
+                          dm_pstable.rssi_val_min));
+        }
+
+        if (IS_92C_SERIAL(rtlhal->version))
+                rtl92c_dm_1r_cca(hw);
+}
+
+void rtl92c_dm_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
+        rtl92c_dm_diginit(hw);
+        rtl92c_dm_init_dynamic_txpower(hw);
+        rtl92c_dm_init_edca_turbo(hw);
+        rtl92c_dm_init_rate_adaptive_mask(hw);
+        rtl92c_dm_initialize_txpower_tracking(hw);
+        rtl92c_dm_init_dynamic_bb_powersaving(hw);
+}
+
+void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool b_fw_current_inpsmode = false;
+        bool b_fw_ps_awake = true;
+
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
+                                      (u8 *) (&b_fw_current_inpsmode));
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
+                                      (u8 *) (&b_fw_ps_awake));
+
+        if ((ppsc->rfpwr_state == ERFON) && ((!b_fw_current_inpsmode) &&
+                                             b_fw_ps_awake)
+            && (!ppsc->rfchange_inprogress)) {
+                rtl92c_dm_pwdb_monitor(hw);
+                rtl92c_dm_dig(hw);
+                rtl92c_dm_false_alarm_counter_statistics(hw);
+                rtl92c_dm_dynamic_bb_powersaving(hw);
+                rtl92c_dm_dynamic_txpower(hw);
+                rtl92c_dm_check_txpower_tracking(hw);
+                rtl92c_dm_refresh_rate_adaptive_mask(hw);
+                rtl92c_dm_check_edca_turbo(hw);
+        }
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h
new file mode 100644
index 000000000000..463439e4074c
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h
@@ -0,0 +1,196 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_DM_H__
+#define __RTL92C_DM_H__
+
+#define HAL_DM_DIG_DISABLE                      BIT(0)
+#define HAL_DM_HIPWR_DISABLE                    BIT(1)
+
+#define OFDM_TABLE_LENGTH                       37
+#define CCK_TABLE_LENGTH                        33
+
+#define OFDM_TABLE_SIZE                         37
+#define CCK_TABLE_SIZE                          33
+
+#define BW_AUTO_SWITCH_HIGH_LOW                 25
+#define BW_AUTO_SWITCH_LOW_HIGH                 30
+
+#define DM_DIG_THRESH_HIGH                      40
+#define DM_DIG_THRESH_LOW                       35
+
+#define DM_FALSEALARM_THRESH_LOW                400
+#define DM_FALSEALARM_THRESH_HIGH               1000
+
+#define DM_DIG_MAX                              0x3e
+#define DM_DIG_MIN                              0x1e
+
+#define DM_DIG_FA_UPPER                         0x32
+#define DM_DIG_FA_LOWER                         0x20
+#define DM_DIG_FA_TH0                           0x20
+#define DM_DIG_FA_TH1                           0x100
+#define DM_DIG_FA_TH2                           0x200
+
+#define DM_DIG_BACKOFF_MAX                      12
+#define DM_DIG_BACKOFF_MIN                      -4
+#define DM_DIG_BACKOFF_DEFAULT                  10
+
+#define RXPATHSELECTION_SS_TH_lOW               30
+#define RXPATHSELECTION_DIFF_TH                 18
+
+#define DM_RATR_STA_INIT                        0
+#define DM_RATR_STA_HIGH                        1
+#define DM_RATR_STA_MIDDLE                      2
+#define DM_RATR_STA_LOW                         3
+
+#define CTS2SELF_THVAL                          30
+#define REGC38_TH                               20
+
+#define WAIOTTHVal                              25
+
+#define TXHIGHPWRLEVEL_NORMAL                   0
+#define TXHIGHPWRLEVEL_LEVEL1                   1
+#define TXHIGHPWRLEVEL_LEVEL2                   2
+#define TXHIGHPWRLEVEL_BT1                      3
+#define TXHIGHPWRLEVEL_BT2                      4
+
+#define DM_TYPE_BYFW                            0
+#define DM_TYPE_BYDRIVER                        1
+
+#define TX_POWER_NEAR_FIELD_THRESH_LVL2         74
+#define TX_POWER_NEAR_FIELD_THRESH_LVL1         67
+
+struct ps_t {
+        u8 pre_ccastate;
+        u8 cur_ccasate;
+        u8 pre_rfstate;
+        u8 cur_rfstate;
+        long rssi_val_min;
+};
+
+struct dig_t {
+        u8 dig_enable_flag;
+        u8 dig_ext_port_stage;
+        u32 rssi_lowthresh;
+        u32 rssi_highthresh;
+        u32 fa_lowthresh;
+        u32 fa_highthresh;
+        u8 cursta_connectctate;
+        u8 presta_connectstate;
+        u8 curmultista_connectstate;
+        u8 pre_igvalue;
+        u8 cur_igvalue;
+        char backoff_val;
+        char backoff_val_range_max;
+        char backoff_val_range_min;
+        u8 rx_gain_range_max;
+        u8 rx_gain_range_min;
+        u8 rssi_val_min;
+        u8 pre_cck_pd_state;
+        u8 cur_cck_pd_state;
+        u8 pre_cck_fa_state;
+        u8 cur_cck_fa_state;
+        u8 pre_ccastate;
+        u8 cur_ccasate;
+};
+
+struct swat_t {
+        u8 failure_cnt;
+        u8 try_flag;
+        u8 stop_trying;
+        long pre_rssi;
+        long trying_threshold;
+        u8 cur_antenna;
+        u8 pre_antenna;
+};
+
+enum tag_dynamic_init_gain_operation_type_definition {
+        DIG_TYPE_THRESH_HIGH = 0,
+        DIG_TYPE_THRESH_LOW = 1,
+        DIG_TYPE_BACKOFF = 2,
+        DIG_TYPE_RX_GAIN_MIN = 3,
+        DIG_TYPE_RX_GAIN_MAX = 4,
+        DIG_TYPE_ENABLE = 5,
+        DIG_TYPE_DISABLE = 6,
+        DIG_OP_TYPE_MAX
+};
+
+enum tag_cck_packet_detection_threshold_type_definition {
+        CCK_PD_STAGE_LowRssi = 0,
+        CCK_PD_STAGE_HighRssi = 1,
+        CCK_FA_STAGE_Low = 2,
+        CCK_FA_STAGE_High = 3,
+        CCK_PD_STAGE_MAX = 4,
+};
+
+enum dm_1r_cca_e {
+        CCA_1R = 0,
+        CCA_2R = 1,
+        CCA_MAX = 2,
+};
+
+enum dm_rf_e {
+        RF_SAVE = 0,
+        RF_NORMAL = 1,
+        RF_MAX = 2,
+};
+
+enum dm_sw_ant_switch_e {
+        ANS_ANTENNA_B = 1,
+        ANS_ANTENNA_A = 2,
+        ANS_ANTENNA_MAX = 3,
+};
+
+enum dm_dig_ext_port_alg_e {
+        DIG_EXT_PORT_STAGE_0 = 0,
+        DIG_EXT_PORT_STAGE_1 = 1,
+        DIG_EXT_PORT_STAGE_2 = 2,
+        DIG_EXT_PORT_STAGE_3 = 3,
+        DIG_EXT_PORT_STAGE_MAX = 4,
+};
+
+enum dm_dig_connect_e {
+        DIG_STA_DISCONNECT = 0,
+        DIG_STA_CONNECT = 1,
+        DIG_STA_BEFORE_CONNECT = 2,
+        DIG_MULTISTA_DISCONNECT = 3,
+        DIG_MULTISTA_CONNECT = 4,
+        DIG_CONNECT_MAX
+};
+
+extern struct dig_t dm_digtable;
+void rtl92c_dm_init(struct ieee80211_hw *hw);
+void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
+void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
+void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
+void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
+void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
+void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c
new file mode 100644
index 000000000000..11dd22b987e7
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c
@@ -0,0 +1,804 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include <linux/firmware.h>
+#include "../wifi.h"
+#include "../pci.h"
+#include "../base.h"
+#include "reg.h"
+#include "def.h"
+#include "fw.h"
+#include "table.h"
+
+static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
+                u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
+                if (enable)
+                        value32 |= MCUFWDL_EN;
+                else
+                        value32 &= ~MCUFWDL_EN;
+                rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
+        } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
+                u8 tmp;
+                if (enable) {
+
+                        tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
+                        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
+                                       tmp | 0x04);
+
+                        tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
+                        rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
+
+                        tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
+                        rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
+                } else {
+
+                        tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
+                        rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
+
+                        rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
+                }
+        }
+}
+
+static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
+                                   const u8 *buffer, u32 size)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 blockSize = sizeof(u32);
+        u8 *bufferPtr = (u8 *) buffer;
+        u32 *pu4BytePtr = (u32 *) buffer;
+        u32 i, offset, blockCount, remainSize;
+
+        blockCount = size / blockSize;
+        remainSize = size % blockSize;
+
+        for (i = 0; i < blockCount; i++) {
+                offset = i * blockSize;
+                rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
+                                *(pu4BytePtr + i));
+        }
+
+        if (remainSize) {
+                offset = blockCount * blockSize;
+                bufferPtr += offset;
+                for (i = 0; i < remainSize; i++) {
+                        rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
+                                                 offset + i), *(bufferPtr + i));
+                }
+        }
+}
+
+static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
+                                  u32 page, const u8 *buffer, u32 size)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 value8;
+        u8 u8page = (u8) (page & 0x07);
+
+        value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
+
+        rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
+        _rtl92c_fw_block_write(hw, buffer, size);
+}
+
+static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
+{
+        u32 fwlen = *pfwlen;
+        u8 remain = (u8) (fwlen % 4);
+
+        remain = (remain == 0) ? 0 : (4 - remain);
+
+        while (remain > 0) {
+                pfwbuf[fwlen] = 0;
+                fwlen++;
+                remain--;
+        }
+
+        *pfwlen = fwlen;
+}
+
+static void _rtl92c_write_fw(struct ieee80211_hw *hw,
+                             enum version_8192c version, u8 *buffer, u32 size)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool is_version_b;
+        u8 *bufferPtr = (u8 *) buffer;
+
+        RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
+
+        is_version_b = IS_CHIP_VER_B(version);
+        if (is_version_b) {
+                u32 pageNums, remainSize;
+                u32 page, offset;
+
+                if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE)
+                        _rtl92c_fill_dummy(bufferPtr, &size);
+
+                pageNums = size / FW_8192C_PAGE_SIZE;
+                remainSize = size % FW_8192C_PAGE_SIZE;
+
+                if (pageNums > 4) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Page numbers should not greater then 4\n"));
+                }
+
+                for (page = 0; page < pageNums; page++) {
+                        offset = page * FW_8192C_PAGE_SIZE;
+                        _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
+                                              FW_8192C_PAGE_SIZE);
+                }
+
+                if (remainSize) {
+                        offset = pageNums * FW_8192C_PAGE_SIZE;
+                        page = pageNums;
+                        _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
+                                              remainSize);
+                }
+        } else {
+                _rtl92c_fw_block_write(hw, buffer, size);
+        }
+}
+
+static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int err = -EIO;
+        u32 counter = 0;
+        u32 value32;
+
+        do {
+                value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
+        } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
+                 (!(value32 & FWDL_ChkSum_rpt)));
+
+        if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
+                          value32));
+                goto exit;
+        }
+
+        RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
+                 ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
+
+        value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
+        value32 |= MCUFWDL_RDY;
+        value32 &= ~WINTINI_RDY;
+        rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
+
+        counter = 0;
+
+        do {
+                value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
+                if (value32 & WINTINI_RDY) {
+                        RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
+                                 ("Polling FW ready success!!"
+                                 " REG_MCUFWDL:0x%08x .\n",
+                                 value32));
+                        err = 0;
+                        goto exit;
+                }
+
+                mdelay(FW_8192C_POLLING_DELAY);
+
+        } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
+
+        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                 ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
+
+exit:
+        return err;
+}
+
+int rtl92c_download_fw(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl92c_firmware_header *pfwheader;
+        u8 *pfwdata;
+        u32 fwsize;
+        int err;
+        enum version_8192c version = rtlhal->version;
+
+        const struct firmware *firmware = NULL;
+
+        err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
+                               rtlpriv->io.dev);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Failed to request firmware!\n"));
+                return 1;
+        }
+
+        if (firmware->size > 0x4000) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Firmware is too big!\n"));
+                release_firmware(firmware);
+                return 1;
+        }
+
+        memcpy(rtlhal->pfirmware, firmware->data, firmware->size);
+        fwsize = firmware->size;
+        release_firmware(firmware);
+
+        pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
+        pfwdata = (u8 *) rtlhal->pfirmware;
+
+        if (IS_FW_HEADER_EXIST(pfwheader)) {
+                RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
+                         ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
+                          pfwheader->version, pfwheader->signature,
+                          (uint)sizeof(struct rtl92c_firmware_header)));
+
+                pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
+                fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
+        }
+
+        _rtl92c_enable_fw_download(hw, true);
+        _rtl92c_write_fw(hw, version, pfwdata, fwsize);
+        _rtl92c_enable_fw_download(hw, false);
+
+        err = _rtl92c_fw_free_to_go(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Firmware is not ready to run!\n"));
+        } else {
+                RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
+                         ("Firmware is ready to run!\n"));
+        }
+
+        return 0;
+}
+
+static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 val_hmetfr, val_mcutst_1;
+        bool result = false;
+
+        val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
+        val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
+
+        if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
+                result = true;
+        return result;
+}
+
+static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
+                              u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 boxnum;
+        u16 box_reg, box_extreg;
+        u8 u1b_tmp;
+        bool isfw_read = false;
+        u8 buf_index;
+        bool bwrite_sucess = false;
+        u8 wait_h2c_limmit = 100;
+        u8 wait_writeh2c_limmit = 100;
+        u8 boxcontent[4], boxextcontent[2];
+        u32 h2c_waitcounter = 0;
+        unsigned long flag;
+        u8 idx;
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
+
+        while (true) {
+                spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
+                if (rtlhal->b_h2c_setinprogress) {
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                                 ("H2C set in progress! Wait to set.."
+                                  "element_id(%d).\n", element_id));
+
+                        while (rtlhal->b_h2c_setinprogress) {
+                                spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
+                                                       flag);
+                                h2c_waitcounter++;
+                                RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                                         ("Wait 100 us (%d times)...\n",
+                                          h2c_waitcounter));
+                                udelay(100);
+
+                                if (h2c_waitcounter > 1000)
+                                        return;
+                                spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
+                                                  flag);
+                        }
+                        spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
+                } else {
+                        rtlhal->b_h2c_setinprogress = true;
+                        spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
+                        break;
+                }
+        }
+
+        while (!bwrite_sucess) {
+                wait_writeh2c_limmit--;
+                if (wait_writeh2c_limmit == 0) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Write H2C fail because no trigger "
+                                  "for FW INT!\n"));
+                        break;
+                }
+
+                boxnum = rtlhal->last_hmeboxnum;
+                switch (boxnum) {
+                case 0:
+                        box_reg = REG_HMEBOX_0;
+                        box_extreg = REG_HMEBOX_EXT_0;
+                        break;
+                case 1:
+                        box_reg = REG_HMEBOX_1;
+                        box_extreg = REG_HMEBOX_EXT_1;
+                        break;
+                case 2:
+                        box_reg = REG_HMEBOX_2;
+                        box_extreg = REG_HMEBOX_EXT_2;
+                        break;
+                case 3:
+                        box_reg = REG_HMEBOX_3;
+                        box_extreg = REG_HMEBOX_EXT_3;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+
+                isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
+                while (!isfw_read) {
+
+                        wait_h2c_limmit--;
+                        if (wait_h2c_limmit == 0) {
+                                RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                                         ("Wating too long for FW read "
+                                          "clear HMEBox(%d)!\n", boxnum));
+                                break;
+                        }
+
+                        udelay(10);
+
+                        isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
+                        u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                                 ("Wating for FW read clear HMEBox(%d)!!! "
+                                  "0x1BF = %2x\n", boxnum, u1b_tmp));
+                }
+
+                if (!isfw_read) {
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                                 ("Write H2C register BOX[%d] fail!!!!! "
+                                  "Fw do not read.\n", boxnum));
+                        break;
+                }
+
+                memset(boxcontent, 0, sizeof(boxcontent));
+                memset(boxextcontent, 0, sizeof(boxextcontent));
+                boxcontent[0] = element_id;
+                RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                         ("Write element_id box_reg(%4x) = %2x\n",
+                          box_reg, element_id));
+
+                switch (cmd_len) {
+                case 1:
+                        boxcontent[0] &= ~(BIT(7));
+                        memcpy((u8 *) (boxcontent) + 1,
+                               p_cmdbuffer + buf_index, 1);
+
+                        for (idx = 0; idx < 4; idx++) {
+                                rtl_write_byte(rtlpriv, box_reg + idx,
+                                               boxcontent[idx]);
+                        }
+                        break;
+                case 2:
+                        boxcontent[0] &= ~(BIT(7));
+                        memcpy((u8 *) (boxcontent) + 1,
+                               p_cmdbuffer + buf_index, 2);
+
+                        for (idx = 0; idx < 4; idx++) {
+                                rtl_write_byte(rtlpriv, box_reg + idx,
+                                               boxcontent[idx]);
+                        }
+                        break;
+                case 3:
+                        boxcontent[0] &= ~(BIT(7));
+                        memcpy((u8 *) (boxcontent) + 1,
+                               p_cmdbuffer + buf_index, 3);
+
+                        for (idx = 0; idx < 4; idx++) {
+                                rtl_write_byte(rtlpriv, box_reg + idx,
+                                               boxcontent[idx]);
+                        }
+                        break;
+                case 4:
+                        boxcontent[0] |= (BIT(7));
+                        memcpy((u8 *) (boxextcontent),
+                               p_cmdbuffer + buf_index, 2);
+                        memcpy((u8 *) (boxcontent) + 1,
+                               p_cmdbuffer + buf_index + 2, 2);
+
+                        for (idx = 0; idx < 2; idx++) {
+                                rtl_write_byte(rtlpriv, box_extreg + idx,
+                                               boxextcontent[idx]);
+                        }
+
+                        for (idx = 0; idx < 4; idx++) {
+                                rtl_write_byte(rtlpriv, box_reg + idx,
+                                               boxcontent[idx]);
+                        }
+                        break;
+                case 5:
+                        boxcontent[0] |= (BIT(7));
+                        memcpy((u8 *) (boxextcontent),
+                               p_cmdbuffer + buf_index, 2);
+                        memcpy((u8 *) (boxcontent) + 1,
+                               p_cmdbuffer + buf_index + 2, 3);
+
+                        for (idx = 0; idx < 2; idx++) {
+                                rtl_write_byte(rtlpriv, box_extreg + idx,
+                                               boxextcontent[idx]);
+                        }
+
+                        for (idx = 0; idx < 4; idx++) {
+                                rtl_write_byte(rtlpriv, box_reg + idx,
+                                               boxcontent[idx]);
+                        }
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+
+                bwrite_sucess = true;
+
+                rtlhal->last_hmeboxnum = boxnum + 1;
+                if (rtlhal->last_hmeboxnum == 4)
+                        rtlhal->last_hmeboxnum = 0;
+
+                RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
+                         ("pHalData->last_hmeboxnum  = %d\n",
+                          rtlhal->last_hmeboxnum));
+        }
+
+        spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
+        rtlhal->b_h2c_setinprogress = false;
+        spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
+}
+
+void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
+                         u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u32 tmp_cmdbuf[2];
+
+        if (rtlhal->bfw_ready == false) {
+                RT_ASSERT(false, ("return H2C cmd because of Fw "
+                                  "download fail!!!\n"));
+                return;
+        }
+
+        memset(tmp_cmdbuf, 0, 8);
+        memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
+        _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
+
+        return;
+}
+
+void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
+{
+        u8 u1b_tmp;
+        u8 delay = 100;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
+        u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
+
+        while (u1b_tmp & BIT(2)) {
+                delay--;
+                if (delay == 0) {
+                        RT_ASSERT(false, ("8051 reset fail.\n"));
+                        break;
+                }
+                udelay(50);
+                u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
+        }
+}
+
+void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 u1_h2c_set_pwrmode[3] = {0};
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
+
+        SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
+        SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
+        SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
+                                              ppsc->reg_max_lps_awakeintvl);
+
+        RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
+                      "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
+                      u1_h2c_set_pwrmode, 3);
+        rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
+
+}
+
+static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
+                                    struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl8192_tx_ring *ring;
+        struct rtl_tx_desc *pdesc;
+        u8 own;
+        unsigned long flags;
+        struct sk_buff *pskb = NULL;
+
+        ring = &rtlpci->tx_ring[BEACON_QUEUE];
+
+        pskb = __skb_dequeue(&ring->queue);
+        if (pskb)
+                kfree_skb(pskb);
+
+        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
+
+        pdesc = &ring->desc[0];
+        own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc, true, HW_DESC_OWN);
+
+        rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
+
+        __skb_queue_tail(&ring->queue, skb);
+
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+
+        rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
+
+        return true;
+}
+
+#define BEACON_PG               0 /*->1*/
+#define PSPOLL_PG               2
+#define NULL_PG                 3
+#define PROBERSP_PG             4 /*->5*/
+
+#define TOTAL_RESERVED_PKT_LEN  768
+
+static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
+        /* page 0 beacon */
+        0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
+        0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
+        0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
+        0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
+        0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
+        0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
+        0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
+        0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
+        0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
+        0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+        /* page 1 beacon */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+        /* page 2  ps-poll */
+        0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
+        0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
+        0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+        /* page 3  null */
+        0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
+        0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
+        0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
+        0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+        /* page 4  probe_resp */
+        0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
+        0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
+        0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
+        0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
+        0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
+        0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
+        0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
+        0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
+        0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
+        0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
+        0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
+        0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+        /* page 5  probe_resp */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct sk_buff *skb = NULL;
+
+        u32 totalpacketlen;
+        bool rtstatus;
+        u8 u1RsvdPageLoc[3] = {0};
+        bool b_dlok = false;
+
+        u8 *beacon;
+        u8 *p_pspoll;
+        u8 *nullfunc;
+        u8 *p_probersp;
+        /*---------------------------------------------------------
+                                (1) beacon
+        ---------------------------------------------------------*/
+        beacon = &reserved_page_packet[BEACON_PG * 128];
+        SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
+        SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
+
+        /*-------------------------------------------------------
+                                (2) ps-poll
+        --------------------------------------------------------*/
+        p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
+        SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
+        SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
+        SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
+
+        SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
+
+        /*--------------------------------------------------------
+                                (3) null data
+        ---------------------------------------------------------*/
+        nullfunc = &reserved_page_packet[NULL_PG * 128];
+        SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
+        SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
+        SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
+
+        SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
+
+        /*---------------------------------------------------------
+                                (4) probe response
+        ----------------------------------------------------------*/
+        p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
+        SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
+        SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
+        SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
+
+        SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
+
+        totalpacketlen = TOTAL_RESERVED_PKT_LEN;
+
+        RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
+                      "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
+                      &reserved_page_packet[0], totalpacketlen);
+        RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
+                      "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
+                      u1RsvdPageLoc, 3);
+
+
+        skb = dev_alloc_skb(totalpacketlen);
+        memcpy((u8 *) skb_put(skb, totalpacketlen),
+               &reserved_page_packet, totalpacketlen);
+
+        rtstatus = _rtl92c_cmd_send_packet(hw, skb);
+
+        if (rtstatus)
+                b_dlok = true;
+
+        if (b_dlok) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("Set RSVD page location to Fw.\n"));
+                RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
+                                "H2C_RSVDPAGE:\n",
+                                u1RsvdPageLoc, 3);
+                rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
+                                    sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
+        } else
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
+}
+
+void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
+{
+        u8 u1_joinbssrpt_parm[1] = {0};
+
+        SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
+
+        rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/fw.h b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.h
new file mode 100644
index 000000000000..3db33bd14666
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.h
@@ -0,0 +1,98 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C__FW__H__
+#define __RTL92C__FW__H__
+
+#define FW_8192C_SIZE                           0x3000
+#define FW_8192C_START_ADDRESS                  0x1000
+#define FW_8192C_END_ADDRESS                    0x3FFF
+#define FW_8192C_PAGE_SIZE                      4096
+#define FW_8192C_POLLING_DELAY                  5
+#define FW_8192C_POLLING_TIMEOUT_COUNT          100
+
+#define IS_FW_HEADER_EXIST(_pfwhdr)     \
+        ((_pfwhdr->signature&0xFFF0) == 0x92C0 ||\
+        (_pfwhdr->signature&0xFFF0) == 0x88C0)
+
+struct rtl92c_firmware_header {
+        u16 signature;
+        u8 category;
+        u8 function;
+        u16 version;
+        u8 subversion;
+        u8 rsvd1;
+        u8 month;
+        u8 date;
+        u8 hour;
+        u8 minute;
+        u16 ramcodeSize;
+        u16 rsvd2;
+        u32 svnindex;
+        u32 rsvd3;
+        u32 rsvd4;
+        u32 rsvd5;
+};
+
+enum rtl8192c_h2c_cmd {
+        H2C_AP_OFFLOAD = 0,
+        H2C_SETPWRMODE = 1,
+        H2C_JOINBSSRPT = 2,
+        H2C_RSVDPAGE = 3,
+        H2C_RSSI_REPORT = 5,
+        H2C_RA_MASK = 6,
+        MAX_H2CCMD
+};
+
+#define pagenum_128(_len)       (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
+
+#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val)                  \
+        SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
+#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val)              \
+        SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
+#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \
+        SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
+#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val)             \
+        SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)             \
+        SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)                \
+        SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)             \
+        SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
+
+int rtl92c_download_fw(struct ieee80211_hw *hw);
+void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
+                         u32 cmd_len, u8 *p_cmdbuffer);
+void rtl92c_firmware_selfreset(struct ieee80211_hw *hw);
+void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
+void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
+void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
new file mode 100644
index 000000000000..1266dbe44176
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
@@ -0,0 +1,2173 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../efuse.h"
+#include "../base.h"
+#include "../cam.h"
+#include "../ps.h"
+#include "../pci.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "dm.h"
+#include "fw.h"
+#include "led.h"
+#include "hw.h"
+
+#define LLT_CONFIG      5
+
+static void _rtl92ce_set_bcn_ctrl_reg(struct ieee80211_hw *hw,
+                                      u8 set_bits, u8 clear_bits)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpci->reg_bcn_ctrl_val |= set_bits;
+        rtlpci->reg_bcn_ctrl_val &= ~clear_bits;
+
+        rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlpci->reg_bcn_ctrl_val);
+}
+
+static void _rtl92ce_stop_tx_beacon(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tmp1byte;
+
+        tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
+        rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6)));
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64);
+        tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
+        tmp1byte &= ~(BIT(0));
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
+}
+
+static void _rtl92ce_resume_tx_beacon(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 tmp1byte;
+
+        tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
+        rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6));
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
+        tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
+        tmp1byte |= BIT(0);
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
+}
+
+static void _rtl92ce_enable_bcn_sub_func(struct ieee80211_hw *hw)
+{
+        _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(1));
+}
+
+static void _rtl92ce_disable_bcn_sub_func(struct ieee80211_hw *hw)
+{
+        _rtl92ce_set_bcn_ctrl_reg(hw, BIT(1), 0);
+}
+
+void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        switch (variable) {
+        case HW_VAR_RCR:
+                *((u32 *) (val)) = rtlpci->receive_config;
+                break;
+        case HW_VAR_RF_STATE:
+                *((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
+                break;
+        case HW_VAR_FWLPS_RF_ON:{
+                        enum rf_pwrstate rfState;
+                        u32 val_rcr;
+
+                        rtlpriv->cfg->ops->get_hw_reg(hw,
+                                                      HW_VAR_RF_STATE,
+                                                      (u8 *) (&rfState));
+                        if (rfState == ERFOFF) {
+                                *((bool *) (val)) = true;
+                        } else {
+                                val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
+                                val_rcr &= 0x00070000;
+                                if (val_rcr)
+                                        *((bool *) (val)) = false;
+                                else
+                                        *((bool *) (val)) = true;
+                        }
+                        break;
+                }
+        case HW_VAR_FW_PSMODE_STATUS:
+                *((bool *) (val)) = ppsc->b_fw_current_inpsmode;
+                break;
+        case HW_VAR_CORRECT_TSF:{
+                u64 tsf;
+                u32 *ptsf_low = (u32 *)&tsf;
+                u32 *ptsf_high = ((u32 *)&tsf) + 1;
+
+                *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4));
+                *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
+
+                *((u64 *) (val)) = tsf;
+
+                break;
+                }
+        case HW_VAR_MGT_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP0);
+                break;
+        case HW_VAR_CTRL_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP1);
+                break;
+        case HW_VAR_DATA_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP2);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+}
+
+void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        u8 idx;
+
+        switch (variable) {
+        case HW_VAR_ETHER_ADDR:{
+                        for (idx = 0; idx < ETH_ALEN; idx++) {
+                                rtl_write_byte(rtlpriv, (REG_MACID + idx),
+                                               val[idx]);
+                        }
+                        break;
+                }
+        case HW_VAR_BASIC_RATE:{
+                        u16 b_rate_cfg = ((u16 *) val)[0];
+                        u8 rate_index = 0;
+                        b_rate_cfg = b_rate_cfg & 0x15f;
+                        b_rate_cfg |= 0x01;
+                        rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff);
+                        rtl_write_byte(rtlpriv, REG_RRSR + 1,
+                                       (b_rate_cfg >> 8)&0xff);
+                        while (b_rate_cfg > 0x1) {
+                                b_rate_cfg = (b_rate_cfg >> 1);
+                                rate_index++;
+                        }
+                        rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,
+                                       rate_index);
+                        break;
+                }
+        case HW_VAR_BSSID:{
+                        for (idx = 0; idx < ETH_ALEN; idx++) {
+                                rtl_write_byte(rtlpriv, (REG_BSSID + idx),
+                                               val[idx]);
+                        }
+                        break;
+                }
+        case HW_VAR_SIFS:{
+                        rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]);
+
+                        rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);
+
+                        if (!mac->ht_enable)
+                                rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
+                                               0x0e0e);
+                        else
+                                rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
+                                               *((u16 *) val));
+                        break;
+                }
+        case HW_VAR_SLOT_TIME:{
+                        u8 e_aci;
+
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("HW_VAR_SLOT_TIME %x\n", val[0]));
+
+                        rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
+
+                        for (e_aci = 0; e_aci < AC_MAX; e_aci++) {
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                              HW_VAR_AC_PARAM,
+                                                              (u8 *) (&e_aci));
+                        }
+                        break;
+                }
+        case HW_VAR_ACK_PREAMBLE:{
+                        u8 reg_tmp;
+                        u8 short_preamble = (bool) (*(u8 *) val);
+                        reg_tmp = (mac->cur_40_prime_sc) << 5;
+                        if (short_preamble)
+                                reg_tmp |= 0x80;
+
+                        rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp);
+                        break;
+                }
+        case HW_VAR_AMPDU_MIN_SPACE:{
+                        u8 min_spacing_to_set;
+                        u8 sec_min_space;
+
+                        min_spacing_to_set = *((u8 *) val);
+                        if (min_spacing_to_set <= 7) {
+                                sec_min_space = 0;
+
+                                if (min_spacing_to_set < sec_min_space)
+                                        min_spacing_to_set = sec_min_space;
+
+                                mac->min_space_cfg = ((mac->min_space_cfg &
+                                                       0xf8) |
+                                                      min_spacing_to_set);
+
+                                *val = min_spacing_to_set;
+
+                                RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                         ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
+                                          mac->min_space_cfg));
+
+                                rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
+                                               mac->min_space_cfg);
+                        }
+                        break;
+                }
+        case HW_VAR_SHORTGI_DENSITY:{
+                        u8 density_to_set;
+
+                        density_to_set = *((u8 *) val);
+                        mac->min_space_cfg |= (density_to_set << 3);
+
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("Set HW_VAR_SHORTGI_DENSITY: %#x\n",
+                                  mac->min_space_cfg));
+
+                        rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
+                                       mac->min_space_cfg);
+
+                        break;
+                }
+        case HW_VAR_AMPDU_FACTOR:{
+                        u8 regtoset_normal[4] = { 0x41, 0xa8, 0x72, 0xb9 };
+
+                        u8 factor_toset;
+                        u8 *p_regtoset = NULL;
+                        u8 index = 0;
+
+                        p_regtoset = regtoset_normal;
+
+                        factor_toset = *((u8 *) val);
+                        if (factor_toset <= 3) {
+                                factor_toset = (1 << (factor_toset + 2));
+                                if (factor_toset > 0xf)
+                                        factor_toset = 0xf;
+
+                                for (index = 0; index < 4; index++) {
+                                        if ((p_regtoset[index] & 0xf0) >
+                                            (factor_toset << 4))
+                                                p_regtoset[index] =
+                                                    (p_regtoset[index] & 0x0f) |
+                                                    (factor_toset << 4);
+
+                                        if ((p_regtoset[index] & 0x0f) >
+                                            factor_toset)
+                                                p_regtoset[index] =
+                                                    (p_regtoset[index] & 0xf0) |
+                                                    (factor_toset);
+
+                                        rtl_write_byte(rtlpriv,
+                                                       (REG_AGGLEN_LMT + index),
+                                                       p_regtoset[index]);
+
+                                }
+
+                                RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                         ("Set HW_VAR_AMPDU_FACTOR: %#x\n",
+                                          factor_toset));
+                        }
+                        break;
+                }
+        case HW_VAR_AC_PARAM:{
+                        u8 e_aci = *((u8 *) val);
+                        u32 u4b_ac_param = 0;
+
+                        u4b_ac_param |= (u32) mac->ac[e_aci].aifs;
+                        u4b_ac_param |= ((u32) mac->ac[e_aci].cw_min
+                                         & 0xF) << AC_PARAM_ECW_MIN_OFFSET;
+                        u4b_ac_param |= ((u32) mac->ac[e_aci].cw_max &
+                                         0xF) << AC_PARAM_ECW_MAX_OFFSET;
+                        u4b_ac_param |= (u32) mac->ac[e_aci].tx_op
+                            << AC_PARAM_TXOP_LIMIT_OFFSET;
+
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("queue:%x, ac_param:%x\n", e_aci,
+                                  u4b_ac_param));
+
+                        switch (e_aci) {
+                        case AC1_BK:
+                                rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC0_BE:
+                                rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC2_VI:
+                                rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC3_VO:
+                                rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        default:
+                                RT_ASSERT(false,
+                                  ("SetHwReg8185(): invalid aci: %d !\n",
+                                   e_aci));
+                                break;
+                        }
+
+                        if (rtlpci->acm_method != eAcmWay2_SW)
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                              HW_VAR_ACM_CTRL,
+                                                              (u8 *) (&e_aci));
+                        break;
+                }
+        case HW_VAR_ACM_CTRL:{
+                        u8 e_aci = *((u8 *) val);
+                        union aci_aifsn *p_aci_aifsn =
+                            (union aci_aifsn *)(&(mac->ac[0].aifs));
+                        u8 acm = p_aci_aifsn->f.acm;
+                        u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL);
+
+                        acm_ctrl =
+                            acm_ctrl | ((rtlpci->acm_method == 2) ? 0x0 : 0x1);
+
+                        if (acm) {
+                                switch (e_aci) {
+                                case AC0_BE:
+                                        acm_ctrl |= AcmHw_BeqEn;
+                                        break;
+                                case AC2_VI:
+                                        acm_ctrl |= AcmHw_ViqEn;
+                                        break;
+                                case AC3_VO:
+                                        acm_ctrl |= AcmHw_VoqEn;
+                                        break;
+                                default:
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("HW_VAR_ACM_CTRL acm set "
+                                                  "failed: eACI is %d\n", acm));
+                                        break;
+                                }
+                        } else {
+                                switch (e_aci) {
+                                case AC0_BE:
+                                        acm_ctrl &= (~AcmHw_BeqEn);
+                                        break;
+                                case AC2_VI:
+                                        acm_ctrl &= (~AcmHw_ViqEn);
+                                        break;
+                                case AC3_VO:
+                                        acm_ctrl &= (~AcmHw_BeqEn);
+                                        break;
+                                default:
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                                 ("switch case not process\n"));
+                                        break;
+                                }
+                        }
+
+                        RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
+                                 ("SetHwReg8190pci(): [HW_VAR_ACM_CTRL] "
+                                  "Write 0x%X\n", acm_ctrl));
+                        rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
+                        break;
+                }
+        case HW_VAR_RCR:{
+                        rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);
+                        rtlpci->receive_config = ((u32 *) (val))[0];
+                        break;
+                }
+        case HW_VAR_RETRY_LIMIT:{
+                        u8 retry_limit = ((u8 *) (val))[0];
+
+                        rtl_write_word(rtlpriv, REG_RL,
+                                       retry_limit << RETRY_LIMIT_SHORT_SHIFT |
+                                       retry_limit << RETRY_LIMIT_LONG_SHIFT);
+                        break;
+                }
+        case HW_VAR_DUAL_TSF_RST:
+                rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
+                break;
+        case HW_VAR_EFUSE_BYTES:
+                rtlefuse->efuse_usedbytes = *((u16 *) val);
+                break;
+        case HW_VAR_EFUSE_USAGE:
+                rtlefuse->efuse_usedpercentage = *((u8 *) val);
+                break;
+        case HW_VAR_IO_CMD:
+                rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val));
+                break;
+        case HW_VAR_WPA_CONFIG:
+                rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
+                break;
+        case HW_VAR_SET_RPWM:{
+                        u8 rpwm_val;
+
+                        rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM);
+                        udelay(1);
+
+                        if (rpwm_val & BIT(7)) {
+                                rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
+                                               (*(u8 *) val));
+                        } else {
+                                rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
+                                               ((*(u8 *) val) | BIT(7)));
+                        }
+
+                        break;
+                }
+        case HW_VAR_H2C_FW_PWRMODE:{
+                        u8 psmode = (*(u8 *) val);
+
+                        if ((psmode != FW_PS_ACTIVE_MODE) &&
+                            (!IS_92C_SERIAL(rtlhal->version))) {
+                                rtl92c_dm_rf_saving(hw, true);
+                        }
+
+                        rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val));
+                        break;
+                }
+        case HW_VAR_FW_PSMODE_STATUS:
+                ppsc->b_fw_current_inpsmode = *((bool *) val);
+                break;
+        case HW_VAR_H2C_FW_JOINBSSRPT:{
+                        u8 mstatus = (*(u8 *) val);
+                        u8 tmp_regcr, tmp_reg422;
+                        bool b_recover = false;
+
+                        if (mstatus == RT_MEDIA_CONNECT) {
+                                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID,
+                                                              NULL);
+
+                                tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1);
+                                rtl_write_byte(rtlpriv, REG_CR + 1,
+                                               (tmp_regcr | BIT(0)));
+
+                                _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3));
+                                _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
+
+                                tmp_reg422 =
+                                    rtl_read_byte(rtlpriv,
+                                                  REG_FWHW_TXQ_CTRL + 2);
+                                if (tmp_reg422 & BIT(6))
+                                        b_recover = true;
+                                rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
+                                               tmp_reg422 & (~BIT(6)));
+
+                                rtl92c_set_fw_rsvdpagepkt(hw, 0);
+
+                                _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0);
+                                _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
+
+                                if (b_recover) {
+                                        rtl_write_byte(rtlpriv,
+                                                       REG_FWHW_TXQ_CTRL + 2,
+                                                       tmp_reg422);
+                                }
+
+                                rtl_write_byte(rtlpriv, REG_CR + 1,
+                                               (tmp_regcr & ~(BIT(0))));
+                        }
+                        rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
+
+                        break;
+                }
+        case HW_VAR_AID:{
+                        u16 u2btmp;
+                        u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT);
+                        u2btmp &= 0xC000;
+                        rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp |
+                                                mac->assoc_id));
+
+                        break;
+                }
+        case HW_VAR_CORRECT_TSF:{
+                        u8 btype_ibss = ((u8 *) (val))[0];
+
+                        /*btype_ibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ?
+                                        1 : 0;*/
+
+                        if (btype_ibss == true)
+                                _rtl92ce_stop_tx_beacon(hw);
+
+                        _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3));
+
+                        rtl_write_dword(rtlpriv, REG_TSFTR,
+                                        (u32) (mac->tsf & 0xffffffff));
+                        rtl_write_dword(rtlpriv, REG_TSFTR + 4,
+                                        (u32) ((mac->tsf >> 32)&0xffffffff));
+
+                        _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0);
+
+                        if (btype_ibss == true)
+                                _rtl92ce_resume_tx_beacon(hw);
+
+                        break;
+
+                }
+        case HW_VAR_MGT_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP0, *(u16 *) val);
+                break;
+        case HW_VAR_CTRL_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP1, *(u16 *) val);
+                break;
+        case HW_VAR_DATA_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *) val);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case "
+                                                        "not process\n"));
+                break;
+        }
+}
+
+static bool _rtl92ce_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        bool status = true;
+        long count = 0;
+        u32 value = _LLT_INIT_ADDR(address) |
+            _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
+
+        rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
+
+        do {
+                value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
+                if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
+                        break;
+
+                if (count > POLLING_LLT_THRESHOLD) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Failed to polling write LLT done at "
+                                  "address %d!\n", address));
+                        status = false;
+                        break;
+                }
+        } while (++count);
+
+        return status;
+}
+
+static bool _rtl92ce_llt_table_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        unsigned short i;
+        u8 txpktbuf_bndy;
+        u8 maxPage;
+        bool status;
+
+#if LLT_CONFIG == 1
+        maxPage = 255;
+        txpktbuf_bndy = 252;
+#elif LLT_CONFIG == 2
+        maxPage = 127;
+        txpktbuf_bndy = 124;
+#elif LLT_CONFIG == 3
+        maxPage = 255;
+        txpktbuf_bndy = 174;
+#elif LLT_CONFIG == 4
+        maxPage = 255;
+        txpktbuf_bndy = 246;
+#elif LLT_CONFIG == 5
+        maxPage = 255;
+        txpktbuf_bndy = 246;
+#endif
+
+#if LLT_CONFIG == 1
+        rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c);
+        rtl_write_dword(rtlpriv, REG_RQPN, 0x80a71c1c);
+#elif LLT_CONFIG == 2
+        rtl_write_dword(rtlpriv, REG_RQPN, 0x845B1010);
+#elif LLT_CONFIG == 3
+        rtl_write_dword(rtlpriv, REG_RQPN, 0x84838484);
+#elif LLT_CONFIG == 4
+        rtl_write_dword(rtlpriv, REG_RQPN, 0x80bd1c1c);
+#elif LLT_CONFIG == 5
+        rtl_write_word(rtlpriv, REG_RQPN_NPQ, 0x0000);
+
+        rtl_write_dword(rtlpriv, REG_RQPN, 0x80b01c29);
+#endif
+
+        rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, (0x27FF0000 | txpktbuf_bndy));
+        rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy);
+
+        rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+
+        rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_PBP, 0x11);
+        rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4);
+
+        for (i = 0; i < (txpktbuf_bndy - 1); i++) {
+                status = _rtl92ce_llt_write(hw, i, i + 1);
+                if (true != status)
+                        return status;
+        }
+
+        status = _rtl92ce_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
+        if (true != status)
+                return status;
+
+        for (i = txpktbuf_bndy; i < maxPage; i++) {
+                status = _rtl92ce_llt_write(hw, i, (i + 1));
+                if (true != status)
+                        return status;
+        }
+
+        status = _rtl92ce_llt_write(hw, maxPage, txpktbuf_bndy);
+        if (true != status)
+                return status;
+
+        return true;
+}
+
+static void _rtl92ce_gen_refresh_led_state(struct ieee80211_hw *hw)
+{
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
+
+        if (rtlpci->up_first_time)
+                return;
+
+        if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS)
+                rtl92ce_sw_led_on(hw, pLed0);
+        else if (ppsc->rfoff_reason == RF_CHANGE_BY_INIT)
+                rtl92ce_sw_led_on(hw, pLed0);
+        else
+                rtl92ce_sw_led_off(hw, pLed0);
+
+}
+
+static bool _rtl92ce_init_mac(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        unsigned char bytetmp;
+        unsigned short wordtmp;
+        u16 retry;
+
+        rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00);
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
+        rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F);
+
+        bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0);
+        udelay(2);
+
+        rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp);
+        udelay(2);
+
+        bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1);
+        udelay(2);
+
+        retry = 0;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("reg0xec:%x:%x\n",
+                                                rtl_read_dword(rtlpriv, 0xEC),
+                                                bytetmp));
+
+        while ((bytetmp & BIT(0)) && retry < 1000) {
+                retry++;
+                udelay(50);
+                bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("reg0xec:%x:%x\n",
+                                                        rtl_read_dword(rtlpriv,
+                                                                       0xEC),
+                                                        bytetmp));
+                udelay(50);
+        }
+
+        rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012);
+
+        rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82);
+        udelay(2);
+
+        rtl_write_word(rtlpriv, REG_CR, 0x2ff);
+
+        if (_rtl92ce_llt_table_init(hw) == false)
+                return false;;
+
+        rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
+        rtl_write_byte(rtlpriv, REG_HISRE, 0xff);
+
+        rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x27ff);
+
+        wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL);
+        wordtmp &= 0xf;
+        wordtmp |= 0xF771;
+        rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp);
+
+        rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F);
+        rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config);
+        rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config);
+
+        rtl_write_byte(rtlpriv, 0x4d0, 0x0);
+
+        rtl_write_dword(rtlpriv, REG_BCNQ_DESA,
+                        ((u64) rtlpci->tx_ring[BEACON_QUEUE].dma) &
+                        DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_MGQ_DESA,
+                        (u64) rtlpci->tx_ring[MGNT_QUEUE].dma &
+                        DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_VOQ_DESA,
+                        (u64) rtlpci->tx_ring[VO_QUEUE].dma & DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_VIQ_DESA,
+                        (u64) rtlpci->tx_ring[VI_QUEUE].dma & DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_BEQ_DESA,
+                        (u64) rtlpci->tx_ring[BE_QUEUE].dma & DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_BKQ_DESA,
+                        (u64) rtlpci->tx_ring[BK_QUEUE].dma & DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_HQ_DESA,
+                        (u64) rtlpci->tx_ring[HIGH_QUEUE].dma &
+                        DMA_BIT_MASK(32));
+        rtl_write_dword(rtlpriv, REG_RX_DESA,
+                        (u64) rtlpci->rx_ring[RX_MPDU_QUEUE].dma &
+                        DMA_BIT_MASK(32));
+
+        if (IS_92C_SERIAL(rtlhal->version))
+                rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77);
+        else
+                rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22);
+
+        rtl_write_dword(rtlpriv, REG_INT_MIG, 0);
+
+        bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6));
+        do {
+                retry++;
+                bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL);
+        } while ((retry < 200) && (bytetmp & BIT(7)));
+
+        _rtl92ce_gen_refresh_led_state(hw);
+
+        rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0);
+
+        return true;;
+}
+
+static void _rtl92ce_hw_configure(struct ieee80211_hw *hw)
+{
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 reg_bw_opmode;
+        u32 reg_ratr, reg_prsr;
+
+        reg_bw_opmode = BW_OPMODE_20MHZ;
+        reg_ratr = RATE_ALL_CCK | RATE_ALL_OFDM_AG |
+            RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+        reg_prsr = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+
+        rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8);
+
+        rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
+
+        rtl_write_dword(rtlpriv, REG_RRSR, reg_prsr);
+
+        rtl_write_byte(rtlpriv, REG_SLOT, 0x09);
+
+        rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0);
+
+        rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80);
+
+        rtl_write_word(rtlpriv, REG_RL, 0x0707);
+
+        rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802);
+
+        rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF);
+
+        rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000);
+        rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504);
+        rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000);
+        rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504);
+
+        rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841);
+
+        rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2);
+
+        rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff);
+
+        rtlpci->reg_bcn_ctrl_val = 0x1f;
+        rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val);
+
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
+
+        rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
+
+        rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
+        rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
+
+        rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020);
+
+        rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020);
+
+        rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666);
+
+        rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
+
+        rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010);
+        rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010);
+
+        rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010);
+
+        rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010);
+
+        rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff);
+        rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff);
+
+}
+
+static void _rtl92ce_enable_aspm_back_door(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        rtl_write_byte(rtlpriv, 0x34b, 0x93);
+        rtl_write_word(rtlpriv, 0x350, 0x870c);
+        rtl_write_byte(rtlpriv, 0x352, 0x1);
+
+        if (ppsc->b_support_backdoor)
+                rtl_write_byte(rtlpriv, 0x349, 0x1b);
+        else
+                rtl_write_byte(rtlpriv, 0x349, 0x03);
+
+        rtl_write_word(rtlpriv, 0x350, 0x2718);
+        rtl_write_byte(rtlpriv, 0x352, 0x1);
+}
+
+void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 sec_reg_value;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
+                  rtlpriv->sec.pairwise_enc_algorithm,
+                  rtlpriv->sec.group_enc_algorithm));
+
+        if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("not open "
+                                                        "hw encryption\n"));
+                return;
+        }
+
+        sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable;
+
+        if (rtlpriv->sec.use_defaultkey) {
+                sec_reg_value |= SCR_TxUseDK;
+                sec_reg_value |= SCR_RxUseDK;
+        }
+
+        sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
+
+        rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
+
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                 ("The SECR-value %x\n", sec_reg_value));
+
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
+
+}
+
+int rtl92ce_hw_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        static bool iqk_initialized; /* initialized to false */
+        bool rtstatus = true;
+        bool is92c;
+        int err;
+        u8 tmp_u1b;
+
+        rtlpci->being_init_adapter = true;
+        rtlpriv->intf_ops->disable_aspm(hw);
+        rtstatus = _rtl92ce_init_mac(hw);
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Init MAC failed\n"));
+                err = 1;
+                return err;
+        }
+
+        err = rtl92c_download_fw(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Failed to download FW. Init HW "
+                          "without FW now..\n"));
+                err = 1;
+                rtlhal->bfw_ready = false;
+                return err;
+        } else {
+                rtlhal->bfw_ready = true;
+        }
+
+        rtlhal->last_hmeboxnum = 0;
+        rtl92c_phy_mac_config(hw);
+        rtl92c_phy_bb_config(hw);
+        rtlphy->rf_mode = RF_OP_BY_SW_3WIRE;
+        rtl92c_phy_rf_config(hw);
+        rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0,
+                                                 RF_CHNLBW, RFREG_OFFSET_MASK);
+        rtlphy->rfreg_chnlval[1] = rtl_get_rfreg(hw, (enum radio_path)1,
+                                                 RF_CHNLBW, RFREG_OFFSET_MASK);
+        rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1);
+        rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1);
+        rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
+        _rtl92ce_hw_configure(hw);
+        rtl_cam_reset_all_entry(hw);
+        rtl92ce_enable_hw_security_config(hw);
+        ppsc->rfpwr_state = ERFON;
+        tmp_u1b = rtl_read_byte(rtlpriv, REG_MAC_PINMUX_CFG)&(~BIT(3));
+        rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, tmp_u1b);
+        tmp_u1b = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
+        ppsc->rfoff_reason |= (tmp_u1b & BIT(3)) ? 0 : RF_CHANGE_BY_HW;
+        if (ppsc->rfoff_reason > RF_CHANGE_BY_PS)
+                rtl_ps_set_rf_state(hw, ERFOFF, ppsc->rfoff_reason, true);
+        else {
+                ppsc->rfpwr_state = ERFON;
+                ppsc->rfoff_reason = 0;
+                rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_ON);
+        }
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr);
+        _rtl92ce_enable_aspm_back_door(hw);
+        rtlpriv->intf_ops->enable_aspm(hw);
+        if (ppsc->rfpwr_state == ERFON) {
+                rtl92c_phy_set_rfpath_switch(hw, 1);
+                if (iqk_initialized)
+                        rtl92c_phy_iq_calibrate(hw, true);
+                else {
+                        rtl92c_phy_iq_calibrate(hw, false);
+                        iqk_initialized = true;
+                }
+
+                rtl92c_dm_check_txpower_tracking(hw);
+                rtl92c_phy_lc_calibrate(hw);
+        }
+
+        is92c = IS_92C_SERIAL(rtlhal->version);
+        tmp_u1b = efuse_read_1byte(hw, 0x1FA);
+        if (!(tmp_u1b & BIT(0))) {
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("PA BIAS path A\n"));
+        }
+
+        if (!(tmp_u1b & BIT(1)) && is92c) {
+                rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0F, 0x05);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("PA BIAS path B\n"));
+        }
+
+        if (!(tmp_u1b & BIT(4))) {
+                tmp_u1b = rtl_read_byte(rtlpriv, 0x16);
+                tmp_u1b &= 0x0F;
+                rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80);
+                udelay(10);
+                rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("under 1.5V\n"));
+        }
+        rtl92c_dm_init(hw);
+        rtlpci->being_init_adapter = false;
+        return err;
+}
+
+static enum version_8192c _rtl92ce_read_chip_version(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        enum version_8192c version = VERSION_UNKNOWN;
+        u32 value32;
+
+        value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
+        if (value32 & TRP_VAUX_EN) {
+                version = (value32 & TYPE_ID) ? VERSION_A_CHIP_92C :
+                           VERSION_A_CHIP_88C;
+        } else {
+                version = (value32 & TYPE_ID) ? VERSION_B_CHIP_92C :
+                           VERSION_B_CHIP_88C;
+        }
+
+        switch (version) {
+        case VERSION_B_CHIP_92C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
+                break;
+        case VERSION_B_CHIP_88C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Chip Version ID: VERSION_B_CHIP_88C.\n"));
+                break;
+        case VERSION_A_CHIP_92C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Chip Version ID: VERSION_A_CHIP_92C.\n"));
+                break;
+        case VERSION_A_CHIP_88C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Chip Version ID: VERSION_A_CHIP_88C.\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Chip Version ID: Unknown. Bug?\n"));
+                break;
+        }
+
+        switch (version & 0x3) {
+        case CHIP_88C:
+                rtlphy->rf_type = RF_1T1R;
+                break;
+        case CHIP_92C:
+                rtlphy->rf_type = RF_2T2R;
+                break;
+        case CHIP_92C_1T2R:
+                rtlphy->rf_type = RF_1T2R;
+                break;
+        default:
+                rtlphy->rf_type = RF_1T1R;
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("ERROR RF_Type is set!!"));
+                break;
+        }
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
+                  "RF_2T2R" : "RF_1T1R"));
+
+        return version;
+}
+
+static int _rtl92ce_set_media_status(struct ieee80211_hw *hw,
+                                     enum nl80211_iftype type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 bt_msr = rtl_read_byte(rtlpriv, MSR);
+        enum led_ctl_mode ledaction = LED_CTL_NO_LINK;
+        bt_msr &= 0xfc;
+
+        if (type == NL80211_IFTYPE_UNSPECIFIED ||
+            type == NL80211_IFTYPE_STATION) {
+                _rtl92ce_stop_tx_beacon(hw);
+                _rtl92ce_enable_bcn_sub_func(hw);
+        } else if (type == NL80211_IFTYPE_ADHOC || type == NL80211_IFTYPE_AP) {
+                _rtl92ce_resume_tx_beacon(hw);
+                _rtl92ce_disable_bcn_sub_func(hw);
+        } else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Set HW_VAR_MEDIA_STATUS: "
+                          "No such media status(%x).\n", type));
+        }
+
+        switch (type) {
+        case NL80211_IFTYPE_UNSPECIFIED:
+                bt_msr |= MSR_NOLINK;
+                ledaction = LED_CTL_LINK;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to NO LINK!\n"));
+                break;
+        case NL80211_IFTYPE_ADHOC:
+                bt_msr |= MSR_ADHOC;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to Ad Hoc!\n"));
+                break;
+        case NL80211_IFTYPE_STATION:
+                bt_msr |= MSR_INFRA;
+                ledaction = LED_CTL_LINK;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to STA!\n"));
+                break;
+        case NL80211_IFTYPE_AP:
+                bt_msr |= MSR_AP;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to AP!\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Network type %d not support!\n", type));
+                return 1;
+                break;
+
+        }
+
+        rtl_write_byte(rtlpriv, (MSR), bt_msr);
+        rtlpriv->cfg->ops->led_control(hw, ledaction);
+        if ((bt_msr & 0xfc) == MSR_AP)
+                rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00);
+        else
+                rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66);
+        return 0;
+}
+
+static void _rtl92ce_set_check_bssid(struct ieee80211_hw *hw,
+                                     enum nl80211_iftype type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR);
+        u8 filterout_non_associated_bssid = false;
+
+        switch (type) {
+        case NL80211_IFTYPE_ADHOC:
+        case NL80211_IFTYPE_STATION:
+                filterout_non_associated_bssid = true;
+                break;
+        case NL80211_IFTYPE_UNSPECIFIED:
+        case NL80211_IFTYPE_AP:
+        default:
+                break;
+        }
+
+        if (filterout_non_associated_bssid == true) {
+                reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+                rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
+                                              (u8 *) (&reg_rcr));
+                _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
+        } else if (filterout_non_associated_bssid == false) {
+                reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
+                _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
+                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                              HW_VAR_RCR, (u8 *) (&reg_rcr));
+        }
+}
+
+int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
+{
+        if (_rtl92ce_set_media_status(hw, type))
+                return -EOPNOTSUPP;
+        _rtl92ce_set_check_bssid(hw, type);
+        return 0;
+}
+
+void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        u32 u4b_ac_param;
+
+        rtl92c_dm_init_edca_turbo(hw);
+
+        u4b_ac_param = (u32) mac->ac[aci].aifs;
+        u4b_ac_param |=
+            ((u32) mac->ac[aci].cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET;
+        u4b_ac_param |=
+            ((u32) mac->ac[aci].cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET;
+        u4b_ac_param |= (u32) mac->ac[aci].tx_op << AC_PARAM_TXOP_LIMIT_OFFSET;
+        RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG,
+                 ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n",
+                  aci, u4b_ac_param, mac->ac[aci].aifs, mac->ac[aci].cw_min,
+                  mac->ac[aci].cw_max, mac->ac[aci].tx_op));
+        switch (aci) {
+        case AC1_BK:
+                rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
+                break;
+        case AC0_BE:
+                rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
+                break;
+        case AC2_VI:
+                rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
+                break;
+        case AC3_VO:
+                rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
+                break;
+        default:
+                RT_ASSERT(false, ("invalid aci: %d !\n", aci));
+                break;
+        }
+}
+
+void rtl92ce_enable_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
+        rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
+        rtlpci->irq_enabled = true;
+}
+
+void rtl92ce_disable_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
+        rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
+        rtlpci->irq_enabled = false;
+}
+
+static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 u1b_tmp;
+
+        rtlpriv->intf_ops->enable_aspm(hw);
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
+        rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0);
+        if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->bfw_ready)
+                rtl92c_firmware_selfreset(hw);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51);
+        rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00);
+        rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000);
+        u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL);
+        rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 |
+                        (u1b_tmp << 8));
+        rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790);
+        rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080);
+        rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80);
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23);
+        rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e);
+        rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e);
+        rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10);
+}
+
+void rtl92ce_card_disable(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        enum nl80211_iftype opmode;
+
+        mac->link_state = MAC80211_NOLINK;
+        opmode = NL80211_IFTYPE_UNSPECIFIED;
+        _rtl92ce_set_media_status(hw, opmode);
+        if (rtlpci->driver_is_goingto_unload ||
+            ppsc->rfoff_reason > RF_CHANGE_BY_PS)
+                rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
+        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+        _rtl92ce_poweroff_adapter(hw);
+}
+
+void rtl92ce_interrupt_recognized(struct ieee80211_hw *hw,
+                                  u32 *p_inta, u32 *p_intb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0];
+        rtl_write_dword(rtlpriv, ISR, *p_inta);
+
+        /*
+         * *p_intb = rtl_read_dword(rtlpriv, REG_HISRE) & rtlpci->irq_mask[1];
+         * rtl_write_dword(rtlpriv, ISR + 4, *p_intb);
+         */
+}
+
+void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw)
+{
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 bcn_interval, atim_window;
+
+        bcn_interval = mac->beacon_interval;
+        atim_window = 2;        /*FIX MERGE */
+        rtl92ce_disable_interrupt(hw);
+        rtl_write_word(rtlpriv, REG_ATIMWND, atim_window);
+        rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
+        rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f);
+        rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18);
+        rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18);
+        rtl_write_byte(rtlpriv, 0x606, 0x30);
+        rtl92ce_enable_interrupt(hw);
+}
+
+void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 bcn_interval = mac->beacon_interval;
+
+        RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
+                 ("beacon_interval:%d\n", bcn_interval));
+        rtl92ce_disable_interrupt(hw);
+        rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
+        rtl92ce_enable_interrupt(hw);
+}
+
+void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw,
+                                   u32 add_msr, u32 rm_msr)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
+                 ("add_msr:%x, rm_msr:%x\n", add_msr, rm_msr));
+        if (add_msr)
+                rtlpci->irq_mask[0] |= add_msr;
+        if (rm_msr)
+                rtlpci->irq_mask[0] &= (~rm_msr);
+        rtl92ce_disable_interrupt(hw);
+        rtl92ce_enable_interrupt(hw);
+}
+
+static u8 _rtl92c_get_chnl_group(u8 chnl)
+{
+        u8 group;
+
+        if (chnl < 3)
+                group = 0;
+        else if (chnl < 9)
+                group = 1;
+        else
+                group = 2;
+        return group;
+}
+
+static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw,
+                                                 bool autoload_fail,
+                                                 u8 *hwinfo)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 rf_path, index, tempval;
+        u16 i;
+
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 3; i++) {
+                        if (!autoload_fail) {
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_cck[rf_path][i] =
+                                    hwinfo[EEPROM_TXPOWERCCK + rf_path * 3 + i];
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
+                                    hwinfo[EEPROM_TXPOWERHT40_1S + rf_path * 3 +
+                                           i];
+                        } else {
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_cck[rf_path][i] =
+                                    EEPROM_DEFAULT_TXPOWERLEVEL;
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
+                                    EEPROM_DEFAULT_TXPOWERLEVEL;
+                        }
+                }
+        }
+
+        for (i = 0; i < 3; i++) {
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i];
+                else
+                        tempval = EEPROM_DEFAULT_HT40_2SDIFF;
+                rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_A][i] =
+                    (tempval & 0xf);
+                rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_B][i] =
+                    ((tempval & 0xf0) >> 4);
+        }
+
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM CCK Area(%d) = 0x%x\n", rf_path,
+                                 i,
+                                 rtlefuse->
+                                 eeprom_chnlarea_txpwr_cck[rf_path][i]));
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM HT40 1S Area(%d) = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->
+                                 eeprom_chnlarea_txpwr_ht40_1s[rf_path][i]));
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->
+                                 eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path]
+                                 [i]));
+
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 14; i++) {
+                        index = _rtl92c_get_chnl_group((u8) i);
+
+                        rtlefuse->txpwrlevel_cck[rf_path][i] =
+                            rtlefuse->eeprom_chnlarea_txpwr_cck[rf_path][index];
+                        rtlefuse->txpwrlevel_ht40_1s[rf_path][i] =
+                            rtlefuse->
+                            eeprom_chnlarea_txpwr_ht40_1s[rf_path][index];
+
+                        if ((rtlefuse->
+                             eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] -
+                             rtlefuse->
+                             eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][index])
+                            > 0) {
+                                rtlefuse->txpwrlevel_ht40_2s[rf_path][i] =
+                                    rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path]
+                                    [index] -
+                                    rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path]
+                                    [index];
+                        } else {
+                                rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0;
+                        }
+                }
+
+                for (i = 0; i < 14; i++) {
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = "
+                                 "[0x%x / 0x%x / 0x%x]\n", rf_path, i,
+                                 rtlefuse->txpwrlevel_cck[rf_path][i],
+                                 rtlefuse->txpwrlevel_ht40_1s[rf_path][i],
+                                 rtlefuse->txpwrlevel_ht40_2s[rf_path][i]));
+                }
+        }
+
+        for (i = 0; i < 3; i++) {
+                if (!autoload_fail) {
+                        rtlefuse->eeprom_pwrlimit_ht40[i] =
+                            hwinfo[EEPROM_TXPWR_GROUP + i];
+                        rtlefuse->eeprom_pwrlimit_ht20[i] =
+                            hwinfo[EEPROM_TXPWR_GROUP + 3 + i];
+                } else {
+                        rtlefuse->eeprom_pwrlimit_ht40[i] = 0;
+                        rtlefuse->eeprom_pwrlimit_ht20[i] = 0;
+                }
+        }
+
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 14; i++) {
+                        index = _rtl92c_get_chnl_group((u8) i);
+
+                        if (rf_path == RF90_PATH_A) {
+                                rtlefuse->pwrgroup_ht20[rf_path][i] =
+                                    (rtlefuse->eeprom_pwrlimit_ht20[index]
+                                     & 0xf);
+                                rtlefuse->pwrgroup_ht40[rf_path][i] =
+                                    (rtlefuse->eeprom_pwrlimit_ht40[index]
+                                     & 0xf);
+                        } else if (rf_path == RF90_PATH_B) {
+                                rtlefuse->pwrgroup_ht20[rf_path][i] =
+                                    ((rtlefuse->eeprom_pwrlimit_ht20[index]
+                                      & 0xf0) >> 4);
+                                rtlefuse->pwrgroup_ht40[rf_path][i] =
+                                    ((rtlefuse->eeprom_pwrlimit_ht40[index]
+                                      & 0xf0) >> 4);
+                        }
+
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF-%d pwrgroup_ht20[%d] = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->pwrgroup_ht20[rf_path][i]));
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF-%d pwrgroup_ht40[%d] = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->pwrgroup_ht40[rf_path][i]));
+                }
+        }
+
+        for (i = 0; i < 14; i++) {
+                index = _rtl92c_get_chnl_group((u8) i);
+
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWERHT20DIFF + index];
+                else
+                        tempval = EEPROM_DEFAULT_HT20_DIFF;
+
+                rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF);
+                rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] =
+                    ((tempval >> 4) & 0xF);
+
+                if (rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] & BIT(3))
+                        rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] |= 0xF0;
+
+                if (rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] & BIT(3))
+                        rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] |= 0xF0;
+
+                index = _rtl92c_get_chnl_group((u8) i);
+
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWER_OFDMDIFF + index];
+                else
+                        tempval = EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF;
+
+                rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] = (tempval & 0xF);
+                rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i] =
+                    ((tempval >> 4) & 0xF);
+        }
+
+        rtlefuse->legacy_ht_txpowerdiff =
+            rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][7];
+
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_ht20diff[RF90_PATH_A][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_ht20diff[RF90_PATH_B][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i]));
+
+        if (!autoload_fail)
+                rtlefuse->eeprom_regulatory = (hwinfo[RF_OPTION1] & 0x7);
+        else
+                rtlefuse->eeprom_regulatory = 0;
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("eeprom_regulatory = 0x%x\n", rtlefuse->eeprom_regulatory));
+
+        if (!autoload_fail) {
+                rtlefuse->eeprom_tssi[RF90_PATH_A] = hwinfo[EEPROM_TSSI_A];
+                rtlefuse->eeprom_tssi[RF90_PATH_B] = hwinfo[EEPROM_TSSI_B];
+        } else {
+                rtlefuse->eeprom_tssi[RF90_PATH_A] = EEPROM_DEFAULT_TSSI;
+                rtlefuse->eeprom_tssi[RF90_PATH_B] = EEPROM_DEFAULT_TSSI;
+        }
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("TSSI_A = 0x%x, TSSI_B = 0x%x\n",
+                 rtlefuse->eeprom_tssi[RF90_PATH_A],
+                 rtlefuse->eeprom_tssi[RF90_PATH_B]));
+
+        if (!autoload_fail)
+                tempval = hwinfo[EEPROM_THERMAL_METER];
+        else
+                tempval = EEPROM_DEFAULT_THERMALMETER;
+        rtlefuse->eeprom_thermalmeter = (tempval & 0x1f);
+
+        if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail)
+                rtlefuse->b_apk_thermalmeterignore = true;
+
+        rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter;
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("thermalmeter = 0x%x\n", rtlefuse->eeprom_thermalmeter));
+}
+
+static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u16 i, usvalue;
+        u8 hwinfo[HWSET_MAX_SIZE];
+        u16 eeprom_id;
+
+        if (rtlefuse->epromtype == EEPROM_BOOT_EFUSE) {
+                rtl_efuse_shadow_map_update(hw);
+
+                memcpy((void *)hwinfo,
+                       (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
+                       HWSET_MAX_SIZE);
+        } else if (rtlefuse->epromtype == EEPROM_93C46) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("RTL819X Not boot from eeprom, check it !!"));
+        }
+
+        RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, ("MAP\n"),
+                      hwinfo, HWSET_MAX_SIZE);
+
+        eeprom_id = *((u16 *)&hwinfo[0]);
+        if (eeprom_id != RTL8190_EEPROM_ID) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("EEPROM ID(%#x) is invalid!!\n", eeprom_id));
+                rtlefuse->autoload_failflag = true;
+        } else {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload OK\n"));
+                rtlefuse->autoload_failflag = false;
+        }
+
+        if (rtlefuse->autoload_failflag == true)
+                return;
+
+        for (i = 0; i < 6; i += 2) {
+                usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i];
+                *((u16 *) (&rtlefuse->dev_addr[i])) = usvalue;
+        }
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 (MAC_FMT "\n", MAC_ARG(rtlefuse->dev_addr)));
+
+        _rtl92ce_read_txpower_info_from_hwpg(hw,
+                                             rtlefuse->autoload_failflag,
+                                             hwinfo);
+
+        rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
+        rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
+        rtlefuse->b_txpwr_fromeprom = true;
+        rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid));
+
+        if (rtlhal->oem_id == RT_CID_DEFAULT) {
+                switch (rtlefuse->eeprom_oemid) {
+                case EEPROM_CID_DEFAULT:
+                        if (rtlefuse->eeprom_did == 0x8176) {
+                                if ((rtlefuse->eeprom_svid == 0x103C &&
+                                     rtlefuse->eeprom_smid == 0x1629))
+                                        rtlhal->oem_id = RT_CID_819x_HP;
+                                else
+                                        rtlhal->oem_id = RT_CID_DEFAULT;
+                        } else {
+                                rtlhal->oem_id = RT_CID_DEFAULT;
+                        }
+                        break;
+                case EEPROM_CID_TOSHIBA:
+                        rtlhal->oem_id = RT_CID_TOSHIBA;
+                        break;
+                case EEPROM_CID_QMI:
+                        rtlhal->oem_id = RT_CID_819x_QMI;
+                        break;
+                case EEPROM_CID_WHQL:
+                default:
+                        rtlhal->oem_id = RT_CID_DEFAULT;
+                        break;
+
+                }
+        }
+
+}
+
+static void _rtl92ce_hal_customized_behavior(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        switch (rtlhal->oem_id) {
+        case RT_CID_819x_HP:
+                pcipriv->ledctl.bled_opendrain = true;
+                break;
+        case RT_CID_819x_Lenovo:
+        case RT_CID_DEFAULT:
+        case RT_CID_TOSHIBA:
+        case RT_CID_CCX:
+        case RT_CID_819x_Acer:
+        case RT_CID_WHQL:
+        default:
+                break;
+        }
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("RT Customized ID: 0x%02X\n", rtlhal->oem_id));
+}
+
+void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 tmp_u1b;
+
+        rtlhal->version = _rtl92ce_read_chip_version(hw);
+        if (get_rf_type(rtlphy) == RF_1T1R)
+                rtlpriv->dm.brfpath_rxenable[0] = true;
+        else
+                rtlpriv->dm.brfpath_rxenable[0] =
+                    rtlpriv->dm.brfpath_rxenable[1] = true;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
+                                                rtlhal->version));
+        tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
+        if (tmp_u1b & BIT(4)) {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("Boot from EEPROM\n"));
+                rtlefuse->epromtype = EEPROM_93C46;
+        } else {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("Boot from EFUSE\n"));
+                rtlefuse->epromtype = EEPROM_BOOT_EFUSE;
+        }
+        if (tmp_u1b & BIT(5)) {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload OK\n"));
+                rtlefuse->autoload_failflag = false;
+                _rtl92ce_read_adapter_info(hw);
+        } else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Autoload ERR!!\n"));
+        }
+
+        _rtl92ce_hal_customized_behavior(hw);
+}
+
+void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        u32 ratr_value = (u32) mac->basic_rates;
+        u8 *p_mcsrate = mac->mcs;
+        u8 ratr_index = 0;
+        u8 b_nmode = mac->ht_enable;
+        u8 mimo_ps = 1;
+        u16 shortgi_rate;
+        u32 tmp_ratr_value;
+        u8 b_curtxbw_40mhz = mac->bw_40;
+        u8 b_curshortgi_40mhz = mac->sgi_40;
+        u8 b_curshortgi_20mhz = mac->sgi_20;
+        enum wireless_mode wirelessmode = mac->mode;
+
+        ratr_value |= EF2BYTE((*(u16 *) (p_mcsrate))) << 12;
+
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                if (ratr_value & 0x0000000c)
+                        ratr_value &= 0x0000000d;
+                else
+                        ratr_value &= 0x0000000f;
+                break;
+        case WIRELESS_MODE_G:
+                ratr_value &= 0x00000FF5;
+                break;
+        case WIRELESS_MODE_N_24G:
+        case WIRELESS_MODE_N_5G:
+                b_nmode = 1;
+                if (mimo_ps == 0) {
+                        ratr_value &= 0x0007F005;
+                } else {
+                        u32 ratr_mask;
+
+                        if (get_rf_type(rtlphy) == RF_1T2R ||
+                            get_rf_type(rtlphy) == RF_1T1R)
+                                ratr_mask = 0x000ff005;
+                        else
+                                ratr_mask = 0x0f0ff005;
+
+                        ratr_value &= ratr_mask;
+                }
+                break;
+        default:
+                if (rtlphy->rf_type == RF_1T2R)
+                        ratr_value &= 0x000ff0ff;
+                else
+                        ratr_value &= 0x0f0ff0ff;
+
+                break;
+        }
+
+        ratr_value &= 0x0FFFFFFF;
+
+        if (b_nmode && ((b_curtxbw_40mhz &&
+                         b_curshortgi_40mhz) || (!b_curtxbw_40mhz &&
+                                                 b_curshortgi_20mhz))) {
+
+                ratr_value |= 0x10000000;
+                tmp_ratr_value = (ratr_value >> 12);
+
+                for (shortgi_rate = 15; shortgi_rate > 0; shortgi_rate--) {
+                        if ((1 << shortgi_rate) & tmp_ratr_value)
+                                break;
+                }
+
+                shortgi_rate = (shortgi_rate << 12) | (shortgi_rate << 8) |
+                    (shortgi_rate << 4) | (shortgi_rate);
+        }
+
+        rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
+
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
+                 ("%x\n", rtl_read_dword(rtlpriv, REG_ARFR0)));
+}
+
+void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u32 ratr_bitmap = (u32) mac->basic_rates;
+        u8 *p_mcsrate = mac->mcs;
+        u8 ratr_index;
+        u8 b_curtxbw_40mhz = mac->bw_40;
+        u8 b_curshortgi_40mhz = mac->sgi_40;
+        u8 b_curshortgi_20mhz = mac->sgi_20;
+        enum wireless_mode wirelessmode = mac->mode;
+        bool b_shortgi = false;
+        u8 rate_mask[5];
+        u8 macid = 0;
+        u8 mimops = 1;
+
+        ratr_bitmap |= (p_mcsrate[1] << 20) | (p_mcsrate[0] << 12);
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                ratr_index = RATR_INX_WIRELESS_B;
+                if (ratr_bitmap & 0x0000000c)
+                        ratr_bitmap &= 0x0000000d;
+                else
+                        ratr_bitmap &= 0x0000000f;
+                break;
+        case WIRELESS_MODE_G:
+                ratr_index = RATR_INX_WIRELESS_GB;
+
+                if (rssi_level == 1)
+                        ratr_bitmap &= 0x00000f00;
+                else if (rssi_level == 2)
+                        ratr_bitmap &= 0x00000ff0;
+                else
+                        ratr_bitmap &= 0x00000ff5;
+                break;
+        case WIRELESS_MODE_A:
+                ratr_index = RATR_INX_WIRELESS_A;
+                ratr_bitmap &= 0x00000ff0;
+                break;
+        case WIRELESS_MODE_N_24G:
+        case WIRELESS_MODE_N_5G:
+                ratr_index = RATR_INX_WIRELESS_NGB;
+
+                if (mimops == 0) {
+                        if (rssi_level == 1)
+                                ratr_bitmap &= 0x00070000;
+                        else if (rssi_level == 2)
+                                ratr_bitmap &= 0x0007f000;
+                        else
+                                ratr_bitmap &= 0x0007f005;
+                } else {
+                        if (rtlphy->rf_type == RF_1T2R ||
+                            rtlphy->rf_type == RF_1T1R) {
+                                if (b_curtxbw_40mhz) {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x000f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x000ff000;
+                                        else
+                                                ratr_bitmap &= 0x000ff015;
+                                } else {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x000f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x000ff000;
+                                        else
+                                                ratr_bitmap &= 0x000ff005;
+                                }
+                        } else {
+                                if (b_curtxbw_40mhz) {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x0f0f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x0f0ff000;
+                                        else
+                                                ratr_bitmap &= 0x0f0ff015;
+                                } else {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x0f0f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x0f0ff000;
+                                        else
+                                                ratr_bitmap &= 0x0f0ff005;
+                                }
+                        }
+                }
+
+                if ((b_curtxbw_40mhz && b_curshortgi_40mhz) ||
+                    (!b_curtxbw_40mhz && b_curshortgi_20mhz)) {
+
+                        if (macid == 0)
+                                b_shortgi = true;
+                        else if (macid == 1)
+                                b_shortgi = false;
+                }
+                break;
+        default:
+                ratr_index = RATR_INX_WIRELESS_NGB;
+
+                if (rtlphy->rf_type == RF_1T2R)
+                        ratr_bitmap &= 0x000ff0ff;
+                else
+                        ratr_bitmap &= 0x0f0ff0ff;
+                break;
+        }
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
+                 ("ratr_bitmap :%x\n", ratr_bitmap));
+        *(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) |
+                                       (ratr_index << 28));
+        rate_mask[4] = macid | (b_shortgi ? 0x20 : 0x00) | 0x80;
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, "
+                                                 "ratr_val:%x, %x:%x:%x:%x:%x\n",
+                                                 ratr_index, ratr_bitmap,
+                                                 rate_mask[0], rate_mask[1],
+                                                 rate_mask[2], rate_mask[3],
+                                                 rate_mask[4]));
+        rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask);
+}
+
+void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 sifs_timer;
+
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
+                                      (u8 *)&mac->slot_time);
+        if (!mac->ht_enable)
+                sifs_timer = 0x0a0a;
+        else
+                sifs_timer = 0x1010;
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer);
+}
+
+bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        enum rf_pwrstate e_rfpowerstate_toset, cur_rfstate;
+        u8 u1tmp;
+        bool b_actuallyset = false;
+        unsigned long flag;
+
+        if ((rtlpci->up_first_time == 1) || (rtlpci->being_init_adapter))
+                return false;
+
+        if (ppsc->b_swrf_processing)
+                return false;
+
+        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+        if (ppsc->rfchange_inprogress) {
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+                return false;
+        } else {
+                ppsc->rfchange_inprogress = true;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        }
+
+        cur_rfstate = ppsc->rfpwr_state;
+
+        if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) &&
+            RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) {
+                rtlpriv->intf_ops->disable_aspm(hw);
+                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+        }
+
+        rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv,
+                       REG_MAC_PINMUX_CFG)&~(BIT(3)));
+
+        u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
+        e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF;
+
+        if ((ppsc->b_hwradiooff == true) && (e_rfpowerstate_toset == ERFON)) {
+                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                         ("GPIOChangeRF  - HW Radio ON, RF ON\n"));
+
+                e_rfpowerstate_toset = ERFON;
+                ppsc->b_hwradiooff = false;
+                b_actuallyset = true;
+        } else if ((ppsc->b_hwradiooff == false)
+                   && (e_rfpowerstate_toset == ERFOFF)) {
+                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                         ("GPIOChangeRF  - HW Radio OFF, RF OFF\n"));
+
+                e_rfpowerstate_toset = ERFOFF;
+                ppsc->b_hwradiooff = true;
+                b_actuallyset = true;
+        }
+
+        if (b_actuallyset) {
+                if (e_rfpowerstate_toset == ERFON) {
+                        if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) &&
+                            RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) {
+                                rtlpriv->intf_ops->disable_aspm(hw);
+                                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                        }
+                }
+
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+
+                if (e_rfpowerstate_toset == ERFOFF) {
+                        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) {
+                                rtlpriv->intf_ops->enable_aspm(hw);
+                                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                        }
+                }
+
+        } else if (e_rfpowerstate_toset == ERFOFF || cur_rfstate == ERFOFF) {
+                if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC)
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+
+                if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) {
+                        rtlpriv->intf_ops->enable_aspm(hw);
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                }
+
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        } else {
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        }
+
+        *valid = 1;
+        return !ppsc->b_hwradiooff;
+
+}
+
+void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index,
+                     u8 *p_macaddr, bool is_group, u8 enc_algo,
+                     bool is_wepkey, bool clear_all)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 *macaddr = p_macaddr;
+        u32 entry_id = 0;
+        bool is_pairwise = false;
+
+        static u8 cam_const_addr[4][6] = {
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
+        };
+        static u8 cam_const_broad[] = {
+                0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+        };
+
+        if (clear_all) {
+                u8 idx = 0;
+                u8 cam_offset = 0;
+                u8 clear_number = 5;
+
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
+
+                for (idx = 0; idx < clear_number; idx++) {
+                        rtl_cam_mark_invalid(hw, cam_offset + idx);
+                        rtl_cam_empty_entry(hw, cam_offset + idx);
+
+                        if (idx < 5) {
+                                memset(rtlpriv->sec.key_buf[idx], 0,
+                                       MAX_KEY_LEN);
+                                rtlpriv->sec.key_len[idx] = 0;
+                        }
+                }
+
+        } else {
+                switch (enc_algo) {
+                case WEP40_ENCRYPTION:
+                        enc_algo = CAM_WEP40;
+                        break;
+                case WEP104_ENCRYPTION:
+                        enc_algo = CAM_WEP104;
+                        break;
+                case TKIP_ENCRYPTION:
+                        enc_algo = CAM_TKIP;
+                        break;
+                case AESCCMP_ENCRYPTION:
+                        enc_algo = CAM_AES;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case "
+                                        "not process\n"));
+                        enc_algo = CAM_TKIP;
+                        break;
+                }
+
+                if (is_wepkey || rtlpriv->sec.use_defaultkey) {
+                        macaddr = cam_const_addr[key_index];
+                        entry_id = key_index;
+                } else {
+                        if (is_group) {
+                                macaddr = cam_const_broad;
+                                entry_id = key_index;
+                        } else {
+                                key_index = PAIRWISE_KEYIDX;
+                                entry_id = CAM_PAIRWISE_KEY_POSITION;
+                                is_pairwise = true;
+                        }
+                }
+
+                if (rtlpriv->sec.key_len[key_index] == 0) {
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("delete one entry\n"));
+                        rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
+                } else {
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                                 ("The insert KEY length is %d\n",
+                                  rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                                 ("The insert KEY  is %x %x\n",
+                                  rtlpriv->sec.key_buf[0][0],
+                                  rtlpriv->sec.key_buf[0][1]));
+
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("add one entry\n"));
+                        if (is_pairwise) {
+                                RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
+                                              "Pairwiase Key content :",
+                                              rtlpriv->sec.pairwise_key,
+                                              rtlpriv->sec.
+                                              key_len[PAIRWISE_KEYIDX]);
+
+                                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                         ("set Pairwiase key\n"));
+
+                                rtl_cam_add_one_entry(hw, macaddr, key_index,
+                                                      entry_id, enc_algo,
+                                                      CAM_CONFIG_NO_USEDK,
+                                                      rtlpriv->sec.
+                                                      key_buf[key_index]);
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                         ("set group key\n"));
+
+                                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                                        rtl_cam_add_one_entry(hw,
+                                                rtlefuse->dev_addr,
+                                                PAIRWISE_KEYIDX,
+                                                CAM_PAIRWISE_KEY_POSITION,
+                                                enc_algo,
+                                                CAM_CONFIG_NO_USEDK,
+                                                rtlpriv->sec.key_buf
+                                                [entry_id]);
+                                }
+
+                                rtl_cam_add_one_entry(hw, macaddr, key_index,
+                                                entry_id, enc_algo,
+                                                CAM_CONFIG_NO_USEDK,
+                                                rtlpriv->sec.key_buf[entry_id]);
+                        }
+
+                }
+        }
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h
new file mode 100644
index 000000000000..305c819c8c78
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h
@@ -0,0 +1,57 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CE_HW_H__
+#define __RTL92CE_HW_H__
+
+void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
+void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw);
+void rtl92ce_interrupt_recognized(struct ieee80211_hw *hw,
+                                  u32 *p_inta, u32 *p_intb);
+int rtl92ce_hw_init(struct ieee80211_hw *hw);
+void rtl92ce_card_disable(struct ieee80211_hw *hw);
+void rtl92ce_enable_interrupt(struct ieee80211_hw *hw);
+void rtl92ce_disable_interrupt(struct ieee80211_hw *hw);
+int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type);
+void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci);
+void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw);
+void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw);
+void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw,
+                                   u32 add_msr, u32 rm_msr);
+void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
+void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw);
+void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level);
+void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw);
+bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid);
+void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw);
+void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index,
+                     u8 *p_macaddr, bool is_group, u8 enc_algo,
+                     bool is_wepkey, bool clear_all);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/led.c b/drivers/net/wireless/rtlwifi/rtl8192ce/led.c
new file mode 100644
index 000000000000..78a0569208ea
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/led.c
@@ -0,0 +1,144 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../pci.h"
+#include "reg.h"
+#include "led.h"
+
+void rtl92ce_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
+{
+        u8 ledcfg;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD,
+                 ("LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pled->ledpin));
+
+        ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
+
+        switch (pled->ledpin) {
+        case LED_PIN_GPIO0:
+                break;
+        case LED_PIN_LED0:
+                rtl_write_byte(rtlpriv,
+                               REG_LEDCFG2, (ledcfg & 0xf0) | BIT(5) | BIT(6));
+                break;
+        case LED_PIN_LED1:
+                rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        pled->b_ledon = true;
+}
+
+void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        u8 ledcfg;
+
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD,
+                 ("LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pled->ledpin));
+
+        ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
+
+        switch (pled->ledpin) {
+        case LED_PIN_GPIO0:
+                break;
+        case LED_PIN_LED0:
+                ledcfg &= 0xf0;
+                if (pcipriv->ledctl.bled_opendrain == true)
+                        rtl_write_byte(rtlpriv, REG_LEDCFG2,
+                                       (ledcfg | BIT(1) | BIT(5) | BIT(6)));
+                else
+                        rtl_write_byte(rtlpriv, REG_LEDCFG2,
+                                       (ledcfg | BIT(3) | BIT(5) | BIT(6)));
+                break;
+        case LED_PIN_LED1:
+                ledcfg &= 0x0f;
+                rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3)));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        pled->b_ledon = false;
+}
+
+void rtl92ce_init_sw_leds(struct ieee80211_hw *hw)
+{
+}
+
+void rtl92ce_deinit_sw_leds(struct ieee80211_hw *hw)
+{
+}
+
+void _rtl92ce_sw_led_control(struct ieee80211_hw *hw,
+                                    enum led_ctl_mode ledaction)
+{
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
+        switch (ledaction) {
+        case LED_CTL_POWER_ON:
+        case LED_CTL_LINK:
+        case LED_CTL_NO_LINK:
+                rtl92ce_sw_led_on(hw, pLed0);
+                break;
+        case LED_CTL_POWER_OFF:
+                rtl92ce_sw_led_off(hw, pLed0);
+                break;
+        default:
+                break;
+        }
+}
+
+void rtl92ce_led_control(struct ieee80211_hw *hw,
+                        enum led_ctl_mode ledaction)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        if ((ppsc->rfoff_reason > RF_CHANGE_BY_PS) &&
+            (ledaction == LED_CTL_TX ||
+             ledaction == LED_CTL_RX ||
+             ledaction == LED_CTL_SITE_SURVEY ||
+             ledaction == LED_CTL_LINK ||
+             ledaction == LED_CTL_NO_LINK ||
+             ledaction == LED_CTL_START_TO_LINK ||
+             ledaction == LED_CTL_POWER_ON)) {
+                return;
+        }
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD, ("ledaction %d,\n",
+                                ledaction));
+        _rtl92ce_sw_led_control(hw, ledaction);
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/led.h b/drivers/net/wireless/rtlwifi/rtl8192ce/led.h
new file mode 100644
index 000000000000..10da3018f4b7
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/led.h
@@ -0,0 +1,41 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CE_LED_H__
+#define __RTL92CE_LED_H__
+
+void rtl92ce_init_sw_leds(struct ieee80211_hw *hw);
+void rtl92ce_deinit_sw_leds(struct ieee80211_hw *hw);
+void rtl92ce_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled);
+void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled);
+void rtl92ce_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction);
+void _rtl92ce_sw_led_control(struct ieee80211_hw *hw,
+                                    enum led_ctl_mode ledaction);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
new file mode 100644
index 000000000000..45044117139a
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
@@ -0,0 +1,2676 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../pci.h"
+#include "../ps.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+#include "table.h"
+
+static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
+                                         enum radio_path rfpath, u32 offset);
+static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
+                                           enum radio_path rfpath, u32 offset,
+                                           u32 data);
+static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
+                                      enum radio_path rfpath, u32 offset);
+static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
+                                        enum radio_path rfpath, u32 offset,
+                                        u32 data);
+static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
+static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
+                                                  u8 configtype);
+static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
+                                                    u8 configtype);
+static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
+                                             u32 cmdtableidx, u32 cmdtablesz,
+                                             enum swchnlcmd_id cmdid, u32 para1,
+                                             u32 para2, u32 msdelay);
+static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
+                                             u8 channel, u8 *stage, u8 *step,
+                                             u32 *delay);
+static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
+                                       enum wireless_mode wirelessmode,
+                                       long power_indbm);
+static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
+                                              enum radio_path rfpath);
+static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
+                                         enum wireless_mode wirelessmode,
+                                         u8 txpwridx);
+u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 returnvalue, originalvalue, bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "bitmask(%#x)\n", regaddr,
+                                               bitmask));
+        originalvalue = rtl_read_dword(rtlpriv, regaddr);
+        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+        returnvalue = (originalvalue & bitmask) >> bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("BBR MASK=0x%x "
+                                               "Addr[0x%x]=0x%x\n", bitmask,
+                                               regaddr, originalvalue));
+
+        return returnvalue;
+
+}
+
+void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
+                           u32 regaddr, u32 bitmask, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 originalvalue, bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
+                                               " data(%#x)\n", regaddr, bitmask,
+                                               data));
+
+        if (bitmask != MASKDWORD) {
+                originalvalue = rtl_read_dword(rtlpriv, regaddr);
+                bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                data = ((originalvalue & (~bitmask)) | (data << bitshift));
+        }
+
+        rtl_write_dword(rtlpriv, regaddr, data);
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
+                                               " data(%#x)\n", regaddr, bitmask,
+                                               data));
+
+}
+
+u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
+                            enum radio_path rfpath, u32 regaddr, u32 bitmask)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 original_value, readback_value, bitshift;
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        unsigned long flags;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "rfpath(%#x), bitmask(%#x)\n",
+                                               regaddr, rfpath, bitmask));
+
+        spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
+
+        if (rtlphy->rf_mode != RF_OP_BY_FW) {
+                original_value = _rtl92c_phy_rf_serial_read(hw,
+                                                            rfpath, regaddr);
+        } else {
+                original_value = _rtl92c_phy_fw_rf_serial_read(hw,
+                                                               rfpath, regaddr);
+        }
+
+        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+        readback_value = (original_value & bitmask) >> bitshift;
+
+        spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
+                 ("regaddr(%#x), rfpath(%#x), "
+                  "bitmask(%#x), original_value(%#x)\n",
+                  regaddr, rfpath, bitmask, original_value));
+
+        return readback_value;
+}
+
+void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw,
+                           enum radio_path rfpath,
+                           u32 regaddr, u32 bitmask, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 original_value, bitshift;
+        unsigned long flags;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
+                 ("regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
+                  regaddr, bitmask, data, rfpath));
+
+        spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
+
+        if (rtlphy->rf_mode != RF_OP_BY_FW) {
+                if (bitmask != RFREG_OFFSET_MASK) {
+                        original_value = _rtl92c_phy_rf_serial_read(hw,
+                                                                    rfpath,
+                                                                    regaddr);
+                        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                        data =
+                            ((original_value & (~bitmask)) |
+                             (data << bitshift));
+                }
+
+                _rtl92c_phy_rf_serial_write(hw, rfpath, regaddr, data);
+        } else {
+                if (bitmask != RFREG_OFFSET_MASK) {
+                        original_value = _rtl92c_phy_fw_rf_serial_read(hw,
+                                                                       rfpath,
+                                                                       regaddr);
+                        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                        data =
+                            ((original_value & (~bitmask)) |
+                             (data << bitshift));
+                }
+                _rtl92c_phy_fw_rf_serial_write(hw, rfpath, regaddr, data);
+        }
+
+        spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "bitmask(%#x), data(%#x), "
+                                               "rfpath(%#x)\n", regaddr,
+                                               bitmask, data, rfpath));
+}
+
+static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
+                                         enum radio_path rfpath, u32 offset)
+{
+        RT_ASSERT(false, ("deprecated!\n"));
+        return 0;
+}
+
+static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
+                                           enum radio_path rfpath, u32 offset,
+                                           u32 data)
+{
+        RT_ASSERT(false, ("deprecated!\n"));
+}
+
+static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
+                                      enum radio_path rfpath, u32 offset)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
+        u32 newoffset;
+        u32 tmplong, tmplong2;
+        u8 rfpi_enable = 0;
+        u32 retvalue;
+
+        offset &= 0x3f;
+        newoffset = offset;
+        if (RT_CANNOT_IO(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("return all one\n"));
+                return 0xFFFFFFFF;
+        }
+        tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
+        if (rfpath == RF90_PATH_A)
+                tmplong2 = tmplong;
+        else
+                tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);
+        tmplong2 = (tmplong2 & (~BLSSIREADADDRESS)) |
+            (newoffset << 23) | BLSSIREADEDGE;
+        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
+                      tmplong & (~BLSSIREADEDGE));
+        mdelay(1);
+        rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
+        mdelay(1);
+        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
+                      tmplong | BLSSIREADEDGE);
+        mdelay(1);
+        if (rfpath == RF90_PATH_A)
+                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,
+                                                 BIT(8));
+        else if (rfpath == RF90_PATH_B)
+                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1,
+                                                 BIT(8));
+        if (rfpi_enable)
+                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi,
+                                         BLSSIREADBACKDATA);
+        else
+                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback,
+                                         BLSSIREADBACKDATA);
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFR-%d Addr[0x%x]=0x%x\n",
+                                               rfpath, pphyreg->rflssi_readback,
+                                               retvalue));
+        return retvalue;
+}
+
+static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
+                                        enum radio_path rfpath, u32 offset,
+                                        u32 data)
+{
+        u32 data_and_addr;
+        u32 newoffset;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
+
+        if (RT_CANNOT_IO(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("stop\n"));
+                return;
+        }
+        offset &= 0x3f;
+        newoffset = offset;
+        data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
+        rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFW-%d Addr[0x%x]=0x%x\n",
+                                               rfpath, pphyreg->rf3wire_offset,
+                                               data_and_addr));
+}
+
+static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask)
+{
+        u32 i;
+
+        for (i = 0; i <= 31; i++) {
+                if (((bitmask >> i) & 0x1) == 1)
+                        break;
+        }
+        return i;
+}
+
+static void _rtl92c_phy_bb_config_1t(struct ieee80211_hw *hw)
+{
+        rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2);
+        rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022);
+        rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45);
+        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23);
+        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1);
+        rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2);
+}
+
+bool rtl92c_phy_mac_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool is92c = IS_92C_SERIAL(rtlhal->version);
+        bool rtstatus = _rtl92c_phy_config_mac_with_headerfile(hw);
+
+        if (is92c)
+                rtl_write_byte(rtlpriv, 0x14, 0x71);
+        return rtstatus;
+}
+
+bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
+{
+        bool rtstatus = true;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 regval;
+        u32 regvaldw;
+        u8 b_reg_hwparafile = 1;
+
+        _rtl92c_phy_init_bb_rf_register_definition(hw);
+        regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
+        rtl_write_word(rtlpriv, REG_SYS_FUNC_EN,
+                       regval | BIT(13) | BIT(0) | BIT(1));
+        rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
+        rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
+        rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
+                       FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE |
+                       FEN_BB_GLB_RSTn | FEN_BBRSTB);
+        rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
+        regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
+        rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
+        if (b_reg_hwparafile == 1)
+                rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
+        return rtstatus;
+}
+
+bool rtl92c_phy_rf_config(struct ieee80211_hw *hw)
+{
+        return rtl92c_phy_rf6052_config(hw);
+}
+
+static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        bool rtstatus;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("==>\n"));
+        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
+                                                 BASEBAND_CONFIG_PHY_REG);
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Write BB Reg Fail!!"));
+                return false;
+        }
+        if (rtlphy->rf_type == RF_1T2R) {
+                _rtl92c_phy_bb_config_1t(hw);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Config to 1T!!\n"));
+        }
+        if (rtlefuse->autoload_failflag == false) {
+                rtlphy->pwrgroup_cnt = 0;
+                rtstatus = _rtl92c_phy_config_bb_with_pgheaderfile(hw,
+                                                   BASEBAND_CONFIG_PHY_REG);
+        }
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("BB_PG Reg Fail!!"));
+                return false;
+        }
+        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
+                                                 BASEBAND_CONFIG_AGC_TAB);
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("AGC Table Fail\n"));
+                return false;
+        }
+        rtlphy->bcck_high_power = (bool) (rtl_get_bbreg(hw,
+                                                RFPGA0_XA_HSSIPARAMETER2,
+                                                0x200));
+        return true;
+}
+
+static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+        u32 arraylength;
+        u32 *ptrarray;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Read Rtl819XMACPHY_Array\n"));
+        arraylength = MAC_2T_ARRAYLENGTH;
+        ptrarray = RTL8192CEMAC_2T_ARRAY;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Img:RTL8192CEMAC_2T_ARRAY\n"));
+        for (i = 0; i < arraylength; i = i + 2)
+                rtl_write_byte(rtlpriv, ptrarray[i], (u8) ptrarray[i + 1]);
+        return true;
+}
+
+void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw)
+{
+}
+
+static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
+                                                  u8 configtype)
+{
+        int i;
+        u32 *phy_regarray_table;
+        u32 *agctab_array_table;
+        u16 phy_reg_arraylen, agctab_arraylen;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                agctab_arraylen = AGCTAB_2TARRAYLENGTH;
+                agctab_array_table = RTL8192CEAGCTAB_2TARRAY;
+                phy_reg_arraylen = PHY_REG_2TARRAY_LENGTH;
+                phy_regarray_table = RTL8192CEPHY_REG_2TARRAY;
+        } else {
+                agctab_arraylen = AGCTAB_1TARRAYLENGTH;
+                agctab_array_table = RTL8192CEAGCTAB_1TARRAY;
+                phy_reg_arraylen = PHY_REG_1TARRAY_LENGTH;
+                phy_regarray_table = RTL8192CEPHY_REG_1TARRAY;
+        }
+        if (configtype == BASEBAND_CONFIG_PHY_REG) {
+                for (i = 0; i < phy_reg_arraylen; i = i + 2) {
+                        if (phy_regarray_table[i] == 0xfe)
+                                mdelay(50);
+                        else if (phy_regarray_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (phy_regarray_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (phy_regarray_table[i] == 0xfb)
+                                udelay(50);
+                        else if (phy_regarray_table[i] == 0xfa)
+                                udelay(5);
+                        else if (phy_regarray_table[i] == 0xf9)
+                                udelay(1);
+                        rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD,
+                                      phy_regarray_table[i + 1]);
+                        udelay(1);
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("The phy_regarray_table[0] is %x"
+                                  " Rtl819XPHY_REGArray[1] is %x\n",
+                                  phy_regarray_table[i],
+                                  phy_regarray_table[i + 1]));
+                }
+                rtl92c_phy_config_bb_external_pa(hw);
+        } else if (configtype == BASEBAND_CONFIG_AGC_TAB) {
+                for (i = 0; i < agctab_arraylen; i = i + 2) {
+                        rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD,
+                                      agctab_array_table[i + 1]);
+                        udelay(1);
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("The agctab_array_table[0] is "
+                                  "%x Rtl819XPHY_REGArray[1] is %x\n",
+                                  agctab_array_table[i],
+                                  agctab_array_table[i + 1]));
+                }
+        }
+        return true;
+}
+
+static void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
+                                                   u32 regaddr, u32 bitmask,
+                                                   u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (regaddr == RTXAGC_A_RATE18_06) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][0] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][0]));
+        }
+        if (regaddr == RTXAGC_A_RATE54_24) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][1] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][1]));
+        }
+        if (regaddr == RTXAGC_A_CCK1_MCS32) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][6] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][6]));
+        }
+        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][7] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][7]));
+        }
+        if (regaddr == RTXAGC_A_MCS03_MCS00) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][2] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][2]));
+        }
+        if (regaddr == RTXAGC_A_MCS07_MCS04) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][3] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][3]));
+        }
+        if (regaddr == RTXAGC_A_MCS11_MCS08) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][4] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][4]));
+        }
+        if (regaddr == RTXAGC_A_MCS15_MCS12) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][5] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][5]));
+        }
+        if (regaddr == RTXAGC_B_RATE18_06) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][8] =
+                    data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][8]));
+        }
+        if (regaddr == RTXAGC_B_RATE54_24) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][9] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][9]));
+        }
+
+        if (regaddr == RTXAGC_B_CCK1_55_MCS32) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][14] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][14]));
+        }
+
+        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][15] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][15]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS03_MCS00) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][10] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][10]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS07_MCS04) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][11] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][11]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS11_MCS08) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][12] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][12]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS15_MCS12) {
+                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][13] =
+                    data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
+                                                            pwrgroup_cnt][13]));
+
+                rtlphy->pwrgroup_cnt++;
+        }
+}
+
+static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
+                                                    u8 configtype)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int i;
+        u32 *phy_regarray_table_pg;
+        u16 phy_regarray_pg_len;
+
+        phy_regarray_pg_len = PHY_REG_ARRAY_PGLENGTH;
+        phy_regarray_table_pg = RTL8192CEPHY_REG_ARRAY_PG;
+
+        if (configtype == BASEBAND_CONFIG_PHY_REG) {
+                for (i = 0; i < phy_regarray_pg_len; i = i + 3) {
+                        if (phy_regarray_table_pg[i] == 0xfe)
+                                mdelay(50);
+                        else if (phy_regarray_table_pg[i] == 0xfd)
+                                mdelay(5);
+                        else if (phy_regarray_table_pg[i] == 0xfc)
+                                mdelay(1);
+                        else if (phy_regarray_table_pg[i] == 0xfb)
+                                udelay(50);
+                        else if (phy_regarray_table_pg[i] == 0xfa)
+                                udelay(5);
+                        else if (phy_regarray_table_pg[i] == 0xf9)
+                                udelay(1);
+
+                        _rtl92c_store_pwrIndex_diffrate_offset(hw,
+                                               phy_regarray_table_pg[i],
+                                               phy_regarray_table_pg[i + 1],
+                                               phy_regarray_table_pg[i + 2]);
+                }
+        } else {
+
+                RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
+                         ("configtype != BaseBand_Config_PHY_REG\n"));
+        }
+        return true;
+}
+
+static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
+                                              enum radio_path rfpath)
+{
+        return true;
+}
+
+bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
+                                          enum radio_path rfpath)
+{
+
+        int i;
+        bool rtstatus = true;
+        u32 *radioa_array_table;
+        u32 *radiob_array_table;
+        u16 radioa_arraylen, radiob_arraylen;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                radioa_arraylen = RADIOA_2TARRAYLENGTH;
+                radioa_array_table = RTL8192CERADIOA_2TARRAY;
+                radiob_arraylen = RADIOB_2TARRAYLENGTH;
+                radiob_array_table = RTL8192CE_RADIOB_2TARRAY;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_A:RTL8192CERADIOA_2TARRAY\n"));
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_B:RTL8192CE_RADIOB_2TARRAY\n"));
+        } else {
+                radioa_arraylen = RADIOA_1TARRAYLENGTH;
+                radioa_array_table = RTL8192CE_RADIOA_1TARRAY;
+                radiob_arraylen = RADIOB_1TARRAYLENGTH;
+                radiob_array_table = RTL8192CE_RADIOB_1TARRAY;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_A:RTL8192CE_RADIOA_1TARRAY\n"));
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_B:RTL8192CE_RADIOB_1TARRAY\n"));
+        }
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Radio No %x\n", rfpath));
+        rtstatus = true;
+        switch (rfpath) {
+        case RF90_PATH_A:
+                for (i = 0; i < radioa_arraylen; i = i + 2) {
+                        if (radioa_array_table[i] == 0xfe)
+                                mdelay(50);
+                        else if (radioa_array_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (radioa_array_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (radioa_array_table[i] == 0xfb)
+                                udelay(50);
+                        else if (radioa_array_table[i] == 0xfa)
+                                udelay(5);
+                        else if (radioa_array_table[i] == 0xf9)
+                                udelay(1);
+                        else {
+                                rtl_set_rfreg(hw, rfpath, radioa_array_table[i],
+                                              RFREG_OFFSET_MASK,
+                                              radioa_array_table[i + 1]);
+                                udelay(1);
+                        }
+                }
+                _rtl92c_phy_config_rf_external_pa(hw, rfpath);
+                break;
+        case RF90_PATH_B:
+                for (i = 0; i < radiob_arraylen; i = i + 2) {
+                        if (radiob_array_table[i] == 0xfe) {
+                                mdelay(50);
+                        } else if (radiob_array_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (radiob_array_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (radiob_array_table[i] == 0xfb)
+                                udelay(50);
+                        else if (radiob_array_table[i] == 0xfa)
+                                udelay(5);
+                        else if (radiob_array_table[i] == 0xf9)
+                                udelay(1);
+                        else {
+                                rtl_set_rfreg(hw, rfpath, radiob_array_table[i],
+                                              RFREG_OFFSET_MASK,
+                                              radiob_array_table[i + 1]);
+                                udelay(1);
+                        }
+                }
+                break;
+        case RF90_PATH_C:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        case RF90_PATH_D:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        return true;
+}
+
+void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->default_initialgain[0] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[1] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[2] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[3] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Default initial gain (c50=0x%x, "
+                  "c58=0x%x, c60=0x%x, c68=0x%x\n",
+                  rtlphy->default_initialgain[0],
+                  rtlphy->default_initialgain[1],
+                  rtlphy->default_initialgain[2],
+                  rtlphy->default_initialgain[3]));
+
+        rtlphy->framesync = (u8) rtl_get_bbreg(hw,
+                                               ROFDM0_RXDETECTOR3, MASKBYTE0);
+        rtlphy->framesync_c34 = rtl_get_bbreg(hw,
+                                              ROFDM0_RXDETECTOR2, MASKDWORD);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Default framesync (0x%x) = 0x%x\n",
+                  ROFDM0_RXDETECTOR3, rtlphy->framesync));
+}
+
+static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset =
+            RFPGA0_XA_LSSIPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset =
+            RFPGA0_XB_LSSIPARAMETER;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_select = rFPGA0_XAB_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = rFPGA0_XCD_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = rFPGA0_XCD_RFPARAMETER;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1;
+        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para1 = RFPGA0_XB_HSSIPARAMETER1;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2;
+        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control =
+            RFPGA0_XAB_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control =
+            RFPGA0_XAB_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control =
+            RFPGA0_XCD_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control =
+            RFPGA0_XCD_SWITCHCONTROL;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control1 = ROFDM0_XDAGCCORE1;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control2 = ROFDM0_XAAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control2 = ROFDM0_XBAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance =
+            ROFDM0_XARXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance =
+            ROFDM0_XBRXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance =
+            ROFDM0_XCRXIQIMBANLANCE;
+        rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance =
+            ROFDM0_XDRXIQIMBALANCE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE;
+        rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE;
+        rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance =
+            ROFDM0_XATXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance =
+            ROFDM0_XBTXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance =
+            ROFDM0_XCTXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance =
+            ROFDM0_XDTXIQIMBALANCE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback =
+            RFPGA0_XA_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback =
+            RFPGA0_XB_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback =
+            RFPGA0_XC_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback =
+            RFPGA0_XD_LSSIREADBACK;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi =
+            TRANSCEIVEA_HSPI_READBACK;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi =
+            TRANSCEIVEB_HSPI_READBACK;
+
+}
+
+void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 txpwr_level;
+        long txpwr_dbm;
+
+        txpwr_level = rtlphy->cur_cck_txpwridx;
+        txpwr_dbm = _rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                                 WIRELESS_MODE_B, txpwr_level);
+        txpwr_level = rtlphy->cur_ofdm24g_txpwridx +
+            rtlefuse->legacy_ht_txpowerdiff;
+        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                         WIRELESS_MODE_G,
+                                         txpwr_level) > txpwr_dbm)
+                txpwr_dbm =
+                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_G,
+                                                 txpwr_level);
+        txpwr_level = rtlphy->cur_ofdm24g_txpwridx;
+        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                         WIRELESS_MODE_N_24G,
+                                         txpwr_level) > txpwr_dbm)
+                txpwr_dbm =
+                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_N_24G,
+                                                 txpwr_level);
+        *powerlevel = txpwr_dbm;
+}
+
+static void _rtl92c_get_txpower_index(struct ieee80211_hw *hw, u8 channel,
+                                      u8 *cckpowerlevel, u8 *ofdmpowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 index = (channel - 1);
+
+        cckpowerlevel[RF90_PATH_A] =
+            rtlefuse->txpwrlevel_cck[RF90_PATH_A][index];
+        cckpowerlevel[RF90_PATH_B] =
+            rtlefuse->txpwrlevel_cck[RF90_PATH_B][index];
+        if (get_rf_type(rtlphy) == RF_1T2R || get_rf_type(rtlphy) == RF_1T1R) {
+                ofdmpowerlevel[RF90_PATH_A] =
+                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_A][index];
+                ofdmpowerlevel[RF90_PATH_B] =
+                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_B][index];
+        } else if (get_rf_type(rtlphy) == RF_2T2R) {
+                ofdmpowerlevel[RF90_PATH_A] =
+                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_A][index];
+                ofdmpowerlevel[RF90_PATH_B] =
+                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_B][index];
+        }
+}
+
+static void _rtl92c_ccxpower_index_check(struct ieee80211_hw *hw,
+                                         u8 channel, u8 *cckpowerlevel,
+                                         u8 *ofdmpowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->cur_cck_txpwridx = cckpowerlevel[0];
+        rtlphy->cur_ofdm24g_txpwridx = ofdmpowerlevel[0];
+}
+
+void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 cckpowerlevel[2], ofdmpowerlevel[2];
+
+        if (rtlefuse->b_txpwr_fromeprom == false)
+                return;
+        _rtl92c_get_txpower_index(hw, channel,
+                                  &cckpowerlevel[0], &ofdmpowerlevel[0]);
+        _rtl92c_ccxpower_index_check(hw,
+                                     channel, &cckpowerlevel[0],
+                                     &ofdmpowerlevel[0]);
+        rtl92c_phy_rf6052_set_cck_txpower(hw, &cckpowerlevel[0]);
+        rtl92c_phy_rf6052_set_ofdm_txpower(hw, &ofdmpowerlevel[0], channel);
+}
+
+bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, long power_indbm)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 idx;
+        u8 rf_path;
+
+        u8 ccktxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
+                                                      WIRELESS_MODE_B,
+                                                      power_indbm);
+        u8 ofdmtxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
+                                                       WIRELESS_MODE_N_24G,
+                                                       power_indbm);
+        if (ofdmtxpwridx - rtlefuse->legacy_ht_txpowerdiff > 0)
+                ofdmtxpwridx -= rtlefuse->legacy_ht_txpowerdiff;
+        else
+                ofdmtxpwridx = 0;
+        RT_TRACE(rtlpriv, COMP_TXAGC, DBG_TRACE,
+                 ("%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n",
+                  power_indbm, ccktxpwridx, ofdmtxpwridx));
+        for (idx = 0; idx < 14; idx++) {
+                for (rf_path = 0; rf_path < 2; rf_path++) {
+                        rtlefuse->txpwrlevel_cck[rf_path][idx] = ccktxpwridx;
+                        rtlefuse->txpwrlevel_ht40_1s[rf_path][idx] =
+                            ofdmtxpwridx;
+                        rtlefuse->txpwrlevel_ht40_2s[rf_path][idx] =
+                            ofdmtxpwridx;
+                }
+        }
+        rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+        return true;
+}
+
+void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval)
+{
+}
+
+static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
+                                       enum wireless_mode wirelessmode,
+                                       long power_indbm)
+{
+        u8 txpwridx;
+        long offset;
+
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                offset = -7;
+                break;
+        case WIRELESS_MODE_G:
+        case WIRELESS_MODE_N_24G:
+                offset = -8;
+                break;
+        default:
+                offset = -8;
+                break;
+        }
+
+        if ((power_indbm - offset) > 0)
+                txpwridx = (u8) ((power_indbm - offset) * 2);
+        else
+                txpwridx = 0;
+
+        if (txpwridx > MAX_TXPWR_IDX_NMODE_92S)
+                txpwridx = MAX_TXPWR_IDX_NMODE_92S;
+
+        return txpwridx;
+}
+
+static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
+                                         enum wireless_mode wirelessmode,
+                                         u8 txpwridx)
+{
+        long offset;
+        long pwrout_dbm;
+
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                offset = -7;
+                break;
+        case WIRELESS_MODE_G:
+        case WIRELESS_MODE_N_24G:
+                offset = -8;
+                break;
+        default:
+                offset = -8;
+                break;
+        }
+        pwrout_dbm = txpwridx / 2 + offset;
+        return pwrout_dbm;
+}
+
+void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        enum io_type iotype;
+
+        if (!is_hal_stop(rtlhal)) {
+                switch (operation) {
+                case SCAN_OPT_BACKUP:
+                        iotype = IO_CMD_PAUSE_DM_BY_SCAN;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_IO_CMD,
+                                                      (u8 *)&iotype);
+
+                        break;
+                case SCAN_OPT_RESTORE:
+                        iotype = IO_CMD_RESUME_DM_BY_SCAN;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_IO_CMD,
+                                                      (u8 *)&iotype);
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Unknown Scan Backup operation.\n"));
+                        break;
+                }
+        }
+}
+
+void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u8 reg_bw_opmode;
+        u8 reg_prsr_rsc;
+
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
+                 ("Switch to %s bandwidth\n",
+                  rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
+                  "20MHz" : "40MHz"))
+
+            if (is_hal_stop(rtlhal))
+                return;
+
+        reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE);
+        reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2);
+
+        switch (rtlphy->current_chan_bw) {
+        case HT_CHANNEL_WIDTH_20:
+                reg_bw_opmode |= BW_OPMODE_20MHZ;
+                rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
+                break;
+
+        case HT_CHANNEL_WIDTH_20_40:
+                reg_bw_opmode &= ~BW_OPMODE_20MHZ;
+                rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
+
+                reg_prsr_rsc =
+                    (reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5);
+                rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
+                break;
+
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
+                break;
+        }
+
+        switch (rtlphy->current_chan_bw) {
+        case HT_CHANNEL_WIDTH_20:
+                rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);
+                rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);
+                rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
+                break;
+        case HT_CHANNEL_WIDTH_20_40:
+                rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
+                rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);
+                rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,
+                              (mac->cur_40_prime_sc >> 1));
+                rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);
+                rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0);
+                rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),
+                              (mac->cur_40_prime_sc ==
+                               HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
+                break;
+        }
+        rtl92c_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
+        rtlphy->set_bwmode_inprogress = false;
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
+}
+
+void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
+                            enum nl80211_channel_type ch_type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 tmp_bw = rtlphy->current_chan_bw;
+
+        if (rtlphy->set_bwmode_inprogress)
+                return;
+        rtlphy->set_bwmode_inprogress = true;
+        if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw)))
+                rtl92c_phy_set_bw_mode_callback(hw);
+        else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("FALSE driver sleep or unload\n"));
+                rtlphy->set_bwmode_inprogress = false;
+                rtlphy->current_chan_bw = tmp_bw;
+        }
+}
+
+void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 delay;
+
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
+                 ("switch to channel%d\n", rtlphy->current_channel));
+        if (is_hal_stop(rtlhal))
+                return;
+        do {
+                if (!rtlphy->sw_chnl_inprogress)
+                        break;
+                if (!_rtl92c_phy_sw_chnl_step_by_step
+                    (hw, rtlphy->current_channel, &rtlphy->sw_chnl_stage,
+                     &rtlphy->sw_chnl_step, &delay)) {
+                        if (delay > 0)
+                                mdelay(delay);
+                        else
+                                continue;
+                } else
+                        rtlphy->sw_chnl_inprogress = false;
+                break;
+        } while (true);
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
+}
+
+u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlphy->sw_chnl_inprogress)
+                return 0;
+        if (rtlphy->set_bwmode_inprogress)
+                return 0;
+        RT_ASSERT((rtlphy->current_channel <= 14),
+                  ("WIRELESS_MODE_G but channel>14"));
+        rtlphy->sw_chnl_inprogress = true;
+        rtlphy->sw_chnl_stage = 0;
+        rtlphy->sw_chnl_step = 0;
+        if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
+                rtl92c_phy_sw_chnl_callback(hw);
+                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
+                         ("sw_chnl_inprogress false schdule workitem\n"));
+                rtlphy->sw_chnl_inprogress = false;
+        } else {
+                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
+                         ("sw_chnl_inprogress false driver sleep or"
+                          " unload\n"));
+                rtlphy->sw_chnl_inprogress = false;
+        }
+        return 1;
+}
+
+static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
+                                             u8 channel, u8 *stage, u8 *step,
+                                             u32 *delay)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct swchnlcmd precommoncmd[MAX_PRECMD_CNT];
+        u32 precommoncmdcnt;
+        struct swchnlcmd postcommoncmd[MAX_POSTCMD_CNT];
+        u32 postcommoncmdcnt;
+        struct swchnlcmd rfdependcmd[MAX_RFDEPENDCMD_CNT];
+        u32 rfdependcmdcnt;
+        struct swchnlcmd *currentcmd = NULL;
+        u8 rfpath;
+        u8 num_total_rfpath = rtlphy->num_total_rfpath;
+
+        precommoncmdcnt = 0;
+        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
+                                         MAX_PRECMD_CNT,
+                                         CMDID_SET_TXPOWEROWER_LEVEL, 0, 0, 0);
+        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
+                                         MAX_PRECMD_CNT, CMDID_END, 0, 0, 0);
+
+        postcommoncmdcnt = 0;
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(postcommoncmd, postcommoncmdcnt++,
+                                         MAX_POSTCMD_CNT, CMDID_END, 0, 0, 0);
+
+        rfdependcmdcnt = 0;
+
+        RT_ASSERT((channel >= 1 && channel <= 14),
+                  ("illegal channel for Zebra: %d\n", channel));
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
+                                         MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
+                                         RF_CHNLBW, channel, 10);
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
+                                         MAX_RFDEPENDCMD_CNT, CMDID_END, 0, 0,
+                                         0);
+
+        do {
+                switch (*stage) {
+                case 0:
+                        currentcmd = &precommoncmd[*step];
+                        break;
+                case 1:
+                        currentcmd = &rfdependcmd[*step];
+                        break;
+                case 2:
+                        currentcmd = &postcommoncmd[*step];
+                        break;
+                }
+
+                if (currentcmd->cmdid == CMDID_END) {
+                        if ((*stage) == 2) {
+                                return true;
+                        } else {
+                                (*stage)++;
+                                (*step) = 0;
+                                continue;
+                        }
+                }
+
+                switch (currentcmd->cmdid) {
+                case CMDID_SET_TXPOWEROWER_LEVEL:
+                        rtl92c_phy_set_txpower_level(hw, channel);
+                        break;
+                case CMDID_WRITEPORT_ULONG:
+                        rtl_write_dword(rtlpriv, currentcmd->para1,
+                                        currentcmd->para2);
+                        break;
+                case CMDID_WRITEPORT_USHORT:
+                        rtl_write_word(rtlpriv, currentcmd->para1,
+                                       (u16) currentcmd->para2);
+                        break;
+                case CMDID_WRITEPORT_UCHAR:
+                        rtl_write_byte(rtlpriv, currentcmd->para1,
+                                       (u8) currentcmd->para2);
+                        break;
+                case CMDID_RF_WRITEREG:
+                        for (rfpath = 0; rfpath < num_total_rfpath; rfpath++) {
+                                rtlphy->rfreg_chnlval[rfpath] =
+                                    ((rtlphy->rfreg_chnlval[rfpath] &
+                                      0xfffffc00) | currentcmd->para2);
+
+                                rtl_set_rfreg(hw, (enum radio_path)rfpath,
+                                              currentcmd->para1,
+                                              RFREG_OFFSET_MASK,
+                                              rtlphy->rfreg_chnlval[rfpath]);
+                        }
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+
+                break;
+        } while (true);
+
+        (*delay) = currentcmd->msdelay;
+        (*step)++;
+        return false;
+}
+
+static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
+                                             u32 cmdtableidx, u32 cmdtablesz,
+                                             enum swchnlcmd_id cmdid,
+                                             u32 para1, u32 para2, u32 msdelay)
+{
+        struct swchnlcmd *pcmd;
+
+        if (cmdtable == NULL) {
+                RT_ASSERT(false, ("cmdtable cannot be NULL.\n"));
+                return false;
+        }
+
+        if (cmdtableidx >= cmdtablesz)
+                return false;
+
+        pcmd = cmdtable + cmdtableidx;
+        pcmd->cmdid = cmdid;
+        pcmd->para1 = para1;
+        pcmd->para2 = para2;
+        pcmd->msdelay = msdelay;
+        return true;
+}
+
+bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath)
+{
+        return true;
+}
+
+static u8 _rtl92c_phy_path_a_iqk(struct ieee80211_hw *hw, bool config_pathb)
+{
+        u32 reg_eac, reg_e94, reg_e9c, reg_ea4;
+        u8 result = 0x00;
+
+        rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f);
+        rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f);
+        rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102);
+        rtl_set_bbreg(hw, 0xe3c, MASKDWORD,
+                      config_pathb ? 0x28160202 : 0x28160502);
+
+        if (config_pathb) {
+                rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22);
+                rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22);
+                rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102);
+                rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160202);
+        }
+
+        rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x001028d1);
+        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000);
+        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000);
+
+        mdelay(IQK_DELAY_TIME);
+
+        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
+        reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD);
+        reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD);
+        reg_ea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD);
+
+        if (!(reg_eac & BIT(28)) &&
+            (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
+            (((reg_e9c & 0x03FF0000) >> 16) != 0x42))
+                result |= 0x01;
+        else
+                return result;
+
+        if (!(reg_eac & BIT(27)) &&
+            (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) &&
+            (((reg_eac & 0x03FF0000) >> 16) != 0x36))
+                result |= 0x02;
+        return result;
+}
+
+static u8 _rtl92c_phy_path_b_iqk(struct ieee80211_hw *hw)
+{
+        u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc;
+        u8 result = 0x00;
+
+        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002);
+        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000);
+        mdelay(IQK_DELAY_TIME);
+        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
+        reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD);
+        reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD);
+        reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD);
+        reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD);
+        if (!(reg_eac & BIT(31)) &&
+            (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&
+            (((reg_ebc & 0x03FF0000) >> 16) != 0x42))
+                result |= 0x01;
+        else
+                return result;
+
+        if (!(reg_eac & BIT(30)) &&
+            (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) &&
+            (((reg_ecc & 0x03FF0000) >> 16) != 0x36))
+                result |= 0x02;
+        return result;
+}
+
+static void _rtl92c_phy_path_a_fill_iqk_matrix(struct ieee80211_hw *hw,
+                                               bool b_iqk_ok, long result[][8],
+                                               u8 final_candidate, bool btxonly)
+{
+        u32 oldval_0, x, tx0_a, reg;
+        long y, tx0_c;
+
+        if (final_candidate == 0xFF)
+                return;
+        else if (b_iqk_ok) {
+                oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                          MASKDWORD) >> 22) & 0x3FF;
+                x = result[final_candidate][0];
+                if ((x & 0x00000200) != 0)
+                        x = x | 0xFFFFFC00;
+                tx0_a = (x * oldval_0) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x3FF, tx0_a);
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(31),
+                              ((x * oldval_0 >> 7) & 0x1));
+                y = result[final_candidate][1];
+                if ((y & 0x00000200) != 0)
+                        y = y | 0xFFFFFC00;
+                tx0_c = (y * oldval_0) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, 0xF0000000,
+                              ((tx0_c & 0x3C0) >> 6));
+                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x003F0000,
+                              (tx0_c & 0x3F));
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(29),
+                              ((y * oldval_0 >> 7) & 0x1));
+                if (btxonly)
+                        return;
+                reg = result[final_candidate][2];
+                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0x3FF, reg);
+                reg = result[final_candidate][3] & 0x3F;
+                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0xFC00, reg);
+                reg = (result[final_candidate][3] >> 6) & 0xF;
+                rtl_set_bbreg(hw, 0xca0, 0xF0000000, reg);
+        }
+}
+
+static void _rtl92c_phy_path_b_fill_iqk_matrix(struct ieee80211_hw *hw,
+                                               bool b_iqk_ok, long result[][8],
+                                               u8 final_candidate, bool btxonly)
+{
+        u32 oldval_1, x, tx1_a, reg;
+        long y, tx1_c;
+
+        if (final_candidate == 0xFF)
+                return;
+        else if (b_iqk_ok) {
+                oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
+                                          MASKDWORD) >> 22) & 0x3FF;
+                x = result[final_candidate][4];
+                if ((x & 0x00000200) != 0)
+                        x = x | 0xFFFFFC00;
+                tx1_a = (x * oldval_1) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x3FF, tx1_a);
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(27),
+                              ((x * oldval_1 >> 7) & 0x1));
+                y = result[final_candidate][5];
+                if ((y & 0x00000200) != 0)
+                        y = y | 0xFFFFFC00;
+                tx1_c = (y * oldval_1) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XDTXAFE, 0xF0000000,
+                              ((tx1_c & 0x3C0) >> 6));
+                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x003F0000,
+                              (tx1_c & 0x3F));
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(25),
+                              ((y * oldval_1 >> 7) & 0x1));
+                if (btxonly)
+                        return;
+                reg = result[final_candidate][6];
+                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0x3FF, reg);
+                reg = result[final_candidate][7] & 0x3F;
+                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0xFC00, reg);
+                reg = (result[final_candidate][7] >> 6) & 0xF;
+                rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, 0x0000F000, reg);
+        }
+}
+
+static void _rtl92c_phy_save_adda_registers(struct ieee80211_hw *hw,
+                                            u32 *addareg, u32 *addabackup,
+                                            u32 registernum)
+{
+        u32 i;
+
+        for (i = 0; i < registernum; i++)
+                addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD);
+}
+
+static void _rtl92c_phy_save_mac_registers(struct ieee80211_hw *hw,
+                                           u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+                macbackup[i] = rtl_read_byte(rtlpriv, macreg[i]);
+        macbackup[i] = rtl_read_dword(rtlpriv, macreg[i]);
+}
+
+static void _rtl92c_phy_reload_adda_registers(struct ieee80211_hw *hw,
+                                              u32 *addareg, u32 *addabackup,
+                                              u32 regiesternum)
+{
+        u32 i;
+
+        for (i = 0; i < regiesternum; i++)
+                rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]);
+}
+
+static void _rtl92c_phy_reload_mac_registers(struct ieee80211_hw *hw,
+                                             u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+                rtl_write_byte(rtlpriv, macreg[i], (u8) macbackup[i]);
+        rtl_write_dword(rtlpriv, macreg[i], macbackup[i]);
+}
+
+static void _rtl92c_phy_path_adda_on(struct ieee80211_hw *hw,
+                                     u32 *addareg, bool is_patha_on, bool is2t)
+{
+        u32 pathOn;
+        u32 i;
+
+        pathOn = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
+        if (false == is2t) {
+                pathOn = 0x0bdb25a0;
+                rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);
+        } else {
+                rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathOn);
+        }
+
+        for (i = 1; i < IQK_ADDA_REG_NUM; i++)
+                rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathOn);
+}
+
+static void _rtl92c_phy_mac_setting_calibration(struct ieee80211_hw *hw,
+                                                u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        rtl_write_byte(rtlpriv, macreg[0], 0x3F);
+
+        for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++)
+                rtl_write_byte(rtlpriv, macreg[i],
+                               (u8) (macbackup[i] & (~BIT(3))));
+        rtl_write_byte(rtlpriv, macreg[i], (u8) (macbackup[i] & (~BIT(5))));
+}
+
+static void _rtl92c_phy_path_a_standby(struct ieee80211_hw *hw)
+{
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0);
+        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
+}
+
+static void _rtl92c_phy_pi_mode_switch(struct ieee80211_hw *hw, bool pi_mode)
+{
+        u32 mode;
+
+        mode = pi_mode ? 0x01000100 : 0x01000000;
+        rtl_set_bbreg(hw, 0x820, MASKDWORD, mode);
+        rtl_set_bbreg(hw, 0x828, MASKDWORD, mode);
+}
+
+static bool _rtl92c_phy_simularity_compare(struct ieee80211_hw *hw,
+                                           long result[][8], u8 c1, u8 c2)
+{
+        u32 i, j, diff, simularity_bitmap, bound;
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        u8 final_candidate[2] = { 0xFF, 0xFF };
+        bool bresult = true, is2t = IS_92C_SERIAL(rtlhal->version);
+
+        if (is2t)
+                bound = 8;
+        else
+                bound = 4;
+
+        simularity_bitmap = 0;
+
+        for (i = 0; i < bound; i++) {
+                diff = (result[c1][i] > result[c2][i]) ?
+                    (result[c1][i] - result[c2][i]) :
+                    (result[c2][i] - result[c1][i]);
+
+                if (diff > MAX_TOLERANCE) {
+                        if ((i == 2 || i == 6) && !simularity_bitmap) {
+                                if (result[c1][i] + result[c1][i + 1] == 0)
+                                        final_candidate[(i / 4)] = c2;
+                                else if (result[c2][i] + result[c2][i + 1] == 0)
+                                        final_candidate[(i / 4)] = c1;
+                                else
+                                        simularity_bitmap = simularity_bitmap |
+                                            (1 << i);
+                        } else
+                                simularity_bitmap =
+                                    simularity_bitmap | (1 << i);
+                }
+        }
+
+        if (simularity_bitmap == 0) {
+                for (i = 0; i < (bound / 4); i++) {
+                        if (final_candidate[i] != 0xFF) {
+                                for (j = i * 4; j < (i + 1) * 4 - 2; j++)
+                                        result[3][j] =
+                                            result[final_candidate[i]][j];
+                                bresult = false;
+                        }
+                }
+                return bresult;
+        } else if (!(simularity_bitmap & 0x0F)) {
+                for (i = 0; i < 4; i++)
+                        result[3][i] = result[c1][i];
+                return false;
+        } else if (!(simularity_bitmap & 0xF0) && is2t) {
+                for (i = 4; i < 8; i++)
+                        result[3][i] = result[c1][i];
+                return false;
+        } else {
+                return false;
+        }
+
+}
+
+static void _rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw,
+                                     long result[][8], u8 t, bool is2t)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 i;
+        u8 patha_ok, pathb_ok;
+        u32 adda_reg[IQK_ADDA_REG_NUM] = {
+                0x85c, 0xe6c, 0xe70, 0xe74,
+                0xe78, 0xe7c, 0xe80, 0xe84,
+                0xe88, 0xe8c, 0xed0, 0xed4,
+                0xed8, 0xedc, 0xee0, 0xeec
+        };
+
+        u32 iqk_mac_reg[IQK_MAC_REG_NUM] = {
+                0x522, 0x550, 0x551, 0x040
+        };
+
+        const u32 retrycount = 2;
+
+        u32 bbvalue;
+
+        if (t == 0) {
+                bbvalue = rtl_get_bbreg(hw, 0x800, MASKDWORD);
+
+                _rtl92c_phy_save_adda_registers(hw, adda_reg,
+                                                rtlphy->adda_backup, 16);
+                _rtl92c_phy_save_mac_registers(hw, iqk_mac_reg,
+                                               rtlphy->iqk_mac_backup);
+        }
+        _rtl92c_phy_path_adda_on(hw, adda_reg, true, is2t);
+        if (t == 0) {
+                rtlphy->b_rfpi_enable = (u8) rtl_get_bbreg(hw,
+                                                   RFPGA0_XA_HSSIPARAMETER1,
+                                                   BIT(8));
+        }
+        if (!rtlphy->b_rfpi_enable)
+                _rtl92c_phy_pi_mode_switch(hw, true);
+        if (t == 0) {
+                rtlphy->reg_c04 = rtl_get_bbreg(hw, 0xc04, MASKDWORD);
+                rtlphy->reg_c08 = rtl_get_bbreg(hw, 0xc08, MASKDWORD);
+                rtlphy->reg_874 = rtl_get_bbreg(hw, 0x874, MASKDWORD);
+        }
+        rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600);
+        rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4);
+        rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000);
+        if (is2t) {
+                rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
+                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000);
+        }
+        _rtl92c_phy_mac_setting_calibration(hw, iqk_mac_reg,
+                                            rtlphy->iqk_mac_backup);
+        rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x00080000);
+        if (is2t)
+                rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x00080000);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
+        rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00);
+        rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800);
+        for (i = 0; i < retrycount; i++) {
+                patha_ok = _rtl92c_phy_path_a_iqk(hw, is2t);
+                if (patha_ok == 0x03) {
+                        result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        break;
+                } else if (i == (retrycount - 1) && patha_ok == 0x01)
+                        result[t][0] = (rtl_get_bbreg(hw, 0xe94,
+                                                      MASKDWORD) & 0x3FF0000) >>
+                                                      16;
+                result[t][1] =
+                    (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
+
+        }
+
+        if (is2t) {
+                _rtl92c_phy_path_a_standby(hw);
+                _rtl92c_phy_path_adda_on(hw, adda_reg, false, is2t);
+                for (i = 0; i < retrycount; i++) {
+                        pathb_ok = _rtl92c_phy_path_b_iqk(hw);
+                        if (pathb_ok == 0x03) {
+                                result[t][4] = (rtl_get_bbreg(hw,
+                                                      0xeb4,
+                                                      MASKDWORD) &
+                                                0x3FF0000) >> 16;
+                                result[t][5] =
+                                    (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                result[t][6] =
+                                    (rtl_get_bbreg(hw, 0xec4, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                result[t][7] =
+                                    (rtl_get_bbreg(hw, 0xecc, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                break;
+                        } else if (i == (retrycount - 1) && pathb_ok == 0x01) {
+                                result[t][4] = (rtl_get_bbreg(hw,
+                                                      0xeb4,
+                                                      MASKDWORD) &
+                                                0x3FF0000) >> 16;
+                        }
+                        result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                }
+        }
+        rtl_set_bbreg(hw, 0xc04, MASKDWORD, rtlphy->reg_c04);
+        rtl_set_bbreg(hw, 0x874, MASKDWORD, rtlphy->reg_874);
+        rtl_set_bbreg(hw, 0xc08, MASKDWORD, rtlphy->reg_c08);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0);
+        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3);
+        if (is2t)
+                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3);
+        if (t != 0) {
+                if (!rtlphy->b_rfpi_enable)
+                        _rtl92c_phy_pi_mode_switch(hw, false);
+                _rtl92c_phy_reload_adda_registers(hw, adda_reg,
+                                                  rtlphy->adda_backup, 16);
+                _rtl92c_phy_reload_mac_registers(hw, iqk_mac_reg,
+                                                 rtlphy->iqk_mac_backup);
+        }
+}
+
+static void _rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
+{
+        u8 tmpreg;
+        u32 rf_a_mode = 0, rf_b_mode = 0, lc_cal;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        tmpreg = rtl_read_byte(rtlpriv, 0xd03);
+
+        if ((tmpreg & 0x70) != 0)
+                rtl_write_byte(rtlpriv, 0xd03, tmpreg & 0x8F);
+        else
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+
+        if ((tmpreg & 0x70) != 0) {
+                rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS);
+
+                if (is2t)
+                        rf_b_mode = rtl_get_rfreg(hw, RF90_PATH_B, 0x00,
+                                                  MASK12BITS);
+
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS,
+                              (rf_a_mode & 0x8FFFF) | 0x10000);
+
+                if (is2t)
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS,
+                                      (rf_b_mode & 0x8FFFF) | 0x10000);
+        }
+        lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS);
+
+        rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, lc_cal | 0x08000);
+
+        mdelay(100);
+
+        if ((tmpreg & 0x70) != 0) {
+                rtl_write_byte(rtlpriv, 0xd03, tmpreg);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode);
+
+                if (is2t)
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS,
+                                      rf_b_mode);
+        } else {
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+        }
+}
+
+static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw,
+                                     char delta, bool is2t)
+{
+        /* This routine is deliberately dummied out for later fixes */
+#if 0
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        u32 reg_d[PATH_NUM];
+        u32 tmpreg, index, offset, path, i, pathbound = PATH_NUM, apkbound;
+
+        u32 bb_backup[APK_BB_REG_NUM];
+        u32 bb_reg[APK_BB_REG_NUM] = {
+                0x904, 0xc04, 0x800, 0xc08, 0x874
+        };
+        u32 bb_ap_mode[APK_BB_REG_NUM] = {
+                0x00000020, 0x00a05430, 0x02040000,
+                0x000800e4, 0x00204000
+        };
+        u32 bb_normal_ap_mode[APK_BB_REG_NUM] = {
+                0x00000020, 0x00a05430, 0x02040000,
+                0x000800e4, 0x22204000
+        };
+
+        u32 afe_backup[APK_AFE_REG_NUM];
+        u32 afe_reg[APK_AFE_REG_NUM] = {
+                0x85c, 0xe6c, 0xe70, 0xe74, 0xe78,
+                0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c,
+                0xed0, 0xed4, 0xed8, 0xedc, 0xee0,
+                0xeec
+        };
+
+        u32 mac_backup[IQK_MAC_REG_NUM];
+        u32 mac_reg[IQK_MAC_REG_NUM] = {
+                0x522, 0x550, 0x551, 0x040
+        };
+
+        u32 apk_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
+                {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
+        };
+
+        u32 apk_normal_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},
+                {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
+        };
+
+        u32 apk_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
+                {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
+        };
+
+        u32 apk_normal_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},
+                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
+        };
+
+        u32 afe_on_off[PATH_NUM] = {
+                0x04db25a4, 0x0b1b25a4
+        };
+
+        u32 apk_offset[PATH_NUM] = { 0xb68, 0xb6c };
+
+        u32 apk_normal_offset[PATH_NUM] = { 0xb28, 0xb98 };
+
+        u32 apk_value[PATH_NUM] = { 0x92fc0000, 0x12fc0000 };
+
+        u32 apk_normal_value[PATH_NUM] = { 0x92680000, 0x12680000 };
+
+        const char apk_delta_mapping[APK_BB_REG_NUM][13] = {
+                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
+        };
+
+        const u32 apk_normal_setting_value_1[13] = {
+                0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
+                0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
+                0x12680000, 0x00880000, 0x00880000
+        };
+
+        const u32 apk_normal_setting_value_2[16] = {
+                0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
+                0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
+                0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
+                0x00050006
+        };
+
+        const u32 apk_result[PATH_NUM][APK_BB_REG_NUM];
+
+        long bb_offset, delta_v, delta_offset;
+
+        if (!is2t)
+                pathbound = 1;
+
+        for (index = 0; index < PATH_NUM; index++) {
+                apk_offset[index] = apk_normal_offset[index];
+                apk_value[index] = apk_normal_value[index];
+                afe_on_off[index] = 0x6fdb25a4;
+        }
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                for (path = 0; path < pathbound; path++) {
+                        apk_rf_init_value[path][index] =
+                            apk_normal_rf_init_value[path][index];
+                        apk_rf_value_0[path][index] =
+                            apk_normal_rf_value_0[path][index];
+                }
+                bb_ap_mode[index] = bb_normal_ap_mode[index];
+
+                apkbound = 6;
+        }
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                if (index == 0)
+                        continue;
+                bb_backup[index] = rtl_get_bbreg(hw, bb_reg[index], MASKDWORD);
+        }
+
+        _rtl92c_phy_save_mac_registers(hw, mac_reg, mac_backup);
+
+        _rtl92c_phy_save_adda_registers(hw, afe_reg, afe_backup, 16);
+
+        for (path = 0; path < pathbound; path++) {
+                if (path == RF90_PATH_A) {
+                        offset = 0xb00;
+                        for (index = 0; index < 11; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
+
+                        offset = 0xb68;
+                        for (; index < 13; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
+
+                        offset = 0xb00;
+                        for (index = 0; index < 16; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_2
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+                } else if (path == RF90_PATH_B) {
+                        offset = 0xb70;
+                        for (index = 0; index < 10; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xb28, MASKDWORD, 0x12680000);
+                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
+
+                        offset = 0xb68;
+                        index = 11;
+                        for (; index < 13; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
+
+                        offset = 0xb60;
+                        for (index = 0; index < 16; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_2
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+                }
+
+                reg_d[path] = rtl_get_rfreg(hw, (enum radio_path)path,
+                                            0xd, MASKDWORD);
+
+                for (index = 0; index < APK_AFE_REG_NUM; index++)
+                        rtl_set_bbreg(hw, afe_reg[index], MASKDWORD,
+                                      afe_on_off[path]);
+
+                if (path == RF90_PATH_A) {
+                        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                                if (index == 0)
+                                        continue;
+                                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD,
+                                              bb_ap_mode[index]);
+                        }
+                }
+
+                _rtl92c_phy_mac_setting_calibration(hw, mac_reg, mac_backup);
+
+                if (path == 0) {
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x0, MASKDWORD, 0x10000);
+                } else {
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASKDWORD,
+                                      0x10000);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
+                                      0x1000f);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
+                                      0x20103);
+                }
+
+                delta_offset = ((delta + 14) / 2);
+                if (delta_offset < 0)
+                        delta_offset = 0;
+                else if (delta_offset > 12)
+                        delta_offset = 12;
+
+                for (index = 0; index < APK_BB_REG_NUM; index++) {
+                        if (index != 1)
+                                continue;
+
+                        tmpreg = apk_rf_init_value[path][index];
+
+                        if (!rtlefuse->b_apk_thermalmeterignore) {
+                                bb_offset = (tmpreg & 0xF0000) >> 16;
+
+                                if (!(tmpreg & BIT(15)))
+                                        bb_offset = -bb_offset;
+
+                                delta_v =
+                                    apk_delta_mapping[index][delta_offset];
+
+                                bb_offset += delta_v;
+
+                                if (bb_offset < 0) {
+                                        tmpreg = tmpreg & (~BIT(15));
+                                        bb_offset = -bb_offset;
+                                } else {
+                                        tmpreg = tmpreg | BIT(15);
+                                }
+
+                                tmpreg =
+                                    (tmpreg & 0xFFF0FFFF) | (bb_offset << 16);
+                        }
+
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0xc,
+                                      MASKDWORD, 0x8992e);
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x0,
+                                      MASKDWORD, apk_rf_value_0[path][index]);
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
+                                      MASKDWORD, tmpreg);
+
+                        i = 0;
+                        do {
+                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80000000);
+                                rtl_set_bbreg(hw, apk_offset[path],
+                                              MASKDWORD, apk_value[0]);
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset 0x%x "
+                                         "value 0x%x\n",
+                                         apk_offset[path],
+                                         rtl_get_bbreg(hw, apk_offset[path],
+                                                       MASKDWORD)));
+
+                                mdelay(3);
+
+                                rtl_set_bbreg(hw, apk_offset[path],
+                                              MASKDWORD, apk_value[1]);
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset 0x%x "
+                                         "value 0x%x\n",
+                                         apk_offset[path],
+                                         rtl_get_bbreg(hw, apk_offset[path],
+                                                       MASKDWORD)));
+
+                                mdelay(20);
+
+                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+
+                                if (path == RF90_PATH_A)
+                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
+                                                               0x03E00000);
+                                else
+                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
+                                                               0xF8000000);
+
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset "
+                                         "0xbd8[25:21] %x\n", tmpreg));
+
+                                i++;
+
+                        } while (tmpreg > apkbound && i < 4);
+
+                        apk_result[path][index] = tmpreg;
+                }
+        }
+
+        _rtl92c_phy_reload_mac_registers(hw, mac_reg, mac_backup);
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                if (index == 0)
+                        continue;
+                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD, bb_backup[index]);
+        }
+
+        _rtl92c_phy_reload_adda_registers(hw, afe_reg, afe_backup, 16);
+
+        for (path = 0; path < pathbound; path++) {
+                rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
+                              MASKDWORD, reg_d[path]);
+
+                if (path == RF90_PATH_B) {
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
+                                      0x1000f);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
+                                      0x20101);
+                }
+
+                if (apk_result[path][1] > 6)
+                        apk_result[path][1] = 6;
+        }
+
+        for (path = 0; path < pathbound; path++) {
+                rtl_set_rfreg(hw, (enum radio_path)path, 0x3, MASKDWORD,
+                              ((apk_result[path][1] << 15) |
+                               (apk_result[path][1] << 10) |
+                               (apk_result[path][1] << 5) |
+                               apk_result[path][1]));
+
+                if (path == RF90_PATH_A)
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
+                                      ((apk_result[path][1] << 15) |
+                                       (apk_result[path][1] << 10) |
+                                       (0x00 << 5) | 0x05));
+                else
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
+                                      ((apk_result[path][1] << 15) |
+                                       (apk_result[path][1] << 10) |
+                                       (0x02 << 5) | 0x05));
+
+                rtl_set_rfreg(hw, (enum radio_path)path, 0xe, MASKDWORD,
+                              ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) |
+                               0x08));
+
+        }
+
+        rtlphy->b_apk_done = true;
+#endif
+}
+
+static void _rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw,
+                                          bool bmain, bool is2t)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (is_hal_stop(rtlhal)) {
+                rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01);
+                rtl_set_bbreg(hw, rFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
+        }
+        if (is2t) {
+                if (bmain)
+                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
+                                      BIT(5) | BIT(6), 0x1);
+                else
+                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
+                                      BIT(5) | BIT(6), 0x2);
+        } else {
+                if (bmain)
+                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x2);
+                else
+                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1);
+
+        }
+}
+
+#undef IQK_ADDA_REG_NUM
+#undef IQK_DELAY_TIME
+
+void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        long result[4][8];
+        u8 i, final_candidate;
+        bool b_patha_ok, b_pathb_ok;
+        long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4,
+            reg_ecc, reg_tmp = 0;
+        bool is12simular, is13simular, is23simular;
+        bool b_start_conttx = false, b_singletone = false;
+        u32 iqk_bb_reg[10] = {
+                ROFDM0_XARXIQIMBALANCE,
+                ROFDM0_XBRXIQIMBALANCE,
+                ROFDM0_ECCATHRESHOLD,
+                ROFDM0_AGCRSSITABLE,
+                ROFDM0_XATXIQIMBALANCE,
+                ROFDM0_XBTXIQIMBALANCE,
+                ROFDM0_XCTXIQIMBALANCE,
+                ROFDM0_XCTXAFE,
+                ROFDM0_XDTXAFE,
+                ROFDM0_RXIQEXTANTA
+        };
+
+        if (b_recovery) {
+                _rtl92c_phy_reload_adda_registers(hw,
+                                                  iqk_bb_reg,
+                                                  rtlphy->iqk_bb_backup, 10);
+                return;
+        }
+        if (b_start_conttx || b_singletone)
+                return;
+        for (i = 0; i < 8; i++) {
+                result[0][i] = 0;
+                result[1][i] = 0;
+                result[2][i] = 0;
+                result[3][i] = 0;
+        }
+        final_candidate = 0xff;
+        b_patha_ok = false;
+        b_pathb_ok = false;
+        is12simular = false;
+        is23simular = false;
+        is13simular = false;
+        for (i = 0; i < 3; i++) {
+                if (IS_92C_SERIAL(rtlhal->version))
+                        _rtl92c_phy_iq_calibrate(hw, result, i, true);
+                else
+                        _rtl92c_phy_iq_calibrate(hw, result, i, false);
+                if (i == 1) {
+                        is12simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 0,
+                                                                     1);
+                        if (is12simular) {
+                                final_candidate = 0;
+                                break;
+                        }
+                }
+                if (i == 2) {
+                        is13simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 0,
+                                                                     2);
+                        if (is13simular) {
+                                final_candidate = 0;
+                                break;
+                        }
+                        is23simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 1,
+                                                                     2);
+                        if (is23simular)
+                                final_candidate = 1;
+                        else {
+                                for (i = 0; i < 8; i++)
+                                        reg_tmp += result[3][i];
+
+                                if (reg_tmp != 0)
+                                        final_candidate = 3;
+                                else
+                                        final_candidate = 0xFF;
+                        }
+                }
+        }
+        for (i = 0; i < 4; i++) {
+                reg_e94 = result[i][0];
+                reg_e9c = result[i][1];
+                reg_ea4 = result[i][2];
+                reg_eac = result[i][3];
+                reg_eb4 = result[i][4];
+                reg_ebc = result[i][5];
+                reg_ec4 = result[i][6];
+                reg_ecc = result[i][7];
+        }
+        if (final_candidate != 0xff) {
+                rtlphy->reg_e94 = reg_e94 = result[final_candidate][0];
+                rtlphy->reg_e9c = reg_e9c = result[final_candidate][1];
+                reg_ea4 = result[final_candidate][2];
+                reg_eac = result[final_candidate][3];
+                rtlphy->reg_eb4 = reg_eb4 = result[final_candidate][4];
+                rtlphy->reg_ebc = reg_ebc = result[final_candidate][5];
+                reg_ec4 = result[final_candidate][6];
+                reg_ecc = result[final_candidate][7];
+                b_patha_ok = b_pathb_ok = true;
+        } else {
+                rtlphy->reg_e94 = rtlphy->reg_eb4 = 0x100;
+                rtlphy->reg_e9c = rtlphy->reg_ebc = 0x0;
+        }
+        if (reg_e94 != 0) /*&&(reg_ea4 != 0) */
+                _rtl92c_phy_path_a_fill_iqk_matrix(hw, b_patha_ok, result,
+                                                   final_candidate,
+                                                   (reg_ea4 == 0));
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                if (reg_eb4 != 0) /*&&(reg_ec4 != 0) */
+                        _rtl92c_phy_path_b_fill_iqk_matrix(hw, b_pathb_ok,
+                                                           result,
+                                                           final_candidate,
+                                                           (reg_ec4 == 0));
+        }
+        _rtl92c_phy_save_adda_registers(hw, iqk_bb_reg,
+                                        rtlphy->iqk_bb_backup, 10);
+}
+
+void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool b_start_conttx = false, b_singletone = false;
+
+        if (b_start_conttx || b_singletone)
+                return;
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_lc_calibrate(hw, true);
+        else
+                _rtl92c_phy_lc_calibrate(hw, false);
+}
+
+void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlphy->b_apk_done)
+                return;
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_ap_calibrate(hw, delta, true);
+        else
+                _rtl92c_phy_ap_calibrate(hw, delta, false);
+}
+
+void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_set_rfpath_switch(hw, bmain, true);
+        else
+                _rtl92c_phy_set_rfpath_switch(hw, bmain, false);
+}
+
+bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        bool b_postprocessing = false;
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("-->IO Cmd(%#x), set_io_inprogress(%d)\n",
+                  iotype, rtlphy->set_io_inprogress));
+        do {
+                switch (iotype) {
+                case IO_CMD_RESUME_DM_BY_SCAN:
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                                 ("[IO CMD] Resume DM after scan.\n"));
+                        b_postprocessing = true;
+                        break;
+                case IO_CMD_PAUSE_DM_BY_SCAN:
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                                 ("[IO CMD] Pause DM before scan.\n"));
+                        b_postprocessing = true;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+        } while (false);
+        if (b_postprocessing && !rtlphy->set_io_inprogress) {
+                rtlphy->set_io_inprogress = true;
+                rtlphy->current_io_type = iotype;
+        } else {
+                return false;
+        }
+        rtl92c_phy_set_io(hw);
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, ("<--IO Type(%#x)\n", iotype));
+        return true;
+}
+
+void rtl92c_phy_set_io(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("--->Cmd(%#x), set_io_inprogress(%d)\n",
+                  rtlphy->current_io_type, rtlphy->set_io_inprogress));
+        switch (rtlphy->current_io_type) {
+        case IO_CMD_RESUME_DM_BY_SCAN:
+                dm_digtable.cur_igvalue = rtlphy->initgain_backup.xaagccore1;
+                rtl92c_dm_write_dig(hw);
+                rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+                break;
+        case IO_CMD_PAUSE_DM_BY_SCAN:
+                rtlphy->initgain_backup.xaagccore1 = dm_digtable.cur_igvalue;
+                dm_digtable.cur_igvalue = 0x17;
+                rtl92c_dm_write_dig(hw);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        rtlphy->set_io_inprogress = false;
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("<---(%#x)\n", rtlphy->current_io_type));
+}
+
+void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+}
+
+static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw)
+{
+        u32 u4b_tmp;
+        u8 delay = 5;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
+        u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
+        while (u4b_tmp != 0 && delay > 0) {
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
+                u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
+                delay--;
+        }
+        if (delay == 0) {
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("Switch RF timeout !!!.\n"));
+                return;
+        }
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22);
+}
+
+static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
+                                            enum rf_pwrstate rfpwr_state)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool bresult = true;
+        u8 i, queue_id;
+        struct rtl8192_tx_ring *ring = NULL;
+
+        ppsc->set_rfpowerstate_inprogress = true;
+        switch (rfpwr_state) {
+        case ERFON:{
+                        if ((ppsc->rfpwr_state == ERFOFF) &&
+                            RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC)) {
+                                bool rtstatus;
+                                u32 InitializeCount = 0;
+                                do {
+                                        InitializeCount++;
+                                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                                 ("IPS Set eRf nic enable\n"));
+                                        rtstatus = rtl_ps_enable_nic(hw);
+                                } while ((rtstatus != true)
+                                         && (InitializeCount < 10));
+                                RT_CLEAR_PS_LEVEL(ppsc,
+                                                  RT_RF_OFF_LEVL_HALT_NIC);
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                         ("Set ERFON sleeped:%d ms\n",
+                                          jiffies_to_msecs(jiffies -
+                                                   ppsc->
+                                                   last_sleep_jiffies)));
+                                ppsc->last_awake_jiffies = jiffies;
+                                rtl92ce_phy_set_rf_on(hw);
+                        }
+                        if (mac->link_state == MAC80211_LINKED) {
+                                rtlpriv->cfg->ops->led_control(hw,
+                                                               LED_CTL_LINK);
+                        } else {
+                                rtlpriv->cfg->ops->led_control(hw,
+                                                               LED_CTL_NO_LINK);
+                        }
+                        break;
+                }
+        case ERFOFF:{
+                        for (queue_id = 0, i = 0;
+                             queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
+                                ring = &pcipriv->dev.tx_ring[queue_id];
+                                if (skb_queue_len(&ring->queue) == 0 ||
+                                    queue_id == BEACON_QUEUE) {
+                                        queue_id++;
+                                        continue;
+                                } else {
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("eRf Off/Sleep: %d times "
+                                                  "TcbBusyQueue[%d] "
+                                                  "=%d before doze!\n", (i + 1),
+                                                  queue_id,
+                                                  skb_queue_len(&ring->queue)));
+                                        udelay(10);
+                                        i++;
+                                }
+                                if (i >= MAX_DOZE_WAITING_TIMES_9x) {
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("\nERFOFF: %d times "
+                                                  "TcbBusyQueue[%d] = %d !\n",
+                                                  MAX_DOZE_WAITING_TIMES_9x,
+                                                  queue_id,
+                                                  skb_queue_len(&ring->queue)));
+                                        break;
+                                }
+                        }
+                        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
+                                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                         ("IPS Set eRf nic disable\n"));
+                                rtl_ps_disable_nic(hw);
+                                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+                        } else {
+                                if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) {
+                                        rtlpriv->cfg->ops->led_control(hw,
+                                                               LED_CTL_NO_LINK);
+                                } else {
+                                        rtlpriv->cfg->ops->led_control(hw,
+                                                             LED_CTL_POWER_OFF);
+                                }
+                        }
+                        break;
+                }
+        case ERFSLEEP:{
+                        if (ppsc->rfpwr_state == ERFOFF)
+                                break;
+                        for (queue_id = 0, i = 0;
+                             queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
+                                ring = &pcipriv->dev.tx_ring[queue_id];
+                                if (skb_queue_len(&ring->queue) == 0) {
+                                        queue_id++;
+                                        continue;
+                                } else {
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("eRf Off/Sleep: %d times "
+                                                  "TcbBusyQueue[%d] =%d before "
+                                                  "doze!\n", (i + 1), queue_id,
+                                                  skb_queue_len(&ring->queue)));
+                                        udelay(10);
+                                        i++;
+                                }
+                                if (i >= MAX_DOZE_WAITING_TIMES_9x) {
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("\n ERFSLEEP: %d times "
+                                                  "TcbBusyQueue[%d] = %d !\n",
+                                                  MAX_DOZE_WAITING_TIMES_9x,
+                                                  queue_id,
+                                                  skb_queue_len(&ring->queue)));
+                                        break;
+                                }
+                        }
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                 ("Set ERFSLEEP awaked:%d ms\n",
+                                  jiffies_to_msecs(jiffies -
+                                                   ppsc->last_awake_jiffies)));
+                        ppsc->last_sleep_jiffies = jiffies;
+                        _rtl92ce_phy_set_rf_sleep(hw);
+                        break;
+                }
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                bresult = false;
+                break;
+        }
+        if (bresult)
+                ppsc->rfpwr_state = rfpwr_state;
+        ppsc->set_rfpowerstate_inprogress = false;
+        return bresult;
+}
+
+bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
+                                   enum rf_pwrstate rfpwr_state)
+{
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool bresult = false;
+
+        if (rfpwr_state == ppsc->rfpwr_state)
+                return bresult;
+        bresult = _rtl92ce_phy_set_rf_power_state(hw, rfpwr_state);
+        return bresult;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h
new file mode 100644
index 000000000000..ca4daee6e9a8
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h
@@ -0,0 +1,237 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_PHY_H__
+#define __RTL92C_PHY_H__
+
+#define MAX_PRECMD_CNT                  16
+#define MAX_RFDEPENDCMD_CNT             16
+#define MAX_POSTCMD_CNT                 16
+
+#define MAX_DOZE_WAITING_TIMES_9x       64
+
+#define RT_CANNOT_IO(hw)                false
+#define HIGHPOWER_RADIOA_ARRAYLEN       22
+
+#define MAX_TOLERANCE                   5
+#define IQK_DELAY_TIME                  1
+
+#define APK_BB_REG_NUM                  5
+#define APK_AFE_REG_NUM                 16
+#define APK_CURVE_REG_NUM               4
+#define PATH_NUM                        2
+
+#define LOOP_LIMIT                      5
+#define MAX_STALL_TIME                  50
+#define AntennaDiversityValue           0x80
+#define MAX_TXPWR_IDX_NMODE_92S         63
+#define Reset_Cnt_Limit                 3
+
+#define IQK_ADDA_REG_NUM                16
+#define IQK_MAC_REG_NUM                 4
+
+#define RF90_PATH_MAX                   2
+#define CHANNEL_MAX_NUMBER              14
+#define CHANNEL_GROUP_MAX               3
+
+#define CT_OFFSET_MAC_ADDR              0X16
+
+#define CT_OFFSET_CCK_TX_PWR_IDX        0x5A
+#define CT_OFFSET_HT401S_TX_PWR_IDX     0x60
+#define CT_OFFSET_HT402S_TX_PWR_IDX_DIF 0x66
+#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF  0x69
+#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF  0x6C
+
+#define CT_OFFSET_HT40_MAX_PWR_OFFSET   0x6F
+#define CT_OFFSET_HT20_MAX_PWR_OFFSET   0x72
+
+#define CT_OFFSET_CHANNEL_PLAH          0x75
+#define CT_OFFSET_THERMAL_METER         0x78
+#define CT_OFFSET_RF_OPTION             0x79
+#define CT_OFFSET_VERSION               0x7E
+#define CT_OFFSET_CUSTOMER_ID           0x7F
+
+#define RTL92C_MAX_PATH_NUM             2
+#define CHANNEL_MAX_NUMBER              14
+#define CHANNEL_GROUP_MAX               3
+
+enum swchnlcmd_id {
+        CMDID_END,
+        CMDID_SET_TXPOWEROWER_LEVEL,
+        CMDID_BBREGWRITE10,
+        CMDID_WRITEPORT_ULONG,
+        CMDID_WRITEPORT_USHORT,
+        CMDID_WRITEPORT_UCHAR,
+        CMDID_RF_WRITEREG,
+};
+
+struct swchnlcmd {
+        enum swchnlcmd_id cmdid;
+        u32 para1;
+        u32 para2;
+        u32 msdelay;
+};
+
+enum hw90_block_e {
+        HW90_BLOCK_MAC = 0,
+        HW90_BLOCK_PHY0 = 1,
+        HW90_BLOCK_PHY1 = 2,
+        HW90_BLOCK_RF = 3,
+        HW90_BLOCK_MAXIMUM = 4,
+};
+
+enum baseband_config_type {
+        BASEBAND_CONFIG_PHY_REG = 0,
+        BASEBAND_CONFIG_AGC_TAB = 1,
+};
+
+enum ra_offset_area {
+        RA_OFFSET_LEGACY_OFDM1,
+        RA_OFFSET_LEGACY_OFDM2,
+        RA_OFFSET_HT_OFDM1,
+        RA_OFFSET_HT_OFDM2,
+        RA_OFFSET_HT_OFDM3,
+        RA_OFFSET_HT_OFDM4,
+        RA_OFFSET_HT_CCK,
+};
+
+enum antenna_path {
+        ANTENNA_NONE,
+        ANTENNA_D,
+        ANTENNA_C,
+        ANTENNA_CD,
+        ANTENNA_B,
+        ANTENNA_BD,
+        ANTENNA_BC,
+        ANTENNA_BCD,
+        ANTENNA_A,
+        ANTENNA_AD,
+        ANTENNA_AC,
+        ANTENNA_ACD,
+        ANTENNA_AB,
+        ANTENNA_ABD,
+        ANTENNA_ABC,
+        ANTENNA_ABCD
+};
+
+struct r_antenna_select_ofdm {
+        u32 r_tx_antenna:4;
+        u32 r_ant_l:4;
+        u32 r_ant_non_ht:4;
+        u32 r_ant_ht1:4;
+        u32 r_ant_ht2:4;
+        u32 r_ant_ht_s1:4;
+        u32 r_ant_non_ht_s1:4;
+        u32 ofdm_txsc:2;
+        u32 reserved:2;
+};
+
+struct r_antenna_select_cck {
+        u8 r_cckrx_enable_2:2;
+        u8 r_cckrx_enable:2;
+        u8 r_ccktx_enable:4;
+};
+
+struct efuse_contents {
+        u8 mac_addr[ETH_ALEN];
+        u8 cck_tx_power_idx[6];
+        u8 ht40_1s_tx_power_idx[6];
+        u8 ht40_2s_tx_power_idx_diff[3];
+        u8 ht20_tx_power_idx_diff[3];
+        u8 ofdm_tx_power_idx_diff[3];
+        u8 ht40_max_power_offset[3];
+        u8 ht20_max_power_offset[3];
+        u8 channel_plan;
+        u8 thermal_meter;
+        u8 rf_option[5];
+        u8 version;
+        u8 oem_id;
+        u8 regulatory;
+};
+
+struct tx_power_struct {
+        u8 cck[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 ht40_1s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 ht40_2s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 ht20_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 legacy_ht_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 legacy_ht_txpowerdiff;
+        u8 groupht20[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 groupht40[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
+        u8 pwrgroup_cnt;
+        u32 mcs_original_offset[4][16];
+};
+
+extern u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw,
+                                   u32 regaddr, u32 bitmask);
+extern void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
+                                  u32 regaddr, u32 bitmask, u32 data);
+extern u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
+                                   enum radio_path rfpath, u32 regaddr,
+                                   u32 bitmask);
+extern void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw,
+                                  enum radio_path rfpath, u32 regaddr,
+                                  u32 bitmask, u32 data);
+extern bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
+extern bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
+extern bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
+extern bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
+                                                 enum radio_path rfpath);
+extern void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
+extern void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw,
+                                         long *powerlevel);
+extern void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
+extern bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
+                                          long power_indbm);
+extern void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw,
+                                             u8 operation);
+extern void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
+extern void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
+                                   enum nl80211_channel_type ch_type);
+extern void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
+extern u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
+extern void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
+extern void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw,
+                                         u16 beaconinterval);
+void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
+void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
+void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
+bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
+                                          enum radio_path rfpath);
+extern bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
+                                              u32 rfpath);
+bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
+extern bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
+                                          enum rf_pwrstate rfpwr_state);
+void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw);
+void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
+bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
+void rtl92c_phy_set_io(struct ieee80211_hw *hw);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
new file mode 100644
index 000000000000..875d51465225
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
@@ -0,0 +1,2065 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_REG_H__
+#define __RTL92C_REG_H__
+
+#define REG_SYS_ISO_CTRL                        0x0000
+#define REG_SYS_FUNC_EN                         0x0002
+#define REG_APS_FSMCO                           0x0004
+#define REG_SYS_CLKR                            0x0008
+#define REG_9346CR                              0x000A
+#define REG_EE_VPD                              0x000C
+#define REG_AFE_MISC                            0x0010
+#define REG_SPS0_CTRL                           0x0011
+#define REG_SPS_OCP_CFG                         0x0018
+#define REG_RSV_CTRL                            0x001C
+#define REG_RF_CTRL                             0x001F
+#define REG_LDOA15_CTRL                         0x0020
+#define REG_LDOV12D_CTRL                        0x0021
+#define REG_LDOHCI12_CTRL                       0x0022
+#define REG_LPLDO_CTRL                          0x0023
+#define REG_AFE_XTAL_CTRL                       0x0024
+#define REG_AFE_PLL_CTRL                        0x0028
+#define REG_EFUSE_CTRL                          0x0030
+#define REG_EFUSE_TEST                          0x0034
+#define REG_PWR_DATA                            0x0038
+#define REG_CAL_TIMER                           0x003C
+#define REG_ACLK_MON                            0x003E
+#define REG_GPIO_MUXCFG                         0x0040
+#define REG_GPIO_IO_SEL                         0x0042
+#define REG_MAC_PINMUX_CFG                      0x0043
+#define REG_GPIO_PIN_CTRL                       0x0044
+#define REG_GPIO_INTM                           0x0048
+#define REG_LEDCFG0                             0x004C
+#define REG_LEDCFG1                             0x004D
+#define REG_LEDCFG2                             0x004E
+#define REG_LEDCFG3                             0x004F
+#define REG_FSIMR                               0x0050
+#define REG_FSISR                               0x0054
+
+#define REG_MCUFWDL                             0x0080
+
+#define REG_HMEBOX_EXT_0                        0x0088
+#define REG_HMEBOX_EXT_1                        0x008A
+#define REG_HMEBOX_EXT_2                        0x008C
+#define REG_HMEBOX_EXT_3                        0x008E
+
+#define REG_BIST_SCAN                           0x00D0
+#define REG_BIST_RPT                            0x00D4
+#define REG_BIST_ROM_RPT                        0x00D8
+#define REG_USB_SIE_INTF                        0x00E0
+#define REG_PCIE_MIO_INTF                       0x00E4
+#define REG_PCIE_MIO_INTD                       0x00E8
+#define REG_HPON_FSM                            0x00EC
+#define REG_SYS_CFG                             0x00F0
+
+#define REG_CR                                  0x0100
+#define REG_PBP                                 0x0104
+#define REG_TRXDMA_CTRL                         0x010C
+#define REG_TRXFF_BNDY                          0x0114
+#define REG_TRXFF_STATUS                        0x0118
+#define REG_RXFF_PTR                            0x011C
+#define REG_HIMR                                0x0120
+#define REG_HISR                                0x0124
+#define REG_HIMRE                               0x0128
+#define REG_HISRE                               0x012C
+#define REG_CPWM                                0x012F
+#define REG_FWIMR                               0x0130
+#define REG_FWISR                               0x0134
+#define REG_PKTBUF_DBG_CTRL                     0x0140
+#define REG_PKTBUF_DBG_DATA_L                   0x0144
+#define REG_PKTBUF_DBG_DATA_H                   0x0148
+
+#define REG_TC0_CTRL                            0x0150
+#define REG_TC1_CTRL                            0x0154
+#define REG_TC2_CTRL                            0x0158
+#define REG_TC3_CTRL                            0x015C
+#define REG_TC4_CTRL                            0x0160
+#define REG_TCUNIT_BASE                         0x0164
+#define REG_MBIST_START                         0x0174
+#define REG_MBIST_DONE                          0x0178
+#define REG_MBIST_FAIL                          0x017C
+#define REG_C2HEVT_MSG_NORMAL                   0x01A0
+#define REG_C2HEVT_MSG_TEST                     0x01B8
+#define REG_C2HEVT_CLEAR                        0x01BF
+#define REG_MCUTST_1                            0x01c0
+#define REG_FMETHR                              0x01C8
+#define REG_HMETFR                              0x01CC
+#define REG_HMEBOX_0                            0x01D0
+#define REG_HMEBOX_1                            0x01D4
+#define REG_HMEBOX_2                            0x01D8
+#define REG_HMEBOX_3                            0x01DC
+
+#define REG_LLT_INIT                            0x01E0
+#define REG_BB_ACCEESS_CTRL                     0x01E8
+#define REG_BB_ACCESS_DATA                      0x01EC
+
+#define REG_RQPN                                0x0200
+#define REG_FIFOPAGE                            0x0204
+#define REG_TDECTRL                             0x0208
+#define REG_TXDMA_OFFSET_CHK                    0x020C
+#define REG_TXDMA_STATUS                        0x0210
+#define REG_RQPN_NPQ                            0x0214
+
+#define REG_RXDMA_AGG_PG_TH                     0x0280
+#define REG_RXPKT_NUM                           0x0284
+#define REG_RXDMA_STATUS                        0x0288
+
+#define REG_PCIE_CTRL_REG                       0x0300
+#define REG_INT_MIG                             0x0304
+#define REG_BCNQ_DESA                           0x0308
+#define REG_HQ_DESA                             0x0310
+#define REG_MGQ_DESA                            0x0318
+#define REG_VOQ_DESA                            0x0320
+#define REG_VIQ_DESA                            0x0328
+#define REG_BEQ_DESA                            0x0330
+#define REG_BKQ_DESA                            0x0338
+#define REG_RX_DESA                             0x0340
+#define REG_DBI                                 0x0348
+#define REG_MDIO                                0x0354
+#define REG_DBG_SEL                             0x0360
+#define REG_PCIE_HRPWM                          0x0361
+#define REG_PCIE_HCPWM                          0x0363
+#define REG_UART_CTRL                           0x0364
+#define REG_UART_TX_DESA                        0x0370
+#define REG_UART_RX_DESA                        0x0378
+
+#define REG_HDAQ_DESA_NODEF                     0x0000
+#define REG_CMDQ_DESA_NODEF                     0x0000
+
+#define REG_VOQ_INFORMATION                     0x0400
+#define REG_VIQ_INFORMATION                     0x0404
+#define REG_BEQ_INFORMATION                     0x0408
+#define REG_BKQ_INFORMATION                     0x040C
+#define REG_MGQ_INFORMATION                     0x0410
+#define REG_HGQ_INFORMATION                     0x0414
+#define REG_BCNQ_INFORMATION                    0x0418
+
+#define REG_CPU_MGQ_INFORMATION                 0x041C
+#define REG_FWHW_TXQ_CTRL                       0x0420
+#define REG_HWSEQ_CTRL                          0x0423
+#define REG_TXPKTBUF_BCNQ_BDNY                  0x0424
+#define REG_TXPKTBUF_MGQ_BDNY                   0x0425
+#define REG_MULTI_BCNQ_EN                       0x0426
+#define REG_MULTI_BCNQ_OFFSET                   0x0427
+#define REG_SPEC_SIFS                           0x0428
+#define REG_RL                                  0x042A
+#define REG_DARFRC                              0x0430
+#define REG_RARFRC                              0x0438
+#define REG_RRSR                                0x0440
+#define REG_ARFR0                               0x0444
+#define REG_ARFR1                               0x0448
+#define REG_ARFR2                               0x044C
+#define REG_ARFR3                               0x0450
+#define REG_AGGLEN_LMT                          0x0458
+#define REG_AMPDU_MIN_SPACE                     0x045C
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD             0x045D
+#define REG_FAST_EDCA_CTRL                      0x0460
+#define REG_RD_RESP_PKT_TH                      0x0463
+#define REG_INIRTS_RATE_SEL                     0x0480
+#define REG_INIDATA_RATE_SEL                    0x0484
+#define REG_POWER_STATUS                        0x04A4
+#define REG_POWER_STAGE1                        0x04B4
+#define REG_POWER_STAGE2                        0x04B8
+#define REG_PKT_LIFE_TIME                       0x04C0
+#define REG_STBC_SETTING                        0x04C4
+#define REG_PROT_MODE_CTRL                      0x04C8
+#define REG_BAR_MODE_CTRL                       0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT                 0x04CF
+#define REG_NQOS_SEQ                            0x04DC
+#define REG_QOS_SEQ                             0x04DE
+#define REG_NEED_CPU_HANDLE                     0x04E0
+#define REG_PKT_LOSE_RPT                        0x04E1
+#define REG_PTCL_ERR_STATUS                     0x04E2
+#define REG_DUMMY                               0x04FC
+
+#define REG_EDCA_VO_PARAM                       0x0500
+#define REG_EDCA_VI_PARAM                       0x0504
+#define REG_EDCA_BE_PARAM                       0x0508
+#define REG_EDCA_BK_PARAM                       0x050C
+#define REG_BCNTCFG                             0x0510
+#define REG_PIFS                                0x0512
+#define REG_RDG_PIFS                            0x0513
+#define REG_SIFS_CTX                            0x0514
+#define REG_SIFS_TRX                            0x0516
+#define REG_AGGR_BREAK_TIME                     0x051A
+#define REG_SLOT                                0x051B
+#define REG_TX_PTCL_CTRL                        0x0520
+#define REG_TXPAUSE                             0x0522
+#define REG_DIS_TXREQ_CLR                       0x0523
+#define REG_RD_CTRL                             0x0524
+#define REG_TBTT_PROHIBIT                       0x0540
+#define REG_RD_NAV_NXT                          0x0544
+#define REG_NAV_PROT_LEN                        0x0546
+#define REG_BCN_CTRL                            0x0550
+#define REG_USTIME_TSF                          0x0551
+#define REG_MBID_NUM                            0x0552
+#define REG_DUAL_TSF_RST                        0x0553
+#define REG_BCN_INTERVAL                        0x0554
+#define REG_MBSSID_BCN_SPACE                    0x0554
+#define REG_DRVERLYINT                          0x0558
+#define REG_BCNDMATIM                           0x0559
+#define REG_ATIMWND                             0x055A
+#define REG_BCN_MAX_ERR                         0x055D
+#define REG_RXTSF_OFFSET_CCK                    0x055E
+#define REG_RXTSF_OFFSET_OFDM                   0x055F
+#define REG_TSFTR                               0x0560
+#define REG_INIT_TSFTR                          0x0564
+#define REG_PSTIMER                             0x0580
+#define REG_TIMER0                              0x0584
+#define REG_TIMER1                              0x0588
+#define REG_ACMHWCTRL                           0x05C0
+#define REG_ACMRSTCTRL                          0x05C1
+#define REG_ACMAVG                              0x05C2
+#define REG_VO_ADMTIME                          0x05C4
+#define REG_VI_ADMTIME                          0x05C6
+#define REG_BE_ADMTIME                          0x05C8
+#define REG_EDCA_RANDOM_GEN                     0x05CC
+#define REG_SCH_TXCMD                           0x05D0
+
+#define REG_APSD_CTRL                           0x0600
+#define REG_BWOPMODE                            0x0603
+#define REG_TCR                                 0x0604
+#define REG_RCR                                 0x0608
+#define REG_RX_PKT_LIMIT                        0x060C
+#define REG_RX_DLK_TIME                         0x060D
+#define REG_RX_DRVINFO_SZ                       0x060F
+
+#define REG_MACID                               0x0610
+#define REG_BSSID                               0x0618
+#define REG_MAR                                 0x0620
+#define REG_MBIDCAMCFG                          0x0628
+
+#define REG_USTIME_EDCA                         0x0638
+#define REG_MAC_SPEC_SIFS                       0x063A
+#define REG_RESP_SIFS_CCK                       0x063C
+#define REG_RESP_SIFS_OFDM                      0x063E
+#define REG_ACKTO                               0x0640
+#define REG_CTS2TO                              0x0641
+#define REG_EIFS                                0x0642
+
+#define REG_NAV_CTRL                            0x0650
+#define REG_BACAMCMD                            0x0654
+#define REG_BACAMCONTENT                        0x0658
+#define REG_LBDLY                               0x0660
+#define REG_FWDLY                               0x0661
+#define REG_RXERR_RPT                           0x0664
+#define REG_WMAC_TRXPTCL_CTL                    0x0668
+
+#define REG_CAMCMD                              0x0670
+#define REG_CAMWRITE                            0x0674
+#define REG_CAMREAD                             0x0678
+#define REG_CAMDBG                              0x067C
+#define REG_SECCFG                              0x0680
+
+#define REG_WOW_CTRL                            0x0690
+#define REG_PSSTATUS                            0x0691
+#define REG_PS_RX_INFO                          0x0692
+#define REG_LPNAV_CTRL                          0x0694
+#define REG_WKFMCAM_CMD                         0x0698
+#define REG_WKFMCAM_RWD                         0x069C
+#define REG_RXFLTMAP0                           0x06A0
+#define REG_RXFLTMAP1                           0x06A2
+#define REG_RXFLTMAP2                           0x06A4
+#define REG_BCN_PSR_RPT                         0x06A8
+#define REG_CALB32K_CTRL                        0x06AC
+#define REG_PKT_MON_CTRL                        0x06B4
+#define REG_BT_COEX_TABLE                       0x06C0
+#define REG_WMAC_RESP_TXINFO                    0x06D8
+
+#define REG_USB_INFO                            0xFE17
+#define REG_USB_SPECIAL_OPTION                  0xFE55
+#define REG_USB_DMA_AGG_TO                      0xFE5B
+#define REG_USB_AGG_TO                          0xFE5C
+#define REG_USB_AGG_TH                          0xFE5D
+
+#define REG_TEST_USB_TXQS                       0xFE48
+#define REG_TEST_SIE_VID                        0xFE60
+#define REG_TEST_SIE_PID                        0xFE62
+#define REG_TEST_SIE_OPTIONAL                   0xFE64
+#define REG_TEST_SIE_CHIRP_K                    0xFE65
+#define REG_TEST_SIE_PHY                        0xFE66
+#define REG_TEST_SIE_MAC_ADDR                   0xFE70
+#define REG_TEST_SIE_STRING                     0xFE80
+
+#define REG_NORMAL_SIE_VID                      0xFE60
+#define REG_NORMAL_SIE_PID                      0xFE62
+#define REG_NORMAL_SIE_OPTIONAL                 0xFE64
+#define REG_NORMAL_SIE_EP                       0xFE65
+#define REG_NORMAL_SIE_PHY                      0xFE68
+#define REG_NORMAL_SIE_MAC_ADDR                 0xFE70
+#define REG_NORMAL_SIE_STRING                   0xFE80
+
+#define CR9346                                  REG_9346CR
+#define MSR                                     (REG_CR + 2)
+#define ISR                                     REG_HISR
+#define TSFR                                    REG_TSFTR
+
+#define MACIDR0                                 REG_MACID
+#define MACIDR4                                 (REG_MACID + 4)
+
+#define PBP                                     REG_PBP
+
+#define IDR0                                    MACIDR0
+#define IDR4                                    MACIDR4
+
+#define UNUSED_REGISTER                         0x1BF
+#define DCAM                                    UNUSED_REGISTER
+#define PSR                                     UNUSED_REGISTER
+#define BBADDR                                  UNUSED_REGISTER
+#define PHYDATAR                                UNUSED_REGISTER
+
+#define INVALID_BBRF_VALUE                      0x12345678
+
+#define MAX_MSS_DENSITY_2T                      0x13
+#define MAX_MSS_DENSITY_1T                      0x0A
+
+#define CMDEEPROM_EN                            BIT(5)
+#define CMDEEPROM_SEL                           BIT(4)
+#define CMD9346CR_9356SEL                       BIT(4)
+#define AUTOLOAD_EEPROM                         (CMDEEPROM_EN|CMDEEPROM_SEL)
+#define AUTOLOAD_EFUSE                          CMDEEPROM_EN
+
+#define GPIOSEL_GPIO                            0
+#define GPIOSEL_ENBT                            BIT(5)
+
+#define GPIO_IN                                 REG_GPIO_PIN_CTRL
+#define GPIO_OUT                                (REG_GPIO_PIN_CTRL+1)
+#define GPIO_IO_SEL                             (REG_GPIO_PIN_CTRL+2)
+#define GPIO_MOD                                (REG_GPIO_PIN_CTRL+3)
+
+#define MSR_NOLINK                              0x00
+#define MSR_ADHOC                               0x01
+#define MSR_INFRA                               0x02
+#define MSR_AP                                  0x03
+
+#define RRSR_RSC_OFFSET                         21
+#define RRSR_SHORT_OFFSET                       23
+#define RRSR_RSC_BW_40M                         0x600000
+#define RRSR_RSC_UPSUBCHNL                      0x400000
+#define RRSR_RSC_LOWSUBCHNL                     0x200000
+#define RRSR_SHORT                              0x800000
+#define RRSR_1M                                 BIT(0)
+#define RRSR_2M                                 BIT(1)
+#define RRSR_5_5M                               BIT(2)
+#define RRSR_11M                                BIT(3)
+#define RRSR_6M                                 BIT(4)
+#define RRSR_9M                                 BIT(5)
+#define RRSR_12M                                BIT(6)
+#define RRSR_18M                                BIT(7)
+#define RRSR_24M                                BIT(8)
+#define RRSR_36M                                BIT(9)
+#define RRSR_48M                                BIT(10)
+#define RRSR_54M                                BIT(11)
+#define RRSR_MCS0                               BIT(12)
+#define RRSR_MCS1                               BIT(13)
+#define RRSR_MCS2                               BIT(14)
+#define RRSR_MCS3                               BIT(15)
+#define RRSR_MCS4                               BIT(16)
+#define RRSR_MCS5                               BIT(17)
+#define RRSR_MCS6                               BIT(18)
+#define RRSR_MCS7                               BIT(19)
+#define BRSR_ACKSHORTPMB                        BIT(23)
+
+#define RATR_1M                                 0x00000001
+#define RATR_2M                                 0x00000002
+#define RATR_55M                                0x00000004
+#define RATR_11M                                0x00000008
+#define RATR_6M                                 0x00000010
+#define RATR_9M                                 0x00000020
+#define RATR_12M                                0x00000040
+#define RATR_18M                                0x00000080
+#define RATR_24M                                0x00000100
+#define RATR_36M                                0x00000200
+#define RATR_48M                                0x00000400
+#define RATR_54M                                0x00000800
+#define RATR_MCS0                               0x00001000
+#define RATR_MCS1                               0x00002000
+#define RATR_MCS2                               0x00004000
+#define RATR_MCS3                               0x00008000
+#define RATR_MCS4                               0x00010000
+#define RATR_MCS5                               0x00020000
+#define RATR_MCS6                               0x00040000
+#define RATR_MCS7                               0x00080000
+#define RATR_MCS8                               0x00100000
+#define RATR_MCS9                               0x00200000
+#define RATR_MCS10                              0x00400000
+#define RATR_MCS11                              0x00800000
+#define RATR_MCS12                              0x01000000
+#define RATR_MCS13                              0x02000000
+#define RATR_MCS14                              0x04000000
+#define RATR_MCS15                              0x08000000
+
+#define RATE_1M                                 BIT(0)
+#define RATE_2M                                 BIT(1)
+#define RATE_5_5M                               BIT(2)
+#define RATE_11M                                BIT(3)
+#define RATE_6M                                 BIT(4)
+#define RATE_9M                                 BIT(5)
+#define RATE_12M                                BIT(6)
+#define RATE_18M                                BIT(7)
+#define RATE_24M                                BIT(8)
+#define RATE_36M                                BIT(9)
+#define RATE_48M                                BIT(10)
+#define RATE_54M                                BIT(11)
+#define RATE_MCS0                               BIT(12)
+#define RATE_MCS1                               BIT(13)
+#define RATE_MCS2                               BIT(14)
+#define RATE_MCS3                               BIT(15)
+#define RATE_MCS4                               BIT(16)
+#define RATE_MCS5                               BIT(17)
+#define RATE_MCS6                               BIT(18)
+#define RATE_MCS7                               BIT(19)
+#define RATE_MCS8                               BIT(20)
+#define RATE_MCS9                               BIT(21)
+#define RATE_MCS10                              BIT(22)
+#define RATE_MCS11                              BIT(23)
+#define RATE_MCS12                              BIT(24)
+#define RATE_MCS13                              BIT(25)
+#define RATE_MCS14                              BIT(26)
+#define RATE_MCS15                              BIT(27)
+
+#define RATE_ALL_CCK            (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
+#define RATE_ALL_OFDM_AG        (RATR_6M | RATR_9M | RATR_12M | RATR_18M \
+                                | RATR_24M | RATR_36M | RATR_48M | RATR_54M)
+#define RATE_ALL_OFDM_1SS       (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | \
+                                RATR_MCS3 | RATR_MCS4 | RATR_MCS5 | \
+                                RATR_MCS6 | RATR_MCS7)
+#define RATE_ALL_OFDM_2SS       (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | \
+                                RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \
+                                RATR_MCS14 | RATR_MCS15)
+
+#define BW_OPMODE_20MHZ                         BIT(2)
+#define BW_OPMODE_5G                            BIT(1)
+#define BW_OPMODE_11J                           BIT(0)
+
+#define CAM_VALID                               BIT(15)
+#define CAM_NOTVALID                            0x0000
+#define CAM_USEDK                               BIT(5)
+
+#define CAM_NONE                                0x0
+#define CAM_WEP40                               0x01
+#define CAM_TKIP                                0x02
+#define CAM_AES                                 0x04
+#define CAM_WEP104                              0x05
+
+#define TOTAL_CAM_ENTRY                         32
+#define HALF_CAM_ENTRY                          16
+
+#define CAM_WRITE                               BIT(16)
+#define CAM_READ                                0x00000000
+#define CAM_POLLINIG                            BIT(31)
+
+#define SCR_USEDK                               0x01
+#define SCR_TXSEC_ENABLE                        0x02
+#define SCR_RXSEC_ENABLE                        0x04
+
+#define WOW_PMEN                                BIT(0)
+#define WOW_WOMEN                               BIT(1)
+#define WOW_MAGIC                               BIT(2)
+#define WOW_UWF                                 BIT(3)
+
+#define IMR8190_DISABLED                        0x0
+#define IMR_BCNDMAINT6                          BIT(31)
+#define IMR_BCNDMAINT5                          BIT(30)
+#define IMR_BCNDMAINT4                          BIT(29)
+#define IMR_BCNDMAINT3                          BIT(28)
+#define IMR_BCNDMAINT2                          BIT(27)
+#define IMR_BCNDMAINT1                          BIT(26)
+#define IMR_BCNDOK8                             BIT(25)
+#define IMR_BCNDOK7                             BIT(24)
+#define IMR_BCNDOK6                             BIT(23)
+#define IMR_BCNDOK5                             BIT(22)
+#define IMR_BCNDOK4                             BIT(21)
+#define IMR_BCNDOK3                             BIT(20)
+#define IMR_BCNDOK2                             BIT(19)
+#define IMR_BCNDOK1                             BIT(18)
+#define IMR_TIMEOUT2                            BIT(17)
+#define IMR_TIMEOUT1                            BIT(16)
+#define IMR_TXFOVW                              BIT(15)
+#define IMR_PSTIMEOUT                           BIT(14)
+#define IMR_BCNINT                              BIT(13)
+#define IMR_RXFOVW                              BIT(12)
+#define IMR_RDU                                 BIT(11)
+#define IMR_ATIMEND                             BIT(10)
+#define IMR_BDOK                                BIT(9)
+#define IMR_HIGHDOK                             BIT(8)
+#define IMR_TBDOK                               BIT(7)
+#define IMR_MGNTDOK                             BIT(6)
+#define IMR_TBDER                               BIT(5)
+#define IMR_BKDOK                               BIT(4)
+#define IMR_BEDOK                               BIT(3)
+#define IMR_VIDOK                               BIT(2)
+#define IMR_VODOK                               BIT(1)
+#define IMR_ROK                                 BIT(0)
+
+#define IMR_TXERR                               BIT(11)
+#define IMR_RXERR                               BIT(10)
+#define IMR_C2HCMD                              BIT(9)
+#define IMR_CPWM                                BIT(8)
+#define IMR_OCPINT                              BIT(1)
+#define IMR_WLANOFF                             BIT(0)
+
+#define HWSET_MAX_SIZE                          128
+
+#define EEPROM_DEFAULT_TSSI                     0x0
+#define EEPROM_DEFAULT_TXPOWERDIFF              0x0
+#define EEPROM_DEFAULT_CRYSTALCAP               0x5
+#define EEPROM_DEFAULT_BOARDTYPE                0x02
+#define EEPROM_DEFAULT_TXPOWER                  0x1010
+#define EEPROM_DEFAULT_HT2T_TXPWR               0x10
+
+#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF      0x3
+#define EEPROM_DEFAULT_THERMALMETER             0x12
+#define EEPROM_DEFAULT_ANTTXPOWERDIFF           0x0
+#define EEPROM_DEFAULT_TXPWDIFF_CRYSTALCAP      0x5
+#define EEPROM_DEFAULT_TXPOWERLEVEL             0x22
+#define EEPROM_DEFAULT_HT40_2SDIFF              0x0
+#define EEPROM_DEFAULT_HT20_DIFF                2
+#define EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF      0x3
+#define EEPROM_DEFAULT_HT40_PWRMAXOFFSET        0
+#define EEPROM_DEFAULT_HT20_PWRMAXOFFSET        0
+
+#define RF_OPTION1                              0x79
+#define RF_OPTION2                              0x7A
+#define RF_OPTION3                              0x7B
+#define RF_OPTION4                              0x7C
+
+#define EEPROM_DEFAULT_PID                      0x1234
+#define EEPROM_DEFAULT_VID                      0x5678
+#define EEPROM_DEFAULT_CUSTOMERID               0xAB
+#define EEPROM_DEFAULT_SUBCUSTOMERID            0xCD
+#define EEPROM_DEFAULT_VERSION                  0
+
+#define EEPROM_CHANNEL_PLAN_FCC                 0x0
+#define EEPROM_CHANNEL_PLAN_IC                  0x1
+#define EEPROM_CHANNEL_PLAN_ETSI                0x2
+#define EEPROM_CHANNEL_PLAN_SPAIN               0x3
+#define EEPROM_CHANNEL_PLAN_FRANCE              0x4
+#define EEPROM_CHANNEL_PLAN_MKK                 0x5
+#define EEPROM_CHANNEL_PLAN_MKK1                0x6
+#define EEPROM_CHANNEL_PLAN_ISRAEL              0x7
+#define EEPROM_CHANNEL_PLAN_TELEC               0x8
+#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN       0x9
+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13       0xA
+#define EEPROM_CHANNEL_PLAN_NCC                 0xB
+#define EEPROM_CHANNEL_PLAN_BY_HW_MASK          0x80
+
+#define EEPROM_CID_DEFAULT                      0x0
+#define EEPROM_CID_TOSHIBA                      0x4
+#define EEPROM_CID_CCX                          0x10
+#define EEPROM_CID_QMI                          0x0D
+#define EEPROM_CID_WHQL                         0xFE
+
+#define RTL8192_EEPROM_ID                       0x8129
+
+#define RTL8190_EEPROM_ID                       0x8129
+#define EEPROM_HPON                             0x02
+#define EEPROM_CLK                              0x06
+#define EEPROM_TESTR                            0x08
+
+#define EEPROM_VID                              0x0A
+#define EEPROM_DID                              0x0C
+#define EEPROM_SVID                             0x0E
+#define EEPROM_SMID                             0x10
+
+#define EEPROM_MAC_ADDR                         0x16
+
+#define EEPROM_CCK_TX_PWR_INX                   0x5A
+#define EEPROM_HT40_1S_TX_PWR_INX               0x60
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF          0x66
+#define EEPROM_HT20_TX_PWR_INX_DIFF             0x69
+#define EEPROM_OFDM_TX_PWR_INX_DIFF             0x6C
+#define EEPROM_HT40_MAX_PWR_OFFSET              0x6F
+#define EEPROM_HT20_MAX_PWR_OFFSET              0x72
+
+#define EEPROM_TSSI_A                           0x76
+#define EEPROM_TSSI_B                           0x77
+#define EEPROM_THERMAL_METER                    0x78
+#define EEPROM_XTAL_K                           0x78
+#define EEPROM_RF_OPT1                          0x79
+#define EEPROM_RF_OPT2                          0x7A
+#define EEPROM_RF_OPT3                          0x7B
+#define EEPROM_RF_OPT4                          0x7C
+#define EEPROM_CHANNEL_PLAN                     0x7D
+#define EEPROM_VERSION                          0x7E
+#define EEPROM_CUSTOMER_ID                      0x7F
+
+#define EEPROM_PWRDIFF                          0x54
+
+#define EEPROM_TXPOWERCCK                       0x5A
+#define EEPROM_TXPOWERHT40_1S                   0x60
+#define EEPROM_TXPOWERHT40_2SDIFF               0x66
+#define EEPROM_TXPOWERHT20DIFF                  0x69
+#define EEPROM_TXPOWER_OFDMDIFF                 0x6C
+
+#define EEPROM_TXPWR_GROUP                      0x6F
+
+#define EEPROM_TSSI_A                           0x76
+#define EEPROM_TSSI_B                           0x77
+#define EEPROM_THERMAL_METER                    0x78
+
+#define EEPROM_CHANNELPLAN                      0x75
+
+#define RF_OPTION1                              0x79
+#define RF_OPTION2                              0x7A
+#define RF_OPTION3                              0x7B
+#define RF_OPTION4                              0x7C
+
+#define STOPBECON                               BIT(6)
+#define STOPHIGHT                               BIT(5)
+#define STOPMGT                                 BIT(4)
+#define STOPVO                                  BIT(3)
+#define STOPVI                                  BIT(2)
+#define STOPBE                                  BIT(1)
+#define STOPBK                                  BIT(0)
+
+#define RCR_APPFCS                              BIT(31)
+#define RCR_APP_MIC                             BIT(30)
+#define RCR_APP_ICV                             BIT(29)
+#define RCR_APP_PHYST_RXFF                      BIT(28)
+#define RCR_APP_BA_SSN                          BIT(27)
+#define RCR_ENMBID                              BIT(24)
+#define RCR_LSIGEN                              BIT(23)
+#define RCR_MFBEN                               BIT(22)
+#define RCR_HTC_LOC_CTRL                        BIT(14)
+#define RCR_AMF                                 BIT(13)
+#define RCR_ACF                                 BIT(12)
+#define RCR_ADF                                 BIT(11)
+#define RCR_AICV                                BIT(9)
+#define RCR_ACRC32                              BIT(8)
+#define RCR_CBSSID_BCN                          BIT(7)
+#define RCR_CBSSID_DATA                         BIT(6)
+#define RCR_CBSSID                              RCR_CBSSID_DATA
+#define RCR_APWRMGT                             BIT(5)
+#define RCR_ADD3                                BIT(4)
+#define RCR_AB                                  BIT(3)
+#define RCR_AM                                  BIT(2)
+#define RCR_APM                                 BIT(1)
+#define RCR_AAP                                 BIT(0)
+#define RCR_MXDMA_OFFSET                        8
+#define RCR_FIFO_OFFSET                         13
+
+#define RSV_CTRL                                0x001C
+#define RD_CTRL                                 0x0524
+
+#define REG_USB_INFO                            0xFE17
+#define REG_USB_SPECIAL_OPTION                  0xFE55
+#define REG_USB_DMA_AGG_TO                      0xFE5B
+#define REG_USB_AGG_TO                          0xFE5C
+#define REG_USB_AGG_TH                          0xFE5D
+
+#define REG_USB_VID                             0xFE60
+#define REG_USB_PID                             0xFE62
+#define REG_USB_OPTIONAL                        0xFE64
+#define REG_USB_CHIRP_K                         0xFE65
+#define REG_USB_PHY                             0xFE66
+#define REG_USB_MAC_ADDR                        0xFE70
+#define REG_USB_HRPWM                           0xFE58
+#define REG_USB_HCPWM                           0xFE57
+
+#define SW18_FPWM                               BIT(3)
+
+#define ISO_MD2PP                               BIT(0)
+#define ISO_UA2USB                              BIT(1)
+#define ISO_UD2CORE                             BIT(2)
+#define ISO_PA2PCIE                             BIT(3)
+#define ISO_PD2CORE                             BIT(4)
+#define ISO_IP2MAC                              BIT(5)
+#define ISO_DIOP                                BIT(6)
+#define ISO_DIOE                                BIT(7)
+#define ISO_EB2CORE                             BIT(8)
+#define ISO_DIOR                                BIT(9)
+
+#define PWC_EV25V                               BIT(14)
+#define PWC_EV12V                               BIT(15)
+
+#define FEN_BBRSTB                              BIT(0)
+#define FEN_BB_GLB_RSTn                         BIT(1)
+#define FEN_USBA                                BIT(2)
+#define FEN_UPLL                                BIT(3)
+#define FEN_USBD                                BIT(4)
+#define FEN_DIO_PCIE                            BIT(5)
+#define FEN_PCIEA                               BIT(6)
+#define FEN_PPLL                                BIT(7)
+#define FEN_PCIED                               BIT(8)
+#define FEN_DIOE                                BIT(9)
+#define FEN_CPUEN                               BIT(10)
+#define FEN_DCORE                               BIT(11)
+#define FEN_ELDR                                BIT(12)
+#define FEN_DIO_RF                              BIT(13)
+#define FEN_HWPDN                               BIT(14)
+#define FEN_MREGEN                              BIT(15)
+
+#define PFM_LDALL                               BIT(0)
+#define PFM_ALDN                                BIT(1)
+#define PFM_LDKP                                BIT(2)
+#define PFM_WOWL                                BIT(3)
+#define EnPDN                                   BIT(4)
+#define PDN_PL                                  BIT(5)
+#define APFM_ONMAC                              BIT(8)
+#define APFM_OFF                                BIT(9)
+#define APFM_RSM                                BIT(10)
+#define AFSM_HSUS                               BIT(11)
+#define AFSM_PCIE                               BIT(12)
+#define APDM_MAC                                BIT(13)
+#define APDM_HOST                               BIT(14)
+#define APDM_HPDN                               BIT(15)
+#define RDY_MACON                               BIT(16)
+#define SUS_HOST                                BIT(17)
+#define ROP_ALD                                 BIT(20)
+#define ROP_PWR                                 BIT(21)
+#define ROP_SPS                                 BIT(22)
+#define SOP_MRST                                BIT(25)
+#define SOP_FUSE                                BIT(26)
+#define SOP_ABG                                 BIT(27)
+#define SOP_AMB                                 BIT(28)
+#define SOP_RCK                                 BIT(29)
+#define SOP_A8M                                 BIT(30)
+#define XOP_BTCK                                BIT(31)
+
+#define ANAD16V_EN                              BIT(0)
+#define ANA8M                                   BIT(1)
+#define MACSLP                                  BIT(4)
+#define LOADER_CLK_EN                           BIT(5)
+#define _80M_SSC_DIS                            BIT(7)
+#define _80M_SSC_EN_HO                          BIT(8)
+#define PHY_SSC_RSTB                            BIT(9)
+#define SEC_CLK_EN                              BIT(10)
+#define MAC_CLK_EN                              BIT(11)
+#define SYS_CLK_EN                              BIT(12)
+#define RING_CLK_EN                             BIT(13)
+
+#define BOOT_FROM_EEPROM                        BIT(4)
+#define EEPROM_EN                               BIT(5)
+
+#define AFE_BGEN                                BIT(0)
+#define AFE_MBEN                                BIT(1)
+#define MAC_ID_EN                               BIT(7)
+
+#define WLOCK_ALL                               BIT(0)
+#define WLOCK_00                                BIT(1)
+#define WLOCK_04                                BIT(2)
+#define WLOCK_08                                BIT(3)
+#define WLOCK_40                                BIT(4)
+#define R_DIS_PRST_0                            BIT(5)
+#define R_DIS_PRST_1                            BIT(6)
+#define LOCK_ALL_EN                             BIT(7)
+
+#define RF_EN                                   BIT(0)
+#define RF_RSTB                                 BIT(1)
+#define RF_SDMRSTB                              BIT(2)
+
+#define LDA15_EN                                BIT(0)
+#define LDA15_STBY                              BIT(1)
+#define LDA15_OBUF                              BIT(2)
+#define LDA15_REG_VOS                           BIT(3)
+#define _LDA15_VOADJ(x)                         (((x) & 0x7) << 4)
+
+#define LDV12_EN                                BIT(0)
+#define LDV12_SDBY                              BIT(1)
+#define LPLDO_HSM                               BIT(2)
+#define LPLDO_LSM_DIS                           BIT(3)
+#define _LDV12_VADJ(x)                          (((x) & 0xF) << 4)
+
+#define XTAL_EN                                 BIT(0)
+#define XTAL_BSEL                               BIT(1)
+#define _XTAL_BOSC(x)                           (((x) & 0x3) << 2)
+#define _XTAL_CADJ(x)                           (((x) & 0xF) << 4)
+#define XTAL_GATE_USB                           BIT(8)
+#define _XTAL_USB_DRV(x)                        (((x) & 0x3) << 9)
+#define XTAL_GATE_AFE                           BIT(11)
+#define _XTAL_AFE_DRV(x)                        (((x) & 0x3) << 12)
+#define XTAL_RF_GATE                            BIT(14)
+#define _XTAL_RF_DRV(x)                         (((x) & 0x3) << 15)
+#define XTAL_GATE_DIG                           BIT(17)
+#define _XTAL_DIG_DRV(x)                        (((x) & 0x3) << 18)
+#define XTAL_BT_GATE                            BIT(20)
+#define _XTAL_BT_DRV(x)                         (((x) & 0x3) << 21)
+#define _XTAL_GPIO(x)                           (((x) & 0x7) << 23)
+
+#define CKDLY_AFE                               BIT(26)
+#define CKDLY_USB                               BIT(27)
+#define CKDLY_DIG                               BIT(28)
+#define CKDLY_BT                                BIT(29)
+
+#define APLL_EN                                 BIT(0)
+#define APLL_320_EN                             BIT(1)
+#define APLL_FREF_SEL                           BIT(2)
+#define APLL_EDGE_SEL                           BIT(3)
+#define APLL_WDOGB                              BIT(4)
+#define APLL_LPFEN                              BIT(5)
+
+#define APLL_REF_CLK_13MHZ                      0x1
+#define APLL_REF_CLK_19_2MHZ                    0x2
+#define APLL_REF_CLK_20MHZ                      0x3
+#define APLL_REF_CLK_25MHZ                      0x4
+#define APLL_REF_CLK_26MHZ                      0x5
+#define APLL_REF_CLK_38_4MHZ                    0x6
+#define APLL_REF_CLK_40MHZ                      0x7
+
+#define APLL_320EN                              BIT(14)
+#define APLL_80EN                               BIT(15)
+#define APLL_1MEN                               BIT(24)
+
+#define ALD_EN                                  BIT(18)
+#define EF_PD                                   BIT(19)
+#define EF_FLAG                                 BIT(31)
+
+#define EF_TRPT                                 BIT(7)
+#define LDOE25_EN                               BIT(31)
+
+#define RSM_EN                                  BIT(0)
+#define Timer_EN                                BIT(4)
+
+#define TRSW0EN                                 BIT(2)
+#define TRSW1EN                                 BIT(3)
+#define EROM_EN                                 BIT(4)
+#define EnBT                                    BIT(5)
+#define EnUart                                  BIT(8)
+#define Uart_910                                BIT(9)
+#define EnPMAC                                  BIT(10)
+#define SIC_SWRST                               BIT(11)
+#define EnSIC                                   BIT(12)
+#define SIC_23                                  BIT(13)
+#define EnHDP                                   BIT(14)
+#define SIC_LBK                                 BIT(15)
+
+#define LED0PL                                  BIT(4)
+#define LED1PL                                  BIT(12)
+#define LED0DIS                                 BIT(7)
+
+#define MCUFWDL_EN                              BIT(0)
+#define MCUFWDL_RDY                             BIT(1)
+#define FWDL_ChkSum_rpt                         BIT(2)
+#define MACINI_RDY                              BIT(3)
+#define BBINI_RDY                               BIT(4)
+#define RFINI_RDY                               BIT(5)
+#define WINTINI_RDY                             BIT(6)
+#define CPRST                                   BIT(23)
+
+#define XCLK_VLD                                BIT(0)
+#define ACLK_VLD                                BIT(1)
+#define UCLK_VLD                                BIT(2)
+#define PCLK_VLD                                BIT(3)
+#define PCIRSTB                                 BIT(4)
+#define V15_VLD                                 BIT(5)
+#define TRP_B15V_EN                             BIT(7)
+#define SIC_IDLE                                BIT(8)
+#define BD_MAC2                                 BIT(9)
+#define BD_MAC1                                 BIT(10)
+#define IC_MACPHY_MODE                          BIT(11)
+#define PAD_HWPD_IDN                            BIT(22)
+#define TRP_VAUX_EN                             BIT(23)
+#define TRP_BT_EN                               BIT(24)
+#define BD_PKG_SEL                              BIT(25)
+#define BD_HCI_SEL                              BIT(26)
+#define TYPE_ID                                 BIT(27)
+
+#define CHIP_VER_RTL_MASK                       0xF000
+#define CHIP_VER_RTL_SHIFT                      12
+
+#define REG_LBMODE                              (REG_CR + 3)
+
+#define HCI_TXDMA_EN                            BIT(0)
+#define HCI_RXDMA_EN                            BIT(1)
+#define TXDMA_EN                                BIT(2)
+#define RXDMA_EN                                BIT(3)
+#define PROTOCOL_EN                             BIT(4)
+#define SCHEDULE_EN                             BIT(5)
+#define MACTXEN                                 BIT(6)
+#define MACRXEN                                 BIT(7)
+#define ENSWBCN                                 BIT(8)
+#define ENSEC                                   BIT(9)
+
+#define _NETTYPE(x)                             (((x) & 0x3) << 16)
+#define MASK_NETTYPE                            0x30000
+#define NT_NO_LINK                              0x0
+#define NT_LINK_AD_HOC                          0x1
+#define NT_LINK_AP                              0x2
+#define NT_AS_AP                                0x3
+
+#define _LBMODE(x)                              (((x) & 0xF) << 24)
+#define MASK_LBMODE                             0xF000000
+#define LOOPBACK_NORMAL                         0x0
+#define LOOPBACK_IMMEDIATELY                    0xB
+#define LOOPBACK_MAC_DELAY                      0x3
+#define LOOPBACK_PHY                            0x1
+#define LOOPBACK_DMA                            0x7
+
+#define GET_RX_PAGE_SIZE(value)         ((value) & 0xF)
+#define GET_TX_PAGE_SIZE(value)         (((value) & 0xF0) >> 4)
+#define _PSRX_MASK                              0xF
+#define _PSTX_MASK                              0xF0
+#define _PSRX(x)                                (x)
+#define _PSTX(x)                                ((x) << 4)
+
+#define PBP_64                                  0x0
+#define PBP_128                                 0x1
+#define PBP_256                                 0x2
+#define PBP_512                                 0x3
+#define PBP_1024                                0x4
+
+#define RXDMA_ARBBW_EN                          BIT(0)
+#define RXSHFT_EN                               BIT(1)
+#define RXDMA_AGG_EN                            BIT(2)
+#define QS_VO_QUEUE                             BIT(8)
+#define QS_VI_QUEUE                             BIT(9)
+#define QS_BE_QUEUE                             BIT(10)
+#define QS_BK_QUEUE                             BIT(11)
+#define QS_MANAGER_QUEUE                        BIT(12)
+#define QS_HIGH_QUEUE                           BIT(13)
+
+#define HQSEL_VOQ                               BIT(0)
+#define HQSEL_VIQ                               BIT(1)
+#define HQSEL_BEQ                               BIT(2)
+#define HQSEL_BKQ                               BIT(3)
+#define HQSEL_MGTQ                              BIT(4)
+#define HQSEL_HIQ                               BIT(5)
+
+#define _TXDMA_HIQ_MAP(x)                       (((x)&0x3) << 14)
+#define _TXDMA_MGQ_MAP(x)                       (((x)&0x3) << 12)
+#define _TXDMA_BKQ_MAP(x)                       (((x)&0x3) << 10)
+#define _TXDMA_BEQ_MAP(x)                       (((x)&0x3) <<  8)
+#define _TXDMA_VIQ_MAP(x)                       (((x)&0x3) <<  6)
+#define _TXDMA_VOQ_MAP(x)                       (((x)&0x3) <<  4)
+
+#define QUEUE_LOW                               1
+#define QUEUE_NORMAL                            2
+#define QUEUE_HIGH                              3
+
+#define _LLT_NO_ACTIVE                          0x0
+#define _LLT_WRITE_ACCESS                       0x1
+#define _LLT_READ_ACCESS                        0x2
+
+#define _LLT_INIT_DATA(x)                       ((x) & 0xFF)
+#define _LLT_INIT_ADDR(x)                       (((x) & 0xFF) << 8)
+#define _LLT_OP(x)                              (((x) & 0x3) << 30)
+#define _LLT_OP_VALUE(x)                        (((x) >> 30) & 0x3)
+
+#define BB_WRITE_READ_MASK                      (BIT(31) | BIT(30))
+#define BB_WRITE_EN                             BIT(30)
+#define BB_READ_EN                              BIT(31)
+
+#define _HPQ(x)                                 ((x) & 0xFF)
+#define _LPQ(x)                                 (((x) & 0xFF) << 8)
+#define _PUBQ(x)                                (((x) & 0xFF) << 16)
+#define _NPQ(x)                                 ((x) & 0xFF)
+
+#define HPQ_PUBLIC_DIS                          BIT(24)
+#define LPQ_PUBLIC_DIS                          BIT(25)
+#define LD_RQPN                                 BIT(31)
+
+#define BCN_VALID                               BIT(16)
+#define BCN_HEAD(x)                             (((x) & 0xFF) << 8)
+#define BCN_HEAD_MASK                           0xFF00
+
+#define BLK_DESC_NUM_SHIFT                      4
+#define BLK_DESC_NUM_MASK                       0xF
+
+#define DROP_DATA_EN                            BIT(9)
+
+#define EN_AMPDU_RTY_NEW                        BIT(7)
+
+#define _INIRTSMCS_SEL(x)                       ((x) & 0x3F)
+
+#define _SPEC_SIFS_CCK(x)                       ((x) & 0xFF)
+#define _SPEC_SIFS_OFDM(x)                      (((x) & 0xFF) << 8)
+
+#define RATE_REG_BITMAP_ALL                     0xFFFFF
+
+#define _RRSC_BITMAP(x)                         ((x) & 0xFFFFF)
+
+#define _RRSR_RSC(x)                            (((x) & 0x3) << 21)
+#define RRSR_RSC_RESERVED                       0x0
+#define RRSR_RSC_UPPER_SUBCHANNEL               0x1
+#define RRSR_RSC_LOWER_SUBCHANNEL               0x2
+#define RRSR_RSC_DUPLICATE_MODE                 0x3
+
+#define USE_SHORT_G1                            BIT(20)
+
+#define _AGGLMT_MCS0(x)                         ((x) & 0xF)
+#define _AGGLMT_MCS1(x)                         (((x) & 0xF) << 4)
+#define _AGGLMT_MCS2(x)                         (((x) & 0xF) << 8)
+#define _AGGLMT_MCS3(x)                         (((x) & 0xF) << 12)
+#define _AGGLMT_MCS4(x)                         (((x) & 0xF) << 16)
+#define _AGGLMT_MCS5(x)                         (((x) & 0xF) << 20)
+#define _AGGLMT_MCS6(x)                         (((x) & 0xF) << 24)
+#define _AGGLMT_MCS7(x)                         (((x) & 0xF) << 28)
+
+#define RETRY_LIMIT_SHORT_SHIFT                 8
+#define RETRY_LIMIT_LONG_SHIFT                  0
+
+#define _DARF_RC1(x)                            ((x) & 0x1F)
+#define _DARF_RC2(x)                            (((x) & 0x1F) << 8)
+#define _DARF_RC3(x)                            (((x) & 0x1F) << 16)
+#define _DARF_RC4(x)                            (((x) & 0x1F) << 24)
+#define _DARF_RC5(x)                            ((x) & 0x1F)
+#define _DARF_RC6(x)                            (((x) & 0x1F) << 8)
+#define _DARF_RC7(x)                            (((x) & 0x1F) << 16)
+#define _DARF_RC8(x)                            (((x) & 0x1F) << 24)
+
+#define _RARF_RC1(x)                            ((x) & 0x1F)
+#define _RARF_RC2(x)                            (((x) & 0x1F) << 8)
+#define _RARF_RC3(x)                            (((x) & 0x1F) << 16)
+#define _RARF_RC4(x)                            (((x) & 0x1F) << 24)
+#define _RARF_RC5(x)                            ((x) & 0x1F)
+#define _RARF_RC6(x)                            (((x) & 0x1F) << 8)
+#define _RARF_RC7(x)                            (((x) & 0x1F) << 16)
+#define _RARF_RC8(x)                            (((x) & 0x1F) << 24)
+
+#define AC_PARAM_TXOP_LIMIT_OFFSET              16
+#define AC_PARAM_ECW_MAX_OFFSET                 12
+#define AC_PARAM_ECW_MIN_OFFSET                 8
+#define AC_PARAM_AIFS_OFFSET                    0
+
+#define _AIFS(x)                                (x)
+#define _ECW_MAX_MIN(x)                         ((x) << 8)
+#define _TXOP_LIMIT(x)                          ((x) << 16)
+
+#define _BCNIFS(x)                              ((x) & 0xFF)
+#define _BCNECW(x)                              ((((x) & 0xF)) << 8)
+
+#define _LRL(x)                                 ((x) & 0x3F)
+#define _SRL(x)                                 (((x) & 0x3F) << 8)
+
+#define _SIFS_CCK_CTX(x)                        ((x) & 0xFF)
+#define _SIFS_CCK_TRX(x)                        (((x) & 0xFF) << 8);
+
+#define _SIFS_OFDM_CTX(x)                       ((x) & 0xFF)
+#define _SIFS_OFDM_TRX(x)                       (((x) & 0xFF) << 8);
+
+#define _TBTT_PROHIBIT_HOLD(x)                  (((x) & 0xFF) << 8)
+
+#define DIS_EDCA_CNT_DWN                        BIT(11)
+
+#define EN_MBSSID                               BIT(1)
+#define EN_TXBCN_RPT                            BIT(2)
+#define EN_BCN_FUNCTION                         BIT(3)
+
+#define TSFTR_RST                               BIT(0)
+#define TSFTR1_RST                              BIT(1)
+
+#define STOP_BCNQ                               BIT(6)
+
+#define DIS_TSF_UDT0_NORMAL_CHIP                BIT(4)
+#define DIS_TSF_UDT0_TEST_CHIP                  BIT(5)
+
+#define AcmHw_HwEn                              BIT(0)
+#define AcmHw_BeqEn                             BIT(1)
+#define AcmHw_ViqEn                             BIT(2)
+#define AcmHw_VoqEn                             BIT(3)
+#define AcmHw_BeqStatus                         BIT(4)
+#define AcmHw_ViqStatus                         BIT(5)
+#define AcmHw_VoqStatus                         BIT(6)
+
+#define APSDOFF                                 BIT(6)
+#define APSDOFF_STATUS                          BIT(7)
+
+#define BW_20MHZ                                BIT(2)
+
+#define RATE_BITMAP_ALL                         0xFFFFF
+
+#define RATE_RRSR_CCK_ONLY_1M                   0xFFFF1
+
+#define TSFRST                                  BIT(0)
+#define DIS_GCLK                                BIT(1)
+#define PAD_SEL                                 BIT(2)
+#define PWR_ST                                  BIT(6)
+#define PWRBIT_OW_EN                            BIT(7)
+#define ACRC                                    BIT(8)
+#define CFENDFORM                               BIT(9)
+#define ICV                                     BIT(10)
+
+#define AAP                                     BIT(0)
+#define APM                                     BIT(1)
+#define AM                                      BIT(2)
+#define AB                                      BIT(3)
+#define ADD3                                    BIT(4)
+#define APWRMGT                                 BIT(5)
+#define CBSSID                                  BIT(6)
+#define CBSSID_DATA                             BIT(6)
+#define CBSSID_BCN                              BIT(7)
+#define ACRC32                                  BIT(8)
+#define AICV                                    BIT(9)
+#define ADF                                     BIT(11)
+#define ACF                                     BIT(12)
+#define AMF                                     BIT(13)
+#define HTC_LOC_CTRL                            BIT(14)
+#define UC_DATA_EN                              BIT(16)
+#define BM_DATA_EN                              BIT(17)
+#define MFBEN                                   BIT(22)
+#define LSIGEN                                  BIT(23)
+#define EnMBID                                  BIT(24)
+#define APP_BASSN                               BIT(27)
+#define APP_PHYSTS                              BIT(28)
+#define APP_ICV                                 BIT(29)
+#define APP_MIC                                 BIT(30)
+#define APP_FCS                                 BIT(31)
+
+#define _MIN_SPACE(x)                           ((x) & 0x7)
+#define _SHORT_GI_PADDING(x)                    (((x) & 0x1F) << 3)
+
+#define RXERR_TYPE_OFDM_PPDU                    0
+#define RXERR_TYPE_OFDM_FALSE_ALARM             1
+#define RXERR_TYPE_OFDM_MPDU_OK                 2
+#define RXERR_TYPE_OFDM_MPDU_FAIL               3
+#define RXERR_TYPE_CCK_PPDU                     4
+#define RXERR_TYPE_CCK_FALSE_ALARM              5
+#define RXERR_TYPE_CCK_MPDU_OK                  6
+#define RXERR_TYPE_CCK_MPDU_FAIL                7
+#define RXERR_TYPE_HT_PPDU                      8
+#define RXERR_TYPE_HT_FALSE_ALARM               9
+#define RXERR_TYPE_HT_MPDU_TOTAL                10
+#define RXERR_TYPE_HT_MPDU_OK                   11
+#define RXERR_TYPE_HT_MPDU_FAIL                 12
+#define RXERR_TYPE_RX_FULL_DROP                 15
+
+#define RXERR_COUNTER_MASK                      0xFFFFF
+#define RXERR_RPT_RST                           BIT(27)
+#define _RXERR_RPT_SEL(type)                    ((type) << 28)
+
+#define SCR_TxUseDK                             BIT(0)
+#define SCR_RxUseDK                             BIT(1)
+#define SCR_TxEncEnable                         BIT(2)
+#define SCR_RxDecEnable                         BIT(3)
+#define SCR_SKByA2                              BIT(4)
+#define SCR_NoSKMC                              BIT(5)
+#define SCR_TXBCUSEDK                           BIT(6)
+#define SCR_RXBCUSEDK                           BIT(7)
+
+#define USB_IS_HIGH_SPEED                       0
+#define USB_IS_FULL_SPEED                       1
+#define USB_SPEED_MASK                          BIT(5)
+
+#define USB_NORMAL_SIE_EP_MASK                  0xF
+#define USB_NORMAL_SIE_EP_SHIFT                 4
+
+#define USB_TEST_EP_MASK                        0x30
+#define USB_TEST_EP_SHIFT                       4
+
+#define USB_AGG_EN                              BIT(3)
+
+#define MAC_ADDR_LEN                            6
+#define LAST_ENTRY_OF_TX_PKT_BUFFER             255
+
+#define POLLING_LLT_THRESHOLD                   20
+#define POLLING_READY_TIMEOUT_COUNT             1000
+
+#define MAX_MSS_DENSITY_2T                      0x13
+#define MAX_MSS_DENSITY_1T                      0x0A
+
+#define EPROM_CMD_OPERATING_MODE_MASK   ((1<<7)|(1<<6))
+#define EPROM_CMD_CONFIG                        0x3
+#define EPROM_CMD_LOAD                          1
+
+#define HWSET_MAX_SIZE_92S              HWSET_MAX_SIZE
+
+#define HAL_8192C_HW_GPIO_WPS_BIT               BIT(2)
+
+#define RPMAC_RESET                             0x100
+#define RPMAC_TXSTART                           0x104
+#define RPMAC_TXLEGACYSIG                       0x108
+#define RPMAC_TXHTSIG1                          0x10c
+#define RPMAC_TXHTSIG2                          0x110
+#define RPMAC_PHYDEBUG                          0x114
+#define RPMAC_TXPACKETNUM                       0x118
+#define RPMAC_TXIDLE                            0x11c
+#define RPMAC_TXMACHEADER0                      0x120
+#define RPMAC_TXMACHEADER1                      0x124
+#define RPMAC_TXMACHEADER2                      0x128
+#define RPMAC_TXMACHEADER3                      0x12c
+#define RPMAC_TXMACHEADER4                      0x130
+#define RPMAC_TXMACHEADER5                      0x134
+#define RPMAC_TXDADATYPE                        0x138
+#define RPMAC_TXRANDOMSEED                      0x13c
+#define RPMAC_CCKPLCPPREAMBLE                   0x140
+#define RPMAC_CCKPLCPHEADER                     0x144
+#define RPMAC_CCKCRC16                          0x148
+#define RPMAC_OFDMRXCRC32OK                     0x170
+#define RPMAC_OFDMRXCRC32Er                     0x174
+#define RPMAC_OFDMRXPARITYER                    0x178
+#define RPMAC_OFDMRXCRC8ER                      0x17c
+#define RPMAC_CCKCRXRC16ER                      0x180
+#define RPMAC_CCKCRXRC32ER                      0x184
+#define RPMAC_CCKCRXRC32OK                      0x188
+#define RPMAC_TXSTATUS                          0x18c
+
+#define RFPGA0_RFMOD                            0x800
+
+#define RFPGA0_TXINFO                           0x804
+#define RFPGA0_PSDFUNCTION                      0x808
+
+#define RFPGA0_TXGAINSTAGE                      0x80c
+
+#define RFPGA0_RFTIMING1                        0x810
+#define RFPGA0_RFTIMING2                        0x814
+
+#define RFPGA0_XA_HSSIPARAMETER1                0x820
+#define RFPGA0_XA_HSSIPARAMETER2                0x824
+#define RFPGA0_XB_HSSIPARAMETER1                0x828
+#define RFPGA0_XB_HSSIPARAMETER2                0x82c
+
+#define RFPGA0_XA_LSSIPARAMETER                 0x840
+#define RFPGA0_XB_LSSIPARAMETER                 0x844
+
+#define RFPGA0_RFWAKEUPPARAMETER                0x850
+#define RFPGA0_RFSLEEPUPPARAMETER               0x854
+
+#define RFPGA0_XAB_SWITCHCONTROL                0x858
+#define RFPGA0_XCD_SWITCHCONTROL                0x85c
+
+#define RFPGA0_XA_RFINTERFACEOE                 0x860
+#define RFPGA0_XB_RFINTERFACEOE                 0x864
+
+#define RFPGA0_XAB_RFINTERFACESW                0x870
+#define RFPGA0_XCD_RFINTERFACESW                0x874
+
+#define rFPGA0_XAB_RFPARAMETER                  0x878
+#define rFPGA0_XCD_RFPARAMETER                  0x87c
+
+#define RFPGA0_ANALOGPARAMETER1                 0x880
+#define RFPGA0_ANALOGPARAMETER2                 0x884
+#define RFPGA0_ANALOGPARAMETER3                 0x888
+#define RFPGA0_ANALOGPARAMETER4                 0x88c
+
+#define RFPGA0_XA_LSSIREADBACK                  0x8a0
+#define RFPGA0_XB_LSSIREADBACK                  0x8a4
+#define RFPGA0_XC_LSSIREADBACK                  0x8a8
+#define RFPGA0_XD_LSSIREADBACK                  0x8ac
+
+#define RFPGA0_PSDREPORT                        0x8b4
+#define TRANSCEIVEA_HSPI_READBACK               0x8b8
+#define TRANSCEIVEB_HSPI_READBACK               0x8bc
+#define RFPGA0_XAB_RFINTERFACERB                0x8e0
+#define RFPGA0_XCD_RFINTERFACERB                0x8e4
+
+#define RFPGA1_RFMOD                            0x900
+
+#define RFPGA1_TXBLOCK                          0x904
+#define RFPGA1_DEBUGSELECT                      0x908
+#define RFPGA1_TXINFO                           0x90c
+
+#define RCCK0_SYSTEM                            0xa00
+
+#define RCCK0_AFESETTING                        0xa04
+#define RCCK0_CCA                               0xa08
+
+#define RCCK0_RXAGC1                            0xa0c
+#define RCCK0_RXAGC2                            0xa10
+
+#define RCCK0_RXHP                              0xa14
+
+#define RCCK0_DSPPARAMETER1                     0xa18
+#define RCCK0_DSPPARAMETER2                     0xa1c
+
+#define RCCK0_TXFILTER1                         0xa20
+#define RCCK0_TXFILTER2                         0xa24
+#define RCCK0_DEBUGPORT                         0xa28
+#define RCCK0_FALSEALARMREPORT                  0xa2c
+#define RCCK0_TRSSIREPORT                       0xa50
+#define RCCK0_RXREPORT                          0xa54
+#define RCCK0_FACOUNTERLOWER                    0xa5c
+#define RCCK0_FACOUNTERUPPER                    0xa58
+
+#define ROFDM0_LSTF                             0xc00
+
+#define ROFDM0_TRXPATHENABLE                    0xc04
+#define ROFDM0_TRMUXPAR                         0xc08
+#define ROFDM0_TRSWISOLATION                    0xc0c
+
+#define ROFDM0_XARXAFE                          0xc10
+#define ROFDM0_XARXIQIMBALANCE                  0xc14
+#define ROFDM0_XBRXAFE                          0xc18
+#define ROFDM0_XBRXIQIMBALANCE                  0xc1c
+#define ROFDM0_XCRXAFE                          0xc20
+#define ROFDM0_XCRXIQIMBANLANCE                 0xc24
+#define ROFDM0_XDRXAFE                          0xc28
+#define ROFDM0_XDRXIQIMBALANCE                  0xc2c
+
+#define ROFDM0_RXDETECTOR1                      0xc30
+#define ROFDM0_RXDETECTOR2                      0xc34
+#define ROFDM0_RXDETECTOR3                      0xc38
+#define ROFDM0_RXDETECTOR4                      0xc3c
+
+#define ROFDM0_RXDSP                            0xc40
+#define ROFDM0_CFOANDDAGC                       0xc44
+#define ROFDM0_CCADROPTHRESHOLD                 0xc48
+#define ROFDM0_ECCATHRESHOLD                    0xc4c
+
+#define ROFDM0_XAAGCCORE1                       0xc50
+#define ROFDM0_XAAGCCORE2                       0xc54
+#define ROFDM0_XBAGCCORE1                       0xc58
+#define ROFDM0_XBAGCCORE2                       0xc5c
+#define ROFDM0_XCAGCCORE1                       0xc60
+#define ROFDM0_XCAGCCORE2                       0xc64
+#define ROFDM0_XDAGCCORE1                       0xc68
+#define ROFDM0_XDAGCCORE2                       0xc6c
+
+#define ROFDM0_AGCPARAMETER1                    0xc70
+#define ROFDM0_AGCPARAMETER2                    0xc74
+#define ROFDM0_AGCRSSITABLE                     0xc78
+#define ROFDM0_HTSTFAGC                         0xc7c
+
+#define ROFDM0_XATXIQIMBALANCE                  0xc80
+#define ROFDM0_XATXAFE                          0xc84
+#define ROFDM0_XBTXIQIMBALANCE                  0xc88
+#define ROFDM0_XBTXAFE                          0xc8c
+#define ROFDM0_XCTXIQIMBALANCE                  0xc90
+#define ROFDM0_XCTXAFE                          0xc94
+#define ROFDM0_XDTXIQIMBALANCE                  0xc98
+#define ROFDM0_XDTXAFE                          0xc9c
+
+#define ROFDM0_RXIQEXTANTA                      0xca0
+
+#define ROFDM0_RXHPPARAMETER                    0xce0
+#define ROFDM0_TXPSEUDONOISEWGT                 0xce4
+#define ROFDM0_FRAMESYNC                        0xcf0
+#define ROFDM0_DFSREPORT                        0xcf4
+#define ROFDM0_TXCOEFF1                         0xca4
+#define ROFDM0_TXCOEFF2                         0xca8
+#define ROFDM0_TXCOEFF3                         0xcac
+#define ROFDM0_TXCOEFF4                         0xcb0
+#define ROFDM0_TXCOEFF5                         0xcb4
+#define ROFDM0_TXCOEFF6                         0xcb8
+
+#define ROFDM1_LSTF                             0xd00
+#define ROFDM1_TRXPATHENABLE                    0xd04
+
+#define ROFDM1_CF0                              0xd08
+#define ROFDM1_CSI1                             0xd10
+#define ROFDM1_SBD                              0xd14
+#define ROFDM1_CSI2                             0xd18
+#define ROFDM1_CFOTRACKING                      0xd2c
+#define ROFDM1_TRXMESAURE1                      0xd34
+#define ROFDM1_INTFDET                          0xd3c
+#define ROFDM1_PSEUDONOISESTATEAB               0xd50
+#define ROFDM1_PSEUDONOISESTATECD               0xd54
+#define ROFDM1_RXPSEUDONOISEWGT                 0xd58
+
+#define ROFDM_PHYCOUNTER1                       0xda0
+#define ROFDM_PHYCOUNTER2                       0xda4
+#define ROFDM_PHYCOUNTER3                       0xda8
+
+#define ROFDM_SHORTCFOAB                        0xdac
+#define ROFDM_SHORTCFOCD                        0xdb0
+#define ROFDM_LONGCFOAB                         0xdb4
+#define ROFDM_LONGCFOCD                         0xdb8
+#define ROFDM_TAILCF0AB                         0xdbc
+#define ROFDM_TAILCF0CD                         0xdc0
+#define ROFDM_PWMEASURE1                        0xdc4
+#define ROFDM_PWMEASURE2                        0xdc8
+#define ROFDM_BWREPORT                          0xdcc
+#define ROFDM_AGCREPORT                         0xdd0
+#define ROFDM_RXSNR                             0xdd4
+#define ROFDM_RXEVMCSI                          0xdd8
+#define ROFDM_SIGREPORT                         0xddc
+
+#define RTXAGC_A_RATE18_06                      0xe00
+#define RTXAGC_A_RATE54_24                      0xe04
+#define RTXAGC_A_CCK1_MCS32                     0xe08
+#define RTXAGC_A_MCS03_MCS00                    0xe10
+#define RTXAGC_A_MCS07_MCS04                    0xe14
+#define RTXAGC_A_MCS11_MCS08                    0xe18
+#define RTXAGC_A_MCS15_MCS12                    0xe1c
+
+#define RTXAGC_B_RATE18_06                      0x830
+#define RTXAGC_B_RATE54_24                      0x834
+#define RTXAGC_B_CCK1_55_MCS32                  0x838
+#define RTXAGC_B_MCS03_MCS00                    0x83c
+#define RTXAGC_B_MCS07_MCS04                    0x848
+#define RTXAGC_B_MCS11_MCS08                    0x84c
+#define RTXAGC_B_MCS15_MCS12                    0x868
+#define RTXAGC_B_CCK11_A_CCK2_11                0x86c
+
+#define RZEBRA1_HSSIENABLE                      0x0
+#define RZEBRA1_TRXENABLE1                      0x1
+#define RZEBRA1_TRXENABLE2                      0x2
+#define RZEBRA1_AGC                             0x4
+#define RZEBRA1_CHARGEPUMP                      0x5
+#define RZEBRA1_CHANNEL                         0x7
+
+#define RZEBRA1_TXGAIN                          0x8
+#define RZEBRA1_TXLPF                           0x9
+#define RZEBRA1_RXLPF                           0xb
+#define RZEBRA1_RXHPFCORNER                     0xc
+
+#define RGLOBALCTRL                             0
+#define RRTL8256_TXLPF                          19
+#define RRTL8256_RXLPF                          11
+#define RRTL8258_TXLPF                          0x11
+#define RRTL8258_RXLPF                          0x13
+#define RRTL8258_RSSILPF                        0xa
+
+#define RF_AC                                   0x00
+
+#define RF_IQADJ_G1                             0x01
+#define RF_IQADJ_G2                             0x02
+#define RF_POW_TRSW                             0x05
+
+#define RF_GAIN_RX                              0x06
+#define RF_GAIN_TX                              0x07
+
+#define RF_TXM_IDAC                             0x08
+#define RF_BS_IQGEN                             0x0F
+
+#define RF_MODE1                                0x10
+#define RF_MODE2                                0x11
+
+#define RF_RX_AGC_HP                            0x12
+#define RF_TX_AGC                               0x13
+#define RF_BIAS                                 0x14
+#define RF_IPA                                  0x15
+#define RF_POW_ABILITY                          0x17
+#define RF_MODE_AG                              0x18
+#define RRFCHANNEL                              0x18
+#define RF_CHNLBW                               0x18
+#define RF_TOP                                  0x19
+
+#define RF_RX_G1                                0x1A
+#define RF_RX_G2                                0x1B
+
+#define RF_RX_BB2                               0x1C
+#define RF_RX_BB1                               0x1D
+
+#define RF_RCK1                                 0x1E
+#define RF_RCK2                                 0x1F
+
+#define RF_TX_G1                                0x20
+#define RF_TX_G2                                0x21
+#define RF_TX_G3                                0x22
+
+#define RF_TX_BB1                               0x23
+#define RF_T_METER                              0x24
+
+#define RF_SYN_G1                               0x25
+#define RF_SYN_G2                               0x26
+#define RF_SYN_G3                               0x27
+#define RF_SYN_G4                               0x28
+#define RF_SYN_G5                               0x29
+#define RF_SYN_G6                               0x2A
+#define RF_SYN_G7                               0x2B
+#define RF_SYN_G8                               0x2C
+
+#define RF_RCK_OS                               0x30
+#define RF_TXPA_G1                              0x31
+#define RF_TXPA_G2                              0x32
+#define RF_TXPA_G3                              0x33
+
+#define BBBRESETB                               0x100
+#define BGLOBALRESETB                           0x200
+#define BOFDMTXSTART                            0x4
+#define BCCKTXSTART                             0x8
+#define BCRC32DEBUG                             0x100
+#define BPMACLOOPBACK                           0x10
+#define BTXLSIG                                 0xffffff
+#define BOFDMTXRATE                             0xf
+#define BOFDMTXRESERVED                         0x10
+#define BOFDMTXLENGTH                           0x1ffe0
+#define BOFDMTXPARITY                           0x20000
+#define BTXHTSIG1                               0xffffff
+#define BTXHTMCSRATE                            0x7f
+#define BTXHTBW                                 0x80
+#define BTXHTLENGTH                             0xffff00
+#define BTXHTSIG2                               0xffffff
+#define BTXHTSMOOTHING                          0x1
+#define BTXHTSOUNDING                           0x2
+#define BTXHTRESERVED                           0x4
+#define BTXHTAGGREATION                         0x8
+#define BTXHTSTBC                               0x30
+#define BTXHTADVANCECODING                      0x40
+#define BTXHTSHORTGI                            0x80
+#define BTXHTNUMBERHT_LT        F               0x300
+#define BTXHTCRC8                               0x3fc00
+#define BCOUNTERRESET                           0x10000
+#define BNUMOFOFDMTX                            0xffff
+#define BNUMOFCCKTX                             0xffff0000
+#define BTXIDLEINTERVAL                         0xffff
+#define BOFDMSERVICE                            0xffff0000
+#define BTXMACHEADER                            0xffffffff
+#define BTXDATAINIT                             0xff
+#define BTXHTMODE                               0x100
+#define BTXDATATYPE                             0x30000
+#define BTXRANDOMSEED                           0xffffffff
+#define BCCKTXPREAMBLE                          0x1
+#define BCCKTXSFD                               0xffff0000
+#define BCCKTXSIG                               0xff
+#define BCCKTXSERVICE                           0xff00
+#define BCCKLENGTHEXT                           0x8000
+#define BCCKTXLENGHT                            0xffff0000
+#define BCCKTXCRC16                             0xffff
+#define BCCKTXSTATUS                            0x1
+#define BOFDMTXSTATUS                           0x2
+#define IS_BB_REG_OFFSET_92S(_Offset)           \
+        ((_Offset >= 0x800) && (_Offset <= 0xfff))
+
+#define BRFMOD                                  0x1
+#define BJAPANMODE                              0x2
+#define BCCKTXSC                                0x30
+#define BCCKEN                                  0x1000000
+#define BOFDMEN                                 0x2000000
+
+#define BOFDMRXADCPHASE                         0x10000
+#define BOFDMTXDACPHASE                         0x40000
+#define BXATXAGC                                0x3f
+
+#define BXBTXAGC                                0xf00
+#define BXCTXAGC                                0xf000
+#define BXDTXAGC                                0xf0000
+
+#define BPASTART                                0xf0000000
+#define BTRSTART                                0x00f00000
+#define BRFSTART                                0x0000f000
+#define BBBSTART                                0x000000f0
+#define BBBCCKSTART                             0x0000000f
+#define BPAEND                                  0xf
+#define BTREND                                  0x0f000000
+#define BRFEND                                  0x000f0000
+#define BCCAMASK                                0x000000f0
+#define BR2RCCAMASK                             0x00000f00
+#define BHSSI_R2TDELAY                          0xf8000000
+#define BHSSI_T2RDELAY                          0xf80000
+#define BCONTXHSSI                              0x400
+#define BIGFROMCCK                              0x200
+#define BAGCADDRESS                             0x3f
+#define BRXHPTX                                 0x7000
+#define BRXHP2RX                                0x38000
+#define BRXHPCCKINI                             0xc0000
+#define BAGCTXCODE                              0xc00000
+#define BAGCRXCODE                              0x300000
+
+#define B3WIREDATALENGTH                        0x800
+#define B3WIREADDREAALENGTH                     0x400
+
+#define B3WIRERFPOWERDOWN                       0x1
+#define B5GPAPEPOLARITY                         0x40000000
+#define B2GPAPEPOLARITY                         0x80000000
+#define BRFSW_TXDEFAULTANT                      0x3
+#define BRFSW_TXOPTIONANT                       0x30
+#define BRFSW_RXDEFAULTANT                      0x300
+#define BRFSW_RXOPTIONANT                       0x3000
+#define BRFSI_3WIREDATA                         0x1
+#define BRFSI_3WIRECLOCK                        0x2
+#define BRFSI_3WIRELOAD                         0x4
+#define BRFSI_3WIRERW                           0x8
+#define BRFSI_3WIRE                             0xf
+
+#define BRFSI_RFENV                             0x10
+
+#define BRFSI_TRSW                              0x20
+#define BRFSI_TRSWB                             0x40
+#define BRFSI_ANTSW                             0x100
+#define BRFSI_ANTSWB                            0x200
+#define BRFSI_PAPE                              0x400
+#define BRFSI_PAPE5G                            0x800
+#define BBANDSELECT                             0x1
+#define BHTSIG2_GI                              0x80
+#define BHTSIG2_SMOOTHING                       0x01
+#define BHTSIG2_SOUNDING                        0x02
+#define BHTSIG2_AGGREATON                       0x08
+#define BHTSIG2_STBC                            0x30
+#define BHTSIG2_ADVCODING                       0x40
+#define BHTSIG2_NUMOFHTLTF                      0x300
+#define BHTSIG2_CRC8                            0x3fc
+#define BHTSIG1_MCS                             0x7f
+#define BHTSIG1_BANDWIDTH                       0x80
+#define BHTSIG1_HTLENGTH                        0xffff
+#define BLSIG_RATE                              0xf
+#define BLSIG_RESERVED                          0x10
+#define BLSIG_LENGTH                            0x1fffe
+#define BLSIG_PARITY                            0x20
+#define BCCKRXPHASE                             0x4
+
+#define BLSSIREADADDRESS                        0x7f800000
+#define BLSSIREADEDGE                           0x80000000
+
+#define BLSSIREADBACKDATA                       0xfffff
+
+#define BLSSIREADOKFLAG                         0x1000
+#define BCCKSAMPLERATE                          0x8
+#define BREGULATOR0STANDBY                      0x1
+#define BREGULATORPLLSTANDBY                    0x2
+#define BREGULATOR1STANDBY                      0x4
+#define BPLLPOWERUP                             0x8
+#define BDPLLPOWERUP                            0x10
+#define BDA10POWERUP                            0x20
+#define BAD7POWERUP                             0x200
+#define BDA6POWERUP                             0x2000
+#define BXTALPOWERUP                            0x4000
+#define B40MDCLKPOWERUP                         0x8000
+#define BDA6DEBUGMODE                           0x20000
+#define BDA6SWING                               0x380000
+
+#define BADCLKPHASE                             0x4000000
+#define B80MCLKDELAY                            0x18000000
+#define BAFEWATCHDOGENABLE                      0x20000000
+
+#define BXTALCAP01                              0xc0000000
+#define BXTALCAP23                              0x3
+#define BXTALCAP92X                             0x0f000000
+#define BXTALCAP                                0x0f000000
+
+#define BINTDIFCLKENABLE                        0x400
+#define BEXTSIGCLKENABLE                        0x800
+#define BBANDGAP_MBIAS_POWERUP                  0x10000
+#define BAD11SH_GAIN                            0xc0000
+#define BAD11NPUT_RANGE                         0x700000
+#define BAD110P_CURRENT                         0x3800000
+#define BLPATH_LOOPBACK                         0x4000000
+#define BQPATH_LOOPBACK                         0x8000000
+#define BAFE_LOOPBACK                           0x10000000
+#define BDA10_SWING                             0x7e0
+#define BDA10_REVERSE                           0x800
+#define BDA_CLK_SOURCE                          0x1000
+#define BDA7INPUT_RANGE                         0x6000
+#define BDA7_GAIN                               0x38000
+#define BDA7OUTPUT_CM_MODE                      0x40000
+#define BDA7INPUT_CM_MODE                       0x380000
+#define BDA7CURRENT                             0xc00000
+#define BREGULATOR_ADJUST                       0x7000000
+#define BAD11POWERUP_ATTX                       0x1
+#define BDA10PS_ATTX                            0x10
+#define BAD11POWERUP_ATRX                       0x100
+#define BDA10PS_ATRX                            0x1000
+#define BCCKRX_AGC_FORMAT                       0x200
+#define BPSDFFT_SAMPLE_POINT                    0xc000
+#define BPSD_AVERAGE_NUM                        0x3000
+#define BIQPATH_CONTROL                         0xc00
+#define BPSD_FREQ                               0x3ff
+#define BPSD_ANTENNA_PATH                       0x30
+#define BPSD_IQ_SWITCH                          0x40
+#define BPSD_RX_TRIGGER                         0x400000
+#define BPSD_TX_TRIGGER                         0x80000000
+#define BPSD_SINE_TONE_SCALE                    0x7f000000
+#define BPSD_REPORT                             0xffff
+
+#define BOFDM_TXSC                              0x30000000
+#define BCCK_TXON                               0x1
+#define BOFDM_TXON                              0x2
+#define BDEBUG_PAGE                             0xfff
+#define BDEBUG_ITEM                             0xff
+#define BANTL                                   0x10
+#define BANT_NONHT                              0x100
+#define BANT_HT1                                0x1000
+#define BANT_HT2                                0x10000
+#define BANT_HT1S1                              0x100000
+#define BANT_NONHTS1                            0x1000000
+
+#define BCCK_BBMODE                             0x3
+#define BCCK_TXPOWERSAVING                      0x80
+#define BCCK_RXPOWERSAVING                      0x40
+
+#define BCCK_SIDEBAND                           0x10
+
+#define BCCK_SCRAMBLE                           0x8
+#define BCCK_ANTDIVERSITY                       0x8000
+#define BCCK_CARRIER_RECOVERY                   0x4000
+#define BCCK_TXRATE                             0x3000
+#define BCCK_DCCANCEL                           0x0800
+#define BCCK_ISICANCEL                          0x0400
+#define BCCK_MATCH_FILTER                       0x0200
+#define BCCK_EQUALIZER                          0x0100
+#define BCCK_PREAMBLE_DETECT                    0x800000
+#define BCCK_FAST_FALSECCA                      0x400000
+#define BCCK_CH_ESTSTART                        0x300000
+#define BCCK_CCA_COUNT                          0x080000
+#define BCCK_CS_LIM                             0x070000
+#define BCCK_BIST_MODE                          0x80000000
+#define BCCK_CCAMASK                            0x40000000
+#define BCCK_TX_DAC_PHASE                       0x4
+#define BCCK_RX_ADC_PHASE                       0x20000000
+#define BCCKR_CP_MODE                           0x0100
+#define BCCK_TXDC_OFFSET                        0xf0
+#define BCCK_RXDC_OFFSET                        0xf
+#define BCCK_CCA_MODE                           0xc000
+#define BCCK_FALSECS_LIM                        0x3f00
+#define BCCK_CS_RATIO                           0xc00000
+#define BCCK_CORGBIT_SEL                        0x300000
+#define BCCK_PD_LIM                             0x0f0000
+#define BCCK_NEWCCA                             0x80000000
+#define BCCK_RXHP_OF_IG                         0x8000
+#define BCCK_RXIG                               0x7f00
+#define BCCK_LNA_POLARITY                       0x800000
+#define BCCK_RX1ST_BAIN                         0x7f0000
+#define BCCK_RF_EXTEND                          0x20000000
+#define BCCK_RXAGC_SATLEVEL                     0x1f000000
+#define BCCK_RXAGC_SATCOUNT                     0xe0
+#define bCCKRxRFSettle                          0x1f
+#define BCCK_FIXED_RXAGC                        0x8000
+#define BCCK_ANTENNA_POLARITY                   0x2000
+#define BCCK_TXFILTER_TYPE                      0x0c00
+#define BCCK_RXAGC_REPORTTYPE                   0x0300
+#define BCCK_RXDAGC_EN                          0x80000000
+#define BCCK_RXDAGC_PERIOD                      0x20000000
+#define BCCK_RXDAGC_SATLEVEL                    0x1f000000
+#define BCCK_TIMING_RECOVERY                    0x800000
+#define BCCK_TXC0                               0x3f0000
+#define BCCK_TXC1                               0x3f000000
+#define BCCK_TXC2                               0x3f
+#define BCCK_TXC3                               0x3f00
+#define BCCK_TXC4                               0x3f0000
+#define BCCK_TXC5                               0x3f000000
+#define BCCK_TXC6                               0x3f
+#define BCCK_TXC7                               0x3f00
+#define BCCK_DEBUGPORT                          0xff0000
+#define BCCK_DAC_DEBUG                          0x0f000000
+#define BCCK_FALSEALARM_ENABLE                  0x8000
+#define BCCK_FALSEALARM_READ                    0x4000
+#define BCCK_TRSSI                              0x7f
+#define BCCK_RXAGC_REPORT                       0xfe
+#define BCCK_RXREPORT_ANTSEL                    0x80000000
+#define BCCK_RXREPORT_MFOFF                     0x40000000
+#define BCCK_RXREPORT_SQLOSS                    0x20000000
+#define BCCK_RXREPORT_PKTLOSS                   0x10000000
+#define BCCK_RXREPORT_LOCKEDBIT                 0x08000000
+#define BCCK_RXREPORT_RATEERROR                 0x04000000
+#define BCCK_RXREPORT_RXRATE                    0x03000000
+#define BCCK_RXFA_COUNTER_LOWER                 0xff
+#define BCCK_RXFA_COUNTER_UPPER                 0xff000000
+#define BCCK_RXHPAGC_START                      0xe000
+#define BCCK_RXHPAGC_FINAL                      0x1c00
+#define BCCK_RXFALSEALARM_ENABLE                0x8000
+#define BCCK_FACOUNTER_FREEZE                   0x4000
+#define BCCK_TXPATH_SEL                         0x10000000
+#define BCCK_DEFAULT_RXPATH                     0xc000000
+#define BCCK_OPTION_RXPATH                      0x3000000
+
+#define BNUM_OFSTF                              0x3
+#define BSHIFT_L                                0xc0
+#define BGI_TH                                  0xc
+#define BRXPATH_A                               0x1
+#define BRXPATH_B                               0x2
+#define BRXPATH_C                               0x4
+#define BRXPATH_D                               0x8
+#define BTXPATH_A                               0x1
+#define BTXPATH_B                               0x2
+#define BTXPATH_C                               0x4
+#define BTXPATH_D                               0x8
+#define BTRSSI_FREQ                             0x200
+#define BADC_BACKOFF                            0x3000
+#define BDFIR_BACKOFF                           0xc000
+#define BTRSSI_LATCH_PHASE                      0x10000
+#define BRX_LDC_OFFSET                          0xff
+#define BRX_QDC_OFFSET                          0xff00
+#define BRX_DFIR_MODE                           0x1800000
+#define BRX_DCNF_TYPE                           0xe000000
+#define BRXIQIMB_A                              0x3ff
+#define BRXIQIMB_B                              0xfc00
+#define BRXIQIMB_C                              0x3f0000
+#define BRXIQIMB_D                              0xffc00000
+#define BDC_DC_NOTCH                            0x60000
+#define BRXNB_NOTCH                             0x1f000000
+#define BPD_TH                                  0xf
+#define BPD_TH_OPT2                             0xc000
+#define BPWED_TH                                0x700
+#define BIFMF_WIN_L                             0x800
+#define BPD_OPTION                              0x1000
+#define BMF_WIN_L                               0xe000
+#define BBW_SEARCH_L                            0x30000
+#define BWIN_ENH_L                              0xc0000
+#define BBW_TH                                  0x700000
+#define BED_TH2                                 0x3800000
+#define BBW_OPTION                              0x4000000
+#define BRADIO_TH                               0x18000000
+#define BWINDOW_L                               0xe0000000
+#define BSBD_OPTION                             0x1
+#define BFRAME_TH                               0x1c
+#define BFS_OPTION                              0x60
+#define BDC_SLOPE_CHECK                         0x80
+#define BFGUARD_COUNTER_DC_L                    0xe00
+#define BFRAME_WEIGHT_SHORT                     0x7000
+#define BSUB_TUNE                               0xe00000
+#define BFRAME_DC_LENGTH                        0xe000000
+#define BSBD_START_OFFSET                       0x30000000
+#define BFRAME_TH_2                             0x7
+#define BFRAME_GI2_TH                           0x38
+#define BGI2_SYNC_EN                            0x40
+#define BSARCH_SHORT_EARLY                      0x300
+#define BSARCH_SHORT_LATE                       0xc00
+#define BSARCH_GI2_LATE                         0x70000
+#define BCFOANTSUM                              0x1
+#define BCFOACC                                 0x2
+#define BCFOSTARTOFFSET                         0xc
+#define BCFOLOOPBACK                            0x70
+#define BCFOSUMWEIGHT                           0x80
+#define BDAGCENABLE                             0x10000
+#define BTXIQIMB_A                              0x3ff
+#define BTXIQIMB_b                              0xfc00
+#define BTXIQIMB_C                              0x3f0000
+#define BTXIQIMB_D                              0xffc00000
+#define BTXIDCOFFSET                            0xff
+#define BTXIQDCOFFSET                           0xff00
+#define BTXDFIRMODE                             0x10000
+#define BTXPESUDO_NOISEON                       0x4000000
+#define BTXPESUDO_NOISE_A                       0xff
+#define BTXPESUDO_NOISE_B                       0xff00
+#define BTXPESUDO_NOISE_C                       0xff0000
+#define BTXPESUDO_NOISE_D                       0xff000000
+#define BCCA_DROPOPTION                         0x20000
+#define BCCA_DROPTHRES                          0xfff00000
+#define BEDCCA_H                                0xf
+#define BEDCCA_L                                0xf0
+#define BLAMBDA_ED                              0x300
+#define BRX_INITIALGAIN                         0x7f
+#define BRX_ANTDIV_EN                           0x80
+#define BRX_AGC_ADDRESS_FOR_LNA                 0x7f00
+#define BRX_HIGHPOWER_FLOW                      0x8000
+#define BRX_AGC_FREEZE_THRES                    0xc0000
+#define BRX_FREEZESTEP_AGC1                     0x300000
+#define BRX_FREEZESTEP_AGC2                     0xc00000
+#define BRX_FREEZESTEP_AGC3                     0x3000000
+#define BRX_FREEZESTEP_AGC0                     0xc000000
+#define BRXRSSI_CMP_EN                          0x10000000
+#define BRXQUICK_AGCEN                          0x20000000
+#define BRXAGC_FREEZE_THRES_MODE                0x40000000
+#define BRX_OVERFLOW_CHECKTYPE                  0x80000000
+#define BRX_AGCSHIFT                            0x7f
+#define BTRSW_TRI_ONLY                          0x80
+#define BPOWER_THRES                            0x300
+#define BRXAGC_EN                               0x1
+#define BRXAGC_TOGETHER_EN                      0x2
+#define BRXAGC_MIN                              0x4
+#define BRXHP_INI                               0x7
+#define BRXHP_TRLNA                             0x70
+#define BRXHP_RSSI                              0x700
+#define BRXHP_BBP1                              0x7000
+#define BRXHP_BBP2                              0x70000
+#define BRXHP_BBP3                              0x700000
+#define BRSSI_H                                 0x7f0000
+#define BRSSI_GEN                               0x7f000000
+#define BRXSETTLE_TRSW                          0x7
+#define BRXSETTLE_LNA                           0x38
+#define BRXSETTLE_RSSI                          0x1c0
+#define BRXSETTLE_BBP                           0xe00
+#define BRXSETTLE_RXHP                          0x7000
+#define BRXSETTLE_ANTSW_RSSI                    0x38000
+#define BRXSETTLE_ANTSW                         0xc0000
+#define BRXPROCESS_TIME_DAGC                    0x300000
+#define BRXSETTLE_HSSI                          0x400000
+#define BRXPROCESS_TIME_BBPPW                   0x800000
+#define BRXANTENNA_POWER_SHIFT                  0x3000000
+#define BRSSI_TABLE_SELECT                      0xc000000
+#define BRXHP_FINAL                             0x7000000
+#define BRXHPSETTLE_BBP                         0x7
+#define BRXHTSETTLE_HSSI                        0x8
+#define BRXHTSETTLE_RXHP                        0x70
+#define BRXHTSETTLE_BBPPW                       0x80
+#define BRXHTSETTLE_IDLE                        0x300
+#define BRXHTSETTLE_RESERVED                    0x1c00
+#define BRXHT_RXHP_EN                           0x8000
+#define BRXAGC_FREEZE_THRES                     0x30000
+#define BRXAGC_TOGETHEREN                       0x40000
+#define BRXHTAGC_MIN                            0x80000
+#define BRXHTAGC_EN                             0x100000
+#define BRXHTDAGC_EN                            0x200000
+#define BRXHT_RXHP_BBP                          0x1c00000
+#define BRXHT_RXHP_FINAL                        0xe0000000
+#define BRXPW_RADIO_TH                          0x3
+#define BRXPW_RADIO_EN                          0x4
+#define BRXMF_HOLD                              0x3800
+#define BRXPD_DELAY_TH1                         0x38
+#define BRXPD_DELAY_TH2                         0x1c0
+#define BRXPD_DC_COUNT_MAX                      0x600
+#define BRXPD_DELAY_TH                          0x8000
+#define BRXPROCESS_DELAY                        0xf0000
+#define BRXSEARCHRANGE_GI2_EARLY                0x700000
+#define BRXFRAME_FUARD_COUNTER_L                0x3800000
+#define BRXSGI_GUARD_L                          0xc000000
+#define BRXSGI_SEARCH_L                         0x30000000
+#define BRXSGI_TH                               0xc0000000
+#define BDFSCNT0                                0xff
+#define BDFSCNT1                                0xff00
+#define BDFSFLAG                                0xf0000
+#define BMF_WEIGHT_SUM                          0x300000
+#define BMINIDX_TH                              0x7f000000
+#define BDAFORMAT                               0x40000
+#define BTXCH_EMU_ENABLE                        0x01000000
+#define BTRSW_ISOLATION_A                       0x7f
+#define BTRSW_ISOLATION_B                       0x7f00
+#define BTRSW_ISOLATION_C                       0x7f0000
+#define BTRSW_ISOLATION_D                       0x7f000000
+#define BEXT_LNA_GAIN                           0x7c00
+
+#define BSTBC_EN                                0x4
+#define BANTENNA_MAPPING                        0x10
+#define BNSS                                    0x20
+#define BCFO_ANTSUM_ID                          0x200
+#define BPHY_COUNTER_RESET                      0x8000000
+#define BCFO_REPORT_GET                         0x4000000
+#define BOFDM_CONTINUE_TX                       0x10000000
+#define BOFDM_SINGLE_CARRIER                    0x20000000
+#define BOFDM_SINGLE_TONE                       0x40000000
+#define BHT_DETECT                              0x100
+#define BCFOEN                                  0x10000
+#define BCFOVALUE                               0xfff00000
+#define BSIGTONE_RE                             0x3f
+#define BSIGTONE_IM                             0x7f00
+#define BCOUNTER_CCA                            0xffff
+#define BCOUNTER_PARITYFAIL                     0xffff0000
+#define BCOUNTER_RATEILLEGAL                    0xffff
+#define BCOUNTER_CRC8FAIL                       0xffff0000
+#define BCOUNTER_MCSNOSUPPORT                   0xffff
+#define BCOUNTER_FASTSYNC                       0xffff
+#define BSHORTCFO                               0xfff
+#define BSHORTCFOT_LENGTH                       12
+#define BSHORTCFOF_LENGTH                       11
+#define BLONGCFO                                0x7ff
+#define BLONGCFOT_LENGTH                        11
+#define BLONGCFOF_LENGTH                        11
+#define BTAILCFO                                0x1fff
+#define BTAILCFOT_LENGTH                        13
+#define BTAILCFOF_LENGTH                        12
+#define BNOISE_EN_PWDB                          0xffff
+#define BCC_POWER_DB                            0xffff0000
+#define BMOISE_PWDB                             0xffff
+#define BPOWERMEAST_LENGTH                      10
+#define BPOWERMEASF_LENGTH                      3
+#define BRX_HT_BW                               0x1
+#define BRXSC                                   0x6
+#define BRX_HT                                  0x8
+#define BNB_INTF_DET_ON                         0x1
+#define BINTF_WIN_LEN_CFG                       0x30
+#define BNB_INTF_TH_CFG                         0x1c0
+#define BRFGAIN                                 0x3f
+#define BTABLESEL                               0x40
+#define BTRSW                                   0x80
+#define BRXSNR_A                                0xff
+#define BRXSNR_B                                0xff00
+#define BRXSNR_C                                0xff0000
+#define BRXSNR_D                                0xff000000
+#define BSNR_EVMT_LENGTH                        8
+#define BSNR_EVMF_LENGTH                        1
+#define BCSI1ST                                 0xff
+#define BCSI2ND                                 0xff00
+#define BRXEVM1ST                               0xff0000
+#define BRXEVM2ND                               0xff000000
+#define BSIGEVM                                 0xff
+#define BPWDB                                   0xff00
+#define BSGIEN                                  0x10000
+
+#define BSFACTOR_QMA1                           0xf
+#define BSFACTOR_QMA2                           0xf0
+#define BSFACTOR_QMA3                           0xf00
+#define BSFACTOR_QMA4                           0xf000
+#define BSFACTOR_QMA5                           0xf0000
+#define BSFACTOR_QMA6                           0xf0000
+#define BSFACTOR_QMA7                           0xf00000
+#define BSFACTOR_QMA8                           0xf000000
+#define BSFACTOR_QMA9                           0xf0000000
+#define BCSI_SCHEME                             0x100000
+
+#define BNOISE_LVL_TOP_SET                      0x3
+#define BCHSMOOTH                               0x4
+#define BCHSMOOTH_CFG1                          0x38
+#define BCHSMOOTH_CFG2                          0x1c0
+#define BCHSMOOTH_CFG3                          0xe00
+#define BCHSMOOTH_CFG4                          0x7000
+#define BMRCMODE                                0x800000
+#define BTHEVMCFG                               0x7000000
+
+#define BLOOP_FIT_TYPE                          0x1
+#define BUPD_CFO                                0x40
+#define BUPD_CFO_OFFDATA                        0x80
+#define BADV_UPD_CFO                            0x100
+#define BADV_TIME_CTRL                          0x800
+#define BUPD_CLKO                               0x1000
+#define BFC                                     0x6000
+#define BTRACKING_MODE                          0x8000
+#define BPHCMP_ENABLE                           0x10000
+#define BUPD_CLKO_LTF                           0x20000
+#define BCOM_CH_CFO                             0x40000
+#define BCSI_ESTI_MODE                          0x80000
+#define BADV_UPD_EQZ                            0x100000
+#define BUCHCFG                                 0x7000000
+#define BUPDEQZ                                 0x8000000
+
+#define BRX_PESUDO_NOISE_ON                     0x20000000
+#define BRX_PESUDO_NOISE_A                      0xff
+#define BRX_PESUDO_NOISE_B                      0xff00
+#define BRX_PESUDO_NOISE_C                      0xff0000
+#define BRX_PESUDO_NOISE_D                      0xff000000
+#define BRX_PESUDO_NOISESTATE_A                 0xffff
+#define BRX_PESUDO_NOISESTATE_B                 0xffff0000
+#define BRX_PESUDO_NOISESTATE_C                 0xffff
+#define BRX_PESUDO_NOISESTATE_D                 0xffff0000
+
+#define BZEBRA1_HSSIENABLE                      0x8
+#define BZEBRA1_TRXCONTROL                      0xc00
+#define BZEBRA1_TRXGAINSETTING                  0x07f
+#define BZEBRA1_RXCOUNTER                       0xc00
+#define BZEBRA1_TXCHANGEPUMP                    0x38
+#define BZEBRA1_RXCHANGEPUMP                    0x7
+#define BZEBRA1_CHANNEL_NUM                     0xf80
+#define BZEBRA1_TXLPFBW                         0x400
+#define BZEBRA1_RXLPFBW                         0x600
+
+#define BRTL8256REG_MODE_CTRL1                  0x100
+#define BRTL8256REG_MODE_CTRL0                  0x40
+#define BRTL8256REG_TXLPFBW                     0x18
+#define BRTL8256REG_RXLPFBW                     0x600
+
+#define BRTL8258_TXLPFBW                        0xc
+#define BRTL8258_RXLPFBW                        0xc00
+#define BRTL8258_RSSILPFBW                      0xc0
+
+#define BBYTE0                                  0x1
+#define BBYTE1                                  0x2
+#define BBYTE2                                  0x4
+#define BBYTE3                                  0x8
+#define BWORD0                                  0x3
+#define BWORD1                                  0xc
+#define BWORD                                   0xf
+
+#define MASKBYTE0                               0xff
+#define MASKBYTE1                               0xff00
+#define MASKBYTE2                               0xff0000
+#define MASKBYTE3                               0xff000000
+#define MASKHWORD                               0xffff0000
+#define MASKLWORD                               0x0000ffff
+#define MASKDWORD                               0xffffffff
+#define MASK12BITS                              0xfff
+#define MASKH4BITS                              0xf0000000
+#define MASKOFDM_D                              0xffc00000
+#define MASKCCK                                 0x3f3f3f3f
+
+#define MASK4BITS                               0x0f
+#define MASK20BITS                              0xfffff
+#define RFREG_OFFSET_MASK                       0xfffff
+
+#define BENABLE                                 0x1
+#define BDISABLE                                0x0
+
+#define LEFT_ANTENNA                            0x0
+#define RIGHT_ANTENNA                           0x1
+
+#define TCHECK_TXSTATUS                         500
+#define TUPDATE_RXCOUNTER                       100
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c
new file mode 100644
index 000000000000..ffd8e04c4028
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c
@@ -0,0 +1,523 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+
+static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
+
+void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        switch (bandwidth) {
+        case HT_CHANNEL_WIDTH_20:
+                rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
+                                             0xfffff3ff) | 0x0400);
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
+                              rtlphy->rfreg_chnlval[0]);
+                break;
+        case HT_CHANNEL_WIDTH_20_40:
+                rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
+                                             0xfffff3ff));
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
+                              rtlphy->rfreg_chnlval[0]);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", bandwidth));
+                break;
+        }
+}
+
+void rtl92c_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
+                                       u8 *ppowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u32 tx_agc[2] = {0, 0}, tmpval;
+        bool turbo_scanoff = false;
+        u8 idx1, idx2;
+        u8 *ptr;
+
+        if (rtlefuse->eeprom_regulatory != 0)
+                turbo_scanoff = true;
+
+        if (mac->act_scanning == true) {
+                tx_agc[RF90_PATH_A] = 0x3f3f3f3f;
+                tx_agc[RF90_PATH_B] = 0x3f3f3f3f;
+
+                if (turbo_scanoff) {
+                        for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                                tx_agc[idx1] = ppowerlevel[idx1] |
+                                    (ppowerlevel[idx1] << 8) |
+                                    (ppowerlevel[idx1] << 16) |
+                                    (ppowerlevel[idx1] << 24);
+                        }
+                }
+        } else {
+                for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                        tx_agc[idx1] = ppowerlevel[idx1] |
+                            (ppowerlevel[idx1] << 8) |
+                            (ppowerlevel[idx1] << 16) |
+                            (ppowerlevel[idx1] << 24);
+                }
+
+                if (rtlefuse->eeprom_regulatory == 0) {
+                        tmpval =
+                            (rtlphy->mcs_txpwrlevel_origoffset[0][6]) +
+                            (rtlphy->mcs_txpwrlevel_origoffset[0][7] <<
+                             8);
+                        tx_agc[RF90_PATH_A] += tmpval;
+
+                        tmpval = (rtlphy->mcs_txpwrlevel_origoffset[0][14]) +
+                                 (rtlphy->mcs_txpwrlevel_origoffset[0][15] <<
+                                 24);
+                        tx_agc[RF90_PATH_B] += tmpval;
+                }
+        }
+
+        for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                ptr = (u8 *) (&(tx_agc[idx1]));
+                for (idx2 = 0; idx2 < 4; idx2++) {
+                        if (*ptr > RF6052_MAX_TX_PWR)
+                                *ptr = RF6052_MAX_TX_PWR;
+                        ptr++;
+                }
+        }
+
+        tmpval = tx_agc[RF90_PATH_A] & 0xff;
+        rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
+
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_A_CCK1_MCS32));
+
+        tmpval = tx_agc[RF90_PATH_A] >> 8;
+
+        if (mac->mode == WIRELESS_MODE_B)
+                tmpval = tmpval & 0xff00ffff;
+
+        rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK11_A_CCK2_11));
+
+        tmpval = tx_agc[RF90_PATH_B] >> 24;
+        rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, MASKBYTE0, tmpval);
+
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK11_A_CCK2_11));
+
+        tmpval = tx_agc[RF90_PATH_B] & 0x00ffffff;
+        rtl_set_bbreg(hw, RTXAGC_B_CCK1_55_MCS32, 0xffffff00, tmpval);
+
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK1_55_MCS32));
+}
+
+static void rtl92c_phy_get_power_base(struct ieee80211_hw *hw,
+                                      u8 *ppowerlevel, u8 channel,
+                                      u32 *ofdmbase, u32 *mcsbase)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u32 powerBase0, powerBase1;
+        u8 legacy_pwrdiff, ht20_pwrdiff;
+        u8 i, powerlevel[2];
+
+        for (i = 0; i < 2; i++) {
+                powerlevel[i] = ppowerlevel[i];
+                legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff[i][channel - 1];
+                powerBase0 = powerlevel[i] + legacy_pwrdiff;
+
+                powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
+                    (powerBase0 << 8) | powerBase0;
+                *(ofdmbase + i) = powerBase0;
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        (" [OFDM power base index rf(%c) = 0x%x]\n",
+                         ((i == 0) ? 'A' : 'B'), *(ofdmbase + i)));
+        }
+
+        for (i = 0; i < 2; i++) {
+                if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20) {
+                        ht20_pwrdiff = rtlefuse->txpwr_ht20diff[i][channel - 1];
+                        powerlevel[i] += ht20_pwrdiff;
+                }
+                powerBase1 = powerlevel[i];
+                powerBase1 = (powerBase1 << 24) |
+                    (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
+
+                *(mcsbase + i) = powerBase1;
+
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        (" [MCS power base index rf(%c) = 0x%x]\n",
+                         ((i == 0) ? 'A' : 'B'), *(mcsbase + i)));
+        }
+}
+
+static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
+                                                       u8 channel, u8 index,
+                                                       u32 *powerBase0,
+                                                       u32 *powerBase1,
+                                                       u32 *p_outwriteval)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 i, chnlgroup, pwr_diff_limit[4];
+        u32 writeVal, customer_limit, rf;
+
+        for (rf = 0; rf < 2; rf++) {
+                switch (rtlefuse->eeprom_regulatory) {
+                case 0:
+                        chnlgroup = 0;
+
+                        writeVal =
+                            rtlphy->mcs_txpwrlevel_origoffset[chnlgroup][index +
+                            (rf ? 8 : 0)]
+                            + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("RTK better performance, "
+                                 "writeVal(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                case 1:
+                        if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
+                                writeVal = ((index < 2) ? powerBase0[rf] :
+                                            powerBase1[rf]);
+
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("Realtek regulatory, 40MHz, "
+                                         "writeVal(%c) = 0x%x\n",
+                                         ((rf == 0) ? 'A' : 'B'), writeVal));
+                        } else {
+                                if (rtlphy->pwrgroup_cnt == 1)
+                                        chnlgroup = 0;
+                                if (rtlphy->pwrgroup_cnt >= 3) {
+                                        if (channel <= 3)
+                                                chnlgroup = 0;
+                                        else if (channel >= 4 && channel <= 9)
+                                                chnlgroup = 1;
+                                        else if (channel > 9)
+                                                chnlgroup = 2;
+                                        if (rtlphy->pwrgroup_cnt == 4)
+                                                chnlgroup++;
+                                }
+
+                                writeVal =
+                                    rtlphy->mcs_txpwrlevel_origoffset[chnlgroup]
+                                    [index + (rf ? 8 : 0)] + ((index < 2) ?
+                                                              powerBase0[rf] :
+                                                              powerBase1[rf]);
+
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("Realtek regulatory, 20MHz, "
+                                         "writeVal(%c) = 0x%x\n",
+                                         ((rf == 0) ? 'A' : 'B'), writeVal));
+                        }
+                        break;
+                case 2:
+                        writeVal =
+                            ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Better regulatory, "
+                                 "writeVal(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                case 3:
+                        chnlgroup = 0;
+
+                        if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("customer's limit, 40MHz "
+                                         "rf(%c) = 0x%x\n",
+                                         ((rf == 0) ? 'A' : 'B'),
+                                         rtlefuse->pwrgroup_ht40[rf][channel -
+                                                                     1]));
+                        } else {
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("customer's limit, 20MHz "
+                                         "rf(%c) = 0x%x\n",
+                                         ((rf == 0) ? 'A' : 'B'),
+                                         rtlefuse->pwrgroup_ht20[rf][channel -
+                                                                     1]));
+                        }
+                        for (i = 0; i < 4; i++) {
+                                pwr_diff_limit[i] =
+                                    (u8) ((rtlphy->mcs_txpwrlevel_origoffset
+                                          [chnlgroup][index +
+                                          (rf ? 8 : 0)] & (0x7f << (i * 8))) >>
+                                          (i * 8));
+
+                                if (rtlphy->current_chan_bw ==
+                                    HT_CHANNEL_WIDTH_20_40) {
+                                        if (pwr_diff_limit[i] >
+                                            rtlefuse->
+                                            pwrgroup_ht40[rf][channel - 1])
+                                                pwr_diff_limit[i] =
+                                                    rtlefuse->pwrgroup_ht40[rf]
+                                                    [channel - 1];
+                                } else {
+                                        if (pwr_diff_limit[i] >
+                                            rtlefuse->
+                                            pwrgroup_ht20[rf][channel - 1])
+                                                pwr_diff_limit[i] =
+                                                    rtlefuse->pwrgroup_ht20[rf]
+                                                    [channel - 1];
+                                }
+                        }
+
+                        customer_limit = (pwr_diff_limit[3] << 24) |
+                            (pwr_diff_limit[2] << 16) |
+                            (pwr_diff_limit[1] << 8) | (pwr_diff_limit[0]);
+
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Customer's limit rf(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), customer_limit));
+
+                        writeVal = customer_limit +
+                            ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Customer, writeVal rf(%c)= 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                default:
+                        chnlgroup = 0;
+                        writeVal =
+                            rtlphy->mcs_txpwrlevel_origoffset[chnlgroup]
+                            [index + (rf ? 8 : 0)]
+                            + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("RTK better performance, writeVal "
+                                 "rf(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                }
+
+                if (rtlpriv->dm.dynamic_txhighpower_lvl == TXHIGHPWRLEVEL_BT1)
+                        writeVal = writeVal - 0x06060606;
+                else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                         TXHIGHPWRLEVEL_BT2)
+                        writeVal = writeVal - 0x0c0c0c0c;
+                *(p_outwriteval + rf) = writeVal;
+        }
+}
+
+static void _rtl92c_write_ofdm_power_reg(struct ieee80211_hw *hw,
+                                         u8 index, u32 *pValue)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        u16 regoffset_a[6] = {
+                RTXAGC_A_RATE18_06, RTXAGC_A_RATE54_24,
+                RTXAGC_A_MCS03_MCS00, RTXAGC_A_MCS07_MCS04,
+                RTXAGC_A_MCS11_MCS08, RTXAGC_A_MCS15_MCS12
+        };
+        u16 regoffset_b[6] = {
+                RTXAGC_B_RATE18_06, RTXAGC_B_RATE54_24,
+                RTXAGC_B_MCS03_MCS00, RTXAGC_B_MCS07_MCS04,
+                RTXAGC_B_MCS11_MCS08, RTXAGC_B_MCS15_MCS12
+        };
+        u8 i, rf, pwr_val[4];
+        u32 writeVal;
+        u16 regoffset;
+
+        for (rf = 0; rf < 2; rf++) {
+                writeVal = pValue[rf];
+                for (i = 0; i < 4; i++) {
+                        pwr_val[i] = (u8) ((writeVal & (0x7f <<
+                                                        (i * 8))) >> (i * 8));
+
+                        if (pwr_val[i] > RF6052_MAX_TX_PWR)
+                                pwr_val[i] = RF6052_MAX_TX_PWR;
+                }
+                writeVal = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
+                    (pwr_val[1] << 8) | pwr_val[0];
+
+                if (rf == 0)
+                        regoffset = regoffset_a[index];
+                else
+                        regoffset = regoffset_b[index];
+                rtl_set_bbreg(hw, regoffset, MASKDWORD, writeVal);
+
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        ("Set 0x%x = %08x\n", regoffset, writeVal));
+
+                if (((get_rf_type(rtlphy) == RF_2T2R) &&
+                     (regoffset == RTXAGC_A_MCS15_MCS12 ||
+                      regoffset == RTXAGC_B_MCS15_MCS12)) ||
+                    ((get_rf_type(rtlphy) != RF_2T2R) &&
+                     (regoffset == RTXAGC_A_MCS07_MCS04 ||
+                      regoffset == RTXAGC_B_MCS07_MCS04))) {
+
+                        writeVal = pwr_val[3];
+                        if (regoffset == RTXAGC_A_MCS15_MCS12 ||
+                            regoffset == RTXAGC_A_MCS07_MCS04)
+                                regoffset = 0xc90;
+                        if (regoffset == RTXAGC_B_MCS15_MCS12 ||
+                            regoffset == RTXAGC_B_MCS07_MCS04)
+                                regoffset = 0xc98;
+
+                        for (i = 0; i < 3; i++) {
+                                writeVal = (writeVal > 6) ? (writeVal - 6) : 0;
+                                rtl_write_byte(rtlpriv, (u32) (regoffset + i),
+                                               (u8) writeVal);
+                        }
+                }
+        }
+}
+
+void rtl92c_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
+                                        u8 *ppowerlevel, u8 channel)
+{
+        u32 writeVal[2], powerBase0[2], powerBase1[2];
+        u8 index;
+
+        rtl92c_phy_get_power_base(hw, ppowerlevel,
+                                  channel, &powerBase0[0], &powerBase1[0]);
+
+        for (index = 0; index < 6; index++) {
+                _rtl92c_get_txpower_writeval_by_regulatory(hw,
+                                                           channel, index,
+                                                           &powerBase0[0],
+                                                           &powerBase1[0],
+                                                           &writeVal[0]);
+
+                _rtl92c_write_ofdm_power_reg(hw, index, &writeVal[0]);
+        }
+}
+
+bool rtl92c_phy_rf6052_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (rtlphy->rf_type == RF_1T1R)
+                rtlphy->num_total_rfpath = 1;
+        else
+                rtlphy->num_total_rfpath = 2;
+
+        return _rtl92c_phy_rf6052_config_parafile(hw);
+}
+
+static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 u4_regvalue;
+        u8 rfpath;
+        bool rtstatus;
+        struct bb_reg_def *pphyreg;
+
+        for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
+
+                pphyreg = &rtlphy->phyreg_def[rfpath];
+
+                switch (rfpath) {
+                case RF90_PATH_A:
+                case RF90_PATH_C:
+                        u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
+                                                    BRFSI_RFENV);
+                        break;
+                case RF90_PATH_B:
+                case RF90_PATH_D:
+                        u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
+                                                    BRFSI_RFENV << 16);
+                        break;
+                }
+
+                rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
+                udelay(1);
+
+                rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
+                udelay(1);
+
+                rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
+                              B3WIREADDREAALENGTH, 0x0);
+                udelay(1);
+
+                rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
+                udelay(1);
+
+                switch (rfpath) {
+                case RF90_PATH_A:
+                        rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
+                                        (enum radio_path) rfpath);
+                        break;
+                case RF90_PATH_B:
+                        rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
+                                        (enum radio_path) rfpath);
+                        break;
+                case RF90_PATH_C:
+                        break;
+                case RF90_PATH_D:
+                        break;
+                }
+
+                switch (rfpath) {
+                case RF90_PATH_A:
+                case RF90_PATH_C:
+                        rtl_set_bbreg(hw, pphyreg->rfintfs,
+                                      BRFSI_RFENV, u4_regvalue);
+                        break;
+                case RF90_PATH_B:
+                case RF90_PATH_D:
+                        rtl_set_bbreg(hw, pphyreg->rfintfs,
+                                      BRFSI_RFENV << 16, u4_regvalue);
+                        break;
+                }
+
+                if (rtstatus != true) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("Radio[%d] Fail!!", rfpath));
+                        return false;
+                }
+
+        }
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("<---\n"));
+        return rtstatus;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/rf.h b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.h
new file mode 100644
index 000000000000..d3014f99bb7b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.h
@@ -0,0 +1,44 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_RF_H__
+#define __RTL92C_RF_H__
+
+#define RF6052_MAX_TX_PWR               0x3F
+#define RF6052_MAX_REG                  0x3F
+#define RF6052_MAX_PATH                 2
+
+extern void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw,
+                                            u8 bandwidth);
+extern void rtl92c_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
+                                              u8 *ppowerlevel);
+extern void rtl92c_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
+                                               u8 *ppowerlevel, u8 channel);
+extern bool rtl92c_phy_rf6052_config(struct ieee80211_hw *hw);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
new file mode 100644
index 000000000000..b366e8862929
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
@@ -0,0 +1,282 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include <linux/vmalloc.h>
+
+#include "../wifi.h"
+#include "../core.h"
+#include "../pci.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "dm.h"
+#include "hw.h"
+#include "sw.h"
+#include "trx.h"
+#include "led.h"
+
+int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+
+        rtlpriv->dm.b_dm_initialgain_enable = 1;
+        rtlpriv->dm.dm_flag = 0;
+        rtlpriv->dm.b_disable_framebursting = 0;;
+        rtlpriv->dm.thermalvalue = 0;
+        rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
+
+        rtlpci->receive_config = (RCR_APPFCS |
+                                  RCR_AMF |
+                                  RCR_ADF |
+                                  RCR_APP_MIC |
+                                  RCR_APP_ICV |
+                                  RCR_AICV |
+                                  RCR_ACRC32 |
+                                  RCR_AB |
+                                  RCR_AM |
+                                  RCR_APM |
+                                  RCR_APP_PHYST_RXFF | RCR_HTC_LOC_CTRL | 0);
+
+        rtlpci->irq_mask[0] =
+            (u32) (IMR_ROK |
+                   IMR_VODOK |
+                   IMR_VIDOK |
+                   IMR_BEDOK |
+                   IMR_BKDOK |
+                   IMR_MGNTDOK |
+                   IMR_HIGHDOK | IMR_BDOK | IMR_RDU | IMR_RXFOVW | 0);
+
+        rtlpci->irq_mask[1] = (u32) (IMR_CPWM | IMR_C2HCMD | 0);
+
+        rtlpriv->rtlhal.pfirmware = (u8 *) vmalloc(0x4000);
+        if (!rtlpriv->rtlhal.pfirmware) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't alloc buffer for fw.\n"));
+                return 1;
+        }
+
+        return 0;
+}
+
+void rtl92c_deinit_sw_vars(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->rtlhal.pfirmware) {
+                vfree(rtlpriv->rtlhal.pfirmware);
+                rtlpriv->rtlhal.pfirmware = NULL;
+        }
+}
+
+static struct rtl_hal_ops rtl8192ce_hal_ops = {
+        .init_sw_vars = rtl92c_init_sw_vars,
+        .deinit_sw_vars = rtl92c_deinit_sw_vars,
+        .read_eeprom_info = rtl92ce_read_eeprom_info,
+        .interrupt_recognized = rtl92ce_interrupt_recognized,
+        .hw_init = rtl92ce_hw_init,
+        .hw_disable = rtl92ce_card_disable,
+        .enable_interrupt = rtl92ce_enable_interrupt,
+        .disable_interrupt = rtl92ce_disable_interrupt,
+        .set_network_type = rtl92ce_set_network_type,
+        .set_qos = rtl92ce_set_qos,
+        .set_bcn_reg = rtl92ce_set_beacon_related_registers,
+        .set_bcn_intv = rtl92ce_set_beacon_interval,
+        .update_interrupt_mask = rtl92ce_update_interrupt_mask,
+        .get_hw_reg = rtl92ce_get_hw_reg,
+        .set_hw_reg = rtl92ce_set_hw_reg,
+        .update_rate_table = rtl92ce_update_hal_rate_table,
+        .update_rate_mask = rtl92ce_update_hal_rate_mask,
+        .fill_tx_desc = rtl92ce_tx_fill_desc,
+        .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc,
+        .query_rx_desc = rtl92ce_rx_query_desc,
+        .set_channel_access = rtl92ce_update_channel_access_setting,
+        .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking,
+        .set_bw_mode = rtl92c_phy_set_bw_mode,
+        .switch_channel = rtl92c_phy_sw_chnl,
+        .dm_watchdog = rtl92c_dm_watchdog,
+        .scan_operation_backup = rtl92c_phy_scan_operation_backup,
+        .set_rf_power_state = rtl92c_phy_set_rf_power_state,
+        .led_control = rtl92ce_led_control,
+        .set_desc = rtl92ce_set_desc,
+        .get_desc = rtl92ce_get_desc,
+        .tx_polling = rtl92ce_tx_polling,
+        .enable_hw_sec = rtl92ce_enable_hw_security_config,
+        .set_key = rtl92ce_set_key,
+        .init_sw_leds = rtl92ce_init_sw_leds,
+        .deinit_sw_leds = rtl92ce_deinit_sw_leds,
+        .get_bbreg = rtl92c_phy_query_bb_reg,
+        .set_bbreg = rtl92c_phy_set_bb_reg,
+        .get_rfreg = rtl92c_phy_query_rf_reg,
+        .set_rfreg = rtl92c_phy_set_rf_reg,
+};
+
+static struct rtl_mod_params rtl92ce_mod_params = {
+        .sw_crypto = 0,
+};
+
+static struct rtl_hal_cfg rtl92ce_hal_cfg = {
+        .name = "rtl92c_pci",
+        .fw_name = "rtlwifi/rtl8192cfw.bin",
+        .ops = &rtl8192ce_hal_ops,
+        .mod_params = &rtl92ce_mod_params,
+
+        .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
+        .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
+        .maps[SYS_CLK] = REG_SYS_CLKR,
+        .maps[MAC_RCR_AM] = AM,
+        .maps[MAC_RCR_AB] = AB,
+        .maps[MAC_RCR_ACRC32] = ACRC32,
+        .maps[MAC_RCR_ACF] = ACF,
+        .maps[MAC_RCR_AAP] = AAP,
+
+        .maps[EFUSE_TEST] = REG_EFUSE_TEST,
+        .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
+        .maps[EFUSE_CLK] = 0,
+        .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
+        .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
+        .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
+        .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
+        .maps[EFUSE_ANA8M] = EFUSE_ANA8M,
+        .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
+
+        .maps[RWCAM] = REG_CAMCMD,
+        .maps[WCAMI] = REG_CAMWRITE,
+        .maps[RCAMO] = REG_CAMREAD,
+        .maps[CAMDBG] = REG_CAMDBG,
+        .maps[SECR] = REG_SECCFG,
+        .maps[SEC_CAM_NONE] = CAM_NONE,
+        .maps[SEC_CAM_WEP40] = CAM_WEP40,
+        .maps[SEC_CAM_TKIP] = CAM_TKIP,
+        .maps[SEC_CAM_AES] = CAM_AES,
+        .maps[SEC_CAM_WEP104] = CAM_WEP104,
+
+        .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
+        .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
+        .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
+        .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
+        .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
+        .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
+        .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
+        .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
+        .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
+        .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
+        .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
+        .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
+        .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
+        .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
+        .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
+        .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
+
+        .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
+        .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
+        .maps[RTL_IMR_BcnInt] = IMR_BCNINT,
+        .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
+        .maps[RTL_IMR_RDU] = IMR_RDU,
+        .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
+        .maps[RTL_IMR_BDOK] = IMR_BDOK,
+        .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
+        .maps[RTL_IMR_TBDER] = IMR_TBDER,
+        .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
+        .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
+        .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
+        .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
+        .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
+        .maps[RTL_IMR_VODOK] = IMR_VODOK,
+        .maps[RTL_IMR_ROK] = IMR_ROK,
+        .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER),
+
+        .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
+        .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
+        .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
+        .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
+        .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
+        .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
+        .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
+        .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
+        .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
+        .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
+        .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
+        .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
+
+        .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
+        .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
+};
+
+static struct pci_device_id rtl92ce_pci_ids[] __devinitdata = {
+        {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8191, rtl92ce_hal_cfg)},
+        {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8178, rtl92ce_hal_cfg)},
+        {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8177, rtl92ce_hal_cfg)},
+        {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8176, rtl92ce_hal_cfg)},
+        {},
+};
+
+MODULE_DEVICE_TABLE(pci, rtl92ce_pci_ids);
+
+MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
+MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
+MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Realtek 8192C/8188C 802.11n PCI wireless");
+MODULE_FIRMWARE("rtlwifi/rtl8192cfw.bin");
+
+module_param_named(swenc, rtl92ce_mod_params.sw_crypto, bool, 0444);
+MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n");
+
+static struct pci_driver rtl92ce_driver = {
+        .name = KBUILD_MODNAME,
+        .id_table = rtl92ce_pci_ids,
+        .probe = rtl_pci_probe,
+        .remove = rtl_pci_disconnect,
+
+#ifdef CONFIG_PM
+        .suspend = rtl_pci_suspend,
+        .resume = rtl_pci_resume,
+#endif
+
+};
+
+static int __init rtl92ce_module_init(void)
+{
+        int ret;
+
+        ret = pci_register_driver(&rtl92ce_driver);
+        if (ret)
+                RT_ASSERT(false, (": No device found\n"));
+
+        return ret;
+}
+
+static void __exit rtl92ce_module_exit(void)
+{
+        pci_unregister_driver(&rtl92ce_driver);
+}
+
+module_init(rtl92ce_module_init);
+module_exit(rtl92ce_module_exit);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h
new file mode 100644
index 000000000000..de1198c38d4e
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h
@@ -0,0 +1,37 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CE_SW_H__
+#define __RTL92CE_SW_H__
+
+int rtl92c_init_sw_vars(struct ieee80211_hw *hw);
+void rtl92c_deinit_sw_vars(struct ieee80211_hw *hw);
+void rtl92c_init_var_map(struct ieee80211_hw *hw);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/table.c b/drivers/net/wireless/rtlwifi/rtl8192ce/table.c
new file mode 100644
index 000000000000..ba938b91aa6f
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/table.c
@@ -0,0 +1,1224 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Created on  2010/ 5/18,  1:41
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "table.h"
+
+
+u32 RTL8192CEPHY_REG_2TARRAY[PHY_REG_2TARRAY_LENGTH] = {
+        0x024, 0x0011800f,
+        0x028, 0x00ffdb83,
+        0x800, 0x80040002,
+        0x804, 0x00000003,
+        0x808, 0x0000fc00,
+        0x80c, 0x0000000a,
+        0x810, 0x10005388,
+        0x814, 0x020c3d10,
+        0x818, 0x02200385,
+        0x81c, 0x00000000,
+        0x820, 0x01000100,
+        0x824, 0x00390004,
+        0x828, 0x01000100,
+        0x82c, 0x00390004,
+        0x830, 0x27272727,
+        0x834, 0x27272727,
+        0x838, 0x27272727,
+        0x83c, 0x27272727,
+        0x840, 0x00010000,
+        0x844, 0x00010000,
+        0x848, 0x27272727,
+        0x84c, 0x27272727,
+        0x850, 0x00000000,
+        0x854, 0x00000000,
+        0x858, 0x569a569a,
+        0x85c, 0x0c1b25a4,
+        0x860, 0x66e60230,
+        0x864, 0x061f0130,
+        0x868, 0x27272727,
+        0x86c, 0x2b2b2b27,
+        0x870, 0x07000700,
+        0x874, 0x22184000,
+        0x878, 0x08080808,
+        0x87c, 0x00000000,
+        0x880, 0xc0083070,
+        0x884, 0x000004d5,
+        0x888, 0x00000000,
+        0x88c, 0xcc0000c0,
+        0x890, 0x00000800,
+        0x894, 0xfffffffe,
+        0x898, 0x40302010,
+        0x89c, 0x00706050,
+        0x900, 0x00000000,
+        0x904, 0x00000023,
+        0x908, 0x00000000,
+        0x90c, 0x81121313,
+        0xa00, 0x00d047c8,
+        0xa04, 0x80ff000c,
+        0xa08, 0x8c838300,
+        0xa0c, 0x2e68120f,
+        0xa10, 0x9500bb78,
+        0xa14, 0x11144028,
+        0xa18, 0x00881117,
+        0xa1c, 0x89140f00,
+        0xa20, 0x1a1b0000,
+        0xa24, 0x090e1317,
+        0xa28, 0x00000204,
+        0xa2c, 0x00d30000,
+        0xa70, 0x101fbf00,
+        0xa74, 0x00000007,
+        0xc00, 0x48071d40,
+        0xc04, 0x03a05633,
+        0xc08, 0x000000e4,
+        0xc0c, 0x6c6c6c6c,
+        0xc10, 0x08800000,
+        0xc14, 0x40000100,
+        0xc18, 0x08800000,
+        0xc1c, 0x40000100,
+        0xc20, 0x00000000,
+        0xc24, 0x00000000,
+        0xc28, 0x00000000,
+        0xc2c, 0x00000000,
+        0xc30, 0x69e9ac44,
+        0xc34, 0x469652cf,
+        0xc38, 0x49795994,
+        0xc3c, 0x0a97971c,
+        0xc40, 0x1f7c403f,
+        0xc44, 0x000100b7,
+        0xc48, 0xec020107,
+        0xc4c, 0x007f037f,
+        0xc50, 0x69543420,
+        0xc54, 0x43bc0094,
+        0xc58, 0x69543420,
+        0xc5c, 0x433c0094,
+        0xc60, 0x00000000,
+        0xc64, 0x5116848b,
+        0xc68, 0x47c00bff,
+        0xc6c, 0x00000036,
+        0xc70, 0x2c7f000d,
+        0xc74, 0x018610db,
+        0xc78, 0x0000001f,
+        0xc7c, 0x00b91612,
+        0xc80, 0x40000100,
+        0xc84, 0x20f60000,
+        0xc88, 0x40000100,
+        0xc8c, 0x20200000,
+        0xc90, 0x00121820,
+        0xc94, 0x00000000,
+        0xc98, 0x00121820,
+        0xc9c, 0x00007f7f,
+        0xca0, 0x00000000,
+        0xca4, 0x00000080,
+        0xca8, 0x00000000,
+        0xcac, 0x00000000,
+        0xcb0, 0x00000000,
+        0xcb4, 0x00000000,
+        0xcb8, 0x00000000,
+        0xcbc, 0x28000000,
+        0xcc0, 0x00000000,
+        0xcc4, 0x00000000,
+        0xcc8, 0x00000000,
+        0xccc, 0x00000000,
+        0xcd0, 0x00000000,
+        0xcd4, 0x00000000,
+        0xcd8, 0x64b22427,
+        0xcdc, 0x00766932,
+        0xce0, 0x00222222,
+        0xce4, 0x00000000,
+        0xce8, 0x37644302,
+        0xcec, 0x2f97d40c,
+        0xd00, 0x00080740,
+        0xd04, 0x00020403,
+        0xd08, 0x0000907f,
+        0xd0c, 0x20010201,
+        0xd10, 0xa0633333,
+        0xd14, 0x3333bc43,
+        0xd18, 0x7a8f5b6b,
+        0xd2c, 0xcc979975,
+        0xd30, 0x00000000,
+        0xd34, 0x80608000,
+        0xd38, 0x00000000,
+        0xd3c, 0x00027293,
+        0xd40, 0x00000000,
+        0xd44, 0x00000000,
+        0xd48, 0x00000000,
+        0xd4c, 0x00000000,
+        0xd50, 0x6437140a,
+        0xd54, 0x00000000,
+        0xd58, 0x00000000,
+        0xd5c, 0x30032064,
+        0xd60, 0x4653de68,
+        0xd64, 0x04518a3c,
+        0xd68, 0x00002101,
+        0xd6c, 0x2a201c16,
+        0xd70, 0x1812362e,
+        0xd74, 0x322c2220,
+        0xd78, 0x000e3c24,
+        0xe00, 0x2a2a2a2a,
+        0xe04, 0x2a2a2a2a,
+        0xe08, 0x03902a2a,
+        0xe10, 0x2a2a2a2a,
+        0xe14, 0x2a2a2a2a,
+        0xe18, 0x2a2a2a2a,
+        0xe1c, 0x2a2a2a2a,
+        0xe28, 0x00000000,
+        0xe30, 0x1000dc1f,
+        0xe34, 0x10008c1f,
+        0xe38, 0x02140102,
+        0xe3c, 0x681604c2,
+        0xe40, 0x01007c00,
+        0xe44, 0x01004800,
+        0xe48, 0xfb000000,
+        0xe4c, 0x000028d1,
+        0xe50, 0x1000dc1f,
+        0xe54, 0x10008c1f,
+        0xe58, 0x02140102,
+        0xe5c, 0x28160d05,
+        0xe60, 0x00000010,
+        0xe68, 0x001b25a4,
+        0xe6c, 0x63db25a4,
+        0xe70, 0x63db25a4,
+        0xe74, 0x0c1b25a4,
+        0xe78, 0x0c1b25a4,
+        0xe7c, 0x0c1b25a4,
+        0xe80, 0x0c1b25a4,
+        0xe84, 0x63db25a4,
+        0xe88, 0x0c1b25a4,
+        0xe8c, 0x63db25a4,
+        0xed0, 0x63db25a4,
+        0xed4, 0x63db25a4,
+        0xed8, 0x63db25a4,
+        0xedc, 0x001b25a4,
+        0xee0, 0x001b25a4,
+        0xeec, 0x6fdb25a4,
+        0xf14, 0x00000003,
+        0xf4c, 0x00000000,
+        0xf00, 0x00000300,
+};
+
+u32 RTL8192CEPHY_REG_1TARRAY[PHY_REG_1TARRAY_LENGTH] = {
+        0x024, 0x0011800f,
+        0x028, 0x00ffdb83,
+        0x800, 0x80040000,
+        0x804, 0x00000001,
+        0x808, 0x0000fc00,
+        0x80c, 0x0000000a,
+        0x810, 0x10005388,
+        0x814, 0x020c3d10,
+        0x818, 0x02200385,
+        0x81c, 0x00000000,
+        0x820, 0x01000100,
+        0x824, 0x00390004,
+        0x828, 0x00000000,
+        0x82c, 0x00000000,
+        0x830, 0x00000000,
+        0x834, 0x00000000,
+        0x838, 0x00000000,
+        0x83c, 0x00000000,
+        0x840, 0x00010000,
+        0x844, 0x00000000,
+        0x848, 0x00000000,
+        0x84c, 0x00000000,
+        0x850, 0x00000000,
+        0x854, 0x00000000,
+        0x858, 0x569a569a,
+        0x85c, 0x001b25a4,
+        0x860, 0x66e60230,
+        0x864, 0x061f0130,
+        0x868, 0x00000000,
+        0x86c, 0x32323200,
+        0x870, 0x07000700,
+        0x874, 0x22004000,
+        0x878, 0x00000808,
+        0x87c, 0x00000000,
+        0x880, 0xc0083070,
+        0x884, 0x000004d5,
+        0x888, 0x00000000,
+        0x88c, 0xccc000c0,
+        0x890, 0x00000800,
+        0x894, 0xfffffffe,
+        0x898, 0x40302010,
+        0x89c, 0x00706050,
+        0x900, 0x00000000,
+        0x904, 0x00000023,
+        0x908, 0x00000000,
+        0x90c, 0x81121111,
+        0xa00, 0x00d047c8,
+        0xa04, 0x80ff000c,
+        0xa08, 0x8c838300,
+        0xa0c, 0x2e68120f,
+        0xa10, 0x9500bb78,
+        0xa14, 0x11144028,
+        0xa18, 0x00881117,
+        0xa1c, 0x89140f00,
+        0xa20, 0x1a1b0000,
+        0xa24, 0x090e1317,
+        0xa28, 0x00000204,
+        0xa2c, 0x00d30000,
+        0xa70, 0x101fbf00,
+        0xa74, 0x00000007,
+        0xc00, 0x48071d40,
+        0xc04, 0x03a05611,
+        0xc08, 0x000000e4,
+        0xc0c, 0x6c6c6c6c,
+        0xc10, 0x08800000,
+        0xc14, 0x40000100,
+        0xc18, 0x08800000,
+        0xc1c, 0x40000100,
+        0xc20, 0x00000000,
+        0xc24, 0x00000000,
+        0xc28, 0x00000000,
+        0xc2c, 0x00000000,
+        0xc30, 0x69e9ac44,
+        0xc34, 0x469652cf,
+        0xc38, 0x49795994,
+        0xc3c, 0x0a97971c,
+        0xc40, 0x1f7c403f,
+        0xc44, 0x000100b7,
+        0xc48, 0xec020107,
+        0xc4c, 0x007f037f,
+        0xc50, 0x69543420,
+        0xc54, 0x43bc0094,
+        0xc58, 0x69543420,
+        0xc5c, 0x433c0094,
+        0xc60, 0x00000000,
+        0xc64, 0x5116848b,
+        0xc68, 0x47c00bff,
+        0xc6c, 0x00000036,
+        0xc70, 0x2c7f000d,
+        0xc74, 0x018610db,
+        0xc78, 0x0000001f,
+        0xc7c, 0x00b91612,
+        0xc80, 0x40000100,
+        0xc84, 0x20f60000,
+        0xc88, 0x40000100,
+        0xc8c, 0x20200000,
+        0xc90, 0x00121820,
+        0xc94, 0x00000000,
+        0xc98, 0x00121820,
+        0xc9c, 0x00007f7f,
+        0xca0, 0x00000000,
+        0xca4, 0x00000080,
+        0xca8, 0x00000000,
+        0xcac, 0x00000000,
+        0xcb0, 0x00000000,
+        0xcb4, 0x00000000,
+        0xcb8, 0x00000000,
+        0xcbc, 0x28000000,
+        0xcc0, 0x00000000,
+        0xcc4, 0x00000000,
+        0xcc8, 0x00000000,
+        0xccc, 0x00000000,
+        0xcd0, 0x00000000,
+        0xcd4, 0x00000000,
+        0xcd8, 0x64b22427,
+        0xcdc, 0x00766932,
+        0xce0, 0x00222222,
+        0xce4, 0x00000000,
+        0xce8, 0x37644302,
+        0xcec, 0x2f97d40c,
+        0xd00, 0x00080740,
+        0xd04, 0x00020401,
+        0xd08, 0x0000907f,
+        0xd0c, 0x20010201,
+        0xd10, 0xa0633333,
+        0xd14, 0x3333bc43,
+        0xd18, 0x7a8f5b6b,
+        0xd2c, 0xcc979975,
+        0xd30, 0x00000000,
+        0xd34, 0x80608000,
+        0xd38, 0x00000000,
+        0xd3c, 0x00027293,
+        0xd40, 0x00000000,
+        0xd44, 0x00000000,
+        0xd48, 0x00000000,
+        0xd4c, 0x00000000,
+        0xd50, 0x6437140a,
+        0xd54, 0x00000000,
+        0xd58, 0x00000000,
+        0xd5c, 0x30032064,
+        0xd60, 0x4653de68,
+        0xd64, 0x04518a3c,
+        0xd68, 0x00002101,
+        0xd6c, 0x2a201c16,
+        0xd70, 0x1812362e,
+        0xd74, 0x322c2220,
+        0xd78, 0x000e3c24,
+        0xe00, 0x2a2a2a2a,
+        0xe04, 0x2a2a2a2a,
+        0xe08, 0x03902a2a,
+        0xe10, 0x2a2a2a2a,
+        0xe14, 0x2a2a2a2a,
+        0xe18, 0x2a2a2a2a,
+        0xe1c, 0x2a2a2a2a,
+        0xe28, 0x00000000,
+        0xe30, 0x1000dc1f,
+        0xe34, 0x10008c1f,
+        0xe38, 0x02140102,
+        0xe3c, 0x681604c2,
+        0xe40, 0x01007c00,
+        0xe44, 0x01004800,
+        0xe48, 0xfb000000,
+        0xe4c, 0x000028d1,
+        0xe50, 0x1000dc1f,
+        0xe54, 0x10008c1f,
+        0xe58, 0x02140102,
+        0xe5c, 0x28160d05,
+        0xe60, 0x00000010,
+        0xe68, 0x001b25a4,
+        0xe6c, 0x631b25a0,
+        0xe70, 0x631b25a0,
+        0xe74, 0x081b25a0,
+        0xe78, 0x081b25a0,
+        0xe7c, 0x081b25a0,
+        0xe80, 0x081b25a0,
+        0xe84, 0x631b25a0,
+        0xe88, 0x081b25a0,
+        0xe8c, 0x631b25a0,
+        0xed0, 0x631b25a0,
+        0xed4, 0x631b25a0,
+        0xed8, 0x631b25a0,
+        0xedc, 0x001b25a0,
+        0xee0, 0x001b25a0,
+        0xeec, 0x6b1b25a0,
+        0xf14, 0x00000003,
+        0xf4c, 0x00000000,
+        0xf00, 0x00000300,
+};
+
+u32 RTL8192CEPHY_REG_ARRAY_PG[PHY_REG_ARRAY_PGLENGTH] = {
+        0xe00, 0xffffffff, 0x0a0c0c0c,
+        0xe04, 0xffffffff, 0x02040608,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x0a0c0d0e,
+        0xe14, 0xffffffff, 0x02040608,
+        0xe18, 0xffffffff, 0x0a0c0d0e,
+        0xe1c, 0xffffffff, 0x02040608,
+        0x830, 0xffffffff, 0x0a0c0c0c,
+        0x834, 0xffffffff, 0x02040608,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x0a0c0d0e,
+        0x848, 0xffffffff, 0x02040608,
+        0x84c, 0xffffffff, 0x0a0c0d0e,
+        0x868, 0xffffffff, 0x02040608,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x04040404,
+        0xe04, 0xffffffff, 0x00020204,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x06060606,
+        0xe14, 0xffffffff, 0x00020406,
+        0xe18, 0xffffffff, 0x06060606,
+        0xe1c, 0xffffffff, 0x00020406,
+        0x830, 0xffffffff, 0x04040404,
+        0x834, 0xffffffff, 0x00020204,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x06060606,
+        0x848, 0xffffffff, 0x00020406,
+        0x84c, 0xffffffff, 0x06060606,
+        0x868, 0xffffffff, 0x00020406,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+};
+
+u32 RTL8192CERADIOA_2TARRAY[RADIOA_2TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb0,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x019, 0x00000000,
+        0x01a, 0x00010255,
+        0x01b, 0x00060a00,
+        0x01c, 0x000fc378,
+        0x01d, 0x000a1250,
+        0x01e, 0x0004445f,
+        0x01f, 0x00080001,
+        0x020, 0x0000b614,
+        0x021, 0x0006c000,
+        0x022, 0x00000000,
+        0x023, 0x00001558,
+        0x024, 0x00000060,
+        0x025, 0x00000483,
+        0x026, 0x0004f000,
+        0x027, 0x000ec7d9,
+        0x028, 0x000977c0,
+        0x029, 0x00004783,
+        0x02a, 0x00000001,
+        0x02b, 0x00021334,
+        0x02a, 0x00000000,
+        0x02b, 0x00000054,
+        0x02a, 0x00000001,
+        0x02b, 0x00000808,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000c,
+        0x02a, 0x00000002,
+        0x02b, 0x00000808,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000003,
+        0x02b, 0x00000808,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000004,
+        0x02b, 0x00000808,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000005,
+        0x02b, 0x00000808,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000006,
+        0x02b, 0x00000709,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000007,
+        0x02b, 0x00000709,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000008,
+        0x02b, 0x0000060a,
+        0x02b, 0x0004b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000009,
+        0x02b, 0x0000060a,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000a,
+        0x02b, 0x0000060a,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000b,
+        0x02b, 0x0000060a,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000c,
+        0x02b, 0x0000060a,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000d,
+        0x02b, 0x0000060a,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000e,
+        0x02b, 0x0000050b,
+        0x02b, 0x00066666,
+        0x02c, 0x0000001a,
+        0x02a, 0x000e0000,
+        0x010, 0x0004000f,
+        0x011, 0x000e31fc,
+        0x010, 0x0006000f,
+        0x011, 0x000ff9f8,
+        0x010, 0x0002000f,
+        0x011, 0x000203f9,
+        0x010, 0x0003000f,
+        0x011, 0x000ff500,
+        0x010, 0x00000000,
+        0x011, 0x00000000,
+        0x010, 0x0008000f,
+        0x011, 0x0003f100,
+        0x010, 0x0009000f,
+        0x011, 0x00023100,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287af,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x00014297,
+        0x013, 0x00010295,
+        0x013, 0x0000c298,
+        0x013, 0x0000819c,
+        0x013, 0x000040a8,
+        0x013, 0x0000001c,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f424,
+        0x015, 0x0004f424,
+        0x015, 0x0008f424,
+        0x015, 0x000cf424,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+        0x000, 0x00010159,
+        0x018, 0x0000f401,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01f, 0x00080003,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01e, 0x00044457,
+        0x01f, 0x00080000,
+        0x000, 0x00030159,
+};
+
+u32 RTL8192CE_RADIOB_2TARRAY[RADIOB_2TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb0,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287af,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x00014297,
+        0x013, 0x00010295,
+        0x013, 0x0000c298,
+        0x013, 0x0000819c,
+        0x013, 0x000040a8,
+        0x013, 0x0000001c,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f424,
+        0x015, 0x0004f424,
+        0x015, 0x0008f424,
+        0x015, 0x000cf424,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+};
+
+u32 RTL8192CE_RADIOA_1TARRAY[RADIOA_1TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb0,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x019, 0x00000000,
+        0x01a, 0x00010255,
+        0x01b, 0x00060a00,
+        0x01c, 0x000fc378,
+        0x01d, 0x000a1250,
+        0x01e, 0x0004445f,
+        0x01f, 0x00080001,
+        0x020, 0x0000b614,
+        0x021, 0x0006c000,
+        0x022, 0x00000000,
+        0x023, 0x00001558,
+        0x024, 0x00000060,
+        0x025, 0x00000483,
+        0x026, 0x0004f000,
+        0x027, 0x000ec7d9,
+        0x028, 0x000977c0,
+        0x029, 0x00004783,
+        0x02a, 0x00000001,
+        0x02b, 0x00021334,
+        0x02a, 0x00000000,
+        0x02b, 0x00000054,
+        0x02a, 0x00000001,
+        0x02b, 0x00000808,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000c,
+        0x02a, 0x00000002,
+        0x02b, 0x00000808,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000003,
+        0x02b, 0x00000808,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000004,
+        0x02b, 0x00000808,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000005,
+        0x02b, 0x00000808,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000006,
+        0x02b, 0x00000709,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000007,
+        0x02b, 0x00000709,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000008,
+        0x02b, 0x0000060a,
+        0x02b, 0x0004b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000009,
+        0x02b, 0x0000060a,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000a,
+        0x02b, 0x0000060a,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000b,
+        0x02b, 0x0000060a,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000c,
+        0x02b, 0x0000060a,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000d,
+        0x02b, 0x0000060a,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000e,
+        0x02b, 0x0000050b,
+        0x02b, 0x00066666,
+        0x02c, 0x0000001a,
+        0x02a, 0x000e0000,
+        0x010, 0x0004000f,
+        0x011, 0x000e31fc,
+        0x010, 0x0006000f,
+        0x011, 0x000ff9f8,
+        0x010, 0x0002000f,
+        0x011, 0x000203f9,
+        0x010, 0x0003000f,
+        0x011, 0x000ff500,
+        0x010, 0x00000000,
+        0x011, 0x00000000,
+        0x010, 0x0008000f,
+        0x011, 0x0003f100,
+        0x010, 0x0009000f,
+        0x011, 0x00023100,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287af,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x00014297,
+        0x013, 0x00010295,
+        0x013, 0x0000c298,
+        0x013, 0x0000819c,
+        0x013, 0x000040a8,
+        0x013, 0x0000001c,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f424,
+        0x015, 0x0004f424,
+        0x015, 0x0008f424,
+        0x015, 0x000cf424,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+        0x000, 0x00010159,
+        0x018, 0x0000f401,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01f, 0x00080003,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01e, 0x00044457,
+        0x01f, 0x00080000,
+        0x000, 0x00030159,
+};
+
+u32 RTL8192CE_RADIOB_1TARRAY[RADIOB_1TARRAYLENGTH] = {
+        0x0,
+};
+
+u32 RTL8192CEMAC_2T_ARRAY[MAC_2T_ARRAYLENGTH] = {
+        0x420, 0x00000080,
+        0x423, 0x00000000,
+        0x430, 0x00000000,
+        0x431, 0x00000000,
+        0x432, 0x00000000,
+        0x433, 0x00000001,
+        0x434, 0x00000004,
+        0x435, 0x00000005,
+        0x436, 0x00000006,
+        0x437, 0x00000007,
+        0x438, 0x00000000,
+        0x439, 0x00000000,
+        0x43a, 0x00000000,
+        0x43b, 0x00000001,
+        0x43c, 0x00000004,
+        0x43d, 0x00000005,
+        0x43e, 0x00000006,
+        0x43f, 0x00000007,
+        0x440, 0x0000005d,
+        0x441, 0x00000001,
+        0x442, 0x00000000,
+        0x444, 0x00000015,
+        0x445, 0x000000f0,
+        0x446, 0x0000000f,
+        0x447, 0x00000000,
+        0x458, 0x00000041,
+        0x459, 0x000000a8,
+        0x45a, 0x00000072,
+        0x45b, 0x000000b9,
+        0x460, 0x00000088,
+        0x461, 0x00000088,
+        0x462, 0x00000006,
+        0x463, 0x00000003,
+        0x4c8, 0x00000004,
+        0x4c9, 0x00000008,
+        0x4cc, 0x00000002,
+        0x4cd, 0x00000028,
+        0x4ce, 0x00000001,
+        0x500, 0x00000026,
+        0x501, 0x000000a2,
+        0x502, 0x0000002f,
+        0x503, 0x00000000,
+        0x504, 0x00000028,
+        0x505, 0x000000a3,
+        0x506, 0x0000005e,
+        0x507, 0x00000000,
+        0x508, 0x0000002b,
+        0x509, 0x000000a4,
+        0x50a, 0x0000005e,
+        0x50b, 0x00000000,
+        0x50c, 0x0000004f,
+        0x50d, 0x000000a4,
+        0x50e, 0x00000000,
+        0x50f, 0x00000000,
+        0x512, 0x0000001c,
+        0x514, 0x0000000a,
+        0x515, 0x00000010,
+        0x516, 0x0000000a,
+        0x517, 0x00000010,
+        0x51a, 0x00000016,
+        0x524, 0x0000000f,
+        0x525, 0x0000004f,
+        0x546, 0x00000020,
+        0x547, 0x00000000,
+        0x559, 0x00000002,
+        0x55a, 0x00000002,
+        0x55d, 0x000000ff,
+        0x605, 0x00000030,
+        0x608, 0x0000000e,
+        0x609, 0x0000002a,
+        0x652, 0x00000020,
+        0x63c, 0x0000000a,
+        0x63d, 0x0000000a,
+        0x700, 0x00000021,
+        0x701, 0x00000043,
+        0x702, 0x00000065,
+        0x703, 0x00000087,
+        0x708, 0x00000021,
+        0x709, 0x00000043,
+        0x70a, 0x00000065,
+        0x70b, 0x00000087,
+};
+
+u32 RTL8192CEAGCTAB_2TARRAY[AGCTAB_2TARRAYLENGTH] = {
+        0xc78, 0x7b000001,
+        0xc78, 0x7b010001,
+        0xc78, 0x7b020001,
+        0xc78, 0x7b030001,
+        0xc78, 0x7b040001,
+        0xc78, 0x7b050001,
+        0xc78, 0x7a060001,
+        0xc78, 0x79070001,
+        0xc78, 0x78080001,
+        0xc78, 0x77090001,
+        0xc78, 0x760a0001,
+        0xc78, 0x750b0001,
+        0xc78, 0x740c0001,
+        0xc78, 0x730d0001,
+        0xc78, 0x720e0001,
+        0xc78, 0x710f0001,
+        0xc78, 0x70100001,
+        0xc78, 0x6f110001,
+        0xc78, 0x6e120001,
+        0xc78, 0x6d130001,
+        0xc78, 0x6c140001,
+        0xc78, 0x6b150001,
+        0xc78, 0x6a160001,
+        0xc78, 0x69170001,
+        0xc78, 0x68180001,
+        0xc78, 0x67190001,
+        0xc78, 0x661a0001,
+        0xc78, 0x651b0001,
+        0xc78, 0x641c0001,
+        0xc78, 0x631d0001,
+        0xc78, 0x621e0001,
+        0xc78, 0x611f0001,
+        0xc78, 0x60200001,
+        0xc78, 0x49210001,
+        0xc78, 0x48220001,
+        0xc78, 0x47230001,
+        0xc78, 0x46240001,
+        0xc78, 0x45250001,
+        0xc78, 0x44260001,
+        0xc78, 0x43270001,
+        0xc78, 0x42280001,
+        0xc78, 0x41290001,
+        0xc78, 0x402a0001,
+        0xc78, 0x262b0001,
+        0xc78, 0x252c0001,
+        0xc78, 0x242d0001,
+        0xc78, 0x232e0001,
+        0xc78, 0x222f0001,
+        0xc78, 0x21300001,
+        0xc78, 0x20310001,
+        0xc78, 0x06320001,
+        0xc78, 0x05330001,
+        0xc78, 0x04340001,
+        0xc78, 0x03350001,
+        0xc78, 0x02360001,
+        0xc78, 0x01370001,
+        0xc78, 0x00380001,
+        0xc78, 0x00390001,
+        0xc78, 0x003a0001,
+        0xc78, 0x003b0001,
+        0xc78, 0x003c0001,
+        0xc78, 0x003d0001,
+        0xc78, 0x003e0001,
+        0xc78, 0x003f0001,
+        0xc78, 0x7b400001,
+        0xc78, 0x7b410001,
+        0xc78, 0x7b420001,
+        0xc78, 0x7b430001,
+        0xc78, 0x7b440001,
+        0xc78, 0x7b450001,
+        0xc78, 0x7a460001,
+        0xc78, 0x79470001,
+        0xc78, 0x78480001,
+        0xc78, 0x77490001,
+        0xc78, 0x764a0001,
+        0xc78, 0x754b0001,
+        0xc78, 0x744c0001,
+        0xc78, 0x734d0001,
+        0xc78, 0x724e0001,
+        0xc78, 0x714f0001,
+        0xc78, 0x70500001,
+        0xc78, 0x6f510001,
+        0xc78, 0x6e520001,
+        0xc78, 0x6d530001,
+        0xc78, 0x6c540001,
+        0xc78, 0x6b550001,
+        0xc78, 0x6a560001,
+        0xc78, 0x69570001,
+        0xc78, 0x68580001,
+        0xc78, 0x67590001,
+        0xc78, 0x665a0001,
+        0xc78, 0x655b0001,
+        0xc78, 0x645c0001,
+        0xc78, 0x635d0001,
+        0xc78, 0x625e0001,
+        0xc78, 0x615f0001,
+        0xc78, 0x60600001,
+        0xc78, 0x49610001,
+        0xc78, 0x48620001,
+        0xc78, 0x47630001,
+        0xc78, 0x46640001,
+        0xc78, 0x45650001,
+        0xc78, 0x44660001,
+        0xc78, 0x43670001,
+        0xc78, 0x42680001,
+        0xc78, 0x41690001,
+        0xc78, 0x406a0001,
+        0xc78, 0x266b0001,
+        0xc78, 0x256c0001,
+        0xc78, 0x246d0001,
+        0xc78, 0x236e0001,
+        0xc78, 0x226f0001,
+        0xc78, 0x21700001,
+        0xc78, 0x20710001,
+        0xc78, 0x06720001,
+        0xc78, 0x05730001,
+        0xc78, 0x04740001,
+        0xc78, 0x03750001,
+        0xc78, 0x02760001,
+        0xc78, 0x01770001,
+        0xc78, 0x00780001,
+        0xc78, 0x00790001,
+        0xc78, 0x007a0001,
+        0xc78, 0x007b0001,
+        0xc78, 0x007c0001,
+        0xc78, 0x007d0001,
+        0xc78, 0x007e0001,
+        0xc78, 0x007f0001,
+        0xc78, 0x3800001e,
+        0xc78, 0x3801001e,
+        0xc78, 0x3802001e,
+        0xc78, 0x3803001e,
+        0xc78, 0x3804001e,
+        0xc78, 0x3805001e,
+        0xc78, 0x3806001e,
+        0xc78, 0x3807001e,
+        0xc78, 0x3808001e,
+        0xc78, 0x3c09001e,
+        0xc78, 0x3e0a001e,
+        0xc78, 0x400b001e,
+        0xc78, 0x440c001e,
+        0xc78, 0x480d001e,
+        0xc78, 0x4c0e001e,
+        0xc78, 0x500f001e,
+        0xc78, 0x5210001e,
+        0xc78, 0x5611001e,
+        0xc78, 0x5a12001e,
+        0xc78, 0x5e13001e,
+        0xc78, 0x6014001e,
+        0xc78, 0x6015001e,
+        0xc78, 0x6016001e,
+        0xc78, 0x6217001e,
+        0xc78, 0x6218001e,
+        0xc78, 0x6219001e,
+        0xc78, 0x621a001e,
+        0xc78, 0x621b001e,
+        0xc78, 0x621c001e,
+        0xc78, 0x621d001e,
+        0xc78, 0x621e001e,
+        0xc78, 0x621f001e,
+};
+
+u32 RTL8192CEAGCTAB_1TARRAY[AGCTAB_1TARRAYLENGTH] = {
+        0xc78, 0x7b000001,
+        0xc78, 0x7b010001,
+        0xc78, 0x7b020001,
+        0xc78, 0x7b030001,
+        0xc78, 0x7b040001,
+        0xc78, 0x7b050001,
+        0xc78, 0x7a060001,
+        0xc78, 0x79070001,
+        0xc78, 0x78080001,
+        0xc78, 0x77090001,
+        0xc78, 0x760a0001,
+        0xc78, 0x750b0001,
+        0xc78, 0x740c0001,
+        0xc78, 0x730d0001,
+        0xc78, 0x720e0001,
+        0xc78, 0x710f0001,
+        0xc78, 0x70100001,
+        0xc78, 0x6f110001,
+        0xc78, 0x6e120001,
+        0xc78, 0x6d130001,
+        0xc78, 0x6c140001,
+        0xc78, 0x6b150001,
+        0xc78, 0x6a160001,
+        0xc78, 0x69170001,
+        0xc78, 0x68180001,
+        0xc78, 0x67190001,
+        0xc78, 0x661a0001,
+        0xc78, 0x651b0001,
+        0xc78, 0x641c0001,
+        0xc78, 0x631d0001,
+        0xc78, 0x621e0001,
+        0xc78, 0x611f0001,
+        0xc78, 0x60200001,
+        0xc78, 0x49210001,
+        0xc78, 0x48220001,
+        0xc78, 0x47230001,
+        0xc78, 0x46240001,
+        0xc78, 0x45250001,
+        0xc78, 0x44260001,
+        0xc78, 0x43270001,
+        0xc78, 0x42280001,
+        0xc78, 0x41290001,
+        0xc78, 0x402a0001,
+        0xc78, 0x262b0001,
+        0xc78, 0x252c0001,
+        0xc78, 0x242d0001,
+        0xc78, 0x232e0001,
+        0xc78, 0x222f0001,
+        0xc78, 0x21300001,
+        0xc78, 0x20310001,
+        0xc78, 0x06320001,
+        0xc78, 0x05330001,
+        0xc78, 0x04340001,
+        0xc78, 0x03350001,
+        0xc78, 0x02360001,
+        0xc78, 0x01370001,
+        0xc78, 0x00380001,
+        0xc78, 0x00390001,
+        0xc78, 0x003a0001,
+        0xc78, 0x003b0001,
+        0xc78, 0x003c0001,
+        0xc78, 0x003d0001,
+        0xc78, 0x003e0001,
+        0xc78, 0x003f0001,
+        0xc78, 0x7b400001,
+        0xc78, 0x7b410001,
+        0xc78, 0x7b420001,
+        0xc78, 0x7b430001,
+        0xc78, 0x7b440001,
+        0xc78, 0x7b450001,
+        0xc78, 0x7a460001,
+        0xc78, 0x79470001,
+        0xc78, 0x78480001,
+        0xc78, 0x77490001,
+        0xc78, 0x764a0001,
+        0xc78, 0x754b0001,
+        0xc78, 0x744c0001,
+        0xc78, 0x734d0001,
+        0xc78, 0x724e0001,
+        0xc78, 0x714f0001,
+        0xc78, 0x70500001,
+        0xc78, 0x6f510001,
+        0xc78, 0x6e520001,
+        0xc78, 0x6d530001,
+        0xc78, 0x6c540001,
+        0xc78, 0x6b550001,
+        0xc78, 0x6a560001,
+        0xc78, 0x69570001,
+        0xc78, 0x68580001,
+        0xc78, 0x67590001,
+        0xc78, 0x665a0001,
+        0xc78, 0x655b0001,
+        0xc78, 0x645c0001,
+        0xc78, 0x635d0001,
+        0xc78, 0x625e0001,
+        0xc78, 0x615f0001,
+        0xc78, 0x60600001,
+        0xc78, 0x49610001,
+        0xc78, 0x48620001,
+        0xc78, 0x47630001,
+        0xc78, 0x46640001,
+        0xc78, 0x45650001,
+        0xc78, 0x44660001,
+        0xc78, 0x43670001,
+        0xc78, 0x42680001,
+        0xc78, 0x41690001,
+        0xc78, 0x406a0001,
+        0xc78, 0x266b0001,
+        0xc78, 0x256c0001,
+        0xc78, 0x246d0001,
+        0xc78, 0x236e0001,
+        0xc78, 0x226f0001,
+        0xc78, 0x21700001,
+        0xc78, 0x20710001,
+        0xc78, 0x06720001,
+        0xc78, 0x05730001,
+        0xc78, 0x04740001,
+        0xc78, 0x03750001,
+        0xc78, 0x02760001,
+        0xc78, 0x01770001,
+        0xc78, 0x00780001,
+        0xc78, 0x00790001,
+        0xc78, 0x007a0001,
+        0xc78, 0x007b0001,
+        0xc78, 0x007c0001,
+        0xc78, 0x007d0001,
+        0xc78, 0x007e0001,
+        0xc78, 0x007f0001,
+        0xc78, 0x3800001e,
+        0xc78, 0x3801001e,
+        0xc78, 0x3802001e,
+        0xc78, 0x3803001e,
+        0xc78, 0x3804001e,
+        0xc78, 0x3805001e,
+        0xc78, 0x3806001e,
+        0xc78, 0x3807001e,
+        0xc78, 0x3808001e,
+        0xc78, 0x3c09001e,
+        0xc78, 0x3e0a001e,
+        0xc78, 0x400b001e,
+        0xc78, 0x440c001e,
+        0xc78, 0x480d001e,
+        0xc78, 0x4c0e001e,
+        0xc78, 0x500f001e,
+        0xc78, 0x5210001e,
+        0xc78, 0x5611001e,
+        0xc78, 0x5a12001e,
+        0xc78, 0x5e13001e,
+        0xc78, 0x6014001e,
+        0xc78, 0x6015001e,
+        0xc78, 0x6016001e,
+        0xc78, 0x6217001e,
+        0xc78, 0x6218001e,
+        0xc78, 0x6219001e,
+        0xc78, 0x621a001e,
+        0xc78, 0x621b001e,
+        0xc78, 0x621c001e,
+        0xc78, 0x621d001e,
+        0xc78, 0x621e001e,
+        0xc78, 0x621f001e,
+};
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/table.h b/drivers/net/wireless/rtlwifi/rtl8192ce/table.h
new file mode 100644
index 000000000000..3a6e8b6aeee0
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/table.h
@@ -0,0 +1,58 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Created on  2010/ 5/18,  1:41
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CE_TABLE__H_
+#define __RTL92CE_TABLE__H_
+
+#include <linux/types.h>
+
+#define PHY_REG_2TARRAY_LENGTH  374
+extern u32 RTL8192CEPHY_REG_2TARRAY[PHY_REG_2TARRAY_LENGTH];
+#define PHY_REG_1TARRAY_LENGTH  374
+extern u32 RTL8192CEPHY_REG_1TARRAY[PHY_REG_1TARRAY_LENGTH];
+#define PHY_REG_ARRAY_PGLENGTH  192
+extern u32 RTL8192CEPHY_REG_ARRAY_PG[PHY_REG_ARRAY_PGLENGTH];
+#define RADIOA_2TARRAYLENGTH    282
+extern u32 RTL8192CERADIOA_2TARRAY[RADIOA_2TARRAYLENGTH];
+#define RADIOB_2TARRAYLENGTH    78
+extern u32 RTL8192CE_RADIOB_2TARRAY[RADIOB_2TARRAYLENGTH];
+#define RADIOA_1TARRAYLENGTH    282
+extern u32 RTL8192CE_RADIOA_1TARRAY[RADIOA_1TARRAYLENGTH];
+#define RADIOB_1TARRAYLENGTH    1
+extern u32 RTL8192CE_RADIOB_1TARRAY[RADIOB_1TARRAYLENGTH];
+#define MAC_2T_ARRAYLENGTH      162
+extern u32 RTL8192CEMAC_2T_ARRAY[MAC_2T_ARRAYLENGTH];
+#define AGCTAB_2TARRAYLENGTH    320
+extern u32 RTL8192CEAGCTAB_2TARRAY[AGCTAB_2TARRAYLENGTH];
+#define AGCTAB_1TARRAYLENGTH    320
+extern u32 RTL8192CEAGCTAB_1TARRAY[AGCTAB_1TARRAYLENGTH];
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
new file mode 100644
index 000000000000..bf5852f2d634
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
@@ -0,0 +1,1031 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../pci.h"
+#include "../base.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "trx.h"
+#include "led.h"
+
+static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(u16 fc,
+                                                          unsigned int
+                                                          skb_queue)
+{
+        enum rtl_desc_qsel qsel;
+
+        if (unlikely(ieee80211_is_beacon(fc))) {
+                qsel = QSLT_BEACON;
+                return qsel;
+        }
+
+        if (ieee80211_is_mgmt(fc)) {
+                qsel = QSLT_MGNT;
+                return qsel;
+        }
+
+        switch (skb_queue) {
+        case VO_QUEUE:
+                qsel = QSLT_VO;
+                break;
+        case VI_QUEUE:
+                qsel = QSLT_VI;
+                break;
+        case BE_QUEUE:
+                qsel = QSLT_BE;
+                break;
+        case BK_QUEUE:
+                qsel = QSLT_BK;
+                break;
+        default:
+                qsel = QSLT_BE;
+                RT_ASSERT(false, ("BE queue, skb_queue:%d,"
+                                  " set qsel = 0x%X\n", skb_queue, QSLT_BE));
+                break;
+        }
+        return qsel;
+}
+
+static int _rtl92ce_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu)
+{
+        int rate_idx;
+
+        if (first_ampdu) {
+                if (false == isht) {
+                        switch (desc_rate) {
+                        case DESC92C_RATE1M:
+                                rate_idx = 0;
+                                break;
+                        case DESC92C_RATE2M:
+                                rate_idx = 1;
+                                break;
+                        case DESC92C_RATE5_5M:
+                                rate_idx = 2;
+                                break;
+                        case DESC92C_RATE11M:
+                                rate_idx = 3;
+                                break;
+                        case DESC92C_RATE6M:
+                                rate_idx = 4;
+                                break;
+                        case DESC92C_RATE9M:
+                                rate_idx = 5;
+                                break;
+                        case DESC92C_RATE12M:
+                                rate_idx = 6;
+                                break;
+                        case DESC92C_RATE18M:
+                                rate_idx = 7;
+                                break;
+                        case DESC92C_RATE24M:
+                                rate_idx = 8;
+                                break;
+                        case DESC92C_RATE36M:
+                                rate_idx = 9;
+                                break;
+                        case DESC92C_RATE48M:
+                                rate_idx = 10;
+                                break;
+                        case DESC92C_RATE54M:
+                                rate_idx = 11;
+                                break;
+                        default:
+                                rate_idx = 0;
+                                break;
+                        }
+                } else {
+                        rate_idx = 11;
+                }
+
+                return rate_idx;
+        }
+
+        switch (desc_rate) {
+        case DESC92C_RATE1M:
+                rate_idx = 0;
+                break;
+        case DESC92C_RATE2M:
+                rate_idx = 1;
+                break;
+        case DESC92C_RATE5_5M:
+                rate_idx = 2;
+                break;
+        case DESC92C_RATE11M:
+                rate_idx = 3;
+                break;
+        case DESC92C_RATE6M:
+                rate_idx = 4;
+                break;
+        case DESC92C_RATE9M:
+                rate_idx = 5;
+                break;
+        case DESC92C_RATE12M:
+                rate_idx = 6;
+                break;
+        case DESC92C_RATE18M:
+                rate_idx = 7;
+                break;
+        case DESC92C_RATE24M:
+                rate_idx = 8;
+                break;
+        case DESC92C_RATE36M:
+                rate_idx = 9;
+                break;
+        case DESC92C_RATE48M:
+                rate_idx = 10;
+                break;
+        case DESC92C_RATE54M:
+                rate_idx = 11;
+                break;
+        default:
+                rate_idx = 11;
+                break;
+        }
+        return rate_idx;
+}
+
+static u8 _rtl92c_query_rxpwrpercentage(char antpower)
+{
+        if ((antpower <= -100) || (antpower >= 20))
+                return 0;
+        else if (antpower >= 0)
+                return 100;
+        else
+                return 100 + antpower;
+}
+
+static u8 _rtl92c_evm_db_to_percentage(char value)
+{
+        char ret_val;
+        ret_val = value;
+
+        if (ret_val >= 0)
+                ret_val = 0;
+
+        if (ret_val <= -33)
+                ret_val = -33;
+
+        ret_val = 0 - ret_val;
+        ret_val *= 3;
+
+        if (ret_val == 99)
+                ret_val = 100;
+
+        return ret_val;
+}
+
+static long _rtl92ce_translate_todbm(struct ieee80211_hw *hw,
+                                     u8 signal_strength_index)
+{
+        long signal_power;
+
+        signal_power = (long)((signal_strength_index + 1) >> 1);
+        signal_power -= 95;
+        return signal_power;
+}
+
+static long _rtl92ce_signal_scale_mapping(struct ieee80211_hw *hw,
+                long currsig)
+{
+        long retsig;
+
+        if (currsig >= 61 && currsig <= 100)
+                retsig = 90 + ((currsig - 60) / 4);
+        else if (currsig >= 41 && currsig <= 60)
+                retsig = 78 + ((currsig - 40) / 2);
+        else if (currsig >= 31 && currsig <= 40)
+                retsig = 66 + (currsig - 30);
+        else if (currsig >= 21 && currsig <= 30)
+                retsig = 54 + (currsig - 20);
+        else if (currsig >= 5 && currsig <= 20)
+                retsig = 42 + (((currsig - 5) * 2) / 3);
+        else if (currsig == 4)
+                retsig = 36;
+        else if (currsig == 3)
+                retsig = 27;
+        else if (currsig == 2)
+                retsig = 18;
+        else if (currsig == 1)
+                retsig = 9;
+        else
+                retsig = currsig;
+
+        return retsig;
+}
+
+static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
+                                       struct rtl_stats *pstats,
+                                       struct rx_desc_92c *pdesc,
+                                       struct rx_fwinfo_92c *p_drvinfo,
+                                       bool bpacket_match_bssid,
+                                       bool bpacket_toself,
+                                       bool b_packet_beacon)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct phy_sts_cck_8192s_t *cck_buf;
+        s8 rx_pwr_all, rx_pwr[4];
+        u8 rf_rx_num, evm, pwdb_all;
+        u8 i, max_spatial_stream;
+        u32 rssi, total_rssi;
+        bool is_cck_rate;
+
+        is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
+        pstats->b_packet_matchbssid = bpacket_match_bssid;
+        pstats->b_packet_toself = bpacket_toself;
+        pstats->b_is_cck = is_cck_rate;
+        pstats->b_packet_beacon = b_packet_beacon;
+        pstats->b_is_cck = is_cck_rate;
+        pstats->rx_mimo_signalquality[0] = -1;
+        pstats->rx_mimo_signalquality[1] = -1;
+
+        if (is_cck_rate) {
+                u8 report, cck_highpwr;
+                cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
+
+                cck_highpwr = (u8) rtl_get_bbreg(hw,
+                                         RFPGA0_XA_HSSIPARAMETER2,
+                                         BIT(9));
+                if (!cck_highpwr) {
+                        u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+                        report = cck_buf->cck_agc_rpt & 0xc0;
+                        report = report >> 6;
+                        switch (report) {
+                        case 0x3:
+                                rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x2:
+                                rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x1:
+                                rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x0:
+                                rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
+                                break;
+                        }
+                } else {
+                        u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+                        report = p_drvinfo->cfosho[0] & 0x60;
+                        report = report >> 5;
+                        switch (report) {
+                        case 0x3:
+                                rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x2:
+                                rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x1:
+                                rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x0:
+                                rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        }
+                }
+
+                pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
+                pstats->rx_pwdb_all = pwdb_all;
+                pstats->recvsignalpower = rx_pwr_all;
+
+                if (bpacket_match_bssid) {
+                        u8 sq;
+                        if (pstats->rx_pwdb_all > 40)
+                                sq = 100;
+                        else {
+                                sq = cck_buf->sq_rpt;
+                                if (sq > 64)
+                                        sq = 0;
+                                else if (sq < 20)
+                                        sq = 100;
+                                else
+                                        sq = ((64 - sq) * 100) / 44;
+                        }
+
+                        pstats->signalquality = sq;
+                        pstats->rx_mimo_signalquality[0] = sq;
+                        pstats->rx_mimo_signalquality[1] = -1;
+                }
+        } else {
+                rtlpriv->dm.brfpath_rxenable[0] =
+                    rtlpriv->dm.brfpath_rxenable[1] = true;
+                for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
+                        if (rtlpriv->dm.brfpath_rxenable[i])
+                                rf_rx_num++;
+
+                        rx_pwr[i] =
+                            ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
+                        rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
+                        total_rssi += rssi;
+                        rtlpriv->stats.rx_snr_db[i] =
+                            (long)(p_drvinfo->rxsnr[i] / 2);
+
+                        if (bpacket_match_bssid)
+                                pstats->rx_mimo_signalstrength[i] = (u8) rssi;
+                }
+
+                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
+                pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
+                pstats->rx_pwdb_all = pwdb_all;
+                pstats->rxpower = rx_pwr_all;
+                pstats->recvsignalpower = rx_pwr_all;
+
+                if (pdesc->rxht && pdesc->rxmcs >= DESC92C_RATEMCS8 &&
+                    pdesc->rxmcs <= DESC92C_RATEMCS15)
+                        max_spatial_stream = 2;
+                else
+                        max_spatial_stream = 1;
+
+                for (i = 0; i < max_spatial_stream; i++) {
+                        evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
+
+                        if (bpacket_match_bssid) {
+                                if (i == 0)
+                                        pstats->signalquality =
+                                            (u8) (evm & 0xff);
+                                pstats->rx_mimo_signalquality[i] =
+                                    (u8) (evm & 0xff);
+                        }
+                }
+        }
+
+        if (is_cck_rate)
+                pstats->signalstrength =
+                    (u8) (_rtl92ce_signal_scale_mapping(hw, pwdb_all));
+        else if (rf_rx_num != 0)
+                pstats->signalstrength =
+                    (u8) (_rtl92ce_signal_scale_mapping
+                          (hw, total_rssi /= rf_rx_num));
+}
+
+static void _rtl92ce_process_ui_rssi(struct ieee80211_hw *hw,
+                struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u8 rfpath;
+        u32 last_rssi, tmpval;
+
+        if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+                rtlpriv->stats.rssi_calculate_cnt++;
+
+                if (rtlpriv->stats.ui_rssi.total_num++ >=
+                    PHY_RSSI_SLID_WIN_MAX) {
+                        rtlpriv->stats.ui_rssi.total_num =
+                            PHY_RSSI_SLID_WIN_MAX;
+                        last_rssi =
+                            rtlpriv->stats.ui_rssi.elements[rtlpriv->
+                                                    stats.ui_rssi.index];
+                        rtlpriv->stats.ui_rssi.total_val -= last_rssi;
+                }
+
+                rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
+                rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
+                                                index++] =
+                    pstats->signalstrength;
+
+                if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
+                        rtlpriv->stats.ui_rssi.index = 0;
+
+                tmpval = rtlpriv->stats.ui_rssi.total_val /
+                    rtlpriv->stats.ui_rssi.total_num;
+                rtlpriv->stats.signal_strength =
+                    _rtl92ce_translate_todbm(hw, (u8) tmpval);
+                pstats->rssi = rtlpriv->stats.signal_strength;
+        }
+
+        if (!pstats->b_is_cck && pstats->b_packet_toself) {
+                for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
+                     rfpath++) {
+
+                        if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
+                                continue;
+
+                        if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    pstats->rx_mimo_signalstrength[rfpath];
+
+                        }
+
+                        if (pstats->rx_mimo_signalstrength[rfpath] >
+                            rtlpriv->stats.rx_rssi_percentage[rfpath]) {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    ((rtlpriv->stats.
+                                      rx_rssi_percentage[rfpath] *
+                                      (RX_SMOOTH_FACTOR - 1)) +
+                                     (pstats->rx_mimo_signalstrength[rfpath])) /
+                                    (RX_SMOOTH_FACTOR);
+
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    rtlpriv->stats.rx_rssi_percentage[rfpath] +
+                                    1;
+                        } else {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    ((rtlpriv->stats.
+                                      rx_rssi_percentage[rfpath] *
+                                      (RX_SMOOTH_FACTOR - 1)) +
+                                     (pstats->rx_mimo_signalstrength[rfpath])) /
+                                    (RX_SMOOTH_FACTOR);
+                        }
+
+                }
+        }
+}
+
+static void _rtl92ce_update_rxsignalstatistics(struct ieee80211_hw *hw,
+                                               struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int weighting;
+
+        if (rtlpriv->stats.recv_signal_power == 0)
+                rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
+
+        if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
+                weighting = 5;
+
+        else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
+                weighting = (-5);
+
+        rtlpriv->stats.recv_signal_power =
+            (rtlpriv->stats.recv_signal_power * 5 +
+             pstats->recvsignalpower + weighting) / 6;
+}
+
+static void _rtl92ce_process_pwdb(struct ieee80211_hw *hw,
+                struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long undecorated_smoothed_pwdb;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                return;
+        } else {
+                undecorated_smoothed_pwdb =
+                    rtlpriv->dm.undecorated_smoothed_pwdb;
+        }
+
+        if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+                if (undecorated_smoothed_pwdb < 0)
+                        undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
+
+                if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
+                        undecorated_smoothed_pwdb =
+                            (((undecorated_smoothed_pwdb) *
+                              (RX_SMOOTH_FACTOR - 1)) +
+                             (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
+
+                        undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
+                            + 1;
+                } else {
+                        undecorated_smoothed_pwdb =
+                            (((undecorated_smoothed_pwdb) *
+                              (RX_SMOOTH_FACTOR - 1)) +
+                             (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
+                }
+
+                rtlpriv->dm.undecorated_smoothed_pwdb =
+                    undecorated_smoothed_pwdb;
+                _rtl92ce_update_rxsignalstatistics(hw, pstats);
+        }
+}
+
+static void _rtl92ce_process_ui_link_quality(struct ieee80211_hw *hw,
+                                             struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 last_evm, n_spatialstream, tmpval;
+
+        if (pstats->signalquality != 0) {
+                if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+
+                        if (rtlpriv->stats.ui_link_quality.total_num++ >=
+                            PHY_LINKQUALITY_SLID_WIN_MAX) {
+                                rtlpriv->stats.ui_link_quality.total_num =
+                                    PHY_LINKQUALITY_SLID_WIN_MAX;
+                                last_evm =
+                                    rtlpriv->stats.
+                                    ui_link_quality.elements[rtlpriv->
+                                                          stats.ui_link_quality.
+                                                          index];
+                                rtlpriv->stats.ui_link_quality.total_val -=
+                                    last_evm;
+                        }
+
+                        rtlpriv->stats.ui_link_quality.total_val +=
+                            pstats->signalquality;
+                        rtlpriv->stats.ui_link_quality.elements[rtlpriv->stats.
+                                                                ui_link_quality.
+                                                                index++] =
+                            pstats->signalquality;
+
+                        if (rtlpriv->stats.ui_link_quality.index >=
+                            PHY_LINKQUALITY_SLID_WIN_MAX)
+                                rtlpriv->stats.ui_link_quality.index = 0;
+
+                        tmpval = rtlpriv->stats.ui_link_quality.total_val /
+                            rtlpriv->stats.ui_link_quality.total_num;
+                        rtlpriv->stats.signal_quality = tmpval;
+
+                        rtlpriv->stats.last_sigstrength_inpercent = tmpval;
+
+                        for (n_spatialstream = 0; n_spatialstream < 2;
+                             n_spatialstream++) {
+                                if (pstats->
+                                    rx_mimo_signalquality[n_spatialstream] !=
+                                    -1) {
+                                        if (rtlpriv->stats.
+                                            rx_evm_percentage[n_spatialstream]
+                                            == 0) {
+                                                rtlpriv->stats.
+                                                   rx_evm_percentage
+                                                   [n_spatialstream] =
+                                                   pstats->rx_mimo_signalquality
+                                                   [n_spatialstream];
+                                        }
+
+                                        rtlpriv->stats.
+                                            rx_evm_percentage[n_spatialstream] =
+                                            ((rtlpriv->
+                                              stats.rx_evm_percentage
+                                              [n_spatialstream] *
+                                              (RX_SMOOTH_FACTOR - 1)) +
+                                             (pstats->
+                                              rx_mimo_signalquality
+                                              [n_spatialstream] * 1)) /
+                                            (RX_SMOOTH_FACTOR);
+                                }
+                        }
+                }
+        } else {
+                ;
+        }
+}
+
+static void _rtl92ce_process_phyinfo(struct ieee80211_hw *hw,
+                                     u8 *buffer,
+                                     struct rtl_stats *pcurrent_stats)
+{
+
+        if (!pcurrent_stats->b_packet_matchbssid &&
+            !pcurrent_stats->b_packet_beacon)
+                return;
+
+        _rtl92ce_process_ui_rssi(hw, pcurrent_stats);
+        _rtl92ce_process_pwdb(hw, pcurrent_stats);
+        _rtl92ce_process_ui_link_quality(hw, pcurrent_stats);
+}
+
+static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
+                                               struct sk_buff *skb,
+                                               struct rtl_stats *pstats,
+                                               struct rx_desc_92c *pdesc,
+                                               struct rx_fwinfo_92c *p_drvinfo)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        struct ieee80211_hdr *hdr;
+        u8 *tmp_buf;
+        u8 *praddr;
+        u8 *psaddr;
+        u16 fc, type;
+        bool b_packet_matchbssid, b_packet_toself, b_packet_beacon;
+
+        tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
+
+        hdr = (struct ieee80211_hdr *)tmp_buf;
+        fc = le16_to_cpu(hdr->frame_control);
+        type = WLAN_FC_GET_TYPE(fc);
+        praddr = hdr->addr1;
+        psaddr = hdr->addr2;
+
+        b_packet_matchbssid =
+            ((IEEE80211_FTYPE_CTL != type) &&
+             (!compare_ether_addr(mac->bssid,
+                                  (fc & IEEE80211_FCTL_TODS) ?
+                                  hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
+                                  hdr->addr2 : hdr->addr3)) &&
+             (!pstats->b_hwerror) && (!pstats->b_crc) && (!pstats->b_icv));
+
+        b_packet_toself = b_packet_matchbssid &&
+            (!compare_ether_addr(praddr, rtlefuse->dev_addr));
+
+        if (ieee80211_is_beacon(fc))
+                b_packet_beacon = true;
+
+        _rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
+                                   b_packet_matchbssid, b_packet_toself,
+                                   b_packet_beacon);
+
+        _rtl92ce_process_phyinfo(hw, tmp_buf, pstats);
+}
+
+bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
+                           struct rtl_stats *stats,
+                           struct ieee80211_rx_status *rx_status,
+                           u8 *p_desc, struct sk_buff *skb)
+{
+        struct rx_fwinfo_92c *p_drvinfo;
+        struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
+
+        u32 phystatus = GET_RX_DESC_PHYST(pdesc);
+        stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
+        stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
+            RX_DRV_INFO_SIZE_UNIT;
+        stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
+        stats->b_icv = (u16) GET_RX_DESC_ICV(pdesc);
+        stats->b_crc = (u16) GET_RX_DESC_CRC32(pdesc);
+        stats->b_hwerror = (stats->b_crc | stats->b_icv);
+        stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
+        stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
+        stats->b_shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
+        stats->b_isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
+        stats->b_isampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
+                                   && (GET_RX_DESC_FAGGR(pdesc) == 1));
+        stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
+        stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
+
+        rx_status->freq = hw->conf.channel->center_freq;
+        rx_status->band = hw->conf.channel->band;
+
+        if (GET_RX_DESC_CRC32(pdesc))
+                rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
+
+        if (!GET_RX_DESC_SWDEC(pdesc))
+                rx_status->flag |= RX_FLAG_DECRYPTED;
+
+        if (GET_RX_DESC_BW(pdesc))
+                rx_status->flag |= RX_FLAG_40MHZ;
+
+        if (GET_RX_DESC_RXHT(pdesc))
+                rx_status->flag |= RX_FLAG_HT;
+
+        rx_status->flag |= RX_FLAG_TSFT;
+
+        if (stats->decrypted)
+                rx_status->flag |= RX_FLAG_DECRYPTED;
+
+        rx_status->rate_idx = _rtl92ce_rate_mapping((bool)
+                                                    GET_RX_DESC_RXHT(pdesc),
+                                                    (u8)
+                                                    GET_RX_DESC_RXMCS(pdesc),
+                                                    (bool)
+                                                    GET_RX_DESC_PAGGR(pdesc));
+
+        rx_status->mactime = GET_RX_DESC_TSFL(pdesc);
+        if (phystatus == true) {
+                p_drvinfo = (struct rx_fwinfo_92c *)(skb->data +
+                                                     stats->rx_bufshift);
+
+                _rtl92ce_translate_rx_signal_stuff(hw,
+                                                   skb, stats, pdesc,
+                                                   p_drvinfo);
+        }
+
+        /*rx_status->qual = stats->signal; */
+        rx_status->signal = stats->rssi + 10;
+        /*rx_status->noise = -stats->noise; */
+
+        return true;
+}
+
+void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
+                          struct ieee80211_hdr *hdr, u8 *pdesc_tx,
+                          struct ieee80211_tx_info *info, struct sk_buff *skb,
+                          unsigned int queue_index)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool b_defaultadapter = true;
+
+        struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid);
+
+        u8 *pdesc = (u8 *) pdesc_tx;
+        struct rtl_tcb_desc tcb_desc;
+        u8 *qc = ieee80211_get_qos_ctl(hdr);
+        u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
+        u16 seq_number;
+        u16 fc = le16_to_cpu(hdr->frame_control);
+        u8 rate_flag = info->control.rates[0].flags;
+
+        enum rtl_desc_qsel fw_qsel =
+            _rtl92ce_map_hwqueue_to_fwqueue(le16_to_cpu(hdr->frame_control),
+                                            queue_index);
+
+        bool b_firstseg = ((hdr->seq_ctrl &
+                            cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
+
+        bool b_lastseg = ((hdr->frame_control &
+                           cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
+
+        dma_addr_t mapping = pci_map_single(rtlpci->pdev,
+                                            skb->data, skb->len,
+                                            PCI_DMA_TODEVICE);
+
+        seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
+
+        rtl_get_tcb_desc(hw, info, skb, &tcb_desc);
+
+        CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92c));
+
+        if (b_firstseg) {
+                SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
+
+                SET_TX_DESC_TX_RATE(pdesc, tcb_desc.hw_rate);
+
+                if (tcb_desc.use_shortgi || tcb_desc.use_shortpreamble)
+                        SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
+
+                if (mac->tids[tid].agg.agg_state == RTL_AGG_ON &&
+                    info->flags & IEEE80211_TX_CTL_AMPDU) {
+                        SET_TX_DESC_AGG_BREAK(pdesc, 1);
+                        SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
+                }
+                SET_TX_DESC_SEQ(pdesc, seq_number);
+
+                SET_TX_DESC_RTS_ENABLE(pdesc, ((tcb_desc.b_rts_enable &&
+                                                !tcb_desc.
+                                                b_cts_enable) ? 1 : 0));
+                SET_TX_DESC_HW_RTS_ENABLE(pdesc,
+                                          ((tcb_desc.b_rts_enable
+                                            || tcb_desc.b_cts_enable) ? 1 : 0));
+                SET_TX_DESC_CTS2SELF(pdesc, ((tcb_desc.b_cts_enable) ? 1 : 0));
+                SET_TX_DESC_RTS_STBC(pdesc, ((tcb_desc.b_rts_stbc) ? 1 : 0));
+
+                SET_TX_DESC_RTS_RATE(pdesc, tcb_desc.rts_rate);
+                SET_TX_DESC_RTS_BW(pdesc, 0);
+                SET_TX_DESC_RTS_SC(pdesc, tcb_desc.rts_sc);
+                SET_TX_DESC_RTS_SHORT(pdesc,
+                                      ((tcb_desc.rts_rate <= DESC92C_RATE54M) ?
+                                      (tcb_desc.b_rts_use_shortpreamble ? 1 : 0)
+                                      : (tcb_desc.b_rts_use_shortgi ? 1 : 0)));
+
+                if (mac->bw_40) {
+                        if (tcb_desc.b_packet_bw) {
+                                SET_TX_DESC_DATA_BW(pdesc, 1);
+                                SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
+                        } else {
+                                SET_TX_DESC_DATA_BW(pdesc, 0);
+
+                                if (rate_flag & IEEE80211_TX_RC_DUP_DATA) {
+                                        SET_TX_DESC_TX_SUB_CARRIER(pdesc,
+                                                        mac->cur_40_prime_sc);
+                                }
+                        }
+                } else {
+                        SET_TX_DESC_DATA_BW(pdesc, 0);
+                        SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
+                }
+
+                SET_TX_DESC_LINIP(pdesc, 0);
+                SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
+
+                if (sta) {
+                        u8 ampdu_density = sta->ht_cap.ampdu_density;
+                        SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
+                }
+
+                if (info->control.hw_key) {
+                        struct ieee80211_key_conf *keyconf =
+                            info->control.hw_key;
+
+                        switch (keyconf->cipher) {
+                        case WLAN_CIPHER_SUITE_WEP40:
+                        case WLAN_CIPHER_SUITE_WEP104:
+                        case WLAN_CIPHER_SUITE_TKIP:
+                                SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
+                                break;
+                        case WLAN_CIPHER_SUITE_CCMP:
+                                SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
+                                break;
+                        default:
+                                SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
+                                break;
+
+                        }
+                }
+
+                SET_TX_DESC_PKT_ID(pdesc, 0);
+                SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
+
+                SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
+                SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
+                SET_TX_DESC_DISABLE_FB(pdesc, 0);
+                SET_TX_DESC_USE_RATE(pdesc, tcb_desc.use_driver_rate ? 1 : 0);
+
+                if (ieee80211_is_data_qos(fc)) {
+                        if (mac->rdg_en) {
+                                RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
+                                         ("Enable RDG function.\n"));
+                                SET_TX_DESC_RDG_ENABLE(pdesc, 1);
+                                SET_TX_DESC_HTC(pdesc, 1);
+                        }
+                }
+        }
+
+        SET_TX_DESC_FIRST_SEG(pdesc, (b_firstseg ? 1 : 0));
+        SET_TX_DESC_LAST_SEG(pdesc, (b_lastseg ? 1 : 0));
+
+        SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
+
+        SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
+
+        if (rtlpriv->dm.b_useramask) {
+                SET_TX_DESC_RATE_ID(pdesc, tcb_desc.ratr_index);
+                SET_TX_DESC_MACID(pdesc, tcb_desc.mac_id);
+        } else {
+                SET_TX_DESC_RATE_ID(pdesc, 0xC + tcb_desc.ratr_index);
+                SET_TX_DESC_MACID(pdesc, tcb_desc.ratr_index);
+        }
+
+        if ((!ieee80211_is_data_qos(fc)) && ppsc->b_leisure_ps &&
+            ppsc->b_fwctrl_lps) {
+                SET_TX_DESC_HWSEQ_EN(pdesc, 1);
+                SET_TX_DESC_PKT_ID(pdesc, 8);
+
+                if (!b_defaultadapter)
+                        SET_TX_DESC_QOS(pdesc, 1);
+        }
+
+        SET_TX_DESC_MORE_FRAG(pdesc, (b_lastseg ? 0 : 1));
+
+        if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
+            is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
+                SET_TX_DESC_BMC(pdesc, 1);
+        }
+
+        RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, ("\n"));
+}
+
+void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
+                             u8 *pdesc, bool b_firstseg,
+                             bool b_lastseg, struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        u8 fw_queue = QSLT_BEACON;
+
+        dma_addr_t mapping = pci_map_single(rtlpci->pdev,
+                                            skb->data, skb->len,
+                                            PCI_DMA_TODEVICE);
+
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        u16 fc = le16_to_cpu(hdr->frame_control);
+
+        CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
+
+        if (b_firstseg)
+                SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
+
+        SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
+
+        SET_TX_DESC_SEQ(pdesc, 0);
+
+        SET_TX_DESC_LINIP(pdesc, 0);
+
+        SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
+
+        SET_TX_DESC_FIRST_SEG(pdesc, 1);
+        SET_TX_DESC_LAST_SEG(pdesc, 1);
+
+        SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
+
+        SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
+
+        SET_TX_DESC_RATE_ID(pdesc, 7);
+        SET_TX_DESC_MACID(pdesc, 0);
+
+        SET_TX_DESC_OWN(pdesc, 1);
+
+        SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
+
+        SET_TX_DESC_FIRST_SEG(pdesc, 1);
+        SET_TX_DESC_LAST_SEG(pdesc, 1);
+
+        SET_TX_DESC_OFFSET(pdesc, 0x20);
+
+        SET_TX_DESC_USE_RATE(pdesc, 1);
+
+        if (!ieee80211_is_data_qos(fc)) {
+                SET_TX_DESC_HWSEQ_EN(pdesc, 1);
+                SET_TX_DESC_PKT_ID(pdesc, 8);
+        }
+
+        RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
+                      "H2C Tx Cmd Content\n",
+                      pdesc, TX_DESC_SIZE);
+}
+
+void rtl92ce_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
+{
+        if (istx == true) {
+                switch (desc_name) {
+                case HW_DESC_OWN:
+                        SET_TX_DESC_OWN(pdesc, 1);
+                        break;
+                case HW_DESC_TX_NEXTDESC_ADDR:
+                        SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
+                        break;
+                default:
+                        RT_ASSERT(false, ("ERR txdesc :%d"
+                                          " not process\n", desc_name));
+                        break;
+                }
+        } else {
+                switch (desc_name) {
+                case HW_DESC_RXOWN:
+                        SET_RX_DESC_OWN(pdesc, 1);
+                        break;
+                case HW_DESC_RXBUFF_ADDR:
+                        SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
+                        break;
+                case HW_DESC_RXPKT_LEN:
+                        SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
+                        break;
+                case HW_DESC_RXERO:
+                        SET_RX_DESC_EOR(pdesc, 1);
+                        break;
+                default:
+                        RT_ASSERT(false, ("ERR rxdesc :%d "
+                                          "not process\n", desc_name));
+                        break;
+                }
+        }
+}
+
+u32 rtl92ce_get_desc(u8 *p_desc, bool istx, u8 desc_name)
+{
+        u32 ret = 0;
+
+        if (istx == true) {
+                switch (desc_name) {
+                case HW_DESC_OWN:
+                        ret = GET_TX_DESC_OWN(p_desc);
+                        break;
+                case HW_DESC_TXBUFF_ADDR:
+                        ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
+                        break;
+                default:
+                        RT_ASSERT(false, ("ERR txdesc :%d "
+                                          "not process\n", desc_name));
+                        break;
+                }
+        } else {
+                struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
+                switch (desc_name) {
+                case HW_DESC_OWN:
+                        ret = GET_RX_DESC_OWN(pdesc);
+                        break;
+                case HW_DESC_RXPKT_LEN:
+                        ret = GET_RX_DESC_PKT_LEN(pdesc);
+                        break;
+                default:
+                        RT_ASSERT(false, ("ERR rxdesc :%d "
+                                          "not process\n", desc_name));
+                        break;
+                }
+        }
+        return ret;
+}
+
+void rtl92ce_tx_polling(struct ieee80211_hw *hw, unsigned int hw_queue)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        if (hw_queue == BEACON_QUEUE) {
+                rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
+        } else {
+                rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
+                               BIT(0) << (hw_queue));
+        }
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
new file mode 100644
index 000000000000..53d0e0a5af5c
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
@@ -0,0 +1,714 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CE_TRX_H__
+#define __RTL92CE_TRX_H__
+
+#define TX_DESC_SIZE                            64
+#define TX_DESC_AGGR_SUBFRAME_SIZE              32
+
+#define RX_DESC_SIZE                            32
+#define RX_DRV_INFO_SIZE_UNIT                   8
+
+#define TX_DESC_NEXT_DESC_OFFSET                40
+#define USB_HWDESC_HEADER_LEN                   32
+#define CRCLENGTH                               4
+
+#define SET_TX_DESC_PKT_SIZE(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val)
+#define SET_TX_DESC_OFFSET(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val)
+#define SET_TX_DESC_BMC(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val)
+#define SET_TX_DESC_HTC(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val)
+#define SET_TX_DESC_LAST_SEG(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val)
+#define SET_TX_DESC_FIRST_SEG(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
+#define SET_TX_DESC_LINIP(__pdesc, __val)               \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
+#define SET_TX_DESC_NO_ACM(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val)
+#define SET_TX_DESC_GF(__pdesc, __val)                  \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
+#define SET_TX_DESC_OWN(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+
+#define GET_TX_DESC_PKT_SIZE(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc, 0, 16)
+#define GET_TX_DESC_OFFSET(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc, 16, 8)
+#define GET_TX_DESC_BMC(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 24, 1)
+#define GET_TX_DESC_HTC(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 25, 1)
+#define GET_TX_DESC_LAST_SEG(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc, 26, 1)
+#define GET_TX_DESC_FIRST_SEG(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc, 27, 1)
+#define GET_TX_DESC_LINIP(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc, 28, 1)
+#define GET_TX_DESC_NO_ACM(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc, 29, 1)
+#define GET_TX_DESC_GF(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc, 30, 1)
+#define GET_TX_DESC_OWN(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+
+#define SET_TX_DESC_MACID(__pdesc, __val)               \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 5, __val)
+#define SET_TX_DESC_AGG_BREAK(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 5, 1, __val)
+#define SET_TX_DESC_BK(__pdesc, __val)                  \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 6, 1, __val)
+#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 7, 1, __val)
+#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val)
+#define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val)
+#define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val)        \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val)
+#define SET_TX_DESC_PIFS(__pdesc, __val)                \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
+#define SET_TX_DESC_RATE_ID(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 4, __val)
+#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 20, 1, __val)
+#define SET_TX_DESC_EN_DESC_ID(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val)
+#define SET_TX_DESC_SEC_TYPE(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
+#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 8, __val)
+
+#define GET_TX_DESC_MACID(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
+#define GET_TX_DESC_AGG_ENABLE(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+4, 5, 1)
+#define GET_TX_DESC_AGG_BREAK(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+4, 6, 1)
+#define GET_TX_DESC_RDG_ENABLE(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+4, 7, 1)
+#define GET_TX_DESC_QUEUE_SEL(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+4, 8, 5)
+#define GET_TX_DESC_RDG_NAV_EXT(__pdesc)                \
+        LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
+#define GET_TX_DESC_LSIG_TXOP_EN(__pdesc)               \
+        LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
+#define GET_TX_DESC_PIFS(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
+#define GET_TX_DESC_RATE_ID(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
+#define GET_TX_DESC_NAV_USE_HDR(__pdesc)                \
+        LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
+#define GET_TX_DESC_EN_DESC_ID(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
+#define GET_TX_DESC_SEC_TYPE(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+4, 22, 2)
+#define GET_TX_DESC_PKT_OFFSET(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+4, 24, 8)
+
+#define SET_TX_DESC_RTS_RC(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 6, __val)
+#define SET_TX_DESC_DATA_RC(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 6, 6, __val)
+#define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val)
+#define SET_TX_DESC_MORE_FRAG(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
+#define SET_TX_DESC_RAW(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val)
+#define SET_TX_DESC_CCX(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val)
+#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
+#define SET_TX_DESC_ANTSEL_A(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 1, __val)
+#define SET_TX_DESC_ANTSEL_B(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 25, 1, __val)
+#define SET_TX_DESC_TX_ANT_CCK(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 26, 2, __val)
+#define SET_TX_DESC_TX_ANTL(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 28, 2, __val)
+#define SET_TX_DESC_TX_ANT_HT(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+8, 30, 2, __val)
+
+#define GET_TX_DESC_RTS_RC(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+8, 0, 6)
+#define GET_TX_DESC_DATA_RC(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+8, 6, 6)
+#define GET_TX_DESC_BAR_RTY_TH(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+8, 14, 2)
+#define GET_TX_DESC_MORE_FRAG(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+8, 17, 1)
+#define GET_TX_DESC_RAW(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+8, 18, 1)
+#define GET_TX_DESC_CCX(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+8, 19, 1)
+#define GET_TX_DESC_AMPDU_DENSITY(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+8, 20, 3)
+#define GET_TX_DESC_ANTSEL_A(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+8, 24, 1)
+#define GET_TX_DESC_ANTSEL_B(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+8, 25, 1)
+#define GET_TX_DESC_TX_ANT_CCK(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+8, 26, 2)
+#define GET_TX_DESC_TX_ANTL(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+8, 28, 2)
+#define GET_TX_DESC_TX_ANT_HT(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+8, 30, 2)
+
+#define SET_TX_DESC_NEXT_HEAP_PAGE(__pdesc, __val)      \
+        SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 8, __val)
+#define SET_TX_DESC_TAIL_PAGE(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 8, __val)
+#define SET_TX_DESC_SEQ(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 12, __val)
+#define SET_TX_DESC_PKT_ID(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc+12, 28, 4, __val)
+
+#define GET_TX_DESC_NEXT_HEAP_PAGE(__pdesc)             \
+        LE_BITS_TO_4BYTE(__pdesc+12, 0, 8)
+#define GET_TX_DESC_TAIL_PAGE(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+12, 8, 8)
+#define GET_TX_DESC_SEQ(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+12, 16, 12)
+#define GET_TX_DESC_PKT_ID(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+12, 28, 4)
+
+#define SET_TX_DESC_RTS_RATE(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 5, __val)
+#define SET_TX_DESC_AP_DCFE(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 5, 1, __val)
+#define SET_TX_DESC_QOS(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 6, 1, __val)
+#define SET_TX_DESC_HWSEQ_EN(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 7, 1, __val)
+#define SET_TX_DESC_USE_RATE(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 1, __val)
+#define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val)      \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 9, 1, __val)
+#define SET_TX_DESC_DISABLE_FB(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 10, 1, __val)
+#define SET_TX_DESC_CTS2SELF(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 11, 1, __val)
+#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 12, 1, __val)
+#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 1, __val)
+#define SET_TX_DESC_PORT_ID(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 14, 1, __val)
+#define SET_TX_DESC_WAIT_DCTS(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 1, __val)
+#define SET_TX_DESC_CTS2AP_EN(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 19, 1, __val)
+#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val)      \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 20, 2, __val)
+#define SET_TX_DESC_TX_STBC(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 22, 2, __val)
+#define SET_TX_DESC_DATA_SHORT(__pdesc, __val)          \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 1, __val)
+#define SET_TX_DESC_DATA_BW(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 25, 1, __val)
+#define SET_TX_DESC_RTS_SHORT(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 26, 1, __val)
+#define SET_TX_DESC_RTS_BW(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 27, 1, __val)
+#define SET_TX_DESC_RTS_SC(__pdesc, __val)              \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 28, 2, __val)
+#define SET_TX_DESC_RTS_STBC(__pdesc, __val)            \
+        SET_BITS_TO_LE_4BYTE(__pdesc+16, 30, 2, __val)
+
+#define GET_TX_DESC_RTS_RATE(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+16, 0, 5)
+#define GET_TX_DESC_AP_DCFE(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+16, 5, 1)
+#define GET_TX_DESC_QOS(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+16, 6, 1)
+#define GET_TX_DESC_HWSEQ_EN(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+16, 7, 1)
+#define GET_TX_DESC_USE_RATE(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+16, 8, 1)
+#define GET_TX_DESC_DISABLE_RTS_FB(__pdesc)             \
+        LE_BITS_TO_4BYTE(__pdesc+16, 9, 1)
+#define GET_TX_DESC_DISABLE_FB(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+16, 10, 1)
+#define GET_TX_DESC_CTS2SELF(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+16, 11, 1)
+#define GET_TX_DESC_RTS_ENABLE(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+16, 12, 1)
+#define GET_TX_DESC_HW_RTS_ENABLE(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+16, 13, 1)
+#define GET_TX_DESC_PORT_ID(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+16, 14, 1)
+#define GET_TX_DESC_WAIT_DCTS(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+16, 18, 1)
+#define GET_TX_DESC_CTS2AP_EN(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+16, 19, 1)
+#define GET_TX_DESC_TX_SUB_CARRIER(__pdesc)             \
+        LE_BITS_TO_4BYTE(__pdesc+16, 20, 2)
+#define GET_TX_DESC_TX_STBC(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+16, 22, 2)
+#define GET_TX_DESC_DATA_SHORT(__pdesc)                 \
+        LE_BITS_TO_4BYTE(__pdesc+16, 24, 1)
+#define GET_TX_DESC_DATA_BW(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+16, 25, 1)
+#define GET_TX_DESC_RTS_SHORT(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+16, 26, 1)
+#define GET_TX_DESC_RTS_BW(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+16, 27, 1)
+#define GET_TX_DESC_RTS_SC(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+16, 28, 2)
+#define GET_TX_DESC_RTS_STBC(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+16, 30, 2)
+
+#define SET_TX_DESC_TX_RATE(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 6, __val)
+#define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val)        \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 6, 1, __val)
+#define SET_TX_DESC_CCX_TAG(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val)
+#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val)  \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 5, __val)
+#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val)   \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
+#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val)  \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 17, 1, __val)
+#define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val)    \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 18, 6, __val)
+#define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 8, __val)
+
+#define GET_TX_DESC_TX_RATE(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+20, 0, 6)
+#define GET_TX_DESC_DATA_SHORTGI(__pdesc)               \
+        LE_BITS_TO_4BYTE(__pdesc+20, 6, 1)
+#define GET_TX_DESC_CCX_TAG(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+20, 7, 1)
+#define GET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc)         \
+        LE_BITS_TO_4BYTE(__pdesc+20, 8, 5)
+#define GET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc)          \
+        LE_BITS_TO_4BYTE(__pdesc+20, 13, 4)
+#define GET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc)         \
+        LE_BITS_TO_4BYTE(__pdesc+20, 17, 1)
+#define GET_TX_DESC_DATA_RETRY_LIMIT(__pdesc)           \
+        LE_BITS_TO_4BYTE(__pdesc+20, 18, 6)
+#define GET_TX_DESC_USB_TXAGG_NUM(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+20, 24, 8)
+
+#define SET_TX_DESC_TXAGC_A(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 5, __val)
+#define SET_TX_DESC_TXAGC_B(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 5, 5, __val)
+#define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val)         \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 10, 1, __val)
+#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val)         \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 11, 5, __val)
+#define SET_TX_DESC_MCSG1_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 16, 4, __val)
+#define SET_TX_DESC_MCSG2_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 20, 4, __val)
+#define SET_TX_DESC_MCSG3_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 24, 4, __val)
+#define SET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc, __val)    \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 28, 4, __val)
+
+#define GET_TX_DESC_TXAGC_A(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+24, 0, 5)
+#define GET_TX_DESC_TXAGC_B(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc+24, 5, 5)
+#define GET_TX_DESC_USE_MAX_LEN(__pdesc)                \
+        LE_BITS_TO_4BYTE(__pdesc+24, 10, 1)
+#define GET_TX_DESC_MAX_AGG_NUM(__pdesc)                \
+        LE_BITS_TO_4BYTE(__pdesc+24, 11, 5)
+#define GET_TX_DESC_MCSG1_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+24, 16, 4)
+#define GET_TX_DESC_MCSG2_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+24, 20, 4)
+#define GET_TX_DESC_MCSG3_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+24, 24, 4)
+#define GET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc)           \
+        LE_BITS_TO_4BYTE(__pdesc+24, 28, 4)
+
+#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val)      \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val)
+#define SET_TX_DESC_MCSG4_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 16, 4, __val)
+#define SET_TX_DESC_MCSG5_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 20, 4, __val)
+#define SET_TX_DESC_MCSG6_MAX_LEN(__pdesc, __val)       \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 24, 4, __val)
+#define SET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc, __val)   \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 28, 4, __val)
+
+#define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc)             \
+        LE_BITS_TO_4BYTE(__pdesc+28, 0, 16)
+#define GET_TX_DESC_MCSG4_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+28, 16, 4)
+#define GET_TX_DESC_MCSG5_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+28, 20, 4)
+#define GET_TX_DESC_MCSG6_MAX_LEN(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc+28, 24, 4)
+#define GET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc)          \
+        LE_BITS_TO_4BYTE(__pdesc+28, 28, 4)
+
+#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val)   \
+        SET_BITS_TO_LE_4BYTE(__pdesc+32, 0, 32, __val)
+#define SET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc, __val) \
+        SET_BITS_TO_LE_4BYTE(__pdesc+36, 0, 32, __val)
+
+#define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc)          \
+        LE_BITS_TO_4BYTE(__pdesc+32, 0, 32)
+#define GET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc)        \
+        LE_BITS_TO_4BYTE(__pdesc+36, 0, 32)
+
+#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val)   \
+        SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val)
+#define SET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc, __val) \
+        SET_BITS_TO_LE_4BYTE(__pdesc+44, 0, 32, __val)
+
+#define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc)          \
+        LE_BITS_TO_4BYTE(__pdesc+40, 0, 32)
+#define GET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc)        \
+        LE_BITS_TO_4BYTE(__pdesc+44, 0, 32)
+
+#define GET_RX_DESC_PKT_LEN(__pdesc)                    \
+        LE_BITS_TO_4BYTE(__pdesc, 0, 14)
+#define GET_RX_DESC_CRC32(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc, 14, 1)
+#define GET_RX_DESC_ICV(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 15, 1)
+#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc)              \
+        LE_BITS_TO_4BYTE(__pdesc, 16, 4)
+#define GET_RX_DESC_SECURITY(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc, 20, 3)
+#define GET_RX_DESC_QOS(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 23, 1)
+#define GET_RX_DESC_SHIFT(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc, 24, 2)
+#define GET_RX_DESC_PHYST(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc, 26, 1)
+#define GET_RX_DESC_SWDEC(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc, 27, 1)
+#define GET_RX_DESC_LS(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc, 28, 1)
+#define GET_RX_DESC_FS(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc, 29, 1)
+#define GET_RX_DESC_EOR(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 30, 1)
+#define GET_RX_DESC_OWN(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+
+#define SET_RX_DESC_PKT_LEN(__pdesc, __val)             \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
+#define SET_RX_DESC_EOR(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
+#define SET_RX_DESC_OWN(__pdesc, __val)                 \
+        SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+
+#define GET_RX_DESC_MACID(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
+#define GET_RX_DESC_TID(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+4, 5, 4)
+#define GET_RX_DESC_HWRSVD(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+4, 9, 5)
+#define GET_RX_DESC_PAGGR(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
+#define GET_RX_DESC_FAGGR(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
+#define GET_RX_DESC_A1_FIT(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
+#define GET_RX_DESC_A2_FIT(__pdesc)                     \
+        LE_BITS_TO_4BYTE(__pdesc+4, 20, 4)
+#define GET_RX_DESC_PAM(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+4, 24, 1)
+#define GET_RX_DESC_PWR(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+4, 25, 1)
+#define GET_RX_DESC_MD(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc+4, 26, 1)
+#define GET_RX_DESC_MF(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc+4, 27, 1)
+#define GET_RX_DESC_TYPE(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+4, 28, 2)
+#define GET_RX_DESC_MC(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc+4, 30, 1)
+#define GET_RX_DESC_BC(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc+4, 31, 1)
+#define GET_RX_DESC_SEQ(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+8, 0, 12)
+#define GET_RX_DESC_FRAG(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+8, 12, 4)
+#define GET_RX_DESC_NEXT_PKT_LEN(__pdesc)               \
+        LE_BITS_TO_4BYTE(__pdesc+8, 16, 14)
+#define GET_RX_DESC_NEXT_IND(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+8, 30, 1)
+#define GET_RX_DESC_RSVD(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+8, 31, 1)
+
+#define GET_RX_DESC_RXMCS(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+12, 0, 6)
+#define GET_RX_DESC_RXHT(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+12, 6, 1)
+#define GET_RX_DESC_SPLCP(__pdesc)                      \
+        LE_BITS_TO_4BYTE(__pdesc+12, 8, 1)
+#define GET_RX_DESC_BW(__pdesc)                         \
+        LE_BITS_TO_4BYTE(__pdesc+12, 9, 1)
+#define GET_RX_DESC_HTC(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+12, 10, 1)
+#define GET_RX_DESC_HWPC_ERR(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+12, 14, 1)
+#define GET_RX_DESC_HWPC_IND(__pdesc)                   \
+        LE_BITS_TO_4BYTE(__pdesc+12, 15, 1)
+#define GET_RX_DESC_IV0(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+12, 16, 16)
+
+#define GET_RX_DESC_IV1(__pdesc)                        \
+        LE_BITS_TO_4BYTE(__pdesc+16, 0, 32)
+#define GET_RX_DESC_TSFL(__pdesc)                       \
+        LE_BITS_TO_4BYTE(__pdesc+20, 0, 32)
+
+#define GET_RX_DESC_BUFF_ADDR(__pdesc)                  \
+        LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
+#define GET_RX_DESC_BUFF_ADDR64(__pdesc)                \
+        LE_BITS_TO_4BYTE(__pdesc+28, 0, 32)
+
+#define SET_RX_DESC_BUFF_ADDR(__pdesc, __val)           \
+        SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val)
+#define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val)         \
+        SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val)
+
+#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)       \
+do {                                                    \
+        if (_size > TX_DESC_NEXT_DESC_OFFSET)           \
+                memset((void *)__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);   \
+        else                                            \
+                memset((void *)__pdesc, 0, _size);      \
+} while (0);
+
+#define RX_HAL_IS_CCK_RATE(_pdesc)\
+        (_pdesc->rxmcs == DESC92C_RATE1M ||             \
+         _pdesc->rxmcs == DESC92C_RATE2M ||             \
+         _pdesc->rxmcs == DESC92C_RATE5_5M ||           \
+         _pdesc->rxmcs == DESC92C_RATE11M)
+
+struct rx_fwinfo_92c {
+        u8 gain_trsw[4];
+        u8 pwdb_all;
+        u8 cfosho[4];
+        u8 cfotail[4];
+        char rxevm[2];
+        char rxsnr[4];
+        u8 pdsnr[2];
+        u8 csi_current[2];
+        u8 csi_target[2];
+        u8 sigevm;
+        u8 max_ex_pwr;
+        u8 ex_intf_flag:1;
+        u8 sgi_en:1;
+        u8 rxsc:2;
+        u8 reserve:4;
+} __packed;
+
+struct tx_desc_92c {
+        u32 pktsize:16;
+        u32 offset:8;
+        u32 bmc:1;
+        u32 htc:1;
+        u32 lastseg:1;
+        u32 firstseg:1;
+        u32 linip:1;
+        u32 noacm:1;
+        u32 gf:1;
+        u32 own:1;
+
+        u32 macid:5;
+        u32 agg_en:1;
+        u32 bk:1;
+        u32 rdg_en:1;
+        u32 queuesel:5;
+        u32 rd_nav_ext:1;
+        u32 lsig_txop_en:1;
+        u32 pifs:1;
+        u32 rateid:4;
+        u32 nav_usehdr:1;
+        u32 en_descid:1;
+        u32 sectype:2;
+        u32 pktoffset:8;
+
+        u32 rts_rc:6;
+        u32 data_rc:6;
+        u32 rsvd0:2;
+        u32 bar_retryht:2;
+        u32 rsvd1:1;
+        u32 morefrag:1;
+        u32 raw:1;
+        u32 ccx:1;
+        u32 ampdudensity:3;
+        u32 rsvd2:1;
+        u32 ant_sela:1;
+        u32 ant_selb:1;
+        u32 txant_cck:2;
+        u32 txant_l:2;
+        u32 txant_ht:2;
+
+        u32 nextheadpage:8;
+        u32 tailpage:8;
+        u32 seq:12;
+        u32 pktid:4;
+
+        u32 rtsrate:5;
+        u32 apdcfe:1;
+        u32 qos:1;
+        u32 hwseq_enable:1;
+        u32 userrate:1;
+        u32 dis_rtsfb:1;
+        u32 dis_datafb:1;
+        u32 cts2self:1;
+        u32 rts_en:1;
+        u32 hwrts_en:1;
+        u32 portid:1;
+        u32 rsvd3:3;
+        u32 waitdcts:1;
+        u32 cts2ap_en:1;
+        u32 txsc:2;
+        u32 stbc:2;
+        u32 txshort:1;
+        u32 txbw:1;
+        u32 rtsshort:1;
+        u32 rtsbw:1;
+        u32 rtssc:2;
+        u32 rtsstbc:2;
+
+        u32 txrate:6;
+        u32 shortgi:1;
+        u32 ccxt:1;
+        u32 txrate_fb_lmt:5;
+        u32 rtsrate_fb_lmt:4;
+        u32 retrylmt_en:1;
+        u32 txretrylmt:6;
+        u32 usb_txaggnum:8;
+
+        u32 txagca:5;
+        u32 txagcb:5;
+        u32 usemaxlen:1;
+        u32 maxaggnum:5;
+        u32 mcsg1maxlen:4;
+        u32 mcsg2maxlen:4;
+        u32 mcsg3maxlen:4;
+        u32 mcs7sgimaxlen:4;
+
+        u32 txbuffersize:16;
+        u32 mcsg4maxlen:4;
+        u32 mcsg5maxlen:4;
+        u32 mcsg6maxlen:4;
+        u32 mcsg15sgimaxlen:4;
+
+        u32 txbuffaddr;
+        u32 txbufferaddr64;
+        u32 nextdescaddress;
+        u32 nextdescaddress64;
+
+        u32 reserve_pass_pcie_mm_limit[4];
+} __packed;
+
+struct rx_desc_92c {
+        u32 length:14;
+        u32 crc32:1;
+        u32 icverror:1;
+        u32 drv_infosize:4;
+        u32 security:3;
+        u32 qos:1;
+        u32 shift:2;
+        u32 phystatus:1;
+        u32 swdec:1;
+        u32 lastseg:1;
+        u32 firstseg:1;
+        u32 eor:1;
+        u32 own:1;
+
+        u32 macid:5;
+        u32 tid:4;
+        u32 hwrsvd:5;
+        u32 paggr:1;
+        u32 faggr:1;
+        u32 a1_fit:4;
+        u32 a2_fit:4;
+        u32 pam:1;
+        u32 pwr:1;
+        u32 moredata:1;
+        u32 morefrag:1;
+        u32 type:2;
+        u32 mc:1;
+        u32 bc:1;
+
+        u32 seq:12;
+        u32 frag:4;
+        u32 nextpktlen:14;
+        u32 nextind:1;
+        u32 rsvd:1;
+
+        u32 rxmcs:6;
+        u32 rxht:1;
+        u32 amsdu:1;
+        u32 splcp:1;
+        u32 bandwidth:1;
+        u32 htc:1;
+        u32 tcpchk_rpt:1;
+        u32 ipcchk_rpt:1;
+        u32 tcpchk_valid:1;
+        u32 hwpcerr:1;
+        u32 hwpcind:1;
+        u32 iv0:16;
+
+        u32 iv1;
+
+        u32 tsfl;
+
+        u32 bufferaddress;
+        u32 bufferaddress64;
+
+} __packed;
+
+void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
+                          struct ieee80211_hdr *hdr,
+                          u8 *pdesc, struct ieee80211_tx_info *info,
+                          struct sk_buff *skb, unsigned int qsel);
+bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
+                           struct rtl_stats *stats,
+                           struct ieee80211_rx_status *rx_status,
+                           u8 *pdesc, struct sk_buff *skb);
+void rtl92ce_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val);
+u32 rtl92ce_get_desc(u8 *pdesc, bool istx, u8 desc_name);
+void rtl92ce_tx_polling(struct ieee80211_hw *hw, unsigned int hw_queue);
+void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
+                             bool b_firstseg, bool b_lastseg,
+                             struct sk_buff *skb);
+#endif
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h
new file mode 100644
index 000000000000..d44d79613d2d
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/wifi.h
@@ -0,0 +1,1532 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_WIFI_H__
+#define __RTL_WIFI_H__
+
+#include <linux/sched.h>
+#include <linux/firmware.h>
+#include <linux/version.h>
+#include <linux/etherdevice.h>
+#include <net/mac80211.h>
+#include "debug.h"
+
+#define RF_CHANGE_BY_INIT                       0
+#define RF_CHANGE_BY_IPS                        BIT(28)
+#define RF_CHANGE_BY_PS                         BIT(29)
+#define RF_CHANGE_BY_HW                         BIT(30)
+#define RF_CHANGE_BY_SW                         BIT(31)
+
+#define IQK_ADDA_REG_NUM                        16
+#define IQK_MAC_REG_NUM                         4
+
+#define MAX_KEY_LEN                             61
+#define KEY_BUF_SIZE                            5
+
+/* QoS related. */
+/*aci: 0x00     Best Effort*/
+/*aci: 0x01     Background*/
+/*aci: 0x10     Video*/
+/*aci: 0x11     Voice*/
+/*Max: define total number.*/
+#define AC0_BE                                  0
+#define AC1_BK                                  1
+#define AC2_VI                                  2
+#define AC3_VO                                  3
+#define AC_MAX                                  4
+#define QOS_QUEUE_NUM                           4
+#define RTL_MAC80211_NUM_QUEUE                  5
+
+#define QBSS_LOAD_SIZE                          5
+#define MAX_WMMELE_LENGTH                       64
+
+/*slot time for 11g. */
+#define RTL_SLOT_TIME_9                         9
+#define RTL_SLOT_TIME_20                        20
+
+/*related with tcp/ip. */
+/*if_ehther.h*/
+#define ETH_P_PAE               0x888E  /*Port Access Entity (IEEE 802.1X) */
+#define ETH_P_IP                0x0800  /*Internet Protocol packet */
+#define ETH_P_ARP               0x0806  /*Address Resolution packet */
+#define SNAP_SIZE               6
+#define PROTOC_TYPE_SIZE        2
+
+/*related with 802.11 frame*/
+#define MAC80211_3ADDR_LEN                      24
+#define MAC80211_4ADDR_LEN                      30
+
+enum intf_type {
+        INTF_PCI = 0,
+        INTF_USB = 1,
+};
+
+enum radio_path {
+        RF90_PATH_A = 0,
+        RF90_PATH_B = 1,
+        RF90_PATH_C = 2,
+        RF90_PATH_D = 3,
+};
+
+enum rt_eeprom_type {
+        EEPROM_93C46,
+        EEPROM_93C56,
+        EEPROM_BOOT_EFUSE,
+};
+
+enum rtl_status {
+        RTL_STATUS_INTERFACE_START = 0,
+};
+
+enum hardware_type {
+        HARDWARE_TYPE_RTL8192E,
+        HARDWARE_TYPE_RTL8192U,
+        HARDWARE_TYPE_RTL8192SE,
+        HARDWARE_TYPE_RTL8192SU,
+        HARDWARE_TYPE_RTL8192CE,
+        HARDWARE_TYPE_RTL8192CU,
+        HARDWARE_TYPE_RTL8192DE,
+        HARDWARE_TYPE_RTL8192DU,
+
+        /*keep it last*/
+        HARDWARE_TYPE_NUM
+};
+
+enum scan_operation_backup_opt {
+        SCAN_OPT_BACKUP = 0,
+        SCAN_OPT_RESTORE,
+        SCAN_OPT_MAX
+};
+
+/*RF state.*/
+enum rf_pwrstate {
+        ERFON,
+        ERFSLEEP,
+        ERFOFF
+};
+
+struct bb_reg_def {
+        u32 rfintfs;
+        u32 rfintfi;
+        u32 rfintfo;
+        u32 rfintfe;
+        u32 rf3wire_offset;
+        u32 rflssi_select;
+        u32 rftxgain_stage;
+        u32 rfhssi_para1;
+        u32 rfhssi_para2;
+        u32 rfswitch_control;
+        u32 rfagc_control1;
+        u32 rfagc_control2;
+        u32 rfrxiq_imbalance;
+        u32 rfrx_afe;
+        u32 rftxiq_imbalance;
+        u32 rftx_afe;
+        u32 rflssi_readback;
+        u32 rflssi_readbackpi;
+};
+
+enum io_type {
+        IO_CMD_PAUSE_DM_BY_SCAN = 0,
+        IO_CMD_RESUME_DM_BY_SCAN = 1,
+};
+
+enum hw_variables {
+        HW_VAR_ETHER_ADDR,
+        HW_VAR_MULTICAST_REG,
+        HW_VAR_BASIC_RATE,
+        HW_VAR_BSSID,
+        HW_VAR_MEDIA_STATUS,
+        HW_VAR_SECURITY_CONF,
+        HW_VAR_BEACON_INTERVAL,
+        HW_VAR_ATIM_WINDOW,
+        HW_VAR_LISTEN_INTERVAL,
+        HW_VAR_CS_COUNTER,
+        HW_VAR_DEFAULTKEY0,
+        HW_VAR_DEFAULTKEY1,
+        HW_VAR_DEFAULTKEY2,
+        HW_VAR_DEFAULTKEY3,
+        HW_VAR_SIFS,
+        HW_VAR_DIFS,
+        HW_VAR_EIFS,
+        HW_VAR_SLOT_TIME,
+        HW_VAR_ACK_PREAMBLE,
+        HW_VAR_CW_CONFIG,
+        HW_VAR_CW_VALUES,
+        HW_VAR_RATE_FALLBACK_CONTROL,
+        HW_VAR_CONTENTION_WINDOW,
+        HW_VAR_RETRY_COUNT,
+        HW_VAR_TR_SWITCH,
+        HW_VAR_COMMAND,
+        HW_VAR_WPA_CONFIG,
+        HW_VAR_AMPDU_MIN_SPACE,
+        HW_VAR_SHORTGI_DENSITY,
+        HW_VAR_AMPDU_FACTOR,
+        HW_VAR_MCS_RATE_AVAILABLE,
+        HW_VAR_AC_PARAM,
+        HW_VAR_ACM_CTRL,
+        HW_VAR_DIS_Req_Qsize,
+        HW_VAR_CCX_CHNL_LOAD,
+        HW_VAR_CCX_NOISE_HISTOGRAM,
+        HW_VAR_CCX_CLM_NHM,
+        HW_VAR_TxOPLimit,
+        HW_VAR_TURBO_MODE,
+        HW_VAR_RF_STATE,
+        HW_VAR_RF_OFF_BY_HW,
+        HW_VAR_BUS_SPEED,
+        HW_VAR_SET_DEV_POWER,
+
+        HW_VAR_RCR,
+        HW_VAR_RATR_0,
+        HW_VAR_RRSR,
+        HW_VAR_CPU_RST,
+        HW_VAR_CECHK_BSSID,
+        HW_VAR_LBK_MODE,
+        HW_VAR_AES_11N_FIX,
+        HW_VAR_USB_RX_AGGR,
+        HW_VAR_USER_CONTROL_TURBO_MODE,
+        HW_VAR_RETRY_LIMIT,
+        HW_VAR_INIT_TX_RATE,
+        HW_VAR_TX_RATE_REG,
+        HW_VAR_EFUSE_USAGE,
+        HW_VAR_EFUSE_BYTES,
+        HW_VAR_AUTOLOAD_STATUS,
+        HW_VAR_RF_2R_DISABLE,
+        HW_VAR_SET_RPWM,
+        HW_VAR_H2C_FW_PWRMODE,
+        HW_VAR_H2C_FW_JOINBSSRPT,
+        HW_VAR_FW_PSMODE_STATUS,
+        HW_VAR_1X1_RECV_COMBINE,
+        HW_VAR_STOP_SEND_BEACON,
+        HW_VAR_TSF_TIMER,
+        HW_VAR_IO_CMD,
+
+        HW_VAR_RF_RECOVERY,
+        HW_VAR_H2C_FW_UPDATE_GTK,
+        HW_VAR_WF_MASK,
+        HW_VAR_WF_CRC,
+        HW_VAR_WF_IS_MAC_ADDR,
+        HW_VAR_H2C_FW_OFFLOAD,
+        HW_VAR_RESET_WFCRC,
+
+        HW_VAR_HANDLE_FW_C2H,
+        HW_VAR_DL_FW_RSVD_PAGE,
+        HW_VAR_AID,
+        HW_VAR_HW_SEQ_ENABLE,
+        HW_VAR_CORRECT_TSF,
+        HW_VAR_BCN_VALID,
+        HW_VAR_FWLPS_RF_ON,
+        HW_VAR_DUAL_TSF_RST,
+        HW_VAR_SWITCH_EPHY_WoWLAN,
+        HW_VAR_INT_MIGRATION,
+        HW_VAR_INT_AC,
+        HW_VAR_RF_TIMING,
+
+        HW_VAR_MRC,
+
+        HW_VAR_MGT_FILTER,
+        HW_VAR_CTRL_FILTER,
+        HW_VAR_DATA_FILTER,
+};
+
+enum _RT_MEDIA_STATUS {
+        RT_MEDIA_DISCONNECT = 0,
+        RT_MEDIA_CONNECT = 1
+};
+
+enum rt_oem_id {
+        RT_CID_DEFAULT = 0,
+        RT_CID_8187_ALPHA0 = 1,
+        RT_CID_8187_SERCOMM_PS = 2,
+        RT_CID_8187_HW_LED = 3,
+        RT_CID_8187_NETGEAR = 4,
+        RT_CID_WHQL = 5,
+        RT_CID_819x_CAMEO = 6,
+        RT_CID_819x_RUNTOP = 7,
+        RT_CID_819x_Senao = 8,
+        RT_CID_TOSHIBA = 9,
+        RT_CID_819x_Netcore = 10,
+        RT_CID_Nettronix = 11,
+        RT_CID_DLINK = 12,
+        RT_CID_PRONET = 13,
+        RT_CID_COREGA = 14,
+        RT_CID_819x_ALPHA = 15,
+        RT_CID_819x_Sitecom = 16,
+        RT_CID_CCX = 17,
+        RT_CID_819x_Lenovo = 18,
+        RT_CID_819x_QMI = 19,
+        RT_CID_819x_Edimax_Belkin = 20,
+        RT_CID_819x_Sercomm_Belkin = 21,
+        RT_CID_819x_CAMEO1 = 22,
+        RT_CID_819x_MSI = 23,
+        RT_CID_819x_Acer = 24,
+        RT_CID_819x_HP = 27,
+        RT_CID_819x_CLEVO = 28,
+        RT_CID_819x_Arcadyan_Belkin = 29,
+        RT_CID_819x_SAMSUNG = 30,
+        RT_CID_819x_WNC_COREGA = 31,
+        RT_CID_819x_Foxcoon = 32,
+        RT_CID_819x_DELL = 33,
+};
+
+enum hw_descs {
+        HW_DESC_OWN,
+        HW_DESC_RXOWN,
+        HW_DESC_TX_NEXTDESC_ADDR,
+        HW_DESC_TXBUFF_ADDR,
+        HW_DESC_RXBUFF_ADDR,
+        HW_DESC_RXPKT_LEN,
+        HW_DESC_RXERO,
+};
+
+enum prime_sc {
+        PRIME_CHNL_OFFSET_DONT_CARE = 0,
+        PRIME_CHNL_OFFSET_LOWER = 1,
+        PRIME_CHNL_OFFSET_UPPER = 2,
+};
+
+enum rf_type {
+        RF_1T1R = 0,
+        RF_1T2R = 1,
+        RF_2T2R = 2,
+};
+
+enum ht_channel_width {
+        HT_CHANNEL_WIDTH_20 = 0,
+        HT_CHANNEL_WIDTH_20_40 = 1,
+};
+
+/* Ref: 802.11i sepc D10.0 7.3.2.25.1
+Cipher Suites Encryption Algorithms */
+enum rt_enc_alg {
+        NO_ENCRYPTION = 0,
+        WEP40_ENCRYPTION = 1,
+        TKIP_ENCRYPTION = 2,
+        RSERVED_ENCRYPTION = 3,
+        AESCCMP_ENCRYPTION = 4,
+        WEP104_ENCRYPTION = 5,
+};
+
+enum rtl_hal_state {
+        _HAL_STATE_STOP = 0,
+        _HAL_STATE_START = 1,
+};
+
+enum rtl_var_map {
+        /*reg map */
+        SYS_ISO_CTRL = 0,
+        SYS_FUNC_EN,
+        SYS_CLK,
+        MAC_RCR_AM,
+        MAC_RCR_AB,
+        MAC_RCR_ACRC32,
+        MAC_RCR_ACF,
+        MAC_RCR_AAP,
+
+        /*efuse map */
+        EFUSE_TEST,
+        EFUSE_CTRL,
+        EFUSE_CLK,
+        EFUSE_CLK_CTRL,
+        EFUSE_PWC_EV12V,
+        EFUSE_FEN_ELDR,
+        EFUSE_LOADER_CLK_EN,
+        EFUSE_ANA8M,
+        EFUSE_HWSET_MAX_SIZE,
+
+        /*CAM map */
+        RWCAM,
+        WCAMI,
+        RCAMO,
+        CAMDBG,
+        SECR,
+        SEC_CAM_NONE,
+        SEC_CAM_WEP40,
+        SEC_CAM_TKIP,
+        SEC_CAM_AES,
+        SEC_CAM_WEP104,
+
+        /*IMR map */
+        RTL_IMR_BCNDMAINT6,     /*Beacon DMA Interrupt 6 */
+        RTL_IMR_BCNDMAINT5,     /*Beacon DMA Interrupt 5 */
+        RTL_IMR_BCNDMAINT4,     /*Beacon DMA Interrupt 4 */
+        RTL_IMR_BCNDMAINT3,     /*Beacon DMA Interrupt 3 */
+        RTL_IMR_BCNDMAINT2,     /*Beacon DMA Interrupt 2 */
+        RTL_IMR_BCNDMAINT1,     /*Beacon DMA Interrupt 1 */
+        RTL_IMR_BCNDOK8,        /*Beacon Queue DMA OK Interrup 8 */
+        RTL_IMR_BCNDOK7,        /*Beacon Queue DMA OK Interrup 7 */
+        RTL_IMR_BCNDOK6,        /*Beacon Queue DMA OK Interrup 6 */
+        RTL_IMR_BCNDOK5,        /*Beacon Queue DMA OK Interrup 5 */
+        RTL_IMR_BCNDOK4,        /*Beacon Queue DMA OK Interrup 4 */
+        RTL_IMR_BCNDOK3,        /*Beacon Queue DMA OK Interrup 3 */
+        RTL_IMR_BCNDOK2,        /*Beacon Queue DMA OK Interrup 2 */
+        RTL_IMR_BCNDOK1,        /*Beacon Queue DMA OK Interrup 1 */
+        RTL_IMR_TIMEOUT2,       /*Timeout interrupt 2 */
+        RTL_IMR_TIMEOUT1,       /*Timeout interrupt 1 */
+        RTL_IMR_TXFOVW,         /*Transmit FIFO Overflow */
+        RTL_IMR_PSTIMEOUT,      /*Power save time out interrupt */
+        RTL_IMR_BcnInt,         /*Beacon DMA Interrupt 0 */
+        RTL_IMR_RXFOVW,         /*Receive FIFO Overflow */
+        RTL_IMR_RDU,            /*Receive Descriptor Unavailable */
+        RTL_IMR_ATIMEND,        /*For 92C,ATIM Window End Interrupt */
+        RTL_IMR_BDOK,           /*Beacon Queue DMA OK Interrup */
+        RTL_IMR_HIGHDOK,        /*High Queue DMA OK Interrupt */
+        RTL_IMR_TBDOK,          /*Transmit Beacon OK interrup */
+        RTL_IMR_MGNTDOK,        /*Management Queue DMA OK Interrupt */
+        RTL_IMR_TBDER,          /*For 92C,Transmit Beacon Error Interrupt */
+        RTL_IMR_BKDOK,          /*AC_BK DMA OK Interrupt */
+        RTL_IMR_BEDOK,          /*AC_BE DMA OK Interrupt */
+        RTL_IMR_VIDOK,          /*AC_VI DMA OK Interrupt */
+        RTL_IMR_VODOK,          /*AC_VO DMA Interrupt */
+        RTL_IMR_ROK,            /*Receive DMA OK Interrupt */
+        RTL_IBSS_INT_MASKS,     /*(RTL_IMR_BcnInt|RTL_IMR_TBDOK|RTL_IMR_TBDER)*/
+
+        /*CCK Rates, TxHT = 0 */
+        RTL_RC_CCK_RATE1M,
+        RTL_RC_CCK_RATE2M,
+        RTL_RC_CCK_RATE5_5M,
+        RTL_RC_CCK_RATE11M,
+
+        /*OFDM Rates, TxHT = 0 */
+        RTL_RC_OFDM_RATE6M,
+        RTL_RC_OFDM_RATE9M,
+        RTL_RC_OFDM_RATE12M,
+        RTL_RC_OFDM_RATE18M,
+        RTL_RC_OFDM_RATE24M,
+        RTL_RC_OFDM_RATE36M,
+        RTL_RC_OFDM_RATE48M,
+        RTL_RC_OFDM_RATE54M,
+
+        RTL_RC_HT_RATEMCS7,
+        RTL_RC_HT_RATEMCS15,
+
+        /*keep it last */
+        RTL_VAR_MAP_MAX,
+};
+
+/*Firmware PS mode for control LPS.*/
+enum _fw_ps_mode {
+        FW_PS_ACTIVE_MODE = 0,
+        FW_PS_MIN_MODE = 1,
+        FW_PS_MAX_MODE = 2,
+        FW_PS_DTIM_MODE = 3,
+        FW_PS_VOIP_MODE = 4,
+        FW_PS_UAPSD_WMM_MODE = 5,
+        FW_PS_UAPSD_MODE = 6,
+        FW_PS_IBSS_MODE = 7,
+        FW_PS_WWLAN_MODE = 8,
+        FW_PS_PM_Radio_Off = 9,
+        FW_PS_PM_Card_Disable = 10,
+};
+
+enum rt_psmode {
+        EACTIVE,                /*Active/Continuous access. */
+        EMAXPS,                 /*Max power save mode. */
+        EFASTPS,                /*Fast power save mode. */
+        EAUTOPS,                /*Auto power save mode. */
+};
+
+/*LED related.*/
+enum led_ctl_mode {
+        LED_CTL_POWER_ON = 1,
+        LED_CTL_LINK = 2,
+        LED_CTL_NO_LINK = 3,
+        LED_CTL_TX = 4,
+        LED_CTL_RX = 5,
+        LED_CTL_SITE_SURVEY = 6,
+        LED_CTL_POWER_OFF = 7,
+        LED_CTL_START_TO_LINK = 8,
+        LED_CTL_START_WPS = 9,
+        LED_CTL_STOP_WPS = 10,
+};
+
+enum rtl_led_pin {
+        LED_PIN_GPIO0,
+        LED_PIN_LED0,
+        LED_PIN_LED1,
+        LED_PIN_LED2
+};
+
+/*QoS related.*/
+/*acm implementation method.*/
+enum acm_method {
+        eAcmWay0_SwAndHw = 0,
+        eAcmWay1_HW = 1,
+        eAcmWay2_SW = 2,
+};
+
+/*aci/aifsn Field.
+Ref: WMM spec 2.2.2: WME Parameter Element, p.12.*/
+union aci_aifsn {
+        u8 char_data;
+
+        struct {
+                u8 aifsn:4;
+                u8 acm:1;
+                u8 aci:2;
+                u8 reserved:1;
+        } f;                    /* Field */
+};
+
+/*mlme related.*/
+enum wireless_mode {
+        WIRELESS_MODE_UNKNOWN = 0x00,
+        WIRELESS_MODE_A = 0x01,
+        WIRELESS_MODE_B = 0x02,
+        WIRELESS_MODE_G = 0x04,
+        WIRELESS_MODE_AUTO = 0x08,
+        WIRELESS_MODE_N_24G = 0x10,
+        WIRELESS_MODE_N_5G = 0x20
+};
+
+enum ratr_table_mode {
+        RATR_INX_WIRELESS_NGB = 0,
+        RATR_INX_WIRELESS_NG = 1,
+        RATR_INX_WIRELESS_NB = 2,
+        RATR_INX_WIRELESS_N = 3,
+        RATR_INX_WIRELESS_GB = 4,
+        RATR_INX_WIRELESS_G = 5,
+        RATR_INX_WIRELESS_B = 6,
+        RATR_INX_WIRELESS_MC = 7,
+        RATR_INX_WIRELESS_A = 8,
+};
+
+enum rtl_link_state {
+        MAC80211_NOLINK = 0,
+        MAC80211_LINKING = 1,
+        MAC80211_LINKED = 2,
+        MAC80211_LINKED_SCANNING = 3,
+};
+
+enum act_category {
+        ACT_CAT_QOS = 1,
+        ACT_CAT_DLS = 2,
+        ACT_CAT_BA = 3,
+        ACT_CAT_HT = 7,
+        ACT_CAT_WMM = 17,
+};
+
+enum ba_action {
+        ACT_ADDBAREQ = 0,
+        ACT_ADDBARSP = 1,
+        ACT_DELBA = 2,
+};
+
+struct octet_string {
+        u8 *octet;
+        u16 length;
+};
+
+struct rtl_hdr_3addr {
+        __le16 frame_ctl;
+        __le16 duration_id;
+        u8 addr1[ETH_ALEN];
+        u8 addr2[ETH_ALEN];
+        u8 addr3[ETH_ALEN];
+        __le16 seq_ctl;
+        u8 payload[0];
+} __packed;
+
+struct rtl_info_element {
+        u8 id;
+        u8 len;
+        u8 data[0];
+} __packed;
+
+struct rtl_probe_rsp {
+        struct rtl_hdr_3addr header;
+        u32 time_stamp[2];
+        __le16 beacon_interval;
+        __le16 capability;
+        /*SSID, supported rates, FH params, DS params,
+           CF params, IBSS params, TIM (if beacon), RSN */
+        struct rtl_info_element info_element[0];
+} __packed;
+
+/*LED related.*/
+/*ledpin Identify how to implement this SW led.*/
+struct rtl_led {
+        void *hw;
+        enum rtl_led_pin ledpin;
+        bool b_ledon;
+};
+
+struct rtl_led_ctl {
+        bool bled_opendrain;
+        struct rtl_led sw_led0;
+        struct rtl_led sw_led1;
+};
+
+struct rtl_qos_parameters {
+        __le16 cw_min;
+        __le16 cw_max;
+        u8 aifs;
+        u8 flag;
+        __le16 tx_op;
+} __packed;
+
+struct rt_smooth_data {
+        u32 elements[100];      /*array to store values */
+        u32 index;              /*index to current array to store */
+        u32 total_num;          /*num of valid elements */
+        u32 total_val;          /*sum of valid elements */
+};
+
+struct false_alarm_statistics {
+        u32 cnt_parity_fail;
+        u32 cnt_rate_illegal;
+        u32 cnt_crc8_fail;
+        u32 cnt_mcs_fail;
+        u32 cnt_ofdm_fail;
+        u32 cnt_cck_fail;
+        u32 cnt_all;
+};
+
+struct init_gain {
+        u8 xaagccore1;
+        u8 xbagccore1;
+        u8 xcagccore1;
+        u8 xdagccore1;
+        u8 cca;
+
+};
+
+struct wireless_stats {
+        unsigned long txbytesunicast;
+        unsigned long txbytesmulticast;
+        unsigned long txbytesbroadcast;
+        unsigned long rxbytesunicast;
+
+        long rx_snr_db[4];
+        /*Correct smoothed ss in Dbm, only used
+           in driver to report real power now. */
+        long recv_signal_power;
+        long signal_quality;
+        long last_sigstrength_inpercent;
+
+        u32 rssi_calculate_cnt;
+
+        /*Transformed, in dbm. Beautified signal
+           strength for UI, not correct. */
+        long signal_strength;
+
+        u8 rx_rssi_percentage[4];
+        u8 rx_evm_percentage[2];
+
+        struct rt_smooth_data ui_rssi;
+        struct rt_smooth_data ui_link_quality;
+};
+
+struct rate_adaptive {
+        u8 rate_adaptive_disabled;
+        u8 ratr_state;
+        u16 reserve;
+
+        u32 high_rssi_thresh_for_ra;
+        u32 high2low_rssi_thresh_for_ra;
+        u8 low2high_rssi_thresh_for_ra40m;
+        u32 low_rssi_thresh_for_ra40M;
+        u8 low2high_rssi_thresh_for_ra20m;
+        u32 low_rssi_thresh_for_ra20M;
+        u32 upper_rssi_threshold_ratr;
+        u32 middleupper_rssi_threshold_ratr;
+        u32 middle_rssi_threshold_ratr;
+        u32 middlelow_rssi_threshold_ratr;
+        u32 low_rssi_threshold_ratr;
+        u32 ultralow_rssi_threshold_ratr;
+        u32 low_rssi_threshold_ratr_40m;
+        u32 low_rssi_threshold_ratr_20m;
+        u8 ping_rssi_enable;
+        u32 ping_rssi_ratr;
+        u32 ping_rssi_thresh_for_ra;
+        u32 last_ratr;
+        u8 pre_ratr_state;
+};
+
+struct regd_pair_mapping {
+        u16 reg_dmnenum;
+        u16 reg_5ghz_ctl;
+        u16 reg_2ghz_ctl;
+};
+
+struct rtl_regulatory {
+        char alpha2[2];
+        u16 country_code;
+        u16 max_power_level;
+        u32 tp_scale;
+        u16 current_rd;
+        u16 current_rd_ext;
+        int16_t power_limit;
+        struct regd_pair_mapping *regpair;
+};
+
+struct rtl_rfkill {
+        bool rfkill_state;      /*0 is off, 1 is on */
+};
+
+struct rtl_phy {
+        struct bb_reg_def phyreg_def[4];        /*Radio A/B/C/D */
+        struct init_gain initgain_backup;
+        enum io_type current_io_type;
+
+        u8 rf_mode;
+        u8 rf_type;
+        u8 current_chan_bw;
+        u8 set_bwmode_inprogress;
+        u8 sw_chnl_inprogress;
+        u8 sw_chnl_stage;
+        u8 sw_chnl_step;
+        u8 current_channel;
+        u8 h2c_box_num;
+        u8 set_io_inprogress;
+
+        /*record for power tracking*/
+        s32 reg_e94;
+        s32 reg_e9c;
+        s32 reg_ea4;
+        s32 reg_eac;
+        s32 reg_eb4;
+        s32 reg_ebc;
+        s32 reg_ec4;
+        s32 reg_ecc;
+        u8 rfpienable;
+        u8 reserve_0;
+        u16 reserve_1;
+        u32 reg_c04, reg_c08, reg_874;
+        u32 adda_backup[16];
+        u32 iqk_mac_backup[IQK_MAC_REG_NUM];
+        u32 iqk_bb_backup[10];
+
+        bool b_rfpi_enable;
+
+        u8 pwrgroup_cnt;
+        u8 bcck_high_power;
+        /* 3 groups of pwr diff by rates*/
+        u32 mcs_txpwrlevel_origoffset[4][16];
+        u8 default_initialgain[4];
+
+        /*the current Tx power level*/
+        u8 cur_cck_txpwridx;
+        u8 cur_ofdm24g_txpwridx;
+
+        u32 rfreg_chnlval[2];
+        bool b_apk_done;
+
+        /*fsync*/
+        u8 framesync;
+        u32 framesync_c34;
+
+        u8 num_total_rfpath;
+};
+
+#define MAX_TID_COUNT                           9
+#define RTL_AGG_OFF                             0
+#define RTL_AGG_ON                              1
+#define RTL_AGG_EMPTYING_HW_QUEUE_ADDBA         2
+#define RTL_AGG_EMPTYING_HW_QUEUE_DELBA         3
+
+struct rtl_ht_agg {
+        u16 txq_id;
+        u16 wait_for_ba;
+        u16 start_idx;
+        u64 bitmap;
+        u32 rate_n_flags;
+        u8 agg_state;
+};
+
+struct rtl_tid_data {
+        u16 seq_number;
+        struct rtl_ht_agg agg;
+};
+
+struct rtl_priv;
+struct rtl_io {
+        struct device *dev;
+
+        /*PCI MEM map */
+        unsigned long pci_mem_end;      /*shared mem end        */
+        unsigned long pci_mem_start;    /*shared mem start */
+
+        /*PCI IO map */
+        unsigned long pci_base_addr;    /*device I/O address */
+
+        void (*write8_async) (struct rtl_priv *rtlpriv, u32 addr, u8 val);
+        void (*write16_async) (struct rtl_priv *rtlpriv, u32 addr, u16 val);
+        void (*write32_async) (struct rtl_priv *rtlpriv, u32 addr, u32 val);
+
+         u8(*read8_sync) (struct rtl_priv *rtlpriv, u32 addr);
+         u16(*read16_sync) (struct rtl_priv *rtlpriv, u32 addr);
+         u32(*read32_sync) (struct rtl_priv *rtlpriv, u32 addr);
+
+};
+
+struct rtl_mac {
+        u8 mac_addr[ETH_ALEN];
+        u8 mac80211_registered;
+        u8 beacon_enabled;
+
+        u32 tx_ss_num;
+        u32 rx_ss_num;
+
+        struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
+        struct ieee80211_hw *hw;
+        struct ieee80211_vif *vif;
+        enum nl80211_iftype opmode;
+
+        /*Probe Beacon management */
+        struct rtl_tid_data tids[MAX_TID_COUNT];
+        enum rtl_link_state link_state;
+
+        int n_channels;
+        int n_bitrates;
+
+        /*filters */
+        u32 rx_conf;
+        u16 rx_mgt_filter;
+        u16 rx_ctrl_filter;
+        u16 rx_data_filter;
+
+        bool act_scanning;
+        u8 cnt_after_linked;
+
+         /*RDG*/ bool rdg_en;
+
+         /*AP*/ u8 bssid[6];
+        u8 mcs[16];     /*16 bytes mcs for HT rates.*/
+        u32 basic_rates; /*b/g rates*/
+        u8 ht_enable;
+        u8 sgi_40;
+        u8 sgi_20;
+        u8 bw_40;
+        u8 mode;                /*wireless mode*/
+        u8 slot_time;
+        u8 short_preamble;
+        u8 use_cts_protect;
+        u8 cur_40_prime_sc;
+        u8 cur_40_prime_sc_bk;
+        u64 tsf;
+        u8 retry_short;
+        u8 retry_long;
+        u16 assoc_id;
+
+         /*IBSS*/ int beacon_interval;
+
+         /*AMPDU*/ u8 min_space_cfg;    /*For Min spacing configurations */
+        u8 max_mss_density;
+        u8 current_ampdu_factor;
+        u8 current_ampdu_density;
+
+        /*QOS & EDCA */
+        struct ieee80211_tx_queue_params edca_param[RTL_MAC80211_NUM_QUEUE];
+        struct rtl_qos_parameters ac[AC_MAX];
+};
+
+struct rtl_hal {
+        struct ieee80211_hw *hw;
+
+        enum intf_type interface;
+        u16 hw_type;            /*92c or 92d or 92s and so on */
+        u8 oem_id;
+        u8 version;             /*version of chip */
+        u8 state;               /*stop 0, start 1 */
+
+        /*firmware */
+        u8 *pfirmware;
+        bool b_h2c_setinprogress;
+        u8 last_hmeboxnum;
+        bool bfw_ready;
+        /*Reserve page start offset except beacon in TxQ. */
+        u8 fw_rsvdpage_startoffset;
+};
+
+struct rtl_security {
+        /*default 0 */
+        bool use_sw_sec;
+
+        bool being_setkey;
+        bool use_defaultkey;
+        /*Encryption Algorithm for Unicast Packet */
+        enum rt_enc_alg pairwise_enc_algorithm;
+        /*Encryption Algorithm for Brocast/Multicast */
+        enum rt_enc_alg group_enc_algorithm;
+
+        /*local Key buffer, indx 0 is for
+           pairwise key 1-4 is for agoup key. */
+        u8 key_buf[KEY_BUF_SIZE][MAX_KEY_LEN];
+        u8 key_len[KEY_BUF_SIZE];
+
+        /*The pointer of Pairwise Key,
+           it always points to KeyBuf[4] */
+        u8 *pairwise_key;
+};
+
+struct rtl_dm {
+        /*PHY status for DM */
+        long entry_min_undecoratedsmoothed_pwdb;
+        long undecorated_smoothed_pwdb; /*out dm */
+        long entry_max_undecoratedsmoothed_pwdb;
+        bool b_dm_initialgain_enable;
+        bool bdynamic_txpower_enable;
+        bool bcurrent_turbo_edca;
+        bool bis_any_nonbepkts; /*out dm */
+        bool bis_cur_rdlstate;
+        bool btxpower_trackingInit;
+        bool b_disable_framebursting;
+        bool b_cck_inch14;
+        bool btxpower_tracking;
+        bool b_useramask;
+        bool brfpath_rxenable[4];
+
+        u8 thermalvalue_iqk;
+        u8 thermalvalue_lck;
+        u8 thermalvalue;
+        u8 last_dtp_lvl;
+        u8 dynamic_txhighpower_lvl;     /*Tx high power level */
+        u8 dm_flag;     /*Indicate if each dynamic mechanism's status. */
+        u8 dm_type;
+        u8 txpower_track_control;
+
+        char ofdm_index[2];
+        char cck_index;
+};
+
+#define EFUSE_MAX_LOGICAL_SIZE                   128
+
+struct rtl_efuse {
+        bool bautoLoad_ok;
+        bool bootfromefuse;
+        u16 max_physical_size;
+        u8 contents[EFUSE_MAX_LOGICAL_SIZE];
+
+        u8 efuse_map[2][EFUSE_MAX_LOGICAL_SIZE];
+        u16 efuse_usedbytes;
+        u8 efuse_usedpercentage;
+
+        u8 autoload_failflag;
+
+        short epromtype;
+        u16 eeprom_vid;
+        u16 eeprom_did;
+        u16 eeprom_svid;
+        u16 eeprom_smid;
+        u8 eeprom_oemid;
+        u16 eeprom_channelplan;
+        u8 eeprom_version;
+
+        u8 dev_addr[6];
+
+        bool b_txpwr_fromeprom;
+        u8 eeprom_tssi[2];
+        u8 eeprom_pwrlimit_ht20[3];
+        u8 eeprom_pwrlimit_ht40[3];
+        u8 eeprom_chnlarea_txpwr_cck[2][3];
+        u8 eeprom_chnlarea_txpwr_ht40_1s[2][3];
+        u8 eeprom_chnlarea_txpwr_ht40_2sdiif[2][3];
+        u8 txpwrlevel_cck[2][14];
+        u8 txpwrlevel_ht40_1s[2][14];   /*For HT 40MHZ pwr */
+        u8 txpwrlevel_ht40_2s[2][14];   /*For HT 40MHZ pwr */
+
+        /*For power group */
+        u8 pwrgroup_ht20[2][14];
+        u8 pwrgroup_ht40[2][14];
+
+        char txpwr_ht20diff[2][14];     /*HT 20<->40 Pwr diff */
+        u8 txpwr_legacyhtdiff[2][14];   /*For HT<->legacy pwr diff */
+
+        u8 eeprom_regulatory;
+        u8 eeprom_thermalmeter;
+        /*ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
+        u8 thermalmeter[2];
+
+        u8 legacy_ht_txpowerdiff;       /*Legacy to HT rate power diff */
+        bool b_apk_thermalmeterignore;
+};
+
+struct rtl_ps_ctl {
+        bool set_rfpowerstate_inprogress;
+        bool b_in_powersavemode;
+        bool rfchange_inprogress;
+        bool b_swrf_processing;
+        bool b_hwradiooff;
+
+        u32 last_sleep_jiffies;
+        u32 last_awake_jiffies;
+        u32 last_delaylps_stamp_jiffies;
+
+        /*
+         * just for PCIE ASPM
+         * If it supports ASPM, Offset[560h] = 0x40,
+         * otherwise Offset[560h] = 0x00.
+         * */
+        bool b_support_aspm;
+        bool b_support_backdoor;
+
+        /*for LPS */
+        enum rt_psmode dot11_psmode;    /*Power save mode configured. */
+        bool b_leisure_ps;
+        bool b_fwctrl_lps;
+        u8 fwctrl_psmode;
+        /*For Fw control LPS mode */
+        u8 b_reg_fwctrl_lps;
+        /*Record Fw PS mode status. */
+        bool b_fw_current_inpsmode;
+        u8 reg_max_lps_awakeintvl;
+        bool report_linked;
+
+        /*for IPS */
+        bool b_inactiveps;
+
+        u32 rfoff_reason;
+
+        /*RF OFF Level */
+        u32 cur_ps_level;
+        u32 reg_rfps_level;
+
+        /*just for PCIE ASPM */
+        u8 const_amdpci_aspm;
+
+        enum rf_pwrstate inactive_pwrstate;
+        enum rf_pwrstate rfpwr_state;   /*cur power state */
+};
+
+struct rtl_stats {
+        u32 mac_time[2];
+        s8 rssi;
+        u8 signal;
+        u8 noise;
+        u16 rate;               /*in 100 kbps */
+        u8 received_channel;
+        u8 control;
+        u8 mask;
+        u8 freq;
+        u16 len;
+        u64 tsf;
+        u32 beacon_time;
+        u8 nic_type;
+        u16 length;
+        u8 signalquality;       /*in 0-100 index. */
+        /*
+         * Real power in dBm for this packet,
+         * no beautification and aggregation.
+         * */
+        s32 recvsignalpower;
+        s8 rxpower;             /*in dBm Translate from PWdB */
+        u8 signalstrength;      /*in 0-100 index. */
+        u16 b_hwerror:1;
+        u16 b_crc:1;
+        u16 b_icv:1;
+        u16 b_shortpreamble:1;
+        u16 antenna:1;
+        u16 decrypted:1;
+        u16 wakeup:1;
+        u32 timestamp_low;
+        u32 timestamp_high;
+
+        u8 rx_drvinfo_size;
+        u8 rx_bufshift;
+        bool b_isampdu;
+        bool rx_is40Mhzpacket;
+        u32 rx_pwdb_all;
+        u8 rx_mimo_signalstrength[4];   /*in 0~100 index */
+        s8 rx_mimo_signalquality[2];
+        bool b_packet_matchbssid;
+        bool b_is_cck;
+        bool b_packet_toself;
+        bool b_packet_beacon;   /*for rssi */
+        char cck_adc_pwdb[4];   /*for rx path selection */
+};
+
+struct rt_link_detect {
+        u32 num_tx_in4period[4];
+        u32 num_rx_in4period[4];
+
+        u32 num_tx_inperiod;
+        u32 num_rx_inperiod;
+
+        bool b_busytraffic;
+        bool b_higher_busytraffic;
+        bool b_higher_busyrxtraffic;
+};
+
+struct rtl_tcb_desc {
+        u8 b_packet_bw:1;
+        u8 b_multicast:1;
+        u8 b_broadcast:1;
+
+        u8 b_rts_stbc:1;
+        u8 b_rts_enable:1;
+        u8 b_cts_enable:1;
+        u8 b_rts_use_shortpreamble:1;
+        u8 b_rts_use_shortgi:1;
+        u8 rts_sc:1;
+        u8 b_rts_bw:1;
+        u8 rts_rate;
+
+        u8 use_shortgi:1;
+        u8 use_shortpreamble:1;
+        u8 use_driver_rate:1;
+        u8 disable_ratefallback:1;
+
+        u8 ratr_index;
+        u8 mac_id;
+        u8 hw_rate;
+};
+
+struct rtl_hal_ops {
+        int (*init_sw_vars) (struct ieee80211_hw *hw);
+        void (*deinit_sw_vars) (struct ieee80211_hw *hw);
+        void (*read_eeprom_info) (struct ieee80211_hw *hw);
+        void (*interrupt_recognized) (struct ieee80211_hw *hw,
+                                      u32 *p_inta, u32 *p_intb);
+        int (*hw_init) (struct ieee80211_hw *hw);
+        void (*hw_disable) (struct ieee80211_hw *hw);
+        void (*enable_interrupt) (struct ieee80211_hw *hw);
+        void (*disable_interrupt) (struct ieee80211_hw *hw);
+        int (*set_network_type) (struct ieee80211_hw *hw,
+                                 enum nl80211_iftype type);
+        void (*set_bw_mode) (struct ieee80211_hw *hw,
+                             enum nl80211_channel_type ch_type);
+         u8(*switch_channel) (struct ieee80211_hw *hw);
+        void (*set_qos) (struct ieee80211_hw *hw, int aci);
+        void (*set_bcn_reg) (struct ieee80211_hw *hw);
+        void (*set_bcn_intv) (struct ieee80211_hw *hw);
+        void (*update_interrupt_mask) (struct ieee80211_hw *hw,
+                                       u32 add_msr, u32 rm_msr);
+        void (*get_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
+        void (*set_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
+        void (*update_rate_table) (struct ieee80211_hw *hw);
+        void (*update_rate_mask) (struct ieee80211_hw *hw, u8 rssi_level);
+        void (*fill_tx_desc) (struct ieee80211_hw *hw,
+                              struct ieee80211_hdr *hdr, u8 *pdesc_tx,
+                              struct ieee80211_tx_info *info,
+                              struct sk_buff *skb, unsigned int queue_index);
+        void (*fill_tx_cmddesc) (struct ieee80211_hw *hw, u8 *pdesc,
+                                 bool b_firstseg, bool b_lastseg,
+                                 struct sk_buff *skb);
+         bool(*query_rx_desc) (struct ieee80211_hw *hw,
+                               struct rtl_stats *stats,
+                               struct ieee80211_rx_status *rx_status,
+                               u8 *pdesc, struct sk_buff *skb);
+        void (*set_channel_access) (struct ieee80211_hw *hw);
+         bool(*radio_onoff_checking) (struct ieee80211_hw *hw, u8 *valid);
+        void (*dm_watchdog) (struct ieee80211_hw *hw);
+        void (*scan_operation_backup) (struct ieee80211_hw *hw, u8 operation);
+         bool(*set_rf_power_state) (struct ieee80211_hw *hw,
+                                    enum rf_pwrstate rfpwr_state);
+        void (*led_control) (struct ieee80211_hw *hw,
+                             enum led_ctl_mode ledaction);
+        void (*set_desc) (u8 *pdesc, bool istx, u8 desc_name, u8 *val);
+         u32(*get_desc) (u8 *pdesc, bool istx, u8 desc_name);
+        void (*tx_polling) (struct ieee80211_hw *hw, unsigned int hw_queue);
+        void (*enable_hw_sec) (struct ieee80211_hw *hw);
+        void (*set_key) (struct ieee80211_hw *hw, u32 key_index,
+                         u8 *p_macaddr, bool is_group, u8 enc_algo,
+                         bool is_wepkey, bool clear_all);
+        void (*init_sw_leds) (struct ieee80211_hw *hw);
+        void (*deinit_sw_leds) (struct ieee80211_hw *hw);
+         u32(*get_bbreg) (struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
+        void (*set_bbreg) (struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
+                           u32 data);
+         u32(*get_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
+                          u32 regaddr, u32 bitmask);
+        void (*set_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
+                           u32 regaddr, u32 bitmask, u32 data);
+};
+
+struct rtl_intf_ops {
+        /*com */
+        int (*adapter_start) (struct ieee80211_hw *hw);
+        void (*adapter_stop) (struct ieee80211_hw *hw);
+
+        int (*adapter_tx) (struct ieee80211_hw *hw, struct sk_buff *skb);
+        int (*reset_trx_ring) (struct ieee80211_hw *hw);
+
+        /*pci */
+        void (*disable_aspm) (struct ieee80211_hw *hw);
+        void (*enable_aspm) (struct ieee80211_hw *hw);
+
+        /*usb */
+};
+
+struct rtl_mod_params {
+        /* default: 0 = using hardware encryption */
+        int sw_crypto;
+};
+
+struct rtl_hal_cfg {
+        char *name;
+        char *fw_name;
+        struct rtl_hal_ops *ops;
+        struct rtl_mod_params *mod_params;
+
+        /*this map used for some registers or vars
+           defined int HAL but used in MAIN */
+        u32 maps[RTL_VAR_MAP_MAX];
+
+};
+
+struct rtl_locks {
+        /* mutex */
+        struct mutex conf_mutex;
+
+        /*spin lock */
+        spinlock_t ips_lock;
+        spinlock_t irq_th_lock;
+        spinlock_t h2c_lock;
+        spinlock_t rf_ps_lock;
+        spinlock_t rf_lock;
+        spinlock_t lps_lock;
+};
+
+struct rtl_works {
+        struct ieee80211_hw *hw;
+
+        /*timer */
+        struct timer_list watchdog_timer;
+
+        /*task */
+        struct tasklet_struct irq_tasklet;
+        struct tasklet_struct irq_prepare_bcn_tasklet;
+
+        /*work queue */
+        struct workqueue_struct *rtl_wq;
+        struct delayed_work watchdog_wq;
+        struct delayed_work ips_nic_off_wq;
+};
+
+struct rtl_debug {
+        u32 dbgp_type[DBGP_TYPE_MAX];
+        u32 global_debuglevel;
+        u64 global_debugcomponents;
+};
+
+struct rtl_priv {
+        struct rtl_locks locks;
+        struct rtl_works works;
+        struct rtl_mac mac80211;
+        struct rtl_hal rtlhal;
+        struct rtl_regulatory regd;
+        struct rtl_rfkill rfkill;
+        struct rtl_io io;
+        struct rtl_phy phy;
+        struct rtl_dm dm;
+        struct rtl_security sec;
+        struct rtl_efuse efuse;
+
+        struct rtl_ps_ctl psc;
+        struct rate_adaptive ra;
+        struct wireless_stats stats;
+        struct rt_link_detect link_info;
+        struct false_alarm_statistics falsealm_cnt;
+
+        struct rtl_rate_priv *rate_priv;
+
+        struct rtl_debug dbg;
+
+        /*
+         *hal_cfg : for diff cards
+         *intf_ops : for diff interrface usb/pcie
+         */
+        struct rtl_hal_cfg *cfg;
+        struct rtl_intf_ops *intf_ops;
+
+        /*this var will be set by set_bit,
+           and was used to indicate status of
+           interface or hardware */
+        unsigned long status;
+
+        /*This must be the last item so
+           that it points to the data allocated
+           beyond  this structure like:
+           rtl_pci_priv or rtl_usb_priv */
+        u8 priv[0];
+};
+
+#define rtl_priv(hw)            (((struct rtl_priv *)(hw)->priv))
+#define rtl_mac(rtlpriv)        (&((rtlpriv)->mac80211))
+#define rtl_hal(rtlpriv)        (&((rtlpriv)->rtlhal))
+#define rtl_efuse(rtlpriv)      (&((rtlpriv)->efuse))
+#define rtl_psc(rtlpriv)        (&((rtlpriv)->psc))
+
+/****************************************
+        mem access macro define start
+        Call endian free function when
+        1. Read/write packet content.
+        2. Before write integer to IO.
+        3. After read integer from IO.
+****************************************/
+/* Convert little data endian to host */
+#define EF1BYTE(_val)           \
+        ((u8)(_val))
+#define EF2BYTE(_val)           \
+        (le16_to_cpu(_val))
+#define EF4BYTE(_val)           \
+        (le32_to_cpu(_val))
+
+/* Read data from memory */
+#define READEF1BYTE(_ptr)       \
+        EF1BYTE(*((u8 *)(_ptr)))
+#define READEF2BYTE(_ptr)       \
+        EF2BYTE(*((u16 *)(_ptr)))
+#define READEF4BYTE(_ptr)       \
+        EF4BYTE(*((u32 *)(_ptr)))
+
+/* Write data to memory */
+#define WRITEEF1BYTE(_ptr, _val)        \
+        (*((u8 *)(_ptr))) = EF1BYTE(_val)
+#define WRITEEF2BYTE(_ptr, _val)        \
+        (*((u16 *)(_ptr))) = EF2BYTE(_val)
+#define WRITEEF4BYTE(_ptr, _val)        \
+        (*((u32 *)(_ptr))) = EF4BYTE(_val)
+
+/*Example:
+BIT_LEN_MASK_32(0) => 0x00000000
+BIT_LEN_MASK_32(1) => 0x00000001
+BIT_LEN_MASK_32(2) => 0x00000003
+BIT_LEN_MASK_32(32) => 0xFFFFFFFF*/
+#define BIT_LEN_MASK_32(__bitlen)        \
+        (0xFFFFFFFF >> (32 - (__bitlen)))
+#define BIT_LEN_MASK_16(__bitlen)        \
+        (0xFFFF >> (16 - (__bitlen)))
+#define BIT_LEN_MASK_8(__bitlen) \
+        (0xFF >> (8 - (__bitlen)))
+
+/*Example:
+BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
+BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000*/
+#define BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen) \
+        (BIT_LEN_MASK_32(__bitlen) << (__bitoffset))
+#define BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen) \
+        (BIT_LEN_MASK_16(__bitlen) << (__bitoffset))
+#define BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen) \
+        (BIT_LEN_MASK_8(__bitlen) << (__bitoffset))
+
+/*Description:
+Return 4-byte value in host byte ordering from
+4-byte pointer in little-endian system.*/
+#define LE_P4BYTE_TO_HOST_4BYTE(__pstart) \
+        (EF4BYTE(*((u32 *)(__pstart))))
+#define LE_P2BYTE_TO_HOST_2BYTE(__pstart) \
+        (EF2BYTE(*((u16 *)(__pstart))))
+#define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \
+        (EF1BYTE(*((u8 *)(__pstart))))
+
+/*Description:
+Translate subfield (continuous bits in little-endian) of 4-byte
+value to host byte ordering.*/
+#define LE_BITS_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                (LE_P4BYTE_TO_HOST_4BYTE(__pstart) >> (__bitoffset))  & \
+                BIT_LEN_MASK_32(__bitlen) \
+        )
+#define LE_BITS_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                (LE_P2BYTE_TO_HOST_2BYTE(__pstart) >> (__bitoffset)) & \
+                BIT_LEN_MASK_16(__bitlen) \
+        )
+#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                (LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \
+                BIT_LEN_MASK_8(__bitlen) \
+        )
+
+/*Description:
+Mask subfield (continuous bits in little-endian) of 4-byte value
+and return the result in 4-byte value in host byte ordering.*/
+#define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                LE_P4BYTE_TO_HOST_4BYTE(__pstart)  & \
+                (~BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen)) \
+        )
+#define LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                LE_P2BYTE_TO_HOST_2BYTE(__pstart) & \
+                (~BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen)) \
+        )
+#define LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
+        ( \
+                LE_P1BYTE_TO_HOST_1BYTE(__pstart) & \
+                (~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
+        )
+
+/*Description:
+Set subfield of little-endian 4-byte value to specified value.  */
+#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
+        *((u32 *)(__pstart)) = EF4BYTE \
+        ( \
+                LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
+                ((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
+        );
+#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
+        *((u16 *)(__pstart)) = EF2BYTE \
+        ( \
+                LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
+                ((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
+        );
+#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
+        *((u8 *)(__pstart)) = EF1BYTE \
+        ( \
+                LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) | \
+                ((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
+        );
+
+/****************************************
+        mem access macro define end
+****************************************/
+
+#define packet_get_type(_packet) (EF1BYTE((_packet).octet[0]) & 0xFC)
+#define RTL_WATCH_DOG_TIME      2000
+#define MSECS(t)                msecs_to_jiffies(t)
+#define WLAN_FC_GET_VERS(fc)    ((fc) & IEEE80211_FCTL_VERS)
+#define WLAN_FC_GET_TYPE(fc)    ((fc) & IEEE80211_FCTL_FTYPE)
+#define WLAN_FC_GET_STYPE(fc)   ((fc) & IEEE80211_FCTL_STYPE)
+#define WLAN_FC_MORE_DATA(fc)   ((fc) & IEEE80211_FCTL_MOREDATA)
+#define SEQ_TO_SN(seq)          (((seq) & IEEE80211_SCTL_SEQ) >> 4)
+#define SN_TO_SEQ(ssn)          (((ssn) << 4) & IEEE80211_SCTL_SEQ)
+#define MAX_SN                  ((IEEE80211_SCTL_SEQ) >> 4)
+
+#define RT_RF_OFF_LEVL_ASPM             BIT(0)  /*PCI ASPM */
+#define RT_RF_OFF_LEVL_CLK_REQ          BIT(1)  /*PCI clock request */
+#define RT_RF_OFF_LEVL_PCI_D3           BIT(2)  /*PCI D3 mode */
+/*NIC halt, re-initialize hw parameters*/
+#define RT_RF_OFF_LEVL_HALT_NIC         BIT(3)
+#define RT_RF_OFF_LEVL_FREE_FW          BIT(4)  /*FW free, re-download the FW */
+#define RT_RF_OFF_LEVL_FW_32K           BIT(5)  /*FW in 32k */
+/*Always enable ASPM and Clock Req in initialization.*/
+#define RT_RF_PS_LEVEL_ALWAYS_ASPM      BIT(6)
+/*When LPS is on, disable 2R if no packet is received or transmittd.*/
+#define RT_RF_LPS_DISALBE_2R            BIT(30)
+#define RT_RF_LPS_LEVEL_ASPM            BIT(31) /*LPS with ASPM */
+#define RT_IN_PS_LEVEL(ppsc, _ps_flg)           \
+        ((ppsc->cur_ps_level & _ps_flg) ? true : false)
+#define RT_CLEAR_PS_LEVEL(ppsc, _ps_flg)        \
+        (ppsc->cur_ps_level &= (~(_ps_flg)))
+#define RT_SET_PS_LEVEL(ppsc, _ps_flg)          \
+        (ppsc->cur_ps_level |= _ps_flg)
+
+#define container_of_dwork_rtl(x, y, z) \
+        container_of(container_of(x, struct delayed_work, work), y, z)
+
+#define FILL_OCTET_STRING(_os, _octet, _len)    \
+                (_os).octet = (u8 *)(_octet);           \
+                (_os).length = (_len);
+
+#define CP_MACADDR(des, src)    \
+        ((des)[0] = (src)[0], (des)[1] = (src)[1],\
+        (des)[2] = (src)[2], (des)[3] = (src)[3],\
+        (des)[4] = (src)[4], (des)[5] = (src)[5])
+
+static inline u8 rtl_read_byte(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return rtlpriv->io.read8_sync(rtlpriv, addr);
+}
+
+static inline u16 rtl_read_word(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return rtlpriv->io.read16_sync(rtlpriv, addr);
+}
+
+static inline u32 rtl_read_dword(struct rtl_priv *rtlpriv, u32 addr)
+{
+        return rtlpriv->io.read32_sync(rtlpriv, addr);
+}
+
+static inline void rtl_write_byte(struct rtl_priv *rtlpriv, u32 addr, u8 val8)
+{
+        rtlpriv->io.write8_async(rtlpriv, addr, val8);
+}
+
+static inline void rtl_write_word(struct rtl_priv *rtlpriv, u32 addr, u16 val16)
+{
+        rtlpriv->io.write16_async(rtlpriv, addr, val16);
+}
+
+static inline void rtl_write_dword(struct rtl_priv *rtlpriv,
+                                   u32 addr, u32 val32)
+{
+        rtlpriv->io.write32_async(rtlpriv, addr, val32);
+}
+
+static inline u32 rtl_get_bbreg(struct ieee80211_hw *hw,
+                                u32 regaddr, u32 bitmask)
+{
+        return ((struct rtl_priv *)(hw)->priv)->cfg->ops->get_bbreg(hw,
+                                                                    regaddr,
+                                                                    bitmask);
+}
+
+static inline void rtl_set_bbreg(struct ieee80211_hw *hw, u32 regaddr,
+                                 u32 bitmask, u32 data)
+{
+        ((struct rtl_priv *)(hw)->priv)->cfg->ops->set_bbreg(hw,
+                                                             regaddr, bitmask,
+                                                             data);
+
+}
+
+static inline u32 rtl_get_rfreg(struct ieee80211_hw *hw,
+                                enum radio_path rfpath, u32 regaddr,
+                                u32 bitmask)
+{
+        return ((struct rtl_priv *)(hw)->priv)->cfg->ops->get_rfreg(hw,
+                                                                    rfpath,
+                                                                    regaddr,
+                                                                    bitmask);
+}
+
+static inline void rtl_set_rfreg(struct ieee80211_hw *hw,
+                                 enum radio_path rfpath, u32 regaddr,
+                                 u32 bitmask, u32 data)
+{
+        ((struct rtl_priv *)(hw)->priv)->cfg->ops->set_rfreg(hw,
+                                                             rfpath, regaddr,
+                                                             bitmask, data);
+}
+
+static inline bool is_hal_stop(struct rtl_hal *rtlhal)
+{
+        return (_HAL_STATE_STOP == rtlhal->state);
+}
+
+static inline void set_hal_start(struct rtl_hal *rtlhal)
+{
+        rtlhal->state = _HAL_STATE_START;
+}
+
+static inline void set_hal_stop(struct rtl_hal *rtlhal)
+{
+        rtlhal->state = _HAL_STATE_STOP;
+}
+
+static inline u8 get_rf_type(struct rtl_phy *rtlphy)
+{
+        return rtlphy->rf_type;
+}
+
+#endif
diff --git a/drivers/net/wireless/wl1251/sdio.c b/drivers/net/wireless/wl1251/sdio.c
index 596d90ecba33..d550b5e68d3c 100644
--- a/drivers/net/wireless/wl1251/sdio.c
+++ b/drivers/net/wireless/wl1251/sdio.c
@@ -252,7 +252,7 @@ static int wl1251_sdio_probe(struct sdio_func *func,
         wl->if_ops = &wl1251_sdio_ops;
 
         wl12xx_board_data = wl12xx_get_platform_data();
-        if (wl12xx_board_data != NULL) {
+        if (!IS_ERR(wl12xx_board_data)) {
                 wl->set_power = wl12xx_board_data->set_power;
                 wl->irq = wl12xx_board_data->irq;
                 wl->use_eeprom = wl12xx_board_data->use_eeprom;
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
index d2adeb1f72b7..0e65bce457d6 100644
--- a/drivers/net/wireless/wl12xx/Kconfig
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -52,6 +52,16 @@ config WL12XX_SDIO
           If you choose to build a module, it'll be called wl12xx_sdio.
           Say N if unsure.
 
+config WL12XX_SDIO_TEST
+        tristate "TI wl12xx SDIO testing support"
+        depends on WL12XX && MMC
+        default n
+        ---help---
+          This module adds support for the SDIO bus testing with the
+          TI wl12xx chipsets.  You probably don't want this unless you are
+          testing a new hardware platform.  Select this if you want to test the
+          SDIO bus which is connected to the wl12xx chip.
+
 config WL12XX_PLATFORM_DATA
         bool
         depends on WL12XX_SDIO != n || WL1251_SDIO != n
diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile
index 005a758174d9..521c0414e52e 100644
--- a/drivers/net/wireless/wl12xx/Makefile
+++ b/drivers/net/wireless/wl12xx/Makefile
@@ -3,11 +3,14 @@ wl12xx-objs		= main.o cmd.o io.o event.o tx.o rx.o ps.o acx.o \
 
 wl12xx_spi-objs = spi.o
 wl12xx_sdio-objs        = sdio.o
+wl12xx_sdio_test-objs = sdio_test.o
 
 wl12xx-$(CONFIG_NL80211_TESTMODE)       += testmode.o
 obj-$(CONFIG_WL12XX)                    += wl12xx.o
 obj-$(CONFIG_WL12XX_SPI)                += wl12xx_spi.o
 obj-$(CONFIG_WL12XX_SDIO)               += wl12xx_sdio.o
 
+obj-$(CONFIG_WL12XX_SDIO_TEST)  += wl12xx_sdio_test.o
+
 # small builtin driver bit
 obj-$(CONFIG_WL12XX_PLATFORM_DATA)      += wl12xx_platform_data.o
diff --git a/drivers/net/wireless/wl12xx/acx.c b/drivers/net/wireless/wl12xx/acx.c
index 7cbaeb6d2a37..cc4068d2b4a8 100644
--- a/drivers/net/wireless/wl12xx/acx.c
+++ b/drivers/net/wireless/wl12xx/acx.c
@@ -1041,7 +1041,7 @@ out:
         return ret;
 }
 
-int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, __be32 address)
+int wl1271_acx_arp_ip_filter(struct wl1271 *wl, u8 enable, __be32 address)
 {
         struct wl1271_acx_arp_filter *acx;
         int ret;
@@ -1057,7 +1057,7 @@ int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, __be32 address)
         acx->version = ACX_IPV4_VERSION;
         acx->enable = enable;
 
-        if (enable == true)
+        if (enable)
                 memcpy(acx->address, &address, ACX_IPV4_ADDR_SIZE);
 
         ret = wl1271_cmd_configure(wl, ACX_ARP_IP_FILTER,
diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/wl12xx/acx.h
index 75a6306ff554..9cbc3f40c8dd 100644
--- a/drivers/net/wireless/wl12xx/acx.h
+++ b/drivers/net/wireless/wl12xx/acx.h
@@ -868,10 +868,15 @@ struct wl1271_acx_bet_enable {
 #define ACX_IPV4_VERSION 4
 #define ACX_IPV6_VERSION 6
 #define ACX_IPV4_ADDR_SIZE 4
+
+/* bitmap of enabled arp_filter features */
+#define ACX_ARP_FILTER_ARP_FILTERING    BIT(0)
+#define ACX_ARP_FILTER_AUTO_ARP         BIT(1)
+
 struct wl1271_acx_arp_filter {
         struct acx_header header;
         u8 version;         /* ACX_IPV4_VERSION, ACX_IPV6_VERSION */
-        u8 enable;          /* 1 to enable ARP filtering, 0 to disable */
+        u8 enable;          /* bitmap of enabled ARP filtering features */
         u8 padding[2];
         u8 address[16];     /* The configured device IP address - all ARP
                                requests directed to this IP address will pass
@@ -1168,7 +1173,7 @@ int wl1271_acx_init_mem_config(struct wl1271 *wl);
 int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);
 int wl1271_acx_smart_reflex(struct wl1271 *wl);
 int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable);
-int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, __be32 address);
+int wl1271_acx_arp_ip_filter(struct wl1271 *wl, u8 enable, __be32 address);
 int wl1271_acx_pm_config(struct wl1271 *wl);
 int wl1271_acx_keep_alive_mode(struct wl1271 *wl, bool enable);
 int wl1271_acx_keep_alive_config(struct wl1271 *wl, u8 index, u8 tpl_valid);
diff --git a/drivers/net/wireless/wl12xx/boot.c b/drivers/net/wireless/wl12xx/boot.c
index 1eafb8175832..4a9f929725fd 100644
--- a/drivers/net/wireless/wl12xx/boot.c
+++ b/drivers/net/wireless/wl12xx/boot.c
@@ -467,7 +467,8 @@ static void wl1271_boot_hw_version(struct wl1271 *wl)
         wl->hw_pg_ver = (s8)fuse;
 }
 
-int wl1271_boot(struct wl1271 *wl)
+/* uploads NVS and firmware */
+int wl1271_load_firmware(struct wl1271 *wl)
 {
         int ret = 0;
         u32 tmp, clk, pause;
@@ -572,6 +573,20 @@ int wl1271_boot(struct wl1271 *wl)
         if (ret < 0)
                 goto out;
 
+out:
+        return ret;
+}
+EXPORT_SYMBOL_GPL(wl1271_load_firmware);
+
+int wl1271_boot(struct wl1271 *wl)
+{
+        int ret;
+
+        /* upload NVS and firmware */
+        ret = wl1271_load_firmware(wl);
+        if (ret)
+                return ret;
+
         /* 10.5 start firmware */
         ret = wl1271_boot_run_firmware(wl);
         if (ret < 0)
diff --git a/drivers/net/wireless/wl12xx/boot.h b/drivers/net/wireless/wl12xx/boot.h
index c7d771959f3a..d67dcffa31eb 100644
--- a/drivers/net/wireless/wl12xx/boot.h
+++ b/drivers/net/wireless/wl12xx/boot.h
@@ -27,6 +27,7 @@
 #include "wl12xx.h"
 
 int wl1271_boot(struct wl1271 *wl);
+int wl1271_load_firmware(struct wl1271 *wl);
 
 #define WL1271_NO_SUBBANDS 8
 #define WL1271_NO_POWER_LEVELS 4
diff --git a/drivers/net/wireless/wl12xx/cmd.c b/drivers/net/wireless/wl12xx/cmd.c
index f3d0541aaad6..0106628aa5a2 100644
--- a/drivers/net/wireless/wl12xx/cmd.c
+++ b/drivers/net/wireless/wl12xx/cmd.c
@@ -611,6 +611,75 @@ out:
         return ret;
 }
 
+struct sk_buff *wl1271_cmd_build_ap_probe_req(struct wl1271 *wl,
+                                              struct sk_buff *skb)
+{
+        int ret;
+
+        if (!skb)
+                skb = ieee80211_ap_probereq_get(wl->hw, wl->vif);
+        if (!skb)
+                goto out;
+
+        wl1271_dump(DEBUG_SCAN, "AP PROBE REQ: ", skb->data, skb->len);
+
+        if (wl->band == IEEE80211_BAND_2GHZ)
+                ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_2_4,
+                                              skb->data, skb->len, 0,
+                                              wl->conf.tx.basic_rate);
+        else
+                ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_5,
+                                              skb->data, skb->len, 0,
+                                              wl->conf.tx.basic_rate_5);
+
+        if (ret < 0)
+                wl1271_error("Unable to set ap probe request template.");
+
+out:
+        return skb;
+}
+
+int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, __be32 ip_addr)
+{
+        int ret;
+        struct wl12xx_arp_rsp_template tmpl;
+        struct ieee80211_hdr_3addr *hdr;
+        struct arphdr *arp_hdr;
+
+        memset(&tmpl, 0, sizeof(tmpl));
+
+        /* mac80211 header */
+        hdr = &tmpl.hdr;
+        hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
+                                         IEEE80211_STYPE_DATA |
+                                         IEEE80211_FCTL_TODS);
+        memcpy(hdr->addr1, wl->vif->bss_conf.bssid, ETH_ALEN);
+        memcpy(hdr->addr2, wl->vif->addr, ETH_ALEN);
+        memset(hdr->addr3, 0xff, ETH_ALEN);
+
+        /* llc layer */
+        memcpy(tmpl.llc_hdr, rfc1042_header, sizeof(rfc1042_header));
+        tmpl.llc_type = htons(ETH_P_ARP);
+
+        /* arp header */
+        arp_hdr = &tmpl.arp_hdr;
+        arp_hdr->ar_hrd = htons(ARPHRD_ETHER);
+        arp_hdr->ar_pro = htons(ETH_P_IP);
+        arp_hdr->ar_hln = ETH_ALEN;
+        arp_hdr->ar_pln = 4;
+        arp_hdr->ar_op = htons(ARPOP_REPLY);
+
+        /* arp payload */
+        memcpy(tmpl.sender_hw, wl->vif->addr, ETH_ALEN);
+        tmpl.sender_ip = ip_addr;
+
+        ret = wl1271_cmd_template_set(wl, CMD_TEMPL_ARP_RSP,
+                                      &tmpl, sizeof(tmpl), 0,
+                                      wl->basic_rate);
+
+        return ret;
+}
+
 int wl1271_build_qos_null_data(struct wl1271 *wl)
 {
         struct ieee80211_qos_hdr template;
diff --git a/drivers/net/wireless/wl12xx/cmd.h b/drivers/net/wireless/wl12xx/cmd.h
index 16d1bf814e76..2a1d9db7ceb8 100644
--- a/drivers/net/wireless/wl12xx/cmd.h
+++ b/drivers/net/wireless/wl12xx/cmd.h
@@ -49,6 +49,9 @@ int wl1271_cmd_build_ps_poll(struct wl1271 *wl, u16 aid);
 int wl1271_cmd_build_probe_req(struct wl1271 *wl,
                                const u8 *ssid, size_t ssid_len,
                                const u8 *ie, size_t ie_len, u8 band);
+struct sk_buff *wl1271_cmd_build_ap_probe_req(struct wl1271 *wl,
+                                              struct sk_buff *skb);
+int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, __be32 ip_addr);
 int wl1271_build_qos_null_data(struct wl1271 *wl);
 int wl1271_cmd_build_klv_null_data(struct wl1271 *wl);
 int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id);
@@ -122,6 +125,7 @@ enum cmd_templ {
         CMD_TEMPL_CTS,           /*
                                   * For CTS-to-self (FastCTS) mechanism
                                   * for BT/WLAN coexistence (SoftGemini). */
+        CMD_TEMPL_ARP_RSP,
         CMD_TEMPL_MAX = 0xff
 };
 
diff --git a/drivers/net/wireless/wl12xx/debugfs.c b/drivers/net/wireless/wl12xx/debugfs.c
index dd71b7d2105c..ec6077760157 100644
--- a/drivers/net/wireless/wl12xx/debugfs.c
+++ b/drivers/net/wireless/wl12xx/debugfs.c
@@ -66,19 +66,10 @@ static const struct file_operations name## _ops = {			\
 };
 
 #define DEBUGFS_ADD(name, parent)                                       \
-        wl->debugfs.name = debugfs_create_file(#name, 0400, parent,     \
-                                               wl, &name## _ops);       \
-        if (IS_ERR(wl->debugfs.name)) {                                 \
-                ret = PTR_ERR(wl->debugfs.name);                        \
-                wl->debugfs.name = NULL;                                \
-                goto out;                                               \
-        }
-
-#define DEBUGFS_DEL(name)                                               \
-        do {                                                            \
-                debugfs_remove(wl->debugfs.name);                       \
-                wl->debugfs.name = NULL;                                \
-        } while (0)
+        entry = debugfs_create_file(#name, 0400, parent,                \
+                                    wl, &name## _ops);                  \
+        if (!entry || IS_ERR(entry))                                    \
+                goto err;                                               \
 
 #define DEBUGFS_FWSTATS_FILE(sub, name, fmt)                            \
 static ssize_t sub## _ ##name## _read(struct file *file,                \
@@ -100,10 +91,7 @@ static const struct file_operations sub## _ ##name## _ops = {		\
 };
 
 #define DEBUGFS_FWSTATS_ADD(sub, name)                          \
-        DEBUGFS_ADD(sub## _ ##name, wl->debugfs.fw_statistics)
-
-#define DEBUGFS_FWSTATS_DEL(sub, name)                          \
-        DEBUGFS_DEL(sub## _ ##name)
+        DEBUGFS_ADD(sub## _ ##name, stats)
 
 static void wl1271_debugfs_update_stats(struct wl1271 *wl)
 {
@@ -237,7 +225,7 @@ static ssize_t tx_queue_len_read(struct file *file, char __user *userbuf,
         char buf[20];
         int res;
 
-        queue_len = skb_queue_len(&wl->tx_queue);
+        queue_len = wl->tx_queue_count;
 
         res = scnprintf(buf, sizeof(buf), "%u\n", queue_len);
         return simple_read_from_buffer(userbuf, count, ppos, buf, res);
@@ -305,109 +293,16 @@ static const struct file_operations gpio_power_ops = {
         .llseek = default_llseek,
 };
 
-static void wl1271_debugfs_delete_files(struct wl1271 *wl)
-{
-        DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow);
-
-        DEBUGFS_FWSTATS_DEL(rx, out_of_mem);
-        DEBUGFS_FWSTATS_DEL(rx, hdr_overflow);
-        DEBUGFS_FWSTATS_DEL(rx, hw_stuck);
-        DEBUGFS_FWSTATS_DEL(rx, dropped);
-        DEBUGFS_FWSTATS_DEL(rx, fcs_err);
-        DEBUGFS_FWSTATS_DEL(rx, xfr_hint_trig);
-        DEBUGFS_FWSTATS_DEL(rx, path_reset);
-        DEBUGFS_FWSTATS_DEL(rx, reset_counter);
-
-        DEBUGFS_FWSTATS_DEL(dma, rx_requested);
-        DEBUGFS_FWSTATS_DEL(dma, rx_errors);
-        DEBUGFS_FWSTATS_DEL(dma, tx_requested);
-        DEBUGFS_FWSTATS_DEL(dma, tx_errors);
-
-        DEBUGFS_FWSTATS_DEL(isr, cmd_cmplt);
-        DEBUGFS_FWSTATS_DEL(isr, fiqs);
-        DEBUGFS_FWSTATS_DEL(isr, rx_headers);
-        DEBUGFS_FWSTATS_DEL(isr, rx_mem_overflow);
-        DEBUGFS_FWSTATS_DEL(isr, rx_rdys);
-        DEBUGFS_FWSTATS_DEL(isr, irqs);
-        DEBUGFS_FWSTATS_DEL(isr, tx_procs);
-        DEBUGFS_FWSTATS_DEL(isr, decrypt_done);
-        DEBUGFS_FWSTATS_DEL(isr, dma0_done);
-        DEBUGFS_FWSTATS_DEL(isr, dma1_done);
-        DEBUGFS_FWSTATS_DEL(isr, tx_exch_complete);
-        DEBUGFS_FWSTATS_DEL(isr, commands);
-        DEBUGFS_FWSTATS_DEL(isr, rx_procs);
-        DEBUGFS_FWSTATS_DEL(isr, hw_pm_mode_changes);
-        DEBUGFS_FWSTATS_DEL(isr, host_acknowledges);
-        DEBUGFS_FWSTATS_DEL(isr, pci_pm);
-        DEBUGFS_FWSTATS_DEL(isr, wakeups);
-        DEBUGFS_FWSTATS_DEL(isr, low_rssi);
-
-        DEBUGFS_FWSTATS_DEL(wep, addr_key_count);
-        DEBUGFS_FWSTATS_DEL(wep, default_key_count);
-        /* skipping wep.reserved */
-        DEBUGFS_FWSTATS_DEL(wep, key_not_found);
-        DEBUGFS_FWSTATS_DEL(wep, decrypt_fail);
-        DEBUGFS_FWSTATS_DEL(wep, packets);
-        DEBUGFS_FWSTATS_DEL(wep, interrupt);
-
-        DEBUGFS_FWSTATS_DEL(pwr, ps_enter);
-        DEBUGFS_FWSTATS_DEL(pwr, elp_enter);
-        DEBUGFS_FWSTATS_DEL(pwr, missing_bcns);
-        DEBUGFS_FWSTATS_DEL(pwr, wake_on_host);
-        DEBUGFS_FWSTATS_DEL(pwr, wake_on_timer_exp);
-        DEBUGFS_FWSTATS_DEL(pwr, tx_with_ps);
-        DEBUGFS_FWSTATS_DEL(pwr, tx_without_ps);
-        DEBUGFS_FWSTATS_DEL(pwr, rcvd_beacons);
-        DEBUGFS_FWSTATS_DEL(pwr, power_save_off);
-        DEBUGFS_FWSTATS_DEL(pwr, enable_ps);
-        DEBUGFS_FWSTATS_DEL(pwr, disable_ps);
-        DEBUGFS_FWSTATS_DEL(pwr, fix_tsf_ps);
-        /* skipping cont_miss_bcns_spread for now */
-        DEBUGFS_FWSTATS_DEL(pwr, rcvd_awake_beacons);
-
-        DEBUGFS_FWSTATS_DEL(mic, rx_pkts);
-        DEBUGFS_FWSTATS_DEL(mic, calc_failure);
-
-        DEBUGFS_FWSTATS_DEL(aes, encrypt_fail);
-        DEBUGFS_FWSTATS_DEL(aes, decrypt_fail);
-        DEBUGFS_FWSTATS_DEL(aes, encrypt_packets);
-        DEBUGFS_FWSTATS_DEL(aes, decrypt_packets);
-        DEBUGFS_FWSTATS_DEL(aes, encrypt_interrupt);
-        DEBUGFS_FWSTATS_DEL(aes, decrypt_interrupt);
-
-        DEBUGFS_FWSTATS_DEL(event, heart_beat);
-        DEBUGFS_FWSTATS_DEL(event, calibration);
-        DEBUGFS_FWSTATS_DEL(event, rx_mismatch);
-        DEBUGFS_FWSTATS_DEL(event, rx_mem_empty);
-        DEBUGFS_FWSTATS_DEL(event, rx_pool);
-        DEBUGFS_FWSTATS_DEL(event, oom_late);
-        DEBUGFS_FWSTATS_DEL(event, phy_transmit_error);
-        DEBUGFS_FWSTATS_DEL(event, tx_stuck);
-
-        DEBUGFS_FWSTATS_DEL(ps, pspoll_timeouts);
-        DEBUGFS_FWSTATS_DEL(ps, upsd_timeouts);
-        DEBUGFS_FWSTATS_DEL(ps, upsd_max_sptime);
-        DEBUGFS_FWSTATS_DEL(ps, upsd_max_apturn);
-        DEBUGFS_FWSTATS_DEL(ps, pspoll_max_apturn);
-        DEBUGFS_FWSTATS_DEL(ps, pspoll_utilization);
-        DEBUGFS_FWSTATS_DEL(ps, upsd_utilization);
-
-        DEBUGFS_FWSTATS_DEL(rxpipe, rx_prep_beacon_drop);
-        DEBUGFS_FWSTATS_DEL(rxpipe, descr_host_int_trig_rx_data);
-        DEBUGFS_FWSTATS_DEL(rxpipe, beacon_buffer_thres_host_int_trig_rx_data);
-        DEBUGFS_FWSTATS_DEL(rxpipe, missed_beacon_host_int_trig_rx_data);
-        DEBUGFS_FWSTATS_DEL(rxpipe, tx_xfr_host_int_trig_rx_data);
-
-        DEBUGFS_DEL(tx_queue_len);
-        DEBUGFS_DEL(retry_count);
-        DEBUGFS_DEL(excessive_retries);
-
-        DEBUGFS_DEL(gpio_power);
-}
-
 static int wl1271_debugfs_add_files(struct wl1271 *wl)
 {
         int ret = 0;
+        struct dentry *entry, *stats;
+
+        stats = debugfs_create_dir("fw-statistics", wl->rootdir);
+        if (!stats || IS_ERR(stats)) {
+                entry = stats;
+                goto err;
+        }
 
         DEBUGFS_FWSTATS_ADD(tx, internal_desc_overflow);
 
@@ -500,21 +395,33 @@ static int wl1271_debugfs_add_files(struct wl1271 *wl)
         DEBUGFS_FWSTATS_ADD(rxpipe, missed_beacon_host_int_trig_rx_data);
         DEBUGFS_FWSTATS_ADD(rxpipe, tx_xfr_host_int_trig_rx_data);
 
-        DEBUGFS_ADD(tx_queue_len, wl->debugfs.rootdir);
-        DEBUGFS_ADD(retry_count, wl->debugfs.rootdir);
-        DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir);
+        DEBUGFS_ADD(tx_queue_len, wl->rootdir);
+        DEBUGFS_ADD(retry_count, wl->rootdir);
+        DEBUGFS_ADD(excessive_retries, wl->rootdir);
 
-        DEBUGFS_ADD(gpio_power, wl->debugfs.rootdir);
+        DEBUGFS_ADD(gpio_power, wl->rootdir);
 
-out:
-        if (ret < 0)
-                wl1271_debugfs_delete_files(wl);
+        entry = debugfs_create_x32("debug_level", 0600, wl->rootdir,
+                                   &wl12xx_debug_level);
+        if (!entry || IS_ERR(entry))
+                goto err;
+
+        return 0;
+
+err:
+        if (IS_ERR(entry))
+                ret = PTR_ERR(entry);
+        else
+                ret = -ENOMEM;
 
         return ret;
 }
 
 void wl1271_debugfs_reset(struct wl1271 *wl)
 {
+        if (!wl->rootdir)
+                return;
+
         memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
         wl->stats.retry_count = 0;
         wl->stats.excessive_retries = 0;
@@ -524,23 +431,15 @@ int wl1271_debugfs_init(struct wl1271 *wl)
 {
         int ret;
 
-        wl->debugfs.rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
+        wl->rootdir = debugfs_create_dir(KBUILD_MODNAME,
+                                         wl->hw->wiphy->debugfsdir);
 
-        if (IS_ERR(wl->debugfs.rootdir)) {
-                ret = PTR_ERR(wl->debugfs.rootdir);
-                wl->debugfs.rootdir = NULL;
+        if (IS_ERR(wl->rootdir)) {
+                ret = PTR_ERR(wl->rootdir);
+                wl->rootdir = NULL;
                 goto err;
         }
 
-        wl->debugfs.fw_statistics = debugfs_create_dir("fw-statistics",
-                                                       wl->debugfs.rootdir);
-
-        if (IS_ERR(wl->debugfs.fw_statistics)) {
-                ret = PTR_ERR(wl->debugfs.fw_statistics);
-                wl->debugfs.fw_statistics = NULL;
-                goto err_root;
-        }
-
         wl->stats.fw_stats = kzalloc(sizeof(*wl->stats.fw_stats),
                                       GFP_KERNEL);
 
@@ -563,12 +462,8 @@ err_file:
         wl->stats.fw_stats = NULL;
 
 err_fw:
-        debugfs_remove(wl->debugfs.fw_statistics);
-        wl->debugfs.fw_statistics = NULL;
-
-err_root:
-        debugfs_remove(wl->debugfs.rootdir);
-        wl->debugfs.rootdir = NULL;
+        debugfs_remove_recursive(wl->rootdir);
+        wl->rootdir = NULL;
 
 err:
         return ret;
@@ -576,15 +471,10 @@ err:
 
 void wl1271_debugfs_exit(struct wl1271 *wl)
 {
-        wl1271_debugfs_delete_files(wl);
-
         kfree(wl->stats.fw_stats);
         wl->stats.fw_stats = NULL;
 
-        debugfs_remove(wl->debugfs.fw_statistics);
-        wl->debugfs.fw_statistics = NULL;
-
-        debugfs_remove(wl->debugfs.rootdir);
-        wl->debugfs.rootdir = NULL;
+        debugfs_remove_recursive(wl->rootdir);
+        wl->rootdir = NULL;
 
 }
diff --git a/drivers/net/wireless/wl12xx/init.c b/drivers/net/wireless/wl12xx/init.c
index 7949d346aadb..785a5304bfc4 100644
--- a/drivers/net/wireless/wl12xx/init.c
+++ b/drivers/net/wireless/wl12xx/init.c
@@ -53,18 +53,16 @@ static int wl1271_init_hwenc_config(struct wl1271 *wl)
 int wl1271_init_templates_config(struct wl1271 *wl)
 {
         int ret, i;
-        size_t size;
 
         /* send empty templates for fw memory reservation */
         ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_2_4, NULL,
-                                      sizeof(struct wl12xx_probe_req_template),
+                                      WL1271_CMD_TEMPL_MAX_SIZE,
                                       0, WL1271_RATE_AUTOMATIC);
         if (ret < 0)
                 return ret;
 
-        size = sizeof(struct wl12xx_probe_req_template);
         ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_5,
-                                      NULL, size, 0,
+                                      NULL, WL1271_CMD_TEMPL_MAX_SIZE, 0,
                                       WL1271_RATE_AUTOMATIC);
         if (ret < 0)
                 return ret;
@@ -102,6 +100,13 @@ int wl1271_init_templates_config(struct wl1271 *wl)
         if (ret < 0)
                 return ret;
 
+        ret = wl1271_cmd_template_set(wl, CMD_TEMPL_ARP_RSP, NULL,
+                                      sizeof
+                                      (struct wl12xx_arp_rsp_template),
+                                      0, WL1271_RATE_AUTOMATIC);
+        if (ret < 0)
+                return ret;
+
         for (i = 0; i < CMD_TEMPL_KLV_IDX_MAX; i++) {
                 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_KLV, NULL,
                                               WL1271_CMD_TEMPL_MAX_SIZE, i,
diff --git a/drivers/net/wireless/wl12xx/io.c b/drivers/net/wireless/wl12xx/io.c
index 35c2f1aca6ba..d557f73e7c19 100644
--- a/drivers/net/wireless/wl12xx/io.c
+++ b/drivers/net/wireless/wl12xx/io.c
@@ -113,6 +113,7 @@ int wl1271_set_partition(struct wl1271 *wl,
 
         return 0;
 }
+EXPORT_SYMBOL_GPL(wl1271_set_partition);
 
 void wl1271_io_reset(struct wl1271 *wl)
 {
diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c
index 708ffe304c6d..062247ef3ad2 100644
--- a/drivers/net/wireless/wl12xx/main.c
+++ b/drivers/net/wireless/wl12xx/main.c
@@ -336,7 +336,8 @@ out:
 }
 
 static int wl1271_reg_notify(struct wiphy *wiphy,
-                             struct regulatory_request *request) {
+                             struct regulatory_request *request)
+{
         struct ieee80211_supported_band *band;
         struct ieee80211_channel *ch;
         int i;
@@ -569,7 +570,7 @@ static void wl1271_irq_work(struct work_struct *work)
 
                         /* Check if any tx blocks were freed */
                         if (!test_bit(WL1271_FLAG_FW_TX_BUSY, &wl->flags) &&
-                                        !skb_queue_empty(&wl->tx_queue)) {
+                            wl->tx_queue_count) {
                                 /*
                                  * In order to avoid starvation of the TX path,
                                  * call the work function directly.
@@ -890,6 +891,7 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
         struct ieee80211_tx_info *txinfo = IEEE80211_SKB_CB(skb);
         struct ieee80211_sta *sta = txinfo->control.sta;
         unsigned long flags;
+        int q;
 
         /*
          * peek into the rates configured in the STA entry.
@@ -917,10 +919,12 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
                 set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags);
         }
 #endif
+        wl->tx_queue_count++;
         spin_unlock_irqrestore(&wl->wl_lock, flags);
 
         /* queue the packet */
-        skb_queue_tail(&wl->tx_queue, skb);
+        q = wl1271_tx_get_queue(skb_get_queue_mapping(skb));
+        skb_queue_tail(&wl->tx_queue[q], skb);
 
         /*
          * The chip specific setup must run before the first TX packet -
@@ -934,7 +938,7 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
          * The workqueue is slow to process the tx_queue and we need stop
          * the queue here, otherwise the queue will get too long.
          */
-        if (skb_queue_len(&wl->tx_queue) >= WL1271_TX_QUEUE_HIGH_WATERMARK) {
+        if (wl->tx_queue_count >= WL1271_TX_QUEUE_HIGH_WATERMARK) {
                 wl1271_debug(DEBUG_TX, "op_tx: stopping queues");
 
                 spin_lock_irqsave(&wl->wl_lock, flags);
@@ -1064,6 +1068,16 @@ power_off:
         strncpy(wiphy->fw_version, wl->chip.fw_ver,
                 sizeof(wiphy->fw_version));
 
+        /*
+         * Now we know if 11a is supported (info from the NVS), so disable
+         * 11a channels if not supported
+         */
+        if (!wl->enable_11a)
+                wiphy->bands[IEEE80211_BAND_5GHZ]->n_channels = 0;
+
+        wl1271_debug(DEBUG_MAC80211, "11a is %ssupported",
+                     wl->enable_11a ? "" : "not ");
+
 out:
         mutex_unlock(&wl->mutex);
 
@@ -1157,10 +1171,16 @@ static void wl1271_op_remove_interface(struct ieee80211_hw *hw,
         struct wl1271 *wl = hw->priv;
 
         mutex_lock(&wl->mutex);
-        WARN_ON(wl->vif != vif);
-        __wl1271_op_remove_interface(wl);
-        mutex_unlock(&wl->mutex);
+        /*
+         * wl->vif can be null here if someone shuts down the interface
+         * just when hardware recovery has been started.
+         */
+        if (wl->vif) {
+                WARN_ON(wl->vif != vif);
+                __wl1271_op_remove_interface(wl);
+        }
 
+        mutex_unlock(&wl->mutex);
         cancel_work_sync(&wl->recovery_work);
 }
 
@@ -1801,21 +1821,21 @@ out:
         return ret;
 }
 
-static void wl1271_ssid_set(struct wl1271 *wl, struct sk_buff *beacon)
+static void wl1271_ssid_set(struct wl1271 *wl, struct sk_buff *skb,
+                            int offset)
 {
-        u8 *ptr = beacon->data +
-                offsetof(struct ieee80211_mgmt, u.beacon.variable);
+        u8 *ptr = skb->data + offset;
 
         /* find the location of the ssid in the beacon */
-        while (ptr < beacon->data + beacon->len) {
+        while (ptr < skb->data + skb->len) {
                 if (ptr[0] == WLAN_EID_SSID) {
                         wl->ssid_len = ptr[1];
                         memcpy(wl->ssid, ptr+2, wl->ssid_len);
                         return;
                 }
-                ptr += ptr[1];
+                ptr += (ptr[1] + 2);
         }
-        wl1271_error("ad-hoc beacon template has no SSID!\n");
+        wl1271_error("No SSID in IEs!\n");
 }
 
 static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
@@ -1858,8 +1878,11 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
 
                 if (beacon) {
                         struct ieee80211_hdr *hdr;
+                        int ieoffset = offsetof(struct ieee80211_mgmt,
+                                                u.beacon.variable);
+
+                        wl1271_ssid_set(wl, beacon, ieoffset);
 
-                        wl1271_ssid_set(wl, beacon);
                         ret = wl1271_cmd_template_set(wl, CMD_TEMPL_BEACON,
                                                       beacon->data,
                                                       beacon->len, 0,
@@ -1939,6 +1962,7 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
         if (changed & BSS_CHANGED_ASSOC) {
                 if (bss_conf->assoc) {
                         u32 rates;
+                        int ieoffset;
                         wl->aid = bss_conf->aid;
                         set_assoc = true;
 
@@ -1967,13 +1991,13 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
                                 goto out_sleep;
 
                         /*
-                         * The SSID is intentionally set to NULL here - the
-                         * firmware will set the probe request with a
-                         * broadcast SSID regardless of what we set in the
-                         * template.
+                         * Get a template for hardware connection maintenance
                          */
-                        ret = wl1271_cmd_build_probe_req(wl, NULL, 0,
-                                                         NULL, 0, wl->band);
+                        dev_kfree_skb(wl->probereq);
+                        wl->probereq = wl1271_cmd_build_ap_probe_req(wl, NULL);
+                        ieoffset = offsetof(struct ieee80211_mgmt,
+                                            u.probe_req.variable);
+                        wl1271_ssid_set(wl, wl->probereq, ieoffset);
 
                         /* enable the connection monitoring feature */
                         ret = wl1271_acx_conn_monit_params(wl, true);
@@ -1996,6 +2020,10 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
                         clear_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags);
                         wl->aid = 0;
 
+                        /* free probe-request template */
+                        dev_kfree_skb(wl->probereq);
+                        wl->probereq = NULL;
+
                         /* re-enable dynamic ps - just in case */
                         ieee80211_enable_dyn_ps(wl->vif);
 
@@ -2085,10 +2113,26 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
                 __be32 addr = bss_conf->arp_addr_list[0];
                 WARN_ON(wl->bss_type != BSS_TYPE_STA_BSS);
 
-                if (bss_conf->arp_addr_cnt == 1 && bss_conf->arp_filter_enabled)
-                        ret = wl1271_acx_arp_ip_filter(wl, true, addr);
-                else
-                        ret = wl1271_acx_arp_ip_filter(wl, false, addr);
+                if (bss_conf->arp_addr_cnt == 1 &&
+                    bss_conf->arp_filter_enabled) {
+                        /*
+                         * The template should have been configured only upon
+                         * association. however, it seems that the correct ip
+                         * isn't being set (when sending), so we have to
+                         * reconfigure the template upon every ip change.
+                         */
+                        ret = wl1271_cmd_build_arp_rsp(wl, addr);
+                        if (ret < 0) {
+                                wl1271_warning("build arp rsp failed: %d", ret);
+                                goto out_sleep;
+                        }
+
+                        ret = wl1271_acx_arp_ip_filter(wl,
+                                (ACX_ARP_FILTER_ARP_FILTERING |
+                                 ACX_ARP_FILTER_AUTO_ARP),
+                                addr);
+                } else
+                        ret = wl1271_acx_arp_ip_filter(wl, 0, addr);
 
                 if (ret < 0)
                         goto out_sleep;
@@ -2353,14 +2397,6 @@ static struct ieee80211_rate wl1271_rates_5ghz[] = {
 
 /* 5 GHz band channels for WL1273 */
 static struct ieee80211_channel wl1271_channels_5ghz[] = {
-        { .hw_value = 183, .center_freq = 4915},
-        { .hw_value = 184, .center_freq = 4920},
-        { .hw_value = 185, .center_freq = 4925},
-        { .hw_value = 187, .center_freq = 4935},
-        { .hw_value = 188, .center_freq = 4940},
-        { .hw_value = 189, .center_freq = 4945},
-        { .hw_value = 192, .center_freq = 4960},
-        { .hw_value = 196, .center_freq = 4980},
         { .hw_value = 7, .center_freq = 5035},
         { .hw_value = 8, .center_freq = 5040},
         { .hw_value = 9, .center_freq = 5045},
@@ -2581,6 +2617,8 @@ int wl1271_register_hw(struct wl1271 *wl)
 
         wl->mac80211_registered = true;
 
+        wl1271_debugfs_init(wl);
+
         register_netdevice_notifier(&wl1271_dev_notifier);
 
         wl1271_notice("loaded");
@@ -2631,6 +2669,13 @@ int wl1271_init_ieee80211(struct wl1271 *wl)
         wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
                 BIT(NL80211_IFTYPE_ADHOC);
         wl->hw->wiphy->max_scan_ssids = 1;
+        /*
+         * Maximum length of elements in scanning probe request templates
+         * should be the maximum length possible for a template, without
+         * the IEEE80211 header of the template
+         */
+        wl->hw->wiphy->max_scan_ie_len = WL1271_CMD_TEMPL_MAX_SIZE -
+                        sizeof(struct ieee80211_header);
         wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl1271_band_2ghz;
         wl->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &wl1271_band_5ghz;
 
@@ -2677,7 +2722,8 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
         wl->hw = hw;
         wl->plat_dev = plat_dev;
 
-        skb_queue_head_init(&wl->tx_queue);
+        for (i = 0; i < NUM_TX_QUEUES; i++)
+                skb_queue_head_init(&wl->tx_queue[i]);
 
         INIT_DELAYED_WORK(&wl->elp_work, wl1271_elp_work);
         INIT_DELAYED_WORK(&wl->pspoll_work, wl1271_pspoll_work);
@@ -2715,8 +2761,6 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
         /* Apply default driver configuration. */
         wl1271_conf_init(wl);
 
-        wl1271_debugfs_init(wl);
-
         order = get_order(WL1271_AGGR_BUFFER_SIZE);
         wl->aggr_buf = (u8 *)__get_free_pages(GFP_KERNEL, order);
         if (!wl->aggr_buf) {
@@ -2793,6 +2837,11 @@ int wl1271_free_hw(struct wl1271 *wl)
 }
 EXPORT_SYMBOL_GPL(wl1271_free_hw);
 
+u32 wl12xx_debug_level;
+EXPORT_SYMBOL_GPL(wl12xx_debug_level);
+module_param_named(debug_level, wl12xx_debug_level, uint, DEBUG_NONE);
+MODULE_PARM_DESC(debug_level, "wl12xx debugging level");
+
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>");
 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
diff --git a/drivers/net/wireless/wl12xx/scan.c b/drivers/net/wireless/wl12xx/scan.c
index f3f2c5b011ee..6f897b9d90ca 100644
--- a/drivers/net/wireless/wl12xx/scan.c
+++ b/drivers/net/wireless/wl12xx/scan.c
@@ -51,6 +51,10 @@ void wl1271_scan_complete_work(struct work_struct *work)
         wl->scan.req = NULL;
         ieee80211_scan_completed(wl->hw, false);
 
+        /* restore hardware connection monitoring template */
+        if (test_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags))
+                wl1271_cmd_build_ap_probe_req(wl, wl->probereq);
+
         if (wl->scan.failed) {
                 wl1271_info("Scan completed due to error.");
                 ieee80211_queue_work(wl->hw, &wl->recovery_work);
diff --git a/drivers/net/wireless/wl12xx/sdio_test.c b/drivers/net/wireless/wl12xx/sdio_test.c
new file mode 100644
index 000000000000..9fcbd3dd8490
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/sdio_test.c
@@ -0,0 +1,520 @@
+/*
+ * SDIO testing driver for wl12xx
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * Contact: Roger Quadros <roger.quadros@nokia.com>
+ *
+ * wl12xx read/write routines taken from the main module
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/crc7.h>
+#include <linux/vmalloc.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/card.h>
+#include <linux/gpio.h>
+#include <linux/wl12xx.h>
+#include <linux/kthread.h>
+#include <linux/firmware.h>
+#include <linux/pm_runtime.h>
+
+#include "wl12xx.h"
+#include "io.h"
+#include "boot.h"
+
+#ifndef SDIO_VENDOR_ID_TI
+#define SDIO_VENDOR_ID_TI               0x0097
+#endif
+
+#ifndef SDIO_DEVICE_ID_TI_WL1271
+#define SDIO_DEVICE_ID_TI_WL1271        0x4076
+#endif
+
+static bool rx, tx;
+
+module_param(rx, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(rx, "Perform rx test. Default (0). "
+        "This test continuously reads data from the SDIO device.\n");
+
+module_param(tx, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(tx, "Perform tx test. Default (0). "
+        "This test continuously writes data to the SDIO device.\n");
+
+struct wl1271_test {
+        struct wl1271 wl;
+        struct task_struct *test_task;
+};
+
+static const struct sdio_device_id wl1271_devices[] = {
+        { SDIO_DEVICE(SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_WL1271) },
+        {}
+};
+
+static inline struct sdio_func *wl_to_func(struct wl1271 *wl)
+{
+        return wl->if_priv;
+}
+
+static struct device *wl1271_sdio_wl_to_dev(struct wl1271 *wl)
+{
+        return &(wl_to_func(wl)->dev);
+}
+
+static void wl1271_sdio_raw_read(struct wl1271 *wl, int addr, void *buf,
+                size_t len, bool fixed)
+{
+        int ret = 0;
+        struct sdio_func *func = wl_to_func(wl);
+
+        if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG_ADDR)) {
+                ((u8 *)buf)[0] = sdio_f0_readb(func, addr, &ret);
+                wl1271_debug(DEBUG_SDIO, "sdio read 52 addr 0x%x, byte 0x%02x",
+                                addr, ((u8 *)buf)[0]);
+        } else {
+                if (fixed)
+                        ret = sdio_readsb(func, buf, addr, len);
+                else
+                        ret = sdio_memcpy_fromio(func, buf, addr, len);
+
+                wl1271_debug(DEBUG_SDIO, "sdio read 53 addr 0x%x, %zu bytes",
+                                addr, len);
+                wl1271_dump_ascii(DEBUG_SDIO, "data: ", buf, len);
+        }
+
+        if (ret)
+                wl1271_error("sdio read failed (%d)", ret);
+}
+
+static void wl1271_sdio_raw_write(struct wl1271 *wl, int addr, void *buf,
+                size_t len, bool fixed)
+{
+        int ret = 0;
+        struct sdio_func *func = wl_to_func(wl);
+
+        if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG_ADDR)) {
+                sdio_f0_writeb(func, ((u8 *)buf)[0], addr, &ret);
+                wl1271_debug(DEBUG_SDIO, "sdio write 52 addr 0x%x, byte 0x%02x",
+                                addr, ((u8 *)buf)[0]);
+        } else {
+                wl1271_debug(DEBUG_SDIO, "sdio write 53 addr 0x%x, %zu bytes",
+                                addr, len);
+                wl1271_dump_ascii(DEBUG_SDIO, "data: ", buf, len);
+
+                if (fixed)
+                        ret = sdio_writesb(func, addr, buf, len);
+                else
+                        ret = sdio_memcpy_toio(func, addr, buf, len);
+        }
+        if (ret)
+                wl1271_error("sdio write failed (%d)", ret);
+
+}
+
+static int wl1271_sdio_set_power(struct wl1271 *wl, bool enable)
+{
+        struct sdio_func *func = wl_to_func(wl);
+        int ret;
+
+        /* Let the SDIO stack handle wlan_enable control, so we
+         * keep host claimed while wlan is in use to keep wl1271
+         * alive.
+         */
+        if (enable) {
+                /* Power up the card */
+                ret = pm_runtime_get_sync(&func->dev);
+                if (ret < 0)
+                        goto out;
+                sdio_claim_host(func);
+                sdio_enable_func(func);
+                sdio_release_host(func);
+        } else {
+                sdio_claim_host(func);
+                sdio_disable_func(func);
+                sdio_release_host(func);
+
+                /* Power down the card */
+                ret = pm_runtime_put_sync(&func->dev);
+        }
+
+out:
+        return ret;
+}
+
+static void wl1271_sdio_disable_interrupts(struct wl1271 *wl)
+{
+}
+
+static void wl1271_sdio_enable_interrupts(struct wl1271 *wl)
+{
+}
+
+
+static struct wl1271_if_operations sdio_ops = {
+        .read           = wl1271_sdio_raw_read,
+        .write          = wl1271_sdio_raw_write,
+        .power          = wl1271_sdio_set_power,
+        .dev            = wl1271_sdio_wl_to_dev,
+        .enable_irq     = wl1271_sdio_enable_interrupts,
+        .disable_irq    = wl1271_sdio_disable_interrupts,
+};
+
+static void wl1271_fw_wakeup(struct wl1271 *wl)
+{
+        u32 elp_reg;
+
+        elp_reg = ELPCTRL_WAKE_UP;
+        wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);
+}
+
+static int wl1271_fetch_firmware(struct wl1271 *wl)
+{
+        const struct firmware *fw;
+        int ret;
+
+        ret = request_firmware(&fw, WL1271_FW_NAME, wl1271_wl_to_dev(wl));
+
+        if (ret < 0) {
+                wl1271_error("could not get firmware: %d", ret);
+                return ret;
+        }
+
+        if (fw->size % 4) {
+                wl1271_error("firmware size is not multiple of 32 bits: %zu",
+                                fw->size);
+                ret = -EILSEQ;
+                goto out;
+        }
+
+        wl->fw_len = fw->size;
+        wl->fw = vmalloc(wl->fw_len);
+
+        if (!wl->fw) {
+                wl1271_error("could not allocate memory for the firmware");
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        memcpy(wl->fw, fw->data, wl->fw_len);
+
+        ret = 0;
+
+out:
+        release_firmware(fw);
+
+        return ret;
+}
+
+static int wl1271_fetch_nvs(struct wl1271 *wl)
+{
+        const struct firmware *fw;
+        int ret;
+
+        ret = request_firmware(&fw, WL1271_NVS_NAME, wl1271_wl_to_dev(wl));
+
+        if (ret < 0) {
+                wl1271_error("could not get nvs file: %d", ret);
+                return ret;
+        }
+
+        wl->nvs = kmemdup(fw->data, sizeof(struct wl1271_nvs_file), GFP_KERNEL);
+
+        if (!wl->nvs) {
+                wl1271_error("could not allocate memory for the nvs file");
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        wl->nvs_len = fw->size;
+
+out:
+        release_firmware(fw);
+
+        return ret;
+}
+
+static int wl1271_chip_wakeup(struct wl1271 *wl)
+{
+        struct wl1271_partition_set partition;
+        int ret;
+
+        msleep(WL1271_PRE_POWER_ON_SLEEP);
+        ret = wl1271_power_on(wl);
+        if (ret)
+                return ret;
+
+        msleep(WL1271_POWER_ON_SLEEP);
+
+        /* We don't need a real memory partition here, because we only want
+         * to use the registers at this point. */
+        memset(&partition, 0, sizeof(partition));
+        partition.reg.start = REGISTERS_BASE;
+        partition.reg.size = REGISTERS_DOWN_SIZE;
+        wl1271_set_partition(wl, &partition);
+
+        /* ELP module wake up */
+        wl1271_fw_wakeup(wl);
+
+        /* whal_FwCtrl_BootSm() */
+
+        /* 0. read chip id from CHIP_ID */
+        wl->chip.id = wl1271_read32(wl, CHIP_ID_B);
+
+        /* 1. check if chip id is valid */
+
+        switch (wl->chip.id) {
+        case CHIP_ID_1271_PG10:
+                wl1271_warning("chip id 0x%x (1271 PG10) support is obsolete",
+                                wl->chip.id);
+                break;
+        case CHIP_ID_1271_PG20:
+                wl1271_notice("chip id 0x%x (1271 PG20)",
+                                wl->chip.id);
+                break;
+        default:
+                wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
+                return -ENODEV;
+        }
+
+        return ret;
+}
+
+static struct wl1271_partition_set part_down = {
+        .mem = {
+                .start = 0x00000000,
+                .size  = 0x000177c0
+        },
+        .reg = {
+                .start = REGISTERS_BASE,
+                .size  = 0x00008800
+        },
+        .mem2 = {
+                .start = 0x00000000,
+                .size  = 0x00000000
+        },
+        .mem3 = {
+                .start = 0x00000000,
+                .size  = 0x00000000
+        },
+};
+
+static int tester(void *data)
+{
+        struct wl1271 *wl = data;
+        struct sdio_func *func = wl_to_func(wl);
+        struct device *pdev = &func->dev;
+        int ret = 0;
+        bool rx_started = 0;
+        bool tx_started = 0;
+        uint8_t *tx_buf, *rx_buf;
+        int test_size = PAGE_SIZE;
+        u32 addr = 0;
+        struct wl1271_partition_set partition;
+
+        /* We assume chip is powered up and firmware fetched */
+
+        memcpy(&partition, &part_down, sizeof(partition));
+        partition.mem.start = addr;
+        wl1271_set_partition(wl, &partition);
+
+        tx_buf = kmalloc(test_size, GFP_KERNEL);
+        rx_buf = kmalloc(test_size, GFP_KERNEL);
+        if (!tx_buf || !rx_buf) {
+                dev_err(pdev,
+                        "Could not allocate memory. Test will not run.\n");
+                ret = -ENOMEM;
+                goto free;
+        }
+
+        memset(tx_buf, 0x5a, test_size);
+
+        /* write something in data area so we can read it back */
+        wl1271_write(wl, addr, tx_buf, test_size, false);
+
+        while (!kthread_should_stop()) {
+                if (rx && !rx_started) {
+                        dev_info(pdev, "starting rx test\n");
+                        rx_started = 1;
+                } else if (!rx && rx_started) {
+                        dev_info(pdev, "stopping rx test\n");
+                        rx_started = 0;
+                }
+
+                if (tx && !tx_started) {
+                        dev_info(pdev, "starting tx test\n");
+                        tx_started = 1;
+                } else if (!tx && tx_started) {
+                        dev_info(pdev, "stopping tx test\n");
+                        tx_started = 0;
+                }
+
+                if (rx_started)
+                        wl1271_read(wl, addr, rx_buf, test_size, false);
+
+                if (tx_started)
+                        wl1271_write(wl, addr, tx_buf, test_size, false);
+
+                if (!rx_started && !tx_started)
+                        msleep(100);
+        }
+
+free:
+        kfree(tx_buf);
+        kfree(rx_buf);
+        return ret;
+}
+
+static int __devinit wl1271_probe(struct sdio_func *func,
+                const struct sdio_device_id *id)
+{
+        const struct wl12xx_platform_data *wlan_data;
+        struct wl1271 *wl;
+        struct wl1271_test *wl_test;
+        int ret = 0;
+
+        /* wl1271 has 2 sdio functions we handle just the wlan part */
+        if (func->num != 0x02)
+                return -ENODEV;
+
+        wl_test = kzalloc(sizeof(struct wl1271_test), GFP_KERNEL);
+        if (!wl_test) {
+                dev_err(&func->dev, "Could not allocate memory\n");
+                return -ENOMEM;
+        }
+
+        wl = &wl_test->wl;
+
+        wl->if_priv = func;
+        wl->if_ops = &sdio_ops;
+
+        /* Grab access to FN0 for ELP reg. */
+        func->card->quirks |= MMC_QUIRK_LENIENT_FN0;
+
+        wlan_data = wl12xx_get_platform_data();
+        if (IS_ERR(wlan_data)) {
+                ret = PTR_ERR(wlan_data);
+                dev_err(&func->dev, "missing wlan platform data: %d\n", ret);
+                goto out_free;
+        }
+
+        wl->irq = wlan_data->irq;
+        wl->ref_clock = wlan_data->board_ref_clock;
+
+        sdio_set_drvdata(func, wl_test);
+
+
+        /* power up the device */
+        ret = wl1271_chip_wakeup(wl);
+        if (ret) {
+                dev_err(&func->dev, "could not wake up chip\n");
+                goto out_free;
+        }
+
+        if (wl->fw == NULL) {
+                ret = wl1271_fetch_firmware(wl);
+                if (ret < 0) {
+                        dev_err(&func->dev, "firmware fetch error\n");
+                        goto out_off;
+                }
+        }
+
+        /* fetch NVS */
+        if (wl->nvs == NULL) {
+                ret = wl1271_fetch_nvs(wl);
+                if (ret < 0) {
+                        dev_err(&func->dev, "NVS fetch error\n");
+                        goto out_off;
+                }
+        }
+
+        ret = wl1271_load_firmware(wl);
+        if (ret < 0) {
+                dev_err(&func->dev, "firmware load error: %d\n", ret);
+                goto out_free;
+        }
+
+        dev_info(&func->dev, "initialized\n");
+
+        /* I/O testing will be done in the tester thread */
+
+        wl_test->test_task = kthread_run(tester, wl, "sdio_tester");
+        if (IS_ERR(wl_test->test_task)) {
+                dev_err(&func->dev, "unable to create kernel thread\n");
+                ret = PTR_ERR(wl_test->test_task);
+                goto out_free;
+        }
+
+        return 0;
+
+out_off:
+        /* power off the chip */
+        wl1271_power_off(wl);
+
+out_free:
+        kfree(wl_test);
+        return ret;
+}
+
+static void __devexit wl1271_remove(struct sdio_func *func)
+{
+        struct wl1271_test *wl_test = sdio_get_drvdata(func);
+
+        /* stop the I/O test thread */
+        kthread_stop(wl_test->test_task);
+
+        /* power off the chip */
+        wl1271_power_off(&wl_test->wl);
+
+        vfree(wl_test->wl.fw);
+        wl_test->wl.fw = NULL;
+        kfree(wl_test->wl.nvs);
+        wl_test->wl.nvs = NULL;
+
+        kfree(wl_test);
+}
+
+static struct sdio_driver wl1271_sdio_driver = {
+        .name           = "wl12xx_sdio_test",
+        .id_table       = wl1271_devices,
+        .probe          = wl1271_probe,
+        .remove         = __devexit_p(wl1271_remove),
+};
+
+static int __init wl1271_init(void)
+{
+        int ret;
+
+        ret = sdio_register_driver(&wl1271_sdio_driver);
+        if (ret < 0)
+                pr_err("failed to register sdio driver: %d\n", ret);
+
+        return ret;
+}
+module_init(wl1271_init);
+
+static void __exit wl1271_exit(void)
+{
+        sdio_unregister_driver(&wl1271_sdio_driver);
+}
+module_exit(wl1271_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Roger Quadros <roger.quadros@nokia.com>");
+
diff --git a/drivers/net/wireless/wl12xx/tx.c b/drivers/net/wireless/wl12xx/tx.c
index d332b3f6d0fa..b44c75cd8c1e 100644
--- a/drivers/net/wireless/wl12xx/tx.c
+++ b/drivers/net/wireless/wl12xx/tx.c
@@ -125,7 +125,6 @@ static void wl1271_tx_fill_hdr(struct wl1271 *wl, struct sk_buff *skb,
         /* queue (we use same identifiers for tid's and ac's */
         ac = wl1271_tx_get_queue(skb_get_queue_mapping(skb));
         desc->tid = ac;
-
         desc->aid = TX_HW_DEFAULT_AID;
         desc->reserved = 0;
 
@@ -228,7 +227,7 @@ static void handle_tx_low_watermark(struct wl1271 *wl)
         unsigned long flags;
 
         if (test_bit(WL1271_FLAG_TX_QUEUE_STOPPED, &wl->flags) &&
-            skb_queue_len(&wl->tx_queue) <= WL1271_TX_QUEUE_LOW_WATERMARK) {
+            wl->tx_queue_count <= WL1271_TX_QUEUE_LOW_WATERMARK) {
                 /* firmware buffer has space, restart queues */
                 spin_lock_irqsave(&wl->wl_lock, flags);
                 ieee80211_wake_queues(wl->hw);
@@ -237,6 +236,43 @@ static void handle_tx_low_watermark(struct wl1271 *wl)
         }
 }
 
+static struct sk_buff *wl1271_skb_dequeue(struct wl1271 *wl)
+{
+        struct sk_buff *skb = NULL;
+        unsigned long flags;
+
+        skb = skb_dequeue(&wl->tx_queue[CONF_TX_AC_VO]);
+        if (skb)
+                goto out;
+        skb = skb_dequeue(&wl->tx_queue[CONF_TX_AC_VI]);
+        if (skb)
+                goto out;
+        skb = skb_dequeue(&wl->tx_queue[CONF_TX_AC_BE]);
+        if (skb)
+                goto out;
+        skb = skb_dequeue(&wl->tx_queue[CONF_TX_AC_BK]);
+
+out:
+        if (skb) {
+                spin_lock_irqsave(&wl->wl_lock, flags);
+                wl->tx_queue_count--;
+                spin_unlock_irqrestore(&wl->wl_lock, flags);
+        }
+
+        return skb;
+}
+
+static void wl1271_skb_queue_head(struct wl1271 *wl, struct sk_buff *skb)
+{
+        unsigned long flags;
+        int q = wl1271_tx_get_queue(skb_get_queue_mapping(skb));
+
+        skb_queue_head(&wl->tx_queue[q], skb);
+        spin_lock_irqsave(&wl->wl_lock, flags);
+        wl->tx_queue_count++;
+        spin_unlock_irqrestore(&wl->wl_lock, flags);
+}
+
 void wl1271_tx_work_locked(struct wl1271 *wl)
 {
         struct sk_buff *skb;
@@ -270,7 +306,7 @@ void wl1271_tx_work_locked(struct wl1271 *wl)
                 wl1271_acx_rate_policies(wl);
         }
 
-        while ((skb = skb_dequeue(&wl->tx_queue))) {
+        while ((skb = wl1271_skb_dequeue(wl))) {
                 if (!woken_up) {
                         ret = wl1271_ps_elp_wakeup(wl, false);
                         if (ret < 0)
@@ -284,9 +320,9 @@ void wl1271_tx_work_locked(struct wl1271 *wl)
                          * Aggregation buffer is full.
                          * Flush buffer and try again.
                          */
-                        skb_queue_head(&wl->tx_queue, skb);
+                        wl1271_skb_queue_head(wl, skb);
                         wl1271_write(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
-                                buf_offset, true);
+                                     buf_offset, true);
                         sent_packets = true;
                         buf_offset = 0;
                         continue;
@@ -295,7 +331,7 @@ void wl1271_tx_work_locked(struct wl1271 *wl)
                          * Firmware buffer is full.
                          * Queue back last skb, and stop aggregating.
                          */
-                        skb_queue_head(&wl->tx_queue, skb);
+                        wl1271_skb_queue_head(wl, skb);
                         /* No work left, avoid scheduling redundant tx work */
                         set_bit(WL1271_FLAG_FW_TX_BUSY, &wl->flags);
                         goto out_ack;
@@ -440,10 +476,13 @@ void wl1271_tx_reset(struct wl1271 *wl)
         struct sk_buff *skb;
 
         /* TX failure */
-        while ((skb = skb_dequeue(&wl->tx_queue))) {
-                wl1271_debug(DEBUG_TX, "freeing skb 0x%p", skb);
-                ieee80211_tx_status(wl->hw, skb);
+        for (i = 0; i < NUM_TX_QUEUES; i++) {
+                while ((skb = skb_dequeue(&wl->tx_queue[i]))) {
+                        wl1271_debug(DEBUG_TX, "freeing skb 0x%p", skb);
+                        ieee80211_tx_status(wl->hw, skb);
+                }
         }
+        wl->tx_queue_count = 0;
 
         /*
          * Make sure the driver is at a consistent state, in case this
@@ -472,8 +511,7 @@ void wl1271_tx_flush(struct wl1271 *wl)
                 mutex_lock(&wl->mutex);
                 wl1271_debug(DEBUG_TX, "flushing tx buffer: %d",
                              wl->tx_frames_cnt);
-                if ((wl->tx_frames_cnt == 0) &&
-                    skb_queue_empty(&wl->tx_queue)) {
+                if ((wl->tx_frames_cnt == 0) && (wl->tx_queue_count == 0)) {
                         mutex_unlock(&wl->mutex);
                         return;
                 }
diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/wl12xx/wl12xx.h
index 3c836e6063e6..ce3d31f98c55 100644
--- a/drivers/net/wireless/wl12xx/wl12xx.h
+++ b/drivers/net/wireless/wl12xx/wl12xx.h
@@ -60,31 +60,32 @@ enum {
         DEBUG_ALL       = ~0,
 };
 
-#define DEBUG_LEVEL (DEBUG_NONE)
+extern u32 wl12xx_debug_level;
 
 #define DEBUG_DUMP_LIMIT 1024
 
 #define wl1271_error(fmt, arg...) \
-        printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
+        pr_err(DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
 
 #define wl1271_warning(fmt, arg...) \
-        printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
+        pr_warning(DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
 
 #define wl1271_notice(fmt, arg...) \
-        printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
+        pr_info(DRIVER_PREFIX fmt "\n", ##arg)
 
 #define wl1271_info(fmt, arg...) \
-        printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
+        pr_info(DRIVER_PREFIX fmt "\n", ##arg)
 
 #define wl1271_debug(level, fmt, arg...) \
         do { \
-                if (level & DEBUG_LEVEL) \
-                        printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
+                if (level & wl12xx_debug_level) \
+                        pr_debug(DRIVER_PREFIX fmt "\n", ##arg); \
         } while (0)
 
+/* TODO: use pr_debug_hex_dump when it will be available */
 #define wl1271_dump(level, prefix, buf, len)    \
         do { \
-                if (level & DEBUG_LEVEL) \
+                if (level & wl12xx_debug_level) \
                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
                                        DUMP_PREFIX_OFFSET, 16, 1,       \
                                        buf,                             \
@@ -94,7 +95,7 @@ enum {
 
 #define wl1271_dump_ascii(level, prefix, buf, len)      \
         do { \
-                if (level & DEBUG_LEVEL) \
+                if (level & wl12xx_debug_level) \
                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
                                        DUMP_PREFIX_OFFSET, 16, 1,       \
                                        buf,                             \
@@ -174,108 +175,6 @@ struct wl1271_stats {
         unsigned int excessive_retries;
 };
 
-struct wl1271_debugfs {
-        struct dentry *rootdir;
-        struct dentry *fw_statistics;
-
-        struct dentry *tx_internal_desc_overflow;
-
-        struct dentry *rx_out_of_mem;
-        struct dentry *rx_hdr_overflow;
-        struct dentry *rx_hw_stuck;
-        struct dentry *rx_dropped;
-        struct dentry *rx_fcs_err;
-        struct dentry *rx_xfr_hint_trig;
-        struct dentry *rx_path_reset;
-        struct dentry *rx_reset_counter;
-
-        struct dentry *dma_rx_requested;
-        struct dentry *dma_rx_errors;
-        struct dentry *dma_tx_requested;
-        struct dentry *dma_tx_errors;
-
-        struct dentry *isr_cmd_cmplt;
-        struct dentry *isr_fiqs;
-        struct dentry *isr_rx_headers;
-        struct dentry *isr_rx_mem_overflow;
-        struct dentry *isr_rx_rdys;
-        struct dentry *isr_irqs;
-        struct dentry *isr_tx_procs;
-        struct dentry *isr_decrypt_done;
-        struct dentry *isr_dma0_done;
-        struct dentry *isr_dma1_done;
-        struct dentry *isr_tx_exch_complete;
-        struct dentry *isr_commands;
-        struct dentry *isr_rx_procs;
-        struct dentry *isr_hw_pm_mode_changes;
-        struct dentry *isr_host_acknowledges;
-        struct dentry *isr_pci_pm;
-        struct dentry *isr_wakeups;
-        struct dentry *isr_low_rssi;
-
-        struct dentry *wep_addr_key_count;
-        struct dentry *wep_default_key_count;
-        /* skipping wep.reserved */
-        struct dentry *wep_key_not_found;
-        struct dentry *wep_decrypt_fail;
-        struct dentry *wep_packets;
-        struct dentry *wep_interrupt;
-
-        struct dentry *pwr_ps_enter;
-        struct dentry *pwr_elp_enter;
-        struct dentry *pwr_missing_bcns;
-        struct dentry *pwr_wake_on_host;
-        struct dentry *pwr_wake_on_timer_exp;
-        struct dentry *pwr_tx_with_ps;
-        struct dentry *pwr_tx_without_ps;
-        struct dentry *pwr_rcvd_beacons;
-        struct dentry *pwr_power_save_off;
-        struct dentry *pwr_enable_ps;
-        struct dentry *pwr_disable_ps;
-        struct dentry *pwr_fix_tsf_ps;
-        /* skipping cont_miss_bcns_spread for now */
-        struct dentry *pwr_rcvd_awake_beacons;
-
-        struct dentry *mic_rx_pkts;
-        struct dentry *mic_calc_failure;
-
-        struct dentry *aes_encrypt_fail;
-        struct dentry *aes_decrypt_fail;
-        struct dentry *aes_encrypt_packets;
-        struct dentry *aes_decrypt_packets;
-        struct dentry *aes_encrypt_interrupt;
-        struct dentry *aes_decrypt_interrupt;
-
-        struct dentry *event_heart_beat;
-        struct dentry *event_calibration;
-        struct dentry *event_rx_mismatch;
-        struct dentry *event_rx_mem_empty;
-        struct dentry *event_rx_pool;
-        struct dentry *event_oom_late;
-        struct dentry *event_phy_transmit_error;
-        struct dentry *event_tx_stuck;
-
-        struct dentry *ps_pspoll_timeouts;
-        struct dentry *ps_upsd_timeouts;
-        struct dentry *ps_upsd_max_sptime;
-        struct dentry *ps_upsd_max_apturn;
-        struct dentry *ps_pspoll_max_apturn;
-        struct dentry *ps_pspoll_utilization;
-        struct dentry *ps_upsd_utilization;
-
-        struct dentry *rxpipe_rx_prep_beacon_drop;
-        struct dentry *rxpipe_descr_host_int_trig_rx_data;
-        struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
-        struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
-        struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
-
-        struct dentry *tx_queue_len;
-
-        struct dentry *retry_count;
-        struct dentry *excessive_retries;
-        struct dentry *gpio_power;
-};
-
 #define NUM_TX_QUEUES              4
 #define NUM_RX_PKT_DESC            8
 
@@ -393,7 +292,8 @@ struct wl1271 {
         int session_counter;
 
         /* Frames scheduled for transmission, not handled yet */
-        struct sk_buff_head tx_queue;
+        struct sk_buff_head tx_queue[NUM_TX_QUEUES];
+        int tx_queue_count;
 
         struct work_struct tx_work;
 
@@ -431,6 +331,9 @@ struct wl1271 {
         struct wl1271_scan scan;
         struct delayed_work scan_complete_work;
 
+        /* probe-req template for the current AP */
+        struct sk_buff *probereq;
+
         /* Our association ID */
         u16 aid;
 
@@ -475,7 +378,7 @@ struct wl1271 {
         int last_rssi_event;
 
         struct wl1271_stats stats;
-        struct wl1271_debugfs debugfs;
+        struct dentry *rootdir;
 
         __le32 buffer_32;
         u32 buffer_cmd;
diff --git a/drivers/net/wireless/wl12xx/wl12xx_80211.h b/drivers/net/wireless/wl12xx/wl12xx_80211.h
index 184628027213..be21032f4dc1 100644
--- a/drivers/net/wireless/wl12xx/wl12xx_80211.h
+++ b/drivers/net/wireless/wl12xx/wl12xx_80211.h
@@ -2,6 +2,7 @@
 #define __WL12XX_80211_H__
 
 #include <linux/if_ether.h>     /* ETH_ALEN */
+#include <linux/if_arp.h>
 
 /* RATES */
 #define IEEE80211_CCK_RATE_1MB                  0x02
@@ -133,11 +134,17 @@ struct wl12xx_qos_null_data_template {
         __le16 qos_ctl;
 } __packed;
 
-struct wl12xx_probe_req_template {
-        struct ieee80211_header header;
-        struct wl12xx_ie_ssid ssid;
-        struct wl12xx_ie_rates rates;
-        struct wl12xx_ie_rates ext_rates;
+struct wl12xx_arp_rsp_template {
+        struct ieee80211_hdr_3addr hdr;
+
+        u8 llc_hdr[sizeof(rfc1042_header)];
+        u16 llc_type;
+
+        struct arphdr arp_hdr;
+        u8 sender_hw[ETH_ALEN];
+        u32 sender_ip;
+        u8 target_hw[ETH_ALEN];
+        u32 target_ip;
 } __packed;
 
 
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index 351c0ab4e284..6042228954a7 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -122,6 +122,7 @@
 
 /* U-APSD queue for WMM IEs sent by AP */
 #define IEEE80211_WMM_IE_AP_QOSINFO_UAPSD       (1<<7)
+#define IEEE80211_WMM_IE_AP_QOSINFO_PARAM_SET_CNT_MASK  0x0f
 
 /* U-APSD queues for WMM IEs sent by STA */
 #define IEEE80211_WMM_IE_STA_QOSINFO_AC_VO      (1<<0)
@@ -535,7 +536,6 @@ struct ieee80211s_hdr {
         __le32 seqnum;
         u8 eaddr1[6];
         u8 eaddr2[6];
-        u8 eaddr3[6];
 } __attribute__ ((packed));
 
 /* Mesh flags */
@@ -1290,6 +1290,31 @@ enum ieee80211_key_len {
         WLAN_KEY_LEN_AES_CMAC = 16,
 };
 
+/**
+ * enum - mesh path selection protocol identifier
+ *
+ * @IEEE80211_PATH_PROTOCOL_HWMP: the default path selection protocol
+ * @IEEE80211_PATH_PROTOCOL_VENDOR: a vendor specific protocol that will
+ * be specified in a vendor specific information element
+ */
+enum {
+        IEEE80211_PATH_PROTOCOL_HWMP = 0,
+        IEEE80211_PATH_PROTOCOL_VENDOR = 255,
+};
+
+/**
+ * enum - mesh path selection metric identifier
+ *
+ * @IEEE80211_PATH_METRIC_AIRTIME: the default path selection metric
+ * @IEEE80211_PATH_METRIC_VENDOR: a vendor specific metric that will be
+ * specified in a vendor specific information element
+ */
+enum {
+        IEEE80211_PATH_METRIC_AIRTIME = 0,
+        IEEE80211_PATH_METRIC_VENDOR = 255,
+};
+
+
 /*
  * IEEE 802.11-2007 7.3.2.9 Country information element
  *
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 380421253d16..2b89b712565b 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -172,10 +172,10 @@
  *      to the specified ISO/IEC 3166-1 alpha2 country code. The core will
  *      store this as a valid request and then query userspace for it.
  *
- * @NL80211_CMD_GET_MESH_PARAMS: Get mesh networking properties for the
+ * @NL80211_CMD_GET_MESH_CONFIG: Get mesh networking properties for the
  *      interface identified by %NL80211_ATTR_IFINDEX
  *
- * @NL80211_CMD_SET_MESH_PARAMS: Set mesh networking properties for the
+ * @NL80211_CMD_SET_MESH_CONFIG: Set mesh networking properties for the
  *      interface identified by %NL80211_ATTR_IFINDEX
  *
  * @NL80211_CMD_SET_MGMT_EXTRA_IE: Set extra IEs for management frames. The
@@ -399,6 +399,13 @@
  * @NL80211_CMD_LEAVE_MESH: Leave the mesh network -- no special arguments, the
  *      network is determined by the network interface.
  *
+ * @NL80211_CMD_UNPROT_DEAUTHENTICATE: Unprotected deauthentication frame
+ *      notification. This event is used to indicate that an unprotected
+ *      deauthentication frame was dropped when MFP is in use.
+ * @NL80211_CMD_UNPROT_DISASSOCIATE: Unprotected disassociation frame
+ *      notification. This event is used to indicate that an unprotected
+ *      disassociation frame was dropped when MFP is in use.
+ *
  * @NL80211_CMD_MAX: highest used command number
  * @__NL80211_CMD_AFTER_LAST: internal use
  */
@@ -441,8 +448,8 @@ enum nl80211_commands {
         NL80211_CMD_SET_REG,
         NL80211_CMD_REQ_SET_REG,
 
-        NL80211_CMD_GET_MESH_PARAMS,
-        NL80211_CMD_SET_MESH_PARAMS,
+        NL80211_CMD_GET_MESH_CONFIG,
+        NL80211_CMD_SET_MESH_CONFIG,
 
         NL80211_CMD_SET_MGMT_EXTRA_IE /* reserved; not used */,
 
@@ -508,6 +515,9 @@ enum nl80211_commands {
         NL80211_CMD_JOIN_MESH,
         NL80211_CMD_LEAVE_MESH,
 
+        NL80211_CMD_UNPROT_DEAUTHENTICATE,
+        NL80211_CMD_UNPROT_DISASSOCIATE,
+
         /* add new commands above here */
 
         /* used to define NL80211_CMD_MAX below */
@@ -528,6 +538,10 @@ enum nl80211_commands {
 #define NL80211_CMD_DISASSOCIATE NL80211_CMD_DISASSOCIATE
 #define NL80211_CMD_REG_BEACON_HINT NL80211_CMD_REG_BEACON_HINT
 
+/* source-level API compatibility */
+#define NL80211_CMD_GET_MESH_PARAMS NL80211_CMD_GET_MESH_CONFIG
+#define NL80211_CMD_SET_MESH_PARAMS NL80211_CMD_SET_MESH_CONFIG
+
 /**
  * enum nl80211_attrs - nl80211 netlink attributes
  *
@@ -773,6 +787,9 @@ enum nl80211_commands {
  *      cache, a wiphy attribute.
  *
  * @NL80211_ATTR_DURATION: Duration of an operation in milliseconds, u32.
+ * @NL80211_ATTR_MAX_REMAIN_ON_CHANNEL_DURATION: Device attribute that
+ *      specifies the maximum duration that can be requested with the
+ *      remain-on-channel operation, in milliseconds, u32.
  *
  * @NL80211_ATTR_COOKIE: Generic 64-bit cookie to identify objects.
  *
@@ -841,6 +858,12 @@ enum nl80211_commands {
  *      the hardware should not be configured to receive on this antenna.
  *      For a more detailed descripton see @NL80211_ATTR_WIPHY_ANTENNA_TX.
  *
+ * @NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX: Bitmap of antennas which are available
+ *      for configuration as TX antennas via the above parameters.
+ *
+ * @NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX: Bitmap of antennas which are available
+ *      for configuration as RX antennas via the above parameters.
+ *
  * @NL80211_ATTR_MCAST_RATE: Multicast tx rate (in 100 kbps) for IBSS
  *
  * @NL80211_ATTR_OFFCHANNEL_TX_OK: For management frame TX, the frame may be
@@ -851,6 +874,13 @@ enum nl80211_commands {
  *
  * @NL80211_ATTR_BSS_HTOPMODE: HT operation mode (u16)
  *
+ * @NL80211_ATTR_KEY_DEFAULT_TYPES: A nested attribute containing flags
+ *      attributes, specifying what a key should be set as default as.
+ *      See &enum nl80211_key_default_types.
+ *
+ * @NL80211_ATTR_MESH_SETUP: Optional mesh setup parameters.  These cannot be
+ * changed once the mesh is active.
+ *
  * @NL80211_ATTR_MAX: highest attribute number currently defined
  * @__NL80211_ATTR_AFTER_LAST: internal use
  */
@@ -905,7 +935,7 @@ enum nl80211_attrs {
         NL80211_ATTR_REG_ALPHA2,
         NL80211_ATTR_REG_RULES,
 
-        NL80211_ATTR_MESH_PARAMS,
+        NL80211_ATTR_MESH_CONFIG,
 
         NL80211_ATTR_BSS_BASIC_RATES,
 
@@ -1029,6 +1059,15 @@ enum nl80211_attrs {
 
         NL80211_ATTR_BSS_HT_OPMODE,
 
+        NL80211_ATTR_KEY_DEFAULT_TYPES,
+
+        NL80211_ATTR_MAX_REMAIN_ON_CHANNEL_DURATION,
+
+        NL80211_ATTR_MESH_SETUP,
+
+        NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX,
+        NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX,
+
         /* add attributes here, update the policy in nl80211.c */
 
         __NL80211_ATTR_AFTER_LAST,
@@ -1037,6 +1076,7 @@ enum nl80211_attrs {
 
 /* source-level API compatibility */
 #define NL80211_ATTR_SCAN_GENERATION NL80211_ATTR_GENERATION
+#define NL80211_ATTR_MESH_PARAMS NL80211_ATTR_MESH_CONFIG
 
 /*
  * Allow user space programs to use #ifdef on new attributes by defining them
@@ -1538,7 +1578,8 @@ enum nl80211_mntr_flags {
 /**
  * enum nl80211_meshconf_params - mesh configuration parameters
  *
- * Mesh configuration parameters
+ * Mesh configuration parameters. These can be changed while the mesh is
+ * active.
  *
  * @__NL80211_MESHCONF_INVALID: internal use
  *
@@ -1561,9 +1602,6 @@ enum nl80211_mntr_flags {
  * @NL80211_MESHCONF_TTL: specifies the value of TTL field set at a source mesh
  * point.
  *
- * @NL80211_MESHCONF_ELEMENT_TTL: specifies the value of TTL field set at a
- * source mesh point for path selection elements.
- *
  * @NL80211_MESHCONF_AUTO_OPEN_PLINKS: whether we should automatically
  * open peer links when we detect compatible mesh peers.
  *
@@ -1590,6 +1628,9 @@ enum nl80211_mntr_flags {
  *
  * @NL80211_MESHCONF_ROOTMODE: whether root mode is enabled or not
  *
+ * @NL80211_MESHCONF_ELEMENT_TTL: specifies the value of TTL field set at a
+ * source mesh point for path selection elements.
+ *
  * @NL80211_MESHCONF_ATTR_MAX: highest possible mesh configuration attribute
  *
  * @__NL80211_MESHCONF_ATTR_AFTER_LAST: internal use
@@ -1618,6 +1659,39 @@ enum nl80211_meshconf_params {
 };
 
 /**
+ * enum nl80211_mesh_setup_params - mesh setup parameters
+ *
+ * Mesh setup parameters.  These are used to start/join a mesh and cannot be
+ * changed while the mesh is active.
+ *
+ * @__NL80211_MESH_SETUP_INVALID: Internal use
+ *
+ * @NL80211_MESH_SETUP_ENABLE_VENDOR_PATH_SEL: Enable this option to use a
+ * vendor specific path selection algorithm or disable it to use the default
+ * HWMP.
+ *
+ * @NL80211_MESH_SETUP_ENABLE_VENDOR_METRIC: Enable this option to use a
+ * vendor specific path metric or disable it to use the default Airtime
+ * metric.
+ *
+ * @NL80211_MESH_SETUP_VENDOR_PATH_SEL_IE: A vendor specific information
+ * element that vendors will use to identify the path selection methods and
+ * metrics in use.
+ *
+ * @__NL80211_MESH_SETUP_ATTR_AFTER_LAST: Internal use
+ */
+enum nl80211_mesh_setup_params {
+        __NL80211_MESH_SETUP_INVALID,
+        NL80211_MESH_SETUP_ENABLE_VENDOR_PATH_SEL,
+        NL80211_MESH_SETUP_ENABLE_VENDOR_METRIC,
+        NL80211_MESH_SETUP_VENDOR_PATH_SEL_IE,
+
+        /* keep last */
+        __NL80211_MESH_SETUP_ATTR_AFTER_LAST,
+        NL80211_MESH_SETUP_ATTR_MAX = __NL80211_MESH_SETUP_ATTR_AFTER_LAST - 1
+};
+
+/**
  * enum nl80211_txq_attr - TX queue parameter attributes
  * @__NL80211_TXQ_ATTR_INVALID: Attribute number 0 is reserved
  * @NL80211_TXQ_ATTR_QUEUE: TX queue identifier (NL80211_TXQ_Q_*)
@@ -1775,6 +1849,23 @@ enum nl80211_wpa_versions {
 };
 
 /**
+ * enum nl80211_key_default_types - key default types
+ * @__NL80211_KEY_DEFAULT_TYPE_INVALID: invalid
+ * @NL80211_KEY_DEFAULT_TYPE_UNICAST: key should be used as default
+ *      unicast key
+ * @NL80211_KEY_DEFAULT_TYPE_MULTICAST: key should be used as default
+ *      multicast key
+ * @NUM_NL80211_KEY_DEFAULT_TYPES: number of default types
+ */
+enum nl80211_key_default_types {
+        __NL80211_KEY_DEFAULT_TYPE_INVALID,
+        NL80211_KEY_DEFAULT_TYPE_UNICAST,
+        NL80211_KEY_DEFAULT_TYPE_MULTICAST,
+
+        NUM_NL80211_KEY_DEFAULT_TYPES
+};
+
+/**
  * enum nl80211_key_attributes - key attributes
  * @__NL80211_KEY_INVALID: invalid
  * @NL80211_KEY_DATA: (temporal) key data; for TKIP this consists of
@@ -1790,6 +1881,9 @@ enum nl80211_wpa_versions {
  * @NL80211_KEY_TYPE: the key type from enum nl80211_key_type, if not
  *      specified the default depends on whether a MAC address was
  *      given with the command using the key or not (u32)
+ * @NL80211_KEY_DEFAULT_TYPES: A nested attribute containing flags
+ *      attributes, specifying what a key should be set as default as.
+ *      See &enum nl80211_key_default_types.
  * @__NL80211_KEY_AFTER_LAST: internal
  * @NL80211_KEY_MAX: highest key attribute
  */
@@ -1802,6 +1896,7 @@ enum nl80211_key_attributes {
         NL80211_KEY_DEFAULT,
         NL80211_KEY_DEFAULT_MGMT,
         NL80211_KEY_TYPE,
+        NL80211_KEY_DEFAULT_TYPES,
 
         /* keep last */
         __NL80211_KEY_AFTER_LAST,
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 0d5979924be3..bcc9f448ec4e 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -649,12 +649,20 @@ struct mesh_config {
  * struct mesh_setup - 802.11s mesh setup configuration
  * @mesh_id: the mesh ID
  * @mesh_id_len: length of the mesh ID, at least 1 and at most 32 bytes
+ * @path_sel_proto: which path selection protocol to use
+ * @path_metric: which metric to use
+ * @vendor_ie: vendor information elements (optional)
+ * @vendor_ie_len: length of vendor information elements
  *
  * These parameters are fixed when the mesh is created.
  */
 struct mesh_setup {
         const u8 *mesh_id;
         u8 mesh_id_len;
+        u8  path_sel_proto;
+        u8  path_metric;
+        const u8 *vendor_ie;
+        u8 vendor_ie_len;
 };
 
 /**
@@ -1096,9 +1104,9 @@ struct cfg80211_pmksa {
  * @get_mpath: get a mesh path for the given parameters
  * @dump_mpath: dump mesh path callback -- resume dump at index @idx
  *
- * @get_mesh_params: Put the current mesh parameters into *params
+ * @get_mesh_config: Get the current mesh configuration
  *
- * @update_mesh_params: Update mesh parameters on a running mesh.
+ * @update_mesh_config: Update mesh parameters on a running mesh.
  *      The mask is a bitfield which tells us which parameters to
  *      set, and which to leave alone.
  *
@@ -1211,7 +1219,7 @@ struct cfg80211_ops {
                            u8 key_index, bool pairwise, const u8 *mac_addr);
         int     (*set_default_key)(struct wiphy *wiphy,
                                    struct net_device *netdev,
-                                   u8 key_index);
+                                   u8 key_index, bool unicast, bool multicast);
         int     (*set_default_mgmt_key)(struct wiphy *wiphy,
                                         struct net_device *netdev,
                                         u8 key_index);
@@ -1246,10 +1254,10 @@ struct cfg80211_ops {
         int     (*dump_mpath)(struct wiphy *wiphy, struct net_device *dev,
                                int idx, u8 *dst, u8 *next_hop,
                                struct mpath_info *pinfo);
-        int     (*get_mesh_params)(struct wiphy *wiphy,
+        int     (*get_mesh_config)(struct wiphy *wiphy,
                                 struct net_device *dev,
                                 struct mesh_config *conf);
-        int     (*update_mesh_params)(struct wiphy *wiphy,
+        int     (*update_mesh_config)(struct wiphy *wiphy,
                                       struct net_device *dev, u32 mask,
                                       const struct mesh_config *nconf);
         int     (*join_mesh)(struct wiphy *wiphy, struct net_device *dev,
@@ -1393,6 +1401,8 @@ struct cfg80211_ops {
  *      control port protocol ethertype. The device also honours the
  *      control_port_no_encrypt flag.
  * @WIPHY_FLAG_IBSS_RSN: The device supports IBSS RSN.
+ * @WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS: The device supports separate
+ *      unicast and multicast TX keys.
  */
 enum wiphy_flags {
         WIPHY_FLAG_CUSTOM_REGULATORY            = BIT(0),
@@ -1404,6 +1414,7 @@ enum wiphy_flags {
         WIPHY_FLAG_4ADDR_STATION                = BIT(6),
         WIPHY_FLAG_CONTROL_PORT_PROTOCOL        = BIT(7),
         WIPHY_FLAG_IBSS_RSN                     = BIT(8),
+        WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS= BIT(9),
 };
 
 struct mac_address {
@@ -1416,7 +1427,9 @@ struct ieee80211_txrx_stypes {
 
 /**
  * struct wiphy - wireless hardware description
- * @reg_notifier: the driver's regulatory notification callback
+ * @reg_notifier: the driver's regulatory notification callback,
+ *      note that if your driver uses wiphy_apply_custom_regulatory()
+ *      the reg_notifier's request can be passed as NULL
  * @regd: the driver's regulatory domain, if one was requested via
  *      the regulatory_hint() API. This can be used by the driver
  *      on the reg_notifier() if it chooses to ignore future
@@ -1468,6 +1481,17 @@ struct ieee80211_txrx_stypes {
  * @mgmt_stypes: bitmasks of frame subtypes that can be subscribed to or
  *      transmitted through nl80211, points to an array indexed by interface
  *      type
+ *
+ * @available_antennas_tx: bitmap of antennas which are available to be
+ *      configured as TX antennas. Antenna configuration commands will be
+ *      rejected unless this or @available_antennas_rx is set.
+ *
+ * @available_antennas_rx: bitmap of antennas which are available to be
+ *      configured as RX antennas. Antenna configuration commands will be
+ *      rejected unless this or @available_antennas_tx is set.
+ *
+ * @max_remain_on_channel_duration: Maximum time a remain-on-channel operation
+ *      may request, if implemented.
  */
 struct wiphy {
         /* assign these fields before you register the wiphy */
@@ -1505,8 +1529,13 @@ struct wiphy {
         char fw_version[ETHTOOL_BUSINFO_LEN];
         u32 hw_version;
 
+        u16 max_remain_on_channel_duration;
+
         u8 max_num_pmkids;
 
+        u32 available_antennas_tx;
+        u32 available_antennas_rx;
+
         /* If multiple wiphys are registered and you're handed e.g.
          * a regular netdev with assigned ieee80211_ptr, you won't
          * know whether it points to a wiphy your driver has registered
@@ -2347,6 +2376,32 @@ void __cfg80211_send_disassoc(struct net_device *dev, const u8 *buf,
         size_t len);
 
 /**
+ * cfg80211_send_unprot_deauth - notification of unprotected deauthentication
+ * @dev: network device
+ * @buf: deauthentication frame (header + body)
+ * @len: length of the frame data
+ *
+ * This function is called whenever a received Deauthentication frame has been
+ * dropped in station mode because of MFP being used but the Deauthentication
+ * frame was not protected. This function may sleep.
+ */
+void cfg80211_send_unprot_deauth(struct net_device *dev, const u8 *buf,
+                                 size_t len);
+
+/**
+ * cfg80211_send_unprot_disassoc - notification of unprotected disassociation
+ * @dev: network device
+ * @buf: disassociation frame (header + body)
+ * @len: length of the frame data
+ *
+ * This function is called whenever a received Disassociation frame has been
+ * dropped in station mode because of MFP being used but the Disassociation
+ * frame was not protected. This function may sleep.
+ */
+void cfg80211_send_unprot_disassoc(struct net_device *dev, const u8 *buf,
+                                   size_t len);
+
+/**
  * cfg80211_michael_mic_failure - notification of Michael MIC failure (TKIP)
  * @dev: network device
  * @addr: The source MAC address of the frame
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index e411cf87fb41..69ded1ee49ce 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -2435,6 +2435,7 @@ void ieee80211_queue_delayed_work(struct ieee80211_hw *hw,
  * ieee80211_start_tx_ba_session - Start a tx Block Ack session.
  * @sta: the station for which to start a BA session
  * @tid: the TID to BA on.
+ * @timeout: session timeout value (in TUs)
  *
  * Return: success if addBA request was sent, failure otherwise
  *
@@ -2442,7 +2443,8 @@ void ieee80211_queue_delayed_work(struct ieee80211_hw *hw,
  * the need to start aggregation on a certain RA/TID, the session level
  * will be managed by the mac80211.
  */
-int ieee80211_start_tx_ba_session(struct ieee80211_sta *sta, u16 tid);
+int ieee80211_start_tx_ba_session(struct ieee80211_sta *sta, u16 tid,
+                                  u16 timeout);
 
 /**
  * ieee80211_start_tx_ba_cb_irqsafe - low level driver ready to aggregate.
diff --git a/net/mac80211/agg-tx.c b/net/mac80211/agg-tx.c
index d4679b265ba8..9cc472c6a6a5 100644
--- a/net/mac80211/agg-tx.c
+++ b/net/mac80211/agg-tx.c
@@ -342,10 +342,11 @@ void ieee80211_tx_ba_session_handle_start(struct sta_info *sta, int tid)
         /* send AddBA request */
         ieee80211_send_addba_request(sdata, sta->sta.addr, tid,
                                      tid_tx->dialog_token, start_seq_num,
-                                     0x40, 5000);
+                                     0x40, tid_tx->timeout);
 }
 
-int ieee80211_start_tx_ba_session(struct ieee80211_sta *pubsta, u16 tid)
+int ieee80211_start_tx_ba_session(struct ieee80211_sta *pubsta, u16 tid,
+                                  u16 timeout)
 {
         struct sta_info *sta = container_of(pubsta, struct sta_info, sta);
         struct ieee80211_sub_if_data *sdata = sta->sdata;
@@ -420,6 +421,8 @@ int ieee80211_start_tx_ba_session(struct ieee80211_sta *pubsta, u16 tid)
         skb_queue_head_init(&tid_tx->pending);
         __set_bit(HT_AGG_STATE_WANT_START, &tid_tx->state);
 
+        tid_tx->timeout = timeout;
+
         /* Tx timer */
         tid_tx->addba_resp_timer.function = sta_addba_resp_timer_expired;
         tid_tx->addba_resp_timer.data = (unsigned long)&sta->timer_to_tid[tid];
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c
index c30b8b72eedb..5892b0302454 100644
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
@@ -295,11 +295,12 @@ static int ieee80211_get_key(struct wiphy *wiphy, struct net_device *dev,
 
 static int ieee80211_config_default_key(struct wiphy *wiphy,
                                         struct net_device *dev,
-                                        u8 key_idx)
+                                        u8 key_idx, bool uni,
+                                        bool multi)
 {
         struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
 
-        ieee80211_set_default_key(sdata, key_idx);
+        ieee80211_set_default_key(sdata, key_idx, uni, multi);
 
         return 0;
 }
@@ -983,7 +984,7 @@ static int ieee80211_dump_mpath(struct wiphy *wiphy, struct net_device *dev,
         return 0;
 }
 
-static int ieee80211_get_mesh_params(struct wiphy *wiphy,
+static int ieee80211_get_mesh_config(struct wiphy *wiphy,
                                 struct net_device *dev,
                                 struct mesh_config *conf)
 {
@@ -999,7 +1000,37 @@ static inline bool _chg_mesh_attr(enum nl80211_meshconf_params parm, u32 mask)
         return (mask >> (parm-1)) & 0x1;
 }
 
-static int ieee80211_update_mesh_params(struct wiphy *wiphy,
+static int copy_mesh_setup(struct ieee80211_if_mesh *ifmsh,
+                const struct mesh_setup *setup)
+{
+        u8 *new_ie;
+        const u8 *old_ie;
+
+        /* first allocate the new vendor information element */
+        new_ie = NULL;
+        old_ie = ifmsh->vendor_ie;
+
+        ifmsh->vendor_ie_len = setup->vendor_ie_len;
+        if (setup->vendor_ie_len) {
+                new_ie = kmemdup(setup->vendor_ie, setup->vendor_ie_len,
+                                GFP_KERNEL);
+                if (!new_ie)
+                        return -ENOMEM;
+        }
+
+        /* now copy the rest of the setup parameters */
+        ifmsh->mesh_id_len = setup->mesh_id_len;
+        memcpy(ifmsh->mesh_id, setup->mesh_id, ifmsh->mesh_id_len);
+        ifmsh->mesh_pp_id = setup->path_sel_proto;
+        ifmsh->mesh_pm_id = setup->path_metric;
+        ifmsh->vendor_ie = new_ie;
+
+        kfree(old_ie);
+
+        return 0;
+}
+
+static int ieee80211_update_mesh_config(struct wiphy *wiphy,
                                         struct net_device *dev, u32 mask,
                                         const struct mesh_config *nconf)
 {
@@ -1058,11 +1089,12 @@ static int ieee80211_join_mesh(struct wiphy *wiphy, struct net_device *dev,
 {
         struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
         struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
+        int err;
 
-        memcpy(&sdata->u.mesh.mshcfg, conf, sizeof(struct mesh_config));
-        ifmsh->mesh_id_len = setup->mesh_id_len;
-        memcpy(ifmsh->mesh_id, setup->mesh_id, ifmsh->mesh_id_len);
-
+        memcpy(&ifmsh->mshcfg, conf, sizeof(struct mesh_config));
+        err = copy_mesh_setup(ifmsh, setup);
+        if (err)
+                return err;
         ieee80211_start_mesh(sdata);
 
         return 0;
@@ -1638,6 +1670,7 @@ static int ieee80211_mgmt_tx(struct wiphy *wiphy, struct net_device *dev,
         case NL80211_IFTYPE_AP:
         case NL80211_IFTYPE_AP_VLAN:
         case NL80211_IFTYPE_P2P_GO:
+        case NL80211_IFTYPE_MESH_POINT:
                 if (!ieee80211_is_action(mgmt->frame_control) ||
                     mgmt->u.action.category == WLAN_CATEGORY_PUBLIC)
                         break;
@@ -1786,8 +1819,8 @@ struct cfg80211_ops mac80211_config_ops = {
         .change_mpath = ieee80211_change_mpath,
         .get_mpath = ieee80211_get_mpath,
         .dump_mpath = ieee80211_dump_mpath,
-        .update_mesh_params = ieee80211_update_mesh_params,
-        .get_mesh_params = ieee80211_get_mesh_params,
+        .update_mesh_config = ieee80211_update_mesh_config,
+        .get_mesh_config = ieee80211_get_mesh_config,
         .join_mesh = ieee80211_join_mesh,
         .leave_mesh = ieee80211_leave_mesh,
 #endif
diff --git a/net/mac80211/debugfs_key.c b/net/mac80211/debugfs_key.c
index 5822a6ce7671..f7ef3477c24a 100644
--- a/net/mac80211/debugfs_key.c
+++ b/net/mac80211/debugfs_key.c
@@ -274,7 +274,8 @@ void ieee80211_debugfs_key_remove(struct ieee80211_key *key)
         debugfs_remove_recursive(key->debugfs.dir);
         key->debugfs.dir = NULL;
 }
-void ieee80211_debugfs_key_add_default(struct ieee80211_sub_if_data *sdata)
+
+void ieee80211_debugfs_key_update_default(struct ieee80211_sub_if_data *sdata)
 {
         char buf[50];
         struct ieee80211_key *key;
@@ -282,25 +283,29 @@ void ieee80211_debugfs_key_add_default(struct ieee80211_sub_if_data *sdata)
         if (!sdata->debugfs.dir)
                 return;
 
-        /* this is running under the key lock */
+        lockdep_assert_held(&sdata->local->key_mtx);
 
-        key = sdata->default_key;
-        if (key) {
+        if (sdata->default_unicast_key) {
+                key = sdata->default_unicast_key;
                 sprintf(buf, "../keys/%d", key->debugfs.cnt);
-                sdata->debugfs.default_key =
-                        debugfs_create_symlink("default_key",
+                sdata->debugfs.default_unicast_key =
+                        debugfs_create_symlink("default_unicast_key",
                                                sdata->debugfs.dir, buf);
-        } else
-                ieee80211_debugfs_key_remove_default(sdata);
-}
-
-void ieee80211_debugfs_key_remove_default(struct ieee80211_sub_if_data *sdata)
-{
-        if (!sdata)
-                return;
+        } else {
+                debugfs_remove(sdata->debugfs.default_unicast_key);
+                sdata->debugfs.default_unicast_key = NULL;
+        }
 
-        debugfs_remove(sdata->debugfs.default_key);
-        sdata->debugfs.default_key = NULL;
+        if (sdata->default_multicast_key) {
+                key = sdata->default_multicast_key;
+                sprintf(buf, "../keys/%d", key->debugfs.cnt);
+                sdata->debugfs.default_multicast_key =
+                        debugfs_create_symlink("default_multicast_key",
+                                               sdata->debugfs.dir, buf);
+        } else {
+                debugfs_remove(sdata->debugfs.default_multicast_key);
+                sdata->debugfs.default_multicast_key = NULL;
+        }
 }
 
 void ieee80211_debugfs_key_add_mgmt_default(struct ieee80211_sub_if_data *sdata)
diff --git a/net/mac80211/debugfs_key.h b/net/mac80211/debugfs_key.h
index 54717b4e1371..32adc77e9c77 100644
--- a/net/mac80211/debugfs_key.h
+++ b/net/mac80211/debugfs_key.h
@@ -4,8 +4,7 @@
 #ifdef CONFIG_MAC80211_DEBUGFS
 void ieee80211_debugfs_key_add(struct ieee80211_key *key);
 void ieee80211_debugfs_key_remove(struct ieee80211_key *key);
-void ieee80211_debugfs_key_add_default(struct ieee80211_sub_if_data *sdata);
-void ieee80211_debugfs_key_remove_default(struct ieee80211_sub_if_data *sdata);
+void ieee80211_debugfs_key_update_default(struct ieee80211_sub_if_data *sdata);
 void ieee80211_debugfs_key_add_mgmt_default(
         struct ieee80211_sub_if_data *sdata);
 void ieee80211_debugfs_key_remove_mgmt_default(
@@ -17,10 +16,7 @@ static inline void ieee80211_debugfs_key_add(struct ieee80211_key *key)
 {}
 static inline void ieee80211_debugfs_key_remove(struct ieee80211_key *key)
 {}
-static inline void ieee80211_debugfs_key_add_default(
-        struct ieee80211_sub_if_data *sdata)
-{}
-static inline void ieee80211_debugfs_key_remove_default(
+static inline void ieee80211_debugfs_key_update_default(
         struct ieee80211_sub_if_data *sdata)
 {}
 static inline void ieee80211_debugfs_key_add_mgmt_default(
diff --git a/net/mac80211/debugfs_sta.c b/net/mac80211/debugfs_sta.c
index 8bb5af85f469..c04a1396cf8d 100644
--- a/net/mac80211/debugfs_sta.c
+++ b/net/mac80211/debugfs_sta.c
@@ -189,7 +189,7 @@ static ssize_t sta_agg_status_write(struct file *file, const char __user *userbu
 
         if (tx) {
                 if (start)
-                        ret = ieee80211_start_tx_ba_session(&sta->sta, tid);
+                        ret = ieee80211_start_tx_ba_session(&sta->sta, tid, 5000);
                 else
                         ret = ieee80211_stop_tx_ba_session(&sta->sta, tid);
         } else {
diff --git a/net/mac80211/driver-ops.h b/net/mac80211/driver-ops.h
index 4244554d218a..af0c4398cceb 100644
--- a/net/mac80211/driver-ops.h
+++ b/net/mac80211/driver-ops.h
@@ -367,7 +367,7 @@ static inline void drv_reset_tsf(struct ieee80211_local *local)
 
 static inline int drv_tx_last_beacon(struct ieee80211_local *local)
 {
-        int ret = 1;
+        int ret = 0; /* default unsuported op for less congestion */
 
         might_sleep();
 
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index 72499fe5fc36..eadaa243a3da 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -484,6 +484,8 @@ struct ieee80211_if_mesh {
         struct mesh_config mshcfg;
         u32 mesh_seqnum;
         bool accepting_plinks;
+        const u8 *vendor_ie;
+        u8 vendor_ie_len;
 };
 
 #ifdef CONFIG_MAC80211_MESH
@@ -557,7 +559,7 @@ struct ieee80211_sub_if_data {
         unsigned int fragment_next;
 
         struct ieee80211_key *keys[NUM_DEFAULT_KEYS + NUM_DEFAULT_MGMT_KEYS];
-        struct ieee80211_key *default_key;
+        struct ieee80211_key *default_unicast_key, *default_multicast_key;
         struct ieee80211_key *default_mgmt_key;
 
         u16 sequence_number;
@@ -585,9 +587,7 @@ struct ieee80211_sub_if_data {
                 struct ieee80211_if_vlan vlan;
                 struct ieee80211_if_managed mgd;
                 struct ieee80211_if_ibss ibss;
-#ifdef CONFIG_MAC80211_MESH
                 struct ieee80211_if_mesh mesh;
-#endif
                 u32 mntr_flags;
         } u;
 
@@ -595,7 +595,8 @@ struct ieee80211_sub_if_data {
         struct {
                 struct dentry *dir;
                 struct dentry *subdir_stations;
-                struct dentry *default_key;
+                struct dentry *default_unicast_key;
+                struct dentry *default_multicast_key;
                 struct dentry *default_mgmt_key;
         } debugfs;
 #endif
diff --git a/net/mac80211/key.c b/net/mac80211/key.c
index 72df1ca7299b..84cf9196820f 100644
--- a/net/mac80211/key.c
+++ b/net/mac80211/key.c
@@ -178,7 +178,7 @@ void ieee80211_key_removed(struct ieee80211_key_conf *key_conf)
 EXPORT_SYMBOL_GPL(ieee80211_key_removed);
 
 static void __ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata,
-                                        int idx)
+                                        int idx, bool uni, bool multi)
 {
         struct ieee80211_key *key = NULL;
 
@@ -187,18 +187,19 @@ static void __ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata,
         if (idx >= 0 && idx < NUM_DEFAULT_KEYS)
                 key = sdata->keys[idx];
 
-        rcu_assign_pointer(sdata->default_key, key);
+        if (uni)
+                rcu_assign_pointer(sdata->default_unicast_key, key);
+        if (multi)
+                rcu_assign_pointer(sdata->default_multicast_key, key);
 
-        if (key) {
-                ieee80211_debugfs_key_remove_default(key->sdata);
-                ieee80211_debugfs_key_add_default(key->sdata);
-        }
+        ieee80211_debugfs_key_update_default(sdata);
 }
 
-void ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata, int idx)
+void ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata, int idx,
+                               bool uni, bool multi)
 {
         mutex_lock(&sdata->local->key_mtx);
-        __ieee80211_set_default_key(sdata, idx);
+        __ieee80211_set_default_key(sdata, idx, uni, multi);
         mutex_unlock(&sdata->local->key_mtx);
 }
 
@@ -215,10 +216,7 @@ __ieee80211_set_default_mgmt_key(struct ieee80211_sub_if_data *sdata, int idx)
 
         rcu_assign_pointer(sdata->default_mgmt_key, key);
 
-        if (key) {
-                ieee80211_debugfs_key_remove_mgmt_default(key->sdata);
-                ieee80211_debugfs_key_add_mgmt_default(key->sdata);
-        }
+        ieee80211_debugfs_key_update_default(sdata);
 }
 
 void ieee80211_set_default_mgmt_key(struct ieee80211_sub_if_data *sdata,
@@ -236,7 +234,8 @@ static void __ieee80211_key_replace(struct ieee80211_sub_if_data *sdata,
                                     struct ieee80211_key *old,
                                     struct ieee80211_key *new)
 {
-        int idx, defkey, defmgmtkey;
+        int idx;
+        bool defunikey, defmultikey, defmgmtkey;
 
         if (new)
                 list_add(&new->list, &sdata->key_list);
@@ -257,17 +256,24 @@ static void __ieee80211_key_replace(struct ieee80211_sub_if_data *sdata,
                 else
                         idx = new->conf.keyidx;
 
-                defkey = old && sdata->default_key == old;
+                defunikey = old && sdata->default_unicast_key == old;
+                defmultikey = old && sdata->default_multicast_key == old;
                 defmgmtkey = old && sdata->default_mgmt_key == old;
 
-                if (defkey && !new)
-                        __ieee80211_set_default_key(sdata, -1);
+                if (defunikey && !new)
+                        __ieee80211_set_default_key(sdata, -1, true, false);
+                if (defmultikey && !new)
+                        __ieee80211_set_default_key(sdata, -1, false, true);
                 if (defmgmtkey && !new)
                         __ieee80211_set_default_mgmt_key(sdata, -1);
 
                 rcu_assign_pointer(sdata->keys[idx], new);
-                if (defkey && new)
-                        __ieee80211_set_default_key(sdata, new->conf.keyidx);
+                if (defunikey && new)
+                        __ieee80211_set_default_key(sdata, new->conf.keyidx,
+                                                    true, false);
+                if (defmultikey && new)
+                        __ieee80211_set_default_key(sdata, new->conf.keyidx,
+                                                    false, true);
                 if (defmgmtkey && new)
                         __ieee80211_set_default_mgmt_key(sdata,
                                                          new->conf.keyidx);
@@ -509,11 +515,12 @@ void ieee80211_free_keys(struct ieee80211_sub_if_data *sdata)
 
         mutex_lock(&sdata->local->key_mtx);
 
-        ieee80211_debugfs_key_remove_default(sdata);
         ieee80211_debugfs_key_remove_mgmt_default(sdata);
 
         list_for_each_entry_safe(key, tmp, &sdata->key_list, list)
                 __ieee80211_key_free(key);
 
+        ieee80211_debugfs_key_update_default(sdata);
+
         mutex_unlock(&sdata->local->key_mtx);
 }
diff --git a/net/mac80211/key.h b/net/mac80211/key.h
index 0db1c0f5f697..8106aa1b7466 100644
--- a/net/mac80211/key.h
+++ b/net/mac80211/key.h
@@ -138,7 +138,8 @@ int __must_check ieee80211_key_link(struct ieee80211_key *key,
                                     struct sta_info *sta);
 void ieee80211_key_free(struct ieee80211_local *local,
                         struct ieee80211_key *key);
-void ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata, int idx);
+void ieee80211_set_default_key(struct ieee80211_sub_if_data *sdata, int idx,
+                               bool uni, bool multi);
 void ieee80211_set_default_mgmt_key(struct ieee80211_sub_if_data *sdata,
                                     int idx);
 void ieee80211_free_keys(struct ieee80211_sub_if_data *sdata);
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 973fee9f7d69..a21d049caf19 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -484,6 +484,10 @@ ieee80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = {
                         BIT(IEEE80211_STYPE_DEAUTH >> 4) |
                         BIT(IEEE80211_STYPE_ACTION >> 4),
         },
+        [NL80211_IFTYPE_MESH_POINT] = {
+                .tx = 0xffff,
+                .rx = BIT(IEEE80211_STYPE_ACTION >> 4),
+        },
 };
 
 struct ieee80211_hw *ieee80211_alloc_hw(size_t priv_data_len,
@@ -517,10 +521,15 @@ struct ieee80211_hw *ieee80211_alloc_hw(size_t priv_data_len,
 
         wiphy->mgmt_stypes = ieee80211_default_mgmt_stypes;
 
+        wiphy->privid = mac80211_wiphy_privid;
+
         wiphy->flags |= WIPHY_FLAG_NETNS_OK |
                         WIPHY_FLAG_4ADDR_AP |
-                        WIPHY_FLAG_4ADDR_STATION;
-        wiphy->privid = mac80211_wiphy_privid;
+                        WIPHY_FLAG_4ADDR_STATION |
+                        WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS;
+
+        if (!ops->set_key)
+                wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
 
         wiphy->bss_priv_size = sizeof(struct ieee80211_bss);
 
@@ -740,6 +749,8 @@ int ieee80211_register_hw(struct ieee80211_hw *hw)
                 }
         }
 
+        local->hw.wiphy->max_remain_on_channel_duration = 5000;
+
         result = wiphy_register(local->hw.wiphy);
         if (result < 0)
                 goto fail_wiphy_register;
diff --git a/net/mac80211/mesh.c b/net/mac80211/mesh.c
index 63e1188d5062..ca3af4685b0a 100644
--- a/net/mac80211/mesh.c
+++ b/net/mac80211/mesh.c
@@ -124,15 +124,6 @@ void mesh_accept_plinks_update(struct ieee80211_sub_if_data *sdata)
                 ieee80211_mesh_housekeeping_timer((unsigned long) sdata);
 }
 
-void mesh_ids_set_default(struct ieee80211_if_mesh *sta)
-{
-        sta->mesh_pp_id = 0;    /* HWMP */
-        sta->mesh_pm_id = 0;    /* Airtime */
-        sta->mesh_cc_id = 0;    /* Disabled */
-        sta->mesh_sp_id = 0;    /* Neighbor Offset */
-        sta->mesh_auth_id = 0;  /* Disabled */
-}
-
 int mesh_rmc_init(struct ieee80211_sub_if_data *sdata)
 {
         int i;
@@ -287,6 +278,13 @@ void mesh_mgmt_ies_add(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata)
         *pos++ |= sdata->u.mesh.accepting_plinks ?
             MESHCONF_CAPAB_ACCEPT_PLINKS : 0x00;
         *pos++ = 0x00;
+
+        if (sdata->u.mesh.vendor_ie) {
+                int len = sdata->u.mesh.vendor_ie_len;
+                const u8 *data = sdata->u.mesh.vendor_ie;
+                if (skb_tailroom(skb) > len)
+                        memcpy(skb_put(skb, len), data, len);
+        }
 }
 
 u32 mesh_table_hash(u8 *addr, struct ieee80211_sub_if_data *sdata, struct mesh_table *tbl)
@@ -412,39 +410,33 @@ int ieee80211_fill_mesh_addresses(struct ieee80211_hdr *hdr, __le16 *fc,
  * ieee80211_new_mesh_header - create a new mesh header
  * @meshhdr:    uninitialized mesh header
  * @sdata:      mesh interface to be used
- * @addr4:      addr4 of the mesh frame (1st in ae header)
- *              may be NULL
- * @addr5:      addr5 of the mesh frame (1st or 2nd in ae header)
- *              may be NULL unless addr6 is present
- * @addr6:      addr6 of the mesh frame (2nd or 3rd in ae header)
- *              may be NULL unless addr5 is present
+ * @addr4or5:   1st address in the ae header, which may correspond to address 4
+ *              (if addr6 is NULL) or address 5 (if addr6 is present). It may
+ *              be NULL.
+ * @addr6:      2nd address in the ae header, which corresponds to addr6 of the
+ *              mesh frame
  *
  * Return the header length.
  */
 int ieee80211_new_mesh_header(struct ieee80211s_hdr *meshhdr,
-                struct ieee80211_sub_if_data *sdata, char *addr4,
-                char *addr5, char *addr6)
+                struct ieee80211_sub_if_data *sdata, char *addr4or5,
+                char *addr6)
 {
         int aelen = 0;
+        BUG_ON(!addr4or5 && addr6);
         memset(meshhdr, 0, sizeof(*meshhdr));
         meshhdr->ttl = sdata->u.mesh.mshcfg.dot11MeshTTL;
         put_unaligned(cpu_to_le32(sdata->u.mesh.mesh_seqnum), &meshhdr->seqnum);
         sdata->u.mesh.mesh_seqnum++;
-        if (addr4) {
+        if (addr4or5 && !addr6) {
                 meshhdr->flags |= MESH_FLAGS_AE_A4;
                 aelen += ETH_ALEN;
-                memcpy(meshhdr->eaddr1, addr4, ETH_ALEN);
-        }
-        if (addr5 && addr6) {
+                memcpy(meshhdr->eaddr1, addr4or5, ETH_ALEN);
+        } else if (addr4or5 && addr6) {
                 meshhdr->flags |= MESH_FLAGS_AE_A5_A6;
                 aelen += 2 * ETH_ALEN;
-                if (!addr4) {
-                        memcpy(meshhdr->eaddr1, addr5, ETH_ALEN);
-                        memcpy(meshhdr->eaddr2, addr6, ETH_ALEN);
-                } else {
-                        memcpy(meshhdr->eaddr2, addr5, ETH_ALEN);
-                        memcpy(meshhdr->eaddr3, addr6, ETH_ALEN);
-                }
+                memcpy(meshhdr->eaddr1, addr4or5, ETH_ALEN);
+                memcpy(meshhdr->eaddr2, addr6, ETH_ALEN);
         }
         return 6 + aelen;
 }
@@ -518,6 +510,9 @@ void ieee80211_start_mesh(struct ieee80211_sub_if_data *sdata)
         atomic_inc(&local->iff_allmultis);
         ieee80211_configure_filter(local);
 
+        ifmsh->mesh_cc_id = 0;  /* Disabled */
+        ifmsh->mesh_sp_id = 0;  /* Neighbor Offset */
+        ifmsh->mesh_auth_id = 0;        /* Disabled */
         set_bit(MESH_WORK_HOUSEKEEPING, &ifmsh->wrkq_flags);
         ieee80211_mesh_root_setup(ifmsh);
         ieee80211_queue_work(&local->hw, &sdata->work);
@@ -688,7 +683,6 @@ void ieee80211_mesh_init_sdata(struct ieee80211_sub_if_data *sdata)
         /* Allocate all mesh structures when creating the first mesh interface. */
         if (!mesh_allocated)
                 ieee80211s_init();
-        mesh_ids_set_default(ifmsh);
         setup_timer(&ifmsh->mesh_path_timer,
                     ieee80211_mesh_path_timer,
                     (unsigned long) sdata);
diff --git a/net/mac80211/mesh.h b/net/mac80211/mesh.h
index 039d7fa0af74..b99e230fe31c 100644
--- a/net/mac80211/mesh.h
+++ b/net/mac80211/mesh.h
@@ -164,17 +164,6 @@ struct mesh_rmc {
 };
 
 
-/*
- * MESH_CFG_COMP_LEN Includes:
- *      - Active path selection protocol ID.
- *      - Active path selection metric ID.
- *      - Congestion control mode identifier.
- *      - Channel precedence.
- * Does not include mesh capabilities, which may vary across nodes in the same
- * mesh
- */
-#define MESH_CFG_CMP_LEN        (IEEE80211_MESH_CONFIG_LEN - 2)
-
 #define MESH_DEFAULT_BEACON_INTERVAL            1000    /* in 1024 us units */
 
 #define MESH_PATH_EXPIRE (600 * HZ)
@@ -198,8 +187,8 @@ struct mesh_rmc {
 int ieee80211_fill_mesh_addresses(struct ieee80211_hdr *hdr, __le16 *fc,
                                   const u8 *da, const u8 *sa);
 int ieee80211_new_mesh_header(struct ieee80211s_hdr *meshhdr,
-                struct ieee80211_sub_if_data *sdata, char *addr4,
-                char *addr5, char *addr6);
+                struct ieee80211_sub_if_data *sdata, char *addr4or5,
+                char *addr6);
 int mesh_rmc_check(u8 *addr, struct ieee80211s_hdr *mesh_hdr,
                 struct ieee80211_sub_if_data *sdata);
 bool mesh_matches_local(struct ieee802_11_elems *ie,
@@ -295,6 +284,11 @@ static inline void mesh_path_activate(struct mesh_path *mpath)
         mpath->flags |= MESH_PATH_ACTIVE | MESH_PATH_RESOLVED;
 }
 
+static inline bool mesh_path_sel_is_hwmp(struct ieee80211_sub_if_data *sdata)
+{
+        return sdata->u.mesh.mesh_pp_id == IEEE80211_PATH_PROTOCOL_HWMP;
+}
+
 #define for_each_mesh_entry(x, p, node, i) \
         for (i = 0; i <= x->hash_mask; i++) \
                 hlist_for_each_entry_rcu(node, p, &x->hash_buckets[i], list)
@@ -315,6 +309,8 @@ static inline void ieee80211_mesh_restart(struct ieee80211_sub_if_data *sdata)
 {}
 static inline void mesh_plink_quiesce(struct sta_info *sta) {}
 static inline void mesh_plink_restart(struct sta_info *sta) {}
+static inline bool mesh_path_sel_is_hwmp(struct ieee80211_sub_if_data *sdata)
+{ return false; }
 #endif
 
 #endif /* IEEE80211S_H */
diff --git a/net/mac80211/mesh_plink.c b/net/mac80211/mesh_plink.c
index 1c91f0f3c307..44b53931ba5e 100644
--- a/net/mac80211/mesh_plink.c
+++ b/net/mac80211/mesh_plink.c
@@ -160,7 +160,8 @@ static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata,
                 enum plink_frame_type action, u8 *da, __le16 llid, __le16 plid,
                 __le16 reason) {
         struct ieee80211_local *local = sdata->local;
-        struct sk_buff *skb = dev_alloc_skb(local->hw.extra_tx_headroom + 400);
+        struct sk_buff *skb = dev_alloc_skb(local->hw.extra_tx_headroom + 400 +
+                        sdata->u.mesh.vendor_ie_len);
         struct ieee80211_mgmt *mgmt;
         bool include_plid = false;
         static const u8 meshpeeringproto[] = { 0x00, 0x0F, 0xAC, 0x2A };
diff --git a/net/mac80211/rc80211_minstrel_ht.c b/net/mac80211/rc80211_minstrel_ht.c
index 4ad7a362fcc1..165a4518bb48 100644
--- a/net/mac80211/rc80211_minstrel_ht.c
+++ b/net/mac80211/rc80211_minstrel_ht.c
@@ -374,7 +374,7 @@ minstrel_aggr_check(struct minstrel_priv *mp, struct ieee80211_sta *pubsta, stru
         if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
                 return;
 
-        ieee80211_start_tx_ba_session(pubsta, tid);
+        ieee80211_start_tx_ba_session(pubsta, tid, 5000);
 }
 
 static void
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c
index 2fe8f5f86499..7c5d1b2ec453 100644
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
@@ -955,12 +955,31 @@ ieee80211_rx_h_decrypt(struct ieee80211_rx_data *rx)
                  * have been expected.
                  */
                 struct ieee80211_key *key = NULL;
+                struct ieee80211_sub_if_data *sdata = rx->sdata;
+                int i;
+
                 if (ieee80211_is_mgmt(fc) &&
                     is_multicast_ether_addr(hdr->addr1) &&
                     (key = rcu_dereference(rx->sdata->default_mgmt_key)))
                         rx->key = key;
-                else if ((key = rcu_dereference(rx->sdata->default_key)))
-                        rx->key = key;
+                else {
+                        if (rx->sta) {
+                                for (i = 0; i < NUM_DEFAULT_KEYS; i++) {
+                                        key = rcu_dereference(rx->sta->gtk[i]);
+                                        if (key)
+                                                break;
+                                }
+                        }
+                        if (!key) {
+                                for (i = 0; i < NUM_DEFAULT_KEYS; i++) {
+                                        key = rcu_dereference(sdata->keys[i]);
+                                        if (key)
+                                                break;
+                                }
+                        }
+                        if (key)
+                                rx->key = key;
+                }
                 return RX_CONTINUE;
         } else {
                 u8 keyid;
@@ -1521,12 +1540,30 @@ ieee80211_drop_unencrypted_mgmt(struct ieee80211_rx_data *rx)
         if (rx->sta && test_sta_flags(rx->sta, WLAN_STA_MFP)) {
                 if (unlikely(!ieee80211_has_protected(fc) &&
                              ieee80211_is_unicast_robust_mgmt_frame(rx->skb) &&
-                             rx->key))
+                             rx->key)) {
+                        if (ieee80211_is_deauth(fc))
+                                cfg80211_send_unprot_deauth(rx->sdata->dev,
+                                                            rx->skb->data,
+                                                            rx->skb->len);
+                        else if (ieee80211_is_disassoc(fc))
+                                cfg80211_send_unprot_disassoc(rx->sdata->dev,
+                                                              rx->skb->data,
+                                                              rx->skb->len);
                         return -EACCES;
+                }
                 /* BIP does not use Protected field, so need to check MMIE */
                 if (unlikely(ieee80211_is_multicast_robust_mgmt_frame(rx->skb) &&
-                             ieee80211_get_mmie_keyidx(rx->skb) < 0))
+                             ieee80211_get_mmie_keyidx(rx->skb) < 0)) {
+                        if (ieee80211_is_deauth(fc))
+                                cfg80211_send_unprot_deauth(rx->sdata->dev,
+                                                            rx->skb->data,
+                                                            rx->skb->len);
+                        else if (ieee80211_is_disassoc(fc))
+                                cfg80211_send_unprot_disassoc(rx->sdata->dev,
+                                                              rx->skb->data,
+                                                              rx->skb->len);
                         return -EACCES;
+                }
                 /*
                  * When using MFP, Action frames are not allowed prior to
                  * having configured keys.
@@ -2124,10 +2161,13 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx)
                 }
                 break;
         case WLAN_CATEGORY_MESH_PLINK:
-        case WLAN_CATEGORY_MESH_PATH_SEL:
                 if (!ieee80211_vif_is_mesh(&sdata->vif))
                         break;
                 goto queue;
+        case WLAN_CATEGORY_MESH_PATH_SEL:
+                if (!mesh_path_sel_is_hwmp(sdata))
+                        break;
+                goto queue;
         }
 
         return RX_CONTINUE;
diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h
index fdca52cf88de..bbdd2a86a94b 100644
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -78,6 +78,7 @@ enum ieee80211_sta_info_flags {
  * @addba_resp_timer: timer for peer's response to addba request
  * @pending: pending frames queue -- use sta's spinlock to protect
  * @dialog_token: dialog token for aggregation session
+ * @timeout: session timeout value to be filled in ADDBA requests
  * @state: session state (see above)
  * @stop_initiator: initiator of a session stop
  * @tx_stop: TX DelBA frame when stopping
@@ -96,6 +97,7 @@ struct tid_ampdu_tx {
         struct timer_list addba_resp_timer;
         struct sk_buff_head pending;
         unsigned long state;
+        u16 timeout;
         u8 dialog_token;
         u8 stop_initiator;
         bool tx_stop;
diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c
index 0ee56bb0ea7e..d2b4b67a7b53 100644
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -539,7 +539,11 @@ ieee80211_tx_h_select_key(struct ieee80211_tx_data *tx)
                  ieee80211_is_robust_mgmt_frame(hdr) &&
                  (key = rcu_dereference(tx->sdata->default_mgmt_key)))
                 tx->key = key;
-        else if ((key = rcu_dereference(tx->sdata->default_key)))
+        else if (is_multicast_ether_addr(hdr->addr1) &&
+                 (key = rcu_dereference(tx->sdata->default_multicast_key)))
+                tx->key = key;
+        else if (!is_multicast_ether_addr(hdr->addr1) &&
+                 (key = rcu_dereference(tx->sdata->default_unicast_key)))
                 tx->key = key;
         else if (tx->sdata->drop_unencrypted &&
                  (tx->skb->protocol != tx->sdata->control_port_protocol) &&
@@ -1542,8 +1546,10 @@ static int ieee80211_skb_resize(struct ieee80211_local *local,
 
         if (skb_header_cloned(skb))
                 I802_DEBUG_INC(local->tx_expand_skb_head_cloned);
-        else
+        else if (head_need || tail_need)
                 I802_DEBUG_INC(local->tx_expand_skb_head);
+        else
+                return 0;
 
         if (pskb_expand_head(skb, head_need, tail_need, GFP_ATOMIC)) {
                 wiphy_debug(local->hw.wiphy,
@@ -1735,7 +1741,7 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
 {
         struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
         struct ieee80211_local *local = sdata->local;
-        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        struct ieee80211_tx_info *info;
         int ret = NETDEV_TX_BUSY, head_need;
         u16 ethertype, hdrlen,  meshhdrlen = 0;
         __le16 fc;
@@ -1807,7 +1813,7 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
                         hdrlen = ieee80211_fill_mesh_addresses(&hdr, &fc,
                                         skb->data, skb->data + ETH_ALEN);
                         meshhdrlen = ieee80211_new_mesh_header(&mesh_hdr,
-                                        sdata, NULL, NULL, NULL);
+                                        sdata, NULL, NULL);
                 } else {
                         /* packet from other interface */
                         struct mesh_path *mppath;
@@ -1840,13 +1846,11 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
                                         ieee80211_new_mesh_header(&mesh_hdr,
                                                         sdata,
                                                         skb->data + ETH_ALEN,
-                                                        NULL,
                                                         NULL);
                         else
                                 meshhdrlen =
                                         ieee80211_new_mesh_header(&mesh_hdr,
                                                         sdata,
-                                                        NULL,
                                                         skb->data,
                                                         skb->data + ETH_ALEN);
 
@@ -1930,7 +1934,7 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
          */
         if (skb_shared(skb)) {
                 tmp_skb = skb;
-                skb = skb_copy(skb, GFP_ATOMIC);
+                skb = skb_clone(skb, GFP_ATOMIC);
                 kfree_skb(tmp_skb);
 
                 if (!skb) {
@@ -2026,6 +2030,7 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
         skb_set_network_header(skb, nh_pos);
         skb_set_transport_header(skb, h_pos);
 
+        info = IEEE80211_SKB_CB(skb);
         memset(info, 0, sizeof(*info));
 
         dev->trans_start = jiffies;
@@ -2286,7 +2291,8 @@ struct sk_buff *ieee80211_beacon_get_tim(struct ieee80211_hw *hw,
                 u8 *pos;
 
                 /* headroom, head length, tail length and maximum TIM length */
-                skb = dev_alloc_skb(local->tx_headroom + 400);
+                skb = dev_alloc_skb(local->tx_headroom + 400 +
+                                sdata->u.mesh.vendor_ie_len);
                 if (!skb)
                         goto out;
 
diff --git a/net/wireless/core.c b/net/wireless/core.c
index 79772fcc37bc..e9a5f8ca4c27 100644
--- a/net/wireless/core.c
+++ b/net/wireless/core.c
@@ -789,13 +789,23 @@ static int cfg80211_netdev_notifier_call(struct notifier_block * nb,
                         cfg80211_mgd_wext_connect(rdev, wdev);
                         break;
 #endif
+#ifdef CONFIG_MAC80211_MESH
                 case NL80211_IFTYPE_MESH_POINT:
-                        /* backward compat code ... */
-                        if (wdev->mesh_id_up_len)
-                                __cfg80211_join_mesh(rdev, dev, wdev->ssid,
-                                                     wdev->mesh_id_up_len,
-                                                     &default_mesh_config);
-                        break;
+                        {
+                                /* backward compat code... */
+                                struct mesh_setup setup;
+                                memcpy(&setup, &default_mesh_setup,
+                                                sizeof(setup));
+                                 /* back compat only needed for mesh_id */
+                                setup.mesh_id = wdev->ssid;
+                                setup.mesh_id_len = wdev->mesh_id_up_len;
+                                if (wdev->mesh_id_up_len)
+                                        __cfg80211_join_mesh(rdev, dev,
+                                                        &setup,
+                                                        &default_mesh_config);
+                                break;
+                        }
+#endif
                 default:
                         break;
                 }
diff --git a/net/wireless/core.h b/net/wireless/core.h
index 743203bb61ac..26a0a084e16b 100644
--- a/net/wireless/core.h
+++ b/net/wireless/core.h
@@ -287,13 +287,14 @@ int cfg80211_ibss_wext_join(struct cfg80211_registered_device *rdev,
 
 /* mesh */
 extern const struct mesh_config default_mesh_config;
+extern const struct mesh_setup default_mesh_setup;
 int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
                          struct net_device *dev,
-                         const u8 *mesh_id, u8 mesh_id_len,
+                         const struct mesh_setup *setup,
                          const struct mesh_config *conf);
 int cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
                        struct net_device *dev,
-                       const u8 *mesh_id, u8 mesh_id_len,
+                       const struct mesh_setup *setup,
                        const struct mesh_config *conf);
 int cfg80211_leave_mesh(struct cfg80211_registered_device *rdev,
                         struct net_device *dev);
diff --git a/net/wireless/mesh.c b/net/wireless/mesh.c
index e0b9747fe50a..73e39c171ffb 100644
--- a/net/wireless/mesh.c
+++ b/net/wireless/mesh.c
@@ -50,17 +50,19 @@ const struct mesh_config default_mesh_config = {
         .min_discovery_timeout = MESH_MIN_DISCOVERY_TIMEOUT,
 };
 
+const struct mesh_setup default_mesh_setup = {
+        .path_sel_proto = IEEE80211_PATH_PROTOCOL_HWMP,
+        .path_metric = IEEE80211_PATH_METRIC_AIRTIME,
+        .vendor_ie = NULL,
+        .vendor_ie_len = 0,
+};
 
 int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
                          struct net_device *dev,
-                         const u8 *mesh_id, u8 mesh_id_len,
+                         const struct mesh_setup *setup,
                          const struct mesh_config *conf)
 {
         struct wireless_dev *wdev = dev->ieee80211_ptr;
-        struct mesh_setup setup = {
-                .mesh_id = mesh_id,
-                .mesh_id_len = mesh_id_len,
-        };
         int err;
 
         BUILD_BUG_ON(IEEE80211_MAX_SSID_LEN != IEEE80211_MAX_MESH_ID_LEN);
@@ -73,16 +75,16 @@ int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
         if (wdev->mesh_id_len)
                 return -EALREADY;
 
-        if (!mesh_id_len)
+        if (!setup->mesh_id_len)
                 return -EINVAL;
 
         if (!rdev->ops->join_mesh)
                 return -EOPNOTSUPP;
 
-        err = rdev->ops->join_mesh(&rdev->wiphy, dev, conf, &setup);
+        err = rdev->ops->join_mesh(&rdev->wiphy, dev, conf, setup);
         if (!err) {
-                memcpy(wdev->ssid, mesh_id, mesh_id_len);
-                wdev->mesh_id_len = mesh_id_len;
+                memcpy(wdev->ssid, setup->mesh_id, setup->mesh_id_len);
+                wdev->mesh_id_len = setup->mesh_id_len;
         }
 
         return err;
@@ -90,14 +92,14 @@ int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
 
 int cfg80211_join_mesh(struct cfg80211_registered_device *rdev,
                        struct net_device *dev,
-                       const u8 *mesh_id, u8 mesh_id_len,
+                       const struct mesh_setup *setup,
                        const struct mesh_config *conf)
 {
         struct wireless_dev *wdev = dev->ieee80211_ptr;
         int err;
 
         wdev_lock(wdev);
-        err = __cfg80211_join_mesh(rdev, dev, mesh_id, mesh_id_len, conf);
+        err = __cfg80211_join_mesh(rdev, dev, setup, conf);
         wdev_unlock(wdev);
 
         return err;
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c
index d7680f2a4c5b..aa5df8865ff7 100644
--- a/net/wireless/mlme.c
+++ b/net/wireless/mlme.c
@@ -263,6 +263,28 @@ void cfg80211_send_disassoc(struct net_device *dev, const u8 *buf, size_t len)
 }
 EXPORT_SYMBOL(cfg80211_send_disassoc);
 
+void cfg80211_send_unprot_deauth(struct net_device *dev, const u8 *buf,
+                                 size_t len)
+{
+        struct wireless_dev *wdev = dev->ieee80211_ptr;
+        struct wiphy *wiphy = wdev->wiphy;
+        struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+
+        nl80211_send_unprot_deauth(rdev, dev, buf, len, GFP_ATOMIC);
+}
+EXPORT_SYMBOL(cfg80211_send_unprot_deauth);
+
+void cfg80211_send_unprot_disassoc(struct net_device *dev, const u8 *buf,
+                                   size_t len)
+{
+        struct wireless_dev *wdev = dev->ieee80211_ptr;
+        struct wiphy *wiphy = wdev->wiphy;
+        struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+
+        nl80211_send_unprot_disassoc(rdev, dev, buf, len, GFP_ATOMIC);
+}
+EXPORT_SYMBOL(cfg80211_send_unprot_disassoc);
+
 static void __cfg80211_auth_remove(struct wireless_dev *wdev, const u8 *addr)
 {
         int i;
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index c3f80e565365..9b62710891a2 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -123,7 +123,7 @@ static const struct nla_policy nl80211_policy[NL80211_ATTR_MAX+1] = {
                                            .len = NL80211_MAX_SUPP_RATES },
         [NL80211_ATTR_BSS_HT_OPMODE] = { .type = NLA_U16 },
 
-        [NL80211_ATTR_MESH_PARAMS] = { .type = NLA_NESTED },
+        [NL80211_ATTR_MESH_CONFIG] = { .type = NLA_NESTED },
 
         [NL80211_ATTR_HT_CAPABILITY] = { .type = NLA_BINARY,
                                          .len = NL80211_HT_CAPABILITY_LEN },
@@ -171,6 +171,7 @@ static const struct nla_policy nl80211_policy[NL80211_ATTR_MAX+1] = {
         [NL80211_ATTR_WIPHY_ANTENNA_RX] = { .type = NLA_U32 },
         [NL80211_ATTR_MCAST_RATE] = { .type = NLA_U32 },
         [NL80211_ATTR_OFFCHANNEL_TX_OK] = { .type = NLA_FLAG },
+        [NL80211_ATTR_KEY_DEFAULT_TYPES] = { .type = NLA_NESTED },
 };
 
 /* policy for the key attributes */
@@ -182,6 +183,14 @@ static const struct nla_policy nl80211_key_policy[NL80211_KEY_MAX + 1] = {
         [NL80211_KEY_DEFAULT] = { .type = NLA_FLAG },
         [NL80211_KEY_DEFAULT_MGMT] = { .type = NLA_FLAG },
         [NL80211_KEY_TYPE] = { .type = NLA_U32 },
+        [NL80211_KEY_DEFAULT_TYPES] = { .type = NLA_NESTED },
+};
+
+/* policy for the key default flags */
+static const struct nla_policy
+nl80211_key_default_policy[NUM_NL80211_KEY_DEFAULT_TYPES] = {
+        [NL80211_KEY_DEFAULT_TYPE_UNICAST] = { .type = NLA_FLAG },
+        [NL80211_KEY_DEFAULT_TYPE_MULTICAST] = { .type = NLA_FLAG },
 };
 
 /* ifidx get helper */
@@ -314,6 +323,7 @@ struct key_parse {
         int idx;
         int type;
         bool def, defmgmt;
+        bool def_uni, def_multi;
 };
 
 static int nl80211_parse_key_new(struct nlattr *key, struct key_parse *k)
@@ -327,6 +337,13 @@ static int nl80211_parse_key_new(struct nlattr *key, struct key_parse *k)
         k->def = !!tb[NL80211_KEY_DEFAULT];
         k->defmgmt = !!tb[NL80211_KEY_DEFAULT_MGMT];
 
+        if (k->def) {
+                k->def_uni = true;
+                k->def_multi = true;
+        }
+        if (k->defmgmt)
+                k->def_multi = true;
+
         if (tb[NL80211_KEY_IDX])
                 k->idx = nla_get_u8(tb[NL80211_KEY_IDX]);
 
@@ -349,6 +366,19 @@ static int nl80211_parse_key_new(struct nlattr *key, struct key_parse *k)
                         return -EINVAL;
         }
 
+        if (tb[NL80211_KEY_DEFAULT_TYPES]) {
+                struct nlattr *kdt[NUM_NL80211_KEY_DEFAULT_TYPES];
+                int err = nla_parse_nested(kdt,
+                                           NUM_NL80211_KEY_DEFAULT_TYPES - 1,
+                                           tb[NL80211_KEY_DEFAULT_TYPES],
+                                           nl80211_key_default_policy);
+                if (err)
+                        return err;
+
+                k->def_uni = kdt[NL80211_KEY_DEFAULT_TYPE_UNICAST];
+                k->def_multi = kdt[NL80211_KEY_DEFAULT_TYPE_MULTICAST];
+        }
+
         return 0;
 }
 
@@ -373,12 +403,32 @@ static int nl80211_parse_key_old(struct genl_info *info, struct key_parse *k)
         k->def = !!info->attrs[NL80211_ATTR_KEY_DEFAULT];
         k->defmgmt = !!info->attrs[NL80211_ATTR_KEY_DEFAULT_MGMT];
 
+        if (k->def) {
+                k->def_uni = true;
+                k->def_multi = true;
+        }
+        if (k->defmgmt)
+                k->def_multi = true;
+
         if (info->attrs[NL80211_ATTR_KEY_TYPE]) {
                 k->type = nla_get_u32(info->attrs[NL80211_ATTR_KEY_TYPE]);
                 if (k->type < 0 || k->type >= NUM_NL80211_KEYTYPES)
                         return -EINVAL;
         }
 
+        if (info->attrs[NL80211_ATTR_KEY_DEFAULT_TYPES]) {
+                struct nlattr *kdt[NUM_NL80211_KEY_DEFAULT_TYPES];
+                int err = nla_parse_nested(
+                                kdt, NUM_NL80211_KEY_DEFAULT_TYPES - 1,
+                                info->attrs[NL80211_ATTR_KEY_DEFAULT_TYPES],
+                                nl80211_key_default_policy);
+                if (err)
+                        return err;
+
+                k->def_uni = kdt[NL80211_KEY_DEFAULT_TYPE_UNICAST];
+                k->def_multi = kdt[NL80211_KEY_DEFAULT_TYPE_MULTICAST];
+        }
+
         return 0;
 }
 
@@ -401,6 +451,11 @@ static int nl80211_parse_key(struct genl_info *info, struct key_parse *k)
         if (k->def && k->defmgmt)
                 return -EINVAL;
 
+        if (k->defmgmt) {
+                if (k->def_uni || !k->def_multi)
+                        return -EINVAL;
+        }
+
         if (k->idx != -1) {
                 if (k->defmgmt) {
                         if (k->idx < 4 || k->idx > 5)
@@ -450,6 +505,8 @@ nl80211_parse_connkeys(struct cfg80211_registered_device *rdev,
                                 goto error;
                         def = 1;
                         result->def = parse.idx;
+                        if (!parse.def_uni || !parse.def_multi)
+                                goto error;
                 } else if (parse.defmgmt)
                         goto error;
                 err = cfg80211_validate_key_settings(rdev, &parse.p,
@@ -548,7 +605,13 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
         if (dev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL)
                 NLA_PUT_FLAG(msg, NL80211_ATTR_CONTROL_PORT_ETHERTYPE);
 
-        if (dev->ops->get_antenna) {
+        NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX,
+                    dev->wiphy.available_antennas_tx);
+        NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX,
+                    dev->wiphy.available_antennas_rx);
+
+        if ((dev->wiphy.available_antennas_tx ||
+             dev->wiphy.available_antennas_rx) && dev->ops->get_antenna) {
                 u32 tx_ant = 0, rx_ant = 0;
                 int res;
                 res = dev->ops->get_antenna(&dev->wiphy, &tx_ant, &rx_ant);
@@ -662,7 +725,7 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
         CMD(add_beacon, NEW_BEACON);
         CMD(add_station, NEW_STATION);
         CMD(add_mpath, NEW_MPATH);
-        CMD(update_mesh_params, SET_MESH_PARAMS);
+        CMD(update_mesh_config, SET_MESH_CONFIG);
         CMD(change_bss, SET_BSS);
         CMD(auth, AUTHENTICATE);
         CMD(assoc, ASSOCIATE);
@@ -698,6 +761,10 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
 
         nla_nest_end(msg, nl_cmds);
 
+        if (dev->ops->remain_on_channel)
+                NLA_PUT_U32(msg, NL80211_ATTR_MAX_REMAIN_ON_CHANNEL_DURATION,
+                            dev->wiphy.max_remain_on_channel_duration);
+
         /* for now at least assume all drivers have it */
         if (dev->ops->mgmt_tx)
                 NLA_PUT_FLAG(msg, NL80211_ATTR_OFFCHANNEL_TX_OK);
@@ -1046,7 +1113,9 @@ static int nl80211_set_wiphy(struct sk_buff *skb, struct genl_info *info)
         if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_TX] &&
             info->attrs[NL80211_ATTR_WIPHY_ANTENNA_RX]) {
                 u32 tx_ant, rx_ant;
-                if (!rdev->ops->set_antenna) {
+                if ((!rdev->wiphy.available_antennas_tx &&
+                     !rdev->wiphy.available_antennas_rx) ||
+                    !rdev->ops->set_antenna) {
                         result = -EOPNOTSUPP;
                         goto bad_res;
                 }
@@ -1054,6 +1123,17 @@ static int nl80211_set_wiphy(struct sk_buff *skb, struct genl_info *info)
                 tx_ant = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_ANTENNA_TX]);
                 rx_ant = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_ANTENNA_RX]);
 
+                /* reject antenna configurations which don't match the
+                 * available antenna masks, except for the "all" mask */
+                if ((~tx_ant && (tx_ant & ~rdev->wiphy.available_antennas_tx)) ||
+                    (~rx_ant && (rx_ant & ~rdev->wiphy.available_antennas_rx))) {
+                        result = -EINVAL;
+                        goto bad_res;
+                }
+
+                tx_ant = tx_ant & rdev->wiphy.available_antennas_tx;
+                rx_ant = rx_ant & rdev->wiphy.available_antennas_rx;
+
                 result = rdev->ops->set_antenna(&rdev->wiphy, tx_ant, rx_ant);
                 if (result)
                         goto bad_res;
@@ -1575,8 +1655,6 @@ static int nl80211_set_key(struct sk_buff *skb, struct genl_info *info)
         struct key_parse key;
         int err;
         struct net_device *dev = info->user_ptr[1];
-        int (*func)(struct wiphy *wiphy, struct net_device *netdev,
-                    u8 key_index);
 
         err = nl80211_parse_key(info, &key);
         if (err)
@@ -1589,27 +1667,61 @@ static int nl80211_set_key(struct sk_buff *skb, struct genl_info *info)
         if (!key.def && !key.defmgmt)
                 return -EINVAL;
 
-        if (key.def)
-                func = rdev->ops->set_default_key;
-        else
-                func = rdev->ops->set_default_mgmt_key;
+        wdev_lock(dev->ieee80211_ptr);
 
-        if (!func)
-                return -EOPNOTSUPP;
+        if (key.def) {
+                if (!rdev->ops->set_default_key) {
+                        err = -EOPNOTSUPP;
+                        goto out;
+                }
 
-        wdev_lock(dev->ieee80211_ptr);
-        err = nl80211_key_allowed(dev->ieee80211_ptr);
-        if (!err)
-                err = func(&rdev->wiphy, dev, key.idx);
+                err = nl80211_key_allowed(dev->ieee80211_ptr);
+                if (err)
+                        goto out;
+
+                if (!(rdev->wiphy.flags &
+                                WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS)) {
+                        if (!key.def_uni || !key.def_multi) {
+                                err = -EOPNOTSUPP;
+                                goto out;
+                        }
+                }
+
+                err = rdev->ops->set_default_key(&rdev->wiphy, dev, key.idx,
+                                                 key.def_uni, key.def_multi);
+
+                if (err)
+                        goto out;
 
 #ifdef CONFIG_CFG80211_WEXT
-        if (!err) {
-                if (func == rdev->ops->set_default_key)
-                        dev->ieee80211_ptr->wext.default_key = key.idx;
-                else
-                        dev->ieee80211_ptr->wext.default_mgmt_key = key.idx;
-        }
+                dev->ieee80211_ptr->wext.default_key = key.idx;
 #endif
+        } else {
+                if (key.def_uni || !key.def_multi) {
+                        err = -EINVAL;
+                        goto out;
+                }
+
+                if (!rdev->ops->set_default_mgmt_key) {
+                        err = -EOPNOTSUPP;
+                        goto out;
+                }
+
+                err = nl80211_key_allowed(dev->ieee80211_ptr);
+                if (err)
+                        goto out;
+
+                err = rdev->ops->set_default_mgmt_key(&rdev->wiphy,
+                                                      dev, key.idx);
+                if (err)
+                        goto out;
+
+#ifdef CONFIG_CFG80211_WEXT
+                dev->ieee80211_ptr->wext.default_mgmt_key = key.idx;
+#endif
+        }
+
+ out:
         wdev_unlock(dev->ieee80211_ptr);
 
         return err;
@@ -2569,7 +2681,7 @@ static int nl80211_req_set_reg(struct sk_buff *skb, struct genl_info *info)
         return r;
 }
 
-static int nl80211_get_mesh_params(struct sk_buff *skb,
+static int nl80211_get_mesh_config(struct sk_buff *skb,
                                    struct genl_info *info)
 {
         struct cfg80211_registered_device *rdev = info->user_ptr[0];
@@ -2584,7 +2696,7 @@ static int nl80211_get_mesh_params(struct sk_buff *skb,
         if (wdev->iftype != NL80211_IFTYPE_MESH_POINT)
                 return -EOPNOTSUPP;
 
-        if (!rdev->ops->get_mesh_params)
+        if (!rdev->ops->get_mesh_config)
                 return -EOPNOTSUPP;
 
         wdev_lock(wdev);
@@ -2592,7 +2704,7 @@ static int nl80211_get_mesh_params(struct sk_buff *skb,
         if (!wdev->mesh_id_len)
                 memcpy(&cur_params, &default_mesh_config, sizeof(cur_params));
         else
-                err = rdev->ops->get_mesh_params(&rdev->wiphy, dev,
+                err = rdev->ops->get_mesh_config(&rdev->wiphy, dev,
                                                  &cur_params);
         wdev_unlock(wdev);
 
@@ -2604,10 +2716,10 @@ static int nl80211_get_mesh_params(struct sk_buff *skb,
         if (!msg)
                 return -ENOMEM;
         hdr = nl80211hdr_put(msg, info->snd_pid, info->snd_seq, 0,
-                             NL80211_CMD_GET_MESH_PARAMS);
+                             NL80211_CMD_GET_MESH_CONFIG);
         if (!hdr)
                 goto nla_put_failure;
-        pinfoattr = nla_nest_start(msg, NL80211_ATTR_MESH_PARAMS);
+        pinfoattr = nla_nest_start(msg, NL80211_ATTR_MESH_CONFIG);
         if (!pinfoattr)
                 goto nla_put_failure;
         NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex);
@@ -2669,7 +2781,15 @@ static const struct nla_policy nl80211_meshconf_params_policy[NL80211_MESHCONF_A
         [NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME] = { .type = NLA_U16 },
 };
 
-static int nl80211_parse_mesh_params(struct genl_info *info,
+static const struct nla_policy
+        nl80211_mesh_setup_params_policy[NL80211_MESH_SETUP_ATTR_MAX+1] = {
+        [NL80211_MESH_SETUP_ENABLE_VENDOR_PATH_SEL] = { .type = NLA_U8 },
+        [NL80211_MESH_SETUP_ENABLE_VENDOR_METRIC] = { .type = NLA_U8 },
+        [NL80211_MESH_SETUP_VENDOR_PATH_SEL_IE] = { .type = NLA_BINARY,
+                .len = IEEE80211_MAX_DATA_LEN },
+};
+
+static int nl80211_parse_mesh_config(struct genl_info *info,
                                      struct mesh_config *cfg,
                                      u32 *mask_out)
 {
@@ -2685,10 +2805,10 @@ do {\
 } while (0);\
 
 
-        if (!info->attrs[NL80211_ATTR_MESH_PARAMS])
+        if (!info->attrs[NL80211_ATTR_MESH_CONFIG])
                 return -EINVAL;
         if (nla_parse_nested(tb, NL80211_MESHCONF_ATTR_MAX,
-                             info->attrs[NL80211_ATTR_MESH_PARAMS],
+                             info->attrs[NL80211_ATTR_MESH_CONFIG],
                              nl80211_meshconf_params_policy))
                 return -EINVAL;
 
@@ -2735,15 +2855,51 @@ do {\
                         dot11MeshHWMPRootMode, mask,
                         NL80211_MESHCONF_HWMP_ROOTMODE,
                         nla_get_u8);
-
         if (mask_out)
                 *mask_out = mask;
+
         return 0;
 
 #undef FILL_IN_MESH_PARAM_IF_SET
 }
 
-static int nl80211_update_mesh_params(struct sk_buff *skb,
+static int nl80211_parse_mesh_setup(struct genl_info *info,
+                                     struct mesh_setup *setup)
+{
+        struct nlattr *tb[NL80211_MESH_SETUP_ATTR_MAX + 1];
+
+        if (!info->attrs[NL80211_ATTR_MESH_SETUP])
+                return -EINVAL;
+        if (nla_parse_nested(tb, NL80211_MESH_SETUP_ATTR_MAX,
+                             info->attrs[NL80211_ATTR_MESH_SETUP],
+                             nl80211_mesh_setup_params_policy))
+                return -EINVAL;
+
+        if (tb[NL80211_MESH_SETUP_ENABLE_VENDOR_PATH_SEL])
+                setup->path_sel_proto =
+                (nla_get_u8(tb[NL80211_MESH_SETUP_ENABLE_VENDOR_PATH_SEL])) ?
+                 IEEE80211_PATH_PROTOCOL_VENDOR :
+                 IEEE80211_PATH_PROTOCOL_HWMP;
+
+        if (tb[NL80211_MESH_SETUP_ENABLE_VENDOR_METRIC])
+                setup->path_metric =
+                (nla_get_u8(tb[NL80211_MESH_SETUP_ENABLE_VENDOR_METRIC])) ?
+                 IEEE80211_PATH_METRIC_VENDOR :
+                 IEEE80211_PATH_METRIC_AIRTIME;
+
+        if (tb[NL80211_MESH_SETUP_VENDOR_PATH_SEL_IE]) {
+                struct nlattr *ieattr =
+                        tb[NL80211_MESH_SETUP_VENDOR_PATH_SEL_IE];
+                if (!is_valid_ie_attr(ieattr))
+                        return -EINVAL;
+                setup->vendor_ie = nla_data(ieattr);
+                setup->vendor_ie_len = nla_len(ieattr);
+        }
+
+        return 0;
+}
+
+static int nl80211_update_mesh_config(struct sk_buff *skb,
                                       struct genl_info *info)
 {
         struct cfg80211_registered_device *rdev = info->user_ptr[0];
@@ -2756,10 +2912,10 @@ static int nl80211_update_mesh_params(struct sk_buff *skb,
         if (wdev->iftype != NL80211_IFTYPE_MESH_POINT)
                 return -EOPNOTSUPP;
 
-        if (!rdev->ops->update_mesh_params)
+        if (!rdev->ops->update_mesh_config)
                 return -EOPNOTSUPP;
 
-        err = nl80211_parse_mesh_params(info, &cfg, &mask);
+        err = nl80211_parse_mesh_config(info, &cfg, &mask);
         if (err)
                 return err;
 
@@ -2768,7 +2924,7 @@ static int nl80211_update_mesh_params(struct sk_buff *skb,
                 err = -ENOLINK;
 
         if (!err)
-                err = rdev->ops->update_mesh_params(&rdev->wiphy, dev,
+                err = rdev->ops->update_mesh_config(&rdev->wiphy, dev,
                                                     mask, &cfg);
 
         wdev_unlock(wdev);
@@ -4128,7 +4284,8 @@ static int nl80211_remain_on_channel(struct sk_buff *skb,
          * We should be on that channel for at least one jiffie,
          * and more than 5 seconds seems excessive.
          */
-        if (!duration || !msecs_to_jiffies(duration) || duration > 5000)
+        if (!duration || !msecs_to_jiffies(duration) ||
+            duration > rdev->wiphy.max_remain_on_channel_duration)
                 return -EINVAL;
 
         if (!rdev->ops->remain_on_channel)
@@ -4296,6 +4453,7 @@ static int nl80211_register_mgmt(struct sk_buff *skb, struct genl_info *info)
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_CLIENT &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP_VLAN &&
+            dev->ieee80211_ptr->iftype != NL80211_IFTYPE_MESH_POINT &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
                 return -EOPNOTSUPP;
 
@@ -4336,6 +4494,7 @@ static int nl80211_tx_mgmt(struct sk_buff *skb, struct genl_info *info)
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_CLIENT &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP_VLAN &&
+            dev->ieee80211_ptr->iftype != NL80211_IFTYPE_MESH_POINT &&
             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
                 return -EOPNOTSUPP;
 
@@ -4562,14 +4721,16 @@ static int nl80211_join_mesh(struct sk_buff *skb, struct genl_info *info)
         struct cfg80211_registered_device *rdev = info->user_ptr[0];
         struct net_device *dev = info->user_ptr[1];
         struct mesh_config cfg;
+        struct mesh_setup setup;
         int err;
 
         /* start with default */
         memcpy(&cfg, &default_mesh_config, sizeof(cfg));
+        memcpy(&setup, &default_mesh_setup, sizeof(setup));
 
-        if (info->attrs[NL80211_ATTR_MESH_PARAMS]) {
+        if (info->attrs[NL80211_ATTR_MESH_CONFIG]) {
                 /* and parse parameters if given */
-                err = nl80211_parse_mesh_params(info, &cfg, NULL);
+                err = nl80211_parse_mesh_config(info, &cfg, NULL);
                 if (err)
                         return err;
         }
@@ -4578,10 +4739,17 @@ static int nl80211_join_mesh(struct sk_buff *skb, struct genl_info *info)
             !nla_len(info->attrs[NL80211_ATTR_MESH_ID]))
                 return -EINVAL;
 
-        return cfg80211_join_mesh(rdev, dev,
-                                  nla_data(info->attrs[NL80211_ATTR_MESH_ID]),
-                                  nla_len(info->attrs[NL80211_ATTR_MESH_ID]),
-                                  &cfg);
+        setup.mesh_id = nla_data(info->attrs[NL80211_ATTR_MESH_ID]);
+        setup.mesh_id_len = nla_len(info->attrs[NL80211_ATTR_MESH_ID]);
+
+        if (info->attrs[NL80211_ATTR_MESH_SETUP]) {
+                /* parse additional setup parameters if given */
+                err = nl80211_parse_mesh_setup(info, &setup);
+                if (err)
+                        return err;
+        }
+
+        return cfg80211_join_mesh(rdev, dev, &setup, &cfg);
 }
 
 static int nl80211_leave_mesh(struct sk_buff *skb, struct genl_info *info)
@@ -4847,16 +5015,16 @@ static struct genl_ops nl80211_ops[] = {
                 .flags = GENL_ADMIN_PERM,
         },
         {
-                .cmd = NL80211_CMD_GET_MESH_PARAMS,
-                .doit = nl80211_get_mesh_params,
+                .cmd = NL80211_CMD_GET_MESH_CONFIG,
+                .doit = nl80211_get_mesh_config,
                 .policy = nl80211_policy,
                 /* can be retrieved by unprivileged users */
                 .internal_flags = NL80211_FLAG_NEED_NETDEV |
                                   NL80211_FLAG_NEED_RTNL,
         },
         {
-                .cmd = NL80211_CMD_SET_MESH_PARAMS,
-                .doit = nl80211_update_mesh_params,
+                .cmd = NL80211_CMD_SET_MESH_CONFIG,
+                .doit = nl80211_update_mesh_config,
                 .policy = nl80211_policy,
                 .flags = GENL_ADMIN_PERM,
                 .internal_flags = NL80211_FLAG_NEED_NETDEV_UP |
@@ -5368,6 +5536,22 @@ void nl80211_send_disassoc(struct cfg80211_registered_device *rdev,
                                 NL80211_CMD_DISASSOCIATE, gfp);
 }
 
+void nl80211_send_unprot_deauth(struct cfg80211_registered_device *rdev,
+                                struct net_device *netdev, const u8 *buf,
+                                size_t len, gfp_t gfp)
+{
+        nl80211_send_mlme_event(rdev, netdev, buf, len,
+                                NL80211_CMD_UNPROT_DEAUTHENTICATE, gfp);
+}
+
+void nl80211_send_unprot_disassoc(struct cfg80211_registered_device *rdev,
+                                  struct net_device *netdev, const u8 *buf,
+                                  size_t len, gfp_t gfp)
+{
+        nl80211_send_mlme_event(rdev, netdev, buf, len,
+                                NL80211_CMD_UNPROT_DISASSOCIATE, gfp);
+}
+
 static void nl80211_send_mlme_timeout(struct cfg80211_registered_device *rdev,
                                       struct net_device *netdev, int cmd,
                                       const u8 *addr, gfp_t gfp)
diff --git a/net/wireless/nl80211.h b/net/wireless/nl80211.h
index 16c2f7190768..e3f7fa886966 100644
--- a/net/wireless/nl80211.h
+++ b/net/wireless/nl80211.h
@@ -25,6 +25,12 @@ void nl80211_send_deauth(struct cfg80211_registered_device *rdev,
 void nl80211_send_disassoc(struct cfg80211_registered_device *rdev,
                            struct net_device *netdev,
                            const u8 *buf, size_t len, gfp_t gfp);
+void nl80211_send_unprot_deauth(struct cfg80211_registered_device *rdev,
+                                struct net_device *netdev,
+                                const u8 *buf, size_t len, gfp_t gfp);
+void nl80211_send_unprot_disassoc(struct cfg80211_registered_device *rdev,
+                                  struct net_device *netdev,
+                                  const u8 *buf, size_t len, gfp_t gfp);
 void nl80211_send_auth_timeout(struct cfg80211_registered_device *rdev,
                                struct net_device *netdev,
                                const u8 *addr, gfp_t gfp);
diff --git a/net/wireless/reg.c b/net/wireless/reg.c
index 5ed615f94e0c..99d41831d76e 100644
--- a/net/wireless/reg.c
+++ b/net/wireless/reg.c
@@ -661,7 +661,8 @@ static int freq_reg_info_regd(struct wiphy *wiphy,
          * Follow the driver's regulatory domain, if present, unless a country
          * IE has been processed or a user wants to help complaince further
          */
-        if (last_request->initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE &&
+        if (!custom_regd &&
+            last_request->initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE &&
             last_request->initiator != NL80211_REGDOM_SET_BY_USER &&
             wiphy->regd)
                 regd = wiphy->regd;
diff --git a/net/wireless/scan.c b/net/wireless/scan.c
index 503ebb86ba18..ea427f418f64 100644
--- a/net/wireless/scan.c
+++ b/net/wireless/scan.c
@@ -464,6 +464,9 @@ cfg80211_bss_update(struct cfg80211_registered_device *dev,
                 if (res->pub.beacon_ies) {
                         size_t used = dev->wiphy.bss_priv_size + sizeof(*res);
                         size_t ielen = res->pub.len_beacon_ies;
+                        bool information_elements_is_beacon_ies =
+                                (found->pub.information_elements ==
+                                 found->pub.beacon_ies);
 
                         if (found->pub.beacon_ies &&
                             !found->beacon_ies_allocated &&
@@ -487,6 +490,14 @@ cfg80211_bss_update(struct cfg80211_registered_device *dev,
                                         found->pub.len_beacon_ies = ielen;
                                 }
                         }
+
+                        /* Override IEs if they were from a beacon before */
+                        if (information_elements_is_beacon_ies) {
+                                found->pub.information_elements =
+                                        found->pub.beacon_ies;
+                                found->pub.len_information_elements =
+                                        found->pub.len_beacon_ies;
+                        }
                 }
 
                 kref_put(&res->ref, bss_release);
diff --git a/net/wireless/util.c b/net/wireless/util.c
index 4de624ca4c63..7620ae2fcf18 100644
--- a/net/wireless/util.c
+++ b/net/wireless/util.c
@@ -689,7 +689,8 @@ void cfg80211_upload_connect_keys(struct wireless_dev *wdev)
                         continue;
                 }
                 if (wdev->connect_keys->def == i)
-                        if (rdev->ops->set_default_key(wdev->wiphy, dev, i)) {
+                        if (rdev->ops->set_default_key(wdev->wiphy, dev,
+                                                       i, true, true)) {
                                 netdev_err(dev, "failed to set defkey %d\n", i);
                                 continue;
                         }
diff --git a/net/wireless/wext-compat.c b/net/wireless/wext-compat.c
index 12222ee6ebf2..3e5dbd4e4cd5 100644
--- a/net/wireless/wext-compat.c
+++ b/net/wireless/wext-compat.c
@@ -548,8 +548,8 @@ static int __cfg80211_set_encryption(struct cfg80211_registered_device *rdev,
                                 __cfg80211_leave_ibss(rdev, wdev->netdev, true);
                                 rejoin = true;
                         }
-                        err = rdev->ops->set_default_key(&rdev->wiphy,
-                                                         dev, idx);
+                        err = rdev->ops->set_default_key(&rdev->wiphy, dev,
+                                                         idx, true, true);
                 }
                 if (!err) {
                         wdev->wext.default_key = idx;
@@ -627,8 +627,8 @@ int cfg80211_wext_siwencode(struct net_device *dev,
                 err = 0;
                 wdev_lock(wdev);
                 if (wdev->current_bss)
-                        err = rdev->ops->set_default_key(&rdev->wiphy,
-                                                         dev, idx);
+                        err = rdev->ops->set_default_key(&rdev->wiphy, dev,
+                                                         idx, true, true);
                 if (!err)
                         wdev->wext.default_key = idx;
                 wdev_unlock(wdev);