diff options
55 files changed, 2790 insertions, 581 deletions
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 847e3e6356c6..e1289a256ce5 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -16,3 +16,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o | |||
16 | obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o | 16 | obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o |
17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o | 17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o |
18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o | 18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o |
19 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | ||
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 7971d0dc6892..5b7c26395b44 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -77,6 +77,8 @@ struct dmabounce_device_info { | |||
77 | #endif | 77 | #endif |
78 | struct dmabounce_pool small; | 78 | struct dmabounce_pool small; |
79 | struct dmabounce_pool large; | 79 | struct dmabounce_pool large; |
80 | |||
81 | rwlock_t lock; | ||
80 | }; | 82 | }; |
81 | 83 | ||
82 | static LIST_HEAD(dmabounce_devs); | 84 | static LIST_HEAD(dmabounce_devs); |
@@ -116,6 +118,7 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, | |||
116 | struct safe_buffer *buf; | 118 | struct safe_buffer *buf; |
117 | struct dmabounce_pool *pool; | 119 | struct dmabounce_pool *pool; |
118 | struct device *dev = device_info->dev; | 120 | struct device *dev = device_info->dev; |
121 | unsigned long flags; | ||
119 | 122 | ||
120 | dev_dbg(dev, "%s(ptr=%p, size=%d, dir=%d)\n", | 123 | dev_dbg(dev, "%s(ptr=%p, size=%d, dir=%d)\n", |
121 | __func__, ptr, size, dir); | 124 | __func__, ptr, size, dir); |
@@ -163,8 +166,12 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, | |||
163 | print_alloc_stats(device_info); | 166 | print_alloc_stats(device_info); |
164 | #endif | 167 | #endif |
165 | 168 | ||
169 | write_lock_irqsave(&device_info->lock, flags); | ||
170 | |||
166 | list_add(&buf->node, &device_info->safe_buffers); | 171 | list_add(&buf->node, &device_info->safe_buffers); |
167 | 172 | ||
173 | write_unlock_irqrestore(&device_info->lock, flags); | ||
174 | |||
168 | return buf; | 175 | return buf; |
169 | } | 176 | } |
170 | 177 | ||
@@ -172,22 +179,32 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, | |||
172 | static inline struct safe_buffer * | 179 | static inline struct safe_buffer * |
173 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) | 180 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) |
174 | { | 181 | { |
175 | struct safe_buffer *b; | 182 | struct safe_buffer *b = NULL; |
183 | unsigned long flags; | ||
184 | |||
185 | read_lock_irqsave(&device_info->lock, flags); | ||
176 | 186 | ||
177 | list_for_each_entry(b, &device_info->safe_buffers, node) | 187 | list_for_each_entry(b, &device_info->safe_buffers, node) |
178 | if (b->safe_dma_addr == safe_dma_addr) | 188 | if (b->safe_dma_addr == safe_dma_addr) |
179 | return b; | 189 | break; |
180 | 190 | ||
181 | return NULL; | 191 | read_unlock_irqrestore(&device_info->lock, flags); |
192 | return b; | ||
182 | } | 193 | } |
183 | 194 | ||
184 | static inline void | 195 | static inline void |
185 | free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *buf) | 196 | free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *buf) |
186 | { | 197 | { |
198 | unsigned long flags; | ||
199 | |||
187 | dev_dbg(device_info->dev, "%s(buf=%p)\n", __func__, buf); | 200 | dev_dbg(device_info->dev, "%s(buf=%p)\n", __func__, buf); |
188 | 201 | ||
202 | write_lock_irqsave(&device_info->lock, flags); | ||
203 | |||
189 | list_del(&buf->node); | 204 | list_del(&buf->node); |
190 | 205 | ||
206 | write_unlock_irqrestore(&device_info->lock, flags); | ||
207 | |||
191 | if (buf->pool) | 208 | if (buf->pool) |
192 | dma_pool_free(buf->pool->pool, buf->safe, buf->safe_dma_addr); | 209 | dma_pool_free(buf->pool->pool, buf->safe, buf->safe_dma_addr); |
193 | else | 210 | else |
@@ -396,7 +413,6 @@ dma_addr_t | |||
396 | dma_map_single(struct device *dev, void *ptr, size_t size, | 413 | dma_map_single(struct device *dev, void *ptr, size_t size, |
397 | enum dma_data_direction dir) | 414 | enum dma_data_direction dir) |
398 | { | 415 | { |
399 | unsigned long flags; | ||
400 | dma_addr_t dma_addr; | 416 | dma_addr_t dma_addr; |
401 | 417 | ||
402 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 418 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", |
@@ -404,12 +420,8 @@ dma_map_single(struct device *dev, void *ptr, size_t size, | |||
404 | 420 | ||
405 | BUG_ON(dir == DMA_NONE); | 421 | BUG_ON(dir == DMA_NONE); |
406 | 422 | ||
407 | local_irq_save(flags); | ||
408 | |||
409 | dma_addr = map_single(dev, ptr, size, dir); | 423 | dma_addr = map_single(dev, ptr, size, dir); |
410 | 424 | ||
411 | local_irq_restore(flags); | ||
412 | |||
413 | return dma_addr; | 425 | return dma_addr; |
414 | } | 426 | } |
415 | 427 | ||
@@ -424,25 +436,18 @@ void | |||
424 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | 436 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, |
425 | enum dma_data_direction dir) | 437 | enum dma_data_direction dir) |
426 | { | 438 | { |
427 | unsigned long flags; | ||
428 | |||
429 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 439 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", |
430 | __func__, (void *) dma_addr, size, dir); | 440 | __func__, (void *) dma_addr, size, dir); |
431 | 441 | ||
432 | BUG_ON(dir == DMA_NONE); | 442 | BUG_ON(dir == DMA_NONE); |
433 | 443 | ||
434 | local_irq_save(flags); | ||
435 | |||
436 | unmap_single(dev, dma_addr, size, dir); | 444 | unmap_single(dev, dma_addr, size, dir); |
437 | |||
438 | local_irq_restore(flags); | ||
439 | } | 445 | } |
440 | 446 | ||
441 | int | 447 | int |
442 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | 448 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
443 | enum dma_data_direction dir) | 449 | enum dma_data_direction dir) |
444 | { | 450 | { |
445 | unsigned long flags; | ||
446 | int i; | 451 | int i; |
447 | 452 | ||
448 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", | 453 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", |
@@ -450,8 +455,6 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
450 | 455 | ||
451 | BUG_ON(dir == DMA_NONE); | 456 | BUG_ON(dir == DMA_NONE); |
452 | 457 | ||
453 | local_irq_save(flags); | ||
454 | |||
455 | for (i = 0; i < nents; i++, sg++) { | 458 | for (i = 0; i < nents; i++, sg++) { |
456 | struct page *page = sg->page; | 459 | struct page *page = sg->page; |
457 | unsigned int offset = sg->offset; | 460 | unsigned int offset = sg->offset; |
@@ -462,8 +465,6 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
462 | map_single(dev, ptr, length, dir); | 465 | map_single(dev, ptr, length, dir); |
463 | } | 466 | } |
464 | 467 | ||
465 | local_irq_restore(flags); | ||
466 | |||
467 | return nents; | 468 | return nents; |
468 | } | 469 | } |
469 | 470 | ||
@@ -471,7 +472,6 @@ void | |||
471 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, | 472 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, |
472 | enum dma_data_direction dir) | 473 | enum dma_data_direction dir) |
473 | { | 474 | { |
474 | unsigned long flags; | ||
475 | int i; | 475 | int i; |
476 | 476 | ||
477 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", | 477 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", |
@@ -479,55 +479,38 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
479 | 479 | ||
480 | BUG_ON(dir == DMA_NONE); | 480 | BUG_ON(dir == DMA_NONE); |
481 | 481 | ||
482 | local_irq_save(flags); | ||
483 | |||
484 | for (i = 0; i < nents; i++, sg++) { | 482 | for (i = 0; i < nents; i++, sg++) { |
485 | dma_addr_t dma_addr = sg->dma_address; | 483 | dma_addr_t dma_addr = sg->dma_address; |
486 | unsigned int length = sg->length; | 484 | unsigned int length = sg->length; |
487 | 485 | ||
488 | unmap_single(dev, dma_addr, length, dir); | 486 | unmap_single(dev, dma_addr, length, dir); |
489 | } | 487 | } |
490 | |||
491 | local_irq_restore(flags); | ||
492 | } | 488 | } |
493 | 489 | ||
494 | void | 490 | void |
495 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, size_t size, | 491 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, size_t size, |
496 | enum dma_data_direction dir) | 492 | enum dma_data_direction dir) |
497 | { | 493 | { |
498 | unsigned long flags; | ||
499 | |||
500 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 494 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", |
501 | __func__, (void *) dma_addr, size, dir); | 495 | __func__, (void *) dma_addr, size, dir); |
502 | 496 | ||
503 | local_irq_save(flags); | ||
504 | |||
505 | sync_single(dev, dma_addr, size, dir); | 497 | sync_single(dev, dma_addr, size, dir); |
506 | |||
507 | local_irq_restore(flags); | ||
508 | } | 498 | } |
509 | 499 | ||
510 | void | 500 | void |
511 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, size_t size, | 501 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, size_t size, |
512 | enum dma_data_direction dir) | 502 | enum dma_data_direction dir) |
513 | { | 503 | { |
514 | unsigned long flags; | ||
515 | |||
516 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 504 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", |
517 | __func__, (void *) dma_addr, size, dir); | 505 | __func__, (void *) dma_addr, size, dir); |
518 | 506 | ||
519 | local_irq_save(flags); | ||
520 | |||
521 | sync_single(dev, dma_addr, size, dir); | 507 | sync_single(dev, dma_addr, size, dir); |
522 | |||
523 | local_irq_restore(flags); | ||
524 | } | 508 | } |
525 | 509 | ||
526 | void | 510 | void |
527 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, | 511 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, |
528 | enum dma_data_direction dir) | 512 | enum dma_data_direction dir) |
529 | { | 513 | { |
530 | unsigned long flags; | ||
531 | int i; | 514 | int i; |
532 | 515 | ||
533 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", | 516 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", |
@@ -535,23 +518,18 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, | |||
535 | 518 | ||
536 | BUG_ON(dir == DMA_NONE); | 519 | BUG_ON(dir == DMA_NONE); |
537 | 520 | ||
538 | local_irq_save(flags); | ||
539 | |||
540 | for (i = 0; i < nents; i++, sg++) { | 521 | for (i = 0; i < nents; i++, sg++) { |
541 | dma_addr_t dma_addr = sg->dma_address; | 522 | dma_addr_t dma_addr = sg->dma_address; |
542 | unsigned int length = sg->length; | 523 | unsigned int length = sg->length; |
543 | 524 | ||
544 | sync_single(dev, dma_addr, length, dir); | 525 | sync_single(dev, dma_addr, length, dir); |
545 | } | 526 | } |
546 | |||
547 | local_irq_restore(flags); | ||
548 | } | 527 | } |
549 | 528 | ||
550 | void | 529 | void |
551 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, | 530 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, |
552 | enum dma_data_direction dir) | 531 | enum dma_data_direction dir) |
553 | { | 532 | { |
554 | unsigned long flags; | ||
555 | int i; | 533 | int i; |
556 | 534 | ||
557 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", | 535 | dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", |
@@ -559,16 +537,12 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, | |||
559 | 537 | ||
560 | BUG_ON(dir == DMA_NONE); | 538 | BUG_ON(dir == DMA_NONE); |
561 | 539 | ||
562 | local_irq_save(flags); | ||
563 | |||
564 | for (i = 0; i < nents; i++, sg++) { | 540 | for (i = 0; i < nents; i++, sg++) { |
565 | dma_addr_t dma_addr = sg->dma_address; | 541 | dma_addr_t dma_addr = sg->dma_address; |
566 | unsigned int length = sg->length; | 542 | unsigned int length = sg->length; |
567 | 543 | ||
568 | sync_single(dev, dma_addr, length, dir); | 544 | sync_single(dev, dma_addr, length, dir); |
569 | } | 545 | } |
570 | |||
571 | local_irq_restore(flags); | ||
572 | } | 546 | } |
573 | 547 | ||
574 | static int | 548 | static int |
@@ -622,6 +596,7 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, | |||
622 | 596 | ||
623 | device_info->dev = dev; | 597 | device_info->dev = dev; |
624 | INIT_LIST_HEAD(&device_info->safe_buffers); | 598 | INIT_LIST_HEAD(&device_info->safe_buffers); |
599 | rwlock_init(&device_info->lock); | ||
625 | 600 | ||
626 | #ifdef STATS | 601 | #ifdef STATS |
627 | device_info->total_allocs = 0; | 602 | device_info->total_allocs = 0; |
diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c index a1310b71004e..dfca596a9a27 100644 --- a/arch/arm/common/uengine.c +++ b/arch/arm/common/uengine.c | |||
@@ -18,10 +18,26 @@ | |||
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/string.h> | 19 | #include <linux/string.h> |
20 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
21 | #include <asm/arch/ixp2000-regs.h> | 21 | #include <asm/arch/hardware.h> |
22 | #include <asm/hardware/uengine.h> | 22 | #include <asm/hardware/uengine.h> |
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | 24 | ||
25 | #if defined(CONFIG_ARCH_IXP2000) | ||
26 | #define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE | ||
27 | #define IXP_PRODUCT_ID IXP2000_PRODUCT_ID | ||
28 | #define IXP_MISC_CONTROL IXP2000_MISC_CONTROL | ||
29 | #define IXP_RESET1 IXP2000_RESET1 | ||
30 | #else | ||
31 | #if defined(CONFIG_ARCH_IXP23XX) | ||
32 | #define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE | ||
33 | #define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID | ||
34 | #define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL | ||
35 | #define IXP_RESET1 IXP23XX_RESET1 | ||
36 | #else | ||
37 | #error unknown platform | ||
38 | #endif | ||
39 | #endif | ||
40 | |||
25 | #define USTORE_ADDRESS 0x000 | 41 | #define USTORE_ADDRESS 0x000 |
26 | #define USTORE_DATA_LOWER 0x004 | 42 | #define USTORE_DATA_LOWER 0x004 |
27 | #define USTORE_DATA_UPPER 0x008 | 43 | #define USTORE_DATA_UPPER 0x008 |
@@ -43,7 +59,7 @@ u32 ixp2000_uengine_mask; | |||
43 | 59 | ||
44 | static void *ixp2000_uengine_csr_area(int uengine) | 60 | static void *ixp2000_uengine_csr_area(int uengine) |
45 | { | 61 | { |
46 | return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10); | 62 | return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); |
47 | } | 63 | } |
48 | 64 | ||
49 | /* | 65 | /* |
@@ -91,8 +107,13 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write); | |||
91 | 107 | ||
92 | void ixp2000_uengine_reset(u32 uengine_mask) | 108 | void ixp2000_uengine_reset(u32 uengine_mask) |
93 | { | 109 | { |
94 | ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); | 110 | u32 value; |
95 | ixp2000_reg_wrb(IXP2000_RESET1, 0); | 111 | |
112 | value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; | ||
113 | |||
114 | uengine_mask &= ixp2000_uengine_mask; | ||
115 | ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); | ||
116 | ixp2000_reg_wrb(IXP_RESET1, value); | ||
96 | } | 117 | } |
97 | EXPORT_SYMBOL(ixp2000_uengine_reset); | 118 | EXPORT_SYMBOL(ixp2000_uengine_reset); |
98 | 119 | ||
@@ -235,11 +256,12 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) | |||
235 | u32 product_id; | 256 | u32 product_id; |
236 | u32 rev; | 257 | u32 rev; |
237 | 258 | ||
238 | product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID); | 259 | product_id = ixp2000_reg_read(IXP_PRODUCT_ID); |
239 | if (((product_id >> 16) & 0x1f) != 0) | 260 | if (((product_id >> 16) & 0x1f) != 0) |
240 | return 0; | 261 | return 0; |
241 | 262 | ||
242 | switch ((product_id >> 8) & 0xff) { | 263 | switch ((product_id >> 8) & 0xff) { |
264 | #ifdef CONFIG_ARCH_IXP2000 | ||
243 | case 0: /* IXP2800 */ | 265 | case 0: /* IXP2800 */ |
244 | if (!(c->cpu_model_bitmask & 4)) | 266 | if (!(c->cpu_model_bitmask & 4)) |
245 | return 0; | 267 | return 0; |
@@ -254,6 +276,14 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) | |||
254 | if (!(c->cpu_model_bitmask & 2)) | 276 | if (!(c->cpu_model_bitmask & 2)) |
255 | return 0; | 277 | return 0; |
256 | break; | 278 | break; |
279 | #endif | ||
280 | |||
281 | #ifdef CONFIG_ARCH_IXP23XX | ||
282 | case 4: /* IXP23xx */ | ||
283 | if (!(c->cpu_model_bitmask & 0x3f0)) | ||
284 | return 0; | ||
285 | break; | ||
286 | #endif | ||
257 | 287 | ||
258 | default: | 288 | default: |
259 | return 0; | 289 | return 0; |
@@ -432,7 +462,8 @@ static int __init ixp2000_uengine_init(void) | |||
432 | /* | 462 | /* |
433 | * Determine number of microengines present. | 463 | * Determine number of microengines present. |
434 | */ | 464 | */ |
435 | switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) { | 465 | switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { |
466 | #ifdef CONFIG_ARCH_IXP2000 | ||
436 | case 0: /* IXP2800 */ | 467 | case 0: /* IXP2800 */ |
437 | case 1: /* IXP2850 */ | 468 | case 1: /* IXP2850 */ |
438 | ixp2000_uengine_mask = 0x00ff00ff; | 469 | ixp2000_uengine_mask = 0x00ff00ff; |
@@ -441,10 +472,17 @@ static int __init ixp2000_uengine_init(void) | |||
441 | case 2: /* IXP2400 */ | 472 | case 2: /* IXP2400 */ |
442 | ixp2000_uengine_mask = 0x000f000f; | 473 | ixp2000_uengine_mask = 0x000f000f; |
443 | break; | 474 | break; |
475 | #endif | ||
476 | |||
477 | #ifdef CONFIG_ARCH_IXP23XX | ||
478 | case 4: /* IXP23xx */ | ||
479 | ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; | ||
480 | break; | ||
481 | #endif | ||
444 | 482 | ||
445 | default: | 483 | default: |
446 | printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", | 484 | printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", |
447 | (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID)); | 485 | (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); |
448 | ixp2000_uengine_mask = 0x00000000; | 486 | ixp2000_uengine_mask = 0x00000000; |
449 | break; | 487 | break; |
450 | } | 488 | } |
@@ -457,15 +495,15 @@ static int __init ixp2000_uengine_init(void) | |||
457 | /* | 495 | /* |
458 | * Synchronise timestamp counters across all microengines. | 496 | * Synchronise timestamp counters across all microengines. |
459 | */ | 497 | */ |
460 | value = ixp2000_reg_read(IXP2000_MISC_CONTROL); | 498 | value = ixp2000_reg_read(IXP_MISC_CONTROL); |
461 | ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); | 499 | ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); |
462 | for (uengine = 0; uengine < 32; uengine++) { | 500 | for (uengine = 0; uengine < 32; uengine++) { |
463 | if (ixp2000_uengine_mask & (1 << uengine)) { | 501 | if (ixp2000_uengine_mask & (1 << uengine)) { |
464 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); | 502 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); |
465 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); | 503 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); |
466 | } | 504 | } |
467 | } | 505 | } |
468 | ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); | 506 | ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); |
469 | 507 | ||
470 | return 0; | 508 | return 0; |
471 | } | 509 | } |
diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig new file mode 100644 index 000000000000..d08bbe59483a --- /dev/null +++ b/arch/arm/configs/lpd270_defconfig | |||
@@ -0,0 +1,963 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.17-git2 | ||
4 | # Wed Jun 21 22:20:18 2006 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_MMU=y | ||
8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
9 | CONFIG_GENERIC_HWEIGHT=y | ||
10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
11 | CONFIG_ARCH_MTD_XIP=y | ||
12 | CONFIG_VECTORS_BASE=0xffff0000 | ||
13 | |||
14 | # | ||
15 | # Code maturity level options | ||
16 | # | ||
17 | CONFIG_EXPERIMENTAL=y | ||
18 | CONFIG_BROKEN_ON_SMP=y | ||
19 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
20 | |||
21 | # | ||
22 | # General setup | ||
23 | # | ||
24 | CONFIG_LOCALVERSION="" | ||
25 | CONFIG_LOCALVERSION_AUTO=y | ||
26 | CONFIG_SWAP=y | ||
27 | CONFIG_SYSVIPC=y | ||
28 | # CONFIG_POSIX_MQUEUE is not set | ||
29 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
30 | CONFIG_SYSCTL=y | ||
31 | # CONFIG_AUDIT is not set | ||
32 | # CONFIG_IKCONFIG is not set | ||
33 | # CONFIG_RELAY is not set | ||
34 | CONFIG_INITRAMFS_SOURCE="" | ||
35 | CONFIG_UID16=y | ||
36 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
37 | # CONFIG_EMBEDDED is not set | ||
38 | CONFIG_KALLSYMS=y | ||
39 | # CONFIG_KALLSYMS_ALL is not set | ||
40 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
41 | CONFIG_HOTPLUG=y | ||
42 | CONFIG_PRINTK=y | ||
43 | CONFIG_BUG=y | ||
44 | CONFIG_ELF_CORE=y | ||
45 | CONFIG_BASE_FULL=y | ||
46 | CONFIG_FUTEX=y | ||
47 | CONFIG_EPOLL=y | ||
48 | CONFIG_SHMEM=y | ||
49 | CONFIG_SLAB=y | ||
50 | # CONFIG_TINY_SHMEM is not set | ||
51 | CONFIG_BASE_SMALL=0 | ||
52 | # CONFIG_SLOB is not set | ||
53 | |||
54 | # | ||
55 | # Loadable module support | ||
56 | # | ||
57 | CONFIG_MODULES=y | ||
58 | # CONFIG_MODULE_UNLOAD is not set | ||
59 | # CONFIG_MODVERSIONS is not set | ||
60 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
61 | # CONFIG_KMOD is not set | ||
62 | |||
63 | # | ||
64 | # Block layer | ||
65 | # | ||
66 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
67 | |||
68 | # | ||
69 | # IO Schedulers | ||
70 | # | ||
71 | CONFIG_IOSCHED_NOOP=y | ||
72 | CONFIG_IOSCHED_AS=y | ||
73 | CONFIG_IOSCHED_DEADLINE=y | ||
74 | CONFIG_IOSCHED_CFQ=y | ||
75 | CONFIG_DEFAULT_AS=y | ||
76 | # CONFIG_DEFAULT_DEADLINE is not set | ||
77 | # CONFIG_DEFAULT_CFQ is not set | ||
78 | # CONFIG_DEFAULT_NOOP is not set | ||
79 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
80 | |||
81 | # | ||
82 | # System Type | ||
83 | # | ||
84 | # CONFIG_ARCH_AAEC2000 is not set | ||
85 | # CONFIG_ARCH_INTEGRATOR is not set | ||
86 | # CONFIG_ARCH_REALVIEW is not set | ||
87 | # CONFIG_ARCH_VERSATILE is not set | ||
88 | # CONFIG_ARCH_AT91RM9200 is not set | ||
89 | # CONFIG_ARCH_CLPS7500 is not set | ||
90 | # CONFIG_ARCH_CLPS711X is not set | ||
91 | # CONFIG_ARCH_CO285 is not set | ||
92 | # CONFIG_ARCH_EBSA110 is not set | ||
93 | # CONFIG_ARCH_EP93XX is not set | ||
94 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
95 | # CONFIG_ARCH_NETX is not set | ||
96 | # CONFIG_ARCH_H720X is not set | ||
97 | # CONFIG_ARCH_IMX is not set | ||
98 | # CONFIG_ARCH_IOP3XX is not set | ||
99 | # CONFIG_ARCH_IXP4XX is not set | ||
100 | # CONFIG_ARCH_IXP2000 is not set | ||
101 | # CONFIG_ARCH_IXP23XX is not set | ||
102 | # CONFIG_ARCH_L7200 is not set | ||
103 | # CONFIG_ARCH_PNX4008 is not set | ||
104 | CONFIG_ARCH_PXA=y | ||
105 | # CONFIG_ARCH_RPC is not set | ||
106 | # CONFIG_ARCH_SA1100 is not set | ||
107 | # CONFIG_ARCH_S3C2410 is not set | ||
108 | # CONFIG_ARCH_SHARK is not set | ||
109 | # CONFIG_ARCH_LH7A40X is not set | ||
110 | # CONFIG_ARCH_OMAP is not set | ||
111 | |||
112 | # | ||
113 | # Intel PXA2xx Implementations | ||
114 | # | ||
115 | # CONFIG_ARCH_LUBBOCK is not set | ||
116 | CONFIG_MACH_LOGICPD_PXA270=y | ||
117 | # CONFIG_MACH_MAINSTONE is not set | ||
118 | # CONFIG_ARCH_PXA_IDP is not set | ||
119 | # CONFIG_PXA_SHARPSL is not set | ||
120 | CONFIG_PXA27x=y | ||
121 | CONFIG_IWMMXT=y | ||
122 | |||
123 | # | ||
124 | # Processor Type | ||
125 | # | ||
126 | CONFIG_CPU_32=y | ||
127 | CONFIG_CPU_XSCALE=y | ||
128 | CONFIG_CPU_32v5=y | ||
129 | CONFIG_CPU_ABRT_EV5T=y | ||
130 | CONFIG_CPU_CACHE_VIVT=y | ||
131 | CONFIG_CPU_TLB_V4WBI=y | ||
132 | |||
133 | # | ||
134 | # Processor Features | ||
135 | # | ||
136 | # CONFIG_ARM_THUMB is not set | ||
137 | CONFIG_XSCALE_PMU=y | ||
138 | |||
139 | # | ||
140 | # Bus support | ||
141 | # | ||
142 | |||
143 | # | ||
144 | # PCCARD (PCMCIA/CardBus) support | ||
145 | # | ||
146 | # CONFIG_PCCARD is not set | ||
147 | |||
148 | # | ||
149 | # Kernel Features | ||
150 | # | ||
151 | # CONFIG_PREEMPT is not set | ||
152 | # CONFIG_NO_IDLE_HZ is not set | ||
153 | CONFIG_HZ=100 | ||
154 | # CONFIG_AEABI is not set | ||
155 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
156 | CONFIG_SELECT_MEMORY_MODEL=y | ||
157 | CONFIG_FLATMEM_MANUAL=y | ||
158 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
159 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
160 | CONFIG_FLATMEM=y | ||
161 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
162 | # CONFIG_SPARSEMEM_STATIC is not set | ||
163 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
164 | CONFIG_ALIGNMENT_TRAP=y | ||
165 | |||
166 | # | ||
167 | # Boot options | ||
168 | # | ||
169 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
170 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
171 | CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" | ||
172 | # CONFIG_XIP_KERNEL is not set | ||
173 | |||
174 | # | ||
175 | # Floating point emulation | ||
176 | # | ||
177 | |||
178 | # | ||
179 | # At least one emulation must be selected | ||
180 | # | ||
181 | CONFIG_FPE_NWFPE=y | ||
182 | # CONFIG_FPE_NWFPE_XP is not set | ||
183 | # CONFIG_FPE_FASTFPE is not set | ||
184 | |||
185 | # | ||
186 | # Userspace binary formats | ||
187 | # | ||
188 | CONFIG_BINFMT_ELF=y | ||
189 | # CONFIG_BINFMT_AOUT is not set | ||
190 | # CONFIG_BINFMT_MISC is not set | ||
191 | # CONFIG_ARTHUR is not set | ||
192 | |||
193 | # | ||
194 | # Power management options | ||
195 | # | ||
196 | # CONFIG_PM is not set | ||
197 | # CONFIG_PM_LEGACY is not set | ||
198 | # CONFIG_PM_DEBUG is not set | ||
199 | # CONFIG_APM is not set | ||
200 | |||
201 | # | ||
202 | # Networking | ||
203 | # | ||
204 | CONFIG_NET=y | ||
205 | |||
206 | # | ||
207 | # Networking options | ||
208 | # | ||
209 | # CONFIG_NETDEBUG is not set | ||
210 | # CONFIG_PACKET is not set | ||
211 | CONFIG_UNIX=y | ||
212 | CONFIG_XFRM=y | ||
213 | # CONFIG_XFRM_USER is not set | ||
214 | # CONFIG_NET_KEY is not set | ||
215 | CONFIG_INET=y | ||
216 | # CONFIG_IP_MULTICAST is not set | ||
217 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
218 | CONFIG_IP_FIB_HASH=y | ||
219 | CONFIG_IP_PNP=y | ||
220 | # CONFIG_IP_PNP_DHCP is not set | ||
221 | CONFIG_IP_PNP_BOOTP=y | ||
222 | # CONFIG_IP_PNP_RARP is not set | ||
223 | # CONFIG_NET_IPIP is not set | ||
224 | # CONFIG_NET_IPGRE is not set | ||
225 | # CONFIG_ARPD is not set | ||
226 | # CONFIG_SYN_COOKIES is not set | ||
227 | # CONFIG_INET_AH is not set | ||
228 | # CONFIG_INET_ESP is not set | ||
229 | # CONFIG_INET_IPCOMP is not set | ||
230 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
231 | # CONFIG_INET_TUNNEL is not set | ||
232 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
233 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
234 | CONFIG_INET_DIAG=y | ||
235 | CONFIG_INET_TCP_DIAG=y | ||
236 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
237 | CONFIG_TCP_CONG_BIC=y | ||
238 | # CONFIG_IPV6 is not set | ||
239 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
240 | # CONFIG_INET6_TUNNEL is not set | ||
241 | # CONFIG_NETWORK_SECMARK is not set | ||
242 | # CONFIG_NETFILTER is not set | ||
243 | |||
244 | # | ||
245 | # DCCP Configuration (EXPERIMENTAL) | ||
246 | # | ||
247 | # CONFIG_IP_DCCP is not set | ||
248 | |||
249 | # | ||
250 | # SCTP Configuration (EXPERIMENTAL) | ||
251 | # | ||
252 | # CONFIG_IP_SCTP is not set | ||
253 | |||
254 | # | ||
255 | # TIPC Configuration (EXPERIMENTAL) | ||
256 | # | ||
257 | # CONFIG_TIPC is not set | ||
258 | # CONFIG_ATM is not set | ||
259 | # CONFIG_BRIDGE is not set | ||
260 | # CONFIG_VLAN_8021Q is not set | ||
261 | # CONFIG_DECNET is not set | ||
262 | # CONFIG_LLC2 is not set | ||
263 | # CONFIG_IPX is not set | ||
264 | # CONFIG_ATALK is not set | ||
265 | # CONFIG_X25 is not set | ||
266 | # CONFIG_LAPB is not set | ||
267 | # CONFIG_NET_DIVERT is not set | ||
268 | # CONFIG_ECONET is not set | ||
269 | # CONFIG_WAN_ROUTER is not set | ||
270 | |||
271 | # | ||
272 | # QoS and/or fair queueing | ||
273 | # | ||
274 | # CONFIG_NET_SCHED is not set | ||
275 | |||
276 | # | ||
277 | # Network testing | ||
278 | # | ||
279 | # CONFIG_NET_PKTGEN is not set | ||
280 | # CONFIG_HAMRADIO is not set | ||
281 | # CONFIG_IRDA is not set | ||
282 | # CONFIG_BT is not set | ||
283 | # CONFIG_IEEE80211 is not set | ||
284 | |||
285 | # | ||
286 | # Device Drivers | ||
287 | # | ||
288 | |||
289 | # | ||
290 | # Generic Driver Options | ||
291 | # | ||
292 | CONFIG_STANDALONE=y | ||
293 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
294 | # CONFIG_FW_LOADER is not set | ||
295 | # CONFIG_DEBUG_DRIVER is not set | ||
296 | |||
297 | # | ||
298 | # Connector - unified userspace <-> kernelspace linker | ||
299 | # | ||
300 | # CONFIG_CONNECTOR is not set | ||
301 | |||
302 | # | ||
303 | # Memory Technology Devices (MTD) | ||
304 | # | ||
305 | CONFIG_MTD=y | ||
306 | # CONFIG_MTD_DEBUG is not set | ||
307 | # CONFIG_MTD_CONCAT is not set | ||
308 | CONFIG_MTD_PARTITIONS=y | ||
309 | CONFIG_MTD_REDBOOT_PARTS=y | ||
310 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
311 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | ||
312 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
313 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
314 | # CONFIG_MTD_AFS_PARTS is not set | ||
315 | |||
316 | # | ||
317 | # User Modules And Translation Layers | ||
318 | # | ||
319 | CONFIG_MTD_CHAR=y | ||
320 | CONFIG_MTD_BLOCK=y | ||
321 | # CONFIG_FTL is not set | ||
322 | # CONFIG_NFTL is not set | ||
323 | # CONFIG_INFTL is not set | ||
324 | # CONFIG_RFD_FTL is not set | ||
325 | |||
326 | # | ||
327 | # RAM/ROM/Flash chip drivers | ||
328 | # | ||
329 | CONFIG_MTD_CFI=y | ||
330 | # CONFIG_MTD_JEDECPROBE is not set | ||
331 | CONFIG_MTD_GEN_PROBE=y | ||
332 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
333 | CONFIG_MTD_CFI_NOSWAP=y | ||
334 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
335 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
336 | CONFIG_MTD_CFI_GEOMETRY=y | ||
337 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
338 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
339 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
340 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
341 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
342 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
343 | # CONFIG_MTD_CFI_I1 is not set | ||
344 | CONFIG_MTD_CFI_I2=y | ||
345 | # CONFIG_MTD_CFI_I4 is not set | ||
346 | # CONFIG_MTD_CFI_I8 is not set | ||
347 | # CONFIG_MTD_OTP is not set | ||
348 | CONFIG_MTD_CFI_INTELEXT=y | ||
349 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
350 | # CONFIG_MTD_CFI_STAA is not set | ||
351 | CONFIG_MTD_CFI_UTIL=y | ||
352 | # CONFIG_MTD_RAM is not set | ||
353 | # CONFIG_MTD_ROM is not set | ||
354 | # CONFIG_MTD_ABSENT is not set | ||
355 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
356 | # CONFIG_MTD_XIP is not set | ||
357 | |||
358 | # | ||
359 | # Mapping drivers for chip access | ||
360 | # | ||
361 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
362 | # CONFIG_MTD_PHYSMAP is not set | ||
363 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
364 | # CONFIG_MTD_SHARP_SL is not set | ||
365 | # CONFIG_MTD_PLATRAM is not set | ||
366 | |||
367 | # | ||
368 | # Self-contained MTD device drivers | ||
369 | # | ||
370 | # CONFIG_MTD_SLRAM is not set | ||
371 | # CONFIG_MTD_PHRAM is not set | ||
372 | # CONFIG_MTD_MTDRAM is not set | ||
373 | # CONFIG_MTD_BLOCK2MTD is not set | ||
374 | |||
375 | # | ||
376 | # Disk-On-Chip Device Drivers | ||
377 | # | ||
378 | # CONFIG_MTD_DOC2000 is not set | ||
379 | # CONFIG_MTD_DOC2001 is not set | ||
380 | # CONFIG_MTD_DOC2001PLUS is not set | ||
381 | |||
382 | # | ||
383 | # NAND Flash Device Drivers | ||
384 | # | ||
385 | # CONFIG_MTD_NAND is not set | ||
386 | |||
387 | # | ||
388 | # OneNAND Flash Device Drivers | ||
389 | # | ||
390 | # CONFIG_MTD_ONENAND is not set | ||
391 | |||
392 | # | ||
393 | # Parallel port support | ||
394 | # | ||
395 | # CONFIG_PARPORT is not set | ||
396 | |||
397 | # | ||
398 | # Plug and Play support | ||
399 | # | ||
400 | |||
401 | # | ||
402 | # Block devices | ||
403 | # | ||
404 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
405 | # CONFIG_BLK_DEV_LOOP is not set | ||
406 | # CONFIG_BLK_DEV_NBD is not set | ||
407 | # CONFIG_BLK_DEV_RAM is not set | ||
408 | # CONFIG_BLK_DEV_INITRD is not set | ||
409 | # CONFIG_CDROM_PKTCDVD is not set | ||
410 | # CONFIG_ATA_OVER_ETH is not set | ||
411 | |||
412 | # | ||
413 | # ATA/ATAPI/MFM/RLL support | ||
414 | # | ||
415 | CONFIG_IDE=y | ||
416 | CONFIG_BLK_DEV_IDE=y | ||
417 | |||
418 | # | ||
419 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
420 | # | ||
421 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
422 | CONFIG_BLK_DEV_IDEDISK=y | ||
423 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
424 | # CONFIG_BLK_DEV_IDECD is not set | ||
425 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
426 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
427 | # CONFIG_IDE_TASK_IOCTL is not set | ||
428 | |||
429 | # | ||
430 | # IDE chipset support/bugfixes | ||
431 | # | ||
432 | # CONFIG_IDE_GENERIC is not set | ||
433 | # CONFIG_IDE_ARM is not set | ||
434 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
435 | # CONFIG_IDEDMA_AUTO is not set | ||
436 | # CONFIG_BLK_DEV_HD is not set | ||
437 | |||
438 | # | ||
439 | # SCSI device support | ||
440 | # | ||
441 | # CONFIG_RAID_ATTRS is not set | ||
442 | # CONFIG_SCSI is not set | ||
443 | |||
444 | # | ||
445 | # Multi-device support (RAID and LVM) | ||
446 | # | ||
447 | # CONFIG_MD is not set | ||
448 | |||
449 | # | ||
450 | # Fusion MPT device support | ||
451 | # | ||
452 | # CONFIG_FUSION is not set | ||
453 | |||
454 | # | ||
455 | # IEEE 1394 (FireWire) support | ||
456 | # | ||
457 | |||
458 | # | ||
459 | # I2O device support | ||
460 | # | ||
461 | |||
462 | # | ||
463 | # Network device support | ||
464 | # | ||
465 | CONFIG_NETDEVICES=y | ||
466 | # CONFIG_DUMMY is not set | ||
467 | # CONFIG_BONDING is not set | ||
468 | # CONFIG_EQUALIZER is not set | ||
469 | # CONFIG_TUN is not set | ||
470 | |||
471 | # | ||
472 | # PHY device support | ||
473 | # | ||
474 | # CONFIG_PHYLIB is not set | ||
475 | |||
476 | # | ||
477 | # Ethernet (10 or 100Mbit) | ||
478 | # | ||
479 | CONFIG_NET_ETHERNET=y | ||
480 | CONFIG_MII=y | ||
481 | CONFIG_SMC91X=y | ||
482 | # CONFIG_DM9000 is not set | ||
483 | # CONFIG_SMC911X is not set | ||
484 | |||
485 | # | ||
486 | # Ethernet (1000 Mbit) | ||
487 | # | ||
488 | |||
489 | # | ||
490 | # Ethernet (10000 Mbit) | ||
491 | # | ||
492 | |||
493 | # | ||
494 | # Token Ring devices | ||
495 | # | ||
496 | |||
497 | # | ||
498 | # Wireless LAN (non-hamradio) | ||
499 | # | ||
500 | # CONFIG_NET_RADIO is not set | ||
501 | |||
502 | # | ||
503 | # Wan interfaces | ||
504 | # | ||
505 | # CONFIG_WAN is not set | ||
506 | # CONFIG_PPP is not set | ||
507 | # CONFIG_SLIP is not set | ||
508 | # CONFIG_SHAPER is not set | ||
509 | # CONFIG_NETCONSOLE is not set | ||
510 | # CONFIG_NETPOLL is not set | ||
511 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
512 | |||
513 | # | ||
514 | # ISDN subsystem | ||
515 | # | ||
516 | # CONFIG_ISDN is not set | ||
517 | |||
518 | # | ||
519 | # Input device support | ||
520 | # | ||
521 | CONFIG_INPUT=y | ||
522 | |||
523 | # | ||
524 | # Userland interfaces | ||
525 | # | ||
526 | CONFIG_INPUT_MOUSEDEV=y | ||
527 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
528 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
529 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
530 | # CONFIG_INPUT_JOYDEV is not set | ||
531 | # CONFIG_INPUT_TSDEV is not set | ||
532 | CONFIG_INPUT_EVDEV=y | ||
533 | # CONFIG_INPUT_EVBUG is not set | ||
534 | |||
535 | # | ||
536 | # Input Device Drivers | ||
537 | # | ||
538 | CONFIG_INPUT_KEYBOARD=y | ||
539 | CONFIG_KEYBOARD_ATKBD=y | ||
540 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
541 | # CONFIG_KEYBOARD_LKKBD is not set | ||
542 | # CONFIG_KEYBOARD_XTKBD is not set | ||
543 | # CONFIG_KEYBOARD_NEWTON is not set | ||
544 | # CONFIG_INPUT_MOUSE is not set | ||
545 | # CONFIG_INPUT_JOYSTICK is not set | ||
546 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
547 | # CONFIG_INPUT_MISC is not set | ||
548 | |||
549 | # | ||
550 | # Hardware I/O ports | ||
551 | # | ||
552 | CONFIG_SERIO=y | ||
553 | # CONFIG_SERIO_SERPORT is not set | ||
554 | CONFIG_SERIO_LIBPS2=y | ||
555 | # CONFIG_SERIO_RAW is not set | ||
556 | # CONFIG_GAMEPORT is not set | ||
557 | |||
558 | # | ||
559 | # Character devices | ||
560 | # | ||
561 | CONFIG_VT=y | ||
562 | CONFIG_VT_CONSOLE=y | ||
563 | CONFIG_HW_CONSOLE=y | ||
564 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
565 | |||
566 | # | ||
567 | # Serial drivers | ||
568 | # | ||
569 | # CONFIG_SERIAL_8250 is not set | ||
570 | |||
571 | # | ||
572 | # Non-8250 serial port support | ||
573 | # | ||
574 | CONFIG_SERIAL_PXA=y | ||
575 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
576 | CONFIG_SERIAL_CORE=y | ||
577 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
578 | CONFIG_UNIX98_PTYS=y | ||
579 | CONFIG_LEGACY_PTYS=y | ||
580 | CONFIG_LEGACY_PTY_COUNT=256 | ||
581 | |||
582 | # | ||
583 | # IPMI | ||
584 | # | ||
585 | # CONFIG_IPMI_HANDLER is not set | ||
586 | |||
587 | # | ||
588 | # Watchdog Cards | ||
589 | # | ||
590 | # CONFIG_WATCHDOG is not set | ||
591 | # CONFIG_NVRAM is not set | ||
592 | # CONFIG_DTLK is not set | ||
593 | # CONFIG_R3964 is not set | ||
594 | |||
595 | # | ||
596 | # Ftape, the floppy tape device driver | ||
597 | # | ||
598 | # CONFIG_RAW_DRIVER is not set | ||
599 | |||
600 | # | ||
601 | # TPM devices | ||
602 | # | ||
603 | # CONFIG_TCG_TPM is not set | ||
604 | # CONFIG_TELCLOCK is not set | ||
605 | |||
606 | # | ||
607 | # I2C support | ||
608 | # | ||
609 | # CONFIG_I2C is not set | ||
610 | |||
611 | # | ||
612 | # SPI support | ||
613 | # | ||
614 | # CONFIG_SPI is not set | ||
615 | # CONFIG_SPI_MASTER is not set | ||
616 | |||
617 | # | ||
618 | # Dallas's 1-wire bus | ||
619 | # | ||
620 | # CONFIG_W1 is not set | ||
621 | |||
622 | # | ||
623 | # Hardware Monitoring support | ||
624 | # | ||
625 | CONFIG_HWMON=y | ||
626 | # CONFIG_HWMON_VID is not set | ||
627 | # CONFIG_SENSORS_F71805F is not set | ||
628 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
629 | |||
630 | # | ||
631 | # Misc devices | ||
632 | # | ||
633 | |||
634 | # | ||
635 | # LED devices | ||
636 | # | ||
637 | # CONFIG_NEW_LEDS is not set | ||
638 | |||
639 | # | ||
640 | # LED drivers | ||
641 | # | ||
642 | |||
643 | # | ||
644 | # LED Triggers | ||
645 | # | ||
646 | |||
647 | # | ||
648 | # Multimedia devices | ||
649 | # | ||
650 | # CONFIG_VIDEO_DEV is not set | ||
651 | CONFIG_VIDEO_V4L2=y | ||
652 | |||
653 | # | ||
654 | # Digital Video Broadcasting Devices | ||
655 | # | ||
656 | # CONFIG_DVB is not set | ||
657 | |||
658 | # | ||
659 | # Graphics support | ||
660 | # | ||
661 | CONFIG_FB=y | ||
662 | CONFIG_FB_CFB_FILLRECT=y | ||
663 | CONFIG_FB_CFB_COPYAREA=y | ||
664 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
665 | # CONFIG_FB_MACMODES is not set | ||
666 | CONFIG_FB_FIRMWARE_EDID=y | ||
667 | # CONFIG_FB_MODE_HELPERS is not set | ||
668 | # CONFIG_FB_TILEBLITTING is not set | ||
669 | # CONFIG_FB_S1D13XXX is not set | ||
670 | CONFIG_FB_PXA=y | ||
671 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
672 | # CONFIG_FB_VIRTUAL is not set | ||
673 | |||
674 | # | ||
675 | # Console display driver support | ||
676 | # | ||
677 | # CONFIG_VGA_CONSOLE is not set | ||
678 | CONFIG_DUMMY_CONSOLE=y | ||
679 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
680 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
681 | # CONFIG_FONTS is not set | ||
682 | CONFIG_FONT_8x8=y | ||
683 | CONFIG_FONT_8x16=y | ||
684 | |||
685 | # | ||
686 | # Logo configuration | ||
687 | # | ||
688 | CONFIG_LOGO=y | ||
689 | CONFIG_LOGO_LINUX_MONO=y | ||
690 | CONFIG_LOGO_LINUX_VGA16=y | ||
691 | CONFIG_LOGO_LINUX_CLUT224=y | ||
692 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
693 | |||
694 | # | ||
695 | # Sound | ||
696 | # | ||
697 | CONFIG_SOUND=y | ||
698 | |||
699 | # | ||
700 | # Advanced Linux Sound Architecture | ||
701 | # | ||
702 | CONFIG_SND=y | ||
703 | CONFIG_SND_TIMER=y | ||
704 | CONFIG_SND_PCM=y | ||
705 | # CONFIG_SND_SEQUENCER is not set | ||
706 | # CONFIG_SND_MIXER_OSS is not set | ||
707 | # CONFIG_SND_PCM_OSS is not set | ||
708 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
709 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
710 | CONFIG_SND_VERBOSE_PROCFS=y | ||
711 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
712 | # CONFIG_SND_DEBUG is not set | ||
713 | |||
714 | # | ||
715 | # Generic devices | ||
716 | # | ||
717 | CONFIG_SND_AC97_CODEC=y | ||
718 | CONFIG_SND_AC97_BUS=y | ||
719 | # CONFIG_SND_DUMMY is not set | ||
720 | # CONFIG_SND_MTPAV is not set | ||
721 | # CONFIG_SND_SERIAL_U16550 is not set | ||
722 | # CONFIG_SND_MPU401 is not set | ||
723 | |||
724 | # | ||
725 | # ALSA ARM devices | ||
726 | # | ||
727 | CONFIG_SND_PXA2XX_PCM=y | ||
728 | CONFIG_SND_PXA2XX_AC97=y | ||
729 | |||
730 | # | ||
731 | # Open Sound System | ||
732 | # | ||
733 | # CONFIG_SOUND_PRIME is not set | ||
734 | |||
735 | # | ||
736 | # USB support | ||
737 | # | ||
738 | CONFIG_USB_ARCH_HAS_HCD=y | ||
739 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
740 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
741 | # CONFIG_USB is not set | ||
742 | |||
743 | # | ||
744 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
745 | # | ||
746 | |||
747 | # | ||
748 | # USB Gadget Support | ||
749 | # | ||
750 | # CONFIG_USB_GADGET is not set | ||
751 | |||
752 | # | ||
753 | # MMC/SD Card support | ||
754 | # | ||
755 | # CONFIG_MMC is not set | ||
756 | |||
757 | # | ||
758 | # Real Time Clock | ||
759 | # | ||
760 | CONFIG_RTC_LIB=y | ||
761 | # CONFIG_RTC_CLASS is not set | ||
762 | |||
763 | # | ||
764 | # File systems | ||
765 | # | ||
766 | CONFIG_EXT2_FS=y | ||
767 | # CONFIG_EXT2_FS_XATTR is not set | ||
768 | # CONFIG_EXT2_FS_XIP is not set | ||
769 | # CONFIG_EXT3_FS is not set | ||
770 | # CONFIG_REISERFS_FS is not set | ||
771 | # CONFIG_JFS_FS is not set | ||
772 | # CONFIG_FS_POSIX_ACL is not set | ||
773 | # CONFIG_XFS_FS is not set | ||
774 | # CONFIG_OCFS2_FS is not set | ||
775 | # CONFIG_MINIX_FS is not set | ||
776 | # CONFIG_ROMFS_FS is not set | ||
777 | CONFIG_INOTIFY=y | ||
778 | CONFIG_INOTIFY_USER=y | ||
779 | # CONFIG_QUOTA is not set | ||
780 | CONFIG_DNOTIFY=y | ||
781 | # CONFIG_AUTOFS_FS is not set | ||
782 | # CONFIG_AUTOFS4_FS is not set | ||
783 | # CONFIG_FUSE_FS is not set | ||
784 | |||
785 | # | ||
786 | # CD-ROM/DVD Filesystems | ||
787 | # | ||
788 | # CONFIG_ISO9660_FS is not set | ||
789 | # CONFIG_UDF_FS is not set | ||
790 | |||
791 | # | ||
792 | # DOS/FAT/NT Filesystems | ||
793 | # | ||
794 | CONFIG_FAT_FS=y | ||
795 | CONFIG_MSDOS_FS=y | ||
796 | # CONFIG_VFAT_FS is not set | ||
797 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
798 | # CONFIG_NTFS_FS is not set | ||
799 | |||
800 | # | ||
801 | # Pseudo filesystems | ||
802 | # | ||
803 | CONFIG_PROC_FS=y | ||
804 | CONFIG_SYSFS=y | ||
805 | # CONFIG_TMPFS is not set | ||
806 | # CONFIG_HUGETLB_PAGE is not set | ||
807 | CONFIG_RAMFS=y | ||
808 | # CONFIG_CONFIGFS_FS is not set | ||
809 | |||
810 | # | ||
811 | # Miscellaneous filesystems | ||
812 | # | ||
813 | # CONFIG_ADFS_FS is not set | ||
814 | # CONFIG_AFFS_FS is not set | ||
815 | # CONFIG_HFS_FS is not set | ||
816 | # CONFIG_HFSPLUS_FS is not set | ||
817 | # CONFIG_BEFS_FS is not set | ||
818 | # CONFIG_BFS_FS is not set | ||
819 | # CONFIG_EFS_FS is not set | ||
820 | # CONFIG_JFFS_FS is not set | ||
821 | CONFIG_JFFS2_FS=y | ||
822 | CONFIG_JFFS2_FS_DEBUG=0 | ||
823 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
824 | # CONFIG_JFFS2_SUMMARY is not set | ||
825 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
826 | CONFIG_JFFS2_ZLIB=y | ||
827 | CONFIG_JFFS2_RTIME=y | ||
828 | # CONFIG_JFFS2_RUBIN is not set | ||
829 | # CONFIG_CRAMFS is not set | ||
830 | # CONFIG_VXFS_FS is not set | ||
831 | # CONFIG_HPFS_FS is not set | ||
832 | # CONFIG_QNX4FS_FS is not set | ||
833 | # CONFIG_SYSV_FS is not set | ||
834 | # CONFIG_UFS_FS is not set | ||
835 | |||
836 | # | ||
837 | # Network File Systems | ||
838 | # | ||
839 | CONFIG_NFS_FS=y | ||
840 | # CONFIG_NFS_V3 is not set | ||
841 | # CONFIG_NFS_V4 is not set | ||
842 | # CONFIG_NFS_DIRECTIO is not set | ||
843 | # CONFIG_NFSD is not set | ||
844 | CONFIG_ROOT_NFS=y | ||
845 | CONFIG_LOCKD=y | ||
846 | CONFIG_NFS_COMMON=y | ||
847 | CONFIG_SUNRPC=y | ||
848 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
849 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
850 | # CONFIG_SMB_FS is not set | ||
851 | # CONFIG_CIFS is not set | ||
852 | # CONFIG_NCP_FS is not set | ||
853 | # CONFIG_CODA_FS is not set | ||
854 | # CONFIG_AFS_FS is not set | ||
855 | # CONFIG_9P_FS is not set | ||
856 | |||
857 | # | ||
858 | # Partition Types | ||
859 | # | ||
860 | # CONFIG_PARTITION_ADVANCED is not set | ||
861 | CONFIG_MSDOS_PARTITION=y | ||
862 | |||
863 | # | ||
864 | # Native Language Support | ||
865 | # | ||
866 | CONFIG_NLS=y | ||
867 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
868 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
869 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
870 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
871 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
872 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
873 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
874 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
875 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
876 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
877 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
878 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
879 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
880 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
881 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
882 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
883 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
884 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
885 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
886 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
887 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
888 | # CONFIG_NLS_ISO8859_8 is not set | ||
889 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
890 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
891 | # CONFIG_NLS_ASCII is not set | ||
892 | CONFIG_NLS_ISO8859_1=y | ||
893 | # CONFIG_NLS_ISO8859_2 is not set | ||
894 | # CONFIG_NLS_ISO8859_3 is not set | ||
895 | # CONFIG_NLS_ISO8859_4 is not set | ||
896 | # CONFIG_NLS_ISO8859_5 is not set | ||
897 | # CONFIG_NLS_ISO8859_6 is not set | ||
898 | # CONFIG_NLS_ISO8859_7 is not set | ||
899 | # CONFIG_NLS_ISO8859_9 is not set | ||
900 | # CONFIG_NLS_ISO8859_13 is not set | ||
901 | # CONFIG_NLS_ISO8859_14 is not set | ||
902 | # CONFIG_NLS_ISO8859_15 is not set | ||
903 | # CONFIG_NLS_KOI8_R is not set | ||
904 | # CONFIG_NLS_KOI8_U is not set | ||
905 | # CONFIG_NLS_UTF8 is not set | ||
906 | |||
907 | # | ||
908 | # Profiling support | ||
909 | # | ||
910 | # CONFIG_PROFILING is not set | ||
911 | |||
912 | # | ||
913 | # Kernel hacking | ||
914 | # | ||
915 | # CONFIG_PRINTK_TIME is not set | ||
916 | CONFIG_MAGIC_SYSRQ=y | ||
917 | CONFIG_DEBUG_KERNEL=y | ||
918 | CONFIG_LOG_BUF_SHIFT=14 | ||
919 | CONFIG_DETECT_SOFTLOCKUP=y | ||
920 | # CONFIG_SCHEDSTATS is not set | ||
921 | # CONFIG_DEBUG_SLAB is not set | ||
922 | # CONFIG_DEBUG_MUTEXES is not set | ||
923 | # CONFIG_DEBUG_SPINLOCK is not set | ||
924 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
925 | # CONFIG_DEBUG_KOBJECT is not set | ||
926 | CONFIG_DEBUG_BUGVERBOSE=y | ||
927 | CONFIG_DEBUG_INFO=y | ||
928 | # CONFIG_DEBUG_FS is not set | ||
929 | # CONFIG_DEBUG_VM is not set | ||
930 | CONFIG_FRAME_POINTER=y | ||
931 | # CONFIG_UNWIND_INFO is not set | ||
932 | CONFIG_FORCED_INLINING=y | ||
933 | # CONFIG_RCU_TORTURE_TEST is not set | ||
934 | CONFIG_DEBUG_USER=y | ||
935 | # CONFIG_DEBUG_WAITQ is not set | ||
936 | CONFIG_DEBUG_ERRORS=y | ||
937 | CONFIG_DEBUG_LL=y | ||
938 | # CONFIG_DEBUG_ICEDCC is not set | ||
939 | |||
940 | # | ||
941 | # Security options | ||
942 | # | ||
943 | # CONFIG_KEYS is not set | ||
944 | # CONFIG_SECURITY is not set | ||
945 | |||
946 | # | ||
947 | # Cryptographic options | ||
948 | # | ||
949 | # CONFIG_CRYPTO is not set | ||
950 | |||
951 | # | ||
952 | # Hardware crypto devices | ||
953 | # | ||
954 | |||
955 | # | ||
956 | # Library routines | ||
957 | # | ||
958 | # CONFIG_CRC_CCITT is not set | ||
959 | # CONFIG_CRC16 is not set | ||
960 | CONFIG_CRC32=y | ||
961 | # CONFIG_LIBCRC32C is not set | ||
962 | CONFIG_ZLIB_INFLATE=y | ||
963 | CONFIG_ZLIB_DEFLATE=y | ||
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index ab8e600c18c8..86c92523a346 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <asm/glue.h> | 20 | #include <asm/glue.h> |
21 | #include <asm/vfpmacros.h> | 21 | #include <asm/vfpmacros.h> |
22 | #include <asm/arch/entry-macro.S> | 22 | #include <asm/arch/entry-macro.S> |
23 | #include <asm/thread_notify.h> | ||
23 | 24 | ||
24 | #include "entry-header.S" | 25 | #include "entry-header.S" |
25 | 26 | ||
@@ -560,10 +561,8 @@ ENTRY(__switch_to) | |||
560 | add ip, r1, #TI_CPU_SAVE | 561 | add ip, r1, #TI_CPU_SAVE |
561 | ldr r3, [r2, #TI_TP_VALUE] | 562 | ldr r3, [r2, #TI_TP_VALUE] |
562 | stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack | 563 | stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack |
563 | #ifndef CONFIG_MMU | 564 | #ifdef CONFIG_MMU |
564 | add r2, r2, #TI_CPU_DOMAIN | 565 | ldr r6, [r2, #TI_CPU_DOMAIN] |
565 | #else | ||
566 | ldr r6, [r2, #TI_CPU_DOMAIN]! | ||
567 | #endif | 566 | #endif |
568 | #if __LINUX_ARM_ARCH__ >= 6 | 567 | #if __LINUX_ARM_ARCH__ >= 6 |
569 | #ifdef CONFIG_CPU_32v6K | 568 | #ifdef CONFIG_CPU_32v6K |
@@ -585,21 +584,20 @@ ENTRY(__switch_to) | |||
585 | #ifdef CONFIG_MMU | 584 | #ifdef CONFIG_MMU |
586 | mcr p15, 0, r6, c3, c0, 0 @ Set domain register | 585 | mcr p15, 0, r6, c3, c0, 0 @ Set domain register |
587 | #endif | 586 | #endif |
588 | #ifdef CONFIG_VFP | ||
589 | @ Always disable VFP so we can lazily save/restore the old | ||
590 | @ state. This occurs in the context of the previous thread. | ||
591 | VFPFMRX r4, FPEXC | ||
592 | bic r4, r4, #FPEXC_ENABLE | ||
593 | VFPFMXR FPEXC, r4 | ||
594 | #endif | ||
595 | #if defined(CONFIG_IWMMXT) | 587 | #if defined(CONFIG_IWMMXT) |
596 | bl iwmmxt_task_switch | 588 | bl iwmmxt_task_switch |
597 | #elif defined(CONFIG_CPU_XSCALE) | 589 | #elif defined(CONFIG_CPU_XSCALE) |
598 | add r4, r2, #40 @ cpu_context_save->extra | 590 | add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra |
599 | ldmib r4, {r4, r5} | 591 | ldmib r4, {r4, r5} |
600 | mar acc0, r4, r5 | 592 | mar acc0, r4, r5 |
601 | #endif | 593 | #endif |
602 | ldmib r2, {r4 - sl, fp, sp, pc} @ Load all regs saved previously | 594 | mov r5, r0 |
595 | add r4, r2, #TI_CPU_SAVE | ||
596 | ldr r0, =thread_notify_head | ||
597 | mov r1, #THREAD_NOTIFY_SWITCH | ||
598 | bl atomic_notifier_call_chain | ||
599 | mov r0, r5 | ||
600 | ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously | ||
603 | 601 | ||
604 | __INIT | 602 | __INIT |
605 | 603 | ||
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 24c7b0477a09..af9e0ae952d5 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S | |||
@@ -285,7 +285,7 @@ ENTRY(iwmmxt_task_switch) | |||
285 | bne 1f @ yes: block them for next task | 285 | bne 1f @ yes: block them for next task |
286 | 286 | ||
287 | ldr r5, =concan_owner | 287 | ldr r5, =concan_owner |
288 | add r6, r2, #(TI_IWMMXT_STATE - TI_CPU_DOMAIN) @ get next task Concan save area | 288 | add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area |
289 | ldr r5, [r5] @ get current Concan owner | 289 | ldr r5, [r5] @ get current Concan owner |
290 | teq r5, r6 @ next task owns it? | 290 | teq r5, r6 @ next task owns it? |
291 | movne pc, lr @ no: leave Concan disabled | 291 | movne pc, lr @ no: leave Concan disabled |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 17c38dbf2f3c..e1c77ee885a7 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/leds.h> | 33 | #include <asm/leds.h> |
34 | #include <asm/processor.h> | 34 | #include <asm/processor.h> |
35 | #include <asm/system.h> | 35 | #include <asm/system.h> |
36 | #include <asm/thread_notify.h> | ||
36 | #include <asm/uaccess.h> | 37 | #include <asm/uaccess.h> |
37 | #include <asm/mach/time.h> | 38 | #include <asm/mach/time.h> |
38 | 39 | ||
@@ -338,13 +339,9 @@ void exit_thread(void) | |||
338 | { | 339 | { |
339 | } | 340 | } |
340 | 341 | ||
341 | static void default_fp_init(union fp_state *fp) | 342 | ATOMIC_NOTIFIER_HEAD(thread_notify_head); |
342 | { | ||
343 | memset(fp, 0, sizeof(union fp_state)); | ||
344 | } | ||
345 | 343 | ||
346 | void (*fp_init)(union fp_state *) = default_fp_init; | 344 | EXPORT_SYMBOL_GPL(thread_notify_head); |
347 | EXPORT_SYMBOL(fp_init); | ||
348 | 345 | ||
349 | void flush_thread(void) | 346 | void flush_thread(void) |
350 | { | 347 | { |
@@ -353,22 +350,21 @@ void flush_thread(void) | |||
353 | 350 | ||
354 | memset(thread->used_cp, 0, sizeof(thread->used_cp)); | 351 | memset(thread->used_cp, 0, sizeof(thread->used_cp)); |
355 | memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); | 352 | memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); |
353 | memset(&thread->fpstate, 0, sizeof(union fp_state)); | ||
354 | |||
355 | thread_notify(THREAD_NOTIFY_FLUSH, thread); | ||
356 | #if defined(CONFIG_IWMMXT) | 356 | #if defined(CONFIG_IWMMXT) |
357 | iwmmxt_task_release(thread); | 357 | iwmmxt_task_release(thread); |
358 | #endif | 358 | #endif |
359 | fp_init(&thread->fpstate); | ||
360 | #if defined(CONFIG_VFP) | ||
361 | vfp_flush_thread(&thread->vfpstate); | ||
362 | #endif | ||
363 | } | 359 | } |
364 | 360 | ||
365 | void release_thread(struct task_struct *dead_task) | 361 | void release_thread(struct task_struct *dead_task) |
366 | { | 362 | { |
367 | #if defined(CONFIG_VFP) | 363 | struct thread_info *thread = task_thread_info(dead_task); |
368 | vfp_release_thread(&task_thread_info(dead_task)->vfpstate); | 364 | |
369 | #endif | 365 | thread_notify(THREAD_NOTIFY_RELEASE, thread); |
370 | #if defined(CONFIG_IWMMXT) | 366 | #if defined(CONFIG_IWMMXT) |
371 | iwmmxt_task_release(task_thread_info(dead_task)); | 367 | iwmmxt_task_release(thread); |
372 | #endif | 368 | #endif |
373 | } | 369 | } |
374 | 370 | ||
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index a0cd0a90a10d..e9fe78033361 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -665,17 +665,33 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) | |||
665 | if (syscall) { | 665 | if (syscall) { |
666 | if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) { | 666 | if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) { |
667 | if (thumb_mode(regs)) { | 667 | if (thumb_mode(regs)) { |
668 | regs->ARM_r7 = __NR_restart_syscall; | 668 | regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE; |
669 | regs->ARM_pc -= 2; | 669 | regs->ARM_pc -= 2; |
670 | } else { | 670 | } else { |
671 | #if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT) | ||
672 | regs->ARM_r7 = __NR_restart_syscall; | ||
673 | regs->ARM_pc -= 4; | ||
674 | #else | ||
671 | u32 __user *usp; | 675 | u32 __user *usp; |
676 | u32 swival = __NR_restart_syscall; | ||
672 | 677 | ||
673 | regs->ARM_sp -= 12; | 678 | regs->ARM_sp -= 12; |
674 | usp = (u32 __user *)regs->ARM_sp; | 679 | usp = (u32 __user *)regs->ARM_sp; |
675 | 680 | ||
681 | /* | ||
682 | * Either we supports OABI only, or we have | ||
683 | * EABI with the OABI compat layer enabled. | ||
684 | * In the later case we don't know if user | ||
685 | * space is EABI or not, and if not we must | ||
686 | * not clobber r7. Always using the OABI | ||
687 | * syscall solves that issue and works for | ||
688 | * all those cases. | ||
689 | */ | ||
690 | swival = swival - __NR_SYSCAll_BASE + __NR_OABI_SYSCALL_BASE; | ||
691 | |||
676 | put_user(regs->ARM_pc, &usp[0]); | 692 | put_user(regs->ARM_pc, &usp[0]); |
677 | /* swi __NR_restart_syscall */ | 693 | /* swi __NR_restart_syscall */ |
678 | put_user(0xef000000 | __NR_restart_syscall, &usp[1]); | 694 | put_user(0xef000000 | swival, &usp[1]); |
679 | /* ldr pc, [sp], #12 */ | 695 | /* ldr pc, [sp], #12 */ |
680 | put_user(0xe49df00c, &usp[2]); | 696 | put_user(0xe49df00c, &usp[2]); |
681 | 697 | ||
@@ -683,6 +699,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) | |||
683 | (unsigned long)(usp + 3)); | 699 | (unsigned long)(usp + 3)); |
684 | 700 | ||
685 | regs->ARM_pc = regs->ARM_sp + 4; | 701 | regs->ARM_pc = regs->ARM_sp + 4; |
702 | #endif | ||
686 | } | 703 | } |
687 | } | 704 | } |
688 | if (regs->ARM_r0 == -ERESTARTNOHAND || | 705 | if (regs->ARM_r0 == -ERESTARTNOHAND || |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index dcd417625389..bf6bd71bdd08 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -103,7 +103,8 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
103 | write_seqlock(&xtime_lock); | 103 | write_seqlock(&xtime_lock); |
104 | 104 | ||
105 | __raw_writel(1, EP93XX_TIMER1_CLEAR); | 105 | __raw_writel(1, EP93XX_TIMER1_CLEAR); |
106 | while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time | 106 | while ((signed long) |
107 | (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) | ||
107 | >= TIMER4_TICKS_PER_JIFFY) { | 108 | >= TIMER4_TICKS_PER_JIFFY) { |
108 | last_jiffy_time += TIMER4_TICKS_PER_JIFFY; | 109 | last_jiffy_time += TIMER4_TICKS_PER_JIFFY; |
109 | timer_tick(regs); | 110 | timer_tick(regs); |
@@ -124,7 +125,7 @@ static void __init ep93xx_timer_init(void) | |||
124 | { | 125 | { |
125 | /* Enable periodic HZ timer. */ | 126 | /* Enable periodic HZ timer. */ |
126 | __raw_writel(0x48, EP93XX_TIMER1_CONTROL); | 127 | __raw_writel(0x48, EP93XX_TIMER1_CONTROL); |
127 | __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD); | 128 | __raw_writel((508469 / HZ) - 1, EP93XX_TIMER1_LOAD); |
128 | __raw_writel(0xc8, EP93XX_TIMER1_CONTROL); | 129 | __raw_writel(0xc8, EP93XX_TIMER1_CONTROL); |
129 | 130 | ||
130 | /* Enable lost jiffy timer. */ | 131 | /* Enable lost jiffy timer. */ |
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index d18fcb1a2f1b..47cc6c8b7c79 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c | |||
@@ -16,16 +16,38 @@ | |||
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/ioport.h> | ||
19 | #include <linux/mtd/physmap.h> | 20 | #include <linux/mtd/physmap.h> |
21 | #include <linux/platform_device.h> | ||
20 | #include <asm/io.h> | 22 | #include <asm/io.h> |
21 | #include <asm/hardware.h> | 23 | #include <asm/hardware.h> |
22 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
23 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
24 | 26 | ||
27 | static struct physmap_flash_data gesbc9312_flash_data = { | ||
28 | .width = 4, | ||
29 | }; | ||
30 | |||
31 | static struct resource gesbc9312_flash_resource = { | ||
32 | .start = 0x60000000, | ||
33 | .end = 0x60800000, | ||
34 | .flags = IORESOURCE_MEM, | ||
35 | }; | ||
36 | |||
37 | static struct platform_device gesbc9312_flash = { | ||
38 | .name = "physmap-flash", | ||
39 | .id = 0, | ||
40 | .dev = { | ||
41 | .platform_data = &gesbc9312_flash_data, | ||
42 | }, | ||
43 | .num_resources = 1, | ||
44 | .resource = &gesbc9312_flash_resource, | ||
45 | }; | ||
46 | |||
25 | static void __init gesbc9312_init_machine(void) | 47 | static void __init gesbc9312_init_machine(void) |
26 | { | 48 | { |
27 | ep93xx_init_devices(); | 49 | ep93xx_init_devices(); |
28 | physmap_configure(0x60000000, 0x00800000, 4, NULL); | 50 | platform_device_register(&gesbc9312_flash); |
29 | } | 51 | } |
30 | 52 | ||
31 | MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") | 53 | MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") |
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index e24566b88a78..6e5a56cd5ae8 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/ioport.h> | ||
19 | #include <linux/mtd/physmap.h> | 20 | #include <linux/mtd/physmap.h> |
20 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
21 | #include <linux/m48t86.h> | 22 | #include <linux/m48t86.h> |
@@ -111,6 +112,26 @@ static void __init ts72xx_map_io(void) | |||
111 | } | 112 | } |
112 | } | 113 | } |
113 | 114 | ||
115 | static struct physmap_flash_data ts72xx_flash_data = { | ||
116 | .width = 1, | ||
117 | }; | ||
118 | |||
119 | static struct resource ts72xx_flash_resource = { | ||
120 | .start = TS72XX_NOR_PHYS_BASE, | ||
121 | .end = TS72XX_NOR_PHYS_BASE + 0x01000000, | ||
122 | .flags = IORESOURCE_MEM, | ||
123 | }; | ||
124 | |||
125 | static struct platform_device ts72xx_flash = { | ||
126 | .name = "physmap-flash", | ||
127 | .id = 0, | ||
128 | .dev = { | ||
129 | .platform_data = &ts72xx_flash_data, | ||
130 | }, | ||
131 | .num_resources = 1, | ||
132 | .resource = &ts72xx_flash_resource, | ||
133 | }; | ||
134 | |||
114 | static unsigned char ts72xx_rtc_readbyte(unsigned long addr) | 135 | static unsigned char ts72xx_rtc_readbyte(unsigned long addr) |
115 | { | 136 | { |
116 | __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); | 137 | __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); |
@@ -141,7 +162,7 @@ static void __init ts72xx_init_machine(void) | |||
141 | { | 162 | { |
142 | ep93xx_init_devices(); | 163 | ep93xx_init_devices(); |
143 | if (board_is_ts7200()) | 164 | if (board_is_ts7200()) |
144 | physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL); | 165 | platform_device_register(&ts72xx_flash); |
145 | platform_device_register(&ts72xx_rtc_device); | 166 | platform_device_register(&ts72xx_rtc_device); |
146 | } | 167 | } |
147 | 168 | ||
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c index 4ca51dcf13ac..36578871ecc8 100644 --- a/arch/arm/mach-imx/dma.c +++ b/arch/arm/mach-imx/dma.c | |||
@@ -15,6 +15,9 @@ | |||
15 | * Changed to support scatter gather DMA | 15 | * Changed to support scatter gather DMA |
16 | * by taking Russell's code from RiscPC | 16 | * by taking Russell's code from RiscPC |
17 | * | 17 | * |
18 | * 2006-05-31 Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
19 | * Corrected error handling code. | ||
20 | * | ||
18 | */ | 21 | */ |
19 | 22 | ||
20 | #undef DEBUG | 23 | #undef DEBUG |
@@ -277,7 +280,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch, | |||
277 | int | 280 | int |
278 | imx_dma_setup_handlers(imx_dmach_t dma_ch, | 281 | imx_dma_setup_handlers(imx_dmach_t dma_ch, |
279 | void (*irq_handler) (int, void *, struct pt_regs *), | 282 | void (*irq_handler) (int, void *, struct pt_regs *), |
280 | void (*err_handler) (int, void *, struct pt_regs *), | 283 | void (*err_handler) (int, void *, struct pt_regs *, int), |
281 | void *data) | 284 | void *data) |
282 | { | 285 | { |
283 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | 286 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; |
@@ -463,43 +466,53 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs) | |||
463 | int i, disr = DISR; | 466 | int i, disr = DISR; |
464 | struct imx_dma_channel *channel; | 467 | struct imx_dma_channel *channel; |
465 | unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR; | 468 | unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR; |
469 | int errcode; | ||
466 | 470 | ||
467 | DISR = disr; | 471 | DISR = disr & err_mask; |
468 | for (i = 0; i < IMX_DMA_CHANNELS; i++) { | 472 | for (i = 0; i < IMX_DMA_CHANNELS; i++) { |
469 | channel = &imx_dma_channels[i]; | 473 | if(!(err_mask & (1 << i))) |
470 | |||
471 | if ((err_mask & 1 << i) && channel->name | ||
472 | && channel->err_handler) { | ||
473 | channel->err_handler(i, channel->data, regs); | ||
474 | continue; | 474 | continue; |
475 | } | 475 | channel = &imx_dma_channels[i]; |
476 | 476 | errcode = 0; | |
477 | imx_dma_channels[i].sg = NULL; | ||
478 | 477 | ||
479 | if (DBTOSR & (1 << i)) { | 478 | if (DBTOSR & (1 << i)) { |
480 | printk(KERN_WARNING | 479 | DBTOSR = (1 << i); |
481 | "Burst timeout on channel %d (%s)\n", | 480 | errcode |= IMX_DMA_ERR_BURST; |
482 | i, channel->name); | ||
483 | DBTOSR |= (1 << i); | ||
484 | } | 481 | } |
485 | if (DRTOSR & (1 << i)) { | 482 | if (DRTOSR & (1 << i)) { |
486 | printk(KERN_WARNING | 483 | DRTOSR = (1 << i); |
487 | "Request timeout on channel %d (%s)\n", | 484 | errcode |= IMX_DMA_ERR_REQUEST; |
488 | i, channel->name); | ||
489 | DRTOSR |= (1 << i); | ||
490 | } | 485 | } |
491 | if (DSESR & (1 << i)) { | 486 | if (DSESR & (1 << i)) { |
492 | printk(KERN_WARNING | 487 | DSESR = (1 << i); |
493 | "Transfer timeout on channel %d (%s)\n", | 488 | errcode |= IMX_DMA_ERR_TRANSFER; |
494 | i, channel->name); | ||
495 | DSESR |= (1 << i); | ||
496 | } | 489 | } |
497 | if (DBOSR & (1 << i)) { | 490 | if (DBOSR & (1 << i)) { |
498 | printk(KERN_WARNING | 491 | DBOSR = (1 << i); |
499 | "Buffer overflow timeout on channel %d (%s)\n", | 492 | errcode |= IMX_DMA_ERR_BUFFER; |
500 | i, channel->name); | ||
501 | DBOSR |= (1 << i); | ||
502 | } | 493 | } |
494 | |||
495 | /* | ||
496 | * The cleaning of @sg field would be questionable | ||
497 | * there, because its value can help to compute | ||
498 | * remaining/transfered bytes count in the handler | ||
499 | */ | ||
500 | /*imx_dma_channels[i].sg = NULL;*/ | ||
501 | |||
502 | if (channel->name && channel->err_handler) { | ||
503 | channel->err_handler(i, channel->data, regs, errcode); | ||
504 | continue; | ||
505 | } | ||
506 | |||
507 | imx_dma_channels[i].sg = NULL; | ||
508 | |||
509 | printk(KERN_WARNING | ||
510 | "DMA timeout on channel %d (%s) -%s%s%s%s\n", | ||
511 | i, channel->name, | ||
512 | errcode&IMX_DMA_ERR_BURST? " burst":"", | ||
513 | errcode&IMX_DMA_ERR_REQUEST? " request":"", | ||
514 | errcode&IMX_DMA_ERR_TRANSFER? " transfer":"", | ||
515 | errcode&IMX_DMA_ERR_BUFFER? " buffer":""); | ||
503 | } | 516 | } |
504 | return IRQ_HANDLED; | 517 | return IRQ_HANDLED; |
505 | } | 518 | } |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 6e8d504aca55..186f632035b8 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -211,7 +211,8 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
211 | /* clear timer 1 */ | 211 | /* clear timer 1 */ |
212 | ixp2000_reg_wrb(IXP2000_T1_CLR, 1); | 212 | ixp2000_reg_wrb(IXP2000_T1_CLR, 1); |
213 | 213 | ||
214 | while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) { | 214 | while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr) |
215 | >= ticks_per_jiffy) { | ||
215 | timer_tick(regs); | 216 | timer_tick(regs); |
216 | next_jiffy_time -= ticks_per_jiffy; | 217 | next_jiffy_time -= ticks_per_jiffy; |
217 | } | 218 | } |
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index affd1d5d7440..051e3d70026e 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -334,7 +334,7 @@ void __init ixp23xx_init_irq(void) | |||
334 | /************************************************************************* | 334 | /************************************************************************* |
335 | * Timer-tick functions for IXP23xx | 335 | * Timer-tick functions for IXP23xx |
336 | *************************************************************************/ | 336 | *************************************************************************/ |
337 | #define CLOCK_TICKS_PER_USEC CLOCK_TICK_RATE / (USEC_PER_SEC) | 337 | #define CLOCK_TICKS_PER_USEC (CLOCK_TICK_RATE / USEC_PER_SEC) |
338 | 338 | ||
339 | static unsigned long next_jiffy_time; | 339 | static unsigned long next_jiffy_time; |
340 | 340 | ||
@@ -353,7 +353,7 @@ ixp23xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
353 | { | 353 | { |
354 | /* Clear Pending Interrupt by writing '1' to it */ | 354 | /* Clear Pending Interrupt by writing '1' to it */ |
355 | *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; | 355 | *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; |
356 | while ((*IXP23XX_TIMER_CONT - next_jiffy_time) > LATCH) { | 356 | while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) { |
357 | timer_tick(regs); | 357 | timer_tick(regs); |
358 | next_jiffy_time += LATCH; | 358 | next_jiffy_time += LATCH; |
359 | } | 359 | } |
@@ -439,5 +439,6 @@ static struct platform_device *ixp23xx_devices[] __initdata = { | |||
439 | 439 | ||
440 | void __init ixp23xx_sys_init(void) | 440 | void __init ixp23xx_sys_init(void) |
441 | { | 441 | { |
442 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; | ||
442 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); | 443 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); |
443 | } | 444 | } |
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index bf688c128630..dc5e489c70bc 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c | |||
@@ -53,9 +53,29 @@ static int __init espresso_pci_init(void) | |||
53 | }; | 53 | }; |
54 | subsys_initcall(espresso_pci_init); | 54 | subsys_initcall(espresso_pci_init); |
55 | 55 | ||
56 | static struct physmap_flash_data espresso_flash_data = { | ||
57 | .width = 2, | ||
58 | }; | ||
59 | |||
60 | static struct resource espresso_flash_resource = { | ||
61 | .start = 0x90000000, | ||
62 | .end = 0x92000000, | ||
63 | .flags = IORESOURCE_MEM, | ||
64 | }; | ||
65 | |||
66 | static struct platform_device espresso_flash = { | ||
67 | .name = "physmap-flash", | ||
68 | .id = 0, | ||
69 | .dev = { | ||
70 | .platform_data = &espresso_flash_data, | ||
71 | }, | ||
72 | .num_resources = 1, | ||
73 | .resource = &espresso_flash_resource, | ||
74 | }; | ||
75 | |||
56 | static void __init espresso_init(void) | 76 | static void __init espresso_init(void) |
57 | { | 77 | { |
58 | physmap_configure(0x90000000, 0x02000000, 2, NULL); | 78 | platform_device_register(&espresso_flash); |
59 | 79 | ||
60 | /* | 80 | /* |
61 | * Mark flash as writeable. | 81 | * Mark flash as writeable. |
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 00146c35daac..535b334ee045 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c | |||
@@ -298,9 +298,29 @@ static void __init ixdp2351_map_io(void) | |||
298 | iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc)); | 298 | iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc)); |
299 | } | 299 | } |
300 | 300 | ||
301 | static struct physmap_flash_data ixdp2351_flash_data = { | ||
302 | .width = 1, | ||
303 | }; | ||
304 | |||
305 | static struct resource ixdp2351_flash_resource = { | ||
306 | .start = 0x90000000, | ||
307 | .end = 0x94000000, | ||
308 | .flags = IORESOURCE_MEM, | ||
309 | }; | ||
310 | |||
311 | static struct platform_device ixdp2351_flash = { | ||
312 | .name = "physmap-flash", | ||
313 | .id = 0, | ||
314 | .dev = { | ||
315 | .platform_data = &ixdp2351_flash_data, | ||
316 | }, | ||
317 | .num_resources = 1, | ||
318 | .resource = &ixdp2351_flash_resource, | ||
319 | }; | ||
320 | |||
301 | static void __init ixdp2351_init(void) | 321 | static void __init ixdp2351_init(void) |
302 | { | 322 | { |
303 | physmap_configure(0x90000000, 0x04000000, 1, NULL); | 323 | platform_device_register(&ixdp2351_flash); |
304 | 324 | ||
305 | /* | 325 | /* |
306 | * Mark flash as writeable | 326 | * Mark flash as writeable |
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 43c14e740794..b9f5d13fcfe1 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c | |||
@@ -137,9 +137,29 @@ static int __init roadrunner_pci_init(void) | |||
137 | 137 | ||
138 | subsys_initcall(roadrunner_pci_init); | 138 | subsys_initcall(roadrunner_pci_init); |
139 | 139 | ||
140 | static struct physmap_flash_data roadrunner_flash_data = { | ||
141 | .width = 2, | ||
142 | }; | ||
143 | |||
144 | static struct resource roadrunner_flash_resource = { | ||
145 | .start = 0x90000000, | ||
146 | .end = 0x94000000, | ||
147 | .flags = IORESOURCE_MEM, | ||
148 | }; | ||
149 | |||
150 | static struct platform_device roadrunner_flash = { | ||
151 | .name = "physmap-flash", | ||
152 | .id = 0, | ||
153 | .dev = { | ||
154 | .platform_data = &roadrunner_flash_data, | ||
155 | }, | ||
156 | .num_resources = 1, | ||
157 | .resource = &roadrunner_flash_resource, | ||
158 | }; | ||
159 | |||
140 | static void __init roadrunner_init(void) | 160 | static void __init roadrunner_init(void) |
141 | { | 161 | { |
142 | physmap_configure(0x90000000, 0x04000000, 2, NULL); | 162 | platform_device_register(&roadrunner_flash); |
143 | 163 | ||
144 | /* | 164 | /* |
145 | * Mark flash as writeable | 165 | * Mark flash as writeable |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 00b761ff0f9c..bf25a76e9bdf 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -276,7 +276,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs | |||
276 | /* | 276 | /* |
277 | * Catch up with the real idea of time | 277 | * Catch up with the real idea of time |
278 | */ | 278 | */ |
279 | while ((*IXP4XX_OSTS - last_jiffy_time) > LATCH) { | 279 | while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) { |
280 | timer_tick(regs); | 280 | timer_tick(regs); |
281 | last_jiffy_time += LATCH; | 281 | last_jiffy_time += LATCH; |
282 | } | 282 | } |
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index a3b4c6ac5708..9a31444d9214 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/serial.h> | 16 | #include <linux/serial.h> |
17 | #include <linux/serial_8250.h> | 17 | #include <linux/serial_8250.h> |
18 | #include <linux/leds.h> | ||
18 | 19 | ||
19 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
20 | #include <asm/mach/arch.h> | 21 | #include <asm/mach/arch.h> |
@@ -37,6 +38,36 @@ static struct platform_device nas100d_flash = { | |||
37 | .resource = &nas100d_flash_resource, | 38 | .resource = &nas100d_flash_resource, |
38 | }; | 39 | }; |
39 | 40 | ||
41 | #ifdef CONFIG_LEDS_IXP4XX | ||
42 | static struct resource nas100d_led_resources[] = { | ||
43 | { | ||
44 | .name = "wlan", /* green led */ | ||
45 | .start = 0, | ||
46 | .end = 0, | ||
47 | .flags = IXP4XX_GPIO_LOW, | ||
48 | }, | ||
49 | { | ||
50 | .name = "ready", /* blue power led (off is flashing!) */ | ||
51 | .start = 15, | ||
52 | .end = 15, | ||
53 | .flags = IXP4XX_GPIO_LOW, | ||
54 | }, | ||
55 | { | ||
56 | .name = "disk", /* yellow led */ | ||
57 | .start = 3, | ||
58 | .end = 3, | ||
59 | .flags = IXP4XX_GPIO_LOW, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | static struct platform_device nas100d_leds = { | ||
64 | .name = "IXP4XX-GPIO-LED", | ||
65 | .id = -1, | ||
66 | .num_resources = ARRAY_SIZE(nas100d_led_resources), | ||
67 | .resource = nas100d_led_resources, | ||
68 | }; | ||
69 | #endif | ||
70 | |||
40 | static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = { | 71 | static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = { |
41 | .sda_pin = NAS100D_SDA_PIN, | 72 | .sda_pin = NAS100D_SDA_PIN, |
42 | .scl_pin = NAS100D_SCL_PIN, | 73 | .scl_pin = NAS100D_SCL_PIN, |
@@ -95,7 +126,9 @@ static struct platform_device nas100d_uart = { | |||
95 | static struct platform_device *nas100d_devices[] __initdata = { | 126 | static struct platform_device *nas100d_devices[] __initdata = { |
96 | &nas100d_i2c_controller, | 127 | &nas100d_i2c_controller, |
97 | &nas100d_flash, | 128 | &nas100d_flash, |
98 | &nas100d_uart, | 129 | #ifdef CONFIG_LEDS_IXP4XX |
130 | &nas100d_leds, | ||
131 | #endif | ||
99 | }; | 132 | }; |
100 | 133 | ||
101 | static void nas100d_power_off(void) | 134 | static void nas100d_power_off(void) |
@@ -122,6 +155,12 @@ static void __init nas100d_init(void) | |||
122 | 155 | ||
123 | pm_power_off = nas100d_power_off; | 156 | pm_power_off = nas100d_power_off; |
124 | 157 | ||
158 | /* This is only useful on a modified machine, but it is valuable | ||
159 | * to have it first in order to see debug messages, and so that | ||
160 | * it does *not* get removed if platform_add_devices fails! | ||
161 | */ | ||
162 | (void)platform_device_register(&nas100d_uart); | ||
163 | |||
125 | platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices)); | 164 | platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices)); |
126 | } | 165 | } |
127 | 166 | ||
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index 55411f21d838..749a337494d3 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c | |||
@@ -7,6 +7,7 @@ | |||
7 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | 7 | * Copyright (C) 2003-2004 MontaVista Software, Inc. |
8 | * | 8 | * |
9 | * Author: Mark Rakes <mrakes at mac.com> | 9 | * Author: Mark Rakes <mrakes at mac.com> |
10 | * Author: Rod Whitby <rod@whitby.id.au> | ||
10 | * Maintainers: http://www.nslu2-linux.org/ | 11 | * Maintainers: http://www.nslu2-linux.org/ |
11 | * | 12 | * |
12 | * Fixed missing init_time in MACHINE_START kas11 10/22/04 | 13 | * Fixed missing init_time in MACHINE_START kas11 10/22/04 |
@@ -16,6 +17,7 @@ | |||
16 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
17 | #include <linux/serial.h> | 18 | #include <linux/serial.h> |
18 | #include <linux/serial_8250.h> | 19 | #include <linux/serial_8250.h> |
20 | #include <linux/leds.h> | ||
19 | 21 | ||
20 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
21 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
@@ -43,6 +45,42 @@ static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = { | |||
43 | .scl_pin = NSLU2_SCL_PIN, | 45 | .scl_pin = NSLU2_SCL_PIN, |
44 | }; | 46 | }; |
45 | 47 | ||
48 | #ifdef CONFIG_LEDS_IXP4XX | ||
49 | static struct resource nslu2_led_resources[] = { | ||
50 | { | ||
51 | .name = "ready", /* green led */ | ||
52 | .start = NSLU2_LED_GRN, | ||
53 | .end = NSLU2_LED_GRN, | ||
54 | .flags = IXP4XX_GPIO_HIGH, | ||
55 | }, | ||
56 | { | ||
57 | .name = "status", /* red led */ | ||
58 | .start = NSLU2_LED_RED, | ||
59 | .end = NSLU2_LED_RED, | ||
60 | .flags = IXP4XX_GPIO_HIGH, | ||
61 | }, | ||
62 | { | ||
63 | .name = "disk-1", | ||
64 | .start = NSLU2_LED_DISK1, | ||
65 | .end = NSLU2_LED_DISK1, | ||
66 | .flags = IXP4XX_GPIO_LOW, | ||
67 | }, | ||
68 | { | ||
69 | .name = "disk-2", | ||
70 | .start = NSLU2_LED_DISK2, | ||
71 | .end = NSLU2_LED_DISK2, | ||
72 | .flags = IXP4XX_GPIO_LOW, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | static struct platform_device nslu2_leds = { | ||
77 | .name = "IXP4XX-GPIO-LED", | ||
78 | .id = -1, | ||
79 | .num_resources = ARRAY_SIZE(nslu2_led_resources), | ||
80 | .resource = nslu2_led_resources, | ||
81 | }; | ||
82 | #endif | ||
83 | |||
46 | static struct platform_device nslu2_i2c_controller = { | 84 | static struct platform_device nslu2_i2c_controller = { |
47 | .name = "IXP4XX-I2C", | 85 | .name = "IXP4XX-I2C", |
48 | .id = 0, | 86 | .id = 0, |
@@ -102,8 +140,10 @@ static struct platform_device nslu2_uart = { | |||
102 | static struct platform_device *nslu2_devices[] __initdata = { | 140 | static struct platform_device *nslu2_devices[] __initdata = { |
103 | &nslu2_i2c_controller, | 141 | &nslu2_i2c_controller, |
104 | &nslu2_flash, | 142 | &nslu2_flash, |
105 | &nslu2_uart, | ||
106 | &nslu2_beeper, | 143 | &nslu2_beeper, |
144 | #ifdef CONFIG_LEDS_IXP4XX | ||
145 | &nslu2_leds, | ||
146 | #endif | ||
107 | }; | 147 | }; |
108 | 148 | ||
109 | static void nslu2_power_off(void) | 149 | static void nslu2_power_off(void) |
@@ -127,6 +167,12 @@ static void __init nslu2_init(void) | |||
127 | 167 | ||
128 | pm_power_off = nslu2_power_off; | 168 | pm_power_off = nslu2_power_off; |
129 | 169 | ||
170 | /* This is only useful on a modified machine, but it is valuable | ||
171 | * to have it first in order to see debug messages, and so that | ||
172 | * it does *not* get removed if platform_add_devices fails! | ||
173 | */ | ||
174 | (void)platform_device_register(&nslu2_uart); | ||
175 | |||
130 | platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices)); | 176 | platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices)); |
131 | } | 177 | } |
132 | 178 | ||
diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c index 285b22f631e9..f582ed2ec43c 100644 --- a/arch/arm/mach-pnx4008/clock.c +++ b/arch/arm/mach-pnx4008/clock.c | |||
@@ -767,6 +767,54 @@ static struct clk *onchip_clks[] = { | |||
767 | &uart6_ck, | 767 | &uart6_ck, |
768 | }; | 768 | }; |
769 | 769 | ||
770 | static int local_clk_enable(struct clk *clk) | ||
771 | { | ||
772 | int ret = 0; | ||
773 | |||
774 | if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate | ||
775 | && clk->user_rate) | ||
776 | ret = clk->set_rate(clk, clk->user_rate); | ||
777 | return ret; | ||
778 | } | ||
779 | |||
780 | static void local_clk_disable(struct clk *clk) | ||
781 | { | ||
782 | if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate) | ||
783 | clk->set_rate(clk, 0); | ||
784 | } | ||
785 | |||
786 | static void local_clk_unuse(struct clk *clk) | ||
787 | { | ||
788 | if (clk->usecount > 0 && !(--clk->usecount)) { | ||
789 | local_clk_disable(clk); | ||
790 | if (clk->parent) | ||
791 | local_clk_unuse(clk->parent); | ||
792 | } | ||
793 | } | ||
794 | |||
795 | static int local_clk_use(struct clk *clk) | ||
796 | { | ||
797 | int ret = 0; | ||
798 | if (clk->usecount++ == 0) { | ||
799 | if (clk->parent) | ||
800 | ret = local_clk_use(clk->parent); | ||
801 | |||
802 | if (ret != 0) { | ||
803 | clk->usecount--; | ||
804 | goto out; | ||
805 | } | ||
806 | |||
807 | ret = local_clk_enable(clk); | ||
808 | |||
809 | if (ret != 0 && clk->parent) { | ||
810 | local_clk_unuse(clk->parent); | ||
811 | clk->usecount--; | ||
812 | } | ||
813 | } | ||
814 | out: | ||
815 | return ret; | ||
816 | } | ||
817 | |||
770 | static int local_set_rate(struct clk *clk, u32 rate) | 818 | static int local_set_rate(struct clk *clk, u32 rate) |
771 | { | 819 | { |
772 | int ret = -EINVAL; | 820 | int ret = -EINVAL; |
@@ -847,28 +895,12 @@ unsigned long clk_get_rate(struct clk *clk) | |||
847 | } | 895 | } |
848 | EXPORT_SYMBOL(clk_get_rate); | 896 | EXPORT_SYMBOL(clk_get_rate); |
849 | 897 | ||
850 | static int local_clk_enable(struct clk *clk) | ||
851 | { | ||
852 | int ret = 0; | ||
853 | |||
854 | if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate | ||
855 | && clk->user_rate) | ||
856 | ret = clk->set_rate(clk, clk->user_rate); | ||
857 | return ret; | ||
858 | } | ||
859 | |||
860 | static void local_clk_disable(struct clk *clk) | ||
861 | { | ||
862 | if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate) | ||
863 | clk->set_rate(clk, 0); | ||
864 | } | ||
865 | |||
866 | int clk_enable(struct clk *clk) | 898 | int clk_enable(struct clk *clk) |
867 | { | 899 | { |
868 | int ret = 0; | 900 | int ret = 0; |
869 | 901 | ||
870 | clock_lock(); | 902 | clock_lock(); |
871 | ret = local_clk_enable(clk); | 903 | ret = local_clk_use(clk); |
872 | clock_unlock(); | 904 | clock_unlock(); |
873 | return ret; | 905 | return ret; |
874 | } | 906 | } |
@@ -878,70 +910,11 @@ EXPORT_SYMBOL(clk_enable); | |||
878 | void clk_disable(struct clk *clk) | 910 | void clk_disable(struct clk *clk) |
879 | { | 911 | { |
880 | clock_lock(); | 912 | clock_lock(); |
881 | local_clk_disable(clk); | ||
882 | clock_unlock(); | ||
883 | } | ||
884 | |||
885 | EXPORT_SYMBOL(clk_disable); | ||
886 | |||
887 | static void local_clk_unuse(struct clk *clk) | ||
888 | { | ||
889 | if (clk->usecount > 0 && !(--clk->usecount)) { | ||
890 | local_clk_disable(clk); | ||
891 | if (clk->parent) | ||
892 | local_clk_unuse(clk->parent); | ||
893 | } | ||
894 | } | ||
895 | |||
896 | static int local_clk_use(struct clk *clk) | ||
897 | { | ||
898 | int ret = 0; | ||
899 | if (clk->usecount++ == 0) { | ||
900 | if (clk->parent) | ||
901 | ret = local_clk_use(clk->parent); | ||
902 | |||
903 | if (ret != 0) { | ||
904 | clk->usecount--; | ||
905 | goto out; | ||
906 | } | ||
907 | |||
908 | ret = local_clk_enable(clk); | ||
909 | |||
910 | if (ret != 0 && clk->parent) { | ||
911 | local_clk_unuse(clk->parent); | ||
912 | clk->usecount--; | ||
913 | } | ||
914 | } | ||
915 | out: | ||
916 | return ret; | ||
917 | } | ||
918 | |||
919 | /* The main purpose of clk_use ans clk_unuse functions | ||
920 | * is to control switching 13MHz oscillator and PLL1 (13'MHz), | ||
921 | * so that they are disabled whenever none of PLL2-5 is using them. | ||
922 | * Although in theory these functions should work with any clock, | ||
923 | * please use them only on PLL2 - PLL5 to avoid confusion. | ||
924 | */ | ||
925 | int clk_use(struct clk *clk) | ||
926 | { | ||
927 | int ret = 0; | ||
928 | |||
929 | clock_lock(); | ||
930 | ret = local_clk_use(clk); | ||
931 | clock_unlock(); | ||
932 | return ret; | ||
933 | } | ||
934 | EXPORT_SYMBOL(clk_use); | ||
935 | |||
936 | void clk_unuse(struct clk *clk) | ||
937 | { | ||
938 | |||
939 | clock_lock(); | ||
940 | local_clk_unuse(clk); | 913 | local_clk_unuse(clk); |
941 | clock_unlock(); | 914 | clock_unlock(); |
942 | } | 915 | } |
943 | 916 | ||
944 | EXPORT_SYMBOL(clk_unuse); | 917 | EXPORT_SYMBOL(clk_disable); |
945 | 918 | ||
946 | long clk_round_rate(struct clk *clk, unsigned long rate) | 919 | long clk_round_rate(struct clk *clk, unsigned long rate) |
947 | { | 920 | { |
@@ -995,7 +968,7 @@ static int __init clk_init(void) | |||
995 | __FUNCTION__, (*clkp)->name, (*clkp)->rate); | 968 | __FUNCTION__, (*clkp)->name, (*clkp)->rate); |
996 | } | 969 | } |
997 | 970 | ||
998 | clk_use(&ck_pll4); | 971 | local_clk_use(&ck_pll4); |
999 | 972 | ||
1000 | /* if ck_13MHz is not used, disable it. */ | 973 | /* if ck_13MHz is not used, disable it. */ |
1001 | if (ck_13MHz.usecount == 0) | 974 | if (ck_13MHz.usecount == 0) |
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c index 10322384e45d..95a1b3f964a2 100644 --- a/arch/arm/mach-pnx4008/serial.c +++ b/arch/arm/mach-pnx4008/serial.c | |||
@@ -20,7 +20,7 @@ | |||
20 | 20 | ||
21 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
22 | #include <linux/serial_reg.h> | 22 | #include <linux/serial_reg.h> |
23 | #include <asm/arch/pm.h> | 23 | #include <asm/arch/gpio.h> |
24 | 24 | ||
25 | #include <asm/arch/clock.h> | 25 | #include <asm/arch/clock.h> |
26 | 26 | ||
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 0c334136db7c..7b786d725636 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
@@ -114,9 +114,15 @@ config MACH_NEXCODER_2440 | |||
114 | 114 | ||
115 | endmenu | 115 | endmenu |
116 | 116 | ||
117 | config S3C2410_CLOCK | ||
118 | bool | ||
119 | help | ||
120 | Clock code for the S3C2410, and similar processors | ||
121 | |||
117 | config CPU_S3C2410 | 122 | config CPU_S3C2410 |
118 | bool | 123 | bool |
119 | depends on ARCH_S3C2410 | 124 | depends on ARCH_S3C2410 |
125 | select S3C2410_CLOCK | ||
120 | help | 126 | help |
121 | Support for S3C2410 and S3C2410A family from the S3C24XX line | 127 | Support for S3C2410 and S3C2410A family from the S3C24XX line |
122 | of Samsung Mobile CPUs. | 128 | of Samsung Mobile CPUs. |
@@ -130,6 +136,7 @@ config CPU_S3C244X | |||
130 | config CPU_S3C2440 | 136 | config CPU_S3C2440 |
131 | bool | 137 | bool |
132 | depends on ARCH_S3C2410 | 138 | depends on ARCH_S3C2410 |
139 | select S3C2410_CLOCK | ||
133 | select CPU_S3C244X | 140 | select CPU_S3C244X |
134 | help | 141 | help |
135 | Support for S3C2440 Samsung Mobile CPU based systems. | 142 | Support for S3C2440 Samsung Mobile CPU based systems. |
@@ -137,6 +144,7 @@ config CPU_S3C2440 | |||
137 | config CPU_S3C2442 | 144 | config CPU_S3C2442 |
138 | bool | 145 | bool |
139 | depends on ARCH_S3C2420 | 146 | depends on ARCH_S3C2420 |
147 | select S3C2410_CLOCK | ||
140 | select CPU_S3C244X | 148 | select CPU_S3C244X |
141 | help | 149 | help |
142 | Support for S3C2442 Samsung Mobile CPU based systems. | 150 | Support for S3C2442 Samsung Mobile CPU based systems. |
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 5e09355cd4f4..372dbcea1434 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -29,6 +29,10 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | |||
29 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o | 29 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o |
30 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o | 30 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o |
31 | 31 | ||
32 | # Clock control | ||
33 | |||
34 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o | ||
35 | |||
32 | # S3C2440 support | 36 | # S3C2440 support |
33 | 37 | ||
34 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o | 38 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o |
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 99d174612b53..c5c93c333ac6 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright (c) 2004-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | 5 | * |
6 | * S3C2410 Clock control support | 6 | * S3C24XX Core clock control support |
7 | * | 7 | * |
8 | * Based on, and code from linux/arch/arm/mach-versatile/clock.c | 8 | * Based on, and code from linux/arch/arm/mach-versatile/clock.c |
9 | ** | 9 | ** |
@@ -56,25 +56,6 @@ static LIST_HEAD(clocks); | |||
56 | 56 | ||
57 | DEFINE_MUTEX(clocks_mutex); | 57 | DEFINE_MUTEX(clocks_mutex); |
58 | 58 | ||
59 | /* old functions */ | ||
60 | |||
61 | void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable) | ||
62 | { | ||
63 | unsigned long clkcon; | ||
64 | |||
65 | clkcon = __raw_readl(S3C2410_CLKCON); | ||
66 | |||
67 | if (enable) | ||
68 | clkcon |= clocks; | ||
69 | else | ||
70 | clkcon &= ~clocks; | ||
71 | |||
72 | /* ensure none of the special function bits set */ | ||
73 | clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER | 3); | ||
74 | |||
75 | __raw_writel(clkcon, S3C2410_CLKCON); | ||
76 | } | ||
77 | |||
78 | /* enable and disable calls for use with the clk struct */ | 59 | /* enable and disable calls for use with the clk struct */ |
79 | 60 | ||
80 | static int clk_null_enable(struct clk *clk, int enable) | 61 | static int clk_null_enable(struct clk *clk, int enable) |
@@ -82,12 +63,6 @@ static int clk_null_enable(struct clk *clk, int enable) | |||
82 | return 0; | 63 | return 0; |
83 | } | 64 | } |
84 | 65 | ||
85 | int s3c24xx_clkcon_enable(struct clk *clk, int enable) | ||
86 | { | ||
87 | s3c24xx_clk_enable(clk->ctrlbit, enable); | ||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | /* Clock API calls */ | 66 | /* Clock API calls */ |
92 | 67 | ||
93 | struct clk *clk_get(struct device *dev, const char *id) | 68 | struct clk *clk_get(struct device *dev, const char *id) |
@@ -173,8 +148,11 @@ unsigned long clk_get_rate(struct clk *clk) | |||
173 | if (clk->rate != 0) | 148 | if (clk->rate != 0) |
174 | return clk->rate; | 149 | return clk->rate; |
175 | 150 | ||
176 | while (clk->parent != NULL && clk->rate == 0) | 151 | if (clk->get_rate != NULL) |
177 | clk = clk->parent; | 152 | return (clk->get_rate)(clk); |
153 | |||
154 | if (clk->parent != NULL) | ||
155 | return clk_get_rate(clk->parent); | ||
178 | 156 | ||
179 | return clk->rate; | 157 | return clk->rate; |
180 | } | 158 | } |
@@ -233,28 +211,6 @@ EXPORT_SYMBOL(clk_set_rate); | |||
233 | EXPORT_SYMBOL(clk_get_parent); | 211 | EXPORT_SYMBOL(clk_get_parent); |
234 | EXPORT_SYMBOL(clk_set_parent); | 212 | EXPORT_SYMBOL(clk_set_parent); |
235 | 213 | ||
236 | /* base clock enable */ | ||
237 | |||
238 | static int s3c24xx_upll_enable(struct clk *clk, int enable) | ||
239 | { | ||
240 | unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); | ||
241 | unsigned long orig = clkslow; | ||
242 | |||
243 | if (enable) | ||
244 | clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF; | ||
245 | else | ||
246 | clkslow |= S3C2410_CLKSLOW_UCLK_OFF; | ||
247 | |||
248 | __raw_writel(clkslow, S3C2410_CLKSLOW); | ||
249 | |||
250 | /* if we started the UPLL, then allow to settle */ | ||
251 | |||
252 | if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF)) | ||
253 | udelay(200); | ||
254 | |||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | /* base clocks */ | 214 | /* base clocks */ |
259 | 215 | ||
260 | static struct clk clk_xtal = { | 216 | static struct clk clk_xtal = { |
@@ -265,15 +221,14 @@ static struct clk clk_xtal = { | |||
265 | .ctrlbit = 0, | 221 | .ctrlbit = 0, |
266 | }; | 222 | }; |
267 | 223 | ||
268 | static struct clk clk_upll = { | 224 | struct clk clk_upll = { |
269 | .name = "upll", | 225 | .name = "upll", |
270 | .id = -1, | 226 | .id = -1, |
271 | .parent = NULL, | 227 | .parent = NULL, |
272 | .enable = s3c24xx_upll_enable, | ||
273 | .ctrlbit = 0, | 228 | .ctrlbit = 0, |
274 | }; | 229 | }; |
275 | 230 | ||
276 | static struct clk clk_f = { | 231 | struct clk clk_f = { |
277 | .name = "fclk", | 232 | .name = "fclk", |
278 | .id = -1, | 233 | .id = -1, |
279 | .rate = 0, | 234 | .rate = 0, |
@@ -281,7 +236,7 @@ static struct clk clk_f = { | |||
281 | .ctrlbit = 0, | 236 | .ctrlbit = 0, |
282 | }; | 237 | }; |
283 | 238 | ||
284 | static struct clk clk_h = { | 239 | struct clk clk_h = { |
285 | .name = "hclk", | 240 | .name = "hclk", |
286 | .id = -1, | 241 | .id = -1, |
287 | .rate = 0, | 242 | .rate = 0, |
@@ -289,7 +244,7 @@ static struct clk clk_h = { | |||
289 | .ctrlbit = 0, | 244 | .ctrlbit = 0, |
290 | }; | 245 | }; |
291 | 246 | ||
292 | static struct clk clk_p = { | 247 | struct clk clk_p = { |
293 | .name = "pclk", | 248 | .name = "pclk", |
294 | .id = -1, | 249 | .id = -1, |
295 | .rate = 0, | 250 | .rate = 0, |
@@ -426,108 +381,6 @@ struct clk s3c24xx_uclk = { | |||
426 | .id = -1, | 381 | .id = -1, |
427 | }; | 382 | }; |
428 | 383 | ||
429 | |||
430 | /* standard clock definitions */ | ||
431 | |||
432 | static struct clk init_clocks[] = { | ||
433 | { | ||
434 | .name = "nand", | ||
435 | .id = -1, | ||
436 | .parent = &clk_h, | ||
437 | .enable = s3c24xx_clkcon_enable, | ||
438 | .ctrlbit = S3C2410_CLKCON_NAND, | ||
439 | }, { | ||
440 | .name = "lcd", | ||
441 | .id = -1, | ||
442 | .parent = &clk_h, | ||
443 | .enable = s3c24xx_clkcon_enable, | ||
444 | .ctrlbit = S3C2410_CLKCON_LCDC, | ||
445 | }, { | ||
446 | .name = "usb-host", | ||
447 | .id = -1, | ||
448 | .parent = &clk_h, | ||
449 | .enable = s3c24xx_clkcon_enable, | ||
450 | .ctrlbit = S3C2410_CLKCON_USBH, | ||
451 | }, { | ||
452 | .name = "usb-device", | ||
453 | .id = -1, | ||
454 | .parent = &clk_h, | ||
455 | .enable = s3c24xx_clkcon_enable, | ||
456 | .ctrlbit = S3C2410_CLKCON_USBD, | ||
457 | }, { | ||
458 | .name = "timers", | ||
459 | .id = -1, | ||
460 | .parent = &clk_p, | ||
461 | .enable = s3c24xx_clkcon_enable, | ||
462 | .ctrlbit = S3C2410_CLKCON_PWMT, | ||
463 | }, { | ||
464 | .name = "sdi", | ||
465 | .id = -1, | ||
466 | .parent = &clk_p, | ||
467 | .enable = s3c24xx_clkcon_enable, | ||
468 | .ctrlbit = S3C2410_CLKCON_SDI, | ||
469 | }, { | ||
470 | .name = "uart", | ||
471 | .id = 0, | ||
472 | .parent = &clk_p, | ||
473 | .enable = s3c24xx_clkcon_enable, | ||
474 | .ctrlbit = S3C2410_CLKCON_UART0, | ||
475 | }, { | ||
476 | .name = "uart", | ||
477 | .id = 1, | ||
478 | .parent = &clk_p, | ||
479 | .enable = s3c24xx_clkcon_enable, | ||
480 | .ctrlbit = S3C2410_CLKCON_UART1, | ||
481 | }, { | ||
482 | .name = "uart", | ||
483 | .id = 2, | ||
484 | .parent = &clk_p, | ||
485 | .enable = s3c24xx_clkcon_enable, | ||
486 | .ctrlbit = S3C2410_CLKCON_UART2, | ||
487 | }, { | ||
488 | .name = "gpio", | ||
489 | .id = -1, | ||
490 | .parent = &clk_p, | ||
491 | .enable = s3c24xx_clkcon_enable, | ||
492 | .ctrlbit = S3C2410_CLKCON_GPIO, | ||
493 | }, { | ||
494 | .name = "rtc", | ||
495 | .id = -1, | ||
496 | .parent = &clk_p, | ||
497 | .enable = s3c24xx_clkcon_enable, | ||
498 | .ctrlbit = S3C2410_CLKCON_RTC, | ||
499 | }, { | ||
500 | .name = "adc", | ||
501 | .id = -1, | ||
502 | .parent = &clk_p, | ||
503 | .enable = s3c24xx_clkcon_enable, | ||
504 | .ctrlbit = S3C2410_CLKCON_ADC, | ||
505 | }, { | ||
506 | .name = "i2c", | ||
507 | .id = -1, | ||
508 | .parent = &clk_p, | ||
509 | .enable = s3c24xx_clkcon_enable, | ||
510 | .ctrlbit = S3C2410_CLKCON_IIC, | ||
511 | }, { | ||
512 | .name = "iis", | ||
513 | .id = -1, | ||
514 | .parent = &clk_p, | ||
515 | .enable = s3c24xx_clkcon_enable, | ||
516 | .ctrlbit = S3C2410_CLKCON_IIS, | ||
517 | }, { | ||
518 | .name = "spi", | ||
519 | .id = -1, | ||
520 | .parent = &clk_p, | ||
521 | .enable = s3c24xx_clkcon_enable, | ||
522 | .ctrlbit = S3C2410_CLKCON_SPI, | ||
523 | }, { | ||
524 | .name = "watchdog", | ||
525 | .id = -1, | ||
526 | .parent = &clk_p, | ||
527 | .ctrlbit = 0, | ||
528 | } | ||
529 | }; | ||
530 | |||
531 | /* initialise the clock system */ | 384 | /* initialise the clock system */ |
532 | 385 | ||
533 | int s3c24xx_register_clock(struct clk *clk) | 386 | int s3c24xx_register_clock(struct clk *clk) |
@@ -537,14 +390,6 @@ int s3c24xx_register_clock(struct clk *clk) | |||
537 | if (clk->enable == NULL) | 390 | if (clk->enable == NULL) |
538 | clk->enable = clk_null_enable; | 391 | clk->enable = clk_null_enable; |
539 | 392 | ||
540 | /* if this is a standard clock, set the usage state */ | ||
541 | |||
542 | if (clk->ctrlbit && clk->enable == s3c24xx_clkcon_enable) { | ||
543 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); | ||
544 | |||
545 | clk->usage = (clkcon & clk->ctrlbit) ? 1 : 0; | ||
546 | } | ||
547 | |||
548 | /* add to the list of available clocks */ | 393 | /* add to the list of available clocks */ |
549 | 394 | ||
550 | mutex_lock(&clocks_mutex); | 395 | mutex_lock(&clocks_mutex); |
@@ -561,44 +406,17 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
561 | unsigned long hclk, | 406 | unsigned long hclk, |
562 | unsigned long pclk) | 407 | unsigned long pclk) |
563 | { | 408 | { |
564 | unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); | 409 | printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); |
565 | unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); | ||
566 | struct clk *clkp = init_clocks; | ||
567 | int ptr; | ||
568 | int ret; | ||
569 | |||
570 | printk(KERN_INFO "S3C2410 Clocks, (c) 2004 Simtec Electronics\n"); | ||
571 | 410 | ||
572 | /* initialise the main system clocks */ | 411 | /* initialise the main system clocks */ |
573 | 412 | ||
574 | clk_xtal.rate = xtal; | 413 | clk_xtal.rate = xtal; |
575 | clk_upll.rate = s3c2410_get_pll(upllcon, xtal); | 414 | clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal); |
576 | 415 | ||
577 | clk_h.rate = hclk; | 416 | clk_h.rate = hclk; |
578 | clk_p.rate = pclk; | 417 | clk_p.rate = pclk; |
579 | clk_f.rate = fclk; | 418 | clk_f.rate = fclk; |
580 | 419 | ||
581 | /* We must be careful disabling the clocks we are not intending to | ||
582 | * be using at boot time, as subsytems such as the LCD which do | ||
583 | * their own DMA requests to the bus can cause the system to lockup | ||
584 | * if they where in the middle of requesting bus access. | ||
585 | * | ||
586 | * Disabling the LCD clock if the LCD is active is very dangerous, | ||
587 | * and therefore the bootloader should be careful to not enable | ||
588 | * the LCD clock if it is not needed. | ||
589 | */ | ||
590 | |||
591 | mutex_lock(&clocks_mutex); | ||
592 | |||
593 | s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0); | ||
594 | s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0); | ||
595 | s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0); | ||
596 | s3c24xx_clk_enable(S3C2410_CLKCON_ADC, 0); | ||
597 | s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0); | ||
598 | s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0); | ||
599 | |||
600 | mutex_unlock(&clocks_mutex); | ||
601 | |||
602 | /* assume uart clocks are correctly setup */ | 420 | /* assume uart clocks are correctly setup */ |
603 | 421 | ||
604 | /* register our clocks */ | 422 | /* register our clocks */ |
@@ -618,27 +436,5 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
618 | if (s3c24xx_register_clock(&clk_p) < 0) | 436 | if (s3c24xx_register_clock(&clk_p) < 0) |
619 | printk(KERN_ERR "failed to register cpu pclk\n"); | 437 | printk(KERN_ERR "failed to register cpu pclk\n"); |
620 | 438 | ||
621 | |||
622 | if (s3c24xx_register_clock(&clk_usb_bus) < 0) | ||
623 | printk(KERN_ERR "failed to register usb bus clock\n"); | ||
624 | |||
625 | /* register clocks from clock array */ | ||
626 | |||
627 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { | ||
628 | ret = s3c24xx_register_clock(clkp); | ||
629 | if (ret < 0) { | ||
630 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
631 | clkp->name, ret); | ||
632 | } | ||
633 | } | ||
634 | |||
635 | /* show the clock-slow value */ | ||
636 | |||
637 | printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", | ||
638 | print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), | ||
639 | (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", | ||
640 | (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", | ||
641 | (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); | ||
642 | |||
643 | return 0; | 439 | return 0; |
644 | } | 440 | } |
diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h index 01bb458bf8eb..9456c81eb5d3 100644 --- a/arch/arm/mach-s3c2410/clock.h +++ b/arch/arm/mach-s3c2410/clock.h | |||
@@ -22,6 +22,7 @@ struct clk { | |||
22 | 22 | ||
23 | int (*enable)(struct clk *, int enable); | 23 | int (*enable)(struct clk *, int enable); |
24 | int (*set_rate)(struct clk *c, unsigned long rate); | 24 | int (*set_rate)(struct clk *c, unsigned long rate); |
25 | unsigned long (*get_rate)(struct clk *c); | ||
25 | unsigned long (*round_rate)(struct clk *c, unsigned long rate); | 26 | unsigned long (*round_rate)(struct clk *c, unsigned long rate); |
26 | int (*set_parent)(struct clk *c, struct clk *parent); | 27 | int (*set_parent)(struct clk *c, struct clk *parent); |
27 | }; | 28 | }; |
@@ -36,6 +37,13 @@ extern struct clk s3c24xx_uclk; | |||
36 | 37 | ||
37 | extern struct clk clk_usb_bus; | 38 | extern struct clk clk_usb_bus; |
38 | 39 | ||
40 | /* core clock support */ | ||
41 | |||
42 | extern struct clk clk_f; | ||
43 | extern struct clk clk_h; | ||
44 | extern struct clk clk_p; | ||
45 | extern struct clk clk_upll; | ||
46 | |||
39 | /* exports for arch/arm/mach-s3c2410 | 47 | /* exports for arch/arm/mach-s3c2410 |
40 | * | 48 | * |
41 | * Please DO NOT use these outside of arch/arm/mach-s3c2410 | 49 | * Please DO NOT use these outside of arch/arm/mach-s3c2410 |
@@ -43,7 +51,8 @@ extern struct clk clk_usb_bus; | |||
43 | 51 | ||
44 | extern struct mutex clocks_mutex; | 52 | extern struct mutex clocks_mutex; |
45 | 53 | ||
46 | extern int s3c24xx_clkcon_enable(struct clk *clk, int enable); | 54 | extern int s3c2410_clkcon_enable(struct clk *clk, int enable); |
55 | |||
47 | extern int s3c24xx_register_clock(struct clk *clk); | 56 | extern int s3c24xx_register_clock(struct clk *clk); |
48 | 57 | ||
49 | extern int s3c24xx_setup_clocks(unsigned long xtal, | 58 | extern int s3c24xx_setup_clocks(unsigned long xtal, |
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index 40862899b2f1..21c62dc29bb2 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h | |||
@@ -73,5 +73,6 @@ extern struct sys_timer s3c24xx_timer; | |||
73 | 73 | ||
74 | /* system device classes */ | 74 | /* system device classes */ |
75 | 75 | ||
76 | extern struct sysdev_class s3c2410_sysclass; | ||
76 | extern struct sysdev_class s3c2440_sysclass; | 77 | extern struct sysdev_class s3c2440_sysclass; |
77 | extern struct sysdev_class s3c2442_sysclass; | 78 | extern struct sysdev_class s3c2442_sysclass; |
diff --git a/arch/arm/mach-s3c2410/s3c2410-clock.c b/arch/arm/mach-s3c2410/s3c2410-clock.c new file mode 100644 index 000000000000..fd17c60e1132 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2410-clock.c | |||
@@ -0,0 +1,263 @@ | |||
1 | /* linux/arch/arm/mach-s3c2410/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2006 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410,S3C2440,S3C2442 Clock control support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/init.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/list.h> | ||
27 | #include <linux/errno.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/sysdev.h> | ||
30 | #include <linux/clk.h> | ||
31 | #include <linux/mutex.h> | ||
32 | #include <linux/delay.h> | ||
33 | |||
34 | #include <asm/hardware.h> | ||
35 | #include <asm/io.h> | ||
36 | |||
37 | #include <asm/arch/regs-clock.h> | ||
38 | #include <asm/arch/regs-gpio.h> | ||
39 | |||
40 | #include "clock.h" | ||
41 | #include "cpu.h" | ||
42 | |||
43 | int s3c2410_clkcon_enable(struct clk *clk, int enable) | ||
44 | { | ||
45 | unsigned int clocks = clk->ctrlbit; | ||
46 | unsigned long clkcon; | ||
47 | |||
48 | clkcon = __raw_readl(S3C2410_CLKCON); | ||
49 | |||
50 | if (enable) | ||
51 | clkcon |= clocks; | ||
52 | else | ||
53 | clkcon &= ~clocks; | ||
54 | |||
55 | /* ensure none of the special function bits set */ | ||
56 | clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); | ||
57 | |||
58 | __raw_writel(clkcon, S3C2410_CLKCON); | ||
59 | |||
60 | return 0; | ||
61 | } | ||
62 | |||
63 | static int s3c2410_upll_enable(struct clk *clk, int enable) | ||
64 | { | ||
65 | unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); | ||
66 | unsigned long orig = clkslow; | ||
67 | |||
68 | if (enable) | ||
69 | clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF; | ||
70 | else | ||
71 | clkslow |= S3C2410_CLKSLOW_UCLK_OFF; | ||
72 | |||
73 | __raw_writel(clkslow, S3C2410_CLKSLOW); | ||
74 | |||
75 | /* if we started the UPLL, then allow to settle */ | ||
76 | |||
77 | if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF)) | ||
78 | udelay(200); | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | /* standard clock definitions */ | ||
84 | |||
85 | static struct clk init_clocks_disable[] = { | ||
86 | { | ||
87 | .name = "nand", | ||
88 | .id = -1, | ||
89 | .parent = &clk_h, | ||
90 | .enable = s3c2410_clkcon_enable, | ||
91 | .ctrlbit = S3C2410_CLKCON_NAND, | ||
92 | }, { | ||
93 | .name = "sdi", | ||
94 | .id = -1, | ||
95 | .parent = &clk_p, | ||
96 | .enable = s3c2410_clkcon_enable, | ||
97 | .ctrlbit = S3C2410_CLKCON_SDI, | ||
98 | }, { | ||
99 | .name = "adc", | ||
100 | .id = -1, | ||
101 | .parent = &clk_p, | ||
102 | .enable = s3c2410_clkcon_enable, | ||
103 | .ctrlbit = S3C2410_CLKCON_ADC, | ||
104 | }, { | ||
105 | .name = "i2c", | ||
106 | .id = -1, | ||
107 | .parent = &clk_p, | ||
108 | .enable = s3c2410_clkcon_enable, | ||
109 | .ctrlbit = S3C2410_CLKCON_IIC, | ||
110 | }, { | ||
111 | .name = "iis", | ||
112 | .id = -1, | ||
113 | .parent = &clk_p, | ||
114 | .enable = s3c2410_clkcon_enable, | ||
115 | .ctrlbit = S3C2410_CLKCON_IIS, | ||
116 | }, { | ||
117 | .name = "spi", | ||
118 | .id = -1, | ||
119 | .parent = &clk_p, | ||
120 | .enable = s3c2410_clkcon_enable, | ||
121 | .ctrlbit = S3C2410_CLKCON_SPI, | ||
122 | } | ||
123 | }; | ||
124 | |||
125 | static struct clk init_clocks[] = { | ||
126 | { | ||
127 | .name = "lcd", | ||
128 | .id = -1, | ||
129 | .parent = &clk_h, | ||
130 | .enable = s3c2410_clkcon_enable, | ||
131 | .ctrlbit = S3C2410_CLKCON_LCDC, | ||
132 | }, { | ||
133 | .name = "gpio", | ||
134 | .id = -1, | ||
135 | .parent = &clk_p, | ||
136 | .enable = s3c2410_clkcon_enable, | ||
137 | .ctrlbit = S3C2410_CLKCON_GPIO, | ||
138 | }, { | ||
139 | .name = "usb-host", | ||
140 | .id = -1, | ||
141 | .parent = &clk_h, | ||
142 | .enable = s3c2410_clkcon_enable, | ||
143 | .ctrlbit = S3C2410_CLKCON_USBH, | ||
144 | }, { | ||
145 | .name = "usb-device", | ||
146 | .id = -1, | ||
147 | .parent = &clk_h, | ||
148 | .enable = s3c2410_clkcon_enable, | ||
149 | .ctrlbit = S3C2410_CLKCON_USBD, | ||
150 | }, { | ||
151 | .name = "timers", | ||
152 | .id = -1, | ||
153 | .parent = &clk_p, | ||
154 | .enable = s3c2410_clkcon_enable, | ||
155 | .ctrlbit = S3C2410_CLKCON_PWMT, | ||
156 | }, { | ||
157 | .name = "uart", | ||
158 | .id = 0, | ||
159 | .parent = &clk_p, | ||
160 | .enable = s3c2410_clkcon_enable, | ||
161 | .ctrlbit = S3C2410_CLKCON_UART0, | ||
162 | }, { | ||
163 | .name = "uart", | ||
164 | .id = 1, | ||
165 | .parent = &clk_p, | ||
166 | .enable = s3c2410_clkcon_enable, | ||
167 | .ctrlbit = S3C2410_CLKCON_UART1, | ||
168 | }, { | ||
169 | .name = "uart", | ||
170 | .id = 2, | ||
171 | .parent = &clk_p, | ||
172 | .enable = s3c2410_clkcon_enable, | ||
173 | .ctrlbit = S3C2410_CLKCON_UART2, | ||
174 | }, { | ||
175 | .name = "rtc", | ||
176 | .id = -1, | ||
177 | .parent = &clk_p, | ||
178 | .enable = s3c2410_clkcon_enable, | ||
179 | .ctrlbit = S3C2410_CLKCON_RTC, | ||
180 | }, { | ||
181 | .name = "watchdog", | ||
182 | .id = -1, | ||
183 | .parent = &clk_p, | ||
184 | .ctrlbit = 0, | ||
185 | } | ||
186 | }; | ||
187 | |||
188 | /* s3c2410_baseclk_add() | ||
189 | * | ||
190 | * Add all the clocks used by the s3c2410 or compatible CPUs | ||
191 | * such as the S3C2440 and S3C2442. | ||
192 | * | ||
193 | * We cannot use a system device as we are needed before any | ||
194 | * of the init-calls that initialise the devices are actually | ||
195 | * done. | ||
196 | */ | ||
197 | |||
198 | int __init s3c2410_baseclk_add(void) | ||
199 | { | ||
200 | unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); | ||
201 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); | ||
202 | struct clk *clkp; | ||
203 | struct clk *xtal; | ||
204 | int ret; | ||
205 | int ptr; | ||
206 | |||
207 | clk_upll.enable = s3c2410_upll_enable; | ||
208 | |||
209 | if (s3c24xx_register_clock(&clk_usb_bus) < 0) | ||
210 | printk(KERN_ERR "failed to register usb bus clock\n"); | ||
211 | |||
212 | /* register clocks from clock array */ | ||
213 | |||
214 | clkp = init_clocks; | ||
215 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { | ||
216 | /* ensure that we note the clock state */ | ||
217 | |||
218 | clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; | ||
219 | |||
220 | ret = s3c24xx_register_clock(clkp); | ||
221 | if (ret < 0) { | ||
222 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
223 | clkp->name, ret); | ||
224 | } | ||
225 | } | ||
226 | |||
227 | /* We must be careful disabling the clocks we are not intending to | ||
228 | * be using at boot time, as subsytems such as the LCD which do | ||
229 | * their own DMA requests to the bus can cause the system to lockup | ||
230 | * if they where in the middle of requesting bus access. | ||
231 | * | ||
232 | * Disabling the LCD clock if the LCD is active is very dangerous, | ||
233 | * and therefore the bootloader should be careful to not enable | ||
234 | * the LCD clock if it is not needed. | ||
235 | */ | ||
236 | |||
237 | /* install (and disable) the clocks we do not need immediately */ | ||
238 | |||
239 | clkp = init_clocks_disable; | ||
240 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | ||
241 | |||
242 | ret = s3c24xx_register_clock(clkp); | ||
243 | if (ret < 0) { | ||
244 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
245 | clkp->name, ret); | ||
246 | } | ||
247 | |||
248 | s3c2410_clkcon_enable(clkp, 0); | ||
249 | } | ||
250 | |||
251 | /* show the clock-slow value */ | ||
252 | |||
253 | xtal = clk_get(NULL, "xtal"); | ||
254 | |||
255 | printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", | ||
256 | print_mhz(clk_get_rate(xtal) / | ||
257 | ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), | ||
258 | (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", | ||
259 | (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", | ||
260 | (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); | ||
261 | |||
262 | return 0; | ||
263 | } | ||
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 0852e87a79c4..a110cff9cf6b 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/list.h> | 27 | #include <linux/list.h> |
28 | #include <linux/timer.h> | 28 | #include <linux/timer.h> |
29 | #include <linux/init.h> | 29 | #include <linux/init.h> |
30 | #include <linux/sysdev.h> | ||
30 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
31 | 32 | ||
32 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
@@ -108,11 +109,33 @@ void __init s3c2410_init_clocks(int xtal) | |||
108 | */ | 109 | */ |
109 | 110 | ||
110 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); | 111 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); |
112 | s3c2410_baseclk_add(); | ||
111 | } | 113 | } |
112 | 114 | ||
115 | struct sysdev_class s3c2410_sysclass = { | ||
116 | set_kset_name("s3c2410-core"), | ||
117 | }; | ||
118 | |||
119 | static struct sys_device s3c2410_sysdev = { | ||
120 | .cls = &s3c2410_sysclass, | ||
121 | }; | ||
122 | |||
123 | /* need to register class before we actually register the device, and | ||
124 | * we also need to ensure that it has been initialised before any of the | ||
125 | * drivers even try to use it (even if not on an s3c2440 based system) | ||
126 | * as a driver which may support both 2410 and 2440 may try and use it. | ||
127 | */ | ||
128 | |||
129 | static int __init s3c2410_core_init(void) | ||
130 | { | ||
131 | return sysdev_class_register(&s3c2410_sysclass); | ||
132 | } | ||
133 | |||
134 | core_initcall(s3c2410_core_init); | ||
135 | |||
113 | int __init s3c2410_init(void) | 136 | int __init s3c2410_init(void) |
114 | { | 137 | { |
115 | printk("S3C2410: Initialising architecture\n"); | 138 | printk("S3C2410: Initialising architecture\n"); |
116 | 139 | ||
117 | return 0; | 140 | return sysdev_register(&s3c2410_sysdev); |
118 | } | 141 | } |
diff --git a/arch/arm/mach-s3c2410/s3c2410.h b/arch/arm/mach-s3c2410/s3c2410.h index 4d5312a48209..73f1a2474a61 100644 --- a/arch/arm/mach-s3c2410/s3c2410.h +++ b/arch/arm/mach-s3c2410/s3c2410.h | |||
@@ -29,6 +29,8 @@ extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); | |||
29 | 29 | ||
30 | extern void s3c2410_init_clocks(int xtal); | 30 | extern void s3c2410_init_clocks(int xtal); |
31 | 31 | ||
32 | extern int s3c2410_baseclk_add(void); | ||
33 | |||
32 | #else | 34 | #else |
33 | #define s3c2410_init_clocks NULL | 35 | #define s3c2410_init_clocks NULL |
34 | #define s3c2410_init_uarts NULL | 36 | #define s3c2410_init_uarts NULL |
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c index d7a30ed6c327..15796864d010 100644 --- a/arch/arm/mach-s3c2410/s3c2440-clock.c +++ b/arch/arm/mach-s3c2410/s3c2440-clock.c | |||
@@ -91,7 +91,7 @@ static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate) | |||
91 | static struct clk s3c2440_clk_cam = { | 91 | static struct clk s3c2440_clk_cam = { |
92 | .name = "camif", | 92 | .name = "camif", |
93 | .id = -1, | 93 | .id = -1, |
94 | .enable = s3c24xx_clkcon_enable, | 94 | .enable = s3c2410_clkcon_enable, |
95 | .ctrlbit = S3C2440_CLKCON_CAMERA, | 95 | .ctrlbit = S3C2440_CLKCON_CAMERA, |
96 | }; | 96 | }; |
97 | 97 | ||
@@ -105,7 +105,7 @@ static struct clk s3c2440_clk_cam_upll = { | |||
105 | static struct clk s3c2440_clk_ac97 = { | 105 | static struct clk s3c2440_clk_ac97 = { |
106 | .name = "ac97", | 106 | .name = "ac97", |
107 | .id = -1, | 107 | .id = -1, |
108 | .enable = s3c24xx_clkcon_enable, | 108 | .enable = s3c2410_clkcon_enable, |
109 | .ctrlbit = S3C2440_CLKCON_CAMERA, | 109 | .ctrlbit = S3C2440_CLKCON_CAMERA, |
110 | }; | 110 | }; |
111 | 111 | ||
diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c index 5b7b301eb522..d9f54b5cab7f 100644 --- a/arch/arm/mach-s3c2410/s3c2442-clock.c +++ b/arch/arm/mach-s3c2410/s3c2442-clock.c | |||
@@ -102,7 +102,7 @@ static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate) | |||
102 | static struct clk s3c2442_clk_cam = { | 102 | static struct clk s3c2442_clk_cam = { |
103 | .name = "camif", | 103 | .name = "camif", |
104 | .id = -1, | 104 | .id = -1, |
105 | .enable = s3c24xx_clkcon_enable, | 105 | .enable = s3c2410_clkcon_enable, |
106 | .ctrlbit = S3C2440_CLKCON_CAMERA, | 106 | .ctrlbit = S3C2440_CLKCON_CAMERA, |
107 | }; | 107 | }; |
108 | 108 | ||
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c index 96852a7000db..838bc525e836 100644 --- a/arch/arm/mach-s3c2410/s3c244x.c +++ b/arch/arm/mach-s3c2410/s3c244x.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <asm/arch/regs-gpioj.h> | 34 | #include <asm/arch/regs-gpioj.h> |
35 | #include <asm/arch/regs-dsc.h> | 35 | #include <asm/arch/regs-dsc.h> |
36 | 36 | ||
37 | #include "s3c2410.h" | ||
37 | #include "s3c2440.h" | 38 | #include "s3c2440.h" |
38 | #include "s3c244x.h" | 39 | #include "s3c244x.h" |
39 | #include "clock.h" | 40 | #include "clock.h" |
@@ -118,6 +119,7 @@ void __init s3c244x_init_clocks(int xtal) | |||
118 | */ | 119 | */ |
119 | 120 | ||
120 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); | 121 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); |
122 | s3c2410_baseclk_add(); | ||
121 | } | 123 | } |
122 | 124 | ||
123 | #ifdef CONFIG_PM | 125 | #ifdef CONFIG_PM |
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c index 2dfe1ac42ee8..7d977d23f026 100644 --- a/arch/arm/nwfpe/fpmodule.c +++ b/arch/arm/nwfpe/fpmodule.c | |||
@@ -33,7 +33,8 @@ | |||
33 | #include <linux/signal.h> | 33 | #include <linux/signal.h> |
34 | #include <linux/sched.h> | 34 | #include <linux/sched.h> |
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | /* XXX */ | 36 | |
37 | #include <asm/thread_notify.h> | ||
37 | 38 | ||
38 | #include "softfloat.h" | 39 | #include "softfloat.h" |
39 | #include "fpopcode.h" | 40 | #include "fpopcode.h" |
@@ -56,16 +57,28 @@ void fp_send_sig(unsigned long sig, struct task_struct *p, int priv); | |||
56 | extern char fpe_type[]; | 57 | extern char fpe_type[]; |
57 | #endif | 58 | #endif |
58 | 59 | ||
60 | static int nwfpe_notify(struct notifier_block *self, unsigned long cmd, void *v) | ||
61 | { | ||
62 | struct thread_info *thread = v; | ||
63 | |||
64 | if (cmd == THREAD_NOTIFY_FLUSH) | ||
65 | nwfpe_init_fpa(&thread->fpstate); | ||
66 | |||
67 | return NOTIFY_DONE; | ||
68 | } | ||
69 | |||
70 | static struct notifier_block nwfpe_notifier_block = { | ||
71 | .notifier_call = nwfpe_notify, | ||
72 | }; | ||
73 | |||
59 | /* kernel function prototypes required */ | 74 | /* kernel function prototypes required */ |
60 | void fp_setup(void); | 75 | void fp_setup(void); |
61 | 76 | ||
62 | /* external declarations for saved kernel symbols */ | 77 | /* external declarations for saved kernel symbols */ |
63 | extern void (*kern_fp_enter)(void); | 78 | extern void (*kern_fp_enter)(void); |
64 | extern void (*fp_init)(union fp_state *); | ||
65 | 79 | ||
66 | /* Original value of fp_enter from kernel before patched by fpe_init. */ | 80 | /* Original value of fp_enter from kernel before patched by fpe_init. */ |
67 | static void (*orig_fp_enter)(void); | 81 | static void (*orig_fp_enter)(void); |
68 | static void (*orig_fp_init)(union fp_state *); | ||
69 | 82 | ||
70 | /* forward declarations */ | 83 | /* forward declarations */ |
71 | extern void nwfpe_enter(void); | 84 | extern void nwfpe_enter(void); |
@@ -88,20 +101,20 @@ static int __init fpe_init(void) | |||
88 | printk(KERN_WARNING "NetWinder Floating Point Emulator V0.97 (" | 101 | printk(KERN_WARNING "NetWinder Floating Point Emulator V0.97 (" |
89 | NWFPE_BITS " precision)\n"); | 102 | NWFPE_BITS " precision)\n"); |
90 | 103 | ||
104 | thread_register_notifier(&nwfpe_notifier_block); | ||
105 | |||
91 | /* Save pointer to the old FP handler and then patch ourselves in */ | 106 | /* Save pointer to the old FP handler and then patch ourselves in */ |
92 | orig_fp_enter = kern_fp_enter; | 107 | orig_fp_enter = kern_fp_enter; |
93 | orig_fp_init = fp_init; | ||
94 | kern_fp_enter = nwfpe_enter; | 108 | kern_fp_enter = nwfpe_enter; |
95 | fp_init = nwfpe_init_fpa; | ||
96 | 109 | ||
97 | return 0; | 110 | return 0; |
98 | } | 111 | } |
99 | 112 | ||
100 | static void __exit fpe_exit(void) | 113 | static void __exit fpe_exit(void) |
101 | { | 114 | { |
115 | thread_unregister_notifier(&nwfpe_notifier_block); | ||
102 | /* Restore the values we saved earlier. */ | 116 | /* Restore the values we saved earlier. */ |
103 | kern_fp_enter = orig_fp_enter; | 117 | kern_fp_enter = orig_fp_enter; |
104 | fp_init = orig_fp_init; | ||
105 | } | 118 | } |
106 | 119 | ||
107 | /* | 120 | /* |
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index b2a943bf11ef..3461a6c9665c 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c | |||
@@ -210,7 +210,8 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id, | |||
210 | 210 | ||
211 | now = omap_32k_sync_timer_read(); | 211 | now = omap_32k_sync_timer_read(); |
212 | 212 | ||
213 | while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) { | 213 | while ((signed long)(now - omap_32k_last_tick) |
214 | >= OMAP_32K_TICKS_PER_HZ) { | ||
214 | omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; | 215 | omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; |
215 | timer_tick(regs); | 216 | timer_tick(regs); |
216 | } | 217 | } |
diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile index afabac31dd1d..7e136e77971a 100644 --- a/arch/arm/vfp/Makefile +++ b/arch/arm/vfp/Makefile | |||
@@ -7,6 +7,9 @@ | |||
7 | # EXTRA_CFLAGS := -DDEBUG | 7 | # EXTRA_CFLAGS := -DDEBUG |
8 | # EXTRA_AFLAGS := -DDEBUG | 8 | # EXTRA_AFLAGS := -DDEBUG |
9 | 9 | ||
10 | AFLAGS :=$(AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp) | ||
11 | LDFLAGS +=--no-warn-mismatch | ||
12 | |||
10 | obj-y += vfp.o | 13 | obj-y += vfp.o |
11 | 14 | ||
12 | vfp-$(CONFIG_VFP) += entry.o vfpmodule.o vfphw.o vfpsingle.o vfpdouble.o | 15 | vfp-$(CONFIG_VFP) += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index a3f65b47aea9..eb683cd77163 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -192,7 +192,7 @@ vfp_get_double: | |||
192 | add pc, pc, r0, lsl #3 | 192 | add pc, pc, r0, lsl #3 |
193 | mov r0, r0 | 193 | mov r0, r0 |
194 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 194 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
195 | mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr | 195 | fmrrd r0, r1, d\dr |
196 | mov pc, lr | 196 | mov pc, lr |
197 | .endr | 197 | .endr |
198 | 198 | ||
@@ -206,6 +206,6 @@ vfp_put_double: | |||
206 | add pc, pc, r0, lsl #3 | 206 | add pc, pc, r0, lsl #3 |
207 | mov r0, r0 | 207 | mov r0, r0 |
208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
209 | mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr | 209 | fmdrr d\dr, r1, r2 |
210 | mov pc, lr | 210 | mov pc, lr |
211 | .endr | 211 | .endr |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 03486be04193..2476f4c2e760 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/signal.h> | 15 | #include <linux/signal.h> |
16 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | |||
19 | #include <asm/thread_notify.h> | ||
18 | #include <asm/vfp.h> | 20 | #include <asm/vfp.h> |
19 | 21 | ||
20 | #include "vfpinstr.h" | 22 | #include "vfpinstr.h" |
@@ -36,38 +38,55 @@ union vfp_state *last_VFP_context; | |||
36 | */ | 38 | */ |
37 | unsigned int VFP_arch; | 39 | unsigned int VFP_arch; |
38 | 40 | ||
39 | /* | 41 | static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) |
40 | * Per-thread VFP initialisation. | ||
41 | */ | ||
42 | void vfp_flush_thread(union vfp_state *vfp) | ||
43 | { | 42 | { |
44 | memset(vfp, 0, sizeof(union vfp_state)); | 43 | struct thread_info *thread = v; |
44 | union vfp_state *vfp = &thread->vfpstate; | ||
45 | 45 | ||
46 | vfp->hard.fpexc = FPEXC_ENABLE; | 46 | switch (cmd) { |
47 | vfp->hard.fpscr = FPSCR_ROUND_NEAREST; | 47 | case THREAD_NOTIFY_FLUSH: |
48 | /* | ||
49 | * Per-thread VFP initialisation. | ||
50 | */ | ||
51 | memset(vfp, 0, sizeof(union vfp_state)); | ||
48 | 52 | ||
49 | /* | 53 | vfp->hard.fpexc = FPEXC_ENABLE; |
50 | * Disable VFP to ensure we initialise it first. | 54 | vfp->hard.fpscr = FPSCR_ROUND_NEAREST; |
51 | */ | ||
52 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); | ||
53 | 55 | ||
54 | /* | 56 | /* |
55 | * Ensure we don't try to overwrite our newly initialised | 57 | * Disable VFP to ensure we initialise it first. |
56 | * state information on the first fault. | 58 | */ |
57 | */ | 59 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); |
58 | if (last_VFP_context == vfp) | ||
59 | last_VFP_context = NULL; | ||
60 | } | ||
61 | 60 | ||
62 | /* | 61 | /* |
63 | * Per-thread VFP cleanup. | 62 | * FALLTHROUGH: Ensure we don't try to overwrite our newly |
64 | */ | 63 | * initialised state information on the first fault. |
65 | void vfp_release_thread(union vfp_state *vfp) | 64 | */ |
66 | { | 65 | |
67 | if (last_VFP_context == vfp) | 66 | case THREAD_NOTIFY_RELEASE: |
68 | last_VFP_context = NULL; | 67 | /* |
68 | * Per-thread VFP cleanup. | ||
69 | */ | ||
70 | if (last_VFP_context == vfp) | ||
71 | last_VFP_context = NULL; | ||
72 | break; | ||
73 | |||
74 | case THREAD_NOTIFY_SWITCH: | ||
75 | /* | ||
76 | * Always disable VFP so we can lazily save/restore the | ||
77 | * old state. | ||
78 | */ | ||
79 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); | ||
80 | break; | ||
81 | } | ||
82 | |||
83 | return NOTIFY_DONE; | ||
69 | } | 84 | } |
70 | 85 | ||
86 | static struct notifier_block vfp_notifier_block = { | ||
87 | .notifier_call = vfp_notifier, | ||
88 | }; | ||
89 | |||
71 | /* | 90 | /* |
72 | * Raise a SIGFPE for the current process. | 91 | * Raise a SIGFPE for the current process. |
73 | * sicode describes the signal being raised. | 92 | * sicode describes the signal being raised. |
@@ -281,6 +300,8 @@ static int __init vfp_init(void) | |||
281 | (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, | 300 | (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, |
282 | (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); | 301 | (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); |
283 | vfp_vector = vfp_support_entry; | 302 | vfp_vector = vfp_support_entry; |
303 | |||
304 | thread_register_notifier(&vfp_notifier_block); | ||
284 | } | 305 | } |
285 | return 0; | 306 | return 0; |
286 | } | 307 | } |
diff --git a/drivers/mmc/at91_mci.c b/drivers/mmc/at91_mci.c index 88f0eef9cf33..3228516b7d19 100644 --- a/drivers/mmc/at91_mci.c +++ b/drivers/mmc/at91_mci.c | |||
@@ -81,13 +81,6 @@ | |||
81 | 81 | ||
82 | #undef SUPPORT_4WIRE | 82 | #undef SUPPORT_4WIRE |
83 | 83 | ||
84 | #ifdef CONFIG_MMC_DEBUG | ||
85 | #define DBG(fmt...) \ | ||
86 | printk(fmt) | ||
87 | #else | ||
88 | #define DBG(fmt...) do { } while (0) | ||
89 | #endif | ||
90 | |||
91 | static struct clk *mci_clk; | 84 | static struct clk *mci_clk; |
92 | 85 | ||
93 | #define FL_SENT_COMMAND (1 << 0) | 86 | #define FL_SENT_COMMAND (1 << 0) |
@@ -202,50 +195,50 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) | |||
202 | struct mmc_command *cmd; | 195 | struct mmc_command *cmd; |
203 | struct mmc_data *data; | 196 | struct mmc_data *data; |
204 | 197 | ||
205 | DBG("pre dma read\n"); | 198 | pr_debug("pre dma read\n"); |
206 | 199 | ||
207 | cmd = host->cmd; | 200 | cmd = host->cmd; |
208 | if (!cmd) { | 201 | if (!cmd) { |
209 | DBG("no command\n"); | 202 | pr_debug("no command\n"); |
210 | return; | 203 | return; |
211 | } | 204 | } |
212 | 205 | ||
213 | data = cmd->data; | 206 | data = cmd->data; |
214 | if (!data) { | 207 | if (!data) { |
215 | DBG("no data\n"); | 208 | pr_debug("no data\n"); |
216 | return; | 209 | return; |
217 | } | 210 | } |
218 | 211 | ||
219 | for (i = 0; i < 2; i++) { | 212 | for (i = 0; i < 2; i++) { |
220 | /* nothing left to transfer */ | 213 | /* nothing left to transfer */ |
221 | if (host->transfer_index >= data->sg_len) { | 214 | if (host->transfer_index >= data->sg_len) { |
222 | DBG("Nothing left to transfer (index = %d)\n", host->transfer_index); | 215 | pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index); |
223 | break; | 216 | break; |
224 | } | 217 | } |
225 | 218 | ||
226 | /* Check to see if this needs filling */ | 219 | /* Check to see if this needs filling */ |
227 | if (i == 0) { | 220 | if (i == 0) { |
228 | if (at91_mci_read(AT91_PDC_RCR) != 0) { | 221 | if (at91_mci_read(AT91_PDC_RCR) != 0) { |
229 | DBG("Transfer active in current\n"); | 222 | pr_debug("Transfer active in current\n"); |
230 | continue; | 223 | continue; |
231 | } | 224 | } |
232 | } | 225 | } |
233 | else { | 226 | else { |
234 | if (at91_mci_read(AT91_PDC_RNCR) != 0) { | 227 | if (at91_mci_read(AT91_PDC_RNCR) != 0) { |
235 | DBG("Transfer active in next\n"); | 228 | pr_debug("Transfer active in next\n"); |
236 | continue; | 229 | continue; |
237 | } | 230 | } |
238 | } | 231 | } |
239 | 232 | ||
240 | /* Setup the next transfer */ | 233 | /* Setup the next transfer */ |
241 | DBG("Using transfer index %d\n", host->transfer_index); | 234 | pr_debug("Using transfer index %d\n", host->transfer_index); |
242 | 235 | ||
243 | sg = &data->sg[host->transfer_index++]; | 236 | sg = &data->sg[host->transfer_index++]; |
244 | DBG("sg = %p\n", sg); | 237 | pr_debug("sg = %p\n", sg); |
245 | 238 | ||
246 | sg->dma_address = dma_map_page(NULL, sg->page, sg->offset, sg->length, DMA_FROM_DEVICE); | 239 | sg->dma_address = dma_map_page(NULL, sg->page, sg->offset, sg->length, DMA_FROM_DEVICE); |
247 | 240 | ||
248 | DBG("dma address = %08X, length = %d\n", sg->dma_address, sg->length); | 241 | pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); |
249 | 242 | ||
250 | if (i == 0) { | 243 | if (i == 0) { |
251 | at91_mci_write(AT91_PDC_RPR, sg->dma_address); | 244 | at91_mci_write(AT91_PDC_RPR, sg->dma_address); |
@@ -257,7 +250,7 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) | |||
257 | } | 250 | } |
258 | } | 251 | } |
259 | 252 | ||
260 | DBG("pre dma read done\n"); | 253 | pr_debug("pre dma read done\n"); |
261 | } | 254 | } |
262 | 255 | ||
263 | /* | 256 | /* |
@@ -268,17 +261,17 @@ static void at91mci_post_dma_read(struct at91mci_host *host) | |||
268 | struct mmc_command *cmd; | 261 | struct mmc_command *cmd; |
269 | struct mmc_data *data; | 262 | struct mmc_data *data; |
270 | 263 | ||
271 | DBG("post dma read\n"); | 264 | pr_debug("post dma read\n"); |
272 | 265 | ||
273 | cmd = host->cmd; | 266 | cmd = host->cmd; |
274 | if (!cmd) { | 267 | if (!cmd) { |
275 | DBG("no command\n"); | 268 | pr_debug("no command\n"); |
276 | return; | 269 | return; |
277 | } | 270 | } |
278 | 271 | ||
279 | data = cmd->data; | 272 | data = cmd->data; |
280 | if (!data) { | 273 | if (!data) { |
281 | DBG("no data\n"); | 274 | pr_debug("no data\n"); |
282 | return; | 275 | return; |
283 | } | 276 | } |
284 | 277 | ||
@@ -289,17 +282,17 @@ static void at91mci_post_dma_read(struct at91mci_host *host) | |||
289 | 282 | ||
290 | struct scatterlist *sg; | 283 | struct scatterlist *sg; |
291 | 284 | ||
292 | DBG("finishing index %d\n", host->in_use_index); | 285 | pr_debug("finishing index %d\n", host->in_use_index); |
293 | 286 | ||
294 | sg = &data->sg[host->in_use_index++]; | 287 | sg = &data->sg[host->in_use_index++]; |
295 | 288 | ||
296 | DBG("Unmapping page %08X\n", sg->dma_address); | 289 | pr_debug("Unmapping page %08X\n", sg->dma_address); |
297 | 290 | ||
298 | dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE); | 291 | dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE); |
299 | 292 | ||
300 | /* Swap the contents of the buffer */ | 293 | /* Swap the contents of the buffer */ |
301 | buffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset; | 294 | buffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset; |
302 | DBG("buffer = %p, length = %d\n", buffer, sg->length); | 295 | pr_debug("buffer = %p, length = %d\n", buffer, sg->length); |
303 | 296 | ||
304 | data->bytes_xfered += sg->length; | 297 | data->bytes_xfered += sg->length; |
305 | 298 | ||
@@ -320,7 +313,7 @@ static void at91mci_post_dma_read(struct at91mci_host *host) | |||
320 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); | 313 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); |
321 | } | 314 | } |
322 | 315 | ||
323 | DBG("post dma read done\n"); | 316 | pr_debug("post dma read done\n"); |
324 | } | 317 | } |
325 | 318 | ||
326 | /* | 319 | /* |
@@ -331,7 +324,7 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host) | |||
331 | struct mmc_command *cmd; | 324 | struct mmc_command *cmd; |
332 | struct mmc_data *data; | 325 | struct mmc_data *data; |
333 | 326 | ||
334 | DBG("Handling the transmit\n"); | 327 | pr_debug("Handling the transmit\n"); |
335 | 328 | ||
336 | /* Disable the transfer */ | 329 | /* Disable the transfer */ |
337 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); | 330 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); |
@@ -387,12 +380,12 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
387 | /* Not sure if this is needed */ | 380 | /* Not sure if this is needed */ |
388 | #if 0 | 381 | #if 0 |
389 | if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { | 382 | if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { |
390 | DBG("Clearing timeout\n"); | 383 | pr_debug("Clearing timeout\n"); |
391 | at91_mci_write(AT91_MCI_ARGR, 0); | 384 | at91_mci_write(AT91_MCI_ARGR, 0); |
392 | at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD); | 385 | at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD); |
393 | while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) { | 386 | while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) { |
394 | /* spin */ | 387 | /* spin */ |
395 | DBG("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR)); | 388 | pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR)); |
396 | } | 389 | } |
397 | } | 390 | } |
398 | #endif | 391 | #endif |
@@ -411,7 +404,7 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
411 | } | 404 | } |
412 | 405 | ||
413 | if (data) { | 406 | if (data) { |
414 | block_length = 1 << data->blksz_bits; | 407 | block_length = data->blksz; |
415 | blocks = data->blocks; | 408 | blocks = data->blocks; |
416 | 409 | ||
417 | /* always set data start - also set direction flag for read */ | 410 | /* always set data start - also set direction flag for read */ |
@@ -439,7 +432,7 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
439 | /* | 432 | /* |
440 | * Set the arguments and send the command | 433 | * Set the arguments and send the command |
441 | */ | 434 | */ |
442 | DBG("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n", | 435 | pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n", |
443 | cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR)); | 436 | cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR)); |
444 | 437 | ||
445 | if (!data) { | 438 | if (!data) { |
@@ -491,7 +484,7 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
491 | 484 | ||
492 | at91mci_sg_to_dma(host, data); | 485 | at91mci_sg_to_dma(host, data); |
493 | 486 | ||
494 | DBG("Transmitting %d bytes\n", host->total_length); | 487 | pr_debug("Transmitting %d bytes\n", host->total_length); |
495 | 488 | ||
496 | at91_mci_write(AT91_PDC_TPR, host->physical_address); | 489 | at91_mci_write(AT91_PDC_TPR, host->physical_address); |
497 | at91_mci_write(AT91_PDC_TCR, host->total_length / 4); | 490 | at91_mci_write(AT91_PDC_TCR, host->total_length / 4); |
@@ -525,7 +518,7 @@ static void at91mci_process_command(struct at91mci_host *host, struct mmc_comman | |||
525 | 518 | ||
526 | ier = at91_mci_send_command(host, cmd); | 519 | ier = at91_mci_send_command(host, cmd); |
527 | 520 | ||
528 | DBG("setting ier to %08X\n", ier); | 521 | pr_debug("setting ier to %08X\n", ier); |
529 | 522 | ||
530 | /* Stop on errors or the required value */ | 523 | /* Stop on errors or the required value */ |
531 | at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier); | 524 | at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier); |
@@ -570,7 +563,7 @@ static void at91mci_completed_command(struct at91mci_host *host) | |||
570 | 563 | ||
571 | status = at91_mci_read(AT91_MCI_SR); | 564 | status = at91_mci_read(AT91_MCI_SR); |
572 | 565 | ||
573 | DBG("Status = %08X [%08X %08X %08X %08X]\n", | 566 | pr_debug("Status = %08X [%08X %08X %08X %08X]\n", |
574 | status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); | 567 | status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); |
575 | 568 | ||
576 | if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE | | 569 | if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE | |
@@ -590,7 +583,7 @@ static void at91mci_completed_command(struct at91mci_host *host) | |||
590 | else | 583 | else |
591 | cmd->error = MMC_ERR_FAILED; | 584 | cmd->error = MMC_ERR_FAILED; |
592 | 585 | ||
593 | DBG("Error detected and set to %d (cmd = %d, retries = %d)\n", | 586 | pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n", |
594 | cmd->error, cmd->opcode, cmd->retries); | 587 | cmd->error, cmd->opcode, cmd->retries); |
595 | } | 588 | } |
596 | } | 589 | } |
@@ -621,10 +614,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
621 | struct at91mci_host *host = mmc_priv(mmc); | 614 | struct at91mci_host *host = mmc_priv(mmc); |
622 | unsigned long at91_master_clock = clk_get_rate(mci_clk); | 615 | unsigned long at91_master_clock = clk_get_rate(mci_clk); |
623 | 616 | ||
624 | if (host) | 617 | host->bus_mode = ios->bus_mode; |
625 | host->bus_mode = ios->bus_mode; | ||
626 | else | ||
627 | printk("MMC: No host for bus_mode\n"); | ||
628 | 618 | ||
629 | if (ios->clock == 0) { | 619 | if (ios->clock == 0) { |
630 | /* Disable the MCI controller */ | 620 | /* Disable the MCI controller */ |
@@ -640,15 +630,15 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
640 | else | 630 | else |
641 | clkdiv = (at91_master_clock / ios->clock) / 2; | 631 | clkdiv = (at91_master_clock / ios->clock) / 2; |
642 | 632 | ||
643 | DBG("clkdiv = %d. mcck = %ld\n", clkdiv, | 633 | pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv, |
644 | at91_master_clock / (2 * (clkdiv + 1))); | 634 | at91_master_clock / (2 * (clkdiv + 1))); |
645 | } | 635 | } |
646 | if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) { | 636 | if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) { |
647 | DBG("MMC: Setting controller bus width to 4\n"); | 637 | pr_debug("MMC: Setting controller bus width to 4\n"); |
648 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS); | 638 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS); |
649 | } | 639 | } |
650 | else { | 640 | else { |
651 | DBG("MMC: Setting controller bus width to 1\n"); | 641 | pr_debug("MMC: Setting controller bus width to 1\n"); |
652 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); | 642 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); |
653 | } | 643 | } |
654 | 644 | ||
@@ -656,7 +646,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
656 | at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); | 646 | at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); |
657 | 647 | ||
658 | /* maybe switch power to the card */ | 648 | /* maybe switch power to the card */ |
659 | if (host && host->board->vcc_pin) { | 649 | if (host->board->vcc_pin) { |
660 | switch (ios->power_mode) { | 650 | switch (ios->power_mode) { |
661 | case MMC_POWER_OFF: | 651 | case MMC_POWER_OFF: |
662 | at91_set_gpio_output(host->board->vcc_pin, 0); | 652 | at91_set_gpio_output(host->board->vcc_pin, 0); |
@@ -679,11 +669,8 @@ static irqreturn_t at91_mci_irq(int irq, void *devid, struct pt_regs *regs) | |||
679 | 669 | ||
680 | unsigned int int_status; | 670 | unsigned int int_status; |
681 | 671 | ||
682 | if (host == NULL) | ||
683 | return IRQ_HANDLED; | ||
684 | |||
685 | int_status = at91_mci_read(AT91_MCI_SR); | 672 | int_status = at91_mci_read(AT91_MCI_SR); |
686 | DBG("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR), | 673 | pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR), |
687 | int_status & at91_mci_read(AT91_MCI_IMR)); | 674 | int_status & at91_mci_read(AT91_MCI_IMR)); |
688 | 675 | ||
689 | if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000) | 676 | if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000) |
@@ -692,75 +679,75 @@ static irqreturn_t at91_mci_irq(int irq, void *devid, struct pt_regs *regs) | |||
692 | int_status &= at91_mci_read(AT91_MCI_IMR); | 679 | int_status &= at91_mci_read(AT91_MCI_IMR); |
693 | 680 | ||
694 | if (int_status & AT91_MCI_UNRE) | 681 | if (int_status & AT91_MCI_UNRE) |
695 | DBG("MMC: Underrun error\n"); | 682 | pr_debug("MMC: Underrun error\n"); |
696 | if (int_status & AT91_MCI_OVRE) | 683 | if (int_status & AT91_MCI_OVRE) |
697 | DBG("MMC: Overrun error\n"); | 684 | pr_debug("MMC: Overrun error\n"); |
698 | if (int_status & AT91_MCI_DTOE) | 685 | if (int_status & AT91_MCI_DTOE) |
699 | DBG("MMC: Data timeout\n"); | 686 | pr_debug("MMC: Data timeout\n"); |
700 | if (int_status & AT91_MCI_DCRCE) | 687 | if (int_status & AT91_MCI_DCRCE) |
701 | DBG("MMC: CRC error in data\n"); | 688 | pr_debug("MMC: CRC error in data\n"); |
702 | if (int_status & AT91_MCI_RTOE) | 689 | if (int_status & AT91_MCI_RTOE) |
703 | DBG("MMC: Response timeout\n"); | 690 | pr_debug("MMC: Response timeout\n"); |
704 | if (int_status & AT91_MCI_RENDE) | 691 | if (int_status & AT91_MCI_RENDE) |
705 | DBG("MMC: Response end bit error\n"); | 692 | pr_debug("MMC: Response end bit error\n"); |
706 | if (int_status & AT91_MCI_RCRCE) | 693 | if (int_status & AT91_MCI_RCRCE) |
707 | DBG("MMC: Response CRC error\n"); | 694 | pr_debug("MMC: Response CRC error\n"); |
708 | if (int_status & AT91_MCI_RDIRE) | 695 | if (int_status & AT91_MCI_RDIRE) |
709 | DBG("MMC: Response direction error\n"); | 696 | pr_debug("MMC: Response direction error\n"); |
710 | if (int_status & AT91_MCI_RINDE) | 697 | if (int_status & AT91_MCI_RINDE) |
711 | DBG("MMC: Response index error\n"); | 698 | pr_debug("MMC: Response index error\n"); |
712 | 699 | ||
713 | /* Only continue processing if no errors */ | 700 | /* Only continue processing if no errors */ |
714 | if (!completed) { | 701 | if (!completed) { |
715 | if (int_status & AT91_MCI_TXBUFE) { | 702 | if (int_status & AT91_MCI_TXBUFE) { |
716 | DBG("TX buffer empty\n"); | 703 | pr_debug("TX buffer empty\n"); |
717 | at91_mci_handle_transmitted(host); | 704 | at91_mci_handle_transmitted(host); |
718 | } | 705 | } |
719 | 706 | ||
720 | if (int_status & AT91_MCI_RXBUFF) { | 707 | if (int_status & AT91_MCI_RXBUFF) { |
721 | DBG("RX buffer full\n"); | 708 | pr_debug("RX buffer full\n"); |
722 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); | 709 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); |
723 | } | 710 | } |
724 | 711 | ||
725 | if (int_status & AT91_MCI_ENDTX) { | 712 | if (int_status & AT91_MCI_ENDTX) { |
726 | DBG("Transmit has ended\n"); | 713 | pr_debug("Transmit has ended\n"); |
727 | } | 714 | } |
728 | 715 | ||
729 | if (int_status & AT91_MCI_ENDRX) { | 716 | if (int_status & AT91_MCI_ENDRX) { |
730 | DBG("Receive has ended\n"); | 717 | pr_debug("Receive has ended\n"); |
731 | at91mci_post_dma_read(host); | 718 | at91mci_post_dma_read(host); |
732 | } | 719 | } |
733 | 720 | ||
734 | if (int_status & AT91_MCI_NOTBUSY) { | 721 | if (int_status & AT91_MCI_NOTBUSY) { |
735 | DBG("Card is ready\n"); | 722 | pr_debug("Card is ready\n"); |
736 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); | 723 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); |
737 | } | 724 | } |
738 | 725 | ||
739 | if (int_status & AT91_MCI_DTIP) { | 726 | if (int_status & AT91_MCI_DTIP) { |
740 | DBG("Data transfer in progress\n"); | 727 | pr_debug("Data transfer in progress\n"); |
741 | } | 728 | } |
742 | 729 | ||
743 | if (int_status & AT91_MCI_BLKE) { | 730 | if (int_status & AT91_MCI_BLKE) { |
744 | DBG("Block transfer has ended\n"); | 731 | pr_debug("Block transfer has ended\n"); |
745 | } | 732 | } |
746 | 733 | ||
747 | if (int_status & AT91_MCI_TXRDY) { | 734 | if (int_status & AT91_MCI_TXRDY) { |
748 | DBG("Ready to transmit\n"); | 735 | pr_debug("Ready to transmit\n"); |
749 | } | 736 | } |
750 | 737 | ||
751 | if (int_status & AT91_MCI_RXRDY) { | 738 | if (int_status & AT91_MCI_RXRDY) { |
752 | DBG("Ready to receive\n"); | 739 | pr_debug("Ready to receive\n"); |
753 | } | 740 | } |
754 | 741 | ||
755 | if (int_status & AT91_MCI_CMDRDY) { | 742 | if (int_status & AT91_MCI_CMDRDY) { |
756 | DBG("Command ready\n"); | 743 | pr_debug("Command ready\n"); |
757 | completed = 1; | 744 | completed = 1; |
758 | } | 745 | } |
759 | } | 746 | } |
760 | at91_mci_write(AT91_MCI_IDR, int_status); | 747 | at91_mci_write(AT91_MCI_IDR, int_status); |
761 | 748 | ||
762 | if (completed) { | 749 | if (completed) { |
763 | DBG("Completed command\n"); | 750 | pr_debug("Completed command\n"); |
764 | at91_mci_write(AT91_MCI_IDR, 0xffffffff); | 751 | at91_mci_write(AT91_MCI_IDR, 0xffffffff); |
765 | at91mci_completed_command(host); | 752 | at91mci_completed_command(host); |
766 | } | 753 | } |
@@ -779,10 +766,10 @@ static irqreturn_t at91_mmc_det_irq(int irq, void *_host, struct pt_regs *regs) | |||
779 | */ | 766 | */ |
780 | if (present != host->present) { | 767 | if (present != host->present) { |
781 | host->present = present; | 768 | host->present = present; |
782 | DBG("%s: card %s\n", mmc_hostname(host->mmc), | 769 | pr_debug("%s: card %s\n", mmc_hostname(host->mmc), |
783 | present ? "insert" : "remove"); | 770 | present ? "insert" : "remove"); |
784 | if (!present) { | 771 | if (!present) { |
785 | DBG("****** Resetting SD-card bus width ******\n"); | 772 | pr_debug("****** Resetting SD-card bus width ******\n"); |
786 | at91_mci_write(AT91_MCI_SDCR, 0); | 773 | at91_mci_write(AT91_MCI_SDCR, 0); |
787 | } | 774 | } |
788 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); | 775 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); |
@@ -822,13 +809,13 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
822 | struct at91mci_host *host; | 809 | struct at91mci_host *host; |
823 | int ret; | 810 | int ret; |
824 | 811 | ||
825 | DBG("Probe MCI devices\n"); | 812 | pr_debug("Probe MCI devices\n"); |
826 | at91_mci_disable(); | 813 | at91_mci_disable(); |
827 | at91_mci_enable(); | 814 | at91_mci_enable(); |
828 | 815 | ||
829 | mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev); | 816 | mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev); |
830 | if (!mmc) { | 817 | if (!mmc) { |
831 | DBG("Failed to allocate mmc host\n"); | 818 | pr_debug("Failed to allocate mmc host\n"); |
832 | return -ENOMEM; | 819 | return -ENOMEM; |
833 | } | 820 | } |
834 | 821 | ||
@@ -854,8 +841,9 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
854 | * Get Clock | 841 | * Get Clock |
855 | */ | 842 | */ |
856 | mci_clk = clk_get(&pdev->dev, "mci_clk"); | 843 | mci_clk = clk_get(&pdev->dev, "mci_clk"); |
857 | if (!mci_clk) { | 844 | if (IS_ERR(mci_clk)) { |
858 | printk(KERN_ERR "AT91 MMC: no clock defined.\n"); | 845 | printk(KERN_ERR "AT91 MMC: no clock defined.\n"); |
846 | mmc_free_host(mmc); | ||
859 | return -ENODEV; | 847 | return -ENODEV; |
860 | } | 848 | } |
861 | clk_enable(mci_clk); /* Enable the peripheral clock */ | 849 | clk_enable(mci_clk); /* Enable the peripheral clock */ |
@@ -865,7 +853,10 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
865 | */ | 853 | */ |
866 | ret = request_irq(AT91_ID_MCI, at91_mci_irq, SA_SHIRQ, DRIVER_NAME, host); | 854 | ret = request_irq(AT91_ID_MCI, at91_mci_irq, SA_SHIRQ, DRIVER_NAME, host); |
867 | if (ret) { | 855 | if (ret) { |
868 | DBG("Failed to request MCI interrupt\n"); | 856 | printk(KERN_ERR "Failed to request MCI interrupt\n"); |
857 | clk_disable(mci_clk); | ||
858 | clk_put(mci_clk); | ||
859 | mmc_free_host(mmc); | ||
869 | return ret; | 860 | return ret; |
870 | } | 861 | } |
871 | 862 | ||
@@ -886,12 +877,12 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
886 | */ | 877 | */ |
887 | if (host->board->det_pin) { | 878 | if (host->board->det_pin) { |
888 | ret = request_irq(host->board->det_pin, at91_mmc_det_irq, | 879 | ret = request_irq(host->board->det_pin, at91_mmc_det_irq, |
889 | SA_SAMPLE_RANDOM, DRIVER_NAME, host); | 880 | 0, DRIVER_NAME, host); |
890 | if (ret) | 881 | if (ret) |
891 | DBG("couldn't allocate MMC detect irq\n"); | 882 | printk(KERN_ERR "couldn't allocate MMC detect irq\n"); |
892 | } | 883 | } |
893 | 884 | ||
894 | DBG(KERN_INFO "Added MCI driver\n"); | 885 | pr_debug(KERN_INFO "Added MCI driver\n"); |
895 | 886 | ||
896 | return 0; | 887 | return 0; |
897 | } | 888 | } |
@@ -924,7 +915,7 @@ static int at91_mci_remove(struct platform_device *pdev) | |||
924 | 915 | ||
925 | platform_set_drvdata(pdev, NULL); | 916 | platform_set_drvdata(pdev, NULL); |
926 | 917 | ||
927 | DBG("Removed\n"); | 918 | pr_debug("MCI Removed\n"); |
928 | 919 | ||
929 | return 0; | 920 | return 0; |
930 | } | 921 | } |
diff --git a/drivers/mmc/imxmmc.c b/drivers/mmc/imxmmc.c index a4eb1d0e7a71..5c62f4e6ad06 100644 --- a/drivers/mmc/imxmmc.c +++ b/drivers/mmc/imxmmc.c | |||
@@ -228,7 +228,7 @@ static int imxmci_busy_wait_for_status(struct imxmci_host *host, | |||
228 | static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) | 228 | static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) |
229 | { | 229 | { |
230 | unsigned int nob = data->blocks; | 230 | unsigned int nob = data->blocks; |
231 | unsigned int blksz = 1 << data->blksz_bits; | 231 | unsigned int blksz = data->blksz; |
232 | unsigned int datasz = nob * blksz; | 232 | unsigned int datasz = nob * blksz; |
233 | int i; | 233 | int i; |
234 | 234 | ||
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c index becb3c68c34d..c25244b3657b 100644 --- a/drivers/mmc/omap.c +++ b/drivers/mmc/omap.c | |||
@@ -584,10 +584,10 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data) | |||
584 | int sync_dev = 0; | 584 | int sync_dev = 0; |
585 | 585 | ||
586 | data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA; | 586 | data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA; |
587 | frame = 1 << data->blksz_bits; | 587 | frame = data->blksz; |
588 | count = sg_dma_len(sg); | 588 | count = sg_dma_len(sg); |
589 | 589 | ||
590 | if ((data->blocks == 1) && (count > (1 << data->blksz_bits))) | 590 | if ((data->blocks == 1) && (count > data->blksz)) |
591 | count = frame; | 591 | count = frame; |
592 | 592 | ||
593 | host->dma_len = count; | 593 | host->dma_len = count; |
@@ -776,7 +776,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) | |||
776 | } | 776 | } |
777 | 777 | ||
778 | 778 | ||
779 | block_size = 1 << data->blksz_bits; | 779 | block_size = data->blksz; |
780 | 780 | ||
781 | OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1); | 781 | OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1); |
782 | OMAP_MMC_WRITE(host->base, BLEN, block_size - 1); | 782 | OMAP_MMC_WRITE(host->base, BLEN, block_size - 1); |
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 6bfcdbc7491e..8e9100bd57ef 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c | |||
@@ -268,7 +268,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) | |||
268 | } | 268 | } |
269 | 269 | ||
270 | DBG("blksz %04x blks %04x flags %08x\n", | 270 | DBG("blksz %04x blks %04x flags %08x\n", |
271 | 1 << data->blksz_bits, data->blocks, data->flags); | 271 | data->blksz, data->blocks, data->flags); |
272 | DBG("tsac %d ms nsac %d clk\n", | 272 | DBG("tsac %d ms nsac %d clk\n", |
273 | data->timeout_ns / 1000000, data->timeout_clks); | 273 | data->timeout_ns / 1000000, data->timeout_clks); |
274 | 274 | ||
@@ -282,7 +282,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) | |||
282 | 282 | ||
283 | writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); | 283 | writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); |
284 | 284 | ||
285 | writew(1 << data->blksz_bits, host->ioaddr + SDHCI_BLOCK_SIZE); | 285 | writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE); |
286 | writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT); | 286 | writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT); |
287 | 287 | ||
288 | if (host->flags & SDHCI_USE_DMA) { | 288 | if (host->flags & SDHCI_USE_DMA) { |
@@ -294,7 +294,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) | |||
294 | 294 | ||
295 | writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS); | 295 | writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS); |
296 | } else { | 296 | } else { |
297 | host->size = (1 << data->blksz_bits) * data->blocks; | 297 | host->size = data->blksz * data->blocks; |
298 | 298 | ||
299 | host->cur_sg = data->sg; | 299 | host->cur_sg = data->sg; |
300 | host->num_sg = data->sg_len; | 300 | host->num_sg = data->sg_len; |
@@ -335,7 +335,7 @@ static void sdhci_finish_data(struct sdhci_host *host) | |||
335 | blocks = 0; | 335 | blocks = 0; |
336 | else | 336 | else |
337 | blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT); | 337 | blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT); |
338 | data->bytes_xfered = (1 << data->blksz_bits) * (data->blocks - blocks); | 338 | data->bytes_xfered = data->blksz * (data->blocks - blocks); |
339 | 339 | ||
340 | if ((data->error == MMC_ERR_NONE) && blocks) { | 340 | if ((data->error == MMC_ERR_NONE) && blocks) { |
341 | printk(KERN_ERR "%s: Controller signalled completion even " | 341 | printk(KERN_ERR "%s: Controller signalled completion even " |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5ea778fc1caa..bef4a9622ed7 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -937,4 +937,23 @@ config SERIAL_SGI_IOC3 | |||
937 | If you have an SGI Altix with an IOC3 serial card, | 937 | If you have an SGI Altix with an IOC3 serial card, |
938 | say Y or M. Otherwise, say N. | 938 | say Y or M. Otherwise, say N. |
939 | 939 | ||
940 | config SERIAL_NETX | ||
941 | bool "NetX serial port support" | ||
942 | depends on ARM && ARCH_NETX | ||
943 | select SERIAL_CORE | ||
944 | help | ||
945 | If you have a machine based on a Hilscher NetX SoC you | ||
946 | can enable its onboard serial port by enabling this option. | ||
947 | |||
948 | To compile this driver as a module, choose M here: the | ||
949 | module will be called netx-serial. | ||
950 | |||
951 | config SERIAL_NETX_CONSOLE | ||
952 | bool "Console on NetX serial port" | ||
953 | depends on SERIAL_NETX | ||
954 | select SERIAL_CORE_CONSOLE | ||
955 | help | ||
956 | If you have enabled the serial port on the Motorola IMX | ||
957 | CPU you can make it the console by answering Y to this option. | ||
958 | |||
940 | endmenu | 959 | endmenu |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 0a71bf68a03f..927faee0362e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -55,3 +55,4 @@ obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o | |||
55 | obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o | 55 | obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o |
56 | obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o | 56 | obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o |
57 | obj-$(CONFIG_SERIAL_AT91) += at91_serial.o | 57 | obj-$(CONFIG_SERIAL_AT91) += at91_serial.o |
58 | obj-$(CONFIG_SERIAL_NETX) += netx-serial.o | ||
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 1631414000a2..e920d196d0b1 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
@@ -52,7 +52,7 @@ | |||
52 | 52 | ||
53 | #include <asm/io.h> | 53 | #include <asm/io.h> |
54 | 54 | ||
55 | #define UART_NR 2 | 55 | #define UART_NR 8 |
56 | 56 | ||
57 | #define SERIAL_AMBA_MAJOR 204 | 57 | #define SERIAL_AMBA_MAJOR 204 |
58 | #define SERIAL_AMBA_MINOR 16 | 58 | #define SERIAL_AMBA_MINOR 16 |
diff --git a/drivers/serial/netx-serial.c b/drivers/serial/netx-serial.c new file mode 100644 index 000000000000..c1adc9e4b239 --- /dev/null +++ b/drivers/serial/netx-serial.c | |||
@@ -0,0 +1,749 @@ | |||
1 | /* | ||
2 | * drivers/serial/netx-serial.c | ||
3 | * | ||
4 | * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/config.h> | ||
21 | |||
22 | #if defined(CONFIG_SERIAL_NETX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
23 | #define SUPPORT_SYSRQ | ||
24 | #endif | ||
25 | |||
26 | #include <linux/device.h> | ||
27 | #include <linux/module.h> | ||
28 | #include <linux/ioport.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/console.h> | ||
31 | #include <linux/sysrq.h> | ||
32 | #include <linux/platform_device.h> | ||
33 | #include <linux/tty.h> | ||
34 | #include <linux/tty_flip.h> | ||
35 | #include <linux/serial_core.h> | ||
36 | #include <linux/serial.h> | ||
37 | |||
38 | #include <asm/io.h> | ||
39 | #include <asm/irq.h> | ||
40 | #include <asm/hardware.h> | ||
41 | #include <asm/arch/netx-regs.h> | ||
42 | |||
43 | /* We've been assigned a range on the "Low-density serial ports" major */ | ||
44 | #define SERIAL_NX_MAJOR 204 | ||
45 | #define MINOR_START 170 | ||
46 | |||
47 | #ifdef CONFIG_SERIAL_NETX_CONSOLE | ||
48 | |||
49 | enum uart_regs { | ||
50 | UART_DR = 0x00, | ||
51 | UART_SR = 0x04, | ||
52 | UART_LINE_CR = 0x08, | ||
53 | UART_BAUDDIV_MSB = 0x0c, | ||
54 | UART_BAUDDIV_LSB = 0x10, | ||
55 | UART_CR = 0x14, | ||
56 | UART_FR = 0x18, | ||
57 | UART_IIR = 0x1c, | ||
58 | UART_ILPR = 0x20, | ||
59 | UART_RTS_CR = 0x24, | ||
60 | UART_RTS_LEAD = 0x28, | ||
61 | UART_RTS_TRAIL = 0x2c, | ||
62 | UART_DRV_ENABLE = 0x30, | ||
63 | UART_BRM_CR = 0x34, | ||
64 | UART_RXFIFO_IRQLEVEL = 0x38, | ||
65 | UART_TXFIFO_IRQLEVEL = 0x3c, | ||
66 | }; | ||
67 | |||
68 | #define SR_FE (1<<0) | ||
69 | #define SR_PE (1<<1) | ||
70 | #define SR_BE (1<<2) | ||
71 | #define SR_OE (1<<3) | ||
72 | |||
73 | #define LINE_CR_BRK (1<<0) | ||
74 | #define LINE_CR_PEN (1<<1) | ||
75 | #define LINE_CR_EPS (1<<2) | ||
76 | #define LINE_CR_STP2 (1<<3) | ||
77 | #define LINE_CR_FEN (1<<4) | ||
78 | #define LINE_CR_5BIT (0<<5) | ||
79 | #define LINE_CR_6BIT (1<<5) | ||
80 | #define LINE_CR_7BIT (2<<5) | ||
81 | #define LINE_CR_8BIT (3<<5) | ||
82 | #define LINE_CR_BITS_MASK (3<<5) | ||
83 | |||
84 | #define CR_UART_EN (1<<0) | ||
85 | #define CR_SIREN (1<<1) | ||
86 | #define CR_SIRLP (1<<2) | ||
87 | #define CR_MSIE (1<<3) | ||
88 | #define CR_RIE (1<<4) | ||
89 | #define CR_TIE (1<<5) | ||
90 | #define CR_RTIE (1<<6) | ||
91 | #define CR_LBE (1<<7) | ||
92 | |||
93 | #define FR_CTS (1<<0) | ||
94 | #define FR_DSR (1<<1) | ||
95 | #define FR_DCD (1<<2) | ||
96 | #define FR_BUSY (1<<3) | ||
97 | #define FR_RXFE (1<<4) | ||
98 | #define FR_TXFF (1<<5) | ||
99 | #define FR_RXFF (1<<6) | ||
100 | #define FR_TXFE (1<<7) | ||
101 | |||
102 | #define IIR_MIS (1<<0) | ||
103 | #define IIR_RIS (1<<1) | ||
104 | #define IIR_TIS (1<<2) | ||
105 | #define IIR_RTIS (1<<3) | ||
106 | #define IIR_MASK 0xf | ||
107 | |||
108 | #define RTS_CR_AUTO (1<<0) | ||
109 | #define RTS_CR_RTS (1<<1) | ||
110 | #define RTS_CR_COUNT (1<<2) | ||
111 | #define RTS_CR_MOD2 (1<<3) | ||
112 | #define RTS_CR_RTS_POL (1<<4) | ||
113 | #define RTS_CR_CTS_CTR (1<<5) | ||
114 | #define RTS_CR_CTS_POL (1<<6) | ||
115 | #define RTS_CR_STICK (1<<7) | ||
116 | |||
117 | #define UART_PORT_SIZE 0x40 | ||
118 | #define DRIVER_NAME "netx-uart" | ||
119 | |||
120 | struct netx_port { | ||
121 | struct uart_port port; | ||
122 | }; | ||
123 | |||
124 | static void netx_stop_tx(struct uart_port *port) | ||
125 | { | ||
126 | unsigned int val; | ||
127 | val = readl(port->membase + UART_CR); | ||
128 | writel(val & ~CR_TIE, port->membase + UART_CR); | ||
129 | } | ||
130 | |||
131 | static void netx_stop_rx(struct uart_port *port) | ||
132 | { | ||
133 | unsigned int val; | ||
134 | val = readl(port->membase + UART_CR); | ||
135 | writel(val & ~CR_RIE, port->membase + UART_CR); | ||
136 | } | ||
137 | |||
138 | static void netx_enable_ms(struct uart_port *port) | ||
139 | { | ||
140 | unsigned int val; | ||
141 | val = readl(port->membase + UART_CR); | ||
142 | writel(val | CR_MSIE, port->membase + UART_CR); | ||
143 | } | ||
144 | |||
145 | static inline void netx_transmit_buffer(struct uart_port *port) | ||
146 | { | ||
147 | struct circ_buf *xmit = &port->info->xmit; | ||
148 | |||
149 | if (port->x_char) { | ||
150 | writel(port->x_char, port->membase + UART_DR); | ||
151 | port->icount.tx++; | ||
152 | port->x_char = 0; | ||
153 | return; | ||
154 | } | ||
155 | |||
156 | if (uart_tx_stopped(port) || uart_circ_empty(xmit)) { | ||
157 | netx_stop_tx(port); | ||
158 | return; | ||
159 | } | ||
160 | |||
161 | do { | ||
162 | /* send xmit->buf[xmit->tail] | ||
163 | * out the port here */ | ||
164 | writel(xmit->buf[xmit->tail], port->membase + UART_DR); | ||
165 | xmit->tail = (xmit->tail + 1) & | ||
166 | (UART_XMIT_SIZE - 1); | ||
167 | port->icount.tx++; | ||
168 | if (uart_circ_empty(xmit)) | ||
169 | break; | ||
170 | } while (!(readl(port->membase + UART_FR) & FR_TXFF)); | ||
171 | |||
172 | if (uart_circ_empty(xmit)) | ||
173 | netx_stop_tx(port); | ||
174 | } | ||
175 | |||
176 | static void netx_start_tx(struct uart_port *port) | ||
177 | { | ||
178 | writel( | ||
179 | readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR); | ||
180 | |||
181 | if (!(readl(port->membase + UART_FR) & FR_TXFF)) | ||
182 | netx_transmit_buffer(port); | ||
183 | } | ||
184 | |||
185 | static unsigned int netx_tx_empty(struct uart_port *port) | ||
186 | { | ||
187 | return readl(port->membase + UART_FR) & FR_BUSY ? 0 : TIOCSER_TEMT; | ||
188 | } | ||
189 | |||
190 | static void netx_txint(struct uart_port *port) | ||
191 | { | ||
192 | struct circ_buf *xmit = &port->info->xmit; | ||
193 | |||
194 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | ||
195 | netx_stop_tx(port); | ||
196 | return; | ||
197 | } | ||
198 | |||
199 | netx_transmit_buffer(port); | ||
200 | |||
201 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
202 | uart_write_wakeup(port); | ||
203 | } | ||
204 | |||
205 | static void netx_rxint(struct uart_port *port, struct pt_regs *regs) | ||
206 | { | ||
207 | unsigned char rx, flg, status; | ||
208 | struct tty_struct *tty = port->info->tty; | ||
209 | |||
210 | while (!(readl(port->membase + UART_FR) & FR_RXFE)) { | ||
211 | rx = readl(port->membase + UART_DR); | ||
212 | flg = TTY_NORMAL; | ||
213 | port->icount.rx++; | ||
214 | status = readl(port->membase + UART_SR); | ||
215 | if (status & SR_BE) { | ||
216 | writel(0, port->membase + UART_SR); | ||
217 | if (uart_handle_break(port)) | ||
218 | continue; | ||
219 | } | ||
220 | |||
221 | if (unlikely(status & (SR_FE | SR_PE | SR_OE))) { | ||
222 | |||
223 | if (status & SR_PE) | ||
224 | port->icount.parity++; | ||
225 | else if (status & SR_FE) | ||
226 | port->icount.frame++; | ||
227 | if (status & SR_OE) | ||
228 | port->icount.overrun++; | ||
229 | |||
230 | status &= port->read_status_mask; | ||
231 | |||
232 | if (status & SR_BE) | ||
233 | flg = TTY_BREAK; | ||
234 | else if (status & SR_PE) | ||
235 | flg = TTY_PARITY; | ||
236 | else if (status & SR_FE) | ||
237 | flg = TTY_FRAME; | ||
238 | } | ||
239 | |||
240 | if (uart_handle_sysrq_char(port, rx, regs)) | ||
241 | continue; | ||
242 | |||
243 | uart_insert_char(port, status, SR_OE, rx, flg); | ||
244 | } | ||
245 | |||
246 | tty_flip_buffer_push(tty); | ||
247 | return; | ||
248 | } | ||
249 | |||
250 | static irqreturn_t netx_int(int irq, void *dev_id, struct pt_regs *regs) | ||
251 | { | ||
252 | struct uart_port *port = (struct uart_port *)dev_id; | ||
253 | unsigned long flags; | ||
254 | unsigned char status; | ||
255 | |||
256 | spin_lock_irqsave(&port->lock,flags); | ||
257 | |||
258 | status = readl(port->membase + UART_IIR) & IIR_MASK; | ||
259 | while (status) { | ||
260 | if (status & IIR_RIS) | ||
261 | netx_rxint(port, regs); | ||
262 | if (status & IIR_TIS) | ||
263 | netx_txint(port); | ||
264 | if (status & IIR_MIS) { | ||
265 | if (readl(port->membase + UART_FR) & FR_CTS) | ||
266 | uart_handle_cts_change(port, 1); | ||
267 | else | ||
268 | uart_handle_cts_change(port, 0); | ||
269 | } | ||
270 | writel(0, port->membase + UART_IIR); | ||
271 | status = readl(port->membase + UART_IIR) & IIR_MASK; | ||
272 | } | ||
273 | |||
274 | spin_unlock_irqrestore(&port->lock,flags); | ||
275 | return IRQ_HANDLED; | ||
276 | } | ||
277 | |||
278 | static unsigned int netx_get_mctrl(struct uart_port *port) | ||
279 | { | ||
280 | unsigned int ret = TIOCM_DSR | TIOCM_CAR; | ||
281 | |||
282 | if (readl(port->membase + UART_FR) & FR_CTS) | ||
283 | ret |= TIOCM_CTS; | ||
284 | |||
285 | return ret; | ||
286 | } | ||
287 | |||
288 | static void netx_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
289 | { | ||
290 | unsigned int val; | ||
291 | |||
292 | if (mctrl & TIOCM_RTS) { | ||
293 | val = readl(port->membase + UART_RTS_CR); | ||
294 | writel(val | RTS_CR_RTS, port->membase + UART_RTS_CR); | ||
295 | } | ||
296 | } | ||
297 | |||
298 | static void netx_break_ctl(struct uart_port *port, int break_state) | ||
299 | { | ||
300 | unsigned int line_cr; | ||
301 | spin_lock_irq(&port->lock); | ||
302 | |||
303 | line_cr = readl(port->membase + UART_LINE_CR); | ||
304 | if (break_state != 0) | ||
305 | line_cr |= LINE_CR_BRK; | ||
306 | else | ||
307 | line_cr &= ~LINE_CR_BRK; | ||
308 | writel(line_cr, port->membase + UART_LINE_CR); | ||
309 | |||
310 | spin_unlock_irq(&port->lock); | ||
311 | } | ||
312 | |||
313 | static int netx_startup(struct uart_port *port) | ||
314 | { | ||
315 | int ret; | ||
316 | |||
317 | ret = request_irq(port->irq, netx_int, 0, | ||
318 | DRIVER_NAME, port); | ||
319 | if (ret) { | ||
320 | dev_err(port->dev, "unable to grab irq%d\n",port->irq); | ||
321 | goto exit; | ||
322 | } | ||
323 | |||
324 | writel(readl(port->membase + UART_LINE_CR) | LINE_CR_FEN, | ||
325 | port->membase + UART_LINE_CR); | ||
326 | |||
327 | writel(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE | CR_UART_EN, | ||
328 | port->membase + UART_CR); | ||
329 | |||
330 | exit: | ||
331 | return ret; | ||
332 | } | ||
333 | |||
334 | static void netx_shutdown(struct uart_port *port) | ||
335 | { | ||
336 | writel(0, port->membase + UART_CR) ; | ||
337 | |||
338 | free_irq(port->irq, port); | ||
339 | } | ||
340 | |||
341 | static void | ||
342 | netx_set_termios(struct uart_port *port, struct termios *termios, | ||
343 | struct termios *old) | ||
344 | { | ||
345 | unsigned int baud, quot; | ||
346 | unsigned char old_cr; | ||
347 | unsigned char line_cr = LINE_CR_FEN; | ||
348 | unsigned char rts_cr = 0; | ||
349 | |||
350 | switch (termios->c_cflag & CSIZE) { | ||
351 | case CS5: | ||
352 | line_cr |= LINE_CR_5BIT; | ||
353 | break; | ||
354 | case CS6: | ||
355 | line_cr |= LINE_CR_6BIT; | ||
356 | break; | ||
357 | case CS7: | ||
358 | line_cr |= LINE_CR_7BIT; | ||
359 | break; | ||
360 | case CS8: | ||
361 | line_cr |= LINE_CR_8BIT; | ||
362 | break; | ||
363 | } | ||
364 | |||
365 | if (termios->c_cflag & CSTOPB) | ||
366 | line_cr |= LINE_CR_STP2; | ||
367 | |||
368 | if (termios->c_cflag & PARENB) { | ||
369 | line_cr |= LINE_CR_PEN; | ||
370 | if (!(termios->c_cflag & PARODD)) | ||
371 | line_cr |= LINE_CR_EPS; | ||
372 | } | ||
373 | |||
374 | if (termios->c_cflag & CRTSCTS) | ||
375 | rts_cr = RTS_CR_AUTO | RTS_CR_CTS_CTR | RTS_CR_RTS_POL; | ||
376 | |||
377 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | ||
378 | quot = baud * 4096; | ||
379 | quot /= 1000; | ||
380 | quot *= 256; | ||
381 | quot /= 100000; | ||
382 | |||
383 | spin_lock_irq(&port->lock); | ||
384 | |||
385 | uart_update_timeout(port, termios->c_cflag, baud); | ||
386 | |||
387 | old_cr = readl(port->membase + UART_CR); | ||
388 | |||
389 | /* disable interrupts */ | ||
390 | writel(old_cr & ~(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE), | ||
391 | port->membase + UART_CR); | ||
392 | |||
393 | /* drain transmitter */ | ||
394 | while (readl(port->membase + UART_FR) & FR_BUSY); | ||
395 | |||
396 | /* disable UART */ | ||
397 | writel(old_cr & ~CR_UART_EN, port->membase + UART_CR); | ||
398 | |||
399 | /* modem status interrupts */ | ||
400 | old_cr &= ~CR_MSIE; | ||
401 | if (UART_ENABLE_MS(port, termios->c_cflag)) | ||
402 | old_cr |= CR_MSIE; | ||
403 | |||
404 | writel((quot>>8) & 0xff, port->membase + UART_BAUDDIV_MSB); | ||
405 | writel(quot & 0xff, port->membase + UART_BAUDDIV_LSB); | ||
406 | writel(line_cr, port->membase + UART_LINE_CR); | ||
407 | |||
408 | writel(rts_cr, port->membase + UART_RTS_CR); | ||
409 | |||
410 | /* | ||
411 | * Characters to ignore | ||
412 | */ | ||
413 | port->ignore_status_mask = 0; | ||
414 | if (termios->c_iflag & IGNPAR) | ||
415 | port->ignore_status_mask |= SR_PE; | ||
416 | if (termios->c_iflag & IGNBRK) { | ||
417 | port->ignore_status_mask |= SR_BE; | ||
418 | /* | ||
419 | * If we're ignoring parity and break indicators, | ||
420 | * ignore overruns too (for real raw support). | ||
421 | */ | ||
422 | if (termios->c_iflag & IGNPAR) | ||
423 | port->ignore_status_mask |= SR_PE; | ||
424 | } | ||
425 | |||
426 | port->read_status_mask = 0; | ||
427 | if (termios->c_iflag & (BRKINT | PARMRK)) | ||
428 | port->read_status_mask |= SR_BE; | ||
429 | if (termios->c_iflag & INPCK) | ||
430 | port->read_status_mask |= SR_PE | SR_FE; | ||
431 | |||
432 | writel(old_cr, port->membase + UART_CR); | ||
433 | |||
434 | spin_unlock_irq(&port->lock); | ||
435 | } | ||
436 | |||
437 | static const char *netx_type(struct uart_port *port) | ||
438 | { | ||
439 | return port->type == PORT_NETX ? "NETX" : NULL; | ||
440 | } | ||
441 | |||
442 | static void netx_release_port(struct uart_port *port) | ||
443 | { | ||
444 | release_mem_region(port->mapbase, UART_PORT_SIZE); | ||
445 | } | ||
446 | |||
447 | static int netx_request_port(struct uart_port *port) | ||
448 | { | ||
449 | return request_mem_region(port->mapbase, UART_PORT_SIZE, | ||
450 | DRIVER_NAME) != NULL ? 0 : -EBUSY; | ||
451 | } | ||
452 | |||
453 | static void netx_config_port(struct uart_port *port, int flags) | ||
454 | { | ||
455 | if (flags & UART_CONFIG_TYPE && netx_request_port(port) == 0) | ||
456 | port->type = PORT_NETX; | ||
457 | } | ||
458 | |||
459 | static int | ||
460 | netx_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
461 | { | ||
462 | int ret = 0; | ||
463 | |||
464 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_NETX) | ||
465 | ret = -EINVAL; | ||
466 | |||
467 | return ret; | ||
468 | } | ||
469 | |||
470 | static struct uart_ops netx_pops = { | ||
471 | .tx_empty = netx_tx_empty, | ||
472 | .set_mctrl = netx_set_mctrl, | ||
473 | .get_mctrl = netx_get_mctrl, | ||
474 | .stop_tx = netx_stop_tx, | ||
475 | .start_tx = netx_start_tx, | ||
476 | .stop_rx = netx_stop_rx, | ||
477 | .enable_ms = netx_enable_ms, | ||
478 | .break_ctl = netx_break_ctl, | ||
479 | .startup = netx_startup, | ||
480 | .shutdown = netx_shutdown, | ||
481 | .set_termios = netx_set_termios, | ||
482 | .type = netx_type, | ||
483 | .release_port = netx_release_port, | ||
484 | .request_port = netx_request_port, | ||
485 | .config_port = netx_config_port, | ||
486 | .verify_port = netx_verify_port, | ||
487 | }; | ||
488 | |||
489 | static struct netx_port netx_ports[] = { | ||
490 | { | ||
491 | .port = { | ||
492 | .type = PORT_NETX, | ||
493 | .iotype = UPIO_MEM, | ||
494 | .membase = (char __iomem *)io_p2v(NETX_PA_UART0), | ||
495 | .mapbase = NETX_PA_UART0, | ||
496 | .irq = NETX_IRQ_UART0, | ||
497 | .uartclk = 100000000, | ||
498 | .fifosize = 16, | ||
499 | .flags = UPF_BOOT_AUTOCONF, | ||
500 | .ops = &netx_pops, | ||
501 | .line = 0, | ||
502 | }, | ||
503 | }, { | ||
504 | .port = { | ||
505 | .type = PORT_NETX, | ||
506 | .iotype = UPIO_MEM, | ||
507 | .membase = (char __iomem *)io_p2v(NETX_PA_UART1), | ||
508 | .mapbase = NETX_PA_UART1, | ||
509 | .irq = NETX_IRQ_UART1, | ||
510 | .uartclk = 100000000, | ||
511 | .fifosize = 16, | ||
512 | .flags = UPF_BOOT_AUTOCONF, | ||
513 | .ops = &netx_pops, | ||
514 | .line = 1, | ||
515 | }, | ||
516 | }, { | ||
517 | .port = { | ||
518 | .type = PORT_NETX, | ||
519 | .iotype = UPIO_MEM, | ||
520 | .membase = (char __iomem *)io_p2v(NETX_PA_UART2), | ||
521 | .mapbase = NETX_PA_UART2, | ||
522 | .irq = NETX_IRQ_UART2, | ||
523 | .uartclk = 100000000, | ||
524 | .fifosize = 16, | ||
525 | .flags = UPF_BOOT_AUTOCONF, | ||
526 | .ops = &netx_pops, | ||
527 | .line = 2, | ||
528 | }, | ||
529 | } | ||
530 | }; | ||
531 | |||
532 | static void netx_console_putchar(struct uart_port *port, int ch) | ||
533 | { | ||
534 | while (readl(port->membase + UART_FR) & FR_BUSY); | ||
535 | writel(ch, port->membase + UART_DR); | ||
536 | } | ||
537 | |||
538 | static void | ||
539 | netx_console_write(struct console *co, const char *s, unsigned int count) | ||
540 | { | ||
541 | struct uart_port *port = &netx_ports[co->index].port; | ||
542 | unsigned char cr_save; | ||
543 | |||
544 | cr_save = readl(port->membase + UART_CR); | ||
545 | writel(cr_save | CR_UART_EN, port->membase + UART_CR); | ||
546 | |||
547 | uart_console_write(port, s, count, netx_console_putchar); | ||
548 | |||
549 | while (readl(port->membase + UART_FR) & FR_BUSY); | ||
550 | writel(cr_save, port->membase + UART_CR); | ||
551 | } | ||
552 | |||
553 | static void __init | ||
554 | netx_console_get_options(struct uart_port *port, int *baud, | ||
555 | int *parity, int *bits, int *flow) | ||
556 | { | ||
557 | unsigned char line_cr; | ||
558 | |||
559 | *baud = (readl(port->membase + UART_BAUDDIV_MSB) << 8) | | ||
560 | readl(port->membase + UART_BAUDDIV_LSB); | ||
561 | *baud *= 1000; | ||
562 | *baud /= 4096; | ||
563 | *baud *= 1000; | ||
564 | *baud /= 256; | ||
565 | *baud *= 100; | ||
566 | |||
567 | line_cr = readl(port->membase + UART_LINE_CR); | ||
568 | *parity = 'n'; | ||
569 | if (line_cr & LINE_CR_PEN) { | ||
570 | if (line_cr & LINE_CR_EPS) | ||
571 | *parity = 'e'; | ||
572 | else | ||
573 | *parity = 'o'; | ||
574 | } | ||
575 | |||
576 | switch (line_cr & LINE_CR_BITS_MASK) { | ||
577 | case LINE_CR_8BIT: | ||
578 | *bits = 8; | ||
579 | break; | ||
580 | case LINE_CR_7BIT: | ||
581 | *bits = 7; | ||
582 | break; | ||
583 | case LINE_CR_6BIT: | ||
584 | *bits = 6; | ||
585 | break; | ||
586 | case LINE_CR_5BIT: | ||
587 | *bits = 5; | ||
588 | break; | ||
589 | } | ||
590 | |||
591 | if (readl(port->membase + UART_RTS_CR) & RTS_CR_AUTO) | ||
592 | *flow = 'r'; | ||
593 | } | ||
594 | |||
595 | static int __init | ||
596 | netx_console_setup(struct console *co, char *options) | ||
597 | { | ||
598 | struct netx_port *sport; | ||
599 | int baud = 9600; | ||
600 | int bits = 8; | ||
601 | int parity = 'n'; | ||
602 | int flow = 'n'; | ||
603 | |||
604 | /* | ||
605 | * Check whether an invalid uart number has been specified, and | ||
606 | * if so, search for the first available port that does have | ||
607 | * console support. | ||
608 | */ | ||
609 | if (co->index == -1 || co->index >= ARRAY_SIZE(netx_ports)) | ||
610 | co->index = 0; | ||
611 | sport = &netx_ports[co->index]; | ||
612 | |||
613 | if (options) { | ||
614 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
615 | } else { | ||
616 | /* if the UART is enabled, assume it has been correctly setup | ||
617 | * by the bootloader and get the options | ||
618 | */ | ||
619 | if (readl(sport->port.membase + UART_CR) & CR_UART_EN) { | ||
620 | netx_console_get_options(&sport->port, &baud, | ||
621 | &parity, &bits, &flow); | ||
622 | } | ||
623 | |||
624 | } | ||
625 | |||
626 | return uart_set_options(&sport->port, co, baud, parity, bits, flow); | ||
627 | } | ||
628 | |||
629 | static struct uart_driver netx_reg; | ||
630 | static struct console netx_console = { | ||
631 | .name = "ttyNX", | ||
632 | .write = netx_console_write, | ||
633 | .device = uart_console_device, | ||
634 | .setup = netx_console_setup, | ||
635 | .flags = CON_PRINTBUFFER, | ||
636 | .index = -1, | ||
637 | .data = &netx_reg, | ||
638 | }; | ||
639 | |||
640 | static int __init netx_console_init(void) | ||
641 | { | ||
642 | register_console(&netx_console); | ||
643 | return 0; | ||
644 | } | ||
645 | console_initcall(netx_console_init); | ||
646 | |||
647 | #define NETX_CONSOLE &netx_console | ||
648 | #else | ||
649 | #define NETX_CONSOLE NULL | ||
650 | #endif | ||
651 | |||
652 | static struct uart_driver netx_reg = { | ||
653 | .owner = THIS_MODULE, | ||
654 | .driver_name = DRIVER_NAME, | ||
655 | .dev_name = "ttyNX", | ||
656 | .major = SERIAL_NX_MAJOR, | ||
657 | .minor = MINOR_START, | ||
658 | .nr = ARRAY_SIZE(netx_ports), | ||
659 | .cons = NETX_CONSOLE, | ||
660 | }; | ||
661 | |||
662 | static int serial_netx_suspend(struct platform_device *pdev, pm_message_t state) | ||
663 | { | ||
664 | struct netx_port *sport = platform_get_drvdata(pdev); | ||
665 | |||
666 | if (sport) | ||
667 | uart_suspend_port(&netx_reg, &sport->port); | ||
668 | |||
669 | return 0; | ||
670 | } | ||
671 | |||
672 | static int serial_netx_resume(struct platform_device *pdev) | ||
673 | { | ||
674 | struct netx_port *sport = platform_get_drvdata(pdev); | ||
675 | |||
676 | if (sport) | ||
677 | uart_resume_port(&netx_reg, &sport->port); | ||
678 | |||
679 | return 0; | ||
680 | } | ||
681 | |||
682 | static int serial_netx_probe(struct platform_device *pdev) | ||
683 | { | ||
684 | struct uart_port *port = &netx_ports[pdev->id].port; | ||
685 | |||
686 | dev_info(&pdev->dev, "initialising\n"); | ||
687 | |||
688 | port->dev = &pdev->dev; | ||
689 | |||
690 | writel(1, port->membase + UART_RXFIFO_IRQLEVEL); | ||
691 | uart_add_one_port(&netx_reg, &netx_ports[pdev->id].port); | ||
692 | platform_set_drvdata(pdev, &netx_ports[pdev->id]); | ||
693 | |||
694 | return 0; | ||
695 | } | ||
696 | |||
697 | static int serial_netx_remove(struct platform_device *pdev) | ||
698 | { | ||
699 | struct netx_port *sport = platform_get_drvdata(pdev); | ||
700 | |||
701 | platform_set_drvdata(pdev, NULL); | ||
702 | |||
703 | if (sport) | ||
704 | uart_remove_one_port(&netx_reg, &sport->port); | ||
705 | |||
706 | return 0; | ||
707 | } | ||
708 | |||
709 | static struct platform_driver serial_netx_driver = { | ||
710 | .probe = serial_netx_probe, | ||
711 | .remove = serial_netx_remove, | ||
712 | |||
713 | .suspend = serial_netx_suspend, | ||
714 | .resume = serial_netx_resume, | ||
715 | |||
716 | .driver = { | ||
717 | .name = DRIVER_NAME, | ||
718 | }, | ||
719 | }; | ||
720 | |||
721 | static int __init netx_serial_init(void) | ||
722 | { | ||
723 | int ret; | ||
724 | |||
725 | printk(KERN_INFO "Serial: NetX driver\n"); | ||
726 | |||
727 | ret = uart_register_driver(&netx_reg); | ||
728 | if (ret) | ||
729 | return ret; | ||
730 | |||
731 | ret = platform_driver_register(&serial_netx_driver); | ||
732 | if (ret != 0) | ||
733 | uart_unregister_driver(&netx_reg); | ||
734 | |||
735 | return 0; | ||
736 | } | ||
737 | |||
738 | static void __exit netx_serial_exit(void) | ||
739 | { | ||
740 | platform_driver_unregister(&serial_netx_driver); | ||
741 | uart_unregister_driver(&netx_reg); | ||
742 | } | ||
743 | |||
744 | module_init(netx_serial_init); | ||
745 | module_exit(netx_serial_exit); | ||
746 | |||
747 | MODULE_AUTHOR("Sascha Hauer"); | ||
748 | MODULE_DESCRIPTION("NetX serial port driver"); | ||
749 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index 77d4568ccc3a..ae3649568541 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c | |||
@@ -269,7 +269,6 @@ static unsigned int serial_pxa_get_mctrl(struct uart_port *port) | |||
269 | unsigned char status; | 269 | unsigned char status; |
270 | unsigned int ret; | 270 | unsigned int ret; |
271 | 271 | ||
272 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
273 | status = serial_in(up, UART_MSR); | 272 | status = serial_in(up, UART_MSR); |
274 | 273 | ||
275 | ret = 0; | 274 | ret = 0; |
diff --git a/include/asm-arm/arch-imx/imx-dma.h b/include/asm-arm/arch-imx/imx-dma.h index f2063c1d610d..599f03e5a9ef 100644 --- a/include/asm-arm/arch-imx/imx-dma.h +++ b/include/asm-arm/arch-imx/imx-dma.h | |||
@@ -46,7 +46,7 @@ | |||
46 | struct imx_dma_channel { | 46 | struct imx_dma_channel { |
47 | const char *name; | 47 | const char *name; |
48 | void (*irq_handler) (int, void *, struct pt_regs *); | 48 | void (*irq_handler) (int, void *, struct pt_regs *); |
49 | void (*err_handler) (int, void *, struct pt_regs *); | 49 | void (*err_handler) (int, void *, struct pt_regs *, int errcode); |
50 | void *data; | 50 | void *data; |
51 | dmamode_t dma_mode; | 51 | dmamode_t dma_mode; |
52 | struct scatterlist *sg; | 52 | struct scatterlist *sg; |
@@ -58,6 +58,10 @@ struct imx_dma_channel { | |||
58 | 58 | ||
59 | extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; | 59 | extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; |
60 | 60 | ||
61 | #define IMX_DMA_ERR_BURST 1 | ||
62 | #define IMX_DMA_ERR_REQUEST 2 | ||
63 | #define IMX_DMA_ERR_TRANSFER 4 | ||
64 | #define IMX_DMA_ERR_BUFFER 8 | ||
61 | 65 | ||
62 | /* The type to distinguish channel numbers parameter from ordinal int type */ | 66 | /* The type to distinguish channel numbers parameter from ordinal int type */ |
63 | typedef int imx_dmach_t; | 67 | typedef int imx_dmach_t; |
@@ -74,7 +78,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch, | |||
74 | int | 78 | int |
75 | imx_dma_setup_handlers(imx_dmach_t dma_ch, | 79 | imx_dma_setup_handlers(imx_dmach_t dma_ch, |
76 | void (*irq_handler) (int, void *, struct pt_regs *), | 80 | void (*irq_handler) (int, void *, struct pt_regs *), |
77 | void (*err_handler) (int, void *, struct pt_regs *), void *data); | 81 | void (*err_handler) (int, void *, struct pt_regs *, int), void *data); |
78 | 82 | ||
79 | void imx_dma_enable(imx_dmach_t dma_ch); | 83 | void imx_dma_enable(imx_dmach_t dma_ch); |
80 | 84 | ||
diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h index 01efdbd1180f..d0a72201ee96 100644 --- a/include/asm-arm/arch-ixp23xx/ixp23xx.h +++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h | |||
@@ -124,6 +124,7 @@ | |||
124 | 124 | ||
125 | #define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) | 125 | #define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) |
126 | #define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) | 126 | #define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) |
127 | #define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34) | ||
127 | 128 | ||
128 | #define IXP23XX_EXP_BUS_PHYS 0x90000000 | 129 | #define IXP23XX_EXP_BUS_PHYS 0x90000000 |
129 | #define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 | 130 | #define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 |
@@ -265,6 +266,8 @@ | |||
265 | #define IXP23XX_PCI_UNIT_RESET (1 << 1) | 266 | #define IXP23XX_PCI_UNIT_RESET (1 << 1) |
266 | #define IXP23XX_XSCALE_RESET (1 << 0) | 267 | #define IXP23XX_XSCALE_RESET (1 << 0) |
267 | 268 | ||
269 | #define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000) | ||
270 | |||
268 | 271 | ||
269 | /**************************************************************************** | 272 | /**************************************************************************** |
270 | * PCI CSRs. | 273 | * PCI CSRs. |
diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h index e4d99060a049..19a73b39c864 100644 --- a/include/asm-arm/arch-ixp23xx/platform.h +++ b/include/asm-arm/arch-ixp23xx/platform.h | |||
@@ -14,6 +14,21 @@ | |||
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
16 | 16 | ||
17 | extern inline unsigned long ixp2000_reg_read(volatile void *reg) | ||
18 | { | ||
19 | return *((volatile unsigned long *)reg); | ||
20 | } | ||
21 | |||
22 | extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val) | ||
23 | { | ||
24 | *((volatile unsigned long *)reg) = val; | ||
25 | } | ||
26 | |||
27 | extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) | ||
28 | { | ||
29 | *((volatile unsigned long *)reg) = val; | ||
30 | } | ||
31 | |||
17 | struct pci_sys_data; | 32 | struct pci_sys_data; |
18 | 33 | ||
19 | void ixp23xx_map_io(void); | 34 | void ixp23xx_map_io(void); |
diff --git a/include/asm-arm/arch-pnx4008/debug-macro.S b/include/asm-arm/arch-pnx4008/debug-macro.S index eb3839de389a..67d18a203d23 100644 --- a/include/asm-arm/arch-pnx4008/debug-macro.S +++ b/include/asm-arm/arch-pnx4008/debug-macro.S | |||
@@ -19,9 +19,5 @@ | |||
19 | addne \rx, \rx, #0xf4000000 | 19 | addne \rx, \rx, #0xf4000000 |
20 | .endm | 20 | .endm |
21 | 21 | ||
22 | .macro senduart,rd,rx | ||
23 | strb \rd, [\rx, #0x0] | ||
24 | .endm | ||
25 | |||
26 | #define UART_SHIFT 2 | 22 | #define UART_SHIFT 2 |
27 | #include <asm/hardware/debug-8250.S> | 23 | #include <asm/hardware/debug-8250.S> |
diff --git a/include/asm-arm/arch-pnx4008/gpio.h b/include/asm-arm/arch-pnx4008/gpio.h index 1fa5a77c3010..d01bf83d55c2 100644 --- a/include/asm-arm/arch-pnx4008/gpio.h +++ b/include/asm-arm/arch-pnx4008/gpio.h | |||
@@ -127,6 +127,79 @@ | |||
127 | #define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK)) | 127 | #define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK)) |
128 | #define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK)) | 128 | #define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK)) |
129 | 129 | ||
130 | /* Start Enable Pin Interrupts - table 58 page 66 */ | ||
131 | |||
132 | #define SE_PIN_BASE_INT 32 | ||
133 | |||
134 | #define SE_U7_RX_INT 63 | ||
135 | #define SE_U7_HCTS_INT 62 | ||
136 | #define SE_BT_CLKREQ_INT 61 | ||
137 | #define SE_U6_IRRX_INT 60 | ||
138 | /*59 unused*/ | ||
139 | #define SE_U5_RX_INT 58 | ||
140 | #define SE_GPI_11_INT 57 | ||
141 | #define SE_U3_RX_INT 56 | ||
142 | #define SE_U2_HCTS_INT 55 | ||
143 | #define SE_U2_RX_INT 54 | ||
144 | #define SE_U1_RX_INT 53 | ||
145 | #define SE_DISP_SYNC_INT 52 | ||
146 | /*51 unused*/ | ||
147 | #define SE_SDIO_INT_N 50 | ||
148 | #define SE_MSDIO_START_INT 49 | ||
149 | #define SE_GPI_06_INT 48 | ||
150 | #define SE_GPI_05_INT 47 | ||
151 | #define SE_GPI_04_INT 46 | ||
152 | #define SE_GPI_03_INT 45 | ||
153 | #define SE_GPI_02_INT 44 | ||
154 | #define SE_GPI_01_INT 43 | ||
155 | #define SE_GPI_00_INT 42 | ||
156 | #define SE_SYSCLKEN_PIN_INT 41 | ||
157 | #define SE_SPI1_DATAIN_INT 40 | ||
158 | #define SE_GPI_07_INT 39 | ||
159 | #define SE_SPI2_DATAIN_INT 38 | ||
160 | #define SE_GPI_10_INT 37 | ||
161 | #define SE_GPI_09_INT 36 | ||
162 | #define SE_GPI_08_INT 35 | ||
163 | /*34-32 unused*/ | ||
164 | |||
165 | /* Start Enable Internal Interrupts - table 57 page 65 */ | ||
166 | |||
167 | #define SE_INT_BASE_INT 0 | ||
168 | |||
169 | #define SE_TS_IRQ 31 | ||
170 | #define SE_TS_P_INT 30 | ||
171 | #define SE_TS_AUX_INT 29 | ||
172 | /*27-28 unused*/ | ||
173 | #define SE_USB_AHB_NEED_CLK_INT 26 | ||
174 | #define SE_MSTIMER_INT 25 | ||
175 | #define SE_RTC_INT 24 | ||
176 | #define SE_USB_NEED_CLK_INT 23 | ||
177 | #define SE_USB_INT 22 | ||
178 | #define SE_USB_I2C_INT 21 | ||
179 | #define SE_USB_OTG_TIMER_INT 20 | ||
180 | #define SE_USB_OTG_ATX_INT_N 19 | ||
181 | /*18 unused*/ | ||
182 | #define SE_DSP_GPIO4_INT 17 | ||
183 | #define SE_KEY_IRQ 16 | ||
184 | #define SE_DSP_SLAVEPORT_INT 15 | ||
185 | #define SE_DSP_GPIO1_INT 14 | ||
186 | #define SE_DSP_GPIO0_INT 13 | ||
187 | #define SE_DSP_AHB_INT 12 | ||
188 | /*11-6 unused*/ | ||
189 | #define SE_GPIO_05_INT 5 | ||
190 | #define SE_GPIO_04_INT 4 | ||
191 | #define SE_GPIO_03_INT 3 | ||
192 | #define SE_GPIO_02_INT 2 | ||
193 | #define SE_GPIO_01_INT 1 | ||
194 | #define SE_GPIO_00_INT 0 | ||
195 | |||
196 | #define START_INT_REG_BIT(irq) (1<<((irq)&0x1F)) | ||
197 | |||
198 | #define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1))) | ||
199 | #define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1))) | ||
200 | #define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1))) | ||
201 | #define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1))) | ||
202 | |||
130 | extern int pnx4008_gpio_register_pin(unsigned short pin); | 203 | extern int pnx4008_gpio_register_pin(unsigned short pin); |
131 | extern int pnx4008_gpio_unregister_pin(unsigned short pin); | 204 | extern int pnx4008_gpio_unregister_pin(unsigned short pin); |
132 | extern unsigned long pnx4008_gpio_read_pin(unsigned short pin); | 205 | extern unsigned long pnx4008_gpio_read_pin(unsigned short pin); |
@@ -136,4 +209,33 @@ extern int pnx4008_gpio_read_pin_direction(unsigned short pin); | |||
136 | extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output); | 209 | extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output); |
137 | extern int pnx4008_gpio_read_pin_mux(unsigned short pin); | 210 | extern int pnx4008_gpio_read_pin_mux(unsigned short pin); |
138 | 211 | ||
212 | static inline void start_int_umask(u8 irq) | ||
213 | { | ||
214 | __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | | ||
215 | START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); | ||
216 | } | ||
217 | |||
218 | static inline void start_int_mask(u8 irq) | ||
219 | { | ||
220 | __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & | ||
221 | ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); | ||
222 | } | ||
223 | |||
224 | static inline void start_int_ack(u8 irq) | ||
225 | { | ||
226 | __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); | ||
227 | } | ||
228 | |||
229 | static inline void start_int_set_falling_edge(u8 irq) | ||
230 | { | ||
231 | __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & | ||
232 | ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); | ||
233 | } | ||
234 | |||
235 | static inline void start_int_set_rising_edge(u8 irq) | ||
236 | { | ||
237 | __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | | ||
238 | START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); | ||
239 | } | ||
240 | |||
139 | #endif /* _PNX4008_GPIO_H_ */ | 241 | #endif /* _PNX4008_GPIO_H_ */ |
diff --git a/include/asm-arm/arch-pnx4008/pm.h b/include/asm-arm/arch-pnx4008/pm.h index c660486670fb..bac1634cb3e0 100644 --- a/include/asm-arm/arch-pnx4008/pm.h +++ b/include/asm-arm/arch-pnx4008/pm.h | |||
@@ -29,34 +29,5 @@ extern void pnx4008_cpu_standby(void); | |||
29 | extern int pnx4008_startup_pll(struct clk *); | 29 | extern int pnx4008_startup_pll(struct clk *); |
30 | extern int pnx4008_shutdown_pll(struct clk *); | 30 | extern int pnx4008_shutdown_pll(struct clk *); |
31 | 31 | ||
32 | static inline void start_int_umask(u8 irq) | ||
33 | { | ||
34 | __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | | ||
35 | START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); | ||
36 | } | ||
37 | |||
38 | static inline void start_int_mask(u8 irq) | ||
39 | { | ||
40 | __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & | ||
41 | ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); | ||
42 | } | ||
43 | |||
44 | static inline void start_int_ack(u8 irq) | ||
45 | { | ||
46 | __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); | ||
47 | } | ||
48 | |||
49 | static inline void start_int_set_falling_edge(u8 irq) | ||
50 | { | ||
51 | __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & | ||
52 | ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); | ||
53 | } | ||
54 | |||
55 | static inline void start_int_set_rising_edge(u8 irq) | ||
56 | { | ||
57 | __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | | ||
58 | START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); | ||
59 | } | ||
60 | |||
61 | #endif /* ASSEMBLER */ | 32 | #endif /* ASSEMBLER */ |
62 | #endif /* __ASM_ARCH_PNX4008_PM_H */ | 33 | #endif /* __ASM_ARCH_PNX4008_PM_H */ |
diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h index a023b0434efe..ba13a2c9e547 100644 --- a/include/asm-arm/arch-s3c2410/regs-dsc.h +++ b/include/asm-arm/arch-s3c2410/regs-dsc.h | |||
@@ -170,7 +170,7 @@ | |||
170 | #define S3C2440_DSC1_CS1_4mA (3<<2) | 170 | #define S3C2440_DSC1_CS1_4mA (3<<2) |
171 | #define S3C2440_DSC1_CS1_MASK (3<<2) | 171 | #define S3C2440_DSC1_CS1_MASK (3<<2) |
172 | 172 | ||
173 | #define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0 | 173 | #define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0) |
174 | #define S3C2440_DSC1_CS0_10mA (0<<0) | 174 | #define S3C2440_DSC1_CS0_10mA (0<<0) |
175 | #define S3C2440_DSC1_CS0_8mA (1<<0) | 175 | #define S3C2440_DSC1_CS0_8mA (1<<0) |
176 | #define S3C2440_DSC1_CS0_6mA (2<<0) | 176 | #define S3C2440_DSC1_CS0_6mA (2<<0) |
diff --git a/include/asm-arm/thread_notify.h b/include/asm-arm/thread_notify.h new file mode 100644 index 000000000000..8866e5216840 --- /dev/null +++ b/include/asm-arm/thread_notify.h | |||
@@ -0,0 +1,48 @@ | |||
1 | /* | ||
2 | * linux/include/asm-arm/thread_notify.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef ASMARM_THREAD_NOTIFY_H | ||
11 | #define ASMARM_THREAD_NOTIFY_H | ||
12 | |||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | #include <linux/notifier.h> | ||
18 | #include <asm/thread_info.h> | ||
19 | |||
20 | static inline int thread_register_notifier(struct notifier_block *n) | ||
21 | { | ||
22 | extern struct atomic_notifier_head thread_notify_head; | ||
23 | return atomic_notifier_chain_register(&thread_notify_head, n); | ||
24 | } | ||
25 | |||
26 | static inline void thread_unregister_notifier(struct notifier_block *n) | ||
27 | { | ||
28 | extern struct atomic_notifier_head thread_notify_head; | ||
29 | atomic_notifier_chain_unregister(&thread_notify_head, n); | ||
30 | } | ||
31 | |||
32 | static inline void thread_notify(unsigned long rc, struct thread_info *thread) | ||
33 | { | ||
34 | extern struct atomic_notifier_head thread_notify_head; | ||
35 | atomic_notifier_call_chain(&thread_notify_head, rc, thread); | ||
36 | } | ||
37 | |||
38 | #endif | ||
39 | |||
40 | /* | ||
41 | * These are the reason codes for the thread notifier. | ||
42 | */ | ||
43 | #define THREAD_NOTIFY_FLUSH 0 | ||
44 | #define THREAD_NOTIFY_RELEASE 1 | ||
45 | #define THREAD_NOTIFY_SWITCH 2 | ||
46 | |||
47 | #endif | ||
48 | #endif | ||