181 files changed, 8790 insertions, 2276 deletions

diff --git a/Documentation/SubmitChecklist b/Documentation/SubmitChecklist
index ac5e0b2f1097..78a9168ff377 100644
--- a/Documentation/SubmitChecklist
+++ b/Documentation/SubmitChecklist
@@ -54,7 +54,7 @@ kernel patches.
     CONFIG_PREEMPT.
 
 14: If the patch affects IO/Disk, etc: has been tested with and without
-    CONFIG_LBD.
+    CONFIG_LBDAF.
 
 15: All codepaths have been exercised with all lockdep features enabled.
 
diff --git a/Documentation/ja_JP/SubmitChecklist b/Documentation/ja_JP/SubmitChecklist
index 6c42e071d723..2df4576f1173 100644
--- a/Documentation/ja_JP/SubmitChecklist
+++ b/Documentation/ja_JP/SubmitChecklist
@@ -75,7 +75,7 @@ Linux カーネルパッチ投稿者向けチェックリスト
     ビルドした上、動作確認を行ってください。
 
 14: もしパッチがディスクのI/O性能などに影響を与えるようであれば、
-    'CONFIG_LBD'オプションを有効にした場合と無効にした場合の両方で
+    'CONFIG_LBDAF'オプションを有効にした場合と無効にした場合の両方で
     テストを実施してみてください。
 
 15: lockdepの機能を全て有効にした上で、全てのコードパスを評価してください。
diff --git a/MAINTAINERS b/MAINTAINERS
index 035df9d26609..a08882ea6861 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -946,7 +946,7 @@ M:	me@bobcopeland.com
 L:      linux-wireless@vger.kernel.org
 L:      ath5k-devel@lists.ath5k.org
 S:      Maintained
-F:      drivers/net/wireless/ath5k/
+F:      drivers/net/wireless/ath/ath5k/
 
 ATHEROS ATH9K WIRELESS DRIVER
 P:      Luis R. Rodriguez
@@ -962,7 +962,7 @@ M:	senthilkumar@atheros.com
 L:      linux-wireless@vger.kernel.org
 L:      ath9k-devel@lists.ath9k.org
 S:      Supported
-F:      drivers/net/wireless/ath9k/
+F:      drivers/net/wireless/ath/ath9k/
 
 ATHEROS AR9170 WIRELESS DRIVER
 P:      Christian Lamparter
@@ -970,7 +970,7 @@ M:	chunkeey@web.de
 L:      linux-wireless@vger.kernel.org
 W:      http://wireless.kernel.org/en/users/Drivers/ar9170
 S:      Maintained
-F:      drivers/net/wireless/ar9170/
+F:      drivers/net/wireless/ath/ar9170/
 
 ATI_REMOTE2 DRIVER
 P:      Ville Syrjala
@@ -2053,8 +2053,8 @@ F:	drivers/edac/i5400_edac.c
 
 EDAC-I82975X
 P:      Ranganathan Desikan
-P:      Arvind R.
 M:      rdesikan@jetzbroadband.com
+P:      Arvind R.
 M:      arvind@acarlab.com
 L:      bluesmoke-devel@lists.sourceforge.net (moderated for non-subscribers)
 W:      bluesmoke.sourceforge.net
@@ -2390,7 +2390,7 @@ FTRACE
 P:      Steven Rostedt
 M:      rostedt@goodmis.org
 S:      Maintained
-F:      Documentation/ftrace.txt
+F:      Documentation/trace/ftrace.txt
 F:      arch/*/*/*/ftrace.h
 F:      arch/*/kernel/ftrace.c
 F:      include/*/ftrace.h
@@ -2849,7 +2849,7 @@ W:	http://apps.sourceforge.net/trac/linux-zigbee
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/lumag/lowpan.git
 S:      Maintained
 F:      net/ieee802154/
-F:      drivers/ieee801254/
+F:      drivers/ieee802154/
 
 INTEGRITY MEASUREMENT ARCHITECTURE (IMA)
 P:      Mimi Zohar
@@ -3406,7 +3406,7 @@ P:	Eduard - Gabriel Munteanu
 M:      eduard.munteanu@linux360.ro
 S:      Maintained
 F:      Documentation/trace/kmemtrace.txt
-F:      include/trace/kmemtrace.h
+F:      include/linux/kmemtrace.h
 F:      kernel/trace/kmemtrace.c
 
 KPROBES
@@ -4083,7 +4083,7 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6.git
 S:      Maintained
 F:      net/wireless/
 F:      include/net/ieee80211*
-F:      include/net/wireless.h
+F:      include/linux/wireless.h
 
 NETWORKING DRIVERS
 L:      netdev@vger.kernel.org
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index b1d92f13ef96..88f36d599fe8 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -1,24 +1,21 @@
 #ifndef __ARCH_BLACKFIN_ATOMIC__
 #define __ARCH_BLACKFIN_ATOMIC__
 
+#ifndef CONFIG_SMP
+# include <asm-generic/atomic.h>
+#else
+
 #include <linux/types.h>
 #include <asm/system.h> /* local_irq_XXX() */
 
 /*
  * Atomic operations that C can't guarantee us.  Useful for
  * resource counting etc..
- *
- * Generally we do not concern about SMP BFIN systems, so we don't have
- * to deal with that.
- *
- * Tony Kou (tonyko@lineo.ca)   Lineo Inc.   2001
  */
 
 #define ATOMIC_INIT(i)  { (i) }
 #define atomic_set(v, i)        (((v)->counter) = i)
 
-#ifdef CONFIG_SMP
-
 #define atomic_read(v)  __raw_uncached_fetch_asm(&(v)->counter)
 
 asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
@@ -84,100 +81,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v)
 #define smp_mb__before_atomic_inc()    barrier()
 #define smp_mb__after_atomic_inc() barrier()
 
-#else /* !CONFIG_SMP */
-
-#define atomic_read(v)  ((v)->counter)
-
-static inline void atomic_add(int i, atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter += i;
-        local_irq_restore_hw(flags);
-}
-
-static inline void atomic_sub(int i, atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter -= i;
-        local_irq_restore_hw(flags);
-
-}
-
-static inline int atomic_add_return(int i, atomic_t *v)
-{
-        int __temp = 0;
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter += i;
-        __temp = v->counter;
-        local_irq_restore_hw(flags);
-
-
-        return __temp;
-}
-
-static inline int atomic_sub_return(int i, atomic_t *v)
-{
-        int __temp = 0;
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter -= i;
-        __temp = v->counter;
-        local_irq_restore_hw(flags);
-
-        return __temp;
-}
-
-static inline void atomic_inc(volatile atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter++;
-        local_irq_restore_hw(flags);
-}
-
-static inline void atomic_dec(volatile atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter--;
-        local_irq_restore_hw(flags);
-}
-
-static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter &= ~mask;
-        local_irq_restore_hw(flags);
-}
-
-static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
-{
-        unsigned long flags;
-
-        local_irq_save_hw(flags);
-        v->counter |= mask;
-        local_irq_restore_hw(flags);
-}
-
-/* Atomic operations are already serializing */
-#define smp_mb__before_atomic_dec()    barrier()
-#define smp_mb__after_atomic_dec() barrier()
-#define smp_mb__before_atomic_inc()    barrier()
-#define smp_mb__after_atomic_inc() barrier()
-
-#endif /* !CONFIG_SMP */
-
 #define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
 #define atomic_dec_return(v) atomic_sub_return(1,(v))
 #define atomic_inc_return(v) atomic_add_return(1,(v))
@@ -210,4 +113,6 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
 
 #include <asm-generic/atomic-long.h>
 
-#endif                          /* __ARCH_BLACKFIN_ATOMIC __ */
+#endif
+
+#endif
diff --git a/arch/blackfin/include/asm/auxvec.h b/arch/blackfin/include/asm/auxvec.h
index 215506cd87b7..41fa68b71287 100644
--- a/arch/blackfin/include/asm/auxvec.h
+++ b/arch/blackfin/include/asm/auxvec.h
@@ -1,4 +1 @@
-#ifndef __ASMBFIN_AUXVEC_H
-#define __ASMBFIN_AUXVEC_H
-
-#endif
+#include <asm-generic/auxvec.h>
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index 75fee2f7d9f2..daffa71576d4 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -1,26 +1,22 @@
 #ifndef _BLACKFIN_BITOPS_H
 #define _BLACKFIN_BITOPS_H
 
-/*
- * Copyright 1992, Linus Torvalds.
- */
-
-#include <linux/compiler.h>
-#include <asm/byteorder.h>      /* swab32 */
-
-#ifdef __KERNEL__
+#ifndef CONFIG_SMP
+# include <asm-generic/bitops.h>
+#else
 
 #ifndef _LINUX_BITOPS_H
 #error only <linux/bitops.h> can be included directly
 #endif
 
+#include <linux/compiler.h>
+#include <asm/byteorder.h>      /* swab32 */
+
 #include <asm-generic/bitops/ffs.h>
 #include <asm-generic/bitops/__ffs.h>
 #include <asm-generic/bitops/sched.h>
 #include <asm-generic/bitops/ffz.h>
 
-#ifdef CONFIG_SMP
-
 #include <linux/linkage.h>
 
 asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
@@ -79,189 +75,13 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
         return __raw_bit_test_toggle_asm(a, nr & 0x1f);
 }
 
-#else /* !CONFIG_SMP */
-
-#include <asm/system.h>         /* save_flags */
-
-static inline void set_bit(int nr, volatile unsigned long *addr)
-{
-        int *a = (int *)addr;
-        int mask;
-        unsigned long flags;
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save_hw(flags);
-        *a |= mask;
-        local_irq_restore_hw(flags);
-}
-
-static inline void clear_bit(int nr, volatile unsigned long *addr)
-{
-        int *a = (int *)addr;
-        int mask;
-        unsigned long flags;
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save_hw(flags);
-        *a &= ~mask;
-        local_irq_restore_hw(flags);
-}
-
-static inline void change_bit(int nr, volatile unsigned long *addr)
-{
-        int mask;
-        unsigned long flags;
-        unsigned long *ADDR = (unsigned long *)addr;
-
-        ADDR += nr >> 5;
-        mask = 1 << (nr & 31);
-        local_irq_save_hw(flags);
-        *ADDR ^= mask;
-        local_irq_restore_hw(flags);
-}
-
-static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save_hw(flags);
-        retval = (mask & *a) != 0;
-        *a |= mask;
-        local_irq_restore_hw(flags);
-
-        return retval;
-}
-
-static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save_hw(flags);
-        retval = (mask & *a) != 0;
-        *a &= ~mask;
-        local_irq_restore_hw(flags);
-
-        return retval;
-}
-
-static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save_hw(flags);
-        retval = (mask & *a) != 0;
-        *a ^= mask;
-        local_irq_restore_hw(flags);
-        return retval;
-}
-
-#endif /* CONFIG_SMP */
-
 /*
  * clear_bit() doesn't provide any barrier for the compiler.
  */
 #define smp_mb__before_clear_bit()      barrier()
 #define smp_mb__after_clear_bit()       barrier()
 
-static inline void __set_bit(int nr, volatile unsigned long *addr)
-{
-        int *a = (int *)addr;
-        int mask;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        *a |= mask;
-}
-
-static inline void __clear_bit(int nr, volatile unsigned long *addr)
-{
-        int *a = (int *)addr;
-        int mask;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        *a &= ~mask;
-}
-
-static inline void __change_bit(int nr, volatile unsigned long *addr)
-{
-        int mask;
-        unsigned long *ADDR = (unsigned long *)addr;
-
-        ADDR += nr >> 5;
-        mask = 1 << (nr & 31);
-        *ADDR ^= mask;
-}
-
-static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        retval = (mask & *a) != 0;
-        *a |= mask;
-        return retval;
-}
-
-static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        retval = (mask & *a) != 0;
-        *a &= ~mask;
-        return retval;
-}
-
-static inline int __test_and_change_bit(int nr,
-                                            volatile unsigned long *addr)
-{
-        int mask, retval;
-        volatile unsigned int *a = (volatile unsigned int *)addr;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        retval = (mask & *a) != 0;
-        *a ^= mask;
-        return retval;
-}
-
-static inline int __test_bit(int nr, const void *addr)
-{
-        int *a = (int *)addr;
-        int mask;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        return ((mask & *a) != 0);
-}
-
-#ifndef CONFIG_SMP
-/*
- * This routine doesn't need irq save and restore ops in UP
- * context.
- */
-static inline int test_bit(int nr, const void *addr)
-{
-        return __test_bit(nr, addr);
-}
-#endif
+#include <asm-generic/bitops/non-atomic.h>
 
 #include <asm-generic/bitops/find.h>
 #include <asm-generic/bitops/hweight.h>
@@ -272,10 +92,10 @@ static inline int test_bit(int nr, const void *addr)
 
 #include <asm-generic/bitops/minix.h>
 
-#endif                          /* __KERNEL__ */
-
 #include <asm-generic/bitops/fls.h>
 #include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 
+#endif /* CONFIG_SMP */
+
 #endif                          /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/include/asm/bugs.h b/arch/blackfin/include/asm/bugs.h
index 9093c9c1fb81..61791e1ad9f5 100644
--- a/arch/blackfin/include/asm/bugs.h
+++ b/arch/blackfin/include/asm/bugs.h
@@ -1,16 +1 @@
-/*
- *  include/asm-blackfin/bugs.h
- *
- *  Copyright (C) 1994  Linus Torvalds
- */
-
-/*
- * This is included by init/main.c to check for architecture-dependent bugs.
- *
- * Needs:
- *      void check_bugs(void);
- */
-
-static void check_bugs(void)
-{
-}
+#include <asm-generic/bugs.h>
diff --git a/arch/blackfin/include/asm/cputime.h b/arch/blackfin/include/asm/cputime.h
index 2b19705f9885..6d68ad7e0ea3 100644
--- a/arch/blackfin/include/asm/cputime.h
+++ b/arch/blackfin/include/asm/cputime.h
@@ -1,6 +1 @@
-#ifndef __BLACKFIN_CPUTIME_H
-#define __BLACKFIN_CPUTIME_H
-
 #include <asm-generic/cputime.h>
-
-#endif                          /* __BLACKFIN_CPUTIME_H */
diff --git a/arch/blackfin/include/asm/current.h b/arch/blackfin/include/asm/current.h
index 31918d29122c..4c51401b5537 100644
--- a/arch/blackfin/include/asm/current.h
+++ b/arch/blackfin/include/asm/current.h
@@ -1,23 +1 @@
-#ifndef _BLACKFIN_CURRENT_H
-#define _BLACKFIN_CURRENT_H
-/*
- *      current.h
- *      (C) Copyright 2000, Lineo, David McCullough <davidm@lineo.com>
- *
- *      rather than dedicate a register (as the m68k source does), we
- *      just keep a global,  we should probably just change it all to be
- *      current and lose _current_task.
- */
-#include <linux/thread_info.h>
-
-struct task_struct;
-
-static inline struct task_struct *get_current(void) __attribute__ ((__const__));
-static inline struct task_struct *get_current(void)
-{
-        return (current_thread_info()->task);
-}
-
-#define current (get_current())
-
-#endif                          /* _BLACKFIN_CURRENT_H */
+#include <asm-generic/current.h>
diff --git a/arch/blackfin/include/asm/device.h b/arch/blackfin/include/asm/device.h
index d8f9872b0e2d..f0a4c256403b 100644
--- a/arch/blackfin/include/asm/device.h
+++ b/arch/blackfin/include/asm/device.h
@@ -1,7 +1 @@
-/*
- * Arch specific extensions to struct device
- *
- * This file is released under the GPLv2
- */
 #include <asm-generic/device.h>
-
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 230e1605d3fb..5a87baf0659d 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -20,7 +20,7 @@
 
 typedef unsigned long elf_greg_t;
 
-#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))
+#define ELF_NGREG 40 /* (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) */
 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
 
 typedef struct user_bfinfp_struct elf_fpregset_t;
diff --git a/arch/blackfin/include/asm/emergency-restart.h b/arch/blackfin/include/asm/emergency-restart.h
index 27f6c785d103..3711bd9d50bd 100644
--- a/arch/blackfin/include/asm/emergency-restart.h
+++ b/arch/blackfin/include/asm/emergency-restart.h
@@ -1,6 +1 @@
-#ifndef _ASM_EMERGENCY_RESTART_H
-#define _ASM_EMERGENCY_RESTART_H
-
 #include <asm-generic/emergency-restart.h>
-
-#endif                          /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/blackfin/include/asm/errno.h b/arch/blackfin/include/asm/errno.h
index 164e4f39bb57..4c82b503d92f 100644
--- a/arch/blackfin/include/asm/errno.h
+++ b/arch/blackfin/include/asm/errno.h
@@ -1,6 +1 @@
-#ifndef _BFIN_ERRNO_H
-#define _BFIN_ERRNO_H
-
-#include<asm-generic/errno.h>
-
-#endif                          /* _BFIN_ERRNO_H */
+#include <asm-generic/errno.h>
diff --git a/arch/blackfin/include/asm/fb.h b/arch/blackfin/include/asm/fb.h
index c7df38030992..3a4988e8df45 100644
--- a/arch/blackfin/include/asm/fb.h
+++ b/arch/blackfin/include/asm/fb.h
@@ -1,12 +1 @@
-#ifndef _ASM_FB_H_
-#define _ASM_FB_H_
-#include <linux/fb.h>
-
-#define fb_pgprotect(...) do {} while (0)
-
-static inline int fb_is_primary_device(struct fb_info *info)
-{
-        return 0;
-}
-
-#endif /* _ASM_FB_H_ */
+#include <asm-generic/fb.h>
diff --git a/arch/blackfin/include/asm/futex.h b/arch/blackfin/include/asm/futex.h
index 6a332a9f099c..0b745828f42b 100644
--- a/arch/blackfin/include/asm/futex.h
+++ b/arch/blackfin/include/asm/futex.h
@@ -1,6 +1 @@
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
-
 #include <asm-generic/futex.h>
-
-#endif
diff --git a/arch/blackfin/include/asm/hardirq.h b/arch/blackfin/include/asm/hardirq.h
index 717181a1749b..cbd52f86bb9f 100644
--- a/arch/blackfin/include/asm/hardirq.h
+++ b/arch/blackfin/include/asm/hardirq.h
@@ -1,47 +1,11 @@
 #ifndef __BFIN_HARDIRQ_H
 #define __BFIN_HARDIRQ_H
 
-#include <linux/cache.h>
-#include <linux/threads.h>
-#include <asm/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-        unsigned int __syscall_count;
-        struct task_struct *__ksoftirqd_task;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
-/*
- * We put the hardirq and softirq counter into the preemption
- * counter. The bitmask has the following meaning:
- *
- * - bits 0-7 are the preemption count (max preemption depth: 256)
- * - bits 8-15 are the softirq count (max # of softirqs: 256)
- * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
- *
- * - ( bit 26 is the PREEMPT_ACTIVE flag. )
- *
- * PREEMPT_MASK: 0x000000ff
- * HARDIRQ_MASK: 0x0000ff00
- * SOFTIRQ_MASK: 0x00ff0000
- */
-
-#if NR_IRQS > 256
-#define HARDIRQ_BITS    9
-#else
-#define HARDIRQ_BITS    8
-#endif
-
-#ifdef NR_IRQS
-# if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-# endif
-#endif
-
 #define __ARCH_IRQ_EXIT_IRQS_DISABLED   1
 
 extern void ack_bad_irq(unsigned int irq);
+#define ack_bad_irq ack_bad_irq
+
+#include <asm-generic/hardirq.h>
 
 #endif
diff --git a/arch/blackfin/include/asm/hw_irq.h b/arch/blackfin/include/asm/hw_irq.h
index 5b51eaec012c..1f5ef7da0045 100644
--- a/arch/blackfin/include/asm/hw_irq.h
+++ b/arch/blackfin/include/asm/hw_irq.h
@@ -1,6 +1 @@
-#ifndef __ASM_BFIN_HW_IRQ_H
-#define __ASM_BFIN_HW_IRQ_H
-
-/* Dummy include. */
-
-#endif
+#include <asm-generic/hw_irq.h>
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index 3022b5c96b37..37053eca200e 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -222,7 +222,6 @@ extern void blkfin_inv_cache_all(void);
 #define ioport_unmap(addr)
 
 /* Pages to physical address... */
-#define page_to_phys(page)      ((page - mem_map) << PAGE_SHIFT)
 #define page_to_bus(page)       ((page - mem_map) << PAGE_SHIFT)
 
 #define phys_to_virt(vaddr)     ((void *) (vaddr))
diff --git a/arch/blackfin/include/asm/ioctls.h b/arch/blackfin/include/asm/ioctls.h
index 895e3173165d..eca8d75b0a8a 100644
--- a/arch/blackfin/include/asm/ioctls.h
+++ b/arch/blackfin/include/asm/ioctls.h
@@ -1,87 +1,7 @@
 #ifndef __ARCH_BFIN_IOCTLS_H__
 #define __ARCH_BFIN_IOCTLS_H__
 
-#include <asm/ioctl.h>
-
-/* 0x54 is just a magic number to make these relatively unique ('T') */
-
-#define TCGETS          0x5401
-#define TCSETS          0x5402
-#define TCSETSW         0x5403
-#define TCSETSF         0x5404
-#define TCGETA          0x5405
-#define TCSETA          0x5406
-#define TCSETAW         0x5407
-#define TCSETAF         0x5408
-#define TCSBRK          0x5409
-#define TCXONC          0x540A
-#define TCFLSH          0x540B
-#define TIOCEXCL        0x540C
-#define TIOCNXCL        0x540D
-#define TIOCSCTTY       0x540E
-#define TIOCGPGRP       0x540F
-#define TIOCSPGRP       0x5410
-#define TIOCOUTQ        0x5411
-#define TIOCSTI         0x5412
-#define TIOCGWINSZ      0x5413
-#define TIOCSWINSZ      0x5414
-#define TIOCMGET        0x5415
-#define TIOCMBIS        0x5416
-#define TIOCMBIC        0x5417
-#define TIOCMSET        0x5418
-#define TIOCGSOFTCAR    0x5419
-#define TIOCSSOFTCAR    0x541A
-#define FIONREAD        0x541B
-#define TIOCINQ         FIONREAD
-#define TIOCLINUX       0x541C
-#define TIOCCONS        0x541D
-#define TIOCGSERIAL     0x541E
-#define TIOCSSERIAL     0x541F
-#define TIOCPKT         0x5420
-#define FIONBIO         0x5421
-#define TIOCNOTTY       0x5422
-#define TIOCSETD        0x5423
-#define TIOCGETD        0x5424
-#define TCSBRKP         0x5425  /* Needed for POSIX tcsendbreak() */
-#define TIOCTTYGSTRUCT  0x5426  /* For debugging only */
-#define TIOCSBRK        0x5427  /* BSD compatibility */
-#define TIOCCBRK        0x5428  /* BSD compatibility */
-#define TIOCGSID        0x5429  /* Return the session ID of FD */
-#define TCGETS2         _IOR('T', 0x2A, struct termios2)
-#define TCSETS2         _IOW('T', 0x2B, struct termios2)
-#define TCSETSW2        _IOW('T', 0x2C, struct termios2)
-#define TCSETSF2        _IOW('T', 0x2D, struct termios2)
-/* Get Pty Number (of pty-mux device) */
-#define TIOCGPTN        _IOR('T', 0x30, unsigned int)
-#define TIOCSPTLCK      _IOW('T', 0x31, int)    /* Lock/unlock Pty */
-
-#define FIONCLEX        0x5450  /* these numbers need to be adjusted. */
-#define FIOCLEX         0x5451
-#define FIOASYNC        0x5452
-#define TIOCSERCONFIG   0x5453
-#define TIOCSERGWILD    0x5454
-#define TIOCSERSWILD    0x5455
-#define TIOCGLCKTRMIOS  0x5456
-#define TIOCSLCKTRMIOS  0x5457
-#define TIOCSERGSTRUCT  0x5458  /* For debugging only */
-#define TIOCSERGETLSR   0x5459  /* Get line status register */
-#define TIOCSERGETMULTI 0x545A  /* Get multiport config  */
-#define TIOCSERSETMULTI 0x545B  /* Set multiport config */
-
-#define TIOCMIWAIT      0x545C  /* wait for a change on serial input line(s) */
-#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
-
 #define FIOQSIZE        0x545E
+#include <asm-generic/ioctls.h>
 
-/* Used for packet mode */
-#define TIOCPKT_DATA             0
-#define TIOCPKT_FLUSHREAD        1
-#define TIOCPKT_FLUSHWRITE       2
-#define TIOCPKT_STOP             4
-#define TIOCPKT_START            8
-#define TIOCPKT_NOSTOP          16
-#define TIOCPKT_DOSTOP          32
-
-#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
-
-#endif                          /* __ARCH_BFIN_IOCTLS_H__ */
+#endif
diff --git a/arch/blackfin/include/asm/ipcbuf.h b/arch/blackfin/include/asm/ipcbuf.h
index 8f0899cdf4d2..84c7e51cb6d0 100644
--- a/arch/blackfin/include/asm/ipcbuf.h
+++ b/arch/blackfin/include/asm/ipcbuf.h
@@ -1,30 +1 @@
-/* Changes origined from m68k version.    Lineo Inc.  May 2001   */
-
-#ifndef __BFIN_IPCBUF_H__
-#define __BFIN_IPCBUF_H__
-
-/*
- * The user_ipc_perm structure for m68k architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm {
-        __kernel_key_t key;
-        __kernel_uid32_t uid;
-        __kernel_gid32_t gid;
-        __kernel_uid32_t cuid;
-        __kernel_gid32_t cgid;
-        __kernel_mode_t mode;
-        unsigned short __pad1;
-        unsigned short seq;
-        unsigned short __pad2;
-        unsigned long __unused1;
-        unsigned long __unused2;
-};
-
-#endif                          /* __BFIN_IPCBUF_H__ */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 400bdd52ce87..9a7f63a83c47 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -45,9 +45,6 @@
                 : "d" (bfin_irq_flags) \
         )
 
-static inline int irq_canonicalize(int irq)
-{
-        return irq;
-}
+#include <asm-generic/irq.h>
 
 #endif                          /* _BFIN_IRQ_H_ */
diff --git a/arch/blackfin/include/asm/kmap_types.h b/arch/blackfin/include/asm/kmap_types.h
index 0a88622339ee..3575c64af42a 100644
--- a/arch/blackfin/include/asm/kmap_types.h
+++ b/arch/blackfin/include/asm/kmap_types.h
@@ -1,6 +1 @@
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-
 #include <asm-generic/kmap_types.h>
-
-#endif
diff --git a/arch/blackfin/include/asm/local.h b/arch/blackfin/include/asm/local.h
index 75afffbc6421..c11c530f74d0 100644
--- a/arch/blackfin/include/asm/local.h
+++ b/arch/blackfin/include/asm/local.h
@@ -1,6 +1 @@
-#ifndef __BLACKFIN_LOCAL_H
-#define __BLACKFIN_LOCAL_H
-
 #include <asm-generic/local.h>
-
-#endif                          /* __BLACKFIN_LOCAL_H */
diff --git a/arch/blackfin/include/asm/mman.h b/arch/blackfin/include/asm/mman.h
index b58f5ad3f024..8eebf89f5ab1 100644
--- a/arch/blackfin/include/asm/mman.h
+++ b/arch/blackfin/include/asm/mman.h
@@ -1,43 +1 @@
-#ifndef __BFIN_MMAN_H__
-#define __BFIN_MMAN_H__
-
-#define PROT_READ       0x1     /* page can be read */
-#define PROT_WRITE      0x2     /* page can be written */
-#define PROT_EXEC       0x4     /* page can be executed */
-#define PROT_SEM        0x8     /* page may be used for atomic ops */
-#define PROT_NONE       0x0     /* page can not be accessed */
-#define PROT_GROWSDOWN  0x01000000      /* mprotect flag: extend change to start of growsdown vma */
-#define PROT_GROWSUP    0x02000000      /* mprotect flag: extend change to end of growsup vma */
-
-#define MAP_SHARED      0x01    /* Share changes */
-#define MAP_PRIVATE     0x02    /* Changes are private */
-#define MAP_TYPE        0x0f    /* Mask for type of mapping */
-#define MAP_FIXED       0x10    /* Interpret addr exactly */
-#define MAP_ANONYMOUS   0x20    /* don't use a file */
-
-#define MAP_GROWSDOWN   0x0100  /* stack-like segment */
-#define MAP_DENYWRITE   0x0800  /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000  /* mark it as an executable */
-#define MAP_LOCKED      0x2000  /* pages are locked */
-#define MAP_NORESERVE   0x4000  /* don't check for reservations */
-#define MAP_POPULATE    0x8000  /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000 /* do not block on IO */
-
-#define MS_ASYNC        1       /* sync memory asynchronously */
-#define MS_INVALIDATE   2       /* invalidate the caches */
-#define MS_SYNC         4       /* synchronous memory sync */
-
-#define MCL_CURRENT     1       /* lock all current mappings */
-#define MCL_FUTURE      2       /* lock all future mappings */
-
-#define MADV_NORMAL     0x0     /* default page-in behavior */
-#define MADV_RANDOM     0x1     /* page-in minimum required */
-#define MADV_SEQUENTIAL 0x2     /* read-ahead aggressively */
-#define MADV_WILLNEED   0x3     /* pre-fault pages */
-#define MADV_DONTNEED   0x4     /* discard these pages */
-
-/* compatibility flags */
-#define MAP_ANON        MAP_ANONYMOUS
-#define MAP_FILE        0
-
-#endif                          /* __BFIN_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/blackfin/include/asm/msgbuf.h b/arch/blackfin/include/asm/msgbuf.h
index 6fcbe8cd801d..809134c644a6 100644
--- a/arch/blackfin/include/asm/msgbuf.h
+++ b/arch/blackfin/include/asm/msgbuf.h
@@ -1,31 +1 @@
-#ifndef _BFIN_MSGBUF_H
-#define _BFIN_MSGBUF_H
-
-/*
- * The msqid64_ds structure for bfin architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct msqid64_ds {
-        struct ipc64_perm msg_perm;
-        __kernel_time_t msg_stime;      /* last msgsnd time */
-        unsigned long __unused1;
-        __kernel_time_t msg_rtime;      /* last msgrcv time */
-        unsigned long __unused2;
-        __kernel_time_t msg_ctime;      /* last change time */
-        unsigned long __unused3;
-        unsigned long msg_cbytes;       /* current number of bytes on queue */
-        unsigned long msg_qnum; /* number of messages in queue */
-        unsigned long msg_qbytes;       /* max number of bytes on queue */
-        __kernel_pid_t msg_lspid;       /* pid of last msgsnd */
-        __kernel_pid_t msg_lrpid;       /* last receive pid */
-        unsigned long __unused4;
-        unsigned long __unused5;
-};
-
-#endif                          /* _BFIN_MSGBUF_H */
+#include <asm-generic/msgbuf.h>
diff --git a/arch/blackfin/include/asm/mutex.h b/arch/blackfin/include/asm/mutex.h
index 5d399256bf06..5cc641c50834 100644
--- a/arch/blackfin/include/asm/mutex.h
+++ b/arch/blackfin/include/asm/mutex.h
@@ -10,7 +10,7 @@
 #define _ASM_MUTEX_H
 
 #ifndef CONFIG_SMP
-#include <asm-generic/mutex-dec.h>
+#include <asm-generic/mutex.h>
 #else
 
 static inline void
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 3ea2016a1d4a..29dcf75c6112 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -1,88 +1,7 @@
 #ifndef _BLACKFIN_PAGE_H
 #define _BLACKFIN_PAGE_H
 
-/* PAGE_SHIFT determines the page size */
+#include <asm-generic/page.h>
+#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
 
-#define PAGE_SHIFT      12
-#ifdef __ASSEMBLY__
-#define PAGE_SIZE       (1 << PAGE_SHIFT)
-#else
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
 #endif
-#define PAGE_MASK       (~(PAGE_SIZE-1))
-
-#include <asm/setup.h>
-
-#ifndef __ASSEMBLY__
-
-#define get_user_page(vaddr)            __get_free_page(GFP_KERNEL)
-#define free_user_page(page, addr)      free_page(addr)
-
-#define clear_page(page)        memset((page), 0, PAGE_SIZE)
-#define copy_page(to,from)      memcpy((to), (from), PAGE_SIZE)
-
-#define clear_user_page(page, vaddr,pg) clear_page(page)
-#define copy_user_page(to, from, vaddr,pg)      copy_page(to, from)
-
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct {
-        unsigned long pte;
-} pte_t;
-typedef struct {
-        unsigned long pmd[16];
-} pmd_t;
-typedef struct {
-        unsigned long pgd;
-} pgd_t;
-typedef struct {
-        unsigned long pgprot;
-} pgprot_t;
-typedef struct page *pgtable_t;
-
-#define pte_val(x)      ((x).pte)
-#define pmd_val(x)      ((&x)->pmd[0])
-#define pgd_val(x)      ((x).pgd)
-#define pgprot_val(x)   ((x).pgprot)
-
-#define __pte(x)        ((pte_t) { (x) } )
-#define __pmd(x)        ((pmd_t) { (x) } )
-#define __pgd(x)        ((pgd_t) { (x) } )
-#define __pgprot(x)     ((pgprot_t) { (x) } )
-
-extern unsigned long memory_start;
-extern unsigned long memory_end;
-
-#endif                          /* !__ASSEMBLY__ */
-
-#include <asm/page_offset.h>
-#include <asm/io.h>
-
-#define PAGE_OFFSET             (PAGE_OFFSET_RAW)
-
-#ifndef __ASSEMBLY__
-
-#define __pa(vaddr)             virt_to_phys((void *)(vaddr))
-#define __va(paddr)             phys_to_virt((unsigned long)(paddr))
-
-#define MAP_NR(addr)            (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
-
-#define virt_to_pfn(kaddr)      (__pa(kaddr) >> PAGE_SHIFT)
-#define pfn_to_virt(pfn)        __va((pfn) << PAGE_SHIFT)
-#define virt_to_page(addr)      (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT))
-#define page_to_virt(page)      ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
-#define VALID_PAGE(page)        ((page - mem_map) < max_mapnr)
-
-#define pfn_to_page(pfn)        virt_to_page(pfn_to_virt(pfn))
-#define page_to_pfn(page)       virt_to_pfn(page_to_virt(page))
-#define pfn_valid(pfn)          ((pfn) < max_mapnr)
-
-#define virt_addr_valid(kaddr)  (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
-                                ((void *)(kaddr) < (void *)memory_end))
-
-#include <asm-generic/getorder.h>
-
-#endif                          /* __ASSEMBLY__ */
-
-#endif                          /* _BLACKFIN_PAGE_H */
diff --git a/arch/blackfin/include/asm/param.h b/arch/blackfin/include/asm/param.h
index 41564a6347f8..965d45427975 100644
--- a/arch/blackfin/include/asm/param.h
+++ b/arch/blackfin/include/asm/param.h
@@ -1,22 +1 @@
-#ifndef _BLACKFIN_PARAM_H
-#define _BLACKFIN_PARAM_H
-
-#ifdef __KERNEL__
-#define HZ              CONFIG_HZ
-#define USER_HZ         100
-#define CLOCKS_PER_SEC  (USER_HZ)
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE   4096
-
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-
-#endif                          /* _BLACKFIN_PARAM_H */
+#include <asm-generic/param.h>
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h
index c94c7bc88c71..06a959d67234 100644
--- a/arch/blackfin/include/asm/percpu.h
+++ b/arch/blackfin/include/asm/percpu.h
@@ -1,6 +1 @@
-#ifndef __ARCH_BLACKFIN_PERCPU__
-#define __ARCH_BLACKFIN_PERCPU__
-
 #include <asm-generic/percpu.h>
-
-#endif  /* __ARCH_BLACKFIN_PERCPU__ */
diff --git a/arch/blackfin/include/asm/pgalloc.h b/arch/blackfin/include/asm/pgalloc.h
index c686e0542fd0..f261cb7dda06 100644
--- a/arch/blackfin/include/asm/pgalloc.h
+++ b/arch/blackfin/include/asm/pgalloc.h
@@ -1,8 +1 @@
-#ifndef _BLACKFIN_PGALLOC_H
-#define _BLACKFIN_PGALLOC_H
-
-#include <asm/setup.h>
-
-#define check_pgt_cache()       do { } while (0)
-
-#endif                          /* _BLACKFIN_PGALLOC_H */
+#include <asm-generic/pgalloc.h>
diff --git a/arch/blackfin/include/asm/poll.h b/arch/blackfin/include/asm/poll.h
index 94cc2636e0e2..a0556671357b 100644
--- a/arch/blackfin/include/asm/poll.h
+++ b/arch/blackfin/include/asm/poll.h
@@ -1,24 +1,9 @@
 #ifndef __BFIN_POLL_H
 #define __BFIN_POLL_H
 
-#define POLLIN            1
-#define POLLPRI           2
-#define POLLOUT           4
-#define POLLERR           8
-#define POLLHUP          16
-#define POLLNVAL         32
-#define POLLRDNORM       64
-#define POLLWRNORM      POLLOUT
-#define POLLRDBAND      128
+#define POLLWRNORM      4 /* POLLOUT */
 #define POLLWRBAND      256
-#define POLLMSG         0x0400
-#define POLLREMOVE      0x1000
-#define POLLRDHUP       0x2000
 
-struct pollfd {
-        int fd;
-        short events;
-        short revents;
-};
+#include <asm-generic/poll.h>
 
-#endif                          /* __BFIN_POLL_H */
+#endif
diff --git a/arch/blackfin/include/asm/posix_types.h b/arch/blackfin/include/asm/posix_types.h
index 23aa1f8c1bd1..80c9d64eb26c 100644
--- a/arch/blackfin/include/asm/posix_types.h
+++ b/arch/blackfin/include/asm/posix_types.h
@@ -1,61 +1,27 @@
 #ifndef __ARCH_BFIN_POSIX_TYPES_H
 #define __ARCH_BFIN_POSIX_TYPES_H
 
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned long __kernel_ino_t;
 typedef unsigned short __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+
 typedef unsigned short __kernel_nlink_t;
-typedef long __kernel_off_t;
-typedef int __kernel_pid_t;
+#define __kernel_nlink_t __kernel_nlink_t
+
 typedef unsigned int __kernel_ipc_pid_t;
-typedef unsigned int __kernel_uid_t;
-typedef unsigned int __kernel_gid_t;
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+
 typedef unsigned long __kernel_size_t;
 typedef long __kernel_ssize_t;
 typedef int __kernel_ptrdiff_t;
-typedef long __kernel_time_t;
-typedef long __kernel_suseconds_t;
-typedef long __kernel_clock_t;
-typedef int __kernel_timer_t;
-typedef int __kernel_clockid_t;
-typedef int __kernel_daddr_t;
-typedef char *__kernel_caddr_t;
-typedef unsigned short __kernel_uid16_t;
-typedef unsigned short __kernel_gid16_t;
-typedef unsigned int __kernel_uid32_t;
-typedef unsigned int __kernel_gid32_t;
+#define __kernel_size_t __kernel_size_t
 
 typedef unsigned short __kernel_old_uid_t;
 typedef unsigned short __kernel_old_gid_t;
-typedef unsigned short __kernel_old_dev_t;
-
-#ifdef __GNUC__
-typedef long long __kernel_loff_t;
-#endif
+#define __kernel_old_uid_t __kernel_old_uid_t
 
-typedef struct {
-        int val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef  __FD_SET
-#define __FD_SET(d, set)        ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-
-#undef  __FD_CLR
-#define __FD_CLR(d, set)        ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-
-#undef  __FD_ISSET
-#define __FD_ISSET(d, set)      ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
-
-#undef  __FD_ZERO
-#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+typedef unsigned short __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
 
-#endif                          /* defined(__KERNEL__) */
+#include <asm-generic/posix_types.h>
 
 #endif
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 3040415523b2..d0be99be8308 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -7,9 +7,8 @@
  */
 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
 
+#include <asm/ptrace.h>
 #include <asm/blackfin.h>
-#include <asm/segment.h>
-#include <linux/compiler.h>
 
 static inline unsigned long rdusp(void)
 {
@@ -59,36 +58,8 @@ struct thread_struct {
         PS_S, 0, 0                                              \
 }
 
-/*
- * Do necessary setup to start up a newly executed thread.
- *
- * pass the data segment into user programs if it exists,
- * it can't hurt anything as far as I can tell
- */
-#ifndef CONFIG_SMP
-#define start_thread(_regs, _pc, _usp)                                  \
-do {                                                                    \
-        set_fs(USER_DS);                                                \
-        (_regs)->pc = (_pc);                                            \
-        if (current->mm)                                                \
-                (_regs)->p5 = current->mm->start_data;                  \
-        task_thread_info(current)->l1_task_info.stack_start             \
-                = (void *)current->mm->context.stack_start;             \
-        task_thread_info(current)->l1_task_info.lowest_sp = (void *)(_usp); \
-        memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, \
-                sizeof(*L1_SCRATCH_TASK_INFO));                         \
-        wrusp(_usp);                                                    \
-} while(0)
-#else
-#define start_thread(_regs, _pc, _usp)                                  \
-do {                                                                    \
-        set_fs(USER_DS);                                                \
-        (_regs)->pc = (_pc);                                            \
-        if (current->mm)                                                \
-                (_regs)->p5 = current->mm->start_data;                  \
-        wrusp(_usp);                                                    \
-} while (0)
-#endif
+extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
+                                               unsigned long new_sp);
 
 /* Forward declaration, a strange C thing */
 struct task_struct;
diff --git a/arch/blackfin/include/asm/resource.h b/arch/blackfin/include/asm/resource.h
index 091355ab3495..04bc4db8921b 100644
--- a/arch/blackfin/include/asm/resource.h
+++ b/arch/blackfin/include/asm/resource.h
@@ -1,6 +1 @@
-#ifndef _BFIN_RESOURCE_H
-#define _BFIN_RESOURCE_H
-
 #include <asm-generic/resource.h>
-
-#endif                          /* _BFIN_RESOURCE_H */
diff --git a/arch/blackfin/include/asm/sembuf.h b/arch/blackfin/include/asm/sembuf.h
index 18deb5c7fa5d..7673b83cfef7 100644
--- a/arch/blackfin/include/asm/sembuf.h
+++ b/arch/blackfin/include/asm/sembuf.h
@@ -1,25 +1 @@
-#ifndef _BFIN_SEMBUF_H
-#define _BFIN_SEMBUF_H
-
-/*
- * The semid64_ds structure for bfin architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct semid64_ds {
-        struct ipc64_perm sem_perm;     /* permissions .. see ipc.h */
-        __kernel_time_t sem_otime;      /* last semop time */
-        unsigned long __unused1;
-        __kernel_time_t sem_ctime;      /* last change time */
-        unsigned long __unused2;
-        unsigned long sem_nsems;        /* no. of semaphores in array */
-        unsigned long __unused3;
-        unsigned long __unused4;
-};
-
-#endif                          /* _BFIN_SEMBUF_H */
+#include <asm-generic/sembuf.h>
diff --git a/arch/blackfin/include/asm/serial.h b/arch/blackfin/include/asm/serial.h
index 3a47606c858b..94a4a12e3bf2 100644
--- a/arch/blackfin/include/asm/serial.h
+++ b/arch/blackfin/include/asm/serial.h
@@ -1,6 +1,2 @@
-/*
- * include/asm-blackfin/serial.h
- */
-
+#include <asm-generic/serial.h>
 #define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH
-#define BASE_BAUD (1843200 / 16)
diff --git a/arch/blackfin/include/asm/setup.h b/arch/blackfin/include/asm/setup.h
index 01c8c6cbe6fc..552df83f1a49 100644
--- a/arch/blackfin/include/asm/setup.h
+++ b/arch/blackfin/include/asm/setup.h
@@ -1,17 +1 @@
-/*
-** asm/setup.h -- Definition of the Linux/bfin setup information
-**
-** This file is subject to the terms and conditions of the GNU General Public
-** License.  See the file COPYING in the main directory of this archive
-** for more details.
-**
-** Copyright Lineo, Inc 2001          Tony Kou
-**
-*/
-
-#ifndef _BFIN_SETUP_H
-#define _BFIN_SETUP_H
-
-#define COMMAND_LINE_SIZE       512
-
-#endif                          /* _BFIN_SETUP_H */
+#include <asm-generic/setup.h>
diff --git a/arch/blackfin/include/asm/shmbuf.h b/arch/blackfin/include/asm/shmbuf.h
index 612436303e89..83c05fc2de38 100644
--- a/arch/blackfin/include/asm/shmbuf.h
+++ b/arch/blackfin/include/asm/shmbuf.h
@@ -1,42 +1 @@
-#ifndef _BFIN_SHMBUF_H
-#define _BFIN_SHMBUF_H
-
-/*
- * The shmid64_ds structure for bfin architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct shmid64_ds {
-        struct ipc64_perm shm_perm;     /* operation perms */
-        size_t shm_segsz;       /* size of segment (bytes) */
-        __kernel_time_t shm_atime;      /* last attach time */
-        unsigned long __unused1;
-        __kernel_time_t shm_dtime;      /* last detach time */
-        unsigned long __unused2;
-        __kernel_time_t shm_ctime;      /* last change time */
-        unsigned long __unused3;
-        __kernel_pid_t shm_cpid;        /* pid of creator */
-        __kernel_pid_t shm_lpid;        /* pid of last operator */
-        unsigned long shm_nattch;       /* no. of current attaches */
-        unsigned long __unused4;
-        unsigned long __unused5;
-};
-
-struct shminfo64 {
-        unsigned long shmmax;
-        unsigned long shmmin;
-        unsigned long shmmni;
-        unsigned long shmseg;
-        unsigned long shmall;
-        unsigned long __unused1;
-        unsigned long __unused2;
-        unsigned long __unused3;
-        unsigned long __unused4;
-};
-
-#endif                          /* _BFIN_SHMBUF_H */
+#include <asm-generic/shmbuf.h>
diff --git a/arch/blackfin/include/asm/shmparam.h b/arch/blackfin/include/asm/shmparam.h
index 3c03906b7664..93f30deb95d0 100644
--- a/arch/blackfin/include/asm/shmparam.h
+++ b/arch/blackfin/include/asm/shmparam.h
@@ -1,6 +1 @@
-#ifndef _BFIN_SHMPARAM_H
-#define _BFIN_SHMPARAM_H
-
-#define SHMLBA PAGE_SIZE        /* attach addr a multiple of this */
-
-#endif                          /* _BFIN_SHMPARAM_H */
+#include <asm-generic/shmparam.h>
diff --git a/arch/blackfin/include/asm/signal.h b/arch/blackfin/include/asm/signal.h
index 2eea90794454..77a3bf37b69d 100644
--- a/arch/blackfin/include/asm/signal.h
+++ b/arch/blackfin/include/asm/signal.h
@@ -1,160 +1,7 @@
 #ifndef _BLACKFIN_SIGNAL_H
 #define _BLACKFIN_SIGNAL_H
 
-#include <linux/types.h>
+#define SA_RESTORER 0x04000000
+#include <asm-generic/signal.h>
 
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define _NSIG           64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;     /* at least 32 bits */
-
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG            32
-typedef unsigned long sigset_t;
-
-#endif                          /* __KERNEL__ */
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002      /* not supported yet */
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifdef __KERNEL__
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer) (void);
-};
-
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        void (*sa_restorer) (void);
-        sigset_t sa_mask;       /* mask last for extensibility */
-};
-
-struct k_sigaction {
-        struct sigaction sa;
-};
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-        union {
-                __sighandler_t _sa_handler;
-                void (*_sa_sigaction) (int, struct siginfo *, void *);
-        } _u;
-        sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer) (void);
-};
-
-#define sa_handler      _u._sa_handler
-#define sa_sigaction    _u._sa_sigaction
-
-#endif                          /* __KERNEL__ */
-
-typedef struct sigaltstack {
-        void __user *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
-#include <asm/sigcontext.h>
-#undef __HAVE_ARCH_SIG_BITOPS
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif                          /* __KERNEL__ */
-
-#endif                          /* _BLACKFIN_SIGNAL_H */
+#endif
diff --git a/arch/blackfin/include/asm/socket.h b/arch/blackfin/include/asm/socket.h
index fac7fe9e1f8a..6b71384b9d8b 100644
--- a/arch/blackfin/include/asm/socket.h
+++ b/arch/blackfin/include/asm/socket.h
@@ -1,59 +1 @@
-#ifndef _ASM_SOCKET_H
-#define _ASM_SOCKET_H
-
-#include <asm/sockios.h>
-
-/* For setsockoptions(2) */
-#define SOL_SOCKET      1
-
-#define SO_DEBUG        1
-#define SO_REUSEADDR    2
-#define SO_TYPE         3
-#define SO_ERROR        4
-#define SO_DONTROUTE    5
-#define SO_BROADCAST    6
-#define SO_SNDBUF       7
-#define SO_RCVBUF       8
-#define SO_SNDBUFFORCE  32
-#define SO_RCVBUFFORCE  33
-#define SO_KEEPALIVE    9
-#define SO_OOBINLINE    10
-#define SO_NO_CHECK     11
-#define SO_PRIORITY     12
-#define SO_LINGER       13
-#define SO_BSDCOMPAT    14
-/* To add :#define SO_REUSEPORT 15 */
-#define SO_PASSCRED     16
-#define SO_PEERCRED     17
-#define SO_RCVLOWAT     18
-#define SO_SNDLOWAT     19
-#define SO_RCVTIMEO     20
-#define SO_SNDTIMEO     21
-
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION              22
-#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
-#define SO_SECURITY_ENCRYPTION_NETWORK          24
-
-#define SO_BINDTODEVICE 25
-
-/* Socket filtering */
-#define SO_ATTACH_FILTER        26
-#define SO_DETACH_FILTER        27
-
-#define SO_PEERNAME             28
-#define SO_TIMESTAMP            29
-#define SCM_TIMESTAMP           SO_TIMESTAMP
-
-#define SO_ACCEPTCONN           30
-#define SO_PEERSEC              31
-#define SO_PASSSEC              34
-#define SO_TIMESTAMPNS          35
-#define SCM_TIMESTAMPNS         SO_TIMESTAMPNS
-
-#define SO_MARK                 36
-
-#define SO_TIMESTAMPING         37
-#define SCM_TIMESTAMPING        SO_TIMESTAMPING
-
-#endif                          /* _ASM_SOCKET_H */
+#include <asm-generic/socket.h>
diff --git a/arch/blackfin/include/asm/sockios.h b/arch/blackfin/include/asm/sockios.h
index 426b89bfaa8b..def6d4746ee7 100644
--- a/arch/blackfin/include/asm/sockios.h
+++ b/arch/blackfin/include/asm/sockios.h
@@ -1,13 +1 @@
-#ifndef __ARCH_BFIN_SOCKIOS__
-#define __ARCH_BFIN_SOCKIOS__
-
-/* Socket-level I/O control calls. */
-#define FIOSETOWN       0x8901
-#define SIOCSPGRP       0x8902
-#define FIOGETOWN       0x8903
-#define SIOCGPGRP       0x8904
-#define SIOCATMARK      0x8905
-#define SIOCGSTAMP      0x8906  /* Get stamp (timeval) */
-#define SIOCGSTAMPNS    0x8907  /* Get stamp (timespec) */
-
-#endif                          /* __ARCH_BFIN_SOCKIOS__ */
+#include <asm-generic/sockios.h>
diff --git a/arch/blackfin/include/asm/spinlock.h b/arch/blackfin/include/asm/spinlock.h
index 0249ac319476..d6ff4b59fcb1 100644
--- a/arch/blackfin/include/asm/spinlock.h
+++ b/arch/blackfin/include/asm/spinlock.h
@@ -1,6 +1,10 @@
 #ifndef __BFIN_SPINLOCK_H
 #define __BFIN_SPINLOCK_H
 
+#ifndef CONFIG_SMP
+# include <asm-generic/spinlock.h>
+#else
+
 #include <asm/atomic.h>
 
 asmlinkage int __raw_spin_is_locked_asm(volatile int *ptr);
@@ -86,4 +90,6 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
 #define _raw_read_relax(lock)   cpu_relax()
 #define _raw_write_relax(lock)  cpu_relax()
 
+#endif
+
 #endif /*  !__BFIN_SPINLOCK_H */
diff --git a/arch/blackfin/include/asm/statfs.h b/arch/blackfin/include/asm/statfs.h
index 350672091ba3..0b91fe198c20 100644
--- a/arch/blackfin/include/asm/statfs.h
+++ b/arch/blackfin/include/asm/statfs.h
@@ -1,6 +1 @@
-#ifndef _BFIN_STATFS_H
-#define _BFIN_STATFS_H
-
 #include <asm-generic/statfs.h>
-
-#endif                          /* _BFIN_STATFS_H */
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/asm/swab.h
index 6403ad2932eb..d442113de515 100644
--- a/arch/blackfin/include/asm/swab.h
+++ b/arch/blackfin/include/asm/swab.h
@@ -2,11 +2,7 @@
 #define _BLACKFIN_SWAB_H
 
 #include <linux/types.h>
-#include <linux/compiler.h>
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __SWAB_64_THRU_32__
-#endif
+#include <asm-generic/swab.h>
 
 #ifdef __GNUC__
 
diff --git a/arch/blackfin/include/asm/termbits.h b/arch/blackfin/include/asm/termbits.h
index f37feb7cf895..3935b106de79 100644
--- a/arch/blackfin/include/asm/termbits.h
+++ b/arch/blackfin/include/asm/termbits.h
@@ -1,198 +1 @@
-#ifndef __ARCH_BFIN_TERMBITS_H__
-#define __ARCH_BFIN_TERMBITS_H__
-
-#include <linux/posix_types.h>
-
-typedef unsigned char cc_t;
-typedef unsigned int speed_t;
-typedef unsigned int tcflag_t;
-
-#define NCCS 19
-struct termios {
-        tcflag_t c_iflag;       /* input mode flags */
-        tcflag_t c_oflag;       /* output mode flags */
-        tcflag_t c_cflag;       /* control mode flags */
-        tcflag_t c_lflag;       /* local mode flags */
-        cc_t c_line;            /* line discipline */
-        cc_t c_cc[NCCS];        /* control characters */
-};
-
-struct termios2 {
-        tcflag_t c_iflag;               /* input mode flags */
-        tcflag_t c_oflag;               /* output mode flags */
-        tcflag_t c_cflag;               /* control mode flags */
-        tcflag_t c_lflag;               /* local mode flags */
-        cc_t c_line;                    /* line discipline */
-        cc_t c_cc[NCCS];                /* control characters */
-        speed_t c_ispeed;               /* input speed */
-        speed_t c_ospeed;               /* output speed */
-};
-
-struct ktermios {
-        tcflag_t c_iflag;               /* input mode flags */
-        tcflag_t c_oflag;               /* output mode flags */
-        tcflag_t c_cflag;               /* control mode flags */
-        tcflag_t c_lflag;               /* local mode flags */
-        cc_t c_line;                    /* line discipline */
-        cc_t c_cc[NCCS];                /* control characters */
-        speed_t c_ispeed;               /* input speed */
-        speed_t c_ospeed;               /* output speed */
-};
-
-/* c_cc characters */
-#define VINTR 0
-#define VQUIT 1
-#define VERASE 2
-#define VKILL 3
-#define VEOF 4
-#define VTIME 5
-#define VMIN 6
-#define VSWTC 7
-#define VSTART 8
-#define VSTOP 9
-#define VSUSP 10
-#define VEOL 11
-#define VREPRINT 12
-#define VDISCARD 13
-#define VWERASE 14
-#define VLNEXT 15
-#define VEOL2 16
-
-/* c_iflag bits */
-#define IGNBRK  0000001
-#define BRKINT  0000002
-#define IGNPAR  0000004
-#define PARMRK  0000010
-#define INPCK   0000020
-#define ISTRIP  0000040
-#define INLCR   0000100
-#define IGNCR   0000200
-#define ICRNL   0000400
-#define IUCLC   0001000
-#define IXON    0002000
-#define IXANY   0004000
-#define IXOFF   0010000
-#define IMAXBEL 0020000
-#define IUTF8   0040000
-
-/* c_oflag bits */
-#define OPOST   0000001
-#define OLCUC   0000002
-#define ONLCR   0000004
-#define OCRNL   0000010
-#define ONOCR   0000020
-#define ONLRET  0000040
-#define OFILL   0000100
-#define OFDEL   0000200
-#define NLDLY   0000400
-#define   NL0   0000000
-#define   NL1   0000400
-#define CRDLY   0003000
-#define   CR0   0000000
-#define   CR1   0001000
-#define   CR2   0002000
-#define   CR3   0003000
-#define TABDLY  0014000
-#define   TAB0  0000000
-#define   TAB1  0004000
-#define   TAB2  0010000
-#define   TAB3  0014000
-#define   XTABS 0014000
-#define BSDLY   0020000
-#define   BS0   0000000
-#define   BS1   0020000
-#define VTDLY   0040000
-#define   VT0   0000000
-#define   VT1   0040000
-#define FFDLY   0100000
-#define   FF0   0000000
-#define   FF1   0100000
-
-/* c_cflag bit meaning */
-#define CBAUD   0010017
-#define  B0     0000000         /* hang up */
-#define  B50    0000001
-#define  B75    0000002
-#define  B110   0000003
-#define  B134   0000004
-#define  B150   0000005
-#define  B200   0000006
-#define  B300   0000007
-#define  B600   0000010
-#define  B1200  0000011
-#define  B1800  0000012
-#define  B2400  0000013
-#define  B4800  0000014
-#define  B9600  0000015
-#define  B19200 0000016
-#define  B38400 0000017
-#define EXTA B19200
-#define EXTB B38400
-#define CSIZE   0000060
-#define   CS5   0000000
-#define   CS6   0000020
-#define   CS7   0000040
-#define   CS8   0000060
-#define CSTOPB  0000100
-#define CREAD   0000200
-#define PARENB  0000400
-#define PARODD  0001000
-#define HUPCL   0002000
-#define CLOCAL  0004000
-#define CBAUDEX 0010000
-#define BOTHER  0010000
-#define    B57600 0010001
-#define   B115200 0010002
-#define   B230400 0010003
-#define   B460800 0010004
-#define   B500000 0010005
-#define   B576000 0010006
-#define   B921600 0010007
-#define  B1000000 0010010
-#define  B1152000 0010011
-#define  B1500000 0010012
-#define  B2000000 0010013
-#define  B2500000 0010014
-#define  B3000000 0010015
-#define  B3500000 0010016
-#define  B4000000 0010017
-#define CIBAUD    002003600000  /* input baud rate */
-#define CMSPAR    010000000000  /* mark or space (stick) parity */
-#define CRTSCTS   020000000000  /* flow control */
-
-#define IBSHIFT 16      /* Shift from CBAUD to CIBAUD */
-
-/* c_lflag bits */
-#define ISIG    0000001
-#define ICANON  0000002
-#define XCASE   0000004
-#define ECHO    0000010
-#define ECHOE   0000020
-#define ECHOK   0000040
-#define ECHONL  0000100
-#define NOFLSH  0000200
-#define TOSTOP  0000400
-#define ECHOCTL 0001000
-#define ECHOPRT 0002000
-#define ECHOKE  0004000
-#define FLUSHO  0010000
-#define PENDIN  0040000
-#define IEXTEN  0100000
-
-/* tcflow() and TCXONC use these */
-#define TCOOFF          0
-#define TCOON           1
-#define TCIOFF          2
-#define TCION           3
-
-/* tcflush() and TCFLSH use these */
-#define TCIFLUSH        0
-#define TCOFLUSH        1
-#define TCIOFLUSH       2
-
-/* tcsetattr uses these */
-#define TCSANOW         0
-#define TCSADRAIN       1
-#define TCSAFLUSH       2
-
-#endif                          /* __ARCH_BFIN_TERMBITS_H__ */
+#include <asm-generic/termbits.h>
diff --git a/arch/blackfin/include/asm/termios.h b/arch/blackfin/include/asm/termios.h
index d50d063c605a..280d78a9d966 100644
--- a/arch/blackfin/include/asm/termios.h
+++ b/arch/blackfin/include/asm/termios.h
@@ -1,94 +1 @@
-#ifndef __BFIN_TERMIOS_H__
-#define __BFIN_TERMIOS_H__
-
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct winsize {
-        unsigned short ws_row;
-        unsigned short ws_col;
-        unsigned short ws_xpixel;
-        unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-        unsigned short c_iflag; /* input mode flags */
-        unsigned short c_oflag; /* output mode flags */
-        unsigned short c_cflag; /* control mode flags */
-        unsigned short c_lflag; /* local mode flags */
-        unsigned char c_line;   /* line discipline */
-        unsigned char c_cc[NCC];        /* control characters */
-};
-
-/* modem lines */
-#define TIOCM_LE        0x001
-#define TIOCM_DTR       0x002
-#define TIOCM_RTS       0x004
-#define TIOCM_ST        0x008
-#define TIOCM_SR        0x010
-#define TIOCM_CTS       0x020
-#define TIOCM_CAR       0x040
-#define TIOCM_RNG       0x080
-#define TIOCM_DSR       0x100
-#define TIOCM_CD        TIOCM_CAR
-#define TIOCM_RI        TIOCM_RNG
-#define TIOCM_OUT1      0x2000
-#define TIOCM_OUT2      0x4000
-#define TIOCM_LOOP      0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-
-#ifdef __KERNEL__
-
-/*      intr=^C         quit=^\         erase=del       kill=^U
-        eof=^D          vtime=\0        vmin=\1         sxtc=\0
-        start=^Q        stop=^S         susp=^Z         eol=\0
-        reprint=^R      discard=^U      werase=^W       lnext=^V
-        eol2=\0
-*/
-#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
-
-/*
- * Translate a "termio" structure into a "termios". Ugh.
- */
-#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
-        unsigned short __tmp; \
-        get_user(__tmp,&(termio)->x); \
-        *(unsigned short *) &(termios)->x = __tmp; \
-}
-
-#define user_termio_to_kernel_termios(termios, termio) \
-({ \
-        SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
-        SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
-        SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
-        SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
-        copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-})
-
-/*
- * Translate a "termios" structure into a "termio". Ugh.
- */
-#define kernel_termios_to_user_termio(termio, termios) \
-({ \
-        put_user((termios)->c_iflag, &(termio)->c_iflag); \
-        put_user((termios)->c_oflag, &(termio)->c_oflag); \
-        put_user((termios)->c_cflag, &(termio)->c_cflag); \
-        put_user((termios)->c_lflag, &(termio)->c_lflag); \
-        put_user((termios)->c_line,  &(termio)->c_line); \
-        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
-})
-
-#define user_termios_to_kernel_termios(k, u) \
-        copy_from_user(k, u, sizeof(struct termios2))
-#define kernel_termios_to_user_termios(u, k) \
-        copy_to_user(u, k, sizeof(struct termios2))
-#define user_termios_to_kernel_termios_1(k, u) \
-        copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios_1(u, k) \
-        copy_to_user(u, k, sizeof(struct termios))
-
-#endif                          /* __KERNEL__ */
-
-#endif                          /* __BFIN_TERMIOS_H__ */
+#include <asm-generic/termios.h>
diff --git a/arch/blackfin/include/asm/tlbflush.h b/arch/blackfin/include/asm/tlbflush.h
index 277b400924b8..f1a06c006ed0 100644
--- a/arch/blackfin/include/asm/tlbflush.h
+++ b/arch/blackfin/include/asm/tlbflush.h
@@ -1,56 +1 @@
-#ifndef _BLACKFIN_TLBFLUSH_H
-#define _BLACKFIN_TLBFLUSH_H
-
-/*
- * Copyright (C) 2000 Lineo, David McCullough <davidm@uclinux.org>
- * Copyright (C) 2000-2002, Greg Ungerer <gerg@snapgear.com>
- */
-
-#include <asm/setup.h>
-
-/*
- * flush all user-space atc entries.
- */
-static inline void __flush_tlb(void)
-{
-        BUG();
-}
-
-static inline void __flush_tlb_one(unsigned long addr)
-{
-        BUG();
-}
-
-#define flush_tlb() __flush_tlb()
-
-/*
- * flush all atc entries (both kernel and user-space entries).
- */
-static inline void flush_tlb_all(void)
-{
-        BUG();
-}
-
-static inline void flush_tlb_mm(struct mm_struct *mm)
-{
-        BUG();
-}
-
-static inline void flush_tlb_page(struct vm_area_struct *vma,
-                                  unsigned long addr)
-{
-        BUG();
-}
-
-static inline void flush_tlb_range(struct mm_struct *mm,
-                                   unsigned long start, unsigned long end)
-{
-        BUG();
-}
-
-static inline void flush_tlb_kernel_page(unsigned long addr)
-{
-        BUG();
-}
-
-#endif
+#include <asm-generic/tlbflush.h>
diff --git a/arch/blackfin/include/asm/topology.h b/arch/blackfin/include/asm/topology.h
index acee23987897..5428f333a02c 100644
--- a/arch/blackfin/include/asm/topology.h
+++ b/arch/blackfin/include/asm/topology.h
@@ -1,6 +1 @@
-#ifndef _ASM_BLACKFIN_TOPOLOGY_H
-#define _ASM_BLACKFIN_TOPOLOGY_H
-
 #include <asm-generic/topology.h>
-
-#endif                          /* _ASM_BLACKFIN_TOPOLOGY_H */
diff --git a/arch/blackfin/include/asm/types.h b/arch/blackfin/include/asm/types.h
index 8441cbc2bf9e..b9e79bc580dd 100644
--- a/arch/blackfin/include/asm/types.h
+++ b/arch/blackfin/include/asm/types.h
@@ -1,36 +1 @@
-#ifndef _BFIN_TYPES_H
-#define _BFIN_TYPES_H
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-#include <asm-generic/int-ll64.h>
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif                          /* __ASSEMBLY__ */
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __KERNEL__
-
-#define BITS_PER_LONG 32
-
-#ifndef __ASSEMBLY__
-
-/* Dma addresses are 32-bits wide.  */
-
-typedef u32 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-#endif                          /* __ASSEMBLY__ */
-
-#endif                          /* __KERNEL__ */
-
-#endif                          /* _BFIN_TYPES_H */
+#include <asm-generic/types.h>
diff --git a/arch/blackfin/include/asm/ucontext.h b/arch/blackfin/include/asm/ucontext.h
index 4a4e3856beba..9bc07b9f30fb 100644
--- a/arch/blackfin/include/asm/ucontext.h
+++ b/arch/blackfin/include/asm/ucontext.h
@@ -1,17 +1 @@
-/** Changes made by Tony Kou   Lineo Inc.    May 2001
- *
- *  Based on: include/m68knommu/ucontext.h
- */
-
-#ifndef _BLACKFIN_UCONTEXT_H
-#define _BLACKFIN_UCONTEXT_H
-
-struct ucontext {
-        unsigned long uc_flags; /* the others are necessary */
-        struct ucontext *uc_link;
-        stack_t uc_stack;
-        struct sigcontext uc_mcontext;
-        sigset_t uc_sigmask;    /* mask last for extensibility */
-};
-
-#endif                          /* _BLACKFIN_UCONTEXT_H */
+#include <asm-generic/ucontext.h>
diff --git a/arch/blackfin/include/asm/unaligned.h b/arch/blackfin/include/asm/unaligned.h
index fd8a1d634945..6cecbbb2111f 100644
--- a/arch/blackfin/include/asm/unaligned.h
+++ b/arch/blackfin/include/asm/unaligned.h
@@ -1,11 +1 @@
-#ifndef _ASM_BLACKFIN_UNALIGNED_H
-#define _ASM_BLACKFIN_UNALIGNED_H
-
-#include <linux/unaligned/le_struct.h>
-#include <linux/unaligned/be_byteshift.h>
-#include <linux/unaligned/generic.h>
-
-#define get_unaligned   __get_unaligned_le
-#define put_unaligned   __put_unaligned_le
-
-#endif /* _ASM_BLACKFIN_UNALIGNED_H */
+#include <asm-generic/unaligned.h>
diff --git a/arch/blackfin/include/asm/user.h b/arch/blackfin/include/asm/user.h
index afe6a0e1f7ce..4792a60831e4 100644
--- a/arch/blackfin/include/asm/user.h
+++ b/arch/blackfin/include/asm/user.h
@@ -1,89 +1 @@
-#ifndef _BFIN_USER_H
-#define _BFIN_USER_H
-
-/* Changes by Tony Kou   Lineo, Inc.  July, 2001
- *
- * Based include/asm-m68knommu/user.h
- *
- */
-
-/* Core file format: The core file is written in such a way that gdb
-   can understand it and provide useful information to the user (under
-   linux we use the 'trad-core' bfd).  There are quite a number of
-   obstacles to being able to view the contents of the floating point
-   registers, and until these are solved you will not be able to view the
-   contents of them.  Actually, you can read in the core file and look at
-   the contents of the user struct to find out what the floating point
-   registers contain.
-   The actual file contents are as follows:
-   UPAGE: 1 page consisting of a user struct that tells gdb what is present
-   in the file.  Directly after this is a copy of the task_struct, which
-   is currently not used by gdb, but it may come in useful at some point.
-   All of the registers are stored as part of the upage.  The upage should
-   always be only one page.
-   DATA: The data area is stored.  We use current->end_text to
-   current->brk to pick up all of the user variables, plus any memory
-   that may have been malloced.  No attempt is made to determine if a page
-   is demand-zero or if a page is totally unused, we just cover the entire
-   range.  All of the addresses are rounded in such a way that an integral
-   number of pages is written.
-   STACK: We need the stack information in order to get a meaningful
-   backtrace.  We need to write the data from (esp) to
-   current->start_stack, so we round each of these off in order to be able
-   to write an integer number of pages.
-   The minimum core file size is 3 pages, or 12288 bytes.
-*/
-struct user_bfinfp_struct {
-};
-
-/* This is the old layout of "struct pt_regs" as of Linux 1.x, and
-   is still the layout used by user (the new pt_regs doesn't have
-   all registers). */
-struct user_regs_struct {
-        long r0, r1, r2, r3, r4, r5, r6, r7;
-        long p0, p1, p2, p3, p4, p5, usp, fp;
-        long i0, i1, i2, i3;
-        long l0, l1, l2, l3;
-        long b0, b1, b2, b3;
-        long m0, m1, m2, m3;
-        long a0w, a1w;
-        long a0x, a1x;
-        unsigned long rets;
-        unsigned long astat;
-        unsigned long pc;
-        unsigned long orig_p0;
-};
-
-/* When the kernel dumps core, it starts by dumping the user struct -
-   this will be used by gdb to figure out where the data and stack segments
-   are within the file, and what virtual addresses to use. */
-
-struct user {
-/* We start with the registers, to mimic the way that "memory" is returned
-   from the ptrace(3,...) function.  */
-
-        struct user_regs_struct regs;   /* Where the registers are actually stored */
-
-/* The rest of this junk is to help gdb figure out what goes where */
-        unsigned long int u_tsize;      /* Text segment size (pages). */
-        unsigned long int u_dsize;      /* Data segment size (pages). */
-        unsigned long int u_ssize;      /* Stack segment size (pages). */
-        unsigned long start_code;       /* Starting virtual address of text. */
-        unsigned long start_stack;      /* Starting virtual address of stack area.
-                                           This is actually the bottom of the stack,
-                                           the top of the stack is always found in the
-                                           esp register.  */
-        long int signal;        /* Signal that caused the core dump. */
-        int reserved;           /* No longer used */
-        unsigned long u_ar0;
-        /* Used by gdb to help find the values for */
-        /* the registers. */
-        unsigned long magic;    /* To uniquely identify a core file */
-        char u_comm[32];        /* User command that was responsible */
-};
-#define NBPG PAGE_SIZE
-#define UPAGES 1
-#define HOST_TEXT_START_ADDR (u.start_code)
-#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-
-#endif
+#include <asm-generic/user.h>
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c
index aa05e638fb7c..ed8392c117ea 100644
--- a/arch/blackfin/kernel/bfin_ksyms.c
+++ b/arch/blackfin/kernel/bfin_ksyms.c
@@ -10,6 +10,7 @@
 #include <linux/uaccess.h>
 
 #include <asm/cacheflush.h>
+#include <asm/io.h>
 
 /* Allow people to have their own Blackfin exception handler in a module */
 EXPORT_SYMBOL(bfin_return_from_exception);
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 30d0843ed701..3e1d86e456f6 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -160,6 +160,29 @@ pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
 }
 EXPORT_SYMBOL(kernel_thread);
 
+/*
+ * Do necessary setup to start up a newly executed thread.
+ *
+ * pass the data segment into user programs if it exists,
+ * it can't hurt anything as far as I can tell
+ */
+void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
+{
+        set_fs(USER_DS);
+        regs->pc = new_ip;
+        if (current->mm)
+                regs->p5 = current->mm->start_data;
+#ifdef CONFIG_SMP
+        task_thread_info(current)->l1_task_info.stack_start =
+                (void *)current->mm->context.stack_start;
+        task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
+        memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
+               sizeof(*L1_SCRATCH_TASK_INFO));
+#endif
+        wrusp(new_sp);
+}
+EXPORT_SYMBOL_GPL(start_thread);
+
 void flush_thread(void)
 {
 }
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 1f3228ed713f..dd8b2dc97f56 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -4,7 +4,7 @@
 
 obj-y := \
         cache.o cache-c.o entry.o head.o \
-        interrupt.o irqpanic.o arch_checks.o ints-priority.o
+        interrupt.o arch_checks.o ints-priority.o
 
 obj-$(CONFIG_BFIN_ICACHE_LOCK) += lock.o
 obj-$(CONFIG_PM)          += pm.o dpmc_modes.o
@@ -12,3 +12,4 @@ obj-$(CONFIG_CPU_FREQ)    += cpufreq.o
 obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
 obj-$(CONFIG_SMP)         += smp.o
 obj-$(CONFIG_BFIN_KERNEL_CLOCK) += clocks-init.o
+obj-$(CONFIG_DEBUG_ICACHE_CHECK) += irqpanic.o
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 351afd0e36d8..af70f09acd55 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -472,7 +472,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 
         if (type == IRQ_TYPE_PROBE) {
                 /* only probe unenabled GPIO interrupt lines */
-                if (__test_bit(gpionr, gpio_enabled))
+                if (test_bit(gpionr, gpio_enabled))
                         return 0;
                 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
         }
@@ -782,7 +782,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 
         if (type == IRQ_TYPE_PROBE) {
                 /* only probe unenabled GPIO interrupt lines */
-                if (__test_bit(gpionr, gpio_enabled))
+                if (test_bit(gpionr, gpio_enabled))
                         return 0;
                 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
         }
diff --git a/arch/blackfin/mach-common/irqpanic.c b/arch/blackfin/mach-common/irqpanic.c
index 05004df0f78b..883e3241b17e 100644
--- a/arch/blackfin/mach-common/irqpanic.c
+++ b/arch/blackfin/mach-common/irqpanic.c
@@ -30,21 +30,17 @@
 #include <linux/module.h>
 #include <linux/kernel_stat.h>
 #include <linux/sched.h>
-#include <asm/traps.h>
 #include <asm/blackfin.h>
 
-#ifdef CONFIG_DEBUG_ICACHE_CHECK
 #define L1_ICACHE_START 0xffa10000
 #define L1_ICACHE_END   0xffa13fff
-void irq_panic(int reason, struct pt_regs *regs) __attribute__ ((l1_text));
-#endif
 
 /*
  * irq_panic - calls panic with string setup
  */
+__attribute__ ((l1_text))
 asmlinkage void irq_panic(int reason, struct pt_regs *regs)
 {
-#ifdef CONFIG_DEBUG_ICACHE_CHECK
         unsigned int cmd, tag, ca, cache_hi, cache_lo, *pa;
         unsigned short i, j, die;
         unsigned int bad[10][6];
@@ -126,9 +122,6 @@ asmlinkage void irq_panic(int reason, struct pt_regs *regs)
                              bad[j][3], bad[j][4], bad[j][5]);
                 }
                 panic("icache coherency error");
-        } else {
+        } else
                 printk(KERN_EMERG "icache checked, and OK\n");
-        }
-#endif
-
 }
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index d79a902d155a..3b1005185390 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -2,6 +2,23 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
+config PPC_DISABLE_WERROR
+        bool "Don't build arch/powerpc code with -Werror"
+        default n
+        help
+          This option tells the compiler NOT to build the code under
+          arch/powerpc with the -Werror flag (which means warnings
+          are treated as errors).
+
+          Only enable this if you are hitting a build failure in the
+          arch/powerpc code caused by a warning, and you don't feel
+          inclined to fix it.
+
+config PPC_WERROR
+        bool
+        depends on !PPC_DISABLE_WERROR
+        default y
+
 config PRINT_STACK_DEPTH
         int "Stack depth to print" if DEBUG_KERNEL
         default 64
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c
index 6776a1a29f13..277ba4a79b5a 100644
--- a/arch/powerpc/boot/cuboot-85xx.c
+++ b/arch/powerpc/boot/cuboot-85xx.c
@@ -15,6 +15,7 @@
 #include "cuboot.h"
 
 #define TARGET_85xx
+#define TARGET_HAS_ETH3
 #include "ppcboot.h"
 
 static bd_t bd;
@@ -27,6 +28,7 @@ static void platform_fixups(void)
         dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
         dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
         dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
+        dt_fixup_mac_address_by_alias("ethernet3", bd.bi_enet3addr);
         dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
 
         /* Unfortunately, the specific model number is encoded in the
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 7da84fd7be93..261d10c4534b 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -167,7 +167,7 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <39 0x8>;
                         phy_type = "ulpi";
-                        port1;
+                        port0;
                 };
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index 217f8aa66725..35a63183eecc 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -152,6 +152,16 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        hwmon@48 {
+                                compatible = "national,lm92";
+                                reg = <0x48>;
+                        };
+
+                        hwmon@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
                         rtc@51 {
                                 compatible = "epson,rx8581";
                                 reg = <0x00000051>;
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
new file mode 100644
index 000000000000..167044f7de1d
--- /dev/null
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -0,0 +1,520 @@
+/*
+ * Keymile KMETER1 Device Tree Source
+ *
+ * 2008 DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "KMETER1";
+        compatible = "keymile,KMETER1";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet_piggy2;
+                ethernet1 = &enet_estar1;
+                ethernet2 = &enet_estar2;
+                ethernet3 = &enet_eth1;
+                ethernet4 = &enet_eth2;
+                ethernet5 = &enet_eth3;
+                ethernet6 = &enet_eth4;
+                serial0 = &serial0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8360@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       /* Filled in by U-Boot */
+                        bus-frequency = <0>;    /* Filled in by U-Boot */
+                        clock-frequency = <0>;  /* Filled in by U-Boot */
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0>;    /* Filled in by U-Boot */
+        };
+
+        soc8360@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8360-immr", "simple-bus";
+                ranges = <0x0 0xe0000000 0x00200000>;
+                reg = <0xe0000000 0x00000200>;
+                bus-frequency = <0>;    /* Filled in by U-Boot */
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <14 0x8>;
+                        interrupt-parent = <&ipic>;
+                        dfsrr;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <264000000>;
+                        interrupts = <9 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
+                ipic: pic@700 {
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        compatible = "fsl,pq2pro-pic", "fsl,ipic";
+                        interrupt-controller;
+                        reg = <0x700 0x100>;
+                };
+
+                par_io@1400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x1400 0x100>;
+                        compatible = "fsl,mpc8360-par_io";
+                        num-ports = <7>;
+
+                        pio_ucc1: ucc_pin@0 {
+                                reg = <0>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO   */
+                                        0   2  1  0  1  0       /* MDC    */
+
+                                        0   3  1  0  1  0       /* TxD0   */
+                                        0   4  1  0  1  0       /* TxD1   */
+                                        0   5  1  0  1  0       /* TxD2   */
+                                        0   6  1  0  1  0       /* TxD3   */
+                                        0   9  2  0  1  0       /* RxD0   */
+                                        0  10  2  0  1  0       /* RxD1   */
+                                        0  11  2  0  1  0       /* RxD2   */
+                                        0  12  2  0  1  0       /* RxD3   */
+                                        0   7  1  0  1  0       /* TX_EN  */
+                                        0   8  1  0  1  0       /* TX_ER  */
+                                        0  15  2  0  1  0       /* RX_DV  */
+                                        0  16  2  0  1  0       /* RX_ER  */
+                                        0   0  2  0  1  0       /* RX_CLK */
+                                        2   9  1  0  3  0       /* GTX_CLK - CLK10 */
+                                        2   8  2  0  1  0       /* GTX125  - CLK9  */
+                                >;
+                        };
+
+                        pio_ucc2: ucc_pin@1 {
+                                reg = <1>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO   */
+                                        0   2  1  0  1  0       /* MDC    */
+
+                                        0  17  1  0  1  0       /* TxD0   */
+                                        0  18  1  0  1  0       /* TxD1   */
+                                        0  19  1  0  1  0       /* TxD2   */
+                                        0  20  1  0  1  0       /* TxD3   */
+                                        0  23  2  0  1  0       /* RxD0   */
+                                        0  24  2  0  1  0       /* RxD1   */
+                                        0  25  2  0  1  0       /* RxD2   */
+                                        0  26  2  0  1  0       /* RxD3   */
+                                        0  21  1  0  1  0       /* TX_EN  */
+                                        0  22  1  0  1  0       /* TX_ER  */
+                                        0  29  2  0  1  0       /* RX_DV  */
+                                        0  30  2  0  1  0       /* RX_ER  */
+                                        0  31  2  0  1  0       /* RX_CLK */
+                                        2  2   1  0  2  0       /* GTX_CLK - CLK3  */
+                                        2  3   2  0  1  0       /* GTX125  - CLK4  */
+                                >;
+                        };
+
+                        pio_ucc4: ucc_pin@3 {
+                                reg = <3>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO */
+                                        0   2  1  0  1  0       /* MDC  */
+
+                                        1  14  1  0  1  0       /* TxD0   (PB14, out, f1) */
+                                        1  15  1  0  1  0       /* TxD1   (PB15, out, f1) */
+                                        1  20  2  0  1  0       /* RxD0   (PB20, in,  f1) */
+                                        1  21  2  0  1  0       /* RxD1   (PB21, in,  f1) */
+                                        1  18  1  0  1  0       /* TX_EN  (PB18, out, f1) */
+                                        1  26  2  0  1  0       /* RX_DV  (PB26, in,  f1) */
+                                        1  27  2  0  1  0       /* RX_ER  (PB27, in,  f1) */
+
+                                        2  16  2  0  1  0       /* UCC4_RMII_CLK (CLK17) */
+                                >;
+                        };
+
+                        pio_ucc5: ucc_pin@4 {
+                                reg = <4>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO */
+                                        0   2  1  0  1  0       /* MDC  */
+
+                                        3   0  1  0  1  0       /* TxD0  (PD0,  out, f1) */
+                                        3   1  1  0  1  0       /* TxD1  (PD1,  out, f1) */
+                                        3   6  2  0  1  0       /* RxD0  (PD6,   in, f1) */
+                                        3   7  2  0  1  0       /* RxD1  (PD7,   in, f1) */
+                                        3   4  1  0  1  0       /* TX_EN (PD4,  out, f1) */
+                                        3  12  2  0  1  0       /* RX_DV (PD12,  in, f1) */
+                                        3  13  2  0  1  0       /* RX_ER (PD13,  in, f1) */
+                                >;
+                        };
+
+                        pio_ucc6: ucc_pin@5 {
+                                reg = <5>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO */
+                                        0   2  1  0  1  0       /* MDC  */
+
+                                        3  14  1  0  1  0       /* TxD0   (PD14, out, f1) */
+                                        3  15  1  0  1  0       /* TxD1   (PD15, out, f1) */
+                                        3  20  2  0  1  0       /* RxD0   (PD20, in,  f1) */
+                                        3  21  2  0  1  0       /* RxD1   (PD21, in,  f1) */
+                                        3  18  1  0  1  0       /* TX_EN  (PD18, out, f1) */
+                                        3  26  2  0  1  0       /* RX_DV  (PD26, in,  f1) */
+                                        3  27  2  0  1  0       /* RX_ER  (PD27, in,  f1) */
+                                >;
+                        };
+
+                        pio_ucc7: ucc_pin@6 {
+                                reg = <6>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO */
+                                        0   2  1  0  1  0       /* MDC  */
+
+                                        4   0  1  0  1  0       /* TxD0   (PE0,  out, f1) */
+                                        4   1  1  0  1  0       /* TxD1   (PE1,  out, f1) */
+                                        4   6  2  0  1  0       /* RxD0   (PE6,   in, f1) */
+                                        4   7  2  0  1  0       /* RxD1   (PE7,   in, f1) */
+                                        4   4  1  0  1  0       /* TX_EN  (PE4,  out, f1) */
+                                        4  12  2  0  1  0       /* RX_DV  (PE12,  in, f1) */
+                                        4  13  2  0  1  0       /* RX_ER  (PE13,  in, f1) */
+                                >;
+                        };
+
+                        pio_ucc8: ucc_pin@7 {
+                                reg = <7>;
+
+                                pio-map = <
+                                        /* port pin dir open_drain assignment has_irq */
+                                        0   1  3  0  2  0       /* MDIO */
+                                        0   2  1  0  1  0       /* MDC  */
+
+                                        4  14  1  0  2  0       /* TxD0   (PE14, out, f2) */
+                                        4  15  1  0  1  0       /* TxD1   (PE15, out, f1) */
+                                        4  20  2  0  1  0       /* RxD0   (PE20, in,  f1) */
+                                        4  21  2  0  1  0       /* RxD1   (PE21, in,  f1) */
+                                        4  18  1  0  1  0       /* TX_EN  (PE18, out, f1) */
+                                        4  26  2  0  1  0       /* RX_DV  (PE26, in,  f1) */
+                                        4  27  2  0  1  0       /* RX_ER  (PE27, in,  f1) */
+
+                                        2  15  2  0  1  0       /* UCCx_RMII_CLK (CLK16) */
+                                >;
+                        };
+
+                };
+
+                qe@100000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,qe";
+                        ranges = <0x0 0x100000 0x100000>;
+                        reg = <0x100000 0x480>;
+                        clock-frequency = <0>;  /* Filled in by U-Boot */
+                        brg-frequency = <0>;    /* Filled in by U-Boot */
+                        bus-frequency = <0>;    /* Filled in by U-Boot */
+
+                        muram@10000 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "fsl,qe-muram", "fsl,cpm-muram";
+                                ranges = <0x0 0x00010000 0x0000c000>;
+
+                                data-only@0 {
+                                        compatible = "fsl,qe-muram-data",
+                                                     "fsl,cpm-muram-data";
+                                        reg = <0x0 0xc000>;
+                                };
+                        };
+
+                        /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */
+                        enet_estar1: ucc@2000 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <1>;
+                                reg = <0x2000 0x200>;
+                                interrupts = <32>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk9";
+                                phy-handle = <&phy_estar1>;
+                                phy-connection-type = "rgmii-id";
+                                pio-handle = <&pio_ucc1>;
+                        };
+
+                        /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */
+                        enet_estar2: ucc@3000 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <2>;
+                                reg = <0x3000 0x200>;
+                                interrupts = <33>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk4";
+                                phy-handle = <&phy_estar2>;
+                                phy-connection-type = "rgmii-id";
+                                pio-handle = <&pio_ucc2>;
+                        };
+
+                        /* Piggy2 (UCC4, MDIO 0x00, RMII) */
+                        enet_piggy2: ucc@3200 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <4>;
+                                reg = <0x3200 0x200>;
+                                interrupts = <35>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk17";
+                                phy-handle = <&phy_piggy2>;
+                                phy-connection-type = "rmii";
+                                pio-handle = <&pio_ucc4>;
+                        };
+
+                        /* Eth-1 (UCC5, MDIO 0x08, RMII) */
+                        enet_eth1: ucc@2400 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <5>;
+                                reg = <0x2400 0x200>;
+                                interrupts = <40>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk16";
+                                phy-handle = <&phy_eth1>;
+                                phy-connection-type = "rmii";
+                                pio-handle = <&pio_ucc5>;
+                        };
+
+                        /* Eth-2 (UCC6, MDIO 0x09, RMII) */
+                        enet_eth2: ucc@3400 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <6>;
+                                reg = <0x3400 0x200>;
+                                interrupts = <41>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk16";
+                                phy-handle = <&phy_eth2>;
+                                phy-connection-type = "rmii";
+                                pio-handle = <&pio_ucc6>;
+                        };
+
+                        /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
+                        enet_eth3: ucc@2600 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <7>;
+                                reg = <0x2600 0x200>;
+                                interrupts = <42>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk16";
+                                phy-handle = <&phy_eth3>;
+                                phy-connection-type = "rmii";
+                                pio-handle = <&pio_ucc7>;
+                        };
+
+                        /* Eth-4 (UCC8, MDIO 0x0b, RMII) */
+                        enet_eth4: ucc@3600 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <8>;
+                                reg = <0x3600 0x200>;
+                                interrupts = <43>;
+                                interrupt-parent = <&qeic>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk16";
+                                phy-handle = <&phy_eth4>;
+                                phy-connection-type = "rmii";
+                                pio-handle = <&pio_ucc8>;
+                        };
+
+                        mdio@3320 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x3320 0x18>;
+                                compatible = "fsl,ucc-mdio";
+
+                                /* Piggy2 (UCC4, MDIO 0x00, RMII) */
+                                phy_piggy2: ethernet-phy@00 {
+                                        reg = <0x0>;
+                                };
+
+                                /* Eth-1 (UCC5, MDIO 0x08, RMII) */
+                                phy_eth1: ethernet-phy@08 {
+                                        reg = <0x08>;
+                                };
+
+                                /* Eth-2 (UCC6, MDIO 0x09, RMII) */
+                                phy_eth2: ethernet-phy@09 {
+                                        reg = <0x09>;
+                                };
+
+                                /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
+                                phy_eth3: ethernet-phy@0a {
+                                        reg = <0x0a>;
+                                };
+
+                                /* Eth-4 (UCC8, MDIO 0x0b, RMII) */
+                                phy_eth4: ethernet-phy@0b {
+                                        reg = <0x0b>;
+                                };
+
+                                /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */
+                                phy_estar1: ethernet-phy@10 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x10>;
+                                };
+
+                                /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */
+                                phy_estar2: ethernet-phy@11 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x11>;
+                                };
+                        };
+
+                        qeic: interrupt-controller@80 {
+                                interrupt-controller;
+                                compatible = "fsl,qe-ic";
+                                #address-cells = <0>;
+                                #interrupt-cells = <1>;
+                                reg = <0x80 0x80>;
+                                interrupts = <32 8 33 8>;
+                                interrupt-parent = <&ipic>;
+                        };
+                };
+        };
+
+        localbus@e0005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
+                             "simple-bus";
+                reg = <0xe0005000 0xd8>;
+                ranges = <0 0 0xf0000000 0x04000000>;   /* Filled in by U-Boot */
+
+                flash@f0000000,0 {
+                        compatible = "cfi-flash";
+                        /*
+                         * The Intel P30 chip has 2 non-identical chips on
+                         * one die, so we need to define 2 seperate regions
+                         * that are scanned by physmap_of independantly.
+                         */
+                        reg = <0 0x00000000 0x02000000
+                               0 0x02000000 0x02000000>;        /* Filled in by U-Boot */
+                        bank-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "u-boot";
+                                reg = <0 0x40000>;
+                        };
+                        partition@40000 {
+                                label = "env";
+                                reg = <0x40000 0x40000>;
+                        };
+                        partition@80000 {
+                                label = "dtb";
+                                reg = <0x80000 0x20000>;
+                        };
+                        partition@a0000 {
+                                label = "kernel";
+                                reg = <0xa0000 0x300000>;
+                        };
+                        partition@3a0000 {
+                                label = "ramdisk";
+                                reg = <0x3a0000 0x800000>;
+                        };
+                        partition@ba0000 {
+                                label = "user";
+                                reg = <0xba0000 0x3460000>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 2a1929acaabd..60f332778e41 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -17,6 +17,13 @@
         #address-cells = <1>;
         #size-cells = <1>;
 
+        aliases {
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+                serial0 = &scc1;
+                serial1 = &scc4;
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -46,13 +53,13 @@
                 #size-cells = <1>;
                 reg = <0xf0010100 0x40>;
 
-                ranges = <0x0 0x0 0xfe000000 0x2000000
+                ranges = <0x0 0x0 0xff800000 0x00800000
                           0x1 0x0 0xf4500000 0x8000
                           0x3 0x0 0xf8200000 0x8000>;
 
                 flash@0,0 {
                         compatible = "jedec-flash";
-                        reg = <0x0 0x0 0x2000000>;
+                        reg = <0x0 0x0 0x00800000>;
                         bank-width = <4>;
                         device-width = <1>;
                 };
@@ -144,7 +151,7 @@
                                 reg = <0x119f0 0x10 0x115f0 0x10>;
                         };
 
-                        serial@11a00 {
+                        scc1: serial@11a00 {
                                 device_type = "serial";
                                 compatible = "fsl,mpc8272-scc-uart",
                                              "fsl,cpm2-scc-uart";
@@ -155,7 +162,7 @@
                                 fsl,cpm-command = <0x800000>;
                         };
 
-                        serial@11a60 {
+                        scc4: serial@11a60 {
                                 device_type = "serial";
                                 compatible = "fsl,mpc8272-scc-uart",
                                              "fsl,cpm2-scc-uart";
@@ -192,7 +199,7 @@
                                 };
                         };
 
-                        ethernet@11300 {
+                        eth0: ethernet@11300 {
                                 device_type = "network";
                                 compatible = "fsl,mpc8272-fcc-enet",
                                              "fsl,cpm2-fcc-enet";
@@ -205,7 +212,7 @@
                                 fsl,cpm-command = <0x12000300>;
                         };
 
-                        ethernet@11320 {
+                        eth1: ethernet@11320 {
                                 device_type = "network";
                                 compatible = "fsl,mpc8272-fcc-enet",
                                              "fsl,cpm2-fcc-enet";
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 3f4c5fb988a0..32e10f588c1d 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -322,6 +322,21 @@
                         reg = <0x700 0x100>;
                         device_type = "ipic";
                 };
+
+                ipic-msi@7c0 {
+                        compatible = "fsl,ipic-msi";
+                        reg = <0x7c0 0x40>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <0x43 0x8
+                                      0x4  0x8
+                                      0x51 0x8
+                                      0x52 0x8
+                                      0x56 0x8
+                                      0x57 0x8
+                                      0x58 0x8
+                                      0x59 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
         };
 
         pci0: pci@e0008500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index e3eeaeda9187..feeeb7f9d609 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -156,7 +156,7 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <39 0x8>;
                         phy_type = "ulpi";
-                        port1;
+                        port0;
                 };
 
                 usb@23000 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index a2553a6f9009..230febb9b72f 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -153,7 +153,7 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <39 0x8>;
                         phy_type = "ulpi";
-                        port1;
+                        port0;
                 };
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 67bb372c9451..f32c2811c6d9 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -155,7 +155,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 053339390c22..224b4f0704b8 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -169,7 +169,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index a955a577db81..f720ab9af30d 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -155,7 +155,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 5d90e85704c3..474ea2fa3f86 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -169,7 +169,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index d266ddbfc28d..4fa221fd9bdc 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -153,7 +153,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 98ae95bd18f4..d4838af8d379 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -167,7 +167,7 @@
                         };
 
                         sdhci@2e000 {
-                                compatible = "fsl,mpc8379-esdhc";
+                                compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index 39c2927503cf..a8dcb018c4a5 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -24,6 +24,8 @@
                 ethernet1 = &enet1;
                 ethernet2 = &enet2;
                 ethernet3 = &enet3;
+                ethernet5 = &enet5;
+                ethernet7 = &enet7;
                 pci1 = &pci1;
                 rapidio0 = &rio0;
         };
@@ -70,8 +72,30 @@
                         #size-cells = <1>;
                         compatible = "cfi-flash";
                         reg = <0x0 0x0 0x02000000>;
-                        bank-width = <2>;
+                        bank-width = <1>;
                         device-width = <1>;
+                        partition@0 {
+                                label = "ramdisk";
+                                reg = <0x00000000 0x01c00000>;
+                        };
+                        partition@1c00000 {
+                                label = "kernel";
+                                reg = <0x01c00000 0x002e0000>;
+                        };
+                        partiton@1ee0000 {
+                                label = "dtb";
+                                reg = <0x01ee0000 0x00020000>;
+                        };
+                        partition@1f00000 {
+                                label = "firmware";
+                                reg = <0x01f00000 0x00080000>;
+                                read-only;
+                        };
+                        partition@1f80000 {
+                                label = "u-boot";
+                                reg = <0x01f80000 0x00080000>;
+                                read-only;
+                        };
                 };
 
                 bcsr@1,0 {
@@ -466,6 +490,37 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        qe_phy5: ethernet-phy@04 {
+                                interrupt-parent = <&mpic>;
+                                reg = <0x04>;
+                                device_type = "ethernet-phy";
+                        };
+                        qe_phy7: ethernet-phy@06 {
+                                interrupt-parent = <&mpic>;
+                                reg = <0x6>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+                mdio@3520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x3520 0x18>;
+                        compatible = "fsl,ucc-mdio";
+
+                        tbi0: tbi-phy@15 {
+                        reg = <0x15>;
+                        device_type = "tbi-phy";
+                        };
+                };
+                mdio@3720 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x3720 0x38>;
+                        compatible = "fsl,ucc-mdio";
+                        tbi1: tbi-phy@17 {
+                                reg = <0x17>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet2: ucc@2200 {
@@ -513,6 +568,36 @@
                         phy-connection-type = "rgmii-id";
                 };
 
+                enet5: ucc@3400 {
+                        device_type = "network";
+                        compatible = "ucc_geth";
+                        cell-index = <6>;
+                        reg = <0x3400 0x200>;
+                        interrupts = <41>;
+                        interrupt-parent = <&qeic>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        rx-clock-name = "none";
+                        tx-clock-name = "none";
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&qe_phy5>;
+                        phy-connection-type = "sgmii";
+                };
+
+                enet7: ucc@3600 {
+                        device_type = "network";
+                        compatible = "ucc_geth";
+                        cell-index = <8>;
+                        reg = <0x3600 0x200>;
+                        interrupts = <43>;
+                        interrupt-parent = <&qeic>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        rx-clock-name = "none";
+                        tx-clock-name = "none";
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&qe_phy7>;
+                        phy-connection-type = "sgmii";
+                };
+
                 muram@10000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index cfc2c60d1f5f..f468d215f716 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -100,8 +100,18 @@
                 };
 
                 board-control@3,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         compatible = "fsl,fpga-pixis";
                         reg = <3 0 0x20>;
+                        ranges = <0 3 0 0x20>;
+
+                        sdcsr_pio: gpio-controller@a {
+                                #gpio-cells = <2>;
+                                compatible = "fsl,fpga-pixis-gpio-bank";
+                                reg = <0xa 1>;
+                                gpio-controller;
+                        };
                 };
         };
 
@@ -176,6 +186,28 @@
                         interrupt-parent = <&mpic>;
                 };
 
+                spi@7000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc8610-spi", "fsl,spi";
+                        reg = <0x7000 0x40>;
+                        cell-index = <0>;
+                        interrupts = <59 2>;
+                        interrupt-parent = <&mpic>;
+                        mode = "cpu";
+                        gpios = <&sdcsr_pio 7 0>;
+
+                        mmc-slot@0 {
+                                compatible = "fsl,mpc8610hpcd-mmc-slot",
+                                             "mmc-spi-slot";
+                                reg = <0>;
+                                gpios = <&sdcsr_pio 0 1   /* nCD */
+                                         &sdcsr_pio 1 0>; /*  WP */
+                                voltage-ranges = <3300 3300>;
+                                spi-max-frequency = <50000000>;
+                        };
+                };
+
                 display@2c000 {
                         compatible = "fsl,diu";
                         reg = <0x2c000 100>;
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 895834713894..30bfdc04c6df 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -258,34 +258,16 @@
                                 compatible = "nxp,pcf8563";
                                 reg = <0x51>;
                         };
-                        /* FIXME: EEPROM */
+                        eeprom@52 {
+                                compatible = "catalyst,24c32";
+                                reg = <0x52>;
+                        };
                 };
 
                 sram@8000 {
                         compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
                         reg = <0x8000 0x4000>;
                 };
-
-                /* This is only an example device to show the usage of gpios. It maps all available
-                 * gpios to the "gpio-provider" device.
-                 */
-                gpio {
-                        compatible = "gpio-provider";
-
-                                                    /* mpc52xx          exp.con         patchfield */
-                        gpios = <&gpio_wkup     0 0 /* GPIO_WKUP_7      11d             jp13-3     */
-                                 &gpio_wkup     1 0 /* GPIO_WKUP_6      14c                        */
-                                 &gpio_wkup     6 0 /* PSC2_4           43c             x5-11      */
-                                 &gpio_simple   2 0 /* IRDA_1           24c             x7-6    set GPS_PORT_CONFIG[IRDA] = 0 */
-                                 &gpio_simple   3 0 /* IRDA_0                           x8-5    set GPS_PORT_CONFIG[IRDA] = 0 */
-                                 &gpt2          0 0 /* timer2           12d             x4-4       */
-                                 &gpt3          0 0 /* timer3           13d             x6-4       */
-                                 &gpt4          0 0 /* timer4           61c             x2-16      */
-                                 &gpt5          0 0 /* timer5           44c             x7-11      */
-                                 &gpt6          0 0 /* timer6           60c             x8-15      */
-                                 &gpt7          0 0 /* timer7           36a             x17-9      */
-                                 >;
-                };
         };
 
         pci@f0000d00 {
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 5fb6f6684b0e..2d9fa68f641c 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -144,7 +144,7 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <39 0x8>;
                         phy_type = "ulpi";
-                        port1;
+                        port0;
                 };
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
diff --git a/arch/powerpc/boot/dts/xcalibur1501.dts b/arch/powerpc/boot/dts/xcalibur1501.dts
new file mode 100644
index 000000000000..ac0a617b4299
--- /dev/null
+++ b/arch/powerpc/boot/dts/xcalibur1501.dts
@@ -0,0 +1,696 @@
+/*
+ * Copyright (C) 2008 Extreme Engineering Solutions, Inc.
+ * Based on MPC8572DS device tree from Freescale Semiconductor, Inc.
+ *
+ * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/ {
+        model = "xes,xcalibur1501";
+        compatible = "xes,xcalibur1501", "xes,MPC8572";
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0 0x0 0x0>;        // Filled in by U-Boot
+        };
+
+        localbus@ef005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xef005000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+                /* Local bus region mappings */
+                ranges = <0 0 0 0xf8000000 0x8000000  /* CS0: Flash 1 */
+                          1 0 0 0xf0000000 0x8000000  /* CS1: Flash 2 */
+                          2 0 0 0xef800000 0x40000    /* CS2: NAND CE1 */
+                          3 0 0 0xef840000 0x40000    /* CS3: NAND CE2 */
+                          4 0 0 0xe9000000 0x100000>; /* CS4: USB */
+
+                nor-boot@0,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        reg = <0 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Primary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Primary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Primary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Primary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Primary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        //reg = <0xf0000000 0x08000000>; /* 128MB */
+                        reg = <1 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Secondary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Secondary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Secondary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Secondary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Secondary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /*
+                         * Actual part could be ST Micro NAND08GW3B2A (1 GB),
+                         * Micron MT29F8G08DAA (2x 512 MB), or Micron
+                         * MT29F16G08FAA (2x 1 GB), depending on the build
+                         * configuration
+                         */
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <2 0 0x40000>;
+                        /* U-Boot should fix this up if chip size > 1 GB */
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+
+                usb@4,0 {
+                        compatible = "nxp,usb-isp1761";
+                        reg = <4 0 0x100000>;
+                        bus-width = <32>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <10 1>;
+                };
+        };
+
+        soc8572@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8572-immr", "simple-bus";
+                ranges = <0x0 0 0xef000000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x100000>; // L2, 1M
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        temp-sensor@48 {
+                                compatible = "dallas,ds1631", "dallas,ds1621";
+                                reg = <0x48>;
+                        };
+
+                        temp-sensor@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        cpu-supervisor@51 {
+                                compatible = "dallas,ds4510";
+                                reg = <0x51>;
+                        };
+
+                        eeprom@54 {
+                                compatible = "atmel,at24c128b";
+                                reg = <0x54>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        pcie-switch@6a {
+                                compatible = "plx,pex8648";
+                                reg = <0x6a>;
+                        };
+
+                        /* On-board signals for VID, flash, serial */
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9557";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* PMC0/XMC0 signals */
+                        gpio2: gpio@1c {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1c>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* PMC1/XMC1 signals */
+                        gpio3: gpio@1d {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1d>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* CompactPCI signals (sysen, GA[4:0]) */
+                        gpio4: gpio@1e {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1e>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* CompactPCI J5 GPIO and FAL/DEG/PRST */
+                        gpio5: gpio@1f {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1f>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC 1 front panel 0 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <4 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <4 1>;
+                                        reg = <0x2>;
+                                };
+                                phy2: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x3>;
+                                };
+                                phy3: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x4>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 2 front panel 1 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 3 PICMG2.16 backplane port 0 */
+                enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 4 PICMG2.16 backplane port 1 */
+                enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
+                        phy-handle = <&phy3>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* UART0 */
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* UART1 */
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                gpio0: gpio@f000 {
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x1000>;
+                        interrupts = <47 2>;
+                        interrupt-parent = <&mpic>;
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                };
+
+                gpio-leds {
+                        compatible = "gpio-leds";
+
+                        heartbeat {
+                                label = "Heartbeat";
+                                gpios = <&gpio0 4 1>;
+                                linux,default-trigger = "heartbeat";
+                        };
+
+                        yellow {
+                                label = "Yellow";
+                                gpios = <&gpio0 5 1>;
+                        };
+
+                        red {
+                                label = "Red";
+                                gpios = <&gpio0 6 1>;
+                        };
+
+                        green {
+                                label = "Green";
+                                gpios = <&gpio0 7 1>;
+                        };
+                };
+
+                /* PME (pattern-matcher) */
+                pme@10000 {
+                        compatible = "fsl,mpc8572-pme", "pme8572";
+                        reg = <0x10000 0x5000>;
+                        interrupts = <57 2 64 2 65 2 66 2 67 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@2f000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x2f000 0x1000>;
+                        interupts = <61 2 >;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@15000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x15000 0x1000>;
+                        interupts = <75 2>;
+                        interrupt-parent = <&mpic>;
+                };
+        };
+
+        /*
+         * PCI Express controller 3 @ ef008000 is not used.
+         * This would have been pci0 on other mpc85xx platforms.
+         *
+         * PCI Express controller 2 @ ef009000 is not used.
+         * This would have been pci1 on other mpc85xx platforms.
+         */
+
+        /* PCI Express controller 1, wired to PEX8648 PCIe switch */
+        pci2: pcie@ef00a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef00a000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000
+                          0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/xpedite5200.dts b/arch/powerpc/boot/dts/xpedite5200.dts
new file mode 100644
index 000000000000..a0cf53fbd55c
--- /dev/null
+++ b/arch/powerpc/boot/dts/xpedite5200.dts
@@ -0,0 +1,466 @@
+/*
+ * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
+ * Based on TQM8548 device tree
+ *
+ * XPedite5200 PrPMC/XMC module based on MPC8548E
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "xes,xpedite5200";
+        compatible = "xes,xpedite5200", "xes,MPC8548";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8548@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;        // L1, 32K
+                        i-cache-size = <0x8000>;        // L1, 32K
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0>;        // Filled in by U-Boot
+        };
+
+        soc@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xef000000 0x100000>;
+                bus-frequency = <0>;
+                compatible = "fsl,mpc8548-immr", "simple-bus";
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8548-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8548-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                /* On-card I2C */
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        /*
+                         * Board GPIO:
+                         *      0: BRD_CFG0 (1: P14 IO present)
+                         *      1: BRD_CFG1 (1: FP ethernet present)
+                         *      2: BRD_CFG2 (1: XMC IO present)
+                         *      3: XMC root complex indicator
+                         *      4: Flash boot device indicator
+                         *      5: Flash write protect enable
+                         *      6: PMC monarch indicator
+                         *      7: PMC EREADY
+                         */
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9556";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* P14 GPIO */
+                        gpio2: gpio@19 {
+                                compatible = "nxp,pca9556";
+                                reg = <0x19>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        eeprom@50 {
+                                compatible = "atmel,at24c16";
+                                reg = <0x50>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        dtt@48 {
+                                compatible = "maxim,max1237";
+                                reg = <0x34>;
+                        };
+                };
+
+                /* Off-card I2C */
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC1: Front panel port 0 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x2>;
+                                };
+                                phy2: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x3>;
+                                };
+                                phy3: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x4>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC2: Front panel port 1 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC3: Rear panel port 2 */
+                enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
+                        phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC4: Rear panel port 3 */
+                enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
+                        phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        // global utilities reg
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+        localbus@ef005000 {
+                compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xef005000 0x100>;       // BRx, ORx, etc.
+
+                ranges = <
+                        0 0x0 0xfc000000 0x04000000     // NOR boot flash
+                        1 0x0 0xf8000000 0x04000000     // NOR expansion flash
+                        2 0x0 0xef800000 0x00010000     // NAND CE1
+                        3 0x0 0xef840000 0x00010000     // NAND CE2
+                >;
+
+                nor-boot@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0 0x0 0x4000000>;
+                        bank-width = <2>;
+
+                        partition@0 {
+                                label = "Primary OS";
+                                reg = <0x00000000 0x180000>;
+                        };
+                        partition@180000 {
+                                label = "Secondary OS";
+                                reg = <0x00180000 0x180000>;
+                        };
+                        partition@300000 {
+                                label = "User";
+                                reg = <0x00300000 0x3c80000>;
+                        };
+                        partition@3f80000 {
+                                label = "Boot firmware";
+                                reg = <0x03f80000 0x80000>;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <1 0x0 0x4000000>;
+                        bank-width = <2>;
+
+                        partition@0 {
+                                label = "Filesystem";
+                                reg = <0x00000000 0x3f80000>;
+                        };
+                        partition@3f80000 {
+                                label = "Alternate boot firmware";
+                                reg = <0x03f80000 0x80000>;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "xes,address-ctl-nand";
+                        reg = <2 0x0 0x10000>;
+                        cle-line = <0x8>;       /* CLE tied to A3 */
+                        ale-line = <0x10>;      /* ALE tied to A4 */
+
+                        /* U-Boot should fix this up */
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+        };
+
+        /* PMC interface */
+        pci0: pci@ef008000 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <0xef008000 0x1000>;
+                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                                /* IDSEL */
+                                 0xe000 0 0 1 &mpic 2 1
+                                 0xe000 0 0 2 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0 0x80000000 0x80000000 0 0x40000000
+                          0x01000000 0 0x00000000 0xe8000000 0 0x00800000>;
+        };
+
+        /* XMC PCIe is not yet enabled in U-Boot on XPedite5200 */
+};
diff --git a/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
new file mode 100644
index 000000000000..c5b29752651a
--- /dev/null
+++ b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
@@ -0,0 +1,506 @@
+/*
+ * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
+ * Based on TQM8548 device tree
+ *
+ * XPedite5200 PrPMC/XMC module based on MPC8548E.  This dts is for the
+ * xMon boot loader memory map which differs from U-Boot's.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "xes,xpedite5200";
+        compatible = "xes,xpedite5200", "xes,MPC8548";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        form-factor = "PMC/XMC";
+        boot-bank = <0x0>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8548@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;        // L1, 32K
+                        i-cache-size = <0x8000>;        // L1, 32K
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0>;        // Filled in by boot loader
+        };
+
+        soc@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xef000000 0x100000>;
+                bus-frequency = <0>;
+                compatible = "fsl,mpc8548-immr", "simple-bus";
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8548-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8548-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                /* On-card I2C */
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        /*
+                         * Board GPIO:
+                         *      0: BRD_CFG0 (1: P14 IO present)
+                         *      1: BRD_CFG1 (1: FP ethernet present)
+                         *      2: BRD_CFG2 (1: XMC IO present)
+                         *      3: XMC root complex indicator
+                         *      4: Flash boot device indicator
+                         *      5: Flash write protect enable
+                         *      6: PMC monarch indicator
+                         *      7: PMC EREADY
+                         */
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9556";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        /* P14 GPIO */
+                        gpio2: gpio@19 {
+                                compatible = "nxp,pca9556";
+                                reg = <0x19>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        eeprom@50 {
+                                compatible = "atmel,at24c16";
+                                reg = <0x50>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        dtt@48 {
+                                compatible = "maxim,max1237";
+                                reg = <0x34>;
+                        };
+                };
+
+                /* Off-card I2C */
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC1: Front panel port 0 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x2>;
+                                };
+                                phy2: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x3>;
+                                };
+                                phy3: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x4>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC2: Front panel port 1 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC3: Rear panel port 2 */
+                enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
+                        phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC4: Rear panel port 3 */
+                enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
+                        phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        current-speed = <9600>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        current-speed = <9600>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        // global utilities reg
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+        localbus@ef005000 {
+                compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xef005000 0x100>;       // BRx, ORx, etc.
+
+                ranges = <
+                        0 0x0 0xf8000000 0x08000000     // NOR boot flash
+                        1 0x0 0xf0000000 0x08000000     // NOR expansion flash
+                        2 0x0 0xe8000000 0x00010000     // NAND CE1
+                        3 0x0 0xe8010000 0x00010000     // NAND CE2
+                >;
+
+                nor-boot@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0 0x0 0x4000000>;
+                        bank-width = <2>;
+
+                        partition@0 {
+                                label = "Primary OS";
+                                reg = <0x00000000 0x180000>;
+                        };
+                        partition@180000 {
+                                label = "Secondary OS";
+                                reg = <0x00180000 0x180000>;
+                        };
+                        partition@300000 {
+                                label = "User";
+                                reg = <0x00300000 0x3c80000>;
+                        };
+                        partition@3f80000 {
+                                label = "Boot firmware";
+                                reg = <0x03f80000 0x80000>;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <1 0x0 0x4000000>;
+                        bank-width = <2>;
+
+                        partition@0 {
+                                label = "Filesystem";
+                                reg = <0x00000000 0x3f80000>;
+                        };
+                        partition@3f80000 {
+                                label = "Alternate boot firmware";
+                                reg = <0x03f80000 0x80000>;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "xes,address-ctl-nand";
+                        reg = <2 0x0 0x10000>;
+                        cle-line = <0x8>;       /* CLE tied to A3 */
+                        ale-line = <0x10>;      /* ALE tied to A4 */
+
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+        };
+
+        /* PMC interface */
+        pci0: pci@ef008000 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <0xef008000 0x1000>;
+                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                                /* IDSEL */
+                                 0xe000 0 0 1 &mpic 2 1
+                                 0xe000 0 0 2 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
+        };
+
+        /* XMC PCIe */
+        pci1: pcie@ef00a000 {
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x00000 0 0 1 &mpic 0 1
+                        0x00000 0 0 2 &mpic 1 1
+                        0x00000 0 0 3 &mpic 2 1
+                        0x00000 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                bus-range = <0 0xff>;
+                ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xd1000000 0 0x01000000>;
+                clock-frequency = <33333333>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xef00a000 0x1000>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0 0xc0000000 0x02000000 0
+                                  0xc0000000 0 0x20000000
+                                  0x01000000 0 0x00000000 0x01000000 0
+                                  0x00000000 0 0x08000000>;
+                };
+        };
+
+        /* Needed for dtbImage boot wrapper compatibility */
+        chosen {
+                linux,stdout-path = &serial0;
+        };
+};
diff --git a/arch/powerpc/boot/dts/xpedite5301.dts b/arch/powerpc/boot/dts/xpedite5301.dts
new file mode 100644
index 000000000000..db7faf5ebb39
--- /dev/null
+++ b/arch/powerpc/boot/dts/xpedite5301.dts
@@ -0,0 +1,640 @@
+/*
+ * Copyright (C) 2008 Extreme Engineering Solutions, Inc.
+ * Based on MPC8572DS device tree from Freescale Semiconductor, Inc.
+ *
+ * XPedite5301 PMC/XMC module based on MPC8572E
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/ {
+        model = "xes,xpedite5301";
+        compatible = "xes,xpedite5301", "xes,MPC8572";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        form-factor = "PMC/XMC";
+        boot-bank = <0x0>;      /* 0: Primary flash, 1: Secondary flash */
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0 0x0 0x0>;        // Filled in by U-Boot
+        };
+
+        localbus@ef005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xef005000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+                /* Local bus region mappings */
+                ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */
+                          1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */
+                          2 0 0 0xef800000 0x40000   /* CS2: NAND CE1 */
+                          3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */
+
+                nor-boot@0,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        reg = <0 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Primary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Primary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Primary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Primary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Primary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        //reg = <0xf0000000 0x08000000>; /* 128MB */
+                        reg = <1 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Secondary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Secondary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Secondary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Secondary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Secondary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /*
+                         * Actual part could be ST Micro NAND08GW3B2A (1 GB),
+                         * Micron MT29F8G08DAA (2x 512 MB), or Micron
+                         * MT29F16G08FAA (2x 1 GB), depending on the build
+                         * configuration
+                         */
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <2 0 0x40000>;
+                        /* U-Boot should fix this up if chip size > 1 GB */
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+
+        };
+
+        soc8572@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8572-immr", "simple-bus";
+                ranges = <0x0 0 0xef000000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x100000>; // L2, 1M
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        temp-sensor@48 {
+                                compatible = "dallas,ds1631", "dallas,ds1621";
+                                reg = <0x48>;
+                        };
+
+                        temp-sensor@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        cpu-supervisor@51 {
+                                compatible = "dallas,ds4510";
+                                reg = <0x51>;
+                        };
+
+                        eeprom@54 {
+                                compatible = "atmel,at24c128b";
+                                reg = <0x54>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        pcie-switch@70 {
+                                compatible = "plx,pex8518";
+                                reg = <0x70>;
+                        };
+
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9557";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio2: gpio@1c {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1c>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio3: gpio@1e {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1e>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio4: gpio@1f {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1f>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC 1 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x2>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 2 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* UART0 */
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* UART1 */
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                gpio0: gpio@f000 {
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x1000>;
+                        interrupts = <47 2>;
+                        interrupt-parent = <&mpic>;
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                };
+
+                gpio-leds {
+                        compatible = "gpio-leds";
+
+                        heartbeat {
+                                label = "Heartbeat";
+                                gpios = <&gpio0 4 1>;
+                                linux,default-trigger = "heartbeat";
+                        };
+
+                        yellow {
+                                label = "Yellow";
+                                gpios = <&gpio0 5 1>;
+                        };
+
+                        red {
+                                label = "Red";
+                                gpios = <&gpio0 6 1>;
+                        };
+
+                        green {
+                                label = "Green";
+                                gpios = <&gpio0 7 1>;
+                        };
+                };
+
+                /* PME (pattern-matcher) */
+                pme@10000 {
+                        compatible = "fsl,mpc8572-pme", "pme8572";
+                        reg = <0x10000 0x5000>;
+                        interrupts = <57 2 64 2 65 2 66 2 67 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@2f000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x2f000 0x1000>;
+                        interupts = <61 2 >;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@15000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x15000 0x1000>;
+                        interupts = <75 2>;
+                        interrupt-parent = <&mpic>;
+                };
+        };
+
+        /*
+         * PCI Express controller 3 @ ef008000 is not used.
+         * This would have been pci0 on other mpc85xx platforms.
+         */
+
+        /* PCI Express controller 2, wired to XMC P15 connector */
+        pci1: pcie@ef009000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef009000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <25 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x10000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        /* PCI Express controller 1, wired to PEX8112 for PMC interface */
+        pci2: pcie@ef00a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef00a000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000
+                          0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/xpedite5330.dts b/arch/powerpc/boot/dts/xpedite5330.dts
new file mode 100644
index 000000000000..c364ca6ff7d0
--- /dev/null
+++ b/arch/powerpc/boot/dts/xpedite5330.dts
@@ -0,0 +1,707 @@
+/*
+ * Copyright (C) 2008 Extreme Engineering Solutions, Inc.
+ * Based on MPC8572DS device tree from Freescale Semiconductor, Inc.
+ *
+ * XPedite5330 3U CompactPCI module based on MPC8572E
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/ {
+        model = "xes,xpedite5330";
+        compatible = "xes,xpedite5330", "xes,MPC8572";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        form-factor = "3U CompactPCI";
+        boot-bank = <0x0>;      /* 0: Primary flash, 1: Secondary flash */
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        pmcslots {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                pmcslot@0 {
+                        cell-index = <0>;
+                        /*
+                         * boolean properties (true if defined):
+                         *     monarch;
+                         *     module-present;
+                         */
+                };
+        };
+
+        xmcslots {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                xmcslot@0 {
+                        cell-index = <0>;
+                        /*
+                         * boolean properties (true if defined):
+                         *     module-present;
+                         */
+                };
+        };
+
+        cpci {
+                /*
+                 * boolean properties (true if defined):
+                 *     system-controller;
+                 */
+                system-controller;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0 0x0 0x0>;        // Filled in by U-Boot
+        };
+
+        localbus@ef005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xef005000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+                /* Local bus region mappings */
+                ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */
+                          1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */
+                          2 0 0 0xef800000 0x40000   /* CS2: NAND CE1 */
+                          3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */
+
+                nor-boot@0,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        reg = <0 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Primary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Primary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Primary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Primary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Primary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        //reg = <0xf0000000 0x08000000>; /* 128MB */
+                        reg = <1 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Secondary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Secondary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Secondary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Secondary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Secondary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /*
+                         * Actual part could be ST Micro NAND08GW3B2A (1 GB),
+                         * Micron MT29F8G08DAA (2x 512 MB), or Micron
+                         * MT29F16G08FAA (2x 1 GB), depending on the build
+                         * configuration
+                         */
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <2 0 0x40000>;
+                        /* U-Boot should fix this up if chip size > 1 GB */
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+
+        };
+
+        soc8572@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8572-immr", "simple-bus";
+                ranges = <0x0 0 0xef000000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x100000>; // L2, 1M
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        temp-sensor@48 {
+                                compatible = "dallas,ds1631", "dallas,ds1621";
+                                reg = <0x48>;
+                        };
+
+                        temp-sensor@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        cpu-supervisor@51 {
+                                compatible = "dallas,ds4510";
+                                reg = <0x51>;
+                        };
+
+                        eeprom@54 {
+                                compatible = "atmel,at24c128b";
+                                reg = <0x54>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        pcie-switch@70 {
+                                compatible = "plx,pex8518";
+                                reg = <0x70>;
+                        };
+
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9557";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio2: gpio@1c {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1c>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio3: gpio@1e {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1e>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio4: gpio@1f {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1f>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC 1 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x2>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 2 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* UART0 */
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* UART1 */
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                gpio0: gpio@f000 {
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x1000>;
+                        interrupts = <47 2>;
+                        interrupt-parent = <&mpic>;
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                };
+
+                gpio-leds {
+                        compatible = "gpio-leds";
+
+                        heartbeat {
+                                label = "Heartbeat";
+                                gpios = <&gpio0 4 1>;
+                                linux,default-trigger = "heartbeat";
+                        };
+
+                        yellow {
+                                label = "Yellow";
+                                gpios = <&gpio0 5 1>;
+                        };
+
+                        red {
+                                label = "Red";
+                                gpios = <&gpio0 6 1>;
+                        };
+
+                        green {
+                                label = "Green";
+                                gpios = <&gpio0 7 1>;
+                        };
+                };
+
+                /* PME (pattern-matcher) */
+                pme@10000 {
+                        compatible = "fsl,mpc8572-pme", "pme8572";
+                        reg = <0x10000 0x5000>;
+                        interrupts = <57 2 64 2 65 2 66 2 67 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@2f000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x2f000 0x1000>;
+                        interupts = <61 2 >;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@15000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x15000 0x1000>;
+                        interupts = <75 2>;
+                        interrupt-parent = <&mpic>;
+                };
+        };
+
+        /* PCI Express controller 3 - CompactPCI bus via PEX8112 bridge */
+        pci0: pcie@ef008000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef008000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe9000000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        0x0 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0x0 0xe0000000
+                                  0x02000000 0x0 0xe0000000
+                                  0x0 0x10000000
+
+                                  0x01000000 0x0 0x0
+                                  0x01000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        /* PCI Express controller 2, PMC module via PEX8112 bridge */
+        pci1: pcie@ef009000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef009000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <25 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x10000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        /* PCI Express controller 1, XMC P15 */
+        pci2: pcie@ef00a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef00a000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000
+                          0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/xpedite5370.dts b/arch/powerpc/boot/dts/xpedite5370.dts
new file mode 100644
index 000000000000..7a8a4afd56cf
--- /dev/null
+++ b/arch/powerpc/boot/dts/xpedite5370.dts
@@ -0,0 +1,638 @@
+/*
+ * Copyright (C) 2008 Extreme Engineering Solutions, Inc.
+ * Based on MPC8572DS device tree from Freescale Semiconductor, Inc.
+ *
+ * XPedite5370 3U VPX single-board computer based on MPC8572E
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/ {
+        model = "xes,xpedite5370";
+        compatible = "xes,xpedite5370", "xes,MPC8572";
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0 0x0 0x0>;        // Filled in by U-Boot
+        };
+
+        localbus@ef005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xef005000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+                /* Local bus region mappings */
+                ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */
+                          1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */
+                          2 0 0 0xef800000 0x40000   /* CS2: NAND CE1 */
+                          3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */
+
+                nor-boot@0,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        reg = <0 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Primary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Primary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Primary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Primary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Primary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nor-alternate@1,0 {
+                        compatible = "amd,s29gl01gp", "cfi-flash";
+                        bank-width = <2>;
+                        //reg = <0xf0000000 0x08000000>; /* 128MB */
+                        reg = <1 0 0x8000000>; /* 128MB */
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "Secondary user space";
+                                reg = <0x00000000 0x6f00000>; /* 111 MB */
+                        };
+                        partition@6f00000 {
+                                label = "Secondary kernel";
+                                reg = <0x6f00000 0x1000000>; /* 16 MB */
+                        };
+                        partition@7f00000 {
+                                label = "Secondary DTB";
+                                reg = <0x7f00000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f40000 {
+                                label = "Secondary U-Boot environment";
+                                reg = <0x7f40000 0x40000>; /* 256 KB */
+                        };
+                        partition@7f80000 {
+                                label = "Secondary U-Boot";
+                                reg = <0x7f80000 0x80000>; /* 512 KB */
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /*
+                         * Actual part could be ST Micro NAND08GW3B2A (1 GB),
+                         * Micron MT29F8G08DAA (2x 512 MB), or Micron
+                         * MT29F16G08FAA (2x 1 GB), depending on the build
+                         * configuration
+                         */
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <2 0 0x40000>;
+                        /* U-Boot should fix this up if chip size > 1 GB */
+                        partition@0 {
+                                label = "NAND Filesystem";
+                                reg = <0 0x40000000>;
+                        };
+                };
+
+        };
+
+        soc8572@ef000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8572-immr", "simple-bus";
+                ranges = <0x0 0 0xef000000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x100000>; // L2, 1M
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        temp-sensor@48 {
+                                compatible = "dallas,ds1631", "dallas,ds1621";
+                                reg = <0x48>;
+                        };
+
+                        temp-sensor@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        cpu-supervisor@51 {
+                                compatible = "dallas,ds4510";
+                                reg = <0x51>;
+                        };
+
+                        eeprom@54 {
+                                compatible = "atmel,at24c128b";
+                                reg = <0x54>;
+                        };
+
+                        rtc@68 {
+                                compatible = "stm,m41t00",
+                                             "dallas,ds1338";
+                                reg = <0x68>;
+                        };
+
+                        pcie-switch@70 {
+                                compatible = "plx,pex8518";
+                                reg = <0x70>;
+                        };
+
+                        gpio1: gpio@18 {
+                                compatible = "nxp,pca9557";
+                                reg = <0x18>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio2: gpio@1c {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1c>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio3: gpio@1e {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1e>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+
+                        gpio4: gpio@1f {
+                                compatible = "nxp,pca9557";
+                                reg = <0x1f>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                polarity = <0x00>;
+                        };
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                /* eTSEC 1 */
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x1>;
+                                };
+                                phy1: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <0x2>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* eTSEC 2 */
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "sgmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                /* UART0 */
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* UART1 */
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                gpio0: gpio@f000 {
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x1000>;
+                        interrupts = <47 2>;
+                        interrupt-parent = <&mpic>;
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                };
+
+                gpio-leds {
+                        compatible = "gpio-leds";
+
+                        heartbeat {
+                                label = "Heartbeat";
+                                gpios = <&gpio0 4 1>;
+                                linux,default-trigger = "heartbeat";
+                        };
+
+                        yellow {
+                                label = "Yellow";
+                                gpios = <&gpio0 5 1>;
+                        };
+
+                        red {
+                                label = "Red";
+                                gpios = <&gpio0 6 1>;
+                        };
+
+                        green {
+                                label = "Green";
+                                gpios = <&gpio0 7 1>;
+                        };
+                };
+
+                /* PME (pattern-matcher) */
+                pme@10000 {
+                        compatible = "fsl,mpc8572-pme", "pme8572";
+                        reg = <0x10000 0x5000>;
+                        interrupts = <57 2 64 2 65 2 66 2 67 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@2f000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x2f000 0x1000>;
+                        interupts = <61 2 >;
+                        interrupt-parent = <&mpic>;
+                };
+
+                tlu@15000 {
+                        compatible = "fsl,mpc8572-tlu", "fsl_tlu";
+                        reg = <0x15000 0x1000>;
+                        interupts = <75 2>;
+                        interrupt-parent = <&mpic>;
+                };
+        };
+
+        /*
+         * PCI Express controller 3 @ ef008000 is not used.
+         * This would have been pci0 on other mpc85xx platforms.
+         */
+
+        /* PCI Express controller 2, wired to VPX P1,P2 backplane */
+        pci1: pcie@ef009000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef009000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <25 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x10000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        /* PCI Express controller 1, wired to PEX8518 PCIe switch */
+        pci2: pcie@ef00a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xef00a000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000
+                          0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0x0 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 3ac75aecdb94..4db487d1d2a8 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -225,6 +225,10 @@ asp834x-redboot)
     platformo="$object/fixed-head.o $object/redboot-83xx.o"
     binary=y
     ;;
+xpedite52*)
+    link_address='0x1400000'
+    platformo=$object/cuboot-85xx.o
+    ;;
 esac
 
 vmz="$tmpdir/`basename \"$kernel\"`.$ext"
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
new file mode 100644
index 000000000000..bf0853f29f31
--- /dev/null
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -0,0 +1,908 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28
+# Fri Apr  3 10:34:33 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_FSL_EMB_PERFMON is not set
+# CONFIG_ALTIVEC is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_MPC5121_GENERIC is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_PPC_83xx=y
+# CONFIG_MPC831x_RDB is not set
+# CONFIG_MPC832x_MDS is not set
+# CONFIG_MPC832x_RDB is not set
+# CONFIG_MPC834x_MDS is not set
+# CONFIG_MPC834x_ITX is not set
+# CONFIG_MPC836x_MDS is not set
+# CONFIG_MPC836x_RDK is not set
+# CONFIG_MPC837x_MDS is not set
+# CONFIG_MPC837x_RDB is not set
+# CONFIG_SBC834x is not set
+# CONFIG_ASP834x is not set
+CONFIG_KMETER1=y
+# CONFIG_PPC_86xx is not set
+# CONFIG_EMBEDDED6xx is not set
+CONFIG_IPIC=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+CONFIG_QUICC_ENGINE=y
+# CONFIG_QE_GPIO is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_KEXEC is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_PM is not set
+# CONFIG_SECCOMP is not set
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_FSL_SOC=y
+CONFIG_PPC_PCI_CHOICE=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+CONFIG_MTD_PHRAM=y
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+CONFIG_MTD_UBI_GLUEBI=y
+
+#
+# UBI debugging options
+#
+CONFIG_MTD_UBI_DEBUG=y
+# CONFIG_MTD_UBI_DEBUG_MSG is not set
+# CONFIG_MTD_UBI_DEBUG_PARANOID is not set
+# CONFIG_MTD_UBI_DEBUG_DISABLE_BGT is not set
+# CONFIG_MTD_UBI_DEBUG_USERSPACE_IO is not set
+# CONFIG_MTD_UBI_DEBUG_EMULATE_BITFLIPS is not set
+# CONFIG_MTD_UBI_DEBUG_EMULATE_WRITE_FAILURES is not set
+# CONFIG_MTD_UBI_DEBUG_EMULATE_ERASE_FAILURES is not set
+
+#
+# Additional UBI debugging messages
+#
+# CONFIG_MTD_UBI_DEBUG_MSG_BLD is not set
+# CONFIG_MTD_UBI_DEBUG_MSG_EBA is not set
+# CONFIG_MTD_UBI_DEBUG_MSG_WL is not set
+# CONFIG_MTD_UBI_DEBUG_MSG_IO is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=y
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_GIANFAR is not set
+CONFIG_UCC_GETH=y
+# CONFIG_UGETH_MAGIC_PACKET is not set
+# CONFIG_UGETH_FILTERING is not set
+# CONFIG_UGETH_TX_ON_DEMAND is not set
+# CONFIG_MV643XX_ETH is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+CONFIG_WAN=y
+CONFIG_HDLC=y
+# CONFIG_HDLC_RAW is not set
+# CONFIG_HDLC_RAW_ETH is not set
+# CONFIG_HDLC_CISCO is not set
+# CONFIG_HDLC_FR is not set
+# CONFIG_HDLC_PPP is not set
+
+#
+# X.25/LAPB support is disabled
+#
+CONFIG_HDLC_KM=y
+CONFIG_FS_UCC_HDLC=y
+# CONFIG_DLCI is not set
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+# CONFIG_PPP_ASYNC is not set
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_PPP_DEFLATE is not set
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPPOE=y
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_QE is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_BOOTCOUNT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_MCU_MPC8349EMITX is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_UBIFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+CONFIG_UCC_FAST=y
+CONFIG_UCC=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_IRQSTACKS is not set
+# CONFIG_VIRQ_DEBUG is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
new file mode 100644
index 000000000000..2552cbefba6b
--- /dev/null
+++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
@@ -0,0 +1,1821 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc6
+# Thu Jun 11 11:25:17 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_E500=y
+# CONFIG_PPC_E500MC is not set
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+CONFIG_FSL_EMB_PERFMON=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+CONFIG_PPC_MMU_NOHASH=y
+CONFIG_PPC_BOOK3E_MMU=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+CONFIG_GENERIC_TBSYNC=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DTC=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+CONFIG_AUDIT=y
+# CONFIG_AUDITSYSCALL is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+CONFIG_PPC_MSI_BITMAP=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC85xx=y
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+# CONFIG_MPC8536_DS is not set
+# CONFIG_MPC85xx_DS is not set
+# CONFIG_SOCRATES is not set
+# CONFIG_KSI8560 is not set
+CONFIG_XES_MPC85xx=y
+# CONFIG_STX_GP3 is not set
+# CONFIG_TQM8540 is not set
+# CONFIG_TQM8541 is not set
+# CONFIG_TQM8548 is not set
+# CONFIG_TQM8555 is not set
+# CONFIG_TQM8560 is not set
+# CONFIG_SBC8548 is not set
+# CONFIG_SBC8560 is not set
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_QUICC_ENGINE is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_MPC8xxx_GPIO=y
+# CONFIG_SIMPLE_GPIO is not set
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_IRQ_ALL_CPUS is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+# CONFIG_PPC_256K_PAGES is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_FSL_LBC=y
+CONFIG_PPC_PCI_CHOICE=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+CONFIG_ADVANCED_OPTIONS=y
+CONFIG_LOWMEM_SIZE_BOOL=y
+CONFIG_LOWMEM_SIZE=0x40000000
+# CONFIG_LOWMEM_CAM_NUM_BOOL is not set
+CONFIG_LOWMEM_CAM_NUM=3
+# CONFIG_RELOCATABLE is not set
+CONFIG_PAGE_OFFSET_BOOL=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_KERNEL_START_BOOL=y
+CONFIG_KERNEL_START=0x80000000
+# CONFIG_PHYSICAL_START_BOOL is not set
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x04000000
+CONFIG_TASK_SIZE_BOOL=y
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_NET_IPGRE=y
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_FSL_ELBC=y
+CONFIG_MTD_NAND_FSL_UPM=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=131072
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+CONFIG_SCSI_LOGGING=y
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_SATA_AHCI=y
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_FSL is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+CONFIG_PATA_ALI=y
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+CONFIG_BROADCOM_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_FSL_PQ_MDIO=y
+CONFIG_GIANFAR=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_XILINX_XPS_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_HVC_UDBG is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_NVRAM=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+# CONFIG_GPIO_XILINX is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+CONFIG_SENSORS_DS1621=y
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+CONFIG_SENSORS_LM90=y
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_ALIM7101_WDT is not set
+# CONFIG_BOOKE_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_ISP1760_HCD=y
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+CONFIG_LEDS_GPIO_OF=y
+# CONFIG_LEDS_LP5521 is not set
+CONFIG_LEDS_PCA955X=y
+# CONFIG_LEDS_BD2802 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+CONFIG_LEDS_TRIGGER_GPIO=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_EDAC=y
+
+#
+# Reporting subsystems
+#
+# CONFIG_EDAC_DEBUG is not set
+CONFIG_EDAC_MM_EDAC=y
+CONFIG_EDAC_MPC85XX=y
+# CONFIG_EDAC_AMD8131 is not set
+# CONFIG_EDAC_AMD8111 is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_GENERIC is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_FSL_DMA=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+CONFIG_NET_DMA=y
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+# CONFIG_XMON is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_CRYPTO_DEV_TALITOS is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/include/asm/delay.h b/arch/powerpc/include/asm/delay.h
index f9200a65c632..1e2eb41fa057 100644
--- a/arch/powerpc/include/asm/delay.h
+++ b/arch/powerpc/include/asm/delay.h
@@ -2,8 +2,11 @@
 #define _ASM_POWERPC_DELAY_H
 #ifdef __KERNEL__
 
+#include <asm/time.h>
+
 /*
  * Copyright 1996, Paul Mackerras.
+ * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -30,5 +33,38 @@ extern void udelay(unsigned long usecs);
 #define mdelay(n)       udelay((n) * 1000)
 #endif
 
+/**
+ * spin_event_timeout - spin until a condition gets true or a timeout elapses
+ * @condition: a C expression to evalate
+ * @timeout: timeout, in microseconds
+ * @delay: the number of microseconds to delay between each evaluation of
+ *         @condition
+ *
+ * The process spins until the condition evaluates to true (non-zero) or the
+ * timeout elapses.  The return value of this macro is the value of
+ * @condition when the loop terminates. This allows you to determine the cause
+ * of the loop terminates.  If the return value is zero, then you know a
+ * timeout has occurred.
+ *
+ * This primary purpose of this macro is to poll on a hardware register
+ * until a status bit changes.  The timeout ensures that the loop still
+ * terminates even if the bit never changes.  The delay is for devices that
+ * need a delay in between successive reads.
+ *
+ * gcc will optimize out the if-statement if @delay is a constant.
+ */
+#define spin_event_timeout(condition, timeout, delay)                          \
+({                                                                             \
+        typeof(condition) __ret;                                               \
+        unsigned long __loops = tb_ticks_per_usec * timeout;                   \
+        unsigned long __start = get_tbl();                                     \
+        while (!(__ret = (condition)) && (tb_ticks_since(__start) <= __loops)) \
+                if (delay)                                                     \
+                        udelay(delay);                                         \
+                else                                                           \
+                        cpu_relax();                                           \
+        __ret;                                                                 \
+})
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_DELAY_H */
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 63a4f779f531..1b5a21041f9b 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -95,8 +95,8 @@ struct fsl_lbc_bank {
 };
 
 struct fsl_lbc_regs {
-        struct fsl_lbc_bank bank[8];
-        u8 res0[0x28];
+        struct fsl_lbc_bank bank[12];
+        u8 res0[0x8];
         __be32 mar;             /**< UPM Address Register */
         u8 res1[0x4];
         __be32 mamr;            /**< UPMA Mode Register */
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h
index 52e049cd9e68..1b4f697abbdd 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -16,6 +16,7 @@
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
 #include <asm/prom.h>
+#include <asm/mpc5xxx.h>
 #endif /* __ASSEMBLY__ */
 
 #include <linux/suspend.h>
@@ -268,7 +269,6 @@ struct mpc52xx_intr {
 #ifndef __ASSEMBLY__
 
 /* mpc52xx_common.c */
-extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node);
 extern void mpc5200_setup_xlb_arbiter(void);
 extern void mpc52xx_declare_of_platform_devices(void);
 extern void mpc52xx_map_common_devices(void);
diff --git a/arch/powerpc/include/asm/mpc512x.h b/arch/powerpc/include/asm/mpc5xxx.h
index c48a1658eeac..5ce9c5fa434a 100644
--- a/arch/powerpc/include/asm/mpc512x.h
+++ b/arch/powerpc/include/asm/mpc5xxx.h
@@ -4,7 +4,7 @@
  * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007
  *
  * Description:
- * MPC5121 Prototypes and definitions
+ * MPC5xxx Prototypes and definitions
  *
  * This is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by
@@ -13,10 +13,10 @@
  *
  */
 
-#ifndef __ASM_POWERPC_MPC512x_H__
-#define __ASM_POWERPC_MPC512x_H__
+#ifndef __ASM_POWERPC_MPC5xxx_H__
+#define __ASM_POWERPC_MPC5xxx_H__
 
-extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
+extern unsigned long mpc5xxx_get_bus_frequency(struct device_node *node);
 
-#endif /* __ASM_POWERPC_MPC512x_H__ */
+#endif /* __ASM_POWERPC_MPC5xxx_H__ */
 
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a3c28e46947c..1170267736d3 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -755,7 +755,8 @@
 #define mfspr(rn)       ({unsigned long rval; \
                         asm volatile("mfspr %0," __stringify(rn) \
                                 : "=r" (rval)); rval;})
-#define mtspr(rn, v)    asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
+#define mtspr(rn, v)    asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)\
+                                     : "memory")
 
 #ifdef __powerpc64__
 #ifdef CONFIG_PPC_CELL
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 601ddbc46002..6bcf364cbb2f 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -389,12 +389,14 @@
 #define ICCR_CACHE      1               /* Cacheable */
 
 /* Bit definitions for L1CSR0. */
+#define L1CSR0_CPE      0x00010000      /* Data Cache Parity Enable */
 #define L1CSR0_CLFC     0x00000100      /* Cache Lock Bits Flash Clear */
 #define L1CSR0_DCFI     0x00000002      /* Data Cache Flash Invalidate */
 #define L1CSR0_CFI      0x00000002      /* Cache Flash Invalidate */
 #define L1CSR0_DCE      0x00000001      /* Data Cache Enable */
 
 /* Bit definitions for L1CSR1. */
+#define L1CSR1_CPE      0x00010000      /* Instruction Cache Parity Enable */
 #define L1CSR1_ICLFR    0x00000100      /* Instr Cache Lock Bits Flash Reset */
 #define L1CSR1_ICFI     0x00000002      /* Instr Cache Flash Invalidate */
 #define L1CSR1_ICE      0x00000001      /* Instr Cache Enable */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 612b0c4dc26d..6a4fb29a0618 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -4,6 +4,8 @@
 
 CFLAGS_ptrace.o         += -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifeq ($(CONFIG_PPC64),y)
 CFLAGS_prom_init.o      += -mno-minimal-toc
 endif
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 54f767e31a1a..1e9949e68856 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -239,6 +239,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
         ori     r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE
         ori     r11,r11,HID0_LRSTK | HID0_BTIC
         oris    r11,r11,HID0_DPM@h
+BEGIN_MMU_FTR_SECTION
+        oris    r11,r11,HID0_HIGH_BAT@h
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
 BEGIN_FTR_SECTION
         xori    r11,r11,HID0_BTIC
 END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index eb4b9adcedb4..0adb50ad8031 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -17,6 +17,40 @@
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
 
+_GLOBAL(__e500_icache_setup)
+        mfspr   r0, SPRN_L1CSR1
+        andi.   r3, r0, L1CSR1_ICE
+        bnelr                           /* Already enabled */
+        oris    r0, r0, L1CSR1_CPE@h
+        ori     r0, r0, (L1CSR1_ICFI | L1CSR1_ICLFR |  L1CSR1_ICE)
+        mtspr   SPRN_L1CSR1, r0         /* Enable I-Cache */
+        isync
+        blr
+
+_GLOBAL(__e500_dcache_setup)
+        mfspr   r0, SPRN_L1CSR0
+        andi.   r3, r0, L1CSR0_DCE
+        bnelr                           /* Already enabled */
+        msync
+        isync
+        li      r0, 0
+        mtspr   SPRN_L1CSR0, r0         /* Disable */
+        msync
+        isync
+        li      r0, (L1CSR0_DCFI | L1CSR0_CLFC)
+        mtspr   SPRN_L1CSR0, r0         /* Invalidate */
+        isync
+1:      mfspr   r0, SPRN_L1CSR0
+        andi.   r3, r0, L1CSR0_CLFC
+        bne+    1b                      /* Wait for lock bits reset */
+        oris    r0, r0, L1CSR0_CPE@h
+        ori     r0, r0, L1CSR0_DCE
+        msync
+        isync
+        mtspr   SPRN_L1CSR0, r0         /* Enable */
+        isync
+        blr
+
 _GLOBAL(__setup_cpu_e200)
         /* enable dedicated debug exception handling resources (Debug APU) */
         mfspr   r3,SPRN_HID0
@@ -25,7 +59,16 @@ _GLOBAL(__setup_cpu_e200)
         b       __setup_e200_ivors
 _GLOBAL(__setup_cpu_e500v1)
 _GLOBAL(__setup_cpu_e500v2)
-        b       __setup_e500_ivors
+        mflr    r4
+        bl      __e500_icache_setup
+        bl      __e500_dcache_setup
+        bl      __setup_e500_ivors
+        mtlr    r4
+        blr
 _GLOBAL(__setup_cpu_e500mc)
-        b       __setup_e500mc_ivors
-
+        mflr    r4
+        bl      __e500_icache_setup
+        bl      __e500_dcache_setup
+        bl      __setup_e500mc_ivors
+        mtlr    r4
+        blr
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 4b2df66c79d8..459c7ee580f7 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -2,6 +2,8 @@
 # Makefile for Kernel-based Virtual Machine module
 #
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm
 
 common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 29b742b90f1f..3040dac18a37 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -2,6 +2,8 @@
 # Makefile for ppc-specific library files..
 #
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS            += -mno-minimal-toc
 endif
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index c4bcf072cb3c..2d2192e48de7 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -2,6 +2,8 @@
 # Makefile for the linux ppc-specific parts of the memory manager.
 #
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
 endif
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 2ef6b0dddd8c..73e1c2ca0552 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -1,3 +1,5 @@
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
 endif
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index c5118802a281..42e09a9f77e2 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -43,7 +43,13 @@ static int __init warp_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        return of_flat_dt_is_compatible(root, "pika,warp");
+        if (!of_flat_dt_is_compatible(root, "pika,warp"))
+                return 0;
+
+        /* For __dma_alloc_coherent */
+        ISA_DMA_THRESHOLD = ~0L;
+
+        return 1;
 }
 
 define_machine(warp) {
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index 1bcff94eb924..84544d072043 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -24,7 +24,7 @@
 #include <linux/io.h>
 
 #include <linux/of_platform.h>
-#include <asm/mpc512x.h>
+#include <asm/mpc5xxx.h>
 #include <asm/clk_interface.h>
 
 #undef CLK_DEBUG
@@ -83,13 +83,13 @@ static void dump_clocks(void)
         mutex_lock(&clocks_mutex);
         printk(KERN_INFO "CLOCKS:\n");
         list_for_each_entry(p, &clocks, node) {
-                printk(KERN_INFO "  %s %ld", p->name, p->rate);
+                pr_info("  %s=%ld", p->name, p->rate);
                 if (p->parent)
-                        printk(KERN_INFO " %s %ld", p->parent->name,
+                        pr_cont(" %s=%ld", p->parent->name,
                                p->parent->rate);
                 if (p->flags & CLK_HAS_CTRL)
-                        printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit);
-                printk("\n");
+                        pr_cont(" reg/bit=%d/%d", p->reg, p->bit);
+                pr_cont("\n");
         }
         mutex_unlock(&clocks_mutex);
 }
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
index 9c03693cb009..22a5352407e0 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -11,7 +11,6 @@
 
 #ifndef __MPC512X_H__
 #define __MPC512X_H__
-extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
 extern void __init mpc512x_init_IRQ(void);
 void __init mpc512x_declare_of_platform_devices(void);
 #endif                          /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index d8cd579f3191..434d683df5a0 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -24,29 +24,6 @@
 
 #include "mpc512x.h"
 
-unsigned long
-mpc512x_find_ips_freq(struct device_node *node)
-{
-        struct device_node *np;
-        const unsigned int *p_ips_freq = NULL;
-
-        of_node_get(node);
-        while (node) {
-                p_ips_freq = of_get_property(node, "bus-frequency", NULL);
-                if (p_ips_freq)
-                        break;
-
-                np = of_get_parent(node);
-                of_node_put(node);
-                node = np;
-        }
-        if (node)
-                of_node_put(node);
-
-        return p_ips_freq ? *p_ips_freq : 0;
-}
-EXPORT_SYMBOL(mpc512x_find_ips_freq);
-
 void __init mpc512x_init_IRQ(void)
 {
         struct device_node *np;
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 8e3dd5a0f228..a46bad0c2339 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -47,36 +47,6 @@ static DEFINE_SPINLOCK(mpc52xx_lock);
 static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
 static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
 
-/**
- *      mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
- *      @node:  device node
- *
- *      Returns IPB bus frequency, or 0 if the bus frequency cannot be found.
- */
-unsigned int
-mpc52xx_find_ipb_freq(struct device_node *node)
-{
-        struct device_node *np;
-        const unsigned int *p_ipb_freq = NULL;
-
-        of_node_get(node);
-        while (node) {
-                p_ipb_freq = of_get_property(node, "bus-frequency", NULL);
-                if (p_ipb_freq)
-                        break;
-
-                np = of_get_parent(node);
-                of_node_put(node);
-                node = np;
-        }
-        if (node)
-                of_node_put(node);
-
-        return p_ipb_freq ? *p_ipb_freq : 0;
-}
-EXPORT_SYMBOL(mpc52xx_find_ipb_freq);
-
-
 /*
  * Configure the XLB arbiter settings to match what Linux expects.
  */
@@ -221,7 +191,7 @@ unsigned int mpc52xx_get_xtal_freq(struct device_node *node)
         if (!mpc52xx_cdm)
                 return 0;
 
-        freq = mpc52xx_find_ipb_freq(node);
+        freq = mpc5xxx_get_bus_frequency(node);
         if (!freq)
                 return 0;
 
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 437d29a59d72..083ebee9a16d 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -96,6 +96,13 @@ config ASP834x
           This enables support for the Analogue & Micro ASP 83xx
           board.
 
+config KMETER1
+        bool "Keymile KMETER1"
+        select DEFAULT_UIMAGE
+        select QUICC_ENGINE
+        help
+          This enables support for the Keymile KMETER1 board.
+
 
 endif
 
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 051777c542c7..e139c36572ec 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_MPC837x_MDS)	+= mpc837x_mds.o
 obj-$(CONFIG_SBC834x)           += sbc834x.o
 obj-$(CONFIG_MPC837x_RDB)       += mpc837x_rdb.o
 obj-$(CONFIG_ASP834x)           += asp834x.o
+obj-$(CONFIG_KMETER1)           += kmeter1.o
diff --git a/arch/powerpc/platforms/83xx/kmeter1.c b/arch/powerpc/platforms/83xx/kmeter1.c
new file mode 100644
index 000000000000..903acfd851ac
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/kmeter1.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright 2008 DENX Software Engineering GmbH
+ * Author: Heiko Schocher <hs@denx.de>
+ *
+ * Description:
+ * Keymile KMETER1 board specific routines.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+
+#include "mpc83xx.h"
+
+#define SVR_REV(svr)    (((svr) >>  0) & 0xFFFF) /* Revision field */
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init kmeter1_setup_arch(void)
+{
+        struct device_node *np;
+
+        if (ppc_md.progress)
+                ppc_md.progress("kmeter1_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+                mpc83xx_add_bridge(np);
+#endif
+
+#ifdef CONFIG_QUICC_ENGINE
+        qe_reset();
+
+        np = of_find_node_by_name(NULL, "par_io");
+        if (np != NULL) {
+                par_io_init(np);
+                of_node_put(np);
+
+                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                        par_io_of_config(np);
+        }
+
+        np = of_find_compatible_node(NULL, "network", "ucc_geth");
+        if (np != NULL) {
+                uint svid;
+
+                /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
+                svid = mfspr(SPRN_SVR);
+                if (SVR_REV(svid) == 0x0021) {
+                        struct  device_node *np_par;
+                        struct  resource res;
+                        void    __iomem *base;
+                        int     ret;
+
+                        np_par = of_find_node_by_name(NULL, "par_io");
+                        if (np_par == NULL) {
+                                printk(KERN_WARNING "%s couldn;t find par_io node\n",
+                                        __func__);
+                                return;
+                        }
+                        /* Map Parallel I/O ports registers */
+                        ret = of_address_to_resource(np_par, 0, &res);
+                        if (ret) {
+                                printk(KERN_WARNING "%s couldn;t map par_io registers\n",
+                                        __func__);
+                                return;
+                        }
+                        base = ioremap(res.start, res.end - res.start + 1);
+
+                        /*
+                         * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
+                         * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
+                         */
+                        setbits32((base + 0xa8), 0x0c003000);
+
+                        /*
+                         * IMMR + 0x14AC[20:27] = 10101010
+                         * (data delay for both UCC's)
+                         */
+                        clrsetbits_be32((base + 0xac), 0xff0, 0xaa0);
+                        iounmap(base);
+                        of_node_put(np_par);
+                }
+                of_node_put(np);
+        }
+#endif                          /* CONFIG_QUICC_ENGINE */
+}
+
+static struct of_device_id kmeter_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus", },
+        { .type = "qe", },
+        { .compatible = "fsl,qe", },
+        {},
+};
+
+static int __init kmeter_declare_of_platform_devices(void)
+{
+        /* Publish the QE devices */
+        of_platform_bus_probe(NULL, kmeter_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(kmeter1, kmeter_declare_of_platform_devices);
+
+static void __init kmeter1_init_IRQ(void)
+{
+        struct device_node *np;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,pq2pro-pic");
+        if (!np) {
+                np = of_find_node_by_type(NULL, "ipic");
+                if (!np)
+                        return;
+        }
+
+        ipic_init(np, 0);
+
+        /* Initialize the default interrupt mapping priorities,
+         * in case the boot rom changed something on us.
+         */
+        ipic_set_default_priority();
+        of_node_put(np);
+
+#ifdef CONFIG_QUICC_ENGINE
+        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+        if (!np) {
+                np = of_find_node_by_type(NULL, "qeic");
+                if (!np)
+                        return;
+        }
+        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
+        of_node_put(np);
+#endif                          /* CONFIG_QUICC_ENGINE */
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init kmeter1_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "keymile,KMETER1");
+}
+
+define_machine(kmeter1) {
+        .name           = "KMETER1",
+        .probe          = kmeter1_probe,
+        .setup_arch     = kmeter1_setup_arch,
+        .init_IRQ       = kmeter1_init_IRQ,
+        .get_irq        = ipic_get_irq,
+        .restart        = mpc83xx_restart,
+        .time_init      = mpc83xx_time_init,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 83cfe51526ec..d1dc5b0b4fbf 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -22,8 +22,8 @@
 /* system i/o configuration register low */
 #define MPC83XX_SICRL_OFFS         0x114
 #define MPC834X_SICRL_USB_MASK     0x60000000
-#define MPC834X_SICRL_USB0         0x40000000
-#define MPC834X_SICRL_USB1         0x20000000
+#define MPC834X_SICRL_USB0         0x20000000
+#define MPC834X_SICRL_USB1         0x40000000
 #define MPC831X_SICRL_USB_MASK     0x00000c00
 #define MPC831X_SICRL_USB_ULPI     0x00000800
 #define MPC8315_SICRL_USB_MASK     0x000000fc
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index 11e1fac17c7f..3ba4bb7d41bb 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -47,25 +47,25 @@ int mpc834x_usb_cfg(void)
                 sccr |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */
 
                 prop = of_get_property(np, "phy_type", NULL);
+                port1_is_dr = 1;
                 if (prop && (!strcmp(prop, "utmi") ||
                                         !strcmp(prop, "utmi_wide"))) {
                         sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
                         sicrh |= MPC834X_SICRH_USB_UTMI;
-                        port1_is_dr = 1;
+                        port0_is_dr = 1;
                 } else if (prop && !strcmp(prop, "serial")) {
                         dr_mode = of_get_property(np, "dr_mode", NULL);
                         if (dr_mode && !strcmp(dr_mode, "otg")) {
                                 sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
-                                port1_is_dr = 1;
+                                port0_is_dr = 1;
                         } else {
-                                sicrl |= MPC834X_SICRL_USB0;
+                                sicrl |= MPC834X_SICRL_USB1;
                         }
                 } else if (prop && !strcmp(prop, "ulpi")) {
-                        sicrl |= MPC834X_SICRL_USB0;
+                        sicrl |= MPC834X_SICRL_USB1;
                 } else {
                         printk(KERN_WARNING "834x USB PHY type not supported\n");
                 }
-                port0_is_dr = 1;
                 of_node_put(np);
         }
         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 43d385cedcd7..a9b416688975 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -35,12 +35,14 @@ config MPC85xx_MDS
         select DEFAULT_UIMAGE
         select PHYLIB
         select HAS_RAPIDIO
+        select SWIOTLB
         help
           This option enables support for the MPC85xx MDS board
 
 config MPC8536_DS
         bool "Freescale MPC8536 DS"
         select DEFAULT_UIMAGE
+        select SWIOTLB
         help
           This option enables support for the MPC8536 DS board
 
@@ -49,6 +51,7 @@ config MPC85xx_DS
         select PPC_I8259
         select DEFAULT_UIMAGE
         select FSL_ULI1575
+        select SWIOTLB
         help
           This option enables support for the MPC85xx DS (MPC8544 DS) board
 
@@ -64,6 +67,16 @@ config KSI8560
         help
           This option enables support for the Emerson KSI8560 board
 
+config XES_MPC85xx
+        bool "X-ES single-board computer"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the various single-board
+          computers from Extreme Engineering Solutions (X-ES) based on
+          Freescale MPC85xx processors.
+          Manufacturer: Extreme Engineering Solutions, Inc.
+          URL: <http://www.xes-inc.com/>
+
 config STX_GP3
         bool "Silicon Turnkey Express GP3"
         help
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index a857b35b9828..835733f2b12c 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_SBC8560)     += sbc8560.o
 obj-$(CONFIG_SBC8548)     += sbc8548.o
 obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
 obj-$(CONFIG_KSI8560)     += ksi8560.o
+obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
\ No newline at end of file
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 63efca20d7bd..055ff417bae9 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -17,6 +17,7 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
+#include <linux/lmb.h>
 
 #include <asm/system.h>
 #include <asm/time.h>
@@ -26,6 +27,7 @@
 #include <asm/prom.h>
 #include <asm/udbg.h>
 #include <asm/mpic.h>
+#include <asm/swiotlb.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
@@ -65,7 +67,9 @@ static void __init mpc8536_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
         struct device_node *np;
+        struct pci_controller *hose;
 #endif
+        dma_addr_t max = 0xffffffff;
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc8536_ds_setup_arch()", 0);
@@ -80,11 +84,22 @@ static void __init mpc8536_ds_setup_arch(void)
                                 fsl_add_bridge(np, 1);
                         else
                                 fsl_add_bridge(np, 0);
+
+                        hose = pci_find_hose_for_OF_device(np);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
                 }
         }
 
 #endif
 
+#ifdef CONFIG_SWIOTLB
+        if (lmb_end_of_DRAM() > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_pci_dma_ops);
+        }
+#endif
+
         printk("MPC8536 DS board from Freescale Semiconductor\n");
 }
 
@@ -102,6 +117,8 @@ static int __init mpc8536_ds_publish_devices(void)
 }
 machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
 
+machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
+
 /*
  * Called very early, device-tree isn't unflattened
  */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 53d5851a6c97..849c0ac0025f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -20,6 +20,7 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
+#include <linux/lmb.h>
 
 #include <asm/system.h>
 #include <asm/time.h>
@@ -30,6 +31,7 @@
 #include <asm/udbg.h>
 #include <asm/mpic.h>
 #include <asm/i8259.h>
+#include <asm/swiotlb.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
@@ -155,7 +157,9 @@ static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
         struct device_node *np;
+        struct pci_controller *hose;
 #endif
+        dma_addr_t max = 0xffffffff;
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
@@ -171,6 +175,10 @@ static void __init mpc85xx_ds_setup_arch(void)
                                 fsl_add_bridge(np, 1);
                         else
                                 fsl_add_bridge(np, 0);
+
+                        hose = pci_find_hose_for_OF_device(np);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
                 }
         }
 
@@ -181,6 +189,13 @@ static void __init mpc85xx_ds_setup_arch(void)
         mpc85xx_smp_init();
 #endif
 
+#ifdef CONFIG_SWIOTLB
+        if (lmb_end_of_DRAM() > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_pci_dma_ops);
+        }
+#endif
+
         printk("MPC85xx DS board from Freescale Semiconductor\n");
 }
 
@@ -217,6 +232,10 @@ machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
 machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
 machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
 
+machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
+machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
+machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier);
+
 /*
  * Called very early, device-tree isn't unflattened
  */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index b2c0a4319973..77f90b356356 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -33,6 +33,7 @@
 #include <linux/of_platform.h>
 #include <linux/of_device.h>
 #include <linux/phy.h>
+#include <linux/lmb.h>
 
 #include <asm/system.h>
 #include <asm/atomic.h>
@@ -49,6 +50,7 @@
 #include <asm/qe.h>
 #include <asm/qe_ic.h>
 #include <asm/mpic.h>
+#include <asm/swiotlb.h>
 
 #undef DEBUG
 #ifdef DEBUG
@@ -155,6 +157,10 @@ static void __init mpc85xx_mds_setup_arch(void)
 {
         struct device_node *np;
         static u8 __iomem *bcsr_regs = NULL;
+#ifdef CONFIG_PCI
+        struct pci_controller *hose;
+#endif
+        dma_addr_t max = 0xffffffff;
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
@@ -179,6 +185,10 @@ static void __init mpc85xx_mds_setup_arch(void)
                                 fsl_add_bridge(np, 1);
                         else
                                 fsl_add_bridge(np, 0);
+
+                        hose = pci_find_hose_for_OF_device(np);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
                 }
         }
 #endif
@@ -227,6 +237,13 @@ static void __init mpc85xx_mds_setup_arch(void)
                 iounmap(bcsr_regs);
         }
 #endif  /* CONFIG_QUICC_ENGINE */
+
+#ifdef CONFIG_SWIOTLB
+        if (lmb_end_of_DRAM() > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_pci_dma_ops);
+        }
+#endif
 }
 
 
@@ -281,6 +298,9 @@ static int __init mpc85xx_publish_devices(void)
 machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
 machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
 
+machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
+machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
+
 static void __init mpc85xx_mds_pic_init(void)
 {
         struct mpic *mpic;
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
new file mode 100644
index 000000000000..ee01532786e4
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
+ *
+ * X-ES board-specific functionality
+ *
+ * Based on mpc85xx_ds code from Freescale Semiconductor, Inc.
+ *
+ * Author: Nate Case <ncase@xes-inc.com>
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include <linux/of_platform.h>
+
+/* A few bit definitions needed for fixups on some boards */
+#define MPC85xx_L2CTL_L2E               0x80000000 /* L2 enable */
+#define MPC85xx_L2CTL_L2I               0x40000000 /* L2 flash invalidate */
+#define MPC85xx_L2CTL_L2SIZ_MASK        0x30000000 /* L2 SRAM size (R/O) */
+
+void __init xes_mpc85xx_pic_init(void)
+{
+        struct mpic *mpic;
+        struct resource r;
+        struct device_node *np;
+
+        np = of_find_node_by_type(NULL, "open-pic");
+        if (np == NULL) {
+                printk(KERN_ERR "Could not find open-pic node\n");
+                return;
+        }
+
+        if (of_address_to_resource(np, 0, &r)) {
+                printk(KERN_ERR "Failed to map mpic register space\n");
+                of_node_put(np);
+                return;
+        }
+
+        mpic = mpic_alloc(np, r.start,
+                          MPIC_PRIMARY | MPIC_WANTS_RESET |
+                          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+                        0, 256, " OpenPIC  ");
+        BUG_ON(mpic == NULL);
+        of_node_put(np);
+
+        mpic_init(mpic);
+}
+
+static void xes_mpc85xx_configure_l2(void __iomem *l2_base)
+{
+        volatile uint32_t ctl, tmp;
+
+        asm volatile("msync; isync");
+        tmp = in_be32(l2_base);
+
+        /*
+         * xMon may have enabled part of L2 as SRAM, so we need to set it
+         * up for all cache mode just to be safe.
+         */
+        printk(KERN_INFO "xes_mpc85xx: Enabling L2 as cache\n");
+
+        ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I;
+        if (machine_is_compatible("MPC8540") ||
+            machine_is_compatible("MPC8560"))
+                /*
+                 * Assume L2 SRAM is used fully for cache, so set
+                 * L2BLKSZ (bits 4:5) to match L2SIZ (bits 2:3).
+                 */
+                ctl |= (tmp & MPC85xx_L2CTL_L2SIZ_MASK) >> 2;
+
+        asm volatile("msync; isync");
+        out_be32(l2_base, ctl);
+        asm volatile("msync; isync");
+}
+
+static void xes_mpc85xx_fixups(void)
+{
+        struct device_node *np;
+        int err;
+
+        /*
+         * Legacy xMon firmware on some X-ES boards does not enable L2
+         * as cache.  We must ensure that they get enabled here.
+         */
+        for_each_node_by_name(np, "l2-cache-controller") {
+                struct resource r[2];
+                void __iomem *l2_base;
+
+                /* Only MPC8548, MPC8540, and MPC8560 boards are affected */
+                if (!of_device_is_compatible(np,
+                                    "fsl,mpc8548-l2-cache-controller") &&
+                    !of_device_is_compatible(np,
+                                    "fsl,mpc8540-l2-cache-controller") &&
+                    !of_device_is_compatible(np,
+                                    "fsl,mpc8560-l2-cache-controller"))
+                        continue;
+
+                err = of_address_to_resource(np, 0, &r[0]);
+                if (err) {
+                        printk(KERN_WARNING "xes_mpc85xx: Could not get "
+                               "resource for device tree node '%s'",
+                               np->full_name);
+                        continue;
+                }
+
+                l2_base = ioremap(r[0].start, r[0].end - r[0].start + 1);
+
+                xes_mpc85xx_configure_l2(l2_base);
+        }
+}
+
+#ifdef CONFIG_PCI
+static int primary_phb_addr;
+#endif
+
+/*
+ * Setup the architecture
+ */
+#ifdef CONFIG_SMP
+extern void __init mpc85xx_smp_init(void);
+#endif
+static void __init xes_mpc85xx_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+        struct device_node *np;
+#endif
+        struct device_node *root;
+        const char *model = "Unknown";
+
+        root = of_find_node_by_path("/");
+        if (root == NULL)
+                return;
+
+        model = of_get_property(root, "model", NULL);
+
+        printk(KERN_INFO "X-ES MPC85xx-based single-board computer: %s\n",
+               model + strlen("xes,"));
+
+        xes_mpc85xx_fixups();
+
+#ifdef CONFIG_PCI
+        for_each_node_by_type(np, "pci") {
+                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+                    of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+                        struct resource rsrc;
+                        of_address_to_resource(np, 0, &rsrc);
+                        if ((rsrc.start & 0xfffff) == primary_phb_addr)
+                                fsl_add_bridge(np, 1);
+                        else
+                                fsl_add_bridge(np, 0);
+                }
+        }
+#endif
+
+#ifdef CONFIG_SMP
+        mpc85xx_smp_init();
+#endif
+}
+
+static struct of_device_id __initdata xes_mpc85xx_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
+        {},
+};
+
+static int __init xes_mpc85xx_publish_devices(void)
+{
+        return of_platform_bus_probe(NULL, xes_mpc85xx_ids, NULL);
+}
+machine_device_initcall(xes_mpc8572, xes_mpc85xx_publish_devices);
+machine_device_initcall(xes_mpc8548, xes_mpc85xx_publish_devices);
+machine_device_initcall(xes_mpc8540, xes_mpc85xx_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init xes_mpc8572_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "xes,MPC8572")) {
+#ifdef CONFIG_PCI
+                primary_phb_addr = 0x8000;
+#endif
+                return 1;
+        } else {
+                return 0;
+        }
+}
+
+static int __init xes_mpc8548_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "xes,MPC8548")) {
+#ifdef CONFIG_PCI
+                primary_phb_addr = 0xb000;
+#endif
+                return 1;
+        } else {
+                return 0;
+        }
+}
+
+static int __init xes_mpc8540_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "xes,MPC8540")) {
+#ifdef CONFIG_PCI
+                primary_phb_addr = 0xb000;
+#endif
+                return 1;
+        } else {
+                return 0;
+        }
+}
+
+define_machine(xes_mpc8572) {
+        .name                   = "X-ES MPC8572",
+        .probe                  = xes_mpc8572_probe,
+        .setup_arch             = xes_mpc85xx_setup_arch,
+        .init_IRQ               = xes_mpc85xx_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+
+define_machine(xes_mpc8548) {
+        .name                   = "X-ES MPC8548",
+        .probe                  = xes_mpc8548_probe,
+        .setup_arch             = xes_mpc85xx_setup_arch,
+        .init_IRQ               = xes_mpc85xx_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+
+define_machine(xes_mpc8540) {
+        .name                   = "X-ES MPC8540",
+        .probe                  = xes_mpc8540_probe,
+        .setup_arch             = xes_mpc85xx_setup_arch,
+        .init_IRQ               = xes_mpc85xx_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index fdaf4ddaa955..9c7b64a3402b 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -15,6 +15,7 @@ config MPC8641_HPCN
         select DEFAULT_UIMAGE
         select FSL_ULI1575
         select HAS_RAPIDIO
+        select SWIOTLB
         help
           This option enables support for the MPC8641 HPCN board.
 
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 51eec0cd5519..627908a4cd77 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -37,6 +37,7 @@
 #include <linux/of_platform.h>
 #include <sysdev/fsl_pci.h>
 #include <sysdev/fsl_soc.h>
+#include <sysdev/simple_gpio.h>
 
 #include "mpc86xx.h"
 
@@ -51,6 +52,9 @@ static struct of_device_id __initdata mpc8610_ids[] = {
 
 static int __init mpc8610_declare_of_platform_devices(void)
 {
+        /* Firstly, register PIXIS GPIOs. */
+        simple_gpiochip_init("fsl,fpga-pixis-gpio-bank");
+
         /* Without this call, the SSI device driver won't get probed. */
         of_platform_bus_probe(NULL, mpc8610_ids, NULL);
 
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 7e9e83c04a8a..66327024a6a6 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -19,6 +19,7 @@
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/of_platform.h>
+#include <linux/lmb.h>
 
 #include <asm/system.h>
 #include <asm/time.h>
@@ -27,6 +28,7 @@
 #include <asm/prom.h>
 #include <mm/mmu_decl.h>
 #include <asm/udbg.h>
+#include <asm/swiotlb.h>
 
 #include <asm/mpic.h>
 
@@ -70,7 +72,9 @@ mpc86xx_hpcn_setup_arch(void)
 {
 #ifdef CONFIG_PCI
         struct device_node *np;
+        struct pci_controller *hose;
 #endif
+        dma_addr_t max = 0xffffffff;
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
@@ -83,6 +87,9 @@ mpc86xx_hpcn_setup_arch(void)
                         fsl_add_bridge(np, 1);
                 else
                         fsl_add_bridge(np, 0);
+                hose = pci_find_hose_for_OF_device(np);
+                max = min(max, hose->dma_window_base_cur +
+                          hose->dma_window_size);
         }
 
         ppc_md.pci_exclude_device = mpc86xx_exclude_device;
@@ -94,6 +101,13 @@ mpc86xx_hpcn_setup_arch(void)
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
 #endif
+
+#ifdef CONFIG_SWIOTLB
+        if (lmb_end_of_DRAM() > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_pci_dma_ops);
+        }
+#endif
 }
 
 
@@ -158,6 +172,7 @@ static int __init declare_of_platform_devices(void)
         return 0;
 }
 machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier);
 
 define_machine(mpc86xx_hpcn) {
         .name                   = "MPC86xx HPCN",
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index cca6b4fc719a..c4192542b809 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -21,7 +21,7 @@ choice
 
           If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
 
-config PPC_BOOK3S
+config PPC_BOOK3S_32
         bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
         select PPC_FPU
 
@@ -57,11 +57,14 @@ config E200
 
 endchoice
 
-config PPC_BOOK3S
-        default y
+config PPC_BOOK3S_64
+        def_bool y
         depends on PPC64
         select PPC_FPU
 
+config PPC_BOOK3S
+        def_bool y
+        depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
 
 config POWER4_ONLY
         bool "Optimize for POWER4"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index f7419198e635..a6812ee00100 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -1,4 +1,6 @@
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 obj-$(CONFIG_FSL_ULI1575)       += fsl_uli1575.o
 
 obj-$(CONFIG_PPC_PMAC)          += powermac/
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 2d1c87dd5d14..9d4b17462f13 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -1,3 +1,5 @@
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS                    += -mno-minimal-toc
 endif
@@ -48,6 +50,9 @@ obj-$(CONFIG_PPC_DCR)		+= dcr.o
 obj-$(CONFIG_8xx)               += mpc8xx_pic.o cpm1.o
 obj-$(CONFIG_UCODE_PATCH)       += micropatch.o
 
+obj-$(CONFIG_PPC_MPC512x)       += mpc5xxx_clocks.o
+obj-$(CONFIG_PPC_MPC52xx)       += mpc5xxx_clocks.o
+
 ifeq ($(CONFIG_SUSPEND),y)
 obj-$(CONFIG_6xx)               += 6xx-suspend.o
 endif
diff --git a/arch/powerpc/sysdev/mpc5xxx_clocks.c b/arch/powerpc/sysdev/mpc5xxx_clocks.c
new file mode 100644
index 000000000000..34e12f9995fe
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc5xxx_clocks.c
@@ -0,0 +1,33 @@
+/**
+ *      mpc5xxx_get_bus_frequency - Find the bus frequency for a device
+ *      @node:  device node
+ *
+ *      Returns bus frequency (IPS on MPC512x, IPB on MPC52xx),
+ *      or 0 if the bus frequency cannot be found.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+unsigned int
+mpc5xxx_get_bus_frequency(struct device_node *node)
+{
+        struct device_node *np;
+        const unsigned int *p_bus_freq = NULL;
+
+        of_node_get(node);
+        while (node) {
+                p_bus_freq = of_get_property(node, "bus-frequency", NULL);
+                if (p_bus_freq)
+                        break;
+
+                np = of_get_parent(node);
+                of_node_put(node);
+                node = np;
+        }
+        if (node)
+                of_node_put(node);
+
+        return p_bus_freq ? *p_bus_freq : 0;
+}
+EXPORT_SYMBOL(mpc5xxx_get_bus_frequency);
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index 9cb03b71b9d6..85ab97ab840a 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -1,5 +1,7 @@
 # Makefile for xmon
 
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+
 ifdef CONFIG_PPC64
 EXTRA_CFLAGS += -mno-minimal-toc
 endif
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index ca92e2f54e4d..ed6be6ba2f4e 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -1796,10 +1796,16 @@ void __init paging_init(void)
 
         prom_build_devicetree();
         of_populate_present_mask();
+#ifndef CONFIG_SMP
+        of_fill_in_cpu_data();
+#endif
 
         if (tlb_type == hypervisor) {
                 sun4v_mdesc_init();
                 mdesc_populate_present_mask(cpu_all_mask);
+#ifndef CONFIG_SMP
+                mdesc_fill_in_cpu_data(cpu_all_mask);
+#endif
         }
 
         /* Once the OF device tree and MDESC have been setup, we know
diff --git a/block/Kconfig b/block/Kconfig
index 2c39527aa7db..95a86adc33a1 100644
--- a/block/Kconfig
+++ b/block/Kconfig
@@ -23,8 +23,8 @@ menuconfig BLOCK
 
 if BLOCK
 
-config LBD
-        bool "Support for large block devices and files"
+config LBDAF
+        bool "Support for large (2TB+) block devices and files"
         depends on !64BIT
         default y
         help
diff --git a/block/blk-settings.c b/block/blk-settings.c
index 7541ea4bf9fe..bd582a7f5310 100644
--- a/block/blk-settings.c
+++ b/block/blk-settings.c
@@ -97,7 +97,7 @@ EXPORT_SYMBOL_GPL(blk_queue_lld_busy);
 
 /**
  * blk_set_default_limits - reset limits to default values
- * @limits:  the queue_limits structure to reset
+ * @lim:  the queue_limits structure to reset
  *
  * Description:
  *   Returns a queue_limit struct to its default state.  Can be used by
@@ -112,7 +112,7 @@ void blk_set_default_limits(struct queue_limits *lim)
         lim->max_segment_size = MAX_SEGMENT_SIZE;
         lim->max_sectors = lim->max_hw_sectors = SAFE_MAX_SECTORS;
         lim->logical_block_size = lim->physical_block_size = lim->io_min = 512;
-        lim->bounce_pfn = BLK_BOUNCE_ANY;
+        lim->bounce_pfn = (unsigned long)(BLK_BOUNCE_ANY >> PAGE_SHIFT);
         lim->alignment_offset = 0;
         lim->io_opt = 0;
         lim->misaligned = 0;
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 68d27bc70d06..2bc2dbe30e8f 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -694,7 +694,7 @@ mpc52xx_ata_probe(struct of_device *op, const struct of_device_id *match)
         struct bcom_task *dmatsk = NULL;
 
         /* Get ipb frequency */
-        ipb_freq = mpc52xx_find_ipb_freq(op->node);
+        ipb_freq = mpc5xxx_get_bus_frequency(op->node);
         if (!ipb_freq) {
                 dev_err(&op->dev, "could not determine IPB bus frequency\n");
                 return -ENODEV;
diff --git a/drivers/block/hd.c b/drivers/block/hd.c
index f65b3f369eb0..f9d01608cbe2 100644
--- a/drivers/block/hd.c
+++ b/drivers/block/hd.c
@@ -100,8 +100,6 @@ static DEFINE_SPINLOCK(hd_lock);
 static struct request_queue *hd_queue;
 static struct request *hd_req;
 
-#define MAJOR_NR HD_MAJOR
-
 #define TIMEOUT_VALUE   (6*HZ)
 #define HD_DELAY        0
 
@@ -712,12 +710,12 @@ static int __init hd_init(void)
 {
         int drive;
 
-        if (register_blkdev(MAJOR_NR, "hd"))
+        if (register_blkdev(HD_MAJOR, "hd"))
                 return -1;
 
         hd_queue = blk_init_queue(do_hd_request, &hd_lock);
         if (!hd_queue) {
-                unregister_blkdev(MAJOR_NR, "hd");
+                unregister_blkdev(HD_MAJOR, "hd");
                 return -ENOMEM;
         }
 
@@ -751,7 +749,7 @@ static int __init hd_init(void)
                 struct hd_i_struct *p = &hd_info[drive];
                 if (!disk)
                         goto Enomem;
-                disk->major = MAJOR_NR;
+                disk->major = HD_MAJOR;
                 disk->first_minor = drive << 6;
                 disk->fops = &hd_fops;
                 sprintf(disk->disk_name, "hd%c", 'a'+drive);
@@ -795,7 +793,7 @@ out1:
         NR_HD = 0;
 out:
         del_timer(&device_timer);
-        unregister_blkdev(MAJOR_NR, "hd");
+        unregister_blkdev(HD_MAJOR, "hd");
         blk_cleanup_queue(hd_queue);
         return -1;
 Enomem:
diff --git a/drivers/char/dtlk.c b/drivers/char/dtlk.c
index 6b900b297cc6..52e06589821d 100644
--- a/drivers/char/dtlk.c
+++ b/drivers/char/dtlk.c
@@ -571,7 +571,7 @@ static char dtlk_read_tts(void)
                 portval = inb_p(dtlk_port_tts);
         } while ((portval & TTS_READABLE) == 0 &&
                  retries++ < DTLK_MAX_RETRIES);
-        if (retries == DTLK_MAX_RETRIES)
+        if (retries > DTLK_MAX_RETRIES)
                 printk(KERN_ERR "dtlk_read_tts() timeout\n");
 
         ch = inb_p(dtlk_port_tts);      /* input from TTS port */
@@ -583,7 +583,7 @@ static char dtlk_read_tts(void)
                 portval = inb_p(dtlk_port_tts);
         } while ((portval & TTS_READABLE) != 0 &&
                  retries++ < DTLK_MAX_RETRIES);
-        if (retries == DTLK_MAX_RETRIES)
+        if (retries > DTLK_MAX_RETRIES)
                 printk(KERN_ERR "dtlk_read_tts() timeout\n");
 
         TRACE_RET;
@@ -640,7 +640,7 @@ static char dtlk_write_tts(char ch)
                 while ((inb_p(dtlk_port_tts) & TTS_WRITABLE) == 0 &&
                        retries++ < DTLK_MAX_RETRIES)    /* DT ready? */
                         ;
-        if (retries == DTLK_MAX_RETRIES)
+        if (retries > DTLK_MAX_RETRIES)
                 printk(KERN_ERR "dtlk_write_tts() timeout\n");
 
         outb_p(ch, dtlk_port_tts);      /* output to TTS port */
diff --git a/drivers/char/hvc_iseries.c b/drivers/char/hvc_iseries.c
index 449727b6166d..936d05bf37fa 100644
--- a/drivers/char/hvc_iseries.c
+++ b/drivers/char/hvc_iseries.c
@@ -241,7 +241,7 @@ static int __devexit hvc_vio_remove(struct vio_dev *vdev)
 static struct vio_driver hvc_vio_driver = {
         .id_table       = hvc_driver_table,
         .probe          = hvc_vio_probe,
-        .remove         = hvc_vio_remove,
+        .remove         = __devexit_p(hvc_vio_remove),
         .driver         = {
                 .name   = hvc_driver_name,
                 .owner  = THIS_MODULE,
diff --git a/drivers/char/hvc_vio.c b/drivers/char/hvc_vio.c
index bd62dc86b47d..c72b994652ac 100644
--- a/drivers/char/hvc_vio.c
+++ b/drivers/char/hvc_vio.c
@@ -113,7 +113,7 @@ static int __devexit hvc_vio_remove(struct vio_dev *vdev)
 static struct vio_driver hvc_vio_driver = {
         .id_table       = hvc_driver_table,
         .probe          = hvc_vio_probe,
-        .remove         = hvc_vio_remove,
+        .remove         = __devexit_p(hvc_vio_remove),
         .driver         = {
                 .name   = hvc_driver_name,
                 .owner  = THIS_MODULE,
diff --git a/drivers/char/hvcs.c b/drivers/char/hvcs.c
index 7d64e4230e66..266b858b8f85 100644
--- a/drivers/char/hvcs.c
+++ b/drivers/char/hvcs.c
@@ -868,7 +868,7 @@ static int __devexit hvcs_remove(struct vio_dev *dev)
 static struct vio_driver hvcs_vio_driver = {
         .id_table       = hvcs_driver_table,
         .probe          = hvcs_probe,
-        .remove         = hvcs_remove,
+        .remove         = __devexit_p(hvcs_remove),
         .driver         = {
                 .name   = hvcs_driver_name,
                 .owner  = THIS_MODULE,
diff --git a/drivers/char/istallion.c b/drivers/char/istallion.c
index e18800c400b1..0c999f5bb3db 100644
--- a/drivers/char/istallion.c
+++ b/drivers/char/istallion.c
@@ -3785,7 +3785,7 @@ err:
         return retval;
 }
 
-static void stli_pciremove(struct pci_dev *pdev)
+static void __devexit stli_pciremove(struct pci_dev *pdev)
 {
         struct stlibrd *brdp = pci_get_drvdata(pdev);
 
diff --git a/drivers/char/moxa.c b/drivers/char/moxa.c
index 65b6ff2442c6..6799588b0099 100644
--- a/drivers/char/moxa.c
+++ b/drivers/char/moxa.c
@@ -1189,6 +1189,11 @@ static int moxa_open(struct tty_struct *tty, struct file *filp)
                 return -ENODEV;
         }
 
+        if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
+                retval = -ENODEV;
+                goto out_unlock;
+        }
+
         ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
         ch->port.count++;
         tty->driver_data = ch;
@@ -1213,8 +1218,8 @@ static int moxa_open(struct tty_struct *tty, struct file *filp)
                                 moxa_close_port(tty);
         } else
                 ch->port.flags |= ASYNC_NORMAL_ACTIVE;
+out_unlock:
         mutex_unlock(&moxa_openlock);
-
         return retval;
 }
 
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 11f373971fa5..3582c39f9725 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -67,6 +67,12 @@ config GPIO_SYSFS
 
 comment "Memory mapped GPIO expanders:"
 
+config GPIO_PL061
+        bool "PrimeCell PL061 GPIO support"
+        depends on ARM_AMBA
+        help
+          Say yes here to support the PrimeCell PL061 GPIO device
+
 config GPIO_XILINX
         bool "Xilinx GPIO support"
         depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 49ac64e515e6..ef90203e8f3c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_GPIO_MAX732X)	+= max732x.o
 obj-$(CONFIG_GPIO_MCP23S08)     += mcp23s08.o
 obj-$(CONFIG_GPIO_PCA953X)      += pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)      += pcf857x.o
+obj-$(CONFIG_GPIO_PL061)        += pl061.o
 obj-$(CONFIG_GPIO_TWL4030)      += twl4030-gpio.o
 obj-$(CONFIG_GPIO_XILINX)       += xilinx_gpio.o
 obj-$(CONFIG_GPIO_BT8XX)        += bt8xxgpio.o
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
new file mode 100644
index 000000000000..aa8e7cb020d9
--- /dev/null
+++ b/drivers/gpio/pl061.c
@@ -0,0 +1,341 @@
+/*
+ *  linux/drivers/gpio/pl061.c
+ *
+ *  Copyright (C) 2008, 2009 Provigent Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Driver for the ARM PrimeCell(tm) General Purpose Input/Output (PL061)
+ *
+ * Data sheet: ARM DDI 0190B, September 2000
+ */
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/irq.h>
+#include <linux/bitops.h>
+#include <linux/workqueue.h>
+#include <linux/gpio.h>
+#include <linux/device.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/pl061.h>
+
+#define GPIODIR 0x400
+#define GPIOIS  0x404
+#define GPIOIBE 0x408
+#define GPIOIEV 0x40C
+#define GPIOIE  0x410
+#define GPIORIS 0x414
+#define GPIOMIS 0x418
+#define GPIOIC  0x41C
+
+#define PL061_GPIO_NR   8
+
+struct pl061_gpio {
+        /* We use a list of pl061_gpio structs for each trigger IRQ in the main
+         * interrupts controller of the system. We need this to support systems
+         * in which more that one PL061s are connected to the same IRQ. The ISR
+         * interates through this list to find the source of the interrupt.
+         */
+        struct list_head        list;
+
+        /* Each of the two spinlocks protects a different set of hardware
+         * regiters and data structurs. This decouples the code of the IRQ from
+         * the GPIO code. This also makes the case of a GPIO routine call from
+         * the IRQ code simpler.
+         */
+        spinlock_t              lock;           /* GPIO registers */
+        spinlock_t              irq_lock;       /* IRQ registers */
+
+        void __iomem            *base;
+        unsigned                irq_base;
+        struct gpio_chip        gc;
+};
+
+static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
+{
+        struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
+        unsigned long flags;
+        unsigned char gpiodir;
+
+        if (offset >= gc->ngpio)
+                return -EINVAL;
+
+        spin_lock_irqsave(&chip->lock, flags);
+        gpiodir = readb(chip->base + GPIODIR);
+        gpiodir &= ~(1 << offset);
+        writeb(gpiodir, chip->base + GPIODIR);
+        spin_unlock_irqrestore(&chip->lock, flags);
+
+        return 0;
+}
+
+static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
+                int value)
+{
+        struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
+        unsigned long flags;
+        unsigned char gpiodir;
+
+        if (offset >= gc->ngpio)
+                return -EINVAL;
+
+        spin_lock_irqsave(&chip->lock, flags);
+        writeb(!!value << offset, chip->base + (1 << (offset + 2)));
+        gpiodir = readb(chip->base + GPIODIR);
+        gpiodir |= 1 << offset;
+        writeb(gpiodir, chip->base + GPIODIR);
+        spin_unlock_irqrestore(&chip->lock, flags);
+
+        return 0;
+}
+
+static int pl061_get_value(struct gpio_chip *gc, unsigned offset)
+{
+        struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
+
+        return !!readb(chip->base + (1 << (offset + 2)));
+}
+
+static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)
+{
+        struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
+
+        writeb(!!value << offset, chip->base + (1 << (offset + 2)));
+}
+
+/*
+ * PL061 GPIO IRQ
+ */
+static void pl061_irq_disable(unsigned irq)
+{
+        struct pl061_gpio *chip = get_irq_chip_data(irq);
+        int offset = irq - chip->irq_base;
+        unsigned long flags;
+        u8 gpioie;
+
+        spin_lock_irqsave(&chip->irq_lock, flags);
+        gpioie = readb(chip->base + GPIOIE);
+        gpioie &= ~(1 << offset);
+        writeb(gpioie, chip->base + GPIOIE);
+        spin_unlock_irqrestore(&chip->irq_lock, flags);
+}
+
+static void pl061_irq_enable(unsigned irq)
+{
+        struct pl061_gpio *chip = get_irq_chip_data(irq);
+        int offset = irq - chip->irq_base;
+        unsigned long flags;
+        u8 gpioie;
+
+        spin_lock_irqsave(&chip->irq_lock, flags);
+        gpioie = readb(chip->base + GPIOIE);
+        gpioie |= 1 << offset;
+        writeb(gpioie, chip->base + GPIOIE);
+        spin_unlock_irqrestore(&chip->irq_lock, flags);
+}
+
+static int pl061_irq_type(unsigned irq, unsigned trigger)
+{
+        struct pl061_gpio *chip = get_irq_chip_data(irq);
+        int offset = irq - chip->irq_base;
+        unsigned long flags;
+        u8 gpiois, gpioibe, gpioiev;
+
+        if (offset < 0 || offset > PL061_GPIO_NR)
+                return -EINVAL;
+
+        spin_lock_irqsave(&chip->irq_lock, flags);
+
+        gpioiev = readb(chip->base + GPIOIEV);
+
+        gpiois = readb(chip->base + GPIOIS);
+        if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
+                gpiois |= 1 << offset;
+                if (trigger & IRQ_TYPE_LEVEL_HIGH)
+                        gpioiev |= 1 << offset;
+                else
+                        gpioiev &= ~(1 << offset);
+        } else
+                gpiois &= ~(1 << offset);
+        writeb(gpiois, chip->base + GPIOIS);
+
+        gpioibe = readb(chip->base + GPIOIBE);
+        if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
+                gpioibe |= 1 << offset;
+        else {
+                gpioibe &= ~(1 << offset);
+                if (trigger & IRQ_TYPE_EDGE_RISING)
+                        gpioiev |= 1 << offset;
+                else
+                        gpioiev &= ~(1 << offset);
+        }
+        writeb(gpioibe, chip->base + GPIOIBE);
+
+        writeb(gpioiev, chip->base + GPIOIEV);
+
+        spin_unlock_irqrestore(&chip->irq_lock, flags);
+
+        return 0;
+}
+
+static struct irq_chip pl061_irqchip = {
+        .name           = "GPIO",
+        .enable         = pl061_irq_enable,
+        .disable        = pl061_irq_disable,
+        .set_type       = pl061_irq_type,
+};
+
+static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+        struct list_head *chip_list = get_irq_chip_data(irq);
+        struct list_head *ptr;
+        struct pl061_gpio *chip;
+
+        desc->chip->ack(irq);
+        list_for_each(ptr, chip_list) {
+                unsigned long pending;
+                int gpio;
+
+                chip = list_entry(ptr, struct pl061_gpio, list);
+                pending = readb(chip->base + GPIOMIS);
+                writeb(pending, chip->base + GPIOIC);
+
+                if (pending == 0)
+                        continue;
+
+                for_each_bit(gpio, &pending, PL061_GPIO_NR)
+                        generic_handle_irq(gpio_to_irq(gpio));
+        }
+        desc->chip->unmask(irq);
+}
+
+static int __init pl061_probe(struct amba_device *dev, struct amba_id *id)
+{
+        struct pl061_platform_data *pdata;
+        struct pl061_gpio *chip;
+        struct list_head *chip_list;
+        int ret, irq, i;
+        static unsigned long init_irq[BITS_TO_LONGS(NR_IRQS)];
+
+        pdata = dev->dev.platform_data;
+        if (pdata == NULL)
+                return -ENODEV;
+
+        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+        if (chip == NULL)
+                return -ENOMEM;
+
+        if (!request_mem_region(dev->res.start,
+                                resource_size(&dev->res), "pl061")) {
+                ret = -EBUSY;
+                goto free_mem;
+        }
+
+        chip->base = ioremap(dev->res.start, resource_size(&dev->res));
+        if (chip->base == NULL) {
+                ret = -ENOMEM;
+                goto release_region;
+        }
+
+        spin_lock_init(&chip->lock);
+        spin_lock_init(&chip->irq_lock);
+        INIT_LIST_HEAD(&chip->list);
+
+        chip->gc.direction_input = pl061_direction_input;
+        chip->gc.direction_output = pl061_direction_output;
+        chip->gc.get = pl061_get_value;
+        chip->gc.set = pl061_set_value;
+        chip->gc.base = pdata->gpio_base;
+        chip->gc.ngpio = PL061_GPIO_NR;
+        chip->gc.label = dev_name(&dev->dev);
+        chip->gc.dev = &dev->dev;
+        chip->gc.owner = THIS_MODULE;
+
+        chip->irq_base = pdata->irq_base;
+
+        ret = gpiochip_add(&chip->gc);
+        if (ret)
+                goto iounmap;
+
+        /*
+         * irq_chip support
+         */
+
+        if (chip->irq_base == (unsigned) -1)
+                return 0;
+
+        writeb(0, chip->base + GPIOIE); /* disable irqs */
+        irq = dev->irq[0];
+        if (irq < 0) {
+                ret = -ENODEV;
+                goto iounmap;
+        }
+        set_irq_chained_handler(irq, pl061_irq_handler);
+        if (!test_and_set_bit(irq, init_irq)) { /* list initialized? */
+                chip_list = kmalloc(sizeof(*chip_list), GFP_KERNEL);
+                if (chip_list == NULL) {
+                        ret = -ENOMEM;
+                        goto iounmap;
+                }
+                INIT_LIST_HEAD(chip_list);
+                set_irq_chip_data(irq, chip_list);
+        } else
+                chip_list = get_irq_chip_data(irq);
+        list_add(&chip->list, chip_list);
+
+        for (i = 0; i < PL061_GPIO_NR; i++) {
+                if (pdata->directions & (1 << i))
+                        pl061_direction_output(&chip->gc, i,
+                                        pdata->values & (1 << i));
+                else
+                        pl061_direction_input(&chip->gc, i);
+
+                set_irq_chip(i+chip->irq_base, &pl061_irqchip);
+                set_irq_handler(i+chip->irq_base, handle_simple_irq);
+                set_irq_flags(i+chip->irq_base, IRQF_VALID);
+                set_irq_chip_data(i+chip->irq_base, chip);
+        }
+
+        return 0;
+
+iounmap:
+        iounmap(chip->base);
+release_region:
+        release_mem_region(dev->res.start, resource_size(&dev->res));
+free_mem:
+        kfree(chip);
+
+        return ret;
+}
+
+static struct amba_id pl061_ids[] __initdata = {
+        {
+                .id     = 0x00041061,
+                .mask   = 0x000fffff,
+        },
+        { 0, 0 },
+};
+
+static struct amba_driver pl061_gpio_driver = {
+        .drv = {
+                .name   = "pl061_gpio",
+        },
+        .id_table       = pl061_ids,
+        .probe          = pl061_probe,
+};
+
+static int __init pl061_gpio_init(void)
+{
+        return amba_driver_register(&pl061_gpio_driver);
+}
+subsys_initcall(pl061_gpio_init);
+
+MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
+MODULE_DESCRIPTION("PL061 GPIO driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index dd778d7ae047..d325e86e3103 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -197,7 +197,7 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
                 return -EINVAL;
 
         /* Determine divider value */
-        divider = mpc52xx_find_ipb_freq(node) / clock;
+        divider = mpc5xxx_get_bus_frequency(node) / clock;
 
         /*
          * We want to choose an FDR/DFSR that generates an I2C bus speed that
diff --git a/drivers/md/dm-exception-store.h b/drivers/md/dm-exception-store.h
index 0a2e6e7f67b3..c92701dc5001 100644
--- a/drivers/md/dm-exception-store.h
+++ b/drivers/md/dm-exception-store.h
@@ -111,7 +111,7 @@ struct dm_exception_store {
 /*
  * Funtions to manipulate consecutive chunks
  */
-#  if defined(CONFIG_LBD) || (BITS_PER_LONG == 64)
+#  if defined(CONFIG_LBDAF) || (BITS_PER_LONG == 64)
 #    define DM_CHUNK_CONSECUTIVE_BITS 8
 #    define DM_CHUNK_NUMBER_BITS 56
 
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index 0df065275cd3..5d0ba4f5924c 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -4414,11 +4414,11 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
                  * 1078 errata workaround for the 36GB limitation
                  */
                 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
-                    ioc->dma_mask > DMA_35BIT_MASK) {
+                    ioc->dma_mask > DMA_BIT_MASK(35)) {
                         if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
                             && !pci_set_consistent_dma_mask(ioc->pcidev,
                             DMA_BIT_MASK(32))) {
-                                dma_mask = DMA_35BIT_MASK;
+                                dma_mask = DMA_BIT_MASK(35);
                                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
                                     "setting 35 bit addressing for "
                                     "Request/Reply/Chain and Sense Buffers\n",
@@ -4575,7 +4575,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
                 alloc_dma += ioc->reply_sz;
         }
 
-        if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
+        if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
             ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
             ioc->dma_mask))
                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
@@ -4602,7 +4602,7 @@ out_fail:
                 ioc->sense_buf_pool = NULL;
         }
 
-        if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
+        if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
             DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
             DMA_BIT_MASK(64)))
                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index 7d443405bbe2..cc786333d95c 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -948,7 +948,7 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
         /* Start with safe defaults for link connection */
         priv->speed = 100;
         priv->duplex = DUPLEX_HALF;
-        priv->mdio_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
+        priv->mdio_speed = ((mpc5xxx_get_bus_frequency(op->node) >> 20) / 5) << 1;
 
         /* The current speed preconfigures the speed of the MII link */
         prop = of_get_property(op->node, "current-speed", &prop_size);
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c
index fec9f245116b..31e6d62b785d 100644
--- a/drivers/net/fec_mpc52xx_phy.c
+++ b/drivers/net/fec_mpc52xx_phy.c
@@ -106,7 +106,7 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of,
 
         /* set MII speed */
         out_be32(&priv->regs->mii_speed,
-                ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
+                ((mpc5xxx_get_bus_frequency(of->node) >> 20) / 5) << 1);
 
         err = of_mdiobus_register(bus, np);
         if (err)
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c
index 22aadb7884fa..2bc9d63027db 100644
--- a/drivers/net/igbvf/netdev.c
+++ b/drivers/net/igbvf/netdev.c
@@ -1281,7 +1281,7 @@ static void igbvf_configure_tx(struct igbvf_adapter *adapter)
         /* Setup the HW Tx Head and Tail descriptor pointers */
         ew32(TDLEN(0), tx_ring->count * sizeof(union e1000_adv_tx_desc));
         tdba = tx_ring->dma;
-        ew32(TDBAL(0), (tdba & DMA_32BIT_MASK));
+        ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
         ew32(TDBAH(0), (tdba >> 32));
         ew32(TDH(0), 0);
         ew32(TDT(0), 0);
@@ -1367,7 +1367,7 @@ static void igbvf_configure_rx(struct igbvf_adapter *adapter)
          * the Base and Length of the Rx Descriptor Ring
          */
         rdba = rx_ring->dma;
-        ew32(RDBAL(0), (rdba & DMA_32BIT_MASK));
+        ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
         ew32(RDBAH(0), (rdba >> 32));
         ew32(RDLEN(0), rx_ring->count * sizeof(union e1000_adv_rx_desc));
         rx_ring->head = E1000_RDH(0);
@@ -2628,15 +2628,16 @@ static int __devinit igbvf_probe(struct pci_dev *pdev,
                 return err;
 
         pci_using_dac = 0;
-        err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
+        err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
         if (!err) {
-                err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
+                err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
                 if (!err)
                         pci_using_dac = 1;
         } else {
-                err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+                err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
                 if (err) {
-                        err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
+                        err = pci_set_consistent_dma_mask(pdev,
+                                                          DMA_BIT_MASK(32));
                         if (err) {
                                 dev_err(&pdev->dev, "No usable DMA "
                                         "configuration, aborting\n");
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c
index 3c3bf1f07b81..fa9f24e23683 100644
--- a/drivers/net/ixgbe/ixgbe_fcoe.c
+++ b/drivers/net/ixgbe/ixgbe_fcoe.c
@@ -251,7 +251,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
         /* program DMA context */
         hw = &adapter->hw;
         spin_lock_bh(&fcoe->lock);
-        IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_32BIT_MASK);
+        IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
         IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
         IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
         IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
diff --git a/drivers/net/ps3_gelic_net.c b/drivers/net/ps3_gelic_net.c
index 2b38f39924a6..d1a5fb4d6acb 100644
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -214,9 +214,10 @@ static void gelic_card_free_chain(struct gelic_card *card,
  *
  * returns 0 on success, <0 on failure
  */
-static int gelic_card_init_chain(struct gelic_card *card,
-                                 struct gelic_descr_chain *chain,
-                                 struct gelic_descr *start_descr, int no)
+static int __devinit gelic_card_init_chain(struct gelic_card *card,
+                                           struct gelic_descr_chain *chain,
+                                           struct gelic_descr *start_descr,
+                                           int no)
 {
         int i;
         struct gelic_descr *descr;
@@ -407,7 +408,7 @@ rewind:
  *
  * returns 0 on success, < 0 on failure
  */
-static int gelic_card_alloc_rx_skbs(struct gelic_card *card)
+static int __devinit gelic_card_alloc_rx_skbs(struct gelic_card *card)
 {
         struct gelic_descr_chain *chain;
         int ret;
@@ -1422,8 +1423,8 @@ static const struct net_device_ops gelic_netdevice_ops = {
  *
  * fills out function pointers in the net_device structure
  */
-static void gelic_ether_setup_netdev_ops(struct net_device *netdev,
-                                         struct napi_struct *napi)
+static void __devinit gelic_ether_setup_netdev_ops(struct net_device *netdev,
+                                                   struct napi_struct *napi)
 {
         netdev->watchdog_timeo = GELIC_NET_WATCHDOG_TIMEOUT;
         /* NAPI */
@@ -1443,7 +1444,8 @@ static void gelic_ether_setup_netdev_ops(struct net_device *netdev,
  * gelic_ether_setup_netdev initializes the net_device structure
  * and register it.
  **/
-int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card)
+int __devinit gelic_net_setup_netdev(struct net_device *netdev,
+                                     struct gelic_card *card)
 {
         int status;
         u64 v1, v2;
@@ -1491,7 +1493,7 @@ int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card)
  * the card and net_device structures are linked to each other
  */
 #define GELIC_ALIGN (32)
-static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev)
+static struct gelic_card * __devinit gelic_alloc_card_net(struct net_device **netdev)
 {
         struct gelic_card *card;
         struct gelic_port *port;
@@ -1542,7 +1544,7 @@ static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev)
         return card;
 }
 
-static void gelic_card_get_vlan_info(struct gelic_card *card)
+static void __devinit gelic_card_get_vlan_info(struct gelic_card *card)
 {
         u64 v1, v2;
         int status;
@@ -1616,7 +1618,7 @@ static void gelic_card_get_vlan_info(struct gelic_card *card)
 /**
  * ps3_gelic_driver_probe - add a device to the control of this driver
  */
-static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev)
+static int __devinit ps3_gelic_driver_probe(struct ps3_system_bus_device *dev)
 {
         struct gelic_card *card;
         struct net_device *netdev;
diff --git a/drivers/net/ps3_gelic_wireless.c b/drivers/net/ps3_gelic_wireless.c
index 4f3ada622f9b..b6b3ca9bdb21 100644
--- a/drivers/net/ps3_gelic_wireless.c
+++ b/drivers/net/ps3_gelic_wireless.c
@@ -2442,7 +2442,7 @@ static const struct iw_handler_def gelic_wl_wext_handler_def = {
 #endif
 };
 
-static struct net_device *gelic_wl_alloc(struct gelic_card *card)
+static struct net_device * __devinit gelic_wl_alloc(struct gelic_card *card)
 {
         struct net_device *netdev;
         struct gelic_port *port;
@@ -2722,7 +2722,7 @@ static struct ethtool_ops gelic_wl_ethtool_ops = {
         .set_rx_csum    = gelic_net_set_rx_csum,
 };
 
-static void gelic_wl_setup_netdev_ops(struct net_device *netdev)
+static void __devinit gelic_wl_setup_netdev_ops(struct net_device *netdev)
 {
         struct gelic_wl_info *wl;
         wl = port_wl(netdev_priv(netdev));
@@ -2738,7 +2738,7 @@ static void gelic_wl_setup_netdev_ops(struct net_device *netdev)
 /*
  * driver probe/remove
  */
-int gelic_wl_driver_probe(struct gelic_card *card)
+int __devinit gelic_wl_driver_probe(struct gelic_card *card)
 {
         int ret;
         struct net_device *netdev;
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index 3b78540288c7..45415096c294 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -263,15 +263,21 @@ static void rio_route_set_ops(struct rio_dev *rdev)
  * device to the RIO device list.  Creates the generic sysfs nodes
  * for an RIO device.
  */
-static void __devinit rio_add_device(struct rio_dev *rdev)
+static int __devinit rio_add_device(struct rio_dev *rdev)
 {
-        device_add(&rdev->dev);
+        int err;
+
+        err = device_add(&rdev->dev);
+        if (err)
+                return err;
 
         spin_lock(&rio_global_list_lock);
         list_add_tail(&rdev->global_list, &rio_devices);
         spin_unlock(&rio_global_list_lock);
 
         rio_create_sysfs_dev_files(rdev);
+
+        return 0;
 }
 
 /**
@@ -294,13 +300,14 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net,
                                         struct rio_mport *port, u16 destid,
                                         u8 hopcount, int do_enum)
 {
+        int ret = 0;
         struct rio_dev *rdev;
-        struct rio_switch *rswitch;
+        struct rio_switch *rswitch = NULL;
         int result, rdid;
 
         rdev = kzalloc(sizeof(struct rio_dev), GFP_KERNEL);
         if (!rdev)
-                goto out;
+                return NULL;
 
         rdev->net = net;
         rio_mport_read_config_32(port, destid, hopcount, RIO_DEV_ID_CAR,
@@ -343,23 +350,16 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net,
                 rio_mport_read_config_32(port, destid, hopcount,
                                          RIO_SWP_INFO_CAR, &rdev->swpinfo);
                 rswitch = kmalloc(sizeof(struct rio_switch), GFP_KERNEL);
-                if (!rswitch) {
-                        kfree(rdev);
-                        rdev = NULL;
-                        goto out;
-                }
+                if (!rswitch)
+                        goto cleanup;
                 rswitch->switchid = next_switchid;
                 rswitch->hopcount = hopcount;
                 rswitch->destid = destid;
                 rswitch->route_table = kzalloc(sizeof(u8)*
                                         RIO_MAX_ROUTE_ENTRIES(port->sys_size),
                                         GFP_KERNEL);
-                if (!rswitch->route_table) {
-                        kfree(rdev);
-                        rdev = NULL;
-                        kfree(rswitch);
-                        goto out;
-                }
+                if (!rswitch->route_table)
+                        goto cleanup;
                 /* Initialize switch route table */
                 for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES(port->sys_size);
                                 rdid++)
@@ -390,10 +390,19 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net,
                 rio_init_dbell_res(&rdev->riores[RIO_DOORBELL_RESOURCE],
                                    0, 0xffff);
 
-        rio_add_device(rdev);
+        ret = rio_add_device(rdev);
+        if (ret)
+                goto cleanup;
 
-      out:
         return rdev;
+
+cleanup:
+        if (rswitch) {
+                kfree(rswitch->route_table);
+                kfree(rswitch);
+        }
+        kfree(rdev);
+        return NULL;
 }
 
 /**
diff --git a/drivers/rapidio/rio-sysfs.c b/drivers/rapidio/rio-sysfs.c
index 97a147f050d6..ba742e82c57d 100644
--- a/drivers/rapidio/rio-sysfs.c
+++ b/drivers/rapidio/rio-sysfs.c
@@ -214,9 +214,11 @@ static struct bin_attribute rio_config_attr = {
  */
 int rio_create_sysfs_dev_files(struct rio_dev *rdev)
 {
-        sysfs_create_bin_file(&rdev->dev.kobj, &rio_config_attr);
+        int err = 0;
 
-        return 0;
+        err = sysfs_create_bin_file(&rdev->dev.kobj, &rio_config_attr);
+
+        return err;
 }
 
 /**
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 4348c4b0d453..4cdb31a362ca 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -371,19 +371,21 @@ EXPORT_SYMBOL_GPL(rtc_update_irq_enable);
  * @rtc: the rtc device
  * @num: how many irqs are being reported (usually one)
  * @events: mask of RTC_IRQF with one or more of RTC_PF, RTC_AF, RTC_UF
- * Context: in_interrupt(), irqs blocked
+ * Context: any
  */
 void rtc_update_irq(struct rtc_device *rtc,
                 unsigned long num, unsigned long events)
 {
-        spin_lock(&rtc->irq_lock);
+        unsigned long flags;
+
+        spin_lock_irqsave(&rtc->irq_lock, flags);
         rtc->irq_data = (rtc->irq_data + (num << 8)) | events;
-        spin_unlock(&rtc->irq_lock);
+        spin_unlock_irqrestore(&rtc->irq_lock, flags);
 
-        spin_lock(&rtc->irq_task_lock);
+        spin_lock_irqsave(&rtc->irq_task_lock, flags);
         if (rtc->irq_task)
                 rtc->irq_task->func(rtc->irq_task->private_data);
-        spin_unlock(&rtc->irq_task_lock);
+        spin_unlock_irqrestore(&rtc->irq_task_lock, flags);
 
         wake_up_interruptible(&rtc->irq_queue);
         kill_fasync(&rtc->async_queue, SIGIO, POLL_IN);
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c
index 45152f4952d6..8a11de9552cd 100644
--- a/drivers/rtc/rtc-dev.c
+++ b/drivers/rtc/rtc-dev.c
@@ -60,8 +60,7 @@ static void rtc_uie_task(struct work_struct *work)
 
         err = rtc_read_time(rtc, &tm);
 
-        local_irq_disable();
-        spin_lock(&rtc->irq_lock);
+        spin_lock_irq(&rtc->irq_lock);
         if (rtc->stop_uie_polling || err) {
                 rtc->uie_task_active = 0;
         } else if (rtc->oldsecs != tm.tm_sec) {
@@ -74,10 +73,9 @@ static void rtc_uie_task(struct work_struct *work)
         } else if (schedule_work(&rtc->uie_task) == 0) {
                 rtc->uie_task_active = 0;
         }
-        spin_unlock(&rtc->irq_lock);
+        spin_unlock_irq(&rtc->irq_lock);
         if (num)
                 rtc_update_irq(rtc, num, RTC_UF | RTC_IRQF);
-        local_irq_enable();
 }
 static void rtc_uie_timer(unsigned long data)
 {
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index fc372df6534b..8f410e59d9f5 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -499,10 +499,7 @@ static void ds1305_work(struct work_struct *work)
         if (!test_bit(FLAG_EXITING, &ds1305->flags))
                 enable_irq(spi->irq);
 
-        /* rtc_update_irq() requires an IRQ-disabled context */
-        local_irq_disable();
         rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
-        local_irq_enable();
 }
 
 /*
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 8a6f9a9f9cb8..47a93c022d91 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -267,12 +267,7 @@ static void ds1307_work(struct work_struct *work)
                 control &= ~DS1337_BIT_A1IE;
                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 
-                /* rtc_update_irq() assumes that it is called
-                 * from IRQ-disabled context.
-                 */
-                local_irq_disable();
                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
-                local_irq_enable();
         }
 
 out:
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 4d32e328f6cd..32b27739ec2a 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -296,12 +296,7 @@ static void ds1374_work(struct work_struct *work)
                 control &= ~(DS1374_REG_CR_WACE | DS1374_REG_CR_AIE);
                 i2c_smbus_write_byte_data(client, DS1374_REG_CR, control);
 
-                /* rtc_update_irq() assumes that it is called
-                 * from IRQ-disabled context.
-                 */
-                local_irq_disable();
                 rtc_update_irq(ds1374->rtc, 1, RTC_AF | RTC_IRQF);
-                local_irq_enable();
         }
 
 out:
diff --git a/drivers/rtc/rtc-test.c b/drivers/rtc/rtc-test.c
index e478280ff628..51725f7755b0 100644
--- a/drivers/rtc/rtc-test.c
+++ b/drivers/rtc/rtc-test.c
@@ -93,7 +93,6 @@ static ssize_t test_irq_store(struct device *dev,
         struct rtc_device *rtc = platform_get_drvdata(plat_dev);
 
         retval = count;
-        local_irq_disable();
         if (strncmp(buf, "tick", 4) == 0)
                 rtc_update_irq(rtc, 1, RTC_PF | RTC_IRQF);
         else if (strncmp(buf, "alarm", 5) == 0)
@@ -102,7 +101,6 @@ static ssize_t test_irq_store(struct device *dev,
                 rtc_update_irq(rtc, 1, RTC_UF | RTC_IRQF);
         else
                 retval = -EINVAL;
-        local_irq_enable();
 
         return retval;
 }
diff --git a/drivers/scsi/ps3rom.c b/drivers/scsi/ps3rom.c
index ca0dd33497ec..db90caf43f42 100644
--- a/drivers/scsi/ps3rom.c
+++ b/drivers/scsi/ps3rom.c
@@ -299,7 +299,7 @@ static irqreturn_t ps3rom_interrupt(int irq, void *data)
                 return IRQ_HANDLED;
         }
 
-        host = dev->sbd.core.driver_data;
+        host = ps3_system_bus_get_drvdata(&dev->sbd);
         priv = shost_priv(host);
         cmd = priv->curr_cmd;
 
@@ -387,7 +387,7 @@ static int __devinit ps3rom_probe(struct ps3_system_bus_device *_dev)
         }
 
         priv = shost_priv(host);
-        dev->sbd.core.driver_data = host;
+        ps3_system_bus_set_drvdata(&dev->sbd, host);
         priv->dev = dev;
 
         /* One device/LUN per SCSI bus */
@@ -407,7 +407,7 @@ static int __devinit ps3rom_probe(struct ps3_system_bus_device *_dev)
 
 fail_host_put:
         scsi_host_put(host);
-        dev->sbd.core.driver_data = NULL;
+        ps3_system_bus_set_drvdata(&dev->sbd, NULL);
 fail_teardown:
         ps3stor_teardown(dev);
 fail_free_bounce:
@@ -418,12 +418,12 @@ fail_free_bounce:
 static int ps3rom_remove(struct ps3_system_bus_device *_dev)
 {
         struct ps3_storage_device *dev = to_ps3_storage_device(&_dev->core);
-        struct Scsi_Host *host = dev->sbd.core.driver_data;
+        struct Scsi_Host *host = ps3_system_bus_get_drvdata(&dev->sbd);
 
         scsi_remove_host(host);
         ps3stor_teardown(dev);
         scsi_host_put(host);
-        dev->sbd.core.driver_data = NULL;
+        ps3_system_bus_set_drvdata(&dev->sbd, NULL);
         kfree(dev->bounce_buf);
         return 0;
 }
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index b3feb6198d57..abbd146c50d9 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -76,7 +76,6 @@
 #include <linux/of_platform.h>
 
 #include <asm/mpc52xx.h>
-#include <asm/mpc512x.h>
 #include <asm/mpc52xx_psc.h>
 
 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
@@ -254,7 +253,7 @@ static unsigned long mpc52xx_getuartclk(void *p)
          * but the generic serial code assumes 16
          * so return ipb freq / 2
          */
-        return mpc52xx_find_ipb_freq(p) / 2;
+        return mpc5xxx_get_bus_frequency(p) / 2;
 }
 
 static struct psc_ops mpc52xx_psc_ops = {
@@ -391,7 +390,7 @@ static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
 
 static unsigned long mpc512x_getuartclk(void *p)
 {
-        return mpc512x_find_ips_freq(p);
+        return mpc5xxx_get_bus_frequency(p);
 }
 
 static struct psc_ops mpc512x_psc_ops = {
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index 54483cd3529e..02406ba6da1c 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -67,7 +67,7 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev,
         port->type = type;
         port->uartclk = *clk;
         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
-                | UPF_FIXED_PORT;
+                | UPF_FIXED_PORT | UPF_FIXED_TYPE;
         port->dev = &ofdev->dev;
         /* If current-speed was set, then try not to change it. */
         if (spd)
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index 7de66c06b05d..e945e780b5c9 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -681,22 +681,27 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
         out_be16(&uccup->rccm, 0xc0ff);
 
         /* Configure the GUMR registers for UART */
-        if (soft_uart)
+        if (soft_uart) {
                 /* Soft-UART requires a 1X multiplier for TX */
                 clrsetbits_be32(&uccp->gumr_l,
                         UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
                         UCC_SLOW_GUMR_L_RDCR_MASK,
                         UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 |
                         UCC_SLOW_GUMR_L_RDCR_16);
-        else
+
+                clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW,
+                        UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX);
+        } else {
                 clrsetbits_be32(&uccp->gumr_l,
                         UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
                         UCC_SLOW_GUMR_L_RDCR_MASK,
                         UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 |
                         UCC_SLOW_GUMR_L_RDCR_16);
 
-        clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW,
-                UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX);
+                clrsetbits_be32(&uccp->gumr_h,
+                        UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX,
+                        UCC_SLOW_GUMR_H_RFW);
+        }
 
 #ifdef LOOPBACK
         clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK,
@@ -706,7 +711,7 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
                 UCC_SLOW_GUMR_H_CDS);
 #endif
 
-        /* Enable rx interrupts  and clear all pending events.  */
+        /* Disable rx interrupts  and clear all pending events.  */
         out_be16(&uccp->uccm, 0);
         out_be16(&uccp->ucce, 0xffff);
         out_be16(&uccp->udsr, 0x7e7e);
@@ -765,6 +770,10 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
                 cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num);
                 qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock,
                         QE_CR_PROTOCOL_UNSPECIFIED, 0);
+        } else {
+                cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num);
+                qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock,
+                        QE_CR_PROTOCOL_UART, 0);
         }
 }
 
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index e8aae227b5e0..2c733c27db2f 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -139,17 +139,15 @@ config SPI_MPC52xx_PSC
           This enables using the Freescale MPC52xx Programmable Serial
           Controller in master SPI mode.
 
-config SPI_MPC83xx
-        tristate "Freescale MPC83xx/QUICC Engine SPI controller"
-        depends on (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL
+config SPI_MPC8xxx
+        tristate "Freescale MPC8xxx SPI controller"
+        depends on FSL_SOC
         help
-          This enables using the Freescale MPC83xx and QUICC Engine SPI
-          controllers in master mode.
+          This enables using the Freescale MPC8xxx SPI controllers in master
+          mode.
 
-          Note, this driver uniquely supports the SPI controller on the MPC83xx
-          family of PowerPC processors, plus processors with QUICC Engine
-          technology. This driver uses a simple set of shift registers for data
-          (opposed to the CPM based descriptor model).
+          This driver uses a simple set of shift registers for data (opposed
+          to the CPM based descriptor model).
 
 config SPI_OMAP_UWIRE
         tristate "OMAP1 MicroWire"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ecfadb180482..3de408d294ba 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_SPI_OMAP24XX)		+= omap2_mcspi.o
 obj-$(CONFIG_SPI_ORION)                 += orion_spi.o
 obj-$(CONFIG_SPI_PL022)                 += amba-pl022.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)           += mpc52xx_psc_spi.o
-obj-$(CONFIG_SPI_MPC83xx)               += spi_mpc83xx.o
+obj-$(CONFIG_SPI_MPC8xxx)               += spi_mpc8xxx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)          += spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx.o
 obj-$(CONFIG_SPI_TXX9)                  += spi_txx9.o
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc8xxx.c
index ce61be98e06d..0fd0ec4d3a7d 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1,5 +1,5 @@
 /*
- * MPC83xx SPI controller driver.
+ * MPC8xxx SPI controller driver.
  *
  * Maintainer: Kumar Gala
  *
@@ -14,8 +14,10 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/io.h>
 #include <linux/completion.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
@@ -33,10 +35,9 @@
 
 #include <sysdev/fsl_soc.h>
 #include <asm/irq.h>
-#include <asm/io.h>
 
 /* SPI Controller registers */
-struct mpc83xx_spi_reg {
+struct mpc8xxx_spi_reg {
         u8 res1[0x20];
         __be32 mode;
         __be32 event;
@@ -75,16 +76,16 @@ struct mpc83xx_spi_reg {
 #define SPIM_NF         0x00000100      /* Not full */
 
 /* SPI Controller driver's private data. */
-struct mpc83xx_spi {
-        struct mpc83xx_spi_reg __iomem *base;
+struct mpc8xxx_spi {
+        struct mpc8xxx_spi_reg __iomem *base;
 
         /* rx & tx bufs from the spi_transfer */
         const void *tx;
         void *rx;
 
         /* functions to deal with different sized buffers */
-        void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
-        u32(*get_tx) (struct mpc83xx_spi *);
+        void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+        u32(*get_tx) (struct mpc8xxx_spi *);
 
         unsigned int count;
         unsigned int irq;
@@ -97,8 +98,6 @@ struct mpc83xx_spi {
 
         bool qe_mode;
 
-        u8 busy;
-
         struct workqueue_struct *workqueue;
         struct work_struct work;
 
@@ -108,44 +107,44 @@ struct mpc83xx_spi {
         struct completion done;
 };
 
-struct spi_mpc83xx_cs {
+struct spi_mpc8xxx_cs {
         /* functions to deal with different sized buffers */
-        void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
-        u32 (*get_tx) (struct mpc83xx_spi *);
+        void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+        u32 (*get_tx) (struct mpc8xxx_spi *);
         u32 rx_shift;           /* RX data reg shift when in qe mode */
         u32 tx_shift;           /* TX data reg shift when in qe mode */
         u32 hw_mode;            /* Holds HW mode register settings */
 };
 
-static inline void mpc83xx_spi_write_reg(__be32 __iomem * reg, u32 val)
+static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
 {
         out_be32(reg, val);
 }
 
-static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg)
+static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
 {
         return in_be32(reg);
 }
 
 #define MPC83XX_SPI_RX_BUF(type)                                          \
 static                                                                    \
-void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \
+void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
 {                                                                         \
-        type * rx = mpc83xx_spi->rx;                                      \
-        *rx++ = (type)(data >> mpc83xx_spi->rx_shift);                    \
-        mpc83xx_spi->rx = rx;                                             \
+        type *rx = mpc8xxx_spi->rx;                                       \
+        *rx++ = (type)(data >> mpc8xxx_spi->rx_shift);                    \
+        mpc8xxx_spi->rx = rx;                                             \
 }
 
 #define MPC83XX_SPI_TX_BUF(type)                                \
 static                                                          \
-u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi)  \
+u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi)  \
 {                                                               \
         u32 data;                                               \
-        const type * tx = mpc83xx_spi->tx;                      \
+        const type *tx = mpc8xxx_spi->tx;                       \
         if (!tx)                                                \
                 return 0;                                       \
-        data = *tx++ << mpc83xx_spi->tx_shift;                  \
-        mpc83xx_spi->tx = tx;                                   \
+        data = *tx++ << mpc8xxx_spi->tx_shift;                  \
+        mpc8xxx_spi->tx = tx;                                   \
         return data;                                            \
 }
 
@@ -156,12 +155,12 @@ MPC83XX_SPI_TX_BUF(u8)
 MPC83XX_SPI_TX_BUF(u16)
 MPC83XX_SPI_TX_BUF(u32)
 
-static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
+static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
 {
-        struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master);
+        struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
         struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
         bool pol = spi->mode & SPI_CS_HIGH;
-        struct spi_mpc83xx_cs   *cs = spi->controller_state;
+        struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
         if (value == BITBANG_CS_INACTIVE) {
                 if (pdata->cs_control)
@@ -169,16 +168,16 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
         }
 
         if (value == BITBANG_CS_ACTIVE) {
-                u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
+                u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
 
-                mpc83xx_spi->rx_shift = cs->rx_shift;
-                mpc83xx_spi->tx_shift = cs->tx_shift;
-                mpc83xx_spi->get_rx = cs->get_rx;
-                mpc83xx_spi->get_tx = cs->get_tx;
+                mpc8xxx_spi->rx_shift = cs->rx_shift;
+                mpc8xxx_spi->tx_shift = cs->tx_shift;
+                mpc8xxx_spi->get_rx = cs->get_rx;
+                mpc8xxx_spi->get_tx = cs->get_tx;
 
                 if (cs->hw_mode != regval) {
                         unsigned long flags;
-                        __be32 __iomem *mode = &mpc83xx_spi->base->mode;
+                        __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
 
                         regval = cs->hw_mode;
                         /* Turn off IRQs locally to minimize time that
@@ -186,8 +185,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
                          */
                         local_irq_save(flags);
                         /* Turn off SPI unit prior changing mode */
-                        mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
-                        mpc83xx_spi_write_reg(mode, regval);
+                        mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
+                        mpc8xxx_spi_write_reg(mode, regval);
                         local_irq_restore(flags);
                 }
                 if (pdata->cs_control)
@@ -196,15 +195,15 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
 }
 
 static
-int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
+int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 {
-        struct mpc83xx_spi *mpc83xx_spi;
+        struct mpc8xxx_spi *mpc8xxx_spi;
         u32 regval;
         u8 bits_per_word, pm;
         u32 hz;
-        struct spi_mpc83xx_cs   *cs = spi->controller_state;
+        struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
-        mpc83xx_spi = spi_master_get_devdata(spi->master);
+        mpc8xxx_spi = spi_master_get_devdata(spi->master);
 
         if (t) {
                 bits_per_word = t->bits_per_word;
@@ -229,26 +228,26 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
         cs->rx_shift = 0;
         cs->tx_shift = 0;
         if (bits_per_word <= 8) {
-                cs->get_rx = mpc83xx_spi_rx_buf_u8;
-                cs->get_tx = mpc83xx_spi_tx_buf_u8;
-                if (mpc83xx_spi->qe_mode) {
+                cs->get_rx = mpc8xxx_spi_rx_buf_u8;
+                cs->get_tx = mpc8xxx_spi_tx_buf_u8;
+                if (mpc8xxx_spi->qe_mode) {
                         cs->rx_shift = 16;
                         cs->tx_shift = 24;
                 }
         } else if (bits_per_word <= 16) {
-                cs->get_rx = mpc83xx_spi_rx_buf_u16;
-                cs->get_tx = mpc83xx_spi_tx_buf_u16;
-                if (mpc83xx_spi->qe_mode) {
+                cs->get_rx = mpc8xxx_spi_rx_buf_u16;
+                cs->get_tx = mpc8xxx_spi_tx_buf_u16;
+                if (mpc8xxx_spi->qe_mode) {
                         cs->rx_shift = 16;
                         cs->tx_shift = 16;
                 }
         } else if (bits_per_word <= 32) {
-                cs->get_rx = mpc83xx_spi_rx_buf_u32;
-                cs->get_tx = mpc83xx_spi_tx_buf_u32;
+                cs->get_rx = mpc8xxx_spi_rx_buf_u32;
+                cs->get_tx = mpc8xxx_spi_tx_buf_u32;
         } else
                 return -EINVAL;
 
-        if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
+        if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
                 cs->tx_shift = 0;
                 if (bits_per_word <= 8)
                         cs->rx_shift = 8;
@@ -256,10 +255,10 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
                         cs->rx_shift = 0;
         }
 
-        mpc83xx_spi->rx_shift = cs->rx_shift;
-        mpc83xx_spi->tx_shift = cs->tx_shift;
-        mpc83xx_spi->get_rx = cs->get_rx;
-        mpc83xx_spi->get_tx = cs->get_tx;
+        mpc8xxx_spi->rx_shift = cs->rx_shift;
+        mpc8xxx_spi->tx_shift = cs->tx_shift;
+        mpc8xxx_spi->get_rx = cs->get_rx;
+        mpc8xxx_spi->get_tx = cs->get_tx;
 
         if (bits_per_word == 32)
                 bits_per_word = 0;
@@ -272,25 +271,25 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 
         cs->hw_mode |= SPMODE_LEN(bits_per_word);
 
-        if ((mpc83xx_spi->spibrg / hz) > 64) {
+        if ((mpc8xxx_spi->spibrg / hz) > 64) {
                 cs->hw_mode |= SPMODE_DIV16;
-                pm = mpc83xx_spi->spibrg / (hz * 64);
-                if (pm > 16) {
-                        dev_err(&spi->dev, "Requested speed is too "
-                                "low: %d Hz. Will use %d Hz instead.\n",
-                                hz, mpc83xx_spi->spibrg / 1024);
+                pm = mpc8xxx_spi->spibrg / (hz * 64);
+
+                WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
+                          "Will use %d Hz instead.\n", dev_name(&spi->dev),
+                          hz, mpc8xxx_spi->spibrg / 1024);
+                if (pm > 16)
                         pm = 16;
-                }
         } else
-                pm = mpc83xx_spi->spibrg / (hz * 4);
+                pm = mpc8xxx_spi->spibrg / (hz * 4);
         if (pm)
                 pm--;
 
         cs->hw_mode |= SPMODE_PM(pm);
-        regval =  mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
+        regval =  mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
         if (cs->hw_mode != regval) {
                 unsigned long flags;
-                __be32 __iomem *mode = &mpc83xx_spi->base->mode;
+                __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
 
                 regval = cs->hw_mode;
                 /* Turn off IRQs locally to minimize time
@@ -298,22 +297,22 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
                  */
                 local_irq_save(flags);
                 /* Turn off SPI unit prior changing mode */
-                mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
-                mpc83xx_spi_write_reg(mode, regval);
+                mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
+                mpc8xxx_spi_write_reg(mode, regval);
                 local_irq_restore(flags);
         }
         return 0;
 }
 
-static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
+static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 {
-        struct mpc83xx_spi *mpc83xx_spi;
+        struct mpc8xxx_spi *mpc8xxx_spi;
         u32 word, len, bits_per_word;
 
-        mpc83xx_spi = spi_master_get_devdata(spi->master);
+        mpc8xxx_spi = spi_master_get_devdata(spi->master);
 
-        mpc83xx_spi->tx = t->tx_buf;
-        mpc83xx_spi->rx = t->rx_buf;
+        mpc8xxx_spi->tx = t->tx_buf;
+        mpc8xxx_spi->rx = t->rx_buf;
         bits_per_word = spi->bits_per_word;
         if (t->bits_per_word)
                 bits_per_word = t->bits_per_word;
@@ -330,101 +329,106 @@ static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
                         return -EINVAL;
                 len /= 2;
         }
-        mpc83xx_spi->count = len;
+        mpc8xxx_spi->count = len;
 
-        INIT_COMPLETION(mpc83xx_spi->done);
+        INIT_COMPLETION(mpc8xxx_spi->done);
 
         /* enable rx ints */
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, SPIM_NE);
 
         /* transmit word */
-        word = mpc83xx_spi->get_tx(mpc83xx_spi);
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word);
+        word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
 
-        wait_for_completion(&mpc83xx_spi->done);
+        wait_for_completion(&mpc8xxx_spi->done);
 
         /* disable rx ints */
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
 
-        return mpc83xx_spi->count;
+        return mpc8xxx_spi->count;
 }
 
-static void mpc83xx_spi_work(struct work_struct *work)
+static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
 {
-        struct mpc83xx_spi *mpc83xx_spi =
-                container_of(work, struct mpc83xx_spi, work);
-
-        spin_lock_irq(&mpc83xx_spi->lock);
-        mpc83xx_spi->busy = 1;
-        while (!list_empty(&mpc83xx_spi->queue)) {
-                struct spi_message *m;
-                struct spi_device *spi;
-                struct spi_transfer *t = NULL;
-                unsigned cs_change;
-                int status, nsecs = 50;
-
-                m = container_of(mpc83xx_spi->queue.next,
-                                struct spi_message, queue);
-                list_del_init(&m->queue);
-                spin_unlock_irq(&mpc83xx_spi->lock);
-
-                spi = m->spi;
-                cs_change = 1;
-                status = 0;
-                list_for_each_entry(t, &m->transfers, transfer_list) {
-                        if (t->bits_per_word || t->speed_hz) {
-                                /* Don't allow changes if CS is active */
-                                status = -EINVAL;
-
-                                if (cs_change)
-                                        status = mpc83xx_spi_setup_transfer(spi, t);
-                                if (status < 0)
-                                        break;
-                        }
+        struct spi_device *spi = m->spi;
+        struct spi_transfer *t;
+        unsigned int cs_change;
+        const int nsecs = 50;
+        int status;
+
+        cs_change = 1;
+        status = 0;
+        list_for_each_entry(t, &m->transfers, transfer_list) {
+                if (t->bits_per_word || t->speed_hz) {
+                        /* Don't allow changes if CS is active */
+                        status = -EINVAL;
 
                         if (cs_change)
-                                mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
-                        cs_change = t->cs_change;
-                        if (t->len)
-                                status = mpc83xx_spi_bufs(spi, t);
-                        if (status) {
-                                status = -EMSGSIZE;
+                                status = mpc8xxx_spi_setup_transfer(spi, t);
+                        if (status < 0)
                                 break;
-                        }
-                        m->actual_length += t->len;
-
-                        if (t->delay_usecs)
-                                udelay(t->delay_usecs);
+                }
 
-                        if (cs_change) {
-                                ndelay(nsecs);
-                                mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
-                                ndelay(nsecs);
-                        }
+                if (cs_change) {
+                        mpc8xxx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
+                        ndelay(nsecs);
+                }
+                cs_change = t->cs_change;
+                if (t->len)
+                        status = mpc8xxx_spi_bufs(spi, t);
+                if (status) {
+                        status = -EMSGSIZE;
+                        break;
                 }
+                m->actual_length += t->len;
 
-                m->status = status;
-                m->complete(m->context);
+                if (t->delay_usecs)
+                        udelay(t->delay_usecs);
 
-                if (status || !cs_change) {
+                if (cs_change) {
+                        ndelay(nsecs);
+                        mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
                         ndelay(nsecs);
-                        mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
                 }
+        }
 
-                mpc83xx_spi_setup_transfer(spi, NULL);
+        m->status = status;
+        m->complete(m->context);
 
-                spin_lock_irq(&mpc83xx_spi->lock);
+        if (status || !cs_change) {
+                ndelay(nsecs);
+                mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
         }
-        mpc83xx_spi->busy = 0;
-        spin_unlock_irq(&mpc83xx_spi->lock);
+
+        mpc8xxx_spi_setup_transfer(spi, NULL);
 }
 
-static int mpc83xx_spi_setup(struct spi_device *spi)
+static void mpc8xxx_spi_work(struct work_struct *work)
 {
-        struct mpc83xx_spi *mpc83xx_spi;
+        struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
+                                                       work);
+
+        spin_lock_irq(&mpc8xxx_spi->lock);
+        while (!list_empty(&mpc8xxx_spi->queue)) {
+                struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
+                                                   struct spi_message, queue);
+
+                list_del_init(&m->queue);
+                spin_unlock_irq(&mpc8xxx_spi->lock);
+
+                mpc8xxx_spi_do_one_msg(m);
+
+                spin_lock_irq(&mpc8xxx_spi->lock);
+        }
+        spin_unlock_irq(&mpc8xxx_spi->lock);
+}
+
+static int mpc8xxx_spi_setup(struct spi_device *spi)
+{
+        struct mpc8xxx_spi *mpc8xxx_spi;
         int retval;
         u32 hw_mode;
-        struct spi_mpc83xx_cs   *cs = spi->controller_state;
+        struct spi_mpc8xxx_cs   *cs = spi->controller_state;
 
         if (!spi->max_speed_hz)
                 return -EINVAL;
@@ -435,10 +439,10 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
                         return -ENOMEM;
                 spi->controller_state = cs;
         }
-        mpc83xx_spi = spi_master_get_devdata(spi->master);
+        mpc8xxx_spi = spi_master_get_devdata(spi->master);
 
         hw_mode = cs->hw_mode; /* Save orginal settings */
-        cs->hw_mode = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
+        cs->hw_mode = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
         /* mask out bits we are going to set */
         cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
                          | SPMODE_REV | SPMODE_LOOP);
@@ -452,42 +456,29 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
         if (spi->mode & SPI_LOOP)
                 cs->hw_mode |= SPMODE_LOOP;
 
-        retval = mpc83xx_spi_setup_transfer(spi, NULL);
+        retval = mpc8xxx_spi_setup_transfer(spi, NULL);
         if (retval < 0) {
                 cs->hw_mode = hw_mode; /* Restore settings */
                 return retval;
         }
-
-#if 0 /* Don't think this is needed */
-        /* NOTE we _need_ to call chipselect() early, ideally with adapter
-         * setup, unless the hardware defaults cooperate to avoid confusion
-         * between normal (active low) and inverted chipselects.
-         */
-
-        /* deselect chip (low or high) */
-        spin_lock(&mpc83xx_spi->lock);
-        if (!mpc83xx_spi->busy)
-                mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
-        spin_unlock(&mpc83xx_spi->lock);
-#endif
         return 0;
 }
 
-static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data)
+static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
 {
-        struct mpc83xx_spi *mpc83xx_spi = context_data;
+        struct mpc8xxx_spi *mpc8xxx_spi = context_data;
         u32 event;
         irqreturn_t ret = IRQ_NONE;
 
         /* Get interrupt events(tx/rx) */
-        event = mpc83xx_spi_read_reg(&mpc83xx_spi->base->event);
+        event = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event);
 
         /* We need handle RX first */
         if (event & SPIE_NE) {
-                u32 rx_data = mpc83xx_spi_read_reg(&mpc83xx_spi->base->receive);
+                u32 rx_data = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->receive);
 
-                if (mpc83xx_spi->rx)
-                        mpc83xx_spi->get_rx(rx_data, mpc83xx_spi);
+                if (mpc8xxx_spi->rx)
+                        mpc8xxx_spi->get_rx(rx_data, mpc8xxx_spi);
 
                 ret = IRQ_HANDLED;
         }
@@ -495,56 +486,56 @@ static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data)
         if ((event & SPIE_NF) == 0)
                 /* spin until TX is done */
                 while (((event =
-                         mpc83xx_spi_read_reg(&mpc83xx_spi->base->event)) &
+                         mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event)) &
                                                 SPIE_NF) == 0)
-                         cpu_relax();
+                        cpu_relax();
 
-        mpc83xx_spi->count -= 1;
-        if (mpc83xx_spi->count) {
-                u32 word = mpc83xx_spi->get_tx(mpc83xx_spi);
-                mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word);
+        mpc8xxx_spi->count -= 1;
+        if (mpc8xxx_spi->count) {
+                u32 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
+                mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
         } else {
-                complete(&mpc83xx_spi->done);
+                complete(&mpc8xxx_spi->done);
         }
 
         /* Clear the events */
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, event);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, event);
 
         return ret;
 }
-static int mpc83xx_spi_transfer(struct spi_device *spi,
+static int mpc8xxx_spi_transfer(struct spi_device *spi,
                                 struct spi_message *m)
 {
-        struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master);
+        struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
         unsigned long flags;
 
         m->actual_length = 0;
         m->status = -EINPROGRESS;
 
-        spin_lock_irqsave(&mpc83xx_spi->lock, flags);
-        list_add_tail(&m->queue, &mpc83xx_spi->queue);
-        queue_work(mpc83xx_spi->workqueue, &mpc83xx_spi->work);
-        spin_unlock_irqrestore(&mpc83xx_spi->lock, flags);
+        spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
+        list_add_tail(&m->queue, &mpc8xxx_spi->queue);
+        queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
+        spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
 
         return 0;
 }
 
 
-static void mpc83xx_spi_cleanup(struct spi_device *spi)
+static void mpc8xxx_spi_cleanup(struct spi_device *spi)
 {
         kfree(spi->controller_state);
 }
 
 static struct spi_master * __devinit
-mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
+mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
 {
         struct fsl_spi_platform_data *pdata = dev->platform_data;
         struct spi_master *master;
-        struct mpc83xx_spi *mpc83xx_spi;
+        struct mpc8xxx_spi *mpc8xxx_spi;
         u32 regval;
         int ret = 0;
 
-        master = spi_alloc_master(dev, sizeof(struct mpc83xx_spi));
+        master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
         if (master == NULL) {
                 ret = -ENOMEM;
                 goto err;
@@ -556,36 +547,36 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
         master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
                         | SPI_LSB_FIRST | SPI_LOOP;
 
-        master->setup = mpc83xx_spi_setup;
-        master->transfer = mpc83xx_spi_transfer;
-        master->cleanup = mpc83xx_spi_cleanup;
-
-        mpc83xx_spi = spi_master_get_devdata(master);
-        mpc83xx_spi->qe_mode = pdata->qe_mode;
-        mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8;
-        mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
-        mpc83xx_spi->spibrg = pdata->sysclk;
-
-        mpc83xx_spi->rx_shift = 0;
-        mpc83xx_spi->tx_shift = 0;
-        if (mpc83xx_spi->qe_mode) {
-                mpc83xx_spi->rx_shift = 16;
-                mpc83xx_spi->tx_shift = 24;
+        master->setup = mpc8xxx_spi_setup;
+        master->transfer = mpc8xxx_spi_transfer;
+        master->cleanup = mpc8xxx_spi_cleanup;
+
+        mpc8xxx_spi = spi_master_get_devdata(master);
+        mpc8xxx_spi->qe_mode = pdata->qe_mode;
+        mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
+        mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
+        mpc8xxx_spi->spibrg = pdata->sysclk;
+
+        mpc8xxx_spi->rx_shift = 0;
+        mpc8xxx_spi->tx_shift = 0;
+        if (mpc8xxx_spi->qe_mode) {
+                mpc8xxx_spi->rx_shift = 16;
+                mpc8xxx_spi->tx_shift = 24;
         }
 
-        init_completion(&mpc83xx_spi->done);
+        init_completion(&mpc8xxx_spi->done);
 
-        mpc83xx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
-        if (mpc83xx_spi->base == NULL) {
+        mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
+        if (mpc8xxx_spi->base == NULL) {
                 ret = -ENOMEM;
                 goto put_master;
         }
 
-        mpc83xx_spi->irq = irq;
+        mpc8xxx_spi->irq = irq;
 
         /* Register for SPI Interrupt */
-        ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq,
-                          0, "mpc83xx_spi", mpc83xx_spi);
+        ret = request_irq(mpc8xxx_spi->irq, mpc8xxx_spi_irq,
+                          0, "mpc8xxx_spi", mpc8xxx_spi);
 
         if (ret != 0)
                 goto unmap_io;
@@ -594,25 +585,25 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
         master->num_chipselect = pdata->max_chipselect;
 
         /* SPI controller initializations */
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0);
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0);
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->command, 0);
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, 0xffffffff);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, 0);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->command, 0);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, 0xffffffff);
 
         /* Enable SPI interface */
         regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
         if (pdata->qe_mode)
                 regval |= SPMODE_OP;
 
-        mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval);
-        spin_lock_init(&mpc83xx_spi->lock);
-        init_completion(&mpc83xx_spi->done);
-        INIT_WORK(&mpc83xx_spi->work, mpc83xx_spi_work);
-        INIT_LIST_HEAD(&mpc83xx_spi->queue);
+        mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
+        spin_lock_init(&mpc8xxx_spi->lock);
+        init_completion(&mpc8xxx_spi->done);
+        INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
+        INIT_LIST_HEAD(&mpc8xxx_spi->queue);
 
-        mpc83xx_spi->workqueue = create_singlethread_workqueue(
+        mpc8xxx_spi->workqueue = create_singlethread_workqueue(
                 dev_name(master->dev.parent));
-        if (mpc83xx_spi->workqueue == NULL) {
+        if (mpc8xxx_spi->workqueue == NULL) {
                 ret = -EBUSY;
                 goto free_irq;
         }
@@ -622,57 +613,57 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
                 goto unreg_master;
 
         printk(KERN_INFO
-               "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n",
-               dev_name(dev), mpc83xx_spi->base, mpc83xx_spi->irq);
+               "%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
+               dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
 
         return master;
 
 unreg_master:
-        destroy_workqueue(mpc83xx_spi->workqueue);
+        destroy_workqueue(mpc8xxx_spi->workqueue);
 free_irq:
-        free_irq(mpc83xx_spi->irq, mpc83xx_spi);
+        free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
 unmap_io:
-        iounmap(mpc83xx_spi->base);
+        iounmap(mpc8xxx_spi->base);
 put_master:
         spi_master_put(master);
 err:
         return ERR_PTR(ret);
 }
 
-static int __devexit mpc83xx_spi_remove(struct device *dev)
+static int __devexit mpc8xxx_spi_remove(struct device *dev)
 {
-        struct mpc83xx_spi *mpc83xx_spi;
+        struct mpc8xxx_spi *mpc8xxx_spi;
         struct spi_master *master;
 
         master = dev_get_drvdata(dev);
-        mpc83xx_spi = spi_master_get_devdata(master);
+        mpc8xxx_spi = spi_master_get_devdata(master);
 
-        flush_workqueue(mpc83xx_spi->workqueue);
-        destroy_workqueue(mpc83xx_spi->workqueue);
+        flush_workqueue(mpc8xxx_spi->workqueue);
+        destroy_workqueue(mpc8xxx_spi->workqueue);
         spi_unregister_master(master);
 
-        free_irq(mpc83xx_spi->irq, mpc83xx_spi);
-        iounmap(mpc83xx_spi->base);
+        free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
+        iounmap(mpc8xxx_spi->base);
 
         return 0;
 }
 
-struct mpc83xx_spi_probe_info {
+struct mpc8xxx_spi_probe_info {
         struct fsl_spi_platform_data pdata;
         int *gpios;
         bool *alow_flags;
 };
 
-static struct mpc83xx_spi_probe_info *
+static struct mpc8xxx_spi_probe_info *
 to_of_pinfo(struct fsl_spi_platform_data *pdata)
 {
-        return container_of(pdata, struct mpc83xx_spi_probe_info, pdata);
+        return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
 }
 
-static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
+static void mpc8xxx_spi_cs_control(struct spi_device *spi, bool on)
 {
         struct device *dev = spi->dev.parent;
-        struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
+        struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
         u16 cs = spi->chip_select;
         int gpio = pinfo->gpios[cs];
         bool alow = pinfo->alow_flags[cs];
@@ -680,11 +671,11 @@ static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
         gpio_set_value(gpio, on ^ alow);
 }
 
-static int of_mpc83xx_spi_get_chipselects(struct device *dev)
+static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
 {
         struct device_node *np = dev_archdata_get_node(&dev->archdata);
         struct fsl_spi_platform_data *pdata = dev->platform_data;
-        struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata);
+        struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
         unsigned int ngpios;
         int i = 0;
         int ret;
@@ -740,7 +731,7 @@ static int of_mpc83xx_spi_get_chipselects(struct device *dev)
         }
 
         pdata->max_chipselect = ngpios;
-        pdata->cs_control = mpc83xx_spi_cs_control;
+        pdata->cs_control = mpc8xxx_spi_cs_control;
 
         return 0;
 
@@ -759,10 +750,10 @@ err_alloc_flags:
         return ret;
 }
 
-static int of_mpc83xx_spi_free_chipselects(struct device *dev)
+static int of_mpc8xxx_spi_free_chipselects(struct device *dev)
 {
         struct fsl_spi_platform_data *pdata = dev->platform_data;
-        struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata);
+        struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
         int i;
 
         if (!pinfo->gpios)
@@ -778,12 +769,12 @@ static int of_mpc83xx_spi_free_chipselects(struct device *dev)
         return 0;
 }
 
-static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
+static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
                                           const struct of_device_id *ofid)
 {
         struct device *dev = &ofdev->dev;
         struct device_node *np = ofdev->node;
-        struct mpc83xx_spi_probe_info *pinfo;
+        struct mpc8xxx_spi_probe_info *pinfo;
         struct fsl_spi_platform_data *pdata;
         struct spi_master *master;
         struct resource mem;
@@ -815,7 +806,7 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
         if (prop && !strcmp(prop, "cpu-qe"))
                 pdata->qe_mode = 1;
 
-        ret = of_mpc83xx_spi_get_chipselects(dev);
+        ret = of_mpc8xxx_spi_get_chipselects(dev);
         if (ret)
                 goto err;
 
@@ -829,7 +820,7 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
                 goto err;
         }
 
-        master = mpc83xx_spi_probe(dev, &mem, irq.start);
+        master = mpc8xxx_spi_probe(dev, &mem, irq.start);
         if (IS_ERR(master)) {
                 ret = PTR_ERR(master);
                 goto err;
@@ -840,34 +831,34 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
         return 0;
 
 err:
-        of_mpc83xx_spi_free_chipselects(dev);
+        of_mpc8xxx_spi_free_chipselects(dev);
 err_clk:
         kfree(pinfo);
         return ret;
 }
 
-static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev)
+static int __devexit of_mpc8xxx_spi_remove(struct of_device *ofdev)
 {
         int ret;
 
-        ret = mpc83xx_spi_remove(&ofdev->dev);
+        ret = mpc8xxx_spi_remove(&ofdev->dev);
         if (ret)
                 return ret;
-        of_mpc83xx_spi_free_chipselects(&ofdev->dev);
+        of_mpc8xxx_spi_free_chipselects(&ofdev->dev);
         return 0;
 }
 
-static const struct of_device_id of_mpc83xx_spi_match[] = {
+static const struct of_device_id of_mpc8xxx_spi_match[] = {
         { .compatible = "fsl,spi" },
         {},
 };
-MODULE_DEVICE_TABLE(of, of_mpc83xx_spi_match);
+MODULE_DEVICE_TABLE(of, of_mpc8xxx_spi_match);
 
-static struct of_platform_driver of_mpc83xx_spi_driver = {
-        .name           = "mpc83xx_spi",
-        .match_table    = of_mpc83xx_spi_match,
-        .probe          = of_mpc83xx_spi_probe,
-        .remove         = __devexit_p(of_mpc83xx_spi_remove),
+static struct of_platform_driver of_mpc8xxx_spi_driver = {
+        .name           = "mpc8xxx_spi",
+        .match_table    = of_mpc8xxx_spi_match,
+        .probe          = of_mpc8xxx_spi_probe,
+        .remove         = __devexit_p(of_mpc8xxx_spi_remove),
 };
 
 #ifdef CONFIG_MPC832x_RDB
@@ -878,7 +869,7 @@ static struct of_platform_driver of_mpc83xx_spi_driver = {
  * tree can work with OpenFirmware driver. But for now we support old trees
  * as well.
  */
-static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev)
+static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
 {
         struct resource *mem;
         unsigned int irq;
@@ -895,23 +886,23 @@ static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev)
         if (!irq)
                 return -EINVAL;
 
-        master = mpc83xx_spi_probe(&pdev->dev, mem, irq);
+        master = mpc8xxx_spi_probe(&pdev->dev, mem, irq);
         if (IS_ERR(master))
                 return PTR_ERR(master);
         return 0;
 }
 
-static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev)
+static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
 {
-        return mpc83xx_spi_remove(&pdev->dev);
+        return mpc8xxx_spi_remove(&pdev->dev);
 }
 
-MODULE_ALIAS("platform:mpc83xx_spi");
-static struct platform_driver mpc83xx_spi_driver = {
-        .probe = plat_mpc83xx_spi_probe,
-        .remove = __exit_p(plat_mpc83xx_spi_remove),
+MODULE_ALIAS("platform:mpc8xxx_spi");
+static struct platform_driver mpc8xxx_spi_driver = {
+        .probe = plat_mpc8xxx_spi_probe,
+        .remove = __exit_p(plat_mpc8xxx_spi_remove),
         .driver = {
-                .name = "mpc83xx_spi",
+                .name = "mpc8xxx_spi",
                 .owner = THIS_MODULE,
         },
 };
@@ -920,35 +911,35 @@ static bool legacy_driver_failed;
 
 static void __init legacy_driver_register(void)
 {
-        legacy_driver_failed = platform_driver_register(&mpc83xx_spi_driver);
+        legacy_driver_failed = platform_driver_register(&mpc8xxx_spi_driver);
 }
 
 static void __exit legacy_driver_unregister(void)
 {
         if (legacy_driver_failed)
                 return;
-        platform_driver_unregister(&mpc83xx_spi_driver);
+        platform_driver_unregister(&mpc8xxx_spi_driver);
 }
 #else
 static void __init legacy_driver_register(void) {}
 static void __exit legacy_driver_unregister(void) {}
 #endif /* CONFIG_MPC832x_RDB */
 
-static int __init mpc83xx_spi_init(void)
+static int __init mpc8xxx_spi_init(void)
 {
         legacy_driver_register();
-        return of_register_platform_driver(&of_mpc83xx_spi_driver);
+        return of_register_platform_driver(&of_mpc8xxx_spi_driver);
 }
 
-static void __exit mpc83xx_spi_exit(void)
+static void __exit mpc8xxx_spi_exit(void)
 {
-        of_unregister_platform_driver(&of_mpc83xx_spi_driver);
+        of_unregister_platform_driver(&of_mpc8xxx_spi_driver);
         legacy_driver_unregister();
 }
 
-module_init(mpc83xx_spi_init);
-module_exit(mpc83xx_spi_exit);
+module_init(mpc8xxx_spi_init);
+module_exit(mpc8xxx_spi_exit);
 
 MODULE_AUTHOR("Kumar Gala");
-MODULE_DESCRIPTION("Simple MPC83xx SPI Driver");
+MODULE_DESCRIPTION("Simple MPC8xxx SPI Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c
index eecd2a0680a2..93f7035d00a1 100644
--- a/drivers/usb/host/ehci-ps3.c
+++ b/drivers/usb/host/ehci-ps3.c
@@ -77,7 +77,7 @@ static const struct hc_driver ps3_ehci_hc_driver = {
         .port_handed_over       = ehci_port_handed_over,
 };
 
-static int ps3_ehci_probe(struct ps3_system_bus_device *dev)
+static int __devinit ps3_ehci_probe(struct ps3_system_bus_device *dev)
 {
         int result;
         struct usb_hcd *hcd;
@@ -225,7 +225,7 @@ static int ps3_ehci_remove(struct ps3_system_bus_device *dev)
         return 0;
 }
 
-static int ps3_ehci_driver_register(struct ps3_system_bus_driver *drv)
+static int __init ps3_ehci_driver_register(struct ps3_system_bus_driver *drv)
 {
         return firmware_has_feature(FW_FEATURE_PS3_LV1)
                 ? ps3_system_bus_driver_register(drv)
diff --git a/drivers/usb/host/ohci-ps3.c b/drivers/usb/host/ohci-ps3.c
index 1d56259c5db1..700950455f4d 100644
--- a/drivers/usb/host/ohci-ps3.c
+++ b/drivers/usb/host/ohci-ps3.c
@@ -75,7 +75,7 @@ static const struct hc_driver ps3_ohci_hc_driver = {
 #endif
 };
 
-static int ps3_ohci_probe(struct ps3_system_bus_device *dev)
+static int __devinit ps3_ohci_probe(struct ps3_system_bus_device *dev)
 {
         int result;
         struct usb_hcd *hcd;
@@ -224,7 +224,7 @@ static int ps3_ohci_remove(struct ps3_system_bus_device *dev)
         return 0;
 }
 
-static int ps3_ohci_driver_register(struct ps3_system_bus_driver *drv)
+static int __init ps3_ohci_driver_register(struct ps3_system_bus_driver *drv)
 {
         return firmware_has_feature(FW_FEATURE_PS3_LV1)
                 ? ps3_system_bus_driver_register(drv)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 932ffdbf86d9..d6d65ef85f54 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1122,12 +1122,14 @@ config FB_INTEL
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
-        select FB_BOOT_VESA_SUPPORT
+        select FB_BOOT_VESA_SUPPORT if FB_INTEL = y
         help
           This driver supports the on-board graphics built in to the Intel
           830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
           Say Y if you have and plan to use such a board.
 
+          To make FB_INTELFB=Y work you need to say AGP_INTEL=y too.
+
           To compile this driver as a module, choose M here: the
           module will be called intelfb.
 
@@ -1460,7 +1462,7 @@ config FB_SIS
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
-        select FB_BOOT_VESA_SUPPORT
+        select FB_BOOT_VESA_SUPPORT if FB_SIS = y
         help
           This is the frame buffer device driver for the SiS 300, 315, 330
           and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
index 7a868bd16e0e..ed7c8d0ddccb 100644
--- a/drivers/video/xilinxfb.c
+++ b/drivers/video/xilinxfb.c
@@ -124,7 +124,6 @@ struct xilinxfb_drvdata {
                                                 registers */
 
         dcr_host_t      dcr_host;
-        unsigned int    dcr_start;
         unsigned int    dcr_len;
 
         void            *fb_virt;       /* virt. address of the frame buffer */
@@ -325,8 +324,8 @@ static int xilinxfb_assign(struct device *dev,
                                         drvdata->regs);
         }
         /* Put a banner in the log (for DEBUG) */
-        dev_dbg(dev, "fb: phys=%p, virt=%p, size=%x\n",
-                (void *)drvdata->fb_phys, drvdata->fb_virt, fbsize);
+        dev_dbg(dev, "fb: phys=%llx, virt=%p, size=%x\n",
+                (unsigned long long)drvdata->fb_phys, drvdata->fb_virt, fbsize);
 
         return 0;       /* success */
 
@@ -404,9 +403,7 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
         u32 tft_access;
         struct xilinxfb_platform_data pdata;
         struct resource res;
-        int size, rc;
-        int start = 0, len = 0;
-        dcr_host_t dcr_host;
+        int size, rc, start;
         struct xilinxfb_drvdata *drvdata;
 
         /* Copy with the default pdata (not a ptr reference!) */
@@ -414,35 +411,39 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
 
         dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match);
 
+        /* Allocate the driver data region */
+        drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
+        if (!drvdata) {
+                dev_err(&op->dev, "Couldn't allocate device private record\n");
+                return -ENOMEM;
+        }
+
         /*
          * To check whether the core is connected directly to DCR or PLB
          * interface and initialize the tft_access accordingly.
          */
         p = (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave-if", NULL);
-
-        if (p)
-                tft_access = *p;
-        else
-                tft_access = 0;         /* For backward compatibility */
+        tft_access = p ? *p : 0;
 
         /*
          * Fill the resource structure if its direct PLB interface
          * otherwise fill the dcr_host structure.
          */
         if (tft_access) {
+                drvdata->flags |= PLB_ACCESS_FLAG;
                 rc = of_address_to_resource(op->node, 0, &res);
                 if (rc) {
                         dev_err(&op->dev, "invalid address\n");
-                        return -ENODEV;
+                        goto err;
                 }
-
         } else {
+                res.start = 0;
                 start = dcr_resource_start(op->node, 0);
-                len = dcr_resource_len(op->node, 0);
-                dcr_host = dcr_map(op->node, start, len);
-                if (!DCR_MAP_OK(dcr_host)) {
-                        dev_err(&op->dev, "invalid address\n");
-                        return -ENODEV;
+                drvdata->dcr_len = dcr_resource_len(op->node, 0);
+                drvdata->dcr_host = dcr_map(op->node, start, drvdata->dcr_len);
+                if (!DCR_MAP_OK(drvdata->dcr_host)) {
+                        dev_err(&op->dev, "invalid DCR address\n");
+                        goto err;
                 }
         }
 
@@ -467,26 +468,12 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
         if (of_find_property(op->node, "rotate-display", NULL))
                 pdata.rotate_screen = 1;
 
-        /* Allocate the driver data region */
-        drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
-        if (!drvdata) {
-                dev_err(&op->dev, "Couldn't allocate device private record\n");
-                return -ENOMEM;
-        }
         dev_set_drvdata(&op->dev, drvdata);
+        return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
 
-        if (tft_access)
-                drvdata->flags |= PLB_ACCESS_FLAG;
-
-        /* Arguments are passed based on the interface */
-        if (drvdata->flags & PLB_ACCESS_FLAG) {
-                return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
-        } else {
-                drvdata->dcr_start = start;
-                drvdata->dcr_len = len;
-                drvdata->dcr_host = dcr_host;
-                return xilinxfb_assign(&op->dev, drvdata, 0, &pdata);
-        }
+ err:
+        kfree(drvdata);
+        return -ENODEV;
 }
 
 static int __devexit xilinxfb_of_remove(struct of_device *op)
diff --git a/drivers/watchdog/mpc5200_wdt.c b/drivers/watchdog/mpc5200_wdt.c
index 465fe36adad4..fa9c47ce0ae7 100644
--- a/drivers/watchdog/mpc5200_wdt.c
+++ b/drivers/watchdog/mpc5200_wdt.c
@@ -188,7 +188,7 @@ static int mpc5200_wdt_probe(struct of_device *op,
         if (!wdt)
                 return -ENOMEM;
 
-        wdt->ipb_freq = mpc52xx_find_ipb_freq(op->node);
+        wdt->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
 
         err = of_address_to_resource(op->node, 0, &wdt->mem);
         if (err)
diff --git a/fs/ext3/resize.c b/fs/ext3/resize.c
index 8a0b26340b54..8359e7b3dc89 100644
--- a/fs/ext3/resize.c
+++ b/fs/ext3/resize.c
@@ -990,7 +990,7 @@ int ext3_group_extend(struct super_block *sb, struct ext3_super_block *es,
                         sb->s_id, n_blocks_count);
                 if (sizeof(sector_t) < 8)
                         ext3_warning(sb, __func__,
-                        "CONFIG_LBD not enabled\n");
+                        "CONFIG_LBDAF not enabled\n");
                 return -EINVAL;
         }
 
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index 26aa64dee6aa..601e881e6105 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -1812,7 +1812,7 @@ static int ext3_fill_super (struct super_block *sb, void *data, int silent)
                 printk(KERN_ERR "EXT3-fs: filesystem on %s:"
                         " too large to mount safely\n", sb->s_id);
                 if (sizeof(sector_t) < 8)
-                        printk(KERN_WARNING "EXT3-fs: CONFIG_LBD not "
+                        printk(KERN_WARNING "EXT3-fs: CONFIG_LBDAF not "
                                         "enabled\n");
                 goto failed_mount;
         }
diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c
index 27eb289eea37..68b0351fc647 100644
--- a/fs/ext4/resize.c
+++ b/fs/ext4/resize.c
@@ -1002,7 +1002,7 @@ int ext4_group_extend(struct super_block *sb, struct ext4_super_block *es,
                         " too large to resize to %llu blocks safely\n",
                         sb->s_id, n_blocks_count);
                 if (sizeof(sector_t) < 8)
-                        ext4_warning(sb, __func__, "CONFIG_LBD not enabled");
+                        ext4_warning(sb, __func__, "CONFIG_LBDAF not enabled");
                 return -EINVAL;
         }
 
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 23013d303f81..8bb9e2d3e4b8 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -1959,7 +1959,7 @@ static loff_t ext4_max_size(int blkbits, int has_huge_files)
         /* small i_blocks in vfs inode? */
         if (!has_huge_files || sizeof(blkcnt_t) < sizeof(u64)) {
                 /*
-                 * CONFIG_LBD is not enabled implies the inode
+                 * CONFIG_LBDAF is not enabled implies the inode
                  * i_block represent total blocks in 512 bytes
                  * 32 == size of vfs inode i_blocks * 8
                  */
@@ -2002,7 +2002,7 @@ static loff_t ext4_max_bitmap_size(int bits, int has_huge_files)
 
         if (!has_huge_files || sizeof(blkcnt_t) < sizeof(u64)) {
                 /*
-                 * !has_huge_files or CONFIG_LBD not enabled implies that
+                 * !has_huge_files or CONFIG_LBDAF not enabled implies that
                  * the inode i_block field represents total file blocks in
                  * 2^32 512-byte sectors == size of vfs inode i_blocks * 8
                  */
@@ -2440,13 +2440,13 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
         if (has_huge_files) {
                 /*
                  * Large file size enabled file system can only be
-                 * mount if kernel is build with CONFIG_LBD
+                 * mount if kernel is build with CONFIG_LBDAF
                  */
                 if (sizeof(root->i_blocks) < sizeof(u64) &&
                                 !(sb->s_flags & MS_RDONLY)) {
                         ext4_msg(sb, KERN_ERR, "Filesystem with huge "
                                         "files cannot be mounted read-write "
-                                        "without CONFIG_LBD");
+                                        "without CONFIG_LBDAF");
                         goto failed_mount;
                 }
         }
@@ -2570,7 +2570,7 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
                 ext4_msg(sb, KERN_ERR, "filesystem"
                         " too large to mount safely");
                 if (sizeof(sector_t) < 8)
-                        ext4_msg(sb, KERN_WARNING, "CONFIG_LBD not enabled");
+                        ext4_msg(sb, KERN_WARNING, "CONFIG_LBDAF not enabled");
                 goto failed_mount;
         }
 
diff --git a/fs/gfs2/Kconfig b/fs/gfs2/Kconfig
index cad957cdb1e5..5971359d2090 100644
--- a/fs/gfs2/Kconfig
+++ b/fs/gfs2/Kconfig
@@ -1,6 +1,6 @@
 config GFS2_FS
         tristate "GFS2 file system support"
-        depends on EXPERIMENTAL && (64BIT || LBD)
+        depends on EXPERIMENTAL && (64BIT || LBDAF)
         select DLM if GFS2_FS_LOCKING_DLM
         select CONFIGFS_FS if GFS2_FS_LOCKING_DLM
         select SYSFS if GFS2_FS_LOCKING_DLM
diff --git a/fs/ocfs2/super.c b/fs/ocfs2/super.c
index d33767f17ba3..0d3ed7407a04 100644
--- a/fs/ocfs2/super.c
+++ b/fs/ocfs2/super.c
@@ -552,7 +552,7 @@ static unsigned long long ocfs2_max_file_offset(unsigned int bbits,
          */
 
 #if BITS_PER_LONG == 32
-# if defined(CONFIG_LBD)
+# if defined(CONFIG_LBDAF)
         BUILD_BUG_ON(sizeof(sector_t) != 8);
         /*
          * We might be limited by page cache size.
diff --git a/fs/xfs/linux-2.6/xfs_linux.h b/fs/xfs/linux-2.6/xfs_linux.h
index f65a53f8752f..6127e24062d0 100644
--- a/fs/xfs/linux-2.6/xfs_linux.h
+++ b/fs/xfs/linux-2.6/xfs_linux.h
@@ -24,7 +24,7 @@
  * XFS_BIG_BLKNOS needs block layer disk addresses to be 64 bits.
  * XFS_BIG_INUMS requires XFS_BIG_BLKNOS to be set.
  */
-#if defined(CONFIG_LBD) || (BITS_PER_LONG == 64)
+#if defined(CONFIG_LBDAF) || (BITS_PER_LONG == 64)
 # define XFS_BIG_BLKNOS 1
 # define XFS_BIG_INUMS  1
 #else
diff --git a/fs/xfs/linux-2.6/xfs_super.c b/fs/xfs/linux-2.6/xfs_super.c
index 2e09efbca8db..a220d36f789b 100644
--- a/fs/xfs/linux-2.6/xfs_super.c
+++ b/fs/xfs/linux-2.6/xfs_super.c
@@ -616,7 +616,7 @@ xfs_max_file_offset(
          */
 
 #if BITS_PER_LONG == 32
-# if defined(CONFIG_LBD)
+# if defined(CONFIG_LBDAF)
         ASSERT(sizeof(sector_t) == 8);
         pagefactor = PAGE_CACHE_SIZE;
         bitshift = BITS_PER_LONG;
diff --git a/include/linux/amba/pl061.h b/include/linux/amba/pl061.h
new file mode 100644
index 000000000000..b4fbd9862606
--- /dev/null
+++ b/include/linux/amba/pl061.h
@@ -0,0 +1,15 @@
+/* platform data for the PL061 GPIO driver */
+
+struct pl061_platform_data {
+        /* number of the first GPIO */
+        unsigned        gpio_base;
+
+        /* number of the first IRQ.
+         * If the IRQ functionality in not desired this must be set to
+         * (unsigned) -1.
+         */
+        unsigned        irq_base;
+
+        u8              directions;     /* startup directions, 1: out, 0: in */
+        u8              values;         /* startup values */
+};
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 8083b6a36a38..07dfd460d286 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -63,24 +63,26 @@ struct dma_map_ops {
 
 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
 
+typedef u64 DMA_nnBIT_MASK __deprecated;
+
 /*
  * NOTE: do not use the below macros in new code and do not add new definitions
  * here.
  *
  * Instead, just open-code DMA_BIT_MASK(n) within your driver
  */
-#define DMA_64BIT_MASK  DMA_BIT_MASK(64)
-#define DMA_48BIT_MASK  DMA_BIT_MASK(48)
-#define DMA_47BIT_MASK  DMA_BIT_MASK(47)
-#define DMA_40BIT_MASK  DMA_BIT_MASK(40)
-#define DMA_39BIT_MASK  DMA_BIT_MASK(39)
-#define DMA_35BIT_MASK  DMA_BIT_MASK(35)
-#define DMA_32BIT_MASK  DMA_BIT_MASK(32)
-#define DMA_31BIT_MASK  DMA_BIT_MASK(31)
-#define DMA_30BIT_MASK  DMA_BIT_MASK(30)
-#define DMA_29BIT_MASK  DMA_BIT_MASK(29)
-#define DMA_28BIT_MASK  DMA_BIT_MASK(28)
-#define DMA_24BIT_MASK  DMA_BIT_MASK(24)
+#define DMA_64BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
+#define DMA_48BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
+#define DMA_47BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
+#define DMA_40BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
+#define DMA_39BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
+#define DMA_35BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
+#define DMA_32BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
+#define DMA_31BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
+#define DMA_30BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
+#define DMA_29BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
+#define DMA_28BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
+#define DMA_24BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
 
 #define DMA_MASK_NONE   0x0ULL
 
@@ -107,9 +109,20 @@ static inline int is_buffer_dma_capable(u64 mask, dma_addr_t addr, size_t size)
 #include <asm-generic/dma-mapping-broken.h>
 #endif
 
-/* Backwards compat, remove in 2.7.x */
-#define dma_sync_single         dma_sync_single_for_cpu
-#define dma_sync_sg             dma_sync_sg_for_cpu
+/* for backwards compatibility, removed soon */
+static inline void __deprecated dma_sync_single(struct device *dev,
+                                                dma_addr_t addr, size_t size,
+                                                enum dma_data_direction dir)
+{
+        dma_sync_single_for_cpu(dev, addr, size, dir);
+}
+
+static inline void __deprecated dma_sync_sg(struct device *dev,
+                                            struct scatterlist *sg, int nelems,
+                                            enum dma_data_direction dir)
+{
+        dma_sync_sg_for_cpu(dev, sg, nelems, dir);
+}
 
 static inline u64 dma_get_mask(struct device *dev)
 {
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index c5a71c38a95f..fac104e7186a 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -58,7 +58,7 @@ extern const char linux_proc_banner[];
 #define _RET_IP_                (unsigned long)__builtin_return_address(0)
 #define _THIS_IP_  ({ __label__ __here; __here: (unsigned long)&&__here; })
 
-#ifdef CONFIG_LBD
+#ifdef CONFIG_LBDAF
 # include <asm/div64.h>
 # define sector_div(a, b) do_div(a, b)
 #else
diff --git a/include/linux/types.h b/include/linux/types.h
index 5abe354020f9..c42724f8c802 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -131,7 +131,7 @@ typedef		__s64		int64_t;
  *
  * blkcnt_t is the type of the inode's block count.
  */
-#ifdef CONFIG_LBD
+#ifdef CONFIG_LBDAF
 typedef u64 sector_t;
 typedef u64 blkcnt_t;
 #else
diff --git a/kernel/exit.c b/kernel/exit.c
index 13ae64001fec..628d41f0dd54 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -1197,8 +1197,11 @@ static int wait_task_zombie(struct wait_opts *wo, struct task_struct *p)
         }
 
         traced = ptrace_reparented(p);
-
-        if (likely(!traced)) {
+        /*
+         * It can be ptraced but not reparented, check
+         * !task_detached() to filter out sub-threads.
+         */
+        if (likely(!traced) && likely(!task_detached(p))) {
                 struct signal_struct *psig;
                 struct signal_struct *sig;
 
diff --git a/mm/bootmem.c b/mm/bootmem.c
index 282df0a09e6f..d2a9ce952768 100644
--- a/mm/bootmem.c
+++ b/mm/bootmem.c
@@ -536,11 +536,15 @@ static void * __init alloc_arch_preferred_bootmem(bootmem_data_t *bdata,
                 return kzalloc(size, GFP_NOWAIT);
 
 #ifdef CONFIG_HAVE_ARCH_BOOTMEM
-        bootmem_data_t *p_bdata;
-
-        p_bdata = bootmem_arch_preferred_node(bdata, size, align, goal, limit);
-        if (p_bdata)
-                return alloc_bootmem_core(p_bdata, size, align, goal, limit);
+        {
+                bootmem_data_t *p_bdata;
+
+                p_bdata = bootmem_arch_preferred_node(bdata, size, align,
+                                                        goal, limit);
+                if (p_bdata)
+                        return alloc_bootmem_core(p_bdata, size, align,
+                                                        goal, limit);
+        }
 #endif
         return NULL;
 }
diff --git a/sound/pci/lx6464es/lx6464es.c b/sound/pci/lx6464es/lx6464es.c
index ccf1b38c88ea..18da2ef04d09 100644
--- a/sound/pci/lx6464es/lx6464es.c
+++ b/sound/pci/lx6464es/lx6464es.c
@@ -988,7 +988,7 @@ static int __devinit snd_lx6464es_create(struct snd_card *card,
         pci_set_master(pci);
 
         /* check if we can restrict PCI DMA transfers to 32 bits */
-        err = pci_set_dma_mask(pci, DMA_32BIT_MASK);
+        err = pci_set_dma_mask(pci, DMA_BIT_MASK(32));
         if (err < 0) {
                 snd_printk(KERN_ERR "architecture does not support "
                            "32bit PCI busmaster DMA\n");