2 files changed, 79 insertions, 77 deletions
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 1621ad07d284..33339745d432 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1667,8 +1667,10 @@ void __init u300_init_irq(void)
        for (i = 0; i < U300_VIC_IRQS_END; i++)
                set_bit(i, (unsigned long *) &mask[0]);
-        vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
+        vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
-        vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
+                 mask[0], mask[0]);
+        vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
+                 mask[1], mask[1]);
 }
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index ee78a26707eb..ec09c1e07b1a 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,101 +12,101 @@
 #ifndef __MACH_IRQS_H
 #define __MACH_IRQS_H
-#define IRQ_U300_INTCON0_START          0
+#define IRQ_U300_INTCON0_START          1
-#define IRQ_U300_INTCON1_START          32
+#define IRQ_U300_INTCON1_START          33
 /* These are on INTCON0 - 30 lines */
-#define IRQ_U300_IRQ0_EXT               0
+#define IRQ_U300_IRQ0_EXT               1
-#define IRQ_U300_IRQ1_EXT               1
+#define IRQ_U300_IRQ1_EXT               2
-#define IRQ_U300_DMA                    2
+#define IRQ_U300_DMA                    3
-#define IRQ_U300_VIDEO_ENC_0            3
+#define IRQ_U300_VIDEO_ENC_0            4
-#define IRQ_U300_VIDEO_ENC_1            4
+#define IRQ_U300_VIDEO_ENC_1            5
-#define IRQ_U300_AAIF_RX                5
+#define IRQ_U300_AAIF_RX                6
-#define IRQ_U300_AAIF_TX                6
+#define IRQ_U300_AAIF_TX                7
-#define IRQ_U300_AAIF_VGPIO             7
+#define IRQ_U300_AAIF_VGPIO             8
-#define IRQ_U300_AAIF_WAKEUP            8
+#define IRQ_U300_AAIF_WAKEUP            9
-#define IRQ_U300_PCM_I2S0_FRAME         9
+#define IRQ_U300_PCM_I2S0_FRAME         10
-#define IRQ_U300_PCM_I2S0_FIFO          10
+#define IRQ_U300_PCM_I2S0_FIFO          11
-#define IRQ_U300_PCM_I2S1_FRAME         11
+#define IRQ_U300_PCM_I2S1_FRAME         12
-#define IRQ_U300_PCM_I2S1_FIFO          12
+#define IRQ_U300_PCM_I2S1_FIFO          13
-#define IRQ_U300_XGAM_GAMCON            13
+#define IRQ_U300_XGAM_GAMCON            14
-#define IRQ_U300_XGAM_CDI               14
+#define IRQ_U300_XGAM_CDI               15
-#define IRQ_U300_XGAM_CDICON            15
+#define IRQ_U300_XGAM_CDICON            16
 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
 /* MMIACC not used on the DB3210 or DB3350 chips */
-#define IRQ_U300_XGAM_MMIACC            16
+#define IRQ_U300_XGAM_MMIACC            17
 #endif
-#define IRQ_U300_XGAM_PDI               17
+#define IRQ_U300_XGAM_PDI               18
-#define IRQ_U300_XGAM_PDICON            18
+#define IRQ_U300_XGAM_PDICON            19
-#define IRQ_U300_XGAM_GAMEACC           19
+#define IRQ_U300_XGAM_GAMEACC           20
-#define IRQ_U300_XGAM_MCIDCT            20
+#define IRQ_U300_XGAM_MCIDCT            21
-#define IRQ_U300_APEX                   21
+#define IRQ_U300_APEX                   22
-#define IRQ_U300_UART0                  22
+#define IRQ_U300_UART0                  23
-#define IRQ_U300_SPI                    23
+#define IRQ_U300_SPI                    24
-#define IRQ_U300_TIMER_APP_OS           24
+#define IRQ_U300_TIMER_APP_OS           25
-#define IRQ_U300_TIMER_APP_DD           25
+#define IRQ_U300_TIMER_APP_DD           26
-#define IRQ_U300_TIMER_APP_GP1          26
+#define IRQ_U300_TIMER_APP_GP1          27
-#define IRQ_U300_TIMER_APP_GP2          27
+#define IRQ_U300_TIMER_APP_GP2          28
-#define IRQ_U300_TIMER_OS               28
+#define IRQ_U300_TIMER_OS               29
-#define IRQ_U300_TIMER_MS               29
+#define IRQ_U300_TIMER_MS               30
-#define IRQ_U300_KEYPAD_KEYBF           30
+#define IRQ_U300_KEYPAD_KEYBF           31
-#define IRQ_U300_KEYPAD_KEYBR           31
+#define IRQ_U300_KEYPAD_KEYBR           32
 /* These are on INTCON1 - 32 lines */
-#define IRQ_U300_GPIO_PORT0             32
+#define IRQ_U300_GPIO_PORT0             33
-#define IRQ_U300_GPIO_PORT1             33
+#define IRQ_U300_GPIO_PORT1             34
-#define IRQ_U300_GPIO_PORT2             34
+#define IRQ_U300_GPIO_PORT2             35
 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
    defined(CONFIG_MACH_U300_BS335)
 /* These are for DB3150, DB3200 and DB3350 */
-#define IRQ_U300_WDOG                   35
+#define IRQ_U300_WDOG                   36
-#define IRQ_U300_EVHIST                 36
+#define IRQ_U300_EVHIST                 37
-#define IRQ_U300_MSPRO                  37
+#define IRQ_U300_MSPRO                  38
-#define IRQ_U300_MMCSD_MCIINTR0         38
+#define IRQ_U300_MMCSD_MCIINTR0         39
-#define IRQ_U300_MMCSD_MCIINTR1         39
+#define IRQ_U300_MMCSD_MCIINTR1         40
-#define IRQ_U300_I2C0                   40
+#define IRQ_U300_I2C0                   41
-#define IRQ_U300_I2C1                   41
+#define IRQ_U300_I2C1                   42
-#define IRQ_U300_RTC                    42
+#define IRQ_U300_RTC                    43
-#define IRQ_U300_NFIF                   43
+#define IRQ_U300_NFIF                   44
-#define IRQ_U300_NFIF2                  44
+#define IRQ_U300_NFIF2                  45
 #endif
 /* DB3150 and DB3200 have only 45 IRQs */
 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
-#define U300_VIC_IRQS_END               45
+#define U300_VIC_IRQS_END               46
 #endif
 /* The DB3350-specific interrupt lines */
 #ifdef CONFIG_MACH_U300_BS335
-#define IRQ_U300_ISP_F0                 45
+#define IRQ_U300_ISP_F0                 46
-#define IRQ_U300_ISP_F1                 46
+#define IRQ_U300_ISP_F1                 47
-#define IRQ_U300_ISP_F2                 47
+#define IRQ_U300_ISP_F2                 48
-#define IRQ_U300_ISP_F3                 48
+#define IRQ_U300_ISP_F3                 49
-#define IRQ_U300_ISP_F4                 49
+#define IRQ_U300_ISP_F4                 50
-#define IRQ_U300_GPIO_PORT3             50
+#define IRQ_U300_GPIO_PORT3             51
-#define IRQ_U300_SYSCON_PLL_LOCK        51
+#define IRQ_U300_SYSCON_PLL_LOCK        52
-#define IRQ_U300_UART1                  52
+#define IRQ_U300_UART1                  53
-#define IRQ_U300_GPIO_PORT4             53
+#define IRQ_U300_GPIO_PORT4             54
-#define IRQ_U300_GPIO_PORT5             54
+#define IRQ_U300_GPIO_PORT5             55
-#define IRQ_U300_GPIO_PORT6             55
+#define IRQ_U300_GPIO_PORT6             56
-#define U300_VIC_IRQS_END               56
+#define U300_VIC_IRQS_END               57
 #endif
 /* The DB3210-specific interrupt lines */
 #ifdef CONFIG_MACH_U300_BS365
-#define IRQ_U300_GPIO_PORT3             35
+#define IRQ_U300_GPIO_PORT3             36
-#define IRQ_U300_GPIO_PORT4             36
+#define IRQ_U300_GPIO_PORT4             37
-#define IRQ_U300_WDOG                   37
+#define IRQ_U300_WDOG                   38
-#define IRQ_U300_EVHIST                 38
+#define IRQ_U300_EVHIST                 39
-#define IRQ_U300_MSPRO                  39
+#define IRQ_U300_MSPRO                  40
-#define IRQ_U300_MMCSD_MCIINTR0         40
+#define IRQ_U300_MMCSD_MCIINTR0         41
-#define IRQ_U300_MMCSD_MCIINTR1         41
+#define IRQ_U300_MMCSD_MCIINTR1         42
-#define IRQ_U300_I2C0                   42
+#define IRQ_U300_I2C0                   43
-#define IRQ_U300_I2C1                   43
+#define IRQ_U300_I2C1                   44
-#define IRQ_U300_RTC                    44
+#define IRQ_U300_RTC                    45
-#define IRQ_U300_NFIF                   45
+#define IRQ_U300_NFIF                   46
-#define IRQ_U300_NFIF2                  46
+#define IRQ_U300_NFIF2                  47
-#define IRQ_U300_SYSCON_PLL_LOCK        47
+#define IRQ_U300_SYSCON_PLL_LOCK        48
-#define U300_VIC_IRQS_END               48
+#define U300_VIC_IRQS_END               49
 #endif
 /* Maximum 8*7 GPIO lines */
@@ -117,6 +117,6 @@
 #define IRQ_U300_GPIO_END               (U300_VIC_IRQS_END)
 #endif
-#define NR_IRQS                         (IRQ_U300_GPIO_END)
+#define NR_IRQS                         (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
 #endif

diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 1621ad07d284..33339745d432 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c
@@ -1667,8 +1667,10 @@ void __init u300_init_irq(void)
1667		1667
1668	for (i = 0; i < U300_VIC_IRQS_END; i++)	1668	for (i = 0; i < U300_VIC_IRQS_END; i++)
1669	set_bit(i, (unsigned long *) &mask[0]);	1669	set_bit(i, (unsigned long *) &mask[0]);
1670	vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);	1670	vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
1671	vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);	1671	mask[0], mask[0]);
		1672	vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
		1673	mask[1], mask[1]);
1672	}	1674	}
1673		1675
1674		1676


diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index ee78a26707eb..ec09c1e07b1a 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,101 +12,101 @@
12	#ifndef __MACH_IRQS_H	12	#ifndef __MACH_IRQS_H
13	#define __MACH_IRQS_H	13	#define __MACH_IRQS_H
14		14
15	#define IRQ_U300_INTCON0_START 0	15	#define IRQ_U300_INTCON0_START 1
16	#define IRQ_U300_INTCON1_START 32	16	#define IRQ_U300_INTCON1_START 33
17	/* These are on INTCON0 - 30 lines */	17	/* These are on INTCON0 - 30 lines */
18	#define IRQ_U300_IRQ0_EXT 0	18	#define IRQ_U300_IRQ0_EXT 1
19	#define IRQ_U300_IRQ1_EXT 1	19	#define IRQ_U300_IRQ1_EXT 2
20	#define IRQ_U300_DMA 2	20	#define IRQ_U300_DMA 3
21	#define IRQ_U300_VIDEO_ENC_0 3	21	#define IRQ_U300_VIDEO_ENC_0 4
22	#define IRQ_U300_VIDEO_ENC_1 4	22	#define IRQ_U300_VIDEO_ENC_1 5
23	#define IRQ_U300_AAIF_RX 5	23	#define IRQ_U300_AAIF_RX 6
24	#define IRQ_U300_AAIF_TX 6	24	#define IRQ_U300_AAIF_TX 7
25	#define IRQ_U300_AAIF_VGPIO 7	25	#define IRQ_U300_AAIF_VGPIO 8
26	#define IRQ_U300_AAIF_WAKEUP 8	26	#define IRQ_U300_AAIF_WAKEUP 9
27	#define IRQ_U300_PCM_I2S0_FRAME 9	27	#define IRQ_U300_PCM_I2S0_FRAME 10
28	#define IRQ_U300_PCM_I2S0_FIFO 10	28	#define IRQ_U300_PCM_I2S0_FIFO 11
29	#define IRQ_U300_PCM_I2S1_FRAME 11	29	#define IRQ_U300_PCM_I2S1_FRAME 12
30	#define IRQ_U300_PCM_I2S1_FIFO 12	30	#define IRQ_U300_PCM_I2S1_FIFO 13
31	#define IRQ_U300_XGAM_GAMCON 13	31	#define IRQ_U300_XGAM_GAMCON 14
32	#define IRQ_U300_XGAM_CDI 14	32	#define IRQ_U300_XGAM_CDI 15
33	#define IRQ_U300_XGAM_CDICON 15	33	#define IRQ_U300_XGAM_CDICON 16
34	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330)	34	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330)
35	/* MMIACC not used on the DB3210 or DB3350 chips */	35	/* MMIACC not used on the DB3210 or DB3350 chips */
36	#define IRQ_U300_XGAM_MMIACC 16	36	#define IRQ_U300_XGAM_MMIACC 17
37	#endif	37	#endif
38	#define IRQ_U300_XGAM_PDI 17	38	#define IRQ_U300_XGAM_PDI 18
39	#define IRQ_U300_XGAM_PDICON 18	39	#define IRQ_U300_XGAM_PDICON 19
40	#define IRQ_U300_XGAM_GAMEACC 19	40	#define IRQ_U300_XGAM_GAMEACC 20
41	#define IRQ_U300_XGAM_MCIDCT 20	41	#define IRQ_U300_XGAM_MCIDCT 21
42	#define IRQ_U300_APEX 21	42	#define IRQ_U300_APEX 22
43	#define IRQ_U300_UART0 22	43	#define IRQ_U300_UART0 23
44	#define IRQ_U300_SPI 23	44	#define IRQ_U300_SPI 24
45	#define IRQ_U300_TIMER_APP_OS 24	45	#define IRQ_U300_TIMER_APP_OS 25
46	#define IRQ_U300_TIMER_APP_DD 25	46	#define IRQ_U300_TIMER_APP_DD 26
47	#define IRQ_U300_TIMER_APP_GP1 26	47	#define IRQ_U300_TIMER_APP_GP1 27
48	#define IRQ_U300_TIMER_APP_GP2 27	48	#define IRQ_U300_TIMER_APP_GP2 28
49	#define IRQ_U300_TIMER_OS 28	49	#define IRQ_U300_TIMER_OS 29
50	#define IRQ_U300_TIMER_MS 29	50	#define IRQ_U300_TIMER_MS 30
51	#define IRQ_U300_KEYPAD_KEYBF 30	51	#define IRQ_U300_KEYPAD_KEYBF 31
52	#define IRQ_U300_KEYPAD_KEYBR 31	52	#define IRQ_U300_KEYPAD_KEYBR 32
53	/* These are on INTCON1 - 32 lines */	53	/* These are on INTCON1 - 32 lines */
54	#define IRQ_U300_GPIO_PORT0 32	54	#define IRQ_U300_GPIO_PORT0 33
55	#define IRQ_U300_GPIO_PORT1 33	55	#define IRQ_U300_GPIO_PORT1 34
56	#define IRQ_U300_GPIO_PORT2 34	56	#define IRQ_U300_GPIO_PORT2 35
57		57
58	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330) \|\| \	58	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330) \|\| \
59	defined(CONFIG_MACH_U300_BS335)	59	defined(CONFIG_MACH_U300_BS335)
60	/* These are for DB3150, DB3200 and DB3350 */	60	/* These are for DB3150, DB3200 and DB3350 */
61	#define IRQ_U300_WDOG 35	61	#define IRQ_U300_WDOG 36
62	#define IRQ_U300_EVHIST 36	62	#define IRQ_U300_EVHIST 37
63	#define IRQ_U300_MSPRO 37	63	#define IRQ_U300_MSPRO 38
64	#define IRQ_U300_MMCSD_MCIINTR0 38	64	#define IRQ_U300_MMCSD_MCIINTR0 39
65	#define IRQ_U300_MMCSD_MCIINTR1 39	65	#define IRQ_U300_MMCSD_MCIINTR1 40
66	#define IRQ_U300_I2C0 40	66	#define IRQ_U300_I2C0 41
67	#define IRQ_U300_I2C1 41	67	#define IRQ_U300_I2C1 42
68	#define IRQ_U300_RTC 42	68	#define IRQ_U300_RTC 43
69	#define IRQ_U300_NFIF 43	69	#define IRQ_U300_NFIF 44
70	#define IRQ_U300_NFIF2 44	70	#define IRQ_U300_NFIF2 45
71	#endif	71	#endif
72		72
73	/* DB3150 and DB3200 have only 45 IRQs */	73	/* DB3150 and DB3200 have only 45 IRQs */
74	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330)	74	#if defined(CONFIG_MACH_U300_BS2X) \|\| defined(CONFIG_MACH_U300_BS330)
75	#define U300_VIC_IRQS_END 45	75	#define U300_VIC_IRQS_END 46
76	#endif	76	#endif
77		77
78	/* The DB3350-specific interrupt lines */	78	/* The DB3350-specific interrupt lines */
79	#ifdef CONFIG_MACH_U300_BS335	79	#ifdef CONFIG_MACH_U300_BS335
80	#define IRQ_U300_ISP_F0 45	80	#define IRQ_U300_ISP_F0 46
81	#define IRQ_U300_ISP_F1 46	81	#define IRQ_U300_ISP_F1 47
82	#define IRQ_U300_ISP_F2 47	82	#define IRQ_U300_ISP_F2 48
83	#define IRQ_U300_ISP_F3 48	83	#define IRQ_U300_ISP_F3 49
84	#define IRQ_U300_ISP_F4 49	84	#define IRQ_U300_ISP_F4 50
85	#define IRQ_U300_GPIO_PORT3 50	85	#define IRQ_U300_GPIO_PORT3 51
86	#define IRQ_U300_SYSCON_PLL_LOCK 51	86	#define IRQ_U300_SYSCON_PLL_LOCK 52
87	#define IRQ_U300_UART1 52	87	#define IRQ_U300_UART1 53
88	#define IRQ_U300_GPIO_PORT4 53	88	#define IRQ_U300_GPIO_PORT4 54
89	#define IRQ_U300_GPIO_PORT5 54	89	#define IRQ_U300_GPIO_PORT5 55
90	#define IRQ_U300_GPIO_PORT6 55	90	#define IRQ_U300_GPIO_PORT6 56
91	#define U300_VIC_IRQS_END 56	91	#define U300_VIC_IRQS_END 57
92	#endif	92	#endif
93		93
94	/* The DB3210-specific interrupt lines */	94	/* The DB3210-specific interrupt lines */
95	#ifdef CONFIG_MACH_U300_BS365	95	#ifdef CONFIG_MACH_U300_BS365
96	#define IRQ_U300_GPIO_PORT3 35	96	#define IRQ_U300_GPIO_PORT3 36
97	#define IRQ_U300_GPIO_PORT4 36	97	#define IRQ_U300_GPIO_PORT4 37
98	#define IRQ_U300_WDOG 37	98	#define IRQ_U300_WDOG 38
99	#define IRQ_U300_EVHIST 38	99	#define IRQ_U300_EVHIST 39
100	#define IRQ_U300_MSPRO 39	100	#define IRQ_U300_MSPRO 40
101	#define IRQ_U300_MMCSD_MCIINTR0 40	101	#define IRQ_U300_MMCSD_MCIINTR0 41
102	#define IRQ_U300_MMCSD_MCIINTR1 41	102	#define IRQ_U300_MMCSD_MCIINTR1 42
103	#define IRQ_U300_I2C0 42	103	#define IRQ_U300_I2C0 43
104	#define IRQ_U300_I2C1 43	104	#define IRQ_U300_I2C1 44
105	#define IRQ_U300_RTC 44	105	#define IRQ_U300_RTC 45
106	#define IRQ_U300_NFIF 45	106	#define IRQ_U300_NFIF 46
107	#define IRQ_U300_NFIF2 46	107	#define IRQ_U300_NFIF2 47
108	#define IRQ_U300_SYSCON_PLL_LOCK 47	108	#define IRQ_U300_SYSCON_PLL_LOCK 48
109	#define U300_VIC_IRQS_END 48	109	#define U300_VIC_IRQS_END 49
110	#endif	110	#endif
111		111
112	/* Maximum 87 GPIO lines /	112	/* Maximum 87 GPIO lines /
@@ -117,6 +117,6 @@
117	#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)	117	#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
118	#endif	118	#endif
119		119
120	#define NR_IRQS (IRQ_U300_GPIO_END)	120	#define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
121		121
122	#endif	122	#endif