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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/dma.txt34
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/esdhc.txt24
-rw-r--r--arch/powerpc/Kconfig19
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts364
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts38
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts9
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc310_defconfig1613
-rw-r--r--arch/powerpc/include/asm/reg_booke.h1
-rw-r--r--arch/powerpc/kernel/Makefile1
-rw-r--r--arch/powerpc/kernel/cpu_setup_fsl_booke.S31
-rw-r--r--arch/powerpc/kernel/cputable.c8
-rw-r--r--arch/powerpc/kernel/head_booke.h6
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S81
-rw-r--r--arch/powerpc/mm/fsl_booke_mmu.c93
-rw-r--r--arch/powerpc/platforms/83xx/mpc831x_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c10
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_rdb.c2
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig10
-rw-r--r--arch/powerpc/platforms/86xx/Makefile1
-rw-r--r--arch/powerpc/platforms/86xx/gef_gpio.c36
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc310.c230
-rw-r--r--arch/powerpc/sysdev/cpm2.c3
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c244
-rw-r--r--drivers/watchdog/Kconfig2
-rw-r--r--include/linux/pci_ids.h8
36 files changed, 3171 insertions, 149 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index cc453110fc46..0732cdd05ba1 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -35,30 +35,30 @@ Example:
35 #address-cells = <1>; 35 #address-cells = <1>;
36 #size-cells = <1>; 36 #size-cells = <1>;
37 compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; 37 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
38 reg = <82a8 4>; 38 reg = <0x82a8 4>;
39 ranges = <0 8100 1a4>; 39 ranges = <0 0x8100 0x1a4>;
40 interrupt-parent = <&ipic>; 40 interrupt-parent = <&ipic>;
41 interrupts = <47 8>; 41 interrupts = <71 8>;
42 cell-index = <0>; 42 cell-index = <0>;
43 dma-channel@0 { 43 dma-channel@0 {
44 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 44 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 cell-index = <0>; 45 cell-index = <0>;
46 reg = <0 80>; 46 reg = <0 0x80>;
47 }; 47 };
48 dma-channel@80 { 48 dma-channel@80 {
49 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 49 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
50 cell-index = <1>; 50 cell-index = <1>;
51 reg = <80 80>; 51 reg = <0x80 0x80>;
52 }; 52 };
53 dma-channel@100 { 53 dma-channel@100 {
54 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 54 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
55 cell-index = <2>; 55 cell-index = <2>;
56 reg = <100 80>; 56 reg = <0x100 0x80>;
57 }; 57 };
58 dma-channel@180 { 58 dma-channel@180 {
59 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 59 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
60 cell-index = <3>; 60 cell-index = <3>;
61 reg = <180 80>; 61 reg = <0x180 0x80>;
62 }; 62 };
63 }; 63 };
64 64
@@ -93,36 +93,36 @@ Example:
93 #address-cells = <1>; 93 #address-cells = <1>;
94 #size-cells = <1>; 94 #size-cells = <1>;
95 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; 95 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
96 reg = <21300 4>; 96 reg = <0x21300 4>;
97 ranges = <0 21100 200>; 97 ranges = <0 0x21100 0x200>;
98 cell-index = <0>; 98 cell-index = <0>;
99 dma-channel@0 { 99 dma-channel@0 {
100 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 100 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
101 reg = <0 80>; 101 reg = <0 0x80>;
102 cell-index = <0>; 102 cell-index = <0>;
103 interrupt-parent = <&mpic>; 103 interrupt-parent = <&mpic>;
104 interrupts = <14 2>; 104 interrupts = <20 2>;
105 }; 105 };
106 dma-channel@80 { 106 dma-channel@80 {
107 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 107 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
108 reg = <80 80>; 108 reg = <0x80 0x80>;
109 cell-index = <1>; 109 cell-index = <1>;
110 interrupt-parent = <&mpic>; 110 interrupt-parent = <&mpic>;
111 interrupts = <15 2>; 111 interrupts = <21 2>;
112 }; 112 };
113 dma-channel@100 { 113 dma-channel@100 {
114 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 114 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
115 reg = <100 80>; 115 reg = <0x100 0x80>;
116 cell-index = <2>; 116 cell-index = <2>;
117 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
118 interrupts = <16 2>; 118 interrupts = <22 2>;
119 }; 119 };
120 dma-channel@180 { 120 dma-channel@180 {
121 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 121 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
122 reg = <180 80>; 122 reg = <0x180 0x80>;
123 cell-index = <3>; 123 cell-index = <3>;
124 interrupt-parent = <&mpic>; 124 interrupt-parent = <&mpic>;
125 interrupts = <17 2>; 125 interrupts = <23 2>;
126 }; 126 };
127 }; 127 };
128 128
diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
new file mode 100644
index 000000000000..600846557763
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
@@ -0,0 +1,24 @@
1* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3The Enhanced Secure Digital Host Controller provides an interface
4for MMC, SD, and SDIO types of memory cards.
5
6Required properties:
7 - compatible : should be
8 "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
9 "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
10 - reg : should contain eSDHC registers location and length.
11 - interrupts : should contain eSDHC interrupt.
12 - interrupt-parent : interrupt source phandle.
13 - clock-frequency : specifies eSDHC base clock frequency.
14
15Example:
16
17sdhci@2e000 {
18 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
19 reg = <0x2e000 0x1000>;
20 interrupts = <42 0x8>;
21 interrupt-parent = <&ipic>;
22 /* Filled in by U-Boot */
23 clock-frequency = <0>;
24};
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 74cc312c347c..ccdd8de3c558 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -594,6 +594,7 @@ config FSL_SOC
594config FSL_PCI 594config FSL_PCI
595 bool 595 bool
596 select PPC_INDIRECT_PCI 596 select PPC_INDIRECT_PCI
597 select PCI_QUIRKS
597 598
598config 4xx_SOC 599config 4xx_SOC
599 bool 600 bool
@@ -730,6 +731,22 @@ config LOWMEM_SIZE
730 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 731 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
731 default "0x30000000" 732 default "0x30000000"
732 733
734config LOWMEM_CAM_NUM_BOOL
735 bool "Set number of CAMs to use to map low memory"
736 depends on ADVANCED_OPTIONS && FSL_BOOKE
737 help
738 This option allows you to set the maximum number of CAM slots that
739 will be used to map low memory. There are a limited number of slots
740 available and even more limited number that will fit in the L1 MMU.
741 However, using more entries will allow mapping more low memory. This
742 can be useful in optimizing the layout of kernel virtual memory.
743
744 Say N here unless you know what you are doing.
745
746config LOWMEM_CAM_NUM
747 int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
748 default 3
749
733config RELOCATABLE 750config RELOCATABLE
734 bool "Build a relocatable kernel (EXPERIMENTAL)" 751 bool "Build a relocatable kernel (EXPERIMENTAL)"
735 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE 752 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
@@ -794,7 +811,7 @@ config PHYSICAL_START
794 811
795config PHYSICAL_ALIGN 812config PHYSICAL_ALIGN
796 hex 813 hex
797 default "0x10000000" if FSL_BOOKE 814 default "0x04000000" if FSL_BOOKE
798 help 815 help
799 This value puts the alignment restrictions on physical address 816 This value puts the alignment restrictions on physical address
800 where kernel is loaded and run from. Kernel is compiled for an 817 where kernel is loaded and run from. Kernel is compiled for an
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
new file mode 100644
index 000000000000..09eeb438216b
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -0,0 +1,364 @@
1/*
2 * GE Fanuc SBC310 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC310";
25 compatible = "gef,sbc310";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe0000000 0x08000000 // Paged Flash 0
80 2 0 0xe8000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00010000>; // FPGA
83
84 /* flash@0,0 is a mirror of part of the memory in flash@1,0
85 flash@0,0 {
86 compatible = "cfi-flash";
87 reg = <0 0 0x01000000>;
88 bank-width = <2>;
89 device-width = <2>;
90 #address-cells = <1>;
91 #size-cells = <1>;
92 partition@0 {
93 label = "firmware";
94 reg = <0x00000000 0x01000000>;
95 read-only;
96 };
97 };
98 */
99
100 flash@1,0 {
101 compatible = "cfi-flash";
102 reg = <1 0 0x8000000>;
103 bank-width = <2>;
104 device-width = <2>;
105 #address-cells = <1>;
106 #size-cells = <1>;
107 partition@0 {
108 label = "user";
109 reg = <0x00000000 0x07800000>;
110 };
111 partition@7800000 {
112 label = "firmware";
113 reg = <0x07800000 0x00800000>;
114 read-only;
115 };
116 };
117
118 fpga@4,0 {
119 compatible = "gef,fpga-regs";
120 reg = <0x4 0x0 0x40>;
121 };
122
123 wdt@4,2000 {
124 #interrupt-cells = <2>;
125 device_type = "watchdog";
126 compatible = "gef,fpga-wdt";
127 reg = <0x4 0x2000 0x8>;
128 interrupts = <0x1a 0x4>;
129 interrupt-parent = <&gef_pic>;
130 };
131/*
132 wdt@4,2010 {
133 #interrupt-cells = <2>;
134 device_type = "watchdog";
135 compatible = "gef,fpga-wdt";
136 reg = <0x4 0x2010 0x8>;
137 interrupts = <0x1b 0x4>;
138 interrupt-parent = <&gef_pic>;
139 };
140*/
141 gef_pic: pic@4,4000 {
142 #interrupt-cells = <1>;
143 interrupt-controller;
144 compatible = "gef,fpga-pic";
145 reg = <0x4 0x4000 0x20>;
146 interrupts = <0x8
147 0x9>;
148 interrupt-parent = <&mpic>;
149
150 };
151 gef_gpio: gpio@4,8000 {
152 #gpio-cells = <2>;
153 compatible = "gef,sbc310-gpio";
154 reg = <0x4 0x8000 0x24>;
155 gpio-controller;
156 };
157 };
158
159 soc@fef00000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 #interrupt-cells = <2>;
163 device_type = "soc";
164 compatible = "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 rtc@51 {
179 compatible = "epson,rx8581";
180 reg = <0x00000051>;
181 };
182 };
183
184 i2c2: i2c@3100 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl-i2c";
188 reg = <0x3100 0x100>;
189 interrupts = <0x2b 0x2>;
190 interrupt-parent = <&mpic>;
191 dfsrr;
192
193 hwmon@48 {
194 compatible = "national,lm92";
195 reg = <0x48>;
196 };
197
198 hwmon@4c {
199 compatible = "adi,adt7461";
200 reg = <0x4c>;
201 };
202
203 eti@6b {
204 compatible = "dallas,ds1682";
205 reg = <0x6b>;
206 };
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 mdio@24520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-mdio";
254 reg = <0x24520 0x20>;
255
256 phy0: ethernet-phy@0 {
257 interrupt-parent = <&gef_pic>;
258 interrupts = <0x9 0x4>;
259 reg = <1>;
260 };
261 phy2: ethernet-phy@2 {
262 interrupt-parent = <&gef_pic>;
263 interrupts = <0x8 0x4>;
264 reg = <3>;
265 };
266 };
267
268 enet0: ethernet@24000 {
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
275 interrupt-parent = <&mpic>;
276 phy-handle = <&phy0>;
277 phy-connection-type = "gmii";
278 };
279
280 enet1: ethernet@26000 {
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x26000 0x1000>;
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
287 interrupt-parent = <&mpic>;
288 phy-handle = <&phy2>;
289 phy-connection-type = "gmii";
290 };
291
292 serial0: serial@4500 {
293 cell-index = <0>;
294 device_type = "serial";
295 compatible = "ns16550";
296 reg = <0x4500 0x100>;
297 clock-frequency = <0>;
298 interrupts = <0x2a 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 serial1: serial@4600 {
303 cell-index = <1>;
304 device_type = "serial";
305 compatible = "ns16550";
306 reg = <0x4600 0x100>;
307 clock-frequency = <0>;
308 interrupts = <0x1c 0x2>;
309 interrupt-parent = <&mpic>;
310 };
311
312 mpic: pic@40000 {
313 clock-frequency = <0>;
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x40000 0x40000>;
318 compatible = "chrp,open-pic";
319 device_type = "open-pic";
320 };
321
322 global-utilities@e0000 {
323 compatible = "fsl,mpc8641-guts";
324 reg = <0xe0000 0x1000>;
325 fsl,has-rstcr;
326 };
327 };
328
329 pci0: pcie@fef08000 {
330 compatible = "fsl,mpc8641-pcie";
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 reg = <0xfef08000 0x1000>;
336 bus-range = <0x0 0xff>;
337 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
338 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
339 clock-frequency = <33333333>;
340 interrupt-parent = <&mpic>;
341 interrupts = <0x18 0x2>;
342 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343 interrupt-map = <
344 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
345 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
346 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
347 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
348 >;
349
350 pcie@0 {
351 reg = <0 0 0 0 0>;
352 #size-cells = <2>;
353 #address-cells = <3>;
354 device_type = "pci";
355 ranges = <0x02000000 0x0 0x80000000
356 0x02000000 0x0 0x80000000
357 0x0 0x40000000
358
359 0x01000000 0x0 0x00000000
360 0x01000000 0x0 0x00000000
361 0x0 0x00400000>;
362 };
363 };
364};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..88d691cccb38 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -349,4 +351,66 @@
349 compatible = "fsl,mpc8349-pci"; 351 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 352 device_type = "pci";
351 }; 353 };
354
355 pci1: pcie@e0009000 {
356 #address-cells = <3>;
357 #size-cells = <2>;
358 #interrupt-cells = <1>;
359 device_type = "pci";
360 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
361 reg = <0xe0009000 0x00001000>;
362 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
363 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
364 bus-range = <0 255>;
365 interrupt-map-mask = <0xf800 0 0 7>;
366 interrupt-map = <0 0 0 1 &ipic 1 8
367 0 0 0 2 &ipic 1 8
368 0 0 0 3 &ipic 1 8
369 0 0 0 4 &ipic 1 8>;
370 clock-frequency = <0>;
371
372 pcie@0 {
373 #address-cells = <3>;
374 #size-cells = <2>;
375 device_type = "pci";
376 reg = <0 0 0 0 0>;
377 ranges = <0x02000000 0 0xa0000000
378 0x02000000 0 0xa0000000
379 0 0x10000000
380 0x01000000 0 0x00000000
381 0x01000000 0 0x00000000
382 0 0x00800000>;
383 };
384 };
385
386 pci2: pcie@e000a000 {
387 #address-cells = <3>;
388 #size-cells = <2>;
389 #interrupt-cells = <1>;
390 device_type = "pci";
391 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
392 reg = <0xe000a000 0x00001000>;
393 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
394 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
395 bus-range = <0 255>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <0 0 0 1 &ipic 2 8
398 0 0 0 2 &ipic 2 8
399 0 0 0 3 &ipic 2 8
400 0 0 0 4 &ipic 2 8>;
401 clock-frequency = <0>;
402
403 pcie@0 {
404 #address-cells = <3>;
405 #size-cells = <2>;
406 device_type = "pci";
407 reg = <0 0 0 0 0>;
408 ranges = <0x02000000 0 0xc0000000
409 0x02000000 0 0xc0000000
410 0 0x10000000
411 0x01000000 0 0x00000000
412 0x01000000 0 0x00000000
413 0 0x00800000>;
414 };
415 };
352}; 416};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..3e3ec8fdef49 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 sata@18000 { 325 sata@18000 {
@@ -409,4 +412,66 @@
409 compatible = "fsl,mpc8349-pci"; 412 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 413 device_type = "pci";
411 }; 414 };
415
416 pci1: pcie@e0009000 {
417 #address-cells = <3>;
418 #size-cells = <2>;
419 #interrupt-cells = <1>;
420 device_type = "pci";
421 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
422 reg = <0xe0009000 0x00001000>;
423 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
424 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
425 bus-range = <0 255>;
426 interrupt-map-mask = <0xf800 0 0 7>;
427 interrupt-map = <0 0 0 1 &ipic 1 8
428 0 0 0 2 &ipic 1 8
429 0 0 0 3 &ipic 1 8
430 0 0 0 4 &ipic 1 8>;
431 clock-frequency = <0>;
432
433 pcie@0 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 device_type = "pci";
437 reg = <0 0 0 0 0>;
438 ranges = <0x02000000 0 0xa8000000
439 0x02000000 0 0xa8000000
440 0 0x10000000
441 0x01000000 0 0x00000000
442 0x01000000 0 0x00000000
443 0 0x00800000>;
444 };
445 };
446
447 pci2: pcie@e000a000 {
448 #address-cells = <3>;
449 #size-cells = <2>;
450 #interrupt-cells = <1>;
451 device_type = "pci";
452 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
453 reg = <0xe000a000 0x00001000>;
454 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
455 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
456 bus-range = <0 255>;
457 interrupt-map-mask = <0xf800 0 0 7>;
458 interrupt-map = <0 0 0 1 &ipic 2 8
459 0 0 0 2 &ipic 2 8
460 0 0 0 3 &ipic 2 8
461 0 0 0 4 &ipic 2 8>;
462 clock-frequency = <0>;
463
464 pcie@0 {
465 #address-cells = <3>;
466 #size-cells = <2>;
467 device_type = "pci";
468 reg = <0 0 0 0 0>;
469 ranges = <0x02000000 0 0xc8000000
470 0x02000000 0 0xc8000000
471 0 0x10000000
472 0x01000000 0 0x00000000
473 0x01000000 0 0x00000000
474 0 0x00800000>;
475 };
476 };
412}; 477};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..fb1d884348ec 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -289,6 +320,15 @@
289 fsl,descriptor-types-mask = <0x3ab0ebf>; 320 fsl,descriptor-types-mask = <0x3ab0ebf>;
290 }; 321 };
291 322
323 sdhci@2e000 {
324 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
325 reg = <0x2e000 0x1000>;
326 interrupts = <42 0x8>;
327 interrupt-parent = <&ipic>;
328 /* Filled in by U-Boot */
329 clock-frequency = <0>;
330 };
331
292 sata@18000 { 332 sata@18000 {
293 compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 333 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
294 reg = <0x18000 0x1000>; 334 reg = <0x18000 0x1000>;
@@ -350,4 +390,66 @@
350 compatible = "fsl,mpc8349-pci"; 390 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 391 device_type = "pci";
352 }; 392 };
393
394 pci1: pcie@e0009000 {
395 #address-cells = <3>;
396 #size-cells = <2>;
397 #interrupt-cells = <1>;
398 device_type = "pci";
399 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
400 reg = <0xe0009000 0x00001000>;
401 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
402 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
403 bus-range = <0 255>;
404 interrupt-map-mask = <0xf800 0 0 7>;
405 interrupt-map = <0 0 0 1 &ipic 1 8
406 0 0 0 2 &ipic 1 8
407 0 0 0 3 &ipic 1 8
408 0 0 0 4 &ipic 1 8>;
409 clock-frequency = <0>;
410
411 pcie@0 {
412 #address-cells = <3>;
413 #size-cells = <2>;
414 device_type = "pci";
415 reg = <0 0 0 0 0>;
416 ranges = <0x02000000 0 0xa8000000
417 0x02000000 0 0xa8000000
418 0 0x10000000
419 0x01000000 0 0x00000000
420 0x01000000 0 0x00000000
421 0 0x00800000>;
422 };
423 };
424
425 pci2: pcie@e000a000 {
426 #address-cells = <3>;
427 #size-cells = <2>;
428 #interrupt-cells = <1>;
429 device_type = "pci";
430 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
431 reg = <0xe000a000 0x00001000>;
432 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
433 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
434 bus-range = <0 255>;
435 interrupt-map-mask = <0xf800 0 0 7>;
436 interrupt-map = <0 0 0 1 &ipic 2 8
437 0 0 0 2 &ipic 2 8
438 0 0 0 3 &ipic 2 8
439 0 0 0 4 &ipic 2 8>;
440 clock-frequency = <0>;
441
442 pcie@0 {
443 #address-cells = <3>;
444 #size-cells = <2>;
445 device_type = "pci";
446 reg = <0 0 0 0 0>;
447 ranges = <0x02000000 0 0xc8000000
448 0x02000000 0 0xc8000000
449 0 0x10000000
450 0x01000000 0 0x00000000
451 0x01000000 0 0x00000000
452 0 0x00800000>;
453 };
454 };
353}; 455};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..c3b212cf9025 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 /* IPIC 325 /* IPIC
@@ -395,4 +398,66 @@
395 compatible = "fsl,mpc8349-pci"; 398 compatible = "fsl,mpc8349-pci";
396 device_type = "pci"; 399 device_type = "pci";
397 }; 400 };
401
402 pci1: pcie@e0009000 {
403 #address-cells = <3>;
404 #size-cells = <2>;
405 #interrupt-cells = <1>;
406 device_type = "pci";
407 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
408 reg = <0xe0009000 0x00001000>;
409 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
410 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
411 bus-range = <0 255>;
412 interrupt-map-mask = <0xf800 0 0 7>;
413 interrupt-map = <0 0 0 1 &ipic 1 8
414 0 0 0 2 &ipic 1 8
415 0 0 0 3 &ipic 1 8
416 0 0 0 4 &ipic 1 8>;
417 clock-frequency = <0>;
418
419 pcie@0 {
420 #address-cells = <3>;
421 #size-cells = <2>;
422 device_type = "pci";
423 reg = <0 0 0 0 0>;
424 ranges = <0x02000000 0 0xa8000000
425 0x02000000 0 0xa8000000
426 0 0x10000000
427 0x01000000 0 0x00000000
428 0x01000000 0 0x00000000
429 0 0x00800000>;
430 };
431 };
432
433 pci2: pcie@e000a000 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 #interrupt-cells = <1>;
437 device_type = "pci";
438 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
439 reg = <0xe000a000 0x00001000>;
440 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
441 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
442 bus-range = <0 255>;
443 interrupt-map-mask = <0xf800 0 0 7>;
444 interrupt-map = <0 0 0 1 &ipic 2 8
445 0 0 0 2 &ipic 2 8
446 0 0 0 3 &ipic 2 8
447 0 0 0 4 &ipic 2 8>;
448 clock-frequency = <0>;
449
450 pcie@0 {
451 #address-cells = <3>;
452 #size-cells = <2>;
453 device_type = "pci";
454 reg = <0 0 0 0 0>;
455 ranges = <0x02000000 0 0xc8000000
456 0x02000000 0 0xc8000000
457 0 0x10000000
458 0x01000000 0 0x00000000
459 0x01000000 0 0x00000000
460 0 0x00800000>;
461 };
462 };
398}; 463};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..37c8555cc8d4 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -287,6 +318,15 @@
287 fsl,descriptor-types-mask = <0x3ab0ebf>; 318 fsl,descriptor-types-mask = <0x3ab0ebf>;
288 }; 319 };
289 320
321 sdhci@2e000 {
322 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
323 reg = <0x2e000 0x1000>;
324 interrupts = <42 0x8>;
325 interrupt-parent = <&ipic>;
326 /* Filled in by U-Boot */
327 clock-frequency = <0>;
328 };
329
290 /* IPIC 330 /* IPIC
291 * interrupts cell = <intr #, sense> 331 * interrupts cell = <intr #, sense>
292 * sense values match linux IORESOURCE_IRQ_* defines: 332 * sense values match linux IORESOURCE_IRQ_* defines:
@@ -334,4 +374,66 @@
334 compatible = "fsl,mpc8349-pci"; 374 compatible = "fsl,mpc8349-pci";
335 device_type = "pci"; 375 device_type = "pci";
336 }; 376 };
377
378 pci1: pcie@e0009000 {
379 #address-cells = <3>;
380 #size-cells = <2>;
381 #interrupt-cells = <1>;
382 device_type = "pci";
383 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
384 reg = <0xe0009000 0x00001000>;
385 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
386 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
387 bus-range = <0 255>;
388 interrupt-map-mask = <0xf800 0 0 7>;
389 interrupt-map = <0 0 0 1 &ipic 1 8
390 0 0 0 2 &ipic 1 8
391 0 0 0 3 &ipic 1 8
392 0 0 0 4 &ipic 1 8>;
393 clock-frequency = <0>;
394
395 pcie@0 {
396 #address-cells = <3>;
397 #size-cells = <2>;
398 device_type = "pci";
399 reg = <0 0 0 0 0>;
400 ranges = <0x02000000 0 0xa8000000
401 0x02000000 0 0xa8000000
402 0 0x10000000
403 0x01000000 0 0x00000000
404 0x01000000 0 0x00000000
405 0 0x00800000>;
406 };
407 };
408
409 pci2: pcie@e000a000 {
410 #address-cells = <3>;
411 #size-cells = <2>;
412 #interrupt-cells = <1>;
413 device_type = "pci";
414 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
415 reg = <0xe000a000 0x00001000>;
416 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
417 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
418 bus-range = <0 255>;
419 interrupt-map-mask = <0xf800 0 0 7>;
420 interrupt-map = <0 0 0 1 &ipic 2 8
421 0 0 0 2 &ipic 2 8
422 0 0 0 3 &ipic 2 8
423 0 0 0 4 &ipic 2 8>;
424 clock-frequency = <0>;
425
426 pcie@0 {
427 #address-cells = <3>;
428 #size-cells = <2>;
429 device_type = "pci";
430 reg = <0 0 0 0 0>;
431 ranges = <0x02000000 0 0xc8000000
432 0x02000000 0 0xc8000000
433 0 0x10000000
434 0x01000000 0 0x00000000
435 0x01000000 0 0x00000000
436 0 0x00800000>;
437 };
438 };
337}; 439};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c438dbf..1b61cda1eb47 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -310,12 +310,13 @@
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 310 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 311 };
312 312
313 sdhc@2e000 { 313 sdhci@2e000 {
314 model = "eSDHC"; 314 compatible = "fsl,mpc8379-esdhc";
315 compatible = "fsl,esdhc";
316 reg = <0x2e000 0x1000>; 315 reg = <0x2e000 0x1000>;
317 interrupts = <42 0x8>; 316 interrupts = <42 0x8>;
318 interrupt-parent = <&ipic>; 317 interrupt-parent = <&ipic>;
318 /* Filled in by U-Boot */
319 clock-frequency = <0>;
319 }; 320 };
320 321
321 sata@18000 { 322 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c4c7e3..e2f98e6a51a2 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -107,6 +107,24 @@
107 reg = <0x200 0x100>; 107 reg = <0x200 0x100>;
108 }; 108 };
109 109
110 gpio1: gpio-controller@c00 {
111 #gpio-cells = <2>;
112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
113 reg = <0xc00 0x100>;
114 interrupts = <74 0x8>;
115 interrupt-parent = <&ipic>;
116 gpio-controller;
117 };
118
119 gpio2: gpio-controller@d00 {
120 #gpio-cells = <2>;
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
122 reg = <0xd00 0x100>;
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
125 gpio-controller;
126 };
127
110 i2c@3000 { 128 i2c@3000 {
111 #address-cells = <1>; 129 #address-cells = <1>;
112 #size-cells = <0>; 130 #size-cells = <0>;
@@ -116,6 +134,17 @@
116 interrupts = <14 0x8>; 134 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 135 interrupt-parent = <&ipic>;
118 dfsrr; 136 dfsrr;
137
138 dtt@48 {
139 compatible = "national,lm75";
140 reg = <0x48>;
141 };
142
143 at24@50 {
144 compatible = "at24,24c256";
145 reg = <0x50>;
146 };
147
119 rtc@68 { 148 rtc@68 {
120 compatible = "dallas,ds1339"; 149 compatible = "dallas,ds1339";
121 reg = <0x68>; 150 reg = <0x68>;
@@ -288,6 +317,15 @@
288 fsl,descriptor-types-mask = <0x3ab0ebf>; 317 fsl,descriptor-types-mask = <0x3ab0ebf>;
289 }; 318 };
290 319
320 sdhci@2e000 {
321 compatible = "fsl,mpc8379-esdhc";
322 reg = <0x2e000 0x1000>;
323 interrupts = <42 0x8>;
324 interrupt-parent = <&ipic>;
325 /* Filled in by U-Boot */
326 clock-frequency = <0>;
327 };
328
291 sata@18000 { 329 sata@18000 {
292 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 330 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
293 reg = <0x18000 0x1000>; 331 reg = <0x18000 0x1000>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index a693f01c21aa..39e55ab82b89 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,6 +84,11 @@
84 interrupt-parent = <&mpic>; 84 interrupt-parent = <&mpic>;
85 dfsrr; 85 dfsrr;
86 86
87 dtt@50 {
88 compatible = "national,lm75";
89 reg = <0x50>;
90 };
91
87 rtc@68 { 92 rtc@68 {
88 compatible = "dallas,ds1337"; 93 compatible = "dallas,ds1337";
89 reg = <0x68>; 94 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e3f5f0dde20..58ae8bc58817 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 15086eb65c50..bff380a25aa6 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index b7b65f5e79b6..112ac90f2ea7 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index cf92b4e7945e..4b7da890c03b 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 9e1ab2d2f669..3fa552f31edb 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -335,14 +340,14 @@
335 can0@2,0 { 340 can0@2,0 {
336 compatible = "intel,82527"; // Bosch CC770 341 compatible = "intel,82527"; // Bosch CC770
337 reg = <2 0x0 0x100>; 342 reg = <2 0x0 0x100>;
338 interrupts = <4 0>; 343 interrupts = <4 1>;
339 interrupt-parent = <&mpic>; 344 interrupt-parent = <&mpic>;
340 }; 345 };
341 346
342 can1@2,100 { 347 can1@2,100 {
343 compatible = "intel,82527"; // Bosch CC770 348 compatible = "intel,82527"; // Bosch CC770
344 reg = <2 0x100 0x100>; 349 reg = <2 0x100 0x100>;
345 interrupts = <4 0>; 350 interrupts = <4 1>;
346 interrupt-parent = <&mpic>; 351 interrupt-parent = <&mpic>;
347 }; 352 };
348 }; 353 };
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
new file mode 100644
index 000000000000..bd236b3d915a
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -0,0 +1,1613 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Wed Jan 28 23:05:34 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_PHYS_64BIT is not set
19CONFIG_ALTIVEC=y
20CONFIG_PPC_STD_MMU=y
21CONFIG_PPC_STD_MMU_32=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_SMP=y
24CONFIG_NR_CPUS=2
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_GENERIC_LOCKBREAK=y
41CONFIG_ARCH_HAS_ILOG2_U32=y
42CONFIG_GENERIC_HWEIGHT=y
43CONFIG_GENERIC_CALIBRATE_DELAY=y
44CONFIG_GENERIC_FIND_NEXT_BIT=y
45CONFIG_GENERIC_GPIO=y
46# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
47CONFIG_PPC=y
48CONFIG_EARLY_PRINTK=y
49CONFIG_GENERIC_NVRAM=y
50CONFIG_SCHED_OMIT_FRAME_POINTER=y
51CONFIG_ARCH_MAY_HAVE_PC_FDC=y
52CONFIG_PPC_OF=y
53CONFIG_OF=y
54CONFIG_PPC_UDBG_16550=y
55CONFIG_GENERIC_TBSYNC=y
56CONFIG_AUDIT_ARCH=y
57CONFIG_GENERIC_BUG=y
58CONFIG_DEFAULT_UIMAGE=y
59# CONFIG_PPC_DCR_NATIVE is not set
60# CONFIG_PPC_DCR_MMIO is not set
61CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
62
63#
64# General setup
65#
66CONFIG_EXPERIMENTAL=y
67CONFIG_LOCK_KERNEL=y
68CONFIG_INIT_ENV_ARG_LIMIT=32
69CONFIG_LOCALVERSION=""
70CONFIG_LOCALVERSION_AUTO=y
71CONFIG_SWAP=y
72CONFIG_SYSVIPC=y
73CONFIG_SYSVIPC_SYSCTL=y
74CONFIG_POSIX_MQUEUE=y
75CONFIG_BSD_PROCESS_ACCT=y
76CONFIG_BSD_PROCESS_ACCT_V3=y
77# CONFIG_TASKSTATS is not set
78# CONFIG_AUDIT is not set
79
80#
81# RCU Subsystem
82#
83CONFIG_CLASSIC_RCU=y
84# CONFIG_TREE_RCU is not set
85# CONFIG_PREEMPT_RCU is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
88CONFIG_IKCONFIG=y
89CONFIG_IKCONFIG_PROC=y
90CONFIG_LOG_BUF_SHIFT=14
91# CONFIG_GROUP_SCHED is not set
92# CONFIG_CGROUPS is not set
93CONFIG_SYSFS_DEPRECATED=y
94CONFIG_SYSFS_DEPRECATED_V2=y
95CONFIG_RELAY=y
96# CONFIG_NAMESPACES is not set
97CONFIG_BLK_DEV_INITRD=y
98CONFIG_INITRAMFS_SOURCE=""
99# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
100CONFIG_SYSCTL=y
101CONFIG_EMBEDDED=y
102CONFIG_SYSCTL_SYSCALL=y
103CONFIG_KALLSYMS=y
104# CONFIG_KALLSYMS_EXTRA_PASS is not set
105CONFIG_HOTPLUG=y
106CONFIG_PRINTK=y
107CONFIG_BUG=y
108CONFIG_ELF_CORE=y
109CONFIG_COMPAT_BRK=y
110CONFIG_BASE_FULL=y
111CONFIG_FUTEX=y
112CONFIG_ANON_INODES=y
113CONFIG_EPOLL=y
114CONFIG_SIGNALFD=y
115CONFIG_TIMERFD=y
116CONFIG_EVENTFD=y
117CONFIG_SHMEM=y
118CONFIG_AIO=y
119CONFIG_VM_EVENT_COUNTERS=y
120CONFIG_PCI_QUIRKS=y
121CONFIG_SLAB=y
122# CONFIG_SLUB is not set
123# CONFIG_SLOB is not set
124# CONFIG_PROFILING is not set
125CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set
127CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
128CONFIG_HAVE_IOREMAP_PROT=y
129CONFIG_HAVE_KPROBES=y
130CONFIG_HAVE_KRETPROBES=y
131CONFIG_HAVE_ARCH_TRACEHOOK=y
132CONFIG_USE_GENERIC_SMP_HELPERS=y
133# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
134CONFIG_SLABINFO=y
135CONFIG_RT_MUTEXES=y
136CONFIG_BASE_SMALL=0
137CONFIG_MODULES=y
138# CONFIG_MODULE_FORCE_LOAD is not set
139CONFIG_MODULE_UNLOAD=y
140# CONFIG_MODULE_FORCE_UNLOAD is not set
141# CONFIG_MODVERSIONS is not set
142# CONFIG_MODULE_SRCVERSION_ALL is not set
143CONFIG_STOP_MACHINE=y
144CONFIG_BLOCK=y
145# CONFIG_LBD is not set
146# CONFIG_BLK_DEV_IO_TRACE is not set
147# CONFIG_BLK_DEV_BSG is not set
148# CONFIG_BLK_DEV_INTEGRITY is not set
149
150#
151# IO Schedulers
152#
153CONFIG_IOSCHED_NOOP=y
154CONFIG_IOSCHED_AS=y
155CONFIG_IOSCHED_DEADLINE=y
156CONFIG_IOSCHED_CFQ=y
157# CONFIG_DEFAULT_AS is not set
158# CONFIG_DEFAULT_DEADLINE is not set
159CONFIG_DEFAULT_CFQ=y
160# CONFIG_DEFAULT_NOOP is not set
161CONFIG_DEFAULT_IOSCHED="cfq"
162# CONFIG_FREEZER is not set
163CONFIG_PPC_MSI_BITMAP=y
164
165#
166# Platform support
167#
168CONFIG_PPC_MULTIPLATFORM=y
169CONFIG_CLASSIC32=y
170# CONFIG_PPC_CHRP is not set
171# CONFIG_MPC5121_ADS is not set
172# CONFIG_MPC5121_GENERIC is not set
173# CONFIG_PPC_MPC52xx is not set
174# CONFIG_PPC_PMAC is not set
175# CONFIG_PPC_CELL is not set
176# CONFIG_PPC_CELL_NATIVE is not set
177# CONFIG_PPC_82xx is not set
178# CONFIG_PQ2ADS is not set
179# CONFIG_PPC_83xx is not set
180CONFIG_PPC_86xx=y
181# CONFIG_MPC8641_HPCN is not set
182# CONFIG_SBC8641D is not set
183# CONFIG_MPC8610_HPCD is not set
184CONFIG_GEF_SBC310=y
185# CONFIG_GEF_SBC610 is not set
186CONFIG_MPC8641=y
187# CONFIG_IPIC is not set
188CONFIG_MPIC=y
189# CONFIG_MPIC_WEIRD is not set
190# CONFIG_PPC_I8259 is not set
191# CONFIG_PPC_RTAS is not set
192# CONFIG_MMIO_NVRAM is not set
193# CONFIG_PPC_MPC106 is not set
194# CONFIG_PPC_970_NAP is not set
195# CONFIG_PPC_INDIRECT_IO is not set
196# CONFIG_GENERIC_IOMAP is not set
197# CONFIG_CPU_FREQ is not set
198# CONFIG_TAU is not set
199# CONFIG_QUICC_ENGINE is not set
200# CONFIG_FSL_ULI1575 is not set
201# CONFIG_MPC8xxx_GPIO is not set
202# CONFIG_SIMPLE_GPIO is not set
203
204#
205# Kernel options
206#
207# CONFIG_HIGHMEM is not set
208CONFIG_TICK_ONESHOT=y
209# CONFIG_NO_HZ is not set
210CONFIG_HIGH_RES_TIMERS=y
211CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
212# CONFIG_HZ_100 is not set
213# CONFIG_HZ_250 is not set
214# CONFIG_HZ_300 is not set
215CONFIG_HZ_1000=y
216CONFIG_HZ=1000
217CONFIG_SCHED_HRTICK=y
218# CONFIG_PREEMPT_NONE is not set
219# CONFIG_PREEMPT_VOLUNTARY is not set
220CONFIG_PREEMPT=y
221CONFIG_BINFMT_ELF=y
222# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
223# CONFIG_HAVE_AOUT is not set
224CONFIG_BINFMT_MISC=y
225# CONFIG_IOMMU_HELPER is not set
226CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
227CONFIG_ARCH_HAS_WALK_MEMORY=y
228CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
229# CONFIG_KEXEC is not set
230# CONFIG_CRASH_DUMP is not set
231CONFIG_IRQ_ALL_CPUS=y
232CONFIG_ARCH_FLATMEM_ENABLE=y
233CONFIG_ARCH_POPULATES_NODE_MAP=y
234CONFIG_SELECT_MEMORY_MODEL=y
235CONFIG_FLATMEM_MANUAL=y
236# CONFIG_DISCONTIGMEM_MANUAL is not set
237# CONFIG_SPARSEMEM_MANUAL is not set
238CONFIG_FLATMEM=y
239CONFIG_FLAT_NODE_MEM_MAP=y
240CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4
242CONFIG_MIGRATION=y
243# CONFIG_PHYS_ADDR_T_64BIT is not set
244CONFIG_ZONE_DMA_FLAG=1
245CONFIG_BOUNCE=y
246CONFIG_VIRT_TO_BUS=y
247CONFIG_UNEVICTABLE_LRU=y
248CONFIG_PPC_4K_PAGES=y
249# CONFIG_PPC_16K_PAGES is not set
250# CONFIG_PPC_64K_PAGES is not set
251CONFIG_FORCE_MAX_ZONEORDER=11
252# CONFIG_PROC_DEVICETREE is not set
253# CONFIG_CMDLINE_BOOL is not set
254CONFIG_EXTRA_TARGETS=""
255# CONFIG_PM is not set
256CONFIG_SECCOMP=y
257CONFIG_ISA_DMA_API=y
258
259#
260# Bus options
261#
262CONFIG_ZONE_DMA=y
263CONFIG_GENERIC_ISA_DMA=y
264CONFIG_PPC_INDIRECT_PCI=y
265CONFIG_FSL_SOC=y
266CONFIG_FSL_PCI=y
267CONFIG_PPC_PCI_CHOICE=y
268CONFIG_PCI=y
269CONFIG_PCI_DOMAINS=y
270CONFIG_PCI_SYSCALL=y
271CONFIG_PCIEPORTBUS=y
272CONFIG_PCIEAER=y
273# CONFIG_PCIEASPM is not set
274CONFIG_ARCH_SUPPORTS_MSI=y
275CONFIG_PCI_MSI=y
276# CONFIG_PCI_LEGACY is not set
277# CONFIG_PCI_STUB is not set
278# CONFIG_PCCARD is not set
279# CONFIG_HOTPLUG_PCI is not set
280# CONFIG_HAS_RAPIDIO is not set
281
282#
283# Advanced setup
284#
285# CONFIG_ADVANCED_OPTIONS is not set
286
287#
288# Default settings for advanced configuration options are used
289#
290CONFIG_LOWMEM_SIZE=0x30000000
291CONFIG_LOWMEM_CAM_NUM=3
292CONFIG_PAGE_OFFSET=0xc0000000
293CONFIG_KERNEL_START=0xc0000000
294CONFIG_PHYSICAL_START=0x00000000
295CONFIG_TASK_SIZE=0xc0000000
296CONFIG_NET=y
297
298#
299# Networking options
300#
301CONFIG_COMPAT_NET_DEV_OPS=y
302CONFIG_PACKET=y
303CONFIG_PACKET_MMAP=y
304CONFIG_UNIX=y
305CONFIG_XFRM=y
306CONFIG_XFRM_USER=m
307# CONFIG_XFRM_SUB_POLICY is not set
308# CONFIG_XFRM_MIGRATE is not set
309# CONFIG_XFRM_STATISTICS is not set
310CONFIG_XFRM_IPCOMP=m
311CONFIG_NET_KEY=m
312# CONFIG_NET_KEY_MIGRATE is not set
313CONFIG_INET=y
314CONFIG_IP_MULTICAST=y
315CONFIG_IP_ADVANCED_ROUTER=y
316CONFIG_ASK_IP_FIB_HASH=y
317# CONFIG_IP_FIB_TRIE is not set
318CONFIG_IP_FIB_HASH=y
319CONFIG_IP_MULTIPLE_TABLES=y
320CONFIG_IP_ROUTE_MULTIPATH=y
321CONFIG_IP_ROUTE_VERBOSE=y
322CONFIG_IP_PNP=y
323CONFIG_IP_PNP_DHCP=y
324CONFIG_IP_PNP_BOOTP=y
325CONFIG_IP_PNP_RARP=y
326CONFIG_NET_IPIP=m
327CONFIG_NET_IPGRE=m
328CONFIG_NET_IPGRE_BROADCAST=y
329CONFIG_IP_MROUTE=y
330CONFIG_IP_PIMSM_V1=y
331CONFIG_IP_PIMSM_V2=y
332# CONFIG_ARPD is not set
333CONFIG_SYN_COOKIES=y
334CONFIG_INET_AH=m
335CONFIG_INET_ESP=m
336CONFIG_INET_IPCOMP=m
337CONFIG_INET_XFRM_TUNNEL=m
338CONFIG_INET_TUNNEL=m
339CONFIG_INET_XFRM_MODE_TRANSPORT=y
340CONFIG_INET_XFRM_MODE_TUNNEL=y
341# CONFIG_INET_XFRM_MODE_BEET is not set
342CONFIG_INET_LRO=y
343CONFIG_INET_DIAG=y
344CONFIG_INET_TCP_DIAG=y
345# CONFIG_TCP_CONG_ADVANCED is not set
346CONFIG_TCP_CONG_CUBIC=y
347CONFIG_DEFAULT_TCP_CONG="cubic"
348# CONFIG_TCP_MD5SIG is not set
349CONFIG_IPV6=m
350# CONFIG_IPV6_PRIVACY is not set
351# CONFIG_IPV6_ROUTER_PREF is not set
352# CONFIG_IPV6_OPTIMISTIC_DAD is not set
353CONFIG_INET6_AH=m
354CONFIG_INET6_ESP=m
355CONFIG_INET6_IPCOMP=m
356# CONFIG_IPV6_MIP6 is not set
357CONFIG_INET6_XFRM_TUNNEL=m
358CONFIG_INET6_TUNNEL=m
359CONFIG_INET6_XFRM_MODE_TRANSPORT=m
360CONFIG_INET6_XFRM_MODE_TUNNEL=m
361CONFIG_INET6_XFRM_MODE_BEET=m
362# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
363CONFIG_IPV6_SIT=m
364CONFIG_IPV6_NDISC_NODETYPE=y
365CONFIG_IPV6_TUNNEL=m
366# CONFIG_IPV6_MULTIPLE_TABLES is not set
367# CONFIG_IPV6_MROUTE is not set
368# CONFIG_NETWORK_SECMARK is not set
369# CONFIG_NETFILTER is not set
370# CONFIG_IP_DCCP is not set
371# CONFIG_IP_SCTP is not set
372# CONFIG_TIPC is not set
373# CONFIG_ATM is not set
374# CONFIG_BRIDGE is not set
375# CONFIG_NET_DSA is not set
376# CONFIG_VLAN_8021Q is not set
377# CONFIG_DECNET is not set
378# CONFIG_LLC2 is not set
379# CONFIG_IPX is not set
380# CONFIG_ATALK is not set
381# CONFIG_X25 is not set
382# CONFIG_LAPB is not set
383# CONFIG_ECONET is not set
384# CONFIG_WAN_ROUTER is not set
385# CONFIG_NET_SCHED is not set
386# CONFIG_DCB is not set
387
388#
389# Network testing
390#
391CONFIG_NET_PKTGEN=m
392# CONFIG_HAMRADIO is not set
393# CONFIG_CAN is not set
394# CONFIG_IRDA is not set
395# CONFIG_BT is not set
396# CONFIG_AF_RXRPC is not set
397# CONFIG_PHONET is not set
398CONFIG_FIB_RULES=y
399# CONFIG_WIRELESS is not set
400# CONFIG_WIMAX is not set
401# CONFIG_RFKILL is not set
402# CONFIG_NET_9P is not set
403
404#
405# Device Drivers
406#
407
408#
409# Generic Driver Options
410#
411CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
412CONFIG_STANDALONE=y
413CONFIG_PREVENT_FIRMWARE_BUILD=y
414# CONFIG_FW_LOADER is not set
415# CONFIG_SYS_HYPERVISOR is not set
416# CONFIG_CONNECTOR is not set
417CONFIG_MTD=y
418# CONFIG_MTD_DEBUG is not set
419CONFIG_MTD_CONCAT=y
420CONFIG_MTD_PARTITIONS=y
421# CONFIG_MTD_TESTS is not set
422# CONFIG_MTD_REDBOOT_PARTS is not set
423# CONFIG_MTD_CMDLINE_PARTS is not set
424CONFIG_MTD_OF_PARTS=y
425# CONFIG_MTD_AR7_PARTS is not set
426
427#
428# User Modules And Translation Layers
429#
430CONFIG_MTD_CHAR=y
431CONFIG_MTD_BLKDEVS=y
432CONFIG_MTD_BLOCK=y
433# CONFIG_FTL is not set
434# CONFIG_NFTL is not set
435# CONFIG_INFTL is not set
436# CONFIG_RFD_FTL is not set
437# CONFIG_SSFDC is not set
438# CONFIG_MTD_OOPS is not set
439
440#
441# RAM/ROM/Flash chip drivers
442#
443CONFIG_MTD_CFI=y
444CONFIG_MTD_JEDECPROBE=y
445CONFIG_MTD_GEN_PROBE=y
446# CONFIG_MTD_CFI_ADV_OPTIONS is not set
447CONFIG_MTD_MAP_BANK_WIDTH_1=y
448CONFIG_MTD_MAP_BANK_WIDTH_2=y
449CONFIG_MTD_MAP_BANK_WIDTH_4=y
450# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
451# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
452# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
453CONFIG_MTD_CFI_I1=y
454CONFIG_MTD_CFI_I2=y
455# CONFIG_MTD_CFI_I4 is not set
456# CONFIG_MTD_CFI_I8 is not set
457CONFIG_MTD_CFI_INTELEXT=y
458CONFIG_MTD_CFI_AMDSTD=y
459# CONFIG_MTD_CFI_STAA is not set
460CONFIG_MTD_CFI_UTIL=y
461# CONFIG_MTD_RAM is not set
462# CONFIG_MTD_ROM is not set
463# CONFIG_MTD_ABSENT is not set
464
465#
466# Mapping drivers for chip access
467#
468# CONFIG_MTD_COMPLEX_MAPPINGS is not set
469# CONFIG_MTD_PHYSMAP is not set
470CONFIG_MTD_PHYSMAP_OF=y
471# CONFIG_MTD_INTEL_VR_NOR is not set
472# CONFIG_MTD_PLATRAM is not set
473
474#
475# Self-contained MTD device drivers
476#
477# CONFIG_MTD_PMC551 is not set
478# CONFIG_MTD_SLRAM is not set
479# CONFIG_MTD_PHRAM is not set
480# CONFIG_MTD_MTDRAM is not set
481# CONFIG_MTD_BLOCK2MTD is not set
482
483#
484# Disk-On-Chip Device Drivers
485#
486# CONFIG_MTD_DOC2000 is not set
487# CONFIG_MTD_DOC2001 is not set
488# CONFIG_MTD_DOC2001PLUS is not set
489# CONFIG_MTD_NAND is not set
490# CONFIG_MTD_ONENAND is not set
491
492#
493# LPDDR flash memory drivers
494#
495# CONFIG_MTD_LPDDR is not set
496# CONFIG_MTD_QINFO_PROBE is not set
497
498#
499# UBI - Unsorted block images
500#
501# CONFIG_MTD_UBI is not set
502CONFIG_OF_DEVICE=y
503CONFIG_OF_GPIO=y
504CONFIG_OF_I2C=y
505# CONFIG_PARPORT is not set
506CONFIG_BLK_DEV=y
507# CONFIG_BLK_DEV_FD is not set
508# CONFIG_BLK_CPQ_DA is not set
509# CONFIG_BLK_CPQ_CISS_DA is not set
510# CONFIG_BLK_DEV_DAC960 is not set
511# CONFIG_BLK_DEV_UMEM is not set
512# CONFIG_BLK_DEV_COW_COMMON is not set
513CONFIG_BLK_DEV_LOOP=m
514CONFIG_BLK_DEV_CRYPTOLOOP=m
515CONFIG_BLK_DEV_NBD=m
516# CONFIG_BLK_DEV_SX8 is not set
517# CONFIG_BLK_DEV_UB is not set
518CONFIG_BLK_DEV_RAM=y
519CONFIG_BLK_DEV_RAM_COUNT=16
520CONFIG_BLK_DEV_RAM_SIZE=131072
521# CONFIG_BLK_DEV_XIP is not set
522# CONFIG_CDROM_PKTCDVD is not set
523# CONFIG_ATA_OVER_ETH is not set
524# CONFIG_BLK_DEV_HD is not set
525CONFIG_MISC_DEVICES=y
526# CONFIG_PHANTOM is not set
527# CONFIG_SGI_IOC4 is not set
528# CONFIG_TIFM_CORE is not set
529# CONFIG_ICS932S401 is not set
530# CONFIG_ENCLOSURE_SERVICES is not set
531# CONFIG_HP_ILO is not set
532# CONFIG_C2PORT is not set
533
534#
535# EEPROM support
536#
537# CONFIG_EEPROM_AT24 is not set
538# CONFIG_EEPROM_LEGACY is not set
539# CONFIG_EEPROM_93CX6 is not set
540CONFIG_HAVE_IDE=y
541# CONFIG_IDE is not set
542
543#
544# SCSI device support
545#
546# CONFIG_RAID_ATTRS is not set
547CONFIG_SCSI=y
548CONFIG_SCSI_DMA=y
549# CONFIG_SCSI_TGT is not set
550# CONFIG_SCSI_NETLINK is not set
551CONFIG_SCSI_PROC_FS=y
552
553#
554# SCSI support type (disk, tape, CD-ROM)
555#
556CONFIG_BLK_DEV_SD=y
557CONFIG_CHR_DEV_ST=y
558# CONFIG_CHR_DEV_OSST is not set
559CONFIG_BLK_DEV_SR=y
560# CONFIG_BLK_DEV_SR_VENDOR is not set
561# CONFIG_CHR_DEV_SG is not set
562# CONFIG_CHR_DEV_SCH is not set
563
564#
565# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
566#
567# CONFIG_SCSI_MULTI_LUN is not set
568# CONFIG_SCSI_CONSTANTS is not set
569# CONFIG_SCSI_LOGGING is not set
570# CONFIG_SCSI_SCAN_ASYNC is not set
571CONFIG_SCSI_WAIT_SCAN=m
572
573#
574# SCSI Transports
575#
576# CONFIG_SCSI_SPI_ATTRS is not set
577# CONFIG_SCSI_FC_ATTRS is not set
578# CONFIG_SCSI_ISCSI_ATTRS is not set
579# CONFIG_SCSI_SAS_LIBSAS is not set
580# CONFIG_SCSI_SRP_ATTRS is not set
581CONFIG_SCSI_LOWLEVEL=y
582# CONFIG_ISCSI_TCP is not set
583# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
584# CONFIG_SCSI_3W_9XXX is not set
585# CONFIG_SCSI_ACARD is not set
586# CONFIG_SCSI_AACRAID is not set
587# CONFIG_SCSI_AIC7XXX is not set
588# CONFIG_SCSI_AIC7XXX_OLD is not set
589# CONFIG_SCSI_AIC79XX is not set
590# CONFIG_SCSI_AIC94XX is not set
591# CONFIG_SCSI_DPT_I2O is not set
592# CONFIG_SCSI_ADVANSYS is not set
593# CONFIG_SCSI_ARCMSR is not set
594# CONFIG_MEGARAID_NEWGEN is not set
595# CONFIG_MEGARAID_LEGACY is not set
596# CONFIG_MEGARAID_SAS is not set
597# CONFIG_SCSI_HPTIOP is not set
598# CONFIG_SCSI_BUSLOGIC is not set
599# CONFIG_LIBFC is not set
600# CONFIG_FCOE is not set
601# CONFIG_SCSI_DMX3191D is not set
602# CONFIG_SCSI_EATA is not set
603# CONFIG_SCSI_FUTURE_DOMAIN is not set
604# CONFIG_SCSI_GDTH is not set
605# CONFIG_SCSI_IPS is not set
606# CONFIG_SCSI_INITIO is not set
607# CONFIG_SCSI_INIA100 is not set
608# CONFIG_SCSI_MVSAS is not set
609# CONFIG_SCSI_STEX is not set
610# CONFIG_SCSI_SYM53C8XX_2 is not set
611# CONFIG_SCSI_IPR is not set
612# CONFIG_SCSI_QLOGIC_1280 is not set
613# CONFIG_SCSI_QLA_FC is not set
614# CONFIG_SCSI_QLA_ISCSI is not set
615# CONFIG_SCSI_LPFC is not set
616# CONFIG_SCSI_DC395x is not set
617# CONFIG_SCSI_DC390T is not set
618# CONFIG_SCSI_NSP32 is not set
619# CONFIG_SCSI_DEBUG is not set
620# CONFIG_SCSI_SRP is not set
621# CONFIG_SCSI_DH is not set
622CONFIG_ATA=y
623# CONFIG_ATA_NONSTANDARD is not set
624CONFIG_SATA_PMP=y
625# CONFIG_SATA_AHCI is not set
626CONFIG_SATA_SIL24=y
627# CONFIG_SATA_FSL is not set
628# CONFIG_ATA_SFF is not set
629# CONFIG_MD is not set
630# CONFIG_FUSION is not set
631
632#
633# IEEE 1394 (FireWire) support
634#
635
636#
637# Enable only one of the two stacks, unless you know what you are doing
638#
639# CONFIG_FIREWIRE is not set
640# CONFIG_IEEE1394 is not set
641# CONFIG_I2O is not set
642# CONFIG_MACINTOSH_DRIVERS is not set
643CONFIG_NETDEVICES=y
644CONFIG_DUMMY=m
645CONFIG_BONDING=m
646# CONFIG_MACVLAN is not set
647# CONFIG_EQUALIZER is not set
648CONFIG_TUN=m
649# CONFIG_VETH is not set
650# CONFIG_ARCNET is not set
651CONFIG_PHYLIB=y
652
653#
654# MII PHY device drivers
655#
656# CONFIG_MARVELL_PHY is not set
657# CONFIG_DAVICOM_PHY is not set
658# CONFIG_QSEMI_PHY is not set
659# CONFIG_LXT_PHY is not set
660# CONFIG_CICADA_PHY is not set
661# CONFIG_VITESSE_PHY is not set
662# CONFIG_SMSC_PHY is not set
663# CONFIG_BROADCOM_PHY is not set
664# CONFIG_ICPLUS_PHY is not set
665# CONFIG_REALTEK_PHY is not set
666# CONFIG_NATIONAL_PHY is not set
667# CONFIG_STE10XP is not set
668# CONFIG_LSI_ET1011C_PHY is not set
669# CONFIG_FIXED_PHY is not set
670# CONFIG_MDIO_BITBANG is not set
671CONFIG_NET_ETHERNET=y
672CONFIG_MII=y
673# CONFIG_HAPPYMEAL is not set
674# CONFIG_SUNGEM is not set
675# CONFIG_CASSINI is not set
676# CONFIG_NET_VENDOR_3COM is not set
677# CONFIG_NET_TULIP is not set
678# CONFIG_HP100 is not set
679# CONFIG_IBM_NEW_EMAC_ZMII is not set
680# CONFIG_IBM_NEW_EMAC_RGMII is not set
681# CONFIG_IBM_NEW_EMAC_TAH is not set
682# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
683# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
684# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
685# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
686# CONFIG_NET_PCI is not set
687# CONFIG_B44 is not set
688# CONFIG_ATL2 is not set
689CONFIG_NETDEV_1000=y
690# CONFIG_ACENIC is not set
691# CONFIG_DL2K is not set
692# CONFIG_E1000 is not set
693# CONFIG_E1000E is not set
694# CONFIG_IP1000 is not set
695# CONFIG_IGB is not set
696# CONFIG_NS83820 is not set
697# CONFIG_HAMACHI is not set
698# CONFIG_YELLOWFIN is not set
699# CONFIG_R8169 is not set
700# CONFIG_SIS190 is not set
701# CONFIG_SKGE is not set
702# CONFIG_SKY2 is not set
703# CONFIG_VIA_VELOCITY is not set
704# CONFIG_TIGON3 is not set
705# CONFIG_BNX2 is not set
706CONFIG_GIANFAR=y
707# CONFIG_MV643XX_ETH is not set
708# CONFIG_QLA3XXX is not set
709# CONFIG_ATL1 is not set
710# CONFIG_ATL1E is not set
711# CONFIG_JME is not set
712# CONFIG_NETDEV_10000 is not set
713# CONFIG_TR is not set
714
715#
716# Wireless LAN
717#
718# CONFIG_WLAN_PRE80211 is not set
719# CONFIG_WLAN_80211 is not set
720# CONFIG_IWLWIFI_LEDS is not set
721
722#
723# Enable WiMAX (Networking options) to see the WiMAX drivers
724#
725
726#
727# USB Network Adapters
728#
729# CONFIG_USB_CATC is not set
730# CONFIG_USB_KAWETH is not set
731# CONFIG_USB_PEGASUS is not set
732# CONFIG_USB_RTL8150 is not set
733# CONFIG_USB_USBNET is not set
734# CONFIG_WAN is not set
735# CONFIG_FDDI is not set
736# CONFIG_HIPPI is not set
737CONFIG_PPP=m
738CONFIG_PPP_MULTILINK=y
739CONFIG_PPP_FILTER=y
740CONFIG_PPP_ASYNC=m
741CONFIG_PPP_SYNC_TTY=m
742CONFIG_PPP_DEFLATE=m
743CONFIG_PPP_BSDCOMP=m
744# CONFIG_PPP_MPPE is not set
745CONFIG_PPPOE=m
746# CONFIG_PPPOL2TP is not set
747CONFIG_SLIP=m
748CONFIG_SLIP_COMPRESSED=y
749CONFIG_SLHC=m
750CONFIG_SLIP_SMART=y
751CONFIG_SLIP_MODE_SLIP6=y
752# CONFIG_NET_FC is not set
753CONFIG_NETCONSOLE=y
754# CONFIG_NETCONSOLE_DYNAMIC is not set
755CONFIG_NETPOLL=y
756CONFIG_NETPOLL_TRAP=y
757CONFIG_NET_POLL_CONTROLLER=y
758# CONFIG_ISDN is not set
759# CONFIG_PHONE is not set
760
761#
762# Input device support
763#
764CONFIG_INPUT=y
765# CONFIG_INPUT_FF_MEMLESS is not set
766# CONFIG_INPUT_POLLDEV is not set
767
768#
769# Userland interfaces
770#
771CONFIG_INPUT_MOUSEDEV=y
772CONFIG_INPUT_MOUSEDEV_PSAUX=y
773CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
774CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
775# CONFIG_INPUT_JOYDEV is not set
776# CONFIG_INPUT_EVDEV is not set
777# CONFIG_INPUT_EVBUG is not set
778
779#
780# Input Device Drivers
781#
782# CONFIG_INPUT_KEYBOARD is not set
783# CONFIG_INPUT_MOUSE is not set
784# CONFIG_INPUT_JOYSTICK is not set
785# CONFIG_INPUT_TABLET is not set
786# CONFIG_INPUT_TOUCHSCREEN is not set
787# CONFIG_INPUT_MISC is not set
788
789#
790# Hardware I/O ports
791#
792# CONFIG_SERIO is not set
793# CONFIG_GAMEPORT is not set
794
795#
796# Character devices
797#
798CONFIG_VT=y
799CONFIG_CONSOLE_TRANSLATIONS=y
800CONFIG_VT_CONSOLE=y
801CONFIG_HW_CONSOLE=y
802# CONFIG_VT_HW_CONSOLE_BINDING is not set
803CONFIG_DEVKMEM=y
804# CONFIG_SERIAL_NONSTANDARD is not set
805# CONFIG_NOZOMI is not set
806
807#
808# Serial drivers
809#
810CONFIG_SERIAL_8250=y
811CONFIG_SERIAL_8250_CONSOLE=y
812# CONFIG_SERIAL_8250_PCI is not set
813CONFIG_SERIAL_8250_NR_UARTS=2
814CONFIG_SERIAL_8250_RUNTIME_UARTS=2
815# CONFIG_SERIAL_8250_EXTENDED is not set
816
817#
818# Non-8250 serial port support
819#
820# CONFIG_SERIAL_UARTLITE is not set
821CONFIG_SERIAL_CORE=y
822CONFIG_SERIAL_CORE_CONSOLE=y
823# CONFIG_SERIAL_JSM is not set
824# CONFIG_SERIAL_OF_PLATFORM is not set
825CONFIG_UNIX98_PTYS=y
826# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
827# CONFIG_LEGACY_PTYS is not set
828# CONFIG_HVC_UDBG is not set
829# CONFIG_IPMI_HANDLER is not set
830CONFIG_HW_RANDOM=y
831CONFIG_NVRAM=y
832# CONFIG_R3964 is not set
833# CONFIG_APPLICOM is not set
834# CONFIG_RAW_DRIVER is not set
835# CONFIG_TCG_TPM is not set
836CONFIG_DEVPORT=y
837CONFIG_I2C=y
838CONFIG_I2C_BOARDINFO=y
839CONFIG_I2C_CHARDEV=y
840CONFIG_I2C_HELPER_AUTO=y
841
842#
843# I2C Hardware Bus support
844#
845
846#
847# PC SMBus host controller drivers
848#
849# CONFIG_I2C_ALI1535 is not set
850# CONFIG_I2C_ALI1563 is not set
851# CONFIG_I2C_ALI15X3 is not set
852# CONFIG_I2C_AMD756 is not set
853# CONFIG_I2C_AMD8111 is not set
854# CONFIG_I2C_I801 is not set
855# CONFIG_I2C_ISCH is not set
856# CONFIG_I2C_PIIX4 is not set
857# CONFIG_I2C_NFORCE2 is not set
858# CONFIG_I2C_SIS5595 is not set
859# CONFIG_I2C_SIS630 is not set
860# CONFIG_I2C_SIS96X is not set
861# CONFIG_I2C_VIA is not set
862# CONFIG_I2C_VIAPRO is not set
863
864#
865# I2C system bus drivers (mostly embedded / system-on-chip)
866#
867# CONFIG_I2C_GPIO is not set
868CONFIG_I2C_MPC=y
869# CONFIG_I2C_OCORES is not set
870# CONFIG_I2C_SIMTEC is not set
871
872#
873# External I2C/SMBus adapter drivers
874#
875# CONFIG_I2C_PARPORT_LIGHT is not set
876# CONFIG_I2C_TAOS_EVM is not set
877# CONFIG_I2C_TINY_USB is not set
878
879#
880# Graphics adapter I2C/DDC channel drivers
881#
882# CONFIG_I2C_VOODOO3 is not set
883
884#
885# Other I2C/SMBus bus drivers
886#
887# CONFIG_I2C_PCA_PLATFORM is not set
888# CONFIG_I2C_STUB is not set
889
890#
891# Miscellaneous I2C Chip support
892#
893CONFIG_DS1682=y
894# CONFIG_SENSORS_PCF8574 is not set
895# CONFIG_PCF8575 is not set
896# CONFIG_SENSORS_PCA9539 is not set
897# CONFIG_SENSORS_PCF8591 is not set
898# CONFIG_SENSORS_MAX6875 is not set
899# CONFIG_SENSORS_TSL2550 is not set
900# CONFIG_I2C_DEBUG_CORE is not set
901# CONFIG_I2C_DEBUG_ALGO is not set
902# CONFIG_I2C_DEBUG_BUS is not set
903# CONFIG_I2C_DEBUG_CHIP is not set
904# CONFIG_SPI is not set
905CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
906CONFIG_ARCH_REQUIRE_GPIOLIB=y
907CONFIG_GPIOLIB=y
908CONFIG_GPIO_SYSFS=y
909
910#
911# Memory mapped GPIO expanders:
912#
913# CONFIG_GPIO_XILINX is not set
914
915#
916# I2C GPIO expanders:
917#
918# CONFIG_GPIO_MAX732X is not set
919# CONFIG_GPIO_PCA953X is not set
920# CONFIG_GPIO_PCF857X is not set
921
922#
923# PCI GPIO expanders:
924#
925# CONFIG_GPIO_BT8XX is not set
926
927#
928# SPI GPIO expanders:
929#
930# CONFIG_W1 is not set
931# CONFIG_POWER_SUPPLY is not set
932CONFIG_HWMON=y
933# CONFIG_HWMON_VID is not set
934# CONFIG_SENSORS_AD7414 is not set
935# CONFIG_SENSORS_AD7418 is not set
936# CONFIG_SENSORS_ADM1021 is not set
937# CONFIG_SENSORS_ADM1025 is not set
938# CONFIG_SENSORS_ADM1026 is not set
939# CONFIG_SENSORS_ADM1029 is not set
940# CONFIG_SENSORS_ADM1031 is not set
941# CONFIG_SENSORS_ADM9240 is not set
942# CONFIG_SENSORS_ADT7462 is not set
943# CONFIG_SENSORS_ADT7470 is not set
944# CONFIG_SENSORS_ADT7473 is not set
945# CONFIG_SENSORS_ADT7475 is not set
946# CONFIG_SENSORS_ATXP1 is not set
947# CONFIG_SENSORS_DS1621 is not set
948# CONFIG_SENSORS_I5K_AMB is not set
949# CONFIG_SENSORS_F71805F is not set
950# CONFIG_SENSORS_F71882FG is not set
951# CONFIG_SENSORS_F75375S is not set
952# CONFIG_SENSORS_GL518SM is not set
953# CONFIG_SENSORS_GL520SM is not set
954# CONFIG_SENSORS_IT87 is not set
955# CONFIG_SENSORS_LM63 is not set
956# CONFIG_SENSORS_LM75 is not set
957# CONFIG_SENSORS_LM77 is not set
958# CONFIG_SENSORS_LM78 is not set
959# CONFIG_SENSORS_LM80 is not set
960# CONFIG_SENSORS_LM83 is not set
961# CONFIG_SENSORS_LM85 is not set
962# CONFIG_SENSORS_LM87 is not set
963CONFIG_SENSORS_LM90=y
964CONFIG_SENSORS_LM92=y
965# CONFIG_SENSORS_LM93 is not set
966# CONFIG_SENSORS_LTC4245 is not set
967# CONFIG_SENSORS_MAX1619 is not set
968# CONFIG_SENSORS_MAX6650 is not set
969# CONFIG_SENSORS_PC87360 is not set
970# CONFIG_SENSORS_PC87427 is not set
971# CONFIG_SENSORS_SIS5595 is not set
972# CONFIG_SENSORS_DME1737 is not set
973# CONFIG_SENSORS_SMSC47M1 is not set
974# CONFIG_SENSORS_SMSC47M192 is not set
975# CONFIG_SENSORS_SMSC47B397 is not set
976# CONFIG_SENSORS_ADS7828 is not set
977# CONFIG_SENSORS_THMC50 is not set
978# CONFIG_SENSORS_VIA686A is not set
979# CONFIG_SENSORS_VT1211 is not set
980# CONFIG_SENSORS_VT8231 is not set
981# CONFIG_SENSORS_W83781D is not set
982# CONFIG_SENSORS_W83791D is not set
983# CONFIG_SENSORS_W83792D is not set
984# CONFIG_SENSORS_W83793 is not set
985# CONFIG_SENSORS_W83L785TS is not set
986# CONFIG_SENSORS_W83L786NG is not set
987# CONFIG_SENSORS_W83627HF is not set
988# CONFIG_SENSORS_W83627EHF is not set
989# CONFIG_HWMON_DEBUG_CHIP is not set
990# CONFIG_THERMAL is not set
991# CONFIG_THERMAL_HWMON is not set
992CONFIG_WATCHDOG=y
993# CONFIG_WATCHDOG_NOWAYOUT is not set
994
995#
996# Watchdog Device Drivers
997#
998# CONFIG_SOFT_WATCHDOG is not set
999# CONFIG_ALIM7101_WDT is not set
1000CONFIG_GEF_WDT=y
1001# CONFIG_8xxx_WDT is not set
1002
1003#
1004# PCI-based Watchdog Cards
1005#
1006# CONFIG_PCIPCWATCHDOG is not set
1007# CONFIG_WDTPCI is not set
1008
1009#
1010# USB-based Watchdog Cards
1011#
1012# CONFIG_USBPCWATCHDOG is not set
1013CONFIG_SSB_POSSIBLE=y
1014
1015#
1016# Sonics Silicon Backplane
1017#
1018# CONFIG_SSB is not set
1019
1020#
1021# Multifunction device drivers
1022#
1023# CONFIG_MFD_CORE is not set
1024# CONFIG_MFD_SM501 is not set
1025# CONFIG_HTC_PASIC3 is not set
1026# CONFIG_TPS65010 is not set
1027# CONFIG_TWL4030_CORE is not set
1028# CONFIG_MFD_TMIO is not set
1029# CONFIG_PMIC_DA903X is not set
1030# CONFIG_MFD_WM8400 is not set
1031# CONFIG_MFD_WM8350_I2C is not set
1032# CONFIG_MFD_PCF50633 is not set
1033# CONFIG_REGULATOR is not set
1034
1035#
1036# Multimedia devices
1037#
1038
1039#
1040# Multimedia core support
1041#
1042# CONFIG_VIDEO_DEV is not set
1043# CONFIG_DVB_CORE is not set
1044# CONFIG_VIDEO_MEDIA is not set
1045
1046#
1047# Multimedia drivers
1048#
1049CONFIG_DAB=y
1050# CONFIG_USB_DABUSB is not set
1051
1052#
1053# Graphics support
1054#
1055# CONFIG_AGP is not set
1056# CONFIG_DRM is not set
1057# CONFIG_VGASTATE is not set
1058CONFIG_VIDEO_OUTPUT_CONTROL=m
1059# CONFIG_FB is not set
1060# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1061
1062#
1063# Display device support
1064#
1065# CONFIG_DISPLAY_SUPPORT is not set
1066
1067#
1068# Console display driver support
1069#
1070CONFIG_VGA_CONSOLE=y
1071# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1072CONFIG_DUMMY_CONSOLE=y
1073# CONFIG_SOUND is not set
1074CONFIG_HID_SUPPORT=y
1075CONFIG_HID=y
1076# CONFIG_HID_DEBUG is not set
1077# CONFIG_HIDRAW is not set
1078
1079#
1080# USB Input Devices
1081#
1082CONFIG_USB_HID=y
1083# CONFIG_HID_PID is not set
1084# CONFIG_USB_HIDDEV is not set
1085
1086#
1087# Special HID drivers
1088#
1089CONFIG_HID_COMPAT=y
1090CONFIG_HID_A4TECH=y
1091CONFIG_HID_APPLE=y
1092CONFIG_HID_BELKIN=y
1093CONFIG_HID_CHERRY=y
1094CONFIG_HID_CHICONY=y
1095CONFIG_HID_CYPRESS=y
1096CONFIG_HID_EZKEY=y
1097CONFIG_HID_GYRATION=y
1098CONFIG_HID_LOGITECH=y
1099# CONFIG_LOGITECH_FF is not set
1100# CONFIG_LOGIRUMBLEPAD2_FF is not set
1101CONFIG_HID_MICROSOFT=y
1102CONFIG_HID_MONTEREY=y
1103# CONFIG_HID_NTRIG is not set
1104CONFIG_HID_PANTHERLORD=y
1105# CONFIG_PANTHERLORD_FF is not set
1106CONFIG_HID_PETALYNX=y
1107CONFIG_HID_SAMSUNG=y
1108CONFIG_HID_SONY=y
1109CONFIG_HID_SUNPLUS=y
1110# CONFIG_GREENASIA_FF is not set
1111# CONFIG_HID_TOPSEED is not set
1112# CONFIG_THRUSTMASTER_FF is not set
1113# CONFIG_ZEROPLUS_FF is not set
1114CONFIG_USB_SUPPORT=y
1115CONFIG_USB_ARCH_HAS_HCD=y
1116CONFIG_USB_ARCH_HAS_OHCI=y
1117CONFIG_USB_ARCH_HAS_EHCI=y
1118CONFIG_USB=y
1119# CONFIG_USB_DEBUG is not set
1120# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1121
1122#
1123# Miscellaneous USB options
1124#
1125# CONFIG_USB_DEVICEFS is not set
1126# CONFIG_USB_DEVICE_CLASS is not set
1127# CONFIG_USB_DYNAMIC_MINORS is not set
1128# CONFIG_USB_OTG is not set
1129# CONFIG_USB_OTG_WHITELIST is not set
1130# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1131# CONFIG_USB_MON is not set
1132# CONFIG_USB_WUSB is not set
1133# CONFIG_USB_WUSB_CBAF is not set
1134
1135#
1136# USB Host Controller Drivers
1137#
1138# CONFIG_USB_C67X00_HCD is not set
1139CONFIG_USB_EHCI_HCD=y
1140# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1141# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1142# CONFIG_USB_EHCI_FSL is not set
1143# CONFIG_USB_EHCI_HCD_PPC_OF is not set
1144# CONFIG_USB_OXU210HP_HCD is not set
1145# CONFIG_USB_ISP116X_HCD is not set
1146# CONFIG_USB_ISP1760_HCD is not set
1147CONFIG_USB_OHCI_HCD=y
1148# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1149# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1150# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1151CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1152# CONFIG_USB_UHCI_HCD is not set
1153# CONFIG_USB_SL811_HCD is not set
1154# CONFIG_USB_R8A66597_HCD is not set
1155# CONFIG_USB_WHCI_HCD is not set
1156# CONFIG_USB_HWA_HCD is not set
1157
1158#
1159# USB Device Class drivers
1160#
1161# CONFIG_USB_ACM is not set
1162# CONFIG_USB_PRINTER is not set
1163# CONFIG_USB_WDM is not set
1164# CONFIG_USB_TMC is not set
1165
1166#
1167# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1168#
1169
1170#
1171# see USB_STORAGE Help for more information
1172#
1173CONFIG_USB_STORAGE=y
1174# CONFIG_USB_STORAGE_DEBUG is not set
1175# CONFIG_USB_STORAGE_DATAFAB is not set
1176# CONFIG_USB_STORAGE_FREECOM is not set
1177# CONFIG_USB_STORAGE_ISD200 is not set
1178# CONFIG_USB_STORAGE_USBAT is not set
1179# CONFIG_USB_STORAGE_SDDR09 is not set
1180# CONFIG_USB_STORAGE_SDDR55 is not set
1181# CONFIG_USB_STORAGE_JUMPSHOT is not set
1182# CONFIG_USB_STORAGE_ALAUDA is not set
1183# CONFIG_USB_STORAGE_ONETOUCH is not set
1184# CONFIG_USB_STORAGE_KARMA is not set
1185# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1186# CONFIG_USB_LIBUSUAL is not set
1187
1188#
1189# USB Imaging devices
1190#
1191# CONFIG_USB_MDC800 is not set
1192# CONFIG_USB_MICROTEK is not set
1193
1194#
1195# USB port drivers
1196#
1197# CONFIG_USB_SERIAL is not set
1198
1199#
1200# USB Miscellaneous drivers
1201#
1202# CONFIG_USB_EMI62 is not set
1203# CONFIG_USB_EMI26 is not set
1204# CONFIG_USB_ADUTUX is not set
1205# CONFIG_USB_SEVSEG is not set
1206# CONFIG_USB_RIO500 is not set
1207# CONFIG_USB_LEGOTOWER is not set
1208# CONFIG_USB_LCD is not set
1209# CONFIG_USB_BERRY_CHARGE is not set
1210# CONFIG_USB_LED is not set
1211# CONFIG_USB_CYPRESS_CY7C63 is not set
1212# CONFIG_USB_CYTHERM is not set
1213# CONFIG_USB_PHIDGET is not set
1214# CONFIG_USB_IDMOUSE is not set
1215# CONFIG_USB_FTDI_ELAN is not set
1216# CONFIG_USB_APPLEDISPLAY is not set
1217# CONFIG_USB_SISUSBVGA is not set
1218# CONFIG_USB_LD is not set
1219# CONFIG_USB_TRANCEVIBRATOR is not set
1220# CONFIG_USB_IOWARRIOR is not set
1221# CONFIG_USB_ISIGHTFW is not set
1222# CONFIG_USB_VST is not set
1223# CONFIG_USB_GADGET is not set
1224
1225#
1226# OTG and related infrastructure
1227#
1228# CONFIG_USB_GPIO_VBUS is not set
1229# CONFIG_UWB is not set
1230# CONFIG_MMC is not set
1231# CONFIG_MEMSTICK is not set
1232# CONFIG_NEW_LEDS is not set
1233# CONFIG_ACCESSIBILITY is not set
1234# CONFIG_INFINIBAND is not set
1235# CONFIG_EDAC is not set
1236CONFIG_RTC_LIB=y
1237CONFIG_RTC_CLASS=y
1238CONFIG_RTC_HCTOSYS=y
1239CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1240# CONFIG_RTC_DEBUG is not set
1241
1242#
1243# RTC interfaces
1244#
1245CONFIG_RTC_INTF_SYSFS=y
1246# CONFIG_RTC_INTF_PROC is not set
1247CONFIG_RTC_INTF_DEV=y
1248# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1249# CONFIG_RTC_DRV_TEST is not set
1250
1251#
1252# I2C RTC drivers
1253#
1254# CONFIG_RTC_DRV_DS1307 is not set
1255# CONFIG_RTC_DRV_DS1374 is not set
1256# CONFIG_RTC_DRV_DS1672 is not set
1257# CONFIG_RTC_DRV_MAX6900 is not set
1258# CONFIG_RTC_DRV_RS5C372 is not set
1259# CONFIG_RTC_DRV_ISL1208 is not set
1260# CONFIG_RTC_DRV_X1205 is not set
1261# CONFIG_RTC_DRV_PCF8563 is not set
1262# CONFIG_RTC_DRV_PCF8583 is not set
1263# CONFIG_RTC_DRV_M41T80 is not set
1264# CONFIG_RTC_DRV_S35390A is not set
1265# CONFIG_RTC_DRV_FM3130 is not set
1266CONFIG_RTC_DRV_RX8581=y
1267
1268#
1269# SPI RTC drivers
1270#
1271
1272#
1273# Platform RTC drivers
1274#
1275# CONFIG_RTC_DRV_CMOS is not set
1276# CONFIG_RTC_DRV_DS1286 is not set
1277# CONFIG_RTC_DRV_DS1511 is not set
1278# CONFIG_RTC_DRV_DS1553 is not set
1279# CONFIG_RTC_DRV_DS1742 is not set
1280# CONFIG_RTC_DRV_STK17TA8 is not set
1281# CONFIG_RTC_DRV_M48T86 is not set
1282# CONFIG_RTC_DRV_M48T35 is not set
1283# CONFIG_RTC_DRV_M48T59 is not set
1284# CONFIG_RTC_DRV_BQ4802 is not set
1285# CONFIG_RTC_DRV_V3020 is not set
1286
1287#
1288# on-CPU RTC drivers
1289#
1290# CONFIG_RTC_DRV_PPC is not set
1291# CONFIG_DMADEVICES is not set
1292# CONFIG_UIO is not set
1293# CONFIG_STAGING is not set
1294
1295#
1296# File systems
1297#
1298CONFIG_EXT2_FS=y
1299CONFIG_EXT2_FS_XATTR=y
1300CONFIG_EXT2_FS_POSIX_ACL=y
1301# CONFIG_EXT2_FS_SECURITY is not set
1302# CONFIG_EXT2_FS_XIP is not set
1303CONFIG_EXT3_FS=y
1304CONFIG_EXT3_FS_XATTR=y
1305CONFIG_EXT3_FS_POSIX_ACL=y
1306# CONFIG_EXT3_FS_SECURITY is not set
1307# CONFIG_EXT4_FS is not set
1308CONFIG_JBD=y
1309CONFIG_FS_MBCACHE=y
1310# CONFIG_REISERFS_FS is not set
1311# CONFIG_JFS_FS is not set
1312CONFIG_FS_POSIX_ACL=y
1313CONFIG_FILE_LOCKING=y
1314# CONFIG_XFS_FS is not set
1315# CONFIG_OCFS2_FS is not set
1316# CONFIG_BTRFS_FS is not set
1317CONFIG_DNOTIFY=y
1318CONFIG_INOTIFY=y
1319CONFIG_INOTIFY_USER=y
1320# CONFIG_QUOTA is not set
1321# CONFIG_AUTOFS_FS is not set
1322# CONFIG_AUTOFS4_FS is not set
1323# CONFIG_FUSE_FS is not set
1324
1325#
1326# CD-ROM/DVD Filesystems
1327#
1328CONFIG_ISO9660_FS=y
1329CONFIG_JOLIET=y
1330CONFIG_ZISOFS=y
1331CONFIG_UDF_FS=y
1332CONFIG_UDF_NLS=y
1333
1334#
1335# DOS/FAT/NT Filesystems
1336#
1337CONFIG_FAT_FS=y
1338CONFIG_MSDOS_FS=y
1339CONFIG_VFAT_FS=y
1340CONFIG_FAT_DEFAULT_CODEPAGE=850
1341CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
1342# CONFIG_NTFS_FS is not set
1343
1344#
1345# Pseudo filesystems
1346#
1347CONFIG_PROC_FS=y
1348CONFIG_PROC_KCORE=y
1349CONFIG_PROC_SYSCTL=y
1350CONFIG_PROC_PAGE_MONITOR=y
1351CONFIG_SYSFS=y
1352CONFIG_TMPFS=y
1353# CONFIG_TMPFS_POSIX_ACL is not set
1354# CONFIG_HUGETLB_PAGE is not set
1355# CONFIG_CONFIGFS_FS is not set
1356CONFIG_MISC_FILESYSTEMS=y
1357# CONFIG_ADFS_FS is not set
1358# CONFIG_AFFS_FS is not set
1359# CONFIG_HFS_FS is not set
1360# CONFIG_HFSPLUS_FS is not set
1361# CONFIG_BEFS_FS is not set
1362# CONFIG_BFS_FS is not set
1363# CONFIG_EFS_FS is not set
1364CONFIG_JFFS2_FS=y
1365CONFIG_JFFS2_FS_DEBUG=0
1366CONFIG_JFFS2_FS_WRITEBUFFER=y
1367# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1368# CONFIG_JFFS2_SUMMARY is not set
1369# CONFIG_JFFS2_FS_XATTR is not set
1370# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1371CONFIG_JFFS2_ZLIB=y
1372# CONFIG_JFFS2_LZO is not set
1373CONFIG_JFFS2_RTIME=y
1374# CONFIG_JFFS2_RUBIN is not set
1375# CONFIG_CRAMFS is not set
1376# CONFIG_SQUASHFS is not set
1377# CONFIG_VXFS_FS is not set
1378# CONFIG_MINIX_FS is not set
1379# CONFIG_OMFS_FS is not set
1380# CONFIG_HPFS_FS is not set
1381# CONFIG_QNX4FS_FS is not set
1382# CONFIG_ROMFS_FS is not set
1383# CONFIG_SYSV_FS is not set
1384# CONFIG_UFS_FS is not set
1385CONFIG_NETWORK_FILESYSTEMS=y
1386CONFIG_NFS_FS=y
1387CONFIG_NFS_V3=y
1388# CONFIG_NFS_V3_ACL is not set
1389CONFIG_NFS_V4=y
1390CONFIG_ROOT_NFS=y
1391# CONFIG_NFSD is not set
1392CONFIG_LOCKD=y
1393CONFIG_LOCKD_V4=y
1394CONFIG_NFS_COMMON=y
1395CONFIG_SUNRPC=y
1396CONFIG_SUNRPC_GSS=y
1397# CONFIG_SUNRPC_REGISTER_V4 is not set
1398CONFIG_RPCSEC_GSS_KRB5=y
1399# CONFIG_RPCSEC_GSS_SPKM3 is not set
1400# CONFIG_SMB_FS is not set
1401CONFIG_CIFS=m
1402# CONFIG_CIFS_STATS is not set
1403# CONFIG_CIFS_WEAK_PW_HASH is not set
1404CONFIG_CIFS_XATTR=y
1405CONFIG_CIFS_POSIX=y
1406# CONFIG_CIFS_DEBUG2 is not set
1407# CONFIG_CIFS_EXPERIMENTAL is not set
1408# CONFIG_NCP_FS is not set
1409# CONFIG_CODA_FS is not set
1410# CONFIG_AFS_FS is not set
1411
1412#
1413# Partition Types
1414#
1415# CONFIG_PARTITION_ADVANCED is not set
1416CONFIG_MSDOS_PARTITION=y
1417CONFIG_NLS=y
1418CONFIG_NLS_DEFAULT="iso8859-1"
1419CONFIG_NLS_CODEPAGE_437=m
1420CONFIG_NLS_CODEPAGE_737=m
1421CONFIG_NLS_CODEPAGE_775=m
1422CONFIG_NLS_CODEPAGE_850=m
1423CONFIG_NLS_CODEPAGE_852=m
1424CONFIG_NLS_CODEPAGE_855=m
1425CONFIG_NLS_CODEPAGE_857=m
1426CONFIG_NLS_CODEPAGE_860=m
1427CONFIG_NLS_CODEPAGE_861=m
1428CONFIG_NLS_CODEPAGE_862=m
1429CONFIG_NLS_CODEPAGE_863=m
1430CONFIG_NLS_CODEPAGE_864=m
1431CONFIG_NLS_CODEPAGE_865=m
1432CONFIG_NLS_CODEPAGE_866=m
1433CONFIG_NLS_CODEPAGE_869=m
1434CONFIG_NLS_CODEPAGE_936=m
1435CONFIG_NLS_CODEPAGE_950=m
1436CONFIG_NLS_CODEPAGE_932=m
1437CONFIG_NLS_CODEPAGE_949=m
1438CONFIG_NLS_CODEPAGE_874=m
1439CONFIG_NLS_ISO8859_8=m
1440CONFIG_NLS_CODEPAGE_1250=m
1441CONFIG_NLS_CODEPAGE_1251=m
1442CONFIG_NLS_ASCII=m
1443CONFIG_NLS_ISO8859_1=m
1444CONFIG_NLS_ISO8859_2=m
1445CONFIG_NLS_ISO8859_3=m
1446CONFIG_NLS_ISO8859_4=m
1447CONFIG_NLS_ISO8859_5=m
1448CONFIG_NLS_ISO8859_6=m
1449CONFIG_NLS_ISO8859_7=m
1450CONFIG_NLS_ISO8859_9=m
1451CONFIG_NLS_ISO8859_13=m
1452CONFIG_NLS_ISO8859_14=m
1453CONFIG_NLS_ISO8859_15=m
1454CONFIG_NLS_KOI8_R=m
1455CONFIG_NLS_KOI8_U=m
1456CONFIG_NLS_UTF8=m
1457# CONFIG_DLM is not set
1458
1459#
1460# Library routines
1461#
1462CONFIG_BITREVERSE=y
1463CONFIG_GENERIC_FIND_LAST_BIT=y
1464CONFIG_CRC_CCITT=y
1465# CONFIG_CRC16 is not set
1466CONFIG_CRC_T10DIF=y
1467CONFIG_CRC_ITU_T=y
1468CONFIG_CRC32=y
1469# CONFIG_CRC7 is not set
1470CONFIG_LIBCRC32C=y
1471CONFIG_ZLIB_INFLATE=y
1472CONFIG_ZLIB_DEFLATE=y
1473CONFIG_PLIST=y
1474CONFIG_HAS_IOMEM=y
1475CONFIG_HAS_IOPORT=y
1476CONFIG_HAS_DMA=y
1477CONFIG_HAVE_LMB=y
1478
1479#
1480# Kernel hacking
1481#
1482# CONFIG_PRINTK_TIME is not set
1483CONFIG_ENABLE_WARN_DEPRECATED=y
1484CONFIG_ENABLE_MUST_CHECK=y
1485CONFIG_FRAME_WARN=1024
1486CONFIG_MAGIC_SYSRQ=y
1487# CONFIG_UNUSED_SYMBOLS is not set
1488# CONFIG_DEBUG_FS is not set
1489# CONFIG_HEADERS_CHECK is not set
1490# CONFIG_DEBUG_KERNEL is not set
1491# CONFIG_DEBUG_BUGVERBOSE is not set
1492# CONFIG_DEBUG_MEMORY_INIT is not set
1493# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1494# CONFIG_LATENCYTOP is not set
1495CONFIG_SYSCTL_SYSCALL_CHECK=y
1496CONFIG_HAVE_FUNCTION_TRACER=y
1497CONFIG_HAVE_DYNAMIC_FTRACE=y
1498CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1499
1500#
1501# Tracers
1502#
1503# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1504# CONFIG_SAMPLES is not set
1505CONFIG_HAVE_ARCH_KGDB=y
1506CONFIG_PRINT_STACK_DEPTH=64
1507# CONFIG_IRQSTACKS is not set
1508# CONFIG_BOOTX_TEXT is not set
1509# CONFIG_PPC_EARLY_DEBUG is not set
1510
1511#
1512# Security options
1513#
1514# CONFIG_KEYS is not set
1515# CONFIG_SECURITY is not set
1516# CONFIG_SECURITYFS is not set
1517# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1518CONFIG_CRYPTO=y
1519
1520#
1521# Crypto core or helper
1522#
1523# CONFIG_CRYPTO_FIPS is not set
1524CONFIG_CRYPTO_ALGAPI=y
1525CONFIG_CRYPTO_ALGAPI2=y
1526CONFIG_CRYPTO_AEAD=m
1527CONFIG_CRYPTO_AEAD2=y
1528CONFIG_CRYPTO_BLKCIPHER=y
1529CONFIG_CRYPTO_BLKCIPHER2=y
1530CONFIG_CRYPTO_HASH=y
1531CONFIG_CRYPTO_HASH2=y
1532CONFIG_CRYPTO_RNG2=y
1533CONFIG_CRYPTO_MANAGER=y
1534CONFIG_CRYPTO_MANAGER2=y
1535# CONFIG_CRYPTO_GF128MUL is not set
1536# CONFIG_CRYPTO_NULL is not set
1537# CONFIG_CRYPTO_CRYPTD is not set
1538CONFIG_CRYPTO_AUTHENC=m
1539# CONFIG_CRYPTO_TEST is not set
1540
1541#
1542# Authenticated Encryption with Associated Data
1543#
1544# CONFIG_CRYPTO_CCM is not set
1545# CONFIG_CRYPTO_GCM is not set
1546# CONFIG_CRYPTO_SEQIV is not set
1547
1548#
1549# Block modes
1550#
1551CONFIG_CRYPTO_CBC=y
1552# CONFIG_CRYPTO_CTR is not set
1553# CONFIG_CRYPTO_CTS is not set
1554# CONFIG_CRYPTO_ECB is not set
1555# CONFIG_CRYPTO_LRW is not set
1556# CONFIG_CRYPTO_PCBC is not set
1557# CONFIG_CRYPTO_XTS is not set
1558
1559#
1560# Hash modes
1561#
1562CONFIG_CRYPTO_HMAC=m
1563# CONFIG_CRYPTO_XCBC is not set
1564
1565#
1566# Digest
1567#
1568CONFIG_CRYPTO_CRC32C=y
1569# CONFIG_CRYPTO_MD4 is not set
1570CONFIG_CRYPTO_MD5=y
1571# CONFIG_CRYPTO_MICHAEL_MIC is not set
1572# CONFIG_CRYPTO_RMD128 is not set
1573# CONFIG_CRYPTO_RMD160 is not set
1574# CONFIG_CRYPTO_RMD256 is not set
1575# CONFIG_CRYPTO_RMD320 is not set
1576CONFIG_CRYPTO_SHA1=m
1577# CONFIG_CRYPTO_SHA256 is not set
1578# CONFIG_CRYPTO_SHA512 is not set
1579# CONFIG_CRYPTO_TGR192 is not set
1580# CONFIG_CRYPTO_WP512 is not set
1581
1582#
1583# Ciphers
1584#
1585# CONFIG_CRYPTO_AES is not set
1586# CONFIG_CRYPTO_ANUBIS is not set
1587# CONFIG_CRYPTO_ARC4 is not set
1588# CONFIG_CRYPTO_BLOWFISH is not set
1589# CONFIG_CRYPTO_CAMELLIA is not set
1590# CONFIG_CRYPTO_CAST5 is not set
1591# CONFIG_CRYPTO_CAST6 is not set
1592CONFIG_CRYPTO_DES=y
1593# CONFIG_CRYPTO_FCRYPT is not set
1594# CONFIG_CRYPTO_KHAZAD is not set
1595# CONFIG_CRYPTO_SALSA20 is not set
1596# CONFIG_CRYPTO_SEED is not set
1597# CONFIG_CRYPTO_SERPENT is not set
1598# CONFIG_CRYPTO_TEA is not set
1599# CONFIG_CRYPTO_TWOFISH is not set
1600
1601#
1602# Compression
1603#
1604CONFIG_CRYPTO_DEFLATE=m
1605# CONFIG_CRYPTO_LZO is not set
1606
1607#
1608# Random Number Generation
1609#
1610# CONFIG_CRYPTO_ANSI_CPRNG is not set
1611# CONFIG_CRYPTO_HW is not set
1612# CONFIG_PPC_CLOCK is not set
1613# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 67453766bff1..597debe780bd 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -110,6 +110,7 @@
110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ 110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ 111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
112#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ 112#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */
113#define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */
113#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ 114#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
114#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ 115#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
115#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ 116#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 8d1a419df35d..d15992119085 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
61obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o 61obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
62obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o 62obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
63obj-$(CONFIG_44x) += cpu_setup_44x.o 63obj-$(CONFIG_44x) += cpu_setup_44x.o
64obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o
64 65
65extra-$(CONFIG_PPC_STD_MMU) := head_32.o 66extra-$(CONFIG_PPC_STD_MMU) := head_32.o
66extra-$(CONFIG_PPC64) := head_64.o 67extra-$(CONFIG_PPC64) := head_64.o
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
new file mode 100644
index 000000000000..eb4b9adcedb4
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -0,0 +1,31 @@
1/*
2 * This file contains low level CPU setup functions.
3 * Kumar Gala <galak@kernel.crashing.org>
4 * Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Based on cpu_setup_6xx code by
7 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 *
14 */
15
16#include <asm/processor.h>
17#include <asm/cputable.h>
18#include <asm/ppc_asm.h>
19
20_GLOBAL(__setup_cpu_e200)
21 /* enable dedicated debug exception handling resources (Debug APU) */
22 mfspr r3,SPRN_HID0
23 ori r3,r3,HID0_DAPUEN@l
24 mtspr SPRN_HID0,r3
25 b __setup_e200_ivors
26_GLOBAL(__setup_cpu_e500v1)
27_GLOBAL(__setup_cpu_e500v2)
28 b __setup_e500_ivors
29_GLOBAL(__setup_cpu_e500mc)
30 b __setup_e500mc_ivors
31
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 923f87aff20a..9fdf1b8027b5 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -35,6 +35,10 @@ const char *powerpc_base_platform;
35 * and ppc64 35 * and ppc64
36 */ 36 */
37#ifdef CONFIG_PPC32 37#ifdef CONFIG_PPC32
38extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 44extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
@@ -1687,6 +1691,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1687 PPC_FEATURE_UNIFIED_CACHE, 1691 PPC_FEATURE_UNIFIED_CACHE,
1688 .mmu_features = MMU_FTR_TYPE_FSL_E, 1692 .mmu_features = MMU_FTR_TYPE_FSL_E,
1689 .dcache_bsize = 32, 1693 .dcache_bsize = 32,
1694 .cpu_setup = __setup_cpu_e200,
1690 .machine_check = machine_check_e200, 1695 .machine_check = machine_check_e200,
1691 .platform = "ppc5554", 1696 .platform = "ppc5554",
1692 } 1697 }
@@ -1706,6 +1711,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1706 .num_pmcs = 4, 1711 .num_pmcs = 4,
1707 .oprofile_cpu_type = "ppc/e500", 1712 .oprofile_cpu_type = "ppc/e500",
1708 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1713 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1714 .cpu_setup = __setup_cpu_e500v1,
1709 .machine_check = machine_check_e500, 1715 .machine_check = machine_check_e500,
1710 .platform = "ppc8540", 1716 .platform = "ppc8540",
1711 }, 1717 },
@@ -1724,6 +1730,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1724 .num_pmcs = 4, 1730 .num_pmcs = 4,
1725 .oprofile_cpu_type = "ppc/e500", 1731 .oprofile_cpu_type = "ppc/e500",
1726 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1732 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1733 .cpu_setup = __setup_cpu_e500v2,
1727 .machine_check = machine_check_e500, 1734 .machine_check = machine_check_e500,
1728 .platform = "ppc8548", 1735 .platform = "ppc8548",
1729 }, 1736 },
@@ -1739,6 +1746,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1739 .num_pmcs = 4, 1746 .num_pmcs = 4,
1740 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1747 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1741 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1748 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1749 .cpu_setup = __setup_cpu_e500mc,
1742 .machine_check = machine_check_e500, 1750 .machine_check = machine_check_e500,
1743 .platform = "ppce500mc", 1751 .platform = "ppce500mc",
1744 }, 1752 },
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index fce2df988504..bec18078239d 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -70,10 +70,10 @@
70 70
71/* only on e500mc/e200 */ 71/* only on e500mc/e200 */
72#define DEBUG_STACK_BASE dbgirq_ctx 72#define DEBUG_STACK_BASE dbgirq_ctx
73#ifdef CONFIG_PPC_E500MC 73#ifdef CONFIG_E200
74#define DEBUG_SPRG SPRN_SPRG9
75#else
76#define DEBUG_SPRG SPRN_SPRG6W 74#define DEBUG_SPRG SPRN_SPRG6W
75#else
76#define DEBUG_SPRG SPRN_SPRG9
77#endif 77#endif
78 78
79#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) 79#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 36ffb3504a4f..64ecb1603a77 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -103,10 +103,15 @@ invstr: mflr r6 /* Make it accessible */
103 or r7,r7,r4 103 or r7,r7,r4
104 mtspr SPRN_MAS6,r7 104 mtspr SPRN_MAS6,r7
105 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ 105 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
106#ifndef CONFIG_E200
107 mfspr r7,SPRN_MAS1 106 mfspr r7,SPRN_MAS1
108 andis. r7,r7,MAS1_VALID@h 107 andis. r7,r7,MAS1_VALID@h
109 bne match_TLB 108 bne match_TLB
109
110 mfspr r7,SPRN_MMUCFG
111 rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */
112 cmpwi r7,3
113 bne match_TLB /* skip if NPIDS != 3 */
114
110 mfspr r7,SPRN_PID1 115 mfspr r7,SPRN_PID1
111 slwi r7,r7,16 116 slwi r7,r7,16
112 or r7,r7,r4 117 or r7,r7,r4
@@ -120,7 +125,7 @@ invstr: mflr r6 /* Make it accessible */
120 or r7,r7,r4 125 or r7,r7,r4
121 mtspr SPRN_MAS6,r7 126 mtspr SPRN_MAS6,r7
122 tlbsx 0,r6 /* Fall through, we had to match */ 127 tlbsx 0,r6 /* Fall through, we had to match */
123#endif 128
124match_TLB: 129match_TLB:
125 mfspr r7,SPRN_MAS0 130 mfspr r7,SPRN_MAS0
126 rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ 131 rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
@@ -215,14 +220,19 @@ skpinv: addi r6,r6,1 /* Increment */
215 220
216/* 4. Clear out PIDs & Search info */ 221/* 4. Clear out PIDs & Search info */
217 li r6,0 222 li r6,0
223 mtspr SPRN_MAS6,r6
218 mtspr SPRN_PID0,r6 224 mtspr SPRN_PID0,r6
219#ifndef CONFIG_E200 225
226 mfspr r7,SPRN_MMUCFG
227 rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */
228 cmpwi r7,3
229 bne 2f /* skip if NPIDS != 3 */
230
220 mtspr SPRN_PID1,r6 231 mtspr SPRN_PID1,r6
221 mtspr SPRN_PID2,r6 232 mtspr SPRN_PID2,r6
222#endif
223 mtspr SPRN_MAS6,r6
224 233
225/* 5. Invalidate mapping we started in */ 234/* 5. Invalidate mapping we started in */
2352:
226 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ 236 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
227 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ 237 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
228 mtspr SPRN_MAS0,r7 238 mtspr SPRN_MAS0,r7
@@ -298,19 +308,7 @@ skpinv: addi r6,r6,1 /* Increment */
298 SET_IVOR(12, WatchdogTimer); 308 SET_IVOR(12, WatchdogTimer);
299 SET_IVOR(13, DataTLBError); 309 SET_IVOR(13, DataTLBError);
300 SET_IVOR(14, InstructionTLBError); 310 SET_IVOR(14, InstructionTLBError);
301 SET_IVOR(15, DebugDebug);
302#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
303 SET_IVOR(15, DebugCrit); 311 SET_IVOR(15, DebugCrit);
304#endif
305 SET_IVOR(32, SPEUnavailable);
306 SET_IVOR(33, SPEFloatingPointData);
307 SET_IVOR(34, SPEFloatingPointRound);
308#ifndef CONFIG_E200
309 SET_IVOR(35, PerformanceMonitor);
310#endif
311#ifdef CONFIG_PPC_E500MC
312 SET_IVOR(36, Doorbell);
313#endif
314 312
315 /* Establish the interrupt vector base */ 313 /* Establish the interrupt vector base */
316 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 314 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
@@ -329,12 +327,6 @@ skpinv: addi r6,r6,1 /* Increment */
329 oris r2,r2,HID0_DOZE@h 327 oris r2,r2,HID0_DOZE@h
330 mtspr SPRN_HID0, r2 328 mtspr SPRN_HID0, r2
331#endif 329#endif
332#ifdef CONFIG_E200
333 /* enable dedicated debug exception handling resources (Debug APU) */
334 mfspr r2,SPRN_HID0
335 ori r2,r2,HID0_DAPUEN@l
336 mtspr SPRN_HID0,r2
337#endif
338 330
339#if !defined(CONFIG_BDI_SWITCH) 331#if !defined(CONFIG_BDI_SWITCH)
340 /* 332 /*
@@ -706,15 +698,11 @@ interrupt_base:
706 /* Performance Monitor */ 698 /* Performance Monitor */
707 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) 699 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
708 700
709#ifdef CONFIG_PPC_E500MC
710 EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD) 701 EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD)
711#endif
712 702
713 /* Debug Interrupt */ 703 /* Debug Interrupt */
714 DEBUG_DEBUG_EXCEPTION 704 DEBUG_DEBUG_EXCEPTION
715#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
716 DEBUG_CRIT_EXCEPTION 705 DEBUG_CRIT_EXCEPTION
717#endif
718 706
719/* 707/*
720 * Local functions 708 * Local functions
@@ -897,6 +885,45 @@ KernelSPE:
897 * Global functions 885 * Global functions
898 */ 886 */
899 887
888/* Adjust or setup IVORs for e200 */
889_GLOBAL(__setup_e200_ivors)
890 li r3,DebugDebug@l
891 mtspr SPRN_IVOR15,r3
892 li r3,SPEUnavailable@l
893 mtspr SPRN_IVOR32,r3
894 li r3,SPEFloatingPointData@l
895 mtspr SPRN_IVOR33,r3
896 li r3,SPEFloatingPointRound@l
897 mtspr SPRN_IVOR34,r3
898 sync
899 blr
900
901/* Adjust or setup IVORs for e500v1/v2 */
902_GLOBAL(__setup_e500_ivors)
903 li r3,DebugCrit@l
904 mtspr SPRN_IVOR15,r3
905 li r3,SPEUnavailable@l
906 mtspr SPRN_IVOR32,r3
907 li r3,SPEFloatingPointData@l
908 mtspr SPRN_IVOR33,r3
909 li r3,SPEFloatingPointRound@l
910 mtspr SPRN_IVOR34,r3
911 li r3,PerformanceMonitor@l
912 mtspr SPRN_IVOR35,r3
913 sync
914 blr
915
916/* Adjust or setup IVORs for e500mc */
917_GLOBAL(__setup_e500mc_ivors)
918 li r3,DebugDebug@l
919 mtspr SPRN_IVOR15,r3
920 li r3,PerformanceMonitor@l
921 mtspr SPRN_IVOR35,r3
922 li r3,Doorbell@l
923 mtspr SPRN_IVOR36,r3
924 sync
925 blr
926
900/* 927/*
901 * extern void loadcam_entry(unsigned int index) 928 * extern void loadcam_entry(unsigned int index)
902 * 929 *
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index ea6e41e39d9f..3d8cf01582f5 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -56,10 +56,14 @@
56 56
57extern void loadcam_entry(unsigned int index); 57extern void loadcam_entry(unsigned int index);
58unsigned int tlbcam_index; 58unsigned int tlbcam_index;
59static unsigned long __cam0, __cam1, __cam2; 59static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];
60 60
61#define NUM_TLBCAMS (16) 61#define NUM_TLBCAMS (16)
62 62
63#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
64#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
65#endif
66
63struct tlbcam TLBCAM[NUM_TLBCAMS]; 67struct tlbcam TLBCAM[NUM_TLBCAMS];
64 68
65struct tlbcamrange { 69struct tlbcamrange {
@@ -152,19 +156,19 @@ void invalidate_tlbcam_entry(int index)
152 loadcam_entry(index); 156 loadcam_entry(index);
153} 157}
154 158
155void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, 159unsigned long __init mmu_mapin_ram(void)
156 unsigned long cam2)
157{ 160{
158 settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0); 161 unsigned long virt = PAGE_OFFSET;
159 tlbcam_index++; 162 phys_addr_t phys = memstart_addr;
160 if (cam1) { 163
161 tlbcam_index++; 164 while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
162 settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0); 165 settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
163 } 166 virt += cam[tlbcam_index];
164 if (cam2) { 167 phys += cam[tlbcam_index];
165 tlbcam_index++; 168 tlbcam_index++;
166 settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
167 } 169 }
170
171 return virt - PAGE_OFFSET;
168} 172}
169 173
170/* 174/*
@@ -175,51 +179,46 @@ void __init MMU_init_hw(void)
175 flush_instruction_cache(); 179 flush_instruction_cache();
176} 180}
177 181
178unsigned long __init mmu_mapin_ram(void)
179{
180 cam_mapin_ram(__cam0, __cam1, __cam2);
181
182 return __cam0 + __cam1 + __cam2;
183}
184
185
186void __init 182void __init
187adjust_total_lowmem(void) 183adjust_total_lowmem(void)
188{ 184{
189 phys_addr_t max_lowmem_size = __max_low_memory;
190 phys_addr_t cam_max_size = 0x10000000;
191 phys_addr_t ram; 185 phys_addr_t ram;
186 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
187 char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
188 int i;
189 unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
190 unsigned long phys = memstart_addr & 0xffffffffUL;
192 191
193 /* adjust CAM size to max_lowmem_size */ 192 /* Convert (4^max) kB to (2^max) bytes */
194 if (max_lowmem_size < cam_max_size) 193 max_cam = max_cam * 2 + 10;
195 cam_max_size = max_lowmem_size;
196 194
197 /* adjust lowmem size to max_lowmem_size */ 195 /* adjust lowmem size to __max_low_memory */
198 ram = min(max_lowmem_size, total_lowmem); 196 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
199 197
200 /* Calculate CAM values */ 198 /* Calculate CAM values */
201 __cam0 = 1UL << 2 * (__ilog2(ram) / 2); 199 __max_low_memory = 0;
202 if (__cam0 > cam_max_size) 200 for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
203 __cam0 = cam_max_size; 201 unsigned int camsize = __ilog2(ram) & ~1U;
204 ram -= __cam0; 202 unsigned int align = __ffs(virt | phys) & ~1U;
205 if (ram) { 203
206 __cam1 = 1UL << 2 * (__ilog2(ram) / 2); 204 if (camsize > align)
207 if (__cam1 > cam_max_size) 205 camsize = align;
208 __cam1 = cam_max_size; 206 if (camsize > max_cam)
209 ram -= __cam1; 207 camsize = max_cam;
210 } 208
211 if (ram) { 209 cam[i] = 1UL << camsize;
212 __cam2 = 1UL << 2 * (__ilog2(ram) / 2); 210 ram -= cam[i];
213 if (__cam2 > cam_max_size) 211 __max_low_memory += cam[i];
214 __cam2 = cam_max_size; 212 virt += cam[i];
215 ram -= __cam2; 213 phys += cam[i];
214
215 p += sprintf(p, "%lu/", cam[i] >> 20);
216 } 216 }
217 for (; i < ARRAY_SIZE(cam); i++)
218 p += sprintf(p, "0/");
219 p[-1] = '\0';
217 220
218 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb," 221 pr_info("Memory CAM mapping: %s Mb, residual: %ldMb\n", buf,
219 " CAM2=%ldMb residual: %ldMb\n", 222 (total_lowmem - __max_low_memory) >> 20);
220 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
221 (long int)((total_lowmem - __cam0 - __cam1 - __cam2)
222 >> 20));
223 __max_low_memory = __cam0 + __cam1 + __cam2;
224 __initial_memory_limit_addr = memstart_addr + __max_low_memory; 223 __initial_memory_limit_addr = memstart_addr + __max_low_memory;
225} 224}
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 91a2c80b9d72..0b4f883b20eb 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc831x_usb_cfg(); 44 mpc831x_usb_cfg();
43} 45}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 530ef990ca7c..634785cc4523 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void)
84 ppc_md.progress("mpc837x_mds_setup_arch()", 0); 84 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
85 85
86#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") { 87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
88 if (!of_device_is_available(np)) { 88 mpc83xx_add_bridge(np);
89 pr_warning("%s: disabled by the firmware.\n", 89 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
90 np->full_name);
91 continue;
92 }
93 mpc83xx_add_bridge(np); 90 mpc83xx_add_bridge(np);
94 }
95#endif 91#endif
96 mpc837xmds_usb_cfg(); 92 mpc837xmds_usb_cfg();
97} 93}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 1d096545322b..3d7b953d40e1 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc837x_usb_cfg(); 44 mpc837x_usb_cfg();
43} 45}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 8e5693935975..fa276c689cf9 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -31,6 +31,14 @@ config MPC8610_HPCD
31 help 31 help
32 This option enables support for the MPC8610 HPCD board. 32 This option enables support for the MPC8610 HPCD board.
33 33
34config GEF_SBC310
35 bool "GE Fanuc SBC310"
36 select DEFAULT_UIMAGE
37 select GENERIC_GPIO
38 select ARCH_REQUIRE_GPIOLIB
39 help
40 This option enables support for GE Fanuc's SBC310.
41
34config GEF_SBC610 42config GEF_SBC610
35 bool "GE Fanuc SBC610" 43 bool "GE Fanuc SBC610"
36 select DEFAULT_UIMAGE 44 select DEFAULT_UIMAGE
@@ -48,7 +56,7 @@ config MPC8641
48 select FSL_PCI if PCI 56 select FSL_PCI if PCI
49 select PPC_UDBG_16550 57 select PPC_UDBG_16550
50 select MPIC 58 select MPIC
51 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 59 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310
52 60
53config MPC8610 61config MPC8610
54 bool 62 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 31e540c2ebbc..7c080da4523a 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_SBC8641D) += sbc8641d.o
9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o 9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o 10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) 11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index 85b2800f4cb7..b2ea8875adba 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -37,8 +37,6 @@
37#define GEF_GPIO_OVERRUN 0x1C 37#define GEF_GPIO_OVERRUN 0x1C
38#define GEF_GPIO_MODE 0x20 38#define GEF_GPIO_MODE 0x20
39 39
40#define NUM_GPIO 19
41
42static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value) 40static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
43{ 41{
44 unsigned int data; 42 unsigned int data;
@@ -103,10 +101,10 @@ static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
103static int __init gef_gpio_init(void) 101static int __init gef_gpio_init(void)
104{ 102{
105 struct device_node *np; 103 struct device_node *np;
104 int retval;
105 struct of_mm_gpio_chip *gef_gpio_chip;
106 106
107 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") { 107 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
108 int retval;
109 struct of_mm_gpio_chip *gef_gpio_chip;
110 108
111 pr_debug("%s: Initialising GEF GPIO\n", np->full_name); 109 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
112 110
@@ -120,7 +118,35 @@ static int __init gef_gpio_init(void)
120 118
121 /* Setup pointers to chip functions */ 119 /* Setup pointers to chip functions */
122 gef_gpio_chip->of_gc.gpio_cells = 2; 120 gef_gpio_chip->of_gc.gpio_cells = 2;
123 gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO; 121 gef_gpio_chip->of_gc.gc.ngpio = 19;
122 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
123 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
124 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
125 gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
126
127 /* This function adds a memory mapped GPIO chip */
128 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
129 if (retval) {
130 kfree(gef_gpio_chip);
131 pr_err("%s: Unable to add GPIO\n", np->full_name);
132 }
133 }
134
135 for_each_compatible_node(np, NULL, "gef,sbc310-gpio") {
136
137 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
138
139 /* Allocate chip structure */
140 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
141 if (!gef_gpio_chip) {
142 pr_err("%s: Unable to allocate structure\n",
143 np->full_name);
144 continue;
145 }
146
147 /* Setup pointers to chip functions */
148 gef_gpio_chip->of_gc.gpio_cells = 2;
149 gef_gpio_chip->of_gc.gc.ngpio = 6;
124 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in; 150 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
125 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out; 151 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
126 gef_gpio_chip->of_gc.gc.get = gef_gpio_get; 152 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
new file mode 100644
index 000000000000..0f20172af84b
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -0,0 +1,230 @@
1/*
2 * GE Fanuc SBC310 board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *sbc310_regs;
53
54static void __init gef_sbc310_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
65 if (!cascade_node) {
66 printk(KERN_WARNING "SBC310: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_sbc310_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
93 if (regs) {
94 sbc310_regs = of_iomap(regs, 0);
95 if (sbc310_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_sbc310_get_board_id(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(sbc310_regs);
107 return reg & 0xff;
108}
109
110/* Return the PCB revision */
111static unsigned int gef_sbc310_get_pcb_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(sbc310_regs);
116 return (reg >> 8) & 0xff;
117}
118
119/* Return the board (software) revision */
120static unsigned int gef_sbc310_get_board_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(sbc310_regs);
125 return (reg >> 16) & 0xff;
126}
127
128/* Return the FPGA revision */
129static unsigned int gef_sbc310_get_fpga_rev(void)
130{
131 unsigned int reg;
132
133 reg = ioread32(sbc310_regs);
134 return (reg >> 24) & 0xf;
135}
136
137static void gef_sbc310_show_cpuinfo(struct seq_file *m)
138{
139 uint svid = mfspr(SPRN_SVR);
140
141 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
142
143 seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
144 seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
145 ('A' + gef_sbc310_get_board_rev() - 1));
146 seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
147
148 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
149
150}
151
152static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
153{
154 unsigned int val;
155
156 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
157
158 /* Ensure only ports 1 & 2 are enabled */
159 pci_read_config_dword(pdev, 0xe0, &val);
160 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
161
162 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
163 pci_write_config_dword(pdev, 0xe4, 1 << 5);
164}
165DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
166 gef_sbc310_nec_fixup);
167
168/*
169 * Called very early, device-tree isn't unflattened
170 *
171 * This function is called to determine whether the BSP is compatible with the
172 * supplied device-tree, which is assumed to be the correct one for the actual
173 * board. It is expected thati, in the future, a kernel may support multiple
174 * boards.
175 */
176static int __init gef_sbc310_probe(void)
177{
178 unsigned long root = of_get_flat_dt_root();
179
180 if (of_flat_dt_is_compatible(root, "gef,sbc310"))
181 return 1;
182
183 return 0;
184}
185
186static long __init mpc86xx_time_init(void)
187{
188 unsigned int temp;
189
190 /* Set the time base to zero */
191 mtspr(SPRN_TBWL, 0);
192 mtspr(SPRN_TBWU, 0);
193
194 temp = mfspr(SPRN_HID0);
195 temp |= HID0_TBEN;
196 mtspr(SPRN_HID0, temp);
197 asm volatile("isync");
198
199 return 0;
200}
201
202static __initdata struct of_device_id of_bus_ids[] = {
203 { .compatible = "simple-bus", },
204 {},
205};
206
207static int __init declare_of_platform_devices(void)
208{
209 printk(KERN_DEBUG "Probe platform devices\n");
210 of_platform_bus_probe(NULL, of_bus_ids, NULL);
211
212 return 0;
213}
214machine_device_initcall(gef_sbc310, declare_of_platform_devices);
215
216define_machine(gef_sbc310) {
217 .name = "GE Fanuc SBC310",
218 .probe = gef_sbc310_probe,
219 .setup_arch = gef_sbc310_setup_arch,
220 .init_IRQ = gef_sbc310_init_irq,
221 .show_cpuinfo = gef_sbc310_show_cpuinfo,
222 .get_irq = mpic_get_irq,
223 .restart = fsl_rstcr_restart,
224 .time_init = mpc86xx_time_init,
225 .calibrate_decr = generic_calibrate_decr,
226 .progress = udbg_progress,
227#ifdef CONFIG_PCI
228 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
229#endif
230};
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index f1c3395633b9..474d176a6ec3 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -129,7 +129,8 @@ void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)
129 brg -= 4; 129 brg -= 4;
130 } 130 }
131 bp += brg; 131 bp += brg;
132 val = (((clk / rate) - 1) << 1) | CPM_BRG_EN | src; 132 /* Round the clock divider to the nearest integer. */
133 val = (((clk * 2 / rate) - 1) & ~1) | CPM_BRG_EN | src;
133 if (div16) 134 if (div16)
134 val |= CPM_BRG_DIV16; 135 val |= CPM_BRG_DIV16;
135 136
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 9817f63723dd..78021d8afc53 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,12 +1,16 @@
1/* 1/*
2 * MPC83xx/85xx/86xx PCI/PCIE support routing. 2 * MPC83xx/85xx/86xx PCI/PCIE support routing.
3 * 3 *
4 * Copyright 2007,2008 Freescale Semiconductor, Inc 4 * Copyright 2007-2009 Freescale Semiconductor, Inc.
5 * Copyright 2008-2009 MontaVista Software, Inc.
5 * 6 *
6 * Initial author: Xianghua Xiao <x.xiao@freescale.com> 7 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
7 * Recode: ZHANG WEI <wei.zhang@freescale.com> 8 * Recode: ZHANG WEI <wei.zhang@freescale.com>
8 * Rewrite the routing for Frescale PCI and PCI Express 9 * Rewrite the routing for Frescale PCI and PCI Express
9 * Roy Zang <tie-fei.zang@freescale.com> 10 * Roy Zang <tie-fei.zang@freescale.com>
11 * MPC83xx PCI-Express support:
12 * Tony Li <tony.li@freescale.com>
13 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * 14 *
11 * This program is free software; you can redistribute it and/or modify it 15 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 16 * under the terms of the GNU General Public License as published by the
@@ -27,6 +31,29 @@
27#include <sysdev/fsl_soc.h> 31#include <sysdev/fsl_soc.h>
28#include <sysdev/fsl_pci.h> 32#include <sysdev/fsl_pci.h>
29 33
34static int fsl_pcie_bus_fixup;
35
36static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
37{
38 /* if we aren't a PCIe don't bother */
39 if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
40 return;
41
42 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
43 fsl_pcie_bus_fixup = 1;
44 return;
45}
46
47static int __init fsl_pcie_check_link(struct pci_controller *hose)
48{
49 u32 val;
50
51 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
52 if (val < PCIE_LTSSM_L0)
53 return 1;
54 return 0;
55}
56
30#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 57#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
31static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, 58static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
32 unsigned int index, const struct resource *res, 59 unsigned int index, const struct resource *res,
@@ -159,28 +186,6 @@ static void __init setup_pci_pcsrbar(struct pci_controller *hose)
159#endif 186#endif
160} 187}
161 188
162static int fsl_pcie_bus_fixup;
163
164static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
165{
166 /* if we aren't a PCIe don't bother */
167 if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
168 return ;
169
170 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
171 fsl_pcie_bus_fixup = 1;
172 return ;
173}
174
175static int __init fsl_pcie_check_link(struct pci_controller *hose)
176{
177 u32 val;
178 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
179 if (val < PCIE_LTSSM_L0)
180 return 1;
181 return 0;
182}
183
184void fsl_pcibios_fixup_bus(struct pci_bus *bus) 189void fsl_pcibios_fixup_bus(struct pci_bus *bus)
185{ 190{
186 struct pci_controller *hose = (struct pci_controller *) bus->sysdata; 191 struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
@@ -294,8 +299,184 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
294#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ 299#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
295 300
296#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) 301#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
302DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header);
303DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header);
304DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header);
305DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315, quirk_fsl_pcie_header);
306DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377E, quirk_fsl_pcie_header);
307DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377, quirk_fsl_pcie_header);
308DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378E, quirk_fsl_pcie_header);
309DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378, quirk_fsl_pcie_header);
310
311struct mpc83xx_pcie_priv {
312 void __iomem *cfg_type0;
313 void __iomem *cfg_type1;
314 u32 dev_base;
315};
316
317/*
318 * With the convention of u-boot, the PCIE outbound window 0 serves
319 * as configuration transactions outbound.
320 */
321#define PEX_OUTWIN0_BAR 0xCA4
322#define PEX_OUTWIN0_TAL 0xCA8
323#define PEX_OUTWIN0_TAH 0xCAC
324
325static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
326{
327 struct pci_controller *hose = bus->sysdata;
328
329 if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK)
330 return PCIBIOS_DEVICE_NOT_FOUND;
331 /*
332 * Workaround for the HW bug: for Type 0 configure transactions the
333 * PCI-E controller does not check the device number bits and just
334 * assumes that the device number bits are 0.
335 */
336 if (bus->number == hose->first_busno ||
337 bus->primary == hose->first_busno) {
338 if (devfn & 0xf8)
339 return PCIBIOS_DEVICE_NOT_FOUND;
340 }
341
342 if (ppc_md.pci_exclude_device) {
343 if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
344 return PCIBIOS_DEVICE_NOT_FOUND;
345 }
346
347 return PCIBIOS_SUCCESSFUL;
348}
349
350static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
351 unsigned int devfn, int offset)
352{
353 struct pci_controller *hose = bus->sysdata;
354 struct mpc83xx_pcie_priv *pcie = hose->dn->data;
355 u8 bus_no = bus->number - hose->first_busno;
356 u32 dev_base = bus_no << 24 | devfn << 16;
357 int ret;
358
359 ret = mpc83xx_pcie_exclude_device(bus, devfn);
360 if (ret)
361 return NULL;
362
363 offset &= 0xfff;
364
365 /* Type 0 */
366 if (bus->number == hose->first_busno)
367 return pcie->cfg_type0 + offset;
368
369 if (pcie->dev_base == dev_base)
370 goto mapped;
371
372 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base);
373
374 pcie->dev_base = dev_base;
375mapped:
376 return pcie->cfg_type1 + offset;
377}
378
379static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
380 int offset, int len, u32 *val)
381{
382 void __iomem *cfg_addr;
383
384 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
385 if (!cfg_addr)
386 return PCIBIOS_DEVICE_NOT_FOUND;
387
388 switch (len) {
389 case 1:
390 *val = in_8(cfg_addr);
391 break;
392 case 2:
393 *val = in_le16(cfg_addr);
394 break;
395 default:
396 *val = in_le32(cfg_addr);
397 break;
398 }
399
400 return PCIBIOS_SUCCESSFUL;
401}
402
403static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
404 int offset, int len, u32 val)
405{
406 void __iomem *cfg_addr;
407
408 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
409 if (!cfg_addr)
410 return PCIBIOS_DEVICE_NOT_FOUND;
411
412 switch (len) {
413 case 1:
414 out_8(cfg_addr, val);
415 break;
416 case 2:
417 out_le16(cfg_addr, val);
418 break;
419 default:
420 out_le32(cfg_addr, val);
421 break;
422 }
423
424 return PCIBIOS_SUCCESSFUL;
425}
426
427static struct pci_ops mpc83xx_pcie_ops = {
428 .read = mpc83xx_pcie_read_config,
429 .write = mpc83xx_pcie_write_config,
430};
431
432static int __init mpc83xx_pcie_setup(struct pci_controller *hose,
433 struct resource *reg)
434{
435 struct mpc83xx_pcie_priv *pcie;
436 u32 cfg_bar;
437 int ret = -ENOMEM;
438
439 pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL);
440 if (!pcie)
441 return ret;
442
443 pcie->cfg_type0 = ioremap(reg->start, resource_size(reg));
444 if (!pcie->cfg_type0)
445 goto err0;
446
447 cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR);
448 if (!cfg_bar) {
449 /* PCI-E isn't configured. */
450 ret = -ENODEV;
451 goto err1;
452 }
453
454 pcie->cfg_type1 = ioremap(cfg_bar, 0x1000);
455 if (!pcie->cfg_type1)
456 goto err1;
457
458 WARN_ON(hose->dn->data);
459 hose->dn->data = pcie;
460 hose->ops = &mpc83xx_pcie_ops;
461
462 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0);
463 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0);
464
465 if (fsl_pcie_check_link(hose))
466 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
467
468 return 0;
469err1:
470 iounmap(pcie->cfg_type0);
471err0:
472 kfree(pcie);
473 return ret;
474
475}
476
297int __init mpc83xx_add_bridge(struct device_node *dev) 477int __init mpc83xx_add_bridge(struct device_node *dev)
298{ 478{
479 int ret;
299 int len; 480 int len;
300 struct pci_controller *hose; 481 struct pci_controller *hose;
301 struct resource rsrc_reg; 482 struct resource rsrc_reg;
@@ -303,6 +484,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
303 const int *bus_range; 484 const int *bus_range;
304 int primary; 485 int primary;
305 486
487 if (!of_device_is_available(dev)) {
488 pr_warning("%s: disabled by the firmware.\n",
489 dev->full_name);
490 return -ENODEV;
491 }
306 pr_debug("Adding PCI host bridge %s\n", dev->full_name); 492 pr_debug("Adding PCI host bridge %s\n", dev->full_name);
307 493
308 /* Fetch host bridge registers address */ 494 /* Fetch host bridge registers address */
@@ -350,7 +536,14 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
350 hose->first_busno = bus_range ? bus_range[0] : 0; 536 hose->first_busno = bus_range ? bus_range[0] : 0;
351 hose->last_busno = bus_range ? bus_range[1] : 0xff; 537 hose->last_busno = bus_range ? bus_range[1] : 0xff;
352 538
353 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0); 539 if (of_device_is_compatible(dev, "fsl,mpc8314-pcie")) {
540 ret = mpc83xx_pcie_setup(hose, &rsrc_reg);
541 if (ret)
542 goto err0;
543 } else {
544 setup_indirect_pci(hose, rsrc_cfg.start,
545 rsrc_cfg.start + 4, 0);
546 }
354 547
355 printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. " 548 printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
356 "Firmware bus number: %d->%d\n", 549 "Firmware bus number: %d->%d\n",
@@ -365,5 +558,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
365 pci_process_bridge_OF_ranges(hose, dev, primary); 558 pci_process_bridge_OF_ranges(hose, dev, primary);
366 559
367 return 0; 560 return 0;
561err0:
562 pcibios_free_controller(hose);
563 return ret;
368} 564}
369#endif /* CONFIG_PPC_83xx */ 565#endif /* CONFIG_PPC_83xx */
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 09a3d5522b43..316ee964b945 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -772,7 +772,7 @@ config TXX9_WDT
772 772
773config GEF_WDT 773config GEF_WDT
774 tristate "GE Fanuc Watchdog Timer" 774 tristate "GE Fanuc Watchdog Timer"
775 depends on GEF_SBC610 775 depends on GEF_SBC610 || GEF_SBC310
776 ---help--- 776 ---help---
777 Watchdog timer found in a number of GE Fanuc single board computers. 777 Watchdog timer found in a number of GE Fanuc single board computers.
778 778
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 52a9fe08451c..b20ab9d642dc 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2217,6 +2217,14 @@
2217#define PCI_DEVICE_ID_TDI_EHCI 0x0101 2217#define PCI_DEVICE_ID_TDI_EHCI 0x0101
2218 2218
2219#define PCI_VENDOR_ID_FREESCALE 0x1957 2219#define PCI_VENDOR_ID_FREESCALE 0x1957
2220#define PCI_DEVICE_ID_MPC8315E 0x00b4
2221#define PCI_DEVICE_ID_MPC8315 0x00b5
2222#define PCI_DEVICE_ID_MPC8314E 0x00b6
2223#define PCI_DEVICE_ID_MPC8314 0x00b7
2224#define PCI_DEVICE_ID_MPC8378E 0x00c4
2225#define PCI_DEVICE_ID_MPC8378 0x00c5
2226#define PCI_DEVICE_ID_MPC8377E 0x00c6
2227#define PCI_DEVICE_ID_MPC8377 0x00c7
2220#define PCI_DEVICE_ID_MPC8548E 0x0012 2228#define PCI_DEVICE_ID_MPC8548E 0x0012
2221#define PCI_DEVICE_ID_MPC8548 0x0013 2229#define PCI_DEVICE_ID_MPC8548 0x0013
2222#define PCI_DEVICE_ID_MPC8543E 0x0014 2230#define PCI_DEVICE_ID_MPC8543E 0x0014
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 09:20:15 -0500