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-rw-r--r--drivers/usb/dwc3/dwc3-omap.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 08fffe6d1a9e..424924de9e9d 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -177,50 +177,50 @@ static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
177 ctrl = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_CTRL); 177 ctrl = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_CTRL);
178 178
179 if (reg & USBOTGSS_IRQ1_DMADISABLECLR) { 179 if (reg & USBOTGSS_IRQ1_DMADISABLECLR) {
180 dev_dbg(omap->base, "DMA Disable was Cleared\n"); 180 dev_dbg(omap->dev, "DMA Disable was Cleared\n");
181 omap->dma_status = false; 181 omap->dma_status = false;
182 } 182 }
183 183
184 if (reg & USBOTGSS_IRQ1_OEVT) 184 if (reg & USBOTGSS_IRQ1_OEVT)
185 dev_dbg(omap->base, "OTG Event\n"); 185 dev_dbg(omap->dev, "OTG Event\n");
186 186
187 if (reg & USBOTGSS_IRQ1_DRVVBUS_RISE) { 187 if (reg & USBOTGSS_IRQ1_DRVVBUS_RISE) {
188 dev_dbg(omap->base, "DRVVBUS Rise\n"); 188 dev_dbg(omap->dev, "DRVVBUS Rise\n");
189 ctrl |= USBOTGSS_UTMI_OTG_CTRL_DRVVBUS; 189 ctrl |= USBOTGSS_UTMI_OTG_CTRL_DRVVBUS;
190 } 190 }
191 191
192 if (reg & USBOTGSS_IRQ1_CHRGVBUS_RISE) { 192 if (reg & USBOTGSS_IRQ1_CHRGVBUS_RISE) {
193 dev_dbg(omap->base, "CHRGVBUS Rise\n"); 193 dev_dbg(omap->dev, "CHRGVBUS Rise\n");
194 ctrl |= USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS; 194 ctrl |= USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS;
195 } 195 }
196 196
197 if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_RISE) { 197 if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_RISE) {
198 dev_dbg(omap->base, "DISCHRGVBUS Rise\n"); 198 dev_dbg(omap->dev, "DISCHRGVBUS Rise\n");
199 ctrl |= USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS; 199 ctrl |= USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS;
200 } 200 }
201 201
202 if (reg & USBOTGSS_IRQ1_IDPULLUP_RISE) { 202 if (reg & USBOTGSS_IRQ1_IDPULLUP_RISE) {
203 dev_dbg(omap->base, "IDPULLUP Rise\n"); 203 dev_dbg(omap->dev, "IDPULLUP Rise\n");
204 ctrl |= USBOTGSS_UTMI_OTG_CTRL_IDPULLUP; 204 ctrl |= USBOTGSS_UTMI_OTG_CTRL_IDPULLUP;
205 } 205 }
206 206
207 if (reg & USBOTGSS_IRQ1_DRVVBUS_FALL) { 207 if (reg & USBOTGSS_IRQ1_DRVVBUS_FALL) {
208 dev_dbg(omap->base, "DRVVBUS Fall\n"); 208 dev_dbg(omap->dev, "DRVVBUS Fall\n");
209 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_DRVVBUS; 209 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_DRVVBUS;
210 } 210 }
211 211
212 if (reg & USBOTGSS_IRQ1_CHRGVBUS_FALL) { 212 if (reg & USBOTGSS_IRQ1_CHRGVBUS_FALL) {
213 dev_dbg(omap->base, "CHRGVBUS Fall\n"); 213 dev_dbg(omap->dev, "CHRGVBUS Fall\n");
214 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS; 214 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS;
215 } 215 }
216 216
217 if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_FALL) { 217 if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_FALL) {
218 dev_dbg(omap->base, "DISCHRGVBUS Fall\n"); 218 dev_dbg(omap->dev, "DISCHRGVBUS Fall\n");
219 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS; 219 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS;
220 } 220 }
221 221
222 if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL) { 222 if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL) {
223 dev_dbg(omap->base, "IDPULLUP Fall\n"); 223 dev_dbg(omap->dev, "IDPULLUP Fall\n");
224 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_IDPULLUP; 224 ctrl &= ~USBOTGSS_UTMI_OTG_CTRL_IDPULLUP;
225 } 225 }
226 226