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-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--drivers/pinctrl/Kconfig4
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/pinctrl-ab8540.c406
-rw-r--r--drivers/pinctrl/pinctrl-abx500.c3
-rw-r--r--drivers/pinctrl/pinctrl-abx500.h13
6 files changed, 428 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index b7c70e1734a7..3e5bbd0e5b23 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -23,6 +23,7 @@ config UX500_SOC_DB8500
23 select PINCTRL_AB8500 23 select PINCTRL_AB8500
24 select PINCTRL_AB8505 24 select PINCTRL_AB8505
25 select PINCTRL_AB9540 25 select PINCTRL_AB9540
26 select PINCTRL_AB8540
26 select REGULATOR 27 select REGULATOR
27 select REGULATOR_DB8500_PRCMU 28 select REGULATOR_DB8500_PRCMU
28 29
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index aea4ceb8d135..0ef92cc11ef5 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -37,6 +37,10 @@ config PINCTRL_AB8500
37 bool "AB8500 pin controller driver" 37 bool "AB8500 pin controller driver"
38 depends on PINCTRL_ABX500 && ARCH_U8500 38 depends on PINCTRL_ABX500 && ARCH_U8500
39 39
40config PINCTRL_AB8540
41 bool "AB8540 pin controller driver"
42 depends on PINCTRL_ABX500 && ARCH_U8500
43
40config PINCTRL_AB9540 44config PINCTRL_AB9540
41 bool "AB9540 pin controller driver" 45 bool "AB9540 pin controller driver"
42 depends on PINCTRL_ABX500 && ARCH_U8500 46 depends on PINCTRL_ABX500 && ARCH_U8500
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index e866b79c2cae..e1ff3a55bd76 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -11,6 +11,7 @@ endif
11obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o 11obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
12obj-$(CONFIG_PINCTRL_ABX500) += pinctrl-abx500.o 12obj-$(CONFIG_PINCTRL_ABX500) += pinctrl-abx500.o
13obj-$(CONFIG_PINCTRL_AB8500) += pinctrl-ab8500.o 13obj-$(CONFIG_PINCTRL_AB8500) += pinctrl-ab8500.o
14obj-$(CONFIG_PINCTRL_AB8540) += pinctrl-ab8540.o
14obj-$(CONFIG_PINCTRL_AB9540) += pinctrl-ab9540.o 15obj-$(CONFIG_PINCTRL_AB9540) += pinctrl-ab9540.o
15obj-$(CONFIG_PINCTRL_AB8505) += pinctrl-ab8505.o 16obj-$(CONFIG_PINCTRL_AB8505) += pinctrl-ab8505.o
16obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o 17obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
diff --git a/drivers/pinctrl/pinctrl-ab8540.c b/drivers/pinctrl/pinctrl-ab8540.c
new file mode 100644
index 000000000000..e75310de7067
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-ab8540.c
@@ -0,0 +1,406 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2012
3 *
4 * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
13#include <linux/pinctrl/pinctrl.h>
14#include <linux/mfd/abx500/ab8500.h>
15#include "pinctrl-abx500.h"
16
17/* All the pins that can be used for GPIO and some other functions */
18#define ABX500_GPIO(offset) (offset)
19
20#define AB8540_PIN_J16 ABX500_GPIO(1)
21#define AB8540_PIN_D17 ABX500_GPIO(2)
22#define AB8540_PIN_C12 ABX500_GPIO(3)
23#define AB8540_PIN_G12 ABX500_GPIO(4)
24/* hole */
25#define AB8540_PIN_D16 ABX500_GPIO(14)
26#define AB8540_PIN_F15 ABX500_GPIO(15)
27#define AB8540_PIN_J8 ABX500_GPIO(16)
28#define AB8540_PIN_K16 ABX500_GPIO(17)
29#define AB8540_PIN_G15 ABX500_GPIO(18)
30#define AB8540_PIN_F17 ABX500_GPIO(19)
31#define AB8540_PIN_E17 ABX500_GPIO(20)
32/* hole */
33#define AB8540_PIN_AA16 ABX500_GPIO(27)
34#define AB8540_PIN_W18 ABX500_GPIO(28)
35#define AB8540_PIN_Y15 ABX500_GPIO(29)
36#define AB8540_PIN_W16 ABX500_GPIO(30)
37#define AB8540_PIN_V15 ABX500_GPIO(31)
38#define AB8540_PIN_W17 ABX500_GPIO(32)
39/* hole */
40#define AB8540_PIN_D12 ABX500_GPIO(42)
41#define AB8540_PIN_P4 ABX500_GPIO(43)
42#define AB8540_PIN_AB1 ABX500_GPIO(44)
43#define AB8540_PIN_K7 ABX500_GPIO(45)
44#define AB8540_PIN_L7 ABX500_GPIO(46)
45#define AB8540_PIN_G10 ABX500_GPIO(47)
46#define AB8540_PIN_K12 ABX500_GPIO(48)
47/* hole */
48#define AB8540_PIN_N8 ABX500_GPIO(51)
49#define AB8540_PIN_P12 ABX500_GPIO(52)
50#define AB8540_PIN_K8 ABX500_GPIO(53)
51#define AB8540_PIN_J11 ABX500_GPIO(54)
52#define AB8540_PIN_AC2 ABX500_GPIO(55)
53#define AB8540_PIN_AB2 ABX500_GPIO(56)
54
55/* indicates the highest GPIO number */
56#define AB8540_GPIO_MAX_NUMBER 56
57
58/*
59 * The names of the pins are denoted by GPIO number and ball name, even
60 * though they can be used for other things than GPIO, this is the first
61 * column in the table of the data sheet and often used on schematics and
62 * such.
63 */
64static const struct pinctrl_pin_desc ab8540_pins[] = {
65 PINCTRL_PIN(AB8540_PIN_J16, "GPIO1_J16"),
66 PINCTRL_PIN(AB8540_PIN_D17, "GPIO2_D17"),
67 PINCTRL_PIN(AB8540_PIN_C12, "GPIO3_C12"),
68 PINCTRL_PIN(AB8540_PIN_G12, "GPIO4_G12"),
69 /* hole */
70 PINCTRL_PIN(AB8540_PIN_D16, "GPIO14_D16"),
71 PINCTRL_PIN(AB8540_PIN_F15, "GPIO15_F15"),
72 PINCTRL_PIN(AB8540_PIN_J8, "GPIO16_J8"),
73 PINCTRL_PIN(AB8540_PIN_K16, "GPIO17_K16"),
74 PINCTRL_PIN(AB8540_PIN_G15, "GPIO18_G15"),
75 PINCTRL_PIN(AB8540_PIN_F17, "GPIO19_F17"),
76 PINCTRL_PIN(AB8540_PIN_E17, "GPIO20_E17"),
77 /* hole */
78 PINCTRL_PIN(AB8540_PIN_AA16, "GPIO27_AA16"),
79 PINCTRL_PIN(AB8540_PIN_W18, "GPIO28_W18"),
80 PINCTRL_PIN(AB8540_PIN_Y15, "GPIO29_Y15"),
81 PINCTRL_PIN(AB8540_PIN_W16, "GPIO30_W16"),
82 PINCTRL_PIN(AB8540_PIN_V15, "GPIO31_V15"),
83 PINCTRL_PIN(AB8540_PIN_W17, "GPIO32_W17"),
84 /* hole */
85 PINCTRL_PIN(AB8540_PIN_D12, "GPIO42_D12"),
86 PINCTRL_PIN(AB8540_PIN_P4, "GPIO43_P4"),
87 PINCTRL_PIN(AB8540_PIN_AB1, "GPIO44_AB1"),
88 PINCTRL_PIN(AB8540_PIN_K7, "GPIO45_K7"),
89 PINCTRL_PIN(AB8540_PIN_L7, "GPIO46_L7"),
90 PINCTRL_PIN(AB8540_PIN_G10, "GPIO47_G10"),
91 PINCTRL_PIN(AB8540_PIN_K12, "GPIO48_K12"),
92 /* hole */
93 PINCTRL_PIN(AB8540_PIN_N8, "GPIO51_N8"),
94 PINCTRL_PIN(AB8540_PIN_P12, "GPIO52_P12"),
95 PINCTRL_PIN(AB8540_PIN_K8, "GPIO53_K8"),
96 PINCTRL_PIN(AB8540_PIN_J11, "GPIO54_J11"),
97 PINCTRL_PIN(AB8540_PIN_AC2, "GPIO55_AC2"),
98 PINCTRL_PIN(AB8540_PIN_AB2, "GPIO56_AB2"),
99};
100
101/*
102 * Maps local GPIO offsets to local pin numbers
103 */
104static const struct abx500_pinrange ab8540_pinranges[] = {
105 ABX500_PINRANGE(1, 4, ABX500_ALT_A),
106 ABX500_PINRANGE(14, 7, ABX500_ALT_A),
107 ABX500_PINRANGE(27, 6, ABX500_ALT_A),
108 ABX500_PINRANGE(42, 7, ABX500_ALT_A),
109 ABX500_PINRANGE(51, 6, ABX500_ALT_A),
110};
111
112/*
113 * Read the pin group names like this:
114 * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
115 *
116 * The groups are arranged as sets per altfunction column, so we can
117 * mux in one group at a time by selecting the same altfunction for them
118 * all. When functions require pins on different altfunctions, you need
119 * to combine several groups.
120 */
121
122/* default column */
123static const unsigned sysclkreq2_d_1_pins[] = { AB8540_PIN_J16 };
124static const unsigned sysclkreq3_d_1_pins[] = { AB8540_PIN_D17 };
125static const unsigned sysclkreq4_d_1_pins[] = { AB8540_PIN_C12 };
126static const unsigned sysclkreq6_d_1_pins[] = { AB8540_PIN_G12 };
127static const unsigned pwmout1_d_1_pins[] = { AB8540_PIN_D16 };
128static const unsigned pwmout2_d_1_pins[] = { AB8540_PIN_F15 };
129static const unsigned pwmout3_d_1_pins[] = { AB8540_PIN_J8 };
130
131/* audio data interface 1*/
132static const unsigned adi1_d_1_pins[] = { AB8540_PIN_K16, AB8540_PIN_G15,
133 AB8540_PIN_F17, AB8540_PIN_E17 };
134/* Digital microphone 1 and 2 */
135static const unsigned dmic12_d_1_pins[] = { AB8540_PIN_AA16, AB8540_PIN_W18 };
136/* Digital microphone 3 and 4 */
137static const unsigned dmic34_d_1_pins[] = { AB8540_PIN_Y15, AB8540_PIN_W16 };
138/* Digital microphone 5 and 6 */
139static const unsigned dmic56_d_1_pins[] = { AB8540_PIN_V15, AB8540_PIN_W17 };
140static const unsigned sysclkreq5_d_1_pins[] = { AB8540_PIN_D12 };
141static const unsigned batremn_d_1_pins[] = { AB8540_PIN_P4 };
142static const unsigned service_d_1_pins[] = { AB8540_PIN_AB1 };
143static const unsigned pwrctrl0_d_1_pins[] = { AB8540_PIN_K7 };
144static const unsigned pwrctrl1_d_1_pins[] = { AB8540_PIN_L7 };
145static const unsigned pwmextvibra1_d_1_pins[] = { AB8540_PIN_G10 };
146static const unsigned pwmextvibra2_d_1_pins[] = { AB8540_PIN_K12 };
147static const unsigned gpio1_vbat_d_1_pins[] = { AB8540_PIN_N8 };
148static const unsigned gpio2_vbat_d_1_pins[] = { AB8540_PIN_P12 };
149static const unsigned gpio3_vbat_d_1_pins[] = { AB8540_PIN_K8 };
150static const unsigned gpio4_vbat_d_1_pins[] = { AB8540_PIN_J11 };
151static const unsigned pdmclkdat_d_1_pins[] = { AB8540_PIN_AC2, AB8540_PIN_AB2 };
152
153/* Altfunction A column */
154static const unsigned gpio1_a_1_pins[] = { AB8540_PIN_J16 };
155static const unsigned gpio2_a_1_pins[] = { AB8540_PIN_D17 };
156static const unsigned gpio3_a_1_pins[] = { AB8540_PIN_C12 };
157static const unsigned gpio4_a_1_pins[] = { AB8540_PIN_G12 };
158static const unsigned gpio14_a_1_pins[] = { AB8540_PIN_D16 };
159static const unsigned gpio15_a_1_pins[] = { AB8540_PIN_F15 };
160static const unsigned gpio16_a_1_pins[] = { AB8540_PIN_J8 };
161static const unsigned gpio17_a_1_pins[] = { AB8540_PIN_K16 };
162static const unsigned gpio18_a_1_pins[] = { AB8540_PIN_G15 };
163static const unsigned gpio19_a_1_pins[] = { AB8540_PIN_F17 };
164static const unsigned gpio20_a_1_pins[] = { AB8540_PIN_E17 };
165static const unsigned gpio27_a_1_pins[] = { AB8540_PIN_AA16 };
166static const unsigned gpio28_a_1_pins[] = { AB8540_PIN_W18 };
167static const unsigned gpio29_a_1_pins[] = { AB8540_PIN_Y15 };
168static const unsigned gpio30_a_1_pins[] = { AB8540_PIN_W16 };
169static const unsigned gpio31_a_1_pins[] = { AB8540_PIN_V15 };
170static const unsigned gpio32_a_1_pins[] = { AB8540_PIN_W17 };
171static const unsigned gpio42_a_1_pins[] = { AB8540_PIN_D12 };
172static const unsigned gpio43_a_1_pins[] = { AB8540_PIN_P4 };
173static const unsigned gpio44_a_1_pins[] = { AB8540_PIN_AB1 };
174static const unsigned gpio45_a_1_pins[] = { AB8540_PIN_K7 };
175static const unsigned gpio46_a_1_pins[] = { AB8540_PIN_L7 };
176static const unsigned gpio47_a_1_pins[] = { AB8540_PIN_G10 };
177static const unsigned gpio48_a_1_pins[] = { AB8540_PIN_K12 };
178static const unsigned gpio51_a_1_pins[] = { AB8540_PIN_N8 };
179static const unsigned gpio52_a_1_pins[] = { AB8540_PIN_P12 };
180static const unsigned gpio53_a_1_pins[] = { AB8540_PIN_K8 };
181static const unsigned gpio54_a_1_pins[] = { AB8540_PIN_J11 };
182static const unsigned gpio55_a_1_pins[] = { AB8540_PIN_AC2 };
183static const unsigned gpio56_a_1_pins[] = { AB8540_PIN_AB2 };
184
185#define AB8540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
186 .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
187
188static const struct abx500_pingroup ab8540_groups[] = {
189 /* default column */
190 AB8540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
191 AB8540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
192 AB8540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
193 AB8540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
194 AB8540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
195 AB8540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
196 AB8540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
197 AB8540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
198 AB8540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
199 AB8540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
200 AB8540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
201 AB8540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
202 AB8540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
203 AB8540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
204 AB8540_PIN_GROUP(pwrctrl0_d_1, ABX500_DEFAULT),
205 AB8540_PIN_GROUP(pwrctrl1_d_1, ABX500_DEFAULT),
206 AB8540_PIN_GROUP(pwmextvibra1_d_1, ABX500_DEFAULT),
207 AB8540_PIN_GROUP(pwmextvibra2_d_1, ABX500_DEFAULT),
208 AB8540_PIN_GROUP(gpio1_vbat_d_1, ABX500_DEFAULT),
209 AB8540_PIN_GROUP(gpio2_vbat_d_1, ABX500_DEFAULT),
210 AB8540_PIN_GROUP(gpio3_vbat_d_1, ABX500_DEFAULT),
211 AB8540_PIN_GROUP(gpio4_vbat_d_1, ABX500_DEFAULT),
212 AB8540_PIN_GROUP(pdmclkdat_d_1, ABX500_DEFAULT),
213 /* Altfunction A column */
214 AB8540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
215 AB8540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
216 AB8540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
217 AB8540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
218 AB8540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
219 AB8540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
220 AB8540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
221 AB8540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
222 AB8540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
223 AB8540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
224 AB8540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
225 AB8540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
226 AB8540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
227 AB8540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
228 AB8540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
229 AB8540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
230 AB8540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
231 AB8540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
232 AB8540_PIN_GROUP(gpio43_a_1, ABX500_ALT_A),
233 AB8540_PIN_GROUP(gpio44_a_1, ABX500_ALT_A),
234 AB8540_PIN_GROUP(gpio45_a_1, ABX500_ALT_A),
235 AB8540_PIN_GROUP(gpio46_a_1, ABX500_ALT_A),
236 AB8540_PIN_GROUP(gpio47_a_1, ABX500_ALT_A),
237 AB8540_PIN_GROUP(gpio48_a_1, ABX500_ALT_A),
238 AB8540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
239 AB8540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
240 AB8540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
241 AB8540_PIN_GROUP(gpio54_a_1, ABX500_ALT_A),
242 AB8540_PIN_GROUP(gpio55_a_1, ABX500_ALT_A),
243 AB8540_PIN_GROUP(gpio56_a_1, ABX500_ALT_A),
244};
245
246/* We use this macro to define the groups applicable to a function */
247#define AB8540_FUNC_GROUPS(a, b...) \
248static const char * const a##_groups[] = { b };
249
250AB8540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
251 "sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1");
252AB8540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
253 "gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1",
254 "gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio27_a_1",
255 "gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
256 "gpio32_a_1", "gpio42_a_1", "gpio43_a_1", "gpio44_a_1",
257 "gpio45_a_1", "gpio46_a_1", "gpio47_a_1", "gpio48_a_1",
258 "gpio51_a_1", "gpio52_a_1", "gpio53_a_1", "gpio54_a_1",
259 "gpio55_a_1", "gpio56_a_1");
260AB8540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
261AB8540_FUNC_GROUPS(adi1, "adi1_d_1");
262AB8540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
263AB8540_FUNC_GROUPS(batremn, "batremn_d_1");
264AB8540_FUNC_GROUPS(service, "service_d_1");
265AB8540_FUNC_GROUPS(pwrctrl, "pwrctrl0_d_1", "pwrctrl1_d_1");
266AB8540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_d_1", "pwmextvibra2_d_1");
267AB8540_FUNC_GROUPS(gpio_vbat, "gpio1_vbat_d_1", "gpio2_vbat_d_1",
268 "gpio3_vbat_d_1", "gpio4_vbat_d_1");
269AB8540_FUNC_GROUPS(pdm, "pdmclkdat_d_1");
270
271#define FUNCTION(fname) \
272 { \
273 .name = #fname, \
274 .groups = fname##_groups, \
275 .ngroups = ARRAY_SIZE(fname##_groups), \
276 }
277
278static const struct abx500_function ab8540_functions[] = {
279 FUNCTION(sysclkreq),
280 FUNCTION(gpio),
281 FUNCTION(pwmout),
282 FUNCTION(adi1),
283 FUNCTION(dmic),
284 FUNCTION(batremn),
285 FUNCTION(service),
286 FUNCTION(pwrctrl),
287 FUNCTION(pwmextvibra),
288 FUNCTION(gpio_vbat),
289 FUNCTION(pdm),
290};
291
292/*
293 * this table translates what's is in the AB8540 specification regarding the
294 * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
295 * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
296 * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
297 * AB8540 only supports DEFAULT and ALTA functions, so ALTERNATFUNC
298 * registers is not used
299 *
300 */
301
302struct alternate_functions ab8540_alternate_functions[AB8540_GPIO_MAX_NUMBER + 1] = {
303 /* GPIOSEL1 - bit 4-7 reserved */
304 ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
305 ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
306 ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
307 ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
308 ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
309 ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
310 ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
311 ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
312 ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
313 /* GPIOSEL2 - bit 0-4 reserved */
314 ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
315 ALTERNATE_FUNCTIONS(10, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO10 */
316 ALTERNATE_FUNCTIONS(11, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO11 */
317 ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
318 ALTERNATE_FUNCTIONS(13, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO13 */
319 ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
320 ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
321 ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
322 /* GPIOSEL3 - bit 4-7 reserved */
323 ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
324 ALTERNATE_FUNCTIONS(18, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 1 */
325 ALTERNATE_FUNCTIONS(19, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 2 */
326 ALTERNATE_FUNCTIONS(20, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 3 */
327 ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21 */
328 ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22 */
329 ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23 */
330 ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24 */
331 /* GPIOSEL4 - bit 0-1 reserved */
332 ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25 */
333 ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
334 ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
335 ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
336 ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
337 ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
338 ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
339 ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
340 /* GPIOSEL5 - bit 0-7 reserved */
341 ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
342 ALTERNATE_FUNCTIONS(34, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO34 */
343 ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
344 ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
345 ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
346 ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
347 ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
348 ALTERNATE_FUNCTIONS(40, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO40 */
349 /* GPIOSEL6 - bit 0 reserved */
350 ALTERNATE_FUNCTIONS(41, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO41 */
351 ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
352 ALTERNATE_FUNCTIONS(43, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO43, altA controlled by bit 2 */
353 ALTERNATE_FUNCTIONS(44, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO44, altA controlled by bit 3 */
354 ALTERNATE_FUNCTIONS(45, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO45, altA controlled by bit 4 */
355 ALTERNATE_FUNCTIONS(46, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO46, altA controlled by bit 5 */
356 ALTERNATE_FUNCTIONS(47, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO47, altA controlled by bit 6 */
357 ALTERNATE_FUNCTIONS(48, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO48, altA controlled by bit 7 */
358 /* GPIOSEL7 - bit 0-1 reserved */
359 ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
360 ALTERNATE_FUNCTIONS(50, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO50 */
361 ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
362 ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
363 ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
364 ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54, altA controlled by bit 5 */
365 ALTERNATE_FUNCTIONS(55, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO55, altA controlled by bit 6 */
366 ALTERNATE_FUNCTIONS(56, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO56, altA controlled by bit 7 */
367};
368
369static struct pullud ab8540_pullud = {
370 .first_pin = 51, /* GPIO1_VBAT */
371 .last_pin = 54, /* GPIO4_VBAT */
372};
373
374/*
375 * For AB8540 Only some GPIOs are interrupt capable:
376 * GPIO43 to GPIO44
377 * GPIO51 to GPIO54
378 */
379struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = {
380 GPIO_IRQ_CLUSTER(42, 43, 2), /* GPIO numbers start from 1 */
381 GPIO_IRQ_CLUSTER(50, 53, 0),
382};
383
384static struct abx500_pinctrl_soc_data ab8540_soc = {
385 .gpio_ranges = ab8540_pinranges,
386 .gpio_num_ranges = ARRAY_SIZE(ab8540_pinranges),
387 .pins = ab8540_pins,
388 .npins = ARRAY_SIZE(ab8540_pins),
389 .functions = ab8540_functions,
390 .nfunctions = ARRAY_SIZE(ab8540_functions),
391 .groups = ab8540_groups,
392 .ngroups = ARRAY_SIZE(ab8540_groups),
393 .alternate_functions = ab8540_alternate_functions,
394 .pullud = &ab8540_pullud,
395 .gpio_irq_cluster = ab8540_gpio_irq_cluster,
396 .ngpio_irq_cluster = ARRAY_SIZE(ab8540_gpio_irq_cluster),
397 .irq_gpio_rising_offset = AB8540_INT_GPIO43R,
398 .irq_gpio_falling_offset = AB8540_INT_GPIO43F,
399 .irq_gpio_factor = 2,
400};
401
402void
403abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
404{
405 *soc = &ab8540_soc;
406}
diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c
index 39020ac108ba..7046aef4fd6c 100644
--- a/drivers/pinctrl/pinctrl-abx500.c
+++ b/drivers/pinctrl/pinctrl-abx500.c
@@ -1119,6 +1119,9 @@ static int abx500_gpio_probe(struct platform_device *pdev)
1119 case PINCTRL_AB8500: 1119 case PINCTRL_AB8500:
1120 abx500_pinctrl_ab8500_init(&pct->soc); 1120 abx500_pinctrl_ab8500_init(&pct->soc);
1121 break; 1121 break;
1122 case PINCTRL_AB8540:
1123 abx500_pinctrl_ab8540_init(&pct->soc);
1124 break;
1122 case PINCTRL_AB9540: 1125 case PINCTRL_AB9540:
1123 abx500_pinctrl_ab9540_init(&pct->soc); 1126 abx500_pinctrl_ab9540_init(&pct->soc);
1124 break; 1127 break;
diff --git a/drivers/pinctrl/pinctrl-abx500.h b/drivers/pinctrl/pinctrl-abx500.h
index fe1ccb76c509..df8e0ff0c5d5 100644
--- a/drivers/pinctrl/pinctrl-abx500.h
+++ b/drivers/pinctrl/pinctrl-abx500.h
@@ -190,6 +190,19 @@ abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
190 190
191#endif 191#endif
192 192
193#ifdef CONFIG_PINCTRL_AB8540
194
195void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc);
196
197#else
198
199static inline void
200abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
201{
202}
203
204#endif
205
193#ifdef CONFIG_PINCTRL_AB9540 206#ifdef CONFIG_PINCTRL_AB9540
194 207
195void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc); 208void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 07:19:45 -0500