diff options
-rw-r--r-- | drivers/ata/ata_piix.c | 61 |
1 files changed, 25 insertions, 36 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index e6bf4fd51794..e113f2f80275 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -138,12 +138,11 @@ enum piix_controller_ids { | |||
138 | ich_pata_100, /* ICH up to UDMA 100 */ | 138 | ich_pata_100, /* ICH up to UDMA 100 */ |
139 | ich5_sata, | 139 | ich5_sata, |
140 | ich6_sata, | 140 | ich6_sata, |
141 | ich6_sata_ahci, | 141 | ich6m_sata, |
142 | ich6m_sata_ahci, | 142 | ich8_sata, |
143 | ich8_sata_ahci, | ||
144 | ich8_2port_sata, | 143 | ich8_2port_sata, |
145 | ich8m_apple_sata_ahci, /* locks up on second port enable */ | 144 | ich8m_apple_sata, /* locks up on second port enable */ |
146 | tolapai_sata_ahci, | 145 | tolapai_sata, |
147 | piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ | 146 | piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ |
148 | }; | 147 | }; |
149 | 148 | ||
@@ -235,27 +234,27 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
235 | /* 82801FB/FW (ICH6/ICH6W) */ | 234 | /* 82801FB/FW (ICH6/ICH6W) */ |
236 | { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, | 235 | { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
237 | /* 82801FR/FRW (ICH6R/ICH6RW) */ | 236 | /* 82801FR/FRW (ICH6R/ICH6RW) */ |
238 | { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 237 | { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
239 | /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented). | 238 | /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented). |
240 | * Attach iff the controller is in IDE mode. */ | 239 | * Attach iff the controller is in IDE mode. */ |
241 | { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, | 240 | { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, |
242 | PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata_ahci }, | 241 | PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata }, |
243 | /* 82801GB/GR/GH (ICH7, identical to ICH6) */ | 242 | /* 82801GB/GR/GH (ICH7, identical to ICH6) */ |
244 | { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 243 | { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
245 | /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ | 244 | /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ |
246 | { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, | 245 | { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata }, |
247 | /* Enterprise Southbridge 2 (631xESB/632xESB) */ | 246 | /* Enterprise Southbridge 2 (631xESB/632xESB) */ |
248 | { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 247 | { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
249 | /* SATA Controller 1 IDE (ICH8) */ | 248 | /* SATA Controller 1 IDE (ICH8) */ |
250 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 249 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
251 | /* SATA Controller 2 IDE (ICH8) */ | 250 | /* SATA Controller 2 IDE (ICH8) */ |
252 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 251 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
253 | /* Mobile SATA Controller IDE (ICH8M) */ | 252 | /* Mobile SATA Controller IDE (ICH8M) */ |
254 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 253 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
255 | /* Mobile SATA Controller IDE (ICH8M), Apple */ | 254 | /* Mobile SATA Controller IDE (ICH8M), Apple */ |
256 | { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci }, | 255 | { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata }, |
257 | /* SATA Controller IDE (ICH9) */ | 256 | /* SATA Controller IDE (ICH9) */ |
258 | { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 257 | { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
259 | /* SATA Controller IDE (ICH9) */ | 258 | /* SATA Controller IDE (ICH9) */ |
260 | { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 259 | { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
261 | /* SATA Controller IDE (ICH9) */ | 260 | /* SATA Controller IDE (ICH9) */ |
@@ -265,15 +264,15 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
265 | /* SATA Controller IDE (ICH9M) */ | 264 | /* SATA Controller IDE (ICH9M) */ |
266 | { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 265 | { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
267 | /* SATA Controller IDE (ICH9M) */ | 266 | /* SATA Controller IDE (ICH9M) */ |
268 | { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 267 | { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
269 | /* SATA Controller IDE (Tolapai) */ | 268 | /* SATA Controller IDE (Tolapai) */ |
270 | { 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata_ahci }, | 269 | { 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata }, |
271 | /* SATA Controller IDE (ICH10) */ | 270 | /* SATA Controller IDE (ICH10) */ |
272 | { 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 271 | { 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
273 | /* SATA Controller IDE (ICH10) */ | 272 | /* SATA Controller IDE (ICH10) */ |
274 | { 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 273 | { 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
275 | /* SATA Controller IDE (ICH10) */ | 274 | /* SATA Controller IDE (ICH10) */ |
276 | { 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 275 | { 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
277 | /* SATA Controller IDE (ICH10) */ | 276 | /* SATA Controller IDE (ICH10) */ |
278 | { 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 277 | { 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
279 | 278 | ||
@@ -421,12 +420,11 @@ static const struct piix_map_db tolapai_map_db = { | |||
421 | static const struct piix_map_db *piix_map_db_table[] = { | 420 | static const struct piix_map_db *piix_map_db_table[] = { |
422 | [ich5_sata] = &ich5_map_db, | 421 | [ich5_sata] = &ich5_map_db, |
423 | [ich6_sata] = &ich6_map_db, | 422 | [ich6_sata] = &ich6_map_db, |
424 | [ich6_sata_ahci] = &ich6_map_db, | 423 | [ich6m_sata] = &ich6m_map_db, |
425 | [ich6m_sata_ahci] = &ich6m_map_db, | 424 | [ich8_sata] = &ich8_map_db, |
426 | [ich8_sata_ahci] = &ich8_map_db, | ||
427 | [ich8_2port_sata] = &ich8_2port_map_db, | 425 | [ich8_2port_sata] = &ich8_2port_map_db, |
428 | [ich8m_apple_sata_ahci] = &ich8m_apple_map_db, | 426 | [ich8m_apple_sata] = &ich8m_apple_map_db, |
429 | [tolapai_sata_ahci] = &tolapai_map_db, | 427 | [tolapai_sata] = &tolapai_map_db, |
430 | }; | 428 | }; |
431 | 429 | ||
432 | static struct ata_port_info piix_port_info[] = { | 430 | static struct ata_port_info piix_port_info[] = { |
@@ -492,7 +490,7 @@ static struct ata_port_info piix_port_info[] = { | |||
492 | .port_ops = &piix_sata_ops, | 490 | .port_ops = &piix_sata_ops, |
493 | }, | 491 | }, |
494 | 492 | ||
495 | [ich6_sata_ahci] = | 493 | [ich6m_sata] = |
496 | { | 494 | { |
497 | .flags = PIIX_SATA_FLAGS, | 495 | .flags = PIIX_SATA_FLAGS, |
498 | .pio_mask = 0x1f, /* pio0-4 */ | 496 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -501,16 +499,7 @@ static struct ata_port_info piix_port_info[] = { | |||
501 | .port_ops = &piix_sata_ops, | 499 | .port_ops = &piix_sata_ops, |
502 | }, | 500 | }, |
503 | 501 | ||
504 | [ich6m_sata_ahci] = | 502 | [ich8_sata] = |
505 | { | ||
506 | .flags = PIIX_SATA_FLAGS, | ||
507 | .pio_mask = 0x1f, /* pio0-4 */ | ||
508 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
509 | .udma_mask = ATA_UDMA6, | ||
510 | .port_ops = &piix_sata_ops, | ||
511 | }, | ||
512 | |||
513 | [ich8_sata_ahci] = | ||
514 | { | 503 | { |
515 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, | 504 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, |
516 | .pio_mask = 0x1f, /* pio0-4 */ | 505 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -528,7 +517,7 @@ static struct ata_port_info piix_port_info[] = { | |||
528 | .port_ops = &piix_sata_ops, | 517 | .port_ops = &piix_sata_ops, |
529 | }, | 518 | }, |
530 | 519 | ||
531 | [tolapai_sata_ahci] = | 520 | [tolapai_sata] = |
532 | { | 521 | { |
533 | .flags = PIIX_SATA_FLAGS, | 522 | .flags = PIIX_SATA_FLAGS, |
534 | .pio_mask = 0x1f, /* pio0-4 */ | 523 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -537,7 +526,7 @@ static struct ata_port_info piix_port_info[] = { | |||
537 | .port_ops = &piix_sata_ops, | 526 | .port_ops = &piix_sata_ops, |
538 | }, | 527 | }, |
539 | 528 | ||
540 | [ich8m_apple_sata_ahci] = | 529 | [ich8m_apple_sata] = |
541 | { | 530 | { |
542 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, | 531 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, |
543 | .pio_mask = 0x1f, /* pio0-4 */ | 532 | .pio_mask = 0x1f, /* pio0-4 */ |