diff options
-rw-r--r-- | Documentation/DocBook/sh.tmpl | 4 | ||||
-rw-r--r-- | Documentation/sh/clk.txt | 32 | ||||
-rw-r--r-- | drivers/sh/clk/core.c | 12 | ||||
-rw-r--r-- | include/linux/sh_clk.h | 30 |
4 files changed, 3 insertions, 75 deletions
diff --git a/Documentation/DocBook/sh.tmpl b/Documentation/DocBook/sh.tmpl index d858d92cf6d9..4a38f604fa66 100644 --- a/Documentation/DocBook/sh.tmpl +++ b/Documentation/DocBook/sh.tmpl | |||
@@ -79,10 +79,6 @@ | |||
79 | </sect2> | 79 | </sect2> |
80 | </sect1> | 80 | </sect1> |
81 | </chapter> | 81 | </chapter> |
82 | <chapter id="clk"> | ||
83 | <title>Clock Framework Extensions</title> | ||
84 | !Iinclude/linux/sh_clk.h | ||
85 | </chapter> | ||
86 | <chapter id="mach"> | 82 | <chapter id="mach"> |
87 | <title>Machine Specific Interfaces</title> | 83 | <title>Machine Specific Interfaces</title> |
88 | <sect1 id="dreamcast"> | 84 | <sect1 id="dreamcast"> |
diff --git a/Documentation/sh/clk.txt b/Documentation/sh/clk.txt deleted file mode 100644 index 114b595cfa97..000000000000 --- a/Documentation/sh/clk.txt +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | Clock framework on SuperH architecture | ||
2 | |||
3 | The framework on SH extends existing API by the function clk_set_rate_ex, | ||
4 | which prototype is as follows: | ||
5 | |||
6 | clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id) | ||
7 | |||
8 | The algo_id parameter is used to specify algorithm used to recalculate clocks, | ||
9 | adjanced to clock, specified as first argument. It is assumed that algo_id==0 | ||
10 | means no changes to adjanced clock | ||
11 | |||
12 | Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method, | ||
13 | if it is present in ops structure. The method should set the clock rate and adjust | ||
14 | all needed clocks according to the passed algo_id. | ||
15 | Exact values for algo_id are machine-dependent. For the sh7722, the following | ||
16 | values are defined: | ||
17 | |||
18 | NO_CHANGE = 0, | ||
19 | IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */ | ||
20 | IUS_322, /* I:U:Sh = 3:2:2 */ | ||
21 | IUS_522, /* I:U:Sh = 5:2:2 */ | ||
22 | IUS_N11, /* I:U:Sh = N:1:1 */ | ||
23 | SB_N1, /* Sh:B = N:1 */ | ||
24 | SB3_N1, /* Sh:B3 = N:1 */ | ||
25 | SB3_32, /* Sh:B3 = 3:2 */ | ||
26 | SB3_43, /* Sh:B3 = 4:3 */ | ||
27 | SB3_54, /* Sh:B3 = 5:4 */ | ||
28 | BP_N1, /* B:P = N:1 */ | ||
29 | IP_N1 /* I:P = N:1 */ | ||
30 | |||
31 | Each of these constants means relation between clocks that can be set via the FRQCR | ||
32 | register | ||
diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c index cb12a8e1466b..69be6bb92323 100644 --- a/drivers/sh/clk/core.c +++ b/drivers/sh/clk/core.c | |||
@@ -455,19 +455,13 @@ EXPORT_SYMBOL_GPL(clk_get_rate); | |||
455 | 455 | ||
456 | int clk_set_rate(struct clk *clk, unsigned long rate) | 456 | int clk_set_rate(struct clk *clk, unsigned long rate) |
457 | { | 457 | { |
458 | return clk_set_rate_ex(clk, rate, 0); | ||
459 | } | ||
460 | EXPORT_SYMBOL_GPL(clk_set_rate); | ||
461 | |||
462 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) | ||
463 | { | ||
464 | int ret = -EOPNOTSUPP; | 458 | int ret = -EOPNOTSUPP; |
465 | unsigned long flags; | 459 | unsigned long flags; |
466 | 460 | ||
467 | spin_lock_irqsave(&clock_lock, flags); | 461 | spin_lock_irqsave(&clock_lock, flags); |
468 | 462 | ||
469 | if (likely(clk->ops && clk->ops->set_rate)) { | 463 | if (likely(clk->ops && clk->ops->set_rate)) { |
470 | ret = clk->ops->set_rate(clk, rate, algo_id); | 464 | ret = clk->ops->set_rate(clk, rate, 0); |
471 | if (ret != 0) | 465 | if (ret != 0) |
472 | goto out_unlock; | 466 | goto out_unlock; |
473 | } else { | 467 | } else { |
@@ -485,7 +479,7 @@ out_unlock: | |||
485 | 479 | ||
486 | return ret; | 480 | return ret; |
487 | } | 481 | } |
488 | EXPORT_SYMBOL_GPL(clk_set_rate_ex); | 482 | EXPORT_SYMBOL_GPL(clk_set_rate); |
489 | 483 | ||
490 | int clk_set_parent(struct clk *clk, struct clk *parent) | 484 | int clk_set_parent(struct clk *clk, struct clk *parent) |
491 | { | 485 | { |
@@ -654,7 +648,7 @@ static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state) | |||
654 | clkp->parent); | 648 | clkp->parent); |
655 | if (likely(clkp->ops->set_rate)) | 649 | if (likely(clkp->ops->set_rate)) |
656 | clkp->ops->set_rate(clkp, | 650 | clkp->ops->set_rate(clkp, |
657 | rate, NO_CHANGE); | 651 | rate, 0); |
658 | else if (likely(clkp->ops->recalc)) | 652 | else if (likely(clkp->ops->recalc)) |
659 | clkp->rate = clkp->ops->recalc(clkp); | 653 | clkp->rate = clkp->ops->recalc(clkp); |
660 | } | 654 | } |
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index cea0c38e7a63..30885d928801 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h | |||
@@ -67,36 +67,6 @@ int clk_register(struct clk *); | |||
67 | void clk_unregister(struct clk *); | 67 | void clk_unregister(struct clk *); |
68 | void clk_enable_init_clocks(void); | 68 | void clk_enable_init_clocks(void); |
69 | 69 | ||
70 | /** | ||
71 | * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter | ||
72 | * @clk: clock source | ||
73 | * @rate: desired clock rate in Hz | ||
74 | * @algo_id: algorithm id to be passed down to ops->set_rate | ||
75 | * | ||
76 | * Returns success (0) or negative errno. | ||
77 | */ | ||
78 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); | ||
79 | |||
80 | enum clk_sh_algo_id { | ||
81 | NO_CHANGE = 0, | ||
82 | |||
83 | IUS_N1_N1, | ||
84 | IUS_322, | ||
85 | IUS_522, | ||
86 | IUS_N11, | ||
87 | |||
88 | SB_N1, | ||
89 | |||
90 | SB3_N1, | ||
91 | SB3_32, | ||
92 | SB3_43, | ||
93 | SB3_54, | ||
94 | |||
95 | BP_N1, | ||
96 | |||
97 | IP_N1, | ||
98 | }; | ||
99 | |||
100 | struct clk_div_mult_table { | 70 | struct clk_div_mult_table { |
101 | unsigned int *divisors; | 71 | unsigned int *divisors; |
102 | unsigned int nr_divisors; | 72 | unsigned int nr_divisors; |