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-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-ns9xxx/irq.c22
-rw-r--r--arch/arm/mach-orion5x/addr-map.c66
-rw-r--r--arch/arm/mach-orion5x/common.c9
-rw-r--r--arch/arm/mach-orion5x/common.h1
-rw-r--r--arch/arm/mach-pxa/Makefile12
-rw-r--r--arch/arm/mach-pxa/corgi.c4
-rw-r--r--arch/arm/mach-pxa/cpu-pxa.c310
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/pm.c10
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c11
-rw-r--r--arch/arm/mach-pxa/pxa27x.c11
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c7
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c3
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-sa1100/pm.c8
-rw-r--r--arch/arm/plat-s3c24xx/clock.c4
-rw-r--r--arch/blackfin/Kconfig18
-rw-r--r--arch/blackfin/kernel/asm-offsets.c3
-rw-r--r--arch/blackfin/kernel/fixed_code.S2
-rw-r--r--arch/blackfin/kernel/module.c37
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/ptrace.c4
-rw-r--r--arch/blackfin/kernel/signal.c13
-rw-r--r--arch/blackfin/kernel/time-ts.c10
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c104
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c33
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c33
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c34
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/cpufreq.c26
-rw-r--r--arch/blackfin/mach-common/dpmc.c137
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S (renamed from arch/blackfin/mach-common/dpmc.S)27
-rw-r--r--arch/blackfin/mach-common/entry.S113
-rw-r--r--arch/cris/kernel/sys_cris.c22
-rw-r--r--arch/m32r/kernel/sys_m32r.c23
-rw-r--r--arch/mn10300/Kconfig11
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/kernel/btext.c1
-rw-r--r--arch/powerpc/kernel/cputable.c53
-rw-r--r--arch/powerpc/kernel/head_44x.S9
-rw-r--r--arch/powerpc/kernel/head_64.S4
-rw-r--r--arch/powerpc/kernel/isa-bridge.c3
-rw-r--r--arch/powerpc/kernel/setup_64.c10
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c53
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c31
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1_mmio.c16
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c17
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c10
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c38
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c7
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h3
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c71
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c180
-rw-r--r--arch/powerpc/xmon/xmon.c6
-rw-r--r--arch/sh/Kconfig17
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/mpc1211/Makefile8
-rw-r--r--arch/sh/boards/mpc1211/pci.c295
-rw-r--r--arch/sh/boards/mpc1211/rtc.c136
-rw-r--r--arch/sh/boards/mpc1211/setup.c347
-rw-r--r--arch/sh/boards/renesas/migor/setup.c11
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c24
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c7
-rw-r--r--arch/sh/boards/se/7206/setup.c17
-rw-r--r--arch/sh/boards/se/7722/setup.c6
-rw-r--r--arch/sh/boot/compressed/Makefile_321
-rw-r--r--arch/sh/boot/compressed/Makefile_641
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c73
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c93
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c4
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c71
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c22
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c32
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c25
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c35
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S28
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
-rw-r--r--arch/sh/kernel/early_printk.c30
-rw-r--r--arch/sh/kernel/setup.c46
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c2
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c26
-rw-r--r--arch/sh/kernel/time_64.c5
-rw-r--r--arch/sh/lib64/dbg.c2
-rw-r--r--arch/sh/mm/Makefile_647
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/ioremap_64.c2
-rw-r--r--arch/sh/mm/numa.c2
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c21
-rw-r--r--arch/x86/kernel/cpu/common.c27
-rw-r--r--arch/x86/kernel/geode_32.c19
-rw-r--r--arch/x86/kernel/i387.c12
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/setup_32.c7
-rw-r--r--arch/x86/kernel/setup_64.c13
-rw-r--r--arch/x86/mm/pat.c50
-rw-r--r--arch/x86/pci/k8-bus_64.c8
-rw-r--r--crypto/hmac.c25
-rw-r--r--drivers/input/serio/i8042-io.h2
-rw-r--r--drivers/mmc/host/mmci.c14
-rw-r--r--drivers/mtd/maps/Kconfig9
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/mpc1211.c80
-rw-r--r--drivers/rtc/rtc-sh.c14
-rw-r--r--drivers/serial/bfin_5xx.c98
-rw-r--r--drivers/serial/sh-sci.c32
-rw-r--r--drivers/serial/sh-sci.h27
-rw-r--r--drivers/video/pxafb.c8
-rw-r--r--fs/cifs/CHANGES3
-rw-r--r--fs/cifs/asn1.c10
-rw-r--r--fs/cifs/cifs_dfs_ref.c25
-rw-r--r--fs/cifs/cifsacl.c16
-rw-r--r--fs/cifs/cifsfs.c72
-rw-r--r--fs/cifs/cifsfs.h10
-rw-r--r--fs/cifs/cifsglob.h44
-rw-r--r--fs/cifs/cifspdu.h2
-rw-r--r--fs/cifs/cifsproto.h15
-rw-r--r--fs/cifs/cifssmb.c38
-rw-r--r--fs/cifs/connect.c153
-rw-r--r--fs/cifs/dir.c18
-rw-r--r--fs/cifs/dns_resolve.c62
-rw-r--r--fs/cifs/fcntl.c2
-rw-r--r--fs/cifs/file.c80
-rw-r--r--fs/cifs/inode.c46
-rw-r--r--fs/cifs/link.c2
-rw-r--r--fs/cifs/misc.c33
-rw-r--r--fs/cifs/netmisc.c32
-rw-r--r--fs/cifs/readdir.c12
-rw-r--r--fs/cifs/smbencrypt.c8
-rw-r--r--fs/cifs/xattr.c2
-rw-r--r--include/asm-arm/arch-pxa/pm.h2
-rw-r--r--include/asm-arm/arch-pxa/system.h3
-rw-r--r--include/asm-blackfin/dpmc.h10
-rw-r--r--include/asm-blackfin/entry.h5
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf533/defBF532.h2
-rw-r--r--include/asm-blackfin/mach-bf533/irq.h14
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf537/irq.h35
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h3
-rw-r--r--include/asm-blackfin/mach-bf548/defBF54x_base.h20
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h5
-rw-r--r--include/asm-blackfin/mach-bf561/defBF561.h28
-rw-r--r--include/asm-blackfin/mach-bf561/irq.h13
-rw-r--r--include/asm-blackfin/mach-common/context.S5
-rw-r--r--include/asm-blackfin/time.h4
-rw-r--r--include/asm-powerpc/pgtable-ppc32.h7
-rw-r--r--include/asm-powerpc/spu.h9
-rw-r--r--include/asm-powerpc/spu_csa.h3
-rw-r--r--include/asm-sh/cpu-sh3/dma.h10
-rw-r--r--include/asm-sh/hw_irq.h19
-rw-r--r--include/asm-sh/io.h12
-rw-r--r--include/asm-sh/keyboard.h13
-rw-r--r--include/asm-sh/mmu_context.h4
-rw-r--r--include/asm-sh/mmzone.h2
-rw-r--r--include/asm-sh/mpc1211/dma.h303
-rw-r--r--include/asm-sh/mpc1211/io.h22
-rw-r--r--include/asm-sh/mpc1211/keyboard.h60
-rw-r--r--include/asm-sh/mpc1211/m1543c.h200
-rw-r--r--include/asm-sh/mpc1211/mc146818rtc.h6
-rw-r--r--include/asm-sh/mpc1211/mpc1211.h18
-rw-r--r--include/asm-sh/mpc1211/pci.h38
-rw-r--r--include/asm-sh/r7780rp.h4
-rw-r--r--include/asm-sh/tlb_64.h10
-rw-r--r--include/asm-sh/topology.h11
-rw-r--r--include/asm-sh/uaccess_64.h2
-rw-r--r--include/asm-x86/bitops.h37
-rw-r--r--include/asm-x86/geode.h12
-rw-r--r--include/asm-x86/i387.h10
-rw-r--r--include/asm-x86/pat.h8
-rw-r--r--include/asm-x86/spinlock.h18
-rw-r--r--include/asm-x86/topology.h18
-rw-r--r--include/linux/compiler.h12
-rw-r--r--include/linux/hardirq.h18
-rw-r--r--include/linux/of_i2c.h4
-rw-r--r--include/linux/rcupdate.h12
-rw-r--r--include/linux/vermagic.h8
-rw-r--r--init/Kconfig6
-rw-r--r--kernel/module.c25
-rw-r--r--kernel/sched.c27
-rw-r--r--kernel/semaphore.c64
-rw-r--r--lib/kernel_lock.c120
-rw-r--r--net/ipv6/sit.c2
-rw-r--r--net/tipc/core.h11
200 files changed, 2680 insertions, 3051 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 8bc187240542..1d7bca6aa441 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -280,7 +280,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
280 const int port = gpio >> 3; 280 const int port = gpio >> 3;
281 const int port_mask = 1 << (gpio & 7); 281 const int port_mask = 1 << (gpio & 7);
282 282
283 gpio_direction_output(gpio, gpio_get_value(gpio)); 283 gpio_direction_input(gpio);
284 284
285 switch (type) { 285 switch (type) {
286 case IRQT_RISING: 286 case IRQT_RISING:
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 36e5835e6097..ca85d24cf39f 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -62,7 +62,7 @@ static struct irq_chip ns9xxx_chip = {
62#if 0 62#if 0
63#define handle_irq handle_level_irq 63#define handle_irq handle_level_irq
64#else 64#else
65void handle_prio_irq(unsigned int irq, struct irq_desc *desc) 65static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
66{ 66{
67 unsigned int cpu = smp_processor_id(); 67 unsigned int cpu = smp_processor_id();
68 struct irqaction *action; 68 struct irqaction *action;
@@ -70,27 +70,35 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
70 70
71 spin_lock(&desc->lock); 71 spin_lock(&desc->lock);
72 72
73 if (unlikely(desc->status & IRQ_INPROGRESS)) 73 BUG_ON(desc->status & IRQ_INPROGRESS);
74 goto out_unlock;
75 74
76 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); 75 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
77 kstat_cpu(cpu).irqs[irq]++; 76 kstat_cpu(cpu).irqs[irq]++;
78 77
79 action = desc->action; 78 action = desc->action;
80 if (unlikely(!action || (desc->status & IRQ_DISABLED))) 79 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
81 goto out_unlock; 80 goto out_mask;
82 81
83 desc->status |= IRQ_INPROGRESS; 82 desc->status |= IRQ_INPROGRESS;
84 spin_unlock(&desc->lock); 83 spin_unlock(&desc->lock);
85 84
86 action_ret = handle_IRQ_event(irq, action); 85 action_ret = handle_IRQ_event(irq, action);
87 86
87 /* XXX: There is no direct way to access noirqdebug, so check
88 * unconditionally for spurious irqs...
89 * Maybe this function should go to kernel/irq/chip.c? */
90 note_interrupt(irq, desc, action_ret);
91
88 spin_lock(&desc->lock); 92 spin_lock(&desc->lock);
89 desc->status &= ~IRQ_INPROGRESS; 93 desc->status &= ~IRQ_INPROGRESS;
90 if (!(desc->status & IRQ_DISABLED) && desc->chip->ack)
91 desc->chip->ack(irq);
92 94
93out_unlock: 95 if (desc->status & IRQ_DISABLED)
96out_mask:
97 desc->chip->mask(irq);
98
99 /* ack unconditionally to unmask lower prio irqs */
100 desc->chip->ack(irq);
101
94 spin_unlock(&desc->lock); 102 spin_unlock(&desc->lock);
95} 103}
96#define handle_irq handle_prio_irq 104#define handle_irq handle_prio_irq
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 9608503d67f5..e63fb05dc893 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -34,11 +34,7 @@
34 * Non-CPU Masters address decoding -- 34 * Non-CPU Masters address decoding --
35 * Unlike the CPU, we setup the access from Orion's master interfaces to DDR 35 * Unlike the CPU, we setup the access from Orion's master interfaces to DDR
36 * banks only (the typical use case). 36 * banks only (the typical use case).
37 * Setup access for each master to DDR is issued by common.c. 37 * Setup access for each master to DDR is issued by platform device setup.
38 *
39 * Note: although orion_setbits() and orion_clrbits() are not atomic
40 * no locking is necessary here since code in this file is only called
41 * at boot time when there is no concurrency issues.
42 */ 38 */
43 39
44/* 40/*
@@ -48,10 +44,6 @@
48#define TARGET_DEV_BUS 1 44#define TARGET_DEV_BUS 1
49#define TARGET_PCI 3 45#define TARGET_PCI 3
50#define TARGET_PCIE 4 46#define TARGET_PCIE 4
51#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \
52 ((n) == 1) ? 0xd : \
53 ((n) == 2) ? 0xb : \
54 ((n) == 3) ? 0x7 : 0xf)
55#define ATTR_PCIE_MEM 0x59 47#define ATTR_PCIE_MEM 0x59
56#define ATTR_PCIE_IO 0x51 48#define ATTR_PCIE_IO 0x51
57#define ATTR_PCIE_WA 0x79 49#define ATTR_PCIE_WA 0x79
@@ -61,17 +53,12 @@
61#define ATTR_DEV_CS1 0x1d 53#define ATTR_DEV_CS1 0x1d
62#define ATTR_DEV_CS2 0x1b 54#define ATTR_DEV_CS2 0x1b
63#define ATTR_DEV_BOOT 0xf 55#define ATTR_DEV_BOOT 0xf
64#define WIN_EN 1
65 56
66/* 57/*
67 * Helpers to get DDR bank info 58 * Helpers to get DDR bank info
68 */ 59 */
69#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) * 8)) 60#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
70#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) * 8)) 61#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
71#define DDR_MAX_CS 4
72#define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1)
73#define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000)
74#define DDR_BANK_EN 1
75 62
76/* 63/*
77 * CPU Address Decode Windows registers 64 * CPU Address Decode Windows registers
@@ -81,17 +68,6 @@
81#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4)) 68#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
82#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4)) 69#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
83 70
84/*
85 * Gigabit Ethernet Address Decode Windows registers
86 */
87#define ETH_WIN_BASE(win) ORION5X_ETH_REG(0x200 + ((win) * 8))
88#define ETH_WIN_SIZE(win) ORION5X_ETH_REG(0x204 + ((win) * 8))
89#define ETH_WIN_REMAP(win) ORION5X_ETH_REG(0x280 + ((win) * 4))
90#define ETH_WIN_EN ORION5X_ETH_REG(0x290)
91#define ETH_WIN_PROT ORION5X_ETH_REG(0x294)
92#define ETH_MAX_WIN 6
93#define ETH_MAX_REMAP_WIN 4
94
95 71
96struct mbus_dram_target_info orion5x_mbus_dram_info; 72struct mbus_dram_target_info orion5x_mbus_dram_info;
97 73
@@ -202,39 +178,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
202{ 178{
203 setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1); 179 setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
204} 180}
205
206void __init orion5x_setup_eth_wins(void)
207{
208 int i;
209
210 /*
211 * First, disable and clear windows
212 */
213 for (i = 0; i < ETH_MAX_WIN; i++) {
214 orion5x_write(ETH_WIN_BASE(i), 0);
215 orion5x_write(ETH_WIN_SIZE(i), 0);
216 orion5x_setbits(ETH_WIN_EN, 1 << i);
217 orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
218 if (i < ETH_MAX_REMAP_WIN)
219 orion5x_write(ETH_WIN_REMAP(i), 0);
220 }
221
222 /*
223 * Setup windows for DDR banks.
224 */
225 for (i = 0; i < DDR_MAX_CS; i++) {
226 u32 base, size;
227 size = orion5x_read(DDR_SIZE_CS(i));
228 base = orion5x_read(DDR_BASE_CS(i));
229 if (size & DDR_BANK_EN) {
230 base = DDR_REG_TO_BASE(base);
231 size = DDR_REG_TO_SIZE(size);
232 orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
233 orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
234 (ATTR_DDR_CS(i) << 8) |
235 TARGET_DDR);
236 orion5x_clrbits(ETH_WIN_EN, 1 << i);
237 orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
238 }
239 }
240}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0ecff5a61972..4f13fd037f04 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -190,6 +190,11 @@ static struct platform_device orion5x_ehci1 = {
190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) 190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
191 ****************************************************************************/ 191 ****************************************************************************/
192 192
193struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
194 .dram = &orion5x_mbus_dram_info,
195 .t_clk = ORION5X_TCLK,
196};
197
193static struct resource orion5x_eth_shared_resources[] = { 198static struct resource orion5x_eth_shared_resources[] = {
194 { 199 {
195 .start = ORION5X_ETH_PHYS_BASE + 0x2000, 200 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
@@ -201,6 +206,9 @@ static struct resource orion5x_eth_shared_resources[] = {
201static struct platform_device orion5x_eth_shared = { 206static struct platform_device orion5x_eth_shared = {
202 .name = MV643XX_ETH_SHARED_NAME, 207 .name = MV643XX_ETH_SHARED_NAME,
203 .id = 0, 208 .id = 0,
209 .dev = {
210 .platform_data = &orion5x_eth_shared_data,
211 },
204 .num_resources = 1, 212 .num_resources = 1,
205 .resource = orion5x_eth_shared_resources, 213 .resource = orion5x_eth_shared_resources,
206}; 214};
@@ -362,7 +370,6 @@ void __init orion5x_init(void)
362 * Setup Orion address map 370 * Setup Orion address map
363 */ 371 */
364 orion5x_setup_cpu_mbus_bridge(); 372 orion5x_setup_cpu_mbus_bridge();
365 orion5x_setup_eth_wins();
366 373
367 /* 374 /*
368 * Register devices. 375 * Register devices.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 14adf8d1a54a..bd0f05de6e18 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
22void orion5x_setup_dev1_win(u32 base, u32 size); 22void orion5x_setup_dev1_win(u32 base, u32 size);
23void orion5x_setup_dev2_win(u32 base, u32 size); 23void orion5x_setup_dev2_win(u32 base, u32 size);
24void orion5x_setup_pcie_wa_win(u32 base, u32 size); 24void orion5x_setup_pcie_wa_win(u32 base, u32 size);
25void orion5x_setup_eth_wins(void);
26 25
27/* 26/*
28 * Shared code used internally by other Orion core functions. 27 * Shared code used internally by other Orion core functions.
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 6a830853aa6a..0e6d05bb81aa 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -5,6 +5,13 @@
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += clock.o devices.o generic.o irq.o dma.o \ 6obj-y += clock.o devices.o generic.o irq.o dma.o \
7 time.o gpio.o 7 time.o gpio.o
8obj-$(CONFIG_PM) += pm.o sleep.o standby.o
9obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
10
11# Generic drivers that other drivers may depend upon
12obj-$(CONFIG_PXA_SSP) += ssp.o
13
14# SoC-specific code
8obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o 15obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o
9obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o 16obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o
10obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o 17obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o
@@ -48,11 +55,6 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
48 55
49obj-$(CONFIG_LEDS) += $(led-y) 56obj-$(CONFIG_LEDS) += $(led-y)
50 57
51# Misc features
52obj-$(CONFIG_PM) += pm.o sleep.o standby.o
53obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
54obj-$(CONFIG_PXA_SSP) += ssp.o
55
56ifeq ($(CONFIG_PCI),y) 58ifeq ($(CONFIG_PCI),y)
57obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o 59obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
58endif 60endif
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 259ca821e464..b757dd756655 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -493,8 +493,6 @@ static struct platform_device *devices[] __initdata = {
493 493
494static void corgi_poweroff(void) 494static void corgi_poweroff(void)
495{ 495{
496 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
497
498 if (!machine_is_corgi()) 496 if (!machine_is_corgi())
499 /* Green LED off tells the bootloader to halt */ 497 /* Green LED off tells the bootloader to halt */
500 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 498 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
@@ -503,8 +501,6 @@ static void corgi_poweroff(void)
503 501
504static void corgi_restart(char mode) 502static void corgi_restart(char mode)
505{ 503{
506 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
507
508 if (!machine_is_corgi()) 504 if (!machine_is_corgi())
509 /* Green LED on tells the bootloader to reboot */ 505 /* Green LED on tells the bootloader to reboot */
510 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 506 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c
index 4b21479332ae..fb9ba1ab2826 100644
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -49,125 +49,216 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
49#define freq_debug 0 49#define freq_debug 0
50#endif 50#endif
51 51
52static unsigned int pxa27x_maxfreq;
53module_param(pxa27x_maxfreq, uint, 0);
54MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
55 "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
56
52typedef struct { 57typedef struct {
53 unsigned int khz; 58 unsigned int khz;
54 unsigned int membus; 59 unsigned int membus;
55 unsigned int cccr; 60 unsigned int cccr;
56 unsigned int div2; 61 unsigned int div2;
62 unsigned int cclkcfg;
57} pxa_freqs_t; 63} pxa_freqs_t;
58 64
59/* Define the refresh period in mSec for the SDRAM and the number of rows */ 65/* Define the refresh period in mSec for the SDRAM and the number of rows */
60#define SDRAM_TREF 64 /* standard 64ms SDRAM */ 66#define SDRAM_TREF 64 /* standard 64ms SDRAM */
61#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ 67#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
62#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32))
63
64#define CCLKCFG_TURBO 0x1
65#define CCLKCFG_FCS 0x2
66#define PXA25x_MIN_FREQ 99500
67#define PXA25x_MAX_FREQ 398100
68#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
69#define MDREFR_DRI_MASK 0xFFF
70 68
69#define CCLKCFG_TURBO 0x1
70#define CCLKCFG_FCS 0x2
71#define CCLKCFG_HALFTURBO 0x4
72#define CCLKCFG_FASTBUS 0x8
73#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
74#define MDREFR_DRI_MASK 0xFFF
71 75
76/*
77 * PXA255 definitions
78 */
72/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ 79/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
80#define CCLKCFG CCLKCFG_TURBO | CCLKCFG_FCS
81
73static pxa_freqs_t pxa255_run_freqs[] = 82static pxa_freqs_t pxa255_run_freqs[] =
74{ 83{
75 /* CPU MEMBUS CCCR DIV2*/ 84 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
76 { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */ 85 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
77 {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */ 86 {132700, 132700, 0x123, 1, CCLKCFG}, /* 133, 133, 66, 66 */
78 {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */ 87 {199100, 99500, 0x141, 0, CCLKCFG}, /* 199, 199, 99, 99 */
79 {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */ 88 {265400, 132700, 0x143, 1, CCLKCFG}, /* 265, 265, 133, 66 */
80 {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */ 89 {331800, 165900, 0x145, 1, CCLKCFG}, /* 331, 331, 166, 83 */
81 {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */ 90 {398100, 99500, 0x161, 0, CCLKCFG}, /* 398, 398, 196, 99 */
82 {0,}
83}; 91};
84#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
85
86static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
87 92
88/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ 93/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
89static pxa_freqs_t pxa255_turbo_freqs[] = 94static pxa_freqs_t pxa255_turbo_freqs[] =
90{ 95{
91 /* CPU MEMBUS CCCR DIV2*/ 96 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
92 { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */ 97 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
93 {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */ 98 {199100, 99500, 0x221, 0, CCLKCFG}, /* 99, 199, 50, 99 */
94 {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */ 99 {298500, 99500, 0x321, 0, CCLKCFG}, /* 99, 287, 50, 99 */
95 {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */ 100 {298600, 99500, 0x1c1, 0, CCLKCFG}, /* 199, 287, 99, 99 */
96 {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */ 101 {398100, 99500, 0x241, 0, CCLKCFG}, /* 199, 398, 99, 99 */
97 {0,} 102};
103
104#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
105#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
106
107static struct cpufreq_frequency_table
108 pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
109static struct cpufreq_frequency_table
110 pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
111
112/*
113 * PXA270 definitions
114 *
115 * For the PXA27x:
116 * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
117 *
118 * A = 0 => memory controller clock from table 3-7,
119 * A = 1 => memory controller clock = system bus clock
120 * Run mode frequency = 13 MHz * L
121 * Turbo mode frequency = 13 MHz * L * N
122 * System bus frequency = 13 MHz * L / (B + 1)
123 *
124 * In CCCR:
125 * A = 1
126 * L = 16 oscillator to run mode ratio
127 * 2N = 6 2 * (turbo mode to run mode ratio)
128 *
129 * In CCLKCFG:
130 * B = 1 Fast bus mode
131 * HT = 0 Half-Turbo mode
132 * T = 1 Turbo mode
133 *
134 * For now, just support some of the combinations in table 3-7 of
135 * PXA27x Processor Family Developer's Manual to simplify frequency
136 * change sequences.
137 */
138#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
139#define CCLKCFG2(B, HT, T) \
140 (CCLKCFG_FCS | \
141 ((B) ? CCLKCFG_FASTBUS : 0) | \
142 ((HT) ? CCLKCFG_HALFTURBO : 0) | \
143 ((T) ? CCLKCFG_TURBO : 0))
144
145static pxa_freqs_t pxa27x_freqs[] = {
146 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1)},
147 {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1)},
148 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)},
149 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)},
150 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)},
151 {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)},
152 {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)}
98}; 153};
99#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
100 154
101static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; 155#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
156static struct cpufreq_frequency_table
157 pxa27x_freq_table[NUM_PXA27x_FREQS+1];
102 158
103extern unsigned get_clk_frequency_khz(int info); 159extern unsigned get_clk_frequency_khz(int info);
104 160
161static void find_freq_tables(struct cpufreq_policy *policy,
162 struct cpufreq_frequency_table **freq_table,
163 pxa_freqs_t **pxa_freqs)
164{
165 if (cpu_is_pxa25x()) {
166 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
167 *pxa_freqs = pxa255_run_freqs;
168 *freq_table = pxa255_run_freq_table;
169 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
170 *pxa_freqs = pxa255_turbo_freqs;
171 *freq_table = pxa255_turbo_freq_table;
172 } else {
173 printk("CPU PXA: Unknown policy found. "
174 "Using CPUFREQ_POLICY_PERFORMANCE\n");
175 *pxa_freqs = pxa255_run_freqs;
176 *freq_table = pxa255_run_freq_table;
177 }
178 }
179 if (cpu_is_pxa27x()) {
180 *pxa_freqs = pxa27x_freqs;
181 *freq_table = pxa27x_freq_table;
182 }
183}
184
185static void pxa27x_guess_max_freq(void)
186{
187 if (!pxa27x_maxfreq) {
188 pxa27x_maxfreq = 416000;
189 printk(KERN_INFO "PXA CPU 27x max frequency not defined "
190 "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
191 pxa27x_maxfreq);
192 } else {
193 pxa27x_maxfreq *= 1000;
194 }
195}
196
197static u32 mdrefr_dri(unsigned int freq)
198{
199 u32 dri = 0;
200
201 if (cpu_is_pxa25x())
202 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
203 if (cpu_is_pxa27x())
204 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
205 return dri;
206}
207
105/* find a valid frequency point */ 208/* find a valid frequency point */
106static int pxa_verify_policy(struct cpufreq_policy *policy) 209static int pxa_verify_policy(struct cpufreq_policy *policy)
107{ 210{
108 struct cpufreq_frequency_table *pxa_freqs_table; 211 struct cpufreq_frequency_table *pxa_freqs_table;
212 pxa_freqs_t *pxa_freqs;
109 int ret; 213 int ret;
110 214
111 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 215 find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
112 pxa_freqs_table = pxa255_run_freq_table;
113 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
114 pxa_freqs_table = pxa255_turbo_freq_table;
115 } else {
116 printk("CPU PXA: Unknown policy found. "
117 "Using CPUFREQ_POLICY_PERFORMANCE\n");
118 pxa_freqs_table = pxa255_run_freq_table;
119 }
120
121 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); 216 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
122 217
123 if (freq_debug) 218 if (freq_debug)
124 pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n", 219 pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n",
125 policy->min, policy->max); 220 policy->min, policy->max);
126 221
127 return ret; 222 return ret;
128} 223}
129 224
225static unsigned int pxa_cpufreq_get(unsigned int cpu)
226{
227 return get_clk_frequency_khz(0);
228}
229
130static int pxa_set_target(struct cpufreq_policy *policy, 230static int pxa_set_target(struct cpufreq_policy *policy,
131 unsigned int target_freq, 231 unsigned int target_freq,
132 unsigned int relation) 232 unsigned int relation)
133{ 233{
134 struct cpufreq_frequency_table *pxa_freqs_table; 234 struct cpufreq_frequency_table *pxa_freqs_table;
135 pxa_freqs_t *pxa_freq_settings; 235 pxa_freqs_t *pxa_freq_settings;
136 struct cpufreq_freqs freqs; 236 struct cpufreq_freqs freqs;
137 unsigned int idx; 237 unsigned int idx;
138 unsigned long flags; 238 unsigned long flags;
139 unsigned int unused, preset_mdrefr, postset_mdrefr; 239 unsigned int new_freq_cpu, new_freq_mem;
140 void *ramstart = phys_to_virt(0xa0000000); 240 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
141 241
142 /* Get the current policy */ 242 /* Get the current policy */
143 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 243 find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
144 pxa_freq_settings = pxa255_run_freqs;
145 pxa_freqs_table = pxa255_run_freq_table;
146 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
147 pxa_freq_settings = pxa255_turbo_freqs;
148 pxa_freqs_table = pxa255_turbo_freq_table;
149 } else {
150 printk("CPU PXA: Unknown policy found. "
151 "Using CPUFREQ_POLICY_PERFORMANCE\n");
152 pxa_freq_settings = pxa255_run_freqs;
153 pxa_freqs_table = pxa255_run_freq_table;
154 }
155 244
156 /* Lookup the next frequency */ 245 /* Lookup the next frequency */
157 if (cpufreq_frequency_table_target(policy, pxa_freqs_table, 246 if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
158 target_freq, relation, &idx)) { 247 target_freq, relation, &idx)) {
159 return -EINVAL; 248 return -EINVAL;
160 } 249 }
161 250
251 new_freq_cpu = pxa_freq_settings[idx].khz;
252 new_freq_mem = pxa_freq_settings[idx].membus;
162 freqs.old = policy->cur; 253 freqs.old = policy->cur;
163 freqs.new = pxa_freq_settings[idx].khz; 254 freqs.new = new_freq_cpu;
164 freqs.cpu = policy->cpu; 255 freqs.cpu = policy->cpu;
165 256
166 if (freq_debug) 257 if (freq_debug)
167 pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", 258 pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "
168 freqs.new / 1000, (pxa_freq_settings[idx].div2) ? 259 "(SDRAM %d Mhz)\n",
169 (pxa_freq_settings[idx].membus / 2000) : 260 freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
170 (pxa_freq_settings[idx].membus / 1000)); 261 (new_freq_mem / 2000) : (new_freq_mem / 1000));
171 262
172 /* 263 /*
173 * Tell everyone what we're about to do... 264 * Tell everyone what we're about to do...
@@ -177,16 +268,16 @@ static int pxa_set_target(struct cpufreq_policy *policy,
177 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 268 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
178 269
179 /* Calculate the next MDREFR. If we're slowing down the SDRAM clock 270 /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
180 * we need to preset the smaller DRI before the change. If we're speeding 271 * we need to preset the smaller DRI before the change. If we're
181 * up we need to set the larger DRI value after the change. 272 * speeding up we need to set the larger DRI value after the change.
182 */ 273 */
183 preset_mdrefr = postset_mdrefr = MDREFR; 274 preset_mdrefr = postset_mdrefr = MDREFR;
184 if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) { 275 if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
185 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | 276 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
186 MDREFR_DRI(pxa_freq_settings[idx].membus); 277 preset_mdrefr |= mdrefr_dri(new_freq_mem);
187 } 278 }
188 postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | 279 postset_mdrefr =
189 MDREFR_DRI(pxa_freq_settings[idx].membus); 280 (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem);
190 281
191 /* If we're dividing the memory clock by two for the SDRAM clock, this 282 /* If we're dividing the memory clock by two for the SDRAM clock, this
192 * must be set prior to the change. Clearing the divide must be done 283 * must be set prior to the change. Clearing the divide must be done
@@ -201,26 +292,27 @@ static int pxa_set_target(struct cpufreq_policy *policy,
201 292
202 local_irq_save(flags); 293 local_irq_save(flags);
203 294
204 /* Set new the CCCR */ 295 /* Set new the CCCR and prepare CCLKCFG */
205 CCCR = pxa_freq_settings[idx].cccr; 296 CCCR = pxa_freq_settings[idx].cccr;
297 cclkcfg = pxa_freq_settings[idx].cclkcfg;
206 298
207 asm volatile(" \n\ 299 asm volatile(" \n\
208 ldr r4, [%1] /* load MDREFR */ \n\ 300 ldr r4, [%1] /* load MDREFR */ \n\
209 b 2f \n\ 301 b 2f \n\
210 .align 5 \n\ 302 .align 5 \n\
2111: \n\ 3031: \n\
212 str %4, [%1] /* preset the MDREFR */ \n\ 304 str %3, [%1] /* preset the MDREFR */ \n\
213 mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ 305 mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\
214 str %5, [%1] /* postset the MDREFR */ \n\ 306 str %4, [%1] /* postset the MDREFR */ \n\
215 \n\ 307 \n\
216 b 3f \n\ 308 b 3f \n\
2172: b 1b \n\ 3092: b 1b \n\
2183: nop \n\ 3103: nop \n\
219 " 311 "
220 : "=&r" (unused) 312 : "=&r" (unused)
221 : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), 313 : "r" (&MDREFR), "r" (cclkcfg),
222 "r" (preset_mdrefr), "r" (postset_mdrefr) 314 "r" (preset_mdrefr), "r" (postset_mdrefr)
223 : "r4", "r5"); 315 : "r4", "r5");
224 local_irq_restore(flags); 316 local_irq_restore(flags);
225 317
226 /* 318 /*
@@ -233,38 +325,57 @@ static int pxa_set_target(struct cpufreq_policy *policy,
233 return 0; 325 return 0;
234} 326}
235 327
236static unsigned int pxa_cpufreq_get(unsigned int cpu) 328static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
237{
238 return get_clk_frequency_khz(0);
239}
240
241static int pxa_cpufreq_init(struct cpufreq_policy *policy)
242{ 329{
243 int i; 330 int i;
331 unsigned int freq;
332
333 /* try to guess pxa27x cpu */
334 if (cpu_is_pxa27x())
335 pxa27x_guess_max_freq();
244 336
245 /* set default policy and cpuinfo */ 337 /* set default policy and cpuinfo */
246 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 338 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
247 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 339 if (cpu_is_pxa25x())
248 policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; 340 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
249 policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
250 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 341 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
251 policy->cur = get_clk_frequency_khz(0); /* current freq */ 342 policy->cur = get_clk_frequency_khz(0); /* current freq */
252 policy->min = policy->max = policy->cur; 343 policy->min = policy->max = policy->cur;
253 344
254 /* Generate the run cpufreq_frequency_table struct */ 345 /* Generate pxa25x the run cpufreq_frequency_table struct */
255 for (i = 0; i < NUM_RUN_FREQS; i++) { 346 for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
256 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; 347 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
257 pxa255_run_freq_table[i].index = i; 348 pxa255_run_freq_table[i].index = i;
258 } 349 }
259
260 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; 350 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
261 /* Generate the turbo cpufreq_frequency_table struct */ 351
262 for (i = 0; i < NUM_TURBO_FREQS; i++) { 352 /* Generate pxa25x the turbo cpufreq_frequency_table struct */
263 pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; 353 for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
354 pxa255_turbo_freq_table[i].frequency =
355 pxa255_turbo_freqs[i].khz;
264 pxa255_turbo_freq_table[i].index = i; 356 pxa255_turbo_freq_table[i].index = i;
265 } 357 }
266 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 358 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
267 359
360 /* Generate the pxa27x cpufreq_frequency_table struct */
361 for (i = 0; i < NUM_PXA27x_FREQS; i++) {
362 freq = pxa27x_freqs[i].khz;
363 if (freq > pxa27x_maxfreq)
364 break;
365 pxa27x_freq_table[i].frequency = freq;
366 pxa27x_freq_table[i].index = i;
367 }
368 pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
369
370 /*
371 * Set the policy's minimum and maximum frequencies from the tables
372 * just constructed. This sets cpuinfo.mxx_freq, min and max.
373 */
374 if (cpu_is_pxa25x())
375 cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
376 else if (cpu_is_pxa27x())
377 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
378
268 printk(KERN_INFO "PXA CPU frequency change support initialized\n"); 379 printk(KERN_INFO "PXA CPU frequency change support initialized\n");
269 380
270 return 0; 381 return 0;
@@ -275,26 +386,25 @@ static struct cpufreq_driver pxa_cpufreq_driver = {
275 .target = pxa_set_target, 386 .target = pxa_set_target,
276 .init = pxa_cpufreq_init, 387 .init = pxa_cpufreq_init,
277 .get = pxa_cpufreq_get, 388 .get = pxa_cpufreq_get,
278 .name = "PXA25x", 389 .name = "PXA2xx",
279}; 390};
280 391
281static int __init pxa_cpu_init(void) 392static int __init pxa_cpu_init(void)
282{ 393{
283 int ret = -ENODEV; 394 int ret = -ENODEV;
284 if (cpu_is_pxa25x()) 395 if (cpu_is_pxa25x() || cpu_is_pxa27x())
285 ret = cpufreq_register_driver(&pxa_cpufreq_driver); 396 ret = cpufreq_register_driver(&pxa_cpufreq_driver);
286 return ret; 397 return ret;
287} 398}
288 399
289static void __exit pxa_cpu_exit(void) 400static void __exit pxa_cpu_exit(void)
290{ 401{
291 if (cpu_is_pxa25x()) 402 cpufreq_unregister_driver(&pxa_cpufreq_driver);
292 cpufreq_unregister_driver(&pxa_cpufreq_driver);
293} 403}
294 404
295 405
296MODULE_AUTHOR ("Intrinsyc Software Inc."); 406MODULE_AUTHOR("Intrinsyc Software Inc.");
297MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture"); 407MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
298MODULE_LICENSE("GPL"); 408MODULE_LICENSE("GPL");
299module_init(pxa_cpu_init); 409module_init(pxa_cpu_init);
300module_exit(pxa_cpu_exit); 410module_exit(pxa_cpu_exit);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 0993f4d1a0bc..7b9bdd0c6665 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -396,7 +396,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
396 .cmap_inverse = 0, 396 .cmap_inverse = 0,
397 .cmap_static = 0, 397 .cmap_static = 0,
398 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | 398 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
399 LCD_AC_BIAS_FREQ(255); 399 LCD_AC_BIAS_FREQ(255),
400}; 400};
401 401
402#define MMC_POLL_RATE msecs_to_jiffies(1000) 402#define MMC_POLL_RATE msecs_to_jiffies(1000)
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index ec1bbf333a3a..7d4debbdcca3 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -42,20 +42,17 @@ int pxa_pm_enter(suspend_state_t state)
42 if (state != PM_SUSPEND_STANDBY) { 42 if (state != PM_SUSPEND_STANDBY) {
43 pxa_cpu_pm_fns->save(sleep_save); 43 pxa_cpu_pm_fns->save(sleep_save);
44 /* before sleeping, calculate and save a checksum */ 44 /* before sleeping, calculate and save a checksum */
45 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) 45 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
46 sleep_save_checksum += sleep_save[i]; 46 sleep_save_checksum += sleep_save[i];
47 } 47 }
48 48
49 /* Clear reset status */
50 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
51
52 /* *** go zzz *** */ 49 /* *** go zzz *** */
53 pxa_cpu_pm_fns->enter(state); 50 pxa_cpu_pm_fns->enter(state);
54 cpu_init(); 51 cpu_init();
55 52
56 if (state != PM_SUSPEND_STANDBY) { 53 if (state != PM_SUSPEND_STANDBY) {
57 /* after sleeping, validate the checksum */ 54 /* after sleeping, validate the checksum */
58 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) 55 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
59 checksum += sleep_save[i]; 56 checksum += sleep_save[i];
60 57
61 /* if invalid, display message and wait for a hardware reset */ 58 /* if invalid, display message and wait for a hardware reset */
@@ -101,7 +98,8 @@ static int __init pxa_pm_init(void)
101 return -EINVAL; 98 return -EINVAL;
102 } 99 }
103 100
104 sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL); 101 sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long),
102 GFP_KERNEL);
105 if (!sleep_save) { 103 if (!sleep_save) {
106 printk(KERN_ERR "failed to alloc memory for pm save\n"); 104 printk(KERN_ERR "failed to alloc memory for pm save\n");
107 return -ENOMEM; 105 return -ENOMEM;
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ca5ac196b47b..0b30f25cff3c 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -326,13 +326,11 @@ static struct platform_device *devices[] __initdata = {
326 326
327static void poodle_poweroff(void) 327static void poodle_poweroff(void)
328{ 328{
329 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
330 arm_machine_restart('h'); 329 arm_machine_restart('h');
331} 330}
332 331
333static void poodle_restart(char mode) 332static void poodle_restart(char mode)
334{ 333{
335 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
336 arm_machine_restart('h'); 334 arm_machine_restart('h');
337} 335}
338 336
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index d9b5450aee5b..e5b417d14bb0 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -150,9 +150,7 @@ static struct clk pxa25x_clks[] = {
150 * More ones like CP and general purpose register values are preserved 150 * More ones like CP and general purpose register values are preserved
151 * with the stack pointer in sleep.S. 151 * with the stack pointer in sleep.S.
152 */ 152 */
153enum { SLEEP_SAVE_START = 0, 153enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
154
155 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
156 154
157 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, 155 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
158 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, 156 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -162,7 +160,7 @@ enum { SLEEP_SAVE_START = 0,
162 160
163 SLEEP_SAVE_CKEN, 161 SLEEP_SAVE_CKEN,
164 162
165 SLEEP_SAVE_SIZE 163 SLEEP_SAVE_COUNT
166}; 164};
167 165
168 166
@@ -200,6 +198,9 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
200 198
201static void pxa25x_cpu_pm_enter(suspend_state_t state) 199static void pxa25x_cpu_pm_enter(suspend_state_t state)
202{ 200{
201 /* Clear reset status */
202 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
203
203 switch (state) { 204 switch (state) {
204 case PM_SUSPEND_MEM: 205 case PM_SUSPEND_MEM:
205 /* set resume return address */ 206 /* set resume return address */
@@ -210,7 +211,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
210} 211}
211 212
212static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { 213static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
213 .save_size = SLEEP_SAVE_SIZE, 214 .save_count = SLEEP_SAVE_COUNT,
214 .valid = suspend_valid_only_mem, 215 .valid = suspend_valid_only_mem,
215 .save = pxa25x_cpu_pm_save, 216 .save = pxa25x_cpu_pm_save,
216 .restore = pxa25x_cpu_pm_restore, 217 .restore = pxa25x_cpu_pm_restore,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7a2449dd0fd4..7e945836e129 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -181,9 +181,7 @@ static struct clk pxa27x_clks[] = {
181 * More ones like CP and general purpose register values are preserved 181 * More ones like CP and general purpose register values are preserved
182 * with the stack pointer in sleep.S. 182 * with the stack pointer in sleep.S.
183 */ 183 */
184enum { SLEEP_SAVE_START = 0, 184enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
185
186 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
187 185
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, 186 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, 187 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -198,7 +196,7 @@ enum { SLEEP_SAVE_START = 0,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 196 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, 197 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200 198
201 SLEEP_SAVE_SIZE 199 SLEEP_SAVE_COUNT
202}; 200};
203 201
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 202void pxa27x_cpu_pm_save(unsigned long *sleep_save)
@@ -251,6 +249,9 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
251 /* Clear edge-detect status register. */ 249 /* Clear edge-detect status register. */
252 PEDR = 0xDF12FE1B; 250 PEDR = 0xDF12FE1B;
253 251
252 /* Clear reset status */
253 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
254
254 switch (state) { 255 switch (state) {
255 case PM_SUSPEND_STANDBY: 256 case PM_SUSPEND_STANDBY:
256 pxa_cpu_standby(); 257 pxa_cpu_standby();
@@ -269,7 +270,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
269} 270}
270 271
271static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { 272static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
272 .save_size = SLEEP_SAVE_SIZE, 273 .save_count = SLEEP_SAVE_COUNT,
273 .save = pxa27x_cpu_pm_save, 274 .save = pxa27x_cpu_pm_save,
274 .restore = pxa27x_cpu_pm_restore, 275 .restore = pxa27x_cpu_pm_restore,
275 .valid = pxa27x_cpu_pm_valid, 276 .valid = pxa27x_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b6a6f5fcc77a..644550bfa330 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -256,12 +256,11 @@ static unsigned long wakeup_src;
256#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 256#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
257#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 257#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
258 258
259enum { SLEEP_SAVE_START = 0, 259enum { SLEEP_SAVE_CKENA,
260 SLEEP_SAVE_CKENA,
261 SLEEP_SAVE_CKENB, 260 SLEEP_SAVE_CKENB,
262 SLEEP_SAVE_ACCR, 261 SLEEP_SAVE_ACCR,
263 262
264 SLEEP_SAVE_SIZE, 263 SLEEP_SAVE_COUNT,
265}; 264};
266 265
267static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) 266static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
@@ -376,7 +375,7 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
376} 375}
377 376
378static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { 377static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
379 .save_size = SLEEP_SAVE_SIZE, 378 .save_count = SLEEP_SAVE_COUNT,
380 .save = pxa3xx_cpu_pm_save, 379 .save = pxa3xx_cpu_pm_save,
381 .restore = pxa3xx_cpu_pm_restore, 380 .restore = pxa3xx_cpu_pm_restore,
382 .valid = pxa3xx_cpu_pm_valid, 381 .valid = pxa3xx_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 62a02c3927c5..e7d0fcd9b43f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -529,8 +529,6 @@ static struct platform_device *devices[] __initdata = {
529 529
530static void spitz_poweroff(void) 530static void spitz_poweroff(void)
531{ 531{
532 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
533
534 pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT); 532 pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
535 GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET); 533 GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
536 534
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 7a7f5f947cc5..23f050feb208 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -119,9 +119,6 @@ static void spitz_presuspend(void)
119 /* nRESET_OUT Disable */ 119 /* nRESET_OUT Disable */
120 PSLR |= PSLR_SL_ROD; 120 PSLR |= PSLR_SL_ROD;
121 121
122 /* Clear reset status */
123 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
124
125 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 122 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
126 PCFR = PCFR_GPR_EN | PCFR_OPDE; 123 PCFR = PCFR_GPR_EN | PCFR_OPDE;
127} 124}
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 6458f6d371d9..c2cbd66db814 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -467,8 +467,6 @@ static struct platform_device *devices[] __initdata = {
467 467
468static void tosa_poweroff(void) 468static void tosa_poweroff(void)
469{ 469{
470 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
471
472 pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); 470 pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
473 GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); 471 GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
474 472
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 246c573e7252..1693d447a224 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -43,20 +43,18 @@ extern void sa1100_cpu_resume(void);
43 * More ones like CP and general purpose register values are preserved 43 * More ones like CP and general purpose register values are preserved
44 * on the stack and then the stack pointer is stored last in sleep.S. 44 * on the stack and then the stack pointer is stored last in sleep.S.
45 */ 45 */
46enum { SLEEP_SAVE_SP = 0, 46enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
47
48 SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
49 SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR, 47 SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
50 48
51 SLEEP_SAVE_Ser1SDCR0, 49 SLEEP_SAVE_Ser1SDCR0,
52 50
53 SLEEP_SAVE_SIZE 51 SLEEP_SAVE_COUNT
54}; 52};
55 53
56 54
57static int sa11x0_pm_enter(suspend_state_t state) 55static int sa11x0_pm_enter(suspend_state_t state)
58{ 56{
59 unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE]; 57 unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
60 58
61 gpio = GPLR; 59 gpio = GPLR;
62 60
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index d84167fb33b1..3ac8d8d781b3 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
411 411
412 clk->parent = parent; 412 clk->parent = parent;
413 413
414 if (clk == &s3c24xx_dclk0) 414 if (clk == &s3c24xx_clkout0)
415 mask = S3C2410_MISCCR_CLK0_MASK; 415 mask = S3C2410_MISCCR_CLK0_MASK;
416 else { 416 else {
417 source <<= 4; 417 source <<= 4;
@@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
437struct clk s3c24xx_dclk1 = { 437struct clk s3c24xx_dclk1 = {
438 .name = "dclk1", 438 .name = "dclk1",
439 .id = -1, 439 .id = -1,
440 .ctrlbit = S3C2410_DCLKCON_DCLK0EN, 440 .ctrlbit = S3C2410_DCLKCON_DCLK1EN,
441 .enable = s3c24xx_dclk_enable, 441 .enable = s3c24xx_dclk_enable,
442 .set_parent = s3c24xx_dclk_setparent, 442 .set_parent = s3c24xx_dclk_setparent,
443 .set_rate = s3c24xx_set_dclk_rate, 443 .set_rate = s3c24xx_set_dclk_rate,
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..fd5708523f2e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@ config BANK_0
832config BANK_1 832config BANK_1
833 hex "Bank 1" 833 hex "Bank 1"
834 default 0x7BB0 834 default 0x7BB0
835 default 0x5558 if BF54x
835 836
836config BANK_2 837config BANK_2
837 hex "Bank 2" 838 hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
963 964
964endmenu 965endmenu
965 966
966if (BF537 || BF533 || BF54x)
967
968menu "CPU Frequency scaling" 967menu "CPU Frequency scaling"
969 968
970source "drivers/cpufreq/Kconfig" 969source "drivers/cpufreq/Kconfig"
971 970
972config CPU_FREQ 971config CPU_VOLTAGE
973 bool 972 bool "CPU Voltage scaling"
973 depends on EXPERIMENTAL
974 depends on CPU_FREQ
974 default n 975 default n
975 help 976 help
976 If you want to enable this option, you should select the 977 Say Y here if you want CPU voltage scaling according to the CPU frequency.
977 DPMC driver from Character Devices. 978 This option violates the PLL BYPASS recommendation in the Blackfin Processor
978endmenu 979 manuals. There is a theoretical risk that during VDDINT transitions
980 the PLL may unlock.
979 981
980endif 982endmenu
981 983
982source "net/Kconfig" 984source "net/Kconfig"
983 985
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f3cebf..881afe9082c7 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@ int main(void)
56 /* offsets into the thread struct */ 56 /* offsets into the thread struct */
57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); 57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp)); 58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
59 DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
60 DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
61 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
62 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc)); 59 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
63 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); 60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
64 61
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228a390..4b03ba025488 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * This file contains sequences of code that will be copied to a 2 * This file contains sequences of code that will be copied to a
3 * fixed location, defined in <asm/atomic_seq.h>. The interrupt 3 * fixed location, defined in <asm/fixed_code.h>. The interrupt
4 * handlers ensure that these sequences appear to be atomic when 4 * handlers ensure that these sequences appear to be atomic when
5 * executed from userspace. 5 * executed from userspace.
6 * These are aligned to 16 bytes, so that we have some space to replace 6 * These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29d03f4..14a42848f37f 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@ int
160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, 160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
161 char *secstrings, struct module *mod) 161 char *secstrings, struct module *mod)
162{ 162{
163 /*
164 * XXX: sechdrs are vmalloced in kernel/module.c
165 * and would be vfreed just after module is loaded,
166 * so we hack to keep the only information we needed
167 * in mod->arch to correctly free L1 I/D sram later.
168 * NOTE: this breaks the semantic of mod->arch structure.
169 */
163 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; 170 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
164 void *dest = NULL; 171 void *dest = NULL;
165 172
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
167 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || 174 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
168 ((strcmp(".text", secstrings + s->sh_name) == 0) && 175 ((strcmp(".text", secstrings + s->sh_name) == 0) &&
169 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { 176 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
170 mod->arch.text_l1 = s;
171 dest = l1_inst_sram_alloc(s->sh_size); 177 dest = l1_inst_sram_alloc(s->sh_size);
178 mod->arch.text_l1 = dest;
172 if (dest == NULL) { 179 if (dest == NULL) {
173 printk(KERN_ERR 180 printk(KERN_ERR
174 "module %s: L1 instruction memory allocation failed\n", 181 "module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
182 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || 189 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
183 ((strcmp(".data", secstrings + s->sh_name) == 0) && 190 ((strcmp(".data", secstrings + s->sh_name) == 0) &&
184 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 191 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
185 mod->arch.data_a_l1 = s;
186 dest = l1_data_sram_alloc(s->sh_size); 192 dest = l1_data_sram_alloc(s->sh_size);
193 mod->arch.data_a_l1 = dest;
187 if (dest == NULL) { 194 if (dest == NULL) {
188 printk(KERN_ERR 195 printk(KERN_ERR
189 "module %s: L1 data memory allocation failed\n", 196 "module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
197 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || 204 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
198 ((strcmp(".bss", secstrings + s->sh_name) == 0) && 205 ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
199 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 206 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
200 mod->arch.bss_a_l1 = s;
201 dest = l1_data_sram_alloc(s->sh_size); 207 dest = l1_data_sram_alloc(s->sh_size);
208 mod->arch.bss_a_l1 = dest;
202 if (dest == NULL) { 209 if (dest == NULL) {
203 printk(KERN_ERR 210 printk(KERN_ERR
204 "module %s: L1 data memory allocation failed\n", 211 "module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
210 s->sh_addr = (unsigned long)dest; 217 s->sh_addr = (unsigned long)dest;
211 } 218 }
212 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) { 219 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
213 mod->arch.data_b_l1 = s;
214 dest = l1_data_B_sram_alloc(s->sh_size); 220 dest = l1_data_B_sram_alloc(s->sh_size);
221 mod->arch.data_b_l1 = dest;
215 if (dest == NULL) { 222 if (dest == NULL) {
216 printk(KERN_ERR 223 printk(KERN_ERR
217 "module %s: L1 data memory allocation failed\n", 224 "module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
223 s->sh_addr = (unsigned long)dest; 230 s->sh_addr = (unsigned long)dest;
224 } 231 }
225 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) { 232 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
226 mod->arch.bss_b_l1 = s;
227 dest = l1_data_B_sram_alloc(s->sh_size); 233 dest = l1_data_B_sram_alloc(s->sh_size);
234 mod->arch.bss_b_l1 = dest;
228 if (dest == NULL) { 235 if (dest == NULL) {
229 printk(KERN_ERR 236 printk(KERN_ERR
230 "module %s: L1 data memory allocation failed\n", 237 "module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
416 423
417void module_arch_cleanup(struct module *mod) 424void module_arch_cleanup(struct module *mod)
418{ 425{
419 if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) 426 if (mod->arch.text_l1)
420 l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); 427 l1_inst_sram_free((void *)mod->arch.text_l1);
421 if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) 428 if (mod->arch.data_a_l1)
422 l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); 429 l1_data_sram_free((void *)mod->arch.data_a_l1);
423 if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) 430 if (mod->arch.bss_a_l1)
424 l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); 431 l1_data_sram_free((void *)mod->arch.bss_a_l1);
425 if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) 432 if (mod->arch.data_b_l1)
426 l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); 433 l1_data_B_sram_free((void *)mod->arch.data_b_l1);
427 if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) 434 if (mod->arch.bss_b_l1)
428 l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); 435 l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
429} 436}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd00d7cb..53c2cd255441 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
245 245
246void finish_atomic_sections (struct pt_regs *regs) 246void finish_atomic_sections (struct pt_regs *regs)
247{ 247{
248 int __user *up0 = (int __user *)&regs->p0; 248 int __user *up0 = (int __user *)regs->p0;
249 249
250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) 250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
251 return; 251 return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c172c6..f51ab088098e 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
185{ 185{
186 unsigned long tmp; 186 unsigned long tmp;
187 /* make sure the single step bit is not set. */ 187 /* make sure the single step bit is not set. */
188 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); 188 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
189 put_reg(child, PT_SR, tmp); 189 put_reg(child, PT_SYSCFG, tmp);
190} 190}
191 191
192long arch_ptrace(struct task_struct *child, long request, long addr, long data) 192long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883d493c..dbc3bbf846be 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
42 42
43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
44 44
45/* Location of the trace bit in SYSCFG. */
46#define TRACE_BITS 0x0001
47
45struct fdpic_func_descriptor { 48struct fdpic_func_descriptor {
46 unsigned long text; 49 unsigned long text;
47 unsigned long GOT; 50 unsigned long GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
225 regs->r1 = (unsigned long)(&frame->info); 228 regs->r1 = (unsigned long)(&frame->info);
226 regs->r2 = (unsigned long)(&frame->uc); 229 regs->r2 = (unsigned long)(&frame->uc);
227 230
231 /*
232 * Clear the trace flag when entering the signal handler, but
233 * notify any tracer that was single-stepping it. The tracer
234 * may want to single-step inside the handler too.
235 */
236 if (regs->syscfg & TRACE_BITS) {
237 regs->syscfg &= ~TRACE_BITS;
238 ptrace_notify(SIGTRAP);
239 }
240
228 return 0; 241 return 0;
229 242
230 give_sigsegv: 243 give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47c09e5..e887efc86c29 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
60 60
61static cycle_t read_cycles(void) 61static cycle_t read_cycles(void)
62{ 62{
63 return get_cycles(); 63 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
64} 64}
65 65
66unsigned long long sched_clock(void) 66unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
117 break; 117 break;
118 } 118 }
119 case CLOCK_EVT_MODE_ONESHOT: 119 case CLOCK_EVT_MODE_ONESHOT:
120 bfin_write_TSCALE(0); 120 bfin_write_TSCALE(TIME_SCALE - 1);
121 bfin_write_TCOUNT(0); 121 bfin_write_TCOUNT(0);
122 bfin_write_TCNTL(TMPWR | TMREN); 122 bfin_write_TCNTL(TMPWR | TMREN);
123 CSYNC(); 123 CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
183 183
184static int __init bfin_clockevent_init(void) 184static int __init bfin_clockevent_init(void)
185{ 185{
186 unsigned long timer_clk;
187
188 timer_clk = get_cclk() / TIME_SCALE;
189
186 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 190 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
187 bfin_timer_init(); 191 bfin_timer_init();
188 192
189 clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift); 193 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
190 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 194 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
191 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 195 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
192 clockevents_register_device(&clockevent_bfin); 196 clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d53811f03..8aa49f804228 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h> 33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
35#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
39#endif 40#endif
40#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
42#include <linux/i2c.h>
41#include <linux/irq.h> 43#include <linux/irq.h>
42#include <linux/interrupt.h> 44#include <linux/interrupt.h>
43#include <linux/usb/sl811.h> 45#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
50#include <asm/reboot.h> 52#include <asm/reboot.h>
51#include <asm/nand.h> 53#include <asm/nand.h>
52#include <asm/portmux.h> 54#include <asm/portmux.h>
55#include <asm/dpmc.h>
53#include <linux/spi/ad7877.h> 56#include <linux/spi/ad7877.h>
54 57
55/* 58/*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
171}; 174};
172#endif 175#endif
173 176
177#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
178static struct mtd_partition ezkit_partitions[] = {
179 {
180 .name = "Bootloader",
181 .size = 0x40000,
182 .offset = 0,
183 }, {
184 .name = "Kernel",
185 .size = 0x1C0000,
186 .offset = MTDPART_OFS_APPEND,
187 }, {
188 .name = "RootFS",
189 .size = MTDPART_SIZ_FULL,
190 .offset = MTDPART_OFS_APPEND,
191 }
192};
193
194static struct physmap_flash_data ezkit_flash_data = {
195 .width = 2,
196 .parts = ezkit_partitions,
197 .nr_parts = ARRAY_SIZE(ezkit_partitions),
198};
199
200static struct resource ezkit_flash_resource = {
201 .start = 0x20000000,
202 .end = 0x203fffff,
203 .flags = IORESOURCE_MEM,
204};
205
206static struct platform_device ezkit_flash_device = {
207 .name = "physmap-flash",
208 .id = 0,
209 .dev = {
210 .platform_data = &ezkit_flash_data,
211 },
212 .num_resources = 1,
213 .resource = &ezkit_flash_resource,
214};
215#endif
216
174#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 217#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
175static struct mtd_partition partition_info[] = { 218static struct mtd_partition partition_info[] = {
176 { 219 {
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
420 .offset = 0, 463 .offset = 0,
421 .mask_flags = MTD_CAP_ROM 464 .mask_flags = MTD_CAP_ROM
422 }, { 465 }, {
423 .name = "kernel", 466 .name = "linux kernel",
424 .size = 0xe0000,
425 .offset = MTDPART_OFS_APPEND,
426 }, {
427 .name = "file system",
428 .size = MTDPART_SIZ_FULL, 467 .size = MTDPART_SIZ_FULL,
429 .offset = MTDPART_OFS_APPEND, 468 .offset = MTDPART_OFS_APPEND,
430 } 469 }
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
434 .name = "m25p80", 473 .name = "m25p80",
435 .parts = bfin_spi_flash_partitions, 474 .parts = bfin_spi_flash_partitions,
436 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 475 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
437 .type = "m25p64", 476 .type = "m25p16",
438}; 477};
439 478
440/* SPI flash chip (m25p64) */ 479/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
755}; 794};
756#endif 795#endif
757 796
797#ifdef CONFIG_I2C_BOARDINFO
798static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
799#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
800 {
801 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
802 .type = "pcf8574_lcd",
803 },
804#endif
805#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
806 {
807 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
808 .type = "pcf8574_keypad",
809 .irq = IRQ_PF8,
810 },
811#endif
812};
813#endif
814
758#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 815#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
759static struct platform_device bfin_sport0_uart_device = { 816static struct platform_device bfin_sport0_uart_device = {
760 .name = "bfin-sport-uart", 817 .name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
839 .resource = &bfin_gpios_resources, 896 .resource = &bfin_gpios_resources,
840}; 897};
841 898
899static const unsigned int cclk_vlev_datasheet[] =
900{
901 VRPAIR(VLEV_100, 400000000),
902 VRPAIR(VLEV_105, 426000000),
903 VRPAIR(VLEV_110, 500000000),
904 VRPAIR(VLEV_115, 533000000),
905 VRPAIR(VLEV_120, 600000000),
906};
907
908static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
909 .tuple_tab = cclk_vlev_datasheet,
910 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
911 .vr_settling_time = 25 /* us */,
912};
913
914static struct platform_device bfin_dpmc = {
915 .name = "bfin dpmc",
916 .dev = {
917 .platform_data = &bfin_dmpc_vreg_data,
918 },
919};
920
842static struct platform_device *stamp_devices[] __initdata = { 921static struct platform_device *stamp_devices[] __initdata = {
922
923 &bfin_dpmc,
924
843#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 925#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
844 &bf5xx_nand_device, 926 &bf5xx_nand_device,
845#endif 927#endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
921 &bfin_device_gpiokeys, 1003 &bfin_device_gpiokeys,
922#endif 1004#endif
923 1005
1006#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1007 &ezkit_flash_device,
1008#endif
1009
924 &bfin_gpios_device, 1010 &bfin_gpios_device,
925}; 1011};
926 1012
927static int __init stamp_init(void) 1013static int __init stamp_init(void)
928{ 1014{
929 printk(KERN_INFO "%s(): registering device resources\n", __func__); 1015 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1016
1017#ifdef CONFIG_I2C_BOARDINFO
1018 i2c_register_board_info(0, bfin_i2c_board_info,
1019 ARRAY_SIZE(bfin_i2c_board_info));
1020#endif
1021
930 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 1022 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
931#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1023#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
932 spi_register_board_info(bfin_spi_board_info, 1024 spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c72681..ed2b0b8f5dc9 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
341}; 344};
342#endif 345#endif
343 346
347static const unsigned int cclk_vlev_datasheet[] =
348{
349 VRPAIR(VLEV_085, 250000000),
350 VRPAIR(VLEV_090, 376000000),
351 VRPAIR(VLEV_095, 426000000),
352 VRPAIR(VLEV_100, 426000000),
353 VRPAIR(VLEV_105, 476000000),
354 VRPAIR(VLEV_110, 476000000),
355 VRPAIR(VLEV_115, 476000000),
356 VRPAIR(VLEV_120, 600000000),
357 VRPAIR(VLEV_125, 600000000),
358 VRPAIR(VLEV_130, 600000000),
359};
360
361static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
362 .tuple_tab = cclk_vlev_datasheet,
363 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
364 .vr_settling_time = 25 /* us */,
365};
366
367static struct platform_device bfin_dpmc = {
368 .name = "bfin dpmc",
369 .dev = {
370 .platform_data = &bfin_dmpc_vreg_data,
371 },
372};
373
344static struct platform_device *cm_bf533_devices[] __initdata = { 374static struct platform_device *cm_bf533_devices[] __initdata = {
375
376 &bfin_dpmc,
377
345#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 378#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
346 &bfin_uart_device, 379 &bfin_uart_device,
347#endif 380#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943949ae..9d28415163ea 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
42#include <asm/dma.h> 42#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
44#include <asm/portmux.h> 44#include <asm/portmux.h>
45#include <asm/dpmc.h>
45 46
46/* 47/*
47 * Name the Board for the /proc/cpuinfo 48 * Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
350}; 351};
351#endif 352#endif
352 353
354static const unsigned int cclk_vlev_datasheet[] =
355{
356 VRPAIR(VLEV_085, 250000000),
357 VRPAIR(VLEV_090, 376000000),
358 VRPAIR(VLEV_095, 426000000),
359 VRPAIR(VLEV_100, 426000000),
360 VRPAIR(VLEV_105, 476000000),
361 VRPAIR(VLEV_110, 476000000),
362 VRPAIR(VLEV_115, 476000000),
363 VRPAIR(VLEV_120, 600000000),
364 VRPAIR(VLEV_125, 600000000),
365 VRPAIR(VLEV_130, 600000000),
366};
367
368static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
369 .tuple_tab = cclk_vlev_datasheet,
370 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
371 .vr_settling_time = 25 /* us */,
372};
373
374static struct platform_device bfin_dpmc = {
375 .name = "bfin dpmc",
376 .dev = {
377 .platform_data = &bfin_dmpc_vreg_data,
378 },
379};
380
353static struct platform_device *ezkit_devices[] __initdata = { 381static struct platform_device *ezkit_devices[] __initdata = {
382
383 &bfin_dpmc,
384
354#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 385#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
355 &smc91x_device, 386 &smc91x_device,
356#endif 387#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418ae543..7fd35fb32fd5 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
47#include <asm/portmux.h> 47#include <asm/portmux.h>
48#include <asm/dpmc.h>
48 49
49/* 50/*
50 * Name the Board for the /proc/cpuinfo 51 * Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
516}; 517};
517#endif 518#endif
518 519
520static const unsigned int cclk_vlev_datasheet[] =
521{
522 VRPAIR(VLEV_085, 250000000),
523 VRPAIR(VLEV_090, 376000000),
524 VRPAIR(VLEV_095, 426000000),
525 VRPAIR(VLEV_100, 426000000),
526 VRPAIR(VLEV_105, 476000000),
527 VRPAIR(VLEV_110, 476000000),
528 VRPAIR(VLEV_115, 476000000),
529 VRPAIR(VLEV_120, 600000000),
530 VRPAIR(VLEV_125, 600000000),
531 VRPAIR(VLEV_130, 600000000),
532};
533
534static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
535 .tuple_tab = cclk_vlev_datasheet,
536 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
537 .vr_settling_time = 25 /* us */,
538};
539
540static struct platform_device bfin_dpmc = {
541 .name = "bfin dpmc",
542 .dev = {
543 .platform_data = &bfin_dmpc_vreg_data,
544 },
545};
546
519static struct platform_device *stamp_devices[] __initdata = { 547static struct platform_device *stamp_devices[] __initdata = {
548
549 &bfin_dpmc,
550
520#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 551#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
521 &rtc_device, 552 &rtc_device,
522#endif 553#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd9b9ed..73f2142875e2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif
39#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
40#include <linux/irq.h> 42#include <linux/irq.h>
41#include <asm/dma.h> 43#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 44#include <asm/bfin5xx_spi.h>
43#include <asm/portmux.h> 45#include <asm/portmux.h>
46#include <asm/dpmc.h>
44 47
45/* 48/*
46 * Name the Board for the /proc/cpuinfo 49 * Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
428}; 431};
429#endif 432#endif
430 433
434static const unsigned int cclk_vlev_datasheet[] =
435{
436 VRPAIR(VLEV_085, 250000000),
437 VRPAIR(VLEV_090, 376000000),
438 VRPAIR(VLEV_095, 426000000),
439 VRPAIR(VLEV_100, 426000000),
440 VRPAIR(VLEV_105, 476000000),
441 VRPAIR(VLEV_110, 476000000),
442 VRPAIR(VLEV_115, 476000000),
443 VRPAIR(VLEV_120, 500000000),
444 VRPAIR(VLEV_125, 533000000),
445 VRPAIR(VLEV_130, 600000000),
446};
447
448static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
449 .tuple_tab = cclk_vlev_datasheet,
450 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
451 .vr_settling_time = 25 /* us */,
452};
453
454static struct platform_device bfin_dpmc = {
455 .name = "bfin dpmc",
456 .dev = {
457 .platform_data = &bfin_dmpc_vreg_data,
458 },
459};
460
431static struct platform_device *cm_bf537_devices[] __initdata = { 461static struct platform_device *cm_bf537_devices[] __initdata = {
462
463 &bfin_dpmc,
464
432#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 465#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
433 &hitachi_fb_device, 466 &hitachi_fb_device,
434#endif 467#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7c2d7d..9a756d1f3d73 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
47#include <asm/bfin5xx_spi.h> 47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h> 48#include <asm/reboot.h>
49#include <asm/portmux.h> 49#include <asm/portmux.h>
50#include <asm/dpmc.h>
50#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
51 52
52/* 53/*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
817}; 818};
818#endif 819#endif
819 820
821static const unsigned int cclk_vlev_datasheet[] =
822{
823 VRPAIR(VLEV_085, 250000000),
824 VRPAIR(VLEV_090, 376000000),
825 VRPAIR(VLEV_095, 426000000),
826 VRPAIR(VLEV_100, 426000000),
827 VRPAIR(VLEV_105, 476000000),
828 VRPAIR(VLEV_110, 476000000),
829 VRPAIR(VLEV_115, 476000000),
830 VRPAIR(VLEV_120, 500000000),
831 VRPAIR(VLEV_125, 533000000),
832 VRPAIR(VLEV_130, 600000000),
833};
834
835static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
836 .tuple_tab = cclk_vlev_datasheet,
837 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
838 .vr_settling_time = 25 /* us */,
839};
840
841static struct platform_device bfin_dpmc = {
842 .name = "bfin dpmc",
843 .dev = {
844 .platform_data = &bfin_dmpc_vreg_data,
845 },
846};
847
820static struct platform_device *stamp_devices[] __initdata = { 848static struct platform_device *stamp_devices[] __initdata = {
849
850 &bfin_dpmc,
851
821#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 852#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
822 &bfin_pcmcia_cf_device, 853 &bfin_pcmcia_cf_device,
823#endif 854#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479fffb5..3b74f96d3590 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39#include <linux/usb/musb.h> 40#include <linux/usb/musb.h>
41#endif
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h> 43#include <asm/cplb.h>
42#include <asm/dma.h> 44#include <asm/dma.h>
@@ -44,6 +46,7 @@
44#include <asm/nand.h> 46#include <asm/nand.h>
45#include <asm/portmux.h> 47#include <asm/portmux.h>
46#include <asm/mach/bf54x_keys.h> 48#include <asm/mach/bf54x_keys.h>
49#include <asm/dpmc.h>
47#include <linux/input.h> 50#include <linux/input.h>
48#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
49 52
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
590}; 593};
591#endif 594#endif
592 595
596static const unsigned int cclk_vlev_datasheet[] =
597{
598/*
599 * Internal VLEV BF54XSBBC1533
600 ****temporarily using these values until data sheet is updated
601 */
602 VRPAIR(VLEV_085, 150000000),
603 VRPAIR(VLEV_090, 250000000),
604 VRPAIR(VLEV_110, 276000000),
605 VRPAIR(VLEV_115, 301000000),
606 VRPAIR(VLEV_120, 525000000),
607 VRPAIR(VLEV_125, 550000000),
608 VRPAIR(VLEV_130, 600000000),
609};
610
611static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
612 .tuple_tab = cclk_vlev_datasheet,
613 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
614 .vr_settling_time = 25 /* us */,
615};
616
617static struct platform_device bfin_dpmc = {
618 .name = "bfin dpmc",
619 .dev = {
620 .platform_data = &bfin_dmpc_vreg_data,
621 },
622};
623
593static struct platform_device *cm_bf548_devices[] __initdata = { 624static struct platform_device *cm_bf548_devices[] __initdata = {
625
626 &bfin_dpmc,
627
594#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 628#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
595 &rtc_device, 629 &rtc_device,
596#endif 630#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68ac6bc9..d1682bb37509 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/gpio.h> 47#include <asm/gpio.h>
48#include <asm/nand.h> 48#include <asm/nand.h>
49#include <asm/dpmc.h>
49#include <asm/portmux.h> 50#include <asm/portmux.h>
50#include <asm/mach/bf54x_keys.h> 51#include <asm/mach/bf54x_keys.h>
51#include <linux/input.h> 52#include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
689 .resource = &bfin_gpios_resources, 690 .resource = &bfin_gpios_resources,
690}; 691};
691 692
693static const unsigned int cclk_vlev_datasheet[] =
694{
695/*
696 * Internal VLEV BF54XSBBC1533
697 ****temporarily using these values until data sheet is updated
698 */
699 VRPAIR(VLEV_085, 150000000),
700 VRPAIR(VLEV_090, 250000000),
701 VRPAIR(VLEV_110, 276000000),
702 VRPAIR(VLEV_115, 301000000),
703 VRPAIR(VLEV_120, 525000000),
704 VRPAIR(VLEV_125, 550000000),
705 VRPAIR(VLEV_130, 600000000),
706};
707
708static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
709 .tuple_tab = cclk_vlev_datasheet,
710 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
711 .vr_settling_time = 25 /* us */,
712};
713
714static struct platform_device bfin_dpmc = {
715 .name = "bfin dpmc",
716 .dev = {
717 .platform_data = &bfin_dmpc_vreg_data,
718 },
719};
720
692static struct platform_device *ezkit_devices[] __initdata = { 721static struct platform_device *ezkit_devices[] __initdata = {
722
723 &bfin_dpmc,
724
693#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 725#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
694 &rtc_device, 726 &rtc_device,
695#endif 727#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd580952fd8..466ef5929a25 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
339}; 342};
340#endif 343#endif
341 344
345static const unsigned int cclk_vlev_datasheet[] =
346{
347 VRPAIR(VLEV_085, 250000000),
348 VRPAIR(VLEV_090, 300000000),
349 VRPAIR(VLEV_095, 313000000),
350 VRPAIR(VLEV_100, 350000000),
351 VRPAIR(VLEV_105, 400000000),
352 VRPAIR(VLEV_110, 444000000),
353 VRPAIR(VLEV_115, 450000000),
354 VRPAIR(VLEV_120, 475000000),
355 VRPAIR(VLEV_125, 500000000),
356 VRPAIR(VLEV_130, 600000000),
357};
358
359static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
360 .tuple_tab = cclk_vlev_datasheet,
361 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
362 .vr_settling_time = 25 /* us */,
363};
364
365static struct platform_device bfin_dpmc = {
366 .name = "bfin dpmc",
367 .dev = {
368 .platform_data = &bfin_dmpc_vreg_data,
369 },
370};
371
342static struct platform_device *cm_bf561_devices[] __initdata = { 372static struct platform_device *cm_bf561_devices[] __initdata = {
343 373
374 &bfin_dpmc,
375
344#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 376#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
345 &hitachi_fb_device, 377 &hitachi_fb_device,
346#endif 378#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d99209..61d8f7648b24 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
39#include <asm/dma.h> 39#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 41#include <asm/portmux.h>
42#include <asm/dpmc.h>
42 43
43/* 44/*
44 * Name the Board for the /proc/cpuinfo 45 * Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
443}; 444};
444#endif 445#endif
445 446
447static const unsigned int cclk_vlev_datasheet[] =
448{
449 VRPAIR(VLEV_085, 250000000),
450 VRPAIR(VLEV_090, 300000000),
451 VRPAIR(VLEV_095, 313000000),
452 VRPAIR(VLEV_100, 350000000),
453 VRPAIR(VLEV_105, 400000000),
454 VRPAIR(VLEV_110, 444000000),
455 VRPAIR(VLEV_115, 450000000),
456 VRPAIR(VLEV_120, 475000000),
457 VRPAIR(VLEV_125, 500000000),
458 VRPAIR(VLEV_130, 600000000),
459};
460
461static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
462 .tuple_tab = cclk_vlev_datasheet,
463 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
464 .vr_settling_time = 25 /* us */,
465};
466
467static struct platform_device bfin_dpmc = {
468 .name = "bfin dpmc",
469 .dev = {
470 .platform_data = &bfin_dmpc_vreg_data,
471 },
472};
473
446static struct platform_device *ezkit_devices[] __initdata = { 474static struct platform_device *ezkit_devices[] __initdata = {
475
476 &bfin_dpmc,
477
447#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 478#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
448 &smc91x_device, 479 &smc91x_device,
449#endif 480#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e9b680..422bfee34adc 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@ obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o cacheinit.o entry.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o 7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_PM) += pm.o dpmc.o 9obj-$(CONFIG_PM) += pm.o dpmc_modes.o
10obj-$(CONFIG_CPU_FREQ) += cpufreq.o 10obj-$(CONFIG_CPU_FREQ) += cpufreq.o
11obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00d20e1..75cdad291e88 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
62 unsigned int tscale; /* change the divider on the core timer interrupt */ 62 unsigned int tscale; /* change the divider on the core timer interrupt */
63} dpm_state_table[3]; 63} dpm_state_table[3];
64 64
65/*
66 normalized to maximum frequncy offset for CYCLES,
67 used in time-ts cycles clock source, but could be used
68 somewhere also.
69 */
70unsigned long long __bfin_cycles_off;
71unsigned int __bfin_cycles_mod;
72
65/**************************************************************************/ 73/**************************************************************************/
66 74
67static unsigned int bfin_getfreq(unsigned int cpu) 75static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
80 unsigned int index, plldiv, tscale; 88 unsigned int index, plldiv, tscale;
81 unsigned long flags, cclk_hz; 89 unsigned long flags, cclk_hz;
82 struct cpufreq_freqs freqs; 90 struct cpufreq_freqs freqs;
91 cycles_t cycles;
83 92
84 if (cpufreq_frequency_table_target(policy, bfin_freq_table, 93 if (cpufreq_frequency_table_target(policy, bfin_freq_table,
85 target_freq, relation, &index)) 94 target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
101 bfin_write_PLL_DIV(plldiv); 110 bfin_write_PLL_DIV(plldiv);
102 /* we have to adjust the core timer, because it is using cclk */ 111 /* we have to adjust the core timer, because it is using cclk */
103 bfin_write_TSCALE(tscale); 112 bfin_write_TSCALE(tscale);
113 cycles = get_cycles();
104 SSYNC(); 114 SSYNC();
115 cycles += 10; /* ~10 cycles we loose after get_cycles() */
116 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
117 __bfin_cycles_mod = index;
105 local_irq_restore(flags); 118 local_irq_restore(flags);
119 /* TODO: just test case for cycles clock source, remove later */
120 pr_debug("cpufreq: done\n");
106 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 121 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
107 122
108 return 0; 123 return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
119 unsigned long cclk, sclk, csel, min_cclk; 134 unsigned long cclk, sclk, csel, min_cclk;
120 int index; 135 int index;
121 136
122#ifdef CONFIG_CYCLES_CLOCKSOURCE
123/*
124 * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
125 * CPU frequency scaling, since CYCLES runs off Core Clock.
126 */
127 printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
128 return -ENODEV;
129#endif
130
131 if (policy->cpu != 0) 137 if (policy->cpu != 0)
132 return -EINVAL; 138 return -EINVAL;
133 139
134 cclk = get_cclk(); 140 cclk = get_cclk();
135 sclk = get_sclk(); 141 sclk = get_sclk();
136 142
137#if ANOMALY_05000273 143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
138 min_cclk = sclk * 2; 144 min_cclk = sclk * 2;
139#else 145#else
140 min_cclk = sclk; 146 min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 000000000000..02c7efd1bcf4
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
1/*
2 * Copyright 2008 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#include <linux/cdev.h>
8#include <linux/device.h>
9#include <linux/errno.h>
10#include <linux/fs.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/types.h>
15#include <linux/cpufreq.h>
16
17#include <asm/delay.h>
18#include <asm/dpmc.h>
19
20#define DRIVER_NAME "bfin dpmc"
21
22#define dprintk(msg...) \
23 cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
24
25struct bfin_dpmc_platform_data *pdata;
26
27/**
28 * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
29 * Avoid BYPASS sequence
30 */
31static void bfin_set_vlev(unsigned int vlev)
32{
33 unsigned pll_lcnt;
34
35 pll_lcnt = bfin_read_PLL_LOCKCNT();
36
37 bfin_write_PLL_LOCKCNT(1);
38 bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
39 bfin_write_PLL_LOCKCNT(pll_lcnt);
40}
41
42/**
43 * bfin_get_vlev - Get CPU specific VLEV from platform device data
44 */
45static unsigned int bfin_get_vlev(unsigned int freq)
46{
47 int i;
48
49 if (!pdata)
50 goto err_out;
51
52 freq >>= 16;
53
54 for (i = 0; i < pdata->tabsize; i++)
55 if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
56 return pdata->tuple_tab[i] >> 16;
57
58err_out:
59 printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
60 return VLEV_120;
61}
62
63#ifdef CONFIG_CPU_FREQ
64static int
65vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
66{
67 struct cpufreq_freqs *freq = data;
68
69 if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
70 bfin_set_vlev(bfin_get_vlev(freq->new));
71 udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
72
73 } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
74 bfin_set_vlev(bfin_get_vlev(freq->new));
75
76 return 0;
77}
78
79static struct notifier_block vreg_cpufreq_notifier_block = {
80 .notifier_call = vreg_cpufreq_notifier
81};
82#endif /* CONFIG_CPU_FREQ */
83
84/**
85 * bfin_dpmc_probe -
86 *
87 */
88static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
89{
90 if (pdev->dev.platform_data)
91 pdata = pdev->dev.platform_data;
92 else
93 return -EINVAL;
94
95 return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
96 CPUFREQ_TRANSITION_NOTIFIER);
97}
98
99/**
100 * bfin_dpmc_remove -
101 */
102static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
103{
104 pdata = NULL;
105 return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
106 CPUFREQ_TRANSITION_NOTIFIER);
107}
108
109struct platform_driver bfin_dpmc_device_driver = {
110 .probe = bfin_dpmc_probe,
111 .remove = __devexit_p(bfin_dpmc_remove),
112 .driver = {
113 .name = DRIVER_NAME,
114 }
115};
116
117/**
118 * bfin_dpmc_init - Init driver
119 */
120static int __init bfin_dpmc_init(void)
121{
122 return platform_driver_register(&bfin_dpmc_device_driver);
123}
124module_init(bfin_dpmc_init);
125
126/**
127 * bfin_dpmc_exit - break down driver
128 */
129static void __exit bfin_dpmc_exit(void)
130{
131 platform_driver_unregister(&bfin_dpmc_device_driver);
132}
133module_exit(bfin_dpmc_exit);
134
135MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
136MODULE_DESCRIPTION("cpu power management driver for Blackfin");
137MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b1..b7981d31c392 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/dpmc.S 2 * Copyright 2004-2008 Analog Devices Inc.
3 * Based on:
4 * Author: LG Soft India
5 * 3 *
6 * Created: ? 4 * Licensed under the GPL-2 or later.
7 * Description: Watchdog Timer APIs
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 5 */
29 6
30#include <linux/linkage.h> 7#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e9a46e..038f70e0be65 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
151ENDPROC(_ex_soft_bp) 151ENDPROC(_ex_soft_bp)
152 152
153ENTRY(_ex_single_step) 153ENTRY(_ex_single_step)
154 /* If we just returned from an interrupt, the single step event is
155 for the RTI instruction. */
154 r7 = retx; 156 r7 = retx;
155 r6 = reti; 157 r6 = reti;
156 cc = r7 == r6; 158 cc = r7 == r6;
157 if cc jump _bfin_return_from_exception 159 if cc jump _bfin_return_from_exception;
158 r7 = syscfg;
159 bitclr (r7, 0);
160 syscfg = R7;
161 160
161 /* If we were in user mode, do the single step normally. */
162 p5.l = lo(IPEND); 162 p5.l = lo(IPEND);
163 p5.h = hi(IPEND); 163 p5.h = hi(IPEND);
164 r6 = [p5]; 164 r6 = [p5];
165 cc = bittst(r6, 5); 165 r7 = 0xffe0 (z);
166 if !cc jump _ex_trap_c; 166 r7 = r7 & r6;
167 p4.l = lo(EVT5); 167 cc = r7 == 0;
168 p4.h = hi(EVT5); 168 if !cc jump 1f;
169 r6.h = _exception_to_level5; 169
170 r6.l = _exception_to_level5; 170 /* Single stepping only a single instruction, so clear the trace
171 r7 = [p4]; 171 * bit here. */
172 cc = r6 == r7; 172 r7 = syscfg;
173 if !cc jump _ex_trap_c; 173 bitclr (r7, 0);
174 syscfg = R7;
175 jump _ex_trap_c;
176
1771:
178 /*
179 * We were in an interrupt handler. By convention, all of them save
180 * SYSCFG with their first instruction, so by checking whether our
181 * RETX points at the entry point, we can determine whether to allow
182 * a single step, or whether to clear SYSCFG.
183 *
184 * First, find out the interrupt level and the event vector for it.
185 */
186 p5.l = lo(EVT0);
187 p5.h = hi(EVT0);
188 p5 += -4;
1892:
190 r7 = rot r7 by -1;
191 p5 += 4;
192 if !cc jump 2b;
193
194 /* What we actually do is test for the _second_ instruction in the
195 * IRQ handler. That way, if there are insns following the restore
196 * of SYSCFG after leaving the handler, we will not turn off SYSCFG
197 * for them. */
198
199 r7 = [p5];
200 r7 += 2;
201 r6 = RETX;
202 cc = R7 == R6;
203 if !cc jump _bfin_return_from_exception;
204
205 r7 = syscfg;
206 bitclr (r7, 0);
207 syscfg = R7;
208
209 /* Fall through to _bfin_return_from_exception. */
174ENDPROC(_ex_single_step) 210ENDPROC(_ex_single_step)
175 211
176ENTRY(_bfin_return_from_exception) 212ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
234 p5.l = _saved_icplb_fault_addr; 270 p5.l = _saved_icplb_fault_addr;
235 [p5] = r7; 271 [p5] = r7;
236 272
237 p4.l = __retx; 273 p4.l = _excpt_saved_stuff;
238 p4.h = __retx; 274 p4.h = _excpt_saved_stuff;
275
239 r6 = retx; 276 r6 = retx;
240 [p4] = r6; 277 [p4] = r6;
241 p4.l = lo(SAFE_USER_INSTRUCTION); 278
242 p4.h = hi(SAFE_USER_INSTRUCTION); 279 r6 = SYSCFG;
243 retx = p4; 280 [p4 + 4] = r6;
281 BITCLR(r6, 0);
282 SYSCFG = r6;
244 283
245 /* Disable all interrupts, but make sure level 5 is enabled so 284 /* Disable all interrupts, but make sure level 5 is enabled so
246 * we can switch to that level. Save the old mask. */ 285 * we can switch to that level. Save the old mask. */
247 cli r6; 286 cli r6;
248 p4.l = _excpt_saved_imask; 287 [p4 + 8] = r6;
249 p4.h = _excpt_saved_imask; 288
250 [p4] = r6; 289 p4.l = lo(SAFE_USER_INSTRUCTION);
290 p4.h = hi(SAFE_USER_INSTRUCTION);
291 retx = p4;
292
251 r6 = 0x3f; 293 r6 = 0x3f;
252 sti r6; 294 sti r6;
253 295
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
295 */ 337 */
296 SAVE_ALL_SYS 338 SAVE_ALL_SYS
297 339
340 /* The dumping functions expect the return address in the RETI
341 * slot. */
342 r6 = retx;
343 [sp + PT_PC] = r6;
344
298 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 345 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
299 SP += -12; 346 SP += -12;
300 call _double_fault_c; 347 call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
307ENTRY(_exception_to_level5) 354ENTRY(_exception_to_level5)
308 SAVE_ALL_SYS 355 SAVE_ALL_SYS
309 356
310 p4.l = __retx; 357 p4.l = _excpt_saved_stuff;
311 p4.h = __retx; 358 p4.h = _excpt_saved_stuff;
312 r6 = [p4]; 359 r6 = [p4];
313 [sp + PT_PC] = r6; 360 [sp + PT_PC] = r6;
314 361
362 r6 = [p4 + 4];
363 [sp + PT_SYSCFG] = r6;
364
315 /* Restore interrupt mask. We haven't pushed RETI, so this 365 /* Restore interrupt mask. We haven't pushed RETI, so this
316 * doesn't enable interrupts until we return from this handler. */ 366 * doesn't enable interrupts until we return from this handler. */
317 p4.l = _excpt_saved_imask; 367 r6 = [p4 + 8];
318 p4.h = _excpt_saved_imask;
319 r6 = [p4];
320 sti r6; 368 sti r6;
321 369
322 /* Restore the hardware error vector. */ 370 /* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
1344 .rept NR_syscalls-(.-_sys_call_table)/4 1392 .rept NR_syscalls-(.-_sys_call_table)/4
1345 .long _sys_ni_syscall 1393 .long _sys_ni_syscall
1346 .endr 1394 .endr
1347_excpt_saved_imask: 1395
1396 /*
1397 * Used to save the real RETX, IMASK and SYSCFG when temporarily
1398 * storing safe values across the transition from exception to IRQ5.
1399 */
1400_excpt_saved_stuff:
1401 .long 0;
1402 .long 0;
1348 .long 0; 1403 .long 0;
1349 1404
1350_exception_stack: 1405_exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
1358_last_cplb_fault_retx: 1413_last_cplb_fault_retx:
1359 .long 0; 1414 .long 0;
1360#endif 1415#endif
1361 /* Used to save the real RETX when temporarily storing a safe
1362 * return address. */
1363__retx:
1364 .long 0;
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index d124066e1728..a79fbd87021b 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -27,28 +27,6 @@
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28#include <asm/segment.h> 28#include <asm/segment.h>
29 29
30/*
31 * sys_pipe() is the normal C calling standard for creating
32 * a pipe. It's not the way Unix traditionally does this, though.
33 */
34asmlinkage int sys_pipe(unsigned long __user * fildes)
35{
36 int fd[2];
37 int error;
38
39 lock_kernel();
40 error = do_pipe(fd);
41 unlock_kernel();
42 if (!error) {
43 if (copy_to_user(fildes, fd, 2*sizeof(int))) {
44 sys_close(fd[0]);
45 sys_close(fd[1]);
46 error = -EFAULT;
47 }
48 }
49 return error;
50}
51
52/* common code for old and new mmaps */ 30/* common code for old and new mmaps */
53static inline long 31static inline long
54do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 319c79720b8a..305ac852bbed 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,29 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
76 return oldval; 76 return oldval;
77} 77}
78 78
79/*
80 * sys_pipe() is the normal C calling standard for creating
81 * a pipe. It's not the way Unix traditionally does this, though.
82 */
83asmlinkage int
84sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
85 unsigned long r3, unsigned long r4, unsigned long r5,
86 unsigned long r6, struct pt_regs regs)
87{
88 int fd[2];
89 int error;
90
91 error = do_pipe(fd);
92 if (!error) {
93 if (copy_to_user((void __user *)r0, fd, 2*sizeof(int))) {
94 sys_close(fd[0]);
95 sys_close(fd[1]);
96 error = -EFAULT;
97 }
98 }
99 return error;
100}
101
102asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 79asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
103 unsigned long prot, unsigned long flags, 80 unsigned long prot, unsigned long flags,
104 unsigned long fd, unsigned long pgoff) 81 unsigned long fd, unsigned long pgoff)
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 6a6409adc564..e856218da90d 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -186,17 +186,6 @@ config PREEMPT
186 Say Y here if you are building a kernel for a desktop, embedded 186 Say Y here if you are building a kernel for a desktop, embedded
187 or real-time system. Say N if you are unsure. 187 or real-time system. Say N if you are unsure.
188 188
189config PREEMPT_BKL
190 bool "Preempt The Big Kernel Lock"
191 depends on PREEMPT
192 default y
193 help
194 This option reduces the latency of the kernel by making the
195 big kernel lock preemptible.
196
197 Say Y here if you are building a kernel for a desktop system.
198 Say N if you are unsure.
199
200config MN10300_CURRENT_IN_E2 189config MN10300_CURRENT_IN_E2
201 bool "Hold current task address in E2 register" 190 bool "Hold current task address in E2 register"
202 default y 191 default y
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index a1ae4d6ec990..72d67564bdfc 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -342,9 +342,14 @@
342 /* Outbound ranges, one memory and one IO, 342 /* Outbound ranges, one memory and one IO,
343 * later cannot be changed. Chip supports a second 343 * later cannot be changed. Chip supports a second
344 * IO range but we don't use it for now 344 * IO range but we don't use it for now
345 * From the 440EPx user manual:
346 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
347 * I/O 1 E800 0000 1 E800 FFFF 64KB
348 * I/O 1 E880 0000 1 EBFF FFFF 56MB
345 */ 349 */
346 ranges = <02000000 0 80000000 1 80000000 0 10000000 350 ranges = <02000000 0 80000000 1 80000000 0 40000000
347 01000000 0 00000000 1 e8000000 0 00100000>; 351 01000000 0 00000000 1 e8000000 0 00010000
352 01000000 0 00000000 1 e8800000 0 03800000>;
348 353
349 /* Inbound 2GB range starting at 0 */ 354 /* Inbound 2GB range starting at 0 */
350 dma-ranges = <42000000 0 0 0 0 0 80000000>; 355 dma-ranges = <42000000 0 0 0 0 0 80000000>;
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 9f9377745490..d8f0329b1344 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -16,7 +16,6 @@
16#include <asm/mmu.h> 16#include <asm/mmu.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/prom.h>
20#include <asm/processor.h> 19#include <asm/processor.h>
21#include <asm/udbg.h> 20#include <asm/udbg.h>
22 21
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 36080d4d1922..81738a4b3c3a 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1208,6 +1208,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1208 .machine_check = machine_check_4xx, 1208 .machine_check = machine_check_4xx,
1209 .platform = "ppc405", 1209 .platform = "ppc405",
1210 }, 1210 },
1211 { /* default match */
1212 .pvr_mask = 0x00000000,
1213 .pvr_value = 0x00000000,
1214 .cpu_name = "(generic 40x PPC)",
1215 .cpu_features = CPU_FTRS_40X,
1216 .cpu_user_features = PPC_FEATURE_32 |
1217 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1218 .icache_bsize = 32,
1219 .dcache_bsize = 32,
1220 .machine_check = machine_check_4xx,
1221 .platform = "ppc405",
1222 }
1211 1223
1212#endif /* CONFIG_40x */ 1224#endif /* CONFIG_40x */
1213#ifdef CONFIG_44x 1225#ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1421 .machine_check = machine_check_440A, 1433 .machine_check = machine_check_440A,
1422 .platform = "ppc440", 1434 .platform = "ppc440",
1423 }, 1435 },
1436 { /* default match */
1437 .pvr_mask = 0x00000000,
1438 .pvr_value = 0x00000000,
1439 .cpu_name = "(generic 44x PPC)",
1440 .cpu_features = CPU_FTRS_44X,
1441 .cpu_user_features = COMMON_USER_BOOKE,
1442 .icache_bsize = 32,
1443 .dcache_bsize = 32,
1444 .machine_check = machine_check_4xx,
1445 .platform = "ppc440",
1446 }
1424#endif /* CONFIG_44x */ 1447#endif /* CONFIG_44x */
1425#ifdef CONFIG_FSL_BOOKE
1426#ifdef CONFIG_E200 1448#ifdef CONFIG_E200
1427 { /* e200z5 */ 1449 { /* e200z5 */
1428 .pvr_mask = 0xfff00000, 1450 .pvr_mask = 0xfff00000,
@@ -1451,7 +1473,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1451 .machine_check = machine_check_e200, 1473 .machine_check = machine_check_e200,
1452 .platform = "ppc5554", 1474 .platform = "ppc5554",
1453 }, 1475 },
1454#elif defined(CONFIG_E500) 1476 { /* default match */
1477 .pvr_mask = 0x00000000,
1478 .pvr_value = 0x00000000,
1479 .cpu_name = "(generic E200 PPC)",
1480 .cpu_features = CPU_FTRS_E200,
1481 .cpu_user_features = COMMON_USER_BOOKE |
1482 PPC_FEATURE_HAS_EFP_SINGLE |
1483 PPC_FEATURE_UNIFIED_CACHE,
1484 .dcache_bsize = 32,
1485 .machine_check = machine_check_e200,
1486 .platform = "ppc5554",
1487#endif /* CONFIG_E200 */
1488#ifdef CONFIG_E500
1455 { /* e500 */ 1489 { /* e500 */
1456 .pvr_mask = 0xffff0000, 1490 .pvr_mask = 0xffff0000,
1457 .pvr_value = 0x80200000, 1491 .pvr_value = 0x80200000,
@@ -1487,20 +1521,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1487 .machine_check = machine_check_e500, 1521 .machine_check = machine_check_e500,
1488 .platform = "ppc8548", 1522 .platform = "ppc8548",
1489 }, 1523 },
1490#endif
1491#endif
1492#if !CLASSIC_PPC
1493 { /* default match */ 1524 { /* default match */
1494 .pvr_mask = 0x00000000, 1525 .pvr_mask = 0x00000000,
1495 .pvr_value = 0x00000000, 1526 .pvr_value = 0x00000000,
1496 .cpu_name = "(generic PPC)", 1527 .cpu_name = "(generic E500 PPC)",
1497 .cpu_features = CPU_FTRS_GENERIC_32, 1528 .cpu_features = CPU_FTRS_E500,
1498 .cpu_user_features = PPC_FEATURE_32, 1529 .cpu_user_features = COMMON_USER_BOOKE |
1530 PPC_FEATURE_HAS_SPE_COMP |
1531 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1499 .icache_bsize = 32, 1532 .icache_bsize = 32,
1500 .dcache_bsize = 32, 1533 .dcache_bsize = 32,
1534 .machine_check = machine_check_e500,
1501 .platform = "powerpc", 1535 .platform = "powerpc",
1502 } 1536#endif /* CONFIG_E500 */
1503#endif /* !CLASSIC_PPC */
1504#endif /* CONFIG_PPC32 */ 1537#endif /* CONFIG_PPC32 */
1505}; 1538};
1506 1539
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b84ec6a2fc94..c2b9dc4fce5d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -653,7 +653,14 @@ finish_tlb_load:
653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ 653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
654 654
655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */ 655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
656 rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */ 656
657 /*
658 * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
659 * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
660 * include/asm-powerpc/pgtable-ppc32.h for details).
661 */
662 rlwinm r12, r12, 0, 20, 10
663
657 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */ 664 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
658 665
659 /* Done...restore registers and get out of here. 666 /* Done...restore registers and get out of here.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 024805e1747d..25e84c0e1166 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1517,10 +1517,6 @@ _INIT_STATIC(start_here_multiplatform)
1517 addi r2,r2,0x4000 1517 addi r2,r2,0x4000
1518 add r2,r2,r26 1518 add r2,r2,r26
1519 1519
1520 /* Set initial ptr to current */
1521 LOAD_REG_IMMEDIATE(r4, init_task)
1522 std r4,PACACURRENT(r13)
1523
1524 /* Do very early kernel initializations, including initial hash table, 1520 /* Do very early kernel initializations, including initial hash table,
1525 * stab and slb setup before we turn on relocation. */ 1521 * stab and slb setup before we turn on relocation. */
1526 1522
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 289af348978d..4d5731b2429a 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -108,9 +108,6 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
108 if (size > 0x10000) 108 if (size > 0x10000)
109 size = 0x10000; 109 size = 0x10000;
110 110
111 printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
112 "mapping 64k\n");
113
114 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE, 111 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
115 size, _PAGE_NO_CACHE|_PAGE_GUARDED); 112 size, _PAGE_NO_CACHE|_PAGE_GUARDED);
116 return; 113 return;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 25e3fd8606ab..098fd96a394a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,8 @@ void __init setup_paca(int cpu)
170 170
171void __init early_setup(unsigned long dt_ptr) 171void __init early_setup(unsigned long dt_ptr)
172{ 172{
173 /* -------- printk is _NOT_ safe to use here ! ------- */
174
173 /* Fill in any unititialised pacas */ 175 /* Fill in any unititialised pacas */
174 initialise_pacas(); 176 initialise_pacas();
175 177
@@ -179,12 +181,14 @@ void __init early_setup(unsigned long dt_ptr)
179 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 181 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
180 setup_paca(0); 182 setup_paca(0);
181 183
182 /* Enable early debugging if any specified (see udbg.h) */
183 udbg_early_init();
184
185 /* Initialize lockdep early or else spinlocks will blow */ 184 /* Initialize lockdep early or else spinlocks will blow */
186 lockdep_init(); 185 lockdep_init();
187 186
187 /* -------- printk is now safe to use ------- */
188
189 /* Enable early debugging if any specified (see udbg.h) */
190 udbg_early_init();
191
188 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 192 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
189 193
190 /* 194 /*
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 04f74f9f9ab6..5bf7df146022 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -35,6 +35,7 @@
35#include <linux/percpu.h> 35#include <linux/percpu.h>
36#include <linux/types.h> 36#include <linux/types.h>
37#include <linux/ioport.h> 37#include <linux/ioport.h>
38#include <linux/kernel_stat.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
40#include <asm/pgtable.h> 41#include <asm/pgtable.h>
@@ -231,6 +232,54 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
231 "IBM,CBEA-Internal-Interrupt-Controller"); 232 "IBM,CBEA-Internal-Interrupt-Controller");
232} 233}
233 234
235extern int noirqdebug;
236
237static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
238{
239 const unsigned int cpu = smp_processor_id();
240
241 spin_lock(&desc->lock);
242
243 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
244
245 /*
246 * If we're currently running this IRQ, or its disabled,
247 * we shouldn't process the IRQ. Mark it pending, handle
248 * the necessary masking and go out
249 */
250 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
251 !desc->action)) {
252 desc->status |= IRQ_PENDING;
253 goto out_eoi;
254 }
255
256 kstat_cpu(cpu).irqs[irq]++;
257
258 /* Mark the IRQ currently in progress.*/
259 desc->status |= IRQ_INPROGRESS;
260
261 do {
262 struct irqaction *action = desc->action;
263 irqreturn_t action_ret;
264
265 if (unlikely(!action))
266 goto out_eoi;
267
268 desc->status &= ~IRQ_PENDING;
269 spin_unlock(&desc->lock);
270 action_ret = handle_IRQ_event(irq, action);
271 if (!noirqdebug)
272 note_interrupt(irq, desc, action_ret);
273 spin_lock(&desc->lock);
274
275 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
276
277 desc->status &= ~IRQ_INPROGRESS;
278out_eoi:
279 desc->chip->eoi(irq);
280 spin_unlock(&desc->lock);
281}
282
234static int iic_host_map(struct irq_host *h, unsigned int virq, 283static int iic_host_map(struct irq_host *h, unsigned int virq,
235 irq_hw_number_t hw) 284 irq_hw_number_t hw)
236{ 285{
@@ -240,10 +289,10 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
240 break; 289 break;
241 case IIC_IRQ_TYPE_IOEXC: 290 case IIC_IRQ_TYPE_IOEXC:
242 set_irq_chip_and_handler(virq, &iic_ioexc_chip, 291 set_irq_chip_and_handler(virq, &iic_ioexc_chip,
243 handle_fasteoi_irq); 292 handle_iic_irq);
244 break; 293 break;
245 default: 294 default:
246 set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); 295 set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
247 } 296 }
248 return 0; 297 return 0;
249} 298}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 6bab44b7716b..70c660121ec4 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -141,6 +141,10 @@ static void spu_restart_dma(struct spu *spu)
141 141
142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) 142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
144 else {
145 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
146 mb();
147 }
144} 148}
145 149
146static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb) 150static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
226 return 0; 230 return 0;
227 } 231 }
228 232
229 spu->class_0_pending = 0; 233 spu->class_1_dar = ea;
230 spu->dar = ea; 234 spu->class_1_dsisr = dsisr;
231 spu->dsisr = dsisr; 235
236 spu->stop_callback(spu, 1);
232 237
233 spu->stop_callback(spu); 238 spu->class_1_dar = 0;
239 spu->class_1_dsisr = 0;
234 240
235 return 0; 241 return 0;
236} 242}
@@ -318,11 +324,15 @@ spu_irq_class_0(int irq, void *data)
318 stat = spu_int_stat_get(spu, 0) & mask; 324 stat = spu_int_stat_get(spu, 0) & mask;
319 325
320 spu->class_0_pending |= stat; 326 spu->class_0_pending |= stat;
321 spu->dsisr = spu_mfc_dsisr_get(spu); 327 spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
322 spu->dar = spu_mfc_dar_get(spu); 328 spu->class_0_dar = spu_mfc_dar_get(spu);
323 spin_unlock(&spu->register_lock); 329 spin_unlock(&spu->register_lock);
324 330
325 spu->stop_callback(spu); 331 spu->stop_callback(spu, 0);
332
333 spu->class_0_pending = 0;
334 spu->class_0_dsisr = 0;
335 spu->class_0_dar = 0;
326 336
327 spu_int_stat_clear(spu, 0, stat); 337 spu_int_stat_clear(spu, 0, stat);
328 338
@@ -363,6 +373,9 @@ spu_irq_class_1(int irq, void *data)
363 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR) 373 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
364 ; 374 ;
365 375
376 spu->class_1_dsisr = 0;
377 spu->class_1_dar = 0;
378
366 return stat ? IRQ_HANDLED : IRQ_NONE; 379 return stat ? IRQ_HANDLED : IRQ_NONE;
367} 380}
368 381
@@ -396,10 +409,10 @@ spu_irq_class_2(int irq, void *data)
396 spu->ibox_callback(spu); 409 spu->ibox_callback(spu);
397 410
398 if (stat & CLASS2_SPU_STOP_INTR) 411 if (stat & CLASS2_SPU_STOP_INTR)
399 spu->stop_callback(spu); 412 spu->stop_callback(spu, 2);
400 413
401 if (stat & CLASS2_SPU_HALT_INTR) 414 if (stat & CLASS2_SPU_HALT_INTR)
402 spu->stop_callback(spu); 415 spu->stop_callback(spu, 2);
403 416
404 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR) 417 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
405 spu->mfc_callback(spu); 418 spu->mfc_callback(spu);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 67fa7247b80a..906a0a2a9fe1 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/sched.h>
31 32
32#include <asm/spu.h> 33#include <asm/spu.h>
33#include <asm/spu_priv1.h> 34#include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@ static u64 int_stat_get(struct spu *spu, int class)
75 76
76static void cpu_affinity_set(struct spu *spu, int cpu) 77static void cpu_affinity_set(struct spu *spu, int cpu)
77{ 78{
78 u64 target = iic_get_target_id(cpu); 79 u64 target;
79 u64 route = target << 48 | target << 32 | target << 16; 80 u64 route;
81
82 if (nr_cpus_node(spu->node)) {
83 cpumask_t spumask = node_to_cpumask(spu->node);
84 cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
85
86 if (!cpus_intersects(spumask, cpumask))
87 return;
88 }
89
90 target = iic_get_target_id(cpu);
91 route = target << 48 | target << 32 | target << 16;
80 out_be64(&spu->priv1->int_route_RW, route); 92 out_be64(&spu->priv1->int_route_RW, route);
81} 93}
82 94
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e46d300e21a5..f093a581ac74 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -83,13 +83,18 @@ int spufs_handle_class0(struct spu_context *ctx)
83 return 0; 83 return 0;
84 84
85 if (stat & CLASS0_DMA_ALIGNMENT_INTR) 85 if (stat & CLASS0_DMA_ALIGNMENT_INTR)
86 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT); 86 spufs_handle_event(ctx, ctx->csa.class_0_dar,
87 SPE_EVENT_DMA_ALIGNMENT);
87 88
88 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR) 89 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
89 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA); 90 spufs_handle_event(ctx, ctx->csa.class_0_dar,
91 SPE_EVENT_INVALID_DMA);
90 92
91 if (stat & CLASS0_SPU_ERROR_INTR) 93 if (stat & CLASS0_SPU_ERROR_INTR)
92 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR); 94 spufs_handle_event(ctx, ctx->csa.class_0_dar,
95 SPE_EVENT_SPE_ERROR);
96
97 ctx->csa.class_0_pending = 0;
93 98
94 return -EIO; 99 return -EIO;
95} 100}
@@ -119,8 +124,8 @@ int spufs_handle_class1(struct spu_context *ctx)
119 * in time, we can still expect to get the same fault 124 * in time, we can still expect to get the same fault
120 * the immediately after the context restore. 125 * the immediately after the context restore.
121 */ 126 */
122 ea = ctx->csa.dar; 127 ea = ctx->csa.class_1_dar;
123 dsisr = ctx->csa.dsisr; 128 dsisr = ctx->csa.class_1_dsisr;
124 129
125 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))) 130 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
126 return 0; 131 return 0;
@@ -158,7 +163,7 @@ int spufs_handle_class1(struct spu_context *ctx)
158 * time slicing will not preempt the context while the page fault 163 * time slicing will not preempt the context while the page fault
159 * handler is running. Context switch code removes mappings. 164 * handler is running. Context switch code removes mappings.
160 */ 165 */
161 ctx->csa.dar = ctx->csa.dsisr = 0; 166 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
162 167
163 /* 168 /*
164 * If we handled the fault successfully and are in runnable 169 * If we handled the fault successfully and are in runnable
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 0c32a05ab068..f407b2471855 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/file.h> 24#include <linux/file.h>
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/fsnotify.h>
26#include <linux/backing-dev.h> 27#include <linux/backing-dev.h>
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/ioctl.h> 29#include <linux/ioctl.h>
@@ -223,7 +224,7 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
223 parent = dir->d_parent->d_inode; 224 parent = dir->d_parent->d_inode;
224 ctx = SPUFS_I(dir->d_inode)->i_ctx; 225 ctx = SPUFS_I(dir->d_inode)->i_ctx;
225 226
226 mutex_lock(&parent->i_mutex); 227 mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
227 ret = spufs_rmdir(parent, dir); 228 ret = spufs_rmdir(parent, dir);
228 mutex_unlock(&parent->i_mutex); 229 mutex_unlock(&parent->i_mutex);
229 WARN_ON(ret); 230 WARN_ON(ret);
@@ -618,12 +619,15 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode,
618 mode &= ~current->fs->umask; 619 mode &= ~current->fs->umask;
619 620
620 if (flags & SPU_CREATE_GANG) 621 if (flags & SPU_CREATE_GANG)
621 return spufs_create_gang(nd->path.dentry->d_inode, 622 ret = spufs_create_gang(nd->path.dentry->d_inode,
622 dentry, nd->path.mnt, mode); 623 dentry, nd->path.mnt, mode);
623 else 624 else
624 return spufs_create_context(nd->path.dentry->d_inode, 625 ret = spufs_create_context(nd->path.dentry->d_inode,
625 dentry, nd->path.mnt, flags, mode, 626 dentry, nd->path.mnt, flags, mode,
626 filp); 627 filp);
628 if (ret >= 0)
629 fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
630 return ret;
627 631
628out_dput: 632out_dput:
629 dput(dentry); 633 dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index a9c35b7b719f..b7493b865812 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -11,7 +11,7 @@
11#include "spufs.h" 11#include "spufs.h"
12 12
13/* interrupt-level stop callback function. */ 13/* interrupt-level stop callback function. */
14void spufs_stop_callback(struct spu *spu) 14void spufs_stop_callback(struct spu *spu, int irq)
15{ 15{
16 struct spu_context *ctx = spu->ctx; 16 struct spu_context *ctx = spu->ctx;
17 17
@@ -24,9 +24,19 @@ void spufs_stop_callback(struct spu *spu)
24 */ 24 */
25 if (ctx) { 25 if (ctx) {
26 /* Copy exception arguments into module specific structure */ 26 /* Copy exception arguments into module specific structure */
27 ctx->csa.class_0_pending = spu->class_0_pending; 27 switch(irq) {
28 ctx->csa.dsisr = spu->dsisr; 28 case 0 :
29 ctx->csa.dar = spu->dar; 29 ctx->csa.class_0_pending = spu->class_0_pending;
30 ctx->csa.class_0_dsisr = spu->class_0_dsisr;
31 ctx->csa.class_0_dar = spu->class_0_dar;
32 break;
33 case 1 :
34 ctx->csa.class_1_dsisr = spu->class_1_dsisr;
35 ctx->csa.class_1_dar = spu->class_1_dar;
36 break;
37 case 2 :
38 break;
39 }
30 40
31 /* ensure that the exception status has hit memory before a 41 /* ensure that the exception status has hit memory before a
32 * thread waiting on the context's stop queue is woken */ 42 * thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@ void spufs_stop_callback(struct spu *spu)
34 44
35 wake_up_all(&ctx->stop_wq); 45 wake_up_all(&ctx->stop_wq);
36 } 46 }
37
38 /* Clear callback arguments from spu structure */
39 spu->class_0_pending = 0;
40 spu->dsisr = 0;
41 spu->dar = 0;
42} 47}
43 48
44int spu_stopped(struct spu_context *ctx, u32 *stat) 49int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
56 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped)) 61 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
57 return 1; 62 return 1;
58 63
59 dsisr = ctx->csa.dsisr; 64 dsisr = ctx->csa.class_0_dsisr;
65 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
66 return 1;
67
68 dsisr = ctx->csa.class_1_dsisr;
60 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) 69 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
61 return 1; 70 return 1;
62 71
@@ -294,7 +303,7 @@ static int spu_process_callback(struct spu_context *ctx)
294 u32 ls_pointer, npc; 303 u32 ls_pointer, npc;
295 void __iomem *ls; 304 void __iomem *ls;
296 long spu_ret; 305 long spu_ret;
297 int ret, ret2; 306 int ret;
298 307
299 /* get syscall block from local store */ 308 /* get syscall block from local store */
300 npc = ctx->ops->npc_read(ctx) & ~3; 309 npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@ static int spu_process_callback(struct spu_context *ctx)
316 if (spu_ret <= -ERESTARTSYS) { 325 if (spu_ret <= -ERESTARTSYS) {
317 ret = spu_handle_restartsys(ctx, &spu_ret, &npc); 326 ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
318 } 327 }
319 ret2 = spu_acquire(ctx); 328 mutex_lock(&ctx->state_mutex);
320 if (ret == -ERESTARTSYS) 329 if (ret == -ERESTARTSYS)
321 return ret; 330 return ret;
322 if (ret2)
323 return -EINTR;
324 } 331 }
325 332
326 /* need to re-get the ls, as it may have changed when we released the 333 /* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
343 if (mutex_lock_interruptible(&ctx->run_mutex)) 350 if (mutex_lock_interruptible(&ctx->run_mutex))
344 return -ERESTARTSYS; 351 return -ERESTARTSYS;
345 352
346 spu_enable_spu(ctx);
347 ctx->event_return = 0; 353 ctx->event_return = 0;
348 354
349 ret = spu_acquire(ctx); 355 ret = spu_acquire(ctx);
350 if (ret) 356 if (ret)
351 goto out_unlock; 357 goto out_unlock;
352 358
359 spu_enable_spu(ctx);
360
353 spu_update_sched_info(ctx); 361 spu_update_sched_info(ctx);
354 362
355 ret = spu_run_init(ctx, npc); 363 ret = spu_run_init(ctx, npc);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 7298e7db2c83..2e411f23462b 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -140,6 +140,9 @@ void __spu_update_sched_info(struct spu_context *ctx)
140 * if it is timesliced or preempted. 140 * if it is timesliced or preempted.
141 */ 141 */
142 ctx->cpus_allowed = current->cpus_allowed; 142 ctx->cpus_allowed = current->cpus_allowed;
143
144 /* Save the current cpu id for spu interrupt routing. */
145 ctx->last_ran = raw_smp_processor_id();
143} 146}
144 147
145void spu_update_sched_info(struct spu_context *ctx) 148void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
243 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0); 246 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
244 spu_restore(&ctx->csa, spu); 247 spu_restore(&ctx->csa, spu);
245 spu->timestamp = jiffies; 248 spu->timestamp = jiffies;
246 spu_cpu_affinity_set(spu, raw_smp_processor_id());
247 spu_switch_notify(spu, ctx); 249 spu_switch_notify(spu, ctx);
248 ctx->state = SPU_STATE_RUNNABLE; 250 ctx->state = SPU_STATE_RUNNABLE;
249 251
@@ -657,7 +659,8 @@ static struct spu *find_victim(struct spu_context *ctx)
657 659
658 victim->stats.invol_ctx_switch++; 660 victim->stats.invol_ctx_switch++;
659 spu->stats.invol_ctx_switch++; 661 spu->stats.invol_ctx_switch++;
660 spu_add_to_rq(victim); 662 if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
663 spu_add_to_rq(victim);
661 664
662 mutex_unlock(&victim->state_mutex); 665 mutex_unlock(&victim->state_mutex);
663 666
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 7312745b7540..454c277c1457 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -121,6 +121,7 @@ struct spu_context {
121 cpumask_t cpus_allowed; 121 cpumask_t cpus_allowed;
122 int policy; 122 int policy;
123 int prio; 123 int prio;
124 int last_ran;
124 125
125 /* statistics */ 126 /* statistics */
126 struct { 127 struct {
@@ -331,7 +332,7 @@ size_t spu_ibox_read(struct spu_context *ctx, u32 *data);
331/* irq callback funcs. */ 332/* irq callback funcs. */
332void spufs_ibox_callback(struct spu *spu); 333void spufs_ibox_callback(struct spu *spu);
333void spufs_wbox_callback(struct spu *spu); 334void spufs_wbox_callback(struct spu *spu);
334void spufs_stop_callback(struct spu *spu); 335void spufs_stop_callback(struct spu *spu, int irq);
335void spufs_mfc_callback(struct spu *spu); 336void spufs_mfc_callback(struct spu *spu);
336void spufs_dma_callback(struct spu *spu, int type); 337void spufs_dma_callback(struct spu *spu, int type);
337 338
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index d2a1249d36dd..3df9a36eb2f5 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -132,6 +132,14 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
132 spu_int_mask_set(spu, 2, 0ul); 132 spu_int_mask_set(spu, 2, 0ul);
133 eieio(); 133 eieio();
134 spin_unlock_irq(&spu->register_lock); 134 spin_unlock_irq(&spu->register_lock);
135
136 /*
137 * This flag needs to be set before calling synchronize_irq so
138 * that the update will be visible to the relevant handlers
139 * via a simple load.
140 */
141 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
142 clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
135 synchronize_irq(spu->irqs[0]); 143 synchronize_irq(spu->irqs[0]);
136 synchronize_irq(spu->irqs[1]); 144 synchronize_irq(spu->irqs[1]);
137 synchronize_irq(spu->irqs[2]); 145 synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@ static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
166 /* Save, Step 7: 174 /* Save, Step 7:
167 * Restore, Step 5: 175 * Restore, Step 5:
168 * Set a software context switch pending flag. 176 * Set a software context switch pending flag.
177 * Done above in Step 3 - disable_interrupts().
169 */ 178 */
170 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
171 mb();
172} 179}
173 180
174static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu) 181static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
186 MFC_CNTL_SUSPEND_COMPLETE); 193 MFC_CNTL_SUSPEND_COMPLETE);
187 /* fall through */ 194 /* fall through */
188 case MFC_CNTL_SUSPEND_COMPLETE: 195 case MFC_CNTL_SUSPEND_COMPLETE:
189 if (csa) { 196 if (csa)
190 csa->priv2.mfc_control_RW = 197 csa->priv2.mfc_control_RW =
191 MFC_CNTL_SUSPEND_MASK | 198 in_be64(&priv2->mfc_control_RW) |
192 MFC_CNTL_SUSPEND_DMA_QUEUE; 199 MFC_CNTL_SUSPEND_DMA_QUEUE;
193 }
194 break; 200 break;
195 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION: 201 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
196 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE); 202 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
197 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & 203 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
198 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) == 204 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
199 MFC_CNTL_SUSPEND_COMPLETE); 205 MFC_CNTL_SUSPEND_COMPLETE);
200 if (csa) { 206 if (csa)
201 csa->priv2.mfc_control_RW = 0; 207 csa->priv2.mfc_control_RW =
202 } 208 in_be64(&priv2->mfc_control_RW) &
209 ~MFC_CNTL_SUSPEND_DMA_QUEUE &
210 ~MFC_CNTL_SUSPEND_MASK;
203 break; 211 break;
204 } 212 }
205} 213}
@@ -249,16 +257,21 @@ static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
249 } 257 }
250} 258}
251 259
252static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu) 260static inline void save_mfc_stopped_status(struct spu_state *csa,
261 struct spu *spu)
253{ 262{
254 struct spu_priv2 __iomem *priv2 = spu->priv2; 263 struct spu_priv2 __iomem *priv2 = spu->priv2;
264 const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
265 MFC_CNTL_DMA_QUEUES_EMPTY;
255 266
256 /* Save, Step 12: 267 /* Save, Step 12:
257 * Read MFC_CNTL[Ds]. Update saved copy of 268 * Read MFC_CNTL[Ds]. Update saved copy of
258 * CSA.MFC_CNTL[Ds]. 269 * CSA.MFC_CNTL[Ds].
270 *
271 * update: do the same with MFC_CNTL[Q].
259 */ 272 */
260 csa->priv2.mfc_control_RW |= 273 csa->priv2.mfc_control_RW &= ~mask;
261 in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING; 274 csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
262} 275}
263 276
264static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu) 277static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@ static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
462 * Restore, Step 14. 475 * Restore, Step 14.
463 * Write MFC_CNTL[Pc]=1 (purge queue). 476 * Write MFC_CNTL[Pc]=1 (purge queue).
464 */ 477 */
465 out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST); 478 out_be64(&priv2->mfc_control_RW,
479 MFC_CNTL_PURGE_DMA_REQUEST |
480 MFC_CNTL_SUSPEND_MASK);
466 eieio(); 481 eieio();
467} 482}
468 483
@@ -725,10 +740,14 @@ static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
725 /* Save, Step 48: 740 /* Save, Step 48:
726 * Restore, Step 23. 741 * Restore, Step 23.
727 * Change the software context switch pending flag 742 * Change the software context switch pending flag
728 * to context switch active. 743 * to context switch active. This implementation does
744 * not uses a switch active flag.
729 * 745 *
730 * This implementation does not uses a switch active flag. 746 * Now that we have saved the mfc in the csa, we can add in the
747 * restart command if an exception occurred.
731 */ 748 */
749 if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
750 csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
732 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags); 751 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
733 mb(); 752 mb();
734} 753}
@@ -1690,6 +1709,13 @@ static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
1690 eieio(); 1709 eieio();
1691} 1710}
1692 1711
1712static inline void set_int_route(struct spu_state *csa, struct spu *spu)
1713{
1714 struct spu_context *ctx = spu->ctx;
1715
1716 spu_cpu_affinity_set(spu, ctx->last_ran);
1717}
1718
1693static inline void restore_other_spu_access(struct spu_state *csa, 1719static inline void restore_other_spu_access(struct spu_state *csa,
1694 struct spu *spu) 1720 struct spu *spu)
1695{ 1721{
@@ -1721,15 +1747,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
1721 */ 1747 */
1722 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW); 1748 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
1723 eieio(); 1749 eieio();
1750
1724 /* 1751 /*
1725 * FIXME: this is to restart a DMA that we were processing 1752 * The queue is put back into the same state that was evident prior to
1726 * before the save. better remember the fault information 1753 * the context switch. The suspend flag is added to the saved state in
1727 * in the csa instead. 1754 * the csa, if the operational state was suspending or suspended. In
1755 * this case, the code that suspended the mfc is responsible for
1756 * continuing it. Note that SPE faults do not change the operational
1757 * state of the spu.
1728 */ 1758 */
1729 if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
1730 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
1731 eieio();
1732 }
1733} 1759}
1734 1760
1735static inline void enable_user_access(struct spu_state *csa, struct spu *spu) 1761static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@ static int quiece_spu(struct spu_state *prev, struct spu *spu)
1788 save_spu_runcntl(prev, spu); /* Step 9. */ 1814 save_spu_runcntl(prev, spu); /* Step 9. */
1789 save_mfc_sr1(prev, spu); /* Step 10. */ 1815 save_mfc_sr1(prev, spu); /* Step 10. */
1790 save_spu_status(prev, spu); /* Step 11. */ 1816 save_spu_status(prev, spu); /* Step 11. */
1791 save_mfc_decr(prev, spu); /* Step 12. */ 1817 save_mfc_stopped_status(prev, spu); /* Step 12. */
1792 halt_mfc_decr(prev, spu); /* Step 13. */ 1818 halt_mfc_decr(prev, spu); /* Step 13. */
1793 save_timebase(prev, spu); /* Step 14. */ 1819 save_timebase(prev, spu); /* Step 14. */
1794 remove_other_spu_access(prev, spu); /* Step 15. */ 1820 remove_other_spu_access(prev, spu); /* Step 15. */
@@ -2000,6 +2026,7 @@ static void restore_csa(struct spu_state *next, struct spu *spu)
2000 check_ppuint_mb_stat(next, spu); /* Step 67. */ 2026 check_ppuint_mb_stat(next, spu); /* Step 67. */
2001 spu_invalidate_slbs(spu); /* Modified Step 68. */ 2027 spu_invalidate_slbs(spu); /* Modified Step 68. */
2002 restore_mfc_sr1(next, spu); /* Step 69. */ 2028 restore_mfc_sr1(next, spu); /* Step 69. */
2029 set_int_route(next, spu); /* NEW */
2003 restore_other_spu_access(next, spu); /* Step 70. */ 2030 restore_other_spu_access(next, spu); /* Step 70. */
2004 restore_spu_runcntl(next, spu); /* Step 71. */ 2031 restore_spu_runcntl(next, spu); /* Step 71. */
2005 restore_mfc_cntl(next, spu); /* Step 72. */ 2032 restore_mfc_cntl(next, spu); /* Step 72. */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 1814adbd2236..b4a54c52e880 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1387,28 +1387,59 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1387 resource_size_t size = res->end - res->start + 1; 1387 resource_size_t size = res->end - res->start + 1;
1388 u64 sa; 1388 u64 sa;
1389 1389
1390 /* Calculate window size */ 1390 if (port->endpoint) {
1391 sa = (0xffffffffffffffffull << ilog2(size));; 1391 resource_size_t ep_addr = 0;
1392 if (res->flags & IORESOURCE_PREFETCH) 1392 resource_size_t ep_size = 32 << 20;
1393 sa |= 0x8; 1393
1394 /* Currently we map a fixed 64MByte window to PLB address
1395 * 0 (SDRAM). This should probably be configurable via a dts
1396 * property.
1397 */
1398
1399 /* Calculate window size */
1400 sa = (0xffffffffffffffffull << ilog2(ep_size));;
1401
1402 /* Setup BAR0 */
1403 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1404 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
1405 PCI_BASE_ADDRESS_MEM_TYPE_64);
1394 1406
1395 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); 1407 /* Disable BAR1 & BAR2 */
1396 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); 1408 out_le32(mbase + PECFG_BAR1MPA, 0);
1409 out_le32(mbase + PECFG_BAR2HMPA, 0);
1410 out_le32(mbase + PECFG_BAR2LMPA, 0);
1397 1411
1398 /* The setup of the split looks weird to me ... let's see if it works */ 1412 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
1399 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); 1413 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
1400 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); 1414
1401 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); 1415 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
1402 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); 1416 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
1403 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); 1417 } else {
1404 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); 1418 /* Calculate window size */
1419 sa = (0xffffffffffffffffull << ilog2(size));;
1420 if (res->flags & IORESOURCE_PREFETCH)
1421 sa |= 0x8;
1422
1423 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1424 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1425
1426 /* The setup of the split looks weird to me ... let's see
1427 * if it works
1428 */
1429 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1430 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1431 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1432 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1433 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1434 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1435
1436 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1437 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1438 }
1405 1439
1406 /* Enable inbound mapping */ 1440 /* Enable inbound mapping */
1407 out_le32(mbase + PECFG_PIMEN, 0x1); 1441 out_le32(mbase + PECFG_PIMEN, 0x1);
1408 1442
1409 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1410 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1411
1412 /* Enable I/O, Mem, and Busmaster cycles */ 1443 /* Enable I/O, Mem, and Busmaster cycles */
1413 out_le16(mbase + PCI_COMMAND, 1444 out_le16(mbase + PCI_COMMAND,
1414 in_le16(mbase + PCI_COMMAND) | 1445 in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1422 const int *bus_range; 1453 const int *bus_range;
1423 int primary = 0, busses; 1454 int primary = 0, busses;
1424 void __iomem *mbase = NULL, *cfg_data = NULL; 1455 void __iomem *mbase = NULL, *cfg_data = NULL;
1425 1456 const u32 *pval;
1426 /* XXX FIXME: Handle endpoint mode properly */ 1457 u32 val;
1427 if (port->endpoint) {
1428 printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
1429 port->index);
1430 return;
1431 }
1432 1458
1433 /* Check if primary bridge */ 1459 /* Check if primary bridge */
1434 if (of_get_property(port->node, "primary", NULL)) 1460 if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1462 hose->last_busno = hose->first_busno + busses; 1488 hose->last_busno = hose->first_busno + busses;
1463 } 1489 }
1464 1490
1465 /* We map the external config space in cfg_data and the host config 1491 if (!port->endpoint) {
1466 * space in cfg_addr. External space is 1M per bus, internal space 1492 /* Only map the external config space in cfg_data for
1467 * is 4K 1493 * PCIe root-complexes. External space is 1M per bus
1494 */
1495 cfg_data = ioremap(port->cfg_space.start +
1496 (hose->first_busno + 1) * 0x100000,
1497 busses * 0x100000);
1498 if (cfg_data == NULL) {
1499 printk(KERN_ERR "%s: Can't map external config space !",
1500 port->node->full_name);
1501 goto fail;
1502 }
1503 hose->cfg_data = cfg_data;
1504 }
1505
1506 /* Always map the host config space in cfg_addr.
1507 * Internal space is 4K
1468 */ 1508 */
1469 cfg_data = ioremap(port->cfg_space.start +
1470 (hose->first_busno + 1) * 0x100000,
1471 busses * 0x100000);
1472 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); 1509 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1473 if (cfg_data == NULL || mbase == NULL) { 1510 if (mbase == NULL) {
1474 printk(KERN_ERR "%s: Can't map config space !", 1511 printk(KERN_ERR "%s: Can't map internal config space !",
1475 port->node->full_name); 1512 port->node->full_name);
1476 goto fail; 1513 goto fail;
1477 } 1514 }
1478
1479 hose->cfg_data = cfg_data;
1480 hose->cfg_addr = mbase; 1515 hose->cfg_addr = mbase;
1481 1516
1482 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name, 1517 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1489 port->hose = hose; 1524 port->hose = hose;
1490 mbase = (void __iomem *)hose->cfg_addr; 1525 mbase = (void __iomem *)hose->cfg_addr;
1491 1526
1492 /* 1527 if (!port->endpoint) {
1493 * Set bus numbers on our root port 1528 /*
1494 */ 1529 * Set bus numbers on our root port
1495 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); 1530 */
1496 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); 1531 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1497 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); 1532 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1533 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1534 }
1498 1535
1499 /* 1536 /*
1500 * OMRs are already reset, also disable PIMs 1537 * OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1515 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); 1552 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
1516 1553
1517 /* The root complex doesn't show up if we don't set some vendor 1554 /* The root complex doesn't show up if we don't set some vendor
1518 * and device IDs into it. Those are the same bogus one that the 1555 * and device IDs into it. The defaults below are the same bogus
1519 * initial code in arch/ppc add. We might want to change that. 1556 * one that the initial code in arch/ppc had. This can be
1557 * overwritten by setting the "vendor-id/device-id" properties
1558 * in the pciex node.
1520 */ 1559 */
1521 out_le16(mbase + 0x200, 0xaaa0 + port->index);
1522 out_le16(mbase + 0x202, 0xbed0 + port->index);
1523 1560
1524 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */ 1561 /* Get the (optional) vendor-/device-id from the device-tree */
1525 out_le32(mbase + 0x208, 0x06040001); 1562 pval = of_get_property(port->node, "vendor-id", NULL);
1563 if (pval) {
1564 val = *pval;
1565 } else {
1566 if (!port->endpoint)
1567 val = 0xaaa0 + port->index;
1568 else
1569 val = 0xeee0 + port->index;
1570 }
1571 out_le16(mbase + 0x200, val);
1572
1573 pval = of_get_property(port->node, "device-id", NULL);
1574 if (pval) {
1575 val = *pval;
1576 } else {
1577 if (!port->endpoint)
1578 val = 0xbed0 + port->index;
1579 else
1580 val = 0xfed0 + port->index;
1581 }
1582 out_le16(mbase + 0x202, val);
1583
1584 if (!port->endpoint) {
1585 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
1586 out_le32(mbase + 0x208, 0x06040001);
1587
1588 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1589 port->index);
1590 } else {
1591 /* Set Class Code to Processor/PPC */
1592 out_le32(mbase + 0x208, 0x0b200001);
1593
1594 printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
1595 port->index);
1596 }
1526 1597
1527 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1528 port->index);
1529 return; 1598 return;
1530 fail: 1599 fail:
1531 if (hose) 1600 if (hose)
@@ -1542,6 +1611,7 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1542 const u32 *pval; 1611 const u32 *pval;
1543 int portno; 1612 int portno;
1544 unsigned int dcrs; 1613 unsigned int dcrs;
1614 const char *val;
1545 1615
1546 /* First, proceed to core initialization as we assume there's 1616 /* First, proceed to core initialization as we assume there's
1547 * only one PCIe core in the system 1617 * only one PCIe core in the system
@@ -1573,8 +1643,20 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1573 } 1643 }
1574 port->sdr_base = *pval; 1644 port->sdr_base = *pval;
1575 1645
1576 /* XXX Currently, we only support root complex mode */ 1646 /* Check if device_type property is set to "pci" or "pci-endpoint".
1577 port->endpoint = 0; 1647 * Resulting from this setup this PCIe port will be configured
1648 * as root-complex or as endpoint.
1649 */
1650 val = of_get_property(port->node, "device_type", NULL);
1651 if (!strcmp(val, "pci-endpoint")) {
1652 port->endpoint = 1;
1653 } else if (!strcmp(val, "pci")) {
1654 port->endpoint = 0;
1655 } else {
1656 printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
1657 np->full_name);
1658 return;
1659 }
1578 1660
1579 /* Fetch config space registers address */ 1661 /* Fetch config space registers address */
1580 if (of_address_to_resource(np, 0, &port->cfg_space)) { 1662 if (of_address_to_resource(np, 0, &port->cfg_space)) {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 52c74780f403..1702de9395ee 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2842,9 +2842,11 @@ static void dump_spu_fields(struct spu *spu)
2842 DUMP_FIELD(spu, "0x%lx", ls_size); 2842 DUMP_FIELD(spu, "0x%lx", ls_size);
2843 DUMP_FIELD(spu, "0x%x", node); 2843 DUMP_FIELD(spu, "0x%x", node);
2844 DUMP_FIELD(spu, "0x%lx", flags); 2844 DUMP_FIELD(spu, "0x%lx", flags);
2845 DUMP_FIELD(spu, "0x%lx", dar);
2846 DUMP_FIELD(spu, "0x%lx", dsisr);
2847 DUMP_FIELD(spu, "%d", class_0_pending); 2845 DUMP_FIELD(spu, "%d", class_0_pending);
2846 DUMP_FIELD(spu, "0x%lx", class_0_dar);
2847 DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", class_1_dar);
2849 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", irqs[0]); 2850 DUMP_FIELD(spu, "0x%lx", irqs[0]);
2849 DUMP_FIELD(spu, "0x%lx", irqs[1]); 2851 DUMP_FIELD(spu, "0x%lx", irqs[1]);
2850 DUMP_FIELD(spu, "0x%lx", irqs[2]); 2852 DUMP_FIELD(spu, "0x%lx", irqs[2]);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6a679c3e15e8..8a68160079a9 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -448,14 +448,6 @@ config SH_DREAMCAST
448 Select Dreamcast if configuring for a SEGA Dreamcast. 448 Select Dreamcast if configuring for a SEGA Dreamcast.
449 More information at <http://www.linux-sh.org> 449 More information at <http://www.linux-sh.org>
450 450
451config SH_MPC1211
452 bool "Interface MPC1211"
453 depends on CPU_SUBTYPE_SH7751 && BROKEN
454 help
455 CTP/PCI-SH02 is a CPU module computer that is produced
456 by Interface Corporation.
457 More information at <http://www.interface.co.jp>
458
459config SH_SH03 451config SH_SH03
460 bool "Interface CTP/PCI-SH03" 452 bool "Interface CTP/PCI-SH03"
461 depends on CPU_SUBTYPE_SH7751 453 depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig"
657endmenu 649endmenu
658 650
659config ISA_DMA_API 651config ISA_DMA_API
660 def_bool y 652 bool
661 depends on SH_MPC1211
662 653
663menu "Kernel features" 654menu "Kernel features"
664 655
@@ -666,7 +657,7 @@ source kernel/Kconfig.hz
666 657
667config KEXEC 658config KEXEC
668 bool "kexec system call (EXPERIMENTAL)" 659 bool "kexec system call (EXPERIMENTAL)"
669 depends on EXPERIMENTAL 660 depends on SUPERH32 && EXPERIMENTAL
670 help 661 help
671 kexec is a system call that implements the ability to shutdown your 662 kexec is a system call that implements the ability to shutdown your
672 current kernel, and to start another kernel. It is like a reboot 663 current kernel, and to start another kernel. It is like a reboot
@@ -683,7 +674,7 @@ config KEXEC
683 674
684config CRASH_DUMP 675config CRASH_DUMP
685 bool "kernel crash dumps (EXPERIMENTAL)" 676 bool "kernel crash dumps (EXPERIMENTAL)"
686 depends on EXPERIMENTAL 677 depends on SUPERH32 && EXPERIMENTAL
687 help 678 help
688 Generate crash dump after being started by kexec. 679 Generate crash dump after being started by kexec.
689 This should be normally only set in special crash dump kernels 680 This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@ menu "Boot options"
763 754
764config ZERO_PAGE_OFFSET 755config ZERO_PAGE_OFFSET
765 hex "Zero page offset" 756 hex "Zero page offset"
766 default "0x00004000" if SH_MPC1211 || SH_SH03 757 default "0x00004000" if SH_SH03
767 default "0x00010000" if PAGE_SIZE_64KB 758 default "0x00010000" if PAGE_SIZE_64KB
768 default "0x00002000" if PAGE_SIZE_8KB 759 default "0x00002000" if PAGE_SIZE_8KB
769 default "0x00001000" 760 default "0x00001000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d9d28f9dd0db..0d2ef1e9a6fd 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
7 7
8config SH_STANDARD_BIOS 8config SH_STANDARD_BIOS
9 bool "Use LinuxSH standard BIOS" 9 bool "Use LinuxSH standard BIOS"
10 depends on SUPERH32
10 help 11 help
11 Say Y here if your target has the gdb-sh-stub 12 Say Y here if your target has the gdb-sh-stub
12 package from www.m17n.org (or any conforming standard LinuxSH BIOS) 13 package from www.m17n.org (or any conforming standard LinuxSH BIOS)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bb06f83e6239..8050b03d51fc 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721 110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
111machdir-$(CONFIG_SH_HP6XX) += hp6xx 111machdir-$(CONFIG_SH_HP6XX) += hp6xx
112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast 112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
113machdir-$(CONFIG_SH_MPC1211) += mpc1211
114machdir-$(CONFIG_SH_SH03) += sh03 113machdir-$(CONFIG_SH_SH03) += sh03
115machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear 114machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
116machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d 115machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644
index 8cd31b5d200b..000000000000
--- a/arch/sh/boards/mpc1211/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
3#
4
5obj-y := setup.o rtc.o
6
7obj-$(CONFIG_PCI) += pci.o
8
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644
index 23849f70f133..000000000000
--- a/arch/sh/boards/mpc1211/pci.c
+++ /dev/null
@@ -1,295 +0,0 @@
1/*
2 * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
3 *
4 * (c) 2002-2003 Saito.K & Jeanne
5 *
6 * Dustin McIntire (dustin@sensoria.com)
7 * Derived from arch/i386/kernel/pci-*.c which bore the message:
8 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 */
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/errno.h>
22#include <linux/irq.h>
23#include <linux/interrupt.h>
24
25#include <asm/machvec.h>
26#include <asm/io.h>
27#include <asm/mpc1211/pci.h>
28
29static struct resource mpcpci_io_resource = {
30 "MPCPCI IO",
31 0x00000000,
32 0xffffffff,
33 IORESOURCE_IO
34};
35
36static struct resource mpcpci_mem_resource = {
37 "MPCPCI mem",
38 0x00000000,
39 0xffffffff,
40 IORESOURCE_MEM
41};
42
43static struct pci_ops pci_direct_conf1;
44struct pci_channel board_pci_channels[] = {
45 {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
46 {NULL, NULL, NULL, 0, 0},
47};
48
49/*
50 * Direct access to PCI hardware...
51 */
52
53
54#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
55
56/*
57 * Functions for accessing PCI configuration space with type 1 accesses
58 */
59static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
60{
61 u32 word;
62 unsigned long flags;
63
64 /*
65 * PCIPDR may only be accessed as 32 bit words,
66 * so we must do byte alignment by hand
67 */
68 local_irq_save(flags);
69 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
70 word = readl(PCIPDR);
71 local_irq_restore(flags);
72
73 switch (size) {
74 case 1:
75 switch (where & 0x3) {
76 case 3:
77 *value = (u8)(word >> 24);
78 break;
79 case 2:
80 *value = (u8)(word >> 16);
81 break;
82 case 1:
83 *value = (u8)(word >> 8);
84 break;
85 default:
86 *value = (u8)word;
87 break;
88 }
89 break;
90 case 2:
91 switch (where & 0x3) {
92 case 3:
93 *value = (u16)(word >> 24);
94 local_irq_save(flags);
95 writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
96 word = readl(PCIPDR);
97 local_irq_restore(flags);
98 *value |= ((word & 0xff) << 8);
99 break;
100 case 2:
101 *value = (u16)(word >> 16);
102 break;
103 case 1:
104 *value = (u16)(word >> 8);
105 break;
106 default:
107 *value = (u16)word;
108 break;
109 }
110 break;
111 case 4:
112 *value = word;
113 break;
114 }
115 PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
116 return PCIBIOS_SUCCESSFUL;
117}
118
119/*
120 * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
121 * We'll allow an odd byte offset, though it should be illegal.
122 */
123static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
124{
125 u32 word,mask = 0;
126 unsigned long flags;
127 u32 shift = (where & 3) * 8;
128
129 if(size == 1) {
130 mask = ((1 << 8) - 1) << shift; // create the byte mask
131 } else if(size == 2){
132 if(shift == 24)
133 return PCIBIOS_BAD_REGISTER_NUMBER;
134 mask = ((1 << 16) - 1) << shift; // create the word mask
135 }
136 local_irq_save(flags);
137 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
138 if(size == 4){
139 writel(value, PCIPDR);
140 local_irq_restore(flags);
141 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
142 return PCIBIOS_SUCCESSFUL;
143 }
144 word = readl(PCIPDR);
145 word &= ~mask;
146 word |= ((value << shift) & mask);
147 writel(word, PCIPDR);
148 local_irq_restore(flags);
149 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
150 return PCIBIOS_SUCCESSFUL;
151}
152
153#undef CONFIG_CMD
154
155static struct pci_ops pci_direct_conf1 = {
156 .read = pci_conf1_read,
157 .write = pci_conf1_write,
158};
159
160static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
161{
162 dev->resource[0].start = 0x1f0;
163 dev->resource[0].end = 0x1f7;
164 dev->resource[0].flags = IORESOURCE_IO;
165 dev->resource[1].start = 0x3f6;
166 dev->resource[1].end = 0x3f6;
167 dev->resource[1].flags = IORESOURCE_IO;
168 dev->resource[2].start = 0x170;
169 dev->resource[2].end = 0x177;
170 dev->resource[2].flags = IORESOURCE_IO;
171 dev->resource[3].start = 0x376;
172 dev->resource[3].end = 0x376;
173 dev->resource[3].flags = IORESOURCE_IO;
174 dev->resource[4].start = 0xf000;
175 dev->resource[4].end = 0xf00f;
176 dev->resource[4].flags = IORESOURCE_IO;
177}
178DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
179
180char * __devinit pcibios_setup(char *str)
181{
182 return str;
183}
184
185/*
186 * Called after each bus is probed, but before its children
187 * are examined.
188 */
189
190void __devinit pcibios_fixup_bus(struct pci_bus *b)
191{
192 pci_read_bridge_bases(b);
193}
194
195/*
196 * IRQ functions
197 */
198static inline u8 bridge_swizzle(u8 pin, u8 slot)
199{
200 return (((pin-1) + slot) % 4) + 1;
201}
202
203static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
204{
205 return (((pin-1) - slot) & 3) + 1;
206}
207
208static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
209{
210 unsigned long flags;
211 u8 pin = *pinp;
212 u32 word;
213
214 for ( ; dev->bus->self; dev = dev->bus->self) {
215 if (!pin)
216 continue;
217
218 if (dev->bus->number == 1) {
219 local_irq_save(flags);
220 writel(0x80000000 | 0x2c, PCIPAR);
221 word = readl(PCIPDR);
222 local_irq_restore(flags);
223 word >>= 16;
224
225 if (word == 0x0001)
226 pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
227 else
228 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
229 } else
230 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
231 }
232
233 *pinp = pin;
234
235 return PCI_SLOT(dev->devfn);
236}
237
238static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
239{
240 int irq = -1;
241
242 /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
243 if (dev->bus->number == 0) {
244 switch (slot) {
245 case 13: irq = 9; break; /* USB */
246 case 22: irq = 10; break; /* LAN */
247 default: irq = 0; break;
248 }
249 } else {
250 switch (pin) {
251 case 0: irq = 0; break;
252 case 1: irq = 7; break;
253 case 2: irq = 9; break;
254 case 3: irq = 10; break;
255 case 4: irq = 11; break;
256 }
257 }
258
259 if( irq < 0 ) {
260 PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
261 return irq;
262 }
263
264 PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
265
266 return irq;
267}
268
269void __init pcibios_fixup_irqs(void)
270{
271 pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
272}
273
274void pcibios_align_resource(void *data, struct resource *res,
275 resource_size_t size, resource_size_t align)
276{
277 resource_size_t start = res->start;
278
279 if (res->flags & IORESOURCE_IO) {
280 if (start >= 0x10000UL) {
281 if ((start & 0xffffUL) < 0x4000UL) {
282 start = (start & 0xffff0000UL) + 0x4000UL;
283 } else if ((start & 0xffffUL) >= 0xf000UL) {
284 start = (start & 0xffff0000UL) + 0x10000UL;
285 }
286 res->start = start;
287 } else {
288 if (start & 0x300) {
289 start = (start + 0x3ff) & ~0x3ff;
290 res->start = start;
291 }
292 }
293 }
294}
295
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644
index 03b123a4bba4..000000000000
--- a/arch/sh/boards/mpc1211/rtc.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/time.h>
12#include <linux/bcd.h>
13#include <linux/mc146818rtc.h>
14
15unsigned long get_cmos_time(void)
16{
17 unsigned int year, mon, day, hour, min, sec;
18
19 spin_lock(&rtc_lock);
20
21 do {
22 sec = CMOS_READ(RTC_SECONDS);
23 min = CMOS_READ(RTC_MINUTES);
24 hour = CMOS_READ(RTC_HOURS);
25 day = CMOS_READ(RTC_DAY_OF_MONTH);
26 mon = CMOS_READ(RTC_MONTH);
27 year = CMOS_READ(RTC_YEAR);
28 } while (sec != CMOS_READ(RTC_SECONDS));
29
30 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
31 BCD_TO_BIN(sec);
32 BCD_TO_BIN(min);
33 BCD_TO_BIN(hour);
34 BCD_TO_BIN(day);
35 BCD_TO_BIN(mon);
36 BCD_TO_BIN(year);
37 }
38
39 spin_unlock(&rtc_lock);
40
41 year += 1900;
42 if (year < 1970)
43 year += 100;
44
45 return mktime(year, mon, day, hour, min, sec);
46}
47
48void mpc1211_rtc_gettimeofday(struct timeval *tv)
49{
50
51 tv->tv_sec = get_cmos_time();
52 tv->tv_usec = 0;
53}
54
55/* arc/i386/kernel/time.c */
56/*
57 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
58 * called 500 ms after the second nowtime has started, because when
59 * nowtime is written into the registers of the CMOS clock, it will
60 * jump to the next second precisely 500 ms later. Check the Motorola
61 * MC146818A or Dallas DS12887 data sheet for details.
62 *
63 * BUG: This routine does not handle hour overflow properly; it just
64 * sets the minutes. Usually you'll only notice that after reboot!
65 */
66static int set_rtc_mmss(unsigned long nowtime)
67{
68 int retval = 0;
69 int real_seconds, real_minutes, cmos_minutes;
70 unsigned char save_control, save_freq_select;
71
72 /* gets recalled with irq locally disabled */
73 spin_lock(&rtc_lock);
74 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
75 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
76
77 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
78 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
79
80 cmos_minutes = CMOS_READ(RTC_MINUTES);
81 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
82 BCD_TO_BIN(cmos_minutes);
83
84 /*
85 * since we're only adjusting minutes and seconds,
86 * don't interfere with hour overflow. This avoids
87 * messing with unknown time zones but requires your
88 * RTC not to be off by more than 15 minutes
89 */
90 real_seconds = nowtime % 60;
91 real_minutes = nowtime / 60;
92 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
93 real_minutes += 30; /* correct for half hour time zone */
94 real_minutes %= 60;
95
96 if (abs(real_minutes - cmos_minutes) < 30) {
97 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
98 BIN_TO_BCD(real_seconds);
99 BIN_TO_BCD(real_minutes);
100 }
101 CMOS_WRITE(real_seconds,RTC_SECONDS);
102 CMOS_WRITE(real_minutes,RTC_MINUTES);
103 } else {
104 printk(KERN_WARNING
105 "set_rtc_mmss: can't update from %d to %d\n",
106 cmos_minutes, real_minutes);
107 retval = -1;
108 }
109
110 /* The following flags have to be released exactly in this order,
111 * otherwise the DS12887 (popular MC146818A clone with integrated
112 * battery and quartz) will not reset the oscillator and will not
113 * update precisely 500 ms later. You won't find this mentioned in
114 * the Dallas Semiconductor data sheets, but who believes data
115 * sheets anyway ... -- Markus Kuhn
116 */
117 CMOS_WRITE(save_control, RTC_CONTROL);
118 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
119 spin_unlock(&rtc_lock);
120
121 return retval;
122}
123
124int mpc1211_rtc_settimeofday(const struct timeval *tv)
125{
126 unsigned long nowtime = tv->tv_sec;
127
128 return set_rtc_mmss(nowtime);
129}
130
131void mpc1211_time_init(void)
132{
133 rtc_sh_get_time = mpc1211_rtc_gettimeofday;
134 rtc_sh_set_time = mpc1211_rtc_settimeofday;
135}
136
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644
index fede36361dc7..000000000000
--- a/arch/sh/boards/mpc1211/setup.c
+++ /dev/null
@@ -1,347 +0,0 @@
1/*
2 * linux/arch/sh/boards/mpc1211/setup.c
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/irq.h>
10#include <linux/hdreg.h>
11#include <linux/ide.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <asm/io.h>
15#include <asm/machvec.h>
16#include <asm/mpc1211/mpc1211.h>
17#include <asm/mpc1211/pci.h>
18#include <asm/mpc1211/m1543c.h>
19
20/* ALI15X3 SMBus address offsets */
21#define SMBHSTSTS (0 + 0x3100)
22#define SMBHSTCNT (1 + 0x3100)
23#define SMBHSTSTART (2 + 0x3100)
24#define SMBHSTCMD (7 + 0x3100)
25#define SMBHSTADD (3 + 0x3100)
26#define SMBHSTDAT0 (4 + 0x3100)
27#define SMBHSTDAT1 (5 + 0x3100)
28#define SMBBLKDAT (6 + 0x3100)
29
30/* Other settings */
31#define MAX_TIMEOUT 500 /* times 1/100 sec */
32
33/* ALI15X3 command constants */
34#define ALI15X3_ABORT 0x04
35#define ALI15X3_T_OUT 0x08
36#define ALI15X3_QUICK 0x00
37#define ALI15X3_BYTE 0x10
38#define ALI15X3_BYTE_DATA 0x20
39#define ALI15X3_WORD_DATA 0x30
40#define ALI15X3_BLOCK_DATA 0x40
41#define ALI15X3_BLOCK_CLR 0x80
42
43/* ALI15X3 status register bits */
44#define ALI15X3_STS_IDLE 0x04
45#define ALI15X3_STS_BUSY 0x08
46#define ALI15X3_STS_DONE 0x10
47#define ALI15X3_STS_DEV 0x20 /* device error */
48#define ALI15X3_STS_COLL 0x40 /* collision or no response */
49#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
50#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
51
52static void __init pci_write_config(unsigned long busNo,
53 unsigned long devNo,
54 unsigned long fncNo,
55 unsigned long cnfAdd,
56 unsigned long cnfData)
57{
58 ctrl_outl((0x80000000
59 + ((busNo & 0xff) << 16)
60 + ((devNo & 0x1f) << 11)
61 + ((fncNo & 0x07) << 8)
62 + (cnfAdd & 0xfc)), PCIPAR);
63
64 ctrl_outl(cnfData, PCIPDR);
65}
66
67/*
68 Initialize IRQ setting
69*/
70
71static unsigned char m_irq_mask = 0xfb;
72static unsigned char s_irq_mask = 0xff;
73
74static void disable_mpc1211_irq(unsigned int irq)
75{
76 if( irq < 8) {
77 m_irq_mask |= (1 << irq);
78 outb(m_irq_mask,I8259_M_MR);
79 } else {
80 s_irq_mask |= (1 << (irq - 8));
81 outb(s_irq_mask,I8259_S_MR);
82 }
83
84}
85
86static void enable_mpc1211_irq(unsigned int irq)
87{
88 if( irq < 8) {
89 m_irq_mask &= ~(1 << irq);
90 outb(m_irq_mask,I8259_M_MR);
91 } else {
92 s_irq_mask &= ~(1 << (irq - 8));
93 outb(s_irq_mask,I8259_S_MR);
94 }
95}
96
97static inline int mpc1211_irq_real(unsigned int irq)
98{
99 int value;
100 int irqmask;
101
102 if ( irq < 8) {
103 irqmask = 1<<irq;
104 outb(0x0b,I8259_M_CR); /* ISR register */
105 value = inb(I8259_M_CR) & irqmask;
106 outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
107 return value;
108 }
109 irqmask = 1<<(irq - 8);
110 outb(0x0b,I8259_S_CR); /* ISR register */
111 value = inb(I8259_S_CR) & irqmask;
112 outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
113 return value;
114}
115
116static void mask_and_ack_mpc1211(unsigned int irq)
117{
118 if(irq < 8) {
119 if(m_irq_mask & (1<<irq)){
120 if(!mpc1211_irq_real(irq)){
121 atomic_inc(&irq_err_count)
122 printk("spurious 8259A interrupt: IRQ %x\n",irq);
123 }
124 } else {
125 m_irq_mask |= (1<<irq);
126 }
127 inb(I8259_M_MR); /* DUMMY */
128 outb(m_irq_mask,I8259_M_MR); /* disable */
129 outb(0x60+irq,I8259_M_CR); /* EOI */
130
131 } else {
132 if(s_irq_mask & (1<<(irq - 8))){
133 if(!mpc1211_irq_real(irq)){
134 atomic_inc(&irq_err_count);
135 printk("spurious 8259A interrupt: IRQ %x\n",irq);
136 }
137 } else {
138 s_irq_mask |= (1<<(irq - 8));
139 }
140 inb(I8259_S_MR); /* DUMMY */
141 outb(s_irq_mask,I8259_S_MR); /* disable */
142 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
143 outb(0x60+2,I8259_M_CR);
144 }
145}
146
147static void end_mpc1211_irq(unsigned int irq)
148{
149 enable_mpc1211_irq(irq);
150}
151
152static unsigned int startup_mpc1211_irq(unsigned int irq)
153{
154 enable_mpc1211_irq(irq);
155 return 0;
156}
157
158static void shutdown_mpc1211_irq(unsigned int irq)
159{
160 disable_mpc1211_irq(irq);
161}
162
163static struct hw_interrupt_type mpc1211_irq_type = {
164 .typename = "MPC1211-IRQ",
165 .startup = startup_mpc1211_irq,
166 .shutdown = shutdown_mpc1211_irq,
167 .enable = enable_mpc1211_irq,
168 .disable = disable_mpc1211_irq,
169 .ack = mask_and_ack_mpc1211,
170 .end = end_mpc1211_irq
171};
172
173static void make_mpc1211_irq(unsigned int irq)
174{
175 irq_desc[irq].chip = &mpc1211_irq_type;
176 irq_desc[irq].status = IRQ_DISABLED;
177 irq_desc[irq].action = 0;
178 irq_desc[irq].depth = 1;
179 disable_mpc1211_irq(irq);
180}
181
182int mpc1211_irq_demux(int irq)
183{
184 unsigned int poll;
185
186 if( irq == 2 ) {
187 outb(0x0c,I8259_M_CR);
188 poll = inb(I8259_M_CR);
189 if(poll & 0x80) {
190 irq = (poll & 0x07);
191 }
192 if( irq == 2) {
193 outb(0x0c,I8259_S_CR);
194 poll = inb(I8259_S_CR);
195 irq = (poll & 0x07) + 8;
196 }
197 }
198 return irq;
199}
200
201static void __init init_mpc1211_IRQ(void)
202{
203 int i;
204 /*
205 * Super I/O (Just mimic PC):
206 * 1: keyboard
207 * 3: serial 1
208 * 4: serial 0
209 * 5: printer
210 * 6: floppy
211 * 8: rtc
212 * 10: lan
213 * 12: mouse
214 * 14: ide0
215 * 15: ide1
216 */
217
218 pci_write_config(0,0,0,0x54, 0xb0b0002d);
219 outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
220 outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
221 outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
222 outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
223 outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
224 outb(0x02, I8259_S_MR); /* s icw3 slave id */
225 outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
226 outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
227 outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
228 outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
229
230 for ( i=0; i < 16; i++) {
231 if(i != 2) {
232 make_mpc1211_irq(i);
233 }
234 }
235}
236
237static void delay1000(void)
238{
239 int i;
240
241 for (i=0; i<1000; i++)
242 ctrl_delay();
243}
244
245static int put_smb_blk(unsigned char *p, int address, int command, int no)
246{
247 int temp;
248 int timeout;
249 int i;
250
251 outb(0xff, SMBHSTSTS);
252 temp = inb(SMBHSTSTS);
253 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
254 delay1000();
255 temp = inb(SMBHSTSTS);
256 }
257 if (timeout >= MAX_TIMEOUT){
258 return -1;
259 }
260
261 outb(((address & 0x7f) << 1), SMBHSTADD);
262 outb(0xc0, SMBHSTCNT);
263 outb(command & 0xff, SMBHSTCMD);
264 outb(no & 0x1f, SMBHSTDAT0);
265
266 for(i = 1; i <= no; i++) {
267 outb(*p++, SMBBLKDAT);
268 }
269 outb(0xff, SMBHSTSTART);
270
271 temp = inb(SMBHSTSTS);
272 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
273 delay1000();
274 temp = inb(SMBHSTSTS);
275 }
276 if (timeout >= MAX_TIMEOUT) {
277 return -2;
278 }
279 if ( temp & ALI15X3_STS_ERR ){
280 return -3;
281 }
282 return 0;
283}
284
285static struct resource heartbeat_resources[] = {
286 [0] = {
287 .start = 0xa2000000,
288 .end = 0xa2000000,
289 .flags = IORESOURCE_MEM,
290 },
291};
292
293static struct platform_device heartbeat_device = {
294 .name = "heartbeat",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(heartbeat_resources),
297 .resource = heartbeat_resources,
298};
299
300static struct platform_device *mpc1211_devices[] __initdata = {
301 &heartbeat_device,
302};
303
304static int __init mpc1211_devices_setup(void)
305{
306 return platform_add_devices(mpc1211_devices,
307 ARRAY_SIZE(mpc1211_devices));
308}
309__initcall(mpc1211_devices_setup);
310
311/* arch/sh/boards/mpc1211/rtc.c */
312void mpc1211_time_init(void);
313
314static void __init mpc1211_setup(char **cmdline_p)
315{
316 unsigned char spd_buf[128];
317
318 __set_io_port_base(PA_PCI_IO);
319
320 pci_write_config(0,0,0,0x54, 0xb0b00000);
321
322 do {
323 outb(ALI15X3_ABORT, SMBHSTCNT);
324 spd_buf[0] = 0x0c;
325 spd_buf[1] = 0x43;
326 spd_buf[2] = 0x7f;
327 spd_buf[3] = 0x03;
328 spd_buf[4] = 0x00;
329 spd_buf[5] = 0x03;
330 spd_buf[6] = 0x00;
331 } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
332
333 board_time_init = mpc1211_time_init;
334
335 return 0;
336}
337
338/*
339 * The Machine Vector
340 */
341static struct sh_machine_vector mv_mpc1211 __initmv = {
342 .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
343 .mv_setup = mpc1211_setup,
344 .mv_nr_irqs = 48,
345 .mv_irq_demux = mpc1211_irq_demux,
346 .mv_init_irq = init_mpc1211_IRQ,
347};
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index e7c150d49702..01af44245b57 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 15#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/sh_keysc.h> 20#include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@
27 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) 28 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
28 */ 29 */
29 30
31static struct smc91x_platdata smc91x_info = {
32 .flags = SMC91X_USE_16BIT,
33 .irq_flags = IRQF_TRIGGER_HIGH,
34};
35
30static struct resource smc91x_eth_resources[] = { 36static struct resource smc91x_eth_resources[] = {
31 [0] = { 37 [0] = {
32 .name = "SMC91C111" , 38 .name = "SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = {
36 }, 42 },
37 [1] = { 43 [1] = {
38 .start = 32, /* IRQ0 */ 44 .start = 32, /* IRQ0 */
39 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 45 .flags = IORESOURCE_IRQ,
40 }, 46 },
41}; 47};
42 48
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = {
44 .name = "smc91x", 50 .name = "smc91x",
45 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 51 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
46 .resource = smc91x_eth_resources, 52 .resource = smc91x_eth_resources,
53 .dev = {
54 .platform_data = &smc91x_info,
55 },
47}; 56};
48 57
49static struct sh_keysc_info sh_keysc_info = { 58static struct sh_keysc_info sh_keysc_info = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 68f0ad1b637d..ae1cfcb29700 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, 62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
63 NULL, mask_registers, NULL, NULL); 63 NULL, mask_registers, NULL, NULL);
64 64
65unsigned char * __init highlander_init_irq_r7780mp(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index bd34048ed0e1..9d3921fe27c0 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, 55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
56 NULL, mask_registers, NULL, NULL); 56 NULL, mask_registers, NULL, NULL);
57 57
58unsigned char * __init highlander_init_irq_r7780rp(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (ctrl_inw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index bf7ec107fbc6..896c045aa39d 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
65 NULL, mask_registers, NULL, NULL); 65 NULL, mask_registers, NULL, NULL);
66 66
67unsigned char * __init highlander_init_irq_r7785rp(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index ac0a96522e45..bc79afb6fc4c 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p)
316 316
317static unsigned char irl2irq[HL_NR_IRL]; 317static unsigned char irl2irq[HL_NR_IRL];
318 318
319int highlander_irq_demux(int irq) 319static int highlander_irq_demux(int irq)
320{ 320{
321 if (irq >= HL_NR_IRL || !irl2irq[irq]) 321 if (irq >= HL_NR_IRL || !irl2irq[irq])
322 return irq; 322 return irq;
@@ -324,27 +324,9 @@ int highlander_irq_demux(int irq)
324 return irl2irq[irq]; 324 return irl2irq[irq];
325} 325}
326 326
327void __init highlander_init_irq(void) 327static void __init highlander_init_irq(void)
328{ 328{
329 unsigned char *ucp = NULL; 329 unsigned char *ucp = highlander_plat_irq_setup();
330
331 do {
332#ifdef CONFIG_SH_R7780MP
333 ucp = highlander_init_irq_r7780mp();
334 if (ucp)
335 break;
336#endif
337#ifdef CONFIG_SH_R7785RP
338 ucp = highlander_init_irq_r7785rp();
339 if (ucp)
340 break;
341#endif
342#ifdef CONFIG_SH_R7780RP
343 ucp = highlander_init_irq_r7780rp();
344 if (ucp)
345 break;
346#endif
347 } while (0);
348 330
349 if (ucp) { 331 if (ucp) {
350 plat_irq_setup_pins(IRQ_MODE_IRL3210); 332 plat_irq_setup_pins(IRQ_MODE_IRL3210);
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index f21ee49ef3a5..452d0d6459a4 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = {
109 .resource = heartbeat_resources, 109 .resource = heartbeat_resources,
110}; 110};
111 111
112#ifdef CONFIG_MFD_SM501
113static struct plat_serial8250_port uart_platform_data[] = { 112static struct plat_serial8250_port uart_platform_data[] = {
114 { 113 {
115 .membase = (void __iomem *)0xb3e30000, 114 .membase = (void __iomem *)0xb3e30000,
@@ -208,13 +207,9 @@ static struct platform_device sm501_device = {
208 .resource = sm501_resources, 207 .resource = sm501_resources,
209}; 208};
210 209
211#endif /* CONFIG_MFD_SM501 */
212
213static struct platform_device *rts7751r2d_devices[] __initdata = { 210static struct platform_device *rts7751r2d_devices[] __initdata = {
214#ifdef CONFIG_MFD_SM501
215 &uart_device, 211 &uart_device,
216 &sm501_device, 212 &sm501_device,
217#endif
218 &heartbeat_device, 213 &heartbeat_device,
219 &spi_sh_sci_device, 214 &spi_sh_sci_device,
220}; 215};
@@ -234,7 +229,9 @@ static int __init rts7751r2d_devices_setup(void)
234{ 229{
235 if (register_trapped_io(&cf_trapped_io) == 0) 230 if (register_trapped_io(&cf_trapped_io) == 0)
236 platform_device_register(&cf_ide_device); 231 platform_device_register(&cf_ide_device);
232
237 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 233 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
234
238 return platform_add_devices(rts7751r2d_devices, 235 return platform_add_devices(rts7751r2d_devices,
239 ARRAY_SIZE(rts7751r2d_devices)); 236 ARRAY_SIZE(rts7751r2d_devices));
240} 237}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 5b3ee089d91d..4fe84cc08406 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,12 +3,13 @@
3 * linux/arch/sh/boards/se/7206/setup.c 3 * linux/arch/sh/boards/se/7206/setup.c
4 * 4 *
5 * Copyright (C) 2006 Yoshinori Sato 5 * Copyright (C) 2006 Yoshinori Sato
6 * Copyright (C) 2007 Paul Mundt 6 * Copyright (C) 2007 - 2008 Paul Mundt
7 * 7 *
8 * Hitachi 7206 SolutionEngine Support. 8 * Hitachi 7206 SolutionEngine Support.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/smc91x.h>
12#include <asm/se7206.h> 13#include <asm/se7206.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/machvec.h> 15#include <asm/machvec.h>
@@ -16,8 +17,9 @@
16 17
17static struct resource smc91x_resources[] = { 18static struct resource smc91x_resources[] = {
18 [0] = { 19 [0] = {
19 .start = 0x300, 20 .name = "smc91x-regs",
20 .end = 0x300 + 0x020 - 1, 21 .start = PA_SMSC + 0x300,
22 .end = PA_SMSC + 0x300 + 0x020 - 1,
21 .flags = IORESOURCE_MEM, 23 .flags = IORESOURCE_MEM,
22 }, 24 },
23 [1] = { 25 [1] = {
@@ -27,9 +29,18 @@ static struct resource smc91x_resources[] = {
27 }, 29 },
28}; 30};
29 31
32static struct smc91x_platdata smc91x_info = {
33 .flags = SMC91X_USE_16BIT,
34};
35
30static struct platform_device smc91x_device = { 36static struct platform_device smc91x_device = {
31 .name = "smc91x", 37 .name = "smc91x",
32 .id = -1, 38 .id = -1,
39 .dev = {
40 .dma_mask = NULL,
41 .coherent_dma_mask = 0xffffffff,
42 .platform_data = &smc91x_info,
43 },
33 .num_resources = ARRAY_SIZE(smc91x_resources), 44 .num_resources = ARRAY_SIZE(smc91x_resources),
34 .resource = smc91x_resources, 45 .resource = smc91x_resources,
35}; 46};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 33f6ee71f848..ede3957fc14a 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/se7722.h> 19#include <asm/se7722.h>
19#include <asm/io.h> 20#include <asm/io.h>
@@ -44,6 +45,10 @@ static struct platform_device heartbeat_device = {
44}; 45};
45 46
46/* SMC91x */ 47/* SMC91x */
48static struct smc91x_platdata smc91x_info = {
49 .flags = SMC91X_USE_16BIT,
50};
51
47static struct resource smc91x_eth_resources[] = { 52static struct resource smc91x_eth_resources[] = {
48 [0] = { 53 [0] = {
49 .name = "smc91x-regs" , 54 .name = "smc91x-regs" ,
@@ -64,6 +69,7 @@ static struct platform_device smc91x_eth_device = {
64 .dev = { 69 .dev = {
65 .dma_mask = NULL, /* don't use dma */ 70 .dma_mask = NULL, /* don't use dma */
66 .coherent_dma_mask = 0xffffffff, 71 .coherent_dma_mask = 0xffffffff,
72 .platform_data = &smc91x_info,
67 }, 73 },
68 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 74 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
69 .resource = smc91x_eth_resources, 75 .resource = smc91x_eth_resources,
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 6ac8d4a4ed1d..c0d25fb1aa60 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -6,7 +6,6 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 head_32.o misc_32.o piggy.o 8 head_32.o misc_32.o piggy.o
9EXTRA_AFLAGS := -traditional
10 9
11OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o 10OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
12 11
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
index 4334f2b86d8f..912f3e205a0d 100644
--- a/arch/sh/boot/compressed/Makefile_64
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -13,7 +13,6 @@
13 13
14targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 14targets := vmlinux vmlinux.bin vmlinux.bin.gz \
15 head_64.o misc_64.o cache.o piggy.o 15 head_64.o misc_64.o cache.o piggy.o
16EXTRA_AFLAGS := -traditional
17 16
18OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \ 17OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
19 $(obj)/cache.o 18 $(obj)/cache.o
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index d6e0e2bdaad5..de45c6a3e33b 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -184,9 +184,8 @@ int intc_irq_describe(char* p, int irq)
184 184
185void __init plat_irq_setup(void) 185void __init plat_irq_setup(void)
186{ 186{
187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0; 187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
188 unsigned long reg; 188 unsigned long reg;
189 unsigned long data;
190 int i; 189 int i;
191 190
192 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC"); 191 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
@@ -196,11 +195,8 @@ void __init plat_irq_setup(void)
196 195
197 196
198 /* Set default: per-line enable/disable, priority driven ack/eoi */ 197 /* Set default: per-line enable/disable, priority driven ack/eoi */
199 for (i = 0; i < NR_INTC_IRQS; i++) { 198 for (i = 0; i < NR_INTC_IRQS; i++)
200 if (platform_int_priority[i] != NO_PRIORITY) { 199 irq_desc[i].chip = &intc_irq_type;
201 irq_desc[i].chip = &intc_irq_type;
202 }
203 }
204 200
205 201
206 /* Disable all interrupts and set all priorities to 0 to avoid trouble */ 202 /* Disable all interrupts and set all priorities to 0 to avoid trouble */
@@ -211,35 +207,42 @@ void __init plat_irq_setup(void)
211 ctrl_outl( NO_PRIORITY, reg); 207 ctrl_outl( NO_PRIORITY, reg);
212 208
213 209
214 /* Set IRLM */ 210#ifdef CONFIG_SH_CAYMAN
215 /* If all the priorities are set to 'no priority', then 211 {
216 * assume we are using encoded mode. 212 unsigned long data;
217 */ 213
218 irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \ 214 /* Set IRLM */
219 platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3]; 215 /* If all the priorities are set to 'no priority', then
220 216 * assume we are using encoded mode.
221 if (irlm == NO_PRIORITY) { 217 */
222 /* IRLM = 0 */ 218 irlm = platform_int_priority[IRQ_IRL0] +
223 reg = INTC_ICR_CLEAR; 219 platform_int_priority[IRQ_IRL1] +
224 i = IRQ_INTA; 220 platform_int_priority[IRQ_IRL2] +
225 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n"); 221 platform_int_priority[IRQ_IRL3];
226 } else { 222 if (irlm == NO_PRIORITY) {
227 /* IRLM = 1 */ 223 /* IRLM = 0 */
228 reg = INTC_ICR_SET; 224 reg = INTC_ICR_CLEAR;
229 i = IRQ_IRL0; 225 i = IRQ_INTA;
230 } 226 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
231 ctrl_outl(INTC_ICR_IRLM, reg); 227 } else {
232 228 /* IRLM = 1 */
233 /* Set interrupt priorities according to platform description */ 229 reg = INTC_ICR_SET;
234 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { 230 i = IRQ_IRL0;
235 data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4);
236 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
237 /* Upon the 7th, set Priority Register */
238 ctrl_outl(data, reg);
239 data = 0;
240 reg += 8;
241 } 231 }
242 } 232 ctrl_outl(INTC_ICR_IRLM, reg);
233
234 /* Set interrupt priorities according to platform description */
235 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
236 data |= platform_int_priority[i] <<
237 ((i % INTC_INTPRI_PPREG) * 4);
238 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
239 /* Upon the 7th, set Priority Register */
240 ctrl_outl(data, reg);
241 data = 0;
242 reg += 8;
243 }
244 }
245#endif
243 246
244 /* 247 /*
245 * And now let interrupts come in. 248 * And now let interrupts come in.
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 84806b2027f8..da5dae787888 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Shared interrupt handling code for IPR and INTC2 types of IRQs. 2 * Shared interrupt handling code for IPR and INTC2 types of IRQs.
3 * 3 *
4 * Copyright (C) 2007 Magnus Damm 4 * Copyright (C) 2007, 2008 Magnus Damm
5 * 5 *
6 * Based on intc2.c and ipr.c 6 * Based on intc2.c and ipr.c
7 * 7 *
@@ -62,6 +62,9 @@ struct intc_desc_int {
62#endif 62#endif
63 63
64static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 64static unsigned int intc_prio_level[NR_IRQS]; /* for now */
65#ifdef CONFIG_CPU_SH3
66static unsigned long ack_handle[NR_IRQS];
67#endif
65 68
66static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 69static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
67{ 70{
@@ -98,17 +101,26 @@ static void write_32(unsigned long addr, unsigned long h, unsigned long data)
98 101
99static void modify_8(unsigned long addr, unsigned long h, unsigned long data) 102static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
100{ 103{
104 unsigned long flags;
105 local_irq_save(flags);
101 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr); 106 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
107 local_irq_restore(flags);
102} 108}
103 109
104static void modify_16(unsigned long addr, unsigned long h, unsigned long data) 110static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
105{ 111{
112 unsigned long flags;
113 local_irq_save(flags);
106 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr); 114 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
115 local_irq_restore(flags);
107} 116}
108 117
109static void modify_32(unsigned long addr, unsigned long h, unsigned long data) 118static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
110{ 119{
120 unsigned long flags;
121 local_irq_save(flags);
111 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr); 122 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
123 local_irq_restore(flags);
112} 124}
113 125
114enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 }; 126enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
@@ -219,6 +231,25 @@ static void intc_disable(unsigned int irq)
219 } 231 }
220} 232}
221 233
234#ifdef CONFIG_CPU_SH3
235static void intc_mask_ack(unsigned int irq)
236{
237 struct intc_desc_int *d = get_intc_desc(irq);
238 unsigned long handle = ack_handle[irq];
239 unsigned long addr;
240
241 intc_disable(irq);
242
243 /* read register and write zero only to the assocaited bit */
244
245 if (handle) {
246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
247 ctrl_inb(addr);
248 ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
249 }
250}
251#endif
252
222static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, 253static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
223 unsigned int nr_hp, 254 unsigned int nr_hp,
224 unsigned int irq) 255 unsigned int irq)
@@ -280,7 +311,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
280 [IRQ_TYPE_EDGE_FALLING] = VALID(0), 311 [IRQ_TYPE_EDGE_FALLING] = VALID(0),
281 [IRQ_TYPE_EDGE_RISING] = VALID(1), 312 [IRQ_TYPE_EDGE_RISING] = VALID(1),
282 [IRQ_TYPE_LEVEL_LOW] = VALID(2), 313 [IRQ_TYPE_LEVEL_LOW] = VALID(2),
314 /* SH7706, SH7707 and SH7709 do not support high level triggered */
315#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
316 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
317 !defined(CONFIG_CPU_SUBTYPE_SH7709)
283 [IRQ_TYPE_LEVEL_HIGH] = VALID(3), 318 [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
319#endif
284}; 320};
285 321
286static int intc_set_sense(unsigned int irq, unsigned int type) 322static int intc_set_sense(unsigned int irq, unsigned int type)
@@ -430,6 +466,40 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
430 return 0; 466 return 0;
431} 467}
432 468
469#ifdef CONFIG_CPU_SH3
470static unsigned int __init intc_ack_data(struct intc_desc *desc,
471 struct intc_desc_int *d,
472 intc_enum enum_id)
473{
474 struct intc_mask_reg *mr = desc->ack_regs;
475 unsigned int i, j, fn, mode;
476 unsigned long reg_e, reg_d;
477
478 for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
479 mr = desc->ack_regs + i;
480
481 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
482 if (mr->enum_ids[j] != enum_id)
483 continue;
484
485 fn = REG_FN_MODIFY_BASE;
486 mode = MODE_ENABLE_REG;
487 reg_e = mr->set_reg;
488 reg_d = mr->set_reg;
489
490 fn += (mr->reg_width >> 3) - 1;
491 return _INTC_MK(fn, mode,
492 intc_get_reg(d, reg_e),
493 intc_get_reg(d, reg_d),
494 1,
495 (mr->reg_width - 1) - j);
496 }
497 }
498
499 return 0;
500}
501#endif
502
433static unsigned int __init intc_sense_data(struct intc_desc *desc, 503static unsigned int __init intc_sense_data(struct intc_desc *desc,
434 struct intc_desc_int *d, 504 struct intc_desc_int *d,
435 intc_enum enum_id) 505 intc_enum enum_id)
@@ -530,6 +600,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
530 600
531 /* irq should be disabled by default */ 601 /* irq should be disabled by default */
532 d->chip.mask(irq); 602 d->chip.mask(irq);
603
604#ifdef CONFIG_CPU_SH3
605 if (desc->ack_regs)
606 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
607#endif
533} 608}
534 609
535static unsigned int __init save_reg(struct intc_desc_int *d, 610static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -560,6 +635,9 @@ void __init register_intc_controller(struct intc_desc *desc)
560 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 635 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
561 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 636 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
562 637
638#ifdef CONFIG_CPU_SH3
639 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
640#endif
563 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); 641 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
564#ifdef CONFIG_SMP 642#ifdef CONFIG_SMP
565 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp)); 643 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
@@ -592,14 +670,23 @@ void __init register_intc_controller(struct intc_desc *desc)
592 } 670 }
593 } 671 }
594 672
595 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
596
597 d->chip.name = desc->name; 673 d->chip.name = desc->name;
598 d->chip.mask = intc_disable; 674 d->chip.mask = intc_disable;
599 d->chip.unmask = intc_enable; 675 d->chip.unmask = intc_enable;
600 d->chip.mask_ack = intc_disable; 676 d->chip.mask_ack = intc_disable;
601 d->chip.set_type = intc_set_sense; 677 d->chip.set_type = intc_set_sense;
602 678
679#ifdef CONFIG_CPU_SH3
680 if (desc->ack_regs) {
681 for (i = 0; i < desc->nr_ack_regs; i++)
682 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
683
684 d->chip.mask_ack = intc_mask_ack;
685 }
686#endif
687
688 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
689
603 for (i = 0; i < desc->nr_vectors; i++) { 690 for (i = 0; i < desc->nr_vectors; i++) {
604 struct intc_vect *vect = desc->vectors + i; 691 struct intc_vect *vect = desc->vectors + i;
605 692
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 5627c0b3ffa8..6df2fb98eb30 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -300,7 +300,7 @@ static int denormal_addf(int hx, int hy)
300 iy = hy & 0x7fffffff; 300 iy = hy & 0x7fffffff;
301 if (iy < 0x00800000) { 301 if (iy < 0x00800000) {
302 ix = denormal_subf1(ix, iy); 302 ix = denormal_subf1(ix, iy);
303 if (ix < 0) { 303 if ((int) ix < 0) {
304 ix = -ix; 304 ix = -ix;
305 sign ^= 0x80000000; 305 sign ^= 0x80000000;
306 } 306 }
@@ -385,7 +385,7 @@ static long long denormal_addd(long long hx, long long hy)
385 iy = hy & 0x7fffffffffffffffLL; 385 iy = hy & 0x7fffffffffffffffLL;
386 if (iy < 0x0010000000000000LL) { 386 if (iy < 0x0010000000000000LL) {
387 ix = denormal_subd1(ix, iy); 387 ix = denormal_subd1(ix, iy);
388 if (ix < 0) { 388 if ((int) ix < 0) {
389 ix = -ix; 389 ix = -ix;
390 sign ^= 0x8000000000000000LL; 390 sign ^= 0x8000000000000000LL;
391 } 391 }
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 3ae4d9111f19..511de55af832 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux/SuperH SH-3 backends. 2# Makefile for the Linux/SuperH SH-3 backends.
3# 3#
4 4
5obj-y := ex.o probe.o entry.o 5obj-y := ex.o probe.o entry.o setup-sh3.o
6 6
7# CPU subtype setup 7# CPU subtype setup
8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644
index 000000000000..c98846857855
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -0,0 +1,71 @@
1/*
2 * Shared SH3 Setup code
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/io.h>
14
15/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
16
17enum {
18 UNUSED = 0,
19
20 /* interrupt sources */
21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
22};
23
24static struct intc_vect vectors_irq0123[] __initdata = {
25 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
26 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
27};
28
29static struct intc_vect vectors_irq45[] __initdata = {
30 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
31};
32
33static struct intc_prio_reg prio_registers[] __initdata = {
34 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
35 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
36};
37
38static struct intc_mask_reg ack_registers[] __initdata = {
39 { 0xa4000004, 0, 8, /* IRR0 */
40 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
41};
42
43static struct intc_sense_reg sense_registers[] __initdata = {
44 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
45};
46
47static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
48 vectors_irq0123, NULL, NULL,
49 prio_registers, sense_registers, ack_registers);
50
51static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
52 vectors_irq45, NULL, NULL,
53 prio_registers, sense_registers, ack_registers);
54
55#define INTC_ICR1 0xa4000010UL
56#define INTC_ICR1_IRQLVL (1<<14)
57
58void __init plat_irq_setup_pins(int mode)
59{
60 if (mode == IRQ_MODE_IRQ) {
61 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
62 register_intc_controller(&intc_desc_irq0123);
63 return;
64 }
65 BUG();
66}
67
68void __init plat_irq_setup_sh3(void)
69{
70 register_intc_controller(&intc_desc_irq45);
71}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f581534cb732..6468ae86b944 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -37,7 +37,7 @@ enum {
37}; 37};
38 38
39static struct intc_vect vectors[] __initdata = { 39static struct intc_vect vectors[] __initdata = {
40 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 40 /* IRQ0->5 are handled in setup-sh3.c */
41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -48,7 +48,7 @@ static struct intc_vect vectors[] __initdata = {
48 INTC_VECT(ADC_ADI, 0x980), 48 INTC_VECT(ADC_ADI, 0x980),
49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), 49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), 50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
51 INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0), 51 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), 53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), 54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, 81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
82 NULL, prio_registers, NULL); 82 NULL, prio_registers, NULL);
83 83
84static struct intc_vect vectors_irq[] __initdata = {
85 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
86 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
87};
88
89static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
90 NULL, prio_registers, NULL);
91
92static struct plat_sci_port sci_platform_data[] = { 84static struct plat_sci_port sci_platform_data[] = {
93 { 85 {
94 .mapbase = 0xa4410000, 86 .mapbase = 0xa4410000,
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void)
159} 151}
160__initcall(sh7705_devices_setup); 152__initcall(sh7705_devices_setup);
161 153
162void __init plat_irq_setup_pins(int mode)
163{
164 if (mode == IRQ_MODE_IRQ) {
165 register_intc_controller(&intc_desc_irq);
166 return;
167 }
168 BUG();
169}
170
171void __init plat_irq_setup(void) 154void __init plat_irq_setup(void)
172{ 155{
173 register_intc_controller(&intc_desc); 156 register_intc_controller(&intc_desc);
157 plat_irq_setup_sh3();
174} 158}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index d3733b13ea52..93c55e2ed952 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = {
52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
54 defined(CONFIG_CPU_SUBTYPE_SH7709) 54 defined(CONFIG_CPU_SUBTYPE_SH7709)
55 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 55 /* IRQ0->5 are handled in setup-sh3.c */
56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
58 INTC_VECT(ADC_ADI, 0x980), 58 INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, 104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
105 NULL, prio_registers, NULL); 105 NULL, prio_registers, NULL);
106 106
107#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
108 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
109 defined(CONFIG_CPU_SUBTYPE_SH7709)
110static struct intc_vect vectors_irq[] __initdata = {
111 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
112 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
113};
114
115static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
116 NULL, prio_registers, NULL);
117#endif
118
119static struct resource rtc_resources[] = { 107static struct resource rtc_resources[] = {
120 [0] = { 108 [0] = {
121 .start = 0xfffffec0, 109 .start = 0xfffffec0,
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void)
194} 182}
195__initcall(sh770x_devices_setup); 183__initcall(sh770x_devices_setup);
196 184
197#define INTC_ICR1 0xa4000010UL 185void __init plat_irq_setup(void)
198#define INTC_ICR1_IRQLVL (1<<14)
199
200void __init plat_irq_setup_pins(int mode)
201{ 186{
202 if (mode == IRQ_MODE_IRQ) { 187 register_intc_controller(&intc_desc);
203#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 188#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
204 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 189 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
205 defined(CONFIG_CPU_SUBTYPE_SH7709) 190 defined(CONFIG_CPU_SUBTYPE_SH7709)
206 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); 191 plat_irq_setup_sh3();
207 register_intc_controller(&intc_desc_irq);
208 return;
209#endif 192#endif
210 }
211 BUG();
212}
213
214void __init plat_irq_setup(void)
215{
216 register_intc_controller(&intc_desc);
217} 193}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 7406c9ad9259..77eee481de47 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -38,7 +38,7 @@ enum {
38}; 38};
39 39
40static struct intc_vect vectors[] __initdata = { 40static struct intc_vect vectors[] __initdata = {
41 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 41 /* IRQ0->5 are handled in setup-sh3.c */
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), 44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -79,10 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, 80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } }, 81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
82 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } }, 82 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
83#ifdef CONFIG_CPU_SUBTYPE_SH7710
84 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
85#endif
86 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } }, 83 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
87 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } }, 84 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
88 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, 85 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
@@ -91,14 +88,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
91static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, 88static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
92 NULL, prio_registers, NULL); 89 NULL, prio_registers, NULL);
93 90
94static struct intc_vect vectors_irq[] __initdata = {
95 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
96 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
97};
98
99static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
100 NULL, prio_registers, NULL);
101
102static struct resource rtc_resources[] = { 91static struct resource rtc_resources[] = {
103 [0] = { 92 [0] = {
104 .start = 0xa413fec0, 93 .start = 0xa413fec0,
@@ -170,16 +159,8 @@ static int __init sh7710_devices_setup(void)
170} 159}
171__initcall(sh7710_devices_setup); 160__initcall(sh7710_devices_setup);
172 161
173void __init plat_irq_setup_pins(int mode)
174{
175 if (mode == IRQ_MODE_IRQ) {
176 register_intc_controller(&intc_desc_irq);
177 return;
178 }
179 BUG();
180}
181
182void __init plat_irq_setup(void) 162void __init plat_irq_setup(void)
183{ 163{
184 register_intc_controller(&intc_desc); 164 register_intc_controller(&intc_desc);
165 plat_irq_setup_sh3();
185} 166}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 8028082527c5..f807a21b066c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,10 +19,6 @@
19#include <linux/serial_sci.h> 19#include <linux/serial_sci.h>
20#include <asm/rtc.h> 20#include <asm/rtc.h>
21 21
22#define INTC_ICR1 0xA4140010UL
23#define INTC_ICR_IRLM 0x4000
24#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
25
26static struct resource rtc_resources[] = { 22static struct resource rtc_resources[] = {
27 [0] = { 23 [0] = {
28 .start = 0xa413fec0, 24 .start = 0xa413fec0,
@@ -170,6 +166,7 @@ enum {
170}; 166};
171 167
172static struct intc_vect vectors[] __initdata = { 168static struct intc_vect vectors[] __initdata = {
169 /* IRQ0->5 are handled in setup-sh3.c */
173 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 170 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
174 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), 171 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
175 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), 172 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
@@ -214,11 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
214 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 211 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
215 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 212 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
216 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, 213 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
217#if defined(CONFIG_CPU_SUBTYPE_SH7720)
218 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, 214 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
219#else
220 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
221#endif
222 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, 215 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
223 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, 216 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
224 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, 217 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -229,32 +222,8 @@ static struct intc_prio_reg prio_registers[] __initdata = {
229static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 222static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
230 NULL, prio_registers, NULL); 223 NULL, prio_registers, NULL);
231 224
232static struct intc_sense_reg sense_registers[] __initdata = {
233 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
234};
235
236static struct intc_vect vectors_irq[] __initdata = {
237 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
238 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
239 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
240};
241
242static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
243 NULL, NULL, prio_registers, sense_registers);
244
245void __init plat_irq_setup_pins(int mode)
246{
247 switch (mode) {
248 case IRQ_MODE_IRQ:
249 ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
250 register_intc_controller(&intc_irq_desc);
251 break;
252 default:
253 BUG();
254 }
255}
256
257void __init plat_irq_setup(void) 225void __init plat_irq_setup(void)
258{ 226{
259 register_intc_controller(&intc_desc); 227 register_intc_controller(&intc_desc);
228 plat_irq_setup_sh3();
260} 229}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ba8750176d91..05372ed6c568 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -143,12 +143,22 @@ resvec_save_area:
143trap_jtable: 143trap_jtable:
144 .long do_exception_error /* 0x000 */ 144 .long do_exception_error /* 0x000 */
145 .long do_exception_error /* 0x020 */ 145 .long do_exception_error /* 0x020 */
146#ifdef CONFIG_MMU
146 .long tlb_miss_load /* 0x040 */ 147 .long tlb_miss_load /* 0x040 */
147 .long tlb_miss_store /* 0x060 */ 148 .long tlb_miss_store /* 0x060 */
149#else
150 .long do_exception_error
151 .long do_exception_error
152#endif
148 ! ARTIFICIAL pseudo-EXPEVT setting 153 ! ARTIFICIAL pseudo-EXPEVT setting
149 .long do_debug_interrupt /* 0x080 */ 154 .long do_debug_interrupt /* 0x080 */
155#ifdef CONFIG_MMU
150 .long tlb_miss_load /* 0x0A0 */ 156 .long tlb_miss_load /* 0x0A0 */
151 .long tlb_miss_store /* 0x0C0 */ 157 .long tlb_miss_store /* 0x0C0 */
158#else
159 .long do_exception_error
160 .long do_exception_error
161#endif
152 .long do_address_error_load /* 0x0E0 */ 162 .long do_address_error_load /* 0x0E0 */
153 .long do_address_error_store /* 0x100 */ 163 .long do_address_error_store /* 0x100 */
154#ifdef CONFIG_SH_FPU 164#ifdef CONFIG_SH_FPU
@@ -185,10 +195,18 @@ trap_jtable:
185 .endr 195 .endr
186 .long do_IRQ /* 0xA00 */ 196 .long do_IRQ /* 0xA00 */
187 .long do_IRQ /* 0xA20 */ 197 .long do_IRQ /* 0xA20 */
198#ifdef CONFIG_MMU
188 .long itlb_miss_or_IRQ /* 0xA40 */ 199 .long itlb_miss_or_IRQ /* 0xA40 */
200#else
201 .long do_IRQ
202#endif
189 .long do_IRQ /* 0xA60 */ 203 .long do_IRQ /* 0xA60 */
190 .long do_IRQ /* 0xA80 */ 204 .long do_IRQ /* 0xA80 */
205#ifdef CONFIG_MMU
191 .long itlb_miss_or_IRQ /* 0xAA0 */ 206 .long itlb_miss_or_IRQ /* 0xAA0 */
207#else
208 .long do_IRQ
209#endif
192 .long do_exception_error /* 0xAC0 */ 210 .long do_exception_error /* 0xAC0 */
193 .long do_address_error_exec /* 0xAE0 */ 211 .long do_address_error_exec /* 0xAE0 */
194 .rept 8 212 .rept 8
@@ -274,6 +292,7 @@ not_a_tlb_miss:
274 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC 292 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC
275 * block making sure the final alignment is correct. 293 * block making sure the final alignment is correct.
276 */ 294 */
295#ifdef CONFIG_MMU
277tlb_miss: 296tlb_miss:
278 synco /* TAKum03020 (but probably a good idea anyway.) */ 297 synco /* TAKum03020 (but probably a good idea anyway.) */
279 putcon SP, KCR1 298 putcon SP, KCR1
@@ -377,6 +396,9 @@ fixup_to_invoke_general_handler:
377 getcon KCR1, SP 396 getcon KCR1, SP
378 pta handle_exception, tr0 397 pta handle_exception, tr0
379 blink tr0, ZERO 398 blink tr0, ZERO
399#else /* CONFIG_MMU */
400 .balign 256
401#endif
380 402
381/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE 403/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE
382 DOES END UP AT VBR+0x600 */ 404 DOES END UP AT VBR+0x600 */
@@ -1103,6 +1125,7 @@ restore_all:
1103 * fpu_error_or_IRQ? is a helper to deflect to the right cause. 1125 * fpu_error_or_IRQ? is a helper to deflect to the right cause.
1104 * 1126 *
1105 */ 1127 */
1128#ifdef CONFIG_MMU
1106tlb_miss_load: 1129tlb_miss_load:
1107 or SP, ZERO, r2 1130 or SP, ZERO, r2
1108 or ZERO, ZERO, r3 /* Read */ 1131 or ZERO, ZERO, r3 /* Read */
@@ -1132,6 +1155,7 @@ call_do_page_fault:
1132 movi do_page_fault, r6 1155 movi do_page_fault, r6
1133 ptabs r6, tr0 1156 ptabs r6, tr0
1134 blink tr0, ZERO 1157 blink tr0, ZERO
1158#endif /* CONFIG_MMU */
1135 1159
1136fpu_error_or_IRQA: 1160fpu_error_or_IRQA:
1137 pta its_IRQ, tr0 1161 pta its_IRQ, tr0
@@ -1481,6 +1505,7 @@ poke_real_address_q:
1481 ptabs LINK, tr0 1505 ptabs LINK, tr0
1482 blink tr0, r63 1506 blink tr0, r63
1483 1507
1508#ifdef CONFIG_MMU
1484/* 1509/*
1485 * --- User Access Handling Section 1510 * --- User Access Handling Section
1486 */ 1511 */
@@ -1604,6 +1629,7 @@ ___clear_user_exit:
1604 ptabs LINK, tr0 1629 ptabs LINK, tr0
1605 blink tr0, ZERO 1630 blink tr0, ZERO
1606 1631
1632#endif /* CONFIG_MMU */
1607 1633
1608/* 1634/*
1609 * int __strncpy_from_user(unsigned long __dest, unsigned long __src, 1635 * int __strncpy_from_user(unsigned long __dest, unsigned long __src,
@@ -2014,9 +2040,11 @@ sa_default_restorer:
2014 .global asm_uaccess_start /* Just a marker */ 2040 .global asm_uaccess_start /* Just a marker */
2015asm_uaccess_start: 2041asm_uaccess_start:
2016 2042
2043#ifdef CONFIG_MMU
2017 .long ___copy_user1, ___copy_user_exit 2044 .long ___copy_user1, ___copy_user_exit
2018 .long ___copy_user2, ___copy_user_exit 2045 .long ___copy_user2, ___copy_user_exit
2019 .long ___clear_user1, ___clear_user_exit 2046 .long ___clear_user1, ___clear_user_exit
2047#endif
2020 .long ___strncpy_from_user1, ___strncpy_from_user_exit 2048 .long ___strncpy_from_user1, ___strncpy_from_user_exit
2021 .long ___strnlen_user1, ___strnlen_user_exit 2049 .long ___strnlen_user1, ___strnlen_user_exit
2022 .long ___get_user_asm_b1, ___get_user_asm_b_exit 2050 .long ___get_user_asm_b1, ___get_user_asm_b_exit
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0f6374..92ad844b5c12 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
15#include <linux/string.h> 15#include <linux/string.h>
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/tlb.h>
18 19
19int __init detect_cpu_and_cache_system(void) 20int __init detect_cpu_and_cache_system(void)
20{ 21{
@@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void)
67 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); 68 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
68#endif 69#endif
69 70
71 /* Setup some I/D TLB defaults */
72 sh64_tlb_init();
73
70 return 0; 74 return 0;
71} 75}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 957f25611543..6b7d166694e2 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -141,7 +141,9 @@ static void scif_sercon_init(char *s)
141 */ 141 */
142static void scif_sercon_init(char *s) 142static void scif_sercon_init(char *s)
143{ 143{
144 struct uart_port *port = &scif_port;
144 unsigned baud = DEFAULT_BAUD; 145 unsigned baud = DEFAULT_BAUD;
146 unsigned int status;
145 char *e; 147 char *e;
146 148
147 if (*s == ',') 149 if (*s == ',')
@@ -160,19 +162,25 @@ static void scif_sercon_init(char *s)
160 baud = DEFAULT_BAUD; 162 baud = DEFAULT_BAUD;
161 } 163 }
162 164
163 ctrl_outw(0, scif_port.mapbase + 8); 165 do {
164 ctrl_outw(0, scif_port.mapbase); 166 status = sci_in(port, SCxSR);
167 } while (!(status & SCxSR_TEND(port)));
168
169 sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
170 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
171 sci_out(port, SCSMR, 0);
165 172
166 /* Set baud rate */ 173 /* Set baud rate */
167 ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) / 174 sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
168 (32 * baud) - 1, scif_port.mapbase + 4); 175 (32 * baud) - 1);
169 176 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
170 ctrl_outw(12, scif_port.mapbase + 24); 177
171 ctrl_outw(8, scif_port.mapbase + 24); 178 sci_out(port, SCSPTR, 0);
172 ctrl_outw(0, scif_port.mapbase + 32); 179 sci_out(port, SCxSR, 0x60);
173 ctrl_outw(0x60, scif_port.mapbase + 16); 180 sci_out(port, SCLSR, 0);
174 ctrl_outw(0, scif_port.mapbase + 36); 181
175 ctrl_outw(0x30, scif_port.mapbase + 8); 182 sci_out(port, SCFCR, 0);
183 sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
176} 184}
177#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */ 185#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
178#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */ 186#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 284f66f1ebbe..516bde9c50fa 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -53,6 +53,7 @@ EXPORT_SYMBOL(cpu_data);
53 * sh_mv= on the command line, prior to .machvec.init teardown. 53 * sh_mv= on the command line, prior to .machvec.init teardown.
54 */ 54 */
55struct sh_machine_vector sh_mv = { .mv_name = "generic", }; 55struct sh_machine_vector sh_mv = { .mv_name = "generic", };
56EXPORT_SYMBOL(sh_mv);
56 57
57#ifdef CONFIG_VT 58#ifdef CONFIG_VT
58struct screen_info screen_info; 59struct screen_info screen_info;
@@ -76,11 +77,18 @@ static struct resource data_resource = {
76 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 77 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
77}; 78};
78 79
80static struct resource bss_resource = {
81 .name = "Kernel bss",
82 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
83};
84
79unsigned long memory_start; 85unsigned long memory_start;
80EXPORT_SYMBOL(memory_start); 86EXPORT_SYMBOL(memory_start);
81unsigned long memory_end = 0; 87unsigned long memory_end = 0;
82EXPORT_SYMBOL(memory_end); 88EXPORT_SYMBOL(memory_end);
83 89
90static struct resource mem_resources[MAX_NUMNODES];
91
84int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 92int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
85 93
86static int __init early_parse_mem(char *p) 94static int __init early_parse_mem(char *p)
@@ -169,6 +177,40 @@ static inline void __init reserve_crashkernel(void)
169{} 177{}
170#endif 178#endif
171 179
180void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
181 unsigned long end_pfn)
182{
183 struct resource *res = &mem_resources[nid];
184
185 WARN_ON(res->name); /* max one active range per node for now */
186
187 res->name = "System RAM";
188 res->start = start_pfn << PAGE_SHIFT;
189 res->end = (end_pfn << PAGE_SHIFT) - 1;
190 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
191 if (request_resource(&iomem_resource, res)) {
192 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
193 start_pfn, end_pfn);
194 return;
195 }
196
197 /*
198 * We don't know which RAM region contains kernel data,
199 * so we try it repeatedly and let the resource manager
200 * test it.
201 */
202 request_resource(res, &code_resource);
203 request_resource(res, &data_resource);
204 request_resource(res, &bss_resource);
205
206#ifdef CONFIG_KEXEC
207 if (crashk_res.start != crashk_res.end)
208 request_resource(res, &crashk_res);
209#endif
210
211 add_active_range(nid, start_pfn, end_pfn);
212}
213
172void __init setup_bootmem_allocator(unsigned long free_pfn) 214void __init setup_bootmem_allocator(unsigned long free_pfn)
173{ 215{
174 unsigned long bootmap_size; 216 unsigned long bootmap_size;
@@ -181,7 +223,7 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
181 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, 223 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
182 min_low_pfn, max_low_pfn); 224 min_low_pfn, max_low_pfn);
183 225
184 add_active_range(0, min_low_pfn, max_low_pfn); 226 __add_active_range(0, min_low_pfn, max_low_pfn);
185 register_bootmem_low_pages(); 227 register_bootmem_low_pages();
186 228
187 node_set_online(0); 229 node_set_online(0);
@@ -267,6 +309,8 @@ void __init setup_arch(char **cmdline_p)
267 code_resource.end = virt_to_phys(_etext)-1; 309 code_resource.end = virt_to_phys(_etext)-1;
268 data_resource.start = virt_to_phys(_etext); 310 data_resource.start = virt_to_phys(_etext);
269 data_resource.end = virt_to_phys(_edata)-1; 311 data_resource.end = virt_to_phys(_edata)-1;
312 bss_resource.start = virt_to_phys(__bss_start);
313 bss_resource.end = virt_to_phys(_ebss)-1;
270 314
271 memory_start = (unsigned long)__va(__MEMORY_START); 315 memory_start = (unsigned long)__va(__MEMORY_START);
272 if (!memory_end) 316 if (!memory_end)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 6d405462cee8..8f916536719c 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -20,8 +20,6 @@
20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); 20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
21extern struct hw_interrupt_type no_irq_type; 21extern struct hw_interrupt_type no_irq_type;
22 22
23EXPORT_SYMBOL(sh_mv);
24
25/* platform dependent support */ 23/* platform dependent support */
26EXPORT_SYMBOL(dump_fpu); 24EXPORT_SYMBOL(dump_fpu);
27EXPORT_SYMBOL(kernel_thread); 25EXPORT_SYMBOL(kernel_thread);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index a310c9707f03..9324d32adacc 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -16,6 +16,7 @@
16#include <linux/in6.h> 16#include <linux/in6.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/screen_info.h> 18#include <linux/screen_info.h>
19#include <asm/cacheflush.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <asm/uaccess.h> 21#include <asm/uaccess.h>
21#include <asm/checksum.h> 22#include <asm/checksum.h>
@@ -29,25 +30,50 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
29EXPORT_SYMBOL(dump_fpu); 30EXPORT_SYMBOL(dump_fpu);
30EXPORT_SYMBOL(kernel_thread); 31EXPORT_SYMBOL(kernel_thread);
31 32
33#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
34EXPORT_SYMBOL(clear_user_page);
35#endif
36
37#ifndef CONFIG_CACHE_OFF
38EXPORT_SYMBOL(flush_dcache_page);
39#endif
40
32/* Networking helper routines. */ 41/* Networking helper routines. */
42EXPORT_SYMBOL(csum_partial);
33EXPORT_SYMBOL(csum_partial_copy_nocheck); 43EXPORT_SYMBOL(csum_partial_copy_nocheck);
44#ifdef CONFIG_IPV6
45EXPORT_SYMBOL(csum_ipv6_magic);
46#endif
34 47
35#ifdef CONFIG_VT 48#ifdef CONFIG_VT
36EXPORT_SYMBOL(screen_info); 49EXPORT_SYMBOL(screen_info);
37#endif 50#endif
38 51
52EXPORT_SYMBOL(__put_user_asm_b);
53EXPORT_SYMBOL(__put_user_asm_w);
39EXPORT_SYMBOL(__put_user_asm_l); 54EXPORT_SYMBOL(__put_user_asm_l);
55EXPORT_SYMBOL(__put_user_asm_q);
56EXPORT_SYMBOL(__get_user_asm_b);
57EXPORT_SYMBOL(__get_user_asm_w);
40EXPORT_SYMBOL(__get_user_asm_l); 58EXPORT_SYMBOL(__get_user_asm_l);
59EXPORT_SYMBOL(__get_user_asm_q);
60EXPORT_SYMBOL(__strnlen_user);
61EXPORT_SYMBOL(__strncpy_from_user);
62EXPORT_SYMBOL(clear_page);
63EXPORT_SYMBOL(__clear_user);
41EXPORT_SYMBOL(copy_page); 64EXPORT_SYMBOL(copy_page);
42EXPORT_SYMBOL(__copy_user); 65EXPORT_SYMBOL(__copy_user);
43EXPORT_SYMBOL(empty_zero_page); 66EXPORT_SYMBOL(empty_zero_page);
44EXPORT_SYMBOL(memcpy); 67EXPORT_SYMBOL(memcpy);
45EXPORT_SYMBOL(__udelay); 68EXPORT_SYMBOL(__udelay);
46EXPORT_SYMBOL(__ndelay); 69EXPORT_SYMBOL(__ndelay);
70EXPORT_SYMBOL(__const_udelay);
47 71
48/* Ugh. These come in from libgcc.a at link time. */ 72/* Ugh. These come in from libgcc.a at link time. */
49#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) 73#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
50 74
51DECLARE_EXPORT(__sdivsi3); 75DECLARE_EXPORT(__sdivsi3);
76DECLARE_EXPORT(__sdivsi3_2);
52DECLARE_EXPORT(__muldi3); 77DECLARE_EXPORT(__muldi3);
53DECLARE_EXPORT(__udivsi3); 78DECLARE_EXPORT(__udivsi3);
79DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 898977ee2030..022a55f1c1d4 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -172,6 +172,7 @@ void do_gettimeofday(struct timeval *tv)
172 tv->tv_sec = sec; 172 tv->tv_sec = sec;
173 tv->tv_usec = usec; 173 tv->tv_usec = usec;
174} 174}
175EXPORT_SYMBOL(do_gettimeofday);
175 176
176int do_settimeofday(struct timespec *tv) 177int do_settimeofday(struct timespec *tv)
177{ 178{
@@ -240,7 +241,7 @@ static inline void do_timer_interrupt(void)
240 * the irq version of write_lock because as just said we have irq 241 * the irq version of write_lock because as just said we have irq
241 * locally disabled. -arca 242 * locally disabled. -arca
242 */ 243 */
243 write_lock(&xtime_lock); 244 write_seqlock(&xtime_lock);
244 asm ("getcon cr62, %0" : "=r" (current_ctc)); 245 asm ("getcon cr62, %0" : "=r" (current_ctc));
245 ctc_last_interrupt = (unsigned long) current_ctc; 246 ctc_last_interrupt = (unsigned long) current_ctc;
246 247
@@ -266,7 +267,7 @@ static inline void do_timer_interrupt(void)
266 /* do it again in 60 s */ 267 /* do it again in 60 s */
267 last_rtc_update = xtime.tv_sec - 600; 268 last_rtc_update = xtime.tv_sec - 600;
268 } 269 }
269 write_unlock(&xtime_lock); 270 write_sequnlock(&xtime_lock);
270 271
271#ifndef CONFIG_SMP 272#ifndef CONFIG_SMP
272 update_process_times(user_mode(get_irq_regs())); 273 update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 75825ef6e084..2fb8eaf6de60 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -186,8 +186,8 @@ void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs)
186 rr->pc = regs->pc; 186 rr->pc = regs->pc;
187 187
188 if (sp < stack_bottom + 3092) { 188 if (sp < stack_bottom + 3092) {
189 printk("evt_debug : stack underflow report\n");
190 int i, j; 189 int i, j;
190 printk("evt_debug : stack underflow report\n");
191 for (j=0, i = event_ptr; j<16; j++) { 191 for (j=0, i = event_ptr; j<16; j++) {
192 rr = event_ring + i; 192 rr = event_ring + i;
193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n", 193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index cbd6aa33c5ac..0d92a8a3ac9a 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,10 +2,11 @@
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# 3#
4 4
5obj-y := init.o extable_64.o consistent.o 5obj-y := init.o consistent.o
6 6
7mmu-y := tlb-nommu.o pg-nommu.o 7mmu-y := tlb-nommu.o pg-nommu.o extable_32.o
8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o 8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
9 extable_64.o
9 10
10ifndef CONFIG_CACHE_OFF 11ifndef CONFIG_CACHE_OFF
11obj-y += cache-sh5.o 12obj-y += cache-sh5.o
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 3877321fcede..9e277ec7d536 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -714,6 +714,7 @@ void flush_cache_sigtramp(unsigned long vaddr)
714 sh64_icache_inv_current_user_range(vaddr, end); 714 sh64_icache_inv_current_user_range(vaddr, end);
715} 715}
716 716
717#ifdef CONFIG_MMU
717/* 718/*
718 * These *MUST* lie in an area of virtual address space that's otherwise 719 * These *MUST* lie in an area of virtual address space that's otherwise
719 * unused. 720 * unused.
@@ -830,3 +831,4 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
830 else 831 else
831 sh64_clear_user_page_coloured(to, address); 832 sh64_clear_user_page_coloured(to, address);
832} 833}
834#endif
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index cea224c3e49b..6e0be24d26e2 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -343,6 +343,7 @@ unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *n
343 343
344 return shmedia_alloc_io(phys, size, name); 344 return shmedia_alloc_io(phys, size, name);
345} 345}
346EXPORT_SYMBOL(onchip_remap);
346 347
347void onchip_unmap(unsigned long vaddr) 348void onchip_unmap(unsigned long vaddr)
348{ 349{
@@ -370,6 +371,7 @@ void onchip_unmap(unsigned long vaddr)
370 kfree(res); 371 kfree(res);
371 } 372 }
372} 373}
374EXPORT_SYMBOL(onchip_unmap);
373 375
374#ifdef CONFIG_PROC_FS 376#ifdef CONFIG_PROC_FS
375static int 377static int
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 2de7302724fc..1663199ce888 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -59,7 +59,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
59 free_pfn = start_pfn = start >> PAGE_SHIFT; 59 free_pfn = start_pfn = start >> PAGE_SHIFT;
60 end_pfn = end >> PAGE_SHIFT; 60 end_pfn = end >> PAGE_SHIFT;
61 61
62 add_active_range(nid, start_pfn, end_pfn); 62 __add_active_range(nid, start_pfn, end_pfn);
63 63
64 /* Node-local pgdat */ 64 /* Node-local pgdat */
65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn); 65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 987c6682bf99..1bba7d36be90 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -28,7 +28,6 @@ HD64465 HD64465
287751SYSTEMH SH_7751_SYSTEMH 287751SYSTEMH SH_7751_SYSTEMH
29HP6XX SH_HP6XX 29HP6XX SH_HP6XX
30DREAMCAST SH_DREAMCAST 30DREAMCAST SH_DREAMCAST
31MPC1211 SH_MPC1211
32SNAPGEAR SH_SECUREEDGE5410 31SNAPGEAR SH_SECUREEDGE5410
33EDOSK7705 SH_EDOSK7705 32EDOSK7705 SH_EDOSK7705
34SH4202_MICRODEV SH_SH4202_MICRODEV 33SH4202_MICRODEV SH_SH4202_MICRODEV
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bbcafaa160c0..fe361ae7ef2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -335,6 +335,7 @@ config X86_RDC321X
335 select GENERIC_GPIO 335 select GENERIC_GPIO
336 select LEDS_CLASS 336 select LEDS_CLASS
337 select LEDS_GPIO 337 select LEDS_GPIO
338 select NEW_LEDS
338 help 339 help
339 This option is needed for RDC R-321x system-on-chip, also known 340 This option is needed for RDC R-321x system-on-chip, also known
340 as R-8610-(G). 341 as R-8610-(G).
@@ -1662,7 +1663,6 @@ config GEODE_MFGPT_TIMER
1662 1663
1663config OLPC 1664config OLPC
1664 bool "One Laptop Per Child support" 1665 bool "One Laptop Per Child support"
1665 depends on MGEODE_LX
1666 default n 1666 default n
1667 help 1667 help
1668 Add support for detecting the unique features of the OLPC 1668 Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468ae1993..c2e1ce33c7cb 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/cpu.h> 7#include <linux/cpu.h>
8 8
9#include <asm/pat.h>
9#include <asm/processor.h> 10#include <asm/processor.h>
10 11
11struct cpuid_bit { 12struct cpuid_bit {
@@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
48 set_cpu_cap(c, cb->feature); 49 set_cpu_cap(c, cb->feature);
49 } 50 }
50} 51}
52
53#ifdef CONFIG_X86_PAT
54void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
55{
56 switch (c->x86_vendor) {
57 case X86_VENDOR_AMD:
58 if (c->x86 >= 0xf && c->x86 <= 0x11)
59 return;
60 break;
61 case X86_VENDOR_INTEL:
62 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
63 return;
64 break;
65 }
66
67 pat_disable(cpu_has_pat ?
68 "PAT disabled. Not yet verified on this CPU type." :
69 "PAT not supported by CPU.");
70}
71#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a9c8ef..d0463a946247 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/mtrr.h> 13#include <asm/mtrr.h>
14#include <asm/mce.h> 14#include <asm/mce.h>
15#include <asm/pat.h>
15#ifdef CONFIG_X86_LOCAL_APIC 16#ifdef CONFIG_X86_LOCAL_APIC
16#include <asm/mpspec.h> 17#include <asm/mpspec.h>
17#include <asm/apic.h> 18#include <asm/apic.h>
@@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
308 309
309 } 310 }
310 311
311 clear_cpu_cap(c, X86_FEATURE_PAT);
312
313 switch (c->x86_vendor) {
314 case X86_VENDOR_AMD:
315 if (c->x86 >= 0xf && c->x86 <= 0x11)
316 set_cpu_cap(c, X86_FEATURE_PAT);
317 break;
318 case X86_VENDOR_INTEL:
319 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
320 set_cpu_cap(c, X86_FEATURE_PAT);
321 break;
322 }
323
324} 312}
325 313
326/* 314/*
@@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
409 init_scattered_cpuid_features(c); 397 init_scattered_cpuid_features(c);
410 } 398 }
411 399
412 clear_cpu_cap(c, X86_FEATURE_PAT);
413
414 switch (c->x86_vendor) {
415 case X86_VENDOR_AMD:
416 if (c->x86 >= 0xf && c->x86 <= 0x11)
417 set_cpu_cap(c, X86_FEATURE_PAT);
418 break;
419 case X86_VENDOR_INTEL:
420 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
421 set_cpu_cap(c, X86_FEATURE_PAT);
422 break;
423 }
424} 400}
425 401
426static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 402static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@ void __init early_cpu_init(void)
651 cpu_devs[cvdev->vendor] = cvdev->cpu_dev; 627 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
652 628
653 early_cpu_detect(); 629 early_cpu_detect();
630 validate_pat_support(&boot_cpu_data);
654} 631}
655 632
656/* Make sure %fs is initialized properly in idle threads */ 633/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca6cd70..e8edd63ab000 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@ void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
161} 161}
162EXPORT_SYMBOL_GPL(geode_gpio_setup_event); 162EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163 163
164int geode_has_vsa2(void)
165{
166 static int has_vsa2 = -1;
167
168 if (has_vsa2 == -1) {
169 /*
170 * The VSA has virtual registers that we can query for a
171 * signature.
172 */
173 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175
176 has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
177 }
178
179 return has_vsa2;
180}
181EXPORT_SYMBOL_GPL(geode_has_vsa2);
182
164static int __init geode_southbridge_init(void) 183static int __init geode_southbridge_init(void)
165{ 184{
166 if (!is_geode()) 185 if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b53195..e03cc952f233 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
450{ 450{
451 struct task_struct *tsk = current; 451 struct task_struct *tsk = current;
452 452
453 clear_fpu(tsk);
454 return __copy_from_user(&tsk->thread.xstate->fsave, buf, 453 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455 sizeof(struct i387_fsave_struct)); 454 sizeof(struct i387_fsave_struct));
456} 455}
@@ -461,7 +460,6 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
461 struct user_i387_ia32_struct env; 460 struct user_i387_ia32_struct env;
462 int err; 461 int err;
463 462
464 clear_fpu(tsk);
465 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], 463 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466 sizeof(struct i387_fxsave_struct)); 464 sizeof(struct i387_fxsave_struct));
467 /* mxcsr reserved bits must be masked to zero for security reasons */ 465 /* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@ int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
478 int err; 476 int err;
479 477
480 if (HAVE_HWFP) { 478 if (HAVE_HWFP) {
479 struct task_struct *tsk = current;
480
481 clear_fpu(tsk);
482
483 if (!used_math()) {
484 err = init_fpu(tsk);
485 if (err)
486 return err;
487 }
488
481 if (cpu_has_fxsr) 489 if (cpu_has_fxsr)
482 err = restore_i387_fxsave(buf); 490 err = restore_i387_fxsave(buf);
483 else 491 else
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb20b24..c0c68c18a788 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -95,7 +95,7 @@ void __init setup_per_cpu_areas(void)
95 95
96 /* Copy section for each CPU (we discard the original) */ 96 /* Copy section for each CPU (we discard the original) */
97 size = PERCPU_ENOUGH_ROOM; 97 size = PERCPU_ENOUGH_ROOM;
98 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 98 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99 size); 99 size);
100 100
101 for_each_possible_cpu(i) { 101 for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422af794..2c5f8b213e86 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@ static struct resource standard_io_resources[] = { {
127}, { 127}, {
128 .name = "keyboard", 128 .name = "keyboard",
129 .start = 0x0060, 129 .start = 0x0060,
130 .end = 0x006f, 130 .end = 0x0060,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, {
133 .name = "keyboard",
134 .start = 0x0064,
135 .end = 0x0064,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO 136 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, { 137}, {
133 .name = "dma page reg", 138 .name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e21c97c..f2fc8feb727d 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
70#include <asm/ds.h> 70#include <asm/ds.h>
71#include <asm/topology.h> 71#include <asm/topology.h>
72#include <asm/trampoline.h> 72#include <asm/trampoline.h>
73#include <asm/pat.h>
73 74
74#include <mach_apic.h> 75#include <mach_apic.h>
75#ifdef CONFIG_PARAVIRT 76#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@ static struct resource standard_io_resources[] = {
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "timer1", .start = 0x50, .end = 0x53, 130 { .name = "timer1", .start = 0x50, .end = 0x53,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "keyboard", .start = 0x60, .end = 0x6f, 132 { .name = "keyboard", .start = 0x60, .end = 0x60,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "keyboard", .start = 0x64, .end = 0x64,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 135 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "dma page reg", .start = 0x80, .end = 0x8f, 136 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 137 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -1063,25 +1066,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1063 if (c->extended_cpuid_level >= 0x80000007) 1066 if (c->extended_cpuid_level >= 0x80000007)
1064 c->x86_power = cpuid_edx(0x80000007); 1067 c->x86_power = cpuid_edx(0x80000007);
1065 1068
1066
1067 clear_cpu_cap(c, X86_FEATURE_PAT);
1068
1069 switch (c->x86_vendor) { 1069 switch (c->x86_vendor) {
1070 case X86_VENDOR_AMD: 1070 case X86_VENDOR_AMD:
1071 early_init_amd(c); 1071 early_init_amd(c);
1072 if (c->x86 >= 0xf && c->x86 <= 0x11)
1073 set_cpu_cap(c, X86_FEATURE_PAT);
1074 break; 1072 break;
1075 case X86_VENDOR_INTEL: 1073 case X86_VENDOR_INTEL:
1076 early_init_intel(c); 1074 early_init_intel(c);
1077 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1078 set_cpu_cap(c, X86_FEATURE_PAT);
1079 break; 1075 break;
1080 case X86_VENDOR_CENTAUR: 1076 case X86_VENDOR_CENTAUR:
1081 early_init_centaur(c); 1077 early_init_centaur(c);
1082 break; 1078 break;
1083 } 1079 }
1084 1080
1081 validate_pat_support(c);
1085} 1082}
1086 1083
1087/* 1084/*
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446cd30b6..60adbe22efa0 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
25#include <asm/mtrr.h> 25#include <asm/mtrr.h>
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28int pat_wc_enabled = 1; 28#ifdef CONFIG_X86_PAT
29int __read_mostly pat_wc_enabled = 1;
29 30
30static u64 __read_mostly boot_pat_state; 31void __init pat_disable(char *reason)
31
32static int nopat(char *str)
33{ 32{
34 pat_wc_enabled = 0; 33 pat_wc_enabled = 0;
35 printk(KERN_INFO "x86: PAT support disabled.\n"); 34 printk(KERN_INFO "%s\n", reason);
36
37 return 0;
38} 35}
39early_param("nopat", nopat);
40 36
41static int pat_known_cpu(void) 37static int nopat(char *str)
42{ 38{
43 if (!pat_wc_enabled) 39 pat_disable("PAT support disabled.");
44 return 0;
45
46 if (cpu_has_pat)
47 return 1;
48
49 pat_wc_enabled = 0;
50 printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
51 return 0; 40 return 0;
52} 41}
42early_param("nopat", nopat);
43#endif
44
45static u64 __read_mostly boot_pat_state;
53 46
54enum { 47enum {
55 PAT_UC = 0, /* uncached */ 48 PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@ void pat_init(void)
66{ 59{
67 u64 pat; 60 u64 pat;
68 61
69#ifndef CONFIG_X86_PAT 62 if (!pat_wc_enabled)
70 nopat(NULL);
71#endif
72
73 /* Boot CPU enables PAT based on CPU feature */
74 if (!smp_processor_id() && !pat_known_cpu())
75 return; 63 return;
76 64
77 /* APs enable PAT iff boot CPU has enabled it before */ 65 /* Paranoia check. */
78 if (smp_processor_id() && !pat_wc_enabled) 66 if (!cpu_has_pat) {
79 return; 67 printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
68 /*
69 * Panic if this happens on the secondary CPU, and we
70 * switched to PAT on the boot CPU. We have no way to
71 * undo PAT.
72 */
73 BUG_ON(boot_pat_state);
74 }
80 75
81 /* Set PWT to Write-Combining. All other bits stay the same */ 76 /* Set PWT to Write-Combining. All other bits stay the same */
82 /* 77 /*
@@ -95,9 +90,8 @@ void pat_init(void)
95 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); 90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
96 91
97 /* Boot CPU check */ 92 /* Boot CPU check */
98 if (!smp_processor_id()) { 93 if (!boot_pat_state)
99 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); 94 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
100 }
101 95
102 wrmsrl(MSR_IA32_CR_PAT, pat); 96 wrmsrl(MSR_IA32_CR_PAT, pat);
103 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", 97 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b18a88f..5c2799c20e47 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@ static int __init early_fill_mp_bus_info(void)
504 } 504 }
505 } 505 }
506 506
507#ifdef CONFIG_NUMA
508 for (i = 0; i < BUS_NR; i++) {
509 node = mp_bus_to_node[i];
510 if (node >= 0)
511 printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512 }
513#endif
514
515 for (i = 0; i < pci_root_num; i++) { 507 for (i = 0; i < pci_root_num; i++) {
516 int res_num; 508 int res_num;
517 int busnum; 509 int busnum;
diff --git a/crypto/hmac.c b/crypto/hmac.c
index b60c3c7aa320..14c6351e639d 100644
--- a/crypto/hmac.c
+++ b/crypto/hmac.c
@@ -57,14 +57,35 @@ static int hmac_setkey(struct crypto_hash *parent,
57 if (keylen > bs) { 57 if (keylen > bs) {
58 struct hash_desc desc; 58 struct hash_desc desc;
59 struct scatterlist tmp; 59 struct scatterlist tmp;
60 int tmplen;
60 int err; 61 int err;
61 62
62 desc.tfm = tfm; 63 desc.tfm = tfm;
63 desc.flags = crypto_hash_get_flags(parent); 64 desc.flags = crypto_hash_get_flags(parent);
64 desc.flags &= CRYPTO_TFM_REQ_MAY_SLEEP; 65 desc.flags &= CRYPTO_TFM_REQ_MAY_SLEEP;
65 sg_init_one(&tmp, inkey, keylen);
66 66
67 err = crypto_hash_digest(&desc, &tmp, keylen, digest); 67 err = crypto_hash_init(&desc);
68 if (err)
69 return err;
70
71 tmplen = bs * 2 + ds;
72 sg_init_one(&tmp, ipad, tmplen);
73
74 for (; keylen > tmplen; inkey += tmplen, keylen -= tmplen) {
75 memcpy(ipad, inkey, tmplen);
76 err = crypto_hash_update(&desc, &tmp, tmplen);
77 if (err)
78 return err;
79 }
80
81 if (keylen) {
82 memcpy(ipad, inkey, keylen);
83 err = crypto_hash_update(&desc, &tmp, keylen);
84 if (err)
85 return err;
86 }
87
88 err = crypto_hash_final(&desc, digest);
68 if (err) 89 if (err)
69 return err; 90 return err;
70 91
diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h
index 3b4e13b9ce1b..f451c7351a9d 100644
--- a/drivers/input/serio/i8042-io.h
+++ b/drivers/input/serio/i8042-io.h
@@ -25,7 +25,7 @@
25#elif defined(__arm__) 25#elif defined(__arm__)
26/* defined in include/asm-arm/arch-xxx/irqs.h */ 26/* defined in include/asm-arm/arch-xxx/irqs.h */
27#include <asm/irq.h> 27#include <asm/irq.h>
28#elif defined(CONFIG_SUPERH64) 28#elif defined(CONFIG_SH_CAYMAN)
29#include <asm/irq.h> 29#include <asm/irq.h>
30#else 30#else
31# define I8042_KBD_IRQ 1 31# define I8042_KBD_IRQ 1
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 626ac083f4e0..da5fecad74d9 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -425,7 +425,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
425 host->cclk = host->mclk; 425 host->cclk = host->mclk;
426 } else { 426 } else {
427 clk = host->mclk / (2 * ios->clock) - 1; 427 clk = host->mclk / (2 * ios->clock) - 1;
428 if (clk > 256) 428 if (clk >= 256)
429 clk = 255; 429 clk = 255;
430 host->cclk = host->mclk / (2 * (clk + 1)); 430 host->cclk = host->mclk / (2 * (clk + 1));
431 } 431 }
@@ -512,6 +512,18 @@ static int mmci_probe(struct amba_device *dev, void *id)
512 512
513 host->plat = plat; 513 host->plat = plat;
514 host->mclk = clk_get_rate(host->clk); 514 host->mclk = clk_get_rate(host->clk);
515 /*
516 * According to the spec, mclk is max 100 MHz,
517 * so we try to adjust the clock down to this,
518 * (if possible).
519 */
520 if (host->mclk > 100000000) {
521 ret = clk_set_rate(host->clk, 100000000);
522 if (ret < 0)
523 goto clk_disable;
524 host->mclk = clk_get_rate(host->clk);
525 DBG(host, "eventual mclk rate: %u Hz\n", host->mclk);
526 }
515 host->mmc = mmc; 527 host->mmc = mmc;
516 host->base = ioremap(dev->res.start, SZ_4K); 528 host->base = ioremap(dev->res.start, SZ_4K);
517 if (!host->base) { 529 if (!host->base) {
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 1bd69aa9e22a..17bc87a43ff4 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -374,7 +374,7 @@ config MTD_REDWOOD
374 374
375config MTD_SOLUTIONENGINE 375config MTD_SOLUTIONENGINE
376 tristate "CFI Flash device mapped on Hitachi SolutionEngine" 376 tristate "CFI Flash device mapped on Hitachi SolutionEngine"
377 depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS 377 depends on SUPERH && SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS
378 help 378 help
379 This enables access to the flash chips on the Hitachi SolutionEngine and 379 This enables access to the flash chips on the Hitachi SolutionEngine and
380 similar boards. Say 'Y' if you are building a kernel for such a board. 380 similar boards. Say 'Y' if you are building a kernel for such a board.
@@ -480,13 +480,6 @@ config MTD_H720X
480 This enables access to the flash chips on the Hynix evaluation boards. 480 This enables access to the flash chips on the Hynix evaluation boards.
481 If you have such a board, say 'Y'. 481 If you have such a board, say 'Y'.
482 482
483config MTD_MPC1211
484 tristate "CFI Flash device mapped on Interface MPC-1211"
485 depends on SH_MPC1211 && MTD_CFI
486 help
487 This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
488 If you have such a board, say 'Y'.
489
490config MTD_OMAP_NOR 483config MTD_OMAP_NOR
491 tristate "TI OMAP board mappings" 484 tristate "TI OMAP board mappings"
492 depends on MTD_CFI && ARCH_OMAP 485 depends on MTD_CFI && ARCH_OMAP
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index a9cbe80f99a0..957fb5f70f5e 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -58,7 +58,6 @@ obj-$(CONFIG_MTD_WALNUT) += walnut.o
58obj-$(CONFIG_MTD_H720X) += h720x-flash.o 58obj-$(CONFIG_MTD_H720X) += h720x-flash.o
59obj-$(CONFIG_MTD_SBC8240) += sbc8240.o 59obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
60obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o 60obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o
61obj-$(CONFIG_MTD_MPC1211) += mpc1211.o
62obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o 61obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
63obj-$(CONFIG_MTD_IXP2000) += ixp2000.o 62obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
64obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o 63obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
diff --git a/drivers/mtd/maps/mpc1211.c b/drivers/mtd/maps/mpc1211.c
deleted file mode 100644
index 45a00fac88ac..000000000000
--- a/drivers/mtd/maps/mpc1211.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * Flash on MPC-1211
3 *
4 * $Id: mpc1211.c,v 1.4 2004/09/16 23:27:13 gleixner Exp $
5 *
6 * (C) 2002 Interface, Saito.K & Jeanne
7 *
8 * GPL'd
9 */
10
11#include <linux/module.h>
12#include <linux/types.h>
13#include <linux/kernel.h>
14#include <asm/io.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/map.h>
17#include <linux/mtd/partitions.h>
18
19static struct mtd_info *flash_mtd;
20static struct mtd_partition *parsed_parts;
21
22struct map_info mpc1211_flash_map = {
23 .name = "MPC-1211 FLASH",
24 .size = 0x80000,
25 .bankwidth = 1,
26};
27
28static struct mtd_partition mpc1211_partitions[] = {
29 {
30 .name = "IPL & ETH-BOOT",
31 .offset = 0x00000000,
32 .size = 0x10000,
33 },
34 {
35 .name = "Flash FS",
36 .offset = 0x00010000,
37 .size = MTDPART_SIZ_FULL,
38 }
39};
40
41static int __init init_mpc1211_maps(void)
42{
43 int nr_parts;
44
45 mpc1211_flash_map.phys = 0;
46 mpc1211_flash_map.virt = (void __iomem *)P2SEGADDR(0);
47
48 simple_map_init(&mpc1211_flash_map);
49
50 printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n");
51 flash_mtd = do_map_probe("jedec_probe", &mpc1211_flash_map);
52 if (!flash_mtd) {
53 printk(KERN_NOTICE "Flash chips not detected at either possible location.\n");
54 return -ENXIO;
55 }
56 printk(KERN_NOTICE "MPC-1211: Flash at 0x%08lx\n", mpc1211_flash_map.virt & 0x1fffffff);
57 flash_mtd->module = THIS_MODULE;
58
59 parsed_parts = mpc1211_partitions;
60 nr_parts = ARRAY_SIZE(mpc1211_partitions);
61
62 add_mtd_partitions(flash_mtd, parsed_parts, nr_parts);
63 return 0;
64}
65
66static void __exit cleanup_mpc1211_maps(void)
67{
68 if (parsed_parts)
69 del_mtd_partitions(flash_mtd);
70 else
71 del_mtd_device(flash_mtd);
72 map_destroy(flash_mtd);
73}
74
75module_init(init_mpc1211_maps);
76module_exit(cleanup_mpc1211_maps);
77
78MODULE_LICENSE("GPL");
79MODULE_AUTHOR("Saito.K & Jeanne <ksaito@interface.co.jp>");
80MODULE_DESCRIPTION("MTD map driver for MPC-1211 boards. Interface");
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 110699bb4787..1f88e9e914ec 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -616,7 +616,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
616 goto err_badres; 616 goto err_badres;
617 } 617 }
618 618
619 rtc->regbase = (void __iomem *)rtc->res->start; 619 rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
620 if (unlikely(!rtc->regbase)) { 620 if (unlikely(!rtc->regbase)) {
621 ret = -EINVAL; 621 ret = -EINVAL;
622 goto err_badmap; 622 goto err_badmap;
@@ -626,7 +626,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
626 &sh_rtc_ops, THIS_MODULE); 626 &sh_rtc_ops, THIS_MODULE);
627 if (IS_ERR(rtc->rtc_dev)) { 627 if (IS_ERR(rtc->rtc_dev)) {
628 ret = PTR_ERR(rtc->rtc_dev); 628 ret = PTR_ERR(rtc->rtc_dev);
629 goto err_badmap; 629 goto err_unmap;
630 } 630 }
631 631
632 rtc->capabilities = RTC_DEF_CAPABILITIES; 632 rtc->capabilities = RTC_DEF_CAPABILITIES;
@@ -653,7 +653,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
653 dev_err(&pdev->dev, 653 dev_err(&pdev->dev,
654 "request period IRQ failed with %d, IRQ %d\n", ret, 654 "request period IRQ failed with %d, IRQ %d\n", ret,
655 rtc->periodic_irq); 655 rtc->periodic_irq);
656 goto err_badmap; 656 goto err_unmap;
657 } 657 }
658 658
659 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED, 659 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
@@ -663,7 +663,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
663 "request carry IRQ failed with %d, IRQ %d\n", ret, 663 "request carry IRQ failed with %d, IRQ %d\n", ret,
664 rtc->carry_irq); 664 rtc->carry_irq);
665 free_irq(rtc->periodic_irq, rtc); 665 free_irq(rtc->periodic_irq, rtc);
666 goto err_badmap; 666 goto err_unmap;
667 } 667 }
668 668
669 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, 669 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
@@ -674,7 +674,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
674 rtc->alarm_irq); 674 rtc->alarm_irq);
675 free_irq(rtc->carry_irq, rtc); 675 free_irq(rtc->carry_irq, rtc);
676 free_irq(rtc->periodic_irq, rtc); 676 free_irq(rtc->periodic_irq, rtc);
677 goto err_badmap; 677 goto err_unmap;
678 } 678 }
679 679
680 tmp = readb(rtc->regbase + RCR1); 680 tmp = readb(rtc->regbase + RCR1);
@@ -684,6 +684,8 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
684 684
685 return 0; 685 return 0;
686 686
687err_unmap:
688 iounmap(rtc->regbase);
687err_badmap: 689err_badmap:
688 release_resource(rtc->res); 690 release_resource(rtc->res);
689err_badres: 691err_badres:
@@ -708,6 +710,8 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev)
708 710
709 release_resource(rtc->res); 711 release_resource(rtc->res);
710 712
713 iounmap(rtc->regbase);
714
711 platform_set_drvdata(pdev, NULL); 715 platform_set_drvdata(pdev, NULL);
712 716
713 kfree(rtc); 717 kfree(rtc);
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 8a2f6a1baa74..d6b4ead693b7 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -65,9 +65,6 @@ static void bfin_serial_stop_tx(struct uart_port *port)
65{ 65{
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit; 67 struct circ_buf *xmit = &uart->port.info->xmit;
68#if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69 unsigned short ier;
70#endif
71 68
72 while (!(UART_GET_LSR(uart) & TEMT)) 69 while (!(UART_GET_LSR(uart) & TEMT))
73 cpu_relax(); 70 cpu_relax();
@@ -82,12 +79,8 @@ static void bfin_serial_stop_tx(struct uart_port *port)
82#ifdef CONFIG_BF54x 79#ifdef CONFIG_BF54x
83 /* Clear TFI bit */ 80 /* Clear TFI bit */
84 UART_PUT_LSR(uart, TFI); 81 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
86#else
87 ier = UART_GET_IER(uart);
88 ier &= ~ETBEI;
89 UART_PUT_IER(uart, ier);
90#endif 82#endif
83 UART_CLEAR_IER(uart, ETBEI);
91#endif 84#endif
92} 85}
93 86
@@ -102,14 +95,7 @@ static void bfin_serial_start_tx(struct uart_port *port)
102 if (uart->tx_done) 95 if (uart->tx_done)
103 bfin_serial_dma_tx_chars(uart); 96 bfin_serial_dma_tx_chars(uart);
104#else 97#else
105#ifdef CONFIG_BF54x
106 UART_SET_IER(uart, ETBEI); 98 UART_SET_IER(uart, ETBEI);
107#else
108 unsigned short ier;
109 ier = UART_GET_IER(uart);
110 ier |= ETBEI;
111 UART_PUT_IER(uart, ier);
112#endif
113 bfin_serial_tx_chars(uart); 99 bfin_serial_tx_chars(uart);
114#endif 100#endif
115} 101}
@@ -120,21 +106,10 @@ static void bfin_serial_start_tx(struct uart_port *port)
120static void bfin_serial_stop_rx(struct uart_port *port) 106static void bfin_serial_stop_rx(struct uart_port *port)
121{ 107{
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 108 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123#ifdef CONFIG_KGDB_UART 109#ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) { 110 if (uart->port.line != CONFIG_KGDB_UART_PORT)
125#endif 111#endif
126#ifdef CONFIG_BF54x
127 UART_CLEAR_IER(uart, ERBFI); 112 UART_CLEAR_IER(uart, ERBFI);
128#else
129 unsigned short ier;
130
131 ier = UART_GET_IER(uart);
132 ier &= ~ERBFI;
133 UART_PUT_IER(uart, ier);
134#endif
135#ifdef CONFIG_KGDB_UART
136 }
137#endif
138} 113}
139 114
140/* 115/*
@@ -161,10 +136,7 @@ void kgdb_put_debug_char(int chr)
161 SSYNC(); 136 SSYNC();
162 } 137 }
163 138
164#ifndef CONFIG_BF54x 139 UART_CLEAR_DLAB(uart);
165 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
166 SSYNC();
167#endif
168 UART_PUT_CHAR(uart, (unsigned char)chr); 140 UART_PUT_CHAR(uart, (unsigned char)chr);
169 SSYNC(); 141 SSYNC();
170} 142}
@@ -183,10 +155,7 @@ int kgdb_get_debug_char(void)
183 while(!(UART_GET_LSR(uart) & DR)) { 155 while(!(UART_GET_LSR(uart) & DR)) {
184 SSYNC(); 156 SSYNC();
185 } 157 }
186#ifndef CONFIG_BF54x 158 UART_CLEAR_DLAB(uart);
187 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 SSYNC();
189#endif
190 chr = UART_GET_CHAR(uart); 159 chr = UART_GET_CHAR(uart);
191 SSYNC(); 160 SSYNC();
192 161
@@ -208,9 +177,6 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
208 struct tty_struct *tty = uart->port.info->tty; 177 struct tty_struct *tty = uart->port.info->tty;
209 unsigned int status, ch, flg; 178 unsigned int status, ch, flg;
210 static struct timeval anomaly_start = { .tv_sec = 0 }; 179 static struct timeval anomaly_start = { .tv_sec = 0 };
211#ifdef CONFIG_KGDB_UART
212 struct pt_regs *regs = get_irq_regs();
213#endif
214 180
215 status = UART_GET_LSR(uart); 181 status = UART_GET_LSR(uart);
216 UART_CLEAR_LSR(uart); 182 UART_CLEAR_LSR(uart);
@@ -220,6 +186,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
220 186
221#ifdef CONFIG_KGDB_UART 187#ifdef CONFIG_KGDB_UART
222 if (uart->port.line == CONFIG_KGDB_UART_PORT) { 188 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189 struct pt_regs *regs = get_irq_regs();
223 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */ 190 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
224 kgdb_breakkey_pressed(regs); 191 kgdb_breakkey_pressed(regs);
225 return; 192 return;
@@ -391,7 +358,6 @@ static void bfin_serial_do_work(struct work_struct *work)
391static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) 358static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
392{ 359{
393 struct circ_buf *xmit = &uart->port.info->xmit; 360 struct circ_buf *xmit = &uart->port.info->xmit;
394 unsigned short ier;
395 361
396 uart->tx_done = 0; 362 uart->tx_done = 0;
397 363
@@ -429,13 +395,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
429 set_dma_x_modify(uart->tx_dma_channel, 1); 395 set_dma_x_modify(uart->tx_dma_channel, 1);
430 enable_dma(uart->tx_dma_channel); 396 enable_dma(uart->tx_dma_channel);
431 397
432#ifdef CONFIG_BF54x
433 UART_SET_IER(uart, ETBEI); 398 UART_SET_IER(uart, ETBEI);
434#else
435 ier = UART_GET_IER(uart);
436 ier |= ETBEI;
437 UART_PUT_IER(uart, ier);
438#endif
439} 399}
440 400
441static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) 401static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
@@ -513,19 +473,12 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
513{ 473{
514 struct bfin_serial_port *uart = dev_id; 474 struct bfin_serial_port *uart = dev_id;
515 struct circ_buf *xmit = &uart->port.info->xmit; 475 struct circ_buf *xmit = &uart->port.info->xmit;
516 unsigned short ier;
517 476
518 spin_lock(&uart->port.lock); 477 spin_lock(&uart->port.lock);
519 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { 478 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
520 disable_dma(uart->tx_dma_channel); 479 disable_dma(uart->tx_dma_channel);
521 clear_dma_irqstat(uart->tx_dma_channel); 480 clear_dma_irqstat(uart->tx_dma_channel);
522#ifdef CONFIG_BF54x
523 UART_CLEAR_IER(uart, ETBEI); 481 UART_CLEAR_IER(uart, ETBEI);
524#else
525 ier = UART_GET_IER(uart);
526 ier &= ~ETBEI;
527 UART_PUT_IER(uart, ier);
528#endif
529 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); 482 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
530 uart->port.icount.tx += uart->tx_count; 483 uart->port.icount.tx += uart->tx_count;
531 484
@@ -701,7 +654,6 @@ static int bfin_serial_startup(struct uart_port *port)
701# endif 654# endif
702 } 655 }
703 656
704
705 if (request_irq 657 if (request_irq
706 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED, 658 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
707 "BFIN_UART_TX", uart)) { 659 "BFIN_UART_TX", uart)) {
@@ -710,11 +662,7 @@ static int bfin_serial_startup(struct uart_port *port)
710 return -EBUSY; 662 return -EBUSY;
711 } 663 }
712#endif 664#endif
713#ifdef CONFIG_BF54x
714 UART_SET_IER(uart, ERBFI); 665 UART_SET_IER(uart, ERBFI);
715#else
716 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
717#endif
718 return 0; 666 return 0;
719} 667}
720 668
@@ -810,26 +758,15 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
810 UART_PUT_IER(uart, 0); 758 UART_PUT_IER(uart, 0);
811#endif 759#endif
812 760
813#ifndef CONFIG_BF54x
814 /* Set DLAB in LCR to Access DLL and DLH */ 761 /* Set DLAB in LCR to Access DLL and DLH */
815 val = UART_GET_LCR(uart); 762 UART_SET_DLAB(uart);
816 val |= DLAB;
817 UART_PUT_LCR(uart, val);
818 SSYNC();
819#endif
820 763
821 UART_PUT_DLL(uart, quot & 0xFF); 764 UART_PUT_DLL(uart, quot & 0xFF);
822 SSYNC();
823 UART_PUT_DLH(uart, (quot >> 8) & 0xFF); 765 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
824 SSYNC(); 766 SSYNC();
825 767
826#ifndef CONFIG_BF54x
827 /* Clear DLAB in LCR to Access THR RBR IER */ 768 /* Clear DLAB in LCR to Access THR RBR IER */
828 val = UART_GET_LCR(uart); 769 UART_CLEAR_DLAB(uart);
829 val &= ~DLAB;
830 UART_PUT_LCR(uart, val);
831 SSYNC();
832#endif
833 770
834 UART_PUT_LCR(uart, lcr); 771 UART_PUT_LCR(uart, lcr);
835 772
@@ -992,8 +929,7 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
992 status = UART_GET_IER(uart) & (ERBFI | ETBEI); 929 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
993 if (status == (ERBFI | ETBEI)) { 930 if (status == (ERBFI | ETBEI)) {
994 /* ok, the port was enabled */ 931 /* ok, the port was enabled */
995 unsigned short lcr, val; 932 u16 lcr, dlh, dll;
996 unsigned short dlh, dll;
997 933
998 lcr = UART_GET_LCR(uart); 934 lcr = UART_GET_LCR(uart);
999 935
@@ -1010,22 +946,14 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1010 case 2: *bits = 7; break; 946 case 2: *bits = 7; break;
1011 case 3: *bits = 8; break; 947 case 3: *bits = 8; break;
1012 } 948 }
1013#ifndef CONFIG_BF54x
1014 /* Set DLAB in LCR to Access DLL and DLH */ 949 /* Set DLAB in LCR to Access DLL and DLH */
1015 val = UART_GET_LCR(uart); 950 UART_SET_DLAB(uart);
1016 val |= DLAB;
1017 UART_PUT_LCR(uart, val);
1018#endif
1019 951
1020 dll = UART_GET_DLL(uart); 952 dll = UART_GET_DLL(uart);
1021 dlh = UART_GET_DLH(uart); 953 dlh = UART_GET_DLH(uart);
1022 954
1023#ifndef CONFIG_BF54x
1024 /* Clear DLAB in LCR to Access THR RBR IER */ 955 /* Clear DLAB in LCR to Access THR RBR IER */
1025 val = UART_GET_LCR(uart); 956 UART_CLEAR_DLAB(uart);
1026 val &= ~DLAB;
1027 UART_PUT_LCR(uart, val);
1028#endif
1029 957
1030 *baud = get_sclk() / (16*(dll | dlh << 8)); 958 *baud = get_sclk() / (16*(dll | dlh << 8));
1031 } 959 }
@@ -1290,11 +1218,7 @@ static int __init bfin_serial_init(void)
1290 request_irq(uart->port.irq, bfin_serial_rx_int, 1218 request_irq(uart->port.irq, bfin_serial_rx_int,
1291 IRQF_DISABLED, "BFIN_UART_RX", uart); 1219 IRQF_DISABLED, "BFIN_UART_RX", uart);
1292 pr_info("Request irq for kgdb uart port\n"); 1220 pr_info("Request irq for kgdb uart port\n");
1293#ifdef CONFIG_BF54x
1294 UART_SET_IER(uart, ERBFI); 1221 UART_SET_IER(uart, ERBFI);
1295#else
1296 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1297#endif
1298 SSYNC(); 1222 SSYNC();
1299 t.c_cflag = CS8|B57600; 1223 t.c_cflag = CS8|B57600;
1300 t.c_iflag = 0; 1224 t.c_iflag = 0;
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 969106187718..8fdafc27fce8 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -42,14 +42,12 @@
42#include <linux/console.h> 42#include <linux/console.h>
43#include <linux/platform_device.h> 43#include <linux/platform_device.h>
44#include <linux/serial_sci.h> 44#include <linux/serial_sci.h>
45
46#ifdef CONFIG_CPU_FREQ
47#include <linux/notifier.h> 45#include <linux/notifier.h>
48#include <linux/cpufreq.h> 46#include <linux/cpufreq.h>
49#endif 47#include <linux/clk.h>
50
51#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
52#include <linux/ctype.h> 48#include <linux/ctype.h>
49
50#ifdef CONFIG_SUPERH
53#include <asm/clock.h> 51#include <asm/clock.h>
54#include <asm/sh_bios.h> 52#include <asm/sh_bios.h>
55#include <asm/kgdb.h> 53#include <asm/kgdb.h>
@@ -80,7 +78,7 @@ struct sci_port {
80 struct timer_list break_timer; 78 struct timer_list break_timer;
81 int break_flag; 79 int break_flag;
82 80
83#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 81#ifdef CONFIG_SUPERH
84 /* Port clock */ 82 /* Port clock */
85 struct clk *clk; 83 struct clk *clk;
86#endif 84#endif
@@ -365,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
365static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 363static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
366{ 364{
367 unsigned int fcr_val = 0; 365 unsigned int fcr_val = 0;
366 unsigned short data;
368 367
369 if (cflag & CRTSCTS) { 368 if (port->mapbase == 0xffe00000) {
370 fcr_val |= SCFCR_MCE; 369 data = ctrl_inw(PSCR);
371 370 data &= ~0x03cf;
372 ctrl_outw(0x0000, PORT_PSCR); 371 if (cflag & CRTSCTS)
373 } else { 372 fcr_val |= SCFCR_MCE;
374 unsigned short data; 373 else
375 374 data |= 0x0340;
376 data = ctrl_inw(PORT_PSCR);
377 data &= 0x033f;
378 data |= 0x0400;
379 ctrl_outw(data, PORT_PSCR);
380 375
381 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); 376 ctrl_outw(data, PSCR);
382 } 377 }
378 /* SCIF1 and SCIF2 should be setup by board code */
383 379
384 sci_out(port, SCFCR, fcr_val); 380 sci_out(port, SCFCR, fcr_val);
385} 381}
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index fa8700a968fc..eb84833233fd 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -76,12 +76,13 @@
76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ 76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
77# define SCIF_ONLY 77# define SCIF_ONLY
78#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 78#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
79# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 79# define PADR 0xA4050120
80# define SCSPTR0 SCPDR0 80# define PSDR 0xA405013e
81# define PWDR 0xA4050166
82# define PSCR 0xA405011E
81# define SCIF_ORER 0x0001 /* overrun error bit */ 83# define SCIF_ORER 0x0001 /* overrun error bit */
82# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 84# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
83# define SCIF_ONLY 85# define SCIF_ONLY
84# define PORT_PSCR 0xA405011E
85#elif defined(CONFIG_CPU_SUBTYPE_SH7366) 86#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
86# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 87# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
87# define SCSPTR0 SCPDR0 88# define SCSPTR0 SCPDR0
@@ -320,7 +321,7 @@
320 unsigned int addr = port->mapbase + (offset); \ 321 unsigned int addr = port->mapbase + (offset); \
321 if ((size) == 8) { \ 322 if ((size) == 8) { \
322 ctrl_outb(value, addr); \ 323 ctrl_outb(value, addr); \
323 } else { \ 324 } else if ((size) == 16) { \
324 ctrl_outw(value, addr); \ 325 ctrl_outw(value, addr); \
325 } 326 }
326 327
@@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
451SCIF_FNS(SCLSR, 0, 0, 0x28, 16) 452SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
452#else 453#else
453SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 454SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
455#if defined(CONFIG_CPU_SUBTYPE_SH7722)
456SCIF_FNS(SCSPTR, 0, 0, 0, 0)
457#else
454SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) 458SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
459#endif
455SCIF_FNS(SCLSR, 0, 0, 0x24, 16) 460SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
456#endif 461#endif
457#endif 462#endif
@@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port)
593 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 598 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
594 return 1; 599 return 1;
595} 600}
596#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) 601#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
597static inline int sci_rxd_in(struct uart_port *port) 602static inline int sci_rxd_in(struct uart_port *port)
598{ 603{
599 if (port->mapbase == 0xffe00000) 604 if (port->mapbase == 0xffe00000)
600 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ 605 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
601 return 1; 606 return 1;
602} 607}
608#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
609static inline int sci_rxd_in(struct uart_port *port)
610{
611 if (port->mapbase == 0xffe00000)
612 return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
613 if (port->mapbase == 0xffe10000)
614 return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
615 if (port->mapbase == 0xffe20000)
616 return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
617
618 return 1;
619}
603#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 620#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
604static inline int sci_rxd_in(struct uart_port *port) 621static inline int sci_rxd_in(struct uart_port *port)
605{ 622{
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 3ab6e3d973a1..48aea39c35a5 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1301,8 +1301,8 @@ static void pxafb_decode_mode_info(struct pxafb_info *fbi,
1301 } 1301 }
1302} 1302}
1303 1303
1304static int pxafb_decode_mach_info(struct pxafb_info *fbi, 1304static void pxafb_decode_mach_info(struct pxafb_info *fbi,
1305 struct pxafb_mach_info *inf) 1305 struct pxafb_mach_info *inf)
1306{ 1306{
1307 unsigned int lcd_conn = inf->lcd_conn; 1307 unsigned int lcd_conn = inf->lcd_conn;
1308 1308
@@ -1333,7 +1333,7 @@ static int pxafb_decode_mach_info(struct pxafb_info *fbi,
1333 fbi->lccr0 = inf->lccr0; 1333 fbi->lccr0 = inf->lccr0;
1334 fbi->lccr3 = inf->lccr3; 1334 fbi->lccr3 = inf->lccr3;
1335 fbi->lccr4 = inf->lccr4; 1335 fbi->lccr4 = inf->lccr4;
1336 return -EINVAL; 1336 goto decode_mode;
1337 } 1337 }
1338 1338
1339 if (lcd_conn == LCD_MONO_STN_8BPP) 1339 if (lcd_conn == LCD_MONO_STN_8BPP)
@@ -1343,8 +1343,8 @@ static int pxafb_decode_mach_info(struct pxafb_info *fbi,
1343 fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0; 1343 fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
1344 fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0; 1344 fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0;
1345 1345
1346decode_mode:
1346 pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes); 1347 pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes);
1347 return 0;
1348} 1348}
1349 1349
1350static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) 1350static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES
index 05c9da6181c3..8355e918fddf 100644
--- a/fs/cifs/CHANGES
+++ b/fs/cifs/CHANGES
@@ -1,3 +1,6 @@
1Version 1.53
2------------
3
1Version 1.52 4Version 1.52
2------------ 5------------
3Fix oops on second mount to server when null auth is used. 6Fix oops on second mount to server when null auth is used.
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index bcda2c6b6a04..cb52cbbe45ff 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -460,8 +460,8 @@ decode_negTokenInit(unsigned char *security_blob, int length,
460 unsigned char *sequence_end; 460 unsigned char *sequence_end;
461 unsigned long *oid = NULL; 461 unsigned long *oid = NULL;
462 unsigned int cls, con, tag, oidlen, rc; 462 unsigned int cls, con, tag, oidlen, rc;
463 int use_ntlmssp = FALSE; 463 bool use_ntlmssp = false;
464 int use_kerberos = FALSE; 464 bool use_kerberos = false;
465 465
466 *secType = NTLM; /* BB eventually make Kerberos or NLTMSSP the default*/ 466 *secType = NTLM; /* BB eventually make Kerberos or NLTMSSP the default*/
467 467
@@ -561,15 +561,15 @@ decode_negTokenInit(unsigned char *security_blob, int length,
561 if (compare_oid(oid, oidlen, 561 if (compare_oid(oid, oidlen,
562 MSKRB5_OID, 562 MSKRB5_OID,
563 MSKRB5_OID_LEN)) 563 MSKRB5_OID_LEN))
564 use_kerberos = TRUE; 564 use_kerberos = true;
565 else if (compare_oid(oid, oidlen, 565 else if (compare_oid(oid, oidlen,
566 KRB5_OID, 566 KRB5_OID,
567 KRB5_OID_LEN)) 567 KRB5_OID_LEN))
568 use_kerberos = TRUE; 568 use_kerberos = true;
569 else if (compare_oid(oid, oidlen, 569 else if (compare_oid(oid, oidlen,
570 NTLMSSP_OID, 570 NTLMSSP_OID,
571 NTLMSSP_OID_LEN)) 571 NTLMSSP_OID_LEN))
572 use_ntlmssp = TRUE; 572 use_ntlmssp = true;
573 573
574 kfree(oid); 574 kfree(oid);
575 } 575 }
diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c
index 95024c066d89..f6fdecf6598c 100644
--- a/fs/cifs/cifs_dfs_ref.c
+++ b/fs/cifs/cifs_dfs_ref.c
@@ -93,15 +93,11 @@ static char *cifs_get_share_name(const char *node_name)
93 /* find sharename end */ 93 /* find sharename end */
94 pSep++; 94 pSep++;
95 pSep = memchr(UNC+(pSep-UNC), '\\', len-(pSep-UNC)); 95 pSep = memchr(UNC+(pSep-UNC), '\\', len-(pSep-UNC));
96 if (!pSep) { 96 if (pSep) {
97 cERROR(1, ("%s:2 cant find share name in node name: %s", 97 /* trim path up to sharename end
98 __func__, node_name)); 98 * now we have share name in UNC */
99 kfree(UNC); 99 *pSep = 0;
100 return NULL;
101 } 100 }
102 /* trim path up to sharename end
103 * * now we have share name in UNC */
104 *pSep = 0;
105 101
106 return UNC; 102 return UNC;
107} 103}
@@ -188,7 +184,7 @@ static char *compose_mount_options(const char *sb_mountdata,
188 tkn_e = strchr(tkn_e+1, '\\'); 184 tkn_e = strchr(tkn_e+1, '\\');
189 if (tkn_e) { 185 if (tkn_e) {
190 strcat(mountdata, ",prefixpath="); 186 strcat(mountdata, ",prefixpath=");
191 strcat(mountdata, tkn_e); 187 strcat(mountdata, tkn_e+1);
192 } 188 }
193 } 189 }
194 190
@@ -244,7 +240,8 @@ static char *build_full_dfs_path_from_dentry(struct dentry *dentry)
244 return NULL; 240 return NULL;
245 241
246 if (cifs_sb->tcon->Flags & SMB_SHARE_IS_IN_DFS) { 242 if (cifs_sb->tcon->Flags & SMB_SHARE_IS_IN_DFS) {
247 /* we should use full path name to correct working with DFS */ 243 int i;
244 /* we should use full path name for correct working with DFS */
248 l_max_len = strnlen(cifs_sb->tcon->treeName, MAX_TREE_SIZE+1) + 245 l_max_len = strnlen(cifs_sb->tcon->treeName, MAX_TREE_SIZE+1) +
249 strnlen(search_path, MAX_PATHCONF) + 1; 246 strnlen(search_path, MAX_PATHCONF) + 1;
250 tmp_path = kmalloc(l_max_len, GFP_KERNEL); 247 tmp_path = kmalloc(l_max_len, GFP_KERNEL);
@@ -253,8 +250,14 @@ static char *build_full_dfs_path_from_dentry(struct dentry *dentry)
253 return NULL; 250 return NULL;
254 } 251 }
255 strncpy(tmp_path, cifs_sb->tcon->treeName, l_max_len); 252 strncpy(tmp_path, cifs_sb->tcon->treeName, l_max_len);
256 strcat(tmp_path, search_path);
257 tmp_path[l_max_len-1] = 0; 253 tmp_path[l_max_len-1] = 0;
254 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS)
255 for (i = 0; i < l_max_len; i++) {
256 if (tmp_path[i] == '\\')
257 tmp_path[i] = '/';
258 }
259 strncat(tmp_path, search_path, l_max_len - strlen(tmp_path));
260
258 full_path = tmp_path; 261 full_path = tmp_path;
259 kfree(search_path); 262 kfree(search_path);
260 } else { 263 } else {
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index e99d4faf5f02..34902cff5400 100644
--- a/fs/cifs/cifsacl.c
+++ b/fs/cifs/cifsacl.c
@@ -559,7 +559,7 @@ static struct cifs_ntsd *get_cifs_acl(u32 *pacllen, struct inode *inode,
559 const char *path, const __u16 *pfid) 559 const char *path, const __u16 *pfid)
560{ 560{
561 struct cifsFileInfo *open_file = NULL; 561 struct cifsFileInfo *open_file = NULL;
562 int unlock_file = FALSE; 562 bool unlock_file = false;
563 int xid; 563 int xid;
564 int rc = -EIO; 564 int rc = -EIO;
565 __u16 fid; 565 __u16 fid;
@@ -586,10 +586,10 @@ static struct cifs_ntsd *get_cifs_acl(u32 *pacllen, struct inode *inode,
586 cifs_sb = CIFS_SB(sb); 586 cifs_sb = CIFS_SB(sb);
587 587
588 if (open_file) { 588 if (open_file) {
589 unlock_file = TRUE; 589 unlock_file = true;
590 fid = open_file->netfid; 590 fid = open_file->netfid;
591 } else if (pfid == NULL) { 591 } else if (pfid == NULL) {
592 int oplock = FALSE; 592 int oplock = 0;
593 /* open file */ 593 /* open file */
594 rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN, 594 rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN,
595 READ_CONTROL, 0, &fid, &oplock, NULL, 595 READ_CONTROL, 0, &fid, &oplock, NULL,
@@ -604,7 +604,7 @@ static struct cifs_ntsd *get_cifs_acl(u32 *pacllen, struct inode *inode,
604 604
605 rc = CIFSSMBGetCIFSACL(xid, cifs_sb->tcon, fid, &pntsd, pacllen); 605 rc = CIFSSMBGetCIFSACL(xid, cifs_sb->tcon, fid, &pntsd, pacllen);
606 cFYI(1, ("GetCIFSACL rc = %d ACL len %d", rc, *pacllen)); 606 cFYI(1, ("GetCIFSACL rc = %d ACL len %d", rc, *pacllen));
607 if (unlock_file == TRUE) /* find_readable_file increments ref count */ 607 if (unlock_file == true) /* find_readable_file increments ref count */
608 atomic_dec(&open_file->wrtPending); 608 atomic_dec(&open_file->wrtPending);
609 else if (pfid == NULL) /* if opened above we have to close the handle */ 609 else if (pfid == NULL) /* if opened above we have to close the handle */
610 CIFSSMBClose(xid, cifs_sb->tcon, fid); 610 CIFSSMBClose(xid, cifs_sb->tcon, fid);
@@ -619,7 +619,7 @@ static int set_cifs_acl(struct cifs_ntsd *pnntsd, __u32 acllen,
619 struct inode *inode, const char *path) 619 struct inode *inode, const char *path)
620{ 620{
621 struct cifsFileInfo *open_file; 621 struct cifsFileInfo *open_file;
622 int unlock_file = FALSE; 622 bool unlock_file = false;
623 int xid; 623 int xid;
624 int rc = -EIO; 624 int rc = -EIO;
625 __u16 fid; 625 __u16 fid;
@@ -640,10 +640,10 @@ static int set_cifs_acl(struct cifs_ntsd *pnntsd, __u32 acllen,
640 640
641 open_file = find_readable_file(CIFS_I(inode)); 641 open_file = find_readable_file(CIFS_I(inode));
642 if (open_file) { 642 if (open_file) {
643 unlock_file = TRUE; 643 unlock_file = true;
644 fid = open_file->netfid; 644 fid = open_file->netfid;
645 } else { 645 } else {
646 int oplock = FALSE; 646 int oplock = 0;
647 /* open file */ 647 /* open file */
648 rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN, 648 rc = CIFSSMBOpen(xid, cifs_sb->tcon, path, FILE_OPEN,
649 WRITE_DAC, 0, &fid, &oplock, NULL, 649 WRITE_DAC, 0, &fid, &oplock, NULL,
@@ -658,7 +658,7 @@ static int set_cifs_acl(struct cifs_ntsd *pnntsd, __u32 acllen,
658 658
659 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen); 659 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen);
660 cFYI(DBG2, ("SetCIFSACL rc = %d", rc)); 660 cFYI(DBG2, ("SetCIFSACL rc = %d", rc));
661 if (unlock_file == TRUE) 661 if (unlock_file)
662 atomic_dec(&open_file->wrtPending); 662 atomic_dec(&open_file->wrtPending);
663 else 663 else
664 CIFSSMBClose(xid, cifs_sb->tcon, fid); 664 CIFSSMBClose(xid, cifs_sb->tcon, fid);
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 39c2cbdface7..427a7c695896 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -222,50 +222,50 @@ static int
222cifs_statfs(struct dentry *dentry, struct kstatfs *buf) 222cifs_statfs(struct dentry *dentry, struct kstatfs *buf)
223{ 223{
224 struct super_block *sb = dentry->d_sb; 224 struct super_block *sb = dentry->d_sb;
225 int xid; 225 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
226 struct cifsTconInfo *tcon = cifs_sb->tcon;
226 int rc = -EOPNOTSUPP; 227 int rc = -EOPNOTSUPP;
227 struct cifs_sb_info *cifs_sb; 228 int xid;
228 struct cifsTconInfo *pTcon;
229 229
230 xid = GetXid(); 230 xid = GetXid();
231 231
232 cifs_sb = CIFS_SB(sb);
233 pTcon = cifs_sb->tcon;
234
235 buf->f_type = CIFS_MAGIC_NUMBER; 232 buf->f_type = CIFS_MAGIC_NUMBER;
236 233
237 /* instead could get the real value via SMB_QUERY_FS_ATTRIBUTE_INFO */ 234 /*
238 buf->f_namelen = PATH_MAX; /* PATH_MAX may be too long - it would 235 * PATH_MAX may be too long - it would presumably be total path,
239 presumably be total path, but note 236 * but note that some servers (includinng Samba 3) have a shorter
240 that some servers (includinng Samba 3) 237 * maximum path.
241 have a shorter maximum path */ 238 *
239 * Instead could get the real value via SMB_QUERY_FS_ATTRIBUTE_INFO.
240 */
241 buf->f_namelen = PATH_MAX;
242 buf->f_files = 0; /* undefined */ 242 buf->f_files = 0; /* undefined */
243 buf->f_ffree = 0; /* unlimited */ 243 buf->f_ffree = 0; /* unlimited */
244 244
245/* BB we could add a second check for a QFS Unix capability bit */ 245 /*
246/* BB FIXME check CIFS_POSIX_EXTENSIONS Unix cap first FIXME BB */ 246 * We could add a second check for a QFS Unix capability bit
247 if ((pTcon->ses->capabilities & CAP_UNIX) && (CIFS_POSIX_EXTENSIONS & 247 */
248 le64_to_cpu(pTcon->fsUnixInfo.Capability))) 248 if ((tcon->ses->capabilities & CAP_UNIX) &&
249 rc = CIFSSMBQFSPosixInfo(xid, pTcon, buf); 249 (CIFS_POSIX_EXTENSIONS & le64_to_cpu(tcon->fsUnixInfo.Capability)))
250 250 rc = CIFSSMBQFSPosixInfo(xid, tcon, buf);
251 /* Only need to call the old QFSInfo if failed 251
252 on newer one */ 252 /*
253 if (rc) 253 * Only need to call the old QFSInfo if failed on newer one,
254 if (pTcon->ses->capabilities & CAP_NT_SMBS) 254 * e.g. by OS/2.
255 rc = CIFSSMBQFSInfo(xid, pTcon, buf); /* not supported by OS2 */ 255 **/
256 256 if (rc && (tcon->ses->capabilities & CAP_NT_SMBS))
257 /* Some old Windows servers also do not support level 103, retry with 257 rc = CIFSSMBQFSInfo(xid, tcon, buf);
258 older level one if old server failed the previous call or we 258
259 bypassed it because we detected that this was an older LANMAN sess */ 259 /*
260 * Some old Windows servers also do not support level 103, retry with
261 * older level one if old server failed the previous call or we
262 * bypassed it because we detected that this was an older LANMAN sess
263 */
260 if (rc) 264 if (rc)
261 rc = SMBOldQFSInfo(xid, pTcon, buf); 265 rc = SMBOldQFSInfo(xid, tcon, buf);
262 /* int f_type; 266
263 __fsid_t f_fsid;
264 int f_namelen; */
265 /* BB get from info in tcon struct at mount time call to QFSAttrInfo */
266 FreeXid(xid); 267 FreeXid(xid);
267 return 0; /* always return success? what if volume is no 268 return 0;
268 longer available? */
269} 269}
270 270
271static int cifs_permission(struct inode *inode, int mask, struct nameidata *nd) 271static int cifs_permission(struct inode *inode, int mask, struct nameidata *nd)
@@ -306,8 +306,8 @@ cifs_alloc_inode(struct super_block *sb)
306 /* Until the file is open and we have gotten oplock 306 /* Until the file is open and we have gotten oplock
307 info back from the server, can not assume caching of 307 info back from the server, can not assume caching of
308 file data or metadata */ 308 file data or metadata */
309 cifs_inode->clientCanCacheRead = FALSE; 309 cifs_inode->clientCanCacheRead = false;
310 cifs_inode->clientCanCacheAll = FALSE; 310 cifs_inode->clientCanCacheAll = false;
311 cifs_inode->vfs_inode.i_blkbits = 14; /* 2**14 = CIFS_MAX_MSGSIZE */ 311 cifs_inode->vfs_inode.i_blkbits = 14; /* 2**14 = CIFS_MAX_MSGSIZE */
312 312
313 /* Can not set i_flags here - they get immediately overwritten 313 /* Can not set i_flags here - they get immediately overwritten
@@ -940,7 +940,7 @@ static int cifs_oplock_thread(void *dummyarg)
940 rc = CIFSSMBLock(0, pTcon, netfid, 940 rc = CIFSSMBLock(0, pTcon, netfid,
941 0 /* len */ , 0 /* offset */, 0, 941 0 /* len */ , 0 /* offset */, 0,
942 0, LOCKING_ANDX_OPLOCK_RELEASE, 942 0, LOCKING_ANDX_OPLOCK_RELEASE,
943 0 /* wait flag */); 943 false /* wait flag */);
944 cFYI(1, ("Oplock release rc = %d", rc)); 944 cFYI(1, ("Oplock release rc = %d", rc));
945 } 945 }
946 } else 946 } else
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h
index e1dd9f32e1d7..cd1301a09b3b 100644
--- a/fs/cifs/cifsfs.h
+++ b/fs/cifs/cifsfs.h
@@ -24,14 +24,6 @@
24 24
25#define ROOT_I 2 25#define ROOT_I 2
26 26
27#ifndef FALSE
28#define FALSE 0
29#endif
30
31#ifndef TRUE
32#define TRUE 1
33#endif
34
35extern struct file_system_type cifs_fs_type; 27extern struct file_system_type cifs_fs_type;
36extern const struct address_space_operations cifs_addr_ops; 28extern const struct address_space_operations cifs_addr_ops;
37extern const struct address_space_operations cifs_addr_ops_smallbuf; 29extern const struct address_space_operations cifs_addr_ops_smallbuf;
@@ -110,5 +102,5 @@ extern int cifs_ioctl(struct inode *inode, struct file *filep,
110extern const struct export_operations cifs_export_ops; 102extern const struct export_operations cifs_export_ops;
111#endif /* EXPERIMENTAL */ 103#endif /* EXPERIMENTAL */
112 104
113#define CIFS_VERSION "1.52" 105#define CIFS_VERSION "1.53"
114#endif /* _CIFSFS_H */ 106#endif /* _CIFSFS_H */
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index 69a2e1942542..b7d9f698e63e 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -57,14 +57,6 @@
57 57
58#include "cifspdu.h" 58#include "cifspdu.h"
59 59
60#ifndef FALSE
61#define FALSE 0
62#endif
63
64#ifndef TRUE
65#define TRUE 1
66#endif
67
68#ifndef XATTR_DOS_ATTRIB 60#ifndef XATTR_DOS_ATTRIB
69#define XATTR_DOS_ATTRIB "user.DOSATTRIB" 61#define XATTR_DOS_ATTRIB "user.DOSATTRIB"
70#endif 62#endif
@@ -147,7 +139,7 @@ struct TCP_Server_Info {
147 enum protocolEnum protocolType; 139 enum protocolEnum protocolType;
148 char versionMajor; 140 char versionMajor;
149 char versionMinor; 141 char versionMinor;
150 unsigned svlocal:1; /* local server or remote */ 142 bool svlocal:1; /* local server or remote */
151 atomic_t socketUseCount; /* number of open cifs sessions on socket */ 143 atomic_t socketUseCount; /* number of open cifs sessions on socket */
152 atomic_t inFlight; /* number of requests on the wire to server */ 144 atomic_t inFlight; /* number of requests on the wire to server */
153#ifdef CONFIG_CIFS_STATS2 145#ifdef CONFIG_CIFS_STATS2
@@ -286,10 +278,10 @@ struct cifsTconInfo {
286 FILE_SYSTEM_DEVICE_INFO fsDevInfo; 278 FILE_SYSTEM_DEVICE_INFO fsDevInfo;
287 FILE_SYSTEM_ATTRIBUTE_INFO fsAttrInfo; /* ok if fs name truncated */ 279 FILE_SYSTEM_ATTRIBUTE_INFO fsAttrInfo; /* ok if fs name truncated */
288 FILE_SYSTEM_UNIX_INFO fsUnixInfo; 280 FILE_SYSTEM_UNIX_INFO fsUnixInfo;
289 unsigned ipc:1; /* set if connection to IPC$ eg for RPC/PIPES */ 281 bool ipc:1; /* set if connection to IPC$ eg for RPC/PIPES */
290 unsigned retry:1; 282 bool retry:1;
291 unsigned nocase:1; 283 bool nocase:1;
292 unsigned unix_ext:1; /* if off disable Linux extensions to CIFS protocol 284 bool unix_ext:1; /* if false disable Linux extensions to CIFS protocol
293 for this mount even if server would support */ 285 for this mount even if server would support */
294 /* BB add field for back pointer to sb struct(s)? */ 286 /* BB add field for back pointer to sb struct(s)? */
295}; 287};
@@ -317,10 +309,10 @@ struct cifs_search_info {
317 char *srch_entries_start; 309 char *srch_entries_start;
318 char *presume_name; 310 char *presume_name;
319 unsigned int resume_name_len; 311 unsigned int resume_name_len;
320 unsigned endOfSearch:1; 312 bool endOfSearch:1;
321 unsigned emptyDir:1; 313 bool emptyDir:1;
322 unsigned unicode:1; 314 bool unicode:1;
323 unsigned smallBuf:1; /* so we know which buf_release function to call */ 315 bool smallBuf:1; /* so we know which buf_release function to call */
324}; 316};
325 317
326struct cifsFileInfo { 318struct cifsFileInfo {
@@ -335,9 +327,9 @@ struct cifsFileInfo {
335 struct inode *pInode; /* needed for oplock break */ 327 struct inode *pInode; /* needed for oplock break */
336 struct mutex lock_mutex; 328 struct mutex lock_mutex;
337 struct list_head llist; /* list of byte range locks we have. */ 329 struct list_head llist; /* list of byte range locks we have. */
338 unsigned closePend:1; /* file is marked to close */ 330 bool closePend:1; /* file is marked to close */
339 unsigned invalidHandle:1; /* file closed via session abend */ 331 bool invalidHandle:1; /* file closed via session abend */
340 unsigned messageMode:1; /* for pipes: message vs byte mode */ 332 bool messageMode:1; /* for pipes: message vs byte mode */
341 atomic_t wrtPending; /* handle in use - defer close */ 333 atomic_t wrtPending; /* handle in use - defer close */
342 struct semaphore fh_sem; /* prevents reopen race after dead ses*/ 334 struct semaphore fh_sem; /* prevents reopen race after dead ses*/
343 char *search_resume_name; /* BB removeme BB */ 335 char *search_resume_name; /* BB removeme BB */
@@ -356,9 +348,9 @@ struct cifsInodeInfo {
356 __u32 cifsAttrs; /* e.g. DOS archive bit, sparse, compressed, system */ 348 __u32 cifsAttrs; /* e.g. DOS archive bit, sparse, compressed, system */
357 atomic_t inUse; /* num concurrent users (local openers cifs) of file*/ 349 atomic_t inUse; /* num concurrent users (local openers cifs) of file*/
358 unsigned long time; /* jiffies of last update/check of inode */ 350 unsigned long time; /* jiffies of last update/check of inode */
359 unsigned clientCanCacheRead:1; /* read oplock */ 351 bool clientCanCacheRead:1; /* read oplock */
360 unsigned clientCanCacheAll:1; /* read and writebehind oplock */ 352 bool clientCanCacheAll:1; /* read and writebehind oplock */
361 unsigned oplockPending:1; 353 bool oplockPending:1;
362 struct inode vfs_inode; 354 struct inode vfs_inode;
363}; 355};
364 356
@@ -426,9 +418,9 @@ struct mid_q_entry {
426 struct smb_hdr *resp_buf; /* response buffer */ 418 struct smb_hdr *resp_buf; /* response buffer */
427 int midState; /* wish this were enum but can not pass to wait_event */ 419 int midState; /* wish this were enum but can not pass to wait_event */
428 __u8 command; /* smb command code */ 420 __u8 command; /* smb command code */
429 unsigned largeBuf:1; /* if valid response, is pointer to large buf */ 421 bool largeBuf:1; /* if valid response, is pointer to large buf */
430 unsigned multiRsp:1; /* multiple trans2 responses for one request */ 422 bool multiRsp:1; /* multiple trans2 responses for one request */
431 unsigned multiEnd:1; /* both received */ 423 bool multiEnd:1; /* both received */
432}; 424};
433 425
434struct oplock_q_entry { 426struct oplock_q_entry {
diff --git a/fs/cifs/cifspdu.h b/fs/cifs/cifspdu.h
index 9f49c2f3582c..a0d26b540d4e 100644
--- a/fs/cifs/cifspdu.h
+++ b/fs/cifs/cifspdu.h
@@ -2050,7 +2050,7 @@ typedef struct {
2050 to 0xFFFF00 */ 2050 to 0xFFFF00 */
2051#define CIFS_UNIX_LARGE_WRITE_CAP 0x00000080 2051#define CIFS_UNIX_LARGE_WRITE_CAP 0x00000080
2052#define CIFS_UNIX_TRANSPORT_ENCRYPTION_CAP 0x00000100 /* can do SPNEGO crypt */ 2052#define CIFS_UNIX_TRANSPORT_ENCRYPTION_CAP 0x00000100 /* can do SPNEGO crypt */
2053#define CIFS_UNIX_TRANPSORT_ENCRYPTION_MANDATORY_CAP 0x00000200 /* must do */ 2053#define CIFS_UNIX_TRANSPORT_ENCRYPTION_MANDATORY_CAP 0x00000200 /* must do */
2054#define CIFS_UNIX_PROXY_CAP 0x00000400 /* Proxy cap: 0xACE ioctl and 2054#define CIFS_UNIX_PROXY_CAP 0x00000400 /* Proxy cap: 0xACE ioctl and
2055 QFS PROXY call */ 2055 QFS PROXY call */
2056#ifdef CONFIG_CIFS_POSIX 2056#ifdef CONFIG_CIFS_POSIX
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index 50f9fdae19b3..d481f6c5a2be 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -59,8 +59,9 @@ extern int SendReceiveBlockingLock(const unsigned int xid,
59 struct smb_hdr *out_buf, 59 struct smb_hdr *out_buf,
60 int *bytes_returned); 60 int *bytes_returned);
61extern int checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length); 61extern int checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length);
62extern int is_valid_oplock_break(struct smb_hdr *smb, struct TCP_Server_Info *); 62extern bool is_valid_oplock_break(struct smb_hdr *smb,
63extern int is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof); 63 struct TCP_Server_Info *);
64extern bool is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof);
64extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *); 65extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *);
65#ifdef CONFIG_CIFS_EXPERIMENTAL 66#ifdef CONFIG_CIFS_EXPERIMENTAL
66extern struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *); 67extern struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *);
@@ -69,7 +70,7 @@ extern unsigned int smbCalcSize(struct smb_hdr *ptr);
69extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr); 70extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr);
70extern int decode_negTokenInit(unsigned char *security_blob, int length, 71extern int decode_negTokenInit(unsigned char *security_blob, int length,
71 enum securityEnum *secType); 72 enum securityEnum *secType);
72extern int cifs_inet_pton(int, char *source, void *dst); 73extern int cifs_inet_pton(const int, const char *source, void *dst);
73extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr); 74extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr);
74extern void header_assemble(struct smb_hdr *, char /* command */ , 75extern void header_assemble(struct smb_hdr *, char /* command */ ,
75 const struct cifsTconInfo *, int /* length of 76 const struct cifsTconInfo *, int /* length of
@@ -187,12 +188,12 @@ extern int CIFSSMBSetAttrLegacy(int xid, struct cifsTconInfo *tcon,
187#endif /* possibly unneeded function */ 188#endif /* possibly unneeded function */
188extern int CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon, 189extern int CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon,
189 const char *fileName, __u64 size, 190 const char *fileName, __u64 size,
190 int setAllocationSizeFlag, 191 bool setAllocationSizeFlag,
191 const struct nls_table *nls_codepage, 192 const struct nls_table *nls_codepage,
192 int remap_special_chars); 193 int remap_special_chars);
193extern int CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, 194extern int CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon,
194 __u64 size, __u16 fileHandle, __u32 opener_pid, 195 __u64 size, __u16 fileHandle, __u32 opener_pid,
195 int AllocSizeFlag); 196 bool AllocSizeFlag);
196extern int CIFSSMBUnixSetPerms(const int xid, struct cifsTconInfo *pTcon, 197extern int CIFSSMBUnixSetPerms(const int xid, struct cifsTconInfo *pTcon,
197 char *full_path, __u64 mode, __u64 uid, 198 char *full_path, __u64 mode, __u64 uid,
198 __u64 gid, dev_t dev, 199 __u64 gid, dev_t dev,
@@ -291,11 +292,11 @@ extern int CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
291 const __u16 netfid, const __u64 len, 292 const __u16 netfid, const __u64 len,
292 const __u64 offset, const __u32 numUnlock, 293 const __u64 offset, const __u32 numUnlock,
293 const __u32 numLock, const __u8 lockType, 294 const __u32 numLock, const __u8 lockType,
294 const int waitFlag); 295 const bool waitFlag);
295extern int CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon, 296extern int CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
296 const __u16 smb_file_id, const int get_flag, 297 const __u16 smb_file_id, const int get_flag,
297 const __u64 len, struct file_lock *, 298 const __u64 len, struct file_lock *,
298 const __u16 lock_type, const int waitFlag); 299 const __u16 lock_type, const bool waitFlag);
299extern int CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon); 300extern int CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon);
300extern int CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses); 301extern int CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses);
301 302
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 4728fa982a4e..cfd9750852b3 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -95,7 +95,7 @@ static void mark_open_files_invalid(struct cifsTconInfo *pTcon)
95 list_for_each_safe(tmp, tmp1, &pTcon->openFileList) { 95 list_for_each_safe(tmp, tmp1, &pTcon->openFileList) {
96 open_file = list_entry(tmp, struct cifsFileInfo, tlist); 96 open_file = list_entry(tmp, struct cifsFileInfo, tlist);
97 if (open_file) 97 if (open_file)
98 open_file->invalidHandle = TRUE; 98 open_file->invalidHandle = true;
99 } 99 }
100 write_unlock(&GlobalSMBSeslock); 100 write_unlock(&GlobalSMBSeslock);
101 /* BB Add call to invalidate_inodes(sb) for all superblocks mounted 101 /* BB Add call to invalidate_inodes(sb) for all superblocks mounted
@@ -141,7 +141,7 @@ small_smb_init(int smb_command, int wct, struct cifsTconInfo *tcon,
141 if (tcon->ses->server->tcpStatus == 141 if (tcon->ses->server->tcpStatus ==
142 CifsNeedReconnect) { 142 CifsNeedReconnect) {
143 /* on "soft" mounts we wait once */ 143 /* on "soft" mounts we wait once */
144 if ((tcon->retry == FALSE) || 144 if (!tcon->retry ||
145 (tcon->ses->status == CifsExiting)) { 145 (tcon->ses->status == CifsExiting)) {
146 cFYI(1, ("gave up waiting on " 146 cFYI(1, ("gave up waiting on "
147 "reconnect in smb_init")); 147 "reconnect in smb_init"));
@@ -289,7 +289,7 @@ smb_init(int smb_command, int wct, struct cifsTconInfo *tcon,
289 if (tcon->ses->server->tcpStatus == 289 if (tcon->ses->server->tcpStatus ==
290 CifsNeedReconnect) { 290 CifsNeedReconnect) {
291 /* on "soft" mounts we wait once */ 291 /* on "soft" mounts we wait once */
292 if ((tcon->retry == FALSE) || 292 if (!tcon->retry ||
293 (tcon->ses->status == CifsExiting)) { 293 (tcon->ses->status == CifsExiting)) {
294 cFYI(1, ("gave up waiting on " 294 cFYI(1, ("gave up waiting on "
295 "reconnect in smb_init")); 295 "reconnect in smb_init"));
@@ -1686,7 +1686,7 @@ int
1686CIFSSMBLock(const int xid, struct cifsTconInfo *tcon, 1686CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1687 const __u16 smb_file_id, const __u64 len, 1687 const __u16 smb_file_id, const __u64 len,
1688 const __u64 offset, const __u32 numUnlock, 1688 const __u64 offset, const __u32 numUnlock,
1689 const __u32 numLock, const __u8 lockType, const int waitFlag) 1689 const __u32 numLock, const __u8 lockType, const bool waitFlag)
1690{ 1690{
1691 int rc = 0; 1691 int rc = 0;
1692 LOCK_REQ *pSMB = NULL; 1692 LOCK_REQ *pSMB = NULL;
@@ -1695,7 +1695,7 @@ CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1695 int timeout = 0; 1695 int timeout = 0;
1696 __u16 count; 1696 __u16 count;
1697 1697
1698 cFYI(1, ("CIFSSMBLock timeout %d numLock %d", waitFlag, numLock)); 1698 cFYI(1, ("CIFSSMBLock timeout %d numLock %d", (int)waitFlag, numLock));
1699 rc = small_smb_init(SMB_COM_LOCKING_ANDX, 8, tcon, (void **) &pSMB); 1699 rc = small_smb_init(SMB_COM_LOCKING_ANDX, 8, tcon, (void **) &pSMB);
1700 1700
1701 if (rc) 1701 if (rc)
@@ -1706,7 +1706,7 @@ CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1706 if (lockType == LOCKING_ANDX_OPLOCK_RELEASE) { 1706 if (lockType == LOCKING_ANDX_OPLOCK_RELEASE) {
1707 timeout = CIFS_ASYNC_OP; /* no response expected */ 1707 timeout = CIFS_ASYNC_OP; /* no response expected */
1708 pSMB->Timeout = 0; 1708 pSMB->Timeout = 0;
1709 } else if (waitFlag == TRUE) { 1709 } else if (waitFlag) {
1710 timeout = CIFS_BLOCKING_OP; /* blocking operation, no timeout */ 1710 timeout = CIFS_BLOCKING_OP; /* blocking operation, no timeout */
1711 pSMB->Timeout = cpu_to_le32(-1);/* blocking - do not time out */ 1711 pSMB->Timeout = cpu_to_le32(-1);/* blocking - do not time out */
1712 } else { 1712 } else {
@@ -1756,7 +1756,7 @@ int
1756CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon, 1756CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
1757 const __u16 smb_file_id, const int get_flag, const __u64 len, 1757 const __u16 smb_file_id, const int get_flag, const __u64 len,
1758 struct file_lock *pLockData, const __u16 lock_type, 1758 struct file_lock *pLockData, const __u16 lock_type,
1759 const int waitFlag) 1759 const bool waitFlag)
1760{ 1760{
1761 struct smb_com_transaction2_sfi_req *pSMB = NULL; 1761 struct smb_com_transaction2_sfi_req *pSMB = NULL;
1762 struct smb_com_transaction2_sfi_rsp *pSMBr = NULL; 1762 struct smb_com_transaction2_sfi_rsp *pSMBr = NULL;
@@ -3581,9 +3581,9 @@ findFirstRetry:
3581 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3581 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3582 if (rc == 0) { 3582 if (rc == 0) {
3583 if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE) 3583 if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE)
3584 psrch_inf->unicode = TRUE; 3584 psrch_inf->unicode = true;
3585 else 3585 else
3586 psrch_inf->unicode = FALSE; 3586 psrch_inf->unicode = false;
3587 3587
3588 psrch_inf->ntwrk_buf_start = (char *)pSMBr; 3588 psrch_inf->ntwrk_buf_start = (char *)pSMBr;
3589 psrch_inf->smallBuf = 0; 3589 psrch_inf->smallBuf = 0;
@@ -3594,9 +3594,9 @@ findFirstRetry:
3594 le16_to_cpu(pSMBr->t2.ParameterOffset)); 3594 le16_to_cpu(pSMBr->t2.ParameterOffset));
3595 3595
3596 if (parms->EndofSearch) 3596 if (parms->EndofSearch)
3597 psrch_inf->endOfSearch = TRUE; 3597 psrch_inf->endOfSearch = true;
3598 else 3598 else
3599 psrch_inf->endOfSearch = FALSE; 3599 psrch_inf->endOfSearch = false;
3600 3600
3601 psrch_inf->entries_in_buffer = 3601 psrch_inf->entries_in_buffer =
3602 le16_to_cpu(parms->SearchCount); 3602 le16_to_cpu(parms->SearchCount);
@@ -3624,7 +3624,7 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3624 3624
3625 cFYI(1, ("In FindNext")); 3625 cFYI(1, ("In FindNext"));
3626 3626
3627 if (psrch_inf->endOfSearch == TRUE) 3627 if (psrch_inf->endOfSearch)
3628 return -ENOENT; 3628 return -ENOENT;
3629 3629
3630 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 3630 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -3682,7 +3682,7 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3682 cifs_stats_inc(&tcon->num_fnext); 3682 cifs_stats_inc(&tcon->num_fnext);
3683 if (rc) { 3683 if (rc) {
3684 if (rc == -EBADF) { 3684 if (rc == -EBADF) {
3685 psrch_inf->endOfSearch = TRUE; 3685 psrch_inf->endOfSearch = true;
3686 rc = 0; /* search probably was closed at end of search*/ 3686 rc = 0; /* search probably was closed at end of search*/
3687 } else 3687 } else
3688 cFYI(1, ("FindNext returned = %d", rc)); 3688 cFYI(1, ("FindNext returned = %d", rc));
@@ -3692,9 +3692,9 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3692 if (rc == 0) { 3692 if (rc == 0) {
3693 /* BB fixme add lock for file (srch_info) struct here */ 3693 /* BB fixme add lock for file (srch_info) struct here */
3694 if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE) 3694 if (pSMBr->hdr.Flags2 & SMBFLG2_UNICODE)
3695 psrch_inf->unicode = TRUE; 3695 psrch_inf->unicode = true;
3696 else 3696 else
3697 psrch_inf->unicode = FALSE; 3697 psrch_inf->unicode = false;
3698 response_data = (char *) &pSMBr->hdr.Protocol + 3698 response_data = (char *) &pSMBr->hdr.Protocol +
3699 le16_to_cpu(pSMBr->t2.ParameterOffset); 3699 le16_to_cpu(pSMBr->t2.ParameterOffset);
3700 parms = (T2_FNEXT_RSP_PARMS *)response_data; 3700 parms = (T2_FNEXT_RSP_PARMS *)response_data;
@@ -3709,9 +3709,9 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3709 psrch_inf->ntwrk_buf_start = (char *)pSMB; 3709 psrch_inf->ntwrk_buf_start = (char *)pSMB;
3710 psrch_inf->smallBuf = 0; 3710 psrch_inf->smallBuf = 0;
3711 if (parms->EndofSearch) 3711 if (parms->EndofSearch)
3712 psrch_inf->endOfSearch = TRUE; 3712 psrch_inf->endOfSearch = true;
3713 else 3713 else
3714 psrch_inf->endOfSearch = FALSE; 3714 psrch_inf->endOfSearch = false;
3715 psrch_inf->entries_in_buffer = 3715 psrch_inf->entries_in_buffer =
3716 le16_to_cpu(parms->SearchCount); 3716 le16_to_cpu(parms->SearchCount);
3717 psrch_inf->index_of_last_entry += 3717 psrch_inf->index_of_last_entry +=
@@ -4586,7 +4586,7 @@ QFSPosixRetry:
4586 4586
4587int 4587int
4588CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon, const char *fileName, 4588CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon, const char *fileName,
4589 __u64 size, int SetAllocation, 4589 __u64 size, bool SetAllocation,
4590 const struct nls_table *nls_codepage, int remap) 4590 const struct nls_table *nls_codepage, int remap)
4591{ 4591{
4592 struct smb_com_transaction2_spi_req *pSMB = NULL; 4592 struct smb_com_transaction2_spi_req *pSMB = NULL;
@@ -4675,7 +4675,7 @@ SetEOFRetry:
4675 4675
4676int 4676int
4677CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, __u64 size, 4677CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, __u64 size,
4678 __u16 fid, __u32 pid_of_opener, int SetAllocation) 4678 __u16 fid, __u32 pid_of_opener, bool SetAllocation)
4679{ 4679{
4680 struct smb_com_transaction2_sfi_req *pSMB = NULL; 4680 struct smb_com_transaction2_sfi_req *pSMB = NULL;
4681 char *data_offset; 4681 char *data_offset;
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index e17106730168..791ca5c1a116 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -49,8 +49,6 @@
49#define CIFS_PORT 445 49#define CIFS_PORT 445
50#define RFC1001_PORT 139 50#define RFC1001_PORT 139
51 51
52static DECLARE_COMPLETION(cifsd_complete);
53
54extern void SMBNTencrypt(unsigned char *passwd, unsigned char *c8, 52extern void SMBNTencrypt(unsigned char *passwd, unsigned char *c8,
55 unsigned char *p24); 53 unsigned char *p24);
56 54
@@ -71,23 +69,23 @@ struct smb_vol {
71 mode_t file_mode; 69 mode_t file_mode;
72 mode_t dir_mode; 70 mode_t dir_mode;
73 unsigned secFlg; 71 unsigned secFlg;
74 unsigned rw:1; 72 bool rw:1;
75 unsigned retry:1; 73 bool retry:1;
76 unsigned intr:1; 74 bool intr:1;
77 unsigned setuids:1; 75 bool setuids:1;
78 unsigned override_uid:1; 76 bool override_uid:1;
79 unsigned override_gid:1; 77 bool override_gid:1;
80 unsigned noperm:1; 78 bool noperm:1;
81 unsigned no_psx_acl:1; /* set if posix acl support should be disabled */ 79 bool no_psx_acl:1; /* set if posix acl support should be disabled */
82 unsigned cifs_acl:1; 80 bool cifs_acl:1;
83 unsigned no_xattr:1; /* set if xattr (EA) support should be disabled*/ 81 bool no_xattr:1; /* set if xattr (EA) support should be disabled*/
84 unsigned server_ino:1; /* use inode numbers from server ie UniqueId */ 82 bool server_ino:1; /* use inode numbers from server ie UniqueId */
85 unsigned direct_io:1; 83 bool direct_io:1;
86 unsigned remap:1; /* set to remap seven reserved chars in filenames */ 84 bool remap:1; /* set to remap seven reserved chars in filenames */
87 unsigned posix_paths:1; /* unset to not ask for posix pathnames. */ 85 bool posix_paths:1; /* unset to not ask for posix pathnames. */
88 unsigned no_linux_ext:1; 86 bool no_linux_ext:1;
89 unsigned sfu_emul:1; 87 bool sfu_emul:1;
90 unsigned nullauth:1; /* attempt to authenticate with null user */ 88 bool nullauth:1; /* attempt to authenticate with null user */
91 unsigned nocase; /* request case insensitive filenames */ 89 unsigned nocase; /* request case insensitive filenames */
92 unsigned nobrl; /* disable sending byte range locks to srv */ 90 unsigned nobrl; /* disable sending byte range locks to srv */
93 unsigned int rsize; 91 unsigned int rsize;
@@ -345,8 +343,8 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
345 struct task_struct *task_to_wake = NULL; 343 struct task_struct *task_to_wake = NULL;
346 struct mid_q_entry *mid_entry; 344 struct mid_q_entry *mid_entry;
347 char temp; 345 char temp;
348 int isLargeBuf = FALSE; 346 bool isLargeBuf = false;
349 int isMultiRsp; 347 bool isMultiRsp;
350 int reconnect; 348 int reconnect;
351 349
352 current->flags |= PF_MEMALLOC; 350 current->flags |= PF_MEMALLOC;
@@ -356,7 +354,6 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
356 atomic_inc(&tcpSesAllocCount); 354 atomic_inc(&tcpSesAllocCount);
357 length = tcpSesAllocCount.counter; 355 length = tcpSesAllocCount.counter;
358 write_unlock(&GlobalSMBSeslock); 356 write_unlock(&GlobalSMBSeslock);
359 complete(&cifsd_complete);
360 if (length > 1) 357 if (length > 1)
361 mempool_resize(cifs_req_poolp, length + cifs_min_rcv, 358 mempool_resize(cifs_req_poolp, length + cifs_min_rcv,
362 GFP_KERNEL); 359 GFP_KERNEL);
@@ -390,8 +387,8 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
390 } else /* if existing small buf clear beginning */ 387 } else /* if existing small buf clear beginning */
391 memset(smallbuf, 0, sizeof(struct smb_hdr)); 388 memset(smallbuf, 0, sizeof(struct smb_hdr));
392 389
393 isLargeBuf = FALSE; 390 isLargeBuf = false;
394 isMultiRsp = FALSE; 391 isMultiRsp = false;
395 smb_buffer = smallbuf; 392 smb_buffer = smallbuf;
396 iov.iov_base = smb_buffer; 393 iov.iov_base = smb_buffer;
397 iov.iov_len = 4; 394 iov.iov_len = 4;
@@ -517,7 +514,7 @@ incomplete_rcv:
517 reconnect = 0; 514 reconnect = 0;
518 515
519 if (pdu_length > MAX_CIFS_SMALL_BUFFER_SIZE - 4) { 516 if (pdu_length > MAX_CIFS_SMALL_BUFFER_SIZE - 4) {
520 isLargeBuf = TRUE; 517 isLargeBuf = true;
521 memcpy(bigbuf, smallbuf, 4); 518 memcpy(bigbuf, smallbuf, 4);
522 smb_buffer = bigbuf; 519 smb_buffer = bigbuf;
523 } 520 }
@@ -582,16 +579,18 @@ incomplete_rcv:
582 (mid_entry->command == smb_buffer->Command)) { 579 (mid_entry->command == smb_buffer->Command)) {
583 if (check2ndT2(smb_buffer,server->maxBuf) > 0) { 580 if (check2ndT2(smb_buffer,server->maxBuf) > 0) {
584 /* We have a multipart transact2 resp */ 581 /* We have a multipart transact2 resp */
585 isMultiRsp = TRUE; 582 isMultiRsp = true;
586 if (mid_entry->resp_buf) { 583 if (mid_entry->resp_buf) {
587 /* merge response - fix up 1st*/ 584 /* merge response - fix up 1st*/
588 if (coalesce_t2(smb_buffer, 585 if (coalesce_t2(smb_buffer,
589 mid_entry->resp_buf)) { 586 mid_entry->resp_buf)) {
590 mid_entry->multiRsp = 1; 587 mid_entry->multiRsp =
588 true;
591 break; 589 break;
592 } else { 590 } else {
593 /* all parts received */ 591 /* all parts received */
594 mid_entry->multiEnd = 1; 592 mid_entry->multiEnd =
593 true;
595 goto multi_t2_fnd; 594 goto multi_t2_fnd;
596 } 595 }
597 } else { 596 } else {
@@ -603,17 +602,15 @@ incomplete_rcv:
603 /* Have first buffer */ 602 /* Have first buffer */
604 mid_entry->resp_buf = 603 mid_entry->resp_buf =
605 smb_buffer; 604 smb_buffer;
606 mid_entry->largeBuf = 1; 605 mid_entry->largeBuf =
606 true;
607 bigbuf = NULL; 607 bigbuf = NULL;
608 } 608 }
609 } 609 }
610 break; 610 break;
611 } 611 }
612 mid_entry->resp_buf = smb_buffer; 612 mid_entry->resp_buf = smb_buffer;
613 if (isLargeBuf) 613 mid_entry->largeBuf = isLargeBuf;
614 mid_entry->largeBuf = 1;
615 else
616 mid_entry->largeBuf = 0;
617multi_t2_fnd: 614multi_t2_fnd:
618 task_to_wake = mid_entry->tsk; 615 task_to_wake = mid_entry->tsk;
619 mid_entry->midState = MID_RESPONSE_RECEIVED; 616 mid_entry->midState = MID_RESPONSE_RECEIVED;
@@ -638,8 +635,8 @@ multi_t2_fnd:
638 smallbuf = NULL; 635 smallbuf = NULL;
639 } 636 }
640 wake_up_process(task_to_wake); 637 wake_up_process(task_to_wake);
641 } else if ((is_valid_oplock_break(smb_buffer, server) == FALSE) 638 } else if (!is_valid_oplock_break(smb_buffer, server) &&
642 && (isMultiRsp == FALSE)) { 639 !isMultiRsp) {
643 cERROR(1, ("No task to wake, unknown frame received! " 640 cERROR(1, ("No task to wake, unknown frame received! "
644 "NumMids %d", midCount.counter)); 641 "NumMids %d", midCount.counter));
645 cifs_dump_mem("Received Data is: ", (char *)smb_buffer, 642 cifs_dump_mem("Received Data is: ", (char *)smb_buffer,
@@ -825,7 +822,7 @@ cifs_parse_mount_options(char *options, const char *devname,
825 vol->file_mode = (S_IRWXUGO | S_ISGID) & (~S_IXGRP); 822 vol->file_mode = (S_IRWXUGO | S_ISGID) & (~S_IXGRP);
826 823
827 /* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */ 824 /* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */
828 vol->rw = TRUE; 825 vol->rw = true;
829 /* default is always to request posix paths. */ 826 /* default is always to request posix paths. */
830 vol->posix_paths = 1; 827 vol->posix_paths = 1;
831 828
@@ -1181,7 +1178,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1181 } else if (strnicmp(data, "guest", 5) == 0) { 1178 } else if (strnicmp(data, "guest", 5) == 0) {
1182 /* ignore */ 1179 /* ignore */
1183 } else if (strnicmp(data, "rw", 2) == 0) { 1180 } else if (strnicmp(data, "rw", 2) == 0) {
1184 vol->rw = TRUE; 1181 vol->rw = true;
1185 } else if ((strnicmp(data, "suid", 4) == 0) || 1182 } else if ((strnicmp(data, "suid", 4) == 0) ||
1186 (strnicmp(data, "nosuid", 6) == 0) || 1183 (strnicmp(data, "nosuid", 6) == 0) ||
1187 (strnicmp(data, "exec", 4) == 0) || 1184 (strnicmp(data, "exec", 4) == 0) ||
@@ -1197,7 +1194,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1197 is ok to just ignore them */ 1194 is ok to just ignore them */
1198 continue; 1195 continue;
1199 } else if (strnicmp(data, "ro", 2) == 0) { 1196 } else if (strnicmp(data, "ro", 2) == 0) {
1200 vol->rw = FALSE; 1197 vol->rw = false;
1201 } else if (strnicmp(data, "hard", 4) == 0) { 1198 } else if (strnicmp(data, "hard", 4) == 0) {
1202 vol->retry = 1; 1199 vol->retry = 1;
1203 } else if (strnicmp(data, "soft", 4) == 0) { 1200 } else if (strnicmp(data, "soft", 4) == 0) {
@@ -1305,6 +1302,9 @@ cifs_parse_mount_options(char *options, const char *devname,
1305 "begin with // or \\\\ \n"); 1302 "begin with // or \\\\ \n");
1306 return 1; 1303 return 1;
1307 } 1304 }
1305 value = strpbrk(vol->UNC+2, "/\\");
1306 if (value)
1307 *value = '\\';
1308 } else { 1308 } else {
1309 printk(KERN_WARNING "CIFS: UNC name too long\n"); 1309 printk(KERN_WARNING "CIFS: UNC name too long\n");
1310 return 1; 1310 return 1;
@@ -1362,45 +1362,43 @@ find_unc(__be32 new_target_ip_addr, char *uncName, char *userName)
1362{ 1362{
1363 struct list_head *tmp; 1363 struct list_head *tmp;
1364 struct cifsTconInfo *tcon; 1364 struct cifsTconInfo *tcon;
1365 __be32 old_ip;
1365 1366
1366 read_lock(&GlobalSMBSeslock); 1367 read_lock(&GlobalSMBSeslock);
1368
1367 list_for_each(tmp, &GlobalTreeConnectionList) { 1369 list_for_each(tmp, &GlobalTreeConnectionList) {
1368 cFYI(1, ("Next tcon")); 1370 cFYI(1, ("Next tcon"));
1369 tcon = list_entry(tmp, struct cifsTconInfo, cifsConnectionList); 1371 tcon = list_entry(tmp, struct cifsTconInfo, cifsConnectionList);
1370 if (tcon->ses) { 1372 if (!tcon->ses || !tcon->ses->server)
1371 if (tcon->ses->server) { 1373 continue;
1372 cFYI(1, 1374
1373 ("old ip addr: %x == new ip %x ?", 1375 old_ip = tcon->ses->server->addr.sockAddr.sin_addr.s_addr;
1374 tcon->ses->server->addr.sockAddr.sin_addr. 1376 cFYI(1, ("old ip addr: %x == new ip %x ?",
1375 s_addr, new_target_ip_addr)); 1377 old_ip, new_target_ip_addr));
1376 if (tcon->ses->server->addr.sockAddr.sin_addr. 1378
1377 s_addr == new_target_ip_addr) { 1379 if (old_ip != new_target_ip_addr)
1378 /* BB lock tcon, server and tcp session and increment use count here? */ 1380 continue;
1379 /* found a match on the TCP session */ 1381
1380 /* BB check if reconnection needed */ 1382 /* BB lock tcon, server, tcp session and increment use count? */
1381 cFYI(1, 1383 /* found a match on the TCP session */
1382 ("IP match, old UNC: %s new: %s", 1384 /* BB check if reconnection needed */
1383 tcon->treeName, uncName)); 1385 cFYI(1, ("IP match, old UNC: %s new: %s",
1384 if (strncmp 1386 tcon->treeName, uncName));
1385 (tcon->treeName, uncName, 1387
1386 MAX_TREE_SIZE) == 0) { 1388 if (strncmp(tcon->treeName, uncName, MAX_TREE_SIZE))
1387 cFYI(1, 1389 continue;
1388 ("and old usr: %s new: %s", 1390
1389 tcon->treeName, uncName)); 1391 cFYI(1, ("and old usr: %s new: %s",
1390 if (strncmp 1392 tcon->treeName, uncName));
1391 (tcon->ses->userName, 1393
1392 userName, 1394 if (strncmp(tcon->ses->userName, userName, MAX_USERNAME_SIZE))
1393 MAX_USERNAME_SIZE) == 0) { 1395 continue;
1394 read_unlock(&GlobalSMBSeslock); 1396
1395 /* matched smb session 1397 /* matched smb session (user name) */
1396 (user name */ 1398 read_unlock(&GlobalSMBSeslock);
1397 return tcon; 1399 return tcon;
1398 }
1399 }
1400 }
1401 }
1402 }
1403 } 1400 }
1401
1404 read_unlock(&GlobalSMBSeslock); 1402 read_unlock(&GlobalSMBSeslock);
1405 return NULL; 1403 return NULL;
1406} 1404}
@@ -1982,7 +1980,6 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb,
1982 kfree(srvTcp->hostname); 1980 kfree(srvTcp->hostname);
1983 goto out; 1981 goto out;
1984 } 1982 }
1985 wait_for_completion(&cifsd_complete);
1986 rc = 0; 1983 rc = 0;
1987 memcpy(srvTcp->workstation_RFC1001_name, 1984 memcpy(srvTcp->workstation_RFC1001_name,
1988 volume_info.source_rfc1001_name, 16); 1985 volume_info.source_rfc1001_name, 16);
@@ -2602,7 +2599,7 @@ sesssetup_nomem: /* do not return an error on nomem for the info strings,
2602 2599
2603static int 2600static int
2604CIFSNTLMSSPNegotiateSessSetup(unsigned int xid, 2601CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2605 struct cifsSesInfo *ses, int *pNTLMv2_flag, 2602 struct cifsSesInfo *ses, bool *pNTLMv2_flag,
2606 const struct nls_table *nls_codepage) 2603 const struct nls_table *nls_codepage)
2607{ 2604{
2608 struct smb_hdr *smb_buffer; 2605 struct smb_hdr *smb_buffer;
@@ -2625,7 +2622,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2625 if (ses == NULL) 2622 if (ses == NULL)
2626 return -EINVAL; 2623 return -EINVAL;
2627 domain = ses->domainName; 2624 domain = ses->domainName;
2628 *pNTLMv2_flag = FALSE; 2625 *pNTLMv2_flag = false;
2629 smb_buffer = cifs_buf_get(); 2626 smb_buffer = cifs_buf_get();
2630 if (smb_buffer == NULL) { 2627 if (smb_buffer == NULL) {
2631 return -ENOMEM; 2628 return -ENOMEM;
@@ -2778,7 +2775,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2778 CIFS_CRYPTO_KEY_SIZE); 2775 CIFS_CRYPTO_KEY_SIZE);
2779 if (SecurityBlob2->NegotiateFlags & 2776 if (SecurityBlob2->NegotiateFlags &
2780 cpu_to_le32(NTLMSSP_NEGOTIATE_NTLMV2)) 2777 cpu_to_le32(NTLMSSP_NEGOTIATE_NTLMV2))
2781 *pNTLMv2_flag = TRUE; 2778 *pNTLMv2_flag = true;
2782 2779
2783 if ((SecurityBlob2->NegotiateFlags & 2780 if ((SecurityBlob2->NegotiateFlags &
2784 cpu_to_le32(NTLMSSP_NEGOTIATE_ALWAYS_SIGN)) 2781 cpu_to_le32(NTLMSSP_NEGOTIATE_ALWAYS_SIGN))
@@ -2939,7 +2936,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2939} 2936}
2940static int 2937static int
2941CIFSNTLMSSPAuthSessSetup(unsigned int xid, struct cifsSesInfo *ses, 2938CIFSNTLMSSPAuthSessSetup(unsigned int xid, struct cifsSesInfo *ses,
2942 char *ntlm_session_key, int ntlmv2_flag, 2939 char *ntlm_session_key, bool ntlmv2_flag,
2943 const struct nls_table *nls_codepage) 2940 const struct nls_table *nls_codepage)
2944{ 2941{
2945 struct smb_hdr *smb_buffer; 2942 struct smb_hdr *smb_buffer;
@@ -3556,8 +3553,6 @@ cifs_umount(struct super_block *sb, struct cifs_sb_info *cifs_sb)
3556 cifs_sb->prepath = NULL; 3553 cifs_sb->prepath = NULL;
3557 kfree(tmp); 3554 kfree(tmp);
3558 if (ses) 3555 if (ses)
3559 schedule_timeout_interruptible(msecs_to_jiffies(500));
3560 if (ses)
3561 sesInfoFree(ses); 3556 sesInfoFree(ses);
3562 3557
3563 FreeXid(xid); 3558 FreeXid(xid);
@@ -3569,7 +3564,7 @@ int cifs_setup_session(unsigned int xid, struct cifsSesInfo *pSesInfo,
3569{ 3564{
3570 int rc = 0; 3565 int rc = 0;
3571 char ntlm_session_key[CIFS_SESS_KEY_SIZE]; 3566 char ntlm_session_key[CIFS_SESS_KEY_SIZE];
3572 int ntlmv2_flag = FALSE; 3567 bool ntlmv2_flag = false;
3573 int first_time = 0; 3568 int first_time = 0;
3574 3569
3575 /* what if server changes its buffer size after dropping the session? */ 3570 /* what if server changes its buffer size after dropping the session? */
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 0f5c62ba4038..6ed775986be9 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -130,7 +130,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
130 struct cifsFileInfo *pCifsFile = NULL; 130 struct cifsFileInfo *pCifsFile = NULL;
131 struct cifsInodeInfo *pCifsInode; 131 struct cifsInodeInfo *pCifsInode;
132 int disposition = FILE_OVERWRITE_IF; 132 int disposition = FILE_OVERWRITE_IF;
133 int write_only = FALSE; 133 bool write_only = false;
134 134
135 xid = GetXid(); 135 xid = GetXid();
136 136
@@ -152,7 +152,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
152 if (oflags & FMODE_WRITE) { 152 if (oflags & FMODE_WRITE) {
153 desiredAccess |= GENERIC_WRITE; 153 desiredAccess |= GENERIC_WRITE;
154 if (!(oflags & FMODE_READ)) 154 if (!(oflags & FMODE_READ))
155 write_only = TRUE; 155 write_only = true;
156 } 156 }
157 157
158 if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) 158 if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL))
@@ -254,7 +254,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
254 d_instantiate(direntry, newinode); 254 d_instantiate(direntry, newinode);
255 } 255 }
256 if ((nd == NULL /* nfsd case - nfs srv does not set nd */) || 256 if ((nd == NULL /* nfsd case - nfs srv does not set nd */) ||
257 ((nd->flags & LOOKUP_OPEN) == FALSE)) { 257 (!(nd->flags & LOOKUP_OPEN))) {
258 /* mknod case - do not leave file open */ 258 /* mknod case - do not leave file open */
259 CIFSSMBClose(xid, pTcon, fileHandle); 259 CIFSSMBClose(xid, pTcon, fileHandle);
260 } else if (newinode) { 260 } else if (newinode) {
@@ -266,8 +266,8 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
266 pCifsFile->netfid = fileHandle; 266 pCifsFile->netfid = fileHandle;
267 pCifsFile->pid = current->tgid; 267 pCifsFile->pid = current->tgid;
268 pCifsFile->pInode = newinode; 268 pCifsFile->pInode = newinode;
269 pCifsFile->invalidHandle = FALSE; 269 pCifsFile->invalidHandle = false;
270 pCifsFile->closePend = FALSE; 270 pCifsFile->closePend = false;
271 init_MUTEX(&pCifsFile->fh_sem); 271 init_MUTEX(&pCifsFile->fh_sem);
272 mutex_init(&pCifsFile->lock_mutex); 272 mutex_init(&pCifsFile->lock_mutex);
273 INIT_LIST_HEAD(&pCifsFile->llist); 273 INIT_LIST_HEAD(&pCifsFile->llist);
@@ -280,7 +280,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
280 pCifsInode = CIFS_I(newinode); 280 pCifsInode = CIFS_I(newinode);
281 if (pCifsInode) { 281 if (pCifsInode) {
282 /* if readable file instance put first in list*/ 282 /* if readable file instance put first in list*/
283 if (write_only == TRUE) { 283 if (write_only) {
284 list_add_tail(&pCifsFile->flist, 284 list_add_tail(&pCifsFile->flist,
285 &pCifsInode->openFileList); 285 &pCifsInode->openFileList);
286 } else { 286 } else {
@@ -288,12 +288,12 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
288 &pCifsInode->openFileList); 288 &pCifsInode->openFileList);
289 } 289 }
290 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) { 290 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
291 pCifsInode->clientCanCacheAll = TRUE; 291 pCifsInode->clientCanCacheAll = true;
292 pCifsInode->clientCanCacheRead = TRUE; 292 pCifsInode->clientCanCacheRead = true;
293 cFYI(1, ("Exclusive Oplock inode %p", 293 cFYI(1, ("Exclusive Oplock inode %p",
294 newinode)); 294 newinode));
295 } else if ((oplock & 0xF) == OPLOCK_READ) 295 } else if ((oplock & 0xF) == OPLOCK_READ)
296 pCifsInode->clientCanCacheRead = TRUE; 296 pCifsInode->clientCanCacheRead = true;
297 } 297 }
298 write_unlock(&GlobalSMBSeslock); 298 write_unlock(&GlobalSMBSeslock);
299 } 299 }
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index 7cc86c418182..939e256f8497 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -55,6 +55,32 @@ struct key_type key_type_dns_resolver = {
55 .match = user_match, 55 .match = user_match,
56}; 56};
57 57
58/* Checks if supplied name is IP address
59 * returns:
60 * 1 - name is IP
61 * 0 - name is not IP
62 */
63static int is_ip(const char *name)
64{
65 int rc;
66 struct sockaddr_in sin_server;
67 struct sockaddr_in6 sin_server6;
68
69 rc = cifs_inet_pton(AF_INET, name,
70 &sin_server.sin_addr.s_addr);
71
72 if (rc <= 0) {
73 /* not ipv4 address, try ipv6 */
74 rc = cifs_inet_pton(AF_INET6, name,
75 &sin_server6.sin6_addr.in6_u);
76 if (rc > 0)
77 return 1;
78 } else {
79 return 1;
80 }
81 /* we failed translating address */
82 return 0;
83}
58 84
59/* Resolves server name to ip address. 85/* Resolves server name to ip address.
60 * input: 86 * input:
@@ -67,8 +93,9 @@ int
67dns_resolve_server_name_to_ip(const char *unc, char **ip_addr) 93dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
68{ 94{
69 int rc = -EAGAIN; 95 int rc = -EAGAIN;
70 struct key *rkey; 96 struct key *rkey = ERR_PTR(-EAGAIN);
71 char *name; 97 char *name;
98 char *data = NULL;
72 int len; 99 int len;
73 100
74 if (!ip_addr || !unc) 101 if (!ip_addr || !unc)
@@ -97,26 +124,41 @@ dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
97 memcpy(name, unc+2, len); 124 memcpy(name, unc+2, len);
98 name[len] = 0; 125 name[len] = 0;
99 126
127 if (is_ip(name)) {
128 cFYI(1, ("%s: it is IP, skipping dns upcall: %s",
129 __func__, name));
130 data = name;
131 goto skip_upcall;
132 }
133
100 rkey = request_key(&key_type_dns_resolver, name, ""); 134 rkey = request_key(&key_type_dns_resolver, name, "");
101 if (!IS_ERR(rkey)) { 135 if (!IS_ERR(rkey)) {
102 len = strlen(rkey->payload.data); 136 data = rkey->payload.data;
103 *ip_addr = kmalloc(len+1, GFP_KERNEL); 137 cFYI(1, ("%s: resolved: %s to %s", __func__,
104 if (*ip_addr) {
105 memcpy(*ip_addr, rkey->payload.data, len);
106 (*ip_addr)[len] = '\0';
107 cFYI(1, ("%s: resolved: %s to %s", __func__,
108 rkey->description, 138 rkey->description,
109 *ip_addr 139 *ip_addr
110 )); 140 ));
141 } else {
142 cERROR(1, ("%s: unable to resolve: %s", __func__, name));
143 goto out;
144 }
145
146skip_upcall:
147 if (data) {
148 len = strlen(data);
149 *ip_addr = kmalloc(len+1, GFP_KERNEL);
150 if (*ip_addr) {
151 memcpy(*ip_addr, data, len);
152 (*ip_addr)[len] = '\0';
111 rc = 0; 153 rc = 0;
112 } else { 154 } else {
113 rc = -ENOMEM; 155 rc = -ENOMEM;
114 } 156 }
115 key_put(rkey); 157 if (!IS_ERR(rkey))
116 } else { 158 key_put(rkey);
117 cERROR(1, ("%s: unable to resolve: %s", __func__, name));
118 } 159 }
119 160
161out:
120 kfree(name); 162 kfree(name);
121 return rc; 163 return rc;
122} 164}
diff --git a/fs/cifs/fcntl.c b/fs/cifs/fcntl.c
index 7d1d5aa4c430..5a57581eb4b2 100644
--- a/fs/cifs/fcntl.c
+++ b/fs/cifs/fcntl.c
@@ -68,7 +68,7 @@ int cifs_dir_notify(struct file *file, unsigned long arg)
68{ 68{
69 int xid; 69 int xid;
70 int rc = -EINVAL; 70 int rc = -EINVAL;
71 int oplock = FALSE; 71 int oplock = 0;
72 struct cifs_sb_info *cifs_sb; 72 struct cifs_sb_info *cifs_sb;
73 struct cifsTconInfo *pTcon; 73 struct cifsTconInfo *pTcon;
74 char *full_path = NULL; 74 char *full_path = NULL;
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 40b690073fc1..31a0a33b9d95 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -51,8 +51,8 @@ static inline struct cifsFileInfo *cifs_init_private(
51 INIT_LIST_HEAD(&private_data->llist); 51 INIT_LIST_HEAD(&private_data->llist);
52 private_data->pfile = file; /* needed for writepage */ 52 private_data->pfile = file; /* needed for writepage */
53 private_data->pInode = inode; 53 private_data->pInode = inode;
54 private_data->invalidHandle = FALSE; 54 private_data->invalidHandle = false;
55 private_data->closePend = FALSE; 55 private_data->closePend = false;
56 /* we have to track num writers to the inode, since writepages 56 /* we have to track num writers to the inode, since writepages
57 does not tell us which handle the write is for so there can 57 does not tell us which handle the write is for so there can
58 be a close (overlapping with write) of the filehandle that 58 be a close (overlapping with write) of the filehandle that
@@ -148,12 +148,12 @@ client_can_cache:
148 full_path, buf, inode->i_sb, xid, NULL); 148 full_path, buf, inode->i_sb, xid, NULL);
149 149
150 if ((*oplock & 0xF) == OPLOCK_EXCLUSIVE) { 150 if ((*oplock & 0xF) == OPLOCK_EXCLUSIVE) {
151 pCifsInode->clientCanCacheAll = TRUE; 151 pCifsInode->clientCanCacheAll = true;
152 pCifsInode->clientCanCacheRead = TRUE; 152 pCifsInode->clientCanCacheRead = true;
153 cFYI(1, ("Exclusive Oplock granted on inode %p", 153 cFYI(1, ("Exclusive Oplock granted on inode %p",
154 file->f_path.dentry->d_inode)); 154 file->f_path.dentry->d_inode));
155 } else if ((*oplock & 0xF) == OPLOCK_READ) 155 } else if ((*oplock & 0xF) == OPLOCK_READ)
156 pCifsInode->clientCanCacheRead = TRUE; 156 pCifsInode->clientCanCacheRead = true;
157 157
158 return rc; 158 return rc;
159} 159}
@@ -247,7 +247,7 @@ int cifs_open(struct inode *inode, struct file *file)
247 if (oplockEnabled) 247 if (oplockEnabled)
248 oplock = REQ_OPLOCK; 248 oplock = REQ_OPLOCK;
249 else 249 else
250 oplock = FALSE; 250 oplock = 0;
251 251
252 /* BB pass O_SYNC flag through on file attributes .. BB */ 252 /* BB pass O_SYNC flag through on file attributes .. BB */
253 253
@@ -339,7 +339,7 @@ static int cifs_relock_file(struct cifsFileInfo *cifsFile)
339 return rc; 339 return rc;
340} 340}
341 341
342static int cifs_reopen_file(struct file *file, int can_flush) 342static int cifs_reopen_file(struct file *file, bool can_flush)
343{ 343{
344 int rc = -EACCES; 344 int rc = -EACCES;
345 int xid, oplock; 345 int xid, oplock;
@@ -360,7 +360,7 @@ static int cifs_reopen_file(struct file *file, int can_flush)
360 360
361 xid = GetXid(); 361 xid = GetXid();
362 down(&pCifsFile->fh_sem); 362 down(&pCifsFile->fh_sem);
363 if (pCifsFile->invalidHandle == FALSE) { 363 if (!pCifsFile->invalidHandle) {
364 up(&pCifsFile->fh_sem); 364 up(&pCifsFile->fh_sem);
365 FreeXid(xid); 365 FreeXid(xid);
366 return 0; 366 return 0;
@@ -404,7 +404,7 @@ reopen_error_exit:
404 if (oplockEnabled) 404 if (oplockEnabled)
405 oplock = REQ_OPLOCK; 405 oplock = REQ_OPLOCK;
406 else 406 else
407 oplock = FALSE; 407 oplock = 0;
408 408
409 /* Can not refresh inode by passing in file_info buf to be returned 409 /* Can not refresh inode by passing in file_info buf to be returned
410 by SMBOpen and then calling get_inode_info with returned buf 410 by SMBOpen and then calling get_inode_info with returned buf
@@ -422,7 +422,7 @@ reopen_error_exit:
422 cFYI(1, ("oplock: %d", oplock)); 422 cFYI(1, ("oplock: %d", oplock));
423 } else { 423 } else {
424 pCifsFile->netfid = netfid; 424 pCifsFile->netfid = netfid;
425 pCifsFile->invalidHandle = FALSE; 425 pCifsFile->invalidHandle = false;
426 up(&pCifsFile->fh_sem); 426 up(&pCifsFile->fh_sem);
427 pCifsInode = CIFS_I(inode); 427 pCifsInode = CIFS_I(inode);
428 if (pCifsInode) { 428 if (pCifsInode) {
@@ -432,8 +432,8 @@ reopen_error_exit:
432 CIFS_I(inode)->write_behind_rc = rc; 432 CIFS_I(inode)->write_behind_rc = rc;
433 /* temporarily disable caching while we 433 /* temporarily disable caching while we
434 go to server to get inode info */ 434 go to server to get inode info */
435 pCifsInode->clientCanCacheAll = FALSE; 435 pCifsInode->clientCanCacheAll = false;
436 pCifsInode->clientCanCacheRead = FALSE; 436 pCifsInode->clientCanCacheRead = false;
437 if (pTcon->unix_ext) 437 if (pTcon->unix_ext)
438 rc = cifs_get_inode_info_unix(&inode, 438 rc = cifs_get_inode_info_unix(&inode,
439 full_path, inode->i_sb, xid); 439 full_path, inode->i_sb, xid);
@@ -448,16 +448,16 @@ reopen_error_exit:
448 we can not go to the server to get the new inod 448 we can not go to the server to get the new inod
449 info */ 449 info */
450 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) { 450 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
451 pCifsInode->clientCanCacheAll = TRUE; 451 pCifsInode->clientCanCacheAll = true;
452 pCifsInode->clientCanCacheRead = TRUE; 452 pCifsInode->clientCanCacheRead = true;
453 cFYI(1, ("Exclusive Oplock granted on inode %p", 453 cFYI(1, ("Exclusive Oplock granted on inode %p",
454 file->f_path.dentry->d_inode)); 454 file->f_path.dentry->d_inode));
455 } else if ((oplock & 0xF) == OPLOCK_READ) { 455 } else if ((oplock & 0xF) == OPLOCK_READ) {
456 pCifsInode->clientCanCacheRead = TRUE; 456 pCifsInode->clientCanCacheRead = true;
457 pCifsInode->clientCanCacheAll = FALSE; 457 pCifsInode->clientCanCacheAll = false;
458 } else { 458 } else {
459 pCifsInode->clientCanCacheRead = FALSE; 459 pCifsInode->clientCanCacheRead = false;
460 pCifsInode->clientCanCacheAll = FALSE; 460 pCifsInode->clientCanCacheAll = false;
461 } 461 }
462 cifs_relock_file(pCifsFile); 462 cifs_relock_file(pCifsFile);
463 } 463 }
@@ -484,7 +484,7 @@ int cifs_close(struct inode *inode, struct file *file)
484 if (pSMBFile) { 484 if (pSMBFile) {
485 struct cifsLockInfo *li, *tmp; 485 struct cifsLockInfo *li, *tmp;
486 486
487 pSMBFile->closePend = TRUE; 487 pSMBFile->closePend = true;
488 if (pTcon) { 488 if (pTcon) {
489 /* no sense reconnecting to close a file that is 489 /* no sense reconnecting to close a file that is
490 already closed */ 490 already closed */
@@ -553,8 +553,8 @@ int cifs_close(struct inode *inode, struct file *file)
553 cFYI(1, ("closing last open instance for inode %p", inode)); 553 cFYI(1, ("closing last open instance for inode %p", inode));
554 /* if the file is not open we do not know if we can cache info 554 /* if the file is not open we do not know if we can cache info
555 on this inode, much less write behind and read ahead */ 555 on this inode, much less write behind and read ahead */
556 CIFS_I(inode)->clientCanCacheRead = FALSE; 556 CIFS_I(inode)->clientCanCacheRead = false;
557 CIFS_I(inode)->clientCanCacheAll = FALSE; 557 CIFS_I(inode)->clientCanCacheAll = false;
558 } 558 }
559 read_unlock(&GlobalSMBSeslock); 559 read_unlock(&GlobalSMBSeslock);
560 if ((rc == 0) && CIFS_I(inode)->write_behind_rc) 560 if ((rc == 0) && CIFS_I(inode)->write_behind_rc)
@@ -583,9 +583,9 @@ int cifs_closedir(struct inode *inode, struct file *file)
583 pTcon = cifs_sb->tcon; 583 pTcon = cifs_sb->tcon;
584 584
585 cFYI(1, ("Freeing private data in close dir")); 585 cFYI(1, ("Freeing private data in close dir"));
586 if ((pCFileStruct->srch_inf.endOfSearch == FALSE) && 586 if (!pCFileStruct->srch_inf.endOfSearch &&
587 (pCFileStruct->invalidHandle == FALSE)) { 587 !pCFileStruct->invalidHandle) {
588 pCFileStruct->invalidHandle = TRUE; 588 pCFileStruct->invalidHandle = true;
589 rc = CIFSFindClose(xid, pTcon, pCFileStruct->netfid); 589 rc = CIFSFindClose(xid, pTcon, pCFileStruct->netfid);
590 cFYI(1, ("Closing uncompleted readdir with rc %d", 590 cFYI(1, ("Closing uncompleted readdir with rc %d",
591 rc)); 591 rc));
@@ -637,12 +637,12 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
637 __u32 numLock = 0; 637 __u32 numLock = 0;
638 __u32 numUnlock = 0; 638 __u32 numUnlock = 0;
639 __u64 length; 639 __u64 length;
640 int wait_flag = FALSE; 640 bool wait_flag = false;
641 struct cifs_sb_info *cifs_sb; 641 struct cifs_sb_info *cifs_sb;
642 struct cifsTconInfo *pTcon; 642 struct cifsTconInfo *pTcon;
643 __u16 netfid; 643 __u16 netfid;
644 __u8 lockType = LOCKING_ANDX_LARGE_FILES; 644 __u8 lockType = LOCKING_ANDX_LARGE_FILES;
645 int posix_locking; 645 bool posix_locking;
646 646
647 length = 1 + pfLock->fl_end - pfLock->fl_start; 647 length = 1 + pfLock->fl_end - pfLock->fl_start;
648 rc = -EACCES; 648 rc = -EACCES;
@@ -659,7 +659,7 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
659 cFYI(1, ("Flock")); 659 cFYI(1, ("Flock"));
660 if (pfLock->fl_flags & FL_SLEEP) { 660 if (pfLock->fl_flags & FL_SLEEP) {
661 cFYI(1, ("Blocking lock")); 661 cFYI(1, ("Blocking lock"));
662 wait_flag = TRUE; 662 wait_flag = true;
663 } 663 }
664 if (pfLock->fl_flags & FL_ACCESS) 664 if (pfLock->fl_flags & FL_ACCESS)
665 cFYI(1, ("Process suspended by mandatory locking - " 665 cFYI(1, ("Process suspended by mandatory locking - "
@@ -794,7 +794,7 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
794 stored_rc = CIFSSMBLock(xid, pTcon, 794 stored_rc = CIFSSMBLock(xid, pTcon,
795 netfid, 795 netfid,
796 li->length, li->offset, 796 li->length, li->offset,
797 1, 0, li->type, FALSE); 797 1, 0, li->type, false);
798 if (stored_rc) 798 if (stored_rc)
799 rc = stored_rc; 799 rc = stored_rc;
800 800
@@ -866,7 +866,7 @@ ssize_t cifs_user_write(struct file *file, const char __user *write_data,
866 filemap_fdatawait from here so tell 866 filemap_fdatawait from here so tell
867 reopen_file not to flush data to server 867 reopen_file not to flush data to server
868 now */ 868 now */
869 rc = cifs_reopen_file(file, FALSE); 869 rc = cifs_reopen_file(file, false);
870 if (rc != 0) 870 if (rc != 0)
871 break; 871 break;
872 } 872 }
@@ -966,7 +966,7 @@ static ssize_t cifs_write(struct file *file, const char *write_data,
966 filemap_fdatawait from here so tell 966 filemap_fdatawait from here so tell
967 reopen_file not to flush data to 967 reopen_file not to flush data to
968 server now */ 968 server now */
969 rc = cifs_reopen_file(file, FALSE); 969 rc = cifs_reopen_file(file, false);
970 if (rc != 0) 970 if (rc != 0)
971 break; 971 break;
972 } 972 }
@@ -1093,7 +1093,7 @@ refind_writable:
1093 1093
1094 read_unlock(&GlobalSMBSeslock); 1094 read_unlock(&GlobalSMBSeslock);
1095 /* Had to unlock since following call can block */ 1095 /* Had to unlock since following call can block */
1096 rc = cifs_reopen_file(open_file->pfile, FALSE); 1096 rc = cifs_reopen_file(open_file->pfile, false);
1097 if (!rc) { 1097 if (!rc) {
1098 if (!open_file->closePend) 1098 if (!open_file->closePend)
1099 return open_file; 1099 return open_file;
@@ -1608,7 +1608,7 @@ ssize_t cifs_user_read(struct file *file, char __user *read_data,
1608 int buf_type = CIFS_NO_BUFFER; 1608 int buf_type = CIFS_NO_BUFFER;
1609 if ((open_file->invalidHandle) && 1609 if ((open_file->invalidHandle) &&
1610 (!open_file->closePend)) { 1610 (!open_file->closePend)) {
1611 rc = cifs_reopen_file(file, TRUE); 1611 rc = cifs_reopen_file(file, true);
1612 if (rc != 0) 1612 if (rc != 0)
1613 break; 1613 break;
1614 } 1614 }
@@ -1693,7 +1693,7 @@ static ssize_t cifs_read(struct file *file, char *read_data, size_t read_size,
1693 while (rc == -EAGAIN) { 1693 while (rc == -EAGAIN) {
1694 if ((open_file->invalidHandle) && 1694 if ((open_file->invalidHandle) &&
1695 (!open_file->closePend)) { 1695 (!open_file->closePend)) {
1696 rc = cifs_reopen_file(file, TRUE); 1696 rc = cifs_reopen_file(file, true);
1697 if (rc != 0) 1697 if (rc != 0)
1698 break; 1698 break;
1699 } 1699 }
@@ -1850,7 +1850,7 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
1850 while (rc == -EAGAIN) { 1850 while (rc == -EAGAIN) {
1851 if ((open_file->invalidHandle) && 1851 if ((open_file->invalidHandle) &&
1852 (!open_file->closePend)) { 1852 (!open_file->closePend)) {
1853 rc = cifs_reopen_file(file, TRUE); 1853 rc = cifs_reopen_file(file, true);
1854 if (rc != 0) 1854 if (rc != 0)
1855 break; 1855 break;
1856 } 1856 }
@@ -2009,10 +2009,10 @@ static int is_inode_writable(struct cifsInodeInfo *cifs_inode)
2009 refreshing the inode only on increases in the file size 2009 refreshing the inode only on increases in the file size
2010 but this is tricky to do without racing with writebehind 2010 but this is tricky to do without racing with writebehind
2011 page caching in the current Linux kernel design */ 2011 page caching in the current Linux kernel design */
2012int is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file) 2012bool is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file)
2013{ 2013{
2014 if (!cifsInode) 2014 if (!cifsInode)
2015 return 1; 2015 return true;
2016 2016
2017 if (is_inode_writable(cifsInode)) { 2017 if (is_inode_writable(cifsInode)) {
2018 /* This inode is open for write at least once */ 2018 /* This inode is open for write at least once */
@@ -2022,15 +2022,15 @@ int is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file)
2022 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO) { 2022 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO) {
2023 /* since no page cache to corrupt on directio 2023 /* since no page cache to corrupt on directio
2024 we can change size safely */ 2024 we can change size safely */
2025 return 1; 2025 return true;
2026 } 2026 }
2027 2027
2028 if (i_size_read(&cifsInode->vfs_inode) < end_of_file) 2028 if (i_size_read(&cifsInode->vfs_inode) < end_of_file)
2029 return 1; 2029 return true;
2030 2030
2031 return 0; 2031 return false;
2032 } else 2032 } else
2033 return 1; 2033 return true;
2034} 2034}
2035 2035
2036static int cifs_prepare_write(struct file *file, struct page *page, 2036static int cifs_prepare_write(struct file *file, struct page *page,
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index e1031b9e2c55..0d9d2e6d7af6 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -281,7 +281,7 @@ static int decode_sfu_inode(struct inode *inode, __u64 size,
281 struct cifs_sb_info *cifs_sb, int xid) 281 struct cifs_sb_info *cifs_sb, int xid)
282{ 282{
283 int rc; 283 int rc;
284 int oplock = FALSE; 284 int oplock = 0;
285 __u16 netfid; 285 __u16 netfid;
286 struct cifsTconInfo *pTcon = cifs_sb->tcon; 286 struct cifsTconInfo *pTcon = cifs_sb->tcon;
287 char buf[24]; 287 char buf[24];
@@ -389,7 +389,7 @@ int cifs_get_inode_info(struct inode **pinode,
389 struct cifs_sb_info *cifs_sb = CIFS_SB(sb); 389 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
390 const unsigned char *full_path = NULL; 390 const unsigned char *full_path = NULL;
391 char *buf = NULL; 391 char *buf = NULL;
392 int adjustTZ = FALSE; 392 bool adjustTZ = false;
393 bool is_dfs_referral = false; 393 bool is_dfs_referral = false;
394 394
395 pTcon = cifs_sb->tcon; 395 pTcon = cifs_sb->tcon;
@@ -425,7 +425,7 @@ try_again_CIFSSMBQPathInfo:
425 pfindData, cifs_sb->local_nls, 425 pfindData, cifs_sb->local_nls,
426 cifs_sb->mnt_cifs_flags & 426 cifs_sb->mnt_cifs_flags &
427 CIFS_MOUNT_MAP_SPECIAL_CHR); 427 CIFS_MOUNT_MAP_SPECIAL_CHR);
428 adjustTZ = TRUE; 428 adjustTZ = true;
429 } 429 }
430 } 430 }
431 /* dump_mem("\nQPathInfo return data",&findData, sizeof(findData)); */ 431 /* dump_mem("\nQPathInfo return data",&findData, sizeof(findData)); */
@@ -703,7 +703,7 @@ psx_del_no_retry:
703 } else if (rc == -ENOENT) { 703 } else if (rc == -ENOENT) {
704 d_drop(direntry); 704 d_drop(direntry);
705 } else if (rc == -ETXTBSY) { 705 } else if (rc == -ETXTBSY) {
706 int oplock = FALSE; 706 int oplock = 0;
707 __u16 netfid; 707 __u16 netfid;
708 708
709 rc = CIFSSMBOpen(xid, pTcon, full_path, FILE_OPEN, DELETE, 709 rc = CIFSSMBOpen(xid, pTcon, full_path, FILE_OPEN, DELETE,
@@ -736,7 +736,7 @@ psx_del_no_retry:
736 rc = -EOPNOTSUPP; 736 rc = -EOPNOTSUPP;
737 737
738 if (rc == -EOPNOTSUPP) { 738 if (rc == -EOPNOTSUPP) {
739 int oplock = FALSE; 739 int oplock = 0;
740 __u16 netfid; 740 __u16 netfid;
741 /* rc = CIFSSMBSetAttrLegacy(xid, pTcon, 741 /* rc = CIFSSMBSetAttrLegacy(xid, pTcon,
742 full_path, 742 full_path,
@@ -774,7 +774,7 @@ psx_del_no_retry:
774 if (direntry->d_inode) 774 if (direntry->d_inode)
775 drop_nlink(direntry->d_inode); 775 drop_nlink(direntry->d_inode);
776 } else if (rc == -ETXTBSY) { 776 } else if (rc == -ETXTBSY) {
777 int oplock = FALSE; 777 int oplock = 0;
778 __u16 netfid; 778 __u16 netfid;
779 779
780 rc = CIFSSMBOpen(xid, pTcon, full_path, 780 rc = CIFSSMBOpen(xid, pTcon, full_path,
@@ -1149,7 +1149,7 @@ int cifs_rename(struct inode *source_inode, struct dentry *source_direntry,
1149 cFYI(1, ("rename rc %d", rc)); 1149 cFYI(1, ("rename rc %d", rc));
1150 1150
1151 if ((rc == -EIO) || (rc == -EEXIST)) { 1151 if ((rc == -EIO) || (rc == -EEXIST)) {
1152 int oplock = FALSE; 1152 int oplock = 0;
1153 __u16 netfid; 1153 __u16 netfid;
1154 1154
1155 /* BB FIXME Is Generic Read correct for rename? */ 1155 /* BB FIXME Is Generic Read correct for rename? */
@@ -1186,7 +1186,7 @@ int cifs_revalidate(struct dentry *direntry)
1186 struct cifsInodeInfo *cifsInode; 1186 struct cifsInodeInfo *cifsInode;
1187 loff_t local_size; 1187 loff_t local_size;
1188 struct timespec local_mtime; 1188 struct timespec local_mtime;
1189 int invalidate_inode = FALSE; 1189 bool invalidate_inode = false;
1190 1190
1191 if (direntry->d_inode == NULL) 1191 if (direntry->d_inode == NULL)
1192 return -ENOENT; 1192 return -ENOENT;
@@ -1268,7 +1268,7 @@ int cifs_revalidate(struct dentry *direntry)
1268 only ones who could have modified the file and the 1268 only ones who could have modified the file and the
1269 server copy is staler than ours */ 1269 server copy is staler than ours */
1270 } else { 1270 } else {
1271 invalidate_inode = TRUE; 1271 invalidate_inode = true;
1272 } 1272 }
1273 } 1273 }
1274 1274
@@ -1402,8 +1402,8 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1402 int rc = -EACCES; 1402 int rc = -EACCES;
1403 struct cifsFileInfo *open_file = NULL; 1403 struct cifsFileInfo *open_file = NULL;
1404 FILE_BASIC_INFO time_buf; 1404 FILE_BASIC_INFO time_buf;
1405 int set_time = FALSE; 1405 bool set_time = false;
1406 int set_dosattr = FALSE; 1406 bool set_dosattr = false;
1407 __u64 mode = 0xFFFFFFFFFFFFFFFFULL; 1407 __u64 mode = 0xFFFFFFFFFFFFFFFFULL;
1408 __u64 uid = 0xFFFFFFFFFFFFFFFFULL; 1408 __u64 uid = 0xFFFFFFFFFFFFFFFFULL;
1409 __u64 gid = 0xFFFFFFFFFFFFFFFFULL; 1409 __u64 gid = 0xFFFFFFFFFFFFFFFFULL;
@@ -1464,7 +1464,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1464 __u16 nfid = open_file->netfid; 1464 __u16 nfid = open_file->netfid;
1465 __u32 npid = open_file->pid; 1465 __u32 npid = open_file->pid;
1466 rc = CIFSSMBSetFileSize(xid, pTcon, attrs->ia_size, 1466 rc = CIFSSMBSetFileSize(xid, pTcon, attrs->ia_size,
1467 nfid, npid, FALSE); 1467 nfid, npid, false);
1468 atomic_dec(&open_file->wrtPending); 1468 atomic_dec(&open_file->wrtPending);
1469 cFYI(1, ("SetFSize for attrs rc = %d", rc)); 1469 cFYI(1, ("SetFSize for attrs rc = %d", rc));
1470 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) { 1470 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
@@ -1484,14 +1484,14 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1484 it was found or because there was an error setting 1484 it was found or because there was an error setting
1485 it by handle */ 1485 it by handle */
1486 rc = CIFSSMBSetEOF(xid, pTcon, full_path, 1486 rc = CIFSSMBSetEOF(xid, pTcon, full_path,
1487 attrs->ia_size, FALSE, 1487 attrs->ia_size, false,
1488 cifs_sb->local_nls, 1488 cifs_sb->local_nls,
1489 cifs_sb->mnt_cifs_flags & 1489 cifs_sb->mnt_cifs_flags &
1490 CIFS_MOUNT_MAP_SPECIAL_CHR); 1490 CIFS_MOUNT_MAP_SPECIAL_CHR);
1491 cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc)); 1491 cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc));
1492 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) { 1492 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
1493 __u16 netfid; 1493 __u16 netfid;
1494 int oplock = FALSE; 1494 int oplock = 0;
1495 1495
1496 rc = SMBLegacyOpen(xid, pTcon, full_path, 1496 rc = SMBLegacyOpen(xid, pTcon, full_path,
1497 FILE_OPEN, 1497 FILE_OPEN,
@@ -1516,7 +1516,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1516 1516
1517 /* Server is ok setting allocation size implicitly - no need 1517 /* Server is ok setting allocation size implicitly - no need
1518 to call: 1518 to call:
1519 CIFSSMBSetEOF(xid, pTcon, full_path, attrs->ia_size, TRUE, 1519 CIFSSMBSetEOF(xid, pTcon, full_path, attrs->ia_size, true,
1520 cifs_sb->local_nls); 1520 cifs_sb->local_nls);
1521 */ 1521 */
1522 1522
@@ -1564,7 +1564,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1564#endif 1564#endif
1565 /* not writeable */ 1565 /* not writeable */
1566 if ((cifsInode->cifsAttrs & ATTR_READONLY) == 0) { 1566 if ((cifsInode->cifsAttrs & ATTR_READONLY) == 0) {
1567 set_dosattr = TRUE; 1567 set_dosattr = true;
1568 time_buf.Attributes = 1568 time_buf.Attributes =
1569 cpu_to_le32(cifsInode->cifsAttrs | 1569 cpu_to_le32(cifsInode->cifsAttrs |
1570 ATTR_READONLY); 1570 ATTR_READONLY);
@@ -1574,28 +1574,24 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1574 not be able to write to it - so if any write 1574 not be able to write to it - so if any write
1575 bit is enabled for user or group or other we 1575 bit is enabled for user or group or other we
1576 need to at least try to remove r/o dos attr */ 1576 need to at least try to remove r/o dos attr */
1577 set_dosattr = TRUE; 1577 set_dosattr = true;
1578 time_buf.Attributes = cpu_to_le32(cifsInode->cifsAttrs & 1578 time_buf.Attributes = cpu_to_le32(cifsInode->cifsAttrs &
1579 (~ATTR_READONLY)); 1579 (~ATTR_READONLY));
1580 /* Windows ignores set to zero */ 1580 /* Windows ignores set to zero */
1581 if (time_buf.Attributes == 0) 1581 if (time_buf.Attributes == 0)
1582 time_buf.Attributes |= cpu_to_le32(ATTR_NORMAL); 1582 time_buf.Attributes |= cpu_to_le32(ATTR_NORMAL);
1583 } 1583 }
1584#ifdef CONFIG_CIFS_EXPERIMENTAL
1585 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL)
1586 mode_to_acl(direntry->d_inode, full_path, mode);
1587#endif
1588 } 1584 }
1589 1585
1590 if (attrs->ia_valid & ATTR_ATIME) { 1586 if (attrs->ia_valid & ATTR_ATIME) {
1591 set_time = TRUE; 1587 set_time = true;
1592 time_buf.LastAccessTime = 1588 time_buf.LastAccessTime =
1593 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_atime)); 1589 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_atime));
1594 } else 1590 } else
1595 time_buf.LastAccessTime = 0; 1591 time_buf.LastAccessTime = 0;
1596 1592
1597 if (attrs->ia_valid & ATTR_MTIME) { 1593 if (attrs->ia_valid & ATTR_MTIME) {
1598 set_time = TRUE; 1594 set_time = true;
1599 time_buf.LastWriteTime = 1595 time_buf.LastWriteTime =
1600 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_mtime)); 1596 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_mtime));
1601 } else 1597 } else
@@ -1606,7 +1602,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1606 server times */ 1602 server times */
1607 1603
1608 if (set_time && (attrs->ia_valid & ATTR_CTIME)) { 1604 if (set_time && (attrs->ia_valid & ATTR_CTIME)) {
1609 set_time = TRUE; 1605 set_time = true;
1610 /* Although Samba throws this field away 1606 /* Although Samba throws this field away
1611 it may be useful to Windows - but we do 1607 it may be useful to Windows - but we do
1612 not want to set ctime unless some other 1608 not want to set ctime unless some other
@@ -1630,7 +1626,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1630 rc = -EOPNOTSUPP; 1626 rc = -EOPNOTSUPP;
1631 1627
1632 if (rc == -EOPNOTSUPP) { 1628 if (rc == -EOPNOTSUPP) {
1633 int oplock = FALSE; 1629 int oplock = 0;
1634 __u16 netfid; 1630 __u16 netfid;
1635 1631
1636 cFYI(1, ("calling SetFileInfo since SetPathInfo for " 1632 cFYI(1, ("calling SetFileInfo since SetPathInfo for "
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index d4e7ec93285f..1c2c3ce5020b 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -230,7 +230,7 @@ cifs_readlink(struct dentry *direntry, char __user *pBuffer, int buflen)
230 struct inode *inode = direntry->d_inode; 230 struct inode *inode = direntry->d_inode;
231 int rc = -EACCES; 231 int rc = -EACCES;
232 int xid; 232 int xid;
233 int oplock = FALSE; 233 int oplock = 0;
234 struct cifs_sb_info *cifs_sb; 234 struct cifs_sb_info *cifs_sb;
235 struct cifsTconInfo *pTcon; 235 struct cifsTconInfo *pTcon;
236 char *full_path = NULL; 236 char *full_path = NULL;
diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c
index 2a42d9fedbb2..1d69b8014e0b 100644
--- a/fs/cifs/misc.c
+++ b/fs/cifs/misc.c
@@ -496,7 +496,8 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
496 } 496 }
497 return 0; 497 return 0;
498} 498}
499int 499
500bool
500is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv) 501is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
501{ 502{
502 struct smb_com_lock_req *pSMB = (struct smb_com_lock_req *)buf; 503 struct smb_com_lock_req *pSMB = (struct smb_com_lock_req *)buf;
@@ -522,17 +523,17 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
522 pnotify->Action)); /* BB removeme BB */ 523 pnotify->Action)); /* BB removeme BB */
523 /* cifs_dump_mem("Rcvd notify Data: ",buf, 524 /* cifs_dump_mem("Rcvd notify Data: ",buf,
524 sizeof(struct smb_hdr)+60); */ 525 sizeof(struct smb_hdr)+60); */
525 return TRUE; 526 return true;
526 } 527 }
527 if (pSMBr->hdr.Status.CifsError) { 528 if (pSMBr->hdr.Status.CifsError) {
528 cFYI(1, ("notify err 0x%d", 529 cFYI(1, ("notify err 0x%d",
529 pSMBr->hdr.Status.CifsError)); 530 pSMBr->hdr.Status.CifsError));
530 return TRUE; 531 return true;
531 } 532 }
532 return FALSE; 533 return false;
533 } 534 }
534 if (pSMB->hdr.Command != SMB_COM_LOCKING_ANDX) 535 if (pSMB->hdr.Command != SMB_COM_LOCKING_ANDX)
535 return FALSE; 536 return false;
536 if (pSMB->hdr.Flags & SMBFLG_RESPONSE) { 537 if (pSMB->hdr.Flags & SMBFLG_RESPONSE) {
537 /* no sense logging error on invalid handle on oplock 538 /* no sense logging error on invalid handle on oplock
538 break - harmless race between close request and oplock 539 break - harmless race between close request and oplock
@@ -541,21 +542,21 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
541 if ((NT_STATUS_INVALID_HANDLE) == 542 if ((NT_STATUS_INVALID_HANDLE) ==
542 le32_to_cpu(pSMB->hdr.Status.CifsError)) { 543 le32_to_cpu(pSMB->hdr.Status.CifsError)) {
543 cFYI(1, ("invalid handle on oplock break")); 544 cFYI(1, ("invalid handle on oplock break"));
544 return TRUE; 545 return true;
545 } else if (ERRbadfid == 546 } else if (ERRbadfid ==
546 le16_to_cpu(pSMB->hdr.Status.DosError.Error)) { 547 le16_to_cpu(pSMB->hdr.Status.DosError.Error)) {
547 return TRUE; 548 return true;
548 } else { 549 } else {
549 return FALSE; /* on valid oplock brk we get "request" */ 550 return false; /* on valid oplock brk we get "request" */
550 } 551 }
551 } 552 }
552 if (pSMB->hdr.WordCount != 8) 553 if (pSMB->hdr.WordCount != 8)
553 return FALSE; 554 return false;
554 555
555 cFYI(1, ("oplock type 0x%d level 0x%d", 556 cFYI(1, ("oplock type 0x%d level 0x%d",
556 pSMB->LockType, pSMB->OplockLevel)); 557 pSMB->LockType, pSMB->OplockLevel));
557 if (!(pSMB->LockType & LOCKING_ANDX_OPLOCK_RELEASE)) 558 if (!(pSMB->LockType & LOCKING_ANDX_OPLOCK_RELEASE))
558 return FALSE; 559 return false;
559 560
560 /* look up tcon based on tid & uid */ 561 /* look up tcon based on tid & uid */
561 read_lock(&GlobalSMBSeslock); 562 read_lock(&GlobalSMBSeslock);
@@ -573,11 +574,11 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
573 ("file id match, oplock break")); 574 ("file id match, oplock break"));
574 pCifsInode = 575 pCifsInode =
575 CIFS_I(netfile->pInode); 576 CIFS_I(netfile->pInode);
576 pCifsInode->clientCanCacheAll = FALSE; 577 pCifsInode->clientCanCacheAll = false;
577 if (pSMB->OplockLevel == 0) 578 if (pSMB->OplockLevel == 0)
578 pCifsInode->clientCanCacheRead 579 pCifsInode->clientCanCacheRead
579 = FALSE; 580 = false;
580 pCifsInode->oplockPending = TRUE; 581 pCifsInode->oplockPending = true;
581 AllocOplockQEntry(netfile->pInode, 582 AllocOplockQEntry(netfile->pInode,
582 netfile->netfid, 583 netfile->netfid,
583 tcon); 584 tcon);
@@ -585,17 +586,17 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
585 ("about to wake up oplock thread")); 586 ("about to wake up oplock thread"));
586 if (oplockThread) 587 if (oplockThread)
587 wake_up_process(oplockThread); 588 wake_up_process(oplockThread);
588 return TRUE; 589 return true;
589 } 590 }
590 } 591 }
591 read_unlock(&GlobalSMBSeslock); 592 read_unlock(&GlobalSMBSeslock);
592 cFYI(1, ("No matching file for oplock break")); 593 cFYI(1, ("No matching file for oplock break"));
593 return TRUE; 594 return true;
594 } 595 }
595 } 596 }
596 read_unlock(&GlobalSMBSeslock); 597 read_unlock(&GlobalSMBSeslock);
597 cFYI(1, ("Can not process oplock break for non-existent connection")); 598 cFYI(1, ("Can not process oplock break for non-existent connection"));
598 return TRUE; 599 return true;
599} 600}
600 601
601void 602void
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c
index 3b5a5ce882b6..00f4cff400b3 100644
--- a/fs/cifs/netmisc.c
+++ b/fs/cifs/netmisc.c
@@ -132,47 +132,17 @@ static const struct smb_to_posix_error mapping_table_ERRHRD[] = {
132 {0, 0} 132 {0, 0}
133}; 133};
134 134
135
136/* if the mount helper is missing we need to reverse the 1st slash
137 from '/' to backslash in order to format the UNC properly for
138 ip address parsing and for tree connect (unless the user
139 remembered to put the UNC name in properly). Fortunately we do
140 not have to call this twice (we check for IPv4 addresses
141 first, so it is already converted by the time we
142 try IPv6 addresses */
143static int canonicalize_unc(char *cp)
144{
145 int i;
146
147 for (i = 0; i <= 46 /* INET6_ADDRSTRLEN */ ; i++) {
148 if (cp[i] == 0)
149 break;
150 if (cp[i] == '\\')
151 break;
152 if (cp[i] == '/') {
153 cFYI(DBG2, ("change slash to \\ in malformed UNC"));
154 cp[i] = '\\';
155 return 1;
156 }
157 }
158 return 0;
159}
160
161/* Convert string containing dotted ip address to binary form */ 135/* Convert string containing dotted ip address to binary form */
162/* returns 0 if invalid address */ 136/* returns 0 if invalid address */
163 137
164int 138int
165cifs_inet_pton(int address_family, char *cp, void *dst) 139cifs_inet_pton(const int address_family, const char *cp, void *dst)
166{ 140{
167 int ret = 0; 141 int ret = 0;
168 142
169 /* calculate length by finding first slash or NULL */ 143 /* calculate length by finding first slash or NULL */
170 if (address_family == AF_INET) { 144 if (address_family == AF_INET) {
171 ret = in4_pton(cp, -1 /* len */, dst, '\\', NULL); 145 ret = in4_pton(cp, -1 /* len */, dst, '\\', NULL);
172 if (ret == 0) {
173 if (canonicalize_unc(cp))
174 ret = in4_pton(cp, -1, dst, '\\', NULL);
175 }
176 } else if (address_family == AF_INET6) { 146 } else if (address_family == AF_INET6) {
177 ret = in6_pton(cp, -1 /* len */, dst , '\\', NULL); 147 ret = in6_pton(cp, -1 /* len */, dst , '\\', NULL);
178 } 148 }
diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c
index 32b445edc882..34ec32100c72 100644
--- a/fs/cifs/readdir.c
+++ b/fs/cifs/readdir.c
@@ -447,8 +447,8 @@ static int initiate_cifs_search(const int xid, struct file *file)
447 if (file->private_data == NULL) 447 if (file->private_data == NULL)
448 return -ENOMEM; 448 return -ENOMEM;
449 cifsFile = file->private_data; 449 cifsFile = file->private_data;
450 cifsFile->invalidHandle = TRUE; 450 cifsFile->invalidHandle = true;
451 cifsFile->srch_inf.endOfSearch = FALSE; 451 cifsFile->srch_inf.endOfSearch = false;
452 452
453 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb); 453 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
454 if (cifs_sb == NULL) 454 if (cifs_sb == NULL)
@@ -485,7 +485,7 @@ ffirst_retry:
485 cifs_sb->mnt_cifs_flags & 485 cifs_sb->mnt_cifs_flags &
486 CIFS_MOUNT_MAP_SPECIAL_CHR, CIFS_DIR_SEP(cifs_sb)); 486 CIFS_MOUNT_MAP_SPECIAL_CHR, CIFS_DIR_SEP(cifs_sb));
487 if (rc == 0) 487 if (rc == 0)
488 cifsFile->invalidHandle = FALSE; 488 cifsFile->invalidHandle = false;
489 if ((rc == -EOPNOTSUPP) && 489 if ((rc == -EOPNOTSUPP) &&
490 (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)) { 490 (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)) {
491 cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM; 491 cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM;
@@ -670,7 +670,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
670 (index_to_find < first_entry_in_buffer)) { 670 (index_to_find < first_entry_in_buffer)) {
671 /* close and restart search */ 671 /* close and restart search */
672 cFYI(1, ("search backing up - close and restart search")); 672 cFYI(1, ("search backing up - close and restart search"));
673 cifsFile->invalidHandle = TRUE; 673 cifsFile->invalidHandle = true;
674 CIFSFindClose(xid, pTcon, cifsFile->netfid); 674 CIFSFindClose(xid, pTcon, cifsFile->netfid);
675 kfree(cifsFile->search_resume_name); 675 kfree(cifsFile->search_resume_name);
676 cifsFile->search_resume_name = NULL; 676 cifsFile->search_resume_name = NULL;
@@ -692,7 +692,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
692 } 692 }
693 693
694 while ((index_to_find >= cifsFile->srch_inf.index_of_last_entry) && 694 while ((index_to_find >= cifsFile->srch_inf.index_of_last_entry) &&
695 (rc == 0) && (cifsFile->srch_inf.endOfSearch == FALSE)) { 695 (rc == 0) && !cifsFile->srch_inf.endOfSearch) {
696 cFYI(1, ("calling findnext2")); 696 cFYI(1, ("calling findnext2"));
697 rc = CIFSFindNext(xid, pTcon, cifsFile->netfid, 697 rc = CIFSFindNext(xid, pTcon, cifsFile->netfid,
698 &cifsFile->srch_inf); 698 &cifsFile->srch_inf);
@@ -1038,7 +1038,7 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
1038 break; 1038 break;
1039 } 1039 }
1040 } /* else { 1040 } /* else {
1041 cifsFile->invalidHandle = TRUE; 1041 cifsFile->invalidHandle = true;
1042 CIFSFindClose(xid, pTcon, cifsFile->netfid); 1042 CIFSFindClose(xid, pTcon, cifsFile->netfid);
1043 } 1043 }
1044 kfree(cifsFile->search_resume_name); 1044 kfree(cifsFile->search_resume_name);
diff --git a/fs/cifs/smbencrypt.c b/fs/cifs/smbencrypt.c
index 58bbfd992cc0..ff3232fa1015 100644
--- a/fs/cifs/smbencrypt.c
+++ b/fs/cifs/smbencrypt.c
@@ -35,11 +35,11 @@
35#include "cifs_debug.h" 35#include "cifs_debug.h"
36#include "cifsencrypt.h" 36#include "cifsencrypt.h"
37 37
38#ifndef FALSE 38#ifndef false
39#define FALSE 0 39#define false 0
40#endif 40#endif
41#ifndef TRUE 41#ifndef true
42#define TRUE 1 42#define true 1
43#endif 43#endif
44 44
45/* following came from the other byteorder.h to avoid include conflicts */ 45/* following came from the other byteorder.h to avoid include conflicts */
diff --git a/fs/cifs/xattr.c b/fs/cifs/xattr.c
index 8cd6a445b017..e9527eedc639 100644
--- a/fs/cifs/xattr.c
+++ b/fs/cifs/xattr.c
@@ -264,7 +264,7 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
264#ifdef CONFIG_CIFS_EXPERIMENTAL 264#ifdef CONFIG_CIFS_EXPERIMENTAL
265 else if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) { 265 else if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) {
266 __u16 fid; 266 __u16 fid;
267 int oplock = FALSE; 267 int oplock = 0;
268 struct cifs_ntsd *pacl = NULL; 268 struct cifs_ntsd *pacl = NULL;
269 __u32 buflen = 0; 269 __u32 buflen = 0;
270 if (experimEnabled) 270 if (experimEnabled)
diff --git a/include/asm-arm/arch-pxa/pm.h b/include/asm-arm/arch-pxa/pm.h
index 9d9f4b54b2ce..261e5bc958db 100644
--- a/include/asm-arm/arch-pxa/pm.h
+++ b/include/asm-arm/arch-pxa/pm.h
@@ -10,7 +10,7 @@
10#include <linux/suspend.h> 10#include <linux/suspend.h>
11 11
12struct pxa_cpu_pm_fns { 12struct pxa_cpu_pm_fns {
13 int save_size; 13 int save_count;
14 void (*save)(unsigned long *); 14 void (*save)(unsigned long *);
15 void (*restore)(unsigned long *); 15 void (*restore)(unsigned long *);
16 int (*valid)(suspend_state_t state); 16 int (*valid)(suspend_state_t state);
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h
index a758a719180f..9aa6c2e939e8 100644
--- a/include/asm-arm/arch-pxa/system.h
+++ b/include/asm-arm/arch-pxa/system.h
@@ -22,7 +22,8 @@ static inline void arch_idle(void)
22 22
23static inline void arch_reset(char mode) 23static inline void arch_reset(char mode)
24{ 24{
25 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; 25 if (cpu_is_pxa2xx())
26 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
26 27
27 if (mode == 's') { 28 if (mode == 's') {
28 /* Jump into ROM at address 0 */ 29 /* Jump into ROM at address 0 */
diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h
index 686cf83a5269..7f34cd384f12 100644
--- a/include/asm-blackfin/dpmc.h
+++ b/include/asm-blackfin/dpmc.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power 2 * include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power
3 * Management Controller Driver. 3 * Management Controller Driver.
4 * Copyright (C) 2004 Analog Device Inc. 4 * Copyright (C) 2004-2008 Analog Device Inc.
5 * 5 *
6 */ 6 */
7#ifndef _BLACKFIN_DPMC_H_ 7#ifndef _BLACKFIN_DPMC_H_
@@ -65,6 +65,14 @@ void disable_wdog_timer(void);
65extern unsigned long get_cclk(void); 65extern unsigned long get_cclk(void);
66extern unsigned long get_sclk(void); 66extern unsigned long get_sclk(void);
67 67
68struct bfin_dpmc_platform_data {
69 const unsigned int *tuple_tab;
70 unsigned short tabsize;
71 unsigned short vr_settling_time; /* in us */
72};
73
74#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
75
68#endif /* __KERNEL__ */ 76#endif /* __KERNEL__ */
69 77
70#endif /*_BLACKFIN_DPMC_H_*/ 78#endif /*_BLACKFIN_DPMC_H_*/
diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h
index 562c6d3a3232..c4f721e0d00d 100644
--- a/include/asm-blackfin/entry.h
+++ b/include/asm-blackfin/entry.h
@@ -17,6 +17,11 @@
17#define PF_DTRACE_OFF 1 17#define PF_DTRACE_OFF 1
18#define PF_DTRACE_BIT 5 18#define PF_DTRACE_BIT 5
19 19
20/*
21 * NOTE! The single-stepping code assumes that all interrupt handlers
22 * start by saving SYSCFG on the stack with their first instruction.
23 */
24
20/* This one is used for exceptions, emulation, and NMI. It doesn't push 25/* This one is used for exceptions, emulation, and NMI. It doesn't push
21 RETI and doesn't do cli. */ 26 RETI and doesn't do cli. */
22#define SAVE_ALL_SYS save_context_no_interrupts 27#define SAVE_ALL_SYS save_context_no_interrupts
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index f0ab2736a680..26e3c8076b4e 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 44#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
45#define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) 45#define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v)
46#define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) 46#define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v)
47#define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) 49#define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v)
48#define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) 50#define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
49#define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) 51#define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53 58
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index fbe88dee3e2d..d016603b6615 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#ifdef CONFIG_BFIN_UART0_CTSRTS 56#ifdef CONFIG_BFIN_UART0_CTSRTS
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53# ifndef CONFIG_UART0_CTS_PIN 58# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 17e1548cec08..0ab4dd7494cf 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -468,6 +468,8 @@
468#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ 468#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
469#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ 469#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
470#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ 470#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
471#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
472#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
471 473
472#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ 474#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
473#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ 475#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h
index 832e6f6122da..5aa38e5da6b7 100644
--- a/include/asm-blackfin/mach-bf533/irq.h
+++ b/include/asm-blackfin/mach-bf533/irq.h
@@ -66,12 +66,13 @@ Core Emulation **
66 DMA8/9 Interrupt IVG13 28 66 DMA8/9 Interrupt IVG13 28
67 DMA10/11 Interrupt IVG13 29 67 DMA10/11 Interrupt IVG13 29
68 Watchdog Timer IVG13 30 68 Watchdog Timer IVG13 30
69 Software Interrupt 1 IVG14 31 69
70 Software Interrupt 2 -- 70 Softirq IVG14 31
71 System Call --
71 (lowest priority) IVG15 32 * 72 (lowest priority) IVG15 32 *
72 */ 73 */
73#define SYS_IRQS 32 74#define SYS_IRQS 31
74#define NR_PERI_INTS 24 75#define NR_PERI_INTS 24
75 76
76/* The ABSTRACT IRQ definitions */ 77/* The ABSTRACT IRQ definitions */
77/** the first seven of the following are fixed, the rest you change if you need to **/ 78/** the first seven of the following are fixed, the rest you change if you need to **/
@@ -96,7 +97,7 @@ Core Emulation **
96#define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ 97#define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */
97#define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ 98#define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */
98#define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ 99#define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */
99#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ 100#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */
100#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ 101#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */
101#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ 102#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */
102#define IRQ_TMR0 23 /*Timer 0 */ 103#define IRQ_TMR0 23 /*Timer 0 */
@@ -108,9 +109,6 @@ Core Emulation **
108#define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */ 109#define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */
109#define IRQ_WATCH 30 /*Watch Dog Timer */ 110#define IRQ_WATCH 30 /*Watch Dog Timer */
110 111
111#define IRQ_SW_INT1 31 /*Software Int 1 */
112#define IRQ_SW_INT2 32 /*Software Int 2 (reserved for SYSCALL) */
113
114#define IRQ_PF0 33 112#define IRQ_PF0 33
115#define IRQ_PF1 34 113#define IRQ_PF1 34
116#define IRQ_PF2 35 114#define IRQ_PF2 35
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index fd100a415b98..f79d1a0e9129 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53 58
diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h
index be6f2ff77f31..2e68a8a1e730 100644
--- a/include/asm-blackfin/mach-bf537/irq.h
+++ b/include/asm-blackfin/mach-bf537/irq.h
@@ -34,24 +34,23 @@
34 34
35/* 35/*
36 * Interrupt source definitions 36 * Interrupt source definitions
37 Event Source Core Event Name 37 * Event Source Core Event Name
38Core Emulation ** 38 * Core Emulation **
39 Events (highest priority) EMU 0 39 * Events (highest priority) EMU 0
40 Reset RST 1 40 * Reset RST 1
41 NMI NMI 2 41 * NMI NMI 2
42 Exception EVX 3 42 * Exception EVX 3
43 Reserved -- 4 43 * Reserved -- 4
44 Hardware Error IVHW 5 44 * Hardware Error IVHW 5
45 Core Timer IVTMR 6 * 45 * Core Timer IVTMR 6
46 46 * .....
47..... 47 *
48 48 * Softirq IVG14
49 Software Interrupt 1 IVG14 31 49 * System Call --
50 Software Interrupt 2 -- 50 * (lowest priority) IVG15
51 (lowest priority) IVG15 32 *
52 */ 51 */
53 52
54#define SYS_IRQS 41 53#define SYS_IRQS 39
55#define NR_PERI_INTS 32 54#define NR_PERI_INTS 32
56 55
57/* The ABSTRACT IRQ definitions */ 56/* The ABSTRACT IRQ definitions */
@@ -95,10 +94,8 @@ Core Emulation **
95#define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */ 94#define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */
96#define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */ 95#define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */
97#define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */ 96#define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */
98#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ 97#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */
99#define IRQ_WATCH 38 /*Watch Dog Timer */ 98#define IRQ_WATCH 38 /*Watch Dog Timer */
100#define IRQ_SW_INT1 40 /*Software Int 1 */
101#define IRQ_SW_INT2 41 /*Software Int 2 (reserved for SYSCALL) */
102 99
103#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ 100#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */
104#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ 101#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 6547027cd3e6..5eb46a77d919 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -54,6 +54,9 @@
54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v) 55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
56 56
57#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
58#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
59
57#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 60#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
58# define CONFIG_SERIAL_BFIN_CTSRTS 61# define CONFIG_SERIAL_BFIN_CTSRTS
59 62
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index 08f90c21fe8a..e022e896cb18 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -2329,6 +2329,26 @@
2329#define KPADWE 0x1000 /* Keypad Wake-Up Enable */ 2329#define KPADWE 0x1000 /* Keypad Wake-Up Enable */
2330#define ROTWE 0x2000 /* Rotary Wake-Up Enable */ 2330#define ROTWE 0x2000 /* Rotary Wake-Up Enable */
2331 2331
2332#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
2333#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
2334#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
2335
2336#define GAIN_5 0x0000 /* GAIN = 5*/
2337#define GAIN_10 0x0004 /* GAIN = 1*/
2338#define GAIN_20 0x0008 /* GAIN = 2*/
2339#define GAIN_50 0x000C /* GAIN = 5*/
2340
2341#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
2342#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
2343#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
2344#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
2345#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
2346#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
2347#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
2348#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
2349#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
2350#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
2351
2332/* Bit masks for NFC_CTL */ 2352/* Bit masks for NFC_CTL */
2333 2353
2334#define WR_DLY 0xf /* Write Strobe Delay */ 2354#define WR_DLY 0xf /* Write Strobe Delay */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 8a4e66d1db37..7a9628769296 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -44,10 +44,15 @@
44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 44#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 45#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 46#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
47#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
47#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 49#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
48#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 50#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
49#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 51#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
50 52
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55
51#ifdef CONFIG_BFIN_UART0_CTSRTS 56#ifdef CONFIG_BFIN_UART0_CTSRTS
52# define CONFIG_SERIAL_BFIN_CTSRTS 57# define CONFIG_SERIAL_BFIN_CTSRTS
53# ifndef CONFIG_UART0_CTS_PIN 58# ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 366c9b9a0cb7..1ab50e906fe7 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -868,6 +868,34 @@
868#define CHIPID_FAMILY 0x0FFFF000 868#define CHIPID_FAMILY 0x0FFFF000
869#define CHIPID_MANUFACTURE 0x00000FFE 869#define CHIPID_MANUFACTURE 0x00000FFE
870 870
871/* VR_CTL Masks */
872#define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */
873#define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */
874#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */
875#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */
876#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */
877
878#define GAIN 0x000C /* Voltage Level Gain */
879#define GAIN_5 0x0000 /* GAIN = 5*/
880#define GAIN_10 0x0004 /* GAIN = 1*/
881#define GAIN_20 0x0008 /* GAIN = 2*/
882#define GAIN_50 0x000C /* GAIN = 5*/
883
884#define VLEV 0x00F0 /* Internal Voltage Level */
885#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
886#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
887#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
888#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
889#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
890#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
891#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
892#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
893#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
894#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
895
896#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
897#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
898
871/* PLL_DIV Masks */ 899/* PLL_DIV Masks */
872#define SCLK_DIV(x) (x) /* SCLK = VCO / x */ 900#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
873 901
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h
index 83f0383957d2..6698389c5564 100644
--- a/include/asm-blackfin/mach-bf561/irq.h
+++ b/include/asm-blackfin/mach-bf561/irq.h
@@ -118,12 +118,13 @@
118 Supplemental interrupt 0 IVG7 69 118 Supplemental interrupt 0 IVG7 69
119 supplemental interrupt 1 IVG7 70 119 supplemental interrupt 1 IVG7 70
120 120
121 Software Interrupt 1 IVG14 71 121 Softirq IVG14
122 Software Interrupt 2 IVG15 72 * 122 System Call --
123 (lowest priority) 123 (lowest priority) IVG15
124
124 **********************************************************************/ 125 **********************************************************************/
125 126
126#define SYS_IRQS 72 127#define SYS_IRQS 71
127#define NR_PERI_INTS 64 128#define NR_PERI_INTS 64
128 129
129/* 130/*
@@ -237,9 +238,7 @@
237#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ 238#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */
238#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ 239#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */
239#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ 240#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */
240#define IRQ_SW_INT1 71 /* Software Interrupt 1 */ 241
241#define IRQ_SW_INT2 72 /* Software Interrupt 2 */
242 /* reserved for SYSCALL */
243#define IRQ_PF0 73 242#define IRQ_PF0 73
244#define IRQ_PF1 74 243#define IRQ_PF1 74
245#define IRQ_PF2 75 244#define IRQ_PF2 75
diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S
index fd0ebe1862b8..c0e630edfb9a 100644
--- a/include/asm-blackfin/mach-common/context.S
+++ b/include/asm-blackfin/mach-common/context.S
@@ -28,6 +28,11 @@
28 */ 28 */
29 29
30/* 30/*
31 * NOTE! The single-stepping code assumes that all interrupt handlers
32 * start by saving SYSCFG on the stack with their first instruction.
33 */
34
35/*
31 * Code to save processor context. 36 * Code to save processor context.
32 * We even save the register which are preserved by a function call 37 * We even save the register which are preserved by a function call
33 * - r4, r5, r6, r7, p3, p4, p5 38 * - r4, r5, r6, r7, p3, p4, p5
diff --git a/include/asm-blackfin/time.h b/include/asm-blackfin/time.h
index 6e5859b6ea32..ddc43ce38533 100644
--- a/include/asm-blackfin/time.h
+++ b/include/asm-blackfin/time.h
@@ -24,6 +24,8 @@
24 24
25#ifndef CONFIG_CPU_FREQ 25#ifndef CONFIG_CPU_FREQ
26#define TIME_SCALE 1 26#define TIME_SCALE 1
27#define __bfin_cycles_off (0)
28#define __bfin_cycles_mod (0)
27#else 29#else
28/* 30/*
29 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . 31 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
@@ -31,6 +33,8 @@
31 * adjust the Core Timer Presale Register. This way we don't lose time. 33 * adjust the Core Timer Presale Register. This way we don't lose time.
32 */ 34 */
33#define TIME_SCALE 4 35#define TIME_SCALE 4
36extern unsigned long long __bfin_cycles_off;
37extern unsigned int __bfin_cycles_mod;
34#endif 38#endif
35 39
36#endif 40#endif
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index 7c97b5a08d08..c08e714d0c42 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -209,6 +209,13 @@ extern int icache_44x_need_flush;
209 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 209 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
210 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR 210 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
211 * 211 *
212 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
213 * TLB2 storage attibute fields. Those are:
214 *
215 * TLB2:
216 * 0...10 11 12 13 14 15 16...31
217 * no change WL1 IL1I IL1D IL2I IL2D no change
218 *
212 * There are some constrains and options, to decide mapping software bits 219 * There are some constrains and options, to decide mapping software bits
213 * into TLB entry. 220 * into TLB entry.
214 * 221 *
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index e3c845b0f764..6abead6e681a 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -100,6 +100,7 @@
100 100
101/* Flag indicating progress during context switch. */ 101/* Flag indicating progress during context switch. */
102#define SPU_CONTEXT_SWITCH_PENDING 0UL 102#define SPU_CONTEXT_SWITCH_PENDING 0UL
103#define SPU_CONTEXT_FAULT_PENDING 1UL
103 104
104struct spu_context; 105struct spu_context;
105struct spu_runqueue; 106struct spu_runqueue;
@@ -128,9 +129,11 @@ struct spu {
128 unsigned int irqs[3]; 129 unsigned int irqs[3];
129 u32 node; 130 u32 node;
130 u64 flags; 131 u64 flags;
131 u64 dar;
132 u64 dsisr;
133 u64 class_0_pending; 132 u64 class_0_pending;
133 u64 class_0_dar;
134 u64 class_0_dsisr;
135 u64 class_1_dar;
136 u64 class_1_dsisr;
134 size_t ls_size; 137 size_t ls_size;
135 unsigned int slb_replace; 138 unsigned int slb_replace;
136 struct mm_struct *mm; 139 struct mm_struct *mm;
@@ -143,7 +146,7 @@ struct spu {
143 146
144 void (* wbox_callback)(struct spu *spu); 147 void (* wbox_callback)(struct spu *spu);
145 void (* ibox_callback)(struct spu *spu); 148 void (* ibox_callback)(struct spu *spu);
146 void (* stop_callback)(struct spu *spu); 149 void (* stop_callback)(struct spu *spu, int irq);
147 void (* mfc_callback)(struct spu *spu); 150 void (* mfc_callback)(struct spu *spu);
148 151
149 char irq_c0[8]; 152 char irq_c0[8];
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index 0ab6bff86078..129ec148d451 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -254,7 +254,8 @@ struct spu_state {
254 u64 spu_chnldata_RW[32]; 254 u64 spu_chnldata_RW[32];
255 u32 spu_mailbox_data[4]; 255 u32 spu_mailbox_data[4];
256 u32 pu_mailbox_data[1]; 256 u32 pu_mailbox_data[1];
257 u64 dar, dsisr, class_0_pending; 257 u64 class_0_dar, class_0_dsisr, class_0_pending;
258 u64 class_1_dar, class_1_dsisr;
258 unsigned long suspend_time; 259 unsigned long suspend_time;
259 spinlock_t register_lock; 260 spinlock_t register_lock;
260}; 261};
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h
index 092ff9d872c3..6813c3220a1d 100644
--- a/include/asm-sh/cpu-sh3/dma.h
+++ b/include/asm-sh/cpu-sh3/dma.h
@@ -3,19 +3,19 @@
3 3
4 4
5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 6 defined(CONFIG_CPU_SUBTYPE_SH7721)
7 defined(CONFIG_CPU_SUBTYPE_SH7709)
8#define SH_DMAC_BASE 0xa4010020 7#define SH_DMAC_BASE 0xa4010020
8#else
9#define SH_DMAC_BASE 0xa4000020
10#endif
9 11
12#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
10#define DMTE0_IRQ 48 13#define DMTE0_IRQ 48
11#define DMTE1_IRQ 49 14#define DMTE1_IRQ 49
12#define DMTE2_IRQ 50 15#define DMTE2_IRQ 50
13#define DMTE3_IRQ 51 16#define DMTE3_IRQ 51
14#define DMTE4_IRQ 76 17#define DMTE4_IRQ 76
15#define DMTE5_IRQ 77 18#define DMTE5_IRQ 77
16
17#else
18#define SH_DMAC_BASE 0xa4000020
19#endif 19#endif
20 20
21/* Definitions for the SuperH DMAC */ 21/* Definitions for the SuperH DMAC */
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index c958fdaa0095..7438d1e21bc9 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -79,6 +79,10 @@ struct intc_desc {
79 struct intc_sense_reg *sense_regs; 79 struct intc_sense_reg *sense_regs;
80 unsigned int nr_sense_regs; 80 unsigned int nr_sense_regs;
81 char *name; 81 char *name;
82#ifdef CONFIG_CPU_SH3
83 struct intc_mask_reg *ack_regs;
84 unsigned int nr_ack_regs;
85#endif
82}; 86};
83 87
84#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 88#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
@@ -91,10 +95,25 @@ struct intc_desc symbol __initdata = { \
91 chipname, \ 95 chipname, \
92} 96}
93 97
98#ifdef CONFIG_CPU_SH3
99#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
100 mask_regs, prio_regs, sense_regs, ack_regs) \
101struct intc_desc symbol __initdata = { \
102 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
103 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
104 _INTC_ARRAY(sense_regs), \
105 chipname, \
106 _INTC_ARRAY(ack_regs), \
107}
108#endif
109
94void __init register_intc_controller(struct intc_desc *desc); 110void __init register_intc_controller(struct intc_desc *desc);
95int intc_set_priority(unsigned int irq, unsigned int prio); 111int intc_set_priority(unsigned int irq, unsigned int prio);
96 112
97void __init plat_irq_setup(void); 113void __init plat_irq_setup(void);
114#ifdef CONFIG_CPU_SH3
115void __init plat_irq_setup_sh3(void);
116#endif
98 117
99enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, 118enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
100 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, 119 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index 356e50d06745..a4fbf0c84fb1 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -268,11 +268,6 @@ unsigned long long peek_real_address_q(unsigned long long addr);
268unsigned long long poke_real_address_q(unsigned long long addr, 268unsigned long long poke_real_address_q(unsigned long long addr,
269 unsigned long long val); 269 unsigned long long val);
270 270
271/* arch/sh/mm/ioremap_64.c */
272unsigned long onchip_remap(unsigned long addr, unsigned long size,
273 const char *name);
274extern void onchip_unmap(unsigned long vaddr);
275
276#if !defined(CONFIG_MMU) 271#if !defined(CONFIG_MMU)
277#define virt_to_phys(address) ((unsigned long)(address)) 272#define virt_to_phys(address) ((unsigned long)(address))
278#define phys_to_virt(address) ((void *)(address)) 273#define phys_to_virt(address) ((void *)(address))
@@ -302,9 +297,16 @@ extern void onchip_unmap(unsigned long vaddr);
302void __iomem *__ioremap(unsigned long offset, unsigned long size, 297void __iomem *__ioremap(unsigned long offset, unsigned long size,
303 unsigned long flags); 298 unsigned long flags);
304void __iounmap(void __iomem *addr); 299void __iounmap(void __iomem *addr);
300
301/* arch/sh/mm/ioremap_64.c */
302unsigned long onchip_remap(unsigned long addr, unsigned long size,
303 const char *name);
304extern void onchip_unmap(unsigned long vaddr);
305#else 305#else
306#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) 306#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
307#define __iounmap(addr) do { } while (0) 307#define __iounmap(addr) do { } while (0)
308#define onchip_remap(addr, size, name) (addr)
309#define onchip_unmap(addr) do { } while (0)
308#endif /* CONFIG_MMU */ 310#endif /* CONFIG_MMU */
309 311
310static inline void __iomem * 312static inline void __iomem *
diff --git a/include/asm-sh/keyboard.h b/include/asm-sh/keyboard.h
deleted file mode 100644
index 31dcc4fa5f28..000000000000
--- a/include/asm-sh/keyboard.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_SH_KEYBOARD_H
2#define __ASM_SH_KEYBOARD_H
3/*
4 * $Id: keyboard.h,v 1.1.1.1 2001/10/15 20:45:09 mrbrown Exp $
5 */
6
7#include <linux/kd.h>
8#include <asm/machvec.h>
9
10#ifdef CONFIG_SH_MPC1211
11#include <asm/mpc1211/keyboard-mpc1211.h>
12#endif
13#endif
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index fe58d00b250c..87e812f68bb0 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -27,6 +27,7 @@
27/* ASID is 8-bit value, so it can't be 0x100 */ 27/* ASID is 8-bit value, so it can't be 0x100 */
28#define MMU_NO_ASID 0x100 28#define MMU_NO_ASID 0x100
29 29
30#ifdef CONFIG_MMU
30#define asid_cache(cpu) (cpu_data[cpu].asid_cache) 31#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
31#define cpu_context(cpu, mm) ((mm)->context.id[cpu]) 32#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
32 33
@@ -38,7 +39,6 @@
38 */ 39 */
39#define MMU_VPN_MASK 0xfffff000 40#define MMU_VPN_MASK 0xfffff000
40 41
41#ifdef CONFIG_MMU
42#if defined(CONFIG_SUPERH32) 42#if defined(CONFIG_SUPERH32)
43#include "mmu_context_32.h" 43#include "mmu_context_32.h"
44#else 44#else
@@ -129,6 +129,8 @@ static inline void switch_mm(struct mm_struct *prev,
129#define destroy_context(mm) do { } while (0) 129#define destroy_context(mm) do { } while (0)
130#define set_asid(asid) do { } while (0) 130#define set_asid(asid) do { } while (0)
131#define get_asid() (0) 131#define get_asid() (0)
132#define cpu_asid(cpu, mm) ({ (void)cpu; 0; })
133#define switch_and_save_asid(asid) (0)
132#define set_TTB(pgd) do { } while (0) 134#define set_TTB(pgd) do { } while (0)
133#define get_TTB() (0) 135#define get_TTB() (0)
134#define activate_context(mm,cpu) do { } while (0) 136#define activate_context(mm,cpu) do { } while (0)
diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h
index 7969f381dff2..2969253c4042 100644
--- a/include/asm-sh/mmzone.h
+++ b/include/asm-sh/mmzone.h
@@ -41,6 +41,8 @@ void __init plat_mem_setup(void);
41 41
42/* arch/sh/kernel/setup.c */ 42/* arch/sh/kernel/setup.c */
43void __init setup_bootmem_allocator(unsigned long start_pfn); 43void __init setup_bootmem_allocator(unsigned long start_pfn);
44void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
45 unsigned long end_pfn);
44 46
45#endif /* __KERNEL__ */ 47#endif /* __KERNEL__ */
46#endif /* __ASM_SH_MMZONE_H */ 48#endif /* __ASM_SH_MMZONE_H */
diff --git a/include/asm-sh/mpc1211/dma.h b/include/asm-sh/mpc1211/dma.h
deleted file mode 100644
index e506d1aaa0d0..000000000000
--- a/include/asm-sh/mpc1211/dma.h
+++ /dev/null
@@ -1,303 +0,0 @@
1/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 */
7
8#ifndef _ASM_MPC1211_DMA_H
9#define _ASM_MPC1211_DMA_H
10
11#include <linux/spinlock.h> /* And spinlocks */
12#include <asm/io.h> /* need byte IO */
13#include <linux/delay.h>
14
15
16#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
17#define dma_outb outb_p
18#else
19#define dma_outb outb
20#endif
21
22#define dma_inb inb
23
24/*
25 * NOTES about DMA transfers:
26 *
27 * controller 1: channels 0-3, byte operations, ports 00-1F
28 * controller 2: channels 4-7, word operations, ports C0-DF
29 *
30 * - ALL registers are 8 bits only, regardless of transfer size
31 * - channel 4 is not used - cascades 1 into 2.
32 * - channels 0-3 are byte - addresses/counts are for physical bytes
33 * - channels 5-7 are word - addresses/counts are for physical words
34 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
35 * - transfer count loaded to registers is 1 less than actual count
36 * - controller 2 offsets are all even (2x offsets for controller 1)
37 * - page registers for 5-7 don't use data bit 0, represent 128K pages
38 * - page registers for 0-3 use bit 0, represent 64K pages
39 *
40 * DMA transfers are limited to the lower 16MB of _physical_ memory.
41 * Note that addresses loaded into registers must be _physical_ addresses,
42 * not logical addresses (which may differ if paging is active).
43 *
44 * Address mapping for channels 0-3:
45 *
46 * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
47 * | ... | | ... | | ... |
48 * | ... | | ... | | ... |
49 * | ... | | ... | | ... |
50 * P7 ... P0 A7 ... A0 A7 ... A0
51 * | Page | Addr MSB | Addr LSB | (DMA registers)
52 *
53 * Address mapping for channels 5-7:
54 *
55 * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
56 * | ... | \ \ ... \ \ \ ... \ \
57 * | ... | \ \ ... \ \ \ ... \ (not used)
58 * | ... | \ \ ... \ \ \ ... \
59 * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
60 * | Page | Addr MSB | Addr LSB | (DMA registers)
61 *
62 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
63 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
64 * the hardware level, so odd-byte transfers aren't possible).
65 *
66 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
67 * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
68 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
69 *
70 */
71
72#define MAX_DMA_CHANNELS 8
73
74/* The maximum address that we can perform a DMA transfer to on this platform */
75#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
76
77/* 8237 DMA controllers */
78#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
79#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
80
81/* DMA controller registers */
82#define DMA1_CMD_REG 0x08 /* command register (w) */
83#define DMA1_STAT_REG 0x08 /* status register (r) */
84#define DMA1_REQ_REG 0x09 /* request register (w) */
85#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
86#define DMA1_MODE_REG 0x0B /* mode register (w) */
87#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
88#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
89#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
90#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
91#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
92
93#define DMA2_CMD_REG 0xD0 /* command register (w) */
94#define DMA2_STAT_REG 0xD0 /* status register (r) */
95#define DMA2_REQ_REG 0xD2 /* request register (w) */
96#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
97#define DMA2_MODE_REG 0xD6 /* mode register (w) */
98#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
99#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
100#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
101#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
102#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
103
104#define DMA_ADDR_0 0x00 /* DMA address registers */
105#define DMA_ADDR_1 0x02
106#define DMA_ADDR_2 0x04
107#define DMA_ADDR_3 0x06
108#define DMA_ADDR_4 0xC0
109#define DMA_ADDR_5 0xC4
110#define DMA_ADDR_6 0xC8
111#define DMA_ADDR_7 0xCC
112
113#define DMA_CNT_0 0x01 /* DMA count registers */
114#define DMA_CNT_1 0x03
115#define DMA_CNT_2 0x05
116#define DMA_CNT_3 0x07
117#define DMA_CNT_4 0xC2
118#define DMA_CNT_5 0xC6
119#define DMA_CNT_6 0xCA
120#define DMA_CNT_7 0xCE
121
122#define DMA_PAGE_0 0x87 /* DMA page registers */
123#define DMA_PAGE_1 0x83
124#define DMA_PAGE_2 0x81
125#define DMA_PAGE_3 0x82
126#define DMA_PAGE_5 0x8B
127#define DMA_PAGE_6 0x89
128#define DMA_PAGE_7 0x8A
129
130#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
131#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
132#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
133
134#define DMA_AUTOINIT 0x10
135
136
137extern spinlock_t dma_spin_lock;
138
139static __inline__ unsigned long claim_dma_lock(void)
140{
141 unsigned long flags;
142 spin_lock_irqsave(&dma_spin_lock, flags);
143 return flags;
144}
145
146static __inline__ void release_dma_lock(unsigned long flags)
147{
148 spin_unlock_irqrestore(&dma_spin_lock, flags);
149}
150
151/* enable/disable a specific DMA channel */
152static __inline__ void enable_dma(unsigned int dmanr)
153{
154 if (dmanr<=3)
155 dma_outb(dmanr, DMA1_MASK_REG);
156 else
157 dma_outb(dmanr & 3, DMA2_MASK_REG);
158}
159
160static __inline__ void disable_dma(unsigned int dmanr)
161{
162 if (dmanr<=3)
163 dma_outb(dmanr | 4, DMA1_MASK_REG);
164 else
165 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
166}
167
168/* Clear the 'DMA Pointer Flip Flop'.
169 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
170 * Use this once to initialize the FF to a known state.
171 * After that, keep track of it. :-)
172 * --- In order to do that, the DMA routines below should ---
173 * --- only be used while holding the DMA lock ! ---
174 */
175static __inline__ void clear_dma_ff(unsigned int dmanr)
176{
177 if (dmanr<=3)
178 dma_outb(0, DMA1_CLEAR_FF_REG);
179 else
180 dma_outb(0, DMA2_CLEAR_FF_REG);
181}
182
183/* set mode (above) for a specific DMA channel */
184static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
185{
186 if (dmanr<=3)
187 dma_outb(mode | dmanr, DMA1_MODE_REG);
188 else
189 dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
190}
191
192/* Set only the page register bits of the transfer address.
193 * This is used for successive transfers when we know the contents of
194 * the lower 16 bits of the DMA current address register, but a 64k boundary
195 * may have been crossed.
196 */
197static __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr)
198{
199 switch(dmanr) {
200 case 0:
201 dma_outb( pagenr & 0xff, DMA_PAGE_0);
202 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_0 + 0x400);
203 break;
204 case 1:
205 dma_outb( pagenr & 0xff, DMA_PAGE_1);
206 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_1 + 0x400);
207 break;
208 case 2:
209 dma_outb( pagenr & 0xff, DMA_PAGE_2);
210 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_2 + 0x400);
211 break;
212 case 3:
213 dma_outb( pagenr & 0xff, DMA_PAGE_3);
214 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_3 + 0x400);
215 break;
216 case 5:
217 dma_outb( pagenr & 0xfe, DMA_PAGE_5);
218 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_5 + 0x400);
219 break;
220 case 6:
221 dma_outb( pagenr & 0xfe, DMA_PAGE_6);
222 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_6 + 0x400);
223 break;
224 case 7:
225 dma_outb( pagenr & 0xfe, DMA_PAGE_7);
226 dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_7 + 0x400);
227 break;
228 }
229}
230
231
232/* Set transfer address & page bits for specific DMA channel.
233 * Assumes dma flipflop is clear.
234 */
235static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
236{
237 set_dma_page(dmanr, a>>16);
238 if (dmanr <= 3) {
239 dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
240 dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
241 } else {
242 dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
243 dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
244 }
245}
246
247
248/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
249 * a specific DMA channel.
250 * You must ensure the parameters are valid.
251 * NOTE: from a manual: "the number of transfers is one more
252 * than the initial word count"! This is taken into account.
253 * Assumes dma flip-flop is clear.
254 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
255 */
256static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
257{
258 count--;
259 if (dmanr <= 3) {
260 dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
261 dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
262 } else {
263 dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
264 dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
265 }
266}
267
268
269/* Get DMA residue count. After a DMA transfer, this
270 * should return zero. Reading this while a DMA transfer is
271 * still in progress will return unpredictable results.
272 * If called before the channel has been used, it may return 1.
273 * Otherwise, it returns the number of _bytes_ left to transfer.
274 *
275 * Assumes DMA flip-flop is clear.
276 */
277static __inline__ int get_dma_residue(unsigned int dmanr)
278{
279 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
280 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
281
282 /* using short to get 16-bit wrap around */
283 unsigned short count;
284
285 count = 1 + dma_inb(io_port);
286 count += dma_inb(io_port) << 8;
287 return (dmanr<=3)? count : (count<<1);
288}
289
290
291/* These are in kernel/dma.c: */
292extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
293extern void free_dma(unsigned int dmanr); /* release it again */
294
295/* From PCI */
296
297#ifdef CONFIG_PCI
298extern int isa_dma_bridge_buggy;
299#else
300#define isa_dma_bridge_buggy (0)
301#endif
302
303#endif /* _ASM_MPC1211_DMA_H */
diff --git a/include/asm-sh/mpc1211/io.h b/include/asm-sh/mpc1211/io.h
deleted file mode 100644
index 6298370bec2d..000000000000
--- a/include/asm-sh/mpc1211/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * include/asm-sh/mpc1211/io.h
3 *
4 * Copyright 2001 Saito.K & Jeanne
5 *
6 * IO functions for an Interface MPC-1211
7 */
8
9#ifndef _ASM_SH_IO_MPC1211_H
10#define _ASM_SH_IO_MPC1211_H
11
12#include <linux/time.h>
13
14extern int mpc1211_irq_demux(int irq);
15
16extern void init_mpc1211_IRQ(void);
17extern void heartbeat_mpc1211(void);
18
19extern void mpc1211_rtc_gettimeofday(struct timeval *tv);
20extern int mpc1211_rtc_settimeofday(const struct timeval *tv);
21
22#endif /* _ASM_SH_IO_MPC1211_H */
diff --git a/include/asm-sh/mpc1211/keyboard.h b/include/asm-sh/mpc1211/keyboard.h
deleted file mode 100644
index 9020feee7b4c..000000000000
--- a/include/asm-sh/mpc1211/keyboard.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * MPC1211 specific keybord definitions
3 * Taken from the old asm-i386/keybord.h for PC/AT-style definitions
4 * created 3 Nov 1996 by Geert Uytterhoeven.
5 */
6
7#ifdef __KERNEL__
8
9#include <linux/kernel.h>
10#include <linux/ioport.h>
11#include <linux/kd.h>
12#include <linux/pm.h>
13#include <asm/io.h>
14
15#define KEYBOARD_IRQ 1
16#define DISABLE_KBD_DURING_INTERRUPTS 0
17
18extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
19extern int pckbd_getkeycode(unsigned int scancode);
20extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
21 char raw_mode);
22extern char pckbd_unexpected_up(unsigned char keycode);
23extern void pckbd_leds(unsigned char leds);
24extern void pckbd_init_hw(void);
25extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *);
26extern pm_callback pm_kbd_request_override;
27
28#define kbd_setkeycode pckbd_setkeycode
29#define kbd_getkeycode pckbd_getkeycode
30#define kbd_translate pckbd_translate
31#define kbd_unexpected_up pckbd_unexpected_up
32#define kbd_leds pckbd_leds
33#define kbd_init_hw pckbd_init_hw
34
35/* resource allocation */
36#define kbd_request_region()
37#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \
38 "keyboard", NULL)
39
40/* How to access the keyboard macros on this platform. */
41#define kbd_read_input() inb(KBD_DATA_REG)
42#define kbd_read_status() inb(KBD_STATUS_REG)
43#define kbd_write_output(val) outb(val, KBD_DATA_REG)
44#define kbd_write_command(val) outb(val, KBD_CNTL_REG)
45
46/* Some stoneage hardware needs delays after some operations. */
47#define kbd_pause() do { } while(0)
48
49/*
50 * Machine specific bits for the PS/2 driver
51 */
52
53#define AUX_IRQ 12
54
55#define aux_request_irq(hand, dev_id) \
56 request_irq(AUX_IRQ, hand, IRQF_SHARED, "PS2 Mouse", dev_id)
57
58#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id)
59
60#endif /* __KERNEL__ */
diff --git a/include/asm-sh/mpc1211/m1543c.h b/include/asm-sh/mpc1211/m1543c.h
deleted file mode 100644
index c95d13236c3b..000000000000
--- a/include/asm-sh/mpc1211/m1543c.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef __ASM_SH_M1543C_H
2#define __ASM_SH_M1543C_H
3
4/*
5 * linux/include/asm-sh/m1543c.h
6 * Copyright (C) 2001 Nobuhiro Sakawa
7 * M1543C:PCI-ISA Bus Bridge with Super IO Chip support
8 *
9 * from
10 *
11 * linux/include/asm-sh/smc37c93x.h
12 *
13 * Copyright (C) 2000 Kazumoto Kojima
14 *
15 * SMSC 37C93x Super IO Chip support
16 */
17
18/* Default base I/O address */
19#define FDC_PRIMARY_BASE 0x3f0
20#define IDE1_PRIMARY_BASE 0x1f0
21#define IDE1_SECONDARY_BASE 0x170
22#define PARPORT_PRIMARY_BASE 0x378
23#define COM1_PRIMARY_BASE 0x2f8
24#define COM2_PRIMARY_BASE 0x3f8
25#define COM3_PRIMARY_BASE 0x3e8
26#define RTC_PRIMARY_BASE 0x070
27#define KBC_PRIMARY_BASE 0x060
28#define AUXIO_PRIMARY_BASE 0x000 /* XXX */
29#define I8259_M_CR 0x20
30#define I8259_M_MR 0x21
31#define I8259_S_CR 0xa0
32#define I8259_S_MR 0xa1
33
34/* Logical device number */
35#define LDN_FDC 0
36#define LDN_IDE1 1
37#define LDN_IDE2 2
38#define LDN_PARPORT 3
39#define LDN_COM1 4
40#define LDN_COM2 5
41#define LDN_COM3 11
42#define LDN_RTC 6
43#define LDN_KBC 7
44
45/* Configuration port and key */
46#define CONFIG_PORT 0x3f0
47#define INDEX_PORT CONFIG_PORT
48#define DATA_PORT 0x3f1
49#define CONFIG_ENTER1 0x51
50#define CONFIG_ENTER2 0x23
51#define CONFIG_EXIT 0xbb
52
53/* Configuration index */
54#define CURRENT_LDN_INDEX 0x07
55#define POWER_CONTROL_INDEX 0x22
56#define ACTIVATE_INDEX 0x30
57#define IO_BASE_HI_INDEX 0x60
58#define IO_BASE_LO_INDEX 0x61
59#define IRQ_SELECT_INDEX 0x70
60#define PS2_IRQ_INDEX 0x72
61#define DMA_SELECT_INDEX 0x74
62
63/* UART stuff. Only for debugging. */
64/* UART Register */
65
66#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */
67#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */
68#define UART_IER 0x2 /* Interrupt Enable Register */
69#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */
70#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */
71#define UART_LCR 0x6 /* Line Control Register */
72#define UART_MCR 0x8 /* MODEM Control Register */
73#define UART_LSR 0xa /* Line Status Register */
74#define UART_MSR 0xc /* MODEM Status Register */
75#define UART_SCR 0xe /* Scratch Register */
76#define UART_DLL 0x0 /* Divisor Latch (LS) */
77#define UART_DLM 0x2 /* Divisor Latch (MS) */
78
79#ifndef __ASSEMBLY__
80typedef struct uart_reg {
81 volatile __u16 rbr;
82 volatile __u16 ier;
83 volatile __u16 iir;
84 volatile __u16 lcr;
85 volatile __u16 mcr;
86 volatile __u16 lsr;
87 volatile __u16 msr;
88 volatile __u16 scr;
89} uart_reg;
90#endif /* ! __ASSEMBLY__ */
91
92/* Alias for Write Only Register */
93
94#define thr rbr
95#define tcr iir
96
97/* Alias for Divisor Latch Register */
98
99#define dll rbr
100#define dlm ier
101#define fcr iir
102
103/* Interrupt Enable Register */
104
105#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */
106#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */
107#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */
108#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */
109
110/* Interrupt Ident Register */
111
112#define IIR_IP 0x0100 /* "0" if Interrupt Pending */
113#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */
114#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */
115#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */
116#define IIR_FIFO 0xc000 /* FIFOs enabled */
117
118/* FIFO Control Register */
119
120#define FCR_FEN 0x0100 /* FIFO enable */
121#define FCR_RFRES 0x0200 /* Receiver FIFO reset */
122#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */
123#define FCR_DMA 0x0800 /* DMA mode select */
124#define FCR_RTL 0x4000 /* Receiver triger (LSB) */
125#define FCR_RTM 0x8000 /* Receiver triger (MSB) */
126
127/* Line Control Register */
128
129#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */
130#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */
131#define LCR_STB 0x0400 /* Number of Stop Bits */
132#define LCR_PEN 0x0800 /* Parity Enable */
133#define LCR_EPS 0x1000 /* Even Parity Select */
134#define LCR_SP 0x2000 /* Stick Parity */
135#define LCR_SB 0x4000 /* Set Break */
136#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */
137
138/* MODEM Control Register */
139
140#define MCR_DTR 0x0100 /* Data Terminal Ready */
141#define MCR_RTS 0x0200 /* Request to Send */
142#define MCR_OUT1 0x0400 /* Out 1 */
143#define MCR_IRQEN 0x0800 /* IRQ Enable */
144#define MCR_LOOP 0x1000 /* Loop */
145
146/* Line Status Register */
147
148#define LSR_DR 0x0100 /* Data Ready */
149#define LSR_OE 0x0200 /* Overrun Error */
150#define LSR_PE 0x0400 /* Parity Error */
151#define LSR_FE 0x0800 /* Framing Error */
152#define LSR_BI 0x1000 /* Break Interrupt */
153#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */
154#define LSR_TEMT 0x4000 /* Transmitter Empty */
155#define LSR_FIFOE 0x8000 /* Receiver FIFO error */
156
157/* MODEM Status Register */
158
159#define MSR_DCTS 0x0100 /* Delta Clear to Send */
160#define MSR_DDSR 0x0200 /* Delta Data Set Ready */
161#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */
162#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */
163#define MSR_CTS 0x1000 /* Clear to Send */
164#define MSR_DSR 0x2000 /* Data Set Ready */
165#define MSR_RI 0x4000 /* Ring Indicator */
166#define MSR_DCD 0x8000 /* Data Carrier Detect */
167
168/* Baud Rate Divisor */
169
170#define UART_CLK (1843200) /* 1.8432 MHz */
171#define UART_BAUD(x) (UART_CLK / (16 * (x)))
172
173/* RTC register definition */
174#define RTC_SECONDS 0
175#define RTC_SECONDS_ALARM 1
176#define RTC_MINUTES 2
177#define RTC_MINUTES_ALARM 3
178#define RTC_HOURS 4
179#define RTC_HOURS_ALARM 5
180#define RTC_DAY_OF_WEEK 6
181#define RTC_DAY_OF_MONTH 7
182#define RTC_MONTH 8
183#define RTC_YEAR 9
184#define RTC_FREQ_SELECT 10
185# define RTC_UIP 0x80
186# define RTC_DIV_CTL 0x70
187/* This RTC can work under 32.768KHz clock only. */
188# define RTC_OSC_ENABLE 0x20
189# define RTC_OSC_DISABLE 0x00
190#define RTC_CONTROL 11
191# define RTC_SET 0x80
192# define RTC_PIE 0x40
193# define RTC_AIE 0x20
194# define RTC_UIE 0x10
195# define RTC_SQWE 0x08
196# define RTC_DM_BINARY 0x04
197# define RTC_24H 0x02
198# define RTC_DST_EN 0x01
199
200#endif /* __ASM_SH_M1543C_H */
diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h
deleted file mode 100644
index e245f2a3cd78..000000000000
--- a/include/asm-sh/mpc1211/mc146818rtc.h
+++ /dev/null
@@ -1,6 +0,0 @@
1/*
2 * MPC1211 uses PC/AT style RTC definitions.
3 */
4#include <asm-x86/mc146818rtc_32.h>
5
6
diff --git a/include/asm-sh/mpc1211/mpc1211.h b/include/asm-sh/mpc1211/mpc1211.h
deleted file mode 100644
index fa456c3e4e01..000000000000
--- a/include/asm-sh/mpc1211/mpc1211.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef __ASM_SH_MPC1211_H
2#define __ASM_SH_MPC1211_H
3
4/*
5 * linux/include/asm-sh/mpc1211.h
6 *
7 * Copyright (C) 2001 Saito.K & Jeanne
8 *
9 * Interface MPC-1211 support
10 */
11
12#define PA_PCI_IO (0xa4000000) /* PCI I/O space */
13#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */
14
15#define PCIPAR (0xa4000cf8) /* PCI Config address */
16#define PCIPDR (0xa4000cfc) /* PCI Config data */
17
18#endif /* __ASM_SH_MPC1211_H */
diff --git a/include/asm-sh/mpc1211/pci.h b/include/asm-sh/mpc1211/pci.h
deleted file mode 100644
index d9162c5ed76a..000000000000
--- a/include/asm-sh/mpc1211/pci.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * Low-Level PCI Support for MPC-1211
3 *
4 * (c) 2002 Saito.K & Jeanne
5 *
6 */
7
8#ifndef _PCI_MPC1211_H_
9#define _PCI_MPC1211_H_
10
11#include <linux/pci.h>
12
13/* set debug level 4=verbose...1=terse */
14//#define DEBUG_PCI 3
15#undef DEBUG_PCI
16
17#ifdef DEBUG_PCI
18#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); }
19#else
20#define PCIDBG(n, x...)
21#endif
22
23/* startup values */
24#define PCI_PROBE_BIOS 1
25#define PCI_PROBE_CONF1 2
26#define PCI_PROBE_CONF2 4
27#define PCI_NO_CHECKS 0x400
28#define PCI_ASSIGN_ROMS 0x1000
29#define PCI_BIOS_IRQ_SCAN 0x2000
30
31/* MPC-1211 Specific Values */
32#define PCIPAR (0xa4000cf8) /* PCI Config address */
33#define PCIPDR (0xa4000cfc) /* PCI Config data */
34
35#define PA_PCI_IO (0xa4000000) /* PCI I/O space */
36#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */
37
38#endif /* _PCI_MPC1211_H_ */
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index a33838f23a6d..306f7359f7d4 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -193,8 +193,6 @@
193#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) 193#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
194#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) 194#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
195 195
196unsigned char *highlander_init_irq_r7780mp(void); 196unsigned char *highlander_plat_irq_setup(void);
197unsigned char *highlander_init_irq_r7780rp(void);
198unsigned char *highlander_init_irq_r7785rp(void);
199 197
200#endif /* __ASM_SH_RENESAS_R7780RP */ 198#endif /* __ASM_SH_RENESAS_R7780RP */
diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h
index 0308e05fc57b..0a96f3af69e3 100644
--- a/include/asm-sh/tlb_64.h
+++ b/include/asm-sh/tlb_64.h
@@ -56,6 +56,7 @@ static inline void __flush_tlb_slot(unsigned long long slot)
56 __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot)); 56 __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot));
57} 57}
58 58
59#ifdef CONFIG_MMU
59/* arch/sh64/mm/tlb.c */ 60/* arch/sh64/mm/tlb.c */
60int sh64_tlb_init(void); 61int sh64_tlb_init(void);
61unsigned long long sh64_next_free_dtlb_entry(void); 62unsigned long long sh64_next_free_dtlb_entry(void);
@@ -64,6 +65,13 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry);
64void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, 65void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
65 unsigned long asid, unsigned long paddr); 66 unsigned long asid, unsigned long paddr);
66void sh64_teardown_tlb_slot(unsigned long long config_addr); 67void sh64_teardown_tlb_slot(unsigned long long config_addr);
67 68#else
69#define sh64_tlb_init() do { } while (0)
70#define sh64_next_free_dtlb_entry() (0)
71#define sh64_get_wired_dtlb_entry() (0)
72#define sh64_put_wired_dtlb_entry(entry) do { } while (0)
73#define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0)
74#define sh64_teardown_tlb_slot(addr) do { } while (0)
75#endif /* CONFIG_MMU */
68#endif /* __ASSEMBLY__ */ 76#endif /* __ASSEMBLY__ */
69#endif /* __ASM_SH_TLB_64_H */ 77#endif /* __ASM_SH_TLB_64_H */
diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h
index 34cdb28e8f44..95f0085e098a 100644
--- a/include/asm-sh/topology.h
+++ b/include/asm-sh/topology.h
@@ -29,6 +29,17 @@
29 .nr_balance_failed = 0, \ 29 .nr_balance_failed = 0, \
30} 30}
31 31
32#define cpu_to_node(cpu) ((void)(cpu),0)
33#define parent_node(node) ((void)(node),0)
34
35#define node_to_cpumask(node) ((void)node, cpu_online_map)
36#define node_to_first_cpu(node) ((void)(node),0)
37
38#define pcibus_to_node(bus) ((void)(bus), -1)
39#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
40 CPU_MASK_ALL : \
41 node_to_cpumask(pcibus_to_node(bus)) \
42 )
32#endif 43#endif
33 44
34#include <asm-generic/topology.h> 45#include <asm-generic/topology.h>
diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h
index f956b7b316c7..a9b68d094844 100644
--- a/include/asm-sh/uaccess_64.h
+++ b/include/asm-sh/uaccess_64.h
@@ -274,7 +274,9 @@ struct exception_table_entry
274 unsigned long insn, fixup; 274 unsigned long insn, fixup;
275}; 275};
276 276
277#ifdef CONFIG_MMU
277#define ARCH_HAS_SEARCH_EXTABLE 278#define ARCH_HAS_SEARCH_EXTABLE
279#endif
278 280
279/* Returns 0 if exception not found and fixup.unit otherwise. */ 281/* Returns 0 if exception not found and fixup.unit otherwise. */
280extern unsigned long search_exception_table(unsigned long addr); 282extern unsigned long search_exception_table(unsigned long addr);
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
index b81a4d4d3337..ee4b3ead6a43 100644
--- a/include/asm-x86/bitops.h
+++ b/include/asm-x86/bitops.h
@@ -23,13 +23,10 @@
23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) 23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
24/* Technically wrong, but this avoids compilation errors on some gcc 24/* Technically wrong, but this avoids compilation errors on some gcc
25 versions. */ 25 versions. */
26#define ADDR "=m" (*(volatile long *)addr) 26#define ADDR "=m" (*(volatile long *) addr)
27#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
28#else 27#else
29#define ADDR "+m" (*(volatile long *) addr) 28#define ADDR "+m" (*(volatile long *) addr)
30#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
31#endif 29#endif
32#define BASE_ADDR "m" (*(volatile int *)addr)
33 30
34/** 31/**
35 * set_bit - Atomically set a bit in memory 32 * set_bit - Atomically set a bit in memory
@@ -77,7 +74,7 @@ static inline void __set_bit(int nr, volatile void *addr)
77 */ 74 */
78static inline void clear_bit(int nr, volatile void *addr) 75static inline void clear_bit(int nr, volatile void *addr)
79{ 76{
80 asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 77 asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr));
81} 78}
82 79
83/* 80/*
@@ -96,7 +93,7 @@ static inline void clear_bit_unlock(unsigned nr, volatile void *addr)
96 93
97static inline void __clear_bit(int nr, volatile void *addr) 94static inline void __clear_bit(int nr, volatile void *addr)
98{ 95{
99 asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 96 asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
100} 97}
101 98
102/* 99/*
@@ -131,7 +128,7 @@ static inline void __clear_bit_unlock(unsigned nr, volatile void *addr)
131 */ 128 */
132static inline void __change_bit(int nr, volatile void *addr) 129static inline void __change_bit(int nr, volatile void *addr)
133{ 130{
134 asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 131 asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
135} 132}
136 133
137/** 134/**
@@ -145,7 +142,7 @@ static inline void __change_bit(int nr, volatile void *addr)
145 */ 142 */
146static inline void change_bit(int nr, volatile void *addr) 143static inline void change_bit(int nr, volatile void *addr)
147{ 144{
148 asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 145 asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
149} 146}
150 147
151/** 148/**
@@ -191,9 +188,10 @@ static inline int __test_and_set_bit(int nr, volatile void *addr)
191{ 188{
192 int oldbit; 189 int oldbit;
193 190
194 asm volatile("bts %2,%3\n\t" 191 asm("bts %2,%1\n\t"
195 "sbb %0,%0" 192 "sbb %0,%0"
196 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 193 : "=r" (oldbit), ADDR
194 : "Ir" (nr));
197 return oldbit; 195 return oldbit;
198} 196}
199 197
@@ -229,9 +227,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
229{ 227{
230 int oldbit; 228 int oldbit;
231 229
232 asm volatile("btr %2,%3\n\t" 230 asm volatile("btr %2,%1\n\t"
233 "sbb %0,%0" 231 "sbb %0,%0"
234 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 232 : "=r" (oldbit), ADDR
233 : "Ir" (nr));
235 return oldbit; 234 return oldbit;
236} 235}
237 236
@@ -240,9 +239,10 @@ static inline int __test_and_change_bit(int nr, volatile void *addr)
240{ 239{
241 int oldbit; 240 int oldbit;
242 241
243 asm volatile("btc %2,%3\n\t" 242 asm volatile("btc %2,%1\n\t"
244 "sbb %0,%0" 243 "sbb %0,%0"
245 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 244 : "=r" (oldbit), ADDR
245 : "Ir" (nr) : "memory");
246 246
247 return oldbit; 247 return oldbit;
248} 248}
@@ -276,11 +276,10 @@ static inline int variable_test_bit(int nr, volatile const void *addr)
276{ 276{
277 int oldbit; 277 int oldbit;
278 278
279 asm volatile("bt %2,%3\n\t" 279 asm volatile("bt %2,%1\n\t"
280 "sbb %0,%0" 280 "sbb %0,%0"
281 : "=r" (oldbit) 281 : "=r" (oldbit)
282 : "m" (((volatile const int *)addr)[nr >> 5]), 282 : "m" (*(unsigned long *)addr), "Ir" (nr));
283 "Ir" (nr), BASE_ADDR);
284 283
285 return oldbit; 284 return oldbit;
286} 285}
@@ -397,8 +396,6 @@ static inline int fls(int x)
397} 396}
398#endif /* __KERNEL__ */ 397#endif /* __KERNEL__ */
399 398
400#undef BASE_ADDR
401#undef BIT_ADDR
402#undef ADDR 399#undef ADDR
403 400
404static inline void set_bit_string(unsigned long *bitmap, 401static inline void set_bit_string(unsigned long *bitmap,
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index 7154dc4de951..6e6458853a36 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -185,16 +185,14 @@ static inline int is_geode(void)
185 return (is_geode_gx() || is_geode_lx()); 185 return (is_geode_gx() || is_geode_lx());
186} 186}
187 187
188/* 188#ifdef CONFIG_MGEODE_LX
189 * The VSA has virtual registers that we can query for a signature. 189extern int geode_has_vsa2(void);
190 */ 190#else
191static inline int geode_has_vsa2(void) 191static inline int geode_has_vsa2(void)
192{ 192{
193 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); 193 return 0;
194 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
195
196 return (inw(VSA_VRC_DATA) == VSA_SIG);
197} 194}
195#endif
198 196
199/* MFGPTs */ 197/* MFGPTs */
200 198
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index da2adb45f6e3..6b722d315936 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -175,7 +175,15 @@ static inline int save_i387(struct _fpstate __user *buf)
175 */ 175 */
176static inline int restore_i387(struct _fpstate __user *buf) 176static inline int restore_i387(struct _fpstate __user *buf)
177{ 177{
178 set_used_math(); 178 struct task_struct *tsk = current;
179 int err;
180
181 if (!used_math()) {
182 err = init_fpu(tsk);
183 if (err)
184 return err;
185 }
186
179 if (!(task_thread_info(current)->status & TS_USEDFPU)) { 187 if (!(task_thread_info(current)->status & TS_USEDFPU)) {
180 clts(); 188 clts();
181 task_thread_info(current)->status |= TS_USEDFPU; 189 task_thread_info(current)->status |= TS_USEDFPU;
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
index 8b822b5a1786..88f60cc6a227 100644
--- a/include/asm-x86/pat.h
+++ b/include/asm-x86/pat.h
@@ -4,7 +4,13 @@
4 4
5#include <linux/types.h> 5#include <linux/types.h>
6 6
7#ifdef CONFIG_X86_PAT
7extern int pat_wc_enabled; 8extern int pat_wc_enabled;
9extern void validate_pat_support(struct cpuinfo_x86 *c);
10#else
11static const int pat_wc_enabled = 0;
12static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
13#endif
8 14
9extern void pat_init(void); 15extern void pat_init(void);
10 16
@@ -12,5 +18,7 @@ extern int reserve_memtype(u64 start, u64 end,
12 unsigned long req_type, unsigned long *ret_type); 18 unsigned long req_type, unsigned long *ret_type);
13extern int free_memtype(u64 start, u64 end); 19extern int free_memtype(u64 start, u64 end);
14 20
21extern void pat_disable(char *reason);
22
15#endif 23#endif
16 24
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
index bc6376f1bc5a..21e89bf92f1c 100644
--- a/include/asm-x86/spinlock.h
+++ b/include/asm-x86/spinlock.h
@@ -20,18 +20,8 @@
20 */ 20 */
21 21
22#ifdef CONFIG_X86_32 22#ifdef CONFIG_X86_32
23typedef char _slock_t;
24# define LOCK_INS_DEC "decb"
25# define LOCK_INS_XCH "xchgb"
26# define LOCK_INS_MOV "movb"
27# define LOCK_INS_CMP "cmpb"
28# define LOCK_PTR_REG "a" 23# define LOCK_PTR_REG "a"
29#else 24#else
30typedef int _slock_t;
31# define LOCK_INS_DEC "decl"
32# define LOCK_INS_XCH "xchgl"
33# define LOCK_INS_MOV "movl"
34# define LOCK_INS_CMP "cmpl"
35# define LOCK_PTR_REG "D" 25# define LOCK_PTR_REG "D"
36#endif 26#endif
37 27
@@ -66,14 +56,14 @@ typedef int _slock_t;
66#if (NR_CPUS < 256) 56#if (NR_CPUS < 256)
67static inline int __raw_spin_is_locked(raw_spinlock_t *lock) 57static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
68{ 58{
69 int tmp = *(volatile signed int *)(&(lock)->slock); 59 int tmp = ACCESS_ONCE(lock->slock);
70 60
71 return (((tmp >> 8) & 0xff) != (tmp & 0xff)); 61 return (((tmp >> 8) & 0xff) != (tmp & 0xff));
72} 62}
73 63
74static inline int __raw_spin_is_contended(raw_spinlock_t *lock) 64static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
75{ 65{
76 int tmp = *(volatile signed int *)(&(lock)->slock); 66 int tmp = ACCESS_ONCE(lock->slock);
77 67
78 return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1; 68 return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1;
79} 69}
@@ -130,14 +120,14 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
130#else 120#else
131static inline int __raw_spin_is_locked(raw_spinlock_t *lock) 121static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
132{ 122{
133 int tmp = *(volatile signed int *)(&(lock)->slock); 123 int tmp = ACCESS_ONCE(lock->slock);
134 124
135 return (((tmp >> 16) & 0xffff) != (tmp & 0xffff)); 125 return (((tmp >> 16) & 0xffff) != (tmp & 0xffff));
136} 126}
137 127
138static inline int __raw_spin_is_contended(raw_spinlock_t *lock) 128static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
139{ 129{
140 int tmp = *(volatile signed int *)(&(lock)->slock); 130 int tmp = ACCESS_ONCE(lock->slock);
141 131
142 return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1; 132 return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1;
143} 133}
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
index 4f35a0fb4f22..dcf3f8131d6b 100644
--- a/include/asm-x86/topology.h
+++ b/include/asm-x86/topology.h
@@ -25,6 +25,16 @@
25#ifndef _ASM_X86_TOPOLOGY_H 25#ifndef _ASM_X86_TOPOLOGY_H
26#define _ASM_X86_TOPOLOGY_H 26#define _ASM_X86_TOPOLOGY_H
27 27
28#ifdef CONFIG_X86_32
29# ifdef CONFIG_X86_HT
30# define ENABLE_TOPO_DEFINES
31# endif
32#else
33# ifdef CONFIG_SMP
34# define ENABLE_TOPO_DEFINES
35# endif
36#endif
37
28#ifdef CONFIG_NUMA 38#ifdef CONFIG_NUMA
29#include <linux/cpumask.h> 39#include <linux/cpumask.h>
30#include <asm/mpspec.h> 40#include <asm/mpspec.h>
@@ -130,10 +140,6 @@ extern unsigned long node_end_pfn[];
130extern unsigned long node_remap_size[]; 140extern unsigned long node_remap_size[];
131#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid]) 141#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
132 142
133# ifdef CONFIG_X86_HT
134# define ENABLE_TOPO_DEFINES
135# endif
136
137# define SD_CACHE_NICE_TRIES 1 143# define SD_CACHE_NICE_TRIES 1
138# define SD_IDLE_IDX 1 144# define SD_IDLE_IDX 1
139# define SD_NEWIDLE_IDX 2 145# define SD_NEWIDLE_IDX 2
@@ -141,10 +147,6 @@ extern unsigned long node_remap_size[];
141 147
142#else 148#else
143 149
144# ifdef CONFIG_SMP
145# define ENABLE_TOPO_DEFINES
146# endif
147
148# define SD_CACHE_NICE_TRIES 2 150# define SD_CACHE_NICE_TRIES 2
149# define SD_IDLE_IDX 2 151# define SD_IDLE_IDX 2
150# define SD_NEWIDLE_IDX 2 152# define SD_NEWIDLE_IDX 2
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index dcae0c8d97e6..c8bd2daf95ec 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -182,4 +182,16 @@ extern void __chk_io_ptr(const volatile void __iomem *);
182# define __section(S) __attribute__ ((__section__(#S))) 182# define __section(S) __attribute__ ((__section__(#S)))
183#endif 183#endif
184 184
185/*
186 * Prevent the compiler from merging or refetching accesses. The compiler
187 * is also forbidden from reordering successive instances of ACCESS_ONCE(),
188 * but only when the compiler is aware of some particular ordering. One way
189 * to make the compiler aware of ordering is to put the two invocations of
190 * ACCESS_ONCE() in different C statements.
191 *
192 * This macro does absolutely -nothing- to prevent the CPU from reordering,
193 * merging, or refetching absolutely anything at any time.
194 */
195#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
196
185#endif /* __LINUX_COMPILER_H */ 197#endif /* __LINUX_COMPILER_H */
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 897f723bd222..181006cc94a0 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -72,6 +72,14 @@
72#define in_softirq() (softirq_count()) 72#define in_softirq() (softirq_count())
73#define in_interrupt() (irq_count()) 73#define in_interrupt() (irq_count())
74 74
75#if defined(CONFIG_PREEMPT)
76# define PREEMPT_INATOMIC_BASE kernel_locked()
77# define PREEMPT_CHECK_OFFSET 1
78#else
79# define PREEMPT_INATOMIC_BASE 0
80# define PREEMPT_CHECK_OFFSET 0
81#endif
82
75/* 83/*
76 * Are we running in atomic context? WARNING: this macro cannot 84 * Are we running in atomic context? WARNING: this macro cannot
77 * always detect atomic context; in particular, it cannot know about 85 * always detect atomic context; in particular, it cannot know about
@@ -79,17 +87,11 @@
79 * used in the general case to determine whether sleeping is possible. 87 * used in the general case to determine whether sleeping is possible.
80 * Do not use in_atomic() in driver code. 88 * Do not use in_atomic() in driver code.
81 */ 89 */
82#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0) 90#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
83
84#ifdef CONFIG_PREEMPT
85# define PREEMPT_CHECK_OFFSET 1
86#else
87# define PREEMPT_CHECK_OFFSET 0
88#endif
89 91
90/* 92/*
91 * Check whether we were atomic before we did preempt_disable(): 93 * Check whether we were atomic before we did preempt_disable():
92 * (used by the scheduler) 94 * (used by the scheduler, *after* releasing the kernel lock)
93 */ 95 */
94#define in_atomic_preempt_off() \ 96#define in_atomic_preempt_off() \
95 ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET) 97 ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
diff --git a/include/linux/of_i2c.h b/include/linux/of_i2c.h
index 2e5a96732042..bd2a870ec296 100644
--- a/include/linux/of_i2c.h
+++ b/include/linux/of_i2c.h
@@ -14,11 +14,7 @@
14 14
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16 16
17#ifdef CONFIG_OF_I2C
18
19void of_register_i2c_devices(struct i2c_adapter *adap, 17void of_register_i2c_devices(struct i2c_adapter *adap,
20 struct device_node *adap_node); 18 struct device_node *adap_node);
21 19
22#endif /* CONFIG_OF_I2C */
23
24#endif /* __LINUX_OF_I2C_H */ 20#endif /* __LINUX_OF_I2C_H */
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 8082d6587a0f..d42dbec06083 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -131,18 +131,6 @@ struct rcu_head {
131 */ 131 */
132#define rcu_read_unlock_bh() __rcu_read_unlock_bh() 132#define rcu_read_unlock_bh() __rcu_read_unlock_bh()
133 133
134/*
135 * Prevent the compiler from merging or refetching accesses. The compiler
136 * is also forbidden from reordering successive instances of ACCESS_ONCE(),
137 * but only when the compiler is aware of some particular ordering. One way
138 * to make the compiler aware of ordering is to put the two invocations of
139 * ACCESS_ONCE() in different C statements.
140 *
141 * This macro does absolutely -nothing- to prevent the CPU from reordering,
142 * merging, or refetching absolutely anything at any time.
143 */
144#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
145
146/** 134/**
147 * rcu_dereference - fetch an RCU-protected pointer in an 135 * rcu_dereference - fetch an RCU-protected pointer in an
148 * RCU read-side critical section. This pointer may later 136 * RCU read-side critical section. This pointer may later
diff --git a/include/linux/vermagic.h b/include/linux/vermagic.h
index 4d0909e53595..79b9837d9ca0 100644
--- a/include/linux/vermagic.h
+++ b/include/linux/vermagic.h
@@ -17,6 +17,11 @@
17#else 17#else
18#define MODULE_VERMAGIC_MODULE_UNLOAD "" 18#define MODULE_VERMAGIC_MODULE_UNLOAD ""
19#endif 19#endif
20#ifdef CONFIG_MODVERSIONS
21#define MODULE_VERMAGIC_MODVERSIONS "modversions "
22#else
23#define MODULE_VERMAGIC_MODVERSIONS ""
24#endif
20#ifndef MODULE_ARCH_VERMAGIC 25#ifndef MODULE_ARCH_VERMAGIC
21#define MODULE_ARCH_VERMAGIC "" 26#define MODULE_ARCH_VERMAGIC ""
22#endif 27#endif
@@ -24,5 +29,6 @@
24#define VERMAGIC_STRING \ 29#define VERMAGIC_STRING \
25 UTS_RELEASE " " \ 30 UTS_RELEASE " " \
26 MODULE_VERMAGIC_SMP MODULE_VERMAGIC_PREEMPT \ 31 MODULE_VERMAGIC_SMP MODULE_VERMAGIC_PREEMPT \
27 MODULE_VERMAGIC_MODULE_UNLOAD MODULE_ARCH_VERMAGIC 32 MODULE_VERMAGIC_MODULE_UNLOAD MODULE_VERMAGIC_MODVERSIONS \
33 MODULE_ARCH_VERMAGIC
28 34
diff --git a/init/Kconfig b/init/Kconfig
index 3b5adbf228c7..6135d07f31ec 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -845,9 +845,9 @@ config MODULE_FORCE_LOAD
845 depends on MODULES 845 depends on MODULES
846 default n 846 default n
847 help 847 help
848 This option allows loading of modules even if that would set the 848 Allow loading of modules without version information (ie. modprobe
849 'F' (forced) taint, due to lack of version info. Which is 849 --force). Forced module loading sets the 'F' (forced) taint flag and
850 usually a really bad idea. 850 is usually a really bad idea.
851 851
852config MODULE_UNLOAD 852config MODULE_UNLOAD
853 bool "Module unloading" 853 bool "Module unloading"
diff --git a/kernel/module.c b/kernel/module.c
index 8e4528c9909f..f5e9491ef7ac 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -917,6 +917,10 @@ static int check_version(Elf_Shdr *sechdrs,
917 if (!crc) 917 if (!crc)
918 return 1; 918 return 1;
919 919
920 /* No versions at all? modprobe --force does this. */
921 if (versindex == 0)
922 return try_to_force_load(mod, symname) == 0;
923
920 versions = (void *) sechdrs[versindex].sh_addr; 924 versions = (void *) sechdrs[versindex].sh_addr;
921 num_versions = sechdrs[versindex].sh_size 925 num_versions = sechdrs[versindex].sh_size
922 / sizeof(struct modversion_info); 926 / sizeof(struct modversion_info);
@@ -932,8 +936,9 @@ static int check_version(Elf_Shdr *sechdrs,
932 goto bad_version; 936 goto bad_version;
933 } 937 }
934 938
935 if (!try_to_force_load(mod, symname)) 939 printk(KERN_WARNING "%s: no symbol version for %s\n",
936 return 1; 940 mod->name, symname);
941 return 0;
937 942
938bad_version: 943bad_version:
939 printk("%s: disagrees about version of symbol %s\n", 944 printk("%s: disagrees about version of symbol %s\n",
@@ -952,11 +957,14 @@ static inline int check_modstruct_version(Elf_Shdr *sechdrs,
952 return check_version(sechdrs, versindex, "struct_module", mod, crc); 957 return check_version(sechdrs, versindex, "struct_module", mod, crc);
953} 958}
954 959
955/* First part is kernel version, which we ignore. */ 960/* First part is kernel version, which we ignore if module has crcs. */
956static inline int same_magic(const char *amagic, const char *bmagic) 961static inline int same_magic(const char *amagic, const char *bmagic,
962 bool has_crcs)
957{ 963{
958 amagic += strcspn(amagic, " "); 964 if (has_crcs) {
959 bmagic += strcspn(bmagic, " "); 965 amagic += strcspn(amagic, " ");
966 bmagic += strcspn(bmagic, " ");
967 }
960 return strcmp(amagic, bmagic) == 0; 968 return strcmp(amagic, bmagic) == 0;
961} 969}
962#else 970#else
@@ -976,7 +984,8 @@ static inline int check_modstruct_version(Elf_Shdr *sechdrs,
976 return 1; 984 return 1;
977} 985}
978 986
979static inline int same_magic(const char *amagic, const char *bmagic) 987static inline int same_magic(const char *amagic, const char *bmagic,
988 bool has_crcs)
980{ 989{
981 return strcmp(amagic, bmagic) == 0; 990 return strcmp(amagic, bmagic) == 0;
982} 991}
@@ -1869,7 +1878,7 @@ static struct module *load_module(void __user *umod,
1869 err = try_to_force_load(mod, "magic"); 1878 err = try_to_force_load(mod, "magic");
1870 if (err) 1879 if (err)
1871 goto free_hdr; 1880 goto free_hdr;
1872 } else if (!same_magic(modmagic, vermagic)) { 1881 } else if (!same_magic(modmagic, vermagic, versindex)) {
1873 printk(KERN_ERR "%s: version magic '%s' should be '%s'\n", 1882 printk(KERN_ERR "%s: version magic '%s' should be '%s'\n",
1874 mod->name, modmagic, vermagic); 1883 mod->name, modmagic, vermagic);
1875 err = -ENOEXEC; 1884 err = -ENOEXEC;
diff --git a/kernel/sched.c b/kernel/sched.c
index 58fb8af15776..c51b6565e07c 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -4567,8 +4567,6 @@ EXPORT_SYMBOL(schedule);
4567asmlinkage void __sched preempt_schedule(void) 4567asmlinkage void __sched preempt_schedule(void)
4568{ 4568{
4569 struct thread_info *ti = current_thread_info(); 4569 struct thread_info *ti = current_thread_info();
4570 struct task_struct *task = current;
4571 int saved_lock_depth;
4572 4570
4573 /* 4571 /*
4574 * If there is a non-zero preempt_count or interrupts are disabled, 4572 * If there is a non-zero preempt_count or interrupts are disabled,
@@ -4579,16 +4577,7 @@ asmlinkage void __sched preempt_schedule(void)
4579 4577
4580 do { 4578 do {
4581 add_preempt_count(PREEMPT_ACTIVE); 4579 add_preempt_count(PREEMPT_ACTIVE);
4582
4583 /*
4584 * We keep the big kernel semaphore locked, but we
4585 * clear ->lock_depth so that schedule() doesnt
4586 * auto-release the semaphore:
4587 */
4588 saved_lock_depth = task->lock_depth;
4589 task->lock_depth = -1;
4590 schedule(); 4580 schedule();
4591 task->lock_depth = saved_lock_depth;
4592 sub_preempt_count(PREEMPT_ACTIVE); 4581 sub_preempt_count(PREEMPT_ACTIVE);
4593 4582
4594 /* 4583 /*
@@ -4609,26 +4598,15 @@ EXPORT_SYMBOL(preempt_schedule);
4609asmlinkage void __sched preempt_schedule_irq(void) 4598asmlinkage void __sched preempt_schedule_irq(void)
4610{ 4599{
4611 struct thread_info *ti = current_thread_info(); 4600 struct thread_info *ti = current_thread_info();
4612 struct task_struct *task = current;
4613 int saved_lock_depth;
4614 4601
4615 /* Catch callers which need to be fixed */ 4602 /* Catch callers which need to be fixed */
4616 BUG_ON(ti->preempt_count || !irqs_disabled()); 4603 BUG_ON(ti->preempt_count || !irqs_disabled());
4617 4604
4618 do { 4605 do {
4619 add_preempt_count(PREEMPT_ACTIVE); 4606 add_preempt_count(PREEMPT_ACTIVE);
4620
4621 /*
4622 * We keep the big kernel semaphore locked, but we
4623 * clear ->lock_depth so that schedule() doesnt
4624 * auto-release the semaphore:
4625 */
4626 saved_lock_depth = task->lock_depth;
4627 task->lock_depth = -1;
4628 local_irq_enable(); 4607 local_irq_enable();
4629 schedule(); 4608 schedule();
4630 local_irq_disable(); 4609 local_irq_disable();
4631 task->lock_depth = saved_lock_depth;
4632 sub_preempt_count(PREEMPT_ACTIVE); 4610 sub_preempt_count(PREEMPT_ACTIVE);
4633 4611
4634 /* 4612 /*
@@ -5853,8 +5831,11 @@ void __cpuinit init_idle(struct task_struct *idle, int cpu)
5853 spin_unlock_irqrestore(&rq->lock, flags); 5831 spin_unlock_irqrestore(&rq->lock, flags);
5854 5832
5855 /* Set the preempt count _outside_ the spinlocks! */ 5833 /* Set the preempt count _outside_ the spinlocks! */
5834#if defined(CONFIG_PREEMPT)
5835 task_thread_info(idle)->preempt_count = (idle->lock_depth >= 0);
5836#else
5856 task_thread_info(idle)->preempt_count = 0; 5837 task_thread_info(idle)->preempt_count = 0;
5857 5838#endif
5858 /* 5839 /*
5859 * The idle tasks have their own, simple scheduling class: 5840 * The idle tasks have their own, simple scheduling class:
5860 */ 5841 */
diff --git a/kernel/semaphore.c b/kernel/semaphore.c
index 5e41217239e8..5c2942e768cd 100644
--- a/kernel/semaphore.c
+++ b/kernel/semaphore.c
@@ -54,9 +54,10 @@ void down(struct semaphore *sem)
54 unsigned long flags; 54 unsigned long flags;
55 55
56 spin_lock_irqsave(&sem->lock, flags); 56 spin_lock_irqsave(&sem->lock, flags);
57 if (unlikely(!sem->count)) 57 if (likely(sem->count > 0))
58 sem->count--;
59 else
58 __down(sem); 60 __down(sem);
59 sem->count--;
60 spin_unlock_irqrestore(&sem->lock, flags); 61 spin_unlock_irqrestore(&sem->lock, flags);
61} 62}
62EXPORT_SYMBOL(down); 63EXPORT_SYMBOL(down);
@@ -76,10 +77,10 @@ int down_interruptible(struct semaphore *sem)
76 int result = 0; 77 int result = 0;
77 78
78 spin_lock_irqsave(&sem->lock, flags); 79 spin_lock_irqsave(&sem->lock, flags);
79 if (unlikely(!sem->count)) 80 if (likely(sem->count > 0))
80 result = __down_interruptible(sem);
81 if (!result)
82 sem->count--; 81 sem->count--;
82 else
83 result = __down_interruptible(sem);
83 spin_unlock_irqrestore(&sem->lock, flags); 84 spin_unlock_irqrestore(&sem->lock, flags);
84 85
85 return result; 86 return result;
@@ -102,10 +103,10 @@ int down_killable(struct semaphore *sem)
102 int result = 0; 103 int result = 0;
103 104
104 spin_lock_irqsave(&sem->lock, flags); 105 spin_lock_irqsave(&sem->lock, flags);
105 if (unlikely(!sem->count)) 106 if (likely(sem->count > 0))
106 result = __down_killable(sem);
107 if (!result)
108 sem->count--; 107 sem->count--;
108 else
109 result = __down_killable(sem);
109 spin_unlock_irqrestore(&sem->lock, flags); 110 spin_unlock_irqrestore(&sem->lock, flags);
110 111
111 return result; 112 return result;
@@ -156,10 +157,10 @@ int down_timeout(struct semaphore *sem, long jiffies)
156 int result = 0; 157 int result = 0;
157 158
158 spin_lock_irqsave(&sem->lock, flags); 159 spin_lock_irqsave(&sem->lock, flags);
159 if (unlikely(!sem->count)) 160 if (likely(sem->count > 0))
160 result = __down_timeout(sem, jiffies);
161 if (!result)
162 sem->count--; 161 sem->count--;
162 else
163 result = __down_timeout(sem, jiffies);
163 spin_unlock_irqrestore(&sem->lock, flags); 164 spin_unlock_irqrestore(&sem->lock, flags);
164 165
165 return result; 166 return result;
@@ -178,8 +179,9 @@ void up(struct semaphore *sem)
178 unsigned long flags; 179 unsigned long flags;
179 180
180 spin_lock_irqsave(&sem->lock, flags); 181 spin_lock_irqsave(&sem->lock, flags);
181 sem->count++; 182 if (likely(list_empty(&sem->wait_list)))
182 if (unlikely(!list_empty(&sem->wait_list))) 183 sem->count++;
184 else
183 __up(sem); 185 __up(sem);
184 spin_unlock_irqrestore(&sem->lock, flags); 186 spin_unlock_irqrestore(&sem->lock, flags);
185} 187}
@@ -190,6 +192,7 @@ EXPORT_SYMBOL(up);
190struct semaphore_waiter { 192struct semaphore_waiter {
191 struct list_head list; 193 struct list_head list;
192 struct task_struct *task; 194 struct task_struct *task;
195 int up;
193}; 196};
194 197
195/* 198/*
@@ -202,34 +205,33 @@ static inline int __sched __down_common(struct semaphore *sem, long state,
202{ 205{
203 struct task_struct *task = current; 206 struct task_struct *task = current;
204 struct semaphore_waiter waiter; 207 struct semaphore_waiter waiter;
205 int ret = 0;
206 208
207 waiter.task = task;
208 list_add_tail(&waiter.list, &sem->wait_list); 209 list_add_tail(&waiter.list, &sem->wait_list);
210 waiter.task = task;
211 waiter.up = 0;
209 212
210 for (;;) { 213 for (;;) {
211 if (state == TASK_INTERRUPTIBLE && signal_pending(task)) { 214 if (state == TASK_INTERRUPTIBLE && signal_pending(task))
212 ret = -EINTR; 215 goto interrupted;
213 break; 216 if (state == TASK_KILLABLE && fatal_signal_pending(task))
214 } 217 goto interrupted;
215 if (state == TASK_KILLABLE && fatal_signal_pending(task)) { 218 if (timeout <= 0)
216 ret = -EINTR; 219 goto timed_out;
217 break;
218 }
219 if (timeout <= 0) {
220 ret = -ETIME;
221 break;
222 }
223 __set_task_state(task, state); 220 __set_task_state(task, state);
224 spin_unlock_irq(&sem->lock); 221 spin_unlock_irq(&sem->lock);
225 timeout = schedule_timeout(timeout); 222 timeout = schedule_timeout(timeout);
226 spin_lock_irq(&sem->lock); 223 spin_lock_irq(&sem->lock);
227 if (sem->count > 0) 224 if (waiter.up)
228 break; 225 return 0;
229 } 226 }
230 227
228 timed_out:
229 list_del(&waiter.list);
230 return -ETIME;
231
232 interrupted:
231 list_del(&waiter.list); 233 list_del(&waiter.list);
232 return ret; 234 return -EINTR;
233} 235}
234 236
235static noinline void __sched __down(struct semaphore *sem) 237static noinline void __sched __down(struct semaphore *sem)
@@ -256,5 +258,7 @@ static noinline void __sched __up(struct semaphore *sem)
256{ 258{
257 struct semaphore_waiter *waiter = list_first_entry(&sem->wait_list, 259 struct semaphore_waiter *waiter = list_first_entry(&sem->wait_list,
258 struct semaphore_waiter, list); 260 struct semaphore_waiter, list);
261 list_del(&waiter->list);
262 waiter->up = 1;
259 wake_up_process(waiter->task); 263 wake_up_process(waiter->task);
260} 264}
diff --git a/lib/kernel_lock.c b/lib/kernel_lock.c
index cd3e82530b03..01a3c22c1b5a 100644
--- a/lib/kernel_lock.c
+++ b/lib/kernel_lock.c
@@ -11,79 +11,121 @@
11#include <linux/semaphore.h> 11#include <linux/semaphore.h>
12 12
13/* 13/*
14 * The 'big kernel semaphore' 14 * The 'big kernel lock'
15 * 15 *
16 * This mutex is taken and released recursively by lock_kernel() 16 * This spinlock is taken and released recursively by lock_kernel()
17 * and unlock_kernel(). It is transparently dropped and reacquired 17 * and unlock_kernel(). It is transparently dropped and reacquired
18 * over schedule(). It is used to protect legacy code that hasn't 18 * over schedule(). It is used to protect legacy code that hasn't
19 * been migrated to a proper locking design yet. 19 * been migrated to a proper locking design yet.
20 * 20 *
21 * Note: code locked by this semaphore will only be serialized against
22 * other code using the same locking facility. The code guarantees that
23 * the task remains on the same CPU.
24 *
25 * Don't use in new code. 21 * Don't use in new code.
26 */ 22 */
27static DECLARE_MUTEX(kernel_sem); 23static __cacheline_aligned_in_smp DEFINE_SPINLOCK(kernel_flag);
24
28 25
29/* 26/*
30 * Re-acquire the kernel semaphore. 27 * Acquire/release the underlying lock from the scheduler.
31 * 28 *
32 * This function is called with preemption off. 29 * This is called with preemption disabled, and should
30 * return an error value if it cannot get the lock and
31 * TIF_NEED_RESCHED gets set.
33 * 32 *
34 * We are executing in schedule() so the code must be extremely careful 33 * If it successfully gets the lock, it should increment
35 * about recursion, both due to the down() and due to the enabling of 34 * the preemption count like any spinlock does.
36 * preemption. schedule() will re-check the preemption flag after 35 *
37 * reacquiring the semaphore. 36 * (This works on UP too - _raw_spin_trylock will never
37 * return false in that case)
38 */ 38 */
39int __lockfunc __reacquire_kernel_lock(void) 39int __lockfunc __reacquire_kernel_lock(void)
40{ 40{
41 struct task_struct *task = current; 41 while (!_raw_spin_trylock(&kernel_flag)) {
42 int saved_lock_depth = task->lock_depth; 42 if (test_thread_flag(TIF_NEED_RESCHED))
43 43 return -EAGAIN;
44 BUG_ON(saved_lock_depth < 0); 44 cpu_relax();
45 45 }
46 task->lock_depth = -1;
47 preempt_enable_no_resched();
48
49 down(&kernel_sem);
50
51 preempt_disable(); 46 preempt_disable();
52 task->lock_depth = saved_lock_depth;
53
54 return 0; 47 return 0;
55} 48}
56 49
57void __lockfunc __release_kernel_lock(void) 50void __lockfunc __release_kernel_lock(void)
58{ 51{
59 up(&kernel_sem); 52 _raw_spin_unlock(&kernel_flag);
53 preempt_enable_no_resched();
60} 54}
61 55
62/* 56/*
63 * Getting the big kernel semaphore. 57 * These are the BKL spinlocks - we try to be polite about preemption.
58 * If SMP is not on (ie UP preemption), this all goes away because the
59 * _raw_spin_trylock() will always succeed.
64 */ 60 */
65void __lockfunc lock_kernel(void) 61#ifdef CONFIG_PREEMPT
62static inline void __lock_kernel(void)
66{ 63{
67 struct task_struct *task = current; 64 preempt_disable();
68 int depth = task->lock_depth + 1; 65 if (unlikely(!_raw_spin_trylock(&kernel_flag))) {
66 /*
67 * If preemption was disabled even before this
68 * was called, there's nothing we can be polite
69 * about - just spin.
70 */
71 if (preempt_count() > 1) {
72 _raw_spin_lock(&kernel_flag);
73 return;
74 }
69 75
70 if (likely(!depth))
71 /* 76 /*
72 * No recursion worries - we set up lock_depth _after_ 77 * Otherwise, let's wait for the kernel lock
78 * with preemption enabled..
73 */ 79 */
74 down(&kernel_sem); 80 do {
81 preempt_enable();
82 while (spin_is_locked(&kernel_flag))
83 cpu_relax();
84 preempt_disable();
85 } while (!_raw_spin_trylock(&kernel_flag));
86 }
87}
75 88
76 task->lock_depth = depth; 89#else
90
91/*
92 * Non-preemption case - just get the spinlock
93 */
94static inline void __lock_kernel(void)
95{
96 _raw_spin_lock(&kernel_flag);
77} 97}
98#endif
78 99
79void __lockfunc unlock_kernel(void) 100static inline void __unlock_kernel(void)
80{ 101{
81 struct task_struct *task = current; 102 /*
103 * the BKL is not covered by lockdep, so we open-code the
104 * unlocking sequence (and thus avoid the dep-chain ops):
105 */
106 _raw_spin_unlock(&kernel_flag);
107 preempt_enable();
108}
82 109
83 BUG_ON(task->lock_depth < 0); 110/*
111 * Getting the big kernel lock.
112 *
113 * This cannot happen asynchronously, so we only need to
114 * worry about other CPU's.
115 */
116void __lockfunc lock_kernel(void)
117{
118 int depth = current->lock_depth+1;
119 if (likely(!depth))
120 __lock_kernel();
121 current->lock_depth = depth;
122}
84 123
85 if (likely(--task->lock_depth < 0)) 124void __lockfunc unlock_kernel(void)
86 up(&kernel_sem); 125{
126 BUG_ON(current->lock_depth < 0);
127 if (likely(--current->lock_depth < 0))
128 __unlock_kernel();
87} 129}
88 130
89EXPORT_SYMBOL(lock_kernel); 131EXPORT_SYMBOL(lock_kernel);
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index 4b2f1033994e..5a6fab95569f 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -596,9 +596,9 @@ static int ipip6_rcv(struct sk_buff *skb)
596 } 596 }
597 597
598 icmp_send(skb, ICMP_DEST_UNREACH, ICMP_PORT_UNREACH, 0); 598 icmp_send(skb, ICMP_DEST_UNREACH, ICMP_PORT_UNREACH, 0);
599 kfree_skb(skb);
600 read_unlock(&ipip6_lock); 599 read_unlock(&ipip6_lock);
601out: 600out:
601 kfree_skb(skb);
602 return 0; 602 return 0;
603} 603}
604 604
diff --git a/net/tipc/core.h b/net/tipc/core.h
index 325404fd4eb5..5a0e4878d3b7 100644
--- a/net/tipc/core.h
+++ b/net/tipc/core.h
@@ -279,15 +279,14 @@ static inline void k_term_timer(struct timer_list *timer)
279/* 279/*
280 * TIPC message buffer code 280 * TIPC message buffer code
281 * 281 *
282 * TIPC message buffer headroom reserves space for a link-level header 282 * TIPC message buffer headroom reserves space for the worst-case
283 * (in case the message is sent off-node), 283 * link-level device header (in case the message is sent off-node).
284 * while ensuring TIPC header is word aligned for quicker access
285 * 284 *
286 * The largest header currently supported is 18 bytes, which is used when 285 * Note: Headroom should be a multiple of 4 to ensure the TIPC header fields
287 * the standard 14 byte Ethernet header has 4 added bytes for VLAN info 286 * are word aligned for quicker access
288 */ 287 */
289 288
290#define BUF_HEADROOM 20u 289#define BUF_HEADROOM LL_MAX_HEADER
291 290
292struct tipc_skb_cb { 291struct tipc_skb_cb {
293 void *handle; 292 void *handle;