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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c84
-rw-r--r--arch/arm/mach-footbridge/isa-timer.c129
3 files changed, 152 insertions, 63 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165b7eb0..6d9fbfe32a2d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -346,7 +346,7 @@ config ARCH_FOOTBRIDGE
346 bool "FootBridge" 346 bool "FootBridge"
347 select CPU_SA110 347 select CPU_SA110
348 select FOOTBRIDGE 348 select FOOTBRIDGE
349 select ARCH_USES_GETTIMEOFFSET 349 select GENERIC_CLOCKEVENTS
350 help 350 help
351 Support for systems based on the DC21285 companion chip 351 Support for systems based on the DC21285 companion chip
352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index bc5e83fb5819..a921fe92b858 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -4,10 +4,11 @@
4 * Copyright (C) 1998 Russell King. 4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell 5 * Copyright (C) 1998 Phil Blundell
6 */ 6 */
7#include <linux/clockchips.h>
8#include <linux/clocksource.h>
7#include <linux/init.h> 9#include <linux/init.h>
8#include <linux/interrupt.h> 10#include <linux/interrupt.h>
9#include <linux/irq.h> 11#include <linux/irq.h>
10#include <linux/spinlock.h>
11 12
12#include <asm/irq.h> 13#include <asm/irq.h>
13 14
@@ -16,32 +17,76 @@
16 17
17#include "common.h" 18#include "common.h"
18 19
19/* 20static cycle_t cksrc_dc21285_read(struct clocksource *cs)
20 * Footbridge timer 1 support. 21{
21 */ 22 return cs->mask - *CSR_TIMER2_VALUE;
22static unsigned long timer1_latch; 23}
23 24
24static unsigned long timer1_gettimeoffset (void) 25static int cksrc_dc21285_enable(struct clocksource *cs)
25{ 26{
26 unsigned long value = timer1_latch - *CSR_TIMER1_VALUE; 27 *CSR_TIMER2_LOAD = cs->mask;
28 *CSR_TIMER2_CLR = 0;
29 *CSR_TIMER2_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16;
30 return 0;
31}
27 32
28 return ((tick_nsec / 1000) * value) / timer1_latch; 33static int cksrc_dc21285_disable(struct clocksource *cs)
34{
35 *CSR_TIMER2_CNTL = 0;
29} 36}
30 37
31static irqreturn_t 38static struct clocksource cksrc_dc21285 = {
32timer1_interrupt(int irq, void *dev_id) 39 .name = "dc21285_timer2",
40 .rating = 200,
41 .read = cksrc_dc21285_read,
42 .enable = cksrc_dc21285_enable,
43 .disable = cksrc_dc21285_disable,
44 .mask = CLOCKSOURCE_MASK(24),
45 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
46};
47
48static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
49 struct clock_event_device *c)
33{ 50{
51 switch (mode) {
52 case CLOCK_EVT_MODE_RESUME:
53 case CLOCK_EVT_MODE_PERIODIC:
54 *CSR_TIMER1_CLR = 0;
55 *CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
56 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
57 TIMER_CNTL_DIV16;
58 break;
59
60 default:
61 *CSR_TIMER1_CNTL = 0;
62 break;
63 }
64}
65
66static struct clock_event_device ckevt_dc21285 = {
67 .name = "dc21285_timer1",
68 .features = CLOCK_EVT_FEAT_PERIODIC,
69 .rating = 200,
70 .irq = IRQ_TIMER1,
71 .set_mode = ckevt_dc21285_set_mode,
72};
73
74static irqreturn_t timer1_interrupt(int irq, void *dev_id)
75{
76 struct clock_event_device *ce = dev_id;
77
34 *CSR_TIMER1_CLR = 0; 78 *CSR_TIMER1_CLR = 0;
35 79
36 timer_tick(); 80 ce->event_handler(ce);
37 81
38 return IRQ_HANDLED; 82 return IRQ_HANDLED;
39} 83}
40 84
41static struct irqaction footbridge_timer_irq = { 85static struct irqaction footbridge_timer_irq = {
42 .name = "Timer1 timer tick", 86 .name = "dc21285_timer1",
43 .handler = timer1_interrupt, 87 .handler = timer1_interrupt,
44 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 88 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
89 .dev_id = &ckevt_dc21285,
45}; 90};
46 91
47/* 92/*
@@ -49,16 +94,19 @@ static struct irqaction footbridge_timer_irq = {
49 */ 94 */
50static void __init footbridge_timer_init(void) 95static void __init footbridge_timer_init(void)
51{ 96{
52 timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); 97 struct clock_event_device *ce = &ckevt_dc21285;
98
99 clocksource_register_hz(&cksrc_dc21285, (mem_fclk_21285 + 8) / 16);
100
101 setup_irq(ce->irq, &footbridge_timer_irq);
53 102
54 *CSR_TIMER1_CLR = 0; 103 clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
55 *CSR_TIMER1_LOAD = timer1_latch; 104 ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
56 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; 105 ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
57 106
58 setup_irq(IRQ_TIMER1, &footbridge_timer_irq); 107 clockevents_register_device(ce);
59} 108}
60 109
61struct sys_timer footbridge_timer = { 110struct sys_timer footbridge_timer = {
62 .init = footbridge_timer_init, 111 .init = footbridge_timer_init,
63 .offset = timer1_gettimeoffset,
64}; 112};
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c
index f488fa2082d7..441c6ce0d555 100644
--- a/arch/arm/mach-footbridge/isa-timer.c
+++ b/arch/arm/mach-footbridge/isa-timer.c
@@ -4,10 +4,13 @@
4 * Copyright (C) 1998 Russell King. 4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell 5 * Copyright (C) 1998 Phil Blundell
6 */ 6 */
7#include <linux/clockchips.h>
8#include <linux/clocksource.h>
7#include <linux/init.h> 9#include <linux/init.h>
8#include <linux/interrupt.h> 10#include <linux/interrupt.h>
9#include <linux/irq.h> 11#include <linux/irq.h>
10#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/timex.h>
11 14
12#include <asm/irq.h> 15#include <asm/irq.h>
13 16
@@ -15,77 +18,115 @@
15 18
16#include "common.h" 19#include "common.h"
17 20
18/* 21#define PIT_MODE 0x43
19 * ISA timer tick support 22#define PIT_CH0 0x40
20 */ 23
21#define mSEC_10_from_14 ((14318180 + 100) / 200) 24#define PIT_LATCH ((PIT_TICK_RATE + HZ / 2) / HZ)
22 25
23static unsigned long isa_gettimeoffset(void) 26static cycle_t pit_read(struct clocksource *cs)
24{ 27{
28 unsigned long flags;
29 static int old_count;
30 static u32 old_jifs;
25 int count; 31 int count;
32 u32 jifs;
26 33
27 static int count_p = (mSEC_10_from_14/6); /* for the first call after boot */ 34 raw_local_irq_save(flags);
28 static unsigned long jiffies_p = 0;
29 35
30 /* 36 jifs = jiffies;
31 * cache volatile jiffies temporarily; we have IRQs turned off. 37 outb_p(0x00, PIT_MODE); /* latch the count */
32 */ 38 count = inb_p(PIT_CH0); /* read the latched count */
33 unsigned long jiffies_t; 39 count |= inb_p(PIT_CH0) << 8;
34 40
35 /* timer count may underflow right here */ 41 if (count > old_count && jifs == old_jifs)
36 outb_p(0x00, 0x43); /* latch the count ASAP */ 42 count = old_count;
37 43
38 count = inb_p(0x40); /* read the latched count */ 44 old_count = count;
45 old_jifs = jifs;
39 46
40 /* 47 raw_local_irq_restore(flags);
41 * We do this guaranteed double memory access instead of a _p
42 * postfix in the previous port access. Wheee, hackady hack
43 */
44 jiffies_t = jiffies;
45 48
46 count |= inb_p(0x40) << 8; 49 count = (PIT_LATCH - 1) - count;
47 50
48 /* Detect timer underflows. If we haven't had a timer tick since 51 return (cycle_t)(jifs * PIT_LATCH) + count;
49 the last time we were called, and time is apparently going 52}
50 backwards, the counter must have wrapped during this routine. */
51 if ((jiffies_t == jiffies_p) && (count > count_p))
52 count -= (mSEC_10_from_14/6);
53 else
54 jiffies_p = jiffies_t;
55 53
56 count_p = count; 54static struct clocksource pit_cs = {
55 .name = "pit",
56 .rating = 110,
57 .read = pit_read,
58 .mask = CLOCKSOURCE_MASK(32),
59};
57 60
58 count = (((mSEC_10_from_14/6)-1) - count) * (tick_nsec / 1000); 61static void pit_set_mode(enum clock_event_mode mode,
59 count = (count + (mSEC_10_from_14/6)/2) / (mSEC_10_from_14/6); 62 struct clock_event_device *evt)
63{
64 unsigned long flags;
65
66 raw_local_irq_save(flags);
67
68 switch (mode) {
69 case CLOCK_EVT_MODE_PERIODIC:
70 outb_p(0x34, PIT_MODE);
71 outb_p(PIT_LATCH & 0xff, PIT_CH0);
72 outb_p(PIT_LATCH >> 8, PIT_CH0);
73 break;
74
75 case CLOCK_EVT_MODE_SHUTDOWN:
76 case CLOCK_EVT_MODE_UNUSED:
77 outb_p(0x30, PIT_MODE);
78 outb_p(0, PIT_CH0);
79 outb_p(0, PIT_CH0);
80 break;
81
82 case CLOCK_EVT_MODE_ONESHOT:
83 case CLOCK_EVT_MODE_RESUME:
84 break;
85 }
86 local_irq_restore(flags);
87}
60 88
61 return count; 89static int pit_set_next_event(unsigned long delta,
90 struct clock_event_device *evt)
91{
92 return 0;
62} 93}
63 94
64static irqreturn_t 95static struct clock_event_device pit_ce = {
65isa_timer_interrupt(int irq, void *dev_id) 96 .name = "pit",
97 .features = CLOCK_EVT_FEAT_PERIODIC,
98 .set_mode = pit_set_mode,
99 .set_next_event = pit_set_next_event,
100 .shift = 32,
101};
102
103static irqreturn_t pit_timer_interrupt(int irq, void *dev_id)
66{ 104{
67 timer_tick(); 105 struct clock_event_device *ce = dev_id;
106 ce->event_handler(ce);
68 return IRQ_HANDLED; 107 return IRQ_HANDLED;
69} 108}
70 109
71static struct irqaction isa_timer_irq = { 110static struct irqaction pit_timer_irq = {
72 .name = "ISA timer tick", 111 .name = "pit",
73 .handler = isa_timer_interrupt, 112 .handler = pit_timer_interrupt,
74 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 113 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
114 .dev_id = &pit_ce,
75}; 115};
76 116
77static void __init isa_timer_init(void) 117static void __init isa_timer_init(void)
78{ 118{
79 /* enable PIT timer */ 119 pit_ce.cpumask = cpumask_of(smp_processor_id());
80 /* set for periodic (4) and LSB/MSB write (0x30) */ 120 pit_ce.mult = div_sc(PIT_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
81 outb(0x34, 0x43); 121 pit_ce.max_delta_ns = clockevent_delta2ns(0x7fff, &pit_ce);
82 outb((mSEC_10_from_14/6) & 0xFF, 0x40); 122 pit_ce.min_delta_ns = clockevent_delta2ns(0x000f, &pit_ce);
83 outb((mSEC_10_from_14/6) >> 8, 0x40); 123
124 clocksource_register_hz(&pit_cs, PIT_TICK_RATE);
84 125
85 setup_irq(IRQ_ISA_TIMER, &isa_timer_irq); 126 setup_irq(pit_ce.irq, &pit_timer_irq);
127 clockevents_register_device(&pit_ce);
86} 128}
87 129
88struct sys_timer isa_timer = { 130struct sys_timer isa_timer = {
89 .init = isa_timer_init, 131 .init = isa_timer_init,
90 .offset = isa_gettimeoffset,
91}; 132};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-29 07:58:59 -0500