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-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c73
-rw-r--r--arch/powerpc/sysdev/tsi108_dev.c10
-rw-r--r--arch/powerpc/sysdev/tsi108_pci.c21
-rw-r--r--include/asm-powerpc/tsi108.h14
-rw-r--r--include/asm-powerpc/tsi108_irq.h124
5 files changed, 174 insertions, 68 deletions
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index d7a4fc7ca238..ed00ed2455dd 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * mpc7448_hpc2.c 2 * mpc7448_hpc2.c
3 * 3 *
4 * Board setup routines for the Freescale Taiga platform 4 * Board setup routines for the Freescale mpc7448hpc2(taiga) platform
5 * 5 *
6 * Author: Jacob Pan 6 * Author: Jacob Pan
7 * jacob.pan@freescale.com 7 * jacob.pan@freescale.com
@@ -12,10 +12,10 @@
12 * 12 *
13 * Copyright 2004-2006 Freescale Semiconductor, Inc. 13 * Copyright 2004-2006 Freescale Semiconductor, Inc.
14 * 14 *
15 * This file is licensed under 15 * This program is free software; you can redistribute it and/or
16 * the terms of the GNU General Public License version 2. This program 16 * modify it under the terms of the GNU General Public License
17 * is licensed "as is" without any warranty of any kind, whether express 17 * as published by the Free Software Foundation; either version
18 * or implied. 18 * 2 of the License, or (at your option) any later version.
19 */ 19 */
20 20
21#include <linux/config.h> 21#include <linux/config.h>
@@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
62extern int tsi108_setup_pci(struct device_node *dev); 62extern int tsi108_setup_pci(struct device_node *dev);
63extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); 63extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
64extern void tsi108_pci_int_init(void); 64extern void tsi108_pci_int_init(void);
65extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); 65extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
66 66 struct pt_regs *regs);
67/*
68 * Define all of the IRQ senses and polarities. Taken from the
69 * mpc7448hpc manual.
70 * Note: Likely, this table and the following function should be
71 * obtained and derived from the OF Device Tree.
72 */
73
74static u_char mpc7448_hpc2_pic_initsenses[] __initdata = {
75 /* External on-board sources */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */
78 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */
79 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */
80 /* Internal Tsi108/109 interrupt sources */
81 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
82 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
83 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
84 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
85 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */
86 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */
87 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */
88 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */
89 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */
90 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */
91 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */
92 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */
93 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */
94 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */
95 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
96 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */
97 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */
98 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */
99 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
100 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */
101};
102 67
103int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) 68int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
104{ 69{
@@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void)
229{ 194{
230 struct mpic *mpic; 195 struct mpic *mpic;
231 phys_addr_t mpic_paddr = 0; 196 phys_addr_t mpic_paddr = 0;
197 unsigned int cascade_pci_irq;
198 struct device_node *tsi_pci;
232 struct device_node *tsi_pic; 199 struct device_node *tsi_pic;
233 200
234 tsi_pic = of_find_node_by_type(NULL, "open-pic"); 201 tsi_pic = of_find_node_by_type(NULL, "open-pic");
@@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void)
246 DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, 213 DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__,
247 (u32) mpic_paddr); 214 (u32) mpic_paddr);
248 215
249 mpic = mpic_alloc(mpic_paddr, 216 mpic = mpic_alloc(tsi_pic, mpic_paddr,
250 MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | 217 MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
251 MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), 218 MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108),
252 0, /* num_sources used */ 219 0, /* num_sources used */
253 TSI108_IRQ_BASE,
254 0, /* num_sources used */ 220 0, /* num_sources used */
255 NR_IRQS - 4 /* XXXX */, 221 "Tsi108_PIC");
256 mpc7448_hpc2_pic_initsenses,
257 sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC");
258 222
259 BUG_ON(mpic == NULL); /* XXXX */ 223 BUG_ON(mpic == NULL); /* XXXX */
260
261 mpic_init(mpic); 224 mpic_init(mpic);
262 mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); 225
226 tsi_pci = of_find_node_by_type(NULL, "pci");
227 if (tsi_pci == 0) {
228 printk("%s: No tsi108 pci node found !\n", __FUNCTION__);
229 return;
230 }
231
232 cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
233 set_irq_data(cascade_pci_irq, mpic);
234 set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
235
263 tsi108_pci_int_init(); 236 tsi108_pci_int_init();
264 237
265 /* Configure MPIC outputs to CPU0 */ 238 /* Configure MPIC outputs to CPU0 */
266 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); 239 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
240 of_node_put(tsi_pic);
267} 241}
268 242
269void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) 243void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
@@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs)
320 return 0; 294 return 0;
321 295
322} 296}
297
323define_machine(mpc7448_hpc2){ 298define_machine(mpc7448_hpc2){
324 .name = "MPC7448 HPC2", 299 .name = "MPC7448 HPC2",
325 .probe = mpc7448_hpc2_probe, 300 .probe = mpc7448_hpc2_probe,
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c
index 26a0cc820cde..f3038461d4c0 100644
--- a/arch/powerpc/sysdev/tsi108_dev.c
+++ b/arch/powerpc/sysdev/tsi108_dev.c
@@ -93,13 +93,15 @@ static int __init tsi108_eth_of_init(void)
93 goto err; 93 goto err;
94 94
95 r[1].name = "tx"; 95 r[1].name = "tx";
96 r[1].start = np->intrs[0].line; 96 r[1].start = irq_of_parse_and_map(np, 0);
97 r[1].end = np->intrs[0].line; 97 r[1].end = irq_of_parse_and_map(np, 0);
98 r[1].flags = IORESOURCE_IRQ; 98 r[1].flags = IORESOURCE_IRQ;
99 DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n",
100 __FUNCTION__,r[1].name, r[1].start, r[1].end);
99 101
100 tsi_eth_dev = 102 tsi_eth_dev =
101 platform_device_register_simple("tsi-ethernet", i, &r[0], 103 platform_device_register_simple("tsi-ethernet", i, &r[0],
102 np->n_intrs + 1); 104 1);
103 105
104 if (IS_ERR(tsi_eth_dev)) { 106 if (IS_ERR(tsi_eth_dev)) {
105 ret = PTR_ERR(tsi_eth_dev); 107 ret = PTR_ERR(tsi_eth_dev);
@@ -127,7 +129,7 @@ static int __init tsi108_eth_of_init(void)
127 tsi_eth_data.regs = r[0].start; 129 tsi_eth_data.regs = r[0].start;
128 tsi_eth_data.phyregs = res.start; 130 tsi_eth_data.phyregs = res.start;
129 tsi_eth_data.phy = *phy_id; 131 tsi_eth_data.phy = *phy_id;
130 tsi_eth_data.irq_num = np->intrs[0].line; 132 tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0);
131 of_node_put(phy); 133 of_node_put(phy);
132 ret = 134 ret =
133 platform_device_add_data(tsi_eth_dev, &tsi_eth_data, 135 platform_device_add_data(tsi_eth_dev, &tsi_eth_data,
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 3265d54c82ed..2ab06ed3ae73 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -26,7 +26,6 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28 28
29
30#include <asm/byteorder.h> 29#include <asm/byteorder.h>
31#include <asm/io.h> 30#include <asm/io.h>
32#include <asm/irq.h> 31#include <asm/irq.h>
@@ -228,7 +227,7 @@ int __init tsi108_setup_pci(struct device_node *dev)
228 227
229 (hose)->ops = &tsi108_direct_pci_ops; 228 (hose)->ops = &tsi108_direct_pci_ops;
230 229
231 printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. " 230 printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. "
232 "Firmware bus number: %d->%d\n", 231 "Firmware bus number: %d->%d\n",
233 rsrc.start, hose->first_busno, hose->last_busno); 232 rsrc.start, hose->first_busno, hose->last_busno);
234 233
@@ -278,7 +277,7 @@ static void init_pci_source(void)
278 mb(); 277 mb();
279} 278}
280 279
281static inline int get_pci_source(void) 280static inline unsigned int get_pci_source(void)
282{ 281{
283 u_int temp = 0; 282 u_int temp = 0;
284 int irq = -1; 283 int irq = -1;
@@ -371,12 +370,12 @@ static void tsi108_pci_irq_end(u_int irq)
371 * Interrupt controller descriptor for cascaded PCI interrupt controller. 370 * Interrupt controller descriptor for cascaded PCI interrupt controller.
372 */ 371 */
373 372
374struct hw_interrupt_type tsi108_pci_irq = { 373static struct irq_chip tsi108_pci_irq = {
375 .typename = "tsi108_PCI_int", 374 .typename = "tsi108_PCI_int",
376 .enable = tsi108_pci_irq_enable, 375 .mask = tsi108_pci_irq_disable,
377 .disable = tsi108_pci_irq_disable,
378 .ack = tsi108_pci_irq_ack, 376 .ack = tsi108_pci_irq_ack,
379 .end = tsi108_pci_irq_end, 377 .end = tsi108_pci_irq_end,
378 .unmask = tsi108_pci_irq_enable,
380}; 379};
381 380
382/* 381/*
@@ -399,14 +398,18 @@ void __init tsi108_pci_int_init(void)
399 DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); 398 DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
400 399
401 for (i = 0; i < NUM_PCI_IRQS; i++) { 400 for (i = 0; i < NUM_PCI_IRQS; i++) {
402 irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq; 401 irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq;
403 irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; 402 irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL;
404 } 403 }
405 404
406 init_pci_source(); 405 init_pci_source();
407} 406}
408 407
409int tsi108_irq_cascade(struct pt_regs *regs, void *unused) 408void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
409 struct pt_regs *regs)
410{ 410{
411 return get_pci_source(); 411 unsigned int cascade_irq = get_pci_source();
412 if (cascade_irq != NO_IRQ)
413 generic_handle_irq(cascade_irq, regs);
414 desc->chip->eoi(irq);
412} 415}
diff --git a/include/asm-powerpc/tsi108.h b/include/asm-powerpc/tsi108.h
index c4c278d72f71..2c702d35a7cf 100644
--- a/include/asm-powerpc/tsi108.h
+++ b/include/asm-powerpc/tsi108.h
@@ -1,16 +1,18 @@
1/* 1/*
2 * include/asm-ppc/tsi108.h
3 *
4 * common routine and memory layout for Tundra TSI108(Grendel) host bridge 2 * common routine and memory layout for Tundra TSI108(Grendel) host bridge
5 * memory controller. 3 * memory controller.
6 * 4 *
7 * Author: Jacob Pan (jacob.pan@freescale.com) 5 * Author: Jacob Pan (jacob.pan@freescale.com)
8 * Alex Bounine (alexandreb@tundra.com) 6 * Alex Bounine (alexandreb@tundra.com)
9 * 2004 (c) Freescale Semiconductor Inc. This file is licensed under 7 *
10 * the terms of the GNU General Public License version 2. This program 8 * Copyright 2004-2006 Freescale Semiconductor, Inc.
11 * is licensed "as is" without any warranty of any kind, whether express 9 *
12 * or implied. 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
13 */ 14 */
15
14#ifndef __PPC_KERNEL_TSI108_H 16#ifndef __PPC_KERNEL_TSI108_H
15#define __PPC_KERNEL_TSI108_H 17#define __PPC_KERNEL_TSI108_H
16 18
diff --git a/include/asm-powerpc/tsi108_irq.h b/include/asm-powerpc/tsi108_irq.h
new file mode 100644
index 000000000000..3e4d04effa57
--- /dev/null
+++ b/include/asm-powerpc/tsi108_irq.h
@@ -0,0 +1,124 @@
1/*
2 * (C) Copyright 2005 Tundra Semiconductor Corp.
3 * Alex Bounine, <alexandreb at tundra.com).
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * definitions for interrupt controller initialization and external interrupt
26 * demultiplexing on TSI108EMU/SVB boards.
27 */
28
29#ifndef _ASM_PPC_TSI108_IRQ_H
30#define _ASM_PPC_TSI108_IRQ_H
31
32/*
33 * Tsi108 interrupts
34 */
35#ifndef TSI108_IRQ_REG_BASE
36#define TSI108_IRQ_REG_BASE 0
37#endif
38
39#define TSI108_IRQ(x) (TSI108_IRQ_REG_BASE + (x))
40
41#define TSI108_MAX_VECTORS (36 + 4) /* 36 sources + PCI INT demux */
42#define MAX_TASK_PRIO 0xF
43
44#define TSI108_IRQ_SPURIOUS (TSI108_MAX_VECTORS)
45
46#define DEFAULT_PRIO_LVL 10 /* initial priority level */
47
48/* Interrupt vectors assignment to external and internal
49 * sources of requests. */
50
51/* EXTERNAL INTERRUPT SOURCES */
52
53#define IRQ_TSI108_EXT_INT0 TSI108_IRQ(0) /* External Source at INT[0] */
54#define IRQ_TSI108_EXT_INT1 TSI108_IRQ(1) /* External Source at INT[1] */
55#define IRQ_TSI108_EXT_INT2 TSI108_IRQ(2) /* External Source at INT[2] */
56#define IRQ_TSI108_EXT_INT3 TSI108_IRQ(3) /* External Source at INT[3] */
57
58/* INTERNAL INTERRUPT SOURCES */
59
60#define IRQ_TSI108_RESERVED0 TSI108_IRQ(4) /* Reserved IRQ */
61#define IRQ_TSI108_RESERVED1 TSI108_IRQ(5) /* Reserved IRQ */
62#define IRQ_TSI108_RESERVED2 TSI108_IRQ(6) /* Reserved IRQ */
63#define IRQ_TSI108_RESERVED3 TSI108_IRQ(7) /* Reserved IRQ */
64#define IRQ_TSI108_DMA0 TSI108_IRQ(8) /* DMA0 */
65#define IRQ_TSI108_DMA1 TSI108_IRQ(9) /* DMA1 */
66#define IRQ_TSI108_DMA2 TSI108_IRQ(10) /* DMA2 */
67#define IRQ_TSI108_DMA3 TSI108_IRQ(11) /* DMA3 */
68#define IRQ_TSI108_UART0 TSI108_IRQ(12) /* UART0 */
69#define IRQ_TSI108_UART1 TSI108_IRQ(13) /* UART1 */
70#define IRQ_TSI108_I2C TSI108_IRQ(14) /* I2C */
71#define IRQ_TSI108_GPIO TSI108_IRQ(15) /* GPIO */
72#define IRQ_TSI108_GIGE0 TSI108_IRQ(16) /* GIGE0 */
73#define IRQ_TSI108_GIGE1 TSI108_IRQ(17) /* GIGE1 */
74#define IRQ_TSI108_RESERVED4 TSI108_IRQ(18) /* Reserved IRQ */
75#define IRQ_TSI108_HLP TSI108_IRQ(19) /* HLP */
76#define IRQ_TSI108_SDRAM TSI108_IRQ(20) /* SDC */
77#define IRQ_TSI108_PROC_IF TSI108_IRQ(21) /* Processor IF */
78#define IRQ_TSI108_RESERVED5 TSI108_IRQ(22) /* Reserved IRQ */
79#define IRQ_TSI108_PCI TSI108_IRQ(23) /* PCI/X block */
80
81#define IRQ_TSI108_MBOX0 TSI108_IRQ(24) /* Mailbox 0 register */
82#define IRQ_TSI108_MBOX1 TSI108_IRQ(25) /* Mailbox 1 register */
83#define IRQ_TSI108_MBOX2 TSI108_IRQ(26) /* Mailbox 2 register */
84#define IRQ_TSI108_MBOX3 TSI108_IRQ(27) /* Mailbox 3 register */
85
86#define IRQ_TSI108_DBELL0 TSI108_IRQ(28) /* Doorbell 0 */
87#define IRQ_TSI108_DBELL1 TSI108_IRQ(29) /* Doorbell 1 */
88#define IRQ_TSI108_DBELL2 TSI108_IRQ(30) /* Doorbell 2 */
89#define IRQ_TSI108_DBELL3 TSI108_IRQ(31) /* Doorbell 3 */
90
91#define IRQ_TSI108_TIMER0 TSI108_IRQ(32) /* Global Timer 0 */
92#define IRQ_TSI108_TIMER1 TSI108_IRQ(33) /* Global Timer 1 */
93#define IRQ_TSI108_TIMER2 TSI108_IRQ(34) /* Global Timer 2 */
94#define IRQ_TSI108_TIMER3 TSI108_IRQ(35) /* Global Timer 3 */
95
96/*
97 * PCI bus INTA# - INTD# lines demultiplexor
98 */
99#define IRQ_PCI_INTAD_BASE TSI108_IRQ(36)
100#define IRQ_PCI_INTA (IRQ_PCI_INTAD_BASE + 0)
101#define IRQ_PCI_INTB (IRQ_PCI_INTAD_BASE + 1)
102#define IRQ_PCI_INTC (IRQ_PCI_INTAD_BASE + 2)
103#define IRQ_PCI_INTD (IRQ_PCI_INTAD_BASE + 3)
104#define NUM_PCI_IRQS (4)
105
106/* number of entries in vector dispatch table */
107#define IRQ_TSI108_TAB_SIZE (TSI108_MAX_VECTORS + 1)
108
109/* Mapping of MPIC outputs to processors' interrupt pins */
110
111#define IDIR_INT_OUT0 0x1
112#define IDIR_INT_OUT1 0x2
113#define IDIR_INT_OUT2 0x4
114#define IDIR_INT_OUT3 0x8
115
116/*---------------------------------------------------------------
117 * IRQ line configuration parameters */
118
119/* Interrupt delivery modes */
120typedef enum {
121 TSI108_IRQ_DIRECTED,
122 TSI108_IRQ_DISTRIBUTED,
123} TSI108_IRQ_MODE;
124#endif /* _ASM_PPC_TSI108_IRQ_H */