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-rw-r--r--arch/powerpc/platforms/celleb/beat_wrapper.h220
-rw-r--r--arch/powerpc/platforms/celleb/hvCall.S287
2 files changed, 507 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/celleb/beat_wrapper.h b/arch/powerpc/platforms/celleb/beat_wrapper.h
new file mode 100644
index 000000000000..76ea0a6a9011
--- /dev/null
+++ b/arch/powerpc/platforms/celleb/beat_wrapper.h
@@ -0,0 +1,220 @@
1/*
2 * Beat hypervisor call I/F
3 *
4 * (C) Copyright 2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/pseries/plpar_wrapper.h.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 */
22#ifndef BEAT_HCALL
23#include "beat_syscall.h"
24
25/* defined in hvCall.S */
26extern s64 beat_hcall_norets(u64 opcode, ...);
27extern s64 beat_hcall_norets8(u64 opcode, u64 arg1, u64 arg2, u64 arg3,
28 u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8);
29extern s64 beat_hcall1(u64 opcode, u64 retbuf[1], ...);
30extern s64 beat_hcall2(u64 opcode, u64 retbuf[2], ...);
31extern s64 beat_hcall3(u64 opcode, u64 retbuf[3], ...);
32extern s64 beat_hcall4(u64 opcode, u64 retbuf[4], ...);
33extern s64 beat_hcall5(u64 opcode, u64 retbuf[5], ...);
34extern s64 beat_hcall6(u64 opcode, u64 retbuf[6], ...);
35
36static inline s64 beat_downcount_of_interrupt(u64 plug_id)
37{
38 return beat_hcall_norets(HV_downcount_of_interrupt, plug_id);
39}
40
41static inline s64 beat_set_interrupt_mask(u64 index,
42 u64 val0, u64 val1, u64 val2, u64 val3)
43{
44 return beat_hcall_norets(HV_set_interrupt_mask, index,
45 val0, val1, val2, val3);
46}
47
48static inline s64 beat_destruct_irq_plug(u64 plug_id)
49{
50 return beat_hcall_norets(HV_destruct_irq_plug, plug_id);
51}
52
53static inline s64 beat_construct_and_connect_irq_plug(u64 plug_id,
54 u64 outlet_id)
55{
56 return beat_hcall_norets(HV_construct_and_connect_irq_plug, plug_id,
57 outlet_id);
58}
59
60static inline s64 beat_detect_pending_interrupts(u64 index, u64 *retbuf)
61{
62 return beat_hcall4(HV_detect_pending_interrupts, retbuf, index);
63}
64
65static inline s64 beat_pause(u64 style)
66{
67 return beat_hcall_norets(HV_pause, style);
68}
69
70static inline s64 beat_read_htab_entries(u64 htab_id, u64 index, u64 *retbuf)
71{
72 return beat_hcall5(HV_read_htab_entries, retbuf, htab_id, index);
73}
74
75static inline s64 beat_insert_htab_entry(u64 htab_id, u64 group,
76 u64 bitmask, u64 hpte_v, u64 hpte_r, u64 *slot)
77{
78 u64 dummy[3];
79 s64 ret;
80
81 ret = beat_hcall3(HV_insert_htab_entry, dummy, htab_id, group,
82 bitmask, hpte_v, hpte_r);
83 *slot = dummy[0];
84 return ret;
85}
86
87static inline s64 beat_write_htab_entry(u64 htab_id, u64 slot,
88 u64 hpte_v, u64 hpte_r, u64 mask_v, u64 mask_r,
89 u64 *ret_v, u64 *ret_r)
90{
91 u64 dummy[2];
92 s64 ret;
93
94 ret = beat_hcall2(HV_write_htab_entry, dummy, htab_id, slot,
95 hpte_v, hpte_r, mask_v, mask_r);
96 *ret_v = dummy[0];
97 *ret_r = dummy[1];
98 return ret;
99}
100
101static inline void beat_shutdown_logical_partition(u64 code)
102{
103 (void)beat_hcall_norets(HV_shutdown_logical_partition, code);
104}
105
106static inline s64 beat_rtc_write(u64 time_from_epoch)
107{
108 return beat_hcall_norets(HV_rtc_write, time_from_epoch);
109}
110
111static inline s64 beat_rtc_read(u64 *time_from_epoch)
112{
113 u64 dummy[1];
114 s64 ret;
115
116 ret = beat_hcall1(HV_rtc_read, dummy);
117 *time_from_epoch = dummy[0];
118 return ret;
119}
120
121#define BEAT_NVRW_CNT (sizeof(u64) * 6)
122
123static inline s64 beat_eeprom_write(u64 index, u64 length, u8 *buffer)
124{
125 u64 b[6];
126
127 if (length > BEAT_NVRW_CNT)
128 return -1;
129 memcpy(b, buffer, sizeof(b));
130 return beat_hcall_norets8(HV_eeprom_write, index, length,
131 b[0], b[1], b[2], b[3], b[4], b[5]);
132}
133
134static inline s64 beat_eeprom_read(u64 index, u64 length, u8 *buffer)
135{
136 u64 b[6];
137 s64 ret;
138
139 if (length > BEAT_NVRW_CNT)
140 return -1;
141 ret = beat_hcall6(HV_eeprom_read, b, index, length);
142 memcpy(buffer, b, length);
143 return ret;
144}
145
146static inline s64 beat_set_dabr(u64 value, u64 style)
147{
148 return beat_hcall_norets(HV_set_dabr, value, style);
149}
150
151static inline s64 beat_get_characters_from_console(u64 termno, u64 *len,
152 u8 *buffer)
153{
154 u64 dummy[3];
155 s64 ret;
156
157 ret = beat_hcall3(HV_get_characters_from_console, dummy, termno, len);
158 *len = dummy[0];
159 memcpy(buffer, dummy + 1, *len);
160 return ret;
161}
162
163static inline s64 beat_put_characters_to_console(u64 termno, u64 len,
164 u8 *buffer)
165{
166 u64 b[2];
167
168 memcpy(b, buffer, len);
169 return beat_hcall_norets(HV_put_characters_to_console, termno, len, b[0], b[1]);
170}
171
172static inline s64 beat_get_spe_privileged_state_1_registers(
173 u64 id, u64 offsetof, u64 *value)
174{
175 u64 dummy[1];
176 s64 ret;
177
178 ret = beat_hcall1(HV_get_spe_privileged_state_1_registers, dummy, id,
179 offsetof);
180 *value = dummy[0];
181 return ret;
182}
183
184static inline s64 beat_set_irq_mask_for_spe(u64 id, u64 class, u64 mask)
185{
186 return beat_hcall_norets(HV_set_irq_mask_for_spe, id, class, mask);
187}
188
189static inline s64 beat_clear_interrupt_status_of_spe(u64 id, u64 class,
190 u64 mask)
191{
192 return beat_hcall_norets(HV_clear_interrupt_status_of_spe,
193 id, class, mask);
194}
195
196static inline s64 beat_set_spe_privileged_state_1_registers(
197 u64 id, u64 offsetof, u64 value)
198{
199 return beat_hcall_norets(HV_set_spe_privileged_state_1_registers,
200 id, offsetof, value);
201}
202
203static inline s64 beat_get_interrupt_status_of_spe(u64 id, u64 class, u64 *val)
204{
205 u64 dummy[1];
206 s64 ret;
207
208 ret = beat_hcall1(HV_get_interrupt_status_of_spe, dummy, id, class);
209 *val = dummy[0];
210 return ret;
211}
212
213static inline s64 beat_put_iopte(u64 ioas_id, u64 io_addr, u64 real_addr,
214 u64 ioid, u64 flags)
215{
216 return beat_hcall_norets(HV_put_iopte, ioas_id, io_addr, real_addr,
217 ioid, flags);
218}
219
220#endif
diff --git a/arch/powerpc/platforms/celleb/hvCall.S b/arch/powerpc/platforms/celleb/hvCall.S
new file mode 100644
index 000000000000..74c817448948
--- /dev/null
+++ b/arch/powerpc/platforms/celleb/hvCall.S
@@ -0,0 +1,287 @@
1/*
2 * Beat hypervisor call I/F
3 *
4 * (C) Copyright 2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/pseries/hvCall.S.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 */
22
23#include <asm/ppc_asm.h>
24
25#define STK_PARM(i) (48 + ((i)-3)*8)
26
27/* Not implemented on Beat, now */
28#define HCALL_INST_PRECALL
29#define HCALL_INST_POSTCALL
30
31 .text
32
33#define HVSC .long 0x44000022
34
35/* Note: takes only 7 input parameters at maximum */
36_GLOBAL(beat_hcall_norets)
37 HMT_MEDIUM
38
39 mfcr r0
40 stw r0,8(r1)
41
42 HCALL_INST_PRECALL
43
44 mr r11,r3
45 mr r3,r4
46 mr r4,r5
47 mr r5,r6
48 mr r6,r7
49 mr r7,r8
50 mr r8,r9
51
52 HVSC /* invoke the hypervisor */
53
54 HCALL_INST_POSTCALL
55
56 lwz r0,8(r1)
57 mtcrf 0xff,r0
58
59 blr /* return r3 = status */
60
61/* Note: takes 8 input parameters at maximum */
62_GLOBAL(beat_hcall_norets8)
63 HMT_MEDIUM
64
65 mfcr r0
66 stw r0,8(r1)
67
68 HCALL_INST_PRECALL
69
70 mr r11,r3
71 mr r3,r4
72 mr r4,r5
73 mr r5,r6
74 mr r6,r7
75 mr r7,r8
76 mr r8,r9
77 ld r10,STK_PARM(r10)(r1)
78
79 HVSC /* invoke the hypervisor */
80
81 HCALL_INST_POSTCALL
82
83 lwz r0,8(r1)
84 mtcrf 0xff,r0
85
86 blr /* return r3 = status */
87
88/* Note: takes only 6 input parameters, 1 output parameters at maximum */
89_GLOBAL(beat_hcall1)
90 HMT_MEDIUM
91
92 mfcr r0
93 stw r0,8(r1)
94
95 HCALL_INST_PRECALL
96
97 std r4,STK_PARM(r4)(r1) /* save ret buffer */
98
99 mr r11,r3
100 mr r3,r5
101 mr r4,r6
102 mr r5,r7
103 mr r6,r8
104 mr r7,r9
105 mr r8,r10
106
107 HVSC /* invoke the hypervisor */
108
109 HCALL_INST_POSTCALL
110
111 ld r12,STK_PARM(r4)(r1)
112 std r4, 0(r12)
113
114 lwz r0,8(r1)
115 mtcrf 0xff,r0
116
117 blr /* return r3 = status */
118
119/* Note: takes only 6 input parameters, 2 output parameters at maximum */
120_GLOBAL(beat_hcall2)
121 HMT_MEDIUM
122
123 mfcr r0
124 stw r0,8(r1)
125
126 HCALL_INST_PRECALL
127
128 std r4,STK_PARM(r4)(r1) /* save ret buffer */
129
130 mr r11,r3
131 mr r3,r5
132 mr r4,r6
133 mr r5,r7
134 mr r6,r8
135 mr r7,r9
136 mr r8,r10
137
138 HVSC /* invoke the hypervisor */
139
140 HCALL_INST_POSTCALL
141
142 ld r12,STK_PARM(r4)(r1)
143 std r4, 0(r12)
144 std r5, 8(r12)
145
146 lwz r0,8(r1)
147 mtcrf 0xff,r0
148
149 blr /* return r3 = status */
150
151/* Note: takes only 6 input parameters, 3 output parameters at maximum */
152_GLOBAL(beat_hcall3)
153 HMT_MEDIUM
154
155 mfcr r0
156 stw r0,8(r1)
157
158 HCALL_INST_PRECALL
159
160 std r4,STK_PARM(r4)(r1) /* save ret buffer */
161
162 mr r11,r3
163 mr r3,r5
164 mr r4,r6
165 mr r5,r7
166 mr r6,r8
167 mr r7,r9
168 mr r8,r10
169
170 HVSC /* invoke the hypervisor */
171
172 HCALL_INST_POSTCALL
173
174 ld r12,STK_PARM(r4)(r1)
175 std r4, 0(r12)
176 std r5, 8(r12)
177 std r6, 16(r12)
178
179 lwz r0,8(r1)
180 mtcrf 0xff,r0
181
182 blr /* return r3 = status */
183
184/* Note: takes only 6 input parameters, 4 output parameters at maximum */
185_GLOBAL(beat_hcall4)
186 HMT_MEDIUM
187
188 mfcr r0
189 stw r0,8(r1)
190
191 HCALL_INST_PRECALL
192
193 std r4,STK_PARM(r4)(r1) /* save ret buffer */
194
195 mr r11,r3
196 mr r3,r5
197 mr r4,r6
198 mr r5,r7
199 mr r6,r8
200 mr r7,r9
201 mr r8,r10
202
203 HVSC /* invoke the hypervisor */
204
205 HCALL_INST_POSTCALL
206
207 ld r12,STK_PARM(r4)(r1)
208 std r4, 0(r12)
209 std r5, 8(r12)
210 std r6, 16(r12)
211 std r7, 24(r12)
212
213 lwz r0,8(r1)
214 mtcrf 0xff,r0
215
216 blr /* return r3 = status */
217
218/* Note: takes only 6 input parameters, 5 output parameters at maximum */
219_GLOBAL(beat_hcall5)
220 HMT_MEDIUM
221
222 mfcr r0
223 stw r0,8(r1)
224
225 HCALL_INST_PRECALL
226
227 std r4,STK_PARM(r4)(r1) /* save ret buffer */
228
229 mr r11,r3
230 mr r3,r5
231 mr r4,r6
232 mr r5,r7
233 mr r6,r8
234 mr r7,r9
235 mr r8,r10
236
237 HVSC /* invoke the hypervisor */
238
239 HCALL_INST_POSTCALL
240
241 ld r12,STK_PARM(r4)(r1)
242 std r4, 0(r12)
243 std r5, 8(r12)
244 std r6, 16(r12)
245 std r7, 24(r12)
246 std r8, 32(r12)
247
248 lwz r0,8(r1)
249 mtcrf 0xff,r0
250
251 blr /* return r3 = status */
252
253/* Note: takes only 6 input parameters, 6 output parameters at maximum */
254_GLOBAL(beat_hcall6)
255 HMT_MEDIUM
256
257 mfcr r0
258 stw r0,8(r1)
259
260 HCALL_INST_PRECALL
261
262 std r4,STK_PARM(r4)(r1) /* save ret buffer */
263
264 mr r11,r3
265 mr r3,r5
266 mr r4,r6
267 mr r5,r7
268 mr r6,r8
269 mr r7,r9
270 mr r8,r10
271
272 HVSC /* invoke the hypervisor */
273
274 HCALL_INST_POSTCALL
275
276 ld r12,STK_PARM(r4)(r1)
277 std r4, 0(r12)
278 std r5, 8(r12)
279 std r6, 16(r12)
280 std r7, 24(r12)
281 std r8, 32(r12)
282 std r9, 40(r12)
283
284 lwz r0,8(r1)
285 mtcrf 0xff,r0
286
287 blr /* return r3 = status */