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-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c4
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h176
2 files changed, 177 insertions, 3 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index aa92e3708838..2b544363c078 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -453,8 +453,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
453 local_write_config(PCI_COMMAND, 2, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); 453 local_write_config(PCI_COMMAND, 2, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
454 454
455 res[0].name = "PCI I/O Space"; 455 res[0].name = "PCI I/O Space";
456 res[0].start = 0x00001000; 456 res[0].start = 0x00000000;
457 res[0].end = 0xffff0000; 457 res[0].end = 0x0000ffff;
458 res[0].flags = IORESOURCE_IO; 458 res[0].flags = IORESOURCE_IO;
459 459
460 res[1].name = "PCI Memory Space"; 460 res[1].name = "PCI Memory Space";
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index c27b9d3079a7..7495026e2c18 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Author: Deepak Saxena <dsaxena@plexity.net> 4 * Author: Deepak Saxena <dsaxena@plexity.net>
5 * 5 *
6 * Copyright (C) 2002-2004 MontaVista Software, Inc. 6 * Copyright (C) 2002-2005 MontaVista Software, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -383,6 +383,180 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
383 *vaddr++ = inl(io_addr); 383 *vaddr++ = inl(io_addr);
384} 384}
385 385
386#define __is_io_address(p) (((unsigned long)p >= 0x0) && \
387 ((unsigned long)p <= 0x0000ffff))
388static inline unsigned int
389__ixp4xx_ioread8(void __iomem *port)
390{
391 if (__is_io_address(port))
392 return (unsigned int)__ixp4xx_inb((unsigned int)port);
393 else
394#ifndef CONFIG_IXP4XX_INDIRECT_PCI
395 return (unsigned int)__raw_readb((u32)port);
396#else
397 return (unsigned int)__ixp4xx_readb((u32)port);
398#endif
399}
400
401static inline void
402__ixp4xx_ioread8_rep(u32 port, u8 *vaddr, u32 count)
403{
404 if (__is_io_address(port))
405 __ixp4xx_insb(port, vaddr, count);
406 else
407#ifndef CONFIG_IXP4XX_INDIRECT_PCI
408 __raw_readsb((void __iomem *)port, vaddr, count);
409#else
410 __ixp4xx_readsb(port, vaddr, count);
411#endif
412}
413
414static inline unsigned int
415__ixp4xx_ioread16(void __iomem *port)
416{
417 if (__is_io_address(port))
418 return (unsigned int)__ixp4xx_inw((unsigned int)port);
419 else
420#ifndef CONFIG_IXP4XX_INDIRECT_PCI
421 return le16_to_cpu(__raw_readw((u32)port));
422#else
423 return (unsigned int)__ixp4xx_readw((u32)port);
424#endif
425}
426
427static inline void
428__ixp4xx_ioread16_rep(u32 port, u16 *vaddr, u32 count)
429{
430 if (__is_io_address(port))
431 __ixp4xx_insw(port, vaddr, count);
432 else
433#ifndef CONFIG_IXP4XX_INDIRECT_PCI
434 __raw_readsw((void __iomem *)port, vaddr, count);
435#else
436 __ixp4xx_readsw(port, vaddr, count);
437#endif
438}
439
440static inline unsigned int
441__ixp4xx_ioread32(void __iomem *port)
442{
443 if (__is_io_address(port))
444 return (unsigned int)__ixp4xx_inl((unsigned int)port);
445 else {
446#ifndef CONFIG_IXP4XX_INDIRECT_PCI
447 return le32_to_cpu(__raw_readl((u32)port));
448#else
449 return (unsigned int)__ixp4xx_readl((u32)port);
450#endif
451 }
452}
453
454static inline void
455__ixp4xx_ioread32_rep(u32 port, u32 *vaddr, u32 count)
456{
457 if (__is_io_address(port))
458 __ixp4xx_insl(port, vaddr, count);
459 else
460#ifndef CONFIG_IXP4XX_INDIRECT_PCI
461 __raw_readsl((void __iomem *)port, vaddr, count);
462#else
463 __ixp4xx_readsl(port, vaddr, count);
464#endif
465}
466
467static inline void
468__ixp4xx_iowrite8(u8 value, void __iomem *port)
469{
470 if (__is_io_address(port))
471 __ixp4xx_outb(value, (unsigned int)port);
472 else
473#ifndef CONFIG_IXP4XX_INDIRECT_PCI
474 __raw_writeb(value, (u32)port);
475#else
476 __ixp4xx_writeb(value, (u32)port);
477#endif
478}
479
480static inline void
481__ixp4xx_iowrite8_rep(u32 port, u8 *vaddr, u32 count)
482{
483 if (__is_io_address(port))
484 __ixp4xx_outsb(port, vaddr, count);
485#ifndef CONFIG_IXP4XX_INDIRECT_PCI
486 __raw_writesb((void __iomem *)port, vaddr, count);
487#else
488 __ixp4xx_writesb(port, vaddr, count);
489#endif
490}
491
492static inline void
493__ixp4xx_iowrite16(u16 value, void __iomem *port)
494{
495 if (__is_io_address(port))
496 __ixp4xx_outw(value, (unsigned int)port);
497 else
498#ifndef CONFIG_IXP4XX_INDIRECT_PCI
499 __raw_writew(cpu_to_le16(value), (u32)port);
500#else
501 __ixp4xx_writew(value, (u32)port);
502#endif
503}
504
505static inline void
506__ixp4xx_iowrite16_rep(u32 port, u16 *vaddr, u32 count)
507{
508 if (__is_io_address(port))
509 __ixp4xx_outsw(port, vaddr, count);
510#ifndef CONFIG_IXP4XX_INDIRECT_PCI
511 __raw_readsw((void __iomem *)port, vaddr, count);
512#else
513 __ixp4xx_writesw(port, vaddr, count);
514#endif
515}
516
517static inline void
518__ixp4xx_iowrite32(u32 value, void __iomem *port)
519{
520 if (__is_io_address(port))
521 __ixp4xx_outl(value, (unsigned int)port);
522 else
523#ifndef CONFIG_IXP4XX_INDIRECT_PCI
524 __raw_writel(cpu_to_le32(value), (u32)port);
525#else
526 __ixp4xx_writel(value, (u32)port);
527#endif
528}
529
530static inline void
531__ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count)
532{
533 if (__is_io_address(port))
534 __ixp4xx_outsl(port, vaddr, count);
535#ifndef CONFIG_IXP4XX_INDIRECT_PCI
536 __raw_readsl((void __iomem *)port, vaddr, count);
537#else
538 __ixp4xx_outsl(port, vaddr, count);
539#endif
540}
541
542#define ioread8(p) __ixp4xx_ioread8(p)
543#define ioread16(p) __ixp4xx_ioread16(p)
544#define ioread32(p) __ixp4xx_ioread32(p)
545
546#define ioread8_rep(p, v, c) __ixp4xx_ioread8_rep(p, v, c)
547#define ioread16_rep(p, v, c) __ixp4xx_ioread16_rep(p, v, c)
548#define ioread32_rep(p, v, c) __ixp4xx_ioread32_rep(p, v, c)
549
550#define iowrite8(v,p) __ixp4xx_iowrite8(v,p)
551#define iowrite16(v,p) __ixp4xx_iowrite16(v,p)
552#define iowrite32(v,p) __ixp4xx_iowrite32(v,p)
553
554#define iowrite8_rep(p, v, c) __ixp4xx_iowrite8_rep(p, v, c)
555#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c)
556#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c)
557
558#define ioport_map(port, nr) ((void __iomem*)port)
559#define ioport_unmap(addr)
386 560
387#endif // __ASM_ARM_ARCH_IO_H 561#endif // __ASM_ARM_ARCH_IO_H
388 562