diff options
| -rw-r--r-- | arch/powerpc/include/asm/cputable.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index f99813f1ede6..1e94b07a020e 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
| @@ -193,6 +193,7 @@ extern const char *powerpc_base_platform; | |||
| 193 | #define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) | 193 | #define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) |
| 194 | #define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) | 194 | #define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) |
| 195 | #define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) | 195 | #define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) |
| 196 | #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000) | ||
| 196 | 197 | ||
| 197 | #ifndef __ASSEMBLY__ | 198 | #ifndef __ASSEMBLY__ |
| 198 | 199 | ||
| @@ -388,10 +389,11 @@ extern const char *powerpc_base_platform; | |||
| 388 | CPU_FTR_MMCRA | CPU_FTR_CTRL) | 389 | CPU_FTR_MMCRA | CPU_FTR_CTRL) |
| 389 | #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 390 | #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| 390 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 391 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
| 391 | CPU_FTR_MMCRA) | 392 | CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ) |
| 392 | #define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 393 | #define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| 393 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 394 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
| 394 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) | 395 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \ |
| 396 | CPU_FTR_CP_USE_DCBTZ) | ||
| 395 | #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 397 | #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| 396 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 398 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
| 397 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 399 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
| @@ -412,7 +414,8 @@ extern const char *powerpc_base_platform; | |||
| 412 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 414 | #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| 413 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 415 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
| 414 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 416 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
| 415 | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) | 417 | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \ |
| 418 | CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ) | ||
| 416 | #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 419 | #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| 417 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ | 420 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ |
| 418 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ | 421 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ |