5 files changed, 23 insertions, 17 deletions

diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index c5600b89f628..8a2510c5236f 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1159,14 +1159,14 @@ static struct davinci_id da830_ids[] = {
 
 static struct davinci_timer_instance da830_timer_instance[2] = {
         {
-                .base           = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
+                .base           = DA8XX_TIMER64P0_BASE,
                 .bottom_irq     = IRQ_DA8XX_TINT12_0,
                 .top_irq        = IRQ_DA8XX_TINT34_0,
                 .cmp_off        = DA830_CMP12_0,
                 .cmp_irq        = IRQ_DA830_T12CMPINT0_0,
         },
         {
-                .base           = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
+                .base           = DA8XX_TIMER64P1_BASE,
                 .bottom_irq     = IRQ_DA8XX_TINT12_1,
                 .top_irq        = IRQ_DA8XX_TINT34_1,
                 .cmp_off        = DA830_CMP12_0,
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index fcf701628590..ebfa5ca29a81 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -800,22 +800,22 @@ static struct davinci_id da850_ids[] = {
 
 static struct davinci_timer_instance da850_timer_instance[4] = {
         {
-                .base           = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
+                .base           = DA8XX_TIMER64P0_BASE,
                 .bottom_irq     = IRQ_DA8XX_TINT12_0,
                 .top_irq        = IRQ_DA8XX_TINT34_0,
         },
         {
-                .base           = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
+                .base           = DA8XX_TIMER64P1_BASE,
                 .bottom_irq     = IRQ_DA8XX_TINT12_1,
                 .top_irq        = IRQ_DA8XX_TINT34_1,
         },
         {
-                .base           = IO_ADDRESS(DA850_TIMER64P2_BASE),
+                .base           = DA850_TIMER64P2_BASE,
                 .bottom_irq     = IRQ_DA850_TINT12_2,
                 .top_irq        = IRQ_DA850_TINT34_2,
         },
         {
-                .base           = IO_ADDRESS(DA850_TIMER64P3_BASE),
+                .base           = DA850_TIMER64P3_BASE,
                 .bottom_irq     = IRQ_DA850_TINT12_3,
                 .top_irq        = IRQ_DA850_TINT34_3,
         },
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index d9c82ee434e0..8b7201e4c79c 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -297,12 +297,12 @@ static void davinci_init_wdt(void)
 
 struct davinci_timer_instance davinci_timer_instance[2] = {
         {
-                .base           = IO_ADDRESS(DAVINCI_TIMER0_BASE),
+                .base           = DAVINCI_TIMER0_BASE,
                 .bottom_irq     = IRQ_TINT0_TINT12,
                 .top_irq        = IRQ_TINT0_TINT34,
         },
         {
-                .base           = IO_ADDRESS(DAVINCI_TIMER1_BASE),
+                .base           = DAVINCI_TIMER1_BASE,
                 .bottom_irq     = IRQ_TINT1_TINT12,
                 .top_irq        = IRQ_TINT1_TINT34,
         },
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 1078458bdd54..2e1546401397 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -24,7 +24,7 @@ extern void __iomem *davinci_intc_base;
 extern int davinci_intc_type;
 
 struct davinci_timer_instance {
-        void __iomem    *base;
+        u32             base;
         u32             bottom_irq;
         u32             top_irq;
         unsigned long   cmp_off;
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index e5c598a387be..0f21c36e65dd 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -197,32 +197,36 @@ static void __init timer_init(void)
 {
         struct davinci_soc_info *soc_info = &davinci_soc_info;
         struct davinci_timer_instance *dtip = soc_info->timer_info->timers;
+        void __iomem *base[2];
         int i;
 
         /* Global init of each 64-bit timer as a whole */
         for(i=0; i<2; i++) {
                 u32 tgcr;
-                void __iomem *base = dtip[i].base;
+
+                base[i] = ioremap(dtip[i].base, SZ_4K);
+                if (WARN_ON(!base[i]))
+                        continue;
 
                 /* Disabled, Internal clock source */
-                __raw_writel(0, base + TCR);
+                __raw_writel(0, base[i] + TCR);
 
                 /* reset both timers, no pre-scaler for timer34 */
                 tgcr = 0;
-                __raw_writel(tgcr, base + TGCR);
+                __raw_writel(tgcr, base[i] + TGCR);
 
                 /* Set both timers to unchained 32-bit */
                 tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
-                __raw_writel(tgcr, base + TGCR);
+                __raw_writel(tgcr, base[i] + TGCR);
 
                 /* Unreset timers */
                 tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
                         (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
-                __raw_writel(tgcr, base + TGCR);
+                __raw_writel(tgcr, base[i] + TGCR);
 
                 /* Init both counters to zero */
-                __raw_writel(0, base + TIM12);
-                __raw_writel(0, base + TIM34);
+                __raw_writel(0, base[i] + TIM12);
+                __raw_writel(0, base[i] + TIM34);
         }
 
         /* Init of each timer as a 32-bit timer */
@@ -231,7 +235,9 @@ static void __init timer_init(void)
                 int timer = ID_TO_TIMER(t->id);
                 u32 irq;
 
-                t->base = dtip[timer].base;
+                t->base = base[timer];
+                if (!t->base)
+                        continue;
 
                 if (IS_TIMER_BOT(t->id)) {
                         t->enamode_shift = 6;