diff options
| -rw-r--r-- | drivers/net/via-velocity.c | 178 | ||||
| -rw-r--r-- | drivers/net/via-velocity.h | 204 |
2 files changed, 176 insertions, 206 deletions
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c index fd1ff123efa0..4ae05799ac44 100644 --- a/drivers/net/via-velocity.c +++ b/drivers/net/via-velocity.c | |||
| @@ -85,6 +85,163 @@ | |||
| 85 | static int velocity_nics = 0; | 85 | static int velocity_nics = 0; |
| 86 | static int msglevel = MSG_LEVEL_INFO; | 86 | static int msglevel = MSG_LEVEL_INFO; |
| 87 | 87 | ||
| 88 | /** | ||
| 89 | * mac_get_cam_mask - Read a CAM mask | ||
| 90 | * @regs: register block for this velocity | ||
| 91 | * @mask: buffer to store mask | ||
| 92 | * | ||
| 93 | * Fetch the mask bits of the selected CAM and store them into the | ||
| 94 | * provided mask buffer. | ||
| 95 | */ | ||
| 96 | |||
| 97 | static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | ||
| 98 | { | ||
| 99 | int i; | ||
| 100 | |||
| 101 | /* Select CAM mask */ | ||
| 102 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 103 | |||
| 104 | writeb(0, ®s->CAMADDR); | ||
| 105 | |||
| 106 | /* read mask */ | ||
| 107 | for (i = 0; i < 8; i++) | ||
| 108 | *mask++ = readb(&(regs->MARCAM[i])); | ||
| 109 | |||
| 110 | /* disable CAMEN */ | ||
| 111 | writeb(0, ®s->CAMADDR); | ||
| 112 | |||
| 113 | /* Select mar */ | ||
| 114 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 115 | |||
| 116 | } | ||
| 117 | |||
| 118 | |||
| 119 | /** | ||
| 120 | * mac_set_cam_mask - Set a CAM mask | ||
| 121 | * @regs: register block for this velocity | ||
| 122 | * @mask: CAM mask to load | ||
| 123 | * | ||
| 124 | * Store a new mask into a CAM | ||
| 125 | */ | ||
| 126 | |||
| 127 | static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | ||
| 128 | { | ||
| 129 | int i; | ||
| 130 | /* Select CAM mask */ | ||
| 131 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 132 | |||
| 133 | writeb(CAMADDR_CAMEN, ®s->CAMADDR); | ||
| 134 | |||
| 135 | for (i = 0; i < 8; i++) { | ||
| 136 | writeb(*mask++, &(regs->MARCAM[i])); | ||
| 137 | } | ||
| 138 | /* disable CAMEN */ | ||
| 139 | writeb(0, ®s->CAMADDR); | ||
| 140 | |||
| 141 | /* Select mar */ | ||
| 142 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 143 | } | ||
| 144 | |||
| 145 | static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | ||
| 146 | { | ||
| 147 | int i; | ||
| 148 | /* Select CAM mask */ | ||
| 149 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 150 | |||
| 151 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); | ||
| 152 | |||
| 153 | for (i = 0; i < 8; i++) { | ||
| 154 | writeb(*mask++, &(regs->MARCAM[i])); | ||
| 155 | } | ||
| 156 | /* disable CAMEN */ | ||
| 157 | writeb(0, ®s->CAMADDR); | ||
| 158 | |||
| 159 | /* Select mar */ | ||
| 160 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 161 | } | ||
| 162 | |||
| 163 | /** | ||
| 164 | * mac_set_cam - set CAM data | ||
| 165 | * @regs: register block of this velocity | ||
| 166 | * @idx: Cam index | ||
| 167 | * @addr: 2 or 6 bytes of CAM data | ||
| 168 | * | ||
| 169 | * Load an address or vlan tag into a CAM | ||
| 170 | */ | ||
| 171 | |||
| 172 | static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr) | ||
| 173 | { | ||
| 174 | int i; | ||
| 175 | |||
| 176 | /* Select CAM mask */ | ||
| 177 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 178 | |||
| 179 | idx &= (64 - 1); | ||
| 180 | |||
| 181 | writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); | ||
| 182 | |||
| 183 | for (i = 0; i < 6; i++) { | ||
| 184 | writeb(*addr++, &(regs->MARCAM[i])); | ||
| 185 | } | ||
| 186 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | ||
| 187 | |||
| 188 | udelay(10); | ||
| 189 | |||
| 190 | writeb(0, ®s->CAMADDR); | ||
| 191 | |||
| 192 | /* Select mar */ | ||
| 193 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 194 | } | ||
| 195 | |||
| 196 | static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx, | ||
| 197 | const u8 *addr) | ||
| 198 | { | ||
| 199 | |||
| 200 | /* Select CAM mask */ | ||
| 201 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 202 | |||
| 203 | idx &= (64 - 1); | ||
| 204 | |||
| 205 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, ®s->CAMADDR); | ||
| 206 | writew(*((u16 *) addr), ®s->MARCAM[0]); | ||
| 207 | |||
| 208 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | ||
| 209 | |||
| 210 | udelay(10); | ||
| 211 | |||
| 212 | writeb(0, ®s->CAMADDR); | ||
| 213 | |||
| 214 | /* Select mar */ | ||
| 215 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 216 | } | ||
| 217 | |||
| 218 | |||
| 219 | /** | ||
| 220 | * mac_wol_reset - reset WOL after exiting low power | ||
| 221 | * @regs: register block of this velocity | ||
| 222 | * | ||
| 223 | * Called after we drop out of wake on lan mode in order to | ||
| 224 | * reset the Wake on lan features. This function doesn't restore | ||
| 225 | * the rest of the logic from the result of sleep/wakeup | ||
| 226 | */ | ||
| 227 | |||
| 228 | static void mac_wol_reset(struct mac_regs __iomem * regs) | ||
| 229 | { | ||
| 230 | |||
| 231 | /* Turn off SWPTAG right after leaving power mode */ | ||
| 232 | BYTE_REG_BITS_OFF(STICKHW_SWPTAG, ®s->STICKHW); | ||
| 233 | /* clear sticky bits */ | ||
| 234 | BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | ||
| 235 | |||
| 236 | BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, ®s->CHIPGCR); | ||
| 237 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | ||
| 238 | /* disable force PME-enable */ | ||
| 239 | writeb(WOLCFG_PMEOVR, ®s->WOLCFGClr); | ||
| 240 | /* disable power-event config bit */ | ||
| 241 | writew(0xFFFF, ®s->WOLCRClr); | ||
| 242 | /* clear power status */ | ||
| 243 | writew(0xFFFF, ®s->WOLSRClr); | ||
| 244 | } | ||
| 88 | 245 | ||
| 89 | static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); | 246 | static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); |
| 90 | static const struct ethtool_ops velocity_ethtool_ops; | 247 | static const struct ethtool_ops velocity_ethtool_ops; |
| @@ -309,7 +466,7 @@ MODULE_DEVICE_TABLE(pci, velocity_id_table); | |||
| 309 | * a pointer a static string valid while the driver is loaded. | 466 | * a pointer a static string valid while the driver is loaded. |
| 310 | */ | 467 | */ |
| 311 | 468 | ||
| 312 | static char __devinit *get_chip_name(enum chip_type chip_id) | 469 | static const char __devinit *get_chip_name(enum chip_type chip_id) |
| 313 | { | 470 | { |
| 314 | int i; | 471 | int i; |
| 315 | for (i = 0; chip_info_table[i].name != NULL; i++) | 472 | for (i = 0; chip_info_table[i].name != NULL; i++) |
| @@ -458,8 +615,8 @@ static void velocity_init_cam_filter(struct velocity_info *vptr) | |||
| 458 | /* Disable all CAMs */ | 615 | /* Disable all CAMs */ |
| 459 | memset(vptr->vCAMmask, 0, sizeof(u8) * 8); | 616 | memset(vptr->vCAMmask, 0, sizeof(u8) * 8); |
| 460 | memset(vptr->mCAMmask, 0, sizeof(u8) * 8); | 617 | memset(vptr->mCAMmask, 0, sizeof(u8) * 8); |
| 461 | mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM); | 618 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); |
| 462 | mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM); | 619 | mac_set_cam_mask(regs, vptr->mCAMmask); |
| 463 | 620 | ||
| 464 | /* Enable first VCAM */ | 621 | /* Enable first VCAM */ |
| 465 | if (vptr->vlgrp) { | 622 | if (vptr->vlgrp) { |
| @@ -471,17 +628,16 @@ static void velocity_init_cam_filter(struct velocity_info *vptr) | |||
| 471 | if (vid != 0) | 628 | if (vid != 0) |
| 472 | WORD_REG_BITS_ON(MCFG_RTGOPT, ®s->MCFG); | 629 | WORD_REG_BITS_ON(MCFG_RTGOPT, ®s->MCFG); |
| 473 | 630 | ||
| 474 | mac_set_cam(regs, 0, (u8 *) &vid, | 631 | mac_set_vlan_cam(regs, 0, (u8 *) &vid); |
| 475 | VELOCITY_VLAN_ID_CAM); | ||
| 476 | } | 632 | } |
| 477 | } | 633 | } |
| 478 | vptr->vCAMmask[0] |= 1; | 634 | vptr->vCAMmask[0] |= 1; |
| 479 | mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM); | 635 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); |
| 480 | } else { | 636 | } else { |
| 481 | u16 temp = 0; | 637 | u16 temp = 0; |
| 482 | mac_set_cam(regs, 0, (u8 *) &temp, VELOCITY_VLAN_ID_CAM); | 638 | mac_set_vlan_cam(regs, 0, (u8 *) &temp); |
| 483 | temp = 1; | 639 | temp = 1; |
| 484 | mac_set_cam_mask(regs, (u8 *) &temp, VELOCITY_VLAN_ID_CAM); | 640 | mac_set_vlan_cam_mask(regs, (u8 *) &temp); |
| 485 | } | 641 | } |
| 486 | } | 642 | } |
| 487 | 643 | ||
| @@ -2131,14 +2287,14 @@ static void velocity_set_multi(struct net_device *dev) | |||
| 2131 | rx_mode = (RCR_AM | RCR_AB); | 2287 | rx_mode = (RCR_AM | RCR_AB); |
| 2132 | } else { | 2288 | } else { |
| 2133 | int offset = MCAM_SIZE - vptr->multicast_limit; | 2289 | int offset = MCAM_SIZE - vptr->multicast_limit; |
| 2134 | mac_get_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM); | 2290 | mac_get_cam_mask(regs, vptr->mCAMmask); |
| 2135 | 2291 | ||
| 2136 | for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) { | 2292 | for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) { |
| 2137 | mac_set_cam(regs, i + offset, mclist->dmi_addr, VELOCITY_MULTICAST_CAM); | 2293 | mac_set_cam(regs, i + offset, mclist->dmi_addr); |
| 2138 | vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7); | 2294 | vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7); |
| 2139 | } | 2295 | } |
| 2140 | 2296 | ||
| 2141 | mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM); | 2297 | mac_set_cam_mask(regs, vptr->mCAMmask); |
| 2142 | rx_mode = (RCR_AM | RCR_AB); | 2298 | rx_mode = (RCR_AM | RCR_AB); |
| 2143 | } | 2299 | } |
| 2144 | if (dev->mtu > 1500) | 2300 | if (dev->mtu > 1500) |
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h index af17161286ae..aa9179623d90 100644 --- a/drivers/net/via-velocity.h +++ b/drivers/net/via-velocity.h | |||
| @@ -1173,7 +1173,7 @@ enum chip_type { | |||
| 1173 | 1173 | ||
| 1174 | struct velocity_info_tbl { | 1174 | struct velocity_info_tbl { |
| 1175 | enum chip_type chip_id; | 1175 | enum chip_type chip_id; |
| 1176 | char *name; | 1176 | const char *name; |
| 1177 | int txqueue; | 1177 | int txqueue; |
| 1178 | u32 flags; | 1178 | u32 flags; |
| 1179 | }; | 1179 | }; |
| @@ -1194,14 +1194,6 @@ struct velocity_info_tbl { | |||
| 1194 | #define mac_disable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Clr)) | 1194 | #define mac_disable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Clr)) |
| 1195 | #define mac_enable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Set)) | 1195 | #define mac_enable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Set)) |
| 1196 | 1196 | ||
| 1197 | #define mac_hw_mibs_read(regs, MIBs) {\ | ||
| 1198 | int i;\ | ||
| 1199 | BYTE_REG_BITS_ON(MIBCR_MPTRINI,&((regs)->MIBCR));\ | ||
| 1200 | for (i=0;i<HW_MIB_SIZE;i++) {\ | ||
| 1201 | (MIBs)[i]=readl(&((regs)->MIBData));\ | ||
| 1202 | }\ | ||
| 1203 | } | ||
| 1204 | |||
| 1205 | #define mac_set_dma_length(regs, n) {\ | 1197 | #define mac_set_dma_length(regs, n) {\ |
| 1206 | BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\ | 1198 | BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\ |
| 1207 | } | 1199 | } |
| @@ -1226,195 +1218,17 @@ struct velocity_info_tbl { | |||
| 1226 | writew(TRDCSR_WAK<<(n*4),&((regs)->TDCSRSet));\ | 1218 | writew(TRDCSR_WAK<<(n*4),&((regs)->TDCSRSet));\ |
| 1227 | } | 1219 | } |
| 1228 | 1220 | ||
| 1229 | #define mac_eeprom_reload(regs) {\ | 1221 | static inline void mac_eeprom_reload(struct mac_regs __iomem * regs) { |
| 1230 | int i=0;\ | 1222 | int i=0; |
| 1231 | BYTE_REG_BITS_ON(EECSR_RELOAD,&((regs)->EECSR));\ | ||
| 1232 | do {\ | ||
| 1233 | udelay(10);\ | ||
| 1234 | if (i++>0x1000) {\ | ||
| 1235 | break;\ | ||
| 1236 | }\ | ||
| 1237 | }while (BYTE_REG_BITS_IS_ON(EECSR_RELOAD,&((regs)->EECSR)));\ | ||
| 1238 | } | ||
| 1239 | |||
| 1240 | enum velocity_cam_type { | ||
| 1241 | VELOCITY_VLAN_ID_CAM = 0, | ||
| 1242 | VELOCITY_MULTICAST_CAM | ||
| 1243 | }; | ||
| 1244 | |||
| 1245 | /** | ||
| 1246 | * mac_get_cam_mask - Read a CAM mask | ||
| 1247 | * @regs: register block for this velocity | ||
| 1248 | * @mask: buffer to store mask | ||
| 1249 | * @cam_type: CAM to fetch | ||
| 1250 | * | ||
| 1251 | * Fetch the mask bits of the selected CAM and store them into the | ||
| 1252 | * provided mask buffer. | ||
| 1253 | */ | ||
| 1254 | |||
| 1255 | static inline void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask, enum velocity_cam_type cam_type) | ||
| 1256 | { | ||
| 1257 | int i; | ||
| 1258 | /* Select CAM mask */ | ||
| 1259 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1260 | |||
| 1261 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1262 | writeb(CAMADDR_VCAMSL, ®s->CAMADDR); | ||
| 1263 | else | ||
| 1264 | writeb(0, ®s->CAMADDR); | ||
| 1265 | |||
| 1266 | /* read mask */ | ||
| 1267 | for (i = 0; i < 8; i++) | ||
| 1268 | *mask++ = readb(&(regs->MARCAM[i])); | ||
| 1269 | |||
| 1270 | /* disable CAMEN */ | ||
| 1271 | writeb(0, ®s->CAMADDR); | ||
| 1272 | |||
| 1273 | /* Select mar */ | ||
| 1274 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1275 | |||
| 1276 | } | ||
| 1277 | |||
| 1278 | /** | ||
| 1279 | * mac_set_cam_mask - Set a CAM mask | ||
| 1280 | * @regs: register block for this velocity | ||
| 1281 | * @mask: CAM mask to load | ||
| 1282 | * @cam_type: CAM to store | ||
| 1283 | * | ||
| 1284 | * Store a new mask into a CAM | ||
| 1285 | */ | ||
| 1286 | |||
| 1287 | static inline void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask, enum velocity_cam_type cam_type) | ||
| 1288 | { | ||
| 1289 | int i; | ||
| 1290 | /* Select CAM mask */ | ||
| 1291 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1292 | |||
| 1293 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1294 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); | ||
| 1295 | else | ||
| 1296 | writeb(CAMADDR_CAMEN, ®s->CAMADDR); | ||
| 1297 | |||
| 1298 | for (i = 0; i < 8; i++) { | ||
| 1299 | writeb(*mask++, &(regs->MARCAM[i])); | ||
| 1300 | } | ||
| 1301 | /* disable CAMEN */ | ||
| 1302 | writeb(0, ®s->CAMADDR); | ||
| 1303 | |||
| 1304 | /* Select mar */ | ||
| 1305 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1306 | } | ||
| 1307 | |||
| 1308 | /** | ||
| 1309 | * mac_set_cam - set CAM data | ||
| 1310 | * @regs: register block of this velocity | ||
| 1311 | * @idx: Cam index | ||
| 1312 | * @addr: 2 or 6 bytes of CAM data | ||
| 1313 | * @cam_type: CAM to load | ||
| 1314 | * | ||
| 1315 | * Load an address or vlan tag into a CAM | ||
| 1316 | */ | ||
| 1317 | |||
| 1318 | static inline void mac_set_cam(struct mac_regs __iomem * regs, int idx, u8 *addr, enum velocity_cam_type cam_type) | ||
| 1319 | { | ||
| 1320 | int i; | ||
| 1321 | |||
| 1322 | /* Select CAM mask */ | ||
| 1323 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1324 | |||
| 1325 | idx &= (64 - 1); | ||
| 1326 | |||
| 1327 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1328 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, ®s->CAMADDR); | ||
| 1329 | else | ||
| 1330 | writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); | ||
| 1331 | |||
| 1332 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1333 | writew(*((u16 *) addr), ®s->MARCAM[0]); | ||
| 1334 | else { | ||
| 1335 | for (i = 0; i < 6; i++) { | ||
| 1336 | writeb(*addr++, &(regs->MARCAM[i])); | ||
| 1337 | } | ||
| 1338 | } | ||
| 1339 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | ||
| 1340 | |||
| 1341 | udelay(10); | ||
| 1342 | |||
| 1343 | writeb(0, ®s->CAMADDR); | ||
| 1344 | |||
| 1345 | /* Select mar */ | ||
| 1346 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1347 | } | ||
| 1348 | |||
| 1349 | /** | ||
| 1350 | * mac_get_cam - fetch CAM data | ||
| 1351 | * @regs: register block of this velocity | ||
| 1352 | * @idx: Cam index | ||
| 1353 | * @addr: buffer to hold up to 6 bytes of CAM data | ||
| 1354 | * @cam_type: CAM to load | ||
| 1355 | * | ||
| 1356 | * Load an address or vlan tag from a CAM into the buffer provided by | ||
| 1357 | * the caller. VLAN tags are 2 bytes the address cam entries are 6. | ||
| 1358 | */ | ||
| 1359 | |||
| 1360 | static inline void mac_get_cam(struct mac_regs __iomem * regs, int idx, u8 *addr, enum velocity_cam_type cam_type) | ||
| 1361 | { | ||
| 1362 | int i; | ||
| 1363 | |||
| 1364 | /* Select CAM mask */ | ||
| 1365 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1366 | |||
| 1367 | idx &= (64 - 1); | ||
| 1368 | |||
| 1369 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1370 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, ®s->CAMADDR); | ||
| 1371 | else | ||
| 1372 | writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); | ||
| 1373 | |||
| 1374 | BYTE_REG_BITS_ON(CAMCR_CAMRD, ®s->CAMCR); | ||
| 1375 | |||
| 1376 | udelay(10); | ||
| 1377 | |||
| 1378 | if (cam_type == VELOCITY_VLAN_ID_CAM) | ||
| 1379 | *((u16 *) addr) = readw(&(regs->MARCAM[0])); | ||
| 1380 | else | ||
| 1381 | for (i = 0; i < 6; i++, addr++) | ||
| 1382 | *((u8 *) addr) = readb(&(regs->MARCAM[i])); | ||
| 1383 | |||
| 1384 | writeb(0, ®s->CAMADDR); | ||
| 1385 | |||
| 1386 | /* Select mar */ | ||
| 1387 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | ||
| 1388 | } | ||
| 1389 | |||
| 1390 | /** | ||
| 1391 | * mac_wol_reset - reset WOL after exiting low power | ||
| 1392 | * @regs: register block of this velocity | ||
| 1393 | * | ||
| 1394 | * Called after we drop out of wake on lan mode in order to | ||
| 1395 | * reset the Wake on lan features. This function doesn't restore | ||
| 1396 | * the rest of the logic from the result of sleep/wakeup | ||
| 1397 | */ | ||
| 1398 | |||
| 1399 | static inline void mac_wol_reset(struct mac_regs __iomem * regs) | ||
| 1400 | { | ||
| 1401 | 1223 | ||
| 1402 | /* Turn off SWPTAG right after leaving power mode */ | 1224 | BYTE_REG_BITS_ON(EECSR_RELOAD,&(regs->EECSR)); |
| 1403 | BYTE_REG_BITS_OFF(STICKHW_SWPTAG, ®s->STICKHW); | 1225 | do { |
| 1404 | /* clear sticky bits */ | 1226 | udelay(10); |
| 1405 | BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | 1227 | if (i++>0x1000) |
| 1406 | 1228 | break; | |
| 1407 | BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, ®s->CHIPGCR); | 1229 | } while (BYTE_REG_BITS_IS_ON(EECSR_RELOAD,&(regs->EECSR))); |
| 1408 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | ||
| 1409 | /* disable force PME-enable */ | ||
| 1410 | writeb(WOLCFG_PMEOVR, ®s->WOLCFGClr); | ||
| 1411 | /* disable power-event config bit */ | ||
| 1412 | writew(0xFFFF, ®s->WOLCRClr); | ||
| 1413 | /* clear power status */ | ||
| 1414 | writew(0xFFFF, ®s->WOLSRClr); | ||
| 1415 | } | 1230 | } |
| 1416 | 1231 | ||
| 1417 | |||
| 1418 | /* | 1232 | /* |
| 1419 | * Header for WOL definitions. Used to compute hashes | 1233 | * Header for WOL definitions. Used to compute hashes |
| 1420 | */ | 1234 | */ |
