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-rw-r--r--arch/arm/Kconfig62
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/configs/at91sam9rlek_defconfig957
-rw-r--r--arch/arm/configs/ks8695_defconfig880
-rw-r--r--arch/arm/configs/trizeps4_defconfig532
-rw-r--r--arch/arm/kernel/armksyms.c1
-rw-r--r--arch/arm/kernel/ecard.c35
-rw-r--r--arch/arm/kernel/stacktrace.c12
-rw-r--r--arch/arm/kernel/time.c2
-rw-r--r--arch/arm/mach-at91/Kconfig17
-rw-r--r--arch/arm/mach-at91/Makefile5
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c341
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c630
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c3
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c204
-rw-r--r--arch/arm/mach-at91/generic.h2
-rw-r--r--arch/arm/mach-davinci/Kconfig23
-rw-r--r--arch/arm/mach-davinci/Makefile10
-rw-r--r--arch/arm/mach-davinci/Makefile.boot3
-rw-r--r--arch/arm/mach-davinci/board-evm.c131
-rw-r--r--arch/arm/mach-davinci/id.c94
-rw-r--r--arch/arm/mach-davinci/io.c51
-rw-r--r--arch/arm/mach-davinci/irq.c226
-rw-r--r--arch/arm/mach-davinci/psc.c113
-rw-r--r--arch/arm/mach-davinci/serial.c96
-rw-r--r--arch/arm/mach-davinci/time.c372
-rw-r--r--arch/arm/mach-ebsa110/io.c8
-rw-r--r--arch/arm/mach-iop13xx/Makefile1
-rw-r--r--arch/arm/mach-iop13xx/irq.c5
-rw-r--r--arch/arm/mach-iop13xx/msi.c194
-rw-r--r--arch/arm/mach-iop13xx/pci.c16
-rw-r--r--arch/arm/mach-ks8695/Kconfig13
-rw-r--r--arch/arm/mach-ks8695/Makefile15
-rw-r--r--arch/arm/mach-ks8695/Makefile.boot8
-rw-r--r--arch/arm/mach-ks8695/board-micrel.c60
-rw-r--r--arch/arm/mach-ks8695/cpu.c73
-rw-r--r--arch/arm/mach-ks8695/devices.c191
-rw-r--r--arch/arm/mach-ks8695/generic.h15
-rw-r--r--arch/arm/mach-ks8695/irq.c175
-rw-r--r--arch/arm/mach-ks8695/time.c114
-rw-r--r--arch/arm/mach-omap1/board-h2.c2
-rw-r--r--arch/arm/mach-omap1/pm.c11
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/mux.c33
-rw-r--r--arch/arm/mach-pnx4008/dma.c4
-rw-r--r--arch/arm/mach-pxa/trizeps4.c62
-rw-r--r--arch/arm/mach-s3c2410/Makefile2
-rw-r--r--arch/arm/mach-s3c2410/h1940-bluetooth.c142
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c6
-rw-r--r--arch/arm/mach-s3c2443/clock.c4
-rw-r--r--arch/arm/mm/Kconfig10
-rw-r--r--arch/arm/plat-omap/dma.c4
-rw-r--r--arch/arm/plat-omap/mux.c19
-rw-r--r--arch/arm/tools/mach-types34
-rw-r--r--drivers/ata/pata_icside.c184
-rw-r--r--drivers/ide/arm/icside.c41
-rw-r--r--drivers/ide/arm/rapide.c5
-rw-r--r--drivers/net/arm/ether1.c6
-rw-r--r--drivers/net/arm/ether3.c6
-rw-r--r--drivers/net/arm/etherh.c17
-rw-r--r--drivers/scsi/arm/arxescsi.c12
-rw-r--r--drivers/scsi/arm/cumana_2.c16
-rw-r--r--drivers/scsi/arm/eesox.c16
-rw-r--r--drivers/scsi/arm/powertec.c16
-rw-r--r--drivers/serial/8250_acorn.c3
-rw-r--r--drivers/serial/Kconfig17
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/serial_ks8695.c657
-rw-r--r--drivers/usb/gadget/Kconfig2
-rw-r--r--include/asm-arm/arch-at91/at91sam9rl.h110
-rw-r--r--include/asm-arm/arch-at91/at91sam9rl_matrix.h96
-rw-r--r--include/asm-arm/arch-at91/cpu.h9
-rw-r--r--include/asm-arm/arch-at91/hardware.h19
-rw-r--r--include/asm-arm/arch-at91/io.h18
-rw-r--r--include/asm-arm/arch-at91/irqs.h1
-rw-r--r--include/asm-arm/arch-at91/timex.h5
-rw-r--r--include/asm-arm/arch-at91/uncompress.h2
-rw-r--r--include/asm-arm/arch-cl7500/entry-macro.S8
-rw-r--r--include/asm-arm/arch-davinci/common.h19
-rw-r--r--include/asm-arm/arch-davinci/debug-macro.S21
-rw-r--r--include/asm-arm/arch-davinci/dma.h16
-rw-r--r--include/asm-arm/arch-davinci/entry-macro.S32
-rw-r--r--include/asm-arm/arch-davinci/hardware.h14
-rw-r--r--include/asm-arm/arch-davinci/io.h79
-rw-r--r--include/asm-arm/arch-davinci/irqs.h105
-rw-r--r--include/asm-arm/arch-davinci/memory.h64
-rw-r--r--include/asm-arm/arch-davinci/psc.h76
-rw-r--r--include/asm-arm/arch-davinci/serial.h20
-rw-r--r--include/asm-arm/arch-davinci/system.h29
-rw-r--r--include/asm-arm/arch-davinci/timex.h17
-rw-r--r--include/asm-arm/arch-davinci/uncompress.h35
-rw-r--r--include/asm-arm/arch-davinci/vmalloc.h15
-rw-r--r--include/asm-arm/arch-ebsa110/entry-macro.S2
-rw-r--r--include/asm-arm/arch-ebsa285/entry-macro.S16
-rw-r--r--include/asm-arm/arch-iop13xx/io.h2
-rw-r--r--include/asm-arm/arch-iop13xx/iop13xx.h29
-rw-r--r--include/asm-arm/arch-iop13xx/irqs.h8
-rw-r--r--include/asm-arm/arch-iop13xx/msi.h11
-rw-r--r--include/asm-arm/arch-iop32x/io.h2
-rw-r--r--include/asm-arm/arch-iop33x/io.h2
-rw-r--r--include/asm-arm/arch-ks8695/debug-macro.S38
-rw-r--r--include/asm-arm/arch-ks8695/devices.h32
-rw-r--r--include/asm-arm/arch-ks8695/dma.h17
-rw-r--r--include/asm-arm/arch-ks8695/entry-macro.S53
-rw-r--r--include/asm-arm/arch-ks8695/hardware.h49
-rw-r--r--include/asm-arm/arch-ks8695/io.h19
-rw-r--r--include/asm-arm/arch-ks8695/irqs.h54
-rw-r--r--include/asm-arm/arch-ks8695/memory.h49
-rw-r--r--include/asm-arm/arch-ks8695/regs-gpio.h53
-rw-r--r--include/asm-arm/arch-ks8695/regs-hpna.h25
-rw-r--r--include/asm-arm/arch-ks8695/regs-irq.h41
-rw-r--r--include/asm-arm/arch-ks8695/regs-lan.h65
-rw-r--r--include/asm-arm/arch-ks8695/regs-mem.h89
-rw-r--r--include/asm-arm/arch-ks8695/regs-misc.h97
-rw-r--r--include/asm-arm/arch-ks8695/regs-pci.h53
-rw-r--r--include/asm-arm/arch-ks8695/regs-switch.h66
-rw-r--r--include/asm-arm/arch-ks8695/regs-sys.h34
-rw-r--r--include/asm-arm/arch-ks8695/regs-timer.h40
-rw-r--r--include/asm-arm/arch-ks8695/regs-uart.h92
-rw-r--r--include/asm-arm/arch-ks8695/regs-wan.h65
-rw-r--r--include/asm-arm/arch-ks8695/system.h48
-rw-r--r--include/asm-arm/arch-ks8695/timex.h20
-rw-r--r--include/asm-arm/arch-ks8695/uncompress.h37
-rw-r--r--include/asm-arm/arch-ks8695/vmalloc.h19
-rw-r--r--include/asm-arm/arch-omap/mux.h31
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S2
-rw-r--r--include/asm-arm/arch-rpc/entry-macro.S8
-rw-r--r--include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h1
-rw-r--r--include/asm-arm/arch-sa1100/entry-macro.S8
-rw-r--r--include/asm-arm/arch-versatile/entry-macro.S2
-rw-r--r--include/asm-arm/ecard.h8
-rw-r--r--include/asm-arm/hardware/entry-macro-iomd.S28
-rw-r--r--include/asm-arm/sizes.h4
-rw-r--r--include/asm-avr32/arch-at32ap/cpu.h1
-rw-r--r--include/linux/serial_core.h4
139 files changed, 8624 insertions, 548 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d7c0984d4a86..e55bbd32dcac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -114,9 +114,6 @@ config GENERIC_CALIBRATE_DELAY
114 bool 114 bool
115 default y 115 default y
116 116
117config GENERIC_BUST_SPINLOCK
118 bool
119
120config ARCH_MAY_HAVE_PC_FDC 117config ARCH_MAY_HAVE_PC_FDC
121 bool 118 bool
122 119
@@ -247,6 +244,15 @@ config ARCH_IMX
247 help 244 help
248 Support for Motorola's i.MX family of processors (MX1, MXL). 245 Support for Motorola's i.MX family of processors (MX1, MXL).
249 246
247config ARCH_IOP13XX
248 bool "IOP13xx-based"
249 depends on MMU
250 select PLAT_IOP
251 select PCI
252 select ARCH_SUPPORTS_MSI
253 help
254 Support for Intel's IOP13XX (XScale) family of processors.
255
250config ARCH_IOP32X 256config ARCH_IOP32X
251 bool "IOP32x-based" 257 bool "IOP32x-based"
252 depends on MMU 258 depends on MMU
@@ -264,22 +270,12 @@ config ARCH_IOP33X
264 help 270 help
265 Support for Intel's IOP33X (XScale) family of processors. 271 Support for Intel's IOP33X (XScale) family of processors.
266 272
267config ARCH_IOP13XX 273config ARCH_IXP23XX
268 bool "IOP13xx-based" 274 bool "IXP23XX-based"
269 depends on MMU
270 select PLAT_IOP
271 select PCI
272 select ARCH_SUPPORTS_MSI
273 help
274 Support for Intel's IOP13XX (XScale) family of processors.
275
276config ARCH_IXP4XX
277 bool "IXP4xx-based"
278 depends on MMU 275 depends on MMU
279 select GENERIC_TIME 276 select PCI
280 select GENERIC_CLOCKEVENTS
281 help 277 help
282 Support for Intel's IXP4XX (XScale) family of processors. 278 Support for Intel's IXP23xx (XScale) family of processors.
283 279
284config ARCH_IXP2000 280config ARCH_IXP2000
285 bool "IXP2400/2800-based" 281 bool "IXP2400/2800-based"
@@ -288,12 +284,13 @@ config ARCH_IXP2000
288 help 284 help
289 Support for Intel's IXP2400/2800 (XScale) family of processors. 285 Support for Intel's IXP2400/2800 (XScale) family of processors.
290 286
291config ARCH_IXP23XX 287config ARCH_IXP4XX
292 bool "IXP23XX-based" 288 bool "IXP4xx-based"
293 depends on MMU 289 depends on MMU
294 select PCI 290 select GENERIC_TIME
291 select GENERIC_CLOCKEVENTS
295 help 292 help
296 Support for Intel's IXP23xx (XScale) family of processors. 293 Support for Intel's IXP4XX (XScale) family of processors.
297 294
298config ARCH_L7200 295config ARCH_L7200
299 bool "LinkUp-L7200" 296 bool "LinkUp-L7200"
@@ -308,6 +305,12 @@ config ARCH_L7200
308 If you have any questions or comments about the Linux kernel port 305 If you have any questions or comments about the Linux kernel port
309 to this board, send e-mail to <sjhill@cotw.com>. 306 to this board, send e-mail to <sjhill@cotw.com>.
310 307
308config ARCH_KS8695
309 bool "Micrel/Kendin KS8695"
310 help
311 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
312 System-on-Chip devices.
313
311config ARCH_NS9XXX 314config ARCH_NS9XXX
312 bool "NetSilicon NS9xxx" 315 bool "NetSilicon NS9xxx"
313 help 316 help
@@ -354,7 +357,6 @@ config ARCH_SA1100
354config ARCH_S3C2410 357config ARCH_S3C2410
355 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443" 358 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
356 select GENERIC_GPIO 359 select GENERIC_GPIO
357 select GENERIC_TIME
358 help 360 help
359 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 361 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
360 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 362 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -377,6 +379,13 @@ config ARCH_LH7A40X
377 core with a wide array of integrated devices for 379 core with a wide array of integrated devices for
378 hand-held and low-power applications. 380 hand-held and low-power applications.
379 381
382config ARCH_DAVINCI
383 bool "TI DaVinci"
384 select GENERIC_TIME
385 select GENERIC_CLOCKEVENTS
386 help
387 Support for TI's DaVinci platform.
388
380config ARCH_OMAP 389config ARCH_OMAP
381 bool "TI OMAP" 390 bool "TI OMAP"
382 select GENERIC_GPIO 391 select GENERIC_GPIO
@@ -445,6 +454,10 @@ source "arch/arm/mach-netx/Kconfig"
445 454
446source "arch/arm/mach-ns9xxx/Kconfig" 455source "arch/arm/mach-ns9xxx/Kconfig"
447 456
457source "arch/arm/mach-davinci/Kconfig"
458
459source "arch/arm/mach-ks8695/Kconfig"
460
448# Definitions to make life easier 461# Definitions to make life easier
449config ARCH_ACORN 462config ARCH_ACORN
450 bool 463 bool
@@ -505,7 +518,7 @@ config ISA_DMA_API
505 bool 518 bool
506 519
507config PCI 520config PCI
508 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX 521 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695
509 help 522 help
510 Find out whether you have a PCI motherboard. PCI is the name of a 523 Find out whether you have a PCI motherboard. PCI is the name of a
511 bus system, i.e. the way the CPU talks to the other stuff inside 524 bus system, i.e. the way the CPU talks to the other stuff inside
@@ -674,7 +687,8 @@ config LEDS
674 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 687 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
675 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 688 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
676 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 689 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
677 ARCH_AT91 || MACH_TRIZEPS4 690 ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \
691 ARCH_KS8695
678 help 692 help
679 If you say Y here, the LEDs on your machine will be used 693 If you say Y here, the LEDs on your machine will be used
680 to provide useful information about your current system status. 694 to provide useful information about your current system status.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 00ea4305ad5d..cbd5010d3bc3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -135,6 +135,8 @@ endif
135 machine-$(CONFIG_ARCH_NETX) := netx 135 machine-$(CONFIG_ARCH_NETX) := netx
136 machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx 136 machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx
137 textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000 137 textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000
138 machine-$(CONFIG_ARCH_DAVINCI) := davinci
139 machine-$(CONFIG_ARCH_KS8695) := ks8695
138 140
139ifeq ($(CONFIG_ARCH_EBSA110),y) 141ifeq ($(CONFIG_ARCH_EBSA110),y)
140# This is what happens if you forget the IOCS16 line. 142# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rlek_defconfig
new file mode 100644
index 000000000000..fbe8b3049343
--- /dev/null
+++ b/arch/arm/configs/at91sam9rlek_defconfig
@@ -0,0 +1,957 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21
4# Mon May 7 16:30:40 2007
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set
10CONFIG_MMU=y
11# CONFIG_NO_IOPORT is not set
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_TRACE_IRQFLAGS_SUPPORT=y
14CONFIG_HARDIRQS_SW_RESEND=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_RWSEM_GENERIC_SPINLOCK=y
17# CONFIG_ARCH_HAS_ILOG2_U32 is not set
18# CONFIG_ARCH_HAS_ILOG2_U64 is not set
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_ZONE_DMA=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24
25#
26# Code maturity level options
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31
32#
33# General setup
34#
35CONFIG_LOCALVERSION=""
36# CONFIG_LOCALVERSION_AUTO is not set
37# CONFIG_SWAP is not set
38CONFIG_SYSVIPC=y
39# CONFIG_IPC_NS is not set
40CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_POSIX_MQUEUE is not set
42# CONFIG_BSD_PROCESS_ACCT is not set
43# CONFIG_TASKSTATS is not set
44# CONFIG_UTS_NS is not set
45# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set
47CONFIG_SYSFS_DEPRECATED=y
48# CONFIG_RELAY is not set
49CONFIG_BLK_DEV_INITRD=y
50CONFIG_INITRAMFS_SOURCE=""
51CONFIG_CC_OPTIMIZE_FOR_SIZE=y
52CONFIG_SYSCTL=y
53# CONFIG_EMBEDDED is not set
54CONFIG_UID16=y
55CONFIG_SYSCTL_SYSCALL=y
56CONFIG_KALLSYMS=y
57# CONFIG_KALLSYMS_ALL is not set
58# CONFIG_KALLSYMS_EXTRA_PASS is not set
59CONFIG_HOTPLUG=y
60CONFIG_PRINTK=y
61CONFIG_BUG=y
62CONFIG_ELF_CORE=y
63CONFIG_BASE_FULL=y
64CONFIG_FUTEX=y
65CONFIG_EPOLL=y
66CONFIG_SHMEM=y
67CONFIG_SLAB=y
68CONFIG_VM_EVENT_COUNTERS=y
69CONFIG_RT_MUTEXES=y
70# CONFIG_TINY_SHMEM is not set
71CONFIG_BASE_SMALL=0
72# CONFIG_SLOB is not set
73
74#
75# Loadable module support
76#
77CONFIG_MODULES=y
78CONFIG_MODULE_UNLOAD=y
79# CONFIG_MODULE_FORCE_UNLOAD is not set
80# CONFIG_MODVERSIONS is not set
81# CONFIG_MODULE_SRCVERSION_ALL is not set
82CONFIG_KMOD=y
83
84#
85# Block layer
86#
87CONFIG_BLOCK=y
88# CONFIG_LBD is not set
89# CONFIG_BLK_DEV_IO_TRACE is not set
90# CONFIG_LSF is not set
91
92#
93# IO Schedulers
94#
95CONFIG_IOSCHED_NOOP=y
96CONFIG_IOSCHED_AS=y
97# CONFIG_IOSCHED_DEADLINE is not set
98# CONFIG_IOSCHED_CFQ is not set
99CONFIG_DEFAULT_AS=y
100# CONFIG_DEFAULT_DEADLINE is not set
101# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory"
104
105#
106# System Type
107#
108# CONFIG_ARCH_AAEC2000 is not set
109# CONFIG_ARCH_INTEGRATOR is not set
110# CONFIG_ARCH_REALVIEW is not set
111# CONFIG_ARCH_VERSATILE is not set
112CONFIG_ARCH_AT91=y
113# CONFIG_ARCH_CLPS7500 is not set
114# CONFIG_ARCH_CLPS711X is not set
115# CONFIG_ARCH_CO285 is not set
116# CONFIG_ARCH_EBSA110 is not set
117# CONFIG_ARCH_EP93XX is not set
118# CONFIG_ARCH_FOOTBRIDGE is not set
119# CONFIG_ARCH_NETX is not set
120# CONFIG_ARCH_H720X is not set
121# CONFIG_ARCH_IMX is not set
122# CONFIG_ARCH_IOP32X is not set
123# CONFIG_ARCH_IOP33X is not set
124# CONFIG_ARCH_IOP13XX is not set
125# CONFIG_ARCH_IXP4XX is not set
126# CONFIG_ARCH_IXP2000 is not set
127# CONFIG_ARCH_IXP23XX is not set
128# CONFIG_ARCH_L7200 is not set
129# CONFIG_ARCH_NS9XXX is not set
130# CONFIG_ARCH_PNX4008 is not set
131# CONFIG_ARCH_PXA is not set
132# CONFIG_ARCH_RPC is not set
133# CONFIG_ARCH_SA1100 is not set
134# CONFIG_ARCH_S3C2410 is not set
135# CONFIG_ARCH_SHARK is not set
136# CONFIG_ARCH_LH7A40X is not set
137# CONFIG_ARCH_OMAP is not set
138
139#
140# Atmel AT91 System-on-Chip
141#
142# CONFIG_ARCH_AT91RM9200 is not set
143# CONFIG_ARCH_AT91SAM9260 is not set
144# CONFIG_ARCH_AT91SAM9261 is not set
145# CONFIG_ARCH_AT91SAM9263 is not set
146CONFIG_ARCH_AT91SAM9RL=y
147
148#
149# AT91SAM9RL Board Type
150#
151CONFIG_MACH_AT91SAM9RLEK=y
152
153#
154# AT91 Board Options
155#
156
157#
158# AT91 Feature Selections
159#
160# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
161
162#
163# Processor Type
164#
165CONFIG_CPU_32=y
166CONFIG_CPU_ARM926T=y
167CONFIG_CPU_32v5=y
168CONFIG_CPU_ABRT_EV5TJ=y
169CONFIG_CPU_CACHE_VIVT=y
170CONFIG_CPU_COPY_V4WB=y
171CONFIG_CPU_TLB_V4WBI=y
172CONFIG_CPU_CP15=y
173CONFIG_CPU_CP15_MMU=y
174
175#
176# Processor Features
177#
178# CONFIG_ARM_THUMB is not set
179# CONFIG_CPU_ICACHE_DISABLE is not set
180# CONFIG_CPU_DCACHE_DISABLE is not set
181# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
182# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
183# CONFIG_OUTER_CACHE is not set
184
185#
186# Bus support
187#
188
189#
190# PCCARD (PCMCIA/CardBus) support
191#
192# CONFIG_PCCARD is not set
193
194#
195# Kernel Features
196#
197# CONFIG_PREEMPT is not set
198# CONFIG_NO_IDLE_HZ is not set
199CONFIG_HZ=100
200# CONFIG_AEABI is not set
201# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
202CONFIG_SELECT_MEMORY_MODEL=y
203CONFIG_FLATMEM_MANUAL=y
204# CONFIG_DISCONTIGMEM_MANUAL is not set
205# CONFIG_SPARSEMEM_MANUAL is not set
206CONFIG_FLATMEM=y
207CONFIG_FLAT_NODE_MEM_MAP=y
208# CONFIG_SPARSEMEM_STATIC is not set
209CONFIG_SPLIT_PTLOCK_CPUS=4096
210# CONFIG_RESOURCES_64BIT is not set
211CONFIG_ZONE_DMA_FLAG=1
212# CONFIG_LEDS is not set
213CONFIG_ALIGNMENT_TRAP=y
214
215#
216# Boot options
217#
218CONFIG_ZBOOT_ROM_TEXT=0x0
219CONFIG_ZBOOT_ROM_BSS=0x0
220CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw"
221# CONFIG_XIP_KERNEL is not set
222# CONFIG_KEXEC is not set
223
224#
225# Floating point emulation
226#
227
228#
229# At least one emulation must be selected
230#
231CONFIG_FPE_NWFPE=y
232# CONFIG_FPE_NWFPE_XP is not set
233# CONFIG_FPE_FASTFPE is not set
234# CONFIG_VFP is not set
235
236#
237# Userspace binary formats
238#
239CONFIG_BINFMT_ELF=y
240# CONFIG_BINFMT_AOUT is not set
241# CONFIG_BINFMT_MISC is not set
242# CONFIG_ARTHUR is not set
243
244#
245# Power management options
246#
247# CONFIG_PM is not set
248
249#
250# Networking
251#
252CONFIG_NET=y
253
254#
255# Networking options
256#
257# CONFIG_NETDEBUG is not set
258# CONFIG_PACKET is not set
259CONFIG_UNIX=y
260# CONFIG_NET_KEY is not set
261# CONFIG_INET is not set
262# CONFIG_NETWORK_SECMARK is not set
263# CONFIG_NETFILTER is not set
264# CONFIG_ATM is not set
265# CONFIG_BRIDGE is not set
266# CONFIG_VLAN_8021Q is not set
267# CONFIG_DECNET is not set
268# CONFIG_LLC2 is not set
269# CONFIG_IPX is not set
270# CONFIG_ATALK is not set
271# CONFIG_X25 is not set
272# CONFIG_LAPB is not set
273# CONFIG_WAN_ROUTER is not set
274
275#
276# QoS and/or fair queueing
277#
278# CONFIG_NET_SCHED is not set
279
280#
281# Network testing
282#
283# CONFIG_NET_PKTGEN is not set
284# CONFIG_HAMRADIO is not set
285# CONFIG_IRDA is not set
286# CONFIG_BT is not set
287# CONFIG_IEEE80211 is not set
288
289#
290# Device Drivers
291#
292
293#
294# Generic Driver Options
295#
296CONFIG_STANDALONE=y
297CONFIG_PREVENT_FIRMWARE_BUILD=y
298# CONFIG_FW_LOADER is not set
299# CONFIG_DEBUG_DRIVER is not set
300# CONFIG_DEBUG_DEVRES is not set
301# CONFIG_SYS_HYPERVISOR is not set
302
303#
304# Connector - unified userspace <-> kernelspace linker
305#
306# CONFIG_CONNECTOR is not set
307
308#
309# Memory Technology Devices (MTD)
310#
311CONFIG_MTD=y
312# CONFIG_MTD_DEBUG is not set
313CONFIG_MTD_CONCAT=y
314CONFIG_MTD_PARTITIONS=y
315# CONFIG_MTD_REDBOOT_PARTS is not set
316CONFIG_MTD_CMDLINE_PARTS=y
317# CONFIG_MTD_AFS_PARTS is not set
318
319#
320# User Modules And Translation Layers
321#
322CONFIG_MTD_CHAR=y
323CONFIG_MTD_BLKDEVS=y
324CONFIG_MTD_BLOCK=y
325# CONFIG_FTL is not set
326# CONFIG_NFTL is not set
327# CONFIG_INFTL is not set
328# CONFIG_RFD_FTL is not set
329# CONFIG_SSFDC is not set
330
331#
332# RAM/ROM/Flash chip drivers
333#
334# CONFIG_MTD_CFI is not set
335# CONFIG_MTD_JEDECPROBE is not set
336CONFIG_MTD_MAP_BANK_WIDTH_1=y
337CONFIG_MTD_MAP_BANK_WIDTH_2=y
338CONFIG_MTD_MAP_BANK_WIDTH_4=y
339# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
340# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
341# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
342CONFIG_MTD_CFI_I1=y
343CONFIG_MTD_CFI_I2=y
344# CONFIG_MTD_CFI_I4 is not set
345# CONFIG_MTD_CFI_I8 is not set
346# CONFIG_MTD_RAM is not set
347# CONFIG_MTD_ROM is not set
348# CONFIG_MTD_ABSENT is not set
349# CONFIG_MTD_OBSOLETE_CHIPS is not set
350
351#
352# Mapping drivers for chip access
353#
354# CONFIG_MTD_COMPLEX_MAPPINGS is not set
355# CONFIG_MTD_PLATRAM is not set
356
357#
358# Self-contained MTD device drivers
359#
360CONFIG_MTD_DATAFLASH=y
361# CONFIG_MTD_M25P80 is not set
362# CONFIG_MTD_SLRAM is not set
363# CONFIG_MTD_PHRAM is not set
364# CONFIG_MTD_MTDRAM is not set
365# CONFIG_MTD_BLOCK2MTD is not set
366
367#
368# Disk-On-Chip Device Drivers
369#
370# CONFIG_MTD_DOC2000 is not set
371# CONFIG_MTD_DOC2001 is not set
372# CONFIG_MTD_DOC2001PLUS is not set
373
374#
375# NAND Flash Device Drivers
376#
377CONFIG_MTD_NAND=y
378# CONFIG_MTD_NAND_VERIFY_WRITE is not set
379# CONFIG_MTD_NAND_ECC_SMC is not set
380CONFIG_MTD_NAND_IDS=y
381# CONFIG_MTD_NAND_DISKONCHIP is not set
382CONFIG_MTD_NAND_AT91=y
383# CONFIG_MTD_NAND_NANDSIM is not set
384
385#
386# OneNAND Flash Device Drivers
387#
388# CONFIG_MTD_ONENAND is not set
389
390#
391# Parallel port support
392#
393# CONFIG_PARPORT is not set
394
395#
396# Plug and Play support
397#
398# CONFIG_PNPACPI is not set
399
400#
401# Block devices
402#
403# CONFIG_BLK_DEV_COW_COMMON is not set
404CONFIG_BLK_DEV_LOOP=y
405# CONFIG_BLK_DEV_CRYPTOLOOP is not set
406# CONFIG_BLK_DEV_NBD is not set
407CONFIG_BLK_DEV_RAM=y
408CONFIG_BLK_DEV_RAM_COUNT=4
409CONFIG_BLK_DEV_RAM_SIZE=24576
410CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
411# CONFIG_CDROM_PKTCDVD is not set
412# CONFIG_ATA_OVER_ETH is not set
413
414#
415# SCSI device support
416#
417# CONFIG_RAID_ATTRS is not set
418CONFIG_SCSI=y
419# CONFIG_SCSI_TGT is not set
420# CONFIG_SCSI_NETLINK is not set
421CONFIG_SCSI_PROC_FS=y
422
423#
424# SCSI support type (disk, tape, CD-ROM)
425#
426CONFIG_BLK_DEV_SD=y
427# CONFIG_CHR_DEV_ST is not set
428# CONFIG_CHR_DEV_OSST is not set
429# CONFIG_BLK_DEV_SR is not set
430# CONFIG_CHR_DEV_SG is not set
431# CONFIG_CHR_DEV_SCH is not set
432
433#
434# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
435#
436CONFIG_SCSI_MULTI_LUN=y
437# CONFIG_SCSI_CONSTANTS is not set
438# CONFIG_SCSI_LOGGING is not set
439# CONFIG_SCSI_SCAN_ASYNC is not set
440
441#
442# SCSI Transports
443#
444# CONFIG_SCSI_SPI_ATTRS is not set
445# CONFIG_SCSI_FC_ATTRS is not set
446# CONFIG_SCSI_ISCSI_ATTRS is not set
447# CONFIG_SCSI_SAS_ATTRS is not set
448# CONFIG_SCSI_SAS_LIBSAS is not set
449
450#
451# SCSI low-level drivers
452#
453# CONFIG_SCSI_DEBUG is not set
454
455#
456# Serial ATA (prod) and Parallel ATA (experimental) drivers
457#
458# CONFIG_ATA is not set
459
460#
461# Multi-device support (RAID and LVM)
462#
463# CONFIG_MD is not set
464
465#
466# Fusion MPT device support
467#
468# CONFIG_FUSION is not set
469
470#
471# IEEE 1394 (FireWire) support
472#
473
474#
475# I2O device support
476#
477
478#
479# Network device support
480#
481# CONFIG_NETDEVICES is not set
482# CONFIG_NETPOLL is not set
483# CONFIG_NET_POLL_CONTROLLER is not set
484
485#
486# ISDN subsystem
487#
488# CONFIG_ISDN is not set
489
490#
491# Input device support
492#
493CONFIG_INPUT=y
494# CONFIG_INPUT_FF_MEMLESS is not set
495
496#
497# Userland interfaces
498#
499CONFIG_INPUT_MOUSEDEV=y
500# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
501CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
502CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
503# CONFIG_INPUT_JOYDEV is not set
504# CONFIG_INPUT_TSDEV is not set
505CONFIG_INPUT_EVDEV=y
506# CONFIG_INPUT_EVBUG is not set
507
508#
509# Input Device Drivers
510#
511# CONFIG_INPUT_KEYBOARD is not set
512# CONFIG_INPUT_MOUSE is not set
513# CONFIG_INPUT_JOYSTICK is not set
514CONFIG_INPUT_TOUCHSCREEN=y
515# CONFIG_TOUCHSCREEN_ADS7846 is not set
516# CONFIG_TOUCHSCREEN_GUNZE is not set
517# CONFIG_TOUCHSCREEN_ELO is not set
518# CONFIG_TOUCHSCREEN_MTOUCH is not set
519# CONFIG_TOUCHSCREEN_MK712 is not set
520# CONFIG_TOUCHSCREEN_PENMOUNT is not set
521# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
522# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
523# CONFIG_TOUCHSCREEN_UCB1400 is not set
524# CONFIG_INPUT_MISC is not set
525
526#
527# Hardware I/O ports
528#
529# CONFIG_SERIO is not set
530# CONFIG_GAMEPORT is not set
531
532#
533# Character devices
534#
535CONFIG_VT=y
536CONFIG_VT_CONSOLE=y
537CONFIG_HW_CONSOLE=y
538# CONFIG_VT_HW_CONSOLE_BINDING is not set
539# CONFIG_SERIAL_NONSTANDARD is not set
540
541#
542# Serial drivers
543#
544# CONFIG_SERIAL_8250 is not set
545
546#
547# Non-8250 serial port support
548#
549CONFIG_SERIAL_ATMEL=y
550CONFIG_SERIAL_ATMEL_CONSOLE=y
551# CONFIG_SERIAL_ATMEL_TTYAT is not set
552CONFIG_SERIAL_CORE=y
553CONFIG_SERIAL_CORE_CONSOLE=y
554CONFIG_UNIX98_PTYS=y
555CONFIG_LEGACY_PTYS=y
556CONFIG_LEGACY_PTY_COUNT=256
557
558#
559# IPMI
560#
561# CONFIG_IPMI_HANDLER is not set
562
563#
564# Watchdog Cards
565#
566CONFIG_WATCHDOG=y
567CONFIG_WATCHDOG_NOWAYOUT=y
568
569#
570# Watchdog Device Drivers
571#
572# CONFIG_SOFT_WATCHDOG is not set
573CONFIG_HW_RANDOM=y
574# CONFIG_NVRAM is not set
575# CONFIG_DTLK is not set
576# CONFIG_R3964 is not set
577# CONFIG_RAW_DRIVER is not set
578
579#
580# TPM devices
581#
582# CONFIG_TCG_TPM is not set
583
584#
585# I2C support
586#
587# CONFIG_I2C is not set
588
589#
590# SPI support
591#
592CONFIG_SPI=y
593# CONFIG_SPI_DEBUG is not set
594CONFIG_SPI_MASTER=y
595
596#
597# SPI Master Controller Drivers
598#
599CONFIG_SPI_ATMEL=y
600# CONFIG_SPI_BITBANG is not set
601
602#
603# SPI Protocol Masters
604#
605# CONFIG_SPI_AT25 is not set
606
607#
608# Dallas's 1-wire bus
609#
610# CONFIG_W1 is not set
611
612#
613# Hardware Monitoring support
614#
615# CONFIG_HWMON is not set
616# CONFIG_HWMON_VID is not set
617
618#
619# Misc devices
620#
621
622#
623# Multifunction device drivers
624#
625# CONFIG_MFD_SM501 is not set
626
627#
628# LED devices
629#
630# CONFIG_NEW_LEDS is not set
631
632#
633# LED drivers
634#
635
636#
637# LED Triggers
638#
639
640#
641# Multimedia devices
642#
643# CONFIG_VIDEO_DEV is not set
644
645#
646# Digital Video Broadcasting Devices
647#
648
649#
650# Graphics support
651#
652# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
653CONFIG_FB=y
654# CONFIG_FIRMWARE_EDID is not set
655# CONFIG_FB_DDC is not set
656CONFIG_FB_CFB_FILLRECT=y
657CONFIG_FB_CFB_COPYAREA=y
658CONFIG_FB_CFB_IMAGEBLIT=y
659# CONFIG_FB_SVGALIB is not set
660# CONFIG_FB_MACMODES is not set
661# CONFIG_FB_BACKLIGHT is not set
662# CONFIG_FB_MODE_HELPERS is not set
663# CONFIG_FB_TILEBLITTING is not set
664
665#
666# Frame buffer hardware drivers
667#
668# CONFIG_FB_S1D13XXX is not set
669CONFIG_FB_ATMEL=y
670# CONFIG_FB_VIRTUAL is not set
671
672#
673# Console display driver support
674#
675# CONFIG_VGA_CONSOLE is not set
676CONFIG_DUMMY_CONSOLE=y
677# CONFIG_FRAMEBUFFER_CONSOLE is not set
678
679#
680# Logo configuration
681#
682# CONFIG_LOGO is not set
683
684#
685# Sound
686#
687CONFIG_SOUND=y
688
689#
690# Advanced Linux Sound Architecture
691#
692CONFIG_SND=y
693CONFIG_SND_TIMER=y
694CONFIG_SND_PCM=y
695CONFIG_SND_SEQUENCER=y
696CONFIG_SND_SEQ_DUMMY=y
697CONFIG_SND_OSSEMUL=y
698CONFIG_SND_MIXER_OSS=y
699CONFIG_SND_PCM_OSS=y
700CONFIG_SND_PCM_OSS_PLUGINS=y
701CONFIG_SND_SEQUENCER_OSS=y
702# CONFIG_SND_DYNAMIC_MINORS is not set
703CONFIG_SND_SUPPORT_OLD_API=y
704CONFIG_SND_VERBOSE_PROCFS=y
705CONFIG_SND_VERBOSE_PRINTK=y
706CONFIG_SND_DEBUG=y
707CONFIG_SND_DEBUG_DETECT=y
708# CONFIG_SND_PCM_XRUN_DEBUG is not set
709
710#
711# Generic devices
712#
713# CONFIG_SND_DUMMY is not set
714# CONFIG_SND_VIRMIDI is not set
715# CONFIG_SND_MTPAV is not set
716# CONFIG_SND_SERIAL_U16550 is not set
717# CONFIG_SND_MPU401 is not set
718
719#
720# ALSA ARM devices
721#
722
723#
724# SoC audio support
725#
726# CONFIG_SND_SOC is not set
727
728#
729# Open Sound System
730#
731# CONFIG_SOUND_PRIME is not set
732
733#
734# HID Devices
735#
736CONFIG_HID=y
737# CONFIG_HID_DEBUG is not set
738
739#
740# USB support
741#
742CONFIG_USB_ARCH_HAS_HCD=y
743CONFIG_USB_ARCH_HAS_OHCI=y
744# CONFIG_USB_ARCH_HAS_EHCI is not set
745# CONFIG_USB is not set
746
747#
748# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
749#
750
751#
752# USB Gadget Support
753#
754# CONFIG_USB_GADGET is not set
755
756#
757# MMC/SD Card support
758#
759CONFIG_MMC=y
760# CONFIG_MMC_DEBUG is not set
761CONFIG_MMC_BLOCK=y
762CONFIG_MMC_AT91=y
763
764#
765# Real Time Clock
766#
767CONFIG_RTC_LIB=y
768# CONFIG_RTC_CLASS is not set
769
770#
771# File systems
772#
773CONFIG_EXT2_FS=y
774# CONFIG_EXT2_FS_XATTR is not set
775# CONFIG_EXT2_FS_XIP is not set
776# CONFIG_EXT3_FS is not set
777# CONFIG_EXT4DEV_FS is not set
778# CONFIG_REISERFS_FS is not set
779# CONFIG_JFS_FS is not set
780# CONFIG_FS_POSIX_ACL is not set
781# CONFIG_XFS_FS is not set
782# CONFIG_GFS2_FS is not set
783# CONFIG_OCFS2_FS is not set
784# CONFIG_MINIX_FS is not set
785# CONFIG_ROMFS_FS is not set
786CONFIG_INOTIFY=y
787CONFIG_INOTIFY_USER=y
788# CONFIG_QUOTA is not set
789CONFIG_DNOTIFY=y
790# CONFIG_AUTOFS_FS is not set
791# CONFIG_AUTOFS4_FS is not set
792# CONFIG_FUSE_FS is not set
793
794#
795# CD-ROM/DVD Filesystems
796#
797# CONFIG_ISO9660_FS is not set
798# CONFIG_UDF_FS is not set
799
800#
801# DOS/FAT/NT Filesystems
802#
803CONFIG_FAT_FS=y
804CONFIG_MSDOS_FS=y
805CONFIG_VFAT_FS=y
806CONFIG_FAT_DEFAULT_CODEPAGE=437
807CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
808# CONFIG_NTFS_FS is not set
809
810#
811# Pseudo filesystems
812#
813CONFIG_PROC_FS=y
814CONFIG_PROC_SYSCTL=y
815CONFIG_SYSFS=y
816CONFIG_TMPFS=y
817# CONFIG_TMPFS_POSIX_ACL is not set
818# CONFIG_HUGETLB_PAGE is not set
819CONFIG_RAMFS=y
820# CONFIG_CONFIGFS_FS is not set
821
822#
823# Miscellaneous filesystems
824#
825# CONFIG_ADFS_FS is not set
826# CONFIG_AFFS_FS is not set
827# CONFIG_HFS_FS is not set
828# CONFIG_HFSPLUS_FS is not set
829# CONFIG_BEFS_FS is not set
830# CONFIG_BFS_FS is not set
831# CONFIG_EFS_FS is not set
832# CONFIG_JFFS2_FS is not set
833CONFIG_CRAMFS=y
834# CONFIG_VXFS_FS is not set
835# CONFIG_HPFS_FS is not set
836# CONFIG_QNX4FS_FS is not set
837# CONFIG_SYSV_FS is not set
838# CONFIG_UFS_FS is not set
839
840#
841# Network File Systems
842#
843
844#
845# Partition Types
846#
847# CONFIG_PARTITION_ADVANCED is not set
848CONFIG_MSDOS_PARTITION=y
849
850#
851# Native Language Support
852#
853CONFIG_NLS=y
854CONFIG_NLS_DEFAULT="iso8859-1"
855CONFIG_NLS_CODEPAGE_437=y
856# CONFIG_NLS_CODEPAGE_737 is not set
857# CONFIG_NLS_CODEPAGE_775 is not set
858CONFIG_NLS_CODEPAGE_850=y
859# CONFIG_NLS_CODEPAGE_852 is not set
860# CONFIG_NLS_CODEPAGE_855 is not set
861# CONFIG_NLS_CODEPAGE_857 is not set
862# CONFIG_NLS_CODEPAGE_860 is not set
863# CONFIG_NLS_CODEPAGE_861 is not set
864# CONFIG_NLS_CODEPAGE_862 is not set
865# CONFIG_NLS_CODEPAGE_863 is not set
866# CONFIG_NLS_CODEPAGE_864 is not set
867# CONFIG_NLS_CODEPAGE_865 is not set
868# CONFIG_NLS_CODEPAGE_866 is not set
869# CONFIG_NLS_CODEPAGE_869 is not set
870# CONFIG_NLS_CODEPAGE_936 is not set
871# CONFIG_NLS_CODEPAGE_950 is not set
872# CONFIG_NLS_CODEPAGE_932 is not set
873# CONFIG_NLS_CODEPAGE_949 is not set
874# CONFIG_NLS_CODEPAGE_874 is not set
875# CONFIG_NLS_ISO8859_8 is not set
876# CONFIG_NLS_CODEPAGE_1250 is not set
877# CONFIG_NLS_CODEPAGE_1251 is not set
878# CONFIG_NLS_ASCII is not set
879CONFIG_NLS_ISO8859_1=y
880# CONFIG_NLS_ISO8859_2 is not set
881# CONFIG_NLS_ISO8859_3 is not set
882# CONFIG_NLS_ISO8859_4 is not set
883# CONFIG_NLS_ISO8859_5 is not set
884# CONFIG_NLS_ISO8859_6 is not set
885# CONFIG_NLS_ISO8859_7 is not set
886# CONFIG_NLS_ISO8859_9 is not set
887# CONFIG_NLS_ISO8859_13 is not set
888# CONFIG_NLS_ISO8859_14 is not set
889CONFIG_NLS_ISO8859_15=y
890# CONFIG_NLS_KOI8_R is not set
891# CONFIG_NLS_KOI8_U is not set
892CONFIG_NLS_UTF8=y
893
894#
895# Profiling support
896#
897# CONFIG_PROFILING is not set
898
899#
900# Kernel hacking
901#
902# CONFIG_PRINTK_TIME is not set
903CONFIG_ENABLE_MUST_CHECK=y
904# CONFIG_MAGIC_SYSRQ is not set
905# CONFIG_UNUSED_SYMBOLS is not set
906# CONFIG_DEBUG_FS is not set
907# CONFIG_HEADERS_CHECK is not set
908CONFIG_DEBUG_KERNEL=y
909# CONFIG_DEBUG_SHIRQ is not set
910CONFIG_LOG_BUF_SHIFT=14
911CONFIG_DETECT_SOFTLOCKUP=y
912# CONFIG_SCHEDSTATS is not set
913# CONFIG_TIMER_STATS is not set
914# CONFIG_DEBUG_SLAB is not set
915# CONFIG_DEBUG_RT_MUTEXES is not set
916# CONFIG_RT_MUTEX_TESTER is not set
917# CONFIG_DEBUG_SPINLOCK is not set
918# CONFIG_DEBUG_MUTEXES is not set
919# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
920# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
921# CONFIG_DEBUG_KOBJECT is not set
922CONFIG_DEBUG_BUGVERBOSE=y
923CONFIG_DEBUG_INFO=y
924# CONFIG_DEBUG_VM is not set
925# CONFIG_DEBUG_LIST is not set
926CONFIG_FRAME_POINTER=y
927CONFIG_FORCED_INLINING=y
928# CONFIG_RCU_TORTURE_TEST is not set
929# CONFIG_FAULT_INJECTION is not set
930CONFIG_DEBUG_USER=y
931# CONFIG_DEBUG_ERRORS is not set
932CONFIG_DEBUG_LL=y
933# CONFIG_DEBUG_ICEDCC is not set
934
935#
936# Security options
937#
938# CONFIG_KEYS is not set
939# CONFIG_SECURITY is not set
940
941#
942# Cryptographic options
943#
944# CONFIG_CRYPTO is not set
945
946#
947# Library routines
948#
949CONFIG_BITREVERSE=y
950# CONFIG_CRC_CCITT is not set
951# CONFIG_CRC16 is not set
952CONFIG_CRC32=y
953# CONFIG_LIBCRC32C is not set
954CONFIG_ZLIB_INFLATE=y
955CONFIG_PLIST=y
956CONFIG_HAS_IOMEM=y
957CONFIG_HAS_IOPORT=y
diff --git a/arch/arm/configs/ks8695_defconfig b/arch/arm/configs/ks8695_defconfig
new file mode 100644
index 000000000000..8ab21a0719e9
--- /dev/null
+++ b/arch/arm/configs/ks8695_defconfig
@@ -0,0 +1,880 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17-rc4
4# Thu May 25 15:42:51 2006
5#
6CONFIG_ARM=y
7CONFIG_MMU=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y
11CONFIG_VECTORS_BASE=0xffff0000
12
13#
14# Code maturity level options
15#
16CONFIG_EXPERIMENTAL=y
17CONFIG_BROKEN_ON_SMP=y
18CONFIG_INIT_ENV_ARG_LIMIT=32
19
20#
21# General setup
22#
23CONFIG_LOCALVERSION=""
24CONFIG_LOCALVERSION_AUTO=y
25# CONFIG_SWAP is not set
26CONFIG_SYSVIPC=y
27# CONFIG_POSIX_MQUEUE is not set
28# CONFIG_BSD_PROCESS_ACCT is not set
29CONFIG_SYSCTL=y
30# CONFIG_AUDIT is not set
31# CONFIG_IKCONFIG is not set
32# CONFIG_RELAY is not set
33CONFIG_INITRAMFS_SOURCE=""
34CONFIG_UID16=y
35CONFIG_CC_OPTIMIZE_FOR_SIZE=y
36# CONFIG_EMBEDDED is not set
37CONFIG_KALLSYMS=y
38# CONFIG_KALLSYMS_ALL is not set
39# CONFIG_KALLSYMS_EXTRA_PASS is not set
40CONFIG_HOTPLUG=y
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_ELF_CORE=y
44CONFIG_BASE_FULL=y
45CONFIG_FUTEX=y
46CONFIG_EPOLL=y
47CONFIG_SHMEM=y
48CONFIG_SLAB=y
49# CONFIG_TINY_SHMEM is not set
50CONFIG_BASE_SMALL=0
51# CONFIG_SLOB is not set
52CONFIG_OBSOLETE_INTERMODULE=y
53
54#
55# Loadable module support
56#
57CONFIG_MODULES=y
58CONFIG_MODULE_UNLOAD=y
59# CONFIG_MODULE_FORCE_UNLOAD is not set
60# CONFIG_MODVERSIONS is not set
61# CONFIG_MODULE_SRCVERSION_ALL is not set
62CONFIG_KMOD=y
63
64#
65# Block layer
66#
67# CONFIG_BLK_DEV_IO_TRACE is not set
68
69#
70# IO Schedulers
71#
72CONFIG_IOSCHED_NOOP=y
73CONFIG_IOSCHED_AS=y
74# CONFIG_IOSCHED_DEADLINE is not set
75# CONFIG_IOSCHED_CFQ is not set
76CONFIG_DEFAULT_AS=y
77# CONFIG_DEFAULT_DEADLINE is not set
78# CONFIG_DEFAULT_CFQ is not set
79# CONFIG_DEFAULT_NOOP is not set
80CONFIG_DEFAULT_IOSCHED="anticipatory"
81
82#
83# System Type
84#
85# CONFIG_ARCH_CLPS7500 is not set
86# CONFIG_ARCH_CLPS711X is not set
87# CONFIG_ARCH_CO285 is not set
88# CONFIG_ARCH_EBSA110 is not set
89# CONFIG_ARCH_EP93XX is not set
90# CONFIG_ARCH_FOOTBRIDGE is not set
91# CONFIG_ARCH_INTEGRATOR is not set
92# CONFIG_ARCH_IOP3XX is not set
93# CONFIG_ARCH_IXP4XX is not set
94# CONFIG_ARCH_IXP2000 is not set
95# CONFIG_ARCH_IXP23XX is not set
96# CONFIG_ARCH_L7200 is not set
97# CONFIG_ARCH_PXA is not set
98# CONFIG_ARCH_RPC is not set
99# CONFIG_ARCH_SA1100 is not set
100# CONFIG_ARCH_S3C2410 is not set
101# CONFIG_ARCH_SHARK is not set
102# CONFIG_ARCH_LH7A40X is not set
103# CONFIG_ARCH_OMAP is not set
104# CONFIG_ARCH_VERSATILE is not set
105# CONFIG_ARCH_REALVIEW is not set
106# CONFIG_ARCH_IMX is not set
107# CONFIG_ARCH_H720X is not set
108# CONFIG_ARCH_AAEC2000 is not set
109# CONFIG_ARCH_AT91 is not set
110CONFIG_ARCH_KS8695=y
111
112#
113# Kendin/Micrel KS8695 Implementations
114#
115CONFIG_MACH_KS8695=y
116# CONFIG_MACH_DSM320 is not set
117# CONFIG_MACH_CM4002 is not set
118# CONFIG_MACH_CM4008 is not set
119# CONFIG_MACH_CM40xx is not set
120# CONFIG_MACH_LITE300 is not set
121# CONFIG_MACH_SE4200 is not set
122# CONFIG_MACH_MANGA_KS8695 is not set
123
124#
125# Processor Type
126#
127CONFIG_CPU_32=y
128CONFIG_CPU_ARM922T=y
129CONFIG_CPU_32v4=y
130CONFIG_CPU_ABRT_EV4T=y
131CONFIG_CPU_CACHE_V4WT=y
132CONFIG_CPU_CACHE_VIVT=y
133CONFIG_CPU_COPY_V4WB=y
134CONFIG_CPU_TLB_V4WBI=y
135
136#
137# Processor Features
138#
139# CONFIG_ARM_THUMB is not set
140# CONFIG_CPU_ICACHE_DISABLE is not set
141# CONFIG_CPU_DCACHE_DISABLE is not set
142# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
143
144#
145# Bus support
146#
147CONFIG_PCI=y
148CONFIG_PCI_DEBUG=y
149
150#
151# PCCARD (PCMCIA/CardBus) support
152#
153CONFIG_PCCARD=y
154# CONFIG_PCMCIA_DEBUG is not set
155CONFIG_PCMCIA=y
156CONFIG_PCMCIA_LOAD_CIS=y
157CONFIG_PCMCIA_IOCTL=y
158CONFIG_CARDBUS=y
159
160#
161# PC-card bridges
162#
163CONFIG_YENTA=y
164CONFIG_YENTA_O2=y
165CONFIG_YENTA_RICOH=y
166CONFIG_YENTA_TI=y
167CONFIG_YENTA_ENE_TUNE=y
168CONFIG_YENTA_TOSHIBA=y
169# CONFIG_PD6729 is not set
170# CONFIG_I82092 is not set
171CONFIG_PCCARD_NONSTATIC=y
172
173#
174# Kernel Features
175#
176# CONFIG_PREEMPT is not set
177# CONFIG_NO_IDLE_HZ is not set
178CONFIG_HZ=100
179# CONFIG_AEABI is not set
180# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
181CONFIG_SELECT_MEMORY_MODEL=y
182CONFIG_FLATMEM_MANUAL=y
183# CONFIG_DISCONTIGMEM_MANUAL is not set
184# CONFIG_SPARSEMEM_MANUAL is not set
185CONFIG_FLATMEM=y
186CONFIG_FLAT_NODE_MEM_MAP=y
187# CONFIG_SPARSEMEM_STATIC is not set
188CONFIG_SPLIT_PTLOCK_CPUS=4096
189CONFIG_ALIGNMENT_TRAP=y
190
191#
192# Boot options
193#
194CONFIG_ZBOOT_ROM_TEXT=0x0
195CONFIG_ZBOOT_ROM_BSS=0x0
196CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
197# CONFIG_XIP_KERNEL is not set
198
199#
200# Floating point emulation
201#
202
203#
204# At least one emulation must be selected
205#
206CONFIG_FPE_NWFPE=y
207# CONFIG_FPE_NWFPE_XP is not set
208# CONFIG_FPE_FASTFPE is not set
209
210#
211# Userspace binary formats
212#
213CONFIG_BINFMT_ELF=y
214# CONFIG_BINFMT_AOUT is not set
215# CONFIG_BINFMT_MISC is not set
216# CONFIG_ARTHUR is not set
217
218#
219# Power management options
220#
221# CONFIG_PM is not set
222# CONFIG_APM is not set
223
224#
225# Networking
226#
227CONFIG_NET=y
228
229#
230# Networking options
231#
232# CONFIG_NETDEBUG is not set
233CONFIG_PACKET=y
234# CONFIG_PACKET_MMAP is not set
235CONFIG_UNIX=y
236# CONFIG_NET_KEY is not set
237CONFIG_INET=y
238# CONFIG_IP_MULTICAST is not set
239# CONFIG_IP_ADVANCED_ROUTER is not set
240CONFIG_IP_FIB_HASH=y
241CONFIG_IP_PNP=y
242# CONFIG_IP_PNP_DHCP is not set
243CONFIG_IP_PNP_BOOTP=y
244# CONFIG_IP_PNP_RARP is not set
245# CONFIG_NET_IPIP is not set
246# CONFIG_NET_IPGRE is not set
247# CONFIG_ARPD is not set
248# CONFIG_SYN_COOKIES is not set
249# CONFIG_INET_AH is not set
250# CONFIG_INET_ESP is not set
251# CONFIG_INET_IPCOMP is not set
252# CONFIG_INET_XFRM_TUNNEL is not set
253# CONFIG_INET_TUNNEL is not set
254CONFIG_INET_DIAG=y
255CONFIG_INET_TCP_DIAG=y
256# CONFIG_TCP_CONG_ADVANCED is not set
257CONFIG_TCP_CONG_BIC=y
258# CONFIG_IPV6 is not set
259# CONFIG_INET6_XFRM_TUNNEL is not set
260# CONFIG_INET6_TUNNEL is not set
261# CONFIG_NETFILTER is not set
262
263#
264# DCCP Configuration (EXPERIMENTAL)
265#
266# CONFIG_IP_DCCP is not set
267
268#
269# SCTP Configuration (EXPERIMENTAL)
270#
271# CONFIG_IP_SCTP is not set
272
273#
274# TIPC Configuration (EXPERIMENTAL)
275#
276# CONFIG_TIPC is not set
277# CONFIG_ATM is not set
278# CONFIG_BRIDGE is not set
279# CONFIG_VLAN_8021Q is not set
280# CONFIG_DECNET is not set
281# CONFIG_LLC2 is not set
282# CONFIG_IPX is not set
283# CONFIG_ATALK is not set
284# CONFIG_X25 is not set
285# CONFIG_LAPB is not set
286# CONFIG_NET_DIVERT is not set
287# CONFIG_ECONET is not set
288# CONFIG_WAN_ROUTER is not set
289
290#
291# QoS and/or fair queueing
292#
293# CONFIG_NET_SCHED is not set
294
295#
296# Network testing
297#
298# CONFIG_NET_PKTGEN is not set
299# CONFIG_HAMRADIO is not set
300# CONFIG_IRDA is not set
301# CONFIG_BT is not set
302# CONFIG_IEEE80211 is not set
303
304#
305# Device Drivers
306#
307
308#
309# Generic Driver Options
310#
311CONFIG_STANDALONE=y
312CONFIG_PREVENT_FIRMWARE_BUILD=y
313CONFIG_FW_LOADER=y
314# CONFIG_DEBUG_DRIVER is not set
315
316#
317# Connector - unified userspace <-> kernelspace linker
318#
319# CONFIG_CONNECTOR is not set
320
321#
322# Memory Technology Devices (MTD)
323#
324CONFIG_MTD=y
325# CONFIG_MTD_DEBUG is not set
326# CONFIG_MTD_CONCAT is not set
327CONFIG_MTD_PARTITIONS=y
328# CONFIG_MTD_REDBOOT_PARTS is not set
329CONFIG_MTD_CMDLINE_PARTS=y
330# CONFIG_MTD_AFS_PARTS is not set
331
332#
333# User Modules And Translation Layers
334#
335CONFIG_MTD_CHAR=y
336CONFIG_MTD_BLOCK=y
337# CONFIG_FTL is not set
338# CONFIG_NFTL is not set
339# CONFIG_INFTL is not set
340# CONFIG_RFD_FTL is not set
341
342#
343# RAM/ROM/Flash chip drivers
344#
345CONFIG_MTD_CFI=y
346CONFIG_MTD_JEDECPROBE=y
347CONFIG_MTD_GEN_PROBE=y
348# CONFIG_MTD_CFI_ADV_OPTIONS is not set
349CONFIG_MTD_MAP_BANK_WIDTH_1=y
350CONFIG_MTD_MAP_BANK_WIDTH_2=y
351CONFIG_MTD_MAP_BANK_WIDTH_4=y
352# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
353# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
354# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
355CONFIG_MTD_CFI_I1=y
356CONFIG_MTD_CFI_I2=y
357# CONFIG_MTD_CFI_I4 is not set
358# CONFIG_MTD_CFI_I8 is not set
359# CONFIG_MTD_CFI_INTELEXT is not set
360CONFIG_MTD_CFI_AMDSTD=y
361# CONFIG_MTD_CFI_STAA is not set
362CONFIG_MTD_CFI_UTIL=y
363# CONFIG_MTD_RAM is not set
364# CONFIG_MTD_ROM is not set
365# CONFIG_MTD_ABSENT is not set
366# CONFIG_MTD_OBSOLETE_CHIPS is not set
367
368#
369# Mapping drivers for chip access
370#
371# CONFIG_MTD_COMPLEX_MAPPINGS is not set
372# CONFIG_MTD_PHYSMAP is not set
373# CONFIG_MTD_ARM_INTEGRATOR is not set
374# CONFIG_MTD_IMPA7 is not set
375# CONFIG_MTD_PLATRAM is not set
376
377#
378# Self-contained MTD device drivers
379#
380# CONFIG_MTD_PMC551 is not set
381# CONFIG_MTD_SLRAM is not set
382# CONFIG_MTD_PHRAM is not set
383# CONFIG_MTD_MTDRAM is not set
384# CONFIG_MTD_BLOCK2MTD is not set
385
386#
387# Disk-On-Chip Device Drivers
388#
389# CONFIG_MTD_DOC2000 is not set
390# CONFIG_MTD_DOC2001 is not set
391# CONFIG_MTD_DOC2001PLUS is not set
392
393#
394# NAND Flash Device Drivers
395#
396# CONFIG_MTD_NAND is not set
397
398#
399# OneNAND Flash Device Drivers
400#
401# CONFIG_MTD_ONENAND is not set
402
403#
404# Parallel port support
405#
406# CONFIG_PARPORT is not set
407
408#
409# Plug and Play support
410#
411
412#
413# Block devices
414#
415# CONFIG_BLK_CPQ_DA is not set
416# CONFIG_BLK_CPQ_CISS_DA is not set
417# CONFIG_BLK_DEV_DAC960 is not set
418# CONFIG_BLK_DEV_UMEM is not set
419# CONFIG_BLK_DEV_COW_COMMON is not set
420# CONFIG_BLK_DEV_LOOP is not set
421# CONFIG_BLK_DEV_NBD is not set
422# CONFIG_BLK_DEV_SX8 is not set
423CONFIG_BLK_DEV_RAM=y
424CONFIG_BLK_DEV_RAM_COUNT=16
425CONFIG_BLK_DEV_RAM_SIZE=8192
426CONFIG_BLK_DEV_INITRD=y
427# CONFIG_CDROM_PKTCDVD is not set
428# CONFIG_ATA_OVER_ETH is not set
429
430#
431# ATA/ATAPI/MFM/RLL support
432#
433# CONFIG_IDE is not set
434
435#
436# SCSI device support
437#
438# CONFIG_RAID_ATTRS is not set
439# CONFIG_SCSI is not set
440
441#
442# Multi-device support (RAID and LVM)
443#
444# CONFIG_MD is not set
445
446#
447# Fusion MPT device support
448#
449# CONFIG_FUSION is not set
450
451#
452# IEEE 1394 (FireWire) support
453#
454# CONFIG_IEEE1394 is not set
455
456#
457# I2O device support
458#
459# CONFIG_I2O is not set
460
461#
462# Network device support
463#
464CONFIG_NETDEVICES=y
465# CONFIG_DUMMY is not set
466# CONFIG_BONDING is not set
467# CONFIG_EQUALIZER is not set
468# CONFIG_TUN is not set
469
470#
471# ARCnet devices
472#
473# CONFIG_ARCNET is not set
474
475#
476# PHY device support
477#
478# CONFIG_PHYLIB is not set
479
480#
481# Ethernet (10 or 100Mbit)
482#
483CONFIG_NET_ETHERNET=y
484# CONFIG_MII is not set
485CONFIG_ARM_KS8695_ETHER=y
486# CONFIG_HAPPYMEAL is not set
487# CONFIG_SUNGEM is not set
488# CONFIG_CASSINI is not set
489# CONFIG_NET_VENDOR_3COM is not set
490# CONFIG_SMC91X is not set
491# CONFIG_DM9000 is not set
492
493#
494# Tulip family network device support
495#
496# CONFIG_NET_TULIP is not set
497# CONFIG_HP100 is not set
498# CONFIG_NET_PCI is not set
499
500#
501# Ethernet (1000 Mbit)
502#
503# CONFIG_ACENIC is not set
504# CONFIG_DL2K is not set
505# CONFIG_E1000 is not set
506# CONFIG_NS83820 is not set
507# CONFIG_HAMACHI is not set
508# CONFIG_YELLOWFIN is not set
509# CONFIG_R8169 is not set
510# CONFIG_SIS190 is not set
511# CONFIG_SKGE is not set
512# CONFIG_SKY2 is not set
513# CONFIG_SK98LIN is not set
514# CONFIG_TIGON3 is not set
515# CONFIG_BNX2 is not set
516
517#
518# Ethernet (10000 Mbit)
519#
520# CONFIG_CHELSIO_T1 is not set
521# CONFIG_IXGB is not set
522# CONFIG_S2IO is not set
523
524#
525# Token Ring devices
526#
527# CONFIG_TR is not set
528
529#
530# Wireless LAN (non-hamradio)
531#
532# CONFIG_NET_RADIO is not set
533
534#
535# PCMCIA network device support
536#
537# CONFIG_NET_PCMCIA is not set
538
539#
540# Wan interfaces
541#
542# CONFIG_WAN is not set
543# CONFIG_FDDI is not set
544# CONFIG_HIPPI is not set
545# CONFIG_PPP is not set
546# CONFIG_SLIP is not set
547# CONFIG_SHAPER is not set
548# CONFIG_NETCONSOLE is not set
549# CONFIG_NETPOLL is not set
550# CONFIG_NET_POLL_CONTROLLER is not set
551
552#
553# ISDN subsystem
554#
555# CONFIG_ISDN is not set
556
557#
558# Input device support
559#
560CONFIG_INPUT=y
561
562#
563# Userland interfaces
564#
565CONFIG_INPUT_MOUSEDEV=y
566# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
567CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
568CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
569# CONFIG_INPUT_JOYDEV is not set
570# CONFIG_INPUT_TSDEV is not set
571# CONFIG_INPUT_EVDEV is not set
572# CONFIG_INPUT_EVBUG is not set
573
574#
575# Input Device Drivers
576#
577# CONFIG_INPUT_KEYBOARD is not set
578# CONFIG_INPUT_MOUSE is not set
579# CONFIG_INPUT_JOYSTICK is not set
580# CONFIG_INPUT_TOUCHSCREEN is not set
581# CONFIG_INPUT_MISC is not set
582
583#
584# Hardware I/O ports
585#
586# CONFIG_SERIO is not set
587# CONFIG_GAMEPORT is not set
588
589#
590# Character devices
591#
592CONFIG_VT=y
593CONFIG_VT_CONSOLE=y
594CONFIG_HW_CONSOLE=y
595# CONFIG_SERIAL_NONSTANDARD is not set
596
597#
598# Serial drivers
599#
600# CONFIG_SERIAL_8250 is not set
601
602#
603# Non-8250 serial port support
604#
605CONFIG_SERIAL_KS8695=y
606CONFIG_SERIAL_KS8695_CONSOLE=y
607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
609# CONFIG_SERIAL_JSM is not set
610CONFIG_UNIX98_PTYS=y
611CONFIG_LEGACY_PTYS=y
612CONFIG_LEGACY_PTY_COUNT=256
613
614#
615# IPMI
616#
617# CONFIG_IPMI_HANDLER is not set
618
619#
620# Watchdog Cards
621#
622# CONFIG_WATCHDOG is not set
623# CONFIG_NVRAM is not set
624# CONFIG_DTLK is not set
625# CONFIG_R3964 is not set
626# CONFIG_APPLICOM is not set
627
628#
629# Ftape, the floppy tape device driver
630#
631# CONFIG_DRM is not set
632
633#
634# PCMCIA character devices
635#
636# CONFIG_SYNCLINK_CS is not set
637# CONFIG_CARDMAN_4000 is not set
638# CONFIG_CARDMAN_4040 is not set
639# CONFIG_RAW_DRIVER is not set
640
641#
642# TPM devices
643#
644# CONFIG_TCG_TPM is not set
645# CONFIG_TELCLOCK is not set
646
647#
648# I2C support
649#
650# CONFIG_I2C is not set
651
652#
653# SPI support
654#
655# CONFIG_SPI is not set
656# CONFIG_SPI_MASTER is not set
657
658#
659# Dallas's 1-wire bus
660#
661# CONFIG_W1 is not set
662
663#
664# Hardware Monitoring support
665#
666# CONFIG_HWMON is not set
667# CONFIG_HWMON_VID is not set
668
669#
670# Misc devices
671#
672
673#
674# LED devices
675#
676# CONFIG_NEW_LEDS is not set
677
678#
679# LED drivers
680#
681
682#
683# LED Triggers
684#
685
686#
687# Multimedia devices
688#
689# CONFIG_VIDEO_DEV is not set
690
691#
692# Digital Video Broadcasting Devices
693#
694# CONFIG_DVB is not set
695
696#
697# Graphics support
698#
699# CONFIG_FB is not set
700
701#
702# Console display driver support
703#
704# CONFIG_VGA_CONSOLE is not set
705CONFIG_DUMMY_CONSOLE=y
706
707#
708# Sound
709#
710# CONFIG_SOUND is not set
711
712#
713# USB support
714#
715CONFIG_USB_ARCH_HAS_HCD=y
716CONFIG_USB_ARCH_HAS_OHCI=y
717CONFIG_USB_ARCH_HAS_EHCI=y
718# CONFIG_USB is not set
719
720#
721# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
722#
723
724#
725# USB Gadget Support
726#
727# CONFIG_USB_GADGET is not set
728
729#
730# MMC/SD Card support
731#
732# CONFIG_MMC is not set
733
734#
735# Real Time Clock
736#
737CONFIG_RTC_LIB=y
738# CONFIG_RTC_CLASS is not set
739
740#
741# File systems
742#
743CONFIG_EXT2_FS=y
744# CONFIG_EXT2_FS_XATTR is not set
745# CONFIG_EXT2_FS_XIP is not set
746# CONFIG_EXT3_FS is not set
747# CONFIG_REISERFS_FS is not set
748# CONFIG_JFS_FS is not set
749# CONFIG_FS_POSIX_ACL is not set
750# CONFIG_XFS_FS is not set
751# CONFIG_OCFS2_FS is not set
752# CONFIG_MINIX_FS is not set
753# CONFIG_ROMFS_FS is not set
754CONFIG_INOTIFY=y
755# CONFIG_QUOTA is not set
756CONFIG_DNOTIFY=y
757# CONFIG_AUTOFS_FS is not set
758# CONFIG_AUTOFS4_FS is not set
759# CONFIG_FUSE_FS is not set
760
761#
762# CD-ROM/DVD Filesystems
763#
764# CONFIG_ISO9660_FS is not set
765# CONFIG_UDF_FS is not set
766
767#
768# DOS/FAT/NT Filesystems
769#
770# CONFIG_MSDOS_FS is not set
771# CONFIG_VFAT_FS is not set
772# CONFIG_NTFS_FS is not set
773
774#
775# Pseudo filesystems
776#
777CONFIG_PROC_FS=y
778CONFIG_SYSFS=y
779CONFIG_TMPFS=y
780# CONFIG_HUGETLB_PAGE is not set
781CONFIG_RAMFS=y
782# CONFIG_CONFIGFS_FS is not set
783
784#
785# Miscellaneous filesystems
786#
787# CONFIG_ADFS_FS is not set
788# CONFIG_AFFS_FS is not set
789# CONFIG_HFS_FS is not set
790# CONFIG_HFSPLUS_FS is not set
791# CONFIG_BEFS_FS is not set
792# CONFIG_BFS_FS is not set
793# CONFIG_EFS_FS is not set
794# CONFIG_JFFS_FS is not set
795# CONFIG_JFFS2_FS is not set
796CONFIG_CRAMFS=y
797# CONFIG_VXFS_FS is not set
798# CONFIG_HPFS_FS is not set
799# CONFIG_QNX4FS_FS is not set
800# CONFIG_SYSV_FS is not set
801# CONFIG_UFS_FS is not set
802
803#
804# Network File Systems
805#
806# CONFIG_NFS_FS is not set
807# CONFIG_NFSD is not set
808# CONFIG_SMB_FS is not set
809# CONFIG_CIFS is not set
810# CONFIG_NCP_FS is not set
811# CONFIG_CODA_FS is not set
812# CONFIG_AFS_FS is not set
813# CONFIG_9P_FS is not set
814
815#
816# Partition Types
817#
818# CONFIG_PARTITION_ADVANCED is not set
819CONFIG_MSDOS_PARTITION=y
820
821#
822# Native Language Support
823#
824# CONFIG_NLS is not set
825
826#
827# Profiling support
828#
829# CONFIG_PROFILING is not set
830
831#
832# Kernel hacking
833#
834# CONFIG_PRINTK_TIME is not set
835# CONFIG_MAGIC_SYSRQ is not set
836CONFIG_DEBUG_KERNEL=y
837CONFIG_LOG_BUF_SHIFT=14
838CONFIG_DETECT_SOFTLOCKUP=y
839# CONFIG_SCHEDSTATS is not set
840# CONFIG_DEBUG_SLAB is not set
841CONFIG_DEBUG_MUTEXES=y
842# CONFIG_DEBUG_SPINLOCK is not set
843# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
844# CONFIG_DEBUG_KOBJECT is not set
845CONFIG_DEBUG_BUGVERBOSE=y
846# CONFIG_DEBUG_INFO is not set
847# CONFIG_DEBUG_FS is not set
848# CONFIG_DEBUG_VM is not set
849CONFIG_FRAME_POINTER=y
850# CONFIG_UNWIND_INFO is not set
851CONFIG_FORCED_INLINING=y
852# CONFIG_RCU_TORTURE_TEST is not set
853CONFIG_DEBUG_USER=y
854# CONFIG_DEBUG_ERRORS is not set
855CONFIG_DEBUG_LL=y
856# CONFIG_DEBUG_ICEDCC is not set
857
858#
859# Security options
860#
861# CONFIG_KEYS is not set
862# CONFIG_SECURITY is not set
863
864#
865# Cryptographic options
866#
867# CONFIG_CRYPTO is not set
868
869#
870# Hardware crypto devices
871#
872
873#
874# Library routines
875#
876# CONFIG_CRC_CCITT is not set
877# CONFIG_CRC16 is not set
878CONFIG_CRC32=y
879# CONFIG_LIBCRC32C is not set
880CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig
index a6698dc4f6b9..6db6392806f9 100644
--- a/arch/arm/configs/trizeps4_defconfig
+++ b/arch/arm/configs/trizeps4_defconfig
@@ -1,15 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17 3# Linux kernel version: 2.6.21
4# Sat Jun 24 22:45:14 2006 4# Mon Apr 30 21:23:20 2007
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
7CONFIG_MMU=y 10CONFIG_MMU=y
11# CONFIG_NO_IOPORT is not set
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_TRACE_IRQFLAGS_SUPPORT=y
14CONFIG_HARDIRQS_SW_RESEND=y
15CONFIG_GENERIC_IRQ_PROBE=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 16CONFIG_RWSEM_GENERIC_SPINLOCK=y
17# CONFIG_ARCH_HAS_ILOG2_U32 is not set
18# CONFIG_ARCH_HAS_ILOG2_U64 is not set
9CONFIG_GENERIC_HWEIGHT=y 19CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y 20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_ZONE_DMA=y
11CONFIG_ARCH_MTD_XIP=y 22CONFIG_ARCH_MTD_XIP=y
12CONFIG_VECTORS_BASE=0xffff0000 23CONFIG_VECTORS_BASE=0xffff0000
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
13 25
14# 26#
15# Code maturity level options 27# Code maturity level options
@@ -26,18 +38,25 @@ CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y 38CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y 39CONFIG_SWAP=y
28CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
41# CONFIG_IPC_NS is not set
42CONFIG_SYSVIPC_SYSCTL=y
29CONFIG_POSIX_MQUEUE=y 43CONFIG_POSIX_MQUEUE=y
30CONFIG_BSD_PROCESS_ACCT=y 44CONFIG_BSD_PROCESS_ACCT=y
31CONFIG_BSD_PROCESS_ACCT_V3=y 45CONFIG_BSD_PROCESS_ACCT_V3=y
32CONFIG_SYSCTL=y 46# CONFIG_TASKSTATS is not set
33CONFIG_AUDIT=y 47# CONFIG_UTS_NS is not set
48# CONFIG_AUDIT is not set
34CONFIG_IKCONFIG=y 49CONFIG_IKCONFIG=y
35CONFIG_IKCONFIG_PROC=y 50CONFIG_IKCONFIG_PROC=y
51CONFIG_SYSFS_DEPRECATED=y
36# CONFIG_RELAY is not set 52# CONFIG_RELAY is not set
53CONFIG_BLK_DEV_INITRD=y
37CONFIG_INITRAMFS_SOURCE="" 54CONFIG_INITRAMFS_SOURCE=""
38CONFIG_UID16=y
39CONFIG_CC_OPTIMIZE_FOR_SIZE=y 55CONFIG_CC_OPTIMIZE_FOR_SIZE=y
56CONFIG_SYSCTL=y
40CONFIG_EMBEDDED=y 57CONFIG_EMBEDDED=y
58CONFIG_UID16=y
59CONFIG_SYSCTL_SYSCALL=y
41CONFIG_KALLSYMS=y 60CONFIG_KALLSYMS=y
42CONFIG_KALLSYMS_EXTRA_PASS=y 61CONFIG_KALLSYMS_EXTRA_PASS=y
43CONFIG_HOTPLUG=y 62CONFIG_HOTPLUG=y
@@ -49,10 +68,11 @@ CONFIG_FUTEX=y
49CONFIG_EPOLL=y 68CONFIG_EPOLL=y
50CONFIG_SHMEM=y 69CONFIG_SHMEM=y
51CONFIG_SLAB=y 70CONFIG_SLAB=y
71CONFIG_VM_EVENT_COUNTERS=y
72CONFIG_RT_MUTEXES=y
52# CONFIG_TINY_SHMEM is not set 73# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0 74CONFIG_BASE_SMALL=0
54# CONFIG_SLOB is not set 75# CONFIG_SLOB is not set
55CONFIG_OBSOLETE_INTERMODULE=y
56 76
57# 77#
58# Loadable module support 78# Loadable module support
@@ -60,14 +80,17 @@ CONFIG_OBSOLETE_INTERMODULE=y
60CONFIG_MODULES=y 80CONFIG_MODULES=y
61CONFIG_MODULE_UNLOAD=y 81CONFIG_MODULE_UNLOAD=y
62CONFIG_MODULE_FORCE_UNLOAD=y 82CONFIG_MODULE_FORCE_UNLOAD=y
63# CONFIG_MODVERSIONS is not set 83CONFIG_MODVERSIONS=y
64CONFIG_MODULE_SRCVERSION_ALL=y 84CONFIG_MODULE_SRCVERSION_ALL=y
65CONFIG_KMOD=y 85CONFIG_KMOD=y
66 86
67# 87#
68# Block layer 88# Block layer
69# 89#
90CONFIG_BLOCK=y
91CONFIG_LBD=y
70# CONFIG_BLK_DEV_IO_TRACE is not set 92# CONFIG_BLK_DEV_IO_TRACE is not set
93CONFIG_LSF=y
71 94
72# 95#
73# IO Schedulers 96# IO Schedulers
@@ -85,18 +108,29 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
85# 108#
86# System Type 109# System Type
87# 110#
111# CONFIG_ARCH_AAEC2000 is not set
112# CONFIG_ARCH_INTEGRATOR is not set
113# CONFIG_ARCH_REALVIEW is not set
114# CONFIG_ARCH_VERSATILE is not set
115# CONFIG_ARCH_AT91 is not set
88# CONFIG_ARCH_CLPS7500 is not set 116# CONFIG_ARCH_CLPS7500 is not set
89# CONFIG_ARCH_CLPS711X is not set 117# CONFIG_ARCH_CLPS711X is not set
90# CONFIG_ARCH_CO285 is not set 118# CONFIG_ARCH_CO285 is not set
91# CONFIG_ARCH_EBSA110 is not set 119# CONFIG_ARCH_EBSA110 is not set
92# CONFIG_ARCH_EP93XX is not set 120# CONFIG_ARCH_EP93XX is not set
93# CONFIG_ARCH_FOOTBRIDGE is not set 121# CONFIG_ARCH_FOOTBRIDGE is not set
94# CONFIG_ARCH_INTEGRATOR is not set 122# CONFIG_ARCH_NETX is not set
95# CONFIG_ARCH_IOP3XX is not set 123# CONFIG_ARCH_H720X is not set
124# CONFIG_ARCH_IMX is not set
125# CONFIG_ARCH_IOP32X is not set
126# CONFIG_ARCH_IOP33X is not set
127# CONFIG_ARCH_IOP13XX is not set
96# CONFIG_ARCH_IXP4XX is not set 128# CONFIG_ARCH_IXP4XX is not set
97# CONFIG_ARCH_IXP2000 is not set 129# CONFIG_ARCH_IXP2000 is not set
98# CONFIG_ARCH_IXP23XX is not set 130# CONFIG_ARCH_IXP23XX is not set
99# CONFIG_ARCH_L7200 is not set 131# CONFIG_ARCH_L7200 is not set
132# CONFIG_ARCH_NS9XXX is not set
133# CONFIG_ARCH_PNX4008 is not set
100CONFIG_ARCH_PXA=y 134CONFIG_ARCH_PXA=y
101# CONFIG_ARCH_RPC is not set 135# CONFIG_ARCH_RPC is not set
102# CONFIG_ARCH_SA1100 is not set 136# CONFIG_ARCH_SA1100 is not set
@@ -104,12 +138,6 @@ CONFIG_ARCH_PXA=y
104# CONFIG_ARCH_SHARK is not set 138# CONFIG_ARCH_SHARK is not set
105# CONFIG_ARCH_LH7A40X is not set 139# CONFIG_ARCH_LH7A40X is not set
106# CONFIG_ARCH_OMAP is not set 140# CONFIG_ARCH_OMAP is not set
107# CONFIG_ARCH_VERSATILE is not set
108# CONFIG_ARCH_REALVIEW is not set
109# CONFIG_ARCH_IMX is not set
110# CONFIG_ARCH_H720X is not set
111# CONFIG_ARCH_AAEC2000 is not set
112# CONFIG_ARCH_AT91RM9200 is not set
113 141
114# 142#
115# Intel PXA2xx Implementations 143# Intel PXA2xx Implementations
@@ -133,11 +161,16 @@ CONFIG_CPU_32v5=y
133CONFIG_CPU_ABRT_EV5T=y 161CONFIG_CPU_ABRT_EV5T=y
134CONFIG_CPU_CACHE_VIVT=y 162CONFIG_CPU_CACHE_VIVT=y
135CONFIG_CPU_TLB_V4WBI=y 163CONFIG_CPU_TLB_V4WBI=y
164CONFIG_CPU_CP15=y
165CONFIG_CPU_CP15_MMU=y
136 166
137# 167#
138# Processor Features 168# Processor Features
139# 169#
140CONFIG_ARM_THUMB=y 170CONFIG_ARM_THUMB=y
171# CONFIG_CPU_DCACHE_DISABLE is not set
172# CONFIG_OUTER_CACHE is not set
173CONFIG_IWMMXT=y
141CONFIG_XSCALE_PMU=y 174CONFIG_XSCALE_PMU=y
142 175
143# 176#
@@ -147,16 +180,16 @@ CONFIG_XSCALE_PMU=y
147# 180#
148# PCCARD (PCMCIA/CardBus) support 181# PCCARD (PCMCIA/CardBus) support
149# 182#
150CONFIG_PCCARD=m 183CONFIG_PCCARD=y
151# CONFIG_PCMCIA_DEBUG is not set 184# CONFIG_PCMCIA_DEBUG is not set
152CONFIG_PCMCIA=m 185CONFIG_PCMCIA=y
153CONFIG_PCMCIA_LOAD_CIS=y 186# CONFIG_PCMCIA_LOAD_CIS is not set
154CONFIG_PCMCIA_IOCTL=y 187CONFIG_PCMCIA_IOCTL=y
155 188
156# 189#
157# PC-card bridges 190# PC-card bridges
158# 191#
159CONFIG_PCMCIA_PXA2XX=m 192CONFIG_PCMCIA_PXA2XX=y
160 193
161# 194#
162# Kernel Features 195# Kernel Features
@@ -164,7 +197,8 @@ CONFIG_PCMCIA_PXA2XX=m
164CONFIG_PREEMPT=y 197CONFIG_PREEMPT=y
165# CONFIG_NO_IDLE_HZ is not set 198# CONFIG_NO_IDLE_HZ is not set
166CONFIG_HZ=100 199CONFIG_HZ=100
167# CONFIG_AEABI is not set 200CONFIG_AEABI=y
201CONFIG_OABI_COMPAT=y
168# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 202# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
169CONFIG_SELECT_MEMORY_MODEL=y 203CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y 204CONFIG_FLATMEM_MANUAL=y
@@ -174,6 +208,8 @@ CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y 208CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set 209# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_SPLIT_PTLOCK_CPUS=4096 210CONFIG_SPLIT_PTLOCK_CPUS=4096
211# CONFIG_RESOURCES_64BIT is not set
212CONFIG_ZONE_DMA_FLAG=1
177CONFIG_LEDS=y 213CONFIG_LEDS=y
178CONFIG_LEDS_TIMER=y 214CONFIG_LEDS_TIMER=y
179CONFIG_LEDS_CPU=y 215CONFIG_LEDS_CPU=y
@@ -184,8 +220,9 @@ CONFIG_ALIGNMENT_TRAP=y
184# 220#
185CONFIG_ZBOOT_ROM_TEXT=0 221CONFIG_ZBOOT_ROM_TEXT=0
186CONFIG_ZBOOT_ROM_BSS=0 222CONFIG_ZBOOT_ROM_BSS=0
187CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200n8" 223CONFIG_CMDLINE="root=fe01 console=ttyS0,38400n8 loglevel=5"
188# CONFIG_XIP_KERNEL is not set 224# CONFIG_XIP_KERNEL is not set
225# CONFIG_KEXEC is not set
189 226
190# 227#
191# Floating point emulation 228# Floating point emulation
@@ -203,16 +240,16 @@ CONFIG_FPE_NWFPE_XP=y
203# 240#
204CONFIG_BINFMT_ELF=y 241CONFIG_BINFMT_ELF=y
205# CONFIG_BINFMT_AOUT is not set 242# CONFIG_BINFMT_AOUT is not set
206CONFIG_BINFMT_MISC=m 243# CONFIG_BINFMT_MISC is not set
207# CONFIG_ARTHUR is not set
208 244
209# 245#
210# Power management options 246# Power management options
211# 247#
212CONFIG_PM=y 248CONFIG_PM=y
213CONFIG_PM_LEGACY=y 249# CONFIG_PM_LEGACY is not set
214# CONFIG_PM_DEBUG is not set 250# CONFIG_PM_DEBUG is not set
215CONFIG_APM=y 251# CONFIG_PM_SYSFS_DEPRECATED is not set
252# CONFIG_APM_EMULATION is not set
216 253
217# 254#
218# Networking 255# Networking
@@ -222,13 +259,15 @@ CONFIG_NET=y
222# 259#
223# Networking options 260# Networking options
224# 261#
225# CONFIG_NETDEBUG is not set
226CONFIG_PACKET=y 262CONFIG_PACKET=y
227CONFIG_PACKET_MMAP=y 263CONFIG_PACKET_MMAP=y
228CONFIG_UNIX=y 264CONFIG_UNIX=y
229CONFIG_XFRM=y 265CONFIG_XFRM=y
230CONFIG_XFRM_USER=m 266CONFIG_XFRM_USER=m
267# CONFIG_XFRM_SUB_POLICY is not set
268# CONFIG_XFRM_MIGRATE is not set
231CONFIG_NET_KEY=y 269CONFIG_NET_KEY=y
270# CONFIG_NET_KEY_MIGRATE is not set
232CONFIG_INET=y 271CONFIG_INET=y
233# CONFIG_IP_MULTICAST is not set 272# CONFIG_IP_MULTICAST is not set
234# CONFIG_IP_ADVANCED_ROUTER is not set 273# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -246,24 +285,25 @@ CONFIG_IP_PNP_BOOTP=y
246# CONFIG_INET_IPCOMP is not set 285# CONFIG_INET_IPCOMP is not set
247# CONFIG_INET_XFRM_TUNNEL is not set 286# CONFIG_INET_XFRM_TUNNEL is not set
248# CONFIG_INET_TUNNEL is not set 287# CONFIG_INET_TUNNEL is not set
288CONFIG_INET_XFRM_MODE_TRANSPORT=y
289CONFIG_INET_XFRM_MODE_TUNNEL=y
290CONFIG_INET_XFRM_MODE_BEET=y
249CONFIG_INET_DIAG=y 291CONFIG_INET_DIAG=y
250CONFIG_INET_TCP_DIAG=y 292CONFIG_INET_TCP_DIAG=y
251# CONFIG_TCP_CONG_ADVANCED is not set 293# CONFIG_TCP_CONG_ADVANCED is not set
252CONFIG_TCP_CONG_BIC=y 294CONFIG_TCP_CONG_CUBIC=y
295CONFIG_DEFAULT_TCP_CONG="cubic"
296# CONFIG_TCP_MD5SIG is not set
253 297
254# 298#
255# IP: Virtual Server Configuration 299# IP: Virtual Server Configuration
256# 300#
257# CONFIG_IP_VS is not set 301# CONFIG_IP_VS is not set
258CONFIG_IPV6=m 302# CONFIG_IPV6 is not set
259# CONFIG_IPV6_PRIVACY is not set
260# CONFIG_IPV6_ROUTER_PREF is not set
261# CONFIG_INET6_AH is not set
262# CONFIG_INET6_ESP is not set
263# CONFIG_INET6_IPCOMP is not set
264# CONFIG_INET6_XFRM_TUNNEL is not set 303# CONFIG_INET6_XFRM_TUNNEL is not set
265# CONFIG_INET6_TUNNEL is not set 304# CONFIG_INET6_TUNNEL is not set
266# CONFIG_IPV6_TUNNEL is not set 305# CONFIG_NETLABEL is not set
306# CONFIG_NETWORK_SECMARK is not set
267CONFIG_NETFILTER=y 307CONFIG_NETFILTER=y
268# CONFIG_NETFILTER_DEBUG is not set 308# CONFIG_NETFILTER_DEBUG is not set
269 309
@@ -271,29 +311,16 @@ CONFIG_NETFILTER=y
271# Core Netfilter Configuration 311# Core Netfilter Configuration
272# 312#
273# CONFIG_NETFILTER_NETLINK is not set 313# CONFIG_NETFILTER_NETLINK is not set
314# CONFIG_NF_CONNTRACK_ENABLED is not set
315# CONFIG_NF_CONNTRACK is not set
274# CONFIG_NETFILTER_XTABLES is not set 316# CONFIG_NETFILTER_XTABLES is not set
275 317
276# 318#
277# IP: Netfilter Configuration 319# IP: Netfilter Configuration
278# 320#
279CONFIG_IP_NF_CONNTRACK=m
280CONFIG_IP_NF_CT_ACCT=y
281CONFIG_IP_NF_CONNTRACK_MARK=y
282# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
283# CONFIG_IP_NF_CT_PROTO_SCTP is not set
284CONFIG_IP_NF_FTP=m
285CONFIG_IP_NF_IRC=m
286# CONFIG_IP_NF_NETBIOS_NS is not set
287CONFIG_IP_NF_TFTP=m
288CONFIG_IP_NF_AMANDA=m
289# CONFIG_IP_NF_PPTP is not set
290# CONFIG_IP_NF_H323 is not set
291CONFIG_IP_NF_QUEUE=m 321CONFIG_IP_NF_QUEUE=m
292 322# CONFIG_IP_NF_IPTABLES is not set
293# 323# CONFIG_IP_NF_ARPTABLES is not set
294# IPv6: Netfilter Configuration (EXPERIMENTAL)
295#
296# CONFIG_IP6_NF_QUEUE is not set
297 324
298# 325#
299# DCCP Configuration (EXPERIMENTAL) 326# DCCP Configuration (EXPERIMENTAL)
@@ -318,7 +345,6 @@ CONFIG_VLAN_8021Q=m
318# CONFIG_ATALK is not set 345# CONFIG_ATALK is not set
319# CONFIG_X25 is not set 346# CONFIG_X25 is not set
320# CONFIG_LAPB is not set 347# CONFIG_LAPB is not set
321# CONFIG_NET_DIVERT is not set
322# CONFIG_ECONET is not set 348# CONFIG_ECONET is not set
323# CONFIG_WAN_ROUTER is not set 349# CONFIG_WAN_ROUTER is not set
324 350
@@ -378,6 +404,7 @@ CONFIG_IRTTY_SIR=m
378# CONFIG_USB_IRDA is not set 404# CONFIG_USB_IRDA is not set
379# CONFIG_SIGMATEL_FIR is not set 405# CONFIG_SIGMATEL_FIR is not set
380# CONFIG_PXA_FICP is not set 406# CONFIG_PXA_FICP is not set
407# CONFIG_MCS_FIR is not set
381CONFIG_BT=m 408CONFIG_BT=m
382CONFIG_BT_L2CAP=m 409CONFIG_BT_L2CAP=m
383CONFIG_BT_SCO=m 410CONFIG_BT_SCO=m
@@ -401,14 +428,20 @@ CONFIG_BT_HIDP=m
401# CONFIG_BT_HCIBLUECARD is not set 428# CONFIG_BT_HCIBLUECARD is not set
402# CONFIG_BT_HCIBTUART is not set 429# CONFIG_BT_HCIBTUART is not set
403# CONFIG_BT_HCIVHCI is not set 430# CONFIG_BT_HCIVHCI is not set
404CONFIG_IEEE80211=m 431# CONFIG_AF_RXRPC is not set
432
433#
434# Wireless
435#
436CONFIG_CFG80211=y
437CONFIG_WIRELESS_EXT=y
438CONFIG_IEEE80211=y
405# CONFIG_IEEE80211_DEBUG is not set 439# CONFIG_IEEE80211_DEBUG is not set
406CONFIG_IEEE80211_CRYPT_WEP=m 440CONFIG_IEEE80211_CRYPT_WEP=y
407CONFIG_IEEE80211_CRYPT_CCMP=m 441CONFIG_IEEE80211_CRYPT_CCMP=m
408CONFIG_IEEE80211_CRYPT_TKIP=m 442CONFIG_IEEE80211_CRYPT_TKIP=m
409CONFIG_IEEE80211_SOFTMAC=m 443CONFIG_IEEE80211_SOFTMAC=m
410# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set 444# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
411CONFIG_WIRELESS_EXT=y
412 445
413# 446#
414# Device Drivers 447# Device Drivers
@@ -420,16 +453,13 @@ CONFIG_WIRELESS_EXT=y
420CONFIG_STANDALONE=y 453CONFIG_STANDALONE=y
421CONFIG_PREVENT_FIRMWARE_BUILD=y 454CONFIG_PREVENT_FIRMWARE_BUILD=y
422CONFIG_FW_LOADER=y 455CONFIG_FW_LOADER=y
456# CONFIG_SYS_HYPERVISOR is not set
423 457
424# 458#
425# Connector - unified userspace <-> kernelspace linker 459# Connector - unified userspace <-> kernelspace linker
426# 460#
427CONFIG_CONNECTOR=y 461CONFIG_CONNECTOR=y
428CONFIG_PROC_EVENTS=y 462CONFIG_PROC_EVENTS=y
429
430#
431# Memory Technology Devices (MTD)
432#
433CONFIG_MTD=y 463CONFIG_MTD=y
434# CONFIG_MTD_DEBUG is not set 464# CONFIG_MTD_DEBUG is not set
435CONFIG_MTD_CONCAT=y 465CONFIG_MTD_CONCAT=y
@@ -445,12 +475,13 @@ CONFIG_MTD_REDBOOT_PARTS_READONLY=y
445# User Modules And Translation Layers 475# User Modules And Translation Layers
446# 476#
447CONFIG_MTD_CHAR=y 477CONFIG_MTD_CHAR=y
478CONFIG_MTD_BLKDEVS=y
448CONFIG_MTD_BLOCK=y 479CONFIG_MTD_BLOCK=y
449# CONFIG_FTL is not set 480# CONFIG_FTL is not set
450CONFIG_NFTL=y 481# CONFIG_NFTL is not set
451CONFIG_NFTL_RW=y 482# CONFIG_INFTL is not set
452CONFIG_INFTL=y
453# CONFIG_RFD_FTL is not set 483# CONFIG_RFD_FTL is not set
484# CONFIG_SSFDC is not set
454 485
455# 486#
456# RAM/ROM/Flash chip drivers 487# RAM/ROM/Flash chip drivers
@@ -490,9 +521,8 @@ CONFIG_MTD_CFI_UTIL=y
490CONFIG_MTD_COMPLEX_MAPPINGS=y 521CONFIG_MTD_COMPLEX_MAPPINGS=y
491CONFIG_MTD_PHYSMAP=y 522CONFIG_MTD_PHYSMAP=y
492CONFIG_MTD_PHYSMAP_START=0x0 523CONFIG_MTD_PHYSMAP_START=0x0
493CONFIG_MTD_PHYSMAP_LEN=0x4000000 524CONFIG_MTD_PHYSMAP_LEN=0x0
494CONFIG_MTD_PHYSMAP_BANKWIDTH=2 525CONFIG_MTD_PHYSMAP_BANKWIDTH=2
495# CONFIG_MTD_TRIZEPS4 is not set
496# CONFIG_MTD_ARM_INTEGRATOR is not set 526# CONFIG_MTD_ARM_INTEGRATOR is not set
497# CONFIG_MTD_IMPA7 is not set 527# CONFIG_MTD_IMPA7 is not set
498# CONFIG_MTD_SHARP_SL is not set 528# CONFIG_MTD_SHARP_SL is not set
@@ -501,42 +531,45 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
501# 531#
502# Self-contained MTD device drivers 532# Self-contained MTD device drivers
503# 533#
504# CONFIG_MTD_DATAFLASH is not set
505# CONFIG_MTD_M25P80 is not set
506# CONFIG_MTD_SLRAM is not set 534# CONFIG_MTD_SLRAM is not set
507# CONFIG_MTD_PHRAM is not set 535# CONFIG_MTD_PHRAM is not set
508# CONFIG_MTD_MTDRAM is not set 536# CONFIG_MTD_MTDRAM is not set
509# CONFIG_MTD_BLOCK2MTD is not set 537CONFIG_MTD_BLOCK2MTD=y
510 538
511# 539#
512# Disk-On-Chip Device Drivers 540# Disk-On-Chip Device Drivers
513# 541#
514# CONFIG_MTD_DOC2000 is not set 542CONFIG_MTD_DOC2000=y
515# CONFIG_MTD_DOC2001 is not set 543CONFIG_MTD_DOC2001=y
516CONFIG_MTD_DOC2001PLUS=y 544CONFIG_MTD_DOC2001PLUS=y
517CONFIG_MTD_DOCPROBE=y 545CONFIG_MTD_DOCPROBE=y
518CONFIG_MTD_DOCECC=y 546CONFIG_MTD_DOCECC=y
519# CONFIG_MTD_DOCPROBE_ADVANCED is not set 547CONFIG_MTD_DOCPROBE_ADVANCED=y
520CONFIG_MTD_DOCPROBE_ADDRESS=0 548CONFIG_MTD_DOCPROBE_ADDRESS=0x4000000
521 549CONFIG_MTD_DOCPROBE_HIGH=y
522# 550# CONFIG_MTD_DOCPROBE_55AA is not set
523# NAND Flash Device Drivers
524#
525CONFIG_MTD_NAND=y 551CONFIG_MTD_NAND=y
526# CONFIG_MTD_NAND_VERIFY_WRITE is not set 552# CONFIG_MTD_NAND_VERIFY_WRITE is not set
553# CONFIG_MTD_NAND_ECC_SMC is not set
554# CONFIG_MTD_NAND_MUSEUM_IDS is not set
527# CONFIG_MTD_NAND_H1900 is not set 555# CONFIG_MTD_NAND_H1900 is not set
528CONFIG_MTD_NAND_IDS=y 556CONFIG_MTD_NAND_IDS=y
529CONFIG_MTD_NAND_DISKONCHIP=y 557CONFIG_MTD_NAND_DISKONCHIP=y
530# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set 558CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
531CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 559CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
532# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set 560CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
561CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
533# CONFIG_MTD_NAND_SHARPSL is not set 562# CONFIG_MTD_NAND_SHARPSL is not set
534# CONFIG_MTD_NAND_NANDSIM is not set 563# CONFIG_MTD_NAND_NANDSIM is not set
564CONFIG_MTD_ONENAND=y
565# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
566# CONFIG_MTD_ONENAND_GENERIC is not set
567# CONFIG_MTD_ONENAND_OTP is not set
535 568
536# 569#
537# OneNAND Flash Device Drivers 570# UBI - Unsorted block images
538# 571#
539# CONFIG_MTD_ONENAND is not set 572# CONFIG_MTD_UBI is not set
540 573
541# 574#
542# Parallel port support 575# Parallel port support
@@ -546,6 +579,7 @@ CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
546# 579#
547# Plug and Play support 580# Plug and Play support
548# 581#
582# CONFIG_PNPACPI is not set
549 583
550# 584#
551# Block devices 585# Block devices
@@ -556,9 +590,9 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
556CONFIG_BLK_DEV_NBD=y 590CONFIG_BLK_DEV_NBD=y
557# CONFIG_BLK_DEV_UB is not set 591# CONFIG_BLK_DEV_UB is not set
558CONFIG_BLK_DEV_RAM=y 592CONFIG_BLK_DEV_RAM=y
559CONFIG_BLK_DEV_RAM_COUNT=4 593CONFIG_BLK_DEV_RAM_COUNT=8
560CONFIG_BLK_DEV_RAM_SIZE=4096 594CONFIG_BLK_DEV_RAM_SIZE=4096
561CONFIG_BLK_DEV_INITRD=y 595CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
562# CONFIG_CDROM_PKTCDVD is not set 596# CONFIG_CDROM_PKTCDVD is not set
563# CONFIG_ATA_OVER_ETH is not set 597# CONFIG_ATA_OVER_ETH is not set
564 598
@@ -566,6 +600,7 @@ CONFIG_BLK_DEV_INITRD=y
566# ATA/ATAPI/MFM/RLL support 600# ATA/ATAPI/MFM/RLL support
567# 601#
568CONFIG_IDE=y 602CONFIG_IDE=y
603CONFIG_IDE_MAX_HWIFS=4
569CONFIG_BLK_DEV_IDE=y 604CONFIG_BLK_DEV_IDE=y
570 605
571# 606#
@@ -585,27 +620,27 @@ CONFIG_BLK_DEV_IDECS=m
585# IDE chipset support/bugfixes 620# IDE chipset support/bugfixes
586# 621#
587CONFIG_IDE_GENERIC=y 622CONFIG_IDE_GENERIC=y
588CONFIG_IDE_PXA_CF=y 623# CONFIG_IDE_ARM is not set
589CONFIG_IDE_ARM=y
590# CONFIG_BLK_DEV_IDEDMA is not set 624# CONFIG_BLK_DEV_IDEDMA is not set
591# CONFIG_IDEDMA_AUTO is not set
592# CONFIG_BLK_DEV_HD is not set 625# CONFIG_BLK_DEV_HD is not set
593 626
594# 627#
595# SCSI device support 628# SCSI device support
596# 629#
597# CONFIG_RAID_ATTRS is not set 630# CONFIG_RAID_ATTRS is not set
598CONFIG_SCSI=m 631CONFIG_SCSI=y
632# CONFIG_SCSI_TGT is not set
633# CONFIG_SCSI_NETLINK is not set
599CONFIG_SCSI_PROC_FS=y 634CONFIG_SCSI_PROC_FS=y
600 635
601# 636#
602# SCSI support type (disk, tape, CD-ROM) 637# SCSI support type (disk, tape, CD-ROM)
603# 638#
604CONFIG_BLK_DEV_SD=m 639CONFIG_BLK_DEV_SD=y
605# CONFIG_CHR_DEV_ST is not set 640# CONFIG_CHR_DEV_ST is not set
606# CONFIG_CHR_DEV_OSST is not set 641# CONFIG_CHR_DEV_OSST is not set
607# CONFIG_BLK_DEV_SR is not set 642# CONFIG_BLK_DEV_SR is not set
608CONFIG_CHR_DEV_SG=m 643CONFIG_CHR_DEV_SG=y
609# CONFIG_CHR_DEV_SCH is not set 644# CONFIG_CHR_DEV_SCH is not set
610 645
611# 646#
@@ -614,21 +649,23 @@ CONFIG_CHR_DEV_SG=m
614CONFIG_SCSI_MULTI_LUN=y 649CONFIG_SCSI_MULTI_LUN=y
615# CONFIG_SCSI_CONSTANTS is not set 650# CONFIG_SCSI_CONSTANTS is not set
616# CONFIG_SCSI_LOGGING is not set 651# CONFIG_SCSI_LOGGING is not set
652# CONFIG_SCSI_SCAN_ASYNC is not set
617 653
618# 654#
619# SCSI Transport Attributes 655# SCSI Transports
620# 656#
621# CONFIG_SCSI_SPI_ATTRS is not set 657# CONFIG_SCSI_SPI_ATTRS is not set
622# CONFIG_SCSI_FC_ATTRS is not set 658# CONFIG_SCSI_FC_ATTRS is not set
623# CONFIG_SCSI_ISCSI_ATTRS is not set 659# CONFIG_SCSI_ISCSI_ATTRS is not set
624# CONFIG_SCSI_SAS_ATTRS is not set 660# CONFIG_SCSI_SAS_ATTRS is not set
661# CONFIG_SCSI_SAS_LIBSAS is not set
625 662
626# 663#
627# SCSI low-level drivers 664# SCSI low-level drivers
628# 665#
629# CONFIG_ISCSI_TCP is not set 666# CONFIG_ISCSI_TCP is not set
630# CONFIG_SCSI_SATA is not set
631# CONFIG_SCSI_DEBUG is not set 667# CONFIG_SCSI_DEBUG is not set
668# CONFIG_SCSI_ESP_CORE is not set
632 669
633# 670#
634# PCMCIA SCSI adapter support 671# PCMCIA SCSI adapter support
@@ -640,6 +677,14 @@ CONFIG_SCSI_MULTI_LUN=y
640# CONFIG_PCMCIA_SYM53C500 is not set 677# CONFIG_PCMCIA_SYM53C500 is not set
641 678
642# 679#
680# Serial ATA (prod) and Parallel ATA (experimental) drivers
681#
682CONFIG_ATA=m
683# CONFIG_ATA_NONSTANDARD is not set
684CONFIG_PATA_PCMCIA=m
685CONFIG_PATA_PLATFORM=m
686
687#
643# Multi-device support (RAID and LVM) 688# Multi-device support (RAID and LVM)
644# 689#
645# CONFIG_MD is not set 690# CONFIG_MD is not set
@@ -675,10 +720,14 @@ CONFIG_PHYLIB=y
675# MII PHY device drivers 720# MII PHY device drivers
676# 721#
677# CONFIG_MARVELL_PHY is not set 722# CONFIG_MARVELL_PHY is not set
678CONFIG_DAVICOM_PHY=y 723# CONFIG_DAVICOM_PHY is not set
679# CONFIG_QSEMI_PHY is not set 724# CONFIG_QSEMI_PHY is not set
680# CONFIG_LXT_PHY is not set 725# CONFIG_LXT_PHY is not set
681# CONFIG_CICADA_PHY is not set 726# CONFIG_CICADA_PHY is not set
727# CONFIG_VITESSE_PHY is not set
728# CONFIG_SMSC_PHY is not set
729# CONFIG_BROADCOM_PHY is not set
730# CONFIG_FIXED_PHY is not set
682 731
683# 732#
684# Ethernet (10 or 100Mbit) 733# Ethernet (10 or 100Mbit)
@@ -687,6 +736,7 @@ CONFIG_NET_ETHERNET=y
687CONFIG_MII=y 736CONFIG_MII=y
688# CONFIG_SMC91X is not set 737# CONFIG_SMC91X is not set
689CONFIG_DM9000=y 738CONFIG_DM9000=y
739# CONFIG_SMC911X is not set
690 740
691# 741#
692# Ethernet (1000 Mbit) 742# Ethernet (1000 Mbit)
@@ -701,41 +751,23 @@ CONFIG_DM9000=y
701# 751#
702 752
703# 753#
704# Wireless LAN (non-hamradio) 754# Wireless LAN
705#
706CONFIG_NET_RADIO=y
707# CONFIG_NET_WIRELESS_RTNETLINK is not set
708
709#
710# Obsolete Wireless cards support (pre-802.11)
711#
712# CONFIG_STRIP is not set
713# CONFIG_PCMCIA_WAVELAN is not set
714# CONFIG_PCMCIA_NETWAVE is not set
715
716#
717# Wireless 802.11 Frequency Hopping cards support
718# 755#
756# CONFIG_WLAN_PRE80211 is not set
757CONFIG_WLAN_80211=y
719# CONFIG_PCMCIA_RAYCS is not set 758# CONFIG_PCMCIA_RAYCS is not set
720 759CONFIG_HERMES=y
721#
722# Wireless 802.11b ISA/PCI cards support
723#
724CONFIG_HERMES=m
725# CONFIG_ATMEL is not set 760# CONFIG_ATMEL is not set
726 761CONFIG_PCMCIA_HERMES=y
727# 762CONFIG_PCMCIA_SPECTRUM=y
728# Wireless 802.11b Pcmcia/Cardbus cards support 763# CONFIG_AIRO_CS is not set
729#
730CONFIG_PCMCIA_HERMES=m
731# CONFIG_PCMCIA_SPECTRUM is not set
732CONFIG_AIRO_CS=m
733# CONFIG_PCMCIA_WL3501 is not set 764# CONFIG_PCMCIA_WL3501 is not set
734CONFIG_HOSTAP=m 765# CONFIG_USB_ZD1201 is not set
766CONFIG_HOSTAP=y
735CONFIG_HOSTAP_FIRMWARE=y 767CONFIG_HOSTAP_FIRMWARE=y
736CONFIG_HOSTAP_FIRMWARE_NVRAM=y 768CONFIG_HOSTAP_FIRMWARE_NVRAM=y
737CONFIG_HOSTAP_CS=m 769CONFIG_HOSTAP_CS=y
738CONFIG_NET_WIRELESS=y 770# CONFIG_ZD1211RW is not set
739 771
740# 772#
741# PCMCIA network device support 773# PCMCIA network device support
@@ -756,6 +788,7 @@ CONFIG_PPP_BSDCOMP=m
756CONFIG_PPP_MPPE=m 788CONFIG_PPP_MPPE=m
757# CONFIG_PPPOE is not set 789# CONFIG_PPPOE is not set
758# CONFIG_SLIP is not set 790# CONFIG_SLIP is not set
791CONFIG_SLHC=m
759# CONFIG_SHAPER is not set 792# CONFIG_SHAPER is not set
760# CONFIG_NETCONSOLE is not set 793# CONFIG_NETCONSOLE is not set
761# CONFIG_NETPOLL is not set 794# CONFIG_NETPOLL is not set
@@ -770,6 +803,7 @@ CONFIG_PPP_MPPE=m
770# Input device support 803# Input device support
771# 804#
772CONFIG_INPUT=y 805CONFIG_INPUT=y
806# CONFIG_INPUT_FF_MEMLESS is not set
773 807
774# 808#
775# Userland interfaces 809# Userland interfaces
@@ -789,22 +823,27 @@ CONFIG_INPUT_EVDEV=y
789# Input Device Drivers 823# Input Device Drivers
790# 824#
791CONFIG_INPUT_KEYBOARD=y 825CONFIG_INPUT_KEYBOARD=y
792CONFIG_KEYBOARD_ATKBD=y 826CONFIG_KEYBOARD_ATKBD=m
793# CONFIG_KEYBOARD_SUNKBD is not set 827# CONFIG_KEYBOARD_SUNKBD is not set
794# CONFIG_KEYBOARD_LKKBD is not set 828# CONFIG_KEYBOARD_LKKBD is not set
795# CONFIG_KEYBOARD_XTKBD is not set 829# CONFIG_KEYBOARD_XTKBD is not set
796# CONFIG_KEYBOARD_NEWTON is not set 830# CONFIG_KEYBOARD_NEWTON is not set
831# CONFIG_KEYBOARD_STOWAWAY is not set
832# CONFIG_KEYBOARD_GPIO is not set
797CONFIG_INPUT_MOUSE=y 833CONFIG_INPUT_MOUSE=y
798# CONFIG_MOUSE_PS2 is not set 834# CONFIG_MOUSE_PS2 is not set
799CONFIG_MOUSE_SERIAL=y 835CONFIG_MOUSE_SERIAL=m
800# CONFIG_MOUSE_VSXXXAA is not set 836# CONFIG_MOUSE_VSXXXAA is not set
801# CONFIG_INPUT_JOYSTICK is not set 837# CONFIG_INPUT_JOYSTICK is not set
802CONFIG_INPUT_TOUCHSCREEN=y 838CONFIG_INPUT_TOUCHSCREEN=y
803# CONFIG_TOUCHSCREEN_ADS7846 is not set
804# CONFIG_TOUCHSCREEN_GUNZE is not set 839# CONFIG_TOUCHSCREEN_GUNZE is not set
805# CONFIG_TOUCHSCREEN_ELO is not set 840# CONFIG_TOUCHSCREEN_ELO is not set
806# CONFIG_TOUCHSCREEN_MTOUCH is not set 841# CONFIG_TOUCHSCREEN_MTOUCH is not set
807# CONFIG_TOUCHSCREEN_MK712 is not set 842# CONFIG_TOUCHSCREEN_MK712 is not set
843# CONFIG_TOUCHSCREEN_PENMOUNT is not set
844# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
845# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
846CONFIG_TOUCHSCREEN_UCB1400=y
808CONFIG_INPUT_MISC=y 847CONFIG_INPUT_MISC=y
809CONFIG_INPUT_UINPUT=m 848CONFIG_INPUT_UINPUT=m
810 849
@@ -823,6 +862,7 @@ CONFIG_SERIO_LIBPS2=y
823CONFIG_VT=y 862CONFIG_VT=y
824CONFIG_VT_CONSOLE=y 863CONFIG_VT_CONSOLE=y
825CONFIG_HW_CONSOLE=y 864CONFIG_HW_CONSOLE=y
865# CONFIG_VT_HW_CONSOLE_BINDING is not set
826# CONFIG_SERIAL_NONSTANDARD is not set 866# CONFIG_SERIAL_NONSTANDARD is not set
827 867
828# 868#
@@ -862,15 +902,12 @@ CONFIG_SA1100_WATCHDOG=y
862# USB-based Watchdog Cards 902# USB-based Watchdog Cards
863# 903#
864# CONFIG_USBPCWATCHDOG is not set 904# CONFIG_USBPCWATCHDOG is not set
905CONFIG_HW_RANDOM=y
865# CONFIG_NVRAM is not set 906# CONFIG_NVRAM is not set
866# CONFIG_DTLK is not set 907# CONFIG_DTLK is not set
867# CONFIG_R3964 is not set 908# CONFIG_R3964 is not set
868 909
869# 910#
870# Ftape, the floppy tape device driver
871#
872
873#
874# PCMCIA character devices 911# PCMCIA character devices
875# 912#
876# CONFIG_SYNCLINK_CS is not set 913# CONFIG_SYNCLINK_CS is not set
@@ -882,7 +919,6 @@ CONFIG_SA1100_WATCHDOG=y
882# TPM devices 919# TPM devices
883# 920#
884# CONFIG_TCG_TPM is not set 921# CONFIG_TCG_TPM is not set
885# CONFIG_TELCLOCK is not set
886 922
887# 923#
888# I2C support 924# I2C support
@@ -902,6 +938,7 @@ CONFIG_I2C_CHARDEV=y
902# 938#
903CONFIG_I2C_PXA=y 939CONFIG_I2C_PXA=y
904CONFIG_I2C_PXA_SLAVE=y 940CONFIG_I2C_PXA_SLAVE=y
941# CONFIG_I2C_OCORES is not set
905# CONFIG_I2C_PARPORT_LIGHT is not set 942# CONFIG_I2C_PARPORT_LIGHT is not set
906# CONFIG_I2C_STUB is not set 943# CONFIG_I2C_STUB is not set
907# CONFIG_I2C_PCA_ISA is not set 944# CONFIG_I2C_PCA_ISA is not set
@@ -911,7 +948,7 @@ CONFIG_I2C_PXA_SLAVE=y
911# 948#
912# CONFIG_SENSORS_DS1337 is not set 949# CONFIG_SENSORS_DS1337 is not set
913# CONFIG_SENSORS_DS1374 is not set 950# CONFIG_SENSORS_DS1374 is not set
914CONFIG_SENSORS_EEPROM=m 951# CONFIG_SENSORS_EEPROM is not set
915# CONFIG_SENSORS_PCF8574 is not set 952# CONFIG_SENSORS_PCF8574 is not set
916# CONFIG_SENSORS_PCA9539 is not set 953# CONFIG_SENSORS_PCA9539 is not set
917# CONFIG_SENSORS_PCF8591 is not set 954# CONFIG_SENSORS_PCF8591 is not set
@@ -924,18 +961,8 @@ CONFIG_SENSORS_EEPROM=m
924# 961#
925# SPI support 962# SPI support
926# 963#
927CONFIG_SPI=y 964# CONFIG_SPI is not set
928CONFIG_SPI_MASTER=y 965# CONFIG_SPI_MASTER is not set
929
930#
931# SPI Master Controller Drivers
932#
933# CONFIG_SPI_BITBANG is not set
934CONFIG_SPI_PXA2XX=m
935
936#
937# SPI Protocol Masters
938#
939 966
940# 967#
941# Dallas's 1-wire bus 968# Dallas's 1-wire bus
@@ -947,9 +974,11 @@ CONFIG_SPI_PXA2XX=m
947# 974#
948CONFIG_HWMON=y 975CONFIG_HWMON=y
949# CONFIG_HWMON_VID is not set 976# CONFIG_HWMON_VID is not set
977# CONFIG_SENSORS_ABITUGURU is not set
950# CONFIG_SENSORS_ADM1021 is not set 978# CONFIG_SENSORS_ADM1021 is not set
951# CONFIG_SENSORS_ADM1025 is not set 979# CONFIG_SENSORS_ADM1025 is not set
952# CONFIG_SENSORS_ADM1026 is not set 980# CONFIG_SENSORS_ADM1026 is not set
981# CONFIG_SENSORS_ADM1029 is not set
953# CONFIG_SENSORS_ADM1031 is not set 982# CONFIG_SENSORS_ADM1031 is not set
954# CONFIG_SENSORS_ADM9240 is not set 983# CONFIG_SENSORS_ADM9240 is not set
955# CONFIG_SENSORS_ASB100 is not set 984# CONFIG_SENSORS_ASB100 is not set
@@ -973,10 +1002,15 @@ CONFIG_HWMON=y
973# CONFIG_SENSORS_LM92 is not set 1002# CONFIG_SENSORS_LM92 is not set
974# CONFIG_SENSORS_MAX1619 is not set 1003# CONFIG_SENSORS_MAX1619 is not set
975# CONFIG_SENSORS_PC87360 is not set 1004# CONFIG_SENSORS_PC87360 is not set
1005# CONFIG_SENSORS_PC87427 is not set
976# CONFIG_SENSORS_SMSC47M1 is not set 1006# CONFIG_SENSORS_SMSC47M1 is not set
1007# CONFIG_SENSORS_SMSC47M192 is not set
977# CONFIG_SENSORS_SMSC47B397 is not set 1008# CONFIG_SENSORS_SMSC47B397 is not set
1009# CONFIG_SENSORS_VT1211 is not set
978# CONFIG_SENSORS_W83781D is not set 1010# CONFIG_SENSORS_W83781D is not set
1011# CONFIG_SENSORS_W83791D is not set
979# CONFIG_SENSORS_W83792D is not set 1012# CONFIG_SENSORS_W83792D is not set
1013# CONFIG_SENSORS_W83793 is not set
980# CONFIG_SENSORS_W83L785TS is not set 1014# CONFIG_SENSORS_W83L785TS is not set
981# CONFIG_SENSORS_W83627HF is not set 1015# CONFIG_SENSORS_W83627HF is not set
982# CONFIG_SENSORS_W83627EHF is not set 1016# CONFIG_SENSORS_W83627EHF is not set
@@ -987,16 +1021,15 @@ CONFIG_HWMON=y
987# 1021#
988 1022
989# 1023#
990# Multimedia Capabilities Port drivers 1024# Multifunction device drivers
991# 1025#
992CONFIG_UCB1400=y 1026# CONFIG_MFD_SM501 is not set
993CONFIG_UCB1400_TS=y
994 1027
995# 1028#
996# LED devices 1029# LED devices
997# 1030#
998CONFIG_NEW_LEDS=y 1031CONFIG_NEW_LEDS=y
999CONFIG_LEDS_CLASS=y 1032# CONFIG_LEDS_CLASS is not set
1000 1033
1001# 1034#
1002# LED drivers 1035# LED drivers
@@ -1007,13 +1040,13 @@ CONFIG_LEDS_CLASS=y
1007# 1040#
1008CONFIG_LEDS_TRIGGERS=y 1041CONFIG_LEDS_TRIGGERS=y
1009CONFIG_LEDS_TRIGGER_TIMER=y 1042CONFIG_LEDS_TRIGGER_TIMER=y
1010CONFIG_LEDS_TRIGGER_IDE_DISK=y 1043# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
1044CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1011 1045
1012# 1046#
1013# Multimedia devices 1047# Multimedia devices
1014# 1048#
1015# CONFIG_VIDEO_DEV is not set 1049# CONFIG_VIDEO_DEV is not set
1016CONFIG_VIDEO_V4L2=y
1017 1050
1018# 1051#
1019# Digital Video Broadcasting Devices 1052# Digital Video Broadcasting Devices
@@ -1024,17 +1057,28 @@ CONFIG_VIDEO_V4L2=y
1024# 1057#
1025# Graphics support 1058# Graphics support
1026# 1059#
1060CONFIG_BACKLIGHT_LCD_SUPPORT=y
1061CONFIG_BACKLIGHT_CLASS_DEVICE=y
1062CONFIG_LCD_CLASS_DEVICE=y
1027CONFIG_FB=y 1063CONFIG_FB=y
1064CONFIG_FIRMWARE_EDID=y
1065# CONFIG_FB_DDC is not set
1028CONFIG_FB_CFB_FILLRECT=y 1066CONFIG_FB_CFB_FILLRECT=y
1029CONFIG_FB_CFB_COPYAREA=y 1067CONFIG_FB_CFB_COPYAREA=y
1030CONFIG_FB_CFB_IMAGEBLIT=y 1068CONFIG_FB_CFB_IMAGEBLIT=y
1069# CONFIG_FB_SVGALIB is not set
1031# CONFIG_FB_MACMODES is not set 1070# CONFIG_FB_MACMODES is not set
1032CONFIG_FB_FIRMWARE_EDID=y 1071# CONFIG_FB_BACKLIGHT is not set
1033# CONFIG_FB_MODE_HELPERS is not set 1072# CONFIG_FB_MODE_HELPERS is not set
1034# CONFIG_FB_TILEBLITTING is not set 1073# CONFIG_FB_TILEBLITTING is not set
1074
1075#
1076# Frame buffer hardware drivers
1077#
1035# CONFIG_FB_S1D13XXX is not set 1078# CONFIG_FB_S1D13XXX is not set
1036CONFIG_FB_PXA=y 1079CONFIG_FB_PXA=y
1037# CONFIG_FB_PXA_PARAMETERS is not set 1080# CONFIG_FB_PXA_PARAMETERS is not set
1081# CONFIG_FB_MBX is not set
1038# CONFIG_FB_VIRTUAL is not set 1082# CONFIG_FB_VIRTUAL is not set
1039 1083
1040# 1084#
@@ -1063,11 +1107,6 @@ CONFIG_LOGO=y
1063CONFIG_LOGO_LINUX_MONO=y 1107CONFIG_LOGO_LINUX_MONO=y
1064CONFIG_LOGO_LINUX_VGA16=y 1108CONFIG_LOGO_LINUX_VGA16=y
1065CONFIG_LOGO_LINUX_CLUT224=y 1109CONFIG_LOGO_LINUX_CLUT224=y
1066CONFIG_BACKLIGHT_LCD_SUPPORT=y
1067CONFIG_BACKLIGHT_CLASS_DEVICE=y
1068CONFIG_BACKLIGHT_DEVICE=y
1069CONFIG_LCD_CLASS_DEVICE=y
1070CONFIG_LCD_DEVICE=y
1071 1110
1072# 1111#
1073# Sound 1112# Sound
@@ -1082,7 +1121,7 @@ CONFIG_SND_TIMER=y
1082CONFIG_SND_PCM=y 1121CONFIG_SND_PCM=y
1083CONFIG_SND_HWDEP=m 1122CONFIG_SND_HWDEP=m
1084CONFIG_SND_RAWMIDI=m 1123CONFIG_SND_RAWMIDI=m
1085CONFIG_SND_SEQUENCER=m 1124CONFIG_SND_SEQUENCER=y
1086# CONFIG_SND_SEQ_DUMMY is not set 1125# CONFIG_SND_SEQ_DUMMY is not set
1087CONFIG_SND_OSSEMUL=y 1126CONFIG_SND_OSSEMUL=y
1088CONFIG_SND_MIXER_OSS=y 1127CONFIG_SND_MIXER_OSS=y
@@ -1093,13 +1132,14 @@ CONFIG_SND_PCM_OSS_PLUGINS=y
1093CONFIG_SND_SUPPORT_OLD_API=y 1132CONFIG_SND_SUPPORT_OLD_API=y
1094CONFIG_SND_VERBOSE_PROCFS=y 1133CONFIG_SND_VERBOSE_PROCFS=y
1095CONFIG_SND_VERBOSE_PRINTK=y 1134CONFIG_SND_VERBOSE_PRINTK=y
1096# CONFIG_SND_DEBUG is not set 1135CONFIG_SND_DEBUG=y
1136CONFIG_SND_DEBUG_DETECT=y
1137# CONFIG_SND_PCM_XRUN_DEBUG is not set
1097 1138
1098# 1139#
1099# Generic devices 1140# Generic devices
1100# 1141#
1101CONFIG_SND_AC97_CODEC=y 1142CONFIG_SND_AC97_CODEC=y
1102CONFIG_SND_AC97_BUS=y
1103# CONFIG_SND_DUMMY is not set 1143# CONFIG_SND_DUMMY is not set
1104# CONFIG_SND_VIRMIDI is not set 1144# CONFIG_SND_VIRMIDI is not set
1105# CONFIG_SND_MTPAV is not set 1145# CONFIG_SND_MTPAV is not set
@@ -1124,9 +1164,32 @@ CONFIG_SND_USB_AUDIO=m
1124# CONFIG_SND_PDAUDIOCF is not set 1164# CONFIG_SND_PDAUDIOCF is not set
1125 1165
1126# 1166#
1167# SoC audio support
1168#
1169# CONFIG_SND_SOC is not set
1170
1171#
1127# Open Sound System 1172# Open Sound System
1128# 1173#
1129# CONFIG_SOUND_PRIME is not set 1174# CONFIG_SOUND_PRIME is not set
1175CONFIG_AC97_BUS=y
1176
1177#
1178# HID Devices
1179#
1180CONFIG_HID=y
1181# CONFIG_HID_DEBUG is not set
1182
1183#
1184# USB Input Devices
1185#
1186# CONFIG_USB_HID is not set
1187
1188#
1189# USB HID Boot Protocol drivers
1190#
1191# CONFIG_USB_KBD is not set
1192# CONFIG_USB_MOUSE is not set
1130 1193
1131# 1194#
1132# USB support 1195# USB support
@@ -1141,7 +1204,7 @@ CONFIG_USB=y
1141# Miscellaneous USB options 1204# Miscellaneous USB options
1142# 1205#
1143CONFIG_USB_DEVICEFS=y 1206CONFIG_USB_DEVICEFS=y
1144# CONFIG_USB_BANDWIDTH is not set 1207# CONFIG_USB_DEVICE_CLASS is not set
1145# CONFIG_USB_DYNAMIC_MINORS is not set 1208# CONFIG_USB_DYNAMIC_MINORS is not set
1146# CONFIG_USB_SUSPEND is not set 1209# CONFIG_USB_SUSPEND is not set
1147# CONFIG_USB_OTG is not set 1210# CONFIG_USB_OTG is not set
@@ -1151,7 +1214,8 @@ CONFIG_USB_DEVICEFS=y
1151# 1214#
1152# CONFIG_USB_ISP116X_HCD is not set 1215# CONFIG_USB_ISP116X_HCD is not set
1153CONFIG_USB_OHCI_HCD=y 1216CONFIG_USB_OHCI_HCD=y
1154# CONFIG_USB_OHCI_BIG_ENDIAN is not set 1217# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1218# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1155CONFIG_USB_OHCI_LITTLE_ENDIAN=y 1219CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1156# CONFIG_USB_SL811_HCD is not set 1220# CONFIG_USB_SL811_HCD is not set
1157 1221
@@ -1179,38 +1243,25 @@ CONFIG_USB_STORAGE=m
1179# CONFIG_USB_STORAGE_SDDR55 is not set 1243# CONFIG_USB_STORAGE_SDDR55 is not set
1180# CONFIG_USB_STORAGE_JUMPSHOT is not set 1244# CONFIG_USB_STORAGE_JUMPSHOT is not set
1181# CONFIG_USB_STORAGE_ALAUDA is not set 1245# CONFIG_USB_STORAGE_ALAUDA is not set
1246# CONFIG_USB_STORAGE_KARMA is not set
1182# CONFIG_USB_LIBUSUAL is not set 1247# CONFIG_USB_LIBUSUAL is not set
1183 1248
1184# 1249#
1185# USB Input Devices 1250# USB Input Devices
1186# 1251#
1187CONFIG_USB_HID=m
1188CONFIG_USB_HIDINPUT=y
1189# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1190# CONFIG_HID_FF is not set
1191# CONFIG_USB_HIDDEV is not set
1192
1193#
1194# USB HID Boot Protocol drivers
1195#
1196# CONFIG_USB_KBD is not set
1197# CONFIG_USB_MOUSE is not set
1198# CONFIG_USB_AIPTEK is not set 1252# CONFIG_USB_AIPTEK is not set
1199# CONFIG_USB_WACOM is not set 1253# CONFIG_USB_WACOM is not set
1200# CONFIG_USB_ACECAD is not set 1254# CONFIG_USB_ACECAD is not set
1201# CONFIG_USB_KBTAB is not set 1255# CONFIG_USB_KBTAB is not set
1202# CONFIG_USB_POWERMATE is not set 1256# CONFIG_USB_POWERMATE is not set
1203CONFIG_USB_TOUCHSCREEN=m 1257# CONFIG_USB_TOUCHSCREEN is not set
1204# CONFIG_USB_TOUCHSCREEN_EGALAX is not set
1205# CONFIG_USB_TOUCHSCREEN_PANJIT is not set
1206# CONFIG_USB_TOUCHSCREEN_3M is not set
1207# CONFIG_USB_TOUCHSCREEN_ITM is not set
1208# CONFIG_USB_YEALINK is not set 1258# CONFIG_USB_YEALINK is not set
1209# CONFIG_USB_XPAD is not set 1259# CONFIG_USB_XPAD is not set
1210# CONFIG_USB_ATI_REMOTE is not set 1260# CONFIG_USB_ATI_REMOTE is not set
1211# CONFIG_USB_ATI_REMOTE2 is not set 1261# CONFIG_USB_ATI_REMOTE2 is not set
1212# CONFIG_USB_KEYSPAN_REMOTE is not set 1262# CONFIG_USB_KEYSPAN_REMOTE is not set
1213# CONFIG_USB_APPLETOUCH is not set 1263# CONFIG_USB_APPLETOUCH is not set
1264# CONFIG_USB_GTCO is not set
1214 1265
1215# 1266#
1216# USB Imaging devices 1267# USB Imaging devices
@@ -1225,9 +1276,9 @@ CONFIG_USB_TOUCHSCREEN=m
1225# CONFIG_USB_KAWETH is not set 1276# CONFIG_USB_KAWETH is not set
1226# CONFIG_USB_PEGASUS is not set 1277# CONFIG_USB_PEGASUS is not set
1227# CONFIG_USB_RTL8150 is not set 1278# CONFIG_USB_RTL8150 is not set
1279# CONFIG_USB_USBNET_MII is not set
1228# CONFIG_USB_USBNET is not set 1280# CONFIG_USB_USBNET is not set
1229# CONFIG_USB_ZD1201 is not set 1281# CONFIG_USB_MON is not set
1230CONFIG_USB_MON=y
1231 1282
1232# 1283#
1233# USB port drivers 1284# USB port drivers
@@ -1236,23 +1287,66 @@ CONFIG_USB_MON=y
1236# 1287#
1237# USB Serial Converter support 1288# USB Serial Converter support
1238# 1289#
1239# CONFIG_USB_SERIAL is not set 1290CONFIG_USB_SERIAL=m
1291# CONFIG_USB_SERIAL_GENERIC is not set
1292# CONFIG_USB_SERIAL_AIRCABLE is not set
1293# CONFIG_USB_SERIAL_AIRPRIME is not set
1294# CONFIG_USB_SERIAL_ARK3116 is not set
1295# CONFIG_USB_SERIAL_BELKIN is not set
1296# CONFIG_USB_SERIAL_WHITEHEAT is not set
1297# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1298# CONFIG_USB_SERIAL_CP2101 is not set
1299# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1300# CONFIG_USB_SERIAL_EMPEG is not set
1301# CONFIG_USB_SERIAL_FTDI_SIO is not set
1302# CONFIG_USB_SERIAL_FUNSOFT is not set
1303# CONFIG_USB_SERIAL_VISOR is not set
1304# CONFIG_USB_SERIAL_IPAQ is not set
1305# CONFIG_USB_SERIAL_IR is not set
1306# CONFIG_USB_SERIAL_EDGEPORT is not set
1307# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1308# CONFIG_USB_SERIAL_GARMIN is not set
1309# CONFIG_USB_SERIAL_IPW is not set
1310# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1311# CONFIG_USB_SERIAL_KEYSPAN is not set
1312# CONFIG_USB_SERIAL_KLSI is not set
1313# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1314# CONFIG_USB_SERIAL_MCT_U232 is not set
1315# CONFIG_USB_SERIAL_MOS7720 is not set
1316# CONFIG_USB_SERIAL_MOS7840 is not set
1317# CONFIG_USB_SERIAL_NAVMAN is not set
1318# CONFIG_USB_SERIAL_PL2303 is not set
1319# CONFIG_USB_SERIAL_HP4X is not set
1320# CONFIG_USB_SERIAL_SAFE is not set
1321# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1322# CONFIG_USB_SERIAL_TI is not set
1323# CONFIG_USB_SERIAL_CYBERJACK is not set
1324# CONFIG_USB_SERIAL_XIRCOM is not set
1325# CONFIG_USB_SERIAL_OPTION is not set
1326# CONFIG_USB_SERIAL_OMNINET is not set
1327# CONFIG_USB_SERIAL_DEBUG is not set
1240 1328
1241# 1329#
1242# USB Miscellaneous drivers 1330# USB Miscellaneous drivers
1243# 1331#
1244# CONFIG_USB_EMI62 is not set 1332# CONFIG_USB_EMI62 is not set
1245# CONFIG_USB_EMI26 is not set 1333# CONFIG_USB_EMI26 is not set
1334# CONFIG_USB_ADUTUX is not set
1246# CONFIG_USB_AUERSWALD is not set 1335# CONFIG_USB_AUERSWALD is not set
1247# CONFIG_USB_RIO500 is not set 1336# CONFIG_USB_RIO500 is not set
1248# CONFIG_USB_LEGOTOWER is not set 1337# CONFIG_USB_LEGOTOWER is not set
1249# CONFIG_USB_LCD is not set 1338# CONFIG_USB_LCD is not set
1339# CONFIG_USB_BERRY_CHARGE is not set
1250# CONFIG_USB_LED is not set 1340# CONFIG_USB_LED is not set
1341# CONFIG_USB_CYPRESS_CY7C63 is not set
1251# CONFIG_USB_CYTHERM is not set 1342# CONFIG_USB_CYTHERM is not set
1252# CONFIG_USB_PHIDGETKIT is not set 1343# CONFIG_USB_PHIDGET is not set
1253# CONFIG_USB_PHIDGETSERVO is not set
1254# CONFIG_USB_IDMOUSE is not set 1344# CONFIG_USB_IDMOUSE is not set
1345# CONFIG_USB_FTDI_ELAN is not set
1346# CONFIG_USB_APPLEDISPLAY is not set
1255# CONFIG_USB_LD is not set 1347# CONFIG_USB_LD is not set
1348# CONFIG_USB_TRANCEVIBRATOR is not set
1349# CONFIG_USB_IOWARRIOR is not set
1256# CONFIG_USB_TEST is not set 1350# CONFIG_USB_TEST is not set
1257 1351
1258# 1352#
@@ -1262,9 +1356,10 @@ CONFIG_USB_MON=y
1262# 1356#
1263# USB Gadget Support 1357# USB Gadget Support
1264# 1358#
1265CONFIG_USB_GADGET=y 1359CONFIG_USB_GADGET=m
1266# CONFIG_USB_GADGET_DEBUG_FILES is not set 1360# CONFIG_USB_GADGET_DEBUG_FILES is not set
1267CONFIG_USB_GADGET_SELECTED=y 1361CONFIG_USB_GADGET_SELECTED=y
1362# CONFIG_USB_GADGET_FSL_USB2 is not set
1268# CONFIG_USB_GADGET_NET2280 is not set 1363# CONFIG_USB_GADGET_NET2280 is not set
1269# CONFIG_USB_GADGET_PXA2XX is not set 1364# CONFIG_USB_GADGET_PXA2XX is not set
1270# CONFIG_USB_GADGET_GOKU is not set 1365# CONFIG_USB_GADGET_GOKU is not set
@@ -1272,15 +1367,14 @@ CONFIG_USB_GADGET_SELECTED=y
1272# CONFIG_USB_GADGET_OMAP is not set 1367# CONFIG_USB_GADGET_OMAP is not set
1273# CONFIG_USB_GADGET_AT91 is not set 1368# CONFIG_USB_GADGET_AT91 is not set
1274CONFIG_USB_GADGET_DUMMY_HCD=y 1369CONFIG_USB_GADGET_DUMMY_HCD=y
1275CONFIG_USB_DUMMY_HCD=y 1370CONFIG_USB_DUMMY_HCD=m
1276CONFIG_USB_GADGET_DUALSPEED=y 1371CONFIG_USB_GADGET_DUALSPEED=y
1277# CONFIG_USB_ZERO is not set 1372# CONFIG_USB_ZERO is not set
1278CONFIG_USB_ETH=m 1373# CONFIG_USB_ETH is not set
1279CONFIG_USB_ETH_RNDIS=y 1374# CONFIG_USB_GADGETFS is not set
1280CONFIG_USB_GADGETFS=m 1375# CONFIG_USB_FILE_STORAGE is not set
1281CONFIG_USB_FILE_STORAGE=m 1376# CONFIG_USB_G_SERIAL is not set
1282# CONFIG_USB_FILE_STORAGE_TEST is not set 1377# CONFIG_USB_MIDI_GADGET is not set
1283CONFIG_USB_G_SERIAL=m
1284 1378
1285# 1379#
1286# MMC/SD Card support 1380# MMC/SD Card support
@@ -1295,8 +1389,8 @@ CONFIG_MMC_PXA=y
1295# 1389#
1296CONFIG_RTC_LIB=y 1390CONFIG_RTC_LIB=y
1297CONFIG_RTC_CLASS=y 1391CONFIG_RTC_CLASS=y
1298CONFIG_RTC_HCTOSYS=y 1392# CONFIG_RTC_HCTOSYS is not set
1299CONFIG_RTC_HCTOSYS_DEVICE="rtc0" 1393# CONFIG_RTC_DEBUG is not set
1300 1394
1301# 1395#
1302# RTC interfaces 1396# RTC interfaces
@@ -1304,17 +1398,25 @@ CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1304CONFIG_RTC_INTF_SYSFS=y 1398CONFIG_RTC_INTF_SYSFS=y
1305CONFIG_RTC_INTF_PROC=y 1399CONFIG_RTC_INTF_PROC=y
1306CONFIG_RTC_INTF_DEV=y 1400CONFIG_RTC_INTF_DEV=y
1401# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1307 1402
1308# 1403#
1309# RTC drivers 1404# RTC drivers
1310# 1405#
1406# CONFIG_RTC_DRV_CMOS is not set
1311# CONFIG_RTC_DRV_X1205 is not set 1407# CONFIG_RTC_DRV_X1205 is not set
1408# CONFIG_RTC_DRV_DS1307 is not set
1409# CONFIG_RTC_DRV_DS1553 is not set
1410# CONFIG_RTC_DRV_ISL1208 is not set
1312# CONFIG_RTC_DRV_DS1672 is not set 1411# CONFIG_RTC_DRV_DS1672 is not set
1412# CONFIG_RTC_DRV_DS1742 is not set
1313# CONFIG_RTC_DRV_PCF8563 is not set 1413# CONFIG_RTC_DRV_PCF8563 is not set
1414CONFIG_RTC_DRV_PCF8583=m
1314# CONFIG_RTC_DRV_RS5C372 is not set 1415# CONFIG_RTC_DRV_RS5C372 is not set
1315# CONFIG_RTC_DRV_M48T86 is not set 1416# CONFIG_RTC_DRV_M48T86 is not set
1316CONFIG_RTC_DRV_SA1100=y 1417CONFIG_RTC_DRV_SA1100=y
1317# CONFIG_RTC_DRV_TEST is not set 1418# CONFIG_RTC_DRV_TEST is not set
1419# CONFIG_RTC_DRV_V3020 is not set
1318 1420
1319# 1421#
1320# File systems 1422# File systems
@@ -1328,6 +1430,7 @@ CONFIG_EXT3_FS=y
1328CONFIG_EXT3_FS_XATTR=y 1430CONFIG_EXT3_FS_XATTR=y
1329CONFIG_EXT3_FS_POSIX_ACL=y 1431CONFIG_EXT3_FS_POSIX_ACL=y
1330CONFIG_EXT3_FS_SECURITY=y 1432CONFIG_EXT3_FS_SECURITY=y
1433# CONFIG_EXT4DEV_FS is not set
1331CONFIG_JBD=y 1434CONFIG_JBD=y
1332# CONFIG_JBD_DEBUG is not set 1435# CONFIG_JBD_DEBUG is not set
1333CONFIG_FS_MBCACHE=y 1436CONFIG_FS_MBCACHE=y
@@ -1335,10 +1438,12 @@ CONFIG_FS_MBCACHE=y
1335# CONFIG_JFS_FS is not set 1438# CONFIG_JFS_FS is not set
1336CONFIG_FS_POSIX_ACL=y 1439CONFIG_FS_POSIX_ACL=y
1337# CONFIG_XFS_FS is not set 1440# CONFIG_XFS_FS is not set
1441# CONFIG_GFS2_FS is not set
1338# CONFIG_OCFS2_FS is not set 1442# CONFIG_OCFS2_FS is not set
1339# CONFIG_MINIX_FS is not set 1443# CONFIG_MINIX_FS is not set
1340# CONFIG_ROMFS_FS is not set 1444# CONFIG_ROMFS_FS is not set
1341CONFIG_INOTIFY=y 1445CONFIG_INOTIFY=y
1446CONFIG_INOTIFY_USER=y
1342# CONFIG_QUOTA is not set 1447# CONFIG_QUOTA is not set
1343CONFIG_DNOTIFY=y 1448CONFIG_DNOTIFY=y
1344# CONFIG_AUTOFS_FS is not set 1449# CONFIG_AUTOFS_FS is not set
@@ -1365,8 +1470,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
1365# Pseudo filesystems 1470# Pseudo filesystems
1366# 1471#
1367CONFIG_PROC_FS=y 1472CONFIG_PROC_FS=y
1473CONFIG_PROC_SYSCTL=y
1368CONFIG_SYSFS=y 1474CONFIG_SYSFS=y
1369CONFIG_TMPFS=y 1475CONFIG_TMPFS=y
1476# CONFIG_TMPFS_POSIX_ACL is not set
1370# CONFIG_HUGETLB_PAGE is not set 1477# CONFIG_HUGETLB_PAGE is not set
1371CONFIG_RAMFS=y 1478CONFIG_RAMFS=y
1372# CONFIG_CONFIGFS_FS is not set 1479# CONFIG_CONFIGFS_FS is not set
@@ -1376,18 +1483,17 @@ CONFIG_RAMFS=y
1376# 1483#
1377# CONFIG_ADFS_FS is not set 1484# CONFIG_ADFS_FS is not set
1378# CONFIG_AFFS_FS is not set 1485# CONFIG_AFFS_FS is not set
1486# CONFIG_ECRYPT_FS is not set
1379# CONFIG_HFS_FS is not set 1487# CONFIG_HFS_FS is not set
1380# CONFIG_HFSPLUS_FS is not set 1488# CONFIG_HFSPLUS_FS is not set
1381# CONFIG_BEFS_FS is not set 1489# CONFIG_BEFS_FS is not set
1382# CONFIG_BFS_FS is not set 1490# CONFIG_BFS_FS is not set
1383# CONFIG_EFS_FS is not set 1491# CONFIG_EFS_FS is not set
1384CONFIG_JFFS_FS=y
1385CONFIG_JFFS_FS_VERBOSE=0
1386CONFIG_JFFS_PROC_FS=y
1387CONFIG_JFFS2_FS=y 1492CONFIG_JFFS2_FS=y
1388CONFIG_JFFS2_FS_DEBUG=0 1493CONFIG_JFFS2_FS_DEBUG=0
1389CONFIG_JFFS2_FS_WRITEBUFFER=y 1494CONFIG_JFFS2_FS_WRITEBUFFER=y
1390# CONFIG_JFFS2_SUMMARY is not set 1495# CONFIG_JFFS2_SUMMARY is not set
1496# CONFIG_JFFS2_FS_XATTR is not set
1391CONFIG_JFFS2_COMPRESSION_OPTIONS=y 1497CONFIG_JFFS2_COMPRESSION_OPTIONS=y
1392CONFIG_JFFS2_ZLIB=y 1498CONFIG_JFFS2_ZLIB=y
1393CONFIG_JFFS2_RTIME=y 1499CONFIG_JFFS2_RTIME=y
@@ -1407,20 +1513,18 @@ CONFIG_JFFS2_CMODE_PRIORITY=y
1407# 1513#
1408CONFIG_NFS_FS=y 1514CONFIG_NFS_FS=y
1409CONFIG_NFS_V3=y 1515CONFIG_NFS_V3=y
1410CONFIG_NFS_V3_ACL=y 1516# CONFIG_NFS_V3_ACL is not set
1411CONFIG_NFS_V4=y 1517CONFIG_NFS_V4=y
1412# CONFIG_NFS_DIRECTIO is not set 1518# CONFIG_NFS_DIRECTIO is not set
1413CONFIG_NFSD=y 1519CONFIG_NFSD=y
1414CONFIG_NFSD_V2_ACL=y
1415CONFIG_NFSD_V3=y 1520CONFIG_NFSD_V3=y
1416CONFIG_NFSD_V3_ACL=y 1521# CONFIG_NFSD_V3_ACL is not set
1417CONFIG_NFSD_V4=y 1522CONFIG_NFSD_V4=y
1418CONFIG_NFSD_TCP=y 1523CONFIG_NFSD_TCP=y
1419CONFIG_ROOT_NFS=y 1524CONFIG_ROOT_NFS=y
1420CONFIG_LOCKD=y 1525CONFIG_LOCKD=y
1421CONFIG_LOCKD_V4=y 1526CONFIG_LOCKD_V4=y
1422CONFIG_EXPORTFS=y 1527CONFIG_EXPORTFS=y
1423CONFIG_NFS_ACL_SUPPORT=y
1424CONFIG_NFS_COMMON=y 1528CONFIG_NFS_COMMON=y
1425CONFIG_SUNRPC=y 1529CONFIG_SUNRPC=y
1426CONFIG_SUNRPC_GSS=y 1530CONFIG_SUNRPC_GSS=y
@@ -1430,7 +1534,9 @@ CONFIG_SMB_FS=m
1430# CONFIG_SMB_NLS_DEFAULT is not set 1534# CONFIG_SMB_NLS_DEFAULT is not set
1431CONFIG_CIFS=m 1535CONFIG_CIFS=m
1432# CONFIG_CIFS_STATS is not set 1536# CONFIG_CIFS_STATS is not set
1537# CONFIG_CIFS_WEAK_PW_HASH is not set
1433# CONFIG_CIFS_XATTR is not set 1538# CONFIG_CIFS_XATTR is not set
1539# CONFIG_CIFS_DEBUG2 is not set
1434# CONFIG_CIFS_EXPERIMENTAL is not set 1540# CONFIG_CIFS_EXPERIMENTAL is not set
1435# CONFIG_NCP_FS is not set 1541# CONFIG_NCP_FS is not set
1436# CONFIG_CODA_FS is not set 1542# CONFIG_CODA_FS is not set
@@ -1504,22 +1610,28 @@ CONFIG_NLS_ISO8859_15=m
1504CONFIG_NLS_UTF8=m 1610CONFIG_NLS_UTF8=m
1505 1611
1506# 1612#
1613# Distributed Lock Manager
1614#
1615# CONFIG_DLM is not set
1616
1617#
1507# Profiling support 1618# Profiling support
1508# 1619#
1509CONFIG_PROFILING=y 1620# CONFIG_PROFILING is not set
1510CONFIG_OPROFILE=y
1511 1621
1512# 1622#
1513# Kernel hacking 1623# Kernel hacking
1514# 1624#
1515# CONFIG_PRINTK_TIME is not set 1625# CONFIG_PRINTK_TIME is not set
1626CONFIG_ENABLE_MUST_CHECK=y
1516CONFIG_MAGIC_SYSRQ=y 1627CONFIG_MAGIC_SYSRQ=y
1628# CONFIG_UNUSED_SYMBOLS is not set
1629CONFIG_DEBUG_FS=y
1630# CONFIG_HEADERS_CHECK is not set
1517# CONFIG_DEBUG_KERNEL is not set 1631# CONFIG_DEBUG_KERNEL is not set
1518CONFIG_LOG_BUF_SHIFT=14 1632CONFIG_LOG_BUF_SHIFT=14
1519# CONFIG_DEBUG_BUGVERBOSE is not set 1633# CONFIG_DEBUG_BUGVERBOSE is not set
1520# CONFIG_DEBUG_FS is not set
1521CONFIG_FRAME_POINTER=y 1634CONFIG_FRAME_POINTER=y
1522# CONFIG_UNWIND_INFO is not set
1523CONFIG_DEBUG_USER=y 1635CONFIG_DEBUG_USER=y
1524 1636
1525# 1637#
@@ -1531,22 +1643,31 @@ CONFIG_SECURITY=y
1531# CONFIG_SECURITY_NETWORK is not set 1643# CONFIG_SECURITY_NETWORK is not set
1532CONFIG_SECURITY_CAPABILITIES=y 1644CONFIG_SECURITY_CAPABILITIES=y
1533# CONFIG_SECURITY_ROOTPLUG is not set 1645# CONFIG_SECURITY_ROOTPLUG is not set
1534# CONFIG_SECURITY_SECLVL is not set
1535 1646
1536# 1647#
1537# Cryptographic options 1648# Cryptographic options
1538# 1649#
1539CONFIG_CRYPTO=y 1650CONFIG_CRYPTO=y
1651CONFIG_CRYPTO_ALGAPI=y
1652CONFIG_CRYPTO_BLKCIPHER=y
1653CONFIG_CRYPTO_MANAGER=y
1540# CONFIG_CRYPTO_HMAC is not set 1654# CONFIG_CRYPTO_HMAC is not set
1655# CONFIG_CRYPTO_XCBC is not set
1541# CONFIG_CRYPTO_NULL is not set 1656# CONFIG_CRYPTO_NULL is not set
1542CONFIG_CRYPTO_MD4=y 1657# CONFIG_CRYPTO_MD4 is not set
1543CONFIG_CRYPTO_MD5=y 1658CONFIG_CRYPTO_MD5=y
1544CONFIG_CRYPTO_SHA1=m 1659CONFIG_CRYPTO_SHA1=m
1545CONFIG_CRYPTO_SHA256=m 1660CONFIG_CRYPTO_SHA256=m
1546CONFIG_CRYPTO_SHA512=m 1661CONFIG_CRYPTO_SHA512=m
1547# CONFIG_CRYPTO_WP512 is not set 1662# CONFIG_CRYPTO_WP512 is not set
1548# CONFIG_CRYPTO_TGR192 is not set 1663# CONFIG_CRYPTO_TGR192 is not set
1664# CONFIG_CRYPTO_GF128MUL is not set
1665CONFIG_CRYPTO_ECB=y
1666CONFIG_CRYPTO_CBC=y
1667CONFIG_CRYPTO_PCBC=m
1668# CONFIG_CRYPTO_LRW is not set
1549CONFIG_CRYPTO_DES=y 1669CONFIG_CRYPTO_DES=y
1670# CONFIG_CRYPTO_FCRYPT is not set
1550# CONFIG_CRYPTO_BLOWFISH is not set 1671# CONFIG_CRYPTO_BLOWFISH is not set
1551# CONFIG_CRYPTO_TWOFISH is not set 1672# CONFIG_CRYPTO_TWOFISH is not set
1552# CONFIG_CRYPTO_SERPENT is not set 1673# CONFIG_CRYPTO_SERPENT is not set
@@ -1554,12 +1675,13 @@ CONFIG_CRYPTO_AES=m
1554# CONFIG_CRYPTO_CAST5 is not set 1675# CONFIG_CRYPTO_CAST5 is not set
1555# CONFIG_CRYPTO_CAST6 is not set 1676# CONFIG_CRYPTO_CAST6 is not set
1556# CONFIG_CRYPTO_TEA is not set 1677# CONFIG_CRYPTO_TEA is not set
1557CONFIG_CRYPTO_ARC4=m 1678CONFIG_CRYPTO_ARC4=y
1558# CONFIG_CRYPTO_KHAZAD is not set 1679# CONFIG_CRYPTO_KHAZAD is not set
1559# CONFIG_CRYPTO_ANUBIS is not set 1680# CONFIG_CRYPTO_ANUBIS is not set
1560CONFIG_CRYPTO_DEFLATE=m 1681CONFIG_CRYPTO_DEFLATE=m
1561CONFIG_CRYPTO_MICHAEL_MIC=m 1682CONFIG_CRYPTO_MICHAEL_MIC=m
1562CONFIG_CRYPTO_CRC32C=y 1683CONFIG_CRYPTO_CRC32C=y
1684# CONFIG_CRYPTO_CAMELLIA is not set
1563# CONFIG_CRYPTO_TEST is not set 1685# CONFIG_CRYPTO_TEST is not set
1564 1686
1565# 1687#
@@ -1569,6 +1691,7 @@ CONFIG_CRYPTO_CRC32C=y
1569# 1691#
1570# Library routines 1692# Library routines
1571# 1693#
1694CONFIG_BITREVERSE=y
1572CONFIG_CRC_CCITT=y 1695CONFIG_CRC_CCITT=y
1573CONFIG_CRC16=y 1696CONFIG_CRC16=y
1574CONFIG_CRC32=y 1697CONFIG_CRC32=y
@@ -1577,3 +1700,6 @@ CONFIG_ZLIB_INFLATE=y
1577CONFIG_ZLIB_DEFLATE=y 1700CONFIG_ZLIB_DEFLATE=y
1578CONFIG_REED_SOLOMON=y 1701CONFIG_REED_SOLOMON=y
1579CONFIG_REED_SOLOMON_DEC16=y 1702CONFIG_REED_SOLOMON_DEC16=y
1703CONFIG_PLIST=y
1704CONFIG_HAS_IOMEM=y
1705CONFIG_HAS_IOPORT=y
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 4779f474f911..9179e8220314 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -76,6 +76,7 @@ EXPORT_SYMBOL(__const_udelay);
76 76
77 /* networking */ 77 /* networking */
78EXPORT_SYMBOL(csum_partial); 78EXPORT_SYMBOL(csum_partial);
79EXPORT_SYMBOL(csum_partial_copy_from_user);
79EXPORT_SYMBOL(csum_partial_copy_nocheck); 80EXPORT_SYMBOL(csum_partial_copy_nocheck);
80EXPORT_SYMBOL(__csum_ipv6_magic); 81EXPORT_SYMBOL(__csum_ipv6_magic);
81 82
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index bdbd7da99286..f56d48c451ea 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -41,11 +41,11 @@
41#include <linux/init.h> 41#include <linux/init.h>
42#include <linux/mutex.h> 42#include <linux/mutex.h>
43#include <linux/kthread.h> 43#include <linux/kthread.h>
44#include <linux/io.h>
44 45
45#include <asm/dma.h> 46#include <asm/dma.h>
46#include <asm/ecard.h> 47#include <asm/ecard.h>
47#include <asm/hardware.h> 48#include <asm/hardware.h>
48#include <asm/io.h>
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <asm/mmu_context.h> 50#include <asm/mmu_context.h>
51#include <asm/mach/irq.h> 51#include <asm/mach/irq.h>
@@ -958,6 +958,31 @@ void ecard_release_resources(struct expansion_card *ec)
958} 958}
959EXPORT_SYMBOL(ecard_release_resources); 959EXPORT_SYMBOL(ecard_release_resources);
960 960
961void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *ops, void *irq_data)
962{
963 ec->irq_data = irq_data;
964 barrier();
965 ec->ops = ops;
966}
967EXPORT_SYMBOL(ecard_setirq);
968
969void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res,
970 unsigned long offset, unsigned long maxsize)
971{
972 unsigned long start = ecard_resource_start(ec, res);
973 unsigned long end = ecard_resource_end(ec, res);
974
975 if (offset > (end - start))
976 return NULL;
977
978 start += offset;
979 if (maxsize && end - start > maxsize)
980 end = start + maxsize;
981
982 return devm_ioremap(&ec->dev, start, end - start);
983}
984EXPORT_SYMBOL(ecardm_iomap);
985
961/* 986/*
962 * Probe for an expansion card. 987 * Probe for an expansion card.
963 * 988 *
@@ -1133,6 +1158,14 @@ static int ecard_drv_remove(struct device *dev)
1133 drv->remove(ec); 1158 drv->remove(ec);
1134 ecard_release(ec); 1159 ecard_release(ec);
1135 1160
1161 /*
1162 * Restore the default operations. We ensure that the
1163 * ops are set before we change the data.
1164 */
1165 ec->ops = &ecard_default_ops;
1166 barrier();
1167 ec->irq_data = NULL;
1168
1136 return 0; 1169 return 0;
1137} 1170}
1138 1171
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 77ef35efaa8d..398d0c0511eb 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -52,21 +52,15 @@ static int save_trace(struct stackframe *frame, void *d)
52 return trace->nr_entries >= trace->max_entries; 52 return trace->nr_entries >= trace->max_entries;
53} 53}
54 54
55void save_stack_trace(struct stack_trace *trace, struct task_struct *task) 55void save_stack_trace(struct stack_trace *trace)
56{ 56{
57 struct stack_trace_data data; 57 struct stack_trace_data data;
58 unsigned long fp, base; 58 unsigned long fp, base;
59 59
60 data.trace = trace; 60 data.trace = trace;
61 data.skip = trace->skip; 61 data.skip = trace->skip;
62 62 base = (unsigned long)task_stack_page(current);
63 if (task) { 63 asm("mov %0, fp" : "=r" (fp));
64 base = (unsigned long)task_stack_page(task);
65 fp = 0; /* FIXME */
66 } else {
67 base = (unsigned long)task_stack_page(current);
68 asm("mov %0, fp" : "=r" (fp));
69 }
70 64
71 walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); 65 walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data);
72} 66}
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index d0540e4eaf5b..1533d3ecd7a0 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -512,7 +512,7 @@ void __init time_init(void)
512 512
513#ifdef CONFIG_NO_IDLE_HZ 513#ifdef CONFIG_NO_IDLE_HZ
514 if (system_timer->dyn_tick) 514 if (system_timer->dyn_tick)
515 system_timer->dyn_tick->lock = SPIN_LOCK_UNLOCKED; 515 spin_lock_init(&system_timer->dyn_tick->lock);
516#endif 516#endif
517} 517}
518 518
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 018d637f87fc..a31157f1655a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -17,6 +17,9 @@ config ARCH_AT91SAM9261
17config ARCH_AT91SAM9263 17config ARCH_AT91SAM9263
18 bool "AT91SAM9263" 18 bool "AT91SAM9263"
19 19
20config ARCH_AT91SAM9RL
21 bool "AT91SAM9RL"
22
20endchoice 23endchoice
21 24
22# ---------------------------------------------------------- 25# ----------------------------------------------------------
@@ -152,6 +155,20 @@ endif
152 155
153# ---------------------------------------------------------- 156# ----------------------------------------------------------
154 157
158if ARCH_AT91SAM9RL
159
160comment "AT91SAM9RL Board Type"
161
162config MACH_AT91SAM9RLEK
163 bool "Atmel AT91SAM9RL-EK Evaluation Kit"
164 depends on ARCH_AT91SAM9RL
165 help
166 Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
167
168endif
169
170# ----------------------------------------------------------
171
155comment "AT91 Board Options" 172comment "AT91 Board Options"
156 173
157config MTD_AT91_DATAFLASH_CARD 174config MTD_AT91_DATAFLASH_CARD
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a412ae18a421..a4d80eb056ee 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devic
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o 16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
17 18
18# AT91RM9200 board-specific support 19# AT91RM9200 board-specific support
19obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 20obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
@@ -36,9 +37,13 @@ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
36# AT91SAM9263 board-specific support 37# AT91SAM9263 board-specific support
37obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o 38obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
38 39
40# AT91SAM9RL board-specific support
41obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
42
39# LEDs support 43# LEDs support
40led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o 44led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
41led-$(CONFIG_MACH_AT91RM9200EK) += leds.o 45led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
46led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
42led-$(CONFIG_MACH_CSB337) += leds.o 47led-$(CONFIG_MACH_CSB337) += leds.o
43led-$(CONFIG_MACH_CSB637) += leds.o 48led-$(CONFIG_MACH_CSB637) += leds.o
44led-$(CONFIG_MACH_KB9200) += leds.o 49led-$(CONFIG_MACH_KB9200) += leds.o
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 2624a4f22d61..70599bcf451c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -22,9 +22,6 @@
22 22
23#include "generic.h" 23#include "generic.h"
24 24
25#define SZ_512 0x00000200
26#define SZ_256 0x00000100
27#define SZ_16 0x00000010
28 25
29/* -------------------------------------------------------------------- 26/* --------------------------------------------------------------------
30 * USB Host 27 * USB Host
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 40586e22cd38..ffd3154c1e54 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -22,9 +22,6 @@
22 22
23#include "generic.h" 23#include "generic.h"
24 24
25#define SZ_512 0x00000200
26#define SZ_256 0x00000100
27#define SZ_16 0x00000010
28 25
29/* -------------------------------------------------------------------- 26/* --------------------------------------------------------------------
30 * USB Host 27 * USB Host
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 8e781997716a..9db58da04754 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -23,9 +23,6 @@
23 23
24#include "generic.h" 24#include "generic.h"
25 25
26#define SZ_512 0x00000200
27#define SZ_256 0x00000100
28#define SZ_16 0x00000010
29 26
30/* -------------------------------------------------------------------- 27/* --------------------------------------------------------------------
31 * USB Host 28 * USB Host
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 2b2e18a67128..635695787f91 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -22,9 +22,6 @@
22 22
23#include "generic.h" 23#include "generic.h"
24 24
25#define SZ_512 0x00000200
26#define SZ_256 0x00000100
27#define SZ_16 0x00000010
28 25
29/* -------------------------------------------------------------------- 26/* --------------------------------------------------------------------
30 * USB Host 27 * USB Host
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
new file mode 100644
index 000000000000..4813a35f6cf5
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -0,0 +1,341 @@
1/*
2 * arch/arm/mach-at91/at91sam9rl.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 */
11
12#include <linux/module.h>
13
14#include <asm/mach/arch.h>
15#include <asm/mach/map.h>
16#include <asm/arch/cpu.h>
17#include <asm/arch/at91sam9rl.h>
18#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_rstc.h>
20
21#include "generic.h"
22#include "clock.h"
23
24static struct map_desc at91sam9rl_io_desc[] __initdata = {
25 {
26 .virtual = AT91_VA_BASE_SYS,
27 .pfn = __phys_to_pfn(AT91_BASE_SYS),
28 .length = SZ_16K,
29 .type = MT_DEVICE,
30 },
31};
32
33static struct map_desc at91sam9rl_sram_desc[] __initdata = {
34 {
35 .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
36 .type = MT_DEVICE,
37 }
38};
39
40/* --------------------------------------------------------------------
41 * Clocks
42 * -------------------------------------------------------------------- */
43
44/*
45 * The peripheral clocks.
46 */
47static struct clk pioA_clk = {
48 .name = "pioA_clk",
49 .pmc_mask = 1 << AT91SAM9RL_ID_PIOA,
50 .type = CLK_TYPE_PERIPHERAL,
51};
52static struct clk pioB_clk = {
53 .name = "pioB_clk",
54 .pmc_mask = 1 << AT91SAM9RL_ID_PIOB,
55 .type = CLK_TYPE_PERIPHERAL,
56};
57static struct clk pioC_clk = {
58 .name = "pioC_clk",
59 .pmc_mask = 1 << AT91SAM9RL_ID_PIOC,
60 .type = CLK_TYPE_PERIPHERAL,
61};
62static struct clk pioD_clk = {
63 .name = "pioD_clk",
64 .pmc_mask = 1 << AT91SAM9RL_ID_PIOD,
65 .type = CLK_TYPE_PERIPHERAL,
66};
67static struct clk usart0_clk = {
68 .name = "usart0_clk",
69 .pmc_mask = 1 << AT91SAM9RL_ID_US0,
70 .type = CLK_TYPE_PERIPHERAL,
71};
72static struct clk usart1_clk = {
73 .name = "usart1_clk",
74 .pmc_mask = 1 << AT91SAM9RL_ID_US1,
75 .type = CLK_TYPE_PERIPHERAL,
76};
77static struct clk usart2_clk = {
78 .name = "usart2_clk",
79 .pmc_mask = 1 << AT91SAM9RL_ID_US2,
80 .type = CLK_TYPE_PERIPHERAL,
81};
82static struct clk usart3_clk = {
83 .name = "usart3_clk",
84 .pmc_mask = 1 << AT91SAM9RL_ID_US3,
85 .type = CLK_TYPE_PERIPHERAL,
86};
87static struct clk mmc_clk = {
88 .name = "mci_clk",
89 .pmc_mask = 1 << AT91SAM9RL_ID_MCI,
90 .type = CLK_TYPE_PERIPHERAL,
91};
92static struct clk twi0_clk = {
93 .name = "twi0_clk",
94 .pmc_mask = 1 << AT91SAM9RL_ID_TWI0,
95 .type = CLK_TYPE_PERIPHERAL,
96};
97static struct clk twi1_clk = {
98 .name = "twi1_clk",
99 .pmc_mask = 1 << AT91SAM9RL_ID_TWI1,
100 .type = CLK_TYPE_PERIPHERAL,
101};
102static struct clk spi_clk = {
103 .name = "spi_clk",
104 .pmc_mask = 1 << AT91SAM9RL_ID_SPI,
105 .type = CLK_TYPE_PERIPHERAL,
106};
107static struct clk ssc0_clk = {
108 .name = "ssc0_clk",
109 .pmc_mask = 1 << AT91SAM9RL_ID_SSC0,
110 .type = CLK_TYPE_PERIPHERAL,
111};
112static struct clk ssc1_clk = {
113 .name = "ssc1_clk",
114 .pmc_mask = 1 << AT91SAM9RL_ID_SSC1,
115 .type = CLK_TYPE_PERIPHERAL,
116};
117static struct clk tc0_clk = {
118 .name = "tc0_clk",
119 .pmc_mask = 1 << AT91SAM9RL_ID_TC0,
120 .type = CLK_TYPE_PERIPHERAL,
121};
122static struct clk tc1_clk = {
123 .name = "tc1_clk",
124 .pmc_mask = 1 << AT91SAM9RL_ID_TC1,
125 .type = CLK_TYPE_PERIPHERAL,
126};
127static struct clk tc2_clk = {
128 .name = "tc2_clk",
129 .pmc_mask = 1 << AT91SAM9RL_ID_TC2,
130 .type = CLK_TYPE_PERIPHERAL,
131};
132static struct clk pwmc_clk = {
133 .name = "pwmc_clk",
134 .pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
135 .type = CLK_TYPE_PERIPHERAL,
136};
137static struct clk tsc_clk = {
138 .name = "tsc_clk",
139 .pmc_mask = 1 << AT91SAM9RL_ID_TSC,
140 .type = CLK_TYPE_PERIPHERAL,
141};
142static struct clk dma_clk = {
143 .name = "dma_clk",
144 .pmc_mask = 1 << AT91SAM9RL_ID_DMA,
145 .type = CLK_TYPE_PERIPHERAL,
146};
147static struct clk udphs_clk = {
148 .name = "udphs_clk",
149 .pmc_mask = 1 << AT91SAM9RL_ID_UDPHS,
150 .type = CLK_TYPE_PERIPHERAL,
151};
152static struct clk lcdc_clk = {
153 .name = "lcdc_clk",
154 .pmc_mask = 1 << AT91SAM9RL_ID_LCDC,
155 .type = CLK_TYPE_PERIPHERAL,
156};
157static struct clk ac97_clk = {
158 .name = "ac97_clk",
159 .pmc_mask = 1 << AT91SAM9RL_ID_AC97C,
160 .type = CLK_TYPE_PERIPHERAL,
161};
162
163static struct clk *periph_clocks[] __initdata = {
164 &pioA_clk,
165 &pioB_clk,
166 &pioC_clk,
167 &pioD_clk,
168 &usart0_clk,
169 &usart1_clk,
170 &usart2_clk,
171 &usart3_clk,
172 &mmc_clk,
173 &twi0_clk,
174 &twi1_clk,
175 &spi_clk,
176 &ssc0_clk,
177 &ssc1_clk,
178 &tc0_clk,
179 &tc1_clk,
180 &tc2_clk,
181 &pwmc_clk,
182 &tsc_clk,
183 &dma_clk,
184 &udphs_clk,
185 &lcdc_clk,
186 &ac97_clk,
187 // irq0
188};
189
190/*
191 * The two programmable clocks.
192 * You must configure pin multiplexing to bring these signals out.
193 */
194static struct clk pck0 = {
195 .name = "pck0",
196 .pmc_mask = AT91_PMC_PCK0,
197 .type = CLK_TYPE_PROGRAMMABLE,
198 .id = 0,
199};
200static struct clk pck1 = {
201 .name = "pck1",
202 .pmc_mask = AT91_PMC_PCK1,
203 .type = CLK_TYPE_PROGRAMMABLE,
204 .id = 1,
205};
206
207static void __init at91sam9rl_register_clocks(void)
208{
209 int i;
210
211 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
212 clk_register(periph_clocks[i]);
213
214 clk_register(&pck0);
215 clk_register(&pck1);
216}
217
218/* --------------------------------------------------------------------
219 * GPIO
220 * -------------------------------------------------------------------- */
221
222static struct at91_gpio_bank at91sam9rl_gpio[] = {
223 {
224 .id = AT91SAM9RL_ID_PIOA,
225 .offset = AT91_PIOA,
226 .clock = &pioA_clk,
227 }, {
228 .id = AT91SAM9RL_ID_PIOB,
229 .offset = AT91_PIOB,
230 .clock = &pioB_clk,
231 }, {
232 .id = AT91SAM9RL_ID_PIOC,
233 .offset = AT91_PIOC,
234 .clock = &pioC_clk,
235 }, {
236 .id = AT91SAM9RL_ID_PIOD,
237 .offset = AT91_PIOD,
238 .clock = &pioD_clk,
239 }
240};
241
242static void at91sam9rl_reset(void)
243{
244 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
245}
246
247
248/* --------------------------------------------------------------------
249 * AT91SAM9RL processor initialization
250 * -------------------------------------------------------------------- */
251
252void __init at91sam9rl_initialize(unsigned long main_clock)
253{
254 unsigned long cidr, sram_size;
255
256 /* Map peripherals */
257 iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
258
259 cidr = at91_sys_read(AT91_DBGU_CIDR);
260
261 switch (cidr & AT91_CIDR_SRAMSIZ) {
262 case AT91_CIDR_SRAMSIZ_32K:
263 sram_size = 2 * SZ_16K;
264 break;
265 case AT91_CIDR_SRAMSIZ_16K:
266 default:
267 sram_size = SZ_16K;
268 }
269
270 at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
271 at91sam9rl_sram_desc->length = sram_size;
272
273 /* Map SRAM */
274 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
275
276 at91_arch_reset = at91sam9rl_reset;
277 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
278
279 /* Init clock subsystem */
280 at91_clock_init(main_clock);
281
282 /* Register the processor-specific clocks */
283 at91sam9rl_register_clocks();
284
285 /* Register GPIO subsystem */
286 at91_gpio_init(at91sam9rl_gpio, 4);
287}
288
289/* --------------------------------------------------------------------
290 * Interrupt initialization
291 * -------------------------------------------------------------------- */
292
293/*
294 * The default interrupt priority levels (0 = lowest, 7 = highest).
295 */
296static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
297 7, /* Advanced Interrupt Controller */
298 7, /* System Peripherals */
299 1, /* Parallel IO Controller A */
300 1, /* Parallel IO Controller B */
301 1, /* Parallel IO Controller C */
302 1, /* Parallel IO Controller D */
303 5, /* USART 0 */
304 5, /* USART 1 */
305 5, /* USART 2 */
306 5, /* USART 3 */
307 0, /* Multimedia Card Interface */
308 6, /* Two-Wire Interface 0 */
309 6, /* Two-Wire Interface 1 */
310 5, /* Serial Peripheral Interface */
311 4, /* Serial Synchronous Controller 0 */
312 4, /* Serial Synchronous Controller 1 */
313 0, /* Timer Counter 0 */
314 0, /* Timer Counter 1 */
315 0, /* Timer Counter 2 */
316 0,
317 0, /* Touch Screen Controller */
318 0, /* DMA Controller */
319 2, /* USB Device High speed port */
320 2, /* LCD Controller */
321 6, /* AC97 Controller */
322 0,
323 0,
324 0,
325 0,
326 0,
327 0,
328 0, /* Advanced Interrupt Controller */
329};
330
331void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
332{
333 if (!priority)
334 priority = at91sam9rl_default_irq_priority;
335
336 /* Initialize the AIC interrupt controller */
337 at91_aic_init(priority);
338
339 /* Enable GPIO interrupts */
340 at91_gpio_irq_setup();
341}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
new file mode 100644
index 000000000000..cd7532bcd4e5
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -0,0 +1,630 @@
1/*
2 * Copyright (C) 2007 Atmel Corporation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive for
6 * more details.
7 */
8
9#include <asm/mach/arch.h>
10#include <asm/mach/map.h>
11
12#include <linux/platform_device.h>
13#include <linux/fb.h>
14
15#include <video/atmel_lcdc.h>
16
17#include <asm/arch/board.h>
18#include <asm/arch/gpio.h>
19#include <asm/arch/at91sam9rl.h>
20#include <asm/arch/at91sam9rl_matrix.h>
21#include <asm/arch/at91sam926x_mc.h>
22
23#include "generic.h"
24
25
26/* --------------------------------------------------------------------
27 * MMC / SD
28 * -------------------------------------------------------------------- */
29
30#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
31static u64 mmc_dmamask = 0xffffffffUL;
32static struct at91_mmc_data mmc_data;
33
34static struct resource mmc_resources[] = {
35 [0] = {
36 .start = AT91SAM9RL_BASE_MCI,
37 .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
38 .flags = IORESOURCE_MEM,
39 },
40 [1] = {
41 .start = AT91SAM9RL_ID_MCI,
42 .end = AT91SAM9RL_ID_MCI,
43 .flags = IORESOURCE_IRQ,
44 },
45};
46
47static struct platform_device at91sam9rl_mmc_device = {
48 .name = "at91_mci",
49 .id = -1,
50 .dev = {
51 .dma_mask = &mmc_dmamask,
52 .coherent_dma_mask = 0xffffffff,
53 .platform_data = &mmc_data,
54 },
55 .resource = mmc_resources,
56 .num_resources = ARRAY_SIZE(mmc_resources),
57};
58
59void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
60{
61 if (!data)
62 return;
63
64 /* input/irq */
65 if (data->det_pin) {
66 at91_set_gpio_input(data->det_pin, 1);
67 at91_set_deglitch(data->det_pin, 1);
68 }
69 if (data->wp_pin)
70 at91_set_gpio_input(data->wp_pin, 1);
71 if (data->vcc_pin)
72 at91_set_gpio_output(data->vcc_pin, 0);
73
74 /* CLK */
75 at91_set_A_periph(AT91_PIN_PA2, 0);
76
77 /* CMD */
78 at91_set_A_periph(AT91_PIN_PA1, 1);
79
80 /* DAT0, maybe DAT1..DAT3 */
81 at91_set_A_periph(AT91_PIN_PA0, 1);
82 if (data->wire4) {
83 at91_set_A_periph(AT91_PIN_PA3, 1);
84 at91_set_A_periph(AT91_PIN_PA4, 1);
85 at91_set_A_periph(AT91_PIN_PA5, 1);
86 }
87
88 mmc_data = *data;
89 platform_device_register(&at91sam9rl_mmc_device);
90}
91#else
92void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
93#endif
94
95
96/* --------------------------------------------------------------------
97 * NAND / SmartMedia
98 * -------------------------------------------------------------------- */
99
100#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
101static struct at91_nand_data nand_data;
102
103#define NAND_BASE AT91_CHIPSELECT_3
104
105static struct resource nand_resources[] = {
106 {
107 .start = NAND_BASE,
108 .end = NAND_BASE + SZ_256M - 1,
109 .flags = IORESOURCE_MEM,
110 }
111};
112
113static struct platform_device at91_nand_device = {
114 .name = "at91_nand",
115 .id = -1,
116 .dev = {
117 .platform_data = &nand_data,
118 },
119 .resource = nand_resources,
120 .num_resources = ARRAY_SIZE(nand_resources),
121};
122
123void __init at91_add_device_nand(struct at91_nand_data *data)
124{
125 unsigned long csa;
126
127 if (!data)
128 return;
129
130 csa = at91_sys_read(AT91_MATRIX_EBICSA);
131 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
132
133 /* set the bus interface characteristics */
134 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
135 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
136
137 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
138 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
139
140 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
141
142 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
143
144 /* enable pin */
145 if (data->enable_pin)
146 at91_set_gpio_output(data->enable_pin, 1);
147
148 /* ready/busy pin */
149 if (data->rdy_pin)
150 at91_set_gpio_input(data->rdy_pin, 1);
151
152 /* card detect pin */
153 if (data->det_pin)
154 at91_set_gpio_input(data->det_pin, 1);
155
156 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
157 at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
158
159 nand_data = *data;
160 platform_device_register(&at91_nand_device);
161}
162
163#else
164void __init at91_add_device_nand(struct at91_nand_data *data) {}
165#endif
166
167
168/* --------------------------------------------------------------------
169 * TWI (i2c)
170 * -------------------------------------------------------------------- */
171
172#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
173
174static struct resource twi_resources[] = {
175 [0] = {
176 .start = AT91SAM9RL_BASE_TWI0,
177 .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
181 .start = AT91SAM9RL_ID_TWI0,
182 .end = AT91SAM9RL_ID_TWI0,
183 .flags = IORESOURCE_IRQ,
184 },
185};
186
187static struct platform_device at91sam9rl_twi_device = {
188 .name = "at91_i2c",
189 .id = -1,
190 .resource = twi_resources,
191 .num_resources = ARRAY_SIZE(twi_resources),
192};
193
194void __init at91_add_device_i2c(void)
195{
196 /* pins used for TWI interface */
197 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
198 at91_set_multi_drive(AT91_PIN_PA23, 1);
199
200 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
201 at91_set_multi_drive(AT91_PIN_PA24, 1);
202
203 platform_device_register(&at91sam9rl_twi_device);
204}
205#else
206void __init at91_add_device_i2c(void) {}
207#endif
208
209
210/* --------------------------------------------------------------------
211 * SPI
212 * -------------------------------------------------------------------- */
213
214#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
215static u64 spi_dmamask = 0xffffffffUL;
216
217static struct resource spi_resources[] = {
218 [0] = {
219 .start = AT91SAM9RL_BASE_SPI,
220 .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = AT91SAM9RL_ID_SPI,
225 .end = AT91SAM9RL_ID_SPI,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
230static struct platform_device at91sam9rl_spi_device = {
231 .name = "atmel_spi",
232 .id = 0,
233 .dev = {
234 .dma_mask = &spi_dmamask,
235 .coherent_dma_mask = 0xffffffff,
236 },
237 .resource = spi_resources,
238 .num_resources = ARRAY_SIZE(spi_resources),
239};
240
241static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
242
243
244void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
245{
246 int i;
247 unsigned long cs_pin;
248
249 at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */
250 at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */
251 at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */
252
253 /* Enable SPI chip-selects */
254 for (i = 0; i < nr_devices; i++) {
255 if (devices[i].controller_data)
256 cs_pin = (unsigned long) devices[i].controller_data;
257 else
258 cs_pin = spi_standard_cs[devices[i].chip_select];
259
260 /* enable chip-select pin */
261 at91_set_gpio_output(cs_pin, 1);
262
263 /* pass chip-select pin to driver */
264 devices[i].controller_data = (void *) cs_pin;
265 }
266
267 spi_register_board_info(devices, nr_devices);
268 platform_device_register(&at91sam9rl_spi_device);
269}
270#else
271void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
272#endif
273
274
275/* --------------------------------------------------------------------
276 * LCD Controller
277 * -------------------------------------------------------------------- */
278
279#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
280static u64 lcdc_dmamask = 0xffffffffUL;
281static struct atmel_lcdfb_info lcdc_data;
282
283static struct resource lcdc_resources[] = {
284 [0] = {
285 .start = AT91SAM9RL_LCDC_BASE,
286 .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = AT91SAM9RL_ID_LCDC,
291 .end = AT91SAM9RL_ID_LCDC,
292 .flags = IORESOURCE_IRQ,
293 },
294#if defined(CONFIG_FB_INTSRAM)
295 [2] = {
296 .start = AT91SAM9RL_SRAM_BASE,
297 .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
298 .flags = IORESOURCE_MEM,
299 },
300#endif
301};
302
303static struct platform_device at91_lcdc_device = {
304 .name = "atmel_lcdfb",
305 .id = 0,
306 .dev = {
307 .dma_mask = &lcdc_dmamask,
308 .coherent_dma_mask = 0xffffffff,
309 .platform_data = &lcdc_data,
310 },
311 .resource = lcdc_resources,
312 .num_resources = ARRAY_SIZE(lcdc_resources),
313};
314
315void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
316{
317 if (!data) {
318 return;
319 }
320
321 at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */
322 at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
323 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
324 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */
325 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */
326 at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
327 at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
328 at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
329 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
330 at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
331 at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
332 at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
333 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
334 at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
335 at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
336 at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
337 at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
338 at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
339 at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
340 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
341 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
342
343 lcdc_data = *data;
344 platform_device_register(&at91_lcdc_device);
345}
346#else
347void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
348#endif
349
350
351/* --------------------------------------------------------------------
352 * LEDs
353 * -------------------------------------------------------------------- */
354
355#if defined(CONFIG_LEDS)
356u8 at91_leds_cpu;
357u8 at91_leds_timer;
358
359void __init at91_init_leds(u8 cpu_led, u8 timer_led)
360{
361 /* Enable GPIO to access the LEDs */
362 at91_set_gpio_output(cpu_led, 1);
363 at91_set_gpio_output(timer_led, 1);
364
365 at91_leds_cpu = cpu_led;
366 at91_leds_timer = timer_led;
367}
368#else
369void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
370#endif
371
372
373/* --------------------------------------------------------------------
374 * UART
375 * -------------------------------------------------------------------- */
376
377#if defined(CONFIG_SERIAL_ATMEL)
378static struct resource dbgu_resources[] = {
379 [0] = {
380 .start = AT91_VA_BASE_SYS + AT91_DBGU,
381 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
382 .flags = IORESOURCE_MEM,
383 },
384 [1] = {
385 .start = AT91_ID_SYS,
386 .end = AT91_ID_SYS,
387 .flags = IORESOURCE_IRQ,
388 },
389};
390
391static struct atmel_uart_data dbgu_data = {
392 .use_dma_tx = 0,
393 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
394 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
395};
396
397static struct platform_device at91sam9rl_dbgu_device = {
398 .name = "atmel_usart",
399 .id = 0,
400 .dev = {
401 .platform_data = &dbgu_data,
402 .coherent_dma_mask = 0xffffffff,
403 },
404 .resource = dbgu_resources,
405 .num_resources = ARRAY_SIZE(dbgu_resources),
406};
407
408static inline void configure_dbgu_pins(void)
409{
410 at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */
411 at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */
412}
413
414static struct resource uart0_resources[] = {
415 [0] = {
416 .start = AT91SAM9RL_BASE_US0,
417 .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
418 .flags = IORESOURCE_MEM,
419 },
420 [1] = {
421 .start = AT91SAM9RL_ID_US0,
422 .end = AT91SAM9RL_ID_US0,
423 .flags = IORESOURCE_IRQ,
424 },
425};
426
427static struct atmel_uart_data uart0_data = {
428 .use_dma_tx = 1,
429 .use_dma_rx = 1,
430};
431
432static struct platform_device at91sam9rl_uart0_device = {
433 .name = "atmel_usart",
434 .id = 1,
435 .dev = {
436 .platform_data = &uart0_data,
437 .coherent_dma_mask = 0xffffffff,
438 },
439 .resource = uart0_resources,
440 .num_resources = ARRAY_SIZE(uart0_resources),
441};
442
443static inline void configure_usart0_pins(void)
444{
445 at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */
446 at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
447 at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */
448 at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */
449}
450
451static struct resource uart1_resources[] = {
452 [0] = {
453 .start = AT91SAM9RL_BASE_US1,
454 .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
455 .flags = IORESOURCE_MEM,
456 },
457 [1] = {
458 .start = AT91SAM9RL_ID_US1,
459 .end = AT91SAM9RL_ID_US1,
460 .flags = IORESOURCE_IRQ,
461 },
462};
463
464static struct atmel_uart_data uart1_data = {
465 .use_dma_tx = 1,
466 .use_dma_rx = 1,
467};
468
469static struct platform_device at91sam9rl_uart1_device = {
470 .name = "atmel_usart",
471 .id = 2,
472 .dev = {
473 .platform_data = &uart1_data,
474 .coherent_dma_mask = 0xffffffff,
475 },
476 .resource = uart1_resources,
477 .num_resources = ARRAY_SIZE(uart1_resources),
478};
479
480static inline void configure_usart1_pins(void)
481{
482 at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */
483 at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */
484}
485
486static struct resource uart2_resources[] = {
487 [0] = {
488 .start = AT91SAM9RL_BASE_US2,
489 .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = AT91SAM9RL_ID_US2,
494 .end = AT91SAM9RL_ID_US2,
495 .flags = IORESOURCE_IRQ,
496 },
497};
498
499static struct atmel_uart_data uart2_data = {
500 .use_dma_tx = 1,
501 .use_dma_rx = 1,
502};
503
504static struct platform_device at91sam9rl_uart2_device = {
505 .name = "atmel_usart",
506 .id = 3,
507 .dev = {
508 .platform_data = &uart2_data,
509 .coherent_dma_mask = 0xffffffff,
510 },
511 .resource = uart2_resources,
512 .num_resources = ARRAY_SIZE(uart2_resources),
513};
514
515static inline void configure_usart2_pins(void)
516{
517 at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */
518 at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */
519}
520
521static struct resource uart3_resources[] = {
522 [0] = {
523 .start = AT91SAM9RL_BASE_US3,
524 .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
525 .flags = IORESOURCE_MEM,
526 },
527 [1] = {
528 .start = AT91SAM9RL_ID_US3,
529 .end = AT91SAM9RL_ID_US3,
530 .flags = IORESOURCE_IRQ,
531 },
532};
533
534static struct atmel_uart_data uart3_data = {
535 .use_dma_tx = 1,
536 .use_dma_rx = 1,
537};
538
539static struct platform_device at91sam9rl_uart3_device = {
540 .name = "atmel_usart",
541 .id = 4,
542 .dev = {
543 .platform_data = &uart3_data,
544 .coherent_dma_mask = 0xffffffff,
545 },
546 .resource = uart3_resources,
547 .num_resources = ARRAY_SIZE(uart3_resources),
548};
549
550static inline void configure_usart3_pins(void)
551{
552 at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */
553 at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */
554}
555
556struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
557struct platform_device *atmel_default_console_device; /* the serial console device */
558
559void __init at91_init_serial(struct at91_uart_config *config)
560{
561 int i;
562
563 /* Fill in list of supported UARTs */
564 for (i = 0; i < config->nr_tty; i++) {
565 switch (config->tty_map[i]) {
566 case 0:
567 configure_usart0_pins();
568 at91_uarts[i] = &at91sam9rl_uart0_device;
569 at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
570 break;
571 case 1:
572 configure_usart1_pins();
573 at91_uarts[i] = &at91sam9rl_uart1_device;
574 at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
575 break;
576 case 2:
577 configure_usart2_pins();
578 at91_uarts[i] = &at91sam9rl_uart2_device;
579 at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
580 break;
581 case 3:
582 configure_usart3_pins();
583 at91_uarts[i] = &at91sam9rl_uart3_device;
584 at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
585 break;
586 case 4:
587 configure_dbgu_pins();
588 at91_uarts[i] = &at91sam9rl_dbgu_device;
589 at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
590 break;
591 default:
592 continue;
593 }
594 at91_uarts[i]->id = i; /* update ID number to mapped ID */
595 }
596
597 /* Set serial console device */
598 if (config->console_tty < ATMEL_MAX_UART)
599 atmel_default_console_device = at91_uarts[config->console_tty];
600 if (!atmel_default_console_device)
601 printk(KERN_INFO "AT91: No default serial console defined.\n");
602}
603
604void __init at91_add_device_serial(void)
605{
606 int i;
607
608 for (i = 0; i < ATMEL_MAX_UART; i++) {
609 if (at91_uarts[i])
610 platform_device_register(at91_uarts[i]);
611 }
612}
613#else
614void __init at91_init_serial(struct at91_uart_config *config) {}
615void __init at91_add_device_serial(void) {}
616#endif
617
618
619/* -------------------------------------------------------------------- */
620
621/*
622 * These devices are always present and don't need any board-specific
623 * setup.
624 */
625static int __init at91_add_standard_devices(void)
626{
627 return 0;
628}
629
630arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index bcf71536cc6d..1f0c8a400b3a 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -60,6 +60,9 @@ static void __init ek_map_io(void)
60 /* Initialize processor: 18.432 MHz crystal */ 60 /* Initialize processor: 18.432 MHz crystal */
61 at91sam9261_initialize(18432000); 61 at91sam9261_initialize(18432000);
62 62
63 /* Setup the LEDs */
64 at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
65
63 /* Setup the serial ports and console */ 66 /* Setup the serial ports and console */
64 at91_init_serial(&ek_uart_config); 67 at91_init_serial(&ek_uart_config);
65} 68}
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
new file mode 100644
index 000000000000..30c79aca84d4
--- /dev/null
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -0,0 +1,204 @@
1/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2007 Atmel Corporation
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file COPYING in the main directory of this archive for
7 * more details.
8 */
9
10#include <linux/types.h>
11#include <linux/init.h>
12#include <linux/mm.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/spi/spi.h>
16#include <linux/fb.h>
17#include <linux/clk.h>
18
19#include <video/atmel_lcdc.h>
20
21#include <asm/hardware.h>
22#include <asm/setup.h>
23#include <asm/mach-types.h>
24#include <asm/irq.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include <asm/arch/board.h>
31#include <asm/arch/gpio.h>
32#include <asm/arch/at91sam926x_mc.h>
33
34#include "generic.h"
35
36
37/*
38 * Serial port configuration.
39 * 0 .. 3 = USART0 .. USART3
40 * 4 = DBGU
41 */
42static struct at91_uart_config __initdata ek_uart_config = {
43 .console_tty = 0, /* ttyS0 */
44 .nr_tty = 2,
45 .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
46};
47
48static void __init ek_map_io(void)
49{
50 /* Initialize processor: 12.000 MHz crystal */
51 at91sam9rl_initialize(12000000);
52
53 /* Setup the serial ports and console */
54 at91_init_serial(&ek_uart_config);
55}
56
57static void __init ek_init_irq(void)
58{
59 at91sam9rl_init_interrupts(NULL);
60}
61
62
63/*
64 * MCI (SD/MMC)
65 */
66static struct at91_mmc_data __initdata ek_mmc_data = {
67 .wire4 = 1,
68 .det_pin = AT91_PIN_PA15,
69// .wp_pin = ... not connected
70// .vcc_pin = ... not connected
71};
72
73
74/*
75 * NAND flash
76 */
77static struct mtd_partition __initdata ek_nand_partition[] = {
78 {
79 .name = "Partition 1",
80 .offset = 0,
81 .size = 256 * 1024,
82 },
83 {
84 .name = "Partition 2",
85 .offset = 256 * 1024 ,
86 .size = MTDPART_SIZ_FULL,
87 },
88};
89
90static struct mtd_partition *nand_partitions(int size, int *num_partitions)
91{
92 *num_partitions = ARRAY_SIZE(ek_nand_partition);
93 return ek_nand_partition;
94}
95
96static struct at91_nand_data __initdata ek_nand_data = {
97 .ale = 21,
98 .cle = 22,
99// .det_pin = ... not connected
100 .rdy_pin = AT91_PIN_PD17,
101 .enable_pin = AT91_PIN_PB6,
102 .partition_info = nand_partitions,
103 .bus_width_16 = 0,
104};
105
106
107/*
108 * SPI devices
109 */
110static struct spi_board_info ek_spi_devices[] = {
111 { /* DataFlash chip */
112 .modalias = "mtd_dataflash",
113 .chip_select = 0,
114 .max_speed_hz = 15 * 1000 * 1000,
115 .bus_num = 0,
116 },
117};
118
119
120/*
121 * LCD Controller
122 */
123#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
124static struct fb_videomode at91_tft_vga_modes[] = {
125 {
126 .name = "TX09D50VM1CCA @ 60",
127 .refresh = 60,
128 .xres = 240, .yres = 320,
129 .pixclock = KHZ2PICOS(4965),
130
131 .left_margin = 1, .right_margin = 33,
132 .upper_margin = 1, .lower_margin = 0,
133 .hsync_len = 5, .vsync_len = 1,
134
135 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
136 .vmode = FB_VMODE_NONINTERLACED,
137 },
138};
139
140static struct fb_monspecs at91fb_default_monspecs = {
141 .manufacturer = "HIT",
142 .monitor = "TX09D50VM1CCA",
143
144 .modedb = at91_tft_vga_modes,
145 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
146 .hfmin = 15000,
147 .hfmax = 64000,
148 .vfmin = 50,
149 .vfmax = 150,
150};
151
152#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
153 | ATMEL_LCDC_DISTYPE_TFT \
154 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
155
156static void at91_lcdc_power_control(int on)
157{
158 if (on)
159 at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
160 else
161 at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
162}
163
164/* Driver datas */
165static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
166 .default_bpp = 16,
167 .default_dmacon = ATMEL_LCDC_DMAEN,
168 .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
169 .default_monspecs = &at91fb_default_monspecs,
170 .atmel_lcdfb_power_control = at91_lcdc_power_control,
171 .guard_time = 1,
172};
173
174#else
175static struct atmel_lcdfb_info __initdata ek_lcdc_data;
176#endif
177
178
179static void __init ek_board_init(void)
180{
181 /* Serial */
182 at91_add_device_serial();
183 /* I2C */
184 at91_add_device_i2c();
185 /* NAND */
186 at91_add_device_nand(&ek_nand_data);
187 /* SPI */
188 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
189 /* MMC */
190 at91_add_device_mmc(0, &ek_mmc_data);
191 /* LCD Controller */
192 at91_add_device_lcdc(&ek_lcdc_data);
193}
194
195MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
196 /* Maintainer: Atmel */
197 .phys_io = AT91_BASE_SYS,
198 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
199 .boot_params = AT91_SDRAM_BASE + 0x100,
200 .timer = &at91sam926x_timer,
201 .map_io = ek_map_io,
202 .init_irq = ek_init_irq,
203 .init_machine = ek_board_init,
204MACHINE_END
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index bda26221c522..68ed71a3e6c6 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -13,12 +13,14 @@ extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned shor
13extern void __init at91sam9260_initialize(unsigned long main_clock); 13extern void __init at91sam9260_initialize(unsigned long main_clock);
14extern void __init at91sam9261_initialize(unsigned long main_clock); 14extern void __init at91sam9261_initialize(unsigned long main_clock);
15extern void __init at91sam9263_initialize(unsigned long main_clock); 15extern void __init at91sam9263_initialize(unsigned long main_clock);
16extern void __init at91sam9rl_initialize(unsigned long main_clock);
16 17
17 /* Interrupts */ 18 /* Interrupts */
18extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 19extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
19extern void __init at91sam9260_init_interrupts(unsigned int priority[]); 20extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
20extern void __init at91sam9261_init_interrupts(unsigned int priority[]); 21extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
21extern void __init at91sam9263_init_interrupts(unsigned int priority[]); 22extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
23extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
22extern void __init at91_aic_init(unsigned int priority[]); 24extern void __init at91_aic_init(unsigned int priority[]);
23 25
24 /* Timer */ 26 /* Timer */
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
new file mode 100644
index 000000000000..bac988e7a4c3
--- /dev/null
+++ b/arch/arm/mach-davinci/Kconfig
@@ -0,0 +1,23 @@
1if ARCH_DAVINCI
2
3menu "TI DaVinci Implementations"
4
5comment "DaVinci Core Type"
6
7config ARCH_DAVINCI644x
8 default y
9 bool "DaVinci 644x based system"
10
11comment "DaVinci Board Type"
12
13config MACH_DAVINCI_EVM
14 bool "TI DaVinci EVM"
15 default y
16 depends on ARCH_DAVINCI644x
17 help
18 Configure this option to specify the whether the board used
19 for development is a DaVinci EVM
20
21endmenu
22
23endif
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
new file mode 100644
index 000000000000..a8f88cd29905
--- /dev/null
+++ b/arch/arm/mach-davinci/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux kernel.
3#
4#
5
6# Common objects
7obj-y := time.o irq.o serial.o io.o id.o psc.o
8
9# Board specific
10obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o
diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot
new file mode 100644
index 000000000000..e1dd366f836b
--- /dev/null
+++ b/arch/arm/mach-davinci/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x80008000
2params_phys-y := 0x80000100
3initrd_phys-y := 0x80800000
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c
new file mode 100644
index 000000000000..633c12e43044
--- /dev/null
+++ b/arch/arm/mach-davinci/board-evm.c
@@ -0,0 +1,131 @@
1/*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/dma-mapping.h>
15#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h>
19
20#include <asm/setup.h>
21#include <asm/io.h>
22#include <asm/mach-types.h>
23#include <asm/hardware.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/flash.h>
28
29#include <asm/arch/common.h>
30
31/* other misc. init functions */
32void __init davinci_psc_init(void);
33void __init davinci_irq_init(void);
34void __init davinci_map_common_io(void);
35
36/* NOR Flash base address set to CS0 by default */
37#define NOR_FLASH_PHYS 0x02000000
38
39static struct mtd_partition davinci_evm_partitions[] = {
40 /* bootloader (U-Boot, etc) in first 4 sectors */
41 {
42 .name = "bootloader",
43 .offset = 0,
44 .size = 4 * SZ_64K,
45 .mask_flags = MTD_WRITEABLE, /* force read-only */
46 },
47 /* bootloader params in the next 1 sectors */
48 {
49 .name = "params",
50 .offset = MTDPART_OFS_APPEND,
51 .size = SZ_64K,
52 .mask_flags = 0,
53 },
54 /* kernel */
55 {
56 .name = "kernel",
57 .offset = MTDPART_OFS_APPEND,
58 .size = SZ_2M,
59 .mask_flags = 0
60 },
61 /* file system */
62 {
63 .name = "filesystem",
64 .offset = MTDPART_OFS_APPEND,
65 .size = MTDPART_SIZ_FULL,
66 .mask_flags = 0
67 }
68};
69
70static struct physmap_flash_data davinci_evm_flash_data = {
71 .width = 2,
72 .parts = davinci_evm_partitions,
73 .nr_parts = ARRAY_SIZE(davinci_evm_partitions),
74};
75
76/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
77 * limits addresses to 16M, so using addresses past 16M will wrap */
78static struct resource davinci_evm_flash_resource = {
79 .start = NOR_FLASH_PHYS,
80 .end = NOR_FLASH_PHYS + SZ_16M - 1,
81 .flags = IORESOURCE_MEM,
82};
83
84static struct platform_device davinci_evm_flash_device = {
85 .name = "physmap-flash",
86 .id = 0,
87 .dev = {
88 .platform_data = &davinci_evm_flash_data,
89 },
90 .num_resources = 1,
91 .resource = &davinci_evm_flash_resource,
92};
93
94static struct platform_device *davinci_evm_devices[] __initdata = {
95 &davinci_evm_flash_device,
96};
97
98static void __init
99davinci_evm_map_io(void)
100{
101 davinci_map_common_io();
102}
103
104static __init void davinci_evm_init(void)
105{
106 davinci_psc_init();
107
108#if defined(CONFIG_BLK_DEV_DAVINCI) || defined(CONFIG_BLK_DEV_DAVINCI_MODULE)
109 printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, "
110 "but share pins.\n\t Disable IDE for NOR support.\n");
111#endif
112
113 platform_add_devices(davinci_evm_devices,
114 ARRAY_SIZE(davinci_evm_devices));
115}
116
117static __init void davinci_evm_irq_init(void)
118{
119 davinci_irq_init();
120}
121
122MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
123 /* Maintainer: MontaVista Software <source@mvista.com> */
124 .phys_io = IO_PHYS,
125 .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc,
126 .boot_params = (DAVINCI_DDR_BASE + 0x100),
127 .map_io = davinci_evm_map_io,
128 .init_irq = davinci_evm_irq_init,
129 .timer = &davinci_timer,
130 .init_machine = davinci_evm_init,
131MACHINE_END
diff --git a/arch/arm/mach-davinci/id.c b/arch/arm/mach-davinci/id.c
new file mode 100644
index 000000000000..70608f76aed8
--- /dev/null
+++ b/arch/arm/mach-davinci/id.c
@@ -0,0 +1,94 @@
1/*
2 * Davinci CPU identification code
3 *
4 * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
5 *
6 * Derived from OMAP1 CPU identification code.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16
17#include <asm/io.h>
18
19#define JTAG_ID_BASE 0x01c40028
20
21struct davinci_id {
22 u8 variant; /* JTAG ID bits 31:28 */
23 u16 part_no; /* JTAG ID bits 27:12 */
24 u32 manufacturer; /* JTAG ID bits 11:1 */
25 u32 type; /* Cpu id bits [31:8], cpu class bits [7:0] */
26};
27
28/* Register values to detect the DaVinci version */
29static struct davinci_id davinci_ids[] __initdata = {
30 {
31 /* DM6446 */
32 .part_no = 0xb700,
33 .variant = 0x0,
34 .manufacturer = 0x017,
35 .type = 0x64460000,
36 },
37};
38
39/*
40 * Get Device Part No. from JTAG ID register
41 */
42static u16 __init davinci_get_part_no(void)
43{
44 u32 dev_id, part_no;
45
46 dev_id = davinci_readl(JTAG_ID_BASE);
47
48 part_no = ((dev_id >> 12) & 0xffff);
49
50 return part_no;
51}
52
53/*
54 * Get Device Revision from JTAG ID register
55 */
56static u8 __init davinci_get_variant(void)
57{
58 u32 variant;
59
60 variant = davinci_readl(JTAG_ID_BASE);
61
62 variant = (variant >> 28) & 0xf;
63
64 return variant;
65}
66
67void __init davinci_check_revision(void)
68{
69 int i;
70 u16 part_no;
71 u8 variant;
72
73 part_no = davinci_get_part_no();
74 variant = davinci_get_variant();
75
76 /* First check only the major version in a safe way */
77 for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) {
78 if (part_no == (davinci_ids[i].part_no)) {
79 system_rev = davinci_ids[i].type;
80 break;
81 }
82 }
83
84 /* Check if we can find the dev revision */
85 for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) {
86 if (part_no == davinci_ids[i].part_no &&
87 variant == davinci_ids[i].variant) {
88 system_rev = davinci_ids[i].type;
89 break;
90 }
91 }
92
93 printk("DaVinci DM%04x variant 0x%x\n", system_rev >> 16, variant);
94}
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
new file mode 100644
index 000000000000..87fae6fb6ecf
--- /dev/null
+++ b/arch/arm/mach-davinci/io.c
@@ -0,0 +1,51 @@
1/*
2 * DaVinci I/O mapping code
3 *
4 * Copyright (C) 2005-2006 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14
15#include <asm/tlb.h>
16#include <asm/io.h>
17#include <asm/memory.h>
18
19#include <asm/mach/map.h>
20
21extern void davinci_check_revision(void);
22
23/*
24 * The machine specific code may provide the extra mapping besides the
25 * default mapping provided here.
26 */
27static struct map_desc davinci_io_desc[] __initdata = {
28 {
29 .virtual = IO_VIRT,
30 .pfn = __phys_to_pfn(IO_PHYS),
31 .length = IO_SIZE,
32 .type = MT_DEVICE
33 },
34};
35
36void __init davinci_map_common_io(void)
37{
38 iotable_init(davinci_io_desc, ARRAY_SIZE(davinci_io_desc));
39
40 /* Normally devicemaps_init() would flush caches and tlb after
41 * mdesc->map_io(), but we must also do it here because of the CPU
42 * revision check below.
43 */
44 local_flush_tlb_all();
45 flush_cache_all();
46
47 /* We want to check CPU revision early for cpu_is_xxxx() macros.
48 * IO space mapping must be initialized before we can do that.
49 */
50 davinci_check_revision();
51}
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
new file mode 100644
index 000000000000..1333d84d2e45
--- /dev/null
+++ b/arch/arm/mach-davinci/irq.c
@@ -0,0 +1,226 @@
1/*
2 * Interrupt handler for DaVinci boards.
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25
26#include <asm/hardware.h>
27#include <asm/io.h>
28#include <asm/mach/irq.h>
29
30#define IRQ_BIT(irq) ((irq) & 0x1f)
31
32#define FIQ_REG0_OFFSET 0x0000
33#define FIQ_REG1_OFFSET 0x0004
34#define IRQ_REG0_OFFSET 0x0008
35#define IRQ_REG1_OFFSET 0x000C
36#define IRQ_ENT_REG0_OFFSET 0x0018
37#define IRQ_ENT_REG1_OFFSET 0x001C
38#define IRQ_INCTL_REG_OFFSET 0x0020
39#define IRQ_EABASE_REG_OFFSET 0x0024
40#define IRQ_INTPRI0_REG_OFFSET 0x0030
41#define IRQ_INTPRI7_REG_OFFSET 0x004C
42
43static inline unsigned int davinci_irq_readl(int offset)
44{
45 return davinci_readl(DAVINCI_ARM_INTC_BASE + offset);
46}
47
48static inline void davinci_irq_writel(unsigned long value, int offset)
49{
50 davinci_writel(value, DAVINCI_ARM_INTC_BASE + offset);
51}
52
53/* Disable interrupt */
54static void davinci_mask_irq(unsigned int irq)
55{
56 unsigned int mask;
57 u32 l;
58
59 mask = 1 << IRQ_BIT(irq);
60
61 if (irq > 31) {
62 l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
63 l &= ~mask;
64 davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
65 } else {
66 l = davinci_irq_readl(IRQ_ENT_REG0_OFFSET);
67 l &= ~mask;
68 davinci_irq_writel(l, IRQ_ENT_REG0_OFFSET);
69 }
70}
71
72/* Enable interrupt */
73static void davinci_unmask_irq(unsigned int irq)
74{
75 unsigned int mask;
76 u32 l;
77
78 mask = 1 << IRQ_BIT(irq);
79
80 if (irq > 31) {
81 l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
82 l |= mask;
83 davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
84 } else {
85 l = davinci_irq_readl(IRQ_ENT_REG0_OFFSET);
86 l |= mask;
87 davinci_irq_writel(l, IRQ_ENT_REG0_OFFSET);
88 }
89}
90
91/* EOI interrupt */
92static void davinci_ack_irq(unsigned int irq)
93{
94 unsigned int mask;
95
96 mask = 1 << IRQ_BIT(irq);
97
98 if (irq > 31)
99 davinci_irq_writel(mask, IRQ_REG1_OFFSET);
100 else
101 davinci_irq_writel(mask, IRQ_REG0_OFFSET);
102}
103
104static struct irq_chip davinci_irq_chip_0 = {
105 .name = "AINTC",
106 .ack = davinci_ack_irq,
107 .mask = davinci_mask_irq,
108 .unmask = davinci_unmask_irq,
109};
110
111
112/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
113static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = {
114 [IRQ_VDINT0] = 2,
115 [IRQ_VDINT1] = 6,
116 [IRQ_VDINT2] = 6,
117 [IRQ_HISTINT] = 6,
118 [IRQ_H3AINT] = 6,
119 [IRQ_PRVUINT] = 6,
120 [IRQ_RSZINT] = 6,
121 [7] = 7,
122 [IRQ_VENCINT] = 6,
123 [IRQ_ASQINT] = 6,
124 [IRQ_IMXINT] = 6,
125 [IRQ_VLCDINT] = 6,
126 [IRQ_USBINT] = 4,
127 [IRQ_EMACINT] = 4,
128 [14] = 7,
129 [15] = 7,
130 [IRQ_CCINT0] = 5, /* dma */
131 [IRQ_CCERRINT] = 5, /* dma */
132 [IRQ_TCERRINT0] = 5, /* dma */
133 [IRQ_TCERRINT] = 5, /* dma */
134 [IRQ_PSCIN] = 7,
135 [21] = 7,
136 [IRQ_IDE] = 4,
137 [23] = 7,
138 [IRQ_MBXINT] = 7,
139 [IRQ_MBRINT] = 7,
140 [IRQ_MMCINT] = 7,
141 [IRQ_SDIOINT] = 7,
142 [28] = 7,
143 [IRQ_DDRINT] = 7,
144 [IRQ_AEMIFINT] = 7,
145 [IRQ_VLQINT] = 4,
146 [IRQ_TINT0_TINT12] = 2, /* clockevent */
147 [IRQ_TINT0_TINT34] = 2, /* clocksource */
148 [IRQ_TINT1_TINT12] = 7, /* DSP timer */
149 [IRQ_TINT1_TINT34] = 7, /* system tick */
150 [IRQ_PWMINT0] = 7,
151 [IRQ_PWMINT1] = 7,
152 [IRQ_PWMINT2] = 7,
153 [IRQ_I2C] = 3,
154 [IRQ_UARTINT0] = 3,
155 [IRQ_UARTINT1] = 3,
156 [IRQ_UARTINT2] = 3,
157 [IRQ_SPINT0] = 3,
158 [IRQ_SPINT1] = 3,
159 [45] = 7,
160 [IRQ_DSP2ARM0] = 4,
161 [IRQ_DSP2ARM1] = 4,
162 [IRQ_GPIO0] = 7,
163 [IRQ_GPIO1] = 7,
164 [IRQ_GPIO2] = 7,
165 [IRQ_GPIO3] = 7,
166 [IRQ_GPIO4] = 7,
167 [IRQ_GPIO5] = 7,
168 [IRQ_GPIO6] = 7,
169 [IRQ_GPIO7] = 7,
170 [IRQ_GPIOBNK0] = 7,
171 [IRQ_GPIOBNK1] = 7,
172 [IRQ_GPIOBNK2] = 7,
173 [IRQ_GPIOBNK3] = 7,
174 [IRQ_GPIOBNK4] = 7,
175 [IRQ_COMMTX] = 7,
176 [IRQ_COMMRX] = 7,
177 [IRQ_EMUINT] = 7,
178};
179
180/* ARM Interrupt Controller Initialization */
181void __init davinci_irq_init(void)
182{
183 unsigned i;
184 const u8 *priority = default_priorities;
185
186 /* Clear all interrupt requests */
187 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
188 davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
189 davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
190 davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
191
192 /* Disable all interrupts */
193 davinci_irq_writel(0x0, IRQ_ENT_REG0_OFFSET);
194 davinci_irq_writel(0x0, IRQ_ENT_REG1_OFFSET);
195
196 /* Interrupts disabled immediately, IRQ entry reflects all */
197 davinci_irq_writel(0x0, IRQ_INCTL_REG_OFFSET);
198
199 /* we don't use the hardware vector table, just its entry addresses */
200 davinci_irq_writel(0, IRQ_EABASE_REG_OFFSET);
201
202 /* Clear all interrupt requests */
203 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
204 davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
205 davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
206 davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
207
208 for (i = IRQ_INTPRI0_REG_OFFSET; i <= IRQ_INTPRI7_REG_OFFSET; i += 4) {
209 unsigned j;
210 u32 pri;
211
212 for (j = 0, pri = 0; j < 32; j += 4, priority++)
213 pri |= (*priority & 0x07) << j;
214 davinci_irq_writel(pri, i);
215 }
216
217 /* set up genirq dispatch for ARM INTC */
218 for (i = 0; i < DAVINCI_N_AINTC_IRQ; i++) {
219 set_irq_chip(i, &davinci_irq_chip_0);
220 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
221 if (i != IRQ_TINT1_TINT34)
222 set_irq_handler(i, handle_edge_irq);
223 else
224 set_irq_handler(i, handle_level_irq);
225 }
226}
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
new file mode 100644
index 000000000000..e1b0050283a6
--- /dev/null
+++ b/arch/arm/mach-davinci/psc.c
@@ -0,0 +1,113 @@
1/*
2 * TI DaVinci Power and Sleep Controller (PSC)
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/init.h>
24
25#include <asm/io.h>
26#include <asm/hardware.h>
27#include <asm/arch/psc.h>
28
29#define PTCMD __REG(0x01C41120)
30#define PDSTAT __REG(0x01C41200)
31#define PDCTL1 __REG(0x01C41304)
32#define EPCPR __REG(0x01C41070)
33#define PTSTAT __REG(0x01C41128)
34
35#define MDSTAT IO_ADDRESS(0x01C41800)
36#define MDCTL IO_ADDRESS(0x01C41A00)
37
38#define PINMUX0 __REG(0x01c40000)
39#define PINMUX1 __REG(0x01c40004)
40#define VDD3P3V_PWDN __REG(0x01C40048)
41
42static void davinci_psc_mux(unsigned int id)
43{
44 switch (id) {
45 case DAVINCI_LPSC_ATA:
46 PINMUX0 |= (1 << 17) | (1 << 16);
47 break;
48 case DAVINCI_LPSC_MMC_SD:
49 /* VDD power manupulations are done in U-Boot for CPMAC
50 * so applies to MMC as well
51 */
52 /*Set up the pull regiter for MMC */
53 VDD3P3V_PWDN = 0x0;
54 PINMUX1 &= (~(1 << 9));
55 break;
56 case DAVINCI_LPSC_I2C:
57 PINMUX1 |= (1 << 7);
58 break;
59 case DAVINCI_LPSC_McBSP:
60 PINMUX1 |= (1 << 10);
61 break;
62 default:
63 break;
64 }
65}
66
67/* Enable or disable a PSC domain */
68void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
69{
70 volatile unsigned int *mdstat = (unsigned int *)((int)MDSTAT + 4 * id);
71 volatile unsigned int *mdctl = (unsigned int *)((int)MDCTL + 4 * id);
72
73 if (id < 0)
74 return;
75
76 if (enable)
77 *mdctl |= 0x00000003; /* Enable Module */
78 else
79 *mdctl &= 0xFFFFFFF2; /* Disable Module */
80
81 if ((PDSTAT & 0x00000001) == 0) {
82 PDCTL1 |= 0x1;
83 PTCMD = (1 << domain);
84 while ((((EPCPR >> domain) & 1) == 0));
85
86 PDCTL1 |= 0x100;
87 while (!(((PTSTAT >> domain) & 1) == 0));
88 } else {
89 PTCMD = (1 << domain);
90 while (!(((PTSTAT >> domain) & 1) == 0));
91 }
92
93 if (enable)
94 while (!((*mdstat & 0x0000001F) == 0x3));
95 else
96 while (!((*mdstat & 0x0000001F) == 0x2));
97
98 if (enable)
99 davinci_psc_mux(id);
100}
101
102void __init davinci_psc_init(void)
103{
104 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1);
105 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1);
106 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1);
107 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1);
108 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1);
109 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1);
110
111 /* Turn on WatchDog timer LPSC. Needed for RESET to work */
112 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1);
113}
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
new file mode 100644
index 000000000000..8368c93c788d
--- /dev/null
+++ b/arch/arm/mach-davinci/serial.c
@@ -0,0 +1,96 @@
1/*
2 * TI DaVinci serial driver
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/serial_8250.h>
25#include <linux/serial_reg.h>
26#include <linux/platform_device.h>
27#include <linux/delay.h>
28#include <linux/clk.h>
29
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/hardware.h>
33#include <asm/arch/serial.h>
34#include <asm/arch/irqs.h>
35
36#define UART_DAVINCI_PWREMU 0x0c
37
38static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up,
39 int offset)
40{
41 offset <<= up->regshift;
42 return (unsigned int)__raw_readb(up->membase + offset);
43}
44
45static inline void davinci_serial_outp(struct plat_serial8250_port *p,
46 int offset, int value)
47{
48 offset <<= p->regshift;
49 __raw_writeb(value, p->membase + offset);
50}
51
52static struct plat_serial8250_port serial_platform_data[] = {
53 {
54 .membase = (char *)IO_ADDRESS(DAVINCI_UART0_BASE),
55 .mapbase = (unsigned long)DAVINCI_UART0_BASE,
56 .irq = IRQ_UARTINT0,
57 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
58 .iotype = UPIO_MEM,
59 .regshift = 2,
60 .uartclk = 27000000,
61 },
62 {
63 .flags = 0
64 },
65};
66
67static struct platform_device serial_device = {
68 .name = "serial8250",
69 .id = PLAT8250_DEV_PLATFORM,
70 .dev = {
71 .platform_data = serial_platform_data,
72 },
73};
74
75static void __init davinci_serial_reset(struct plat_serial8250_port *p)
76{
77 /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
78 unsigned int pwremu = 0;
79
80 davinci_serial_outp(p, UART_IER, 0); /* disable all interrupts */
81
82 davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu);
83 mdelay(10);
84
85 pwremu |= (0x3 << 13);
86 pwremu |= 0x1;
87 davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu);
88}
89
90static int __init davinci_init(void)
91{
92 davinci_serial_reset(&serial_platform_data[0]);
93 return platform_device_register(&serial_device);
94}
95
96arch_initcall(davinci_init);
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
new file mode 100644
index 000000000000..4d8425de6922
--- /dev/null
+++ b/arch/arm/mach-davinci/time.c
@@ -0,0 +1,372 @@
1/*
2 * DaVinci timer subsystem
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/clocksource.h>
16#include <linux/clockchips.h>
17#include <linux/spinlock.h>
18
19#include <asm/io.h>
20#include <asm/hardware.h>
21#include <asm/system.h>
22#include <asm/irq.h>
23#include <asm/mach/irq.h>
24#include <asm/mach/time.h>
25#include <asm/errno.h>
26#include <asm/arch/io.h>
27
28static struct clock_event_device clockevent_davinci;
29
30#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
31#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
32#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
33
34enum {
35 T0_BOT = 0, T0_TOP, T1_BOT, T1_TOP, NUM_TIMERS,
36};
37
38#define IS_TIMER1(id) (id & 0x2)
39#define IS_TIMER0(id) (!IS_TIMER1(id))
40#define IS_TIMER_TOP(id) ((id & 0x1))
41#define IS_TIMER_BOT(id) (!IS_TIMER_TOP(id))
42
43static int timer_irqs[NUM_TIMERS] = {
44 IRQ_TINT0_TINT12,
45 IRQ_TINT0_TINT34,
46 IRQ_TINT1_TINT12,
47 IRQ_TINT1_TINT34,
48};
49
50/*
51 * This driver configures the 2 64-bit count-up timers as 4 independent
52 * 32-bit count-up timers used as follows:
53 *
54 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
55 * T0_TOP: Timer 0, top : clocksource for generic timekeeping
56 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
57 * T1_TOP: Timer 1, top : <unused>
58 */
59#define TID_CLOCKEVENT T0_BOT
60#define TID_CLOCKSOURCE T0_TOP
61
62/* Timer register offsets */
63#define PID12 0x0
64#define TIM12 0x10
65#define TIM34 0x14
66#define PRD12 0x18
67#define PRD34 0x1c
68#define TCR 0x20
69#define TGCR 0x24
70#define WDTCR 0x28
71
72/* Timer register bitfields */
73#define TCR_ENAMODE_DISABLE 0x0
74#define TCR_ENAMODE_ONESHOT 0x1
75#define TCR_ENAMODE_PERIODIC 0x2
76#define TCR_ENAMODE_MASK 0x3
77
78#define TGCR_TIMMODE_SHIFT 2
79#define TGCR_TIMMODE_64BIT_GP 0x0
80#define TGCR_TIMMODE_32BIT_UNCHAINED 0x1
81#define TGCR_TIMMODE_64BIT_WDOG 0x2
82#define TGCR_TIMMODE_32BIT_CHAINED 0x3
83
84#define TGCR_TIM12RS_SHIFT 0
85#define TGCR_TIM34RS_SHIFT 1
86#define TGCR_RESET 0x0
87#define TGCR_UNRESET 0x1
88#define TGCR_RESET_MASK 0x3
89
90#define WDTCR_WDEN_SHIFT 14
91#define WDTCR_WDEN_DISABLE 0x0
92#define WDTCR_WDEN_ENABLE 0x1
93#define WDTCR_WDKEY_SHIFT 16
94#define WDTCR_WDKEY_SEQ0 0xa5c6
95#define WDTCR_WDKEY_SEQ1 0xda7e
96
97struct timer_s {
98 char *name;
99 unsigned int id;
100 unsigned long period;
101 unsigned long opts;
102 unsigned long reg_base;
103 unsigned long tim_reg;
104 unsigned long prd_reg;
105 unsigned long enamode_shift;
106 struct irqaction irqaction;
107};
108static struct timer_s timers[];
109
110/* values for 'opts' field of struct timer_s */
111#define TIMER_OPTS_DISABLED 0x00
112#define TIMER_OPTS_ONESHOT 0x01
113#define TIMER_OPTS_PERIODIC 0x02
114
115static int timer32_config(struct timer_s *t)
116{
117 u32 tcr = davinci_readl(t->reg_base + TCR);
118
119 /* disable timer */
120 tcr &= ~(TCR_ENAMODE_MASK << t->enamode_shift);
121 davinci_writel(tcr, t->reg_base + TCR);
122
123 /* reset counter to zero, set new period */
124 davinci_writel(0, t->tim_reg);
125 davinci_writel(t->period, t->prd_reg);
126
127 /* Set enable mode */
128 if (t->opts & TIMER_OPTS_ONESHOT) {
129 tcr |= TCR_ENAMODE_ONESHOT << t->enamode_shift;
130 } else if (t->opts & TIMER_OPTS_PERIODIC) {
131 tcr |= TCR_ENAMODE_PERIODIC << t->enamode_shift;
132 }
133
134 davinci_writel(tcr, t->reg_base + TCR);
135 return 0;
136}
137
138static inline u32 timer32_read(struct timer_s *t)
139{
140 return davinci_readl(t->tim_reg);
141}
142
143static irqreturn_t timer_interrupt(int irq, void *dev_id)
144{
145 struct clock_event_device *evt = &clockevent_davinci;
146
147 evt->event_handler(evt);
148 return IRQ_HANDLED;
149}
150
151/* called when 32-bit counter wraps */
152static irqreturn_t freerun_interrupt(int irq, void *dev_id)
153{
154 return IRQ_HANDLED;
155}
156
157static struct timer_s timers[] = {
158 [TID_CLOCKEVENT] = {
159 .name = "clockevent",
160 .opts = TIMER_OPTS_DISABLED,
161 .irqaction = {
162 .flags = IRQF_DISABLED | IRQF_TIMER,
163 .handler = timer_interrupt,
164 }
165 },
166 [TID_CLOCKSOURCE] = {
167 .name = "free-run counter",
168 .period = ~0,
169 .opts = TIMER_OPTS_PERIODIC,
170 .irqaction = {
171 .flags = IRQF_DISABLED | IRQF_TIMER,
172 .handler = freerun_interrupt,
173 }
174 },
175};
176
177static void __init timer_init(void)
178{
179 u32 bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE};
180 int i;
181
182 /* Global init of each 64-bit timer as a whole */
183 for(i=0; i<2; i++) {
184 u32 tgcr, base = bases[i];
185
186 /* Disabled, Internal clock source */
187 davinci_writel(0, base + TCR);
188
189 /* reset both timers, no pre-scaler for timer34 */
190 tgcr = 0;
191 davinci_writel(tgcr, base + TGCR);
192
193 /* Set both timers to unchained 32-bit */
194 tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
195 davinci_writel(tgcr, base + TGCR);
196
197 /* Unreset timers */
198 tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
199 (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
200 davinci_writel(tgcr, base + TGCR);
201
202 /* Init both counters to zero */
203 davinci_writel(0, base + TIM12);
204 davinci_writel(0, base + TIM34);
205 }
206
207 /* Init of each timer as a 32-bit timer */
208 for (i=0; i< ARRAY_SIZE(timers); i++) {
209 struct timer_s *t = &timers[i];
210
211 if (t->name) {
212 t->id = i;
213 t->reg_base = (IS_TIMER1(t->id) ?
214 DAVINCI_TIMER1_BASE : DAVINCI_TIMER0_BASE);
215
216 if (IS_TIMER_BOT(t->id)) {
217 t->enamode_shift = 6;
218 t->tim_reg = t->reg_base + TIM12;
219 t->prd_reg = t->reg_base + PRD12;
220 } else {
221 t->enamode_shift = 22;
222 t->tim_reg = t->reg_base + TIM34;
223 t->prd_reg = t->reg_base + PRD34;
224 }
225
226 /* Register interrupt */
227 t->irqaction.name = t->name;
228 t->irqaction.dev_id = (void *)t;
229 if (t->irqaction.handler != NULL) {
230 setup_irq(timer_irqs[t->id], &t->irqaction);
231 }
232
233 timer32_config(&timers[i]);
234 }
235 }
236}
237
238/*
239 * clocksource
240 */
241static cycle_t read_cycles(void)
242{
243 struct timer_s *t = &timers[TID_CLOCKSOURCE];
244
245 return (cycles_t)timer32_read(t);
246}
247
248static struct clocksource clocksource_davinci = {
249 .name = "timer0_1",
250 .rating = 300,
251 .read = read_cycles,
252 .mask = CLOCKSOURCE_MASK(32),
253 .shift = 24,
254 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
255};
256
257/*
258 * clockevent
259 */
260static int davinci_set_next_event(unsigned long cycles,
261 struct clock_event_device *evt)
262{
263 struct timer_s *t = &timers[TID_CLOCKEVENT];
264
265 t->period = cycles;
266 timer32_config(t);
267 return 0;
268}
269
270static void davinci_set_mode(enum clock_event_mode mode,
271 struct clock_event_device *evt)
272{
273 struct timer_s *t = &timers[TID_CLOCKEVENT];
274
275 switch (mode) {
276 case CLOCK_EVT_MODE_PERIODIC:
277 t->period = CLOCK_TICK_RATE / (HZ);
278 t->opts = TIMER_OPTS_PERIODIC;
279 timer32_config(t);
280 break;
281 case CLOCK_EVT_MODE_ONESHOT:
282 t->opts = TIMER_OPTS_ONESHOT;
283 break;
284 case CLOCK_EVT_MODE_UNUSED:
285 case CLOCK_EVT_MODE_SHUTDOWN:
286 t->opts = TIMER_OPTS_DISABLED;
287 break;
288 }
289}
290
291static struct clock_event_device clockevent_davinci = {
292 .name = "timer0_0",
293 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
294 .shift = 32,
295 .set_next_event = davinci_set_next_event,
296 .set_mode = davinci_set_mode,
297};
298
299
300static void __init davinci_timer_init(void)
301{
302 static char err[] __initdata = KERN_ERR
303 "%s: can't register clocksource!\n";
304
305 /* init timer hw */
306 timer_init();
307
308 /* setup clocksource */
309 clocksource_davinci.mult =
310 clocksource_khz2mult(CLOCK_TICK_RATE/1000,
311 clocksource_davinci.shift);
312 if (clocksource_register(&clocksource_davinci))
313 printk(err, clocksource_davinci.name);
314
315 /* setup clockevent */
316 clockevent_davinci.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
317 clockevent_davinci.shift);
318 clockevent_davinci.max_delta_ns =
319 clockevent_delta2ns(0xfffffffe, &clockevent_davinci);
320 clockevent_davinci.min_delta_ns =
321 clockevent_delta2ns(1, &clockevent_davinci);
322
323 clockevent_davinci.cpumask = cpumask_of_cpu(0);
324 clockevents_register_device(&clockevent_davinci);
325}
326
327struct sys_timer davinci_timer = {
328 .init = davinci_timer_init,
329};
330
331
332/* reset board using watchdog timer */
333void davinci_watchdog_reset(void) {
334 u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE;
335
336 /* disable, internal clock source */
337 davinci_writel(0, base + TCR);
338
339 /* reset timer, set mode to 64-bit watchdog, and unreset */
340 tgcr = 0;
341 davinci_writel(tgcr, base + TCR);
342 tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
343 tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
344 (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
345 davinci_writel(tgcr, base + TCR);
346
347 /* clear counter and period regs */
348 davinci_writel(0, base + TIM12);
349 davinci_writel(0, base + TIM34);
350 davinci_writel(0, base + PRD12);
351 davinci_writel(0, base + PRD34);
352
353 /* enable */
354 wdtcr = davinci_readl(base + WDTCR);
355 wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT;
356 davinci_writel(wdtcr, base + WDTCR);
357
358 /* put watchdog in pre-active state */
359 wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) |
360 (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
361 davinci_writel(wdtcr, base + WDTCR);
362
363 /* put watchdog in active state */
364 wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) |
365 (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
366 davinci_writel(wdtcr, base + WDTCR);
367
368 /* write an invalid value to the WDKEY field to trigger
369 * a watchdog reset */
370 wdtcr = 0x00004000;
371 davinci_writel(wdtcr, base + WDTCR);
372}
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index bbf0d332407e..6b2380e153ef 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -102,7 +102,7 @@ EXPORT_SYMBOL(__readb);
102EXPORT_SYMBOL(__readw); 102EXPORT_SYMBOL(__readw);
103EXPORT_SYMBOL(__readl); 103EXPORT_SYMBOL(__readl);
104 104
105void readsw(void __iomem *addr, void *data, int len) 105void readsw(const void __iomem *addr, void *data, int len)
106{ 106{
107 void __iomem *a = __isamem_convert_addr(addr); 107 void __iomem *a = __isamem_convert_addr(addr);
108 108
@@ -112,7 +112,7 @@ void readsw(void __iomem *addr, void *data, int len)
112} 112}
113EXPORT_SYMBOL(readsw); 113EXPORT_SYMBOL(readsw);
114 114
115void readsl(void __iomem *addr, void *data, int len) 115void readsl(const void __iomem *addr, void *data, int len)
116{ 116{
117 void __iomem *a = __isamem_convert_addr(addr); 117 void __iomem *a = __isamem_convert_addr(addr);
118 118
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(__writeb);
157EXPORT_SYMBOL(__writew); 157EXPORT_SYMBOL(__writew);
158EXPORT_SYMBOL(__writel); 158EXPORT_SYMBOL(__writel);
159 159
160void writesw(void __iomem *addr, void *data, int len) 160void writesw(void __iomem *addr, const void *data, int len)
161{ 161{
162 void __iomem *a = __isamem_convert_addr(addr); 162 void __iomem *a = __isamem_convert_addr(addr);
163 163
@@ -167,7 +167,7 @@ void writesw(void __iomem *addr, void *data, int len)
167} 167}
168EXPORT_SYMBOL(writesw); 168EXPORT_SYMBOL(writesw);
169 169
170void writesl(void __iomem *addr, void *data, int len) 170void writesl(void __iomem *addr, const void *data, int len)
171{ 171{
172 void __iomem *a = __isamem_convert_addr(addr); 172 void __iomem *a = __isamem_convert_addr(addr);
173 173
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
index da1609dc0dee..cad015fee12f 100644
--- a/arch/arm/mach-iop13xx/Makefile
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_IOP13XX) += io.o
10obj-$(CONFIG_ARCH_IOP13XX) += tpmi.o 10obj-$(CONFIG_ARCH_IOP13XX) += tpmi.o
11obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o 11obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
12obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o 12obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o
13obj-$(CONFIG_PCI_MSI) += msi.o
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index b2eb0b961031..5791addd436b 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -26,6 +26,7 @@
26#include <asm/hardware.h> 26#include <asm/hardware.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28#include <asm/arch/irqs.h> 28#include <asm/arch/irqs.h>
29#include <asm/arch/msi.h>
29 30
30/* INTCTL0 CP6 R0 Page 4 31/* INTCTL0 CP6 R0 Page 4
31 */ 32 */
@@ -258,7 +259,7 @@ void __init iop13xx_init_irq(void)
258 write_intbase(INTBASE); 259 write_intbase(INTBASE);
259 write_intsize(INTSIZE_4); 260 write_intsize(INTSIZE_4);
260 261
261 for(i = 0; i < NR_IOP13XX_IRQS; i++) { 262 for(i = 0; i <= IRQ_IOP13XX_HPI; i++) {
262 if (i < 32) 263 if (i < 32)
263 set_irq_chip(i, &iop13xx_irqchip1); 264 set_irq_chip(i, &iop13xx_irqchip1);
264 else if (i < 64) 265 else if (i < 64)
@@ -271,4 +272,6 @@ void __init iop13xx_init_irq(void)
271 set_irq_handler(i, handle_level_irq); 272 set_irq_handler(i, handle_level_irq);
272 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 273 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
273 } 274 }
275
276 iop13xx_msi_init();
274} 277}
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
new file mode 100644
index 000000000000..2d2369302220
--- /dev/null
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -0,0 +1,194 @@
1/*
2 * arch/arm/mach-iop13xx/msi.c
3 *
4 * PCI MSI support for the iop13xx processor
5 *
6 * Copyright (c) 2006, Intel Corporation.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
19 * Place - Suite 330, Boston, MA 02111-1307 USA.
20 *
21 */
22#include <linux/pci.h>
23#include <linux/msi.h>
24#include <asm/mach/irq.h>
25#include <asm/irq.h>
26
27
28#define IOP13XX_NUM_MSI_IRQS 128
29static DECLARE_BITMAP(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS);
30
31/* IMIPR0 CP6 R8 Page 1
32 */
33static inline u32 read_imipr_0(void)
34{
35 u32 val;
36 asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val));
37 return val;
38}
39static inline void write_imipr_0(u32 val)
40{
41 asm volatile("mcr p6, 0, %0, c8, c1, 0"::"r" (val));
42}
43
44/* IMIPR1 CP6 R9 Page 1
45 */
46static inline u32 read_imipr_1(void)
47{
48 u32 val;
49 asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val));
50 return val;
51}
52static inline void write_imipr_1(u32 val)
53{
54 asm volatile("mcr p6, 0, %0, c9, c1, 0"::"r" (val));
55}
56
57/* IMIPR2 CP6 R10 Page 1
58 */
59static inline u32 read_imipr_2(void)
60{
61 u32 val;
62 asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val));
63 return val;
64}
65static inline void write_imipr_2(u32 val)
66{
67 asm volatile("mcr p6, 0, %0, c10, c1, 0"::"r" (val));
68}
69
70/* IMIPR3 CP6 R11 Page 1
71 */
72static inline u32 read_imipr_3(void)
73{
74 u32 val;
75 asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val));
76 return val;
77}
78static inline void write_imipr_3(u32 val)
79{
80 asm volatile("mcr p6, 0, %0, c11, c1, 0"::"r" (val));
81}
82
83static u32 (*read_imipr[])(void) = {
84 read_imipr_0,
85 read_imipr_1,
86 read_imipr_2,
87 read_imipr_3,
88};
89
90static void (*write_imipr[])(u32) = {
91 write_imipr_0,
92 write_imipr_1,
93 write_imipr_2,
94 write_imipr_3,
95};
96
97static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
98{
99 int i, j;
100 unsigned long status;
101
102 /* read IMIPR registers and find any active interrupts,
103 * then call ISR for each active interrupt
104 */
105 for (i = 0; i < ARRAY_SIZE(read_imipr); i++) {
106 status = (read_imipr[i])();
107 if (!status)
108 continue;
109
110 do {
111 j = find_first_bit(&status, 32);
112 (write_imipr[i])(1 << j); /* write back to clear bit */
113 desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i);
114 desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc);
115 status = (read_imipr[i])();
116 } while (status);
117 }
118}
119
120void __init iop13xx_msi_init(void)
121{
122 set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
123}
124
125/*
126 * Dynamic irq allocate and deallocation
127 */
128int create_irq(void)
129{
130 int irq, pos;
131
132again:
133 pos = find_first_zero_bit(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS);
134 irq = IRQ_IOP13XX_MSI_0 + pos;
135 if (irq > NR_IRQS)
136 return -ENOSPC;
137 /* test_and_set_bit operates on 32-bits at a time */
138 if (test_and_set_bit(pos, msi_irq_in_use))
139 goto again;
140
141 dynamic_irq_init(irq);
142
143 return irq;
144}
145
146void destroy_irq(unsigned int irq)
147{
148 int pos = irq - IRQ_IOP13XX_MSI_0;
149
150 dynamic_irq_cleanup(irq);
151
152 clear_bit(pos, msi_irq_in_use);
153}
154
155void arch_teardown_msi_irq(unsigned int irq)
156{
157 destroy_irq(irq);
158}
159
160static void iop13xx_msi_nop(unsigned int irq)
161{
162 return;
163}
164
165static struct irq_chip iop13xx_msi_chip = {
166 .name = "PCI-MSI",
167 .ack = iop13xx_msi_nop,
168 .enable = unmask_msi_irq,
169 .disable = mask_msi_irq,
170 .mask = mask_msi_irq,
171 .unmask = unmask_msi_irq,
172};
173
174int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
175{
176 int id, irq = create_irq();
177 struct msi_msg msg;
178
179 if (irq < 0)
180 return irq;
181
182 set_irq_msi(irq, desc);
183
184 msg.address_hi = 0x0;
185 msg.address_lo = IOP13XX_MU_MIMR_PCI;
186
187 id = iop13xx_cpu_id();
188 msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f);
189
190 write_msi_msg(irq, &msg);
191 set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
192
193 return irq;
194}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index d1d0d32ca77c..1c9e94c38b7e 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -559,6 +559,14 @@ void __init iop13xx_atue_setup(void)
559 int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE); 559 int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE);
560 u32 reg_val; 560 u32 reg_val;
561 561
562#ifdef CONFIG_PCI_MSI
563 /* BAR 0 (inbound msi window) */
564 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
565 __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUE_IALR0);
566 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUE_IATVR0);
567 __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUE_IABAR0);
568#endif
569
562 /* BAR 1 (1:1 mapping with Physical RAM) */ 570 /* BAR 1 (1:1 mapping with Physical RAM) */
563 /* Set limit and enable */ 571 /* Set limit and enable */
564 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, 572 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
@@ -720,6 +728,14 @@ void __init iop13xx_atux_setup(void)
720 else 728 else
721 atux_trhfa_timeout = jiffies; 729 atux_trhfa_timeout = jiffies;
722 730
731#ifdef CONFIG_PCI_MSI
732 /* BAR 0 (inbound msi window) */
733 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
734 __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUX_IALR0);
735 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUX_IATVR0);
736 __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUX_IABAR0);
737#endif
738
723 /* BAR 1 (1:1 mapping with Physical RAM) */ 739 /* BAR 1 (1:1 mapping with Physical RAM) */
724 /* Set limit and enable */ 740 /* Set limit and enable */
725 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, 741 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig
new file mode 100644
index 000000000000..ce1cf8de2b4d
--- /dev/null
+++ b/arch/arm/mach-ks8695/Kconfig
@@ -0,0 +1,13 @@
1if ARCH_KS8695
2
3menu "Kendin/Micrel KS8695 Implementations"
4
5config MACH_KS8695
6 bool "KS8695 development board"
7 help
8 Say 'Y' here if you want your kernel to run on the original
9 Kendin-Micrel KS8695 development board.
10
11endmenu
12
13endif
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile
new file mode 100644
index 000000000000..56b7d337333a
--- /dev/null
+++ b/arch/arm/mach-ks8695/Makefile
@@ -0,0 +1,15 @@
1# arch/arm/mach-ks8695/Makefile
2#
3# Makefile for KS8695 architecture support
4#
5
6obj-y := cpu.o irq.o time.o devices.o
7obj-m :=
8obj-n :=
9obj- :=
10
11# PCI support is optional
12#obj-$(CONFIG_PCI) += pci.o
13
14# Board-specific support
15obj-$(CONFIG_MACH_KS8695) += board-micrel.o
diff --git a/arch/arm/mach-ks8695/Makefile.boot b/arch/arm/mach-ks8695/Makefile.boot
new file mode 100644
index 000000000000..48eb2cb3ac77
--- /dev/null
+++ b/arch/arm/mach-ks8695/Makefile.boot
@@ -0,0 +1,8 @@
1# Note: the following conditions must always be true:
2# ZRELADDR == virt_to_phys(TEXTADDR)
3# PARAMS_PHYS must be within 4MB of ZRELADDR
4# INITRD_PHYS must be in RAM
5
6 zreladdr-y := 0x00008000
7params_phys-y := 0x00000100
8initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
new file mode 100644
index 000000000000..8fc0edb5211e
--- /dev/null
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -0,0 +1,60 @@
1/*
2 * arch/arm/mach-ks8695/board-micrel.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/mach-types.h>
16
17#include <asm/mach/arch.h>
18#include <asm/mach/map.h>
19#include <asm/mach/irq.h>
20
21#include <asm/arch/devices.h>
22
23#include "generic.h"
24
25#ifdef CONFIG_PCI
26static int __init micrel_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
27{
28 return KS8695_IRQ_EXTERN0;
29}
30
31static struct ks8695_pci_cfg micrel_pci = {
32 .mode = KS8695_MODE_MINIPCI,
33 .map_irq = micrel_pci_map_irq,
34};
35#endif
36
37
38static void micrel_init(void)
39{
40 printk(KERN_INFO "Micrel KS8695 Development Board initializing\n");
41
42#ifdef CONFIG_PCI
43 ks8695_init_pci(&micrel_pci);
44#endif
45
46 /* Add devices */
47 ks8695_add_device_wan(); /* eth0 = WAN */
48 ks8695_add_device_lan(); /* eth1 = LAN */
49}
50
51MACHINE_START(KS8695, "KS8695 Centaur Development Board")
52 /* Maintainer: Micrel Semiconductor Inc. */
53 .phys_io = KS8695_IO_PA,
54 .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc,
55 .boot_params = KS8695_SDRAM_PA + 0x100,
56 .map_io = ks8695_map_io,
57 .init_irq = ks8695_init_irq,
58 .init_machine = micrel_init,
59 .timer = &ks8695_timer,
60MACHINE_END
diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c
new file mode 100644
index 000000000000..407d255e42bf
--- /dev/null
+++ b/arch/arm/mach-ks8695/cpu.c
@@ -0,0 +1,73 @@
1/*
2 * arch/arm/mach-ks8695/cpu.c
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 CPU support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/init.h>
27
28#include <asm/hardware.h>
29#include <asm/io.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32
33#include <asm/arch/regs-sys.h>
34#include <asm/arch/regs-misc.h>
35
36
37static struct __initdata map_desc ks8695_io_desc[] = {
38 {
39 .virtual = KS8695_IO_VA,
40 .pfn = __phys_to_pfn(KS8695_IO_PA),
41 .length = KS8695_IO_SIZE,
42 .type = MT_DEVICE,
43 }
44};
45
46static void __init ks8695_processor_info(void)
47{
48 unsigned long id, rev;
49
50 id = __raw_readl(KS8695_MISC_VA + KS8695_DID);
51 rev = __raw_readl(KS8695_MISC_VA + KS8695_RID);
52
53 printk("KS8695 ID=%04lx SubID=%02lx Revision=%02lx\n", (id & DID_ID), (rev & RID_SUBID), (rev & RID_REVISION));
54}
55
56static unsigned int sysclk[8] = { 125000000, 100000000, 62500000, 50000000, 41700000, 33300000, 31300000, 25000000 };
57static unsigned int cpuclk[8] = { 166000000, 166000000, 83000000, 83000000, 55300000, 55300000, 41500000, 41500000 };
58
59static void __init ks8695_clock_info(void)
60{
61 unsigned int scdc = __raw_readl(KS8695_SYS_VA + KS8695_CLKCON) & CLKCON_SCDC;
62
63 printk("Clocks: System %u MHz, CPU %u MHz\n",
64 sysclk[scdc] / 1000000, cpuclk[scdc] / 1000000);
65}
66
67void __init ks8695_map_io(void)
68{
69 iotable_init(ks8695_io_desc, ARRAY_SIZE(ks8695_io_desc));
70
71 ks8695_processor_info();
72 ks8695_clock_info();
73}
diff --git a/arch/arm/mach-ks8695/devices.c b/arch/arm/mach-ks8695/devices.c
new file mode 100644
index 000000000000..386593f8ac65
--- /dev/null
+++ b/arch/arm/mach-ks8695/devices.c
@@ -0,0 +1,191 @@
1/*
2 * arch/arm/mach-ks8695/devices.c
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22
23#include <linux/platform_device.h>
24
25#include <asm/arch/regs-wan.h>
26#include <asm/arch/regs-lan.h>
27#include <asm/arch/regs-hpna.h>
28
29
30/* --------------------------------------------------------------------
31 * Ethernet
32 * -------------------------------------------------------------------- */
33
34#if defined(CONFIG_ARM_KS8695_ETHER) || defined(CONFIG_ARM_KS8695_ETHER_MODULE)
35static u64 eth_dmamask = 0xffffffffUL;
36
37static struct resource ks8695_wan_resources[] = {
38 [0] = {
39 .start = KS8695_WAN_VA,
40 .end = KS8695_WAN_VA + 0x00ff,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .name = "WAN RX",
45 .start = KS8695_IRQ_WAN_RX_STATUS,
46 .end = KS8695_IRQ_WAN_RX_STATUS,
47 .flags = IORESOURCE_IRQ,
48 },
49 [2] = {
50 .name = "WAN TX",
51 .start = KS8695_IRQ_WAN_TX_STATUS,
52 .end = KS8695_IRQ_WAN_TX_STATUS,
53 .flags = IORESOURCE_IRQ,
54 },
55 [3] = {
56 .name = "WAN Link",
57 .start = KS8695_IRQ_WAN_LINK,
58 .end = KS8695_IRQ_WAN_LINK,
59 .flags = IORESOURCE_IRQ,
60 },
61};
62
63static struct platform_device ks8695_wan_device = {
64 .name = "ks8695_ether",
65 .id = 0,
66 .dev = {
67 .dma_mask = &eth_dmamask,
68 .coherent_dma_mask = 0xffffffff,
69 },
70 .resource = ks8695_wan_resources,
71 .num_resources = ARRAY_SIZE(ks8695_wan_resources),
72};
73
74
75static struct resource ks8695_lan_resources[] = {
76 [0] = {
77 .start = KS8695_LAN_VA,
78 .end = KS8695_LAN_VA + 0x00ff,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = {
82 .name = "LAN RX",
83 .start = KS8695_IRQ_LAN_RX_STATUS,
84 .end = KS8695_IRQ_LAN_RX_STATUS,
85 .flags = IORESOURCE_IRQ,
86 },
87 [2] = {
88 .name = "LAN TX",
89 .start = KS8695_IRQ_LAN_TX_STATUS,
90 .end = KS8695_IRQ_LAN_TX_STATUS,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95static struct platform_device ks8695_lan_device = {
96 .name = "ks8695_ether",
97 .id = 1,
98 .dev = {
99 .dma_mask = &eth_dmamask,
100 .coherent_dma_mask = 0xffffffff,
101 },
102 .resource = ks8695_lan_resources,
103 .num_resources = ARRAY_SIZE(ks8695_lan_resources),
104};
105
106
107static struct resource ks8695_hpna_resources[] = {
108 [0] = {
109 .start = KS8695_HPNA_VA,
110 .end = KS8695_HPNA_VA + 0x00ff,
111 .flags = IORESOURCE_MEM,
112 },
113 [1] = {
114 .name = "HPNA RX",
115 .start = KS8695_IRQ_HPNA_RX_STATUS,
116 .end = KS8695_IRQ_HPNA_RX_STATUS,
117 .flags = IORESOURCE_IRQ,
118 },
119 [2] = {
120 .name = "HPNA TX",
121 .start = KS8695_IRQ_HPNA_TX_STATUS,
122 .end = KS8695_IRQ_HPNA_TX_STATUS,
123 .flags = IORESOURCE_IRQ,
124 },
125};
126
127static struct platform_device ks8695_hpna_device = {
128 .name = "ks8695_ether",
129 .id = 2,
130 .dev = {
131 .dma_mask = &eth_dmamask,
132 .coherent_dma_mask = 0xffffffff,
133 },
134 .resource = ks8695_hpna_resources,
135 .num_resources = ARRAY_SIZE(ks8695_hpna_resources),
136};
137
138void __init ks8695_add_device_wan(void)
139{
140 platform_device_register(&ks8695_wan_device);
141}
142
143void __init ks8695_add_device_lan(void)
144{
145 platform_device_register(&ks8695_lan_device);
146}
147
148void __init ks8696_add_device_hpna(void)
149{
150 platform_device_register(&ks8695_hpna_device);
151}
152#else
153void __init ks8695_add_device_wan(void) {}
154void __init ks8695_add_device_lan(void) {}
155void __init ks8696_add_device_hpna(void) {}
156#endif
157
158
159/* --------------------------------------------------------------------
160 * Watchdog
161 * -------------------------------------------------------------------- */
162
163#if defined(CONFIG_KS8695_WATCHDOG) || defined(CONFIG_KS8695_WATCHDOG_MODULE)
164static struct platform_device ks8695_wdt_device = {
165 .name = "ks8695_wdt",
166 .id = -1,
167 .num_resources = 0,
168};
169
170static void __init ks8695_add_device_watchdog(void)
171{
172 platform_device_register(&ks8695_wdt_device);
173}
174#else
175static void __init ks8695_add_device_watchdog(void) {}
176#endif
177
178
179/* -------------------------------------------------------------------- */
180
181/*
182 * These devices are always present and don't need any board-specific
183 * setup.
184 */
185static int __init ks8695_add_standard_devices(void)
186{
187 ks8695_add_device_watchdog();
188 return 0;
189}
190
191arch_initcall(ks8695_add_standard_devices);
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
new file mode 100644
index 000000000000..2fbfab8d5fae
--- /dev/null
+++ b/arch/arm/mach-ks8695/generic.h
@@ -0,0 +1,15 @@
1/*
2 * arch/arm/mach-ks8695/generic.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11*/
12
13extern __init void ks8695_map_io(void);
14extern __init void ks8695_init_irq(void);
15extern struct sys_timer ks8695_timer;
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
new file mode 100644
index 000000000000..2407bba00547
--- /dev/null
+++ b/arch/arm/mach-ks8695/irq.c
@@ -0,0 +1,175 @@
1/*
2 * arch/arm/mach-ks8695/irq.c
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/ptrace.h>
27#include <linux/sysdev.h>
28
29#include <asm/hardware.h>
30#include <asm/irq.h>
31#include <asm/io.h>
32
33#include <asm/mach/irq.h>
34
35#include <asm/arch/regs-irq.h>
36#include <asm/arch/regs-gpio.h>
37
38static void ks8695_irq_mask(unsigned int irqno)
39{
40 unsigned long inten;
41
42 inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
43 inten &= ~(1 << irqno);
44
45 __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
46}
47
48static void ks8695_irq_unmask(unsigned int irqno)
49{
50 unsigned long inten;
51
52 inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
53 inten |= (1 << irqno);
54
55 __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
56}
57
58static void ks8695_irq_ack(unsigned int irqno)
59{
60 __raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST);
61}
62
63
64static struct irq_chip ks8695_irq_level_chip;
65static struct irq_chip ks8695_irq_edge_chip;
66
67
68static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
69{
70 unsigned long ctrl, mode;
71 unsigned short level_triggered = 0;
72
73 ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
74
75 switch (type) {
76 case IRQT_HIGH:
77 mode = IOPC_TM_HIGH;
78 level_triggered = 1;
79 break;
80 case IRQT_LOW:
81 mode = IOPC_TM_LOW;
82 level_triggered = 1;
83 break;
84 case IRQT_RISING:
85 mode = IOPC_TM_RISING;
86 break;
87 case IRQT_FALLING:
88 mode = IOPC_TM_FALLING;
89 break;
90 case IRQT_BOTHEDGE:
91 mode = IOPC_TM_EDGE;
92 break;
93 default:
94 return -EINVAL;
95 }
96
97 switch (irqno) {
98 case KS8695_IRQ_EXTERN0:
99 ctrl &= ~IOPC_IOEINT0TM;
100 ctrl |= IOPC_IOEINT0_MODE(mode);
101 break;
102 case KS8695_IRQ_EXTERN1:
103 ctrl &= ~IOPC_IOEINT1TM;
104 ctrl |= IOPC_IOEINT1_MODE(mode);
105 break;
106 case KS8695_IRQ_EXTERN2:
107 ctrl &= ~IOPC_IOEINT2TM;
108 ctrl |= IOPC_IOEINT2_MODE(mode);
109 break;
110 case KS8695_IRQ_EXTERN3:
111 ctrl &= ~IOPC_IOEINT3TM;
112 ctrl |= IOPC_IOEINT3_MODE(mode);
113 break;
114 default:
115 return -EINVAL;
116 }
117
118 if (level_triggered) {
119 set_irq_chip(irqno, &ks8695_irq_level_chip);
120 set_irq_handler(irqno, handle_level_irq);
121 }
122 else {
123 set_irq_chip(irqno, &ks8695_irq_edge_chip);
124 set_irq_handler(irqno, handle_edge_irq);
125 }
126
127 __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
128 return 0;
129}
130
131static struct irq_chip ks8695_irq_level_chip = {
132 .ack = ks8695_irq_mask,
133 .mask = ks8695_irq_mask,
134 .unmask = ks8695_irq_unmask,
135 .set_type = ks8695_irq_set_type,
136};
137
138static struct irq_chip ks8695_irq_edge_chip = {
139 .ack = ks8695_irq_ack,
140 .mask = ks8695_irq_mask,
141 .unmask = ks8695_irq_unmask,
142 .set_type = ks8695_irq_set_type,
143};
144
145void __init ks8695_init_irq(void)
146{
147 unsigned int irq;
148
149 /* Disable all interrupts initially */
150 __raw_writel(0, KS8695_IRQ_VA + KS8695_INTMC);
151 __raw_writel(0, KS8695_IRQ_VA + KS8695_INTEN);
152
153 for (irq = 0; irq < NR_IRQS; irq++) {
154 switch (irq) {
155 /* Level-triggered interrupts */
156 case KS8695_IRQ_BUS_ERROR:
157 case KS8695_IRQ_UART_MODEM_STATUS:
158 case KS8695_IRQ_UART_LINE_STATUS:
159 case KS8695_IRQ_UART_RX:
160 case KS8695_IRQ_COMM_TX:
161 case KS8695_IRQ_COMM_RX:
162 set_irq_chip(irq, &ks8695_irq_level_chip);
163 set_irq_handler(irq, handle_level_irq);
164 break;
165
166 /* Edge-triggered interrupts */
167 default:
168 ks8695_irq_ack(irq); /* clear pending bit */
169 set_irq_chip(irq, &ks8695_irq_edge_chip);
170 set_irq_handler(irq, handle_edge_irq);
171 }
172
173 set_irq_flags(irq, IRQF_VALID);
174 }
175}
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
new file mode 100644
index 000000000000..d2c86e4a72eb
--- /dev/null
+++ b/arch/arm/mach-ks8695/time.c
@@ -0,0 +1,114 @@
1/*
2 * arch/arm/mach-ks8695/time.c
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/kernel.h>
26#include <linux/sched.h>
27
28#include <asm/io.h>
29#include <asm/mach/time.h>
30
31#include <asm/arch/regs-timer.h>
32#include <asm/arch/regs-irq.h>
33
34#include "generic.h"
35
36/*
37 * Returns number of ms since last clock interrupt. Note that interrupts
38 * will have been disabled by do_gettimeoffset()
39 */
40static unsigned long ks8695_gettimeoffset (void)
41{
42 unsigned long elapsed, tick2, intpending;
43
44 /*
45 * Get the current number of ticks. Note that there is a race
46 * condition between us reading the timer and checking for an
47 * interrupt. We solve this by ensuring that the counter has not
48 * reloaded between our two reads.
49 */
50 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD);
51 do {
52 tick2 = elapsed;
53 intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1);
54 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD);
55 } while (elapsed > tick2);
56
57 /* Convert to number of ticks expired (not remaining) */
58 elapsed = (CLOCK_TICK_RATE / HZ) - elapsed;
59
60 /* Is interrupt pending? If so, then timer has been reloaded already. */
61 if (intpending)
62 elapsed += (CLOCK_TICK_RATE / HZ);
63
64 /* Convert ticks to usecs */
65 return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
66}
67
68/*
69 * IRQ handler for the timer.
70 */
71static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id)
72{
73 write_seqlock(&xtime_lock);
74 timer_tick();
75 write_sequnlock(&xtime_lock);
76
77 return IRQ_HANDLED;
78}
79
80static struct irqaction ks8695_timer_irq = {
81 .name = "ks8695_tick",
82 .flags = IRQF_DISABLED | IRQF_TIMER,
83 .handler = ks8695_timer_interrupt,
84};
85
86static void ks8695_timer_setup(void)
87{
88 unsigned long tmout = CLOCK_TICK_RATE / HZ;
89 unsigned long tmcon;
90
91 /* disable timer1 */
92 tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
93 __raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
94
95 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC);
96 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD);
97
98 /* re-enable timer1 */
99 __raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
100}
101
102static void __init ks8695_timer_init (void)
103{
104 ks8695_timer_setup();
105
106 /* Enable timer interrupts */
107 setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq);
108}
109
110struct sys_timer ks8695_timer = {
111 .init = ks8695_timer_init,
112 .offset = ks8695_gettimeoffset,
113 .resume = ks8695_timer_setup,
114};
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index ad519390dd58..48c8c9195dc3 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -326,7 +326,7 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
326 .ctrl_name = "internal", 326 .ctrl_name = "internal",
327}; 327};
328 328
329static struct omap_board_config_kernel h2_config[] = { 329static struct omap_board_config_kernel h2_config[] __initdata = {
330 { OMAP_TAG_USB, &h2_usb_config }, 330 { OMAP_TAG_USB, &h2_usb_config },
331 { OMAP_TAG_MMC, &h2_mmc_config }, 331 { OMAP_TAG_MMC, &h2_mmc_config },
332 { OMAP_TAG_UART, &h2_uart_config }, 332 { OMAP_TAG_UART, &h2_uart_config },
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 6f4ea4bda5e0..8caee68aa090 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -1,4 +1,3 @@
1//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text)
2/* 1/*
3 * linux/arch/arm/mach-omap1/pm.c 2 * linux/arch/arm/mach-omap1/pm.c
4 * 3 *
@@ -377,7 +376,7 @@ void omap_pm_suspend(void)
377 * Jump to assembly code. The processor will stay there 376 * Jump to assembly code. The processor will stay there
378 * until wake up. 377 * until wake up.
379 */ 378 */
380 omap_sram_suspend(arg0, arg1); 379 omap_sram_suspend(arg0, arg1);
381 380
382 /* 381 /*
383 * If we are here, processor is woken up! 382 * If we are here, processor is woken up!
@@ -631,10 +630,6 @@ static int omap_pm_prepare(suspend_state_t state)
631 case PM_SUSPEND_STANDBY: 630 case PM_SUSPEND_STANDBY:
632 case PM_SUSPEND_MEM: 631 case PM_SUSPEND_MEM:
633 break; 632 break;
634
635 case PM_SUSPEND_DISK:
636 return -ENOTSUPP;
637
638 default: 633 default:
639 return -EINVAL; 634 return -EINVAL;
640 } 635 }
@@ -657,10 +652,6 @@ static int omap_pm_enter(suspend_state_t state)
657 case PM_SUSPEND_MEM: 652 case PM_SUSPEND_MEM:
658 omap_pm_suspend(); 653 omap_pm_suspend();
659 break; 654 break;
660
661 case PM_SUSPEND_DISK:
662 return -ENOTSUPP;
663
664 default: 655 default:
665 return -EINVAL; 656 return -EINVAL;
666 } 657 }
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 54c836a98456..e290b989aa94 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -54,7 +54,7 @@
54 54
55static struct resource gpmc_mem_root; 55static struct resource gpmc_mem_root;
56static struct resource gpmc_cs_mem[GPMC_CS_NUM]; 56static struct resource gpmc_cs_mem[GPMC_CS_NUM];
57static spinlock_t gpmc_mem_lock = SPIN_LOCK_UNLOCKED; 57static DEFINE_SPINLOCK(gpmc_mem_lock);
58static unsigned gpmc_cs_map; 58static unsigned gpmc_cs_map;
59 59
60static void __iomem *gpmc_base = 60static void __iomem *gpmc_base =
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index f538d0fdb13c..0439906d5da7 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -43,7 +43,7 @@ struct pin_config __initdata_or_module omap24xx_pins[] = {
43/* 24xx I2C */ 43/* 24xx I2C */
44MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1) 44MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
45MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1) 45MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
46MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1) 46MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)
47MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1) 47MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
48 48
49/* Menelaus interrupt */ 49/* Menelaus interrupt */
@@ -52,7 +52,9 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
52/* 24xx clocks */ 52/* 24xx clocks */
53MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) 53MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
54 54
55/* 24xx GPMC wait pin monitoring */ 55/* 24xx GPMC chipselects, wait pin monitoring */
56MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
57MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
56MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) 58MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
57MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) 59MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
58MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) 60MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
@@ -66,6 +68,7 @@ MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
66 68
67/* 24xx GPIO */ 69/* 24xx GPIO */
68MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) 70MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
71MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
69MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) 72MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
70MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) 73MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
71MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) 74MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
@@ -75,7 +78,9 @@ MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
75MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) 78MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
76MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) 79MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
77MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) 80MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
81MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
78MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) 82MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
83MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
79 84
80/* 242x DBG GPIO */ 85/* 242x DBG GPIO */
81MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1) 86MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
@@ -118,6 +123,30 @@ MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
118MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1) 123MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
119MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1) 124MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
120 125
126/* Full speed USB */
127MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1)
128MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1)
129MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1)
130MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1)
131MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1)
132MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1)
133MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1)
134
135MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1)
136MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1)
137MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1)
138MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1)
139MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1)
140MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1)
141MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1)
142MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1)
143
144MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1)
145MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1)
146MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1)
147MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1)
148MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1)
149
121/* Keypad GPIO*/ 150/* Keypad GPIO*/
122MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1) 151MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
123MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1) 152MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index d6a279e4b524..f7009d845be8 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -47,7 +47,7 @@ static struct ll_pool {
47 int count; 47 int count;
48} ll_pool; 48} ll_pool;
49 49
50static spinlock_t ll_lock = SPIN_LOCK_UNLOCKED; 50static DEFINE_SPINLOCK(ll_lock);
51 51
52struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t * ll_dma) 52struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t * ll_dma)
53{ 53{
@@ -135,7 +135,7 @@ static inline void dma_decrement_usage(void)
135 } 135 }
136} 136}
137 137
138static spinlock_t dma_lock = SPIN_LOCK_UNLOCKED; 138static DEFINE_SPINLOCK(dma_lock);
139 139
140static inline void pnx4008_dma_lock(void) 140static inline void pnx4008_dma_lock(void)
141{ 141{
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 119c64b7223f..28c79bd0a3a0 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -24,6 +24,7 @@
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/serial_8250.h> 25#include <linux/serial_8250.h>
26#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/physmap.h>
27#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
28 29
29#include <asm/types.h> 30#include <asm/types.h>
@@ -55,23 +56,31 @@
55static struct mtd_partition trizeps4_partitions[] = { 56static struct mtd_partition trizeps4_partitions[] = {
56 { 57 {
57 .name = "Bootloader", 58 .name = "Bootloader",
59 .offset = 0x00000000,
58 .size = 0x00040000, 60 .size = 0x00040000,
59 .offset = 0,
60 .mask_flags = MTD_WRITEABLE /* force read-only */ 61 .mask_flags = MTD_WRITEABLE /* force read-only */
61 },{ 62 },{
62 .name = "Kernel", 63 .name = "Backup",
63 .size = 0x00400000, 64 .offset = 0x00040000,
64 .offset = 0x00040000 65 .size = 0x00040000,
66 },{
67 .name = "Image",
68 .offset = 0x00080000,
69 .size = 0x01080000,
70 },{
71 .name = "IPSM",
72 .offset = 0x01100000,
73 .size = 0x00e00000,
65 },{ 74 },{
66 .name = "Filesystem", 75 .name = "Registry",
76 .offset = 0x01f00000,
67 .size = MTDPART_SIZ_FULL, 77 .size = MTDPART_SIZ_FULL,
68 .offset = 0x00440000
69 } 78 }
70}; 79};
71 80
72static struct flash_platform_data trizeps4_flash_data[] = { 81static struct physmap_flash_data trizeps4_flash_data[] = {
73 { 82 {
74 .map_name = "cfi_probe", 83 .width = 4, /* bankwidth in bytes */
75 .parts = trizeps4_partitions, 84 .parts = trizeps4_partitions,
76 .nr_parts = ARRAY_SIZE(trizeps4_partitions) 85 .nr_parts = ARRAY_SIZE(trizeps4_partitions)
77 } 86 }
@@ -79,15 +88,15 @@ static struct flash_platform_data trizeps4_flash_data[] = {
79 88
80static struct resource flash_resource = { 89static struct resource flash_resource = {
81 .start = PXA_CS0_PHYS, 90 .start = PXA_CS0_PHYS,
82 .end = PXA_CS0_PHYS + SZ_64M - 1, 91 .end = PXA_CS0_PHYS + SZ_32M - 1,
83 .flags = IORESOURCE_MEM, 92 .flags = IORESOURCE_MEM,
84}; 93};
85 94
86static struct platform_device flash_device = { 95static struct platform_device flash_device = {
87 .name = "pxa2xx-flash", 96 .name = "physmap-flash",
88 .id = 0, 97 .id = 0,
89 .dev = { 98 .dev = {
90 .platform_data = &trizeps4_flash_data, 99 .platform_data = trizeps4_flash_data,
91 }, 100 },
92 .resource = &flash_resource, 101 .resource = &flash_resource,
93 .num_resources = 1, 102 .num_resources = 1,
@@ -393,11 +402,37 @@ static struct pxafb_mach_info sharp_lcd = {
393 .pxafb_backlight_power = board_backlight_power, 402 .pxafb_backlight_power = board_backlight_power,
394}; 403};
395 404
405static struct pxafb_mode_info toshiba_lcd_mode = {
406 .pixclock = 39720,
407 .xres = 640,
408 .yres = 480,
409 .bpp = 8,
410 .hsync_len = 63,
411 .left_margin = 12,
412 .right_margin = 12,
413 .vsync_len = 4,
414 .upper_margin = 32,
415 .lower_margin = 10,
416 .sync = 0,
417 .cmap_greyscale = 0,
418};
419
420static struct pxafb_mach_info toshiba_lcd = {
421 .modes = &toshiba_lcd_mode,
422 .num_modes = 1,
423 .cmap_inverse = 0,
424 .cmap_static = 0,
425 .lccr0 = LCCR0_Color | LCCR0_Act,
426 .lccr3 = 0x03400002,
427 .pxafb_backlight_power = board_backlight_power,
428};
429
396static void __init trizeps4_init(void) 430static void __init trizeps4_init(void)
397{ 431{
398 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); 432 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
399 433
400 set_pxa_fb_info(&sharp_lcd); 434/* set_pxa_fb_info(&sharp_lcd); */
435 set_pxa_fb_info(&toshiba_lcd);
401 436
402 pxa_set_mci_info(&trizeps4_mci_platform_data); 437 pxa_set_mci_info(&trizeps4_mci_platform_data);
403 pxa_set_ficp_info(&trizeps4_ficp_platform_data); 438 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
@@ -436,9 +471,10 @@ static void __init trizeps4_map_io(void)
436 /* whats that for ??? */ 471 /* whats that for ??? */
437 pxa_gpio_mode(GPIO79_nCS_3_MD); 472 pxa_gpio_mode(GPIO79_nCS_3_MD);
438 473
474#ifdef CONFIG_LEDS
439 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ 475 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
440 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ 476 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
441 477#endif
442#ifdef CONFIG_MACH_TRIZEPS4_CONXS 478#ifdef CONFIG_MACH_TRIZEPS4_CONXS
443#ifdef CONFIG_IDE_PXA_CF 479#ifdef CONFIG_IDE_PXA_CF
444 /* if boot direct from compact flash dont disable power */ 480 /* if boot direct from compact flash dont disable power */
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 9a3d3d24c084..3e7a85594d9c 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_S3C2410_CLOCK) += clock.o
20# Machine support 20# Machine support
21 21
22obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o 22obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o
23obj-$(CONFIG_ARCH_H1940) += mach-h1940.o 23obj-$(CONFIG_ARCH_H1940) += mach-h1940.o h1940-bluetooth.o
24obj-$(CONFIG_PM_H1940) += pm-h1940.o 24obj-$(CONFIG_PM_H1940) += pm-h1940.o
25obj-$(CONFIG_MACH_N30) += mach-n30.o 25obj-$(CONFIG_MACH_N30) += mach-n30.o
26obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o 26obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
new file mode 100644
index 000000000000..3c48886521e7
--- /dev/null
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -0,0 +1,142 @@
1/*
2 * arch/arm/mach-s3c2410/h1940-bluetooth.c
3 * Copyright (c) Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file COPYING in the main directory of this archive for
7 * more details.
8 *
9 * S3C2410 bluetooth "driver"
10 *
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/delay.h>
16#include <linux/string.h>
17#include <linux/ctype.h>
18#include <linux/leds.h>
19#include <asm/arch/regs-gpio.h>
20#include <asm/hardware.h>
21#include <asm/arch/h1940-latch.h>
22
23#define DRV_NAME "h1940-bt"
24
25#ifdef CONFIG_LEDS_H1940
26DEFINE_LED_TRIGGER(bt_led_trigger);
27#endif
28
29static int state;
30
31/* Bluetooth control */
32static void h1940bt_enable(int on)
33{
34 if (on) {
35#ifdef CONFIG_LEDS_H1940
36 /* flashing Blue */
37 led_trigger_event(bt_led_trigger, LED_HALF);
38#endif
39
40 /* Power on the chip */
41 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER);
42 /* Reset the chip */
43 mdelay(10);
44 s3c2410_gpio_setpin(S3C2410_GPH1, 1);
45 mdelay(10);
46 s3c2410_gpio_setpin(S3C2410_GPH1, 0);
47
48 state = 1;
49 }
50 else {
51#ifdef CONFIG_LEDS_H1940
52 led_trigger_event(bt_led_trigger, 0);
53#endif
54
55 s3c2410_gpio_setpin(S3C2410_GPH1, 1);
56 mdelay(10);
57 s3c2410_gpio_setpin(S3C2410_GPH1, 0);
58 mdelay(10);
59 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0);
60
61 state = 0;
62 }
63}
64
65static ssize_t h1940bt_show(struct device *dev, struct device_attribute *attr, char *buf)
66{
67 return snprintf(buf, PAGE_SIZE, "%d\n", state);
68}
69
70static ssize_t h1940bt_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
71{
72 int new_state;
73 char *endp;
74
75 new_state = simple_strtoul(buf, &endp, 0);
76 if (*endp && !isspace(*endp))
77 return -EINVAL;
78
79 h1940bt_enable(new_state);
80
81 return count;
82}
83static DEVICE_ATTR(enable, 0644,
84 h1940bt_show,
85 h1940bt_store);
86
87static int __init h1940bt_probe(struct platform_device *pdev)
88{
89 /* Configures BT serial port GPIOs */
90 s3c2410_gpio_cfgpin(S3C2410_GPH0, S3C2410_GPH0_nCTS0);
91 s3c2410_gpio_pullup(S3C2410_GPH0, 1);
92 s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP);
93 s3c2410_gpio_pullup(S3C2410_GPH1, 1);
94 s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_TXD0);
95 s3c2410_gpio_pullup(S3C2410_GPH2, 1);
96 s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_RXD0);
97 s3c2410_gpio_pullup(S3C2410_GPH3, 1);
98
99#ifdef CONFIG_LEDS_H1940
100 led_trigger_register_simple("h1940-bluetooth", &bt_led_trigger);
101#endif
102
103 /* disable BT by default */
104 h1940bt_enable(0);
105
106 return device_create_file(&pdev->dev, &dev_attr_enable);
107}
108
109static int h1940bt_remove(struct platform_device *pdev)
110{
111#ifdef CONFIG_LEDS_H1940
112 led_trigger_unregister_simple(bt_led_trigger);
113#endif
114 return 0;
115}
116
117
118static struct platform_driver h1940bt_driver = {
119 .driver = {
120 .name = DRV_NAME,
121 },
122 .probe = h1940bt_probe,
123 .remove = h1940bt_remove,
124};
125
126
127static int __init h1940bt_init(void)
128{
129 return platform_driver_register(&h1940bt_driver);
130}
131
132static void __exit h1940bt_exit(void)
133{
134 platform_driver_unregister(&h1940bt_driver);
135}
136
137module_init(h1940bt_init);
138module_exit(h1940bt_exit);
139
140MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
141MODULE_DESCRIPTION("Driver for the iPAQ H1940 bluetooth chip");
142MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 5d5f00e9c462..5ccd0be23a33 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -177,6 +177,11 @@ static struct platform_device s3c_device_leds = {
177 .id = -1, 177 .id = -1,
178}; 178};
179 179
180static struct platform_device s3c_device_bluetooth = {
181 .name = "h1940-bt",
182 .id = -1,
183};
184
180static struct platform_device *h1940_devices[] __initdata = { 185static struct platform_device *h1940_devices[] __initdata = {
181 &s3c_device_usb, 186 &s3c_device_usb,
182 &s3c_device_lcd, 187 &s3c_device_lcd,
@@ -185,6 +190,7 @@ static struct platform_device *h1940_devices[] __initdata = {
185 &s3c_device_iis, 190 &s3c_device_iis,
186 &s3c_device_usbgadget, 191 &s3c_device_usbgadget,
187 &s3c_device_leds, 192 &s3c_device_leds,
193 &s3c_device_bluetooth,
188}; 194};
189 195
190static void __init h1940_map_io(void) 196static void __init h1940_map_io(void)
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index dd2272fb1131..0b6e360aeae7 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -791,6 +791,10 @@ static struct clk init_clocks[] = {
791 .name = "usb-bus-host", 791 .name = "usb-bus-host",
792 .id = -1, 792 .id = -1,
793 .parent = &clk_usb_bus_host, 793 .parent = &clk_usb_bus_host,
794 }, { .name = "ac97",
795 .id = -1,
796 .parent = &clk_p,
797 .ctrlbit = S3C2443_PCLKCON_AC97,
794 } 798 }
795}; 799};
796 800
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index b81391a4e374..15f0284010ca 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -131,8 +131,8 @@ config CPU_ARM920T
131# ARM922T 131# ARM922T
132config CPU_ARM922T 132config CPU_ARM922T
133 bool "Support ARM922T processor" if ARCH_INTEGRATOR 133 bool "Support ARM922T processor" if ARCH_INTEGRATOR
134 depends on ARCH_LH7A40X || ARCH_INTEGRATOR 134 depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695
135 default y if ARCH_LH7A40X 135 default y if ARCH_LH7A40X || ARCH_KS8695
136 select CPU_32v4T 136 select CPU_32v4T
137 select CPU_ABRT_EV4T 137 select CPU_ABRT_EV4T
138 select CPU_CACHE_V4WT 138 select CPU_CACHE_V4WT
@@ -143,7 +143,7 @@ config CPU_ARM922T
143 help 143 help
144 The ARM922T is a version of the ARM920T, but with smaller 144 The ARM922T is a version of the ARM920T, but with smaller
145 instruction and data caches. It is used in Altera's 145 instruction and data caches. It is used in Altera's
146 Excalibur XA device family. 146 Excalibur XA device family and Micrel's KS8695 Centaur.
147 147
148 Say Y if you want support for the ARM922T processor. 148 Say Y if you want support for the ARM922T processor.
149 Otherwise, say N. 149 Otherwise, say N.
@@ -171,8 +171,8 @@ config CPU_ARM925T
171# ARM926T 171# ARM926T
172config CPU_ARM926T 172config CPU_ARM926T
173 bool "Support ARM926T processor" 173 bool "Support ARM926T processor"
174 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX 174 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI
175 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX 175 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI
176 select CPU_32v5 176 select CPU_32v5
177 select CPU_ABRT_EV5TJ 177 select CPU_ABRT_EV5TJ
178 select CPU_CACHE_VIVT 178 select CPU_CACHE_VIVT
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2d86b106ff3e..55a4d3be16b6 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -747,7 +747,7 @@ int omap_set_dma_callback(int lch,
747 */ 747 */
748dma_addr_t omap_get_dma_src_pos(int lch) 748dma_addr_t omap_get_dma_src_pos(int lch)
749{ 749{
750 dma_addr_t offset; 750 dma_addr_t offset = 0;
751 751
752 if (cpu_class_is_omap1()) 752 if (cpu_class_is_omap1())
753 offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) | 753 offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) |
@@ -769,7 +769,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
769 */ 769 */
770dma_addr_t omap_get_dma_dst_pos(int lch) 770dma_addr_t omap_get_dma_dst_pos(int lch)
771{ 771{
772 dma_addr_t offset; 772 dma_addr_t offset = 0;
773 773
774 if (cpu_class_is_omap1()) 774 if (cpu_class_is_omap1())
775 offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) | 775 offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) |
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 6c798d288688..75211f20ccb3 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -83,10 +83,21 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
83 reg |= OMAP24XX_PULL_ENA; 83 reg |= OMAP24XX_PULL_ENA;
84 if(cfg->pu_pd_val) 84 if(cfg->pu_pd_val)
85 reg |= OMAP24XX_PULL_UP; 85 reg |= OMAP24XX_PULL_UP;
86#ifdef CONFIG_OMAP_MUX_DEBUG 86#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
87 printk("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n", 87 {
88 cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg, 88 u8 orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg);
89 omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg), reg); 89 u8 debug = 0;
90
91#ifdef CONFIG_OMAP_MUX_DEBUG
92 debug = cfg->debug;
93#endif
94 warn = (orig != reg);
95 if (debug || warn)
96 printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
97 cfg->name,
98 OMAP24XX_L4_BASE + cfg->mux_reg,
99 orig, reg);
100 }
90#endif 101#endif
91 omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg); 102 omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
92 103
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index b1142ce4ac47..0a9a5e7f62e5 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Apr 16 21:01:04 2007 15# Last update: Fri May 11 19:53:41 2007
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -1335,3 +1335,35 @@ at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326
1335comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327 1335comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327
1336sbc2410x MACH_SBC2410X SBC2410X 1328 1336sbc2410x MACH_SBC2410X SBC2410X 1328
1337at4x0bd MACH_AT4X0BD AT4X0BD 1329 1337at4x0bd MACH_AT4X0BD AT4X0BD 1329
1338cbifr MACH_CBIFR CBIFR 1330
1339arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331
1340matrix520 MACH_MATRIX520 MATRIX520 1332
1341matrix510 MACH_MATRIX510 MATRIX510 1333
1342matrix500 MACH_MATRIX500 MATRIX500 1334
1343m501 MACH_M501 M501 1335
1344aaeon1270 MACH_AAEON1270 AAEON1270 1336
1345matrix500ev MACH_MATRIX500EV MATRIX500EV 1337
1346pac500 MACH_PAC500 PAC500 1338
1347pnx8181 MACH_PNX8181 PNX8181 1339
1348colibri320 MACH_COLIBRI320 COLIBRI320 1340
1349aztoolbb MACH_AZTOOLBB AZTOOLBB 1341
1350aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342
1351dvlhost MACH_DVLHOST DVLHOST 1343
1352zir9200 MACH_ZIR9200 ZIR9200 1344
1353zir9260 MACH_ZIR9260 ZIR9260 1345
1354cocopah MACH_COCOPAH COCOPAH 1346
1355nds MACH_NDS NDS 1347
1356rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348
1357fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349
1358classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350
1359cam60 MACH_CAM60 CAM60 1351
1360mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352
1361datacall MACH_DATACALL DATACALL 1353
1362at91eb01 MACH_AT91EB01 AT91EB01 1354
1363rty MACH_RTY RTY 1355
1364dwl2100 MACH_DWL2100 DWL2100 1356
1365vinsi MACH_VINSI VINSI 1357
1366db88f5281 MACH_DB88F5281 DB88F5281 1358
1367csb726 MACH_CSB726 CSB726 1359
1368tik27 MACH_TIK27 TIK27 1360
1369mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index dbc8ee2adcf0..c791a46df461 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -60,6 +60,18 @@ struct pata_icside_state {
60 struct scatterlist sg[PATA_ICSIDE_MAX_SG]; 60 struct scatterlist sg[PATA_ICSIDE_MAX_SG];
61}; 61};
62 62
63struct pata_icside_info {
64 struct pata_icside_state *state;
65 struct expansion_card *ec;
66 void __iomem *base;
67 void __iomem *irqaddr;
68 unsigned int irqmask;
69 const expansioncard_ops_t *irqops;
70 unsigned int mwdma_mask;
71 unsigned int nr_ports;
72 const struct portinfo *port[2];
73};
74
63#define ICS_TYPE_A3IN 0 75#define ICS_TYPE_A3IN 0
64#define ICS_TYPE_A3USER 1 76#define ICS_TYPE_A3USER 1
65#define ICS_TYPE_V6 3 77#define ICS_TYPE_V6 3
@@ -269,9 +281,10 @@ static u8 pata_icside_bmdma_status(struct ata_port *ap)
269 return readb(irq_port) & 1 ? ATA_DMA_INTR : 0; 281 return readb(irq_port) & 1 ? ATA_DMA_INTR : 0;
270} 282}
271 283
272static int icside_dma_init(struct ata_probe_ent *ae, struct expansion_card *ec) 284static int icside_dma_init(struct pata_icside_info *info)
273{ 285{
274 struct pata_icside_state *state = ae->private_data; 286 struct pata_icside_state *state = info->state;
287 struct expansion_card *ec = info->ec;
275 int i; 288 int i;
276 289
277 for (i = 0; i < ATA_MAX_DEVICES; i++) { 290 for (i = 0; i < ATA_MAX_DEVICES; i++) {
@@ -281,7 +294,7 @@ static int icside_dma_init(struct ata_probe_ent *ae, struct expansion_card *ec)
281 294
282 if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) { 295 if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
283 state->dma = ec->dma; 296 state->dma = ec->dma;
284 ae->mwdma_mask = 0x07; /* MW0..2 */ 297 info->mwdma_mask = 0x07; /* MW0..2 */
285 } 298 }
286 299
287 return 0; 300 return 0;
@@ -371,6 +384,8 @@ static struct ata_port_operations pata_icside_port_ops = {
371 .check_status = ata_check_status, 384 .check_status = ata_check_status,
372 .dev_select = ata_std_dev_select, 385 .dev_select = ata_std_dev_select,
373 386
387 .cable_detect = ata_cable_40wire,
388
374 .bmdma_setup = pata_icside_bmdma_setup, 389 .bmdma_setup = pata_icside_bmdma_setup,
375 .bmdma_start = pata_icside_bmdma_start, 390 .bmdma_start = pata_icside_bmdma_start,
376 391
@@ -385,7 +400,6 @@ static struct ata_port_operations pata_icside_port_ops = {
385 .error_handler = ata_bmdma_error_handler, 400 .error_handler = ata_bmdma_error_handler,
386 .post_internal_cmd = pata_icside_bmdma_stop, 401 .post_internal_cmd = pata_icside_bmdma_stop,
387 402
388 .irq_handler = ata_interrupt,
389 .irq_clear = ata_dummy_noret, 403 .irq_clear = ata_dummy_noret,
390 .irq_on = ata_irq_on, 404 .irq_on = ata_irq_on,
391 .irq_ack = pata_icside_irq_ack, 405 .irq_ack = pata_icside_irq_ack,
@@ -396,11 +410,10 @@ static struct ata_port_operations pata_icside_port_ops = {
396 .bmdma_status = pata_icside_bmdma_status, 410 .bmdma_status = pata_icside_bmdma_status,
397}; 411};
398 412
399static void 413static void __devinit
400pata_icside_add_port(struct ata_probe_ent *ae, void __iomem *base, 414pata_icside_setup_ioaddr(struct ata_ioports *ioaddr, void __iomem *base,
401 const struct portinfo *info) 415 const struct portinfo *info)
402{ 416{
403 struct ata_ioports *ioaddr = &ae->port[ae->n_ports++];
404 void __iomem *cmd = base + info->dataoffset; 417 void __iomem *cmd = base + info->dataoffset;
405 418
406 ioaddr->cmd_addr = cmd; 419 ioaddr->cmd_addr = cmd;
@@ -419,58 +432,44 @@ pata_icside_add_port(struct ata_probe_ent *ae, void __iomem *base,
419 ioaddr->altstatus_addr = ioaddr->ctl_addr; 432 ioaddr->altstatus_addr = ioaddr->ctl_addr;
420} 433}
421 434
422static int __init 435static int __devinit pata_icside_register_v5(struct pata_icside_info *info)
423pata_icside_register_v5(struct ata_probe_ent *ae, struct expansion_card *ec)
424{ 436{
425 struct pata_icside_state *state = ae->private_data; 437 struct pata_icside_state *state = info->state;
426 void __iomem *base; 438 void __iomem *base;
427 439
428 base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC), 440 base = ecardm_iomap(info->ec, ECARD_RES_MEMC, 0, 0);
429 ecard_resource_len(ec, ECARD_RES_MEMC));
430 if (!base) 441 if (!base)
431 return -ENOMEM; 442 return -ENOMEM;
432 443
433 state->irq_port = base; 444 state->irq_port = base;
434 445
435 ec->irqaddr = base + ICS_ARCIN_V5_INTRSTAT; 446 info->base = base;
436 ec->irqmask = 1; 447 info->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
437 ec->irq_data = state; 448 info->irqmask = 1;
438 ec->ops = &pata_icside_ops_arcin_v5; 449 info->irqops = &pata_icside_ops_arcin_v5;
439 450 info->nr_ports = 1;
440 /* 451 info->port[0] = &pata_icside_portinfo_v5;
441 * Be on the safe side - disable interrupts
442 */
443 ec->ops->irqdisable(ec, ec->irq);
444
445 pata_icside_add_port(ae, base, &pata_icside_portinfo_v5);
446 452
447 return 0; 453 return 0;
448} 454}
449 455
450static int __init 456static int __devinit pata_icside_register_v6(struct pata_icside_info *info)
451pata_icside_register_v6(struct ata_probe_ent *ae, struct expansion_card *ec)
452{ 457{
453 struct pata_icside_state *state = ae->private_data; 458 struct pata_icside_state *state = info->state;
459 struct expansion_card *ec = info->ec;
454 void __iomem *ioc_base, *easi_base; 460 void __iomem *ioc_base, *easi_base;
455 unsigned int sel = 0; 461 unsigned int sel = 0;
456 int ret;
457 462
458 ioc_base = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), 463 ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
459 ecard_resource_len(ec, ECARD_RES_IOCFAST)); 464 if (!ioc_base)
460 if (!ioc_base) { 465 return -ENOMEM;
461 ret = -ENOMEM;
462 goto out;
463 }
464 466
465 easi_base = ioc_base; 467 easi_base = ioc_base;
466 468
467 if (ecard_resource_flags(ec, ECARD_RES_EASI)) { 469 if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
468 easi_base = ioremap(ecard_resource_start(ec, ECARD_RES_EASI), 470 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
469 ecard_resource_len(ec, ECARD_RES_EASI)); 471 if (!easi_base)
470 if (!easi_base) { 472 return -ENOMEM;
471 ret = -ENOMEM;
472 goto unmap_slot;
473 }
474 473
475 /* 474 /*
476 * Enable access to the EASI region. 475 * Enable access to the EASI region.
@@ -480,45 +479,72 @@ pata_icside_register_v6(struct ata_probe_ent *ae, struct expansion_card *ec)
480 479
481 writeb(sel, ioc_base); 480 writeb(sel, ioc_base);
482 481
483 ec->irq_data = state;
484 ec->ops = &pata_icside_ops_arcin_v6;
485
486 state->irq_port = easi_base; 482 state->irq_port = easi_base;
487 state->ioc_base = ioc_base; 483 state->ioc_base = ioc_base;
488 state->port[0].port_sel = sel; 484 state->port[0].port_sel = sel;
489 state->port[1].port_sel = sel | 1; 485 state->port[1].port_sel = sel | 1;
490 486
491 /* 487 /*
492 * Be on the safe side - disable interrupts
493 */
494 ec->ops->irqdisable(ec, ec->irq);
495
496 /*
497 * Find and register the interfaces.
498 */
499 pata_icside_add_port(ae, easi_base, &pata_icside_portinfo_v6_1);
500 pata_icside_add_port(ae, easi_base, &pata_icside_portinfo_v6_2);
501
502 /*
503 * FIXME: work around libata's aversion to calling port_disable. 488 * FIXME: work around libata's aversion to calling port_disable.
504 * This permanently disables interrupts on port 0 - bad luck if 489 * This permanently disables interrupts on port 0 - bad luck if
505 * you have a drive on that port. 490 * you have a drive on that port.
506 */ 491 */
507 state->port[0].disabled = 1; 492 state->port[0].disabled = 1;
508 493
509 return icside_dma_init(ae, ec); 494 info->base = easi_base;
495 info->irqops = &pata_icside_ops_arcin_v6;
496 info->nr_ports = 2;
497 info->port[0] = &pata_icside_portinfo_v6_1;
498 info->port[1] = &pata_icside_portinfo_v6_2;
510 499
511 unmap_slot: 500 return icside_dma_init(info);
512 iounmap(ioc_base); 501}
513 out: 502
514 return ret; 503static int __devinit pata_icside_add_ports(struct pata_icside_info *info)
504{
505 struct expansion_card *ec = info->ec;
506 struct ata_host *host;
507 int i;
508
509 if (info->irqaddr) {
510 ec->irqaddr = info->irqaddr;
511 ec->irqmask = info->irqmask;
512 }
513 if (info->irqops)
514 ecard_setirq(ec, info->irqops, info->state);
515
516 /*
517 * Be on the safe side - disable interrupts
518 */
519 ec->ops->irqdisable(ec, ec->irq);
520
521 host = ata_host_alloc(&ec->dev, info->nr_ports);
522 if (!host)
523 return -ENOMEM;
524
525 host->private_data = info->state;
526 host->flags = ATA_HOST_SIMPLEX;
527
528 for (i = 0; i < info->nr_ports; i++) {
529 struct ata_port *ap = host->ports[i];
530
531 ap->pio_mask = 0x1f;
532 ap->mwdma_mask = info->mwdma_mask;
533 ap->flags |= ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
534 ap->ops = &pata_icside_port_ops;
535
536 pata_icside_setup_ioaddr(&ap->ioaddr, info->base, info->port[i]);
537 }
538
539 return ata_host_activate(host, ec->irq, ata_interrupt, 0,
540 &pata_icside_sht);
515} 541}
516 542
517static int __devinit 543static int __devinit
518pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id) 544pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
519{ 545{
520 struct pata_icside_state *state; 546 struct pata_icside_state *state;
521 struct ata_probe_ent ae; 547 struct pata_icside_info info;
522 void __iomem *idmem; 548 void __iomem *idmem;
523 int ret; 549 int ret;
524 550
@@ -526,7 +552,7 @@ pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
526 if (ret) 552 if (ret)
527 goto out; 553 goto out;
528 554
529 state = kzalloc(sizeof(struct pata_icside_state), GFP_KERNEL); 555 state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
530 if (!state) { 556 if (!state) {
531 ret = -ENOMEM; 557 ret = -ENOMEM;
532 goto release; 558 goto release;
@@ -535,8 +561,7 @@ pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
535 state->type = ICS_TYPE_NOTYPE; 561 state->type = ICS_TYPE_NOTYPE;
536 state->dma = NO_DMA; 562 state->dma = NO_DMA;
537 563
538 idmem = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), 564 idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
539 ecard_resource_len(ec, ECARD_RES_IOCFAST));
540 if (idmem) { 565 if (idmem) {
541 unsigned int type; 566 unsigned int type;
542 567
@@ -544,21 +569,14 @@ pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
544 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1; 569 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
545 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2; 570 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
546 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3; 571 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
547 iounmap(idmem); 572 ecardm_iounmap(ec, idmem);
548 573
549 state->type = type; 574 state->type = type;
550 } 575 }
551 576
552 memset(&ae, 0, sizeof(ae)); 577 memset(&info, 0, sizeof(info));
553 INIT_LIST_HEAD(&ae.node); 578 info.state = state;
554 ae.dev = &ec->dev; 579 info.ec = ec;
555 ae.port_ops = &pata_icside_port_ops;
556 ae.sht = &pata_icside_sht;
557 ae.pio_mask = 0x1f;
558 ae.irq = ec->irq;
559 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
560 ae._host_flags = ATA_HOST_SIMPLEX;
561 ae.private_data = state;
562 580
563 switch (state->type) { 581 switch (state->type) {
564 case ICS_TYPE_A3IN: 582 case ICS_TYPE_A3IN:
@@ -572,11 +590,11 @@ pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
572 break; 590 break;
573 591
574 case ICS_TYPE_V5: 592 case ICS_TYPE_V5:
575 ret = pata_icside_register_v5(&ae, ec); 593 ret = pata_icside_register_v5(&info);
576 break; 594 break;
577 595
578 case ICS_TYPE_V6: 596 case ICS_TYPE_V6:
579 ret = pata_icside_register_v6(&ae, ec); 597 ret = pata_icside_register_v6(&info);
580 break; 598 break;
581 599
582 default: 600 default:
@@ -586,12 +604,11 @@ pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
586 } 604 }
587 605
588 if (ret == 0) 606 if (ret == 0)
589 ret = ata_device_add(&ae) == 0 ? -ENODEV : 0; 607 ret = pata_icside_add_ports(&info);
590 608
591 if (ret == 0) 609 if (ret == 0)
592 goto out; 610 goto out;
593 611
594 kfree(state);
595 release: 612 release:
596 ecard_release_resources(ec); 613 ecard_release_resources(ec);
597 out: 614 out:
@@ -609,8 +626,7 @@ static void pata_icside_shutdown(struct expansion_card *ec)
609 * this register via that region. 626 * this register via that region.
610 */ 627 */
611 local_irq_save(flags); 628 local_irq_save(flags);
612 if (ec->ops) 629 ec->ops->irqdisable(ec, ec->irq);
613 ec->ops->irqdisable(ec, ec->irq);
614 local_irq_restore(flags); 630 local_irq_restore(flags);
615 631
616 /* 632 /*
@@ -638,17 +654,9 @@ static void __devexit pata_icside_remove(struct expansion_card *ec)
638 * don't NULL out the drvdata - devres/libata wants it 654 * don't NULL out the drvdata - devres/libata wants it
639 * to free the ata_host structure. 655 * to free the ata_host structure.
640 */ 656 */
641 ec->ops = NULL;
642 ec->irq_data = NULL;
643
644 if (state->dma != NO_DMA) 657 if (state->dma != NO_DMA)
645 free_dma(state->dma); 658 free_dma(state->dma);
646 if (state->ioc_base)
647 iounmap(state->ioc_base);
648 if (state->ioc_base != state->irq_port)
649 iounmap(state->irq_port);
650 659
651 kfree(state);
652 ecard_release_resources(ec); 660 ecard_release_resources(ec);
653} 661}
654 662
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index 1fe0457243db..66f826252aee 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -565,8 +565,7 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec)
565 ide_hwif_t *hwif; 565 ide_hwif_t *hwif;
566 void __iomem *base; 566 void __iomem *base;
567 567
568 base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC), 568 base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
569 ecard_resource_len(ec, ECARD_RES_MEMC));
570 if (!base) 569 if (!base)
571 return -ENOMEM; 570 return -ENOMEM;
572 571
@@ -574,8 +573,8 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec)
574 573
575 ec->irqaddr = base + ICS_ARCIN_V5_INTRSTAT; 574 ec->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
576 ec->irqmask = 1; 575 ec->irqmask = 1;
577 ec->irq_data = state; 576
578 ec->ops = &icside_ops_arcin_v5; 577 ecard_setirq(ec, &icside_ops_arcin_v5, state);
579 578
580 /* 579 /*
581 * Be on the safe side - disable interrupts 580 * Be on the safe side - disable interrupts
@@ -583,10 +582,8 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec)
583 icside_irqdisable_arcin_v5(ec, 0); 582 icside_irqdisable_arcin_v5(ec, 0);
584 583
585 hwif = icside_setup(base, &icside_cardinfo_v5, ec); 584 hwif = icside_setup(base, &icside_cardinfo_v5, ec);
586 if (!hwif) { 585 if (!hwif)
587 iounmap(base);
588 return -ENODEV; 586 return -ENODEV;
589 }
590 587
591 state->hwif[0] = hwif; 588 state->hwif[0] = hwif;
592 589
@@ -605,8 +602,7 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
605 unsigned int sel = 0; 602 unsigned int sel = 0;
606 int ret; 603 int ret;
607 604
608 ioc_base = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), 605 ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
609 ecard_resource_len(ec, ECARD_RES_IOCFAST));
610 if (!ioc_base) { 606 if (!ioc_base) {
611 ret = -ENOMEM; 607 ret = -ENOMEM;
612 goto out; 608 goto out;
@@ -615,11 +611,10 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
615 easi_base = ioc_base; 611 easi_base = ioc_base;
616 612
617 if (ecard_resource_flags(ec, ECARD_RES_EASI)) { 613 if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
618 easi_base = ioremap(ecard_resource_start(ec, ECARD_RES_EASI), 614 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
619 ecard_resource_len(ec, ECARD_RES_EASI));
620 if (!easi_base) { 615 if (!easi_base) {
621 ret = -ENOMEM; 616 ret = -ENOMEM;
622 goto unmap_slot; 617 goto out;
623 } 618 }
624 619
625 /* 620 /*
@@ -630,8 +625,7 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
630 625
631 writeb(sel, ioc_base); 626 writeb(sel, ioc_base);
632 627
633 ec->irq_data = state; 628 ecard_setirq(ec, &icside_ops_arcin_v6, state);
634 ec->ops = &icside_ops_arcin_v6;
635 629
636 state->irq_port = easi_base; 630 state->irq_port = easi_base;
637 state->ioc_base = ioc_base; 631 state->ioc_base = ioc_base;
@@ -649,7 +643,7 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
649 643
650 if (!hwif || !mate) { 644 if (!hwif || !mate) {
651 ret = -ENODEV; 645 ret = -ENODEV;
652 goto unmap_port; 646 goto out;
653 } 647 }
654 648
655 state->hwif[0] = hwif; 649 state->hwif[0] = hwif;
@@ -686,11 +680,6 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
686 680
687 return 0; 681 return 0;
688 682
689 unmap_port:
690 if (easi_base != ioc_base)
691 iounmap(easi_base);
692 unmap_slot:
693 iounmap(ioc_base);
694 out: 683 out:
695 return ret; 684 return ret;
696} 685}
@@ -716,8 +705,7 @@ icside_probe(struct expansion_card *ec, const struct ecard_id *id)
716 state->type = ICS_TYPE_NOTYPE; 705 state->type = ICS_TYPE_NOTYPE;
717 state->dev = &ec->dev; 706 state->dev = &ec->dev;
718 707
719 idmem = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), 708 idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
720 ecard_resource_len(ec, ECARD_RES_IOCFAST));
721 if (idmem) { 709 if (idmem) {
722 unsigned int type; 710 unsigned int type;
723 711
@@ -725,7 +713,7 @@ icside_probe(struct expansion_card *ec, const struct ecard_id *id)
725 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1; 713 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
726 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2; 714 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
727 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3; 715 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
728 iounmap(idmem); 716 ecardm_iounmap(ec, idmem);
729 717
730 state->type = type; 718 state->type = type;
731 } 719 }
@@ -793,13 +781,6 @@ static void __devexit icside_remove(struct expansion_card *ec)
793 } 781 }
794 782
795 ecard_set_drvdata(ec, NULL); 783 ecard_set_drvdata(ec, NULL);
796 ec->ops = NULL;
797 ec->irq_data = NULL;
798
799 if (state->ioc_base)
800 iounmap(state->ioc_base);
801 if (state->ioc_base != state->irq_port)
802 iounmap(state->irq_port);
803 784
804 kfree(state); 785 kfree(state);
805 ecard_release_resources(ec); 786 ecard_release_resources(ec);
diff --git a/drivers/ide/arm/rapide.c b/drivers/ide/arm/rapide.c
index 890ea3fac3c6..83811af11610 100644
--- a/drivers/ide/arm/rapide.c
+++ b/drivers/ide/arm/rapide.c
@@ -63,8 +63,7 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id)
63 if (ret) 63 if (ret)
64 goto out; 64 goto out;
65 65
66 base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC), 66 base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
67 ecard_resource_len(ec, ECARD_RES_MEMC));
68 if (!base) { 67 if (!base) {
69 ret = -ENOMEM; 68 ret = -ENOMEM;
70 goto release; 69 goto release;
@@ -81,7 +80,6 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id)
81 goto out; 80 goto out;
82 } 81 }
83 82
84 iounmap(base);
85 release: 83 release:
86 ecard_release_resources(ec); 84 ecard_release_resources(ec);
87 out: 85 out:
@@ -96,7 +94,6 @@ static void __devexit rapide_remove(struct expansion_card *ec)
96 94
97 /* there must be a better way */ 95 /* there must be a better way */
98 ide_unregister(hwif - ide_hwifs); 96 ide_unregister(hwif - ide_hwifs);
99 iounmap(hwif->hwif_data);
100 ecard_release_resources(ec); 97 ecard_release_resources(ec);
101} 98}
102 99
diff --git a/drivers/net/arm/ether1.c b/drivers/net/arm/ether1.c
index f075cebe84ad..f21148e7b579 100644
--- a/drivers/net/arm/ether1.c
+++ b/drivers/net/arm/ether1.c
@@ -1014,8 +1014,7 @@ ether1_probe(struct expansion_card *ec, const struct ecard_id *id)
1014 SET_NETDEV_DEV(dev, &ec->dev); 1014 SET_NETDEV_DEV(dev, &ec->dev);
1015 1015
1016 dev->irq = ec->irq; 1016 dev->irq = ec->irq;
1017 priv(dev)->base = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), 1017 priv(dev)->base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
1018 ecard_resource_len(ec, ECARD_RES_IOCFAST));
1019 if (!priv(dev)->base) { 1018 if (!priv(dev)->base) {
1020 ret = -ENOMEM; 1019 ret = -ENOMEM;
1021 goto free; 1020 goto free;
@@ -1056,8 +1055,6 @@ ether1_probe(struct expansion_card *ec, const struct ecard_id *id)
1056 return 0; 1055 return 0;
1057 1056
1058 free: 1057 free:
1059 if (priv(dev)->base)
1060 iounmap(priv(dev)->base);
1061 free_netdev(dev); 1058 free_netdev(dev);
1062 release: 1059 release:
1063 ecard_release_resources(ec); 1060 ecard_release_resources(ec);
@@ -1072,7 +1069,6 @@ static void __devexit ether1_remove(struct expansion_card *ec)
1072 ecard_set_drvdata(ec, NULL); 1069 ecard_set_drvdata(ec, NULL);
1073 1070
1074 unregister_netdev(dev); 1071 unregister_netdev(dev);
1075 iounmap(priv(dev)->base);
1076 free_netdev(dev); 1072 free_netdev(dev);
1077 ecard_release_resources(ec); 1073 ecard_release_resources(ec);
1078} 1074}
diff --git a/drivers/net/arm/ether3.c b/drivers/net/arm/ether3.c
index 32da2eb9bcee..da713500654d 100644
--- a/drivers/net/arm/ether3.c
+++ b/drivers/net/arm/ether3.c
@@ -793,8 +793,7 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
793 SET_MODULE_OWNER(dev); 793 SET_MODULE_OWNER(dev);
794 SET_NETDEV_DEV(dev, &ec->dev); 794 SET_NETDEV_DEV(dev, &ec->dev);
795 795
796 priv(dev)->base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC), 796 priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
797 ecard_resource_len(ec, ECARD_RES_MEMC));
798 if (!priv(dev)->base) { 797 if (!priv(dev)->base) {
799 ret = -ENOMEM; 798 ret = -ENOMEM;
800 goto free; 799 goto free;
@@ -869,8 +868,6 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
869 return 0; 868 return 0;
870 869
871 free: 870 free:
872 if (priv(dev)->base)
873 iounmap(priv(dev)->base);
874 free_netdev(dev); 871 free_netdev(dev);
875 release: 872 release:
876 ecard_release_resources(ec); 873 ecard_release_resources(ec);
@@ -885,7 +882,6 @@ static void __devexit ether3_remove(struct expansion_card *ec)
885 ecard_set_drvdata(ec, NULL); 882 ecard_set_drvdata(ec, NULL);
886 883
887 unregister_netdev(dev); 884 unregister_netdev(dev);
888 iounmap(priv(dev)->base);
889 free_netdev(dev); 885 free_netdev(dev);
890 ecard_release_resources(ec); 886 ecard_release_resources(ec);
891} 887}
diff --git a/drivers/net/arm/etherh.c b/drivers/net/arm/etherh.c
index 61f574aa3a99..769ba69451f4 100644
--- a/drivers/net/arm/etherh.c
+++ b/drivers/net/arm/etherh.c
@@ -686,7 +686,7 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
686 eh->supported = data->supported; 686 eh->supported = data->supported;
687 eh->ctrl = 0; 687 eh->ctrl = 0;
688 eh->id = ec->cid.product; 688 eh->id = ec->cid.product;
689 eh->memc = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC), PAGE_SIZE); 689 eh->memc = ecardm_iomap(ec, ECARD_RES_MEMC, 0, PAGE_SIZE);
690 if (!eh->memc) { 690 if (!eh->memc) {
691 ret = -ENOMEM; 691 ret = -ENOMEM;
692 goto free; 692 goto free;
@@ -694,7 +694,7 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
694 694
695 eh->ctrl_port = eh->memc; 695 eh->ctrl_port = eh->memc;
696 if (data->ctrl_ioc) { 696 if (data->ctrl_ioc) {
697 eh->ioc_fast = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST), PAGE_SIZE); 697 eh->ioc_fast = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, PAGE_SIZE);
698 if (!eh->ioc_fast) { 698 if (!eh->ioc_fast) {
699 ret = -ENOMEM; 699 ret = -ENOMEM;
700 goto free; 700 goto free;
@@ -710,8 +710,7 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
710 * IRQ and control port handling - only for non-NIC slot cards. 710 * IRQ and control port handling - only for non-NIC slot cards.
711 */ 711 */
712 if (ec->slot_no != 8) { 712 if (ec->slot_no != 8) {
713 ec->ops = &etherh_ops; 713 ecard_setirq(ec, &etherh_ops, eh);
714 ec->irq_data = eh;
715 } else { 714 } else {
716 /* 715 /*
717 * If we're in the NIC slot, make sure the IRQ is enabled 716 * If we're in the NIC slot, make sure the IRQ is enabled
@@ -759,10 +758,6 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
759 return 0; 758 return 0;
760 759
761 free: 760 free:
762 if (eh->ioc_fast)
763 iounmap(eh->ioc_fast);
764 if (eh->memc)
765 iounmap(eh->memc);
766 free_netdev(dev); 761 free_netdev(dev);
767 release: 762 release:
768 ecard_release_resources(ec); 763 ecard_release_resources(ec);
@@ -773,16 +768,10 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
773static void __devexit etherh_remove(struct expansion_card *ec) 768static void __devexit etherh_remove(struct expansion_card *ec)
774{ 769{
775 struct net_device *dev = ecard_get_drvdata(ec); 770 struct net_device *dev = ecard_get_drvdata(ec);
776 struct etherh_priv *eh = etherh_priv(dev);
777 771
778 ecard_set_drvdata(ec, NULL); 772 ecard_set_drvdata(ec, NULL);
779 773
780 unregister_netdev(dev); 774 unregister_netdev(dev);
781 ec->ops = NULL;
782
783 if (eh->ioc_fast)
784 iounmap(eh->ioc_fast);
785 iounmap(eh->memc);
786 775
787 free_netdev(dev); 776 free_netdev(dev);
788 777
diff --git a/drivers/scsi/arm/arxescsi.c b/drivers/scsi/arm/arxescsi.c
index 7e132c5bacf8..2836fe248df9 100644
--- a/drivers/scsi/arm/arxescsi.c
+++ b/drivers/scsi/arm/arxescsi.c
@@ -281,7 +281,6 @@ arxescsi_probe(struct expansion_card *ec, const struct ecard_id *id)
281{ 281{
282 struct Scsi_Host *host; 282 struct Scsi_Host *host;
283 struct arxescsi_info *info; 283 struct arxescsi_info *info;
284 unsigned long resbase, reslen;
285 void __iomem *base; 284 void __iomem *base;
286 int ret; 285 int ret;
287 286
@@ -289,9 +288,7 @@ arxescsi_probe(struct expansion_card *ec, const struct ecard_id *id)
289 if (ret) 288 if (ret)
290 goto out; 289 goto out;
291 290
292 resbase = ecard_resource_start(ec, ECARD_RES_MEMC); 291 base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
293 reslen = ecard_resource_len(ec, ECARD_RES_MEMC);
294 base = ioremap(resbase, reslen);
295 if (!base) { 292 if (!base) {
296 ret = -ENOMEM; 293 ret = -ENOMEM;
297 goto out_region; 294 goto out_region;
@@ -300,7 +297,7 @@ arxescsi_probe(struct expansion_card *ec, const struct ecard_id *id)
300 host = scsi_host_alloc(&arxescsi_template, sizeof(struct arxescsi_info)); 297 host = scsi_host_alloc(&arxescsi_template, sizeof(struct arxescsi_info));
301 if (!host) { 298 if (!host) {
302 ret = -ENOMEM; 299 ret = -ENOMEM;
303 goto out_unmap; 300 goto out_region;
304 } 301 }
305 302
306 info = (struct arxescsi_info *)host->hostdata; 303 info = (struct arxescsi_info *)host->hostdata;
@@ -337,8 +334,6 @@ arxescsi_probe(struct expansion_card *ec, const struct ecard_id *id)
337 fas216_release(host); 334 fas216_release(host);
338 out_unregister: 335 out_unregister:
339 scsi_host_put(host); 336 scsi_host_put(host);
340 out_unmap:
341 iounmap(base);
342 out_region: 337 out_region:
343 ecard_release_resources(ec); 338 ecard_release_resources(ec);
344 out: 339 out:
@@ -348,13 +343,10 @@ arxescsi_probe(struct expansion_card *ec, const struct ecard_id *id)
348static void __devexit arxescsi_remove(struct expansion_card *ec) 343static void __devexit arxescsi_remove(struct expansion_card *ec)
349{ 344{
350 struct Scsi_Host *host = ecard_get_drvdata(ec); 345 struct Scsi_Host *host = ecard_get_drvdata(ec);
351 struct arxescsi_info *info = (struct arxescsi_info *)host->hostdata;
352 346
353 ecard_set_drvdata(ec, NULL); 347 ecard_set_drvdata(ec, NULL);
354 fas216_remove(host); 348 fas216_remove(host);
355 349
356 iounmap(info->base);
357
358 fas216_release(host); 350 fas216_release(host);
359 scsi_host_put(host); 351 scsi_host_put(host);
360 ecard_release_resources(ec); 352 ecard_release_resources(ec);
diff --git a/drivers/scsi/arm/cumana_2.c b/drivers/scsi/arm/cumana_2.c
index 82add77ad131..68a64123af8f 100644
--- a/drivers/scsi/arm/cumana_2.c
+++ b/drivers/scsi/arm/cumana_2.c
@@ -401,7 +401,6 @@ cumanascsi2_probe(struct expansion_card *ec, const struct ecard_id *id)
401{ 401{
402 struct Scsi_Host *host; 402 struct Scsi_Host *host;
403 struct cumanascsi2_info *info; 403 struct cumanascsi2_info *info;
404 unsigned long resbase, reslen;
405 void __iomem *base; 404 void __iomem *base;
406 int ret; 405 int ret;
407 406
@@ -409,9 +408,7 @@ cumanascsi2_probe(struct expansion_card *ec, const struct ecard_id *id)
409 if (ret) 408 if (ret)
410 goto out; 409 goto out;
411 410
412 resbase = ecard_resource_start(ec, ECARD_RES_MEMC); 411 base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
413 reslen = ecard_resource_len(ec, ECARD_RES_MEMC);
414 base = ioremap(resbase, reslen);
415 if (!base) { 412 if (!base) {
416 ret = -ENOMEM; 413 ret = -ENOMEM;
417 goto out_region; 414 goto out_region;
@@ -421,7 +418,7 @@ cumanascsi2_probe(struct expansion_card *ec, const struct ecard_id *id)
421 sizeof(struct cumanascsi2_info)); 418 sizeof(struct cumanascsi2_info));
422 if (!host) { 419 if (!host) {
423 ret = -ENOMEM; 420 ret = -ENOMEM;
424 goto out_unmap; 421 goto out_region;
425 } 422 }
426 423
427 ecard_set_drvdata(ec, host); 424 ecard_set_drvdata(ec, host);
@@ -450,8 +447,8 @@ cumanascsi2_probe(struct expansion_card *ec, const struct ecard_id *id)
450 447
451 ec->irqaddr = info->base + CUMANASCSI2_STATUS; 448 ec->irqaddr = info->base + CUMANASCSI2_STATUS;
452 ec->irqmask = STATUS_INT; 449 ec->irqmask = STATUS_INT;
453 ec->irq_data = info; 450
454 ec->ops = &cumanascsi_2_ops; 451 ecard_setirq(ec, &cumanascsi_2_ops, info);
455 452
456 ret = fas216_init(host); 453 ret = fas216_init(host);
457 if (ret) 454 if (ret)
@@ -490,9 +487,6 @@ cumanascsi2_probe(struct expansion_card *ec, const struct ecard_id *id)
490 out_free: 487 out_free:
491 scsi_host_put(host); 488 scsi_host_put(host);
492 489
493 out_unmap:
494 iounmap(base);
495
496 out_region: 490 out_region:
497 ecard_release_resources(ec); 491 ecard_release_resources(ec);
498 492
@@ -512,8 +506,6 @@ static void __devexit cumanascsi2_remove(struct expansion_card *ec)
512 free_dma(info->info.scsi.dma); 506 free_dma(info->info.scsi.dma);
513 free_irq(ec->irq, info); 507 free_irq(ec->irq, info);
514 508
515 iounmap(info->base);
516
517 fas216_release(host); 509 fas216_release(host);
518 scsi_host_put(host); 510 scsi_host_put(host);
519 ecard_release_resources(ec); 511 ecard_release_resources(ec);
diff --git a/drivers/scsi/arm/eesox.c b/drivers/scsi/arm/eesox.c
index ed06a8c19ad6..bb2477b3fb0b 100644
--- a/drivers/scsi/arm/eesox.c
+++ b/drivers/scsi/arm/eesox.c
@@ -519,7 +519,6 @@ eesoxscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
519{ 519{
520 struct Scsi_Host *host; 520 struct Scsi_Host *host;
521 struct eesoxscsi_info *info; 521 struct eesoxscsi_info *info;
522 unsigned long resbase, reslen;
523 void __iomem *base; 522 void __iomem *base;
524 int ret; 523 int ret;
525 524
@@ -527,9 +526,7 @@ eesoxscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
527 if (ret) 526 if (ret)
528 goto out; 527 goto out;
529 528
530 resbase = ecard_resource_start(ec, ECARD_RES_IOCFAST); 529 base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
531 reslen = ecard_resource_len(ec, ECARD_RES_IOCFAST);
532 base = ioremap(resbase, reslen);
533 if (!base) { 530 if (!base) {
534 ret = -ENOMEM; 531 ret = -ENOMEM;
535 goto out_region; 532 goto out_region;
@@ -539,7 +536,7 @@ eesoxscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
539 sizeof(struct eesoxscsi_info)); 536 sizeof(struct eesoxscsi_info));
540 if (!host) { 537 if (!host) {
541 ret = -ENOMEM; 538 ret = -ENOMEM;
542 goto out_unmap; 539 goto out_region;
543 } 540 }
544 541
545 ecard_set_drvdata(ec, host); 542 ecard_set_drvdata(ec, host);
@@ -569,8 +566,8 @@ eesoxscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
569 566
570 ec->irqaddr = base + EESOX_DMASTAT; 567 ec->irqaddr = base + EESOX_DMASTAT;
571 ec->irqmask = EESOX_STAT_INTR; 568 ec->irqmask = EESOX_STAT_INTR;
572 ec->irq_data = info; 569
573 ec->ops = &eesoxscsi_ops; 570 ecard_setirq(ec, &eesoxscsi_ops, info);
574 571
575 device_create_file(&ec->dev, &dev_attr_bus_term); 572 device_create_file(&ec->dev, &dev_attr_bus_term);
576 573
@@ -612,9 +609,6 @@ eesoxscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
612 device_remove_file(&ec->dev, &dev_attr_bus_term); 609 device_remove_file(&ec->dev, &dev_attr_bus_term);
613 scsi_host_put(host); 610 scsi_host_put(host);
614 611
615 out_unmap:
616 iounmap(base);
617
618 out_region: 612 out_region:
619 ecard_release_resources(ec); 613 ecard_release_resources(ec);
620 614
@@ -636,8 +630,6 @@ static void __devexit eesoxscsi_remove(struct expansion_card *ec)
636 630
637 device_remove_file(&ec->dev, &dev_attr_bus_term); 631 device_remove_file(&ec->dev, &dev_attr_bus_term);
638 632
639 iounmap(info->base);
640
641 fas216_release(host); 633 fas216_release(host);
642 scsi_host_put(host); 634 scsi_host_put(host);
643 ecard_release_resources(ec); 635 ecard_release_resources(ec);
diff --git a/drivers/scsi/arm/powertec.c b/drivers/scsi/arm/powertec.c
index 159047a34997..d9a546d1917c 100644
--- a/drivers/scsi/arm/powertec.c
+++ b/drivers/scsi/arm/powertec.c
@@ -313,7 +313,6 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
313{ 313{
314 struct Scsi_Host *host; 314 struct Scsi_Host *host;
315 struct powertec_info *info; 315 struct powertec_info *info;
316 unsigned long resbase, reslen;
317 void __iomem *base; 316 void __iomem *base;
318 int ret; 317 int ret;
319 318
@@ -321,9 +320,7 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
321 if (ret) 320 if (ret)
322 goto out; 321 goto out;
323 322
324 resbase = ecard_resource_start(ec, ECARD_RES_IOCFAST); 323 base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
325 reslen = ecard_resource_len(ec, ECARD_RES_IOCFAST);
326 base = ioremap(resbase, reslen);
327 if (!base) { 324 if (!base) {
328 ret = -ENOMEM; 325 ret = -ENOMEM;
329 goto out_region; 326 goto out_region;
@@ -333,7 +330,7 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
333 sizeof (struct powertec_info)); 330 sizeof (struct powertec_info));
334 if (!host) { 331 if (!host) {
335 ret = -ENOMEM; 332 ret = -ENOMEM;
336 goto out_unmap; 333 goto out_region;
337 } 334 }
338 335
339 ecard_set_drvdata(ec, host); 336 ecard_set_drvdata(ec, host);
@@ -361,8 +358,8 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
361 358
362 ec->irqaddr = base + POWERTEC_INTR_STATUS; 359 ec->irqaddr = base + POWERTEC_INTR_STATUS;
363 ec->irqmask = POWERTEC_INTR_BIT; 360 ec->irqmask = POWERTEC_INTR_BIT;
364 ec->irq_data = info; 361
365 ec->ops = &powertecscsi_ops; 362 ecard_setirq(ec, &powertecscsi_ops, info);
366 363
367 device_create_file(&ec->dev, &dev_attr_bus_term); 364 device_create_file(&ec->dev, &dev_attr_bus_term);
368 365
@@ -404,9 +401,6 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
404 device_remove_file(&ec->dev, &dev_attr_bus_term); 401 device_remove_file(&ec->dev, &dev_attr_bus_term);
405 scsi_host_put(host); 402 scsi_host_put(host);
406 403
407 out_unmap:
408 iounmap(base);
409
410 out_region: 404 out_region:
411 ecard_release_resources(ec); 405 ecard_release_resources(ec);
412 406
@@ -428,8 +422,6 @@ static void __devexit powertecscsi_remove(struct expansion_card *ec)
428 free_dma(info->info.scsi.dma); 422 free_dma(info->info.scsi.dma);
429 free_irq(ec->irq, info); 423 free_irq(ec->irq, info);
430 424
431 iounmap(info->base);
432
433 fas216_release(host); 425 fas216_release(host);
434 scsi_host_put(host); 426 scsi_host_put(host);
435 ecard_release_resources(ec); 427 ecard_release_resources(ec);
diff --git a/drivers/serial/8250_acorn.c b/drivers/serial/8250_acorn.c
index 562ba745a044..b0ce8c56f1a4 100644
--- a/drivers/serial/8250_acorn.c
+++ b/drivers/serial/8250_acorn.c
@@ -54,7 +54,7 @@ serial_card_probe(struct expansion_card *ec, const struct ecard_id *id)
54 info->num_ports = type->num_ports; 54 info->num_ports = type->num_ports;
55 55
56 bus_addr = ecard_resource_start(ec, type->type); 56 bus_addr = ecard_resource_start(ec, type->type);
57 info->vaddr = ioremap(bus_addr, ecard_resource_len(ec, type->type)); 57 info->vaddr = ecardm_iomap(ec, type->type, 0, 0);
58 if (!info->vaddr) { 58 if (!info->vaddr) {
59 kfree(info); 59 kfree(info);
60 return -ENOMEM; 60 return -ENOMEM;
@@ -91,7 +91,6 @@ static void __devexit serial_card_remove(struct expansion_card *ec)
91 if (info->ports[i] > 0) 91 if (info->ports[i] > 0)
92 serial8250_unregister_port(info->ports[i]); 92 serial8250_unregister_port(info->ports[i]);
93 93
94 iounmap(info->vaddr);
95 kfree(info); 94 kfree(info);
96} 95}
97 96
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a6f5bfbb777b..315ea9916456 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -359,6 +359,23 @@ config SERIAL_ATMEL_TTYAT
359 359
360 Say Y if you have an external 8250/16C550 UART. If unsure, say N. 360 Say Y if you have an external 8250/16C550 UART. If unsure, say N.
361 361
362config SERIAL_KS8695
363 bool "Micrel KS8695 (Centaur) serial port support"
364 depends on ARCH_KS8695
365 select SERIAL_CORE
366 help
367 This selects the Micrel Centaur KS8695 UART. Say Y here.
368
369config SERIAL_KS8695_CONSOLE
370 bool "Support for console on KS8695 (Centaur) serial port"
371 depends on SERIAL_KS8695=y
372 select SERIAL_CORE_CONSOLE
373 help
374 Say Y here if you wish to use a KS8695 (Centaur) UART as the
375 system console (the system console is the device which
376 receives all kernel messages and warnings and which allows
377 logins in single user mode).
378
362config SERIAL_CLPS711X 379config SERIAL_CLPS711X
363 tristate "CLPS711X serial port support" 380 tristate "CLPS711X serial port support"
364 depends on ARM && ARCH_CLPS711X 381 depends on ARM && ARCH_CLPS711X
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 4959bcb8d1ef..08ad0d978183 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
61obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o 61obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
62obj-$(CONFIG_SERIAL_NETX) += netx-serial.o 62obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
63obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o 63obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
64obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c
new file mode 100644
index 000000000000..c5346d677315
--- /dev/null
+++ b/drivers/serial/serial_ks8695.c
@@ -0,0 +1,657 @@
1/*
2 * drivers/serial/serial_ks8695.c
3 *
4 * Driver for KS8695 serial ports
5 *
6 * Based on drivers/serial/serial_amba.c, by Kam Lee.
7 *
8 * Copyright 2002-2005 Micrel Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 */
16#include <linux/module.h>
17#include <linux/tty.h>
18#include <linux/ioport.h>
19#include <linux/init.h>
20#include <linux/serial.h>
21#include <linux/console.h>
22#include <linux/sysrq.h>
23#include <linux/device.h>
24
25#include <asm/io.h>
26#include <asm/irq.h>
27#include <asm/mach/irq.h>
28
29#include <asm/arch/regs-uart.h>
30#include <asm/arch/regs-irq.h>
31
32#if defined(CONFIG_SERIAL_KS8695_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33#define SUPPORT_SYSRQ
34#endif
35
36#include <linux/serial_core.h>
37
38
39#define SERIAL_KS8695_MAJOR 204
40#define SERIAL_KS8695_MINOR 16
41#define SERIAL_KS8695_DEVNAME "ttyAM"
42
43#define SERIAL_KS8695_NR 1
44
45/*
46 * Access macros for the KS8695 UART
47 */
48#define UART_GET_CHAR(p) (__raw_readl((p)->membase + KS8695_URRB) & 0xFF)
49#define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + KS8695_URTH)
50#define UART_GET_FCR(p) __raw_readl((p)->membase + KS8695_URFC)
51#define UART_PUT_FCR(p, c) __raw_writel((c), (p)->membase + KS8695_URFC)
52#define UART_GET_MSR(p) __raw_readl((p)->membase + KS8695_URMS)
53#define UART_GET_LSR(p) __raw_readl((p)->membase + KS8695_URLS)
54#define UART_GET_LCR(p) __raw_readl((p)->membase + KS8695_URLC)
55#define UART_PUT_LCR(p, c) __raw_writel((c), (p)->membase + KS8695_URLC)
56#define UART_GET_MCR(p) __raw_readl((p)->membase + KS8695_URMC)
57#define UART_PUT_MCR(p, c) __raw_writel((c), (p)->membase + KS8695_URMC)
58#define UART_GET_BRDR(p) __raw_readl((p)->membase + KS8695_URBD)
59#define UART_PUT_BRDR(p, c) __raw_writel((c), (p)->membase + KS8695_URBD)
60
61#define KS8695_CLR_TX_INT() __raw_writel(1 << KS8695_IRQ_UART_TX, KS8695_IRQ_VA + KS8695_INTST)
62
63#define UART_DUMMY_LSR_RX 0x100
64#define UART_PORT_SIZE (KS8695_USR - KS8695_URRB + 4)
65
66#define tx_enabled(port) ((port)->unused[0])
67#define rx_enabled(port) ((port)->unused[1])
68
69
70#ifdef SUPPORT_SYSRQ
71static struct console ks8695_console;
72#endif
73
74static void ks8695uart_stop_tx(struct uart_port *port)
75{
76 if (tx_enabled(port)) {
77 disable_irq(KS8695_IRQ_UART_TX);
78 tx_enabled(port) = 0;
79 }
80}
81
82static void ks8695uart_start_tx(struct uart_port *port)
83{
84 if (!tx_enabled(port)) {
85 enable_irq(KS8695_IRQ_UART_TX);
86 tx_enabled(port) = 1;
87 }
88}
89
90static void ks8695uart_stop_rx(struct uart_port *port)
91{
92 if (rx_enabled(port)) {
93 disable_irq(KS8695_IRQ_UART_RX);
94 rx_enabled(port) = 0;
95 }
96}
97
98static void ks8695uart_enable_ms(struct uart_port *port)
99{
100 enable_irq(KS8695_IRQ_UART_MODEM_STATUS);
101}
102
103static void ks8695uart_disable_ms(struct uart_port *port)
104{
105 disable_irq(KS8695_IRQ_UART_MODEM_STATUS);
106}
107
108static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id)
109{
110 struct uart_port *port = dev_id;
111 struct tty_struct *tty = port->info->tty;
112 unsigned int status, ch, lsr, flg, max_count = 256;
113
114 status = UART_GET_LSR(port); /* clears pending LSR interrupts */
115 while ((status & URLS_URDR) && max_count--) {
116 ch = UART_GET_CHAR(port);
117 flg = TTY_NORMAL;
118
119 port->icount.rx++;
120
121 /*
122 * Note that the error handling code is
123 * out of the main execution path
124 */
125 lsr = UART_GET_LSR(port) | UART_DUMMY_LSR_RX;
126 if (unlikely(lsr & (URLS_URBI | URLS_URPE | URLS_URFE | URLS_URROE))) {
127 if (lsr & URLS_URBI) {
128 lsr &= ~(URLS_URFE | URLS_URPE);
129 port->icount.brk++;
130 if (uart_handle_break(port))
131 goto ignore_char;
132 }
133 if (lsr & URLS_URPE)
134 port->icount.parity++;
135 if (lsr & URLS_URFE)
136 port->icount.frame++;
137 if (lsr & URLS_URROE)
138 port->icount.overrun++;
139
140 lsr &= port->read_status_mask;
141
142 if (lsr & URLS_URBI)
143 flg = TTY_BREAK;
144 else if (lsr & URLS_URPE)
145 flg = TTY_PARITY;
146 else if (lsr & URLS_URFE)
147 flg = TTY_FRAME;
148 }
149
150 if (uart_handle_sysrq_char(port, ch))
151 goto ignore_char;
152
153 uart_insert_char(port, lsr, URLS_URROE, ch, flg);
154
155ignore_char:
156 status = UART_GET_LSR(port);
157 }
158 tty_flip_buffer_push(tty);
159
160 return IRQ_HANDLED;
161}
162
163
164static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id)
165{
166 struct uart_port *port = dev_id;
167 struct circ_buf *xmit = &port->info->xmit;
168 unsigned int count;
169
170 if (port->x_char) {
171 KS8695_CLR_TX_INT();
172 UART_PUT_CHAR(port, port->x_char);
173 port->icount.tx++;
174 port->x_char = 0;
175 return IRQ_HANDLED;
176 }
177
178 if (uart_tx_stopped(port) || uart_circ_empty(xmit)) {
179 ks8695uart_stop_tx(port);
180 return IRQ_HANDLED;
181 }
182
183 count = 16; /* fifo size */
184 while (!uart_circ_empty(xmit) && (count-- > 0)) {
185 KS8695_CLR_TX_INT();
186 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
187
188 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
189 port->icount.tx++;
190 }
191
192 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
193 uart_write_wakeup(port);
194
195 if (uart_circ_empty(xmit))
196 ks8695uart_stop_tx(port);
197
198 return IRQ_HANDLED;
199}
200
201static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id)
202{
203 struct uart_port *port = dev_id;
204 unsigned int status;
205
206 /*
207 * clear modem interrupt by reading MSR
208 */
209 status = UART_GET_MSR(port);
210
211 if (status & URMS_URDDCD)
212 uart_handle_dcd_change(port, status & URMS_URDDCD);
213
214 if (status & URMS_URDDST)
215 port->icount.dsr++;
216
217 if (status & URMS_URDCTS)
218 uart_handle_cts_change(port, status & URMS_URDCTS);
219
220 if (status & URMS_URTERI)
221 port->icount.rng++;
222
223 wake_up_interruptible(&port->info->delta_msr_wait);
224
225 return IRQ_HANDLED;
226}
227
228static unsigned int ks8695uart_tx_empty(struct uart_port *port)
229{
230 return (UART_GET_LSR(port) & URLS_URTE) ? TIOCSER_TEMT : 0;
231}
232
233static unsigned int ks8695uart_get_mctrl(struct uart_port *port)
234{
235 unsigned int result = 0;
236 unsigned int status;
237
238 status = UART_GET_MSR(port);
239 if (status & URMS_URDCD)
240 result |= TIOCM_CAR;
241 if (status & URMS_URDSR)
242 result |= TIOCM_DSR;
243 if (status & URMS_URCTS)
244 result |= TIOCM_CTS;
245 if (status & URMS_URRI)
246 result |= TIOCM_RI;
247
248 return result;
249}
250
251static void ks8695uart_set_mctrl(struct uart_port *port, u_int mctrl)
252{
253 unsigned int mcr;
254
255 mcr = UART_GET_MCR(port);
256 if (mctrl & TIOCM_RTS)
257 mcr |= URMC_URRTS;
258 else
259 mcr &= ~URMC_URRTS;
260
261 if (mctrl & TIOCM_DTR)
262 mcr |= URMC_URDTR;
263 else
264 mcr &= ~URMC_URDTR;
265
266 UART_PUT_MCR(port, mcr);
267}
268
269static void ks8695uart_break_ctl(struct uart_port *port, int break_state)
270{
271 unsigned int lcr;
272
273 lcr = UART_GET_LCR(port);
274
275 if (break_state == -1)
276 lcr |= URLC_URSBC;
277 else
278 lcr &= ~URLC_URSBC;
279
280 UART_PUT_LCR(port, lcr);
281}
282
283static int ks8695uart_startup(struct uart_port *port)
284{
285 int retval;
286
287 set_irq_flags(KS8695_IRQ_UART_TX, IRQF_VALID | IRQF_NOAUTOEN);
288 tx_enabled(port) = 0;
289 rx_enabled(port) = 1;
290
291 /*
292 * Allocate the IRQ
293 */
294 retval = request_irq(KS8695_IRQ_UART_TX, ks8695uart_tx_chars, IRQF_DISABLED, "UART TX", port);
295 if (retval)
296 goto err_tx;
297
298 retval = request_irq(KS8695_IRQ_UART_RX, ks8695uart_rx_chars, IRQF_DISABLED, "UART RX", port);
299 if (retval)
300 goto err_rx;
301
302 retval = request_irq(KS8695_IRQ_UART_LINE_STATUS, ks8695uart_rx_chars, IRQF_DISABLED, "UART LineStatus", port);
303 if (retval)
304 return err_ls;
305
306 retval = request_irq(KS8695_IRQ_UART_MODEM_STATUS, ks8695uart_modem_status, IRQF_DISABLED, "UART ModemStatus", port);
307 if (retval)
308 return err_ms;
309
310 return 0;
311
312err_ms:
313 free_irq(KS8695_IRQ_UART_LINE_STATUS, port);
314err_ls:
315 free_irq(KS8695_IRQ_UART_RX, port);
316err_rx:
317 free_irq(KS8695_IRQ_UART_TX, port);
318err_tx:
319 return retval;
320}
321
322static void ks8695uart_shutdown(struct uart_port *port)
323{
324 /*
325 * Free the interrupt
326 */
327 free_irq(KS8695_IRQ_UART_RX, port);
328 free_irq(KS8695_IRQ_UART_TX, port);
329 free_irq(KS8695_IRQ_UART_MODEM_STATUS, port);
330 free_irq(KS8695_IRQ_UART_LINE_STATUS, port);
331
332 /* disable break condition and fifos */
333 UART_PUT_LCR(port, UART_GET_LCR(port) & ~URLC_URSBC);
334 UART_PUT_FCR(port, UART_GET_FCR(port) & ~URFC_URFE);
335}
336
337static void ks8695uart_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old)
338{
339 unsigned int lcr, fcr = 0;
340 unsigned long flags;
341 unsigned int baud, quot;
342
343 /*
344 * Ask the core to calculate the divisor for us.
345 */
346 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
347 quot = uart_get_divisor(port, baud);
348
349 switch (termios->c_cflag & CSIZE) {
350 case CS5:
351 lcr = URCL_5;
352 break;
353 case CS6:
354 lcr = URCL_6;
355 break;
356 case CS7:
357 lcr = URCL_7;
358 break;
359 default:
360 lcr = URCL_8;
361 break;
362 }
363
364 /* stop bits */
365 if (termios->c_cflag & CSTOPB)
366 lcr |= URLC_URSB;
367
368 /* parity */
369 if (termios->c_cflag & PARENB) {
370 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
371 if (termios->c_cflag & PARODD)
372 lcr |= URPE_MARK;
373 else
374 lcr |= URPE_SPACE;
375 }
376 else if (termios->c_cflag & PARODD)
377 lcr |= URPE_ODD;
378 else
379 lcr |= URPE_EVEN;
380 }
381
382 if (port->fifosize > 1)
383 fcr = URFC_URFRT_8 | URFC_URTFR | URFC_URRFR | URFC_URFE;
384
385 spin_lock_irqsave(&port->lock, flags);
386
387 /*
388 * Update the per-port timeout.
389 */
390 uart_update_timeout(port, termios->c_cflag, baud);
391
392 port->read_status_mask = URLS_URROE;
393 if (termios->c_iflag & INPCK)
394 port->read_status_mask |= (URLS_URFE | URLS_URPE);
395 if (termios->c_iflag & (BRKINT | PARMRK))
396 port->read_status_mask |= URLS_URBI;
397
398 /*
399 * Characters to ignore
400 */
401 port->ignore_status_mask = 0;
402 if (termios->c_iflag & IGNPAR)
403 port->ignore_status_mask |= (URLS_URFE | URLS_URPE);
404 if (termios->c_iflag & IGNBRK) {
405 port->ignore_status_mask |= URLS_URBI;
406 /*
407 * If we're ignoring parity and break indicators,
408 * ignore overruns too (for real raw support).
409 */
410 if (termios->c_iflag & IGNPAR)
411 port->ignore_status_mask |= URLS_URROE;
412 }
413
414 /*
415 * Ignore all characters if CREAD is not set.
416 */
417 if ((termios->c_cflag & CREAD) == 0)
418 port->ignore_status_mask |= UART_DUMMY_LSR_RX;
419
420 /* first, disable everything */
421 if (UART_ENABLE_MS(port, termios->c_cflag))
422 ks8695uart_enable_ms(port);
423 else
424 ks8695uart_disable_ms(port);
425
426 /* Set baud rate */
427 UART_PUT_BRDR(port, quot);
428
429 UART_PUT_LCR(port, lcr);
430 UART_PUT_FCR(port, fcr);
431
432 spin_unlock_irqrestore(&port->lock, flags);
433}
434
435static const char *ks8695uart_type(struct uart_port *port)
436{
437 return port->type == PORT_KS8695 ? "KS8695" : NULL;
438}
439
440/*
441 * Release the memory region(s) being used by 'port'
442 */
443static void ks8695uart_release_port(struct uart_port *port)
444{
445 release_mem_region(port->mapbase, UART_PORT_SIZE);
446}
447
448/*
449 * Request the memory region(s) being used by 'port'
450 */
451static int ks8695uart_request_port(struct uart_port *port)
452{
453 return request_mem_region(port->mapbase, UART_PORT_SIZE,
454 "serial_ks8695") != NULL ? 0 : -EBUSY;
455}
456
457/*
458 * Configure/autoconfigure the port.
459 */
460static void ks8695uart_config_port(struct uart_port *port, int flags)
461{
462 if (flags & UART_CONFIG_TYPE) {
463 port->type = PORT_KS8695;
464 ks8695uart_request_port(port);
465 }
466}
467
468/*
469 * verify the new serial_struct (for TIOCSSERIAL).
470 */
471static int ks8695uart_verify_port(struct uart_port *port, struct serial_struct *ser)
472{
473 int ret = 0;
474
475 if (ser->type != PORT_UNKNOWN && ser->type != PORT_KS8695)
476 ret = -EINVAL;
477 if (ser->irq != port->irq)
478 ret = -EINVAL;
479 if (ser->baud_base < 9600)
480 ret = -EINVAL;
481 return ret;
482}
483
484static struct uart_ops ks8695uart_pops = {
485 .tx_empty = ks8695uart_tx_empty,
486 .set_mctrl = ks8695uart_set_mctrl,
487 .get_mctrl = ks8695uart_get_mctrl,
488 .stop_tx = ks8695uart_stop_tx,
489 .start_tx = ks8695uart_start_tx,
490 .stop_rx = ks8695uart_stop_rx,
491 .enable_ms = ks8695uart_enable_ms,
492 .break_ctl = ks8695uart_break_ctl,
493 .startup = ks8695uart_startup,
494 .shutdown = ks8695uart_shutdown,
495 .set_termios = ks8695uart_set_termios,
496 .type = ks8695uart_type,
497 .release_port = ks8695uart_release_port,
498 .request_port = ks8695uart_request_port,
499 .config_port = ks8695uart_config_port,
500 .verify_port = ks8695uart_verify_port,
501};
502
503static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = {
504 {
505 .membase = (void *) KS8695_UART_VA,
506 .mapbase = KS8695_UART_VA,
507 .iotype = SERIAL_IO_MEM,
508 .irq = KS8695_IRQ_UART_TX,
509 .uartclk = CLOCK_TICK_RATE * 16,
510 .fifosize = 16,
511 .ops = &ks8695uart_pops,
512 .flags = ASYNC_BOOT_AUTOCONF,
513 .line = 0,
514 }
515};
516
517#ifdef CONFIG_SERIAL_KS8695_CONSOLE
518static void ks8695_console_putchar(struct uart_port *port, int ch)
519{
520 while (!(UART_GET_LSR(port) & URLS_URTHRE))
521 barrier();
522
523 UART_PUT_CHAR(port, ch);
524}
525
526static void ks8695_console_write(struct console *co, const char *s, u_int count)
527{
528 struct uart_port *port = ks8695uart_ports + co->index;
529
530 uart_console_write(port, s, count, ks8695_console_putchar);
531}
532
533static void __init ks8695_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
534{
535 unsigned int lcr;
536
537 lcr = UART_GET_LCR(port);
538
539 switch (lcr & URLC_PARITY) {
540 case URPE_ODD:
541 *parity = 'o';
542 break;
543 case URPE_EVEN:
544 *parity = 'e';
545 break;
546 default:
547 *parity = 'n';
548 }
549
550 switch (lcr & URLC_URCL) {
551 case URCL_5:
552 *bits = 5;
553 break;
554 case URCL_6:
555 *bits = 6;
556 break;
557 case URCL_7:
558 *bits = 7;
559 break;
560 default:
561 *bits = 8;
562 }
563
564 *baud = port->uartclk / (UART_GET_BRDR(port) & 0x0FFF);
565 *baud /= 16;
566 *baud &= 0xFFFFFFF0;
567}
568
569static int __init ks8695_console_setup(struct console *co, char *options)
570{
571 struct uart_port *port;
572 int baud = 115200;
573 int bits = 8;
574 int parity = 'n';
575 int flow = 'n';
576
577 /*
578 * Check whether an invalid uart number has been specified, and
579 * if so, search for the first available port that does have
580 * console support.
581 */
582 port = uart_get_console(ks8695uart_ports, SERIAL_KS8695_NR, co);
583
584 if (options)
585 uart_parse_options(options, &baud, &parity, &bits, &flow);
586 else
587 ks8695_console_get_options(port, &baud, &parity, &bits);
588
589 return uart_set_options(port, co, baud, parity, bits, flow);
590}
591
592extern struct uart_driver ks8695_reg;
593
594static struct console ks8695_console = {
595 .name = SERIAL_KS8695_DEVNAME,
596 .write = ks8695_console_write,
597 .device = uart_console_device,
598 .setup = ks8695_console_setup,
599 .flags = CON_PRINTBUFFER,
600 .index = -1,
601 .data = &ks8695_reg,
602};
603
604static int __init ks8695_console_init(void)
605{
606 register_console(&ks8695_console);
607 return 0;
608}
609
610console_initcall(ks8695_console_init);
611
612#define KS8695_CONSOLE &ks8695_console
613#else
614#define KS8695_CONSOLE NULL
615#endif
616
617static struct uart_driver ks8695_reg = {
618 .owner = THIS_MODULE,
619 .driver_name = "serial_ks8695",
620 .dev_name = SERIAL_KS8695_DEVNAME,
621 .major = SERIAL_KS8695_MAJOR,
622 .minor = SERIAL_KS8695_MINOR,
623 .nr = SERIAL_KS8695_NR,
624 .cons = KS8695_CONSOLE,
625};
626
627static int __init ks8695uart_init(void)
628{
629 int i, ret;
630
631 printk(KERN_INFO "Serial: Micrel KS8695 UART driver\n");
632
633 ret = uart_register_driver(&ks8695_reg);
634 if (ret)
635 return ret;
636
637 for (i = 0; i < SERIAL_KS8695_NR; i++)
638 uart_add_one_port(&ks8695_reg, &ks8695uart_ports[0]);
639
640 return 0;
641}
642
643static void __exit ks8695uart_exit(void)
644{
645 int i;
646
647 for (i = 0; i < SERIAL_KS8695_NR; i++)
648 uart_remove_one_port(&ks8695_reg, &ks8695uart_ports[0]);
649 uart_unregister_driver(&ks8695_reg);
650}
651
652module_init(ks8695uart_init);
653module_exit(ks8695uart_exit);
654
655MODULE_DESCRIPTION("KS8695 serial port driver");
656MODULE_AUTHOR("Micrel Inc.");
657MODULE_LICENSE("GPL");
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 8065f2b53701..f771a7cae9ec 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -210,7 +210,7 @@ config USB_OTG
210 210
211config USB_GADGET_AT91 211config USB_GADGET_AT91
212 boolean "AT91 USB Device Port" 212 boolean "AT91 USB Device Port"
213 depends on ARCH_AT91 213 depends on ARCH_AT91 && !ARCH_AT91SAM9RL
214 select USB_GADGET_SELECTED 214 select USB_GADGET_SELECTED
215 help 215 help
216 Many Atmel AT91 processors (such as the AT91RM2000) have a 216 Many Atmel AT91 processors (such as the AT91RM2000) have a
diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h
new file mode 100644
index 000000000000..8a9708a370c6
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91sam9rl.h
@@ -0,0 +1,110 @@
1/*
2 * include/asm-arm/arch-at91/at91sam9260.h
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * Common definitions.
7 * Based on AT91SAM9RL datasheet revision A. (Preliminary)
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive for
11 * more details.
12 */
13
14#ifndef AT91SAM9RL_H
15#define AT91SAM9RL_H
16
17/*
18 * Peripheral identifiers/interrupts.
19 */
20#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
21#define AT91_ID_SYS 1 /* System Controller */
22#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */
23#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */
24#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */
25#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */
26#define AT91SAM9RL_ID_US0 6 /* USART 0 */
27#define AT91SAM9RL_ID_US1 7 /* USART 1 */
28#define AT91SAM9RL_ID_US2 8 /* USART 2 */
29#define AT91SAM9RL_ID_US3 9 /* USART 3 */
30#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */
31#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */
32#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */
33#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */
34#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */
35#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */
36#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */
37#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */
38#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */
39#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */
40#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */
41#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */
42#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */
43#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */
44#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */
45#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */
46
47
48/*
49 * User Peripheral physical base addresses.
50 */
51#define AT91SAM9RL_BASE_TCB0 0xfffa0000
52#define AT91SAM9RL_BASE_TC0 0xfffa0000
53#define AT91SAM9RL_BASE_TC1 0xfffa0040
54#define AT91SAM9RL_BASE_TC2 0xfffa0080
55#define AT91SAM9RL_BASE_MCI 0xfffa4000
56#define AT91SAM9RL_BASE_TWI0 0xfffa8000
57#define AT91SAM9RL_BASE_TWI1 0xfffac000
58#define AT91SAM9RL_BASE_US0 0xfffb0000
59#define AT91SAM9RL_BASE_US1 0xfffb4000
60#define AT91SAM9RL_BASE_US2 0xfffb8000
61#define AT91SAM9RL_BASE_US3 0xfffbc000
62#define AT91SAM9RL_BASE_SSC0 0xfffc0000
63#define AT91SAM9RL_BASE_SSC1 0xfffc4000
64#define AT91SAM9RL_BASE_PWMC 0xfffc8000
65#define AT91SAM9RL_BASE_SPI 0xfffcc000
66#define AT91SAM9RL_BASE_TSC 0xfffd0000
67#define AT91SAM9RL_BASE_UDPHS 0xfffd4000
68#define AT91SAM9RL_BASE_AC97C 0xfffd8000
69#define AT91_BASE_SYS 0xffffc000
70
71
72/*
73 * System Peripherals (offset from AT91_BASE_SYS)
74 */
75#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
76#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
77#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS)
78#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
79#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
80#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
81#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
82#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
83#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
84#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
85#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
86#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS)
87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
89#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
90#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
91#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
92#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
93#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
95#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
96
97
98/*
99 * Internal Memory.
100 */
101#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */
102#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */
103
104#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */
105#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */
106
107#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */
108#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */
109
110#endif
diff --git a/include/asm-arm/arch-at91/at91sam9rl_matrix.h b/include/asm-arm/arch-at91/at91sam9rl_matrix.h
new file mode 100644
index 000000000000..b15f11b7c08d
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91sam9rl_matrix.h
@@ -0,0 +1,96 @@
1/*
2 * include/asm-arm/arch-at91/at91sam9rl_matrix.h
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
7 * Based on AT91SAM9RL datasheet revision A. (Preliminary)
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive for
11 * more details.
12 */
13
14#ifndef AT91SAM9RL_MATRIX_H
15#define AT91SAM9RL_MATRIX_H
16
17#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
18#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
19#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
20#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
21#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
22#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
23#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
24#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
25#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
26#define AT91_MATRIX_ULBT_FOUR (2 << 0)
27#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
28#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
29
30#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
31#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
32#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
33#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
34#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
35#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
36#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
37#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
38#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
39#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
40#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
41#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
42#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
43#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
44#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
45
46#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
47#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
48#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
49#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
50#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
51#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
52#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
53#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
54#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
55#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
56#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
57#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
58
59#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
60#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
61#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
62#define AT91_MATRIX_RCB2 (1 << 2)
63#define AT91_MATRIX_RCB3 (1 << 3)
64#define AT91_MATRIX_RCB4 (1 << 4)
65#define AT91_MATRIX_RCB5 (1 << 5)
66
67#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */
68#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
69#define AT91_MATRIX_ITCM_0 (0 << 0)
70#define AT91_MATRIX_ITCM_16 (5 << 0)
71#define AT91_MATRIX_ITCM_32 (6 << 0)
72#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
73#define AT91_MATRIX_DTCM_0 (0 << 4)
74#define AT91_MATRIX_DTCM_16 (5 << 4)
75#define AT91_MATRIX_DTCM_32 (6 << 4)
76
77#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */
78#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
79#define AT91_MATRIX_CS1A_SMC (0 << 1)
80#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
81#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
82#define AT91_MATRIX_CS3A_SMC (0 << 3)
83#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
84#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
85#define AT91_MATRIX_CS4A_SMC (0 << 4)
86#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
87#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
88#define AT91_MATRIX_CS5A_SMC (0 << 5)
89#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
90#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
91#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
92#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
93#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
94
95
96#endif
diff --git a/include/asm-arm/arch-at91/cpu.h b/include/asm-arm/arch-at91/cpu.h
index 7ef4eebe9f8e..ef93c30a9c5f 100644
--- a/include/asm-arm/arch-at91/cpu.h
+++ b/include/asm-arm/arch-at91/cpu.h
@@ -26,6 +26,8 @@
26#define ARCH_ID_AT91SAM9XE256 0x329a93a0 26#define ARCH_ID_AT91SAM9XE256 0x329a93a0
27#define ARCH_ID_AT91SAM9XE512 0x329aa3a0 27#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
28 28
29#define ARCH_ID_AT91SAM9RL64 0x019b03a0
30
29static inline unsigned long at91_cpu_identify(void) 31static inline unsigned long at91_cpu_identify(void)
30{ 32{
31 return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); 33 return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
@@ -68,6 +70,13 @@ static inline unsigned long at91_arch_identify(void)
68#define cpu_is_at91sam9263() (0) 70#define cpu_is_at91sam9263() (0)
69#endif 71#endif
70 72
73#ifdef CONFIG_ARCH_AT91SAM9RL
74#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
75#else
76#define cpu_is_at91sam9rl() (0)
77#endif
78
79
71/* 80/*
72 * Since this is ARM, we will never run on any AVR32 CPU. But these 81 * Since this is ARM, we will never run on any AVR32 CPU. But these
73 * definitions may reduce clutter in common drivers. 82 * definitions may reduce clutter in common drivers.
diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h
index 28133e0154dd..46835e945aea 100644
--- a/include/asm-arm/arch-at91/hardware.h
+++ b/include/asm-arm/arch-at91/hardware.h
@@ -24,6 +24,8 @@
24#include <asm/arch/at91sam9261.h> 24#include <asm/arch/at91sam9261.h>
25#elif defined(CONFIG_ARCH_AT91SAM9263) 25#elif defined(CONFIG_ARCH_AT91SAM9263)
26#include <asm/arch/at91sam9263.h> 26#include <asm/arch/at91sam9263.h>
27#elif defined(CONFIG_ARCH_AT91SAM9RL)
28#include <asm/arch/at91sam9rl.h>
27#else 29#else
28#error "Unsupported AT91 processor" 30#error "Unsupported AT91 processor"
29#endif 31#endif
@@ -69,22 +71,5 @@
69/* Clocks */ 71/* Clocks */
70#define AT91_SLOW_CLOCK 32768 /* slow clock */ 72#define AT91_SLOW_CLOCK 32768 /* slow clock */
71 73
72#ifndef __ASSEMBLY__
73#include <asm/io.h>
74
75static inline unsigned int at91_sys_read(unsigned int reg_offset)
76{
77 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
78
79 return __raw_readl(addr + reg_offset);
80}
81
82static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
83{
84 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
85
86 __raw_writel(value, addr + reg_offset);
87}
88#endif
89 74
90#endif 75#endif
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h
index 401f327ec047..80073fd36b8e 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -29,4 +29,22 @@
29#define __mem_pci(a) (a) 29#define __mem_pci(a) (a)
30 30
31 31
32#ifndef __ASSEMBLY__
33
34static inline unsigned int at91_sys_read(unsigned int reg_offset)
35{
36 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
37
38 return __raw_readl(addr + reg_offset);
39}
40
41static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
42{
43 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
44
45 __raw_writel(value, addr + reg_offset);
46}
47
48#endif
49
32#endif 50#endif
diff --git a/include/asm-arm/arch-at91/irqs.h b/include/asm-arm/arch-at91/irqs.h
index 1ffa3bb9a9c1..1127a3b5e928 100644
--- a/include/asm-arm/arch-at91/irqs.h
+++ b/include/asm-arm/arch-at91/irqs.h
@@ -21,6 +21,7 @@
21#ifndef __ASM_ARCH_IRQS_H 21#ifndef __ASM_ARCH_IRQS_H
22#define __ASM_ARCH_IRQS_H 22#define __ASM_ARCH_IRQS_H
23 23
24#include <asm/io.h>
24#include <asm/arch/at91_aic.h> 25#include <asm/arch/at91_aic.h>
25 26
26#define NR_AIC_IRQS 32 27#define NR_AIC_IRQS 32
diff --git a/include/asm-arm/arch-at91/timex.h b/include/asm-arm/arch-at91/timex.h
index f41636d607a2..2df1ee12dfb7 100644
--- a/include/asm-arm/arch-at91/timex.h
+++ b/include/asm-arm/arch-at91/timex.h
@@ -37,6 +37,11 @@
37#define AT91SAM9_MASTER_CLOCK 99959500 37#define AT91SAM9_MASTER_CLOCK 99959500
38#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) 38#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
39 39
40#elif defined(CONFIG_ARCH_AT91SAM9RL)
41
42#define AT91SAM9_MASTER_CLOCK 100000000
43#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
44
40#endif 45#endif
41 46
42#endif 47#endif
diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h
index a193d28304b6..30ac587b3b41 100644
--- a/include/asm-arm/arch-at91/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -21,7 +21,7 @@
21#ifndef __ASM_ARCH_UNCOMPRESS_H 21#ifndef __ASM_ARCH_UNCOMPRESS_H
22#define __ASM_ARCH_UNCOMPRESS_H 22#define __ASM_ARCH_UNCOMPRESS_H
23 23
24#include <asm/hardware.h> 24#include <asm/io.h>
25#include <asm/arch/at91_dbgu.h> 25#include <asm/arch/at91_dbgu.h>
26 26
27/* 27/*
diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S
index 0cfb89b229d1..038b761fdadc 100644
--- a/include/asm-arm/arch-cl7500/entry-macro.S
+++ b/include/asm-arm/arch-cl7500/entry-macro.S
@@ -1,6 +1,14 @@
1#include <asm/hardware.h> 1#include <asm/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S> 2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
3 .macro get_irqnr_preamble, base, tmp 7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
4 .endm 12 .endm
5 13
6 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
diff --git a/include/asm-arm/arch-davinci/common.h b/include/asm-arm/arch-davinci/common.h
new file mode 100644
index 000000000000..a97dfbb15e57
--- /dev/null
+++ b/include/asm-arm/arch-davinci/common.h
@@ -0,0 +1,19 @@
1/*
2 * Header for code common to all DaVinci machines.
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
13#define __ARCH_ARM_MACH_DAVINCI_COMMON_H
14
15struct sys_timer;
16
17extern struct sys_timer davinci_timer;
18
19#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
diff --git a/include/asm-arm/arch-davinci/debug-macro.S b/include/asm-arm/arch-davinci/debug-macro.S
new file mode 100644
index 000000000000..e6c0f0d5d062
--- /dev/null
+++ b/include/asm-arm/arch-davinci/debug-macro.S
@@ -0,0 +1,21 @@
1/*
2 * Debugging macro for DaVinci
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12 .macro addruart, rx
13 mrc p15, 0, \rx, c1, c0
14 tst \rx, #1 @ MMU enabled?
15 moveq \rx, #0x01000000 @ physical base address
16 movne \rx, #0xfe000000 @ virtual base
17 orr \rx, \rx, #0x00c20000 @ UART 0
18 .endm
19
20#define UART_SHIFT 2
21#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-davinci/dma.h b/include/asm-arm/arch-davinci/dma.h
new file mode 100644
index 000000000000..8e2f2d0ba667
--- /dev/null
+++ b/include/asm-arm/arch-davinci/dma.h
@@ -0,0 +1,16 @@
1/*
2 * DaVinci DMA definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#define MAX_DMA_ADDRESS 0xffffffff
15
16#endif /* __ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-davinci/entry-macro.S b/include/asm-arm/arch-davinci/entry-macro.S
new file mode 100644
index 000000000000..3ebfcc5cb58e
--- /dev/null
+++ b/include/asm-arm/arch-davinci/entry-macro.S
@@ -0,0 +1,32 @@
1/*
2 * Low-level IRQ helper macros for TI DaVinci-based platforms
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <asm/arch/io.h>
12#include <asm/arch/irqs.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =IO_ADDRESS(DAVINCI_ARM_INTC_BASE)
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 ldr \tmp, [\base, #0x14]
26 mov \tmp, \tmp, lsr #2
27 sub \irqnr, \tmp, #1
28 cmp \tmp, #0
29 .endm
30
31 .macro irq_prio_table
32 .endm
diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h
new file mode 100644
index 000000000000..60362d80229e
--- /dev/null
+++ b/include/asm-arm/arch-davinci/hardware.h
@@ -0,0 +1,14 @@
1/*
2 * Common hardware definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-davinci/io.h b/include/asm-arm/arch-davinci/io.h
new file mode 100644
index 000000000000..e7accb910864
--- /dev/null
+++ b/include/asm-arm/arch-davinci/io.h
@@ -0,0 +1,79 @@
1/*
2 * DaVinci IO address definitions
3 *
4 * Copied from include/asm/arm/arch-omap/io.h
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16/*
17 * ----------------------------------------------------------------------------
18 * I/O mapping
19 * ----------------------------------------------------------------------------
20 */
21#define IO_PHYS 0x01c00000
22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
23#define IO_SIZE 0x00400000
24#define IO_VIRT (IO_PHYS + IO_OFFSET)
25#define io_p2v(pa) ((pa) + IO_OFFSET)
26#define io_v2p(va) ((va) - IO_OFFSET)
27#define IO_ADDRESS(x) io_p2v(x)
28
29/*
30 * We don't actually have real ISA nor PCI buses, but there is so many
31 * drivers out there that might just work if we fake them...
32 */
33#define PCIO_BASE 0
34#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
35#define __mem_pci(a) (a)
36#define __mem_isa(a) (a)
37
38#ifndef __ASSEMBLER__
39
40/*
41 * Functions to access the DaVinci IO region
42 *
43 * NOTE: - Use davinci_read/write[bwl] for physical register addresses
44 * - Use __raw_read/write[bwl]() for virtual register addresses
45 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
46 * - DO NOT use hardcoded virtual addresses to allow changing the
47 * IO address space again if needed
48 */
49#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
50#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
51#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
52
53#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
54#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
55#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
56
57/* 16 bit uses LDRH/STRH, base +/- offset_8 */
58typedef struct { volatile u16 offset[256]; } __regbase16;
59#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
60 ->offset[((vaddr)&0xff)>>1]
61#define __REG16(paddr) __REGV16(io_p2v(paddr))
62
63/* 8/32 bit uses LDR/STR, base +/- offset_12 */
64typedef struct { volatile u8 offset[4096]; } __regbase8;
65#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
66 ->offset[((vaddr)&4095)>>0]
67#define __REG8(paddr) __REGV8(io_p2v(paddr))
68
69typedef struct { volatile u32 offset[4096]; } __regbase32;
70#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
71 ->offset[((vaddr)&4095)>>2]
72
73#define __REG(paddr) __REGV32(io_p2v(paddr))
74#else
75
76#define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
77
78#endif /* __ASSEMBLER__ */
79#endif /* __ASM_ARCH_IO_H */
diff --git a/include/asm-arm/arch-davinci/irqs.h b/include/asm-arm/arch-davinci/irqs.h
new file mode 100644
index 000000000000..f4c5ca6da9f4
--- /dev/null
+++ b/include/asm-arm/arch-davinci/irqs.h
@@ -0,0 +1,105 @@
1/*
2 * DaVinci interrupt controller definitions
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27#ifndef __ASM_ARCH_IRQS_H
28#define __ASM_ARCH_IRQS_H
29
30/* Base address */
31#define DAVINCI_ARM_INTC_BASE 0x01C48000
32
33/* Interrupt lines */
34#define IRQ_VDINT0 0
35#define IRQ_VDINT1 1
36#define IRQ_VDINT2 2
37#define IRQ_HISTINT 3
38#define IRQ_H3AINT 4
39#define IRQ_PRVUINT 5
40#define IRQ_RSZINT 6
41#define IRQ_VFOCINT 7
42#define IRQ_VENCINT 8
43#define IRQ_ASQINT 9
44#define IRQ_IMXINT 10
45#define IRQ_VLCDINT 11
46#define IRQ_USBINT 12
47#define IRQ_EMACINT 13
48
49#define IRQ_CCINT0 16
50#define IRQ_CCERRINT 17
51#define IRQ_TCERRINT0 18
52#define IRQ_TCERRINT 19
53#define IRQ_PSCIN 20
54
55#define IRQ_IDE 22
56#define IRQ_HPIINT 23
57#define IRQ_MBXINT 24
58#define IRQ_MBRINT 25
59#define IRQ_MMCINT 26
60#define IRQ_SDIOINT 27
61#define IRQ_MSINT 28
62#define IRQ_DDRINT 29
63#define IRQ_AEMIFINT 30
64#define IRQ_VLQINT 31
65#define IRQ_TINT0_TINT12 32
66#define IRQ_TINT0_TINT34 33
67#define IRQ_TINT1_TINT12 34
68#define IRQ_TINT1_TINT34 35
69#define IRQ_PWMINT0 36
70#define IRQ_PWMINT1 37
71#define IRQ_PWMINT2 38
72#define IRQ_I2C 39
73#define IRQ_UARTINT0 40
74#define IRQ_UARTINT1 41
75#define IRQ_UARTINT2 42
76#define IRQ_SPINT0 43
77#define IRQ_SPINT1 44
78
79#define IRQ_DSP2ARM0 46
80#define IRQ_DSP2ARM1 47
81#define IRQ_GPIO0 48
82#define IRQ_GPIO1 49
83#define IRQ_GPIO2 50
84#define IRQ_GPIO3 51
85#define IRQ_GPIO4 52
86#define IRQ_GPIO5 53
87#define IRQ_GPIO6 54
88#define IRQ_GPIO7 55
89#define IRQ_GPIOBNK0 56
90#define IRQ_GPIOBNK1 57
91#define IRQ_GPIOBNK2 58
92#define IRQ_GPIOBNK3 59
93#define IRQ_GPIOBNK4 60
94#define IRQ_COMMTX 61
95#define IRQ_COMMRX 62
96#define IRQ_EMUINT 63
97
98#define DAVINCI_N_AINTC_IRQ 64
99#define DAVINCI_N_GPIO 71
100
101#define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
102
103#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
104
105#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-davinci/memory.h b/include/asm-arm/arch-davinci/memory.h
new file mode 100644
index 000000000000..dd1625c23cf4
--- /dev/null
+++ b/include/asm-arm/arch-davinci/memory.h
@@ -0,0 +1,64 @@
1/*
2 * DaVinci memory space definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14/**************************************************************************
15 * Included Files
16 **************************************************************************/
17#include <asm/page.h>
18#include <asm/sizes.h>
19
20/**************************************************************************
21 * Definitions
22 **************************************************************************/
23#define DAVINCI_DDR_BASE 0x80000000
24#define DAVINCI_IRAM_BASE 0x00008000 /* ARM Internal RAM */
25
26#define PHYS_OFFSET DAVINCI_DDR_BASE
27
28/*
29 * Increase size of DMA-consistent memory region
30 */
31#define CONSISTENT_DMA_SIZE (14<<20)
32
33#ifndef __ASSEMBLY__
34/*
35 * Restrict DMA-able region to workaround silicon bug. The bug
36 * restricts buffers available for DMA to video hardware to be
37 * below 128M
38 */
39static inline void
40__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
41{
42 unsigned int sz = (128<<20) >> PAGE_SHIFT;
43
44 if (node != 0)
45 sz = 0;
46
47 size[1] = size[0] - sz;
48 size[0] = sz;
49}
50
51#define arch_adjust_zones(node, zone_size, holes) \
52 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
53
54#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1)
55
56#endif
57
58/*
59 * Bus address is physical address
60 */
61#define __virt_to_bus(x) __virt_to_phys(x)
62#define __bus_to_virt(x) __phys_to_virt(x)
63
64#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/include/asm-arm/arch-davinci/psc.h b/include/asm-arm/arch-davinci/psc.h
new file mode 100644
index 000000000000..4977aa071e1e
--- /dev/null
+++ b/include/asm-arm/arch-davinci/psc.h
@@ -0,0 +1,76 @@
1/*
2 * DaVinci Power & Sleep Controller (PSC) defines
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27#ifndef __ASM_ARCH_PSC_H
28#define __ASM_ARCH_PSC_H
29
30/* Power and Sleep Controller (PSC) Domains */
31#define DAVINCI_GPSC_ARMDOMAIN 0
32#define DAVINCI_GPSC_DSPDOMAIN 1
33
34#define DAVINCI_LPSC_VPSSMSTR 0
35#define DAVINCI_LPSC_VPSSSLV 1
36#define DAVINCI_LPSC_TPCC 2
37#define DAVINCI_LPSC_TPTC0 3
38#define DAVINCI_LPSC_TPTC1 4
39#define DAVINCI_LPSC_EMAC 5
40#define DAVINCI_LPSC_EMAC_WRAPPER 6
41#define DAVINCI_LPSC_MDIO 7
42#define DAVINCI_LPSC_IEEE1394 8
43#define DAVINCI_LPSC_USB 9
44#define DAVINCI_LPSC_ATA 10
45#define DAVINCI_LPSC_VLYNQ 11
46#define DAVINCI_LPSC_UHPI 12
47#define DAVINCI_LPSC_DDR_EMIF 13
48#define DAVINCI_LPSC_AEMIF 14
49#define DAVINCI_LPSC_MMC_SD 15
50#define DAVINCI_LPSC_MEMSTICK 16
51#define DAVINCI_LPSC_McBSP 17
52#define DAVINCI_LPSC_I2C 18
53#define DAVINCI_LPSC_UART0 19
54#define DAVINCI_LPSC_UART1 20
55#define DAVINCI_LPSC_UART2 21
56#define DAVINCI_LPSC_SPI 22
57#define DAVINCI_LPSC_PWM0 23
58#define DAVINCI_LPSC_PWM1 24
59#define DAVINCI_LPSC_PWM2 25
60#define DAVINCI_LPSC_GPIO 26
61#define DAVINCI_LPSC_TIMER0 27
62#define DAVINCI_LPSC_TIMER1 28
63#define DAVINCI_LPSC_TIMER2 29
64#define DAVINCI_LPSC_SYSTEM_SUBSYS 30
65#define DAVINCI_LPSC_ARM 31
66#define DAVINCI_LPSC_SCR2 32
67#define DAVINCI_LPSC_SCR3 33
68#define DAVINCI_LPSC_SCR4 34
69#define DAVINCI_LPSC_CROSSBAR 35
70#define DAVINCI_LPSC_CFG27 36
71#define DAVINCI_LPSC_CFG3 37
72#define DAVINCI_LPSC_CFG5 38
73#define DAVINCI_LPSC_GEM 39
74#define DAVINCI_LPSC_IMCOP 40
75
76#endif /* __ASM_ARCH_PSC_H */
diff --git a/include/asm-arm/arch-davinci/serial.h b/include/asm-arm/arch-davinci/serial.h
new file mode 100644
index 000000000000..ed418ef76805
--- /dev/null
+++ b/include/asm-arm/arch-davinci/serial.h
@@ -0,0 +1,20 @@
1/*
2 * DaVinci serial device definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_SERIAL_H
12#define __ASM_ARCH_SERIAL_H
13
14#include <asm/arch/io.h>
15
16#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
17#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
18#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
19
20#endif /* __ASM_ARCH_SERIAL_H */
diff --git a/include/asm-arm/arch-davinci/system.h b/include/asm-arm/arch-davinci/system.h
new file mode 100644
index 000000000000..440ac515804b
--- /dev/null
+++ b/include/asm-arm/arch-davinci/system.h
@@ -0,0 +1,29 @@
1/*
2 * DaVinci system defines
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14#include <asm/io.h>
15#include <asm/hardware.h>
16
17extern void davinci_watchdog_reset(void);
18
19static void arch_idle(void)
20{
21 cpu_do_idle();
22}
23
24static void arch_reset(char mode)
25{
26 davinci_watchdog_reset();
27}
28
29#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-davinci/timex.h b/include/asm-arm/arch-davinci/timex.h
new file mode 100644
index 000000000000..52827567841d
--- /dev/null
+++ b/include/asm-arm/arch-davinci/timex.h
@@ -0,0 +1,17 @@
1/*
2 * DaVinci timer defines
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_TIMEX_H
12#define __ASM_ARCH_TIMEX_H
13
14/* The source frequency for the timers is the 27MHz clock */
15#define CLOCK_TICK_RATE 27000000
16
17#endif /* __ASM_ARCH_TIMEX_H__ */
diff --git a/include/asm-arm/arch-davinci/uncompress.h b/include/asm-arm/arch-davinci/uncompress.h
new file mode 100644
index 000000000000..f6d1570f7206
--- /dev/null
+++ b/include/asm-arm/arch-davinci/uncompress.h
@@ -0,0 +1,35 @@
1/*
2 * Serial port stubs for kernel decompress status messages
3 *
4 * Author: Anant Gole
5 * (C) Copyright (C) 2006, Texas Instruments, Inc
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <linux/types.h>
13#include <linux/serial_reg.h>
14#include <asm/arch/serial.h>
15
16/* PORT_16C550A, in polled non-fifo mode */
17
18static void putc(char c)
19{
20 volatile u32 *uart = (volatile void *) DAVINCI_UART0_BASE;
21
22 while (!(uart[UART_LSR] & UART_LSR_THRE))
23 barrier();
24 uart[UART_TX] = c;
25}
26
27static inline void flush(void)
28{
29 volatile u32 *uart = (volatile void *) DAVINCI_UART0_BASE;
30 while (!(uart[UART_LSR] & UART_LSR_THRE))
31 barrier();
32}
33
34#define arch_decomp_setup()
35#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-davinci/vmalloc.h b/include/asm-arm/arch-davinci/vmalloc.h
new file mode 100644
index 000000000000..9b47fa89b333
--- /dev/null
+++ b/include/asm-arm/arch-davinci/vmalloc.h
@@ -0,0 +1,15 @@
1/*
2 * DaVinci vmalloc definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <asm/memory.h>
12#include <asm/arch/io.h>
13
14/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
15#define VMALLOC_END (IO_VIRT - (2<<20))
diff --git a/include/asm-arm/arch-ebsa110/entry-macro.S b/include/asm-arm/arch-ebsa110/entry-macro.S
index aa23c5d6c69e..f242be5c49ba 100644
--- a/include/asm-arm/arch-ebsa110/entry-macro.S
+++ b/include/asm-arm/arch-ebsa110/entry-macro.S
@@ -16,13 +16,13 @@
16 .endm 16 .endm
17 17
18 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
19 mov \base, #IRQ_STAT
19 .endm 20 .endm
20 21
21 .macro arch_ret_to_user, tmp1, tmp2 22 .macro arch_ret_to_user, tmp1, tmp2
22 .endm 23 .endm
23 24
24 .macro get_irqnr_and_base, irqnr, stat, base, tmp 25 .macro get_irqnr_and_base, irqnr, stat, base, tmp
25 mov \base, #IRQ_STAT
26 ldrb \stat, [\base] @ get interrupts 26 ldrb \stat, [\base] @ get interrupts
27 mov \irqnr, #0 27 mov \irqnr, #0
28 tst \stat, #15 28 tst \stat, #15
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
index 4203dbf10662..e63064edb734 100644
--- a/include/asm-arm/arch-ebsa285/entry-macro.S
+++ b/include/asm-arm/arch-ebsa285/entry-macro.S
@@ -11,24 +11,24 @@
11#include <asm/arch/irqs.h> 11#include <asm/arch/irqs.h>
12#include <asm/hardware/dec21285.h> 12#include <asm/hardware/dec21285.h>
13 13
14 .equ dc21285_high, ARMCSR_BASE & 0xff000000
15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
16
14 .macro disable_fiq 17 .macro disable_fiq
15 .endm 18 .endm
16 19
17 .macro get_irqnr_preamble, base, tmp 20 .macro get_irqnr_preamble, base, tmp
21 mov \base, #dc21285_high
22 .if dc21285_low
23 orr \base, \base, #dc21285_low
24 .endif
18 .endm 25 .endm
19 26
20 .macro arch_ret_to_user, tmp1, tmp2 27 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 28 .endm
22 29
23 .equ dc21285_high, ARMCSR_BASE & 0xff000000
24 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 mov r4, #dc21285_high 31 ldr \irqstat, [\base, #0x180] @ get interrupts
28 .if dc21285_low
29 orr r4, r4, #dc21285_low
30 .endif
31 ldr \irqstat, [r4, #0x180] @ get interrupts
32 32
33 mov \irqnr, #IRQ_SDRAMPARITY 33 mov \irqnr, #IRQ_SDRAMPARITY
34 tst \irqstat, #IRQ_MASK_SDRAMPARITY 34 tst \irqstat, #IRQ_MASK_SDRAMPARITY
diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h
index 7dfff4ad82b3..a6e0f9e6ddcf 100644
--- a/include/asm-arm/arch-iop13xx/io.h
+++ b/include/asm-arm/arch-iop13xx/io.h
@@ -27,7 +27,7 @@
27 27
28extern void __iomem * __iop13xx_io(unsigned long io_addr); 28extern void __iomem * __iop13xx_io(unsigned long io_addr);
29extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, 29extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
30 unsigned long flags); 30 unsigned int mtype);
31extern void __iop13xx_iounmap(void __iomem *addr); 31extern void __iop13xx_iounmap(void __iomem *addr);
32 32
33extern u32 iop13xx_atue_mem_base; 33extern u32 iop13xx_atue_mem_base;
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index 85707e9c3325..e6736c3d1f7f 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -181,6 +181,7 @@ static inline int iop13xx_cpu_id(void)
181#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200 181#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200
182#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400 182#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400
183#define IOP13XX_PBI_PMMR_OFFSET 0x00001580 183#define IOP13XX_PBI_PMMR_OFFSET 0x00001580
184#define IOP13XX_MU_PMMR_OFFSET 0x00004000
184#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188 185#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188
185#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188) 186#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188)
186 187
@@ -412,6 +413,34 @@ static inline int iop13xx_cpu_id(void)
412#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7) 413#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7)
413/*=======================================================================*/ 414/*=======================================================================*/
414 415
416/*============================MESSAGING UNIT=============================*/
417#define IOP13XX_MU_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_MU_PMMR_OFFSET +\
418 (ofs))
419
420#define IOP13XX_MU_IMR0 IOP13XX_MU_OFFSET(0x10)
421#define IOP13XX_MU_IMR1 IOP13XX_MU_OFFSET(0x14)
422#define IOP13XX_MU_OMR0 IOP13XX_MU_OFFSET(0x18)
423#define IOP13XX_MU_OMR1 IOP13XX_MU_OFFSET(0x1C)
424#define IOP13XX_MU_IDR IOP13XX_MU_OFFSET(0x20)
425#define IOP13XX_MU_IISR IOP13XX_MU_OFFSET(0x24)
426#define IOP13XX_MU_IIMR IOP13XX_MU_OFFSET(0x28)
427#define IOP13XX_MU_ODR IOP13XX_MU_OFFSET(0x2C)
428#define IOP13XX_MU_OISR IOP13XX_MU_OFFSET(0x30)
429#define IOP13XX_MU_OIMR IOP13XX_MU_OFFSET(0x34)
430#define IOP13XX_MU_IRCSR IOP13XX_MU_OFFSET(0x38)
431#define IOP13XX_MU_ORCSR IOP13XX_MU_OFFSET(0x3C)
432#define IOP13XX_MU_MIMR IOP13XX_MU_OFFSET(0x48)
433#define IOP13XX_MU_MUCR IOP13XX_MU_OFFSET(0x50)
434#define IOP13XX_MU_QBAR IOP13XX_MU_OFFSET(0x54)
435#define IOP13XX_MU_MUBAR IOP13XX_MU_OFFSET(0x84)
436
437#define IOP13XX_MU_WINDOW_SIZE (8 * 1024)
438#define IOP13XX_MU_BASE_PHYS (0xff000000)
439#define IOP13XX_MU_BASE_PCI (0xff000000)
440#define IOP13XX_MU_MIMR_PCI (IOP13XX_MU_BASE_PCI + 0x48)
441#define IOP13XX_MU_MIMR_CORE_SELECT (15)
442/*=======================================================================*/
443
415/*==============================ADMA UNITS===============================*/ 444/*==============================ADMA UNITS===============================*/
416#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) 445#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9))
417#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) 446#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0)
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h
index 5c6fac2a4004..054e7acb5bfa 100644
--- a/include/asm-arm/arch-iop13xx/irqs.h
+++ b/include/asm-arm/arch-iop13xx/irqs.h
@@ -168,7 +168,7 @@ static inline u32 read_intpnd_3(void)
168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ 168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */
169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ 169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */
170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ 170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */
171#define IRQ_IOP13XX_RSVD_113 (113) /* 17 */ 171#define IRQ_IOP13XX_INBD_MSI (113) /* 17 */
172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ 172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */
173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ 173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */
174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ 174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */
@@ -184,7 +184,13 @@ static inline u32 read_intpnd_3(void)
184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ 184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */
185#define IRQ_IOP13XX_HPI (127) /* 31 */ 185#define IRQ_IOP13XX_HPI (127) /* 31 */
186 186
187#ifdef CONFIG_PCI_MSI
188#define IRQ_IOP13XX_MSI_0 (IRQ_IOP13XX_HPI + 1)
189#define NR_IOP13XX_IRQS (IRQ_IOP13XX_MSI_0 + 128)
190#else
187#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) 191#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1)
192#endif
193
188#define NR_IRQS NR_IOP13XX_IRQS 194#define NR_IRQS NR_IOP13XX_IRQS
189 195
190#endif /* _IOP13XX_IRQ_H_ */ 196#endif /* _IOP13XX_IRQ_H_ */
diff --git a/include/asm-arm/arch-iop13xx/msi.h b/include/asm-arm/arch-iop13xx/msi.h
new file mode 100644
index 000000000000..b80c5ae17e99
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/msi.h
@@ -0,0 +1,11 @@
1#ifndef _IOP13XX_MSI_H_
2#define _IOP13XX_MSI_H_
3#ifdef CONFIG_PCI_MSI
4void iop13xx_msi_init(void);
5#else
6static inline void iop13xx_msi_init(void)
7{
8 return;
9}
10#endif
11#endif
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h
index 994f16af5057..958af751a484 100644
--- a/include/asm-arm/arch-iop32x/io.h
+++ b/include/asm-arm/arch-iop32x/io.h
@@ -14,7 +14,7 @@
14#include <asm/hardware.h> 14#include <asm/hardware.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, 16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned long flags); 17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr); 18extern void __iop3xx_iounmap(void __iomem *addr);
19 19
20#define IO_SPACE_LIMIT 0xffffffff 20#define IO_SPACE_LIMIT 0xffffffff
diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h
index 993f7589b29f..fec9c53e2b10 100644
--- a/include/asm-arm/arch-iop33x/io.h
+++ b/include/asm-arm/arch-iop33x/io.h
@@ -14,7 +14,7 @@
14#include <asm/hardware.h> 14#include <asm/hardware.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, 16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned long flags); 17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr); 18extern void __iop3xx_iounmap(void __iomem *addr);
19 19
20#define IO_SPACE_LIMIT 0xffffffff 20#define IO_SPACE_LIMIT 0xffffffff
diff --git a/include/asm-arm/arch-ks8695/debug-macro.S b/include/asm-arm/arch-ks8695/debug-macro.S
new file mode 100644
index 000000000000..cd5f2fb1f06e
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/debug-macro.S
@@ -0,0 +1,38 @@
1/*
2 * include/asm-arm/arch-ks8695/debug-macro.S
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - Debug macros
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <asm/hardware.h>
15#include <asm/arch/regs-uart.h>
16
17 .macro addruart, rx
18 mrc p15, 0, \rx, c1, c0
19 tst \rx, #1 @ MMU enabled?
20 ldreq \rx, =KS8695_UART_PA @ physical base address
21 ldrne \rx, =KS8695_UART_VA @ virtual base address
22 .endm
23
24 .macro senduart, rd, rx
25 str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
26 .endm
27
28 .macro busyuart, rd, rx
291001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
30 tst \rd, #URLS_URTE @ Holding & Shift registers empty?
31 beq 1001b
32 .endm
33
34 .macro waituart, rd, rx
351001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
36 tst \rd, #URLS_URTHRE @ Holding Register empty?
37 beq 1001b
38 .endm
diff --git a/include/asm-arm/arch-ks8695/devices.h b/include/asm-arm/arch-ks8695/devices.h
new file mode 100644
index 000000000000..b0364dce463f
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/devices.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-arm/arch-ks8695/devices.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_DEVICES_H
12#define __ASM_ARCH_DEVICES_H
13
14#include <linux/pci.h>
15
16 /* Ethernet */
17extern void __init ks8695_add_device_wan(void);
18extern void __init ks8695_add_device_lan(void);
19extern void __init ks8695_add_device_hpna(void);
20
21 /* PCI */
22#define KS8695_MODE_PCI 0
23#define KS8695_MODE_MINIPCI 1
24#define KS8695_MODE_CARDBUS 2
25
26struct ks8695_pci_cfg {
27 short mode;
28 int (*map_irq)(struct pci_dev *, u8, u8);
29};
30extern __init void ks8695_init_pci(struct ks8695_pci_cfg *);
31
32#endif
diff --git a/include/asm-arm/arch-ks8695/dma.h b/include/asm-arm/arch-ks8695/dma.h
new file mode 100644
index 000000000000..e5159ed42a4b
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/dma.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-arm/arch-ks8695/dma.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
diff --git a/include/asm-arm/arch-ks8695/entry-macro.S b/include/asm-arm/arch-ks8695/entry-macro.S
new file mode 100644
index 000000000000..e34bdf85920e
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/entry-macro.S
@@ -0,0 +1,53 @@
1/*
2 * include/asm-arm/arch-ks8695/entry-macro.S
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * Low-level IRQ helper macros for KS8695
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12*/
13
14#include <asm/hardware.h>
15#include <asm/arch/regs-irq.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
29
30 teq \irqstat, #0
31 beq 1001f
32
33 mov \irqnr, #0
34
35 tst \irqstat, #0xff
36 moveq \irqstat, \irqstat, lsr #8
37 addeq \irqnr, \irqnr, #8
38 tsteq \irqstat, #0xff
39 moveq \irqstat, \irqstat, lsr #8
40 addeq \irqnr, \irqnr, #8
41 tsteq \irqstat, #0xff
42 moveq \irqstat, \irqstat, lsr #8
43 addeq \irqnr, \irqnr, #8
44 tst \irqstat, #0x0f
45 moveq \irqstat, \irqstat, lsr #4
46 addeq \irqnr, \irqnr, #4
47 tst \irqstat, #0x03
48 moveq \irqstat, \irqstat, lsr #2
49 addeq \irqnr, \irqnr, #2
50 tst \irqstat, #0x01
51 addeqs \irqnr, \irqnr, #1
521001:
53 .endm
diff --git a/include/asm-arm/arch-ks8695/hardware.h b/include/asm-arm/arch-ks8695/hardware.h
new file mode 100644
index 000000000000..cb732bff3288
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/hardware.h
@@ -0,0 +1,49 @@
1/*
2 * include/asm-arm/arch-ks8695/hardware.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - Memory Map definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_HARDWARE_H
15#define __ASM_ARCH_HARDWARE_H
16
17#include <asm/sizes.h>
18
19/*
20 * Physical RAM address.
21 */
22#define KS8695_SDRAM_PA 0x00000000
23
24
25/*
26 * We map an entire MiB with the System Configuration Registers in even
27 * though only 64KiB is needed. This makes it easier for use with the
28 * head debug code as the initial MMU setup only deals in L1 sections.
29 */
30#define KS8695_IO_PA 0x03F00000
31#define KS8695_IO_VA 0xF0000000
32#define KS8695_IO_SIZE SZ_1M
33
34#define KS8695_PCIMEM_PA 0x60000000
35#define KS8695_PCIMEM_SIZE SZ_512M
36
37#define KS8695_PCIIO_PA 0x80000000
38#define KS8695_PCIIO_SIZE SZ_64K
39
40
41/*
42 * PCI support
43 */
44#define pcibios_assign_all_busses() 1
45
46#define PCIBIOS_MIN_IO 0
47#define PCIBIOS_MIN_MEM 0
48
49#endif
diff --git a/include/asm-arm/arch-ks8695/io.h b/include/asm-arm/arch-ks8695/io.h
new file mode 100644
index 000000000000..8edc4bd6aadf
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/io.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-arm/arch-ks8695/io.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16#define __io(a) ((void __iomem *)(a))
17#define __mem_pci(a) (a)
18
19#endif
diff --git a/include/asm-arm/arch-ks8695/irqs.h b/include/asm-arm/arch-ks8695/irqs.h
new file mode 100644
index 000000000000..8b1c4fe96a81
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/irqs.h
@@ -0,0 +1,54 @@
1/*
2 * linux/include/asm-arm/arch-ks8695/irqs.h
3 *
4 * Copyright (C) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ASM_ARCH_IRQS_H
13#define __ASM_ARCH_IRQS_H
14
15
16#define NR_IRQS 32
17
18/*
19 * IRQ definitions
20 */
21#define KS8695_IRQ_COMM_RX 0
22#define KS8695_IRQ_COMM_TX 1
23#define KS8695_IRQ_EXTERN0 2
24#define KS8695_IRQ_EXTERN1 3
25#define KS8695_IRQ_EXTERN2 4
26#define KS8695_IRQ_EXTERN3 5
27#define KS8695_IRQ_TIMER0 6
28#define KS8695_IRQ_TIMER1 7
29#define KS8695_IRQ_UART_TX 8
30#define KS8695_IRQ_UART_RX 9
31#define KS8695_IRQ_UART_LINE_STATUS 10
32#define KS8695_IRQ_UART_MODEM_STATUS 11
33#define KS8695_IRQ_LAN_RX_STOP 12
34#define KS8695_IRQ_LAN_TX_STOP 13
35#define KS8695_IRQ_LAN_RX_BUF 14
36#define KS8695_IRQ_LAN_TX_BUF 15
37#define KS8695_IRQ_LAN_RX_STATUS 16
38#define KS8695_IRQ_LAN_TX_STATUS 17
39#define KS8695_IRQ_HPNA_RX_STOP 18
40#define KS8695_IRQ_HPNA_TX_STOP 19
41#define KS8695_IRQ_HPNA_RX_BUF 20
42#define KS8695_IRQ_HPNA_TX_BUF 21
43#define KS8695_IRQ_HPNA_RX_STATUS 22
44#define KS8695_IRQ_HPNA_TX_STATUS 23
45#define KS8695_IRQ_BUS_ERROR 24
46#define KS8695_IRQ_WAN_RX_STOP 25
47#define KS8695_IRQ_WAN_TX_STOP 26
48#define KS8695_IRQ_WAN_RX_BUF 27
49#define KS8695_IRQ_WAN_TX_BUF 28
50#define KS8695_IRQ_WAN_RX_STATUS 29
51#define KS8695_IRQ_WAN_TX_STATUS 30
52#define KS8695_IRQ_WAN_LINK 31
53
54#endif
diff --git a/include/asm-arm/arch-ks8695/memory.h b/include/asm-arm/arch-ks8695/memory.h
new file mode 100644
index 000000000000..24f6a6e4a302
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/memory.h
@@ -0,0 +1,49 @@
1/*
2 * include/asm-arm/arch-ks8695/memory.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 Memory definitions
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#include <asm/hardware.h>
17
18/*
19 * Physical SRAM offset.
20 */
21#define PHYS_OFFSET KS8695_SDRAM_PA
22
23#ifndef __ASSEMBLY__
24
25#ifdef CONFIG_PCI
26
27/* PCI mappings */
28#define __virt_to_bus(x) ((x) - PAGE_OFFSET + KS8695_PCIMEM_PA)
29#define __bus_to_virt(x) ((x) - KS8695_PCIMEM_PA + PAGE_OFFSET)
30
31/* Platform-bus mapping */
32extern struct bus_type platform_bus_type;
33#define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type)
34#define __arch_dma_to_virt(dev, x) ({ is_lbus_device(dev) ? \
35 __phys_to_virt(x) : __bus_to_virt(x); })
36#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \
37 (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
38#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x))
39
40#else
41
42#define __virt_to_bus(x) __virt_to_phys(x)
43#define __bus_to_virt(x) __phys_to_virt(x)
44
45#endif
46
47#endif
48
49#endif
diff --git a/include/asm-arm/arch-ks8695/regs-gpio.h b/include/asm-arm/arch-ks8695/regs-gpio.h
new file mode 100644
index 000000000000..57fcf9fc82e4
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-gpio.h
@@ -0,0 +1,53 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-gpio.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 *
6 * KS8695 - GPIO control registers and bit definitions.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_GPIO_H
14#define KS8695_GPIO_H
15
16#define KS8695_GPIO_OFFSET (0xF0000 + 0xE600)
17#define KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET)
18#define KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET)
19
20
21#define KS8695_IOPM (0x00) /* I/O Port Mode Register */
22#define KS8695_IOPC (0x04) /* I/O Port Control Register */
23#define KS8695_IOPD (0x08) /* I/O Port Data Register */
24
25
26/* Port Mode Register */
27#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */
28
29/* Port Control Register */
30#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */
31#define IOPC_IOTIM0EN (1 << 16) /* GPIO Pin for Timer0 Enable */
32#define IOPC_IOEINT3EN (1 << 15) /* GPIO Pin for External/Soft Interrupt 3 Enable */
33#define IOPC_IOEINT3TM (7 << 12) /* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */
34#define IOPC_IOEINT3_MODE(x) ((x) << 12)
35#define IOPC_IOEINT2EN (1 << 11) /* GPIO Pin for External/Soft Interrupt 2 Enable */
36#define IOPC_IOEINT2TM (7 << 8) /* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */
37#define IOPC_IOEINT2_MODE(x) ((x) << 8)
38#define IOPC_IOEINT1EN (1 << 7) /* GPIO Pin for External/Soft Interrupt 1 Enable */
39#define IOPC_IOEINT1TM (7 << 4) /* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */
40#define IOPC_IOEINT1_MODE(x) ((x) << 4)
41#define IOPC_IOEINT0EN (1 << 3) /* GPIO Pin for External/Soft Interrupt 0 Enable */
42#define IOPC_IOEINT0TM (7 << 0) /* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */
43#define IOPC_IOEINT0_MODE(x) ((x) << 0)
44
45 /* Trigger Modes */
46#define IOPC_TM_LOW (0) /* Level Detection (Active Low) */
47#define IOPC_TM_HIGH (1) /* Level Detection (Active High) */
48#define IOPC_TM_RISING (2) /* Rising Edge Detection */
49#define IOPC_TM_FALLING (4) /* Falling Edge Detection */
50#define IOPC_TM_EDGE (6) /* Both Edge Detection */
51
52
53#endif
diff --git a/include/asm-arm/arch-ks8695/regs-hpna.h b/include/asm-arm/arch-ks8695/regs-hpna.h
new file mode 100644
index 000000000000..14091cdec103
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-hpna.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-wan.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - HPNA Registers and bit definitions.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_HPNA_H
14#define KS8695_HPNA_H
15
16#define KS8695_HPNA_OFFSET (0xF0000 + 0xA000)
17#define KS8695_HPNA_VA (KS8695_IO_VA + KS8695_HPNA_OFFSET)
18#define KS8695_HPNA_PA (KS8695_IO_PA + KS8695_HPNA_OFFSET)
19
20
21/*
22 * HPNA registers
23 */
24
25#endif
diff --git a/include/asm-arm/arch-ks8695/regs-irq.h b/include/asm-arm/arch-ks8695/regs-irq.h
new file mode 100644
index 000000000000..70b193f6b756
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-irq.h
@@ -0,0 +1,41 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-irq.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - IRQ registers and bit definitions
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef KS8695_IRQ_H
15#define KS8695_IRQ_H
16
17#define KS8695_IRQ_OFFSET (0xF0000 + 0xE200)
18#define KS8695_IRQ_VA (KS8695_IO_VA + KS8695_IRQ_OFFSET)
19#define KS8695_IRQ_PA (KS8695_IO_PA + KS8695_IRQ_OFFSET)
20
21
22/*
23 * Interrupt Controller registers
24 */
25#define KS8695_INTMC (0x00) /* Mode Control Register */
26#define KS8695_INTEN (0x04) /* Interrupt Enable Register */
27#define KS8695_INTST (0x08) /* Interrupt Status Register */
28#define KS8695_INTPW (0x0c) /* Interrupt Priority (WAN MAC) */
29#define KS8695_INTPH (0x10) /* Interrupt Priority (HPNA) [KS8695 only] */
30#define KS8695_INTPL (0x14) /* Interrupt Priority (LAN MAC) */
31#define KS8695_INTPT (0x18) /* Interrupt Priority (Timer) */
32#define KS8695_INTPU (0x1c) /* Interrupt Priority (UART) */
33#define KS8695_INTPE (0x20) /* Interrupt Priority (External Interrupt) */
34#define KS8695_INTPC (0x24) /* Interrupt Priority (Communications Channel) */
35#define KS8695_INTPBE (0x28) /* Interrupt Priority (Bus Error Response) */
36#define KS8695_INTMS (0x2c) /* Interrupt Mask Status Register */
37#define KS8695_INTHPF (0x30) /* Interrupt Pending Highest Priority (FIQ) */
38#define KS8695_INTHPI (0x34) /* Interrupt Pending Highest Priority (IRQ) */
39
40
41#endif
diff --git a/include/asm-arm/arch-ks8695/regs-lan.h b/include/asm-arm/arch-ks8695/regs-lan.h
new file mode 100644
index 000000000000..a63bd61c64ed
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-lan.h
@@ -0,0 +1,65 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-lan.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - LAN Registers and bit definitions.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_LAN_H
14#define KS8695_LAN_H
15
16#define KS8695_LAN_OFFSET (0xF0000 + 0x8000)
17#define KS8695_LAN_VA (KS8695_IO_VA + KS8695_LAN_OFFSET)
18#define KS8695_LAN_PA (KS8695_IO_PA + KS8695_LAN_OFFSET)
19
20
21/*
22 * LAN registers
23 */
24#define KS8695_LMDTXC (0x00) /* DMA Transmit Control */
25#define KS8695_LMDRXC (0x04) /* DMA Receive Control */
26#define KS8695_LMDTSC (0x08) /* DMA Transmit Start Command */
27#define KS8695_LMDRSC (0x0c) /* DMA Receive Start Command */
28#define KS8695_LTDLB (0x10) /* Transmit Descriptor List Base Address */
29#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_LMAL (0x18) /* MAC Station Address Low */
31#define KS8695_LMAH (0x1c) /* MAC Station Address High */
32#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34
35
36/* DMA Transmit Control Register */
37#define LMDTXC_LMTRST (1 << 31) /* Soft Reset */
38#define LMDTXC_LMTBS (0x3f << 24) /* Transmit Burst Size */
39#define LMDTXC_LMTUCG (1 << 18) /* Transmit UDP Checksum Generate */
40#define LMDTXC_LMTTCG (1 << 17) /* Transmit TCP Checksum Generate */
41#define LMDTXC_LMTICG (1 << 16) /* Transmit IP Checksum Generate */
42#define LMDTXC_LMTFCE (1 << 9) /* Transmit Flow Control Enable */
43#define LMDTXC_LMTLB (1 << 8) /* Loopback mode */
44#define LMDTXC_LMTEP (1 << 2) /* Transmit Enable Padding */
45#define LMDTXC_LMTAC (1 << 1) /* Transmit Add CRC */
46#define LMDTXC_LMTE (1 << 0) /* TX Enable */
47
48/* DMA Receive Control Register */
49#define LMDRXC_LMRBS (0x3f << 24) /* Receive Burst Size */
50#define LMDRXC_LMRUCC (1 << 18) /* Receive UDP Checksum check */
51#define LMDRXC_LMRTCG (1 << 17) /* Receive TCP Checksum check */
52#define LMDRXC_LMRICG (1 << 16) /* Receive IP Checksum check */
53#define LMDRXC_LMRFCE (1 << 9) /* Receive Flow Control Enable */
54#define LMDRXC_LMRB (1 << 6) /* Receive Broadcast */
55#define LMDRXC_LMRM (1 << 5) /* Receive Multicast */
56#define LMDRXC_LMRU (1 << 4) /* Receive Unicast */
57#define LMDRXC_LMRERR (1 << 3) /* Receive Error Frame */
58#define LMDRXC_LMRA (1 << 2) /* Receive All */
59#define LMDRXC_LMRE (1 << 1) /* RX Enable */
60
61/* Additional Station Address High */
62#define LMAAH_E (1 << 31) /* Address Enabled */
63
64
65#endif
diff --git a/include/asm-arm/arch-ks8695/regs-mem.h b/include/asm-arm/arch-ks8695/regs-mem.h
new file mode 100644
index 000000000000..76b38e0862e6
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-mem.h
@@ -0,0 +1,89 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-mem.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - Memory Controller registers and bit definitions
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_MEM_H
14#define KS8695_MEM_H
15
16#define KS8695_MEM_OFFSET (0xF0000 + 0x4000)
17#define KS8695_MEM_VA (KS8695_IO_VA + KS8695_MEM_OFFSET)
18#define KS8695_MEM_PA (KS8695_IO_PA + KS8695_MEM_OFFSET)
19
20
21/*
22 * Memory Controller Registers
23 */
24#define KS8695_EXTACON0 (0x00) /* External I/O 0 Access Control */
25#define KS8695_EXTACON1 (0x04) /* External I/O 1 Access Control */
26#define KS8695_EXTACON2 (0x08) /* External I/O 2 Access Control */
27#define KS8695_ROMCON0 (0x10) /* ROM/SRAM/Flash 1 Control Register */
28#define KS8695_ROMCON1 (0x14) /* ROM/SRAM/Flash 2 Control Register */
29#define KS8695_ERGCON (0x20) /* External I/O and ROM/SRAM/Flash General Register */
30#define KS8695_SDCON0 (0x30) /* SDRAM Control Register 0 */
31#define KS8695_SDCON1 (0x34) /* SDRAM Control Register 1 */
32#define KS8695_SDGCON (0x38) /* SDRAM General Control */
33#define KS8695_SDBCON (0x3c) /* SDRAM Buffer Control */
34#define KS8695_REFTIM (0x40) /* SDRAM Refresh Timer */
35
36
37/* External I/O Access Control Registers */
38#define EXTACON_EBNPTR (0x3ff << 22) /* Last Address Pointer */
39#define EXTACON_EBBPTR (0x3ff << 12) /* Base Pointer */
40#define EXTACON_EBTACT (7 << 9) /* Write Enable/Output Enable Active Time */
41#define EXTACON_EBTCOH (7 << 6) /* Chip Select Hold Time */
42#define EXTACON_EBTACS (7 << 3) /* Address Setup Time before ECSN */
43#define EXTACON_EBTCOS (7 << 0) /* Chip Select Time before OEN */
44
45/* ROM/SRAM/Flash Control Register */
46#define ROMCON_RBNPTR (0x3ff << 22) /* Next Pointer */
47#define ROMCON_RBBPTR (0x3ff << 12) /* Base Pointer */
48#define ROMCON_RBTACC (7 << 4) /* Access Cycle Time */
49#define ROMCON_RBTPA (3 << 2) /* Page Address Access Time */
50#define ROMCON_PMC (3 << 0) /* Page Mode Configuration */
51#define PMC_NORMAL (0 << 0)
52#define PMC_4WORD (1 << 0)
53#define PMC_8WORD (2 << 0)
54#define PMC_16WORD (3 << 0)
55
56/* External I/O and ROM/SRAM/Flash General Register */
57#define ERGCON_TMULT (3 << 28) /* Time Multiplier */
58#define ERGCON_DSX2 (3 << 20) /* Data Width (External I/O Bank 2) */
59#define ERGCON_DSX1 (3 << 18) /* Data Width (External I/O Bank 1) */
60#define ERGCON_DSX0 (3 << 16) /* Data Width (External I/O Bank 0) */
61#define ERGCON_DSR1 (3 << 2) /* Data Width (ROM/SRAM/Flash Bank 1) */
62#define ERGCON_DSR0 (3 << 0) /* Data Width (ROM/SRAM/Flash Bank 0) */
63
64/* SDRAM Control Register */
65#define SDCON_DBNPTR (0x3ff << 22) /* Last Address Pointer */
66#define SDCON_DBBPTR (0x3ff << 12) /* Base Pointer */
67#define SDCON_DBCAB (3 << 8) /* Column Address Bits */
68#define SDCON_DBBNUM (1 << 3) /* Number of Banks */
69#define SDCON_DBDBW (3 << 1) /* Data Bus Width */
70
71/* SDRAM General Control Register */
72#define SDGCON_SDTRC (3 << 2) /* RAS to CAS latency */
73#define SDGCON_SDCAS (3 << 0) /* CAS latency */
74
75/* SDRAM Buffer Control Register */
76#define SDBCON_SDESTA (1 << 31) /* SDRAM Engine Status */
77#define SDBCON_RBUFBDIS (1 << 24) /* Read Buffer Burst Enable */
78#define SDBCON_WFIFOEN (1 << 23) /* Write FIFO Enable */
79#define SDBCON_RBUFEN (1 << 22) /* Read Buffer Enable */
80#define SDBCON_FLUSHWFIFO (1 << 21) /* Flush Write FIFO */
81#define SDBCON_RBUFINV (1 << 20) /* Read Buffer Invalidate */
82#define SDBCON_SDINI (3 << 16) /* SDRAM Initialization Control */
83#define SDBCON_SDMODE (0x3fff << 0) /* SDRAM Mode Register Value Program */
84
85/* SDRAM Refresh Timer Register */
86#define REFTIM_REFTIM (0xffff << 0) /* Refresh Timer Value */
87
88
89#endif
diff --git a/include/asm-arm/arch-ks8695/regs-misc.h b/include/asm-arm/arch-ks8695/regs-misc.h
new file mode 100644
index 000000000000..632ca6601a94
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-misc.h
@@ -0,0 +1,97 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-misc.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - Miscellaneous Registers
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_MISC_H
14#define KS8695_MISC_H
15
16#define KS8695_MISC_OFFSET (0xF0000 + 0xEA00)
17#define KS8695_MISC_VA (KS8695_IO_VA + KS8695_MISC_OFFSET)
18#define KS8695_MISC_PA (KS8695_IO_PA + KS8695_MISC_OFFSET)
19
20
21/*
22 * Miscellaneous registers
23 */
24#define KS8695_DID (0x00) /* Device ID */
25#define KS8695_RID (0x04) /* Revision ID */
26#define KS8695_HMC (0x08) /* HPNA Miscellaneous Control [KS8695 only] */
27#define KS8695_WMC (0x0c) /* WAN Miscellaneous Control */
28#define KS8695_WPPM (0x10) /* WAN PHY Power Management */
29#define KS8695_PPS (0x1c) /* PHY PowerSave */
30
31/* Device ID Register */
32#define DID_ID (0xffff << 0) /* Device ID */
33
34/* Revision ID Register */
35#define RID_SUBID (0xf << 4) /* Sub-Device ID */
36#define RID_REVISION (0xf << 0) /* Revision ID */
37
38/* HPNA Miscellaneous Control Register */
39#define HMC_HSS (1 << 1) /* Speed */
40#define HMC_HDS (1 << 0) /* Duplex */
41
42/* WAN Miscellaneous Control Register */
43#define WMC_WANC (1 << 30) /* Auto-negotiation complete */
44#define WMC_WANR (1 << 29) /* Auto-negotiation restart */
45#define WMC_WANAP (1 << 28) /* Advertise Pause */
46#define WMC_WANA100F (1 << 27) /* Advertise 100 FDX */
47#define WMC_WANA100H (1 << 26) /* Advertise 100 HDX */
48#define WMC_WANA10F (1 << 25) /* Advertise 10 FDX */
49#define WMC_WANA10H (1 << 24) /* Advertise 10 HDX */
50#define WMC_WLS (1 << 23) /* Link status */
51#define WMC_WDS (1 << 22) /* Duplex status */
52#define WMC_WSS (1 << 21) /* Speed status */
53#define WMC_WLPP (1 << 20) /* Link Partner Pause */
54#define WMC_WLP100F (1 << 19) /* Link Partner 100 FDX */
55#define WMC_WLP100H (1 << 18) /* Link Partner 100 HDX */
56#define WMC_WLP10F (1 << 17) /* Link Partner 10 FDX */
57#define WMC_WLP10H (1 << 16) /* Link Partner 10 HDX */
58#define WMC_WAND (1 << 15) /* Auto-negotiation disable */
59#define WMC_WANF100 (1 << 14) /* Force 100 */
60#define WMC_WANFF (1 << 13) /* Force FDX */
61#define WMC_WLED1S (7 << 4) /* LED1 Select */
62#define WLED1S_SPEED (0 << 4)
63#define WLED1S_LINK (1 << 4)
64#define WLED1S_DUPLEX (2 << 4)
65#define WLED1S_COLLISION (3 << 4)
66#define WLED1S_ACTIVITY (4 << 4)
67#define WLED1S_FDX_COLLISION (5 << 4)
68#define WLED1S_LINK_ACTIVITY (6 << 4)
69#define WMC_WLED0S (7 << 0) /* LED0 Select */
70#define WLED0S_SPEED (0 << 0)
71#define WLED0S_LINK (1 << 0)
72#define WLED0S_DUPLEX (2 << 0)
73#define WLED0S_COLLISION (3 << 0)
74#define WLED0S_ACTIVITY (4 << 0)
75#define WLED0S_FDX_COLLISION (5 << 0)
76#define WLED0S_LINK_ACTIVITY (6 << 0)
77
78/* WAN PHY Power Management Register */
79#define WPPM_WLPBK (1 << 14) /* Local Loopback */
80#define WPPM_WRLPKB (1 << 13) /* Remove Loopback */
81#define WPPM_WPI (1 << 12) /* PHY isolate */
82#define WPPM_WFL (1 << 10) /* Force link */
83#define WPPM_MDIXS (1 << 9) /* MDIX Status */
84#define WPPM_FEF (1 << 8) /* Far End Fault */
85#define WPPM_AMDIXP (1 << 7) /* Auto MDIX Parameter */
86#define WPPM_TXDIS (1 << 6) /* Disable transmitter */
87#define WPPM_DFEF (1 << 5) /* Disable Far End Fault */
88#define WPPM_PD (1 << 4) /* Power Down */
89#define WPPM_DMDX (1 << 3) /* Disable Auto MDI/MDIX */
90#define WPPM_FMDX (1 << 2) /* Force MDIX */
91#define WPPM_LPBK (1 << 1) /* MAX Loopback */
92
93/* PHY Power Save Register */
94#define PPS_PPSM (1 << 0) /* PHY Power Save Mode */
95
96
97#endif
diff --git a/include/asm-arm/arch-ks8695/regs-pci.h b/include/asm-arm/arch-ks8695/regs-pci.h
new file mode 100644
index 000000000000..286d6d488df8
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-pci.h
@@ -0,0 +1,53 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-pci.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - PCI bridge registers and bit definitions.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#define KS8695_PCI_OFFSET (0xF0000 + 0x2000)
15#define KS8695_PCI_VA (KS8695_IO_VA + KS8695_PCI_OFFSET)
16#define KS8695_PCI_PA (KS8695_IO_PA + KS8695_PCI_OFFSET)
17
18
19#define KS8695_CRCFID (0x000) /* Configuration: Identification */
20#define KS8695_CRCFCS (0x004) /* Configuration: Command and Status */
21#define KS8695_CRCFRV (0x008) /* Configuration: Revision */
22#define KS8695_CRCFLT (0x00C) /* Configuration: Latency Timer */
23#define KS8695_CRCBMA (0x010) /* Configuration: Base Memory Address */
24#define KS8695_CRCSID (0x02C) /* Configuration: Subsystem ID */
25#define KS8695_CRCFIT (0x03C) /* Configuration: Interrupt */
26#define KS8695_PBCA (0x100) /* Bridge Configuration Address */
27#define KS8695_PBCD (0x104) /* Bridge Configuration Data */
28#define KS8695_PBM (0x200) /* Bridge Mode */
29#define KS8695_PBCS (0x204) /* Bridge Control and Status */
30#define KS8695_PMBA (0x208) /* Bridge Memory Base Address */
31#define KS8695_PMBAC (0x20C) /* Bridge Memory Base Address Control */
32#define KS8695_PMBAM (0x210) /* Bridge Memory Base Address Mask */
33#define KS8695_PMBAT (0x214) /* Bridge Memory Base Address Translation */
34#define KS8695_PIOBA (0x218) /* Bridge I/O Base Address */
35#define KS8695_PIOBAC (0x21C) /* Bridge I/O Base Address Control */
36#define KS8695_PIOBAM (0x220) /* Bridge I/O Base Address Mask */
37#define KS8695_PIOBAT (0x224) /* Bridge I/O Base Address Translation */
38
39
40/* Configuration: Identification */
41
42/* Configuration: Command and Status */
43
44/* Configuration: Revision */
45
46
47
48#define CFRV_GUEST (1 << 23)
49
50#define PBCA_TYPE1 (1)
51#define PBCA_ENABLE (1 << 31)
52
53
diff --git a/include/asm-arm/arch-ks8695/regs-switch.h b/include/asm-arm/arch-ks8695/regs-switch.h
new file mode 100644
index 000000000000..5f37be3f2f60
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-switch.h
@@ -0,0 +1,66 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-switch.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - Switch Registers and bit definitions.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_SWITCH_H
14#define KS8695_SWITCH_H
15
16#define KS8695_SWITCH_OFFSET (0xF0000 + 0xe800)
17#define KS8695_SWITCH_VA (KS8695_IO_VA + KS8695_SWITCH_OFFSET)
18#define KS8695_SWITCH_PA (KS8695_IO_PA + KS8695_SWITCH_OFFSET)
19
20
21/*
22 * Switch registers
23 */
24#define KS8695_SEC0 (0x00) /* Switch Engine Control 0 */
25#define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */
26#define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */
27
28#define KS8695_P(x)_C(z) (0xc0 + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */
29
30#define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */
31#define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */
32#define KS8695_SEIAC (0x50) /* Indirect Access Control */
33#define KS8695_SEIADH2 (0x54) /* Indirect Access Data High 2 */
34#define KS8695_SEIADH1 (0x58) /* Indirect Access Data High 1 */
35#define KS8695_SEIADL (0x5c) /* Indirect Access Data Low */
36#define KS8695_SEAFC (0x60) /* Advance Feature Control */
37#define KS8695_SEDSCPH (0x64) /* TOS Priority High */
38#define KS8695_SEDSCPL (0x68) /* TOS Priority Low */
39#define KS8695_SEMAH (0x6c) /* Switch Engine MAC Address High */
40#define KS8695_SEMAL (0x70) /* Switch Engine MAC Address Low */
41#define KS8695_LPPM12 (0x74) /* Port 1 & 2 PHY Power Management */
42#define KS8695_LPPM34 (0x78) /* Port 3 & 4 PHY Power Management */
43
44
45/* Switch Engine Control 0 */
46#define SEC0_LLED1S (7 << 25) /* LED1 Select */
47#define LLED1S_SPEED (0 << 25)
48#define LLED1S_LINK (1 << 25)
49#define LLED1S_DUPLEX (2 << 25)
50#define LLED1S_COLLISION (3 << 25)
51#define LLED1S_ACTIVITY (4 << 25)
52#define LLED1S_FDX_COLLISION (5 << 25)
53#define LLED1S_LINK_ACTIVITY (6 << 25)
54#define SEC0_LLED0S (7 << 22) /* LED0 Select */
55#define LLED0S_SPEED (0 << 22)
56#define LLED0S_LINK (1 << 22)
57#define LLED0S_DUPLEX (2 << 22)
58#define LLED0S_COLLISION (3 << 22)
59#define LLED0S_ACTIVITY (4 << 22)
60#define LLED0S_FDX_COLLISION (5 << 22)
61#define LLED0S_LINK_ACTIVITY (6 << 22)
62#define SEC0_ENABLE (1 << 0) /* Enable Switch */
63
64
65
66#endif
diff --git a/include/asm-arm/arch-ks8695/regs-sys.h b/include/asm-arm/arch-ks8695/regs-sys.h
new file mode 100644
index 000000000000..f3179815b8ee
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-sys.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-sys.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - System control registers and bit definitions
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef KS8695_SYS_H
15#define KS8695_SYS_H
16
17#define KS8695_SYS_OFFSET (0xF0000 + 0x0000)
18#define KS8695_SYS_VA (KS8695_IO_VA + KS8695_SYS_OFFSET)
19#define KS8695_SYS_PA (KS8695_IO_PA + KS8695_SYS_OFFSET)
20
21
22#define KS8695_SYSCFG (0x00) /* System Configuration Register */
23#define KS8695_CLKCON (0x04) /* System Clock and Bus Control Register */
24
25
26/* System Configuration Register */
27#define SYSCFG_SPRBP (0x3ff << 16) /* Register Bank Base Pointer */
28
29/* System Clock and Bus Control Register */
30#define CLKCON_SFMODE (1 << 8) /* System Fast Mode for Simulation */
31#define CLKCON_SCDC (7 << 0) /* System Clock Divider Select */
32
33
34#endif
diff --git a/include/asm-arm/arch-ks8695/regs-timer.h b/include/asm-arm/arch-ks8695/regs-timer.h
new file mode 100644
index 000000000000..0a9f7f99ec52
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-timer.h
@@ -0,0 +1,40 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-timer.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - Timer registers and bit definitions.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef KS8695_TIMER_H
15#define KS8695_TIMER_H
16
17#define KS8695_TMR_OFFSET (0xF0000 + 0xE400)
18#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET)
19#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET)
20
21
22/*
23 * Timer registers
24 */
25#define KS8695_TMCON (0x00) /* Timer Control Register */
26#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */
27#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */
28#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */
29#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */
30
31
32/* Timer Control Register */
33#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */
34#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */
35
36/* Timer0 Timeout Counter Register */
37#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */
38
39
40#endif
diff --git a/include/asm-arm/arch-ks8695/regs-uart.h b/include/asm-arm/arch-ks8695/regs-uart.h
new file mode 100644
index 000000000000..a27cb20502a3
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-uart.h
@@ -0,0 +1,92 @@
1/*
2 * linux/include/asm-arm/arch-ks8695/regs-uart.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - UART register and bit definitions.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef KS8695_UART_H
15#define KS8695_UART_H
16
17#define KS8695_UART_OFFSET (0xF0000 + 0xE000)
18#define KS8695_UART_VA (KS8695_IO_VA + KS8695_UART_OFFSET)
19#define KS8695_UART_PA (KS8695_IO_PA + KS8695_UART_OFFSET)
20
21
22/*
23 * UART registers
24 */
25#define KS8695_URRB (0x00) /* Receive Buffer Register */
26#define KS8695_URTH (0x04) /* Transmit Holding Register */
27#define KS8695_URFC (0x08) /* FIFO Control Register */
28#define KS8695_URLC (0x0C) /* Line Control Register */
29#define KS8695_URMC (0x10) /* Modem Control Register */
30#define KS8695_URLS (0x14) /* Line Status Register */
31#define KS8695_URMS (0x18) /* Modem Status Register */
32#define KS8695_URBD (0x1C) /* Baud Rate Divisor Register */
33#define KS8695_USR (0x20) /* Status Register */
34
35
36/* FIFO Control Register */
37#define URFC_URFRT (3 << 6) /* Receive FIFO Trigger Level */
38#define URFC_URFRT_1 (0 << 6)
39#define URFC_URFRT_4 (1 << 6)
40#define URFC_URFRT_8 (2 << 6)
41#define URFC_URFRT_14 (3 << 6)
42#define URFC_URTFR (1 << 2) /* Transmit FIFO Reset */
43#define URFC_URRFR (1 << 1) /* Receive FIFO Reset */
44#define URFC_URFE (1 << 0) /* FIFO Enable */
45
46/* Line Control Register */
47#define URLC_URSBC (1 << 6) /* Set Break Condition */
48#define URLC_PARITY (7 << 3) /* Parity */
49#define URPE_NONE (0 << 3)
50#define URPE_ODD (1 << 3)
51#define URPE_EVEN (3 << 3)
52#define URPE_MARK (5 << 3)
53#define URPE_SPACE (7 << 3)
54#define URLC_URSB (1 << 2) /* Stop Bits */
55#define URLC_URCL (3 << 0) /* Character Length */
56#define URCL_5 (0 << 0)
57#define URCL_6 (1 << 0)
58#define URCL_7 (2 << 0)
59#define URCL_8 (3 << 0)
60
61/* Modem Control Register */
62#define URMC_URLB (1 << 4) /* Loop-back mode */
63#define URMC_UROUT2 (1 << 3) /* OUT2 signal */
64#define URMC_UROUT1 (1 << 2) /* OUT1 signal */
65#define URMC_URRTS (1 << 1) /* Request to Send */
66#define URMC_URDTR (1 << 0) /* Data Terminal Ready */
67
68/* Line Status Register */
69#define URLS_URRFE (1 << 7) /* Receive FIFO Error */
70#define URLS_URTE (1 << 6) /* Transmit Empty */
71#define URLS_URTHRE (1 << 5) /* Transmit Holding Register Empty */
72#define URLS_URBI (1 << 4) /* Break Interrupt */
73#define URLS_URFE (1 << 3) /* Framing Error */
74#define URLS_URPE (1 << 2) /* Parity Error */
75#define URLS_URROE (1 << 1) /* Receive Overrun Error */
76#define URLS_URDR (1 << 0) /* Receive Data Ready */
77
78/* Modem Status Register */
79#define URMS_URDCD (1 << 7) /* Data Carrier Detect */
80#define URMS_URRI (1 << 6) /* Ring Indicator */
81#define URMS_URDSR (1 << 5) /* Data Set Ready */
82#define URMS_URCTS (1 << 4) /* Clear to Send */
83#define URMS_URDDCD (1 << 3) /* Delta Data Carrier Detect */
84#define URMS_URTERI (1 << 2) /* Trailing Edge Ring Indicator */
85#define URMS_URDDST (1 << 1) /* Delta Data Set Ready */
86#define URMS_URDCTS (1 << 0) /* Delta Clear to Send */
87
88/* Status Register */
89#define USR_UTI (1 << 0) /* Timeout Indication */
90
91
92#endif
diff --git a/include/asm-arm/arch-ks8695/regs-wan.h b/include/asm-arm/arch-ks8695/regs-wan.h
new file mode 100644
index 000000000000..52e35b0d65e4
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-wan.h
@@ -0,0 +1,65 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-wan.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * KS8695 - WAN Registers and bit definitions.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef KS8695_WAN_H
14#define KS8695_WAN_H
15
16#define KS8695_WAN_OFFSET (0xF0000 + 0x6000)
17#define KS8695_WAN_VA (KS8695_IO_VA + KS8695_WAN_OFFSET)
18#define KS8695_WAN_PA (KS8695_IO_PA + KS8695_WAN_OFFSET)
19
20
21/*
22 * WAN registers
23 */
24#define KS8695_WMDTXC (0x00) /* DMA Transmit Control */
25#define KS8695_WMDRXC (0x04) /* DMA Receive Control */
26#define KS8695_WMDTSC (0x08) /* DMA Transmit Start Command */
27#define KS8695_WMDRSC (0x0c) /* DMA Receive Start Command */
28#define KS8695_WTDLB (0x10) /* Transmit Descriptor List Base Address */
29#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_WMAL (0x18) /* MAC Station Address Low */
31#define KS8695_WMAH (0x1c) /* MAC Station Address High */
32#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34
35
36/* DMA Transmit Control Register */
37#define WMDTXC_WMTRST (1 << 31) /* Soft Reset */
38#define WMDTXC_WMTBS (0x3f << 24) /* Transmit Burst Size */
39#define WMDTXC_WMTUCG (1 << 18) /* Transmit UDP Checksum Generate */
40#define WMDTXC_WMTTCG (1 << 17) /* Transmit TCP Checksum Generate */
41#define WMDTXC_WMTICG (1 << 16) /* Transmit IP Checksum Generate */
42#define WMDTXC_WMTFCE (1 << 9) /* Transmit Flow Control Enable */
43#define WMDTXC_WMTLB (1 << 8) /* Loopback mode */
44#define WMDTXC_WMTEP (1 << 2) /* Transmit Enable Padding */
45#define WMDTXC_WMTAC (1 << 1) /* Transmit Add CRC */
46#define WMDTXC_WMTE (1 << 0) /* TX Enable */
47
48/* DMA Receive Control Register */
49#define WMDRXC_WMRBS (0x3f << 24) /* Receive Burst Size */
50#define WMDRXC_WMRUCC (1 << 18) /* Receive UDP Checksum check */
51#define WMDRXC_WMRTCG (1 << 17) /* Receive TCP Checksum check */
52#define WMDRXC_WMRICG (1 << 16) /* Receive IP Checksum check */
53#define WMDRXC_WMRFCE (1 << 9) /* Receive Flow Control Enable */
54#define WMDRXC_WMRB (1 << 6) /* Receive Broadcast */
55#define WMDRXC_WMRM (1 << 5) /* Receive Multicast */
56#define WMDRXC_WMRU (1 << 4) /* Receive Unicast */
57#define WMDRXC_WMRERR (1 << 3) /* Receive Error Frame */
58#define WMDRXC_WMRA (1 << 2) /* Receive All */
59#define WMDRXC_WMRE (1 << 0) /* RX Enable */
60
61/* Additional Station Address High */
62#define WMAAH_E (1 << 31) /* Address Enabled */
63
64
65#endif
diff --git a/include/asm-arm/arch-ks8695/system.h b/include/asm-arm/arch-ks8695/system.h
new file mode 100644
index 000000000000..3bc28106d937
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/system.h
@@ -0,0 +1,48 @@
1/*
2 * include/asm-arm/arch-s3c2410/system.h
3 *
4 * Copyright (C) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * KS8695 - System function defines and includes
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H
16
17#include <asm/io.h>
18#include <asm/arch/regs-timer.h>
19
20static void arch_idle(void)
21{
22 /*
23 * This should do all the clock switching
24 * and wait for interrupt tricks,
25 */
26 cpu_do_idle();
27
28}
29
30static void arch_reset(char mode)
31{
32 unsigned int reg;
33
34 if (mode == 's')
35 cpu_reset(0);
36
37 /* disable timer0 */
38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
39 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
40
41 /* enable watchdog mode */
42 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
43
44 /* re-enable timer0 */
45 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
46}
47
48#endif
diff --git a/include/asm-arm/arch-ks8695/timex.h b/include/asm-arm/arch-ks8695/timex.h
new file mode 100644
index 000000000000..8320d528b903
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/timex.h
@@ -0,0 +1,20 @@
1/*
2 * include/asm-arm/arch-ks8695/timex.h
3 *
4 * Copyright (C) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * KS8695 - Time Parameters
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_TIMEX_H
15#define __ASM_ARCH_TIMEX_H
16
17/* timers are derived from MCLK, which is 25MHz */
18#define CLOCK_TICK_RATE 25000000
19
20#endif
diff --git a/include/asm-arm/arch-ks8695/uncompress.h b/include/asm-arm/arch-ks8695/uncompress.h
new file mode 100644
index 000000000000..733a50855b5d
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/uncompress.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-arm/arch-ks8695/uncompress.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - Kernel uncompressor
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_UNCOMPRESS_H
15#define __ASM_ARCH_UNCOMPRESS_H
16
17#include <asm/io.h>
18#include <asm/arch/regs-uart.h>
19
20static void putc(char c)
21{
22 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE))
23 barrier();
24
25 __raw_writel(c, KS8695_UART_PA + KS8695_URTH);
26}
27
28static inline void flush(void)
29{
30 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE))
31 barrier();
32}
33
34#define arch_decomp_setup()
35#define arch_decomp_wdog()
36
37#endif
diff --git a/include/asm-arm/arch-ks8695/vmalloc.h b/include/asm-arm/arch-ks8695/vmalloc.h
new file mode 100644
index 000000000000..d1d88e58117d
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/vmalloc.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-arm/arch-ks8695/vmalloc.h
3 *
4 * Copyright (C) 2006 Ben Dooks
5 * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk>
6 *
7 * KS8695 vmalloc definition
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_VMALLOC_H
15#define __ASM_ARCH_VMALLOC_H
16
17#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK)
18
19#endif
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 828cc5c114e1..f1ec2edd4040 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -421,7 +421,9 @@ enum omap24xx_index {
421 /* 24xx clock */ 421 /* 24xx clock */
422 W14_24XX_SYS_CLKOUT, 422 W14_24XX_SYS_CLKOUT,
423 423
424 /* 24xx GPMC wait pin monitoring */ 424 /* 24xx GPMC chipselects, wait pin monitoring */
425 E2_GPMC_NCS2,
426 L2_GPMC_NCS7,
425 L3_GPMC_WAIT0, 427 L3_GPMC_WAIT0,
426 N7_GPMC_WAIT1, 428 N7_GPMC_WAIT1,
427 M1_GPMC_WAIT2, 429 M1_GPMC_WAIT2,
@@ -435,6 +437,7 @@ enum omap24xx_index {
435 437
436 /* 24xx GPIO */ 438 /* 24xx GPIO */
437 M21_242X_GPIO11, 439 M21_242X_GPIO11,
440 P21_242X_GPIO12,
438 AA10_242X_GPIO13, 441 AA10_242X_GPIO13,
439 AA6_242X_GPIO14, 442 AA6_242X_GPIO14,
440 AA4_242X_GPIO15, 443 AA4_242X_GPIO15,
@@ -444,7 +447,9 @@ enum omap24xx_index {
444 Y20_24XX_GPIO60, 447 Y20_24XX_GPIO60,
445 W4__24XX_GPIO74, 448 W4__24XX_GPIO74,
446 M15_24XX_GPIO92, 449 M15_24XX_GPIO92,
450 J15_24XX_GPIO99,
447 V14_24XX_GPIO117, 451 V14_24XX_GPIO117,
452 P14_24XX_GPIO125,
448 453
449 /* 242x DBG GPIO */ 454 /* 242x DBG GPIO */
450 V4_242X_GPIO49, 455 V4_242X_GPIO49,
@@ -486,6 +491,30 @@ enum omap24xx_index {
486 G18_24XX_MMC_CMD_DIR, 491 G18_24XX_MMC_CMD_DIR,
487 H15_24XX_MMC_CLKI, 492 H15_24XX_MMC_CLKI,
488 493
494 /* Full speed USB */
495 J20_24XX_USB0_PUEN,
496 J19_24XX_USB0_VP,
497 K20_24XX_USB0_VM,
498 J18_24XX_USB0_RCV,
499 K19_24XX_USB0_TXEN,
500 J14_24XX_USB0_SE0,
501 K18_24XX_USB0_DAT,
502
503 N14_24XX_USB1_SE0,
504 W12_24XX_USB1_SE0,
505 P15_24XX_USB1_DAT,
506 R13_24XX_USB1_DAT,
507 W20_24XX_USB1_TXEN,
508 P13_24XX_USB1_TXEN,
509 V19_24XX_USB1_RCV,
510 V12_24XX_USB1_RCV,
511
512 AA10_24XX_USB2_SE0,
513 Y11_24XX_USB2_DAT,
514 AA12_24XX_USB2_TXEN,
515 AA6_24XX_USB2_RCV,
516 AA4_24XX_USB2_TLLSE0,
517
489 /* Keypad GPIO*/ 518 /* Keypad GPIO*/
490 T19_24XX_KBR0, 519 T19_24XX_KBR0,
491 R19_24XX_KBR1, 520 R19_24XX_KBR1,
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
index 138838d4ad75..3b4e2076603a 100644
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -14,6 +14,7 @@
14 .endm 14 .endm
15 15
16 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
17 .endm 18 .endm
18 19
19 .macro arch_ret_to_user, tmp1, tmp2 20 .macro arch_ret_to_user, tmp1, tmp2
@@ -40,7 +41,6 @@
40 41
41 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
42 43
43 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
44 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ 44 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
45 45
46 ldr \tmp, =1021 46 ldr \tmp, =1021
diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S
index 0cfb89b229d1..038b761fdadc 100644
--- a/include/asm-arm/arch-rpc/entry-macro.S
+++ b/include/asm-arm/arch-rpc/entry-macro.S
@@ -1,6 +1,14 @@
1#include <asm/hardware.h> 1#include <asm/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S> 2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
3 .macro get_irqnr_preamble, base, tmp 7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
4 .endm 12 .endm
5 13
6 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h b/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
index cd9e26568f85..c1414658d1c5 100644
--- a/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
+++ b/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
@@ -129,6 +129,7 @@
129#define S3C2443_PCLKCON_IIC (1<<4) 129#define S3C2443_PCLKCON_IIC (1<<4)
130#define S3C2443_PCLKCON_SDI (1<<5) 130#define S3C2443_PCLKCON_SDI (1<<5)
131#define S3C2443_PCLKCON_ADC (1<<7) 131#define S3C2443_PCLKCON_ADC (1<<7)
132#define S3C2443_PCLKCON_AC97 (1<<8)
132#define S3C2443_PCLKCON_IIS (1<<9) 133#define S3C2443_PCLKCON_IIS (1<<9)
133#define S3C2443_PCLKCON_PWMT (1<<10) 134#define S3C2443_PCLKCON_PWMT (1<<10)
134#define S3C2443_PCLKCON_WDT (1<<11) 135#define S3C2443_PCLKCON_WDT (1<<11)
diff --git a/include/asm-arm/arch-sa1100/entry-macro.S b/include/asm-arm/arch-sa1100/entry-macro.S
index 028967629340..127db4aaf4f2 100644
--- a/include/asm-arm/arch-sa1100/entry-macro.S
+++ b/include/asm-arm/arch-sa1100/entry-macro.S
@@ -12,16 +12,16 @@
12 .endm 12 .endm
13 13
14 .macro get_irqnr_preamble, base, tmp 14 .macro get_irqnr_preamble, base, tmp
15 mov \base, #0xfa000000 @ ICIP = 0xfa050000
16 add \base, \base, #0x00050000
15 .endm 17 .endm
16 18
17 .macro arch_ret_to_user, tmp1, tmp2 19 .macro arch_ret_to_user, tmp1, tmp2
18 .endm 20 .endm
19 21
20 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
21 mov r4, #0xfa000000 @ ICIP = 0xfa050000 23 ldr \irqstat, [\base] @ get irqs
22 add r4, r4, #0x00050000 24 ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004
23 ldr \irqstat, [r4] @ get irqs
24 ldr \irqnr, [r4, #4] @ ICMR = 0xfa050004
25 ands \irqstat, \irqstat, \irqnr 25 ands \irqstat, \irqstat, \irqnr
26 mov \irqnr, #0 26 mov \irqnr, #0
27 beq 1001f 27 beq 1001f
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index 0fae002637a0..924d1a8fe360 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -14,13 +14,13 @@
14 .endm 14 .endm
15 15
16 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
17 .endm 18 .endm
18 19
19 .macro arch_ret_to_user, tmp1, tmp2 20 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 21 .endm
21 22
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
24 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status 24 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
25 mov \irqnr, #0 25 mov \irqnr, #0
26 teq \irqstat, #0 26 teq \irqstat, #0
diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h
index 3a6d3eb27622..684fe0645239 100644
--- a/include/asm-arm/ecard.h
+++ b/include/asm-arm/ecard.h
@@ -121,7 +121,7 @@ struct in_ecid { /* Packed card ID information */
121typedef struct expansion_card ecard_t; 121typedef struct expansion_card ecard_t;
122typedef unsigned long *loader_t; 122typedef unsigned long *loader_t;
123 123
124typedef struct { /* Card handler routines */ 124typedef struct expansion_card_ops { /* Card handler routines */
125 void (*irqenable)(ecard_t *ec, int irqnr); 125 void (*irqenable)(ecard_t *ec, int irqnr);
126 void (*irqdisable)(ecard_t *ec, int irqnr); 126 void (*irqdisable)(ecard_t *ec, int irqnr);
127 int (*irqpending)(ecard_t *ec); 127 int (*irqpending)(ecard_t *ec);
@@ -179,6 +179,8 @@ struct expansion_card {
179 u64 dma_mask; 179 u64 dma_mask;
180}; 180};
181 181
182void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *ops, void *irq_data);
183
182struct in_chunk_dir { 184struct in_chunk_dir {
183 unsigned int start_offset; 185 unsigned int start_offset;
184 union { 186 union {
@@ -224,6 +226,10 @@ ecard_address(struct expansion_card *ec, card_type_t type, card_speed_t speed)
224extern int ecard_request_resources(struct expansion_card *ec); 226extern int ecard_request_resources(struct expansion_card *ec);
225extern void ecard_release_resources(struct expansion_card *ec); 227extern void ecard_release_resources(struct expansion_card *ec);
226 228
229void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res,
230 unsigned long offset, unsigned long maxsize);
231#define ecardm_iounmap(__ec, __addr) devm_iounmap(&(__ec)->dev, __addr)
232
227extern struct bus_type ecard_bus_type; 233extern struct bus_type ecard_bus_type;
228 234
229#define ECARD_DEV(_d) container_of((_d), struct expansion_card, dev) 235#define ECARD_DEV(_d) container_of((_d), struct expansion_card, dev)
diff --git a/include/asm-arm/hardware/entry-macro-iomd.S b/include/asm-arm/hardware/entry-macro-iomd.S
index fbed08f298d0..9bb580a5b15e 100644
--- a/include/asm-arm/hardware/entry-macro-iomd.S
+++ b/include/asm-arm/hardware/entry-macro-iomd.S
@@ -11,8 +11,6 @@
11/* IOC / IOMD based hardware */ 11/* IOC / IOMD based hardware */
12#include <asm/hardware/iomd.h> 12#include <asm/hardware/iomd.h>
13 13
14 .equ ioc_base_high, IOC_BASE & 0xff000000
15 .equ ioc_base_low, IOC_BASE & 0x00ff0000
16 .macro disable_fiq 14 .macro disable_fiq
17 mov r12, #ioc_base_high 15 mov r12, #ioc_base_high
18 .if ioc_base_low 16 .if ioc_base_low
@@ -22,33 +20,29 @@
22 .endm 20 .endm
23 21
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 mov r4, #ioc_base_high @ point at IOC 23 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
26 .if ioc_base_low 24 ldr \tmp, =irq_prio_h
27 orr r4, r4, #ioc_base_low
28 .endif
29 ldrb \irqstat, [r4, #IOMD_IRQREQB] @ get high priority first
30 ldr \base, =irq_prio_h
31 teq \irqstat, #0 25 teq \irqstat, #0
32#ifdef IOMD_BASE 26#ifdef IOMD_BASE
33 ldreqb \irqstat, [r4, #IOMD_DMAREQ] @ get dma 27 ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma
34 addeq \base, \base, #256 @ irq_prio_h table size 28 addeq \tmp, \tmp, #256 @ irq_prio_h table size
35 teqeq \irqstat, #0 29 teqeq \irqstat, #0
36 bne 2406f 30 bne 2406f
37#endif 31#endif
38 ldreqb \irqstat, [r4, #IOMD_IRQREQA] @ get low priority 32 ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority
39 addeq \base, \base, #256 @ irq_prio_d table size 33 addeq \tmp, \tmp, #256 @ irq_prio_d table size
40 teqeq \irqstat, #0 34 teqeq \irqstat, #0
41#ifdef IOMD_IRQREQC 35#ifdef IOMD_IRQREQC
42 ldreqb \irqstat, [r4, #IOMD_IRQREQC] 36 ldreqb \irqstat, [\base, #IOMD_IRQREQC]
43 addeq \base, \base, #256 @ irq_prio_l table size 37 addeq \tmp, \tmp, #256 @ irq_prio_l table size
44 teqeq \irqstat, #0 38 teqeq \irqstat, #0
45#endif 39#endif
46#ifdef IOMD_IRQREQD 40#ifdef IOMD_IRQREQD
47 ldreqb \irqstat, [r4, #IOMD_IRQREQD] 41 ldreqb \irqstat, [\base, #IOMD_IRQREQD]
48 addeq \base, \base, #256 @ irq_prio_lc table size 42 addeq \tmp, \tmp, #256 @ irq_prio_lc table size
49 teqeq \irqstat, #0 43 teqeq \irqstat, #0
50#endif 44#endif
512406: ldrneb \irqnr, [\base, \irqstat] @ get IRQ number 452406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number
52 .endm 46 .endm
53 47
54/* 48/*
diff --git a/include/asm-arm/sizes.h b/include/asm-arm/sizes.h
index 7f50ae0edf1b..503843db1565 100644
--- a/include/asm-arm/sizes.h
+++ b/include/asm-arm/sizes.h
@@ -24,6 +24,10 @@
24#define __sizes_h 1 24#define __sizes_h 1
25 25
26/* handy sizes */ 26/* handy sizes */
27#define SZ_16 0x00000010
28#define SZ_256 0x00000100
29#define SZ_512 0x00000200
30
27#define SZ_1K 0x00000400 31#define SZ_1K 0x00000400
28#define SZ_4K 0x00001000 32#define SZ_4K 0x00001000
29#define SZ_8K 0x00002000 33#define SZ_8K 0x00002000
diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
index 2bdc5bd6f793..a762f42cbb71 100644
--- a/include/asm-avr32/arch-at32ap/cpu.h
+++ b/include/asm-avr32/arch-at32ap/cpu.h
@@ -29,5 +29,6 @@
29#define cpu_is_at91sam9260() (0) 29#define cpu_is_at91sam9260() (0)
30#define cpu_is_at91sam9261() (0) 30#define cpu_is_at91sam9261() (0)
31#define cpu_is_at91sam9263() (0) 31#define cpu_is_at91sam9263() (0)
32#define cpu_is_at91sam9rl() (0)
32 33
33#endif /* __ASM_ARCH_CPU_H */ 34#endif /* __ASM_ARCH_CPU_H */
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index aa2653a159f4..a3ac4c896831 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -139,6 +139,10 @@
139/* Blackfin bf5xx */ 139/* Blackfin bf5xx */
140#define PORT_BFIN 75 140#define PORT_BFIN 75
141 141
142/* Micrel KS8695 */
143#define PORT_KS8695 76
144
145
142#ifdef __KERNEL__ 146#ifdef __KERNEL__
143 147
144#include <linux/compiler.h> 148#include <linux/compiler.h>