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-rw-r--r--arch/sparc64/kernel/pci_psycho.c28
-rw-r--r--arch/sparc64/kernel/pci_sabre.c18
-rw-r--r--arch/sparc64/kernel/pci_schizo.c104
3 files changed, 104 insertions, 46 deletions
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 401e5dfe9bd5..2edcb1dd13c3 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -836,6 +836,7 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
836 struct of_device *op = of_find_device_by_node(pbm->prom_node); 836 struct of_device *op = of_find_device_by_node(pbm->prom_node);
837 unsigned long base = pbm->controller_regs; 837 unsigned long base = pbm->controller_regs;
838 u64 tmp; 838 u64 tmp;
839 int err;
839 840
840 if (!op) 841 if (!op)
841 return; 842 return;
@@ -852,12 +853,27 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
852 if (op->num_irqs < 6) 853 if (op->num_irqs < 6)
853 return; 854 return;
854 855
855 request_irq(op->irqs[1], psycho_ue_intr, 0, 856 /* We really mean to ignore the return result here. Two
856 "PSYCHO_UE", pbm); 857 * PCI controller share the same interrupt numbers and
857 request_irq(op->irqs[2], psycho_ce_intr, 0, 858 * drive the same front-end hardware. Whichever of the
858 "PSYCHO_CE", pbm); 859 * two get in here first will register the IRQ handler
859 request_irq(op->irqs[0], psycho_pcierr_intr, 0, 860 * the second will just error out since we do not pass in
860 "PSYCHO_PCIERR", pbm); 861 * IRQF_SHARED.
862 */
863 err = request_irq(op->irqs[1], psycho_ue_intr, 0,
864 "PSYCHO_UE", pbm);
865 err = request_irq(op->irqs[2], psycho_ce_intr, 0,
866 "PSYCHO_CE", pbm);
867
868 /* This one, however, ought not to fail. We can just warn
869 * about it since the system can still operate properly even
870 * if this fails.
871 */
872 err = request_irq(op->irqs[0], psycho_pcierr_intr, 0,
873 "PSYCHO_PCIERR", pbm);
874 if (err)
875 printk(KERN_WARNING "%s: Could not register PCIERR, "
876 "err=%d\n", pbm->name, err);
861 877
862 /* Enable UE and CE interrupts for controller. */ 878 /* Enable UE and CE interrupts for controller. */
863 psycho_write(base + PSYCHO_ECC_CTRL, 879 psycho_write(base + PSYCHO_ECC_CTRL,
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 863308c8955d..4cefe6e83b24 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -831,6 +831,7 @@ static void sabre_register_error_handlers(struct pci_pbm_info *pbm)
831 struct of_device *op; 831 struct of_device *op;
832 unsigned long base = pbm->controller_regs; 832 unsigned long base = pbm->controller_regs;
833 u64 tmp; 833 u64 tmp;
834 int err;
834 835
835 if (pbm->chip_type == PBM_CHIP_TYPE_SABRE) 836 if (pbm->chip_type == PBM_CHIP_TYPE_SABRE)
836 dp = dp->parent; 837 dp = dp->parent;
@@ -857,15 +858,24 @@ static void sabre_register_error_handlers(struct pci_pbm_info *pbm)
857 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | 858 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
858 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); 859 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
859 860
860 request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", pbm); 861 err = request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", pbm);
862 if (err)
863 printk(KERN_WARNING "%s: Couldn't register UE, err=%d.\n",
864 pbm->name, err);
861 865
862 sabre_write(base + SABRE_CE_AFSR, 866 sabre_write(base + SABRE_CE_AFSR,
863 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | 867 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
864 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); 868 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
865 869
866 request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", pbm); 870 err = request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", pbm);
867 request_irq(op->irqs[0], sabre_pcierr_intr, 0, 871 if (err)
868 "SABRE_PCIERR", pbm); 872 printk(KERN_WARNING "%s: Couldn't register CE, err=%d.\n",
873 pbm->name, err);
874 err = request_irq(op->irqs[0], sabre_pcierr_intr, 0,
875 "SABRE_PCIERR", pbm);
876 if (err)
877 printk(KERN_WARNING "%s: Couldn't register PCIERR, err=%d.\n",
878 pbm->name, err);
869 879
870 tmp = sabre_read(base + SABRE_PCICTRL); 880 tmp = sabre_read(base + SABRE_PCICTRL);
871 tmp |= SABRE_PCICTRL_ERREN; 881 tmp |= SABRE_PCICTRL_ERREN;
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 312f3e4f2ed4..e375d72b8eed 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -984,6 +984,7 @@ static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm)
984{ 984{
985 struct of_device *op = of_find_device_by_node(pbm->prom_node); 985 struct of_device *op = of_find_device_by_node(pbm->prom_node);
986 u64 tmp, err_mask, err_no_mask; 986 u64 tmp, err_mask, err_no_mask;
987 int err;
987 988
988 /* Tomatillo IRQ property layout is: 989 /* Tomatillo IRQ property layout is:
989 * 0: PCIERR 990 * 0: PCIERR
@@ -993,24 +994,39 @@ static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm)
993 * 4: POWER FAIL? 994 * 4: POWER FAIL?
994 */ 995 */
995 996
996 if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) 997 if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) {
997 request_irq(op->irqs[1], schizo_ue_intr, 0, 998 err = request_irq(op->irqs[1], schizo_ue_intr, 0,
998 "TOMATILLO_UE", pbm); 999 "TOMATILLO_UE", pbm);
999 1000 if (err)
1000 if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) 1001 printk(KERN_WARNING "%s: Could not register UE, "
1001 request_irq(op->irqs[2], schizo_ce_intr, 0, 1002 "err=%d\n", pbm->name, err);
1002 "TOMATILLO_CE", pbm); 1003 }
1003 1004 if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) {
1004 if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) 1005 err = request_irq(op->irqs[2], schizo_ce_intr, 0,
1005 request_irq(op->irqs[0], schizo_pcierr_intr, 0, 1006 "TOMATILLO_CE", pbm);
1006 "TOMATILLO_PCIERR", pbm); 1007 if (err)
1007 else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) 1008 printk(KERN_WARNING "%s: Could not register CE, "
1008 request_irq(op->irqs[0], schizo_pcierr_intr, 0, 1009 "err=%d\n", pbm->name, err);
1009 "TOMATILLO_PCIERR", pbm); 1010 }
1010 1011 err = 0;
1011 if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) 1012 if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) {
1012 request_irq(op->irqs[3], schizo_safarierr_intr, 0, 1013 err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
1013 "TOMATILLO_SERR", pbm); 1014 "TOMATILLO_PCIERR", pbm);
1015 } else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) {
1016 err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
1017 "TOMATILLO_PCIERR", pbm);
1018 }
1019 if (err)
1020 printk(KERN_WARNING "%s: Could not register PCIERR, "
1021 "err=%d\n", pbm->name, err);
1022
1023 if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) {
1024 err = request_irq(op->irqs[3], schizo_safarierr_intr, 0,
1025 "TOMATILLO_SERR", pbm);
1026 if (err)
1027 printk(KERN_WARNING "%s: Could not register SERR, "
1028 "err=%d\n", pbm->name, err);
1029 }
1014 1030
1015 /* Enable UE and CE interrupts for controller. */ 1031 /* Enable UE and CE interrupts for controller. */
1016 schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL, 1032 schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL,
@@ -1064,6 +1080,7 @@ static void schizo_register_error_handlers(struct pci_pbm_info *pbm)
1064{ 1080{
1065 struct of_device *op = of_find_device_by_node(pbm->prom_node); 1081 struct of_device *op = of_find_device_by_node(pbm->prom_node);
1066 u64 tmp, err_mask, err_no_mask; 1082 u64 tmp, err_mask, err_no_mask;
1083 int err;
1067 1084
1068 /* Schizo IRQ property layout is: 1085 /* Schizo IRQ property layout is:
1069 * 0: PCIERR 1086 * 0: PCIERR
@@ -1073,24 +1090,39 @@ static void schizo_register_error_handlers(struct pci_pbm_info *pbm)
1073 * 4: POWER FAIL? 1090 * 4: POWER FAIL?
1074 */ 1091 */
1075 1092
1076 if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) 1093 if (pbm_routes_this_ino(pbm, SCHIZO_UE_INO)) {
1077 request_irq(op->irqs[1], schizo_ue_intr, 0, 1094 err = request_irq(op->irqs[1], schizo_ue_intr, 0,
1078 "SCHIZO_UE", pbm); 1095 "SCHIZO_UE", pbm);
1079 1096 if (err)
1080 if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) 1097 printk(KERN_WARNING "%s: Could not register UE, "
1081 request_irq(op->irqs[2], schizo_ce_intr, 0, 1098 "err=%d\n", pbm->name, err);
1082 "SCHIZO_CE", pbm); 1099 }
1083 1100 if (pbm_routes_this_ino(pbm, SCHIZO_CE_INO)) {
1084 if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) 1101 err = request_irq(op->irqs[2], schizo_ce_intr, 0,
1085 request_irq(op->irqs[0], schizo_pcierr_intr, 0, 1102 "SCHIZO_CE", pbm);
1086 "SCHIZO_PCIERR", pbm); 1103 if (err)
1087 else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) 1104 printk(KERN_WARNING "%s: Could not register CE, "
1088 request_irq(op->irqs[0], schizo_pcierr_intr, 0, 1105 "err=%d\n", pbm->name, err);
1089 "SCHIZO_PCIERR", pbm); 1106 }
1090 1107 err = 0;
1091 if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) 1108 if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_A_INO)) {
1092 request_irq(op->irqs[3], schizo_safarierr_intr, 0, 1109 err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
1093 "SCHIZO_SERR", pbm); 1110 "SCHIZO_PCIERR", pbm);
1111 } else if (pbm_routes_this_ino(pbm, SCHIZO_PCIERR_B_INO)) {
1112 err = request_irq(op->irqs[0], schizo_pcierr_intr, 0,
1113 "SCHIZO_PCIERR", pbm);
1114 }
1115 if (err)
1116 printk(KERN_WARNING "%s: Could not register PCIERR, "
1117 "err=%d\n", pbm->name, err);
1118
1119 if (pbm_routes_this_ino(pbm, SCHIZO_SERR_INO)) {
1120 err = request_irq(op->irqs[3], schizo_safarierr_intr, 0,
1121 "SCHIZO_SERR", pbm);
1122 if (err)
1123 printk(KERN_WARNING "%s: Could not register SERR, "
1124 "err=%d\n", pbm->name, err);
1125 }
1094 1126
1095 /* Enable UE and CE interrupts for controller. */ 1127 /* Enable UE and CE interrupts for controller. */
1096 schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL, 1128 schizo_write(pbm->controller_regs + SCHIZO_ECC_CTRL,