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-rw-r--r--arch/mips/kernel/smtc.c18
-rw-r--r--include/asm-mips/smtc_ipi.h3
2 files changed, 9 insertions, 12 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 1475de8e79bf..9251ea824937 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -67,15 +67,15 @@ unsigned int ipi_timer_latch[NR_CPUS];
67 67
68#define IPIBUF_PER_CPU 4 68#define IPIBUF_PER_CPU 4
69 69
70struct smtc_ipi_q IPIQ[NR_CPUS]; 70static struct smtc_ipi_q IPIQ[NR_CPUS];
71struct smtc_ipi_q freeIPIq; 71static struct smtc_ipi_q freeIPIq;
72 72
73 73
74/* Forward declarations */ 74/* Forward declarations */
75 75
76void ipi_decode(struct smtc_ipi *); 76void ipi_decode(struct smtc_ipi *);
77void post_direct_ipi(int cpu, struct smtc_ipi *pipi); 77static void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
78void setup_cross_vpe_interrupts(void); 78static void setup_cross_vpe_interrupts(void);
79void init_smtc_stats(void); 79void init_smtc_stats(void);
80 80
81/* Global SMTC Status */ 81/* Global SMTC Status */
@@ -190,7 +190,7 @@ void __init sanitize_tlb_entries(void)
190 * Configure shared TLB - VPC configuration bit must be set by caller 190 * Configure shared TLB - VPC configuration bit must be set by caller
191 */ 191 */
192 192
193void smtc_configure_tlb(void) 193static void smtc_configure_tlb(void)
194{ 194{
195 int i,tlbsiz,vpes; 195 int i,tlbsiz,vpes;
196 unsigned long mvpconf0; 196 unsigned long mvpconf0;
@@ -638,7 +638,7 @@ int setup_irq_smtc(unsigned int irq, struct irqaction * new,
638 * the VPE. 638 * the VPE.
639 */ 639 */
640 640
641void smtc_ipi_qdump(void) 641static void smtc_ipi_qdump(void)
642{ 642{
643 int i; 643 int i;
644 644
@@ -749,7 +749,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
749/* 749/*
750 * Send IPI message to Halted TC, TargTC/TargVPE already having been set 750 * Send IPI message to Halted TC, TargTC/TargVPE already having been set
751 */ 751 */
752void post_direct_ipi(int cpu, struct smtc_ipi *pipi) 752static void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
753{ 753{
754 struct pt_regs *kstack; 754 struct pt_regs *kstack;
755 unsigned long tcstatus; 755 unsigned long tcstatus;
@@ -968,7 +968,7 @@ static void ipi_irq_dispatch(void)
968 968
969static struct irqaction irq_ipi; 969static struct irqaction irq_ipi;
970 970
971void setup_cross_vpe_interrupts(void) 971static void setup_cross_vpe_interrupts(void)
972{ 972{
973 if (!cpu_has_vint) 973 if (!cpu_has_vint)
974 panic("SMTC Kernel requires Vectored Interupt support"); 974 panic("SMTC Kernel requires Vectored Interupt support");
@@ -1264,7 +1264,7 @@ void smtc_flush_tlb_asid(unsigned long asid)
1264 * Support for single-threading cache flush operations. 1264 * Support for single-threading cache flush operations.
1265 */ 1265 */
1266 1266
1267int halt_state_save[NR_CPUS]; 1267static int halt_state_save[NR_CPUS];
1268 1268
1269/* 1269/*
1270 * To really, really be sure that nothing is being done 1270 * To really, really be sure that nothing is being done
diff --git a/include/asm-mips/smtc_ipi.h b/include/asm-mips/smtc_ipi.h
index f22c3e2f993a..55f3419f6546 100644
--- a/include/asm-mips/smtc_ipi.h
+++ b/include/asm-mips/smtc_ipi.h
@@ -44,9 +44,6 @@ struct smtc_ipi_q {
44 int depth; 44 int depth;
45}; 45};
46 46
47extern struct smtc_ipi_q IPIQ[NR_CPUS];
48extern struct smtc_ipi_q freeIPIq;
49
50static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) 47static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p)
51{ 48{
52 long flags; 49 long flags;